aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig3
-rw-r--r--arch/arm/boot/dts/atlas6.dtsi22
-rw-r--r--arch/arm/boot/dts/imx28-apx4devkit.dts2
-rw-r--r--arch/arm/boot/dts/imx28-evk.dts2
-rw-r--r--arch/arm/boot/dts/imx28-m28evk.dts2
-rw-r--r--arch/arm/boot/dts/imx28.dtsi1
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts13
-rw-r--r--arch/arm/boot/dts/imx53-mba53.dts2
-rw-r--r--arch/arm/boot/dts/imx53.dtsi32
-rw-r--r--arch/arm/boot/dts/prima2.dtsi16
-rw-r--r--arch/arm/boot/dts/stih416-pinctrl.dtsi10
-rw-r--r--arch/arm/boot/dts/stih416.dtsi2
-rw-r--r--arch/arm/boot/dts/twl4030.dtsi6
-rw-r--r--arch/arm/boot/dts/vf610.dtsi8
-rw-r--r--arch/arm/common/edma.c1
-rw-r--r--arch/arm/common/mcpm_platsmp.c4
-rw-r--r--arch/arm/configs/da8xx_omapl_defconfig2
-rw-r--r--arch/arm/configs/davinci_all_defconfig2
-rw-r--r--arch/arm/configs/multi_v7_defconfig6
-rw-r--r--arch/arm/configs/nhk8815_defconfig7
-rw-r--r--arch/arm/include/asm/arch_timer.h2
-rw-r--r--arch/arm/kernel/head-common.S1
-rw-r--r--arch/arm/kernel/head-nommu.S1
-rw-r--r--arch/arm/kernel/head.S1
-rw-r--r--arch/arm/kernel/hw_breakpoint.c4
-rw-r--r--arch/arm/kernel/perf_event_cpu.c6
-rw-r--r--arch/arm/kernel/psci_smp.c3
-rw-r--r--arch/arm/kernel/smp.c18
-rw-r--r--arch/arm/kernel/smp_twd.c6
-rw-r--r--arch/arm/lib/delay.c2
-rw-r--r--arch/arm/mach-davinci/board-dm365-evm.c2
-rw-r--r--arch/arm/mach-davinci/dm355.c2
-rw-r--r--arch/arm/mach-davinci/dm365.c2
-rw-r--r--arch/arm/mach-exynos/Kconfig1
-rw-r--r--arch/arm/mach-exynos/Makefile2
-rw-r--r--arch/arm/mach-exynos/common.c26
-rw-r--r--arch/arm/mach-exynos/common.h1
-rw-r--r--arch/arm/mach-exynos/cpuidle.c1
-rw-r--r--arch/arm/mach-exynos/headsmp.S2
-rw-r--r--arch/arm/mach-exynos/include/mach/memory.h5
-rw-r--r--arch/arm/mach-exynos/platsmp.c4
-rw-r--r--arch/arm/mach-exynos/pm.c6
-rw-r--r--arch/arm/mach-footbridge/dc21285.c2
-rw-r--r--arch/arm/mach-highbank/highbank.c7
-rw-r--r--arch/arm/mach-highbank/platsmp.c2
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c5
-rw-r--r--arch/arm/mach-imx/clk-vf610.c2
-rw-r--r--arch/arm/mach-imx/mx27.h2
-rw-r--r--arch/arm/mach-imx/platsmp.c2
-rw-r--r--arch/arm/mach-keystone/keystone.c2
-rw-r--r--arch/arm/mach-keystone/platsmp.c2
-rw-r--r--arch/arm/mach-msm/headsmp.S2
-rw-r--r--arch/arm/mach-msm/platsmp.c6
-rw-r--r--arch/arm/mach-msm/timer.c4
-rw-r--r--arch/arm/mach-mvebu/coherency.c2
-rw-r--r--arch/arm/mach-mvebu/headsmp.S2
-rw-r--r--arch/arm/mach-mvebu/platsmp.c5
-rw-r--r--arch/arm/mach-omap2/Kconfig2
-rw-r--r--arch/arm/mach-omap2/board-generic.c23
-rw-r--r--arch/arm/mach-omap2/omap-headsmp.S2
-rw-r--r--arch/arm/mach-omap2/omap-mpuss-lowpower.c2
-rw-r--r--arch/arm/mach-omap2/omap-smp.c4
-rw-r--r--arch/arm/mach-omap2/omap-wakeupgen.c4
-rw-r--r--arch/arm/mach-prima2/headsmp.S2
-rw-r--r--arch/arm/mach-prima2/platsmp.c4
-rw-r--r--arch/arm/mach-pxa/em-x270.c17
-rw-r--r--arch/arm/mach-pxa/mainstone.c3
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c3
-rw-r--r--arch/arm/mach-pxa/poodle.c4
-rw-r--r--arch/arm/mach-pxa/spitz.c4
-rw-r--r--arch/arm/mach-pxa/stargate2.c3
-rw-r--r--arch/arm/mach-s3c24xx/Kconfig2
-rw-r--r--arch/arm/mach-s3c24xx/clock-s3c2410.c161
-rw-r--r--arch/arm/mach-s3c24xx/clock-s3c2440.c3
-rw-r--r--arch/arm/mach-shmobile/headsmp-scu.S1
-rw-r--r--arch/arm/mach-shmobile/headsmp.S2
-rw-r--r--arch/arm/mach-shmobile/smp-emev2.c2
-rw-r--r--arch/arm/mach-shmobile/smp-r8a7779.c2
-rw-r--r--arch/arm/mach-shmobile/smp-sh73a0.c2
-rw-r--r--arch/arm/mach-socfpga/headsmp.S1
-rw-r--r--arch/arm/mach-socfpga/platsmp.c2
-rw-r--r--arch/arm/mach-spear/generic.h2
-rw-r--r--arch/arm/mach-spear/platsmp.c4
-rw-r--r--arch/arm/mach-sti/Kconfig3
-rw-r--r--arch/arm/mach-sti/platsmp.c6
-rw-r--r--arch/arm/mach-tegra/platsmp.c4
-rw-r--r--arch/arm/mach-tegra/pm.c2
-rw-r--r--arch/arm/mach-ux500/platsmp.c4
-rw-r--r--arch/arm/mach-zynq/common.c2
-rw-r--r--arch/arm/mach-zynq/common.h2
-rw-r--r--arch/arm/mach-zynq/headsmp.S2
-rw-r--r--arch/arm/mach-zynq/platsmp.c6
-rw-r--r--arch/arm/mm/proc-arm1020.S2
-rw-r--r--arch/arm/mm/proc-arm1020e.S2
-rw-r--r--arch/arm/mm/proc-arm1022.S2
-rw-r--r--arch/arm/mm/proc-arm1026.S3
-rw-r--r--arch/arm/mm/proc-arm720.S2
-rw-r--r--arch/arm/mm/proc-arm740.S2
-rw-r--r--arch/arm/mm/proc-arm7tdmi.S2
-rw-r--r--arch/arm/mm/proc-arm920.S2
-rw-r--r--arch/arm/mm/proc-arm922.S2
-rw-r--r--arch/arm/mm/proc-arm925.S2
-rw-r--r--arch/arm/mm/proc-arm926.S2
-rw-r--r--arch/arm/mm/proc-arm940.S2
-rw-r--r--arch/arm/mm/proc-arm946.S2
-rw-r--r--arch/arm/mm/proc-arm9tdmi.S2
-rw-r--r--arch/arm/mm/proc-fa526.S2
-rw-r--r--arch/arm/mm/proc-feroceon.S2
-rw-r--r--arch/arm/mm/proc-mohawk.S2
-rw-r--r--arch/arm/mm/proc-sa110.S2
-rw-r--r--arch/arm/mm/proc-sa1100.S2
-rw-r--r--arch/arm/mm/proc-v6.S2
-rw-r--r--arch/arm/mm/proc-v7-2level.S4
-rw-r--r--arch/arm/mm/proc-v7-3level.S4
-rw-r--r--arch/arm/mm/proc-v7.S2
-rw-r--r--arch/arm/mm/proc-xsc3.S2
-rw-r--r--arch/arm/mm/proc-xscale.S2
-rw-r--r--arch/arm/plat-samsung/Kconfig7
-rw-r--r--arch/arm/plat-samsung/Makefile2
-rw-r--r--arch/arm/plat-samsung/include/plat/clock.h5
-rw-r--r--arch/arm/plat-samsung/include/plat/pm.h8
-rw-r--r--arch/arm/plat-samsung/pm.c14
-rw-r--r--arch/arm/plat-versatile/platsmp.c6
123 files changed, 355 insertions, 322 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ba412e02ec0c..37c0f4e978d4 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1600,8 +1600,7 @@ config LOCAL_TIMERS
1600config ARCH_NR_GPIO 1600config ARCH_NR_GPIO
1601 int 1601 int
1602 default 1024 if ARCH_SHMOBILE || ARCH_TEGRA 1602 default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1603 default 512 if SOC_OMAP5 1603 default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5
1604 default 512 if ARCH_KEYSTONE
1605 default 392 if ARCH_U8500 1604 default 392 if ARCH_U8500
1606 default 352 if ARCH_VT8500 1605 default 352 if ARCH_VT8500
1607 default 288 if ARCH_SUNXI 1606 default 288 if ARCH_SUNXI
diff --git a/arch/arm/boot/dts/atlas6.dtsi b/arch/arm/boot/dts/atlas6.dtsi
index 9866cd736dee..a0f2721ea583 100644
--- a/arch/arm/boot/dts/atlas6.dtsi
+++ b/arch/arm/boot/dts/atlas6.dtsi
@@ -485,6 +485,12 @@
485 sirf,function = "usp0"; 485 sirf,function = "usp0";
486 }; 486 };
487 }; 487 };
488 usp0_uart_nostreamctrl_pins_a: usp0@1 {
489 usp0 {
490 sirf,pins = "usp0_uart_nostreamctrl_grp";
491 sirf,function = "usp0_uart_nostreamctrl";
492 };
493 };
488 usp1_pins_a: usp1@0 { 494 usp1_pins_a: usp1@0 {
489 usp1 { 495 usp1 {
490 sirf,pins = "usp1grp"; 496 sirf,pins = "usp1grp";
@@ -515,16 +521,16 @@
515 sirf,function = "pulse_count"; 521 sirf,function = "pulse_count";
516 }; 522 };
517 }; 523 };
518 cko0_rst_pins_a: cko0_rst@0 { 524 cko0_pins_a: cko0@0 {
519 cko0_rst { 525 cko0 {
520 sirf,pins = "cko0_rstgrp"; 526 sirf,pins = "cko0grp";
521 sirf,function = "cko0_rst"; 527 sirf,function = "cko0";
522 }; 528 };
523 }; 529 };
524 cko1_rst_pins_a: cko1_rst@0 { 530 cko1_pins_a: cko1@0 {
525 cko1_rst { 531 cko1 {
526 sirf,pins = "cko1_rstgrp"; 532 sirf,pins = "cko1grp";
527 sirf,function = "cko1_rst"; 533 sirf,function = "cko1";
528 }; 534 };
529 }; 535 };
530 }; 536 };
diff --git a/arch/arm/boot/dts/imx28-apx4devkit.dts b/arch/arm/boot/dts/imx28-apx4devkit.dts
index 43bf3c796cba..0e7fed47bd8d 100644
--- a/arch/arm/boot/dts/imx28-apx4devkit.dts
+++ b/arch/arm/boot/dts/imx28-apx4devkit.dts
@@ -147,7 +147,7 @@
147 reg = <0x0a>; 147 reg = <0x0a>;
148 VDDA-supply = <&reg_3p3v>; 148 VDDA-supply = <&reg_3p3v>;
149 VDDIO-supply = <&reg_3p3v>; 149 VDDIO-supply = <&reg_3p3v>;
150 150 clocks = <&saif0>;
151 }; 151 };
152 152
153 pcf8563: rtc@51 { 153 pcf8563: rtc@51 {
diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts
index 1f0d38d7b16f..e035f4664b97 100644
--- a/arch/arm/boot/dts/imx28-evk.dts
+++ b/arch/arm/boot/dts/imx28-evk.dts
@@ -195,7 +195,7 @@
195 reg = <0x0a>; 195 reg = <0x0a>;
196 VDDA-supply = <&reg_3p3v>; 196 VDDA-supply = <&reg_3p3v>;
197 VDDIO-supply = <&reg_3p3v>; 197 VDDIO-supply = <&reg_3p3v>;
198 198 clocks = <&saif0>;
199 }; 199 };
200 200
201 at24@51 { 201 at24@51 {
diff --git a/arch/arm/boot/dts/imx28-m28evk.dts b/arch/arm/boot/dts/imx28-m28evk.dts
index 880df2f13be8..44d9da57736e 100644
--- a/arch/arm/boot/dts/imx28-m28evk.dts
+++ b/arch/arm/boot/dts/imx28-m28evk.dts
@@ -184,7 +184,7 @@
184 reg = <0x0a>; 184 reg = <0x0a>;
185 VDDA-supply = <&reg_3p3v>; 185 VDDA-supply = <&reg_3p3v>;
186 VDDIO-supply = <&reg_3p3v>; 186 VDDIO-supply = <&reg_3p3v>;
187 187 clocks = <&saif0>;
188 }; 188 };
189 189
190 eeprom: eeprom@51 { 190 eeprom: eeprom@51 {
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 6a8acb01b1d3..9524a0571281 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -837,6 +837,7 @@
837 compatible = "fsl,imx28-saif"; 837 compatible = "fsl,imx28-saif";
838 reg = <0x80042000 0x2000>; 838 reg = <0x80042000 0x2000>;
839 interrupts = <59 80>; 839 interrupts = <59 80>;
840 #clock-cells = <0>;
840 clocks = <&clks 53>; 841 clocks = <&clks 53>;
841 dmas = <&dma_apbx 4>; 842 dmas = <&dma_apbx 4>;
842 dma-names = "rx-tx"; 843 dma-names = "rx-tx";
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index 6dd9486c755b..ad3471ca17c7 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -61,6 +61,16 @@
61 mux-int-port = <2>; 61 mux-int-port = <2>;
62 mux-ext-port = <3>; 62 mux-ext-port = <3>;
63 }; 63 };
64
65 clocks {
66 clk_26M: codec_clock {
67 compatible = "fixed-clock";
68 reg=<0>;
69 #clock-cells = <0>;
70 clock-frequency = <26000000>;
71 gpios = <&gpio4 26 1>;
72 };
73 };
64}; 74};
65 75
66&esdhc1 { 76&esdhc1 {
@@ -229,6 +239,7 @@
229 MX51_PAD_EIM_A27__GPIO2_21 0x5 239 MX51_PAD_EIM_A27__GPIO2_21 0x5
230 MX51_PAD_CSPI1_SS0__GPIO4_24 0x85 240 MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
231 MX51_PAD_CSPI1_SS1__GPIO4_25 0x85 241 MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
242 MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
232 >; 243 >;
233 }; 244 };
234 }; 245 };
@@ -255,7 +266,7 @@
255 sgtl5000: codec@0a { 266 sgtl5000: codec@0a {
256 compatible = "fsl,sgtl5000"; 267 compatible = "fsl,sgtl5000";
257 reg = <0x0a>; 268 reg = <0x0a>;
258 clock-frequency = <26000000>; 269 clocks = <&clk_26M>;
259 VDDA-supply = <&vdig_reg>; 270 VDDA-supply = <&vdig_reg>;
260 VDDIO-supply = <&vvideo_reg>; 271 VDDIO-supply = <&vvideo_reg>;
261 }; 272 };
diff --git a/arch/arm/boot/dts/imx53-mba53.dts b/arch/arm/boot/dts/imx53-mba53.dts
index aaa33bc99f78..a63090267941 100644
--- a/arch/arm/boot/dts/imx53-mba53.dts
+++ b/arch/arm/boot/dts/imx53-mba53.dts
@@ -27,7 +27,7 @@
27 27
28 backlight { 28 backlight {
29 compatible = "pwm-backlight"; 29 compatible = "pwm-backlight";
30 pwms = <&pwm2 0 50000 0 0>; 30 pwms = <&pwm2 0 50000>;
31 brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>; 31 brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>;
32 default-brightness-level = <10>; 32 default-brightness-level = <10>;
33 enable-gpios = <&gpio7 7 0>; 33 enable-gpios = <&gpio7 7 0>;
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 3895fbba8fce..569aa9f2c4ed 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -725,15 +725,15 @@
725 uart1 { 725 uart1 {
726 pinctrl_uart1_1: uart1grp-1 { 726 pinctrl_uart1_1: uart1grp-1 {
727 fsl,pins = < 727 fsl,pins = <
728 MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1c5 728 MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4
729 MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1c5 729 MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1e4
730 >; 730 >;
731 }; 731 };
732 732
733 pinctrl_uart1_2: uart1grp-2 { 733 pinctrl_uart1_2: uart1grp-2 {
734 fsl,pins = < 734 fsl,pins = <
735 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1c5 735 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
736 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1c5 736 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
737 >; 737 >;
738 }; 738 };
739 739
@@ -748,8 +748,8 @@
748 uart2 { 748 uart2 {
749 pinctrl_uart2_1: uart2grp-1 { 749 pinctrl_uart2_1: uart2grp-1 {
750 fsl,pins = < 750 fsl,pins = <
751 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1c5 751 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
752 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1c5 752 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
753 >; 753 >;
754 }; 754 };
755 755
@@ -766,17 +766,17 @@
766 uart3 { 766 uart3 {
767 pinctrl_uart3_1: uart3grp-1 { 767 pinctrl_uart3_1: uart3grp-1 {
768 fsl,pins = < 768 fsl,pins = <
769 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1c5 769 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
770 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1c5 770 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
771 MX53_PAD_PATA_DA_1__UART3_CTS 0x1c5 771 MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4
772 MX53_PAD_PATA_DA_2__UART3_RTS 0x1c5 772 MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
773 >; 773 >;
774 }; 774 };
775 775
776 pinctrl_uart3_2: uart3grp-2 { 776 pinctrl_uart3_2: uart3grp-2 {
777 fsl,pins = < 777 fsl,pins = <
778 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1c5 778 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
779 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1c5 779 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
780 >; 780 >;
781 }; 781 };
782 782
@@ -785,8 +785,8 @@
785 uart4 { 785 uart4 {
786 pinctrl_uart4_1: uart4grp-1 { 786 pinctrl_uart4_1: uart4grp-1 {
787 fsl,pins = < 787 fsl,pins = <
788 MX53_PAD_KEY_COL0__UART4_TXD_MUX 0x1c5 788 MX53_PAD_KEY_COL0__UART4_TXD_MUX 0x1e4
789 MX53_PAD_KEY_ROW0__UART4_RXD_MUX 0x1c5 789 MX53_PAD_KEY_ROW0__UART4_RXD_MUX 0x1e4
790 >; 790 >;
791 }; 791 };
792 }; 792 };
@@ -794,8 +794,8 @@
794 uart5 { 794 uart5 {
795 pinctrl_uart5_1: uart5grp-1 { 795 pinctrl_uart5_1: uart5grp-1 {
796 fsl,pins = < 796 fsl,pins = <
797 MX53_PAD_KEY_COL1__UART5_TXD_MUX 0x1c5 797 MX53_PAD_KEY_COL1__UART5_TXD_MUX 0x1e4
798 MX53_PAD_KEY_ROW1__UART5_RXD_MUX 0x1c5 798 MX53_PAD_KEY_ROW1__UART5_RXD_MUX 0x1e4
799 >; 799 >;
800 }; 800 };
801 }; 801 };
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi
index 05e9489cf95c..bbeb623fc2c6 100644
--- a/arch/arm/boot/dts/prima2.dtsi
+++ b/arch/arm/boot/dts/prima2.dtsi
@@ -515,16 +515,16 @@
515 sirf,function = "pulse_count"; 515 sirf,function = "pulse_count";
516 }; 516 };
517 }; 517 };
518 cko0_rst_pins_a: cko0_rst@0 { 518 cko0_pins_a: cko0@0 {
519 cko0_rst { 519 cko0 {
520 sirf,pins = "cko0_rstgrp"; 520 sirf,pins = "cko0grp";
521 sirf,function = "cko0_rst"; 521 sirf,function = "cko0";
522 }; 522 };
523 }; 523 };
524 cko1_rst_pins_a: cko1_rst@0 { 524 cko1_pins_a: cko1@0 {
525 cko1_rst { 525 cko1 {
526 sirf,pins = "cko1_rstgrp"; 526 sirf,pins = "cko1grp";
527 sirf,function = "cko1_rst"; 527 sirf,function = "cko1";
528 }; 528 };
529 }; 529 };
530 }; 530 };
diff --git a/arch/arm/boot/dts/stih416-pinctrl.dtsi b/arch/arm/boot/dts/stih416-pinctrl.dtsi
index 957b21a71b4b..0f246c979262 100644
--- a/arch/arm/boot/dts/stih416-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih416-pinctrl.dtsi
@@ -166,6 +166,15 @@
166 reg = <0x9000 0x100>; 166 reg = <0x9000 0x100>;
167 st,bank-name = "PIO31"; 167 st,bank-name = "PIO31";
168 }; 168 };
169
170 serial2-oe {
171 pinctrl_serial2_oe: serial2-1 {
172 st,pins {
173 output-enable = <&PIO11 3 ALT2 OUT>;
174 };
175 };
176 };
177
169 }; 178 };
170 179
171 pin-controller-rear { 180 pin-controller-rear {
@@ -218,7 +227,6 @@
218 st,pins { 227 st,pins {
219 tx = <&PIO17 4 ALT2 OUT>; 228 tx = <&PIO17 4 ALT2 OUT>;
220 rx = <&PIO17 5 ALT2 IN>; 229 rx = <&PIO17 5 ALT2 IN>;
221 output-enable = <&PIO11 3 ALT2 OUT>;
222 }; 230 };
223 }; 231 };
224 }; 232 };
diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi
index 3cecd9689a49..1a0326ea7d07 100644
--- a/arch/arm/boot/dts/stih416.dtsi
+++ b/arch/arm/boot/dts/stih416.dtsi
@@ -79,7 +79,7 @@
79 interrupts = <0 197 0>; 79 interrupts = <0 197 0>;
80 clocks = <&CLK_S_ICN_REG_0>; 80 clocks = <&CLK_S_ICN_REG_0>;
81 pinctrl-names = "default"; 81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_serial2>; 82 pinctrl-0 = <&pinctrl_serial2 &pinctrl_serial2_oe>;
83 }; 83 };
84 84
85 /* SBC_UART1 */ 85 /* SBC_UART1 */
diff --git a/arch/arm/boot/dts/twl4030.dtsi b/arch/arm/boot/dts/twl4030.dtsi
index b3034da00a37..ae6a17aed9ee 100644
--- a/arch/arm/boot/dts/twl4030.dtsi
+++ b/arch/arm/boot/dts/twl4030.dtsi
@@ -47,6 +47,12 @@
47 regulator-max-microvolt = <3150000>; 47 regulator-max-microvolt = <3150000>;
48 }; 48 };
49 49
50 vmmc2: regulator-vmmc2 {
51 compatible = "ti,twl4030-vmmc2";
52 regulator-min-microvolt = <1850000>;
53 regulator-max-microvolt = <3150000>;
54 };
55
50 vusb1v5: regulator-vusb1v5 { 56 vusb1v5: regulator-vusb1v5 {
51 compatible = "ti,twl4030-vusb1v5"; 57 compatible = "ti,twl4030-vusb1v5";
52 }; 58 };
diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
index e1eb7dadda80..67d929cf9804 100644
--- a/arch/arm/boot/dts/vf610.dtsi
+++ b/arch/arm/boot/dts/vf610.dtsi
@@ -442,8 +442,8 @@
442 compatible = "fsl,mvf600-fec"; 442 compatible = "fsl,mvf600-fec";
443 reg = <0x400d0000 0x1000>; 443 reg = <0x400d0000 0x1000>;
444 interrupts = <0 78 0x04>; 444 interrupts = <0 78 0x04>;
445 clocks = <&clks VF610_CLK_ENET>, 445 clocks = <&clks VF610_CLK_ENET0>,
446 <&clks VF610_CLK_ENET>, 446 <&clks VF610_CLK_ENET0>,
447 <&clks VF610_CLK_ENET>; 447 <&clks VF610_CLK_ENET>;
448 clock-names = "ipg", "ahb", "ptp"; 448 clock-names = "ipg", "ahb", "ptp";
449 status = "disabled"; 449 status = "disabled";
@@ -453,8 +453,8 @@
453 compatible = "fsl,mvf600-fec"; 453 compatible = "fsl,mvf600-fec";
454 reg = <0x400d1000 0x1000>; 454 reg = <0x400d1000 0x1000>;
455 interrupts = <0 79 0x04>; 455 interrupts = <0 79 0x04>;
456 clocks = <&clks VF610_CLK_ENET>, 456 clocks = <&clks VF610_CLK_ENET1>,
457 <&clks VF610_CLK_ENET>, 457 <&clks VF610_CLK_ENET1>,
458 <&clks VF610_CLK_ENET>; 458 <&clks VF610_CLK_ENET>;
459 clock-names = "ipg", "ahb", "ptp"; 459 clock-names = "ipg", "ahb", "ptp";
460 status = "disabled"; 460 status = "disabled";
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index a432e6c1dac1..39ad030ac0c7 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -26,7 +26,6 @@
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/slab.h> 27#include <linux/slab.h>
28#include <linux/edma.h> 28#include <linux/edma.h>
29#include <linux/err.h>
30#include <linux/of_address.h> 29#include <linux/of_address.h>
31#include <linux/of_device.h> 30#include <linux/of_device.h>
32#include <linux/of_dma.h> 31#include <linux/of_dma.h>
diff --git a/arch/arm/common/mcpm_platsmp.c b/arch/arm/common/mcpm_platsmp.c
index 510e5b13aa2e..1bc34c7567fd 100644
--- a/arch/arm/common/mcpm_platsmp.c
+++ b/arch/arm/common/mcpm_platsmp.c
@@ -19,7 +19,7 @@
19#include <asm/smp.h> 19#include <asm/smp.h>
20#include <asm/smp_plat.h> 20#include <asm/smp_plat.h>
21 21
22static int __cpuinit mcpm_boot_secondary(unsigned int cpu, struct task_struct *idle) 22static int mcpm_boot_secondary(unsigned int cpu, struct task_struct *idle)
23{ 23{
24 unsigned int mpidr, pcpu, pcluster, ret; 24 unsigned int mpidr, pcpu, pcluster, ret;
25 extern void secondary_startup(void); 25 extern void secondary_startup(void);
@@ -40,7 +40,7 @@ static int __cpuinit mcpm_boot_secondary(unsigned int cpu, struct task_struct *i
40 return 0; 40 return 0;
41} 41}
42 42
43static void __cpuinit mcpm_secondary_init(unsigned int cpu) 43static void mcpm_secondary_init(unsigned int cpu)
44{ 44{
45 mcpm_cpu_powered_up(); 45 mcpm_cpu_powered_up();
46} 46}
diff --git a/arch/arm/configs/da8xx_omapl_defconfig b/arch/arm/configs/da8xx_omapl_defconfig
index 7c868139bdb0..1571bea48bed 100644
--- a/arch/arm/configs/da8xx_omapl_defconfig
+++ b/arch/arm/configs/da8xx_omapl_defconfig
@@ -102,6 +102,8 @@ CONFIG_SND_SOC=m
102CONFIG_SND_DAVINCI_SOC=m 102CONFIG_SND_DAVINCI_SOC=m
103# CONFIG_HID_SUPPORT is not set 103# CONFIG_HID_SUPPORT is not set
104# CONFIG_USB_SUPPORT is not set 104# CONFIG_USB_SUPPORT is not set
105CONFIG_DMADEVICES=y
106CONFIG_TI_EDMA=y
105CONFIG_EXT2_FS=y 107CONFIG_EXT2_FS=y
106CONFIG_EXT3_FS=y 108CONFIG_EXT3_FS=y
107CONFIG_XFS_FS=m 109CONFIG_XFS_FS=m
diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig
index c86fd75e181a..ab2f7378352c 100644
--- a/arch/arm/configs/davinci_all_defconfig
+++ b/arch/arm/configs/davinci_all_defconfig
@@ -162,6 +162,8 @@ CONFIG_LEDS_TRIGGERS=y
162CONFIG_LEDS_TRIGGER_TIMER=m 162CONFIG_LEDS_TRIGGER_TIMER=m
163CONFIG_LEDS_TRIGGER_HEARTBEAT=m 163CONFIG_LEDS_TRIGGER_HEARTBEAT=m
164CONFIG_RTC_CLASS=y 164CONFIG_RTC_CLASS=y
165CONFIG_DMADEVICES=y
166CONFIG_TI_EDMA=y
165CONFIG_EXT2_FS=y 167CONFIG_EXT2_FS=y
166CONFIG_EXT3_FS=y 168CONFIG_EXT3_FS=y
167CONFIG_XFS_FS=m 169CONFIG_XFS_FS=m
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index fe0bdc361d2c..6e572c64cf5a 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -53,6 +53,7 @@ CONFIG_IP_PNP=y
53CONFIG_IP_PNP_DHCP=y 53CONFIG_IP_PNP_DHCP=y
54CONFIG_DEVTMPFS=y 54CONFIG_DEVTMPFS=y
55CONFIG_DEVTMPFS_MOUNT=y 55CONFIG_DEVTMPFS_MOUNT=y
56CONFIG_OMAP_OCP2SCP=y
56CONFIG_BLK_DEV_SD=y 57CONFIG_BLK_DEV_SD=y
57CONFIG_ATA=y 58CONFIG_ATA=y
58CONFIG_SATA_AHCI_PLATFORM=y 59CONFIG_SATA_AHCI_PLATFORM=y
@@ -61,6 +62,7 @@ CONFIG_SATA_MV=y
61CONFIG_NETDEVICES=y 62CONFIG_NETDEVICES=y
62CONFIG_SUN4I_EMAC=y 63CONFIG_SUN4I_EMAC=y
63CONFIG_NET_CALXEDA_XGMAC=y 64CONFIG_NET_CALXEDA_XGMAC=y
65CONFIG_KS8851=y
64CONFIG_SMSC911X=y 66CONFIG_SMSC911X=y
65CONFIG_STMMAC_ETH=y 67CONFIG_STMMAC_ETH=y
66CONFIG_MDIO_SUN4I=y 68CONFIG_MDIO_SUN4I=y
@@ -89,6 +91,7 @@ CONFIG_I2C_DESIGNWARE_PLATFORM=y
89CONFIG_I2C_SIRF=y 91CONFIG_I2C_SIRF=y
90CONFIG_I2C_TEGRA=y 92CONFIG_I2C_TEGRA=y
91CONFIG_SPI=y 93CONFIG_SPI=y
94CONFIG_SPI_OMAP24XX=y
92CONFIG_SPI_PL022=y 95CONFIG_SPI_PL022=y
93CONFIG_SPI_SIRF=y 96CONFIG_SPI_SIRF=y
94CONFIG_SPI_TEGRA114=y 97CONFIG_SPI_TEGRA114=y
@@ -111,11 +114,12 @@ CONFIG_FB_SIMPLE=y
111CONFIG_USB=y 114CONFIG_USB=y
112CONFIG_USB_XHCI_HCD=y 115CONFIG_USB_XHCI_HCD=y
113CONFIG_USB_EHCI_HCD=y 116CONFIG_USB_EHCI_HCD=y
114CONFIG_USB_EHCI_MXC=y
115CONFIG_USB_EHCI_TEGRA=y 117CONFIG_USB_EHCI_TEGRA=y
116CONFIG_USB_EHCI_HCD_PLATFORM=y 118CONFIG_USB_EHCI_HCD_PLATFORM=y
117CONFIG_USB_ISP1760_HCD=y 119CONFIG_USB_ISP1760_HCD=y
118CONFIG_USB_STORAGE=y 120CONFIG_USB_STORAGE=y
121CONFIG_USB_CHIPIDEA=y
122CONFIG_USB_CHIPIDEA_HOST=y
119CONFIG_AB8500_USB=y 123CONFIG_AB8500_USB=y
120CONFIG_NOP_USB_XCEIV=y 124CONFIG_NOP_USB_XCEIV=y
121CONFIG_OMAP_USB2=y 125CONFIG_OMAP_USB2=y
diff --git a/arch/arm/configs/nhk8815_defconfig b/arch/arm/configs/nhk8815_defconfig
index 35f8cf299fa2..263ae3869e32 100644
--- a/arch/arm/configs/nhk8815_defconfig
+++ b/arch/arm/configs/nhk8815_defconfig
@@ -1,6 +1,8 @@
1# CONFIG_LOCALVERSION_AUTO is not set 1# CONFIG_LOCALVERSION_AUTO is not set
2# CONFIG_SWAP is not set 2# CONFIG_SWAP is not set
3CONFIG_SYSVIPC=y 3CONFIG_SYSVIPC=y
4CONFIG_NO_HZ_IDLE=y
5CONFIG_HIGH_RES_TIMERS=y
4CONFIG_IKCONFIG=y 6CONFIG_IKCONFIG=y
5CONFIG_IKCONFIG_PROC=y 7CONFIG_IKCONFIG_PROC=y
6CONFIG_LOG_BUF_SHIFT=14 8CONFIG_LOG_BUF_SHIFT=14
@@ -48,7 +50,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
48CONFIG_MTD=y 50CONFIG_MTD=y
49CONFIG_MTD_TESTS=m 51CONFIG_MTD_TESTS=m
50CONFIG_MTD_CMDLINE_PARTS=y 52CONFIG_MTD_CMDLINE_PARTS=y
51CONFIG_MTD_CHAR=y
52CONFIG_MTD_BLOCK=y 53CONFIG_MTD_BLOCK=y
53CONFIG_MTD_NAND_ECC_SMC=y 54CONFIG_MTD_NAND_ECC_SMC=y
54CONFIG_MTD_NAND=y 55CONFIG_MTD_NAND=y
@@ -94,8 +95,10 @@ CONFIG_I2C_GPIO=y
94CONFIG_I2C_NOMADIK=y 95CONFIG_I2C_NOMADIK=y
95CONFIG_DEBUG_GPIO=y 96CONFIG_DEBUG_GPIO=y
96# CONFIG_HWMON is not set 97# CONFIG_HWMON is not set
98CONFIG_REGULATOR=y
97CONFIG_MMC=y 99CONFIG_MMC=y
98CONFIG_MMC_CLKGATE=y 100CONFIG_MMC_UNSAFE_RESUME=y
101# CONFIG_MMC_BLOCK_BOUNCE is not set
99CONFIG_MMC_ARMMMCI=y 102CONFIG_MMC_ARMMMCI=y
100CONFIG_NEW_LEDS=y 103CONFIG_NEW_LEDS=y
101CONFIG_LEDS_CLASS=y 104CONFIG_LEDS_CLASS=y
diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
index accefe099182..e406d575c94f 100644
--- a/arch/arm/include/asm/arch_timer.h
+++ b/arch/arm/include/asm/arch_timer.h
@@ -89,7 +89,7 @@ static inline u64 arch_counter_get_cntvct(void)
89 return cval; 89 return cval;
90} 90}
91 91
92static inline void __cpuinit arch_counter_set_user_access(void) 92static inline void arch_counter_set_user_access(void)
93{ 93{
94 u32 cntkctl; 94 u32 cntkctl;
95 95
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index 76ab5ca50610..47cd974e57ea 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S
@@ -149,7 +149,6 @@ ENDPROC(lookup_processor_type)
149 * r5 = proc_info pointer in physical address space 149 * r5 = proc_info pointer in physical address space
150 * r9 = cpuid (preserved) 150 * r9 = cpuid (preserved)
151 */ 151 */
152 __CPUINIT
153__lookup_processor_type: 152__lookup_processor_type:
154 adr r3, __lookup_processor_type_data 153 adr r3, __lookup_processor_type_data
155 ldmia r3, {r4 - r6} 154 ldmia r3, {r4 - r6}
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index 75f14cc3e073..b361de143756 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -87,7 +87,6 @@ ENTRY(stext)
87ENDPROC(stext) 87ENDPROC(stext)
88 88
89#ifdef CONFIG_SMP 89#ifdef CONFIG_SMP
90 __CPUINIT
91ENTRY(secondary_startup) 90ENTRY(secondary_startup)
92 /* 91 /*
93 * Common entry point for secondary CPUs. 92 * Common entry point for secondary CPUs.
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 45e8935cae4e..9cf6063020ae 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -343,7 +343,6 @@ __turn_mmu_on_loc:
343 .long __turn_mmu_on_end 343 .long __turn_mmu_on_end
344 344
345#if defined(CONFIG_SMP) 345#if defined(CONFIG_SMP)
346 __CPUINIT
347ENTRY(secondary_startup) 346ENTRY(secondary_startup)
348 /* 347 /*
349 * Common entry point for secondary CPUs. 348 * Common entry point for secondary CPUs.
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 1fd749ee4a1b..7b95de601357 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -1020,7 +1020,7 @@ out_mdbgen:
1020 cpumask_or(&debug_err_mask, &debug_err_mask, cpumask_of(cpu)); 1020 cpumask_or(&debug_err_mask, &debug_err_mask, cpumask_of(cpu));
1021} 1021}
1022 1022
1023static int __cpuinit dbg_reset_notify(struct notifier_block *self, 1023static int dbg_reset_notify(struct notifier_block *self,
1024 unsigned long action, void *cpu) 1024 unsigned long action, void *cpu)
1025{ 1025{
1026 if ((action & ~CPU_TASKS_FROZEN) == CPU_ONLINE) 1026 if ((action & ~CPU_TASKS_FROZEN) == CPU_ONLINE)
@@ -1029,7 +1029,7 @@ static int __cpuinit dbg_reset_notify(struct notifier_block *self,
1029 return NOTIFY_OK; 1029 return NOTIFY_OK;
1030} 1030}
1031 1031
1032static struct notifier_block __cpuinitdata dbg_reset_nb = { 1032static struct notifier_block dbg_reset_nb = {
1033 .notifier_call = dbg_reset_notify, 1033 .notifier_call = dbg_reset_notify,
1034}; 1034};
1035 1035
diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c
index 1f2740e3dbc0..aebe0e99c153 100644
--- a/arch/arm/kernel/perf_event_cpu.c
+++ b/arch/arm/kernel/perf_event_cpu.c
@@ -157,8 +157,8 @@ static void cpu_pmu_init(struct arm_pmu *cpu_pmu)
157 * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading 157 * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
158 * junk values out of them. 158 * junk values out of them.
159 */ 159 */
160static int __cpuinit cpu_pmu_notify(struct notifier_block *b, 160static int cpu_pmu_notify(struct notifier_block *b, unsigned long action,
161 unsigned long action, void *hcpu) 161 void *hcpu)
162{ 162{
163 if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING) 163 if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
164 return NOTIFY_DONE; 164 return NOTIFY_DONE;
@@ -171,7 +171,7 @@ static int __cpuinit cpu_pmu_notify(struct notifier_block *b,
171 return NOTIFY_OK; 171 return NOTIFY_OK;
172} 172}
173 173
174static struct notifier_block __cpuinitdata cpu_pmu_hotplug_notifier = { 174static struct notifier_block cpu_pmu_hotplug_notifier = {
175 .notifier_call = cpu_pmu_notify, 175 .notifier_call = cpu_pmu_notify,
176}; 176};
177 177
diff --git a/arch/arm/kernel/psci_smp.c b/arch/arm/kernel/psci_smp.c
index 219f1d73572a..70ded3fb42d9 100644
--- a/arch/arm/kernel/psci_smp.c
+++ b/arch/arm/kernel/psci_smp.c
@@ -46,8 +46,7 @@
46 46
47extern void secondary_startup(void); 47extern void secondary_startup(void);
48 48
49static int __cpuinit psci_boot_secondary(unsigned int cpu, 49static int psci_boot_secondary(unsigned int cpu, struct task_struct *idle)
50 struct task_struct *idle)
51{ 50{
52 if (psci_ops.cpu_on) 51 if (psci_ops.cpu_on)
53 return psci_ops.cpu_on(cpu_logical_map(cpu), 52 return psci_ops.cpu_on(cpu_logical_map(cpu),
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index c5fb5469054b..c2b4f8f0be9a 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -58,7 +58,7 @@ struct secondary_data secondary_data;
58 * control for which core is the next to come out of the secondary 58 * control for which core is the next to come out of the secondary
59 * boot "holding pen" 59 * boot "holding pen"
60 */ 60 */
61volatile int __cpuinitdata pen_release = -1; 61volatile int pen_release = -1;
62 62
63enum ipi_msg_type { 63enum ipi_msg_type {
64 IPI_WAKEUP, 64 IPI_WAKEUP,
@@ -86,7 +86,7 @@ static unsigned long get_arch_pgd(pgd_t *pgd)
86 return pgdir >> ARCH_PGD_SHIFT; 86 return pgdir >> ARCH_PGD_SHIFT;
87} 87}
88 88
89int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle) 89int __cpu_up(unsigned int cpu, struct task_struct *idle)
90{ 90{
91 int ret; 91 int ret;
92 92
@@ -138,7 +138,7 @@ void __init smp_init_cpus(void)
138 smp_ops.smp_init_cpus(); 138 smp_ops.smp_init_cpus();
139} 139}
140 140
141int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) 141int boot_secondary(unsigned int cpu, struct task_struct *idle)
142{ 142{
143 if (smp_ops.smp_boot_secondary) 143 if (smp_ops.smp_boot_secondary)
144 return smp_ops.smp_boot_secondary(cpu, idle); 144 return smp_ops.smp_boot_secondary(cpu, idle);
@@ -170,7 +170,7 @@ static int platform_cpu_disable(unsigned int cpu)
170/* 170/*
171 * __cpu_disable runs on the processor to be shutdown. 171 * __cpu_disable runs on the processor to be shutdown.
172 */ 172 */
173int __cpuinit __cpu_disable(void) 173int __cpu_disable(void)
174{ 174{
175 unsigned int cpu = smp_processor_id(); 175 unsigned int cpu = smp_processor_id();
176 int ret; 176 int ret;
@@ -216,7 +216,7 @@ static DECLARE_COMPLETION(cpu_died);
216 * called on the thread which is asking for a CPU to be shutdown - 216 * called on the thread which is asking for a CPU to be shutdown -
217 * waits until shutdown has completed, or it is timed out. 217 * waits until shutdown has completed, or it is timed out.
218 */ 218 */
219void __cpuinit __cpu_die(unsigned int cpu) 219void __cpu_die(unsigned int cpu)
220{ 220{
221 if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) { 221 if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
222 pr_err("CPU%u: cpu didn't die\n", cpu); 222 pr_err("CPU%u: cpu didn't die\n", cpu);
@@ -306,7 +306,7 @@ void __ref cpu_die(void)
306 * Called by both boot and secondaries to move global data into 306 * Called by both boot and secondaries to move global data into
307 * per-processor storage. 307 * per-processor storage.
308 */ 308 */
309static void __cpuinit smp_store_cpu_info(unsigned int cpuid) 309static void smp_store_cpu_info(unsigned int cpuid)
310{ 310{
311 struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid); 311 struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
312 312
@@ -322,7 +322,7 @@ static void percpu_timer_setup(void);
322 * This is the secondary CPU boot entry. We're using this CPUs 322 * This is the secondary CPU boot entry. We're using this CPUs
323 * idle thread stack, but a set of temporary page tables. 323 * idle thread stack, but a set of temporary page tables.
324 */ 324 */
325asmlinkage void __cpuinit secondary_start_kernel(void) 325asmlinkage void secondary_start_kernel(void)
326{ 326{
327 struct mm_struct *mm = &init_mm; 327 struct mm_struct *mm = &init_mm;
328 unsigned int cpu; 328 unsigned int cpu;
@@ -521,7 +521,7 @@ static void broadcast_timer_set_mode(enum clock_event_mode mode,
521{ 521{
522} 522}
523 523
524static void __cpuinit broadcast_timer_setup(struct clock_event_device *evt) 524static void broadcast_timer_setup(struct clock_event_device *evt)
525{ 525{
526 evt->name = "dummy_timer"; 526 evt->name = "dummy_timer";
527 evt->features = CLOCK_EVT_FEAT_ONESHOT | 527 evt->features = CLOCK_EVT_FEAT_ONESHOT |
@@ -550,7 +550,7 @@ int local_timer_register(struct local_timer_ops *ops)
550} 550}
551#endif 551#endif
552 552
553static void __cpuinit percpu_timer_setup(void) 553static void percpu_timer_setup(void)
554{ 554{
555 unsigned int cpu = smp_processor_id(); 555 unsigned int cpu = smp_processor_id();
556 struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu); 556 struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu);
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index f6fd1d4398c6..25956204ef23 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -187,7 +187,7 @@ core_initcall(twd_cpufreq_init);
187 187
188#endif 188#endif
189 189
190static void __cpuinit twd_calibrate_rate(void) 190static void twd_calibrate_rate(void)
191{ 191{
192 unsigned long count; 192 unsigned long count;
193 u64 waitjiffies; 193 u64 waitjiffies;
@@ -265,7 +265,7 @@ static void twd_get_clock(struct device_node *np)
265/* 265/*
266 * Setup the local clock events for a CPU. 266 * Setup the local clock events for a CPU.
267 */ 267 */
268static int __cpuinit twd_timer_setup(struct clock_event_device *clk) 268static int twd_timer_setup(struct clock_event_device *clk)
269{ 269{
270 struct clock_event_device **this_cpu_clk; 270 struct clock_event_device **this_cpu_clk;
271 int cpu = smp_processor_id(); 271 int cpu = smp_processor_id();
@@ -308,7 +308,7 @@ static int __cpuinit twd_timer_setup(struct clock_event_device *clk)
308 return 0; 308 return 0;
309} 309}
310 310
311static struct local_timer_ops twd_lt_ops __cpuinitdata = { 311static struct local_timer_ops twd_lt_ops = {
312 .setup = twd_timer_setup, 312 .setup = twd_timer_setup,
313 .stop = twd_timer_stop, 313 .stop = twd_timer_stop,
314}; 314};
diff --git a/arch/arm/lib/delay.c b/arch/arm/lib/delay.c
index 64dbfa57204a..5306de350133 100644
--- a/arch/arm/lib/delay.c
+++ b/arch/arm/lib/delay.c
@@ -86,7 +86,7 @@ void __init register_current_timer_delay(const struct delay_timer *timer)
86 } 86 }
87} 87}
88 88
89unsigned long __cpuinit calibrate_delay_is_known(void) 89unsigned long calibrate_delay_is_known(void)
90{ 90{
91 delay_calibrated = true; 91 delay_calibrated = true;
92 return lpj_fine; 92 return lpj_fine;
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index afbc439f11d4..4cdb61c54459 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -505,7 +505,7 @@ static struct vpbe_output dm365evm_vpbe_outputs[] = {
505/* 505/*
506 * Amplifiers on the board 506 * Amplifiers on the board
507 */ 507 */
508struct ths7303_platform_data ths7303_pdata = { 508static struct ths7303_platform_data ths7303_pdata = {
509 .ch_1 = 3, 509 .ch_1 = 3,
510 .ch_2 = 3, 510 .ch_2 = 3,
511 .ch_3 = 3, 511 .ch_3 = 3,
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 42ef53f62c6c..86100d179694 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -860,7 +860,7 @@ static struct platform_device dm355_vpbe_display = {
860 }, 860 },
861}; 861};
862 862
863struct venc_platform_data dm355_venc_pdata = { 863static struct venc_platform_data dm355_venc_pdata = {
864 .setup_pinmux = dm355_vpbe_setup_pinmux, 864 .setup_pinmux = dm355_vpbe_setup_pinmux,
865 .setup_clock = dm355_venc_setup_clock, 865 .setup_clock = dm355_venc_setup_clock,
866}; 866};
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index fa7af5eda52d..dad28029ba9b 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1349,7 +1349,7 @@ static struct platform_device dm365_vpbe_display = {
1349 }, 1349 },
1350}; 1350};
1351 1351
1352struct venc_platform_data dm365_venc_pdata = { 1352static struct venc_platform_data dm365_venc_pdata = {
1353 .setup_pinmux = dm365_vpbe_setup_pinmux, 1353 .setup_pinmux = dm365_vpbe_setup_pinmux,
1354 .setup_clock = dm365_venc_setup_clock, 1354 .setup_clock = dm365_venc_setup_clock,
1355}; 1355};
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 855d4a7b462d..5952e68c76c4 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -92,6 +92,7 @@ config SOC_EXYNOS5440
92 bool "SAMSUNG EXYNOS5440" 92 bool "SAMSUNG EXYNOS5440"
93 default y 93 default y
94 depends on ARCH_EXYNOS5 94 depends on ARCH_EXYNOS5
95 select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
95 select ARCH_HAS_OPP 96 select ARCH_HAS_OPP
96 select HAVE_ARM_ARCH_TIMER 97 select HAVE_ARM_ARCH_TIMER
97 select AUTO_ZRELADDR 98 select AUTO_ZRELADDR
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index e970a7a4e278..53696154aead 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -14,7 +14,7 @@ obj- :=
14 14
15obj-$(CONFIG_ARCH_EXYNOS) += common.o 15obj-$(CONFIG_ARCH_EXYNOS) += common.o
16 16
17obj-$(CONFIG_PM) += pm.o 17obj-$(CONFIG_S5P_PM) += pm.o
18obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o 18obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
19obj-$(CONFIG_CPU_IDLE) += cpuidle.o 19obj-$(CONFIG_CPU_IDLE) += cpuidle.o
20 20
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 164685bd25c8..ba95e5db2501 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -58,7 +58,6 @@ static const char name_exynos5440[] = "EXYNOS5440";
58 58
59static void exynos4_map_io(void); 59static void exynos4_map_io(void);
60static void exynos5_map_io(void); 60static void exynos5_map_io(void);
61static void exynos5440_map_io(void);
62static int exynos_init(void); 61static int exynos_init(void);
63 62
64static struct cpu_table cpu_ids[] __initdata = { 63static struct cpu_table cpu_ids[] __initdata = {
@@ -95,7 +94,6 @@ static struct cpu_table cpu_ids[] __initdata = {
95 }, { 94 }, {
96 .idcode = EXYNOS5440_SOC_ID, 95 .idcode = EXYNOS5440_SOC_ID,
97 .idmask = EXYNOS5_SOC_MASK, 96 .idmask = EXYNOS5_SOC_MASK,
98 .map_io = exynos5440_map_io,
99 .init = exynos_init, 97 .init = exynos_init,
100 .name = name_exynos5440, 98 .name = name_exynos5440,
101 }, 99 },
@@ -150,11 +148,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
150 .length = SZ_64K, 148 .length = SZ_64K,
151 .type = MT_DEVICE, 149 .type = MT_DEVICE,
152 }, { 150 }, {
153 .virtual = (unsigned long)S3C_VA_UART,
154 .pfn = __phys_to_pfn(EXYNOS4_PA_UART),
155 .length = SZ_512K,
156 .type = MT_DEVICE,
157 }, {
158 .virtual = (unsigned long)S5P_VA_CMU, 151 .virtual = (unsigned long)S5P_VA_CMU,
159 .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), 152 .pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
160 .length = SZ_128K, 153 .length = SZ_128K,
@@ -268,20 +261,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
268 .pfn = __phys_to_pfn(EXYNOS5_PA_PMU), 261 .pfn = __phys_to_pfn(EXYNOS5_PA_PMU),
269 .length = SZ_64K, 262 .length = SZ_64K,
270 .type = MT_DEVICE, 263 .type = MT_DEVICE,
271 }, {
272 .virtual = (unsigned long)S3C_VA_UART,
273 .pfn = __phys_to_pfn(EXYNOS5_PA_UART),
274 .length = SZ_512K,
275 .type = MT_DEVICE,
276 },
277};
278
279static struct map_desc exynos5440_iodesc0[] __initdata = {
280 {
281 .virtual = (unsigned long)S3C_VA_UART,
282 .pfn = __phys_to_pfn(EXYNOS5440_PA_UART0),
283 .length = SZ_512K,
284 .type = MT_DEVICE,
285 }, 264 },
286}; 265};
287 266
@@ -388,11 +367,6 @@ static void __init exynos5_map_io(void)
388 iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc)); 367 iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
389} 368}
390 369
391static void __init exynos5440_map_io(void)
392{
393 iotable_init(exynos5440_iodesc0, ARRAY_SIZE(exynos5440_iodesc0));
394}
395
396void __init exynos_init_time(void) 370void __init exynos_init_time(void)
397{ 371{
398 of_clk_init(NULL); 372 of_clk_init(NULL);
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 3e156bcddcb4..972490fc09d6 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -97,6 +97,5 @@ struct exynos_pmu_conf {
97}; 97};
98 98
99extern void exynos_sys_powerdown_conf(enum sys_powerdown mode); 99extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
100extern void s3c_cpu_resume(void);
101 100
102#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */ 101#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index 17a18ff3d71e..225ee8431c72 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -25,6 +25,7 @@
25#include <mach/regs-pmu.h> 25#include <mach/regs-pmu.h>
26 26
27#include <plat/cpu.h> 27#include <plat/cpu.h>
28#include <plat/pm.h>
28 29
29#include "common.h" 30#include "common.h"
30 31
diff --git a/arch/arm/mach-exynos/headsmp.S b/arch/arm/mach-exynos/headsmp.S
index 5364d4bfa8bc..cdd9d91e9933 100644
--- a/arch/arm/mach-exynos/headsmp.S
+++ b/arch/arm/mach-exynos/headsmp.S
@@ -13,8 +13,6 @@
13#include <linux/linkage.h> 13#include <linux/linkage.h>
14#include <linux/init.h> 14#include <linux/init.h>
15 15
16 __CPUINIT
17
18/* 16/*
19 * exynos4 specific entry point for secondary CPUs. This provides 17 * exynos4 specific entry point for secondary CPUs. This provides
20 * a "holding pen" into which all secondary cores are held until we're 18 * a "holding pen" into which all secondary cores are held until we're
diff --git a/arch/arm/mach-exynos/include/mach/memory.h b/arch/arm/mach-exynos/include/mach/memory.h
index 374ef2cf7152..2a4cdb7cb326 100644
--- a/arch/arm/mach-exynos/include/mach/memory.h
+++ b/arch/arm/mach-exynos/include/mach/memory.h
@@ -15,8 +15,13 @@
15 15
16#define PLAT_PHYS_OFFSET UL(0x40000000) 16#define PLAT_PHYS_OFFSET UL(0x40000000)
17 17
18#ifndef CONFIG_ARM_LPAE
18/* Maximum of 256MiB in one bank */ 19/* Maximum of 256MiB in one bank */
19#define MAX_PHYSMEM_BITS 32 20#define MAX_PHYSMEM_BITS 32
20#define SECTION_SIZE_BITS 28 21#define SECTION_SIZE_BITS 28
22#else
23#define MAX_PHYSMEM_BITS 36
24#define SECTION_SIZE_BITS 31
25#endif
21 26
22#endif /* __ASM_ARCH_MEMORY_H */ 27#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index deba1308ff16..58b43e6f9262 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -75,7 +75,7 @@ static void __iomem *scu_base_addr(void)
75 75
76static DEFINE_SPINLOCK(boot_lock); 76static DEFINE_SPINLOCK(boot_lock);
77 77
78static void __cpuinit exynos_secondary_init(unsigned int cpu) 78static void exynos_secondary_init(unsigned int cpu)
79{ 79{
80 /* 80 /*
81 * let the primary processor know we're out of the 81 * let the primary processor know we're out of the
@@ -90,7 +90,7 @@ static void __cpuinit exynos_secondary_init(unsigned int cpu)
90 spin_unlock(&boot_lock); 90 spin_unlock(&boot_lock);
91} 91}
92 92
93static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) 93static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
94{ 94{
95 unsigned long timeout; 95 unsigned long timeout;
96 unsigned long phys_cpu = cpu_logical_map(cpu); 96 unsigned long phys_cpu = cpu_logical_map(cpu);
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 41c20692a13f..c679db577269 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -217,6 +217,9 @@ static __init int exynos_pm_drvinit(void)
217 struct clk *pll_base; 217 struct clk *pll_base;
218 unsigned int tmp; 218 unsigned int tmp;
219 219
220 if (soc_is_exynos5440())
221 return 0;
222
220 s3c_pm_init(); 223 s3c_pm_init();
221 224
222 /* All wakeup disable */ 225 /* All wakeup disable */
@@ -340,6 +343,9 @@ static struct syscore_ops exynos_pm_syscore_ops = {
340 343
341static __init int exynos_pm_syscore_init(void) 344static __init int exynos_pm_syscore_init(void)
342{ 345{
346 if (soc_is_exynos5440())
347 return 0;
348
343 register_syscore_ops(&exynos_pm_syscore_ops); 349 register_syscore_ops(&exynos_pm_syscore_ops);
344 return 0; 350 return 0;
345} 351}
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index a7cd2cf5e08d..3490a24f969e 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -276,8 +276,6 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys)
276 276
277 sys->mem_offset = DC21285_PCI_MEM; 277 sys->mem_offset = DC21285_PCI_MEM;
278 278
279 pci_ioremap_io(0, DC21285_PCI_IO);
280
281 pci_add_resource_offset(&sys->resources, &res[0], sys->mem_offset); 279 pci_add_resource_offset(&sys->resources, &res[0], sys->mem_offset);
282 pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset); 280 pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
283 281
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index dc5d6becd8c7..88815795fe26 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -115,6 +115,7 @@ static int highbank_platform_notifier(struct notifier_block *nb,
115{ 115{
116 struct resource *res; 116 struct resource *res;
117 int reg = -1; 117 int reg = -1;
118 u32 val;
118 struct device *dev = __dev; 119 struct device *dev = __dev;
119 120
120 if (event != BUS_NOTIFY_ADD_DEVICE) 121 if (event != BUS_NOTIFY_ADD_DEVICE)
@@ -141,10 +142,10 @@ static int highbank_platform_notifier(struct notifier_block *nb,
141 return NOTIFY_DONE; 142 return NOTIFY_DONE;
142 143
143 if (of_property_read_bool(dev->of_node, "dma-coherent")) { 144 if (of_property_read_bool(dev->of_node, "dma-coherent")) {
144 writel(0xff31, sregs_base + reg); 145 val = readl(sregs_base + reg);
146 writel(val | 0xff01, sregs_base + reg);
145 set_dma_ops(dev, &arm_coherent_dma_ops); 147 set_dma_ops(dev, &arm_coherent_dma_ops);
146 } else 148 }
147 writel(0, sregs_base + reg);
148 149
149 return NOTIFY_OK; 150 return NOTIFY_OK;
150} 151}
diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c
index a984573e0d02..32d75cf55cbc 100644
--- a/arch/arm/mach-highbank/platsmp.c
+++ b/arch/arm/mach-highbank/platsmp.c
@@ -24,7 +24,7 @@
24 24
25extern void secondary_startup(void); 25extern void secondary_startup(void);
26 26
27static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle) 27static int highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
28{ 28{
29 highbank_set_cpu_jump(cpu, secondary_startup); 29 highbank_set_cpu_jump(cpu, secondary_startup);
30 arch_send_wakeup_ipi_mask(cpumask_of(cpu)); 30 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 4282e99f5ca1..86567d980b07 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -199,7 +199,8 @@ static const char *pcie_axi_sels[] = { "axi", "ahb", };
199static const char *ssi_sels[] = { "pll3_pfd2_508m", "pll3_pfd3_454m", "pll4_post_div", }; 199static const char *ssi_sels[] = { "pll3_pfd2_508m", "pll3_pfd3_454m", "pll4_post_div", };
200static const char *usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", }; 200static const char *usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", };
201static const char *enfc_sels[] = { "pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", }; 201static const char *enfc_sels[] = { "pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", };
202static const char *emi_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd2_396m", "pll2_pfd0_352m", }; 202static const char *emi_sels[] = { "pll2_pfd2_396m", "pll3_usb_otg", "axi", "pll2_pfd0_352m", };
203static const char *emi_slow_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd2_396m", "pll2_pfd0_352m", };
203static const char *vdo_axi_sels[] = { "axi", "ahb", }; 204static const char *vdo_axi_sels[] = { "axi", "ahb", };
204static const char *vpu_axi_sels[] = { "axi", "pll2_pfd2_396m", "pll2_pfd0_352m", }; 205static const char *vpu_axi_sels[] = { "axi", "pll2_pfd2_396m", "pll2_pfd0_352m", };
205static const char *cko1_sels[] = { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5_video_div", 206static const char *cko1_sels[] = { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5_video_div",
@@ -392,7 +393,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
392 clk[usdhc4_sel] = imx_clk_mux("usdhc4_sel", base + 0x1c, 19, 1, usdhc_sels, ARRAY_SIZE(usdhc_sels)); 393 clk[usdhc4_sel] = imx_clk_mux("usdhc4_sel", base + 0x1c, 19, 1, usdhc_sels, ARRAY_SIZE(usdhc_sels));
393 clk[enfc_sel] = imx_clk_mux("enfc_sel", base + 0x2c, 16, 2, enfc_sels, ARRAY_SIZE(enfc_sels)); 394 clk[enfc_sel] = imx_clk_mux("enfc_sel", base + 0x2c, 16, 2, enfc_sels, ARRAY_SIZE(enfc_sels));
394 clk[emi_sel] = imx_clk_mux("emi_sel", base + 0x1c, 27, 2, emi_sels, ARRAY_SIZE(emi_sels)); 395 clk[emi_sel] = imx_clk_mux("emi_sel", base + 0x1c, 27, 2, emi_sels, ARRAY_SIZE(emi_sels));
395 clk[emi_slow_sel] = imx_clk_mux("emi_slow_sel", base + 0x1c, 29, 2, emi_sels, ARRAY_SIZE(emi_sels)); 396 clk[emi_slow_sel] = imx_clk_mux("emi_slow_sel", base + 0x1c, 29, 2, emi_slow_sels, ARRAY_SIZE(emi_slow_sels));
396 clk[vdo_axi_sel] = imx_clk_mux("vdo_axi_sel", base + 0x18, 11, 1, vdo_axi_sels, ARRAY_SIZE(vdo_axi_sels)); 397 clk[vdo_axi_sel] = imx_clk_mux("vdo_axi_sel", base + 0x18, 11, 1, vdo_axi_sels, ARRAY_SIZE(vdo_axi_sels));
397 clk[vpu_axi_sel] = imx_clk_mux("vpu_axi_sel", base + 0x18, 14, 2, vpu_axi_sels, ARRAY_SIZE(vpu_axi_sels)); 398 clk[vpu_axi_sel] = imx_clk_mux("vpu_axi_sel", base + 0x18, 14, 2, vpu_axi_sels, ARRAY_SIZE(vpu_axi_sels));
398 clk[cko1_sel] = imx_clk_mux("cko1_sel", base + 0x60, 0, 4, cko1_sels, ARRAY_SIZE(cko1_sels)); 399 clk[cko1_sel] = imx_clk_mux("cko1_sel", base + 0x60, 0, 4, cko1_sels, ARRAY_SIZE(cko1_sels));
diff --git a/arch/arm/mach-imx/clk-vf610.c b/arch/arm/mach-imx/clk-vf610.c
index d617c0b7c809..b169a396d93b 100644
--- a/arch/arm/mach-imx/clk-vf610.c
+++ b/arch/arm/mach-imx/clk-vf610.c
@@ -183,6 +183,8 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
183 clk[VF610_CLK_ENET_TS_SEL] = imx_clk_mux("enet_ts_sel", CCM_CSCMR2, 0, 3, enet_ts_sels, 7); 183 clk[VF610_CLK_ENET_TS_SEL] = imx_clk_mux("enet_ts_sel", CCM_CSCMR2, 0, 3, enet_ts_sels, 7);
184 clk[VF610_CLK_ENET] = imx_clk_gate("enet", "enet_sel", CCM_CSCDR1, 24); 184 clk[VF610_CLK_ENET] = imx_clk_gate("enet", "enet_sel", CCM_CSCDR1, 24);
185 clk[VF610_CLK_ENET_TS] = imx_clk_gate("enet_ts", "enet_ts_sel", CCM_CSCDR1, 23); 185 clk[VF610_CLK_ENET_TS] = imx_clk_gate("enet_ts", "enet_ts_sel", CCM_CSCDR1, 23);
186 clk[VF610_CLK_ENET0] = imx_clk_gate2("enet0", "ipg_bus", CCM_CCGR9, CCM_CCGRx_CGn(0));
187 clk[VF610_CLK_ENET1] = imx_clk_gate2("enet1", "ipg_bus", CCM_CCGR9, CCM_CCGRx_CGn(1));
186 188
187 clk[VF610_CLK_PIT] = imx_clk_gate2("pit", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(7)); 189 clk[VF610_CLK_PIT] = imx_clk_gate2("pit", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(7));
188 190
diff --git a/arch/arm/mach-imx/mx27.h b/arch/arm/mach-imx/mx27.h
index e074616d54ca..8a65f192e7f3 100644
--- a/arch/arm/mach-imx/mx27.h
+++ b/arch/arm/mach-imx/mx27.h
@@ -135,7 +135,7 @@
135#define MX27_INT_GPT4 (NR_IRQS_LEGACY + 4) 135#define MX27_INT_GPT4 (NR_IRQS_LEGACY + 4)
136#define MX27_INT_RTIC (NR_IRQS_LEGACY + 5) 136#define MX27_INT_RTIC (NR_IRQS_LEGACY + 5)
137#define MX27_INT_CSPI3 (NR_IRQS_LEGACY + 6) 137#define MX27_INT_CSPI3 (NR_IRQS_LEGACY + 6)
138#define MX27_INT_SDHC (NR_IRQS_LEGACY + 7) 138#define MX27_INT_MSHC (NR_IRQS_LEGACY + 7)
139#define MX27_INT_GPIO (NR_IRQS_LEGACY + 8) 139#define MX27_INT_GPIO (NR_IRQS_LEGACY + 8)
140#define MX27_INT_SDHC3 (NR_IRQS_LEGACY + 9) 140#define MX27_INT_SDHC3 (NR_IRQS_LEGACY + 9)
141#define MX27_INT_SDHC2 (NR_IRQS_LEGACY + 10) 141#define MX27_INT_SDHC2 (NR_IRQS_LEGACY + 10)
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index c6e1ab544882..1f24c1fdfea4 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -53,7 +53,7 @@ void imx_scu_standby_enable(void)
53 writel_relaxed(val, scu_base); 53 writel_relaxed(val, scu_base);
54} 54}
55 55
56static int __cpuinit imx_boot_secondary(unsigned int cpu, struct task_struct *idle) 56static int imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
57{ 57{
58 imx_set_cpu_jump(cpu, v7_secondary_startup); 58 imx_set_cpu_jump(cpu, v7_secondary_startup);
59 imx_enable_cpu(cpu, true); 59 imx_enable_cpu(cpu, true);
diff --git a/arch/arm/mach-keystone/keystone.c b/arch/arm/mach-keystone/keystone.c
index fe4d9ff93a7e..b661c5c2870a 100644
--- a/arch/arm/mach-keystone/keystone.c
+++ b/arch/arm/mach-keystone/keystone.c
@@ -49,7 +49,7 @@ static const char *keystone_match[] __initconst = {
49 NULL, 49 NULL,
50}; 50};
51 51
52void keystone_restart(char mode, const char *cmd) 52void keystone_restart(enum reboot_mode mode, const char *cmd)
53{ 53{
54 u32 val; 54 u32 val;
55 55
diff --git a/arch/arm/mach-keystone/platsmp.c b/arch/arm/mach-keystone/platsmp.c
index 1d4181e1daf2..14378e3fef16 100644
--- a/arch/arm/mach-keystone/platsmp.c
+++ b/arch/arm/mach-keystone/platsmp.c
@@ -21,7 +21,7 @@
21 21
22#include "keystone.h" 22#include "keystone.h"
23 23
24static int __cpuinit keystone_smp_boot_secondary(unsigned int cpu, 24static int keystone_smp_boot_secondary(unsigned int cpu,
25 struct task_struct *idle) 25 struct task_struct *idle)
26{ 26{
27 unsigned long start = virt_to_phys(&secondary_startup); 27 unsigned long start = virt_to_phys(&secondary_startup);
diff --git a/arch/arm/mach-msm/headsmp.S b/arch/arm/mach-msm/headsmp.S
index bcd5af223dea..6c62c3f82fe6 100644
--- a/arch/arm/mach-msm/headsmp.S
+++ b/arch/arm/mach-msm/headsmp.S
@@ -11,8 +11,6 @@
11#include <linux/linkage.h> 11#include <linux/linkage.h>
12#include <linux/init.h> 12#include <linux/init.h>
13 13
14 __CPUINIT
15
16/* 14/*
17 * MSM specific entry point for secondary CPUs. This provides 15 * MSM specific entry point for secondary CPUs. This provides
18 * a "holding pen" into which all secondary cores are held until we're 16 * a "holding pen" into which all secondary cores are held until we're
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 00cdb0a5dac8..3f06edcdd0ce 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -38,7 +38,7 @@ static inline int get_core_count(void)
38 return ((read_cpuid_id() >> 4) & 3) + 1; 38 return ((read_cpuid_id() >> 4) & 3) + 1;
39} 39}
40 40
41static void __cpuinit msm_secondary_init(unsigned int cpu) 41static void msm_secondary_init(unsigned int cpu)
42{ 42{
43 /* 43 /*
44 * let the primary processor know we're out of the 44 * let the primary processor know we're out of the
@@ -54,7 +54,7 @@ static void __cpuinit msm_secondary_init(unsigned int cpu)
54 spin_unlock(&boot_lock); 54 spin_unlock(&boot_lock);
55} 55}
56 56
57static __cpuinit void prepare_cold_cpu(unsigned int cpu) 57static void prepare_cold_cpu(unsigned int cpu)
58{ 58{
59 int ret; 59 int ret;
60 ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup), 60 ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup),
@@ -73,7 +73,7 @@ static __cpuinit void prepare_cold_cpu(unsigned int cpu)
73 "address\n"); 73 "address\n");
74} 74}
75 75
76static int __cpuinit msm_boot_secondary(unsigned int cpu, struct task_struct *idle) 76static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
77{ 77{
78 unsigned long timeout; 78 unsigned long timeout;
79 static int cold_boot_done; 79 static int cold_boot_done;
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index b6418fd5fe0d..8697cfc0d0b6 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -139,7 +139,7 @@ static struct clocksource msm_clocksource = {
139}; 139};
140 140
141#ifdef CONFIG_LOCAL_TIMERS 141#ifdef CONFIG_LOCAL_TIMERS
142static int __cpuinit msm_local_timer_setup(struct clock_event_device *evt) 142static int msm_local_timer_setup(struct clock_event_device *evt)
143{ 143{
144 /* Use existing clock_event for cpu 0 */ 144 /* Use existing clock_event for cpu 0 */
145 if (!smp_processor_id()) 145 if (!smp_processor_id())
@@ -164,7 +164,7 @@ static void msm_local_timer_stop(struct clock_event_device *evt)
164 disable_percpu_irq(evt->irq); 164 disable_percpu_irq(evt->irq);
165} 165}
166 166
167static struct local_timer_ops msm_local_timer_ops __cpuinitdata = { 167static struct local_timer_ops msm_local_timer_ops = {
168 .setup = msm_local_timer_setup, 168 .setup = msm_local_timer_setup,
169 .stop = msm_local_timer_stop, 169 .stop = msm_local_timer_stop,
170}; 170};
diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c
index be117591f7f2..4c24303ec481 100644
--- a/arch/arm/mach-mvebu/coherency.c
+++ b/arch/arm/mach-mvebu/coherency.c
@@ -28,7 +28,7 @@
28#include <asm/cacheflush.h> 28#include <asm/cacheflush.h>
29#include "armada-370-xp.h" 29#include "armada-370-xp.h"
30 30
31unsigned long __cpuinitdata coherency_phys_base; 31unsigned long coherency_phys_base;
32static void __iomem *coherency_base; 32static void __iomem *coherency_base;
33static void __iomem *coherency_cpu_base; 33static void __iomem *coherency_cpu_base;
34 34
diff --git a/arch/arm/mach-mvebu/headsmp.S b/arch/arm/mach-mvebu/headsmp.S
index 7147300c8af2..8a1b0c96e9ec 100644
--- a/arch/arm/mach-mvebu/headsmp.S
+++ b/arch/arm/mach-mvebu/headsmp.S
@@ -21,8 +21,6 @@
21#include <linux/linkage.h> 21#include <linux/linkage.h>
22#include <linux/init.h> 22#include <linux/init.h>
23 23
24 __CPUINIT
25
26/* 24/*
27 * Armada XP specific entry point for secondary CPUs. 25 * Armada XP specific entry point for secondary CPUs.
28 * We add the CPU to the coherency fabric and then jump to secondary 26 * We add the CPU to the coherency fabric and then jump to secondary
diff --git a/arch/arm/mach-mvebu/platsmp.c b/arch/arm/mach-mvebu/platsmp.c
index 93f2f3ab45f1..ce81d3031405 100644
--- a/arch/arm/mach-mvebu/platsmp.c
+++ b/arch/arm/mach-mvebu/platsmp.c
@@ -71,13 +71,12 @@ void __init set_secondary_cpus_clock(void)
71 } 71 }
72} 72}
73 73
74static void __cpuinit armada_xp_secondary_init(unsigned int cpu) 74static void armada_xp_secondary_init(unsigned int cpu)
75{ 75{
76 armada_xp_mpic_smp_cpu_init(); 76 armada_xp_mpic_smp_cpu_init();
77} 77}
78 78
79static int __cpuinit armada_xp_boot_secondary(unsigned int cpu, 79static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle)
80 struct task_struct *idle)
81{ 80{
82 pr_info("Booting CPU %d\n", cpu); 81 pr_info("Booting CPU %d\n", cpu);
83 82
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 627fa7e41fba..3eed0006d189 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -62,7 +62,7 @@ config SOC_OMAP5
62 select HAVE_SMP 62 select HAVE_SMP
63 select COMMON_CLK 63 select COMMON_CLK
64 select HAVE_ARM_ARCH_TIMER 64 select HAVE_ARM_ARCH_TIMER
65 select ARM_ERRATA_798181 65 select ARM_ERRATA_798181 if SMP
66 66
67config SOC_AM33XX 67config SOC_AM33XX
68 bool "AM33XX support" 68 bool "AM33XX support"
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index e5fbfed69aa2..be5d005ebad2 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -15,6 +15,7 @@
15#include <linux/of_irq.h> 15#include <linux/of_irq.h>
16#include <linux/of_platform.h> 16#include <linux/of_platform.h>
17#include <linux/irqdomain.h> 17#include <linux/irqdomain.h>
18#include <linux/clk.h>
18 19
19#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
20 21
@@ -35,6 +36,21 @@ static struct of_device_id omap_dt_match_table[] __initdata = {
35 { } 36 { }
36}; 37};
37 38
39/*
40 * Create alias for USB host PHY clock.
41 * Remove this when clock phandle can be provided via DT
42 */
43static void __init legacy_init_ehci_clk(char *clkname)
44{
45 int ret;
46
47 ret = clk_add_alias("main_clk", NULL, clkname, NULL);
48 if (ret) {
49 pr_err("%s:Failed to add main_clk alias to %s :%d\n",
50 __func__, clkname, ret);
51 }
52}
53
38static void __init omap_generic_init(void) 54static void __init omap_generic_init(void)
39{ 55{
40 omap_sdrc_init(NULL, NULL); 56 omap_sdrc_init(NULL, NULL);
@@ -45,10 +61,15 @@ static void __init omap_generic_init(void)
45 * HACK: call display setup code for selected boards to enable omapdss. 61 * HACK: call display setup code for selected boards to enable omapdss.
46 * This will be removed when omapdss supports DT. 62 * This will be removed when omapdss supports DT.
47 */ 63 */
48 if (of_machine_is_compatible("ti,omap4-panda")) 64 if (of_machine_is_compatible("ti,omap4-panda")) {
49 omap4_panda_display_init_of(); 65 omap4_panda_display_init_of();
66 legacy_init_ehci_clk("auxclk3_ck");
67
68 }
50 else if (of_machine_is_compatible("ti,omap4-sdp")) 69 else if (of_machine_is_compatible("ti,omap4-sdp"))
51 omap_4430sdp_display_init_of(); 70 omap_4430sdp_display_init_of();
71 else if (of_machine_is_compatible("ti,omap5-uevm"))
72 legacy_init_ehci_clk("auxclk1_ck");
52} 73}
53 74
54#ifdef CONFIG_SOC_OMAP2420 75#ifdef CONFIG_SOC_OMAP2420
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index 4ea308114165..75e92952c18e 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -20,8 +20,6 @@
20 20
21#include "omap44xx.h" 21#include "omap44xx.h"
22 22
23 __CPUINIT
24
25/* Physical address needed since MMU not enabled yet on secondary core */ 23/* Physical address needed since MMU not enabled yet on secondary core */
26#define AUX_CORE_BOOT0_PA 0x48281800 24#define AUX_CORE_BOOT0_PA 0x48281800
27 25
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index f993a4188701..f991016e2a6a 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -291,7 +291,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
291 * @cpu : CPU ID 291 * @cpu : CPU ID
292 * @power_state: CPU low power state. 292 * @power_state: CPU low power state.
293 */ 293 */
294int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state) 294int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
295{ 295{
296 struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu); 296 struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu);
297 unsigned int cpu_state = 0; 297 unsigned int cpu_state = 0;
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 98a11463a843..8708b2a9da45 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -51,7 +51,7 @@ void __iomem *omap4_get_scu_base(void)
51 return scu_base; 51 return scu_base;
52} 52}
53 53
54static void __cpuinit omap4_secondary_init(unsigned int cpu) 54static void omap4_secondary_init(unsigned int cpu)
55{ 55{
56 /* 56 /*
57 * Configure ACTRL and enable NS SMP bit access on CPU1 on HS device. 57 * Configure ACTRL and enable NS SMP bit access on CPU1 on HS device.
@@ -72,7 +72,7 @@ static void __cpuinit omap4_secondary_init(unsigned int cpu)
72 spin_unlock(&boot_lock); 72 spin_unlock(&boot_lock);
73} 73}
74 74
75static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct *idle) 75static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
76{ 76{
77 static struct clockdomain *cpu1_clkdm; 77 static struct clockdomain *cpu1_clkdm;
78 static bool booted; 78 static bool booted;
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index f8bb3b9b6a76..813c61558a5f 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -323,8 +323,8 @@ static void irq_save_secure_context(void)
323#endif 323#endif
324 324
325#ifdef CONFIG_HOTPLUG_CPU 325#ifdef CONFIG_HOTPLUG_CPU
326static int __cpuinit irq_cpu_hotplug_notify(struct notifier_block *self, 326static int irq_cpu_hotplug_notify(struct notifier_block *self,
327 unsigned long action, void *hcpu) 327 unsigned long action, void *hcpu)
328{ 328{
329 unsigned int cpu = (unsigned int)hcpu; 329 unsigned int cpu = (unsigned int)hcpu;
330 330
diff --git a/arch/arm/mach-prima2/headsmp.S b/arch/arm/mach-prima2/headsmp.S
index 5b8a408d8921..d86fe33c5f53 100644
--- a/arch/arm/mach-prima2/headsmp.S
+++ b/arch/arm/mach-prima2/headsmp.S
@@ -9,8 +9,6 @@
9#include <linux/linkage.h> 9#include <linux/linkage.h>
10#include <linux/init.h> 10#include <linux/init.h>
11 11
12 __CPUINIT
13
14/* 12/*
15 * SIRFSOC specific entry point for secondary CPUs. This provides 13 * SIRFSOC specific entry point for secondary CPUs. This provides
16 * a "holding pen" into which all secondary cores are held until we're 14 * a "holding pen" into which all secondary cores are held until we're
diff --git a/arch/arm/mach-prima2/platsmp.c b/arch/arm/mach-prima2/platsmp.c
index 1c3de7bed841..3dbcb1ab6e37 100644
--- a/arch/arm/mach-prima2/platsmp.c
+++ b/arch/arm/mach-prima2/platsmp.c
@@ -44,7 +44,7 @@ void __init sirfsoc_map_scu(void)
44 scu_base = (void __iomem *)SIRFSOC_VA(base); 44 scu_base = (void __iomem *)SIRFSOC_VA(base);
45} 45}
46 46
47static void __cpuinit sirfsoc_secondary_init(unsigned int cpu) 47static void sirfsoc_secondary_init(unsigned int cpu)
48{ 48{
49 /* 49 /*
50 * let the primary processor know we're out of the 50 * let the primary processor know we're out of the
@@ -65,7 +65,7 @@ static struct of_device_id rsc_ids[] = {
65 {}, 65 {},
66}; 66};
67 67
68static int __cpuinit sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle) 68static int sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle)
69{ 69{
70 unsigned long timeout; 70 unsigned long timeout;
71 struct device_node *np; 71 struct device_node *np;
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index f6726bb4eb95..3a3362fa793e 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -477,16 +477,24 @@ static int em_x270_usb_hub_init(void)
477 /* USB Hub power-on and reset */ 477 /* USB Hub power-on and reset */
478 gpio_direction_output(usb_hub_reset, 1); 478 gpio_direction_output(usb_hub_reset, 1);
479 gpio_direction_output(GPIO9_USB_VBUS_EN, 0); 479 gpio_direction_output(GPIO9_USB_VBUS_EN, 0);
480 regulator_enable(em_x270_usb_ldo); 480 err = regulator_enable(em_x270_usb_ldo);
481 if (err)
482 goto err_free_rst_gpio;
483
481 gpio_set_value(usb_hub_reset, 0); 484 gpio_set_value(usb_hub_reset, 0);
482 gpio_set_value(usb_hub_reset, 1); 485 gpio_set_value(usb_hub_reset, 1);
483 regulator_disable(em_x270_usb_ldo); 486 regulator_disable(em_x270_usb_ldo);
484 regulator_enable(em_x270_usb_ldo); 487 err = regulator_enable(em_x270_usb_ldo);
488 if (err)
489 goto err_free_rst_gpio;
490
485 gpio_set_value(usb_hub_reset, 0); 491 gpio_set_value(usb_hub_reset, 0);
486 gpio_set_value(GPIO9_USB_VBUS_EN, 1); 492 gpio_set_value(GPIO9_USB_VBUS_EN, 1);
487 493
488 return 0; 494 return 0;
489 495
496err_free_rst_gpio:
497 gpio_free(usb_hub_reset);
490err_free_vbus_gpio: 498err_free_vbus_gpio:
491 gpio_free(GPIO9_USB_VBUS_EN); 499 gpio_free(GPIO9_USB_VBUS_EN);
492err_free_usb_ldo: 500err_free_usb_ldo:
@@ -592,7 +600,7 @@ err_irq:
592 return err; 600 return err;
593} 601}
594 602
595static void em_x270_mci_setpower(struct device *dev, unsigned int vdd) 603static int em_x270_mci_setpower(struct device *dev, unsigned int vdd)
596{ 604{
597 struct pxamci_platform_data* p_d = dev->platform_data; 605 struct pxamci_platform_data* p_d = dev->platform_data;
598 606
@@ -600,10 +608,11 @@ static void em_x270_mci_setpower(struct device *dev, unsigned int vdd)
600 int vdd_uV = (2000 + (vdd - __ffs(MMC_VDD_20_21)) * 100) * 1000; 608 int vdd_uV = (2000 + (vdd - __ffs(MMC_VDD_20_21)) * 100) * 1000;
601 609
602 regulator_set_voltage(em_x270_sdio_ldo, vdd_uV, vdd_uV); 610 regulator_set_voltage(em_x270_sdio_ldo, vdd_uV, vdd_uV);
603 regulator_enable(em_x270_sdio_ldo); 611 return regulator_enable(em_x270_sdio_ldo);
604 } else { 612 } else {
605 regulator_disable(em_x270_sdio_ldo); 613 regulator_disable(em_x270_sdio_ldo);
606 } 614 }
615 return 0;
607} 616}
608 617
609static void em_x270_mci_exit(struct device *dev, void *data) 618static void em_x270_mci_exit(struct device *dev, void *data)
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index d2c652318376..dd70343c8708 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -408,7 +408,7 @@ static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_in
408 return err; 408 return err;
409} 409}
410 410
411static void mainstone_mci_setpower(struct device *dev, unsigned int vdd) 411static int mainstone_mci_setpower(struct device *dev, unsigned int vdd)
412{ 412{
413 struct pxamci_platform_data* p_d = dev->platform_data; 413 struct pxamci_platform_data* p_d = dev->platform_data;
414 414
@@ -420,6 +420,7 @@ static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
420 printk(KERN_DEBUG "%s: off\n", __func__); 420 printk(KERN_DEBUG "%s: off\n", __func__);
421 MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON; 421 MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
422 } 422 }
423 return 0;
423} 424}
424 425
425static void mainstone_mci_exit(struct device *dev, void *data) 426static void mainstone_mci_exit(struct device *dev, void *data)
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index fb7f1d1627dc..13e5b00eae90 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -335,7 +335,7 @@ static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
335 return err; 335 return err;
336} 336}
337 337
338static void pcm990_mci_setpower(struct device *dev, unsigned int vdd) 338static int pcm990_mci_setpower(struct device *dev, unsigned int vdd)
339{ 339{
340 struct pxamci_platform_data *p_d = dev->platform_data; 340 struct pxamci_platform_data *p_d = dev->platform_data;
341 u8 val; 341 u8 val;
@@ -348,6 +348,7 @@ static void pcm990_mci_setpower(struct device *dev, unsigned int vdd)
348 val &= ~PCM990_CTRL_MMC2PWR; 348 val &= ~PCM990_CTRL_MMC2PWR;
349 349
350 pcm990_cpld_writeb(PCM990_CTRL_MMC2PWR, PCM990_CTRL_REG5); 350 pcm990_cpld_writeb(PCM990_CTRL_MMC2PWR, PCM990_CTRL_REG5);
351 return 0;
351} 352}
352 353
353static void pcm990_mci_exit(struct device *dev, void *data) 354static void pcm990_mci_exit(struct device *dev, void *data)
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 711d37e26bd8..aedf053a1de5 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -258,7 +258,7 @@ err_free_2:
258 return err; 258 return err;
259} 259}
260 260
261static void poodle_mci_setpower(struct device *dev, unsigned int vdd) 261static int poodle_mci_setpower(struct device *dev, unsigned int vdd)
262{ 262{
263 struct pxamci_platform_data* p_d = dev->platform_data; 263 struct pxamci_platform_data* p_d = dev->platform_data;
264 264
@@ -270,6 +270,8 @@ static void poodle_mci_setpower(struct device *dev, unsigned int vdd)
270 gpio_set_value(POODLE_GPIO_SD_PWR1, 0); 270 gpio_set_value(POODLE_GPIO_SD_PWR1, 0);
271 gpio_set_value(POODLE_GPIO_SD_PWR, 0); 271 gpio_set_value(POODLE_GPIO_SD_PWR, 0);
272 } 272 }
273
274 return 0;
273} 275}
274 276
275static void poodle_mci_exit(struct device *dev, void *data) 277static void poodle_mci_exit(struct device *dev, void *data)
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 2125df0444e7..4c29173026e8 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -598,7 +598,7 @@ static inline void spitz_spi_init(void) {}
598 * NOTE: The card detect interrupt isn't debounced so we delay it by 250ms to 598 * NOTE: The card detect interrupt isn't debounced so we delay it by 250ms to
599 * give the card a chance to fully insert/eject. 599 * give the card a chance to fully insert/eject.
600 */ 600 */
601static void spitz_mci_setpower(struct device *dev, unsigned int vdd) 601static int spitz_mci_setpower(struct device *dev, unsigned int vdd)
602{ 602{
603 struct pxamci_platform_data* p_d = dev->platform_data; 603 struct pxamci_platform_data* p_d = dev->platform_data;
604 604
@@ -606,6 +606,8 @@ static void spitz_mci_setpower(struct device *dev, unsigned int vdd)
606 spitz_card_pwr_ctrl(SCOOP_CPR_SD_3V, SCOOP_CPR_SD_3V); 606 spitz_card_pwr_ctrl(SCOOP_CPR_SD_3V, SCOOP_CPR_SD_3V);
607 else 607 else
608 spitz_card_pwr_ctrl(SCOOP_CPR_SD_3V, 0x0); 608 spitz_card_pwr_ctrl(SCOOP_CPR_SD_3V, 0x0);
609
610 return 0;
609} 611}
610 612
611static struct pxamci_platform_data spitz_mci_platform_data = { 613static struct pxamci_platform_data spitz_mci_platform_data = {
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 88fde43c948c..62aea3e835f3 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -734,9 +734,10 @@ static int stargate2_mci_init(struct device *dev,
734 * 734 *
735 * Very simple control. Either it is on or off and is controlled by 735 * Very simple control. Either it is on or off and is controlled by
736 * a gpio pin */ 736 * a gpio pin */
737static void stargate2_mci_setpower(struct device *dev, unsigned int vdd) 737static int stargate2_mci_setpower(struct device *dev, unsigned int vdd)
738{ 738{
739 gpio_set_value(SG2_SD_POWER_ENABLE, !!vdd); 739 gpio_set_value(SG2_SD_POWER_ENABLE, !!vdd);
740 return 0;
740} 741}
741 742
742static void stargate2_mci_exit(struct device *dev, void *data) 743static void stargate2_mci_exit(struct device *dev, void *data)
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 6d9252e081ce..7791ac76f945 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -208,7 +208,7 @@ config S3C24XX_GPIO_EXTRA128
208 208
209config S3C24XX_PLL 209config S3C24XX_PLL
210 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)" 210 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
211 depends on ARM_S3C24XX 211 depends on ARM_S3C24XX_CPUFREQ
212 help 212 help
213 Compile in support for changing the PLL frequency from the 213 Compile in support for changing the PLL frequency from the
214 S3C24XX series CPUfreq driver. The PLL takes time to settle 214 S3C24XX series CPUfreq driver. The PLL takes time to settle
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2410.c b/arch/arm/mach-s3c24xx/clock-s3c2410.c
index 34fffdf6fc1d..564553694b54 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2410.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2410.c
@@ -119,66 +119,101 @@ static struct clk init_clocks_off[] = {
119 } 119 }
120}; 120};
121 121
122static struct clk init_clocks[] = { 122static struct clk clk_lcd = {
123 { 123 .name = "lcd",
124 .name = "lcd", 124 .parent = &clk_h,
125 .parent = &clk_h, 125 .enable = s3c2410_clkcon_enable,
126 .enable = s3c2410_clkcon_enable, 126 .ctrlbit = S3C2410_CLKCON_LCDC,
127 .ctrlbit = S3C2410_CLKCON_LCDC, 127};
128 }, { 128
129 .name = "gpio", 129static struct clk clk_gpio = {
130 .parent = &clk_p, 130 .name = "gpio",
131 .enable = s3c2410_clkcon_enable, 131 .parent = &clk_p,
132 .ctrlbit = S3C2410_CLKCON_GPIO, 132 .enable = s3c2410_clkcon_enable,
133 }, { 133 .ctrlbit = S3C2410_CLKCON_GPIO,
134 .name = "usb-host", 134};
135 .parent = &clk_h, 135
136 .enable = s3c2410_clkcon_enable, 136static struct clk clk_usb_host = {
137 .ctrlbit = S3C2410_CLKCON_USBH, 137 .name = "usb-host",
138 }, { 138 .parent = &clk_h,
139 .name = "usb-device", 139 .enable = s3c2410_clkcon_enable,
140 .parent = &clk_h, 140 .ctrlbit = S3C2410_CLKCON_USBH,
141 .enable = s3c2410_clkcon_enable, 141};
142 .ctrlbit = S3C2410_CLKCON_USBD, 142
143 }, { 143static struct clk clk_usb_device = {
144 .name = "timers", 144 .name = "usb-device",
145 .parent = &clk_p, 145 .parent = &clk_h,
146 .enable = s3c2410_clkcon_enable, 146 .enable = s3c2410_clkcon_enable,
147 .ctrlbit = S3C2410_CLKCON_PWMT, 147 .ctrlbit = S3C2410_CLKCON_USBD,
148 }, { 148};
149 .name = "uart", 149
150 .devname = "s3c2410-uart.0", 150static struct clk clk_timers = {
151 .parent = &clk_p, 151 .name = "timers",
152 .enable = s3c2410_clkcon_enable, 152 .parent = &clk_p,
153 .ctrlbit = S3C2410_CLKCON_UART0, 153 .enable = s3c2410_clkcon_enable,
154 }, { 154 .ctrlbit = S3C2410_CLKCON_PWMT,
155 .name = "uart", 155};
156 .devname = "s3c2410-uart.1", 156
157 .parent = &clk_p, 157struct clk s3c24xx_clk_uart0 = {
158 .enable = s3c2410_clkcon_enable, 158 .name = "uart",
159 .ctrlbit = S3C2410_CLKCON_UART1, 159 .devname = "s3c2410-uart.0",
160 }, { 160 .parent = &clk_p,
161 .name = "uart", 161 .enable = s3c2410_clkcon_enable,
162 .devname = "s3c2410-uart.2", 162 .ctrlbit = S3C2410_CLKCON_UART0,
163 .parent = &clk_p, 163};
164 .enable = s3c2410_clkcon_enable, 164
165 .ctrlbit = S3C2410_CLKCON_UART2, 165struct clk s3c24xx_clk_uart1 = {
166 }, { 166 .name = "uart",
167 .name = "rtc", 167 .devname = "s3c2410-uart.1",
168 .parent = &clk_p, 168 .parent = &clk_p,
169 .enable = s3c2410_clkcon_enable, 169 .enable = s3c2410_clkcon_enable,
170 .ctrlbit = S3C2410_CLKCON_RTC, 170 .ctrlbit = S3C2410_CLKCON_UART1,
171 }, { 171};
172 .name = "watchdog", 172
173 .parent = &clk_p, 173struct clk s3c24xx_clk_uart2 = {
174 .ctrlbit = 0, 174 .name = "uart",
175 }, { 175 .devname = "s3c2410-uart.2",
176 .name = "usb-bus-host", 176 .parent = &clk_p,
177 .parent = &clk_usb_bus, 177 .enable = s3c2410_clkcon_enable,
178 }, { 178 .ctrlbit = S3C2410_CLKCON_UART2,
179 .name = "usb-bus-gadget", 179};
180 .parent = &clk_usb_bus, 180
181 }, 181static struct clk clk_rtc = {
182 .name = "rtc",
183 .parent = &clk_p,
184 .enable = s3c2410_clkcon_enable,
185 .ctrlbit = S3C2410_CLKCON_RTC,
186};
187
188static struct clk clk_watchdog = {
189 .name = "watchdog",
190 .parent = &clk_p,
191 .ctrlbit = 0,
192};
193
194static struct clk clk_usb_bus_host = {
195 .name = "usb-bus-host",
196 .parent = &clk_usb_bus,
197};
198
199static struct clk clk_usb_bus_gadget = {
200 .name = "usb-bus-gadget",
201 .parent = &clk_usb_bus,
202};
203
204static struct clk *init_clocks[] = {
205 &clk_lcd,
206 &clk_gpio,
207 &clk_usb_host,
208 &clk_usb_device,
209 &clk_timers,
210 &s3c24xx_clk_uart0,
211 &s3c24xx_clk_uart1,
212 &s3c24xx_clk_uart2,
213 &clk_rtc,
214 &clk_watchdog,
215 &clk_usb_bus_host,
216 &clk_usb_bus_gadget,
182}; 217};
183 218
184/* s3c2410_baseclk_add() 219/* s3c2410_baseclk_add()
@@ -195,7 +230,6 @@ int __init s3c2410_baseclk_add(void)
195{ 230{
196 unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW); 231 unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW);
197 unsigned long clkcon = __raw_readl(S3C2410_CLKCON); 232 unsigned long clkcon = __raw_readl(S3C2410_CLKCON);
198 struct clk *clkp;
199 struct clk *xtal; 233 struct clk *xtal;
200 int ret; 234 int ret;
201 int ptr; 235 int ptr;
@@ -207,8 +241,9 @@ int __init s3c2410_baseclk_add(void)
207 241
208 /* register clocks from clock array */ 242 /* register clocks from clock array */
209 243
210 clkp = init_clocks; 244 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++) {
211 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) { 245 struct clk *clkp = init_clocks[ptr];
246
212 /* ensure that we note the clock state */ 247 /* ensure that we note the clock state */
213 248
214 clkp->usage = clkcon & clkp->ctrlbit ? 1 : 0; 249 clkp->usage = clkcon & clkp->ctrlbit ? 1 : 0;
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2440.c b/arch/arm/mach-s3c24xx/clock-s3c2440.c
index 1069b5680826..aaf006d1d6dc 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2440.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2440.c
@@ -166,6 +166,9 @@ static struct clk_lookup s3c2440_clk_lookup[] = {
166 CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk), 166 CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
167 CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p), 167 CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
168 CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n), 168 CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n),
169 CLKDEV_INIT("s3c2440-uart.0", "uart", &s3c24xx_clk_uart0),
170 CLKDEV_INIT("s3c2440-uart.1", "uart", &s3c24xx_clk_uart1),
171 CLKDEV_INIT("s3c2440-uart.2", "uart", &s3c24xx_clk_uart2),
169 CLKDEV_INIT("s3c2440-camif", "camera", &s3c2440_clk_cam_upll), 172 CLKDEV_INIT("s3c2440-camif", "camera", &s3c2440_clk_cam_upll),
170}; 173};
171 174
diff --git a/arch/arm/mach-shmobile/headsmp-scu.S b/arch/arm/mach-shmobile/headsmp-scu.S
index 6f9865467258..bfd920083a3b 100644
--- a/arch/arm/mach-shmobile/headsmp-scu.S
+++ b/arch/arm/mach-shmobile/headsmp-scu.S
@@ -23,7 +23,6 @@
23#include <linux/init.h> 23#include <linux/init.h>
24#include <asm/memory.h> 24#include <asm/memory.h>
25 25
26 __CPUINIT
27/* 26/*
28 * Boot code for secondary CPUs. 27 * Boot code for secondary CPUs.
29 * 28 *
diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S
index 559d1ce5f57e..a9d212498987 100644
--- a/arch/arm/mach-shmobile/headsmp.S
+++ b/arch/arm/mach-shmobile/headsmp.S
@@ -14,8 +14,6 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <asm/memory.h> 15#include <asm/memory.h>
16 16
17 __CPUINIT
18
19ENTRY(shmobile_invalidate_start) 17ENTRY(shmobile_invalidate_start)
20 bl v7_invalidate_l1 18 bl v7_invalidate_l1
21 b secondary_startup 19 b secondary_startup
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
index 80991b35f4ac..22a05a869d25 100644
--- a/arch/arm/mach-shmobile/smp-emev2.c
+++ b/arch/arm/mach-shmobile/smp-emev2.c
@@ -30,7 +30,7 @@
30 30
31#define EMEV2_SCU_BASE 0x1e000000 31#define EMEV2_SCU_BASE 0x1e000000
32 32
33static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *idle) 33static int emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
34{ 34{
35 arch_send_wakeup_ipi_mask(cpumask_of(cpu_logical_map(cpu))); 35 arch_send_wakeup_ipi_mask(cpumask_of(cpu_logical_map(cpu)));
36 return 0; 36 return 0;
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index 526cfaae81c1..9bdf810f2a87 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -81,7 +81,7 @@ static int r8a7779_platform_cpu_kill(unsigned int cpu)
81 return ret ? ret : 1; 81 return ret ? ret : 1;
82} 82}
83 83
84static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle) 84static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
85{ 85{
86 struct r8a7779_pm_ch *ch = NULL; 86 struct r8a7779_pm_ch *ch = NULL;
87 int ret = -EIO; 87 int ret = -EIO;
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index d613113a04bd..d5fc3ed4e315 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -48,7 +48,7 @@ void __init sh73a0_register_twd(void)
48} 48}
49#endif 49#endif
50 50
51static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle) 51static int sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
52{ 52{
53 cpu = cpu_logical_map(cpu); 53 cpu = cpu_logical_map(cpu);
54 54
diff --git a/arch/arm/mach-socfpga/headsmp.S b/arch/arm/mach-socfpga/headsmp.S
index 9004bfb1756e..95c115d8b5ee 100644
--- a/arch/arm/mach-socfpga/headsmp.S
+++ b/arch/arm/mach-socfpga/headsmp.S
@@ -10,7 +10,6 @@
10#include <linux/linkage.h> 10#include <linux/linkage.h>
11#include <linux/init.h> 11#include <linux/init.h>
12 12
13 __CPUINIT
14 .arch armv7-a 13 .arch armv7-a
15 14
16ENTRY(secondary_trampoline) 15ENTRY(secondary_trampoline)
diff --git a/arch/arm/mach-socfpga/platsmp.c b/arch/arm/mach-socfpga/platsmp.c
index b51ce8c7929d..5356a72bc8ce 100644
--- a/arch/arm/mach-socfpga/platsmp.c
+++ b/arch/arm/mach-socfpga/platsmp.c
@@ -29,7 +29,7 @@
29 29
30#include "core.h" 30#include "core.h"
31 31
32static int __cpuinit socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle) 32static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
33{ 33{
34 int trampoline_size = &secondary_trampoline_end - &secondary_trampoline; 34 int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
35 35
diff --git a/arch/arm/mach-spear/generic.h b/arch/arm/mach-spear/generic.h
index 904f2c907b46..a99d90a4d09c 100644
--- a/arch/arm/mach-spear/generic.h
+++ b/arch/arm/mach-spear/generic.h
@@ -37,7 +37,7 @@ void __init spear13xx_l2x0_init(void);
37void spear_restart(enum reboot_mode, const char *); 37void spear_restart(enum reboot_mode, const char *);
38 38
39void spear13xx_secondary_startup(void); 39void spear13xx_secondary_startup(void);
40void __cpuinit spear13xx_cpu_die(unsigned int cpu); 40void spear13xx_cpu_die(unsigned int cpu);
41 41
42extern struct smp_operations spear13xx_smp_ops; 42extern struct smp_operations spear13xx_smp_ops;
43 43
diff --git a/arch/arm/mach-spear/platsmp.c b/arch/arm/mach-spear/platsmp.c
index 9c4c722c954e..5c4a19887b2b 100644
--- a/arch/arm/mach-spear/platsmp.c
+++ b/arch/arm/mach-spear/platsmp.c
@@ -24,7 +24,7 @@ static DEFINE_SPINLOCK(boot_lock);
24 24
25static void __iomem *scu_base = IOMEM(VA_SCU_BASE); 25static void __iomem *scu_base = IOMEM(VA_SCU_BASE);
26 26
27static void __cpuinit spear13xx_secondary_init(unsigned int cpu) 27static void spear13xx_secondary_init(unsigned int cpu)
28{ 28{
29 /* 29 /*
30 * let the primary processor know we're out of the 30 * let the primary processor know we're out of the
@@ -40,7 +40,7 @@ static void __cpuinit spear13xx_secondary_init(unsigned int cpu)
40 spin_unlock(&boot_lock); 40 spin_unlock(&boot_lock);
41} 41}
42 42
43static int __cpuinit spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle) 43static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle)
44{ 44{
45 unsigned long timeout; 45 unsigned long timeout;
46 46
diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
index d04e3bfe1918..835833e3c4f8 100644
--- a/arch/arm/mach-sti/Kconfig
+++ b/arch/arm/mach-sti/Kconfig
@@ -11,8 +11,9 @@ menuconfig ARCH_STI
11 select HAVE_SMP 11 select HAVE_SMP
12 select HAVE_ARM_SCU if SMP 12 select HAVE_ARM_SCU if SMP
13 select ARCH_REQUIRE_GPIOLIB 13 select ARCH_REQUIRE_GPIOLIB
14 select ARM_ERRATA_720789
15 select ARM_ERRATA_754322 14 select ARM_ERRATA_754322
15 select ARM_ERRATA_764369
16 select ARM_ERRATA_775420
16 select PL310_ERRATA_753970 if CACHE_PL310 17 select PL310_ERRATA_753970 if CACHE_PL310
17 select PL310_ERRATA_769419 if CACHE_PL310 18 select PL310_ERRATA_769419 if CACHE_PL310
18 help 19 help
diff --git a/arch/arm/mach-sti/platsmp.c b/arch/arm/mach-sti/platsmp.c
index 977a863468fc..dce50d983a8e 100644
--- a/arch/arm/mach-sti/platsmp.c
+++ b/arch/arm/mach-sti/platsmp.c
@@ -27,7 +27,7 @@
27 27
28#include "smp.h" 28#include "smp.h"
29 29
30static void __cpuinit write_pen_release(int val) 30static void write_pen_release(int val)
31{ 31{
32 pen_release = val; 32 pen_release = val;
33 smp_wmb(); 33 smp_wmb();
@@ -37,7 +37,7 @@ static void __cpuinit write_pen_release(int val)
37 37
38static DEFINE_SPINLOCK(boot_lock); 38static DEFINE_SPINLOCK(boot_lock);
39 39
40void __cpuinit sti_secondary_init(unsigned int cpu) 40void sti_secondary_init(unsigned int cpu)
41{ 41{
42 trace_hardirqs_off(); 42 trace_hardirqs_off();
43 43
@@ -54,7 +54,7 @@ void __cpuinit sti_secondary_init(unsigned int cpu)
54 spin_unlock(&boot_lock); 54 spin_unlock(&boot_lock);
55} 55}
56 56
57int __cpuinit sti_boot_secondary(unsigned int cpu, struct task_struct *idle) 57int sti_boot_secondary(unsigned int cpu, struct task_struct *idle)
58{ 58{
59 unsigned long timeout; 59 unsigned long timeout;
60 60
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index 24db4ac428ae..97b33a2a2d75 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -35,7 +35,7 @@
35 35
36static cpumask_t tegra_cpu_init_mask; 36static cpumask_t tegra_cpu_init_mask;
37 37
38static void __cpuinit tegra_secondary_init(unsigned int cpu) 38static void tegra_secondary_init(unsigned int cpu)
39{ 39{
40 cpumask_set_cpu(cpu, &tegra_cpu_init_mask); 40 cpumask_set_cpu(cpu, &tegra_cpu_init_mask);
41} 41}
@@ -167,7 +167,7 @@ static int tegra114_boot_secondary(unsigned int cpu, struct task_struct *idle)
167 return ret; 167 return ret;
168} 168}
169 169
170static int __cpuinit tegra_boot_secondary(unsigned int cpu, 170static int tegra_boot_secondary(unsigned int cpu,
171 struct task_struct *idle) 171 struct task_struct *idle)
172{ 172{
173 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && tegra_chip_id == TEGRA20) 173 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && tegra_chip_id == TEGRA20)
diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c
index 94e69bee3da5..261fec140c06 100644
--- a/arch/arm/mach-tegra/pm.c
+++ b/arch/arm/mach-tegra/pm.c
@@ -191,7 +191,7 @@ static const char *lp_state[TEGRA_MAX_SUSPEND_MODE] = {
191 [TEGRA_SUSPEND_LP0] = "LP0", 191 [TEGRA_SUSPEND_LP0] = "LP0",
192}; 192};
193 193
194static int __cpuinit tegra_suspend_enter(suspend_state_t state) 194static int tegra_suspend_enter(suspend_state_t state)
195{ 195{
196 enum tegra_suspend_mode mode = tegra_pmc_get_suspend_mode(); 196 enum tegra_suspend_mode mode = tegra_pmc_get_suspend_mode();
197 197
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index 14d90469392f..1f296e796a4f 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -54,7 +54,7 @@ static void __iomem *scu_base_addr(void)
54 54
55static DEFINE_SPINLOCK(boot_lock); 55static DEFINE_SPINLOCK(boot_lock);
56 56
57static void __cpuinit ux500_secondary_init(unsigned int cpu) 57static void ux500_secondary_init(unsigned int cpu)
58{ 58{
59 /* 59 /*
60 * let the primary processor know we're out of the 60 * let the primary processor know we're out of the
@@ -69,7 +69,7 @@ static void __cpuinit ux500_secondary_init(unsigned int cpu)
69 spin_unlock(&boot_lock); 69 spin_unlock(&boot_lock);
70} 70}
71 71
72static int __cpuinit ux500_boot_secondary(unsigned int cpu, struct task_struct *idle) 72static int ux500_boot_secondary(unsigned int cpu, struct task_struct *idle)
73{ 73{
74 unsigned long timeout; 74 unsigned long timeout;
75 75
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index 5b799c29886e..5f252569c689 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -91,7 +91,7 @@ static void __init zynq_map_io(void)
91 zynq_scu_map_io(); 91 zynq_scu_map_io();
92} 92}
93 93
94static void zynq_system_reset(char mode, const char *cmd) 94static void zynq_system_reset(enum reboot_mode mode, const char *cmd)
95{ 95{
96 zynq_slcr_system_reset(); 96 zynq_slcr_system_reset();
97} 97}
diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h
index fbbd0e21c404..3040d219570f 100644
--- a/arch/arm/mach-zynq/common.h
+++ b/arch/arm/mach-zynq/common.h
@@ -27,7 +27,7 @@ extern void secondary_startup(void);
27extern char zynq_secondary_trampoline; 27extern char zynq_secondary_trampoline;
28extern char zynq_secondary_trampoline_jump; 28extern char zynq_secondary_trampoline_jump;
29extern char zynq_secondary_trampoline_end; 29extern char zynq_secondary_trampoline_end;
30extern int __cpuinit zynq_cpun_start(u32 address, int cpu); 30extern int zynq_cpun_start(u32 address, int cpu);
31extern struct smp_operations zynq_smp_ops __initdata; 31extern struct smp_operations zynq_smp_ops __initdata;
32#endif 32#endif
33 33
diff --git a/arch/arm/mach-zynq/headsmp.S b/arch/arm/mach-zynq/headsmp.S
index d183cd234a9b..d4cd5f34fe5c 100644
--- a/arch/arm/mach-zynq/headsmp.S
+++ b/arch/arm/mach-zynq/headsmp.S
@@ -9,8 +9,6 @@
9#include <linux/linkage.h> 9#include <linux/linkage.h>
10#include <linux/init.h> 10#include <linux/init.h>
11 11
12 __CPUINIT
13
14ENTRY(zynq_secondary_trampoline) 12ENTRY(zynq_secondary_trampoline)
15 ldr r0, [pc] 13 ldr r0, [pc]
16 bx r0 14 bx r0
diff --git a/arch/arm/mach-zynq/platsmp.c b/arch/arm/mach-zynq/platsmp.c
index 023f225493f2..689fbbc3d9c8 100644
--- a/arch/arm/mach-zynq/platsmp.c
+++ b/arch/arm/mach-zynq/platsmp.c
@@ -30,11 +30,11 @@
30/* 30/*
31 * Store number of cores in the system 31 * Store number of cores in the system
32 * Because of scu_get_core_count() must be in __init section and can't 32 * Because of scu_get_core_count() must be in __init section and can't
33 * be called from zynq_cpun_start() because it is in __cpuinit section. 33 * be called from zynq_cpun_start() because it is not in __init section.
34 */ 34 */
35static int ncores; 35static int ncores;
36 36
37int __cpuinit zynq_cpun_start(u32 address, int cpu) 37int zynq_cpun_start(u32 address, int cpu)
38{ 38{
39 u32 trampoline_code_size = &zynq_secondary_trampoline_end - 39 u32 trampoline_code_size = &zynq_secondary_trampoline_end -
40 &zynq_secondary_trampoline; 40 &zynq_secondary_trampoline;
@@ -92,7 +92,7 @@ int __cpuinit zynq_cpun_start(u32 address, int cpu)
92} 92}
93EXPORT_SYMBOL(zynq_cpun_start); 93EXPORT_SYMBOL(zynq_cpun_start);
94 94
95static int __cpuinit zynq_boot_secondary(unsigned int cpu, 95static int zynq_boot_secondary(unsigned int cpu,
96 struct task_struct *idle) 96 struct task_struct *idle)
97{ 97{
98 return zynq_cpun_start(virt_to_phys(secondary_startup), cpu); 98 return zynq_cpun_start(virt_to_phys(secondary_startup), cpu);
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S
index 2bb61e703d6c..d1a2d05971e0 100644
--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -443,8 +443,6 @@ ENTRY(cpu_arm1020_set_pte_ext)
443#endif /* CONFIG_MMU */ 443#endif /* CONFIG_MMU */
444 mov pc, lr 444 mov pc, lr
445 445
446 __CPUINIT
447
448 .type __arm1020_setup, #function 446 .type __arm1020_setup, #function
449__arm1020_setup: 447__arm1020_setup:
450 mov r0, #0 448 mov r0, #0
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index 8f96aa40f510..9d89405c3d03 100644
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -425,8 +425,6 @@ ENTRY(cpu_arm1020e_set_pte_ext)
425#endif /* CONFIG_MMU */ 425#endif /* CONFIG_MMU */
426 mov pc, lr 426 mov pc, lr
427 427
428 __CPUINIT
429
430 .type __arm1020e_setup, #function 428 .type __arm1020e_setup, #function
431__arm1020e_setup: 429__arm1020e_setup:
432 mov r0, #0 430 mov r0, #0
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index 8ebe4a469a22..6f01a0ae3b30 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -407,8 +407,6 @@ ENTRY(cpu_arm1022_set_pte_ext)
407#endif /* CONFIG_MMU */ 407#endif /* CONFIG_MMU */
408 mov pc, lr 408 mov pc, lr
409 409
410 __CPUINIT
411
412 .type __arm1022_setup, #function 410 .type __arm1022_setup, #function
413__arm1022_setup: 411__arm1022_setup:
414 mov r0, #0 412 mov r0, #0
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 093fc7e520c3..4799a24b43e6 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -396,9 +396,6 @@ ENTRY(cpu_arm1026_set_pte_ext)
396#endif /* CONFIG_MMU */ 396#endif /* CONFIG_MMU */
397 mov pc, lr 397 mov pc, lr
398 398
399
400 __CPUINIT
401
402 .type __arm1026_setup, #function 399 .type __arm1026_setup, #function
403__arm1026_setup: 400__arm1026_setup:
404 mov r0, #0 401 mov r0, #0
diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S
index 0ac908c7ade1..d42c37f9f5bc 100644
--- a/arch/arm/mm/proc-arm720.S
+++ b/arch/arm/mm/proc-arm720.S
@@ -116,8 +116,6 @@ ENTRY(cpu_arm720_reset)
116ENDPROC(cpu_arm720_reset) 116ENDPROC(cpu_arm720_reset)
117 .popsection 117 .popsection
118 118
119 __CPUINIT
120
121 .type __arm710_setup, #function 119 .type __arm710_setup, #function
122__arm710_setup: 120__arm710_setup:
123 mov r0, #0 121 mov r0, #0
diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S
index fde2d2a794cf..9b0ae90cbf17 100644
--- a/arch/arm/mm/proc-arm740.S
+++ b/arch/arm/mm/proc-arm740.S
@@ -60,8 +60,6 @@ ENTRY(cpu_arm740_reset)
60ENDPROC(cpu_arm740_reset) 60ENDPROC(cpu_arm740_reset)
61 .popsection 61 .popsection
62 62
63 __CPUINIT
64
65 .type __arm740_setup, #function 63 .type __arm740_setup, #function
66__arm740_setup: 64__arm740_setup:
67 mov r0, #0 65 mov r0, #0
diff --git a/arch/arm/mm/proc-arm7tdmi.S b/arch/arm/mm/proc-arm7tdmi.S
index 6ddea3e464bd..f6cc3f63ce39 100644
--- a/arch/arm/mm/proc-arm7tdmi.S
+++ b/arch/arm/mm/proc-arm7tdmi.S
@@ -51,8 +51,6 @@ ENTRY(cpu_arm7tdmi_reset)
51ENDPROC(cpu_arm7tdmi_reset) 51ENDPROC(cpu_arm7tdmi_reset)
52 .popsection 52 .popsection
53 53
54 __CPUINIT
55
56 .type __arm7tdmi_setup, #function 54 .type __arm7tdmi_setup, #function
57__arm7tdmi_setup: 55__arm7tdmi_setup:
58 mov pc, lr 56 mov pc, lr
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 2556cf1c2da1..549557df6d57 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -410,8 +410,6 @@ ENTRY(cpu_arm920_do_resume)
410ENDPROC(cpu_arm920_do_resume) 410ENDPROC(cpu_arm920_do_resume)
411#endif 411#endif
412 412
413 __CPUINIT
414
415 .type __arm920_setup, #function 413 .type __arm920_setup, #function
416__arm920_setup: 414__arm920_setup:
417 mov r0, #0 415 mov r0, #0
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index 4464c49d7449..2a758b06c6f6 100644
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -388,8 +388,6 @@ ENTRY(cpu_arm922_set_pte_ext)
388#endif /* CONFIG_MMU */ 388#endif /* CONFIG_MMU */
389 mov pc, lr 389 mov pc, lr
390 390
391 __CPUINIT
392
393 .type __arm922_setup, #function 391 .type __arm922_setup, #function
394__arm922_setup: 392__arm922_setup:
395 mov r0, #0 393 mov r0, #0
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 281eb9b9c1d6..97448c3acf38 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -438,8 +438,6 @@ ENTRY(cpu_arm925_set_pte_ext)
438#endif /* CONFIG_MMU */ 438#endif /* CONFIG_MMU */
439 mov pc, lr 439 mov pc, lr
440 440
441 __CPUINIT
442
443 .type __arm925_setup, #function 441 .type __arm925_setup, #function
444__arm925_setup: 442__arm925_setup:
445 mov r0, #0 443 mov r0, #0
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 344c8a548cc0..0f098f407c9f 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -425,8 +425,6 @@ ENTRY(cpu_arm926_do_resume)
425ENDPROC(cpu_arm926_do_resume) 425ENDPROC(cpu_arm926_do_resume)
426#endif 426#endif
427 427
428 __CPUINIT
429
430 .type __arm926_setup, #function 428 .type __arm926_setup, #function
431__arm926_setup: 429__arm926_setup:
432 mov r0, #0 430 mov r0, #0
diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S
index 8da189d4a402..1c39a704ff6e 100644
--- a/arch/arm/mm/proc-arm940.S
+++ b/arch/arm/mm/proc-arm940.S
@@ -273,8 +273,6 @@ ENDPROC(arm940_dma_unmap_area)
273 @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) 273 @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
274 define_cache_functions arm940 274 define_cache_functions arm940
275 275
276 __CPUINIT
277
278 .type __arm940_setup, #function 276 .type __arm940_setup, #function
279__arm940_setup: 277__arm940_setup:
280 mov r0, #0 278 mov r0, #0
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S
index f666cf34075a..0289cd905e73 100644
--- a/arch/arm/mm/proc-arm946.S
+++ b/arch/arm/mm/proc-arm946.S
@@ -326,8 +326,6 @@ ENTRY(cpu_arm946_dcache_clean_area)
326 mcr p15, 0, r0, c7, c10, 4 @ drain WB 326 mcr p15, 0, r0, c7, c10, 4 @ drain WB
327 mov pc, lr 327 mov pc, lr
328 328
329 __CPUINIT
330
331 .type __arm946_setup, #function 329 .type __arm946_setup, #function
332__arm946_setup: 330__arm946_setup:
333 mov r0, #0 331 mov r0, #0
diff --git a/arch/arm/mm/proc-arm9tdmi.S b/arch/arm/mm/proc-arm9tdmi.S
index 8881391dfb9e..f51197ba754a 100644
--- a/arch/arm/mm/proc-arm9tdmi.S
+++ b/arch/arm/mm/proc-arm9tdmi.S
@@ -51,8 +51,6 @@ ENTRY(cpu_arm9tdmi_reset)
51ENDPROC(cpu_arm9tdmi_reset) 51ENDPROC(cpu_arm9tdmi_reset)
52 .popsection 52 .popsection
53 53
54 __CPUINIT
55
56 .type __arm9tdmi_setup, #function 54 .type __arm9tdmi_setup, #function
57__arm9tdmi_setup: 55__arm9tdmi_setup:
58 mov pc, lr 56 mov pc, lr
diff --git a/arch/arm/mm/proc-fa526.S b/arch/arm/mm/proc-fa526.S
index aaeb6c127c7a..2dfc0f1d3bfd 100644
--- a/arch/arm/mm/proc-fa526.S
+++ b/arch/arm/mm/proc-fa526.S
@@ -135,8 +135,6 @@ ENTRY(cpu_fa526_set_pte_ext)
135#endif 135#endif
136 mov pc, lr 136 mov pc, lr
137 137
138 __CPUINIT
139
140 .type __fa526_setup, #function 138 .type __fa526_setup, #function
141__fa526_setup: 139__fa526_setup:
142 /* On return of this routine, r0 must carry correct flags for CFG register */ 140 /* On return of this routine, r0 must carry correct flags for CFG register */
diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S
index 4106b09e0c29..d5146b98c8d1 100644
--- a/arch/arm/mm/proc-feroceon.S
+++ b/arch/arm/mm/proc-feroceon.S
@@ -514,8 +514,6 @@ ENTRY(cpu_feroceon_set_pte_ext)
514#endif 514#endif
515 mov pc, lr 515 mov pc, lr
516 516
517 __CPUINIT
518
519 .type __feroceon_setup, #function 517 .type __feroceon_setup, #function
520__feroceon_setup: 518__feroceon_setup:
521 mov r0, #0 519 mov r0, #0
diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S
index 0b60dd3d742a..40acba595731 100644
--- a/arch/arm/mm/proc-mohawk.S
+++ b/arch/arm/mm/proc-mohawk.S
@@ -383,8 +383,6 @@ ENTRY(cpu_mohawk_do_resume)
383ENDPROC(cpu_mohawk_do_resume) 383ENDPROC(cpu_mohawk_do_resume)
384#endif 384#endif
385 385
386 __CPUINIT
387
388 .type __mohawk_setup, #function 386 .type __mohawk_setup, #function
389__mohawk_setup: 387__mohawk_setup:
390 mov r0, #0 388 mov r0, #0
diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S
index 775d70fba937..c45319c8f1d9 100644
--- a/arch/arm/mm/proc-sa110.S
+++ b/arch/arm/mm/proc-sa110.S
@@ -159,8 +159,6 @@ ENTRY(cpu_sa110_set_pte_ext)
159#endif 159#endif
160 mov pc, lr 160 mov pc, lr
161 161
162 __CPUINIT
163
164 .type __sa110_setup, #function 162 .type __sa110_setup, #function
165__sa110_setup: 163__sa110_setup:
166 mov r10, #0 164 mov r10, #0
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index d92dfd081429..09d241ae2dbe 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -198,8 +198,6 @@ ENTRY(cpu_sa1100_do_resume)
198ENDPROC(cpu_sa1100_do_resume) 198ENDPROC(cpu_sa1100_do_resume)
199#endif 199#endif
200 200
201 __CPUINIT
202
203 .type __sa1100_setup, #function 201 .type __sa1100_setup, #function
204__sa1100_setup: 202__sa1100_setup:
205 mov r0, #0 203 mov r0, #0
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 2d1ef87328a1..1128064fddcb 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -180,8 +180,6 @@ ENDPROC(cpu_v6_do_resume)
180 180
181 .align 181 .align
182 182
183 __CPUINIT
184
185/* 183/*
186 * __v6_setup 184 * __v6_setup
187 * 185 *
diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S
index 9704097c450e..f64afb9f1bd5 100644
--- a/arch/arm/mm/proc-v7-2level.S
+++ b/arch/arm/mm/proc-v7-2level.S
@@ -160,8 +160,6 @@ ENDPROC(cpu_v7_set_pte_ext)
160 mcr p15, 0, \ttbr1, c2, c0, 1 @ load TTB1 160 mcr p15, 0, \ttbr1, c2, c0, 1 @ load TTB1
161 .endm 161 .endm
162 162
163 __CPUINIT
164
165 /* AT 163 /* AT
166 * TFR EV X F I D LR S 164 * TFR EV X F I D LR S
167 * .EEE ..EE PUI. .T.T 4RVI ZWRS BLDP WCAM 165 * .EEE ..EE PUI. .T.T 4RVI ZWRS BLDP WCAM
@@ -172,5 +170,3 @@ ENDPROC(cpu_v7_set_pte_ext)
172 .type v7_crval, #object 170 .type v7_crval, #object
173v7_crval: 171v7_crval:
174 crval clear=0x2120c302, mmuset=0x10c03c7d, ucset=0x00c01c7c 172 crval clear=0x2120c302, mmuset=0x10c03c7d, ucset=0x00c01c7c
175
176 .previous
diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
index 5ffe1956c6d9..c36ac69488c8 100644
--- a/arch/arm/mm/proc-v7-3level.S
+++ b/arch/arm/mm/proc-v7-3level.S
@@ -140,8 +140,6 @@ ENDPROC(cpu_v7_set_pte_ext)
140 mcrr p15, 0, \ttbr0, \zero, c2 @ load TTBR0 140 mcrr p15, 0, \ttbr0, \zero, c2 @ load TTBR0
141 .endm 141 .endm
142 142
143 __CPUINIT
144
145 /* 143 /*
146 * AT 144 * AT
147 * TFR EV X F IHD LR S 145 * TFR EV X F IHD LR S
@@ -153,5 +151,3 @@ ENDPROC(cpu_v7_set_pte_ext)
153 .type v7_crval, #object 151 .type v7_crval, #object
154v7_crval: 152v7_crval:
155 crval clear=0x0120c302, mmuset=0x30c23c7d, ucset=0x00c01c7c 153 crval clear=0x0120c302, mmuset=0x30c23c7d, ucset=0x00c01c7c
156
157 .previous
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 7ef3ad05df39..5c6d5a3050ea 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -167,8 +167,6 @@ ENDPROC(cpu_pj4b_do_idle)
167 167
168#endif 168#endif
169 169
170 __CPUINIT
171
172/* 170/*
173 * __v7_setup 171 * __v7_setup
174 * 172 *
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index e8efd83b6f25..dc1645890042 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -446,8 +446,6 @@ ENTRY(cpu_xsc3_do_resume)
446ENDPROC(cpu_xsc3_do_resume) 446ENDPROC(cpu_xsc3_do_resume)
447#endif 447#endif
448 448
449 __CPUINIT
450
451 .type __xsc3_setup, #function 449 .type __xsc3_setup, #function
452__xsc3_setup: 450__xsc3_setup:
453 mov r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE 451 mov r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index e766f889bfd6..d19b1cfcad91 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -558,8 +558,6 @@ ENTRY(cpu_xscale_do_resume)
558ENDPROC(cpu_xscale_do_resume) 558ENDPROC(cpu_xscale_do_resume)
559#endif 559#endif
560 560
561 __CPUINIT
562
563 .type __xscale_setup, #function 561 .type __xscale_setup, #function
564__xscale_setup: 562__xscale_setup:
565 mcr p15, 0, ip, c7, c7, 0 @ invalidate I, D caches & BTB 563 mcr p15, 0, ip, c7, c7, 0 @ invalidate I, D caches & BTB
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 3dc5cbea86cc..a5b5ff6e68d2 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -29,6 +29,13 @@ config PLAT_S5P
29 help 29 help
30 Base platform code for Samsung's S5P series SoC. 30 Base platform code for Samsung's S5P series SoC.
31 31
32config SAMSUNG_PM
33 bool
34 depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || ARCH_S5P64X0 || S5P_PM)
35 default y
36 help
37 Base platform power management code for samsung code
38
32if PLAT_SAMSUNG 39if PLAT_SAMSUNG
33 40
34# boot configurations 41# boot configurations
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 98d07d8fc7a7..199bbe304d02 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -51,7 +51,7 @@ obj-$(CONFIG_SAMSUNG_DMADEV) += dma-ops.o
51 51
52# PM support 52# PM support
53 53
54obj-$(CONFIG_PM) += pm.o 54obj-$(CONFIG_SAMSUNG_PM) += pm.o
55obj-$(CONFIG_SAMSUNG_PM_GPIO) += pm-gpio.o 55obj-$(CONFIG_SAMSUNG_PM_GPIO) += pm-gpio.o
56obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o 56obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o
57 57
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index a62753dc15ba..df45d6edc98d 100644
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -83,6 +83,11 @@ extern struct clk clk_ext;
83extern struct clksrc_clk clk_epllref; 83extern struct clksrc_clk clk_epllref;
84extern struct clksrc_clk clk_esysclk; 84extern struct clksrc_clk clk_esysclk;
85 85
86/* S3C24XX UART clocks */
87extern struct clk s3c24xx_clk_uart0;
88extern struct clk s3c24xx_clk_uart1;
89extern struct clk s3c24xx_clk_uart2;
90
86/* S3C64XX specific clocks */ 91/* S3C64XX specific clocks */
87extern struct clk clk_h2; 92extern struct clk clk_h2;
88extern struct clk clk_27m; 93extern struct clk clk_27m;
diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h
index 5d47ca35cabd..6bc1a8f471e3 100644
--- a/arch/arm/plat-samsung/include/plat/pm.h
+++ b/arch/arm/plat-samsung/include/plat/pm.h
@@ -19,7 +19,7 @@
19 19
20struct device; 20struct device;
21 21
22#ifdef CONFIG_PM 22#ifdef CONFIG_SAMSUNG_PM
23 23
24extern __init int s3c_pm_init(void); 24extern __init int s3c_pm_init(void);
25extern __init int s3c64xx_pm_init(void); 25extern __init int s3c64xx_pm_init(void);
@@ -58,8 +58,6 @@ extern unsigned char pm_uart_udivslot; /* true to save UART UDIVSLOT */
58 58
59/* from sleep.S */ 59/* from sleep.S */
60 60
61extern void s3c_cpu_resume(void);
62
63extern int s3c2410_cpu_suspend(unsigned long); 61extern int s3c2410_cpu_suspend(unsigned long);
64 62
65/* sleep save info */ 63/* sleep save info */
@@ -106,12 +104,14 @@ extern void s3c_pm_do_save(struct sleep_save *ptr, int count);
106extern void s3c_pm_do_restore(struct sleep_save *ptr, int count); 104extern void s3c_pm_do_restore(struct sleep_save *ptr, int count);
107extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count); 105extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count);
108 106
109#ifdef CONFIG_PM 107#ifdef CONFIG_SAMSUNG_PM
110extern int s3c_irq_wake(struct irq_data *data, unsigned int state); 108extern int s3c_irq_wake(struct irq_data *data, unsigned int state);
111extern int s3c_irqext_wake(struct irq_data *data, unsigned int state); 109extern int s3c_irqext_wake(struct irq_data *data, unsigned int state);
110extern void s3c_cpu_resume(void);
112#else 111#else
113#define s3c_irq_wake NULL 112#define s3c_irq_wake NULL
114#define s3c_irqext_wake NULL 113#define s3c_irqext_wake NULL
114#define s3c_cpu_resume NULL
115#endif 115#endif
116 116
117/* PM debug functions */ 117/* PM debug functions */
diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c
index ea3613642451..d0c23010b693 100644
--- a/arch/arm/plat-samsung/pm.c
+++ b/arch/arm/plat-samsung/pm.c
@@ -80,7 +80,7 @@ unsigned char pm_uart_udivslot;
80 80
81#ifdef CONFIG_SAMSUNG_PM_DEBUG 81#ifdef CONFIG_SAMSUNG_PM_DEBUG
82 82
83static struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS]; 83static struct pm_uart_save uart_save;
84 84
85static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save) 85static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
86{ 86{
@@ -101,11 +101,7 @@ static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
101 101
102static void s3c_pm_save_uarts(void) 102static void s3c_pm_save_uarts(void)
103{ 103{
104 struct pm_uart_save *save = uart_save; 104 s3c_pm_save_uart(CONFIG_DEBUG_S3C_UART, &uart_save);
105 unsigned int uart;
106
107 for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
108 s3c_pm_save_uart(uart, save);
109} 105}
110 106
111static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save) 107static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
@@ -126,11 +122,7 @@ static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
126 122
127static void s3c_pm_restore_uarts(void) 123static void s3c_pm_restore_uarts(void)
128{ 124{
129 struct pm_uart_save *save = uart_save; 125 s3c_pm_restore_uart(CONFIG_DEBUG_S3C_UART, &uart_save);
130 unsigned int uart;
131
132 for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
133 s3c_pm_restore_uart(uart, save);
134} 126}
135#else 127#else
136static void s3c_pm_save_uarts(void) { } 128static void s3c_pm_save_uarts(void) { }
diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c
index 1e1b2d769748..39895d892c3b 100644
--- a/arch/arm/plat-versatile/platsmp.c
+++ b/arch/arm/plat-versatile/platsmp.c
@@ -23,7 +23,7 @@
23 * observers, irrespective of whether they're taking part in coherency 23 * observers, irrespective of whether they're taking part in coherency
24 * or not. This is necessary for the hotplug code to work reliably. 24 * or not. This is necessary for the hotplug code to work reliably.
25 */ 25 */
26static void __cpuinit write_pen_release(int val) 26static void write_pen_release(int val)
27{ 27{
28 pen_release = val; 28 pen_release = val;
29 smp_wmb(); 29 smp_wmb();
@@ -33,7 +33,7 @@ static void __cpuinit write_pen_release(int val)
33 33
34static DEFINE_SPINLOCK(boot_lock); 34static DEFINE_SPINLOCK(boot_lock);
35 35
36void __cpuinit versatile_secondary_init(unsigned int cpu) 36void versatile_secondary_init(unsigned int cpu)
37{ 37{
38 /* 38 /*
39 * let the primary processor know we're out of the 39 * let the primary processor know we're out of the
@@ -48,7 +48,7 @@ void __cpuinit versatile_secondary_init(unsigned int cpu)
48 spin_unlock(&boot_lock); 48 spin_unlock(&boot_lock);
49} 49}
50 50
51int __cpuinit versatile_boot_secondary(unsigned int cpu, struct task_struct *idle) 51int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle)
52{ 52{
53 unsigned long timeout; 53 unsigned long timeout;
54 54
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-25 23:16:18 -0500