118 files changed, 2867 insertions, 445 deletions
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 7d980706bfb4..5575d9fa8806 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -150,6 +150,7 @@ machine-$(CONFIG_ARCH_BERLIN)		+= berlin
 machine-$(CONFIG_ARCH_CLPS711X)         += clps711x
 machine-$(CONFIG_ARCH_CNS3XXX)          += cns3xxx
 machine-$(CONFIG_ARCH_DAVINCI)          += davinci
+machine-$(CONFIG_ARCH_DIGICOLOR)        += digicolor
 machine-$(CONFIG_ARCH_DOVE)             += dove
 machine-$(CONFIG_ARCH_EBSA110)          += ebsa110
 machine-$(CONFIG_ARCH_EFM32)            += efm32
@@ -263,6 +264,7 @@ core-$(CONFIG_FPE_FASTFPE)	+= $(FASTFPE_OBJ)
 core-$(CONFIG_VFP)              += arch/arm/vfp/
 core-$(CONFIG_XEN)              += arch/arm/xen/
 core-$(CONFIG_KVM_ARM_HOST)     += arch/arm/kvm/
+core-$(CONFIG_VDSO)             += arch/arm/vdso/
 # If we have a machine-specific directory, then include it in the build.
 core-y                          += arch/arm/kernel/ arch/arm/mm/ arch/arm/common/
@@ -320,6 +322,12 @@ dtbs: prepare scripts
 dtbs_install:
        $(Q)$(MAKE) $(dtbinst)=$(boot)/dts
+PHONY += vdso_install
+vdso_install:
+ifeq ($(CONFIG_VDSO),y)
+        $(Q)$(MAKE) $(build)=arch/arm/vdso $@
+endif
 # We use MRPROPER_FILES and CLEAN_FILES now
 archclean:
        $(Q)$(MAKE) $(clean)=$(boot)
@@ -344,4 +352,5 @@ define archhelp
  echo  '                  Install using (your) ~/bin/$(INSTALLKERNEL) or'
  echo  '                  (distribution) /sbin/$(INSTALLKERNEL) or'
  echo  '                  install to $$(INSTALL_PATH) and run lilo'
+  echo  '  vdso_install  - Install unstripped vdso.so to $$(INSTALL_MOD_PATH)/vdso'
 endef
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index 6cc25ed912ee..c3255e0c90aa 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -195,6 +195,7 @@
 &usb0 {
        status = "okay";
+        dr_mode = "peripheral";
 };
 &usb1 {
@@ -300,3 +301,11 @@
        cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
        cd-inverted;
 };
+&aes {
+        status = "okay";
+};
+&sham {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
index 83d40f7655e5..6b8493720424 100644
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -24,11 +24,3 @@
 &mmc1 {
        vmmc-supply = <&ldo3_reg>;
 };
-&sham {
-        status = "okay";
-};
-&aes {
-        status = "okay";
-};
diff --git a/arch/arm/boot/dts/am335x-lxm.dts b/arch/arm/boot/dts/am335x-lxm.dts
index 7266a00aab2e..5c5667a3624d 100644
--- a/arch/arm/boot/dts/am335x-lxm.dts
+++ b/arch/arm/boot/dts/am335x-lxm.dts
@@ -328,6 +328,10 @@
        dual_emac_res_vlan = <3>;
 };
+&phy_sel {
+        rmii-clock-ext;
+};
 &mac {
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <&cpsw_default>;
diff --git a/arch/arm/boot/dts/am33xx-clocks.dtsi b/arch/arm/boot/dts/am33xx-clocks.dtsi
index 712edce7d6fb..071b56aa0c7e 100644
--- a/arch/arm/boot/dts/am33xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am33xx-clocks.dtsi
@@ -99,7 +99,7 @@
        ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 {
                #clock-cells = <0>;
                compatible = "ti,gate-clock";
-                clocks = <&dpll_per_m2_ck>;
+                clocks = <&l4ls_gclk>;
                ti,bit-shift = <0>;
                reg = <0x0664>;
        };
@@ -107,7 +107,7 @@
        ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 {
                #clock-cells = <0>;
                compatible = "ti,gate-clock";
-                clocks = <&dpll_per_m2_ck>;
+                clocks = <&l4ls_gclk>;
                ti,bit-shift = <1>;
                reg = <0x0664>;
        };
@@ -115,7 +115,7 @@
        ehrpwm2_tbclk: ehrpwm2_tbclk@44e10664 {
                #clock-cells = <0>;
                compatible = "ti,gate-clock";
-                clocks = <&dpll_per_m2_ck>;
+                clocks = <&l4ls_gclk>;
                ti,bit-shift = <2>;
                reg = <0x0664>;
        };
diff --git a/arch/arm/boot/dts/am437x-idk-evm.dts b/arch/arm/boot/dts/am437x-idk-evm.dts
index f9a17e2ca8cb..0198f5a62b96 100644
--- a/arch/arm/boot/dts/am437x-idk-evm.dts
+++ b/arch/arm/boot/dts/am437x-idk-evm.dts
@@ -133,20 +133,6 @@
                >;
        };
-        i2c1_pins_default: i2c1_pins_default {
-                pinctrl-single,pins = <
-                        0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
-                        0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
-                >;
-        };
-        i2c1_pins_sleep: i2c1_pins_sleep {
-                pinctrl-single,pins = <
-                        0x15c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_cs0.i2c1_scl */
-                        0x158 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d1.i2c1_sda */
-                >;
-        };
        mmc1_pins_default: pinmux_mmc1_pins_default {
                pinctrl-single,pins = <
                        0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
@@ -254,7 +240,7 @@
        status = "okay";
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <&i2c0_pins_default>;
-        pinctrl-1 = <&i2c0_pins_default>;
+        pinctrl-1 = <&i2c0_pins_sleep>;
        clock-frequency = <400000>;
        at24@50 {
@@ -262,17 +248,10 @@
                pagesize = <64>;
                reg = <0x50>;
        };
-};
-&i2c1 {
-        status = "okay";
-        pinctrl-names = "default", "sleep";
-        pinctrl-0 = <&i2c1_pins_default>;
-        pinctrl-1 = <&i2c1_pins_default>;
-        clock-frequency = <400000>;
        tps: tps62362@60 {
                compatible = "ti,tps62362";
+                reg = <0x60>;
                regulator-name = "VDD_MPU";
                regulator-min-microvolt = <950000>;
                regulator-max-microvolt = <1330000>;
diff --git a/arch/arm/boot/dts/am43xx-clocks.dtsi b/arch/arm/boot/dts/am43xx-clocks.dtsi
index c7dc9dab93a4..cfb49686ab6a 100644
--- a/arch/arm/boot/dts/am43xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am43xx-clocks.dtsi
@@ -107,7 +107,7 @@
        ehrpwm0_tbclk: ehrpwm0_tbclk {
                #clock-cells = <0>;
                compatible = "ti,gate-clock";
-                clocks = <&dpll_per_m2_ck>;
+                clocks = <&l4ls_gclk>;
                ti,bit-shift = <0>;
                reg = <0x0664>;
        };
@@ -115,7 +115,7 @@
        ehrpwm1_tbclk: ehrpwm1_tbclk {
                #clock-cells = <0>;
                compatible = "ti,gate-clock";
-                clocks = <&dpll_per_m2_ck>;
+                clocks = <&l4ls_gclk>;
                ti,bit-shift = <1>;
                reg = <0x0664>;
        };
@@ -123,7 +123,7 @@
        ehrpwm2_tbclk: ehrpwm2_tbclk {
                #clock-cells = <0>;
                compatible = "ti,gate-clock";
-                clocks = <&dpll_per_m2_ck>;
+                clocks = <&l4ls_gclk>;
                ti,bit-shift = <2>;
                reg = <0x0664>;
        };
@@ -131,7 +131,7 @@
        ehrpwm3_tbclk: ehrpwm3_tbclk {
                #clock-cells = <0>;
                compatible = "ti,gate-clock";
-                clocks = <&dpll_per_m2_ck>;
+                clocks = <&l4ls_gclk>;
                ti,bit-shift = <4>;
                reg = <0x0664>;
        };
@@ -139,7 +139,7 @@
        ehrpwm4_tbclk: ehrpwm4_tbclk {
                #clock-cells = <0>;
                compatible = "ti,gate-clock";
-                clocks = <&dpll_per_m2_ck>;
+                clocks = <&l4ls_gclk>;
                ti,bit-shift = <5>;
                reg = <0x0664>;
        };
@@ -147,7 +147,7 @@
        ehrpwm5_tbclk: ehrpwm5_tbclk {
                #clock-cells = <0>;
                compatible = "ti,gate-clock";
-                clocks = <&dpll_per_m2_ck>;
+                clocks = <&l4ls_gclk>;
                ti,bit-shift = <6>;
                reg = <0x0664>;
        };
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts
index 03750af3b49a..6463f9ef2b54 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15.dts
+++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts
@@ -549,14 +549,6 @@
        pinctrl-0 = <&usb1_pins>;
 };
-&omap_dwc3_1 {
-        extcon = <&extcon_usb1>;
-};
-&omap_dwc3_2 {
-        extcon = <&extcon_usb2>;
-};
 &usb2 {
        dr_mode = "peripheral";
 };
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index fff0ee69aab4..e7f0a4ae271c 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -494,12 +494,12 @@
                                        pinctrl_usart3_rts: usart3_rts-0 {
                                                atmel,pins =
-                                                        <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PC8 periph B */
+                                                        <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
                                        };
                                        pinctrl_usart3_cts: usart3_cts-0 {
                                                atmel,pins =
-                                                        <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC10 periph B */
+                                                        <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
                                        };
                                };
@@ -853,7 +853,7 @@
                        };
                        usb1: gadget@fffa4000 {
-                                compatible = "atmel,at91rm9200-udc";
+                                compatible = "atmel,at91sam9260-udc";
                                reg = <0xfffa4000 0x4000>;
                                interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
                                clocks = <&udc_clk>, <&udpck>;
@@ -976,7 +976,6 @@
                                atmel,watchdog-type = "hardware";
                                atmel,reset-type = "all";
                                atmel,dbg-halt;
-                                atmel,idle-halt;
                                status = "disabled";
                        };
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index e247b0b5fdab..d55fdf2487ef 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -124,11 +124,12 @@
                        };
                        usb1: gadget@fffa4000 {
-                                compatible = "atmel,at91rm9200-udc";
+                                compatible = "atmel,at91sam9261-udc";
                                reg = <0xfffa4000 0x4000>;
                                interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
-                                clocks = <&usb>, <&udc_clk>, <&udpck>;
+                                clocks = <&udc_clk>, <&udpck>;
-                                clock-names = "usb_clk", "udc_clk", "udpck";
+                                clock-names = "pclk", "hclk";
+                                atmel,matrix = <&matrix>;
                                status = "disabled";
                        };
@@ -262,7 +263,7 @@
                        };
                        matrix: matrix@ffffee00 {
-                                compatible = "atmel,at91sam9260-bus-matrix";
+                                compatible = "atmel,at91sam9260-bus-matrix", "syscon";
                                reg = <0xffffee00 0x200>;
                        };
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 1f67bb4c144e..fce301c4e9d6 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -69,7 +69,7 @@
        sram1: sram@00500000 {
                compatible = "mmio-sram";
-                reg = <0x00300000 0x4000>;
+                reg = <0x00500000 0x4000>;
        };
        ahb {
@@ -856,7 +856,7 @@
                        };
                        usb1: gadget@fff78000 {
-                                compatible = "atmel,at91rm9200-udc";
+                                compatible = "atmel,at91sam9263-udc";
                                reg = <0xfff78000 0x4000>;
                                interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
                                clocks = <&udc_clk>, <&udpck>;
@@ -905,7 +905,6 @@
                                atmel,watchdog-type = "hardware";
                                atmel,reset-type = "all";
                                atmel,dbg-halt;
-                                atmel,idle-halt;
                                status = "disabled";
                        };
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index ee80aa9c0759..488af63d5174 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -1116,7 +1116,6 @@
                                atmel,watchdog-type = "hardware";
                                atmel,reset-type = "all";
                                atmel,dbg-halt;
-                                atmel,idle-halt;
                                status = "disabled";
                        };
@@ -1301,7 +1300,7 @@
                        compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
                        reg = <0x00800000 0x100000>;
                        interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
-                        clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
+                        clocks = <&utmi>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
                        clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck";
                        status = "disabled";
                };
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index c2666a7cb5b1..0c53a375ba99 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -894,7 +894,6 @@
                                atmel,watchdog-type = "hardware";
                                atmel,reset-type = "all";
                                atmel,dbg-halt;
-                                atmel,idle-halt;
                                status = "disabled";
                        };
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 818dabdd8c0e..d221179d0f1a 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -1066,7 +1066,7 @@
                                reg = <0x00500000 0x80000
                                       0xf803c000 0x400>;
                                interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
-                                clocks = <&usb>, <&udphs_clk>;
+                                clocks = <&utmi>, <&udphs_clk>;
                                clock-names = "hclk", "pclk";
                                status = "disabled";
@@ -1130,7 +1130,6 @@
                                atmel,watchdog-type = "hardware";
                                atmel,reset-type = "all";
                                atmel,dbg-halt;
-                                atmel,idle-halt;
                                status = "disabled";
                        };
@@ -1186,7 +1185,7 @@
                        compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
                        reg = <0x00700000 0x100000>;
                        interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
-                        clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
+                        clocks = <&utmi>, <&uhphs_clk>, <&uhpck>;
                        clock-names = "usb_clk", "ehci_clk", "uhpck";
                        status = "disabled";
                };
diff --git a/arch/arm/boot/dts/dm8168-evm.dts b/arch/arm/boot/dts/dm8168-evm.dts
index 857d0289ad4d..d3a29c1b8417 100644
--- a/arch/arm/boot/dts/dm8168-evm.dts
+++ b/arch/arm/boot/dts/dm8168-evm.dts
@@ -35,6 +35,18 @@
                        DM816X_IOPAD(0x0aac, PIN_INPUT | MUX_MODE0)     /* SPI_D1 */
                >;
        };
+        usb0_pins: pinmux_usb0_pins {
+                pinctrl-single,pins = <
+                        DM816X_IOPAD(0x0d00, MUX_MODE0)                 /* USB0_DRVVBUS */
+                >;
+        };
+        usb1_pins: pinmux_usb0_pins {
+                pinctrl-single,pins = <
+                        DM816X_IOPAD(0x0d04, MUX_MODE0)                 /* USB1_DRVVBUS */
+                >;
+        };
 };
 &i2c1 {
@@ -127,3 +139,16 @@
 &mmc1 {
        vmmc-supply = <&vmmcsd_fixed>;
 };
+/* At least dm8168-evm rev c won't support multipoint, later may */
+&usb0 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&usb0_pins>;
+        mentor,multipoint = <0>;
+};
+&usb1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&usb1_pins>;
+        mentor,multipoint = <0>;
+};
diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi
index d98d0f7de380..3c97b5f2addc 100644
--- a/arch/arm/boot/dts/dm816x.dtsi
+++ b/arch/arm/boot/dts/dm816x.dtsi
@@ -97,10 +97,31 @@
                        /* Device Configuration Registers */
                        scm_conf: syscon@600 {
-                                compatible = "syscon";
+                                compatible = "syscon", "simple-bus";
                                reg = <0x600 0x110>;
                                #address-cells = <1>;
                                #size-cells = <1>;
+                                ranges = <0 0x600 0x110>;
+                                usb_phy0: usb-phy@20 {
+                                        compatible = "ti,dm8168-usb-phy";
+                                        reg = <0x20 0x8>;
+                                        reg-names = "phy";
+                                        clocks = <&main_fapll 6>;
+                                        clock-names = "refclk";
+                                        #phy-cells = <0>;
+                                        syscon = <&scm_conf>;
+                                };
+                                usb_phy1: usb-phy@28 {
+                                        compatible = "ti,dm8168-usb-phy";
+                                        reg = <0x28 0x8>;
+                                        reg-names = "phy";
+                                        clocks = <&main_fapll 6>;
+                                        clock-names = "refclk";
+                                        #phy-cells = <0>;
+                                        syscon = <&scm_conf>;
+                                };
                        };
                        scrm_clocks: clocks {
@@ -357,7 +378,10 @@
                                reg-names = "mc", "control";
                                interrupts = <18>;
                                interrupt-names = "mc";
-                                dr_mode = "otg";
+                                dr_mode = "host";
+                                interface-type = <0>;
+                                phys = <&usb_phy0>;
+                                phy-names = "usb2-phy";
                                mentor,multipoint = <1>;
                                mentor,num-eps = <16>;
                                mentor,ram-bits = <12>;
@@ -366,13 +390,15 @@
                        usb1: usb@47401800 {
                                compatible = "ti,musb-am33xx";
-                                status = "disabled";
                                reg = <0x47401c00 0x400
                                       0x47401800 0x200>;
                                reg-names = "mc", "control";
                                interrupts = <19>;
                                interrupt-names = "mc";
-                                dr_mode = "otg";
+                                dr_mode = "host";
+                                interface-type = <0>;
+                                phys = <&usb_phy1>;
+                                phy-names = "usb2-phy";
                                mentor,multipoint = <1>;
                                mentor,num-eps = <16>;
                                mentor,ram-bits = <12>;
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 746cddb1b8f5..7563d7ce01bb 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -263,17 +263,15 @@
        dcan1_pins_default: dcan1_pins_default {
                pinctrl-single,pins = <
-                        0x3d0   (PIN_OUTPUT | MUX_MODE0) /* dcan1_tx */
+                        0x3d0   (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
-                        0x3d4   (MUX_MODE15)            /* dcan1_rx.off */
+                        0x418   (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
-                        0x418   (PULL_DIS | MUX_MODE1) /* wakeup0.dcan1_rx */
                >;
        };
        dcan1_pins_sleep: dcan1_pins_sleep {
                pinctrl-single,pins = <
-                        0x3d0   (MUX_MODE15)    /* dcan1_tx.off */
+                        0x3d0   (MUX_MODE15 | PULL_UP)  /* dcan1_tx.off */
-                        0x3d4   (MUX_MODE15)    /* dcan1_rx.off */
+                        0x418   (MUX_MODE15 | PULL_UP)  /* wakeup0.off */
-                        0x418   (MUX_MODE15)    /* wakeup0.off */
                >;
        };
 };
@@ -543,14 +541,6 @@
        };
 };
-&omap_dwc3_1 {
-        extcon = <&extcon_usb1>;
-};
-&omap_dwc3_2 {
-        extcon = <&extcon_usb2>;
-};
 &usb1 {
        dr_mode = "peripheral";
        pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 5827fedafd43..127608d79033 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -249,8 +249,8 @@
                                     <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-cells = <1>;
-                        #dma-channels = <32>;
+                        dma-channels = <32>;
-                        #dma-requests = <127>;
+                        dma-requests = <127>;
                };
                gpio1: gpio@4ae10000 {
@@ -1090,8 +1090,8 @@
                                      <0x4A096800 0x40>; /* pll_ctrl */
                                reg-names = "phy_rx", "phy_tx", "pll_ctrl";
                                ctrl-module = <&omap_control_sata>;
-                                clocks = <&sys_clkin1>;
+                                clocks = <&sys_clkin1>, <&sata_ref_clk>;
-                                clock-names = "sysclk";
+                                clock-names = "sysclk", "refclk";
                                #phy-cells = <0>;
                        };
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 4d8711713610..40ed539ce474 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -119,17 +119,15 @@
        dcan1_pins_default: dcan1_pins_default {
                pinctrl-single,pins = <
-                        0x3d0   (PIN_OUTPUT | MUX_MODE0) /* dcan1_tx */
+                        0x3d0   (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
-                        0x3d4   (MUX_MODE15)            /* dcan1_rx.off */
+                        0x418   (PULL_UP | MUX_MODE1)   /* wakeup0.dcan1_rx */
-                        0x418   (PULL_DIS | MUX_MODE1) /* wakeup0.dcan1_rx */
                >;
        };
        dcan1_pins_sleep: dcan1_pins_sleep {
                pinctrl-single,pins = <
-                        0x3d0   (MUX_MODE15)    /* dcan1_tx.off */
+                        0x3d0   (MUX_MODE15 | PULL_UP)  /* dcan1_tx.off */
-                        0x3d4   (MUX_MODE15)    /* dcan1_rx.off */
+                        0x418   (MUX_MODE15 | PULL_UP)  /* wakeup0.off */
-                        0x418   (MUX_MODE15)    /* wakeup0.off */
                >;
        };
@@ -380,14 +378,6 @@
        phy-supply = <&ldo4_reg>;
 };
-&omap_dwc3_1 {
-        extcon = <&extcon_usb1>;
-};
-&omap_dwc3_2 {
-        extcon = <&extcon_usb2>;
-};
 &usb1 {
        dr_mode = "peripheral";
        pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index 4bdcbd61ce47..99b09a44e269 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -243,10 +243,18 @@
                ti,invert-autoidle-bit;
        };
+        dpll_core_byp_mux: dpll_core_byp_mux {
+                #clock-cells = <0>;
+                compatible = "ti,mux-clock";
+                clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
+                ti,bit-shift = <23>;
+                reg = <0x012c>;
+        };
        dpll_core_ck: dpll_core_ck {
                #clock-cells = <0>;
                compatible = "ti,omap4-dpll-core-clock";
-                clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
+                clocks = <&sys_clkin1>, <&dpll_core_byp_mux>;
                reg = <0x0120>, <0x0124>, <0x012c>, <0x0128>;
        };
@@ -309,10 +317,18 @@
                clock-div = <1>;
        };
+        dpll_dsp_byp_mux: dpll_dsp_byp_mux {
+                #clock-cells = <0>;
+                compatible = "ti,mux-clock";
+                clocks = <&sys_clkin1>, <&dsp_dpll_hs_clk_div>;
+                ti,bit-shift = <23>;
+                reg = <0x0240>;
+        };
        dpll_dsp_ck: dpll_dsp_ck {
                #clock-cells = <0>;
                compatible = "ti,omap4-dpll-clock";
-                clocks = <&sys_clkin1>, <&dsp_dpll_hs_clk_div>;
+                clocks = <&sys_clkin1>, <&dpll_dsp_byp_mux>;
                reg = <0x0234>, <0x0238>, <0x0240>, <0x023c>;
        };
@@ -335,10 +351,18 @@
                clock-div = <1>;
        };
+        dpll_iva_byp_mux: dpll_iva_byp_mux {
+                #clock-cells = <0>;
+                compatible = "ti,mux-clock";
+                clocks = <&sys_clkin1>, <&iva_dpll_hs_clk_div>;
+                ti,bit-shift = <23>;
+                reg = <0x01ac>;
+        };
        dpll_iva_ck: dpll_iva_ck {
                #clock-cells = <0>;
                compatible = "ti,omap4-dpll-clock";
-                clocks = <&sys_clkin1>, <&iva_dpll_hs_clk_div>;
+                clocks = <&sys_clkin1>, <&dpll_iva_byp_mux>;
                reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>;
        };
@@ -361,10 +385,18 @@
                clock-div = <1>;
        };
+        dpll_gpu_byp_mux: dpll_gpu_byp_mux {
+                #clock-cells = <0>;
+                compatible = "ti,mux-clock";
+                clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
+                ti,bit-shift = <23>;
+                reg = <0x02e4>;
+        };
        dpll_gpu_ck: dpll_gpu_ck {
                #clock-cells = <0>;
                compatible = "ti,omap4-dpll-clock";
-                clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
+                clocks = <&sys_clkin1>, <&dpll_gpu_byp_mux>;
                reg = <0x02d8>, <0x02dc>, <0x02e4>, <0x02e0>;
        };
@@ -398,10 +430,18 @@
                clock-div = <1>;
        };
+        dpll_ddr_byp_mux: dpll_ddr_byp_mux {
+                #clock-cells = <0>;
+                compatible = "ti,mux-clock";
+                clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
+                ti,bit-shift = <23>;
+                reg = <0x021c>;
+        };
        dpll_ddr_ck: dpll_ddr_ck {
                #clock-cells = <0>;
                compatible = "ti,omap4-dpll-clock";
-                clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
+                clocks = <&sys_clkin1>, <&dpll_ddr_byp_mux>;
                reg = <0x0210>, <0x0214>, <0x021c>, <0x0218>;
        };
@@ -416,10 +456,18 @@
                ti,invert-autoidle-bit;
        };
+        dpll_gmac_byp_mux: dpll_gmac_byp_mux {
+                #clock-cells = <0>;
+                compatible = "ti,mux-clock";
+                clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
+                ti,bit-shift = <23>;
+                reg = <0x02b4>;
+        };
        dpll_gmac_ck: dpll_gmac_ck {
                #clock-cells = <0>;
                compatible = "ti,omap4-dpll-clock";
-                clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
+                clocks = <&sys_clkin1>, <&dpll_gmac_byp_mux>;
                reg = <0x02a8>, <0x02ac>, <0x02b4>, <0x02b0>;
        };
@@ -482,10 +530,18 @@
                clock-div = <1>;
        };
+        dpll_eve_byp_mux: dpll_eve_byp_mux {
+                #clock-cells = <0>;
+                compatible = "ti,mux-clock";
+                clocks = <&sys_clkin1>, <&eve_dpll_hs_clk_div>;
+                ti,bit-shift = <23>;
+                reg = <0x0290>;
+        };
        dpll_eve_ck: dpll_eve_ck {
                #clock-cells = <0>;
                compatible = "ti,omap4-dpll-clock";
-                clocks = <&sys_clkin1>, <&eve_dpll_hs_clk_div>;
+                clocks = <&sys_clkin1>, <&dpll_eve_byp_mux>;
                reg = <0x0284>, <0x0288>, <0x0290>, <0x028c>;
        };
@@ -1249,10 +1305,18 @@
                clock-div = <1>;
        };
+        dpll_per_byp_mux: dpll_per_byp_mux {
+                #clock-cells = <0>;
+                compatible = "ti,mux-clock";
+                clocks = <&sys_clkin1>, <&per_dpll_hs_clk_div>;
+                ti,bit-shift = <23>;
+                reg = <0x014c>;
+        };
        dpll_per_ck: dpll_per_ck {
                #clock-cells = <0>;
                compatible = "ti,omap4-dpll-clock";
-                clocks = <&sys_clkin1>, <&per_dpll_hs_clk_div>;
+                clocks = <&sys_clkin1>, <&dpll_per_byp_mux>;
                reg = <0x0140>, <0x0144>, <0x014c>, <0x0148>;
        };
@@ -1275,10 +1339,18 @@
                clock-div = <1>;
        };
+        dpll_usb_byp_mux: dpll_usb_byp_mux {
+                #clock-cells = <0>;
+                compatible = "ti,mux-clock";
+                clocks = <&sys_clkin1>, <&usb_dpll_hs_clk_div>;
+                ti,bit-shift = <23>;
+                reg = <0x018c>;
+        };
        dpll_usb_ck: dpll_usb_ck {
                #clock-cells = <0>;
                compatible = "ti,omap4-dpll-j-type-clock";
-                clocks = <&sys_clkin1>, <&usb_dpll_hs_clk_div>;
+                clocks = <&sys_clkin1>, <&dpll_usb_byp_mux>;
                reg = <0x0180>, <0x0184>, <0x018c>, <0x0188>;
        };
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 277b48b0b6f9..ac6b0ae42caf 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -18,6 +18,7 @@
 */
 #include "skeleton.dtsi"
+#include "exynos4-cpu-thermal.dtsi"
 #include <dt-bindings/clock/exynos3250.h>
 / {
@@ -193,6 +194,7 @@
                        interrupts = <0 216 0>;
                        clocks = <&cmu CLK_TMU_APBIF>;
                        clock-names = "tmu_apbif";
+                        #include "exynos4412-tmu-sensor-conf.dtsi"
                        status = "disabled";
                };
diff --git a/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi b/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi
new file mode 100644
index 000000000000..735cb2f10817
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi
@@ -0,0 +1,52 @@
+/*
+ * Device tree sources for Exynos4 thermal zone
+ *
+ * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <dt-bindings/thermal/thermal.h>
+/ {
+thermal-zones {
+        cpu_thermal: cpu-thermal {
+                thermal-sensors = <&tmu 0>;
+                polling-delay-passive = <0>;
+                polling-delay = <0>;
+                trips {
+                        cpu_alert0: cpu-alert-0 {
+                                temperature = <70000>; /* millicelsius */
+                                hysteresis = <10000>; /* millicelsius */
+                                type = "active";
+                        };
+                        cpu_alert1: cpu-alert-1 {
+                                temperature = <95000>; /* millicelsius */
+                                hysteresis = <10000>; /* millicelsius */
+                                type = "active";
+                        };
+                        cpu_alert2: cpu-alert-2 {
+                                temperature = <110000>; /* millicelsius */
+                                hysteresis = <10000>; /* millicelsius */
+                                type = "active";
+                        };
+                        cpu_crit0: cpu-crit-0 {
+                                temperature = <120000>; /* millicelsius */
+                                hysteresis = <0>; /* millicelsius */
+                                type = "critical";
+                        };
+                };
+                cooling-maps {
+                        map0 {
+                                trip = <&cpu_alert0>;
+                        };
+                        map1 {
+                                trip = <&cpu_alert1>;
+                        };
+                };
+        };
+};
+};
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 76173cacd450..77ea547768f4 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -38,6 +38,7 @@
                i2c5 = &i2c_5;
                i2c6 = &i2c_6;
                i2c7 = &i2c_7;
+                i2c8 = &i2c_8;
                csis0 = &csis_0;
                csis1 = &csis_1;
                fimc0 = &fimc_0;
@@ -104,6 +105,7 @@
                compatible = "samsung,exynos4210-pd";
                reg = <0x10023C20 0x20>;
                #power-domain-cells = <0>;
+                power-domains = <&pd_lcd0>;
        };
        pd_cam: cam-power-domain@10023C00 {
@@ -554,6 +556,22 @@
                status = "disabled";
        };
+        i2c_8: i2c@138E0000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                compatible = "samsung,s3c2440-hdmiphy-i2c";
+                reg = <0x138E0000 0x100>;
+                interrupts = <0 93 0>;
+                clocks = <&clock CLK_I2C_HDMI>;
+                clock-names = "i2c";
+                status = "disabled";
+                hdmi_i2c_phy: hdmiphy@38 {
+                        compatible = "exynos4210-hdmiphy";
+                        reg = <0x38>;
+                };
+        };
        spi_0: spi@13920000 {
                compatible = "samsung,exynos4210-spi";
                reg = <0x13920000 0x100>;
@@ -663,6 +681,33 @@
                status = "disabled";
        };
+        tmu: tmu@100C0000 {
+                #include "exynos4412-tmu-sensor-conf.dtsi"
+        };
+        hdmi: hdmi@12D00000 {
+                compatible = "samsung,exynos4210-hdmi";
+                reg = <0x12D00000 0x70000>;
+                interrupts = <0 92 0>;
+                clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy",
+                        "mout_hdmi";
+                clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
+                        <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
+                        <&clock CLK_MOUT_HDMI>;
+                phy = <&hdmi_i2c_phy>;
+                power-domains = <&pd_tv>;
+                samsung,syscon-phandle = <&pmu_system_controller>;
+                status = "disabled";
+        };
+        mixer: mixer@12C10000 {
+                compatible = "samsung,exynos4210-mixer";
+                interrupts = <0 91 0>;
+                reg = <0x12C10000 0x2100>, <0x12c00000 0x300>;
+                power-domains = <&pd_tv>;
+                status = "disabled";
+        };
        ppmu_dmc0: ppmu_dmc0@106a0000 {
                compatible = "samsung,exynos-ppmu";
                reg = <0x106a0000 0x2000>;
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index 3d6652a4b6cb..32c5fd8f6269 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -426,6 +426,25 @@
                status = "okay";
        };
+        tmu@100C0000 {
+                status = "okay";
+        };
+        thermal-zones {
+                cpu_thermal: cpu-thermal {
+                        cooling-maps {
+                                map0 {
+                                     /* Corresponds to 800MHz at freq_table */
+                                     cooling-device = <&cpu0 2 2>;
+                                };
+                                map1 {
+                                     /* Corresponds to 200MHz at freq_table */
+                                     cooling-device = <&cpu0 4 4>;
+                               };
+                       };
+                };
+        };
        camera {
                pinctrl-names = "default";
                pinctrl-0 = <>;
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index b57e6b82ea20..d4f2b11319dd 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -505,6 +505,63 @@
                        assigned-clock-rates = <0>, <160000000>;
                };
        };
+        hdmi_en: voltage-regulator-hdmi-5v {
+                compatible = "regulator-fixed";
+                regulator-name = "HDMI_5V";
+                regulator-min-microvolt = <5000000>;
+                regulator-max-microvolt = <5000000>;
+                gpio = <&gpe0 1 0>;
+                enable-active-high;
+        };
+        hdmi_ddc: i2c-ddc {
+                compatible = "i2c-gpio";
+                gpios = <&gpe4 2 0 &gpe4 3 0>;
+                i2c-gpio,delay-us = <100>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                pinctrl-0 = <&i2c_ddc_bus>;
+                pinctrl-names = "default";
+                status = "okay";
+        };
+        mixer@12C10000 {
+                status = "okay";
+        };
+        hdmi@12D00000 {
+                hpd-gpio = <&gpx3 7 0>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&hdmi_hpd>;
+                hdmi-en-supply = <&hdmi_en>;
+                vdd-supply = <&ldo3_reg>;
+                vdd_osc-supply = <&ldo4_reg>;
+                vdd_pll-supply = <&ldo3_reg>;
+                ddc = <&hdmi_ddc>;
+                status = "okay";
+        };
+        i2c@138E0000 {
+                status = "okay";
+        };
+};
+&pinctrl_1 {
+        hdmi_hpd: hdmi-hpd {
+                samsung,pins = "gpx3-7";
+                samsung,pin-pud = <0>;
+        };
+};
+&pinctrl_0 {
+        i2c_ddc_bus: i2c-ddc-bus {
+                samsung,pins = "gpe4-2", "gpe4-3";
+                samsung,pin-function = <2>;
+                samsung,pin-pud = <3>;
+                samsung,pin-drv = <0>;
+        };
 };
 &mdma1 {
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 67c832c9dcf1..be89f83f70e7 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -21,6 +21,7 @@
 #include "exynos4.dtsi"
 #include "exynos4210-pinctrl.dtsi"
+#include "exynos4-cpu-thermal.dtsi"
 / {
        compatible = "samsung,exynos4210", "samsung,exynos4";
@@ -35,10 +36,13 @@
                #address-cells = <1>;
                #size-cells = <0>;
-                cpu@900 {
+                cpu0: cpu@900 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0x900>;
+                        cooling-min-level = <4>;
+                        cooling-max-level = <2>;
+                        #cooling-cells = <2>; /* min followed by max */
                };
                cpu@901 {
@@ -153,16 +157,38 @@
                reg = <0x03860000 0x1000>;
        };
-        tmu@100C0000 {
+        tmu: tmu@100C0000 {
                compatible = "samsung,exynos4210-tmu";
                interrupt-parent = <&combiner>;
                reg = <0x100C0000 0x100>;
                interrupts = <2 4>;
                clocks = <&clock CLK_TMU_APBIF>;
                clock-names = "tmu_apbif";
+                samsung,tmu_gain = <15>;
+                samsung,tmu_reference_voltage = <7>;
                status = "disabled";
        };
+        thermal-zones {
+                cpu_thermal: cpu-thermal {
+                        polling-delay-passive = <0>;
+                        polling-delay = <0>;
+                        thermal-sensors = <&tmu 0>;
+                        trips {
+                              cpu_alert0: cpu-alert-0 {
+                                      temperature = <85000>; /* millicelsius */
+                              };
+                              cpu_alert1: cpu-alert-1 {
+                                      temperature = <100000>; /* millicelsius */
+                              };
+                              cpu_alert2: cpu-alert-2 {
+                                      temperature = <110000>; /* millicelsius */
+                              };
+                        };
+                };
+        };
        g2d@12800000 {
                compatible = "samsung,s5pv210-g2d";
                reg = <0x12800000 0x1000>;
@@ -203,6 +229,14 @@
                };
        };
+        mixer: mixer@12C10000 {
+                clock-names = "mixer", "hdmi", "sclk_hdmi", "vp", "mout_mixer",
+                        "sclk_mixer";
+                clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
+                        <&clock CLK_SCLK_HDMI>, <&clock CLK_VP>,
+                        <&clock CLK_MOUT_MIXER>, <&clock CLK_SCLK_MIXER>;
+        };
        ppmu_lcd1: ppmu_lcd1@12240000 {
                compatible = "samsung,exynos-ppmu";
                reg = <0x12240000 0x2000>;
diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi
index dd0a43ec56da..5be03288f1ee 100644
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -26,10 +26,13 @@
                #address-cells = <1>;
                #size-cells = <0>;
-                cpu@A00 {
+                cpu0: cpu@A00 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0xA00>;
+                        cooling-min-level = <13>;
+                        cooling-max-level = <7>;
+                        #cooling-cells = <2>; /* min followed by max */
                };
                cpu@A01 {
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index de80b5bba204..adb4f6a97a1d 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -249,6 +249,20 @@
                                        regulator-always-on;
                                };
+                                ldo8_reg: ldo@8 {
+                                        regulator-compatible = "LDO8";
+                                        regulator-name = "VDD10_HDMI_1.0V";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1000000>;
+                                };
+                                ldo10_reg: ldo@10 {
+                                        regulator-compatible = "LDO10";
+                                        regulator-name = "VDDQ_MIPIHSI_1.8V";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                };
                                ldo11_reg: LDO11 {
                                        regulator-name = "VDD18_ABB1_1.8V";
                                        regulator-min-microvolt = <1800000>;
@@ -411,6 +425,51 @@
        ehci: ehci@12580000 {
                status = "okay";
        };
+        tmu@100C0000 {
+                vtmu-supply = <&ldo10_reg>;
+                status = "okay";
+        };
+        thermal-zones {
+                cpu_thermal: cpu-thermal {
+                        cooling-maps {
+                                map0 {
+                                     /* Corresponds to 800MHz at freq_table */
+                                     cooling-device = <&cpu0 7 7>;
+                                };
+                                map1 {
+                                     /* Corresponds to 200MHz at freq_table */
+                                     cooling-device = <&cpu0 13 13>;
+                               };
+                       };
+                };
+        };
+        mixer: mixer@12C10000 {
+                status = "okay";
+        };
+        hdmi@12D00000 {
+                hpd-gpio = <&gpx3 7 0>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&hdmi_hpd>;
+                vdd-supply = <&ldo8_reg>;
+                vdd_osc-supply = <&ldo10_reg>;
+                vdd_pll-supply = <&ldo8_reg>;
+                ddc = <&hdmi_ddc>;
+                status = "okay";
+        };
+        hdmi_ddc: i2c@13880000 {
+                status = "okay";
+                pinctrl-names = "default";
+                pinctrl-0 = <&i2c2_bus>;
+        };
+        i2c@138E0000 {
+                status = "okay";
+        };
 };
 &pinctrl_1 {
@@ -425,4 +484,9 @@
                samsung,pin-pud = <0>;
                samsung,pin-drv = <0>;
        };
+        hdmi_hpd: hdmi-hpd {
+                samsung,pins = "gpx3-7";
+                samsung,pin-pud = <1>;
+        };
 };
diff --git a/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi b/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi
new file mode 100644
index 000000000000..e3f7934d19d0
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi
@@ -0,0 +1,24 @@
+/*
+ * Device tree sources for Exynos4412 TMU sensor configuration
+ *
+ * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <dt-bindings/thermal/thermal_exynos.h>
+#thermal-sensor-cells = <0>;
+samsung,tmu_gain = <8>;
+samsung,tmu_reference_voltage = <16>;
+samsung,tmu_noise_cancel_mode = <4>;
+samsung,tmu_efuse_value = <55>;
+samsung,tmu_min_efuse_value = <40>;
+samsung,tmu_max_efuse_value = <100>;
+samsung,tmu_first_point_trim = <25>;
+samsung,tmu_second_point_trim = <85>;
+samsung,tmu_default_temp_offset = <50>;
+samsung,tmu_cal_type = <TYPE_ONE_POINT_TRIMMING>;
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index 21f748083586..173ffa479ad3 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -927,6 +927,21 @@
                pulldown-ohm = <100000>; /* 100K */
                io-channels = <&adc 2>;  /* Battery temperature */
        };
+        thermal-zones {
+                cpu_thermal: cpu-thermal {
+                        cooling-maps {
+                                map0 {
+                                     /* Corresponds to 800MHz at freq_table */
+                                     cooling-device = <&cpu0 7 7>;
+                                };
+                                map1 {
+                                     /* Corresponds to 200MHz at freq_table */
+                                     cooling-device = <&cpu0 13 13>;
+                               };
+                       };
+                };
+        };
 };
 &pmu_system_controller {
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 0f6ec93bb1d8..68ad43b391ae 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -26,10 +26,13 @@
                #address-cells = <1>;
                #size-cells = <0>;
-                cpu@A00 {
+                cpu0: cpu@A00 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0xA00>;
+                        cooling-min-level = <13>;
+                        cooling-max-level = <7>;
+                        #cooling-cells = <2>; /* min followed by max */
                };
                cpu@A01 {
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index f5e0ae780d6c..6a6abe14fd9b 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -19,6 +19,7 @@
 #include "exynos4.dtsi"
 #include "exynos4x12-pinctrl.dtsi"
+#include "exynos4-cpu-thermal.dtsi"
 / {
        aliases {
@@ -297,4 +298,15 @@
                clock-names = "tmu_apbif";
                status = "disabled";
        };
+        hdmi: hdmi@12D00000 {
+                compatible = "samsung,exynos4212-hdmi";
+        };
+        mixer: mixer@12C10000 {
+                compatible = "samsung,exynos4212-mixer";
+                clock-names = "mixer", "hdmi", "sclk_hdmi", "vp";
+                clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
+                         <&clock CLK_SCLK_HDMI>, <&clock CLK_VP>;
+        };
 };
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 9bb1b0b738f5..adbde1adad95 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -20,7 +20,7 @@
 #include <dt-bindings/clock/exynos5250.h>
 #include "exynos5.dtsi"
 #include "exynos5250-pinctrl.dtsi"
+#include "exynos4-cpu-thermal.dtsi"
 #include <dt-bindings/clock/exynos-audss-clk.h>
 / {
@@ -58,11 +58,14 @@
                #address-cells = <1>;
                #size-cells = <0>;
-                cpu@0 {
+                cpu0: cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a15";
                        reg = <0>;
                        clock-frequency = <1700000000>;
+                        cooling-min-level = <15>;
+                        cooling-max-level = <9>;
+                        #cooling-cells = <2>; /* min followed by max */
                };
                cpu@1 {
                        device_type = "cpu";
@@ -102,6 +105,12 @@
                #power-domain-cells = <0>;
        };
+        pd_disp1: disp1-power-domain@100440A0 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x100440A0 0x20>;
+                #power-domain-cells = <0>;
+        };
        clock: clock-controller@10010000 {
                compatible = "samsung,exynos5250-clock";
                reg = <0x10010000 0x30000>;
@@ -235,12 +244,32 @@
                status = "disabled";
        };
-        tmu@10060000 {
+        tmu: tmu@10060000 {
                compatible = "samsung,exynos5250-tmu";
                reg = <0x10060000 0x100>;
                interrupts = <0 65 0>;
                clocks = <&clock CLK_TMU>;
                clock-names = "tmu_apbif";
+                #include "exynos4412-tmu-sensor-conf.dtsi"
+        };
+        thermal-zones {
+                cpu_thermal: cpu-thermal {
+                        polling-delay-passive = <0>;
+                        polling-delay = <0>;
+                        thermal-sensors = <&tmu 0>;
+                        cooling-maps {
+                                map0 {
+                                     /* Corresponds to 800MHz at freq_table */
+                                     cooling-device = <&cpu0 9 9>;
+                                };
+                                map1 {
+                                     /* Corresponds to 200MHz at freq_table */
+                                     cooling-device = <&cpu0 15 15>;
+                               };
+                       };
+                };
        };
        serial@12C00000 {
@@ -719,6 +748,7 @@
        hdmi: hdmi {
                compatible = "samsung,exynos4212-hdmi";
                reg = <0x14530000 0x70000>;
+                power-domains = <&pd_disp1>;
                interrupts = <0 95 0>;
                clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
                         <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
@@ -731,9 +761,11 @@
        mixer {
                compatible = "samsung,exynos5250-mixer";
                reg = <0x14450000 0x10000>;
+                power-domains = <&pd_disp1>;
                interrupts = <0 94 0>;
-                clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>;
+                clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
-                clock-names = "mixer", "sclk_hdmi";
+                         <&clock CLK_SCLK_HDMI>;
+                clock-names = "mixer", "hdmi", "sclk_hdmi";
        };
        dp_phy: video-phy@10040720 {
@@ -743,6 +775,7 @@
        };
        dp: dp-controller@145B0000 {
+                power-domains = <&pd_disp1>;
                clocks = <&clock CLK_DP>;
                clock-names = "dp";
                phys = <&dp_phy>;
@@ -750,6 +783,7 @@
        };
        fimd: fimd@14400000 {
+                power-domains = <&pd_disp1>;
                clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
                clock-names = "sclk_fimd", "fimd";
        };
diff --git a/arch/arm/boot/dts/exynos5420-trip-points.dtsi b/arch/arm/boot/dts/exynos5420-trip-points.dtsi
new file mode 100644
index 000000000000..5d31fc140823
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5420-trip-points.dtsi
@@ -0,0 +1,35 @@
+/*
+ * Device tree sources for default Exynos5420 thermal zone definition
+ *
+ * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+polling-delay-passive = <0>;
+polling-delay = <0>;
+trips {
+        cpu-alert-0 {
+                temperature = <85000>; /* millicelsius */
+                hysteresis = <10000>; /* millicelsius */
+                type = "active";
+        };
+        cpu-alert-1 {
+                temperature = <103000>; /* millicelsius */
+                hysteresis = <10000>; /* millicelsius */
+                type = "active";
+        };
+        cpu-alert-2 {
+                temperature = <110000>; /* millicelsius */
+                hysteresis = <10000>; /* millicelsius */
+                type = "active";
+        };
+        cpu-crit-0 {
+                temperature = <1200000>; /* millicelsius */
+                hysteresis = <0>; /* millicelsius */
+                type = "critical";
+        };
+};
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 9dc2e9773b30..c0e98cf3514f 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -740,8 +740,9 @@
                compatible = "samsung,exynos5420-mixer";
                reg = <0x14450000 0x10000>;
                interrupts = <0 94 0>;
-                clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>;
+                clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
-                clock-names = "mixer", "sclk_hdmi";
+                         <&clock CLK_SCLK_HDMI>;
+                clock-names = "mixer", "hdmi", "sclk_hdmi";
                power-domains = <&disp_pd>;
        };
@@ -782,6 +783,7 @@
                interrupts = <0 65 0>;
                clocks = <&clock CLK_TMU>;
                clock-names = "tmu_apbif";
+                #include "exynos4412-tmu-sensor-conf.dtsi"
        };
        tmu_cpu1: tmu@10064000 {
@@ -790,6 +792,7 @@
                interrupts = <0 183 0>;
                clocks = <&clock CLK_TMU>;
                clock-names = "tmu_apbif";
+                #include "exynos4412-tmu-sensor-conf.dtsi"
        };
        tmu_cpu2: tmu@10068000 {
@@ -798,6 +801,7 @@
                interrupts = <0 184 0>;
                clocks = <&clock CLK_TMU>, <&clock CLK_TMU>;
                clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+                #include "exynos4412-tmu-sensor-conf.dtsi"
        };
        tmu_cpu3: tmu@1006c000 {
@@ -806,6 +810,7 @@
                interrupts = <0 185 0>;
                clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>;
                clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+                #include "exynos4412-tmu-sensor-conf.dtsi"
        };
        tmu_gpu: tmu@100a0000 {
@@ -814,6 +819,30 @@
                interrupts = <0 215 0>;
                clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>;
                clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+                #include "exynos4412-tmu-sensor-conf.dtsi"
+        };
+        thermal-zones {
+                cpu0_thermal: cpu0-thermal {
+                        thermal-sensors = <&tmu_cpu0>;
+                        #include "exynos5420-trip-points.dtsi"
+                };
+                cpu1_thermal: cpu1-thermal {
+                       thermal-sensors = <&tmu_cpu1>;
+                       #include "exynos5420-trip-points.dtsi"
+                };
+                cpu2_thermal: cpu2-thermal {
+                       thermal-sensors = <&tmu_cpu2>;
+                       #include "exynos5420-trip-points.dtsi"
+                };
+                cpu3_thermal: cpu3-thermal {
+                       thermal-sensors = <&tmu_cpu3>;
+                       #include "exynos5420-trip-points.dtsi"
+                };
+                gpu_thermal: gpu-thermal {
+                       thermal-sensors = <&tmu_gpu>;
+                       #include "exynos5420-trip-points.dtsi"
+                };
        };
        watchdog: watchdog@101D0000 {
diff --git a/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi b/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi
new file mode 100644
index 000000000000..7b2fba0ae92b
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi
@@ -0,0 +1,24 @@
+/*
+ * Device tree sources for Exynos5440 TMU sensor configuration
+ *
+ * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <dt-bindings/thermal/thermal_exynos.h>
+#thermal-sensor-cells = <0>;
+samsung,tmu_gain = <5>;
+samsung,tmu_reference_voltage = <16>;
+samsung,tmu_noise_cancel_mode = <4>;
+samsung,tmu_efuse_value = <0x5d2d>;
+samsung,tmu_min_efuse_value = <16>;
+samsung,tmu_max_efuse_value = <76>;
+samsung,tmu_first_point_trim = <25>;
+samsung,tmu_second_point_trim = <70>;
+samsung,tmu_default_temp_offset = <25>;
+samsung,tmu_cal_type = <TYPE_ONE_POINT_TRIMMING>;
diff --git a/arch/arm/boot/dts/exynos5440-trip-points.dtsi b/arch/arm/boot/dts/exynos5440-trip-points.dtsi
new file mode 100644
index 000000000000..48adfa8f4300
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5440-trip-points.dtsi
@@ -0,0 +1,25 @@
+/*
+ * Device tree sources for default Exynos5440 thermal zone definition
+ *
+ * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+polling-delay-passive = <0>;
+polling-delay = <0>;
+trips {
+        cpu-alert-0 {
+                temperature = <100000>; /* millicelsius */
+                hysteresis = <0>; /* millicelsius */
+                type = "active";
+        };
+        cpu-crit-0 {
+                temperature = <1050000>; /* millicelsius */
+                hysteresis = <0>; /* millicelsius */
+                type = "critical";
+        };
+};
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 8f3373cd7b87..59d9416b3b03 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -219,6 +219,7 @@
                interrupts = <0 58 0>;
                clocks = <&clock CLK_B_125>;
                clock-names = "tmu_apbif";
+                #include "exynos5440-tmu-sensor-conf.dtsi"
        };
        tmuctrl_1: tmuctrl@16011C {
@@ -227,6 +228,7 @@
                interrupts = <0 58 0>;
                clocks = <&clock CLK_B_125>;
                clock-names = "tmu_apbif";
+                #include "exynos5440-tmu-sensor-conf.dtsi"
        };
        tmuctrl_2: tmuctrl@160120 {
@@ -235,6 +237,22 @@
                interrupts = <0 58 0>;
                clocks = <&clock CLK_B_125>;
                clock-names = "tmu_apbif";
+                #include "exynos5440-tmu-sensor-conf.dtsi"
+        };
+        thermal-zones {
+                cpu0_thermal: cpu0-thermal {
+                        thermal-sensors = <&tmuctrl_0>;
+                        #include "exynos5440-trip-points.dtsi"
+                };
+                cpu1_thermal: cpu1-thermal {
+                       thermal-sensors = <&tmuctrl_1>;
+                       #include "exynos5440-trip-points.dtsi"
+                };
+                cpu2_thermal: cpu2-thermal {
+                       thermal-sensors = <&tmuctrl_2>;
+                       #include "exynos5440-trip-points.dtsi"
+                };
        };
        sata@210000 {
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index f1cd2147421d..a626e6dd8022 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -35,6 +35,7 @@
                        regulator-max-microvolt = <5000000>;
                        gpio = <&gpio3 22 0>;
                        enable-active-high;
+                        vin-supply = <&swbst_reg>;
                };
                reg_usb_h1_vbus: regulator@1 {
@@ -45,6 +46,7 @@
                        regulator-max-microvolt = <5000000>;
                        gpio = <&gpio1 29 0>;
                        enable-active-high;
+                        vin-supply = <&swbst_reg>;
                };
                reg_audio: regulator@2 {
diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
index fda4932faefd..945887d3fdb3 100644
--- a/arch/arm/boot/dts/imx6sl-evk.dts
+++ b/arch/arm/boot/dts/imx6sl-evk.dts
@@ -52,6 +52,7 @@
                        regulator-max-microvolt = <5000000>;
                        gpio = <&gpio4 0 0>;
                        enable-active-high;
+                        vin-supply = <&swbst_reg>;
                };
                reg_usb_otg2_vbus: regulator@1 {
@@ -62,6 +63,7 @@
                        regulator-max-microvolt = <5000000>;
                        gpio = <&gpio4 2 0>;
                        enable-active-high;
+                        vin-supply = <&swbst_reg>;
                };
                reg_aud3v: regulator@2 {
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index 59d1c297bb30..578fa2a54dce 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -87,8 +87,8 @@
                                     <14>,
                                     <15>;
                        #dma-cells = <1>;
-                        #dma-channels = <32>;
+                        dma-channels = <32>;
-                        #dma-requests = <64>;
+                        dma-requests = <64>;
                };
                i2c1: i2c@48070000 {
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 60403273f83e..db80f9d376fa 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -16,6 +16,13 @@
        model = "Nokia N900";
        compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
+        aliases {
+                i2c0;
+                i2c1 = &i2c1;
+                i2c2 = &i2c2;
+                i2c3 = &i2c3;
+        };
        cpus {
                cpu@0 {
                        cpu0-supply = <&vcc>;
@@ -704,7 +711,7 @@
                compatible = "smsc,lan91c94";
                interrupt-parent = <&gpio2>;
                interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;  /* gpio54 */
-                reg = <1 0x300 0xf>;            /* 16 byte IO range at offset 0x300 */
+                reg = <1 0 0xf>;                /* 16 byte IO range */
                bank-width = <2>;
                pinctrl-names = "default";
                pinctrl-0 = <&ethernet_pins>;
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 01b71111bd55..f4f78c40b564 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -155,8 +155,8 @@
                                     <14>,
                                     <15>;
                        #dma-cells = <1>;
-                        #dma-channels = <32>;
+                        dma-channels = <32>;
-                        #dma-requests = <96>;
+                        dma-requests = <96>;
                };
                omap3_pmx_core: pinmux@48002030 {
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 074147cebae4..87401d9f4d8b 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -223,8 +223,8 @@
                                     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-cells = <1>;
-                        #dma-channels = <32>;
+                        dma-channels = <32>;
-                        #dma-requests = <127>;
+                        dma-requests = <127>;
                };
                gpio1: gpio@4a310000 {
diff --git a/arch/arm/boot/dts/omap5-core-thermal.dtsi b/arch/arm/boot/dts/omap5-core-thermal.dtsi
index 19212ac6eef0..de8a3d456cf7 100644
--- a/arch/arm/boot/dts/omap5-core-thermal.dtsi
+++ b/arch/arm/boot/dts/omap5-core-thermal.dtsi
@@ -13,7 +13,7 @@
 core_thermal: core_thermal {
        polling-delay-passive = <250>; /* milliseconds */
-        polling-delay = <1000>; /* milliseconds */
+        polling-delay = <500>; /* milliseconds */
                        /* sensor       ID */
        thermal-sensors = <&bandgap     2>;
diff --git a/arch/arm/boot/dts/omap5-gpu-thermal.dtsi b/arch/arm/boot/dts/omap5-gpu-thermal.dtsi
index 1b87aca88b77..bc3090f2e84b 100644
--- a/arch/arm/boot/dts/omap5-gpu-thermal.dtsi
+++ b/arch/arm/boot/dts/omap5-gpu-thermal.dtsi
@@ -13,7 +13,7 @@
 gpu_thermal: gpu_thermal {
        polling-delay-passive = <250>; /* milliseconds */
-        polling-delay = <1000>; /* milliseconds */
+        polling-delay = <500>; /* milliseconds */
                        /* sensor       ID */
        thermal-sensors = <&bandgap     1>;
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index b321fdf42c9f..4a485b63a141 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -238,8 +238,8 @@
                                     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
                        #dma-cells = <1>;
-                        #dma-channels = <32>;
+                        dma-channels = <32>;
-                        #dma-requests = <127>;
+                        dma-requests = <127>;
                };
                gpio1: gpio@4ae10000 {
@@ -929,8 +929,8 @@
                                      <0x4A096800 0x40>; /* pll_ctrl */
                                reg-names = "phy_rx", "phy_tx", "pll_ctrl";
                                ctrl-module = <&omap_control_sata>;
-                                clocks = <&sys_clkin>;
+                                clocks = <&sys_clkin>, <&sata_ref_clk>;
-                                clock-names = "sysclk";
+                                clock-names = "sysclk", "refclk";
                                #phy-cells = <0>;
                        };
                };
@@ -1079,4 +1079,8 @@
        };
 };
+&cpu_thermal {
+        polling-delay = <500>; /* milliseconds */
+};
 /include/ "omap54xx-clocks.dtsi"
diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi
index 58c27466f012..83b425fb3ac2 100644
--- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
@@ -167,10 +167,18 @@
                ti,index-starts-at-one;
        };
+        dpll_core_byp_mux: dpll_core_byp_mux {
+                #clock-cells = <0>;
+                compatible = "ti,mux-clock";
+                clocks = <&sys_clkin>, <&dpll_abe_m3x2_ck>;
+                ti,bit-shift = <23>;
+                reg = <0x012c>;
+        };
        dpll_core_ck: dpll_core_ck {
                #clock-cells = <0>;
                compatible = "ti,omap4-dpll-core-clock";
-                clocks = <&sys_clkin>, <&dpll_abe_m3x2_ck>;
+                clocks = <&sys_clkin>, <&dpll_core_byp_mux>;
                reg = <0x0120>, <0x0124>, <0x012c>, <0x0128>;
        };
@@ -294,10 +302,18 @@
                clock-div = <1>;
        };
+        dpll_iva_byp_mux: dpll_iva_byp_mux {
+                #clock-cells = <0>;
+                compatible = "ti,mux-clock";
+                clocks = <&sys_clkin>, <&iva_dpll_hs_clk_div>;
+                ti,bit-shift = <23>;
+                reg = <0x01ac>;
+        };
        dpll_iva_ck: dpll_iva_ck {
                #clock-cells = <0>;
                compatible = "ti,omap4-dpll-clock";
-                clocks = <&sys_clkin>, <&iva_dpll_hs_clk_div>;
+                clocks = <&sys_clkin>, <&dpll_iva_byp_mux>;
                reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>;
        };
@@ -599,10 +615,19 @@
        };
 };
 &cm_core_clocks {
+        dpll_per_byp_mux: dpll_per_byp_mux {
+                #clock-cells = <0>;
+                compatible = "ti,mux-clock";
+                clocks = <&sys_clkin>, <&per_dpll_hs_clk_div>;
+                ti,bit-shift = <23>;
+                reg = <0x014c>;
+        };
        dpll_per_ck: dpll_per_ck {
                #clock-cells = <0>;
                compatible = "ti,omap4-dpll-clock";
-                clocks = <&sys_clkin>, <&per_dpll_hs_clk_div>;
+                clocks = <&sys_clkin>, <&dpll_per_byp_mux>;
                reg = <0x0140>, <0x0144>, <0x014c>, <0x0148>;
        };
@@ -714,10 +739,18 @@
                ti,index-starts-at-one;
        };
+        dpll_usb_byp_mux: dpll_usb_byp_mux {
+                #clock-cells = <0>;
+                compatible = "ti,mux-clock";
+                clocks = <&sys_clkin>, <&usb_dpll_hs_clk_div>;
+                ti,bit-shift = <23>;
+                reg = <0x018c>;
+        };
        dpll_usb_ck: dpll_usb_ck {
                #clock-cells = <0>;
                compatible = "ti,omap4-dpll-j-type-clock";
-                clocks = <&sys_clkin>, <&usb_dpll_hs_clk_div>;
+                clocks = <&sys_clkin>, <&dpll_usb_byp_mux>;
                reg = <0x0180>, <0x0184>, <0x018c>, <0x0188>;
        };
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 261311bdf65b..367af53c1b84 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -1248,7 +1248,6 @@
                                atmel,watchdog-type = "hardware";
                                atmel,reset-type = "all";
                                atmel,dbg-halt;
-                                atmel,idle-halt;
                                status = "disabled";
                        };
@@ -1416,7 +1415,7 @@
                        compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
                        reg = <0x00700000 0x100000>;
                        interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
-                        clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
+                        clocks = <&utmi>, <&uhphs_clk>, <&uhpck>;
                        clock-names = "usb_clk", "ehci_clk", "uhpck";
                        status = "disabled";
                };
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index d986b41b9654..4303874889c6 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -66,6 +66,7 @@
                gpio4 = &pioE;
                tcb0 = &tcb0;
                tcb1 = &tcb1;
+                i2c0 = &i2c0;
                i2c2 = &i2c2;
        };
        cpus {
@@ -259,7 +260,7 @@
                        compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
                        reg = <0x00600000 0x100000>;
                        interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
-                        clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
+                        clocks = <&utmi>, <&uhphs_clk>, <&uhpck>;
                        clock-names = "usb_clk", "ehci_clk", "uhpck";
                        status = "disabled";
                };
@@ -461,8 +462,8 @@
                                        lcdck: lcdck {
                                                #clock-cells = <0>;
-                                                reg = <4>;
+                                                reg = <3>;
-                                                clocks = <&smd>;
+                                                clocks = <&mck>;
                                        };
                                        smdck: smdck {
@@ -770,7 +771,7 @@
                                                reg = <50>;
                                        };
-                                        lcd_clk: lcd_clk {
+                                        lcdc_clk: lcdc_clk {
                                                #clock-cells = <0>;
                                                reg = <51>;
                                        };
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 252c3d1bda50..9d8760956752 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -713,6 +713,9 @@
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&l4_sp_clk>;
+                        dmas = <&pdma 28>,
+                               <&pdma 29>;
+                        dma-names = "tx", "rx";
                };
                uart1: serial1@ffc03000 {
@@ -722,6 +725,9 @@
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&l4_sp_clk>;
+                        dmas = <&pdma 30>,
+                               <&pdma 31>;
+                        dma-names = "tx", "rx";
                };
                rst: rstmgr@ffd05000 {
diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig
index f2670f638e97..811e72bbe642 100644
--- a/arch/arm/configs/at91_dt_defconfig
+++ b/arch/arm/configs/at91_dt_defconfig
@@ -70,6 +70,7 @@ CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 # CONFIG_SCSI_LOWLEVEL is not set
 CONFIG_NETDEVICES=y
+CONFIG_ARM_AT91_ETHER=y
 CONFIG_MACB=y
 # CONFIG_NET_VENDOR_BROADCOM is not set
 CONFIG_DM9000=y
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index e8a4c955241b..06075b6d2463 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -62,6 +62,17 @@ CONFIG_MACH_SPEAR1340=y
 CONFIG_ARCH_STI=y
 CONFIG_ARCH_EXYNOS=y
 CONFIG_EXYNOS5420_MCPM=y
+CONFIG_ARCH_SHMOBILE_MULTI=y
+CONFIG_ARCH_EMEV2=y
+CONFIG_ARCH_R7S72100=y
+CONFIG_ARCH_R8A73A4=y
+CONFIG_ARCH_R8A7740=y
+CONFIG_ARCH_R8A7779=y
+CONFIG_ARCH_R8A7790=y
+CONFIG_ARCH_R8A7791=y
+CONFIG_ARCH_R8A7794=y
+CONFIG_ARCH_SH73A0=y
+CONFIG_MACH_MARZEN=y
 CONFIG_ARCH_SUNXI=y
 CONFIG_ARCH_SIRF=y
 CONFIG_ARCH_TEGRA=y
@@ -84,9 +95,11 @@ CONFIG_PCI_KEYSTONE=y
 CONFIG_PCI_MSI=y
 CONFIG_PCI_MVEBU=y
 CONFIG_PCI_TEGRA=y
+CONFIG_PCI_RCAR_GEN2=y
+CONFIG_PCI_RCAR_GEN2_PCIE=y
 CONFIG_PCIEPORTBUS=y
 CONFIG_SMP=y
-CONFIG_NR_CPUS=8
+CONFIG_NR_CPUS=16
 CONFIG_HIGHPTE=y
 CONFIG_CMA=y
 CONFIG_ARM_APPENDED_DTB=y
@@ -130,6 +143,7 @@ CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_DMA_CMA=y
 CONFIG_CMA_SIZE_MBYTES=64
 CONFIG_OMAP_OCP2SCP=y
+CONFIG_SIMPLE_PM_BUS=y
 CONFIG_MTD=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_BLOCK=y
@@ -157,6 +171,7 @@ CONFIG_AHCI_SUNXI=y
 CONFIG_AHCI_TEGRA=y
 CONFIG_SATA_HIGHBANK=y
 CONFIG_SATA_MV=y
+CONFIG_SATA_RCAR=y
 CONFIG_NETDEVICES=y
 CONFIG_HIX5HD2_GMAC=y
 CONFIG_SUN4I_EMAC=y
@@ -167,14 +182,17 @@ CONFIG_MV643XX_ETH=y
 CONFIG_MVNETA=y
 CONFIG_KS8851=y
 CONFIG_R8169=y
+CONFIG_SH_ETH=y
 CONFIG_SMSC911X=y
 CONFIG_STMMAC_ETH=y
 CONFIG_TI_CPSW=y
 CONFIG_XILINX_EMACLITE=y
 CONFIG_AT803X_PHY=y
 CONFIG_MARVELL_PHY=y
+CONFIG_SMSC_PHY=y
 CONFIG_BROADCOM_PHY=y
 CONFIG_ICPLUS_PHY=y
+CONFIG_MICREL_PHY=y
 CONFIG_USB_PEGASUS=y
 CONFIG_USB_USBNET=y
 CONFIG_USB_NET_SMSC75XX=y
@@ -192,15 +210,18 @@ CONFIG_KEYBOARD_CROS_EC=y
 CONFIG_MOUSE_PS2_ELANTECH=y
 CONFIG_INPUT_TOUCHSCREEN=y
 CONFIG_TOUCHSCREEN_ATMEL_MXT=y
+CONFIG_TOUCHSCREEN_ST1232=m
 CONFIG_TOUCHSCREEN_STMPE=y
 CONFIG_TOUCHSCREEN_SUN4I=y
 CONFIG_INPUT_MISC=y
 CONFIG_INPUT_MPU3050=y
 CONFIG_INPUT_AXP20X_PEK=y
+CONFIG_INPUT_ADXL34X=m
 CONFIG_SERIO_AMBAKMI=y
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_DW=y
+CONFIG_SERIAL_8250_EM=y
 CONFIG_SERIAL_8250_MT6577=y
 CONFIG_SERIAL_AMBA_PL011=y
 CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
@@ -213,6 +234,9 @@ CONFIG_SERIAL_SIRFSOC_CONSOLE=y
 CONFIG_SERIAL_TEGRA=y
 CONFIG_SERIAL_IMX=y
 CONFIG_SERIAL_IMX_CONSOLE=y
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=20
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
 CONFIG_SERIAL_MSM=y
 CONFIG_SERIAL_MSM_CONSOLE=y
 CONFIG_SERIAL_VT8500=y
@@ -233,19 +257,26 @@ CONFIG_I2C_MUX_PCA954x=y
 CONFIG_I2C_MUX_PINCTRL=y
 CONFIG_I2C_CADENCE=y
 CONFIG_I2C_DESIGNWARE_PLATFORM=y
+CONFIG_I2C_GPIO=m
 CONFIG_I2C_EXYNOS5=y
 CONFIG_I2C_MV64XXX=y
+CONFIG_I2C_RIIC=y
 CONFIG_I2C_S3C2410=y
+CONFIG_I2C_SH_MOBILE=y
 CONFIG_I2C_SIRF=y
-CONFIG_I2C_TEGRA=y
 CONFIG_I2C_ST=y
-CONFIG_SPI=y
+CONFIG_I2C_TEGRA=y
 CONFIG_I2C_XILINX=y
-CONFIG_SPI_DAVINCI=y
+CONFIG_I2C_RCAR=y
+CONFIG_SPI=y
 CONFIG_SPI_CADENCE=y
+CONFIG_SPI_DAVINCI=y
 CONFIG_SPI_OMAP24XX=y
 CONFIG_SPI_ORION=y
 CONFIG_SPI_PL022=y
+CONFIG_SPI_RSPI=y
+CONFIG_SPI_SH_MSIOF=m
+CONFIG_SPI_SH_HSPI=y
 CONFIG_SPI_SIRF=y
 CONFIG_SPI_SUN4I=y
 CONFIG_SPI_SUN6I=y
@@ -259,12 +290,15 @@ CONFIG_PINCTRL_PALMAS=y
 CONFIG_PINCTRL_APQ8084=y
 CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_GENERIC_PLATFORM=y
-CONFIG_GPIO_DWAPB=y
 CONFIG_GPIO_DAVINCI=y
+CONFIG_GPIO_DWAPB=y
+CONFIG_GPIO_EM=y
+CONFIG_GPIO_RCAR=y
 CONFIG_GPIO_XILINX=y
 CONFIG_GPIO_ZYNQ=y
 CONFIG_GPIO_PCA953X=y
 CONFIG_GPIO_PCA953X_IRQ=y
+CONFIG_GPIO_PCF857X=y
 CONFIG_GPIO_TWL4030=y
 CONFIG_GPIO_PALMAS=y
 CONFIG_GPIO_SYSCON=y
@@ -276,10 +310,12 @@ CONFIG_POWER_RESET_AS3722=y
 CONFIG_POWER_RESET_GPIO=y
 CONFIG_POWER_RESET_KEYSTONE=y
 CONFIG_POWER_RESET_SUN6I=y
+CONFIG_POWER_RESET_RMOBILE=y
 CONFIG_SENSORS_LM90=y
 CONFIG_SENSORS_LM95245=y
 CONFIG_THERMAL=y
 CONFIG_CPU_THERMAL=y
+CONFIG_RCAR_THERMAL=y
 CONFIG_ARMADA_THERMAL=y
 CONFIG_DAVINCI_WATCHDOG
 CONFIG_ST_THERMAL_SYSCFG=y
@@ -290,6 +326,7 @@ CONFIG_ARM_SP805_WATCHDOG=y
 CONFIG_ORION_WATCHDOG=y
 CONFIG_SUNXI_WATCHDOG=y
 CONFIG_MESON_WATCHDOG=y
+CONFIG_MFD_AS3711=y
 CONFIG_MFD_AS3722=y
 CONFIG_MFD_BCM590XX=y
 CONFIG_MFD_AXP20X=y
@@ -304,13 +341,16 @@ CONFIG_MFD_TPS65090=y
 CONFIG_MFD_TPS6586X=y
 CONFIG_MFD_TPS65910=y
 CONFIG_REGULATOR_AB8500=y
+CONFIG_REGULATOR_AS3711=y
 CONFIG_REGULATOR_AS3722=y
 CONFIG_REGULATOR_AXP20X=y
 CONFIG_REGULATOR_BCM590XX=y
+CONFIG_REGULATOR_DA9210=y
 CONFIG_REGULATOR_GPIO=y
 CONFIG_MFD_SYSCON=y
 CONFIG_POWER_RESET_SYSCON=y
 CONFIG_REGULATOR_MAX8907=y
+CONFIG_REGULATOR_MAX8973=y
 CONFIG_REGULATOR_MAX77686=y
 CONFIG_REGULATOR_PALMAS=y
 CONFIG_REGULATOR_S2MPS11=y
@@ -324,18 +364,32 @@ CONFIG_REGULATOR_TWL4030=y
 CONFIG_REGULATOR_VEXPRESS=y
 CONFIG_MEDIA_SUPPORT=y
 CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_CONTROLLER=y
+CONFIG_VIDEO_V4L2_SUBDEV_API=y
 CONFIG_MEDIA_USB_SUPPORT=y
 CONFIG_USB_VIDEO_CLASS=y
 CONFIG_USB_GSPCA=y
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_SOC_CAMERA=m
+CONFIG_SOC_CAMERA_PLATFORM=m
+CONFIG_VIDEO_RCAR_VIN=m
+CONFIG_V4L_MEM2MEM_DRIVERS=y
+CONFIG_VIDEO_RENESAS_VSP1=m
+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
+CONFIG_VIDEO_ADV7180=m
 CONFIG_DRM=y
+CONFIG_DRM_RCAR_DU=m
 CONFIG_DRM_TEGRA=y
 CONFIG_DRM_PANEL_SIMPLE=y
 CONFIG_FB_ARMCLCD=y
 CONFIG_FB_WM8505=y
+CONFIG_FB_SH_MOBILE_LCDC=y
 CONFIG_FB_SIMPLE=y
+CONFIG_FB_SH_MOBILE_MERAM=y
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
 CONFIG_BACKLIGHT_PWM=y
+CONFIG_BACKLIGHT_AS3711=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
 CONFIG_SOUND=y
@@ -343,6 +397,8 @@ CONFIG_SND=y
 CONFIG_SND_DYNAMIC_MINORS=y
 CONFIG_SND_USB_AUDIO=y
 CONFIG_SND_SOC=y
+CONFIG_SND_SOC_SH4_FSI=m
+CONFIG_SND_SOC_RCAR=m
 CONFIG_SND_SOC_TEGRA=y
 CONFIG_SND_SOC_TEGRA_RT5640=y
 CONFIG_SND_SOC_TEGRA_WM8753=y
@@ -350,6 +406,8 @@ CONFIG_SND_SOC_TEGRA_WM8903=y
 CONFIG_SND_SOC_TEGRA_TRIMSLICE=y
 CONFIG_SND_SOC_TEGRA_ALC5632=y
 CONFIG_SND_SOC_TEGRA_MAX98090=y
+CONFIG_SND_SOC_AK4642=m
+CONFIG_SND_SOC_WM8978=m
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_MVEBU=y
@@ -362,6 +420,8 @@ CONFIG_USB_ISP1760_HCD=y
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_HCD_STI=y
 CONFIG_USB_OHCI_HCD_PLATFORM=y
+CONFIG_USB_R8A66597_HCD=m
+CONFIG_USB_RENESAS_USBHS=m
 CONFIG_USB_STORAGE=y
 CONFIG_USB_DWC3=y
 CONFIG_USB_CHIPIDEA=y
@@ -374,6 +434,10 @@ CONFIG_SAMSUNG_USB3PHY=y
 CONFIG_USB_GPIO_VBUS=y
 CONFIG_USB_ISP1301=y
 CONFIG_USB_MXS_PHY=y
+CONFIG_USB_RCAR_PHY=m
+CONFIG_USB_RCAR_GEN2_PHY=m
+CONFIG_USB_GADGET=y
+CONFIG_USB_RENESAS_USBHS_UDC=m
 CONFIG_MMC=y
 CONFIG_MMC_BLOCK_MINORS=16
 CONFIG_MMC_ARMMMCI=y
@@ -392,12 +456,14 @@ CONFIG_MMC_SDHCI_ST=y
 CONFIG_MMC_OMAP=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MMC_MVSDIO=y
-CONFIG_MMC_SUNXI=y
+CONFIG_MMC_SDHI=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_IDMAC=y
 CONFIG_MMC_DW_PLTFM=y
 CONFIG_MMC_DW_EXYNOS=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SH_MMCIF=y
+CONFIG_MMC_SUNXI=y
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
 CONFIG_LEDS_GPIO=y
@@ -421,10 +487,12 @@ CONFIG_RTC_DRV_AS3722=y
 CONFIG_RTC_DRV_DS1307=y
 CONFIG_RTC_DRV_MAX8907=y
 CONFIG_RTC_DRV_MAX77686=y
+CONFIG_RTC_DRV_RS5C372=m
 CONFIG_RTC_DRV_PALMAS=y
 CONFIG_RTC_DRV_TWL4030=y
 CONFIG_RTC_DRV_TPS6586X=y
 CONFIG_RTC_DRV_TPS65910=y
+CONFIG_RTC_DRV_S35390A=m
 CONFIG_RTC_DRV_EM3027=y
 CONFIG_RTC_DRV_PL031=y
 CONFIG_RTC_DRV_VT8500=y
@@ -436,6 +504,9 @@ CONFIG_DMADEVICES=y
 CONFIG_DW_DMAC=y
 CONFIG_MV_XOR=y
 CONFIG_TEGRA20_APB_DMA=y
+CONFIG_SH_DMAE=y
+CONFIG_RCAR_AUDMAC_PP=m
+CONFIG_RCAR_DMAC=y
 CONFIG_STE_DMA40=y
 CONFIG_SIRF_DMA=y
 CONFIG_TI_EDMA=y
@@ -468,6 +539,7 @@ CONFIG_IIO=y
 CONFIG_XILINX_XADC=y
 CONFIG_AK8975=y
 CONFIG_PWM=y
+CONFIG_PWM_RENESAS_TPU=y
 CONFIG_PWM_TEGRA=y
 CONFIG_PWM_VT8500=y
 CONFIG_PHY_HIX5HD2_SATA=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index b7386524c356..8e108599e1af 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -114,6 +114,7 @@ CONFIG_MTD_PHYSMAP_OF=y
 CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_ECC_BCH=y
 CONFIG_MTD_NAND_OMAP2=y
+CONFIG_MTD_NAND_OMAP_BCH=y
 CONFIG_MTD_ONENAND=y
 CONFIG_MTD_ONENAND_VERIFY_WRITE=y
 CONFIG_MTD_ONENAND_OMAP2=y
@@ -248,6 +249,7 @@ CONFIG_TWL6040_CORE=y
 CONFIG_REGULATOR_PALMAS=y
 CONFIG_REGULATOR_PBIAS=y
 CONFIG_REGULATOR_TI_ABB=y
+CONFIG_REGULATOR_TPS62360=m
 CONFIG_REGULATOR_TPS65023=y
 CONFIG_REGULATOR_TPS6507X=y
 CONFIG_REGULATOR_TPS65217=y
@@ -374,7 +376,8 @@ CONFIG_PWM_TIEHRPWM=m
 CONFIG_PWM_TWL=m
 CONFIG_PWM_TWL_LED=m
 CONFIG_OMAP_USB2=m
-CONFIG_TI_PIPE3=m
+CONFIG_TI_PIPE3=y
+CONFIG_TWL4030_USB=m
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_FS_XATTR is not set
diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
index 41d856effe6c..510c747c65b4 100644
--- a/arch/arm/configs/sama5_defconfig
+++ b/arch/arm/configs/sama5_defconfig
@@ -3,8 +3,6 @@
 CONFIG_SYSVIPC=y
 CONFIG_IRQ_DOMAIN_DEBUG=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_EMBEDDED=y
 CONFIG_SLAB=y
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index 38840a812924..8f6a5702b696 100644
--- a/arch/arm/configs/sunxi_defconfig
+++ b/arch/arm/configs/sunxi_defconfig
@@ -4,6 +4,7 @@ CONFIG_BLK_DEV_INITRD=y
 CONFIG_PERF_EVENTS=y
 CONFIG_ARCH_SUNXI=y
 CONFIG_SMP=y
+CONFIG_NR_CPUS=8
 CONFIG_AEABI=y
 CONFIG_HIGHMEM=y
 CONFIG_HIGHPTE=y
diff --git a/arch/arm/configs/vexpress_defconfig b/arch/arm/configs/vexpress_defconfig
index f489fdaa19b8..37fe607a4ede 100644
--- a/arch/arm/configs/vexpress_defconfig
+++ b/arch/arm/configs/vexpress_defconfig
@@ -118,8 +118,8 @@ CONFIG_HID_ZEROPLUS=y
 CONFIG_USB=y
 CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
 CONFIG_USB_MON=y
-CONFIG_USB_ISP1760_HCD=y
 CONFIG_USB_STORAGE=y
+CONFIG_USB_ISP1760=y
 CONFIG_MMC=y
 CONFIG_MMC_ARMMMCI=y
 CONFIG_NEW_LEDS=y
diff --git a/arch/arm/include/asm/Kbuild b/arch/arm/include/asm/Kbuild
index fe74c0d1e485..eb0f43f3e3f1 100644
--- a/arch/arm/include/asm/Kbuild
+++ b/arch/arm/include/asm/Kbuild
@@ -1,6 +1,5 @@
-generic-y += auxvec.h
 generic-y += bitsperlong.h
 generic-y += cputime.h
 generic-y += current.h
diff --git a/arch/arm/include/asm/auxvec.h b/arch/arm/include/asm/auxvec.h
new file mode 100644
index 000000000000..fbd388c46299
--- /dev/null
+++ b/arch/arm/include/asm/auxvec.h
@@ -0,0 +1 @@
+#include <uapi/asm/auxvec.h>
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h
index afb9cafd3786..e2f4781630f6 100644
--- a/arch/arm/include/asm/elf.h
+++ b/arch/arm/include/asm/elf.h
@@ -1,7 +1,9 @@
 #ifndef __ASMARM_ELF_H
 #define __ASMARM_ELF_H
+#include <asm/auxvec.h>
 #include <asm/hwcap.h>
+#include <asm/vdso_datapage.h>
 /*
 * ELF register definitions..
@@ -115,7 +117,7 @@ int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs);
   the loader.  We need to make sure that it is out of the way of the program
   that it will "exec", and that there is sufficient room for the brk.  */
-#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
+#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
 /* When the program starts, a1 contains a pointer to a function to be 
   registered with atexit, as per the SVR4 ABI.  A value of 0 means we 
@@ -130,6 +132,13 @@ extern unsigned long arch_randomize_brk(struct mm_struct *mm);
 #define arch_randomize_brk arch_randomize_brk
 #ifdef CONFIG_MMU
+#ifdef CONFIG_VDSO
+#define ARCH_DLINFO                                             \
+do {                                                            \
+        NEW_AUX_ENT(AT_SYSINFO_EHDR,                            \
+                    (elf_addr_t)current->mm->context.vdso);     \
+} while (0)
+#endif
 #define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
 struct linux_binprm;
 int arch_setup_additional_pages(struct linux_binprm *, int);
diff --git a/arch/arm/include/asm/kvm_mmu.h b/arch/arm/include/asm/kvm_mmu.h
index 37ca2a4c6f09..bf0fe99e8ca9 100644
--- a/arch/arm/include/asm/kvm_mmu.h
+++ b/arch/arm/include/asm/kvm_mmu.h
@@ -207,7 +207,7 @@ static inline void __coherent_cache_guest_page(struct kvm_vcpu *vcpu, pfn_t pfn,
        bool need_flush = !vcpu_has_cache_enabled(vcpu) || ipa_uncached;
-        VM_BUG_ON(size & PAGE_MASK);
+        VM_BUG_ON(size & ~PAGE_MASK);
        if (!need_flush && !icache_is_pipt())
                goto vipt_cache;
diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h
index 64fd15159b7d..a5b47421059d 100644
--- a/arch/arm/include/asm/mmu.h
+++ b/arch/arm/include/asm/mmu.h
@@ -11,6 +11,9 @@ typedef struct {
 #endif
        unsigned int    vmalloc_seq;
        unsigned long   sigpage;
+#ifdef CONFIG_VDSO
+        unsigned long   vdso;
+#endif
 } mm_context_t;
 #ifdef CONFIG_CPU_HAS_ASID
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index b1596bd59129..675e4ab79f68 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -92,6 +92,7 @@ struct pmu_hw_events {
 struct arm_pmu {
        struct pmu      pmu;
        cpumask_t       active_irqs;
+        int             *irq_affinity;
        char            *name;
        irqreturn_t     (*handle_irq)(int irq_num, void *dev);
        void            (*enable)(struct perf_event *event);
diff --git a/arch/arm/include/asm/vdso.h b/arch/arm/include/asm/vdso.h
new file mode 100644
index 000000000000..d0295f1dd1a3
--- /dev/null
+++ b/arch/arm/include/asm/vdso.h
@@ -0,0 +1,32 @@
+#ifndef __ASM_VDSO_H
+#define __ASM_VDSO_H
+#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
+struct mm_struct;
+#ifdef CONFIG_VDSO
+void arm_install_vdso(struct mm_struct *mm, unsigned long addr);
+extern char vdso_start, vdso_end;
+extern unsigned int vdso_total_pages;
+#else /* CONFIG_VDSO */
+static inline void arm_install_vdso(struct mm_struct *mm, unsigned long addr)
+{
+}
+#define vdso_total_pages 0
+#endif /* CONFIG_VDSO */
+#endif /* __ASSEMBLY__ */
+#endif /* __KERNEL__ */
+#endif /* __ASM_VDSO_H */
diff --git a/arch/arm/include/asm/vdso_datapage.h b/arch/arm/include/asm/vdso_datapage.h
new file mode 100644
index 000000000000..9be259442fca
--- /dev/null
+++ b/arch/arm/include/asm/vdso_datapage.h
@@ -0,0 +1,60 @@
+/*
+ * Adapted from arm64 version.
+ *
+ * Copyright (C) 2012 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef __ASM_VDSO_DATAPAGE_H
+#define __ASM_VDSO_DATAPAGE_H
+#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
+#include <asm/page.h>
+/* Try to be cache-friendly on systems that don't implement the
+ * generic timer: fit the unconditionally updated fields in the first
+ * 32 bytes.
+ */
+struct vdso_data {
+        u32 seq_count;          /* sequence count - odd during updates */
+        u16 tk_is_cntvct;       /* fall back to syscall if false */
+        u16 cs_shift;           /* clocksource shift */
+        u32 xtime_coarse_sec;   /* coarse time */
+        u32 xtime_coarse_nsec;
+        u32 wtm_clock_sec;      /* wall to monotonic offset */
+        u32 wtm_clock_nsec;
+        u32 xtime_clock_sec;    /* CLOCK_REALTIME - seconds */
+        u32 cs_mult;            /* clocksource multiplier */
+        u64 cs_cycle_last;      /* last cycle value */
+        u64 cs_mask;            /* clocksource mask */
+        u64 xtime_clock_snsec;  /* CLOCK_REALTIME sub-ns base */
+        u32 tz_minuteswest;     /* timezone info for gettimeofday(2) */
+        u32 tz_dsttime;
+};
+union vdso_data_store {
+        struct vdso_data data;
+        u8 page[PAGE_SIZE];
+};
+#endif /* !__ASSEMBLY__ */
+#endif /* __KERNEL__ */
+#endif /* __ASM_VDSO_DATAPAGE_H */
diff --git a/arch/arm/include/debug/at91.S b/arch/arm/include/debug/at91.S
index 80a6501b4d50..c3c45e628e33 100644
--- a/arch/arm/include/debug/at91.S
+++ b/arch/arm/include/debug/at91.S
@@ -18,8 +18,11 @@
 #define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */
 #endif
-/* Keep in sync with mach-at91/include/mach/hardware.h */
+#ifdef CONFIG_MMU
 #define AT91_IO_P2V(x) ((x) - 0x01000000)
+#else
+#define AT91_IO_P2V(x) (x)
+#endif
 #define AT91_DBGU_SR            (0x14)  /* Status Register */
 #define AT91_DBGU_THR           (0x1c)  /* Transmitter Holding Register */
diff --git a/arch/arm/include/uapi/asm/Kbuild b/arch/arm/include/uapi/asm/Kbuild
index 70a1c9da30ca..a1c05f93d920 100644
--- a/arch/arm/include/uapi/asm/Kbuild
+++ b/arch/arm/include/uapi/asm/Kbuild
@@ -1,6 +1,7 @@
 # UAPI Header export list
 include include/uapi/asm-generic/Kbuild.asm
+header-y += auxvec.h
 header-y += byteorder.h
 header-y += fcntl.h
 header-y += hwcap.h
diff --git a/arch/arm/include/uapi/asm/auxvec.h b/arch/arm/include/uapi/asm/auxvec.h
new file mode 100644
index 000000000000..cb02a767a500
--- /dev/null
+++ b/arch/arm/include/uapi/asm/auxvec.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_AUXVEC_H
+#define __ASM_AUXVEC_H
+/* VDSO location */
+#define AT_SYSINFO_EHDR 33
+#endif
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index b6544abe2f5e..ba5f83226011 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -75,6 +75,7 @@ obj-$(CONFIG_HW_PERF_EVENTS)	+= perf_event.o perf_event_cpu.o
 CFLAGS_pj4-cp0.o                := -marm
 AFLAGS_iwmmxt.o                 := -Wa,-mcpu=iwmmxt
 obj-$(CONFIG_ARM_CPU_TOPOLOGY)  += topology.o
+obj-$(CONFIG_VDSO)              += vdso.o
 ifneq ($(CONFIG_ARCH_EBSA110),y)
  obj-y         += io.o
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c
index 2d2d6087b9b1..9147008f0d51 100644
--- a/arch/arm/kernel/asm-offsets.c
+++ b/arch/arm/kernel/asm-offsets.c
@@ -25,6 +25,7 @@
 #include <asm/memory.h>
 #include <asm/procinfo.h>
 #include <asm/suspend.h>
+#include <asm/vdso_datapage.h>
 #include <asm/hardware/cache-l2x0.h>
 #include <linux/kbuild.h>
@@ -210,5 +211,9 @@ int main(void)
 #endif
  DEFINE(KVM_VTTBR,             offsetof(struct kvm, arch.vttbr));
 #endif
+  BLANK();
+#ifdef CONFIG_VDSO
+  DEFINE(VDSO_DATA_SIZE,        sizeof(union vdso_data_store));
+#endif
  return 0; 
 }
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 557e128e4df0..4a86a0133ac3 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -259,20 +259,29 @@ out:
 }
 static int
-validate_event(struct pmu_hw_events *hw_events,
+validate_event(struct pmu *pmu, struct pmu_hw_events *hw_events,
-               struct perf_event *event)
+                               struct perf_event *event)
 {
-        struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
+        struct arm_pmu *armpmu;
        if (is_software_event(event))
                return 1;
+        /*
+         * Reject groups spanning multiple HW PMUs (e.g. CPU + CCI). The
+         * core perf code won't check that the pmu->ctx == leader->ctx
+         * until after pmu->event_init(event).
+         */
+        if (event->pmu != pmu)
+                return 0;
        if (event->state < PERF_EVENT_STATE_OFF)
                return 1;
        if (event->state == PERF_EVENT_STATE_OFF && !event->attr.enable_on_exec)
                return 1;
+        armpmu = to_arm_pmu(event->pmu);
        return armpmu->get_event_idx(hw_events, event) >= 0;
 }
@@ -288,15 +297,15 @@ validate_group(struct perf_event *event)
         */
        memset(&fake_pmu.used_mask, 0, sizeof(fake_pmu.used_mask));
-        if (!validate_event(&fake_pmu, leader))
+        if (!validate_event(event->pmu, &fake_pmu, leader))
                return -EINVAL;
        list_for_each_entry(sibling, &leader->sibling_list, group_entry) {
-                if (!validate_event(&fake_pmu, sibling))
+                if (!validate_event(event->pmu, &fake_pmu, sibling))
                        return -EINVAL;
        }
-        if (!validate_event(&fake_pmu, event))
+        if (!validate_event(event->pmu, &fake_pmu, event))
                return -EINVAL;
        return 0;
diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c
index 61b53c46edfa..91c7ba182dcd 100644
--- a/arch/arm/kernel/perf_event_cpu.c
+++ b/arch/arm/kernel/perf_event_cpu.c
@@ -92,11 +92,16 @@ static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu)
                free_percpu_irq(irq, &hw_events->percpu_pmu);
        } else {
                for (i = 0; i < irqs; ++i) {
-                        if (!cpumask_test_and_clear_cpu(i, &cpu_pmu->active_irqs))
+                        int cpu = i;
+                        if (cpu_pmu->irq_affinity)
+                                cpu = cpu_pmu->irq_affinity[i];
+                        if (!cpumask_test_and_clear_cpu(cpu, &cpu_pmu->active_irqs))
                                continue;
                        irq = platform_get_irq(pmu_device, i);
                        if (irq >= 0)
-                                free_irq(irq, per_cpu_ptr(&hw_events->percpu_pmu, i));
+                                free_irq(irq, per_cpu_ptr(&hw_events->percpu_pmu, cpu));
                }
        }
 }
@@ -128,32 +133,37 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
                on_each_cpu(cpu_pmu_enable_percpu_irq, &irq, 1);
        } else {
                for (i = 0; i < irqs; ++i) {
+                        int cpu = i;
                        err = 0;
                        irq = platform_get_irq(pmu_device, i);
                        if (irq < 0)
                                continue;
+                        if (cpu_pmu->irq_affinity)
+                                cpu = cpu_pmu->irq_affinity[i];
                        /*
                         * If we have a single PMU interrupt that we can't shift,
                         * assume that we're running on a uniprocessor machine and
                         * continue. Otherwise, continue without this interrupt.
                         */
-                        if (irq_set_affinity(irq, cpumask_of(i)) && irqs > 1) {
+                        if (irq_set_affinity(irq, cpumask_of(cpu)) && irqs > 1) {
                                pr_warn("unable to set irq affinity (irq=%d, cpu=%u)\n",
-                                        irq, i);
+                                        irq, cpu);
                                continue;
                        }
                        err = request_irq(irq, handler,
                                          IRQF_NOBALANCING | IRQF_NO_THREAD, "arm-pmu",
-                                          per_cpu_ptr(&hw_events->percpu_pmu, i));
+                                          per_cpu_ptr(&hw_events->percpu_pmu, cpu));
                        if (err) {
                                pr_err("unable to request IRQ%d for ARM PMU counters\n",
                                        irq);
                                return err;
                        }
-                        cpumask_set_cpu(i, &cpu_pmu->active_irqs);
+                        cpumask_set_cpu(cpu, &cpu_pmu->active_irqs);
                }
        }
@@ -243,6 +253,8 @@ static const struct of_device_id cpu_pmu_of_device_ids[] = {
        {.compatible = "arm,arm1176-pmu",       .data = armv6_1176_pmu_init},
        {.compatible = "arm,arm1136-pmu",       .data = armv6_1136_pmu_init},
        {.compatible = "qcom,krait-pmu",        .data = krait_pmu_init},
+        {.compatible = "qcom,scorpion-pmu",     .data = scorpion_pmu_init},
+        {.compatible = "qcom,scorpion-mp-pmu",  .data = scorpion_mp_pmu_init},
        {},
 };
@@ -289,6 +301,48 @@ static int probe_current_pmu(struct arm_pmu *pmu)
        return ret;
 }
+static int of_pmu_irq_cfg(struct platform_device *pdev)
+{
+        int i;
+        int *irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
+        if (!irqs)
+                return -ENOMEM;
+        for (i = 0; i < pdev->num_resources; ++i) {
+                struct device_node *dn;
+                int cpu;
+                dn = of_parse_phandle(pdev->dev.of_node, "interrupt-affinity",
+                                      i);
+                if (!dn) {
+                        pr_warn("Failed to parse %s/interrupt-affinity[%d]\n",
+                                of_node_full_name(dn), i);
+                        break;
+                }
+                for_each_possible_cpu(cpu)
+                        if (arch_find_n_match_cpu_physical_id(dn, cpu, NULL))
+                                break;
+                of_node_put(dn);
+                if (cpu >= nr_cpu_ids) {
+                        pr_warn("Failed to find logical CPU for %s\n",
+                                dn->name);
+                        break;
+                }
+                irqs[i] = cpu;
+        }
+        if (i == pdev->num_resources)
+                cpu_pmu->irq_affinity = irqs;
+        else
+                kfree(irqs);
+        return 0;
+}
 static int cpu_pmu_device_probe(struct platform_device *pdev)
 {
        const struct of_device_id *of_id;
@@ -313,7 +367,10 @@ static int cpu_pmu_device_probe(struct platform_device *pdev)
        if (node && (of_id = of_match_node(cpu_pmu_of_device_ids, pdev->dev.of_node))) {
                init_fn = of_id->data;
-                ret = init_fn(pmu);
+                ret = of_pmu_irq_cfg(pdev);
+                if (!ret)
+                        ret = init_fn(pmu);
        } else {
                ret = probe_current_pmu(pmu);
        }
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 8993770c47de..f4207a4dcb01 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -140,6 +140,23 @@ enum krait_perf_types {
        KRAIT_PERFCTR_L1_DTLB_ACCESS                    = 0x12210,
 };
+/* ARMv7 Scorpion specific event types */
+enum scorpion_perf_types {
+        SCORPION_LPM0_GROUP0                            = 0x4c,
+        SCORPION_LPM1_GROUP0                            = 0x50,
+        SCORPION_LPM2_GROUP0                            = 0x54,
+        SCORPION_L2LPM_GROUP0                           = 0x58,
+        SCORPION_VLPM_GROUP0                            = 0x5c,
+        SCORPION_ICACHE_ACCESS                          = 0x10053,
+        SCORPION_ICACHE_MISS                            = 0x10052,
+        SCORPION_DTLB_ACCESS                            = 0x12013,
+        SCORPION_DTLB_MISS                              = 0x12012,
+        SCORPION_ITLB_MISS                              = 0x12021,
+};
 /*
 * Cortex-A8 HW events mapping
 *
@@ -482,6 +499,49 @@ static const unsigned krait_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
 };
 /*
+ * Scorpion HW events mapping
+ */
+static const unsigned scorpion_perf_map[PERF_COUNT_HW_MAX] = {
+        PERF_MAP_ALL_UNSUPPORTED,
+        [PERF_COUNT_HW_CPU_CYCLES]          = ARMV7_PERFCTR_CPU_CYCLES,
+        [PERF_COUNT_HW_INSTRUCTIONS]        = ARMV7_PERFCTR_INSTR_EXECUTED,
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE,
+        [PERF_COUNT_HW_BRANCH_MISSES]       = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+        [PERF_COUNT_HW_BUS_CYCLES]          = ARMV7_PERFCTR_CLOCK_CYCLES,
+};
+static const unsigned scorpion_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
+                                            [PERF_COUNT_HW_CACHE_OP_MAX]
+                                            [PERF_COUNT_HW_CACHE_RESULT_MAX] = {
+        PERF_CACHE_MAP_ALL_UNSUPPORTED,
+        /*
+         * The performance counters don't differentiate between read and write
+         * accesses/misses so this isn't strictly correct, but it's the best we
+         * can do. Writes and reads get combined.
+         */
+        [C(L1D)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
+        [C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
+        [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
+        [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL,
+        [C(L1I)][C(OP_READ)][C(RESULT_ACCESS)] = SCORPION_ICACHE_ACCESS,
+        [C(L1I)][C(OP_READ)][C(RESULT_MISS)] = SCORPION_ICACHE_MISS,
+        /*
+         * Only ITLB misses and DTLB refills are supported.  If users want the
+         * DTLB refills misses a raw counter must be used.
+         */
+        [C(DTLB)][C(OP_READ)][C(RESULT_ACCESS)] = SCORPION_DTLB_ACCESS,
+        [C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = SCORPION_DTLB_MISS,
+        [C(DTLB)][C(OP_WRITE)][C(RESULT_ACCESS)] = SCORPION_DTLB_ACCESS,
+        [C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = SCORPION_DTLB_MISS,
+        [C(ITLB)][C(OP_READ)][C(RESULT_MISS)] = SCORPION_ITLB_MISS,
+        [C(ITLB)][C(OP_WRITE)][C(RESULT_MISS)] = SCORPION_ITLB_MISS,
+        [C(BPU)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
+        [C(BPU)][C(OP_READ)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+        [C(BPU)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED,
+        [C(BPU)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+};
+/*
 * Perf Events' indices
 */
 #define ARMV7_IDX_CYCLE_COUNTER 0
@@ -976,6 +1036,12 @@ static int krait_map_event_no_branch(struct perf_event *event)
                                &krait_perf_cache_map, 0xFFFFF);
 }
+static int scorpion_map_event(struct perf_event *event)
+{
+        return armpmu_map_event(event, &scorpion_perf_map,
+                                &scorpion_perf_cache_map, 0xFFFFF);
+}
 static void armv7pmu_init(struct arm_pmu *cpu_pmu)
 {
        cpu_pmu->handle_irq     = armv7pmu_handle_irq;
@@ -1103,6 +1169,12 @@ static int armv7_a17_pmu_init(struct arm_pmu *cpu_pmu)
 #define KRAIT_EVENT_MASK        (KRAIT_EVENT | VENUM_EVENT)
 #define PMRESRn_EN              BIT(31)
+#define EVENT_REGION(event)     (((event) >> 12) & 0xf)         /* R */
+#define EVENT_GROUP(event)      ((event) & 0xf)                 /* G */
+#define EVENT_CODE(event)       (((event) >> 4) & 0xff)         /* CC */
+#define EVENT_VENUM(event)      (!!(event & VENUM_EVENT))       /* N=2 */
+#define EVENT_CPU(event)        (!!(event & KRAIT_EVENT))       /* N=1 */
 static u32 krait_read_pmresrn(int n)
 {
        u32 val;
@@ -1141,19 +1213,19 @@ static void krait_write_pmresrn(int n, u32 val)
        }
 }
-static u32 krait_read_vpmresr0(void)
+static u32 venum_read_pmresr(void)
 {
        u32 val;
        asm volatile("mrc p10, 7, %0, c11, c0, 0" : "=r" (val));
        return val;
 }
-static void krait_write_vpmresr0(u32 val)
+static void venum_write_pmresr(u32 val)
 {
        asm volatile("mcr p10, 7, %0, c11, c0, 0" : : "r" (val));
 }
-static void krait_pre_vpmresr0(u32 *venum_orig_val, u32 *fp_orig_val)
+static void venum_pre_pmresr(u32 *venum_orig_val, u32 *fp_orig_val)
 {
        u32 venum_new_val;
        u32 fp_new_val;
@@ -1170,7 +1242,7 @@ static void krait_pre_vpmresr0(u32 *venum_orig_val, u32 *fp_orig_val)
        fmxr(FPEXC, fp_new_val);
 }
-static void krait_post_vpmresr0(u32 venum_orig_val, u32 fp_orig_val)
+static void venum_post_pmresr(u32 venum_orig_val, u32 fp_orig_val)
 {
        BUG_ON(preemptible());
        /* Restore FPEXC */
@@ -1193,16 +1265,11 @@ static void krait_evt_setup(int idx, u32 config_base)
        u32 val;
        u32 mask;
        u32 vval, fval;
-        unsigned int region;
+        unsigned int region = EVENT_REGION(config_base);
-        unsigned int group;
+        unsigned int group = EVENT_GROUP(config_base);
-        unsigned int code;
+        unsigned int code = EVENT_CODE(config_base);
        unsigned int group_shift;
-        bool venum_event;
+        bool venum_event = EVENT_VENUM(config_base);
-        venum_event = !!(config_base & VENUM_EVENT);
-        region = (config_base >> 12) & 0xf;
-        code   = (config_base >> 4) & 0xff;
-        group  = (config_base >> 0)  & 0xf;
        group_shift = group * 8;
        mask = 0xff << group_shift;
@@ -1217,16 +1284,14 @@ static void krait_evt_setup(int idx, u32 config_base)
        val |= config_base & (ARMV7_EXCLUDE_USER | ARMV7_EXCLUDE_PL1);
        armv7_pmnc_write_evtsel(idx, val);
-        asm volatile("mcr p15, 0, %0, c9, c15, 0" : : "r" (0));
        if (venum_event) {
-                krait_pre_vpmresr0(&vval, &fval);
+                venum_pre_pmresr(&vval, &fval);
-                val = krait_read_vpmresr0();
+                val = venum_read_pmresr();
                val &= ~mask;
                val |= code << group_shift;
                val |= PMRESRn_EN;
-                krait_write_vpmresr0(val);
+                venum_write_pmresr(val);
-                krait_post_vpmresr0(vval, fval);
+                venum_post_pmresr(vval, fval);
        } else {
                val = krait_read_pmresrn(region);
                val &= ~mask;
@@ -1236,7 +1301,7 @@ static void krait_evt_setup(int idx, u32 config_base)
        }
 }
-static u32 krait_clear_pmresrn_group(u32 val, int group)
+static u32 clear_pmresrn_group(u32 val, int group)
 {
        u32 mask;
        int group_shift;
@@ -1256,23 +1321,19 @@ static void krait_clearpmu(u32 config_base)
 {
        u32 val;
        u32 vval, fval;
-        unsigned int region;
+        unsigned int region = EVENT_REGION(config_base);
-        unsigned int group;
+        unsigned int group = EVENT_GROUP(config_base);
-        bool venum_event;
+        bool venum_event = EVENT_VENUM(config_base);
-        venum_event = !!(config_base & VENUM_EVENT);
-        region = (config_base >> 12) & 0xf;
-        group  = (config_base >> 0)  & 0xf;
        if (venum_event) {
-                krait_pre_vpmresr0(&vval, &fval);
+                venum_pre_pmresr(&vval, &fval);
-                val = krait_read_vpmresr0();
+                val = venum_read_pmresr();
-                val = krait_clear_pmresrn_group(val, group);
+                val = clear_pmresrn_group(val, group);
-                krait_write_vpmresr0(val);
+                venum_write_pmresr(val);
-                krait_post_vpmresr0(vval, fval);
+                venum_post_pmresr(vval, fval);
        } else {
                val = krait_read_pmresrn(region);
-                val = krait_clear_pmresrn_group(val, group);
+                val = clear_pmresrn_group(val, group);
                krait_write_pmresrn(region, val);
        }
 }
@@ -1342,6 +1403,8 @@ static void krait_pmu_enable_event(struct perf_event *event)
 static void krait_pmu_reset(void *info)
 {
        u32 vval, fval;
+        struct arm_pmu *cpu_pmu = info;
+        u32 idx, nb_cnt = cpu_pmu->num_events;
        armv7pmu_reset(info);
@@ -1350,9 +1413,16 @@ static void krait_pmu_reset(void *info)
        krait_write_pmresrn(1, 0);
        krait_write_pmresrn(2, 0);
-        krait_pre_vpmresr0(&vval, &fval);
+        venum_pre_pmresr(&vval, &fval);
-        krait_write_vpmresr0(0);
+        venum_write_pmresr(0);
-        krait_post_vpmresr0(vval, fval);
+        venum_post_pmresr(vval, fval);
+        /* Reset PMxEVNCTCR to sane default */
+        for (idx = ARMV7_IDX_CYCLE_COUNTER; idx < nb_cnt; ++idx) {
+                armv7_pmnc_select_counter(idx);
+                asm volatile("mcr p15, 0, %0, c9, c15, 0" : : "r" (0));
+        }
 }
 static int krait_event_to_bit(struct perf_event *event, unsigned int region,
@@ -1386,26 +1456,18 @@ static int krait_pmu_get_event_idx(struct pmu_hw_events *cpuc,
 {
        int idx;
        int bit = -1;
-        unsigned int prefix;
-        unsigned int region;
-        unsigned int code;
-        unsigned int group;
-        bool krait_event;
        struct hw_perf_event *hwc = &event->hw;
+        unsigned int region = EVENT_REGION(hwc->config_base);
+        unsigned int code = EVENT_CODE(hwc->config_base);
+        unsigned int group = EVENT_GROUP(hwc->config_base);
+        bool venum_event = EVENT_VENUM(hwc->config_base);
+        bool krait_event = EVENT_CPU(hwc->config_base);
-        region = (hwc->config_base >> 12) & 0xf;
+        if (venum_event || krait_event) {
-        code   = (hwc->config_base >> 4) & 0xff;
-        group  = (hwc->config_base >> 0) & 0xf;
-        krait_event = !!(hwc->config_base & KRAIT_EVENT_MASK);
-        if (krait_event) {
                /* Ignore invalid events */
                if (group > 3 || region > 2)
                        return -EINVAL;
-                prefix = hwc->config_base & KRAIT_EVENT_MASK;
+                if (venum_event && (code & 0xe0))
-                if (prefix != KRAIT_EVENT && prefix != VENUM_EVENT)
-                        return -EINVAL;
-                if (prefix == VENUM_EVENT && (code & 0xe0))
                        return -EINVAL;
                bit = krait_event_to_bit(event, region, group);
@@ -1425,15 +1487,12 @@ static void krait_pmu_clear_event_idx(struct pmu_hw_events *cpuc,
 {
        int bit;
        struct hw_perf_event *hwc = &event->hw;
-        unsigned int region;
+        unsigned int region = EVENT_REGION(hwc->config_base);
-        unsigned int group;
+        unsigned int group = EVENT_GROUP(hwc->config_base);
-        bool krait_event;
+        bool venum_event = EVENT_VENUM(hwc->config_base);
+        bool krait_event = EVENT_CPU(hwc->config_base);
-        region = (hwc->config_base >> 12) & 0xf;
+        if (venum_event || krait_event) {
-        group  = (hwc->config_base >> 0) & 0xf;
-        krait_event = !!(hwc->config_base & KRAIT_EVENT_MASK);
-        if (krait_event) {
                bit = krait_event_to_bit(event, region, group);
                clear_bit(bit, cpuc->used_mask);
        }
@@ -1458,6 +1517,344 @@ static int krait_pmu_init(struct arm_pmu *cpu_pmu)
        cpu_pmu->clear_event_idx = krait_pmu_clear_event_idx;
        return 0;
 }
+/*
+ * Scorpion Local Performance Monitor Register (LPMn)
+ *
+ *            31   30     24     16     8      0
+ *            +--------------------------------+
+ *  LPM0      | EN |  CC  |  CC  |  CC  |  CC  |   N = 1, R = 0
+ *            +--------------------------------+
+ *  LPM1      | EN |  CC  |  CC  |  CC  |  CC  |   N = 1, R = 1
+ *            +--------------------------------+
+ *  LPM2      | EN |  CC  |  CC  |  CC  |  CC  |   N = 1, R = 2
+ *            +--------------------------------+
+ *  L2LPM     | EN |  CC  |  CC  |  CC  |  CC  |   N = 1, R = 3
+ *            +--------------------------------+
+ *  VLPM      | EN |  CC  |  CC  |  CC  |  CC  |   N = 2, R = ?
+ *            +--------------------------------+
+ *              EN | G=3  | G=2  | G=1  | G=0
+ *
+ *
+ *  Event Encoding:
+ *
+ *      hwc->config_base = 0xNRCCG
+ *
+ *      N  = prefix, 1 for Scorpion CPU (LPMn/L2LPM), 2 for Venum VFP (VLPM)
+ *      R  = region register
+ *      CC = class of events the group G is choosing from
+ *      G  = group or particular event
+ *
+ *  Example: 0x12021 is a Scorpion CPU event in LPM2's group 1 with code 2
+ *
+ *  A region (R) corresponds to a piece of the CPU (execution unit, instruction
+ *  unit, etc.) while the event code (CC) corresponds to a particular class of
+ *  events (interrupts for example). An event code is broken down into
+ *  groups (G) that can be mapped into the PMU (irq, fiqs, and irq+fiqs for
+ *  example).
+ */
+static u32 scorpion_read_pmresrn(int n)
+{
+        u32 val;
+        switch (n) {
+        case 0:
+                asm volatile("mrc p15, 0, %0, c15, c0, 0" : "=r" (val));
+                break;
+        case 1:
+                asm volatile("mrc p15, 1, %0, c15, c0, 0" : "=r" (val));
+                break;
+        case 2:
+                asm volatile("mrc p15, 2, %0, c15, c0, 0" : "=r" (val));
+                break;
+        case 3:
+                asm volatile("mrc p15, 3, %0, c15, c2, 0" : "=r" (val));
+                break;
+        default:
+                BUG(); /* Should be validated in scorpion_pmu_get_event_idx() */
+        }
+        return val;
+}
+static void scorpion_write_pmresrn(int n, u32 val)
+{
+        switch (n) {
+        case 0:
+                asm volatile("mcr p15, 0, %0, c15, c0, 0" : : "r" (val));
+                break;
+        case 1:
+                asm volatile("mcr p15, 1, %0, c15, c0, 0" : : "r" (val));
+                break;
+        case 2:
+                asm volatile("mcr p15, 2, %0, c15, c0, 0" : : "r" (val));
+                break;
+        case 3:
+                asm volatile("mcr p15, 3, %0, c15, c2, 0" : : "r" (val));
+                break;
+        default:
+                BUG(); /* Should be validated in scorpion_pmu_get_event_idx() */
+        }
+}
+static u32 scorpion_get_pmresrn_event(unsigned int region)
+{
+        static const u32 pmresrn_table[] = { SCORPION_LPM0_GROUP0,
+                                             SCORPION_LPM1_GROUP0,
+                                             SCORPION_LPM2_GROUP0,
+                                             SCORPION_L2LPM_GROUP0 };
+        return pmresrn_table[region];
+}
+static void scorpion_evt_setup(int idx, u32 config_base)
+{
+        u32 val;
+        u32 mask;
+        u32 vval, fval;
+        unsigned int region = EVENT_REGION(config_base);
+        unsigned int group = EVENT_GROUP(config_base);
+        unsigned int code = EVENT_CODE(config_base);
+        unsigned int group_shift;
+        bool venum_event = EVENT_VENUM(config_base);
+        group_shift = group * 8;
+        mask = 0xff << group_shift;
+        /* Configure evtsel for the region and group */
+        if (venum_event)
+                val = SCORPION_VLPM_GROUP0;
+        else
+                val = scorpion_get_pmresrn_event(region);
+        val += group;
+        /* Mix in mode-exclusion bits */
+        val |= config_base & (ARMV7_EXCLUDE_USER | ARMV7_EXCLUDE_PL1);
+        armv7_pmnc_write_evtsel(idx, val);
+        asm volatile("mcr p15, 0, %0, c9, c15, 0" : : "r" (0));
+        if (venum_event) {
+                venum_pre_pmresr(&vval, &fval);
+                val = venum_read_pmresr();
+                val &= ~mask;
+                val |= code << group_shift;
+                val |= PMRESRn_EN;
+                venum_write_pmresr(val);
+                venum_post_pmresr(vval, fval);
+        } else {
+                val = scorpion_read_pmresrn(region);
+                val &= ~mask;
+                val |= code << group_shift;
+                val |= PMRESRn_EN;
+                scorpion_write_pmresrn(region, val);
+        }
+}
+static void scorpion_clearpmu(u32 config_base)
+{
+        u32 val;
+        u32 vval, fval;
+        unsigned int region = EVENT_REGION(config_base);
+        unsigned int group = EVENT_GROUP(config_base);
+        bool venum_event = EVENT_VENUM(config_base);
+        if (venum_event) {
+                venum_pre_pmresr(&vval, &fval);
+                val = venum_read_pmresr();
+                val = clear_pmresrn_group(val, group);
+                venum_write_pmresr(val);
+                venum_post_pmresr(vval, fval);
+        } else {
+                val = scorpion_read_pmresrn(region);
+                val = clear_pmresrn_group(val, group);
+                scorpion_write_pmresrn(region, val);
+        }
+}
+static void scorpion_pmu_disable_event(struct perf_event *event)
+{
+        unsigned long flags;
+        struct hw_perf_event *hwc = &event->hw;
+        int idx = hwc->idx;
+        struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu);
+        struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);
+        /* Disable counter and interrupt */
+        raw_spin_lock_irqsave(&events->pmu_lock, flags);
+        /* Disable counter */
+        armv7_pmnc_disable_counter(idx);
+        /*
+         * Clear pmresr code (if destined for PMNx counters)
+         */
+        if (hwc->config_base & KRAIT_EVENT_MASK)
+                scorpion_clearpmu(hwc->config_base);
+        /* Disable interrupt for this counter */
+        armv7_pmnc_disable_intens(idx);
+        raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
+}
+static void scorpion_pmu_enable_event(struct perf_event *event)
+{
+        unsigned long flags;
+        struct hw_perf_event *hwc = &event->hw;
+        int idx = hwc->idx;
+        struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu);
+        struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);
+        /*
+         * Enable counter and interrupt, and set the counter to count
+         * the event that we're interested in.
+         */
+        raw_spin_lock_irqsave(&events->pmu_lock, flags);
+        /* Disable counter */
+        armv7_pmnc_disable_counter(idx);
+        /*
+         * Set event (if destined for PMNx counters)
+         * We don't set the event for the cycle counter because we
+         * don't have the ability to perform event filtering.
+         */
+        if (hwc->config_base & KRAIT_EVENT_MASK)
+                scorpion_evt_setup(idx, hwc->config_base);
+        else if (idx != ARMV7_IDX_CYCLE_COUNTER)
+                armv7_pmnc_write_evtsel(idx, hwc->config_base);
+        /* Enable interrupt for this counter */
+        armv7_pmnc_enable_intens(idx);
+        /* Enable counter */
+        armv7_pmnc_enable_counter(idx);
+        raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
+}
+static void scorpion_pmu_reset(void *info)
+{
+        u32 vval, fval;
+        struct arm_pmu *cpu_pmu = info;
+        u32 idx, nb_cnt = cpu_pmu->num_events;
+        armv7pmu_reset(info);
+        /* Clear all pmresrs */
+        scorpion_write_pmresrn(0, 0);
+        scorpion_write_pmresrn(1, 0);
+        scorpion_write_pmresrn(2, 0);
+        scorpion_write_pmresrn(3, 0);
+        venum_pre_pmresr(&vval, &fval);
+        venum_write_pmresr(0);
+        venum_post_pmresr(vval, fval);
+        /* Reset PMxEVNCTCR to sane default */
+        for (idx = ARMV7_IDX_CYCLE_COUNTER; idx < nb_cnt; ++idx) {
+                armv7_pmnc_select_counter(idx);
+                asm volatile("mcr p15, 0, %0, c9, c15, 0" : : "r" (0));
+        }
+}
+static int scorpion_event_to_bit(struct perf_event *event, unsigned int region,
+                              unsigned int group)
+{
+        int bit;
+        struct hw_perf_event *hwc = &event->hw;
+        struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu);
+        if (hwc->config_base & VENUM_EVENT)
+                bit = SCORPION_VLPM_GROUP0;
+        else
+                bit = scorpion_get_pmresrn_event(region);
+        bit -= scorpion_get_pmresrn_event(0);
+        bit += group;
+        /*
+         * Lower bits are reserved for use by the counters (see
+         * armv7pmu_get_event_idx() for more info)
+         */
+        bit += ARMV7_IDX_COUNTER_LAST(cpu_pmu) + 1;
+        return bit;
+}
+/*
+ * We check for column exclusion constraints here.
+ * Two events cant use the same group within a pmresr register.
+ */
+static int scorpion_pmu_get_event_idx(struct pmu_hw_events *cpuc,
+                                   struct perf_event *event)
+{
+        int idx;
+        int bit = -1;
+        struct hw_perf_event *hwc = &event->hw;
+        unsigned int region = EVENT_REGION(hwc->config_base);
+        unsigned int group = EVENT_GROUP(hwc->config_base);
+        bool venum_event = EVENT_VENUM(hwc->config_base);
+        bool scorpion_event = EVENT_CPU(hwc->config_base);
+        if (venum_event || scorpion_event) {
+                /* Ignore invalid events */
+                if (group > 3 || region > 3)
+                        return -EINVAL;
+                bit = scorpion_event_to_bit(event, region, group);
+                if (test_and_set_bit(bit, cpuc->used_mask))
+                        return -EAGAIN;
+        }
+        idx = armv7pmu_get_event_idx(cpuc, event);
+        if (idx < 0 && bit >= 0)
+                clear_bit(bit, cpuc->used_mask);
+        return idx;
+}
+static void scorpion_pmu_clear_event_idx(struct pmu_hw_events *cpuc,
+                                      struct perf_event *event)
+{
+        int bit;
+        struct hw_perf_event *hwc = &event->hw;
+        unsigned int region = EVENT_REGION(hwc->config_base);
+        unsigned int group = EVENT_GROUP(hwc->config_base);
+        bool venum_event = EVENT_VENUM(hwc->config_base);
+        bool scorpion_event = EVENT_CPU(hwc->config_base);
+        if (venum_event || scorpion_event) {
+                bit = scorpion_event_to_bit(event, region, group);
+                clear_bit(bit, cpuc->used_mask);
+        }
+}
+static int scorpion_pmu_init(struct arm_pmu *cpu_pmu)
+{
+        armv7pmu_init(cpu_pmu);
+        cpu_pmu->name           = "armv7_scorpion";
+        cpu_pmu->map_event      = scorpion_map_event;
+        cpu_pmu->num_events     = armv7_read_num_pmnc_events();
+        cpu_pmu->reset          = scorpion_pmu_reset;
+        cpu_pmu->enable         = scorpion_pmu_enable_event;
+        cpu_pmu->disable        = scorpion_pmu_disable_event;
+        cpu_pmu->get_event_idx  = scorpion_pmu_get_event_idx;
+        cpu_pmu->clear_event_idx = scorpion_pmu_clear_event_idx;
+        return 0;
+}
+static int scorpion_mp_pmu_init(struct arm_pmu *cpu_pmu)
+{
+        armv7pmu_init(cpu_pmu);
+        cpu_pmu->name           = "armv7_scorpion_mp";
+        cpu_pmu->map_event      = scorpion_map_event;
+        cpu_pmu->num_events     = armv7_read_num_pmnc_events();
+        cpu_pmu->reset          = scorpion_pmu_reset;
+        cpu_pmu->enable         = scorpion_pmu_enable_event;
+        cpu_pmu->disable        = scorpion_pmu_disable_event;
+        cpu_pmu->get_event_idx  = scorpion_pmu_get_event_idx;
+        cpu_pmu->clear_event_idx = scorpion_pmu_clear_event_idx;
+        return 0;
+}
 #else
 static inline int armv7_a8_pmu_init(struct arm_pmu *cpu_pmu)
 {
@@ -1498,4 +1895,14 @@ static inline int krait_pmu_init(struct arm_pmu *cpu_pmu)
 {
        return -ENODEV;
 }
+static inline int scorpion_pmu_init(struct arm_pmu *cpu_pmu)
+{
+        return -ENODEV;
+}
+static inline int scorpion_mp_pmu_init(struct arm_pmu *cpu_pmu)
+{
+        return -ENODEV;
+}
 #endif  /* CONFIG_CPU_V7 */
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index f810a6cc3790..f192a2a41719 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -334,7 +334,7 @@ const char *arch_vma_name(struct vm_area_struct *vma)
 }
 /* If possible, provide a placement hint at a random offset from the
- * stack for the signal page.
+ * stack for the sigpage and vdso pages.
 */
 static unsigned long sigpage_addr(const struct mm_struct *mm,
                                  unsigned int npages)
@@ -378,6 +378,7 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
 {
        struct mm_struct *mm = current->mm;
        struct vm_area_struct *vma;
+        unsigned long npages;
        unsigned long addr;
        unsigned long hint;
        int ret = 0;
@@ -387,9 +388,12 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
        if (!signal_page)
                return -ENOMEM;
+        npages = 1; /* for sigpage */
+        npages += vdso_total_pages;
        down_write(&mm->mmap_sem);
-        hint = sigpage_addr(mm, 1);
+        hint = sigpage_addr(mm, npages);
-        addr = get_unmapped_area(NULL, hint, PAGE_SIZE, 0, 0);
+        addr = get_unmapped_area(NULL, hint, npages << PAGE_SHIFT, 0, 0);
        if (IS_ERR_VALUE(addr)) {
                ret = addr;
                goto up_fail;
@@ -406,6 +410,12 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
        mm->context.sigpage = addr;
+        /* Unlike the sigpage, failure to install the vdso is unlikely
+         * to be fatal to the process, so no error check needed
+         * here.
+         */
+        arm_install_vdso(mm, addr + PAGE_SIZE);
 up_fail:
        up_write(&mm->mmap_sem);
        return ret;
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 910bb1796946..6c777e908a24 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -246,12 +246,9 @@ static int __get_cpu_architecture(void)
                if (cpu_arch)
                        cpu_arch += CPU_ARCH_ARMv3;
        } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
-                unsigned int mmfr0;
                /* Revised CPUID format. Read the Memory Model Feature
                 * Register 0 and check for VMSAv7 or PMSAv7 */
-                asm("mrc        p15, 0, %0, c0, c1, 4"
+                unsigned int mmfr0 = read_cpuid_ext(CPUID_EXT_MMFR0);
-                    : "=r" (mmfr0));
                if ((mmfr0 & 0x0000000f) >= 0x00000003 ||
                    (mmfr0 & 0x000000f0) >= 0x00000030)
                        cpu_arch = CPU_ARCH_ARMv7;
diff --git a/arch/arm/kernel/vdso.c b/arch/arm/kernel/vdso.c
new file mode 100644
index 000000000000..0d31d3ccab81
--- /dev/null
+++ b/arch/arm/kernel/vdso.c
@@ -0,0 +1,337 @@
+/*
+ * Adapted from arm64 version.
+ *
+ * Copyright (C) 2012 ARM Limited
+ * Copyright (C) 2015 Mentor Graphics Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <linux/elf.h>
+#include <linux/err.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/of.h>
+#include <linux/printk.h>
+#include <linux/slab.h>
+#include <linux/timekeeper_internal.h>
+#include <linux/vmalloc.h>
+#include <asm/arch_timer.h>
+#include <asm/barrier.h>
+#include <asm/cacheflush.h>
+#include <asm/page.h>
+#include <asm/vdso.h>
+#include <asm/vdso_datapage.h>
+#include <clocksource/arm_arch_timer.h>
+#define MAX_SYMNAME     64
+static struct page **vdso_text_pagelist;
+/* Total number of pages needed for the data and text portions of the VDSO. */
+unsigned int vdso_total_pages __read_mostly;
+/*
+ * The VDSO data page.
+ */
+static union vdso_data_store vdso_data_store __page_aligned_data;
+static struct vdso_data *vdso_data = &vdso_data_store.data;
+static struct page *vdso_data_page;
+static struct vm_special_mapping vdso_data_mapping = {
+        .name = "[vvar]",
+        .pages = &vdso_data_page,
+};
+static struct vm_special_mapping vdso_text_mapping = {
+        .name = "[vdso]",
+};
+struct elfinfo {
+        Elf32_Ehdr      *hdr;           /* ptr to ELF */
+        Elf32_Sym       *dynsym;        /* ptr to .dynsym section */
+        unsigned long   dynsymsize;     /* size of .dynsym section */
+        char            *dynstr;        /* ptr to .dynstr section */
+};
+/* Cached result of boot-time check for whether the arch timer exists,
+ * and if so, whether the virtual counter is useable.
+ */
+static bool cntvct_ok __read_mostly;
+static bool __init cntvct_functional(void)
+{
+        struct device_node *np;
+        bool ret = false;
+        if (!IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
+                goto out;
+        /* The arm_arch_timer core should export
+         * arch_timer_use_virtual or similar so we don't have to do
+         * this.
+         */
+        np = of_find_compatible_node(NULL, NULL, "arm,armv7-timer");
+        if (!np)
+                goto out_put;
+        if (of_property_read_bool(np, "arm,cpu-registers-not-fw-configured"))
+                goto out_put;
+        ret = true;
+out_put:
+        of_node_put(np);
+out:
+        return ret;
+}
+static void * __init find_section(Elf32_Ehdr *ehdr, const char *name,
+                                  unsigned long *size)
+{
+        Elf32_Shdr *sechdrs;
+        unsigned int i;
+        char *secnames;
+        /* Grab section headers and strings so we can tell who is who */
+        sechdrs = (void *)ehdr + ehdr->e_shoff;
+        secnames = (void *)ehdr + sechdrs[ehdr->e_shstrndx].sh_offset;
+        /* Find the section they want */
+        for (i = 1; i < ehdr->e_shnum; i++) {
+                if (strcmp(secnames + sechdrs[i].sh_name, name) == 0) {
+                        if (size)
+                                *size = sechdrs[i].sh_size;
+                        return (void *)ehdr + sechdrs[i].sh_offset;
+                }
+        }
+        if (size)
+                *size = 0;
+        return NULL;
+}
+static Elf32_Sym * __init find_symbol(struct elfinfo *lib, const char *symname)
+{
+        unsigned int i;
+        for (i = 0; i < (lib->dynsymsize / sizeof(Elf32_Sym)); i++) {
+                char name[MAX_SYMNAME], *c;
+                if (lib->dynsym[i].st_name == 0)
+                        continue;
+                strlcpy(name, lib->dynstr + lib->dynsym[i].st_name,
+                        MAX_SYMNAME);
+                c = strchr(name, '@');
+                if (c)
+                        *c = 0;
+                if (strcmp(symname, name) == 0)
+                        return &lib->dynsym[i];
+        }
+        return NULL;
+}
+static void __init vdso_nullpatch_one(struct elfinfo *lib, const char *symname)
+{
+        Elf32_Sym *sym;
+        sym = find_symbol(lib, symname);
+        if (!sym)
+                return;
+        sym->st_name = 0;
+}
+static void __init patch_vdso(void *ehdr)
+{
+        struct elfinfo einfo;
+        einfo = (struct elfinfo) {
+                .hdr = ehdr,
+        };
+        einfo.dynsym = find_section(einfo.hdr, ".dynsym", &einfo.dynsymsize);
+        einfo.dynstr = find_section(einfo.hdr, ".dynstr", NULL);
+        /* If the virtual counter is absent or non-functional we don't
+         * want programs to incur the slight additional overhead of
+         * dispatching through the VDSO only to fall back to syscalls.
+         */
+        if (!cntvct_ok) {
+                vdso_nullpatch_one(&einfo, "__vdso_gettimeofday");
+                vdso_nullpatch_one(&einfo, "__vdso_clock_gettime");
+        }
+}
+static int __init vdso_init(void)
+{
+        unsigned int text_pages;
+        int i;
+        if (memcmp(&vdso_start, "\177ELF", 4)) {
+                pr_err("VDSO is not a valid ELF object!\n");
+                return -ENOEXEC;
+        }
+        text_pages = (&vdso_end - &vdso_start) >> PAGE_SHIFT;
+        pr_debug("vdso: %i text pages at base %p\n", text_pages, &vdso_start);
+        /* Allocate the VDSO text pagelist */
+        vdso_text_pagelist = kcalloc(text_pages, sizeof(struct page *),
+                                     GFP_KERNEL);
+        if (vdso_text_pagelist == NULL)
+                return -ENOMEM;
+        /* Grab the VDSO data page. */
+        vdso_data_page = virt_to_page(vdso_data);
+        /* Grab the VDSO text pages. */
+        for (i = 0; i < text_pages; i++) {
+                struct page *page;
+                page = virt_to_page(&vdso_start + i * PAGE_SIZE);
+                vdso_text_pagelist[i] = page;
+        }
+        vdso_text_mapping.pages = vdso_text_pagelist;
+        vdso_total_pages = 1; /* for the data/vvar page */
+        vdso_total_pages += text_pages;
+        cntvct_ok = cntvct_functional();
+        patch_vdso(&vdso_start);
+        return 0;
+}
+arch_initcall(vdso_init);
+static int install_vvar(struct mm_struct *mm, unsigned long addr)
+{
+        struct vm_area_struct *vma;
+        vma = _install_special_mapping(mm, addr, PAGE_SIZE,
+                                       VM_READ | VM_MAYREAD,
+                                       &vdso_data_mapping);
+        return IS_ERR(vma) ? PTR_ERR(vma) : 0;
+}
+/* assumes mmap_sem is write-locked */
+void arm_install_vdso(struct mm_struct *mm, unsigned long addr)
+{
+        struct vm_area_struct *vma;
+        unsigned long len;
+        mm->context.vdso = 0;
+        if (vdso_text_pagelist == NULL)
+                return;
+        if (install_vvar(mm, addr))
+                return;
+        /* Account for vvar page. */
+        addr += PAGE_SIZE;
+        len = (vdso_total_pages - 1) << PAGE_SHIFT;
+        vma = _install_special_mapping(mm, addr, len,
+                VM_READ | VM_EXEC | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC,
+                &vdso_text_mapping);
+        if (!IS_ERR(vma))
+                mm->context.vdso = addr;
+}
+static void vdso_write_begin(struct vdso_data *vdata)
+{
+        ++vdso_data->seq_count;
+        smp_wmb(); /* Pairs with smp_rmb in vdso_read_retry */
+}
+static void vdso_write_end(struct vdso_data *vdata)
+{
+        smp_wmb(); /* Pairs with smp_rmb in vdso_read_begin */
+        ++vdso_data->seq_count;
+}
+static bool tk_is_cntvct(const struct timekeeper *tk)
+{
+        if (!IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
+                return false;
+        if (strcmp(tk->tkr.clock->name, "arch_sys_counter") != 0)
+                return false;
+        return true;
+}
+/**
+ * update_vsyscall - update the vdso data page
+ *
+ * Increment the sequence counter, making it odd, indicating to
+ * userspace that an update is in progress.  Update the fields used
+ * for coarse clocks and, if the architected system timer is in use,
+ * the fields used for high precision clocks.  Increment the sequence
+ * counter again, making it even, indicating to userspace that the
+ * update is finished.
+ *
+ * Userspace is expected to sample seq_count before reading any other
+ * fields from the data page.  If seq_count is odd, userspace is
+ * expected to wait until it becomes even.  After copying data from
+ * the page, userspace must sample seq_count again; if it has changed
+ * from its previous value, userspace must retry the whole sequence.
+ *
+ * Calls to update_vsyscall are serialized by the timekeeping core.
+ */
+void update_vsyscall(struct timekeeper *tk)
+{
+        struct timespec xtime_coarse;
+        struct timespec64 *wtm = &tk->wall_to_monotonic;
+        if (!cntvct_ok) {
+                /* The entry points have been zeroed, so there is no
+                 * point in updating the data page.
+                 */
+                return;
+        }
+        vdso_write_begin(vdso_data);
+        xtime_coarse = __current_kernel_time();
+        vdso_data->tk_is_cntvct                 = tk_is_cntvct(tk);
+        vdso_data->xtime_coarse_sec             = xtime_coarse.tv_sec;
+        vdso_data->xtime_coarse_nsec            = xtime_coarse.tv_nsec;
+        vdso_data->wtm_clock_sec                = wtm->tv_sec;
+        vdso_data->wtm_clock_nsec               = wtm->tv_nsec;
+        if (vdso_data->tk_is_cntvct) {
+                vdso_data->cs_cycle_last        = tk->tkr.cycle_last;
+                vdso_data->xtime_clock_sec      = tk->xtime_sec;
+                vdso_data->xtime_clock_snsec    = tk->tkr.xtime_nsec;
+                vdso_data->cs_mult              = tk->tkr.mult;
+                vdso_data->cs_shift             = tk->tkr.shift;
+                vdso_data->cs_mask              = tk->tkr.mask;
+        }
+        vdso_write_end(vdso_data);
+        flush_dcache_page(virt_to_page(vdso_data));
+}
+void update_vsyscall_tz(void)
+{
+        vdso_data->tz_minuteswest       = sys_tz.tz_minuteswest;
+        vdso_data->tz_dsttime           = sys_tz.tz_dsttime;
+        flush_dcache_page(virt_to_page(vdso_data));
+}
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index 07e7eb1d7ab6..5560f74f9eee 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -540,7 +540,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
                vcpu->mode = OUTSIDE_GUEST_MODE;
                kvm_guest_exit();
-                trace_kvm_exit(*vcpu_pc(vcpu));
+                trace_kvm_exit(kvm_vcpu_trap_get_class(vcpu), *vcpu_pc(vcpu));
                /*
                 * We may have taken a host interrupt in HYP mode (ie
                 * while executing the guest). This interrupt is still
diff --git a/arch/arm/kvm/trace.h b/arch/arm/kvm/trace.h
index 881874b1a036..6817664b46b8 100644
--- a/arch/arm/kvm/trace.h
+++ b/arch/arm/kvm/trace.h
@@ -25,18 +25,22 @@ TRACE_EVENT(kvm_entry,
 );
 TRACE_EVENT(kvm_exit,
-        TP_PROTO(unsigned long vcpu_pc),
+        TP_PROTO(unsigned int exit_reason, unsigned long vcpu_pc),
-        TP_ARGS(vcpu_pc),
+        TP_ARGS(exit_reason, vcpu_pc),
        TP_STRUCT__entry(
+                __field(        unsigned int,   exit_reason     )
                __field(        unsigned long,  vcpu_pc         )
        ),
        TP_fast_assign(
+                __entry->exit_reason            = exit_reason;
                __entry->vcpu_pc                = vcpu_pc;
        ),
-        TP_printk("PC: 0x%08lx", __entry->vcpu_pc)
+        TP_printk("HSR_EC: 0x%04x, PC: 0x%08lx",
+                  __entry->exit_reason,
+                  __entry->vcpu_pc)
 );
 TRACE_EVENT(kvm_guest_fault,
diff --git a/arch/arm/mach-asm9260/Kconfig b/arch/arm/mach-asm9260/Kconfig
index 8423be76080e..52241207a82a 100644
--- a/arch/arm/mach-asm9260/Kconfig
+++ b/arch/arm/mach-asm9260/Kconfig
@@ -2,5 +2,7 @@ config MACH_ASM9260
        bool "Alphascale ASM9260"
        depends on ARCH_MULTI_V5
        select CPU_ARM926T
+        select ASM9260_TIMER
+        select GENERIC_CLOCKEVENTS
        help
          Support for Alphascale ASM9260 based platform.
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 5e34fb143309..aa4116e9452f 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -270,37 +270,35 @@ static void __init at91_pm_sram_init(void)
        phys_addr_t sram_pbase;
        unsigned long sram_base;
        struct device_node *node;
-        struct platform_device *pdev;
+        struct platform_device *pdev = NULL;
-        node = of_find_compatible_node(NULL, NULL, "mmio-sram");
+        for_each_compatible_node(node, NULL, "mmio-sram") {
-        if (!node) {
+                pdev = of_find_device_by_node(node);
-                pr_warn("%s: failed to find sram node!\n", __func__);
+                if (pdev) {
-                return;
+                        of_node_put(node);
+                        break;
+                }
        }
-        pdev = of_find_device_by_node(node);
        if (!pdev) {
                pr_warn("%s: failed to find sram device!\n", __func__);
-                goto put_node;
+                return;
        }
        sram_pool = dev_get_gen_pool(&pdev->dev);
        if (!sram_pool) {
                pr_warn("%s: sram pool unavailable!\n", __func__);
-                goto put_node;
+                return;
        }
        sram_base = gen_pool_alloc(sram_pool, at91_slow_clock_sz);
        if (!sram_base) {
                pr_warn("%s: unable to alloc ocram!\n", __func__);
-                goto put_node;
+                return;
        }
        sram_pbase = gen_pool_virt_to_phys(sram_pool, sram_base);
        slow_clock = __arm_ioremap_exec(sram_pbase, at91_slow_clock_sz, false);
-put_node:
-        of_node_put(node);
 }
 #endif
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index d2c89963af2d..86c0aa819d25 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -44,7 +44,7 @@ static inline void at91rm9200_standby(void)
                "    mcr    p15, 0, %0, c7, c0, 4\n\t"
                "    str    %5, [%1, %2]"
                :
-                : "r" (0), "r" (AT91_BASE_SYS), "r" (AT91RM9200_SDRAMC_LPR),
+                : "r" (0), "r" (at91_ramc_base[0]), "r" (AT91RM9200_SDRAMC_LPR),
                  "r" (1), "r" (AT91RM9200_SDRAMC_SRR),
                  "r" (lpr));
 }
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 556151e85ec4..931f0e302c03 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -25,11 +25,6 @@
 */
 #undef SLOWDOWN_MASTER_CLOCK
-#define MCKRDY_TIMEOUT          1000
-#define MOSCRDY_TIMEOUT         1000
-#define PLLALOCK_TIMEOUT        1000
-#define PLLBLOCK_TIMEOUT        1000
 pmc     .req    r0
 sdramc  .req    r1
 ramc1   .req    r2
@@ -41,60 +36,42 @@ tmp2	.req	r5
 * Wait until master clock is ready (after switching master clock source)
 */
        .macro wait_mckrdy
-        mov     tmp2, #MCKRDY_TIMEOUT
+1:      ldr     tmp1, [pmc, #AT91_PMC_SR]
-1:      sub     tmp2, tmp2, #1
-        cmp     tmp2, #0
-        beq     2f
-        ldr     tmp1, [pmc, #AT91_PMC_SR]
        tst     tmp1, #AT91_PMC_MCKRDY
        beq     1b
-2:
        .endm
 /*
 * Wait until master oscillator has stabilized.
 */
        .macro wait_moscrdy
-        mov     tmp2, #MOSCRDY_TIMEOUT
+1:      ldr     tmp1, [pmc, #AT91_PMC_SR]
-1:      sub     tmp2, tmp2, #1
-        cmp     tmp2, #0
-        beq     2f
-        ldr     tmp1, [pmc, #AT91_PMC_SR]
        tst     tmp1, #AT91_PMC_MOSCS
        beq     1b
-2:
        .endm
 /*
 * Wait until PLLA has locked.
 */
        .macro wait_pllalock
-        mov     tmp2, #PLLALOCK_TIMEOUT
+1:      ldr     tmp1, [pmc, #AT91_PMC_SR]
-1:      sub     tmp2, tmp2, #1
-        cmp     tmp2, #0
-        beq     2f
-        ldr     tmp1, [pmc, #AT91_PMC_SR]
        tst     tmp1, #AT91_PMC_LOCKA
        beq     1b
-2:
        .endm
 /*
 * Wait until PLLB has locked.
 */
        .macro wait_pllblock
-        mov     tmp2, #PLLBLOCK_TIMEOUT
+1:      ldr     tmp1, [pmc, #AT91_PMC_SR]
-1:      sub     tmp2, tmp2, #1
-        cmp     tmp2, #0
-        beq     2f
-        ldr     tmp1, [pmc, #AT91_PMC_SR]
        tst     tmp1, #AT91_PMC_LOCKB
        beq     1b
-2:
        .endm
        .text
+        .arm
 /* void at91_slow_clock(void __iomem *pmc, void __iomem *sdramc,
 *                      void __iomem *ramc1, int memctrl)
 */
@@ -134,6 +111,16 @@ ddr_sr_enable:
        cmp     memctrl, #AT91_MEMCTRL_DDRSDR
        bne     sdr_sr_enable
+        /* LPDDR1 --> force DDR2 mode during self-refresh */
+        ldr     tmp1, [sdramc, #AT91_DDRSDRC_MDR]
+        str     tmp1, .saved_sam9_mdr
+        bic     tmp1, tmp1, #~AT91_DDRSDRC_MD
+        cmp     tmp1, #AT91_DDRSDRC_MD_LOW_POWER_DDR
+        ldreq   tmp1, [sdramc, #AT91_DDRSDRC_MDR]
+        biceq   tmp1, tmp1, #AT91_DDRSDRC_MD
+        orreq   tmp1, tmp1, #AT91_DDRSDRC_MD_DDR2
+        streq   tmp1, [sdramc, #AT91_DDRSDRC_MDR]
        /* prepare for DDRAM self-refresh mode */
        ldr     tmp1, [sdramc, #AT91_DDRSDRC_LPR]
        str     tmp1, .saved_sam9_lpr
@@ -142,14 +129,26 @@ ddr_sr_enable:
        /* figure out if we use the second ram controller */
        cmp     ramc1, #0
-        ldrne   tmp2, [ramc1, #AT91_DDRSDRC_LPR]
+        beq     ddr_no_2nd_ctrl
-        strne   tmp2, .saved_sam9_lpr1
-        bicne   tmp2, #AT91_DDRSDRC_LPCB
+        ldr     tmp2, [ramc1, #AT91_DDRSDRC_MDR]
-        orrne   tmp2, #AT91_DDRSDRC_LPCB_SELF_REFRESH
+        str     tmp2, .saved_sam9_mdr1
+        bic     tmp2, tmp2, #~AT91_DDRSDRC_MD
+        cmp     tmp2, #AT91_DDRSDRC_MD_LOW_POWER_DDR
+        ldreq   tmp2, [ramc1, #AT91_DDRSDRC_MDR]
+        biceq   tmp2, tmp2, #AT91_DDRSDRC_MD
+        orreq   tmp2, tmp2, #AT91_DDRSDRC_MD_DDR2
+        streq   tmp2, [ramc1, #AT91_DDRSDRC_MDR]
+        ldr     tmp2, [ramc1, #AT91_DDRSDRC_LPR]
+        str     tmp2, .saved_sam9_lpr1
+        bic     tmp2, #AT91_DDRSDRC_LPCB
+        orr     tmp2, #AT91_DDRSDRC_LPCB_SELF_REFRESH
        /* Enable DDRAM self-refresh mode */
+        str     tmp2, [ramc1, #AT91_DDRSDRC_LPR]
+ddr_no_2nd_ctrl:
        str     tmp1, [sdramc, #AT91_DDRSDRC_LPR]
-        strne   tmp2, [ramc1, #AT91_DDRSDRC_LPR]
        b       sdr_sr_done
@@ -208,6 +207,7 @@ sdr_sr_done:
        /* Turn off the main oscillator */
        ldr     tmp1, [pmc, #AT91_CKGR_MOR]
        bic     tmp1, tmp1, #AT91_PMC_MOSCEN
+        orr     tmp1, tmp1, #AT91_PMC_KEY
        str     tmp1, [pmc, #AT91_CKGR_MOR]
        /* Wait for interrupt */
@@ -216,6 +216,7 @@ sdr_sr_done:
        /* Turn on the main oscillator */
        ldr     tmp1, [pmc, #AT91_CKGR_MOR]
        orr     tmp1, tmp1, #AT91_PMC_MOSCEN
+        orr     tmp1, tmp1, #AT91_PMC_KEY
        str     tmp1, [pmc, #AT91_CKGR_MOR]
        wait_moscrdy
@@ -280,12 +281,17 @@ sdr_sr_done:
         */
        cmp     memctrl, #AT91_MEMCTRL_DDRSDR
        bne     sdr_en_restore
+        /* Restore MDR in case of LPDDR1 */
+        ldr     tmp1, .saved_sam9_mdr
+        str     tmp1, [sdramc, #AT91_DDRSDRC_MDR]
        /* Restore LPR on AT91 with DDRAM */
        ldr     tmp1, .saved_sam9_lpr
        str     tmp1, [sdramc, #AT91_DDRSDRC_LPR]
        /* if we use the second ram controller */
        cmp     ramc1, #0
+        ldrne   tmp2, .saved_sam9_mdr1
+        strne   tmp2, [ramc1, #AT91_DDRSDRC_MDR]
        ldrne   tmp2, .saved_sam9_lpr1
        strne   tmp2, [ramc1, #AT91_DDRSDRC_LPR]
@@ -319,5 +325,11 @@ ram_restored:
 .saved_sam9_lpr1:
        .word 0
+.saved_sam9_mdr:
+        .word 0
+.saved_sam9_mdr1:
+        .word 0
 ENTRY(at91_slow_clock_sz)
        .word .-at91_slow_clock
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 3f32c47a6d74..d2e9f12d12f1 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -126,8 +126,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
 */
 void exynos_cpu_power_down(int cpu)
 {
-        if (cpu == 0 && (of_machine_is_compatible("samsung,exynos5420") ||
+        if (cpu == 0 && (soc_is_exynos5420() || soc_is_exynos5800())) {
-                of_machine_is_compatible("samsung,exynos5800"))) {
                /*
                 * Bypass power down for CPU0 during suspend. Check for
                 * the SYS_PWR_REG value to decide if we are suspending
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index 20f267121b3e..37266a826437 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -161,6 +161,34 @@ no_clk:
                of_genpd_add_provider_simple(np, &pd->pd);
        }
+        /* Assign the child power domains to their parents */
+        for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") {
+                struct generic_pm_domain *child_domain, *parent_domain;
+                struct of_phandle_args args;
+                args.np = np;
+                args.args_count = 0;
+                child_domain = of_genpd_get_from_provider(&args);
+                if (!child_domain)
+                        continue;
+                if (of_parse_phandle_with_args(np, "power-domains",
+                                         "#power-domain-cells", 0, &args) != 0)
+                        continue;
+                parent_domain = of_genpd_get_from_provider(&args);
+                if (!parent_domain)
+                        continue;
+                if (pm_genpd_add_subdomain(parent_domain, child_domain))
+                        pr_warn("%s failed to add subdomain: %s\n",
+                                parent_domain->name, child_domain->name);
+                else
+                        pr_info("%s has as child subdomain: %s.\n",
+                                parent_domain->name, child_domain->name);
+                of_node_put(np);
+        }
        return 0;
 }
 arch_initcall(exynos4_pm_init_power_domain);
diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
index 52e2b1a2fddb..318d127df147 100644
--- a/arch/arm/mach-exynos/suspend.c
+++ b/arch/arm/mach-exynos/suspend.c
@@ -87,8 +87,8 @@ static unsigned int exynos_pmu_spare3;
 static u32 exynos_irqwake_intmask = 0xffffffff;
 static const struct exynos_wkup_irq exynos3250_wkup_irq[] = {
-        { 73, BIT(1) }, /* RTC alarm */
+        { 105, BIT(1) }, /* RTC alarm */
-        { 74, BIT(2) }, /* RTC tick */
+        { 106, BIT(2) }, /* RTC tick */
        { /* sentinel */ },
 };
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 4ad6e473cf83..9de3412af406 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -211,8 +211,9 @@ static void __init imx6q_1588_init(void)
         * set bit IOMUXC_GPR1[21].  Or the PTP clock must be from pad
         * (external OSC), and we need to clear the bit.
         */
-        clksel = ptp_clk == enet_ref ? IMX6Q_GPR1_ENET_CLK_SEL_ANATOP :
+        clksel = clk_is_match(ptp_clk, enet_ref) ?
-                                       IMX6Q_GPR1_ENET_CLK_SEL_PAD;
+                                IMX6Q_GPR1_ENET_CLK_SEL_ANATOP :
+                                IMX6Q_GPR1_ENET_CLK_SEL_PAD;
        gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");
        if (!IS_ERR(gpr))
                regmap_update_bits(gpr, IOMUXC_GPR1,
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index 61bfe584a9d7..fc832040c6e9 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -20,6 +20,7 @@
 #include <linux/input.h>
 #include <linux/io.h>
 #include <linux/delay.h>
+#include <linux/smc91x.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
@@ -46,15 +47,20 @@ static struct resource smc91x_resources[] = {
        [1] = {
                .start  = MSM_GPIO_TO_INT(49),
                .end    = MSM_GPIO_TO_INT(49),
-                .flags  = IORESOURCE_IRQ,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
        },
 };
+static struct smc91x_platdata smc91x_platdata = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+};
 static struct platform_device smc91x_device = {
        .name           = "smc91x",
        .id             = 0,
        .num_resources  = ARRAY_SIZE(smc91x_resources),
        .resource       = smc91x_resources,
+        .dev.platform_data = &smc91x_platdata,
 };
 static struct platform_device *devices[] __initdata = {
diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c
index 4c748616ef47..10016a3bc698 100644
--- a/arch/arm/mach-msm/board-qsd8x50.c
+++ b/arch/arm/mach-msm/board-qsd8x50.c
@@ -22,6 +22,7 @@
 #include <linux/usb/msm_hsusb.h>
 #include <linux/err.h>
 #include <linux/clkdev.h>
+#include <linux/smc91x.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -49,15 +50,20 @@ static struct resource smc91x_resources[] = {
                .flags = IORESOURCE_MEM,
        },
        [1] = {
-                .flags = IORESOURCE_IRQ,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
        },
 };
+static struct smc91x_platdata smc91x_platdata = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+};
 static struct platform_device smc91x_device = {
        .name           = "smc91x",
        .id             = 0,
        .num_resources  = ARRAY_SIZE(smc91x_resources),
        .resource       = smc91x_resources,
+        .dev.platform_data = &smc91x_platdata,
 };
 static int __init msm_init_smc91x(void)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 92afb723dcfc..355b08936871 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1692,16 +1692,15 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
        if (ret == -EBUSY)
                pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
-        if (!ret) {
+        if (oh->clkdm) {
                /*
                 * Set the clockdomain to HW_AUTO, assuming that the
                 * previous state was HW_AUTO.
                 */
-                if (oh->clkdm && hwsup)
+                if (hwsup)
                        clkdm_allow_idle(oh->clkdm);
-        } else {
-                if (oh->clkdm)
+                clkdm_hwmod_disable(oh->clkdm, oh);
-                        clkdm_hwmod_disable(oh->clkdm, oh);
        }
        return ret;
@@ -2698,6 +2697,7 @@ static int __init _register(struct omap_hwmod *oh)
        INIT_LIST_HEAD(&oh->master_ports);
        INIT_LIST_HEAD(&oh->slave_ports);
        spin_lock_init(&oh->_lock);
+        lockdep_set_class(&oh->_lock, &oh->hwmod_key);
        oh->_state = _HWMOD_STATE_REGISTERED;
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index 9d4bec6ee742..9611c91d9b82 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -674,6 +674,7 @@ struct omap_hwmod {
        u32                             _sysc_cache;
        void __iomem                    *_mpu_rt_va;
        spinlock_t                      _lock;
+        struct lock_class_key           hwmod_key; /* unique lock class */
        struct list_head                node;
        struct omap_hwmod_ocp_if        *_mpu_port;
        unsigned int                    (*xlate_irq)(unsigned int);
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index e8692e7675b8..16fe7a1b7a35 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1466,55 +1466,18 @@ static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
 *
 */
-static struct omap_hwmod_class dra7xx_pcie_hwmod_class = {
+static struct omap_hwmod_class dra7xx_pciess_hwmod_class = {
        .name   = "pcie",
 };
 /* pcie1 */
-static struct omap_hwmod dra7xx_pcie1_hwmod = {
+static struct omap_hwmod dra7xx_pciess1_hwmod = {
        .name           = "pcie1",
-        .class          = &dra7xx_pcie_hwmod_class,
+        .class          = &dra7xx_pciess_hwmod_class,
        .clkdm_name     = "pcie_clkdm",
        .main_clk       = "l4_root_clk_div",
        .prcm = {
                .omap4 = {
-                        .clkctrl_offs   = DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET,
-                        .modulemode     = MODULEMODE_SWCTRL,
-                },
-        },
-};
-/* pcie2 */
-static struct omap_hwmod dra7xx_pcie2_hwmod = {
-        .name           = "pcie2",
-        .class          = &dra7xx_pcie_hwmod_class,
-        .clkdm_name     = "pcie_clkdm",
-        .main_clk       = "l4_root_clk_div",
-        .prcm = {
-                .omap4 = {
-                        .clkctrl_offs = DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET,
-                        .modulemode   = MODULEMODE_SWCTRL,
-                },
-        },
-};
-/*
- * 'PCIE PHY' class
- *
- */
-static struct omap_hwmod_class dra7xx_pcie_phy_hwmod_class = {
-        .name   = "pcie-phy",
-};
-/* pcie1 phy */
-static struct omap_hwmod dra7xx_pcie1_phy_hwmod = {
-        .name           = "pcie1-phy",
-        .class          = &dra7xx_pcie_phy_hwmod_class,
-        .clkdm_name     = "l3init_clkdm",
-        .main_clk       = "l4_root_clk_div",
-        .prcm = {
-                .omap4 = {
                        .clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS1_CLKCTRL_OFFSET,
                        .context_offs = DRA7XX_RM_L3INIT_PCIESS1_CONTEXT_OFFSET,
                        .modulemode   = MODULEMODE_SWCTRL,
@@ -1522,11 +1485,11 @@ static struct omap_hwmod dra7xx_pcie1_phy_hwmod = {
        },
 };
-/* pcie2 phy */
+/* pcie2 */
-static struct omap_hwmod dra7xx_pcie2_phy_hwmod = {
+static struct omap_hwmod dra7xx_pciess2_hwmod = {
-        .name           = "pcie2-phy",
+        .name           = "pcie2",
-        .class          = &dra7xx_pcie_phy_hwmod_class,
+        .class          = &dra7xx_pciess_hwmod_class,
-        .clkdm_name     = "l3init_clkdm",
+        .clkdm_name     = "pcie_clkdm",
        .main_clk       = "l4_root_clk_div",
        .prcm = {
                .omap4 = {
@@ -2877,50 +2840,34 @@ static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
-/* l3_main_1 -> pcie1 */
+/* l3_main_1 -> pciess1 */
-static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pcie1 = {
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pciess1 = {
        .master         = &dra7xx_l3_main_1_hwmod,
-        .slave          = &dra7xx_pcie1_hwmod,
+        .slave          = &dra7xx_pciess1_hwmod,
        .clk            = "l3_iclk_div",
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
-/* l4_cfg -> pcie1 */
+/* l4_cfg -> pciess1 */
-static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie1 = {
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pciess1 = {
        .master         = &dra7xx_l4_cfg_hwmod,
-        .slave          = &dra7xx_pcie1_hwmod,
+        .slave          = &dra7xx_pciess1_hwmod,
        .clk            = "l4_root_clk_div",
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
-/* l3_main_1 -> pcie2 */
+/* l3_main_1 -> pciess2 */
-static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pcie2 = {
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pciess2 = {
        .master         = &dra7xx_l3_main_1_hwmod,
-        .slave          = &dra7xx_pcie2_hwmod,
+        .slave          = &dra7xx_pciess2_hwmod,
        .clk            = "l3_iclk_div",
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
-/* l4_cfg -> pcie2 */
+/* l4_cfg -> pciess2 */
-static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie2 = {
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pciess2 = {
-        .master         = &dra7xx_l4_cfg_hwmod,
-        .slave          = &dra7xx_pcie2_hwmod,
-        .clk            = "l4_root_clk_div",
-        .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-/* l4_cfg -> pcie1 phy */
-static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie1_phy = {
-        .master         = &dra7xx_l4_cfg_hwmod,
-        .slave          = &dra7xx_pcie1_phy_hwmod,
-        .clk            = "l4_root_clk_div",
-        .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-/* l4_cfg -> pcie2 phy */
-static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie2_phy = {
        .master         = &dra7xx_l4_cfg_hwmod,
-        .slave          = &dra7xx_pcie2_phy_hwmod,
+        .slave          = &dra7xx_pciess2_hwmod,
        .clk            = "l4_root_clk_div",
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
@@ -3327,12 +3274,10 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
        &dra7xx_l4_cfg__mpu,
        &dra7xx_l4_cfg__ocp2scp1,
        &dra7xx_l4_cfg__ocp2scp3,
-        &dra7xx_l3_main_1__pcie1,
+        &dra7xx_l3_main_1__pciess1,
-        &dra7xx_l4_cfg__pcie1,
+        &dra7xx_l4_cfg__pciess1,
-        &dra7xx_l3_main_1__pcie2,
+        &dra7xx_l3_main_1__pciess2,
-        &dra7xx_l4_cfg__pcie2,
+        &dra7xx_l4_cfg__pciess2,
-        &dra7xx_l4_cfg__pcie1_phy,
-        &dra7xx_l4_cfg__pcie2_phy,
        &dra7xx_l3_main_1__qspi,
        &dra7xx_l4_per3__rtcss,
        &dra7xx_l4_cfg__sata,
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 190fa43e7479..e642b079e9f3 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -173,6 +173,7 @@ static void __init omap3_igep0030_rev_g_legacy_init(void)
 static void __init omap3_evm_legacy_init(void)
 {
+        hsmmc2_internal_input_clk();
        legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 149);
 }
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index a08a617a6c11..d6d6bc39e05c 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -252,10 +252,10 @@ static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
 {
        saved_mask[0] =
                omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
-                                        OMAP4_PRM_IRQSTATUS_MPU_OFFSET);
+                                        OMAP4_PRM_IRQENABLE_MPU_OFFSET);
        saved_mask[1] =
                omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
-                                        OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET);
+                                        OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
        omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
                                 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index 343c4e3a7c5d..f6d02e4cbcda 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -36,6 +36,7 @@
 #include <linux/platform_data/video-pxafb.h>
 #include <mach/bitfield.h>
 #include <linux/platform_data/mmc-pxamci.h>
+#include <linux/smc91x.h>
 #include "generic.h"
 #include "devices.h"
@@ -81,11 +82,16 @@ static struct resource smc91x_resources[] = {
        }
 };
+static struct smc91x_platdata smc91x_platdata = {
+        .flags = SMC91X_USE_32BIT | SMC91X_USE_DMA | SMC91X_NOWAIT,
+};
 static struct platform_device smc91x_device = {
        .name           = "smc91x",
        .id             = 0,
        .num_resources  = ARRAY_SIZE(smc91x_resources),
        .resource       = smc91x_resources,
+        .dev.platform_data = &smc91x_platdata,
 };
 static void idp_backlight_power(int on)
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index ad777b353bd5..eaee2c20b189 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -24,6 +24,7 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/pwm_backlight.h>
+#include <linux/smc91x.h>
 #include <asm/types.h>
 #include <asm/setup.h>
@@ -189,15 +190,20 @@ static struct resource smc91x_resources[] = {
        [1] = {
                .start  = LPD270_ETHERNET_IRQ,
                .end    = LPD270_ETHERNET_IRQ,
-                .flags  = IORESOURCE_IRQ,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
        },
 };
+struct smc91x_platdata smc91x_platdata = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+};
 static struct platform_device smc91x_device = {
        .name           = "smc91x",
        .id             = 0,
        .num_resources  = ARRAY_SIZE(smc91x_resources),
        .resource       = smc91x_resources,
+        .dev.platform_data = &smc91x_platdata,
 };
 static struct resource lpd270_flash_resources[] = {
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 850e506926df..c309593abdb2 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -28,6 +28,7 @@
 #include <linux/platform_data/video-clcd-versatile.h>
 #include <linux/io.h>
 #include <linux/smsc911x.h>
+#include <linux/smc91x.h>
 #include <linux/ata_platform.h>
 #include <linux/amba/mmci.h>
 #include <linux/gfp.h>
@@ -94,6 +95,10 @@ static struct smsc911x_platform_config smsc911x_config = {
        .phy_interface  = PHY_INTERFACE_MODE_MII,
 };
+static struct smc91x_platdata smc91x_platdata = {
+        .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT,
+};
 static struct platform_device realview_eth_device = {
        .name           = "smsc911x",
        .id             = 0,
@@ -107,6 +112,8 @@ int realview_eth_register(const char *name, struct resource *res)
        realview_eth_device.resource = res;
        if (strcmp(realview_eth_device.name, "smsc911x") == 0)
                realview_eth_device.dev.platform_data = &smsc911x_config;
+        else
+                realview_eth_device.dev.platform_data = &smc91x_platdata;
        return platform_device_register(&realview_eth_device);
 }
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 64c88d657f9e..b3869cbbcc68 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -234,7 +234,7 @@ static struct resource realview_eb_eth_resources[] = {
        [1] = {
                .start          = IRQ_EB_ETH,
                .end            = IRQ_EB_ETH,
-                .flags          = IORESOURCE_IRQ,
+                .flags          = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
        },
 };
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 169262e3040d..af868d258e66 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -12,6 +12,7 @@
 #include <linux/pm.h>
 #include <linux/serial_core.h>
 #include <linux/slab.h>
+#include <linux/smc91x.h>
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>
@@ -258,12 +259,17 @@ static int neponset_probe(struct platform_device *dev)
                        0x02000000, "smc91x-attrib"),
                { .flags = IORESOURCE_IRQ },
        };
+        struct smc91x_platdata smc91x_platdata = {
+                .flags = SMC91X_USE_8BIT | SMC91X_IO_SHIFT_2 | SMC91X_NOWAIT,
+        };
        struct platform_device_info smc91x_devinfo = {
                .parent = &dev->dev,
                .name = "smc91x",
                .id = 0,
                .res = smc91x_resources,
                .num_res = ARRAY_SIZE(smc91x_resources),
+                .data = &smc91x_platdata,
+                .size_data = sizeof(smc91x_platdata),
        };
        int ret, irq;
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
index 091261878eff..1525d7b5f1b7 100644
--- a/arch/arm/mach-sa1100/pleb.c
+++ b/arch/arm/mach-sa1100/pleb.c
@@ -11,6 +11,7 @@
 #include <linux/irq.h>
 #include <linux/io.h>
 #include <linux/mtd/partitions.h>
+#include <linux/smc91x.h>
 #include <mach/hardware.h>
 #include <asm/setup.h>
@@ -43,12 +44,18 @@ static struct resource smc91x_resources[] = {
 #endif
 };
+static struct smc91x_platdata smc91x_platdata = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+};
 static struct platform_device smc91x_device = {
        .name           = "smc91x",
        .id             = 0,
        .num_resources  = ARRAY_SIZE(smc91x_resources),
        .resource       = smc91x_resources,
+        .dev = {
+                .platform_data  = &smc91x_platdata,
+        },
 };
 static struct platform_device *devices[] __initdata = {
diff --git a/arch/arm/mach-socfpga/core.h b/arch/arm/mach-socfpga/core.h
index 483cb467bf65..a0f3b1cd497c 100644
--- a/arch/arm/mach-socfpga/core.h
+++ b/arch/arm/mach-socfpga/core.h
@@ -45,6 +45,6 @@ extern char secondary_trampoline, secondary_trampoline_end;
 extern unsigned long socfpga_cpu1start_addr;
-#define SOCFPGA_SCU_VIRT_BASE   0xfffec000
+#define SOCFPGA_SCU_VIRT_BASE   0xfee00000
 #endif
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c
index 383d61e138af..f5e597c207b9 100644
--- a/arch/arm/mach-socfpga/socfpga.c
+++ b/arch/arm/mach-socfpga/socfpga.c
@@ -23,6 +23,7 @@
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <asm/cacheflush.h>
 #include "core.h"
@@ -73,6 +74,10 @@ void __init socfpga_sysmgr_init(void)
                        (u32 *) &socfpga_cpu1start_addr))
                pr_err("SMP: Need cpu1-start-addr in device tree.\n");
+        /* Ensure that socfpga_cpu1start_addr is visible to other CPUs */
+        smp_wmb();
+        sync_cache_w(&socfpga_cpu1start_addr);
        sys_manager_base_addr = of_iomap(np, 0);
        np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr");
diff --git a/arch/arm/mach-sti/board-dt.c b/arch/arm/mach-sti/board-dt.c
index b067390cef4e..b373acade338 100644
--- a/arch/arm/mach-sti/board-dt.c
+++ b/arch/arm/mach-sti/board-dt.c
@@ -18,6 +18,7 @@ static const char *stih41x_dt_match[] __initdata = {
        "st,stih415",
        "st,stih416",
        "st,stih407",
+        "st,stih410",
        "st,stih418",
        NULL
 };
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 3c2509b4b694..4be537977040 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -42,6 +42,7 @@ if ARCH_VEXPRESS
 config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA
        bool "Enable A5 and A9 only errata work-arounds"
        default y
+        select ARM_ERRATA_643719 if SMP
        select ARM_ERRATA_720789
        select PL310_ERRATA_753970 if CACHE_L2X0
        help
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 9b4f29e595a4..b4f92b9a13ac 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -738,7 +738,7 @@ config CPU_ICACHE_DISABLE
 config CPU_DCACHE_DISABLE
        bool "Disable D-Cache (C-bit)"
-        depends on CPU_CP15
+        depends on CPU_CP15 && !SMP
        help
          Say Y here to disable the processor data cache. Unless
          you have a reason not to or are unsure, say N.
@@ -825,6 +825,20 @@ config KUSER_HELPERS
          Say N here only if you are absolutely certain that you do not
          need these helpers; otherwise, the safe option is to say Y.
+config VDSO
+        bool "Enable VDSO for acceleration of some system calls"
+        depends on AEABI && MMU && CPU_V7
+        default y if ARM_ARCH_TIMER
+        select GENERIC_TIME_VSYSCALL
+        help
+          Place in the process address space an ELF shared object
+          providing fast implementations of gettimeofday and
+          clock_gettime.  Systems that implement the ARM architected
+          timer will receive maximum benefit.
+          You must have glibc 2.22 or later for programs to seamlessly
+          take advantage of this.
 config DMA_CACHE_RWFO
        bool "Enable read/write for ownership DMA cache maintenance"
        depends on CPU_V6K && SMP
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 8b933dc43e24..e309c8f35af5 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -1131,23 +1131,22 @@ static void __init l2c310_of_parse(const struct device_node *np,
        }
        ret = l2x0_cache_size_of_parse(np, aux_val, aux_mask, &assoc, SZ_512K);
-        if (ret)
+        if (!ret) {
-                return;
+                switch (assoc) {
+                case 16:
-        switch (assoc) {
+                        *aux_val &= ~L2X0_AUX_CTRL_ASSOC_MASK;
-        case 16:
+                        *aux_val |= L310_AUX_CTRL_ASSOCIATIVITY_16;
-                *aux_val &= ~L2X0_AUX_CTRL_ASSOC_MASK;
+                        *aux_mask &= ~L2X0_AUX_CTRL_ASSOC_MASK;
-                *aux_val |= L310_AUX_CTRL_ASSOCIATIVITY_16;
+                        break;
-                *aux_mask &= ~L2X0_AUX_CTRL_ASSOC_MASK;
+                case 8:
-                break;
+                        *aux_val &= ~L2X0_AUX_CTRL_ASSOC_MASK;
-        case 8:
+                        *aux_mask &= ~L2X0_AUX_CTRL_ASSOC_MASK;
-                *aux_val &= ~L2X0_AUX_CTRL_ASSOC_MASK;
+                        break;
-                *aux_mask &= ~L2X0_AUX_CTRL_ASSOC_MASK;
+                default:
-                break;
+                        pr_err("L2C-310 OF cache associativity %d invalid, only 8 or 16 permitted\n",
-        default:
+                               assoc);
-                pr_err("L2C-310 OF cache associativity %d invalid, only 8 or 16 permitted\n",
+                        break;
-                       assoc);
+                }
-                break;
        }
        prefetch = l2x0_saved_regs.prefetch_ctrl;
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index b8fe72080108..3866f81c70bc 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -171,7 +171,7 @@ static int __dma_supported(struct device *dev, u64 mask, bool warn)
         */
        if (sizeof(mask) != sizeof(dma_addr_t) &&
            mask > (dma_addr_t)~0 &&
-            dma_to_pfn(dev, ~0) < max_pfn) {
+            dma_to_pfn(dev, ~0) < max_pfn - 1) {
                if (warn) {
                        dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
                                 mask);
@@ -1150,13 +1150,28 @@ static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
        gfp |= __GFP_NOWARN | __GFP_HIGHMEM;
        while (count) {
-                int j, order = __fls(count);
+                int j, order;
+                for (order = __fls(count); order > 0; --order) {
+                        /*
+                         * We do not want OOM killer to be invoked as long
+                         * as we can fall back to single pages, so we force
+                         * __GFP_NORETRY for orders higher than zero.
+                         */
+                        pages[i] = alloc_pages(gfp | __GFP_NORETRY, order);
+                        if (pages[i])
+                                break;
+                }
-                pages[i] = alloc_pages(gfp, order);
+                if (!pages[i]) {
-                while (!pages[i] && order)
+                        /*
-                        pages[i] = alloc_pages(gfp, --order);
+                         * Fall back to single page allocation.
-                if (!pages[i])
+                         * Might invoke OOM killer as last resort.
-                        goto error;
+                         */
+                        pages[i] = alloc_pages(gfp, 0);
+                        if (!pages[i])
+                                goto error;
+                }
                if (order) {
                        split_page(pages[i], order);
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index a982dc3190df..6333d9c17875 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -552,6 +552,7 @@ do_DataAbort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
        pr_alert("Unhandled fault: %s (0x%03x) at 0x%08lx\n",
                inf->name, fsr, addr);
+        show_pte(current->mm, addr);
        info.si_signo = inf->sig;
        info.si_errno = 0;
diff --git a/arch/arm/mm/pageattr.c b/arch/arm/mm/pageattr.c
index 004e35cdcfff..cf30daff8932 100644
--- a/arch/arm/mm/pageattr.c
+++ b/arch/arm/mm/pageattr.c
@@ -49,7 +49,10 @@ static int change_memory_common(unsigned long addr, int numpages,
                WARN_ON_ONCE(1);
        }
-        if (!is_module_address(start) || !is_module_address(end - 1))
+        if (start < MODULES_VADDR || start >= MODULES_END)
+                return -EINVAL;
+        if (end < MODULES_VADDR || start >= MODULES_END)
                return -EINVAL;
        data.set_mask = set_mask;
diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S
index 0a0b7a9167b6..ee5b66f847c4 100644
--- a/arch/arm/mm/proc-arm940.S
+++ b/arch/arm/mm/proc-arm940.S
@@ -297,26 +297,16 @@ __arm940_setup:
        mcr     p15, 0, r0, c6, c0, 1
        ldr     r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM
-        ldr     r1, =(CONFIG_DRAM_SIZE >> 12)   @ size of RAM (must be >= 4KB)
+        ldr     r7, =CONFIG_DRAM_SIZE >> 12     @ size of RAM (must be >= 4KB)
-        mov     r2, #10                         @ 11 is the minimum (4KB)
+        pr_val  r3, r0, r7, #1
-1:      add     r2, r2, #1                      @ area size *= 2
+        mcr     p15, 0, r3, c6, c1, 0           @ set area 1, RAM
-        mov     r1, r1, lsr #1
+        mcr     p15, 0, r3, c6, c1, 1
-        bne     1b                              @ count not zero r-shift
-        orr     r0, r0, r2, lsl #1              @ the area register value
-        orr     r0, r0, #1                      @ set enable bit
-        mcr     p15, 0, r0, c6, c1, 0           @ set area 1, RAM
-        mcr     p15, 0, r0, c6, c1, 1
        ldr     r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH
-        ldr     r1, =(CONFIG_FLASH_SIZE >> 12)  @ size of FLASH (must be >= 4KB)
+        ldr     r7, =CONFIG_FLASH_SIZE          @ size of FLASH (must be >= 4KB)
-        mov     r2, #10                         @ 11 is the minimum (4KB)
+        pr_val  r3, r0, r6, #1
-1:      add     r2, r2, #1                      @ area size *= 2
+        mcr     p15, 0, r3, c6, c2, 0           @ set area 2, ROM/FLASH
-        mov     r1, r1, lsr #1
+        mcr     p15, 0, r3, c6, c2, 1
-        bne     1b                              @ count not zero r-shift
-        orr     r0, r0, r2, lsl #1              @ the area register value
-        orr     r0, r0, #1                      @ set enable bit
-        mcr     p15, 0, r0, c6, c2, 0           @ set area 2, ROM/FLASH
-        mcr     p15, 0, r0, c6, c2, 1
        mov     r0, #0x06
        mcr     p15, 0, r0, c2, c0, 0           @ Region 1&2 cacheable
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S
index c85b40d2117e..7361837edc31 100644
--- a/arch/arm/mm/proc-arm946.S
+++ b/arch/arm/mm/proc-arm946.S
@@ -343,24 +343,14 @@ __arm946_setup:
        mcr     p15, 0, r0, c6, c0, 0           @ set region 0, default
        ldr     r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM
-        ldr     r1, =(CONFIG_DRAM_SIZE >> 12)   @ size of RAM (must be >= 4KB)
+        ldr     r7, =CONFIG_DRAM_SIZE           @ size of RAM (must be >= 4KB)
-        mov     r2, #10                         @ 11 is the minimum (4KB)
+        pr_val  r3, r0, r7, #1
-1:      add     r2, r2, #1                      @ area size *= 2
+        mcr     p15, 0, r3, c6, c1, 0
-        mov     r1, r1, lsr #1
-        bne     1b                              @ count not zero r-shift
-        orr     r0, r0, r2, lsl #1              @ the region register value
-        orr     r0, r0, #1                      @ set enable bit
-        mcr     p15, 0, r0, c6, c1, 0           @ set region 1, RAM
        ldr     r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH
-        ldr     r1, =(CONFIG_FLASH_SIZE >> 12)  @ size of FLASH (must be >= 4KB)
+        ldr     r7, =CONFIG_FLASH_SIZE          @ size of FLASH (must be >= 4KB)
-        mov     r2, #10                         @ 11 is the minimum (4KB)
+        pr_val  r3, r0, r7, #1
-1:      add     r2, r2, #1                      @ area size *= 2
+        mcr     p15, 0, r3, c6, c2, 0
-        mov     r1, r1, lsr #1
-        bne     1b                              @ count not zero r-shift
-        orr     r0, r0, r2, lsl #1              @ the region register value
-        orr     r0, r0, #1                      @ set enable bit
-        mcr     p15, 0, r0, c6, c2, 0           @ set region 2, ROM/FLASH
        mov     r0, #0x06
        mcr     p15, 0, r0, c2, c0, 0           @ region 1,2 d-cacheable
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index 0f13b5f9281e..c671f345266a 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -335,3 +335,27 @@ ENTRY(\name\()_tlb_fns)
 .macro  initfn, func, base
        .long   \func - \base
 .endm
+        /*
+         * Macro to calculate the log2 size for the protection region
+         * registers. This calculates rd = log2(size) - 1.  tmp must
+         * not be the same register as rd.
+         */
+.macro  pr_sz, rd, size, tmp
+        mov     \tmp, \size, lsr #12
+        mov     \rd, #11
+1:      movs    \tmp, \tmp, lsr #1
+        addne   \rd, \rd, #1
+        bne     1b
+.endm
+        /*
+         * Macro to generate a protection region register value
+         * given a pre-masked address, size, and enable bit.
+         * Corrupts size.
+         */
+.macro  pr_val, dest, addr, size, enable
+        pr_sz   \dest, \size, \size             @ calculate log2(size) - 1
+        orr     \dest, \addr, \dest, lsl #1     @ mask in the region size
+        orr     \dest, \dest, \enable
+.endm
diff --git a/arch/arm/vdso/.gitignore b/arch/arm/vdso/.gitignore
new file mode 100644
index 000000000000..6b47f6e0b032
--- /dev/null
+++ b/arch/arm/vdso/.gitignore
@@ -0,0 +1,3 @@
+vdso.lds
+vdso.so.raw
+vdsomunge
diff --git a/arch/arm/vdso/Makefile b/arch/arm/vdso/Makefile
new file mode 100644
index 000000000000..8aa791051029
--- /dev/null
+++ b/arch/arm/vdso/Makefile
@@ -0,0 +1,74 @@
+hostprogs-y := vdsomunge
+obj-vdso := vgettimeofday.o datapage.o
+# Build rules
+targets := $(obj-vdso) vdso.so vdso.so.dbg vdso.so.raw vdso.lds
+obj-vdso := $(addprefix $(obj)/, $(obj-vdso))
+ccflags-y := -shared -fPIC -fno-common -fno-builtin -fno-stack-protector
+ccflags-y += -nostdlib -Wl,-soname=linux-vdso.so.1 -DDISABLE_BRANCH_PROFILING
+ccflags-y += -Wl,--no-undefined $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
+obj-$(CONFIG_VDSO) += vdso.o
+extra-$(CONFIG_VDSO) += vdso.lds
+CPPFLAGS_vdso.lds += -P -C -U$(ARCH)
+CFLAGS_REMOVE_vdso.o = -pg
+# Force -O2 to avoid libgcc dependencies
+CFLAGS_REMOVE_vgettimeofday.o = -pg -Os
+CFLAGS_vgettimeofday.o = -O2
+# Disable gcov profiling for VDSO code
+GCOV_PROFILE := n
+# Force dependency
+$(obj)/vdso.o : $(obj)/vdso.so
+# Link rule for the .so file
+$(obj)/vdso.so.raw: $(src)/vdso.lds $(obj-vdso) FORCE
+        $(call if_changed,vdsold)
+$(obj)/vdso.so.dbg: $(obj)/vdso.so.raw $(obj)/vdsomunge FORCE
+        $(call if_changed,vdsomunge)
+# Strip rule for the .so file
+$(obj)/%.so: OBJCOPYFLAGS := -S
+$(obj)/%.so: $(obj)/%.so.dbg FORCE
+        $(call if_changed,objcopy)
+# Actual build commands
+quiet_cmd_vdsold = VDSO    $@
+      cmd_vdsold = $(CC) $(c_flags) -Wl,-T $(filter %.lds,$^) $(filter %.o,$^) \
+                   $(call cc-ldoption, -Wl$(comma)--build-id) \
+                   -Wl,-Bsymbolic -Wl,-z,max-page-size=4096 \
+                   -Wl,-z,common-page-size=4096 -o $@
+quiet_cmd_vdsomunge = MUNGE   $@
+      cmd_vdsomunge = $(objtree)/$(obj)/vdsomunge $< $@
+#
+# Install the unstripped copy of vdso.so.dbg.  If our toolchain
+# supports build-id, install .build-id links as well.
+#
+# Cribbed from arch/x86/vdso/Makefile.
+#
+quiet_cmd_vdso_install = INSTALL $<
+define cmd_vdso_install
+        cp $< "$(MODLIB)/vdso/vdso.so"; \
+        if readelf -n $< | grep -q 'Build ID'; then \
+          buildid=`readelf -n $< |grep 'Build ID' |sed -e 's/^.*Build ID: \(.*\)$$/\1/'`; \
+          first=`echo $$buildid | cut -b-2`; \
+          last=`echo $$buildid | cut -b3-`; \
+          mkdir -p "$(MODLIB)/vdso/.build-id/$$first"; \
+          ln -sf "../../vdso.so" "$(MODLIB)/vdso/.build-id/$$first/$$last.debug"; \
+        fi
+endef
+$(MODLIB)/vdso: FORCE
+        @mkdir -p $(MODLIB)/vdso
+PHONY += vdso_install
+vdso_install: $(obj)/vdso.so.dbg $(MODLIB)/vdso FORCE
+        $(call cmd,vdso_install)
diff --git a/arch/arm/vdso/datapage.S b/arch/arm/vdso/datapage.S
new file mode 100644
index 000000000000..a2e60367931b
--- /dev/null
+++ b/arch/arm/vdso/datapage.S
@@ -0,0 +1,15 @@
+#include <linux/linkage.h>
+#include <asm/asm-offsets.h>
+        .align 2
+.L_vdso_data_ptr:
+        .long   _start - . - VDSO_DATA_SIZE
+ENTRY(__get_datapage)
+        .fnstart
+        adr     r0, .L_vdso_data_ptr
+        ldr     r1, [r0]
+        add     r0, r0, r1
+        bx      lr
+        .fnend
+ENDPROC(__get_datapage)
diff --git a/arch/arm/vdso/vdso.S b/arch/arm/vdso/vdso.S
new file mode 100644
index 000000000000..b2b97e3e7bab
--- /dev/null
+++ b/arch/arm/vdso/vdso.S
@@ -0,0 +1,35 @@
+/*
+ * Adapted from arm64 version.
+ *
+ * Copyright (C) 2012 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * Author: Will Deacon <will.deacon@arm.com>
+ */
+#include <linux/init.h>
+#include <linux/linkage.h>
+#include <linux/const.h>
+#include <asm/page.h>
+        __PAGE_ALIGNED_DATA
+        .globl vdso_start, vdso_end
+        .balign PAGE_SIZE
+vdso_start:
+        .incbin "arch/arm/vdso/vdso.so"
+        .balign PAGE_SIZE
+vdso_end:
+        .previous
diff --git a/arch/arm/vdso/vdso.lds.S b/arch/arm/vdso/vdso.lds.S
new file mode 100644
index 000000000000..89ca89f12d23
--- /dev/null
+++ b/arch/arm/vdso/vdso.lds.S
@@ -0,0 +1,87 @@
+/*
+ * Adapted from arm64 version.
+ *
+ * GNU linker script for the VDSO library.
+ *
+ * Copyright (C) 2012 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * Author: Will Deacon <will.deacon@arm.com>
+ * Heavily based on the vDSO linker scripts for other archs.
+ */
+#include <linux/const.h>
+#include <asm/page.h>
+#include <asm/vdso.h>
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SECTIONS
+{
+        PROVIDE(_start = .);
+        . = SIZEOF_HEADERS;
+        .hash           : { *(.hash) }                  :text
+        .gnu.hash       : { *(.gnu.hash) }
+        .dynsym         : { *(.dynsym) }
+        .dynstr         : { *(.dynstr) }
+        .gnu.version    : { *(.gnu.version) }
+        .gnu.version_d  : { *(.gnu.version_d) }
+        .gnu.version_r  : { *(.gnu.version_r) }
+        .note           : { *(.note.*) }                :text   :note
+        .eh_frame_hdr   : { *(.eh_frame_hdr) }          :text   :eh_frame_hdr
+        .eh_frame       : { KEEP (*(.eh_frame)) }       :text
+        .dynamic        : { *(.dynamic) }               :text   :dynamic
+        .rodata         : { *(.rodata*) }               :text
+        .text           : { *(.text*) }                 :text   =0xe7f001f2
+        .got            : { *(.got) }
+        .rel.plt        : { *(.rel.plt) }
+        /DISCARD/       : {
+                *(.note.GNU-stack)
+                *(.data .data.* .gnu.linkonce.d.* .sdata*)
+                *(.bss .sbss .dynbss .dynsbss)
+        }
+}
+/*
+ * We must supply the ELF program headers explicitly to get just one
+ * PT_LOAD segment, and set the flags explicitly to make segments read-only.
+ */
+PHDRS
+{
+        text            PT_LOAD         FLAGS(5) FILEHDR PHDRS; /* PF_R|PF_X */
+        dynamic         PT_DYNAMIC      FLAGS(4);               /* PF_R */
+        note            PT_NOTE         FLAGS(4);               /* PF_R */
+        eh_frame_hdr    PT_GNU_EH_FRAME;
+}
+VERSION
+{
+        LINUX_2.6 {
+        global:
+                __vdso_clock_gettime;
+                __vdso_gettimeofday;
+        local: *;
+        };
+}
diff --git a/arch/arm/vdso/vdsomunge.c b/arch/arm/vdso/vdsomunge.c
new file mode 100644
index 000000000000..9005b07296c8
--- /dev/null
+++ b/arch/arm/vdso/vdsomunge.c
@@ -0,0 +1,201 @@
+/*
+ * Copyright 2015 Mentor Graphics Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2 of the
+ * License.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ *
+ * vdsomunge - Host program which produces a shared object
+ * architecturally specified to be usable by both soft- and hard-float
+ * programs.
+ *
+ * The Procedure Call Standard for the ARM Architecture (ARM IHI
+ * 0042E) says:
+ *
+ *      6.4.1 VFP and Base Standard Compatibility
+ *
+ *      Code compiled for the VFP calling standard is compatible with
+ *      the base standard (and vice-versa) if no floating-point or
+ *      containerized vector arguments or results are used.
+ *
+ * And ELF for the ARM Architecture (ARM IHI 0044E) (Table 4-2) says:
+ *
+ *      If both EF_ARM_ABI_FLOAT_XXXX bits are clear, conformance to the
+ *      base procedure-call standard is implied.
+ *
+ * The VDSO is built with -msoft-float, as with the rest of the ARM
+ * kernel, and uses no floating point arguments or results.  The build
+ * process will produce a shared object that may or may not have the
+ * EF_ARM_ABI_FLOAT_SOFT flag set (it seems to depend on the binutils
+ * version; binutils starting with 2.24 appears to set it).  The
+ * EF_ARM_ABI_FLOAT_HARD flag should definitely not be set, and this
+ * program will error out if it is.
+ *
+ * If the soft-float flag is set, this program clears it.  That's all
+ * it does.
+ */
+#define _GNU_SOURCE
+#include <byteswap.h>
+#include <elf.h>
+#include <errno.h>
+#include <error.h>
+#include <fcntl.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <sys/mman.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <unistd.h>
+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+#define HOST_ORDER ELFDATA2LSB
+#elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#define HOST_ORDER ELFDATA2MSB
+#endif
+/* Some of the ELF constants we'd like to use were added to <elf.h>
+ * relatively recently.
+ */
+#ifndef EF_ARM_EABI_VER5
+#define EF_ARM_EABI_VER5 0x05000000
+#endif
+#ifndef EF_ARM_ABI_FLOAT_SOFT
+#define EF_ARM_ABI_FLOAT_SOFT 0x200
+#endif
+#ifndef EF_ARM_ABI_FLOAT_HARD
+#define EF_ARM_ABI_FLOAT_HARD 0x400
+#endif
+static const char *outfile;
+static void cleanup(void)
+{
+        if (error_message_count > 0 && outfile != NULL)
+                unlink(outfile);
+}
+static Elf32_Word read_elf_word(Elf32_Word word, bool swap)
+{
+        return swap ? bswap_32(word) : word;
+}
+static Elf32_Half read_elf_half(Elf32_Half half, bool swap)
+{
+        return swap ? bswap_16(half) : half;
+}
+static void write_elf_word(Elf32_Word val, Elf32_Word *dst, bool swap)
+{
+        *dst = swap ? bswap_32(val) : val;
+}
+int main(int argc, char **argv)
+{
+        const Elf32_Ehdr *inhdr;
+        bool clear_soft_float;
+        const char *infile;
+        Elf32_Word e_flags;
+        const void *inbuf;
+        struct stat stat;
+        void *outbuf;
+        bool swap;
+        int outfd;
+        int infd;
+        atexit(cleanup);
+        if (argc != 3)
+                error(EXIT_FAILURE, 0, "Usage: %s [infile] [outfile]", argv[0]);
+        infile = argv[1];
+        outfile = argv[2];
+        infd = open(infile, O_RDONLY);
+        if (infd < 0)
+                error(EXIT_FAILURE, errno, "Cannot open %s", infile);
+        if (fstat(infd, &stat) != 0)
+                error(EXIT_FAILURE, errno, "Failed stat for %s", infile);
+        inbuf = mmap(NULL, stat.st_size, PROT_READ, MAP_PRIVATE, infd, 0);
+        if (inbuf == MAP_FAILED)
+                error(EXIT_FAILURE, errno, "Failed to map %s", infile);
+        close(infd);
+        inhdr = inbuf;
+        if (memcmp(&inhdr->e_ident, ELFMAG, SELFMAG) != 0)
+                error(EXIT_FAILURE, 0, "Not an ELF file");
+        if (inhdr->e_ident[EI_CLASS] != ELFCLASS32)
+                error(EXIT_FAILURE, 0, "Unsupported ELF class");
+        swap = inhdr->e_ident[EI_DATA] != HOST_ORDER;
+        if (read_elf_half(inhdr->e_type, swap) != ET_DYN)
+                error(EXIT_FAILURE, 0, "Not a shared object");
+        if (read_elf_half(inhdr->e_machine, swap) != EM_ARM) {
+                error(EXIT_FAILURE, 0, "Unsupported architecture %#x",
+                      inhdr->e_machine);
+        }
+        e_flags = read_elf_word(inhdr->e_flags, swap);
+        if (EF_ARM_EABI_VERSION(e_flags) != EF_ARM_EABI_VER5) {
+                error(EXIT_FAILURE, 0, "Unsupported EABI version %#x",
+                      EF_ARM_EABI_VERSION(e_flags));
+        }
+        if (e_flags & EF_ARM_ABI_FLOAT_HARD)
+                error(EXIT_FAILURE, 0,
+                      "Unexpected hard-float flag set in e_flags");
+        clear_soft_float = !!(e_flags & EF_ARM_ABI_FLOAT_SOFT);
+        outfd = open(outfile, O_RDWR | O_CREAT | O_TRUNC, S_IRUSR | S_IWUSR);
+        if (outfd < 0)
+                error(EXIT_FAILURE, errno, "Cannot open %s", outfile);
+        if (ftruncate(outfd, stat.st_size) != 0)
+                error(EXIT_FAILURE, errno, "Cannot truncate %s", outfile);
+        outbuf = mmap(NULL, stat.st_size, PROT_READ | PROT_WRITE, MAP_SHARED,
+                      outfd, 0);
+        if (outbuf == MAP_FAILED)
+                error(EXIT_FAILURE, errno, "Failed to map %s", outfile);
+        close(outfd);
+        memcpy(outbuf, inbuf, stat.st_size);
+        if (clear_soft_float) {
+                Elf32_Ehdr *outhdr;
+                outhdr = outbuf;
+                e_flags &= ~EF_ARM_ABI_FLOAT_SOFT;
+                write_elf_word(e_flags, &outhdr->e_flags, swap);
+        }
+        if (msync(outbuf, stat.st_size, MS_SYNC) != 0)
+                error(EXIT_FAILURE, errno, "Failed to sync %s", outfile);
+        return EXIT_SUCCESS;
+}
diff --git a/arch/arm/vdso/vgettimeofday.c b/arch/arm/vdso/vgettimeofday.c
new file mode 100644
index 000000000000..79214d5ff097
--- /dev/null
+++ b/arch/arm/vdso/vgettimeofday.c
@@ -0,0 +1,282 @@
+/*
+ * Copyright 2015 Mentor Graphics Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2 of the
+ * License.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <linux/compiler.h>
+#include <linux/hrtimer.h>
+#include <linux/time.h>
+#include <asm/arch_timer.h>
+#include <asm/barrier.h>
+#include <asm/bug.h>
+#include <asm/page.h>
+#include <asm/unistd.h>
+#include <asm/vdso_datapage.h>
+#ifndef CONFIG_AEABI
+#error This code depends on AEABI system call conventions
+#endif
+extern struct vdso_data *__get_datapage(void);
+static notrace u32 __vdso_read_begin(const struct vdso_data *vdata)
+{
+        u32 seq;
+repeat:
+        seq = ACCESS_ONCE(vdata->seq_count);
+        if (seq & 1) {
+                cpu_relax();
+                goto repeat;
+        }
+        return seq;
+}
+static notrace u32 vdso_read_begin(const struct vdso_data *vdata)
+{
+        u32 seq;
+        seq = __vdso_read_begin(vdata);
+        smp_rmb(); /* Pairs with smp_wmb in vdso_write_end */
+        return seq;
+}
+static notrace int vdso_read_retry(const struct vdso_data *vdata, u32 start)
+{
+        smp_rmb(); /* Pairs with smp_wmb in vdso_write_begin */
+        return vdata->seq_count != start;
+}
+static notrace long clock_gettime_fallback(clockid_t _clkid,
+                                           struct timespec *_ts)
+{
+        register struct timespec *ts asm("r1") = _ts;
+        register clockid_t clkid asm("r0") = _clkid;
+        register long ret asm ("r0");
+        register long nr asm("r7") = __NR_clock_gettime;
+        asm volatile(
+        "       swi #0\n"
+        : "=r" (ret)
+        : "r" (clkid), "r" (ts), "r" (nr)
+        : "memory");
+        return ret;
+}
+static notrace int do_realtime_coarse(struct timespec *ts,
+                                      struct vdso_data *vdata)
+{
+        u32 seq;
+        do {
+                seq = vdso_read_begin(vdata);
+                ts->tv_sec = vdata->xtime_coarse_sec;
+                ts->tv_nsec = vdata->xtime_coarse_nsec;
+        } while (vdso_read_retry(vdata, seq));
+        return 0;
+}
+static notrace int do_monotonic_coarse(struct timespec *ts,
+                                       struct vdso_data *vdata)
+{
+        struct timespec tomono;
+        u32 seq;
+        do {
+                seq = vdso_read_begin(vdata);
+                ts->tv_sec = vdata->xtime_coarse_sec;
+                ts->tv_nsec = vdata->xtime_coarse_nsec;
+                tomono.tv_sec = vdata->wtm_clock_sec;
+                tomono.tv_nsec = vdata->wtm_clock_nsec;
+        } while (vdso_read_retry(vdata, seq));
+        ts->tv_sec += tomono.tv_sec;
+        timespec_add_ns(ts, tomono.tv_nsec);
+        return 0;
+}
+#ifdef CONFIG_ARM_ARCH_TIMER
+static notrace u64 get_ns(struct vdso_data *vdata)
+{
+        u64 cycle_delta;
+        u64 cycle_now;
+        u64 nsec;
+        cycle_now = arch_counter_get_cntvct();
+        cycle_delta = (cycle_now - vdata->cs_cycle_last) & vdata->cs_mask;
+        nsec = (cycle_delta * vdata->cs_mult) + vdata->xtime_clock_snsec;
+        nsec >>= vdata->cs_shift;
+        return nsec;
+}
+static notrace int do_realtime(struct timespec *ts, struct vdso_data *vdata)
+{
+        u64 nsecs;
+        u32 seq;
+        do {
+                seq = vdso_read_begin(vdata);
+                if (!vdata->tk_is_cntvct)
+                        return -1;
+                ts->tv_sec = vdata->xtime_clock_sec;
+                nsecs = get_ns(vdata);
+        } while (vdso_read_retry(vdata, seq));
+        ts->tv_nsec = 0;
+        timespec_add_ns(ts, nsecs);
+        return 0;
+}
+static notrace int do_monotonic(struct timespec *ts, struct vdso_data *vdata)
+{
+        struct timespec tomono;
+        u64 nsecs;
+        u32 seq;
+        do {
+                seq = vdso_read_begin(vdata);
+                if (!vdata->tk_is_cntvct)
+                        return -1;
+                ts->tv_sec = vdata->xtime_clock_sec;
+                nsecs = get_ns(vdata);
+                tomono.tv_sec = vdata->wtm_clock_sec;
+                tomono.tv_nsec = vdata->wtm_clock_nsec;
+        } while (vdso_read_retry(vdata, seq));
+        ts->tv_sec += tomono.tv_sec;
+        ts->tv_nsec = 0;
+        timespec_add_ns(ts, nsecs + tomono.tv_nsec);
+        return 0;
+}
+#else /* CONFIG_ARM_ARCH_TIMER */
+static notrace int do_realtime(struct timespec *ts, struct vdso_data *vdata)
+{
+        return -1;
+}
+static notrace int do_monotonic(struct timespec *ts, struct vdso_data *vdata)
+{
+        return -1;
+}
+#endif /* CONFIG_ARM_ARCH_TIMER */
+notrace int __vdso_clock_gettime(clockid_t clkid, struct timespec *ts)
+{
+        struct vdso_data *vdata;
+        int ret = -1;
+        vdata = __get_datapage();
+        switch (clkid) {
+        case CLOCK_REALTIME_COARSE:
+                ret = do_realtime_coarse(ts, vdata);
+                break;
+        case CLOCK_MONOTONIC_COARSE:
+                ret = do_monotonic_coarse(ts, vdata);
+                break;
+        case CLOCK_REALTIME:
+                ret = do_realtime(ts, vdata);
+                break;
+        case CLOCK_MONOTONIC:
+                ret = do_monotonic(ts, vdata);
+                break;
+        default:
+                break;
+        }
+        if (ret)
+                ret = clock_gettime_fallback(clkid, ts);
+        return ret;
+}
+static notrace long gettimeofday_fallback(struct timeval *_tv,
+                                          struct timezone *_tz)
+{
+        register struct timezone *tz asm("r1") = _tz;
+        register struct timeval *tv asm("r0") = _tv;
+        register long ret asm ("r0");
+        register long nr asm("r7") = __NR_gettimeofday;
+        asm volatile(
+        "       swi #0\n"
+        : "=r" (ret)
+        : "r" (tv), "r" (tz), "r" (nr)
+        : "memory");
+        return ret;
+}
+notrace int __vdso_gettimeofday(struct timeval *tv, struct timezone *tz)
+{
+        struct timespec ts;
+        struct vdso_data *vdata;
+        int ret;
+        vdata = __get_datapage();
+        ret = do_realtime(&ts, vdata);
+        if (ret)
+                return gettimeofday_fallback(tv, tz);
+        if (tv) {
+                tv->tv_sec = ts.tv_sec;
+                tv->tv_usec = ts.tv_nsec / 1000;
+        }
+        if (tz) {
+                tz->tz_minuteswest = vdata->tz_minuteswest;
+                tz->tz_dsttime = vdata->tz_dsttime;
+        }
+        return ret;
+}
+/* Avoid unresolved references emitted by GCC */
+void __aeabi_unwind_cpp_pr0(void)
+{
+}
+void __aeabi_unwind_cpp_pr1(void)
+{
+}
+void __aeabi_unwind_cpp_pr2(void)
+{
+}