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-rw-r--r--arch/arm/boot/dts/at91sam9g20.dtsi119
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi106
-rw-r--r--arch/arm/boot/dts/at91sam9m10g45ek.dts35
-rw-r--r--arch/arm/boot/dts/msm8660-surf.dts24
-rw-r--r--arch/arm/boot/dts/usb_a9g20.dts30
-rw-r--r--arch/arm/common/vic.c1
-rw-r--r--arch/arm/include/asm/localtimer.h2
-rw-r--r--arch/arm/kernel/perf_event_v7.c4
-rw-r--r--arch/arm/mach-at91/Kconfig11
-rw-r--r--arch/arm/mach-at91/Makefile3
-rw-r--r--arch/arm/mach-at91/Makefile.boot2
-rw-r--r--arch/arm/mach-at91/at91sam9260.c8
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c6
-rw-r--r--arch/arm/mach-at91/board-dt.c123
-rw-r--r--arch/arm/mach-msm/board-msm8x60.c58
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c3
-rw-r--r--arch/arm/mach-omap2/hsmmc.c12
-rw-r--r--arch/arm/mach-omap2/usb-musb.c3
-rw-r--r--arch/arm/mach-s3c2410/s3c2410.c2
-rw-r--r--arch/arm/mach-s3c2412/s3c2412.c2
-rw-r--r--arch/arm/mach-s3c2416/s3c2416.c2
-rw-r--r--arch/arm/mach-s3c2440/s3c2440.c2
-rw-r--r--arch/arm/mach-s3c2440/s3c2442.c2
-rw-r--r--arch/arm/mach-tegra/cpu-tegra.c1
-rw-r--r--arch/arm/mach-ux500/Kconfig1
-rw-r--r--arch/arm/mm/init.c7
-rw-r--r--arch/arm/plat-s5p/irq-gpioint.c6
27 files changed, 549 insertions, 26 deletions
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
new file mode 100644
index 000000000000..aeef04269cf8
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -0,0 +1,119 @@
1/*
2 * at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
10
11/include/ "skeleton.dtsi"
12
13/ {
14 model = "Atmel AT91SAM9G20 family SoC";
15 compatible = "atmel,at91sam9g20";
16 interrupt-parent = <&aic>;
17
18 aliases {
19 serial0 = &dbgu;
20 serial1 = &usart0;
21 serial2 = &usart1;
22 serial3 = &usart2;
23 serial4 = &usart3;
24 serial5 = &usart4;
25 serial6 = &usart5;
26 };
27 cpus {
28 cpu@0 {
29 compatible = "arm,arm926ejs";
30 };
31 };
32
33 memory@20000000 {
34 reg = <0x20000000 0x08000000>;
35 };
36
37 ahb {
38 compatible = "simple-bus";
39 #address-cells = <1>;
40 #size-cells = <1>;
41 ranges;
42
43 apb {
44 compatible = "simple-bus";
45 #address-cells = <1>;
46 #size-cells = <1>;
47 ranges;
48
49 aic: interrupt-controller@fffff000 {
50 #interrupt-cells = <1>;
51 compatible = "atmel,at91rm9200-aic";
52 interrupt-controller;
53 interrupt-parent;
54 reg = <0xfffff000 0x200>;
55 };
56
57 dbgu: serial@fffff200 {
58 compatible = "atmel,at91sam9260-usart";
59 reg = <0xfffff200 0x200>;
60 interrupts = <1>;
61 status = "disabled";
62 };
63
64 usart0: serial@fffb0000 {
65 compatible = "atmel,at91sam9260-usart";
66 reg = <0xfffb0000 0x200>;
67 interrupts = <6>;
68 atmel,use-dma-rx;
69 atmel,use-dma-tx;
70 status = "disabled";
71 };
72
73 usart1: serial@fffb4000 {
74 compatible = "atmel,at91sam9260-usart";
75 reg = <0xfffb4000 0x200>;
76 interrupts = <7>;
77 atmel,use-dma-rx;
78 atmel,use-dma-tx;
79 status = "disabled";
80 };
81
82 usart2: serial@fffb8000 {
83 compatible = "atmel,at91sam9260-usart";
84 reg = <0xfffb8000 0x200>;
85 interrupts = <8>;
86 atmel,use-dma-rx;
87 atmel,use-dma-tx;
88 status = "disabled";
89 };
90
91 usart3: serial@fffd0000 {
92 compatible = "atmel,at91sam9260-usart";
93 reg = <0xfffd0000 0x200>;
94 interrupts = <23>;
95 atmel,use-dma-rx;
96 atmel,use-dma-tx;
97 status = "disabled";
98 };
99
100 usart4: serial@fffd4000 {
101 compatible = "atmel,at91sam9260-usart";
102 reg = <0xfffd4000 0x200>;
103 interrupts = <24>;
104 atmel,use-dma-rx;
105 atmel,use-dma-tx;
106 status = "disabled";
107 };
108
109 usart5: serial@fffd8000 {
110 compatible = "atmel,at91sam9260-usart";
111 reg = <0xfffd8000 0x200>;
112 interrupts = <25>;
113 atmel,use-dma-rx;
114 atmel,use-dma-tx;
115 status = "disabled";
116 };
117 };
118 };
119};
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
new file mode 100644
index 000000000000..db6a45202f26
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -0,0 +1,106 @@
1/*
2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
5 *
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 model = "Atmel AT91SAM9G45 family SoC";
16 compatible = "atmel,at91sam9g45";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 serial4 = &usart3;
25 };
26 cpus {
27 cpu@0 {
28 compatible = "arm,arm926ejs";
29 };
30 };
31
32 memory@70000000 {
33 reg = <0x70000000 0x10000000>;
34 };
35
36 ahb {
37 compatible = "simple-bus";
38 #address-cells = <1>;
39 #size-cells = <1>;
40 ranges;
41
42 apb {
43 compatible = "simple-bus";
44 #address-cells = <1>;
45 #size-cells = <1>;
46 ranges;
47
48 aic: interrupt-controller@fffff000 {
49 #interrupt-cells = <1>;
50 compatible = "atmel,at91rm9200-aic";
51 interrupt-controller;
52 interrupt-parent;
53 reg = <0xfffff000 0x200>;
54 };
55
56 dma: dma-controller@ffffec00 {
57 compatible = "atmel,at91sam9g45-dma";
58 reg = <0xffffec00 0x200>;
59 interrupts = <21>;
60 };
61
62 dbgu: serial@ffffee00 {
63 compatible = "atmel,at91sam9260-usart";
64 reg = <0xffffee00 0x200>;
65 interrupts = <1>;
66 status = "disabled";
67 };
68
69 usart0: serial@fff8c000 {
70 compatible = "atmel,at91sam9260-usart";
71 reg = <0xfff8c000 0x200>;
72 interrupts = <7>;
73 atmel,use-dma-rx;
74 atmel,use-dma-tx;
75 status = "disabled";
76 };
77
78 usart1: serial@fff90000 {
79 compatible = "atmel,at91sam9260-usart";
80 reg = <0xfff90000 0x200>;
81 interrupts = <8>;
82 atmel,use-dma-rx;
83 atmel,use-dma-tx;
84 status = "disabled";
85 };
86
87 usart2: serial@fff94000 {
88 compatible = "atmel,at91sam9260-usart";
89 reg = <0xfff94000 0x200>;
90 interrupts = <9>;
91 atmel,use-dma-rx;
92 atmel,use-dma-tx;
93 status = "disabled";
94 };
95
96 usart3: serial@fff98000 {
97 compatible = "atmel,at91sam9260-usart";
98 reg = <0xfff98000 0x200>;
99 interrupts = <10>;
100 atmel,use-dma-rx;
101 atmel,use-dma-tx;
102 status = "disabled";
103 };
104 };
105 };
106};
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
new file mode 100644
index 000000000000..85b34f59cd82
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -0,0 +1,35 @@
1/*
2 * at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9/dts-v1/;
10/include/ "at91sam9g45.dtsi"
11
12/ {
13 model = "Atmel AT91SAM9M10G45-EK";
14 compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9";
15
16 chosen {
17 bootargs = "mem=64M console=ttyS0,115200 mtdparts=atmel_nand:4M(bootstrap/uboot/kernel)ro,60M(rootfs),-(data) root=/dev/mtdblock1 rw rootfstype=jffs2";
18 };
19
20 memory@70000000 {
21 reg = <0x70000000 0x4000000>;
22 };
23
24 ahb {
25 apb {
26 dbgu: serial@ffffee00 {
27 status = "okay";
28 };
29
30 usart1: serial@fff90000 {
31 status = "okay";
32 };
33 };
34 };
35};
diff --git a/arch/arm/boot/dts/msm8660-surf.dts b/arch/arm/boot/dts/msm8660-surf.dts
new file mode 100644
index 000000000000..15ded0deaa79
--- /dev/null
+++ b/arch/arm/boot/dts/msm8660-surf.dts
@@ -0,0 +1,24 @@
1/dts-v1/;
2
3/include/ "skeleton.dtsi"
4
5/ {
6 model = "Qualcomm MSM8660 SURF";
7 compatible = "qcom,msm8660-surf", "qcom,msm8660";
8 interrupt-parent = <&intc>;
9
10 intc: interrupt-controller@02080000 {
11 compatible = "qcom,msm-8660-qgic";
12 interrupt-controller;
13 #interrupt-cells = <1>;
14 reg = < 0x02080000 0x1000 >,
15 < 0x02081000 0x1000 >;
16 };
17
18 serial@19c400000 {
19 compatible = "qcom,msm-hsuart", "qcom,msm-uart";
20 reg = <0x19c40000 0x1000>,
21 <0x19c00000 0x1000>;
22 interrupts = <195>;
23 };
24};
diff --git a/arch/arm/boot/dts/usb_a9g20.dts b/arch/arm/boot/dts/usb_a9g20.dts
new file mode 100644
index 000000000000..d66e2c00ac35
--- /dev/null
+++ b/arch/arm/boot/dts/usb_a9g20.dts
@@ -0,0 +1,30 @@
1/*
2 * usb_a9g20.dts - Device Tree file for Caloa USB A9G20 board
3 *
4 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
6 * Licensed under GPLv2 or later.
7 */
8/dts-v1/;
9/include/ "at91sam9g20.dtsi"
10
11/ {
12 model = "Calao USB A9G20";
13 compatible = "calao,usb-a9g20", "atmel,at91sam9g20", "atmel,at91sam9";
14
15 chosen {
16 bootargs = "mem=64M console=ttyS0,115200 mtdparts=atmel_nand:128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),4M(kernel),120M(rootfs),-(data) root=/dev/mtdblock5 rw rootfstype=ubifs";
17 };
18
19 memory@20000000 {
20 reg = <0x20000000 0x4000000>;
21 };
22
23 ahb {
24 apb {
25 dbgu: serial@fffff200 {
26 status = "okay";
27 };
28 };
29 };
30};
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 7aa4262ada7a..197f81c77351 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -259,7 +259,6 @@ static void __init vic_disable(void __iomem *base)
259 writel(0, base + VIC_INT_SELECT); 259 writel(0, base + VIC_INT_SELECT);
260 writel(0, base + VIC_INT_ENABLE); 260 writel(0, base + VIC_INT_ENABLE);
261 writel(~0, base + VIC_INT_ENABLE_CLEAR); 261 writel(~0, base + VIC_INT_ENABLE_CLEAR);
262 writel(0, base + VIC_IRQ_STATUS);
263 writel(0, base + VIC_ITCR); 262 writel(0, base + VIC_ITCR);
264 writel(~0, base + VIC_INT_SOFT_CLEAR); 263 writel(~0, base + VIC_INT_SOFT_CLEAR);
265} 264}
diff --git a/arch/arm/include/asm/localtimer.h b/arch/arm/include/asm/localtimer.h
index 080d74f8128d..ff66638ff54d 100644
--- a/arch/arm/include/asm/localtimer.h
+++ b/arch/arm/include/asm/localtimer.h
@@ -10,6 +10,8 @@
10#ifndef __ASM_ARM_LOCALTIMER_H 10#ifndef __ASM_ARM_LOCALTIMER_H
11#define __ASM_ARM_LOCALTIMER_H 11#define __ASM_ARM_LOCALTIMER_H
12 12
13#include <linux/errno.h>
14
13struct clock_event_device; 15struct clock_event_device;
14 16
15/* 17/*
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 4c851834f68e..6be3e2e4d838 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -321,8 +321,8 @@ static const unsigned armv7_a9_perf_map[PERF_COUNT_HW_MAX] = {
321 [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, 321 [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES,
322 [PERF_COUNT_HW_INSTRUCTIONS] = 322 [PERF_COUNT_HW_INSTRUCTIONS] =
323 ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE, 323 ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE,
324 [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_COHERENT_LINE_HIT, 324 [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_DCACHE_ACCESS,
325 [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_COHERENT_LINE_MISS, 325 [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_DCACHE_REFILL,
326 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, 326 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE,
327 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, 327 [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
328 [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_CLOCK_CYCLES, 328 [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_CLOCK_CYCLES,
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 22484670e7ba..4b59d96e1cd8 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -442,6 +442,17 @@ endif
442 442
443# ---------------------------------------------------------- 443# ----------------------------------------------------------
444 444
445comment "Generic Board Type"
446
447config MACH_AT91SAM_DT
448 bool "Atmel AT91SAM Evaluation Kits with device-tree support"
449 select USE_OF
450 help
451 Select this if you want to experiment device-tree with
452 an Atmel Evaluation Kit.
453
454# ----------------------------------------------------------
455
445comment "AT91 Board Options" 456comment "AT91 Board Options"
446 457
447config MTD_AT91_DATAFLASH_CARD 458config MTD_AT91_DATAFLASH_CARD
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index bf57e8b1c9d0..3ff245ebcad1 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -74,6 +74,9 @@ obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
74# AT91SAM9G45 board-specific support 74# AT91SAM9G45 board-specific support
75obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o 75obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o
76 76
77# AT91SAM board with device-tree
78obj-$(CONFIG_MACH_AT91SAM_DT) += board-dt.o
79
77# AT91CAP9 board-specific support 80# AT91CAP9 board-specific support
78obj-$(CONFIG_MACH_AT91CAP9ADK) += board-cap9adk.o 81obj-$(CONFIG_MACH_AT91CAP9ADK) += board-cap9adk.o
79 82
diff --git a/arch/arm/mach-at91/Makefile.boot b/arch/arm/mach-at91/Makefile.boot
index 3462b815054a..08c665affde4 100644
--- a/arch/arm/mach-at91/Makefile.boot
+++ b/arch/arm/mach-at91/Makefile.boot
@@ -16,3 +16,5 @@ else
16params_phys-y := 0x20000100 16params_phys-y := 0x20000100
17initrd_phys-y := 0x20410000 17initrd_phys-y := 0x20410000
18endif 18endif
19
20dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9m10g45ek.dtb usb_a9g20.dtb
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index cb397be14448..f4518b49cb82 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -199,6 +199,14 @@ static struct clk_lookup periph_clocks_lookups[] = {
199 CLKDEV_CON_DEV_ID("t4_clk", "atmel_tcb.1", &tc4_clk), 199 CLKDEV_CON_DEV_ID("t4_clk", "atmel_tcb.1", &tc4_clk),
200 CLKDEV_CON_DEV_ID("t5_clk", "atmel_tcb.1", &tc5_clk), 200 CLKDEV_CON_DEV_ID("t5_clk", "atmel_tcb.1", &tc5_clk),
201 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk), 201 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk),
202 /* more usart lookup table for DT entries */
203 CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
204 CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
205 CLKDEV_CON_DEV_ID("usart", "fffb4000.serial", &usart1_clk),
206 CLKDEV_CON_DEV_ID("usart", "fffb8000.serial", &usart2_clk),
207 CLKDEV_CON_DEV_ID("usart", "fffd0000.serial", &usart3_clk),
208 CLKDEV_CON_DEV_ID("usart", "fffd4000.serial", &usart4_clk),
209 CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk),
202}; 210};
203 211
204static struct clk_lookup usart_clocks_lookups[] = { 212static struct clk_lookup usart_clocks_lookups[] = {
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index e04c5fb6f1ee..8baf5a1ed167 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -215,6 +215,12 @@ static struct clk_lookup periph_clocks_lookups[] = {
215 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tcb0_clk), 215 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tcb0_clk),
216 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), 216 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
217 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), 217 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
218 /* more usart lookup table for DT entries */
219 CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),
220 CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk),
221 CLKDEV_CON_DEV_ID("usart", "fff90000.serial", &usart1_clk),
222 CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
223 CLKDEV_CON_DEV_ID("usart", "fff98000.serial", &usart3_clk),
218}; 224};
219 225
220static struct clk_lookup usart_clocks_lookups[] = { 226static struct clk_lookup usart_clocks_lookups[] = {
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c
new file mode 100644
index 000000000000..0b7d32778210
--- /dev/null
+++ b/arch/arm/mach-at91/board-dt.c
@@ -0,0 +1,123 @@
1/*
2 * Setup code for AT91SAM Evaluation Kits with Device Tree support
3 *
4 * Covers: * AT91SAM9G45-EKES board
5 * * AT91SAM9M10-EKES board
6 * * AT91SAM9M10G45-EK board
7 *
8 * Copyright (C) 2011 Atmel,
9 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
10 *
11 * Licensed under GPLv2 or later.
12 */
13
14#include <linux/types.h>
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/gpio.h>
18#include <linux/irqdomain.h>
19#include <linux/of_irq.h>
20#include <linux/of_platform.h>
21
22#include <mach/hardware.h>
23#include <mach/board.h>
24#include <mach/system_rev.h>
25#include <mach/at91sam9_smc.h>
26
27#include <asm/setup.h>
28#include <asm/irq.h>
29#include <asm/mach/arch.h>
30#include <asm/mach/map.h>
31#include <asm/mach/irq.h>
32
33#include "sam9_smc.h"
34#include "generic.h"
35
36
37static void __init ek_init_early(void)
38{
39 /* Initialize processor: 12.000 MHz crystal */
40 at91_initialize(12000000);
41
42 /* DGBU on ttyS0. (Rx & Tx only) */
43 at91_register_uart(0, 0, 0);
44
45 /* set serial console to ttyS0 (ie, DBGU) */
46 at91_set_serial_console(0);
47}
48
49/* det_pin is not connected */
50static struct atmel_nand_data __initdata ek_nand_data = {
51 .ale = 21,
52 .cle = 22,
53 .rdy_pin = AT91_PIN_PC8,
54 .enable_pin = AT91_PIN_PC14,
55};
56
57static struct sam9_smc_config __initdata ek_nand_smc_config = {
58 .ncs_read_setup = 0,
59 .nrd_setup = 2,
60 .ncs_write_setup = 0,
61 .nwe_setup = 2,
62
63 .ncs_read_pulse = 4,
64 .nrd_pulse = 4,
65 .ncs_write_pulse = 4,
66 .nwe_pulse = 4,
67
68 .read_cycle = 7,
69 .write_cycle = 7,
70
71 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
72 .tdf_cycles = 3,
73};
74
75static void __init ek_add_device_nand(void)
76{
77 ek_nand_data.bus_width_16 = board_have_nand_16bit();
78 /* setup bus-width (8 or 16) */
79 if (ek_nand_data.bus_width_16)
80 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
81 else
82 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
83
84 /* configure chip-select 3 (NAND) */
85 sam9_smc_configure(3, &ek_nand_smc_config);
86
87 at91_add_device_nand(&ek_nand_data);
88}
89
90static const struct of_device_id aic_of_match[] __initconst = {
91 { .compatible = "atmel,at91rm9200-aic", },
92 {},
93};
94
95static void __init at91_dt_init_irq(void)
96{
97 irq_domain_generate_simple(aic_of_match, 0xfffff000, 0);
98 at91_init_irq_default();
99}
100
101static void __init at91_dt_device_init(void)
102{
103 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
104
105 /* NAND */
106 ek_add_device_nand();
107}
108
109static const char *at91_dt_board_compat[] __initdata = {
110 "atmel,at91sam9m10g45ek",
111 "calao,usb-a9g20",
112 NULL
113};
114
115DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")
116 /* Maintainer: Atmel */
117 .timer = &at91sam926x_timer,
118 .map_io = at91_map_io,
119 .init_early = ek_init_early,
120 .init_irq = at91_dt_init_irq,
121 .init_machine = at91_dt_device_init,
122 .dt_compat = at91_dt_board_compat,
123MACHINE_END
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 1163b6fd05d2..10fa8f6e32c9 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -1,4 +1,4 @@
1/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. 1/* Copyright (c) 2010, 2011, Code Aurora Forum. All rights reserved.
2 * 2 *
3 * This program is free software; you can redistribute it and/or modify 3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and 4 * it under the terms of the GNU General Public License version 2 and
@@ -8,18 +8,16 @@
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details. 10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
15 * 02110-1301, USA.
16 *
17 */ 11 */
18 12
19#include <linux/kernel.h> 13#include <linux/kernel.h>
20#include <linux/platform_device.h> 14#include <linux/platform_device.h>
21#include <linux/io.h> 15#include <linux/io.h>
22#include <linux/irq.h> 16#include <linux/irq.h>
17#include <linux/irqdomain.h>
18#include <linux/of.h>
19#include <linux/of_address.h>
20#include <linux/of_platform.h>
23 21
24#include <asm/mach-types.h> 22#include <asm/mach-types.h>
25#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
@@ -64,6 +62,41 @@ static void __init msm8x60_init(void)
64{ 62{
65} 63}
66 64
65#ifdef CONFIG_OF
66static struct of_dev_auxdata msm_auxdata_lookup[] __initdata = {
67 {}
68};
69
70static struct of_device_id msm_dt_gic_match[] __initdata = {
71 { .compatible = "qcom,msm-8660-qgic", },
72 {}
73};
74
75static void __init msm8x60_dt_init(void)
76{
77 struct device_node *node;
78
79 node = of_find_matching_node_by_address(NULL, msm_dt_gic_match,
80 MSM8X60_QGIC_DIST_PHYS);
81 if (node)
82 irq_domain_add_simple(node, GIC_SPI_START);
83
84 if (of_machine_is_compatible("qcom,msm8660-surf")) {
85 printk(KERN_INFO "Init surf UART registers\n");
86 msm8x60_init_uart12dm();
87 }
88
89 of_platform_populate(NULL, of_default_bus_match_table,
90 msm_auxdata_lookup, NULL);
91}
92
93static const char *msm8x60_fluid_match[] __initdata = {
94 "qcom,msm8660-fluid",
95 "qcom,msm8660-surf",
96 NULL
97};
98#endif /* CONFIG_OF */
99
67MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3") 100MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
68 .map_io = msm8x60_map_io, 101 .map_io = msm8x60_map_io,
69 .init_irq = msm8x60_init_irq, 102 .init_irq = msm8x60_init_irq,
@@ -91,3 +124,14 @@ MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
91 .init_machine = msm8x60_init, 124 .init_machine = msm8x60_init,
92 .timer = &msm_timer, 125 .timer = &msm_timer,
93MACHINE_END 126MACHINE_END
127
128#ifdef CONFIG_OF
129/* TODO: General device tree support for all MSM. */
130DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
131 .map_io = msm8x60_map_io,
132 .init_irq = msm8x60_init_irq,
133 .init_machine = msm8x60_dt_init,
134 .timer = &msm_timer,
135 .dt_compat = msm8x60_fluid_match,
136MACHINE_END
137#endif /* CONFIG_OF */
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 2028464cf5b9..f79b7d2a8ed4 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -193,7 +193,8 @@ static int __init omap2430_i2c_init(void)
193{ 193{
194 omap_register_i2c_bus(1, 100, sdp2430_i2c1_boardinfo, 194 omap_register_i2c_bus(1, 100, sdp2430_i2c1_boardinfo,
195 ARRAY_SIZE(sdp2430_i2c1_boardinfo)); 195 ARRAY_SIZE(sdp2430_i2c1_boardinfo));
196 omap2_pmic_init("twl4030", &sdp2430_twldata); 196 omap_pmic_init(2, 100, "twl4030", INT_24XX_SYS_NIRQ,
197 &sdp2430_twldata);
197 return 0; 198 return 0;
198} 199}
199 200
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index a9b45c76e1d3..097a42d81e59 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -137,8 +137,7 @@ static void omap4_hsmmc1_before_set_reg(struct device *dev, int slot,
137 */ 137 */
138 reg = omap4_ctrl_pad_readl(control_pbias_offset); 138 reg = omap4_ctrl_pad_readl(control_pbias_offset);
139 reg &= ~(OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK | 139 reg &= ~(OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
140 OMAP4_MMC1_PWRDNZ_MASK | 140 OMAP4_MMC1_PWRDNZ_MASK);
141 OMAP4_USBC1_ICUSB_PWRDNZ_MASK);
142 omap4_ctrl_pad_writel(reg, control_pbias_offset); 141 omap4_ctrl_pad_writel(reg, control_pbias_offset);
143} 142}
144 143
@@ -156,8 +155,7 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot,
156 else 155 else
157 reg |= OMAP4_MMC1_PBIASLITE_VMODE_MASK; 156 reg |= OMAP4_MMC1_PBIASLITE_VMODE_MASK;
158 reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK | 157 reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
159 OMAP4_MMC1_PWRDNZ_MASK | 158 OMAP4_MMC1_PWRDNZ_MASK);
160 OMAP4_USBC1_ICUSB_PWRDNZ_MASK);
161 omap4_ctrl_pad_writel(reg, control_pbias_offset); 159 omap4_ctrl_pad_writel(reg, control_pbias_offset);
162 160
163 timeout = jiffies + msecs_to_jiffies(5); 161 timeout = jiffies + msecs_to_jiffies(5);
@@ -171,16 +169,14 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot,
171 if (reg & OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK) { 169 if (reg & OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK) {
172 pr_err("Pbias Voltage is not same as LDO\n"); 170 pr_err("Pbias Voltage is not same as LDO\n");
173 /* Caution : On VMODE_ERROR Power Down MMC IO */ 171 /* Caution : On VMODE_ERROR Power Down MMC IO */
174 reg &= ~(OMAP4_MMC1_PWRDNZ_MASK | 172 reg &= ~(OMAP4_MMC1_PWRDNZ_MASK);
175 OMAP4_USBC1_ICUSB_PWRDNZ_MASK);
176 omap4_ctrl_pad_writel(reg, control_pbias_offset); 173 omap4_ctrl_pad_writel(reg, control_pbias_offset);
177 } 174 }
178 } else { 175 } else {
179 reg = omap4_ctrl_pad_readl(control_pbias_offset); 176 reg = omap4_ctrl_pad_readl(control_pbias_offset);
180 reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK | 177 reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
181 OMAP4_MMC1_PWRDNZ_MASK | 178 OMAP4_MMC1_PWRDNZ_MASK |
182 OMAP4_MMC1_PBIASLITE_VMODE_MASK | 179 OMAP4_MMC1_PBIASLITE_VMODE_MASK);
183 OMAP4_USBC1_ICUSB_PWRDNZ_MASK);
184 omap4_ctrl_pad_writel(reg, control_pbias_offset); 180 omap4_ctrl_pad_writel(reg, control_pbias_offset);
185 } 181 }
186} 182}
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index a65145b02a55..19e4dac62a8c 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -137,9 +137,6 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data)
137 musb_plat.mode = board_data->mode; 137 musb_plat.mode = board_data->mode;
138 musb_plat.extvbus = board_data->extvbus; 138 musb_plat.extvbus = board_data->extvbus;
139 139
140 if (cpu_is_omap44xx())
141 omap4430_phy_init(dev);
142
143 if (cpu_is_omap3517() || cpu_is_omap3505()) { 140 if (cpu_is_omap3517() || cpu_is_omap3505()) {
144 oh_name = "am35x_otg_hs"; 141 oh_name = "am35x_otg_hs";
145 name = "musb-am35x"; 142 name = "musb-am35x";
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index f1d3bd8f6f17..343a540d86a9 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -170,7 +170,9 @@ int __init s3c2410_init(void)
170{ 170{
171 printk("S3C2410: Initialising architecture\n"); 171 printk("S3C2410: Initialising architecture\n");
172 172
173#ifdef CONFIG_PM
173 register_syscore_ops(&s3c2410_pm_syscore_ops); 174 register_syscore_ops(&s3c2410_pm_syscore_ops);
175#endif
174 register_syscore_ops(&s3c24xx_irq_syscore_ops); 176 register_syscore_ops(&s3c24xx_irq_syscore_ops);
175 177
176 return sysdev_register(&s3c2410_sysdev); 178 return sysdev_register(&s3c2410_sysdev);
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index ef0958d3e5c6..57a1e01e4e50 100644
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -245,7 +245,9 @@ int __init s3c2412_init(void)
245{ 245{
246 printk("S3C2412: Initialising architecture\n"); 246 printk("S3C2412: Initialising architecture\n");
247 247
248#ifdef CONFIG_PM
248 register_syscore_ops(&s3c2412_pm_syscore_ops); 249 register_syscore_ops(&s3c2412_pm_syscore_ops);
250#endif
249 register_syscore_ops(&s3c24xx_irq_syscore_ops); 251 register_syscore_ops(&s3c24xx_irq_syscore_ops);
250 252
251 return sysdev_register(&s3c2412_sysdev); 253 return sysdev_register(&s3c2412_sysdev);
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c
index 494ce913dc95..20b3fdfb3051 100644
--- a/arch/arm/mach-s3c2416/s3c2416.c
+++ b/arch/arm/mach-s3c2416/s3c2416.c
@@ -97,7 +97,9 @@ int __init s3c2416_init(void)
97 97
98 s3c_fb_setname("s3c2443-fb"); 98 s3c_fb_setname("s3c2443-fb");
99 99
100#ifdef CONFIG_PM
100 register_syscore_ops(&s3c2416_pm_syscore_ops); 101 register_syscore_ops(&s3c2416_pm_syscore_ops);
102#endif
101 register_syscore_ops(&s3c24xx_irq_syscore_ops); 103 register_syscore_ops(&s3c24xx_irq_syscore_ops);
102 104
103 return sysdev_register(&s3c2416_sysdev); 105 return sysdev_register(&s3c2416_sysdev);
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index ce99ff72838d..2270d3360216 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -55,7 +55,9 @@ int __init s3c2440_init(void)
55 55
56 /* register suspend/resume handlers */ 56 /* register suspend/resume handlers */
57 57
58#ifdef CONFIG_PM
58 register_syscore_ops(&s3c2410_pm_syscore_ops); 59 register_syscore_ops(&s3c2410_pm_syscore_ops);
60#endif
59 register_syscore_ops(&s3c244x_pm_syscore_ops); 61 register_syscore_ops(&s3c244x_pm_syscore_ops);
60 register_syscore_ops(&s3c24xx_irq_syscore_ops); 62 register_syscore_ops(&s3c24xx_irq_syscore_ops);
61 63
diff --git a/arch/arm/mach-s3c2440/s3c2442.c b/arch/arm/mach-s3c2440/s3c2442.c
index 9ad99f8016a1..6f2b65e6e068 100644
--- a/arch/arm/mach-s3c2440/s3c2442.c
+++ b/arch/arm/mach-s3c2440/s3c2442.c
@@ -169,7 +169,9 @@ int __init s3c2442_init(void)
169{ 169{
170 printk("S3C2442: Initialising architecture\n"); 170 printk("S3C2442: Initialising architecture\n");
171 171
172#ifdef CONFIG_PM
172 register_syscore_ops(&s3c2410_pm_syscore_ops); 173 register_syscore_ops(&s3c2410_pm_syscore_ops);
174#endif
173 register_syscore_ops(&s3c244x_pm_syscore_ops); 175 register_syscore_ops(&s3c244x_pm_syscore_ops);
174 register_syscore_ops(&s3c24xx_irq_syscore_ops); 176 register_syscore_ops(&s3c24xx_irq_syscore_ops);
175 177
diff --git a/arch/arm/mach-tegra/cpu-tegra.c b/arch/arm/mach-tegra/cpu-tegra.c
index 0e1016a827ac..0e0fd4d889bd 100644
--- a/arch/arm/mach-tegra/cpu-tegra.c
+++ b/arch/arm/mach-tegra/cpu-tegra.c
@@ -32,7 +32,6 @@
32 32
33#include <asm/system.h> 33#include <asm/system.h>
34 34
35#include <mach/hardware.h>
36#include <mach/clk.h> 35#include <mach/clk.h>
37 36
38/* Frequency table index must be sequential starting at 0 */ 37/* Frequency table index must be sequential starting at 0 */
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 4210cb434dbc..a3e0c8692f0d 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -6,6 +6,7 @@ config UX500_SOC_COMMON
6 select ARM_GIC 6 select ARM_GIC
7 select HAS_MTU 7 select HAS_MTU
8 select ARM_ERRATA_753970 8 select ARM_ERRATA_753970
9 select ARM_ERRATA_754322
9 10
10menu "Ux500 SoC" 11menu "Ux500 SoC"
11 12
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index cc7e2d8be9aa..f8037ba338ac 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -496,6 +496,13 @@ static void __init free_unused_memmap(struct meminfo *mi)
496 */ 496 */
497 bank_start = min(bank_start, 497 bank_start = min(bank_start,
498 ALIGN(prev_bank_end, PAGES_PER_SECTION)); 498 ALIGN(prev_bank_end, PAGES_PER_SECTION));
499#else
500 /*
501 * Align down here since the VM subsystem insists that the
502 * memmap entries are valid from the bank start aligned to
503 * MAX_ORDER_NR_PAGES.
504 */
505 bank_start = round_down(bank_start, MAX_ORDER_NR_PAGES);
499#endif 506#endif
500 /* 507 /*
501 * If we had a previous bank, and there is a space 508 * If we had a previous bank, and there is a space
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c
index f88216d23991..c65eb791d1bb 100644
--- a/arch/arm/plat-s5p/irq-gpioint.c
+++ b/arch/arm/plat-s5p/irq-gpioint.c
@@ -163,9 +163,9 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
163 ct->chip.irq_mask = irq_gc_mask_set_bit; 163 ct->chip.irq_mask = irq_gc_mask_set_bit;
164 ct->chip.irq_unmask = irq_gc_mask_clr_bit; 164 ct->chip.irq_unmask = irq_gc_mask_clr_bit;
165 ct->chip.irq_set_type = s5p_gpioint_set_type, 165 ct->chip.irq_set_type = s5p_gpioint_set_type,
166 ct->regs.ack = PEND_OFFSET + REG_OFFSET(chip->group); 166 ct->regs.ack = PEND_OFFSET + REG_OFFSET(group - bank->start);
167 ct->regs.mask = MASK_OFFSET + REG_OFFSET(chip->group); 167 ct->regs.mask = MASK_OFFSET + REG_OFFSET(group - bank->start);
168 ct->regs.type = CON_OFFSET + REG_OFFSET(chip->group); 168 ct->regs.type = CON_OFFSET + REG_OFFSET(group - bank->start);
169 irq_setup_generic_chip(gc, IRQ_MSK(chip->chip.ngpio), 169 irq_setup_generic_chip(gc, IRQ_MSK(chip->chip.ngpio),
170 IRQ_GC_INIT_MASK_CACHE, 170 IRQ_GC_INIT_MASK_CACHE,
171 IRQ_NOREQUEST | IRQ_NOPROBE, 0); 171 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-31 17:51:30 -0400