170 files changed, 1024 insertions, 968 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 93d595a7477a..7c0effb69fc7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -28,6 +28,7 @@ config ARM
        select HAVE_C_RECORDMCOUNT
        select HAVE_GENERIC_HARDIRQS
        select HAVE_SPARSE_IRQ
+        select GENERIC_IRQ_SHOW
        help
          The ARM series is a line of low-power-consumption RISC chip designs
          licensed by ARM Ltd and targeted at embedded applications and
@@ -2009,6 +2010,7 @@ menu "Power management options"
 source "kernel/power/Kconfig"
 config ARCH_SUSPEND_POSSIBLE
+        depends on !ARCH_S5P64X0 && !ARCH_S5P6442
        def_bool y
 endmenu
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index cb6b041c39d2..f70ec7dadebb 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -213,8 +213,8 @@ static int gic_set_wake(struct irq_data *d, unsigned int on)
 static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
 {
-        struct gic_chip_data *chip_data = get_irq_data(irq);
+        struct gic_chip_data *chip_data = irq_get_handler_data(irq);
-        struct irq_chip *chip = get_irq_chip(irq);
+        struct irq_chip *chip = irq_get_chip(irq);
        unsigned int cascade_irq, gic_irq;
        unsigned long status;
@@ -257,9 +257,9 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
 {
        if (gic_nr >= MAX_GIC_NR)
                BUG();
-        if (set_irq_data(irq, &gic_data[gic_nr]) != 0)
+        if (irq_set_handler_data(irq, &gic_data[gic_nr]) != 0)
                BUG();
-        set_irq_chained_handler(irq, gic_handle_cascade_irq);
+        irq_set_chained_handler(irq, gic_handle_cascade_irq);
 }
 static void __init gic_dist_init(struct gic_chip_data *gic,
@@ -319,9 +319,8 @@ static void __init gic_dist_init(struct gic_chip_data *gic,
         * Setup the Linux IRQ subsystem.
         */
        for (i = irq_start; i < irq_limit; i++) {
-                set_irq_chip(i, &gic_chip);
+                irq_set_chip_and_handler(i, &gic_chip, handle_level_irq);
-                set_irq_chip_data(i, gic);
+                irq_set_chip_data(i, gic);
-                set_irq_handler(i, handle_level_irq);
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
        }
@@ -382,7 +381,7 @@ void __cpuinit gic_enable_ppi(unsigned int irq)
        unsigned long flags;
        local_irq_save(flags);
-        irq_to_desc(irq)->status |= IRQ_NOPROBE;
+        irq_set_status_flags(irq, IRQ_NOPROBE);
        gic_unmask_irq(irq_get_irq_data(irq));
        local_irq_restore(flags);
 }
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index fcddd48fe9da..7a21927c52e1 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -88,8 +88,8 @@ void it8152_init_irq(void)
        __raw_writel((0), IT8152_INTC_LDCNIRR);
        for (irq = IT8152_IRQ(0); irq <= IT8152_LAST_IRQ; irq++) {
-                set_irq_chip(irq, &it8152_irq_chip);
+                irq_set_chip_and_handler(irq, &it8152_irq_chip,
-                set_irq_handler(irq, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
 }
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index a026a6bf4892..b55c3625d7ee 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -140,7 +140,7 @@ static struct locomo_dev_info locomo_devices[] = {
 static void locomo_handler(unsigned int irq, struct irq_desc *desc)
 {
-        struct locomo *lchip = get_irq_chip_data(irq);
+        struct locomo *lchip = irq_get_chip_data(irq);
        int req, i;
        /* Acknowledge the parent IRQ */
@@ -197,15 +197,14 @@ static void locomo_setup_irq(struct locomo *lchip)
        /*
         * Install handler for IRQ_LOCOMO_HW.
         */
-        set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING);
+        irq_set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING);
-        set_irq_chip_data(lchip->irq, lchip);
+        irq_set_chip_data(lchip->irq, lchip);
-        set_irq_chained_handler(lchip->irq, locomo_handler);
+        irq_set_chained_handler(lchip->irq, locomo_handler);
        /* Install handlers for IRQ_LOCOMO_* */
        for ( ; irq <= lchip->irq_base + 3; irq++) {
-                set_irq_chip(irq, &locomo_chip);
+                irq_set_chip_and_handler(irq, &locomo_chip, handle_level_irq);
-                set_irq_chip_data(irq, lchip);
+                irq_set_chip_data(irq, lchip);
-                set_irq_handler(irq, handle_level_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
 }
@@ -476,8 +475,8 @@ static void __locomo_remove(struct locomo *lchip)
        device_for_each_child(lchip->dev, NULL, locomo_remove_child);
        if (lchip->irq != NO_IRQ) {
-                set_irq_chained_handler(lchip->irq, NULL);
+                irq_set_chained_handler(lchip->irq, NULL);
-                set_irq_data(lchip->irq, NULL);
+                irq_set_handler_data(lchip->irq, NULL);
        }
        iounmap(lchip->base);
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index eb9796b0dab2..a12b33c0dc42 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -202,7 +202,7 @@ static void
 sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
        unsigned int stat0, stat1, i;
-        struct sa1111 *sachip = get_irq_data(irq);
+        struct sa1111 *sachip = irq_get_handler_data(irq);
        void __iomem *mapbase = sachip->base + SA1111_INTC;
        stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0);
@@ -472,25 +472,25 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
        sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1);
        for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
-                set_irq_chip(irq, &sa1111_low_chip);
+                irq_set_chip_and_handler(irq, &sa1111_low_chip,
-                set_irq_chip_data(irq, sachip);
+                                         handle_edge_irq);
-                set_irq_handler(irq, handle_edge_irq);
+                irq_set_chip_data(irq, sachip);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
        for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
-                set_irq_chip(irq, &sa1111_high_chip);
+                irq_set_chip_and_handler(irq, &sa1111_high_chip,
-                set_irq_chip_data(irq, sachip);
+                                         handle_edge_irq);
-                set_irq_handler(irq, handle_edge_irq);
+                irq_set_chip_data(irq, sachip);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
        /*
         * Register SA1111 interrupt
         */
-        set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
+        irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
-        set_irq_data(sachip->irq, sachip);
+        irq_set_handler_data(sachip->irq, sachip);
-        set_irq_chained_handler(sachip->irq, sa1111_irq_handler);
+        irq_set_chained_handler(sachip->irq, sa1111_irq_handler);
 }
 /*
@@ -815,8 +815,8 @@ static void __sa1111_remove(struct sa1111 *sachip)
        clk_disable(sachip->clk);
        if (sachip->irq != NO_IRQ) {
-                set_irq_chained_handler(sachip->irq, NULL);
+                irq_set_chained_handler(sachip->irq, NULL);
-                set_irq_data(sachip->irq, NULL);
+                irq_set_handler_data(sachip->irq, NULL);
                release_mem_region(sachip->phys + SA1111_INTC, 512);
        }
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index ae5fe7292e0d..113085a77123 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -305,9 +305,9 @@ static void __init vic_set_irq_sources(void __iomem *base,
                if (vic_sources & (1 << i)) {
                        unsigned int irq = irq_start + i;
-                        set_irq_chip(irq, &vic_chip);
+                        irq_set_chip_and_handler(irq, &vic_chip,
-                        set_irq_chip_data(irq, base);
+                                                 handle_level_irq);
-                        set_irq_handler(irq, handle_level_irq);
+                        irq_set_chip_data(irq, base);
                        set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
                }
        }
diff --git a/arch/arm/include/asm/hw_irq.h b/arch/arm/include/asm/hw_irq.h
index 5586b7c8ef6f..a71b417b1856 100644
--- a/arch/arm/include/asm/hw_irq.h
+++ b/arch/arm/include/asm/hw_irq.h
@@ -10,14 +10,6 @@ static inline void ack_bad_irq(int irq)
        irq_err_count++;
 }
-/*
- * Obsolete inline function for calling irq descriptor handlers.
- */
-static inline void desc_handle_irq(unsigned int irq, struct irq_desc *desc)
-{
-        desc->handle_irq(irq, desc);
-}
 void set_irq_flags(unsigned int irq, unsigned int flags);
 #define IRQF_VALID      (1 << 0)
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index d86fcd44b220..e4ee050aad7d 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -159,31 +159,6 @@ static void __devinit pci_fixup_dec21285(struct pci_dev *dev)
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285, pci_fixup_dec21285);
 /*
- * Same as above. The PrPMC800 carrier board for the PrPMC1100 
- * card maps the host-bridge @ 00:01:00 for some reason and it
- * ends up getting scanned. Note that we only want to do this
- * fixup when we find the IXP4xx on a PrPMC system, which is why
- * we check the machine type. We could be running on a board
- * with an IXP4xx target device and we don't want to kill the
- * resources in that case.
- */
-static void __devinit pci_fixup_prpmc1100(struct pci_dev *dev)
-{
-        int i;
-        if (machine_is_prpmc1100()) {
-                dev->class &= 0xff;
-                dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
-                for (i = 0; i < PCI_NUM_RESOURCES; i++) {
-                        dev->resource[i].start = 0;
-                        dev->resource[i].end   = 0;
-                        dev->resource[i].flags = 0;
-                }
-        }
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IXP4XX, pci_fixup_prpmc1100);
-/*
 * PCI IDE controllers use non-standard I/O port decoding, respect it.
 */
 static void __devinit pci_fixup_ide_bases(struct pci_dev *dev)
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
index 2ad62df37730..d16500110ee9 100644
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/kernel/ecard.c
@@ -1043,8 +1043,8 @@ ecard_probe(int slot, card_type_t type)
         */
        if (slot < 8) {
                ec->irq = 32 + slot;
-                set_irq_chip(ec->irq, &ecard_chip);
+                irq_set_chip_and_handler(ec->irq, &ecard_chip,
-                set_irq_handler(ec->irq, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(ec->irq, IRQF_VALID);
        }
@@ -1103,7 +1103,7 @@ static int __init ecard_init(void)
        irqhw = ecard_probeirqhw();
-        set_irq_chained_handler(IRQ_EXPANSIONCARD,
+        irq_set_chained_handler(IRQ_EXPANSIONCARD,
                                irqhw ? ecard_irqexp_handler : ecard_irq_handler);
        ecard_proc_init();
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 3535d3793e65..83bbad03fcc6 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -51,63 +51,18 @@
 unsigned long irq_err_count;
-int show_interrupts(struct seq_file *p, void *v)
+int arch_show_interrupts(struct seq_file *p, int prec)
 {
-        int i = *(loff_t *) v, cpu;
-        struct irq_desc *desc;
-        struct irqaction * action;
-        unsigned long flags;
-        int prec, n;
-        for (prec = 3, n = 1000; prec < 10 && n <= nr_irqs; prec++)
-                n *= 10;
-#ifdef CONFIG_SMP
-        if (prec < 4)
-                prec = 4;
-#endif
-        if (i == 0) {
-                char cpuname[12];
-                seq_printf(p, "%*s ", prec, "");
-                for_each_present_cpu(cpu) {
-                        sprintf(cpuname, "CPU%d", cpu);
-                        seq_printf(p, " %10s", cpuname);
-                }
-                seq_putc(p, '\n');
-        }
-        if (i < nr_irqs) {
-                desc = irq_to_desc(i);
-                raw_spin_lock_irqsave(&desc->lock, flags);
-                action = desc->action;
-                if (!action)
-                        goto unlock;
-                seq_printf(p, "%*d: ", prec, i);
-                for_each_present_cpu(cpu)
-                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu));
-                seq_printf(p, " %10s", desc->irq_data.chip->name ? : "-");
-                seq_printf(p, "  %s", action->name);
-                for (action = action->next; action; action = action->next)
-                        seq_printf(p, ", %s", action->name);
-                seq_putc(p, '\n');
-unlock:
-                raw_spin_unlock_irqrestore(&desc->lock, flags);
-        } else if (i == nr_irqs) {
 #ifdef CONFIG_FIQ
-                show_fiq_list(p, prec);
+        show_fiq_list(p, prec);
 #endif
 #ifdef CONFIG_SMP
-                show_ipi_list(p, prec);
+        show_ipi_list(p, prec);
 #endif
 #ifdef CONFIG_LOCAL_TIMERS
-                show_local_irqs(p, prec);
+        show_local_irqs(p, prec);
 #endif
-                seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
+        seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
-        }
        return 0;
 }
@@ -144,24 +99,21 @@ asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
 void set_irq_flags(unsigned int irq, unsigned int iflags)
 {
-        struct irq_desc *desc;
+        unsigned long clr = 0, set = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
-        unsigned long flags;
        if (irq >= nr_irqs) {
                printk(KERN_ERR "Trying to set irq flags for IRQ%d\n", irq);
                return;
        }
-        desc = irq_to_desc(irq);
-        raw_spin_lock_irqsave(&desc->lock, flags);
-        desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
        if (iflags & IRQF_VALID)
-                desc->status &= ~IRQ_NOREQUEST;
+                clr |= IRQ_NOREQUEST;
        if (iflags & IRQF_PROBE)
-                desc->status &= ~IRQ_NOPROBE;
+                clr |= IRQ_NOPROBE;
        if (!(iflags & IRQF_NOAUTOEN))
-                desc->status &= ~IRQ_NOAUTOEN;
+                clr |= IRQ_NOAUTOEN;
-        raw_spin_unlock_irqrestore(&desc->lock, flags);
+        /* Order is clear bits in "clr" then set bits in "set" */
+        irq_modify_status(irq, clr, set & ~clr);
 }
 void __init init_IRQ(void)
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index d1f775e86353..9ffbf3a2dfea 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
                return;
        if (cpu_is_at91cap9_revB())
-                set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
+                irq_set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
        /* Enable VBus control for UHP ports */
        for (i = 0; i < data->ports; i++) {
@@ -157,7 +157,7 @@ static struct platform_device at91_usba_udc_device = {
 void __init at91_add_device_usba(struct usba_platform_data *data)
 {
        if (cpu_is_at91cap9_revB()) {
-                set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
+                irq_set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
                at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
                                                  AT91_MATRIX_UDPHS_BYPASS_LOCK);
        }
@@ -861,7 +861,7 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
                return;
        if (cpu_is_at91cap9_revB())
-                set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
+                irq_set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
        at91_set_A_periph(AT91_PIN_PC1, 0);     /* LCDHSYNC */
        at91_set_A_periph(AT91_PIN_PC2, 0);     /* LCDDOTCK */
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index af818a21587c..4615528205c8 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -287,7 +287,7 @@ static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
        else
                wakeups[bank] &= ~mask;
-        set_irq_wake(gpio_chip[bank].bank->id, state);
+        irq_set_irq_wake(gpio_chip[bank].bank->id, state);
        return 0;
 }
@@ -375,6 +375,7 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
 static struct irq_chip gpio_irqchip = {
        .name           = "GPIO",
+        .irq_disable    = gpio_irq_mask,
        .irq_mask       = gpio_irq_mask,
        .irq_unmask     = gpio_irq_unmask,
        .irq_set_type   = gpio_irq_type,
@@ -384,16 +385,14 @@ static struct irq_chip gpio_irqchip = {
 static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 {
        unsigned        pin;
-        struct irq_desc *gpio;
+        struct irq_data *idata = irq_desc_get_irq_data(desc);
-        struct at91_gpio_chip *at91_gpio;
+        struct irq_chip *chip = irq_data_get_irq_chip(idata);
-        void __iomem    *pio;
+        struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata);
+        void __iomem    *pio = at91_gpio->regbase;
        u32             isr;
-        at91_gpio = get_irq_chip_data(irq);
-        pio = at91_gpio->regbase;
        /* temporarily mask (level sensitive) parent IRQ */
-        desc->irq_data.chip->irq_ack(&desc->irq_data);
+        chip->irq_ack(idata);
        for (;;) {
                /* Reading ISR acks pending (edge triggered) GPIO interrupts.
                 * When there none are pending, we're finished unless we need
@@ -409,27 +408,15 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
                }
                pin = at91_gpio->chip.base;
-                gpio = &irq_desc[pin];
                while (isr) {
-                        if (isr & 1) {
+                        if (isr & 1)
-                                if (unlikely(gpio->depth)) {
+                                generic_handle_irq(pin);
-                                        /*
-                                         * The core ARM interrupt handler lazily disables IRQs so
-                                         * another IRQ must be generated before it actually gets
-                                         * here to be disabled on the GPIO controller.
-                                         */
-                                        gpio_irq_mask(irq_get_irq_data(pin));
-                                }
-                                else
-                                        generic_handle_irq(pin);
-                        }
                        pin++;
-                        gpio++;
                        isr >>= 1;
                }
        }
-        desc->irq_data.chip->irq_unmask(&desc->irq_data);
+        chip->irq_unmask(idata);
        /* now it may re-trigger */
 }
@@ -518,14 +505,14 @@ void __init at91_gpio_irq_setup(void)
                __raw_writel(~0, this->regbase + PIO_IDR);
                for (i = 0, pin = this->chip.base; i < 32; i++, pin++) {
-                        lockdep_set_class(&irq_desc[pin].lock, &gpio_lock_class);
+                        irq_set_lockdep_class(pin, &gpio_lock_class);
                        /*
                         * Can use the "simple" and not "edge" handler since it's
                         * shorter, and the AIC handles interrupts sanely.
                         */
-                        set_irq_chip(pin, &gpio_irqchip);
+                        irq_set_chip_and_handler(pin, &gpio_irqchip,
-                        set_irq_handler(pin, handle_simple_irq);
+                                                 handle_simple_irq);
                        set_irq_flags(pin, IRQF_VALID);
                }
@@ -536,8 +523,8 @@ void __init at91_gpio_irq_setup(void)
                if (prev && prev->next == this)
                        continue;
-                set_irq_chip_data(id, this);
+                irq_set_chip_data(id, this);
-                set_irq_chained_handler(id, gpio_irq_handler);
+                irq_set_chained_handler(id, gpio_irq_handler);
        }
        pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks);
 }
diff --git a/arch/arm/mach-at91/include/mach/at572d940hf.h b/arch/arm/mach-at91/include/mach/at572d940hf.h
index 2d9b0af9c4d5..be510cfc56be 100644
--- a/arch/arm/mach-at91/include/mach/at572d940hf.h
+++ b/arch/arm/mach-at91/include/mach/at572d940hf.h
@@ -89,7 +89,7 @@
 /*
 * System Peripherals (offset from AT91_BASE_SYS)
 */
-#define AT91_SDRAMC     (0xffffea00 - AT91_BASE_SYS)
+#define AT91_SDRAMC0    (0xffffea00 - AT91_BASE_SYS)
 #define AT91_SMC        (0xffffec00 - AT91_BASE_SYS)
 #define AT91_MATRIX     (0xffffee00 - AT91_BASE_SYS)
 #define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index b56d6b3a4087..9665265ec757 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -143,8 +143,7 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
                /* Active Low interrupt, with the specified priority */
                at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
-                set_irq_chip(i, &at91_aic_chip);
+                irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq);
-                set_irq_handler(i, handle_level_irq);
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
                /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
diff --git a/arch/arm/mach-bcmring/irq.c b/arch/arm/mach-bcmring/irq.c
index 84dcda0d1d9a..c48feaf4e8e9 100644
--- a/arch/arm/mach-bcmring/irq.c
+++ b/arch/arm/mach-bcmring/irq.c
@@ -93,11 +93,11 @@ static void vic_init(void __iomem *base, struct irq_chip *chip,
        unsigned int i;
        for (i = 0; i < 32; i++) {
                unsigned int irq = irq_start + i;
-                set_irq_chip(irq, chip);
+                irq_set_chip(irq, chip);
-                set_irq_chip_data(irq, base);
+                irq_set_chip_data(irq, base);
                if (vic_sources & (1 << i)) {
-                        set_irq_handler(irq, handle_level_irq);
+                        irq_set_handler(irq, handle_level_irq);
                        set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
                }
        }
@@ -119,9 +119,9 @@ void __init bcmring_init_irq(void)
        /* special cases */
        if (INTCHW_INTC1_GPIO0 & IRQ_INTC1_VALID_MASK) {
-                set_irq_handler(IRQ_GPIO0, handle_simple_irq);
+                irq_set_handler(IRQ_GPIO0, handle_simple_irq);
        }
        if (INTCHW_INTC1_GPIO1 & IRQ_INTC1_VALID_MASK) {
-                set_irq_handler(IRQ_GPIO1, handle_simple_irq);
+                irq_set_handler(IRQ_GPIO1, handle_simple_irq);
        }
 }
diff --git a/arch/arm/mach-clps711x/irq.c b/arch/arm/mach-clps711x/irq.c
index 86da7a1b2bbe..c2eceee645e3 100644
--- a/arch/arm/mach-clps711x/irq.c
+++ b/arch/arm/mach-clps711x/irq.c
@@ -112,13 +112,13 @@ void __init clps711x_init_irq(void)
        for (i = 0; i < NR_IRQS; i++) {
                if (INT1_IRQS & (1 << i)) {
-                        set_irq_handler(i, handle_level_irq);
+                        irq_set_chip_and_handler(i, &int1_chip,
-                        set_irq_chip(i, &int1_chip);
+                                                 handle_level_irq);
                        set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
                }
                if (INT2_IRQS & (1 << i)) {
-                        set_irq_handler(i, handle_level_irq);
+                        irq_set_chip_and_handler(i, &int2_chip,
-                        set_irq_chip(i, &int2_chip);
+                                                 handle_level_irq);
                        set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
                }                       
        }
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 9abc80a86a22..f83152d643c5 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -167,9 +167,9 @@ void __init cp_intc_init(void)
        /* Set up genirq dispatching for cp_intc */
        for (i = 0; i < num_irq; i++) {
-                set_irq_chip(i, &cp_intc_irq_chip);
+                irq_set_chip(i, &cp_intc_irq_chip);
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
-                set_irq_handler(i, handle_edge_irq);
+                irq_set_handler(i, handle_edge_irq);
        }
        /* Enable global interrupt */
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c
index 20d66e5e4663..a0b838894ac9 100644
--- a/arch/arm/mach-davinci/gpio.c
+++ b/arch/arm/mach-davinci/gpio.c
@@ -62,7 +62,7 @@ static inline struct davinci_gpio_regs __iomem *irq2regs(int irq)
 {
        struct davinci_gpio_regs __iomem *g;
-        g = (__force struct davinci_gpio_regs __iomem *)get_irq_chip_data(irq);
+        g = (__force struct davinci_gpio_regs __iomem *)irq_get_chip_data(irq);
        return g;
 }
@@ -208,7 +208,7 @@ pure_initcall(davinci_gpio_setup);
 static void gpio_irq_disable(struct irq_data *d)
 {
        struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
-        u32 mask = (u32) irq_data_get_irq_data(d);
+        u32 mask = (u32) irq_data_get_irq_handler_data(d);
        __raw_writel(mask, &g->clr_falling);
        __raw_writel(mask, &g->clr_rising);
@@ -217,8 +217,8 @@ static void gpio_irq_disable(struct irq_data *d)
 static void gpio_irq_enable(struct irq_data *d)
 {
        struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
-        u32 mask = (u32) irq_data_get_irq_data(d);
+        u32 mask = (u32) irq_data_get_irq_handler_data(d);
-        unsigned status = irq_desc[d->irq].status;
+        unsigned status = irqd_get_trigger_type(d);
        status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING;
        if (!status)
@@ -233,21 +233,11 @@ static void gpio_irq_enable(struct irq_data *d)
 static int gpio_irq_type(struct irq_data *d, unsigned trigger)
 {
        struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
-        u32 mask = (u32) irq_data_get_irq_data(d);
+        u32 mask = (u32) irq_data_get_irq_handler_data(d);
        if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
                return -EINVAL;
-        irq_desc[d->irq].status &= ~IRQ_TYPE_SENSE_MASK;
-        irq_desc[d->irq].status |= trigger;
-        /* don't enable the IRQ if it's currently disabled */
-        if (irq_desc[d->irq].depth == 0) {
-                __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING)
-                             ? &g->set_falling : &g->clr_falling);
-                __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING)
-                             ? &g->set_rising : &g->clr_rising);
-        }
        return 0;
 }
@@ -256,6 +246,7 @@ static struct irq_chip gpio_irqchip = {
        .irq_enable     = gpio_irq_enable,
        .irq_disable    = gpio_irq_disable,
        .irq_set_type   = gpio_irq_type,
+        .flags          = IRQCHIP_SET_TYPE_MASKED,
 };
 static void
@@ -285,7 +276,7 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc)
                        status >>= 16;
                /* now demux them to the right lowlevel handler */
-                n = (int)get_irq_data(irq);
+                n = (int)irq_get_handler_data(irq);
                while (status) {
                        res = ffs(status);
                        n += res;
@@ -323,7 +314,7 @@ static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset)
 static int gpio_irq_type_unbanked(struct irq_data *d, unsigned trigger)
 {
        struct davinci_gpio_regs __iomem *g = irq2regs(d->irq);
-        u32 mask = (u32) irq_data_get_irq_data(d);
+        u32 mask = (u32) irq_data_get_irq_handler_data(d);
        if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
                return -EINVAL;
@@ -395,7 +386,7 @@ static int __init davinci_gpio_irq_setup(void)
                /* AINTC handles mask/unmask; GPIO handles triggering */
                irq = bank_irq;
-                gpio_irqchip_unbanked = *get_irq_desc_chip(irq_to_desc(irq));
+                gpio_irqchip_unbanked = *irq_get_chip(irq);
                gpio_irqchip_unbanked.name = "GPIO-AINTC";
                gpio_irqchip_unbanked.irq_set_type = gpio_irq_type_unbanked;
@@ -406,10 +397,10 @@ static int __init davinci_gpio_irq_setup(void)
                /* set the direct IRQs up to use that irqchip */
                for (gpio = 0; gpio < soc_info->gpio_unbanked; gpio++, irq++) {
-                        set_irq_chip(irq, &gpio_irqchip_unbanked);
+                        irq_set_chip(irq, &gpio_irqchip_unbanked);
-                        set_irq_data(irq, (void *) __gpio_mask(gpio));
+                        irq_set_handler_data(irq, (void *)__gpio_mask(gpio));
-                        set_irq_chip_data(irq, (__force void *) g);
+                        irq_set_chip_data(irq, (__force void *)g);
-                        irq_desc[irq].status |= IRQ_TYPE_EDGE_BOTH;
+                        irq_set_status_flags(irq, IRQ_TYPE_EDGE_BOTH);
                }
                goto done;
@@ -430,15 +421,15 @@ static int __init davinci_gpio_irq_setup(void)
                __raw_writel(~0, &g->clr_rising);
                /* set up all irqs in this bank */
-                set_irq_chained_handler(bank_irq, gpio_irq_handler);
+                irq_set_chained_handler(bank_irq, gpio_irq_handler);
-                set_irq_chip_data(bank_irq, (__force void *) g);
+                irq_set_chip_data(bank_irq, (__force void *)g);
-                set_irq_data(bank_irq, (void *) irq);
+                irq_set_handler_data(bank_irq, (void *)irq);
                for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) {
-                        set_irq_chip(irq, &gpio_irqchip);
+                        irq_set_chip(irq, &gpio_irqchip);
-                        set_irq_chip_data(irq, (__force void *) g);
+                        irq_set_chip_data(irq, (__force void *)g);
-                        set_irq_data(irq, (void *) __gpio_mask(gpio));
+                        irq_set_handler_data(irq, (void *)__gpio_mask(gpio));
-                        set_irq_handler(irq, handle_simple_irq);
+                        irq_set_handler(irq, handle_simple_irq);
                        set_irq_flags(irq, IRQF_VALID);
                }
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 5e05c9b64e1f..e6269a6e0014 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -154,11 +154,11 @@ void __init davinci_irq_init(void)
        /* set up genirq dispatch for ARM INTC */
        for (i = 0; i < davinci_soc_info.intc_irq_num; i++) {
-                set_irq_chip(i, &davinci_irq_chip_0);
+                irq_set_chip(i, &davinci_irq_chip_0);
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
                if (i != IRQ_TINT1_TINT34)
-                        set_irq_handler(i, handle_edge_irq);
+                        irq_set_handler(i, handle_edge_irq);
                else
-                        set_irq_handler(i, handle_level_irq);
+                        irq_set_handler(i, handle_level_irq);
        }
 }
diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h
index e5fcdd3f5bf5..b20ec9af7882 100644
--- a/arch/arm/mach-dove/include/mach/dove.h
+++ b/arch/arm/mach-dove/include/mach/dove.h
@@ -136,7 +136,7 @@
 #define DOVE_MPP_GENERAL_VIRT_BASE      (DOVE_SB_REGS_VIRT_BASE | 0xe803c)
 #define  DOVE_AU1_SPDIFO_GPIO_EN        (1 << 1)
 #define  DOVE_NAND_GPIO_EN              (1 << 0)
-#define DOVE_MPP_CTRL4_VIRT_BASE        (DOVE_GPIO_VIRT_BASE + 0x40)
+#define DOVE_MPP_CTRL4_VIRT_BASE        (DOVE_GPIO_LO_VIRT_BASE + 0x40)
 #define  DOVE_SPI_GPIO_SEL              (1 << 5)
 #define  DOVE_UART1_GPIO_SEL            (1 << 4)
 #define  DOVE_AU1_GPIO_SEL              (1 << 3)
diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
index 101707fa2e2c..f07fd16e0c9b 100644
--- a/arch/arm/mach-dove/irq.c
+++ b/arch/arm/mach-dove/irq.c
@@ -86,8 +86,7 @@ static void pmu_irq_handler(unsigned int irq, struct irq_desc *desc)
                if (!(cause & (1 << irq)))
                        continue;
                irq = pmu_to_irq(irq);
-                desc = irq_desc + irq;
+                generic_handle_irq(irq);
-                desc_handle_irq(irq, desc);
        }
 }
@@ -103,14 +102,14 @@ void __init dove_init_irq(void)
         */
        orion_gpio_init(0, 32, DOVE_GPIO_LO_VIRT_BASE, 0,
                        IRQ_DOVE_GPIO_START);
-        set_irq_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler);
-        set_irq_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler);
-        set_irq_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler);
-        set_irq_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler);
        orion_gpio_init(32, 32, DOVE_GPIO_HI_VIRT_BASE, 0,
                        IRQ_DOVE_GPIO_START + 32);
-        set_irq_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler);
        orion_gpio_init(64, 8, DOVE_GPIO2_VIRT_BASE, 0,
                        IRQ_DOVE_GPIO_START + 64);
@@ -122,10 +121,9 @@ void __init dove_init_irq(void)
        writel(0, PMU_INTERRUPT_CAUSE);
        for (i = IRQ_DOVE_PMU_START; i < NR_IRQS; i++) {
-                set_irq_chip(i, &pmu_irq_chip);
+                irq_set_chip_and_handler(i, &pmu_irq_chip, handle_level_irq);
-                set_irq_handler(i, handle_level_irq);
+                irq_set_status_flags(i, IRQ_LEVEL);
-                irq_desc[i].status |= IRQ_LEVEL;
                set_irq_flags(i, IRQF_VALID);
        }
-        set_irq_chained_handler(IRQ_DOVE_PMU, pmu_irq_handler);
+        irq_set_chained_handler(IRQ_DOVE_PMU, pmu_irq_handler);
 }
diff --git a/arch/arm/mach-dove/mpp.c b/arch/arm/mach-dove/mpp.c
index 71db2bdf2f28..c66c76346904 100644
--- a/arch/arm/mach-dove/mpp.c
+++ b/arch/arm/mach-dove/mpp.c
@@ -147,9 +147,6 @@ void __init dove_mpp_conf(unsigned int *mpp_list)
        u32 pmu_sig_ctrl[PMU_SIG_REGS];
        int i;
-        /* Initialize gpiolib. */
-        orion_gpio_init();
        for (i = 0; i < MPP_NR_REGS; i++)
                mpp_ctrl[i] = readl(MPP_CTRL(i));
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 7df083f37fa7..087bc771ac23 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -66,8 +66,8 @@ static void __init ebsa110_init_irq(void)
        local_irq_restore(flags);
        for (irq = 0; irq < NR_IRQS; irq++) {
-                set_irq_chip(irq, &ebsa110_irq_chip);
+                irq_set_chip_and_handler(irq, &ebsa110_irq_chip,
-                set_irq_handler(irq, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
 }
diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c
index 34e071d79761..180b8a9d0d21 100644
--- a/arch/arm/mach-ep93xx/gpio.c
+++ b/arch/arm/mach-ep93xx/gpio.c
@@ -117,7 +117,7 @@ static void ep93xx_gpio_irq_ack(struct irq_data *d)
        int port = line >> 3;
        int port_mask = 1 << (line & 7);
-        if ((irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
+        if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) {
                gpio_int_type2[port] ^= port_mask; /* switch edge direction */
                ep93xx_gpio_update_int_params(port);
        }
@@ -131,7 +131,7 @@ static void ep93xx_gpio_irq_mask_ack(struct irq_data *d)
        int port = line >> 3;
        int port_mask = 1 << (line & 7);
-        if ((irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
+        if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH)
                gpio_int_type2[port] ^= port_mask; /* switch edge direction */
        gpio_int_unmasked[port] &= ~port_mask;
@@ -165,10 +165,10 @@ static void ep93xx_gpio_irq_unmask(struct irq_data *d)
 */
 static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type)
 {
-        struct irq_desc *desc = irq_desc + d->irq;
        const int gpio = irq_to_gpio(d->irq);
        const int port = gpio >> 3;
        const int port_mask = 1 << (gpio & 7);
+        irq_flow_handler_t handler;
        gpio_direction_input(gpio);
@@ -176,22 +176,22 @@ static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type)
        case IRQ_TYPE_EDGE_RISING:
                gpio_int_type1[port] |= port_mask;
                gpio_int_type2[port] |= port_mask;
-                desc->handle_irq = handle_edge_irq;
+                handler = handle_edge_irq;
                break;
        case IRQ_TYPE_EDGE_FALLING:
                gpio_int_type1[port] |= port_mask;
                gpio_int_type2[port] &= ~port_mask;
-                desc->handle_irq = handle_edge_irq;
+                handler = handle_edge_irq;
                break;
        case IRQ_TYPE_LEVEL_HIGH:
                gpio_int_type1[port] &= ~port_mask;
                gpio_int_type2[port] |= port_mask;
-                desc->handle_irq = handle_level_irq;
+                handler = handle_level_irq;
                break;
        case IRQ_TYPE_LEVEL_LOW:
                gpio_int_type1[port] &= ~port_mask;
                gpio_int_type2[port] &= ~port_mask;
-                desc->handle_irq = handle_level_irq;
+                handler = handle_level_irq;
                break;
        case IRQ_TYPE_EDGE_BOTH:
                gpio_int_type1[port] |= port_mask;
@@ -200,17 +200,16 @@ static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type)
                        gpio_int_type2[port] &= ~port_mask; /* falling */
                else
                        gpio_int_type2[port] |= port_mask; /* rising */
-                desc->handle_irq = handle_edge_irq;
+                handler = handle_edge_irq;
                break;
        default:
                pr_err("failed to set irq type %d for gpio %d\n", type, gpio);
                return -EINVAL;
        }
-        gpio_int_enabled[port] |= port_mask;
+        __irq_set_handler_locked(d->irq, handler);
-        desc->status &= ~IRQ_TYPE_SENSE_MASK;
+        gpio_int_enabled[port] |= port_mask;
-        desc->status |= type & IRQ_TYPE_SENSE_MASK;
        ep93xx_gpio_update_int_params(port);
@@ -232,20 +231,29 @@ void __init ep93xx_gpio_init_irq(void)
        for (gpio_irq = gpio_to_irq(0);
             gpio_irq <= gpio_to_irq(EP93XX_GPIO_LINE_MAX_IRQ); ++gpio_irq) {
-                set_irq_chip(gpio_irq, &ep93xx_gpio_irq_chip);
+                irq_set_chip_and_handler(gpio_irq, &ep93xx_gpio_irq_chip,
-                set_irq_handler(gpio_irq, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(gpio_irq, IRQF_VALID);
        }
-        set_irq_chained_handler(IRQ_EP93XX_GPIO_AB, ep93xx_gpio_ab_irq_handler);
+        irq_set_chained_handler(IRQ_EP93XX_GPIO_AB,
-        set_irq_chained_handler(IRQ_EP93XX_GPIO0MUX, ep93xx_gpio_f_irq_handler);
+                                ep93xx_gpio_ab_irq_handler);
-        set_irq_chained_handler(IRQ_EP93XX_GPIO1MUX, ep93xx_gpio_f_irq_handler);
+        irq_set_chained_handler(IRQ_EP93XX_GPIO0MUX,
-        set_irq_chained_handler(IRQ_EP93XX_GPIO2MUX, ep93xx_gpio_f_irq_handler);
+                                ep93xx_gpio_f_irq_handler);
-        set_irq_chained_handler(IRQ_EP93XX_GPIO3MUX, ep93xx_gpio_f_irq_handler);
+        irq_set_chained_handler(IRQ_EP93XX_GPIO1MUX,
-        set_irq_chained_handler(IRQ_EP93XX_GPIO4MUX, ep93xx_gpio_f_irq_handler);
+                                ep93xx_gpio_f_irq_handler);
-        set_irq_chained_handler(IRQ_EP93XX_GPIO5MUX, ep93xx_gpio_f_irq_handler);
+        irq_set_chained_handler(IRQ_EP93XX_GPIO2MUX,
-        set_irq_chained_handler(IRQ_EP93XX_GPIO6MUX, ep93xx_gpio_f_irq_handler);
+                                ep93xx_gpio_f_irq_handler);
-        set_irq_chained_handler(IRQ_EP93XX_GPIO7MUX, ep93xx_gpio_f_irq_handler);
+        irq_set_chained_handler(IRQ_EP93XX_GPIO3MUX,
+                                ep93xx_gpio_f_irq_handler);
+        irq_set_chained_handler(IRQ_EP93XX_GPIO4MUX,
+                                ep93xx_gpio_f_irq_handler);
+        irq_set_chained_handler(IRQ_EP93XX_GPIO5MUX,
+                                ep93xx_gpio_f_irq_handler);
+        irq_set_chained_handler(IRQ_EP93XX_GPIO6MUX,
+                                ep93xx_gpio_f_irq_handler);
+        irq_set_chained_handler(IRQ_EP93XX_GPIO7MUX,
+                                ep93xx_gpio_f_irq_handler);
 }
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index a021b5240bba..e849f67be47d 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -20,6 +20,11 @@ config EXYNOS4_MCT
        help
          Use MCT (Multi Core Timer) as kernel timers
+config EXYNOS4_DEV_AHCI
+        bool
+        help
+          Compile in platform device definitions for AHCI
 config EXYNOS4_DEV_PD
        bool
        help
@@ -134,9 +139,9 @@ config MACH_ARMLEX4210
        select S3C_DEV_HSMMC
        select S3C_DEV_HSMMC2
        select S3C_DEV_HSMMC3
+        select EXYNOS4_DEV_AHCI
        select EXYNOS4_DEV_SYSMMU
        select EXYNOS4_SETUP_SDHCI
-        select SATA_AHCI_PLATFORM
        help
          Machine support for Samsung ARMLEX4210 based on EXYNOS4210
diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile
index b8f0e7d82d7e..9be104f63c0b 100644
--- a/arch/arm/mach-exynos4/Makefile
+++ b/arch/arm/mach-exynos4/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_MACH_NURI)			+= mach-nuri.o
 # device support
 obj-y                                   += dev-audio.o
+obj-$(CONFIG_EXYNOS4_DEV_AHCI)          += dev-ahci.o
 obj-$(CONFIG_EXYNOS4_DEV_PD)            += dev-pd.o
 obj-$(CONFIG_EXYNOS4_DEV_SYSMMU)        += dev-sysmmu.o
@@ -53,4 +54,3 @@ obj-$(CONFIG_EXYNOS4_SETUP_I2C7)	+= setup-i2c7.o
 obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD)      += setup-keypad.o
 obj-$(CONFIG_EXYNOS4_SETUP_SDHCI)       += setup-sdhci.o
 obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO)  += setup-sdhci-gpio.o
-obj-$(CONFIG_SATA_AHCI_PLATFORM)        += dev-ahci.o
diff --git a/arch/arm/mach-exynos4/include/mach/debug-macro.S b/arch/arm/mach-exynos4/include/mach/debug-macro.S
index 58bbd049a6c4..a442ef861167 100644
--- a/arch/arm/mach-exynos4/include/mach/debug-macro.S
+++ b/arch/arm/mach-exynos4/include/mach/debug-macro.S
@@ -21,8 +21,8 @@
         */
        .macro addruart, rp, rv
-                ldreq   \rp, = S3C_PA_UART
+                ldr     \rp, = S3C_PA_UART
-                ldrne   \rv, = S3C_VA_UART
+                ldr     \rv, = S3C_VA_UART
 #if CONFIG_DEBUG_S3C_UART != 0
                add     \rp, \rp, #(0x10000 * CONFIG_DEBUG_S3C_UART)
                add     \rv, \rv, #(0x10000 * CONFIG_DEBUG_S3C_UART)
diff --git a/arch/arm/mach-exynos4/irq-combiner.c b/arch/arm/mach-exynos4/irq-combiner.c
index 31618d91ce15..f488b66d6806 100644
--- a/arch/arm/mach-exynos4/irq-combiner.c
+++ b/arch/arm/mach-exynos4/irq-combiner.c
@@ -54,8 +54,8 @@ static void combiner_unmask_irq(struct irq_data *data)
 static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
 {
-        struct combiner_chip_data *chip_data = get_irq_data(irq);
+        struct combiner_chip_data *chip_data = irq_get_handler_data(irq);
-        struct irq_chip *chip = get_irq_chip(irq);
+        struct irq_chip *chip = irq_get_chip(irq);
        unsigned int cascade_irq, combiner_irq;
        unsigned long status;
@@ -93,9 +93,9 @@ void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
 {
        if (combiner_nr >= MAX_COMBINER_NR)
                BUG();
-        if (set_irq_data(irq, &combiner_data[combiner_nr]) != 0)
+        if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0)
                BUG();
-        set_irq_chained_handler(irq, combiner_handle_cascade_irq);
+        irq_set_chained_handler(irq, combiner_handle_cascade_irq);
 }
 void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
@@ -119,9 +119,8 @@ void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
        for (i = irq_start; i < combiner_data[combiner_nr].irq_offset
                                + MAX_IRQ_IN_COMBINER; i++) {
-                set_irq_chip(i, &combiner_chip);
+                irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq);
-                set_irq_chip_data(i, &combiner_data[combiner_nr]);
+                irq_set_chip_data(i, &combiner_data[combiner_nr]);
-                set_irq_handler(i, handle_level_irq);
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
        }
 }
diff --git a/arch/arm/mach-exynos4/irq-eint.c b/arch/arm/mach-exynos4/irq-eint.c
index 4f7ad4a796e4..9d87d2ac7f68 100644
--- a/arch/arm/mach-exynos4/irq-eint.c
+++ b/arch/arm/mach-exynos4/irq-eint.c
@@ -190,8 +190,8 @@ static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
 static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
 {
-        u32 *irq_data = get_irq_data(irq);
+        u32 *irq_data = irq_get_handler_data(irq);
-        struct irq_chip *chip = get_irq_chip(irq);
+        struct irq_chip *chip = irq_get_chip(irq);
        chip->irq_mask(&desc->irq_data);
@@ -208,18 +208,19 @@ int __init exynos4_init_irq_eint(void)
        int irq;
        for (irq = 0 ; irq <= 31 ; irq++) {
-                set_irq_chip(IRQ_EINT(irq), &exynos4_irq_eint);
+                irq_set_chip_and_handler(IRQ_EINT(irq), &exynos4_irq_eint,
-                set_irq_handler(IRQ_EINT(irq), handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
        }
-        set_irq_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31);
+        irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31);
        for (irq = 0 ; irq <= 15 ; irq++) {
                eint0_15_data[irq] = IRQ_EINT(irq);
-                set_irq_data(exynos4_get_irq_nr(irq), &eint0_15_data[irq]);
+                irq_set_handler_data(exynos4_get_irq_nr(irq),
-                set_irq_chained_handler(exynos4_get_irq_nr(irq),
+                                     &eint0_15_data[irq]);
+                irq_set_chained_handler(exynos4_get_irq_nr(irq),
                                        exynos4_irq_eint0_15);
        }
diff --git a/arch/arm/mach-exynos4/mach-smdkc210.c b/arch/arm/mach-exynos4/mach-smdkc210.c
index 25a256818122..e645f7a955f0 100644
--- a/arch/arm/mach-exynos4/mach-smdkc210.c
+++ b/arch/arm/mach-exynos4/mach-smdkc210.c
@@ -125,7 +125,7 @@ static struct resource smdkc210_smsc911x_resources[] = {
 };
 static struct smsc911x_platform_config smsc9215_config = {
-        .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
+        .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
        .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
        .flags          = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
        .phy_interface  = PHY_INTERFACE_MODE_MII,
diff --git a/arch/arm/mach-exynos4/mach-smdkv310.c b/arch/arm/mach-exynos4/mach-smdkv310.c
index 88e0275143be..152676471b67 100644
--- a/arch/arm/mach-exynos4/mach-smdkv310.c
+++ b/arch/arm/mach-exynos4/mach-smdkv310.c
@@ -127,7 +127,7 @@ static struct resource smdkv310_smsc911x_resources[] = {
 };
 static struct smsc911x_platform_config smsc9215_config = {
-        .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
+        .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
        .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
        .flags          = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
        .phy_interface  = PHY_INTERFACE_MODE_MII,
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index 84c5f258f2d8..38a44f9b9da2 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -102,8 +102,7 @@ static void __init __fb_init_irq(void)
        *CSR_FIQ_DISABLE = -1;
        for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) {
-                set_irq_chip(irq, &fb_chip);
+                irq_set_chip_and_handler(irq, &fb_chip, handle_level_irq);
-                set_irq_handler(irq, handle_level_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
 }
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c
index a921fe92b858..5f1f9867fc70 100644
--- a/arch/arm/mach-footbridge/dc21285-timer.c
+++ b/arch/arm/mach-footbridge/dc21285-timer.c
@@ -30,7 +30,7 @@ static int cksrc_dc21285_enable(struct clocksource *cs)
        return 0;
 }
-static int cksrc_dc21285_disable(struct clocksource *cs)
+static void cksrc_dc21285_disable(struct clocksource *cs)
 {
        *CSR_TIMER2_CNTL = 0;
 }
diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c
index de7a5cb5dbe1..c3a0abbc9049 100644
--- a/arch/arm/mach-footbridge/isa-irq.c
+++ b/arch/arm/mach-footbridge/isa-irq.c
@@ -151,14 +151,14 @@ void __init isa_init_irq(unsigned int host_irq)
        if (host_irq != (unsigned int)-1) {
                for (irq = _ISA_IRQ(0); irq < _ISA_IRQ(8); irq++) {
-                        set_irq_chip(irq, &isa_lo_chip);
+                        irq_set_chip_and_handler(irq, &isa_lo_chip,
-                        set_irq_handler(irq, handle_level_irq);
+                                                 handle_level_irq);
                        set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
                }
                for (irq = _ISA_IRQ(8); irq < _ISA_IRQ(16); irq++) {
-                        set_irq_chip(irq, &isa_hi_chip);
+                        irq_set_chip_and_handler(irq, &isa_hi_chip,
-                        set_irq_handler(irq, handle_level_irq);
+                                                 handle_level_irq);
                        set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
                }
@@ -166,7 +166,7 @@ void __init isa_init_irq(unsigned int host_irq)
                request_resource(&ioport_resource, &pic2_resource);
                setup_irq(IRQ_ISA_CASCADE, &irq_cascade);
-                set_irq_chained_handler(host_irq, isa_irq_handler);
+                irq_set_chained_handler(host_irq, isa_irq_handler);
                /*
                 * On the NetWinder, don't automatically
diff --git a/arch/arm/mach-gemini/gpio.c b/arch/arm/mach-gemini/gpio.c
index fa3d333f21e1..fdc7ef1391d3 100644
--- a/arch/arm/mach-gemini/gpio.c
+++ b/arch/arm/mach-gemini/gpio.c
@@ -127,8 +127,8 @@ static int gpio_set_irq_type(struct irq_data *d, unsigned int type)
 static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
+        unsigned int port = (unsigned int)irq_desc_get_handler_data(desc);
        unsigned int gpio_irq_no, irq_stat;
-        unsigned int port = (unsigned int)get_irq_data(irq);
        irq_stat = __raw_readl(GPIO_BASE(port) + GPIO_INT_STAT);
@@ -138,9 +138,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
                if ((irq_stat & 1) == 0)
                        continue;
-                BUG_ON(!(irq_desc[gpio_irq_no].handle_irq));
+                generic_handle_irq(gpio_irq_no);
-                irq_desc[gpio_irq_no].handle_irq(gpio_irq_no,
-                                &irq_desc[gpio_irq_no]);
        }
 }
@@ -219,13 +217,13 @@ void __init gemini_gpio_init(void)
                for (j = GPIO_IRQ_BASE + i * 32;
                     j < GPIO_IRQ_BASE + (i + 1) * 32; j++) {
-                        set_irq_chip(j, &gpio_irq_chip);
+                        irq_set_chip_and_handler(j, &gpio_irq_chip,
-                        set_irq_handler(j, handle_edge_irq);
+                                                 handle_edge_irq);
                        set_irq_flags(j, IRQF_VALID);
                }
-                set_irq_chained_handler(IRQ_GPIO(i), gpio_irq_handler);
+                irq_set_chained_handler(IRQ_GPIO(i), gpio_irq_handler);
-                set_irq_data(IRQ_GPIO(i), (void *)i);
+                irq_set_handler_data(IRQ_GPIO(i), (void *)i);
        }
        BUG_ON(gpiochip_add(&gemini_gpio_chip));
diff --git a/arch/arm/mach-gemini/irq.c b/arch/arm/mach-gemini/irq.c
index 96bc227dd849..9485a8fdf851 100644
--- a/arch/arm/mach-gemini/irq.c
+++ b/arch/arm/mach-gemini/irq.c
@@ -81,13 +81,13 @@ void __init gemini_init_irq(void)
        request_resource(&iomem_resource, &irq_resource);
        for (i = 0; i < NR_IRQS; i++) {
-                set_irq_chip(i, &gemini_irq_chip);
+                irq_set_chip(i, &gemini_irq_chip);
                if((i >= IRQ_TIMER1 && i <= IRQ_TIMER3) || (i >= IRQ_SERIRQ0 && i <= IRQ_SERIRQ1)) {
-                        set_irq_handler(i, handle_edge_irq);
+                        irq_set_handler(i, handle_edge_irq);
                        mode |= 1 << i;
                        level |= 1 << i;
                } else {                        
-                        set_irq_handler(i, handle_level_irq);
+                        irq_set_handler(i, handle_level_irq);
                }
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
        }
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index 1f28c90932c7..51d4e44ab973 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -199,29 +199,29 @@ void __init h720x_init_irq (void)
        /* Initialize global IRQ's, fast path */
        for (irq = 0; irq < NR_GLBL_IRQS; irq++) {
-                set_irq_chip(irq, &h720x_global_chip);
+                irq_set_chip_and_handler(irq, &h720x_global_chip,
-                set_irq_handler(irq, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
        /* Initialize multiplexed IRQ's, slow path */
        for (irq = IRQ_CHAINED_GPIOA(0) ; irq <= IRQ_CHAINED_GPIOD(31); irq++) {
-                set_irq_chip(irq, &h720x_gpio_chip);
+                irq_set_chip_and_handler(irq, &h720x_gpio_chip,
-                set_irq_handler(irq, handle_edge_irq);
+                                         handle_edge_irq);
                set_irq_flags(irq, IRQF_VALID );
        }
-        set_irq_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler);
+        irq_set_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler);
-        set_irq_chained_handler(IRQ_GPIOB, h720x_gpiob_demux_handler);
+        irq_set_chained_handler(IRQ_GPIOB, h720x_gpiob_demux_handler);
-        set_irq_chained_handler(IRQ_GPIOC, h720x_gpioc_demux_handler);
+        irq_set_chained_handler(IRQ_GPIOC, h720x_gpioc_demux_handler);
-        set_irq_chained_handler(IRQ_GPIOD, h720x_gpiod_demux_handler);
+        irq_set_chained_handler(IRQ_GPIOD, h720x_gpiod_demux_handler);
 #ifdef CONFIG_CPU_H7202
        for (irq = IRQ_CHAINED_GPIOE(0) ; irq <= IRQ_CHAINED_GPIOE(31); irq++) {
-                set_irq_chip(irq, &h720x_gpio_chip);
+                irq_set_chip_and_handler(irq, &h720x_gpio_chip,
-                set_irq_handler(irq, handle_edge_irq);
+                                         handle_edge_irq);
                set_irq_flags(irq, IRQF_VALID );
        }
-        set_irq_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler);
+        irq_set_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler);
 #endif
        /* Enable multiplexed irq's */
diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c
index ac3f91442376..c37d570b852d 100644
--- a/arch/arm/mach-h720x/cpu-h7202.c
+++ b/arch/arm/mach-h720x/cpu-h7202.c
@@ -141,13 +141,18 @@ h7202_timer_interrupt(int irq, void *dev_id)
 /*
 * mask multiplexed timer IRQs
 */
-static void inline mask_timerx_irq(struct irq_data *d)
+static void inline __mask_timerx_irq(unsigned int irq)
 {
        unsigned int bit;
-        bit = 2 << ((d->irq == IRQ_TIMER64B) ? 4 : (d->irq - IRQ_TIMER1));
+        bit = 2 << ((irq == IRQ_TIMER64B) ? 4 : (irq - IRQ_TIMER1));
        CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) &= ~bit;
 }
+static void inline mask_timerx_irq(struct irq_data *d)
+{
+        __mask_timerx_irq(d->irq);
+}
 /*
 * unmask multiplexed timer IRQs
 */
@@ -196,12 +201,12 @@ void __init h7202_init_irq (void)
        for (irq = IRQ_TIMER1;
                          irq < IRQ_CHAINED_TIMERX(NR_TIMERX_IRQS); irq++) {
-                mask_timerx_irq(irq);
+                __mask_timerx_irq(irq);
-                set_irq_chip(irq, &h7202_timerx_chip);
+                irq_set_chip_and_handler(irq, &h7202_timerx_chip,
-                set_irq_handler(irq, handle_edge_irq);
+                                         handle_edge_irq);
                set_irq_flags(irq, IRQF_VALID );
        }
-        set_irq_chained_handler(IRQ_TIMERX, h7202_timerx_demux_handler);
+        irq_set_chained_handler(IRQ_TIMERX, h7202_timerx_demux_handler);
        h720x_init_irq();
 }
diff --git a/arch/arm/mach-iop13xx/irq.c b/arch/arm/mach-iop13xx/irq.c
index a233470dd10c..bc739701c301 100644
--- a/arch/arm/mach-iop13xx/irq.c
+++ b/arch/arm/mach-iop13xx/irq.c
@@ -224,15 +224,15 @@ void __init iop13xx_init_irq(void)
        for(i = 0; i <= IRQ_IOP13XX_HPI; i++) {
                if (i < 32)
-                        set_irq_chip(i, &iop13xx_irqchip1);
+                        irq_set_chip(i, &iop13xx_irqchip1);
                else if (i < 64)
-                        set_irq_chip(i, &iop13xx_irqchip2);
+                        irq_set_chip(i, &iop13xx_irqchip2);
                else if (i < 96)
-                        set_irq_chip(i, &iop13xx_irqchip3);
+                        irq_set_chip(i, &iop13xx_irqchip3);
                else
-                        set_irq_chip(i, &iop13xx_irqchip4);
+                        irq_set_chip(i, &iop13xx_irqchip4);
-                set_irq_handler(i, handle_level_irq);
+                irq_set_handler(i, handle_level_irq);
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
        }
diff --git a/arch/arm/mach-iop13xx/msi.c b/arch/arm/mach-iop13xx/msi.c
index c9c02e3698bc..560d5b2dec22 100644
--- a/arch/arm/mach-iop13xx/msi.c
+++ b/arch/arm/mach-iop13xx/msi.c
@@ -118,7 +118,7 @@ static void iop13xx_msi_handler(unsigned int irq, struct irq_desc *desc)
 void __init iop13xx_msi_init(void)
 {
-        set_irq_chained_handler(IRQ_IOP13XX_INBD_MSI, iop13xx_msi_handler);
+        irq_set_chained_handler(IRQ_IOP13XX_INBD_MSI, iop13xx_msi_handler);
 }
 /*
@@ -178,7 +178,7 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
        if (irq < 0)
                return irq;
-        set_irq_msi(irq, desc);
+        irq_set_msi_desc(irq, desc);
        msg.address_hi = 0x0;
        msg.address_lo = IOP13XX_MU_MIMR_PCI;
@@ -187,7 +187,7 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
        msg.data = (id << IOP13XX_MU_MIMR_CORE_SELECT) | (irq & 0x7f);
        write_msi_msg(irq, &msg);
-        set_irq_chip_and_handler(irq, &iop13xx_msi_chip, handle_simple_irq);
+        irq_set_chip_and_handler(irq, &iop13xx_msi_chip, handle_simple_irq);
        return 0;
 }
diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c
index d3426a120599..d7ee2789d890 100644
--- a/arch/arm/mach-iop32x/irq.c
+++ b/arch/arm/mach-iop32x/irq.c
@@ -68,8 +68,7 @@ void __init iop32x_init_irq(void)
                *IOP3XX_PCIIRSR = 0x0f;
        for (i = 0; i < NR_IRQS; i++) {
-                set_irq_chip(i, &ext_chip);
+                irq_set_chip_and_handler(i, &ext_chip, handle_level_irq);
-                set_irq_handler(i, handle_level_irq);
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
        }
 }
diff --git a/arch/arm/mach-iop33x/irq.c b/arch/arm/mach-iop33x/irq.c
index 0ff2f74363a5..f7f5d3e451c7 100644
--- a/arch/arm/mach-iop33x/irq.c
+++ b/arch/arm/mach-iop33x/irq.c
@@ -110,8 +110,9 @@ void __init iop33x_init_irq(void)
                *IOP3XX_PCIIRSR = 0x0f;
        for (i = 0; i < NR_IRQS; i++) {
-                set_irq_chip(i, (i < 32) ? &iop33x_irqchip1 : &iop33x_irqchip2);
+                irq_set_chip_and_handler(i,
-                set_irq_handler(i, handle_level_irq);
+                                         (i < 32) ? &iop33x_irqchip1 : &iop33x_irqchip2,
+                                         handle_level_irq);
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
        }
 }
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index 5fc4e064b650..4068166c8993 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -476,8 +476,8 @@ void __init ixp2000_init_irq(void)
         */
        for (irq = IRQ_IXP2000_SOFT_INT; irq <= IRQ_IXP2000_THDB3; irq++) {
                if ((1 << irq) & IXP2000_VALID_IRQ_MASK) {
-                        set_irq_chip(irq, &ixp2000_irq_chip);
+                        irq_set_chip_and_handler(irq, &ixp2000_irq_chip,
-                        set_irq_handler(irq, handle_level_irq);
+                                                 handle_level_irq);
                        set_irq_flags(irq, IRQF_VALID);
                } else set_irq_flags(irq, 0);
        }
@@ -485,21 +485,21 @@ void __init ixp2000_init_irq(void)
        for (irq = IRQ_IXP2000_DRAM0_MIN_ERR; irq <= IRQ_IXP2000_SP_INT; irq++) {
                if((1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)) &
                                IXP2000_VALID_ERR_IRQ_MASK) {
-                        set_irq_chip(irq, &ixp2000_err_irq_chip);
+                        irq_set_chip_and_handler(irq, &ixp2000_err_irq_chip,
-                        set_irq_handler(irq, handle_level_irq);
+                                                 handle_level_irq);
                        set_irq_flags(irq, IRQF_VALID);
                }
                else
                        set_irq_flags(irq, 0);
        }
-        set_irq_chained_handler(IRQ_IXP2000_ERRSUM, ixp2000_err_irq_handler);
+        irq_set_chained_handler(IRQ_IXP2000_ERRSUM, ixp2000_err_irq_handler);
        for (irq = IRQ_IXP2000_GPIO0; irq <= IRQ_IXP2000_GPIO7; irq++) {
-                set_irq_chip(irq, &ixp2000_GPIO_irq_chip);
+                irq_set_chip_and_handler(irq, &ixp2000_GPIO_irq_chip,
-                set_irq_handler(irq, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
-        set_irq_chained_handler(IRQ_IXP2000_GPIO, ixp2000_GPIO_irq_handler);
+        irq_set_chained_handler(IRQ_IXP2000_GPIO, ixp2000_GPIO_irq_handler);
        /*
         * Enable PCI irqs.  The actual PCI[AB] decoding is done in
@@ -508,8 +508,8 @@ void __init ixp2000_init_irq(void)
         */
        ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << IRQ_IXP2000_PCI));
        for (irq = IRQ_IXP2000_PCIA; irq <= IRQ_IXP2000_PCIB; irq++) {
-                set_irq_chip(irq, &ixp2000_pci_irq_chip);
+                irq_set_chip_and_handler(irq, &ixp2000_pci_irq_chip,
-                set_irq_handler(irq, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
 }
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
index 7d90d3f13ee8..235638f800e5 100644
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -158,13 +158,13 @@ void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigne
        *board_irq_mask = 0xffffffff;
        for(irq = IXP2000_BOARD_IRQ(0); irq < IXP2000_BOARD_IRQ(board_irq_count); irq++) {
-                set_irq_chip(irq, &ixdp2x00_cpld_irq_chip);
+                irq_set_chip_and_handler(irq, &ixdp2x00_cpld_irq_chip,
-                set_irq_handler(irq, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
        /* Hook into PCI interrupt */
-        set_irq_chained_handler(IRQ_IXP2000_PCIB, ixdp2x00_irq_handler);
+        irq_set_chained_handler(IRQ_IXP2000_PCIB, ixdp2x00_irq_handler);
 }
 /*************************************************************************
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index 34b1b2af37c8..84835b209557 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -115,8 +115,8 @@ void __init ixdp2x01_init_irq(void)
        for (irq = NR_IXP2000_IRQS; irq < NR_IXDP2X01_IRQS; irq++) {
                if (irq & valid_irq_mask) {
-                        set_irq_chip(irq, &ixdp2x01_irq_chip);
+                        irq_set_chip_and_handler(irq, &ixdp2x01_irq_chip,
-                        set_irq_handler(irq, handle_level_irq);
+                                                 handle_level_irq);
                        set_irq_flags(irq, IRQF_VALID);
                } else {
                        set_irq_flags(irq, 0);
@@ -124,7 +124,7 @@ void __init ixdp2x01_init_irq(void)
        }
        /* Hook into PCI interrupts */
-        set_irq_chained_handler(IRQ_IXP2000_PCIB, ixdp2x01_irq_handler);
+        irq_set_chained_handler(IRQ_IXP2000_PCIB, ixdp2x01_irq_handler);
 }
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index 9c8a33903216..a1bee33d183e 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -289,12 +289,12 @@ static void ixp23xx_config_irq(unsigned int irq, enum ixp23xx_irq_type type)
 {
        switch (type) {
        case IXP23XX_IRQ_LEVEL:
-                set_irq_chip(irq, &ixp23xx_irq_level_chip);
+                irq_set_chip_and_handler(irq, &ixp23xx_irq_level_chip,
-                set_irq_handler(irq, handle_level_irq);
+                                         handle_level_irq);
                break;
        case IXP23XX_IRQ_EDGE:
-                set_irq_chip(irq, &ixp23xx_irq_edge_chip);
+                irq_set_chip_and_handler(irq, &ixp23xx_irq_edge_chip,
-                set_irq_handler(irq, handle_edge_irq);
+                                         handle_edge_irq);
                break;
        }
        set_irq_flags(irq, IRQF_VALID);
@@ -324,12 +324,12 @@ void __init ixp23xx_init_irq(void)
        }
        for (irq = IRQ_IXP23XX_INTA; irq <= IRQ_IXP23XX_INTB; irq++) {
-                set_irq_chip(irq, &ixp23xx_pci_irq_chip);
+                irq_set_chip_and_handler(irq, &ixp23xx_pci_irq_chip,
-                set_irq_handler(irq, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
-        set_irq_chained_handler(IRQ_IXP23XX_PCI_INT_RPH, pci_handler);
+        irq_set_chained_handler(IRQ_IXP23XX_PCI_INT_RPH, pci_handler);
 }
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
index 181116aa6591..8dcba17c81e7 100644
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -136,8 +136,8 @@ void __init ixdp2351_init_irq(void)
             irq++) {
                if (IXDP2351_INTA_IRQ_MASK(irq) & IXDP2351_INTA_IRQ_VALID) {
                        set_irq_flags(irq, IRQF_VALID);
-                        set_irq_handler(irq, handle_level_irq);
+                        irq_set_chip_and_handler(irq, &ixdp2351_inta_chip,
-                        set_irq_chip(irq, &ixdp2351_inta_chip);
+                                                 handle_level_irq);
                }
        }
@@ -147,13 +147,13 @@ void __init ixdp2351_init_irq(void)
             irq++) {
                if (IXDP2351_INTB_IRQ_MASK(irq) & IXDP2351_INTB_IRQ_VALID) {
                        set_irq_flags(irq, IRQF_VALID);
-                        set_irq_handler(irq, handle_level_irq);
+                        irq_set_chip_and_handler(irq, &ixdp2351_intb_chip,
-                        set_irq_chip(irq, &ixdp2351_intb_chip);
+                                                 handle_level_irq);
                }
        }
-        set_irq_chained_handler(IRQ_IXP23XX_INTA, ixdp2351_inta_handler);
+        irq_set_chained_handler(IRQ_IXP23XX_INTA, ixdp2351_inta_handler);
-        set_irq_chained_handler(IRQ_IXP23XX_INTB, ixdp2351_intb_handler);
+        irq_set_chained_handler(IRQ_IXP23XX_INTB, ixdp2351_intb_handler);
 }
 /*
diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c
index 76c61ba73218..8fe0c6273262 100644
--- a/arch/arm/mach-ixp23xx/roadrunner.c
+++ b/arch/arm/mach-ixp23xx/roadrunner.c
@@ -110,8 +110,8 @@ static int __init roadrunner_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
 static void __init roadrunner_pci_preinit(void)
 {
-        set_irq_type(IRQ_ROADRUNNER_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IRQ_ROADRUNNER_PCI_INTC, IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IRQ_ROADRUNNER_PCI_INTD, IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IRQ_ROADRUNNER_PCI_INTD, IRQ_TYPE_LEVEL_LOW);
        ixp23xx_pci_preinit();
 }
diff --git a/arch/arm/mach-ixp4xx/avila-pci.c b/arch/arm/mach-ixp4xx/avila-pci.c
index 845e1b500548..162043ff29ff 100644
--- a/arch/arm/mach-ixp4xx/avila-pci.c
+++ b/arch/arm/mach-ixp4xx/avila-pci.c
@@ -39,10 +39,10 @@
 void __init avila_pci_preinit(void)
 {
-        set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 9fd894271d5d..ed19bc314318 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -252,8 +252,8 @@ void __init ixp4xx_init_irq(void)
        /* Default to all level triggered */
        for(i = 0; i < NR_IRQS; i++) {
-                set_irq_chip(i, &ixp4xx_irq_chip);
+                irq_set_chip_and_handler(i, &ixp4xx_irq_chip,
-                set_irq_handler(i, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(i, IRQF_VALID);
        }
 }
diff --git a/arch/arm/mach-ixp4xx/coyote-pci.c b/arch/arm/mach-ixp4xx/coyote-pci.c
index b978ea8bd6f0..37fda7d6e83d 100644
--- a/arch/arm/mach-ixp4xx/coyote-pci.c
+++ b/arch/arm/mach-ixp4xx/coyote-pci.c
@@ -32,8 +32,8 @@
 void __init coyote_pci_preinit(void)
 {
-        set_irq_type(IXP4XX_GPIO_IRQ(SLOT0_INTA), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(SLOT0_INTA), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(SLOT1_INTA), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(SLOT1_INTA), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
diff --git a/arch/arm/mach-ixp4xx/dsmg600-pci.c b/arch/arm/mach-ixp4xx/dsmg600-pci.c
index fa70fed462ba..c7612010b3fc 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-pci.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-pci.c
@@ -35,12 +35,12 @@
 void __init dsmg600_pci_preinit(void)
 {
-        set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTF), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTF), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
diff --git a/arch/arm/mach-ixp4xx/fsg-pci.c b/arch/arm/mach-ixp4xx/fsg-pci.c
index 5a810c930624..44ccde9d4879 100644
--- a/arch/arm/mach-ixp4xx/fsg-pci.c
+++ b/arch/arm/mach-ixp4xx/fsg-pci.c
@@ -32,9 +32,9 @@
 void __init fsg_pci_preinit(void)
 {
-        set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
diff --git a/arch/arm/mach-ixp4xx/gateway7001-pci.c b/arch/arm/mach-ixp4xx/gateway7001-pci.c
index 7e93a0975c4d..fc1124168874 100644
--- a/arch/arm/mach-ixp4xx/gateway7001-pci.c
+++ b/arch/arm/mach-ixp4xx/gateway7001-pci.c
@@ -29,8 +29,8 @@
 void __init gateway7001_pci_preinit(void)
 {
-        set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index d0e4861ac03d..3e8c0e33b59c 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -420,8 +420,8 @@ static void __init gmlr_init(void)
        gpio_line_config(GPIO_HSS1_RTS_N, IXP4XX_GPIO_OUT);
        gpio_line_config(GPIO_HSS0_DCD_N, IXP4XX_GPIO_IN);
        gpio_line_config(GPIO_HSS1_DCD_N, IXP4XX_GPIO_IN);
-        set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS0_DCD_N), IRQ_TYPE_EDGE_BOTH);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS0_DCD_N), IRQ_TYPE_EDGE_BOTH);
-        set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N), IRQ_TYPE_EDGE_BOTH);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N), IRQ_TYPE_EDGE_BOTH);
        set_control(CONTROL_HSS0_DTR_N, 1);
        set_control(CONTROL_HSS1_DTR_N, 1);
@@ -441,10 +441,10 @@ static void __init gmlr_init(void)
 #ifdef CONFIG_PCI
 static void __init gmlr_pci_preinit(void)
 {
-        set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHA), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHA), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHB), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHB), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_NEC), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_NEC), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_MPCI), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_MPCI), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-pci.c b/arch/arm/mach-ixp4xx/gtwx5715-pci.c
index 25d2c333c204..38cc0725dbd8 100644
--- a/arch/arm/mach-ixp4xx/gtwx5715-pci.c
+++ b/arch/arm/mach-ixp4xx/gtwx5715-pci.c
@@ -43,8 +43,8 @@
 */
 void __init gtwx5715_pci_preinit(void)
 {
-        set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c
index 1ba165a6edac..58f400417eaf 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c
@@ -36,10 +36,10 @@
 void __init ixdp425_pci_preinit(void)
 {
-        set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
diff --git a/arch/arm/mach-ixp4xx/ixdpg425-pci.c b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
index 4ed7ac614920..e64f6d041488 100644
--- a/arch/arm/mach-ixp4xx/ixdpg425-pci.c
+++ b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
@@ -25,8 +25,8 @@
 void __init ixdpg425_pci_preinit(void)
 {
-        set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IRQ_IXP4XX_GPIO7, IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IRQ_IXP4XX_GPIO7, IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
diff --git a/arch/arm/mach-ixp4xx/nas100d-pci.c b/arch/arm/mach-ixp4xx/nas100d-pci.c
index d0cea34cf61e..428d1202b799 100644
--- a/arch/arm/mach-ixp4xx/nas100d-pci.c
+++ b/arch/arm/mach-ixp4xx/nas100d-pci.c
@@ -33,11 +33,11 @@
 void __init nas100d_pci_preinit(void)
 {
-        set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
diff --git a/arch/arm/mach-ixp4xx/nslu2-pci.c b/arch/arm/mach-ixp4xx/nslu2-pci.c
index 1eb5a90470bc..2e85f76b950d 100644
--- a/arch/arm/mach-ixp4xx/nslu2-pci.c
+++ b/arch/arm/mach-ixp4xx/nslu2-pci.c
@@ -32,9 +32,9 @@
 void __init nslu2_pci_preinit(void)
 {
-        set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
diff --git a/arch/arm/mach-ixp4xx/vulcan-pci.c b/arch/arm/mach-ixp4xx/vulcan-pci.c
index f3111c6840ef..03bdec5140a7 100644
--- a/arch/arm/mach-ixp4xx/vulcan-pci.c
+++ b/arch/arm/mach-ixp4xx/vulcan-pci.c
@@ -38,8 +38,8 @@ void __init vulcan_pci_preinit(void)
        pr_info("Vulcan PCI: limiting CardBus memory size to %dMB\n",
                (int)(pci_cardbus_mem_size >> 20));
 #endif
-        set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
diff --git a/arch/arm/mach-ixp4xx/wg302v2-pci.c b/arch/arm/mach-ixp4xx/wg302v2-pci.c
index 9b59ed03b151..17f3cf59a31b 100644
--- a/arch/arm/mach-ixp4xx/wg302v2-pci.c
+++ b/arch/arm/mach-ixp4xx/wg302v2-pci.c
@@ -29,8 +29,8 @@
 void __init wg302v2_pci_preinit(void)
 {
-        set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW);
-        set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW);
        ixp4xx_pci_preinit();
 }
diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c
index cbdb5863d13b..05d193a25b25 100644
--- a/arch/arm/mach-kirkwood/irq.c
+++ b/arch/arm/mach-kirkwood/irq.c
@@ -35,14 +35,15 @@ void __init kirkwood_init_irq(void)
         */
        orion_gpio_init(0, 32, GPIO_LOW_VIRT_BASE, 0,
                        IRQ_KIRKWOOD_GPIO_START);
-        set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_0_7, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_0_7, gpio_irq_handler);
-        set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_8_15, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_8_15, gpio_irq_handler);
-        set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_16_23, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_16_23, gpio_irq_handler);
-        set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_24_31, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_24_31, gpio_irq_handler);
        orion_gpio_init(32, 18, GPIO_HIGH_VIRT_BASE, 0,
                        IRQ_KIRKWOOD_GPIO_START + 32);
-        set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_0_7, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_0_7, gpio_irq_handler);
-        set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_8_15, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_8_15, gpio_irq_handler);
-        set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_16_23, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_16_23,
+                                gpio_irq_handler);
 }
diff --git a/arch/arm/mach-ks8695/gpio.c b/arch/arm/mach-ks8695/gpio.c
index 55fbf7111a5b..31e456508a6f 100644
--- a/arch/arm/mach-ks8695/gpio.c
+++ b/arch/arm/mach-ks8695/gpio.c
@@ -80,7 +80,7 @@ int ks8695_gpio_interrupt(unsigned int pin, unsigned int type)
        local_irq_restore(flags);
        /* Set IRQ triggering type */
-        set_irq_type(gpio_irq[pin], type);
+        irq_set_irq_type(gpio_irq[pin], type);
        /* enable interrupt mode */
        ks8695_gpio_mode(pin, 0);
diff --git a/arch/arm/mach-ks8695/irq.c b/arch/arm/mach-ks8695/irq.c
index 7998ccaa6333..a78092dcd6fb 100644
--- a/arch/arm/mach-ks8695/irq.c
+++ b/arch/arm/mach-ks8695/irq.c
@@ -115,12 +115,12 @@ static int ks8695_irq_set_type(struct irq_data *d, unsigned int type)
        }
        if (level_triggered) {
-                set_irq_chip(d->irq, &ks8695_irq_level_chip);
+                irq_set_chip_and_handler(d->irq, &ks8695_irq_level_chip,
-                set_irq_handler(d->irq, handle_level_irq);
+                                         handle_level_irq);
        }
        else {
-                set_irq_chip(d->irq, &ks8695_irq_edge_chip);
+                irq_set_chip_and_handler(d->irq, &ks8695_irq_edge_chip,
-                set_irq_handler(d->irq, handle_edge_irq);
+                                         handle_edge_irq);
        }
        __raw_writel(ctrl, KS8695_GPIO_VA + KS8695_IOPC);
@@ -158,16 +158,18 @@ void __init ks8695_init_irq(void)
                        case KS8695_IRQ_UART_RX:
                        case KS8695_IRQ_COMM_TX:
                        case KS8695_IRQ_COMM_RX:
-                                set_irq_chip(irq, &ks8695_irq_level_chip);
+                                irq_set_chip_and_handler(irq,
-                                set_irq_handler(irq, handle_level_irq);
+                                                         &ks8695_irq_level_chip,
+                                                         handle_level_irq);
                                break;
                        /* Edge-triggered interrupts */
                        default:
                                /* clear pending bit */
                                ks8695_irq_ack(irq_get_irq_data(irq));
-                                set_irq_chip(irq, &ks8695_irq_edge_chip);
+                                irq_set_chip_and_handler(irq,
-                                set_irq_handler(irq, handle_edge_irq);
+                                                         &ks8695_irq_edge_chip,
+                                                         handle_edge_irq);
                }
                set_irq_flags(irq, IRQF_VALID);
diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c
index 316ecbf6c586..4eae566dfdc7 100644
--- a/arch/arm/mach-lpc32xx/irq.c
+++ b/arch/arm/mach-lpc32xx/irq.c
@@ -290,7 +290,7 @@ static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type)
        }
        /* Ok to use the level handler for all types */
-        set_irq_handler(d->irq, handle_level_irq);
+        irq_set_handler(d->irq, handle_level_irq);
        return 0;
 }
@@ -390,8 +390,8 @@ void __init lpc32xx_init_irq(void)
        /* Configure supported IRQ's */
        for (i = 0; i < NR_IRQS; i++) {
-                set_irq_chip(i, &lpc32xx_irq_chip);
+                irq_set_chip_and_handler(i, &lpc32xx_irq_chip,
-                set_irq_handler(i, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(i, IRQF_VALID);
        }
@@ -406,8 +406,8 @@ void __init lpc32xx_init_irq(void)
        __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE));
        /* MIC SUBIRQx interrupts will route handling to the chain handlers */
-        set_irq_chained_handler(IRQ_LPC32XX_SUB1IRQ, lpc32xx_sic1_handler);
+        irq_set_chained_handler(IRQ_LPC32XX_SUB1IRQ, lpc32xx_sic1_handler);
-        set_irq_chained_handler(IRQ_LPC32XX_SUB2IRQ, lpc32xx_sic2_handler);
+        irq_set_chained_handler(IRQ_LPC32XX_SUB2IRQ, lpc32xx_sic2_handler);
        /* Initially disable all wake events */
        __raw_writel(0, LPC32XX_CLKPWR_P01_ER);
diff --git a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c
index fa037038e7b8..d21c5441a3d0 100644
--- a/arch/arm/mach-mmp/irq-mmp2.c
+++ b/arch/arm/mach-mmp/irq-mmp2.c
@@ -110,9 +110,9 @@ static void init_mux_irq(struct irq_chip *chip, int start, int num)
                if (chip->irq_ack)
                        chip->irq_ack(d);
-                set_irq_chip(irq, chip);
+                irq_set_chip(irq, chip);
                set_irq_flags(irq, IRQF_VALID);
-                set_irq_handler(irq, handle_level_irq);
+                irq_set_handler(irq, handle_level_irq);
        }
 }
@@ -122,7 +122,7 @@ void __init mmp2_init_icu(void)
        for (irq = 0; irq < IRQ_MMP2_MUX_BASE; irq++) {
                icu_mask_irq(irq_get_irq_data(irq));
-                set_irq_chip(irq, &icu_irq_chip);
+                irq_set_chip(irq, &icu_irq_chip);
                set_irq_flags(irq, IRQF_VALID);
                switch (irq) {
@@ -133,7 +133,7 @@ void __init mmp2_init_icu(void)
                case IRQ_MMP2_SSP_MUX:
                        break;
                default:
-                        set_irq_handler(irq, handle_level_irq);
+                        irq_set_handler(irq, handle_level_irq);
                        break;
                }
        }
@@ -149,9 +149,9 @@ void __init mmp2_init_icu(void)
        init_mux_irq(&misc_irq_chip, IRQ_MMP2_MISC_BASE, 15);
        init_mux_irq(&ssp_irq_chip, IRQ_MMP2_SSP_BASE, 2);
-        set_irq_chained_handler(IRQ_MMP2_PMIC_MUX, pmic_irq_demux);
+        irq_set_chained_handler(IRQ_MMP2_PMIC_MUX, pmic_irq_demux);
-        set_irq_chained_handler(IRQ_MMP2_RTC_MUX, rtc_irq_demux);
+        irq_set_chained_handler(IRQ_MMP2_RTC_MUX, rtc_irq_demux);
-        set_irq_chained_handler(IRQ_MMP2_TWSI_MUX, twsi_irq_demux);
+        irq_set_chained_handler(IRQ_MMP2_TWSI_MUX, twsi_irq_demux);
-        set_irq_chained_handler(IRQ_MMP2_MISC_MUX, misc_irq_demux);
+        irq_set_chained_handler(IRQ_MMP2_MISC_MUX, misc_irq_demux);
-        set_irq_chained_handler(IRQ_MMP2_SSP_MUX, ssp_irq_demux);
+        irq_set_chained_handler(IRQ_MMP2_SSP_MUX, ssp_irq_demux);
 }
diff --git a/arch/arm/mach-mmp/irq-pxa168.c b/arch/arm/mach-mmp/irq-pxa168.c
index f86b450cb93c..89706a0d08f1 100644
--- a/arch/arm/mach-mmp/irq-pxa168.c
+++ b/arch/arm/mach-mmp/irq-pxa168.c
@@ -48,8 +48,7 @@ void __init icu_init_irq(void)
        for (irq = 0; irq < 64; irq++) {
                icu_mask_irq(irq_get_irq_data(irq));
-                set_irq_chip(irq, &icu_irq_chip);
+                irq_set_chip_and_handler(irq, &icu_irq_chip, handle_level_irq);
-                set_irq_handler(irq, handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
 }
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index 1993721d472e..35c7ceeb3f29 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -53,7 +53,7 @@ static void __init msm8960_init_irq(void)
         */
        for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
                if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
-                        set_irq_handler(i, handle_percpu_irq);
+                        irq_set_handler(i, handle_percpu_irq);
        }
 }
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index b3c55f138fce..1163b6fd05d2 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -56,7 +56,7 @@ static void __init msm8x60_init_irq(void)
         */
        for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
                if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
-                        set_irq_handler(i, handle_percpu_irq);
+                        irq_set_handler(i, handle_percpu_irq);
        }
 }
diff --git a/arch/arm/mach-msm/board-trout-gpio.c b/arch/arm/mach-msm/board-trout-gpio.c
index 31117a4499c4..87e1d01edecc 100644
--- a/arch/arm/mach-msm/board-trout-gpio.c
+++ b/arch/arm/mach-msm/board-trout-gpio.c
@@ -214,17 +214,17 @@ int __init trout_init_gpio(void)
 {
        int i;
        for(i = TROUT_INT_START; i <= TROUT_INT_END; i++) {
-                set_irq_chip(i, &trout_gpio_irq_chip);
+                irq_set_chip_and_handler(i, &trout_gpio_irq_chip,
-                set_irq_handler(i, handle_edge_irq);
+                                         handle_edge_irq);
                set_irq_flags(i, IRQF_VALID);
        }
        for (i = 0; i < ARRAY_SIZE(msm_gpio_banks); i++)
                gpiochip_add(&msm_gpio_banks[i].chip);
-        set_irq_type(MSM_GPIO_TO_INT(17), IRQF_TRIGGER_HIGH);
+        irq_set_irq_type(MSM_GPIO_TO_INT(17), IRQF_TRIGGER_HIGH);
-        set_irq_chained_handler(MSM_GPIO_TO_INT(17), trout_gpio_irq_handler);
+        irq_set_chained_handler(MSM_GPIO_TO_INT(17), trout_gpio_irq_handler);
-        set_irq_wake(MSM_GPIO_TO_INT(17), 1);
+        irq_set_irq_wake(MSM_GPIO_TO_INT(17), 1);
        return 0;
 }
diff --git a/arch/arm/mach-msm/board-trout-mmc.c b/arch/arm/mach-msm/board-trout-mmc.c
index 44be8464657b..f7a9724788b0 100644
--- a/arch/arm/mach-msm/board-trout-mmc.c
+++ b/arch/arm/mach-msm/board-trout-mmc.c
@@ -174,7 +174,7 @@ int __init trout_init_mmc(unsigned int sys_rev)
        if (IS_ERR(vreg_sdslot))
                return PTR_ERR(vreg_sdslot);
-        set_irq_wake(TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 1);
+        irq_set_irq_wake(TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 1);
        if (!opt_disable_sdcard)
                msm_add_sdcc(2, &trout_sdslot_data,
diff --git a/arch/arm/mach-msm/gpio-v2.c b/arch/arm/mach-msm/gpio-v2.c
index 0de19ec74e34..56a964e52ad3 100644
--- a/arch/arm/mach-msm/gpio-v2.c
+++ b/arch/arm/mach-msm/gpio-v2.c
@@ -230,18 +230,18 @@ static void msm_gpio_update_dual_edge_pos(unsigned gpio)
               val, val2);
 }
-static void msm_gpio_irq_ack(unsigned int irq)
+static void msm_gpio_irq_ack(struct irq_data *d)
 {
-        int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq);
+        int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
        writel(BIT(INTR_STATUS), GPIO_INTR_STATUS(gpio));
        if (test_bit(gpio, msm_gpio.dual_edge_irqs))
                msm_gpio_update_dual_edge_pos(gpio);
 }
-static void msm_gpio_irq_mask(unsigned int irq)
+static void msm_gpio_irq_mask(struct irq_data *d)
 {
-        int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq);
+        int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
        unsigned long irq_flags;
        spin_lock_irqsave(&tlmm_lock, irq_flags);
@@ -251,9 +251,9 @@ static void msm_gpio_irq_mask(unsigned int irq)
        spin_unlock_irqrestore(&tlmm_lock, irq_flags);
 }
-static void msm_gpio_irq_unmask(unsigned int irq)
+static void msm_gpio_irq_unmask(struct irq_data *d)
 {
-        int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq);
+        int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
        unsigned long irq_flags;
        spin_lock_irqsave(&tlmm_lock, irq_flags);
@@ -263,9 +263,9 @@ static void msm_gpio_irq_unmask(unsigned int irq)
        spin_unlock_irqrestore(&tlmm_lock, irq_flags);
 }
-static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type)
+static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
 {
-        int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq);
+        int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
        unsigned long irq_flags;
        uint32_t bits;
@@ -275,14 +275,14 @@ static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type)
        if (flow_type & IRQ_TYPE_EDGE_BOTH) {
                bits |= BIT(INTR_DECT_CTL);
-                irq_desc[irq].handle_irq = handle_edge_irq;
+                __irq_set_handler_locked(d->irq, handle_edge_irq);
                if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH)
                        __set_bit(gpio, msm_gpio.dual_edge_irqs);
                else
                        __clear_bit(gpio, msm_gpio.dual_edge_irqs);
        } else {
                bits &= ~BIT(INTR_DECT_CTL);
-                irq_desc[irq].handle_irq = handle_level_irq;
+                __irq_set_handler_locked(d->irq, handle_level_irq);
                __clear_bit(gpio, msm_gpio.dual_edge_irqs);
        }
@@ -309,6 +309,7 @@ static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type)
 */
 static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
+        struct irq_data *data = irq_desc_get_irq_data(desc);
        unsigned long i;
        for (i = find_first_bit(msm_gpio.enabled_irqs, NR_GPIO_IRQS);
@@ -318,21 +319,21 @@ static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc)
                        generic_handle_irq(msm_gpio_to_irq(&msm_gpio.gpio_chip,
                                                           i));
        }
-        desc->chip->ack(irq);
+        data->chip->irq_ack(data);
 }
-static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on)
+static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
 {
-        int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq);
+        int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
        if (on) {
                if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS))
-                        set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 1);
+                        irq_set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 1);
                set_bit(gpio, msm_gpio.wake_irqs);
        } else {
                clear_bit(gpio, msm_gpio.wake_irqs);
                if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS))
-                        set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 0);
+                        irq_set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 0);
        }
        return 0;
@@ -340,11 +341,11 @@ static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on)
 static struct irq_chip msm_gpio_irq_chip = {
        .name           = "msmgpio",
-        .mask           = msm_gpio_irq_mask,
+        .irq_mask       = msm_gpio_irq_mask,
-        .unmask         = msm_gpio_irq_unmask,
+        .irq_unmask     = msm_gpio_irq_unmask,
-        .ack            = msm_gpio_irq_ack,
+        .irq_ack        = msm_gpio_irq_ack,
-        .set_type       = msm_gpio_irq_set_type,
+        .irq_set_type   = msm_gpio_irq_set_type,
-        .set_wake       = msm_gpio_irq_set_wake,
+        .irq_set_wake   = msm_gpio_irq_set_wake,
 };
 static int __devinit msm_gpio_probe(struct platform_device *dev)
@@ -361,12 +362,12 @@ static int __devinit msm_gpio_probe(struct platform_device *dev)
        for (i = 0; i < msm_gpio.gpio_chip.ngpio; ++i) {
                irq = msm_gpio_to_irq(&msm_gpio.gpio_chip, i);
-                set_irq_chip(irq, &msm_gpio_irq_chip);
+                irq_set_chip_and_handler(irq, &msm_gpio_irq_chip,
-                set_irq_handler(irq, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
-        set_irq_chained_handler(TLMM_SCSS_SUMMARY_IRQ,
+        irq_set_chained_handler(TLMM_SCSS_SUMMARY_IRQ,
                                msm_summary_irq_handler);
        return 0;
 }
@@ -378,7 +379,7 @@ static int __devexit msm_gpio_remove(struct platform_device *dev)
        if (ret < 0)
                return ret;
-        set_irq_handler(TLMM_SCSS_SUMMARY_IRQ, NULL);
+        irq_set_handler(TLMM_SCSS_SUMMARY_IRQ, NULL);
        return 0;
 }
diff --git a/arch/arm/mach-msm/gpio.c b/arch/arm/mach-msm/gpio.c
index 176af9dcb8ee..5ea273b00da8 100644
--- a/arch/arm/mach-msm/gpio.c
+++ b/arch/arm/mach-msm/gpio.c
@@ -293,10 +293,10 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
        val = readl(msm_chip->regs.int_edge);
        if (flow_type & IRQ_TYPE_EDGE_BOTH) {
                writel(val | mask, msm_chip->regs.int_edge);
-                irq_desc[d->irq].handle_irq = handle_edge_irq;
+                __irq_set_handler_locked(d->irq, handle_edge_irq);
        } else {
                writel(val & ~mask, msm_chip->regs.int_edge);
-                irq_desc[d->irq].handle_irq = handle_level_irq;
+                __irq_set_handler_locked(d->irq, handle_level_irq);
        }
        if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
                msm_chip->both_edge_detect |= mask;
@@ -354,9 +354,9 @@ static int __init msm_init_gpio(void)
                        msm_gpio_chips[j].chip.base +
                        msm_gpio_chips[j].chip.ngpio)
                        j++;
-                set_irq_chip_data(i, &msm_gpio_chips[j]);
+                irq_set_chip_data(i, &msm_gpio_chips[j]);
-                set_irq_chip(i, &msm_gpio_irq_chip);
+                irq_set_chip_and_handler(i, &msm_gpio_irq_chip,
-                set_irq_handler(i, handle_edge_irq);
+                                         handle_edge_irq);
                set_irq_flags(i, IRQF_VALID);
        }
@@ -366,10 +366,10 @@ static int __init msm_init_gpio(void)
                gpiochip_add(&msm_gpio_chips[i].chip);
        }
-        set_irq_chained_handler(INT_GPIO_GROUP1, msm_gpio_irq_handler);
+        irq_set_chained_handler(INT_GPIO_GROUP1, msm_gpio_irq_handler);
-        set_irq_chained_handler(INT_GPIO_GROUP2, msm_gpio_irq_handler);
+        irq_set_chained_handler(INT_GPIO_GROUP2, msm_gpio_irq_handler);
-        set_irq_wake(INT_GPIO_GROUP1, 1);
+        irq_set_irq_wake(INT_GPIO_GROUP1, 1);
-        set_irq_wake(INT_GPIO_GROUP2, 2);
+        irq_set_irq_wake(INT_GPIO_GROUP2, 2);
        return 0;
 }
diff --git a/arch/arm/mach-msm/irq-vic.c b/arch/arm/mach-msm/irq-vic.c
index 68c28bbdc969..1b54f807c2d0 100644
--- a/arch/arm/mach-msm/irq-vic.c
+++ b/arch/arm/mach-msm/irq-vic.c
@@ -313,11 +313,11 @@ static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type)
        type = msm_irq_shadow_reg[index].int_type;
        if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
                type |= b;
-                irq_desc[d->irq].handle_irq = handle_edge_irq;
+                __irq_set_handler_locked(d->irq, handle_edge_irq);
        }
        if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
                type &= ~b;
-                irq_desc[d->irq].handle_irq = handle_level_irq;
+                __irq_set_handler_locked(d->irq, handle_level_irq);
        }
        writel(type, treg);
        msm_irq_shadow_reg[index].int_type = type;
@@ -357,8 +357,7 @@ void __init msm_init_irq(void)
        writel(3, VIC_INT_MASTEREN);
        for (n = 0; n < NR_MSM_IRQS; n++) {
-                set_irq_chip(n, &msm_irq_chip);
+                irq_set_chip_and_handler(n, &msm_irq_chip, handle_level_irq);
-                set_irq_handler(n, handle_level_irq);
                set_irq_flags(n, IRQF_VALID);
        }
 }
diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c
index 0b27d899f40e..ea514be390c6 100644
--- a/arch/arm/mach-msm/irq.c
+++ b/arch/arm/mach-msm/irq.c
@@ -100,11 +100,11 @@ static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type)
        if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
                writel(readl(treg) | b, treg);
-                irq_desc[d->irq].handle_irq = handle_edge_irq;
+                __irq_set_handler_locked(d->irq, handle_edge_irq);
        }
        if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
                writel(readl(treg) & (~b), treg);
-                irq_desc[d->irq].handle_irq = handle_level_irq;
+                __irq_set_handler_locked(d->irq, handle_level_irq);
        }
        return 0;
 }
@@ -145,8 +145,7 @@ void __init msm_init_irq(void)
        writel(1, VIC_INT_MASTEREN);
        for (n = 0; n < NR_MSM_IRQS; n++) {
-                set_irq_chip(n, &msm_irq_chip);
+                irq_set_chip_and_handler(n, &msm_irq_chip, handle_level_irq);
-                set_irq_handler(n, handle_level_irq);
                set_irq_flags(n, IRQF_VALID);
        }
 }
diff --git a/arch/arm/mach-msm/sirc.c b/arch/arm/mach-msm/sirc.c
index 11b54c7aeb09..689e78c95f38 100644
--- a/arch/arm/mach-msm/sirc.c
+++ b/arch/arm/mach-msm/sirc.c
@@ -105,10 +105,10 @@ static int sirc_irq_set_type(struct irq_data *d, unsigned int flow_type)
        val = readl(sirc_regs.int_type);
        if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
                val |= mask;
-                irq_desc[d->irq].handle_irq = handle_edge_irq;
+                __irq_set_handler_locked(d->irq, handle_edge_irq);
        } else {
                val &= ~mask;
-                irq_desc[d->irq].handle_irq = handle_level_irq;
+                __irq_set_handler_locked(d->irq, handle_level_irq);
        }
        writel(val, sirc_regs.int_type);
@@ -158,15 +158,14 @@ void __init msm_init_sirc(void)
        wake_enable = 0;
        for (i = FIRST_SIRC_IRQ; i < LAST_SIRC_IRQ; i++) {
-                set_irq_chip(i, &sirc_irq_chip);
+                irq_set_chip_and_handler(i, &sirc_irq_chip, handle_edge_irq);
-                set_irq_handler(i, handle_edge_irq);
                set_irq_flags(i, IRQF_VALID);
        }
        for (i = 0; i < ARRAY_SIZE(sirc_reg_table); i++) {
-                set_irq_chained_handler(sirc_reg_table[i].cascade_irq,
+                irq_set_chained_handler(sirc_reg_table[i].cascade_irq,
                                        sirc_irq_handler);
-                set_irq_wake(sirc_reg_table[i].cascade_irq, 1);
+                irq_set_irq_wake(sirc_reg_table[i].cascade_irq, 1);
        }
        return;
 }
diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c
index 08da497c39c2..3e24431bb5ea 100644
--- a/arch/arm/mach-mv78xx0/irq.c
+++ b/arch/arm/mach-mv78xx0/irq.c
@@ -38,8 +38,8 @@ void __init mv78xx0_init_irq(void)
        orion_gpio_init(0, 32, GPIO_VIRT_BASE,
                        mv78xx0_core_index() ? 0x18 : 0,
                        IRQ_MV78XX0_GPIO_START);
-        set_irq_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler);
-        set_irq_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler);
-        set_irq_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler);
-        set_irq_chained_handler(IRQ_MV78XX0_GPIO_24_31, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_MV78XX0_GPIO_24_31, gpio_irq_handler);
 }
diff --git a/arch/arm/mach-mx3/mach-mx31ads.c b/arch/arm/mach-mx3/mach-mx31ads.c
index 4e4b780c481d..3d095d69bc68 100644
--- a/arch/arm/mach-mx3/mach-mx31ads.c
+++ b/arch/arm/mach-mx3/mach-mx31ads.c
@@ -199,12 +199,11 @@ static void __init mx31ads_init_expio(void)
        __raw_writew(0xFFFF, PBC_INTSTATUS_REG);
        for (i = MXC_EXP_IO_BASE; i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES);
             i++) {
-                set_irq_chip(i, &expio_irq_chip);
+                irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq);
-                set_irq_handler(i, handle_level_irq);
                set_irq_flags(i, IRQF_VALID);
        }
-        set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_HIGH);
+        irq_set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_HIGH);
-        set_irq_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler);
+        irq_set_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler);
 }
 #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1
diff --git a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
index e83ffadb65f8..4a8550529b04 100644
--- a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
+++ b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c
@@ -212,7 +212,7 @@ void __init eukrea_mbimx51_baseboard_init(void)
        gpio_request(MBIMX51_TSC2007_GPIO, "tsc2007_irq");
        gpio_direction_input(MBIMX51_TSC2007_GPIO);
-        set_irq_type(MBIMX51_TSC2007_IRQ, IRQF_TRIGGER_FALLING);
+        irq_set_irq_type(MBIMX51_TSC2007_IRQ, IRQF_TRIGGER_FALLING);
        i2c_register_board_info(1, mbimx51_i2c_devices,
                                ARRAY_SIZE(mbimx51_i2c_devices));
diff --git a/arch/arm/mach-mx5/mx51_efika.c b/arch/arm/mach-mx5/mx51_efika.c
index 51a67fc7f0ef..868af8f435fa 100644
--- a/arch/arm/mach-mx5/mx51_efika.c
+++ b/arch/arm/mach-mx5/mx51_efika.c
@@ -572,8 +572,10 @@ static struct mc13xxx_regulator_init_data mx51_efika_regulators[] = {
 static struct mc13xxx_platform_data mx51_efika_mc13892_data = {
        .flags = MC13XXX_USE_RTC | MC13XXX_USE_REGULATOR,
-        .num_regulators = ARRAY_SIZE(mx51_efika_regulators),
+        .regulators = {
-        .regulators = mx51_efika_regulators,
+                .num_regulators = ARRAY_SIZE(mx51_efika_regulators),
+                .regulators = mx51_efika_regulators,
+        },
 };
 static struct spi_board_info mx51_efika_spi_board_info[] __initdata = {
diff --git a/arch/arm/mach-mxs/gpio.c b/arch/arm/mach-mxs/gpio.c
index 56fa2ed15222..2c950fef71a8 100644
--- a/arch/arm/mach-mxs/gpio.c
+++ b/arch/arm/mach-mxs/gpio.c
@@ -136,7 +136,7 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
 static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
 {
        u32 irq_stat;
-        struct mxs_gpio_port *port = (struct mxs_gpio_port *)get_irq_data(irq);
+        struct mxs_gpio_port *port = (struct mxs_gpio_port *)irq_get_handler_data(irq);
        u32 gpio_irq_no_base = port->virtual_irq_start;
        desc->irq_data.chip->irq_ack(&desc->irq_data);
@@ -265,14 +265,14 @@ int __init mxs_gpio_init(struct mxs_gpio_port *port, int cnt)
                for (j = port[i].virtual_irq_start;
                        j < port[i].virtual_irq_start + 32; j++) {
-                        set_irq_chip(j, &gpio_irq_chip);
+                        irq_set_chip_and_handler(j, &gpio_irq_chip,
-                        set_irq_handler(j, handle_level_irq);
+                                                 handle_level_irq);
                        set_irq_flags(j, IRQF_VALID);
                }
                /* setup one handler for each entry */
-                set_irq_chained_handler(port[i].irq, mxs_gpio_irq_handler);
+                irq_set_chained_handler(port[i].irq, mxs_gpio_irq_handler);
-                set_irq_data(port[i].irq, &port[i]);
+                irq_set_handler_data(port[i].irq, &port[i]);
                /* register gpio chip */
                port[i].chip.direction_input = mxs_gpio_direction_input;
diff --git a/arch/arm/mach-mxs/icoll.c b/arch/arm/mach-mxs/icoll.c
index 0f4c120fc169..23ca9d083b2c 100644
--- a/arch/arm/mach-mxs/icoll.c
+++ b/arch/arm/mach-mxs/icoll.c
@@ -74,8 +74,7 @@ void __init icoll_init_irq(void)
        mxs_reset_block(icoll_base + HW_ICOLL_CTRL);
        for (i = 0; i < MXS_INTERNAL_IRQS; i++) {
-                set_irq_chip(i, &mxs_icoll_chip);
+                irq_set_chip_and_handler(i, &mxs_icoll_chip, handle_level_irq);
-                set_irq_handler(i, handle_level_irq);
                set_irq_flags(i, IRQF_VALID);
        }
 }
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index 29ffa750fbe6..00023b5cf12b 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -171,13 +171,13 @@ void __init netx_init_irq(void)
        vic_init(__io(io_p2v(NETX_PA_VIC)), 0, ~0, 0);
        for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
-                set_irq_chip(irq, &netx_hif_chip);
+                irq_set_chip_and_handler(irq, &netx_hif_chip,
-                set_irq_handler(irq, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
        writel(NETX_DPMAS_INT_EN_GLB_EN, NETX_DPMAS_INT_EN);
-        set_irq_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler);
+        irq_set_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler);
 }
 static int __init netx_init(void)
diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
index 0c0d5248c368..e27687d53504 100644
--- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c
+++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c
@@ -107,8 +107,8 @@ void __init board_a9m9750dev_init_irq(void)
                                __func__);
        for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) {
-                set_irq_chip(i, &a9m9750dev_fpga_chip);
+                irq_set_chip_and_handler(i, &a9m9750dev_fpga_chip,
-                set_irq_handler(i, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(i, IRQF_VALID);
        }
@@ -118,8 +118,8 @@ void __init board_a9m9750dev_init_irq(void)
        REGSET(eic, SYS_EIC, LVEDG, LEVEL);
        __raw_writel(eic, SYS_EIC(2));
-        set_irq_chained_handler(IRQ_NS9XXX_EXT2,
+        irq_set_chained_handler(IRQ_NS9XXX_EXT2,
-                        a9m9750dev_fpga_demux_handler);
+                                a9m9750dev_fpga_demux_handler);
 }
 void __init board_a9m9750dev_init_machine(void)
diff --git a/arch/arm/mach-ns9xxx/include/mach/board.h b/arch/arm/mach-ns9xxx/include/mach/board.h
index f7e9196eb9ab..19ca6de46a45 100644
--- a/arch/arm/mach-ns9xxx/include/mach/board.h
+++ b/arch/arm/mach-ns9xxx/include/mach/board.h
@@ -14,12 +14,10 @@
 #include <asm/mach-types.h>
 #define board_is_a9m9750dev()   (0                      \
-                || machine_is_cc9p9360dev()             \
                || machine_is_cc9p9750dev()             \
                )
 #define board_is_a9mvali()      (0                      \
-                || machine_is_cc9p9360val()             \
                || machine_is_cc9p9750val()             \
                )
diff --git a/arch/arm/mach-ns9xxx/include/mach/module.h b/arch/arm/mach-ns9xxx/include/mach/module.h
index f851a6b7da6c..628e9752589b 100644
--- a/arch/arm/mach-ns9xxx/include/mach/module.h
+++ b/arch/arm/mach-ns9xxx/include/mach/module.h
@@ -18,7 +18,6 @@
                )
 #define module_is_cc9c()        (0                      \
-                || machine_is_cc9c()                    \
                )
 #define module_is_cc9p9210()    (0                      \
@@ -32,21 +31,17 @@
                )
 #define module_is_cc9p9360()    (0                      \
-                || machine_is_a9m9360()                 \
                || machine_is_cc9p9360dev()             \
                || machine_is_cc9p9360js()              \
-                || machine_is_cc9p9360val()             \
                )
 #define module_is_cc9p9750()    (0                      \
                || machine_is_a9m9750()                 \
-                || machine_is_cc9p9750dev()             \
                || machine_is_cc9p9750js()              \
                || machine_is_cc9p9750val()             \
                )
 #define module_is_ccw9c()       (0                      \
-                || machine_is_ccw9c()                   \
                )
 #define module_is_inc20otter()  (0                      \
diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c
index 389fa5c669de..37ab0a2b83ad 100644
--- a/arch/arm/mach-ns9xxx/irq.c
+++ b/arch/arm/mach-ns9xxx/irq.c
@@ -31,17 +31,11 @@ static void ns9xxx_mask_irq(struct irq_data *d)
        __raw_writel(ic, SYS_IC(prio / 4));
 }
-static void ns9xxx_ack_irq(struct irq_data *d)
+static void ns9xxx_eoi_irq(struct irq_data *d)
 {
        __raw_writel(0, SYS_ISRADDR);
 }
-static void ns9xxx_maskack_irq(struct irq_data *d)
-{
-        ns9xxx_mask_irq(d);
-        ns9xxx_ack_irq(d);
-}
 static void ns9xxx_unmask_irq(struct irq_data *d)
 {
        /* XXX: better use cpp symbols */
@@ -52,56 +46,11 @@ static void ns9xxx_unmask_irq(struct irq_data *d)
 }
 static struct irq_chip ns9xxx_chip = {
-        .irq_ack        = ns9xxx_ack_irq,
+        .irq_eoi        = ns9xxx_eoi_irq,
        .irq_mask       = ns9xxx_mask_irq,
-        .irq_mask_ack   = ns9xxx_maskack_irq,
        .irq_unmask     = ns9xxx_unmask_irq,
 };
-#if 0
-#define handle_irq handle_level_irq
-#else
-static void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
-{
-        struct irqaction *action;
-        irqreturn_t action_ret;
-        raw_spin_lock(&desc->lock);
-        BUG_ON(desc->status & IRQ_INPROGRESS);
-        desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
-        kstat_incr_irqs_this_cpu(irq, desc);
-        action = desc->action;
-        if (unlikely(!action || (desc->status & IRQ_DISABLED)))
-                goto out_mask;
-        desc->status |= IRQ_INPROGRESS;
-        raw_spin_unlock(&desc->lock);
-        action_ret = handle_IRQ_event(irq, action);
-        /* XXX: There is no direct way to access noirqdebug, so check
-         * unconditionally for spurious irqs...
-         * Maybe this function should go to kernel/irq/chip.c? */
-        note_interrupt(irq, desc, action_ret);
-        raw_spin_lock(&desc->lock);
-        desc->status &= ~IRQ_INPROGRESS;
-        if (desc->status & IRQ_DISABLED)
-out_mask:
-                desc->irq_data.chip->irq_mask(&desc->irq_data);
-        /* ack unconditionally to unmask lower prio irqs */
-        desc->irq_data.chip->irq_ack(&desc->irq_data);
-        raw_spin_unlock(&desc->lock);
-}
-#define handle_irq handle_prio_irq
-#endif
 void __init ns9xxx_init_irq(void)
 {
        int i;
@@ -118,8 +67,8 @@ void __init ns9xxx_init_irq(void)
                __raw_writel(prio2irq(i), SYS_IVA(i));
        for (i = 0; i <= 31; ++i) {
-                set_irq_chip(i, &ns9xxx_chip);
+                irq_set_chip_and_handler(i, &ns9xxx_chip, handle_fasteoi_irq);
-                set_irq_handler(i, handle_irq);
                set_irq_flags(i, IRQF_VALID);
+                irq_set_status_flags(i, IRQ_LEVEL);
        }
 }
diff --git a/arch/arm/mach-nuc93x/irq.c b/arch/arm/mach-nuc93x/irq.c
index 1f8a05a22834..aa279f23e342 100644
--- a/arch/arm/mach-nuc93x/irq.c
+++ b/arch/arm/mach-nuc93x/irq.c
@@ -59,8 +59,8 @@ void __init nuc93x_init_irq(void)
        __raw_writel(0xFFFFFFFE, REG_AIC_MDCR);
        for (irqno = IRQ_WDT; irqno <= NR_IRQS; irqno++) {
-                set_irq_chip(irqno, &nuc93x_irq_chip);
+                irq_set_chip_and_handler(irqno, &nuc93x_irq_chip,
-                set_irq_handler(irqno, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irqno, IRQF_VALID);
        }
 }
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 7c5e2112c776..e68dfde1918e 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -276,7 +276,7 @@ static void __init osk_init_cf(void)
                return;
        }
        /* the CF I/O IRQ is really active-low */
-        set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING);
+        irq_set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING);
 }
 static void __init osk_init_irq(void)
@@ -482,7 +482,7 @@ static void __init osk_mistral_init(void)
        omap_cfg_reg(P20_1610_GPIO4);   /* PENIRQ */
        gpio_request(4, "ts_int");
        gpio_direction_input(4);
-        set_irq_type(gpio_to_irq(4), IRQ_TYPE_EDGE_FALLING);
+        irq_set_irq_type(gpio_to_irq(4), IRQ_TYPE_EDGE_FALLING);
        spi_register_board_info(mistral_boardinfo,
                        ARRAY_SIZE(mistral_boardinfo));
@@ -500,7 +500,7 @@ static void __init osk_mistral_init(void)
                int irq = gpio_to_irq(OMAP_MPUIO(2));
                gpio_direction_input(OMAP_MPUIO(2));
-                set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
+                irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
 #ifdef  CONFIG_PM
                /* share the IRQ in case someone wants to use the
                 * button for more than wakeup from system sleep.
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index d7bbbe721a75..45f01d2c3a7a 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -256,12 +256,12 @@ palmz71_powercable(int irq, void *dev_id)
 {
        if (gpio_get_value(PALMZ71_USBDETECT_GPIO)) {
                printk(KERN_INFO "PM: Power cable connected\n");
-                set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO),
+                irq_set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO),
-                                IRQ_TYPE_EDGE_FALLING);
+                                 IRQ_TYPE_EDGE_FALLING);
        } else {
                printk(KERN_INFO "PM: Power cable disconnected\n");
-                set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO),
+                irq_set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO),
-                                IRQ_TYPE_EDGE_RISING);
+                                 IRQ_TYPE_EDGE_RISING);
        }
        return IRQ_HANDLED;
 }
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index bdc0ac8dc21f..65d24204937a 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -279,10 +279,10 @@ static void __init voiceblue_init(void)
        gpio_request(13, "16C554 irq");
        gpio_request(14, "16C554 irq");
        gpio_request(15, "16C554 irq");
-        set_irq_type(gpio_to_irq(12), IRQ_TYPE_EDGE_RISING);
+        irq_set_irq_type(gpio_to_irq(12), IRQ_TYPE_EDGE_RISING);
-        set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
+        irq_set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
-        set_irq_type(gpio_to_irq(14), IRQ_TYPE_EDGE_RISING);
+        irq_set_irq_type(gpio_to_irq(14), IRQ_TYPE_EDGE_RISING);
-        set_irq_type(gpio_to_irq(15), IRQ_TYPE_EDGE_RISING);
+        irq_set_irq_type(gpio_to_irq(15), IRQ_TYPE_EDGE_RISING);
        platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices));
        omap_board_config = voiceblue_config;
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 0ace7998aaa5..cddbf8b089ce 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -156,17 +156,17 @@ void omap1510_fpga_init_irq(void)
                         * The touchscreen interrupt is level-sensitive, so
                         * we'll use the regular mask_ack routine for it.
                         */
-                        set_irq_chip(i, &omap_fpga_irq_ack);
+                        irq_set_chip(i, &omap_fpga_irq_ack);
                }
                else {
                        /*
                         * All FPGA interrupts except the touchscreen are
                         * edge-sensitive, so we won't mask them.
                         */
-                        set_irq_chip(i, &omap_fpga_irq);
+                        irq_set_chip(i, &omap_fpga_irq);
                }
-                set_irq_handler(i, handle_edge_irq);
+                irq_set_handler(i, handle_edge_irq);
                set_irq_flags(i, IRQF_VALID);
        }
@@ -183,6 +183,6 @@ void omap1510_fpga_init_irq(void)
                return;
        }
        gpio_direction_input(13);
-        set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
+        irq_set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
-        set_irq_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux);
+        irq_set_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux);
 }
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index 731dd33bff51..5d3da7a63af3 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -230,8 +230,8 @@ void __init omap_init_irq(void)
                        irq_trigger = irq_banks[i].trigger_map >> IRQ_BIT(j);
                        omap_irq_set_cfg(j, 0, 0, irq_trigger);
-                        set_irq_chip(j, &omap_irq_chip);
+                        irq_set_chip_and_handler(j, &omap_irq_chip,
-                        set_irq_handler(j, handle_level_irq);
+                                                 handle_level_irq);
                        set_irq_flags(j, IRQF_VALID);
                }
        }
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 493505c3b2f5..130034bf01d5 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -743,7 +743,7 @@ static int __init gpmc_init(void)
        /* initalize the irq_chained */
        irq = OMAP_GPMC_IRQ_BASE;
        for (cs = 0; cs < GPMC_CS_NUM; cs++) {
-                set_irq_chip_and_handler(irq, &dummy_irq_chip,
+                irq_set_chip_and_handler(irq, &dummy_irq_chip,
                                                handle_simple_irq);
                set_irq_flags(irq, IRQF_VALID);
                irq++;
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index bc524b94fd59..237e4530abf2 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -223,8 +223,7 @@ void __init omap_init_irq(void)
               nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : "");
        for (i = 0; i < nr_of_irqs; i++) {
-                set_irq_chip(i, &omap_irq_chip);
+                irq_set_chip_and_handler(i, &omap_irq_chip, handle_level_irq);
-                set_irq_handler(i, handle_level_irq);
                set_irq_flags(i, IRQF_VALID);
        }
 }
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c
index c10a11715376..b7d4591214e0 100644
--- a/arch/arm/mach-orion5x/db88f5281-setup.c
+++ b/arch/arm/mach-orion5x/db88f5281-setup.c
@@ -213,7 +213,7 @@ void __init db88f5281_pci_preinit(void)
        pin = DB88F5281_PCI_SLOT0_IRQ_PIN;
        if (gpio_request(pin, "PCI Int1") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                        set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
+                        irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "db88f5281_pci_preinit faield to "
                                        "set_irq_type pin %d\n", pin);
@@ -226,7 +226,7 @@ void __init db88f5281_pci_preinit(void)
        pin = DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN;
        if (gpio_request(pin, "PCI Int2") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                        set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
+                        irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "db88f5281_pci_preinit faield "
                                        "to set_irq_type pin %d\n", pin);
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c
index ed85891f8699..43cf8bc9767b 100644
--- a/arch/arm/mach-orion5x/irq.c
+++ b/arch/arm/mach-orion5x/irq.c
@@ -34,8 +34,8 @@ void __init orion5x_init_irq(void)
         * Initialize gpiolib for GPIOs 0-31.
         */
        orion_gpio_init(0, 32, GPIO_VIRT_BASE, 0, IRQ_ORION5X_GPIO_START);
-        set_irq_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler);
-        set_irq_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler);
-        set_irq_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler);
-        set_irq_chained_handler(IRQ_ORION5X_GPIO_24_31, gpio_irq_handler);
+        irq_set_chained_handler(IRQ_ORION5X_GPIO_24_31, gpio_irq_handler);
 }
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index 67ec6959b267..4fc46772a087 100644
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -148,7 +148,7 @@ void __init rd88f5182_pci_preinit(void)
        pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN;
        if (gpio_request(pin, "PCI IntA") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                        set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
+                        irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "rd88f5182_pci_preinit faield to "
                                        "set_irq_type pin %d\n", pin);
@@ -161,7 +161,7 @@ void __init rd88f5182_pci_preinit(void)
        pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN;
        if (gpio_request(pin, "PCI IntB") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                        set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
+                        irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "rd88f5182_pci_preinit faield to "
                                        "set_irq_type pin %d\n", pin);
diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c
index 5653ee6c71d8..616004143912 100644
--- a/arch/arm/mach-orion5x/terastation_pro2-setup.c
+++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c
@@ -88,7 +88,7 @@ void __init tsp2_pci_preinit(void)
        pin = TSP2_PCI_SLOT0_IRQ_PIN;
        if (gpio_request(pin, "PCI Int1") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                        set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
+                        irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "tsp2_pci_preinit failed "
                                        "to set_irq_type pin %d\n", pin);
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index 8bbd27ea6735..f0f43e13ac87 100644
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -117,7 +117,7 @@ void __init qnap_ts209_pci_preinit(void)
        pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN;
        if (gpio_request(pin, "PCI Int1") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                        set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
+                        irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "qnap_ts209_pci_preinit failed to "
                                        "set_irq_type pin %d\n", pin);
@@ -131,7 +131,7 @@ void __init qnap_ts209_pci_preinit(void)
        pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN;
        if (gpio_request(pin, "PCI Int2") == 0) {
                if (gpio_direction_input(pin) == 0) {
-                        set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
+                        irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
                } else {
                        printk(KERN_ERR "qnap_ts209_pci_preinit failed "
                                        "to set_irq_type pin %d\n", pin);
diff --git a/arch/arm/mach-pnx4008/irq.c b/arch/arm/mach-pnx4008/irq.c
index c69c180aec76..7608c7a288cf 100644
--- a/arch/arm/mach-pnx4008/irq.c
+++ b/arch/arm/mach-pnx4008/irq.c
@@ -58,22 +58,22 @@ static int pnx4008_set_irq_type(struct irq_data *d, unsigned int type)
        case IRQ_TYPE_EDGE_RISING:
                __raw_writel(__raw_readl(INTC_ATR(d->irq)) | INTC_BIT(d->irq), INTC_ATR(d->irq));       /*edge sensitive */
                __raw_writel(__raw_readl(INTC_APR(d->irq)) | INTC_BIT(d->irq), INTC_APR(d->irq));       /*rising edge */
-                set_irq_handler(d->irq, handle_edge_irq);
+                irq_set_handler(d->irq, handle_edge_irq);
                break;
        case IRQ_TYPE_EDGE_FALLING:
                __raw_writel(__raw_readl(INTC_ATR(d->irq)) | INTC_BIT(d->irq), INTC_ATR(d->irq));       /*edge sensitive */
                __raw_writel(__raw_readl(INTC_APR(d->irq)) & ~INTC_BIT(d->irq), INTC_APR(d->irq));      /*falling edge */
-                set_irq_handler(d->irq, handle_edge_irq);
+                irq_set_handler(d->irq, handle_edge_irq);
                break;
        case IRQ_TYPE_LEVEL_LOW:
                __raw_writel(__raw_readl(INTC_ATR(d->irq)) & ~INTC_BIT(d->irq), INTC_ATR(d->irq));      /*level sensitive */
                __raw_writel(__raw_readl(INTC_APR(d->irq)) & ~INTC_BIT(d->irq), INTC_APR(d->irq));      /*low level */
-                set_irq_handler(d->irq, handle_level_irq);
+                irq_set_handler(d->irq, handle_level_irq);
                break;
        case IRQ_TYPE_LEVEL_HIGH:
                __raw_writel(__raw_readl(INTC_ATR(d->irq)) & ~INTC_BIT(d->irq), INTC_ATR(d->irq));      /*level sensitive */
                __raw_writel(__raw_readl(INTC_APR(d->irq)) | INTC_BIT(d->irq), INTC_APR(d->irq));       /* high level */
-                set_irq_handler(d->irq, handle_level_irq);
+                irq_set_handler(d->irq, handle_level_irq);
                break;
        /* IRQ_TYPE_EDGE_BOTH is not supported */
@@ -98,7 +98,7 @@ void __init pnx4008_init_irq(void)
        /* configure IRQ's */
        for (i = 0; i < NR_IRQS; i++) {
                set_irq_flags(i, IRQF_VALID);
-                set_irq_chip(i, &pnx4008_irq_chip);
+                irq_set_chip(i, &pnx4008_irq_chip);
                pnx4008_set_irq_type(irq_get_irq_data(i), pnx4008_irq_type[i]);
        }
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index d2af73321dae..38dea05df7f8 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -527,13 +527,13 @@ static void __init balloon3_init_irq(void)
        pxa27x_init_irq();
        /* setup extra Balloon3 irqs */
        for (irq = BALLOON3_IRQ(0); irq <= BALLOON3_IRQ(7); irq++) {
-                set_irq_chip(irq, &balloon3_irq_chip);
+                irq_set_chip_and_handler(irq, &balloon3_irq_chip,
-                set_irq_handler(irq, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
-        set_irq_chained_handler(BALLOON3_AUX_NIRQ, balloon3_irq_handler);
+        irq_set_chained_handler(BALLOON3_AUX_NIRQ, balloon3_irq_handler);
-        set_irq_type(BALLOON3_AUX_NIRQ, IRQ_TYPE_EDGE_FALLING);
+        irq_set_irq_type(BALLOON3_AUX_NIRQ, IRQ_TYPE_EDGE_FALLING);
        pr_debug("%s: chained handler installed - irq %d automatically "
                "enabled\n", __func__, BALLOON3_AUX_NIRQ);
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index a2380cd76f80..8b1a30959fae 100644
--- a/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -70,9 +70,10 @@ void __cmx2xx_pci_init_irq(int irq_gpio)
        cmx2xx_it8152_irq_gpio = irq_gpio;
-        set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING);
+        irq_set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING);
-        set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx2xx_it8152_irq_demux);
+        irq_set_chained_handler(gpio_to_irq(irq_gpio),
+                                cmx2xx_it8152_irq_demux);
 }
 #ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index bfca7ed2fea3..06d0a03f462d 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -765,7 +765,7 @@ static void __init cm_x300_init_da9030(void)
 {
        pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info);
        i2c_register_board_info(1, &cm_x300_pmic_info, 1);
-        set_irq_wake(IRQ_WAKEUP0, 1);
+        irq_set_irq_wake(IRQ_WAKEUP0, 1);
 }
 static void __init cm_x300_init_wi2wi(void)
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 2693e3c3776f..6251e3f5c62c 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -137,9 +137,9 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn)
        GEDR0 = 0x3;
        for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
-                set_irq_chip(irq, &pxa_low_gpio_chip);
+                irq_set_chip_and_handler(irq, &pxa_low_gpio_chip,
-                set_irq_chip_data(irq, irq_base(0));
+                                         handle_edge_irq);
-                set_irq_handler(irq, handle_edge_irq);
+                irq_set_chip_data(irq, irq_base(0));
                set_irq_flags(irq, IRQF_VALID);
        }
@@ -165,9 +165,9 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
                                __raw_writel(i | IPR_VALID, IRQ_BASE + IPR(i));
                        irq = PXA_IRQ(i);
-                        set_irq_chip(irq, &pxa_internal_irq_chip);
+                        irq_set_chip_and_handler(irq, &pxa_internal_irq_chip,
-                        set_irq_chip_data(irq, base);
+                                                 handle_level_irq);
-                        set_irq_handler(irq, handle_level_irq);
+                        irq_set_chip_data(irq, base);
                        set_irq_flags(irq, IRQF_VALID);
                }
        }
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index c9a3e775c2de..6307f70ae22a 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -149,12 +149,12 @@ static void __init lpd270_init_irq(void)
        /* setup extra LogicPD PXA270 irqs */
        for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
-                set_irq_chip(irq, &lpd270_irq_chip);
+                irq_set_chip_and_handler(irq, &lpd270_irq_chip,
-                set_irq_handler(irq, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
-        set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
+        irq_set_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
-        set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
+        irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
 }
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index dca20de306bb..0fea945dd6f2 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -165,13 +165,13 @@ static void __init lubbock_init_irq(void)
        /* setup extra lubbock irqs */
        for (irq = LUBBOCK_IRQ(0); irq <= LUBBOCK_LAST_IRQ; irq++) {
-                set_irq_chip(irq, &lubbock_irq_chip);
+                irq_set_chip_and_handler(irq, &lubbock_irq_chip,
-                set_irq_handler(irq, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
-        set_irq_chained_handler(IRQ_GPIO(0), lubbock_irq_handler);
+        irq_set_chained_handler(IRQ_GPIO(0), lubbock_irq_handler);
-        set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
+        irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
 }
 #ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index f9542220595a..29b6e7a94e11 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -166,8 +166,8 @@ static void __init mainstone_init_irq(void)
        /* setup extra Mainstone irqs */
        for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
-                set_irq_chip(irq, &mainstone_irq_chip);
+                irq_set_chip_and_handler(irq, &mainstone_irq_chip,
-                set_irq_handler(irq, handle_level_irq);
+                                         handle_level_irq);
                if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
                        set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
                else
@@ -179,8 +179,8 @@ static void __init mainstone_init_irq(void)
        MST_INTMSKENA = 0;
        MST_INTSETCLR = 0;
-        set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
+        irq_set_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
-        set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
+        irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
 }
 #ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 9dbf3ccd4150..4d0120540124 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -281,16 +281,16 @@ static void __init pcm990_init_irq(void)
        /* setup extra PCM990 irqs */
        for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) {
-                set_irq_chip(irq, &pcm990_irq_chip);
+                irq_set_chip_and_handler(irq, &pcm990_irq_chip,
-                set_irq_handler(irq, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
        PCM990_INTMSKENA = 0x00;        /* disable all Interrupts */
        PCM990_INTSETCLR = 0xFF;
-        set_irq_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
+        irq_set_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
-        set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
+        irq_set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
 }
 static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index f374247b8466..8dd107391157 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -362,8 +362,8 @@ static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
        int irq;
        for (irq = IRQ_WAKEUP0; irq <= IRQ_WAKEUP1; irq++) {
-                set_irq_chip(irq, &pxa_ext_wakeup_chip);
+                irq_set_chip_and_handler(irq, &pxa_ext_wakeup_chip,
-                set_irq_handler(irq, handle_edge_irq);
+                                         handle_edge_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 12279214c875..aa70331c0805 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -310,14 +310,14 @@ static void __init viper_init_irq(void)
        /* setup ISA IRQs */
        for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
                isa_irq = viper_bit_to_irq(level);
-                set_irq_chip(isa_irq, &viper_irq_chip);
+                irq_set_chip_and_handler(isa_irq, &viper_irq_chip,
-                set_irq_handler(isa_irq, handle_edge_irq);
+                                         handle_edge_irq);
                set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
        }
-        set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
+        irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
                                viper_irq_handler);
-        set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
+        irq_set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
 }
 /* Flat Panel */
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 730f51e57c17..139aa7f2ed90 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -136,22 +136,23 @@ static void __init zeus_init_irq(void)
        /* Peripheral IRQs. It would be nice to move those inside driver
           configuration, but it is not supported at the moment. */
-        set_irq_type(gpio_to_irq(ZEUS_AC97_GPIO),       IRQ_TYPE_EDGE_RISING);
+        irq_set_irq_type(gpio_to_irq(ZEUS_AC97_GPIO), IRQ_TYPE_EDGE_RISING);
-        set_irq_type(gpio_to_irq(ZEUS_WAKEUP_GPIO),     IRQ_TYPE_EDGE_RISING);
+        irq_set_irq_type(gpio_to_irq(ZEUS_WAKEUP_GPIO), IRQ_TYPE_EDGE_RISING);
-        set_irq_type(gpio_to_irq(ZEUS_PTT_GPIO),        IRQ_TYPE_EDGE_RISING);
+        irq_set_irq_type(gpio_to_irq(ZEUS_PTT_GPIO), IRQ_TYPE_EDGE_RISING);
-        set_irq_type(gpio_to_irq(ZEUS_EXTGPIO_GPIO),    IRQ_TYPE_EDGE_FALLING);
+        irq_set_irq_type(gpio_to_irq(ZEUS_EXTGPIO_GPIO),
-        set_irq_type(gpio_to_irq(ZEUS_CAN_GPIO),        IRQ_TYPE_EDGE_FALLING);
+                         IRQ_TYPE_EDGE_FALLING);
+        irq_set_irq_type(gpio_to_irq(ZEUS_CAN_GPIO), IRQ_TYPE_EDGE_FALLING);
        /* Setup ISA IRQs */
        for (level = 0; level < ARRAY_SIZE(zeus_isa_irqs); level++) {
                isa_irq = zeus_bit_to_irq(level);
-                set_irq_chip(isa_irq, &zeus_irq_chip);
+                irq_set_chip_and_handler(isa_irq, &zeus_irq_chip,
-                set_irq_handler(isa_irq, handle_edge_irq);
+                                         handle_edge_irq);
                set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
        }
-        set_irq_type(gpio_to_irq(ZEUS_ISA_GPIO), IRQ_TYPE_EDGE_RISING);
+        irq_set_irq_type(gpio_to_irq(ZEUS_ISA_GPIO), IRQ_TYPE_EDGE_RISING);
-        set_irq_chained_handler(gpio_to_irq(ZEUS_ISA_GPIO), zeus_irq_handler);
+        irq_set_chained_handler(gpio_to_irq(ZEUS_ISA_GPIO), zeus_irq_handler);
 }
diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c
index d29cd9b737fc..2e1b5309fbab 100644
--- a/arch/arm/mach-rpc/irq.c
+++ b/arch/arm/mach-rpc/irq.c
@@ -133,25 +133,25 @@ void __init rpc_init_irq(void)
                switch (irq) {
                case 0 ... 7:
-                        set_irq_chip(irq, &iomd_a_chip);
+                        irq_set_chip_and_handler(irq, &iomd_a_chip,
-                        set_irq_handler(irq, handle_level_irq);
+                                                 handle_level_irq);
                        set_irq_flags(irq, flags);
                        break;
                case 8 ... 15:
-                        set_irq_chip(irq, &iomd_b_chip);
+                        irq_set_chip_and_handler(irq, &iomd_b_chip,
-                        set_irq_handler(irq, handle_level_irq);
+                                                 handle_level_irq);
                        set_irq_flags(irq, flags);
                        break;
                case 16 ... 21:
-                        set_irq_chip(irq, &iomd_dma_chip);
+                        irq_set_chip_and_handler(irq, &iomd_dma_chip,
-                        set_irq_handler(irq, handle_level_irq);
+                                                 handle_level_irq);
                        set_irq_flags(irq, flags);
                        break;
                case 64 ... 71:
-                        set_irq_chip(irq, &iomd_fiq_chip);
+                        irq_set_chip(irq, &iomd_fiq_chip);
                        set_irq_flags(irq, IRQF_VALID);
                        break;
                }
diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c
index 606cb6b1cc47..bc53d2d16d1a 100644
--- a/arch/arm/mach-s3c2410/bast-irq.c
+++ b/arch/arm/mach-s3c2410/bast-irq.c
@@ -147,15 +147,15 @@ static __init int bast_irq_init(void)
                __raw_writeb(0x0, BAST_VA_PC104_IRQMASK);
-                set_irq_chained_handler(IRQ_ISA, bast_irq_pc104_demux);
+                irq_set_chained_handler(IRQ_ISA, bast_irq_pc104_demux);
                /* register our IRQs */
                for (i = 0; i < 4; i++) {
                        unsigned int irqno = bast_pc104_irqs[i];
-                        set_irq_chip(irqno, &bast_pc104_chip);
+                        irq_set_chip_and_handler(irqno, &bast_pc104_chip,
-                        set_irq_handler(irqno, handle_level_irq);
+                                                 handle_level_irq);
                        set_irq_flags(irqno, IRQF_VALID);
                }
        }
diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c
index eddb52ba5b65..f3355d2ec634 100644
--- a/arch/arm/mach-s3c2412/irq.c
+++ b/arch/arm/mach-s3c2412/irq.c
@@ -175,18 +175,18 @@ static int s3c2412_irq_add(struct sys_device *sysdev)
        unsigned int irqno;
        for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) {
-                set_irq_chip(irqno, &s3c2412_irq_eint0t4);
+                irq_set_chip_and_handler(irqno, &s3c2412_irq_eint0t4,
-                set_irq_handler(irqno, handle_edge_irq);
+                                         handle_edge_irq);
                set_irq_flags(irqno, IRQF_VALID);
        }
        /* add demux support for CF/SDI */
-        set_irq_chained_handler(IRQ_S3C2412_CFSDI, s3c2412_irq_demux_cfsdi);
+        irq_set_chained_handler(IRQ_S3C2412_CFSDI, s3c2412_irq_demux_cfsdi);
        for (irqno = IRQ_S3C2412_SDI; irqno <= IRQ_S3C2412_CF; irqno++) {
-                set_irq_chip(irqno, &s3c2412_irq_cfsdi);
+                irq_set_chip_and_handler(irqno, &s3c2412_irq_cfsdi,
-                set_irq_handler(irqno, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irqno, IRQF_VALID);
        }
@@ -195,7 +195,7 @@ static int s3c2412_irq_add(struct sys_device *sysdev)
        s3c2412_irq_rtc_chip = s3c_irq_chip;
        s3c2412_irq_rtc_chip.irq_set_wake = s3c2412_irq_rtc_wake;
-        set_irq_chip(IRQ_RTC, &s3c2412_irq_rtc_chip);
+        irq_set_chip(IRQ_RTC, &s3c2412_irq_rtc_chip);
        return 0;
 }
diff --git a/arch/arm/mach-s3c2416/irq.c b/arch/arm/mach-s3c2416/irq.c
index 680fe386aca5..77b38f2381c1 100644
--- a/arch/arm/mach-s3c2416/irq.c
+++ b/arch/arm/mach-s3c2416/irq.c
@@ -202,13 +202,11 @@ static int __init s3c2416_add_sub(unsigned int base,
 {
        unsigned int irqno;
-        set_irq_chip(base, &s3c_irq_level_chip);
+        irq_set_chip_and_handler(base, &s3c_irq_level_chip, handle_level_irq);
-        set_irq_handler(base, handle_level_irq);
+        irq_set_chained_handler(base, demux);
-        set_irq_chained_handler(base, demux);
        for (irqno = start; irqno <= end; irqno++) {
-                set_irq_chip(irqno, chip);
+                irq_set_chip_and_handler(irqno, chip, handle_level_irq);
-                set_irq_handler(irqno, handle_level_irq);
                set_irq_flags(irqno, IRQF_VALID);
        }
diff --git a/arch/arm/mach-s3c2440/irq.c b/arch/arm/mach-s3c2440/irq.c
index acad4428bef0..eb1cc0f0705e 100644
--- a/arch/arm/mach-s3c2440/irq.c
+++ b/arch/arm/mach-s3c2440/irq.c
@@ -100,13 +100,13 @@ static int s3c2440_irq_add(struct sys_device *sysdev)
        /* add new chained handler for wdt, ac7 */
-        set_irq_chip(IRQ_WDT, &s3c_irq_level_chip);
+        irq_set_chip_and_handler(IRQ_WDT, &s3c_irq_level_chip,
-        set_irq_handler(IRQ_WDT, handle_level_irq);
+                                 handle_level_irq);
-        set_irq_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97);
+        irq_set_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97);
        for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) {
-                set_irq_chip(irqno, &s3c_irq_wdtac97);
+                irq_set_chip_and_handler(irqno, &s3c_irq_wdtac97,
-                set_irq_handler(irqno, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irqno, IRQF_VALID);
        }
diff --git a/arch/arm/mach-s3c2440/s3c244x-irq.c b/arch/arm/mach-s3c2440/s3c244x-irq.c
index 83daf4ece764..de07c2feaa32 100644
--- a/arch/arm/mach-s3c2440/s3c244x-irq.c
+++ b/arch/arm/mach-s3c2440/s3c244x-irq.c
@@ -95,19 +95,19 @@ static int s3c244x_irq_add(struct sys_device *sysdev)
 {
        unsigned int irqno;
-        set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip);
+        irq_set_chip_and_handler(IRQ_NFCON, &s3c_irq_level_chip,
-        set_irq_handler(IRQ_NFCON, handle_level_irq);
+                                 handle_level_irq);
        set_irq_flags(IRQ_NFCON, IRQF_VALID);
        /* add chained handler for camera */
-        set_irq_chip(IRQ_CAM, &s3c_irq_level_chip);
+        irq_set_chip_and_handler(IRQ_CAM, &s3c_irq_level_chip,
-        set_irq_handler(IRQ_CAM, handle_level_irq);
+                                 handle_level_irq);
-        set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
+        irq_set_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
        for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
-                set_irq_chip(irqno, &s3c_irq_cam);
+                irq_set_chip_and_handler(irqno, &s3c_irq_cam,
-                set_irq_handler(irqno, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irqno, IRQF_VALID);
        }
diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c
index c7820f9c1352..83ecb1173fb1 100644
--- a/arch/arm/mach-s3c2443/irq.c
+++ b/arch/arm/mach-s3c2443/irq.c
@@ -230,13 +230,11 @@ static int __init s3c2443_add_sub(unsigned int base,
 {
        unsigned int irqno;
-        set_irq_chip(base, &s3c_irq_level_chip);
+        irq_set_chip_and_handler(base, &s3c_irq_level_chip, handle_level_irq);
-        set_irq_handler(base, handle_level_irq);
+        irq_set_chained_handler(base, demux);
-        set_irq_chained_handler(base, demux);
        for (irqno = start; irqno <= end; irqno++) {
-                set_irq_chip(irqno, chip);
+                irq_set_chip_and_handler(irqno, chip, handle_level_irq);
-                set_irq_handler(irqno, handle_level_irq);
                set_irq_flags(irqno, IRQF_VALID);
        }
diff --git a/arch/arm/mach-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/irq-eint.c
index 2ead8189da74..4d203be1f4c3 100644
--- a/arch/arm/mach-s3c64xx/irq-eint.c
+++ b/arch/arm/mach-s3c64xx/irq-eint.c
@@ -197,16 +197,15 @@ static int __init s3c64xx_init_irq_eint(void)
        int irq;
        for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) {
-                set_irq_chip(irq, &s3c_irq_eint);
+                irq_set_chip_and_handler(irq, &s3c_irq_eint, handle_level_irq);
-                set_irq_chip_data(irq, (void *)eint_irq_to_bit(irq));
+                irq_set_chip_data(irq, (void *)eint_irq_to_bit(irq));
-                set_irq_handler(irq, handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
-        set_irq_chained_handler(IRQ_EINT0_3, s3c_irq_demux_eint0_3);
+        irq_set_chained_handler(IRQ_EINT0_3, s3c_irq_demux_eint0_3);
-        set_irq_chained_handler(IRQ_EINT4_11, s3c_irq_demux_eint4_11);
+        irq_set_chained_handler(IRQ_EINT4_11, s3c_irq_demux_eint4_11);
-        set_irq_chained_handler(IRQ_EINT12_19, s3c_irq_demux_eint12_19);
+        irq_set_chained_handler(IRQ_EINT12_19, s3c_irq_demux_eint12_19);
-        set_irq_chained_handler(IRQ_EINT20_27, s3c_irq_demux_eint20_27);
+        irq_set_chained_handler(IRQ_EINT20_27, s3c_irq_demux_eint20_27);
        return 0;
 }
diff --git a/arch/arm/mach-s5p64x0/cpu.c b/arch/arm/mach-s5p64x0/cpu.c
index b8d02eb4cf30..a5c00952ea35 100644
--- a/arch/arm/mach-s5p64x0/cpu.c
+++ b/arch/arm/mach-s5p64x0/cpu.c
@@ -119,7 +119,7 @@ void __init s5p6450_map_io(void)
        s3c_adc_setname("s3c64xx-adc");
        iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
-        iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6440_iodesc));
+        iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
 }
 /*
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index 26710b35ef87..b9f9ec33384d 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -99,9 +99,9 @@
 #define IRQ_TC                  IRQ_PENDN
 #define IRQ_KEYPAD              S5P_IRQ_VIC2(25)
 #define IRQ_CG                  S5P_IRQ_VIC2(26)
-#define IRQ_SEC                 S5P_IRQ_VIC2(27)
+#define IRQ_SSS_INT             S5P_IRQ_VIC2(27)
-#define IRQ_SECRX               S5P_IRQ_VIC2(28)
+#define IRQ_SSS_HASH            S5P_IRQ_VIC2(28)
-#define IRQ_SECTX               S5P_IRQ_VIC2(29)
+#define IRQ_PCM2                S5P_IRQ_VIC2(29)
 #define IRQ_SDMIRQ              S5P_IRQ_VIC2(30)
 #define IRQ_SDMFIQ              S5P_IRQ_VIC2(31)
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index bc08ac42e7cc..c6a9e86c2d5c 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -44,7 +44,6 @@
 #include <plat/keypad.h>
 #include <plat/pm.h>
 #include <plat/fb.h>
-#include <plat/gpio-cfg.h>
 #include <plat/s5p-time.h>
 /* Following are default values for UCON, ULCON and UFCON UART registers */
diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c
index 98d780608c7e..7f3da4b11ec9 100644
--- a/arch/arm/mach-sa1100/cerf.c
+++ b/arch/arm/mach-sa1100/cerf.c
@@ -96,7 +96,7 @@ static struct resource cerf_flash_resource = {
 static void __init cerf_init_irq(void)
 {
        sa1100_init_irq();
-        set_irq_type(CERF_ETH_IRQ, IRQ_TYPE_EDGE_RISING);
+        irq_set_irq_type(CERF_ETH_IRQ, IRQ_TYPE_EDGE_RISING);
 }
 static struct map_desc cerf_io_desc[] __initdata = {
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c
index 3d85dfad9c1f..423ddb3d65e9 100644
--- a/arch/arm/mach-sa1100/irq.c
+++ b/arch/arm/mach-sa1100/irq.c
@@ -323,28 +323,28 @@ void __init sa1100_init_irq(void)
        ICCR = 1;
        for (irq = 0; irq <= 10; irq++) {
-                set_irq_chip(irq, &sa1100_low_gpio_chip);
+                irq_set_chip_and_handler(irq, &sa1100_low_gpio_chip,
-                set_irq_handler(irq, handle_edge_irq);
+                                         handle_edge_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
        for (irq = 12; irq <= 31; irq++) {
-                set_irq_chip(irq, &sa1100_normal_chip);
+                irq_set_chip_and_handler(irq, &sa1100_normal_chip,
-                set_irq_handler(irq, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
        for (irq = 32; irq <= 48; irq++) {
-                set_irq_chip(irq, &sa1100_high_gpio_chip);
+                irq_set_chip_and_handler(irq, &sa1100_high_gpio_chip,
-                set_irq_handler(irq, handle_edge_irq);
+                                         handle_edge_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
        /*
         * Install handler for GPIO 11-27 edge detect interrupts
         */
-        set_irq_chip(IRQ_GPIO11_27, &sa1100_normal_chip);
+        irq_set_chip(IRQ_GPIO11_27, &sa1100_normal_chip);
-        set_irq_chained_handler(IRQ_GPIO11_27, sa1100_high_gpio_handler);
+        irq_set_chained_handler(IRQ_GPIO11_27, sa1100_high_gpio_handler);
        sa1100_init_gpio();
 }
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 4aad01f73660..b4fa53a1427e 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -145,8 +145,8 @@ static int __devinit neponset_probe(struct platform_device *dev)
        /*
         * Install handler for GPIO25.
         */
-        set_irq_type(IRQ_GPIO25, IRQ_TYPE_EDGE_RISING);
+        irq_set_irq_type(IRQ_GPIO25, IRQ_TYPE_EDGE_RISING);
-        set_irq_chained_handler(IRQ_GPIO25, neponset_irq_handler);
+        irq_set_chained_handler(IRQ_GPIO25, neponset_irq_handler);
        /*
         * We would set IRQ_GPIO25 to be a wake-up IRQ, but
@@ -161,9 +161,9 @@ static int __devinit neponset_probe(struct platform_device *dev)
         * Setup other Neponset IRQs.  SA1111 will be done by the
         * generic SA1111 code.
         */
-        set_irq_handler(IRQ_NEPONSET_SMC9196, handle_simple_irq);
+        irq_set_handler(IRQ_NEPONSET_SMC9196, handle_simple_irq);
        set_irq_flags(IRQ_NEPONSET_SMC9196, IRQF_VALID | IRQF_PROBE);
-        set_irq_handler(IRQ_NEPONSET_USAR, handle_simple_irq);
+        irq_set_handler(IRQ_NEPONSET_USAR, handle_simple_irq);
        set_irq_flags(IRQ_NEPONSET_USAR, IRQF_VALID | IRQF_PROBE);
        /*
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
index 42b80400c100..65161f2bea29 100644
--- a/arch/arm/mach-sa1100/pleb.c
+++ b/arch/arm/mach-sa1100/pleb.c
@@ -142,7 +142,7 @@ static void __init pleb_map_io(void)
        GPDR &= ~GPIO_ETH0_IRQ;
-        set_irq_type(GPIO_ETH0_IRQ, IRQ_TYPE_EDGE_FALLING);
+        irq_set_irq_type(GPIO_ETH0_IRQ, IRQ_TYPE_EDGE_FALLING);
 }
 MACHINE_START(PLEB, "PLEB")
diff --git a/arch/arm/mach-shark/irq.c b/arch/arm/mach-shark/irq.c
index 831fc66dfa4d..5dce13e429f3 100644
--- a/arch/arm/mach-shark/irq.c
+++ b/arch/arm/mach-shark/irq.c
@@ -80,8 +80,7 @@ void __init shark_init_irq(void)
        int irq;
        for (irq = 0; irq < NR_IRQS; irq++) {
-                set_irq_chip(irq, &fb_chip);
+                irq_set_chip_and_handler(irq, &fb_chip, handle_edge_irq);
-                set_irq_handler(irq, handle_edge_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index a94f29da5d30..783b66fa95fb 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -24,9 +24,9 @@
 #include <linux/irq.h>
 #include <linux/platform_device.h>
 #include <linux/delay.h>
-#include <linux/mfd/sh_mobile_sdhi.h>
 #include <linux/mfd/tmio.h>
 #include <linux/mmc/host.h>
+#include <linux/mmc/sh_mobile_sdhi.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
@@ -312,7 +312,7 @@ static struct resource sdhi0_resources[] = {
        [0] = {
                .name   = "SDHI0",
                .start  = 0xe6850000,
-                .end    = 0xe68501ff,
+                .end    = 0xe68500ff,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
@@ -345,7 +345,7 @@ static struct resource sdhi1_resources[] = {
        [0] = {
                .name   = "SDHI1",
                .start  = 0xe6860000,
-                .end    = 0xe68601ff,
+                .end    = 0xe68600ff,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
@@ -1255,7 +1255,7 @@ static void __init ap4evb_init(void)
        gpio_request(GPIO_FN_KEYIN4,     NULL);
        /* enable TouchScreen */
-        set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
        tsc_device.irq = IRQ28;
        i2c_register_board_info(1, &tsc_device, 1);
@@ -1311,7 +1311,7 @@ static void __init ap4evb_init(void)
        lcdc_info.ch[0].lcd_size_cfg.height     = 91;
        /* enable TouchScreen */
-        set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
        tsc_device.irq = IRQ7;
        i2c_register_board_info(0, &tsc_device, 1);
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c
index dee3e9231fb9..c87a7b7c5832 100644
--- a/arch/arm/mach-shmobile/board-g4evm.c
+++ b/arch/arm/mach-shmobile/board-g4evm.c
@@ -31,7 +31,7 @@
 #include <linux/input.h>
 #include <linux/input/sh_keysc.h>
 #include <linux/mmc/host.h>
-#include <linux/mfd/sh_mobile_sdhi.h>
+#include <linux/mmc/sh_mobile_sdhi.h>
 #include <linux/gpio.h>
 #include <mach/sh7377.h>
 #include <mach/common.h>
@@ -205,7 +205,7 @@ static struct resource sdhi0_resources[] = {
        [0] = {
                .name   = "SDHI0",
                .start  = 0xe6d50000,
-                .end    = 0xe6d501ff,
+                .end    = 0xe6d50nff,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
@@ -232,7 +232,7 @@ static struct resource sdhi1_resources[] = {
        [0] = {
                .name   = "SDHI1",
                .start  = 0xe6d60000,
-                .end    = 0xe6d601ff,
+                .end    = 0xe6d600ff,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 49bc07482179..8184d4d4f234 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -32,10 +32,10 @@
 #include <linux/io.h>
 #include <linux/i2c.h>
 #include <linux/leds.h>
-#include <linux/mfd/sh_mobile_sdhi.h>
 #include <linux/mfd/tmio.h>
 #include <linux/mmc/host.h>
 #include <linux/mmc/sh_mmcif.h>
+#include <linux/mmc/sh_mobile_sdhi.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
@@ -690,7 +690,7 @@ static struct resource sdhi0_resources[] = {
        [0] = {
                .name   = "SDHI0",
                .start  = 0xe6850000,
-                .end    = 0xe68501ff,
+                .end    = 0xe68500ff,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
@@ -725,7 +725,7 @@ static struct resource sdhi1_resources[] = {
        [0] = {
                .name   = "SDHI1",
                .start  = 0xe6860000,
-                .end    = 0xe68601ff,
+                .end    = 0xe68600ff,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
@@ -768,7 +768,7 @@ static struct resource sdhi2_resources[] = {
        [0] = {
                .name   = "SDHI2",
                .start  = 0xe6870000,
-                .end    = 0xe68701ff,
+                .end    = 0xe68700ff,
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
@@ -1124,15 +1124,15 @@ static void __init mackerel_init(void)
        /* enable Keypad */
        gpio_request(GPIO_FN_IRQ9_42,   NULL);
-        set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH);
+        irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH);
        /* enable Touchscreen */
        gpio_request(GPIO_FN_IRQ7_40,   NULL);
-        set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
+        irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
        /* enable Accelerometer */
        gpio_request(GPIO_FN_IRQ21,     NULL);
-        set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
+        irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
        /* enable SDHI0 */
        gpio_request(GPIO_FN_SDHICD0, NULL);
diff --git a/arch/arm/mach-shmobile/intc-sh7367.c b/arch/arm/mach-shmobile/intc-sh7367.c
index 2fe9704d5ea1..cc442d198cdc 100644
--- a/arch/arm/mach-shmobile/intc-sh7367.c
+++ b/arch/arm/mach-shmobile/intc-sh7367.c
@@ -421,7 +421,7 @@ static struct intc_desc intcs_desc __initdata = {
 static void intcs_demux(unsigned int irq, struct irq_desc *desc)
 {
-        void __iomem *reg = (void *)get_irq_data(irq);
+        void __iomem *reg = (void *)irq_get_handler_data(irq);
        unsigned int evtcodeas = ioread32(reg);
        generic_handle_irq(intcs_evt2irq(evtcodeas));
@@ -435,6 +435,6 @@ void __init sh7367_init_irq(void)
        register_intc_controller(&intcs_desc);
        /* demux using INTEVTSA */
-        set_irq_data(evt2irq(0xf80), (void *)intevtsa);
+        irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa);
-        set_irq_chained_handler(evt2irq(0xf80), intcs_demux);
+        irq_set_chained_handler(evt2irq(0xf80), intcs_demux);
 }
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index ca5f9d17b39a..7a4960f9c1e3 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -601,7 +601,7 @@ static struct intc_desc intcs_desc __initdata = {
 static void intcs_demux(unsigned int irq, struct irq_desc *desc)
 {
-        void __iomem *reg = (void *)get_irq_data(irq);
+        void __iomem *reg = (void *)irq_get_handler_data(irq);
        unsigned int evtcodeas = ioread32(reg);
        generic_handle_irq(intcs_evt2irq(evtcodeas));
@@ -615,6 +615,6 @@ void __init sh7372_init_irq(void)
        register_intc_controller(&intcs_desc);
        /* demux using INTEVTSA */
-        set_irq_data(evt2irq(0xf80), (void *)intevtsa);
+        irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa);
-        set_irq_chained_handler(evt2irq(0xf80), intcs_demux);
+        irq_set_chained_handler(evt2irq(0xf80), intcs_demux);
 }
diff --git a/arch/arm/mach-shmobile/intc-sh7377.c b/arch/arm/mach-shmobile/intc-sh7377.c
index dd568382cc9f..fe45154ce660 100644
--- a/arch/arm/mach-shmobile/intc-sh7377.c
+++ b/arch/arm/mach-shmobile/intc-sh7377.c
@@ -626,7 +626,7 @@ static struct intc_desc intcs_desc __initdata = {
 static void intcs_demux(unsigned int irq, struct irq_desc *desc)
 {
-        void __iomem *reg = (void *)get_irq_data(irq);
+        void __iomem *reg = (void *)irq_get_handler_data(irq);
        unsigned int evtcodeas = ioread32(reg);
        generic_handle_irq(intcs_evt2irq(evtcodeas));
@@ -641,6 +641,6 @@ void __init sh7377_init_irq(void)
        register_intc_controller(&intcs_desc);
        /* demux using INTEVTSA */
-        set_irq_data(evt2irq(INTCS_INTVECT), (void *)intevtsa);
+        irq_set_handler_data(evt2irq(INTCS_INTVECT), (void *)intevtsa);
-        set_irq_chained_handler(evt2irq(INTCS_INTVECT), intcs_demux);
+        irq_set_chained_handler(evt2irq(INTCS_INTVECT), intcs_demux);
 }
diff --git a/arch/arm/mach-tcc8k/irq.c b/arch/arm/mach-tcc8k/irq.c
index aa9231f4fc6e..209fa5c65d4c 100644
--- a/arch/arm/mach-tcc8k/irq.c
+++ b/arch/arm/mach-tcc8k/irq.c
@@ -102,10 +102,10 @@ void __init tcc8k_init_irq(void)
        for (irqno = 0; irqno < NR_IRQS; irqno++) {
                if (irqno < 32)
-                        set_irq_chip(irqno, &tcc8000_irq_chip0);
+                        irq_set_chip(irqno, &tcc8000_irq_chip0);
                else
-                        set_irq_chip(irqno, &tcc8000_irq_chip1);
+                        irq_set_chip(irqno, &tcc8000_irq_chip1);
-                set_irq_handler(irqno, handle_level_irq);
+                irq_set_handler(irqno, handle_level_irq);
                set_irq_flags(irqno, IRQF_VALID);
        }
 }
diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c
index 12090a2cf3e0..76a3f654220f 100644
--- a/arch/arm/mach-tegra/gpio.c
+++ b/arch/arm/mach-tegra/gpio.c
@@ -208,9 +208,9 @@ static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type)
        spin_unlock_irqrestore(&bank->lvl_lock[port], flags);
        if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
-                __set_irq_handler_unlocked(d->irq, handle_level_irq);
+                __irq_set_handler_locked(d->irq, handle_level_irq);
        else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
-                __set_irq_handler_unlocked(d->irq, handle_edge_irq);
+                __irq_set_handler_locked(d->irq, handle_edge_irq);
        return 0;
 }
@@ -224,7 +224,7 @@ static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
        desc->irq_data.chip->irq_ack(&desc->irq_data);
-        bank = get_irq_data(irq);
+        bank = irq_get_handler_data(irq);
        for (port = 0; port < 4; port++) {
                int gpio = tegra_gpio_compose(bank->bank, port, 0);
@@ -275,13 +275,6 @@ void tegra_gpio_resume(void)
        }
        local_irq_restore(flags);
-        for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) {
-                struct irq_desc *desc = irq_to_desc(i);
-                if (!desc || (desc->status & IRQ_WAKEUP))
-                        continue;
-                enable_irq(i);
-        }
 }
 void tegra_gpio_suspend(void)
@@ -289,18 +282,6 @@ void tegra_gpio_suspend(void)
        unsigned long flags;
        int b, p, i;
-        for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) {
-                struct irq_desc *desc = irq_to_desc(i);
-                if (!desc)
-                        continue;
-                if (desc->status & IRQ_WAKEUP) {
-                        int gpio = i - INT_GPIO_BASE;
-                        pr_debug("gpio %d.%d is wakeup\n", gpio/8, gpio&7);
-                        continue;
-                }
-                disable_irq(i);
-        }
        local_irq_save(flags);
        for (b = 0; b < ARRAY_SIZE(tegra_gpio_banks); b++) {
                struct tegra_gpio_bank *bank = &tegra_gpio_banks[b];
@@ -320,7 +301,7 @@ void tegra_gpio_suspend(void)
 static int tegra_gpio_wake_enable(struct irq_data *d, unsigned int enable)
 {
        struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d);
-        return set_irq_wake(bank->irq, enable);
+        return irq_set_irq_wake(bank->irq, enable);
 }
 #endif
@@ -359,18 +340,18 @@ static int __init tegra_gpio_init(void)
        for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) {
                bank = &tegra_gpio_banks[GPIO_BANK(irq_to_gpio(i))];
-                lockdep_set_class(&irq_desc[i].lock, &gpio_lock_class);
+                irq_set_lockdep_class(i, &gpio_lock_class);
-                set_irq_chip_data(i, bank);
+                irq_set_chip_data(i, bank);
-                set_irq_chip(i, &tegra_gpio_irq_chip);
+                irq_set_chip_and_handler(i, &tegra_gpio_irq_chip,
-                set_irq_handler(i, handle_simple_irq);
+                                         handle_simple_irq);
                set_irq_flags(i, IRQF_VALID);
        }
        for (i = 0; i < ARRAY_SIZE(tegra_gpio_banks); i++) {
                bank = &tegra_gpio_banks[i];
-                set_irq_chained_handler(bank->irq, tegra_gpio_irq_handler);
+                irq_set_chained_handler(bank->irq, tegra_gpio_irq_handler);
-                set_irq_data(bank->irq, bank);
+                irq_set_handler_data(bank->irq, bank);
                for (j = 0; j < 4; j++)
                        spin_lock_init(&bank->lvl_lock[j]);
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
index dfbc219ea492..4330d8995b27 100644
--- a/arch/arm/mach-tegra/irq.c
+++ b/arch/arm/mach-tegra/irq.c
@@ -144,7 +144,7 @@ void __init tegra_init_irq(void)
        gic_init(0, 29, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE),
                 IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
-        gic = get_irq_chip(29);
+        gic = irq_get_chip(29);
        tegra_gic_unmask_irq = gic->irq_unmask;
        tegra_gic_mask_irq = gic->irq_mask;
        tegra_gic_ack_irq = gic->irq_ack;
@@ -154,8 +154,7 @@ void __init tegra_init_irq(void)
        for (i = 0; i < INT_MAIN_NR; i++) {
                irq = INT_PRI_BASE + i;
-                set_irq_chip(irq, &tegra_irq);
+                irq_set_chip_and_handler(irq, &tegra_irq, handle_level_irq);
-                set_irq_handler(irq, handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
 }
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 203b986280f5..58626013aa32 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -23,6 +23,7 @@ menu "Ux500 target platform"
 config MACH_U8500
        bool "U8500 Development platform"
        depends on UX500_SOC_DB8500
+        select TPS6105X
        help
          Include support for the mop500 development platform.
diff --git a/arch/arm/mach-ux500/board-mop500-regulators.c b/arch/arm/mach-ux500/board-mop500-regulators.c
index 875c91b2f8a4..9ed0f90cfe23 100644
--- a/arch/arm/mach-ux500/board-mop500-regulators.c
+++ b/arch/arm/mach-ux500/board-mop500-regulators.c
@@ -13,6 +13,30 @@
 #include <linux/regulator/ab8500.h>
 #include "board-mop500-regulators.h"
+/*
+ * TPS61052 regulator
+ */
+static struct regulator_consumer_supply tps61052_vaudio_consumers[] = {
+        /*
+         * Boost converter supply to raise voltage on audio speaker, this
+         * is actually connected to three pins, VInVhfL (left amplifier)
+         * VInVhfR (right amplifier) and VIntDClassInt - all three must
+         * be connected to the same voltage.
+         */
+        REGULATOR_SUPPLY("vintdclassint", "ab8500-codec.0"),
+};
+struct regulator_init_data tps61052_regulator = {
+        .constraints = {
+                .name = "vaudio-hf",
+                .min_uV = 4500000,
+                .max_uV = 4500000,
+                .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies = ARRAY_SIZE(tps61052_vaudio_consumers),
+        .consumer_supplies = tps61052_vaudio_consumers,
+};
 static struct regulator_consumer_supply ab8500_vaux1_consumers[] = {
        /* External displays, connector on board 2v5 power supply */
        REGULATOR_SUPPLY("vaux12v5", "mcde.0"),
@@ -62,6 +86,182 @@ static struct regulator_consumer_supply ab8500_vana_consumers[] = {
        REGULATOR_SUPPLY("vsmps2", "mcde.0"),
 };
+/* ab8500 regulator register initialization */
+struct ab8500_regulator_reg_init
+ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
+        /*
+         * VanaRequestCtrl          = HP/LP depending on VxRequest
+         * VextSupply1RequestCtrl   = HP/LP depending on VxRequest
+         */
+        INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0x00),
+        /*
+         * VextSupply2RequestCtrl   = HP/LP depending on VxRequest
+         * VextSupply3RequestCtrl   = HP/LP depending on VxRequest
+         * Vaux1RequestCtrl         = HP/LP depending on VxRequest
+         * Vaux2RequestCtrl         = HP/LP depending on VxRequest
+         */
+        INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3, 0x00),
+        /*
+         * Vaux3RequestCtrl         = HP/LP depending on VxRequest
+         * SwHPReq                  = Control through SWValid disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4, 0x00),
+        /*
+         * VanaSysClkReq1HPValid    = disabled
+         * Vaux1SysClkReq1HPValid   = disabled
+         * Vaux2SysClkReq1HPValid   = disabled
+         * Vaux3SysClkReq1HPValid   = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0x00),
+        /*
+         * VextSupply1SysClkReq1HPValid = disabled
+         * VextSupply2SysClkReq1HPValid = disabled
+         * VextSupply3SysClkReq1HPValid = SysClkReq1 controlled
+         */
+        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x40),
+        /*
+         * VanaHwHPReq1Valid        = disabled
+         * Vaux1HwHPreq1Valid       = disabled
+         * Vaux2HwHPReq1Valid       = disabled
+         * Vaux3HwHPReqValid        = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1, 0x00),
+        /*
+         * VextSupply1HwHPReq1Valid = disabled
+         * VextSupply2HwHPReq1Valid = disabled
+         * VextSupply3HwHPReq1Valid = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2, 0x00),
+        /*
+         * VanaHwHPReq2Valid        = disabled
+         * Vaux1HwHPReq2Valid       = disabled
+         * Vaux2HwHPReq2Valid       = disabled
+         * Vaux3HwHPReq2Valid       = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1, 0x00),
+        /*
+         * VextSupply1HwHPReq2Valid = disabled
+         * VextSupply2HwHPReq2Valid = disabled
+         * VextSupply3HwHPReq2Valid = HWReq2 controlled
+         */
+        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2, 0x04),
+        /*
+         * VanaSwHPReqValid         = disabled
+         * Vaux1SwHPReqValid        = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1, 0x00),
+        /*
+         * Vaux2SwHPReqValid        = disabled
+         * Vaux3SwHPReqValid        = disabled
+         * VextSupply1SwHPReqValid  = disabled
+         * VextSupply2SwHPReqValid  = disabled
+         * VextSupply3SwHPReqValid  = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2, 0x00),
+        /*
+         * SysClkReq2Valid1         = SysClkReq2 controlled
+         * SysClkReq3Valid1         = disabled
+         * SysClkReq4Valid1         = SysClkReq4 controlled
+         * SysClkReq5Valid1         = disabled
+         * SysClkReq6Valid1         = SysClkReq6 controlled
+         * SysClkReq7Valid1         = disabled
+         * SysClkReq8Valid1         = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1, 0x2a),
+        /*
+         * SysClkReq2Valid2         = disabled
+         * SysClkReq3Valid2         = disabled
+         * SysClkReq4Valid2         = disabled
+         * SysClkReq5Valid2         = disabled
+         * SysClkReq6Valid2         = SysClkReq6 controlled
+         * SysClkReq7Valid2         = disabled
+         * SysClkReq8Valid2         = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2, 0x20),
+        /*
+         * VTVoutEna                = disabled
+         * Vintcore12Ena            = disabled
+         * Vintcore12Sel            = 1.25 V
+         * Vintcore12LP             = inactive (HP)
+         * VTVoutLP                 = inactive (HP)
+         */
+        INIT_REGULATOR_REGISTER(AB8500_REGUMISC1, 0x10),
+        /*
+         * VaudioEna                = disabled
+         * VdmicEna                 = disabled
+         * Vamic1Ena                = disabled
+         * Vamic2Ena                = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY, 0x00),
+        /*
+         * Vamic1_dzout             = high-Z when Vamic1 is disabled
+         * Vamic2_dzout             = high-Z when Vamic2 is disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC, 0x00),
+        /*
+         * VPll                     = Hw controlled
+         * VanaRegu                 = force off
+         */
+        INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU, 0x02),
+        /*
+         * VrefDDREna               = disabled
+         * VrefDDRSleepMode         = inactive (no pulldown)
+         */
+        INIT_REGULATOR_REGISTER(AB8500_VREFDDR, 0x00),
+        /*
+         * VextSupply1Regu          = HW control
+         * VextSupply2Regu          = HW control
+         * VextSupply3Regu          = HW control
+         * ExtSupply2Bypass         = ExtSupply12LPn ball is 0 when Ena is 0
+         * ExtSupply3Bypass         = ExtSupply3LPn ball is 0 when Ena is 0
+         */
+        INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU, 0x2a),
+        /*
+         * Vaux1Regu                = force HP
+         * Vaux2Regu                = force off
+         */
+        INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU, 0x01),
+        /*
+         * Vaux3regu                = force off
+         */
+        INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x00),
+        /*
+         * Vsmps1                   = 1.15V
+         */
+        INIT_REGULATOR_REGISTER(AB8500_VSMPS1SEL1, 0x24),
+        /*
+         * Vaux1Sel                 = 2.5 V
+         */
+        INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL, 0x08),
+        /*
+         * Vaux2Sel                 = 2.9 V
+         */
+        INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL, 0x0d),
+        /*
+         * Vaux3Sel                 = 2.91 V
+         */
+        INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL, 0x07),
+        /*
+         * VextSupply12LP           = disabled (no LP)
+         */
+        INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE, 0x00),
+        /*
+         * Vaux1Disch               = short discharge time
+         * Vaux2Disch               = short discharge time
+         * Vaux3Disch               = short discharge time
+         * Vintcore12Disch          = short discharge time
+         * VTVoutDisch              = short discharge time
+         * VaudioDisch              = short discharge time
+         */
+        INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH, 0x00),
+        /*
+         * VanaDisch                = short discharge time
+         * VdmicPullDownEna         = pulldown disabled when Vdmic is disabled
+         * VdmicDisch               = short discharge time
+         */
+        INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2, 0x00),
+};
 /* AB8500 regulators */
 struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
        /* supplies to the display/camera */
@@ -72,6 +272,7 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
                        .max_uV = 2900000,
                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
                                          REGULATOR_CHANGE_STATUS,
+                        .boot_on = 1, /* must be on for display */
                },
                .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers),
                .consumer_supplies = ab8500_vaux1_consumers,
diff --git a/arch/arm/mach-ux500/board-mop500-regulators.h b/arch/arm/mach-ux500/board-mop500-regulators.h
index f979b892e4fa..94992158d962 100644
--- a/arch/arm/mach-ux500/board-mop500-regulators.h
+++ b/arch/arm/mach-ux500/board-mop500-regulators.h
@@ -17,5 +17,6 @@
 extern struct ab8500_regulator_reg_init
 ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS];
 extern struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS];
+extern struct regulator_init_data tps61052_regulator;
 #endif
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index d0076453d7ff..dc8746d7826e 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -22,6 +22,8 @@
 #include <linux/mfd/ab8500.h>
 #include <linux/regulator/ab8500.h>
 #include <linux/mfd/tc3589x.h>
+#include <linux/mfd/tps6105x.h>
+#include <linux/mfd/ab8500/gpio.h>
 #include <linux/leds-lp5521.h>
 #include <linux/input.h>
 #include <linux/gpio_keys.h>
@@ -42,10 +44,35 @@
 #include "board-mop500.h"
 #include "board-mop500-regulators.h"
+static struct ab8500_gpio_platform_data ab8500_gpio_pdata = {
+        .gpio_base              = MOP500_AB8500_GPIO(0),
+        .irq_base               = MOP500_AB8500_VIR_GPIO_IRQ_BASE,
+        /* config_reg is the initial configuration of ab8500 pins.
+         * The pins can be configured as GPIO or alt functions based
+         * on value present in GpioSel1 to GpioSel6 and AlternatFunction
+         * register. This is the array of 7 configuration settings.
+         * One has to compile time decide these settings. Below is the
+         * explaination of these setting
+         * GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO
+         * GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO
+         * GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO
+         * GpioSel4 = 0x01 => Pin GPIo25 is configured as GPIO
+         * GpioSel5 = 0x7A => Pins GPIO34, GPIO36 to GPIO39 are conf as GPIO
+         * GpioSel6 = 0x00 => Pins GPIO41 & GPIo42 are not configured as GPIO
+         * AlternaFunction = 0x00 => If Pins GPIO10 to 13 are not configured
+         * as GPIO then this register selectes the alternate fucntions
+         */
+        .config_reg             = {0x00, 0x1E, 0x80, 0x01,
+                                        0x7A, 0x00, 0x00},
+};
 static struct ab8500_platform_data ab8500_platdata = {
        .irq_base       = MOP500_AB8500_IRQ_BASE,
+        .regulator_reg_init = ab8500_regulator_reg_init,
+        .num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init),
        .regulator      = ab8500_regulators,
        .num_regulator  = ARRAY_SIZE(ab8500_regulators),
+        .gpio           = &ab8500_gpio_pdata,
 };
 static struct resource ab8500_resources[] = {
@@ -67,6 +94,15 @@ struct platform_device ab8500_device = {
 };
 /*
+ * TPS61052
+ */
+static struct tps6105x_platform_data mop500_tps61052_data = {
+        .mode = TPS6105X_MODE_VOLTAGE,
+        .regulator_data = &tps61052_regulator,
+};
+/*
 * TC35892
 */
@@ -136,7 +172,7 @@ static struct lp5521_platform_data __initdata lp5521_sec_data = {
       .clock_mode     = LP5521_CLOCK_EXT,
 };
-static struct i2c_board_info mop500_i2c0_devices[] = {
+static struct i2c_board_info __initdata mop500_i2c0_devices[] = {
        {
                I2C_BOARD_INFO("tc3589x", 0x42),
                .irq            = NOMADIK_GPIO_TO_IRQ(217),
@@ -144,6 +180,14 @@ static struct i2c_board_info mop500_i2c0_devices[] = {
        },
 };
+/* I2C0 devices only available prior to HREFv60 */
+static struct i2c_board_info __initdata mop500_i2c0_old_devices[] = {
+        {
+                I2C_BOARD_INFO("tps61052", 0x33),
+                .platform_data  = &mop500_tps61052_data,
+        },
+};
 static struct i2c_board_info __initdata mop500_i2c2_devices[] = {
        {
                /* lp5521 LED driver, 1st device */
@@ -406,6 +450,9 @@ static void __init mop500_init_machine(void)
        i2c_register_board_info(0, mop500_i2c0_devices,
                                ARRAY_SIZE(mop500_i2c0_devices));
+        if (!machine_is_hrefv60())
+                i2c_register_board_info(0, mop500_i2c0_old_devices,
+                                        ARRAY_SIZE(mop500_i2c0_old_devices));
        i2c_register_board_info(2, mop500_i2c2_devices,
                                ARRAY_SIZE(mop500_i2c2_devices));
 }
diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h
index 56722f4be71b..03a31cc9b084 100644
--- a/arch/arm/mach-ux500/board-mop500.h
+++ b/arch/arm/mach-ux500/board-mop500.h
@@ -27,6 +27,10 @@
 #define GPIO_BU21013_CS                 MOP500_EGPIO(13)
 #define GPIO_SDMMC_EN                   MOP500_EGPIO(17)
 #define GPIO_SDMMC_1V8_3V_SEL           MOP500_EGPIO(18)
+#define MOP500_EGPIO_END                MOP500_EGPIO(24)
+/* GPIOs on the AB8500 mixed-signals circuit */
+#define MOP500_AB8500_GPIO(x)           (MOP500_EGPIO_END + (x))
 struct i2c_board_info;
diff --git a/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h b/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h
index 7cdeb2af0ebb..97ef55f84934 100644
--- a/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h
+++ b/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h
@@ -35,9 +35,20 @@
 #define MOP500_STMPE1601_IRQBASE        MOP500_EGPIO_IRQ_END
 #define MOP500_STMPE1601_IRQ(x)         (MOP500_STMPE1601_IRQBASE + (x))
-#define MOP500_NR_IRQS          MOP500_STMPE1601_IRQ(STMPE_NR_INTERNAL_IRQS)
+#define MOP500_STMPE1601_IRQ_END        \
+        MOP500_STMPE1601_IRQ(STMPE_NR_INTERNAL_IRQS)
-#define MOP500_IRQ_END          MOP500_NR_IRQS
+/* AB8500 virtual gpio IRQ */
+#define AB8500_VIR_GPIO_NR_IRQS                 16
+#define MOP500_AB8500_VIR_GPIO_IRQ_BASE         \
+        MOP500_STMPE1601_IRQ_END
+#define MOP500_AB8500_VIR_GPIO_IRQ_END          \
+        (MOP500_AB8500_VIR_GPIO_IRQ_BASE + AB8500_VIR_GPIO_NR_IRQS)
+#define MOP500_NR_IRQS          MOP500_AB8500_VIR_GPIO_IRQ_END
+#define MOP500_IRQ_END          MOP500_NR_IRQS
 #if MOP500_IRQ_END > IRQ_BOARD_END
 #undef IRQ_BOARD_END
diff --git a/arch/arm/mach-ux500/modem-irq-db5500.c b/arch/arm/mach-ux500/modem-irq-db5500.c
index e1296a7447c8..6b86416c94c9 100644
--- a/arch/arm/mach-ux500/modem-irq-db5500.c
+++ b/arch/arm/mach-ux500/modem-irq-db5500.c
@@ -90,8 +90,7 @@ static irqreturn_t modem_cpu_irq_handler(int irq, void *data)
 static void create_virtual_irq(int irq, struct irq_chip *modem_irq_chip)
 {
-        set_irq_chip(irq, modem_irq_chip);
+        irq_set_chip_and_handler(irq, modem_irq_chip, handle_simple_irq);
-        set_irq_handler(irq, handle_simple_irq);
        set_irq_flags(irq, IRQF_VALID);
        pr_debug("modem_irq: Created virtual IRQ %d\n", irq);
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index eb7ffa0ee8b5..96e59e3ee4f5 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -314,7 +314,7 @@ static struct mmci_platform_data mmc0_plat_data = {
        .gpio_cd        = -1,
 };
-static struct resource char_lcd_resources[] = {
+static struct resource chalcd_resources[] = {
        {
                .start = VERSATILE_CHAR_LCD_BASE,
                .end   = (VERSATILE_CHAR_LCD_BASE + SZ_4K - 1),
diff --git a/arch/arm/mach-vt8500/irq.c b/arch/arm/mach-vt8500/irq.c
index 5f4ddde4f02a..245140c0df10 100644
--- a/arch/arm/mach-vt8500/irq.c
+++ b/arch/arm/mach-vt8500/irq.c
@@ -97,15 +97,15 @@ static int vt8500_irq_set_type(unsigned int irq, unsigned int flow_type)
                return -EINVAL;
        case IRQF_TRIGGER_HIGH:
                dctr |= VT8500_TRIGGER_HIGH;
-                irq_desc[orig_irq].handle_irq = handle_level_irq;
+                __irq_set_handler_locked(orig_irq, handle_level_irq);
                break;
        case IRQF_TRIGGER_FALLING:
                dctr |= VT8500_TRIGGER_FALLING;
-                irq_desc[orig_irq].handle_irq = handle_edge_irq;
+                __irq_set_handler_locked(orig_irq, handle_edge_irq);
                break;
        case IRQF_TRIGGER_RISING:
                dctr |= VT8500_TRIGGER_RISING;
-                irq_desc[orig_irq].handle_irq = handle_edge_irq;
+                __irq_set_handler_locked(orig_irq, handle_edge_irq);
                break;
        }
        writeb(dctr, base + VT8500_IC_DCTR + irq);
@@ -136,8 +136,8 @@ void __init vt8500_init_irq(void)
                        /* Disable all interrupts and route them to IRQ */
                        writeb(0x00, ic_regbase + VT8500_IC_DCTR + i);
-                        set_irq_chip(i, &vt8500_irq_chip);
+                        irq_set_chip_and_handler(i, &vt8500_irq_chip,
-                        set_irq_handler(i, handle_level_irq);
+                                                 handle_level_irq);
                        set_irq_flags(i, IRQF_VALID);
                }
        } else {
@@ -167,8 +167,8 @@ void __init wm8505_init_irq(void)
                                writeb(0x00, sic_regbase + VT8500_IC_DCTR
                                                                + i - 64);
-                        set_irq_chip(i, &vt8500_irq_chip);
+                        irq_set_chip_and_handler(i, &vt8500_irq_chip,
-                        set_irq_handler(i, handle_level_irq);
+                                                 handle_level_irq);
                        set_irq_flags(i, IRQF_VALID);
                }
        } else {
diff --git a/arch/arm/mach-w90x900/irq.c b/arch/arm/mach-w90x900/irq.c
index 9c350103dcda..7bf143c443f1 100644
--- a/arch/arm/mach-w90x900/irq.c
+++ b/arch/arm/mach-w90x900/irq.c
@@ -207,8 +207,8 @@ void __init nuc900_init_irq(void)
        __raw_writel(0xFFFFFFFE, REG_AIC_MDCR);
        for (irqno = IRQ_WDT; irqno <= IRQ_ADC; irqno++) {
-                set_irq_chip(irqno, &nuc900_irq_chip);
+                irq_set_chip_and_handler(irqno, &nuc900_irq_chip,
-                set_irq_handler(irqno, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irqno, IRQF_VALID);
        }
 }
diff --git a/arch/arm/plat-mxc/3ds_debugboard.c b/arch/arm/plat-mxc/3ds_debugboard.c
index c856fa397606..f0ba0726306c 100644
--- a/arch/arm/plat-mxc/3ds_debugboard.c
+++ b/arch/arm/plat-mxc/3ds_debugboard.c
@@ -100,14 +100,9 @@ static void mxc_expio_irq_handler(u32 irq, struct irq_desc *desc)
        expio_irq = MXC_BOARD_IRQ_START;
        for (; int_valid != 0; int_valid >>= 1, expio_irq++) {
-                struct irq_desc *d;
                if ((int_valid & 1) == 0)
                        continue;
-                d = irq_desc + expio_irq;
+                generic_handle_irq(expio_irq);
-                if (unlikely(!(d->handle_irq)))
-                        pr_err("\nEXPIO irq: %d unhandled\n", expio_irq);
-                else
-                        d->handle_irq(expio_irq, d);
        }
        desc->irq_data.chip->irq_ack(&desc->irq_data);
@@ -186,12 +181,11 @@ int __init mxc_expio_init(u32 base, u32 p_irq)
        __raw_writew(0x1F, brd_io + INTR_MASK_REG);
        for (i = MXC_EXP_IO_BASE;
             i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES); i++) {
-                set_irq_chip(i, &expio_irq_chip);
+                irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq);
-                set_irq_handler(i, handle_level_irq);
                set_irq_flags(i, IRQF_VALID);
        }
-        set_irq_type(p_irq, IRQF_TRIGGER_LOW);
+        irq_set_irq_type(p_irq, IRQF_TRIGGER_LOW);
-        set_irq_chained_handler(p_irq, mxc_expio_irq_handler);
+        irq_set_chained_handler(p_irq, mxc_expio_irq_handler);
        /* Register Lan device on the debugboard */
        smsc911x_resources[0].start = LAN9217_BASE_ADDR(base);
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c
index deb284bc7c4b..09e2bd0fcdca 100644
--- a/arch/arm/plat-mxc/avic.c
+++ b/arch/arm/plat-mxc/avic.c
@@ -139,8 +139,8 @@ void __init mxc_init_irq(void __iomem *irqbase)
        __raw_writel(0, avic_base + AVIC_INTTYPEH);
        __raw_writel(0, avic_base + AVIC_INTTYPEL);
        for (i = 0; i < MXC_INTERNAL_IRQS; i++) {
-                set_irq_chip(i, &mxc_avic_chip.base);
+                irq_set_chip_and_handler(i, &mxc_avic_chip.base,
-                set_irq_handler(i, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(i, IRQF_VALID);
        }
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
index 57d59855f9ec..7a107246fd98 100644
--- a/arch/arm/plat-mxc/gpio.c
+++ b/arch/arm/plat-mxc/gpio.c
@@ -175,7 +175,7 @@ static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat)
 static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc)
 {
        u32 irq_stat;
-        struct mxc_gpio_port *port = get_irq_data(irq);
+        struct mxc_gpio_port *port = irq_get_handler_data(irq);
        irq_stat = __raw_readl(port->base + GPIO_ISR) &
                        __raw_readl(port->base + GPIO_IMR);
@@ -188,7 +188,7 @@ static void mx2_gpio_irq_handler(u32 irq, struct irq_desc *desc)
 {
        int i;
        u32 irq_msk, irq_stat;
-        struct mxc_gpio_port *port = get_irq_data(irq);
+        struct mxc_gpio_port *port = irq_get_handler_data(irq);
        /* walk through all interrupt status registers */
        for (i = 0; i < gpio_table_size; i++) {
@@ -311,8 +311,8 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt)
                __raw_writel(~0, port[i].base + GPIO_ISR);
                for (j = port[i].virtual_irq_start;
                        j < port[i].virtual_irq_start + 32; j++) {
-                        set_irq_chip(j, &gpio_irq_chip);
+                        irq_set_chip_and_handler(j, &gpio_irq_chip,
-                        set_irq_handler(j, handle_level_irq);
+                                                 handle_level_irq);
                        set_irq_flags(j, IRQF_VALID);
                }
@@ -331,21 +331,23 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt)
                if (cpu_is_mx1() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51()) {
                        /* setup one handler for each entry */
-                        set_irq_chained_handler(port[i].irq, mx3_gpio_irq_handler);
+                        irq_set_chained_handler(port[i].irq,
-                        set_irq_data(port[i].irq, &port[i]);
+                                                mx3_gpio_irq_handler);
+                        irq_set_handler_data(port[i].irq, &port[i]);
                        if (port[i].irq_high) {
                                /* setup handler for GPIO 16 to 31 */
-                                set_irq_chained_handler(port[i].irq_high,
+                                irq_set_chained_handler(port[i].irq_high,
-                                                mx3_gpio_irq_handler);
+                                                        mx3_gpio_irq_handler);
-                                set_irq_data(port[i].irq_high, &port[i]);
+                                irq_set_handler_data(port[i].irq_high,
+                                                     &port[i]);
                        }
                }
        }
        if (cpu_is_mx2()) {
                /* setup one handler for all GPIO interrupts */
-                set_irq_chained_handler(port[0].irq, mx2_gpio_irq_handler);
+                irq_set_chained_handler(port[0].irq, mx2_gpio_irq_handler);
-                set_irq_data(port[0].irq, port);
+                irq_set_handler_data(port[0].irq, port);
        }
        return 0;
diff --git a/arch/arm/plat-mxc/irq-common.c b/arch/arm/plat-mxc/irq-common.c
index 0c799ac27730..e1c6eff7258a 100644
--- a/arch/arm/plat-mxc/irq-common.c
+++ b/arch/arm/plat-mxc/irq-common.c
@@ -29,7 +29,7 @@ int imx_irq_set_priority(unsigned char irq, unsigned char prio)
        ret = -ENOSYS;
-        base = get_irq_chip(irq);
+        base = irq_get_chip(irq);
        if (base) {
                chip = container_of(base, struct mxc_irq_chip, base);
                if (chip->set_priority)
@@ -48,7 +48,7 @@ int mxc_set_irq_fiq(unsigned int irq, unsigned int type)
        ret = -ENOSYS;
-        base = get_irq_chip(irq);
+        base = irq_get_chip(irq);
        if (base) {
                chip = container_of(base, struct mxc_irq_chip, base);
                if (chip->set_irq_fiq)
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
index bc3a6be8a27f..57f9395f87ce 100644
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/plat-mxc/tzic.c
@@ -167,8 +167,8 @@ void __init tzic_init_irq(void __iomem *irqbase)
        /* all IRQ no FIQ Warning :: No selection */
        for (i = 0; i < MXC_INTERNAL_IRQS; i++) {
-                set_irq_chip(i, &mxc_tzic_chip.base);
+                irq_set_chip_and_handler(i, &mxc_tzic_chip.base,
-                set_irq_handler(i, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(i, IRQF_VALID);
        }
diff --git a/arch/arm/plat-nomadik/gpio.c b/arch/arm/plat-nomadik/gpio.c
index 80643bc38e10..f49748eca1a3 100644
--- a/arch/arm/plat-nomadik/gpio.c
+++ b/arch/arm/plat-nomadik/gpio.c
@@ -54,6 +54,7 @@ struct nmk_gpio_chip {
        u32 rwimsc;
        u32 fwimsc;
        u32 slpm;
+        u32 enabled;
 };
 static struct nmk_gpio_chip *
@@ -318,7 +319,7 @@ static int __nmk_config_pins(pin_cfg_t *cfgs, int num, bool sleep)
                struct nmk_gpio_chip *nmk_chip;
                int pin = PIN_NUM(cfgs[i]);
-                nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(pin));
+                nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(pin));
                if (!nmk_chip) {
                        ret = -EINVAL;
                        break;
@@ -397,7 +398,7 @@ int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
        struct nmk_gpio_chip *nmk_chip;
        unsigned long flags;
-        nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
+        nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
        if (!nmk_chip)
                return -EINVAL;
@@ -430,7 +431,7 @@ int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull)
        struct nmk_gpio_chip *nmk_chip;
        unsigned long flags;
-        nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
+        nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
        if (!nmk_chip)
                return -EINVAL;
@@ -456,7 +457,7 @@ int nmk_gpio_set_mode(int gpio, int gpio_mode)
        struct nmk_gpio_chip *nmk_chip;
        unsigned long flags;
-        nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
+        nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
        if (!nmk_chip)
                return -EINVAL;
@@ -473,7 +474,7 @@ int nmk_gpio_get_mode(int gpio)
        struct nmk_gpio_chip *nmk_chip;
        u32 afunc, bfunc, bit;
-        nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
+        nmk_chip = irq_get_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
        if (!nmk_chip)
                return -EINVAL;
@@ -541,13 +542,6 @@ static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
 static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip,
                                int gpio, bool on)
 {
-#ifdef CONFIG_ARCH_U8500
-        if (cpu_is_u8500v2()) {
-                __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base,
-                                    on ? NMK_GPIO_SLPM_WAKEUP_ENABLE
-                                       : NMK_GPIO_SLPM_WAKEUP_DISABLE);
-        }
-#endif
        __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, on);
 }
@@ -564,6 +558,11 @@ static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable)
        if (!nmk_chip)
                return -EINVAL;
+        if (enable)
+                nmk_chip->enabled |= bitmask;
+        else
+                nmk_chip->enabled &= ~bitmask;
        spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
        spin_lock(&nmk_chip->lock);
@@ -590,8 +589,6 @@ static void nmk_gpio_irq_unmask(struct irq_data *d)
 static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
 {
-        struct irq_desc *desc = irq_to_desc(d->irq);
-        bool enabled = !(desc->status & IRQ_DISABLED);
        struct nmk_gpio_chip *nmk_chip;
        unsigned long flags;
        u32 bitmask;
@@ -606,7 +603,7 @@ static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
        spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
        spin_lock(&nmk_chip->lock);
-        if (!enabled)
+        if (!(nmk_chip->enabled & bitmask))
                __nmk_gpio_set_wake(nmk_chip, gpio, on);
        if (on)
@@ -622,9 +619,7 @@ static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
 static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
 {
-        struct irq_desc *desc = irq_to_desc(d->irq);
+        bool enabled, wake = irqd_is_wakeup_set(d);
-        bool enabled = !(desc->status & IRQ_DISABLED);
-        bool wake = desc->wake_depth;
        int gpio;
        struct nmk_gpio_chip *nmk_chip;
        unsigned long flags;
@@ -641,6 +636,8 @@ static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
        if (type & IRQ_TYPE_LEVEL_LOW)
                return -EINVAL;
+        enabled = nmk_chip->enabled & bitmask;
        spin_lock_irqsave(&nmk_chip->lock, flags);
        if (enabled)
@@ -681,7 +678,7 @@ static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
                                   u32 status)
 {
        struct nmk_gpio_chip *nmk_chip;
-        struct irq_chip *host_chip = get_irq_chip(irq);
+        struct irq_chip *host_chip = irq_get_chip(irq);
        unsigned int first_irq;
        if (host_chip->irq_mask_ack)
@@ -692,7 +689,7 @@ static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
                        host_chip->irq_ack(&desc->irq_data);
        }
-        nmk_chip = get_irq_data(irq);
+        nmk_chip = irq_get_handler_data(irq);
        first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
        while (status) {
                int bit = __ffs(status);
@@ -706,7 +703,7 @@ static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
 static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
-        struct nmk_gpio_chip *nmk_chip = get_irq_data(irq);
+        struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq);
        u32 status = readl(nmk_chip->addr + NMK_GPIO_IS);
        __nmk_gpio_irq_handler(irq, desc, status);
@@ -715,7 +712,7 @@ static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 static void nmk_gpio_secondary_irq_handler(unsigned int irq,
                                           struct irq_desc *desc)
 {
-        struct nmk_gpio_chip *nmk_chip = get_irq_data(irq);
+        struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq);
        u32 status = nmk_chip->get_secondary_status(nmk_chip->bank);
        __nmk_gpio_irq_handler(irq, desc, status);
@@ -728,20 +725,20 @@ static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
        first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
        for (i = first_irq; i < first_irq + nmk_chip->chip.ngpio; i++) {
-                set_irq_chip(i, &nmk_gpio_irq_chip);
+                irq_set_chip_and_handler(i, &nmk_gpio_irq_chip,
-                set_irq_handler(i, handle_edge_irq);
+                                         handle_edge_irq);
                set_irq_flags(i, IRQF_VALID);
-                set_irq_chip_data(i, nmk_chip);
+                irq_set_chip_data(i, nmk_chip);
-                set_irq_type(i, IRQ_TYPE_EDGE_FALLING);
+                irq_set_irq_type(i, IRQ_TYPE_EDGE_FALLING);
        }
-        set_irq_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
+        irq_set_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
-        set_irq_data(nmk_chip->parent_irq, nmk_chip);
+        irq_set_handler_data(nmk_chip->parent_irq, nmk_chip);
        if (nmk_chip->secondary_parent_irq >= 0) {
-                set_irq_chained_handler(nmk_chip->secondary_parent_irq,
+                irq_set_chained_handler(nmk_chip->secondary_parent_irq,
                                        nmk_gpio_secondary_irq_handler);
-                set_irq_data(nmk_chip->secondary_parent_irq, nmk_chip);
+                irq_set_handler_data(nmk_chip->secondary_parent_irq, nmk_chip);
        }
        return 0;
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 971d18636942..d2adcdda23cf 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -755,18 +755,12 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
        bank = irq_data_get_irq_chip_data(d);
        spin_lock_irqsave(&bank->lock, flags);
        retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type);
-        if (retval == 0) {
-                struct irq_desc *desc = irq_to_desc(d->irq);
-                desc->status &= ~IRQ_TYPE_SENSE_MASK;
-                desc->status |= type;
-        }
        spin_unlock_irqrestore(&bank->lock, flags);
        if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
-                __set_irq_handler_unlocked(d->irq, handle_level_irq);
+                __irq_set_handler_locked(d->irq, handle_level_irq);
        else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
-                __set_irq_handler_unlocked(d->irq, handle_edge_irq);
+                __irq_set_handler_locked(d->irq, handle_edge_irq);
        return retval;
 }
@@ -1146,7 +1140,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
        desc->irq_data.chip->irq_ack(&desc->irq_data);
-        bank = get_irq_data(irq);
+        bank = irq_get_handler_data(irq);
 #ifdef CONFIG_ARCH_OMAP1
        if (bank->method == METHOD_MPUIO)
                isr_reg = bank->base +
@@ -1270,8 +1264,7 @@ static void gpio_unmask_irq(struct irq_data *d)
        unsigned int gpio = d->irq - IH_GPIO_BASE;
        struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
        unsigned int irq_mask = 1 << get_gpio_index(gpio);
-        struct irq_desc *desc = irq_to_desc(d->irq);
+        u32 trigger = irqd_get_trigger_type(d);
-        u32 trigger = desc->status & IRQ_TYPE_SENSE_MASK;
        if (trigger)
                _set_gpio_triggering(bank, get_gpio_index(gpio), trigger);
@@ -1672,19 +1665,17 @@ static void __init omap_gpio_chip_init(struct gpio_bank *bank)
        for (j = bank->virtual_irq_start;
                     j < bank->virtual_irq_start + bank_width; j++) {
-                struct irq_desc *d = irq_to_desc(j);
+                irq_set_lockdep_class(j, &gpio_lock_class);
+                irq_set_chip_data(j, bank);
-                lockdep_set_class(&d->lock, &gpio_lock_class);
-                set_irq_chip_data(j, bank);
                if (bank_is_mpuio(bank))
-                        set_irq_chip(j, &mpuio_irq_chip);
+                        irq_set_chip(j, &mpuio_irq_chip);
                else
-                        set_irq_chip(j, &gpio_irq_chip);
+                        irq_set_chip(j, &gpio_irq_chip);
-                set_irq_handler(j, handle_simple_irq);
+                irq_set_handler(j, handle_simple_irq);
                set_irq_flags(j, IRQF_VALID);
        }
-        set_irq_chained_handler(bank->irq, gpio_irq_handler);
+        irq_set_chained_handler(bank->irq, gpio_irq_handler);
-        set_irq_data(bank->irq, bank);
+        irq_set_handler_data(bank->irq, bank);
 }
 static int __devinit omap_gpio_probe(struct platform_device *pdev)
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
index 078894bc3b9a..a431a138f402 100644
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -324,9 +324,8 @@ EXPORT_SYMBOL(orion_gpio_set_blink);
 static void gpio_irq_ack(struct irq_data *d)
 {
        struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d);
-        int type;
+        int type = irqd_get_trigger_type(d);
-        type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK;
        if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
                int pin = d->irq - ochip->secondary_irq_base;
@@ -337,11 +336,10 @@ static void gpio_irq_ack(struct irq_data *d)
 static void gpio_irq_mask(struct irq_data *d)
 {
        struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d);
-        int type;
+        int type = irqd_get_trigger_type(d);
        void __iomem *reg;
        int pin;
-        type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK;
        if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
                reg = GPIO_EDGE_MASK(ochip);
        else
@@ -355,11 +353,10 @@ static void gpio_irq_mask(struct irq_data *d)
 static void gpio_irq_unmask(struct irq_data *d)
 {
        struct orion_gpio_chip *ochip = irq_data_get_irq_chip_data(d);
-        int type;
+        int type = irqd_get_trigger_type(d);
        void __iomem *reg;
        int pin;
-        type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK;
        if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
                reg = GPIO_EDGE_MASK(ochip);
        else
@@ -389,9 +386,9 @@ static int gpio_irq_set_type(struct irq_data *d, u32 type)
         * Set edge/level type.
         */
        if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
-                set_irq_handler(d->irq, handle_edge_irq);
+                __irq_set_handler_locked(d->irq, handle_edge_irq);
        } else if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
-                set_irq_handler(d->irq, handle_level_irq);
+                __irq_set_handler_locked(d->irq, handle_level_irq);
        } else {
                printk(KERN_ERR "failed to set irq=%d (type=%d)\n",
                       d->irq, type);
@@ -477,10 +474,10 @@ void __init orion_gpio_init(int gpio_base, int ngpio,
        for (i = 0; i < ngpio; i++) {
                unsigned int irq = secondary_irq_base + i;
-                set_irq_chip(irq, &orion_gpio_irq_chip);
+                irq_set_chip_and_handler(irq, &orion_gpio_irq_chip,
-                set_irq_handler(irq, handle_level_irq);
+                                         handle_level_irq);
-                set_irq_chip_data(irq, ochip);
+                irq_set_chip_data(irq, ochip);
-                irq_desc[irq].status |= IRQ_LEVEL;
+                irq_set_status_flags(irq, IRQ_LEVEL);
                set_irq_flags(irq, IRQF_VALID);
        }
 }
@@ -488,7 +485,7 @@ void __init orion_gpio_init(int gpio_base, int ngpio,
 void orion_gpio_irq_handler(int pinoff)
 {
        struct orion_gpio_chip *ochip;
-        u32 cause;
+        u32 cause, type;
        int i;
        ochip = orion_gpio_chip_find(pinoff);
@@ -500,15 +497,14 @@ void orion_gpio_irq_handler(int pinoff)
        for (i = 0; i < ochip->chip.ngpio; i++) {
                int irq;
-                struct irq_desc *desc;
                irq = ochip->secondary_irq_base + i;
                if (!(cause & (1 << i)))
                        continue;
-                desc = irq_desc + irq;
+                type = irqd_get_trigger_type(irq_get_irq_data(irq));
-                if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
+                if ((type & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
                        /* Swap polarity (race with GPIO line) */
                        u32 polarity;
@@ -516,7 +512,6 @@ void orion_gpio_irq_handler(int pinoff)
                        polarity ^= 1 << i;
                        writel(polarity, GPIO_IN_POL(ochip));
                }
+                generic_handle_irq(irq);
-                desc_handle_irq(irq, desc);
        }
 }
diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
index 7d0c7eb59f09..d8d638e09f8f 100644
--- a/arch/arm/plat-orion/irq.c
+++ b/arch/arm/plat-orion/irq.c
@@ -56,10 +56,10 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
        for (i = 0; i < 32; i++) {
                unsigned int irq = irq_start + i;
-                set_irq_chip(irq, &orion_irq_chip);
+                irq_set_chip_and_handler(irq, &orion_irq_chip,
-                set_irq_chip_data(irq, maskaddr);
+                                         handle_level_irq);
-                set_irq_handler(irq, handle_level_irq);
+                irq_set_chip_data(irq, maskaddr);
-                irq_desc[irq].status |= IRQ_LEVEL;
+                irq_set_status_flags(irq, IRQ_LEVEL);
                set_irq_flags(irq, IRQF_VALID);
        }
 }
diff --git a/arch/arm/plat-pxa/gpio.c b/arch/arm/plat-pxa/gpio.c
index e7de6ae2a1e8..dce088f45678 100644
--- a/arch/arm/plat-pxa/gpio.c
+++ b/arch/arm/plat-pxa/gpio.c
@@ -284,13 +284,13 @@ void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
        }
        for (irq  = gpio_to_irq(start); irq <= gpio_to_irq(end); irq++) {
-                set_irq_chip(irq, &pxa_muxed_gpio_chip);
+                irq_set_chip_and_handler(irq, &pxa_muxed_gpio_chip,
-                set_irq_handler(irq, handle_edge_irq);
+                                         handle_edge_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
        /* Install handler for GPIO>=2 edge detect interrupts */
-        set_irq_chained_handler(mux_irq, pxa_gpio_demux_handler);
+        irq_set_chained_handler(mux_irq, pxa_gpio_demux_handler);
        pxa_muxed_gpio_chip.irq_set_wake = fn;
 }
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index 4434cb56bd9a..9aee7e1668b1 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -592,8 +592,8 @@ void __init s3c24xx_init_irq(void)
                case IRQ_UART1:
                case IRQ_UART2:
                case IRQ_ADCPARENT:
-                        set_irq_chip(irqno, &s3c_irq_level_chip);
+                        irq_set_chip_and_handler(irqno, &s3c_irq_level_chip,
-                        set_irq_handler(irqno, handle_level_irq);
+                                                 handle_level_irq);
                        break;
                case IRQ_RESERVED6:
@@ -603,35 +603,35 @@ void __init s3c24xx_init_irq(void)
                default:
                        //irqdbf("registering irq %d (s3c irq)\n", irqno);
-                        set_irq_chip(irqno, &s3c_irq_chip);
+                        irq_set_chip_and_handler(irqno, &s3c_irq_chip,
-                        set_irq_handler(irqno, handle_edge_irq);
+                                                 handle_edge_irq);
                        set_irq_flags(irqno, IRQF_VALID);
                }
        }
        /* setup the cascade irq handlers */
-        set_irq_chained_handler(IRQ_EINT4t7, s3c_irq_demux_extint4t7);
+        irq_set_chained_handler(IRQ_EINT4t7, s3c_irq_demux_extint4t7);
-        set_irq_chained_handler(IRQ_EINT8t23, s3c_irq_demux_extint8);
+        irq_set_chained_handler(IRQ_EINT8t23, s3c_irq_demux_extint8);
-        set_irq_chained_handler(IRQ_UART0, s3c_irq_demux_uart0);
+        irq_set_chained_handler(IRQ_UART0, s3c_irq_demux_uart0);
-        set_irq_chained_handler(IRQ_UART1, s3c_irq_demux_uart1);
+        irq_set_chained_handler(IRQ_UART1, s3c_irq_demux_uart1);
-        set_irq_chained_handler(IRQ_UART2, s3c_irq_demux_uart2);
+        irq_set_chained_handler(IRQ_UART2, s3c_irq_demux_uart2);
-        set_irq_chained_handler(IRQ_ADCPARENT, s3c_irq_demux_adc);
+        irq_set_chained_handler(IRQ_ADCPARENT, s3c_irq_demux_adc);
        /* external interrupts */
        for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) {
                irqdbf("registering irq %d (ext int)\n", irqno);
-                set_irq_chip(irqno, &s3c_irq_eint0t4);
+                irq_set_chip_and_handler(irqno, &s3c_irq_eint0t4,
-                set_irq_handler(irqno, handle_edge_irq);
+                                         handle_edge_irq);
                set_irq_flags(irqno, IRQF_VALID);
        }
        for (irqno = IRQ_EINT4; irqno <= IRQ_EINT23; irqno++) {
                irqdbf("registering irq %d (extended s3c irq)\n", irqno);
-                set_irq_chip(irqno, &s3c_irqext_chip);
+                irq_set_chip_and_handler(irqno, &s3c_irqext_chip,
-                set_irq_handler(irqno, handle_edge_irq);
+                                         handle_edge_irq);
                set_irq_flags(irqno, IRQF_VALID);
        }
@@ -641,29 +641,28 @@ void __init s3c24xx_init_irq(void)
        for (irqno = IRQ_S3CUART_RX0; irqno <= IRQ_S3CUART_ERR0; irqno++) {
                irqdbf("registering irq %d (s3c uart0 irq)\n", irqno);
-                set_irq_chip(irqno, &s3c_irq_uart0);
+                irq_set_chip_and_handler(irqno, &s3c_irq_uart0,
-                set_irq_handler(irqno, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irqno, IRQF_VALID);
        }
        for (irqno = IRQ_S3CUART_RX1; irqno <= IRQ_S3CUART_ERR1; irqno++) {
                irqdbf("registering irq %d (s3c uart1 irq)\n", irqno);
-                set_irq_chip(irqno, &s3c_irq_uart1);
+                irq_set_chip_and_handler(irqno, &s3c_irq_uart1,
-                set_irq_handler(irqno, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irqno, IRQF_VALID);
        }
        for (irqno = IRQ_S3CUART_RX2; irqno <= IRQ_S3CUART_ERR2; irqno++) {
                irqdbf("registering irq %d (s3c uart2 irq)\n", irqno);
-                set_irq_chip(irqno, &s3c_irq_uart2);
+                irq_set_chip_and_handler(irqno, &s3c_irq_uart2,
-                set_irq_handler(irqno, handle_level_irq);
+                                         handle_level_irq);
                set_irq_flags(irqno, IRQF_VALID);
        }
        for (irqno = IRQ_TC; irqno <= IRQ_ADC; irqno++) {
                irqdbf("registering irq %d (s3c adc irq)\n", irqno);
-                set_irq_chip(irqno, &s3c_irq_adc);
+                irq_set_chip_and_handler(irqno, &s3c_irq_adc, handle_edge_irq);
-                set_irq_handler(irqno, handle_edge_irq);
                set_irq_flags(irqno, IRQF_VALID);
        }
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
index c3bfe9b13acf..5cf5e721e6ca 100644
--- a/arch/arm/plat-s5p/cpu.c
+++ b/arch/arm/plat-s5p/cpu.c
@@ -39,7 +39,7 @@ static const char name_exynos4210[] = "EXYNOS4210";
 static struct cpu_table cpu_ids[] __initdata = {
        {
                .idcode         = 0x56440100,
-                .idmask         = 0xffffff00,
+                .idmask         = 0xfffff000,
                .map_io         = s5p6440_map_io,
                .init_clocks    = s5p6440_init_clocks,
                .init_uarts     = s5p6440_init_uarts,
@@ -47,7 +47,7 @@ static struct cpu_table cpu_ids[] __initdata = {
                .name           = name_s5p6440,
        }, {
                .idcode         = 0x36442000,
-                .idmask         = 0xffffff00,
+                .idmask         = 0xfffff000,
                .map_io         = s5p6442_map_io,
                .init_clocks    = s5p6442_init_clocks,
                .init_uarts     = s5p6442_init_uarts,
@@ -55,7 +55,7 @@ static struct cpu_table cpu_ids[] __initdata = {
                .name           = name_s5p6442,
        }, {
                .idcode         = 0x36450000,
-                .idmask         = 0xffffff00,
+                .idmask         = 0xfffff000,
                .map_io         = s5p6450_map_io,
                .init_clocks    = s5p6450_init_clocks,
                .init_uarts     = s5p6450_init_uarts,
@@ -79,7 +79,7 @@ static struct cpu_table cpu_ids[] __initdata = {
                .name           = name_s5pv210,
        }, {
                .idcode         = 0x43210000,
-                .idmask         = 0xfffff000,
+                .idmask         = 0xfffe0000,
                .map_io         = exynos4_map_io,
                .init_clocks    = exynos4_init_clocks,
                .init_uarts     = exynos4_init_uarts,
diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-s5p/irq-eint.c
index 225aa25405db..b5bb774985b0 100644
--- a/arch/arm/plat-s5p/irq-eint.c
+++ b/arch/arm/plat-s5p/irq-eint.c
@@ -205,15 +205,14 @@ int __init s5p_init_irq_eint(void)
        int irq;
        for (irq = IRQ_EINT(0); irq <= IRQ_EINT(15); irq++)
-                set_irq_chip(irq, &s5p_irq_vic_eint);
+                irq_set_chip(irq, &s5p_irq_vic_eint);
        for (irq = IRQ_EINT(16); irq <= IRQ_EINT(31); irq++) {
-                set_irq_chip(irq, &s5p_irq_eint);
+                irq_set_chip_and_handler(irq, &s5p_irq_eint, handle_level_irq);
-                set_irq_handler(irq, handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
-        set_irq_chained_handler(IRQ_EINT16_31, s5p_irq_demux_eint16_31);
+        irq_set_chained_handler(IRQ_EINT16_31, s5p_irq_demux_eint16_31);
        return 0;
 }
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c
index cd87d3256e03..46dd078147d8 100644
--- a/arch/arm/plat-s5p/irq-gpioint.c
+++ b/arch/arm/plat-s5p/irq-gpioint.c
@@ -43,13 +43,13 @@ LIST_HEAD(banks);
 static int s5p_gpioint_get_offset(struct irq_data *data)
 {
-        struct s3c_gpio_chip *chip = irq_data_get_irq_data(data);
+        struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data);
        return data->irq - chip->irq_base;
 }
 static void s5p_gpioint_ack(struct irq_data *data)
 {
-        struct s3c_gpio_chip *chip = irq_data_get_irq_data(data);
+        struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data);
        int group, offset, pend_offset;
        unsigned int value;
@@ -64,7 +64,7 @@ static void s5p_gpioint_ack(struct irq_data *data)
 static void s5p_gpioint_mask(struct irq_data *data)
 {
-        struct s3c_gpio_chip *chip = irq_data_get_irq_data(data);
+        struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data);
        int group, offset, mask_offset;
        unsigned int value;
@@ -79,7 +79,7 @@ static void s5p_gpioint_mask(struct irq_data *data)
 static void s5p_gpioint_unmask(struct irq_data *data)
 {
-        struct s3c_gpio_chip *chip = irq_data_get_irq_data(data);
+        struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data);
        int group, offset, mask_offset;
        unsigned int value;
@@ -100,7 +100,7 @@ static void s5p_gpioint_mask_ack(struct irq_data *data)
 static int s5p_gpioint_set_type(struct irq_data *data, unsigned int type)
 {
-        struct s3c_gpio_chip *chip = irq_data_get_irq_data(data);
+        struct s3c_gpio_chip *chip = irq_data_get_irq_handler_data(data);
        int group, offset, con_offset;
        unsigned int value;
@@ -149,7 +149,7 @@ static struct irq_chip s5p_gpioint = {
 static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
 {
-        struct s5p_gpioint_bank *bank = get_irq_data(irq);
+        struct s5p_gpioint_bank *bank = irq_get_handler_data(irq);
        int group, pend_offset, mask_offset;
        unsigned int pend, mask;
@@ -200,8 +200,8 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
                if (!bank->chips)
                        return -ENOMEM;
-                set_irq_chained_handler(bank->irq, s5p_gpioint_handler);
+                irq_set_chained_handler(bank->irq, s5p_gpioint_handler);
-                set_irq_data(bank->irq, bank);
+                irq_set_handler_data(bank->irq, bank);
                bank->handler = s5p_gpioint_handler;
                printk(KERN_INFO "Registered chained gpio int handler for interrupt %d.\n",
                       bank->irq);
@@ -219,9 +219,9 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
        bank->chips[group - bank->start] = chip;
        for (i = 0; i < chip->chip.ngpio; i++) {
                irq = chip->irq_base + i;
-                set_irq_chip(irq, &s5p_gpioint);
+                irq_set_chip(irq, &s5p_gpioint);
-                set_irq_data(irq, chip);
+                irq_set_handler_data(irq, chip);
-                set_irq_handler(irq, handle_level_irq);
+                irq_set_handler(irq, handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
        return 0;
diff --git a/arch/arm/plat-samsung/init.c b/arch/arm/plat-samsung/init.c
index 6790edfaca6f..79d10fca9090 100644
--- a/arch/arm/plat-samsung/init.c
+++ b/arch/arm/plat-samsung/init.c
@@ -36,7 +36,7 @@ static struct cpu_table * __init s3c_lookup_cpu(unsigned long idcode,
                                                unsigned int count)
 {
        for (; count != 0; count--, tab++) {
-                if ((idcode & tab->idmask) == tab->idcode)
+                if ((idcode & tab->idmask) == (tab->idcode & tab->idmask))
                        return tab;
        }
diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c
index 4e770355ccbc..4d4e571af553 100644
--- a/arch/arm/plat-samsung/irq-uart.c
+++ b/arch/arm/plat-samsung/irq-uart.c
@@ -107,7 +107,6 @@ static struct irq_chip s3c_irq_uart = {
 static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq)
 {
-        struct irq_desc *desc = irq_to_desc(uirq->parent_irq);
        void __iomem *reg_base = uirq->regs;
        unsigned int irq;
        int offs;
@@ -118,14 +117,13 @@ static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq)
        for (offs = 0; offs < 3; offs++) {
                irq = uirq->base_irq + offs;
-                set_irq_chip(irq, &s3c_irq_uart);
+                irq_set_chip_and_handler(irq, &s3c_irq_uart, handle_level_irq);
-                set_irq_chip_data(irq, uirq);
+                irq_set_chip_data(irq, uirq);
-                set_irq_handler(irq, handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
-        desc->irq_data.handler_data = uirq;
+        irq_set_handler_data(uirq->parent_irq, uirq);
-        set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart);
+        irq_set_chained_handler(uirq->parent_irq, s3c_irq_demux_uart);
 }
 /**
diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c
index dd8692ae5c4c..d6ad66ab9290 100644
--- a/arch/arm/plat-samsung/irq-vic-timer.c
+++ b/arch/arm/plat-samsung/irq-vic-timer.c
@@ -77,14 +77,11 @@ static struct irq_chip s3c_irq_timer = {
 void __init s3c_init_vic_timer_irq(unsigned int parent_irq,
                                   unsigned int timer_irq)
 {
-        struct irq_desc *desc = irq_to_desc(parent_irq);
-        set_irq_chained_handler(parent_irq, s3c_irq_demux_vic_timer);
+        irq_set_chained_handler(parent_irq, s3c_irq_demux_vic_timer);
+        irq_set_handler_data(parent_irq, (void *)timer_irq);
-        set_irq_chip(timer_irq, &s3c_irq_timer);
+        irq_set_chip_and_handler(timer_irq, &s3c_irq_timer, handle_level_irq);
-        set_irq_chip_data(timer_irq, (void *)(1 << (timer_irq - IRQ_TIMER0)));
+        irq_set_chip_data(timer_irq, (void *)(1 << (timer_irq - IRQ_TIMER0)));
-        set_irq_handler(timer_irq, handle_level_irq);
        set_irq_flags(timer_irq, IRQF_VALID);
-        desc->irq_data.handler_data = (void *)timer_irq;
 }
diff --git a/arch/arm/plat-samsung/wakeup-mask.c b/arch/arm/plat-samsung/wakeup-mask.c
index 2e09b6ad84ca..dc814037297b 100644
--- a/arch/arm/plat-samsung/wakeup-mask.c
+++ b/arch/arm/plat-samsung/wakeup-mask.c
@@ -22,7 +22,7 @@
 void samsung_sync_wakemask(void __iomem *reg,
                           struct samsung_wakeup_mask *mask, int nr_mask)
 {
-        struct irq_desc *desc;
+        struct irq_data *data;
        u32 val;
        val = __raw_readl(reg);
@@ -33,10 +33,10 @@ void samsung_sync_wakemask(void __iomem *reg,
                        continue;
                }
-                desc = irq_to_desc(mask->irq);
+                data = irq_get_irq_data(mask->irq);
-                /* bit of a liberty to read this directly from irq_desc. */
+                /* bit of a liberty to read this directly from irq_data. */
-                if (desc->wake_depth > 0)
+                if (irqd_is_wakeup_set(data))
                        val &= ~mask->bit;
                else
                        val |= mask->bit;
diff --git a/arch/arm/plat-spear/shirq.c b/arch/arm/plat-spear/shirq.c
index 78189035e7f1..961fb7261243 100644
--- a/arch/arm/plat-spear/shirq.c
+++ b/arch/arm/plat-spear/shirq.c
@@ -68,7 +68,7 @@ static struct irq_chip shirq_chip = {
 static void shirq_handler(unsigned irq, struct irq_desc *desc)
 {
        u32 i, val, mask;
-        struct spear_shirq *shirq = get_irq_data(irq);
+        struct spear_shirq *shirq = irq_get_handler_data(irq);
        desc->irq_data.chip->irq_ack(&desc->irq_data);
        while ((val = readl(shirq->regs.base + shirq->regs.status_reg) &
@@ -105,14 +105,14 @@ int spear_shirq_register(struct spear_shirq *shirq)
        if (!shirq->dev_count)
                return -EINVAL;
-        set_irq_chained_handler(shirq->irq, shirq_handler);
+        irq_set_chained_handler(shirq->irq, shirq_handler);
        for (i = 0; i < shirq->dev_count; i++) {
-                set_irq_chip(shirq->dev_config[i].virq, &shirq_chip);
+                irq_set_chip_and_handler(shirq->dev_config[i].virq,
-                set_irq_handler(shirq->dev_config[i].virq, handle_simple_irq);
+                                         &shirq_chip, handle_simple_irq);
                set_irq_flags(shirq->dev_config[i].virq, IRQF_VALID);
-                set_irq_chip_data(shirq->dev_config[i].virq, shirq);
+                irq_set_chip_data(shirq->dev_config[i].virq, shirq);
        }
-        set_irq_data(shirq->irq, shirq);
+        irq_set_handler_data(shirq->irq, shirq);
        return 0;
 }
diff --git a/arch/arm/plat-stmp3xxx/irq.c b/arch/arm/plat-stmp3xxx/irq.c
index aaa168683d4e..6fdf9acf82ed 100644
--- a/arch/arm/plat-stmp3xxx/irq.c
+++ b/arch/arm/plat-stmp3xxx/irq.c
@@ -35,8 +35,7 @@ void __init stmp3xxx_init_irq(struct irq_chip *chip)
        /* Disable all interrupts initially */
        for (i = 0; i < NR_REAL_IRQS; i++) {
                chip->irq_mask(irq_get_irq_data(i));
-                set_irq_chip(i, chip);
+                irq_set_chip_and_handler(i, chip, handle_level_irq);
-                set_irq_handler(i, handle_level_irq);
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
        }
diff --git a/arch/arm/plat-stmp3xxx/pinmux.c b/arch/arm/plat-stmp3xxx/pinmux.c
index 66d5bac3ace2..3def03b3217d 100644
--- a/arch/arm/plat-stmp3xxx/pinmux.c
+++ b/arch/arm/plat-stmp3xxx/pinmux.c
@@ -489,14 +489,13 @@ static void stmp3xxx_gpio_free(struct gpio_chip *chip, unsigned offset)
 static void stmp3xxx_gpio_irq(u32 irq, struct irq_desc *desc)
 {
-        struct stmp3xxx_pinmux_bank *pm = get_irq_data(irq);
+        struct stmp3xxx_pinmux_bank *pm = irq_get_handler_data(irq);
        int gpio_irq = pm->virq;
        u32 stat = __raw_readl(pm->irqstat);
        while (stat) {
                if (stat & 1)
-                        irq_desc[gpio_irq].handle_irq(gpio_irq,
+                        generic_handle_irq(gpio_irq);
-                                &irq_desc[gpio_irq]);
                gpio_irq++;
                stat >>= 1;
        }
@@ -534,15 +533,15 @@ int __init stmp3xxx_pinmux_init(int virtual_irq_start)
                for (virq = pm->virq; virq < pm->virq; virq++) {
                        gpio_irq_chip.irq_mask(irq_get_irq_data(virq));
-                        set_irq_chip(virq, &gpio_irq_chip);
+                        irq_set_chip_and_handler(virq, &gpio_irq_chip,
-                        set_irq_handler(virq, handle_level_irq);
+                                                 handle_level_irq);
                        set_irq_flags(virq, IRQF_VALID);
                }
                r = gpiochip_add(&pm->chip);
                if (r < 0)
                        break;
-                set_irq_chained_handler(pm->irq, stmp3xxx_gpio_irq);
+                irq_set_chained_handler(pm->irq, stmp3xxx_gpio_irq);
-                set_irq_data(pm->irq, pm);
+                irq_set_handler_data(pm->irq, pm);
        }
        return r;
 }
diff --git a/arch/arm/plat-versatile/fpga-irq.c b/arch/arm/plat-versatile/fpga-irq.c
index 31d945d37e4f..f0cc8e19b094 100644
--- a/arch/arm/plat-versatile/fpga-irq.c
+++ b/arch/arm/plat-versatile/fpga-irq.c
@@ -30,7 +30,7 @@ static void fpga_irq_unmask(struct irq_data *d)
 static void fpga_irq_handle(unsigned int irq, struct irq_desc *desc)
 {
-        struct fpga_irq_data *f = get_irq_desc_data(desc);
+        struct fpga_irq_data *f = irq_desc_get_handler_data(desc);
        u32 status = readl(f->base + IRQ_STATUS);
        if (status == 0) {
@@ -55,17 +55,17 @@ void __init fpga_irq_init(int parent_irq, u32 valid, struct fpga_irq_data *f)
        f->chip.irq_unmask = fpga_irq_unmask;
        if (parent_irq != -1) {
-                set_irq_data(parent_irq, f);
+                irq_set_handler_data(parent_irq, f);
-                set_irq_chained_handler(parent_irq, fpga_irq_handle);
+                irq_set_chained_handler(parent_irq, fpga_irq_handle);
        }
        for (i = 0; i < 32; i++) {
                if (valid & (1 << i)) {
                        unsigned int irq = f->irq_start + i;
-                        set_irq_chip_data(irq, f);
+                        irq_set_chip_data(irq, f);
-                        set_irq_chip(irq, &f->chip);
+                        irq_set_chip_and_handler(irq, &f->chip,
-                        set_irq_handler(irq, handle_level_irq);
+                                                 handle_level_irq);
                        set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
                }
        }