diff options
Diffstat (limited to 'arch/arm')
271 files changed, 2476 insertions, 1857 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9adc278a22ab..a9bb43957443 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -321,7 +321,7 @@ config ARCH_CLPS711X | |||
321 | 321 | ||
322 | config ARCH_CNS3XXX | 322 | config ARCH_CNS3XXX |
323 | bool "Cavium Networks CNS3XXX family" | 323 | bool "Cavium Networks CNS3XXX family" |
324 | select CPU_V6 | 324 | select CPU_V6K |
325 | select GENERIC_CLOCKEVENTS | 325 | select GENERIC_CLOCKEVENTS |
326 | select ARM_GIC | 326 | select ARM_GIC |
327 | select MIGHT_HAVE_PCI | 327 | select MIGHT_HAVE_PCI |
@@ -376,6 +376,7 @@ config ARCH_MXC | |||
376 | select ARCH_REQUIRE_GPIOLIB | 376 | select ARCH_REQUIRE_GPIOLIB |
377 | select CLKDEV_LOOKUP | 377 | select CLKDEV_LOOKUP |
378 | select CLKSRC_MMIO | 378 | select CLKSRC_MMIO |
379 | select GENERIC_IRQ_CHIP | ||
379 | select HAVE_SCHED_CLOCK | 380 | select HAVE_SCHED_CLOCK |
380 | help | 381 | help |
381 | Support for Freescale MXC/iMX-based family of processors | 382 | Support for Freescale MXC/iMX-based family of processors |
@@ -591,7 +592,6 @@ config ARCH_TEGRA | |||
591 | select GENERIC_GPIO | 592 | select GENERIC_GPIO |
592 | select HAVE_CLK | 593 | select HAVE_CLK |
593 | select HAVE_SCHED_CLOCK | 594 | select HAVE_SCHED_CLOCK |
594 | select ARCH_HAS_BARRIERS if CACHE_L2X0 | ||
595 | select ARCH_HAS_CPUFREQ | 595 | select ARCH_HAS_CPUFREQ |
596 | help | 596 | help |
597 | This enables support for NVIDIA Tegra based systems (Tegra APX, | 597 | This enables support for NVIDIA Tegra based systems (Tegra APX, |
@@ -618,6 +618,8 @@ config ARCH_PXA | |||
618 | select TICK_ONESHOT | 618 | select TICK_ONESHOT |
619 | select PLAT_PXA | 619 | select PLAT_PXA |
620 | select SPARSE_IRQ | 620 | select SPARSE_IRQ |
621 | select AUTO_ZRELADDR | ||
622 | select MULTI_IRQ_HANDLER | ||
621 | help | 623 | help |
622 | Support for Intel/Marvell's PXA2xx/PXA3xx processor line. | 624 | Support for Intel/Marvell's PXA2xx/PXA3xx processor line. |
623 | 625 | ||
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 942fad97e447..940b20178107 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S | |||
@@ -597,6 +597,8 @@ __common_mmu_cache_on: | |||
597 | sub pc, lr, r0, lsr #32 @ properly flush pipeline | 597 | sub pc, lr, r0, lsr #32 @ properly flush pipeline |
598 | #endif | 598 | #endif |
599 | 599 | ||
600 | #define PROC_ENTRY_SIZE (4*5) | ||
601 | |||
600 | /* | 602 | /* |
601 | * Here follow the relocatable cache support functions for the | 603 | * Here follow the relocatable cache support functions for the |
602 | * various processors. This is a generic hook for locating an | 604 | * various processors. This is a generic hook for locating an |
@@ -624,7 +626,7 @@ call_cache_fn: adr r12, proc_types | |||
624 | ARM( addeq pc, r12, r3 ) @ call cache function | 626 | ARM( addeq pc, r12, r3 ) @ call cache function |
625 | THUMB( addeq r12, r3 ) | 627 | THUMB( addeq r12, r3 ) |
626 | THUMB( moveq pc, r12 ) @ call cache function | 628 | THUMB( moveq pc, r12 ) @ call cache function |
627 | add r12, r12, #4*5 | 629 | add r12, r12, #PROC_ENTRY_SIZE |
628 | b 1b | 630 | b 1b |
629 | 631 | ||
630 | /* | 632 | /* |
@@ -794,6 +796,16 @@ proc_types: | |||
794 | 796 | ||
795 | .size proc_types, . - proc_types | 797 | .size proc_types, . - proc_types |
796 | 798 | ||
799 | /* | ||
800 | * If you get a "non-constant expression in ".if" statement" | ||
801 | * error from the assembler on this line, check that you have | ||
802 | * not accidentally written a "b" instruction where you should | ||
803 | * have written W(b). | ||
804 | */ | ||
805 | .if (. - proc_types) % PROC_ENTRY_SIZE != 0 | ||
806 | .error "The size of one or more proc_types entries is wrong." | ||
807 | .endif | ||
808 | |||
797 | /* | 809 | /* |
798 | * Turn off the Cache and MMU. ARMv3 does not support | 810 | * Turn off the Cache and MMU. ARMv3 does not support |
799 | * reading the control register, but ARMv4 does. | 811 | * reading the control register, but ARMv4 does. |
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c index e5681636626f..841df7d21c2f 100644 --- a/arch/arm/common/dmabounce.c +++ b/arch/arm/common/dmabounce.c | |||
@@ -255,7 +255,7 @@ static inline dma_addr_t map_single(struct device *dev, void *ptr, size_t size, | |||
255 | if (buf == 0) { | 255 | if (buf == 0) { |
256 | dev_err(dev, "%s: unable to map unsafe buffer %p!\n", | 256 | dev_err(dev, "%s: unable to map unsafe buffer %p!\n", |
257 | __func__, ptr); | 257 | __func__, ptr); |
258 | return 0; | 258 | return ~0; |
259 | } | 259 | } |
260 | 260 | ||
261 | dev_dbg(dev, | 261 | dev_dbg(dev, |
diff --git a/arch/arm/configs/mx51_defconfig b/arch/arm/configs/mx51_defconfig index 0ace16cba9b5..88c5802a2351 100644 --- a/arch/arm/configs/mx51_defconfig +++ b/arch/arm/configs/mx51_defconfig | |||
@@ -106,6 +106,7 @@ CONFIG_GPIO_SYSFS=y | |||
106 | CONFIG_USB=y | 106 | CONFIG_USB=y |
107 | CONFIG_USB_EHCI_HCD=y | 107 | CONFIG_USB_EHCI_HCD=y |
108 | CONFIG_USB_EHCI_MXC=y | 108 | CONFIG_USB_EHCI_MXC=y |
109 | CONFIG_USB_STORAGE=y | ||
109 | CONFIG_MMC=y | 110 | CONFIG_MMC=y |
110 | CONFIG_MMC_BLOCK=m | 111 | CONFIG_MMC_BLOCK=m |
111 | CONFIG_MMC_SDHCI=m | 112 | CONFIG_MMC_SDHCI=m |
@@ -145,7 +146,7 @@ CONFIG_ROOT_NFS=y | |||
145 | CONFIG_NLS_DEFAULT="cp437" | 146 | CONFIG_NLS_DEFAULT="cp437" |
146 | CONFIG_NLS_CODEPAGE_437=y | 147 | CONFIG_NLS_CODEPAGE_437=y |
147 | CONFIG_NLS_ASCII=y | 148 | CONFIG_NLS_ASCII=y |
148 | CONFIG_NLS_ISO8859_1=m | 149 | CONFIG_NLS_ISO8859_1=y |
149 | CONFIG_NLS_ISO8859_15=m | 150 | CONFIG_NLS_ISO8859_15=m |
150 | CONFIG_NLS_UTF8=y | 151 | CONFIG_NLS_UTF8=y |
151 | CONFIG_MAGIC_SYSRQ=y | 152 | CONFIG_MAGIC_SYSRQ=y |
diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig index 2bf224310fb4..db2cb7d180dc 100644 --- a/arch/arm/configs/mxs_defconfig +++ b/arch/arm/configs/mxs_defconfig | |||
@@ -22,6 +22,8 @@ CONFIG_BLK_DEV_INTEGRITY=y | |||
22 | # CONFIG_IOSCHED_DEADLINE is not set | 22 | # CONFIG_IOSCHED_DEADLINE is not set |
23 | # CONFIG_IOSCHED_CFQ is not set | 23 | # CONFIG_IOSCHED_CFQ is not set |
24 | CONFIG_ARCH_MXS=y | 24 | CONFIG_ARCH_MXS=y |
25 | CONFIG_MACH_MX23EVK=y | ||
26 | CONFIG_MACH_MX28EVK=y | ||
25 | CONFIG_MACH_STMP378X_DEVB=y | 27 | CONFIG_MACH_STMP378X_DEVB=y |
26 | CONFIG_MACH_TX28=y | 28 | CONFIG_MACH_TX28=y |
27 | # CONFIG_ARM_THUMB is not set | 29 | # CONFIG_ARM_THUMB is not set |
@@ -89,7 +91,7 @@ CONFIG_DISPLAY_SUPPORT=m | |||
89 | # CONFIG_USB_SUPPORT is not set | 91 | # CONFIG_USB_SUPPORT is not set |
90 | CONFIG_MMC=y | 92 | CONFIG_MMC=y |
91 | CONFIG_MMC_MXS=y | 93 | CONFIG_MMC_MXS=y |
92 | CONFIG_RTC_CLASS=m | 94 | CONFIG_RTC_CLASS=y |
93 | CONFIG_RTC_DRV_DS1307=m | 95 | CONFIG_RTC_DRV_DS1307=m |
94 | CONFIG_DMADEVICES=y | 96 | CONFIG_DMADEVICES=y |
95 | CONFIG_MXS_DMA=y | 97 | CONFIG_MXS_DMA=y |
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index bc2d2d75f706..65c3f2474f5e 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h | |||
@@ -13,6 +13,9 @@ | |||
13 | * Do not include any C declarations in this file - it is included by | 13 | * Do not include any C declarations in this file - it is included by |
14 | * assembler source. | 14 | * assembler source. |
15 | */ | 15 | */ |
16 | #ifndef __ASM_ASSEMBLER_H__ | ||
17 | #define __ASM_ASSEMBLER_H__ | ||
18 | |||
16 | #ifndef __ASSEMBLY__ | 19 | #ifndef __ASSEMBLY__ |
17 | #error "Only include this from assembly code" | 20 | #error "Only include this from assembly code" |
18 | #endif | 21 | #endif |
@@ -290,3 +293,4 @@ | |||
290 | .macro ldrusr, reg, ptr, inc, cond=al, rept=1, abort=9001f | 293 | .macro ldrusr, reg, ptr, inc, cond=al, rept=1, abort=9001f |
291 | usracc ldr, \reg, \ptr, \inc, \cond, \rept, \abort | 294 | usracc ldr, \reg, \ptr, \inc, \cond, \rept, \abort |
292 | .endm | 295 | .endm |
296 | #endif /* __ASM_ASSEMBLER_H__ */ | ||
diff --git a/arch/arm/include/asm/entry-macro-multi.S b/arch/arm/include/asm/entry-macro-multi.S index ec0bbf79c71f..2da8547de6d6 100644 --- a/arch/arm/include/asm/entry-macro-multi.S +++ b/arch/arm/include/asm/entry-macro-multi.S | |||
@@ -1,3 +1,5 @@ | |||
1 | #include <asm/assembler.h> | ||
2 | |||
1 | /* | 3 | /* |
2 | * Interrupt handling. Preserves r7, r8, r9 | 4 | * Interrupt handling. Preserves r7, r8, r9 |
3 | */ | 5 | */ |
diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h index 2721a5814cb9..5a526afb5f18 100644 --- a/arch/arm/include/asm/irq.h +++ b/arch/arm/include/asm/irq.h | |||
@@ -23,6 +23,7 @@ struct pt_regs; | |||
23 | extern void migrate_irqs(void); | 23 | extern void migrate_irqs(void); |
24 | 24 | ||
25 | extern void asm_do_IRQ(unsigned int, struct pt_regs *); | 25 | extern void asm_do_IRQ(unsigned int, struct pt_regs *); |
26 | void handle_IRQ(unsigned int, struct pt_regs *); | ||
26 | void init_IRQ(void); | 27 | void init_IRQ(void); |
27 | 28 | ||
28 | #endif | 29 | #endif |
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 83bbad03fcc6..dbc1f41575b2 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c | |||
@@ -67,12 +67,12 @@ int arch_show_interrupts(struct seq_file *p, int prec) | |||
67 | } | 67 | } |
68 | 68 | ||
69 | /* | 69 | /* |
70 | * do_IRQ handles all hardware IRQ's. Decoded IRQs should not | 70 | * handle_IRQ handles all hardware IRQ's. Decoded IRQs should |
71 | * come via this function. Instead, they should provide their | 71 | * not come via this function. Instead, they should provide their |
72 | * own 'handler' | 72 | * own 'handler'. Used by platform code implementing C-based 1st |
73 | * level decoding. | ||
73 | */ | 74 | */ |
74 | asmlinkage void __exception_irq_entry | 75 | void handle_IRQ(unsigned int irq, struct pt_regs *regs) |
75 | asm_do_IRQ(unsigned int irq, struct pt_regs *regs) | ||
76 | { | 76 | { |
77 | struct pt_regs *old_regs = set_irq_regs(regs); | 77 | struct pt_regs *old_regs = set_irq_regs(regs); |
78 | 78 | ||
@@ -97,6 +97,15 @@ asm_do_IRQ(unsigned int irq, struct pt_regs *regs) | |||
97 | set_irq_regs(old_regs); | 97 | set_irq_regs(old_regs); |
98 | } | 98 | } |
99 | 99 | ||
100 | /* | ||
101 | * asm_do_IRQ is the interface to be used from assembly code. | ||
102 | */ | ||
103 | asmlinkage void __exception_irq_entry | ||
104 | asm_do_IRQ(unsigned int irq, struct pt_regs *regs) | ||
105 | { | ||
106 | handle_IRQ(irq, regs); | ||
107 | } | ||
108 | |||
100 | void set_irq_flags(unsigned int irq, unsigned int iflags) | 109 | void set_irq_flags(unsigned int irq, unsigned int iflags) |
101 | { | 110 | { |
102 | unsigned long clr = 0, set = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; | 111 | unsigned long clr = 0, set = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; |
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c index fee7c36349eb..016d6a0830a3 100644 --- a/arch/arm/kernel/module.c +++ b/arch/arm/kernel/module.c | |||
@@ -193,8 +193,17 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, | |||
193 | offset -= 0x02000000; | 193 | offset -= 0x02000000; |
194 | offset += sym->st_value - loc; | 194 | offset += sym->st_value - loc; |
195 | 195 | ||
196 | /* only Thumb addresses allowed (no interworking) */ | 196 | /* |
197 | if (!(offset & 1) || | 197 | * For function symbols, only Thumb addresses are |
198 | * allowed (no interworking). | ||
199 | * | ||
200 | * For non-function symbols, the destination | ||
201 | * has no specific ARM/Thumb disposition, so | ||
202 | * the branch is resolved under the assumption | ||
203 | * that interworking is not required. | ||
204 | */ | ||
205 | if ((ELF32_ST_TYPE(sym->st_info) == STT_FUNC && | ||
206 | !(offset & 1)) || | ||
198 | offset <= (s32)0xff000000 || | 207 | offset <= (s32)0xff000000 || |
199 | offset >= (s32)0x01000000) { | 208 | offset >= (s32)0x01000000) { |
200 | pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n", | 209 | pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n", |
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index d53c0abc4dd3..2b5b1421596c 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c | |||
@@ -583,7 +583,7 @@ static int armpmu_event_init(struct perf_event *event) | |||
583 | static void armpmu_enable(struct pmu *pmu) | 583 | static void armpmu_enable(struct pmu *pmu) |
584 | { | 584 | { |
585 | /* Enable all of the perf events on hardware. */ | 585 | /* Enable all of the perf events on hardware. */ |
586 | int idx; | 586 | int idx, enabled = 0; |
587 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | 587 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); |
588 | 588 | ||
589 | if (!armpmu) | 589 | if (!armpmu) |
@@ -596,9 +596,11 @@ static void armpmu_enable(struct pmu *pmu) | |||
596 | continue; | 596 | continue; |
597 | 597 | ||
598 | armpmu->enable(&event->hw, idx); | 598 | armpmu->enable(&event->hw, idx); |
599 | enabled = 1; | ||
599 | } | 600 | } |
600 | 601 | ||
601 | armpmu->start(); | 602 | if (enabled) |
603 | armpmu->start(); | ||
602 | } | 604 | } |
603 | 605 | ||
604 | static void armpmu_disable(struct pmu *pmu) | 606 | static void armpmu_disable(struct pmu *pmu) |
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index ed11fb08b05a..acbb447ac6b5 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
@@ -73,6 +73,7 @@ __setup("fpe=", fpe_setup); | |||
73 | #endif | 73 | #endif |
74 | 74 | ||
75 | extern void paging_init(struct machine_desc *desc); | 75 | extern void paging_init(struct machine_desc *desc); |
76 | extern void sanity_check_meminfo(void); | ||
76 | extern void reboot_setup(char *str); | 77 | extern void reboot_setup(char *str); |
77 | 78 | ||
78 | unsigned int processor_id; | 79 | unsigned int processor_id; |
@@ -900,6 +901,7 @@ void __init setup_arch(char **cmdline_p) | |||
900 | 901 | ||
901 | parse_early_param(); | 902 | parse_early_param(); |
902 | 903 | ||
904 | sanity_check_meminfo(); | ||
903 | arm_memblock_init(&meminfo, mdesc); | 905 | arm_memblock_init(&meminfo, mdesc); |
904 | 906 | ||
905 | paging_init(mdesc); | 907 | paging_init(mdesc); |
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 344e52b16c8c..e7f92a4321f3 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c | |||
@@ -318,9 +318,13 @@ asmlinkage void __cpuinit secondary_start_kernel(void) | |||
318 | smp_store_cpu_info(cpu); | 318 | smp_store_cpu_info(cpu); |
319 | 319 | ||
320 | /* | 320 | /* |
321 | * OK, now it's safe to let the boot CPU continue | 321 | * OK, now it's safe to let the boot CPU continue. Wait for |
322 | * the CPU migration code to notice that the CPU is online | ||
323 | * before we continue. | ||
322 | */ | 324 | */ |
323 | set_cpu_online(cpu, true); | 325 | set_cpu_online(cpu, true); |
326 | while (!cpu_active(cpu)) | ||
327 | cpu_relax(); | ||
324 | 328 | ||
325 | /* | 329 | /* |
326 | * OK, it's off to the idle thread for us | 330 | * OK, it's off to the idle thread for us |
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index 60636f499cb3..2c277d40cee6 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c | |||
@@ -115,7 +115,7 @@ static void __cpuinit twd_calibrate_rate(void) | |||
115 | twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5); | 115 | twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5); |
116 | 116 | ||
117 | printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000, | 117 | printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000, |
118 | (twd_timer_rate / 1000000) % 100); | 118 | (twd_timer_rate / 10000) % 100); |
119 | } | 119 | } |
120 | } | 120 | } |
121 | 121 | ||
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c index 17fae4a42ab5..f1013d08bb57 100644 --- a/arch/arm/mach-at91/at91cap9.c +++ b/arch/arm/mach-at91/at91cap9.c | |||
@@ -223,15 +223,15 @@ static struct clk *periph_clocks[] __initdata = { | |||
223 | }; | 223 | }; |
224 | 224 | ||
225 | static struct clk_lookup periph_clocks_lookups[] = { | 225 | static struct clk_lookup periph_clocks_lookups[] = { |
226 | CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc.0", &utmi_clk), | 226 | CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk), |
227 | CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc.0", &udphs_clk), | 227 | CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk), |
228 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), | 228 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), |
229 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk), | 229 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk), |
230 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), | 230 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), |
231 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), | 231 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), |
232 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), | 232 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), |
233 | CLKDEV_CON_DEV_ID("ssc", "ssc.0", &ssc0_clk), | 233 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), |
234 | CLKDEV_CON_DEV_ID("ssc", "ssc.1", &ssc1_clk), | 234 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), |
235 | }; | 235 | }; |
236 | 236 | ||
237 | static struct clk_lookup usart_clocks_lookups[] = { | 237 | static struct clk_lookup usart_clocks_lookups[] = { |
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c index cd850ed6f335..dba0d8d8a4bd 100644 --- a/arch/arm/mach-at91/at91cap9_devices.c +++ b/arch/arm/mach-at91/at91cap9_devices.c | |||
@@ -1220,7 +1220,7 @@ void __init at91_set_serial_console(unsigned portnr) | |||
1220 | { | 1220 | { |
1221 | if (portnr < ATMEL_MAX_UART) { | 1221 | if (portnr < ATMEL_MAX_UART) { |
1222 | atmel_default_console_device = at91_uarts[portnr]; | 1222 | atmel_default_console_device = at91_uarts[portnr]; |
1223 | at91cap9_set_console_clock(portnr); | 1223 | at91cap9_set_console_clock(at91_uarts[portnr]->id); |
1224 | } | 1224 | } |
1225 | } | 1225 | } |
1226 | 1226 | ||
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index b228ce9e21a1..83a1a3fee554 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c | |||
@@ -199,9 +199,9 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
199 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk), | 199 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk), |
200 | CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk), | 200 | CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk), |
201 | CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk), | 201 | CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk), |
202 | CLKDEV_CON_DEV_ID("ssc", "ssc.0", &ssc0_clk), | 202 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), |
203 | CLKDEV_CON_DEV_ID("ssc", "ssc.1", &ssc1_clk), | 203 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), |
204 | CLKDEV_CON_DEV_ID("ssc", "ssc.2", &ssc2_clk), | 204 | CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), |
205 | }; | 205 | }; |
206 | 206 | ||
207 | static struct clk_lookup usart_clocks_lookups[] = { | 207 | static struct clk_lookup usart_clocks_lookups[] = { |
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index a0ba475be04c..7227755ffec6 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c | |||
@@ -1135,7 +1135,7 @@ void __init at91_set_serial_console(unsigned portnr) | |||
1135 | { | 1135 | { |
1136 | if (portnr < ATMEL_MAX_UART) { | 1136 | if (portnr < ATMEL_MAX_UART) { |
1137 | atmel_default_console_device = at91_uarts[portnr]; | 1137 | atmel_default_console_device = at91_uarts[portnr]; |
1138 | at91rm9200_set_console_clock(portnr); | 1138 | at91rm9200_set_console_clock(at91_uarts[portnr]->id); |
1139 | } | 1139 | } |
1140 | } | 1140 | } |
1141 | 1141 | ||
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index 1fdeb9058a76..39f81f47b4ba 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c | |||
@@ -1173,7 +1173,7 @@ void __init at91_set_serial_console(unsigned portnr) | |||
1173 | { | 1173 | { |
1174 | if (portnr < ATMEL_MAX_UART) { | 1174 | if (portnr < ATMEL_MAX_UART) { |
1175 | atmel_default_console_device = at91_uarts[portnr]; | 1175 | atmel_default_console_device = at91_uarts[portnr]; |
1176 | at91sam9260_set_console_clock(portnr); | 1176 | at91sam9260_set_console_clock(at91_uarts[portnr]->id); |
1177 | } | 1177 | } |
1178 | } | 1178 | } |
1179 | 1179 | ||
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index 3eb4538fceeb..5004bf0a05f2 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c | |||
@@ -1013,7 +1013,7 @@ void __init at91_set_serial_console(unsigned portnr) | |||
1013 | { | 1013 | { |
1014 | if (portnr < ATMEL_MAX_UART) { | 1014 | if (portnr < ATMEL_MAX_UART) { |
1015 | atmel_default_console_device = at91_uarts[portnr]; | 1015 | atmel_default_console_device = at91_uarts[portnr]; |
1016 | at91sam9261_set_console_clock(portnr); | 1016 | at91sam9261_set_console_clock(at91_uarts[portnr]->id); |
1017 | } | 1017 | } |
1018 | } | 1018 | } |
1019 | 1019 | ||
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index ffe081b77ed0..a050f41fc860 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c | |||
@@ -1395,7 +1395,7 @@ void __init at91_set_serial_console(unsigned portnr) | |||
1395 | { | 1395 | { |
1396 | if (portnr < ATMEL_MAX_UART) { | 1396 | if (portnr < ATMEL_MAX_UART) { |
1397 | atmel_default_console_device = at91_uarts[portnr]; | 1397 | atmel_default_console_device = at91_uarts[portnr]; |
1398 | at91sam9263_set_console_clock(portnr); | 1398 | at91sam9263_set_console_clock(at91_uarts[portnr]->id); |
1399 | } | 1399 | } |
1400 | } | 1400 | } |
1401 | 1401 | ||
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 2bb6ff9af1c7..11e214121b23 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c | |||
@@ -217,11 +217,11 @@ static struct clk *periph_clocks[] __initdata = { | |||
217 | static struct clk_lookup periph_clocks_lookups[] = { | 217 | static struct clk_lookup periph_clocks_lookups[] = { |
218 | /* One additional fake clock for ohci */ | 218 | /* One additional fake clock for ohci */ |
219 | CLKDEV_CON_ID("ohci_clk", &uhphs_clk), | 219 | CLKDEV_CON_ID("ohci_clk", &uhphs_clk), |
220 | CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci.0", &uhphs_clk), | 220 | CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci", &uhphs_clk), |
221 | CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc.0", &utmi_clk), | 221 | CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk), |
222 | CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc.0", &udphs_clk), | 222 | CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk), |
223 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), | 223 | CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.0", &mmc0_clk), |
224 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk), | 224 | CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.1", &mmc1_clk), |
225 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), | 225 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), |
226 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), | 226 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), |
227 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb0_clk), | 227 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb0_clk), |
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index 05674865bc21..600bffb01edb 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c | |||
@@ -1550,7 +1550,7 @@ void __init at91_set_serial_console(unsigned portnr) | |||
1550 | { | 1550 | { |
1551 | if (portnr < ATMEL_MAX_UART) { | 1551 | if (portnr < ATMEL_MAX_UART) { |
1552 | atmel_default_console_device = at91_uarts[portnr]; | 1552 | atmel_default_console_device = at91_uarts[portnr]; |
1553 | at91sam9g45_set_console_clock(portnr); | 1553 | at91sam9g45_set_console_clock(at91_uarts[portnr]->id); |
1554 | } | 1554 | } |
1555 | } | 1555 | } |
1556 | 1556 | ||
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index 1a40f16b66c8..29dff18ed130 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c | |||
@@ -191,8 +191,8 @@ static struct clk *periph_clocks[] __initdata = { | |||
191 | }; | 191 | }; |
192 | 192 | ||
193 | static struct clk_lookup periph_clocks_lookups[] = { | 193 | static struct clk_lookup periph_clocks_lookups[] = { |
194 | CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc.0", &utmi_clk), | 194 | CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk), |
195 | CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc.0", &udphs_clk), | 195 | CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk), |
196 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk), | 196 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk), |
197 | CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk), | 197 | CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk), |
198 | CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), | 198 | CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), |
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index c296045f2b6a..aacb19dc9225 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c | |||
@@ -1168,7 +1168,7 @@ void __init at91_set_serial_console(unsigned portnr) | |||
1168 | { | 1168 | { |
1169 | if (portnr < ATMEL_MAX_UART) { | 1169 | if (portnr < ATMEL_MAX_UART) { |
1170 | atmel_default_console_device = at91_uarts[portnr]; | 1170 | atmel_default_console_device = at91_uarts[portnr]; |
1171 | at91sam9rl_set_console_clock(portnr); | 1171 | at91sam9rl_set_console_clock(at91_uarts[portnr]->id); |
1172 | } | 1172 | } |
1173 | } | 1173 | } |
1174 | 1174 | ||
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c index 1904fdf87613..cdb65d483250 100644 --- a/arch/arm/mach-at91/board-cap9adk.c +++ b/arch/arm/mach-at91/board-cap9adk.c | |||
@@ -215,7 +215,7 @@ static void __init cap9adk_add_device_nand(void) | |||
215 | csa = at91_sys_read(AT91_MATRIX_EBICSA); | 215 | csa = at91_sys_read(AT91_MATRIX_EBICSA); |
216 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); | 216 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); |
217 | 217 | ||
218 | cap9adk_nand_data.bus_width_16 = !board_have_nand_8bit(); | 218 | cap9adk_nand_data.bus_width_16 = board_have_nand_16bit(); |
219 | /* setup bus-width (8 or 16) */ | 219 | /* setup bus-width (8 or 16) */ |
220 | if (cap9adk_nand_data.bus_width_16) | 220 | if (cap9adk_nand_data.bus_width_16) |
221 | cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16; | 221 | cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16; |
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c index d600dc123227..5c240743c5b7 100644 --- a/arch/arm/mach-at91/board-sam9260ek.c +++ b/arch/arm/mach-at91/board-sam9260ek.c | |||
@@ -214,7 +214,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = { | |||
214 | 214 | ||
215 | static void __init ek_add_device_nand(void) | 215 | static void __init ek_add_device_nand(void) |
216 | { | 216 | { |
217 | ek_nand_data.bus_width_16 = !board_have_nand_8bit(); | 217 | ek_nand_data.bus_width_16 = board_have_nand_16bit(); |
218 | /* setup bus-width (8 or 16) */ | 218 | /* setup bus-width (8 or 16) */ |
219 | if (ek_nand_data.bus_width_16) | 219 | if (ek_nand_data.bus_width_16) |
220 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; | 220 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; |
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c index f897f84d43dc..b60c22b6e241 100644 --- a/arch/arm/mach-at91/board-sam9261ek.c +++ b/arch/arm/mach-at91/board-sam9261ek.c | |||
@@ -220,7 +220,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = { | |||
220 | 220 | ||
221 | static void __init ek_add_device_nand(void) | 221 | static void __init ek_add_device_nand(void) |
222 | { | 222 | { |
223 | ek_nand_data.bus_width_16 = !board_have_nand_8bit(); | 223 | ek_nand_data.bus_width_16 = board_have_nand_16bit(); |
224 | /* setup bus-width (8 or 16) */ | 224 | /* setup bus-width (8 or 16) */ |
225 | if (ek_nand_data.bus_width_16) | 225 | if (ek_nand_data.bus_width_16) |
226 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; | 226 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; |
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c index 605b26f40a4c..9bbdc92ea194 100644 --- a/arch/arm/mach-at91/board-sam9263ek.c +++ b/arch/arm/mach-at91/board-sam9263ek.c | |||
@@ -221,7 +221,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = { | |||
221 | 221 | ||
222 | static void __init ek_add_device_nand(void) | 222 | static void __init ek_add_device_nand(void) |
223 | { | 223 | { |
224 | ek_nand_data.bus_width_16 = !board_have_nand_8bit(); | 224 | ek_nand_data.bus_width_16 = board_have_nand_16bit(); |
225 | /* setup bus-width (8 or 16) */ | 225 | /* setup bus-width (8 or 16) */ |
226 | if (ek_nand_data.bus_width_16) | 226 | if (ek_nand_data.bus_width_16) |
227 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; | 227 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; |
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c index 7624cf0d006b..1325a50101a8 100644 --- a/arch/arm/mach-at91/board-sam9g20ek.c +++ b/arch/arm/mach-at91/board-sam9g20ek.c | |||
@@ -198,7 +198,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = { | |||
198 | 198 | ||
199 | static void __init ek_add_device_nand(void) | 199 | static void __init ek_add_device_nand(void) |
200 | { | 200 | { |
201 | ek_nand_data.bus_width_16 = !board_have_nand_8bit(); | 201 | ek_nand_data.bus_width_16 = board_have_nand_16bit(); |
202 | /* setup bus-width (8 or 16) */ | 202 | /* setup bus-width (8 or 16) */ |
203 | if (ek_nand_data.bus_width_16) | 203 | if (ek_nand_data.bus_width_16) |
204 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; | 204 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; |
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index 063c95d0e8f0..33eaa135f248 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c | |||
@@ -178,7 +178,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = { | |||
178 | 178 | ||
179 | static void __init ek_add_device_nand(void) | 179 | static void __init ek_add_device_nand(void) |
180 | { | 180 | { |
181 | ek_nand_data.bus_width_16 = !board_have_nand_8bit(); | 181 | ek_nand_data.bus_width_16 = board_have_nand_16bit(); |
182 | /* setup bus-width (8 or 16) */ | 182 | /* setup bus-width (8 or 16) */ |
183 | if (ek_nand_data.bus_width_16) | 183 | if (ek_nand_data.bus_width_16) |
184 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; | 184 | ek_nand_smc_config.mode |= AT91_SMC_DBW_16; |
diff --git a/arch/arm/mach-at91/include/mach/system_rev.h b/arch/arm/mach-at91/include/mach/system_rev.h index b855ee75f72c..8f4866045b41 100644 --- a/arch/arm/mach-at91/include/mach/system_rev.h +++ b/arch/arm/mach-at91/include/mach/system_rev.h | |||
@@ -13,13 +13,13 @@ | |||
13 | * the 16-31 bit are reserved for at91 generic information | 13 | * the 16-31 bit are reserved for at91 generic information |
14 | * | 14 | * |
15 | * bit 31: | 15 | * bit 31: |
16 | * 0 => nand 16 bit | 16 | * 0 => nand 8 bit |
17 | * 1 => nand 8 bit | 17 | * 1 => nand 16 bit |
18 | */ | 18 | */ |
19 | #define BOARD_HAVE_NAND_8BIT (1 << 31) | 19 | #define BOARD_HAVE_NAND_16BIT (1 << 31) |
20 | static int inline board_have_nand_8bit(void) | 20 | static inline int board_have_nand_16bit(void) |
21 | { | 21 | { |
22 | return system_rev & BOARD_HAVE_NAND_8BIT; | 22 | return system_rev & BOARD_HAVE_NAND_16BIT; |
23 | } | 23 | } |
24 | 24 | ||
25 | #endif /* __ARCH_SYSTEM_REV_H__ */ | 25 | #endif /* __ARCH_SYSTEM_REV_H__ */ |
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c index 08e5c8759502..4b804baa5f80 100644 --- a/arch/arm/mach-cns3xxx/cns3420vb.c +++ b/arch/arm/mach-cns3xxx/cns3420vb.c | |||
@@ -170,6 +170,8 @@ static struct platform_device *cns3420_pdevs[] __initdata = { | |||
170 | 170 | ||
171 | static void __init cns3420_init(void) | 171 | static void __init cns3420_init(void) |
172 | { | 172 | { |
173 | cns3xxx_l2x0_init(); | ||
174 | |||
173 | platform_add_devices(cns3420_pdevs, ARRAY_SIZE(cns3420_pdevs)); | 175 | platform_add_devices(cns3420_pdevs, ARRAY_SIZE(cns3420_pdevs)); |
174 | 176 | ||
175 | cns3xxx_ahci_init(); | 177 | cns3xxx_ahci_init(); |
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c index da30078a80c1..941a308e1253 100644 --- a/arch/arm/mach-cns3xxx/core.c +++ b/arch/arm/mach-cns3xxx/core.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <asm/mach/time.h> | 16 | #include <asm/mach/time.h> |
17 | #include <asm/mach/irq.h> | 17 | #include <asm/mach/irq.h> |
18 | #include <asm/hardware/gic.h> | 18 | #include <asm/hardware/gic.h> |
19 | #include <asm/hardware/cache-l2x0.h> | ||
19 | #include <mach/cns3xxx.h> | 20 | #include <mach/cns3xxx.h> |
20 | #include "core.h" | 21 | #include "core.h" |
21 | 22 | ||
@@ -244,3 +245,45 @@ static void __init cns3xxx_timer_init(void) | |||
244 | struct sys_timer cns3xxx_timer = { | 245 | struct sys_timer cns3xxx_timer = { |
245 | .init = cns3xxx_timer_init, | 246 | .init = cns3xxx_timer_init, |
246 | }; | 247 | }; |
248 | |||
249 | #ifdef CONFIG_CACHE_L2X0 | ||
250 | |||
251 | void __init cns3xxx_l2x0_init(void) | ||
252 | { | ||
253 | void __iomem *base = ioremap(CNS3XXX_L2C_BASE, SZ_4K); | ||
254 | u32 val; | ||
255 | |||
256 | if (WARN_ON(!base)) | ||
257 | return; | ||
258 | |||
259 | /* | ||
260 | * Tag RAM Control register | ||
261 | * | ||
262 | * bit[10:8] - 1 cycle of write accesses latency | ||
263 | * bit[6:4] - 1 cycle of read accesses latency | ||
264 | * bit[3:0] - 1 cycle of setup latency | ||
265 | * | ||
266 | * 1 cycle of latency for setup, read and write accesses | ||
267 | */ | ||
268 | val = readl(base + L2X0_TAG_LATENCY_CTRL); | ||
269 | val &= 0xfffff888; | ||
270 | writel(val, base + L2X0_TAG_LATENCY_CTRL); | ||
271 | |||
272 | /* | ||
273 | * Data RAM Control register | ||
274 | * | ||
275 | * bit[10:8] - 1 cycles of write accesses latency | ||
276 | * bit[6:4] - 1 cycles of read accesses latency | ||
277 | * bit[3:0] - 1 cycle of setup latency | ||
278 | * | ||
279 | * 1 cycle of latency for setup, read and write accesses | ||
280 | */ | ||
281 | val = readl(base + L2X0_DATA_LATENCY_CTRL); | ||
282 | val &= 0xfffff888; | ||
283 | writel(val, base + L2X0_DATA_LATENCY_CTRL); | ||
284 | |||
285 | /* 32 KiB, 8-way, parity disable */ | ||
286 | l2x0_init(base, 0x00540000, 0xfe000fff); | ||
287 | } | ||
288 | |||
289 | #endif /* CONFIG_CACHE_L2X0 */ | ||
diff --git a/arch/arm/mach-cns3xxx/core.h b/arch/arm/mach-cns3xxx/core.h index ffeb3a8b73ba..fcd225343c61 100644 --- a/arch/arm/mach-cns3xxx/core.h +++ b/arch/arm/mach-cns3xxx/core.h | |||
@@ -13,6 +13,12 @@ | |||
13 | 13 | ||
14 | extern struct sys_timer cns3xxx_timer; | 14 | extern struct sys_timer cns3xxx_timer; |
15 | 15 | ||
16 | #ifdef CONFIG_CACHE_L2X0 | ||
17 | void __init cns3xxx_l2x0_init(void); | ||
18 | #else | ||
19 | static inline void cns3xxx_l2x0_init(void) {} | ||
20 | #endif /* CONFIG_CACHE_L2X0 */ | ||
21 | |||
16 | void __init cns3xxx_map_io(void); | 22 | void __init cns3xxx_map_io(void); |
17 | void __init cns3xxx_init_irq(void); | 23 | void __init cns3xxx_init_irq(void); |
18 | void cns3xxx_power_off(void); | 24 | void cns3xxx_power_off(void); |
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index a7b41bf505f1..3d2c0d7d129f 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c | |||
@@ -1117,6 +1117,8 @@ static __init int da850_evm_init_cpufreq(void) | |||
1117 | static __init int da850_evm_init_cpufreq(void) { return 0; } | 1117 | static __init int da850_evm_init_cpufreq(void) { return 0; } |
1118 | #endif | 1118 | #endif |
1119 | 1119 | ||
1120 | #define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000) | ||
1121 | |||
1120 | static __init void da850_evm_init(void) | 1122 | static __init void da850_evm_init(void) |
1121 | { | 1123 | { |
1122 | int ret; | 1124 | int ret; |
@@ -1237,6 +1239,11 @@ static __init void da850_evm_init(void) | |||
1237 | if (ret) | 1239 | if (ret) |
1238 | pr_warning("da850_evm_init: spi 1 registration failed: %d\n", | 1240 | pr_warning("da850_evm_init: spi 1 registration failed: %d\n", |
1239 | ret); | 1241 | ret); |
1242 | |||
1243 | ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE); | ||
1244 | if (ret) | ||
1245 | pr_warning("da850_evm_init: sata registration failed: %d\n", | ||
1246 | ret); | ||
1240 | } | 1247 | } |
1241 | 1248 | ||
1242 | #ifdef CONFIG_SERIAL_8250_CONSOLE | 1249 | #ifdef CONFIG_SERIAL_8250_CONSOLE |
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index e4e3af179f02..d0450ac2c00e 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c | |||
@@ -44,7 +44,7 @@ static void __clk_enable(struct clk *clk) | |||
44 | __clk_enable(clk->parent); | 44 | __clk_enable(clk->parent); |
45 | if (clk->usecount++ == 0 && (clk->flags & CLK_PSC)) | 45 | if (clk->usecount++ == 0 && (clk->flags & CLK_PSC)) |
46 | davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, | 46 | davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, |
47 | PSC_STATE_ENABLE); | 47 | true, clk->flags); |
48 | } | 48 | } |
49 | 49 | ||
50 | static void __clk_disable(struct clk *clk) | 50 | static void __clk_disable(struct clk *clk) |
@@ -54,8 +54,7 @@ static void __clk_disable(struct clk *clk) | |||
54 | if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) && | 54 | if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) && |
55 | (clk->flags & CLK_PSC)) | 55 | (clk->flags & CLK_PSC)) |
56 | davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, | 56 | davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, |
57 | (clk->flags & PSC_SWRSTDISABLE) ? | 57 | false, clk->flags); |
58 | PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE); | ||
59 | if (clk->parent) | 58 | if (clk->parent) |
60 | __clk_disable(clk->parent); | 59 | __clk_disable(clk->parent); |
61 | } | 60 | } |
@@ -239,8 +238,7 @@ static int __init clk_disable_unused(void) | |||
239 | pr_debug("Clocks: disable unused %s\n", ck->name); | 238 | pr_debug("Clocks: disable unused %s\n", ck->name); |
240 | 239 | ||
241 | davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc, | 240 | davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc, |
242 | (ck->flags & PSC_SWRSTDISABLE) ? | 241 | false, ck->flags); |
243 | PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE); | ||
244 | } | 242 | } |
245 | spin_unlock_irq(&clockfw_lock); | 243 | spin_unlock_irq(&clockfw_lock); |
246 | 244 | ||
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index 0dd22031ec62..48ee4627e188 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h | |||
@@ -111,6 +111,7 @@ struct clk { | |||
111 | #define CLK_PLL BIT(4) /* PLL-derived clock */ | 111 | #define CLK_PLL BIT(4) /* PLL-derived clock */ |
112 | #define PRE_PLL BIT(5) /* source is before PLL mult/div */ | 112 | #define PRE_PLL BIT(5) /* source is before PLL mult/div */ |
113 | #define PSC_SWRSTDISABLE BIT(6) /* Disable state is SwRstDisable */ | 113 | #define PSC_SWRSTDISABLE BIT(6) /* Disable state is SwRstDisable */ |
114 | #define PSC_FORCE BIT(7) /* Force module state transtition */ | ||
114 | 115 | ||
115 | #define CLK(dev, con, ck) \ | 116 | #define CLK(dev, con, ck) \ |
116 | { \ | 117 | { \ |
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 133aac405853..935dbed5c541 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c | |||
@@ -58,6 +58,7 @@ static struct pll_data pll0_data = { | |||
58 | static struct clk ref_clk = { | 58 | static struct clk ref_clk = { |
59 | .name = "ref_clk", | 59 | .name = "ref_clk", |
60 | .rate = DA850_REF_FREQ, | 60 | .rate = DA850_REF_FREQ, |
61 | .set_rate = davinci_simple_set_rate, | ||
61 | }; | 62 | }; |
62 | 63 | ||
63 | static struct clk pll0_clk = { | 64 | static struct clk pll0_clk = { |
@@ -373,6 +374,14 @@ static struct clk spi1_clk = { | |||
373 | .flags = DA850_CLK_ASYNC3, | 374 | .flags = DA850_CLK_ASYNC3, |
374 | }; | 375 | }; |
375 | 376 | ||
377 | static struct clk sata_clk = { | ||
378 | .name = "sata", | ||
379 | .parent = &pll0_sysclk2, | ||
380 | .lpsc = DA850_LPSC1_SATA, | ||
381 | .gpsc = 1, | ||
382 | .flags = PSC_FORCE, | ||
383 | }; | ||
384 | |||
376 | static struct clk_lookup da850_clks[] = { | 385 | static struct clk_lookup da850_clks[] = { |
377 | CLK(NULL, "ref", &ref_clk), | 386 | CLK(NULL, "ref", &ref_clk), |
378 | CLK(NULL, "pll0", &pll0_clk), | 387 | CLK(NULL, "pll0", &pll0_clk), |
@@ -419,6 +428,7 @@ static struct clk_lookup da850_clks[] = { | |||
419 | CLK(NULL, "usb20", &usb20_clk), | 428 | CLK(NULL, "usb20", &usb20_clk), |
420 | CLK("spi_davinci.0", NULL, &spi0_clk), | 429 | CLK("spi_davinci.0", NULL, &spi0_clk), |
421 | CLK("spi_davinci.1", NULL, &spi1_clk), | 430 | CLK("spi_davinci.1", NULL, &spi1_clk), |
431 | CLK("ahci", NULL, &sata_clk), | ||
422 | CLK(NULL, NULL, NULL), | 432 | CLK(NULL, NULL, NULL), |
423 | }; | 433 | }; |
424 | 434 | ||
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index fc4e98ea7543..2f7e719636f1 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c | |||
@@ -14,6 +14,8 @@ | |||
14 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
15 | #include <linux/dma-mapping.h> | 15 | #include <linux/dma-mapping.h> |
16 | #include <linux/serial_8250.h> | 16 | #include <linux/serial_8250.h> |
17 | #include <linux/ahci_platform.h> | ||
18 | #include <linux/clk.h> | ||
17 | 19 | ||
18 | #include <mach/cputype.h> | 20 | #include <mach/cputype.h> |
19 | #include <mach/common.h> | 21 | #include <mach/common.h> |
@@ -33,6 +35,7 @@ | |||
33 | #define DA8XX_SPI0_BASE 0x01c41000 | 35 | #define DA8XX_SPI0_BASE 0x01c41000 |
34 | #define DA830_SPI1_BASE 0x01e12000 | 36 | #define DA830_SPI1_BASE 0x01e12000 |
35 | #define DA8XX_LCD_CNTRL_BASE 0x01e13000 | 37 | #define DA8XX_LCD_CNTRL_BASE 0x01e13000 |
38 | #define DA850_SATA_BASE 0x01e18000 | ||
36 | #define DA850_MMCSD1_BASE 0x01e1b000 | 39 | #define DA850_MMCSD1_BASE 0x01e1b000 |
37 | #define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000 | 40 | #define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000 |
38 | #define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000 | 41 | #define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000 |
@@ -842,3 +845,126 @@ int __init da8xx_register_spi(int instance, struct spi_board_info *info, | |||
842 | 845 | ||
843 | return platform_device_register(&da8xx_spi_device[instance]); | 846 | return platform_device_register(&da8xx_spi_device[instance]); |
844 | } | 847 | } |
848 | |||
849 | #ifdef CONFIG_ARCH_DAVINCI_DA850 | ||
850 | |||
851 | static struct resource da850_sata_resources[] = { | ||
852 | { | ||
853 | .start = DA850_SATA_BASE, | ||
854 | .end = DA850_SATA_BASE + 0x1fff, | ||
855 | .flags = IORESOURCE_MEM, | ||
856 | }, | ||
857 | { | ||
858 | .start = IRQ_DA850_SATAINT, | ||
859 | .flags = IORESOURCE_IRQ, | ||
860 | }, | ||
861 | }; | ||
862 | |||
863 | /* SATA PHY Control Register offset from AHCI base */ | ||
864 | #define SATA_P0PHYCR_REG 0x178 | ||
865 | |||
866 | #define SATA_PHY_MPY(x) ((x) << 0) | ||
867 | #define SATA_PHY_LOS(x) ((x) << 6) | ||
868 | #define SATA_PHY_RXCDR(x) ((x) << 10) | ||
869 | #define SATA_PHY_RXEQ(x) ((x) << 13) | ||
870 | #define SATA_PHY_TXSWING(x) ((x) << 19) | ||
871 | #define SATA_PHY_ENPLL(x) ((x) << 31) | ||
872 | |||
873 | static struct clk *da850_sata_clk; | ||
874 | static unsigned long da850_sata_refclkpn; | ||
875 | |||
876 | /* Supported DA850 SATA crystal frequencies */ | ||
877 | #define KHZ_TO_HZ(freq) ((freq) * 1000) | ||
878 | static unsigned long da850_sata_xtal[] = { | ||
879 | KHZ_TO_HZ(300000), | ||
880 | KHZ_TO_HZ(250000), | ||
881 | 0, /* Reserved */ | ||
882 | KHZ_TO_HZ(187500), | ||
883 | KHZ_TO_HZ(150000), | ||
884 | KHZ_TO_HZ(125000), | ||
885 | KHZ_TO_HZ(120000), | ||
886 | KHZ_TO_HZ(100000), | ||
887 | KHZ_TO_HZ(75000), | ||
888 | KHZ_TO_HZ(60000), | ||
889 | }; | ||
890 | |||
891 | static int da850_sata_init(struct device *dev, void __iomem *addr) | ||
892 | { | ||
893 | int i, ret; | ||
894 | unsigned int val; | ||
895 | |||
896 | da850_sata_clk = clk_get(dev, NULL); | ||
897 | if (IS_ERR(da850_sata_clk)) | ||
898 | return PTR_ERR(da850_sata_clk); | ||
899 | |||
900 | ret = clk_enable(da850_sata_clk); | ||
901 | if (ret) | ||
902 | goto err0; | ||
903 | |||
904 | /* Enable SATA clock receiver */ | ||
905 | val = __raw_readl(DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG)); | ||
906 | val &= ~BIT(0); | ||
907 | __raw_writel(val, DA8XX_SYSCFG1_VIRT(DA8XX_PWRDN_REG)); | ||
908 | |||
909 | /* Get the multiplier needed for 1.5GHz PLL output */ | ||
910 | for (i = 0; i < ARRAY_SIZE(da850_sata_xtal); i++) | ||
911 | if (da850_sata_xtal[i] == da850_sata_refclkpn) | ||
912 | break; | ||
913 | |||
914 | if (i == ARRAY_SIZE(da850_sata_xtal)) { | ||
915 | ret = -EINVAL; | ||
916 | goto err1; | ||
917 | } | ||
918 | |||
919 | val = SATA_PHY_MPY(i + 1) | | ||
920 | SATA_PHY_LOS(1) | | ||
921 | SATA_PHY_RXCDR(4) | | ||
922 | SATA_PHY_RXEQ(1) | | ||
923 | SATA_PHY_TXSWING(3) | | ||
924 | SATA_PHY_ENPLL(1); | ||
925 | |||
926 | __raw_writel(val, addr + SATA_P0PHYCR_REG); | ||
927 | |||
928 | return 0; | ||
929 | |||
930 | err1: | ||
931 | clk_disable(da850_sata_clk); | ||
932 | err0: | ||
933 | clk_put(da850_sata_clk); | ||
934 | return ret; | ||
935 | } | ||
936 | |||
937 | static void da850_sata_exit(struct device *dev) | ||
938 | { | ||
939 | clk_disable(da850_sata_clk); | ||
940 | clk_put(da850_sata_clk); | ||
941 | } | ||
942 | |||
943 | static struct ahci_platform_data da850_sata_pdata = { | ||
944 | .init = da850_sata_init, | ||
945 | .exit = da850_sata_exit, | ||
946 | }; | ||
947 | |||
948 | static u64 da850_sata_dmamask = DMA_BIT_MASK(32); | ||
949 | |||
950 | static struct platform_device da850_sata_device = { | ||
951 | .name = "ahci", | ||
952 | .id = -1, | ||
953 | .dev = { | ||
954 | .platform_data = &da850_sata_pdata, | ||
955 | .dma_mask = &da850_sata_dmamask, | ||
956 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
957 | }, | ||
958 | .num_resources = ARRAY_SIZE(da850_sata_resources), | ||
959 | .resource = da850_sata_resources, | ||
960 | }; | ||
961 | |||
962 | int __init da850_register_sata(unsigned long refclkpn) | ||
963 | { | ||
964 | da850_sata_refclkpn = refclkpn; | ||
965 | if (!da850_sata_refclkpn) | ||
966 | return -EINVAL; | ||
967 | |||
968 | return platform_device_register(&da850_sata_device); | ||
969 | } | ||
970 | #endif | ||
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index ad64da713fc8..eaca7d8b9d68 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h | |||
@@ -57,6 +57,7 @@ extern unsigned int da850_max_speed; | |||
57 | #define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000) | 57 | #define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000) |
58 | #define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x)) | 58 | #define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x)) |
59 | #define DA8XX_DEEPSLEEP_REG 0x8 | 59 | #define DA8XX_DEEPSLEEP_REG 0x8 |
60 | #define DA8XX_PWRDN_REG 0x18 | ||
60 | 61 | ||
61 | #define DA8XX_PSC0_BASE 0x01c10000 | 62 | #define DA8XX_PSC0_BASE 0x01c10000 |
62 | #define DA8XX_PLL0_BASE 0x01c11000 | 63 | #define DA8XX_PLL0_BASE 0x01c11000 |
@@ -89,6 +90,7 @@ int da850_register_cpufreq(char *async_clk); | |||
89 | int da8xx_register_cpuidle(void); | 90 | int da8xx_register_cpuidle(void); |
90 | void __iomem * __init da8xx_get_mem_ctlr(void); | 91 | void __iomem * __init da8xx_get_mem_ctlr(void); |
91 | int da850_register_pm(struct platform_device *pdev); | 92 | int da850_register_pm(struct platform_device *pdev); |
93 | int __init da850_register_sata(unsigned long refclkpn); | ||
92 | 94 | ||
93 | extern struct platform_device da8xx_serial_device; | 95 | extern struct platform_device da8xx_serial_device; |
94 | extern struct emac_platform_data da8xx_emac_pdata; | 96 | extern struct emac_platform_data da8xx_emac_pdata; |
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index a47e6f29206e..6213f0d4211d 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h | |||
@@ -244,12 +244,13 @@ | |||
244 | #define PSC_STATE_ENABLE 3 | 244 | #define PSC_STATE_ENABLE 3 |
245 | 245 | ||
246 | #define MDSTAT_STATE_MASK 0x1f | 246 | #define MDSTAT_STATE_MASK 0x1f |
247 | #define MDCTL_FORCE BIT(31) | ||
247 | 248 | ||
248 | #ifndef __ASSEMBLER__ | 249 | #ifndef __ASSEMBLER__ |
249 | 250 | ||
250 | extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); | 251 | extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); |
251 | extern void davinci_psc_config(unsigned int domain, unsigned int ctlr, | 252 | extern void davinci_psc_config(unsigned int domain, unsigned int ctlr, |
252 | unsigned int id, u32 next_state); | 253 | unsigned int id, bool enable, u32 flags); |
253 | 254 | ||
254 | #endif | 255 | #endif |
255 | 256 | ||
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c index a41580400701..1fb6bdff38c1 100644 --- a/arch/arm/mach-davinci/psc.c +++ b/arch/arm/mach-davinci/psc.c | |||
@@ -25,6 +25,8 @@ | |||
25 | #include <mach/cputype.h> | 25 | #include <mach/cputype.h> |
26 | #include <mach/psc.h> | 26 | #include <mach/psc.h> |
27 | 27 | ||
28 | #include "clock.h" | ||
29 | |||
28 | /* Return nonzero iff the domain's clock is active */ | 30 | /* Return nonzero iff the domain's clock is active */ |
29 | int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id) | 31 | int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id) |
30 | { | 32 | { |
@@ -48,11 +50,12 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id) | |||
48 | 50 | ||
49 | /* Enable or disable a PSC domain */ | 51 | /* Enable or disable a PSC domain */ |
50 | void davinci_psc_config(unsigned int domain, unsigned int ctlr, | 52 | void davinci_psc_config(unsigned int domain, unsigned int ctlr, |
51 | unsigned int id, u32 next_state) | 53 | unsigned int id, bool enable, u32 flags) |
52 | { | 54 | { |
53 | u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl; | 55 | u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl; |
54 | void __iomem *psc_base; | 56 | void __iomem *psc_base; |
55 | struct davinci_soc_info *soc_info = &davinci_soc_info; | 57 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
58 | u32 next_state = PSC_STATE_ENABLE; | ||
56 | 59 | ||
57 | if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { | 60 | if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { |
58 | pr_warning("PSC: Bad psc data: 0x%x[%d]\n", | 61 | pr_warning("PSC: Bad psc data: 0x%x[%d]\n", |
@@ -62,9 +65,18 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr, | |||
62 | 65 | ||
63 | psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K); | 66 | psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K); |
64 | 67 | ||
68 | if (!enable) { | ||
69 | if (flags & PSC_SWRSTDISABLE) | ||
70 | next_state = PSC_STATE_SWRSTDISABLE; | ||
71 | else | ||
72 | next_state = PSC_STATE_DISABLE; | ||
73 | } | ||
74 | |||
65 | mdctl = __raw_readl(psc_base + MDCTL + 4 * id); | 75 | mdctl = __raw_readl(psc_base + MDCTL + 4 * id); |
66 | mdctl &= ~MDSTAT_STATE_MASK; | 76 | mdctl &= ~MDSTAT_STATE_MASK; |
67 | mdctl |= next_state; | 77 | mdctl |= next_state; |
78 | if (flags & PSC_FORCE) | ||
79 | mdctl |= MDCTL_FORCE; | ||
68 | __raw_writel(mdctl, psc_base + MDCTL + 4 * id); | 80 | __raw_writel(mdctl, psc_base + MDCTL + 4 * id); |
69 | 81 | ||
70 | pdstat = __raw_readl(psc_base + PDSTAT); | 82 | pdstat = __raw_readl(psc_base + PDSTAT); |
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 1d4b65fd673e..6659a0d137a3 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c | |||
@@ -251,9 +251,9 @@ static void ep93xx_uart_set_mctrl(struct amba_device *dev, | |||
251 | unsigned int mcr; | 251 | unsigned int mcr; |
252 | 252 | ||
253 | mcr = 0; | 253 | mcr = 0; |
254 | if (!(mctrl & TIOCM_RTS)) | 254 | if (mctrl & TIOCM_RTS) |
255 | mcr |= 2; | 255 | mcr |= 2; |
256 | if (!(mctrl & TIOCM_DTR)) | 256 | if (mctrl & TIOCM_DTR) |
257 | mcr |= 1; | 257 | mcr |= 1; |
258 | 258 | ||
259 | __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET); | 259 | __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET); |
diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c index 9babe4473e88..bfd621460abf 100644 --- a/arch/arm/mach-exynos4/cpu.c +++ b/arch/arm/mach-exynos4/cpu.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <plat/sdhci.h> | 23 | #include <plat/sdhci.h> |
24 | #include <plat/devs.h> | 24 | #include <plat/devs.h> |
25 | #include <plat/fimc-core.h> | 25 | #include <plat/fimc-core.h> |
26 | #include <plat/iic-core.h> | ||
26 | 27 | ||
27 | #include <mach/regs-irq.h> | 28 | #include <mach/regs-irq.h> |
28 | 29 | ||
@@ -132,6 +133,11 @@ void __init exynos4_map_io(void) | |||
132 | s3c_fimc_setname(1, "exynos4-fimc"); | 133 | s3c_fimc_setname(1, "exynos4-fimc"); |
133 | s3c_fimc_setname(2, "exynos4-fimc"); | 134 | s3c_fimc_setname(2, "exynos4-fimc"); |
134 | s3c_fimc_setname(3, "exynos4-fimc"); | 135 | s3c_fimc_setname(3, "exynos4-fimc"); |
136 | |||
137 | /* The I2C bus controllers are directly compatible with s3c2440 */ | ||
138 | s3c_i2c0_setname("s3c2440-i2c"); | ||
139 | s3c_i2c1_setname("s3c2440-i2c"); | ||
140 | s3c_i2c2_setname("s3c2440-i2c"); | ||
135 | } | 141 | } |
136 | 142 | ||
137 | void __init exynos4_init_clocks(int xtal) | 143 | void __init exynos4_init_clocks(int xtal) |
diff --git a/arch/arm/mach-exynos4/dev-audio.c b/arch/arm/mach-exynos4/dev-audio.c index 1eed5f9f7bd3..983069a53239 100644 --- a/arch/arm/mach-exynos4/dev-audio.c +++ b/arch/arm/mach-exynos4/dev-audio.c | |||
@@ -330,7 +330,7 @@ struct platform_device exynos4_device_ac97 = { | |||
330 | 330 | ||
331 | static int exynos4_spdif_cfg_gpio(struct platform_device *pdev) | 331 | static int exynos4_spdif_cfg_gpio(struct platform_device *pdev) |
332 | { | 332 | { |
333 | s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 2, S3C_GPIO_SFN(3)); | 333 | s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 2, S3C_GPIO_SFN(4)); |
334 | 334 | ||
335 | return 0; | 335 | return 0; |
336 | } | 336 | } |
diff --git a/arch/arm/mach-exynos4/headsmp.S b/arch/arm/mach-exynos4/headsmp.S index 6c6cfc50c46b..3cdeb3647542 100644 --- a/arch/arm/mach-exynos4/headsmp.S +++ b/arch/arm/mach-exynos4/headsmp.S | |||
@@ -13,7 +13,7 @@ | |||
13 | #include <linux/linkage.h> | 13 | #include <linux/linkage.h> |
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | 15 | ||
16 | __INIT | 16 | __CPUINIT |
17 | 17 | ||
18 | /* | 18 | /* |
19 | * exynos4 specific entry point for secondary CPUs. This provides | 19 | * exynos4 specific entry point for secondary CPUs. This provides |
diff --git a/arch/arm/mach-exynos4/init.c b/arch/arm/mach-exynos4/init.c index cf91f50e43ab..a8a83e3881a4 100644 --- a/arch/arm/mach-exynos4/init.c +++ b/arch/arm/mach-exynos4/init.c | |||
@@ -35,6 +35,7 @@ void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) | |||
35 | tcfg->clocks = exynos4_serial_clocks; | 35 | tcfg->clocks = exynos4_serial_clocks; |
36 | tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks); | 36 | tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks); |
37 | } | 37 | } |
38 | tcfg->flags |= NO_NEED_CHECK_CLKSRC; | ||
38 | } | 39 | } |
39 | 40 | ||
40 | s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); | 41 | s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); |
diff --git a/arch/arm/mach-exynos4/mach-smdkv310.c b/arch/arm/mach-exynos4/mach-smdkv310.c index 152676471b67..edd814110da8 100644 --- a/arch/arm/mach-exynos4/mach-smdkv310.c +++ b/arch/arm/mach-exynos4/mach-smdkv310.c | |||
@@ -78,9 +78,7 @@ static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = { | |||
78 | }; | 78 | }; |
79 | 79 | ||
80 | static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = { | 80 | static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = { |
81 | .cd_type = S3C_SDHCI_CD_GPIO, | 81 | .cd_type = S3C_SDHCI_CD_INTERNAL, |
82 | .ext_cd_gpio = EXYNOS4_GPK0(2), | ||
83 | .ext_cd_gpio_invert = 1, | ||
84 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | 82 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, |
85 | #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT | 83 | #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT |
86 | .max_width = 8, | 84 | .max_width = 8, |
@@ -96,9 +94,7 @@ static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = { | |||
96 | }; | 94 | }; |
97 | 95 | ||
98 | static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = { | 96 | static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = { |
99 | .cd_type = S3C_SDHCI_CD_GPIO, | 97 | .cd_type = S3C_SDHCI_CD_INTERNAL, |
100 | .ext_cd_gpio = EXYNOS4_GPK2(2), | ||
101 | .ext_cd_gpio_invert = 1, | ||
102 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | 98 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, |
103 | #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT | 99 | #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT |
104 | .max_width = 8, | 100 | .max_width = 8, |
diff --git a/arch/arm/mach-h720x/Kconfig b/arch/arm/mach-h720x/Kconfig index 9b6982efbd22..abf356c02343 100644 --- a/arch/arm/mach-h720x/Kconfig +++ b/arch/arm/mach-h720x/Kconfig | |||
@@ -6,12 +6,14 @@ config ARCH_H7201 | |||
6 | bool "gms30c7201" | 6 | bool "gms30c7201" |
7 | depends on ARCH_H720X | 7 | depends on ARCH_H720X |
8 | select CPU_H7201 | 8 | select CPU_H7201 |
9 | select ZONE_DMA | ||
9 | help | 10 | help |
10 | Say Y here if you are using the Hynix GMS30C7201 Reference Board | 11 | Say Y here if you are using the Hynix GMS30C7201 Reference Board |
11 | 12 | ||
12 | config ARCH_H7202 | 13 | config ARCH_H7202 |
13 | bool "hms30c7202" | 14 | bool "hms30c7202" |
14 | select CPU_H7202 | 15 | select CPU_H7202 |
16 | select ZONE_DMA | ||
15 | depends on ARCH_H720X | 17 | depends on ARCH_H720X |
16 | help | 18 | help |
17 | Say Y here if you are using the Hynix HMS30C7202 Reference Board | 19 | Say Y here if you are using the Hynix HMS30C7202 Reference Board |
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 59c97a331136..0519dd7f034b 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig | |||
@@ -167,6 +167,7 @@ config MACH_EUKREA_MBIMXSD25_BASEBOARD | |||
167 | bool "Eukrea MBIMXSD development board" | 167 | bool "Eukrea MBIMXSD development board" |
168 | select IMX_HAVE_PLATFORM_GPIO_KEYS | 168 | select IMX_HAVE_PLATFORM_GPIO_KEYS |
169 | select IMX_HAVE_PLATFORM_IMX_SSI | 169 | select IMX_HAVE_PLATFORM_IMX_SSI |
170 | select LEDS_GPIO_REGISTER | ||
170 | help | 171 | help |
171 | This adds board specific devices that can be found on Eukrea's | 172 | This adds board specific devices that can be found on Eukrea's |
172 | MBIMXSD evaluation board. | 173 | MBIMXSD evaluation board. |
@@ -265,6 +266,7 @@ config MACH_EUKREA_MBIMX27_BASEBOARD | |||
265 | select IMX_HAVE_PLATFORM_IMX_UART | 266 | select IMX_HAVE_PLATFORM_IMX_UART |
266 | select IMX_HAVE_PLATFORM_MXC_MMC | 267 | select IMX_HAVE_PLATFORM_MXC_MMC |
267 | select IMX_HAVE_PLATFORM_SPI_IMX | 268 | select IMX_HAVE_PLATFORM_SPI_IMX |
269 | select LEDS_GPIO_REGISTER | ||
268 | help | 270 | help |
269 | This adds board specific devices that can be found on Eukrea's | 271 | This adds board specific devices that can be found on Eukrea's |
270 | MBIMX27 evaluation board. | 272 | MBIMX27 evaluation board. |
@@ -276,6 +278,7 @@ config MACH_MX27_3DS | |||
276 | select SOC_IMX27 | 278 | select SOC_IMX27 |
277 | select IMX_HAVE_PLATFORM_FSL_USB2_UDC | 279 | select IMX_HAVE_PLATFORM_FSL_USB2_UDC |
278 | select IMX_HAVE_PLATFORM_IMX2_WDT | 280 | select IMX_HAVE_PLATFORM_IMX2_WDT |
281 | select IMX_HAVE_PLATFORM_IMX_FB | ||
279 | select IMX_HAVE_PLATFORM_IMX_I2C | 282 | select IMX_HAVE_PLATFORM_IMX_I2C |
280 | select IMX_HAVE_PLATFORM_IMX_KEYPAD | 283 | select IMX_HAVE_PLATFORM_IMX_KEYPAD |
281 | select IMX_HAVE_PLATFORM_IMX_UART | 284 | select IMX_HAVE_PLATFORM_IMX_UART |
@@ -403,6 +406,7 @@ config MACH_MX31LITE | |||
403 | select IMX_HAVE_PLATFORM_MXC_NAND | 406 | select IMX_HAVE_PLATFORM_MXC_NAND |
404 | select IMX_HAVE_PLATFORM_MXC_RTC | 407 | select IMX_HAVE_PLATFORM_MXC_RTC |
405 | select IMX_HAVE_PLATFORM_SPI_IMX | 408 | select IMX_HAVE_PLATFORM_SPI_IMX |
409 | select LEDS_GPIO_REGISTER | ||
406 | help | 410 | help |
407 | Include support for MX31 LITEKIT platform. This includes specific | 411 | Include support for MX31 LITEKIT platform. This includes specific |
408 | configurations for the board and its peripherals. | 412 | configurations for the board and its peripherals. |
@@ -471,6 +475,7 @@ config MACH_MX31MOBOARD | |||
471 | select IMX_HAVE_PLATFORM_MXC_EHCI | 475 | select IMX_HAVE_PLATFORM_MXC_EHCI |
472 | select IMX_HAVE_PLATFORM_MXC_MMC | 476 | select IMX_HAVE_PLATFORM_MXC_MMC |
473 | select IMX_HAVE_PLATFORM_SPI_IMX | 477 | select IMX_HAVE_PLATFORM_SPI_IMX |
478 | select LEDS_GPIO_REGISTER | ||
474 | select MXC_ULPI if USB_ULPI | 479 | select MXC_ULPI if USB_ULPI |
475 | help | 480 | help |
476 | Include support for mx31moboard platform. This includes specific | 481 | Include support for mx31moboard platform. This includes specific |
@@ -577,6 +582,7 @@ config MACH_EUKREA_MBIMXSD35_BASEBOARD | |||
577 | select IMX_HAVE_PLATFORM_GPIO_KEYS | 582 | select IMX_HAVE_PLATFORM_GPIO_KEYS |
578 | select IMX_HAVE_PLATFORM_IMX_SSI | 583 | select IMX_HAVE_PLATFORM_IMX_SSI |
579 | select IMX_HAVE_PLATFORM_IPU_CORE | 584 | select IMX_HAVE_PLATFORM_IPU_CORE |
585 | select LEDS_GPIO_REGISTER | ||
580 | help | 586 | help |
581 | This adds board specific devices that can be found on Eukrea's | 587 | This adds board specific devices that can be found on Eukrea's |
582 | MBIMXSD evaluation board. | 588 | MBIMXSD evaluation board. |
diff --git a/arch/arm/mach-imx/dma-v1.c b/arch/arm/mach-imx/dma-v1.c index 236f1495efad..4d76f67f270f 100644 --- a/arch/arm/mach-imx/dma-v1.c +++ b/arch/arm/mach-imx/dma-v1.c | |||
@@ -475,7 +475,6 @@ void imx_dma_enable(int channel) | |||
475 | imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) | CCR_CEN | | 475 | imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) | CCR_CEN | |
476 | CCR_ACRPT, DMA_CCR(channel)); | 476 | CCR_ACRPT, DMA_CCR(channel)); |
477 | 477 | ||
478 | #ifdef CONFIG_ARCH_MX2 | ||
479 | if ((cpu_is_mx21() || cpu_is_mx27()) && | 478 | if ((cpu_is_mx21() || cpu_is_mx27()) && |
480 | imxdma->sg && imx_dma_hw_chain(imxdma)) { | 479 | imxdma->sg && imx_dma_hw_chain(imxdma)) { |
481 | imxdma->sg = sg_next(imxdma->sg); | 480 | imxdma->sg = sg_next(imxdma->sg); |
@@ -487,7 +486,6 @@ void imx_dma_enable(int channel) | |||
487 | DMA_CCR(channel)); | 486 | DMA_CCR(channel)); |
488 | } | 487 | } |
489 | } | 488 | } |
490 | #endif | ||
491 | imxdma->in_use = 1; | 489 | imxdma->in_use = 1; |
492 | 490 | ||
493 | local_irq_restore(flags); | 491 | local_irq_restore(flags); |
@@ -518,7 +516,6 @@ void imx_dma_disable(int channel) | |||
518 | } | 516 | } |
519 | EXPORT_SYMBOL(imx_dma_disable); | 517 | EXPORT_SYMBOL(imx_dma_disable); |
520 | 518 | ||
521 | #ifdef CONFIG_ARCH_MX2 | ||
522 | static void imx_dma_watchdog(unsigned long chno) | 519 | static void imx_dma_watchdog(unsigned long chno) |
523 | { | 520 | { |
524 | struct imx_dma_channel *imxdma = &imx_dma_channels[chno]; | 521 | struct imx_dma_channel *imxdma = &imx_dma_channels[chno]; |
@@ -530,7 +527,6 @@ static void imx_dma_watchdog(unsigned long chno) | |||
530 | if (imxdma->err_handler) | 527 | if (imxdma->err_handler) |
531 | imxdma->err_handler(chno, imxdma->data, IMX_DMA_ERR_TIMEOUT); | 528 | imxdma->err_handler(chno, imxdma->data, IMX_DMA_ERR_TIMEOUT); |
532 | } | 529 | } |
533 | #endif | ||
534 | 530 | ||
535 | static irqreturn_t dma_err_handler(int irq, void *dev_id) | 531 | static irqreturn_t dma_err_handler(int irq, void *dev_id) |
536 | { | 532 | { |
@@ -654,10 +650,8 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id) | |||
654 | { | 650 | { |
655 | int i, disr; | 651 | int i, disr; |
656 | 652 | ||
657 | #ifdef CONFIG_ARCH_MX2 | ||
658 | if (cpu_is_mx21() || cpu_is_mx27()) | 653 | if (cpu_is_mx21() || cpu_is_mx27()) |
659 | dma_err_handler(irq, dev_id); | 654 | dma_err_handler(irq, dev_id); |
660 | #endif | ||
661 | 655 | ||
662 | disr = imx_dmav1_readl(DMA_DISR); | 656 | disr = imx_dmav1_readl(DMA_DISR); |
663 | 657 | ||
@@ -703,7 +697,6 @@ int imx_dma_request(int channel, const char *name) | |||
703 | imxdma->name = name; | 697 | imxdma->name = name; |
704 | local_irq_restore(flags); /* request_irq() can block */ | 698 | local_irq_restore(flags); /* request_irq() can block */ |
705 | 699 | ||
706 | #ifdef CONFIG_ARCH_MX2 | ||
707 | if (cpu_is_mx21() || cpu_is_mx27()) { | 700 | if (cpu_is_mx21() || cpu_is_mx27()) { |
708 | ret = request_irq(MX2x_INT_DMACH0 + channel, | 701 | ret = request_irq(MX2x_INT_DMACH0 + channel, |
709 | dma_irq_handler, 0, "DMA", NULL); | 702 | dma_irq_handler, 0, "DMA", NULL); |
@@ -717,7 +710,6 @@ int imx_dma_request(int channel, const char *name) | |||
717 | imxdma->watchdog.function = &imx_dma_watchdog; | 710 | imxdma->watchdog.function = &imx_dma_watchdog; |
718 | imxdma->watchdog.data = channel; | 711 | imxdma->watchdog.data = channel; |
719 | } | 712 | } |
720 | #endif | ||
721 | 713 | ||
722 | return ret; | 714 | return ret; |
723 | } | 715 | } |
@@ -744,10 +736,8 @@ void imx_dma_free(int channel) | |||
744 | imx_dma_disable(channel); | 736 | imx_dma_disable(channel); |
745 | imxdma->name = NULL; | 737 | imxdma->name = NULL; |
746 | 738 | ||
747 | #ifdef CONFIG_ARCH_MX2 | ||
748 | if (cpu_is_mx21() || cpu_is_mx27()) | 739 | if (cpu_is_mx21() || cpu_is_mx27()) |
749 | free_irq(MX2x_INT_DMACH0 + channel, NULL); | 740 | free_irq(MX2x_INT_DMACH0 + channel, NULL); |
750 | #endif | ||
751 | 741 | ||
752 | local_irq_restore(flags); | 742 | local_irq_restore(flags); |
753 | } | 743 | } |
@@ -803,21 +793,13 @@ static int __init imx_dma_init(void) | |||
803 | int ret = 0; | 793 | int ret = 0; |
804 | int i; | 794 | int i; |
805 | 795 | ||
806 | #ifdef CONFIG_ARCH_MX1 | ||
807 | if (cpu_is_mx1()) | 796 | if (cpu_is_mx1()) |
808 | imx_dmav1_baseaddr = MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR); | 797 | imx_dmav1_baseaddr = MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR); |
809 | else | 798 | else if (cpu_is_mx21()) |
810 | #endif | ||
811 | #ifdef CONFIG_MACH_MX21 | ||
812 | if (cpu_is_mx21()) | ||
813 | imx_dmav1_baseaddr = MX21_IO_ADDRESS(MX21_DMA_BASE_ADDR); | 799 | imx_dmav1_baseaddr = MX21_IO_ADDRESS(MX21_DMA_BASE_ADDR); |
814 | else | 800 | else if (cpu_is_mx27()) |
815 | #endif | ||
816 | #ifdef CONFIG_MACH_MX27 | ||
817 | if (cpu_is_mx27()) | ||
818 | imx_dmav1_baseaddr = MX27_IO_ADDRESS(MX27_DMA_BASE_ADDR); | 801 | imx_dmav1_baseaddr = MX27_IO_ADDRESS(MX27_DMA_BASE_ADDR); |
819 | else | 802 | else |
820 | #endif | ||
821 | return 0; | 803 | return 0; |
822 | 804 | ||
823 | dma_clk = clk_get(NULL, "dma"); | 805 | dma_clk = clk_get(NULL, "dma"); |
@@ -828,7 +810,6 @@ static int __init imx_dma_init(void) | |||
828 | /* reset DMA module */ | 810 | /* reset DMA module */ |
829 | imx_dmav1_writel(DCR_DRST, DMA_DCR); | 811 | imx_dmav1_writel(DCR_DRST, DMA_DCR); |
830 | 812 | ||
831 | #ifdef CONFIG_ARCH_MX1 | ||
832 | if (cpu_is_mx1()) { | 813 | if (cpu_is_mx1()) { |
833 | ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", NULL); | 814 | ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", NULL); |
834 | if (ret) { | 815 | if (ret) { |
@@ -843,7 +824,7 @@ static int __init imx_dma_init(void) | |||
843 | return ret; | 824 | return ret; |
844 | } | 825 | } |
845 | } | 826 | } |
846 | #endif | 827 | |
847 | /* enable DMA module */ | 828 | /* enable DMA module */ |
848 | imx_dmav1_writel(DCR_DEN, DMA_DCR); | 829 | imx_dmav1_writel(DCR_DEN, DMA_DCR); |
849 | 830 | ||
diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c index 5911281da5f5..5db3e1463af7 100644 --- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c | |||
@@ -112,7 +112,7 @@ eukrea_mbimx27_keymap_data __initconst = { | |||
112 | .keymap_size = ARRAY_SIZE(eukrea_mbimx27_keymap), | 112 | .keymap_size = ARRAY_SIZE(eukrea_mbimx27_keymap), |
113 | }; | 113 | }; |
114 | 114 | ||
115 | static struct gpio_led gpio_leds[] = { | 115 | static const struct gpio_led eukrea_mbimx27_gpio_leds[] __initconst = { |
116 | { | 116 | { |
117 | .name = "led1", | 117 | .name = "led1", |
118 | .default_trigger = "heartbeat", | 118 | .default_trigger = "heartbeat", |
@@ -127,17 +127,10 @@ static struct gpio_led gpio_leds[] = { | |||
127 | }, | 127 | }, |
128 | }; | 128 | }; |
129 | 129 | ||
130 | static struct gpio_led_platform_data gpio_led_info = { | 130 | static const struct gpio_led_platform_data |
131 | .leds = gpio_leds, | 131 | eukrea_mbimx27_gpio_led_info __initconst = { |
132 | .num_leds = ARRAY_SIZE(gpio_leds), | 132 | .leds = eukrea_mbimx27_gpio_leds, |
133 | }; | 133 | .num_leds = ARRAY_SIZE(eukrea_mbimx27_gpio_leds), |
134 | |||
135 | static struct platform_device leds_gpio = { | ||
136 | .name = "leds-gpio", | ||
137 | .id = -1, | ||
138 | .dev = { | ||
139 | .platform_data = &gpio_led_info, | ||
140 | }, | ||
141 | }; | 134 | }; |
142 | 135 | ||
143 | static struct imx_fb_videomode eukrea_mbimx27_modes[] = { | 136 | static struct imx_fb_videomode eukrea_mbimx27_modes[] = { |
@@ -293,10 +286,6 @@ static struct i2c_board_info eukrea_mbimx27_i2c_devices[] = { | |||
293 | }, | 286 | }, |
294 | }; | 287 | }; |
295 | 288 | ||
296 | static struct platform_device *platform_devices[] __initdata = { | ||
297 | &leds_gpio, | ||
298 | }; | ||
299 | |||
300 | static const struct imxmmc_platform_data sdhc_pdata __initconst = { | 289 | static const struct imxmmc_platform_data sdhc_pdata __initconst = { |
301 | .dat3_card_detect = 1, | 290 | .dat3_card_detect = 1, |
302 | }; | 291 | }; |
@@ -377,5 +366,5 @@ void __init eukrea_mbimx27_baseboard_init(void) | |||
377 | 366 | ||
378 | imx27_add_imx_keypad(&eukrea_mbimx27_keymap_data); | 367 | imx27_add_imx_keypad(&eukrea_mbimx27_keymap_data); |
379 | 368 | ||
380 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | 369 | gpio_led_register_device(-1, &eukrea_mbimx27_gpio_led_info); |
381 | } | 370 | } |
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c index f9ef04acdab1..01ebcb31e482 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c | |||
@@ -173,7 +173,7 @@ static struct platform_device eukrea_mbimxsd_lcd_powerdev = { | |||
173 | .dev.platform_data = &eukrea_mbimxsd_lcd_power_data, | 173 | .dev.platform_data = &eukrea_mbimxsd_lcd_power_data, |
174 | }; | 174 | }; |
175 | 175 | ||
176 | static struct gpio_led eukrea_mbimxsd_leds[] = { | 176 | static const struct gpio_led eukrea_mbimxsd_leds[] __initconst = { |
177 | { | 177 | { |
178 | .name = "led1", | 178 | .name = "led1", |
179 | .default_trigger = "heartbeat", | 179 | .default_trigger = "heartbeat", |
@@ -182,19 +182,12 @@ static struct gpio_led eukrea_mbimxsd_leds[] = { | |||
182 | }, | 182 | }, |
183 | }; | 183 | }; |
184 | 184 | ||
185 | static struct gpio_led_platform_data eukrea_mbimxsd_led_info = { | 185 | static const struct gpio_led_platform_data |
186 | eukrea_mbimxsd_led_info __initconst = { | ||
186 | .leds = eukrea_mbimxsd_leds, | 187 | .leds = eukrea_mbimxsd_leds, |
187 | .num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds), | 188 | .num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds), |
188 | }; | 189 | }; |
189 | 190 | ||
190 | static struct platform_device eukrea_mbimxsd_leds_gpio = { | ||
191 | .name = "leds-gpio", | ||
192 | .id = -1, | ||
193 | .dev = { | ||
194 | .platform_data = &eukrea_mbimxsd_led_info, | ||
195 | }, | ||
196 | }; | ||
197 | |||
198 | static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = { | 191 | static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = { |
199 | { | 192 | { |
200 | .gpio = GPIO_SWITCH1, | 193 | .gpio = GPIO_SWITCH1, |
@@ -212,7 +205,6 @@ static const struct gpio_keys_platform_data | |||
212 | }; | 205 | }; |
213 | 206 | ||
214 | static struct platform_device *platform_devices[] __initdata = { | 207 | static struct platform_device *platform_devices[] __initdata = { |
215 | &eukrea_mbimxsd_leds_gpio, | ||
216 | &eukrea_mbimxsd_lcd_powerdev, | 208 | &eukrea_mbimxsd_lcd_powerdev, |
217 | }; | 209 | }; |
218 | 210 | ||
@@ -287,5 +279,6 @@ void __init eukrea_mbimxsd25_baseboard_init(void) | |||
287 | ARRAY_SIZE(eukrea_mbimxsd_i2c_devices)); | 279 | ARRAY_SIZE(eukrea_mbimxsd_i2c_devices)); |
288 | 280 | ||
289 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | 281 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
282 | gpio_led_register_device(-1, &eukrea_mbimxsd_led_info); | ||
290 | imx_add_gpio_keys(&eukrea_mbimxsd_button_data); | 283 | imx_add_gpio_keys(&eukrea_mbimxsd_button_data); |
291 | } | 284 | } |
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c index 4909ea05855a..558eb526ba56 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c | |||
@@ -193,19 +193,12 @@ static struct gpio_led eukrea_mbimxsd_leds[] = { | |||
193 | }, | 193 | }, |
194 | }; | 194 | }; |
195 | 195 | ||
196 | static struct gpio_led_platform_data eukrea_mbimxsd_led_info = { | 196 | static const struct gpio_led_platform_data |
197 | eukrea_mbimxsd_led_info __initconst = { | ||
197 | .leds = eukrea_mbimxsd_leds, | 198 | .leds = eukrea_mbimxsd_leds, |
198 | .num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds), | 199 | .num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds), |
199 | }; | 200 | }; |
200 | 201 | ||
201 | static struct platform_device eukrea_mbimxsd_leds_gpio = { | ||
202 | .name = "leds-gpio", | ||
203 | .id = -1, | ||
204 | .dev = { | ||
205 | .platform_data = &eukrea_mbimxsd_led_info, | ||
206 | }, | ||
207 | }; | ||
208 | |||
209 | static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = { | 202 | static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = { |
210 | { | 203 | { |
211 | .gpio = GPIO_SWITCH1, | 204 | .gpio = GPIO_SWITCH1, |
@@ -223,7 +216,6 @@ static const struct gpio_keys_platform_data | |||
223 | }; | 216 | }; |
224 | 217 | ||
225 | static struct platform_device *platform_devices[] __initdata = { | 218 | static struct platform_device *platform_devices[] __initdata = { |
226 | &eukrea_mbimxsd_leds_gpio, | ||
227 | &eukrea_mbimxsd_lcd_powerdev, | 219 | &eukrea_mbimxsd_lcd_powerdev, |
228 | }; | 220 | }; |
229 | 221 | ||
@@ -299,5 +291,6 @@ void __init eukrea_mbimxsd35_baseboard_init(void) | |||
299 | ARRAY_SIZE(eukrea_mbimxsd_i2c_devices)); | 291 | ARRAY_SIZE(eukrea_mbimxsd_i2c_devices)); |
300 | 292 | ||
301 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | 293 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
294 | gpio_led_register_device(-1, &eukrea_mbimxsd_led_info); | ||
302 | imx_add_gpio_keys(&eukrea_mbimxsd_button_data); | 295 | imx_add_gpio_keys(&eukrea_mbimxsd_button_data); |
303 | } | 296 | } |
diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c index 15e45c84e371..a404c89485ca 100644 --- a/arch/arm/mach-imx/mach-apf9328.c +++ b/arch/arm/mach-imx/mach-apf9328.c | |||
@@ -99,11 +99,6 @@ static struct platform_device dm9000x_device = { | |||
99 | } | 99 | } |
100 | }; | 100 | }; |
101 | 101 | ||
102 | /* --- SERIAL RESSOURCE --- */ | ||
103 | static const struct imxuart_platform_data uart0_pdata __initconst = { | ||
104 | .flags = 0, | ||
105 | }; | ||
106 | |||
107 | static const struct imxuart_platform_data uart1_pdata __initconst = { | 102 | static const struct imxuart_platform_data uart1_pdata __initconst = { |
108 | .flags = IMXUART_HAVE_RTSCTS, | 103 | .flags = IMXUART_HAVE_RTSCTS, |
109 | }; | 104 | }; |
@@ -115,11 +110,13 @@ static struct platform_device *devices[] __initdata = { | |||
115 | 110 | ||
116 | static void __init apf9328_init(void) | 111 | static void __init apf9328_init(void) |
117 | { | 112 | { |
113 | imx1_soc_init(); | ||
114 | |||
118 | mxc_gpio_setup_multiple_pins(apf9328_pins, | 115 | mxc_gpio_setup_multiple_pins(apf9328_pins, |
119 | ARRAY_SIZE(apf9328_pins), | 116 | ARRAY_SIZE(apf9328_pins), |
120 | "APF9328"); | 117 | "APF9328"); |
121 | 118 | ||
122 | imx1_add_imx_uart0(&uart0_pdata); | 119 | imx1_add_imx_uart0(NULL); |
123 | imx1_add_imx_uart1(&uart1_pdata); | 120 | imx1_add_imx_uart1(&uart1_pdata); |
124 | 121 | ||
125 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 122 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c index ffb40ff619b1..ede2710f8b76 100644 --- a/arch/arm/mach-imx/mach-armadillo5x0.c +++ b/arch/arm/mach-imx/mach-armadillo5x0.c | |||
@@ -490,6 +490,8 @@ static struct platform_device *devices[] __initdata = { | |||
490 | */ | 490 | */ |
491 | static void __init armadillo5x0_init(void) | 491 | static void __init armadillo5x0_init(void) |
492 | { | 492 | { |
493 | imx31_soc_init(); | ||
494 | |||
493 | mxc_iomux_setup_multiple_pins(armadillo5x0_pins, | 495 | mxc_iomux_setup_multiple_pins(armadillo5x0_pins, |
494 | ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0"); | 496 | ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0"); |
495 | 497 | ||
diff --git a/arch/arm/mach-imx/mach-bug.c b/arch/arm/mach-imx/mach-bug.c index 42e4f078a19c..f49470553bdf 100644 --- a/arch/arm/mach-imx/mach-bug.c +++ b/arch/arm/mach-imx/mach-bug.c | |||
@@ -42,6 +42,8 @@ static const unsigned int bug_pins[] __initconst = { | |||
42 | 42 | ||
43 | static void __init bug_board_init(void) | 43 | static void __init bug_board_init(void) |
44 | { | 44 | { |
45 | imx31_soc_init(); | ||
46 | |||
45 | mxc_iomux_setup_multiple_pins(bug_pins, | 47 | mxc_iomux_setup_multiple_pins(bug_pins, |
46 | ARRAY_SIZE(bug_pins), "uart-4"); | 48 | ARRAY_SIZE(bug_pins), "uart-4"); |
47 | imx31_add_imx_uart4(&uart_pdata); | 49 | imx31_add_imx_uart4(&uart_pdata); |
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c index 46a2e41d43d2..87887ac5806b 100644 --- a/arch/arm/mach-imx/mach-cpuimx27.c +++ b/arch/arm/mach-imx/mach-cpuimx27.c | |||
@@ -250,6 +250,8 @@ __setup("otg_mode=", eukrea_cpuimx27_otg_mode); | |||
250 | 250 | ||
251 | static void __init eukrea_cpuimx27_init(void) | 251 | static void __init eukrea_cpuimx27_init(void) |
252 | { | 252 | { |
253 | imx27_soc_init(); | ||
254 | |||
253 | mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins, | 255 | mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins, |
254 | ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27"); | 256 | ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27"); |
255 | 257 | ||
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c index 3f8ef825fa6f..f39a478ba1a6 100644 --- a/arch/arm/mach-imx/mach-cpuimx35.c +++ b/arch/arm/mach-imx/mach-cpuimx35.c | |||
@@ -156,6 +156,8 @@ __setup("otg_mode=", eukrea_cpuimx35_otg_mode); | |||
156 | */ | 156 | */ |
157 | static void __init eukrea_cpuimx35_init(void) | 157 | static void __init eukrea_cpuimx35_init(void) |
158 | { | 158 | { |
159 | imx35_soc_init(); | ||
160 | |||
159 | mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx35_pads, | 161 | mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx35_pads, |
160 | ARRAY_SIZE(eukrea_cpuimx35_pads)); | 162 | ARRAY_SIZE(eukrea_cpuimx35_pads)); |
161 | 163 | ||
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c index 148cff2819b9..da36da52969d 100644 --- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c +++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c | |||
@@ -125,6 +125,8 @@ __setup("otg_mode=", eukrea_cpuimx25_otg_mode); | |||
125 | 125 | ||
126 | static void __init eukrea_cpuimx25_init(void) | 126 | static void __init eukrea_cpuimx25_init(void) |
127 | { | 127 | { |
128 | imx25_soc_init(); | ||
129 | |||
128 | if (mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx25_pads, | 130 | if (mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx25_pads, |
129 | ARRAY_SIZE(eukrea_cpuimx25_pads))) | 131 | ARRAY_SIZE(eukrea_cpuimx25_pads))) |
130 | printk(KERN_ERR "error setting cpuimx25 pads !\n"); | 132 | printk(KERN_ERR "error setting cpuimx25 pads !\n"); |
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index 7ae43b1ec517..6707de0ab716 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c | |||
@@ -34,7 +34,7 @@ | |||
34 | #include <asm/mach/arch.h> | 34 | #include <asm/mach/arch.h> |
35 | #include <asm/mach/time.h> | 35 | #include <asm/mach/time.h> |
36 | #include <mach/common.h> | 36 | #include <mach/common.h> |
37 | #include <mach/iomux.h> | 37 | #include <mach/iomux-mx27.h> |
38 | 38 | ||
39 | #include "devices-imx27.h" | 39 | #include "devices-imx27.h" |
40 | 40 | ||
@@ -231,6 +231,8 @@ static void __init visstrim_m10_board_init(void) | |||
231 | { | 231 | { |
232 | int ret; | 232 | int ret; |
233 | 233 | ||
234 | imx27_soc_init(); | ||
235 | |||
234 | ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins, | 236 | ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins, |
235 | ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10"); | 237 | ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10"); |
236 | if (ret) | 238 | if (ret) |
diff --git a/arch/arm/mach-imx/mach-imx27ipcam.c b/arch/arm/mach-imx/mach-imx27ipcam.c index 9be6cd6fbf8c..272f793e9247 100644 --- a/arch/arm/mach-imx/mach-imx27ipcam.c +++ b/arch/arm/mach-imx/mach-imx27ipcam.c | |||
@@ -50,6 +50,8 @@ static const int mx27ipcam_pins[] __initconst = { | |||
50 | 50 | ||
51 | static void __init mx27ipcam_init(void) | 51 | static void __init mx27ipcam_init(void) |
52 | { | 52 | { |
53 | imx27_soc_init(); | ||
54 | |||
53 | mxc_gpio_setup_multiple_pins(mx27ipcam_pins, ARRAY_SIZE(mx27ipcam_pins), | 55 | mxc_gpio_setup_multiple_pins(mx27ipcam_pins, ARRAY_SIZE(mx27ipcam_pins), |
54 | "mx27ipcam"); | 56 | "mx27ipcam"); |
55 | 57 | ||
diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c index 841140516ede..d81a769fe895 100644 --- a/arch/arm/mach-imx/mach-imx27lite.c +++ b/arch/arm/mach-imx/mach-imx27lite.c | |||
@@ -59,6 +59,8 @@ static const struct imxuart_platform_data uart_pdata __initconst = { | |||
59 | 59 | ||
60 | static void __init mx27lite_init(void) | 60 | static void __init mx27lite_init(void) |
61 | { | 61 | { |
62 | imx27_soc_init(); | ||
63 | |||
62 | mxc_gpio_setup_multiple_pins(mx27lite_pins, ARRAY_SIZE(mx27lite_pins), | 64 | mxc_gpio_setup_multiple_pins(mx27lite_pins, ARRAY_SIZE(mx27lite_pins), |
63 | "imx27lite"); | 65 | "imx27lite"); |
64 | imx27_add_imx_uart0(&uart_pdata); | 66 | imx27_add_imx_uart0(&uart_pdata); |
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c index 1ecae20cf4e3..e472a1d88058 100644 --- a/arch/arm/mach-imx/mach-kzm_arm11_01.c +++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c | |||
@@ -223,6 +223,8 @@ static int kzm_pins[] __initdata = { | |||
223 | */ | 223 | */ |
224 | static void __init kzm_board_init(void) | 224 | static void __init kzm_board_init(void) |
225 | { | 225 | { |
226 | imx31_soc_init(); | ||
227 | |||
226 | mxc_iomux_setup_multiple_pins(kzm_pins, | 228 | mxc_iomux_setup_multiple_pins(kzm_pins, |
227 | ARRAY_SIZE(kzm_pins), "kzm"); | 229 | ARRAY_SIZE(kzm_pins), "kzm"); |
228 | kzm_init_ext_uart(); | 230 | kzm_init_ext_uart(); |
diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c index 38ec5cbbda9b..5cd8bee46960 100644 --- a/arch/arm/mach-imx/mach-mx1ads.c +++ b/arch/arm/mach-imx/mach-mx1ads.c | |||
@@ -115,6 +115,8 @@ static struct i2c_board_info mx1ads_i2c_devices[] = { | |||
115 | */ | 115 | */ |
116 | static void __init mx1ads_init(void) | 116 | static void __init mx1ads_init(void) |
117 | { | 117 | { |
118 | imx1_soc_init(); | ||
119 | |||
118 | mxc_gpio_setup_multiple_pins(mx1ads_pins, | 120 | mxc_gpio_setup_multiple_pins(mx1ads_pins, |
119 | ARRAY_SIZE(mx1ads_pins), "mx1ads"); | 121 | ARRAY_SIZE(mx1ads_pins), "mx1ads"); |
120 | 122 | ||
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c index 74ac88978ddd..d389ecf9b5a8 100644 --- a/arch/arm/mach-imx/mach-mx21ads.c +++ b/arch/arm/mach-imx/mach-mx21ads.c | |||
@@ -279,6 +279,8 @@ static struct platform_device *platform_devices[] __initdata = { | |||
279 | 279 | ||
280 | static void __init mx21ads_board_init(void) | 280 | static void __init mx21ads_board_init(void) |
281 | { | 281 | { |
282 | imx21_soc_init(); | ||
283 | |||
282 | mxc_gpio_setup_multiple_pins(mx21ads_pins, ARRAY_SIZE(mx21ads_pins), | 284 | mxc_gpio_setup_multiple_pins(mx21ads_pins, ARRAY_SIZE(mx21ads_pins), |
283 | "mx21ads"); | 285 | "mx21ads"); |
284 | 286 | ||
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c index 58ea3fdf0911..01534bb61305 100644 --- a/arch/arm/mach-imx/mach-mx25_3ds.c +++ b/arch/arm/mach-imx/mach-mx25_3ds.c | |||
@@ -219,6 +219,8 @@ static const struct esdhc_platform_data mx25pdk_esdhc_pdata __initconst = { | |||
219 | 219 | ||
220 | static void __init mx25pdk_init(void) | 220 | static void __init mx25pdk_init(void) |
221 | { | 221 | { |
222 | imx25_soc_init(); | ||
223 | |||
222 | mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads, | 224 | mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads, |
223 | ARRAY_SIZE(mx25pdk_pads)); | 225 | ARRAY_SIZE(mx25pdk_pads)); |
224 | 226 | ||
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index 6e1accf93f81..6fa6934ab150 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/mfd/mc13783.h> | 29 | #include <linux/mfd/mc13783.h> |
30 | #include <linux/spi/spi.h> | 30 | #include <linux/spi/spi.h> |
31 | #include <linux/regulator/machine.h> | 31 | #include <linux/regulator/machine.h> |
32 | #include <linux/spi/l4f00242t03.h> | ||
32 | 33 | ||
33 | #include <asm/mach-types.h> | 34 | #include <asm/mach-types.h> |
34 | #include <asm/mach/arch.h> | 35 | #include <asm/mach/arch.h> |
@@ -42,10 +43,15 @@ | |||
42 | 43 | ||
43 | #include "devices-imx27.h" | 44 | #include "devices-imx27.h" |
44 | 45 | ||
45 | #define SD1_EN_GPIO (GPIO_PORTB + 25) | 46 | #define SD1_EN_GPIO IMX_GPIO_NR(2, 25) |
46 | #define OTG_PHY_RESET_GPIO (GPIO_PORTB + 23) | 47 | #define OTG_PHY_RESET_GPIO IMX_GPIO_NR(2, 23) |
47 | #define SPI2_SS0 (GPIO_PORTD + 21) | 48 | #define SPI2_SS0 IMX_GPIO_NR(4, 21) |
48 | #define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTC + 28) | 49 | #define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(3, 28)) |
50 | #define PMIC_INT IMX_GPIO_NR(3, 14) | ||
51 | #define SPI1_SS0 IMX_GPIO_NR(4, 28) | ||
52 | #define SD1_CD IMX_GPIO_NR(2, 26) | ||
53 | #define LCD_RESET IMX_GPIO_NR(1, 3) | ||
54 | #define LCD_ENABLE IMX_GPIO_NR(1, 31) | ||
49 | 55 | ||
50 | static const int mx27pdk_pins[] __initconst = { | 56 | static const int mx27pdk_pins[] __initconst = { |
51 | /* UART1 */ | 57 | /* UART1 */ |
@@ -94,13 +100,47 @@ static const int mx27pdk_pins[] __initconst = { | |||
94 | PE2_PF_USBOTG_DIR, | 100 | PE2_PF_USBOTG_DIR, |
95 | PE24_PF_USBOTG_CLK, | 101 | PE24_PF_USBOTG_CLK, |
96 | PE25_PF_USBOTG_DATA7, | 102 | PE25_PF_USBOTG_DATA7, |
103 | /* CSPI1 */ | ||
104 | PD31_PF_CSPI1_MOSI, | ||
105 | PD30_PF_CSPI1_MISO, | ||
106 | PD29_PF_CSPI1_SCLK, | ||
107 | PD25_PF_CSPI1_RDY, | ||
108 | SPI1_SS0 | GPIO_GPIO | GPIO_OUT, | ||
97 | /* CSPI2 */ | 109 | /* CSPI2 */ |
98 | PD22_PF_CSPI2_SCLK, | 110 | PD22_PF_CSPI2_SCLK, |
99 | PD23_PF_CSPI2_MISO, | 111 | PD23_PF_CSPI2_MISO, |
100 | PD24_PF_CSPI2_MOSI, | 112 | PD24_PF_CSPI2_MOSI, |
113 | SPI2_SS0 | GPIO_GPIO | GPIO_OUT, | ||
101 | /* I2C1 */ | 114 | /* I2C1 */ |
102 | PD17_PF_I2C_DATA, | 115 | PD17_PF_I2C_DATA, |
103 | PD18_PF_I2C_CLK, | 116 | PD18_PF_I2C_CLK, |
117 | /* PMIC INT */ | ||
118 | PMIC_INT | GPIO_GPIO | GPIO_IN, | ||
119 | /* LCD */ | ||
120 | PA5_PF_LSCLK, | ||
121 | PA6_PF_LD0, | ||
122 | PA7_PF_LD1, | ||
123 | PA8_PF_LD2, | ||
124 | PA9_PF_LD3, | ||
125 | PA10_PF_LD4, | ||
126 | PA11_PF_LD5, | ||
127 | PA12_PF_LD6, | ||
128 | PA13_PF_LD7, | ||
129 | PA14_PF_LD8, | ||
130 | PA15_PF_LD9, | ||
131 | PA16_PF_LD10, | ||
132 | PA17_PF_LD11, | ||
133 | PA18_PF_LD12, | ||
134 | PA19_PF_LD13, | ||
135 | PA20_PF_LD14, | ||
136 | PA21_PF_LD15, | ||
137 | PA22_PF_LD16, | ||
138 | PA23_PF_LD17, | ||
139 | PA28_PF_HSYNC, | ||
140 | PA29_PF_VSYNC, | ||
141 | PA30_PF_CONTRAST, | ||
142 | LCD_ENABLE | GPIO_GPIO | GPIO_OUT, | ||
143 | LCD_RESET | GPIO_GPIO | GPIO_OUT, | ||
104 | }; | 144 | }; |
105 | 145 | ||
106 | static const struct imxuart_platform_data uart_pdata __initconst = { | 146 | static const struct imxuart_platform_data uart_pdata __initconst = { |
@@ -131,13 +171,13 @@ static const struct matrix_keymap_data mx27_3ds_keymap_data __initconst = { | |||
131 | static int mx27_3ds_sdhc1_init(struct device *dev, irq_handler_t detect_irq, | 171 | static int mx27_3ds_sdhc1_init(struct device *dev, irq_handler_t detect_irq, |
132 | void *data) | 172 | void *data) |
133 | { | 173 | { |
134 | return request_irq(IRQ_GPIOB(26), detect_irq, IRQF_TRIGGER_FALLING | | 174 | return request_irq(gpio_to_irq(SD1_CD), detect_irq, |
135 | IRQF_TRIGGER_RISING, "sdhc1-card-detect", data); | 175 | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, "sdhc1-card-detect", data); |
136 | } | 176 | } |
137 | 177 | ||
138 | static void mx27_3ds_sdhc1_exit(struct device *dev, void *data) | 178 | static void mx27_3ds_sdhc1_exit(struct device *dev, void *data) |
139 | { | 179 | { |
140 | free_irq(IRQ_GPIOB(26), data); | 180 | free_irq(gpio_to_irq(SD1_CD), data); |
141 | } | 181 | } |
142 | 182 | ||
143 | static const struct imxmmc_platform_data sdhc1_pdata __initconst = { | 183 | static const struct imxmmc_platform_data sdhc1_pdata __initconst = { |
@@ -193,6 +233,13 @@ static int __init mx27_3ds_otg_mode(char *options) | |||
193 | __setup("otg_mode=", mx27_3ds_otg_mode); | 233 | __setup("otg_mode=", mx27_3ds_otg_mode); |
194 | 234 | ||
195 | /* Regulators */ | 235 | /* Regulators */ |
236 | static struct regulator_init_data gpo_init = { | ||
237 | .constraints = { | ||
238 | .boot_on = 1, | ||
239 | .always_on = 1, | ||
240 | } | ||
241 | }; | ||
242 | |||
196 | static struct regulator_consumer_supply vmmc1_consumers[] = { | 243 | static struct regulator_consumer_supply vmmc1_consumers[] = { |
197 | REGULATOR_SUPPLY("lcd_2v8", NULL), | 244 | REGULATOR_SUPPLY("lcd_2v8", NULL), |
198 | }; | 245 | }; |
@@ -201,7 +248,9 @@ static struct regulator_init_data vmmc1_init = { | |||
201 | .constraints = { | 248 | .constraints = { |
202 | .min_uV = 2800000, | 249 | .min_uV = 2800000, |
203 | .max_uV = 2800000, | 250 | .max_uV = 2800000, |
204 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | 251 | .apply_uV = 1, |
252 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | ||
253 | REGULATOR_CHANGE_STATUS, | ||
205 | }, | 254 | }, |
206 | .num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers), | 255 | .num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers), |
207 | .consumer_supplies = vmmc1_consumers, | 256 | .consumer_supplies = vmmc1_consumers, |
@@ -228,6 +277,12 @@ static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = { | |||
228 | }, { | 277 | }, { |
229 | .id = MC13783_REG_VGEN, | 278 | .id = MC13783_REG_VGEN, |
230 | .init_data = &vgen_init, | 279 | .init_data = &vgen_init, |
280 | }, { | ||
281 | .id = MC13783_REG_GPO1, /* Turn on 1.8V */ | ||
282 | .init_data = &gpo_init, | ||
283 | }, { | ||
284 | .id = MC13783_REG_GPO3, /* Turn on 3.3V */ | ||
285 | .init_data = &gpo_init, | ||
231 | }, | 286 | }, |
232 | }; | 287 | }; |
233 | 288 | ||
@@ -238,15 +293,63 @@ static struct mc13xxx_platform_data mc13783_pdata = { | |||
238 | .num_regulators = ARRAY_SIZE(mx27_3ds_regulators), | 293 | .num_regulators = ARRAY_SIZE(mx27_3ds_regulators), |
239 | 294 | ||
240 | }, | 295 | }, |
241 | .flags = MC13783_USE_REGULATOR, | 296 | .flags = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN | |
297 | MC13783_USE_RTC, | ||
242 | }; | 298 | }; |
243 | 299 | ||
244 | /* SPI */ | 300 | /* SPI */ |
245 | static int spi2_internal_chipselect[] = {SPI2_SS0}; | 301 | static int spi1_chipselect[] = {SPI1_SS0}; |
302 | |||
303 | static const struct spi_imx_master spi1_pdata __initconst = { | ||
304 | .chipselect = spi1_chipselect, | ||
305 | .num_chipselect = ARRAY_SIZE(spi1_chipselect), | ||
306 | }; | ||
307 | |||
308 | static int spi2_chipselect[] = {SPI2_SS0}; | ||
246 | 309 | ||
247 | static const struct spi_imx_master spi2_pdata __initconst = { | 310 | static const struct spi_imx_master spi2_pdata __initconst = { |
248 | .chipselect = spi2_internal_chipselect, | 311 | .chipselect = spi2_chipselect, |
249 | .num_chipselect = ARRAY_SIZE(spi2_internal_chipselect), | 312 | .num_chipselect = ARRAY_SIZE(spi2_chipselect), |
313 | }; | ||
314 | |||
315 | static struct imx_fb_videomode mx27_3ds_modes[] = { | ||
316 | { /* 480x640 @ 60 Hz */ | ||
317 | .mode = { | ||
318 | .name = "Epson-VGA", | ||
319 | .refresh = 60, | ||
320 | .xres = 480, | ||
321 | .yres = 640, | ||
322 | .pixclock = 41701, | ||
323 | .left_margin = 20, | ||
324 | .right_margin = 41, | ||
325 | .upper_margin = 10, | ||
326 | .lower_margin = 5, | ||
327 | .hsync_len = 20, | ||
328 | .vsync_len = 10, | ||
329 | .sync = FB_SYNC_OE_ACT_HIGH | | ||
330 | FB_SYNC_CLK_INVERT, | ||
331 | .vmode = FB_VMODE_NONINTERLACED, | ||
332 | .flag = 0, | ||
333 | }, | ||
334 | .bpp = 16, | ||
335 | .pcr = 0xFAC08B82, | ||
336 | }, | ||
337 | }; | ||
338 | |||
339 | static const struct imx_fb_platform_data mx27_3ds_fb_data __initconst = { | ||
340 | .mode = mx27_3ds_modes, | ||
341 | .num_modes = ARRAY_SIZE(mx27_3ds_modes), | ||
342 | .pwmr = 0x00A903FF, | ||
343 | .lscr1 = 0x00120300, | ||
344 | .dmacr = 0x00020010, | ||
345 | }; | ||
346 | |||
347 | /* LCD */ | ||
348 | static struct l4f00242t03_pdata mx27_3ds_lcd_pdata = { | ||
349 | .reset_gpio = LCD_RESET, | ||
350 | .data_enable_gpio = LCD_ENABLE, | ||
351 | .core_supply = "lcd_2v8", | ||
352 | .io_supply = "vdd_lcdio", | ||
250 | }; | 353 | }; |
251 | 354 | ||
252 | static struct spi_board_info mx27_3ds_spi_devs[] __initdata = { | 355 | static struct spi_board_info mx27_3ds_spi_devs[] __initdata = { |
@@ -256,8 +359,14 @@ static struct spi_board_info mx27_3ds_spi_devs[] __initdata = { | |||
256 | .bus_num = 1, | 359 | .bus_num = 1, |
257 | .chip_select = 0, /* SS0 */ | 360 | .chip_select = 0, /* SS0 */ |
258 | .platform_data = &mc13783_pdata, | 361 | .platform_data = &mc13783_pdata, |
259 | .irq = IRQ_GPIOC(14), | 362 | .irq = gpio_to_irq(PMIC_INT), |
260 | .mode = SPI_CS_HIGH, | 363 | .mode = SPI_CS_HIGH, |
364 | }, { | ||
365 | .modalias = "l4f00242t03", | ||
366 | .max_speed_hz = 5000000, | ||
367 | .bus_num = 0, | ||
368 | .chip_select = 0, /* SS0 */ | ||
369 | .platform_data = &mx27_3ds_lcd_pdata, | ||
261 | }, | 370 | }, |
262 | }; | 371 | }; |
263 | 372 | ||
@@ -267,6 +376,8 @@ static const struct imxi2c_platform_data mx27_3ds_i2c0_data __initconst = { | |||
267 | 376 | ||
268 | static void __init mx27pdk_init(void) | 377 | static void __init mx27pdk_init(void) |
269 | { | 378 | { |
379 | imx27_soc_init(); | ||
380 | |||
270 | mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins), | 381 | mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins), |
271 | "mx27pdk"); | 382 | "mx27pdk"); |
272 | mx27_3ds_sdhc1_enable_level_translator(); | 383 | mx27_3ds_sdhc1_enable_level_translator(); |
@@ -289,12 +400,14 @@ static void __init mx27pdk_init(void) | |||
289 | imx27_add_fsl_usb2_udc(&otg_device_pdata); | 400 | imx27_add_fsl_usb2_udc(&otg_device_pdata); |
290 | 401 | ||
291 | imx27_add_spi_imx1(&spi2_pdata); | 402 | imx27_add_spi_imx1(&spi2_pdata); |
403 | imx27_add_spi_imx0(&spi1_pdata); | ||
292 | spi_register_board_info(mx27_3ds_spi_devs, | 404 | spi_register_board_info(mx27_3ds_spi_devs, |
293 | ARRAY_SIZE(mx27_3ds_spi_devs)); | 405 | ARRAY_SIZE(mx27_3ds_spi_devs)); |
294 | 406 | ||
295 | if (mxc_expio_init(MX27_CS5_BASE_ADDR, EXPIO_PARENT_INT)) | 407 | if (mxc_expio_init(MX27_CS5_BASE_ADDR, EXPIO_PARENT_INT)) |
296 | pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n"); | 408 | pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n"); |
297 | imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data); | 409 | imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data); |
410 | imx27_add_imx_fb(&mx27_3ds_fb_data); | ||
298 | } | 411 | } |
299 | 412 | ||
300 | static void __init mx27pdk_timer_init(void) | 413 | static void __init mx27pdk_timer_init(void) |
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c index 1db79506f5e4..fc26ed71b9ed 100644 --- a/arch/arm/mach-imx/mach-mx27ads.c +++ b/arch/arm/mach-imx/mach-mx27ads.c | |||
@@ -288,6 +288,8 @@ static const struct imxuart_platform_data uart_pdata __initconst = { | |||
288 | 288 | ||
289 | static void __init mx27ads_board_init(void) | 289 | static void __init mx27ads_board_init(void) |
290 | { | 290 | { |
291 | imx27_soc_init(); | ||
292 | |||
291 | mxc_gpio_setup_multiple_pins(mx27ads_pins, ARRAY_SIZE(mx27ads_pins), | 293 | mxc_gpio_setup_multiple_pins(mx27ads_pins, ARRAY_SIZE(mx27ads_pins), |
292 | "mx27ads"); | 294 | "mx27ads"); |
293 | 295 | ||
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c index 9b982449cb52..1446b353af05 100644 --- a/arch/arm/mach-imx/mach-mx31_3ds.c +++ b/arch/arm/mach-imx/mach-mx31_3ds.c | |||
@@ -53,11 +53,8 @@ static int mx31_3ds_pins[] = { | |||
53 | MX31_PIN_RXD1__RXD1, | 53 | MX31_PIN_RXD1__RXD1, |
54 | IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO), | 54 | IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO), |
55 | /*SPI0*/ | 55 | /*SPI0*/ |
56 | MX31_PIN_CSPI1_SCLK__SCLK, | 56 | IOMUX_MODE(MX31_PIN_DSR_DCE1, IOMUX_CONFIG_ALT1), |
57 | MX31_PIN_CSPI1_MOSI__MOSI, | 57 | IOMUX_MODE(MX31_PIN_RI_DCE1, IOMUX_CONFIG_ALT1), |
58 | MX31_PIN_CSPI1_MISO__MISO, | ||
59 | MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, | ||
60 | MX31_PIN_CSPI1_SS2__SS2, /* CS for LCD */ | ||
61 | /* SPI 1 */ | 58 | /* SPI 1 */ |
62 | MX31_PIN_CSPI2_SCLK__SCLK, | 59 | MX31_PIN_CSPI2_SCLK__SCLK, |
63 | MX31_PIN_CSPI2_MOSI__MOSI, | 60 | MX31_PIN_CSPI2_MOSI__MOSI, |
@@ -689,6 +686,11 @@ static void __init mx31_3ds_init(void) | |||
689 | { | 686 | { |
690 | int ret; | 687 | int ret; |
691 | 688 | ||
689 | imx31_soc_init(); | ||
690 | |||
691 | /* Configure SPI1 IOMUX */ | ||
692 | mxc_iomux_set_gpr(MUX_PGP_CSPI_BB, true); | ||
693 | |||
692 | mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins), | 694 | mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins), |
693 | "mx31_3ds"); | 695 | "mx31_3ds"); |
694 | 696 | ||
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c index f4dee0254634..0ce49478a479 100644 --- a/arch/arm/mach-imx/mach-mx31ads.c +++ b/arch/arm/mach-imx/mach-mx31ads.c | |||
@@ -516,6 +516,8 @@ static void __init mx31ads_init_irq(void) | |||
516 | 516 | ||
517 | static void __init mx31ads_init(void) | 517 | static void __init mx31ads_init(void) |
518 | { | 518 | { |
519 | imx31_soc_init(); | ||
520 | |||
519 | mxc_init_extuart(); | 521 | mxc_init_extuart(); |
520 | mxc_init_imx_uart(); | 522 | mxc_init_imx_uart(); |
521 | mxc_init_i2c(); | 523 | mxc_init_i2c(); |
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c index 410e676ae087..750368ddf0f9 100644 --- a/arch/arm/mach-imx/mach-mx31lilly.c +++ b/arch/arm/mach-imx/mach-mx31lilly.c | |||
@@ -243,6 +243,8 @@ core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444); | |||
243 | 243 | ||
244 | static void __init mx31lilly_board_init(void) | 244 | static void __init mx31lilly_board_init(void) |
245 | { | 245 | { |
246 | imx31_soc_init(); | ||
247 | |||
246 | switch (mx31lilly_baseboard) { | 248 | switch (mx31lilly_baseboard) { |
247 | case MX31LILLY_NOBOARD: | 249 | case MX31LILLY_NOBOARD: |
248 | break; | 250 | break; |
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c index ac9b4cad320e..4b47fd9fdd89 100644 --- a/arch/arm/mach-imx/mach-mx31lite.c +++ b/arch/arm/mach-imx/mach-mx31lite.c | |||
@@ -230,6 +230,8 @@ static void __init mx31lite_init(void) | |||
230 | { | 230 | { |
231 | int ret; | 231 | int ret; |
232 | 232 | ||
233 | imx31_soc_init(); | ||
234 | |||
233 | switch (mx31lite_baseboard) { | 235 | switch (mx31lite_baseboard) { |
234 | case MX31LITE_NOBOARD: | 236 | case MX31LITE_NOBOARD: |
235 | break; | 237 | break; |
diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c index eaa51e49ca95..b358383120e7 100644 --- a/arch/arm/mach-imx/mach-mx31moboard.c +++ b/arch/arm/mach-imx/mach-mx31moboard.c | |||
@@ -425,7 +425,7 @@ static int __init moboard_usbh2_init(void) | |||
425 | return 0; | 425 | return 0; |
426 | } | 426 | } |
427 | 427 | ||
428 | static struct gpio_led mx31moboard_leds[] = { | 428 | static const struct gpio_led mx31moboard_leds[] __initconst = { |
429 | { | 429 | { |
430 | .name = "coreboard-led-0:red:running", | 430 | .name = "coreboard-led-0:red:running", |
431 | .default_trigger = "heartbeat", | 431 | .default_trigger = "heartbeat", |
@@ -442,26 +442,17 @@ static struct gpio_led mx31moboard_leds[] = { | |||
442 | }, | 442 | }, |
443 | }; | 443 | }; |
444 | 444 | ||
445 | static struct gpio_led_platform_data mx31moboard_led_pdata = { | 445 | static const struct gpio_led_platform_data mx31moboard_led_pdata __initconst = { |
446 | .num_leds = ARRAY_SIZE(mx31moboard_leds), | 446 | .num_leds = ARRAY_SIZE(mx31moboard_leds), |
447 | .leds = mx31moboard_leds, | 447 | .leds = mx31moboard_leds, |
448 | }; | 448 | }; |
449 | 449 | ||
450 | static struct platform_device mx31moboard_leds_device = { | ||
451 | .name = "leds-gpio", | ||
452 | .id = -1, | ||
453 | .dev = { | ||
454 | .platform_data = &mx31moboard_led_pdata, | ||
455 | }, | ||
456 | }; | ||
457 | |||
458 | static const struct ipu_platform_data mx3_ipu_data __initconst = { | 450 | static const struct ipu_platform_data mx3_ipu_data __initconst = { |
459 | .irq_base = MXC_IPU_IRQ_START, | 451 | .irq_base = MXC_IPU_IRQ_START, |
460 | }; | 452 | }; |
461 | 453 | ||
462 | static struct platform_device *devices[] __initdata = { | 454 | static struct platform_device *devices[] __initdata = { |
463 | &mx31moboard_flash, | 455 | &mx31moboard_flash, |
464 | &mx31moboard_leds_device, | ||
465 | }; | 456 | }; |
466 | 457 | ||
467 | static struct mx3_camera_pdata camera_pdata __initdata = { | 458 | static struct mx3_camera_pdata camera_pdata __initdata = { |
@@ -507,10 +498,13 @@ core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444); | |||
507 | */ | 498 | */ |
508 | static void __init mx31moboard_init(void) | 499 | static void __init mx31moboard_init(void) |
509 | { | 500 | { |
501 | imx31_soc_init(); | ||
502 | |||
510 | mxc_iomux_setup_multiple_pins(moboard_pins, ARRAY_SIZE(moboard_pins), | 503 | mxc_iomux_setup_multiple_pins(moboard_pins, ARRAY_SIZE(moboard_pins), |
511 | "moboard"); | 504 | "moboard"); |
512 | 505 | ||
513 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 506 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
507 | gpio_led_register_device(-1, &mx31moboard_led_pdata); | ||
514 | 508 | ||
515 | imx31_add_imx_uart0(&uart0_pdata); | 509 | imx31_add_imx_uart0(&uart0_pdata); |
516 | imx31_add_imx_uart4(&uart4_pdata); | 510 | imx31_add_imx_uart4(&uart4_pdata); |
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c index 882880ac1bbc..b3b9bd8ac2a3 100644 --- a/arch/arm/mach-imx/mach-mx35_3ds.c +++ b/arch/arm/mach-imx/mach-mx35_3ds.c | |||
@@ -43,7 +43,7 @@ | |||
43 | 43 | ||
44 | #include "devices-imx35.h" | 44 | #include "devices-imx35.h" |
45 | 45 | ||
46 | #define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTA + 1) | 46 | #define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(1, 1)) |
47 | 47 | ||
48 | static const struct imxuart_platform_data uart_pdata __initconst = { | 48 | static const struct imxuart_platform_data uart_pdata __initconst = { |
49 | .flags = IMXUART_HAVE_RTSCTS, | 49 | .flags = IMXUART_HAVE_RTSCTS, |
@@ -179,6 +179,8 @@ static const struct imxi2c_platform_data mx35_3ds_i2c0_data __initconst = { | |||
179 | */ | 179 | */ |
180 | static void __init mx35_3ds_init(void) | 180 | static void __init mx35_3ds_init(void) |
181 | { | 181 | { |
182 | imx35_soc_init(); | ||
183 | |||
182 | mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads)); | 184 | mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads)); |
183 | 185 | ||
184 | imx35_add_fec(NULL); | 186 | imx35_add_fec(NULL); |
diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c index 2774541511e7..c85876fed663 100644 --- a/arch/arm/mach-imx/mach-mxt_td60.c +++ b/arch/arm/mach-imx/mach-mxt_td60.c | |||
@@ -233,6 +233,8 @@ static const struct imxuart_platform_data uart_pdata __initconst = { | |||
233 | 233 | ||
234 | static void __init mxt_td60_board_init(void) | 234 | static void __init mxt_td60_board_init(void) |
235 | { | 235 | { |
236 | imx27_soc_init(); | ||
237 | |||
236 | mxc_gpio_setup_multiple_pins(mxt_td60_pins, ARRAY_SIZE(mxt_td60_pins), | 238 | mxc_gpio_setup_multiple_pins(mxt_td60_pins, ARRAY_SIZE(mxt_td60_pins), |
237 | "MXT_TD60"); | 239 | "MXT_TD60"); |
238 | 240 | ||
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index bbddc5a11c43..71083aa16038 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c | |||
@@ -357,6 +357,8 @@ static void __init pca100_init(void) | |||
357 | { | 357 | { |
358 | int ret; | 358 | int ret; |
359 | 359 | ||
360 | imx27_soc_init(); | ||
361 | |||
360 | /* SSI unit */ | 362 | /* SSI unit */ |
361 | mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0, | 363 | mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0, |
362 | MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */ | 364 | MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */ |
diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c index 89c213b81295..f45b7cd72c8a 100644 --- a/arch/arm/mach-imx/mach-pcm037.c +++ b/arch/arm/mach-imx/mach-pcm037.c | |||
@@ -576,6 +576,8 @@ static void __init pcm037_init(void) | |||
576 | { | 576 | { |
577 | int ret; | 577 | int ret; |
578 | 578 | ||
579 | imx31_soc_init(); | ||
580 | |||
579 | mxc_iomux_set_gpr(MUX_PGP_UH2, 1); | 581 | mxc_iomux_set_gpr(MUX_PGP_UH2, 1); |
580 | 582 | ||
581 | mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins), | 583 | mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins), |
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index 853bb871c7ed..2d6a64bbac44 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c | |||
@@ -295,6 +295,8 @@ static const struct mxc_usbh_platform_data usbh2_pdata __initconst = { | |||
295 | 295 | ||
296 | static void __init pcm038_init(void) | 296 | static void __init pcm038_init(void) |
297 | { | 297 | { |
298 | imx27_soc_init(); | ||
299 | |||
298 | mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins), | 300 | mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins), |
299 | "PCM038"); | 301 | "PCM038"); |
300 | 302 | ||
diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c index 026441628dfa..163cc318cafb 100644 --- a/arch/arm/mach-imx/mach-pcm043.c +++ b/arch/arm/mach-imx/mach-pcm043.c | |||
@@ -356,6 +356,8 @@ static struct esdhc_platform_data sd1_pdata = { | |||
356 | */ | 356 | */ |
357 | static void __init pcm043_init(void) | 357 | static void __init pcm043_init(void) |
358 | { | 358 | { |
359 | imx35_soc_init(); | ||
360 | |||
359 | mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads)); | 361 | mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads)); |
360 | 362 | ||
361 | mxc_audmux_v2_configure_port(3, | 363 | mxc_audmux_v2_configure_port(3, |
diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c index c16328715939..3626f486498a 100644 --- a/arch/arm/mach-imx/mach-qong.c +++ b/arch/arm/mach-imx/mach-qong.c | |||
@@ -244,6 +244,8 @@ static void __init qong_init_fpga(void) | |||
244 | */ | 244 | */ |
245 | static void __init qong_init(void) | 245 | static void __init qong_init(void) |
246 | { | 246 | { |
247 | imx31_soc_init(); | ||
248 | |||
247 | mxc_init_imx_uart(); | 249 | mxc_init_imx_uart(); |
248 | qong_init_nor_mtd(); | 250 | qong_init_nor_mtd(); |
249 | qong_init_fpga(); | 251 | qong_init_fpga(); |
diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c index dcaee043628e..db2d60470e15 100644 --- a/arch/arm/mach-imx/mach-scb9328.c +++ b/arch/arm/mach-imx/mach-scb9328.c | |||
@@ -101,21 +101,7 @@ static const int mxc_uart1_pins[] = { | |||
101 | PC12_PF_UART1_RXD, | 101 | PC12_PF_UART1_RXD, |
102 | }; | 102 | }; |
103 | 103 | ||
104 | static int uart1_mxc_init(struct platform_device *pdev) | ||
105 | { | ||
106 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, | ||
107 | ARRAY_SIZE(mxc_uart1_pins), "UART1"); | ||
108 | } | ||
109 | |||
110 | static void uart1_mxc_exit(struct platform_device *pdev) | ||
111 | { | ||
112 | mxc_gpio_release_multiple_pins(mxc_uart1_pins, | ||
113 | ARRAY_SIZE(mxc_uart1_pins)); | ||
114 | } | ||
115 | |||
116 | static const struct imxuart_platform_data uart_pdata __initconst = { | 104 | static const struct imxuart_platform_data uart_pdata __initconst = { |
117 | .init = uart1_mxc_init, | ||
118 | .exit = uart1_mxc_exit, | ||
119 | .flags = IMXUART_HAVE_RTSCTS, | 105 | .flags = IMXUART_HAVE_RTSCTS, |
120 | }; | 106 | }; |
121 | 107 | ||
@@ -129,6 +115,11 @@ static struct platform_device *devices[] __initdata = { | |||
129 | */ | 115 | */ |
130 | static void __init scb9328_init(void) | 116 | static void __init scb9328_init(void) |
131 | { | 117 | { |
118 | imx1_soc_init(); | ||
119 | |||
120 | mxc_gpio_setup_multiple_pins(mxc_uart1_pins, | ||
121 | ARRAY_SIZE(mxc_uart1_pins), "UART1"); | ||
122 | |||
132 | imx1_add_imx_uart0(&uart_pdata); | 123 | imx1_add_imx_uart0(&uart_pdata); |
133 | 124 | ||
134 | printk(KERN_INFO"Scb9328: Adding devices\n"); | 125 | printk(KERN_INFO"Scb9328: Adding devices\n"); |
diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c index d74e3473d236..7d8e012a6335 100644 --- a/arch/arm/mach-imx/mach-vpr200.c +++ b/arch/arm/mach-imx/mach-vpr200.c | |||
@@ -267,6 +267,8 @@ static struct platform_device *devices[] __initdata = { | |||
267 | */ | 267 | */ |
268 | static void __init vpr200_board_init(void) | 268 | static void __init vpr200_board_init(void) |
269 | { | 269 | { |
270 | imx35_soc_init(); | ||
271 | |||
270 | mxc_iomux_v3_setup_multiple_pads(vpr200_pads, ARRAY_SIZE(vpr200_pads)); | 272 | mxc_iomux_v3_setup_multiple_pads(vpr200_pads, ARRAY_SIZE(vpr200_pads)); |
271 | 273 | ||
272 | imx35_add_fec(NULL); | 274 | imx35_add_fec(NULL); |
diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c index 2e482ba5a0e7..f2a6566e22e7 100644 --- a/arch/arm/mach-imx/mm-imx1.c +++ b/arch/arm/mach-imx/mm-imx1.c | |||
@@ -23,7 +23,6 @@ | |||
23 | 23 | ||
24 | #include <mach/common.h> | 24 | #include <mach/common.h> |
25 | #include <mach/hardware.h> | 25 | #include <mach/hardware.h> |
26 | #include <mach/gpio.h> | ||
27 | #include <mach/irqs.h> | 26 | #include <mach/irqs.h> |
28 | #include <mach/iomux-v1.h> | 27 | #include <mach/iomux-v1.h> |
29 | 28 | ||
@@ -44,15 +43,19 @@ void __init imx1_init_early(void) | |||
44 | MX1_NUM_GPIO_PORT); | 43 | MX1_NUM_GPIO_PORT); |
45 | } | 44 | } |
46 | 45 | ||
47 | static struct mxc_gpio_port imx1_gpio_ports[] = { | ||
48 | DEFINE_IMX_GPIO_PORT_IRQ(MX1, 0, 1, MX1_GPIO_INT_PORTA), | ||
49 | DEFINE_IMX_GPIO_PORT_IRQ(MX1, 1, 2, MX1_GPIO_INT_PORTB), | ||
50 | DEFINE_IMX_GPIO_PORT_IRQ(MX1, 2, 3, MX1_GPIO_INT_PORTC), | ||
51 | DEFINE_IMX_GPIO_PORT_IRQ(MX1, 3, 4, MX1_GPIO_INT_PORTD), | ||
52 | }; | ||
53 | |||
54 | void __init mx1_init_irq(void) | 46 | void __init mx1_init_irq(void) |
55 | { | 47 | { |
56 | mxc_init_irq(MX1_IO_ADDRESS(MX1_AVIC_BASE_ADDR)); | 48 | mxc_init_irq(MX1_IO_ADDRESS(MX1_AVIC_BASE_ADDR)); |
57 | mxc_gpio_init(imx1_gpio_ports, ARRAY_SIZE(imx1_gpio_ports)); | 49 | } |
50 | |||
51 | void __init imx1_soc_init(void) | ||
52 | { | ||
53 | mxc_register_gpio(0, MX1_GPIO1_BASE_ADDR, SZ_256, | ||
54 | MX1_GPIO_INT_PORTA, 0); | ||
55 | mxc_register_gpio(1, MX1_GPIO2_BASE_ADDR, SZ_256, | ||
56 | MX1_GPIO_INT_PORTB, 0); | ||
57 | mxc_register_gpio(2, MX1_GPIO3_BASE_ADDR, SZ_256, | ||
58 | MX1_GPIO_INT_PORTC, 0); | ||
59 | mxc_register_gpio(3, MX1_GPIO4_BASE_ADDR, SZ_256, | ||
60 | MX1_GPIO_INT_PORTD, 0); | ||
58 | } | 61 | } |
diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c index 7a0c500ac2c8..4f32a8a9aeed 100644 --- a/arch/arm/mach-imx/mm-imx21.c +++ b/arch/arm/mach-imx/mm-imx21.c | |||
@@ -22,9 +22,9 @@ | |||
22 | #include <linux/init.h> | 22 | #include <linux/init.h> |
23 | #include <mach/hardware.h> | 23 | #include <mach/hardware.h> |
24 | #include <mach/common.h> | 24 | #include <mach/common.h> |
25 | #include <mach/devices-common.h> | ||
25 | #include <asm/pgtable.h> | 26 | #include <asm/pgtable.h> |
26 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
27 | #include <mach/gpio.h> | ||
28 | #include <mach/irqs.h> | 28 | #include <mach/irqs.h> |
29 | #include <mach/iomux-v1.h> | 29 | #include <mach/iomux-v1.h> |
30 | 30 | ||
@@ -70,17 +70,19 @@ void __init imx21_init_early(void) | |||
70 | MX21_NUM_GPIO_PORT); | 70 | MX21_NUM_GPIO_PORT); |
71 | } | 71 | } |
72 | 72 | ||
73 | static struct mxc_gpio_port imx21_gpio_ports[] = { | ||
74 | DEFINE_IMX_GPIO_PORT_IRQ(MX21, 0, 1, MX21_INT_GPIO), | ||
75 | DEFINE_IMX_GPIO_PORT(MX21, 1, 2), | ||
76 | DEFINE_IMX_GPIO_PORT(MX21, 2, 3), | ||
77 | DEFINE_IMX_GPIO_PORT(MX21, 3, 4), | ||
78 | DEFINE_IMX_GPIO_PORT(MX21, 4, 5), | ||
79 | DEFINE_IMX_GPIO_PORT(MX21, 5, 6), | ||
80 | }; | ||
81 | |||
82 | void __init mx21_init_irq(void) | 73 | void __init mx21_init_irq(void) |
83 | { | 74 | { |
84 | mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR)); | 75 | mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR)); |
85 | mxc_gpio_init(imx21_gpio_ports, ARRAY_SIZE(imx21_gpio_ports)); | 76 | } |
77 | |||
78 | void __init imx21_soc_init(void) | ||
79 | { | ||
80 | mxc_register_gpio(0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); | ||
81 | mxc_register_gpio(1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); | ||
82 | mxc_register_gpio(2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); | ||
83 | mxc_register_gpio(3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); | ||
84 | mxc_register_gpio(4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); | ||
85 | mxc_register_gpio(5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); | ||
86 | |||
87 | imx_add_imx_dma(); | ||
86 | } | 88 | } |
diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c index 02f7b5c7fa8e..1e0c95651c23 100644 --- a/arch/arm/mach-imx/mm-imx25.c +++ b/arch/arm/mach-imx/mm-imx25.c | |||
@@ -24,10 +24,10 @@ | |||
24 | #include <asm/mach/map.h> | 24 | #include <asm/mach/map.h> |
25 | 25 | ||
26 | #include <mach/common.h> | 26 | #include <mach/common.h> |
27 | #include <mach/devices-common.h> | ||
27 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
28 | #include <mach/mx25.h> | 29 | #include <mach/mx25.h> |
29 | #include <mach/iomux-v3.h> | 30 | #include <mach/iomux-v3.h> |
30 | #include <mach/gpio.h> | ||
31 | #include <mach/irqs.h> | 31 | #include <mach/irqs.h> |
32 | 32 | ||
33 | /* | 33 | /* |
@@ -57,16 +57,39 @@ void __init imx25_init_early(void) | |||
57 | mxc_arch_reset_init(MX25_IO_ADDRESS(MX25_WDOG_BASE_ADDR)); | 57 | mxc_arch_reset_init(MX25_IO_ADDRESS(MX25_WDOG_BASE_ADDR)); |
58 | } | 58 | } |
59 | 59 | ||
60 | static struct mxc_gpio_port imx25_gpio_ports[] = { | ||
61 | DEFINE_IMX_GPIO_PORT_IRQ(MX25, 0, 1, MX25_INT_GPIO1), | ||
62 | DEFINE_IMX_GPIO_PORT_IRQ(MX25, 1, 2, MX25_INT_GPIO2), | ||
63 | DEFINE_IMX_GPIO_PORT_IRQ(MX25, 2, 3, MX25_INT_GPIO3), | ||
64 | DEFINE_IMX_GPIO_PORT_IRQ(MX25, 3, 4, MX25_INT_GPIO4), | ||
65 | }; | ||
66 | |||
67 | void __init mx25_init_irq(void) | 60 | void __init mx25_init_irq(void) |
68 | { | 61 | { |
69 | mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR)); | 62 | mxc_init_irq(MX25_IO_ADDRESS(MX25_AVIC_BASE_ADDR)); |
70 | mxc_gpio_init(imx25_gpio_ports, ARRAY_SIZE(imx25_gpio_ports)); | ||
71 | } | 63 | } |
72 | 64 | ||
65 | static struct sdma_script_start_addrs imx25_sdma_script __initdata = { | ||
66 | .ap_2_ap_addr = 729, | ||
67 | .uart_2_mcu_addr = 904, | ||
68 | .per_2_app_addr = 1255, | ||
69 | .mcu_2_app_addr = 834, | ||
70 | .uartsh_2_mcu_addr = 1120, | ||
71 | .per_2_shp_addr = 1329, | ||
72 | .mcu_2_shp_addr = 1048, | ||
73 | .ata_2_mcu_addr = 1560, | ||
74 | .mcu_2_ata_addr = 1479, | ||
75 | .app_2_per_addr = 1189, | ||
76 | .app_2_mcu_addr = 770, | ||
77 | .shp_2_per_addr = 1407, | ||
78 | .shp_2_mcu_addr = 979, | ||
79 | }; | ||
80 | |||
81 | static struct sdma_platform_data imx25_sdma_pdata __initdata = { | ||
82 | .sdma_version = 2, | ||
83 | .fw_name = "sdma-imx25.bin", | ||
84 | .script_addrs = &imx25_sdma_script, | ||
85 | }; | ||
86 | |||
87 | void __init imx25_soc_init(void) | ||
88 | { | ||
89 | mxc_register_gpio(0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0); | ||
90 | mxc_register_gpio(1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); | ||
91 | mxc_register_gpio(2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0); | ||
92 | mxc_register_gpio(3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0); | ||
93 | |||
94 | imx_add_imx_sdma(MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata); | ||
95 | } | ||
diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c index a6761a39f08c..944e02d3ccc2 100644 --- a/arch/arm/mach-imx/mm-imx27.c +++ b/arch/arm/mach-imx/mm-imx27.c | |||
@@ -22,9 +22,9 @@ | |||
22 | #include <linux/init.h> | 22 | #include <linux/init.h> |
23 | #include <mach/hardware.h> | 23 | #include <mach/hardware.h> |
24 | #include <mach/common.h> | 24 | #include <mach/common.h> |
25 | #include <mach/devices-common.h> | ||
25 | #include <asm/pgtable.h> | 26 | #include <asm/pgtable.h> |
26 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
27 | #include <mach/gpio.h> | ||
28 | #include <mach/irqs.h> | 28 | #include <mach/irqs.h> |
29 | #include <mach/iomux-v1.h> | 29 | #include <mach/iomux-v1.h> |
30 | 30 | ||
@@ -70,17 +70,19 @@ void __init imx27_init_early(void) | |||
70 | MX27_NUM_GPIO_PORT); | 70 | MX27_NUM_GPIO_PORT); |
71 | } | 71 | } |
72 | 72 | ||
73 | static struct mxc_gpio_port imx27_gpio_ports[] = { | ||
74 | DEFINE_IMX_GPIO_PORT_IRQ(MX27, 0, 1, MX27_INT_GPIO), | ||
75 | DEFINE_IMX_GPIO_PORT(MX27, 1, 2), | ||
76 | DEFINE_IMX_GPIO_PORT(MX27, 2, 3), | ||
77 | DEFINE_IMX_GPIO_PORT(MX27, 3, 4), | ||
78 | DEFINE_IMX_GPIO_PORT(MX27, 4, 5), | ||
79 | DEFINE_IMX_GPIO_PORT(MX27, 5, 6), | ||
80 | }; | ||
81 | |||
82 | void __init mx27_init_irq(void) | 73 | void __init mx27_init_irq(void) |
83 | { | 74 | { |
84 | mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR)); | 75 | mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR)); |
85 | mxc_gpio_init(imx27_gpio_ports, ARRAY_SIZE(imx27_gpio_ports)); | 76 | } |
77 | |||
78 | void __init imx27_soc_init(void) | ||
79 | { | ||
80 | mxc_register_gpio(0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); | ||
81 | mxc_register_gpio(1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); | ||
82 | mxc_register_gpio(2, MX27_GPIO3_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); | ||
83 | mxc_register_gpio(3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); | ||
84 | mxc_register_gpio(4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); | ||
85 | mxc_register_gpio(5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); | ||
86 | |||
87 | imx_add_imx_dma(); | ||
86 | } | 88 | } |
diff --git a/arch/arm/mach-imx/mm-imx31.c b/arch/arm/mach-imx/mm-imx31.c index 86b9b45864d2..a1ff96f249d1 100644 --- a/arch/arm/mach-imx/mm-imx31.c +++ b/arch/arm/mach-imx/mm-imx31.c | |||
@@ -24,9 +24,9 @@ | |||
24 | #include <asm/mach/map.h> | 24 | #include <asm/mach/map.h> |
25 | 25 | ||
26 | #include <mach/common.h> | 26 | #include <mach/common.h> |
27 | #include <mach/devices-common.h> | ||
27 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
28 | #include <mach/iomux-v3.h> | 29 | #include <mach/iomux-v3.h> |
29 | #include <mach/gpio.h> | ||
30 | #include <mach/irqs.h> | 30 | #include <mach/irqs.h> |
31 | 31 | ||
32 | static struct map_desc mx31_io_desc[] __initdata = { | 32 | static struct map_desc mx31_io_desc[] __initdata = { |
@@ -53,14 +53,40 @@ void __init imx31_init_early(void) | |||
53 | mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); | 53 | mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); |
54 | } | 54 | } |
55 | 55 | ||
56 | static struct mxc_gpio_port imx31_gpio_ports[] = { | ||
57 | DEFINE_IMX_GPIO_PORT_IRQ(MX31, 0, 1, MX31_INT_GPIO1), | ||
58 | DEFINE_IMX_GPIO_PORT_IRQ(MX31, 1, 2, MX31_INT_GPIO2), | ||
59 | DEFINE_IMX_GPIO_PORT_IRQ(MX31, 2, 3, MX31_INT_GPIO3), | ||
60 | }; | ||
61 | |||
62 | void __init mx31_init_irq(void) | 56 | void __init mx31_init_irq(void) |
63 | { | 57 | { |
64 | mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); | 58 | mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); |
65 | mxc_gpio_init(imx31_gpio_ports, ARRAY_SIZE(imx31_gpio_ports)); | 59 | } |
60 | |||
61 | static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = { | ||
62 | .per_2_per_addr = 1677, | ||
63 | }; | ||
64 | |||
65 | static struct sdma_script_start_addrs imx31_to2_sdma_script __initdata = { | ||
66 | .ap_2_ap_addr = 423, | ||
67 | .ap_2_bp_addr = 829, | ||
68 | .bp_2_ap_addr = 1029, | ||
69 | }; | ||
70 | |||
71 | static struct sdma_platform_data imx31_sdma_pdata __initdata = { | ||
72 | .sdma_version = 1, | ||
73 | .fw_name = "sdma-imx31-to2.bin", | ||
74 | .script_addrs = &imx31_to2_sdma_script, | ||
75 | }; | ||
76 | |||
77 | void __init imx31_soc_init(void) | ||
78 | { | ||
79 | int to_version = mx31_revision() >> 4; | ||
80 | |||
81 | mxc_register_gpio(0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0); | ||
82 | mxc_register_gpio(1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); | ||
83 | mxc_register_gpio(2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); | ||
84 | |||
85 | if (to_version == 1) { | ||
86 | strncpy(imx31_sdma_pdata.fw_name, "sdma-imx31-to1.bin", | ||
87 | strlen(imx31_sdma_pdata.fw_name)); | ||
88 | imx31_sdma_pdata.script_addrs = &imx31_to1_sdma_script; | ||
89 | } | ||
90 | |||
91 | imx_add_imx_sdma(MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); | ||
66 | } | 92 | } |
diff --git a/arch/arm/mach-imx/mm-imx35.c b/arch/arm/mach-imx/mm-imx35.c index c880e6d1ae55..da530ca48aea 100644 --- a/arch/arm/mach-imx/mm-imx35.c +++ b/arch/arm/mach-imx/mm-imx35.c | |||
@@ -25,9 +25,9 @@ | |||
25 | #include <asm/hardware/cache-l2x0.h> | 25 | #include <asm/hardware/cache-l2x0.h> |
26 | 26 | ||
27 | #include <mach/common.h> | 27 | #include <mach/common.h> |
28 | #include <mach/devices-common.h> | ||
28 | #include <mach/hardware.h> | 29 | #include <mach/hardware.h> |
29 | #include <mach/iomux-v3.h> | 30 | #include <mach/iomux-v3.h> |
30 | #include <mach/gpio.h> | ||
31 | #include <mach/irqs.h> | 31 | #include <mach/irqs.h> |
32 | 32 | ||
33 | static struct map_desc mx35_io_desc[] __initdata = { | 33 | static struct map_desc mx35_io_desc[] __initdata = { |
@@ -50,14 +50,60 @@ void __init imx35_init_early(void) | |||
50 | mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); | 50 | mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); |
51 | } | 51 | } |
52 | 52 | ||
53 | static struct mxc_gpio_port imx35_gpio_ports[] = { | ||
54 | DEFINE_IMX_GPIO_PORT_IRQ(MX35, 0, 1, MX35_INT_GPIO1), | ||
55 | DEFINE_IMX_GPIO_PORT_IRQ(MX35, 1, 2, MX35_INT_GPIO2), | ||
56 | DEFINE_IMX_GPIO_PORT_IRQ(MX35, 2, 3, MX35_INT_GPIO3), | ||
57 | }; | ||
58 | |||
59 | void __init mx35_init_irq(void) | 53 | void __init mx35_init_irq(void) |
60 | { | 54 | { |
61 | mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR)); | 55 | mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR)); |
62 | mxc_gpio_init(imx35_gpio_ports, ARRAY_SIZE(imx35_gpio_ports)); | 56 | } |
57 | |||
58 | static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = { | ||
59 | .ap_2_ap_addr = 642, | ||
60 | .uart_2_mcu_addr = 817, | ||
61 | .mcu_2_app_addr = 747, | ||
62 | .uartsh_2_mcu_addr = 1183, | ||
63 | .per_2_shp_addr = 1033, | ||
64 | .mcu_2_shp_addr = 961, | ||
65 | .ata_2_mcu_addr = 1333, | ||
66 | .mcu_2_ata_addr = 1252, | ||
67 | .app_2_mcu_addr = 683, | ||
68 | .shp_2_per_addr = 1111, | ||
69 | .shp_2_mcu_addr = 892, | ||
70 | }; | ||
71 | |||
72 | static struct sdma_script_start_addrs imx35_to2_sdma_script __initdata = { | ||
73 | .ap_2_ap_addr = 729, | ||
74 | .uart_2_mcu_addr = 904, | ||
75 | .per_2_app_addr = 1597, | ||
76 | .mcu_2_app_addr = 834, | ||
77 | .uartsh_2_mcu_addr = 1270, | ||
78 | .per_2_shp_addr = 1120, | ||
79 | .mcu_2_shp_addr = 1048, | ||
80 | .ata_2_mcu_addr = 1429, | ||
81 | .mcu_2_ata_addr = 1339, | ||
82 | .app_2_per_addr = 1531, | ||
83 | .app_2_mcu_addr = 770, | ||
84 | .shp_2_per_addr = 1198, | ||
85 | .shp_2_mcu_addr = 979, | ||
86 | }; | ||
87 | |||
88 | static struct sdma_platform_data imx35_sdma_pdata __initdata = { | ||
89 | .sdma_version = 2, | ||
90 | .fw_name = "sdma-imx35-to2.bin", | ||
91 | .script_addrs = &imx35_to2_sdma_script, | ||
92 | }; | ||
93 | |||
94 | void __init imx35_soc_init(void) | ||
95 | { | ||
96 | int to_version = mx35_revision() >> 4; | ||
97 | |||
98 | mxc_register_gpio(0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); | ||
99 | mxc_register_gpio(1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); | ||
100 | mxc_register_gpio(2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); | ||
101 | |||
102 | if (to_version == 1) { | ||
103 | strncpy(imx35_sdma_pdata.fw_name, "sdma-imx35-to1.bin", | ||
104 | strlen(imx35_sdma_pdata.fw_name)); | ||
105 | imx35_sdma_pdata.script_addrs = &imx35_to1_sdma_script; | ||
106 | } | ||
107 | |||
108 | imx_add_imx_sdma(MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); | ||
63 | } | 109 | } |
diff --git a/arch/arm/mach-imx/mx31lite-db.c b/arch/arm/mach-imx/mx31lite-db.c index 5aa053edc17c..bf0fb87946ba 100644 --- a/arch/arm/mach-imx/mx31lite-db.c +++ b/arch/arm/mach-imx/mx31lite-db.c | |||
@@ -161,7 +161,7 @@ static const struct spi_imx_master spi0_pdata __initconst = { | |||
161 | 161 | ||
162 | /* GPIO LEDs */ | 162 | /* GPIO LEDs */ |
163 | 163 | ||
164 | static struct gpio_led litekit_leds[] = { | 164 | static const struct gpio_led litekit_leds[] __initconst = { |
165 | { | 165 | { |
166 | .name = "GPIO0", | 166 | .name = "GPIO0", |
167 | .gpio = IOMUX_TO_GPIO(MX31_PIN_COMPARE), | 167 | .gpio = IOMUX_TO_GPIO(MX31_PIN_COMPARE), |
@@ -176,19 +176,12 @@ static struct gpio_led litekit_leds[] = { | |||
176 | } | 176 | } |
177 | }; | 177 | }; |
178 | 178 | ||
179 | static struct gpio_led_platform_data litekit_led_platform_data = { | 179 | static const struct gpio_led_platform_data |
180 | litekit_led_platform_data __initconst = { | ||
180 | .leds = litekit_leds, | 181 | .leds = litekit_leds, |
181 | .num_leds = ARRAY_SIZE(litekit_leds), | 182 | .num_leds = ARRAY_SIZE(litekit_leds), |
182 | }; | 183 | }; |
183 | 184 | ||
184 | static struct platform_device litekit_led_device = { | ||
185 | .name = "leds-gpio", | ||
186 | .id = -1, | ||
187 | .dev = { | ||
188 | .platform_data = &litekit_led_platform_data, | ||
189 | }, | ||
190 | }; | ||
191 | |||
192 | void __init mx31lite_db_init(void) | 185 | void __init mx31lite_db_init(void) |
193 | { | 186 | { |
194 | mxc_iomux_setup_multiple_pins(litekit_db_board_pins, | 187 | mxc_iomux_setup_multiple_pins(litekit_db_board_pins, |
@@ -197,7 +190,7 @@ void __init mx31lite_db_init(void) | |||
197 | imx31_add_imx_uart0(&uart_pdata); | 190 | imx31_add_imx_uart0(&uart_pdata); |
198 | imx31_add_mxc_mmc(0, &mmc_pdata); | 191 | imx31_add_mxc_mmc(0, &mmc_pdata); |
199 | imx31_add_spi_imx0(&spi0_pdata); | 192 | imx31_add_spi_imx0(&spi0_pdata); |
200 | platform_device_register(&litekit_led_device); | 193 | gpio_led_register_device(-1, &litekit_led_platform_data); |
201 | imx31_add_imx2_wdt(NULL); | 194 | imx31_add_imx2_wdt(NULL); |
202 | imx31_add_mxc_rtc(NULL); | 195 | imx31_add_mxc_rtc(NULL); |
203 | } | 196 | } |
diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c index da0e6498110a..1e027514096d 100644 --- a/arch/arm/mach-lpc32xx/clock.c +++ b/arch/arm/mach-lpc32xx/clock.c | |||
@@ -1077,7 +1077,7 @@ static struct clk_lookup lookups[] = { | |||
1077 | _REGISTER_CLOCK("lpc32xx-nand.0", "nand_ck", clk_nand) | 1077 | _REGISTER_CLOCK("lpc32xx-nand.0", "nand_ck", clk_nand) |
1078 | _REGISTER_CLOCK("tbd", "i2s0_ck", clk_i2s0) | 1078 | _REGISTER_CLOCK("tbd", "i2s0_ck", clk_i2s0) |
1079 | _REGISTER_CLOCK("tbd", "i2s1_ck", clk_i2s1) | 1079 | _REGISTER_CLOCK("tbd", "i2s1_ck", clk_i2s1) |
1080 | _REGISTER_CLOCK("lpc32xx-ts", NULL, clk_tsc) | 1080 | _REGISTER_CLOCK("ts-lpc32xx", NULL, clk_tsc) |
1081 | _REGISTER_CLOCK("dev:mmc0", "MCLK", clk_mmc) | 1081 | _REGISTER_CLOCK("dev:mmc0", "MCLK", clk_mmc) |
1082 | _REGISTER_CLOCK("lpc-net.0", NULL, clk_net) | 1082 | _REGISTER_CLOCK("lpc-net.0", NULL, clk_net) |
1083 | _REGISTER_CLOCK("dev:clcd", NULL, clk_lcd) | 1083 | _REGISTER_CLOCK("dev:clcd", NULL, clk_lcd) |
diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c index ee24dc28e93e..205b2dbb565b 100644 --- a/arch/arm/mach-lpc32xx/common.c +++ b/arch/arm/mach-lpc32xx/common.c | |||
@@ -95,6 +95,48 @@ struct platform_device lpc32xx_i2c2_device = { | |||
95 | }, | 95 | }, |
96 | }; | 96 | }; |
97 | 97 | ||
98 | /* TSC (Touch Screen Controller) */ | ||
99 | |||
100 | static struct resource lpc32xx_tsc_resources[] = { | ||
101 | { | ||
102 | .start = LPC32XX_ADC_BASE, | ||
103 | .end = LPC32XX_ADC_BASE + SZ_4K - 1, | ||
104 | .flags = IORESOURCE_MEM, | ||
105 | }, { | ||
106 | .start = IRQ_LPC32XX_TS_IRQ, | ||
107 | .end = IRQ_LPC32XX_TS_IRQ, | ||
108 | .flags = IORESOURCE_IRQ, | ||
109 | }, | ||
110 | }; | ||
111 | |||
112 | struct platform_device lpc32xx_tsc_device = { | ||
113 | .name = "ts-lpc32xx", | ||
114 | .id = -1, | ||
115 | .num_resources = ARRAY_SIZE(lpc32xx_tsc_resources), | ||
116 | .resource = lpc32xx_tsc_resources, | ||
117 | }; | ||
118 | |||
119 | /* RTC */ | ||
120 | |||
121 | static struct resource lpc32xx_rtc_resources[] = { | ||
122 | { | ||
123 | .start = LPC32XX_RTC_BASE, | ||
124 | .end = LPC32XX_RTC_BASE + SZ_4K - 1, | ||
125 | .flags = IORESOURCE_MEM, | ||
126 | },{ | ||
127 | .start = IRQ_LPC32XX_RTC, | ||
128 | .end = IRQ_LPC32XX_RTC, | ||
129 | .flags = IORESOURCE_IRQ, | ||
130 | }, | ||
131 | }; | ||
132 | |||
133 | struct platform_device lpc32xx_rtc_device = { | ||
134 | .name = "rtc-lpc32xx", | ||
135 | .id = -1, | ||
136 | .num_resources = ARRAY_SIZE(lpc32xx_rtc_resources), | ||
137 | .resource = lpc32xx_rtc_resources, | ||
138 | }; | ||
139 | |||
98 | /* | 140 | /* |
99 | * Returns the unique ID for the device | 141 | * Returns the unique ID for the device |
100 | */ | 142 | */ |
diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h index f82211fd80c1..5583f52662bd 100644 --- a/arch/arm/mach-lpc32xx/common.h +++ b/arch/arm/mach-lpc32xx/common.h | |||
@@ -28,6 +28,8 @@ extern struct platform_device lpc32xx_watchdog_device; | |||
28 | extern struct platform_device lpc32xx_i2c0_device; | 28 | extern struct platform_device lpc32xx_i2c0_device; |
29 | extern struct platform_device lpc32xx_i2c1_device; | 29 | extern struct platform_device lpc32xx_i2c1_device; |
30 | extern struct platform_device lpc32xx_i2c2_device; | 30 | extern struct platform_device lpc32xx_i2c2_device; |
31 | extern struct platform_device lpc32xx_tsc_device; | ||
32 | extern struct platform_device lpc32xx_rtc_device; | ||
31 | 33 | ||
32 | /* | 34 | /* |
33 | * Other arch specific structures and functions | 35 | * Other arch specific structures and functions |
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig index 67793a690272..56ef5f6c8116 100644 --- a/arch/arm/mach-mmp/Kconfig +++ b/arch/arm/mach-mmp/Kconfig | |||
@@ -77,6 +77,13 @@ config MACH_TETON_BGA | |||
77 | Say 'Y' here if you want to support the Marvell PXA168-based | 77 | Say 'Y' here if you want to support the Marvell PXA168-based |
78 | Teton BGA Development Board. | 78 | Teton BGA Development Board. |
79 | 79 | ||
80 | config MACH_SHEEVAD | ||
81 | bool "Marvell's PXA168 GuruPlug Display (gplugD) Board" | ||
82 | select CPU_PXA168 | ||
83 | help | ||
84 | Say 'Y' here if you want to support the Marvell PXA168-based | ||
85 | GuruPlug Display (gplugD) Board | ||
86 | |||
80 | endmenu | 87 | endmenu |
81 | 88 | ||
82 | config CPU_PXA168 | 89 | config CPU_PXA168 |
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile index 5c68382141af..b0ac942327aa 100644 --- a/arch/arm/mach-mmp/Makefile +++ b/arch/arm/mach-mmp/Makefile | |||
@@ -19,3 +19,4 @@ obj-$(CONFIG_MACH_BROWNSTONE) += brownstone.o | |||
19 | obj-$(CONFIG_MACH_FLINT) += flint.o | 19 | obj-$(CONFIG_MACH_FLINT) += flint.o |
20 | obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o | 20 | obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o |
21 | obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o | 21 | obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o |
22 | obj-$(CONFIG_MACH_SHEEVAD) += gplugd.o | ||
diff --git a/arch/arm/mach-mmp/clock.c b/arch/arm/mach-mmp/clock.c index 886e05648f08..7c6f95f29142 100644 --- a/arch/arm/mach-mmp/clock.c +++ b/arch/arm/mach-mmp/clock.c | |||
@@ -88,3 +88,18 @@ unsigned long clk_get_rate(struct clk *clk) | |||
88 | return rate; | 88 | return rate; |
89 | } | 89 | } |
90 | EXPORT_SYMBOL(clk_get_rate); | 90 | EXPORT_SYMBOL(clk_get_rate); |
91 | |||
92 | int clk_set_rate(struct clk *clk, unsigned long rate) | ||
93 | { | ||
94 | unsigned long flags; | ||
95 | int ret = -EINVAL; | ||
96 | |||
97 | if (clk->ops->setrate) { | ||
98 | spin_lock_irqsave(&clocks_lock, flags); | ||
99 | ret = clk->ops->setrate(clk, rate); | ||
100 | spin_unlock_irqrestore(&clocks_lock, flags); | ||
101 | } | ||
102 | |||
103 | return ret; | ||
104 | } | ||
105 | EXPORT_SYMBOL(clk_set_rate); | ||
diff --git a/arch/arm/mach-mmp/clock.h b/arch/arm/mach-mmp/clock.h index 9b027d7491f5..3143e994e672 100644 --- a/arch/arm/mach-mmp/clock.h +++ b/arch/arm/mach-mmp/clock.h | |||
@@ -12,6 +12,7 @@ struct clkops { | |||
12 | void (*enable)(struct clk *); | 12 | void (*enable)(struct clk *); |
13 | void (*disable)(struct clk *); | 13 | void (*disable)(struct clk *); |
14 | unsigned long (*getrate)(struct clk *); | 14 | unsigned long (*getrate)(struct clk *); |
15 | int (*setrate)(struct clk *, unsigned long); | ||
15 | }; | 16 | }; |
16 | 17 | ||
17 | struct clk { | 18 | struct clk { |
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c new file mode 100644 index 000000000000..c070c24255f4 --- /dev/null +++ b/arch/arm/mach-mmp/gplugd.c | |||
@@ -0,0 +1,189 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-mmp/gplugd.c | ||
3 | * | ||
4 | * Support for the Marvell PXA168-based GuruPlug Display (gplugD) Platform. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * publishhed by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/init.h> | ||
12 | |||
13 | #include <asm/mach/arch.h> | ||
14 | #include <asm/mach-types.h> | ||
15 | |||
16 | #include <mach/gpio.h> | ||
17 | #include <mach/pxa168.h> | ||
18 | #include <mach/mfp-pxa168.h> | ||
19 | #include <mach/mfp-gplugd.h> | ||
20 | |||
21 | #include "common.h" | ||
22 | |||
23 | static unsigned long gplugd_pin_config[] __initdata = { | ||
24 | /* UART3 */ | ||
25 | GPIO8_UART3_SOUT, | ||
26 | GPIO9_UART3_SIN, | ||
27 | GPI1O_UART3_CTS, | ||
28 | GPI11_UART3_RTS, | ||
29 | |||
30 | /* MMC2 */ | ||
31 | GPIO28_MMC2_CMD, | ||
32 | GPIO29_MMC2_CLK, | ||
33 | GPIO30_MMC2_DAT0, | ||
34 | GPIO31_MMC2_DAT1, | ||
35 | GPIO32_MMC2_DAT2, | ||
36 | GPIO33_MMC2_DAT3, | ||
37 | |||
38 | /* LCD & HDMI clock selection GPIO: 0: 74.176MHz, 1: 74.25 MHz */ | ||
39 | GPIO35_GPIO, | ||
40 | GPIO36_GPIO, /* CEC Interrupt */ | ||
41 | |||
42 | /* MMC1 */ | ||
43 | GPIO43_MMC1_CLK, | ||
44 | GPIO49_MMC1_CMD, | ||
45 | GPIO41_MMC1_DAT0, | ||
46 | GPIO40_MMC1_DAT1, | ||
47 | GPIO52_MMC1_DAT2, | ||
48 | GPIO51_MMC1_DAT3, | ||
49 | GPIO53_MMC1_CD, | ||
50 | |||
51 | /* LCD */ | ||
52 | GPIO56_LCD_FCLK_RD, | ||
53 | GPIO57_LCD_LCLK_A0, | ||
54 | GPIO58_LCD_PCLK_WR, | ||
55 | GPIO59_LCD_DENA_BIAS, | ||
56 | GPIO60_LCD_DD0, | ||
57 | GPIO61_LCD_DD1, | ||
58 | GPIO62_LCD_DD2, | ||
59 | GPIO63_LCD_DD3, | ||
60 | GPIO64_LCD_DD4, | ||
61 | GPIO65_LCD_DD5, | ||
62 | GPIO66_LCD_DD6, | ||
63 | GPIO67_LCD_DD7, | ||
64 | GPIO68_LCD_DD8, | ||
65 | GPIO69_LCD_DD9, | ||
66 | GPIO70_LCD_DD10, | ||
67 | GPIO71_LCD_DD11, | ||
68 | GPIO72_LCD_DD12, | ||
69 | GPIO73_LCD_DD13, | ||
70 | GPIO74_LCD_DD14, | ||
71 | GPIO75_LCD_DD15, | ||
72 | GPIO76_LCD_DD16, | ||
73 | GPIO77_LCD_DD17, | ||
74 | GPIO78_LCD_DD18, | ||
75 | GPIO79_LCD_DD19, | ||
76 | GPIO80_LCD_DD20, | ||
77 | GPIO81_LCD_DD21, | ||
78 | GPIO82_LCD_DD22, | ||
79 | GPIO83_LCD_DD23, | ||
80 | |||
81 | /* GPIO */ | ||
82 | GPIO84_GPIO, | ||
83 | GPIO85_GPIO, | ||
84 | |||
85 | /* Fast-Ethernet*/ | ||
86 | GPIO86_TX_CLK, | ||
87 | GPIO87_TX_EN, | ||
88 | GPIO88_TX_DQ3, | ||
89 | GPIO89_TX_DQ2, | ||
90 | GPIO90_TX_DQ1, | ||
91 | GPIO91_TX_DQ0, | ||
92 | GPIO92_MII_CRS, | ||
93 | GPIO93_MII_COL, | ||
94 | GPIO94_RX_CLK, | ||
95 | GPIO95_RX_ER, | ||
96 | GPIO96_RX_DQ3, | ||
97 | GPIO97_RX_DQ2, | ||
98 | GPIO98_RX_DQ1, | ||
99 | GPIO99_RX_DQ0, | ||
100 | GPIO100_MII_MDC, | ||
101 | GPIO101_MII_MDIO, | ||
102 | GPIO103_RX_DV, | ||
103 | GPIO104_GPIO, /* Reset PHY */ | ||
104 | |||
105 | /* RTC interrupt */ | ||
106 | GPIO102_GPIO, | ||
107 | |||
108 | /* I2C */ | ||
109 | GPIO105_CI2C_SDA, | ||
110 | GPIO106_CI2C_SCL, | ||
111 | |||
112 | /* Select JTAG */ | ||
113 | GPIO109_GPIO, | ||
114 | |||
115 | /* I2S */ | ||
116 | GPIO114_I2S_FRM, | ||
117 | GPIO115_I2S_BCLK, | ||
118 | GPIO116_I2S_TXD | ||
119 | }; | ||
120 | |||
121 | static struct i2c_board_info gplugd_i2c_board_info[] = { | ||
122 | { | ||
123 | .type = "isl1208", | ||
124 | .addr = 0x6F, | ||
125 | } | ||
126 | }; | ||
127 | |||
128 | /* Bring PHY out of reset by setting GPIO 104 */ | ||
129 | static int gplugd_eth_init(void) | ||
130 | { | ||
131 | if (unlikely(gpio_request(104, "ETH_RESET_N"))) { | ||
132 | printk(KERN_ERR "Can't get hold of GPIO 104 to bring Ethernet " | ||
133 | "PHY out of reset\n"); | ||
134 | return -EIO; | ||
135 | } | ||
136 | |||
137 | gpio_direction_output(104, 1); | ||
138 | gpio_free(104); | ||
139 | return 0; | ||
140 | } | ||
141 | |||
142 | struct pxa168_eth_platform_data gplugd_eth_platform_data = { | ||
143 | .port_number = 0, | ||
144 | .phy_addr = 0, | ||
145 | .speed = 0, /* Autonagotiation */ | ||
146 | .init = gplugd_eth_init, | ||
147 | }; | ||
148 | |||
149 | static void __init select_disp_freq(void) | ||
150 | { | ||
151 | /* set GPIO 35 & clear GPIO 85 to set LCD External Clock to 74.25 MHz */ | ||
152 | if (unlikely(gpio_request(35, "DISP_FREQ_SEL"))) { | ||
153 | printk(KERN_ERR "Can't get hold of GPIO 35 to select display " | ||
154 | "frequency\n"); | ||
155 | } else { | ||
156 | gpio_direction_output(35, 1); | ||
157 | gpio_free(104); | ||
158 | } | ||
159 | |||
160 | if (unlikely(gpio_request(85, "DISP_FREQ_SEL_2"))) { | ||
161 | printk(KERN_ERR "Can't get hold of GPIO 85 to select display " | ||
162 | "frequency\n"); | ||
163 | } else { | ||
164 | gpio_direction_output(85, 0); | ||
165 | gpio_free(104); | ||
166 | } | ||
167 | } | ||
168 | |||
169 | static void __init gplugd_init(void) | ||
170 | { | ||
171 | mfp_config(ARRAY_AND_SIZE(gplugd_pin_config)); | ||
172 | |||
173 | select_disp_freq(); | ||
174 | |||
175 | /* on-chip devices */ | ||
176 | pxa168_add_uart(3); | ||
177 | pxa168_add_ssp(0); | ||
178 | pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info)); | ||
179 | |||
180 | pxa168_add_eth(&gplugd_eth_platform_data); | ||
181 | } | ||
182 | |||
183 | MACHINE_START(SHEEVAD, "PXA168-based GuruPlug Display (gplugD) Platform") | ||
184 | .map_io = mmp_map_io, | ||
185 | .nr_irqs = IRQ_BOARD_START, | ||
186 | .init_irq = pxa168_init_irq, | ||
187 | .timer = &pxa168_timer, | ||
188 | .init_machine = gplugd_init, | ||
189 | MACHINE_END | ||
diff --git a/arch/arm/mach-mmp/include/mach/mfp-gplugd.h b/arch/arm/mach-mmp/include/mach/mfp-gplugd.h new file mode 100644 index 000000000000..b8cf38d85600 --- /dev/null +++ b/arch/arm/mach-mmp/include/mach/mfp-gplugd.h | |||
@@ -0,0 +1,52 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-mmp/include/mach/mfp-gplugd.h | ||
3 | * | ||
4 | * MFP definitions used in gplugD | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __MACH_MFP_GPLUGD_H | ||
12 | #define __MACH_MFP_GPLUGD_H | ||
13 | |||
14 | #include <plat/mfp.h> | ||
15 | #include <mach/mfp.h> | ||
16 | |||
17 | /* UART3 */ | ||
18 | #define GPIO8_UART3_SOUT MFP_CFG(GPIO8, AF2) | ||
19 | #define GPIO9_UART3_SIN MFP_CFG(GPIO9, AF2) | ||
20 | #define GPI1O_UART3_CTS MFP_CFG(GPIO10, AF2) | ||
21 | #define GPI11_UART3_RTS MFP_CFG(GPIO11, AF2) | ||
22 | |||
23 | /* MMC2 */ | ||
24 | #define GPIO28_MMC2_CMD MFP_CFG_DRV(GPIO28, AF6, FAST) | ||
25 | #define GPIO29_MMC2_CLK MFP_CFG_DRV(GPIO29, AF6, FAST) | ||
26 | #define GPIO30_MMC2_DAT0 MFP_CFG_DRV(GPIO30, AF6, FAST) | ||
27 | #define GPIO31_MMC2_DAT1 MFP_CFG_DRV(GPIO31, AF6, FAST) | ||
28 | #define GPIO32_MMC2_DAT2 MFP_CFG_DRV(GPIO32, AF6, FAST) | ||
29 | #define GPIO33_MMC2_DAT3 MFP_CFG_DRV(GPIO33, AF6, FAST) | ||
30 | |||
31 | /* I2S */ | ||
32 | #undef GPIO114_I2S_FRM | ||
33 | #undef GPIO115_I2S_BCLK | ||
34 | |||
35 | #define GPIO114_I2S_FRM MFP_CFG_DRV(GPIO114, AF1, FAST) | ||
36 | #define GPIO115_I2S_BCLK MFP_CFG_DRV(GPIO115, AF1, FAST) | ||
37 | #define GPIO116_I2S_TXD MFP_CFG_DRV(GPIO116, AF1, FAST) | ||
38 | |||
39 | /* MMC4 */ | ||
40 | #define GPIO125_MMC4_DAT3 MFP_CFG_DRV(GPIO125, AF7, FAST) | ||
41 | #define GPIO126_MMC4_DAT2 MFP_CFG_DRV(GPIO126, AF7, FAST) | ||
42 | #define GPIO127_MMC4_DAT1 MFP_CFG_DRV(GPIO127, AF7, FAST) | ||
43 | #define GPIO0_2_MMC4_DAT0 MFP_CFG_DRV(GPIO0_2, AF7, FAST) | ||
44 | #define GPIO1_2_MMC4_CMD MFP_CFG_DRV(GPIO1_2, AF7, FAST) | ||
45 | #define GPIO2_2_MMC4_CLK MFP_CFG_DRV(GPIO2_2, AF7, FAST) | ||
46 | |||
47 | /* OTG GPIO */ | ||
48 | #define GPIO_USB_OTG_PEN 18 | ||
49 | #define GPIO_USB_OIDIR 20 | ||
50 | |||
51 | /* Other GPIOs are 35, 84, 85 */ | ||
52 | #endif /* __MACH_MFP_GPLUGD_H */ | ||
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h index 713be155a44d..8c782328b21c 100644 --- a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h +++ b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h | |||
@@ -305,4 +305,23 @@ | |||
305 | #define GPIO112_KP_MKOUT6 MFP_CFG(GPIO112, AF7) | 305 | #define GPIO112_KP_MKOUT6 MFP_CFG(GPIO112, AF7) |
306 | #define GPIO121_KP_MKIN4 MFP_CFG(GPIO121, AF7) | 306 | #define GPIO121_KP_MKIN4 MFP_CFG(GPIO121, AF7) |
307 | 307 | ||
308 | /* Fast Ethernet */ | ||
309 | #define GPIO86_TX_CLK MFP_CFG(GPIO86, AF5) | ||
310 | #define GPIO87_TX_EN MFP_CFG(GPIO87, AF5) | ||
311 | #define GPIO88_TX_DQ3 MFP_CFG(GPIO88, AF5) | ||
312 | #define GPIO89_TX_DQ2 MFP_CFG(GPIO89, AF5) | ||
313 | #define GPIO90_TX_DQ1 MFP_CFG(GPIO90, AF5) | ||
314 | #define GPIO91_TX_DQ0 MFP_CFG(GPIO91, AF5) | ||
315 | #define GPIO92_MII_CRS MFP_CFG(GPIO92, AF5) | ||
316 | #define GPIO93_MII_COL MFP_CFG(GPIO93, AF5) | ||
317 | #define GPIO94_RX_CLK MFP_CFG(GPIO94, AF5) | ||
318 | #define GPIO95_RX_ER MFP_CFG(GPIO95, AF5) | ||
319 | #define GPIO96_RX_DQ3 MFP_CFG(GPIO96, AF5) | ||
320 | #define GPIO97_RX_DQ2 MFP_CFG(GPIO97, AF5) | ||
321 | #define GPIO98_RX_DQ1 MFP_CFG(GPIO98, AF5) | ||
322 | #define GPIO99_RX_DQ0 MFP_CFG(GPIO99, AF5) | ||
323 | #define GPIO100_MII_MDC MFP_CFG(GPIO100, AF5) | ||
324 | #define GPIO101_MII_MDIO MFP_CFG(GPIO101, AF5) | ||
325 | #define GPIO103_RX_DV MFP_CFG(GPIO103, AF5) | ||
326 | |||
308 | #endif /* __ASM_MACH_MFP_PXA168_H */ | 327 | #endif /* __ASM_MACH_MFP_PXA168_H */ |
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h index a52b3d2f325c..7f005843a707 100644 --- a/arch/arm/mach-mmp/include/mach/pxa168.h +++ b/arch/arm/mach-mmp/include/mach/pxa168.h | |||
@@ -14,9 +14,11 @@ extern void pxa168_clear_keypad_wakeup(void); | |||
14 | #include <video/pxa168fb.h> | 14 | #include <video/pxa168fb.h> |
15 | #include <plat/pxa27x_keypad.h> | 15 | #include <plat/pxa27x_keypad.h> |
16 | #include <mach/cputype.h> | 16 | #include <mach/cputype.h> |
17 | #include <linux/pxa168_eth.h> | ||
17 | 18 | ||
18 | extern struct pxa_device_desc pxa168_device_uart1; | 19 | extern struct pxa_device_desc pxa168_device_uart1; |
19 | extern struct pxa_device_desc pxa168_device_uart2; | 20 | extern struct pxa_device_desc pxa168_device_uart2; |
21 | extern struct pxa_device_desc pxa168_device_uart3; | ||
20 | extern struct pxa_device_desc pxa168_device_twsi0; | 22 | extern struct pxa_device_desc pxa168_device_twsi0; |
21 | extern struct pxa_device_desc pxa168_device_twsi1; | 23 | extern struct pxa_device_desc pxa168_device_twsi1; |
22 | extern struct pxa_device_desc pxa168_device_pwm1; | 24 | extern struct pxa_device_desc pxa168_device_pwm1; |
@@ -31,6 +33,7 @@ extern struct pxa_device_desc pxa168_device_ssp5; | |||
31 | extern struct pxa_device_desc pxa168_device_nand; | 33 | extern struct pxa_device_desc pxa168_device_nand; |
32 | extern struct pxa_device_desc pxa168_device_fb; | 34 | extern struct pxa_device_desc pxa168_device_fb; |
33 | extern struct pxa_device_desc pxa168_device_keypad; | 35 | extern struct pxa_device_desc pxa168_device_keypad; |
36 | extern struct pxa_device_desc pxa168_device_eth; | ||
34 | 37 | ||
35 | static inline int pxa168_add_uart(int id) | 38 | static inline int pxa168_add_uart(int id) |
36 | { | 39 | { |
@@ -39,6 +42,7 @@ static inline int pxa168_add_uart(int id) | |||
39 | switch (id) { | 42 | switch (id) { |
40 | case 1: d = &pxa168_device_uart1; break; | 43 | case 1: d = &pxa168_device_uart1; break; |
41 | case 2: d = &pxa168_device_uart2; break; | 44 | case 2: d = &pxa168_device_uart2; break; |
45 | case 3: d = &pxa168_device_uart3; break; | ||
42 | } | 46 | } |
43 | 47 | ||
44 | if (d == NULL) | 48 | if (d == NULL) |
@@ -117,4 +121,8 @@ static inline int pxa168_add_keypad(struct pxa27x_keypad_platform_data *data) | |||
117 | return pxa_register_device(&pxa168_device_keypad, data, sizeof(*data)); | 121 | return pxa_register_device(&pxa168_device_keypad, data, sizeof(*data)); |
118 | } | 122 | } |
119 | 123 | ||
124 | static inline int pxa168_add_eth(struct pxa168_eth_platform_data *data) | ||
125 | { | ||
126 | return pxa_register_device(&pxa168_device_eth, data, sizeof(*data)); | ||
127 | } | ||
120 | #endif /* __ASM_MACH_PXA168_H */ | 128 | #endif /* __ASM_MACH_PXA168_H */ |
diff --git a/arch/arm/mach-mmp/include/mach/regs-apmu.h b/arch/arm/mach-mmp/include/mach/regs-apmu.h index f7011ef70bf5..8447ac63e28f 100644 --- a/arch/arm/mach-mmp/include/mach/regs-apmu.h +++ b/arch/arm/mach-mmp/include/mach/regs-apmu.h | |||
@@ -29,6 +29,7 @@ | |||
29 | #define APMU_BUS APMU_REG(0x06c) | 29 | #define APMU_BUS APMU_REG(0x06c) |
30 | #define APMU_SDH2 APMU_REG(0x0e8) | 30 | #define APMU_SDH2 APMU_REG(0x0e8) |
31 | #define APMU_SDH3 APMU_REG(0x0ec) | 31 | #define APMU_SDH3 APMU_REG(0x0ec) |
32 | #define APMU_ETH APMU_REG(0x0fc) | ||
32 | 33 | ||
33 | #define APMU_FNCLK_EN (1 << 4) | 34 | #define APMU_FNCLK_EN (1 << 4) |
34 | #define APMU_AXICLK_EN (1 << 3) | 35 | #define APMU_AXICLK_EN (1 << 3) |
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c index 72b4e7631583..96d451dc305c 100644 --- a/arch/arm/mach-mmp/pxa168.c +++ b/arch/arm/mach-mmp/pxa168.c | |||
@@ -66,6 +66,7 @@ void __init pxa168_init_irq(void) | |||
66 | /* APB peripheral clocks */ | 66 | /* APB peripheral clocks */ |
67 | static APBC_CLK(uart1, PXA168_UART1, 1, 14745600); | 67 | static APBC_CLK(uart1, PXA168_UART1, 1, 14745600); |
68 | static APBC_CLK(uart2, PXA168_UART2, 1, 14745600); | 68 | static APBC_CLK(uart2, PXA168_UART2, 1, 14745600); |
69 | static APBC_CLK(uart3, PXA168_UART3, 1, 14745600); | ||
69 | static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000); | 70 | static APBC_CLK(twsi0, PXA168_TWSI0, 1, 33000000); |
70 | static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000); | 71 | static APBC_CLK(twsi1, PXA168_TWSI1, 1, 33000000); |
71 | static APBC_CLK(pwm1, PXA168_PWM1, 1, 13000000); | 72 | static APBC_CLK(pwm1, PXA168_PWM1, 1, 13000000); |
@@ -81,11 +82,13 @@ static APBC_CLK(keypad, PXA168_KPC, 0, 32000); | |||
81 | 82 | ||
82 | static APMU_CLK(nand, NAND, 0x01db, 208000000); | 83 | static APMU_CLK(nand, NAND, 0x01db, 208000000); |
83 | static APMU_CLK(lcd, LCD, 0x7f, 312000000); | 84 | static APMU_CLK(lcd, LCD, 0x7f, 312000000); |
85 | static APMU_CLK(eth, ETH, 0x09, 0); | ||
84 | 86 | ||
85 | /* device and clock bindings */ | 87 | /* device and clock bindings */ |
86 | static struct clk_lookup pxa168_clkregs[] = { | 88 | static struct clk_lookup pxa168_clkregs[] = { |
87 | INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), | 89 | INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), |
88 | INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL), | 90 | INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL), |
91 | INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL), | ||
89 | INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL), | 92 | INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL), |
90 | INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL), | 93 | INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL), |
91 | INIT_CLKREG(&clk_pwm1, "pxa168-pwm.0", NULL), | 94 | INIT_CLKREG(&clk_pwm1, "pxa168-pwm.0", NULL), |
@@ -100,6 +103,7 @@ static struct clk_lookup pxa168_clkregs[] = { | |||
100 | INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), | 103 | INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), |
101 | INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL), | 104 | INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL), |
102 | INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL), | 105 | INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL), |
106 | INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"), | ||
103 | }; | 107 | }; |
104 | 108 | ||
105 | static int __init pxa168_init(void) | 109 | static int __init pxa168_init(void) |
@@ -149,6 +153,7 @@ void pxa168_clear_keypad_wakeup(void) | |||
149 | /* on-chip devices */ | 153 | /* on-chip devices */ |
150 | PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22); | 154 | PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22); |
151 | PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24); | 155 | PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24); |
156 | PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24); | ||
152 | PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28); | 157 | PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28); |
153 | PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28); | 158 | PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28); |
154 | PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10); | 159 | PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10); |
@@ -163,3 +168,4 @@ PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59); | |||
163 | PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61); | 168 | PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61); |
164 | PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8); | 169 | PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8); |
165 | PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c); | 170 | PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c); |
171 | PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff); | ||
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c index e411039ea59e..6bd37a27e5fc 100644 --- a/arch/arm/mach-mmp/ttc_dkb.c +++ b/arch/arm/mach-mmp/ttc_dkb.c | |||
@@ -15,6 +15,8 @@ | |||
15 | #include <linux/mtd/partitions.h> | 15 | #include <linux/mtd/partitions.h> |
16 | #include <linux/mtd/onenand.h> | 16 | #include <linux/mtd/onenand.h> |
17 | #include <linux/interrupt.h> | 17 | #include <linux/interrupt.h> |
18 | #include <linux/i2c/pca953x.h> | ||
19 | #include <linux/gpio.h> | ||
18 | 20 | ||
19 | #include <asm/mach-types.h> | 21 | #include <asm/mach-types.h> |
20 | #include <asm/mach/arch.h> | 22 | #include <asm/mach/arch.h> |
@@ -25,7 +27,17 @@ | |||
25 | 27 | ||
26 | #include "common.h" | 28 | #include "common.h" |
27 | 29 | ||
28 | #define TTCDKB_NR_IRQS (IRQ_BOARD_START + 24) | 30 | #define TTCDKB_GPIO_EXT0(x) (NR_BUILTIN_GPIO + ((x < 0) ? 0 : \ |
31 | ((x < 16) ? x : 15))) | ||
32 | #define TTCDKB_GPIO_EXT1(x) (NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 : \ | ||
33 | ((x < 16) ? x : 15))) | ||
34 | |||
35 | /* | ||
36 | * 16 board interrupts -- MAX7312 GPIO expander | ||
37 | * 16 board interrupts -- PCA9575 GPIO expander | ||
38 | * 24 board interrupts -- 88PM860x PMIC | ||
39 | */ | ||
40 | #define TTCDKB_NR_IRQS (IRQ_BOARD_START + 16 + 16 + 24) | ||
29 | 41 | ||
30 | static unsigned long ttc_dkb_pin_config[] __initdata = { | 42 | static unsigned long ttc_dkb_pin_config[] __initdata = { |
31 | /* UART2 */ | 43 | /* UART2 */ |
@@ -113,6 +125,22 @@ static struct platform_device *ttc_dkb_devices[] = { | |||
113 | &ttc_dkb_device_onenand, | 125 | &ttc_dkb_device_onenand, |
114 | }; | 126 | }; |
115 | 127 | ||
128 | static struct pca953x_platform_data max7312_data[] = { | ||
129 | { | ||
130 | .gpio_base = TTCDKB_GPIO_EXT0(0), | ||
131 | .irq_base = IRQ_BOARD_START, | ||
132 | }, | ||
133 | }; | ||
134 | |||
135 | static struct i2c_board_info ttc_dkb_i2c_info[] = { | ||
136 | { | ||
137 | .type = "max7312", | ||
138 | .addr = 0x23, | ||
139 | .irq = IRQ_GPIO(80), | ||
140 | .platform_data = &max7312_data, | ||
141 | }, | ||
142 | }; | ||
143 | |||
116 | static void __init ttc_dkb_init(void) | 144 | static void __init ttc_dkb_init(void) |
117 | { | 145 | { |
118 | mfp_config(ARRAY_AND_SIZE(ttc_dkb_pin_config)); | 146 | mfp_config(ARRAY_AND_SIZE(ttc_dkb_pin_config)); |
@@ -121,6 +149,7 @@ static void __init ttc_dkb_init(void) | |||
121 | pxa910_add_uart(1); | 149 | pxa910_add_uart(1); |
122 | 150 | ||
123 | /* off-chip devices */ | 151 | /* off-chip devices */ |
152 | pxa910_add_twsi(0, NULL, ARRAY_AND_SIZE(ttc_dkb_i2c_info)); | ||
124 | platform_add_devices(ARRAY_AND_SIZE(ttc_dkb_devices)); | 153 | platform_add_devices(ARRAY_AND_SIZE(ttc_dkb_devices)); |
125 | } | 154 | } |
126 | 155 | ||
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 799fbc40e53c..b4e7c58bbb38 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig | |||
@@ -109,6 +109,7 @@ config MACH_EUKREA_MBIMX51_BASEBOARD | |||
109 | bool | 109 | bool |
110 | select IMX_HAVE_PLATFORM_IMX_KEYPAD | 110 | select IMX_HAVE_PLATFORM_IMX_KEYPAD |
111 | select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX | 111 | select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX |
112 | select LEDS_GPIO_REGISTER | ||
112 | help | 113 | help |
113 | This adds board specific devices that can be found on Eukrea's | 114 | This adds board specific devices that can be found on Eukrea's |
114 | MBIMX51 evaluation board. | 115 | MBIMX51 evaluation board. |
@@ -135,6 +136,7 @@ config MACH_EUKREA_MBIMXSD51_BASEBOARD | |||
135 | prompt "Eukrea MBIMXSD development board" | 136 | prompt "Eukrea MBIMXSD development board" |
136 | bool | 137 | bool |
137 | select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX | 138 | select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX |
139 | select LEDS_GPIO_REGISTER | ||
138 | help | 140 | help |
139 | This adds board specific devices that can be found on Eukrea's | 141 | This adds board specific devices that can be found on Eukrea's |
140 | MBIMXSD evaluation board. | 142 | MBIMXSD evaluation board. |
@@ -151,6 +153,7 @@ config MX51_EFIKA_COMMON | |||
151 | 153 | ||
152 | config MACH_MX51_EFIKAMX | 154 | config MACH_MX51_EFIKAMX |
153 | bool "Support MX51 Genesi Efika MX nettop" | 155 | bool "Support MX51 Genesi Efika MX nettop" |
156 | select LEDS_GPIO_REGISTER | ||
154 | select MX51_EFIKA_COMMON | 157 | select MX51_EFIKA_COMMON |
155 | help | 158 | help |
156 | Include support for Genesi Efika MX nettop. This includes specific | 159 | Include support for Genesi Efika MX nettop. This includes specific |
@@ -158,6 +161,7 @@ config MACH_MX51_EFIKAMX | |||
158 | 161 | ||
159 | config MACH_MX51_EFIKASB | 162 | config MACH_MX51_EFIKASB |
160 | bool "Support MX51 Genesi Efika Smartbook" | 163 | bool "Support MX51 Genesi Efika Smartbook" |
164 | select LEDS_GPIO_REGISTER | ||
161 | select MX51_EFIKA_COMMON | 165 | select MX51_EFIKA_COMMON |
162 | help | 166 | help |
163 | Include support for Genesi Efika Smartbook. This includes specific | 167 | Include support for Genesi Efika Smartbook. This includes specific |
@@ -176,6 +180,7 @@ config MACH_MX53_EVK | |||
176 | select IMX_HAVE_PLATFORM_IMX_I2C | 180 | select IMX_HAVE_PLATFORM_IMX_I2C |
177 | select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX | 181 | select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX |
178 | select IMX_HAVE_PLATFORM_SPI_IMX | 182 | select IMX_HAVE_PLATFORM_SPI_IMX |
183 | select LEDS_GPIO_REGISTER | ||
179 | help | 184 | help |
180 | Include support for MX53 EVK platform. This includes specific | 185 | Include support for MX53 EVK platform. This includes specific |
181 | configurations for the board and its peripherals. | 186 | configurations for the board and its peripherals. |
@@ -199,10 +204,23 @@ config MACH_MX53_LOCO | |||
199 | select IMX_HAVE_PLATFORM_IMX_UART | 204 | select IMX_HAVE_PLATFORM_IMX_UART |
200 | select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX | 205 | select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX |
201 | select IMX_HAVE_PLATFORM_GPIO_KEYS | 206 | select IMX_HAVE_PLATFORM_GPIO_KEYS |
207 | select LEDS_GPIO_REGISTER | ||
202 | help | 208 | help |
203 | Include support for MX53 LOCO platform. This includes specific | 209 | Include support for MX53 LOCO platform. This includes specific |
204 | configurations for the board and its peripherals. | 210 | configurations for the board and its peripherals. |
205 | 211 | ||
212 | config MACH_MX53_ARD | ||
213 | bool "Support MX53 ARD platforms" | ||
214 | select SOC_IMX53 | ||
215 | select IMX_HAVE_PLATFORM_IMX2_WDT | ||
216 | select IMX_HAVE_PLATFORM_IMX_I2C | ||
217 | select IMX_HAVE_PLATFORM_IMX_UART | ||
218 | select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX | ||
219 | select IMX_HAVE_PLATFORM_GPIO_KEYS | ||
220 | help | ||
221 | Include support for MX53 ARD platform. This includes specific | ||
222 | configurations for the board and its peripherals. | ||
223 | |||
206 | endif # ARCH_MX53_SUPPORTED | 224 | endif # ARCH_MX53_SUPPORTED |
207 | 225 | ||
208 | endif | 226 | endif |
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile index 0b9338cec516..383e7cd3fbcb 100644 --- a/arch/arm/mach-mx5/Makefile +++ b/arch/arm/mach-mx5/Makefile | |||
@@ -6,12 +6,14 @@ | |||
6 | obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o system.o | 6 | obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o system.o |
7 | obj-$(CONFIG_SOC_IMX50) += mm-mx50.o | 7 | obj-$(CONFIG_SOC_IMX50) += mm-mx50.o |
8 | 8 | ||
9 | obj-$(CONFIG_PM) += pm-imx5.o | ||
9 | obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o | 10 | obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o |
10 | obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o | 11 | obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o |
11 | obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o | 12 | obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o |
12 | obj-$(CONFIG_MACH_MX53_EVK) += board-mx53_evk.o | 13 | obj-$(CONFIG_MACH_MX53_EVK) += board-mx53_evk.o |
13 | obj-$(CONFIG_MACH_MX53_SMD) += board-mx53_smd.o | 14 | obj-$(CONFIG_MACH_MX53_SMD) += board-mx53_smd.o |
14 | obj-$(CONFIG_MACH_MX53_LOCO) += board-mx53_loco.o | 15 | obj-$(CONFIG_MACH_MX53_LOCO) += board-mx53_loco.o |
16 | obj-$(CONFIG_MACH_MX53_ARD) += board-mx53_ard.o | ||
15 | obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += board-cpuimx51.o | 17 | obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += board-cpuimx51.o |
16 | obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o | 18 | obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o |
17 | obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += board-cpuimx51sd.o | 19 | obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += board-cpuimx51sd.o |
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c index 4efa02ee1639..7c893fa70266 100644 --- a/arch/arm/mach-mx5/board-cpuimx51.c +++ b/arch/arm/mach-mx5/board-cpuimx51.c | |||
@@ -43,10 +43,6 @@ | |||
43 | #define CPUIMX51_QUARTB_GPIO IMX_GPIO_NR(3, 25) | 43 | #define CPUIMX51_QUARTB_GPIO IMX_GPIO_NR(3, 25) |
44 | #define CPUIMX51_QUARTC_GPIO IMX_GPIO_NR(3, 26) | 44 | #define CPUIMX51_QUARTC_GPIO IMX_GPIO_NR(3, 26) |
45 | #define CPUIMX51_QUARTD_GPIO IMX_GPIO_NR(3, 27) | 45 | #define CPUIMX51_QUARTD_GPIO IMX_GPIO_NR(3, 27) |
46 | #define CPUIMX51_QUARTA_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTA_GPIO) | ||
47 | #define CPUIMX51_QUARTB_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTB_GPIO) | ||
48 | #define CPUIMX51_QUARTC_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTC_GPIO) | ||
49 | #define CPUIMX51_QUARTD_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTD_GPIO) | ||
50 | #define CPUIMX51_QUART_XTAL 14745600 | 46 | #define CPUIMX51_QUART_XTAL 14745600 |
51 | #define CPUIMX51_QUART_REGSHIFT 17 | 47 | #define CPUIMX51_QUART_REGSHIFT 17 |
52 | 48 | ||
@@ -61,7 +57,7 @@ | |||
61 | static struct plat_serial8250_port serial_platform_data[] = { | 57 | static struct plat_serial8250_port serial_platform_data[] = { |
62 | { | 58 | { |
63 | .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x400000), | 59 | .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x400000), |
64 | .irq = CPUIMX51_QUARTA_IRQ, | 60 | .irq = gpio_to_irq(CPUIMX51_QUARTA_GPIO), |
65 | .irqflags = IRQF_TRIGGER_HIGH, | 61 | .irqflags = IRQF_TRIGGER_HIGH, |
66 | .uartclk = CPUIMX51_QUART_XTAL, | 62 | .uartclk = CPUIMX51_QUART_XTAL, |
67 | .regshift = CPUIMX51_QUART_REGSHIFT, | 63 | .regshift = CPUIMX51_QUART_REGSHIFT, |
@@ -69,7 +65,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
69 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, | 65 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, |
70 | }, { | 66 | }, { |
71 | .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x800000), | 67 | .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x800000), |
72 | .irq = CPUIMX51_QUARTB_IRQ, | 68 | .irq = gpio_to_irq(CPUIMX51_QUARTB_GPIO), |
73 | .irqflags = IRQF_TRIGGER_HIGH, | 69 | .irqflags = IRQF_TRIGGER_HIGH, |
74 | .uartclk = CPUIMX51_QUART_XTAL, | 70 | .uartclk = CPUIMX51_QUART_XTAL, |
75 | .regshift = CPUIMX51_QUART_REGSHIFT, | 71 | .regshift = CPUIMX51_QUART_REGSHIFT, |
@@ -77,7 +73,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
77 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, | 73 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, |
78 | }, { | 74 | }, { |
79 | .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x1000000), | 75 | .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x1000000), |
80 | .irq = CPUIMX51_QUARTC_IRQ, | 76 | .irq = gpio_to_irq(CPUIMX51_QUARTC_GPIO), |
81 | .irqflags = IRQF_TRIGGER_HIGH, | 77 | .irqflags = IRQF_TRIGGER_HIGH, |
82 | .uartclk = CPUIMX51_QUART_XTAL, | 78 | .uartclk = CPUIMX51_QUART_XTAL, |
83 | .regshift = CPUIMX51_QUART_REGSHIFT, | 79 | .regshift = CPUIMX51_QUART_REGSHIFT, |
@@ -85,7 +81,7 @@ static struct plat_serial8250_port serial_platform_data[] = { | |||
85 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, | 81 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, |
86 | }, { | 82 | }, { |
87 | .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000), | 83 | .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000), |
88 | .irq = CPUIMX51_QUARTD_IRQ, | 84 | .irq = irq_to_gpio(CPUIMX51_QUARTD_GPIO), |
89 | .irqflags = IRQF_TRIGGER_HIGH, | 85 | .irqflags = IRQF_TRIGGER_HIGH, |
90 | .uartclk = CPUIMX51_QUART_XTAL, | 86 | .uartclk = CPUIMX51_QUART_XTAL, |
91 | .regshift = CPUIMX51_QUART_REGSHIFT, | 87 | .regshift = CPUIMX51_QUART_REGSHIFT, |
@@ -245,6 +241,8 @@ __setup("otg_mode=", eukrea_cpuimx51_otg_mode); | |||
245 | */ | 241 | */ |
246 | static void __init eukrea_cpuimx51_init(void) | 242 | static void __init eukrea_cpuimx51_init(void) |
247 | { | 243 | { |
244 | imx51_soc_init(); | ||
245 | |||
248 | mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx51_pads, | 246 | mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx51_pads, |
249 | ARRAY_SIZE(eukrea_cpuimx51_pads)); | 247 | ARRAY_SIZE(eukrea_cpuimx51_pads)); |
250 | 248 | ||
diff --git a/arch/arm/mach-mx5/board-cpuimx51sd.c b/arch/arm/mach-mx5/board-cpuimx51sd.c index 5ef25a596143..ff096d587299 100644 --- a/arch/arm/mach-mx5/board-cpuimx51sd.c +++ b/arch/arm/mach-mx5/board-cpuimx51sd.c | |||
@@ -264,6 +264,8 @@ static struct platform_device *platform_devices[] __initdata = { | |||
264 | 264 | ||
265 | static void __init eukrea_cpuimx51sd_init(void) | 265 | static void __init eukrea_cpuimx51sd_init(void) |
266 | { | 266 | { |
267 | imx51_soc_init(); | ||
268 | |||
267 | mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx51sd_pads, | 269 | mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx51sd_pads, |
268 | ARRAY_SIZE(eukrea_cpuimx51sd_pads)); | 270 | ARRAY_SIZE(eukrea_cpuimx51sd_pads)); |
269 | 271 | ||
diff --git a/arch/arm/mach-mx5/board-mx50_rdp.c b/arch/arm/mach-mx5/board-mx50_rdp.c index 11210e1ae42a..7de25c6712eb 100644 --- a/arch/arm/mach-mx5/board-mx50_rdp.c +++ b/arch/arm/mach-mx5/board-mx50_rdp.c | |||
@@ -192,6 +192,8 @@ static const struct imxi2c_platform_data i2c_data __initconst = { | |||
192 | */ | 192 | */ |
193 | static void __init mx50_rdp_board_init(void) | 193 | static void __init mx50_rdp_board_init(void) |
194 | { | 194 | { |
195 | imx50_soc_init(); | ||
196 | |||
195 | mxc_iomux_v3_setup_multiple_pads(mx50_rdp_pads, | 197 | mxc_iomux_v3_setup_multiple_pads(mx50_rdp_pads, |
196 | ARRAY_SIZE(mx50_rdp_pads)); | 198 | ARRAY_SIZE(mx50_rdp_pads)); |
197 | 199 | ||
diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c index 63dfbeafbc1e..07a38154da21 100644 --- a/arch/arm/mach-mx5/board-mx51_3ds.c +++ b/arch/arm/mach-mx5/board-mx51_3ds.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/irq.h> | 13 | #include <linux/irq.h> |
14 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
15 | #include <linux/spi/spi.h> | 15 | #include <linux/spi/spi.h> |
16 | #include <linux/gpio.h> | ||
16 | 17 | ||
17 | #include <asm/mach-types.h> | 18 | #include <asm/mach-types.h> |
18 | #include <asm/mach/arch.h> | 19 | #include <asm/mach/arch.h> |
@@ -26,7 +27,7 @@ | |||
26 | #include "devices-imx51.h" | 27 | #include "devices-imx51.h" |
27 | #include "devices.h" | 28 | #include "devices.h" |
28 | 29 | ||
29 | #define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTA + 6) | 30 | #define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(1, 6)) |
30 | #define MX51_3DS_ECSPI2_CS (GPIO_PORTC + 28) | 31 | #define MX51_3DS_ECSPI2_CS (GPIO_PORTC + 28) |
31 | 32 | ||
32 | static iomux_v3_cfg_t mx51_3ds_pads[] = { | 33 | static iomux_v3_cfg_t mx51_3ds_pads[] = { |
@@ -135,6 +136,8 @@ static struct spi_board_info mx51_3ds_spi_nor_device[] = { | |||
135 | */ | 136 | */ |
136 | static void __init mx51_3ds_init(void) | 137 | static void __init mx51_3ds_init(void) |
137 | { | 138 | { |
139 | imx51_soc_init(); | ||
140 | |||
138 | mxc_iomux_v3_setup_multiple_pads(mx51_3ds_pads, | 141 | mxc_iomux_v3_setup_multiple_pads(mx51_3ds_pads, |
139 | ARRAY_SIZE(mx51_3ds_pads)); | 142 | ARRAY_SIZE(mx51_3ds_pads)); |
140 | 143 | ||
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index c7b3fabf50f9..15c600026aee 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c | |||
@@ -36,11 +36,15 @@ | |||
36 | 36 | ||
37 | #define BABBAGE_USB_HUB_RESET IMX_GPIO_NR(1, 7) | 37 | #define BABBAGE_USB_HUB_RESET IMX_GPIO_NR(1, 7) |
38 | #define BABBAGE_USBH1_STP IMX_GPIO_NR(1, 27) | 38 | #define BABBAGE_USBH1_STP IMX_GPIO_NR(1, 27) |
39 | #define BABBAGE_PHY_RESET IMX_GPIO_NR(2, 5) | 39 | #define BABBAGE_USB_PHY_RESET IMX_GPIO_NR(2, 5) |
40 | #define BABBAGE_FEC_PHY_RESET IMX_GPIO_NR(2, 14) | 40 | #define BABBAGE_FEC_PHY_RESET IMX_GPIO_NR(2, 14) |
41 | #define BABBAGE_POWER_KEY IMX_GPIO_NR(2, 21) | 41 | #define BABBAGE_POWER_KEY IMX_GPIO_NR(2, 21) |
42 | #define BABBAGE_ECSPI1_CS0 IMX_GPIO_NR(4, 24) | 42 | #define BABBAGE_ECSPI1_CS0 IMX_GPIO_NR(4, 24) |
43 | #define BABBAGE_ECSPI1_CS1 IMX_GPIO_NR(4, 25) | 43 | #define BABBAGE_ECSPI1_CS1 IMX_GPIO_NR(4, 25) |
44 | #define BABBAGE_SD1_CD IMX_GPIO_NR(1, 0) | ||
45 | #define BABBAGE_SD1_WP IMX_GPIO_NR(1, 1) | ||
46 | #define BABBAGE_SD2_CD IMX_GPIO_NR(1, 6) | ||
47 | #define BABBAGE_SD2_WP IMX_GPIO_NR(1, 5) | ||
44 | 48 | ||
45 | /* USB_CTRL_1 */ | 49 | /* USB_CTRL_1 */ |
46 | #define MX51_USB_CTRL_1_OFFSET 0x10 | 50 | #define MX51_USB_CTRL_1_OFFSET 0x10 |
@@ -110,6 +114,9 @@ static iomux_v3_cfg_t mx51babbage_pads[] = { | |||
110 | /* USB HUB reset line*/ | 114 | /* USB HUB reset line*/ |
111 | MX51_PAD_GPIO1_7__GPIO1_7, | 115 | MX51_PAD_GPIO1_7__GPIO1_7, |
112 | 116 | ||
117 | /* USB PHY reset line */ | ||
118 | MX51_PAD_EIM_D21__GPIO2_5, | ||
119 | |||
113 | /* FEC */ | 120 | /* FEC */ |
114 | MX51_PAD_EIM_EB2__FEC_MDIO, | 121 | MX51_PAD_EIM_EB2__FEC_MDIO, |
115 | MX51_PAD_EIM_EB3__FEC_RDATA1, | 122 | MX51_PAD_EIM_EB3__FEC_RDATA1, |
@@ -139,6 +146,8 @@ static iomux_v3_cfg_t mx51babbage_pads[] = { | |||
139 | MX51_PAD_SD1_DATA1__SD1_DATA1, | 146 | MX51_PAD_SD1_DATA1__SD1_DATA1, |
140 | MX51_PAD_SD1_DATA2__SD1_DATA2, | 147 | MX51_PAD_SD1_DATA2__SD1_DATA2, |
141 | MX51_PAD_SD1_DATA3__SD1_DATA3, | 148 | MX51_PAD_SD1_DATA3__SD1_DATA3, |
149 | MX51_PAD_GPIO1_0__GPIO1_0, | ||
150 | MX51_PAD_GPIO1_1__GPIO1_1, | ||
142 | 151 | ||
143 | /* SD 2 */ | 152 | /* SD 2 */ |
144 | MX51_PAD_SD2_CMD__SD2_CMD, | 153 | MX51_PAD_SD2_CMD__SD2_CMD, |
@@ -147,6 +156,8 @@ static iomux_v3_cfg_t mx51babbage_pads[] = { | |||
147 | MX51_PAD_SD2_DATA1__SD2_DATA1, | 156 | MX51_PAD_SD2_DATA1__SD2_DATA1, |
148 | MX51_PAD_SD2_DATA2__SD2_DATA2, | 157 | MX51_PAD_SD2_DATA2__SD2_DATA2, |
149 | MX51_PAD_SD2_DATA3__SD2_DATA3, | 158 | MX51_PAD_SD2_DATA3__SD2_DATA3, |
159 | MX51_PAD_GPIO1_6__GPIO1_6, | ||
160 | MX51_PAD_GPIO1_5__GPIO1_5, | ||
150 | 161 | ||
151 | /* eCSPI1 */ | 162 | /* eCSPI1 */ |
152 | MX51_PAD_CSPI1_MISO__ECSPI1_MISO, | 163 | MX51_PAD_CSPI1_MISO__ECSPI1_MISO, |
@@ -169,34 +180,31 @@ static struct imxi2c_platform_data babbage_hsi2c_data = { | |||
169 | .bitrate = 400000, | 180 | .bitrate = 400000, |
170 | }; | 181 | }; |
171 | 182 | ||
183 | static struct gpio mx51_babbage_usbh1_gpios[] = { | ||
184 | { BABBAGE_USBH1_STP, GPIOF_OUT_INIT_LOW, "usbh1_stp" }, | ||
185 | { BABBAGE_USB_PHY_RESET, GPIOF_OUT_INIT_LOW, "usbh1_phy_reset" }, | ||
186 | }; | ||
187 | |||
172 | static int gpio_usbh1_active(void) | 188 | static int gpio_usbh1_active(void) |
173 | { | 189 | { |
174 | iomux_v3_cfg_t usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO1_27; | 190 | iomux_v3_cfg_t usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO1_27; |
175 | iomux_v3_cfg_t phyreset_gpio = MX51_PAD_EIM_D21__GPIO2_5; | ||
176 | int ret; | 191 | int ret; |
177 | 192 | ||
178 | /* Set USBH1_STP to GPIO and toggle it */ | 193 | /* Set USBH1_STP to GPIO and toggle it */ |
179 | mxc_iomux_v3_setup_pad(usbh1stp_gpio); | 194 | mxc_iomux_v3_setup_pad(usbh1stp_gpio); |
180 | ret = gpio_request(BABBAGE_USBH1_STP, "usbh1_stp"); | 195 | ret = gpio_request_array(mx51_babbage_usbh1_gpios, |
196 | ARRAY_SIZE(mx51_babbage_usbh1_gpios)); | ||
181 | 197 | ||
182 | if (ret) { | 198 | if (ret) { |
183 | pr_debug("failed to get MX51_PAD_USBH1_STP__GPIO_1_27: %d\n", ret); | 199 | pr_debug("failed to get USBH1 pins: %d\n", ret); |
184 | return ret; | 200 | return ret; |
185 | } | 201 | } |
186 | gpio_direction_output(BABBAGE_USBH1_STP, 0); | ||
187 | gpio_set_value(BABBAGE_USBH1_STP, 1); | ||
188 | msleep(100); | ||
189 | gpio_free(BABBAGE_USBH1_STP); | ||
190 | |||
191 | /* De-assert USB PHY RESETB */ | ||
192 | mxc_iomux_v3_setup_pad(phyreset_gpio); | ||
193 | ret = gpio_request(BABBAGE_PHY_RESET, "phy_reset"); | ||
194 | 202 | ||
195 | if (ret) { | 203 | msleep(100); |
196 | pr_debug("failed to get MX51_PAD_EIM_D21__GPIO_2_5: %d\n", ret); | 204 | gpio_set_value(BABBAGE_USBH1_STP, 1); |
197 | return ret; | 205 | gpio_set_value(BABBAGE_USB_PHY_RESET, 1); |
198 | } | 206 | gpio_free_array(mx51_babbage_usbh1_gpios, |
199 | gpio_direction_output(BABBAGE_PHY_RESET, 1); | 207 | ARRAY_SIZE(mx51_babbage_usbh1_gpios)); |
200 | return 0; | 208 | return 0; |
201 | } | 209 | } |
202 | 210 | ||
@@ -331,6 +339,16 @@ static const struct spi_imx_master mx51_babbage_spi_pdata __initconst = { | |||
331 | .num_chipselect = ARRAY_SIZE(mx51_babbage_spi_cs), | 339 | .num_chipselect = ARRAY_SIZE(mx51_babbage_spi_cs), |
332 | }; | 340 | }; |
333 | 341 | ||
342 | static const struct esdhc_platform_data mx51_babbage_sd1_data __initconst = { | ||
343 | .cd_gpio = BABBAGE_SD1_CD, | ||
344 | .wp_gpio = BABBAGE_SD1_WP, | ||
345 | }; | ||
346 | |||
347 | static const struct esdhc_platform_data mx51_babbage_sd2_data __initconst = { | ||
348 | .cd_gpio = BABBAGE_SD2_CD, | ||
349 | .wp_gpio = BABBAGE_SD2_WP, | ||
350 | }; | ||
351 | |||
334 | /* | 352 | /* |
335 | * Board specific initialization. | 353 | * Board specific initialization. |
336 | */ | 354 | */ |
@@ -340,6 +358,8 @@ static void __init mx51_babbage_init(void) | |||
340 | iomux_v3_cfg_t power_key = _MX51_PAD_EIM_A27__GPIO2_21 | | 358 | iomux_v3_cfg_t power_key = _MX51_PAD_EIM_A27__GPIO2_21 | |
341 | MUX_PAD_CTRL(PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP); | 359 | MUX_PAD_CTRL(PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP); |
342 | 360 | ||
361 | imx51_soc_init(); | ||
362 | |||
343 | #if defined(CONFIG_CPU_FREQ_IMX) | 363 | #if defined(CONFIG_CPU_FREQ_IMX) |
344 | get_cpu_op = mx51_get_cpu_op; | 364 | get_cpu_op = mx51_get_cpu_op; |
345 | #endif | 365 | #endif |
@@ -374,8 +394,8 @@ static void __init mx51_babbage_init(void) | |||
374 | mxc_iomux_v3_setup_pad(usbh1stp); | 394 | mxc_iomux_v3_setup_pad(usbh1stp); |
375 | babbage_usbhub_reset(); | 395 | babbage_usbhub_reset(); |
376 | 396 | ||
377 | imx51_add_sdhci_esdhc_imx(0, NULL); | 397 | imx51_add_sdhci_esdhc_imx(0, &mx51_babbage_sd1_data); |
378 | imx51_add_sdhci_esdhc_imx(1, NULL); | 398 | imx51_add_sdhci_esdhc_imx(1, &mx51_babbage_sd2_data); |
379 | 399 | ||
380 | spi_register_board_info(mx51_babbage_spi_board_info, | 400 | spi_register_board_info(mx51_babbage_spi_board_info, |
381 | ARRAY_SIZE(mx51_babbage_spi_board_info)); | 401 | ARRAY_SIZE(mx51_babbage_spi_board_info)); |
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c index 6e362315291b..f70700dc0ec1 100644 --- a/arch/arm/mach-mx5/board-mx51_efikamx.c +++ b/arch/arm/mach-mx5/board-mx51_efikamx.c | |||
@@ -139,7 +139,7 @@ static void __init mx51_efikamx_board_id(void) | |||
139 | } | 139 | } |
140 | } | 140 | } |
141 | 141 | ||
142 | static struct gpio_led mx51_efikamx_leds[] = { | 142 | static struct gpio_led mx51_efikamx_leds[] __initdata = { |
143 | { | 143 | { |
144 | .name = "efikamx:green", | 144 | .name = "efikamx:green", |
145 | .default_trigger = "default-on", | 145 | .default_trigger = "default-on", |
@@ -157,19 +157,12 @@ static struct gpio_led mx51_efikamx_leds[] = { | |||
157 | }, | 157 | }, |
158 | }; | 158 | }; |
159 | 159 | ||
160 | static struct gpio_led_platform_data mx51_efikamx_leds_data = { | 160 | static const struct gpio_led_platform_data |
161 | mx51_efikamx_leds_data __initconst = { | ||
161 | .leds = mx51_efikamx_leds, | 162 | .leds = mx51_efikamx_leds, |
162 | .num_leds = ARRAY_SIZE(mx51_efikamx_leds), | 163 | .num_leds = ARRAY_SIZE(mx51_efikamx_leds), |
163 | }; | 164 | }; |
164 | 165 | ||
165 | static struct platform_device mx51_efikamx_leds_device = { | ||
166 | .name = "leds-gpio", | ||
167 | .id = -1, | ||
168 | .dev = { | ||
169 | .platform_data = &mx51_efikamx_leds_data, | ||
170 | }, | ||
171 | }; | ||
172 | |||
173 | static struct gpio_keys_button mx51_efikamx_powerkey[] = { | 166 | static struct gpio_keys_button mx51_efikamx_powerkey[] = { |
174 | { | 167 | { |
175 | .code = KEY_POWER, | 168 | .code = KEY_POWER, |
@@ -236,6 +229,8 @@ late_initcall(mx51_efikamx_power_init); | |||
236 | 229 | ||
237 | static void __init mx51_efikamx_init(void) | 230 | static void __init mx51_efikamx_init(void) |
238 | { | 231 | { |
232 | imx51_soc_init(); | ||
233 | |||
239 | mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads, | 234 | mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads, |
240 | ARRAY_SIZE(mx51efikamx_pads)); | 235 | ARRAY_SIZE(mx51efikamx_pads)); |
241 | efika_board_common_init(); | 236 | efika_board_common_init(); |
@@ -248,7 +243,7 @@ static void __init mx51_efikamx_init(void) | |||
248 | mx51_efikamx_leds[2].default_trigger = "mmc1"; | 243 | mx51_efikamx_leds[2].default_trigger = "mmc1"; |
249 | } | 244 | } |
250 | 245 | ||
251 | platform_device_register(&mx51_efikamx_leds_device); | 246 | gpio_led_register_device(-1, &mx51_efikamx_leds_data); |
252 | imx_add_gpio_keys(&mx51_efikamx_powerkey_data); | 247 | imx_add_gpio_keys(&mx51_efikamx_powerkey_data); |
253 | 248 | ||
254 | if (system_rev == 0x11) { | 249 | if (system_rev == 0x11) { |
diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-mx5/board-mx51_efikasb.c index 474fc6e4c6df..2e4d9d32a87c 100644 --- a/arch/arm/mach-mx5/board-mx51_efikasb.c +++ b/arch/arm/mach-mx5/board-mx51_efikasb.c | |||
@@ -132,7 +132,7 @@ static void __init mx51_efikasb_usb(void) | |||
132 | mxc_register_device(&mxc_usbh2_device, &usbh2_config); | 132 | mxc_register_device(&mxc_usbh2_device, &usbh2_config); |
133 | } | 133 | } |
134 | 134 | ||
135 | static struct gpio_led mx51_efikasb_leds[] = { | 135 | static const struct gpio_led mx51_efikasb_leds[] __initconst = { |
136 | { | 136 | { |
137 | .name = "efikasb:green", | 137 | .name = "efikasb:green", |
138 | .default_trigger = "default-on", | 138 | .default_trigger = "default-on", |
@@ -146,19 +146,12 @@ static struct gpio_led mx51_efikasb_leds[] = { | |||
146 | }, | 146 | }, |
147 | }; | 147 | }; |
148 | 148 | ||
149 | static struct gpio_led_platform_data mx51_efikasb_leds_data = { | 149 | static const struct gpio_led_platform_data |
150 | mx51_efikasb_leds_data __initconst = { | ||
150 | .leds = mx51_efikasb_leds, | 151 | .leds = mx51_efikasb_leds, |
151 | .num_leds = ARRAY_SIZE(mx51_efikasb_leds), | 152 | .num_leds = ARRAY_SIZE(mx51_efikasb_leds), |
152 | }; | 153 | }; |
153 | 154 | ||
154 | static struct platform_device mx51_efikasb_leds_device = { | ||
155 | .name = "leds-gpio", | ||
156 | .id = -1, | ||
157 | .dev = { | ||
158 | .platform_data = &mx51_efikasb_leds_data, | ||
159 | }, | ||
160 | }; | ||
161 | |||
162 | static struct gpio_keys_button mx51_efikasb_keys[] = { | 155 | static struct gpio_keys_button mx51_efikasb_keys[] = { |
163 | { | 156 | { |
164 | .code = KEY_POWER, | 157 | .code = KEY_POWER, |
@@ -248,6 +241,8 @@ static void __init mx51_efikasb_board_id(void) | |||
248 | 241 | ||
249 | static void __init efikasb_board_init(void) | 242 | static void __init efikasb_board_init(void) |
250 | { | 243 | { |
244 | imx51_soc_init(); | ||
245 | |||
251 | mxc_iomux_v3_setup_multiple_pads(mx51efikasb_pads, | 246 | mxc_iomux_v3_setup_multiple_pads(mx51efikasb_pads, |
252 | ARRAY_SIZE(mx51efikasb_pads)); | 247 | ARRAY_SIZE(mx51efikasb_pads)); |
253 | efika_board_common_init(); | 248 | efika_board_common_init(); |
@@ -256,9 +251,8 @@ static void __init efikasb_board_init(void) | |||
256 | mx51_efikasb_usb(); | 251 | mx51_efikasb_usb(); |
257 | imx51_add_sdhci_esdhc_imx(1, NULL); | 252 | imx51_add_sdhci_esdhc_imx(1, NULL); |
258 | 253 | ||
259 | platform_device_register(&mx51_efikasb_leds_device); | 254 | gpio_led_register_device(-1, &mx51_efikasb_leds_data); |
260 | imx_add_gpio_keys(&mx51_efikasb_keys_data); | 255 | imx_add_gpio_keys(&mx51_efikasb_keys_data); |
261 | |||
262 | } | 256 | } |
263 | 257 | ||
264 | static void __init mx51_efikasb_timer_init(void) | 258 | static void __init mx51_efikasb_timer_init(void) |
diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c new file mode 100644 index 000000000000..76a67c4a2a0b --- /dev/null +++ b/arch/arm/mach-mx5/board-mx53_ard.c | |||
@@ -0,0 +1,254 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | */ | ||
4 | |||
5 | /* | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | |||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | |||
16 | * You should have received a copy of the GNU General Public License along | ||
17 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | ||
19 | */ | ||
20 | |||
21 | #include <linux/init.h> | ||
22 | #include <linux/clk.h> | ||
23 | #include <linux/delay.h> | ||
24 | #include <linux/gpio.h> | ||
25 | #include <linux/smsc911x.h> | ||
26 | |||
27 | #include <mach/common.h> | ||
28 | #include <mach/hardware.h> | ||
29 | #include <mach/iomux-mx53.h> | ||
30 | |||
31 | #include <asm/mach-types.h> | ||
32 | #include <asm/mach/arch.h> | ||
33 | #include <asm/mach/time.h> | ||
34 | |||
35 | #include "crm_regs.h" | ||
36 | #include "devices-imx53.h" | ||
37 | |||
38 | #define ARD_ETHERNET_INT_B IMX_GPIO_NR(2, 31) | ||
39 | #define ARD_SD1_CD IMX_GPIO_NR(1, 1) | ||
40 | #define ARD_SD1_WP IMX_GPIO_NR(1, 9) | ||
41 | #define ARD_I2CPORTEXP_B IMX_GPIO_NR(2, 3) | ||
42 | #define ARD_VOLUMEDOWN IMX_GPIO_NR(4, 0) | ||
43 | #define ARD_HOME IMX_GPIO_NR(5, 10) | ||
44 | #define ARD_BACK IMX_GPIO_NR(5, 11) | ||
45 | #define ARD_PROG IMX_GPIO_NR(5, 12) | ||
46 | #define ARD_VOLUMEUP IMX_GPIO_NR(5, 13) | ||
47 | |||
48 | static iomux_v3_cfg_t mx53_ard_pads[] = { | ||
49 | /* UART1 */ | ||
50 | MX53_PAD_PATA_DIOW__UART1_TXD_MUX, | ||
51 | MX53_PAD_PATA_DMACK__UART1_RXD_MUX, | ||
52 | /* WEIM for CS1 */ | ||
53 | MX53_PAD_EIM_EB3__GPIO2_31, /* ETHERNET_INT_B */ | ||
54 | MX53_PAD_EIM_D16__EMI_WEIM_D_16, | ||
55 | MX53_PAD_EIM_D17__EMI_WEIM_D_17, | ||
56 | MX53_PAD_EIM_D18__EMI_WEIM_D_18, | ||
57 | MX53_PAD_EIM_D19__EMI_WEIM_D_19, | ||
58 | MX53_PAD_EIM_D20__EMI_WEIM_D_20, | ||
59 | MX53_PAD_EIM_D21__EMI_WEIM_D_21, | ||
60 | MX53_PAD_EIM_D22__EMI_WEIM_D_22, | ||
61 | MX53_PAD_EIM_D23__EMI_WEIM_D_23, | ||
62 | MX53_PAD_EIM_D24__EMI_WEIM_D_24, | ||
63 | MX53_PAD_EIM_D25__EMI_WEIM_D_25, | ||
64 | MX53_PAD_EIM_D26__EMI_WEIM_D_26, | ||
65 | MX53_PAD_EIM_D27__EMI_WEIM_D_27, | ||
66 | MX53_PAD_EIM_D28__EMI_WEIM_D_28, | ||
67 | MX53_PAD_EIM_D29__EMI_WEIM_D_29, | ||
68 | MX53_PAD_EIM_D30__EMI_WEIM_D_30, | ||
69 | MX53_PAD_EIM_D31__EMI_WEIM_D_31, | ||
70 | MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0, | ||
71 | MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1, | ||
72 | MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2, | ||
73 | MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3, | ||
74 | MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4, | ||
75 | MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5, | ||
76 | MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6, | ||
77 | MX53_PAD_EIM_OE__EMI_WEIM_OE, | ||
78 | MX53_PAD_EIM_RW__EMI_WEIM_RW, | ||
79 | MX53_PAD_EIM_CS1__EMI_WEIM_CS_1, | ||
80 | /* SDHC1 */ | ||
81 | MX53_PAD_SD1_CMD__ESDHC1_CMD, | ||
82 | MX53_PAD_SD1_CLK__ESDHC1_CLK, | ||
83 | MX53_PAD_SD1_DATA0__ESDHC1_DAT0, | ||
84 | MX53_PAD_SD1_DATA1__ESDHC1_DAT1, | ||
85 | MX53_PAD_SD1_DATA2__ESDHC1_DAT2, | ||
86 | MX53_PAD_SD1_DATA3__ESDHC1_DAT3, | ||
87 | MX53_PAD_PATA_DATA8__ESDHC1_DAT4, | ||
88 | MX53_PAD_PATA_DATA9__ESDHC1_DAT5, | ||
89 | MX53_PAD_PATA_DATA10__ESDHC1_DAT6, | ||
90 | MX53_PAD_PATA_DATA11__ESDHC1_DAT7, | ||
91 | MX53_PAD_GPIO_1__GPIO1_1, | ||
92 | MX53_PAD_GPIO_9__GPIO1_9, | ||
93 | /* I2C2 */ | ||
94 | MX53_PAD_EIM_EB2__I2C2_SCL, | ||
95 | MX53_PAD_KEY_ROW3__I2C2_SDA, | ||
96 | /* I2C3 */ | ||
97 | MX53_PAD_GPIO_3__I2C3_SCL, | ||
98 | MX53_PAD_GPIO_16__I2C3_SDA, | ||
99 | /* GPIO */ | ||
100 | MX53_PAD_DISP0_DAT16__GPIO5_10, /* home */ | ||
101 | MX53_PAD_DISP0_DAT17__GPIO5_11, /* back */ | ||
102 | MX53_PAD_DISP0_DAT18__GPIO5_12, /* prog */ | ||
103 | MX53_PAD_DISP0_DAT19__GPIO5_13, /* vol up */ | ||
104 | MX53_PAD_GPIO_10__GPIO4_0, /* vol down */ | ||
105 | }; | ||
106 | |||
107 | #define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake) \ | ||
108 | { \ | ||
109 | .gpio = gpio_num, \ | ||
110 | .type = EV_KEY, \ | ||
111 | .code = ev_code, \ | ||
112 | .active_low = act_low, \ | ||
113 | .desc = "btn " descr, \ | ||
114 | .wakeup = wake, \ | ||
115 | } | ||
116 | |||
117 | static struct gpio_keys_button ard_buttons[] = { | ||
118 | GPIO_BUTTON(ARD_HOME, KEY_HOME, 1, "home", 0), | ||
119 | GPIO_BUTTON(ARD_BACK, KEY_BACK, 1, "back", 0), | ||
120 | GPIO_BUTTON(ARD_PROG, KEY_PROGRAM, 1, "program", 0), | ||
121 | GPIO_BUTTON(ARD_VOLUMEUP, KEY_VOLUMEUP, 1, "volume-up", 0), | ||
122 | GPIO_BUTTON(ARD_VOLUMEDOWN, KEY_VOLUMEDOWN, 1, "volume-down", 0), | ||
123 | }; | ||
124 | |||
125 | static const struct gpio_keys_platform_data ard_button_data __initconst = { | ||
126 | .buttons = ard_buttons, | ||
127 | .nbuttons = ARRAY_SIZE(ard_buttons), | ||
128 | }; | ||
129 | |||
130 | static struct resource ard_smsc911x_resources[] = { | ||
131 | { | ||
132 | .start = MX53_CS1_64MB_BASE_ADDR, | ||
133 | .end = MX53_CS1_64MB_BASE_ADDR + SZ_32M - 1, | ||
134 | .flags = IORESOURCE_MEM, | ||
135 | }, | ||
136 | { | ||
137 | .start = gpio_to_irq(ARD_ETHERNET_INT_B), | ||
138 | .end = gpio_to_irq(ARD_ETHERNET_INT_B), | ||
139 | .flags = IORESOURCE_IRQ, | ||
140 | }, | ||
141 | }; | ||
142 | |||
143 | struct smsc911x_platform_config ard_smsc911x_config = { | ||
144 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | ||
145 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | ||
146 | .flags = SMSC911X_USE_32BIT, | ||
147 | }; | ||
148 | |||
149 | static struct platform_device ard_smsc_lan9220_device = { | ||
150 | .name = "smsc911x", | ||
151 | .id = -1, | ||
152 | .num_resources = ARRAY_SIZE(ard_smsc911x_resources), | ||
153 | .resource = ard_smsc911x_resources, | ||
154 | .dev = { | ||
155 | .platform_data = &ard_smsc911x_config, | ||
156 | }, | ||
157 | }; | ||
158 | |||
159 | static const struct esdhc_platform_data mx53_ard_sd1_data __initconst = { | ||
160 | .cd_gpio = ARD_SD1_CD, | ||
161 | .wp_gpio = ARD_SD1_WP, | ||
162 | }; | ||
163 | |||
164 | static struct imxi2c_platform_data mx53_ard_i2c2_data = { | ||
165 | .bitrate = 50000, | ||
166 | }; | ||
167 | |||
168 | static struct imxi2c_platform_data mx53_ard_i2c3_data = { | ||
169 | .bitrate = 400000, | ||
170 | }; | ||
171 | |||
172 | static void __init mx53_ard_io_init(void) | ||
173 | { | ||
174 | mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads, | ||
175 | ARRAY_SIZE(mx53_ard_pads)); | ||
176 | |||
177 | gpio_request(ARD_ETHERNET_INT_B, "eth-int-b"); | ||
178 | gpio_direction_input(ARD_ETHERNET_INT_B); | ||
179 | |||
180 | gpio_request(ARD_I2CPORTEXP_B, "i2cptexp-rst"); | ||
181 | gpio_direction_output(ARD_I2CPORTEXP_B, 1); | ||
182 | } | ||
183 | |||
184 | /* Config CS1 settings for ethernet controller */ | ||
185 | static int weim_cs_config(void) | ||
186 | { | ||
187 | u32 reg; | ||
188 | void __iomem *weim_base, *iomuxc_base; | ||
189 | |||
190 | weim_base = ioremap(MX53_WEIM_BASE_ADDR, SZ_4K); | ||
191 | if (!weim_base) | ||
192 | return -ENOMEM; | ||
193 | |||
194 | iomuxc_base = ioremap(MX53_IOMUXC_BASE_ADDR, SZ_4K); | ||
195 | if (!iomuxc_base) | ||
196 | return -ENOMEM; | ||
197 | |||
198 | /* CS1 timings for LAN9220 */ | ||
199 | writel(0x20001, (weim_base + 0x18)); | ||
200 | writel(0x0, (weim_base + 0x1C)); | ||
201 | writel(0x16000202, (weim_base + 0x20)); | ||
202 | writel(0x00000002, (weim_base + 0x24)); | ||
203 | writel(0x16002082, (weim_base + 0x28)); | ||
204 | writel(0x00000000, (weim_base + 0x2C)); | ||
205 | writel(0x00000000, (weim_base + 0x90)); | ||
206 | |||
207 | /* specify 64 MB on CS1 and CS0 on GPR1 */ | ||
208 | reg = readl(iomuxc_base + 0x4); | ||
209 | reg &= ~0x3F; | ||
210 | reg |= 0x1B; | ||
211 | writel(reg, (iomuxc_base + 0x4)); | ||
212 | |||
213 | iounmap(iomuxc_base); | ||
214 | iounmap(weim_base); | ||
215 | |||
216 | return 0; | ||
217 | } | ||
218 | |||
219 | static struct platform_device *devices[] __initdata = { | ||
220 | &ard_smsc_lan9220_device, | ||
221 | }; | ||
222 | |||
223 | static void __init mx53_ard_board_init(void) | ||
224 | { | ||
225 | imx53_soc_init(); | ||
226 | imx53_add_imx_uart(0, NULL); | ||
227 | |||
228 | mx53_ard_io_init(); | ||
229 | weim_cs_config(); | ||
230 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
231 | |||
232 | imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data); | ||
233 | imx53_add_imx2_wdt(0, NULL); | ||
234 | imx53_add_imx_i2c(1, &mx53_ard_i2c2_data); | ||
235 | imx53_add_imx_i2c(2, &mx53_ard_i2c3_data); | ||
236 | imx_add_gpio_keys(&ard_button_data); | ||
237 | } | ||
238 | |||
239 | static void __init mx53_ard_timer_init(void) | ||
240 | { | ||
241 | mx53_clocks_init(32768, 24000000, 22579200, 0); | ||
242 | } | ||
243 | |||
244 | static struct sys_timer mx53_ard_timer = { | ||
245 | .init = mx53_ard_timer_init, | ||
246 | }; | ||
247 | |||
248 | MACHINE_START(MX53_ARD, "Freescale MX53 ARD Board") | ||
249 | .map_io = mx53_map_io, | ||
250 | .init_early = imx53_init_early, | ||
251 | .init_irq = mx53_init_irq, | ||
252 | .timer = &mx53_ard_timer, | ||
253 | .init_machine = mx53_ard_board_init, | ||
254 | MACHINE_END | ||
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c index f87d571882c6..1b417b06b736 100644 --- a/arch/arm/mach-mx5/board-mx53_evk.c +++ b/arch/arm/mach-mx5/board-mx53_evk.c | |||
@@ -35,6 +35,7 @@ | |||
35 | #define MX53_EVK_FEC_PHY_RST IMX_GPIO_NR(7, 6) | 35 | #define MX53_EVK_FEC_PHY_RST IMX_GPIO_NR(7, 6) |
36 | #define EVK_ECSPI1_CS0 IMX_GPIO_NR(2, 30) | 36 | #define EVK_ECSPI1_CS0 IMX_GPIO_NR(2, 30) |
37 | #define EVK_ECSPI1_CS1 IMX_GPIO_NR(3, 19) | 37 | #define EVK_ECSPI1_CS1 IMX_GPIO_NR(3, 19) |
38 | #define MX53EVK_LED IMX_GPIO_NR(7, 7) | ||
38 | 39 | ||
39 | #include "crm_regs.h" | 40 | #include "crm_regs.h" |
40 | #include "devices-imx53.h" | 41 | #include "devices-imx53.h" |
@@ -58,12 +59,27 @@ static iomux_v3_cfg_t mx53_evk_pads[] = { | |||
58 | /* ecspi chip select lines */ | 59 | /* ecspi chip select lines */ |
59 | MX53_PAD_EIM_EB2__GPIO2_30, | 60 | MX53_PAD_EIM_EB2__GPIO2_30, |
60 | MX53_PAD_EIM_D19__GPIO3_19, | 61 | MX53_PAD_EIM_D19__GPIO3_19, |
62 | /* LED */ | ||
63 | MX53_PAD_PATA_DA_1__GPIO7_7, | ||
61 | }; | 64 | }; |
62 | 65 | ||
63 | static const struct imxuart_platform_data mx53_evk_uart_pdata __initconst = { | 66 | static const struct imxuart_platform_data mx53_evk_uart_pdata __initconst = { |
64 | .flags = IMXUART_HAVE_RTSCTS, | 67 | .flags = IMXUART_HAVE_RTSCTS, |
65 | }; | 68 | }; |
66 | 69 | ||
70 | static const struct gpio_led mx53evk_leds[] __initconst = { | ||
71 | { | ||
72 | .name = "green", | ||
73 | .default_trigger = "heartbeat", | ||
74 | .gpio = MX53EVK_LED, | ||
75 | }, | ||
76 | }; | ||
77 | |||
78 | static const struct gpio_led_platform_data mx53evk_leds_data __initconst = { | ||
79 | .leds = mx53evk_leds, | ||
80 | .num_leds = ARRAY_SIZE(mx53evk_leds), | ||
81 | }; | ||
82 | |||
67 | static inline void mx53_evk_init_uart(void) | 83 | static inline void mx53_evk_init_uart(void) |
68 | { | 84 | { |
69 | imx53_add_imx_uart(0, NULL); | 85 | imx53_add_imx_uart(0, NULL); |
@@ -117,6 +133,8 @@ static const struct spi_imx_master mx53_evk_spi_data __initconst = { | |||
117 | 133 | ||
118 | static void __init mx53_evk_board_init(void) | 134 | static void __init mx53_evk_board_init(void) |
119 | { | 135 | { |
136 | imx53_soc_init(); | ||
137 | |||
120 | mxc_iomux_v3_setup_multiple_pads(mx53_evk_pads, | 138 | mxc_iomux_v3_setup_multiple_pads(mx53_evk_pads, |
121 | ARRAY_SIZE(mx53_evk_pads)); | 139 | ARRAY_SIZE(mx53_evk_pads)); |
122 | mx53_evk_init_uart(); | 140 | mx53_evk_init_uart(); |
@@ -133,6 +151,7 @@ static void __init mx53_evk_board_init(void) | |||
133 | ARRAY_SIZE(mx53_evk_spi_board_info)); | 151 | ARRAY_SIZE(mx53_evk_spi_board_info)); |
134 | imx53_add_ecspi(0, &mx53_evk_spi_data); | 152 | imx53_add_ecspi(0, &mx53_evk_spi_data); |
135 | imx53_add_imx2_wdt(0, NULL); | 153 | imx53_add_imx2_wdt(0, NULL); |
154 | gpio_led_register_device(-1, &mx53evk_leds_data); | ||
136 | } | 155 | } |
137 | 156 | ||
138 | static void __init mx53_evk_timer_init(void) | 157 | static void __init mx53_evk_timer_init(void) |
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c index 1b947e8c9c0c..54be525e2bd7 100644 --- a/arch/arm/mach-mx5/board-mx53_loco.c +++ b/arch/arm/mach-mx5/board-mx53_loco.c | |||
@@ -38,6 +38,10 @@ | |||
38 | #define MX53_LOCO_UI1 IMX_GPIO_NR(2, 14) | 38 | #define MX53_LOCO_UI1 IMX_GPIO_NR(2, 14) |
39 | #define MX53_LOCO_UI2 IMX_GPIO_NR(2, 15) | 39 | #define MX53_LOCO_UI2 IMX_GPIO_NR(2, 15) |
40 | #define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6) | 40 | #define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6) |
41 | #define LOCO_LED IMX_GPIO_NR(7, 7) | ||
42 | #define LOCO_SD3_CD IMX_GPIO_NR(3, 11) | ||
43 | #define LOCO_SD3_WP IMX_GPIO_NR(3, 12) | ||
44 | #define LOCO_SD1_CD IMX_GPIO_NR(3, 13) | ||
41 | 45 | ||
42 | static iomux_v3_cfg_t mx53_loco_pads[] = { | 46 | static iomux_v3_cfg_t mx53_loco_pads[] = { |
43 | /* FEC */ | 47 | /* FEC */ |
@@ -70,6 +74,8 @@ static iomux_v3_cfg_t mx53_loco_pads[] = { | |||
70 | MX53_PAD_SD1_DATA1__ESDHC1_DAT1, | 74 | MX53_PAD_SD1_DATA1__ESDHC1_DAT1, |
71 | MX53_PAD_SD1_DATA2__ESDHC1_DAT2, | 75 | MX53_PAD_SD1_DATA2__ESDHC1_DAT2, |
72 | MX53_PAD_SD1_DATA3__ESDHC1_DAT3, | 76 | MX53_PAD_SD1_DATA3__ESDHC1_DAT3, |
77 | /* SD1_CD */ | ||
78 | MX53_PAD_EIM_DA13__GPIO3_13, | ||
73 | /* SD3 */ | 79 | /* SD3 */ |
74 | MX53_PAD_PATA_DATA8__ESDHC3_DAT0, | 80 | MX53_PAD_PATA_DATA8__ESDHC3_DAT0, |
75 | MX53_PAD_PATA_DATA9__ESDHC3_DAT1, | 81 | MX53_PAD_PATA_DATA9__ESDHC3_DAT1, |
@@ -163,7 +169,7 @@ static iomux_v3_cfg_t mx53_loco_pads[] = { | |||
163 | MX53_PAD_GPIO_7__SPDIF_PLOCK, | 169 | MX53_PAD_GPIO_7__SPDIF_PLOCK, |
164 | MX53_PAD_GPIO_17__SPDIF_OUT1, | 170 | MX53_PAD_GPIO_17__SPDIF_OUT1, |
165 | /* GPIO */ | 171 | /* GPIO */ |
166 | MX53_PAD_PATA_DA_1__GPIO7_7, | 172 | MX53_PAD_PATA_DA_1__GPIO7_7, /* LED */ |
167 | MX53_PAD_PATA_DA_2__GPIO7_8, | 173 | MX53_PAD_PATA_DA_2__GPIO7_8, |
168 | MX53_PAD_PATA_DATA5__GPIO2_5, | 174 | MX53_PAD_PATA_DATA5__GPIO2_5, |
169 | MX53_PAD_PATA_DATA6__GPIO2_6, | 175 | MX53_PAD_PATA_DATA6__GPIO2_6, |
@@ -202,6 +208,15 @@ static const struct gpio_keys_platform_data loco_button_data __initconst = { | |||
202 | .nbuttons = ARRAY_SIZE(loco_buttons), | 208 | .nbuttons = ARRAY_SIZE(loco_buttons), |
203 | }; | 209 | }; |
204 | 210 | ||
211 | static const struct esdhc_platform_data mx53_loco_sd1_data __initconst = { | ||
212 | .cd_gpio = LOCO_SD1_CD, | ||
213 | }; | ||
214 | |||
215 | static const struct esdhc_platform_data mx53_loco_sd3_data __initconst = { | ||
216 | .cd_gpio = LOCO_SD3_CD, | ||
217 | .wp_gpio = LOCO_SD3_WP, | ||
218 | }; | ||
219 | |||
205 | static inline void mx53_loco_fec_reset(void) | 220 | static inline void mx53_loco_fec_reset(void) |
206 | { | 221 | { |
207 | int ret; | 222 | int ret; |
@@ -225,8 +240,23 @@ static const struct imxi2c_platform_data mx53_loco_i2c_data __initconst = { | |||
225 | .bitrate = 100000, | 240 | .bitrate = 100000, |
226 | }; | 241 | }; |
227 | 242 | ||
243 | static const struct gpio_led mx53loco_leds[] __initconst = { | ||
244 | { | ||
245 | .name = "green", | ||
246 | .default_trigger = "heartbeat", | ||
247 | .gpio = LOCO_LED, | ||
248 | }, | ||
249 | }; | ||
250 | |||
251 | static const struct gpio_led_platform_data mx53loco_leds_data __initconst = { | ||
252 | .leds = mx53loco_leds, | ||
253 | .num_leds = ARRAY_SIZE(mx53loco_leds), | ||
254 | }; | ||
255 | |||
228 | static void __init mx53_loco_board_init(void) | 256 | static void __init mx53_loco_board_init(void) |
229 | { | 257 | { |
258 | imx53_soc_init(); | ||
259 | |||
230 | mxc_iomux_v3_setup_multiple_pads(mx53_loco_pads, | 260 | mxc_iomux_v3_setup_multiple_pads(mx53_loco_pads, |
231 | ARRAY_SIZE(mx53_loco_pads)); | 261 | ARRAY_SIZE(mx53_loco_pads)); |
232 | imx53_add_imx_uart(0, NULL); | 262 | imx53_add_imx_uart(0, NULL); |
@@ -235,9 +265,10 @@ static void __init mx53_loco_board_init(void) | |||
235 | imx53_add_imx2_wdt(0, NULL); | 265 | imx53_add_imx2_wdt(0, NULL); |
236 | imx53_add_imx_i2c(0, &mx53_loco_i2c_data); | 266 | imx53_add_imx_i2c(0, &mx53_loco_i2c_data); |
237 | imx53_add_imx_i2c(1, &mx53_loco_i2c_data); | 267 | imx53_add_imx_i2c(1, &mx53_loco_i2c_data); |
238 | imx53_add_sdhci_esdhc_imx(0, NULL); | 268 | imx53_add_sdhci_esdhc_imx(0, &mx53_loco_sd1_data); |
239 | imx53_add_sdhci_esdhc_imx(2, NULL); | 269 | imx53_add_sdhci_esdhc_imx(2, &mx53_loco_sd3_data); |
240 | imx_add_gpio_keys(&loco_button_data); | 270 | imx_add_gpio_keys(&loco_button_data); |
271 | gpio_led_register_device(-1, &mx53loco_leds_data); | ||
241 | } | 272 | } |
242 | 273 | ||
243 | static void __init mx53_loco_timer_init(void) | 274 | static void __init mx53_loco_timer_init(void) |
diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c index 817c08938f55..bc02894eafef 100644 --- a/arch/arm/mach-mx5/board-mx53_smd.c +++ b/arch/arm/mach-mx5/board-mx53_smd.c | |||
@@ -113,6 +113,8 @@ static const struct imxi2c_platform_data mx53_smd_i2c_data __initconst = { | |||
113 | 113 | ||
114 | static void __init mx53_smd_board_init(void) | 114 | static void __init mx53_smd_board_init(void) |
115 | { | 115 | { |
116 | imx53_soc_init(); | ||
117 | |||
116 | mxc_iomux_v3_setup_multiple_pads(mx53_smd_pads, | 118 | mxc_iomux_v3_setup_multiple_pads(mx53_smd_pads, |
117 | ARRAY_SIZE(mx53_smd_pads)); | 119 | ARRAY_SIZE(mx53_smd_pads)); |
118 | mx53_smd_init_uart(); | 120 | mx53_smd_init_uart(); |
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index 6b89c1bf4eb2..ff16d86ff597 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c | |||
@@ -1254,12 +1254,20 @@ DEFINE_CLOCK(uart2_ipg_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG5_OFFSET, | |||
1254 | NULL, NULL, &ipg_clk, &aips_tz1_clk); | 1254 | NULL, NULL, &ipg_clk, &aips_tz1_clk); |
1255 | DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET, | 1255 | DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET, |
1256 | NULL, NULL, &ipg_clk, &spba_clk); | 1256 | NULL, NULL, &ipg_clk, &spba_clk); |
1257 | DEFINE_CLOCK(uart4_ipg_clk, 3, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG4_OFFSET, | ||
1258 | NULL, NULL, &ipg_clk, &spba_clk); | ||
1259 | DEFINE_CLOCK(uart5_ipg_clk, 4, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG6_OFFSET, | ||
1260 | NULL, NULL, &ipg_clk, &spba_clk); | ||
1257 | DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG4_OFFSET, | 1261 | DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG4_OFFSET, |
1258 | NULL, NULL, &uart_root_clk, &uart1_ipg_clk); | 1262 | NULL, NULL, &uart_root_clk, &uart1_ipg_clk); |
1259 | DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG6_OFFSET, | 1263 | DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG6_OFFSET, |
1260 | NULL, NULL, &uart_root_clk, &uart2_ipg_clk); | 1264 | NULL, NULL, &uart_root_clk, &uart2_ipg_clk); |
1261 | DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG8_OFFSET, | 1265 | DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG8_OFFSET, |
1262 | NULL, NULL, &uart_root_clk, &uart3_ipg_clk); | 1266 | NULL, NULL, &uart_root_clk, &uart3_ipg_clk); |
1267 | DEFINE_CLOCK(uart4_clk, 3, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG5_OFFSET, | ||
1268 | NULL, NULL, &uart_root_clk, &uart4_ipg_clk); | ||
1269 | DEFINE_CLOCK(uart5_clk, 4, MXC_CCM_CCGR7, MXC_CCM_CCGRx_CG7_OFFSET, | ||
1270 | NULL, NULL, &uart_root_clk, &uart5_ipg_clk); | ||
1263 | 1271 | ||
1264 | /* GPT */ | 1272 | /* GPT */ |
1265 | DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET, | 1273 | DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET, |
@@ -1274,11 +1282,13 @@ DEFINE_CLOCK(pwm2_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG8_OFFSET, | |||
1274 | 1282 | ||
1275 | /* I2C */ | 1283 | /* I2C */ |
1276 | DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET, | 1284 | DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET, |
1277 | NULL, NULL, &ipg_clk, NULL); | 1285 | NULL, NULL, &ipg_perclk, NULL); |
1278 | DEFINE_CLOCK(i2c2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG10_OFFSET, | 1286 | DEFINE_CLOCK(i2c2_clk, 1, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG10_OFFSET, |
1279 | NULL, NULL, &ipg_clk, NULL); | 1287 | NULL, NULL, &ipg_perclk, NULL); |
1280 | DEFINE_CLOCK(hsi2c_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET, | 1288 | DEFINE_CLOCK(hsi2c_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET, |
1281 | NULL, NULL, &ipg_clk, NULL); | 1289 | NULL, NULL, &ipg_clk, NULL); |
1290 | DEFINE_CLOCK(i2c3_mx53_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG11_OFFSET, | ||
1291 | NULL, NULL, &ipg_perclk, NULL); | ||
1282 | 1292 | ||
1283 | /* FEC */ | 1293 | /* FEC */ |
1284 | DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET, | 1294 | DEFINE_CLOCK(fec_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG12_OFFSET, |
@@ -1462,11 +1472,14 @@ static struct clk_lookup mx53_lookups[] = { | |||
1462 | _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) | 1472 | _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) |
1463 | _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) | 1473 | _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) |
1464 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) | 1474 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) |
1475 | _REGISTER_CLOCK("imx-uart.3", NULL, uart4_clk) | ||
1476 | _REGISTER_CLOCK("imx-uart.4", NULL, uart5_clk) | ||
1465 | _REGISTER_CLOCK(NULL, "gpt", gpt_clk) | 1477 | _REGISTER_CLOCK(NULL, "gpt", gpt_clk) |
1466 | _REGISTER_CLOCK("fec.0", NULL, fec_clk) | 1478 | _REGISTER_CLOCK("fec.0", NULL, fec_clk) |
1467 | _REGISTER_CLOCK(NULL, "iim_clk", iim_clk) | 1479 | _REGISTER_CLOCK(NULL, "iim_clk", iim_clk) |
1468 | _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) | 1480 | _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) |
1469 | _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) | 1481 | _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) |
1482 | _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_mx53_clk) | ||
1470 | _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk) | 1483 | _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk) |
1471 | _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_mx53_clk) | 1484 | _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_mx53_clk) |
1472 | _REGISTER_CLOCK("sdhci-esdhc-imx.2", NULL, esdhc3_mx53_clk) | 1485 | _REGISTER_CLOCK("sdhci-esdhc-imx.2", NULL, esdhc3_mx53_clk) |
@@ -1476,6 +1489,11 @@ static struct clk_lookup mx53_lookups[] = { | |||
1476 | _REGISTER_CLOCK("imx53-cspi.0", NULL, cspi_clk) | 1489 | _REGISTER_CLOCK("imx53-cspi.0", NULL, cspi_clk) |
1477 | _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk) | 1490 | _REGISTER_CLOCK("imx2-wdt.0", NULL, dummy_clk) |
1478 | _REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk) | 1491 | _REGISTER_CLOCK("imx2-wdt.1", NULL, dummy_clk) |
1492 | _REGISTER_CLOCK("imx-sdma", NULL, sdma_clk) | ||
1493 | _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) | ||
1494 | _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) | ||
1495 | _REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk) | ||
1496 | _REGISTER_CLOCK("imx-keypad", NULL, dummy_clk) | ||
1479 | }; | 1497 | }; |
1480 | 1498 | ||
1481 | static void clk_tree_init(void) | 1499 | static void clk_tree_init(void) |
diff --git a/arch/arm/mach-mx5/crm_regs.h b/arch/arm/mach-mx5/crm_regs.h index 87c0c58f27a7..5e11ba7daee2 100644 --- a/arch/arm/mach-mx5/crm_regs.h +++ b/arch/arm/mach-mx5/crm_regs.h | |||
@@ -114,6 +114,8 @@ | |||
114 | #define MXC_CCM_CCGR4 (MX51_CCM_BASE + 0x78) | 114 | #define MXC_CCM_CCGR4 (MX51_CCM_BASE + 0x78) |
115 | #define MXC_CCM_CCGR5 (MX51_CCM_BASE + 0x7C) | 115 | #define MXC_CCM_CCGR5 (MX51_CCM_BASE + 0x7C) |
116 | #define MXC_CCM_CCGR6 (MX51_CCM_BASE + 0x80) | 116 | #define MXC_CCM_CCGR6 (MX51_CCM_BASE + 0x80) |
117 | #define MXC_CCM_CCGR7 (MX51_CCM_BASE + 0x84) | ||
118 | |||
117 | #define MXC_CCM_CMEOR (MX51_CCM_BASE + 0x84) | 119 | #define MXC_CCM_CMEOR (MX51_CCM_BASE + 0x84) |
118 | 120 | ||
119 | /* Define the bits in register CCR */ | 121 | /* Define the bits in register CCR */ |
diff --git a/arch/arm/mach-mx5/devices-imx53.h b/arch/arm/mach-mx5/devices-imx53.h index 48f4c8cc42f5..c27fe8bb4762 100644 --- a/arch/arm/mach-mx5/devices-imx53.h +++ b/arch/arm/mach-mx5/devices-imx53.h | |||
@@ -32,3 +32,11 @@ extern const struct imx_spi_imx_data imx53_ecspi_data[]; | |||
32 | extern const struct imx_imx2_wdt_data imx53_imx2_wdt_data[]; | 32 | extern const struct imx_imx2_wdt_data imx53_imx2_wdt_data[]; |
33 | #define imx53_add_imx2_wdt(id, pdata) \ | 33 | #define imx53_add_imx2_wdt(id, pdata) \ |
34 | imx_add_imx2_wdt(&imx53_imx2_wdt_data[id]) | 34 | imx_add_imx2_wdt(&imx53_imx2_wdt_data[id]) |
35 | |||
36 | extern const struct imx_imx_ssi_data imx53_imx_ssi_data[]; | ||
37 | #define imx53_add_imx_ssi(id, pdata) \ | ||
38 | imx_add_imx_ssi(&imx53_imx_ssi_data[id], pdata) | ||
39 | |||
40 | extern const struct imx_imx_keypad_data imx53_imx_keypad_data; | ||
41 | #define imx53_add_imx_keypad(pdata) \ | ||
42 | imx_add_imx_keypad(&imx53_imx_keypad_data, pdata) | ||
diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c index 153ada53e575..371ca8c8414c 100644 --- a/arch/arm/mach-mx5/devices.c +++ b/arch/arm/mach-mx5/devices.c | |||
@@ -12,7 +12,6 @@ | |||
12 | 12 | ||
13 | #include <linux/platform_device.h> | 13 | #include <linux/platform_device.h> |
14 | #include <linux/dma-mapping.h> | 14 | #include <linux/dma-mapping.h> |
15 | #include <linux/gpio.h> | ||
16 | #include <mach/hardware.h> | 15 | #include <mach/hardware.h> |
17 | #include <mach/imx-uart.h> | 16 | #include <mach/imx-uart.h> |
18 | #include <mach/irqs.h> | 17 | #include <mach/irqs.h> |
@@ -119,66 +118,3 @@ struct platform_device mxc_usbh2_device = { | |||
119 | .coherent_dma_mask = DMA_BIT_MASK(32), | 118 | .coherent_dma_mask = DMA_BIT_MASK(32), |
120 | }, | 119 | }, |
121 | }; | 120 | }; |
122 | |||
123 | static struct mxc_gpio_port mxc_gpio_ports[] = { | ||
124 | { | ||
125 | .chip.label = "gpio-0", | ||
126 | .base = MX51_IO_ADDRESS(MX51_GPIO1_BASE_ADDR), | ||
127 | .irq = MX51_MXC_INT_GPIO1_LOW, | ||
128 | .irq_high = MX51_MXC_INT_GPIO1_HIGH, | ||
129 | .virtual_irq_start = MXC_GPIO_IRQ_START | ||
130 | }, | ||
131 | { | ||
132 | .chip.label = "gpio-1", | ||
133 | .base = MX51_IO_ADDRESS(MX51_GPIO2_BASE_ADDR), | ||
134 | .irq = MX51_MXC_INT_GPIO2_LOW, | ||
135 | .irq_high = MX51_MXC_INT_GPIO2_HIGH, | ||
136 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 1 | ||
137 | }, | ||
138 | { | ||
139 | .chip.label = "gpio-2", | ||
140 | .base = MX51_IO_ADDRESS(MX51_GPIO3_BASE_ADDR), | ||
141 | .irq = MX51_MXC_INT_GPIO3_LOW, | ||
142 | .irq_high = MX51_MXC_INT_GPIO3_HIGH, | ||
143 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2 | ||
144 | }, | ||
145 | { | ||
146 | .chip.label = "gpio-3", | ||
147 | .base = MX51_IO_ADDRESS(MX51_GPIO4_BASE_ADDR), | ||
148 | .irq = MX51_MXC_INT_GPIO4_LOW, | ||
149 | .irq_high = MX51_MXC_INT_GPIO4_HIGH, | ||
150 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3 | ||
151 | }, | ||
152 | { | ||
153 | .chip.label = "gpio-4", | ||
154 | .base = MX53_IO_ADDRESS(MX53_GPIO5_BASE_ADDR), | ||
155 | .irq = MX53_INT_GPIO5_LOW, | ||
156 | .irq_high = MX53_INT_GPIO5_HIGH, | ||
157 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 4 | ||
158 | }, | ||
159 | { | ||
160 | .chip.label = "gpio-5", | ||
161 | .base = MX53_IO_ADDRESS(MX53_GPIO6_BASE_ADDR), | ||
162 | .irq = MX53_INT_GPIO6_LOW, | ||
163 | .irq_high = MX53_INT_GPIO6_HIGH, | ||
164 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 5 | ||
165 | }, | ||
166 | { | ||
167 | .chip.label = "gpio-6", | ||
168 | .base = MX53_IO_ADDRESS(MX53_GPIO7_BASE_ADDR), | ||
169 | .irq = MX53_INT_GPIO7_LOW, | ||
170 | .irq_high = MX53_INT_GPIO7_HIGH, | ||
171 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 6 | ||
172 | }, | ||
173 | }; | ||
174 | |||
175 | int __init imx51_register_gpios(void) | ||
176 | { | ||
177 | return mxc_gpio_init(mxc_gpio_ports, 4); | ||
178 | } | ||
179 | |||
180 | int __init imx53_register_gpios(void) | ||
181 | { | ||
182 | return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports)); | ||
183 | } | ||
184 | |||
diff --git a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c index 97292d20f1f3..bbf4564bd050 100644 --- a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c +++ b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c | |||
@@ -31,13 +31,12 @@ | |||
31 | #include "devices.h" | 31 | #include "devices.h" |
32 | 32 | ||
33 | #define MBIMX51_TSC2007_GPIO IMX_GPIO_NR(3, 30) | 33 | #define MBIMX51_TSC2007_GPIO IMX_GPIO_NR(3, 30) |
34 | #define MBIMX51_TSC2007_IRQ (MXC_INTERNAL_IRQS + MBIMX51_TSC2007_GPIO) | ||
35 | #define MBIMX51_LED0 IMX_GPIO_NR(3, 5) | 34 | #define MBIMX51_LED0 IMX_GPIO_NR(3, 5) |
36 | #define MBIMX51_LED1 IMX_GPIO_NR(3, 6) | 35 | #define MBIMX51_LED1 IMX_GPIO_NR(3, 6) |
37 | #define MBIMX51_LED2 IMX_GPIO_NR(3, 7) | 36 | #define MBIMX51_LED2 IMX_GPIO_NR(3, 7) |
38 | #define MBIMX51_LED3 IMX_GPIO_NR(3, 8) | 37 | #define MBIMX51_LED3 IMX_GPIO_NR(3, 8) |
39 | 38 | ||
40 | static struct gpio_led mbimx51_leds[] = { | 39 | static const struct gpio_led mbimx51_leds[] __initconst = { |
41 | { | 40 | { |
42 | .name = "led0", | 41 | .name = "led0", |
43 | .default_trigger = "heartbeat", | 42 | .default_trigger = "heartbeat", |
@@ -64,23 +63,11 @@ static struct gpio_led mbimx51_leds[] = { | |||
64 | }, | 63 | }, |
65 | }; | 64 | }; |
66 | 65 | ||
67 | static struct gpio_led_platform_data mbimx51_leds_info = { | 66 | static const struct gpio_led_platform_data mbimx51_leds_info __initconst = { |
68 | .leds = mbimx51_leds, | 67 | .leds = mbimx51_leds, |
69 | .num_leds = ARRAY_SIZE(mbimx51_leds), | 68 | .num_leds = ARRAY_SIZE(mbimx51_leds), |
70 | }; | 69 | }; |
71 | 70 | ||
72 | static struct platform_device mbimx51_leds_gpio = { | ||
73 | .name = "leds-gpio", | ||
74 | .id = -1, | ||
75 | .dev = { | ||
76 | .platform_data = &mbimx51_leds_info, | ||
77 | }, | ||
78 | }; | ||
79 | |||
80 | static struct platform_device *devices[] __initdata = { | ||
81 | &mbimx51_leds_gpio, | ||
82 | }; | ||
83 | |||
84 | static iomux_v3_cfg_t mbimx51_pads[] = { | 71 | static iomux_v3_cfg_t mbimx51_pads[] = { |
85 | /* UART2 */ | 72 | /* UART2 */ |
86 | MX51_PAD_UART2_RXD__UART2_RXD, | 73 | MX51_PAD_UART2_RXD__UART2_RXD, |
@@ -173,7 +160,7 @@ struct tsc2007_platform_data tsc2007_data = { | |||
173 | static struct i2c_board_info mbimx51_i2c_devices[] = { | 160 | static struct i2c_board_info mbimx51_i2c_devices[] = { |
174 | { | 161 | { |
175 | I2C_BOARD_INFO("tsc2007", 0x49), | 162 | I2C_BOARD_INFO("tsc2007", 0x49), |
176 | .irq = MBIMX51_TSC2007_IRQ, | 163 | .irq = gpio_to_irq(MBIMX51_TSC2007_GPIO), |
177 | .platform_data = &tsc2007_data, | 164 | .platform_data = &tsc2007_data, |
178 | }, { | 165 | }, { |
179 | I2C_BOARD_INFO("tlv320aic23", 0x1a), | 166 | I2C_BOARD_INFO("tlv320aic23", 0x1a), |
@@ -204,13 +191,14 @@ void __init eukrea_mbimx51_baseboard_init(void) | |||
204 | gpio_direction_output(MBIMX51_LED3, 1); | 191 | gpio_direction_output(MBIMX51_LED3, 1); |
205 | gpio_free(MBIMX51_LED3); | 192 | gpio_free(MBIMX51_LED3); |
206 | 193 | ||
207 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 194 | gpio_led_register_device(-1, &mbimx51_leds_info); |
208 | 195 | ||
209 | imx51_add_imx_keypad(&mbimx51_map_data); | 196 | imx51_add_imx_keypad(&mbimx51_map_data); |
210 | 197 | ||
211 | gpio_request(MBIMX51_TSC2007_GPIO, "tsc2007_irq"); | 198 | gpio_request(MBIMX51_TSC2007_GPIO, "tsc2007_irq"); |
212 | gpio_direction_input(MBIMX51_TSC2007_GPIO); | 199 | gpio_direction_input(MBIMX51_TSC2007_GPIO); |
213 | irq_set_irq_type(MBIMX51_TSC2007_IRQ, IRQF_TRIGGER_FALLING); | 200 | irq_set_irq_type(gpio_to_irq(MBIMX51_TSC2007_GPIO), |
201 | IRQF_TRIGGER_FALLING); | ||
214 | i2c_register_board_info(1, mbimx51_i2c_devices, | 202 | i2c_register_board_info(1, mbimx51_i2c_devices, |
215 | ARRAY_SIZE(mbimx51_i2c_devices)); | 203 | ARRAY_SIZE(mbimx51_i2c_devices)); |
216 | 204 | ||
diff --git a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c index 31c871ec46a6..261923997643 100644 --- a/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c +++ b/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c | |||
@@ -74,7 +74,7 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = { | |||
74 | #define GPIO_LED1 IMX_GPIO_NR(3, 30) | 74 | #define GPIO_LED1 IMX_GPIO_NR(3, 30) |
75 | #define GPIO_SWITCH1 IMX_GPIO_NR(3, 31) | 75 | #define GPIO_SWITCH1 IMX_GPIO_NR(3, 31) |
76 | 76 | ||
77 | static struct gpio_led eukrea_mbimxsd_leds[] = { | 77 | static const struct gpio_led eukrea_mbimxsd_leds[] __initconst = { |
78 | { | 78 | { |
79 | .name = "led1", | 79 | .name = "led1", |
80 | .default_trigger = "heartbeat", | 80 | .default_trigger = "heartbeat", |
@@ -83,19 +83,12 @@ static struct gpio_led eukrea_mbimxsd_leds[] = { | |||
83 | }, | 83 | }, |
84 | }; | 84 | }; |
85 | 85 | ||
86 | static struct gpio_led_platform_data eukrea_mbimxsd_led_info = { | 86 | static const struct gpio_led_platform_data |
87 | eukrea_mbimxsd_led_info __initconst = { | ||
87 | .leds = eukrea_mbimxsd_leds, | 88 | .leds = eukrea_mbimxsd_leds, |
88 | .num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds), | 89 | .num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds), |
89 | }; | 90 | }; |
90 | 91 | ||
91 | static struct platform_device eukrea_mbimxsd_leds_gpio = { | ||
92 | .name = "leds-gpio", | ||
93 | .id = -1, | ||
94 | .dev = { | ||
95 | .platform_data = &eukrea_mbimxsd_led_info, | ||
96 | }, | ||
97 | }; | ||
98 | |||
99 | static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = { | 92 | static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = { |
100 | { | 93 | { |
101 | .gpio = GPIO_SWITCH1, | 94 | .gpio = GPIO_SWITCH1, |
@@ -112,10 +105,6 @@ static const struct gpio_keys_platform_data | |||
112 | .nbuttons = ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons), | 105 | .nbuttons = ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons), |
113 | }; | 106 | }; |
114 | 107 | ||
115 | static struct platform_device *platform_devices[] __initdata = { | ||
116 | &eukrea_mbimxsd_leds_gpio, | ||
117 | }; | ||
118 | |||
119 | static const struct imxuart_platform_data uart_pdata __initconst = { | 108 | static const struct imxuart_platform_data uart_pdata __initconst = { |
120 | .flags = IMXUART_HAVE_RTSCTS, | 109 | .flags = IMXUART_HAVE_RTSCTS, |
121 | }; | 110 | }; |
@@ -154,6 +143,6 @@ void __init eukrea_mbimxsd51_baseboard_init(void) | |||
154 | i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices, | 143 | i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices, |
155 | ARRAY_SIZE(eukrea_mbimxsd_i2c_devices)); | 144 | ARRAY_SIZE(eukrea_mbimxsd_i2c_devices)); |
156 | 145 | ||
157 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | 146 | gpio_led_register_device(-1, &eukrea_mbimxsd_led_info); |
158 | imx_add_gpio_keys(&eukrea_mbimxsd_button_data); | 147 | imx_add_gpio_keys(&eukrea_mbimxsd_button_data); |
159 | } | 148 | } |
diff --git a/arch/arm/mach-mx5/mm-mx50.c b/arch/arm/mach-mx5/mm-mx50.c index b9c363b514a9..28c3f60f734f 100644 --- a/arch/arm/mach-mx5/mm-mx50.c +++ b/arch/arm/mach-mx5/mm-mx50.c | |||
@@ -26,7 +26,6 @@ | |||
26 | #include <mach/hardware.h> | 26 | #include <mach/hardware.h> |
27 | #include <mach/common.h> | 27 | #include <mach/common.h> |
28 | #include <mach/iomux-v3.h> | 28 | #include <mach/iomux-v3.h> |
29 | #include <mach/gpio.h> | ||
30 | #include <mach/irqs.h> | 29 | #include <mach/irqs.h> |
31 | 30 | ||
32 | /* | 31 | /* |
@@ -56,17 +55,17 @@ void __init imx50_init_early(void) | |||
56 | mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR)); | 55 | mxc_arch_reset_init(MX50_IO_ADDRESS(MX50_WDOG_BASE_ADDR)); |
57 | } | 56 | } |
58 | 57 | ||
59 | static struct mxc_gpio_port imx50_gpio_ports[] = { | ||
60 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 0, 1, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH), | ||
61 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 1, 2, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH), | ||
62 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 2, 3, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), | ||
63 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 3, 4, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), | ||
64 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 4, 5, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), | ||
65 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(MX50, 5, 6, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH), | ||
66 | }; | ||
67 | |||
68 | void __init mx50_init_irq(void) | 58 | void __init mx50_init_irq(void) |
69 | { | 59 | { |
70 | tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR)); | 60 | tzic_init_irq(MX50_IO_ADDRESS(MX50_TZIC_BASE_ADDR)); |
71 | mxc_gpio_init(imx50_gpio_ports, ARRAY_SIZE(imx50_gpio_ports)); | 61 | } |
62 | |||
63 | void __init imx50_soc_init(void) | ||
64 | { | ||
65 | mxc_register_gpio(0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH); | ||
66 | mxc_register_gpio(1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH); | ||
67 | mxc_register_gpio(2, MX50_GPIO3_BASE_ADDR, SZ_16K, MX50_INT_GPIO3_LOW, MX50_INT_GPIO3_HIGH); | ||
68 | mxc_register_gpio(3, MX50_GPIO4_BASE_ADDR, SZ_16K, MX50_INT_GPIO4_LOW, MX50_INT_GPIO4_HIGH); | ||
69 | mxc_register_gpio(4, MX50_GPIO5_BASE_ADDR, SZ_16K, MX50_INT_GPIO5_LOW, MX50_INT_GPIO5_HIGH); | ||
70 | mxc_register_gpio(5, MX50_GPIO6_BASE_ADDR, SZ_16K, MX50_INT_GPIO6_LOW, MX50_INT_GPIO6_HIGH); | ||
72 | } | 71 | } |
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c index ff557301b42b..1b7059f1ac76 100644 --- a/arch/arm/mach-mx5/mm.c +++ b/arch/arm/mach-mx5/mm.c | |||
@@ -18,6 +18,7 @@ | |||
18 | 18 | ||
19 | #include <mach/hardware.h> | 19 | #include <mach/hardware.h> |
20 | #include <mach/common.h> | 20 | #include <mach/common.h> |
21 | #include <mach/devices-common.h> | ||
21 | #include <mach/iomux-v3.h> | 22 | #include <mach/iomux-v3.h> |
22 | 23 | ||
23 | /* | 24 | /* |
@@ -69,8 +70,6 @@ void __init imx53_init_early(void) | |||
69 | mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR)); | 70 | mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR)); |
70 | } | 71 | } |
71 | 72 | ||
72 | int imx51_register_gpios(void); | ||
73 | |||
74 | void __init mx51_init_irq(void) | 73 | void __init mx51_init_irq(void) |
75 | { | 74 | { |
76 | unsigned long tzic_addr; | 75 | unsigned long tzic_addr; |
@@ -86,11 +85,8 @@ void __init mx51_init_irq(void) | |||
86 | panic("unable to map TZIC interrupt controller\n"); | 85 | panic("unable to map TZIC interrupt controller\n"); |
87 | 86 | ||
88 | tzic_init_irq(tzic_virt); | 87 | tzic_init_irq(tzic_virt); |
89 | imx51_register_gpios(); | ||
90 | } | 88 | } |
91 | 89 | ||
92 | int imx53_register_gpios(void); | ||
93 | |||
94 | void __init mx53_init_irq(void) | 90 | void __init mx53_init_irq(void) |
95 | { | 91 | { |
96 | unsigned long tzic_addr; | 92 | unsigned long tzic_addr; |
@@ -103,5 +99,66 @@ void __init mx53_init_irq(void) | |||
103 | panic("unable to map TZIC interrupt controller\n"); | 99 | panic("unable to map TZIC interrupt controller\n"); |
104 | 100 | ||
105 | tzic_init_irq(tzic_virt); | 101 | tzic_init_irq(tzic_virt); |
106 | imx53_register_gpios(); | 102 | } |
103 | |||
104 | static struct sdma_script_start_addrs imx51_sdma_script __initdata = { | ||
105 | .ap_2_ap_addr = 642, | ||
106 | .uart_2_mcu_addr = 817, | ||
107 | .mcu_2_app_addr = 747, | ||
108 | .mcu_2_shp_addr = 961, | ||
109 | .ata_2_mcu_addr = 1473, | ||
110 | .mcu_2_ata_addr = 1392, | ||
111 | .app_2_per_addr = 1033, | ||
112 | .app_2_mcu_addr = 683, | ||
113 | .shp_2_per_addr = 1251, | ||
114 | .shp_2_mcu_addr = 892, | ||
115 | }; | ||
116 | |||
117 | static struct sdma_platform_data imx51_sdma_pdata __initdata = { | ||
118 | .sdma_version = 2, | ||
119 | .fw_name = "sdma-imx51.bin", | ||
120 | .script_addrs = &imx51_sdma_script, | ||
121 | }; | ||
122 | |||
123 | static struct sdma_script_start_addrs imx53_sdma_script __initdata = { | ||
124 | .ap_2_ap_addr = 642, | ||
125 | .app_2_mcu_addr = 683, | ||
126 | .mcu_2_app_addr = 747, | ||
127 | .uart_2_mcu_addr = 817, | ||
128 | .shp_2_mcu_addr = 891, | ||
129 | .mcu_2_shp_addr = 960, | ||
130 | .uartsh_2_mcu_addr = 1032, | ||
131 | .spdif_2_mcu_addr = 1100, | ||
132 | .mcu_2_spdif_addr = 1134, | ||
133 | .firi_2_mcu_addr = 1193, | ||
134 | .mcu_2_firi_addr = 1290, | ||
135 | }; | ||
136 | |||
137 | static struct sdma_platform_data imx53_sdma_pdata __initdata = { | ||
138 | .sdma_version = 2, | ||
139 | .fw_name = "sdma-imx53.bin", | ||
140 | .script_addrs = &imx53_sdma_script, | ||
141 | }; | ||
142 | |||
143 | void __init imx51_soc_init(void) | ||
144 | { | ||
145 | mxc_register_gpio(0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO1_LOW, MX51_MXC_INT_GPIO1_HIGH); | ||
146 | mxc_register_gpio(1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO2_LOW, MX51_MXC_INT_GPIO2_HIGH); | ||
147 | mxc_register_gpio(2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO3_LOW, MX51_MXC_INT_GPIO3_HIGH); | ||
148 | mxc_register_gpio(3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_MXC_INT_GPIO4_LOW, MX51_MXC_INT_GPIO4_HIGH); | ||
149 | |||
150 | imx_add_imx_sdma(MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata); | ||
151 | } | ||
152 | |||
153 | void __init imx53_soc_init(void) | ||
154 | { | ||
155 | mxc_register_gpio(0, MX53_GPIO1_BASE_ADDR, SZ_16K, MX53_INT_GPIO1_LOW, MX53_INT_GPIO1_HIGH); | ||
156 | mxc_register_gpio(1, MX53_GPIO2_BASE_ADDR, SZ_16K, MX53_INT_GPIO2_LOW, MX53_INT_GPIO2_HIGH); | ||
157 | mxc_register_gpio(2, MX53_GPIO3_BASE_ADDR, SZ_16K, MX53_INT_GPIO3_LOW, MX53_INT_GPIO3_HIGH); | ||
158 | mxc_register_gpio(3, MX53_GPIO4_BASE_ADDR, SZ_16K, MX53_INT_GPIO4_LOW, MX53_INT_GPIO4_HIGH); | ||
159 | mxc_register_gpio(4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH); | ||
160 | mxc_register_gpio(5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH); | ||
161 | mxc_register_gpio(6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH); | ||
162 | |||
163 | imx_add_imx_sdma(MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata); | ||
107 | } | 164 | } |
diff --git a/arch/arm/mach-mx5/pm-imx5.c b/arch/arm/mach-mx5/pm-imx5.c new file mode 100644 index 000000000000..e4529af0da72 --- /dev/null +++ b/arch/arm/mach-mx5/pm-imx5.c | |||
@@ -0,0 +1,73 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | * | ||
4 | * The code contained herein is licensed under the GNU General Public | ||
5 | * License. You may obtain a copy of the GNU General Public License | ||
6 | * Version 2 or later at the following locations: | ||
7 | * | ||
8 | * http://www.opensource.org/licenses/gpl-license.html | ||
9 | * http://www.gnu.org/copyleft/gpl.html | ||
10 | */ | ||
11 | #include <linux/suspend.h> | ||
12 | #include <linux/clk.h> | ||
13 | #include <linux/io.h> | ||
14 | #include <linux/err.h> | ||
15 | #include <asm/cacheflush.h> | ||
16 | #include <asm/tlbflush.h> | ||
17 | #include <mach/system.h> | ||
18 | #include "crm_regs.h" | ||
19 | |||
20 | static struct clk *gpc_dvfs_clk; | ||
21 | |||
22 | static int mx5_suspend_enter(suspend_state_t state) | ||
23 | { | ||
24 | clk_enable(gpc_dvfs_clk); | ||
25 | switch (state) { | ||
26 | case PM_SUSPEND_MEM: | ||
27 | mx5_cpu_lp_set(STOP_POWER_OFF); | ||
28 | break; | ||
29 | case PM_SUSPEND_STANDBY: | ||
30 | mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); | ||
31 | break; | ||
32 | default: | ||
33 | return -EINVAL; | ||
34 | } | ||
35 | |||
36 | if (state == PM_SUSPEND_MEM) { | ||
37 | local_flush_tlb_all(); | ||
38 | flush_cache_all(); | ||
39 | |||
40 | /*clear the EMPGC0/1 bits */ | ||
41 | __raw_writel(0, MXC_SRPG_EMPGC0_SRPGCR); | ||
42 | __raw_writel(0, MXC_SRPG_EMPGC1_SRPGCR); | ||
43 | } | ||
44 | cpu_do_idle(); | ||
45 | clk_disable(gpc_dvfs_clk); | ||
46 | |||
47 | return 0; | ||
48 | } | ||
49 | |||
50 | static int mx5_pm_valid(suspend_state_t state) | ||
51 | { | ||
52 | return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX); | ||
53 | } | ||
54 | |||
55 | static const struct platform_suspend_ops mx5_suspend_ops = { | ||
56 | .valid = mx5_pm_valid, | ||
57 | .enter = mx5_suspend_enter, | ||
58 | }; | ||
59 | |||
60 | static int __init mx5_pm_init(void) | ||
61 | { | ||
62 | if (gpc_dvfs_clk == NULL) | ||
63 | gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); | ||
64 | |||
65 | if (!IS_ERR(gpc_dvfs_clk)) { | ||
66 | if (cpu_is_mx51()) | ||
67 | suspend_set_ops(&mx5_suspend_ops); | ||
68 | } else | ||
69 | return -EPERM; | ||
70 | |||
71 | return 0; | ||
72 | } | ||
73 | device_initcall(mx5_pm_init); | ||
diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig index f114960622e0..4cd0231ee539 100644 --- a/arch/arm/mach-mxs/Kconfig +++ b/arch/arm/mach-mxs/Kconfig | |||
@@ -41,6 +41,7 @@ config MACH_MX23EVK | |||
41 | config MACH_MX28EVK | 41 | config MACH_MX28EVK |
42 | bool "Support MX28EVK Platform" | 42 | bool "Support MX28EVK Platform" |
43 | select SOC_IMX28 | 43 | select SOC_IMX28 |
44 | select LEDS_GPIO_REGISTER | ||
44 | select MXS_HAVE_AMBA_DUART | 45 | select MXS_HAVE_AMBA_DUART |
45 | select MXS_HAVE_PLATFORM_AUART | 46 | select MXS_HAVE_PLATFORM_AUART |
46 | select MXS_HAVE_PLATFORM_FEC | 47 | select MXS_HAVE_PLATFORM_FEC |
@@ -55,10 +56,12 @@ config MACH_MX28EVK | |||
55 | config MODULE_TX28 | 56 | config MODULE_TX28 |
56 | bool | 57 | bool |
57 | select SOC_IMX28 | 58 | select SOC_IMX28 |
59 | select LEDS_GPIO_REGISTER | ||
58 | select MXS_HAVE_AMBA_DUART | 60 | select MXS_HAVE_AMBA_DUART |
59 | select MXS_HAVE_PLATFORM_AUART | 61 | select MXS_HAVE_PLATFORM_AUART |
60 | select MXS_HAVE_PLATFORM_FEC | 62 | select MXS_HAVE_PLATFORM_FEC |
61 | select MXS_HAVE_PLATFORM_MXS_I2C | 63 | select MXS_HAVE_PLATFORM_MXS_I2C |
64 | select MXS_HAVE_PLATFORM_MXS_MMC | ||
62 | select MXS_HAVE_PLATFORM_MXS_PWM | 65 | select MXS_HAVE_PLATFORM_MXS_PWM |
63 | 66 | ||
64 | config MACH_TX28 | 67 | config MACH_TX28 |
diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile index 58e892376bf2..6c38262a3aaa 100644 --- a/arch/arm/mach-mxs/Makefile +++ b/arch/arm/mach-mxs/Makefile | |||
@@ -1,5 +1,5 @@ | |||
1 | # Common support | 1 | # Common support |
2 | obj-y := clock.o devices.o gpio.o icoll.o iomux.o system.o timer.o | 2 | obj-y := clock.o devices.o icoll.o iomux.o system.o timer.o |
3 | 3 | ||
4 | obj-$(CONFIG_MXS_OCOTP) += ocotp.o | 4 | obj-$(CONFIG_MXS_OCOTP) += ocotp.o |
5 | obj-$(CONFIG_PM) += pm.o | 5 | obj-$(CONFIG_PM) += pm.o |
diff --git a/arch/arm/mach-mxs/devices.c b/arch/arm/mach-mxs/devices.c index cfdb6b284702..fe3e847930c9 100644 --- a/arch/arm/mach-mxs/devices.c +++ b/arch/arm/mach-mxs/devices.c | |||
@@ -88,3 +88,14 @@ int __init mxs_add_amba_device(const struct amba_device *dev) | |||
88 | 88 | ||
89 | return amba_device_register(adev, &iomem_resource); | 89 | return amba_device_register(adev, &iomem_resource); |
90 | } | 90 | } |
91 | |||
92 | struct device mxs_apbh_bus = { | ||
93 | .init_name = "mxs_apbh", | ||
94 | .parent = &platform_bus, | ||
95 | }; | ||
96 | |||
97 | static int __init mxs_device_init(void) | ||
98 | { | ||
99 | return device_register(&mxs_apbh_bus); | ||
100 | } | ||
101 | core_initcall(mxs_device_init); | ||
diff --git a/arch/arm/mach-mxs/devices/Makefile b/arch/arm/mach-mxs/devices/Makefile index 324f2824d38d..351915c683ff 100644 --- a/arch/arm/mach-mxs/devices/Makefile +++ b/arch/arm/mach-mxs/devices/Makefile | |||
@@ -6,4 +6,5 @@ obj-$(CONFIG_MXS_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o | |||
6 | obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_I2C) += platform-mxs-i2c.o | 6 | obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_I2C) += platform-mxs-i2c.o |
7 | obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_MMC) += platform-mxs-mmc.o | 7 | obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_MMC) += platform-mxs-mmc.o |
8 | obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_PWM) += platform-mxs-pwm.o | 8 | obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_PWM) += platform-mxs-pwm.o |
9 | obj-y += platform-gpio-mxs.o | ||
9 | obj-$(CONFIG_MXS_HAVE_PLATFORM_MXSFB) += platform-mxsfb.o | 10 | obj-$(CONFIG_MXS_HAVE_PLATFORM_MXSFB) += platform-mxsfb.o |
diff --git a/arch/arm/mach-mxs/devices/platform-gpio-mxs.c b/arch/arm/mach-mxs/devices/platform-gpio-mxs.c new file mode 100644 index 000000000000..ed0885e414e0 --- /dev/null +++ b/arch/arm/mach-mxs/devices/platform-gpio-mxs.c | |||
@@ -0,0 +1,53 @@ | |||
1 | /* | ||
2 | * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it under | ||
5 | * the terms of the GNU General Public License version 2 as published by the | ||
6 | * Free Software Foundation. | ||
7 | */ | ||
8 | #include <linux/compiler.h> | ||
9 | #include <linux/err.h> | ||
10 | #include <linux/init.h> | ||
11 | |||
12 | #include <mach/mx23.h> | ||
13 | #include <mach/mx28.h> | ||
14 | #include <mach/devices-common.h> | ||
15 | |||
16 | struct platform_device *__init mxs_add_gpio( | ||
17 | int id, resource_size_t iobase, int irq) | ||
18 | { | ||
19 | struct resource res[] = { | ||
20 | { | ||
21 | .start = iobase, | ||
22 | .end = iobase + SZ_8K - 1, | ||
23 | .flags = IORESOURCE_MEM, | ||
24 | }, { | ||
25 | .start = irq, | ||
26 | .end = irq, | ||
27 | .flags = IORESOURCE_IRQ, | ||
28 | }, | ||
29 | }; | ||
30 | |||
31 | return platform_device_register_resndata(&mxs_apbh_bus, | ||
32 | "gpio-mxs", id, res, ARRAY_SIZE(res), NULL, 0); | ||
33 | } | ||
34 | |||
35 | static int __init mxs_add_mxs_gpio(void) | ||
36 | { | ||
37 | if (cpu_is_mx23()) { | ||
38 | mxs_add_gpio(0, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO0); | ||
39 | mxs_add_gpio(1, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO1); | ||
40 | mxs_add_gpio(2, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO2); | ||
41 | } | ||
42 | |||
43 | if (cpu_is_mx28()) { | ||
44 | mxs_add_gpio(0, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO0); | ||
45 | mxs_add_gpio(1, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO1); | ||
46 | mxs_add_gpio(2, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO2); | ||
47 | mxs_add_gpio(3, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO3); | ||
48 | mxs_add_gpio(4, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO4); | ||
49 | } | ||
50 | |||
51 | return 0; | ||
52 | } | ||
53 | postcore_initcall(mxs_add_mxs_gpio); | ||
diff --git a/arch/arm/mach-mxs/devices/platform-mxsfb.c b/arch/arm/mach-mxs/devices/platform-mxsfb.c index bf72c9b8dbdd..5a75b7180f74 100644 --- a/arch/arm/mach-mxs/devices/platform-mxsfb.c +++ b/arch/arm/mach-mxs/devices/platform-mxsfb.c | |||
@@ -5,6 +5,7 @@ | |||
5 | * the terms of the GNU General Public License version 2 as published by the | 5 | * the terms of the GNU General Public License version 2 as published by the |
6 | * Free Software Foundation. | 6 | * Free Software Foundation. |
7 | */ | 7 | */ |
8 | #include <linux/dma-mapping.h> | ||
8 | #include <asm/sizes.h> | 9 | #include <asm/sizes.h> |
9 | #include <mach/mx23.h> | 10 | #include <mach/mx23.h> |
10 | #include <mach/mx28.h> | 11 | #include <mach/mx28.h> |
diff --git a/arch/arm/mach-mxs/gpio.c b/arch/arm/mach-mxs/gpio.c deleted file mode 100644 index 2c950fef71a8..000000000000 --- a/arch/arm/mach-mxs/gpio.c +++ /dev/null | |||
@@ -1,331 +0,0 @@ | |||
1 | /* | ||
2 | * MXC GPIO support. (c) 2008 Daniel Mack <daniel@caiaq.de> | ||
3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de | ||
4 | * | ||
5 | * Based on code from Freescale, | ||
6 | * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version 2 | ||
11 | * of the License, or (at your option) any later version. | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
20 | * MA 02110-1301, USA. | ||
21 | */ | ||
22 | |||
23 | #include <linux/init.h> | ||
24 | #include <linux/interrupt.h> | ||
25 | #include <linux/io.h> | ||
26 | #include <linux/irq.h> | ||
27 | #include <linux/gpio.h> | ||
28 | #include <mach/mx23.h> | ||
29 | #include <mach/mx28.h> | ||
30 | #include <asm-generic/bug.h> | ||
31 | |||
32 | #include "gpio.h" | ||
33 | |||
34 | static struct mxs_gpio_port *mxs_gpio_ports; | ||
35 | static int gpio_table_size; | ||
36 | |||
37 | #define PINCTRL_DOUT(n) ((cpu_is_mx23() ? 0x0500 : 0x0700) + (n) * 0x10) | ||
38 | #define PINCTRL_DIN(n) ((cpu_is_mx23() ? 0x0600 : 0x0900) + (n) * 0x10) | ||
39 | #define PINCTRL_DOE(n) ((cpu_is_mx23() ? 0x0700 : 0x0b00) + (n) * 0x10) | ||
40 | #define PINCTRL_PIN2IRQ(n) ((cpu_is_mx23() ? 0x0800 : 0x1000) + (n) * 0x10) | ||
41 | #define PINCTRL_IRQEN(n) ((cpu_is_mx23() ? 0x0900 : 0x1100) + (n) * 0x10) | ||
42 | #define PINCTRL_IRQLEV(n) ((cpu_is_mx23() ? 0x0a00 : 0x1200) + (n) * 0x10) | ||
43 | #define PINCTRL_IRQPOL(n) ((cpu_is_mx23() ? 0x0b00 : 0x1300) + (n) * 0x10) | ||
44 | #define PINCTRL_IRQSTAT(n) ((cpu_is_mx23() ? 0x0c00 : 0x1400) + (n) * 0x10) | ||
45 | |||
46 | #define GPIO_INT_FALL_EDGE 0x0 | ||
47 | #define GPIO_INT_LOW_LEV 0x1 | ||
48 | #define GPIO_INT_RISE_EDGE 0x2 | ||
49 | #define GPIO_INT_HIGH_LEV 0x3 | ||
50 | #define GPIO_INT_LEV_MASK (1 << 0) | ||
51 | #define GPIO_INT_POL_MASK (1 << 1) | ||
52 | |||
53 | /* Note: This driver assumes 32 GPIOs are handled in one register */ | ||
54 | |||
55 | static void clear_gpio_irqstatus(struct mxs_gpio_port *port, u32 index) | ||
56 | { | ||
57 | __mxs_clrl(1 << index, port->base + PINCTRL_IRQSTAT(port->id)); | ||
58 | } | ||
59 | |||
60 | static void set_gpio_irqenable(struct mxs_gpio_port *port, u32 index, | ||
61 | int enable) | ||
62 | { | ||
63 | if (enable) { | ||
64 | __mxs_setl(1 << index, port->base + PINCTRL_IRQEN(port->id)); | ||
65 | __mxs_setl(1 << index, port->base + PINCTRL_PIN2IRQ(port->id)); | ||
66 | } else { | ||
67 | __mxs_clrl(1 << index, port->base + PINCTRL_IRQEN(port->id)); | ||
68 | } | ||
69 | } | ||
70 | |||
71 | static void mxs_gpio_ack_irq(struct irq_data *d) | ||
72 | { | ||
73 | u32 gpio = irq_to_gpio(d->irq); | ||
74 | clear_gpio_irqstatus(&mxs_gpio_ports[gpio / 32], gpio & 0x1f); | ||
75 | } | ||
76 | |||
77 | static void mxs_gpio_mask_irq(struct irq_data *d) | ||
78 | { | ||
79 | u32 gpio = irq_to_gpio(d->irq); | ||
80 | set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 0); | ||
81 | } | ||
82 | |||
83 | static void mxs_gpio_unmask_irq(struct irq_data *d) | ||
84 | { | ||
85 | u32 gpio = irq_to_gpio(d->irq); | ||
86 | set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 1); | ||
87 | } | ||
88 | |||
89 | static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset); | ||
90 | |||
91 | static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type) | ||
92 | { | ||
93 | u32 gpio = irq_to_gpio(d->irq); | ||
94 | u32 pin_mask = 1 << (gpio & 31); | ||
95 | struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32]; | ||
96 | void __iomem *pin_addr; | ||
97 | int edge; | ||
98 | |||
99 | switch (type) { | ||
100 | case IRQ_TYPE_EDGE_RISING: | ||
101 | edge = GPIO_INT_RISE_EDGE; | ||
102 | break; | ||
103 | case IRQ_TYPE_EDGE_FALLING: | ||
104 | edge = GPIO_INT_FALL_EDGE; | ||
105 | break; | ||
106 | case IRQ_TYPE_LEVEL_LOW: | ||
107 | edge = GPIO_INT_LOW_LEV; | ||
108 | break; | ||
109 | case IRQ_TYPE_LEVEL_HIGH: | ||
110 | edge = GPIO_INT_HIGH_LEV; | ||
111 | break; | ||
112 | default: | ||
113 | return -EINVAL; | ||
114 | } | ||
115 | |||
116 | /* set level or edge */ | ||
117 | pin_addr = port->base + PINCTRL_IRQLEV(port->id); | ||
118 | if (edge & GPIO_INT_LEV_MASK) | ||
119 | __mxs_setl(pin_mask, pin_addr); | ||
120 | else | ||
121 | __mxs_clrl(pin_mask, pin_addr); | ||
122 | |||
123 | /* set polarity */ | ||
124 | pin_addr = port->base + PINCTRL_IRQPOL(port->id); | ||
125 | if (edge & GPIO_INT_POL_MASK) | ||
126 | __mxs_setl(pin_mask, pin_addr); | ||
127 | else | ||
128 | __mxs_clrl(pin_mask, pin_addr); | ||
129 | |||
130 | clear_gpio_irqstatus(port, gpio & 0x1f); | ||
131 | |||
132 | return 0; | ||
133 | } | ||
134 | |||
135 | /* MXS has one interrupt *per* gpio port */ | ||
136 | static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc) | ||
137 | { | ||
138 | u32 irq_stat; | ||
139 | struct mxs_gpio_port *port = (struct mxs_gpio_port *)irq_get_handler_data(irq); | ||
140 | u32 gpio_irq_no_base = port->virtual_irq_start; | ||
141 | |||
142 | desc->irq_data.chip->irq_ack(&desc->irq_data); | ||
143 | |||
144 | irq_stat = __raw_readl(port->base + PINCTRL_IRQSTAT(port->id)) & | ||
145 | __raw_readl(port->base + PINCTRL_IRQEN(port->id)); | ||
146 | |||
147 | while (irq_stat != 0) { | ||
148 | int irqoffset = fls(irq_stat) - 1; | ||
149 | generic_handle_irq(gpio_irq_no_base + irqoffset); | ||
150 | irq_stat &= ~(1 << irqoffset); | ||
151 | } | ||
152 | } | ||
153 | |||
154 | /* | ||
155 | * Set interrupt number "irq" in the GPIO as a wake-up source. | ||
156 | * While system is running, all registered GPIO interrupts need to have | ||
157 | * wake-up enabled. When system is suspended, only selected GPIO interrupts | ||
158 | * need to have wake-up enabled. | ||
159 | * @param irq interrupt source number | ||
160 | * @param enable enable as wake-up if equal to non-zero | ||
161 | * @return This function returns 0 on success. | ||
162 | */ | ||
163 | static int mxs_gpio_set_wake_irq(struct irq_data *d, unsigned int enable) | ||
164 | { | ||
165 | u32 gpio = irq_to_gpio(d->irq); | ||
166 | u32 gpio_idx = gpio & 0x1f; | ||
167 | struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32]; | ||
168 | |||
169 | if (enable) { | ||
170 | if (port->irq_high && (gpio_idx >= 16)) | ||
171 | enable_irq_wake(port->irq_high); | ||
172 | else | ||
173 | enable_irq_wake(port->irq); | ||
174 | } else { | ||
175 | if (port->irq_high && (gpio_idx >= 16)) | ||
176 | disable_irq_wake(port->irq_high); | ||
177 | else | ||
178 | disable_irq_wake(port->irq); | ||
179 | } | ||
180 | |||
181 | return 0; | ||
182 | } | ||
183 | |||
184 | static struct irq_chip gpio_irq_chip = { | ||
185 | .name = "mxs gpio", | ||
186 | .irq_ack = mxs_gpio_ack_irq, | ||
187 | .irq_mask = mxs_gpio_mask_irq, | ||
188 | .irq_unmask = mxs_gpio_unmask_irq, | ||
189 | .irq_set_type = mxs_gpio_set_irq_type, | ||
190 | .irq_set_wake = mxs_gpio_set_wake_irq, | ||
191 | }; | ||
192 | |||
193 | static void mxs_set_gpio_direction(struct gpio_chip *chip, unsigned offset, | ||
194 | int dir) | ||
195 | { | ||
196 | struct mxs_gpio_port *port = | ||
197 | container_of(chip, struct mxs_gpio_port, chip); | ||
198 | void __iomem *pin_addr = port->base + PINCTRL_DOE(port->id); | ||
199 | |||
200 | if (dir) | ||
201 | __mxs_setl(1 << offset, pin_addr); | ||
202 | else | ||
203 | __mxs_clrl(1 << offset, pin_addr); | ||
204 | } | ||
205 | |||
206 | static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset) | ||
207 | { | ||
208 | struct mxs_gpio_port *port = | ||
209 | container_of(chip, struct mxs_gpio_port, chip); | ||
210 | |||
211 | return (__raw_readl(port->base + PINCTRL_DIN(port->id)) >> offset) & 1; | ||
212 | } | ||
213 | |||
214 | static void mxs_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | ||
215 | { | ||
216 | struct mxs_gpio_port *port = | ||
217 | container_of(chip, struct mxs_gpio_port, chip); | ||
218 | void __iomem *pin_addr = port->base + PINCTRL_DOUT(port->id); | ||
219 | |||
220 | if (value) | ||
221 | __mxs_setl(1 << offset, pin_addr); | ||
222 | else | ||
223 | __mxs_clrl(1 << offset, pin_addr); | ||
224 | } | ||
225 | |||
226 | static int mxs_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | ||
227 | { | ||
228 | struct mxs_gpio_port *port = | ||
229 | container_of(chip, struct mxs_gpio_port, chip); | ||
230 | |||
231 | return port->virtual_irq_start + offset; | ||
232 | } | ||
233 | |||
234 | static int mxs_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | ||
235 | { | ||
236 | mxs_set_gpio_direction(chip, offset, 0); | ||
237 | return 0; | ||
238 | } | ||
239 | |||
240 | static int mxs_gpio_direction_output(struct gpio_chip *chip, | ||
241 | unsigned offset, int value) | ||
242 | { | ||
243 | mxs_gpio_set(chip, offset, value); | ||
244 | mxs_set_gpio_direction(chip, offset, 1); | ||
245 | return 0; | ||
246 | } | ||
247 | |||
248 | int __init mxs_gpio_init(struct mxs_gpio_port *port, int cnt) | ||
249 | { | ||
250 | int i, j; | ||
251 | |||
252 | /* save for local usage */ | ||
253 | mxs_gpio_ports = port; | ||
254 | gpio_table_size = cnt; | ||
255 | |||
256 | pr_info("MXS GPIO hardware\n"); | ||
257 | |||
258 | for (i = 0; i < cnt; i++) { | ||
259 | /* disable the interrupt and clear the status */ | ||
260 | __raw_writel(0, port[i].base + PINCTRL_PIN2IRQ(i)); | ||
261 | __raw_writel(0, port[i].base + PINCTRL_IRQEN(i)); | ||
262 | |||
263 | /* clear address has to be used to clear IRQSTAT bits */ | ||
264 | __mxs_clrl(~0U, port[i].base + PINCTRL_IRQSTAT(i)); | ||
265 | |||
266 | for (j = port[i].virtual_irq_start; | ||
267 | j < port[i].virtual_irq_start + 32; j++) { | ||
268 | irq_set_chip_and_handler(j, &gpio_irq_chip, | ||
269 | handle_level_irq); | ||
270 | set_irq_flags(j, IRQF_VALID); | ||
271 | } | ||
272 | |||
273 | /* setup one handler for each entry */ | ||
274 | irq_set_chained_handler(port[i].irq, mxs_gpio_irq_handler); | ||
275 | irq_set_handler_data(port[i].irq, &port[i]); | ||
276 | |||
277 | /* register gpio chip */ | ||
278 | port[i].chip.direction_input = mxs_gpio_direction_input; | ||
279 | port[i].chip.direction_output = mxs_gpio_direction_output; | ||
280 | port[i].chip.get = mxs_gpio_get; | ||
281 | port[i].chip.set = mxs_gpio_set; | ||
282 | port[i].chip.to_irq = mxs_gpio_to_irq; | ||
283 | port[i].chip.base = i * 32; | ||
284 | port[i].chip.ngpio = 32; | ||
285 | |||
286 | /* its a serious configuration bug when it fails */ | ||
287 | BUG_ON(gpiochip_add(&port[i].chip) < 0); | ||
288 | } | ||
289 | |||
290 | return 0; | ||
291 | } | ||
292 | |||
293 | #define MX23_GPIO_BASE MX23_IO_ADDRESS(MX23_PINCTRL_BASE_ADDR) | ||
294 | #define MX28_GPIO_BASE MX28_IO_ADDRESS(MX28_PINCTRL_BASE_ADDR) | ||
295 | |||
296 | #define DEFINE_MXS_GPIO_PORT(_base, _irq, _id) \ | ||
297 | { \ | ||
298 | .chip.label = "gpio-" #_id, \ | ||
299 | .id = _id, \ | ||
300 | .irq = _irq, \ | ||
301 | .base = _base, \ | ||
302 | .virtual_irq_start = MXS_GPIO_IRQ_START + (_id) * 32, \ | ||
303 | } | ||
304 | |||
305 | #ifdef CONFIG_SOC_IMX23 | ||
306 | static struct mxs_gpio_port mx23_gpio_ports[] = { | ||
307 | DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO0, 0), | ||
308 | DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO1, 1), | ||
309 | DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO2, 2), | ||
310 | }; | ||
311 | |||
312 | int __init mx23_register_gpios(void) | ||
313 | { | ||
314 | return mxs_gpio_init(mx23_gpio_ports, ARRAY_SIZE(mx23_gpio_ports)); | ||
315 | } | ||
316 | #endif | ||
317 | |||
318 | #ifdef CONFIG_SOC_IMX28 | ||
319 | static struct mxs_gpio_port mx28_gpio_ports[] = { | ||
320 | DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO0, 0), | ||
321 | DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO1, 1), | ||
322 | DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO2, 2), | ||
323 | DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO3, 3), | ||
324 | DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO4, 4), | ||
325 | }; | ||
326 | |||
327 | int __init mx28_register_gpios(void) | ||
328 | { | ||
329 | return mxs_gpio_init(mx28_gpio_ports, ARRAY_SIZE(mx28_gpio_ports)); | ||
330 | } | ||
331 | #endif | ||
diff --git a/arch/arm/mach-mxs/gpio.h b/arch/arm/mach-mxs/gpio.h deleted file mode 100644 index 005bb06630b1..000000000000 --- a/arch/arm/mach-mxs/gpio.h +++ /dev/null | |||
@@ -1,34 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License | ||
7 | * as published by the Free Software Foundation; either version 2 | ||
8 | * of the License, or (at your option) any later version. | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
17 | * MA 02110-1301, USA. | ||
18 | */ | ||
19 | |||
20 | #ifndef __MXS_GPIO_H__ | ||
21 | #define __MXS_GPIO_H__ | ||
22 | |||
23 | struct mxs_gpio_port { | ||
24 | void __iomem *base; | ||
25 | int id; | ||
26 | int irq; | ||
27 | int irq_high; | ||
28 | int virtual_irq_start; | ||
29 | struct gpio_chip chip; | ||
30 | }; | ||
31 | |||
32 | int mxs_gpio_init(struct mxs_gpio_port*, int); | ||
33 | |||
34 | #endif /* __MXS_GPIO_H__ */ | ||
diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h index 7a37469ed5bf..812d7a813a78 100644 --- a/arch/arm/mach-mxs/include/mach/devices-common.h +++ b/arch/arm/mach-mxs/include/mach/devices-common.h | |||
@@ -11,6 +11,8 @@ | |||
11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
12 | #include <linux/amba/bus.h> | 12 | #include <linux/amba/bus.h> |
13 | 13 | ||
14 | extern struct device mxs_apbh_bus; | ||
15 | |||
14 | struct platform_device *mxs_add_platform_device_dmamask( | 16 | struct platform_device *mxs_add_platform_device_dmamask( |
15 | const char *name, int id, | 17 | const char *name, int id, |
16 | const struct resource *res, unsigned int num_resources, | 18 | const struct resource *res, unsigned int num_resources, |
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c index eacdc6b0e70a..eaaf6ff28990 100644 --- a/arch/arm/mach-mxs/mach-mx28evk.c +++ b/arch/arm/mach-mxs/mach-mx28evk.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/delay.h> | 15 | #include <linux/delay.h> |
16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
17 | #include <linux/gpio.h> | 17 | #include <linux/gpio.h> |
18 | #include <linux/leds.h> | ||
18 | #include <linux/irq.h> | 19 | #include <linux/irq.h> |
19 | #include <linux/clk.h> | 20 | #include <linux/clk.h> |
20 | 21 | ||
@@ -26,10 +27,10 @@ | |||
26 | #include <mach/iomux-mx28.h> | 27 | #include <mach/iomux-mx28.h> |
27 | 28 | ||
28 | #include "devices-mx28.h" | 29 | #include "devices-mx28.h" |
29 | #include "gpio.h" | ||
30 | 30 | ||
31 | #define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13) | 31 | #define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13) |
32 | #define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15) | 32 | #define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15) |
33 | #define MX28EVK_GPIO_LED MXS_GPIO_NR(3, 5) | ||
33 | #define MX28EVK_BL_ENABLE MXS_GPIO_NR(3, 18) | 34 | #define MX28EVK_BL_ENABLE MXS_GPIO_NR(3, 18) |
34 | #define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30) | 35 | #define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30) |
35 | #define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13) | 36 | #define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13) |
@@ -179,6 +180,23 @@ static const iomux_cfg_t mx28evk_pads[] __initconst = { | |||
179 | /* slot power enable */ | 180 | /* slot power enable */ |
180 | MX28_PAD_PWM4__GPIO_3_29 | | 181 | MX28_PAD_PWM4__GPIO_3_29 | |
181 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | 182 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), |
183 | |||
184 | /* led */ | ||
185 | MX28_PAD_AUART1_TX__GPIO_3_5 | MXS_PAD_CTRL, | ||
186 | }; | ||
187 | |||
188 | /* led */ | ||
189 | static const struct gpio_led mx28evk_leds[] __initconst = { | ||
190 | { | ||
191 | .name = "GPIO-LED", | ||
192 | .default_trigger = "heartbeat", | ||
193 | .gpio = MX28EVK_GPIO_LED, | ||
194 | }, | ||
195 | }; | ||
196 | |||
197 | static const struct gpio_led_platform_data mx28evk_led_data __initconst = { | ||
198 | .leds = mx28evk_leds, | ||
199 | .num_leds = ARRAY_SIZE(mx28evk_leds), | ||
182 | }; | 200 | }; |
183 | 201 | ||
184 | /* fec */ | 202 | /* fec */ |
@@ -386,6 +404,8 @@ static void __init mx28evk_init(void) | |||
386 | if (ret) | 404 | if (ret) |
387 | pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret); | 405 | pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret); |
388 | mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); | 406 | mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); |
407 | |||
408 | gpio_led_register_device(0, &mx28evk_led_data); | ||
389 | } | 409 | } |
390 | 410 | ||
391 | static void __init mx28evk_timer_init(void) | 411 | static void __init mx28evk_timer_init(void) |
diff --git a/arch/arm/mach-mxs/mach-tx28.c b/arch/arm/mach-mxs/mach-tx28.c index b65e3719cbc4..515a423f82cd 100644 --- a/arch/arm/mach-mxs/mach-tx28.c +++ b/arch/arm/mach-mxs/mach-tx28.c | |||
@@ -101,14 +101,6 @@ static const iomux_cfg_t tx28_stk5v3_pads[] __initconst = { | |||
101 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | 101 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
102 | MX28_PAD_SSP0_DATA3__SSP0_D3 | | 102 | MX28_PAD_SSP0_DATA3__SSP0_D3 | |
103 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | 103 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
104 | MX28_PAD_SSP0_DATA4__SSP0_D4 | | ||
105 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | ||
106 | MX28_PAD_SSP0_DATA5__SSP0_D5 | | ||
107 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | ||
108 | MX28_PAD_SSP0_DATA6__SSP0_D6 | | ||
109 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | ||
110 | MX28_PAD_SSP0_DATA7__SSP0_D7 | | ||
111 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | ||
112 | MX28_PAD_SSP0_CMD__SSP0_CMD | | 104 | MX28_PAD_SSP0_CMD__SSP0_CMD | |
113 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | 105 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), |
114 | MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT | | 106 | MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT | |
@@ -117,7 +109,7 @@ static const iomux_cfg_t tx28_stk5v3_pads[] __initconst = { | |||
117 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | 109 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), |
118 | }; | 110 | }; |
119 | 111 | ||
120 | static struct gpio_led tx28_stk5v3_leds[] = { | 112 | static const struct gpio_led tx28_stk5v3_leds[] __initconst = { |
121 | { | 113 | { |
122 | .name = "GPIO-LED", | 114 | .name = "GPIO-LED", |
123 | .default_trigger = "heartbeat", | 115 | .default_trigger = "heartbeat", |
@@ -147,6 +139,11 @@ static struct i2c_board_info tx28_stk5v3_i2c_boardinfo[] __initdata = { | |||
147 | }, | 139 | }, |
148 | }; | 140 | }; |
149 | 141 | ||
142 | static struct mxs_mmc_platform_data tx28_mmc0_pdata __initdata = { | ||
143 | .wp_gpio = -EINVAL, | ||
144 | .flags = SLOTF_4_BIT_CAPABLE, | ||
145 | }; | ||
146 | |||
150 | static void __init tx28_stk5v3_init(void) | 147 | static void __init tx28_stk5v3_init(void) |
151 | { | 148 | { |
152 | mxs_iomux_setup_multiple_pads(tx28_stk5v3_pads, | 149 | mxs_iomux_setup_multiple_pads(tx28_stk5v3_pads, |
@@ -159,11 +156,11 @@ static void __init tx28_stk5v3_init(void) | |||
159 | /* spi via ssp will be added when available */ | 156 | /* spi via ssp will be added when available */ |
160 | spi_register_board_info(tx28_spi_board_info, | 157 | spi_register_board_info(tx28_spi_board_info, |
161 | ARRAY_SIZE(tx28_spi_board_info)); | 158 | ARRAY_SIZE(tx28_spi_board_info)); |
162 | mxs_add_platform_device("leds-gpio", 0, NULL, 0, | 159 | gpio_led_register_device(0, &tx28_stk5v3_led_data); |
163 | &tx28_stk5v3_led_data, sizeof(tx28_stk5v3_led_data)); | ||
164 | mx28_add_mxs_i2c(0); | 160 | mx28_add_mxs_i2c(0); |
165 | i2c_register_board_info(0, tx28_stk5v3_i2c_boardinfo, | 161 | i2c_register_board_info(0, tx28_stk5v3_i2c_boardinfo, |
166 | ARRAY_SIZE(tx28_stk5v3_i2c_boardinfo)); | 162 | ARRAY_SIZE(tx28_stk5v3_i2c_boardinfo)); |
163 | mx28_add_mxs_mmc(0, &tx28_mmc0_pdata); | ||
167 | } | 164 | } |
168 | 165 | ||
169 | static void __init tx28_timer_init(void) | 166 | static void __init tx28_timer_init(void) |
diff --git a/arch/arm/mach-mxs/mm-mx23.c b/arch/arm/mach-mxs/mm-mx23.c index 5148cd64a6b7..1b2345ac1a87 100644 --- a/arch/arm/mach-mxs/mm-mx23.c +++ b/arch/arm/mach-mxs/mm-mx23.c | |||
@@ -41,5 +41,4 @@ void __init mx23_map_io(void) | |||
41 | void __init mx23_init_irq(void) | 41 | void __init mx23_init_irq(void) |
42 | { | 42 | { |
43 | icoll_init_irq(); | 43 | icoll_init_irq(); |
44 | mx23_register_gpios(); | ||
45 | } | 44 | } |
diff --git a/arch/arm/mach-mxs/mm-mx28.c b/arch/arm/mach-mxs/mm-mx28.c index 7e4cea32ebc6..b6e18ddb92c0 100644 --- a/arch/arm/mach-mxs/mm-mx28.c +++ b/arch/arm/mach-mxs/mm-mx28.c | |||
@@ -41,5 +41,4 @@ void __init mx28_map_io(void) | |||
41 | void __init mx28_init_irq(void) | 41 | void __init mx28_init_irq(void) |
42 | { | 42 | { |
43 | icoll_init_irq(); | 43 | icoll_init_irq(); |
44 | mx28_register_gpios(); | ||
45 | } | 44 | } |
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index de88c9297b68..f49ce85d2448 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c | |||
@@ -215,7 +215,7 @@ static struct omap_kp_platform_data ams_delta_kp_data __initdata = { | |||
215 | .delay = 9, | 215 | .delay = 9, |
216 | }; | 216 | }; |
217 | 217 | ||
218 | static struct platform_device ams_delta_kp_device __initdata = { | 218 | static struct platform_device ams_delta_kp_device = { |
219 | .name = "omap-keypad", | 219 | .name = "omap-keypad", |
220 | .id = -1, | 220 | .id = -1, |
221 | .dev = { | 221 | .dev = { |
@@ -225,12 +225,12 @@ static struct platform_device ams_delta_kp_device __initdata = { | |||
225 | .resource = ams_delta_kp_resources, | 225 | .resource = ams_delta_kp_resources, |
226 | }; | 226 | }; |
227 | 227 | ||
228 | static struct platform_device ams_delta_lcd_device __initdata = { | 228 | static struct platform_device ams_delta_lcd_device = { |
229 | .name = "lcd_ams_delta", | 229 | .name = "lcd_ams_delta", |
230 | .id = -1, | 230 | .id = -1, |
231 | }; | 231 | }; |
232 | 232 | ||
233 | static struct platform_device ams_delta_led_device __initdata = { | 233 | static struct platform_device ams_delta_led_device = { |
234 | .name = "ams-delta-led", | 234 | .name = "ams-delta-led", |
235 | .id = -1 | 235 | .id = -1 |
236 | }; | 236 | }; |
@@ -267,7 +267,7 @@ static struct soc_camera_link ams_delta_iclink = { | |||
267 | .power = ams_delta_camera_power, | 267 | .power = ams_delta_camera_power, |
268 | }; | 268 | }; |
269 | 269 | ||
270 | static struct platform_device ams_delta_camera_device __initdata = { | 270 | static struct platform_device ams_delta_camera_device = { |
271 | .name = "soc-camera-pdrv", | 271 | .name = "soc-camera-pdrv", |
272 | .id = 0, | 272 | .id = 0, |
273 | .dev = { | 273 | .dev = { |
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c index 04c4b04cf54e..364137c2042c 100644 --- a/arch/arm/mach-omap1/gpio15xx.c +++ b/arch/arm/mach-omap1/gpio15xx.c | |||
@@ -41,7 +41,7 @@ static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = { | |||
41 | .bank_stride = 1, | 41 | .bank_stride = 1, |
42 | }; | 42 | }; |
43 | 43 | ||
44 | static struct __initdata platform_device omap15xx_mpu_gpio = { | 44 | static struct platform_device omap15xx_mpu_gpio = { |
45 | .name = "omap_gpio", | 45 | .name = "omap_gpio", |
46 | .id = 0, | 46 | .id = 0, |
47 | .dev = { | 47 | .dev = { |
@@ -70,7 +70,7 @@ static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = { | |||
70 | .bank_width = 16, | 70 | .bank_width = 16, |
71 | }; | 71 | }; |
72 | 72 | ||
73 | static struct __initdata platform_device omap15xx_gpio = { | 73 | static struct platform_device omap15xx_gpio = { |
74 | .name = "omap_gpio", | 74 | .name = "omap_gpio", |
75 | .id = 1, | 75 | .id = 1, |
76 | .dev = { | 76 | .dev = { |
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c index 5dd0d4c82b24..293a246e2824 100644 --- a/arch/arm/mach-omap1/gpio16xx.c +++ b/arch/arm/mach-omap1/gpio16xx.c | |||
@@ -44,7 +44,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = { | |||
44 | .bank_stride = 1, | 44 | .bank_stride = 1, |
45 | }; | 45 | }; |
46 | 46 | ||
47 | static struct __initdata platform_device omap16xx_mpu_gpio = { | 47 | static struct platform_device omap16xx_mpu_gpio = { |
48 | .name = "omap_gpio", | 48 | .name = "omap_gpio", |
49 | .id = 0, | 49 | .id = 0, |
50 | .dev = { | 50 | .dev = { |
@@ -73,7 +73,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = { | |||
73 | .bank_width = 16, | 73 | .bank_width = 16, |
74 | }; | 74 | }; |
75 | 75 | ||
76 | static struct __initdata platform_device omap16xx_gpio1 = { | 76 | static struct platform_device omap16xx_gpio1 = { |
77 | .name = "omap_gpio", | 77 | .name = "omap_gpio", |
78 | .id = 1, | 78 | .id = 1, |
79 | .dev = { | 79 | .dev = { |
@@ -102,7 +102,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = { | |||
102 | .bank_width = 16, | 102 | .bank_width = 16, |
103 | }; | 103 | }; |
104 | 104 | ||
105 | static struct __initdata platform_device omap16xx_gpio2 = { | 105 | static struct platform_device omap16xx_gpio2 = { |
106 | .name = "omap_gpio", | 106 | .name = "omap_gpio", |
107 | .id = 2, | 107 | .id = 2, |
108 | .dev = { | 108 | .dev = { |
@@ -131,7 +131,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = { | |||
131 | .bank_width = 16, | 131 | .bank_width = 16, |
132 | }; | 132 | }; |
133 | 133 | ||
134 | static struct __initdata platform_device omap16xx_gpio3 = { | 134 | static struct platform_device omap16xx_gpio3 = { |
135 | .name = "omap_gpio", | 135 | .name = "omap_gpio", |
136 | .id = 3, | 136 | .id = 3, |
137 | .dev = { | 137 | .dev = { |
@@ -160,7 +160,7 @@ static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = { | |||
160 | .bank_width = 16, | 160 | .bank_width = 16, |
161 | }; | 161 | }; |
162 | 162 | ||
163 | static struct __initdata platform_device omap16xx_gpio4 = { | 163 | static struct platform_device omap16xx_gpio4 = { |
164 | .name = "omap_gpio", | 164 | .name = "omap_gpio", |
165 | .id = 4, | 165 | .id = 4, |
166 | .dev = { | 166 | .dev = { |
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c index 1204c8b871af..c6ad248d63a6 100644 --- a/arch/arm/mach-omap1/gpio7xx.c +++ b/arch/arm/mach-omap1/gpio7xx.c | |||
@@ -46,7 +46,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = { | |||
46 | .bank_stride = 2, | 46 | .bank_stride = 2, |
47 | }; | 47 | }; |
48 | 48 | ||
49 | static struct __initdata platform_device omap7xx_mpu_gpio = { | 49 | static struct platform_device omap7xx_mpu_gpio = { |
50 | .name = "omap_gpio", | 50 | .name = "omap_gpio", |
51 | .id = 0, | 51 | .id = 0, |
52 | .dev = { | 52 | .dev = { |
@@ -75,7 +75,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = { | |||
75 | .bank_width = 32, | 75 | .bank_width = 32, |
76 | }; | 76 | }; |
77 | 77 | ||
78 | static struct __initdata platform_device omap7xx_gpio1 = { | 78 | static struct platform_device omap7xx_gpio1 = { |
79 | .name = "omap_gpio", | 79 | .name = "omap_gpio", |
80 | .id = 1, | 80 | .id = 1, |
81 | .dev = { | 81 | .dev = { |
@@ -104,7 +104,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio2_config = { | |||
104 | .bank_width = 32, | 104 | .bank_width = 32, |
105 | }; | 105 | }; |
106 | 106 | ||
107 | static struct __initdata platform_device omap7xx_gpio2 = { | 107 | static struct platform_device omap7xx_gpio2 = { |
108 | .name = "omap_gpio", | 108 | .name = "omap_gpio", |
109 | .id = 2, | 109 | .id = 2, |
110 | .dev = { | 110 | .dev = { |
@@ -133,7 +133,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio3_config = { | |||
133 | .bank_width = 32, | 133 | .bank_width = 32, |
134 | }; | 134 | }; |
135 | 135 | ||
136 | static struct __initdata platform_device omap7xx_gpio3 = { | 136 | static struct platform_device omap7xx_gpio3 = { |
137 | .name = "omap_gpio", | 137 | .name = "omap_gpio", |
138 | .id = 3, | 138 | .id = 3, |
139 | .dev = { | 139 | .dev = { |
@@ -162,7 +162,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio4_config = { | |||
162 | .bank_width = 32, | 162 | .bank_width = 32, |
163 | }; | 163 | }; |
164 | 164 | ||
165 | static struct __initdata platform_device omap7xx_gpio4 = { | 165 | static struct platform_device omap7xx_gpio4 = { |
166 | .name = "omap_gpio", | 166 | .name = "omap_gpio", |
167 | .id = 4, | 167 | .id = 4, |
168 | .dev = { | 168 | .dev = { |
@@ -191,7 +191,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio5_config = { | |||
191 | .bank_width = 32, | 191 | .bank_width = 32, |
192 | }; | 192 | }; |
193 | 193 | ||
194 | static struct __initdata platform_device omap7xx_gpio5 = { | 194 | static struct platform_device omap7xx_gpio5 = { |
195 | .name = "omap_gpio", | 195 | .name = "omap_gpio", |
196 | .id = 5, | 196 | .id = 5, |
197 | .dev = { | 197 | .dev = { |
@@ -220,7 +220,7 @@ static struct __initdata omap_gpio_platform_data omap7xx_gpio6_config = { | |||
220 | .bank_width = 32, | 220 | .bank_width = 32, |
221 | }; | 221 | }; |
222 | 222 | ||
223 | static struct __initdata platform_device omap7xx_gpio6 = { | 223 | static struct platform_device omap7xx_gpio6 = { |
224 | .name = "omap_gpio", | 224 | .name = "omap_gpio", |
225 | .id = 6, | 225 | .id = 6, |
226 | .dev = { | 226 | .dev = { |
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 990366726c58..88bd6f7705f0 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c | |||
@@ -558,7 +558,7 @@ static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module = | |||
558 | .subdev_board_info = &rx51_si4713_board_info, | 558 | .subdev_board_info = &rx51_si4713_board_info, |
559 | }; | 559 | }; |
560 | 560 | ||
561 | static struct platform_device rx51_si4713_dev __initdata_or_module = { | 561 | static struct platform_device rx51_si4713_dev = { |
562 | .name = "radio-si4713", | 562 | .name = "radio-si4713", |
563 | .id = -1, | 563 | .id = -1, |
564 | .dev = { | 564 | .dev = { |
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index 810a982a66f8..ef3e8b1e06c1 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c | |||
@@ -825,6 +825,7 @@ MACHINE_START(BALLOON3, "Balloon3") | |||
825 | .map_io = balloon3_map_io, | 825 | .map_io = balloon3_map_io, |
826 | .nr_irqs = BALLOON3_NR_IRQS, | 826 | .nr_irqs = BALLOON3_NR_IRQS, |
827 | .init_irq = balloon3_init_irq, | 827 | .init_irq = balloon3_init_irq, |
828 | .handle_irq = pxa27x_handle_irq, | ||
828 | .timer = &pxa_timer, | 829 | .timer = &pxa_timer, |
829 | .init_machine = balloon3_init, | 830 | .init_machine = balloon3_init, |
830 | .boot_params = PLAT_PHYS_OFFSET + 0x100, | 831 | .boot_params = PLAT_PHYS_OFFSET + 0x100, |
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c index 4284513f396a..648b0ab2bf77 100644 --- a/arch/arm/mach-pxa/capc7117.c +++ b/arch/arm/mach-pxa/capc7117.c | |||
@@ -151,6 +151,7 @@ MACHINE_START(CAPC7117, | |||
151 | .boot_params = 0xa0000100, | 151 | .boot_params = 0xa0000100, |
152 | .map_io = pxa3xx_map_io, | 152 | .map_io = pxa3xx_map_io, |
153 | .init_irq = pxa3xx_init_irq, | 153 | .init_irq = pxa3xx_init_irq, |
154 | .handle_irq = pxa3xx_handle_irq, | ||
154 | .timer = &pxa_timer, | 155 | .timer = &pxa_timer, |
155 | .init_machine = capc7117_init | 156 | .init_machine = capc7117_init |
156 | MACHINE_END | 157 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c index d5152220ce94..4d466102a027 100644 --- a/arch/arm/mach-pxa/clock.c +++ b/arch/arm/mach-pxa/clock.c | |||
@@ -53,6 +53,21 @@ unsigned long clk_get_rate(struct clk *clk) | |||
53 | } | 53 | } |
54 | EXPORT_SYMBOL(clk_get_rate); | 54 | EXPORT_SYMBOL(clk_get_rate); |
55 | 55 | ||
56 | int clk_set_rate(struct clk *clk, unsigned long rate) | ||
57 | { | ||
58 | unsigned long flags; | ||
59 | int ret = -EINVAL; | ||
60 | |||
61 | if (clk->ops->setrate) { | ||
62 | spin_lock_irqsave(&clocks_lock, flags); | ||
63 | ret = clk->ops->setrate(clk, rate); | ||
64 | spin_unlock_irqrestore(&clocks_lock, flags); | ||
65 | } | ||
66 | |||
67 | return ret; | ||
68 | } | ||
69 | EXPORT_SYMBOL(clk_set_rate); | ||
70 | |||
56 | void clk_dummy_enable(struct clk *clk) | 71 | void clk_dummy_enable(struct clk *clk) |
57 | { | 72 | { |
58 | } | 73 | } |
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h index 1f2fb9c43f06..3a258b1bf1aa 100644 --- a/arch/arm/mach-pxa/clock.h +++ b/arch/arm/mach-pxa/clock.h | |||
@@ -5,6 +5,7 @@ struct clkops { | |||
5 | void (*enable)(struct clk *); | 5 | void (*enable)(struct clk *); |
6 | void (*disable)(struct clk *); | 6 | void (*disable)(struct clk *); |
7 | unsigned long (*getrate)(struct clk *); | 7 | unsigned long (*getrate)(struct clk *); |
8 | int (*setrate)(struct clk *, unsigned long); | ||
8 | }; | 9 | }; |
9 | 10 | ||
10 | struct clk { | 11 | struct clk { |
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c index a10996782476..1719927c24d6 100644 --- a/arch/arm/mach-pxa/cm-x2xx.c +++ b/arch/arm/mach-pxa/cm-x2xx.c | |||
@@ -21,7 +21,8 @@ | |||
21 | #include <asm/mach-types.h> | 21 | #include <asm/mach-types.h> |
22 | #include <asm/mach/map.h> | 22 | #include <asm/mach/map.h> |
23 | 23 | ||
24 | #include <mach/pxa2xx-regs.h> | 24 | #include <mach/pxa25x.h> |
25 | #include <mach/pxa27x.h> | ||
25 | #include <mach/audio.h> | 26 | #include <mach/audio.h> |
26 | #include <mach/pxafb.h> | 27 | #include <mach/pxafb.h> |
27 | #include <mach/smemc.h> | 28 | #include <mach/smemc.h> |
@@ -516,6 +517,8 @@ MACHINE_START(ARMCORE, "Compulab CM-X2XX") | |||
516 | .map_io = cmx2xx_map_io, | 517 | .map_io = cmx2xx_map_io, |
517 | .nr_irqs = CMX2XX_NR_IRQS, | 518 | .nr_irqs = CMX2XX_NR_IRQS, |
518 | .init_irq = cmx2xx_init_irq, | 519 | .init_irq = cmx2xx_init_irq, |
520 | /* NOTE: pxa25x_handle_irq() works on PXA27x w/o camera support */ | ||
521 | .handle_irq = pxa25x_handle_irq, | ||
519 | .timer = &pxa_timer, | 522 | .timer = &pxa_timer, |
520 | .init_machine = cmx2xx_init, | 523 | .init_machine = cmx2xx_init, |
521 | MACHINE_END | 524 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index b2248e76ec8b..de577c7e3ace 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c | |||
@@ -859,6 +859,7 @@ MACHINE_START(CM_X300, "CM-X300 module") | |||
859 | .boot_params = 0xa0000100, | 859 | .boot_params = 0xa0000100, |
860 | .map_io = pxa3xx_map_io, | 860 | .map_io = pxa3xx_map_io, |
861 | .init_irq = pxa3xx_init_irq, | 861 | .init_irq = pxa3xx_init_irq, |
862 | .handle_irq = pxa3xx_handle_irq, | ||
862 | .timer = &pxa_timer, | 863 | .timer = &pxa_timer, |
863 | .init_machine = cm_x300_init, | 864 | .init_machine = cm_x300_init, |
864 | .fixup = cm_x300_fixup, | 865 | .fixup = cm_x300_fixup, |
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c index 7545a48ed88b..870920934ecf 100644 --- a/arch/arm/mach-pxa/colibri-pxa270.c +++ b/arch/arm/mach-pxa/colibri-pxa270.c | |||
@@ -310,6 +310,7 @@ MACHINE_START(COLIBRI, "Toradex Colibri PXA270") | |||
310 | .init_machine = colibri_pxa270_init, | 310 | .init_machine = colibri_pxa270_init, |
311 | .map_io = pxa27x_map_io, | 311 | .map_io = pxa27x_map_io, |
312 | .init_irq = pxa27x_init_irq, | 312 | .init_irq = pxa27x_init_irq, |
313 | .handle_irq = pxa27x_handle_irq, | ||
313 | .timer = &pxa_timer, | 314 | .timer = &pxa_timer, |
314 | MACHINE_END | 315 | MACHINE_END |
315 | 316 | ||
@@ -318,6 +319,7 @@ MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC") | |||
318 | .init_machine = colibri_pxa270_income_init, | 319 | .init_machine = colibri_pxa270_income_init, |
319 | .map_io = pxa27x_map_io, | 320 | .map_io = pxa27x_map_io, |
320 | .init_irq = pxa27x_init_irq, | 321 | .init_irq = pxa27x_init_irq, |
322 | .handle_irq = pxa27x_handle_irq, | ||
321 | .timer = &pxa_timer, | 323 | .timer = &pxa_timer, |
322 | MACHINE_END | 324 | MACHINE_END |
323 | 325 | ||
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c index 66dd81cbc8a0..60a6781e7a8e 100644 --- a/arch/arm/mach-pxa/colibri-pxa300.c +++ b/arch/arm/mach-pxa/colibri-pxa300.c | |||
@@ -187,6 +187,7 @@ MACHINE_START(COLIBRI300, "Toradex Colibri PXA300") | |||
187 | .init_machine = colibri_pxa300_init, | 187 | .init_machine = colibri_pxa300_init, |
188 | .map_io = pxa3xx_map_io, | 188 | .map_io = pxa3xx_map_io, |
189 | .init_irq = pxa3xx_init_irq, | 189 | .init_irq = pxa3xx_init_irq, |
190 | .handle_irq = pxa3xx_handle_irq, | ||
190 | .timer = &pxa_timer, | 191 | .timer = &pxa_timer, |
191 | MACHINE_END | 192 | MACHINE_END |
192 | 193 | ||
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c index ff9ff5f4fc47..d2c6631915d4 100644 --- a/arch/arm/mach-pxa/colibri-pxa320.c +++ b/arch/arm/mach-pxa/colibri-pxa320.c | |||
@@ -23,8 +23,7 @@ | |||
23 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
24 | #include <asm/mach/irq.h> | 24 | #include <asm/mach/irq.h> |
25 | 25 | ||
26 | #include <mach/pxa3xx-regs.h> | 26 | #include <mach/pxa320.h> |
27 | #include <mach/mfp-pxa320.h> | ||
28 | #include <mach/colibri.h> | 27 | #include <mach/colibri.h> |
29 | #include <mach/pxafb.h> | 28 | #include <mach/pxafb.h> |
30 | #include <mach/ohci.h> | 29 | #include <mach/ohci.h> |
@@ -258,6 +257,7 @@ MACHINE_START(COLIBRI320, "Toradex Colibri PXA320") | |||
258 | .init_machine = colibri_pxa320_init, | 257 | .init_machine = colibri_pxa320_init, |
259 | .map_io = pxa3xx_map_io, | 258 | .map_io = pxa3xx_map_io, |
260 | .init_irq = pxa3xx_init_irq, | 259 | .init_irq = pxa3xx_init_irq, |
260 | .handle_irq = pxa3xx_handle_irq, | ||
261 | .timer = &pxa_timer, | 261 | .timer = &pxa_timer, |
262 | MACHINE_END | 262 | MACHINE_END |
263 | 263 | ||
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 3a5507e31919..185a37cad254 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c | |||
@@ -722,6 +722,7 @@ MACHINE_START(CORGI, "SHARP Corgi") | |||
722 | .fixup = fixup_corgi, | 722 | .fixup = fixup_corgi, |
723 | .map_io = pxa25x_map_io, | 723 | .map_io = pxa25x_map_io, |
724 | .init_irq = pxa25x_init_irq, | 724 | .init_irq = pxa25x_init_irq, |
725 | .handle_irq = pxa25x_handle_irq, | ||
725 | .init_machine = corgi_init, | 726 | .init_machine = corgi_init, |
726 | .timer = &pxa_timer, | 727 | .timer = &pxa_timer, |
727 | MACHINE_END | 728 | MACHINE_END |
@@ -732,6 +733,7 @@ MACHINE_START(SHEPHERD, "SHARP Shepherd") | |||
732 | .fixup = fixup_corgi, | 733 | .fixup = fixup_corgi, |
733 | .map_io = pxa25x_map_io, | 734 | .map_io = pxa25x_map_io, |
734 | .init_irq = pxa25x_init_irq, | 735 | .init_irq = pxa25x_init_irq, |
736 | .handle_irq = pxa25x_handle_irq, | ||
735 | .init_machine = corgi_init, | 737 | .init_machine = corgi_init, |
736 | .timer = &pxa_timer, | 738 | .timer = &pxa_timer, |
737 | MACHINE_END | 739 | MACHINE_END |
@@ -742,6 +744,7 @@ MACHINE_START(HUSKY, "SHARP Husky") | |||
742 | .fixup = fixup_corgi, | 744 | .fixup = fixup_corgi, |
743 | .map_io = pxa25x_map_io, | 745 | .map_io = pxa25x_map_io, |
744 | .init_irq = pxa25x_init_irq, | 746 | .init_irq = pxa25x_init_irq, |
747 | .handle_irq = pxa25x_handle_irq, | ||
745 | .init_machine = corgi_init, | 748 | .init_machine = corgi_init, |
746 | .timer = &pxa_timer, | 749 | .timer = &pxa_timer, |
747 | MACHINE_END | 750 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c index 0481c29a70e8..fe812eafb1f1 100644 --- a/arch/arm/mach-pxa/csb726.c +++ b/arch/arm/mach-pxa/csb726.c | |||
@@ -22,10 +22,9 @@ | |||
22 | #include <asm/mach-types.h> | 22 | #include <asm/mach-types.h> |
23 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
24 | #include <mach/csb726.h> | 24 | #include <mach/csb726.h> |
25 | #include <mach/mfp-pxa27x.h> | 25 | #include <mach/pxa27x.h> |
26 | #include <mach/mmc.h> | 26 | #include <mach/mmc.h> |
27 | #include <mach/ohci.h> | 27 | #include <mach/ohci.h> |
28 | #include <mach/pxa2xx-regs.h> | ||
29 | #include <mach/audio.h> | 28 | #include <mach/audio.h> |
30 | #include <mach/smemc.h> | 29 | #include <mach/smemc.h> |
31 | 30 | ||
@@ -276,6 +275,7 @@ MACHINE_START(CSB726, "Cogent CSB726") | |||
276 | .boot_params = 0xa0000100, | 275 | .boot_params = 0xa0000100, |
277 | .map_io = pxa27x_map_io, | 276 | .map_io = pxa27x_map_io, |
278 | .init_irq = pxa27x_init_irq, | 277 | .init_irq = pxa27x_init_irq, |
278 | .handle_irq = pxa27x_handle_irq, | ||
279 | .init_machine = csb726_init, | 279 | .init_machine = csb726_init, |
280 | .timer = &pxa_timer, | 280 | .timer = &pxa_timer, |
281 | MACHINE_END | 281 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c index f8a6e9d79a3a..2e37ea52b372 100644 --- a/arch/arm/mach-pxa/em-x270.c +++ b/arch/arm/mach-pxa/em-x270.c | |||
@@ -1302,6 +1302,7 @@ MACHINE_START(EM_X270, "Compulab EM-X270") | |||
1302 | .boot_params = 0xa0000100, | 1302 | .boot_params = 0xa0000100, |
1303 | .map_io = pxa27x_map_io, | 1303 | .map_io = pxa27x_map_io, |
1304 | .init_irq = pxa27x_init_irq, | 1304 | .init_irq = pxa27x_init_irq, |
1305 | .handle_irq = pxa27x_handle_irq, | ||
1305 | .timer = &pxa_timer, | 1306 | .timer = &pxa_timer, |
1306 | .init_machine = em_x270_init, | 1307 | .init_machine = em_x270_init, |
1307 | MACHINE_END | 1308 | MACHINE_END |
@@ -1310,6 +1311,7 @@ MACHINE_START(EXEDA, "Compulab eXeda") | |||
1310 | .boot_params = 0xa0000100, | 1311 | .boot_params = 0xa0000100, |
1311 | .map_io = pxa27x_map_io, | 1312 | .map_io = pxa27x_map_io, |
1312 | .init_irq = pxa27x_init_irq, | 1313 | .init_irq = pxa27x_init_irq, |
1314 | .handle_irq = pxa27x_handle_irq, | ||
1313 | .timer = &pxa_timer, | 1315 | .timer = &pxa_timer, |
1314 | .init_machine = em_x270_init, | 1316 | .init_machine = em_x270_init, |
1315 | MACHINE_END | 1317 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c index 2e3970fdde0b..b4599ec9d619 100644 --- a/arch/arm/mach-pxa/eseries.c +++ b/arch/arm/mach-pxa/eseries.c | |||
@@ -193,6 +193,7 @@ MACHINE_START(E330, "Toshiba e330") | |||
193 | .map_io = pxa25x_map_io, | 193 | .map_io = pxa25x_map_io, |
194 | .nr_irqs = ESERIES_NR_IRQS, | 194 | .nr_irqs = ESERIES_NR_IRQS, |
195 | .init_irq = pxa25x_init_irq, | 195 | .init_irq = pxa25x_init_irq, |
196 | .handle_irq = pxa25x_handle_irq, | ||
196 | .fixup = eseries_fixup, | 197 | .fixup = eseries_fixup, |
197 | .init_machine = e330_init, | 198 | .init_machine = e330_init, |
198 | .timer = &pxa_timer, | 199 | .timer = &pxa_timer, |
@@ -242,6 +243,7 @@ MACHINE_START(E350, "Toshiba e350") | |||
242 | .map_io = pxa25x_map_io, | 243 | .map_io = pxa25x_map_io, |
243 | .nr_irqs = ESERIES_NR_IRQS, | 244 | .nr_irqs = ESERIES_NR_IRQS, |
244 | .init_irq = pxa25x_init_irq, | 245 | .init_irq = pxa25x_init_irq, |
246 | .handle_irq = pxa25x_handle_irq, | ||
245 | .fixup = eseries_fixup, | 247 | .fixup = eseries_fixup, |
246 | .init_machine = e350_init, | 248 | .init_machine = e350_init, |
247 | .timer = &pxa_timer, | 249 | .timer = &pxa_timer, |
@@ -364,6 +366,7 @@ MACHINE_START(E400, "Toshiba e400") | |||
364 | .map_io = pxa25x_map_io, | 366 | .map_io = pxa25x_map_io, |
365 | .nr_irqs = ESERIES_NR_IRQS, | 367 | .nr_irqs = ESERIES_NR_IRQS, |
366 | .init_irq = pxa25x_init_irq, | 368 | .init_irq = pxa25x_init_irq, |
369 | .handle_irq = pxa25x_handle_irq, | ||
367 | .fixup = eseries_fixup, | 370 | .fixup = eseries_fixup, |
368 | .init_machine = e400_init, | 371 | .init_machine = e400_init, |
369 | .timer = &pxa_timer, | 372 | .timer = &pxa_timer, |
@@ -552,6 +555,7 @@ MACHINE_START(E740, "Toshiba e740") | |||
552 | .map_io = pxa25x_map_io, | 555 | .map_io = pxa25x_map_io, |
553 | .nr_irqs = ESERIES_NR_IRQS, | 556 | .nr_irqs = ESERIES_NR_IRQS, |
554 | .init_irq = pxa25x_init_irq, | 557 | .init_irq = pxa25x_init_irq, |
558 | .handle_irq = pxa25x_handle_irq, | ||
555 | .fixup = eseries_fixup, | 559 | .fixup = eseries_fixup, |
556 | .init_machine = e740_init, | 560 | .init_machine = e740_init, |
557 | .timer = &pxa_timer, | 561 | .timer = &pxa_timer, |
@@ -743,6 +747,7 @@ MACHINE_START(E750, "Toshiba e750") | |||
743 | .map_io = pxa25x_map_io, | 747 | .map_io = pxa25x_map_io, |
744 | .nr_irqs = ESERIES_NR_IRQS, | 748 | .nr_irqs = ESERIES_NR_IRQS, |
745 | .init_irq = pxa25x_init_irq, | 749 | .init_irq = pxa25x_init_irq, |
750 | .handle_irq = pxa25x_handle_irq, | ||
746 | .fixup = eseries_fixup, | 751 | .fixup = eseries_fixup, |
747 | .init_machine = e750_init, | 752 | .init_machine = e750_init, |
748 | .timer = &pxa_timer, | 753 | .timer = &pxa_timer, |
@@ -947,6 +952,7 @@ MACHINE_START(E800, "Toshiba e800") | |||
947 | .map_io = pxa25x_map_io, | 952 | .map_io = pxa25x_map_io, |
948 | .nr_irqs = ESERIES_NR_IRQS, | 953 | .nr_irqs = ESERIES_NR_IRQS, |
949 | .init_irq = pxa25x_init_irq, | 954 | .init_irq = pxa25x_init_irq, |
955 | .handle_irq = pxa25x_handle_irq, | ||
950 | .fixup = eseries_fixup, | 956 | .fixup = eseries_fixup, |
951 | .init_machine = e800_init, | 957 | .init_machine = e800_init, |
952 | .timer = &pxa_timer, | 958 | .timer = &pxa_timer, |
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c index d88aed8fbe15..b73eadb9f5dc 100644 --- a/arch/arm/mach-pxa/ezx.c +++ b/arch/arm/mach-pxa/ezx.c | |||
@@ -801,6 +801,7 @@ MACHINE_START(EZX_A780, "Motorola EZX A780") | |||
801 | .map_io = pxa27x_map_io, | 801 | .map_io = pxa27x_map_io, |
802 | .nr_irqs = EZX_NR_IRQS, | 802 | .nr_irqs = EZX_NR_IRQS, |
803 | .init_irq = pxa27x_init_irq, | 803 | .init_irq = pxa27x_init_irq, |
804 | .handle_irq = pxa27x_handle_irq, | ||
804 | .timer = &pxa_timer, | 805 | .timer = &pxa_timer, |
805 | .init_machine = a780_init, | 806 | .init_machine = a780_init, |
806 | MACHINE_END | 807 | MACHINE_END |
@@ -866,6 +867,7 @@ MACHINE_START(EZX_E680, "Motorola EZX E680") | |||
866 | .map_io = pxa27x_map_io, | 867 | .map_io = pxa27x_map_io, |
867 | .nr_irqs = EZX_NR_IRQS, | 868 | .nr_irqs = EZX_NR_IRQS, |
868 | .init_irq = pxa27x_init_irq, | 869 | .init_irq = pxa27x_init_irq, |
870 | .handle_irq = pxa27x_handle_irq, | ||
869 | .timer = &pxa_timer, | 871 | .timer = &pxa_timer, |
870 | .init_machine = e680_init, | 872 | .init_machine = e680_init, |
871 | MACHINE_END | 873 | MACHINE_END |
@@ -931,6 +933,7 @@ MACHINE_START(EZX_A1200, "Motorola EZX A1200") | |||
931 | .map_io = pxa27x_map_io, | 933 | .map_io = pxa27x_map_io, |
932 | .nr_irqs = EZX_NR_IRQS, | 934 | .nr_irqs = EZX_NR_IRQS, |
933 | .init_irq = pxa27x_init_irq, | 935 | .init_irq = pxa27x_init_irq, |
936 | .handle_irq = pxa27x_handle_irq, | ||
934 | .timer = &pxa_timer, | 937 | .timer = &pxa_timer, |
935 | .init_machine = a1200_init, | 938 | .init_machine = a1200_init, |
936 | MACHINE_END | 939 | MACHINE_END |
@@ -1121,6 +1124,7 @@ MACHINE_START(EZX_A910, "Motorola EZX A910") | |||
1121 | .map_io = pxa27x_map_io, | 1124 | .map_io = pxa27x_map_io, |
1122 | .nr_irqs = EZX_NR_IRQS, | 1125 | .nr_irqs = EZX_NR_IRQS, |
1123 | .init_irq = pxa27x_init_irq, | 1126 | .init_irq = pxa27x_init_irq, |
1127 | .handle_irq = pxa27x_handle_irq, | ||
1124 | .timer = &pxa_timer, | 1128 | .timer = &pxa_timer, |
1125 | .init_machine = a910_init, | 1129 | .init_machine = a910_init, |
1126 | MACHINE_END | 1130 | MACHINE_END |
@@ -1186,6 +1190,7 @@ MACHINE_START(EZX_E6, "Motorola EZX E6") | |||
1186 | .map_io = pxa27x_map_io, | 1190 | .map_io = pxa27x_map_io, |
1187 | .nr_irqs = EZX_NR_IRQS, | 1191 | .nr_irqs = EZX_NR_IRQS, |
1188 | .init_irq = pxa27x_init_irq, | 1192 | .init_irq = pxa27x_init_irq, |
1193 | .handle_irq = pxa27x_handle_irq, | ||
1189 | .timer = &pxa_timer, | 1194 | .timer = &pxa_timer, |
1190 | .init_machine = e6_init, | 1195 | .init_machine = e6_init, |
1191 | MACHINE_END | 1196 | MACHINE_END |
@@ -1225,6 +1230,7 @@ MACHINE_START(EZX_E2, "Motorola EZX E2") | |||
1225 | .map_io = pxa27x_map_io, | 1230 | .map_io = pxa27x_map_io, |
1226 | .nr_irqs = EZX_NR_IRQS, | 1231 | .nr_irqs = EZX_NR_IRQS, |
1227 | .init_irq = pxa27x_init_irq, | 1232 | .init_irq = pxa27x_init_irq, |
1233 | .handle_irq = pxa27x_handle_irq, | ||
1228 | .timer = &pxa_timer, | 1234 | .timer = &pxa_timer, |
1229 | .init_machine = e2_init, | 1235 | .init_machine = e2_init, |
1230 | MACHINE_END | 1236 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h index e6c9344a95ae..92a2e85ab02c 100644 --- a/arch/arm/mach-pxa/generic.h +++ b/arch/arm/mach-pxa/generic.h | |||
@@ -13,21 +13,8 @@ struct irq_data; | |||
13 | struct sys_timer; | 13 | struct sys_timer; |
14 | 14 | ||
15 | extern struct sys_timer pxa_timer; | 15 | extern struct sys_timer pxa_timer; |
16 | extern void __init pxa_init_irq(int irq_nr, | ||
17 | int (*set_wake)(struct irq_data *, | ||
18 | unsigned int)); | ||
19 | extern void __init pxa25x_init_irq(void); | ||
20 | #ifdef CONFIG_CPU_PXA26x | ||
21 | extern void __init pxa26x_init_irq(void); | ||
22 | #endif | ||
23 | extern void __init pxa27x_init_irq(void); | ||
24 | extern void __init pxa3xx_init_irq(void); | ||
25 | extern void __init pxa95x_init_irq(void); | ||
26 | 16 | ||
27 | extern void __init pxa_map_io(void); | 17 | extern void __init pxa_map_io(void); |
28 | extern void __init pxa25x_map_io(void); | ||
29 | extern void __init pxa27x_map_io(void); | ||
30 | extern void __init pxa3xx_map_io(void); | ||
31 | 18 | ||
32 | extern unsigned int get_clk_frequency_khz(int info); | 19 | extern unsigned int get_clk_frequency_khz(int info); |
33 | 20 | ||
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c index d65e4bde9b91..deaa111c91f9 100644 --- a/arch/arm/mach-pxa/gumstix.c +++ b/arch/arm/mach-pxa/gumstix.c | |||
@@ -236,6 +236,7 @@ MACHINE_START(GUMSTIX, "Gumstix") | |||
236 | .boot_params = 0xa0000100, /* match u-boot bi_boot_params */ | 236 | .boot_params = 0xa0000100, /* match u-boot bi_boot_params */ |
237 | .map_io = pxa25x_map_io, | 237 | .map_io = pxa25x_map_io, |
238 | .init_irq = pxa25x_init_irq, | 238 | .init_irq = pxa25x_init_irq, |
239 | .handle_irq = pxa25x_handle_irq, | ||
239 | .timer = &pxa_timer, | 240 | .timer = &pxa_timer, |
240 | .init_machine = gumstix_init, | 241 | .init_machine = gumstix_init, |
241 | MACHINE_END | 242 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c index 657db469de1f..0a235128914d 100644 --- a/arch/arm/mach-pxa/h5000.c +++ b/arch/arm/mach-pxa/h5000.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <asm/mach-types.h> | 28 | #include <asm/mach-types.h> |
29 | #include <asm/mach/arch.h> | 29 | #include <asm/mach/arch.h> |
30 | #include <asm/mach/map.h> | 30 | #include <asm/mach/map.h> |
31 | #include <asm/irq.h> | ||
31 | 32 | ||
32 | #include <mach/pxa25x.h> | 33 | #include <mach/pxa25x.h> |
33 | #include <mach/h5000.h> | 34 | #include <mach/h5000.h> |
@@ -205,6 +206,7 @@ MACHINE_START(H5400, "HP iPAQ H5000") | |||
205 | .boot_params = 0xa0000100, | 206 | .boot_params = 0xa0000100, |
206 | .map_io = pxa25x_map_io, | 207 | .map_io = pxa25x_map_io, |
207 | .init_irq = pxa25x_init_irq, | 208 | .init_irq = pxa25x_init_irq, |
209 | .handle_irq = pxa25x_handle_irq, | ||
208 | .timer = &pxa_timer, | 210 | .timer = &pxa_timer, |
209 | .init_machine = h5000_init, | 211 | .init_machine = h5000_init, |
210 | MACHINE_END | 212 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c index e8603eba54bd..a997d0ab2872 100644 --- a/arch/arm/mach-pxa/himalaya.c +++ b/arch/arm/mach-pxa/himalaya.c | |||
@@ -24,8 +24,7 @@ | |||
24 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
25 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
26 | 26 | ||
27 | #include <mach/mfp-pxa25x.h> | 27 | #include <mach/pxa25x.h> |
28 | #include <mach/hardware.h> | ||
29 | 28 | ||
30 | #include "generic.h" | 29 | #include "generic.h" |
31 | 30 | ||
@@ -162,6 +161,7 @@ MACHINE_START(HIMALAYA, "HTC Himalaya") | |||
162 | .boot_params = 0xa0000100, | 161 | .boot_params = 0xa0000100, |
163 | .map_io = pxa25x_map_io, | 162 | .map_io = pxa25x_map_io, |
164 | .init_irq = pxa25x_init_irq, | 163 | .init_irq = pxa25x_init_irq, |
164 | .handle_irq = pxa25x_handle_irq, | ||
165 | .init_machine = himalaya_init, | 165 | .init_machine = himalaya_init, |
166 | .timer = &pxa_timer, | 166 | .timer = &pxa_timer, |
167 | MACHINE_END | 167 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c index f941a495a4a8..9a734cb7236e 100644 --- a/arch/arm/mach-pxa/hx4700.c +++ b/arch/arm/mach-pxa/hx4700.c | |||
@@ -874,6 +874,7 @@ MACHINE_START(H4700, "HP iPAQ HX4700") | |||
874 | .map_io = pxa27x_map_io, | 874 | .map_io = pxa27x_map_io, |
875 | .nr_irqs = HX4700_NR_IRQS, | 875 | .nr_irqs = HX4700_NR_IRQS, |
876 | .init_irq = pxa27x_init_irq, | 876 | .init_irq = pxa27x_init_irq, |
877 | .handle_irq = pxa27x_handle_irq, | ||
877 | .init_machine = hx4700_init, | 878 | .init_machine = hx4700_init, |
878 | .timer = &pxa_timer, | 879 | .timer = &pxa_timer, |
879 | MACHINE_END | 880 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c index 6cedc81da3bc..d427429f1f34 100644 --- a/arch/arm/mach-pxa/icontrol.c +++ b/arch/arm/mach-pxa/icontrol.c | |||
@@ -194,6 +194,7 @@ MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM") | |||
194 | .boot_params = 0xa0000100, | 194 | .boot_params = 0xa0000100, |
195 | .map_io = pxa3xx_map_io, | 195 | .map_io = pxa3xx_map_io, |
196 | .init_irq = pxa3xx_init_irq, | 196 | .init_irq = pxa3xx_init_irq, |
197 | .handle_irq = pxa3xx_handle_irq, | ||
197 | .timer = &pxa_timer, | 198 | .timer = &pxa_timer, |
198 | .init_machine = icontrol_init | 199 | .init_machine = icontrol_init |
199 | MACHINE_END | 200 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c index f7fb64f11a7d..ddf20e5c376e 100644 --- a/arch/arm/mach-pxa/idp.c +++ b/arch/arm/mach-pxa/idp.c | |||
@@ -196,6 +196,7 @@ MACHINE_START(PXA_IDP, "Vibren PXA255 IDP") | |||
196 | /* Maintainer: Vibren Technologies */ | 196 | /* Maintainer: Vibren Technologies */ |
197 | .map_io = idp_map_io, | 197 | .map_io = idp_map_io, |
198 | .init_irq = pxa25x_init_irq, | 198 | .init_irq = pxa25x_init_irq, |
199 | .handle_irq = pxa25x_handle_irq, | ||
199 | .timer = &pxa_timer, | 200 | .timer = &pxa_timer, |
200 | .init_machine = idp_init, | 201 | .init_machine = idp_init, |
201 | MACHINE_END | 202 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index 038402404e39..7cc5a781e99e 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h | |||
@@ -104,4 +104,16 @@ | |||
104 | 104 | ||
105 | #define NR_IRQS (IRQ_BOARD_START) | 105 | #define NR_IRQS (IRQ_BOARD_START) |
106 | 106 | ||
107 | #ifndef __ASSEMBLY__ | ||
108 | struct irq_data; | ||
109 | struct pt_regs; | ||
110 | |||
111 | void pxa_mask_irq(struct irq_data *); | ||
112 | void pxa_unmask_irq(struct irq_data *); | ||
113 | void icip_handle_irq(struct pt_regs *); | ||
114 | void ichp_handle_irq(struct pt_regs *); | ||
115 | |||
116 | void pxa_init_irq(int irq_nr, int (*set_wake)(struct irq_data *, unsigned int)); | ||
117 | #endif | ||
118 | |||
107 | #endif /* __ASM_MACH_IRQS_H */ | 119 | #endif /* __ASM_MACH_IRQS_H */ |
diff --git a/arch/arm/mach-pxa/include/mach/pxa25x.h b/arch/arm/mach-pxa/include/mach/pxa25x.h index 508c3ba1f4d0..3ac0baac7350 100644 --- a/arch/arm/mach-pxa/include/mach/pxa25x.h +++ b/arch/arm/mach-pxa/include/mach/pxa25x.h | |||
@@ -4,5 +4,14 @@ | |||
4 | #include <mach/hardware.h> | 4 | #include <mach/hardware.h> |
5 | #include <mach/pxa2xx-regs.h> | 5 | #include <mach/pxa2xx-regs.h> |
6 | #include <mach/mfp-pxa25x.h> | 6 | #include <mach/mfp-pxa25x.h> |
7 | #include <mach/irqs.h> | ||
8 | |||
9 | extern void __init pxa25x_map_io(void); | ||
10 | extern void __init pxa25x_init_irq(void); | ||
11 | #ifdef CONFIG_CPU_PXA26x | ||
12 | extern void __init pxa26x_init_irq(void); | ||
13 | #endif | ||
14 | |||
15 | #define pxa25x_handle_irq icip_handle_irq | ||
7 | 16 | ||
8 | #endif /* __MACH_PXA25x_H */ | 17 | #endif /* __MACH_PXA25x_H */ |
diff --git a/arch/arm/mach-pxa/include/mach/pxa27x.h b/arch/arm/mach-pxa/include/mach/pxa27x.h index 0b702693f458..b9b1bdc4bacc 100644 --- a/arch/arm/mach-pxa/include/mach/pxa27x.h +++ b/arch/arm/mach-pxa/include/mach/pxa27x.h | |||
@@ -4,6 +4,7 @@ | |||
4 | #include <mach/hardware.h> | 4 | #include <mach/hardware.h> |
5 | #include <mach/pxa2xx-regs.h> | 5 | #include <mach/pxa2xx-regs.h> |
6 | #include <mach/mfp-pxa27x.h> | 6 | #include <mach/mfp-pxa27x.h> |
7 | #include <mach/irqs.h> | ||
7 | 8 | ||
8 | #define ARB_CNTRL __REG(0x48000048) /* Arbiter Control Register */ | 9 | #define ARB_CNTRL __REG(0x48000048) /* Arbiter Control Register */ |
9 | 10 | ||
@@ -17,6 +18,10 @@ | |||
17 | #define ARB_CORE_PARK (1<<24) /* Be parked with core when idle */ | 18 | #define ARB_CORE_PARK (1<<24) /* Be parked with core when idle */ |
18 | #define ARB_LOCK_FLAG (1<<23) /* Only Locking masters gain access to the bus */ | 19 | #define ARB_LOCK_FLAG (1<<23) /* Only Locking masters gain access to the bus */ |
19 | 20 | ||
21 | extern void __init pxa27x_map_io(void); | ||
22 | extern void __init pxa27x_init_irq(void); | ||
20 | extern int __init pxa27x_set_pwrmode(unsigned int mode); | 23 | extern int __init pxa27x_set_pwrmode(unsigned int mode); |
21 | 24 | ||
25 | #define pxa27x_handle_irq ichp_handle_irq | ||
26 | |||
22 | #endif /* __MACH_PXA27x_H */ | 27 | #endif /* __MACH_PXA27x_H */ |
diff --git a/arch/arm/mach-pxa/include/mach/pxa300.h b/arch/arm/mach-pxa/include/mach/pxa300.h index 2f33076c9e48..733b6412c3df 100644 --- a/arch/arm/mach-pxa/include/mach/pxa300.h +++ b/arch/arm/mach-pxa/include/mach/pxa300.h | |||
@@ -1,8 +1,7 @@ | |||
1 | #ifndef __MACH_PXA300_H | 1 | #ifndef __MACH_PXA300_H |
2 | #define __MACH_PXA300_H | 2 | #define __MACH_PXA300_H |
3 | 3 | ||
4 | #include <mach/hardware.h> | 4 | #include <mach/pxa3xx.h> |
5 | #include <mach/pxa3xx-regs.h> | ||
6 | #include <mach/mfp-pxa300.h> | 5 | #include <mach/mfp-pxa300.h> |
7 | 6 | ||
8 | #endif /* __MACH_PXA300_H */ | 7 | #endif /* __MACH_PXA300_H */ |
diff --git a/arch/arm/mach-pxa/include/mach/pxa320.h b/arch/arm/mach-pxa/include/mach/pxa320.h index cab78e903273..b6204e470d89 100644 --- a/arch/arm/mach-pxa/include/mach/pxa320.h +++ b/arch/arm/mach-pxa/include/mach/pxa320.h | |||
@@ -1,8 +1,7 @@ | |||
1 | #ifndef __MACH_PXA320_H | 1 | #ifndef __MACH_PXA320_H |
2 | #define __MACH_PXA320_H | 2 | #define __MACH_PXA320_H |
3 | 3 | ||
4 | #include <mach/hardware.h> | 4 | #include <mach/pxa3xx.h> |
5 | #include <mach/pxa3xx-regs.h> | ||
6 | #include <mach/mfp-pxa320.h> | 5 | #include <mach/mfp-pxa320.h> |
7 | 6 | ||
8 | #endif /* __MACH_PXA320_H */ | 7 | #endif /* __MACH_PXA320_H */ |
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx.h b/arch/arm/mach-pxa/include/mach/pxa3xx.h new file mode 100644 index 000000000000..cd3e57f42688 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/pxa3xx.h | |||
@@ -0,0 +1,14 @@ | |||
1 | #ifndef __MACH_PXA3XX_H | ||
2 | #define __MACH_PXA3XX_H | ||
3 | |||
4 | #include <mach/hardware.h> | ||
5 | #include <mach/pxa3xx-regs.h> | ||
6 | #include <mach/irqs.h> | ||
7 | |||
8 | extern void __init pxa3xx_map_io(void); | ||
9 | extern void __init pxa3xx_init_irq(void); | ||
10 | extern void __init pxa95x_init_irq(void); | ||
11 | |||
12 | #define pxa3xx_handle_irq ichp_handle_irq | ||
13 | |||
14 | #endif /* __MACH_PXA3XX_H */ | ||
diff --git a/arch/arm/mach-pxa/include/mach/pxa930.h b/arch/arm/mach-pxa/include/mach/pxa930.h index d45f76a9b54d..190363b98d01 100644 --- a/arch/arm/mach-pxa/include/mach/pxa930.h +++ b/arch/arm/mach-pxa/include/mach/pxa930.h | |||
@@ -1,8 +1,7 @@ | |||
1 | #ifndef __MACH_PXA930_H | 1 | #ifndef __MACH_PXA930_H |
2 | #define __MACH_PXA930_H | 2 | #define __MACH_PXA930_H |
3 | 3 | ||
4 | #include <mach/hardware.h> | 4 | #include <mach/pxa3xx.h> |
5 | #include <mach/pxa3xx-regs.h> | ||
6 | #include <mach/mfp-pxa930.h> | 5 | #include <mach/mfp-pxa930.h> |
7 | 6 | ||
8 | #endif /* __MACH_PXA930_H */ | 7 | #endif /* __MACH_PXA930_H */ |
diff --git a/arch/arm/mach-pxa/include/mach/regs-intc.h b/arch/arm/mach-pxa/include/mach/regs-intc.h deleted file mode 100644 index 662288eb6f95..000000000000 --- a/arch/arm/mach-pxa/include/mach/regs-intc.h +++ /dev/null | |||
@@ -1,30 +0,0 @@ | |||
1 | #ifndef __ASM_MACH_REGS_INTC_H | ||
2 | #define __ASM_MACH_REGS_INTC_H | ||
3 | |||
4 | #include <mach/hardware.h> | ||
5 | |||
6 | /* | ||
7 | * Interrupt Controller | ||
8 | */ | ||
9 | |||
10 | #define ICIP __REG(0x40D00000) /* Interrupt Controller IRQ Pending Register */ | ||
11 | #define ICMR __REG(0x40D00004) /* Interrupt Controller Mask Register */ | ||
12 | #define ICLR __REG(0x40D00008) /* Interrupt Controller Level Register */ | ||
13 | #define ICFP __REG(0x40D0000C) /* Interrupt Controller FIQ Pending Register */ | ||
14 | #define ICPR __REG(0x40D00010) /* Interrupt Controller Pending Register */ | ||
15 | #define ICCR __REG(0x40D00014) /* Interrupt Controller Control Register */ | ||
16 | #define ICHP __REG(0x40D00018) /* Interrupt Controller Highest Priority Register */ | ||
17 | |||
18 | #define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ | ||
19 | #define ICMR2 __REG(0x40D000A0) /* Interrupt Controller Mask Register 2 */ | ||
20 | #define ICLR2 __REG(0x40D000A4) /* Interrupt Controller Level Register 2 */ | ||
21 | #define ICFP2 __REG(0x40D000A8) /* Interrupt Controller FIQ Pending Register 2 */ | ||
22 | #define ICPR2 __REG(0x40D000AC) /* Interrupt Controller Pending Register 2 */ | ||
23 | |||
24 | #define ICIP3 __REG(0x40D00130) /* Interrupt Controller IRQ Pending Register 3 */ | ||
25 | #define ICMR3 __REG(0x40D00134) /* Interrupt Controller Mask Register 3 */ | ||
26 | #define ICLR3 __REG(0x40D00138) /* Interrupt Controller Level Register 3 */ | ||
27 | #define ICFP3 __REG(0x40D0013C) /* Interrupt Controller FIQ Pending Register 3 */ | ||
28 | #define ICPR3 __REG(0x40D00140) /* Interrupt Controller Pending Register 3 */ | ||
29 | |||
30 | #endif /* __ASM_MACH_REGS_INTC_H */ | ||
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index 32ed551bf9c5..b09e848eb6c6 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c | |||
@@ -37,6 +37,8 @@ | |||
37 | #define IPR(i) (((i) < 32) ? (0x01c + ((i) << 2)) : \ | 37 | #define IPR(i) (((i) < 32) ? (0x01c + ((i) << 2)) : \ |
38 | ((i) < 64) ? (0x0b0 + (((i) - 32) << 2)) : \ | 38 | ((i) < 64) ? (0x0b0 + (((i) - 32) << 2)) : \ |
39 | (0x144 + (((i) - 64) << 2))) | 39 | (0x144 + (((i) - 64) << 2))) |
40 | #define ICHP_VAL_IRQ (1 << 31) | ||
41 | #define ICHP_IRQ(i) (((i) >> 16) & 0x7fff) | ||
40 | #define IPR_VALID (1 << 31) | 42 | #define IPR_VALID (1 << 31) |
41 | #define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f) | 43 | #define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f) |
42 | 44 | ||
@@ -64,7 +66,7 @@ static inline void __iomem *irq_base(int i) | |||
64 | return (void __iomem *)io_p2v(phys_base[i]); | 66 | return (void __iomem *)io_p2v(phys_base[i]); |
65 | } | 67 | } |
66 | 68 | ||
67 | static void pxa_mask_irq(struct irq_data *d) | 69 | void pxa_mask_irq(struct irq_data *d) |
68 | { | 70 | { |
69 | void __iomem *base = irq_data_get_irq_chip_data(d); | 71 | void __iomem *base = irq_data_get_irq_chip_data(d); |
70 | uint32_t icmr = __raw_readl(base + ICMR); | 72 | uint32_t icmr = __raw_readl(base + ICMR); |
@@ -73,7 +75,7 @@ static void pxa_mask_irq(struct irq_data *d) | |||
73 | __raw_writel(icmr, base + ICMR); | 75 | __raw_writel(icmr, base + ICMR); |
74 | } | 76 | } |
75 | 77 | ||
76 | static void pxa_unmask_irq(struct irq_data *d) | 78 | void pxa_unmask_irq(struct irq_data *d) |
77 | { | 79 | { |
78 | void __iomem *base = irq_data_get_irq_chip_data(d); | 80 | void __iomem *base = irq_data_get_irq_chip_data(d); |
79 | uint32_t icmr = __raw_readl(base + ICMR); | 81 | uint32_t icmr = __raw_readl(base + ICMR); |
@@ -127,6 +129,36 @@ static struct irq_chip pxa_low_gpio_chip = { | |||
127 | .irq_set_type = pxa_set_low_gpio_type, | 129 | .irq_set_type = pxa_set_low_gpio_type, |
128 | }; | 130 | }; |
129 | 131 | ||
132 | asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs) | ||
133 | { | ||
134 | uint32_t icip, icmr, mask; | ||
135 | |||
136 | do { | ||
137 | icip = __raw_readl(IRQ_BASE + ICIP); | ||
138 | icmr = __raw_readl(IRQ_BASE + ICMR); | ||
139 | mask = icip & icmr; | ||
140 | |||
141 | if (mask == 0) | ||
142 | break; | ||
143 | |||
144 | handle_IRQ(PXA_IRQ(fls(mask) - 1), regs); | ||
145 | } while (1); | ||
146 | } | ||
147 | |||
148 | asmlinkage void __exception_irq_entry ichp_handle_irq(struct pt_regs *regs) | ||
149 | { | ||
150 | uint32_t ichp; | ||
151 | |||
152 | do { | ||
153 | __asm__ __volatile__("mrc p6, 0, %0, c5, c0, 0\n": "=r"(ichp)); | ||
154 | |||
155 | if ((ichp & ICHP_VAL_IRQ) == 0) | ||
156 | break; | ||
157 | |||
158 | handle_IRQ(PXA_IRQ(ICHP_IRQ(ichp)), regs); | ||
159 | } while (1); | ||
160 | } | ||
161 | |||
130 | static void __init pxa_init_low_gpio_irq(set_wake_t fn) | 162 | static void __init pxa_init_low_gpio_irq(set_wake_t fn) |
131 | { | 163 | { |
132 | int irq; | 164 | int irq; |
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index e5e326d2cdc9..8f97e15e86e5 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c | |||
@@ -441,6 +441,7 @@ MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleto | |||
441 | .map_io = pxa3xx_map_io, | 441 | .map_io = pxa3xx_map_io, |
442 | .nr_irqs = LITTLETON_NR_IRQS, | 442 | .nr_irqs = LITTLETON_NR_IRQS, |
443 | .init_irq = pxa3xx_init_irq, | 443 | .init_irq = pxa3xx_init_irq, |
444 | .handle_irq = pxa3xx_handle_irq, | ||
444 | .timer = &pxa_timer, | 445 | .timer = &pxa_timer, |
445 | .init_machine = littleton_init, | 446 | .init_machine = littleton_init, |
446 | MACHINE_END | 447 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index 6cf8180bf5bd..c171d6ebee49 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c | |||
@@ -503,6 +503,7 @@ MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine") | |||
503 | .map_io = lpd270_map_io, | 503 | .map_io = lpd270_map_io, |
504 | .nr_irqs = LPD270_NR_IRQS, | 504 | .nr_irqs = LPD270_NR_IRQS, |
505 | .init_irq = lpd270_init_irq, | 505 | .init_irq = lpd270_init_irq, |
506 | .handle_irq = pxa27x_handle_irq, | ||
506 | .timer = &pxa_timer, | 507 | .timer = &pxa_timer, |
507 | .init_machine = lpd270_init, | 508 | .init_machine = lpd270_init, |
508 | MACHINE_END | 509 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index e10ddb827147..a8c696bfc132 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c | |||
@@ -553,6 +553,7 @@ MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)") | |||
553 | .map_io = lubbock_map_io, | 553 | .map_io = lubbock_map_io, |
554 | .nr_irqs = LUBBOCK_NR_IRQS, | 554 | .nr_irqs = LUBBOCK_NR_IRQS, |
555 | .init_irq = lubbock_init_irq, | 555 | .init_irq = lubbock_init_irq, |
556 | .handle_irq = pxa25x_handle_irq, | ||
556 | .timer = &pxa_timer, | 557 | .timer = &pxa_timer, |
557 | .init_machine = lubbock_init, | 558 | .init_machine = lubbock_init, |
558 | MACHINE_END | 559 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c index e1920572948a..cb3509ee1fe2 100644 --- a/arch/arm/mach-pxa/magician.c +++ b/arch/arm/mach-pxa/magician.c | |||
@@ -768,6 +768,7 @@ MACHINE_START(MAGICIAN, "HTC Magician") | |||
768 | .map_io = pxa27x_map_io, | 768 | .map_io = pxa27x_map_io, |
769 | .nr_irqs = MAGICIAN_NR_IRQS, | 769 | .nr_irqs = MAGICIAN_NR_IRQS, |
770 | .init_irq = pxa27x_init_irq, | 770 | .init_irq = pxa27x_init_irq, |
771 | .handle_irq = pxa27x_handle_irq, | ||
771 | .init_machine = magician_init, | 772 | .init_machine = magician_init, |
772 | .timer = &pxa_timer, | 773 | .timer = &pxa_timer, |
773 | MACHINE_END | 774 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index 3479e2b3b511..4622eb78ef25 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c | |||
@@ -620,6 +620,7 @@ MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") | |||
620 | .map_io = mainstone_map_io, | 620 | .map_io = mainstone_map_io, |
621 | .nr_irqs = MAINSTONE_NR_IRQS, | 621 | .nr_irqs = MAINSTONE_NR_IRQS, |
622 | .init_irq = mainstone_init_irq, | 622 | .init_irq = mainstone_init_irq, |
623 | .handle_irq = pxa27x_handle_irq, | ||
623 | .timer = &pxa_timer, | 624 | .timer = &pxa_timer, |
624 | .init_machine = mainstone_init, | 625 | .init_machine = mainstone_init, |
625 | MACHINE_END | 626 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index e3470137c934..ff92efd65a53 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c | |||
@@ -794,6 +794,7 @@ MACHINE_START(MIOA701, "MIO A701") | |||
794 | .boot_params = 0xa0000100, | 794 | .boot_params = 0xa0000100, |
795 | .map_io = &pxa27x_map_io, | 795 | .map_io = &pxa27x_map_io, |
796 | .init_irq = &pxa27x_init_irq, | 796 | .init_irq = &pxa27x_init_irq, |
797 | .handle_irq = &pxa27x_handle_irq, | ||
797 | .init_machine = mioa701_machine_init, | 798 | .init_machine = mioa701_machine_init, |
798 | .timer = &pxa_timer, | 799 | .timer = &pxa_timer, |
799 | MACHINE_END | 800 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c index 59cce78aebd1..fb408861dbcf 100644 --- a/arch/arm/mach-pxa/mp900.c +++ b/arch/arm/mach-pxa/mp900.c | |||
@@ -96,6 +96,7 @@ MACHINE_START(NEC_MP900, "MobilePro900/C") | |||
96 | .timer = &pxa_timer, | 96 | .timer = &pxa_timer, |
97 | .map_io = pxa25x_map_io, | 97 | .map_io = pxa25x_map_io, |
98 | .init_irq = pxa25x_init_irq, | 98 | .init_irq = pxa25x_init_irq, |
99 | .handle_irq = pxa25x_handle_irq, | ||
99 | .init_machine = mp900c_init, | 100 | .init_machine = mp900c_init, |
100 | MACHINE_END | 101 | MACHINE_END |
101 | 102 | ||
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c index 4061ecddee70..6b77365ed938 100644 --- a/arch/arm/mach-pxa/palmld.c +++ b/arch/arm/mach-pxa/palmld.c | |||
@@ -345,6 +345,7 @@ MACHINE_START(PALMLD, "Palm LifeDrive") | |||
345 | .boot_params = 0xa0000100, | 345 | .boot_params = 0xa0000100, |
346 | .map_io = palmld_map_io, | 346 | .map_io = palmld_map_io, |
347 | .init_irq = pxa27x_init_irq, | 347 | .init_irq = pxa27x_init_irq, |
348 | .handle_irq = pxa27x_handle_irq, | ||
348 | .timer = &pxa_timer, | 349 | .timer = &pxa_timer, |
349 | .init_machine = palmld_init | 350 | .init_machine = palmld_init |
350 | MACHINE_END | 351 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c index df4d7d009fbb..9bd3e47486fb 100644 --- a/arch/arm/mach-pxa/palmt5.c +++ b/arch/arm/mach-pxa/palmt5.c | |||
@@ -206,6 +206,7 @@ MACHINE_START(PALMT5, "Palm Tungsten|T5") | |||
206 | .map_io = pxa27x_map_io, | 206 | .map_io = pxa27x_map_io, |
207 | .reserve = palmt5_reserve, | 207 | .reserve = palmt5_reserve, |
208 | .init_irq = pxa27x_init_irq, | 208 | .init_irq = pxa27x_init_irq, |
209 | .handle_irq = pxa27x_handle_irq, | ||
209 | .timer = &pxa_timer, | 210 | .timer = &pxa_timer, |
210 | .init_machine = palmt5_init | 211 | .init_machine = palmt5_init |
211 | MACHINE_END | 212 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c index fb06bd047272..6ad4a6c7bc96 100644 --- a/arch/arm/mach-pxa/palmtc.c +++ b/arch/arm/mach-pxa/palmtc.c | |||
@@ -31,14 +31,13 @@ | |||
31 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
32 | #include <asm/mach/map.h> | 32 | #include <asm/mach/map.h> |
33 | 33 | ||
34 | #include <mach/pxa25x.h> | ||
34 | #include <mach/audio.h> | 35 | #include <mach/audio.h> |
35 | #include <mach/palmtc.h> | 36 | #include <mach/palmtc.h> |
36 | #include <mach/mmc.h> | 37 | #include <mach/mmc.h> |
37 | #include <mach/pxafb.h> | 38 | #include <mach/pxafb.h> |
38 | #include <mach/mfp-pxa25x.h> | ||
39 | #include <mach/irda.h> | 39 | #include <mach/irda.h> |
40 | #include <mach/udc.h> | 40 | #include <mach/udc.h> |
41 | #include <mach/pxa2xx-regs.h> | ||
42 | 41 | ||
43 | #include "generic.h" | 42 | #include "generic.h" |
44 | #include "devices.h" | 43 | #include "devices.h" |
@@ -541,6 +540,7 @@ MACHINE_START(PALMTC, "Palm Tungsten|C") | |||
541 | .boot_params = 0xa0000100, | 540 | .boot_params = 0xa0000100, |
542 | .map_io = pxa25x_map_io, | 541 | .map_io = pxa25x_map_io, |
543 | .init_irq = pxa25x_init_irq, | 542 | .init_irq = pxa25x_init_irq, |
543 | .handle_irq = pxa25x_handle_irq, | ||
544 | .timer = &pxa_timer, | 544 | .timer = &pxa_timer, |
545 | .init_machine = palmtc_init | 545 | .init_machine = palmtc_init |
546 | MACHINE_END | 546 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c index 726f5b98dcd3..664232f3e62c 100644 --- a/arch/arm/mach-pxa/palmte2.c +++ b/arch/arm/mach-pxa/palmte2.c | |||
@@ -31,11 +31,11 @@ | |||
31 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
32 | #include <asm/mach/map.h> | 32 | #include <asm/mach/map.h> |
33 | 33 | ||
34 | #include <mach/pxa25x.h> | ||
34 | #include <mach/audio.h> | 35 | #include <mach/audio.h> |
35 | #include <mach/palmte2.h> | 36 | #include <mach/palmte2.h> |
36 | #include <mach/mmc.h> | 37 | #include <mach/mmc.h> |
37 | #include <mach/pxafb.h> | 38 | #include <mach/pxafb.h> |
38 | #include <mach/mfp-pxa25x.h> | ||
39 | #include <mach/irda.h> | 39 | #include <mach/irda.h> |
40 | #include <mach/udc.h> | 40 | #include <mach/udc.h> |
41 | #include <mach/palmasoc.h> | 41 | #include <mach/palmasoc.h> |
@@ -359,6 +359,7 @@ MACHINE_START(PALMTE2, "Palm Tungsten|E2") | |||
359 | .boot_params = 0xa0000100, | 359 | .boot_params = 0xa0000100, |
360 | .map_io = pxa25x_map_io, | 360 | .map_io = pxa25x_map_io, |
361 | .init_irq = pxa25x_init_irq, | 361 | .init_irq = pxa25x_init_irq, |
362 | .handle_irq = pxa25x_handle_irq, | ||
362 | .timer = &pxa_timer, | 363 | .timer = &pxa_timer, |
363 | .init_machine = palmte2_init | 364 | .init_machine = palmte2_init |
364 | MACHINE_END | 365 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c index 20d1b18b1733..bb27d4b688d8 100644 --- a/arch/arm/mach-pxa/palmtreo.c +++ b/arch/arm/mach-pxa/palmtreo.c | |||
@@ -444,6 +444,7 @@ MACHINE_START(TREO680, "Palm Treo 680") | |||
444 | .map_io = pxa27x_map_io, | 444 | .map_io = pxa27x_map_io, |
445 | .reserve = treo_reserve, | 445 | .reserve = treo_reserve, |
446 | .init_irq = pxa27x_init_irq, | 446 | .init_irq = pxa27x_init_irq, |
447 | .handle_irq = pxa27x_handle_irq, | ||
447 | .timer = &pxa_timer, | 448 | .timer = &pxa_timer, |
448 | .init_machine = treo680_init, | 449 | .init_machine = treo680_init, |
449 | MACHINE_END | 450 | MACHINE_END |
@@ -453,6 +454,7 @@ MACHINE_START(CENTRO, "Palm Centro 685") | |||
453 | .map_io = pxa27x_map_io, | 454 | .map_io = pxa27x_map_io, |
454 | .reserve = treo_reserve, | 455 | .reserve = treo_reserve, |
455 | .init_irq = pxa27x_init_irq, | 456 | .init_irq = pxa27x_init_irq, |
457 | .handle_irq = pxa27x_handle_irq, | ||
456 | .timer = &pxa_timer, | 458 | .timer = &pxa_timer, |
457 | .init_machine = centro_init, | 459 | .init_machine = centro_init, |
458 | MACHINE_END | 460 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index 595f002066cc..fc4285589c1f 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c | |||
@@ -367,6 +367,7 @@ MACHINE_START(PALMTX, "Palm T|X") | |||
367 | .boot_params = 0xa0000100, | 367 | .boot_params = 0xa0000100, |
368 | .map_io = palmtx_map_io, | 368 | .map_io = palmtx_map_io, |
369 | .init_irq = pxa27x_init_irq, | 369 | .init_irq = pxa27x_init_irq, |
370 | .handle_irq = pxa27x_handle_irq, | ||
370 | .timer = &pxa_timer, | 371 | .timer = &pxa_timer, |
371 | .init_machine = palmtx_init | 372 | .init_machine = palmtx_init |
372 | MACHINE_END | 373 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c index 65f24f0b77e8..95d71c3a5bae 100644 --- a/arch/arm/mach-pxa/palmz72.c +++ b/arch/arm/mach-pxa/palmz72.c | |||
@@ -401,6 +401,7 @@ MACHINE_START(PALMZ72, "Palm Zire72") | |||
401 | .boot_params = 0xa0000100, | 401 | .boot_params = 0xa0000100, |
402 | .map_io = pxa27x_map_io, | 402 | .map_io = pxa27x_map_io, |
403 | .init_irq = pxa27x_init_irq, | 403 | .init_irq = pxa27x_init_irq, |
404 | .handle_irq = pxa27x_handle_irq, | ||
404 | .timer = &pxa_timer, | 405 | .timer = &pxa_timer, |
405 | .init_machine = palmz72_init | 406 | .init_machine = palmz72_init |
406 | MACHINE_END | 407 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c index 1fc8a66407ae..ffa65dfb8c6f 100644 --- a/arch/arm/mach-pxa/pcm027.c +++ b/arch/arm/mach-pxa/pcm027.c | |||
@@ -262,6 +262,7 @@ MACHINE_START(PCM027, "Phytec Messtechnik GmbH phyCORE-PXA270") | |||
262 | .map_io = pcm027_map_io, | 262 | .map_io = pcm027_map_io, |
263 | .nr_irqs = PCM027_NR_IRQS, | 263 | .nr_irqs = PCM027_NR_IRQS, |
264 | .init_irq = pxa27x_init_irq, | 264 | .init_irq = pxa27x_init_irq, |
265 | .handle_irq = pxa27x_handle_irq, | ||
265 | .timer = &pxa_timer, | 266 | .timer = &pxa_timer, |
266 | .init_machine = pcm027_init, | 267 | .init_machine = pcm027_init, |
267 | MACHINE_END | 268 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index 16d14fd79b4b..a113ea9ab4ab 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c | |||
@@ -468,6 +468,7 @@ MACHINE_START(POODLE, "SHARP Poodle") | |||
468 | .map_io = pxa25x_map_io, | 468 | .map_io = pxa25x_map_io, |
469 | .nr_irqs = POODLE_NR_IRQS, /* 4 for LoCoMo */ | 469 | .nr_irqs = POODLE_NR_IRQS, /* 4 for LoCoMo */ |
470 | .init_irq = pxa25x_init_irq, | 470 | .init_irq = pxa25x_init_irq, |
471 | .handle_irq = pxa25x_handle_irq, | ||
471 | .timer = &pxa_timer, | 472 | .timer = &pxa_timer, |
472 | .init_machine = poodle_init, | 473 | .init_machine = poodle_init, |
473 | MACHINE_END | 474 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 8521d7d6f1da..e66dc1562cda 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c | |||
@@ -31,7 +31,6 @@ | |||
31 | #include <mach/ohci.h> | 31 | #include <mach/ohci.h> |
32 | #include <mach/pm.h> | 32 | #include <mach/pm.h> |
33 | #include <mach/dma.h> | 33 | #include <mach/dma.h> |
34 | #include <mach/regs-intc.h> | ||
35 | #include <mach/smemc.h> | 34 | #include <mach/smemc.h> |
36 | 35 | ||
37 | #include "generic.h" | 36 | #include "generic.h" |
@@ -328,13 +327,13 @@ static void pxa_ack_ext_wakeup(struct irq_data *d) | |||
328 | 327 | ||
329 | static void pxa_mask_ext_wakeup(struct irq_data *d) | 328 | static void pxa_mask_ext_wakeup(struct irq_data *d) |
330 | { | 329 | { |
331 | ICMR2 &= ~(1 << ((d->irq - PXA_IRQ(0)) & 0x1f)); | 330 | pxa_mask_irq(d); |
332 | PECR &= ~PECR_IE(d->irq - IRQ_WAKEUP0); | 331 | PECR &= ~PECR_IE(d->irq - IRQ_WAKEUP0); |
333 | } | 332 | } |
334 | 333 | ||
335 | static void pxa_unmask_ext_wakeup(struct irq_data *d) | 334 | static void pxa_unmask_ext_wakeup(struct irq_data *d) |
336 | { | 335 | { |
337 | ICMR2 |= 1 << ((d->irq - PXA_IRQ(0)) & 0x1f); | 336 | pxa_unmask_irq(d); |
338 | PECR |= PECR_IE(d->irq - IRQ_WAKEUP0); | 337 | PECR |= PECR_IE(d->irq - IRQ_WAKEUP0); |
339 | } | 338 | } |
340 | 339 | ||
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c index ecc82a330fad..0ee166b61f81 100644 --- a/arch/arm/mach-pxa/pxa95x.c +++ b/arch/arm/mach-pxa/pxa95x.c | |||
@@ -27,7 +27,6 @@ | |||
27 | #include <mach/reset.h> | 27 | #include <mach/reset.h> |
28 | #include <mach/pm.h> | 28 | #include <mach/pm.h> |
29 | #include <mach/dma.h> | 29 | #include <mach/dma.h> |
30 | #include <mach/regs-intc.h> | ||
31 | 30 | ||
32 | #include "generic.h" | 31 | #include "generic.h" |
33 | #include "devices.h" | 32 | #include "devices.h" |
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c index d130f77b6d11..8b8cff6a9620 100644 --- a/arch/arm/mach-pxa/raumfeld.c +++ b/arch/arm/mach-pxa/raumfeld.c | |||
@@ -46,10 +46,7 @@ | |||
46 | #include <asm/mach-types.h> | 46 | #include <asm/mach-types.h> |
47 | #include <asm/mach/arch.h> | 47 | #include <asm/mach/arch.h> |
48 | 48 | ||
49 | #include <mach/hardware.h> | 49 | #include <mach/pxa300.h> |
50 | #include <mach/pxa3xx-regs.h> | ||
51 | #include <mach/mfp-pxa3xx.h> | ||
52 | #include <mach/mfp-pxa300.h> | ||
53 | #include <mach/ohci.h> | 50 | #include <mach/ohci.h> |
54 | #include <mach/pxafb.h> | 51 | #include <mach/pxafb.h> |
55 | #include <mach/mmc.h> | 52 | #include <mach/mmc.h> |
@@ -1091,6 +1088,7 @@ MACHINE_START(RAUMFELD_RC, "Raumfeld Controller") | |||
1091 | .init_machine = raumfeld_controller_init, | 1088 | .init_machine = raumfeld_controller_init, |
1092 | .map_io = pxa3xx_map_io, | 1089 | .map_io = pxa3xx_map_io, |
1093 | .init_irq = pxa3xx_init_irq, | 1090 | .init_irq = pxa3xx_init_irq, |
1091 | .handle_irq = pxa3xx_handle_irq, | ||
1094 | .timer = &pxa_timer, | 1092 | .timer = &pxa_timer, |
1095 | MACHINE_END | 1093 | MACHINE_END |
1096 | #endif | 1094 | #endif |
@@ -1101,6 +1099,7 @@ MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector") | |||
1101 | .init_machine = raumfeld_connector_init, | 1099 | .init_machine = raumfeld_connector_init, |
1102 | .map_io = pxa3xx_map_io, | 1100 | .map_io = pxa3xx_map_io, |
1103 | .init_irq = pxa3xx_init_irq, | 1101 | .init_irq = pxa3xx_init_irq, |
1102 | .handle_irq = pxa3xx_handle_irq, | ||
1104 | .timer = &pxa_timer, | 1103 | .timer = &pxa_timer, |
1105 | MACHINE_END | 1104 | MACHINE_END |
1106 | #endif | 1105 | #endif |
@@ -1111,6 +1110,7 @@ MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker") | |||
1111 | .init_machine = raumfeld_speaker_init, | 1110 | .init_machine = raumfeld_speaker_init, |
1112 | .map_io = pxa3xx_map_io, | 1111 | .map_io = pxa3xx_map_io, |
1113 | .init_irq = pxa3xx_init_irq, | 1112 | .init_irq = pxa3xx_init_irq, |
1113 | .handle_irq = pxa3xx_handle_irq, | ||
1114 | .timer = &pxa_timer, | 1114 | .timer = &pxa_timer, |
1115 | MACHINE_END | 1115 | MACHINE_END |
1116 | #endif | 1116 | #endif |
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c index fee97a935122..df4356e8acae 100644 --- a/arch/arm/mach-pxa/saar.c +++ b/arch/arm/mach-pxa/saar.c | |||
@@ -599,6 +599,7 @@ MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)") | |||
599 | .boot_params = 0xa0000100, | 599 | .boot_params = 0xa0000100, |
600 | .map_io = pxa3xx_map_io, | 600 | .map_io = pxa3xx_map_io, |
601 | .init_irq = pxa3xx_init_irq, | 601 | .init_irq = pxa3xx_init_irq, |
602 | .handle_irq = pxa3xx_handle_irq, | ||
602 | .timer = &pxa_timer, | 603 | .timer = &pxa_timer, |
603 | .init_machine = saar_init, | 604 | .init_machine = saar_init, |
604 | MACHINE_END | 605 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c index 9322fe527c7f..3b582d691cc6 100644 --- a/arch/arm/mach-pxa/saarb.c +++ b/arch/arm/mach-pxa/saarb.c | |||
@@ -107,6 +107,7 @@ MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)") | |||
107 | .map_io = pxa_map_io, | 107 | .map_io = pxa_map_io, |
108 | .nr_irqs = SAARB_NR_IRQS, | 108 | .nr_irqs = SAARB_NR_IRQS, |
109 | .init_irq = pxa95x_init_irq, | 109 | .init_irq = pxa95x_init_irq, |
110 | .handle_irq = pxa3xx_handle_irq, | ||
110 | .timer = &pxa_timer, | 111 | .timer = &pxa_timer, |
111 | .init_machine = saarb_init, | 112 | .init_machine = saarb_init, |
112 | MACHINE_END | 113 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 01c576963e94..438c7b5e451f 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c | |||
@@ -984,6 +984,7 @@ MACHINE_START(SPITZ, "SHARP Spitz") | |||
984 | .fixup = spitz_fixup, | 984 | .fixup = spitz_fixup, |
985 | .map_io = pxa27x_map_io, | 985 | .map_io = pxa27x_map_io, |
986 | .init_irq = pxa27x_init_irq, | 986 | .init_irq = pxa27x_init_irq, |
987 | .handle_irq = pxa27x_handle_irq, | ||
987 | .init_machine = spitz_init, | 988 | .init_machine = spitz_init, |
988 | .timer = &pxa_timer, | 989 | .timer = &pxa_timer, |
989 | MACHINE_END | 990 | MACHINE_END |
@@ -994,6 +995,7 @@ MACHINE_START(BORZOI, "SHARP Borzoi") | |||
994 | .fixup = spitz_fixup, | 995 | .fixup = spitz_fixup, |
995 | .map_io = pxa27x_map_io, | 996 | .map_io = pxa27x_map_io, |
996 | .init_irq = pxa27x_init_irq, | 997 | .init_irq = pxa27x_init_irq, |
998 | .handle_irq = pxa27x_handle_irq, | ||
997 | .init_machine = spitz_init, | 999 | .init_machine = spitz_init, |
998 | .timer = &pxa_timer, | 1000 | .timer = &pxa_timer, |
999 | MACHINE_END | 1001 | MACHINE_END |
@@ -1004,6 +1006,7 @@ MACHINE_START(AKITA, "SHARP Akita") | |||
1004 | .fixup = spitz_fixup, | 1006 | .fixup = spitz_fixup, |
1005 | .map_io = pxa27x_map_io, | 1007 | .map_io = pxa27x_map_io, |
1006 | .init_irq = pxa27x_init_irq, | 1008 | .init_irq = pxa27x_init_irq, |
1009 | .handle_irq = pxa27x_handle_irq, | ||
1007 | .init_machine = spitz_init, | 1010 | .init_machine = spitz_init, |
1008 | .timer = &pxa_timer, | 1011 | .timer = &pxa_timer, |
1009 | MACHINE_END | 1012 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c index cb5611daf5fe..3f8d0af9e2f7 100644 --- a/arch/arm/mach-pxa/stargate2.c +++ b/arch/arm/mach-pxa/stargate2.c | |||
@@ -1001,6 +1001,7 @@ static void __init stargate2_init(void) | |||
1001 | MACHINE_START(INTELMOTE2, "IMOTE 2") | 1001 | MACHINE_START(INTELMOTE2, "IMOTE 2") |
1002 | .map_io = pxa27x_map_io, | 1002 | .map_io = pxa27x_map_io, |
1003 | .init_irq = pxa27x_init_irq, | 1003 | .init_irq = pxa27x_init_irq, |
1004 | .handle_irq = pxa27x_handle_irq, | ||
1004 | .timer = &pxa_timer, | 1005 | .timer = &pxa_timer, |
1005 | .init_machine = imote2_init, | 1006 | .init_machine = imote2_init, |
1006 | .boot_params = 0xA0000100, | 1007 | .boot_params = 0xA0000100, |
@@ -1012,6 +1013,7 @@ MACHINE_START(STARGATE2, "Stargate 2") | |||
1012 | .map_io = pxa27x_map_io, | 1013 | .map_io = pxa27x_map_io, |
1013 | .nr_irqs = STARGATE_NR_IRQS, | 1014 | .nr_irqs = STARGATE_NR_IRQS, |
1014 | .init_irq = pxa27x_init_irq, | 1015 | .init_irq = pxa27x_init_irq, |
1016 | .handle_irq = pxa27x_handle_irq, | ||
1015 | .timer = &pxa_timer, | 1017 | .timer = &pxa_timer, |
1016 | .init_machine = stargate2_init, | 1018 | .init_machine = stargate2_init, |
1017 | .boot_params = 0xA0000100, | 1019 | .boot_params = 0xA0000100, |
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c index 53d4a472b699..32fb58e01b10 100644 --- a/arch/arm/mach-pxa/tavorevb.c +++ b/arch/arm/mach-pxa/tavorevb.c | |||
@@ -492,6 +492,7 @@ MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)") | |||
492 | .boot_params = 0xa0000100, | 492 | .boot_params = 0xa0000100, |
493 | .map_io = pxa3xx_map_io, | 493 | .map_io = pxa3xx_map_io, |
494 | .init_irq = pxa3xx_init_irq, | 494 | .init_irq = pxa3xx_init_irq, |
495 | .handle_irq = pxa3xx_handle_irq, | ||
495 | .timer = &pxa_timer, | 496 | .timer = &pxa_timer, |
496 | .init_machine = tavorevb_init, | 497 | .init_machine = tavorevb_init, |
497 | MACHINE_END | 498 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c index 79f4422f12f4..fd5a8eae0a87 100644 --- a/arch/arm/mach-pxa/tavorevb3.c +++ b/arch/arm/mach-pxa/tavorevb3.c | |||
@@ -129,6 +129,7 @@ MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)") | |||
129 | .map_io = pxa3xx_map_io, | 129 | .map_io = pxa3xx_map_io, |
130 | .nr_irqs = TAVOREVB3_NR_IRQS, | 130 | .nr_irqs = TAVOREVB3_NR_IRQS, |
131 | .init_irq = pxa3xx_init_irq, | 131 | .init_irq = pxa3xx_init_irq, |
132 | .handle_irq = pxa3xx_handle_irq, | ||
132 | .timer = &pxa_timer, | 133 | .timer = &pxa_timer, |
133 | .init_machine = evb3_init, | 134 | .init_machine = evb3_init, |
134 | MACHINE_END | 135 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index 5fa145778e7d..9f69a2682693 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c | |||
@@ -974,6 +974,7 @@ MACHINE_START(TOSA, "SHARP Tosa") | |||
974 | .map_io = pxa25x_map_io, | 974 | .map_io = pxa25x_map_io, |
975 | .nr_irqs = TOSA_NR_IRQS, | 975 | .nr_irqs = TOSA_NR_IRQS, |
976 | .init_irq = pxa25x_init_irq, | 976 | .init_irq = pxa25x_init_irq, |
977 | .handle_irq = pxa25x_handle_irq, | ||
977 | .init_machine = tosa_init, | 978 | .init_machine = tosa_init, |
978 | .timer = &pxa_timer, | 979 | .timer = &pxa_timer, |
979 | MACHINE_END | 980 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index 687417a93698..c0417508f39d 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c | |||
@@ -558,6 +558,7 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") | |||
558 | .init_machine = trizeps4_init, | 558 | .init_machine = trizeps4_init, |
559 | .map_io = trizeps4_map_io, | 559 | .map_io = trizeps4_map_io, |
560 | .init_irq = pxa27x_init_irq, | 560 | .init_irq = pxa27x_init_irq, |
561 | .handle_irq = pxa27x_handle_irq, | ||
561 | .timer = &pxa_timer, | 562 | .timer = &pxa_timer, |
562 | MACHINE_END | 563 | MACHINE_END |
563 | 564 | ||
@@ -567,5 +568,6 @@ MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module") | |||
567 | .init_machine = trizeps4_init, | 568 | .init_machine = trizeps4_init, |
568 | .map_io = trizeps4_map_io, | 569 | .map_io = trizeps4_map_io, |
569 | .init_irq = pxa27x_init_irq, | 570 | .init_irq = pxa27x_init_irq, |
571 | .handle_irq = pxa27x_handle_irq, | ||
570 | .timer = &pxa_timer, | 572 | .timer = &pxa_timer, |
571 | MACHINE_END | 573 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index 903218eab56d..d4a3dc74e84a 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c | |||
@@ -995,6 +995,7 @@ MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC") | |||
995 | .boot_params = 0xa0000100, | 995 | .boot_params = 0xa0000100, |
996 | .map_io = viper_map_io, | 996 | .map_io = viper_map_io, |
997 | .init_irq = viper_init_irq, | 997 | .init_irq = viper_init_irq, |
998 | .handle_irq = pxa25x_handle_irq, | ||
998 | .timer = &pxa_timer, | 999 | .timer = &pxa_timer, |
999 | .init_machine = viper_init, | 1000 | .init_machine = viper_init, |
1000 | MACHINE_END | 1001 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c index 67bd41488bf8..5f8490ab07cb 100644 --- a/arch/arm/mach-pxa/vpac270.c +++ b/arch/arm/mach-pxa/vpac270.c | |||
@@ -719,6 +719,7 @@ MACHINE_START(VPAC270, "Voipac PXA270") | |||
719 | .boot_params = 0xa0000100, | 719 | .boot_params = 0xa0000100, |
720 | .map_io = pxa27x_map_io, | 720 | .map_io = pxa27x_map_io, |
721 | .init_irq = pxa27x_init_irq, | 721 | .init_irq = pxa27x_init_irq, |
722 | .handle_irq = pxa27x_handle_irq, | ||
722 | .timer = &pxa_timer, | 723 | .timer = &pxa_timer, |
723 | .init_machine = vpac270_init | 724 | .init_machine = vpac270_init |
724 | MACHINE_END | 725 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c index f55f8f2e0db3..acc600f5e72f 100644 --- a/arch/arm/mach-pxa/xcep.c +++ b/arch/arm/mach-pxa/xcep.c | |||
@@ -28,8 +28,7 @@ | |||
28 | #include <asm/mach/map.h> | 28 | #include <asm/mach/map.h> |
29 | 29 | ||
30 | #include <mach/hardware.h> | 30 | #include <mach/hardware.h> |
31 | #include <mach/pxa2xx-regs.h> | 31 | #include <mach/pxa25x.h> |
32 | #include <mach/mfp-pxa25x.h> | ||
33 | #include <mach/smemc.h> | 32 | #include <mach/smemc.h> |
34 | 33 | ||
35 | #include "generic.h" | 34 | #include "generic.h" |
@@ -185,6 +184,7 @@ MACHINE_START(XCEP, "Iskratel XCEP") | |||
185 | .init_machine = xcep_init, | 184 | .init_machine = xcep_init, |
186 | .map_io = pxa25x_map_io, | 185 | .map_io = pxa25x_map_io, |
187 | .init_irq = pxa25x_init_irq, | 186 | .init_irq = pxa25x_init_irq, |
187 | .handle_irq = pxa25x_handle_irq, | ||
188 | .timer = &pxa_timer, | 188 | .timer = &pxa_timer, |
189 | MACHINE_END | 189 | MACHINE_END |
190 | 190 | ||
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c index fbe9e02e2f9f..6c9275a20c91 100644 --- a/arch/arm/mach-pxa/z2.c +++ b/arch/arm/mach-pxa/z2.c | |||
@@ -40,6 +40,7 @@ | |||
40 | #include <mach/pxafb.h> | 40 | #include <mach/pxafb.h> |
41 | #include <mach/mmc.h> | 41 | #include <mach/mmc.h> |
42 | #include <plat/pxa27x_keypad.h> | 42 | #include <plat/pxa27x_keypad.h> |
43 | #include <mach/pm.h> | ||
43 | 44 | ||
44 | #include "generic.h" | 45 | #include "generic.h" |
45 | #include "devices.h" | 46 | #include "devices.h" |
@@ -677,6 +678,20 @@ static void __init z2_pmic_init(void) | |||
677 | static inline void z2_pmic_init(void) {} | 678 | static inline void z2_pmic_init(void) {} |
678 | #endif | 679 | #endif |
679 | 680 | ||
681 | #ifdef CONFIG_PM | ||
682 | static void z2_power_off(void) | ||
683 | { | ||
684 | /* We're using deep sleep as poweroff, so clear PSPR to ensure that | ||
685 | * bootloader will jump to its entry point in resume handler | ||
686 | */ | ||
687 | PSPR = 0x0; | ||
688 | local_irq_disable(); | ||
689 | pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP, PLAT_PHYS_OFFSET - PAGE_OFFSET); | ||
690 | } | ||
691 | #else | ||
692 | #define z2_power_off NULL | ||
693 | #endif | ||
694 | |||
680 | /****************************************************************************** | 695 | /****************************************************************************** |
681 | * Machine init | 696 | * Machine init |
682 | ******************************************************************************/ | 697 | ******************************************************************************/ |
@@ -698,12 +713,15 @@ static void __init z2_init(void) | |||
698 | z2_leds_init(); | 713 | z2_leds_init(); |
699 | z2_keys_init(); | 714 | z2_keys_init(); |
700 | z2_pmic_init(); | 715 | z2_pmic_init(); |
716 | |||
717 | pm_power_off = z2_power_off; | ||
701 | } | 718 | } |
702 | 719 | ||
703 | MACHINE_START(ZIPIT2, "Zipit Z2") | 720 | MACHINE_START(ZIPIT2, "Zipit Z2") |
704 | .boot_params = 0xa0000100, | 721 | .boot_params = 0xa0000100, |
705 | .map_io = pxa27x_map_io, | 722 | .map_io = pxa27x_map_io, |
706 | .init_irq = pxa27x_init_irq, | 723 | .init_irq = pxa27x_init_irq, |
724 | .handle_irq = pxa27x_handle_irq, | ||
707 | .timer = &pxa_timer, | 725 | .timer = &pxa_timer, |
708 | .init_machine = z2_init, | 726 | .init_machine = z2_init, |
709 | MACHINE_END | 727 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index 00363c7ac182..667e0956a567 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c | |||
@@ -34,14 +34,13 @@ | |||
34 | #include <asm/mach/arch.h> | 34 | #include <asm/mach/arch.h> |
35 | #include <asm/mach/map.h> | 35 | #include <asm/mach/map.h> |
36 | 36 | ||
37 | #include <mach/pxa2xx-regs.h> | 37 | #include <mach/pxa27x.h> |
38 | #include <mach/regs-uart.h> | 38 | #include <mach/regs-uart.h> |
39 | #include <mach/ohci.h> | 39 | #include <mach/ohci.h> |
40 | #include <mach/mmc.h> | 40 | #include <mach/mmc.h> |
41 | #include <mach/pxa27x-udc.h> | 41 | #include <mach/pxa27x-udc.h> |
42 | #include <mach/udc.h> | 42 | #include <mach/udc.h> |
43 | #include <mach/pxafb.h> | 43 | #include <mach/pxafb.h> |
44 | #include <mach/mfp-pxa27x.h> | ||
45 | #include <mach/pm.h> | 44 | #include <mach/pm.h> |
46 | #include <mach/audio.h> | 45 | #include <mach/audio.h> |
47 | #include <mach/arcom-pcmcia.h> | 46 | #include <mach/arcom-pcmcia.h> |
@@ -908,6 +907,7 @@ MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS") | |||
908 | .map_io = zeus_map_io, | 907 | .map_io = zeus_map_io, |
909 | .nr_irqs = ZEUS_NR_IRQS, | 908 | .nr_irqs = ZEUS_NR_IRQS, |
910 | .init_irq = zeus_init_irq, | 909 | .init_irq = zeus_init_irq, |
910 | .handle_irq = pxa27x_handle_irq, | ||
911 | .timer = &pxa_timer, | 911 | .timer = &pxa_timer, |
912 | .init_machine = zeus_init, | 912 | .init_machine = zeus_init, |
913 | MACHINE_END | 913 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index 5821185f77ab..15ec66b3471a 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c | |||
@@ -24,7 +24,7 @@ | |||
24 | 24 | ||
25 | #include <asm/mach-types.h> | 25 | #include <asm/mach-types.h> |
26 | #include <asm/mach/arch.h> | 26 | #include <asm/mach/arch.h> |
27 | #include <mach/hardware.h> | 27 | #include <mach/pxa3xx.h> |
28 | #include <mach/audio.h> | 28 | #include <mach/audio.h> |
29 | #include <mach/pxafb.h> | 29 | #include <mach/pxafb.h> |
30 | #include <mach/zylonite.h> | 30 | #include <mach/zylonite.h> |
@@ -426,6 +426,7 @@ MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") | |||
426 | .map_io = pxa3xx_map_io, | 426 | .map_io = pxa3xx_map_io, |
427 | .nr_irqs = ZYLONITE_NR_IRQS, | 427 | .nr_irqs = ZYLONITE_NR_IRQS, |
428 | .init_irq = pxa3xx_init_irq, | 428 | .init_irq = pxa3xx_init_irq, |
429 | .handle_irq = pxa3xx_handle_irq, | ||
429 | .timer = &pxa_timer, | 430 | .timer = &pxa_timer, |
430 | .init_machine = zylonite_init, | 431 | .init_machine = zylonite_init, |
431 | MACHINE_END | 432 | MACHINE_END |
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c index dd3120df09fe..fc2dc0b3d4fe 100644 --- a/arch/arm/mach-s3c2440/mach-mini2440.c +++ b/arch/arm/mach-s3c2440/mach-mini2440.c | |||
@@ -552,7 +552,7 @@ struct mini2440_features_t { | |||
552 | struct platform_device *optional[8]; | 552 | struct platform_device *optional[8]; |
553 | }; | 553 | }; |
554 | 554 | ||
555 | static void mini2440_parse_features( | 555 | static void __init mini2440_parse_features( |
556 | struct mini2440_features_t * features, | 556 | struct mini2440_features_t * features, |
557 | const char * features_str ) | 557 | const char * features_str ) |
558 | { | 558 | { |
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c index 82db072cb836..5e6b42089eb4 100644 --- a/arch/arm/mach-s3c64xx/dev-spi.c +++ b/arch/arm/mach-s3c64xx/dev-spi.c | |||
@@ -88,6 +88,7 @@ static struct s3c64xx_spi_info s3c64xx_spi0_pdata = { | |||
88 | .cfg_gpio = s3c64xx_spi_cfg_gpio, | 88 | .cfg_gpio = s3c64xx_spi_cfg_gpio, |
89 | .fifo_lvl_mask = 0x7f, | 89 | .fifo_lvl_mask = 0x7f, |
90 | .rx_lvl_offset = 13, | 90 | .rx_lvl_offset = 13, |
91 | .tx_st_done = 21, | ||
91 | }; | 92 | }; |
92 | 93 | ||
93 | static u64 spi_dmamask = DMA_BIT_MASK(32); | 94 | static u64 spi_dmamask = DMA_BIT_MASK(32); |
@@ -132,6 +133,7 @@ static struct s3c64xx_spi_info s3c64xx_spi1_pdata = { | |||
132 | .cfg_gpio = s3c64xx_spi_cfg_gpio, | 133 | .cfg_gpio = s3c64xx_spi_cfg_gpio, |
133 | .fifo_lvl_mask = 0x7f, | 134 | .fifo_lvl_mask = 0x7f, |
134 | .rx_lvl_offset = 13, | 135 | .rx_lvl_offset = 13, |
136 | .tx_st_done = 21, | ||
135 | }; | 137 | }; |
136 | 138 | ||
137 | struct platform_device s3c64xx_device_spi1 = { | 139 | struct platform_device s3c64xx_device_spi1 = { |
diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c index e78ee18c76e3..ac825e826326 100644 --- a/arch/arm/mach-s5p64x0/dev-spi.c +++ b/arch/arm/mach-s5p64x0/dev-spi.c | |||
@@ -112,12 +112,14 @@ static struct s3c64xx_spi_info s5p6440_spi0_pdata = { | |||
112 | .cfg_gpio = s5p6440_spi_cfg_gpio, | 112 | .cfg_gpio = s5p6440_spi_cfg_gpio, |
113 | .fifo_lvl_mask = 0x1ff, | 113 | .fifo_lvl_mask = 0x1ff, |
114 | .rx_lvl_offset = 15, | 114 | .rx_lvl_offset = 15, |
115 | .tx_st_done = 25, | ||
115 | }; | 116 | }; |
116 | 117 | ||
117 | static struct s3c64xx_spi_info s5p6450_spi0_pdata = { | 118 | static struct s3c64xx_spi_info s5p6450_spi0_pdata = { |
118 | .cfg_gpio = s5p6450_spi_cfg_gpio, | 119 | .cfg_gpio = s5p6450_spi_cfg_gpio, |
119 | .fifo_lvl_mask = 0x1ff, | 120 | .fifo_lvl_mask = 0x1ff, |
120 | .rx_lvl_offset = 15, | 121 | .rx_lvl_offset = 15, |
122 | .tx_st_done = 25, | ||
121 | }; | 123 | }; |
122 | 124 | ||
123 | static u64 spi_dmamask = DMA_BIT_MASK(32); | 125 | static u64 spi_dmamask = DMA_BIT_MASK(32); |
@@ -160,12 +162,14 @@ static struct s3c64xx_spi_info s5p6440_spi1_pdata = { | |||
160 | .cfg_gpio = s5p6440_spi_cfg_gpio, | 162 | .cfg_gpio = s5p6440_spi_cfg_gpio, |
161 | .fifo_lvl_mask = 0x7f, | 163 | .fifo_lvl_mask = 0x7f, |
162 | .rx_lvl_offset = 15, | 164 | .rx_lvl_offset = 15, |
165 | .tx_st_done = 25, | ||
163 | }; | 166 | }; |
164 | 167 | ||
165 | static struct s3c64xx_spi_info s5p6450_spi1_pdata = { | 168 | static struct s3c64xx_spi_info s5p6450_spi1_pdata = { |
166 | .cfg_gpio = s5p6450_spi_cfg_gpio, | 169 | .cfg_gpio = s5p6450_spi_cfg_gpio, |
167 | .fifo_lvl_mask = 0x7f, | 170 | .fifo_lvl_mask = 0x7f, |
168 | .rx_lvl_offset = 15, | 171 | .rx_lvl_offset = 15, |
172 | .tx_st_done = 25, | ||
169 | }; | 173 | }; |
170 | 174 | ||
171 | struct platform_device s5p64x0_device_spi1 = { | 175 | struct platform_device s5p64x0_device_spi1 = { |
diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c index 57b19794d9bb..e5d6c4dceb56 100644 --- a/arch/arm/mach-s5pc100/dev-spi.c +++ b/arch/arm/mach-s5pc100/dev-spi.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <mach/dma.h> | 15 | #include <mach/dma.h> |
16 | #include <mach/map.h> | 16 | #include <mach/map.h> |
17 | #include <mach/spi-clocks.h> | 17 | #include <mach/spi-clocks.h> |
18 | #include <mach/irqs.h> | ||
18 | 19 | ||
19 | #include <plat/s3c64xx-spi.h> | 20 | #include <plat/s3c64xx-spi.h> |
20 | #include <plat/gpio-cfg.h> | 21 | #include <plat/gpio-cfg.h> |
@@ -90,6 +91,7 @@ static struct s3c64xx_spi_info s5pc100_spi0_pdata = { | |||
90 | .fifo_lvl_mask = 0x7f, | 91 | .fifo_lvl_mask = 0x7f, |
91 | .rx_lvl_offset = 13, | 92 | .rx_lvl_offset = 13, |
92 | .high_speed = 1, | 93 | .high_speed = 1, |
94 | .tx_st_done = 21, | ||
93 | }; | 95 | }; |
94 | 96 | ||
95 | static u64 spi_dmamask = DMA_BIT_MASK(32); | 97 | static u64 spi_dmamask = DMA_BIT_MASK(32); |
@@ -134,6 +136,7 @@ static struct s3c64xx_spi_info s5pc100_spi1_pdata = { | |||
134 | .fifo_lvl_mask = 0x7f, | 136 | .fifo_lvl_mask = 0x7f, |
135 | .rx_lvl_offset = 13, | 137 | .rx_lvl_offset = 13, |
136 | .high_speed = 1, | 138 | .high_speed = 1, |
139 | .tx_st_done = 21, | ||
137 | }; | 140 | }; |
138 | 141 | ||
139 | struct platform_device s5pc100_device_spi1 = { | 142 | struct platform_device s5pc100_device_spi1 = { |
@@ -176,6 +179,7 @@ static struct s3c64xx_spi_info s5pc100_spi2_pdata = { | |||
176 | .fifo_lvl_mask = 0x7f, | 179 | .fifo_lvl_mask = 0x7f, |
177 | .rx_lvl_offset = 13, | 180 | .rx_lvl_offset = 13, |
178 | .high_speed = 1, | 181 | .high_speed = 1, |
182 | .tx_st_done = 21, | ||
179 | }; | 183 | }; |
180 | 184 | ||
181 | struct platform_device s5pc100_device_spi2 = { | 185 | struct platform_device s5pc100_device_spi2 = { |
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c index e3249a47e3b1..eaf9a7bff7a0 100644 --- a/arch/arm/mach-s5pv210/dev-spi.c +++ b/arch/arm/mach-s5pv210/dev-spi.c | |||
@@ -85,6 +85,7 @@ static struct s3c64xx_spi_info s5pv210_spi0_pdata = { | |||
85 | .fifo_lvl_mask = 0x1ff, | 85 | .fifo_lvl_mask = 0x1ff, |
86 | .rx_lvl_offset = 15, | 86 | .rx_lvl_offset = 15, |
87 | .high_speed = 1, | 87 | .high_speed = 1, |
88 | .tx_st_done = 25, | ||
88 | }; | 89 | }; |
89 | 90 | ||
90 | static u64 spi_dmamask = DMA_BIT_MASK(32); | 91 | static u64 spi_dmamask = DMA_BIT_MASK(32); |
@@ -129,6 +130,7 @@ static struct s3c64xx_spi_info s5pv210_spi1_pdata = { | |||
129 | .fifo_lvl_mask = 0x7f, | 130 | .fifo_lvl_mask = 0x7f, |
130 | .rx_lvl_offset = 15, | 131 | .rx_lvl_offset = 15, |
131 | .high_speed = 1, | 132 | .high_speed = 1, |
133 | .tx_st_done = 25, | ||
132 | }; | 134 | }; |
133 | 135 | ||
134 | struct platform_device s5pv210_device_spi1 = { | 136 | struct platform_device s5pv210_device_spi1 = { |
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c index 1e2aba23e0d6..ce5c2513c6ce 100644 --- a/arch/arm/mach-shmobile/board-ag5evm.c +++ b/arch/arm/mach-shmobile/board-ag5evm.c | |||
@@ -381,7 +381,7 @@ void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state) | |||
381 | gpio_set_value(GPIO_PORT114, state); | 381 | gpio_set_value(GPIO_PORT114, state); |
382 | } | 382 | } |
383 | 383 | ||
384 | static struct sh_mobile_sdhi_info sh_sdhi1_platdata = { | 384 | static struct sh_mobile_sdhi_info sh_sdhi1_info = { |
385 | .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE, | 385 | .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE, |
386 | .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ, | 386 | .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ, |
387 | .tmio_ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | 387 | .tmio_ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, |
@@ -413,7 +413,7 @@ static struct platform_device sdhi1_device = { | |||
413 | .name = "sh_mobile_sdhi", | 413 | .name = "sh_mobile_sdhi", |
414 | .id = 1, | 414 | .id = 1, |
415 | .dev = { | 415 | .dev = { |
416 | .platform_data = &sh_sdhi1_platdata, | 416 | .platform_data = &sh_sdhi1_info, |
417 | }, | 417 | }, |
418 | .num_resources = ARRAY_SIZE(sdhi1_resources), | 418 | .num_resources = ARRAY_SIZE(sdhi1_resources), |
419 | .resource = sdhi1_resources, | 419 | .resource = sdhi1_resources, |
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index f6b687f61c28..803bc6edfca4 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c | |||
@@ -913,7 +913,7 @@ static struct i2c_board_info imx074_info = { | |||
913 | I2C_BOARD_INFO("imx074", 0x1a), | 913 | I2C_BOARD_INFO("imx074", 0x1a), |
914 | }; | 914 | }; |
915 | 915 | ||
916 | struct soc_camera_link imx074_link = { | 916 | static struct soc_camera_link imx074_link = { |
917 | .bus_id = 0, | 917 | .bus_id = 0, |
918 | .board_info = &imx074_info, | 918 | .board_info = &imx074_info, |
919 | .i2c_adapter_id = 0, | 919 | .i2c_adapter_id = 0, |
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index 7e1d37584321..3802f2afabef 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c | |||
@@ -1287,9 +1287,9 @@ static struct platform_device *mackerel_devices[] __initdata = { | |||
1287 | &nor_flash_device, | 1287 | &nor_flash_device, |
1288 | &smc911x_device, | 1288 | &smc911x_device, |
1289 | &lcdc_device, | 1289 | &lcdc_device, |
1290 | &usbhs0_device, | ||
1291 | &usb1_host_device, | 1290 | &usb1_host_device, |
1292 | &usbhs1_device, | 1291 | &usbhs1_device, |
1292 | &usbhs0_device, | ||
1293 | &leds_device, | 1293 | &leds_device, |
1294 | &fsi_device, | 1294 | &fsi_device, |
1295 | &fsi_ak4643_device, | 1295 | &fsi_ak4643_device, |
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c index 30e18bc60647..846cd7d69e3e 100644 --- a/arch/arm/mach-tegra/board-harmony.c +++ b/arch/arm/mach-tegra/board-harmony.c | |||
@@ -25,7 +25,6 @@ | |||
25 | #include <linux/io.h> | 25 | #include <linux/io.h> |
26 | #include <linux/gpio.h> | 26 | #include <linux/gpio.h> |
27 | #include <linux/i2c.h> | 27 | #include <linux/i2c.h> |
28 | #include <linux/i2c-tegra.h> | ||
29 | 28 | ||
30 | #include <sound/wm8903.h> | 29 | #include <sound/wm8903.h> |
31 | 30 | ||
@@ -83,22 +82,6 @@ static struct platform_device harmony_audio_device = { | |||
83 | }, | 82 | }, |
84 | }; | 83 | }; |
85 | 84 | ||
86 | static struct tegra_i2c_platform_data harmony_i2c1_platform_data = { | ||
87 | .bus_clk_rate = 400000, | ||
88 | }; | ||
89 | |||
90 | static struct tegra_i2c_platform_data harmony_i2c2_platform_data = { | ||
91 | .bus_clk_rate = 400000, | ||
92 | }; | ||
93 | |||
94 | static struct tegra_i2c_platform_data harmony_i2c3_platform_data = { | ||
95 | .bus_clk_rate = 400000, | ||
96 | }; | ||
97 | |||
98 | static struct tegra_i2c_platform_data harmony_dvc_platform_data = { | ||
99 | .bus_clk_rate = 400000, | ||
100 | }; | ||
101 | |||
102 | static struct wm8903_platform_data harmony_wm8903_pdata = { | 85 | static struct wm8903_platform_data harmony_wm8903_pdata = { |
103 | .irq_active_low = 0, | 86 | .irq_active_low = 0, |
104 | .micdet_cfg = 0, | 87 | .micdet_cfg = 0, |
@@ -121,11 +104,6 @@ static struct i2c_board_info __initdata wm8903_board_info = { | |||
121 | 104 | ||
122 | static void __init harmony_i2c_init(void) | 105 | static void __init harmony_i2c_init(void) |
123 | { | 106 | { |
124 | tegra_i2c_device1.dev.platform_data = &harmony_i2c1_platform_data; | ||
125 | tegra_i2c_device2.dev.platform_data = &harmony_i2c2_platform_data; | ||
126 | tegra_i2c_device3.dev.platform_data = &harmony_i2c3_platform_data; | ||
127 | tegra_i2c_device4.dev.platform_data = &harmony_dvc_platform_data; | ||
128 | |||
129 | platform_device_register(&tegra_i2c_device1); | 107 | platform_device_register(&tegra_i2c_device1); |
130 | platform_device_register(&tegra_i2c_device2); | 108 | platform_device_register(&tegra_i2c_device2); |
131 | platform_device_register(&tegra_i2c_device3); | 109 | platform_device_register(&tegra_i2c_device3); |
diff --git a/arch/arm/mach-tegra/board-paz00-pinmux.c b/arch/arm/mach-tegra/board-paz00-pinmux.c index 2643d1bd568b..bdd2627dd87b 100644 --- a/arch/arm/mach-tegra/board-paz00-pinmux.c +++ b/arch/arm/mach-tegra/board-paz00-pinmux.c | |||
@@ -141,12 +141,10 @@ static struct tegra_pingroup_config paz00_pinmux[] = { | |||
141 | }; | 141 | }; |
142 | 142 | ||
143 | static struct tegra_gpio_table gpio_table[] = { | 143 | static struct tegra_gpio_table gpio_table[] = { |
144 | { .gpio = TEGRA_GPIO_SD1_CD, .enable = true }, | 144 | { .gpio = TEGRA_GPIO_SD1_CD, .enable = true }, |
145 | { .gpio = TEGRA_GPIO_SD1_WP, .enable = true }, | 145 | { .gpio = TEGRA_GPIO_SD1_WP, .enable = true }, |
146 | { .gpio = TEGRA_GPIO_SD1_POWER, .enable = true }, | 146 | { .gpio = TEGRA_GPIO_SD1_POWER, .enable = true }, |
147 | { .gpio = TEGRA_GPIO_SD4_CD, .enable = true }, | 147 | { .gpio = TEGRA_ULPI_RST, .enable = true }, |
148 | { .gpio = TEGRA_GPIO_SD4_WP, .enable = true }, | ||
149 | { .gpio = TEGRA_GPIO_SD4_POWER, .enable = true }, | ||
150 | }; | 148 | }; |
151 | 149 | ||
152 | void paz00_pinmux_init(void) | 150 | void paz00_pinmux_init(void) |
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c index 57e50a823eec..ea2f79c9879b 100644 --- a/arch/arm/mach-tegra/board-paz00.c +++ b/arch/arm/mach-tegra/board-paz00.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/dma-mapping.h> | 25 | #include <linux/dma-mapping.h> |
26 | #include <linux/pda_power.h> | 26 | #include <linux/pda_power.h> |
27 | #include <linux/io.h> | 27 | #include <linux/io.h> |
28 | #include <linux/i2c.h> | ||
28 | 29 | ||
29 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
30 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
@@ -34,6 +35,7 @@ | |||
34 | #include <mach/iomap.h> | 35 | #include <mach/iomap.h> |
35 | #include <mach/irqs.h> | 36 | #include <mach/irqs.h> |
36 | #include <mach/sdhci.h> | 37 | #include <mach/sdhci.h> |
38 | #include <mach/gpio.h> | ||
37 | 39 | ||
38 | #include "board.h" | 40 | #include "board.h" |
39 | #include "board-paz00.h" | 41 | #include "board-paz00.h" |
@@ -66,10 +68,22 @@ static struct platform_device debug_uart = { | |||
66 | static struct platform_device *paz00_devices[] __initdata = { | 68 | static struct platform_device *paz00_devices[] __initdata = { |
67 | &debug_uart, | 69 | &debug_uart, |
68 | &tegra_sdhci_device1, | 70 | &tegra_sdhci_device1, |
69 | &tegra_sdhci_device2, | ||
70 | &tegra_sdhci_device4, | 71 | &tegra_sdhci_device4, |
71 | }; | 72 | }; |
72 | 73 | ||
74 | static void paz00_i2c_init(void) | ||
75 | { | ||
76 | platform_device_register(&tegra_i2c_device1); | ||
77 | platform_device_register(&tegra_i2c_device2); | ||
78 | platform_device_register(&tegra_i2c_device4); | ||
79 | } | ||
80 | |||
81 | static void paz00_usb_init(void) | ||
82 | { | ||
83 | platform_device_register(&tegra_ehci2_device); | ||
84 | platform_device_register(&tegra_ehci3_device); | ||
85 | } | ||
86 | |||
73 | static void __init tegra_paz00_fixup(struct machine_desc *desc, | 87 | static void __init tegra_paz00_fixup(struct machine_desc *desc, |
74 | struct tag *tags, char **cmdline, struct meminfo *mi) | 88 | struct tag *tags, char **cmdline, struct meminfo *mi) |
75 | { | 89 | { |
@@ -84,23 +98,16 @@ static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = { | |||
84 | { NULL, NULL, 0, 0}, | 98 | { NULL, NULL, 0, 0}, |
85 | }; | 99 | }; |
86 | 100 | ||
87 | |||
88 | static struct tegra_sdhci_platform_data sdhci_pdata1 = { | 101 | static struct tegra_sdhci_platform_data sdhci_pdata1 = { |
89 | .cd_gpio = TEGRA_GPIO_SD1_CD, | 102 | .cd_gpio = TEGRA_GPIO_SD1_CD, |
90 | .wp_gpio = TEGRA_GPIO_SD1_WP, | 103 | .wp_gpio = TEGRA_GPIO_SD1_WP, |
91 | .power_gpio = TEGRA_GPIO_SD1_POWER, | 104 | .power_gpio = TEGRA_GPIO_SD1_POWER, |
92 | }; | 105 | }; |
93 | 106 | ||
94 | static struct tegra_sdhci_platform_data sdhci_pdata2 = { | 107 | static struct tegra_sdhci_platform_data sdhci_pdata4 = { |
95 | .cd_gpio = -1, | 108 | .cd_gpio = -1, |
96 | .wp_gpio = -1, | 109 | .wp_gpio = -1, |
97 | .power_gpio = -1, | 110 | .power_gpio = -1, |
98 | }; | ||
99 | |||
100 | static struct tegra_sdhci_platform_data sdhci_pdata4 = { | ||
101 | .cd_gpio = TEGRA_GPIO_SD4_CD, | ||
102 | .wp_gpio = TEGRA_GPIO_SD4_WP, | ||
103 | .power_gpio = TEGRA_GPIO_SD4_POWER, | ||
104 | .is_8bit = 1, | 111 | .is_8bit = 1, |
105 | }; | 112 | }; |
106 | 113 | ||
@@ -111,13 +118,15 @@ static void __init tegra_paz00_init(void) | |||
111 | paz00_pinmux_init(); | 118 | paz00_pinmux_init(); |
112 | 119 | ||
113 | tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1; | 120 | tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1; |
114 | tegra_sdhci_device2.dev.platform_data = &sdhci_pdata2; | ||
115 | tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4; | 121 | tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4; |
116 | 122 | ||
117 | platform_add_devices(paz00_devices, ARRAY_SIZE(paz00_devices)); | 123 | platform_add_devices(paz00_devices, ARRAY_SIZE(paz00_devices)); |
124 | |||
125 | paz00_i2c_init(); | ||
126 | paz00_usb_init(); | ||
118 | } | 127 | } |
119 | 128 | ||
120 | MACHINE_START(PAZ00, "paz00") | 129 | MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ") |
121 | .boot_params = 0x00000100, | 130 | .boot_params = 0x00000100, |
122 | .fixup = tegra_paz00_fixup, | 131 | .fixup = tegra_paz00_fixup, |
123 | .map_io = tegra_map_common_io, | 132 | .map_io = tegra_map_common_io, |
diff --git a/arch/arm/mach-tegra/board-paz00.h b/arch/arm/mach-tegra/board-paz00.h index da193ca76d3b..d4ff39ddaeb3 100644 --- a/arch/arm/mach-tegra/board-paz00.h +++ b/arch/arm/mach-tegra/board-paz00.h | |||
@@ -17,12 +17,10 @@ | |||
17 | #ifndef _MACH_TEGRA_BOARD_PAZ00_H | 17 | #ifndef _MACH_TEGRA_BOARD_PAZ00_H |
18 | #define _MACH_TEGRA_BOARD_PAZ00_H | 18 | #define _MACH_TEGRA_BOARD_PAZ00_H |
19 | 19 | ||
20 | #define TEGRA_GPIO_SD1_CD TEGRA_GPIO_PV5 | 20 | #define TEGRA_GPIO_SD1_CD TEGRA_GPIO_PV5 |
21 | #define TEGRA_GPIO_SD1_WP TEGRA_GPIO_PH1 | 21 | #define TEGRA_GPIO_SD1_WP TEGRA_GPIO_PH1 |
22 | #define TEGRA_GPIO_SD1_POWER TEGRA_GPIO_PT3 | 22 | #define TEGRA_GPIO_SD1_POWER TEGRA_GPIO_PT3 |
23 | #define TEGRA_GPIO_SD4_CD TEGRA_GPIO_PH2 | 23 | #define TEGRA_ULPI_RST TEGRA_GPIO_PV0 |
24 | #define TEGRA_GPIO_SD4_WP TEGRA_GPIO_PH3 | ||
25 | #define TEGRA_GPIO_SD4_POWER TEGRA_GPIO_PI6 | ||
26 | 24 | ||
27 | void paz00_pinmux_init(void); | 25 | void paz00_pinmux_init(void); |
28 | 26 | ||
diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c index a8d7ace9f958..46d5df90c79e 100644 --- a/arch/arm/mach-tegra/board-seaboard.c +++ b/arch/arm/mach-tegra/board-seaboard.c | |||
@@ -19,7 +19,6 @@ | |||
19 | #include <linux/platform_device.h> | 19 | #include <linux/platform_device.h> |
20 | #include <linux/serial_8250.h> | 20 | #include <linux/serial_8250.h> |
21 | #include <linux/i2c.h> | 21 | #include <linux/i2c.h> |
22 | #include <linux/i2c-tegra.h> | ||
23 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
24 | #include <linux/input.h> | 23 | #include <linux/input.h> |
25 | #include <linux/io.h> | 24 | #include <linux/io.h> |
@@ -66,22 +65,6 @@ static __initdata struct tegra_clk_init_table seaboard_clk_init_table[] = { | |||
66 | { NULL, NULL, 0, 0}, | 65 | { NULL, NULL, 0, 0}, |
67 | }; | 66 | }; |
68 | 67 | ||
69 | static struct tegra_i2c_platform_data seaboard_i2c1_platform_data = { | ||
70 | .bus_clk_rate = 400000. | ||
71 | }; | ||
72 | |||
73 | static struct tegra_i2c_platform_data seaboard_i2c2_platform_data = { | ||
74 | .bus_clk_rate = 400000, | ||
75 | }; | ||
76 | |||
77 | static struct tegra_i2c_platform_data seaboard_i2c3_platform_data = { | ||
78 | .bus_clk_rate = 400000, | ||
79 | }; | ||
80 | |||
81 | static struct tegra_i2c_platform_data seaboard_dvc_platform_data = { | ||
82 | .bus_clk_rate = 400000, | ||
83 | }; | ||
84 | |||
85 | static struct gpio_keys_button seaboard_gpio_keys_buttons[] = { | 68 | static struct gpio_keys_button seaboard_gpio_keys_buttons[] = { |
86 | { | 69 | { |
87 | .code = SW_LID, | 70 | .code = SW_LID, |
@@ -137,9 +120,9 @@ static struct tegra_sdhci_platform_data sdhci_pdata4 = { | |||
137 | static struct platform_device *seaboard_devices[] __initdata = { | 120 | static struct platform_device *seaboard_devices[] __initdata = { |
138 | &debug_uart, | 121 | &debug_uart, |
139 | &tegra_pmu_device, | 122 | &tegra_pmu_device, |
140 | &tegra_sdhci_device1, | ||
141 | &tegra_sdhci_device3, | ||
142 | &tegra_sdhci_device4, | 123 | &tegra_sdhci_device4, |
124 | &tegra_sdhci_device3, | ||
125 | &tegra_sdhci_device1, | ||
143 | &seaboard_gpio_keys_device, | 126 | &seaboard_gpio_keys_device, |
144 | }; | 127 | }; |
145 | 128 | ||
@@ -161,11 +144,6 @@ static void __init seaboard_i2c_init(void) | |||
161 | 144 | ||
162 | i2c_register_board_info(4, &adt7461_device, 1); | 145 | i2c_register_board_info(4, &adt7461_device, 1); |
163 | 146 | ||
164 | tegra_i2c_device1.dev.platform_data = &seaboard_i2c1_platform_data; | ||
165 | tegra_i2c_device2.dev.platform_data = &seaboard_i2c2_platform_data; | ||
166 | tegra_i2c_device3.dev.platform_data = &seaboard_i2c3_platform_data; | ||
167 | tegra_i2c_device4.dev.platform_data = &seaboard_dvc_platform_data; | ||
168 | |||
169 | platform_device_register(&tegra_i2c_device1); | 147 | platform_device_register(&tegra_i2c_device1); |
170 | platform_device_register(&tegra_i2c_device2); | 148 | platform_device_register(&tegra_i2c_device2); |
171 | platform_device_register(&tegra_i2c_device3); | 149 | platform_device_register(&tegra_i2c_device3); |
diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c index 13534fa08abf..82646a411ecd 100644 --- a/arch/arm/mach-tegra/board-trimslice-pinmux.c +++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c | |||
@@ -29,7 +29,7 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = { | |||
29 | {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | 29 | {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, |
30 | {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | 30 | {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, |
31 | {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | 31 | {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, |
32 | {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_OSC, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, | 32 | {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, |
33 | {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, | 33 | {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, |
34 | {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | 34 | {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, |
35 | {TEGRA_PINGROUP_CSUS, TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, | 35 | {TEGRA_PINGROUP_CSUS, TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, |
@@ -126,7 +126,7 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = { | |||
126 | {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, | 126 | {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, |
127 | {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, | 127 | {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, |
128 | {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, | 128 | {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, |
129 | {TEGRA_PINGROUP_UAC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | 129 | {TEGRA_PINGROUP_UAC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, |
130 | {TEGRA_PINGROUP_UAD, TEGRA_MUX_IRDA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, | 130 | {TEGRA_PINGROUP_UAD, TEGRA_MUX_IRDA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, |
131 | {TEGRA_PINGROUP_UCA, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, | 131 | {TEGRA_PINGROUP_UCA, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, |
132 | {TEGRA_PINGROUP_UCB, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, | 132 | {TEGRA_PINGROUP_UCB, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, |
@@ -145,6 +145,9 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = { | |||
145 | static struct tegra_gpio_table gpio_table[] = { | 145 | static struct tegra_gpio_table gpio_table[] = { |
146 | { .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */ | 146 | { .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */ |
147 | { .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */ | 147 | { .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */ |
148 | |||
149 | { .gpio = TRIMSLICE_GPIO_USB1_MODE, .enable = true }, /* USB1 mode */ | ||
150 | { .gpio = TRIMSLICE_GPIO_USB2_RST, .enable = true }, /* USB2 PHY rst */ | ||
148 | }; | 151 | }; |
149 | 152 | ||
150 | void __init trimslice_pinmux_init(void) | 153 | void __init trimslice_pinmux_init(void) |
diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c index cda4cfd78e84..89a6d2adc1de 100644 --- a/arch/arm/mach-tegra/board-trimslice.c +++ b/arch/arm/mach-tegra/board-trimslice.c | |||
@@ -23,6 +23,8 @@ | |||
23 | #include <linux/platform_device.h> | 23 | #include <linux/platform_device.h> |
24 | #include <linux/serial_8250.h> | 24 | #include <linux/serial_8250.h> |
25 | #include <linux/io.h> | 25 | #include <linux/io.h> |
26 | #include <linux/i2c.h> | ||
27 | #include <linux/gpio.h> | ||
26 | 28 | ||
27 | #include <asm/mach-types.h> | 29 | #include <asm/mach-types.h> |
28 | #include <asm/mach/arch.h> | 30 | #include <asm/mach/arch.h> |
@@ -30,6 +32,7 @@ | |||
30 | 32 | ||
31 | #include <mach/iomap.h> | 33 | #include <mach/iomap.h> |
32 | #include <mach/sdhci.h> | 34 | #include <mach/sdhci.h> |
35 | #include <mach/gpio.h> | ||
33 | 36 | ||
34 | #include "board.h" | 37 | #include "board.h" |
35 | #include "clock.h" | 38 | #include "clock.h" |
@@ -71,12 +74,58 @@ static struct tegra_sdhci_platform_data sdhci_pdata4 = { | |||
71 | .power_gpio = -1, | 74 | .power_gpio = -1, |
72 | }; | 75 | }; |
73 | 76 | ||
77 | static struct platform_device trimslice_audio_device = { | ||
78 | .name = "tegra-snd-trimslice", | ||
79 | .id = 0, | ||
80 | }; | ||
81 | |||
74 | static struct platform_device *trimslice_devices[] __initdata = { | 82 | static struct platform_device *trimslice_devices[] __initdata = { |
75 | &debug_uart, | 83 | &debug_uart, |
76 | &tegra_sdhci_device1, | 84 | &tegra_sdhci_device1, |
77 | &tegra_sdhci_device4, | 85 | &tegra_sdhci_device4, |
86 | &tegra_i2s_device1, | ||
87 | &tegra_das_device, | ||
88 | &tegra_pcm_device, | ||
89 | &trimslice_audio_device, | ||
78 | }; | 90 | }; |
79 | 91 | ||
92 | static struct i2c_board_info trimslice_i2c3_board_info[] = { | ||
93 | { | ||
94 | I2C_BOARD_INFO("tlv320aic23", 0x1a), | ||
95 | }, | ||
96 | { | ||
97 | I2C_BOARD_INFO("em3027", 0x56), | ||
98 | }, | ||
99 | }; | ||
100 | |||
101 | static void trimslice_i2c_init(void) | ||
102 | { | ||
103 | platform_device_register(&tegra_i2c_device1); | ||
104 | platform_device_register(&tegra_i2c_device2); | ||
105 | platform_device_register(&tegra_i2c_device3); | ||
106 | |||
107 | i2c_register_board_info(2, trimslice_i2c3_board_info, | ||
108 | ARRAY_SIZE(trimslice_i2c3_board_info)); | ||
109 | } | ||
110 | |||
111 | static void trimslice_usb_init(void) | ||
112 | { | ||
113 | int err; | ||
114 | |||
115 | platform_device_register(&tegra_ehci3_device); | ||
116 | |||
117 | platform_device_register(&tegra_ehci2_device); | ||
118 | |||
119 | err = gpio_request_one(TRIMSLICE_GPIO_USB1_MODE, GPIOF_OUT_INIT_HIGH, | ||
120 | "usb1mode"); | ||
121 | if (err) { | ||
122 | pr_err("TrimSlice: failed to obtain USB1 mode gpio: %d\n", err); | ||
123 | return; | ||
124 | } | ||
125 | |||
126 | platform_device_register(&tegra_ehci1_device); | ||
127 | } | ||
128 | |||
80 | static void __init tegra_trimslice_fixup(struct machine_desc *desc, | 129 | static void __init tegra_trimslice_fixup(struct machine_desc *desc, |
81 | struct tag *tags, char **cmdline, struct meminfo *mi) | 130 | struct tag *tags, char **cmdline, struct meminfo *mi) |
82 | { | 131 | { |
@@ -90,6 +139,10 @@ static void __init tegra_trimslice_fixup(struct machine_desc *desc, | |||
90 | static __initdata struct tegra_clk_init_table trimslice_clk_init_table[] = { | 139 | static __initdata struct tegra_clk_init_table trimslice_clk_init_table[] = { |
91 | /* name parent rate enabled */ | 140 | /* name parent rate enabled */ |
92 | { "uarta", "pll_p", 216000000, true }, | 141 | { "uarta", "pll_p", 216000000, true }, |
142 | { "pll_a", "pll_p_out1", 56448000, true }, | ||
143 | { "pll_a_out0", "pll_a", 11289600, true }, | ||
144 | { "cdev1", NULL, 0, true }, | ||
145 | { "i2s1", "pll_a_out0", 11289600, false}, | ||
93 | { NULL, NULL, 0, 0}, | 146 | { NULL, NULL, 0, 0}, |
94 | }; | 147 | }; |
95 | 148 | ||
@@ -112,6 +165,9 @@ static void __init tegra_trimslice_init(void) | |||
112 | tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4; | 165 | tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4; |
113 | 166 | ||
114 | platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices)); | 167 | platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices)); |
168 | |||
169 | trimslice_i2c_init(); | ||
170 | trimslice_usb_init(); | ||
115 | } | 171 | } |
116 | 172 | ||
117 | MACHINE_START(TRIMSLICE, "trimslice") | 173 | MACHINE_START(TRIMSLICE, "trimslice") |
diff --git a/arch/arm/mach-tegra/board-trimslice.h b/arch/arm/mach-tegra/board-trimslice.h index e8ef6291c6f1..7a7dee86b4da 100644 --- a/arch/arm/mach-tegra/board-trimslice.h +++ b/arch/arm/mach-tegra/board-trimslice.h | |||
@@ -20,6 +20,9 @@ | |||
20 | #define TRIMSLICE_GPIO_SD4_CD TEGRA_GPIO_PP1 /* mmc4 cd */ | 20 | #define TRIMSLICE_GPIO_SD4_CD TEGRA_GPIO_PP1 /* mmc4 cd */ |
21 | #define TRIMSLICE_GPIO_SD4_WP TEGRA_GPIO_PP2 /* mmc4 wp */ | 21 | #define TRIMSLICE_GPIO_SD4_WP TEGRA_GPIO_PP2 /* mmc4 wp */ |
22 | 22 | ||
23 | #define TRIMSLICE_GPIO_USB1_MODE TEGRA_GPIO_PV2 /* USB1 mode */ | ||
24 | #define TRIMSLICE_GPIO_USB2_RST TEGRA_GPIO_PV0 /* USB2 PHY reset */ | ||
25 | |||
23 | void trimslice_pinmux_init(void); | 26 | void trimslice_pinmux_init(void); |
24 | 27 | ||
25 | #endif | 28 | #endif |
diff --git a/arch/arm/mach-tegra/devices.c b/arch/arm/mach-tegra/devices.c index 1528f9daef1f..57e35d20c24c 100644 --- a/arch/arm/mach-tegra/devices.c +++ b/arch/arm/mach-tegra/devices.c | |||
@@ -22,10 +22,14 @@ | |||
22 | #include <linux/dma-mapping.h> | 22 | #include <linux/dma-mapping.h> |
23 | #include <linux/fsl_devices.h> | 23 | #include <linux/fsl_devices.h> |
24 | #include <linux/serial_8250.h> | 24 | #include <linux/serial_8250.h> |
25 | #include <linux/i2c-tegra.h> | ||
26 | #include <linux/platform_data/tegra_usb.h> | ||
25 | #include <asm/pmu.h> | 27 | #include <asm/pmu.h> |
26 | #include <mach/irqs.h> | 28 | #include <mach/irqs.h> |
27 | #include <mach/iomap.h> | 29 | #include <mach/iomap.h> |
28 | #include <mach/dma.h> | 30 | #include <mach/dma.h> |
31 | #include <mach/usb_phy.h> | ||
32 | #include "gpio-names.h" | ||
29 | 33 | ||
30 | static struct resource i2c_resource1[] = { | 34 | static struct resource i2c_resource1[] = { |
31 | [0] = { | 35 | [0] = { |
@@ -79,13 +83,29 @@ static struct resource i2c_resource4[] = { | |||
79 | }, | 83 | }, |
80 | }; | 84 | }; |
81 | 85 | ||
86 | static struct tegra_i2c_platform_data tegra_i2c1_platform_data = { | ||
87 | .bus_clk_rate = 400000, | ||
88 | }; | ||
89 | |||
90 | static struct tegra_i2c_platform_data tegra_i2c2_platform_data = { | ||
91 | .bus_clk_rate = 400000, | ||
92 | }; | ||
93 | |||
94 | static struct tegra_i2c_platform_data tegra_i2c3_platform_data = { | ||
95 | .bus_clk_rate = 400000, | ||
96 | }; | ||
97 | |||
98 | static struct tegra_i2c_platform_data tegra_dvc_platform_data = { | ||
99 | .bus_clk_rate = 400000, | ||
100 | }; | ||
101 | |||
82 | struct platform_device tegra_i2c_device1 = { | 102 | struct platform_device tegra_i2c_device1 = { |
83 | .name = "tegra-i2c", | 103 | .name = "tegra-i2c", |
84 | .id = 0, | 104 | .id = 0, |
85 | .resource = i2c_resource1, | 105 | .resource = i2c_resource1, |
86 | .num_resources = ARRAY_SIZE(i2c_resource1), | 106 | .num_resources = ARRAY_SIZE(i2c_resource1), |
87 | .dev = { | 107 | .dev = { |
88 | .platform_data = 0, | 108 | .platform_data = &tegra_i2c1_platform_data, |
89 | }, | 109 | }, |
90 | }; | 110 | }; |
91 | 111 | ||
@@ -95,7 +115,7 @@ struct platform_device tegra_i2c_device2 = { | |||
95 | .resource = i2c_resource2, | 115 | .resource = i2c_resource2, |
96 | .num_resources = ARRAY_SIZE(i2c_resource2), | 116 | .num_resources = ARRAY_SIZE(i2c_resource2), |
97 | .dev = { | 117 | .dev = { |
98 | .platform_data = 0, | 118 | .platform_data = &tegra_i2c2_platform_data, |
99 | }, | 119 | }, |
100 | }; | 120 | }; |
101 | 121 | ||
@@ -105,7 +125,7 @@ struct platform_device tegra_i2c_device3 = { | |||
105 | .resource = i2c_resource3, | 125 | .resource = i2c_resource3, |
106 | .num_resources = ARRAY_SIZE(i2c_resource3), | 126 | .num_resources = ARRAY_SIZE(i2c_resource3), |
107 | .dev = { | 127 | .dev = { |
108 | .platform_data = 0, | 128 | .platform_data = &tegra_i2c3_platform_data, |
109 | }, | 129 | }, |
110 | }; | 130 | }; |
111 | 131 | ||
@@ -115,7 +135,7 @@ struct platform_device tegra_i2c_device4 = { | |||
115 | .resource = i2c_resource4, | 135 | .resource = i2c_resource4, |
116 | .num_resources = ARRAY_SIZE(i2c_resource4), | 136 | .num_resources = ARRAY_SIZE(i2c_resource4), |
117 | .dev = { | 137 | .dev = { |
118 | .platform_data = 0, | 138 | .platform_data = &tegra_dvc_platform_data, |
119 | }, | 139 | }, |
120 | }; | 140 | }; |
121 | 141 | ||
@@ -334,6 +354,28 @@ static struct resource tegra_usb3_resources[] = { | |||
334 | }, | 354 | }, |
335 | }; | 355 | }; |
336 | 356 | ||
357 | static struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = { | ||
358 | /* All existing boards use GPIO PV0 for phy reset */ | ||
359 | .reset_gpio = TEGRA_GPIO_PV0, | ||
360 | .clk = "cdev2", | ||
361 | }; | ||
362 | |||
363 | static struct tegra_ehci_platform_data tegra_ehci1_pdata = { | ||
364 | .operating_mode = TEGRA_USB_OTG, | ||
365 | .power_down_on_bus_suspend = 1, | ||
366 | }; | ||
367 | |||
368 | static struct tegra_ehci_platform_data tegra_ehci2_pdata = { | ||
369 | .phy_config = &tegra_ehci2_ulpi_phy_config, | ||
370 | .operating_mode = TEGRA_USB_HOST, | ||
371 | .power_down_on_bus_suspend = 1, | ||
372 | }; | ||
373 | |||
374 | static struct tegra_ehci_platform_data tegra_ehci3_pdata = { | ||
375 | .operating_mode = TEGRA_USB_HOST, | ||
376 | .power_down_on_bus_suspend = 1, | ||
377 | }; | ||
378 | |||
337 | static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32); | 379 | static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32); |
338 | 380 | ||
339 | struct platform_device tegra_ehci1_device = { | 381 | struct platform_device tegra_ehci1_device = { |
@@ -342,6 +384,7 @@ struct platform_device tegra_ehci1_device = { | |||
342 | .dev = { | 384 | .dev = { |
343 | .dma_mask = &tegra_ehci_dmamask, | 385 | .dma_mask = &tegra_ehci_dmamask, |
344 | .coherent_dma_mask = DMA_BIT_MASK(32), | 386 | .coherent_dma_mask = DMA_BIT_MASK(32), |
387 | .platform_data = &tegra_ehci1_pdata, | ||
345 | }, | 388 | }, |
346 | .resource = tegra_usb1_resources, | 389 | .resource = tegra_usb1_resources, |
347 | .num_resources = ARRAY_SIZE(tegra_usb1_resources), | 390 | .num_resources = ARRAY_SIZE(tegra_usb1_resources), |
@@ -353,6 +396,7 @@ struct platform_device tegra_ehci2_device = { | |||
353 | .dev = { | 396 | .dev = { |
354 | .dma_mask = &tegra_ehci_dmamask, | 397 | .dma_mask = &tegra_ehci_dmamask, |
355 | .coherent_dma_mask = DMA_BIT_MASK(32), | 398 | .coherent_dma_mask = DMA_BIT_MASK(32), |
399 | .platform_data = &tegra_ehci2_pdata, | ||
356 | }, | 400 | }, |
357 | .resource = tegra_usb2_resources, | 401 | .resource = tegra_usb2_resources, |
358 | .num_resources = ARRAY_SIZE(tegra_usb2_resources), | 402 | .num_resources = ARRAY_SIZE(tegra_usb2_resources), |
@@ -364,6 +408,7 @@ struct platform_device tegra_ehci3_device = { | |||
364 | .dev = { | 408 | .dev = { |
365 | .dma_mask = &tegra_ehci_dmamask, | 409 | .dma_mask = &tegra_ehci_dmamask, |
366 | .coherent_dma_mask = DMA_BIT_MASK(32), | 410 | .coherent_dma_mask = DMA_BIT_MASK(32), |
411 | .platform_data = &tegra_ehci3_pdata, | ||
367 | }, | 412 | }, |
368 | .resource = tegra_usb3_resources, | 413 | .resource = tegra_usb3_resources, |
369 | .num_resources = ARRAY_SIZE(tegra_usb3_resources), | 414 | .num_resources = ARRAY_SIZE(tegra_usb3_resources), |
diff --git a/arch/arm/mach-tegra/include/mach/barriers.h b/arch/arm/mach-tegra/include/mach/barriers.h deleted file mode 100644 index 425b42e91ef6..000000000000 --- a/arch/arm/mach-tegra/include/mach/barriers.h +++ /dev/null | |||
@@ -1,30 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-realview/include/mach/barriers.h | ||
3 | * | ||
4 | * Copyright (C) 2010 ARM Ltd. | ||
5 | * Written by Catalin Marinas <catalin.marinas@arm.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #ifndef __MACH_BARRIERS_H | ||
22 | #define __MACH_BARRIERS_H | ||
23 | |||
24 | #include <asm/outercache.h> | ||
25 | |||
26 | #define rmb() dsb() | ||
27 | #define wmb() do { dsb(); outer_sync(); } while (0) | ||
28 | #define mb() wmb() | ||
29 | |||
30 | #endif /* __MACH_BARRIERS_H */ | ||
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c index b8ae3c978dee..468523c72b43 100644 --- a/arch/arm/mach-tegra/platsmp.c +++ b/arch/arm/mach-tegra/platsmp.c | |||
@@ -122,7 +122,7 @@ void __init smp_init_cpus(void) | |||
122 | } | 122 | } |
123 | 123 | ||
124 | for (i = 0; i < ncores; i++) | 124 | for (i = 0; i < ncores; i++) |
125 | cpu_set(i, cpu_possible_map); | 125 | set_cpu_possible(i, true); |
126 | 126 | ||
127 | set_smp_cross_call(gic_raise_softirq); | 127 | set_smp_cross_call(gic_raise_softirq); |
128 | } | 128 | } |
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index bb618075fab6..0fe9b3ee2947 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c | |||
@@ -2182,8 +2182,8 @@ struct clk tegra_list_clks[] = { | |||
2182 | PERIPH_CLK("tvo", "tvo", NULL, 49, 0x188, 250000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* requires min voltage */ | 2182 | PERIPH_CLK("tvo", "tvo", NULL, 49, 0x188, 250000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* requires min voltage */ |
2183 | PERIPH_CLK("hdmi", "hdmi", NULL, 51, 0x18c, 600000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* requires min voltage */ | 2183 | PERIPH_CLK("hdmi", "hdmi", NULL, 51, 0x18c, 600000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* requires min voltage */ |
2184 | PERIPH_CLK("tvdac", "tvdac", NULL, 53, 0x194, 250000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* requires min voltage */ | 2184 | PERIPH_CLK("tvdac", "tvdac", NULL, 53, 0x194, 250000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* requires min voltage */ |
2185 | PERIPH_CLK("disp1", "tegradc.0", NULL, 27, 0x138, 600000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* scales with voltage and process_id */ | 2185 | PERIPH_CLK("disp1", "tegradc.0", NULL, 27, 0x138, 600000000, mux_pllp_plld_pllc_clkm, MUX), /* scales with voltage and process_id */ |
2186 | PERIPH_CLK("disp2", "tegradc.1", NULL, 26, 0x13c, 600000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* scales with voltage and process_id */ | 2186 | PERIPH_CLK("disp2", "tegradc.1", NULL, 26, 0x13c, 600000000, mux_pllp_plld_pllc_clkm, MUX), /* scales with voltage and process_id */ |
2187 | PERIPH_CLK("usbd", "fsl-tegra-udc", NULL, 22, 0, 480000000, mux_clk_m, 0), /* requires min voltage */ | 2187 | PERIPH_CLK("usbd", "fsl-tegra-udc", NULL, 22, 0, 480000000, mux_clk_m, 0), /* requires min voltage */ |
2188 | PERIPH_CLK("usb2", "tegra-ehci.1", NULL, 58, 0, 480000000, mux_clk_m, 0), /* requires min voltage */ | 2188 | PERIPH_CLK("usb2", "tegra-ehci.1", NULL, 58, 0, 480000000, mux_clk_m, 0), /* requires min voltage */ |
2189 | PERIPH_CLK("usb3", "tegra-ehci.2", NULL, 59, 0, 480000000, mux_clk_m, 0), /* requires min voltage */ | 2189 | PERIPH_CLK("usb3", "tegra-ehci.2", NULL, 59, 0, 480000000, mux_clk_m, 0), /* requires min voltage */ |
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c index 7013d003b8fd..f26fd76f72b4 100644 --- a/arch/arm/mach-ux500/board-mop500-pins.c +++ b/arch/arm/mach-ux500/board-mop500-pins.c | |||
@@ -110,10 +110,18 @@ static pin_cfg_t mop500_pins_common[] = { | |||
110 | GPIO168_KP_O0, | 110 | GPIO168_KP_O0, |
111 | 111 | ||
112 | /* UART */ | 112 | /* UART */ |
113 | GPIO0_U0_CTSn | PIN_INPUT_PULLUP, | 113 | /* uart-0 pins gpio configuration should be |
114 | GPIO1_U0_RTSn | PIN_OUTPUT_HIGH, | 114 | * kept intact to prevent glitch in tx line |
115 | GPIO2_U0_RXD | PIN_INPUT_PULLUP, | 115 | * when tty dev is opened. Later these pins |
116 | GPIO3_U0_TXD | PIN_OUTPUT_HIGH, | 116 | * are configured to uart mop500_pins_uart0 |
117 | * | ||
118 | * It will be replaced with uart configuration | ||
119 | * once the issue is solved. | ||
120 | */ | ||
121 | GPIO0_GPIO | PIN_INPUT_PULLUP, | ||
122 | GPIO1_GPIO | PIN_OUTPUT_HIGH, | ||
123 | GPIO2_GPIO | PIN_INPUT_PULLUP, | ||
124 | GPIO3_GPIO | PIN_OUTPUT_HIGH, | ||
117 | 125 | ||
118 | GPIO29_U2_RXD | PIN_INPUT_PULLUP, | 126 | GPIO29_U2_RXD | PIN_INPUT_PULLUP, |
119 | GPIO30_U2_TXD | PIN_OUTPUT_HIGH, | 127 | GPIO30_U2_TXD | PIN_OUTPUT_HIGH, |
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index 4eead1a0786b..cd54abaccd96 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/input.h> | 28 | #include <linux/input.h> |
29 | #include <linux/smsc911x.h> | 29 | #include <linux/smsc911x.h> |
30 | #include <linux/gpio_keys.h> | 30 | #include <linux/gpio_keys.h> |
31 | #include <linux/delay.h> | ||
31 | 32 | ||
32 | #include <linux/leds.h> | 33 | #include <linux/leds.h> |
33 | #include <asm/mach-types.h> | 34 | #include <asm/mach-types.h> |
@@ -35,12 +36,14 @@ | |||
35 | 36 | ||
36 | #include <plat/i2c.h> | 37 | #include <plat/i2c.h> |
37 | #include <plat/ste_dma40.h> | 38 | #include <plat/ste_dma40.h> |
39 | #include <plat/pincfg.h> | ||
38 | 40 | ||
39 | #include <mach/hardware.h> | 41 | #include <mach/hardware.h> |
40 | #include <mach/setup.h> | 42 | #include <mach/setup.h> |
41 | #include <mach/devices.h> | 43 | #include <mach/devices.h> |
42 | #include <mach/irqs.h> | 44 | #include <mach/irqs.h> |
43 | 45 | ||
46 | #include "pins-db8500.h" | ||
44 | #include "ste-dma40-db8500.h" | 47 | #include "ste-dma40-db8500.h" |
45 | #include "devices-db8500.h" | 48 | #include "devices-db8500.h" |
46 | #include "board-mop500.h" | 49 | #include "board-mop500.h" |
@@ -507,12 +510,63 @@ static struct stedma40_chan_cfg uart2_dma_cfg_tx = { | |||
507 | }; | 510 | }; |
508 | #endif | 511 | #endif |
509 | 512 | ||
513 | |||
514 | static pin_cfg_t mop500_pins_uart0[] = { | ||
515 | GPIO0_U0_CTSn | PIN_INPUT_PULLUP, | ||
516 | GPIO1_U0_RTSn | PIN_OUTPUT_HIGH, | ||
517 | GPIO2_U0_RXD | PIN_INPUT_PULLUP, | ||
518 | GPIO3_U0_TXD | PIN_OUTPUT_HIGH, | ||
519 | }; | ||
520 | |||
521 | #define PRCC_K_SOFTRST_SET 0x18 | ||
522 | #define PRCC_K_SOFTRST_CLEAR 0x1C | ||
523 | static void ux500_uart0_reset(void) | ||
524 | { | ||
525 | void __iomem *prcc_rst_set, *prcc_rst_clr; | ||
526 | |||
527 | prcc_rst_set = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE + | ||
528 | PRCC_K_SOFTRST_SET); | ||
529 | prcc_rst_clr = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE + | ||
530 | PRCC_K_SOFTRST_CLEAR); | ||
531 | |||
532 | /* Activate soft reset PRCC_K_SOFTRST_CLEAR */ | ||
533 | writel((readl(prcc_rst_clr) | 0x1), prcc_rst_clr); | ||
534 | udelay(1); | ||
535 | |||
536 | /* Release soft reset PRCC_K_SOFTRST_SET */ | ||
537 | writel((readl(prcc_rst_set) | 0x1), prcc_rst_set); | ||
538 | udelay(1); | ||
539 | } | ||
540 | |||
541 | static void ux500_uart0_init(void) | ||
542 | { | ||
543 | int ret; | ||
544 | |||
545 | ret = nmk_config_pins(mop500_pins_uart0, | ||
546 | ARRAY_SIZE(mop500_pins_uart0)); | ||
547 | if (ret < 0) | ||
548 | pr_err("pl011: uart pins_enable failed\n"); | ||
549 | } | ||
550 | |||
551 | static void ux500_uart0_exit(void) | ||
552 | { | ||
553 | int ret; | ||
554 | |||
555 | ret = nmk_config_pins_sleep(mop500_pins_uart0, | ||
556 | ARRAY_SIZE(mop500_pins_uart0)); | ||
557 | if (ret < 0) | ||
558 | pr_err("pl011: uart pins_disable failed\n"); | ||
559 | } | ||
560 | |||
510 | static struct amba_pl011_data uart0_plat = { | 561 | static struct amba_pl011_data uart0_plat = { |
511 | #ifdef CONFIG_STE_DMA40 | 562 | #ifdef CONFIG_STE_DMA40 |
512 | .dma_filter = stedma40_filter, | 563 | .dma_filter = stedma40_filter, |
513 | .dma_rx_param = &uart0_dma_cfg_rx, | 564 | .dma_rx_param = &uart0_dma_cfg_rx, |
514 | .dma_tx_param = &uart0_dma_cfg_tx, | 565 | .dma_tx_param = &uart0_dma_cfg_tx, |
515 | #endif | 566 | #endif |
567 | .init = ux500_uart0_init, | ||
568 | .exit = ux500_uart0_exit, | ||
569 | .reset = ux500_uart0_reset, | ||
516 | }; | 570 | }; |
517 | 571 | ||
518 | static struct amba_pl011_data uart1_plat = { | 572 | static struct amba_pl011_data uart1_plat = { |
diff --git a/arch/arm/mach-vt8500/irq.c b/arch/arm/mach-vt8500/irq.c index 245140c0df10..642de0408f25 100644 --- a/arch/arm/mach-vt8500/irq.c +++ b/arch/arm/mach-vt8500/irq.c | |||
@@ -39,9 +39,10 @@ | |||
39 | static void __iomem *ic_regbase; | 39 | static void __iomem *ic_regbase; |
40 | static void __iomem *sic_regbase; | 40 | static void __iomem *sic_regbase; |
41 | 41 | ||
42 | static void vt8500_irq_mask(unsigned int irq) | 42 | static void vt8500_irq_mask(struct irq_data *d) |
43 | { | 43 | { |
44 | void __iomem *base = ic_regbase; | 44 | void __iomem *base = ic_regbase; |
45 | unsigned irq = d->irq; | ||
45 | u8 edge; | 46 | u8 edge; |
46 | 47 | ||
47 | if (irq >= 64) { | 48 | if (irq >= 64) { |
@@ -64,9 +65,10 @@ static void vt8500_irq_mask(unsigned int irq) | |||
64 | } | 65 | } |
65 | } | 66 | } |
66 | 67 | ||
67 | static void vt8500_irq_unmask(unsigned int irq) | 68 | static void vt8500_irq_unmask(struct irq_data *d) |
68 | { | 69 | { |
69 | void __iomem *base = ic_regbase; | 70 | void __iomem *base = ic_regbase; |
71 | unsigned irq = d->irq; | ||
70 | u8 dctr; | 72 | u8 dctr; |
71 | 73 | ||
72 | if (irq >= 64) { | 74 | if (irq >= 64) { |
@@ -78,10 +80,11 @@ static void vt8500_irq_unmask(unsigned int irq) | |||
78 | writeb(dctr, base + VT8500_IC_DCTR + irq); | 80 | writeb(dctr, base + VT8500_IC_DCTR + irq); |
79 | } | 81 | } |
80 | 82 | ||
81 | static int vt8500_irq_set_type(unsigned int irq, unsigned int flow_type) | 83 | static int vt8500_irq_set_type(struct irq_data *d, unsigned int flow_type) |
82 | { | 84 | { |
83 | void __iomem *base = ic_regbase; | 85 | void __iomem *base = ic_regbase; |
84 | unsigned int orig_irq = irq; | 86 | unsigned irq = d->irq; |
87 | unsigned orig_irq = irq; | ||
85 | u8 dctr; | 88 | u8 dctr; |
86 | 89 | ||
87 | if (irq >= 64) { | 90 | if (irq >= 64) { |
@@ -114,11 +117,11 @@ static int vt8500_irq_set_type(unsigned int irq, unsigned int flow_type) | |||
114 | } | 117 | } |
115 | 118 | ||
116 | static struct irq_chip vt8500_irq_chip = { | 119 | static struct irq_chip vt8500_irq_chip = { |
117 | .name = "vt8500", | 120 | .name = "vt8500", |
118 | .ack = vt8500_irq_mask, | 121 | .irq_ack = vt8500_irq_mask, |
119 | .mask = vt8500_irq_mask, | 122 | .irq_mask = vt8500_irq_mask, |
120 | .unmask = vt8500_irq_unmask, | 123 | .irq_unmask = vt8500_irq_unmask, |
121 | .set_type = vt8500_irq_set_type, | 124 | .irq_set_type = vt8500_irq_set_type, |
122 | }; | 125 | }; |
123 | 126 | ||
124 | void __init vt8500_init_irq(void) | 127 | void __init vt8500_init_irq(void) |
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 0074b8dba793..cb26d49a8cd6 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig | |||
@@ -821,7 +821,7 @@ config CACHE_L2X0 | |||
821 | depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \ | 821 | depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \ |
822 | REALVIEW_EB_A9MP || SOC_IMX35 || SOC_IMX31 || MACH_REALVIEW_PBX || \ | 822 | REALVIEW_EB_A9MP || SOC_IMX35 || SOC_IMX31 || MACH_REALVIEW_PBX || \ |
823 | ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \ | 823 | ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \ |
824 | ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE | 824 | ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || ARCH_CNS3XXX |
825 | default y | 825 | default y |
826 | select OUTER_CACHE | 826 | select OUTER_CACHE |
827 | select OUTER_CACHE_SYNC | 827 | select OUTER_CACHE_SYNC |
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index ef59099a5463..44c086710d2b 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c | |||
@@ -120,17 +120,22 @@ static void l2x0_cache_sync(void) | |||
120 | spin_unlock_irqrestore(&l2x0_lock, flags); | 120 | spin_unlock_irqrestore(&l2x0_lock, flags); |
121 | } | 121 | } |
122 | 122 | ||
123 | static void l2x0_flush_all(void) | 123 | static void __l2x0_flush_all(void) |
124 | { | 124 | { |
125 | unsigned long flags; | ||
126 | |||
127 | /* clean all ways */ | ||
128 | spin_lock_irqsave(&l2x0_lock, flags); | ||
129 | debug_writel(0x03); | 125 | debug_writel(0x03); |
130 | writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_CLEAN_INV_WAY); | 126 | writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_CLEAN_INV_WAY); |
131 | cache_wait_way(l2x0_base + L2X0_CLEAN_INV_WAY, l2x0_way_mask); | 127 | cache_wait_way(l2x0_base + L2X0_CLEAN_INV_WAY, l2x0_way_mask); |
132 | cache_sync(); | 128 | cache_sync(); |
133 | debug_writel(0x00); | 129 | debug_writel(0x00); |
130 | } | ||
131 | |||
132 | static void l2x0_flush_all(void) | ||
133 | { | ||
134 | unsigned long flags; | ||
135 | |||
136 | /* clean all ways */ | ||
137 | spin_lock_irqsave(&l2x0_lock, flags); | ||
138 | __l2x0_flush_all(); | ||
134 | spin_unlock_irqrestore(&l2x0_lock, flags); | 139 | spin_unlock_irqrestore(&l2x0_lock, flags); |
135 | } | 140 | } |
136 | 141 | ||
@@ -266,7 +271,9 @@ static void l2x0_disable(void) | |||
266 | unsigned long flags; | 271 | unsigned long flags; |
267 | 272 | ||
268 | spin_lock_irqsave(&l2x0_lock, flags); | 273 | spin_lock_irqsave(&l2x0_lock, flags); |
269 | writel(0, l2x0_base + L2X0_CTRL); | 274 | __l2x0_flush_all(); |
275 | writel_relaxed(0, l2x0_base + L2X0_CTRL); | ||
276 | dsb(); | ||
270 | spin_unlock_irqrestore(&l2x0_lock, flags); | 277 | spin_unlock_irqrestore(&l2x0_lock, flags); |
271 | } | 278 | } |
272 | 279 | ||
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 9d9e736c2b4f..594d677b92c8 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c | |||
@@ -759,7 +759,7 @@ early_param("vmalloc", early_vmalloc); | |||
759 | 759 | ||
760 | static phys_addr_t lowmem_limit __initdata = 0; | 760 | static phys_addr_t lowmem_limit __initdata = 0; |
761 | 761 | ||
762 | static void __init sanity_check_meminfo(void) | 762 | void __init sanity_check_meminfo(void) |
763 | { | 763 | { |
764 | int i, j, highmem = 0; | 764 | int i, j, highmem = 0; |
765 | 765 | ||
@@ -1032,8 +1032,9 @@ void __init paging_init(struct machine_desc *mdesc) | |||
1032 | { | 1032 | { |
1033 | void *zero_page; | 1033 | void *zero_page; |
1034 | 1034 | ||
1035 | memblock_set_current_limit(lowmem_limit); | ||
1036 | |||
1035 | build_mem_type_table(); | 1037 | build_mem_type_table(); |
1036 | sanity_check_meminfo(); | ||
1037 | prepare_page_table(); | 1038 | prepare_page_table(); |
1038 | map_lowmem(); | 1039 | map_lowmem(); |
1039 | devicemaps_init(mdesc); | 1040 | devicemaps_init(mdesc); |
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c index 687d02319a41..941a98c9e8aa 100644 --- a/arch/arm/mm/nommu.c +++ b/arch/arm/mm/nommu.c | |||
@@ -27,6 +27,10 @@ void __init arm_mm_memblock_reserve(void) | |||
27 | memblock_reserve(CONFIG_VECTORS_BASE, PAGE_SIZE); | 27 | memblock_reserve(CONFIG_VECTORS_BASE, PAGE_SIZE); |
28 | } | 28 | } |
29 | 29 | ||
30 | void __init sanity_check_meminfo(void) | ||
31 | { | ||
32 | } | ||
33 | |||
30 | /* | 34 | /* |
31 | * paging_init() sets up the page tables, initialises the zone memory | 35 | * paging_init() sets up the page tables, initialises the zone memory |
32 | * maps, and sets up the zero page, bad page and bad page tables. | 36 | * maps, and sets up the zero page, bad page and bad page tables. |
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 3c3867850a30..089c0b5e454f 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -210,19 +210,21 @@ cpu_v7_name: | |||
210 | 210 | ||
211 | /* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */ | 211 | /* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */ |
212 | .globl cpu_v7_suspend_size | 212 | .globl cpu_v7_suspend_size |
213 | .equ cpu_v7_suspend_size, 4 * 8 | 213 | .equ cpu_v7_suspend_size, 4 * 9 |
214 | #ifdef CONFIG_PM_SLEEP | 214 | #ifdef CONFIG_PM_SLEEP |
215 | ENTRY(cpu_v7_do_suspend) | 215 | ENTRY(cpu_v7_do_suspend) |
216 | stmfd sp!, {r4 - r11, lr} | 216 | stmfd sp!, {r4 - r11, lr} |
217 | mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID | 217 | mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID |
218 | mrc p15, 0, r5, c13, c0, 1 @ Context ID | 218 | mrc p15, 0, r5, c13, c0, 1 @ Context ID |
219 | mrc p15, 0, r6, c13, c0, 3 @ User r/o thread ID | ||
220 | stmia r0!, {r4 - r6} | ||
219 | mrc p15, 0, r6, c3, c0, 0 @ Domain ID | 221 | mrc p15, 0, r6, c3, c0, 0 @ Domain ID |
220 | mrc p15, 0, r7, c2, c0, 0 @ TTB 0 | 222 | mrc p15, 0, r7, c2, c0, 0 @ TTB 0 |
221 | mrc p15, 0, r8, c2, c0, 1 @ TTB 1 | 223 | mrc p15, 0, r8, c2, c0, 1 @ TTB 1 |
222 | mrc p15, 0, r9, c1, c0, 0 @ Control register | 224 | mrc p15, 0, r9, c1, c0, 0 @ Control register |
223 | mrc p15, 0, r10, c1, c0, 1 @ Auxiliary control register | 225 | mrc p15, 0, r10, c1, c0, 1 @ Auxiliary control register |
224 | mrc p15, 0, r11, c1, c0, 2 @ Co-processor access control | 226 | mrc p15, 0, r11, c1, c0, 2 @ Co-processor access control |
225 | stmia r0, {r4 - r11} | 227 | stmia r0, {r6 - r11} |
226 | ldmfd sp!, {r4 - r11, pc} | 228 | ldmfd sp!, {r4 - r11, pc} |
227 | ENDPROC(cpu_v7_do_suspend) | 229 | ENDPROC(cpu_v7_do_suspend) |
228 | 230 | ||
@@ -230,9 +232,11 @@ ENTRY(cpu_v7_do_resume) | |||
230 | mov ip, #0 | 232 | mov ip, #0 |
231 | mcr p15, 0, ip, c8, c7, 0 @ invalidate TLBs | 233 | mcr p15, 0, ip, c8, c7, 0 @ invalidate TLBs |
232 | mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache | 234 | mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache |
233 | ldmia r0, {r4 - r11} | 235 | ldmia r0!, {r4 - r6} |
234 | mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID | 236 | mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID |
235 | mcr p15, 0, r5, c13, c0, 1 @ Context ID | 237 | mcr p15, 0, r5, c13, c0, 1 @ Context ID |
238 | mcr p15, 0, r6, c13, c0, 3 @ User r/o thread ID | ||
239 | ldmia r0, {r6 - r11} | ||
236 | mcr p15, 0, r6, c3, c0, 0 @ Domain ID | 240 | mcr p15, 0, r6, c3, c0, 0 @ Domain ID |
237 | mcr p15, 0, r7, c2, c0, 0 @ TTB 0 | 241 | mcr p15, 0, r7, c2, c0, 0 @ TTB 0 |
238 | mcr p15, 0, r8, c2, c0, 1 @ TTB 1 | 242 | mcr p15, 0, r8, c2, c0, 1 @ TTB 1 |
@@ -418,9 +422,9 @@ ENTRY(v7_processor_functions) | |||
418 | .word cpu_v7_dcache_clean_area | 422 | .word cpu_v7_dcache_clean_area |
419 | .word cpu_v7_switch_mm | 423 | .word cpu_v7_switch_mm |
420 | .word cpu_v7_set_pte_ext | 424 | .word cpu_v7_set_pte_ext |
421 | .word 0 | 425 | .word cpu_v7_suspend_size |
422 | .word 0 | 426 | .word cpu_v7_do_suspend |
423 | .word 0 | 427 | .word cpu_v7_do_resume |
424 | .size v7_processor_functions, . - v7_processor_functions | 428 | .size v7_processor_functions, . - v7_processor_functions |
425 | 429 | ||
426 | .section ".rodata" | 430 | .section ".rodata" |
diff --git a/arch/arm/plat-iop/cp6.c b/arch/arm/plat-iop/cp6.c index 9612a87e2a88..bab73e2c79db 100644 --- a/arch/arm/plat-iop/cp6.c +++ b/arch/arm/plat-iop/cp6.c | |||
@@ -18,6 +18,7 @@ | |||
18 | */ | 18 | */ |
19 | #include <linux/init.h> | 19 | #include <linux/init.h> |
20 | #include <asm/traps.h> | 20 | #include <asm/traps.h> |
21 | #include <asm/ptrace.h> | ||
21 | 22 | ||
22 | static int cp6_trap(struct pt_regs *regs, unsigned int instr) | 23 | static int cp6_trap(struct pt_regs *regs, unsigned int instr) |
23 | { | 24 | { |
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile index a1387875a491..d53c35fe2ea7 100644 --- a/arch/arm/plat-mxc/Makefile +++ b/arch/arm/plat-mxc/Makefile | |||
@@ -3,7 +3,7 @@ | |||
3 | # | 3 | # |
4 | 4 | ||
5 | # Common support | 5 | # Common support |
6 | obj-y := clock.o gpio.o time.o devices.o cpu.o system.o irq-common.o | 6 | obj-y := clock.o time.o devices.o cpu.o system.o irq-common.o |
7 | 7 | ||
8 | # MX51 uses the TZIC interrupt controller, older platforms use AVIC | 8 | # MX51 uses the TZIC interrupt controller, older platforms use AVIC |
9 | obj-$(CONFIG_MXC_TZIC) += tzic.o | 9 | obj-$(CONFIG_MXC_TZIC) += tzic.o |
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c index 09e2bd0fcdca..55d2534ec727 100644 --- a/arch/arm/plat-mxc/avic.c +++ b/arch/arm/plat-mxc/avic.c | |||
@@ -46,6 +46,8 @@ | |||
46 | #define AVIC_FIPNDH 0x60 /* fast int pending high */ | 46 | #define AVIC_FIPNDH 0x60 /* fast int pending high */ |
47 | #define AVIC_FIPNDL 0x64 /* fast int pending low */ | 47 | #define AVIC_FIPNDL 0x64 /* fast int pending low */ |
48 | 48 | ||
49 | #define AVIC_NUM_IRQS 64 | ||
50 | |||
49 | void __iomem *avic_base; | 51 | void __iomem *avic_base; |
50 | 52 | ||
51 | #ifdef CONFIG_MXC_IRQ_PRIOR | 53 | #ifdef CONFIG_MXC_IRQ_PRIOR |
@@ -54,7 +56,7 @@ static int avic_irq_set_priority(unsigned char irq, unsigned char prio) | |||
54 | unsigned int temp; | 56 | unsigned int temp; |
55 | unsigned int mask = 0x0F << irq % 8 * 4; | 57 | unsigned int mask = 0x0F << irq % 8 * 4; |
56 | 58 | ||
57 | if (irq >= MXC_INTERNAL_IRQS) | 59 | if (irq >= AVIC_NUM_IRQS) |
58 | return -EINVAL;; | 60 | return -EINVAL;; |
59 | 61 | ||
60 | temp = __raw_readl(avic_base + AVIC_NIPRIORITY(irq / 8)); | 62 | temp = __raw_readl(avic_base + AVIC_NIPRIORITY(irq / 8)); |
@@ -72,14 +74,14 @@ static int avic_set_irq_fiq(unsigned int irq, unsigned int type) | |||
72 | { | 74 | { |
73 | unsigned int irqt; | 75 | unsigned int irqt; |
74 | 76 | ||
75 | if (irq >= MXC_INTERNAL_IRQS) | 77 | if (irq >= AVIC_NUM_IRQS) |
76 | return -EINVAL; | 78 | return -EINVAL; |
77 | 79 | ||
78 | if (irq < MXC_INTERNAL_IRQS / 2) { | 80 | if (irq < AVIC_NUM_IRQS / 2) { |
79 | irqt = __raw_readl(avic_base + AVIC_INTTYPEL) & ~(1 << irq); | 81 | irqt = __raw_readl(avic_base + AVIC_INTTYPEL) & ~(1 << irq); |
80 | __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEL); | 82 | __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEL); |
81 | } else { | 83 | } else { |
82 | irq -= MXC_INTERNAL_IRQS / 2; | 84 | irq -= AVIC_NUM_IRQS / 2; |
83 | irqt = __raw_readl(avic_base + AVIC_INTTYPEH) & ~(1 << irq); | 85 | irqt = __raw_readl(avic_base + AVIC_INTTYPEH) & ~(1 << irq); |
84 | __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEH); | 86 | __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEH); |
85 | } | 87 | } |
@@ -138,7 +140,7 @@ void __init mxc_init_irq(void __iomem *irqbase) | |||
138 | /* all IRQ no FIQ */ | 140 | /* all IRQ no FIQ */ |
139 | __raw_writel(0, avic_base + AVIC_INTTYPEH); | 141 | __raw_writel(0, avic_base + AVIC_INTTYPEH); |
140 | __raw_writel(0, avic_base + AVIC_INTTYPEL); | 142 | __raw_writel(0, avic_base + AVIC_INTTYPEL); |
141 | for (i = 0; i < MXC_INTERNAL_IRQS; i++) { | 143 | for (i = 0; i < AVIC_NUM_IRQS; i++) { |
142 | irq_set_chip_and_handler(i, &mxc_avic_chip.base, | 144 | irq_set_chip_and_handler(i, &mxc_avic_chip.base, |
143 | handle_level_irq); | 145 | handle_level_irq); |
144 | set_irq_flags(i, IRQF_VALID); | 146 | set_irq_flags(i, IRQF_VALID); |
diff --git a/arch/arm/plat-mxc/devices.c b/arch/arm/plat-mxc/devices.c index eee1b6096a08..0d6ed31bdbf2 100644 --- a/arch/arm/plat-mxc/devices.c +++ b/arch/arm/plat-mxc/devices.c | |||
@@ -89,3 +89,28 @@ err: | |||
89 | 89 | ||
90 | return pdev; | 90 | return pdev; |
91 | } | 91 | } |
92 | |||
93 | struct device mxc_aips_bus = { | ||
94 | .init_name = "mxc_aips", | ||
95 | .parent = &platform_bus, | ||
96 | }; | ||
97 | |||
98 | struct device mxc_ahb_bus = { | ||
99 | .init_name = "mxc_ahb", | ||
100 | .parent = &platform_bus, | ||
101 | }; | ||
102 | |||
103 | static int __init mxc_device_init(void) | ||
104 | { | ||
105 | int ret; | ||
106 | |||
107 | ret = device_register(&mxc_aips_bus); | ||
108 | if (IS_ERR_VALUE(ret)) | ||
109 | goto done; | ||
110 | |||
111 | ret = device_register(&mxc_ahb_bus); | ||
112 | |||
113 | done: | ||
114 | return ret; | ||
115 | } | ||
116 | core_initcall(mxc_device_init); | ||
diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index ad2922acf480..b41bf972b54b 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile | |||
@@ -2,6 +2,7 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o | |||
2 | obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o | 2 | obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o |
3 | obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC) += platform-fsl-usb2-udc.o | 3 | obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC) += platform-fsl-usb2-udc.o |
4 | obj-$(CONFIG_IMX_HAVE_PLATFORM_GPIO_KEYS) += platform-gpio_keys.o | 4 | obj-$(CONFIG_IMX_HAVE_PLATFORM_GPIO_KEYS) += platform-gpio_keys.o |
5 | obj-y += platform-gpio-mxc.o | ||
5 | obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX21_HCD) += platform-imx21-hcd.o | 6 | obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX21_HCD) += platform-imx21-hcd.o |
6 | obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT) += platform-imx2-wdt.o | 7 | obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT) += platform-imx2-wdt.o |
7 | obj-$(CONFIG_IMX_HAVE_PLATFORM_IMXDI_RTC) += platform-imxdi_rtc.o | 8 | obj-$(CONFIG_IMX_HAVE_PLATFORM_IMXDI_RTC) += platform-imxdi_rtc.o |
diff --git a/arch/arm/plat-mxc/devices/platform-gpio-mxc.c b/arch/arm/plat-mxc/devices/platform-gpio-mxc.c new file mode 100644 index 000000000000..cf1b7fdfa20d --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-gpio-mxc.c | |||
@@ -0,0 +1,32 @@ | |||
1 | /* | ||
2 | * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | * Copyright 2011 Linaro Limited | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify it under | ||
6 | * the terms of the GNU General Public License version 2 as published by the | ||
7 | * Free Software Foundation. | ||
8 | */ | ||
9 | #include <mach/devices-common.h> | ||
10 | |||
11 | struct platform_device *__init mxc_register_gpio(int id, | ||
12 | resource_size_t iobase, resource_size_t iosize, int irq, int irq_high) | ||
13 | { | ||
14 | struct resource res[] = { | ||
15 | { | ||
16 | .start = iobase, | ||
17 | .end = iobase + iosize - 1, | ||
18 | .flags = IORESOURCE_MEM, | ||
19 | }, { | ||
20 | .start = irq, | ||
21 | .end = irq, | ||
22 | .flags = IORESOURCE_IRQ, | ||
23 | }, { | ||
24 | .start = irq_high, | ||
25 | .end = irq_high, | ||
26 | .flags = IORESOURCE_IRQ, | ||
27 | }, | ||
28 | }; | ||
29 | |||
30 | return platform_device_register_resndata(&mxc_aips_bus, | ||
31 | "gpio-mxc", id, res, ARRAY_SIZE(res), NULL, 0); | ||
32 | } | ||
diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/plat-mxc/devices/platform-imx-dma.c index b130f60ca6b7..2b0fdb23beb8 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-dma.c +++ b/arch/arm/plat-mxc/devices/platform-imx-dma.c | |||
@@ -6,207 +6,29 @@ | |||
6 | * the terms of the GNU General Public License version 2 as published by the | 6 | * the terms of the GNU General Public License version 2 as published by the |
7 | * Free Software Foundation. | 7 | * Free Software Foundation. |
8 | */ | 8 | */ |
9 | #include <linux/compiler.h> | ||
10 | #include <linux/err.h> | ||
11 | #include <linux/init.h> | ||
12 | |||
13 | #include <mach/hardware.h> | ||
14 | #include <mach/devices-common.h> | 9 | #include <mach/devices-common.h> |
15 | #include <mach/sdma.h> | ||
16 | |||
17 | struct imx_imx_sdma_data { | ||
18 | resource_size_t iobase; | ||
19 | resource_size_t irq; | ||
20 | struct sdma_platform_data pdata; | ||
21 | }; | ||
22 | |||
23 | #define imx_imx_sdma_data_entry_single(soc, _sdma_version, _cpu_name, _to_version)\ | ||
24 | { \ | ||
25 | .iobase = soc ## _SDMA ## _BASE_ADDR, \ | ||
26 | .irq = soc ## _INT_SDMA, \ | ||
27 | .pdata = { \ | ||
28 | .sdma_version = _sdma_version, \ | ||
29 | .cpu_name = _cpu_name, \ | ||
30 | .to_version = _to_version, \ | ||
31 | }, \ | ||
32 | } | ||
33 | |||
34 | #ifdef CONFIG_SOC_IMX25 | ||
35 | struct imx_imx_sdma_data imx25_imx_sdma_data __initconst = | ||
36 | imx_imx_sdma_data_entry_single(MX25, 1, "imx25", 0); | ||
37 | #endif /* ifdef CONFIG_SOC_IMX25 */ | ||
38 | 10 | ||
39 | #ifdef CONFIG_SOC_IMX31 | 11 | struct platform_device __init __maybe_unused *imx_add_imx_dma(void) |
40 | struct imx_imx_sdma_data imx31_imx_sdma_data __initdata = | 12 | { |
41 | imx_imx_sdma_data_entry_single(MX31, 1, "imx31", 0); | 13 | return platform_device_register_resndata(&mxc_ahb_bus, |
42 | #endif /* ifdef CONFIG_SOC_IMX31 */ | 14 | "imx-dma", -1, NULL, 0, NULL, 0); |
43 | 15 | } | |
44 | #ifdef CONFIG_SOC_IMX35 | ||
45 | struct imx_imx_sdma_data imx35_imx_sdma_data __initdata = | ||
46 | imx_imx_sdma_data_entry_single(MX35, 2, "imx35", 0); | ||
47 | #endif /* ifdef CONFIG_SOC_IMX35 */ | ||
48 | |||
49 | #ifdef CONFIG_SOC_IMX51 | ||
50 | struct imx_imx_sdma_data imx51_imx_sdma_data __initconst = | ||
51 | imx_imx_sdma_data_entry_single(MX51, 2, "imx51", 0); | ||
52 | #endif /* ifdef CONFIG_SOC_IMX51 */ | ||
53 | 16 | ||
54 | static struct platform_device __init __maybe_unused *imx_add_imx_sdma( | 17 | struct platform_device __init __maybe_unused *imx_add_imx_sdma( |
55 | const struct imx_imx_sdma_data *data) | 18 | resource_size_t iobase, int irq, struct sdma_platform_data *pdata) |
56 | { | 19 | { |
57 | struct resource res[] = { | 20 | struct resource res[] = { |
58 | { | 21 | { |
59 | .start = data->iobase, | 22 | .start = iobase, |
60 | .end = data->iobase + SZ_4K - 1, | 23 | .end = iobase + SZ_16K - 1, |
61 | .flags = IORESOURCE_MEM, | 24 | .flags = IORESOURCE_MEM, |
62 | }, { | 25 | }, { |
63 | .start = data->irq, | 26 | .start = irq, |
64 | .end = data->irq, | 27 | .end = irq, |
65 | .flags = IORESOURCE_IRQ, | 28 | .flags = IORESOURCE_IRQ, |
66 | }, | 29 | }, |
67 | }; | 30 | }; |
68 | 31 | ||
69 | return imx_add_platform_device("imx-sdma", -1, | 32 | return platform_device_register_resndata(&mxc_ahb_bus, "imx-sdma", |
70 | res, ARRAY_SIZE(res), | 33 | -1, res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); |
71 | &data->pdata, sizeof(data->pdata)); | ||
72 | } | ||
73 | |||
74 | static struct platform_device __init __maybe_unused *imx_add_imx_dma(void) | ||
75 | { | ||
76 | return imx_add_platform_device("imx-dma", -1, NULL, 0, NULL, 0); | ||
77 | } | ||
78 | |||
79 | #ifdef CONFIG_ARCH_MX25 | ||
80 | static struct sdma_script_start_addrs addr_imx25_to1 = { | ||
81 | .ap_2_ap_addr = 729, | ||
82 | .uart_2_mcu_addr = 904, | ||
83 | .per_2_app_addr = 1255, | ||
84 | .mcu_2_app_addr = 834, | ||
85 | .uartsh_2_mcu_addr = 1120, | ||
86 | .per_2_shp_addr = 1329, | ||
87 | .mcu_2_shp_addr = 1048, | ||
88 | .ata_2_mcu_addr = 1560, | ||
89 | .mcu_2_ata_addr = 1479, | ||
90 | .app_2_per_addr = 1189, | ||
91 | .app_2_mcu_addr = 770, | ||
92 | .shp_2_per_addr = 1407, | ||
93 | .shp_2_mcu_addr = 979, | ||
94 | }; | ||
95 | #endif | ||
96 | |||
97 | #ifdef CONFIG_SOC_IMX31 | ||
98 | static struct sdma_script_start_addrs addr_imx31_to1 = { | ||
99 | .per_2_per_addr = 1677, | ||
100 | }; | ||
101 | |||
102 | static struct sdma_script_start_addrs addr_imx31_to2 = { | ||
103 | .ap_2_ap_addr = 423, | ||
104 | .ap_2_bp_addr = 829, | ||
105 | .bp_2_ap_addr = 1029, | ||
106 | }; | ||
107 | #endif | ||
108 | |||
109 | #ifdef CONFIG_SOC_IMX35 | ||
110 | static struct sdma_script_start_addrs addr_imx35_to1 = { | ||
111 | .ap_2_ap_addr = 642, | ||
112 | .uart_2_mcu_addr = 817, | ||
113 | .mcu_2_app_addr = 747, | ||
114 | .uartsh_2_mcu_addr = 1183, | ||
115 | .per_2_shp_addr = 1033, | ||
116 | .mcu_2_shp_addr = 961, | ||
117 | .ata_2_mcu_addr = 1333, | ||
118 | .mcu_2_ata_addr = 1252, | ||
119 | .app_2_mcu_addr = 683, | ||
120 | .shp_2_per_addr = 1111, | ||
121 | .shp_2_mcu_addr = 892, | ||
122 | }; | ||
123 | |||
124 | static struct sdma_script_start_addrs addr_imx35_to2 = { | ||
125 | .ap_2_ap_addr = 729, | ||
126 | .uart_2_mcu_addr = 904, | ||
127 | .per_2_app_addr = 1597, | ||
128 | .mcu_2_app_addr = 834, | ||
129 | .uartsh_2_mcu_addr = 1270, | ||
130 | .per_2_shp_addr = 1120, | ||
131 | .mcu_2_shp_addr = 1048, | ||
132 | .ata_2_mcu_addr = 1429, | ||
133 | .mcu_2_ata_addr = 1339, | ||
134 | .app_2_per_addr = 1531, | ||
135 | .app_2_mcu_addr = 770, | ||
136 | .shp_2_per_addr = 1198, | ||
137 | .shp_2_mcu_addr = 979, | ||
138 | }; | ||
139 | #endif | ||
140 | |||
141 | #ifdef CONFIG_SOC_IMX51 | ||
142 | static struct sdma_script_start_addrs addr_imx51 = { | ||
143 | .ap_2_ap_addr = 642, | ||
144 | .uart_2_mcu_addr = 817, | ||
145 | .mcu_2_app_addr = 747, | ||
146 | .mcu_2_shp_addr = 961, | ||
147 | .ata_2_mcu_addr = 1473, | ||
148 | .mcu_2_ata_addr = 1392, | ||
149 | .app_2_per_addr = 1033, | ||
150 | .app_2_mcu_addr = 683, | ||
151 | .shp_2_per_addr = 1251, | ||
152 | .shp_2_mcu_addr = 892, | ||
153 | }; | ||
154 | #endif | ||
155 | |||
156 | static int __init imxXX_add_imx_dma(void) | ||
157 | { | ||
158 | struct platform_device *ret; | ||
159 | |||
160 | #if defined(CONFIG_SOC_IMX21) || defined(CONFIG_SOC_IMX27) | ||
161 | if (cpu_is_mx21() || cpu_is_mx27()) | ||
162 | ret = imx_add_imx_dma(); | ||
163 | else | ||
164 | #endif | ||
165 | |||
166 | #if defined(CONFIG_SOC_IMX25) | ||
167 | if (cpu_is_mx25()) { | ||
168 | imx25_imx_sdma_data.pdata.script_addrs = &addr_imx25_to1; | ||
169 | ret = imx_add_imx_sdma(&imx25_imx_sdma_data); | ||
170 | } else | ||
171 | #endif | ||
172 | |||
173 | #if defined(CONFIG_SOC_IMX31) | ||
174 | if (cpu_is_mx31()) { | ||
175 | int to_version = mx31_revision() >> 4; | ||
176 | imx31_imx_sdma_data.pdata.to_version = to_version; | ||
177 | if (to_version == 1) | ||
178 | imx31_imx_sdma_data.pdata.script_addrs = &addr_imx31_to1; | ||
179 | else | ||
180 | imx31_imx_sdma_data.pdata.script_addrs = &addr_imx31_to2; | ||
181 | ret = imx_add_imx_sdma(&imx31_imx_sdma_data); | ||
182 | } else | ||
183 | #endif | ||
184 | |||
185 | #if defined(CONFIG_SOC_IMX35) | ||
186 | if (cpu_is_mx35()) { | ||
187 | int to_version = mx35_revision() >> 4; | ||
188 | imx35_imx_sdma_data.pdata.to_version = to_version; | ||
189 | if (to_version == 1) | ||
190 | imx35_imx_sdma_data.pdata.script_addrs = &addr_imx35_to1; | ||
191 | else | ||
192 | imx35_imx_sdma_data.pdata.script_addrs = &addr_imx35_to2; | ||
193 | ret = imx_add_imx_sdma(&imx35_imx_sdma_data); | ||
194 | } else | ||
195 | #endif | ||
196 | |||
197 | #if defined(CONFIG_SOC_IMX51) | ||
198 | if (cpu_is_mx51()) { | ||
199 | int to_version = mx51_revision() >> 4; | ||
200 | imx51_imx_sdma_data.pdata.to_version = to_version; | ||
201 | imx51_imx_sdma_data.pdata.script_addrs = &addr_imx51; | ||
202 | ret = imx_add_imx_sdma(&imx51_imx_sdma_data); | ||
203 | } else | ||
204 | #endif | ||
205 | ret = ERR_PTR(-ENODEV); | ||
206 | |||
207 | if (IS_ERR(ret)) | ||
208 | return PTR_ERR(ret); | ||
209 | |||
210 | return 0; | ||
211 | } | 34 | } |
212 | arch_initcall(imxXX_add_imx_dma); | ||
diff --git a/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/arch/arm/plat-mxc/devices/platform-imx-i2c.c index 2ab74f0da9a6..afe60f7244a8 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-i2c.c +++ b/arch/arm/plat-mxc/devices/platform-imx-i2c.c | |||
@@ -94,8 +94,9 @@ const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst = { | |||
94 | imx_imx_i2c_data_entry(MX53, _id, _hwid, SZ_4K) | 94 | imx_imx_i2c_data_entry(MX53, _id, _hwid, SZ_4K) |
95 | imx53_imx_i2c_data_entry(0, 1), | 95 | imx53_imx_i2c_data_entry(0, 1), |
96 | imx53_imx_i2c_data_entry(1, 2), | 96 | imx53_imx_i2c_data_entry(1, 2), |
97 | imx53_imx_i2c_data_entry(2, 3), | ||
97 | }; | 98 | }; |
98 | #endif /* ifdef CONFIG_SOC_IMX51 */ | 99 | #endif /* ifdef CONFIG_SOC_IMX53 */ |
99 | 100 | ||
100 | struct platform_device *__init imx_add_imx_i2c( | 101 | struct platform_device *__init imx_add_imx_i2c( |
101 | const struct imx_imx_i2c_data *data, | 102 | const struct imx_imx_i2c_data *data, |
diff --git a/arch/arm/plat-mxc/devices/platform-imx-keypad.c b/arch/arm/plat-mxc/devices/platform-imx-keypad.c index 26366114b021..479c3e9f771f 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-keypad.c +++ b/arch/arm/plat-mxc/devices/platform-imx-keypad.c | |||
@@ -46,6 +46,11 @@ const struct imx_imx_keypad_data imx51_imx_keypad_data __initconst = | |||
46 | imx_imx_keypad_data_entry_single(MX51, SZ_16); | 46 | imx_imx_keypad_data_entry_single(MX51, SZ_16); |
47 | #endif /* ifdef CONFIG_SOC_IMX51 */ | 47 | #endif /* ifdef CONFIG_SOC_IMX51 */ |
48 | 48 | ||
49 | #ifdef CONFIG_SOC_IMX53 | ||
50 | const struct imx_imx_keypad_data imx53_imx_keypad_data __initconst = | ||
51 | imx_imx_keypad_data_entry_single(MX53, SZ_16); | ||
52 | #endif /* ifdef CONFIG_SOC_IMX53 */ | ||
53 | |||
49 | struct platform_device *__init imx_add_imx_keypad( | 54 | struct platform_device *__init imx_add_imx_keypad( |
50 | const struct imx_imx_keypad_data *data, | 55 | const struct imx_imx_keypad_data *data, |
51 | const struct matrix_keymap_data *pdata) | 56 | const struct matrix_keymap_data *pdata) |
diff --git a/arch/arm/plat-mxc/devices/platform-imx-ssi.c b/arch/arm/plat-mxc/devices/platform-imx-ssi.c index 2569c8d8a2ef..21c6f30e1017 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-ssi.c +++ b/arch/arm/plat-mxc/devices/platform-imx-ssi.c | |||
@@ -69,13 +69,23 @@ const struct imx_imx_ssi_data imx35_imx_ssi_data[] __initconst = { | |||
69 | #ifdef CONFIG_SOC_IMX51 | 69 | #ifdef CONFIG_SOC_IMX51 |
70 | const struct imx_imx_ssi_data imx51_imx_ssi_data[] __initconst = { | 70 | const struct imx_imx_ssi_data imx51_imx_ssi_data[] __initconst = { |
71 | #define imx51_imx_ssi_data_entry(_id, _hwid) \ | 71 | #define imx51_imx_ssi_data_entry(_id, _hwid) \ |
72 | imx_imx_ssi_data_entry(MX51, _id, _hwid, SZ_4K) | 72 | imx_imx_ssi_data_entry(MX51, _id, _hwid, SZ_16K) |
73 | imx51_imx_ssi_data_entry(0, 1), | 73 | imx51_imx_ssi_data_entry(0, 1), |
74 | imx51_imx_ssi_data_entry(1, 2), | 74 | imx51_imx_ssi_data_entry(1, 2), |
75 | imx51_imx_ssi_data_entry(2, 3), | 75 | imx51_imx_ssi_data_entry(2, 3), |
76 | }; | 76 | }; |
77 | #endif /* ifdef CONFIG_SOC_IMX51 */ | 77 | #endif /* ifdef CONFIG_SOC_IMX51 */ |
78 | 78 | ||
79 | #ifdef CONFIG_SOC_IMX53 | ||
80 | const struct imx_imx_ssi_data imx53_imx_ssi_data[] __initconst = { | ||
81 | #define imx53_imx_ssi_data_entry(_id, _hwid) \ | ||
82 | imx_imx_ssi_data_entry(MX53, _id, _hwid, SZ_16K) | ||
83 | imx53_imx_ssi_data_entry(0, 1), | ||
84 | imx53_imx_ssi_data_entry(1, 2), | ||
85 | imx53_imx_ssi_data_entry(2, 3), | ||
86 | }; | ||
87 | #endif /* ifdef CONFIG_SOC_IMX53 */ | ||
88 | |||
79 | struct platform_device *__init imx_add_imx_ssi( | 89 | struct platform_device *__init imx_add_imx_ssi( |
80 | const struct imx_imx_ssi_data *data, | 90 | const struct imx_imx_ssi_data *data, |
81 | const struct imx_ssi_platform_data *pdata) | 91 | const struct imx_ssi_platform_data *pdata) |
diff --git a/arch/arm/plat-mxc/devices/platform-imx-uart.c b/arch/arm/plat-mxc/devices/platform-imx-uart.c index 3c854c2cc6dd..cfce8c918b73 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-uart.c +++ b/arch/arm/plat-mxc/devices/platform-imx-uart.c | |||
@@ -123,6 +123,8 @@ const struct imx_imx_uart_1irq_data imx53_imx_uart_data[] __initconst = { | |||
123 | imx53_imx_uart_data_entry(0, 1), | 123 | imx53_imx_uart_data_entry(0, 1), |
124 | imx53_imx_uart_data_entry(1, 2), | 124 | imx53_imx_uart_data_entry(1, 2), |
125 | imx53_imx_uart_data_entry(2, 3), | 125 | imx53_imx_uart_data_entry(2, 3), |
126 | imx53_imx_uart_data_entry(3, 4), | ||
127 | imx53_imx_uart_data_entry(4, 5), | ||
126 | }; | 128 | }; |
127 | #endif /* ifdef CONFIG_SOC_IMX53 */ | 129 | #endif /* ifdef CONFIG_SOC_IMX53 */ |
128 | 130 | ||
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c deleted file mode 100644 index 6cd6d7f686f6..000000000000 --- a/arch/arm/plat-mxc/gpio.c +++ /dev/null | |||
@@ -1,361 +0,0 @@ | |||
1 | /* | ||
2 | * MXC GPIO support. (c) 2008 Daniel Mack <daniel@caiaq.de> | ||
3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de | ||
4 | * | ||
5 | * Based on code from Freescale, | ||
6 | * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version 2 | ||
11 | * of the License, or (at your option) any later version. | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | ||
20 | */ | ||
21 | |||
22 | #include <linux/init.h> | ||
23 | #include <linux/interrupt.h> | ||
24 | #include <linux/io.h> | ||
25 | #include <linux/irq.h> | ||
26 | #include <linux/gpio.h> | ||
27 | #include <mach/hardware.h> | ||
28 | #include <asm-generic/bug.h> | ||
29 | |||
30 | static struct mxc_gpio_port *mxc_gpio_ports; | ||
31 | static int gpio_table_size; | ||
32 | |||
33 | #define cpu_is_mx1_mx2() (cpu_is_mx1() || cpu_is_mx2()) | ||
34 | |||
35 | #define GPIO_DR (cpu_is_mx1_mx2() ? 0x1c : 0x00) | ||
36 | #define GPIO_GDIR (cpu_is_mx1_mx2() ? 0x00 : 0x04) | ||
37 | #define GPIO_PSR (cpu_is_mx1_mx2() ? 0x24 : 0x08) | ||
38 | #define GPIO_ICR1 (cpu_is_mx1_mx2() ? 0x28 : 0x0C) | ||
39 | #define GPIO_ICR2 (cpu_is_mx1_mx2() ? 0x2C : 0x10) | ||
40 | #define GPIO_IMR (cpu_is_mx1_mx2() ? 0x30 : 0x14) | ||
41 | #define GPIO_ISR (cpu_is_mx1_mx2() ? 0x34 : 0x18) | ||
42 | |||
43 | #define GPIO_INT_LOW_LEV (cpu_is_mx1_mx2() ? 0x3 : 0x0) | ||
44 | #define GPIO_INT_HIGH_LEV (cpu_is_mx1_mx2() ? 0x2 : 0x1) | ||
45 | #define GPIO_INT_RISE_EDGE (cpu_is_mx1_mx2() ? 0x0 : 0x2) | ||
46 | #define GPIO_INT_FALL_EDGE (cpu_is_mx1_mx2() ? 0x1 : 0x3) | ||
47 | #define GPIO_INT_NONE 0x4 | ||
48 | |||
49 | /* Note: This driver assumes 32 GPIOs are handled in one register */ | ||
50 | |||
51 | static void _clear_gpio_irqstatus(struct mxc_gpio_port *port, u32 index) | ||
52 | { | ||
53 | __raw_writel(1 << index, port->base + GPIO_ISR); | ||
54 | } | ||
55 | |||
56 | static void _set_gpio_irqenable(struct mxc_gpio_port *port, u32 index, | ||
57 | int enable) | ||
58 | { | ||
59 | u32 l; | ||
60 | |||
61 | l = __raw_readl(port->base + GPIO_IMR); | ||
62 | l = (l & (~(1 << index))) | (!!enable << index); | ||
63 | __raw_writel(l, port->base + GPIO_IMR); | ||
64 | } | ||
65 | |||
66 | static void gpio_ack_irq(struct irq_data *d) | ||
67 | { | ||
68 | u32 gpio = irq_to_gpio(d->irq); | ||
69 | _clear_gpio_irqstatus(&mxc_gpio_ports[gpio / 32], gpio & 0x1f); | ||
70 | } | ||
71 | |||
72 | static void gpio_mask_irq(struct irq_data *d) | ||
73 | { | ||
74 | u32 gpio = irq_to_gpio(d->irq); | ||
75 | _set_gpio_irqenable(&mxc_gpio_ports[gpio / 32], gpio & 0x1f, 0); | ||
76 | } | ||
77 | |||
78 | static void gpio_unmask_irq(struct irq_data *d) | ||
79 | { | ||
80 | u32 gpio = irq_to_gpio(d->irq); | ||
81 | _set_gpio_irqenable(&mxc_gpio_ports[gpio / 32], gpio & 0x1f, 1); | ||
82 | } | ||
83 | |||
84 | static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset); | ||
85 | |||
86 | static int gpio_set_irq_type(struct irq_data *d, u32 type) | ||
87 | { | ||
88 | u32 gpio = irq_to_gpio(d->irq); | ||
89 | struct mxc_gpio_port *port = &mxc_gpio_ports[gpio / 32]; | ||
90 | u32 bit, val; | ||
91 | int edge; | ||
92 | void __iomem *reg = port->base; | ||
93 | |||
94 | port->both_edges &= ~(1 << (gpio & 31)); | ||
95 | switch (type) { | ||
96 | case IRQ_TYPE_EDGE_RISING: | ||
97 | edge = GPIO_INT_RISE_EDGE; | ||
98 | break; | ||
99 | case IRQ_TYPE_EDGE_FALLING: | ||
100 | edge = GPIO_INT_FALL_EDGE; | ||
101 | break; | ||
102 | case IRQ_TYPE_EDGE_BOTH: | ||
103 | val = mxc_gpio_get(&port->chip, gpio & 31); | ||
104 | if (val) { | ||
105 | edge = GPIO_INT_LOW_LEV; | ||
106 | pr_debug("mxc: set GPIO %d to low trigger\n", gpio); | ||
107 | } else { | ||
108 | edge = GPIO_INT_HIGH_LEV; | ||
109 | pr_debug("mxc: set GPIO %d to high trigger\n", gpio); | ||
110 | } | ||
111 | port->both_edges |= 1 << (gpio & 31); | ||
112 | break; | ||
113 | case IRQ_TYPE_LEVEL_LOW: | ||
114 | edge = GPIO_INT_LOW_LEV; | ||
115 | break; | ||
116 | case IRQ_TYPE_LEVEL_HIGH: | ||
117 | edge = GPIO_INT_HIGH_LEV; | ||
118 | break; | ||
119 | default: | ||
120 | return -EINVAL; | ||
121 | } | ||
122 | |||
123 | reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */ | ||
124 | bit = gpio & 0xf; | ||
125 | val = __raw_readl(reg) & ~(0x3 << (bit << 1)); | ||
126 | __raw_writel(val | (edge << (bit << 1)), reg); | ||
127 | _clear_gpio_irqstatus(port, gpio & 0x1f); | ||
128 | |||
129 | return 0; | ||
130 | } | ||
131 | |||
132 | static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio) | ||
133 | { | ||
134 | void __iomem *reg = port->base; | ||
135 | u32 bit, val; | ||
136 | int edge; | ||
137 | |||
138 | reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */ | ||
139 | bit = gpio & 0xf; | ||
140 | val = __raw_readl(reg); | ||
141 | edge = (val >> (bit << 1)) & 3; | ||
142 | val &= ~(0x3 << (bit << 1)); | ||
143 | if (edge == GPIO_INT_HIGH_LEV) { | ||
144 | edge = GPIO_INT_LOW_LEV; | ||
145 | pr_debug("mxc: switch GPIO %d to low trigger\n", gpio); | ||
146 | } else if (edge == GPIO_INT_LOW_LEV) { | ||
147 | edge = GPIO_INT_HIGH_LEV; | ||
148 | pr_debug("mxc: switch GPIO %d to high trigger\n", gpio); | ||
149 | } else { | ||
150 | pr_err("mxc: invalid configuration for GPIO %d: %x\n", | ||
151 | gpio, edge); | ||
152 | return; | ||
153 | } | ||
154 | __raw_writel(val | (edge << (bit << 1)), reg); | ||
155 | } | ||
156 | |||
157 | /* handle 32 interrupts in one status register */ | ||
158 | static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat) | ||
159 | { | ||
160 | u32 gpio_irq_no_base = port->virtual_irq_start; | ||
161 | |||
162 | while (irq_stat != 0) { | ||
163 | int irqoffset = fls(irq_stat) - 1; | ||
164 | |||
165 | if (port->both_edges & (1 << irqoffset)) | ||
166 | mxc_flip_edge(port, irqoffset); | ||
167 | |||
168 | generic_handle_irq(gpio_irq_no_base + irqoffset); | ||
169 | |||
170 | irq_stat &= ~(1 << irqoffset); | ||
171 | } | ||
172 | } | ||
173 | |||
174 | /* MX1 and MX3 has one interrupt *per* gpio port */ | ||
175 | static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc) | ||
176 | { | ||
177 | u32 irq_stat; | ||
178 | struct mxc_gpio_port *port = irq_get_handler_data(irq); | ||
179 | |||
180 | irq_stat = __raw_readl(port->base + GPIO_ISR) & | ||
181 | __raw_readl(port->base + GPIO_IMR); | ||
182 | |||
183 | mxc_gpio_irq_handler(port, irq_stat); | ||
184 | } | ||
185 | |||
186 | /* MX2 has one interrupt *for all* gpio ports */ | ||
187 | static void mx2_gpio_irq_handler(u32 irq, struct irq_desc *desc) | ||
188 | { | ||
189 | int i; | ||
190 | u32 irq_msk, irq_stat; | ||
191 | struct mxc_gpio_port *port = irq_get_handler_data(irq); | ||
192 | |||
193 | /* walk through all interrupt status registers */ | ||
194 | for (i = 0; i < gpio_table_size; i++) { | ||
195 | irq_msk = __raw_readl(port[i].base + GPIO_IMR); | ||
196 | if (!irq_msk) | ||
197 | continue; | ||
198 | |||
199 | irq_stat = __raw_readl(port[i].base + GPIO_ISR) & irq_msk; | ||
200 | if (irq_stat) | ||
201 | mxc_gpio_irq_handler(&port[i], irq_stat); | ||
202 | } | ||
203 | } | ||
204 | |||
205 | /* | ||
206 | * Set interrupt number "irq" in the GPIO as a wake-up source. | ||
207 | * While system is running, all registered GPIO interrupts need to have | ||
208 | * wake-up enabled. When system is suspended, only selected GPIO interrupts | ||
209 | * need to have wake-up enabled. | ||
210 | * @param irq interrupt source number | ||
211 | * @param enable enable as wake-up if equal to non-zero | ||
212 | * @return This function returns 0 on success. | ||
213 | */ | ||
214 | static int gpio_set_wake_irq(struct irq_data *d, u32 enable) | ||
215 | { | ||
216 | u32 gpio = irq_to_gpio(d->irq); | ||
217 | u32 gpio_idx = gpio & 0x1F; | ||
218 | struct mxc_gpio_port *port = &mxc_gpio_ports[gpio / 32]; | ||
219 | |||
220 | if (enable) { | ||
221 | if (port->irq_high && (gpio_idx >= 16)) | ||
222 | enable_irq_wake(port->irq_high); | ||
223 | else | ||
224 | enable_irq_wake(port->irq); | ||
225 | } else { | ||
226 | if (port->irq_high && (gpio_idx >= 16)) | ||
227 | disable_irq_wake(port->irq_high); | ||
228 | else | ||
229 | disable_irq_wake(port->irq); | ||
230 | } | ||
231 | |||
232 | return 0; | ||
233 | } | ||
234 | |||
235 | static struct irq_chip gpio_irq_chip = { | ||
236 | .name = "GPIO", | ||
237 | .irq_ack = gpio_ack_irq, | ||
238 | .irq_mask = gpio_mask_irq, | ||
239 | .irq_unmask = gpio_unmask_irq, | ||
240 | .irq_set_type = gpio_set_irq_type, | ||
241 | .irq_set_wake = gpio_set_wake_irq, | ||
242 | }; | ||
243 | |||
244 | static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset, | ||
245 | int dir) | ||
246 | { | ||
247 | struct mxc_gpio_port *port = | ||
248 | container_of(chip, struct mxc_gpio_port, chip); | ||
249 | u32 l; | ||
250 | unsigned long flags; | ||
251 | |||
252 | spin_lock_irqsave(&port->lock, flags); | ||
253 | l = __raw_readl(port->base + GPIO_GDIR); | ||
254 | if (dir) | ||
255 | l |= 1 << offset; | ||
256 | else | ||
257 | l &= ~(1 << offset); | ||
258 | __raw_writel(l, port->base + GPIO_GDIR); | ||
259 | spin_unlock_irqrestore(&port->lock, flags); | ||
260 | } | ||
261 | |||
262 | static void mxc_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | ||
263 | { | ||
264 | struct mxc_gpio_port *port = | ||
265 | container_of(chip, struct mxc_gpio_port, chip); | ||
266 | void __iomem *reg = port->base + GPIO_DR; | ||
267 | u32 l; | ||
268 | unsigned long flags; | ||
269 | |||
270 | spin_lock_irqsave(&port->lock, flags); | ||
271 | l = (__raw_readl(reg) & (~(1 << offset))) | (!!value << offset); | ||
272 | __raw_writel(l, reg); | ||
273 | spin_unlock_irqrestore(&port->lock, flags); | ||
274 | } | ||
275 | |||
276 | static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset) | ||
277 | { | ||
278 | struct mxc_gpio_port *port = | ||
279 | container_of(chip, struct mxc_gpio_port, chip); | ||
280 | |||
281 | return (__raw_readl(port->base + GPIO_PSR) >> offset) & 1; | ||
282 | } | ||
283 | |||
284 | static int mxc_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | ||
285 | { | ||
286 | _set_gpio_direction(chip, offset, 0); | ||
287 | return 0; | ||
288 | } | ||
289 | |||
290 | static int mxc_gpio_direction_output(struct gpio_chip *chip, | ||
291 | unsigned offset, int value) | ||
292 | { | ||
293 | mxc_gpio_set(chip, offset, value); | ||
294 | _set_gpio_direction(chip, offset, 1); | ||
295 | return 0; | ||
296 | } | ||
297 | |||
298 | /* | ||
299 | * This lock class tells lockdep that GPIO irqs are in a different | ||
300 | * category than their parents, so it won't report false recursion. | ||
301 | */ | ||
302 | static struct lock_class_key gpio_lock_class; | ||
303 | |||
304 | int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt) | ||
305 | { | ||
306 | int i, j; | ||
307 | |||
308 | /* save for local usage */ | ||
309 | mxc_gpio_ports = port; | ||
310 | gpio_table_size = cnt; | ||
311 | |||
312 | printk(KERN_INFO "MXC GPIO hardware\n"); | ||
313 | |||
314 | for (i = 0; i < cnt; i++) { | ||
315 | /* disable the interrupt and clear the status */ | ||
316 | __raw_writel(0, port[i].base + GPIO_IMR); | ||
317 | __raw_writel(~0, port[i].base + GPIO_ISR); | ||
318 | for (j = port[i].virtual_irq_start; | ||
319 | j < port[i].virtual_irq_start + 32; j++) { | ||
320 | irq_set_lockdep_class(j, &gpio_lock_class); | ||
321 | irq_set_chip_and_handler(j, &gpio_irq_chip, | ||
322 | handle_level_irq); | ||
323 | set_irq_flags(j, IRQF_VALID); | ||
324 | } | ||
325 | |||
326 | /* register gpio chip */ | ||
327 | port[i].chip.direction_input = mxc_gpio_direction_input; | ||
328 | port[i].chip.direction_output = mxc_gpio_direction_output; | ||
329 | port[i].chip.get = mxc_gpio_get; | ||
330 | port[i].chip.set = mxc_gpio_set; | ||
331 | port[i].chip.base = i * 32; | ||
332 | port[i].chip.ngpio = 32; | ||
333 | |||
334 | spin_lock_init(&port[i].lock); | ||
335 | |||
336 | /* its a serious configuration bug when it fails */ | ||
337 | BUG_ON( gpiochip_add(&port[i].chip) < 0 ); | ||
338 | |||
339 | if (cpu_is_mx1() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51()) { | ||
340 | /* setup one handler for each entry */ | ||
341 | irq_set_chained_handler(port[i].irq, | ||
342 | mx3_gpio_irq_handler); | ||
343 | irq_set_handler_data(port[i].irq, &port[i]); | ||
344 | if (port[i].irq_high) { | ||
345 | /* setup handler for GPIO 16 to 31 */ | ||
346 | irq_set_chained_handler(port[i].irq_high, | ||
347 | mx3_gpio_irq_handler); | ||
348 | irq_set_handler_data(port[i].irq_high, | ||
349 | &port[i]); | ||
350 | } | ||
351 | } | ||
352 | } | ||
353 | |||
354 | if (cpu_is_mx2()) { | ||
355 | /* setup one handler for all GPIO interrupts */ | ||
356 | irq_set_chained_handler(port[0].irq, mx2_gpio_irq_handler); | ||
357 | irq_set_handler_data(port[0].irq, port); | ||
358 | } | ||
359 | |||
360 | return 0; | ||
361 | } | ||
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index da7991832af6..91fa2632aa5e 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h | |||
@@ -43,6 +43,15 @@ extern void mx35_init_irq(void); | |||
43 | extern void mx50_init_irq(void); | 43 | extern void mx50_init_irq(void); |
44 | extern void mx51_init_irq(void); | 44 | extern void mx51_init_irq(void); |
45 | extern void mx53_init_irq(void); | 45 | extern void mx53_init_irq(void); |
46 | extern void imx1_soc_init(void); | ||
47 | extern void imx21_soc_init(void); | ||
48 | extern void imx25_soc_init(void); | ||
49 | extern void imx27_soc_init(void); | ||
50 | extern void imx31_soc_init(void); | ||
51 | extern void imx35_soc_init(void); | ||
52 | extern void imx50_soc_init(void); | ||
53 | extern void imx51_soc_init(void); | ||
54 | extern void imx53_soc_init(void); | ||
46 | extern void epit_timer_init(struct clk *timer_clk, void __iomem *base, int irq); | 55 | extern void epit_timer_init(struct clk *timer_clk, void __iomem *base, int irq); |
47 | extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int); | 56 | extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int); |
48 | extern int mx1_clocks_init(unsigned long fref); | 57 | extern int mx1_clocks_init(unsigned long fref); |
@@ -55,7 +64,8 @@ extern int mx51_clocks_init(unsigned long ckil, unsigned long osc, | |||
55 | unsigned long ckih1, unsigned long ckih2); | 64 | unsigned long ckih1, unsigned long ckih2); |
56 | extern int mx53_clocks_init(unsigned long ckil, unsigned long osc, | 65 | extern int mx53_clocks_init(unsigned long ckil, unsigned long osc, |
57 | unsigned long ckih1, unsigned long ckih2); | 66 | unsigned long ckih1, unsigned long ckih2); |
58 | extern int mxc_register_gpios(void); | 67 | extern struct platform_device *mxc_register_gpio(int id, |
68 | resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); | ||
59 | extern int mxc_register_device(struct platform_device *pdev, void *data); | 69 | extern int mxc_register_device(struct platform_device *pdev, void *data); |
60 | extern void mxc_set_cpu_type(unsigned int type); | 70 | extern void mxc_set_cpu_type(unsigned int type); |
61 | extern void mxc_arch_reset_init(void __iomem *); | 71 | extern void mxc_arch_reset_init(void __iomem *); |
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S index 8e8d175e5077..91fc7cdb5dc9 100644 --- a/arch/arm/plat-mxc/include/mach/debug-macro.S +++ b/arch/arm/plat-mxc/include/mach/debug-macro.S | |||
@@ -12,32 +12,32 @@ | |||
12 | */ | 12 | */ |
13 | #include <mach/hardware.h> | 13 | #include <mach/hardware.h> |
14 | 14 | ||
15 | #ifdef CONFIG_ARCH_MX1 | 15 | #ifdef CONFIG_SOC_IMX1 |
16 | #define UART_PADDR MX1_UART1_BASE_ADDR | 16 | #define UART_PADDR MX1_UART1_BASE_ADDR |
17 | #endif | 17 | #endif |
18 | 18 | ||
19 | #ifdef CONFIG_ARCH_MX25 | 19 | #ifdef CONFIG_SOC_IMX25 |
20 | #ifdef UART_PADDR | 20 | #ifdef UART_PADDR |
21 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" | 21 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" |
22 | #endif | 22 | #endif |
23 | #define UART_PADDR MX25_UART1_BASE_ADDR | 23 | #define UART_PADDR MX25_UART1_BASE_ADDR |
24 | #endif | 24 | #endif |
25 | 25 | ||
26 | #ifdef CONFIG_ARCH_MX2 | 26 | #if defined(CONFIG_SOC_IMX21) || defined (CONFIG_SOC_IMX27) |
27 | #ifdef UART_PADDR | 27 | #ifdef UART_PADDR |
28 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" | 28 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" |
29 | #endif | 29 | #endif |
30 | #define UART_PADDR MX2x_UART1_BASE_ADDR | 30 | #define UART_PADDR MX2x_UART1_BASE_ADDR |
31 | #endif | 31 | #endif |
32 | 32 | ||
33 | #ifdef CONFIG_ARCH_MX3 | 33 | #if defined(CONFIG_SOC_IMX31) || defined(CONFIG_SOC_IMX35) |
34 | #ifdef UART_PADDR | 34 | #ifdef UART_PADDR |
35 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" | 35 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" |
36 | #endif | 36 | #endif |
37 | #define UART_PADDR MX3x_UART1_BASE_ADDR | 37 | #define UART_PADDR MX3x_UART1_BASE_ADDR |
38 | #endif | 38 | #endif |
39 | 39 | ||
40 | #ifdef CONFIG_ARCH_MX5 | 40 | #ifdef CONFIG_SOC_IMX51 |
41 | #ifdef UART_PADDR | 41 | #ifdef UART_PADDR |
42 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" | 42 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" |
43 | #endif | 43 | #endif |
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index fa8477337f91..bf93820ab61c 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h | |||
@@ -9,6 +9,10 @@ | |||
9 | #include <linux/kernel.h> | 9 | #include <linux/kernel.h> |
10 | #include <linux/platform_device.h> | 10 | #include <linux/platform_device.h> |
11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
12 | #include <mach/sdma.h> | ||
13 | |||
14 | extern struct device mxc_aips_bus; | ||
15 | extern struct device mxc_ahb_bus; | ||
12 | 16 | ||
13 | struct platform_device *imx_add_platform_device_dmamask( | 17 | struct platform_device *imx_add_platform_device_dmamask( |
14 | const char *name, int id, | 18 | const char *name, int id, |
@@ -291,3 +295,7 @@ struct imx_spi_imx_data { | |||
291 | struct platform_device *__init imx_add_spi_imx( | 295 | struct platform_device *__init imx_add_spi_imx( |
292 | const struct imx_spi_imx_data *data, | 296 | const struct imx_spi_imx_data *data, |
293 | const struct spi_imx_master *pdata); | 297 | const struct spi_imx_master *pdata); |
298 | |||
299 | struct platform_device *imx_add_imx_dma(void); | ||
300 | struct platform_device *imx_add_imx_sdma( | ||
301 | resource_size_t iobase, int irq, struct sdma_platform_data *pdata); | ||
diff --git a/arch/arm/plat-mxc/include/mach/gpio.h b/arch/arm/plat-mxc/include/mach/gpio.h index a2747f12813e..31c820c1b796 100644 --- a/arch/arm/plat-mxc/include/mach/gpio.h +++ b/arch/arm/plat-mxc/include/mach/gpio.h | |||
@@ -36,31 +36,4 @@ | |||
36 | #define gpio_to_irq(gpio) (MXC_GPIO_IRQ_START + (gpio)) | 36 | #define gpio_to_irq(gpio) (MXC_GPIO_IRQ_START + (gpio)) |
37 | #define irq_to_gpio(irq) ((irq) - MXC_GPIO_IRQ_START) | 37 | #define irq_to_gpio(irq) ((irq) - MXC_GPIO_IRQ_START) |
38 | 38 | ||
39 | struct mxc_gpio_port { | ||
40 | void __iomem *base; | ||
41 | int irq; | ||
42 | int irq_high; | ||
43 | int virtual_irq_start; | ||
44 | struct gpio_chip chip; | ||
45 | u32 both_edges; | ||
46 | spinlock_t lock; | ||
47 | }; | ||
48 | |||
49 | #define DEFINE_IMX_GPIO_PORT_IRQ_HIGH(soc, _id, _hwid, _irq, _irq_high) \ | ||
50 | { \ | ||
51 | .chip.label = "gpio-" #_id, \ | ||
52 | .irq = _irq, \ | ||
53 | .irq_high = _irq_high, \ | ||
54 | .base = soc ## _IO_ADDRESS( \ | ||
55 | soc ## _GPIO ## _hwid ## _BASE_ADDR), \ | ||
56 | .virtual_irq_start = MXC_GPIO_IRQ_START + (_id) * 32, \ | ||
57 | } | ||
58 | |||
59 | #define DEFINE_IMX_GPIO_PORT_IRQ(soc, _id, _hwid, _irq) \ | ||
60 | DEFINE_IMX_GPIO_PORT_IRQ_HIGH(soc, _id, _hwid, _irq, 0) | ||
61 | #define DEFINE_IMX_GPIO_PORT(soc, _id, _hwid) \ | ||
62 | DEFINE_IMX_GPIO_PORT_IRQ(soc, _id, _hwid, 0) | ||
63 | |||
64 | int mxc_gpio_init(struct mxc_gpio_port*, int); | ||
65 | |||
66 | #endif | 39 | #endif |
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h index 67d3e2bed065..a8bfd565dcad 100644 --- a/arch/arm/plat-mxc/include/mach/hardware.h +++ b/arch/arm/plat-mxc/include/mach/hardware.h | |||
@@ -97,35 +97,17 @@ | |||
97 | 97 | ||
98 | #include <mach/mxc.h> | 98 | #include <mach/mxc.h> |
99 | 99 | ||
100 | #ifdef CONFIG_ARCH_MX5 | ||
101 | #include <mach/mx50.h> | 100 | #include <mach/mx50.h> |
102 | #include <mach/mx51.h> | 101 | #include <mach/mx51.h> |
103 | #include <mach/mx53.h> | 102 | #include <mach/mx53.h> |
104 | #endif | ||
105 | |||
106 | #ifdef CONFIG_ARCH_MX3 | ||
107 | #include <mach/mx3x.h> | 103 | #include <mach/mx3x.h> |
108 | #include <mach/mx31.h> | 104 | #include <mach/mx31.h> |
109 | #include <mach/mx35.h> | 105 | #include <mach/mx35.h> |
110 | #endif | 106 | #include <mach/mx2x.h> |
111 | 107 | #include <mach/mx21.h> | |
112 | #ifdef CONFIG_ARCH_MX2 | 108 | #include <mach/mx27.h> |
113 | # include <mach/mx2x.h> | 109 | #include <mach/mx1.h> |
114 | # ifdef CONFIG_MACH_MX21 | 110 | #include <mach/mx25.h> |
115 | # include <mach/mx21.h> | ||
116 | # endif | ||
117 | # ifdef CONFIG_MACH_MX27 | ||
118 | # include <mach/mx27.h> | ||
119 | # endif | ||
120 | #endif | ||
121 | |||
122 | #ifdef CONFIG_ARCH_MX1 | ||
123 | # include <mach/mx1.h> | ||
124 | #endif | ||
125 | |||
126 | #ifdef CONFIG_ARCH_MX25 | ||
127 | # include <mach/mx25.h> | ||
128 | #endif | ||
129 | 111 | ||
130 | #define imx_map_entry(soc, name, _type) { \ | 112 | #define imx_map_entry(soc, name, _type) { \ |
131 | .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \ | 113 | .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \ |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx53.h b/arch/arm/plat-mxc/include/mach/iomux-mx53.h index e95d9cb8aeb7..e11dd5f09c34 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx53.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx53.h | |||
@@ -39,7 +39,7 @@ | |||
39 | #define _MX53_PAD_GPIO_19__ECSPI1_RDY IOMUX_PAD(0x348, 0x20, 5, 0x0, 0, 0) | 39 | #define _MX53_PAD_GPIO_19__ECSPI1_RDY IOMUX_PAD(0x348, 0x20, 5, 0x0, 0, 0) |
40 | #define _MX53_PAD_GPIO_19__FEC_TDATA_3 IOMUX_PAD(0x348, 0x20, 6, 0x0, 0, 0) | 40 | #define _MX53_PAD_GPIO_19__FEC_TDATA_3 IOMUX_PAD(0x348, 0x20, 6, 0x0, 0, 0) |
41 | #define _MX53_PAD_GPIO_19__SRC_INT_BOOT IOMUX_PAD(0x348, 0x20,7, 0x0, 0, 0) | 41 | #define _MX53_PAD_GPIO_19__SRC_INT_BOOT IOMUX_PAD(0x348, 0x20,7, 0x0, 0, 0) |
42 | #define _MX53_PAD_KEY_COL0__KPP_COL_0 IOMUX_PAD(0x34C, 0x24, o, 0x0, 0, 0) | 42 | #define _MX53_PAD_KEY_COL0__KPP_COL_0 IOMUX_PAD(0x34C, 0x24, 0, 0x0, 0, 0) |
43 | #define _MX53_PAD_KEY_COL0__GPIO4_6 IOMUX_PAD(0x34C, 0x24, 1, 0x0, 0, 0) | 43 | #define _MX53_PAD_KEY_COL0__GPIO4_6 IOMUX_PAD(0x34C, 0x24, 1, 0x0, 0, 0) |
44 | #define _MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC IOMUX_PAD(0x34C, 0x24, 2, 0x758, 0, 0) | 44 | #define _MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC IOMUX_PAD(0x34C, 0x24, 2, 0x758, 0, 0) |
45 | #define _MX53_PAD_KEY_COL0__UART4_TXD_MUX IOMUX_PAD(0x34C, 0x24, 4, 0x890, 0, 0) | 45 | #define _MX53_PAD_KEY_COL0__UART4_TXD_MUX IOMUX_PAD(0x34C, 0x24, 4, 0x890, 0, 0) |
@@ -697,7 +697,7 @@ | |||
697 | #define _MX53_PAD_EIM_DA5__GPIO3_5 IOMUX_PAD(0x500, 0x1B0, 1, 0x0, 0, 0) | 697 | #define _MX53_PAD_EIM_DA5__GPIO3_5 IOMUX_PAD(0x500, 0x1B0, 1, 0x0, 0, 0) |
698 | #define _MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 IOMUX_PAD(0x500, 0x1B0, 3, 0x0, 0, 0) | 698 | #define _MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 IOMUX_PAD(0x500, 0x1B0, 3, 0x0, 0, 0) |
699 | #define _MX53_PAD_EIM_DA5__IPU_CSI1_D_4 IOMUX_PAD(0x500, 0x1B0, 4, 0x0, 0, 0) | 699 | #define _MX53_PAD_EIM_DA5__IPU_CSI1_D_4 IOMUX_PAD(0x500, 0x1B0, 4, 0x0, 0, 0) |
700 | #define _MX53_PAD_EIM_DA5__SRC_BT_CFG3_6 IOMUX_PAD(0x500, 0x1B0, 17, 0x0, 0, 0) | 700 | #define _MX53_PAD_EIM_DA5__SRC_BT_CFG3_6 IOMUX_PAD(0x500, 0x1B0, 7 | IOMUX_CONFIG_SION, 0x0, 0, 0) |
701 | #define _MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 IOMUX_PAD(0x504, 0x1B4, 0, 0x0, 0, 0) | 701 | #define _MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 IOMUX_PAD(0x504, 0x1B4, 0, 0x0, 0, 0) |
702 | #define _MX53_PAD_EIM_DA6__GPIO3_6 IOMUX_PAD(0x504, 0x1B4, 1, 0x0, 0, 0) | 702 | #define _MX53_PAD_EIM_DA6__GPIO3_6 IOMUX_PAD(0x504, 0x1B4, 1, 0x0, 0, 0) |
703 | #define _MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 IOMUX_PAD(0x504, 0x1B4, 3, 0x0, 0, 0) | 703 | #define _MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 IOMUX_PAD(0x504, 0x1B4, 3, 0x0, 0, 0) |
@@ -958,12 +958,12 @@ | |||
958 | #define _MX53_PAD_PATA_DATA5__ESDHC4_DAT5 IOMUX_PAD(0x63C, 0x2B8, 4, 0x0, 0, 0) | 958 | #define _MX53_PAD_PATA_DATA5__ESDHC4_DAT5 IOMUX_PAD(0x63C, 0x2B8, 4, 0x0, 0, 0) |
959 | #define _MX53_PAD_PATA_DATA5__GPU3d_GPU_DEBUG_OUT_5 IOMUX_PAD(0x63C, 0x2B8, 5, 0x0, 0, 0) | 959 | #define _MX53_PAD_PATA_DATA5__GPU3d_GPU_DEBUG_OUT_5 IOMUX_PAD(0x63C, 0x2B8, 5, 0x0, 0, 0) |
960 | #define _MX53_PAD_PATA_DATA5__IPU_DIAG_BUS_5 IOMUX_PAD(0x63C, 0x2B8, 6, 0x0, 0, 0) | 960 | #define _MX53_PAD_PATA_DATA5__IPU_DIAG_BUS_5 IOMUX_PAD(0x63C, 0x2B8, 6, 0x0, 0, 0) |
961 | #define _MX53_PAD_PATA_DATA6__PATA_DATA_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) | 961 | #define _MX53_PAD_PATA_DATA6__PATA_DATA_6 IOMUX_PAD(0x640, 0x2BC, 0, 0x0, 0, 0) |
962 | #define _MX53_PAD_PATA_DATA6__GPIO2_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) | 962 | #define _MX53_PAD_PATA_DATA6__GPIO2_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) |
963 | #define _MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) | 963 | #define _MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 IOMUX_PAD(0x640, 0x2BC, 3, 0x0, 0, 0) |
964 | #define _MX53_PAD_PATA_DATA6__ESDHC4_DAT6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) | 964 | #define _MX53_PAD_PATA_DATA6__ESDHC4_DAT6 IOMUX_PAD(0x640, 0x2BC, 4, 0x0, 0, 0) |
965 | #define _MX53_PAD_PATA_DATA6__GPU3d_GPU_DEBUG_OUT_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) | 965 | #define _MX53_PAD_PATA_DATA6__GPU3d_GPU_DEBUG_OUT_6 IOMUX_PAD(0x640, 0x2BC, 5, 0x0, 0, 0) |
966 | #define _MX53_PAD_PATA_DATA6__IPU_DIAG_BUS_6 IOMUX_PAD(0x640, 0x2BC, 1, 0x0, 0, 0) | 966 | #define _MX53_PAD_PATA_DATA6__IPU_DIAG_BUS_6 IOMUX_PAD(0x640, 0x2BC, 6, 0x0, 0, 0) |
967 | #define _MX53_PAD_PATA_DATA7__PATA_DATA_7 IOMUX_PAD(0x644, 0x2C0, 0, 0x0, 0, 0) | 967 | #define _MX53_PAD_PATA_DATA7__PATA_DATA_7 IOMUX_PAD(0x644, 0x2C0, 0, 0x0, 0, 0) |
968 | #define _MX53_PAD_PATA_DATA7__GPIO2_7 IOMUX_PAD(0x644, 0x2C0, 1, 0x0, 0, 0) | 968 | #define _MX53_PAD_PATA_DATA7__GPIO2_7 IOMUX_PAD(0x644, 0x2C0, 1, 0x0, 0, 0) |
969 | #define _MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 IOMUX_PAD(0x644, 0x2C0, 3, 0x0, 0, 0) | 969 | #define _MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 IOMUX_PAD(0x644, 0x2C0, 3, 0x0, 0, 0) |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/plat-mxc/include/mach/iomux-v1.h index c07d30210c57..6fa8a707b9a0 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v1.h +++ b/arch/arm/plat-mxc/include/mach/iomux-v1.h | |||
@@ -85,9 +85,6 @@ | |||
85 | #define GPIO_BOUT_0 (2 << GPIO_BOUT_SHIFT) | 85 | #define GPIO_BOUT_0 (2 << GPIO_BOUT_SHIFT) |
86 | #define GPIO_BOUT_1 (3 << GPIO_BOUT_SHIFT) | 86 | #define GPIO_BOUT_1 (3 << GPIO_BOUT_SHIFT) |
87 | 87 | ||
88 | /* decode irq number to use with IMR(x), ISR(x) and friends */ | ||
89 | #define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5) | ||
90 | |||
91 | #define IRQ_GPIOA(x) (MXC_GPIO_IRQ_START + x) | 88 | #define IRQ_GPIOA(x) (MXC_GPIO_IRQ_START + x) |
92 | #define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x) | 89 | #define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x) |
93 | #define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) | 90 | #define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) |
@@ -98,7 +95,6 @@ | |||
98 | extern int mxc_gpio_mode(int gpio_mode); | 95 | extern int mxc_gpio_mode(int gpio_mode); |
99 | extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, | 96 | extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, |
100 | const char *label); | 97 | const char *label); |
101 | extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count); | ||
102 | 98 | ||
103 | extern int __init imx_iomuxv1_init(void __iomem *base, int numports); | 99 | extern int __init imx_iomuxv1_init(void __iomem *base, int numports); |
104 | 100 | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h index 82620af1922f..ebbce33097a7 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h | |||
@@ -66,7 +66,6 @@ typedef u64 iomux_v3_cfg_t; | |||
66 | #define MUX_MODE_MASK ((iomux_v3_cfg_t)0x1f << MUX_MODE_SHIFT) | 66 | #define MUX_MODE_MASK ((iomux_v3_cfg_t)0x1f << MUX_MODE_SHIFT) |
67 | #define MUX_PAD_CTRL_SHIFT 41 | 67 | #define MUX_PAD_CTRL_SHIFT 41 |
68 | #define MUX_PAD_CTRL_MASK ((iomux_v3_cfg_t)0x1ffff << MUX_PAD_CTRL_SHIFT) | 68 | #define MUX_PAD_CTRL_MASK ((iomux_v3_cfg_t)0x1ffff << MUX_PAD_CTRL_SHIFT) |
69 | #define NO_PAD_CTRL ((iomux_v3_cfg_t)1 << (MUX_PAD_CTRL_SHIFT + 16)) | ||
70 | #define MUX_SEL_INPUT_SHIFT 58 | 69 | #define MUX_SEL_INPUT_SHIFT 58 |
71 | #define MUX_SEL_INPUT_MASK ((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT) | 70 | #define MUX_SEL_INPUT_MASK ((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT) |
72 | 71 | ||
@@ -85,6 +84,7 @@ typedef u64 iomux_v3_cfg_t; | |||
85 | * Use to set PAD control | 84 | * Use to set PAD control |
86 | */ | 85 | */ |
87 | 86 | ||
87 | #define NO_PAD_CTRL (1 << 16) | ||
88 | #define PAD_CTL_DVS (1 << 13) | 88 | #define PAD_CTL_DVS (1 << 13) |
89 | #define PAD_CTL_HYS (1 << 8) | 89 | #define PAD_CTL_HYS (1 << 8) |
90 | 90 | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux.h b/arch/arm/plat-mxc/include/mach/iomux.h deleted file mode 100644 index 3d226d7e7be2..000000000000 --- a/arch/arm/plat-mxc/include/mach/iomux.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2010 Uwe Kleine-Koenig, Pengutronix | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms of the GNU General Public License version 2 as published by | ||
6 | * the Free Software Foundation. | ||
7 | */ | ||
8 | #ifndef __MACH_IOMUX_H__ | ||
9 | #define __MACH_IOMUX_H__ | ||
10 | |||
11 | /* This file will go away, please include mach/iomux-mx... directly */ | ||
12 | |||
13 | #ifdef CONFIG_ARCH_MX1 | ||
14 | #include <mach/iomux-mx1.h> | ||
15 | #endif | ||
16 | #ifdef CONFIG_ARCH_MX2 | ||
17 | #include <mach/iomux-mx2x.h> | ||
18 | #ifdef CONFIG_MACH_MX21 | ||
19 | #include <mach/iomux-mx21.h> | ||
20 | #endif | ||
21 | #ifdef CONFIG_MACH_MX27 | ||
22 | #include <mach/iomux-mx27.h> | ||
23 | #endif | ||
24 | #endif | ||
25 | |||
26 | #endif /* __MACH_IOMUX_H__ */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h index 9d2a1ef84de2..5e3c3236ebf3 100644 --- a/arch/arm/plat-mxc/include/mach/mx53.h +++ b/arch/arm/plat-mxc/include/mach/mx53.h | |||
@@ -145,14 +145,14 @@ | |||
145 | /* | 145 | /* |
146 | * Memory regions and CS | 146 | * Memory regions and CS |
147 | */ | 147 | */ |
148 | #define MX53_CSD0_BASE_ADDR 0x90000000 | 148 | #define MX53_CSD0_BASE_ADDR 0x70000000 |
149 | #define MX53_CSD1_BASE_ADDR 0xA0000000 | 149 | #define MX53_CSD1_BASE_ADDR 0xB0000000 |
150 | #define MX53_CS0_BASE_ADDR 0xB0000000 | 150 | #define MX53_CS0_BASE_ADDR 0xF0000000 |
151 | #define MX53_CS1_BASE_ADDR 0xB8000000 | 151 | #define MX53_CS1_32MB_BASE_ADDR 0xF2000000 |
152 | #define MX53_CS2_BASE_ADDR 0xC0000000 | 152 | #define MX53_CS1_64MB_BASE_ADDR 0xF4000000 |
153 | #define MX53_CS3_BASE_ADDR 0xC8000000 | 153 | #define MX53_CS2_64MB_BASE_ADDR 0xF4000000 |
154 | #define MX53_CS4_BASE_ADDR 0xCC000000 | 154 | #define MX53_CS2_96MB_BASE_ADDR 0xF6000000 |
155 | #define MX53_CS5_BASE_ADDR 0xCE000000 | 155 | #define MX53_CS3_BASE_ADDR 0xF6000000 |
156 | 156 | ||
157 | #define MX53_IO_P2V(x) IMX_IO_P2V(x) | 157 | #define MX53_IO_P2V(x) IMX_IO_P2V(x) |
158 | #define MX53_IO_ADDRESS(x) IOMEM(MX53_IO_P2V(x)) | 158 | #define MX53_IO_ADDRESS(x) IOMEM(MX53_IO_P2V(x)) |
@@ -176,10 +176,10 @@ | |||
176 | /* | 176 | /* |
177 | * DMA request assignments | 177 | * DMA request assignments |
178 | */ | 178 | */ |
179 | #define MX53_DMA_REQ_SSI3_TX1 47 | 179 | #define MX53_DMA_REQ_SSI3_TX0 47 |
180 | #define MX53_DMA_REQ_SSI3_RX1 46 | 180 | #define MX53_DMA_REQ_SSI3_RX0 46 |
181 | #define MX53_DMA_REQ_SSI3_TX2 45 | 181 | #define MX53_DMA_REQ_SSI3_TX1 45 |
182 | #define MX53_DMA_REQ_SSI3_RX2 44 | 182 | #define MX53_DMA_REQ_SSI3_RX1 44 |
183 | #define MX53_DMA_REQ_UART3_TX 43 | 183 | #define MX53_DMA_REQ_UART3_TX 43 |
184 | #define MX53_DMA_REQ_UART3_RX 42 | 184 | #define MX53_DMA_REQ_UART3_RX 42 |
185 | #define MX53_DMA_REQ_ESAI_TX 41 | 185 | #define MX53_DMA_REQ_ESAI_TX 41 |
@@ -194,14 +194,14 @@ | |||
194 | #define MX53_DMA_REQ_ASRC_DMA1 32 | 194 | #define MX53_DMA_REQ_ASRC_DMA1 32 |
195 | #define MX53_DMA_REQ_EMI_WR 31 | 195 | #define MX53_DMA_REQ_EMI_WR 31 |
196 | #define MX53_DMA_REQ_EMI_RD 30 | 196 | #define MX53_DMA_REQ_EMI_RD 30 |
197 | #define MX53_DMA_REQ_SSI1_TX1 29 | 197 | #define MX53_DMA_REQ_SSI1_TX0 29 |
198 | #define MX53_DMA_REQ_SSI1_RX1 28 | 198 | #define MX53_DMA_REQ_SSI1_RX0 28 |
199 | #define MX53_DMA_REQ_SSI1_TX2 27 | 199 | #define MX53_DMA_REQ_SSI1_TX1 27 |
200 | #define MX53_DMA_REQ_SSI1_RX2 26 | 200 | #define MX53_DMA_REQ_SSI1_RX1 26 |
201 | #define MX53_DMA_REQ_SSI2_TX1 25 | 201 | #define MX53_DMA_REQ_SSI2_TX0 25 |
202 | #define MX53_DMA_REQ_SSI2_RX1 24 | 202 | #define MX53_DMA_REQ_SSI2_RX0 24 |
203 | #define MX53_DMA_REQ_SSI2_TX2 23 | 203 | #define MX53_DMA_REQ_SSI2_TX1 23 |
204 | #define MX53_DMA_REQ_SSI2_RX2 22 | 204 | #define MX53_DMA_REQ_SSI2_RX1 22 |
205 | #define MX53_DMA_REQ_I2C2_SDHC2 21 | 205 | #define MX53_DMA_REQ_I2C2_SDHC2 21 |
206 | #define MX53_DMA_REQ_I2C1_SDHC1 20 | 206 | #define MX53_DMA_REQ_I2C1_SDHC1 20 |
207 | #define MX53_DMA_REQ_UART1_TX 19 | 207 | #define MX53_DMA_REQ_UART1_TX 19 |
@@ -233,7 +233,7 @@ | |||
233 | #define MX53_INT_ESDHC2 2 | 233 | #define MX53_INT_ESDHC2 2 |
234 | #define MX53_INT_ESDHC3 3 | 234 | #define MX53_INT_ESDHC3 3 |
235 | #define MX53_INT_ESDHC4 4 | 235 | #define MX53_INT_ESDHC4 4 |
236 | #define MX53_INT_RESV5 5 | 236 | #define MX53_INT_DAP 5 |
237 | #define MX53_INT_SDMA 6 | 237 | #define MX53_INT_SDMA 6 |
238 | #define MX53_INT_IOMUX 7 | 238 | #define MX53_INT_IOMUX 7 |
239 | #define MX53_INT_NFC 8 | 239 | #define MX53_INT_NFC 8 |
@@ -241,7 +241,7 @@ | |||
241 | #define MX53_INT_IPU_ERR 10 | 241 | #define MX53_INT_IPU_ERR 10 |
242 | #define MX53_INT_IPU_SYN 11 | 242 | #define MX53_INT_IPU_SYN 11 |
243 | #define MX53_INT_GPU 12 | 243 | #define MX53_INT_GPU 12 |
244 | #define MX53_INT_RESV13 13 | 244 | #define MX53_INT_UART4 13 |
245 | #define MX53_INT_USB_H1 14 | 245 | #define MX53_INT_USB_H1 14 |
246 | #define MX53_INT_EMI 15 | 246 | #define MX53_INT_EMI 15 |
247 | #define MX53_INT_USB_H2 16 | 247 | #define MX53_INT_USB_H2 16 |
@@ -262,8 +262,8 @@ | |||
262 | #define MX53_INT_UART1 31 | 262 | #define MX53_INT_UART1 31 |
263 | #define MX53_INT_UART2 32 | 263 | #define MX53_INT_UART2 32 |
264 | #define MX53_INT_UART3 33 | 264 | #define MX53_INT_UART3 33 |
265 | #define MX53_INT_RESV34 34 | 265 | #define MX53_INT_RTC 34 |
266 | #define MX53_INT_RESV35 35 | 266 | #define MX53_INT_PTP 35 |
267 | #define MX53_INT_ECSPI1 36 | 267 | #define MX53_INT_ECSPI1 36 |
268 | #define MX53_INT_ECSPI2 37 | 268 | #define MX53_INT_ECSPI2 37 |
269 | #define MX53_INT_CSPI 38 | 269 | #define MX53_INT_CSPI 38 |
@@ -293,8 +293,8 @@ | |||
293 | #define MX53_INT_I2C1 62 | 293 | #define MX53_INT_I2C1 62 |
294 | #define MX53_INT_I2C2 63 | 294 | #define MX53_INT_I2C2 63 |
295 | #define MX53_INT_I2C3 64 | 295 | #define MX53_INT_I2C3 64 |
296 | #define MX53_INT_RESV65 65 | 296 | #define MX53_INT_MLB 65 |
297 | #define MX53_INT_RESV66 66 | 297 | #define MX53_INT_ASRC 66 |
298 | #define MX53_INT_SPDIF 67 | 298 | #define MX53_INT_SPDIF 67 |
299 | #define MX53_INT_SIM_DAT 68 | 299 | #define MX53_INT_SIM_DAT 68 |
300 | #define MX53_INT_IIM 69 | 300 | #define MX53_INT_IIM 69 |
@@ -314,7 +314,7 @@ | |||
314 | #define MX53_INT_CAN2 83 | 314 | #define MX53_INT_CAN2 83 |
315 | #define MX53_INT_GPU2_IRQ 84 | 315 | #define MX53_INT_GPU2_IRQ 84 |
316 | #define MX53_INT_GPU2_BUSY 85 | 316 | #define MX53_INT_GPU2_BUSY 85 |
317 | #define MX53_INT_RESV86 86 | 317 | #define MX53_INT_UART5 86 |
318 | #define MX53_INT_FEC 87 | 318 | #define MX53_INT_FEC 87 |
319 | #define MX53_INT_OWIRE 88 | 319 | #define MX53_INT_OWIRE 88 |
320 | #define MX53_INT_CTI1_TG2 89 | 320 | #define MX53_INT_CTI1_TG2 89 |
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h index 4ac53ce97c24..09879235a9f5 100644 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/plat-mxc/include/mach/mxc.h | |||
@@ -68,7 +68,7 @@ | |||
68 | extern unsigned int __mxc_cpu_type; | 68 | extern unsigned int __mxc_cpu_type; |
69 | #endif | 69 | #endif |
70 | 70 | ||
71 | #ifdef CONFIG_ARCH_MX1 | 71 | #ifdef CONFIG_SOC_IMX1 |
72 | # ifdef mxc_cpu_type | 72 | # ifdef mxc_cpu_type |
73 | # undef mxc_cpu_type | 73 | # undef mxc_cpu_type |
74 | # define mxc_cpu_type __mxc_cpu_type | 74 | # define mxc_cpu_type __mxc_cpu_type |
@@ -80,7 +80,7 @@ extern unsigned int __mxc_cpu_type; | |||
80 | # define cpu_is_mx1() (0) | 80 | # define cpu_is_mx1() (0) |
81 | #endif | 81 | #endif |
82 | 82 | ||
83 | #ifdef CONFIG_MACH_MX21 | 83 | #ifdef CONFIG_SOC_IMX21 |
84 | # ifdef mxc_cpu_type | 84 | # ifdef mxc_cpu_type |
85 | # undef mxc_cpu_type | 85 | # undef mxc_cpu_type |
86 | # define mxc_cpu_type __mxc_cpu_type | 86 | # define mxc_cpu_type __mxc_cpu_type |
@@ -92,7 +92,7 @@ extern unsigned int __mxc_cpu_type; | |||
92 | # define cpu_is_mx21() (0) | 92 | # define cpu_is_mx21() (0) |
93 | #endif | 93 | #endif |
94 | 94 | ||
95 | #ifdef CONFIG_ARCH_MX25 | 95 | #ifdef CONFIG_SOC_IMX25 |
96 | # ifdef mxc_cpu_type | 96 | # ifdef mxc_cpu_type |
97 | # undef mxc_cpu_type | 97 | # undef mxc_cpu_type |
98 | # define mxc_cpu_type __mxc_cpu_type | 98 | # define mxc_cpu_type __mxc_cpu_type |
@@ -104,7 +104,7 @@ extern unsigned int __mxc_cpu_type; | |||
104 | # define cpu_is_mx25() (0) | 104 | # define cpu_is_mx25() (0) |
105 | #endif | 105 | #endif |
106 | 106 | ||
107 | #ifdef CONFIG_MACH_MX27 | 107 | #ifdef CONFIG_SOC_IMX27 |
108 | # ifdef mxc_cpu_type | 108 | # ifdef mxc_cpu_type |
109 | # undef mxc_cpu_type | 109 | # undef mxc_cpu_type |
110 | # define mxc_cpu_type __mxc_cpu_type | 110 | # define mxc_cpu_type __mxc_cpu_type |
diff --git a/arch/arm/plat-mxc/include/mach/sdma.h b/arch/arm/plat-mxc/include/mach/sdma.h index 913e0432e40e..f495c87c113f 100644 --- a/arch/arm/plat-mxc/include/mach/sdma.h +++ b/arch/arm/plat-mxc/include/mach/sdma.h | |||
@@ -49,14 +49,12 @@ struct sdma_script_start_addrs { | |||
49 | * struct sdma_platform_data - platform specific data for SDMA engine | 49 | * struct sdma_platform_data - platform specific data for SDMA engine |
50 | * | 50 | * |
51 | * @sdma_version The version of this SDMA engine | 51 | * @sdma_version The version of this SDMA engine |
52 | * @cpu_name used to generate the firmware name | 52 | * @fw_name The firmware name |
53 | * @to_version CPU Tape out version | ||
54 | * @script_addrs SDMA scripts addresses in SDMA ROM | 53 | * @script_addrs SDMA scripts addresses in SDMA ROM |
55 | */ | 54 | */ |
56 | struct sdma_platform_data { | 55 | struct sdma_platform_data { |
57 | int sdma_version; | 56 | int sdma_version; |
58 | char *cpu_name; | 57 | char *fw_name; |
59 | int to_version; | ||
60 | struct sdma_script_start_addrs *script_addrs; | 58 | struct sdma_script_start_addrs *script_addrs; |
61 | }; | 59 | }; |
62 | 60 | ||
diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/arch/arm/plat-mxc/include/mach/timex.h index d61d5c74817c..10343d1f87e1 100644 --- a/arch/arm/plat-mxc/include/mach/timex.h +++ b/arch/arm/plat-mxc/include/mach/timex.h | |||
@@ -16,16 +16,7 @@ | |||
16 | #ifndef __ASM_ARCH_MXC_TIMEX_H__ | 16 | #ifndef __ASM_ARCH_MXC_TIMEX_H__ |
17 | #define __ASM_ARCH_MXC_TIMEX_H__ | 17 | #define __ASM_ARCH_MXC_TIMEX_H__ |
18 | 18 | ||
19 | #if defined CONFIG_ARCH_MX1 | 19 | /* Bogus value */ |
20 | #define CLOCK_TICK_RATE 16000000 | 20 | #define CLOCK_TICK_RATE 12345678 |
21 | #elif defined CONFIG_ARCH_MX2 | ||
22 | #define CLOCK_TICK_RATE 13300000 | ||
23 | #elif defined CONFIG_ARCH_MX3 | ||
24 | #define CLOCK_TICK_RATE 16625000 | ||
25 | #elif defined CONFIG_ARCH_MX25 | ||
26 | #define CLOCK_TICK_RATE 16000000 | ||
27 | #elif defined CONFIG_ARCH_MX5 | ||
28 | #define CLOCK_TICK_RATE 8000000 | ||
29 | #endif | ||
30 | 21 | ||
31 | #endif /* __ASM_ARCH_MXC_TIMEX_H__ */ | 22 | #endif /* __ASM_ARCH_MXC_TIMEX_H__ */ |
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h index d85e2d1c0324..88fd40452567 100644 --- a/arch/arm/plat-mxc/include/mach/uncompress.h +++ b/arch/arm/plat-mxc/include/mach/uncompress.h | |||
@@ -117,6 +117,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id) | |||
117 | case MACH_TYPE_MX53_EVK: | 117 | case MACH_TYPE_MX53_EVK: |
118 | case MACH_TYPE_MX53_LOCO: | 118 | case MACH_TYPE_MX53_LOCO: |
119 | case MACH_TYPE_MX53_SMD: | 119 | case MACH_TYPE_MX53_SMD: |
120 | case MACH_TYPE_MX53_ARD: | ||
120 | uart_base = MX53_UART1_BASE_ADDR; | 121 | uart_base = MX53_UART1_BASE_ADDR; |
121 | break; | 122 | break; |
122 | default: | 123 | default: |
diff --git a/arch/arm/plat-mxc/iomux-v1.c b/arch/arm/plat-mxc/iomux-v1.c index 3238c10d4e02..1f73963bc13e 100644 --- a/arch/arm/plat-mxc/iomux-v1.c +++ b/arch/arm/plat-mxc/iomux-v1.c | |||
@@ -157,7 +157,7 @@ EXPORT_SYMBOL(mxc_gpio_mode); | |||
157 | static int imx_iomuxv1_setup_multiple(const int *list, unsigned count) | 157 | static int imx_iomuxv1_setup_multiple(const int *list, unsigned count) |
158 | { | 158 | { |
159 | size_t i; | 159 | size_t i; |
160 | int ret; | 160 | int ret = 0; |
161 | 161 | ||
162 | for (i = 0; i < count; ++i) { | 162 | for (i = 0; i < count; ++i) { |
163 | ret = mxc_gpio_mode(list[i]); | 163 | ret = mxc_gpio_mode(list[i]); |
@@ -172,45 +172,13 @@ static int imx_iomuxv1_setup_multiple(const int *list, unsigned count) | |||
172 | int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, | 172 | int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, |
173 | const char *label) | 173 | const char *label) |
174 | { | 174 | { |
175 | size_t i; | ||
176 | int ret; | 175 | int ret; |
177 | 176 | ||
178 | for (i = 0; i < count; ++i) { | ||
179 | unsigned gpio = pin_list[i] & (GPIO_PIN_MASK | GPIO_PORT_MASK); | ||
180 | |||
181 | ret = gpio_request(gpio, label); | ||
182 | if (ret) | ||
183 | goto err_gpio_request; | ||
184 | } | ||
185 | |||
186 | ret = imx_iomuxv1_setup_multiple(pin_list, count); | 177 | ret = imx_iomuxv1_setup_multiple(pin_list, count); |
187 | if (ret) | ||
188 | goto err_setup; | ||
189 | |||
190 | return 0; | ||
191 | |||
192 | err_setup: | ||
193 | BUG_ON(i != count); | ||
194 | |||
195 | err_gpio_request: | ||
196 | mxc_gpio_release_multiple_pins(pin_list, i); | ||
197 | |||
198 | return ret; | 178 | return ret; |
199 | } | 179 | } |
200 | EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins); | 180 | EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins); |
201 | 181 | ||
202 | void mxc_gpio_release_multiple_pins(const int *pin_list, int count) | ||
203 | { | ||
204 | size_t i; | ||
205 | |||
206 | for (i = 0; i < count; ++i) { | ||
207 | unsigned gpio = pin_list[i] & (GPIO_PIN_MASK | GPIO_PORT_MASK); | ||
208 | |||
209 | gpio_free(gpio); | ||
210 | } | ||
211 | } | ||
212 | EXPORT_SYMBOL(mxc_gpio_release_multiple_pins); | ||
213 | |||
214 | int __init imx_iomuxv1_init(void __iomem *base, int numports) | 182 | int __init imx_iomuxv1_init(void __iomem *base, int numports) |
215 | { | 183 | { |
216 | imx_iomuxv1_baseaddr = base; | 184 | imx_iomuxv1_baseaddr = base; |
diff --git a/arch/arm/plat-mxc/irq-common.c b/arch/arm/plat-mxc/irq-common.c index e1c6eff7258a..96953e2e4f11 100644 --- a/arch/arm/plat-mxc/irq-common.c +++ b/arch/arm/plat-mxc/irq-common.c | |||
@@ -42,17 +42,16 @@ EXPORT_SYMBOL(imx_irq_set_priority); | |||
42 | 42 | ||
43 | int mxc_set_irq_fiq(unsigned int irq, unsigned int type) | 43 | int mxc_set_irq_fiq(unsigned int irq, unsigned int type) |
44 | { | 44 | { |
45 | struct mxc_irq_chip *chip; | 45 | struct irq_chip_generic *gc; |
46 | struct irq_chip *base; | 46 | int (*set_irq_fiq)(unsigned int, unsigned int); |
47 | int ret; | 47 | int ret; |
48 | 48 | ||
49 | ret = -ENOSYS; | 49 | ret = -ENOSYS; |
50 | 50 | ||
51 | base = irq_get_chip(irq); | 51 | gc = irq_get_chip_data(irq); |
52 | if (base) { | 52 | if (gc && gc->private) { |
53 | chip = container_of(base, struct mxc_irq_chip, base); | 53 | set_irq_fiq = gc->private; |
54 | if (chip->set_irq_fiq) | 54 | ret = set_irq_fiq(irq, type); |
55 | ret = chip->set_irq_fiq(irq, type); | ||
56 | } | 55 | } |
57 | 56 | ||
58 | return ret; | 57 | return ret; |
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c index 7a61ef8f471a..761c3c940a68 100644 --- a/arch/arm/plat-mxc/pwm.c +++ b/arch/arm/plat-mxc/pwm.c | |||
@@ -214,14 +214,14 @@ static int __devinit mxc_pwm_probe(struct platform_device *pdev) | |||
214 | goto err_free_clk; | 214 | goto err_free_clk; |
215 | } | 215 | } |
216 | 216 | ||
217 | r = request_mem_region(r->start, r->end - r->start + 1, pdev->name); | 217 | r = request_mem_region(r->start, resource_size(r), pdev->name); |
218 | if (r == NULL) { | 218 | if (r == NULL) { |
219 | dev_err(&pdev->dev, "failed to request memory resource\n"); | 219 | dev_err(&pdev->dev, "failed to request memory resource\n"); |
220 | ret = -EBUSY; | 220 | ret = -EBUSY; |
221 | goto err_free_clk; | 221 | goto err_free_clk; |
222 | } | 222 | } |
223 | 223 | ||
224 | pwm->mmio_base = ioremap(r->start, r->end - r->start + 1); | 224 | pwm->mmio_base = ioremap(r->start, resource_size(r)); |
225 | if (pwm->mmio_base == NULL) { | 225 | if (pwm->mmio_base == NULL) { |
226 | dev_err(&pdev->dev, "failed to ioremap() registers\n"); | 226 | dev_err(&pdev->dev, "failed to ioremap() registers\n"); |
227 | ret = -ENODEV; | 227 | ret = -ENODEV; |
@@ -236,7 +236,7 @@ static int __devinit mxc_pwm_probe(struct platform_device *pdev) | |||
236 | return 0; | 236 | return 0; |
237 | 237 | ||
238 | err_free_mem: | 238 | err_free_mem: |
239 | release_mem_region(r->start, r->end - r->start + 1); | 239 | release_mem_region(r->start, resource_size(r)); |
240 | err_free_clk: | 240 | err_free_clk: |
241 | clk_put(pwm->clk); | 241 | clk_put(pwm->clk); |
242 | err_free: | 242 | err_free: |
@@ -260,7 +260,7 @@ static int __devexit mxc_pwm_remove(struct platform_device *pdev) | |||
260 | iounmap(pwm->mmio_base); | 260 | iounmap(pwm->mmio_base); |
261 | 261 | ||
262 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 262 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
263 | release_mem_region(r->start, r->end - r->start + 1); | 263 | release_mem_region(r->start, resource_size(r)); |
264 | 264 | ||
265 | clk_put(pwm->clk); | 265 | clk_put(pwm->clk); |
266 | 266 | ||
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c index 57f9395f87ce..f257fccdc394 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/plat-mxc/tzic.c | |||
@@ -49,6 +49,8 @@ | |||
49 | 49 | ||
50 | void __iomem *tzic_base; /* Used as irq controller base in entry-macro.S */ | 50 | void __iomem *tzic_base; /* Used as irq controller base in entry-macro.S */ |
51 | 51 | ||
52 | #define TZIC_NUM_IRQS 128 | ||
53 | |||
52 | #ifdef CONFIG_FIQ | 54 | #ifdef CONFIG_FIQ |
53 | static int tzic_set_irq_fiq(unsigned int irq, unsigned int type) | 55 | static int tzic_set_irq_fiq(unsigned int irq, unsigned int type) |
54 | { | 56 | { |
@@ -66,78 +68,34 @@ static int tzic_set_irq_fiq(unsigned int irq, unsigned int type) | |||
66 | 68 | ||
67 | return 0; | 69 | return 0; |
68 | } | 70 | } |
71 | #else | ||
72 | #define tzic_set_irq_fiq NULL | ||
69 | #endif | 73 | #endif |
70 | 74 | ||
71 | /** | 75 | static unsigned int *wakeup_intr[4]; |
72 | * tzic_mask_irq() - Disable interrupt source "d" in the TZIC | ||
73 | * | ||
74 | * @param d interrupt source | ||
75 | */ | ||
76 | static void tzic_mask_irq(struct irq_data *d) | ||
77 | { | ||
78 | int index, off; | ||
79 | |||
80 | index = d->irq >> 5; | ||
81 | off = d->irq & 0x1F; | ||
82 | __raw_writel(1 << off, tzic_base + TZIC_ENCLEAR0(index)); | ||
83 | } | ||
84 | 76 | ||
85 | /** | 77 | static __init void tzic_init_gc(unsigned int irq_start) |
86 | * tzic_unmask_irq() - Enable interrupt source "d" in the TZIC | ||
87 | * | ||
88 | * @param d interrupt source | ||
89 | */ | ||
90 | static void tzic_unmask_irq(struct irq_data *d) | ||
91 | { | 78 | { |
92 | int index, off; | 79 | struct irq_chip_generic *gc; |
93 | 80 | struct irq_chip_type *ct; | |
94 | index = d->irq >> 5; | 81 | int idx = irq_start >> 5; |
95 | off = d->irq & 0x1F; | 82 | |
96 | __raw_writel(1 << off, tzic_base + TZIC_ENSET0(index)); | 83 | gc = irq_alloc_generic_chip("tzic", 1, irq_start, tzic_base, |
84 | handle_level_irq); | ||
85 | gc->private = tzic_set_irq_fiq; | ||
86 | gc->wake_enabled = IRQ_MSK(32); | ||
87 | wakeup_intr[idx] = &gc->wake_active; | ||
88 | |||
89 | ct = gc->chip_types; | ||
90 | ct->chip.irq_mask = irq_gc_mask_disable_reg; | ||
91 | ct->chip.irq_unmask = irq_gc_unmask_enable_reg; | ||
92 | ct->chip.irq_set_wake = irq_gc_set_wake; | ||
93 | ct->regs.disable = TZIC_ENCLEAR0(idx); | ||
94 | ct->regs.enable = TZIC_ENSET0(idx); | ||
95 | |||
96 | irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0); | ||
97 | } | 97 | } |
98 | 98 | ||
99 | static unsigned int wakeup_intr[4]; | ||
100 | |||
101 | /** | ||
102 | * tzic_set_wake_irq() - Set interrupt source "d" in the TZIC as a wake-up source. | ||
103 | * | ||
104 | * @param d interrupt source | ||
105 | * @param enable enable as wake-up if equal to non-zero | ||
106 | * disble as wake-up if equal to zero | ||
107 | * | ||
108 | * @return This function returns 0 on success. | ||
109 | */ | ||
110 | static int tzic_set_wake_irq(struct irq_data *d, unsigned int enable) | ||
111 | { | ||
112 | unsigned int index, off; | ||
113 | |||
114 | index = d->irq >> 5; | ||
115 | off = d->irq & 0x1F; | ||
116 | |||
117 | if (index > 3) | ||
118 | return -EINVAL; | ||
119 | |||
120 | if (enable) | ||
121 | wakeup_intr[index] |= (1 << off); | ||
122 | else | ||
123 | wakeup_intr[index] &= ~(1 << off); | ||
124 | |||
125 | return 0; | ||
126 | } | ||
127 | |||
128 | static struct mxc_irq_chip mxc_tzic_chip = { | ||
129 | .base = { | ||
130 | .name = "MXC_TZIC", | ||
131 | .irq_ack = tzic_mask_irq, | ||
132 | .irq_mask = tzic_mask_irq, | ||
133 | .irq_unmask = tzic_unmask_irq, | ||
134 | .irq_set_wake = tzic_set_wake_irq, | ||
135 | }, | ||
136 | #ifdef CONFIG_FIQ | ||
137 | .set_irq_fiq = tzic_set_irq_fiq, | ||
138 | #endif | ||
139 | }; | ||
140 | |||
141 | /* | 99 | /* |
142 | * This function initializes the TZIC hardware and disables all the | 100 | * This function initializes the TZIC hardware and disables all the |
143 | * interrupts. It registers the interrupt enable and disable functions | 101 | * interrupts. It registers the interrupt enable and disable functions |
@@ -166,11 +124,8 @@ void __init tzic_init_irq(void __iomem *irqbase) | |||
166 | 124 | ||
167 | /* all IRQ no FIQ Warning :: No selection */ | 125 | /* all IRQ no FIQ Warning :: No selection */ |
168 | 126 | ||
169 | for (i = 0; i < MXC_INTERNAL_IRQS; i++) { | 127 | for (i = 0; i < TZIC_NUM_IRQS; i += 32) |
170 | irq_set_chip_and_handler(i, &mxc_tzic_chip.base, | 128 | tzic_init_gc(i); |
171 | handle_level_irq); | ||
172 | set_irq_flags(i, IRQF_VALID); | ||
173 | } | ||
174 | 129 | ||
175 | #ifdef CONFIG_FIQ | 130 | #ifdef CONFIG_FIQ |
176 | /* Initialize FIQ */ | 131 | /* Initialize FIQ */ |
@@ -197,7 +152,7 @@ int tzic_enable_wake(int is_idle) | |||
197 | 152 | ||
198 | for (i = 0; i < 4; i++) { | 153 | for (i = 0; i < 4; i++) { |
199 | v = is_idle ? __raw_readl(tzic_base + TZIC_ENSET0(i)) : | 154 | v = is_idle ? __raw_readl(tzic_base + TZIC_ENSET0(i)) : |
200 | wakeup_intr[i]; | 155 | *wakeup_intr[i]; |
201 | __raw_writel(v, tzic_base + TZIC_WAKEUP0(i)); | 156 | __raw_writel(v, tzic_base + TZIC_WAKEUP0(i)); |
202 | } | 157 | } |
203 | 158 | ||
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index 2abf9660bc6c..a79a8ccd25f6 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c | |||
@@ -1027,17 +1027,13 @@ int s3c2410_dma_config(unsigned int channel, | |||
1027 | struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); | 1027 | struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); |
1028 | unsigned int dcon; | 1028 | unsigned int dcon; |
1029 | 1029 | ||
1030 | pr_debug("%s: chan=%d, xfer_unit=%d, dcon=%08x\n", | 1030 | pr_debug("%s: chan=%d, xfer_unit=%d\n", __func__, channel, xferunit); |
1031 | __func__, channel, xferunit, dcon); | ||
1032 | 1031 | ||
1033 | if (chan == NULL) | 1032 | if (chan == NULL) |
1034 | return -EINVAL; | 1033 | return -EINVAL; |
1035 | 1034 | ||
1036 | pr_debug("%s: Initial dcon is %08x\n", __func__, dcon); | ||
1037 | |||
1038 | dcon = chan->dcon & dma_sel.dcon_mask; | 1035 | dcon = chan->dcon & dma_sel.dcon_mask; |
1039 | 1036 | pr_debug("%s: dcon is %08x\n", __func__, dcon); | |
1040 | pr_debug("%s: New dcon is %08x\n", __func__, dcon); | ||
1041 | 1037 | ||
1042 | switch (chan->req_ch) { | 1038 | switch (chan->req_ch) { |
1043 | case DMACH_I2S_IN: | 1039 | case DMACH_I2S_IN: |
@@ -1235,7 +1231,7 @@ static void s3c2410_dma_resume_chan(struct s3c2410_dma_chan *cp) | |||
1235 | /* restore channel's hardware configuration */ | 1231 | /* restore channel's hardware configuration */ |
1236 | 1232 | ||
1237 | if (!cp->in_use) | 1233 | if (!cp->in_use) |
1238 | return 0; | 1234 | return; |
1239 | 1235 | ||
1240 | printk(KERN_INFO "dma%d: restoring configuration\n", cp->number); | 1236 | printk(KERN_INFO "dma%d: restoring configuration\n", cp->number); |
1241 | 1237 | ||
@@ -1246,8 +1242,6 @@ static void s3c2410_dma_resume_chan(struct s3c2410_dma_chan *cp) | |||
1246 | 1242 | ||
1247 | if (cp->map != NULL) | 1243 | if (cp->map != NULL) |
1248 | dma_sel.select(cp, cp->map); | 1244 | dma_sel.select(cp, cp->map); |
1249 | |||
1250 | return 0; | ||
1251 | } | 1245 | } |
1252 | 1246 | ||
1253 | static void s3c2410_dma_resume(void) | 1247 | static void s3c2410_dma_resume(void) |
diff --git a/arch/arm/plat-s5p/s5p-time.c b/arch/arm/plat-s5p/s5p-time.c index 899a8cc011ff..612934c48b0d 100644 --- a/arch/arm/plat-s5p/s5p-time.c +++ b/arch/arm/plat-s5p/s5p-time.c | |||
@@ -370,11 +370,11 @@ static void __init s5p_clocksource_init(void) | |||
370 | 370 | ||
371 | clock_rate = clk_get_rate(tin_source); | 371 | clock_rate = clk_get_rate(tin_source); |
372 | 372 | ||
373 | init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate); | ||
374 | |||
375 | s5p_time_setup(timer_source.source_id, TCNT_MAX); | 373 | s5p_time_setup(timer_source.source_id, TCNT_MAX); |
376 | s5p_time_start(timer_source.source_id, PERIODIC); | 374 | s5p_time_start(timer_source.source_id, PERIODIC); |
377 | 375 | ||
376 | init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate); | ||
377 | |||
378 | if (clocksource_register_hz(&time_clocksource, clock_rate)) | 378 | if (clocksource_register_hz(&time_clocksource, clock_rate)) |
379 | panic("%s: can't register clocksource\n", time_clocksource.name); | 379 | panic("%s: can't register clocksource\n", time_clocksource.name); |
380 | } | 380 | } |
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index 4af108ff4112..e3b31c26ac3e 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h | |||
@@ -12,6 +12,10 @@ | |||
12 | * it under the terms of the GNU General Public License version 2 as | 12 | * it under the terms of the GNU General Public License version 2 as |
13 | * published by the Free Software Foundation. | 13 | * published by the Free Software Foundation. |
14 | */ | 14 | */ |
15 | |||
16 | #ifndef __PLAT_DEVS_H | ||
17 | #define __PLAT_DEVS_H __FILE__ | ||
18 | |||
15 | #include <linux/platform_device.h> | 19 | #include <linux/platform_device.h> |
16 | 20 | ||
17 | struct s3c24xx_uart_resources { | 21 | struct s3c24xx_uart_resources { |
@@ -159,3 +163,5 @@ extern struct platform_device s3c_device_ac97; | |||
159 | */ | 163 | */ |
160 | extern void *s3c_set_platdata(void *pd, size_t pdsize, | 164 | extern void *s3c_set_platdata(void *pd, size_t pdsize, |
161 | struct platform_device *pdev); | 165 | struct platform_device *pdev); |
166 | |||
167 | #endif /* __PLAT_DEVS_H */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h index c151c5f94a87..116edfe120b9 100644 --- a/arch/arm/plat-samsung/include/plat/regs-serial.h +++ b/arch/arm/plat-samsung/include/plat/regs-serial.h | |||
@@ -224,6 +224,8 @@ | |||
224 | #define S5PV210_UFSTAT_RXMASK (255<<0) | 224 | #define S5PV210_UFSTAT_RXMASK (255<<0) |
225 | #define S5PV210_UFSTAT_RXSHIFT (0) | 225 | #define S5PV210_UFSTAT_RXSHIFT (0) |
226 | 226 | ||
227 | #define NO_NEED_CHECK_CLKSRC 1 | ||
228 | |||
227 | #ifndef __ASSEMBLY__ | 229 | #ifndef __ASSEMBLY__ |
228 | 230 | ||
229 | /* struct s3c24xx_uart_clksrc | 231 | /* struct s3c24xx_uart_clksrc |
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h index 0ffe34a21554..4c16fa3621bb 100644 --- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h +++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h | |||
@@ -39,6 +39,7 @@ struct s3c64xx_spi_csinfo { | |||
39 | * @fifo_lvl_mask: All tx fifo_lvl fields start at offset-6 | 39 | * @fifo_lvl_mask: All tx fifo_lvl fields start at offset-6 |
40 | * @rx_lvl_offset: Depends on tx fifo_lvl field and bus number | 40 | * @rx_lvl_offset: Depends on tx fifo_lvl field and bus number |
41 | * @high_speed: If the controller supports HIGH_SPEED_EN bit | 41 | * @high_speed: If the controller supports HIGH_SPEED_EN bit |
42 | * @tx_st_done: Depends on tx fifo_lvl field | ||
42 | */ | 43 | */ |
43 | struct s3c64xx_spi_info { | 44 | struct s3c64xx_spi_info { |
44 | int src_clk_nr; | 45 | int src_clk_nr; |
@@ -53,6 +54,7 @@ struct s3c64xx_spi_info { | |||
53 | int fifo_lvl_mask; | 54 | int fifo_lvl_mask; |
54 | int rx_lvl_offset; | 55 | int rx_lvl_offset; |
55 | int high_speed; | 56 | int high_speed; |
57 | int tx_st_done; | ||
56 | }; | 58 | }; |
57 | 59 | ||
58 | /** | 60 | /** |