111 files changed, 1717 insertions, 1419 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c1f1a7eee953..ba0e23234ecf 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -723,6 +723,7 @@ config ARCH_S3C64XX
        bool "Samsung S3C64XX"
        select ARCH_HAS_CPUFREQ
        select ARCH_REQUIRE_GPIOLIB
+        select ARM_AMBA
        select ARM_VIC
        select CLKDEV_LOOKUP
        select CLKSRC_SAMSUNG_PWM
diff --git a/arch/arm/boot/dts/am335x-base0033.dts b/arch/arm/boot/dts/am335x-base0033.dts
index b4f95c2bbf74..72a9b3fc4251 100644
--- a/arch/arm/boot/dts/am335x-base0033.dts
+++ b/arch/arm/boot/dts/am335x-base0033.dts
@@ -13,4 +13,83 @@
 / {
        model = "IGEP COM AM335x on AQUILA Expansion";
        compatible = "isee,am335x-base0033", "isee,am335x-igep0033", "ti,am33xx";
+        hdmi {
+                compatible = "ti,tilcdc,slave";
+                i2c = <&i2c0>;
+                pinctrl-names = "default", "off";
+                pinctrl-0 = <&nxp_hdmi_pins>;
+                pinctrl-1 = <&nxp_hdmi_off_pins>;
+                status = "okay";
+        };
+        leds_base {
+                pinctrl-names = "default";
+                pinctrl-0 = <&leds_base_pins>;
+                compatible = "gpio-leds";
+                led@0 {
+                        label = "base:red:user";
+                        gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;   /* gpio1_21 */
+                        default-state = "off";
+                };
+                led@1 {
+                        label = "base:green:user";
+                        gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;    /* gpio2_0 */
+                        default-state = "off";
+                };
+        };
+};
+&am33xx_pinmux {
+        nxp_hdmi_pins: pinmux_nxp_hdmi_pins {
+                pinctrl-single,pins = <
+                        0x1b0 (PIN_OUTPUT | MUX_MODE3)  /* xdma_event_intr0.clkout1 */
+                        0xa0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data0 */
+                        0xa4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data1 */
+                        0xa8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data2 */
+                        0xac (PIN_OUTPUT | MUX_MODE0)   /* lcd_data3 */
+                        0xb0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data4 */
+                        0xb4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data5 */
+                        0xb8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data6 */
+                        0xbc (PIN_OUTPUT | MUX_MODE0)   /* lcd_data7 */
+                        0xc0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data8 */
+                        0xc4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data9 */
+                        0xc8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data10 */
+                        0xcc (PIN_OUTPUT | MUX_MODE0)   /* lcd_data11 */
+                        0xd0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data12 */
+                        0xd4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data13 */
+                        0xd8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data14 */
+                        0xdc (PIN_OUTPUT | MUX_MODE0)   /* lcd_data15 */
+                        0xe0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_vsync */
+                        0xe4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_hsync */
+                        0xe8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_pclk */
+                        0xec (PIN_OUTPUT | MUX_MODE0)   /* lcd_ac_bias_en */
+                >;
+        };
+        nxp_hdmi_off_pins: pinmux_nxp_hdmi_off_pins {
+                pinctrl-single,pins = <
+                        0x1b0 (PIN_OUTPUT | MUX_MODE3)  /* xdma_event_intr0.clkout1 */
+                >;
+        };
+        leds_base_pins: pinmux_leds_base_pins {
+                pinctrl-single,pins = <
+                        0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_a5.gpio1_21 */
+                        0x88 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_csn3.gpio2_0 */
+                >;
+        };
+};
+&lcdc {
+        status = "okay";
+};
+&i2c0 {
+        eeprom: eeprom@50 {
+                compatible = "at,24c256";
+                reg = <0x50>;
+        };
 };
diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi
index 619624479311..7063311a58d9 100644
--- a/arch/arm/boot/dts/am335x-igep0033.dtsi
+++ b/arch/arm/boot/dts/am335x-igep0033.dtsi
@@ -199,6 +199,35 @@
        pinctrl-0 = <&uart0_pins>;
 };
+&usb {
+        status = "okay";
+        control@44e10000 {
+                status = "okay";
+        };
+        usb-phy@47401300 {
+                status = "okay";
+        };
+        usb-phy@47401b00 {
+                status = "okay";
+        };
+        usb@47401000 {
+                status = "okay";
+        };
+        usb@47401800 {
+                status = "okay";
+                dr_mode = "host";
+        };
+        dma-controller@07402000  {
+                status = "okay";
+        };
+};
 #include "tps65910.dtsi"
 &tps {
diff --git a/arch/arm/boot/dts/am3517-evm.dts b/arch/arm/boot/dts/am3517-evm.dts
index e99dfaf70052..03fcbf0a88a8 100644
--- a/arch/arm/boot/dts/am3517-evm.dts
+++ b/arch/arm/boot/dts/am3517-evm.dts
@@ -7,11 +7,11 @@
 */
 /dts-v1/;
-#include "omap34xx.dtsi"
+#include "am3517.dtsi"
 / {
-        model = "TI AM3517 EVM (AM3517/05)";
+        model = "TI AM3517 EVM (AM3517/05 TMDSEVM3517)";
-        compatible = "ti,am3517-evm", "ti,omap3";
+        compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3";
        memory {
                device_type = "memory";
diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi
new file mode 100644
index 000000000000..2fbe02faa8b1
--- /dev/null
+++ b/arch/arm/boot/dts/am3517.dtsi
@@ -0,0 +1,63 @@
+/*
+ * Device Tree Source for am3517 SoC
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+#include "omap3.dtsi"
+/ {
+        aliases {
+                serial3 = &uart4;
+        };
+        ocp {
+                am35x_otg_hs: am35x_otg_hs@5c040000 {
+                        compatible = "ti,omap3-musb";
+                        ti,hwmods = "am35x_otg_hs";
+                        status = "disabled";
+                        reg = <0x5c040000 0x1000>;
+                        interrupts = <71>;
+                        interrupt-names = "mc";
+                };
+                davinci_emac: ethernet@0x5c000000 {
+                        compatible = "ti,am3517-emac";
+                        ti,hwmods = "davinci_emac";
+                        status = "disabled";
+                        reg = <0x5c000000 0x30000>;
+                        interrupts = <67 68 69 70>;
+                        ti,davinci-ctrl-reg-offset = <0x10000>;
+                        ti,davinci-ctrl-mod-reg-offset = <0>;
+                        ti,davinci-ctrl-ram-offset = <0x20000>;
+                        ti,davinci-ctrl-ram-size = <0x2000>;
+                        ti,davinci-rmii-en = /bits/ 8 <1>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                };
+                davinci_mdio: ethernet@0x5c030000 {
+                        compatible = "ti,davinci_mdio";
+                        ti,hwmods = "davinci_mdio";
+                        status = "disabled";
+                        reg = <0x5c030000 0x1000>;
+                        bus_freq = <1000000>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+                uart4: serial@4809e000 {
+                        compatible = "ti,omap3-uart";
+                        ti,hwmods = "uart4";
+                        status = "disabled";
+                        reg = <0x4809e000 0x400>;
+                        interrupts = <84>;
+                        dmas = <&sdma 55 &sdma 54>;
+                        dma-names = "tx", "rx";
+                        clock-frequency = <48000000>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index 90ce29dbe119..08a56bcfc724 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -99,22 +99,22 @@
                                        spi-max-frequency = <50000000>;
                                };
                        };
+                };
-                        pcie-controller {
+                pcie-controller {
+                        status = "okay";
+                        /*
+                         * The two PCIe units are accessible through
+                         * both standard PCIe slots and mini-PCIe
+                         * slots on the board.
+                         */
+                        pcie@1,0 {
+                                /* Port 0, Lane 0 */
+                                status = "okay";
+                        };
+                        pcie@2,0 {
+                                /* Port 1, Lane 0 */
                                status = "okay";
-                                /*
-                                 * The two PCIe units are accessible through
-                                 * both standard PCIe slots and mini-PCIe
-                                 * slots on the board.
-                                 */
-                                pcie@1,0 {
-                                        /* Port 0, Lane 0 */
-                                        status = "okay";
-                                };
-                                pcie@2,0 {
-                                        /* Port 1, Lane 0 */
-                                        status = "okay";
-                                };
                        };
                };
        };
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 00d6a798c705..7f10f627ae5b 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -118,7 +118,7 @@
                        coherency-fabric@20200 {
                                compatible = "marvell,coherency-fabric";
-                                reg = <0x20200 0xb0>, <0x21810 0x1c>;
+                                reg = <0x20200 0xb0>, <0x21010 0x1c>;
                        };
                        serial@12000 {
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index 3f5e6121c730..98335fb34b7a 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -47,7 +47,7 @@
                /*
                 * MV78230 has 2 PCIe units Gen2.0: One unit can be
                 * configured as x4 or quad x1 lanes. One unit is
-                 * x4/x1.
+                 * x1 only.
                 */
                pcie-controller {
                        compatible = "marvell,armada-xp-pcie";
@@ -62,10 +62,10 @@
                        ranges =
                               <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000   /* Port 0.0 registers */
-                                0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000   /* Port 2.0 registers */
                                0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000   /* Port 0.1 registers */
                                0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000   /* Port 0.2 registers */
                                0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000   /* Port 0.3 registers */
+                                0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000   /* Port 1.0 registers */
                                0x82000000 0x1 0       MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
                                0x81000000 0x1 0       MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO  */
                                0x82000000 0x2 0       MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */
@@ -74,8 +74,8 @@
                                0x81000000 0x3 0       MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO  */
                                0x82000000 0x4 0       MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */
                                0x81000000 0x4 0       MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO  */
-                                0x82000000 0x9 0       MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */
+                                0x82000000 0x5 0       MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
-                                0x81000000 0x9 0       MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO  */>;
+                                0x81000000 0x5 0       MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO  */>;
                        pcie@1,0 {
                                device_type = "pci";
@@ -145,20 +145,20 @@
                                status = "disabled";
                        };
-                        pcie@9,0 {
+                        pcie@5,0 {
                                device_type = "pci";
-                                assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
+                                assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
-                                reg = <0x4800 0 0 0 0>;
+                                reg = <0x2800 0 0 0 0>;
                                #address-cells = <3>;
                                #size-cells = <2>;
                                #interrupt-cells = <1>;
-                                ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
+                                ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
-                                          0x81000000 0 0 0x81000000 0x9 0 1 0>;
+                                          0x81000000 0 0 0x81000000 0x5 0 1 0>;
                                interrupt-map-mask = <0 0 0 0>;
-                                interrupt-map = <0 0 0 0 &mpic 99>;
+                                interrupt-map = <0 0 0 0 &mpic 62>;
-                                marvell,pcie-port = <2>;
+                                marvell,pcie-port = <1>;
                                marvell,pcie-lane = <0>;
-                                clocks = <&gateclk 26>;
+                                clocks = <&gateclk 9>;
                                status = "disabled";
                        };
                };
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index 3e9fd1353f89..66609684d41b 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -48,7 +48,7 @@
                /*
                 * MV78260 has 3 PCIe units Gen2.0: Two units can be
                 * configured as x4 or quad x1 lanes. One unit is
-                 * x4/x1.
+                 * x4 only.
                 */
                pcie-controller {
                        compatible = "marvell,armada-xp-pcie";
@@ -68,7 +68,9 @@
                                0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000   /* Port 0.2 registers */
                                0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000   /* Port 0.3 registers */
                                0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000   /* Port 1.0 registers */
-                                0x82000000 0 0x82000 MBUS_ID(0xf0, 0x01) 0x82000 0 0x00002000   /* Port 3.0 registers */
+                                0x82000000 0 0x84000 MBUS_ID(0xf0, 0x01) 0x84000 0 0x00002000   /* Port 1.1 registers */
+                                0x82000000 0 0x88000 MBUS_ID(0xf0, 0x01) 0x88000 0 0x00002000   /* Port 1.2 registers */
+                                0x82000000 0 0x8c000 MBUS_ID(0xf0, 0x01) 0x8c000 0 0x00002000   /* Port 1.3 registers */
                                0x82000000 0x1 0     MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
                                0x81000000 0x1 0     MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO  */
                                0x82000000 0x2 0     MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */
@@ -77,10 +79,18 @@
                                0x81000000 0x3 0     MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO  */
                                0x82000000 0x4 0     MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */
                                0x81000000 0x4 0     MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO  */
-                                0x82000000 0x9 0     MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
-                                0x81000000 0x9 0     MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO  */
+                                0x82000000 0x5 0     MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
-                                0x82000000 0xa 0     MBUS_ID(0x08, 0xf8) 0 1 0 /* Port 3.0 MEM */
+                                0x81000000 0x5 0     MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO  */
-                                0x81000000 0xa 0     MBUS_ID(0x08, 0xf0) 0 1 0 /* Port 3.0 IO  */>;
+                                0x82000000 0x6 0     MBUS_ID(0x08, 0xd8) 0 1 0 /* Port 1.1 MEM */
+                                0x81000000 0x6 0     MBUS_ID(0x08, 0xd0) 0 1 0 /* Port 1.1 IO  */
+                                0x82000000 0x7 0     MBUS_ID(0x08, 0xb8) 0 1 0 /* Port 1.2 MEM */
+                                0x81000000 0x7 0     MBUS_ID(0x08, 0xb0) 0 1 0 /* Port 1.2 IO  */
+                                0x82000000 0x8 0     MBUS_ID(0x08, 0x78) 0 1 0 /* Port 1.3 MEM */
+                                0x81000000 0x8 0     MBUS_ID(0x08, 0x70) 0 1 0 /* Port 1.3 IO  */
+                                0x82000000 0x9 0     MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */
+                                0x81000000 0x9 0     MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO  */>;
                        pcie@1,0 {
                                device_type = "pci";
@@ -106,8 +116,8 @@
                                #address-cells = <3>;
                                #size-cells = <2>;
                                #interrupt-cells = <1>;
-                                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
+                                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
-                                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
+                                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
                                interrupt-map-mask = <0 0 0 0>;
                                interrupt-map = <0 0 0 0 &mpic 59>;
                                marvell,pcie-port = <0>;
@@ -150,37 +160,88 @@
                                status = "disabled";
                        };
-                        pcie@9,0 {
+                        pcie@5,0 {
                                device_type = "pci";
-                                assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
+                                assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
-                                reg = <0x4800 0 0 0 0>;
+                                reg = <0x2800 0 0 0 0>;
                                #address-cells = <3>;
                                #size-cells = <2>;
                                #interrupt-cells = <1>;
-                                ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
+                                ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
-                                          0x81000000 0 0 0x81000000 0x9 0 1 0>;
+                                          0x81000000 0 0 0x81000000 0x5 0 1 0>;
                                interrupt-map-mask = <0 0 0 0>;
-                                interrupt-map = <0 0 0 0 &mpic 99>;
+                                interrupt-map = <0 0 0 0 &mpic 62>;
-                                marvell,pcie-port = <2>;
+                                marvell,pcie-port = <1>;
                                marvell,pcie-lane = <0>;
-                                clocks = <&gateclk 26>;
+                                clocks = <&gateclk 9>;
                                status = "disabled";
                        };
-                        pcie@10,0 {
+                        pcie@6,0 {
                                device_type = "pci";
-                                assigned-addresses = <0x82000800 0 0x82000 0 0x2000>;
+                                assigned-addresses = <0x82000800 0 0x84000 0 0x2000>;
-                                reg = <0x5000 0 0 0 0>;
+                                reg = <0x3000 0 0 0 0>;
                                #address-cells = <3>;
                                #size-cells = <2>;
                                #interrupt-cells = <1>;
-                                ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0
+                                ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0
-                                          0x81000000 0 0 0x81000000 0xa 0 1 0>;
+                                          0x81000000 0 0 0x81000000 0x6 0 1 0>;
                                interrupt-map-mask = <0 0 0 0>;
-                                interrupt-map = <0 0 0 0 &mpic 103>;
+                                interrupt-map = <0 0 0 0 &mpic 63>;
-                                marvell,pcie-port = <3>;
+                                marvell,pcie-port = <1>;
+                                marvell,pcie-lane = <1>;
+                                clocks = <&gateclk 10>;
+                                status = "disabled";
+                        };
+                        pcie@7,0 {
+                                device_type = "pci";
+                                assigned-addresses = <0x82000800 0 0x88000 0 0x2000>;
+                                reg = <0x3800 0 0 0 0>;
+                                #address-cells = <3>;
+                                #size-cells = <2>;
+                                #interrupt-cells = <1>;
+                                ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0
+                                          0x81000000 0 0 0x81000000 0x7 0 1 0>;
+                                interrupt-map-mask = <0 0 0 0>;
+                                interrupt-map = <0 0 0 0 &mpic 64>;
+                                marvell,pcie-port = <1>;
+                                marvell,pcie-lane = <2>;
+                                clocks = <&gateclk 11>;
+                                status = "disabled";
+                        };
+                        pcie@8,0 {
+                                device_type = "pci";
+                                assigned-addresses = <0x82000800 0 0x8c000 0 0x2000>;
+                                reg = <0x4000 0 0 0 0>;
+                                #address-cells = <3>;
+                                #size-cells = <2>;
+                                #interrupt-cells = <1>;
+                                ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0
+                                          0x81000000 0 0 0x81000000 0x8 0 1 0>;
+                                interrupt-map-mask = <0 0 0 0>;
+                                interrupt-map = <0 0 0 0 &mpic 65>;
+                                marvell,pcie-port = <1>;
+                                marvell,pcie-lane = <3>;
+                                clocks = <&gateclk 12>;
+                                status = "disabled";
+                        };
+                        pcie@9,0 {
+                                device_type = "pci";
+                                assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
+                                reg = <0x4800 0 0 0 0>;
+                                #address-cells = <3>;
+                                #size-cells = <2>;
+                                #interrupt-cells = <1>;
+                                ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
+                                          0x81000000 0 0 0x81000000 0x9 0 1 0>;
+                                interrupt-map-mask = <0 0 0 0>;
+                                interrupt-map = <0 0 0 0 &mpic 99>;
+                                marvell,pcie-port = <2>;
                                marvell,pcie-lane = <0>;
-                                clocks = <&gateclk 27>;
+                                clocks = <&gateclk 26>;
                                status = "disabled";
                        };
                };
diff --git a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
index 2347e9563cef..6801106fa1f8 100644
--- a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
@@ -11,6 +11,10 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 / {
+        aliases {
+                serial4 = &usart3;
+        };
        ahb {
                apb {
                        pinctrl@fffff400 {
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 1e12aeff403b..aa537ed13f0a 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -85,6 +85,8 @@
                        reg = <0x7e205000 0x1000>;
                        interrupts = <2 21>;
                        clocks = <&clk_i2c>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
                        status = "disabled";
                };
@@ -93,6 +95,8 @@
                        reg = <0x7e804000 0x1000>;
                        interrupts = <2 21>;
                        clocks = <&clk_i2c>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
                        status = "disabled";
                };
diff --git a/arch/arm/boot/dts/cros5250-common.dtsi b/arch/arm/boot/dts/cros5250-common.dtsi
index dc259e8b8a73..9b186ac06c8b 100644
--- a/arch/arm/boot/dts/cros5250-common.dtsi
+++ b/arch/arm/boot/dts/cros5250-common.dtsi
@@ -27,6 +27,13 @@
                i2c2_bus: i2c2-bus {
                        samsung,pin-pud = <0>;
                };
+                max77686_irq: max77686-irq {
+                        samsung,pins = "gpx3-2";
+                        samsung,pin-function = <0>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
        };
        i2c@12C60000 {
@@ -35,6 +42,11 @@
                max77686@09 {
                        compatible = "maxim,max77686";
+                        interrupt-parent = <&gpx3>;
+                        interrupts = <2 0>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&max77686_irq>;
+                        wakeup-source;
                        reg = <0x09>;
                        voltage-regulators {
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 59154dc15fe4..fb28b2ecb1db 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -161,7 +161,7 @@
                                        clocks = <&clks 197>, <&clks 3>,
                                                 <&clks 197>, <&clks 107>,
                                                 <&clks 0>,   <&clks 118>,
-                                                 <&clks 62>,  <&clks 139>,
+                                                 <&clks 0>,  <&clks 139>,
                                                 <&clks 0>;
                                        clock-names = "core",  "rxtx0",
                                                      "rxtx1", "rxtx2",
diff --git a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
index 9c18adf788f7..f577b7df9a29 100644
--- a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
+++ b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
@@ -44,8 +44,8 @@
                gpmc,wr-access-ns = <186>;
                gpmc,cycle2cycle-samecsen;
                gpmc,cycle2cycle-diffcsen;
-                vmmc-supply = <&vddvario>;
+                vddvario-supply = <&vddvario>;
-                vmmc_aux-supply = <&vdd33a>;
+                vdd33a-supply = <&vdd33a>;
                reg-io-width = <4>;
                smsc,save-mac-address;
        };
diff --git a/arch/arm/boot/dts/omap-zoom-common.dtsi b/arch/arm/boot/dts/omap-zoom-common.dtsi
index b0ee342598f0..68221fab978d 100644
--- a/arch/arm/boot/dts/omap-zoom-common.dtsi
+++ b/arch/arm/boot/dts/omap-zoom-common.dtsi
@@ -13,7 +13,7 @@
         * they probably share the same GPIO IRQ
         * REVISIT: Add timing support from slls644g.pdf
         */
-        8250@3,0 {
+        uart@3,0 {
                compatible = "ns16550a";
                reg = <3 0 0x100>;
                bank-width = <2>;
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index a2bfcde858a6..d0c5b37e248c 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -9,6 +9,7 @@
 */
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/omap.h>
 #include "skeleton.dtsi"
@@ -21,6 +22,8 @@
                serial0 = &uart1;
                serial1 = &uart2;
                serial2 = &uart3;
+                i2c0 = &i2c1;
+                i2c1 = &i2c2;
        };
        cpus {
@@ -53,6 +56,28 @@
                ranges;
                ti,hwmods = "l3_main";
+                aes: aes@480a6000 {
+                        compatible = "ti,omap2-aes";
+                        ti,hwmods = "aes";
+                        reg = <0x480a6000 0x50>;
+                        dmas = <&sdma 9 &sdma 10>;
+                        dma-names = "tx", "rx";
+                };
+                hdq1w: 1w@480b2000 {
+                        compatible = "ti,omap2420-1w";
+                        ti,hwmods = "hdq1w";
+                        reg = <0x480b2000 0x1000>;
+                        interrupts = <58>;
+                };
+                mailbox: mailbox@48094000 {
+                        compatible = "ti,omap2-mailbox";
+                        ti,hwmods = "mailbox";
+                        reg = <0x48094000 0x200>;
+                        interrupts = <26>;
+                };
                intc: interrupt-controller@1 {
                        compatible = "ti,omap2-intc";
                        interrupt-controller;
@@ -63,6 +88,7 @@
                sdma: dma-controller@48056000 {
                        compatible = "ti,omap2430-sdma", "ti,omap2420-sdma";
+                        ti,hwmods = "dma";
                        reg = <0x48056000 0x1000>;
                        interrupts = <12>,
                                     <13>,
@@ -73,21 +99,91 @@
                        #dma-requests = <64>;
                };
+                i2c1: i2c@48070000 {
+                        compatible = "ti,omap2-i2c";
+                        ti,hwmods = "i2c1";
+                        reg = <0x48070000 0x80>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        interrupts = <56>;
+                        dmas = <&sdma 27 &sdma 28>;
+                        dma-names = "tx", "rx";
+                };
+                i2c2: i2c@48072000 {
+                        compatible = "ti,omap2-i2c";
+                        ti,hwmods = "i2c2";
+                        reg = <0x48072000 0x80>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        interrupts = <57>;
+                        dmas = <&sdma 29 &sdma 30>;
+                        dma-names = "tx", "rx";
+                };
+                mcspi1: mcspi@48098000 {
+                        compatible = "ti,omap2-mcspi";
+                        ti,hwmods = "mcspi1";
+                        reg = <0x48098000 0x100>;
+                        interrupts = <65>;
+                        dmas = <&sdma 35 &sdma 36 &sdma 37 &sdma 38
+                                &sdma 39 &sdma 40 &sdma 41 &sdma 42>;
+                        dma-names = "tx0", "rx0", "tx1", "rx1",
+                                    "tx2", "rx2", "tx3", "rx3";
+                };
+                mcspi2: mcspi@4809a000 {
+                        compatible = "ti,omap2-mcspi";
+                        ti,hwmods = "mcspi2";
+                        reg = <0x4809a000 0x100>;
+                        interrupts = <66>;
+                        dmas = <&sdma 43 &sdma 44 &sdma 45 &sdma 46>;
+                        dma-names = "tx0", "rx0", "tx1", "rx1";
+                };
+                rng: rng@480a0000 {
+                        compatible = "ti,omap2-rng";
+                        ti,hwmods = "rng";
+                        reg = <0x480a0000 0x50>;
+                        interrupts = <36>;
+                };
+                sham: sham@480a4000 {
+                        compatible = "ti,omap2-sham";
+                        ti,hwmods = "sham";
+                        reg = <0x480a4000 0x64>;
+                        interrupts = <51>;
+                        dmas = <&sdma 13>;
+                        dma-names = "rx";
+                };
                uart1: serial@4806a000 {
                        compatible = "ti,omap2-uart";
                        ti,hwmods = "uart1";
+                        reg = <0x4806a000 0x2000>;
+                        interrupts = <72>;
+                        dmas = <&sdma 49 &sdma 50>;
+                        dma-names = "tx", "rx";
                        clock-frequency = <48000000>;
                };
                uart2: serial@4806c000 {
                        compatible = "ti,omap2-uart";
                        ti,hwmods = "uart2";
+                        reg = <0x4806c000 0x400>;
+                        interrupts = <73>;
+                        dmas = <&sdma 51 &sdma 52>;
+                        dma-names = "tx", "rx";
                        clock-frequency = <48000000>;
                };
                uart3: serial@4806e000 {
                        compatible = "ti,omap2-uart";
                        ti,hwmods = "uart3";
+                        reg = <0x4806e000 0x400>;
+                        interrupts = <74>;
+                        dmas = <&sdma 53 &sdma 54>;
+                        dma-names = "tx", "rx";
                        clock-frequency = <48000000>;
                };
diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi
index c8f9c55169ea..60c605de22dd 100644
--- a/arch/arm/boot/dts/omap2420.dtsi
+++ b/arch/arm/boot/dts/omap2420.dtsi
@@ -114,6 +114,15 @@
                        dma-names = "tx", "rx";
                };
+                msdi1: mmc@4809c000 {
+                        compatible = "ti,omap2420-mmc";
+                        ti,hwmods = "msdi1";
+                        reg = <0x4809c000 0x80>;
+                        interrupts = <83>;
+                        dmas = <&sdma 61 &sdma 62>;
+                        dma-names = "tx", "rx";
+                };
                timer1: timer@48028000 {
                        compatible = "ti,omap2420-timer";
                        reg = <0x48028000 0x400>;
@@ -121,5 +130,19 @@
                        ti,hwmods = "timer1";
                        ti,timer-alwon;
                };
+                wd_timer2: wdt@48022000 {
+                        compatible = "ti,omap2-wdt";
+                        ti,hwmods = "wd_timer2";
+                        reg = <0x48022000 0x80>;
+                };
        };
 };
+&i2c1 {
+        compatible = "ti,omap2420-i2c";
+};
+&i2c2 {
+        compatible = "ti,omap2420-i2c";
+};
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi
index c535a5a2b27f..d624345666f5 100644
--- a/arch/arm/boot/dts/omap2430.dtsi
+++ b/arch/arm/boot/dts/omap2430.dtsi
@@ -175,6 +175,25 @@
                        dma-names = "tx", "rx";
                };
+                mmc1: mmc@4809c000 {
+                        compatible = "ti,omap2-hsmmc";
+                        reg = <0x4809c000 0x200>;
+                        interrupts = <83>;
+                        ti,hwmods = "mmc1";
+                        ti,dual-volt;
+                        dmas = <&sdma 61>, <&sdma 62>;
+                        dma-names = "tx", "rx";
+                };
+                mmc2: mmc@480b4000 {
+                        compatible = "ti,omap2-hsmmc";
+                        reg = <0x480b4000 0x200>;
+                        interrupts = <86>;
+                        ti,hwmods = "mmc2";
+                        dmas = <&sdma 47>, <&sdma 48>;
+                        dma-names = "tx", "rx";
+                };
                timer1: timer@49018000 {
                        compatible = "ti,omap2420-timer";
                        reg = <0x49018000 0x400>;
@@ -182,5 +201,35 @@
                        ti,hwmods = "timer1";
                        ti,timer-alwon;
                };
+                mcspi3: mcspi@480b8000 {
+                        compatible = "ti,omap2-mcspi";
+                        ti,hwmods = "mcspi3";
+                        reg = <0x480b8000 0x100>;
+                        interrupts = <91>;
+                        dmas = <&sdma 15 &sdma 16 &sdma 23 &sdma 24>;
+                        dma-names = "tx0", "rx0", "tx1", "rx1";
+                };
+                usb_otg_hs: usb_otg_hs@480ac000 {
+                        compatible = "ti,omap2-musb";
+                        ti,hwmods = "usb_otg_hs";
+                        reg = <0x480ac000 0x1000>;
+                        interrupts = <93>;
+                };
+                wd_timer2: wdt@49016000 {
+                        compatible = "ti,omap2-wdt";
+                        ti,hwmods = "wd_timer2";
+                        reg = <0x49016000 0x80>;
+                };
        };
 };
+&i2c1 {
+        compatible = "ti,omap2430-i2c";
+};
+&i2c2 {
+        compatible = "ti,omap2430-i2c";
+};
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index 31a632f7effb..df33a50bc070 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -215,3 +215,10 @@
 &usbhsehci {
        phys = <0 &hsusb2_phy>;
 };
+&vaux2 {
+        regulator-name = "usb_1v8";
+        regulator-min-microvolt = <1800000>;
+        regulator-max-microvolt = <1800000>;
+        regulator-always-on;
+};
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index fa532aaacc68..3ba4a625ea5b 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -61,6 +61,14 @@
                vcc-supply = <&hsusb2_power>;
        };
+        sound {
+                compatible = "ti,omap-twl4030";
+                ti,model = "omap3beagle";
+                ti,mcbsp = <&mcbsp2>;
+                ti,codec = <&twl_audio>;
+        };
        gpio_keys {
                compatible = "gpio-keys";
@@ -120,6 +128,12 @@
                reg = <0x48>;
                interrupts = <7>; /* SYS_NIRQ cascaded to intc */
                interrupt-parent = <&intc>;
+                twl_audio: audio {
+                        compatible = "ti,twl4030-audio";
+                        codec {
+                        };
+                };
        };
 };
@@ -178,3 +192,10 @@
        mode = <3>;
        power = <50>;
 };
+&vaux2 {
+        regulator-name = "vdd_ehci";
+        regulator-min-microvolt = <1800000>;
+        regulator-max-microvolt = <1800000>;
+        regulator-always-on;
+};
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi
index ba1e58b7b7e3..165aaf7591ba 100644
--- a/arch/arm/boot/dts/omap3-igep.dtsi
+++ b/arch/arm/boot/dts/omap3-igep.dtsi
@@ -1,5 +1,5 @@
 /*
- * Device Tree Source for IGEP Technology devices
+ * Common device tree for IGEP boards based on AM/DM37x
 *
 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
@@ -10,7 +10,7 @@
 */
 /dts-v1/;
-#include "omap34xx.dtsi"
+#include "omap36xx.dtsi"
 / {
        memory {
@@ -24,6 +24,25 @@
                ti,mcbsp = <&mcbsp2>;
                ti,codec = <&twl_audio>;
        };
+        vdd33: regulator-vdd33 {
+                compatible = "regulator-fixed";
+                regulator-name = "vdd33";
+                regulator-always-on;
+        };
+        lbee1usjyc_vmmc: lbee1usjyc_vmmc {
+                pinctrl-names = "default";
+                pinctrl-0 = <&lbee1usjyc_pins>;
+                compatible = "regulator-fixed";
+                regulator-name = "regulator-lbee1usjyc";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>;    /* gpio_138 WIFI_PDN */
+                startup-delay-us = <10000>;
+                enable-active-high;
+                vin-supply = <&vdd33>;
+        };
 };
 &omap3_pmx_core {
@@ -48,6 +67,15 @@
                >;
        };
+        /* WiFi/BT combo */
+        lbee1usjyc_pins: pinmux_lbee1usjyc_pins {
+                pinctrl-single,pins = <
+                        0x136 (PIN_OUTPUT | MUX_MODE4)  /* sdmmc2_dat5.gpio_137 */
+                        0x138 (PIN_OUTPUT | MUX_MODE4)  /* sdmmc2_dat6.gpio_138 */
+                        0x13a (PIN_OUTPUT | MUX_MODE4)  /* sdmmc2_dat7.gpio_139 */
+                >;
+        };
        mcbsp2_pins: pinmux_mcbsp2_pins {
                pinctrl-single,pins = <
                        0x10c (PIN_INPUT | MUX_MODE0)           /* mcbsp2_fsx.mcbsp2_fsx */
@@ -65,10 +93,17 @@
                        0x11a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat1.sdmmc1_dat1 */
                        0x11c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat2.sdmmc1_dat2 */
                        0x11e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat3.sdmmc1_dat3 */
-                        0x120 (PIN_INPUT | MUX_MODE0)           /* sdmmc1_dat4.sdmmc1_dat4 */
+                >;
-                        0x122 (PIN_INPUT | MUX_MODE0)           /* sdmmc1_dat5.sdmmc1_dat5 */
+        };
-                        0x124 (PIN_INPUT | MUX_MODE0)           /* sdmmc1_dat6.sdmmc1_dat6 */
-                        0x126 (PIN_INPUT | MUX_MODE0)           /* sdmmc1_dat7.sdmmc1_dat7 */
+        mmc2_pins: pinmux_mmc2_pins {
+                pinctrl-single,pins = <
+                        0x128 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_clk.sdmmc2_clk */
+                        0x12a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_cmd.sdmmc2_cmd */
+                        0x12c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat0.sdmmc2_dat0 */
+                        0x12e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat1.sdmmc2_dat1 */
+                        0x130 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat2.sdmmc2_dat2 */
+                        0x132 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat3.sdmmc2_dat3 */
                >;
        };
@@ -78,10 +113,33 @@
                >;
        };
+        i2c1_pins: pinmux_i2c1_pins {
+                pinctrl-single,pins = <
+                        0x18a (PIN_INPUT | MUX_MODE0)   /* i2c1_scl.i2c1_scl */
+                        0x18c (PIN_INPUT | MUX_MODE0)   /* i2c1_sda.i2c1_sda */
+                >;
+        };
+        i2c2_pins: pinmux_i2c2_pins {
+                pinctrl-single,pins = <
+                        0x18e (PIN_INPUT | MUX_MODE0)   /* i2c2_scl.i2c2_scl */
+                        0x190 (PIN_INPUT | MUX_MODE0)   /* i2c2_sda.i2c2_sda */
+                >;
+        };
+        i2c3_pins: pinmux_i2c3_pins {
+                pinctrl-single,pins = <
+                        0x192 (PIN_INPUT | MUX_MODE0)   /* i2c3_scl.i2c3_scl */
+                        0x194 (PIN_INPUT | MUX_MODE0)   /* i2c3_sda.i2c3_sda */
+                >;
+        };
        leds_pins: pinmux_leds_pins { };
 };
 &i2c1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c1_pins>;
        clock-frequency = <2600000>;
        twl: twl@48 {
@@ -101,9 +159,16 @@
 #include "twl4030_omap3.dtsi"
 &i2c2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c2_pins>;
        clock-frequency = <400000>;
 };
+&i2c3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c3_pins>;
+};
 &mcbsp2 {
        pinctrl-names = "default";
        pinctrl-0 = <&mcbsp2_pins>;
@@ -114,11 +179,15 @@
      pinctrl-0 = <&mmc1_pins>;
      vmmc-supply = <&vmmc1>;
      vmmc_aux-supply = <&vsim>;
-      bus-width = <8>;
+      bus-width = <4>;
 };
 &mmc2 {
-        status = "disabled";
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc2_pins>;
+        vmmc-supply = <&lbee1usjyc_vmmc>;
+        bus-width = <4>;
+        non-removable;
 };
 &mmc3 {
diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts
index d5cc79267250..1c7e74d2d2bc 100644
--- a/arch/arm/boot/dts/omap3-igep0020.dts
+++ b/arch/arm/boot/dts/omap3-igep0020.dts
@@ -1,5 +1,5 @@
 /*
- * Device Tree Source for IGEPv2 board
+ * Device Tree Source for IGEPv2 Rev. (TI OMAP AM/DM37x)
 *
 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
@@ -13,7 +13,7 @@
 #include "omap-gpmc-smsc911x.dtsi"
 / {
-        model = "IGEPv2";
+        model = "IGEPv2 (TI OMAP AM/DM37x)";
        compatible = "isee,omap3-igep0020", "ti,omap3";
        leds {
@@ -67,6 +67,8 @@
        pinctrl-names = "default";
        pinctrl-0 = <
                &hsusbb1_pins
+                &tfp410_pins
+                &dss_pins
        >;
        hsusbb1_pins: pinmux_hsusbb1_pins {
@@ -85,6 +87,45 @@
                        0x5ba (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d7.hsusb1_data3 */
                >;
        };
+        tfp410_pins: tfp410_dvi_pins {
+                pinctrl-single,pins = <
+                        0x196 (PIN_OUTPUT | MUX_MODE4)   /* hdq_sio.gpio_170 */
+                >;
+        };
+        dss_pins: pinmux_dss_dvi_pins {
+                pinctrl-single,pins = <
+                        0x0a4 (PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
+                        0x0a6 (PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
+                        0x0a8 (PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
+                        0x0aa (PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */
+                        0x0ac (PIN_OUTPUT | MUX_MODE0)   /* dss_data0.dss_data0 */
+                        0x0ae (PIN_OUTPUT | MUX_MODE0)   /* dss_data1.dss_data1 */
+                        0x0b0 (PIN_OUTPUT | MUX_MODE0)   /* dss_data2.dss_data2 */
+                        0x0b2 (PIN_OUTPUT | MUX_MODE0)   /* dss_data3.dss_data3 */
+                        0x0b4 (PIN_OUTPUT | MUX_MODE0)   /* dss_data4.dss_data4 */
+                        0x0b6 (PIN_OUTPUT | MUX_MODE0)   /* dss_data5.dss_data5 */
+                        0x0b8 (PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
+                        0x0ba (PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
+                        0x0bc (PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
+                        0x0be (PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
+                        0x0c0 (PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
+                        0x0c2 (PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
+                        0x0c4 (PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
+                        0x0c6 (PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
+                        0x0c8 (PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
+                        0x0ca (PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
+                        0x0cc (PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
+                        0x0ce (PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */
+                        0x0d0 (PIN_OUTPUT | MUX_MODE0)   /* dss_data18.dss_data18 */
+                        0x0d2 (PIN_OUTPUT | MUX_MODE0)   /* dss_data19.dss_data19 */
+                        0x0d4 (PIN_OUTPUT | MUX_MODE0)   /* dss_data20.dss_data20 */
+                        0x0d6 (PIN_OUTPUT | MUX_MODE0)   /* dss_data21.dss_data21 */
+                        0x0d8 (PIN_OUTPUT | MUX_MODE0)   /* dss_data22.dss_data22 */
+                        0x0da (PIN_OUTPUT | MUX_MODE0)   /* dss_data23.dss_data23 */
+                >;
+        };
 };
 &leds_pins {
@@ -174,3 +215,8 @@
 &usbhsehci {
        phys = <&hsusb1_phy>;
 };
+&vpll2 {
+        /* Needed for DSS */
+        regulator-name = "vdds_dsi";
+};
diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts
index 525e6d9b0978..02a23f8a3384 100644
--- a/arch/arm/boot/dts/omap3-igep0030.dts
+++ b/arch/arm/boot/dts/omap3-igep0030.dts
@@ -1,5 +1,5 @@
 /*
- * Device Tree Source for IGEP COM Module
+ * Device Tree Source for IGEP COM MODULE (TI OMAP AM/DM37x)
 *
 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
@@ -12,7 +12,7 @@
 #include "omap3-igep.dtsi"
 / {
-        model = "IGEP COM Module";
+        model = "IGEP COM MODULE (TI OMAP AM/DM37x)";
        compatible = "isee,omap3-igep0030", "ti,omap3";
        leds {
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index c4f20bfe4cce..6fc85f963530 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -9,7 +9,7 @@
 /dts-v1/;
-#include "omap34xx.dtsi"
+#include "omap34xx-hs.dtsi"
 / {
        model = "Nokia N900";
@@ -125,6 +125,21 @@
                >;
        };
+        mmc2_pins: pinmux_mmc2_pins {
+                pinctrl-single,pins = <
+                        0x128 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_clk */
+                        0x12a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_cmd */
+                        0x12c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat0 */
+                        0x12e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat1 */
+                        0x130 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat2 */
+                        0x132 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat3 */
+                        0x134 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat4 */
+                        0x136 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat5 */
+                        0x138 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat6 */
+                        0x13a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat7 */
+                >;
+        };
        display_pins: pinmux_display_pins {
                pinctrl-single,pins = <
                        0x0d4 (PIN_OUTPUT | MUX_MODE4)          /* RX51_LCD_RESET_GPIO */
@@ -358,8 +373,14 @@
        cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */
 };
+/* most boards use vaux3, only some old versions use vmmc2 instead */
 &mmc2 {
-        status = "disabled";
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc2_pins>;
+        vmmc-supply = <&vaux3>;
+        vmmc_aux-supply = <&vsim>;
+        bus-width = <8>;
+        non-removable;
 };
 &mmc3 {
diff --git a/arch/arm/boot/dts/omap3-n950-n9.dtsi b/arch/arm/boot/dts/omap3-n950-n9.dtsi
index 94eb77d3b9dd..5c26c184f2c1 100644
--- a/arch/arm/boot/dts/omap3-n950-n9.dtsi
+++ b/arch/arm/boot/dts/omap3-n950-n9.dtsi
@@ -8,7 +8,7 @@
 * published by the Free Software Foundation.
 */
-#include "omap36xx.dtsi"
+#include "omap36xx-hs.dtsi"
 / {
        cpus {
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index f3a0c26ed0c2..daabf99d402a 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -82,6 +82,13 @@
                ranges;
                ti,hwmods = "l3_main";
+                aes: aes@480c5000 {
+                        compatible = "ti,omap3-aes";
+                        ti,hwmods = "aes";
+                        reg = <0x480c5000 0x50>;
+                        interrupts = <0>;
+                };
                counter32k: counter@48320000 {
                        compatible = "ti,omap-counter32k";
                        reg = <0x48320000 0x20>;
@@ -260,6 +267,13 @@
                        ti,hwmods = "i2c3";
                };
+                mailbox: mailbox@48094000 {
+                        compatible = "ti,omap3-mailbox";
+                        ti,hwmods = "mailbox";
+                        reg = <0x48094000 0x200>;
+                        interrupts = <26>;
+                };
                mcspi1: spi@48098000 {
                        compatible = "ti,omap2-mcspi";
                        reg = <0x48098000 0x100>;
@@ -357,6 +371,13 @@
                        dma-names = "tx", "rx";
                };
+                mmu_isp: mmu@480bd400 {
+                        compatible = "ti,omap3-mmu-isp";
+                        ti,hwmods = "mmu_isp";
+                        reg = <0x480bd400 0x80>;
+                        interrupts = <8>;
+                };
                wdt2: wdt@48314000 {
                        compatible = "ti,omap3-wdt";
                        reg = <0x48314000 0x80>;
@@ -442,6 +463,27 @@
                        dma-names = "tx", "rx";
                };
+                sham: sham@480c3000 {
+                        compatible = "ti,omap3-sham";
+                        ti,hwmods = "sham";
+                        reg = <0x480c3000 0x64>;
+                        interrupts = <49>;
+                };
+                smartreflex_core: smartreflex@480cb000 {
+                        compatible = "ti,omap3-smartreflex-core";
+                        ti,hwmods = "smartreflex_core";
+                        reg = <0x480cb000 0x400>;
+                        interrupts = <19>;
+                };
+                smartreflex_mpu_iva: smartreflex@480c9000 {
+                        compatible = "ti,omap3-smartreflex-iva";
+                        ti,hwmods = "smartreflex_mpu_iva";
+                        reg = <0x480c9000 0x400>;
+                        interrupts = <18>;
+                };
                timer1: timer@48318000 {
                        compatible = "ti,omap3430-timer";
                        reg = <0x48318000 0x400>;
diff --git a/arch/arm/boot/dts/omap34xx-hs.dtsi b/arch/arm/boot/dts/omap34xx-hs.dtsi
new file mode 100644
index 000000000000..1ff626489546
--- /dev/null
+++ b/arch/arm/boot/dts/omap34xx-hs.dtsi
@@ -0,0 +1,16 @@
+/* Disabled modules for secure omaps */
+#include "omap34xx.dtsi"
+/* Secure omaps have some devices inaccessible depending on the firmware */
+&aes {
+        status = "disabled";
+};
+&sham {
+        status = "disabled";
+};
+&timer12 {
+        status = "disabled";
+};
diff --git a/arch/arm/boot/dts/omap36xx-hs.dtsi b/arch/arm/boot/dts/omap36xx-hs.dtsi
new file mode 100644
index 000000000000..2c7febb0e016
--- /dev/null
+++ b/arch/arm/boot/dts/omap36xx-hs.dtsi
@@ -0,0 +1,16 @@
+/* Disabled modules for secure omaps */
+#include "omap36xx.dtsi"
+/* Secure omaps have some devices inaccessible depending on the firmware */
+&aes {
+        status = "disabled";
+};
+&sham {
+        status = "disabled";
+};
+&timer12 {
+        status = "disabled";
+};
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
index 298e85020e1b..88c6a05cab41 100644
--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
@@ -246,15 +246,6 @@
                        0xf0 (PIN_INPUT_PULLUP | MUX_MODE0)     /* i2c4_sda */
                >;
        };
-};
-&omap4_pmx_wkup {
-        led_wkgpio_pins: pinmux_leds_wkpins {
-                pinctrl-single,pins = <
-                        0x1a (PIN_OUTPUT | MUX_MODE3)   /* gpio_wk7 */
-                        0x1c (PIN_OUTPUT | MUX_MODE3)   /* gpio_wk8 */
-                >;
-        };
        /*
         * wl12xx GPIO outputs for WLAN_EN, BT_EN, FM_EN, BT_WAKEUP
@@ -274,7 +265,7 @@
                pinctrl-single,pins = <
                        0x38 (PIN_INPUT | MUX_MODE3)            /* gpmc_ncs2.gpio_52 */
                        0x3a (PIN_INPUT | MUX_MODE3)            /* gpmc_ncs3.gpio_53 */
-                        0x108 (PIN_OUTPUT | MUX_MODE0)          /* sdmmc5_clk.sdmmc5_clk */
+                        0x108 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_clk.sdmmc5_clk */
                        0x10a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_cmd.sdmmc5_cmd */
                        0x10c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat0.sdmmc5_dat0 */
                        0x10e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat1.sdmmc5_dat1 */
@@ -284,6 +275,15 @@
        };
 };
+&omap4_pmx_wkup {
+        led_wkgpio_pins: pinmux_leds_wkpins {
+                pinctrl-single,pins = <
+                        0x1a (PIN_OUTPUT | MUX_MODE3)   /* gpio_wk7 */
+                        0x1c (PIN_OUTPUT | MUX_MODE3)   /* gpio_wk8 */
+                >;
+        };
+};
 &i2c1 {
        pinctrl-names = "default";
        pinctrl-0 = <&i2c1_pins>;
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index 5fc3f43c5a81..dbc81fb6ef03 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -300,12 +300,12 @@
        wl12xx_pins: pinmux_wl12xx_pins {
                pinctrl-single,pins = <
                        0x3a (PIN_INPUT | MUX_MODE3)            /* gpmc_ncs3.gpio_53 */
-                        0x108 (PIN_OUTPUT | MUX_MODE3)          /* sdmmc5_clk.sdmmc5_clk */
+                        0x108 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_clk.sdmmc5_clk */
-                        0x10a (PIN_INPUT_PULLUP | MUX_MODE3)    /* sdmmc5_cmd.sdmmc5_cmd */
+                        0x10a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_cmd.sdmmc5_cmd */
-                        0x10c (PIN_INPUT_PULLUP | MUX_MODE3)    /* sdmmc5_dat0.sdmmc5_dat0 */
+                        0x10c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat0.sdmmc5_dat0 */
-                        0x10e (PIN_INPUT_PULLUP | MUX_MODE3)    /* sdmmc5_dat1.sdmmc5_dat1 */
+                        0x10e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat1.sdmmc5_dat1 */
-                        0x110 (PIN_INPUT_PULLUP | MUX_MODE3)    /* sdmmc5_dat2.sdmmc5_dat2 */
+                        0x110 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat2.sdmmc5_dat2 */
-                        0x112 (PIN_INPUT_PULLUP | MUX_MODE3)    /* sdmmc5_dat3.sdmmc5_dat3 */
+                        0x112 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat3.sdmmc5_dat3 */
                >;
        };
 };
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index ee845fad939b..9987dd0e9c59 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -87,9 +87,9 @@
                interrupts = <1 9 0xf04>;
        };
-        gpio0: gpio@ffc40000 {
+        gpio0: gpio@e6050000 {
                compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-                reg = <0 0xffc40000 0 0x2c>;
+                reg = <0 0xe6050000 0 0x50>;
                interrupt-parent = <&gic>;
                interrupts = <0 4 0x4>;
                #gpio-cells = <2>;
@@ -99,9 +99,9 @@
                interrupt-controller;
        };
-        gpio1: gpio@ffc41000 {
+        gpio1: gpio@e6051000 {
                compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-                reg = <0 0xffc41000 0 0x2c>;
+                reg = <0 0xe6051000 0 0x50>;
                interrupt-parent = <&gic>;
                interrupts = <0 5 0x4>;
                #gpio-cells = <2>;
@@ -111,9 +111,9 @@
                interrupt-controller;
        };
-        gpio2: gpio@ffc42000 {
+        gpio2: gpio@e6052000 {
                compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-                reg = <0 0xffc42000 0 0x2c>;
+                reg = <0 0xe6052000 0 0x50>;
                interrupt-parent = <&gic>;
                interrupts = <0 6 0x4>;
                #gpio-cells = <2>;
@@ -123,9 +123,9 @@
                interrupt-controller;
        };
-        gpio3: gpio@ffc43000 {
+        gpio3: gpio@e6053000 {
                compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-                reg = <0 0xffc43000 0 0x2c>;
+                reg = <0 0xe6053000 0 0x50>;
                interrupt-parent = <&gic>;
                interrupts = <0 7 0x4>;
                #gpio-cells = <2>;
@@ -135,9 +135,9 @@
                interrupt-controller;
        };
-        gpio4: gpio@ffc44000 {
+        gpio4: gpio@e6054000 {
                compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-                reg = <0 0xffc44000 0 0x2c>;
+                reg = <0 0xe6054000 0 0x50>;
                interrupt-parent = <&gic>;
                interrupts = <0 8 0x4>;
                #gpio-cells = <2>;
@@ -147,9 +147,9 @@
                interrupt-controller;
        };
-        gpio5: gpio@ffc45000 {
+        gpio5: gpio@e6055000 {
                compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-                reg = <0 0xffc45000 0 0x2c>;
+                reg = <0 0xe6055000 0 0x50>;
                interrupt-parent = <&gic>;
                interrupts = <0 9 0x4>;
                #gpio-cells = <2>;
@@ -241,7 +241,7 @@
        sdhi0: sdhi@ee100000 {
                compatible = "renesas,sdhi-r8a7790";
-                reg = <0 0xee100000 0 0x100>;
+                reg = <0 0xee100000 0 0x200>;
                interrupt-parent = <&gic>;
                interrupts = <0 165 4>;
                cap-sd-highspeed;
@@ -250,7 +250,7 @@
        sdhi1: sdhi@ee120000 {
                compatible = "renesas,sdhi-r8a7790";
-                reg = <0 0xee120000 0 0x100>;
+                reg = <0 0xee120000 0 0x200>;
                interrupt-parent = <&gic>;
                interrupts = <0 166 4>;
                cap-sd-highspeed;
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 6d09b8d42fdd..f936476c2753 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -245,14 +245,14 @@
                                        mpu_periph_clk: mpu_periph_clk {
                                                #clock-cells = <0>;
-                                                compatible = "altr,socfpga-gate-clk";
+                                                compatible = "altr,socfpga-perip-clk";
                                                clocks = <&mpuclk>;
                                                fixed-divider = <4>;
                                        };
                                        mpu_l2_ram_clk: mpu_l2_ram_clk {
                                                #clock-cells = <0>;
-                                                compatible = "altr,socfpga-gate-clk";
+                                                compatible = "altr,socfpga-perip-clk";
                                                clocks = <&mpuclk>;
                                                fixed-divider = <2>;
                                        };
@@ -266,8 +266,9 @@
                                        l3_main_clk: l3_main_clk {
                                                #clock-cells = <0>;
-                                                compatible = "altr,socfpga-gate-clk";
+                                                compatible = "altr,socfpga-perip-clk";
                                                clocks = <&mainclk>;
+                                                fixed-divider = <1>;
                                        };
                                        l3_mp_clk: l3_mp_clk {
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index c1751a64889a..7f5878c2784a 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -193,7 +193,10 @@
                pio: pinctrl@01c20800 {
                        compatible = "allwinner,sun6i-a31-pinctrl";
                        reg = <0x01c20800 0x400>;
-                        interrupts = <0 11 1>, <0 15 1>, <0 16 1>, <0 17 1>;
+                        interrupts = <0 11 4>,
+                                     <0 15 4>,
+                                     <0 16 4>,
+                                     <0 17 4>;
                        clocks = <&apb1_gates 5>;
                        gpio-controller;
                        interrupt-controller;
@@ -212,11 +215,11 @@
                timer@01c20c00 {
                        compatible = "allwinner,sun4i-timer";
                        reg = <0x01c20c00 0xa0>;
-                        interrupts = <0 18 1>,
+                        interrupts = <0 18 4>,
-                                     <0 19 1>,
+                                     <0 19 4>,
-                                     <0 20 1>,
+                                     <0 20 4>,
-                                     <0 21 1>,
+                                     <0 21 4>,
-                                     <0 22 1>;
+                                     <0 22 4>;
                        clocks = <&osc24M>;
                };
@@ -228,7 +231,7 @@
                uart0: serial@01c28000 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c28000 0x400>;
-                        interrupts = <0 0 1>;
+                        interrupts = <0 0 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb2_gates 16>;
@@ -238,7 +241,7 @@
                uart1: serial@01c28400 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c28400 0x400>;
-                        interrupts = <0 1 1>;
+                        interrupts = <0 1 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb2_gates 17>;
@@ -248,7 +251,7 @@
                uart2: serial@01c28800 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c28800 0x400>;
-                        interrupts = <0 2 1>;
+                        interrupts = <0 2 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb2_gates 18>;
@@ -258,7 +261,7 @@
                uart3: serial@01c28c00 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c28c00 0x400>;
-                        interrupts = <0 3 1>;
+                        interrupts = <0 3 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb2_gates 19>;
@@ -268,7 +271,7 @@
                uart4: serial@01c29000 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c29000 0x400>;
-                        interrupts = <0 4 1>;
+                        interrupts = <0 4 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb2_gates 20>;
@@ -278,7 +281,7 @@
                uart5: serial@01c29400 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c29400 0x400>;
-                        interrupts = <0 5 1>;
+                        interrupts = <0 5 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb2_gates 21>;
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index e46cfedde74c..367611a0730b 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -170,7 +170,7 @@
                emac: ethernet@01c0b000 {
                        compatible = "allwinner,sun4i-emac";
                        reg = <0x01c0b000 0x1000>;
-                        interrupts = <0 55 1>;
+                        interrupts = <0 55 4>;
                        clocks = <&ahb_gates 17>;
                        status = "disabled";
                };
@@ -186,7 +186,7 @@
                pio: pinctrl@01c20800 {
                        compatible = "allwinner,sun7i-a20-pinctrl";
                        reg = <0x01c20800 0x400>;
-                        interrupts = <0 28 1>;
+                        interrupts = <0 28 4>;
                        clocks = <&apb0_gates 5>;
                        gpio-controller;
                        interrupt-controller;
@@ -251,12 +251,12 @@
                timer@01c20c00 {
                        compatible = "allwinner,sun4i-timer";
                        reg = <0x01c20c00 0x90>;
-                        interrupts = <0 22 1>,
+                        interrupts = <0 22 4>,
-                                     <0 23 1>,
+                                     <0 23 4>,
-                                     <0 24 1>,
+                                     <0 24 4>,
-                                     <0 25 1>,
+                                     <0 25 4>,
-                                     <0 67 1>,
+                                     <0 67 4>,
-                                     <0 68 1>;
+                                     <0 68 4>;
                        clocks = <&osc24M>;
                };
@@ -273,7 +273,7 @@
                uart0: serial@01c28000 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c28000 0x400>;
-                        interrupts = <0 1 1>;
+                        interrupts = <0 1 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb1_gates 16>;
@@ -283,7 +283,7 @@
                uart1: serial@01c28400 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c28400 0x400>;
-                        interrupts = <0 2 1>;
+                        interrupts = <0 2 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb1_gates 17>;
@@ -293,7 +293,7 @@
                uart2: serial@01c28800 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c28800 0x400>;
-                        interrupts = <0 3 1>;
+                        interrupts = <0 3 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb1_gates 18>;
@@ -303,7 +303,7 @@
                uart3: serial@01c28c00 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c28c00 0x400>;
-                        interrupts = <0 4 1>;
+                        interrupts = <0 4 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb1_gates 19>;
@@ -313,7 +313,7 @@
                uart4: serial@01c29000 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c29000 0x400>;
-                        interrupts = <0 17 1>;
+                        interrupts = <0 17 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb1_gates 20>;
@@ -323,7 +323,7 @@
                uart5: serial@01c29400 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c29400 0x400>;
-                        interrupts = <0 18 1>;
+                        interrupts = <0 18 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb1_gates 21>;
@@ -333,7 +333,7 @@
                uart6: serial@01c29800 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c29800 0x400>;
-                        interrupts = <0 19 1>;
+                        interrupts = <0 19 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb1_gates 22>;
@@ -343,7 +343,7 @@
                uart7: serial@01c29c00 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c29c00 0x400>;
-                        interrupts = <0 20 1>;
+                        interrupts = <0 20 4>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        clocks = <&apb1_gates 23>;
@@ -353,7 +353,7 @@
                i2c0: i2c@01c2ac00 {
                        compatible = "allwinner,sun4i-i2c";
                        reg = <0x01c2ac00 0x400>;
-                        interrupts = <0 7 1>;
+                        interrupts = <0 7 4>;
                        clocks = <&apb1_gates 0>;
                        clock-frequency = <100000>;
                        status = "disabled";
@@ -362,7 +362,7 @@
                i2c1: i2c@01c2b000 {
                        compatible = "allwinner,sun4i-i2c";
                        reg = <0x01c2b000 0x400>;
-                        interrupts = <0 8 1>;
+                        interrupts = <0 8 4>;
                        clocks = <&apb1_gates 1>;
                        clock-frequency = <100000>;
                        status = "disabled";
@@ -371,7 +371,7 @@
                i2c2: i2c@01c2b400 {
                        compatible = "allwinner,sun4i-i2c";
                        reg = <0x01c2b400 0x400>;
-                        interrupts = <0 9 1>;
+                        interrupts = <0 9 4>;
                        clocks = <&apb1_gates 2>;
                        clock-frequency = <100000>;
                        status = "disabled";
@@ -380,7 +380,7 @@
                i2c3: i2c@01c2b800 {
                        compatible = "allwinner,sun4i-i2c";
                        reg = <0x01c2b800 0x400>;
-                        interrupts = <0 88 1>;
+                        interrupts = <0 88 4>;
                        clocks = <&apb1_gates 3>;
                        clock-frequency = <100000>;
                        status = "disabled";
@@ -389,7 +389,7 @@
                i2c4: i2c@01c2bc00 {
                        compatible = "allwinner,sun4i-i2c";
                        reg = <0x01c2bc00 0x400>;
-                        interrupts = <0 89 1>;
+                        interrupts = <0 89 4>;
                        clocks = <&apb1_gates 15>;
                        clock-frequency = <100000>;
                        status = "disabled";
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 4a5903e04827..c1df4e9db140 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -69,6 +69,7 @@ CONFIG_KS8851=y
 CONFIG_SMSC911X=y
 CONFIG_STMMAC_ETH=y
 CONFIG_MDIO_SUN4I=y
+CONFIG_TI_CPSW=y
 CONFIG_KEYBOARD_SPEAR=y
 CONFIG_SERIO_AMBAKMI=y
 CONFIG_SERIAL_8250=y
@@ -133,12 +134,14 @@ CONFIG_USB_GPIO_VBUS=y
 CONFIG_USB_ISP1301=y
 CONFIG_USB_MXS_PHY=y
 CONFIG_MMC=y
+CONFIG_MMC_BLOCK_MINORS=16
 CONFIG_MMC_ARMMMCI=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_PLTFM=y
 CONFIG_MMC_SDHCI_ESDHC_IMX=y
 CONFIG_MMC_SDHCI_TEGRA=y
 CONFIG_MMC_SDHCI_SPEAR=y
+CONFIG_MMC_SDHCI_BCM_KONA=y
 CONFIG_MMC_OMAP=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_EDAC=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 98a50c309b90..bfa80a11e8c7 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -173,6 +173,7 @@ CONFIG_MFD_PALMAS=y
 CONFIG_MFD_TPS65217=y
 CONFIG_MFD_TPS65910=y
 CONFIG_TWL6040_CORE=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_REGULATOR_PALMAS=y
 CONFIG_REGULATOR_TPS65023=y
 CONFIG_REGULATOR_TPS6507X=y
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index d57a85badb5e..3e2259b60236 100644
--- a/arch/arm/configs/sunxi_defconfig
+++ b/arch/arm/configs/sunxi_defconfig
@@ -12,6 +12,9 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
 # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
 # CONFIG_INET_XFRM_MODE_TUNNEL is not set
 # CONFIG_INET_XFRM_MODE_BEET is not set
@@ -58,4 +61,8 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
 CONFIG_COMMON_CLK_DEBUG=y
 # CONFIG_IOMMU_SUPPORT is not set
+CONFIG_TMPFS=y
+CONFIG_NFS_FS=y
+CONFIG_ROOT_NFS=y
 CONFIG_NLS=y
+CONFIG_PRINTK_TIME=y
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index ac632cc38f24..c6ebc184bf68 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMDLINE="root=/dev/ram0 console=ttyAMA2,115200n8"
 CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
 CONFIG_CPU_IDLE=y
+CONFIG_ARM_U8500_CPUIDLE=y
 CONFIG_VFP=y
 CONFIG_NEON=y
 CONFIG_PM_RUNTIME=y
@@ -109,6 +110,8 @@ CONFIG_EXT2_FS_SECURITY=y
 CONFIG_EXT3_FS=y
 CONFIG_EXT4_FS=y
 CONFIG_VFAT_FS=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
 # CONFIG_MISC_FILESYSTEMS is not set
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 9ecccc865046..6976b03e5213 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -100,23 +100,19 @@
 #define TASK_UNMAPPED_BASE      UL(0x00000000)
 #endif
-#ifndef PHYS_OFFSET
-#define PHYS_OFFSET             UL(CONFIG_DRAM_BASE)
-#endif
 #ifndef END_MEM
 #define END_MEM                 (UL(CONFIG_DRAM_BASE) + CONFIG_DRAM_SIZE)
 #endif
 #ifndef PAGE_OFFSET
-#define PAGE_OFFSET             (PHYS_OFFSET)
+#define PAGE_OFFSET             PLAT_PHYS_OFFSET
 #endif
 /*
 * The module can be at any place in ram in nommu mode.
 */
 #define MODULES_END             (END_MEM)
-#define MODULES_VADDR           (PHYS_OFFSET)
+#define MODULES_VADDR           PAGE_OFFSET
 #define XIP_VIRT_ADDR(physaddr)  (physaddr)
@@ -157,6 +153,16 @@
 #endif
 #define ARCH_PGD_MASK           ((1 << ARCH_PGD_SHIFT) - 1)
+/*
+ * PLAT_PHYS_OFFSET is the offset (from zero) of the start of physical
+ * memory.  This is used for XIP and NoMMU kernels, or by kernels which
+ * have their own mach/memory.h.  Assembly code must always use
+ * PLAT_PHYS_OFFSET and not PHYS_OFFSET.
+ */
+#ifndef PLAT_PHYS_OFFSET
+#define PLAT_PHYS_OFFSET        UL(CONFIG_PHYS_OFFSET)
+#endif
 #ifndef __ASSEMBLY__
 /*
@@ -239,6 +245,8 @@ static inline unsigned long __phys_to_virt(phys_addr_t x)
 #else
+#define PHYS_OFFSET     PLAT_PHYS_OFFSET
 static inline phys_addr_t __virt_to_phys(unsigned long x)
 {
        return (phys_addr_t)x - PAGE_OFFSET + PHYS_OFFSET;
@@ -251,17 +259,6 @@ static inline unsigned long __phys_to_virt(phys_addr_t x)
 #endif
 #endif
-#endif /* __ASSEMBLY__ */
-#ifndef PHYS_OFFSET
-#ifdef PLAT_PHYS_OFFSET
-#define PHYS_OFFSET     PLAT_PHYS_OFFSET
-#else
-#define PHYS_OFFSET     UL(CONFIG_PHYS_OFFSET)
-#endif
-#endif
-#ifndef __ASSEMBLY__
 /*
 * PFNs are used to describe any physical page; this means
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index be956dbf6bae..1571d126e9dd 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -61,7 +61,7 @@ extern void __pgd_error(const char *file, int line, pgd_t);
 * mapping to be mapped at.  This is particularly important for
 * non-high vector CPUs.
 */
-#define FIRST_USER_ADDRESS      PAGE_SIZE
+#define FIRST_USER_ADDRESS      (PAGE_SIZE * 2)
 /*
 * Use TASK_SIZE as the ceiling argument for free_pgtables() and
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index 14235ba64a90..716249cc2ee1 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -68,7 +68,7 @@ ENTRY(stext)
 #ifdef CONFIG_ARM_MPU
        /* Calculate the size of a region covering just the kernel */
-        ldr     r5, =PHYS_OFFSET                @ Region start: PHYS_OFFSET
+        ldr     r5, =PLAT_PHYS_OFFSET           @ Region start: PHYS_OFFSET
        ldr     r6, =(_end)                     @ Cover whole kernel
        sub     r6, r6, r5                      @ Minimum size of region to map
        clz     r6, r6                          @ Region size must be 2^N...
@@ -213,7 +213,7 @@ ENTRY(__setup_mpu)
        set_region_nr r0, #MPU_RAM_REGION
        isb
        /* Full access from PL0, PL1, shared for CONFIG_SMP, cacheable */
-        ldr     r0, =PHYS_OFFSET                @ RAM starts at PHYS_OFFSET
+        ldr     r0, =PLAT_PHYS_OFFSET           @ RAM starts at PHYS_OFFSET
        ldr     r5,=(MPU_AP_PL1RW_PL0RW | MPU_RGN_NORMAL)
        setup_region r0, r5, r6, MPU_DATA_SIDE  @ PHYS_OFFSET, shared, enabled
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 11d59b32fb8d..32f317e5828a 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -110,7 +110,7 @@ ENTRY(stext)
        sub     r4, r3, r4                      @ (PHYS_OFFSET - PAGE_OFFSET)
        add     r8, r8, r4                      @ PHYS_OFFSET
 #else
-        ldr     r8, =PHYS_OFFSET                @ always constant in this case
+        ldr     r8, =PLAT_PHYS_OFFSET           @ always constant in this case
 #endif
        /*
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index 57221e349a7c..f0d180d8b29f 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -14,11 +14,12 @@
 #include <asm/pgalloc.h>
 #include <asm/mmu_context.h>
 #include <asm/cacheflush.h>
+#include <asm/fncpy.h>
 #include <asm/mach-types.h>
 #include <asm/smp_plat.h>
 #include <asm/system_misc.h>
-extern const unsigned char relocate_new_kernel[];
+extern void relocate_new_kernel(void);
 extern const unsigned int relocate_new_kernel_size;
 extern unsigned long kexec_start_address;
@@ -142,6 +143,8 @@ void machine_kexec(struct kimage *image)
 {
        unsigned long page_list;
        unsigned long reboot_code_buffer_phys;
+        unsigned long reboot_entry = (unsigned long)relocate_new_kernel;
+        unsigned long reboot_entry_phys;
        void *reboot_code_buffer;
        /*
@@ -168,16 +171,16 @@ void machine_kexec(struct kimage *image)
        /* copy our kernel relocation code to the control code page */
-        memcpy(reboot_code_buffer,
+        reboot_entry = fncpy(reboot_code_buffer,
-               relocate_new_kernel, relocate_new_kernel_size);
+                             reboot_entry,
+                             relocate_new_kernel_size);
+        reboot_entry_phys = (unsigned long)reboot_entry +
+                (reboot_code_buffer_phys - (unsigned long)reboot_code_buffer);
-        flush_icache_range((unsigned long) reboot_code_buffer,
-                           (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
        printk(KERN_INFO "Bye!\n");
        if (kexec_reinit)
                kexec_reinit();
-        soft_restart(reboot_code_buffer_phys);
+        soft_restart(reboot_entry_phys);
 }
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 94f6b05f9e24..92f7b15dd221 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -404,6 +404,7 @@ EXPORT_SYMBOL(dump_fpu);
 unsigned long get_wchan(struct task_struct *p)
 {
        struct stackframe frame;
+        unsigned long stack_page;
        int count = 0;
        if (!p || p == current || p->state == TASK_RUNNING)
                return 0;
@@ -412,9 +413,11 @@ unsigned long get_wchan(struct task_struct *p)
        frame.sp = thread_saved_sp(p);
        frame.lr = 0;                   /* recovered from the stack */
        frame.pc = thread_saved_pc(p);
+        stack_page = (unsigned long)task_stack_page(p);
        do {
-                int ret = unwind_frame(&frame);
+                if (frame.sp < stack_page ||
-                if (ret < 0)
+                    frame.sp >= stack_page + THREAD_SIZE ||
+                    unwind_frame(&frame) < 0)
                        return 0;
                if (!in_sched_functions(frame.pc))
                        return frame.pc;
diff --git a/arch/arm/kernel/relocate_kernel.S b/arch/arm/kernel/relocate_kernel.S
index d0cdedf4864d..95858966d84e 100644
--- a/arch/arm/kernel/relocate_kernel.S
+++ b/arch/arm/kernel/relocate_kernel.S
@@ -2,10 +2,12 @@
 * relocate_kernel.S - put the kernel image in place to boot
 */
+#include <linux/linkage.h>
 #include <asm/kexec.h>
-        .globl relocate_new_kernel
+        .align  3       /* not needed for this code, but keeps fncpy() happy */
-relocate_new_kernel:
+ENTRY(relocate_new_kernel)
        ldr     r0,kexec_indirection_page
        ldr     r1,kexec_start_address
@@ -79,6 +81,8 @@ kexec_mach_type:
 kexec_boot_atags:
        .long   0x0
+ENDPROC(relocate_new_kernel)
 relocate_new_kernel_end:
        .globl relocate_new_kernel_size
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 6a1b8a81b1ae..987a7f5bce5f 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -873,8 +873,6 @@ void __init setup_arch(char **cmdline_p)
        machine_desc = mdesc;
        machine_name = mdesc->name;
-        setup_dma_zone(mdesc);
        if (mdesc->reboot_mode != REBOOT_HARD)
                reboot_mode = mdesc->reboot_mode;
@@ -892,6 +890,7 @@ void __init setup_arch(char **cmdline_p)
        sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL);
        early_paging_init(mdesc, lookup_processor_type(read_cpuid_id()));
+        setup_dma_zone(mdesc);
        sanity_check_meminfo();
        arm_memblock_init(&meminfo, mdesc);
diff --git a/arch/arm/kernel/sigreturn_codes.S b/arch/arm/kernel/sigreturn_codes.S
index 3c5d0f2170fd..b84d0cb13682 100644
--- a/arch/arm/kernel/sigreturn_codes.S
+++ b/arch/arm/kernel/sigreturn_codes.S
@@ -30,6 +30,27 @@
 * snippets.
 */
+/*
+ * In CPU_THUMBONLY case kernel arm opcodes are not allowed.
+ * Note in this case codes skips those instructions but it uses .org
+ * directive to keep correct layout of sigreturn_codes array.
+ */
+#ifndef CONFIG_CPU_THUMBONLY
+#define ARM_OK(code...) code
+#else
+#define ARM_OK(code...)
+#endif
+        .macro arm_slot n
+        .org    sigreturn_codes + 12 * (\n)
+ARM_OK( .arm    )
+        .endm
+        .macro thumb_slot n
+        .org    sigreturn_codes + 12 * (\n) + 8
+        .thumb
+        .endm
 #if __LINUX_ARM_ARCH__ <= 4
        /*
         * Note we manually set minimally required arch that supports
@@ -45,26 +66,27 @@
        .global sigreturn_codes
        .type   sigreturn_codes, #object
-        .arm
+        .align
 sigreturn_codes:
        /* ARM sigreturn syscall code snippet */
-        mov     r7, #(__NR_sigreturn - __NR_SYSCALL_BASE)
+        arm_slot 0
-        swi     #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)
+ARM_OK( mov     r7, #(__NR_sigreturn - __NR_SYSCALL_BASE)       )
+ARM_OK( swi     #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)      )
        /* Thumb sigreturn syscall code snippet */
-        .thumb
+        thumb_slot 0
        movs    r7, #(__NR_sigreturn - __NR_SYSCALL_BASE)
        swi     #0
        /* ARM sigreturn_rt syscall code snippet */
-        .arm
+        arm_slot 1
-        mov     r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE)
+ARM_OK( mov     r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE)    )
-        swi     #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)
+ARM_OK( swi     #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)   )
        /* Thumb sigreturn_rt syscall code snippet */
-        .thumb
+        thumb_slot 1
        movs    r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE)
        swi     #0
@@ -74,7 +96,7 @@ sigreturn_codes:
         * it is thumb case or not, so we need additional
         * word after real last entry.
         */
-        .arm
+        arm_slot 2
        .space  4
        .size   sigreturn_codes, . - sigreturn_codes
diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c
index 00f79e59985b..af4e8c8a5422 100644
--- a/arch/arm/kernel/stacktrace.c
+++ b/arch/arm/kernel/stacktrace.c
@@ -31,7 +31,7 @@ int notrace unwind_frame(struct stackframe *frame)
        high = ALIGN(low, THREAD_SIZE);
        /* check current frame pointer is within bounds */
-        if (fp < (low + 12) || fp + 4 >= high)
+        if (fp < low + 12 || fp > high - 4)
                return -EINVAL;
        /* restore the registers from the stack frame */
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index dbf0923e8d76..7940241f0576 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -509,9 +509,10 @@ static inline int
 __do_cache_op(unsigned long start, unsigned long end)
 {
        int ret;
-        unsigned long chunk = PAGE_SIZE;
        do {
+                unsigned long chunk = min(PAGE_SIZE, end - start);
                if (signal_pending(current)) {
                        struct thread_info *ti = current_thread_info();
diff --git a/arch/arm/lib/delay-loop.S b/arch/arm/lib/delay-loop.S
index 36b668d8e121..bc1033b897b4 100644
--- a/arch/arm/lib/delay-loop.S
+++ b/arch/arm/lib/delay-loop.S
@@ -40,6 +40,7 @@ ENTRY(__loop_const_udelay)			@ 0 <= r0 <= 0x7fffff06
 /*
 * loops = r0 * HZ * loops_per_jiffy / 1000000
 */
+                .align 3
 @ Delay routine
 ENTRY(__loop_delay)
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index f607deb40f4d..bc7b363a3083 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -174,7 +174,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
 static struct clock_event_device clkevt = {
        .name           = "at91_tick",
        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-        .shift          = 32,
        .rating         = 150,
        .set_next_event = clkevt32k_next_event,
        .set_mode       = clkevt32k_mode,
@@ -265,11 +264,9 @@ void __init at91rm9200_timer_init(void)
        at91_st_write(AT91_ST_RTMR, 1);
        /* Setup timer clockevent, with minimum of two ticks (important!!) */
-        clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
-        clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
-        clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
        clkevt.cpumask = cpumask_of(0);
-        clockevents_register_device(&clkevt);
+        clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK,
+                                        2, AT91_ST_ALMV);
        /* register clocksource */
        clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index 3ed190ce062b..c5101dcb4fb0 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -16,7 +16,11 @@
 #include <mach/at91_ramc.h>
 #include <mach/at91rm9200_sdramc.h>
+#ifdef CONFIG_PM
 extern void at91_pm_set_standby(void (*at91_standby)(void));
+#else
+static inline void at91_pm_set_standby(void (*at91_standby)(void)) { }
+#endif
 /*
 * The AT91RM9200 goes into self-refresh mode with this command, and will
diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
index 3ea86428ee09..a28873fe3049 100644
--- a/arch/arm/mach-at91/sama5d3.c
+++ b/arch/arm/mach-at91/sama5d3.c
@@ -95,19 +95,19 @@ static struct clk twi0_clk = {
        .name           = "twi0_clk",
        .pid            = SAMA5D3_ID_TWI0,
        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
+        .div            = AT91_PMC_PCR_DIV8,
 };
 static struct clk twi1_clk = {
        .name           = "twi1_clk",
        .pid            = SAMA5D3_ID_TWI1,
        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
+        .div            = AT91_PMC_PCR_DIV8,
 };
 static struct clk twi2_clk = {
        .name           = "twi2_clk",
        .pid            = SAMA5D3_ID_TWI2,
        .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
+        .div            = AT91_PMC_PCR_DIV8,
 };
 static struct clk mmc0_clk = {
        .name           = "mci0_clk",
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index c46eccbbd512..78829c513fdc 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -487,7 +487,7 @@ int __init da8xx_register_emac(void)
 static struct resource da830_mcasp1_resources[] = {
        {
-                .name   = "mcasp1",
+                .name   = "mpu",
                .start  = DAVINCI_DA830_MCASP1_REG_BASE,
                .end    = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1,
                .flags  = IORESOURCE_MEM,
@@ -515,7 +515,7 @@ static struct platform_device da830_mcasp1_device = {
 static struct resource da850_mcasp_resources[] = {
        {
-                .name   = "mcasp",
+                .name   = "mpu",
                .start  = DAVINCI_DA8XX_MCASP0_REG_BASE,
                .end    = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1,
                .flags  = IORESOURCE_MEM,
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index ef9ff1fb6f52..6117fc644188 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -641,6 +641,7 @@ static struct platform_device dm355_edma_device = {
 static struct resource dm355_asp1_resources[] = {
        {
+                .name   = "mpu",
                .start  = DAVINCI_ASP1_BASE,
                .end    = DAVINCI_ASP1_BASE + SZ_8K - 1,
                .flags  = IORESOURCE_MEM,
@@ -906,7 +907,7 @@ static struct davinci_gpio_platform_data dm355_gpio_platform_data = {
 int __init dm355_gpio_register(void)
 {
        return davinci_gpio_register(dm355_gpio_resources,
-                                     sizeof(dm355_gpio_resources),
+                                     ARRAY_SIZE(dm355_gpio_resources),
                                     &dm355_gpio_platform_data);
 }
 /*----------------------------------------------------------------------*/
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 1511a0680f9a..d7c6f85d3fc9 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -720,7 +720,7 @@ static struct davinci_gpio_platform_data dm365_gpio_platform_data = {
 int __init dm365_gpio_register(void)
 {
        return davinci_gpio_register(dm365_gpio_resources,
-                                     sizeof(dm365_gpio_resources),
+                                     ARRAY_SIZE(dm365_gpio_resources),
                                     &dm365_gpio_platform_data);
 }
@@ -942,6 +942,7 @@ static struct platform_device dm365_edma_device = {
 static struct resource dm365_asp_resources[] = {
        {
+                .name   = "mpu",
                .start  = DAVINCI_DM365_ASP0_BASE,
                .end    = DAVINCI_DM365_ASP0_BASE + SZ_8K - 1,
                .flags  = IORESOURCE_MEM,
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 143a3217e8ef..3ce47997bb46 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -572,6 +572,7 @@ static struct platform_device dm644x_edma_device = {
 /* DM6446 EVM uses ASP0; line-out is a pair of RCA jacks */
 static struct resource dm644x_asp_resources[] = {
        {
+                .name   = "mpu",
                .start  = DAVINCI_ASP0_BASE,
                .end    = DAVINCI_ASP0_BASE + SZ_8K - 1,
                .flags  = IORESOURCE_MEM,
@@ -792,7 +793,7 @@ static struct davinci_gpio_platform_data dm644_gpio_platform_data = {
 int __init dm644x_gpio_register(void)
 {
        return davinci_gpio_register(dm644_gpio_resources,
-                                     sizeof(dm644_gpio_resources),
+                                     ARRAY_SIZE(dm644_gpio_resources),
                                     &dm644_gpio_platform_data);
 }
 /*----------------------------------------------------------------------*/
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 2a73f299c1d0..0e81fea65e7f 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -621,7 +621,7 @@ static struct platform_device dm646x_edma_device = {
 static struct resource dm646x_mcasp0_resources[] = {
        {
-                .name   = "mcasp0",
+                .name   = "mpu",
                .start  = DAVINCI_DM646X_MCASP0_REG_BASE,
                .end    = DAVINCI_DM646X_MCASP0_REG_BASE + (SZ_1K << 1) - 1,
                .flags  = IORESOURCE_MEM,
@@ -641,7 +641,7 @@ static struct resource dm646x_mcasp0_resources[] = {
 static struct resource dm646x_mcasp1_resources[] = {
        {
-                .name   = "mcasp1",
+                .name   = "mpu",
                .start  = DAVINCI_DM646X_MCASP1_REG_BASE,
                .end    = DAVINCI_DM646X_MCASP1_REG_BASE + (SZ_1K << 1) - 1,
                .flags  = IORESOURCE_MEM,
@@ -769,7 +769,7 @@ static struct davinci_gpio_platform_data dm646x_gpio_platform_data = {
 int __init dm646x_gpio_register(void)
 {
        return davinci_gpio_register(dm646x_gpio_resources,
-                                     sizeof(dm646x_gpio_resources),
+                                     ARRAY_SIZE(dm646x_gpio_resources),
                                     &dm646x_gpio_platform_data);
 }
 /*----------------------------------------------------------------------*/
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index 2739ca2c1334..e0091685fd48 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -15,6 +15,7 @@
 #include <linux/init.h>
 #include <linux/io.h>
 #include <linux/spinlock.h>
+#include <video/vga.h>
 #include <asm/pgtable.h>
 #include <asm/page.h>
@@ -196,6 +197,8 @@ void __init footbridge_map_io(void)
                iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
                pci_map_io_early(__phys_to_pfn(DC21285_PCI_IO));
        }
+        vga_base = PCIMEM_BASE;
 }
 void footbridge_restart(enum reboot_mode mode, const char *cmd)
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index 3490a24f969e..7c2fdae9a38b 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -18,7 +18,6 @@
 #include <linux/irq.h>
 #include <linux/io.h>
 #include <linux/spinlock.h>
-#include <video/vga.h>
 #include <asm/irq.h>
 #include <asm/mach/pci.h>
@@ -291,7 +290,6 @@ void __init dc21285_preinit(void)
        int cfn_mode;
        pcibios_min_mem = 0x81000000;
-        vga_base = PCIMEM_BASE;
        mem_size = (unsigned int)high_memory - PAGE_OFFSET;
        for (mem_mask = 0x00100000; mem_mask < 0x10000000; mem_mask <<= 1)
diff --git a/arch/arm/mach-footbridge/ebsa285.c b/arch/arm/mach-footbridge/ebsa285.c
index b08243500e2e..1a7235fb52ac 100644
--- a/arch/arm/mach-footbridge/ebsa285.c
+++ b/arch/arm/mach-footbridge/ebsa285.c
@@ -30,21 +30,24 @@ static const struct {
        const char *name;
        const char *trigger;
 } ebsa285_leds[] = {
-        { "ebsa285:amber", "heartbeat", },
+        { "ebsa285:amber", "cpu0", },
-        { "ebsa285:green", "cpu0", },
+        { "ebsa285:green", "heartbeat", },
        { "ebsa285:red",},
 };
+static unsigned char hw_led_state;
 static void ebsa285_led_set(struct led_classdev *cdev,
                enum led_brightness b)
 {
        struct ebsa285_led *led = container_of(cdev,
                        struct ebsa285_led, cdev);
-        if (b != LED_OFF)
+        if (b == LED_OFF)
-                *XBUS_LEDS |= led->mask;
+                hw_led_state |= led->mask;
        else
-                *XBUS_LEDS &= ~led->mask;
+                hw_led_state &= ~led->mask;
+        *XBUS_LEDS = hw_led_state;
 }
 static enum led_brightness ebsa285_led_get(struct led_classdev *cdev)
@@ -52,18 +55,19 @@ static enum led_brightness ebsa285_led_get(struct led_classdev *cdev)
        struct ebsa285_led *led = container_of(cdev,
                        struct ebsa285_led, cdev);
-        return (*XBUS_LEDS & led->mask) ? LED_FULL : LED_OFF;
+        return hw_led_state & led->mask ? LED_OFF : LED_FULL;
 }
 static int __init ebsa285_leds_init(void)
 {
        int i;
-        if (machine_is_ebsa285())
+        if (!machine_is_ebsa285())
                return -ENODEV;
-        /* 3 LEDS All ON */
+        /* 3 LEDS all off */
-        *XBUS_LEDS |= XBUS_LED_AMBER | XBUS_LED_GREEN | XBUS_LED_RED;
+        hw_led_state = XBUS_LED_AMBER | XBUS_LED_GREEN | XBUS_LED_RED;
+        *XBUS_LEDS = hw_led_state;
        for (i = 0; i < ARRAY_SIZE(ebsa285_leds); i++) {
                struct ebsa285_led *led;
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index b3d7e5634b83..bd3bf66ce344 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -17,12 +17,15 @@
 #include <linux/clkdev.h>
 #include <linux/clocksource.h>
 #include <linux/dma-mapping.h>
+#include <linux/input.h>
 #include <linux/io.h>
 #include <linux/irqchip.h>
+#include <linux/mailbox.h>
 #include <linux/of.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/of_address.h>
+#include <linux/reboot.h>
 #include <linux/amba/bus.h>
 #include <linux/platform_device.h>
@@ -130,6 +133,24 @@ static struct platform_device highbank_cpuidle_device = {
        .name = "cpuidle-calxeda",
 };
+static int hb_keys_notifier(struct notifier_block *nb, unsigned long event, void *data)
+{
+        u32 key = *(u32 *)data;
+        if (event != 0x1000)
+                return 0;
+        if (key == KEY_POWER)
+                orderly_poweroff(false);
+        else if (key == 0xffff)
+                ctrl_alt_del();
+        return 0;
+}
+static struct notifier_block hb_keys_nb = {
+        .notifier_call = hb_keys_notifier,
+};
 static void __init highbank_init(void)
 {
        struct device_node *np;
@@ -145,6 +166,8 @@ static void __init highbank_init(void)
        bus_register_notifier(&platform_bus_type, &highbank_platform_nb);
        bus_register_notifier(&amba_bustype, &highbank_amba_nb);
+        pl320_ipc_register_notifier(&hb_keys_nb);
        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
        if (psci_ops.cpu_suspend)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 1f25f3e99c05..adcef406ff0a 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -19,11 +19,11 @@ secure-common				= omap-smc.o omap-secure.o
 obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
 obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
-obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common)
+obj-$(CONFIG_ARCH_OMAP4) += $(hwmod-common) $(secure-common)
 obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common)
-obj-$(CONFIG_SOC_OMAP5)  += prm44xx.o $(hwmod-common) $(secure-common)
+obj-$(CONFIG_SOC_OMAP5)  += $(hwmod-common) $(secure-common)
 obj-$(CONFIG_SOC_AM43XX) += $(hwmod-common) $(secure-common)
-obj-$(CONFIG_SOC_DRA7XX) += prm44xx.o $(hwmod-common) $(secure-common)
+obj-$(CONFIG_SOC_DRA7XX) += $(hwmod-common) $(secure-common)
 ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),)
 obj-y += mcbsp.o
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 19f1652e94cf..8d972ff18c56 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -131,6 +131,24 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
        .dt_compat      = omap3_gp_boards_compat,
        .restart        = omap3xxx_restart,
 MACHINE_END
+static const char *am3517_boards_compat[] __initdata = {
+        "ti,am3517",
+        NULL,
+};
+DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)")
+        .reserve        = omap_reserve,
+        .map_io         = omap3_map_io,
+        .init_early     = am35xx_init_early,
+        .init_irq       = omap_intc_of_init,
+        .handle_irq     = omap3_intc_handle_irq,
+        .init_machine   = omap_generic_init,
+        .init_late      = omap3_init_late,
+        .init_time      = omap3_gptimer_timer_init,
+        .dt_compat      = am3517_boards_compat,
+        .restart        = omap3xxx_restart,
+MACHINE_END
 #endif
 #ifdef CONFIG_SOC_AM33XX
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 4ec8d82b0492..44a59c3abfb0 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -242,12 +242,18 @@ static void __init ldp_display_init(void)
 static int ldp_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio)
 {
+        int res;
        /* LCD enable GPIO */
        ldp_lcd_pdata.enable_gpio = gpio + 7;
        /* Backlight enable GPIO */
        ldp_lcd_pdata.backlight_gpio = gpio + 15;
+        res = platform_device_register(&ldp_lcd_device);
+        if (res)
+                pr_err("Unable to register LCD: %d\n", res);
        return 0;
 }
@@ -346,7 +352,6 @@ static struct omap2_hsmmc_info mmc[] __initdata = {
 static struct platform_device *ldp_devices[] __initdata = {
        &ldp_gpio_keys_device,
-        &ldp_lcd_device,
 };
 #ifdef CONFIG_OMAP_MUX
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index f7644febee81..e30ef6797c63 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -299,7 +299,6 @@ struct omap_sdrc_params;
 extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
                                      struct omap_sdrc_params *sdrc_cs1);
 struct omap2_hsmmc_info;
-extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
 extern void omap_reserve(void);
 struct omap_hwmod;
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index a4e536b11ec9..4cf165502b35 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -32,7 +32,6 @@
 #include "soc.h"
 #include "iomap.h"
-#include "mux.h"
 #include "control.h"
 #include "display.h"
 #include "prm.h"
@@ -102,35 +101,6 @@ static const struct omap_dss_hwmod_data omap4_dss_hwmod_data[] __initconst = {
        { "dss_hdmi", "omapdss_hdmi", -1 },
 };
-static void __init omap4_tpd12s015_mux_pads(void)
-{
-        omap_mux_init_signal("hdmi_cec",
-                        OMAP_PIN_INPUT_PULLUP);
-        omap_mux_init_signal("hdmi_ddc_scl",
-                        OMAP_PIN_INPUT_PULLUP);
-        omap_mux_init_signal("hdmi_ddc_sda",
-                        OMAP_PIN_INPUT_PULLUP);
-}
-static void __init omap4_hdmi_mux_pads(enum omap_hdmi_flags flags)
-{
-        u32 reg;
-        u16 control_i2c_1;
-        /*
-         * CONTROL_I2C_1: HDMI_DDC_SDA_PULLUPRESX (bit 28) and
-         * HDMI_DDC_SCL_PULLUPRESX (bit 24) are set to disable
-         * internal pull up resistor.
-         */
-        if (flags & OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP) {
-                control_i2c_1 = OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_1;
-                reg = omap4_ctrl_pad_readl(control_i2c_1);
-                reg |= (OMAP4_HDMI_DDC_SDA_PULLUPRESX_MASK |
-                        OMAP4_HDMI_DDC_SCL_PULLUPRESX_MASK);
-                        omap4_ctrl_pad_writel(reg, control_i2c_1);
-        }
-}
 static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
 {
        u32 enable_mask, enable_shift;
@@ -164,16 +134,6 @@ static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
        return 0;
 }
-int __init omap_hdmi_init(enum omap_hdmi_flags flags)
-{
-        if (cpu_is_omap44xx()) {
-                omap4_hdmi_mux_pads(flags);
-                omap4_tpd12s015_mux_pads();
-        }
-        return 0;
-}
 static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask)
 {
        if (cpu_is_omap44xx())
diff --git a/arch/arm/mach-omap2/dss-common.c b/arch/arm/mach-omap2/dss-common.c
index 365bfd3d9c68..dadccc91488c 100644
--- a/arch/arm/mach-omap2/dss-common.c
+++ b/arch/arm/mach-omap2/dss-common.c
@@ -223,7 +223,7 @@ void __init omap_4430sdp_display_init_of(void)
 static struct connector_dvi_platform_data omap3_igep2_dvi_connector_pdata = {
        .name                   = "dvi",
        .source                 = "tfp410.0",
-        .i2c_bus_num            = 3,
+        .i2c_bus_num            = 2,
 };
 static struct platform_device omap3_igep2_dvi_connector_device = {
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 81de56251955..d24926e6340f 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1502,6 +1502,22 @@ static int gpmc_probe_generic_child(struct platform_device *pdev,
        }
        /*
+         * For some GPMC devices we still need to rely on the bootloader
+         * timings because the devices can be connected via FPGA. So far
+         * the list is smc91x on the omap2 SDP boards, and 8250 on zooms.
+         * REVISIT: Add timing support from slls644g.pdf and from the
+         * lan91c96 manual.
+         */
+        if (of_device_is_compatible(child, "ns16550a") ||
+            of_device_is_compatible(child, "smsc,lan91c94") ||
+            of_device_is_compatible(child, "smsc,lan91c111")) {
+                dev_warn(&pdev->dev,
+                         "%s using bootloader timings on CS%d\n",
+                         child->name, cs);
+                goto no_timings;
+        }
+        /*
         * FIXME: gpmc_cs_request() will map the CS to an arbitary
         * location in the gpmc address space. When booting with
         * device-tree we want the NOR flash to be mapped to the
@@ -1529,6 +1545,7 @@ static int gpmc_probe_generic_child(struct platform_device *pdev,
        gpmc_read_timings_dt(child, &gpmc_t);
        gpmc_cs_set_timings(cs, &gpmc_t);
+no_timings:
        if (of_platform_device_create(child, NULL, &pdev->dev))
                return 0;
@@ -1541,42 +1558,6 @@ err:
        return ret;
 }
-/*
- * REVISIT: Add timing support from slls644g.pdf
- */
-static int gpmc_probe_8250(struct platform_device *pdev,
-                                struct device_node *child)
-{
-        struct resource res;
-        unsigned long base;
-        int ret, cs;
-        if (of_property_read_u32(child, "reg", &cs) < 0) {
-                dev_err(&pdev->dev, "%s has no 'reg' property\n",
-                        child->full_name);
-                return -ENODEV;
-        }
-        if (of_address_to_resource(child, 0, &res) < 0) {
-                dev_err(&pdev->dev, "%s has malformed 'reg' property\n",
-                        child->full_name);
-                return -ENODEV;
-        }
-        ret = gpmc_cs_request(cs, resource_size(&res), &base);
-        if (ret < 0) {
-                dev_err(&pdev->dev, "cannot request GPMC CS %d\n", cs);
-                return ret;
-        }
-        if (of_platform_device_create(child, NULL, &pdev->dev))
-                return 0;
-        dev_err(&pdev->dev, "failed to create gpmc child %s\n", child->name);
-        return -ENODEV;
-}
 static int gpmc_probe_dt(struct platform_device *pdev)
 {
        int ret;
@@ -1618,10 +1599,9 @@ static int gpmc_probe_dt(struct platform_device *pdev)
                else if (of_node_cmp(child->name, "onenand") == 0)
                        ret = gpmc_probe_onenand_child(pdev, child);
                else if (of_node_cmp(child->name, "ethernet") == 0 ||
-                         of_node_cmp(child->name, "nor") == 0)
+                         of_node_cmp(child->name, "nor") == 0 ||
+                         of_node_cmp(child->name, "uart") == 0)
                        ret = gpmc_probe_generic_child(pdev, child);
-                else if (of_node_cmp(child->name, "8250") == 0)
-                        ret = gpmc_probe_8250(pdev, child);
                if (WARN(ret < 0, "%s: probing gpmc child %s failed\n",
                         __func__, child->full_name))
diff --git a/arch/arm/mach-omap2/omap-secure.h b/arch/arm/mach-omap2/omap-secure.h
index 8cc7d331437d..3e97c6c8ecf1 100644
--- a/arch/arm/mach-omap2/omap-secure.h
+++ b/arch/arm/mach-omap2/omap-secure.h
@@ -76,6 +76,13 @@ static inline void omap_barrier_reserve_memblock(void)
 { }
 #endif
+#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
 void set_cntfreq(void);
+#else
+static inline void set_cntfreq(void)
+{
+}
+#endif
 #endif /* __ASSEMBLER__ */
 #endif /* OMAP_ARCH_OMAP_SECURE_H */
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 57911430324e..b39efd46abf9 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -35,7 +35,6 @@
 #include "iomap.h"
 #include "common.h"
 #include "mmc.h"
-#include "hsmmc.h"
 #include "prminst44xx.h"
 #include "prcm_mpu44xx.h"
 #include "omap4-sar-layout.h"
@@ -284,59 +283,3 @@ skip_errata_init:
        omap_wakeupgen_init();
        irqchip_init();
 }
-#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
-static int omap4_twl6030_hsmmc_late_init(struct device *dev)
-{
-        int irq = 0;
-        struct platform_device *pdev = container_of(dev,
-                                struct platform_device, dev);
-        struct omap_mmc_platform_data *pdata = dev->platform_data;
-        /* Setting MMC1 Card detect Irq */
-        if (pdev->id == 0) {
-                irq = twl6030_mmc_card_detect_config();
-                if (irq < 0) {
-                        dev_err(dev, "%s: Error card detect config(%d)\n",
-                                __func__, irq);
-                        return irq;
-                }
-                pdata->slots[0].card_detect_irq = irq;
-                pdata->slots[0].card_detect = twl6030_mmc_card_detect;
-        }
-        return 0;
-}
-static __init void omap4_twl6030_hsmmc_set_late_init(struct device *dev)
-{
-        struct omap_mmc_platform_data *pdata;
-        /* dev can be null if CONFIG_MMC_OMAP_HS is not set */
-        if (!dev) {
-                pr_err("Failed %s\n", __func__);
-                return;
-        }
-        pdata = dev->platform_data;
-        pdata->init =   omap4_twl6030_hsmmc_late_init;
-}
-int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
-{
-        struct omap2_hsmmc_info *c;
-        omap_hsmmc_init(controllers);
-        for (c = controllers; c->mmc; c++) {
-                /* pdev can be null if CONFIG_MMC_OMAP_HS is not set */
-                if (!c->pdev)
-                        continue;
-                omap4_twl6030_hsmmc_set_late_init(&c->pdev->dev);
-        }
-        return 0;
-}
-#else
-int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
-{
-        return 0;
-}
-#endif
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index 53f0735817bb..e0a398cf28d8 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -183,6 +183,10 @@ static int omap_device_build_from_dt(struct platform_device *pdev)
 odbfd_exit1:
        kfree(hwmods);
 odbfd_exit:
+        /* if data/we are at fault.. load up a fail handler */
+        if (ret)
+                pdev->dev.pm_domain = &omap_device_fail_pm_domain;
        return ret;
 }
@@ -604,6 +608,19 @@ static int _od_runtime_resume(struct device *dev)
        return pm_generic_runtime_resume(dev);
 }
+static int _od_fail_runtime_suspend(struct device *dev)
+{
+        dev_warn(dev, "%s: FIXME: missing hwmod/omap_dev info\n", __func__);
+        return -ENODEV;
+}
+static int _od_fail_runtime_resume(struct device *dev)
+{
+        dev_warn(dev, "%s: FIXME: missing hwmod/omap_dev info\n", __func__);
+        return -ENODEV;
+}
 #endif
 #ifdef CONFIG_SUSPEND
@@ -657,6 +674,13 @@ static int _od_resume_noirq(struct device *dev)
 #define _od_resume_noirq NULL
 #endif
+struct dev_pm_domain omap_device_fail_pm_domain = {
+        .ops = {
+                SET_RUNTIME_PM_OPS(_od_fail_runtime_suspend,
+                                   _od_fail_runtime_resume, NULL)
+        }
+};
 struct dev_pm_domain omap_device_pm_domain = {
        .ops = {
                SET_RUNTIME_PM_OPS(_od_runtime_suspend, _od_runtime_resume,
diff --git a/arch/arm/mach-omap2/omap_device.h b/arch/arm/mach-omap2/omap_device.h
index 17ca1aec2710..78c02b355179 100644
--- a/arch/arm/mach-omap2/omap_device.h
+++ b/arch/arm/mach-omap2/omap_device.h
@@ -29,6 +29,7 @@
 #include "omap_hwmod.h"
 extern struct dev_pm_domain omap_device_pm_domain;
+extern struct dev_pm_domain omap_device_fail_pm_domain;
 /* omap_device._state values */
 #define OMAP_DEVICE_STATE_UNKNOWN       0
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index e3f0ecaf87dd..8a1b5e0bad40 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -399,7 +399,7 @@ static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
 }
 /**
- * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
+ * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
 * @oh: struct omap_hwmod *
 * @v: pointer to register contents to modify
 *
@@ -427,6 +427,36 @@ static int _set_softreset(struct omap_hwmod *oh, u32 *v)
 }
 /**
+ * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
+ * @oh: struct omap_hwmod *
+ * @v: pointer to register contents to modify
+ *
+ * Clear the SOFTRESET bit in @v for hwmod @oh.  Returns -EINVAL upon
+ * error or 0 upon success.
+ */
+static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
+{
+        u32 softrst_mask;
+        if (!oh->class->sysc ||
+            !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
+                return -EINVAL;
+        if (!oh->class->sysc->sysc_fields) {
+                WARN(1,
+                     "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
+                     oh->name);
+                return -EINVAL;
+        }
+        softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
+        *v &= ~softrst_mask;
+        return 0;
+}
+/**
 * _wait_softreset_complete - wait for an OCP softreset to complete
 * @oh: struct omap_hwmod * to wait on
 *
@@ -785,6 +815,7 @@ static int _init_interface_clks(struct omap_hwmod *oh)
                        pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
                                   oh->name, os->clk);
                        ret = -EINVAL;
+                        continue;
                }
                os->_clk = c;
                /*
@@ -821,6 +852,7 @@ static int _init_opt_clks(struct omap_hwmod *oh)
                        pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
                                   oh->name, oc->clk);
                        ret = -EINVAL;
+                        continue;
                }
                oc->_clk = c;
                /*
@@ -1911,6 +1943,12 @@ static int _ocp_softreset(struct omap_hwmod *oh)
        ret = _set_softreset(oh, &v);
        if (ret)
                goto dis_opt_clks;
+        _write_sysconfig(v, oh);
+        ret = _clear_softreset(oh, &v);
+        if (ret)
+                goto dis_opt_clks;
        _write_sysconfig(v, oh);
        if (oh->class->sysc->srst_udelay)
@@ -2326,38 +2364,80 @@ static int _shutdown(struct omap_hwmod *oh)
        return 0;
 }
+static int of_dev_find_hwmod(struct device_node *np,
+                             struct omap_hwmod *oh)
+{
+        int count, i, res;
+        const char *p;
+        count = of_property_count_strings(np, "ti,hwmods");
+        if (count < 1)
+                return -ENODEV;
+        for (i = 0; i < count; i++) {
+                res = of_property_read_string_index(np, "ti,hwmods",
+                                                    i, &p);
+                if (res)
+                        continue;
+                if (!strcmp(p, oh->name)) {
+                        pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n",
+                                 np->name, i, oh->name);
+                        return i;
+                }
+        }
+        return -ENODEV;
+}
 /**
 * of_dev_hwmod_lookup - look up needed hwmod from dt blob
 * @np: struct device_node *
 * @oh: struct omap_hwmod *
+ * @index: index of the entry found
+ * @found: struct device_node * found or NULL
 *
 * Parse the dt blob and find out needed hwmod. Recursive function is
 * implemented to take care hierarchical dt blob parsing.
- * Return: The device node on success or NULL on failure.
+ * Return: Returns 0 on success, -ENODEV when not found.
 */
-static struct device_node *of_dev_hwmod_lookup(struct device_node *np,
+static int of_dev_hwmod_lookup(struct device_node *np,
-                                                struct omap_hwmod *oh)
+                               struct omap_hwmod *oh,
+                               int *index,
+                               struct device_node **found)
 {
-        struct device_node *np0 = NULL, *np1 = NULL;
+        struct device_node *np0 = NULL;
-        const char *p;
+        int res;
+        res = of_dev_find_hwmod(np, oh);
+        if (res >= 0) {
+                *found = np;
+                *index = res;
+                return 0;
+        }
        for_each_child_of_node(np, np0) {
-                if (of_find_property(np0, "ti,hwmods", NULL)) {
+                struct device_node *fc;
-                        p = of_get_property(np0, "ti,hwmods", NULL);
+                int i;
-                        if (!strcmp(p, oh->name))
-                                return np0;
+                res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
-                        np1 = of_dev_hwmod_lookup(np0, oh);
+                if (res == 0) {
-                        if (np1)
+                        *found = fc;
-                                return np1;
+                        *index = i;
+                        return 0;
                }
        }
-        return NULL;
+        *found = NULL;
+        *index = 0;
+        return -ENODEV;
 }
 /**
 * _init_mpu_rt_base - populate the virtual address for a hwmod
 * @oh: struct omap_hwmod * to locate the virtual address
 * @data: (unused, caller should pass NULL)
+ * @index: index of the reg entry iospace in device tree
 * @np: struct device_node * of the IP block's device node in the DT data
 *
 * Cache the virtual address used by the MPU to access this IP block's
@@ -2368,7 +2448,7 @@ static struct device_node *of_dev_hwmod_lookup(struct device_node *np,
 * -ENXIO on absent or invalid register target address space.
 */
 static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
-                                    struct device_node *np)
+                                    int index, struct device_node *np)
 {
        struct omap_hwmod_addr_space *mem;
        void __iomem *va_start = NULL;
@@ -2390,13 +2470,17 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
                if (!np)
                        return -ENXIO;
-                va_start = of_iomap(np, oh->mpu_rt_idx);
+                va_start = of_iomap(np, index + oh->mpu_rt_idx);
        } else {
                va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
        }
        if (!va_start) {
-                pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
+                if (mem)
+                        pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
+                else
+                        pr_err("omap_hwmod: %s: Missing dt reg%i for %s\n",
+                               oh->name, index, np->full_name);
                return -ENXIO;
        }
@@ -2422,17 +2506,29 @@ static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
 */
 static int __init _init(struct omap_hwmod *oh, void *data)
 {
-        int r;
+        int r, index;
        struct device_node *np = NULL;
        if (oh->_state != _HWMOD_STATE_REGISTERED)
                return 0;
-        if (of_have_populated_dt())
+        if (of_have_populated_dt()) {
-                np = of_dev_hwmod_lookup(of_find_node_by_name(NULL, "ocp"), oh);
+                struct device_node *bus;
+                bus = of_find_node_by_name(NULL, "ocp");
+                if (!bus)
+                        return -ENODEV;
+                r = of_dev_hwmod_lookup(bus, oh, &index, &np);
+                if (r)
+                        pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
+                else if (np && index)
+                        pr_warn("omap_hwmod: %s using broken dt data from %s\n",
+                                oh->name, np->name);
+        }
        if (oh->class->sysc) {
-                r = _init_mpu_rt_base(oh, NULL, np);
+                r = _init_mpu_rt_base(oh, NULL, index, np);
                if (r < 0) {
                        WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
                             oh->name);
@@ -3169,6 +3265,11 @@ int omap_hwmod_softreset(struct omap_hwmod *oh)
                goto error;
        _write_sysconfig(v, oh);
+        ret = _clear_softreset(oh, &v);
+        if (ret)
+                goto error;
+        _write_sysconfig(v, oh);
 error:
        return ret;
 }
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index 56cebb05509e..d23c77fadb31 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -796,7 +796,7 @@ struct omap_hwmod omap2xxx_counter_32k_hwmod = {
 /* gpmc */
 static struct omap_hwmod_irq_info omap2xxx_gpmc_irqs[] = {
-        { .irq = 20 },
+        { .irq = 20 + OMAP_INTC_START, },
        { .irq = -1 }
 };
@@ -841,7 +841,7 @@ static struct omap_hwmod_class omap2_rng_hwmod_class = {
 };
 static struct omap_hwmod_irq_info omap2_rng_mpu_irqs[] = {
-        { .irq = 52 },
+        { .irq = 52 + OMAP_INTC_START, },
        { .irq = -1 }
 };
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 9e56fabd7fa3..4c3b1e6df508 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1943,7 +1943,8 @@ static struct omap_hwmod_class_sysconfig omap3xxx_usb_host_hs_sysc = {
        .syss_offs      = 0x0014,
        .sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
                           SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP |
-                           SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+                           SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
+                           SYSS_HAS_RESET_STATUS),
        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
                           MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
        .sysc_fields    = &omap_hwmod_sysc_type1,
@@ -2021,15 +2022,7 @@ static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
         * hence HWMOD_SWSUP_MSTANDBY
         */
-        /*
+        .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
-         * During system boot; If the hwmod framework resets the module
-         * the module will have smart idle settings; which can lead to deadlock
-         * (above Errata Id:i660); so, dont reset the module during boot;
-         * Use HWMOD_INIT_NO_RESET.
-         */
-        .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
-                          HWMOD_INIT_NO_RESET,
 };
 /*
@@ -2172,7 +2165,7 @@ static struct omap_hwmod_class omap3xxx_gpmc_hwmod_class = {
 };
 static struct omap_hwmod_irq_info omap3xxx_gpmc_irqs[] = {
-        { .irq = 20 },
+        { .irq = 20 + OMAP_INTC_START, },
        { .irq = -1 }
 };
@@ -3006,7 +2999,7 @@ static struct omap_mmu_dev_attr mmu_isp_dev_attr = {
 static struct omap_hwmod omap3xxx_mmu_isp_hwmod;
 static struct omap_hwmod_irq_info omap3xxx_mmu_isp_irqs[] = {
-        { .irq = 24 },
+        { .irq = 24 + OMAP_INTC_START, },
        { .irq = -1 }
 };
@@ -3048,7 +3041,7 @@ static struct omap_mmu_dev_attr mmu_iva_dev_attr = {
 static struct omap_hwmod omap3xxx_mmu_iva_hwmod;
 static struct omap_hwmod_irq_info omap3xxx_mmu_iva_irqs[] = {
-        { .irq = 28 },
+        { .irq = 28 + OMAP_INTC_START, },
        { .irq = -1 }
 };
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 1e5b12cb8246..3318cae96e7d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2937,7 +2937,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_usb_host_hs_sysc = {
        .sysc_offs      = 0x0010,
        .syss_offs      = 0x0014,
        .sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE |
-                           SYSC_HAS_SOFTRESET),
+                           SYSC_HAS_SOFTRESET | SYSC_HAS_RESET_STATUS),
        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
                           SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
                           MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
@@ -3001,15 +3001,7 @@ static struct omap_hwmod omap44xx_usb_host_hs_hwmod = {
         * hence HWMOD_SWSUP_MSTANDBY
         */
-        /*
+        .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
-         * During system boot; If the hwmod framework resets the module
-         * the module will have smart idle settings; which can lead to deadlock
-         * (above Errata Id:i660); so, dont reset the module during boot;
-         * Use HWMOD_INIT_NO_RESET.
-         */
-        .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
-                          HWMOD_INIT_NO_RESET,
 };
 /*
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index 9e08d6994a0b..e297d6231c3a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -1544,7 +1544,8 @@ static struct omap_hwmod_class_sysconfig omap54xx_usb_host_hs_sysc = {
        .rev_offs       = 0x0000,
        .sysc_offs      = 0x0010,
        .sysc_flags     = (SYSC_HAS_MIDLEMODE | SYSC_HAS_RESET_STATUS |
-                           SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
+                           SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
+                           SYSC_HAS_RESET_STATUS),
        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
                           SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
                           MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
@@ -1598,15 +1599,7 @@ static struct omap_hwmod omap54xx_usb_host_hs_hwmod = {
         * hence HWMOD_SWSUP_MSTANDBY
         */
-        /*
+        .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
-         * During system boot; If the hwmod framework resets the module
-         * the module will have smart idle settings; which can lead to deadlock
-         * (above Errata Id:i660); so, dont reset the module during boot;
-         * Use HWMOD_INIT_NO_RESET.
-         */
-        .flags          = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
-                          HWMOD_INIT_NO_RESET,
        .main_clk       = "l3init_60m_fclk",
        .prcm = {
                .omap4 = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index db32d5380b11..18f333c440db 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1637,7 +1637,7 @@ static struct omap_hwmod dra7xx_uart1_hwmod = {
        .class          = &dra7xx_uart_hwmod_class,
        .clkdm_name     = "l4per_clkdm",
        .main_clk       = "uart1_gfclk_mux",
-        .flags          = HWMOD_SWSUP_SIDLE_ACT,
+        .flags          = HWMOD_SWSUP_SIDLE_ACT | DEBUG_OMAP2UART1_FLAGS,
        .prcm = {
                .omap4 = {
                        .clkctrl_offs = DRA7XX_CM_L4PER_UART1_CLKCTRL_OFFSET,
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 10c71450cf63..39f020c982e8 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -139,6 +139,7 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
 static struct pdata_init pdata_quirks[] __initdata = {
 #ifdef CONFIG_ARCH_OMAP3
+        { "nokia,omap3-n900", hsmmc2_internal_input_clk, },
        { "nokia,omap3-n9", hsmmc2_internal_input_clk, },
        { "nokia,omap3-n950", hsmmc2_internal_input_clk, },
        { "isee,omap3-igep0020", omap3_igep0020_legacy_init, },
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 93b80e5da8d4..1f3770a8a728 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -120,7 +120,7 @@ static void omap3_save_secure_ram_context(void)
                 * will hang the system.
                 */
                pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
-                ret = _omap_save_secure_sram((u32 *)
+                ret = _omap_save_secure_sram((u32 *)(unsigned long)
                                __pa(omap3_secure_ram_storage));
                pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state);
                /* Following is for error tracking, it should not happen */
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index e233dfcbc186..93a2a6e4260f 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -128,7 +128,8 @@ skip_voltdm:
        for (i = 0; i < pwrdm->banks; i++)
                pwrdm->ret_mem_off_counter[i] = 0;
-        arch_pwrdm->pwrdm_wait_transition(pwrdm);
+        if (arch_pwrdm && arch_pwrdm->pwrdm_wait_transition)
+                arch_pwrdm->pwrdm_wait_transition(pwrdm);
        pwrdm->state = pwrdm_read_pwrst(pwrdm);
        pwrdm->state_counter[pwrdm->state] = 1;
diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h b/arch/arm/mach-omap2/prm44xx_54xx.h
index 7a976065e138..8d95aa543ef5 100644
--- a/arch/arm/mach-omap2/prm44xx_54xx.h
+++ b/arch/arm/mach-omap2/prm44xx_54xx.h
@@ -43,7 +43,7 @@ extern void omap4_prm_vcvp_write(u32 val, u8 offset);
 extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
-        defined(CONFIG_SOC_DRA7XX)
+        defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
 void omap44xx_prm_reconfigure_io_chain(void);
 #else
 static inline void omap44xx_prm_reconfigure_io_chain(void)
diff --git a/arch/arm/mach-pxa/include/mach/lubbock.h b/arch/arm/mach-pxa/include/mach/lubbock.h
index 2a086e8373eb..958cd6af9384 100644
--- a/arch/arm/mach-pxa/include/mach/lubbock.h
+++ b/arch/arm/mach-pxa/include/mach/lubbock.h
@@ -10,6 +10,8 @@
 * published by the Free Software Foundation.
 */
+#include <mach/irqs.h>
 #define LUBBOCK_ETH_PHYS        PXA_CS3_PHYS
 #define LUBBOCK_FPGA_PHYS       PXA_CS2_PHYS
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index 0d5dd646f61f..263b15249b5b 100644
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -13,6 +13,7 @@
 #include <mach/regs-ost.h>
 #include <mach/reset.h>
+#include <mach/smemc.h>
 unsigned int reset_status;
 EXPORT_SYMBOL(reset_status);
@@ -81,6 +82,12 @@ static void do_hw_reset(void)
        writel_relaxed(OSSR_M3, OSSR);
        /* ... in 100 ms */
        writel_relaxed(readl_relaxed(OSCR) + 368640, OSMR3);
+        /*
+         * SDRAM hangs on watchdog reset on Marvell PXA270 (erratum 71)
+         * we put SDRAM into self-refresh to prevent that
+         */
+        while (1)
+                writel_relaxed(MDREFR_SLFRSH, MDREFR);
 }
 void pxa_restart(enum reboot_mode mode, const char *cmd)
@@ -104,4 +111,3 @@ void pxa_restart(enum reboot_mode mode, const char *cmd)
                break;
        }
 }
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 0206b915a6f6..ef5557b807ed 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -425,57 +425,57 @@ static struct platform_device tosa_power_device = {
 * Tosa Keyboard
 */
 static const uint32_t tosakbd_keymap[] = {
-        KEY(0, 2, KEY_W),
+        KEY(0, 1, KEY_W),
-        KEY(0, 6, KEY_K),
+        KEY(0, 5, KEY_K),
-        KEY(0, 7, KEY_BACKSPACE),
+        KEY(0, 6, KEY_BACKSPACE),
-        KEY(0, 8, KEY_P),
+        KEY(0, 7, KEY_P),
-        KEY(1, 1, KEY_Q),
+        KEY(1, 0, KEY_Q),
-        KEY(1, 2, KEY_E),
+        KEY(1, 1, KEY_E),
-        KEY(1, 3, KEY_T),
+        KEY(1, 2, KEY_T),
-        KEY(1, 4, KEY_Y),
+        KEY(1, 3, KEY_Y),
-        KEY(1, 6, KEY_O),
+        KEY(1, 5, KEY_O),
-        KEY(1, 7, KEY_I),
+        KEY(1, 6, KEY_I),
-        KEY(1, 8, KEY_COMMA),
+        KEY(1, 7, KEY_COMMA),
-        KEY(2, 1, KEY_A),
+        KEY(2, 0, KEY_A),
-        KEY(2, 2, KEY_D),
+        KEY(2, 1, KEY_D),
-        KEY(2, 3, KEY_G),
+        KEY(2, 2, KEY_G),
-        KEY(2, 4, KEY_U),
+        KEY(2, 3, KEY_U),
-        KEY(2, 6, KEY_L),
+        KEY(2, 5, KEY_L),
-        KEY(2, 7, KEY_ENTER),
+        KEY(2, 6, KEY_ENTER),
-        KEY(2, 8, KEY_DOT),
+        KEY(2, 7, KEY_DOT),
-        KEY(3, 1, KEY_Z),
+        KEY(3, 0, KEY_Z),
-        KEY(3, 2, KEY_C),
+        KEY(3, 1, KEY_C),
-        KEY(3, 3, KEY_V),
+        KEY(3, 2, KEY_V),
-        KEY(3, 4, KEY_J),
+        KEY(3, 3, KEY_J),
-        KEY(3, 5, TOSA_KEY_ADDRESSBOOK),
+        KEY(3, 4, TOSA_KEY_ADDRESSBOOK),
-        KEY(3, 6, TOSA_KEY_CANCEL),
+        KEY(3, 5, TOSA_KEY_CANCEL),
-        KEY(3, 7, TOSA_KEY_CENTER),
+        KEY(3, 6, TOSA_KEY_CENTER),
-        KEY(3, 8, TOSA_KEY_OK),
+        KEY(3, 7, TOSA_KEY_OK),
-        KEY(3, 9, KEY_LEFTSHIFT),
+        KEY(3, 8, KEY_LEFTSHIFT),
-        KEY(4, 1, KEY_S),
+        KEY(4, 0, KEY_S),
-        KEY(4, 2, KEY_R),
+        KEY(4, 1, KEY_R),
-        KEY(4, 3, KEY_B),
+        KEY(4, 2, KEY_B),
-        KEY(4, 4, KEY_N),
+        KEY(4, 3, KEY_N),
-        KEY(4, 5, TOSA_KEY_CALENDAR),
+        KEY(4, 4, TOSA_KEY_CALENDAR),
-        KEY(4, 6, TOSA_KEY_HOMEPAGE),
+        KEY(4, 5, TOSA_KEY_HOMEPAGE),
-        KEY(4, 7, KEY_LEFTCTRL),
+        KEY(4, 6, KEY_LEFTCTRL),
-        KEY(4, 8, TOSA_KEY_LIGHT),
+        KEY(4, 7, TOSA_KEY_LIGHT),
-        KEY(4, 10, KEY_RIGHTSHIFT),
+        KEY(4, 9, KEY_RIGHTSHIFT),
-        KEY(5, 1, KEY_TAB),
+        KEY(5, 0, KEY_TAB),
-        KEY(5, 2, KEY_SLASH),
+        KEY(5, 1, KEY_SLASH),
-        KEY(5, 3, KEY_H),
+        KEY(5, 2, KEY_H),
-        KEY(5, 4, KEY_M),
+        KEY(5, 3, KEY_M),
-        KEY(5, 5, TOSA_KEY_MENU),
+        KEY(5, 4, TOSA_KEY_MENU),
-        KEY(5, 7, KEY_UP),
+        KEY(5, 6, KEY_UP),
-        KEY(5, 11, TOSA_KEY_FN),
+        KEY(5, 10, TOSA_KEY_FN),
-        KEY(6, 1, KEY_X),
+        KEY(6, 0, KEY_X),
-        KEY(6, 2, KEY_F),
+        KEY(6, 1, KEY_F),
-        KEY(6, 3, KEY_SPACE),
+        KEY(6, 2, KEY_SPACE),
-        KEY(6, 4, KEY_APOSTROPHE),
+        KEY(6, 3, KEY_APOSTROPHE),
-        KEY(6, 5, TOSA_KEY_MAIL),
+        KEY(6, 4, TOSA_KEY_MAIL),
-        KEY(6, 6, KEY_LEFT),
+        KEY(6, 5, KEY_LEFT),
-        KEY(6, 7, KEY_DOWN),
+        KEY(6, 6, KEY_DOWN),
-        KEY(6, 8, KEY_RIGHT),
+        KEY(6, 7, KEY_RIGHT),
 };
 static struct matrix_keymap_data tosakbd_keymap_data = {
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 2cb8dc55b50e..7094bccbae91 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -17,9 +17,10 @@ config CPU_S3C6410
        help
          Enable S3C6410 CPU support
-config S3C64XX_DMA
+config S3C64XX_PL080
-        bool "S3C64XX DMA"
+        bool "S3C64XX DMA using generic PL08x driver"
-        select S3C_DMA
+        select AMBA_PL08X
+        select SAMSUNG_DMADEV
 config S3C64XX_SETUP_SDHCI
        bool
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index 6faedcffce04..58069a702a43 100644
--- a/arch/arm/mach-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -26,7 +26,7 @@ obj-$(CONFIG_CPU_IDLE)		+= cpuidle.o
 # DMA support
-obj-$(CONFIG_S3C64XX_DMA)       += dma.o
+obj-$(CONFIG_S3C64XX_PL080)     += pl080.o
 # Device support
diff --git a/arch/arm/mach-s3c64xx/common.h b/arch/arm/mach-s3c64xx/common.h
index bd3bd562011e..7043e7a3a67e 100644
--- a/arch/arm/mach-s3c64xx/common.h
+++ b/arch/arm/mach-s3c64xx/common.h
@@ -58,4 +58,9 @@ int __init s3c64xx_pm_late_initcall(void);
 static inline int s3c64xx_pm_late_initcall(void) { return 0; }
 #endif
+#ifdef CONFIG_S3C64XX_PL080
+extern struct pl08x_platform_data s3c64xx_dma0_plat_data;
+extern struct pl08x_platform_data s3c64xx_dma1_plat_data;
+#endif
 #endif /* __ARCH_ARM_MACH_S3C64XX_COMMON_H */
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
deleted file mode 100644
index 7e22c2113816..000000000000
--- a/arch/arm/mach-s3c64xx/dma.c
+++ /dev/null
@@ -1,762 +0,0 @@
-/* linux/arch/arm/plat-s3c64xx/dma.c
- *
- * Copyright 2009 Openmoko, Inc.
- * Copyright 2009 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C64XX DMA core
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-/*
- * NOTE: Code in this file is not used when booting with Device Tree support.
- */
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/interrupt.h>
-#include <linux/dmapool.h>
-#include <linux/device.h>
-#include <linux/errno.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/amba/pl080.h>
-#include <linux/of.h>
-#include <mach/dma.h>
-#include <mach/map.h>
-#include <mach/irqs.h>
-#include "regs-sys.h"
-/* dma channel state information */
-struct s3c64xx_dmac {
-        struct device           dev;
-        struct clk              *clk;
-        void __iomem            *regs;
-        struct s3c2410_dma_chan *channels;
-        enum dma_ch              chanbase;
-};
-/* pool to provide LLI buffers */
-static struct dma_pool *dma_pool;
-/* Debug configuration and code */
-static unsigned char debug_show_buffs = 0;
-static void dbg_showchan(struct s3c2410_dma_chan *chan)
-{
-        pr_debug("DMA%d: %08x->%08x L %08x C %08x,%08x S %08x\n",
-                 chan->number,
-                 readl(chan->regs + PL080_CH_SRC_ADDR),
-                 readl(chan->regs + PL080_CH_DST_ADDR),
-                 readl(chan->regs + PL080_CH_LLI),
-                 readl(chan->regs + PL080_CH_CONTROL),
-                 readl(chan->regs + PL080S_CH_CONTROL2),
-                 readl(chan->regs + PL080S_CH_CONFIG));
-}
-static void show_lli(struct pl080s_lli *lli)
-{
-        pr_debug("LLI[%p] %08x->%08x, NL %08x C %08x,%08x\n",
-                 lli, lli->src_addr, lli->dst_addr, lli->next_lli,
-                 lli->control0, lli->control1);
-}
-static void dbg_showbuffs(struct s3c2410_dma_chan *chan)
-{
-        struct s3c64xx_dma_buff *ptr;
-        struct s3c64xx_dma_buff *end;
-        pr_debug("DMA%d: buffs next %p, curr %p, end %p\n",
-                 chan->number, chan->next, chan->curr, chan->end);
-        ptr = chan->next;
-        end = chan->end;
-        if (debug_show_buffs) {
-                for (; ptr != NULL; ptr = ptr->next) {
-                        pr_debug("DMA%d: %08x ",
-                                 chan->number, ptr->lli_dma);
-                        show_lli(ptr->lli);
-                }
-        }
-}
-/* End of Debug */
-static struct s3c2410_dma_chan *s3c64xx_dma_map_channel(unsigned int channel)
-{
-        struct s3c2410_dma_chan *chan;
-        unsigned int start, offs;
-        start = 0;
-        if (channel >= DMACH_PCM1_TX)
-                start = 8;
-        for (offs = 0; offs < 8; offs++) {
-                chan = &s3c2410_chans[start + offs];
-                if (!chan->in_use)
-                        goto found;
-        }
-        return NULL;
-found:
-        s3c_dma_chan_map[channel] = chan;
-        return chan;
-}
-int s3c2410_dma_config(enum dma_ch channel, int xferunit)
-{
-        struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);
-        if (chan == NULL)
-                return -EINVAL;
-        switch (xferunit) {
-        case 1:
-                chan->hw_width = 0;
-                break;
-        case 2:
-                chan->hw_width = 1;
-                break;
-        case 4:
-                chan->hw_width = 2;
-                break;
-        default:
-                printk(KERN_ERR "%s: illegal width %d\n", __func__, xferunit);
-                return -EINVAL;
-        }
-        return 0;
-}
-EXPORT_SYMBOL(s3c2410_dma_config);
-static void s3c64xx_dma_fill_lli(struct s3c2410_dma_chan *chan,
-                                 struct pl080s_lli *lli,
-                                 dma_addr_t data, int size)
-{
-        dma_addr_t src, dst;
-        u32 control0, control1;
-        switch (chan->source) {
-        case DMA_FROM_DEVICE:
-                src = chan->dev_addr;
-                dst = data;
-                control0 = PL080_CONTROL_SRC_AHB2;
-                control0 |= PL080_CONTROL_DST_INCR;
-                break;
-        case DMA_TO_DEVICE:
-                src = data;
-                dst = chan->dev_addr;
-                control0 = PL080_CONTROL_DST_AHB2;
-                control0 |= PL080_CONTROL_SRC_INCR;
-                break;
-        default:
-                BUG();
-        }
-        /* note, we do not currently setup any of the burst controls */
-        control1 = size >> chan->hw_width;      /* size in no of xfers */
-        control0 |= PL080_CONTROL_PROT_SYS;     /* always in priv. mode */
-        control0 |= PL080_CONTROL_TC_IRQ_EN;    /* always fire IRQ */
-        control0 |= (u32)chan->hw_width << PL080_CONTROL_DWIDTH_SHIFT;
-        control0 |= (u32)chan->hw_width << PL080_CONTROL_SWIDTH_SHIFT;
-        lli->src_addr = src;
-        lli->dst_addr = dst;
-        lli->next_lli = 0;
-        lli->control0 = control0;
-        lli->control1 = control1;
-}
-static void s3c64xx_lli_to_regs(struct s3c2410_dma_chan *chan,
-                                struct pl080s_lli *lli)
-{
-        void __iomem *regs = chan->regs;
-        pr_debug("%s: LLI %p => regs\n", __func__, lli);
-        show_lli(lli);
-        writel(lli->src_addr, regs + PL080_CH_SRC_ADDR);
-        writel(lli->dst_addr, regs + PL080_CH_DST_ADDR);
-        writel(lli->next_lli, regs + PL080_CH_LLI);
-        writel(lli->control0, regs + PL080_CH_CONTROL);
-        writel(lli->control1, regs + PL080S_CH_CONTROL2);
-}
-static int s3c64xx_dma_start(struct s3c2410_dma_chan *chan)
-{
-        struct s3c64xx_dmac *dmac = chan->dmac;
-        u32 config;
-        u32 bit = chan->bit;
-        dbg_showchan(chan);
-        pr_debug("%s: clearing interrupts\n", __func__);
-        /* clear interrupts */
-        writel(bit, dmac->regs + PL080_TC_CLEAR);
-        writel(bit, dmac->regs + PL080_ERR_CLEAR);
-        pr_debug("%s: starting channel\n", __func__);
-        config = readl(chan->regs + PL080S_CH_CONFIG);
-        config |= PL080_CONFIG_ENABLE;
-        config &= ~PL080_CONFIG_HALT;
-        pr_debug("%s: writing config %08x\n", __func__, config);
-        writel(config, chan->regs + PL080S_CH_CONFIG);
-        return 0;
-}
-static int s3c64xx_dma_stop(struct s3c2410_dma_chan *chan)
-{
-        u32 config;
-        int timeout;
-        pr_debug("%s: stopping channel\n", __func__);
-        dbg_showchan(chan);
-        config = readl(chan->regs + PL080S_CH_CONFIG);
-        config |= PL080_CONFIG_HALT;
-        writel(config, chan->regs + PL080S_CH_CONFIG);
-        timeout = 1000;
-        do {
-                config = readl(chan->regs + PL080S_CH_CONFIG);
-                pr_debug("%s: %d - config %08x\n", __func__, timeout, config);
-                if (config & PL080_CONFIG_ACTIVE)
-                        udelay(10);
-                else
-                        break;
-                } while (--timeout > 0);
-        if (config & PL080_CONFIG_ACTIVE) {
-                printk(KERN_ERR "%s: channel still active\n", __func__);
-                return -EFAULT;
-        }
-        config = readl(chan->regs + PL080S_CH_CONFIG);
-        config &= ~PL080_CONFIG_ENABLE;
-        writel(config, chan->regs + PL080S_CH_CONFIG);
-        return 0;
-}
-static inline void s3c64xx_dma_bufffdone(struct s3c2410_dma_chan *chan,
-                                         struct s3c64xx_dma_buff *buf,
-                                         enum s3c2410_dma_buffresult result)
-{
-        if (chan->callback_fn != NULL)
-                (chan->callback_fn)(chan, buf->pw, 0, result);
-}
-static void s3c64xx_dma_freebuff(struct s3c64xx_dma_buff *buff)
-{
-        dma_pool_free(dma_pool, buff->lli, buff->lli_dma);
-        kfree(buff);
-}
-static int s3c64xx_dma_flush(struct s3c2410_dma_chan *chan)
-{
-        struct s3c64xx_dma_buff *buff, *next;
-        u32 config;
-        dbg_showchan(chan);
-        pr_debug("%s: flushing channel\n", __func__);
-        config = readl(chan->regs + PL080S_CH_CONFIG);
-        config &= ~PL080_CONFIG_ENABLE;
-        writel(config, chan->regs + PL080S_CH_CONFIG);
-        /* dump all the buffers associated with this channel */
-        for (buff = chan->curr; buff != NULL; buff = next) {
-                next = buff->next;
-                pr_debug("%s: buff %p (next %p)\n", __func__, buff, buff->next);
-                s3c64xx_dma_bufffdone(chan, buff, S3C2410_RES_ABORT);
-                s3c64xx_dma_freebuff(buff);
-        }
-        chan->curr = chan->next = chan->end = NULL;
-        return 0;
-}
-int s3c2410_dma_ctrl(enum dma_ch channel, enum s3c2410_chan_op op)
-{
-        struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);
-        WARN_ON(!chan);
-        if (!chan)
-                return -EINVAL;
-        switch (op) {
-        case S3C2410_DMAOP_START:
-                return s3c64xx_dma_start(chan);
-        case S3C2410_DMAOP_STOP:
-                return s3c64xx_dma_stop(chan);
-        case S3C2410_DMAOP_FLUSH:
-                return s3c64xx_dma_flush(chan);
-        /* believe PAUSE/RESUME are no-ops */
-        case S3C2410_DMAOP_PAUSE:
-        case S3C2410_DMAOP_RESUME:
-        case S3C2410_DMAOP_STARTED:
-        case S3C2410_DMAOP_TIMEOUT:
-                return 0;
-        }
-        return -ENOENT;
-}
-EXPORT_SYMBOL(s3c2410_dma_ctrl);
-/* s3c2410_dma_enque
- *
- */
-int s3c2410_dma_enqueue(enum dma_ch channel, void *id,
-                        dma_addr_t data, int size)
-{
-        struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);
-        struct s3c64xx_dma_buff *next;
-        struct s3c64xx_dma_buff *buff;
-        struct pl080s_lli *lli;
-        unsigned long flags;
-        int ret;
-        WARN_ON(!chan);
-        if (!chan)
-                return -EINVAL;
-        buff = kzalloc(sizeof(struct s3c64xx_dma_buff), GFP_ATOMIC);
-        if (!buff) {
-                printk(KERN_ERR "%s: no memory for buffer\n", __func__);
-                return -ENOMEM;
-        }
-        lli = dma_pool_alloc(dma_pool, GFP_ATOMIC, &buff->lli_dma);
-        if (!lli) {
-                printk(KERN_ERR "%s: no memory for lli\n", __func__);
-                ret = -ENOMEM;
-                goto err_buff;
-        }
-        pr_debug("%s: buff %p, dp %08x lli (%p, %08x) %d\n",
-                 __func__, buff, data, lli, (u32)buff->lli_dma, size);
-        buff->lli = lli;
-        buff->pw = id;
-        s3c64xx_dma_fill_lli(chan, lli, data, size);
-        local_irq_save(flags);
-        if ((next = chan->next) != NULL) {
-                struct s3c64xx_dma_buff *end = chan->end;
-                struct pl080s_lli *endlli = end->lli;
-                pr_debug("enquing onto channel\n");
-                end->next = buff;
-                endlli->next_lli = buff->lli_dma;
-                if (chan->flags & S3C2410_DMAF_CIRCULAR) {
-                        struct s3c64xx_dma_buff *curr = chan->curr;
-                        lli->next_lli = curr->lli_dma;
-                }
-                if (next == chan->curr) {
-                        writel(buff->lli_dma, chan->regs + PL080_CH_LLI);
-                        chan->next = buff;
-                }
-                show_lli(endlli);
-                chan->end = buff;
-        } else {
-                pr_debug("enquing onto empty channel\n");
-                chan->curr = buff;
-                chan->next = buff;
-                chan->end = buff;
-                s3c64xx_lli_to_regs(chan, lli);
-        }
-        local_irq_restore(flags);
-        show_lli(lli);
-        dbg_showchan(chan);
-        dbg_showbuffs(chan);
-        return 0;
-err_buff:
-        kfree(buff);
-        return ret;
-}
-EXPORT_SYMBOL(s3c2410_dma_enqueue);
-int s3c2410_dma_devconfig(enum dma_ch channel,
-                          enum dma_data_direction source,
-                          unsigned long devaddr)
-{
-        struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);
-        u32 peripheral;
-        u32 config = 0;
-        pr_debug("%s: channel %d, source %d, dev %08lx, chan %p\n",
-                 __func__, channel, source, devaddr, chan);
-        WARN_ON(!chan);
-        if (!chan)
-                return -EINVAL;
-        peripheral = (chan->peripheral & 0xf);
-        chan->source = source;
-        chan->dev_addr = devaddr;
-        pr_debug("%s: peripheral %d\n", __func__, peripheral);
-        switch (source) {
-        case DMA_FROM_DEVICE:
-                config = 2 << PL080_CONFIG_FLOW_CONTROL_SHIFT;
-                config |= peripheral << PL080_CONFIG_SRC_SEL_SHIFT;
-                break;
-        case DMA_TO_DEVICE:
-                config = 1 << PL080_CONFIG_FLOW_CONTROL_SHIFT;
-                config |= peripheral << PL080_CONFIG_DST_SEL_SHIFT;
-                break;
-        default:
-                printk(KERN_ERR "%s: bad source\n", __func__);
-                return -EINVAL;
-        }
-        /* allow TC and ERR interrupts */
-        config |= PL080_CONFIG_TC_IRQ_MASK;
-        config |= PL080_CONFIG_ERR_IRQ_MASK;
-        pr_debug("%s: config %08x\n", __func__, config);
-        writel(config, chan->regs + PL080S_CH_CONFIG);
-        return 0;
-}
-EXPORT_SYMBOL(s3c2410_dma_devconfig);
-int s3c2410_dma_getposition(enum dma_ch channel,
-                            dma_addr_t *src, dma_addr_t *dst)
-{
-        struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);
-        WARN_ON(!chan);
-        if (!chan)
-                return -EINVAL;
-        if (src != NULL)
-                *src = readl(chan->regs + PL080_CH_SRC_ADDR);
-        if (dst != NULL)
-                *dst = readl(chan->regs + PL080_CH_DST_ADDR);
-        return 0;
-}
-EXPORT_SYMBOL(s3c2410_dma_getposition);
-/* s3c2410_request_dma
- *
- * get control of an dma channel
-*/
-int s3c2410_dma_request(enum dma_ch channel,
-                        struct s3c2410_dma_client *client,
-                        void *dev)
-{
-        struct s3c2410_dma_chan *chan;
-        unsigned long flags;
-        pr_debug("dma%d: s3c2410_request_dma: client=%s, dev=%p\n",
-                 channel, client->name, dev);
-        local_irq_save(flags);
-        chan = s3c64xx_dma_map_channel(channel);
-        if (chan == NULL) {
-                local_irq_restore(flags);
-                return -EBUSY;
-        }
-        dbg_showchan(chan);
-        chan->client = client;
-        chan->in_use = 1;
-        chan->peripheral = channel;
-        chan->flags = 0;
-        local_irq_restore(flags);
-        /* need to setup */
-        pr_debug("%s: channel initialised, %p\n", __func__, chan);
-        return chan->number | DMACH_LOW_LEVEL;
-}
-EXPORT_SYMBOL(s3c2410_dma_request);
-/* s3c2410_dma_free
- *
- * release the given channel back to the system, will stop and flush
- * any outstanding transfers, and ensure the channel is ready for the
- * next claimant.
- *
- * Note, although a warning is currently printed if the freeing client
- * info is not the same as the registrant's client info, the free is still
- * allowed to go through.
-*/
-int s3c2410_dma_free(enum dma_ch channel, struct s3c2410_dma_client *client)
-{
-        struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);
-        unsigned long flags;
-        if (chan == NULL)
-                return -EINVAL;
-        local_irq_save(flags);
-        if (chan->client != client) {
-                printk(KERN_WARNING "dma%d: possible free from different client (channel %p, passed %p)\n",
-                       channel, chan->client, client);
-        }
-        /* sort out stopping and freeing the channel */
-        chan->client = NULL;
-        chan->in_use = 0;
-        if (!(channel & DMACH_LOW_LEVEL))
-                s3c_dma_chan_map[channel] = NULL;
-        local_irq_restore(flags);
-        return 0;
-}
-EXPORT_SYMBOL(s3c2410_dma_free);
-static irqreturn_t s3c64xx_dma_irq(int irq, void *pw)
-{
-        struct s3c64xx_dmac *dmac = pw;
-        struct s3c2410_dma_chan *chan;
-        enum s3c2410_dma_buffresult res;
-        u32 tcstat, errstat;
-        u32 bit;
-        int offs;
-        tcstat = readl(dmac->regs + PL080_TC_STATUS);
-        errstat = readl(dmac->regs + PL080_ERR_STATUS);
-        for (offs = 0, bit = 1; offs < 8; offs++, bit <<= 1) {
-                struct s3c64xx_dma_buff *buff;
-                if (!(errstat & bit) && !(tcstat & bit))
-                        continue;
-                chan = dmac->channels + offs;
-                res = S3C2410_RES_ERR;
-                if (tcstat & bit) {
-                        writel(bit, dmac->regs + PL080_TC_CLEAR);
-                        res = S3C2410_RES_OK;
-                }
-                if (errstat & bit)
-                        writel(bit, dmac->regs + PL080_ERR_CLEAR);
-                /* 'next' points to the buffer that is next to the
-                 * currently active buffer.
-                 * For CIRCULAR queues, 'next' will be same as 'curr'
-                 * when 'end' is the active buffer.
-                 */
-                buff = chan->curr;
-                while (buff && buff != chan->next
-                                && buff->next != chan->next)
-                        buff = buff->next;
-                if (!buff)
-                        BUG();
-                if (buff == chan->next)
-                        buff = chan->end;
-                s3c64xx_dma_bufffdone(chan, buff, res);
-                /* Free the node and update curr, if non-circular queue */
-                if (!(chan->flags & S3C2410_DMAF_CIRCULAR)) {
-                        chan->curr = buff->next;
-                        s3c64xx_dma_freebuff(buff);
-                }
-                /* Update 'next' */
-                buff = chan->next;
-                if (chan->next == chan->end) {
-                        chan->next = chan->curr;
-                        if (!(chan->flags & S3C2410_DMAF_CIRCULAR))
-                                chan->end = NULL;
-                } else {
-                        chan->next = buff->next;
-                }
-        }
-        return IRQ_HANDLED;
-}
-static struct bus_type dma_subsys = {
-        .name           = "s3c64xx-dma",
-        .dev_name       = "s3c64xx-dma",
-};
-static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
-                             int irq, unsigned int base)
-{
-        struct s3c2410_dma_chan *chptr = &s3c2410_chans[chno];
-        struct s3c64xx_dmac *dmac;
-        char clkname[16];
-        void __iomem *regs;
-        void __iomem *regptr;
-        int err, ch;
-        dmac = kzalloc(sizeof(struct s3c64xx_dmac), GFP_KERNEL);
-        if (!dmac) {
-                printk(KERN_ERR "%s: failed to alloc mem\n", __func__);
-                return -ENOMEM;
-        }
-        dmac->dev.id = chno / 8;
-        dmac->dev.bus = &dma_subsys;
-        err = device_register(&dmac->dev);
-        if (err) {
-                printk(KERN_ERR "%s: failed to register device\n", __func__);
-                goto err_alloc;
-        }
-        regs = ioremap(base, 0x200);
-        if (!regs) {
-                printk(KERN_ERR "%s: failed to ioremap()\n", __func__);
-                err = -ENXIO;
-                goto err_dev;
-        }
-        snprintf(clkname, sizeof(clkname), "dma%d", dmac->dev.id);
-        dmac->clk = clk_get(NULL, clkname);
-        if (IS_ERR(dmac->clk)) {
-                printk(KERN_ERR "%s: failed to get clock %s\n", __func__, clkname);
-                err = PTR_ERR(dmac->clk);
-                goto err_map;
-        }
-        clk_prepare_enable(dmac->clk);
-        dmac->regs = regs;
-        dmac->chanbase = chbase;
-        dmac->channels = chptr;
-        err = request_irq(irq, s3c64xx_dma_irq, 0, "DMA", dmac);
-        if (err < 0) {
-                printk(KERN_ERR "%s: failed to get irq\n", __func__);
-                goto err_clk;
-        }
-        regptr = regs + PL080_Cx_BASE(0);
-        for (ch = 0; ch < 8; ch++, chptr++) {
-                pr_debug("%s: registering DMA %d (%p)\n",
-                         __func__, chno + ch, regptr);
-                chptr->bit = 1 << ch;
-                chptr->number = chno + ch;
-                chptr->dmac = dmac;
-                chptr->regs = regptr;
-                regptr += PL080_Cx_STRIDE;
-        }
-        /* for the moment, permanently enable the controller */
-        writel(PL080_CONFIG_ENABLE, regs + PL080_CONFIG);
-        printk(KERN_INFO "PL080: IRQ %d, at %p, channels %d..%d\n",
-               irq, regs, chno, chno+8);
-        return 0;
-err_clk:
-        clk_disable_unprepare(dmac->clk);
-        clk_put(dmac->clk);
-err_map:
-        iounmap(regs);
-err_dev:
-        device_unregister(&dmac->dev);
-err_alloc:
-        kfree(dmac);
-        return err;
-}
-static int __init s3c64xx_dma_init(void)
-{
-        int ret;
-        /* This driver is not supported when booting with device tree. */
-        if (of_have_populated_dt())
-                return -ENODEV;
-        printk(KERN_INFO "%s: Registering DMA channels\n", __func__);
-        dma_pool = dma_pool_create("DMA-LLI", NULL, sizeof(struct pl080s_lli), 16, 0);
-        if (!dma_pool) {
-                printk(KERN_ERR "%s: failed to create pool\n", __func__);
-                return -ENOMEM;
-        }
-        ret = subsys_system_register(&dma_subsys, NULL);
-        if (ret) {
-                printk(KERN_ERR "%s: failed to create subsys\n", __func__);
-                return -ENOMEM;
-        }
-        /* Set all DMA configuration to be DMA, not SDMA */
-        writel(0xffffff, S3C64XX_SDMA_SEL);
-        /* Register standard DMA controllers */
-        s3c64xx_dma_init1(0, DMACH_UART0, IRQ_DMA0, 0x75000000);
-        s3c64xx_dma_init1(8, DMACH_PCM1_TX, IRQ_DMA1, 0x75100000);
-        return 0;
-}
-arch_initcall(s3c64xx_dma_init);
diff --git a/arch/arm/mach-s3c64xx/include/mach/dma.h b/arch/arm/mach-s3c64xx/include/mach/dma.h
index fe1a98cf0e4c..059b1fc85037 100644
--- a/arch/arm/mach-s3c64xx/include/mach/dma.h
+++ b/arch/arm/mach-s3c64xx/include/mach/dma.h
@@ -11,51 +11,48 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H __FILE__
-#define S3C_DMA_CHANNELS        (16)
+#define S3C64XX_DMA_CHAN(name)          ((unsigned long)(name))
+/* DMA0/SDMA0 */
+#define DMACH_UART0             S3C64XX_DMA_CHAN("uart0_tx")
+#define DMACH_UART0_SRC2        S3C64XX_DMA_CHAN("uart0_rx")
+#define DMACH_UART1             S3C64XX_DMA_CHAN("uart1_tx")
+#define DMACH_UART1_SRC2        S3C64XX_DMA_CHAN("uart1_rx")
+#define DMACH_UART2             S3C64XX_DMA_CHAN("uart2_tx")
+#define DMACH_UART2_SRC2        S3C64XX_DMA_CHAN("uart2_rx")
+#define DMACH_UART3             S3C64XX_DMA_CHAN("uart3_tx")
+#define DMACH_UART3_SRC2        S3C64XX_DMA_CHAN("uart3_rx")
+#define DMACH_PCM0_TX           S3C64XX_DMA_CHAN("pcm0_tx")
+#define DMACH_PCM0_RX           S3C64XX_DMA_CHAN("pcm0_rx")
+#define DMACH_I2S0_OUT          S3C64XX_DMA_CHAN("i2s0_tx")
+#define DMACH_I2S0_IN           S3C64XX_DMA_CHAN("i2s0_rx")
+#define DMACH_SPI0_TX           S3C64XX_DMA_CHAN("spi0_tx")
+#define DMACH_SPI0_RX           S3C64XX_DMA_CHAN("spi0_rx")
+#define DMACH_HSI_I2SV40_TX     S3C64XX_DMA_CHAN("i2s2_tx")
+#define DMACH_HSI_I2SV40_RX     S3C64XX_DMA_CHAN("i2s2_rx")
+/* DMA1/SDMA1 */
+#define DMACH_PCM1_TX           S3C64XX_DMA_CHAN("pcm1_tx")
+#define DMACH_PCM1_RX           S3C64XX_DMA_CHAN("pcm1_rx")
+#define DMACH_I2S1_OUT          S3C64XX_DMA_CHAN("i2s1_tx")
+#define DMACH_I2S1_IN           S3C64XX_DMA_CHAN("i2s1_rx")
+#define DMACH_SPI1_TX           S3C64XX_DMA_CHAN("spi1_tx")
+#define DMACH_SPI1_RX           S3C64XX_DMA_CHAN("spi1_rx")
+#define DMACH_AC97_PCMOUT       S3C64XX_DMA_CHAN("ac97_out")
+#define DMACH_AC97_PCMIN        S3C64XX_DMA_CHAN("ac97_in")
+#define DMACH_AC97_MICIN        S3C64XX_DMA_CHAN("ac97_mic")
+#define DMACH_PWM               S3C64XX_DMA_CHAN("pwm")
+#define DMACH_IRDA              S3C64XX_DMA_CHAN("irda")
+#define DMACH_EXTERNAL          S3C64XX_DMA_CHAN("external")
+#define DMACH_SECURITY_RX       S3C64XX_DMA_CHAN("sec_rx")
+#define DMACH_SECURITY_TX       S3C64XX_DMA_CHAN("sec_tx")
-/* see mach-s3c2410/dma.h for notes on dma channel numbers */
-/* Note, for the S3C64XX architecture we keep the DMACH_
- * defines in the order they are allocated to [S]DMA0/[S]DMA1
- * so that is easy to do DHACH_ -> DMA controller conversion
- */
 enum dma_ch {
-        /* DMA0/SDMA0 */
+        DMACH_MAX = 32
-        DMACH_UART0 = 0,
+};
-        DMACH_UART0_SRC2,
-        DMACH_UART1,
-        DMACH_UART1_SRC2,
-        DMACH_UART2,
-        DMACH_UART2_SRC2,
-        DMACH_UART3,
-        DMACH_UART3_SRC2,
-        DMACH_PCM0_TX,
-        DMACH_PCM0_RX,
-        DMACH_I2S0_OUT,
-        DMACH_I2S0_IN,
-        DMACH_SPI0_TX,
-        DMACH_SPI0_RX,
-        DMACH_HSI_I2SV40_TX,
-        DMACH_HSI_I2SV40_RX,
-        /* DMA1/SDMA1 */
+struct s3c2410_dma_client {
-        DMACH_PCM1_TX = 16,
+        char    *name;
-        DMACH_PCM1_RX,
-        DMACH_I2S1_OUT,
-        DMACH_I2S1_IN,
-        DMACH_SPI1_TX,
-        DMACH_SPI1_RX,
-        DMACH_AC97_PCMOUT,
-        DMACH_AC97_PCMIN,
-        DMACH_AC97_MICIN,
-        DMACH_PWM,
-        DMACH_IRDA,
-        DMACH_EXTERNAL,
-        DMACH_RES1,
-        DMACH_RES2,
-        DMACH_SECURITY_RX,      /* SDMA1 only */
-        DMACH_SECURITY_TX,      /* SDMA1 only */
-        DMACH_MAX               /* the end */
 };
 static inline bool samsung_dma_has_circular(void)
@@ -65,67 +62,10 @@ static inline bool samsung_dma_has_circular(void)
 static inline bool samsung_dma_is_dmadev(void)
 {
-        return false;
+        return true;
 }
-#define S3C2410_DMAF_CIRCULAR           (1 << 0)
-#include <plat/dma.h>
-#define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */
-struct s3c64xx_dma_buff;
-/** s3c64xx_dma_buff - S3C64XX DMA buffer descriptor
- * @next: Pointer to next buffer in queue or ring.
- * @pw: Client provided identifier
- * @lli: Pointer to hardware descriptor this buffer is associated with.
- * @lli_dma: Hardare address of the descriptor.
- */
-struct s3c64xx_dma_buff {
-        struct s3c64xx_dma_buff *next;
-        void                    *pw;
-        struct pl080s_lli       *lli;
-        dma_addr_t               lli_dma;
-};
-struct s3c64xx_dmac;
-struct s3c2410_dma_chan {
-        unsigned char            number;      /* number of this dma channel */
-        unsigned char            in_use;      /* channel allocated */
-        unsigned char            bit;         /* bit for enable/disable/etc */
-        unsigned char            hw_width;
-        unsigned char            peripheral;
-        unsigned int             flags;
-        enum dma_data_direction  source;
-        dma_addr_t              dev_addr;
-        struct s3c2410_dma_client *client;
-        struct s3c64xx_dmac     *dmac;          /* pointer to controller */
-        void __iomem            *regs;
-        /* cdriver callbacks */
-        s3c2410_dma_cbfn_t       callback_fn;   /* buffer done callback */
-        s3c2410_dma_opfn_t       op_fn;         /* channel op callback */
-        /* buffer list and information */
-        struct s3c64xx_dma_buff *curr;          /* current dma buffer */
-        struct s3c64xx_dma_buff *next;          /* next buffer to load */
-        struct s3c64xx_dma_buff *end;           /* end of queue */
-        /* note, when channel is running in circular mode, curr is the
-         * first buffer enqueued, end is the last and curr is where the
-         * last buffer-done event is set-at. The buffers are not freed
-         * and the last buffer hardware descriptor points back to the
-         * first.
-         */
-};
-#include <plat/dma-core.h>
+#include <linux/amba/pl08x.h>
+#include <plat/dma-ops.h>
 #endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c b/arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c
index 7eb9a10fc1af..2fddf38192df 100644
--- a/arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c
+++ b/arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c
@@ -8,8 +8,6 @@
 * published by the Free Software Foundation.
 */
-#include <linux/clk-provider.h>
-#include <linux/irqchip.h>
 #include <linux/of_platform.h>
 #include <asm/mach/arch.h>
@@ -48,15 +46,9 @@ static void __init s3c64xx_dt_map_io(void)
                panic("SoC is not S3C64xx!");
 }
-static void __init s3c64xx_dt_init_irq(void)
-{
-        of_clk_init(NULL);
-        samsung_wdt_reset_of_init();
-        irqchip_init();
-};
 static void __init s3c64xx_dt_init_machine(void)
 {
+        samsung_wdt_reset_of_init();
        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 }
@@ -79,7 +71,6 @@ DT_MACHINE_START(S3C6400_DT, "Samsung S3C64xx (Flattened Device Tree)")
        /* Maintainer: Tomasz Figa <tomasz.figa@gmail.com> */
        .dt_compat      = s3c64xx_dt_compat,
        .map_io         = s3c64xx_dt_map_io,
-        .init_irq       = s3c64xx_dt_init_irq,
        .init_machine   = s3c64xx_dt_init_machine,
        .restart        = s3c64xx_dt_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/pl080.c b/arch/arm/mach-s3c64xx/pl080.c
new file mode 100644
index 000000000000..901a984bddc2
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/pl080.c
@@ -0,0 +1,244 @@
+/*
+ * Samsung's S3C64XX generic DMA support using amba-pl08x driver.
+ *
+ * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/amba/bus.h>
+#include <linux/amba/pl080.h>
+#include <linux/amba/pl08x.h>
+#include <linux/of.h>
+#include <mach/irqs.h>
+#include <mach/map.h>
+#include "regs-sys.h"
+static int pl08x_get_xfer_signal(const struct pl08x_channel_data *cd)
+{
+        return cd->min_signal;
+}
+static void pl08x_put_xfer_signal(const struct pl08x_channel_data *cd, int ch)
+{
+}
+/*
+ * DMA0
+ */
+static struct pl08x_channel_data s3c64xx_dma0_info[] = {
+        {
+                .bus_id = "uart0_tx",
+                .min_signal = 0,
+                .max_signal = 0,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "uart0_rx",
+                .min_signal = 1,
+                .max_signal = 1,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "uart1_tx",
+                .min_signal = 2,
+                .max_signal = 2,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "uart1_rx",
+                .min_signal = 3,
+                .max_signal = 3,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "uart2_tx",
+                .min_signal = 4,
+                .max_signal = 4,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "uart2_rx",
+                .min_signal = 5,
+                .max_signal = 5,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "uart3_tx",
+                .min_signal = 6,
+                .max_signal = 6,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "uart3_rx",
+                .min_signal = 7,
+                .max_signal = 7,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "pcm0_tx",
+                .min_signal = 8,
+                .max_signal = 8,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "pcm0_rx",
+                .min_signal = 9,
+                .max_signal = 9,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "i2s0_tx",
+                .min_signal = 10,
+                .max_signal = 10,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "i2s0_rx",
+                .min_signal = 11,
+                .max_signal = 11,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "spi0_tx",
+                .min_signal = 12,
+                .max_signal = 12,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "spi0_rx",
+                .min_signal = 13,
+                .max_signal = 13,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "i2s2_tx",
+                .min_signal = 14,
+                .max_signal = 14,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "i2s2_rx",
+                .min_signal = 15,
+                .max_signal = 15,
+                .periph_buses = PL08X_AHB2,
+        }
+};
+struct pl08x_platform_data s3c64xx_dma0_plat_data = {
+        .memcpy_channel = {
+                .bus_id = "memcpy",
+                .cctl_memcpy =
+                        (PL080_BSIZE_4 << PL080_CONTROL_SB_SIZE_SHIFT |
+                        PL080_BSIZE_4 << PL080_CONTROL_DB_SIZE_SHIFT |
+                        PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT |
+                        PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT |
+                        PL080_CONTROL_PROT_BUFF | PL080_CONTROL_PROT_CACHE |
+                        PL080_CONTROL_PROT_SYS),
+        },
+        .lli_buses = PL08X_AHB1,
+        .mem_buses = PL08X_AHB1,
+        .get_xfer_signal = pl08x_get_xfer_signal,
+        .put_xfer_signal = pl08x_put_xfer_signal,
+        .slave_channels = s3c64xx_dma0_info,
+        .num_slave_channels = ARRAY_SIZE(s3c64xx_dma0_info),
+};
+static AMBA_AHB_DEVICE(s3c64xx_dma0, "dma-pl080s.0", 0,
+                        0x75000000, {IRQ_DMA0}, &s3c64xx_dma0_plat_data);
+/*
+ * DMA1
+ */
+static struct pl08x_channel_data s3c64xx_dma1_info[] = {
+        {
+                .bus_id = "pcm1_tx",
+                .min_signal = 0,
+                .max_signal = 0,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "pcm1_rx",
+                .min_signal = 1,
+                .max_signal = 1,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "i2s1_tx",
+                .min_signal = 2,
+                .max_signal = 2,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "i2s1_rx",
+                .min_signal = 3,
+                .max_signal = 3,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "spi1_tx",
+                .min_signal = 4,
+                .max_signal = 4,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "spi1_rx",
+                .min_signal = 5,
+                .max_signal = 5,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "ac97_out",
+                .min_signal = 6,
+                .max_signal = 6,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "ac97_in",
+                .min_signal = 7,
+                .max_signal = 7,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "ac97_mic",
+                .min_signal = 8,
+                .max_signal = 8,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "pwm",
+                .min_signal = 9,
+                .max_signal = 9,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "irda",
+                .min_signal = 10,
+                .max_signal = 10,
+                .periph_buses = PL08X_AHB2,
+        }, {
+                .bus_id = "external",
+                .min_signal = 11,
+                .max_signal = 11,
+                .periph_buses = PL08X_AHB2,
+        },
+};
+struct pl08x_platform_data s3c64xx_dma1_plat_data = {
+        .memcpy_channel = {
+                .bus_id = "memcpy",
+                .cctl_memcpy =
+                        (PL080_BSIZE_4 << PL080_CONTROL_SB_SIZE_SHIFT |
+                        PL080_BSIZE_4 << PL080_CONTROL_DB_SIZE_SHIFT |
+                        PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT |
+                        PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT |
+                        PL080_CONTROL_PROT_BUFF | PL080_CONTROL_PROT_CACHE |
+                        PL080_CONTROL_PROT_SYS),
+        },
+        .lli_buses = PL08X_AHB1,
+        .mem_buses = PL08X_AHB1,
+        .get_xfer_signal = pl08x_get_xfer_signal,
+        .put_xfer_signal = pl08x_put_xfer_signal,
+        .slave_channels = s3c64xx_dma1_info,
+        .num_slave_channels = ARRAY_SIZE(s3c64xx_dma1_info),
+};
+static AMBA_AHB_DEVICE(s3c64xx_dma1, "dma-pl080s.1", 0,
+                        0x75100000, {IRQ_DMA1}, &s3c64xx_dma1_plat_data);
+static int __init s3c64xx_pl080_init(void)
+{
+        /* Set all DMA configuration to be DMA, not SDMA */
+        writel(0xffffff, S3C64XX_SDMA_SEL);
+        if (of_have_populated_dt())
+                return 0;
+        amba_device_register(&s3c64xx_dma0_device, &iomem_resource);
+        amba_device_register(&s3c64xx_dma1_device, &iomem_resource);
+        return 0;
+}
+arch_initcall(s3c64xx_pl080_init);
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index 958e3cbf0ac2..c18689123023 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -614,6 +614,11 @@ static struct regulator_consumer_supply fixed3v3_power_consumers[] = {
        REGULATOR_SUPPLY("vqmmc", "sh_mmcif"),
 };
+/* Fixed 3.3V regulator used by LCD backlight */
+static struct regulator_consumer_supply fixed5v0_power_consumers[] = {
+        REGULATOR_SUPPLY("power", "pwm-backlight.0"),
+};
 /* Fixed 3.3V regulator to be used by SDHI0 */
 static struct regulator_consumer_supply vcc_sdhi0_consumers[] = {
        REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
@@ -1196,6 +1201,8 @@ static void __init eva_init(void)
        regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
                                     ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
+        regulator_register_always_on(3, "fixed-5.0V", fixed5v0_power_consumers,
+                                     ARRAY_SIZE(fixed5v0_power_consumers), 5000000);
        pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map));
        pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
index 38611526fe9a..3c4995aebd22 100644
--- a/arch/arm/mach-shmobile/board-bockw.c
+++ b/arch/arm/mach-shmobile/board-bockw.c
@@ -679,7 +679,7 @@ static void __init bockw_init(void)
                        .id             = i,
                        .data           = &rsnd_card_info[i],
                        .size_data      = sizeof(struct asoc_simple_card_info),
-                        .dma_mask       = ~0,
+                        .dma_mask       = DMA_BIT_MASK(32),
                };
                platform_device_register_full(&cardinfo);
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index a8d3ce646fb9..e0406fd37390 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -245,7 +245,9 @@ static void __init lager_init(void)
 {
        lager_add_standard_devices();
-        phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup);
+        if (IS_ENABLED(CONFIG_PHYLIB))
+                phy_register_fixup_for_id("r8a7790-ether-ff:01",
+                                          lager_ksz8041_fixup);
 }
 static const char * const lager_boards_compat_dt[] __initconst = {
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 037100a1563a..aee77f06f887 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -10,6 +10,7 @@ config ARCH_SOCFPGA
        select GENERIC_CLOCKEVENTS
        select GPIO_PL061 if GPIOLIB
        select HAVE_ARM_SCU
+        select HAVE_ARM_TWD if SMP
        select HAVE_SMP
        select MFD_SYSCON
        select SPARSE_IRQ
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c
index d4639c506622..3a9c1f1c219d 100644
--- a/arch/arm/mach-tegra/fuse.c
+++ b/arch/arm/mach-tegra/fuse.c
@@ -198,10 +198,12 @@ void __init tegra_init_fuse(void)
        switch (tegra_chip_id) {
        case TEGRA20:
                tegra20_fuse_init_randomness();
+                break;
        case TEGRA30:
        case TEGRA114:
        default:
                tegra30_fuse_init_randomness();
+                break;
        }
        pr_info("Tegra Revision: %s SKU: %d CPU Process: %d Core Process: %d\n",
@@ -209,13 +211,3 @@ void __init tegra_init_fuse(void)
                tegra_sku_id, tegra_cpu_process_id,
                tegra_core_process_id);
 }
-unsigned long long tegra_chip_uid(void)
-{
-        unsigned long long lo, hi;
-        lo = tegra_fuse_readl(FUSE_UID_LOW);
-        hi = tegra_fuse_readl(FUSE_UID_HIGH);
-        return (hi << 32ull) | lo;
-}
-EXPORT_SYMBOL(tegra_chip_uid);
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 2e85c1e72535..12c7e5c03ea4 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -140,6 +140,10 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
        /* Requires call-back bindings. */
        OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
        /* Requires DMA bindings. */
+        OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0",  &mop500_sdi0_data),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1",  &mop500_sdi1_data),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2",  &mop500_sdi2_data),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4",  &mop500_sdi4_data),
        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
                       "ux500-msp-i2s.0", &msp0_platform_data),
        OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
diff --git a/arch/arm/mach-vexpress/spc.c b/arch/arm/mach-vexpress/spc.c
index 033d34dcbd3f..c26ef5b92ca7 100644
--- a/arch/arm/mach-vexpress/spc.c
+++ b/arch/arm/mach-vexpress/spc.c
@@ -53,6 +53,11 @@
 #define A15_BX_ADDR0            0x68
 #define A7_BX_ADDR0             0x78
+/* SPC CPU/cluster reset statue */
+#define STANDBYWFI_STAT         0x3c
+#define STANDBYWFI_STAT_A15_CPU_MASK(cpu)       (1 << (cpu))
+#define STANDBYWFI_STAT_A7_CPU_MASK(cpu)        (1 << (3 + (cpu)))
 /* SPC system config interface registers */
 #define SYSCFG_WDATA            0x70
 #define SYSCFG_RDATA            0x74
@@ -213,6 +218,41 @@ void ve_spc_powerdown(u32 cluster, bool enable)
        writel_relaxed(enable, info->baseaddr + pwdrn_reg);
 }
+static u32 standbywfi_cpu_mask(u32 cpu, u32 cluster)
+{
+        return cluster_is_a15(cluster) ?
+                  STANDBYWFI_STAT_A15_CPU_MASK(cpu)
+                : STANDBYWFI_STAT_A7_CPU_MASK(cpu);
+}
+/**
+ * ve_spc_cpu_in_wfi(u32 cpu, u32 cluster)
+ *
+ * @cpu: mpidr[7:0] bitfield describing CPU affinity level within cluster
+ * @cluster: mpidr[15:8] bitfield describing cluster affinity level
+ *
+ * @return: non-zero if and only if the specified CPU is in WFI
+ *
+ * Take care when interpreting the result of this function: a CPU might
+ * be in WFI temporarily due to idle, and is not necessarily safely
+ * parked.
+ */
+int ve_spc_cpu_in_wfi(u32 cpu, u32 cluster)
+{
+        int ret;
+        u32 mask = standbywfi_cpu_mask(cpu, cluster);
+        if (cluster >= MAX_CLUSTERS)
+                return 1;
+        ret = readl_relaxed(info->baseaddr + STANDBYWFI_STAT);
+        pr_debug("%s: PCFGREG[0x%X] = 0x%08X, mask = 0x%X\n",
+                 __func__, STANDBYWFI_STAT, ret, mask);
+        return ret & mask;
+}
 static int ve_spc_get_performance(int cluster, u32 *freq)
 {
        struct ve_spc_opp *opps = info->opps[cluster];
diff --git a/arch/arm/mach-vexpress/spc.h b/arch/arm/mach-vexpress/spc.h
index dbd44c3720f9..793d065243b9 100644
--- a/arch/arm/mach-vexpress/spc.h
+++ b/arch/arm/mach-vexpress/spc.h
@@ -20,5 +20,6 @@ void ve_spc_global_wakeup_irq(bool set);
 void ve_spc_cpu_wakeup_irq(u32 cluster, u32 cpu, bool set);
 void ve_spc_set_resume_addr(u32 cluster, u32 cpu, u32 addr);
 void ve_spc_powerdown(u32 cluster, bool enable);
+int ve_spc_cpu_in_wfi(u32 cpu, u32 cluster);
 #endif
diff --git a/arch/arm/mach-vexpress/tc2_pm.c b/arch/arm/mach-vexpress/tc2_pm.c
index 05a364c5077a..29e7785a54bc 100644
--- a/arch/arm/mach-vexpress/tc2_pm.c
+++ b/arch/arm/mach-vexpress/tc2_pm.c
@@ -12,6 +12,7 @@
 * published by the Free Software Foundation.
 */
+#include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
@@ -32,11 +33,17 @@
 #include "spc.h"
 /* SCC conf registers */
+#define RESET_CTRL              0x018
+#define RESET_A15_NCORERESET(cpu)       (1 << (2 + (cpu)))
+#define RESET_A7_NCORERESET(cpu)        (1 << (16 + (cpu)))
 #define A15_CONF                0x400
 #define A7_CONF                 0x500
 #define SYS_INFO                0x700
 #define SPC_BASE                0xb00
+static void __iomem *scc;
 /*
 * We can't use regular spinlocks. In the switcher case, it is possible
 * for an outbound CPU to call power_down() after its inbound counterpart
@@ -190,6 +197,55 @@ static void tc2_pm_power_down(void)
        tc2_pm_down(0);
 }
+static int tc2_core_in_reset(unsigned int cpu, unsigned int cluster)
+{
+        u32 mask = cluster ?
+                  RESET_A7_NCORERESET(cpu)
+                : RESET_A15_NCORERESET(cpu);
+        return !(readl_relaxed(scc + RESET_CTRL) & mask);
+}
+#define POLL_MSEC 10
+#define TIMEOUT_MSEC 1000
+static int tc2_pm_power_down_finish(unsigned int cpu, unsigned int cluster)
+{
+        unsigned tries;
+        pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
+        BUG_ON(cluster >= TC2_CLUSTERS || cpu >= TC2_MAX_CPUS_PER_CLUSTER);
+        for (tries = 0; tries < TIMEOUT_MSEC / POLL_MSEC; ++tries) {
+                /*
+                 * Only examine the hardware state if the target CPU has
+                 * caught up at least as far as tc2_pm_down():
+                 */
+                if (ACCESS_ONCE(tc2_pm_use_count[cpu][cluster]) == 0) {
+                        pr_debug("%s(cpu=%u, cluster=%u): RESET_CTRL = 0x%08X\n",
+                                 __func__, cpu, cluster,
+                                 readl_relaxed(scc + RESET_CTRL));
+                        /*
+                         * We need the CPU to reach WFI, but the power
+                         * controller may put the cluster in reset and
+                         * power it off as soon as that happens, before
+                         * we have a chance to see STANDBYWFI.
+                         *
+                         * So we need to check for both conditions:
+                         */
+                        if (tc2_core_in_reset(cpu, cluster) ||
+                            ve_spc_cpu_in_wfi(cpu, cluster))
+                                return 0; /* success: the CPU is halted */
+                }
+                /* Otherwise, wait and retry: */
+                msleep(POLL_MSEC);
+        }
+        return -ETIMEDOUT; /* timeout */
+}
 static void tc2_pm_suspend(u64 residency)
 {
        unsigned int mpidr, cpu, cluster;
@@ -232,10 +288,11 @@ static void tc2_pm_powered_up(void)
 }
 static const struct mcpm_platform_ops tc2_pm_power_ops = {
-        .power_up       = tc2_pm_power_up,
+        .power_up               = tc2_pm_power_up,
-        .power_down     = tc2_pm_power_down,
+        .power_down             = tc2_pm_power_down,
-        .suspend        = tc2_pm_suspend,
+        .power_down_finish      = tc2_pm_power_down_finish,
-        .powered_up     = tc2_pm_powered_up,
+        .suspend                = tc2_pm_suspend,
+        .powered_up             = tc2_pm_powered_up,
 };
 static bool __init tc2_pm_usage_count_init(void)
@@ -269,7 +326,6 @@ static void __naked tc2_pm_power_up_setup(unsigned int affinity_level)
 static int __init tc2_pm_init(void)
 {
        int ret, irq;
-        void __iomem *scc;
        u32 a15_cluster_id, a7_cluster_id, sys_info;
        struct device_node *np;
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 79f8b39801a8..f61a5707823a 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -9,6 +9,7 @@
 *
 *  DMA uncached mapping support.
 */
+#include <linux/bootmem.h>
 #include <linux/module.h>
 #include <linux/mm.h>
 #include <linux/gfp.h>
@@ -157,6 +158,44 @@ struct dma_map_ops arm_coherent_dma_ops = {
 };
 EXPORT_SYMBOL(arm_coherent_dma_ops);
+static int __dma_supported(struct device *dev, u64 mask, bool warn)
+{
+        unsigned long max_dma_pfn;
+        /*
+         * If the mask allows for more memory than we can address,
+         * and we actually have that much memory, then we must
+         * indicate that DMA to this device is not supported.
+         */
+        if (sizeof(mask) != sizeof(dma_addr_t) &&
+            mask > (dma_addr_t)~0 &&
+            dma_to_pfn(dev, ~0) < max_pfn) {
+                if (warn) {
+                        dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
+                                 mask);
+                        dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
+                }
+                return 0;
+        }
+        max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);
+        /*
+         * Translate the device's DMA mask to a PFN limit.  This
+         * PFN number includes the page which we can DMA to.
+         */
+        if (dma_to_pfn(dev, mask) < max_dma_pfn) {
+                if (warn)
+                        dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
+                                 mask,
+                                 dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
+                                 max_dma_pfn + 1);
+                return 0;
+        }
+        return 1;
+}
 static u64 get_coherent_dma_mask(struct device *dev)
 {
        u64 mask = (u64)DMA_BIT_MASK(32);
@@ -173,32 +212,8 @@ static u64 get_coherent_dma_mask(struct device *dev)
                        return 0;
                }
-                /*
+                if (!__dma_supported(dev, mask, true))
-                 * If the mask allows for more memory than we can address,
-                 * and we actually have that much memory, then fail the
-                 * allocation.
-                 */
-                if (sizeof(mask) != sizeof(dma_addr_t) &&
-                    mask > (dma_addr_t)~0 &&
-                    dma_to_pfn(dev, ~0) > arm_dma_pfn_limit) {
-                        dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
-                                 mask);
-                        dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
-                        return 0;
-                }
-                /*
-                 * Now check that the mask, when translated to a PFN,
-                 * fits within the allowable addresses which we can
-                 * allocate.
-                 */
-                if (dma_to_pfn(dev, mask) < arm_dma_pfn_limit) {
-                        dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
-                                 mask,
-                                 dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
-                                 arm_dma_pfn_limit + 1);
                        return 0;
-                }
        }
        return mask;
@@ -1027,28 +1042,7 @@ void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
 */
 int dma_supported(struct device *dev, u64 mask)
 {
-        unsigned long limit;
+        return __dma_supported(dev, mask, false);
-        /*
-         * If the mask allows for more memory than we can address,
-         * and we actually have that much memory, then we must
-         * indicate that DMA to this device is not supported.
-         */
-        if (sizeof(mask) != sizeof(dma_addr_t) &&
-            mask > (dma_addr_t)~0 &&
-            dma_to_pfn(dev, ~0) > arm_dma_pfn_limit)
-                return 0;
-        /*
-         * Translate the device's DMA mask to a PFN limit.  This
-         * PFN number includes the page which we can DMA to.
-         */
-        limit = dma_to_pfn(dev, mask);
-        if (limit < arm_dma_pfn_limit)
-                return 0;
-        return 1;
 }
 EXPORT_SYMBOL(dma_supported);
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 3e8f106ee5fe..1f7b19a47060 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -229,7 +229,7 @@ void __init setup_dma_zone(const struct machine_desc *mdesc)
 #ifdef CONFIG_ZONE_DMA
        if (mdesc->dma_zone_size) {
                arm_dma_zone_size = mdesc->dma_zone_size;
-                arm_dma_limit = PHYS_OFFSET + arm_dma_zone_size - 1;
+                arm_dma_limit = __pv_phys_offset + arm_dma_zone_size - 1;
        } else
                arm_dma_limit = 0xffffffff;
        arm_dma_pfn_limit = arm_dma_limit >> PAGE_SHIFT;
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index d27158c38eb0..5e85ed371364 100644
--- a/arch/arm/mm/mmap.c
+++ b/arch/arm/mm/mmap.c
@@ -146,7 +146,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
        info.flags = VM_UNMAPPED_AREA_TOPDOWN;
        info.length = len;
-        info.low_limit = PAGE_SIZE;
+        info.low_limit = FIRST_USER_ADDRESS;
        info.high_limit = mm->mmap_base;
        info.align_mask = do_align ? (PAGE_MASK & (SHMLBA - 1)) : 0;
        info.align_offset = pgoff << PAGE_SHIFT;
diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c
index 0acb089d0f70..1046b373d1ae 100644
--- a/arch/arm/mm/pgd.c
+++ b/arch/arm/mm/pgd.c
@@ -87,7 +87,8 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
                init_pud = pud_offset(init_pgd, 0);
                init_pmd = pmd_offset(init_pud, 0);
                init_pte = pte_offset_map(init_pmd, 0);
-                set_pte_ext(new_pte, *init_pte, 0);
+                set_pte_ext(new_pte + 0, init_pte[0], 0);
+                set_pte_ext(new_pte + 1, init_pte[1], 0);
                pte_unmap(init_pte);
                pte_unmap(new_pte);
        }
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index fb92abb91628..2861b155485a 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -336,8 +336,11 @@ static inline void __omap_dm_timer_enable_posted(struct omap_dm_timer *timer)
        if (timer->posted)
                return;
-        if (timer->errata & OMAP_TIMER_ERRATA_I103_I767)
+        if (timer->errata & OMAP_TIMER_ERRATA_I103_I767) {
+                timer->posted = OMAP_TIMER_NONPOSTED;
+                __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG, 0, 0);
                return;
+        }
        __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG,
                              OMAP_TIMER_CTRL_POSTED, 0);
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 99a3590f0349..ac07e871f6a7 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -1468,6 +1468,8 @@ void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
        pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
 #if defined(CONFIG_PL330_DMA)
        pd.filter = pl330_filter;
+#elif defined(CONFIG_S3C64XX_PL080)
+        pd.filter = pl08x_filter_id;
 #elif defined(CONFIG_S3C24XX_DMAC)
        pd.filter = s3c24xx_dma_filter;
 #endif
@@ -1509,8 +1511,10 @@ void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
        pd.num_cs = num_cs;
        pd.src_clk_nr = src_clk_nr;
        pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
-#ifdef CONFIG_PL330_DMA
+#if defined(CONFIG_PL330_DMA)
        pd.filter = pl330_filter;
+#elif defined(CONFIG_S3C64XX_PL080)
+        pd.filter = pl08x_filter_id;
 #endif
        s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
@@ -1550,8 +1554,10 @@ void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
        pd.num_cs = num_cs;
        pd.src_clk_nr = src_clk_nr;
        pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
-#ifdef CONFIG_PL330_DMA
+#if defined(CONFIG_PL330_DMA)
        pd.filter = pl330_filter;
+#elif defined(CONFIG_S3C64XX_PL080)
+        pd.filter = pl08x_filter_id;
 #endif
        s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c
index ec0d731b0e7b..886326ee6f6c 100644
--- a/arch/arm/plat-samsung/dma-ops.c
+++ b/arch/arm/plat-samsung/dma-ops.c
@@ -18,6 +18,12 @@
 #include <mach/dma.h>
+#if defined(CONFIG_PL330_DMA)
+#define dma_filter pl330_filter
+#elif defined(CONFIG_S3C64XX_PL080)
+#define dma_filter pl08x_filter_id
+#endif
 static unsigned samsung_dmadev_request(enum dma_ch dma_ch,
                                struct samsung_dma_req *param,
                                struct device *dev, char *ch_name)
@@ -30,7 +36,7 @@ static unsigned samsung_dmadev_request(enum dma_ch dma_ch,
        if (dev->of_node)
                return (unsigned)dma_request_slave_channel(dev, ch_name);
        else
-                return (unsigned)dma_request_channel(mask, pl330_filter,
+                return (unsigned)dma_request_channel(mask, dma_filter,
                                                        (void *)dma_ch);
 }
diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c
index 83e4f959ee47..85501238b425 100644
--- a/arch/arm/xen/enlighten.c
+++ b/arch/arm/xen/enlighten.c
@@ -96,7 +96,7 @@ static int remap_pte_fn(pte_t *ptep, pgtable_t token, unsigned long addr,
        struct remap_data *info = data;
        struct page *page = info->pages[info->index++];
        unsigned long pfn = page_to_pfn(page);
-        pte_t pte = pfn_pte(pfn, info->prot);
+        pte_t pte = pte_mkspecial(pfn_pte(pfn, info->prot));
        if (map_foreign_page(pfn, info->fgmfn, info->domid))
                return -EFAULT;
@@ -224,10 +224,10 @@ static int __init xen_guest_init(void)
        }
        if (of_address_to_resource(node, GRANT_TABLE_PHYSADDR, &res))
                return 0;
-        xen_hvm_resume_frames = res.start >> PAGE_SHIFT;
+        xen_hvm_resume_frames = res.start;
        xen_events_irq = irq_of_parse_and_map(node, 0);
        pr_info("Xen %s support found, events_irq=%d gnttab_frame_pfn=%lx\n",
-                        version, xen_events_irq, xen_hvm_resume_frames);
+                        version, xen_events_irq, (xen_hvm_resume_frames >> PAGE_SHIFT));
        xen_domain_type = XEN_HVM_DOMAIN;
        xen_setup_features();
diff --git a/arch/arm/xen/p2m.c b/arch/arm/xen/p2m.c
index 23732cdff551..b31ee1b275b0 100644
--- a/arch/arm/xen/p2m.c
+++ b/arch/arm/xen/p2m.c
@@ -25,8 +25,9 @@ struct xen_p2m_entry {
        struct rb_node rbnode_phys;
 };
-rwlock_t p2m_lock;
+static rwlock_t p2m_lock;
 struct rb_root phys_to_mach = RB_ROOT;
+EXPORT_SYMBOL_GPL(phys_to_mach);
 static struct rb_root mach_to_phys = RB_ROOT;
 static int xen_add_phys_to_mach_entry(struct xen_p2m_entry *new)
@@ -200,7 +201,7 @@ bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn)
 }
 EXPORT_SYMBOL_GPL(__set_phys_to_machine);
-int p2m_init(void)
+static int p2m_init(void)
 {
        rwlock_init(&p2m_lock);
        return 0;