diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/plat-s3c/include/plat/pm.h | 27 | ||||
-rw-r--r-- | arch/arm/plat-s3c/pm.c | 211 | ||||
-rw-r--r-- | arch/arm/plat-s3c24xx/include/plat/pm-core.h | 59 | ||||
-rw-r--r-- | arch/arm/plat-s3c24xx/pm.c | 224 |
4 files changed, 311 insertions, 210 deletions
diff --git a/arch/arm/plat-s3c/include/plat/pm.h b/arch/arm/plat-s3c/include/plat/pm.h index 95c2612d4976..42c75e6d2ba5 100644 --- a/arch/arm/plat-s3c/include/plat/pm.h +++ b/arch/arm/plat-s3c/include/plat/pm.h | |||
@@ -113,3 +113,30 @@ extern void s3c_pm_check_store(void); | |||
113 | #define s3c_pm_check_restore() do { } while(0) | 113 | #define s3c_pm_check_restore() do { } while(0) |
114 | #define s3c_pm_check_store() do { } while(0) | 114 | #define s3c_pm_check_store() do { } while(0) |
115 | #endif | 115 | #endif |
116 | |||
117 | /** | ||
118 | * s3c_pm_configure_extint() - ensure pins are correctly set for IRQ | ||
119 | * | ||
120 | * Setup all the necessary GPIO pins for waking the system on external | ||
121 | * interrupt. | ||
122 | */ | ||
123 | extern void s3c_pm_configure_extint(void); | ||
124 | |||
125 | /** | ||
126 | * s3c_pm_restore_gpios() - restore the state of the gpios after sleep. | ||
127 | * | ||
128 | * Restore the state of the GPIO pins after sleep, which may involve ensuring | ||
129 | * that we do not glitch the state of the pins from that the bootloader's | ||
130 | * resume code has done. | ||
131 | */ | ||
132 | extern void s3c_pm_restore_gpios(void); | ||
133 | |||
134 | /** | ||
135 | * s3c_pm_save_gpios() - save the state of the GPIOs for restoring after sleep. | ||
136 | * | ||
137 | * Save the GPIO states for resotration on resume. See s3c_pm_restore_gpios(). | ||
138 | */ | ||
139 | extern void s3c_pm_save_gpios(void); | ||
140 | |||
141 | extern void s3c_pm_save_core(void); | ||
142 | extern void s3c_pm_restore_core(void); | ||
diff --git a/arch/arm/plat-s3c/pm.c b/arch/arm/plat-s3c/pm.c index 122e9b91a7f4..fea58bea973d 100644 --- a/arch/arm/plat-s3c/pm.c +++ b/arch/arm/plat-s3c/pm.c | |||
@@ -15,14 +15,32 @@ | |||
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/suspend.h> | 16 | #include <linux/suspend.h> |
17 | #include <linux/errno.h> | 17 | #include <linux/errno.h> |
18 | #include <linux/delay.h> | ||
19 | #include <linux/serial_core.h> | ||
18 | #include <linux/io.h> | 20 | #include <linux/io.h> |
19 | 21 | ||
22 | #include <asm/cacheflush.h> | ||
23 | #include <mach/hardware.h> | ||
24 | |||
25 | #include <plat/regs-serial.h> | ||
26 | #include <mach/regs-clock.h> | ||
27 | #include <mach/regs-gpio.h> | ||
28 | #include <mach/regs-mem.h> | ||
29 | #include <mach/regs-irq.h> | ||
30 | |||
20 | #include <plat/pm.h> | 31 | #include <plat/pm.h> |
32 | #include <plat/pm-core.h> | ||
21 | 33 | ||
22 | /* for external use */ | 34 | /* for external use */ |
23 | 35 | ||
24 | unsigned long s3c_pm_flags; | 36 | unsigned long s3c_pm_flags; |
25 | 37 | ||
38 | /* Debug code: | ||
39 | * | ||
40 | * This code supports debug output to the low level UARTs for use on | ||
41 | * resume before the console layer is available. | ||
42 | */ | ||
43 | |||
26 | #ifdef CONFIG_S3C2410_PM_DEBUG | 44 | #ifdef CONFIG_S3C2410_PM_DEBUG |
27 | extern void printascii(const char *); | 45 | extern void printascii(const char *); |
28 | 46 | ||
@@ -37,8 +55,51 @@ void s3c_pm_dbg(const char *fmt, ...) | |||
37 | 55 | ||
38 | printascii(buff); | 56 | printascii(buff); |
39 | } | 57 | } |
58 | |||
59 | static inline void s3c_pm_debug_init(void) | ||
60 | { | ||
61 | /* restart uart clocks so we can use them to output */ | ||
62 | s3c_pm_debug_init_uart(); | ||
63 | } | ||
64 | |||
65 | #else | ||
66 | #define s3c_pm_debug_init() do { } while(0) | ||
67 | |||
40 | #endif /* CONFIG_S3C2410_PM_DEBUG */ | 68 | #endif /* CONFIG_S3C2410_PM_DEBUG */ |
41 | 69 | ||
70 | /* Save the UART configurations if we are configured for debug. */ | ||
71 | |||
72 | #ifdef CONFIG_S3C2410_PM_DEBUG | ||
73 | |||
74 | #define SAVE_UART(va) \ | ||
75 | SAVE_ITEM((va) + S3C2410_ULCON), \ | ||
76 | SAVE_ITEM((va) + S3C2410_UCON), \ | ||
77 | SAVE_ITEM((va) + S3C2410_UFCON), \ | ||
78 | SAVE_ITEM((va) + S3C2410_UMCON), \ | ||
79 | SAVE_ITEM((va) + S3C2410_UBRDIV) | ||
80 | |||
81 | static struct sleep_save uart_save[] = { | ||
82 | SAVE_UART(S3C_VA_UART0), | ||
83 | SAVE_UART(S3C_VA_UART1), | ||
84 | #ifndef CONFIG_CPU_S3C2400 | ||
85 | SAVE_UART(S3C_VA_UART2), | ||
86 | #endif | ||
87 | }; | ||
88 | |||
89 | static void s3c_pm_save_uart(void) | ||
90 | { | ||
91 | s3c_pm_do_save(uart_save, ARRAY_SIZE(uart_save)); | ||
92 | } | ||
93 | |||
94 | static void s3c_pm_restore_uart(void) | ||
95 | { | ||
96 | s3c_pm_do_restore(uart_save, ARRAY_SIZE(uart_save)); | ||
97 | } | ||
98 | #else | ||
99 | static void s3c_pm_save_uart(void) { } | ||
100 | static void s3c_pm_restore_uart(void) { } | ||
101 | #endif | ||
102 | |||
42 | 103 | ||
43 | /* helper functions to save and restore register state */ | 104 | /* helper functions to save and restore register state */ |
44 | 105 | ||
@@ -95,3 +156,153 @@ void s3c_pm_do_restore_core(struct sleep_save *ptr, int count) | |||
95 | for (; count > 0; count--, ptr++) | 156 | for (; count > 0; count--, ptr++) |
96 | __raw_writel(ptr->val, ptr->reg); | 157 | __raw_writel(ptr->val, ptr->reg); |
97 | } | 158 | } |
159 | |||
160 | /* s3c2410_pm_show_resume_irqs | ||
161 | * | ||
162 | * print any IRQs asserted at resume time (ie, we woke from) | ||
163 | */ | ||
164 | static void s3c_pm_show_resume_irqs(int start, unsigned long which, | ||
165 | unsigned long mask) | ||
166 | { | ||
167 | int i; | ||
168 | |||
169 | which &= ~mask; | ||
170 | |||
171 | for (i = 0; i <= 31; i++) { | ||
172 | if (which & (1L<<i)) { | ||
173 | S3C_PMDBG("IRQ %d asserted at resume\n", start+i); | ||
174 | } | ||
175 | } | ||
176 | } | ||
177 | |||
178 | |||
179 | void (*pm_cpu_prep)(void); | ||
180 | void (*pm_cpu_sleep)(void); | ||
181 | |||
182 | #define any_allowed(mask, allow) (((mask) & (allow)) != (allow)) | ||
183 | |||
184 | /* s3c_pm_enter | ||
185 | * | ||
186 | * central control for sleep/resume process | ||
187 | */ | ||
188 | |||
189 | static int s3c_pm_enter(suspend_state_t state) | ||
190 | { | ||
191 | unsigned long regs_save[16]; | ||
192 | |||
193 | /* ensure the debug is initialised (if enabled) */ | ||
194 | |||
195 | s3c_pm_debug_init(); | ||
196 | |||
197 | S3C_PMDBG("%s(%d)\n", __func__, state); | ||
198 | |||
199 | if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) { | ||
200 | printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__); | ||
201 | return -EINVAL; | ||
202 | } | ||
203 | |||
204 | /* check if we have anything to wake-up with... bad things seem | ||
205 | * to happen if you suspend with no wakeup (system will often | ||
206 | * require a full power-cycle) | ||
207 | */ | ||
208 | |||
209 | if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) && | ||
210 | !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) { | ||
211 | printk(KERN_ERR "%s: No wake-up sources!\n", __func__); | ||
212 | printk(KERN_ERR "%s: Aborting sleep\n", __func__); | ||
213 | return -EINVAL; | ||
214 | } | ||
215 | |||
216 | /* prepare check area if configured */ | ||
217 | |||
218 | s3c_pm_check_prepare(); | ||
219 | |||
220 | /* store the physical address of the register recovery block */ | ||
221 | |||
222 | s3c_sleep_save_phys = virt_to_phys(regs_save); | ||
223 | |||
224 | S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys); | ||
225 | |||
226 | /* save all necessary core registers not covered by the drivers */ | ||
227 | |||
228 | s3c_pm_save_gpios(); | ||
229 | s3c_pm_save_uart(); | ||
230 | s3c_pm_save_core(); | ||
231 | |||
232 | /* set the irq configuration for wake */ | ||
233 | |||
234 | s3c_pm_configure_extint(); | ||
235 | |||
236 | S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n", | ||
237 | s3c_irqwake_intmask, s3c_irqwake_eintmask); | ||
238 | |||
239 | s3c_pm_arch_prepare_irqs(); | ||
240 | |||
241 | /* call cpu specific preparation */ | ||
242 | |||
243 | pm_cpu_prep(); | ||
244 | |||
245 | /* flush cache back to ram */ | ||
246 | |||
247 | flush_cache_all(); | ||
248 | |||
249 | s3c_pm_check_store(); | ||
250 | |||
251 | /* send the cpu to sleep... */ | ||
252 | |||
253 | s3c_pm_arch_stop_clocks(); | ||
254 | |||
255 | /* s3c2410_cpu_save will also act as our return point from when | ||
256 | * we resume as it saves its own register state, so use the return | ||
257 | * code to differentiate return from save and return from sleep */ | ||
258 | |||
259 | if (s3c2410_cpu_save(regs_save) == 0) { | ||
260 | flush_cache_all(); | ||
261 | pm_cpu_sleep(); | ||
262 | } | ||
263 | |||
264 | /* restore the cpu state using the kernel's cpu init code. */ | ||
265 | |||
266 | cpu_init(); | ||
267 | |||
268 | /* restore the system state */ | ||
269 | |||
270 | s3c_pm_restore_core(); | ||
271 | s3c_pm_restore_uart(); | ||
272 | s3c_pm_restore_gpios(); | ||
273 | |||
274 | s3c_pm_debug_init(); | ||
275 | |||
276 | /* check what irq (if any) restored the system */ | ||
277 | |||
278 | s3c_pm_arch_show_resume_irqs(); | ||
279 | |||
280 | S3C_PMDBG("%s: post sleep, preparing to return\n", __func__); | ||
281 | |||
282 | s3c_pm_check_restore(); | ||
283 | |||
284 | /* ok, let's return from sleep */ | ||
285 | |||
286 | S3C_PMDBG("S3C PM Resume (post-restore)\n"); | ||
287 | return 0; | ||
288 | } | ||
289 | |||
290 | static struct platform_suspend_ops s3c_pm_ops = { | ||
291 | .enter = s3c_pm_enter, | ||
292 | .valid = suspend_valid_only_mem, | ||
293 | }; | ||
294 | |||
295 | /* s3c2410_pm_init | ||
296 | * | ||
297 | * Attach the power management functions. This should be called | ||
298 | * from the board specific initialisation if the board supports | ||
299 | * it. | ||
300 | */ | ||
301 | |||
302 | int __init s3c2410_pm_init(void) | ||
303 | { | ||
304 | printk("S3C Power Management, Copyright 2004 Simtec Electronics\n"); | ||
305 | |||
306 | suspend_set_ops(&s3c_pm_ops); | ||
307 | return 0; | ||
308 | } | ||
diff --git a/arch/arm/plat-s3c24xx/include/plat/pm-core.h b/arch/arm/plat-s3c24xx/include/plat/pm-core.h new file mode 100644 index 000000000000..c75882113e04 --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/plat/pm-core.h | |||
@@ -0,0 +1,59 @@ | |||
1 | /* linux/arch/arm/plat-s3c24xx/include/plat/pll.h | ||
2 | * | ||
3 | * Copyright 2008 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * | ||
7 | * S3C24xx - PM core support for arch/arm/plat-s3c/pm.c | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | static inline void s3c_pm_debug_init_uart(void) | ||
15 | { | ||
16 | unsigned long tmp = __raw_readl(S3C2410_CLKCON); | ||
17 | |||
18 | /* re-start uart clocks */ | ||
19 | tmp |= S3C2410_CLKCON_UART0; | ||
20 | tmp |= S3C2410_CLKCON_UART1; | ||
21 | tmp |= S3C2410_CLKCON_UART2; | ||
22 | |||
23 | __raw_writel(tmp, S3C2410_CLKCON); | ||
24 | udelay(10); | ||
25 | } | ||
26 | |||
27 | static inline void s3c_pm_arch_prepare_irqs(void) | ||
28 | { | ||
29 | __raw_writel(s3c_irqwake_intmask, S3C2410_INTMSK); | ||
30 | __raw_writel(s3c_irqwake_eintmask, S3C2410_EINTMASK); | ||
31 | |||
32 | /* ack any outstanding external interrupts before we go to sleep */ | ||
33 | |||
34 | __raw_writel(__raw_readl(S3C2410_EINTPEND), S3C2410_EINTPEND); | ||
35 | __raw_writel(__raw_readl(S3C2410_INTPND), S3C2410_INTPND); | ||
36 | __raw_writel(__raw_readl(S3C2410_SRCPND), S3C2410_SRCPND); | ||
37 | |||
38 | } | ||
39 | |||
40 | static inline void s3c_pm_arch_stop_clocks(void) | ||
41 | { | ||
42 | __raw_writel(0x00, S3C2410_CLKCON); /* turn off clocks over sleep */ | ||
43 | } | ||
44 | |||
45 | static void s3c_pm_show_resume_irqs(int start, unsigned long which, | ||
46 | unsigned long mask); | ||
47 | |||
48 | static inline void s3c_pm_arch_show_resume_irqs(void) | ||
49 | { | ||
50 | S3C_PMDBG("post sleep: IRQs 0x%08x, 0x%08x\n", | ||
51 | __raw_readl(S3C2410_SRCPND), | ||
52 | __raw_readl(S3C2410_EINTPEND)); | ||
53 | |||
54 | s3c_pm_show_resume_irqs(IRQ_EINT0, __raw_readl(S3C2410_SRCPND), | ||
55 | s3c_irqwake_intmask); | ||
56 | |||
57 | s3c_pm_show_resume_irqs(IRQ_EINT4-4, __raw_readl(S3C2410_EINTPEND), | ||
58 | s3c_irqwake_eintmask); | ||
59 | } | ||
diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c index e2ae12da16e7..062a29339a91 100644 --- a/arch/arm/plat-s3c24xx/pm.c +++ b/arch/arm/plat-s3c24xx/pm.c | |||
@@ -34,9 +34,6 @@ | |||
34 | #include <linux/serial_core.h> | 34 | #include <linux/serial_core.h> |
35 | #include <linux/io.h> | 35 | #include <linux/io.h> |
36 | 36 | ||
37 | #include <asm/cacheflush.h> | ||
38 | #include <mach/hardware.h> | ||
39 | |||
40 | #include <plat/regs-serial.h> | 37 | #include <plat/regs-serial.h> |
41 | #include <mach/regs-clock.h> | 38 | #include <mach/regs-clock.h> |
42 | #include <mach/regs-gpio.h> | 39 | #include <mach/regs-gpio.h> |
@@ -47,7 +44,6 @@ | |||
47 | 44 | ||
48 | #include <plat/pm.h> | 45 | #include <plat/pm.h> |
49 | 46 | ||
50 | |||
51 | #define PFX "s3c24xx-pm: " | 47 | #define PFX "s3c24xx-pm: " |
52 | 48 | ||
53 | static struct sleep_save core_save[] = { | 49 | static struct sleep_save core_save[] = { |
@@ -115,66 +111,6 @@ static struct sleep_save misc_save[] = { | |||
115 | SAVE_ITEM(S3C2410_DCLKCON), | 111 | SAVE_ITEM(S3C2410_DCLKCON), |
116 | }; | 112 | }; |
117 | 113 | ||
118 | #ifdef CONFIG_S3C2410_PM_DEBUG | ||
119 | |||
120 | #define SAVE_UART(va) \ | ||
121 | SAVE_ITEM((va) + S3C2410_ULCON), \ | ||
122 | SAVE_ITEM((va) + S3C2410_UCON), \ | ||
123 | SAVE_ITEM((va) + S3C2410_UFCON), \ | ||
124 | SAVE_ITEM((va) + S3C2410_UMCON), \ | ||
125 | SAVE_ITEM((va) + S3C2410_UBRDIV) | ||
126 | |||
127 | static struct sleep_save uart_save[] = { | ||
128 | SAVE_UART(S3C24XX_VA_UART0), | ||
129 | SAVE_UART(S3C24XX_VA_UART1), | ||
130 | #ifndef CONFIG_CPU_S3C2400 | ||
131 | SAVE_UART(S3C24XX_VA_UART2), | ||
132 | #endif | ||
133 | }; | ||
134 | |||
135 | /* debug | ||
136 | * | ||
137 | * we send the debug to printascii() to allow it to be seen if the | ||
138 | * system never wakes up from the sleep | ||
139 | */ | ||
140 | |||
141 | static void s3c2410_pm_debug_init(void) | ||
142 | { | ||
143 | unsigned long tmp = __raw_readl(S3C2410_CLKCON); | ||
144 | |||
145 | /* re-start uart clocks */ | ||
146 | tmp |= S3C2410_CLKCON_UART0; | ||
147 | tmp |= S3C2410_CLKCON_UART1; | ||
148 | tmp |= S3C2410_CLKCON_UART2; | ||
149 | |||
150 | __raw_writel(tmp, S3C2410_CLKCON); | ||
151 | udelay(10); | ||
152 | } | ||
153 | |||
154 | #else | ||
155 | #define s3c2410_pm_debug_init() do { } while(0) | ||
156 | |||
157 | static struct sleep_save uart_save[] = {}; | ||
158 | #endif | ||
159 | |||
160 | /* s3c2410_pm_show_resume_irqs | ||
161 | * | ||
162 | * print any IRQs asserted at resume time (ie, we woke from) | ||
163 | */ | ||
164 | |||
165 | static void s3c2410_pm_show_resume_irqs(int start, unsigned long which, | ||
166 | unsigned long mask) | ||
167 | { | ||
168 | int i; | ||
169 | |||
170 | which &= ~mask; | ||
171 | |||
172 | for (i = 0; i <= 31; i++) { | ||
173 | if ((which) & (1L<<i)) { | ||
174 | S3C_PMDBG("IRQ %d asserted at resume\n", start+i); | ||
175 | } | ||
176 | } | ||
177 | } | ||
178 | 114 | ||
179 | /* s3c_pm_check_resume_pin | 115 | /* s3c_pm_check_resume_pin |
180 | * | 116 | * |
@@ -206,12 +142,12 @@ static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) | |||
206 | } | 142 | } |
207 | } | 143 | } |
208 | 144 | ||
209 | /* s3c2410_pm_configure_extint | 145 | /* s3c_pm_configure_extint |
210 | * | 146 | * |
211 | * configure all external interrupt pins | 147 | * configure all external interrupt pins |
212 | */ | 148 | */ |
213 | 149 | ||
214 | static void s3c2410_pm_configure_extint(void) | 150 | void s3c_pm_configure_extint(void) |
215 | { | 151 | { |
216 | int pin; | 152 | int pin; |
217 | 153 | ||
@@ -235,12 +171,12 @@ static void s3c2410_pm_configure_extint(void) | |||
235 | #define OFFS_DAT (S3C2410_GPADAT - S3C2410_GPACON) | 171 | #define OFFS_DAT (S3C2410_GPADAT - S3C2410_GPACON) |
236 | #define OFFS_UP (S3C2410_GPBUP - S3C2410_GPBCON) | 172 | #define OFFS_UP (S3C2410_GPBUP - S3C2410_GPBCON) |
237 | 173 | ||
238 | /* s3c2410_pm_save_gpios() | 174 | /* s3c_pm_save_gpios() |
239 | * | 175 | * |
240 | * Save the state of the GPIOs | 176 | * Save the state of the GPIOs |
241 | */ | 177 | */ |
242 | 178 | ||
243 | static void s3c2410_pm_save_gpios(void) | 179 | void s3c_pm_save_gpios(void) |
244 | { | 180 | { |
245 | struct gpio_sleep *gps = gpio_save; | 181 | struct gpio_sleep *gps = gpio_save; |
246 | unsigned int gpio; | 182 | unsigned int gpio; |
@@ -279,7 +215,10 @@ static inline int is_out(unsigned long con) | |||
279 | return con == 1; | 215 | return con == 1; |
280 | } | 216 | } |
281 | 217 | ||
282 | /* s3c2410_pm_restore_gpio() | 218 | /** |
219 | * s3c2410_pm_restore_gpio() - restore the given GPIO bank | ||
220 | * @index: The number of the GPIO bank being resumed. | ||
221 | * @gps: The sleep confgiuration for the bank. | ||
283 | * | 222 | * |
284 | * Restore one of the GPIO banks that was saved during suspend. This is | 223 | * Restore one of the GPIO banks that was saved during suspend. This is |
285 | * not as simple as once thought, due to the possibility of glitches | 224 | * not as simple as once thought, due to the possibility of glitches |
@@ -397,7 +336,7 @@ static void s3c2410_pm_restore_gpio(int index, struct gpio_sleep *gps) | |||
397 | * Restore the state of the GPIOs | 336 | * Restore the state of the GPIOs |
398 | */ | 337 | */ |
399 | 338 | ||
400 | static void s3c2410_pm_restore_gpios(void) | 339 | void s3c_pm_restore_gpios(void) |
401 | { | 340 | { |
402 | struct gpio_sleep *gps = gpio_save; | 341 | struct gpio_sleep *gps = gpio_save; |
403 | int gpio; | 342 | int gpio; |
@@ -407,150 +346,15 @@ static void s3c2410_pm_restore_gpios(void) | |||
407 | } | 346 | } |
408 | } | 347 | } |
409 | 348 | ||
410 | void (*pm_cpu_prep)(void); | 349 | void s3c_pm_restore_core(void) |
411 | void (*pm_cpu_sleep)(void); | ||
412 | |||
413 | #define any_allowed(mask, allow) (((mask) & (allow)) != (allow)) | ||
414 | |||
415 | /* s3c2410_pm_enter | ||
416 | * | ||
417 | * central control for sleep/resume process | ||
418 | */ | ||
419 | |||
420 | static int s3c2410_pm_enter(suspend_state_t state) | ||
421 | { | 350 | { |
422 | unsigned long regs_save[16]; | ||
423 | |||
424 | /* ensure the debug is initialised (if enabled) */ | ||
425 | |||
426 | s3c2410_pm_debug_init(); | ||
427 | |||
428 | S3C_PMDBG("s3c2410_pm_enter(%d)\n", state); | ||
429 | |||
430 | if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) { | ||
431 | printk(KERN_ERR PFX "error: no cpu sleep functions set\n"); | ||
432 | return -EINVAL; | ||
433 | } | ||
434 | |||
435 | /* check if we have anything to wake-up with... bad things seem | ||
436 | * to happen if you suspend with no wakeup (system will often | ||
437 | * require a full power-cycle) | ||
438 | */ | ||
439 | |||
440 | if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) && | ||
441 | !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) { | ||
442 | printk(KERN_ERR PFX "No sources enabled for wake-up!\n"); | ||
443 | printk(KERN_ERR PFX "Aborting sleep\n"); | ||
444 | return -EINVAL; | ||
445 | } | ||
446 | |||
447 | /* prepare check area if configured */ | ||
448 | |||
449 | s3c_pm_check_prepare(); | ||
450 | |||
451 | /* store the physical address of the register recovery block */ | ||
452 | |||
453 | s3c_sleep_save_phys = virt_to_phys(regs_save); | ||
454 | |||
455 | S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys); | ||
456 | |||
457 | /* save all necessary core registers not covered by the drivers */ | ||
458 | |||
459 | s3c2410_pm_save_gpios(); | ||
460 | s3c_pm_do_save(misc_save, ARRAY_SIZE(misc_save)); | ||
461 | s3c_pm_do_save(core_save, ARRAY_SIZE(core_save)); | ||
462 | s3c_pm_do_save(uart_save, ARRAY_SIZE(uart_save)); | ||
463 | |||
464 | /* set the irq configuration for wake */ | ||
465 | |||
466 | s3c2410_pm_configure_extint(); | ||
467 | |||
468 | S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n", | ||
469 | s3c_irqwake_intmask, s3c_irqwake_eintmask); | ||
470 | |||
471 | __raw_writel(s3c_irqwake_intmask, S3C2410_INTMSK); | ||
472 | __raw_writel(s3c_irqwake_eintmask, S3C2410_EINTMASK); | ||
473 | |||
474 | /* ack any outstanding external interrupts before we go to sleep */ | ||
475 | |||
476 | __raw_writel(__raw_readl(S3C2410_EINTPEND), S3C2410_EINTPEND); | ||
477 | __raw_writel(__raw_readl(S3C2410_INTPND), S3C2410_INTPND); | ||
478 | __raw_writel(__raw_readl(S3C2410_SRCPND), S3C2410_SRCPND); | ||
479 | |||
480 | /* call cpu specific preparation */ | ||
481 | |||
482 | pm_cpu_prep(); | ||
483 | |||
484 | /* flush cache back to ram */ | ||
485 | |||
486 | flush_cache_all(); | ||
487 | |||
488 | s3c_pm_check_store(); | ||
489 | |||
490 | /* send the cpu to sleep... */ | ||
491 | |||
492 | __raw_writel(0x00, S3C2410_CLKCON); /* turn off clocks over sleep */ | ||
493 | |||
494 | /* s3c2410_cpu_save will also act as our return point from when | ||
495 | * we resume as it saves its own register state, so use the return | ||
496 | * code to differentiate return from save and return from sleep */ | ||
497 | |||
498 | if (s3c2410_cpu_save(regs_save) == 0) { | ||
499 | flush_cache_all(); | ||
500 | pm_cpu_sleep(); | ||
501 | } | ||
502 | |||
503 | /* restore the cpu state */ | ||
504 | |||
505 | cpu_init(); | ||
506 | |||
507 | /* restore the system state */ | ||
508 | |||
509 | s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save)); | 351 | s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save)); |
510 | s3c_pm_do_restore(misc_save, ARRAY_SIZE(misc_save)); | 352 | s3c_pm_do_restore(misc_save, ARRAY_SIZE(misc_save)); |
511 | s3c_pm_do_restore(uart_save, ARRAY_SIZE(uart_save)); | ||
512 | s3c2410_pm_restore_gpios(); | ||
513 | |||
514 | s3c2410_pm_debug_init(); | ||
515 | |||
516 | /* check what irq (if any) restored the system */ | ||
517 | |||
518 | S3C_PMDBG("post sleep: IRQs 0x%08x, 0x%08x\n", | ||
519 | __raw_readl(S3C2410_SRCPND), | ||
520 | __raw_readl(S3C2410_EINTPEND)); | ||
521 | |||
522 | s3c2410_pm_show_resume_irqs(IRQ_EINT0, __raw_readl(S3C2410_SRCPND), | ||
523 | s3c_irqwake_intmask); | ||
524 | |||
525 | s3c2410_pm_show_resume_irqs(IRQ_EINT4-4, __raw_readl(S3C2410_EINTPEND), | ||
526 | s3c_irqwake_eintmask); | ||
527 | |||
528 | S3C_PMDBG("post sleep, preparing to return\n"); | ||
529 | |||
530 | s3c_pm_check_restore(); | ||
531 | |||
532 | /* ok, let's return from sleep */ | ||
533 | |||
534 | S3C_PMDBG("S3C2410 PM Resume (post-restore)\n"); | ||
535 | return 0; | ||
536 | } | 353 | } |
537 | 354 | ||
538 | static struct platform_suspend_ops s3c2410_pm_ops = { | 355 | void s3c_pm_save_core(void) |
539 | .enter = s3c2410_pm_enter, | ||
540 | .valid = suspend_valid_only_mem, | ||
541 | }; | ||
542 | |||
543 | /* s3c2410_pm_init | ||
544 | * | ||
545 | * Attach the power management functions. This should be called | ||
546 | * from the board specific initialisation if the board supports | ||
547 | * it. | ||
548 | */ | ||
549 | |||
550 | int __init s3c2410_pm_init(void) | ||
551 | { | 356 | { |
552 | printk("S3C2410 Power Management, (c) 2004 Simtec Electronics\n"); | 357 | s3c_pm_do_save(misc_save, ARRAY_SIZE(misc_save)); |
553 | 358 | s3c_pm_do_save(core_save, ARRAY_SIZE(core_save)); | |
554 | suspend_set_ops(&s3c2410_pm_ops); | ||
555 | return 0; | ||
556 | } | 359 | } |
360 | |||