43 files changed, 579 insertions, 132 deletions

diff --git a/arch/arm/boot/dts/am335x-base0033.dts b/arch/arm/boot/dts/am335x-base0033.dts
index b4f95c2bbf74..72a9b3fc4251 100644
--- a/arch/arm/boot/dts/am335x-base0033.dts
+++ b/arch/arm/boot/dts/am335x-base0033.dts
@@ -13,4 +13,83 @@
 / {
         model = "IGEP COM AM335x on AQUILA Expansion";
         compatible = "isee,am335x-base0033", "isee,am335x-igep0033", "ti,am33xx";
+
+        hdmi {
+                compatible = "ti,tilcdc,slave";
+                i2c = <&i2c0>;
+                pinctrl-names = "default", "off";
+                pinctrl-0 = <&nxp_hdmi_pins>;
+                pinctrl-1 = <&nxp_hdmi_off_pins>;
+                status = "okay";
+        };
+
+        leds_base {
+                pinctrl-names = "default";
+                pinctrl-0 = <&leds_base_pins>;
+
+                compatible = "gpio-leds";
+
+                led@0 {
+                        label = "base:red:user";
+                        gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;   /* gpio1_21 */
+                        default-state = "off";
+                };
+
+                led@1 {
+                        label = "base:green:user";
+                        gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;    /* gpio2_0 */
+                        default-state = "off";
+                };
+        };
+};
+
+&am33xx_pinmux {
+        nxp_hdmi_pins: pinmux_nxp_hdmi_pins {
+                pinctrl-single,pins = <
+                        0x1b0 (PIN_OUTPUT | MUX_MODE3)  /* xdma_event_intr0.clkout1 */
+                        0xa0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data0 */
+                        0xa4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data1 */
+                        0xa8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data2 */
+                        0xac (PIN_OUTPUT | MUX_MODE0)   /* lcd_data3 */
+                        0xb0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data4 */
+                        0xb4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data5 */
+                        0xb8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data6 */
+                        0xbc (PIN_OUTPUT | MUX_MODE0)   /* lcd_data7 */
+                        0xc0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data8 */
+                        0xc4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data9 */
+                        0xc8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data10 */
+                        0xcc (PIN_OUTPUT | MUX_MODE0)   /* lcd_data11 */
+                        0xd0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data12 */
+                        0xd4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data13 */
+                        0xd8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_data14 */
+                        0xdc (PIN_OUTPUT | MUX_MODE0)   /* lcd_data15 */
+                        0xe0 (PIN_OUTPUT | MUX_MODE0)   /* lcd_vsync */
+                        0xe4 (PIN_OUTPUT | MUX_MODE0)   /* lcd_hsync */
+                        0xe8 (PIN_OUTPUT | MUX_MODE0)   /* lcd_pclk */
+                        0xec (PIN_OUTPUT | MUX_MODE0)   /* lcd_ac_bias_en */
+                >;
+        };
+        nxp_hdmi_off_pins: pinmux_nxp_hdmi_off_pins {
+                pinctrl-single,pins = <
+                        0x1b0 (PIN_OUTPUT | MUX_MODE3)  /* xdma_event_intr0.clkout1 */
+                >;
+        };
+
+        leds_base_pins: pinmux_leds_base_pins {
+                pinctrl-single,pins = <
+                        0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_a5.gpio1_21 */
+                        0x88 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_csn3.gpio2_0 */
+                >;
+        };
+};
+
+&lcdc {
+        status = "okay";
+};
+
+&i2c0 {
+        eeprom: eeprom@50 {
+                compatible = "at,24c256";
+                reg = <0x50>;
+        };
 };
diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi
index 619624479311..7063311a58d9 100644
--- a/arch/arm/boot/dts/am335x-igep0033.dtsi
+++ b/arch/arm/boot/dts/am335x-igep0033.dtsi
@@ -199,6 +199,35 @@
         pinctrl-0 = <&uart0_pins>;
 };
 
+&usb {
+        status = "okay";
+
+        control@44e10000 {
+                status = "okay";
+        };
+
+        usb-phy@47401300 {
+                status = "okay";
+        };
+
+        usb-phy@47401b00 {
+                status = "okay";
+        };
+
+        usb@47401000 {
+                status = "okay";
+        };
+
+        usb@47401800 {
+                status = "okay";
+                dr_mode = "host";
+        };
+
+        dma-controller@07402000  {
+                status = "okay";
+        };
+};
+
 #include "tps65910.dtsi"
 
 &tps {
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index 90ce29dbe119..08a56bcfc724 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -99,22 +99,22 @@
                                         spi-max-frequency = <50000000>;
                                 };
                         };
+                };
 
-                        pcie-controller {
+                pcie-controller {
+                        status = "okay";
+                        /*
+                         * The two PCIe units are accessible through
+                         * both standard PCIe slots and mini-PCIe
+                         * slots on the board.
+                         */
+                        pcie@1,0 {
+                                /* Port 0, Lane 0 */
+                                status = "okay";
+                        };
+                        pcie@2,0 {
+                                /* Port 1, Lane 0 */
                                 status = "okay";
-                                /*
-                                 * The two PCIe units are accessible through
-                                 * both standard PCIe slots and mini-PCIe
-                                 * slots on the board.
-                                 */
-                                pcie@1,0 {
-                                        /* Port 0, Lane 0 */
-                                        status = "okay";
-                                };
-                                pcie@2,0 {
-                                        /* Port 1, Lane 0 */
-                                        status = "okay";
-                                };
                         };
                 };
         };
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 00d6a798c705..7f10f627ae5b 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -118,7 +118,7 @@
 
                         coherency-fabric@20200 {
                                 compatible = "marvell,coherency-fabric";
-                                reg = <0x20200 0xb0>, <0x21810 0x1c>;
+                                reg = <0x20200 0xb0>, <0x21010 0x1c>;
                         };
 
                         serial@12000 {
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index 3f5e6121c730..98335fb34b7a 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -47,7 +47,7 @@
                 /*
                  * MV78230 has 2 PCIe units Gen2.0: One unit can be
                  * configured as x4 or quad x1 lanes. One unit is
-                 * x4/x1.
+                 * x1 only.
                  */
                 pcie-controller {
                         compatible = "marvell,armada-xp-pcie";
@@ -62,10 +62,10 @@
 
                         ranges =
                                <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000   /* Port 0.0 registers */
-                                0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000   /* Port 2.0 registers */
                                 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000   /* Port 0.1 registers */
                                 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000   /* Port 0.2 registers */
                                 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000   /* Port 0.3 registers */
+                                0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000   /* Port 1.0 registers */
                                 0x82000000 0x1 0       MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
                                 0x81000000 0x1 0       MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO  */
                                 0x82000000 0x2 0       MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */
@@ -74,8 +74,8 @@
                                 0x81000000 0x3 0       MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO  */
                                 0x82000000 0x4 0       MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */
                                 0x81000000 0x4 0       MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO  */
-                                0x82000000 0x9 0       MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */
-                                0x81000000 0x9 0       MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO  */>;
+                                0x82000000 0x5 0       MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
+                                0x81000000 0x5 0       MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO  */>;
 
                         pcie@1,0 {
                                 device_type = "pci";
@@ -145,20 +145,20 @@
                                 status = "disabled";
                         };
 
-                        pcie@9,0 {
+                        pcie@5,0 {
                                 device_type = "pci";
-                                assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
-                                reg = <0x4800 0 0 0 0>;
+                                assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
+                                reg = <0x2800 0 0 0 0>;
                                 #address-cells = <3>;
                                 #size-cells = <2>;
                                 #interrupt-cells = <1>;
-                                ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
-                                          0x81000000 0 0 0x81000000 0x9 0 1 0>;
+                                ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
+                                          0x81000000 0 0 0x81000000 0x5 0 1 0>;
                                 interrupt-map-mask = <0 0 0 0>;
-                                interrupt-map = <0 0 0 0 &mpic 99>;
-                                marvell,pcie-port = <2>;
+                                interrupt-map = <0 0 0 0 &mpic 62>;
+                                marvell,pcie-port = <1>;
                                 marvell,pcie-lane = <0>;
-                                clocks = <&gateclk 26>;
+                                clocks = <&gateclk 9>;
                                 status = "disabled";
                         };
                 };
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index 3e9fd1353f89..66609684d41b 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -48,7 +48,7 @@
                 /*
                  * MV78260 has 3 PCIe units Gen2.0: Two units can be
                  * configured as x4 or quad x1 lanes. One unit is
-                 * x4/x1.
+                 * x4 only.
                  */
                 pcie-controller {
                         compatible = "marvell,armada-xp-pcie";
@@ -68,7 +68,9 @@
                                 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000   /* Port 0.2 registers */
                                 0x82000000 0 0x4c000 MBUS_ID(0xf0, 0x01) 0x4c000 0 0x00002000   /* Port 0.3 registers */
                                 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000   /* Port 1.0 registers */
-                                0x82000000 0 0x82000 MBUS_ID(0xf0, 0x01) 0x82000 0 0x00002000   /* Port 3.0 registers */
+                                0x82000000 0 0x84000 MBUS_ID(0xf0, 0x01) 0x84000 0 0x00002000   /* Port 1.1 registers */
+                                0x82000000 0 0x88000 MBUS_ID(0xf0, 0x01) 0x88000 0 0x00002000   /* Port 1.2 registers */
+                                0x82000000 0 0x8c000 MBUS_ID(0xf0, 0x01) 0x8c000 0 0x00002000   /* Port 1.3 registers */
                                 0x82000000 0x1 0     MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
                                 0x81000000 0x1 0     MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO  */
                                 0x82000000 0x2 0     MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */
@@ -77,10 +79,18 @@
                                 0x81000000 0x3 0     MBUS_ID(0x04, 0xb0) 0 1 0 /* Port 0.2 IO  */
                                 0x82000000 0x4 0     MBUS_ID(0x04, 0x78) 0 1 0 /* Port 0.3 MEM */
                                 0x81000000 0x4 0     MBUS_ID(0x04, 0x70) 0 1 0 /* Port 0.3 IO  */
-                                0x82000000 0x9 0     MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
-                                0x81000000 0x9 0     MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO  */
-                                0x82000000 0xa 0     MBUS_ID(0x08, 0xf8) 0 1 0 /* Port 3.0 MEM */
-                                0x81000000 0xa 0     MBUS_ID(0x08, 0xf0) 0 1 0 /* Port 3.0 IO  */>;
+
+                                0x82000000 0x5 0     MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 MEM */
+                                0x81000000 0x5 0     MBUS_ID(0x08, 0xe0) 0 1 0 /* Port 1.0 IO  */
+                                0x82000000 0x6 0     MBUS_ID(0x08, 0xd8) 0 1 0 /* Port 1.1 MEM */
+                                0x81000000 0x6 0     MBUS_ID(0x08, 0xd0) 0 1 0 /* Port 1.1 IO  */
+                                0x82000000 0x7 0     MBUS_ID(0x08, 0xb8) 0 1 0 /* Port 1.2 MEM */
+                                0x81000000 0x7 0     MBUS_ID(0x08, 0xb0) 0 1 0 /* Port 1.2 IO  */
+                                0x82000000 0x8 0     MBUS_ID(0x08, 0x78) 0 1 0 /* Port 1.3 MEM */
+                                0x81000000 0x8 0     MBUS_ID(0x08, 0x70) 0 1 0 /* Port 1.3 IO  */
+
+                                0x82000000 0x9 0     MBUS_ID(0x04, 0xf8) 0 1 0 /* Port 2.0 MEM */
+                                0x81000000 0x9 0     MBUS_ID(0x04, 0xf0) 0 1 0 /* Port 2.0 IO  */>;
 
                         pcie@1,0 {
                                 device_type = "pci";
@@ -106,8 +116,8 @@
                                 #address-cells = <3>;
                                 #size-cells = <2>;
                                 #interrupt-cells = <1>;
-                                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
-                                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
+                                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
+                                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
                                 interrupt-map-mask = <0 0 0 0>;
                                 interrupt-map = <0 0 0 0 &mpic 59>;
                                 marvell,pcie-port = <0>;
@@ -150,37 +160,88 @@
                                 status = "disabled";
                         };
 
-                        pcie@9,0 {
+                        pcie@5,0 {
                                 device_type = "pci";
-                                assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
-                                reg = <0x4800 0 0 0 0>;
+                                assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
+                                reg = <0x2800 0 0 0 0>;
                                 #address-cells = <3>;
                                 #size-cells = <2>;
                                 #interrupt-cells = <1>;
-                                ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
-                                          0x81000000 0 0 0x81000000 0x9 0 1 0>;
+                                ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
+                                          0x81000000 0 0 0x81000000 0x5 0 1 0>;
                                 interrupt-map-mask = <0 0 0 0>;
-                                interrupt-map = <0 0 0 0 &mpic 99>;
-                                marvell,pcie-port = <2>;
+                                interrupt-map = <0 0 0 0 &mpic 62>;
+                                marvell,pcie-port = <1>;
                                 marvell,pcie-lane = <0>;
-                                clocks = <&gateclk 26>;
+                                clocks = <&gateclk 9>;
                                 status = "disabled";
                         };
 
-                        pcie@10,0 {
+                        pcie@6,0 {
                                 device_type = "pci";
-                                assigned-addresses = <0x82000800 0 0x82000 0 0x2000>;
-                                reg = <0x5000 0 0 0 0>;
+                                assigned-addresses = <0x82000800 0 0x84000 0 0x2000>;
+                                reg = <0x3000 0 0 0 0>;
                                 #address-cells = <3>;
                                 #size-cells = <2>;
                                 #interrupt-cells = <1>;
-                                ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0
-                                          0x81000000 0 0 0x81000000 0xa 0 1 0>;
+                                ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0
+                                          0x81000000 0 0 0x81000000 0x6 0 1 0>;
                                 interrupt-map-mask = <0 0 0 0>;
-                                interrupt-map = <0 0 0 0 &mpic 103>;
-                                marvell,pcie-port = <3>;
+                                interrupt-map = <0 0 0 0 &mpic 63>;
+                                marvell,pcie-port = <1>;
+                                marvell,pcie-lane = <1>;
+                                clocks = <&gateclk 10>;
+                                status = "disabled";
+                        };
+
+                        pcie@7,0 {
+                                device_type = "pci";
+                                assigned-addresses = <0x82000800 0 0x88000 0 0x2000>;
+                                reg = <0x3800 0 0 0 0>;
+                                #address-cells = <3>;
+                                #size-cells = <2>;
+                                #interrupt-cells = <1>;
+                                ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0
+                                          0x81000000 0 0 0x81000000 0x7 0 1 0>;
+                                interrupt-map-mask = <0 0 0 0>;
+                                interrupt-map = <0 0 0 0 &mpic 64>;
+                                marvell,pcie-port = <1>;
+                                marvell,pcie-lane = <2>;
+                                clocks = <&gateclk 11>;
+                                status = "disabled";
+                        };
+
+                        pcie@8,0 {
+                                device_type = "pci";
+                                assigned-addresses = <0x82000800 0 0x8c000 0 0x2000>;
+                                reg = <0x4000 0 0 0 0>;
+                                #address-cells = <3>;
+                                #size-cells = <2>;
+                                #interrupt-cells = <1>;
+                                ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0
+                                          0x81000000 0 0 0x81000000 0x8 0 1 0>;
+                                interrupt-map-mask = <0 0 0 0>;
+                                interrupt-map = <0 0 0 0 &mpic 65>;
+                                marvell,pcie-port = <1>;
+                                marvell,pcie-lane = <3>;
+                                clocks = <&gateclk 12>;
+                                status = "disabled";
+                        };
+
+                        pcie@9,0 {
+                                device_type = "pci";
+                                assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
+                                reg = <0x4800 0 0 0 0>;
+                                #address-cells = <3>;
+                                #size-cells = <2>;
+                                #interrupt-cells = <1>;
+                                ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
+                                          0x81000000 0 0 0x81000000 0x9 0 1 0>;
+                                interrupt-map-mask = <0 0 0 0>;
+                                interrupt-map = <0 0 0 0 &mpic 99>;
+                                marvell,pcie-port = <2>;
                                 marvell,pcie-lane = <0>;
-                                clocks = <&gateclk 27>;
+                                clocks = <&gateclk 26>;
                                 status = "disabled";
                         };
                 };
diff --git a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
index 2347e9563cef..6801106fa1f8 100644
--- a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
@@ -11,6 +11,10 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 
 / {
+        aliases {
+                serial4 = &usart3;
+        };
+
         ahb {
                 apb {
                         pinctrl@fffff400 {
diff --git a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
index 9c18adf788f7..f577b7df9a29 100644
--- a/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
+++ b/arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi
@@ -44,8 +44,8 @@
                 gpmc,wr-access-ns = <186>;
                 gpmc,cycle2cycle-samecsen;
                 gpmc,cycle2cycle-diffcsen;
-                vmmc-supply = <&vddvario>;
-                vmmc_aux-supply = <&vdd33a>;
+                vddvario-supply = <&vddvario>;
+                vdd33a-supply = <&vdd33a>;
                 reg-io-width = <4>;
                 smsc,save-mac-address;
         };
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index 31a632f7effb..df33a50bc070 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -215,3 +215,10 @@
 &usbhsehci {
         phys = <0 &hsusb2_phy>;
 };
+
+&vaux2 {
+        regulator-name = "usb_1v8";
+        regulator-min-microvolt = <1800000>;
+        regulator-max-microvolt = <1800000>;
+        regulator-always-on;
+};
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index fa532aaacc68..3ba4a625ea5b 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -61,6 +61,14 @@
                 vcc-supply = <&hsusb2_power>;
         };
 
+        sound {
+                compatible = "ti,omap-twl4030";
+                ti,model = "omap3beagle";
+
+                ti,mcbsp = <&mcbsp2>;
+                ti,codec = <&twl_audio>;
+        };
+
         gpio_keys {
                 compatible = "gpio-keys";
 
@@ -120,6 +128,12 @@
                 reg = <0x48>;
                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
                 interrupt-parent = <&intc>;
+
+                twl_audio: audio {
+                        compatible = "ti,twl4030-audio";
+                        codec {
+                        };
+                };
         };
 };
 
@@ -178,3 +192,10 @@
         mode = <3>;
         power = <50>;
 };
+
+&vaux2 {
+        regulator-name = "vdd_ehci";
+        regulator-min-microvolt = <1800000>;
+        regulator-max-microvolt = <1800000>;
+        regulator-always-on;
+};
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi
index ba1e58b7b7e3..165aaf7591ba 100644
--- a/arch/arm/boot/dts/omap3-igep.dtsi
+++ b/arch/arm/boot/dts/omap3-igep.dtsi
@@ -1,5 +1,5 @@
 /*
- * Device Tree Source for IGEP Technology devices
+ * Common device tree for IGEP boards based on AM/DM37x
  *
  * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
  * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
@@ -10,7 +10,7 @@
  */
 /dts-v1/;
 
-#include "omap34xx.dtsi"
+#include "omap36xx.dtsi"
 
 / {
         memory {
@@ -24,6 +24,25 @@
                 ti,mcbsp = <&mcbsp2>;
                 ti,codec = <&twl_audio>;
         };
+
+        vdd33: regulator-vdd33 {
+                compatible = "regulator-fixed";
+                regulator-name = "vdd33";
+                regulator-always-on;
+        };
+
+        lbee1usjyc_vmmc: lbee1usjyc_vmmc {
+                pinctrl-names = "default";
+                pinctrl-0 = <&lbee1usjyc_pins>;
+                compatible = "regulator-fixed";
+                regulator-name = "regulator-lbee1usjyc";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>;    /* gpio_138 WIFI_PDN */
+                startup-delay-us = <10000>;
+                enable-active-high;
+                vin-supply = <&vdd33>;
+        };
 };
 
 &omap3_pmx_core {
@@ -48,6 +67,15 @@
                 >;
         };
 
+        /* WiFi/BT combo */
+        lbee1usjyc_pins: pinmux_lbee1usjyc_pins {
+                pinctrl-single,pins = <
+                        0x136 (PIN_OUTPUT | MUX_MODE4)  /* sdmmc2_dat5.gpio_137 */
+                        0x138 (PIN_OUTPUT | MUX_MODE4)  /* sdmmc2_dat6.gpio_138 */
+                        0x13a (PIN_OUTPUT | MUX_MODE4)  /* sdmmc2_dat7.gpio_139 */
+                >;
+        };
+
         mcbsp2_pins: pinmux_mcbsp2_pins {
                 pinctrl-single,pins = <
                         0x10c (PIN_INPUT | MUX_MODE0)           /* mcbsp2_fsx.mcbsp2_fsx */
@@ -65,10 +93,17 @@
                         0x11a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat1.sdmmc1_dat1 */
                         0x11c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat2.sdmmc1_dat2 */
                         0x11e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat3.sdmmc1_dat3 */
-                        0x120 (PIN_INPUT | MUX_MODE0)           /* sdmmc1_dat4.sdmmc1_dat4 */
-                        0x122 (PIN_INPUT | MUX_MODE0)           /* sdmmc1_dat5.sdmmc1_dat5 */
-                        0x124 (PIN_INPUT | MUX_MODE0)           /* sdmmc1_dat6.sdmmc1_dat6 */
-                        0x126 (PIN_INPUT | MUX_MODE0)           /* sdmmc1_dat7.sdmmc1_dat7 */
+                >;
+        };
+
+        mmc2_pins: pinmux_mmc2_pins {
+                pinctrl-single,pins = <
+                        0x128 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_clk.sdmmc2_clk */
+                        0x12a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_cmd.sdmmc2_cmd */
+                        0x12c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat0.sdmmc2_dat0 */
+                        0x12e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat1.sdmmc2_dat1 */
+                        0x130 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat2.sdmmc2_dat2 */
+                        0x132 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat3.sdmmc2_dat3 */
                 >;
         };
 
@@ -78,10 +113,33 @@
                 >;
         };
 
+        i2c1_pins: pinmux_i2c1_pins {
+                pinctrl-single,pins = <
+                        0x18a (PIN_INPUT | MUX_MODE0)   /* i2c1_scl.i2c1_scl */
+                        0x18c (PIN_INPUT | MUX_MODE0)   /* i2c1_sda.i2c1_sda */
+                >;
+        };
+
+        i2c2_pins: pinmux_i2c2_pins {
+                pinctrl-single,pins = <
+                        0x18e (PIN_INPUT | MUX_MODE0)   /* i2c2_scl.i2c2_scl */
+                        0x190 (PIN_INPUT | MUX_MODE0)   /* i2c2_sda.i2c2_sda */
+                >;
+        };
+
+        i2c3_pins: pinmux_i2c3_pins {
+                pinctrl-single,pins = <
+                        0x192 (PIN_INPUT | MUX_MODE0)   /* i2c3_scl.i2c3_scl */
+                        0x194 (PIN_INPUT | MUX_MODE0)   /* i2c3_sda.i2c3_sda */
+                >;
+        };
+
         leds_pins: pinmux_leds_pins { };
 };
 
 &i2c1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c1_pins>;
         clock-frequency = <2600000>;
 
         twl: twl@48 {
@@ -101,9 +159,16 @@
 #include "twl4030_omap3.dtsi"
 
 &i2c2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c2_pins>;
         clock-frequency = <400000>;
 };
 
+&i2c3 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c3_pins>;
+};
+
 &mcbsp2 {
         pinctrl-names = "default";
         pinctrl-0 = <&mcbsp2_pins>;
@@ -114,11 +179,15 @@
       pinctrl-0 = <&mmc1_pins>;
       vmmc-supply = <&vmmc1>;
       vmmc_aux-supply = <&vsim>;
-      bus-width = <8>;
+      bus-width = <4>;
 };
 
 &mmc2 {
-        status = "disabled";
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc2_pins>;
+        vmmc-supply = <&lbee1usjyc_vmmc>;
+        bus-width = <4>;
+        non-removable;
 };
 
 &mmc3 {
diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts
index d5cc79267250..1c7e74d2d2bc 100644
--- a/arch/arm/boot/dts/omap3-igep0020.dts
+++ b/arch/arm/boot/dts/omap3-igep0020.dts
@@ -1,5 +1,5 @@
 /*
- * Device Tree Source for IGEPv2 board
+ * Device Tree Source for IGEPv2 Rev. (TI OMAP AM/DM37x)
  *
  * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
  * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
@@ -13,7 +13,7 @@
 #include "omap-gpmc-smsc911x.dtsi"
 
 / {
-        model = "IGEPv2";
+        model = "IGEPv2 (TI OMAP AM/DM37x)";
         compatible = "isee,omap3-igep0020", "ti,omap3";
 
         leds {
@@ -67,6 +67,8 @@
         pinctrl-names = "default";
         pinctrl-0 = <
                 &hsusbb1_pins
+                &tfp410_pins
+                &dss_pins
         >;
 
         hsusbb1_pins: pinmux_hsusbb1_pins {
@@ -85,6 +87,45 @@
                         0x5ba (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d7.hsusb1_data3 */
                 >;
         };
+
+        tfp410_pins: tfp410_dvi_pins {
+                pinctrl-single,pins = <
+                        0x196 (PIN_OUTPUT | MUX_MODE4)   /* hdq_sio.gpio_170 */
+                >;
+        };
+
+        dss_pins: pinmux_dss_dvi_pins {
+                pinctrl-single,pins = <
+                        0x0a4 (PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
+                        0x0a6 (PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
+                        0x0a8 (PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
+                        0x0aa (PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */
+                        0x0ac (PIN_OUTPUT | MUX_MODE0)   /* dss_data0.dss_data0 */
+                        0x0ae (PIN_OUTPUT | MUX_MODE0)   /* dss_data1.dss_data1 */
+                        0x0b0 (PIN_OUTPUT | MUX_MODE0)   /* dss_data2.dss_data2 */
+                        0x0b2 (PIN_OUTPUT | MUX_MODE0)   /* dss_data3.dss_data3 */
+                        0x0b4 (PIN_OUTPUT | MUX_MODE0)   /* dss_data4.dss_data4 */
+                        0x0b6 (PIN_OUTPUT | MUX_MODE0)   /* dss_data5.dss_data5 */
+                        0x0b8 (PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
+                        0x0ba (PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
+                        0x0bc (PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
+                        0x0be (PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
+                        0x0c0 (PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
+                        0x0c2 (PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
+                        0x0c4 (PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
+                        0x0c6 (PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
+                        0x0c8 (PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
+                        0x0ca (PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
+                        0x0cc (PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
+                        0x0ce (PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */
+                        0x0d0 (PIN_OUTPUT | MUX_MODE0)   /* dss_data18.dss_data18 */
+                        0x0d2 (PIN_OUTPUT | MUX_MODE0)   /* dss_data19.dss_data19 */
+                        0x0d4 (PIN_OUTPUT | MUX_MODE0)   /* dss_data20.dss_data20 */
+                        0x0d6 (PIN_OUTPUT | MUX_MODE0)   /* dss_data21.dss_data21 */
+                        0x0d8 (PIN_OUTPUT | MUX_MODE0)   /* dss_data22.dss_data22 */
+                        0x0da (PIN_OUTPUT | MUX_MODE0)   /* dss_data23.dss_data23 */
+                >;
+        };
 };
 
 &leds_pins {
@@ -174,3 +215,8 @@
 &usbhsehci {
         phys = <&hsusb1_phy>;
 };
+
+&vpll2 {
+        /* Needed for DSS */
+        regulator-name = "vdds_dsi";
+};
diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts
index 525e6d9b0978..02a23f8a3384 100644
--- a/arch/arm/boot/dts/omap3-igep0030.dts
+++ b/arch/arm/boot/dts/omap3-igep0030.dts
@@ -1,5 +1,5 @@
 /*
- * Device Tree Source for IGEP COM Module
+ * Device Tree Source for IGEP COM MODULE (TI OMAP AM/DM37x)
  *
  * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
  * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
@@ -12,7 +12,7 @@
 #include "omap3-igep.dtsi"
 
 / {
-        model = "IGEP COM Module";
+        model = "IGEP COM MODULE (TI OMAP AM/DM37x)";
         compatible = "isee,omap3-igep0030", "ti,omap3";
 
         leds {
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index c4f20bfe4cce..c2c306d13b87 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -125,6 +125,21 @@
                 >;
         };
 
+        mmc2_pins: pinmux_mmc2_pins {
+                pinctrl-single,pins = <
+                        0x128 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_clk */
+                        0x12a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_cmd */
+                        0x12c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat0 */
+                        0x12e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat1 */
+                        0x130 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat2 */
+                        0x132 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat3 */
+                        0x134 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat4 */
+                        0x136 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat5 */
+                        0x138 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat6 */
+                        0x13a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat7 */
+                >;
+        };
+
         display_pins: pinmux_display_pins {
                 pinctrl-single,pins = <
                         0x0d4 (PIN_OUTPUT | MUX_MODE4)          /* RX51_LCD_RESET_GPIO */
@@ -358,8 +373,14 @@
         cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */
 };
 
+/* most boards use vaux3, only some old versions use vmmc2 instead */
 &mmc2 {
-        status = "disabled";
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc2_pins>;
+        vmmc-supply = <&vaux3>;
+        vmmc_aux-supply = <&vsim>;
+        bus-width = <8>;
+        non-removable;
 };
 
 &mmc3 {
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index f3a0c26ed0c2..daabf99d402a 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -82,6 +82,13 @@
                 ranges;
                 ti,hwmods = "l3_main";
 
+                aes: aes@480c5000 {
+                        compatible = "ti,omap3-aes";
+                        ti,hwmods = "aes";
+                        reg = <0x480c5000 0x50>;
+                        interrupts = <0>;
+                };
+
                 counter32k: counter@48320000 {
                         compatible = "ti,omap-counter32k";
                         reg = <0x48320000 0x20>;
@@ -260,6 +267,13 @@
                         ti,hwmods = "i2c3";
                 };
 
+                mailbox: mailbox@48094000 {
+                        compatible = "ti,omap3-mailbox";
+                        ti,hwmods = "mailbox";
+                        reg = <0x48094000 0x200>;
+                        interrupts = <26>;
+                };
+
                 mcspi1: spi@48098000 {
                         compatible = "ti,omap2-mcspi";
                         reg = <0x48098000 0x100>;
@@ -357,6 +371,13 @@
                         dma-names = "tx", "rx";
                 };
 
+                mmu_isp: mmu@480bd400 {
+                        compatible = "ti,omap3-mmu-isp";
+                        ti,hwmods = "mmu_isp";
+                        reg = <0x480bd400 0x80>;
+                        interrupts = <8>;
+                };
+
                 wdt2: wdt@48314000 {
                         compatible = "ti,omap3-wdt";
                         reg = <0x48314000 0x80>;
@@ -442,6 +463,27 @@
                         dma-names = "tx", "rx";
                 };
 
+                sham: sham@480c3000 {
+                        compatible = "ti,omap3-sham";
+                        ti,hwmods = "sham";
+                        reg = <0x480c3000 0x64>;
+                        interrupts = <49>;
+                };
+
+                smartreflex_core: smartreflex@480cb000 {
+                        compatible = "ti,omap3-smartreflex-core";
+                        ti,hwmods = "smartreflex_core";
+                        reg = <0x480cb000 0x400>;
+                        interrupts = <19>;
+                };
+
+                smartreflex_mpu_iva: smartreflex@480c9000 {
+                        compatible = "ti,omap3-smartreflex-iva";
+                        ti,hwmods = "smartreflex_mpu_iva";
+                        reg = <0x480c9000 0x400>;
+                        interrupts = <18>;
+                };
+
                 timer1: timer@48318000 {
                         compatible = "ti,omap3430-timer";
                         reg = <0x48318000 0x400>;
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
index 298e85020e1b..88c6a05cab41 100644
--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
@@ -246,15 +246,6 @@
                         0xf0 (PIN_INPUT_PULLUP | MUX_MODE0)     /* i2c4_sda */
                 >;
         };
-};
-
-&omap4_pmx_wkup {
-        led_wkgpio_pins: pinmux_leds_wkpins {
-                pinctrl-single,pins = <
-                        0x1a (PIN_OUTPUT | MUX_MODE3)   /* gpio_wk7 */
-                        0x1c (PIN_OUTPUT | MUX_MODE3)   /* gpio_wk8 */
-                >;
-        };
 
         /*
          * wl12xx GPIO outputs for WLAN_EN, BT_EN, FM_EN, BT_WAKEUP
@@ -274,7 +265,7 @@
                 pinctrl-single,pins = <
                         0x38 (PIN_INPUT | MUX_MODE3)            /* gpmc_ncs2.gpio_52 */
                         0x3a (PIN_INPUT | MUX_MODE3)            /* gpmc_ncs3.gpio_53 */
-                        0x108 (PIN_OUTPUT | MUX_MODE0)          /* sdmmc5_clk.sdmmc5_clk */
+                        0x108 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_clk.sdmmc5_clk */
                         0x10a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_cmd.sdmmc5_cmd */
                         0x10c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat0.sdmmc5_dat0 */
                         0x10e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat1.sdmmc5_dat1 */
@@ -284,6 +275,15 @@
         };
 };
 
+&omap4_pmx_wkup {
+        led_wkgpio_pins: pinmux_leds_wkpins {
+                pinctrl-single,pins = <
+                        0x1a (PIN_OUTPUT | MUX_MODE3)   /* gpio_wk7 */
+                        0x1c (PIN_OUTPUT | MUX_MODE3)   /* gpio_wk8 */
+                >;
+        };
+};
+
 &i2c1 {
         pinctrl-names = "default";
         pinctrl-0 = <&i2c1_pins>;
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index 5fc3f43c5a81..dbc81fb6ef03 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -300,12 +300,12 @@
         wl12xx_pins: pinmux_wl12xx_pins {
                 pinctrl-single,pins = <
                         0x3a (PIN_INPUT | MUX_MODE3)            /* gpmc_ncs3.gpio_53 */
-                        0x108 (PIN_OUTPUT | MUX_MODE3)          /* sdmmc5_clk.sdmmc5_clk */
-                        0x10a (PIN_INPUT_PULLUP | MUX_MODE3)    /* sdmmc5_cmd.sdmmc5_cmd */
-                        0x10c (PIN_INPUT_PULLUP | MUX_MODE3)    /* sdmmc5_dat0.sdmmc5_dat0 */
-                        0x10e (PIN_INPUT_PULLUP | MUX_MODE3)    /* sdmmc5_dat1.sdmmc5_dat1 */
-                        0x110 (PIN_INPUT_PULLUP | MUX_MODE3)    /* sdmmc5_dat2.sdmmc5_dat2 */
-                        0x112 (PIN_INPUT_PULLUP | MUX_MODE3)    /* sdmmc5_dat3.sdmmc5_dat3 */
+                        0x108 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_clk.sdmmc5_clk */
+                        0x10a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_cmd.sdmmc5_cmd */
+                        0x10c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat0.sdmmc5_dat0 */
+                        0x10e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat1.sdmmc5_dat1 */
+                        0x110 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat2.sdmmc5_dat2 */
+                        0x112 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc5_dat3.sdmmc5_dat3 */
                 >;
         };
 };
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 6d09b8d42fdd..f936476c2753 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -245,14 +245,14 @@
 
                                         mpu_periph_clk: mpu_periph_clk {
                                                 #clock-cells = <0>;
-                                                compatible = "altr,socfpga-gate-clk";
+                                                compatible = "altr,socfpga-perip-clk";
                                                 clocks = <&mpuclk>;
                                                 fixed-divider = <4>;
                                         };
 
                                         mpu_l2_ram_clk: mpu_l2_ram_clk {
                                                 #clock-cells = <0>;
-                                                compatible = "altr,socfpga-gate-clk";
+                                                compatible = "altr,socfpga-perip-clk";
                                                 clocks = <&mpuclk>;
                                                 fixed-divider = <2>;
                                         };
@@ -266,8 +266,9 @@
 
                                         l3_main_clk: l3_main_clk {
                                                 #clock-cells = <0>;
-                                                compatible = "altr,socfpga-gate-clk";
+                                                compatible = "altr,socfpga-perip-clk";
                                                 clocks = <&mainclk>;
+                                                fixed-divider = <1>;
                                         };
 
                                         l3_mp_clk: l3_mp_clk {
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 4a5903e04827..c1df4e9db140 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -69,6 +69,7 @@ CONFIG_KS8851=y
 CONFIG_SMSC911X=y
 CONFIG_STMMAC_ETH=y
 CONFIG_MDIO_SUN4I=y
+CONFIG_TI_CPSW=y
 CONFIG_KEYBOARD_SPEAR=y
 CONFIG_SERIO_AMBAKMI=y
 CONFIG_SERIAL_8250=y
@@ -133,12 +134,14 @@ CONFIG_USB_GPIO_VBUS=y
 CONFIG_USB_ISP1301=y
 CONFIG_USB_MXS_PHY=y
 CONFIG_MMC=y
+CONFIG_MMC_BLOCK_MINORS=16
 CONFIG_MMC_ARMMMCI=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_PLTFM=y
 CONFIG_MMC_SDHCI_ESDHC_IMX=y
 CONFIG_MMC_SDHCI_TEGRA=y
 CONFIG_MMC_SDHCI_SPEAR=y
+CONFIG_MMC_SDHCI_BCM_KONA=y
 CONFIG_MMC_OMAP=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_EDAC=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 98a50c309b90..bfa80a11e8c7 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -173,6 +173,7 @@ CONFIG_MFD_PALMAS=y
 CONFIG_MFD_TPS65217=y
 CONFIG_MFD_TPS65910=y
 CONFIG_TWL6040_CORE=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_REGULATOR_PALMAS=y
 CONFIG_REGULATOR_TPS65023=y
 CONFIG_REGULATOR_TPS6507X=y
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index d57a85badb5e..3e2259b60236 100644
--- a/arch/arm/configs/sunxi_defconfig
+++ b/arch/arm/configs/sunxi_defconfig
@@ -12,6 +12,9 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
 # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
 # CONFIG_INET_XFRM_MODE_TUNNEL is not set
 # CONFIG_INET_XFRM_MODE_BEET is not set
@@ -58,4 +61,8 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
 CONFIG_COMMON_CLK_DEBUG=y
 # CONFIG_IOMMU_SUPPORT is not set
+CONFIG_TMPFS=y
+CONFIG_NFS_FS=y
+CONFIG_ROOT_NFS=y
 CONFIG_NLS=y
+CONFIG_PRINTK_TIME=y
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index ac632cc38f24..c6ebc184bf68 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMDLINE="root=/dev/ram0 console=ttyAMA2,115200n8"
 CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
 CONFIG_CPU_IDLE=y
+CONFIG_ARM_U8500_CPUIDLE=y
 CONFIG_VFP=y
 CONFIG_NEON=y
 CONFIG_PM_RUNTIME=y
@@ -109,6 +110,8 @@ CONFIG_EXT2_FS_SECURITY=y
 CONFIG_EXT3_FS=y
 CONFIG_EXT4_FS=y
 CONFIG_VFAT_FS=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
 # CONFIG_MISC_FILESYSTEMS is not set
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index be956dbf6bae..1571d126e9dd 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -61,7 +61,7 @@ extern void __pgd_error(const char *file, int line, pgd_t);
  * mapping to be mapped at.  This is particularly important for
  * non-high vector CPUs.
  */
-#define FIRST_USER_ADDRESS      PAGE_SIZE
+#define FIRST_USER_ADDRESS      (PAGE_SIZE * 2)
 
 /*
  * Use TASK_SIZE as the ceiling argument for free_pgtables() and
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index 57221e349a7c..f0d180d8b29f 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -14,11 +14,12 @@
 #include <asm/pgalloc.h>
 #include <asm/mmu_context.h>
 #include <asm/cacheflush.h>
+#include <asm/fncpy.h>
 #include <asm/mach-types.h>
 #include <asm/smp_plat.h>
 #include <asm/system_misc.h>
 
-extern const unsigned char relocate_new_kernel[];
+extern void relocate_new_kernel(void);
 extern const unsigned int relocate_new_kernel_size;
 
 extern unsigned long kexec_start_address;
@@ -142,6 +143,8 @@ void machine_kexec(struct kimage *image)
 {
         unsigned long page_list;
         unsigned long reboot_code_buffer_phys;
+        unsigned long reboot_entry = (unsigned long)relocate_new_kernel;
+        unsigned long reboot_entry_phys;
         void *reboot_code_buffer;
 
         /*
@@ -168,16 +171,16 @@ void machine_kexec(struct kimage *image)
 
 
         /* copy our kernel relocation code to the control code page */
-        memcpy(reboot_code_buffer,
-               relocate_new_kernel, relocate_new_kernel_size);
+        reboot_entry = fncpy(reboot_code_buffer,
+                             reboot_entry,
+                             relocate_new_kernel_size);
+        reboot_entry_phys = (unsigned long)reboot_entry +
+                (reboot_code_buffer_phys - (unsigned long)reboot_code_buffer);
 
-
-        flush_icache_range((unsigned long) reboot_code_buffer,
-                           (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
         printk(KERN_INFO "Bye!\n");
 
         if (kexec_reinit)
                 kexec_reinit();
 
-        soft_restart(reboot_code_buffer_phys);
+        soft_restart(reboot_entry_phys);
 }
diff --git a/arch/arm/kernel/relocate_kernel.S b/arch/arm/kernel/relocate_kernel.S
index d0cdedf4864d..95858966d84e 100644
--- a/arch/arm/kernel/relocate_kernel.S
+++ b/arch/arm/kernel/relocate_kernel.S
@@ -2,10 +2,12 @@
  * relocate_kernel.S - put the kernel image in place to boot
  */
 
+#include <linux/linkage.h>
 #include <asm/kexec.h>
 
-        .globl relocate_new_kernel
-relocate_new_kernel:
+        .align  3       /* not needed for this code, but keeps fncpy() happy */
+
+ENTRY(relocate_new_kernel)
 
         ldr     r0,kexec_indirection_page
         ldr     r1,kexec_start_address
@@ -79,6 +81,8 @@ kexec_mach_type:
 kexec_boot_atags:
         .long   0x0
 
+ENDPROC(relocate_new_kernel)
+
 relocate_new_kernel_end:
 
         .globl relocate_new_kernel_size
diff --git a/arch/arm/kernel/sigreturn_codes.S b/arch/arm/kernel/sigreturn_codes.S
index 3c5d0f2170fd..b84d0cb13682 100644
--- a/arch/arm/kernel/sigreturn_codes.S
+++ b/arch/arm/kernel/sigreturn_codes.S
@@ -30,6 +30,27 @@
  * snippets.
  */
 
+/*
+ * In CPU_THUMBONLY case kernel arm opcodes are not allowed.
+ * Note in this case codes skips those instructions but it uses .org
+ * directive to keep correct layout of sigreturn_codes array.
+ */
+#ifndef CONFIG_CPU_THUMBONLY
+#define ARM_OK(code...) code
+#else
+#define ARM_OK(code...)
+#endif
+
+        .macro arm_slot n
+        .org    sigreturn_codes + 12 * (\n)
+ARM_OK( .arm    )
+        .endm
+
+        .macro thumb_slot n
+        .org    sigreturn_codes + 12 * (\n) + 8
+        .thumb
+        .endm
+
 #if __LINUX_ARM_ARCH__ <= 4
         /*
          * Note we manually set minimally required arch that supports
@@ -45,26 +66,27 @@
         .global sigreturn_codes
         .type   sigreturn_codes, #object
 
-        .arm
+        .align
 
 sigreturn_codes:
 
         /* ARM sigreturn syscall code snippet */
-        mov     r7, #(__NR_sigreturn - __NR_SYSCALL_BASE)
-        swi     #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)
+        arm_slot 0
+ARM_OK( mov     r7, #(__NR_sigreturn - __NR_SYSCALL_BASE)       )
+ARM_OK( swi     #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)      )
 
         /* Thumb sigreturn syscall code snippet */
-        .thumb
+        thumb_slot 0
         movs    r7, #(__NR_sigreturn - __NR_SYSCALL_BASE)
         swi     #0
 
         /* ARM sigreturn_rt syscall code snippet */
-        .arm
-        mov     r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE)
-        swi     #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)
+        arm_slot 1
+ARM_OK( mov     r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE)    )
+ARM_OK( swi     #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)   )
 
         /* Thumb sigreturn_rt syscall code snippet */
-        .thumb
+        thumb_slot 1
         movs    r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE)
         swi     #0
 
@@ -74,7 +96,7 @@ sigreturn_codes:
          * it is thumb case or not, so we need additional
          * word after real last entry.
          */
-        .arm
+        arm_slot 2
         .space  4
 
         .size   sigreturn_codes, . - sigreturn_codes
diff --git a/arch/arm/lib/delay-loop.S b/arch/arm/lib/delay-loop.S
index 36b668d8e121..bc1033b897b4 100644
--- a/arch/arm/lib/delay-loop.S
+++ b/arch/arm/lib/delay-loop.S
@@ -40,6 +40,7 @@ ENTRY(__loop_const_udelay)			@ 0 <= r0 <= 0x7fffff06
 /*
  * loops = r0 * HZ * loops_per_jiffy / 1000000
  */
+                .align 3
 
 @ Delay routine
 ENTRY(__loop_delay)
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index f607deb40f4d..bc7b363a3083 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -174,7 +174,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
 static struct clock_event_device clkevt = {
         .name           = "at91_tick",
         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-        .shift          = 32,
         .rating         = 150,
         .set_next_event = clkevt32k_next_event,
         .set_mode       = clkevt32k_mode,
@@ -265,11 +264,9 @@ void __init at91rm9200_timer_init(void)
         at91_st_write(AT91_ST_RTMR, 1);
 
         /* Setup timer clockevent, with minimum of two ticks (important!!) */
-        clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
-        clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
-        clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
         clkevt.cpumask = cpumask_of(0);
-        clockevents_register_device(&clkevt);
+        clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK,
+                                        2, AT91_ST_ALMV);
 
         /* register clocksource */
         clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index 3ed190ce062b..c5101dcb4fb0 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -16,7 +16,11 @@
 #include <mach/at91_ramc.h>
 #include <mach/at91rm9200_sdramc.h>
 
+#ifdef CONFIG_PM
 extern void at91_pm_set_standby(void (*at91_standby)(void));
+#else
+static inline void at91_pm_set_standby(void (*at91_standby)(void)) { }
+#endif
 
 /*
  * The AT91RM9200 goes into self-refresh mode with this command, and will
diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
index 3ea86428ee09..a28873fe3049 100644
--- a/arch/arm/mach-at91/sama5d3.c
+++ b/arch/arm/mach-at91/sama5d3.c
@@ -95,19 +95,19 @@ static struct clk twi0_clk = {
         .name           = "twi0_clk",
         .pid            = SAMA5D3_ID_TWI0,
         .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
+        .div            = AT91_PMC_PCR_DIV8,
 };
 static struct clk twi1_clk = {
         .name           = "twi1_clk",
         .pid            = SAMA5D3_ID_TWI1,
         .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
+        .div            = AT91_PMC_PCR_DIV8,
 };
 static struct clk twi2_clk = {
         .name           = "twi2_clk",
         .pid            = SAMA5D3_ID_TWI2,
         .type           = CLK_TYPE_PERIPHERAL,
-        .div            = AT91_PMC_PCR_DIV2,
+        .div            = AT91_PMC_PCR_DIV8,
 };
 static struct clk mmc0_clk = {
         .name           = "mci0_clk",
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index 2739ca2c1334..e0091685fd48 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -15,6 +15,7 @@
 #include <linux/init.h>
 #include <linux/io.h>
 #include <linux/spinlock.h>
+#include <video/vga.h>
 
 #include <asm/pgtable.h>
 #include <asm/page.h>
@@ -196,6 +197,8 @@ void __init footbridge_map_io(void)
                 iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
                 pci_map_io_early(__phys_to_pfn(DC21285_PCI_IO));
         }
+
+        vga_base = PCIMEM_BASE;
 }
 
 void footbridge_restart(enum reboot_mode mode, const char *cmd)
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index 3490a24f969e..7c2fdae9a38b 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -18,7 +18,6 @@
 #include <linux/irq.h>
 #include <linux/io.h>
 #include <linux/spinlock.h>
-#include <video/vga.h>
 
 #include <asm/irq.h>
 #include <asm/mach/pci.h>
@@ -291,7 +290,6 @@ void __init dc21285_preinit(void)
         int cfn_mode;
 
         pcibios_min_mem = 0x81000000;
-        vga_base = PCIMEM_BASE;
 
         mem_size = (unsigned int)high_memory - PAGE_OFFSET;
         for (mem_mask = 0x00100000; mem_mask < 0x10000000; mem_mask <<= 1)
diff --git a/arch/arm/mach-footbridge/ebsa285.c b/arch/arm/mach-footbridge/ebsa285.c
index b08243500e2e..1a7235fb52ac 100644
--- a/arch/arm/mach-footbridge/ebsa285.c
+++ b/arch/arm/mach-footbridge/ebsa285.c
@@ -30,21 +30,24 @@ static const struct {
         const char *name;
         const char *trigger;
 } ebsa285_leds[] = {
-        { "ebsa285:amber", "heartbeat", },
-        { "ebsa285:green", "cpu0", },
+        { "ebsa285:amber", "cpu0", },
+        { "ebsa285:green", "heartbeat", },
         { "ebsa285:red",},
 };
 
+static unsigned char hw_led_state;
+
 static void ebsa285_led_set(struct led_classdev *cdev,
                 enum led_brightness b)
 {
         struct ebsa285_led *led = container_of(cdev,
                         struct ebsa285_led, cdev);
 
-        if (b != LED_OFF)
-                *XBUS_LEDS |= led->mask;
+        if (b == LED_OFF)
+                hw_led_state |= led->mask;
         else
-                *XBUS_LEDS &= ~led->mask;
+                hw_led_state &= ~led->mask;
+        *XBUS_LEDS = hw_led_state;
 }
 
 static enum led_brightness ebsa285_led_get(struct led_classdev *cdev)
@@ -52,18 +55,19 @@ static enum led_brightness ebsa285_led_get(struct led_classdev *cdev)
         struct ebsa285_led *led = container_of(cdev,
                         struct ebsa285_led, cdev);
 
-        return (*XBUS_LEDS & led->mask) ? LED_FULL : LED_OFF;
+        return hw_led_state & led->mask ? LED_OFF : LED_FULL;
 }
 
 static int __init ebsa285_leds_init(void)
 {
         int i;
 
-        if (machine_is_ebsa285())
+        if (!machine_is_ebsa285())
                 return -ENODEV;
 
-        /* 3 LEDS All ON */
-        *XBUS_LEDS |= XBUS_LED_AMBER | XBUS_LED_GREEN | XBUS_LED_RED;
+        /* 3 LEDS all off */
+        hw_led_state = XBUS_LED_AMBER | XBUS_LED_GREEN | XBUS_LED_RED;
+        *XBUS_LEDS = hw_led_state;
 
         for (i = 0; i < ARRAY_SIZE(ebsa285_leds); i++) {
                 struct ebsa285_led *led;
diff --git a/arch/arm/mach-omap2/dss-common.c b/arch/arm/mach-omap2/dss-common.c
index 365bfd3d9c68..dadccc91488c 100644
--- a/arch/arm/mach-omap2/dss-common.c
+++ b/arch/arm/mach-omap2/dss-common.c
@@ -223,7 +223,7 @@ void __init omap_4430sdp_display_init_of(void)
 static struct connector_dvi_platform_data omap3_igep2_dvi_connector_pdata = {
         .name                   = "dvi",
         .source                 = "tfp410.0",
-        .i2c_bus_num            = 3,
+        .i2c_bus_num            = 2,
 };
 
 static struct platform_device omap3_igep2_dvi_connector_device = {
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 10c71450cf63..39f020c982e8 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -139,6 +139,7 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
 
 static struct pdata_init pdata_quirks[] __initdata = {
 #ifdef CONFIG_ARCH_OMAP3
+        { "nokia,omap3-n900", hsmmc2_internal_input_clk, },
         { "nokia,omap3-n9", hsmmc2_internal_input_clk, },
         { "nokia,omap3-n950", hsmmc2_internal_input_clk, },
         { "isee,omap3-igep0020", omap3_igep0020_legacy_init, },
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index e233dfcbc186..93a2a6e4260f 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -128,7 +128,8 @@ skip_voltdm:
         for (i = 0; i < pwrdm->banks; i++)
                 pwrdm->ret_mem_off_counter[i] = 0;
 
-        arch_pwrdm->pwrdm_wait_transition(pwrdm);
+        if (arch_pwrdm && arch_pwrdm->pwrdm_wait_transition)
+                arch_pwrdm->pwrdm_wait_transition(pwrdm);
         pwrdm->state = pwrdm_read_pwrst(pwrdm);
         pwrdm->state_counter[pwrdm->state] = 1;
 
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 037100a1563a..aee77f06f887 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -10,6 +10,7 @@ config ARCH_SOCFPGA
         select GENERIC_CLOCKEVENTS
         select GPIO_PL061 if GPIOLIB
         select HAVE_ARM_SCU
+        select HAVE_ARM_TWD if SMP
         select HAVE_SMP
         select MFD_SYSCON
         select SPARSE_IRQ
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 2e85c1e72535..12c7e5c03ea4 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -140,6 +140,10 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
         /* Requires call-back bindings. */
         OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
         /* Requires DMA bindings. */
+        OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0",  &mop500_sdi0_data),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1",  &mop500_sdi1_data),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2",  &mop500_sdi2_data),
+        OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4",  &mop500_sdi4_data),
         OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
                        "ux500-msp-i2s.0", &msp0_platform_data),
         OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 79f8b39801a8..f6b6bfa88ecf 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -9,6 +9,7 @@
  *
  *  DMA uncached mapping support.
  */
+#include <linux/bootmem.h>
 #include <linux/module.h>
 #include <linux/mm.h>
 #include <linux/gfp.h>
@@ -162,6 +163,8 @@ static u64 get_coherent_dma_mask(struct device *dev)
         u64 mask = (u64)DMA_BIT_MASK(32);
 
         if (dev) {
+                unsigned long max_dma_pfn;
+
                 mask = dev->coherent_dma_mask;
 
                 /*
@@ -173,6 +176,8 @@ static u64 get_coherent_dma_mask(struct device *dev)
                         return 0;
                 }
 
+                max_dma_pfn = min(max_pfn, arm_dma_pfn_limit);
+
                 /*
                  * If the mask allows for more memory than we can address,
                  * and we actually have that much memory, then fail the
@@ -180,7 +185,7 @@ static u64 get_coherent_dma_mask(struct device *dev)
                  */
                 if (sizeof(mask) != sizeof(dma_addr_t) &&
                     mask > (dma_addr_t)~0 &&
-                    dma_to_pfn(dev, ~0) > arm_dma_pfn_limit) {
+                    dma_to_pfn(dev, ~0) > max_dma_pfn) {
                         dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
                                  mask);
                         dev_warn(dev, "Driver did not use or check the return value from dma_set_coherent_mask()?\n");
@@ -192,7 +197,7 @@ static u64 get_coherent_dma_mask(struct device *dev)
                  * fits within the allowable addresses which we can
                  * allocate.
                  */
-                if (dma_to_pfn(dev, mask) < arm_dma_pfn_limit) {
+                if (dma_to_pfn(dev, mask) < max_dma_pfn) {
                         dev_warn(dev, "Coherent DMA mask %#llx (pfn %#lx-%#lx) covers a smaller range of system memory than the DMA zone pfn 0x0-%#lx\n",
                                  mask,
                                  dma_to_pfn(dev, 0), dma_to_pfn(dev, mask) + 1,
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index d27158c38eb0..5e85ed371364 100644
--- a/arch/arm/mm/mmap.c
+++ b/arch/arm/mm/mmap.c
@@ -146,7 +146,7 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
 
         info.flags = VM_UNMAPPED_AREA_TOPDOWN;
         info.length = len;
-        info.low_limit = PAGE_SIZE;
+        info.low_limit = FIRST_USER_ADDRESS;
         info.high_limit = mm->mmap_base;
         info.align_mask = do_align ? (PAGE_MASK & (SHMLBA - 1)) : 0;
         info.align_offset = pgoff << PAGE_SHIFT;
diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c
index 0acb089d0f70..1046b373d1ae 100644
--- a/arch/arm/mm/pgd.c
+++ b/arch/arm/mm/pgd.c
@@ -87,7 +87,8 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
                 init_pud = pud_offset(init_pgd, 0);
                 init_pmd = pmd_offset(init_pud, 0);
                 init_pte = pte_offset_map(init_pmd, 0);
-                set_pte_ext(new_pte, *init_pte, 0);
+                set_pte_ext(new_pte + 0, init_pte[0], 0);
+                set_pte_ext(new_pte + 1, init_pte[1], 0);
                 pte_unmap(init_pte);
                 pte_unmap(new_pte);
         }
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index fb92abb91628..2861b155485a 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -336,8 +336,11 @@ static inline void __omap_dm_timer_enable_posted(struct omap_dm_timer *timer)
         if (timer->posted)
                 return;
 
-        if (timer->errata & OMAP_TIMER_ERRATA_I103_I767)
+        if (timer->errata & OMAP_TIMER_ERRATA_I103_I767) {
+                timer->posted = OMAP_TIMER_NONPOSTED;
+                __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG, 0, 0);
                 return;
+        }
 
         __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG,
                               OMAP_TIMER_CTRL_POSTED, 0);
diff --git a/arch/arm/xen/p2m.c b/arch/arm/xen/p2m.c
index 23732cdff551..b31ee1b275b0 100644
--- a/arch/arm/xen/p2m.c
+++ b/arch/arm/xen/p2m.c
@@ -25,8 +25,9 @@ struct xen_p2m_entry {
         struct rb_node rbnode_phys;
 };
 
-rwlock_t p2m_lock;
+static rwlock_t p2m_lock;
 struct rb_root phys_to_mach = RB_ROOT;
+EXPORT_SYMBOL_GPL(phys_to_mach);
 static struct rb_root mach_to_phys = RB_ROOT;
 
 static int xen_add_phys_to_mach_entry(struct xen_p2m_entry *new)
@@ -200,7 +201,7 @@ bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn)
 }
 EXPORT_SYMBOL_GPL(__set_phys_to_machine);
 
-int p2m_init(void)
+static int p2m_init(void)
 {
         rwlock_init(&p2m_lock);
         return 0;