3 files changed, 17 insertions, 5 deletions

diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index 17f5f4439fe7..68bc6b226ec7 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -16,4 +16,14 @@ config REALVIEW_MPCORE
           kernel built with this option enabled is not compatible with
           other tiles.
 
+config REALVIEW_MPCORE_REVB
+        bool "Support MPcore RevB tile"
+        depends on REALVIEW_MPCORE
+        default n
+        help
+          Enable support for the MPCore RevB tile on the Realview platform.
+          Since there are device address differences, a
+          kernel built with this option enabled is not compatible with
+          other tiles.
+
 endmenu
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 00139143dcc1..effe243454e0 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -152,9 +152,9 @@ static void __init gic_init_irq(void)
 #ifdef CONFIG_REALVIEW_MPCORE
         unsigned int pldctrl;
         writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
-        pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + 0xd8);
+        pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_MPCORE_SYS_PLD_CTRL1);
         pldctrl |= 0x00800000;  /* New irq mode */
-        writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + 0xd8);
+        writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_MPCORE_SYS_PLD_CTRL1);
         writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
 #endif
         gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29);
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 7b1843befb9c..f27d9eb64803 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -14,10 +14,13 @@
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
 #include <asm/elf.h>
-#include <asm/hardware/arm_scu.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
 
+#ifdef CONFIG_SMP
+#include <asm/hardware/arm_scu.h>
+#endif
+
 #include "proc-macros.S"
 
 #define D_CACHE_LINE_SIZE       32
@@ -183,8 +186,7 @@ __v6_setup:
         /* Set up the SCU on core 0 only */
         mrc     p15, 0, r0, c0, c0, 5           @ CPU core number
         ands    r0, r0, #15
-        moveq   r0, #0x10000000 @ SCU_BASE
-        orreq   r0, r0, #0x00100000
+        ldreq   r0, =SCU_BASE
         ldreq   r5, [r0, #SCU_CTRL]
         orreq   r5, r5, #1
         streq   r5, [r0, #SCU_CTRL]