diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-omap2/id.c | 186 | ||||
-rw-r--r-- | arch/arm/mach-omap2/io.c | 9 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/cpu.h | 7 |
3 files changed, 92 insertions, 110 deletions
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 6c5826605eae..92e4d5558b1e 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c | |||
@@ -29,7 +29,7 @@ | |||
29 | #include "control.h" | 29 | #include "control.h" |
30 | 30 | ||
31 | static unsigned int omap_revision; | 31 | static unsigned int omap_revision; |
32 | 32 | static const char *cpu_rev; | |
33 | u32 omap_features; | 33 | u32 omap_features; |
34 | 34 | ||
35 | unsigned int omap_rev(void) | 35 | unsigned int omap_rev(void) |
@@ -112,7 +112,7 @@ void omap_get_die_id(struct omap_die_id *odi) | |||
112 | odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_3); | 112 | odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_3); |
113 | } | 113 | } |
114 | 114 | ||
115 | static void __init omap24xx_check_revision(void) | 115 | void __init omap2xxx_check_revision(void) |
116 | { | 116 | { |
117 | int i, j; | 117 | int i, j; |
118 | u32 idcode, prod_id; | 118 | u32 idcode, prod_id; |
@@ -166,13 +166,63 @@ static void __init omap24xx_check_revision(void) | |||
166 | pr_info("\n"); | 166 | pr_info("\n"); |
167 | } | 167 | } |
168 | 168 | ||
169 | #define OMAP3_SHOW_FEATURE(feat) \ | ||
170 | if (omap3_has_ ##feat()) \ | ||
171 | printk(#feat" "); | ||
172 | |||
173 | static void __init omap3_cpuinfo(void) | ||
174 | { | ||
175 | const char *cpu_name; | ||
176 | |||
177 | /* | ||
178 | * OMAP3430 and OMAP3530 are assumed to be same. | ||
179 | * | ||
180 | * OMAP3525, OMAP3515 and OMAP3503 can be detected only based | ||
181 | * on available features. Upon detection, update the CPU id | ||
182 | * and CPU class bits. | ||
183 | */ | ||
184 | if (cpu_is_omap3630()) { | ||
185 | cpu_name = "OMAP3630"; | ||
186 | } else if (cpu_is_omap3517()) { | ||
187 | /* AM35xx devices */ | ||
188 | cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505"; | ||
189 | } else if (cpu_is_ti816x()) { | ||
190 | cpu_name = "TI816X"; | ||
191 | } else if (cpu_is_am335x()) { | ||
192 | cpu_name = "AM335X"; | ||
193 | } else if (cpu_is_ti814x()) { | ||
194 | cpu_name = "TI814X"; | ||
195 | } else if (omap3_has_iva() && omap3_has_sgx()) { | ||
196 | /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */ | ||
197 | cpu_name = "OMAP3430/3530"; | ||
198 | } else if (omap3_has_iva()) { | ||
199 | cpu_name = "OMAP3525"; | ||
200 | } else if (omap3_has_sgx()) { | ||
201 | cpu_name = "OMAP3515"; | ||
202 | } else { | ||
203 | cpu_name = "OMAP3503"; | ||
204 | } | ||
205 | |||
206 | /* Print verbose information */ | ||
207 | pr_info("%s ES%s (", cpu_name, cpu_rev); | ||
208 | |||
209 | OMAP3_SHOW_FEATURE(l2cache); | ||
210 | OMAP3_SHOW_FEATURE(iva); | ||
211 | OMAP3_SHOW_FEATURE(sgx); | ||
212 | OMAP3_SHOW_FEATURE(neon); | ||
213 | OMAP3_SHOW_FEATURE(isp); | ||
214 | OMAP3_SHOW_FEATURE(192mhz_clk); | ||
215 | |||
216 | printk(")\n"); | ||
217 | } | ||
218 | |||
169 | #define OMAP3_CHECK_FEATURE(status,feat) \ | 219 | #define OMAP3_CHECK_FEATURE(status,feat) \ |
170 | if (((status & OMAP3_ ##feat## _MASK) \ | 220 | if (((status & OMAP3_ ##feat## _MASK) \ |
171 | >> OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) { \ | 221 | >> OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) { \ |
172 | omap_features |= OMAP3_HAS_ ##feat; \ | 222 | omap_features |= OMAP3_HAS_ ##feat; \ |
173 | } | 223 | } |
174 | 224 | ||
175 | static void __init omap3_check_features(void) | 225 | void __init omap3xxx_check_features(void) |
176 | { | 226 | { |
177 | u32 status; | 227 | u32 status; |
178 | 228 | ||
@@ -199,9 +249,11 @@ static void __init omap3_check_features(void) | |||
199 | * TODO: Get additional info (where applicable) | 249 | * TODO: Get additional info (where applicable) |
200 | * e.g. Size of L2 cache. | 250 | * e.g. Size of L2 cache. |
201 | */ | 251 | */ |
252 | |||
253 | omap3_cpuinfo(); | ||
202 | } | 254 | } |
203 | 255 | ||
204 | static void __init omap4_check_features(void) | 256 | void __init omap4xxx_check_features(void) |
205 | { | 257 | { |
206 | u32 si_type; | 258 | u32 si_type; |
207 | 259 | ||
@@ -226,12 +278,13 @@ static void __init omap4_check_features(void) | |||
226 | } | 278 | } |
227 | } | 279 | } |
228 | 280 | ||
229 | static void __init ti81xx_check_features(void) | 281 | void __init ti81xx_check_features(void) |
230 | { | 282 | { |
231 | omap_features = OMAP3_HAS_NEON; | 283 | omap_features = OMAP3_HAS_NEON; |
284 | omap3_cpuinfo(); | ||
232 | } | 285 | } |
233 | 286 | ||
234 | static void __init omap3_check_revision(const char **cpu_rev) | 287 | void __init omap3xxx_check_revision(void) |
235 | { | 288 | { |
236 | u32 cpuid, idcode; | 289 | u32 cpuid, idcode; |
237 | u16 hawkeye; | 290 | u16 hawkeye; |
@@ -245,7 +298,7 @@ static void __init omap3_check_revision(const char **cpu_rev) | |||
245 | cpuid = read_cpuid(CPUID_ID); | 298 | cpuid = read_cpuid(CPUID_ID); |
246 | if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { | 299 | if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { |
247 | omap_revision = OMAP3430_REV_ES1_0; | 300 | omap_revision = OMAP3430_REV_ES1_0; |
248 | *cpu_rev = "1.0"; | 301 | cpu_rev = "1.0"; |
249 | return; | 302 | return; |
250 | } | 303 | } |
251 | 304 | ||
@@ -266,26 +319,26 @@ static void __init omap3_check_revision(const char **cpu_rev) | |||
266 | case 0: /* Take care of early samples */ | 319 | case 0: /* Take care of early samples */ |
267 | case 1: | 320 | case 1: |
268 | omap_revision = OMAP3430_REV_ES2_0; | 321 | omap_revision = OMAP3430_REV_ES2_0; |
269 | *cpu_rev = "2.0"; | 322 | cpu_rev = "2.0"; |
270 | break; | 323 | break; |
271 | case 2: | 324 | case 2: |
272 | omap_revision = OMAP3430_REV_ES2_1; | 325 | omap_revision = OMAP3430_REV_ES2_1; |
273 | *cpu_rev = "2.1"; | 326 | cpu_rev = "2.1"; |
274 | break; | 327 | break; |
275 | case 3: | 328 | case 3: |
276 | omap_revision = OMAP3430_REV_ES3_0; | 329 | omap_revision = OMAP3430_REV_ES3_0; |
277 | *cpu_rev = "3.0"; | 330 | cpu_rev = "3.0"; |
278 | break; | 331 | break; |
279 | case 4: | 332 | case 4: |
280 | omap_revision = OMAP3430_REV_ES3_1; | 333 | omap_revision = OMAP3430_REV_ES3_1; |
281 | *cpu_rev = "3.1"; | 334 | cpu_rev = "3.1"; |
282 | break; | 335 | break; |
283 | case 7: | 336 | case 7: |
284 | /* FALLTHROUGH */ | 337 | /* FALLTHROUGH */ |
285 | default: | 338 | default: |
286 | /* Use the latest known revision as default */ | 339 | /* Use the latest known revision as default */ |
287 | omap_revision = OMAP3430_REV_ES3_1_2; | 340 | omap_revision = OMAP3430_REV_ES3_1_2; |
288 | *cpu_rev = "3.1.2"; | 341 | cpu_rev = "3.1.2"; |
289 | } | 342 | } |
290 | break; | 343 | break; |
291 | case 0xb868: | 344 | case 0xb868: |
@@ -298,13 +351,13 @@ static void __init omap3_check_revision(const char **cpu_rev) | |||
298 | switch (rev) { | 351 | switch (rev) { |
299 | case 0: | 352 | case 0: |
300 | omap_revision = OMAP3517_REV_ES1_0; | 353 | omap_revision = OMAP3517_REV_ES1_0; |
301 | *cpu_rev = "1.0"; | 354 | cpu_rev = "1.0"; |
302 | break; | 355 | break; |
303 | case 1: | 356 | case 1: |
304 | /* FALLTHROUGH */ | 357 | /* FALLTHROUGH */ |
305 | default: | 358 | default: |
306 | omap_revision = OMAP3517_REV_ES1_1; | 359 | omap_revision = OMAP3517_REV_ES1_1; |
307 | *cpu_rev = "1.1"; | 360 | cpu_rev = "1.1"; |
308 | } | 361 | } |
309 | break; | 362 | break; |
310 | case 0xb891: | 363 | case 0xb891: |
@@ -313,65 +366,65 @@ static void __init omap3_check_revision(const char **cpu_rev) | |||
313 | switch(rev) { | 366 | switch(rev) { |
314 | case 0: /* Take care of early samples */ | 367 | case 0: /* Take care of early samples */ |
315 | omap_revision = OMAP3630_REV_ES1_0; | 368 | omap_revision = OMAP3630_REV_ES1_0; |
316 | *cpu_rev = "1.0"; | 369 | cpu_rev = "1.0"; |
317 | break; | 370 | break; |
318 | case 1: | 371 | case 1: |
319 | omap_revision = OMAP3630_REV_ES1_1; | 372 | omap_revision = OMAP3630_REV_ES1_1; |
320 | *cpu_rev = "1.1"; | 373 | cpu_rev = "1.1"; |
321 | break; | 374 | break; |
322 | case 2: | 375 | case 2: |
323 | /* FALLTHROUGH */ | 376 | /* FALLTHROUGH */ |
324 | default: | 377 | default: |
325 | omap_revision = OMAP3630_REV_ES1_2; | 378 | omap_revision = OMAP3630_REV_ES1_2; |
326 | *cpu_rev = "1.2"; | 379 | cpu_rev = "1.2"; |
327 | } | 380 | } |
328 | break; | 381 | break; |
329 | case 0xb81e: | 382 | case 0xb81e: |
330 | switch (rev) { | 383 | switch (rev) { |
331 | case 0: | 384 | case 0: |
332 | omap_revision = TI8168_REV_ES1_0; | 385 | omap_revision = TI8168_REV_ES1_0; |
333 | *cpu_rev = "1.0"; | 386 | cpu_rev = "1.0"; |
334 | break; | 387 | break; |
335 | case 1: | 388 | case 1: |
336 | /* FALLTHROUGH */ | 389 | /* FALLTHROUGH */ |
337 | default: | 390 | default: |
338 | omap_revision = TI8168_REV_ES1_1; | 391 | omap_revision = TI8168_REV_ES1_1; |
339 | *cpu_rev = "1.1"; | 392 | cpu_rev = "1.1"; |
340 | break; | 393 | break; |
341 | } | 394 | } |
342 | break; | 395 | break; |
343 | case 0xb944: | 396 | case 0xb944: |
344 | omap_revision = AM335X_REV_ES1_0; | 397 | omap_revision = AM335X_REV_ES1_0; |
345 | *cpu_rev = "1.0"; | 398 | cpu_rev = "1.0"; |
346 | case 0xb8f2: | 399 | case 0xb8f2: |
347 | switch (rev) { | 400 | switch (rev) { |
348 | case 0: | 401 | case 0: |
349 | /* FALLTHROUGH */ | 402 | /* FALLTHROUGH */ |
350 | case 1: | 403 | case 1: |
351 | omap_revision = TI8148_REV_ES1_0; | 404 | omap_revision = TI8148_REV_ES1_0; |
352 | *cpu_rev = "1.0"; | 405 | cpu_rev = "1.0"; |
353 | break; | 406 | break; |
354 | case 2: | 407 | case 2: |
355 | omap_revision = TI8148_REV_ES2_0; | 408 | omap_revision = TI8148_REV_ES2_0; |
356 | *cpu_rev = "2.0"; | 409 | cpu_rev = "2.0"; |
357 | break; | 410 | break; |
358 | case 3: | 411 | case 3: |
359 | /* FALLTHROUGH */ | 412 | /* FALLTHROUGH */ |
360 | default: | 413 | default: |
361 | omap_revision = TI8148_REV_ES2_1; | 414 | omap_revision = TI8148_REV_ES2_1; |
362 | *cpu_rev = "2.1"; | 415 | cpu_rev = "2.1"; |
363 | break; | 416 | break; |
364 | } | 417 | } |
365 | break; | 418 | break; |
366 | default: | 419 | default: |
367 | /* Unknown default to latest silicon rev as default */ | 420 | /* Unknown default to latest silicon rev as default */ |
368 | omap_revision = OMAP3630_REV_ES1_2; | 421 | omap_revision = OMAP3630_REV_ES1_2; |
369 | *cpu_rev = "1.2"; | 422 | cpu_rev = "1.2"; |
370 | pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n"); | 423 | pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n"); |
371 | } | 424 | } |
372 | } | 425 | } |
373 | 426 | ||
374 | static void __init omap4_check_revision(void) | 427 | void __init omap4xxx_check_revision(void) |
375 | { | 428 | { |
376 | u32 idcode; | 429 | u32 idcode; |
377 | u16 hawkeye; | 430 | u16 hawkeye; |
@@ -444,89 +497,6 @@ static void __init omap4_check_revision(void) | |||
444 | ((omap_rev() >> 12) & 0xf), ((omap_rev() >> 8) & 0xf)); | 497 | ((omap_rev() >> 12) & 0xf), ((omap_rev() >> 8) & 0xf)); |
445 | } | 498 | } |
446 | 499 | ||
447 | #define OMAP3_SHOW_FEATURE(feat) \ | ||
448 | if (omap3_has_ ##feat()) \ | ||
449 | printk(#feat" "); | ||
450 | |||
451 | static void __init omap3_cpuinfo(const char *cpu_rev) | ||
452 | { | ||
453 | const char *cpu_name; | ||
454 | |||
455 | /* | ||
456 | * OMAP3430 and OMAP3530 are assumed to be same. | ||
457 | * | ||
458 | * OMAP3525, OMAP3515 and OMAP3503 can be detected only based | ||
459 | * on available features. Upon detection, update the CPU id | ||
460 | * and CPU class bits. | ||
461 | */ | ||
462 | if (cpu_is_omap3630()) { | ||
463 | cpu_name = "OMAP3630"; | ||
464 | } else if (cpu_is_omap3517()) { | ||
465 | /* AM35xx devices */ | ||
466 | cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505"; | ||
467 | } else if (cpu_is_ti816x()) { | ||
468 | cpu_name = "TI816X"; | ||
469 | } else if (cpu_is_am335x()) { | ||
470 | cpu_name = "AM335X"; | ||
471 | } else if (cpu_is_ti814x()) { | ||
472 | cpu_name = "TI814X"; | ||
473 | } else if (omap3_has_iva() && omap3_has_sgx()) { | ||
474 | /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */ | ||
475 | cpu_name = "OMAP3430/3530"; | ||
476 | } else if (omap3_has_iva()) { | ||
477 | cpu_name = "OMAP3525"; | ||
478 | } else if (omap3_has_sgx()) { | ||
479 | cpu_name = "OMAP3515"; | ||
480 | } else { | ||
481 | cpu_name = "OMAP3503"; | ||
482 | } | ||
483 | |||
484 | /* Print verbose information */ | ||
485 | pr_info("%s ES%s (", cpu_name, cpu_rev); | ||
486 | |||
487 | OMAP3_SHOW_FEATURE(l2cache); | ||
488 | OMAP3_SHOW_FEATURE(iva); | ||
489 | OMAP3_SHOW_FEATURE(sgx); | ||
490 | OMAP3_SHOW_FEATURE(neon); | ||
491 | OMAP3_SHOW_FEATURE(isp); | ||
492 | OMAP3_SHOW_FEATURE(192mhz_clk); | ||
493 | |||
494 | printk(")\n"); | ||
495 | } | ||
496 | |||
497 | /* | ||
498 | * Try to detect the exact revision of the omap we're running on | ||
499 | */ | ||
500 | void __init omap2_check_revision(void) | ||
501 | { | ||
502 | const char *cpu_rev; | ||
503 | |||
504 | /* | ||
505 | * At this point we have an idea about the processor revision set | ||
506 | * earlier with omap2_set_globals_tap(). | ||
507 | */ | ||
508 | if (cpu_is_omap24xx()) { | ||
509 | omap24xx_check_revision(); | ||
510 | } else if (cpu_is_omap34xx()) { | ||
511 | omap3_check_revision(&cpu_rev); | ||
512 | |||
513 | /* TI81XX doesn't have feature register */ | ||
514 | if (!cpu_is_ti81xx()) | ||
515 | omap3_check_features(); | ||
516 | else | ||
517 | ti81xx_check_features(); | ||
518 | |||
519 | omap3_cpuinfo(cpu_rev); | ||
520 | return; | ||
521 | } else if (cpu_is_omap44xx()) { | ||
522 | omap4_check_revision(); | ||
523 | omap4_check_features(); | ||
524 | return; | ||
525 | } else { | ||
526 | pr_err("OMAP revision unknown, please fix!\n"); | ||
527 | } | ||
528 | } | ||
529 | |||
530 | /* | 500 | /* |
531 | * Set up things for map_io and processor detection later on. Gets called | 501 | * Set up things for map_io and processor detection later on. Gets called |
532 | * pretty much first thing from board init. For multi-omap, this gets | 502 | * pretty much first thing from board init. For multi-omap, this gets |
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index eb50c29fb644..5f8c4e1a3fb9 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
@@ -351,7 +351,6 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data) | |||
351 | 351 | ||
352 | static void __init omap_common_init_early(void) | 352 | static void __init omap_common_init_early(void) |
353 | { | 353 | { |
354 | omap2_check_revision(); | ||
355 | omap_init_consistent_dma_size(); | 354 | omap_init_consistent_dma_size(); |
356 | } | 355 | } |
357 | 356 | ||
@@ -392,6 +391,7 @@ static void __init omap_hwmod_init_postsetup(void) | |||
392 | void __init omap2420_init_early(void) | 391 | void __init omap2420_init_early(void) |
393 | { | 392 | { |
394 | omap2_set_globals_242x(); | 393 | omap2_set_globals_242x(); |
394 | omap2xxx_check_revision(); | ||
395 | omap_common_init_early(); | 395 | omap_common_init_early(); |
396 | omap2xxx_voltagedomains_init(); | 396 | omap2xxx_voltagedomains_init(); |
397 | omap242x_powerdomains_init(); | 397 | omap242x_powerdomains_init(); |
@@ -406,6 +406,7 @@ void __init omap2420_init_early(void) | |||
406 | void __init omap2430_init_early(void) | 406 | void __init omap2430_init_early(void) |
407 | { | 407 | { |
408 | omap2_set_globals_243x(); | 408 | omap2_set_globals_243x(); |
409 | omap2xxx_check_revision(); | ||
409 | omap_common_init_early(); | 410 | omap_common_init_early(); |
410 | omap2xxx_voltagedomains_init(); | 411 | omap2xxx_voltagedomains_init(); |
411 | omap243x_powerdomains_init(); | 412 | omap243x_powerdomains_init(); |
@@ -424,6 +425,8 @@ void __init omap2430_init_early(void) | |||
424 | void __init omap3_init_early(void) | 425 | void __init omap3_init_early(void) |
425 | { | 426 | { |
426 | omap2_set_globals_3xxx(); | 427 | omap2_set_globals_3xxx(); |
428 | omap3xxx_check_revision(); | ||
429 | omap3xxx_check_features(); | ||
427 | omap_common_init_early(); | 430 | omap_common_init_early(); |
428 | omap3xxx_voltagedomains_init(); | 431 | omap3xxx_voltagedomains_init(); |
429 | omap3xxx_powerdomains_init(); | 432 | omap3xxx_powerdomains_init(); |
@@ -456,6 +459,8 @@ void __init am35xx_init_early(void) | |||
456 | void __init ti81xx_init_early(void) | 459 | void __init ti81xx_init_early(void) |
457 | { | 460 | { |
458 | omap2_set_globals_ti81xx(); | 461 | omap2_set_globals_ti81xx(); |
462 | omap3xxx_check_revision(); | ||
463 | ti81xx_check_features(); | ||
459 | omap_common_init_early(); | 464 | omap_common_init_early(); |
460 | omap3xxx_voltagedomains_init(); | 465 | omap3xxx_voltagedomains_init(); |
461 | omap3xxx_powerdomains_init(); | 466 | omap3xxx_powerdomains_init(); |
@@ -470,6 +475,8 @@ void __init ti81xx_init_early(void) | |||
470 | void __init omap4430_init_early(void) | 475 | void __init omap4430_init_early(void) |
471 | { | 476 | { |
472 | omap2_set_globals_443x(); | 477 | omap2_set_globals_443x(); |
478 | omap4xxx_check_revision(); | ||
479 | omap4xxx_check_features(); | ||
473 | omap_common_init_early(); | 480 | omap_common_init_early(); |
474 | omap44xx_voltagedomains_init(); | 481 | omap44xx_voltagedomains_init(); |
475 | omap44xx_powerdomains_init(); | 482 | omap44xx_powerdomains_init(); |
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index 6b51086fce18..428ccb12d168 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h | |||
@@ -451,7 +451,12 @@ IS_OMAP_TYPE(3517, 0x3517) | |||
451 | #define OMAP447X_CLASS 0x44700044 | 451 | #define OMAP447X_CLASS 0x44700044 |
452 | #define OMAP4470_REV_ES1_0 (OMAP447X_CLASS | (0x10 << 8)) | 452 | #define OMAP4470_REV_ES1_0 (OMAP447X_CLASS | (0x10 << 8)) |
453 | 453 | ||
454 | void omap2_check_revision(void); | 454 | void omap2xxx_check_revision(void); |
455 | void omap3xxx_check_revision(void); | ||
456 | void omap4xxx_check_revision(void); | ||
457 | void omap3xxx_check_features(void); | ||
458 | void ti81xx_check_features(void); | ||
459 | void omap4xxx_check_features(void); | ||
455 | 460 | ||
456 | /* | 461 | /* |
457 | * Runtime detection of OMAP3 features | 462 | * Runtime detection of OMAP3 features |