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-rw-r--r--arch/arm/Kconfig15
-rw-r--r--arch/arm/Makefile2
-rw-r--r--arch/arm/include/asm/hardware/iop3xx.h1
-rw-r--r--arch/arm/include/asm/system.h1
-rw-r--r--arch/arm/include/asm/unwind.h16
-rw-r--r--arch/arm/kernel/perf_event.c3
-rw-r--r--arch/arm/kernel/process.c10
-rw-r--r--arch/arm/kernel/setup.c14
-rw-r--r--arch/arm/kernel/unwind.c129
-rw-r--r--arch/arm/mach-at91/at91cap9.c4
-rw-r--r--arch/arm/mach-at91/at91rm9200.c4
-rw-r--r--arch/arm/mach-at91/at91sam9260.c2
-rw-r--r--arch/arm/mach-at91/at91sam9261.c2
-rw-r--r--arch/arm/mach-at91/at91sam9263.c2
-rw-r--r--arch/arm/mach-at91/at91sam9_alt_reset.S9
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c4
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c2
-rw-r--r--arch/arm/mach-at91/generic.h3
-rw-r--r--arch/arm/mach-at91/include/mach/system.h9
-rw-r--r--arch/arm/mach-bcmring/arch.c25
-rw-r--r--arch/arm/mach-bcmring/include/mach/system.h26
-rw-r--r--arch/arm/mach-clps711x/autcpu12.c1
-rw-r--r--arch/arm/mach-clps711x/cdb89712.c1
-rw-r--r--arch/arm/mach-clps711x/ceiva.c1
-rw-r--r--arch/arm/mach-clps711x/clep7312.c1
-rw-r--r--arch/arm/mach-clps711x/common.c5
-rw-r--r--arch/arm/mach-clps711x/common.h1
-rw-r--r--arch/arm/mach-clps711x/edb7211-arch.c1
-rw-r--r--arch/arm/mach-clps711x/fortunet.c1
-rw-r--r--arch/arm/mach-clps711x/include/mach/system.h5
-rw-r--r--arch/arm/mach-clps711x/p720t.c1
-rw-r--r--arch/arm/mach-cns3xxx/cns3420vb.c1
-rw-r--r--arch/arm/mach-cns3xxx/core.h1
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/system.h3
-rw-r--r--arch/arm/mach-cns3xxx/pm.c4
-rw-r--r--arch/arm/mach-davinci/board-da830-evm.c1
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c1
-rw-r--r--arch/arm/mach-davinci/board-dm355-evm.c1
-rw-r--r--arch/arm/mach-davinci/board-dm355-leopard.c1
-rw-r--r--arch/arm/mach-davinci/board-dm365-evm.c1
-rw-r--r--arch/arm/mach-davinci/board-dm644x-evm.c1
-rw-r--r--arch/arm/mach-davinci/board-dm646x-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-mityomapl138.c1
-rw-r--r--arch/arm/mach-davinci/board-neuros-osd2.c1
-rw-r--r--arch/arm/mach-davinci/board-omapl138-hawk.c1
-rw-r--r--arch/arm/mach-davinci/board-sffsdr.c1
-rw-r--r--arch/arm/mach-davinci/board-tnetv107x-evm.c1
-rw-r--r--arch/arm/mach-davinci/common.c3
-rw-r--r--arch/arm/mach-davinci/da830.c1
-rw-r--r--arch/arm/mach-davinci/da850.c1
-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c5
-rw-r--r--arch/arm/mach-davinci/devices.c5
-rw-r--r--arch/arm/mach-davinci/dm355.c1
-rw-r--r--arch/arm/mach-davinci/dm365.c1
-rw-r--r--arch/arm/mach-davinci/dm644x.c1
-rw-r--r--arch/arm/mach-davinci/dm646x.c1
-rw-r--r--arch/arm/mach-davinci/include/mach/common.h3
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h1
-rw-r--r--arch/arm/mach-davinci/include/mach/system.h6
-rw-r--r--arch/arm/mach-davinci/include/mach/tnetv107x.h1
-rw-r--r--arch/arm/mach-davinci/tnetv107x.c7
-rw-r--r--arch/arm/mach-dove/cm-a510.c1
-rw-r--r--arch/arm/mach-dove/common.c16
-rw-r--r--arch/arm/mach-dove/common.h1
-rw-r--r--arch/arm/mach-dove/dove-db-setup.c1
-rw-r--r--arch/arm/mach-dove/include/mach/system.h19
-rw-r--r--arch/arm/mach-ebsa110/core.c6
-rw-r--r--arch/arm/mach-ebsa110/include/mach/system.h2
-rw-r--r--arch/arm/mach-ep93xx/adssphere.c1
-rw-r--r--arch/arm/mach-ep93xx/core.c12
-rw-r--r--arch/arm/mach-ep93xx/edb93xx.c8
-rw-r--r--arch/arm/mach-ep93xx/gesbc9312.c1
-rw-r--r--arch/arm/mach-ep93xx/include/mach/platform.h2
-rw-r--r--arch/arm/mach-ep93xx/include/mach/system.h15
-rw-r--r--arch/arm/mach-ep93xx/micro9.c4
-rw-r--r--arch/arm/mach-ep93xx/simone.c1
-rw-r--r--arch/arm/mach-ep93xx/snappercl15.c1
-rw-r--r--arch/arm/mach-ep93xx/ts72xx.c1
-rw-r--r--arch/arm/mach-ep93xx/vision_ep9307.c1
-rw-r--r--arch/arm/mach-exynos/Makefile9
-rw-r--r--arch/arm/mach-exynos/clock-exynos4210.c3
-rw-r--r--arch/arm/mach-exynos/clock-exynos4212.c3
-rw-r--r--arch/arm/mach-exynos/clock.c3
-rw-r--r--arch/arm/mach-exynos/common.c704
-rw-r--r--arch/arm/mach-exynos/common.h41
-rw-r--r--arch/arm/mach-exynos/cpu.c284
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h12
-rw-r--r--arch/arm/mach-exynos/include/mach/system.h2
-rw-r--r--arch/arm/mach-exynos/init.c42
-rw-r--r--arch/arm/mach-exynos/irq-combiner.c124
-rw-r--r--arch/arm/mach-exynos/irq-eint.c237
-rw-r--r--arch/arm/mach-exynos/mach-armlex4210.c6
-rw-r--r--arch/arm/mach-exynos/mach-nuri.c6
-rw-r--r--arch/arm/mach-exynos/mach-origen.c6
-rw-r--r--arch/arm/mach-exynos/mach-smdk4x12.c7
-rw-r--r--arch/arm/mach-exynos/mach-smdkv310.c7
-rw-r--r--arch/arm/mach-exynos/mach-universal_c210.c6
-rw-r--r--arch/arm/mach-exynos/mct.c13
-rw-r--r--arch/arm/mach-footbridge/cats-hw.c1
-rw-r--r--arch/arm/mach-footbridge/common.c27
-rw-r--r--arch/arm/mach-footbridge/common.h1
-rw-r--r--arch/arm/mach-footbridge/ebsa285.c1
-rw-r--r--arch/arm/mach-footbridge/include/mach/system.h56
-rw-r--r--arch/arm/mach-footbridge/netwinder-hw.c27
-rw-r--r--arch/arm/mach-footbridge/personal.c1
-rw-r--r--arch/arm/mach-h720x/common.c5
-rw-r--r--arch/arm/mach-h720x/common.h1
-rw-r--r--arch/arm/mach-h720x/h7201-eval.c1
-rw-r--r--arch/arm/mach-h720x/h7202-eval.c1
-rw-r--r--arch/arm/mach-h720x/include/mach/system.h6
-rw-r--r--arch/arm/mach-highbank/core.h1
-rw-r--r--arch/arm/mach-highbank/highbank.c1
-rw-r--r--arch/arm/mach-highbank/include/mach/system.h2
-rw-r--r--arch/arm/mach-highbank/system.c2
-rw-r--r--arch/arm/mach-imx/clock-imx6q.c2
-rw-r--r--arch/arm/mach-imx/mach-apf9328.c1
-rw-r--r--arch/arm/mach-imx/mach-armadillo5x0.c1
-rw-r--r--arch/arm/mach-imx/mach-bug.c1
-rw-r--r--arch/arm/mach-imx/mach-cpuimx27.c1
-rw-r--r--arch/arm/mach-imx/mach-cpuimx35.c1
-rw-r--r--arch/arm/mach-imx/mach-eukrea_cpuimx25.c1
-rw-r--r--arch/arm/mach-imx/mach-imx27_visstrim_m10.c1
-rw-r--r--arch/arm/mach-imx/mach-imx27ipcam.c1
-rw-r--r--arch/arm/mach-imx/mach-imx27lite.c1
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c34
-rw-r--r--arch/arm/mach-imx/mach-kzm_arm11_01.c1
-rw-r--r--arch/arm/mach-imx/mach-mx1ads.c2
-rw-r--r--arch/arm/mach-imx/mach-mx21ads.c1
-rw-r--r--arch/arm/mach-imx/mach-mx25_3ds.c1
-rw-r--r--arch/arm/mach-imx/mach-mx27_3ds.c1
-rw-r--r--arch/arm/mach-imx/mach-mx27ads.c1
-rw-r--r--arch/arm/mach-imx/mach-mx31_3ds.c1
-rw-r--r--arch/arm/mach-imx/mach-mx31ads.c1
-rw-r--r--arch/arm/mach-imx/mach-mx31lilly.c1
-rw-r--r--arch/arm/mach-imx/mach-mx31lite.c1
-rw-r--r--arch/arm/mach-imx/mach-mx31moboard.c1
-rw-r--r--arch/arm/mach-imx/mach-mx35_3ds.c1
-rw-r--r--arch/arm/mach-imx/mach-mxt_td60.c1
-rw-r--r--arch/arm/mach-imx/mach-pca100.c1
-rw-r--r--arch/arm/mach-imx/mach-pcm037.c1
-rw-r--r--arch/arm/mach-imx/mach-pcm038.c1
-rw-r--r--arch/arm/mach-imx/mach-pcm043.c1
-rw-r--r--arch/arm/mach-imx/mach-qong.c1
-rw-r--r--arch/arm/mach-imx/mach-scb9328.c1
-rw-r--r--arch/arm/mach-imx/mach-vpr200.c1
-rw-r--r--arch/arm/mach-imx/src.c23
-rw-r--r--arch/arm/mach-integrator/common.h1
-rw-r--r--arch/arm/mach-integrator/core.c8
-rw-r--r--arch/arm/mach-integrator/include/mach/system.h11
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c1
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c1
-rw-r--r--arch/arm/mach-iop13xx/include/mach/iop13xx.h1
-rw-r--r--arch/arm/mach-iop13xx/include/mach/system.h14
-rw-r--r--arch/arm/mach-iop13xx/iq81340mc.c1
-rw-r--r--arch/arm/mach-iop13xx/iq81340sc.c1
-rw-r--r--arch/arm/mach-iop13xx/setup.c11
-rw-r--r--arch/arm/mach-iop32x/em7210.c1
-rw-r--r--arch/arm/mach-iop32x/glantank.c1
-rw-r--r--arch/arm/mach-iop32x/include/mach/system.h19
-rw-r--r--arch/arm/mach-iop32x/iq31244.c2
-rw-r--r--arch/arm/mach-iop32x/iq80321.c1
-rw-r--r--arch/arm/mach-iop32x/n2100.c9
-rw-r--r--arch/arm/mach-iop33x/include/mach/system.h10
-rw-r--r--arch/arm/mach-iop33x/iq80331.c1
-rw-r--r--arch/arm/mach-iop33x/iq80332.c1
-rw-r--r--arch/arm/mach-ixp2000/core.c4
-rw-r--r--arch/arm/mach-ixp2000/enp2611.c1
-rw-r--r--arch/arm/mach-ixp2000/include/mach/platform.h1
-rw-r--r--arch/arm/mach-ixp2000/include/mach/system.h33
-rw-r--r--arch/arm/mach-ixp2000/ixdp2400.c1
-rw-r--r--arch/arm/mach-ixp2000/ixdp2800.c1
-rw-r--r--arch/arm/mach-ixp2000/ixdp2x01.c32
-rw-r--r--arch/arm/mach-ixp23xx/core.c6
-rw-r--r--arch/arm/mach-ixp23xx/espresso.c1
-rw-r--r--arch/arm/mach-ixp23xx/include/mach/platform.h1
-rw-r--r--arch/arm/mach-ixp23xx/include/mach/system.h17
-rw-r--r--arch/arm/mach-ixp23xx/ixdp2351.c12
-rw-r--r--arch/arm/mach-ixp23xx/roadrunner.c1
-rw-r--r--arch/arm/mach-ixp4xx/avila-setup.c2
-rw-r--r--arch/arm/mach-ixp4xx/common.c20
-rw-r--r--arch/arm/mach-ixp4xx/coyote-setup.c2
-rw-r--r--arch/arm/mach-ixp4xx/dsmg600-setup.c1
-rw-r--r--arch/arm/mach-ixp4xx/fsg-setup.c1
-rw-r--r--arch/arm/mach-ixp4xx/gateway7001-setup.c1
-rw-r--r--arch/arm/mach-ixp4xx/goramo_mlr.c1
-rw-r--r--arch/arm/mach-ixp4xx/gtwx5715-setup.c1
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/platform.h1
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/system.h25
-rw-r--r--arch/arm/mach-ixp4xx/ixdp425-setup.c1
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-setup.c1
-rw-r--r--arch/arm/mach-ixp4xx/nslu2-setup.c1
-rw-r--r--arch/arm/mach-ixp4xx/omixp-setup.c3
-rw-r--r--arch/arm/mach-ixp4xx/vulcan-setup.c1
-rw-r--r--arch/arm/mach-ixp4xx/wg302v2-setup.c1
-rw-r--r--arch/arm/mach-kirkwood/common.c16
-rw-r--r--arch/arm/mach-kirkwood/common.h1
-rw-r--r--arch/arm/mach-kirkwood/d2net_v2-setup.c1
-rw-r--r--arch/arm/mach-kirkwood/db88f6281-bp-setup.c1
-rw-r--r--arch/arm/mach-kirkwood/dockstar-setup.c1
-rw-r--r--arch/arm/mach-kirkwood/guruplug-setup.c1
-rw-r--r--arch/arm/mach-kirkwood/include/mach/system.h19
-rw-r--r--arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c1
-rw-r--r--arch/arm/mach-kirkwood/netspace_v2-setup.c3
-rw-r--r--arch/arm/mach-kirkwood/netxbig_v2-setup.c2
-rw-r--r--arch/arm/mach-kirkwood/openrd-setup.c3
-rw-r--r--arch/arm/mach-kirkwood/rd88f6192-nas-setup.c1
-rw-r--r--arch/arm/mach-kirkwood/rd88f6281-setup.c1
-rw-r--r--arch/arm/mach-kirkwood/sheevaplug-setup.c2
-rw-r--r--arch/arm/mach-kirkwood/t5325-setup.c1
-rw-r--r--arch/arm/mach-kirkwood/ts219-setup.c1
-rw-r--r--arch/arm/mach-kirkwood/ts41x-setup.c1
-rw-r--r--arch/arm/mach-ks8695/board-acs5k.c1
-rw-r--r--arch/arm/mach-ks8695/board-dsm320.c1
-rw-r--r--arch/arm/mach-ks8695/board-micrel.c1
-rw-r--r--arch/arm/mach-ks8695/generic.h1
-rw-r--r--arch/arm/mach-ks8695/include/mach/system.h21
-rw-r--r--arch/arm/mach-ks8695/time.c18
-rw-r--r--arch/arm/mach-lpc32xx/common.c20
-rw-r--r--arch/arm/mach-lpc32xx/common.h2
-rw-r--r--arch/arm/mach-lpc32xx/include/mach/system.h22
-rw-r--r--arch/arm/mach-lpc32xx/phy3250.c1
-rw-r--r--arch/arm/mach-mmp/aspenite.c2
-rw-r--r--arch/arm/mach-mmp/avengers_lite.c1
-rw-r--r--arch/arm/mach-mmp/brownstone.c1
-rw-r--r--arch/arm/mach-mmp/common.c5
-rw-r--r--arch/arm/mach-mmp/common.h1
-rw-r--r--arch/arm/mach-mmp/flint.c1
-rw-r--r--arch/arm/mach-mmp/gplugd.c1
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa168.h1
-rw-r--r--arch/arm/mach-mmp/include/mach/system.h10
-rw-r--r--arch/arm/mach-mmp/jasper.c1
-rw-r--r--arch/arm/mach-mmp/pxa168.c5
-rw-r--r--arch/arm/mach-mmp/tavorevb.c1
-rw-r--r--arch/arm/mach-mmp/teton_bga.c1
-rw-r--r--arch/arm/mach-mmp/ttc_dkb.c1
-rw-r--r--arch/arm/mach-msm/include/mach/system.h8
-rw-r--r--arch/arm/mach-mv78xx0/buffalo-wxl-setup.c1
-rw-r--r--arch/arm/mach-mv78xx0/common.c16
-rw-r--r--arch/arm/mach-mv78xx0/common.h1
-rw-r--r--arch/arm/mach-mv78xx0/db78x00-bp-setup.c1
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/system.h19
-rw-r--r--arch/arm/mach-mv78xx0/rd78x00-masa-setup.c1
-rw-r--r--arch/arm/mach-mx5/board-cpuimx51.c1
-rw-r--r--arch/arm/mach-mx5/board-cpuimx51sd.c1
-rw-r--r--arch/arm/mach-mx5/board-mx50_rdp.c1
-rw-r--r--arch/arm/mach-mx5/board-mx51_3ds.c1
-rw-r--r--arch/arm/mach-mx5/board-mx51_babbage.c3
-rw-r--r--arch/arm/mach-mx5/board-mx51_efikamx.c3
-rw-r--r--arch/arm/mach-mx5/board-mx51_efikasb.c1
-rw-r--r--arch/arm/mach-mx5/board-mx53_ard.c1
-rw-r--r--arch/arm/mach-mx5/board-mx53_evk.c3
-rw-r--r--arch/arm/mach-mx5/board-mx53_loco.c3
-rw-r--r--arch/arm/mach-mx5/board-mx53_smd.c3
-rw-r--r--arch/arm/mach-mx5/imx51-dt.c1
-rw-r--r--arch/arm/mach-mx5/imx53-dt.c1
-rw-r--r--arch/arm/mach-mxs/include/mach/common.h1
-rw-r--r--arch/arm/mach-mxs/include/mach/system.h2
-rw-r--r--arch/arm/mach-mxs/mach-m28evk.c1
-rw-r--r--arch/arm/mach-mxs/mach-mx23evk.c1
-rw-r--r--arch/arm/mach-mxs/mach-mx28evk.c1
-rw-r--r--arch/arm/mach-mxs/mach-stmp378x_devb.c1
-rw-r--r--arch/arm/mach-mxs/mach-tx28.c1
-rw-r--r--arch/arm/mach-mxs/system.c2
-rw-r--r--arch/arm/mach-netx/generic.c5
-rw-r--r--arch/arm/mach-netx/generic.h1
-rw-r--r--arch/arm/mach-netx/include/mach/system.h10
-rw-r--r--arch/arm/mach-netx/nxdb500.c1
-rw-r--r--arch/arm/mach-netx/nxdkn.c1
-rw-r--r--arch/arm/mach-netx/nxeb500hmi.c1
-rw-r--r--arch/arm/mach-nomadik/board-nhk8815.c3
-rw-r--r--arch/arm/mach-nomadik/cpu-8815.c12
-rw-r--r--arch/arm/mach-nomadik/cpu-8815.h4
-rw-r--r--arch/arm/mach-nomadik/include/mach/setup.h3
-rw-r--r--arch/arm/mach-nomadik/include/mach/system.h13
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c1
-rw-r--r--arch/arm/mach-omap1/board-fsample.c1
-rw-r--r--arch/arm/mach-omap1/board-generic.c1
-rw-r--r--arch/arm/mach-omap1/board-h2.c1
-rw-r--r--arch/arm/mach-omap1/board-h3.c1
-rw-r--r--arch/arm/mach-omap1/board-htcherald.c1
-rw-r--r--arch/arm/mach-omap1/board-innovator.c1
-rw-r--r--arch/arm/mach-omap1/board-nokia770.c1
-rw-r--r--arch/arm/mach-omap1/board-osk.c1
-rw-r--r--arch/arm/mach-omap1/board-palmte.c1
-rw-r--r--arch/arm/mach-omap1/board-palmtt.c1
-rw-r--r--arch/arm/mach-omap1/board-palmz71.c1
-rw-r--r--arch/arm/mach-omap1/board-perseus2.c1
-rw-r--r--arch/arm/mach-omap1/board-sx1.c1
-rw-r--r--arch/arm/mach-omap1/board-voiceblue.c6
-rw-r--r--arch/arm/mach-omap1/common.h1
-rw-r--r--arch/arm/mach-omap1/reset.c5
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c1
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c1
-rw-r--r--arch/arm/mach-omap2/board-3630sdp.c1
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c1
-rw-r--r--arch/arm/mach-omap2/board-am3517crane.c1
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c1
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-rw-r--r--arch/arm/plat-samsung/include/plat/watchdog-reset.h1
-rw-r--r--arch/arm/plat-spear/Makefile2
-rw-r--r--arch/arm/plat-spear/include/plat/system.h15
-rw-r--r--arch/arm/plat-spear/restart.c27
-rw-r--r--arch/arm/plat-tcc/Kconfig20
-rw-r--r--arch/arm/plat-tcc/Makefile3
-rw-r--r--arch/arm/plat-tcc/clock.c179
-rw-r--r--arch/arm/plat-tcc/include/mach/clock.h48
-rw-r--r--arch/arm/plat-tcc/include/mach/debug-macro.S32
-rw-r--r--arch/arm/plat-tcc/include/mach/entry-macro.S68
-rw-r--r--arch/arm/plat-tcc/include/mach/hardware.h43
-rw-r--r--arch/arm/plat-tcc/include/mach/io.h23
-rw-r--r--arch/arm/plat-tcc/include/mach/irqs.h83
-rw-r--r--arch/arm/plat-tcc/include/mach/system.h31
-rw-r--r--arch/arm/plat-tcc/include/mach/tcc8k-regs.h807
-rw-r--r--arch/arm/plat-tcc/include/mach/timex.h5
-rw-r--r--arch/arm/plat-tcc/include/mach/uncompress.h34
-rw-r--r--arch/arm/plat-tcc/system.c25
604 files changed, 3342 insertions, 5609 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 540a6618084f..2deb911d59f4 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -220,8 +220,9 @@ config NEED_MACH_MEMORY_H
220 be avoided when possible. 220 be avoided when possible.
221 221
222config PHYS_OFFSET 222config PHYS_OFFSET
223 hex "Physical address of main memory" 223 hex "Physical address of main memory" if MMU
224 depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H 224 depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
225 default DRAM_BASE if !MMU
225 help 226 help
226 Please provide the physical address corresponding to the 227 Please provide the physical address corresponding to the
227 location of main memory in your system. 228 location of main memory in your system.
@@ -868,16 +869,6 @@ config ARCH_SHARK
868 Support for the StrongARM based Digital DNARD machine, also known 869 Support for the StrongARM based Digital DNARD machine, also known
869 as "Shark" (<http://www.shark-linux.de/shark.html>). 870 as "Shark" (<http://www.shark-linux.de/shark.html>).
870 871
871config ARCH_TCC_926
872 bool "Telechips TCC ARM926-based systems"
873 select CLKSRC_MMIO
874 select CPU_ARM926T
875 select HAVE_CLK
876 select CLKDEV_LOOKUP
877 select GENERIC_CLOCKEVENTS
878 help
879 Support for Telechips TCC ARM926-based systems.
880
881config ARCH_U300 872config ARCH_U300
882 bool "ST-Ericsson U300 Series" 873 bool "ST-Ericsson U300 Series"
883 depends on MMU 874 depends on MMU
@@ -1059,8 +1050,6 @@ source "arch/arm/plat-s5p/Kconfig"
1059 1050
1060source "arch/arm/plat-spear/Kconfig" 1051source "arch/arm/plat-spear/Kconfig"
1061 1052
1062source "arch/arm/plat-tcc/Kconfig"
1063
1064if ARCH_S3C2410 1053if ARCH_S3C2410
1065source "arch/arm/mach-s3c2410/Kconfig" 1054source "arch/arm/mach-s3c2410/Kconfig"
1066source "arch/arm/mach-s3c2412/Kconfig" 1055source "arch/arm/mach-s3c2412/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index dfcf3b033e10..40319d91bb7f 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -184,7 +184,6 @@ machine-$(CONFIG_ARCH_EXYNOS4) := exynos
184machine-$(CONFIG_ARCH_SA1100) := sa1100 184machine-$(CONFIG_ARCH_SA1100) := sa1100
185machine-$(CONFIG_ARCH_SHARK) := shark 185machine-$(CONFIG_ARCH_SHARK) := shark
186machine-$(CONFIG_ARCH_SHMOBILE) := shmobile 186machine-$(CONFIG_ARCH_SHMOBILE) := shmobile
187machine-$(CONFIG_ARCH_TCC8K) := tcc8k
188machine-$(CONFIG_ARCH_TEGRA) := tegra 187machine-$(CONFIG_ARCH_TEGRA) := tegra
189machine-$(CONFIG_ARCH_U300) := u300 188machine-$(CONFIG_ARCH_U300) := u300
190machine-$(CONFIG_ARCH_U8500) := ux500 189machine-$(CONFIG_ARCH_U8500) := ux500
@@ -204,7 +203,6 @@ machine-$(CONFIG_ARCH_ZYNQ) := zynq
204plat-$(CONFIG_ARCH_MXC) := mxc 203plat-$(CONFIG_ARCH_MXC) := mxc
205plat-$(CONFIG_ARCH_OMAP) := omap 204plat-$(CONFIG_ARCH_OMAP) := omap
206plat-$(CONFIG_ARCH_S3C64XX) := samsung 205plat-$(CONFIG_ARCH_S3C64XX) := samsung
207plat-$(CONFIG_ARCH_TCC_926) := tcc
208plat-$(CONFIG_ARCH_ZYNQ) := versatile 206plat-$(CONFIG_ARCH_ZYNQ) := versatile
209plat-$(CONFIG_PLAT_IOP) := iop 207plat-$(CONFIG_PLAT_IOP) := iop
210plat-$(CONFIG_PLAT_NOMADIK) := nomadik 208plat-$(CONFIG_PLAT_NOMADIK) := nomadik
diff --git a/arch/arm/include/asm/hardware/iop3xx.h b/arch/arm/include/asm/hardware/iop3xx.h
index 5daea2961d48..077c32326c63 100644
--- a/arch/arm/include/asm/hardware/iop3xx.h
+++ b/arch/arm/include/asm/hardware/iop3xx.h
@@ -234,6 +234,7 @@ extern int iop3xx_get_init_atu(void);
234void iop3xx_map_io(void); 234void iop3xx_map_io(void);
235void iop_init_cp6_handler(void); 235void iop_init_cp6_handler(void);
236void iop_init_time(unsigned long tickrate); 236void iop_init_time(unsigned long tickrate);
237void iop3xx_restart(char, const char *);
237 238
238static inline u32 read_tmr0(void) 239static inline u32 read_tmr0(void)
239{ 240{
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 53785828744c..e4c96cc6ec0c 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -108,7 +108,6 @@ extern void __show_regs(struct pt_regs *);
108extern int __pure cpu_architecture(void); 108extern int __pure cpu_architecture(void);
109extern void cpu_init(void); 109extern void cpu_init(void);
110 110
111void arm_machine_restart(char mode, const char *cmd);
112void soft_restart(unsigned long); 111void soft_restart(unsigned long);
113extern void (*arm_pm_restart)(char str, const char *cmd); 112extern void (*arm_pm_restart)(char str, const char *cmd);
114 113
diff --git a/arch/arm/include/asm/unwind.h b/arch/arm/include/asm/unwind.h
index a5edf421005c..d1c3f3a71c94 100644
--- a/arch/arm/include/asm/unwind.h
+++ b/arch/arm/include/asm/unwind.h
@@ -30,14 +30,15 @@ enum unwind_reason_code {
30}; 30};
31 31
32struct unwind_idx { 32struct unwind_idx {
33 unsigned long addr; 33 unsigned long addr_offset;
34 unsigned long insn; 34 unsigned long insn;
35}; 35};
36 36
37struct unwind_table { 37struct unwind_table {
38 struct list_head list; 38 struct list_head list;
39 struct unwind_idx *start; 39 const struct unwind_idx *start;
40 struct unwind_idx *stop; 40 const struct unwind_idx *origin;
41 const struct unwind_idx *stop;
41 unsigned long begin_addr; 42 unsigned long begin_addr;
42 unsigned long end_addr; 43 unsigned long end_addr;
43}; 44};
@@ -49,15 +50,6 @@ extern struct unwind_table *unwind_table_add(unsigned long start,
49extern void unwind_table_del(struct unwind_table *tab); 50extern void unwind_table_del(struct unwind_table *tab);
50extern void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk); 51extern void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk);
51 52
52#ifdef CONFIG_ARM_UNWIND
53extern int __init unwind_init(void);
54#else
55static inline int __init unwind_init(void)
56{
57 return 0;
58}
59#endif
60
61#endif /* !__ASSEMBLY__ */ 53#endif /* !__ASSEMBLY__ */
62 54
63#ifdef CONFIG_ARM_UNWIND 55#ifdef CONFIG_ARM_UNWIND
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index a4f192cc51b2..5bb91bf3d47f 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -639,6 +639,9 @@ static struct platform_device_id armpmu_plat_device_ids[] = {
639 639
640static int __devinit armpmu_device_probe(struct platform_device *pdev) 640static int __devinit armpmu_device_probe(struct platform_device *pdev)
641{ 641{
642 if (!cpu_pmu)
643 return -ENODEV;
644
642 cpu_pmu->plat_device = pdev; 645 cpu_pmu->plat_device = pdev;
643 return 0; 646 return 0;
644} 647}
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 423bb2019451..b29776aa6586 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -147,14 +147,8 @@ void soft_restart(unsigned long addr)
147 BUG(); 147 BUG();
148} 148}
149 149
150void arm_machine_restart(char mode, const char *cmd) 150static void null_restart(char mode, const char *cmd)
151{ 151{
152 /* Disable interrupts first */
153 local_irq_disable();
154 local_fiq_disable();
155
156 /* Call the architecture specific reboot code. */
157 arch_reset(mode, cmd);
158} 152}
159 153
160/* 154/*
@@ -163,7 +157,7 @@ void arm_machine_restart(char mode, const char *cmd)
163void (*pm_power_off)(void); 157void (*pm_power_off)(void);
164EXPORT_SYMBOL(pm_power_off); 158EXPORT_SYMBOL(pm_power_off);
165 159
166void (*arm_pm_restart)(char str, const char *cmd) = arm_machine_restart; 160void (*arm_pm_restart)(char str, const char *cmd) = null_restart;
167EXPORT_SYMBOL_GPL(arm_pm_restart); 161EXPORT_SYMBOL_GPL(arm_pm_restart);
168 162
169static void do_nothing(void *unused) 163static void do_nothing(void *unused)
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 5c7094e8f6e9..095d6611c84e 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -902,8 +902,6 @@ void __init setup_arch(char **cmdline_p)
902{ 902{
903 struct machine_desc *mdesc; 903 struct machine_desc *mdesc;
904 904
905 unwind_init();
906
907 setup_processor(); 905 setup_processor();
908 mdesc = setup_machine_fdt(__atags_pointer); 906 mdesc = setup_machine_fdt(__atags_pointer);
909 if (!mdesc) 907 if (!mdesc)
@@ -911,6 +909,12 @@ void __init setup_arch(char **cmdline_p)
911 machine_desc = mdesc; 909 machine_desc = mdesc;
912 machine_name = mdesc->name; 910 machine_name = mdesc->name;
913 911
912#ifdef CONFIG_ZONE_DMA
913 if (mdesc->dma_zone_size) {
914 extern unsigned long arm_dma_zone_size;
915 arm_dma_zone_size = mdesc->dma_zone_size;
916 }
917#endif
914 if (mdesc->restart_mode) 918 if (mdesc->restart_mode)
915 reboot_setup(&mdesc->restart_mode); 919 reboot_setup(&mdesc->restart_mode);
916 920
@@ -945,12 +949,6 @@ void __init setup_arch(char **cmdline_p)
945 949
946 tcm_init(); 950 tcm_init();
947 951
948#ifdef CONFIG_ZONE_DMA
949 if (mdesc->dma_zone_size) {
950 extern unsigned long arm_dma_zone_size;
951 arm_dma_zone_size = mdesc->dma_zone_size;
952 }
953#endif
954#ifdef CONFIG_MULTI_IRQ_HANDLER 952#ifdef CONFIG_MULTI_IRQ_HANDLER
955 handle_arch_irq = mdesc->handle_irq; 953 handle_arch_irq = mdesc->handle_irq;
956#endif 954#endif
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c
index e7e8365795c3..00df012c4678 100644
--- a/arch/arm/kernel/unwind.c
+++ b/arch/arm/kernel/unwind.c
@@ -67,7 +67,7 @@ EXPORT_SYMBOL(__aeabi_unwind_cpp_pr2);
67 67
68struct unwind_ctrl_block { 68struct unwind_ctrl_block {
69 unsigned long vrs[16]; /* virtual register set */ 69 unsigned long vrs[16]; /* virtual register set */
70 unsigned long *insn; /* pointer to the current instructions word */ 70 const unsigned long *insn; /* pointer to the current instructions word */
71 int entries; /* number of entries left to interpret */ 71 int entries; /* number of entries left to interpret */
72 int byte; /* current byte number in the instructions word */ 72 int byte; /* current byte number in the instructions word */
73}; 73};
@@ -83,8 +83,9 @@ enum regs {
83 PC = 15 83 PC = 15
84}; 84};
85 85
86extern struct unwind_idx __start_unwind_idx[]; 86extern const struct unwind_idx __start_unwind_idx[];
87extern struct unwind_idx __stop_unwind_idx[]; 87static const struct unwind_idx *__origin_unwind_idx;
88extern const struct unwind_idx __stop_unwind_idx[];
88 89
89static DEFINE_SPINLOCK(unwind_lock); 90static DEFINE_SPINLOCK(unwind_lock);
90static LIST_HEAD(unwind_tables); 91static LIST_HEAD(unwind_tables);
@@ -98,45 +99,99 @@ static LIST_HEAD(unwind_tables);
98}) 99})
99 100
100/* 101/*
101 * Binary search in the unwind index. The entries entries are 102 * Binary search in the unwind index. The entries are
102 * guaranteed to be sorted in ascending order by the linker. 103 * guaranteed to be sorted in ascending order by the linker.
104 *
105 * start = first entry
106 * origin = first entry with positive offset (or stop if there is no such entry)
107 * stop - 1 = last entry
103 */ 108 */
104static struct unwind_idx *search_index(unsigned long addr, 109static const struct unwind_idx *search_index(unsigned long addr,
105 struct unwind_idx *first, 110 const struct unwind_idx *start,
106 struct unwind_idx *last) 111 const struct unwind_idx *origin,
112 const struct unwind_idx *stop)
107{ 113{
108 pr_debug("%s(%08lx, %p, %p)\n", __func__, addr, first, last); 114 unsigned long addr_prel31;
115
116 pr_debug("%s(%08lx, %p, %p, %p)\n",
117 __func__, addr, start, origin, stop);
118
119 /*
120 * only search in the section with the matching sign. This way the
121 * prel31 numbers can be compared as unsigned longs.
122 */
123 if (addr < (unsigned long)start)
124 /* negative offsets: [start; origin) */
125 stop = origin;
126 else
127 /* positive offsets: [origin; stop) */
128 start = origin;
129
130 /* prel31 for address relavive to start */
131 addr_prel31 = (addr - (unsigned long)start) & 0x7fffffff;
109 132
110 if (addr < first->addr) { 133 while (start < stop - 1) {
134 const struct unwind_idx *mid = start + ((stop - start) >> 1);
135
136 /*
137 * As addr_prel31 is relative to start an offset is needed to
138 * make it relative to mid.
139 */
140 if (addr_prel31 - ((unsigned long)mid - (unsigned long)start) <
141 mid->addr_offset)
142 stop = mid;
143 else {
144 /* keep addr_prel31 relative to start */
145 addr_prel31 -= ((unsigned long)mid -
146 (unsigned long)start);
147 start = mid;
148 }
149 }
150
151 if (likely(start->addr_offset <= addr_prel31))
152 return start;
153 else {
111 pr_warning("unwind: Unknown symbol address %08lx\n", addr); 154 pr_warning("unwind: Unknown symbol address %08lx\n", addr);
112 return NULL; 155 return NULL;
113 } else if (addr >= last->addr) 156 }
114 return last; 157}
115 158
116 while (first < last - 1) { 159static const struct unwind_idx *unwind_find_origin(
117 struct unwind_idx *mid = first + ((last - first + 1) >> 1); 160 const struct unwind_idx *start, const struct unwind_idx *stop)
161{
162 pr_debug("%s(%p, %p)\n", __func__, start, stop);
163 while (start < stop) {
164 const struct unwind_idx *mid = start + ((stop - start) >> 1);
118 165
119 if (addr < mid->addr) 166 if (mid->addr_offset >= 0x40000000)
120 last = mid; 167 /* negative offset */
168 start = mid + 1;
121 else 169 else
122 first = mid; 170 /* positive offset */
171 stop = mid;
123 } 172 }
124 173 pr_debug("%s -> %p\n", __func__, stop);
125 return first; 174 return stop;
126} 175}
127 176
128static struct unwind_idx *unwind_find_idx(unsigned long addr) 177static const struct unwind_idx *unwind_find_idx(unsigned long addr)
129{ 178{
130 struct unwind_idx *idx = NULL; 179 const struct unwind_idx *idx = NULL;
131 unsigned long flags; 180 unsigned long flags;
132 181
133 pr_debug("%s(%08lx)\n", __func__, addr); 182 pr_debug("%s(%08lx)\n", __func__, addr);
134 183
135 if (core_kernel_text(addr)) 184 if (core_kernel_text(addr)) {
185 if (unlikely(!__origin_unwind_idx))
186 __origin_unwind_idx =
187 unwind_find_origin(__start_unwind_idx,
188 __stop_unwind_idx);
189
136 /* main unwind table */ 190 /* main unwind table */
137 idx = search_index(addr, __start_unwind_idx, 191 idx = search_index(addr, __start_unwind_idx,
138 __stop_unwind_idx - 1); 192 __origin_unwind_idx,
139 else { 193 __stop_unwind_idx);
194 } else {
140 /* module unwind tables */ 195 /* module unwind tables */
141 struct unwind_table *table; 196 struct unwind_table *table;
142 197
@@ -145,7 +200,8 @@ static struct unwind_idx *unwind_find_idx(unsigned long addr)
145 if (addr >= table->begin_addr && 200 if (addr >= table->begin_addr &&
146 addr < table->end_addr) { 201 addr < table->end_addr) {
147 idx = search_index(addr, table->start, 202 idx = search_index(addr, table->start,
148 table->stop - 1); 203 table->origin,
204 table->stop);
149 /* Move-to-front to exploit common traces */ 205 /* Move-to-front to exploit common traces */
150 list_move(&table->list, &unwind_tables); 206 list_move(&table->list, &unwind_tables);
151 break; 207 break;
@@ -274,7 +330,7 @@ static int unwind_exec_insn(struct unwind_ctrl_block *ctrl)
274int unwind_frame(struct stackframe *frame) 330int unwind_frame(struct stackframe *frame)
275{ 331{
276 unsigned long high, low; 332 unsigned long high, low;
277 struct unwind_idx *idx; 333 const struct unwind_idx *idx;
278 struct unwind_ctrl_block ctrl; 334 struct unwind_ctrl_block ctrl;
279 335
280 /* only go to a higher address on the stack */ 336 /* only go to a higher address on the stack */
@@ -399,7 +455,6 @@ struct unwind_table *unwind_table_add(unsigned long start, unsigned long size,
399 unsigned long text_size) 455 unsigned long text_size)
400{ 456{
401 unsigned long flags; 457 unsigned long flags;
402 struct unwind_idx *idx;
403 struct unwind_table *tab = kmalloc(sizeof(*tab), GFP_KERNEL); 458 struct unwind_table *tab = kmalloc(sizeof(*tab), GFP_KERNEL);
404 459
405 pr_debug("%s(%08lx, %08lx, %08lx, %08lx)\n", __func__, start, size, 460 pr_debug("%s(%08lx, %08lx, %08lx, %08lx)\n", __func__, start, size,
@@ -408,15 +463,12 @@ struct unwind_table *unwind_table_add(unsigned long start, unsigned long size,
408 if (!tab) 463 if (!tab)
409 return tab; 464 return tab;
410 465
411 tab->start = (struct unwind_idx *)start; 466 tab->start = (const struct unwind_idx *)start;
412 tab->stop = (struct unwind_idx *)(start + size); 467 tab->stop = (const struct unwind_idx *)(start + size);
468 tab->origin = unwind_find_origin(tab->start, tab->stop);
413 tab->begin_addr = text_addr; 469 tab->begin_addr = text_addr;
414 tab->end_addr = text_addr + text_size; 470 tab->end_addr = text_addr + text_size;
415 471
416 /* Convert the symbol addresses to absolute values */
417 for (idx = tab->start; idx < tab->stop; idx++)
418 idx->addr = prel31_to_addr(&idx->addr);
419
420 spin_lock_irqsave(&unwind_lock, flags); 472 spin_lock_irqsave(&unwind_lock, flags);
421 list_add_tail(&tab->list, &unwind_tables); 473 list_add_tail(&tab->list, &unwind_tables);
422 spin_unlock_irqrestore(&unwind_lock, flags); 474 spin_unlock_irqrestore(&unwind_lock, flags);
@@ -437,16 +489,3 @@ void unwind_table_del(struct unwind_table *tab)
437 489
438 kfree(tab); 490 kfree(tab);
439} 491}
440
441int __init unwind_init(void)
442{
443 struct unwind_idx *idx;
444
445 /* Convert the symbol addresses to absolute values */
446 for (idx = __start_unwind_idx; idx < __stop_unwind_idx; idx++)
447 idx->addr = prel31_to_addr(&idx->addr);
448
449 pr_debug("unwind: ARM stack unwinding initialised\n");
450
451 return 0;
452}
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index 506a26c3fff6..edb879ac04c8 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -314,7 +314,7 @@ static struct at91_gpio_bank at91cap9_gpio[] __initdata = {
314 } 314 }
315}; 315};
316 316
317static void at91cap9_reset(void) 317static void at91cap9_restart(char mode, const char *cmd)
318{ 318{
319 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); 319 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
320} 320}
@@ -337,7 +337,7 @@ static void __init at91cap9_ioremap_registers(void)
337 337
338static void __init at91cap9_initialize(void) 338static void __init at91cap9_initialize(void)
339{ 339{
340 at91_arch_reset = at91cap9_reset; 340 arm_pm_restart = at91cap9_restart;
341 at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); 341 at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
342 342
343 /* Register GPIO subsystem */ 343 /* Register GPIO subsystem */
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 9163d7d5f76e..99c3174e24a2 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -289,7 +289,7 @@ static struct at91_gpio_bank at91rm9200_gpio[] __initdata = {
289 } 289 }
290}; 290};
291 291
292static void at91rm9200_reset(void) 292static void at91rm9200_restart(char mode, const char *cmd)
293{ 293{
294 /* 294 /*
295 * Perform a hardware reset with the use of the Watchdog timer. 295 * Perform a hardware reset with the use of the Watchdog timer.
@@ -314,7 +314,7 @@ static void __init at91rm9200_ioremap_registers(void)
314 314
315static void __init at91rm9200_initialize(void) 315static void __init at91rm9200_initialize(void)
316{ 316{
317 at91_arch_reset = at91rm9200_reset; 317 arm_pm_restart = at91rm9200_restart;
318 at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) 318 at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
319 | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) 319 | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
320 | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5) 320 | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 3a960d2740b6..5e46e4a96430 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -329,7 +329,7 @@ static void __init at91sam9260_ioremap_registers(void)
329 329
330static void __init at91sam9260_initialize(void) 330static void __init at91sam9260_initialize(void)
331{ 331{
332 at91_arch_reset = at91sam9_alt_reset; 332 arm_pm_restart = at91sam9_alt_restart;
333 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) 333 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
334 | (1 << AT91SAM9260_ID_IRQ2); 334 | (1 << AT91SAM9260_ID_IRQ2);
335 335
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index a0538c5c2520..b85b9ea60170 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -287,7 +287,7 @@ static void __init at91sam9261_ioremap_registers(void)
287 287
288static void __init at91sam9261_initialize(void) 288static void __init at91sam9261_initialize(void)
289{ 289{
290 at91_arch_reset = at91sam9_alt_reset; 290 arm_pm_restart = at91sam9_alt_restart;
291 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) 291 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
292 | (1 << AT91SAM9261_ID_IRQ2); 292 | (1 << AT91SAM9261_ID_IRQ2);
293 293
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 5ffbbb024c1e..79e3669b1117 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -308,7 +308,7 @@ static void __init at91sam9263_ioremap_registers(void)
308 308
309static void __init at91sam9263_initialize(void) 309static void __init at91sam9263_initialize(void)
310{ 310{
311 at91_arch_reset = at91sam9_alt_reset; 311 arm_pm_restart = at91sam9_alt_restart;
312 at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); 312 at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
313 313
314 /* Register GPIO subsystem */ 314 /* Register GPIO subsystem */
diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S
index e0256deb91fb..d3f931c5942e 100644
--- a/arch/arm/mach-at91/at91sam9_alt_reset.S
+++ b/arch/arm/mach-at91/at91sam9_alt_reset.S
@@ -14,20 +14,15 @@
14 */ 14 */
15 15
16#include <linux/linkage.h> 16#include <linux/linkage.h>
17#include <asm/system.h>
18#include <mach/hardware.h> 17#include <mach/hardware.h>
19#include <mach/at91sam9_sdramc.h> 18#include <mach/at91sam9_sdramc.h>
20#include <mach/at91_rstc.h> 19#include <mach/at91_rstc.h>
21 20
22 .arm 21 .arm
23 22
24 .globl at91sam9_alt_reset 23 .globl at91sam9_alt_restart
25 24
26at91sam9_alt_reset: mrc p15, 0, r0, c1, c0, 0 25at91sam9_alt_restart: ldr r0, .at91_va_base_sdramc @ preload constants
27 orr r0, r0, #CR_I
28 mcr p15, 0, r0, c1, c0, 0 @ enable I-cache
29
30 ldr r0, .at91_va_base_sdramc @ preload constants
31 ldr r1, .at91_va_base_rstc_cr 26 ldr r1, .at91_va_base_rstc_cr
32 27
33 mov r2, #1 28 mov r2, #1
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index f61eb64e6b39..7032dd32cdf0 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -318,7 +318,7 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
318 } 318 }
319}; 319};
320 320
321static void at91sam9g45_reset(void) 321static void at91sam9g45_restart(char mode, const char *cmd)
322{ 322{
323 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); 323 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
324} 324}
@@ -342,7 +342,7 @@ static void __init at91sam9g45_ioremap_registers(void)
342 342
343static void __init at91sam9g45_initialize(void) 343static void __init at91sam9g45_initialize(void)
344{ 344{
345 at91_arch_reset = at91sam9g45_reset; 345 arm_pm_restart = at91sam9g45_restart;
346 at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); 346 at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
347 347
348 /* Register GPIO subsystem */ 348 /* Register GPIO subsystem */
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 96247f68b9d2..d6bcb1da11df 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -292,7 +292,7 @@ static void __init at91sam9rl_ioremap_registers(void)
292 292
293static void __init at91sam9rl_initialize(void) 293static void __init at91sam9rl_initialize(void)
294{ 294{
295 at91_arch_reset = at91sam9_alt_reset; 295 arm_pm_restart = at91sam9_alt_restart;
296 at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); 296 at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
297 297
298 /* Register GPIO subsystem */ 298 /* Register GPIO subsystem */
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 40309588f360..4866b8180d66 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -58,7 +58,7 @@ extern void at91_irq_suspend(void);
58extern void at91_irq_resume(void); 58extern void at91_irq_resume(void);
59 59
60/* reset */ 60/* reset */
61extern void at91sam9_alt_reset(void); 61extern void at91sam9_alt_restart(char, const char *);
62 62
63/* shutdown */ 63/* shutdown */
64extern void at91_ioremap_shdwc(u32 base_addr); 64extern void at91_ioremap_shdwc(u32 base_addr);
@@ -74,5 +74,4 @@ struct at91_gpio_bank {
74extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks); 74extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
75extern void __init at91_gpio_irq_setup(void); 75extern void __init at91_gpio_irq_setup(void);
76 76
77extern void (*at91_arch_reset)(void);
78extern int at91_extern_irq; 77extern int at91_extern_irq;
diff --git a/arch/arm/mach-at91/include/mach/system.h b/arch/arm/mach-at91/include/mach/system.h
index 36af14bc13bb..cbd64f3bcecd 100644
--- a/arch/arm/mach-at91/include/mach/system.h
+++ b/arch/arm/mach-at91/include/mach/system.h
@@ -47,13 +47,4 @@ static inline void arch_idle(void)
47#endif 47#endif
48} 48}
49 49
50void (*at91_arch_reset)(void);
51
52static inline void arch_reset(char mode, const char *cmd)
53{
54 /* call the CPU-specific reset function */
55 if (at91_arch_reset)
56 (at91_arch_reset)();
57}
58
59#endif 50#endif
diff --git a/arch/arm/mach-bcmring/arch.c b/arch/arm/mach-bcmring/arch.c
index 31a143592c81..9e5e7552498c 100644
--- a/arch/arm/mach-bcmring/arch.c
+++ b/arch/arm/mach-bcmring/arch.c
@@ -49,7 +49,29 @@ HW_DECLARE_SPINLOCK(gpio)
49#endif 49#endif
50 50
51/* sysctl */ 51/* sysctl */
52int bcmring_arch_warm_reboot; /* do a warm reboot on hard reset */ 52static int bcmring_arch_warm_reboot; /* do a warm reboot on hard reset */
53
54static void bcmring_restart(char mode, const char *cmd)
55{
56 printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot);
57
58 if (mode == 'h') {
59 /* Reboot configured in proc entry */
60 if (bcmring_arch_warm_reboot) {
61 printk("warm reset\n");
62 /* Issue Warm reset (do not reset ethernet switch, keep alive) */
63 chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_WARM);
64 } else {
65 /* Force reset of everything */
66 printk("force reset\n");
67 chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
68 }
69 } else {
70 /* Force reset of everything */
71 printk("force reset\n");
72 chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
73 }
74}
53 75
54static struct ctl_table_header *bcmring_sysctl_header; 76static struct ctl_table_header *bcmring_sysctl_header;
55 77
@@ -173,4 +195,5 @@ MACHINE_START(BCMRING, "BCMRING")
173 .init_irq = bcmring_init_irq, 195 .init_irq = bcmring_init_irq,
174 .timer = &bcmring_timer, 196 .timer = &bcmring_timer,
175 .init_machine = bcmring_init_machine 197 .init_machine = bcmring_init_machine
198 .restart = bcmring_restart,
176MACHINE_END 199MACHINE_END
diff --git a/arch/arm/mach-bcmring/include/mach/system.h b/arch/arm/mach-bcmring/include/mach/system.h
index 38b37060d426..cb78250db649 100644
--- a/arch/arm/mach-bcmring/include/mach/system.h
+++ b/arch/arm/mach-bcmring/include/mach/system.h
@@ -20,35 +20,9 @@
20#ifndef __ASM_ARCH_SYSTEM_H 20#ifndef __ASM_ARCH_SYSTEM_H
21#define __ASM_ARCH_SYSTEM_H 21#define __ASM_ARCH_SYSTEM_H
22 22
23#include <mach/csp/chipcHw_inline.h>
24
25extern int bcmring_arch_warm_reboot;
26
27static inline void arch_idle(void) 23static inline void arch_idle(void)
28{ 24{
29 cpu_do_idle(); 25 cpu_do_idle();
30} 26}
31 27
32static inline void arch_reset(char mode, const char *cmd)
33{
34 printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot);
35
36 if (mode == 'h') {
37 /* Reboot configured in proc entry */
38 if (bcmring_arch_warm_reboot) {
39 printk("warm reset\n");
40 /* Issue Warm reset (do not reset ethernet switch, keep alive) */
41 chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_WARM);
42 } else {
43 /* Force reset of everything */
44 printk("force reset\n");
45 chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
46 }
47 } else {
48 /* Force reset of everything */
49 printk("force reset\n");
50 chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
51 }
52}
53
54#endif 28#endif
diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c
index 0276091b7f86..3fb79a1d0bde 100644
--- a/arch/arm/mach-clps711x/autcpu12.c
+++ b/arch/arm/mach-clps711x/autcpu12.c
@@ -68,5 +68,6 @@ MACHINE_START(AUTCPU12, "autronix autcpu12")
68 .map_io = autcpu12_map_io, 68 .map_io = autcpu12_map_io,
69 .init_irq = clps711x_init_irq, 69 .init_irq = clps711x_init_irq,
70 .timer = &clps711x_timer, 70 .timer = &clps711x_timer,
71 .restart = clps711x_restart,
71MACHINE_END 72MACHINE_END
72 73
diff --git a/arch/arm/mach-clps711x/cdb89712.c b/arch/arm/mach-clps711x/cdb89712.c
index 25b3bfd0e85a..c314f49d6ef6 100644
--- a/arch/arm/mach-clps711x/cdb89712.c
+++ b/arch/arm/mach-clps711x/cdb89712.c
@@ -59,4 +59,5 @@ MACHINE_START(CDB89712, "Cirrus-CDB89712")
59 .map_io = cdb89712_map_io, 59 .map_io = cdb89712_map_io,
60 .init_irq = clps711x_init_irq, 60 .init_irq = clps711x_init_irq,
61 .timer = &clps711x_timer, 61 .timer = &clps711x_timer,
62 .restart = clps711x_restart,
62MACHINE_END 63MACHINE_END
diff --git a/arch/arm/mach-clps711x/ceiva.c b/arch/arm/mach-clps711x/ceiva.c
index 1df9ec67aa92..a70147e347ac 100644
--- a/arch/arm/mach-clps711x/ceiva.c
+++ b/arch/arm/mach-clps711x/ceiva.c
@@ -60,4 +60,5 @@ MACHINE_START(CEIVA, "CEIVA/Polaroid Photo MAX Digital Picture Frame")
60 .map_io = ceiva_map_io, 60 .map_io = ceiva_map_io,
61 .init_irq = clps711x_init_irq, 61 .init_irq = clps711x_init_irq,
62 .timer = &clps711x_timer, 62 .timer = &clps711x_timer,
63 .restart = clps711x_restart,
63MACHINE_END 64MACHINE_END
diff --git a/arch/arm/mach-clps711x/clep7312.c b/arch/arm/mach-clps711x/clep7312.c
index 80496c09ac59..dbc7842639dc 100644
--- a/arch/arm/mach-clps711x/clep7312.c
+++ b/arch/arm/mach-clps711x/clep7312.c
@@ -41,5 +41,6 @@ MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312")
41 .map_io = clps711x_map_io, 41 .map_io = clps711x_map_io,
42 .init_irq = clps711x_init_irq, 42 .init_irq = clps711x_init_irq,
43 .timer = &clps711x_timer, 43 .timer = &clps711x_timer,
44 .restart = clps711x_restart,
44MACHINE_END 45MACHINE_END
45 46
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c
index ced2a4e406f4..ab1711b9b4d6 100644
--- a/arch/arm/mach-clps711x/common.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -220,3 +220,8 @@ struct sys_timer clps711x_timer = {
220 .init = clps711x_timer_init, 220 .init = clps711x_timer_init,
221 .offset = clps711x_gettimeoffset, 221 .offset = clps711x_gettimeoffset,
222}; 222};
223
224void clps711x_restart(char mode, const char *cmd)
225{
226 soft_restart(0);
227}
diff --git a/arch/arm/mach-clps711x/common.h b/arch/arm/mach-clps711x/common.h
index 2b8b801f1dc3..fc0f0650dcb5 100644
--- a/arch/arm/mach-clps711x/common.h
+++ b/arch/arm/mach-clps711x/common.h
@@ -9,3 +9,4 @@ struct sys_timer;
9extern void clps711x_map_io(void); 9extern void clps711x_map_io(void);
10extern void clps711x_init_irq(void); 10extern void clps711x_init_irq(void);
11extern struct sys_timer clps711x_timer; 11extern struct sys_timer clps711x_timer;
12extern void clps711x_restart(char mode, const char *cmd);
diff --git a/arch/arm/mach-clps711x/edb7211-arch.c b/arch/arm/mach-clps711x/edb7211-arch.c
index 9721f6111dc0..5fad0b4f40ad 100644
--- a/arch/arm/mach-clps711x/edb7211-arch.c
+++ b/arch/arm/mach-clps711x/edb7211-arch.c
@@ -62,4 +62,5 @@ MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
62 .reserve = edb7211_reserve, 62 .reserve = edb7211_reserve,
63 .init_irq = clps711x_init_irq, 63 .init_irq = clps711x_init_irq,
64 .timer = &clps711x_timer, 64 .timer = &clps711x_timer,
65 .restart = clps711x_restart,
65MACHINE_END 66MACHINE_END
diff --git a/arch/arm/mach-clps711x/fortunet.c b/arch/arm/mach-clps711x/fortunet.c
index d99256687298..3a3f0b702cb4 100644
--- a/arch/arm/mach-clps711x/fortunet.c
+++ b/arch/arm/mach-clps711x/fortunet.c
@@ -78,4 +78,5 @@ MACHINE_START(FORTUNET, "ARM-FortuNet")
78 .map_io = clps711x_map_io, 78 .map_io = clps711x_map_io,
79 .init_irq = clps711x_init_irq, 79 .init_irq = clps711x_init_irq,
80 .timer = &clps711x_timer, 80 .timer = &clps711x_timer,
81 .restart = clps711x_restart,
81MACHINE_END 82MACHINE_END
diff --git a/arch/arm/mach-clps711x/include/mach/system.h b/arch/arm/mach-clps711x/include/mach/system.h
index 6c119937d398..23d6ef8c84da 100644
--- a/arch/arm/mach-clps711x/include/mach/system.h
+++ b/arch/arm/mach-clps711x/include/mach/system.h
@@ -32,9 +32,4 @@ static inline void arch_idle(void)
32 mov r0, r0"); 32 mov r0, r0");
33} 33}
34 34
35static inline void arch_reset(char mode, const char *cmd)
36{
37 soft_restart(0);
38}
39
40#endif 35#endif
diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c
index 6ecea95f38b2..42ee8f33eafb 100644
--- a/arch/arm/mach-clps711x/p720t.c
+++ b/arch/arm/mach-clps711x/p720t.c
@@ -93,6 +93,7 @@ MACHINE_START(P720T, "ARM-Prospector720T")
93 .map_io = p720t_map_io, 93 .map_io = p720t_map_io,
94 .init_irq = clps711x_init_irq, 94 .init_irq = clps711x_init_irq,
95 .timer = &clps711x_timer, 95 .timer = &clps711x_timer,
96 .restart = clps711x_restart,
96MACHINE_END 97MACHINE_END
97 98
98static int p720t_hw_init(void) 99static int p720t_hw_init(void)
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c
index 594852fe24cc..2c5fb4c7e509 100644
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
@@ -204,4 +204,5 @@ MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")
204 .timer = &cns3xxx_timer, 204 .timer = &cns3xxx_timer,
205 .handle_irq = gic_handle_irq, 205 .handle_irq = gic_handle_irq,
206 .init_machine = cns3420_init, 206 .init_machine = cns3420_init,
207 .restart = cns3xxx_restart,
207MACHINE_END 208MACHINE_END
diff --git a/arch/arm/mach-cns3xxx/core.h b/arch/arm/mach-cns3xxx/core.h
index fcd225343c61..4894b8c17151 100644
--- a/arch/arm/mach-cns3xxx/core.h
+++ b/arch/arm/mach-cns3xxx/core.h
@@ -22,5 +22,6 @@ static inline void cns3xxx_l2x0_init(void) {}
22void __init cns3xxx_map_io(void); 22void __init cns3xxx_map_io(void);
23void __init cns3xxx_init_irq(void); 23void __init cns3xxx_init_irq(void);
24void cns3xxx_power_off(void); 24void cns3xxx_power_off(void);
25void cns3xxx_restart(char, const char *);
25 26
26#endif /* __CNS3XXX_CORE_H */ 27#endif /* __CNS3XXX_CORE_H */
diff --git a/arch/arm/mach-cns3xxx/include/mach/system.h b/arch/arm/mach-cns3xxx/include/mach/system.h
index 4f16c9b79f78..9e56b7dc133a 100644
--- a/arch/arm/mach-cns3xxx/include/mach/system.h
+++ b/arch/arm/mach-cns3xxx/include/mach/system.h
@@ -11,7 +11,6 @@
11#ifndef __MACH_SYSTEM_H 11#ifndef __MACH_SYSTEM_H
12#define __MACH_SYSTEM_H 12#define __MACH_SYSTEM_H
13 13
14#include <linux/io.h>
15#include <asm/proc-fns.h> 14#include <asm/proc-fns.h>
16 15
17static inline void arch_idle(void) 16static inline void arch_idle(void)
@@ -23,6 +22,4 @@ static inline void arch_idle(void)
23 cpu_do_idle(); 22 cpu_do_idle();
24} 23}
25 24
26void arch_reset(char mode, const char *cmd);
27
28#endif 25#endif
diff --git a/arch/arm/mach-cns3xxx/pm.c b/arch/arm/mach-cns3xxx/pm.c
index 0c04678615ce..36458080332a 100644
--- a/arch/arm/mach-cns3xxx/pm.c
+++ b/arch/arm/mach-cns3xxx/pm.c
@@ -11,9 +11,9 @@
11#include <linux/io.h> 11#include <linux/io.h>
12#include <linux/delay.h> 12#include <linux/delay.h>
13#include <linux/atomic.h> 13#include <linux/atomic.h>
14#include <mach/system.h>
15#include <mach/cns3xxx.h> 14#include <mach/cns3xxx.h>
16#include <mach/pm.h> 15#include <mach/pm.h>
16#include "core.h"
17 17
18void cns3xxx_pwr_clk_en(unsigned int block) 18void cns3xxx_pwr_clk_en(unsigned int block)
19{ 19{
@@ -89,7 +89,7 @@ void cns3xxx_pwr_soft_rst(unsigned int block)
89} 89}
90EXPORT_SYMBOL(cns3xxx_pwr_soft_rst); 90EXPORT_SYMBOL(cns3xxx_pwr_soft_rst);
91 91
92void arch_reset(char mode, const char *cmd) 92void cns3xxx_restart(char mode, const char *cmd)
93{ 93{
94 /* 94 /*
95 * To reset, we hit the on-board reset register 95 * To reset, we hit the on-board reset register
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 11c3db985285..dc1afe5be20c 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -682,4 +682,5 @@ MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
682 .timer = &davinci_timer, 682 .timer = &davinci_timer,
683 .init_machine = da830_evm_init, 683 .init_machine = da830_evm_init,
684 .dma_zone_size = SZ_128M, 684 .dma_zone_size = SZ_128M,
685 .restart = da8xx_restart,
685MACHINE_END 686MACHINE_END
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 6659a90dbcad..f8a682f60a42 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1411,4 +1411,5 @@ MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
1411 .timer = &davinci_timer, 1411 .timer = &davinci_timer,
1412 .init_machine = da850_evm_init, 1412 .init_machine = da850_evm_init,
1413 .dma_zone_size = SZ_128M, 1413 .dma_zone_size = SZ_128M,
1414 .restart = da8xx_restart,
1414MACHINE_END 1415MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index 4e0e707c313d..275341f159fb 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -357,4 +357,5 @@ MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
357 .timer = &davinci_timer, 357 .timer = &davinci_timer,
358 .init_machine = dm355_evm_init, 358 .init_machine = dm355_evm_init,
359 .dma_zone_size = SZ_128M, 359 .dma_zone_size = SZ_128M,
360 .restart = davinci_restart,
360MACHINE_END 361MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index ff2d2413279a..e99db28181ae 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -276,4 +276,5 @@ MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard")
276 .timer = &davinci_timer, 276 .timer = &davinci_timer,
277 .init_machine = dm355_leopard_init, 277 .init_machine = dm355_leopard_init,
278 .dma_zone_size = SZ_128M, 278 .dma_zone_size = SZ_128M,
279 .restart = davinci_restart,
279MACHINE_END 280MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 46e1f4173b97..346e1de2f5a8 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -618,5 +618,6 @@ MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")
618 .timer = &davinci_timer, 618 .timer = &davinci_timer,
619 .init_machine = dm365_evm_init, 619 .init_machine = dm365_evm_init,
620 .dma_zone_size = SZ_128M, 620 .dma_zone_size = SZ_128M,
621 .restart = davinci_restart,
621MACHINE_END 622MACHINE_END
622 623
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 0cf8abf78d33..a64b49cfedca 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -719,4 +719,5 @@ MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
719 .timer = &davinci_timer, 719 .timer = &davinci_timer,
720 .init_machine = davinci_evm_init, 720 .init_machine = davinci_evm_init,
721 .dma_zone_size = SZ_128M, 721 .dma_zone_size = SZ_128M,
722 .restart = davinci_restart,
722MACHINE_END 723MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 635bf7740157..64017558860b 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -799,6 +799,7 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
799 .timer = &davinci_timer, 799 .timer = &davinci_timer,
800 .init_machine = evm_init, 800 .init_machine = evm_init,
801 .dma_zone_size = SZ_128M, 801 .dma_zone_size = SZ_128M,
802 .restart = davinci_restart,
802MACHINE_END 803MACHINE_END
803 804
804MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM") 805MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
@@ -808,5 +809,6 @@ MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
808 .timer = &davinci_timer, 809 .timer = &davinci_timer,
809 .init_machine = evm_init, 810 .init_machine = evm_init,
810 .dma_zone_size = SZ_128M, 811 .dma_zone_size = SZ_128M,
812 .restart = davinci_restart,
811MACHINE_END 813MACHINE_END
812 814
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index 3cfff555e8f2..672d820e2aa4 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -573,4 +573,5 @@ MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808")
573 .timer = &davinci_timer, 573 .timer = &davinci_timer,
574 .init_machine = mityomapl138_init, 574 .init_machine = mityomapl138_init,
575 .dma_zone_size = SZ_128M, 575 .dma_zone_size = SZ_128M,
576 .restart = da8xx_restart,
576MACHINE_END 577MACHINE_END
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index e5f231aefee4..6c4a16415d47 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -278,4 +278,5 @@ MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
278 .timer = &davinci_timer, 278 .timer = &davinci_timer,
279 .init_machine = davinci_ntosd2_init, 279 .init_machine = davinci_ntosd2_init,
280 .dma_zone_size = SZ_128M, 280 .dma_zone_size = SZ_128M,
281 .restart = davinci_restart,
281MACHINE_END 282MACHINE_END
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index c6701e4a795c..e7c0c7c53493 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -344,4 +344,5 @@ MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
344 .timer = &davinci_timer, 344 .timer = &davinci_timer,
345 .init_machine = omapl138_hawk_init, 345 .init_machine = omapl138_hawk_init,
346 .dma_zone_size = SZ_128M, 346 .dma_zone_size = SZ_128M,
347 .restart = da8xx_restart,
347MACHINE_END 348MACHINE_END
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index 5dd4da9d2308..0b136a831c59 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -157,4 +157,5 @@ MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
157 .timer = &davinci_timer, 157 .timer = &davinci_timer,
158 .init_machine = davinci_sffsdr_init, 158 .init_machine = davinci_sffsdr_init,
159 .dma_zone_size = SZ_128M, 159 .dma_zone_size = SZ_128M,
160 .restart = davinci_restart,
160MACHINE_END 161MACHINE_END
diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c
index f69e40a29e02..5f14e30b00d8 100644
--- a/arch/arm/mach-davinci/board-tnetv107x-evm.c
+++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c
@@ -283,4 +283,5 @@ MACHINE_START(TNETV107X, "TNETV107X EVM")
283 .timer = &davinci_timer, 283 .timer = &davinci_timer,
284 .init_machine = tnetv107x_evm_board_init, 284 .init_machine = tnetv107x_evm_board_init,
285 .dma_zone_size = SZ_128M, 285 .dma_zone_size = SZ_128M,
286 .restart = tnetv107x_restart,
286MACHINE_END 287MACHINE_END
diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c
index 865ffe5899ac..cb9b2e47510c 100644
--- a/arch/arm/mach-davinci/common.c
+++ b/arch/arm/mach-davinci/common.c
@@ -97,9 +97,6 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info)
97 local_flush_tlb_all(); 97 local_flush_tlb_all();
98 flush_cache_all(); 98 flush_cache_all();
99 99
100 if (!davinci_soc_info.reset)
101 davinci_soc_info.reset = davinci_watchdog_reset;
102
103 /* 100 /*
104 * We want to check CPU revision early for cpu_is_xxxx() macros. 101 * We want to check CPU revision early for cpu_is_xxxx() macros.
105 * IO space mapping must be initialized before we can do that. 102 * IO space mapping must be initialized before we can do that.
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index a6bf5dcaef13..deee5c2da754 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -1201,7 +1201,6 @@ static struct davinci_soc_info davinci_soc_info_da830 = {
1201 .gpio_irq = IRQ_DA8XX_GPIO0, 1201 .gpio_irq = IRQ_DA8XX_GPIO0,
1202 .serial_dev = &da8xx_serial_device, 1202 .serial_dev = &da8xx_serial_device,
1203 .emac_pdata = &da8xx_emac_pdata, 1203 .emac_pdata = &da8xx_emac_pdata,
1204 .reset_device = &da8xx_wdt_device,
1205}; 1204};
1206 1205
1207void __init da830_init(void) 1206void __init da830_init(void)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index b047f8702278..0ed7fdb64efb 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -1121,7 +1121,6 @@ static struct davinci_soc_info davinci_soc_info_da850 = {
1121 .emac_pdata = &da8xx_emac_pdata, 1121 .emac_pdata = &da8xx_emac_pdata,
1122 .sram_dma = DA8XX_ARM_RAM_BASE, 1122 .sram_dma = DA8XX_ARM_RAM_BASE,
1123 .sram_len = SZ_8K, 1123 .sram_len = SZ_8K,
1124 .reset_device = &da8xx_wdt_device,
1125}; 1124};
1126 1125
1127void __init da850_init(void) 1126void __init da850_init(void)
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 68def7188868..42dbf3dc11ab 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -363,6 +363,11 @@ struct platform_device da8xx_wdt_device = {
363 .resource = da8xx_watchdog_resources, 363 .resource = da8xx_watchdog_resources,
364}; 364};
365 365
366void da8xx_restart(char mode, const char *cmd)
367{
368 davinci_watchdog_reset(&da8xx_wdt_device);
369}
370
366int __init da8xx_register_watchdog(void) 371int __init da8xx_register_watchdog(void)
367{ 372{
368 return platform_device_register(&da8xx_wdt_device); 373 return platform_device_register(&da8xx_wdt_device);
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 806a2f02b980..50c0156b4262 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -291,6 +291,11 @@ struct platform_device davinci_wdt_device = {
291 .resource = wdt_resources, 291 .resource = wdt_resources,
292}; 292};
293 293
294void davinci_restart(char mode, const char *cmd)
295{
296 davinci_watchdog_reset(&davinci_wdt_device);
297}
298
294static void davinci_init_wdt(void) 299static void davinci_init_wdt(void)
295{ 300{
296 platform_device_register(&davinci_wdt_device); 301 platform_device_register(&davinci_wdt_device);
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index fe520d4167a2..19667cfc5de0 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -853,7 +853,6 @@ static struct davinci_soc_info davinci_soc_info_dm355 = {
853 .serial_dev = &dm355_serial_device, 853 .serial_dev = &dm355_serial_device,
854 .sram_dma = 0x00010000, 854 .sram_dma = 0x00010000,
855 .sram_len = SZ_32K, 855 .sram_len = SZ_32K,
856 .reset_device = &davinci_wdt_device,
857}; 856};
858 857
859void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata) 858void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata)
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 679e168dce34..f15b435cc655 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1083,7 +1083,6 @@ static struct davinci_soc_info davinci_soc_info_dm365 = {
1083 .emac_pdata = &dm365_emac_pdata, 1083 .emac_pdata = &dm365_emac_pdata,
1084 .sram_dma = 0x00010000, 1084 .sram_dma = 0x00010000,
1085 .sram_len = SZ_32K, 1085 .sram_len = SZ_32K,
1086 .reset_device = &davinci_wdt_device,
1087}; 1086};
1088 1087
1089void __init dm365_init_asp(struct snd_platform_data *pdata) 1088void __init dm365_init_asp(struct snd_platform_data *pdata)
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 3470983aa343..0800f9cf33bb 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -767,7 +767,6 @@ static struct davinci_soc_info davinci_soc_info_dm644x = {
767 .emac_pdata = &dm644x_emac_pdata, 767 .emac_pdata = &dm644x_emac_pdata,
768 .sram_dma = 0x00008000, 768 .sram_dma = 0x00008000,
769 .sram_len = SZ_16K, 769 .sram_len = SZ_16K,
770 .reset_device = &davinci_wdt_device,
771}; 770};
772 771
773void __init dm644x_init_asp(struct snd_platform_data *pdata) 772void __init dm644x_init_asp(struct snd_platform_data *pdata)
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index af27c130595f..00f774394b16 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -854,7 +854,6 @@ static struct davinci_soc_info davinci_soc_info_dm646x = {
854 .emac_pdata = &dm646x_emac_pdata, 854 .emac_pdata = &dm646x_emac_pdata,
855 .sram_dma = 0x10010000, 855 .sram_dma = 0x10010000,
856 .sram_len = SZ_32K, 856 .sram_len = SZ_32K,
857 .reset_device = &davinci_wdt_device,
858}; 857};
859 858
860void __init dm646x_init_mcasp0(struct snd_platform_data *pdata) 859void __init dm646x_init_mcasp0(struct snd_platform_data *pdata)
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index a57cba21e21e..5cd39a4e0c96 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -77,14 +77,13 @@ struct davinci_soc_info {
77 struct emac_platform_data *emac_pdata; 77 struct emac_platform_data *emac_pdata;
78 dma_addr_t sram_dma; 78 dma_addr_t sram_dma;
79 unsigned sram_len; 79 unsigned sram_len;
80 struct platform_device *reset_device;
81 void (*reset)(struct platform_device *);
82}; 80};
83 81
84extern struct davinci_soc_info davinci_soc_info; 82extern struct davinci_soc_info davinci_soc_info;
85 83
86extern void davinci_common_init(struct davinci_soc_info *soc_info); 84extern void davinci_common_init(struct davinci_soc_info *soc_info);
87extern void davinci_init_ide(void); 85extern void davinci_init_ide(void);
86void davinci_restart(char mode, const char *cmd);
88 87
89/* standard place to map on-chip SRAMs; they *may* support DMA */ 88/* standard place to map on-chip SRAMs; they *may* support DMA */
90#define SRAM_VIRT 0xfffe0000 89#define SRAM_VIRT 0xfffe0000
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index eaca7d8b9d68..ee3461d7ec1b 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -91,6 +91,7 @@ int da8xx_register_cpuidle(void);
91void __iomem * __init da8xx_get_mem_ctlr(void); 91void __iomem * __init da8xx_get_mem_ctlr(void);
92int da850_register_pm(struct platform_device *pdev); 92int da850_register_pm(struct platform_device *pdev);
93int __init da850_register_sata(unsigned long refclkpn); 93int __init da850_register_sata(unsigned long refclkpn);
94void da8xx_restart(char mode, const char *cmd);
94 95
95extern struct platform_device da8xx_serial_device; 96extern struct platform_device da8xx_serial_device;
96extern struct emac_platform_data da8xx_emac_pdata; 97extern struct emac_platform_data da8xx_emac_pdata;
diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h
index e65629c20769..fcb7a015aba5 100644
--- a/arch/arm/mach-davinci/include/mach/system.h
+++ b/arch/arm/mach-davinci/include/mach/system.h
@@ -18,10 +18,4 @@ static inline void arch_idle(void)
18 cpu_do_idle(); 18 cpu_do_idle();
19} 19}
20 20
21static inline void arch_reset(char mode, const char *cmd)
22{
23 if (davinci_soc_info.reset)
24 davinci_soc_info.reset(davinci_soc_info.reset_device);
25}
26
27#endif /* __ASM_ARCH_SYSTEM_H */ 21#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-davinci/include/mach/tnetv107x.h b/arch/arm/mach-davinci/include/mach/tnetv107x.h
index 89c1fdc63c0b..83e5926f3c46 100644
--- a/arch/arm/mach-davinci/include/mach/tnetv107x.h
+++ b/arch/arm/mach-davinci/include/mach/tnetv107x.h
@@ -54,6 +54,7 @@ extern struct platform_device tnetv107x_serial_device;
54extern void __init tnetv107x_init(void); 54extern void __init tnetv107x_init(void);
55extern void __init tnetv107x_devices_init(struct tnetv107x_device_info *); 55extern void __init tnetv107x_devices_init(struct tnetv107x_device_info *);
56extern void __init tnetv107x_irq_init(void); 56extern void __init tnetv107x_irq_init(void);
57void tnetv107x_restart(char mode, const char *cmd);
57 58
58#endif 59#endif
59 60
diff --git a/arch/arm/mach-davinci/tnetv107x.c b/arch/arm/mach-davinci/tnetv107x.c
index 409bb869c7c7..dc1a209b9b66 100644
--- a/arch/arm/mach-davinci/tnetv107x.c
+++ b/arch/arm/mach-davinci/tnetv107x.c
@@ -730,6 +730,11 @@ static void tnetv107x_watchdog_reset(struct platform_device *pdev)
730 __raw_writel(1, &regs->kick); 730 __raw_writel(1, &regs->kick);
731} 731}
732 732
733void tnetv107x_restart(char mode, const char *cmd)
734{
735 tnetv107x_watchdog_reset(&tnetv107x_wdt_device);
736}
737
733static struct davinci_soc_info tnetv107x_soc_info = { 738static struct davinci_soc_info tnetv107x_soc_info = {
734 .io_desc = io_desc, 739 .io_desc = io_desc,
735 .io_desc_num = ARRAY_SIZE(io_desc), 740 .io_desc_num = ARRAY_SIZE(io_desc),
@@ -752,8 +757,6 @@ static struct davinci_soc_info tnetv107x_soc_info = {
752 .gpio_num = TNETV107X_N_GPIO, 757 .gpio_num = TNETV107X_N_GPIO,
753 .timer_info = &timer_info, 758 .timer_info = &timer_info,
754 .serial_dev = &tnetv107x_serial_device, 759 .serial_dev = &tnetv107x_serial_device,
755 .reset = tnetv107x_watchdog_reset,
756 .reset_device = &tnetv107x_wdt_device,
757}; 760};
758 761
759void __init tnetv107x_init(void) 762void __init tnetv107x_init(void)
diff --git a/arch/arm/mach-dove/cm-a510.c b/arch/arm/mach-dove/cm-a510.c
index c8a406f7e946..792b4e2e24f1 100644
--- a/arch/arm/mach-dove/cm-a510.c
+++ b/arch/arm/mach-dove/cm-a510.c
@@ -93,4 +93,5 @@ MACHINE_START(CM_A510, "Compulab CM-A510 Board")
93 .init_early = dove_init_early, 93 .init_early = dove_init_early,
94 .init_irq = dove_init_irq, 94 .init_irq = dove_init_irq,
95 .timer = &dove_timer, 95 .timer = &dove_timer,
96 .restart = dove_restart,
96MACHINE_END 97MACHINE_END
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index a9e0dae86a26..13bb236cd0cd 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -292,3 +292,19 @@ void __init dove_init(void)
292 dove_xor0_init(); 292 dove_xor0_init();
293 dove_xor1_init(); 293 dove_xor1_init();
294} 294}
295
296void dove_restart(char mode, const char *cmd)
297{
298 /*
299 * Enable soft reset to assert RSTOUTn.
300 */
301 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
302
303 /*
304 * Assert soft reset.
305 */
306 writel(SOFT_RESET, SYSTEM_SOFT_RESET);
307
308 while (1)
309 ;
310}
diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h
index 6a2046e44706..42027305c107 100644
--- a/arch/arm/mach-dove/common.h
+++ b/arch/arm/mach-dove/common.h
@@ -39,5 +39,6 @@ void dove_spi1_init(void);
39void dove_i2c_init(void); 39void dove_i2c_init(void);
40void dove_sdio0_init(void); 40void dove_sdio0_init(void);
41void dove_sdio1_init(void); 41void dove_sdio1_init(void);
42void dove_restart(char, const char *);
42 43
43#endif 44#endif
diff --git a/arch/arm/mach-dove/dove-db-setup.c b/arch/arm/mach-dove/dove-db-setup.c
index 11ea34e4fc76..ea77ae430b2d 100644
--- a/arch/arm/mach-dove/dove-db-setup.c
+++ b/arch/arm/mach-dove/dove-db-setup.c
@@ -100,4 +100,5 @@ MACHINE_START(DOVE_DB, "Marvell DB-MV88AP510-BP Development Board")
100 .init_early = dove_init_early, 100 .init_early = dove_init_early,
101 .init_irq = dove_init_irq, 101 .init_irq = dove_init_irq,
102 .timer = &dove_timer, 102 .timer = &dove_timer,
103 .restart = dove_restart,
103MACHINE_END 104MACHINE_END
diff --git a/arch/arm/mach-dove/include/mach/system.h b/arch/arm/mach-dove/include/mach/system.h
index 356afda56853..3027954f6162 100644
--- a/arch/arm/mach-dove/include/mach/system.h
+++ b/arch/arm/mach-dove/include/mach/system.h
@@ -9,28 +9,9 @@
9#ifndef __ASM_ARCH_SYSTEM_H 9#ifndef __ASM_ARCH_SYSTEM_H
10#define __ASM_ARCH_SYSTEM_H 10#define __ASM_ARCH_SYSTEM_H
11 11
12#include <mach/bridge-regs.h>
13
14static inline void arch_idle(void) 12static inline void arch_idle(void)
15{ 13{
16 cpu_do_idle(); 14 cpu_do_idle();
17} 15}
18 16
19static inline void arch_reset(char mode, const char *cmd)
20{
21 /*
22 * Enable soft reset to assert RSTOUTn.
23 */
24 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
25
26 /*
27 * Assert soft reset.
28 */
29 writel(SOFT_RESET, SYSTEM_SOFT_RESET);
30
31 while (1)
32 ;
33}
34
35
36#endif 17#endif
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index ce3ed244c4b0..294aad07f7a0 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -278,6 +278,11 @@ static int __init ebsa110_init(void)
278 278
279arch_initcall(ebsa110_init); 279arch_initcall(ebsa110_init);
280 280
281static void ebsa110_restart(char mode, const char *cmd)
282{
283 soft_restart(0x80000000);
284}
285
281MACHINE_START(EBSA110, "EBSA110") 286MACHINE_START(EBSA110, "EBSA110")
282 /* Maintainer: Russell King */ 287 /* Maintainer: Russell King */
283 .atag_offset = 0x400, 288 .atag_offset = 0x400,
@@ -287,4 +292,5 @@ MACHINE_START(EBSA110, "EBSA110")
287 .map_io = ebsa110_map_io, 292 .map_io = ebsa110_map_io,
288 .init_irq = ebsa110_init_irq, 293 .init_irq = ebsa110_init_irq,
289 .timer = &ebsa110_timer, 294 .timer = &ebsa110_timer,
295 .restart = ebsa110_restart,
290MACHINE_END 296MACHINE_END
diff --git a/arch/arm/mach-ebsa110/include/mach/system.h b/arch/arm/mach-ebsa110/include/mach/system.h
index 0d5df72a03f6..2e4af65edb6f 100644
--- a/arch/arm/mach-ebsa110/include/mach/system.h
+++ b/arch/arm/mach-ebsa110/include/mach/system.h
@@ -34,6 +34,4 @@ static inline void arch_idle(void)
34 asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); 34 asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
35} 35}
36 36
37#define arch_reset(mode, cmd) soft_restart(0x80000000)
38
39#endif 37#endif
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
index d9b0ea2ba4d8..681e939407d4 100644
--- a/arch/arm/mach-ep93xx/adssphere.c
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -40,4 +40,5 @@ MACHINE_START(ADSSPHERE, "ADS Sphere board")
40 .handle_irq = vic_handle_irq, 40 .handle_irq = vic_handle_irq,
41 .timer = &ep93xx_timer, 41 .timer = &ep93xx_timer,
42 .init_machine = adssphere_init_machine, 42 .init_machine = adssphere_init_machine,
43 .restart = ep93xx_restart,
43MACHINE_END 44MACHINE_END
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 2432a6b7dcac..24203f9a6796 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -906,3 +906,15 @@ void __init ep93xx_init_devices(void)
906 platform_device_register(&ep93xx_ohci_device); 906 platform_device_register(&ep93xx_ohci_device);
907 platform_device_register(&ep93xx_leds); 907 platform_device_register(&ep93xx_leds);
908} 908}
909
910void ep93xx_restart(char mode, const char *cmd)
911{
912 /*
913 * Set then clear the SWRST bit to initiate a software reset
914 */
915 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
916 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
917
918 while (1)
919 ;
920}
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c
index 9bbae0835f27..d115653edca3 100644
--- a/arch/arm/mach-ep93xx/edb93xx.c
+++ b/arch/arm/mach-ep93xx/edb93xx.c
@@ -254,6 +254,7 @@ MACHINE_START(EDB9301, "Cirrus Logic EDB9301 Evaluation Board")
254 .handle_irq = vic_handle_irq, 254 .handle_irq = vic_handle_irq,
255 .timer = &ep93xx_timer, 255 .timer = &ep93xx_timer,
256 .init_machine = edb93xx_init_machine, 256 .init_machine = edb93xx_init_machine,
257 .restart = ep93xx_restart,
257MACHINE_END 258MACHINE_END
258#endif 259#endif
259 260
@@ -266,6 +267,7 @@ MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
266 .handle_irq = vic_handle_irq, 267 .handle_irq = vic_handle_irq,
267 .timer = &ep93xx_timer, 268 .timer = &ep93xx_timer,
268 .init_machine = edb93xx_init_machine, 269 .init_machine = edb93xx_init_machine,
270 .restart = ep93xx_restart,
269MACHINE_END 271MACHINE_END
270#endif 272#endif
271 273
@@ -278,6 +280,7 @@ MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
278 .handle_irq = vic_handle_irq, 280 .handle_irq = vic_handle_irq,
279 .timer = &ep93xx_timer, 281 .timer = &ep93xx_timer,
280 .init_machine = edb93xx_init_machine, 282 .init_machine = edb93xx_init_machine,
283 .restart = ep93xx_restart,
281MACHINE_END 284MACHINE_END
282#endif 285#endif
283 286
@@ -290,6 +293,7 @@ MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")
290 .handle_irq = vic_handle_irq, 293 .handle_irq = vic_handle_irq,
291 .timer = &ep93xx_timer, 294 .timer = &ep93xx_timer,
292 .init_machine = edb93xx_init_machine, 295 .init_machine = edb93xx_init_machine,
296 .restart = ep93xx_restart,
293MACHINE_END 297MACHINE_END
294#endif 298#endif
295 299
@@ -302,6 +306,7 @@ MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board")
302 .handle_irq = vic_handle_irq, 306 .handle_irq = vic_handle_irq,
303 .timer = &ep93xx_timer, 307 .timer = &ep93xx_timer,
304 .init_machine = edb93xx_init_machine, 308 .init_machine = edb93xx_init_machine,
309 .restart = ep93xx_restart,
305MACHINE_END 310MACHINE_END
306#endif 311#endif
307 312
@@ -314,6 +319,7 @@ MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
314 .handle_irq = vic_handle_irq, 319 .handle_irq = vic_handle_irq,
315 .timer = &ep93xx_timer, 320 .timer = &ep93xx_timer,
316 .init_machine = edb93xx_init_machine, 321 .init_machine = edb93xx_init_machine,
322 .restart = ep93xx_restart,
317MACHINE_END 323MACHINE_END
318#endif 324#endif
319 325
@@ -326,6 +332,7 @@ MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
326 .handle_irq = vic_handle_irq, 332 .handle_irq = vic_handle_irq,
327 .timer = &ep93xx_timer, 333 .timer = &ep93xx_timer,
328 .init_machine = edb93xx_init_machine, 334 .init_machine = edb93xx_init_machine,
335 .restart = ep93xx_restart,
329MACHINE_END 336MACHINE_END
330#endif 337#endif
331 338
@@ -338,5 +345,6 @@ MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
338 .handle_irq = vic_handle_irq, 345 .handle_irq = vic_handle_irq,
339 .timer = &ep93xx_timer, 346 .timer = &ep93xx_timer,
340 .init_machine = edb93xx_init_machine, 347 .init_machine = edb93xx_init_machine,
348 .restart = ep93xx_restart,
341MACHINE_END 349MACHINE_END
342#endif 350#endif
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index 1dd32a7c5f15..af46970dc58e 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -40,4 +40,5 @@ MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
40 .handle_irq = vic_handle_irq, 40 .handle_irq = vic_handle_irq,
41 .timer = &ep93xx_timer, 41 .timer = &ep93xx_timer,
42 .init_machine = gesbc9312_init_machine, 42 .init_machine = gesbc9312_init_machine,
43 .restart = ep93xx_restart,
43MACHINE_END 44MACHINE_END
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index 50660455b1d8..d4c934931f9d 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -66,4 +66,6 @@ void ep93xx_register_ac97(void);
66void ep93xx_init_devices(void); 66void ep93xx_init_devices(void);
67extern struct sys_timer ep93xx_timer; 67extern struct sys_timer ep93xx_timer;
68 68
69void ep93xx_restart(char, const char *);
70
69#endif 71#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/system.h b/arch/arm/mach-ep93xx/include/mach/system.h
index bdf6c4f1feef..b5bec7cb9b52 100644
--- a/arch/arm/mach-ep93xx/include/mach/system.h
+++ b/arch/arm/mach-ep93xx/include/mach/system.h
@@ -1,22 +1,7 @@
1/* 1/*
2 * arch/arm/mach-ep93xx/include/mach/system.h 2 * arch/arm/mach-ep93xx/include/mach/system.h
3 */ 3 */
4
5#include <mach/hardware.h>
6
7static inline void arch_idle(void) 4static inline void arch_idle(void)
8{ 5{
9 cpu_do_idle(); 6 cpu_do_idle();
10} 7}
11
12static inline void arch_reset(char mode, const char *cmd)
13{
14 /*
15 * Set then clear the SWRST bit to initiate a software reset
16 */
17 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
18 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
19
20 while (1)
21 ;
22}
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index a6dae6c2e3c1..7b98084f0c97 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -84,6 +84,7 @@ MACHINE_START(MICRO9, "Contec Micro9-High")
84 .handle_irq = vic_handle_irq, 84 .handle_irq = vic_handle_irq,
85 .timer = &ep93xx_timer, 85 .timer = &ep93xx_timer,
86 .init_machine = micro9_init_machine, 86 .init_machine = micro9_init_machine,
87 .restart = ep93xx_restart,
87MACHINE_END 88MACHINE_END
88#endif 89#endif
89 90
@@ -96,6 +97,7 @@ MACHINE_START(MICRO9M, "Contec Micro9-Mid")
96 .handle_irq = vic_handle_irq, 97 .handle_irq = vic_handle_irq,
97 .timer = &ep93xx_timer, 98 .timer = &ep93xx_timer,
98 .init_machine = micro9_init_machine, 99 .init_machine = micro9_init_machine,
100 .restart = ep93xx_restart,
99MACHINE_END 101MACHINE_END
100#endif 102#endif
101 103
@@ -108,6 +110,7 @@ MACHINE_START(MICRO9L, "Contec Micro9-Lite")
108 .handle_irq = vic_handle_irq, 110 .handle_irq = vic_handle_irq,
109 .timer = &ep93xx_timer, 111 .timer = &ep93xx_timer,
110 .init_machine = micro9_init_machine, 112 .init_machine = micro9_init_machine,
113 .restart = ep93xx_restart,
111MACHINE_END 114MACHINE_END
112#endif 115#endif
113 116
@@ -120,5 +123,6 @@ MACHINE_START(MICRO9S, "Contec Micro9-Slim")
120 .handle_irq = vic_handle_irq, 123 .handle_irq = vic_handle_irq,
121 .timer = &ep93xx_timer, 124 .timer = &ep93xx_timer,
122 .init_machine = micro9_init_machine, 125 .init_machine = micro9_init_machine,
126 .restart = ep93xx_restart,
123MACHINE_END 127MACHINE_END
124#endif 128#endif
diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c
index 40121ba8e711..f4e553eca21c 100644
--- a/arch/arm/mach-ep93xx/simone.c
+++ b/arch/arm/mach-ep93xx/simone.c
@@ -84,4 +84,5 @@ MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board")
84 .handle_irq = vic_handle_irq, 84 .handle_irq = vic_handle_irq,
85 .timer = &ep93xx_timer, 85 .timer = &ep93xx_timer,
86 .init_machine = simone_init_machine, 86 .init_machine = simone_init_machine,
87 .restart = ep93xx_restart,
87MACHINE_END 88MACHINE_END
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
index ec7c63ff01e2..fd846331ddff 100644
--- a/arch/arm/mach-ep93xx/snappercl15.c
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -181,4 +181,5 @@ MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
181 .handle_irq = vic_handle_irq, 181 .handle_irq = vic_handle_irq,
182 .timer = &ep93xx_timer, 182 .timer = &ep93xx_timer,
183 .init_machine = snappercl15_init_machine, 183 .init_machine = snappercl15_init_machine,
184 .restart = ep93xx_restart,
184MACHINE_END 185MACHINE_END
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index 760384e6407d..79f8ecf07a19 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -251,4 +251,5 @@ MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
251 .handle_irq = vic_handle_irq, 251 .handle_irq = vic_handle_irq,
252 .timer = &ep93xx_timer, 252 .timer = &ep93xx_timer,
253 .init_machine = ts72xx_init_machine, 253 .init_machine = ts72xx_init_machine,
254 .restart = ep93xx_restart,
254MACHINE_END 255MACHINE_END
diff --git a/arch/arm/mach-ep93xx/vision_ep9307.c b/arch/arm/mach-ep93xx/vision_ep9307.c
index d96e4dbec6a8..03dd4012043e 100644
--- a/arch/arm/mach-ep93xx/vision_ep9307.c
+++ b/arch/arm/mach-ep93xx/vision_ep9307.c
@@ -361,4 +361,5 @@ MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
361 .init_irq = ep93xx_init_irq, 361 .init_irq = ep93xx_init_irq,
362 .timer = &ep93xx_timer, 362 .timer = &ep93xx_timer,
363 .init_machine = vision_init_machine, 363 .init_machine = vision_init_machine,
364 .restart = ep93xx_restart,
364MACHINE_END 365MACHINE_END
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 59069a35e40b..bcb9efc576e9 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -10,15 +10,17 @@ obj-m :=
10obj-n := 10obj-n :=
11obj- := 11obj- :=
12 12
13# Core support for EXYNOS4 system 13# Core
14 14
15obj-$(CONFIG_ARCH_EXYNOS4) += cpu.o init.o clock.o irq-combiner.o setup-i2c0.o 15obj-$(CONFIG_ARCH_EXYNOS4) += common.o clock.o
16obj-$(CONFIG_ARCH_EXYNOS4) += irq-eint.o dma.o pmu.o
17obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o 16obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o
18obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o 17obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o
18
19obj-$(CONFIG_PM) += pm.o 19obj-$(CONFIG_PM) += pm.o
20obj-$(CONFIG_CPU_IDLE) += cpuidle.o 20obj-$(CONFIG_CPU_IDLE) += cpuidle.o
21 21
22obj-$(CONFIG_ARCH_EXYNOS4) += dma.o pmu.o
23
22obj-$(CONFIG_SMP) += platsmp.o headsmp.o 24obj-$(CONFIG_SMP) += platsmp.o headsmp.o
23 25
24obj-$(CONFIG_EXYNOS4_MCT) += mct.o 26obj-$(CONFIG_EXYNOS4_MCT) += mct.o
@@ -45,6 +47,7 @@ obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o
45obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o 47obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o
46obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o 48obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
47 49
50obj-$(CONFIG_ARCH_EXYNOS4) += setup-i2c0.o
48obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o 51obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o
49obj-$(CONFIG_EXYNOS4_SETUP_FIMD0) += setup-fimd0.o 52obj-$(CONFIG_EXYNOS4_SETUP_FIMD0) += setup-fimd0.o
50obj-$(CONFIG_EXYNOS4_SETUP_I2C1) += setup-i2c1.o 53obj-$(CONFIG_EXYNOS4_SETUP_I2C1) += setup-i2c1.o
diff --git a/arch/arm/mach-exynos/clock-exynos4210.c b/arch/arm/mach-exynos/clock-exynos4210.c
index b9d5ef670eb4..a5823a7f249e 100644
--- a/arch/arm/mach-exynos/clock-exynos4210.c
+++ b/arch/arm/mach-exynos/clock-exynos4210.c
@@ -23,7 +23,6 @@
23#include <plat/pll.h> 23#include <plat/pll.h>
24#include <plat/s5p-clock.h> 24#include <plat/s5p-clock.h>
25#include <plat/clock-clksrc.h> 25#include <plat/clock-clksrc.h>
26#include <plat/exynos4.h>
27#include <plat/pm.h> 26#include <plat/pm.h>
28 27
29#include <mach/hardware.h> 28#include <mach/hardware.h>
@@ -31,6 +30,8 @@
31#include <mach/regs-clock.h> 30#include <mach/regs-clock.h>
32#include <mach/exynos4-clock.h> 31#include <mach/exynos4-clock.h>
33 32
33#include "common.h"
34
34static struct sleep_save exynos4210_clock_save[] = { 35static struct sleep_save exynos4210_clock_save[] = {
35 SAVE_ITEM(S5P_CLKSRC_IMAGE), 36 SAVE_ITEM(S5P_CLKSRC_IMAGE),
36 SAVE_ITEM(S5P_CLKSRC_LCD1), 37 SAVE_ITEM(S5P_CLKSRC_LCD1),
diff --git a/arch/arm/mach-exynos/clock-exynos4212.c b/arch/arm/mach-exynos/clock-exynos4212.c
index 77d5decb34fd..26a668b0d101 100644
--- a/arch/arm/mach-exynos/clock-exynos4212.c
+++ b/arch/arm/mach-exynos/clock-exynos4212.c
@@ -23,7 +23,6 @@
23#include <plat/pll.h> 23#include <plat/pll.h>
24#include <plat/s5p-clock.h> 24#include <plat/s5p-clock.h>
25#include <plat/clock-clksrc.h> 25#include <plat/clock-clksrc.h>
26#include <plat/exynos4.h>
27#include <plat/pm.h> 26#include <plat/pm.h>
28 27
29#include <mach/hardware.h> 28#include <mach/hardware.h>
@@ -31,6 +30,8 @@
31#include <mach/regs-clock.h> 30#include <mach/regs-clock.h>
32#include <mach/exynos4-clock.h> 31#include <mach/exynos4-clock.h>
33 32
33#include "common.h"
34
34static struct sleep_save exynos4212_clock_save[] = { 35static struct sleep_save exynos4212_clock_save[] = {
35 SAVE_ITEM(S5P_CLKSRC_IMAGE), 36 SAVE_ITEM(S5P_CLKSRC_IMAGE),
36 SAVE_ITEM(S5P_CLKDIV_IMAGE), 37 SAVE_ITEM(S5P_CLKDIV_IMAGE),
diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
index 2894f0adef5c..83616a039b15 100644
--- a/arch/arm/mach-exynos/clock.c
+++ b/arch/arm/mach-exynos/clock.c
@@ -21,7 +21,6 @@
21#include <plat/pll.h> 21#include <plat/pll.h>
22#include <plat/s5p-clock.h> 22#include <plat/s5p-clock.h>
23#include <plat/clock-clksrc.h> 23#include <plat/clock-clksrc.h>
24#include <plat/exynos4.h>
25#include <plat/pm.h> 24#include <plat/pm.h>
26 25
27#include <mach/map.h> 26#include <mach/map.h>
@@ -29,6 +28,8 @@
29#include <mach/sysmmu.h> 28#include <mach/sysmmu.h>
30#include <mach/exynos4-clock.h> 29#include <mach/exynos4-clock.h>
31 30
31#include "common.h"
32
32static struct sleep_save exynos4_clock_save[] = { 33static struct sleep_save exynos4_clock_save[] = {
33 SAVE_ITEM(S5P_CLKDIV_LEFTBUS), 34 SAVE_ITEM(S5P_CLKDIV_LEFTBUS),
34 SAVE_ITEM(S5P_CLKGATE_IP_LEFTBUS), 35 SAVE_ITEM(S5P_CLKGATE_IP_LEFTBUS),
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
new file mode 100644
index 000000000000..5de4214fa78f
--- /dev/null
+++ b/arch/arm/mach-exynos/common.c
@@ -0,0 +1,704 @@
1/*
2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common Codes for EXYNOS
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/interrupt.h>
14#include <linux/irq.h>
15#include <linux/io.h>
16#include <linux/sysdev.h>
17#include <linux/gpio.h>
18#include <linux/sched.h>
19#include <linux/serial_core.h>
20
21#include <asm/proc-fns.h>
22#include <asm/exception.h>
23#include <asm/hardware/cache-l2x0.h>
24#include <asm/hardware/gic.h>
25#include <asm/mach/map.h>
26#include <asm/mach/irq.h>
27
28#include <mach/regs-irq.h>
29#include <mach/regs-pmu.h>
30#include <mach/regs-gpio.h>
31
32#include <plat/cpu.h>
33#include <plat/clock.h>
34#include <plat/devs.h>
35#include <plat/pm.h>
36#include <plat/sdhci.h>
37#include <plat/gpio-cfg.h>
38#include <plat/adc-core.h>
39#include <plat/fb-core.h>
40#include <plat/fimc-core.h>
41#include <plat/iic-core.h>
42#include <plat/tv-core.h>
43#include <plat/regs-serial.h>
44
45#include "common.h"
46
47static const char name_exynos4210[] = "EXYNOS4210";
48static const char name_exynos4212[] = "EXYNOS4212";
49static const char name_exynos4412[] = "EXYNOS4412";
50
51static struct cpu_table cpu_ids[] __initdata = {
52 {
53 .idcode = EXYNOS4210_CPU_ID,
54 .idmask = EXYNOS4_CPU_MASK,
55 .map_io = exynos4_map_io,
56 .init_clocks = exynos4_init_clocks,
57 .init_uarts = exynos4_init_uarts,
58 .init = exynos_init,
59 .name = name_exynos4210,
60 }, {
61 .idcode = EXYNOS4212_CPU_ID,
62 .idmask = EXYNOS4_CPU_MASK,
63 .map_io = exynos4_map_io,
64 .init_clocks = exynos4_init_clocks,
65 .init_uarts = exynos4_init_uarts,
66 .init = exynos_init,
67 .name = name_exynos4212,
68 }, {
69 .idcode = EXYNOS4412_CPU_ID,
70 .idmask = EXYNOS4_CPU_MASK,
71 .map_io = exynos4_map_io,
72 .init_clocks = exynos4_init_clocks,
73 .init_uarts = exynos4_init_uarts,
74 .init = exynos_init,
75 .name = name_exynos4412,
76 },
77};
78
79/* Initial IO mappings */
80
81static struct map_desc exynos_iodesc[] __initdata = {
82 {
83 .virtual = (unsigned long)S5P_VA_CHIPID,
84 .pfn = __phys_to_pfn(EXYNOS4_PA_CHIPID),
85 .length = SZ_4K,
86 .type = MT_DEVICE,
87 }, {
88 .virtual = (unsigned long)S3C_VA_SYS,
89 .pfn = __phys_to_pfn(EXYNOS4_PA_SYSCON),
90 .length = SZ_64K,
91 .type = MT_DEVICE,
92 }, {
93 .virtual = (unsigned long)S3C_VA_TIMER,
94 .pfn = __phys_to_pfn(EXYNOS4_PA_TIMER),
95 .length = SZ_16K,
96 .type = MT_DEVICE,
97 }, {
98 .virtual = (unsigned long)S3C_VA_WATCHDOG,
99 .pfn = __phys_to_pfn(EXYNOS4_PA_WATCHDOG),
100 .length = SZ_4K,
101 .type = MT_DEVICE,
102 }, {
103 .virtual = (unsigned long)S5P_VA_SROMC,
104 .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC),
105 .length = SZ_4K,
106 .type = MT_DEVICE,
107 }, {
108 .virtual = (unsigned long)S5P_VA_SYSTIMER,
109 .pfn = __phys_to_pfn(EXYNOS4_PA_SYSTIMER),
110 .length = SZ_4K,
111 .type = MT_DEVICE,
112 }, {
113 .virtual = (unsigned long)S5P_VA_PMU,
114 .pfn = __phys_to_pfn(EXYNOS4_PA_PMU),
115 .length = SZ_64K,
116 .type = MT_DEVICE,
117 }, {
118 .virtual = (unsigned long)S5P_VA_COMBINER_BASE,
119 .pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER),
120 .length = SZ_4K,
121 .type = MT_DEVICE,
122 }, {
123 .virtual = (unsigned long)S5P_VA_GIC_CPU,
124 .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_CPU),
125 .length = SZ_64K,
126 .type = MT_DEVICE,
127 }, {
128 .virtual = (unsigned long)S5P_VA_GIC_DIST,
129 .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST),
130 .length = SZ_64K,
131 .type = MT_DEVICE,
132 }, {
133 .virtual = (unsigned long)S3C_VA_UART,
134 .pfn = __phys_to_pfn(EXYNOS4_PA_UART),
135 .length = SZ_512K,
136 .type = MT_DEVICE,
137 },
138};
139
140static struct map_desc exynos4_iodesc[] __initdata = {
141 {
142 .virtual = (unsigned long)S5P_VA_CMU,
143 .pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
144 .length = SZ_128K,
145 .type = MT_DEVICE,
146 }, {
147 .virtual = (unsigned long)S5P_VA_COREPERI_BASE,
148 .pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI),
149 .length = SZ_8K,
150 .type = MT_DEVICE,
151 }, {
152 .virtual = (unsigned long)S5P_VA_L2CC,
153 .pfn = __phys_to_pfn(EXYNOS4_PA_L2CC),
154 .length = SZ_4K,
155 .type = MT_DEVICE,
156 }, {
157 .virtual = (unsigned long)S5P_VA_GPIO1,
158 .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO1),
159 .length = SZ_4K,
160 .type = MT_DEVICE,
161 }, {
162 .virtual = (unsigned long)S5P_VA_GPIO2,
163 .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO2),
164 .length = SZ_4K,
165 .type = MT_DEVICE,
166 }, {
167 .virtual = (unsigned long)S5P_VA_GPIO3,
168 .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO3),
169 .length = SZ_256,
170 .type = MT_DEVICE,
171 }, {
172 .virtual = (unsigned long)S5P_VA_DMC0,
173 .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0),
174 .length = SZ_4K,
175 .type = MT_DEVICE,
176 }, {
177 .virtual = (unsigned long)S5P_VA_SROMC,
178 .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC),
179 .length = SZ_4K,
180 .type = MT_DEVICE,
181 }, {
182 .virtual = (unsigned long)S3C_VA_USB_HSPHY,
183 .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY),
184 .length = SZ_4K,
185 .type = MT_DEVICE,
186 },
187};
188
189static struct map_desc exynos4_iodesc0[] __initdata = {
190 {
191 .virtual = (unsigned long)S5P_VA_SYSRAM,
192 .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM0),
193 .length = SZ_4K,
194 .type = MT_DEVICE,
195 },
196};
197
198static struct map_desc exynos4_iodesc1[] __initdata = {
199 {
200 .virtual = (unsigned long)S5P_VA_SYSRAM,
201 .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM1),
202 .length = SZ_4K,
203 .type = MT_DEVICE,
204 },
205};
206
207static void exynos_idle(void)
208{
209 if (!need_resched())
210 cpu_do_idle();
211
212 local_irq_enable();
213}
214
215void exynos4_restart(char mode, const char *cmd)
216{
217 __raw_writel(0x1, S5P_SWRESET);
218}
219
220/*
221 * exynos_map_io
222 *
223 * register the standard cpu IO areas
224 */
225
226void __init exynos_init_io(struct map_desc *mach_desc, int size)
227{
228 /* initialize the io descriptors we need for initialization */
229 iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc));
230 if (mach_desc)
231 iotable_init(mach_desc, size);
232
233 /* detect cpu id and rev. */
234 s5p_init_cpu(S5P_VA_CHIPID);
235
236 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
237}
238
239void __init exynos4_map_io(void)
240{
241 iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
242
243 if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
244 iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0));
245 else
246 iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));
247
248 /* initialize device information early */
249 exynos4_default_sdhci0();
250 exynos4_default_sdhci1();
251 exynos4_default_sdhci2();
252 exynos4_default_sdhci3();
253
254 s3c_adc_setname("samsung-adc-v3");
255
256 s3c_fimc_setname(0, "exynos4-fimc");
257 s3c_fimc_setname(1, "exynos4-fimc");
258 s3c_fimc_setname(2, "exynos4-fimc");
259 s3c_fimc_setname(3, "exynos4-fimc");
260
261 /* The I2C bus controllers are directly compatible with s3c2440 */
262 s3c_i2c0_setname("s3c2440-i2c");
263 s3c_i2c1_setname("s3c2440-i2c");
264 s3c_i2c2_setname("s3c2440-i2c");
265
266 s5p_fb_setname(0, "exynos4-fb");
267 s5p_hdmi_setname("exynos4-hdmi");
268}
269
270void __init exynos4_init_clocks(int xtal)
271{
272 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
273
274 s3c24xx_register_baseclocks(xtal);
275 s5p_register_clocks(xtal);
276
277 if (soc_is_exynos4210())
278 exynos4210_register_clocks();
279 else if (soc_is_exynos4212() || soc_is_exynos4412())
280 exynos4212_register_clocks();
281
282 exynos4_register_clocks();
283 exynos4_setup_clocks();
284}
285
286#define COMBINER_ENABLE_SET 0x0
287#define COMBINER_ENABLE_CLEAR 0x4
288#define COMBINER_INT_STATUS 0xC
289
290static DEFINE_SPINLOCK(irq_controller_lock);
291
292struct combiner_chip_data {
293 unsigned int irq_offset;
294 unsigned int irq_mask;
295 void __iomem *base;
296};
297
298static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];
299
300static inline void __iomem *combiner_base(struct irq_data *data)
301{
302 struct combiner_chip_data *combiner_data =
303 irq_data_get_irq_chip_data(data);
304
305 return combiner_data->base;
306}
307
308static void combiner_mask_irq(struct irq_data *data)
309{
310 u32 mask = 1 << (data->irq % 32);
311
312 __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
313}
314
315static void combiner_unmask_irq(struct irq_data *data)
316{
317 u32 mask = 1 << (data->irq % 32);
318
319 __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET);
320}
321
322static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
323{
324 struct combiner_chip_data *chip_data = irq_get_handler_data(irq);
325 struct irq_chip *chip = irq_get_chip(irq);
326 unsigned int cascade_irq, combiner_irq;
327 unsigned long status;
328
329 chained_irq_enter(chip, desc);
330
331 spin_lock(&irq_controller_lock);
332 status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
333 spin_unlock(&irq_controller_lock);
334 status &= chip_data->irq_mask;
335
336 if (status == 0)
337 goto out;
338
339 combiner_irq = __ffs(status);
340
341 cascade_irq = combiner_irq + (chip_data->irq_offset & ~31);
342 if (unlikely(cascade_irq >= NR_IRQS))
343 do_bad_IRQ(cascade_irq, desc);
344 else
345 generic_handle_irq(cascade_irq);
346
347 out:
348 chained_irq_exit(chip, desc);
349}
350
351static struct irq_chip combiner_chip = {
352 .name = "COMBINER",
353 .irq_mask = combiner_mask_irq,
354 .irq_unmask = combiner_unmask_irq,
355};
356
357static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
358{
359 if (combiner_nr >= MAX_COMBINER_NR)
360 BUG();
361 if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0)
362 BUG();
363 irq_set_chained_handler(irq, combiner_handle_cascade_irq);
364}
365
366static void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
367 unsigned int irq_start)
368{
369 unsigned int i;
370
371 if (combiner_nr >= MAX_COMBINER_NR)
372 BUG();
373
374 combiner_data[combiner_nr].base = base;
375 combiner_data[combiner_nr].irq_offset = irq_start;
376 combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3);
377
378 /* Disable all interrupts */
379
380 __raw_writel(combiner_data[combiner_nr].irq_mask,
381 base + COMBINER_ENABLE_CLEAR);
382
383 /* Setup the Linux IRQ subsystem */
384
385 for (i = irq_start; i < combiner_data[combiner_nr].irq_offset
386 + MAX_IRQ_IN_COMBINER; i++) {
387 irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq);
388 irq_set_chip_data(i, &combiner_data[combiner_nr]);
389 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
390 }
391}
392
393void __init exynos4_init_irq(void)
394{
395 int irq;
396 unsigned int gic_bank_offset;
397
398 gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
399
400 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset);
401
402 for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
403
404 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
405 COMBINER_IRQ(irq, 0));
406 combiner_cascade_irq(irq, IRQ_SPI(irq));
407 }
408
409 /*
410 * The parameters of s5p_init_irq() are for VIC init.
411 * Theses parameters should be NULL and 0 because EXYNOS4
412 * uses GIC instead of VIC.
413 */
414 s5p_init_irq(NULL, 0);
415}
416
417struct sysdev_class exynos4_sysclass = {
418 .name = "exynos4-core",
419};
420
421static struct sys_device exynos4_sysdev = {
422 .cls = &exynos4_sysclass,
423};
424
425static int __init exynos4_core_init(void)
426{
427 return sysdev_class_register(&exynos4_sysclass);
428}
429core_initcall(exynos4_core_init);
430
431#ifdef CONFIG_CACHE_L2X0
432static int __init exynos4_l2x0_cache_init(void)
433{
434 /* TAG, Data Latency Control: 2cycle */
435 __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
436
437 if (soc_is_exynos4210())
438 __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
439 else if (soc_is_exynos4212() || soc_is_exynos4412())
440 __raw_writel(0x120, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
441
442 /* L2X0 Prefetch Control */
443 __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL);
444
445 /* L2X0 Power Control */
446 __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN,
447 S5P_VA_L2CC + L2X0_POWER_CTRL);
448
449 l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff);
450
451 return 0;
452}
453
454early_initcall(exynos4_l2x0_cache_init);
455#endif
456
457int __init exynos_init(void)
458{
459 printk(KERN_INFO "EXYNOS: Initializing architecture\n");
460
461 /* set idle function */
462 pm_idle = exynos_idle;
463
464 return sysdev_register(&exynos4_sysdev);
465}
466
467static struct s3c24xx_uart_clksrc exynos4_serial_clocks[] = {
468 [0] = {
469 .name = "uclk1",
470 .divisor = 1,
471 .min_baud = 0,
472 .max_baud = 0,
473 },
474};
475
476/* uart registration process */
477
478void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
479{
480 struct s3c2410_uartcfg *tcfg = cfg;
481 u32 ucnt;
482
483 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
484 if (!tcfg->clocks) {
485 tcfg->has_fracval = 1;
486 tcfg->clocks = exynos4_serial_clocks;
487 tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks);
488 }
489 tcfg->flags |= NO_NEED_CHECK_CLKSRC;
490 }
491
492 s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
493}
494
495static DEFINE_SPINLOCK(eint_lock);
496
497static unsigned int eint0_15_data[16];
498
499static unsigned int exynos4_get_irq_nr(unsigned int number)
500{
501 u32 ret = 0;
502
503 switch (number) {
504 case 0 ... 3:
505 ret = (number + IRQ_EINT0);
506 break;
507 case 4 ... 7:
508 ret = (number + (IRQ_EINT4 - 4));
509 break;
510 case 8 ... 15:
511 ret = (number + (IRQ_EINT8 - 8));
512 break;
513 default:
514 printk(KERN_ERR "number available : %d\n", number);
515 }
516
517 return ret;
518}
519
520static inline void exynos4_irq_eint_mask(struct irq_data *data)
521{
522 u32 mask;
523
524 spin_lock(&eint_lock);
525 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
526 mask |= eint_irq_to_bit(data->irq);
527 __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
528 spin_unlock(&eint_lock);
529}
530
531static void exynos4_irq_eint_unmask(struct irq_data *data)
532{
533 u32 mask;
534
535 spin_lock(&eint_lock);
536 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
537 mask &= ~(eint_irq_to_bit(data->irq));
538 __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
539 spin_unlock(&eint_lock);
540}
541
542static inline void exynos4_irq_eint_ack(struct irq_data *data)
543{
544 __raw_writel(eint_irq_to_bit(data->irq),
545 S5P_EINT_PEND(EINT_REG_NR(data->irq)));
546}
547
548static void exynos4_irq_eint_maskack(struct irq_data *data)
549{
550 exynos4_irq_eint_mask(data);
551 exynos4_irq_eint_ack(data);
552}
553
554static int exynos4_irq_eint_set_type(struct irq_data *data, unsigned int type)
555{
556 int offs = EINT_OFFSET(data->irq);
557 int shift;
558 u32 ctrl, mask;
559 u32 newvalue = 0;
560
561 switch (type) {
562 case IRQ_TYPE_EDGE_RISING:
563 newvalue = S5P_IRQ_TYPE_EDGE_RISING;
564 break;
565
566 case IRQ_TYPE_EDGE_FALLING:
567 newvalue = S5P_IRQ_TYPE_EDGE_FALLING;
568 break;
569
570 case IRQ_TYPE_EDGE_BOTH:
571 newvalue = S5P_IRQ_TYPE_EDGE_BOTH;
572 break;
573
574 case IRQ_TYPE_LEVEL_LOW:
575 newvalue = S5P_IRQ_TYPE_LEVEL_LOW;
576 break;
577
578 case IRQ_TYPE_LEVEL_HIGH:
579 newvalue = S5P_IRQ_TYPE_LEVEL_HIGH;
580 break;
581
582 default:
583 printk(KERN_ERR "No such irq type %d", type);
584 return -EINVAL;
585 }
586
587 shift = (offs & 0x7) * 4;
588 mask = 0x7 << shift;
589
590 spin_lock(&eint_lock);
591 ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq)));
592 ctrl &= ~mask;
593 ctrl |= newvalue << shift;
594 __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq)));
595 spin_unlock(&eint_lock);
596
597 switch (offs) {
598 case 0 ... 7:
599 s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE);
600 break;
601 case 8 ... 15:
602 s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE);
603 break;
604 case 16 ... 23:
605 s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE);
606 break;
607 case 24 ... 31:
608 s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE);
609 break;
610 default:
611 printk(KERN_ERR "No such irq number %d", offs);
612 }
613
614 return 0;
615}
616
617static struct irq_chip exynos4_irq_eint = {
618 .name = "exynos4-eint",
619 .irq_mask = exynos4_irq_eint_mask,
620 .irq_unmask = exynos4_irq_eint_unmask,
621 .irq_mask_ack = exynos4_irq_eint_maskack,
622 .irq_ack = exynos4_irq_eint_ack,
623 .irq_set_type = exynos4_irq_eint_set_type,
624#ifdef CONFIG_PM
625 .irq_set_wake = s3c_irqext_wake,
626#endif
627};
628
629/*
630 * exynos4_irq_demux_eint
631 *
632 * This function demuxes the IRQ from from EINTs 16 to 31.
633 * It is designed to be inlined into the specific handler
634 * s5p_irq_demux_eintX_Y.
635 *
636 * Each EINT pend/mask registers handle eight of them.
637 */
638static inline void exynos4_irq_demux_eint(unsigned int start)
639{
640 unsigned int irq;
641
642 u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start)));
643 u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start)));
644
645 status &= ~mask;
646 status &= 0xff;
647
648 while (status) {
649 irq = fls(status) - 1;
650 generic_handle_irq(irq + start);
651 status &= ~(1 << irq);
652 }
653}
654
655static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
656{
657 struct irq_chip *chip = irq_get_chip(irq);
658 chained_irq_enter(chip, desc);
659 exynos4_irq_demux_eint(IRQ_EINT(16));
660 exynos4_irq_demux_eint(IRQ_EINT(24));
661 chained_irq_exit(chip, desc);
662}
663
664static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
665{
666 u32 *irq_data = irq_get_handler_data(irq);
667 struct irq_chip *chip = irq_get_chip(irq);
668
669 chained_irq_enter(chip, desc);
670 chip->irq_mask(&desc->irq_data);
671
672 if (chip->irq_ack)
673 chip->irq_ack(&desc->irq_data);
674
675 generic_handle_irq(*irq_data);
676
677 chip->irq_unmask(&desc->irq_data);
678 chained_irq_exit(chip, desc);
679}
680
681int __init exynos4_init_irq_eint(void)
682{
683 int irq;
684
685 for (irq = 0 ; irq <= 31 ; irq++) {
686 irq_set_chip_and_handler(IRQ_EINT(irq), &exynos4_irq_eint,
687 handle_level_irq);
688 set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
689 }
690
691 irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31);
692
693 for (irq = 0 ; irq <= 15 ; irq++) {
694 eint0_15_data[irq] = IRQ_EINT(irq);
695
696 irq_set_handler_data(exynos4_get_irq_nr(irq),
697 &eint0_15_data[irq]);
698 irq_set_chained_handler(exynos4_get_irq_nr(irq),
699 exynos4_irq_eint0_15);
700 }
701
702 return 0;
703}
704arch_initcall(exynos4_init_irq_eint);
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
new file mode 100644
index 000000000000..1ac49de0f398
--- /dev/null
+++ b/arch/arm/mach-exynos/common.h
@@ -0,0 +1,41 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common Header for EXYNOS machines
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H
13#define __ARCH_ARM_MACH_EXYNOS_COMMON_H
14
15void exynos_init_io(struct map_desc *mach_desc, int size);
16void exynos4_init_irq(void);
17
18void exynos4_register_clocks(void);
19void exynos4_setup_clocks(void);
20
21void exynos4210_register_clocks(void);
22void exynos4212_register_clocks(void);
23
24void exynos4_restart(char mode, const char *cmd);
25
26extern struct sys_timer exynos4_timer;
27
28#ifdef CONFIG_ARCH_EXYNOS
29extern int exynos_init(void);
30extern void exynos4_map_io(void);
31extern void exynos4_init_clocks(int xtal);
32extern void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no);
33
34#else
35#define exynos4_init_clocks NULL
36#define exynos4_init_uarts NULL
37#define exynos4_map_io NULL
38#define exynos_init NULL
39#endif
40
41#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
diff --git a/arch/arm/mach-exynos/cpu.c b/arch/arm/mach-exynos/cpu.c
deleted file mode 100644
index 22316cb31a8c..000000000000
--- a/arch/arm/mach-exynos/cpu.c
+++ /dev/null
@@ -1,284 +0,0 @@
1/* linux/arch/arm/mach-exynos/cpu.c
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/sched.h>
12#include <linux/sysdev.h>
13
14#include <asm/mach/map.h>
15#include <asm/mach/irq.h>
16
17#include <asm/proc-fns.h>
18#include <asm/exception.h>
19#include <asm/hardware/cache-l2x0.h>
20#include <asm/hardware/gic.h>
21
22#include <plat/cpu.h>
23#include <plat/clock.h>
24#include <plat/devs.h>
25#include <plat/exynos4.h>
26#include <plat/adc-core.h>
27#include <plat/sdhci.h>
28#include <plat/fb-core.h>
29#include <plat/fimc-core.h>
30#include <plat/iic-core.h>
31#include <plat/reset.h>
32#include <plat/tv-core.h>
33
34#include <mach/regs-irq.h>
35#include <mach/regs-pmu.h>
36
37extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
38 unsigned int irq_start);
39extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
40
41/* Initial IO mappings */
42static struct map_desc exynos_iodesc[] __initdata = {
43 {
44 .virtual = (unsigned long)S5P_VA_SYSTIMER,
45 .pfn = __phys_to_pfn(EXYNOS_PA_SYSTIMER),
46 .length = SZ_4K,
47 .type = MT_DEVICE,
48 }, {
49 .virtual = (unsigned long)S5P_VA_PMU,
50 .pfn = __phys_to_pfn(EXYNOS_PA_PMU),
51 .length = SZ_64K,
52 .type = MT_DEVICE,
53 }, {
54 .virtual = (unsigned long)S5P_VA_COMBINER_BASE,
55 .pfn = __phys_to_pfn(EXYNOS_PA_COMBINER),
56 .length = SZ_4K,
57 .type = MT_DEVICE,
58 }, {
59 .virtual = (unsigned long)S5P_VA_GIC_CPU,
60 .pfn = __phys_to_pfn(EXYNOS_PA_GIC_CPU),
61 .length = SZ_64K,
62 .type = MT_DEVICE,
63 }, {
64 .virtual = (unsigned long)S5P_VA_GIC_DIST,
65 .pfn = __phys_to_pfn(EXYNOS_PA_GIC_DIST),
66 .length = SZ_64K,
67 .type = MT_DEVICE,
68 }, {
69 .virtual = (unsigned long)S3C_VA_UART,
70 .pfn = __phys_to_pfn(S3C_PA_UART),
71 .length = SZ_512K,
72 .type = MT_DEVICE,
73 },
74};
75
76static struct map_desc exynos4_iodesc[] __initdata = {
77 {
78 .virtual = (unsigned long)S5P_VA_CMU,
79 .pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
80 .length = SZ_128K,
81 .type = MT_DEVICE,
82 }, {
83 .virtual = (unsigned long)S5P_VA_COREPERI_BASE,
84 .pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI),
85 .length = SZ_8K,
86 .type = MT_DEVICE,
87 }, {
88 .virtual = (unsigned long)S5P_VA_L2CC,
89 .pfn = __phys_to_pfn(EXYNOS4_PA_L2CC),
90 .length = SZ_4K,
91 .type = MT_DEVICE,
92 }, {
93 .virtual = (unsigned long)S5P_VA_GPIO1,
94 .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO1),
95 .length = SZ_4K,
96 .type = MT_DEVICE,
97 }, {
98 .virtual = (unsigned long)S5P_VA_GPIO2,
99 .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO2),
100 .length = SZ_4K,
101 .type = MT_DEVICE,
102 }, {
103 .virtual = (unsigned long)S5P_VA_GPIO3,
104 .pfn = __phys_to_pfn(EXYNOS4_PA_GPIO3),
105 .length = SZ_256,
106 .type = MT_DEVICE,
107 }, {
108 .virtual = (unsigned long)S5P_VA_DMC0,
109 .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0),
110 .length = SZ_4K,
111 .type = MT_DEVICE,
112 }, {
113 .virtual = (unsigned long)S5P_VA_SROMC,
114 .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC),
115 .length = SZ_4K,
116 .type = MT_DEVICE,
117 }, {
118 .virtual = (unsigned long)S3C_VA_USB_HSPHY,
119 .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY),
120 .length = SZ_4K,
121 .type = MT_DEVICE,
122 },
123};
124
125static struct map_desc exynos4_iodesc0[] __initdata = {
126 {
127 .virtual = (unsigned long)S5P_VA_SYSRAM,
128 .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM0),
129 .length = SZ_4K,
130 .type = MT_DEVICE,
131 },
132};
133
134static struct map_desc exynos4_iodesc1[] __initdata = {
135 {
136 .virtual = (unsigned long)S5P_VA_SYSRAM,
137 .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM1),
138 .length = SZ_4K,
139 .type = MT_DEVICE,
140 },
141};
142
143static void exynos_idle(void)
144{
145 if (!need_resched())
146 cpu_do_idle();
147
148 local_irq_enable();
149}
150
151static void exynos4_sw_reset(void)
152{
153 __raw_writel(0x1, S5P_SWRESET);
154}
155
156/*
157 * exynos_map_io
158 *
159 * register the standard cpu IO areas
160 */
161void __init exynos4_map_io(void)
162{
163 iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc));
164 iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
165
166 if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
167 iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0));
168 else
169 iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));
170
171 /* initialize device information early */
172 exynos4_default_sdhci0();
173 exynos4_default_sdhci1();
174 exynos4_default_sdhci2();
175 exynos4_default_sdhci3();
176
177 s3c_adc_setname("samsung-adc-v3");
178
179 s3c_fimc_setname(0, "exynos4-fimc");
180 s3c_fimc_setname(1, "exynos4-fimc");
181 s3c_fimc_setname(2, "exynos4-fimc");
182 s3c_fimc_setname(3, "exynos4-fimc");
183
184 /* The I2C bus controllers are directly compatible with s3c2440 */
185 s3c_i2c0_setname("s3c2440-i2c");
186 s3c_i2c1_setname("s3c2440-i2c");
187 s3c_i2c2_setname("s3c2440-i2c");
188
189 s5p_fb_setname(0, "exynos4-fb");
190 s5p_hdmi_setname("exynos4-hdmi");
191}
192
193void __init exynos4_init_clocks(int xtal)
194{
195 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
196
197 s3c24xx_register_baseclocks(xtal);
198 s5p_register_clocks(xtal);
199
200 if (soc_is_exynos4210())
201 exynos4210_register_clocks();
202 else if (soc_is_exynos4212() || soc_is_exynos4412())
203 exynos4212_register_clocks();
204
205 exynos4_register_clocks();
206 exynos4_setup_clocks();
207}
208
209void __init exynos4_init_irq(void)
210{
211 int irq;
212 unsigned int gic_bank_offset;
213
214 gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
215
216 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset);
217
218 for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
219
220 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
221 COMBINER_IRQ(irq, 0));
222 combiner_cascade_irq(irq, IRQ_SPI(irq));
223 }
224
225 /* The parameters of s5p_init_irq() are for VIC init.
226 * Theses parameters should be NULL and 0 because EXYNOS4
227 * uses GIC instead of VIC.
228 */
229 s5p_init_irq(NULL, 0);
230}
231
232struct sysdev_class exynos4_sysclass = {
233 .name = "exynos4-core",
234};
235
236static struct sys_device exynos4_sysdev = {
237 .cls = &exynos4_sysclass,
238};
239
240static int __init exynos4_core_init(void)
241{
242 return sysdev_class_register(&exynos4_sysclass);
243}
244core_initcall(exynos4_core_init);
245
246#ifdef CONFIG_CACHE_L2X0
247static int __init exynos4_l2x0_cache_init(void)
248{
249 /* TAG, Data Latency Control: 2cycle */
250 __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
251
252 if (soc_is_exynos4210())
253 __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
254 else if (soc_is_exynos4212() || soc_is_exynos4412())
255 __raw_writel(0x120, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
256
257 /* L2X0 Prefetch Control */
258 __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL);
259
260 /* L2X0 Power Control */
261 __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN,
262 S5P_VA_L2CC + L2X0_POWER_CTRL);
263
264 l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff);
265
266 return 0;
267}
268
269early_initcall(exynos4_l2x0_cache_init);
270#endif
271
272int __init exynos_init(void)
273{
274 printk(KERN_INFO "EXYNOS: Initializing architecture\n");
275
276 /* set idle function */
277 pm_idle = exynos_idle;
278
279 /* set sw_reset function */
280 if (soc_is_exynos4210() || soc_is_exynos4212() || soc_is_exynos4412())
281 s5p_reset_hook = exynos4_sw_reset;
282
283 return sysdev_register(&exynos4_sysdev);
284}
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 058541d45af0..d1829860a0ec 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -149,7 +149,6 @@
149#define S3C_PA_WDT EXYNOS4_PA_WATCHDOG 149#define S3C_PA_WDT EXYNOS4_PA_WATCHDOG
150#define S3C_PA_UART EXYNOS4_PA_UART 150#define S3C_PA_UART EXYNOS4_PA_UART
151 151
152#define S5P_PA_CHIPID EXYNOS4_PA_CHIPID
153#define S5P_PA_EHCI EXYNOS4_PA_EHCI 152#define S5P_PA_EHCI EXYNOS4_PA_EHCI
154#define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0 153#define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0
155#define S5P_PA_FIMC1 EXYNOS4_PA_FIMC1 154#define S5P_PA_FIMC1 EXYNOS4_PA_FIMC1
@@ -166,26 +165,17 @@
166#define S5P_PA_ONENAND_DMA EXYNOS4_PA_ONENAND_DMA 165#define S5P_PA_ONENAND_DMA EXYNOS4_PA_ONENAND_DMA
167#define S5P_PA_SDO EXYNOS4_PA_SDO 166#define S5P_PA_SDO EXYNOS4_PA_SDO
168#define S5P_PA_SDRAM EXYNOS4_PA_SDRAM 167#define S5P_PA_SDRAM EXYNOS4_PA_SDRAM
169#define S5P_PA_SROMC EXYNOS4_PA_SROMC
170#define S5P_PA_SYSCON EXYNOS4_PA_SYSCON
171#define S5P_PA_TIMER EXYNOS4_PA_TIMER
172#define S5P_PA_VP EXYNOS4_PA_VP 168#define S5P_PA_VP EXYNOS4_PA_VP
173 169
174#define SAMSUNG_PA_ADC EXYNOS4_PA_ADC 170#define SAMSUNG_PA_ADC EXYNOS4_PA_ADC
175#define SAMSUNG_PA_ADC1 EXYNOS4_PA_ADC1 171#define SAMSUNG_PA_ADC1 EXYNOS4_PA_ADC1
176#define SAMSUNG_PA_KEYPAD EXYNOS4_PA_KEYPAD 172#define SAMSUNG_PA_KEYPAD EXYNOS4_PA_KEYPAD
177 173
178#define EXYNOS_PA_COMBINER EXYNOS4_PA_COMBINER
179#define EXYNOS_PA_GIC_CPU EXYNOS4_PA_GIC_CPU
180#define EXYNOS_PA_GIC_DIST EXYNOS4_PA_GIC_DIST
181#define EXYNOS_PA_PMU EXYNOS4_PA_PMU
182#define EXYNOS_PA_SYSTIMER EXYNOS4_PA_SYSTIMER
183
184/* Compatibility UART */ 174/* Compatibility UART */
185 175
186#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) 176#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
187 177
188#define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) 178#define S5P_PA_UART(x) (EXYNOS4_PA_UART + ((x) * S3C_UART_OFFSET))
189#define S5P_PA_UART0 S5P_PA_UART(0) 179#define S5P_PA_UART0 S5P_PA_UART(0)
190#define S5P_PA_UART1 S5P_PA_UART(1) 180#define S5P_PA_UART1 S5P_PA_UART(1)
191#define S5P_PA_UART2 S5P_PA_UART(2) 181#define S5P_PA_UART2 S5P_PA_UART(2)
diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h
index 5e3220c18fc7..0063a6de3dc8 100644
--- a/arch/arm/mach-exynos/include/mach/system.h
+++ b/arch/arm/mach-exynos/include/mach/system.h
@@ -13,8 +13,6 @@
13#ifndef __ASM_ARCH_SYSTEM_H 13#ifndef __ASM_ARCH_SYSTEM_H
14#define __ASM_ARCH_SYSTEM_H __FILE__ 14#define __ASM_ARCH_SYSTEM_H __FILE__
15 15
16#include <plat/system-reset.h>
17
18static void arch_idle(void) 16static void arch_idle(void)
19{ 17{
20 /* nothing here yet */ 18 /* nothing here yet */
diff --git a/arch/arm/mach-exynos/init.c b/arch/arm/mach-exynos/init.c
deleted file mode 100644
index a8a83e3881a4..000000000000
--- a/arch/arm/mach-exynos/init.c
+++ /dev/null
@@ -1,42 +0,0 @@
1/* linux/arch/arm/mach-exynos4/init.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/serial_core.h>
12
13#include <plat/cpu.h>
14#include <plat/devs.h>
15#include <plat/regs-serial.h>
16
17static struct s3c24xx_uart_clksrc exynos4_serial_clocks[] = {
18 [0] = {
19 .name = "uclk1",
20 .divisor = 1,
21 .min_baud = 0,
22 .max_baud = 0,
23 },
24};
25
26/* uart registration process */
27void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
28{
29 struct s3c2410_uartcfg *tcfg = cfg;
30 u32 ucnt;
31
32 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
33 if (!tcfg->clocks) {
34 tcfg->has_fracval = 1;
35 tcfg->clocks = exynos4_serial_clocks;
36 tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks);
37 }
38 tcfg->flags |= NO_NEED_CHECK_CLKSRC;
39 }
40
41 s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
42}
diff --git a/arch/arm/mach-exynos/irq-combiner.c b/arch/arm/mach-exynos/irq-combiner.c
deleted file mode 100644
index 5a2758ab055e..000000000000
--- a/arch/arm/mach-exynos/irq-combiner.c
+++ /dev/null
@@ -1,124 +0,0 @@
1/* linux/arch/arm/mach-exynos4/irq-combiner.c
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Based on arch/arm/common/gic.c
7 *
8 * IRQ COMBINER support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/io.h>
16
17#include <asm/mach/irq.h>
18
19#define COMBINER_ENABLE_SET 0x0
20#define COMBINER_ENABLE_CLEAR 0x4
21#define COMBINER_INT_STATUS 0xC
22
23static DEFINE_SPINLOCK(irq_controller_lock);
24
25struct combiner_chip_data {
26 unsigned int irq_offset;
27 unsigned int irq_mask;
28 void __iomem *base;
29};
30
31static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];
32
33static inline void __iomem *combiner_base(struct irq_data *data)
34{
35 struct combiner_chip_data *combiner_data =
36 irq_data_get_irq_chip_data(data);
37
38 return combiner_data->base;
39}
40
41static void combiner_mask_irq(struct irq_data *data)
42{
43 u32 mask = 1 << (data->irq % 32);
44
45 __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
46}
47
48static void combiner_unmask_irq(struct irq_data *data)
49{
50 u32 mask = 1 << (data->irq % 32);
51
52 __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET);
53}
54
55static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
56{
57 struct combiner_chip_data *chip_data = irq_get_handler_data(irq);
58 struct irq_chip *chip = irq_get_chip(irq);
59 unsigned int cascade_irq, combiner_irq;
60 unsigned long status;
61
62 chained_irq_enter(chip, desc);
63
64 spin_lock(&irq_controller_lock);
65 status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
66 spin_unlock(&irq_controller_lock);
67 status &= chip_data->irq_mask;
68
69 if (status == 0)
70 goto out;
71
72 combiner_irq = __ffs(status);
73
74 cascade_irq = combiner_irq + (chip_data->irq_offset & ~31);
75 if (unlikely(cascade_irq >= NR_IRQS))
76 do_bad_IRQ(cascade_irq, desc);
77 else
78 generic_handle_irq(cascade_irq);
79
80 out:
81 chained_irq_exit(chip, desc);
82}
83
84static struct irq_chip combiner_chip = {
85 .name = "COMBINER",
86 .irq_mask = combiner_mask_irq,
87 .irq_unmask = combiner_unmask_irq,
88};
89
90void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
91{
92 if (combiner_nr >= MAX_COMBINER_NR)
93 BUG();
94 if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0)
95 BUG();
96 irq_set_chained_handler(irq, combiner_handle_cascade_irq);
97}
98
99void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
100 unsigned int irq_start)
101{
102 unsigned int i;
103
104 if (combiner_nr >= MAX_COMBINER_NR)
105 BUG();
106
107 combiner_data[combiner_nr].base = base;
108 combiner_data[combiner_nr].irq_offset = irq_start;
109 combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3);
110
111 /* Disable all interrupts */
112
113 __raw_writel(combiner_data[combiner_nr].irq_mask,
114 base + COMBINER_ENABLE_CLEAR);
115
116 /* Setup the Linux IRQ subsystem */
117
118 for (i = irq_start; i < combiner_data[combiner_nr].irq_offset
119 + MAX_IRQ_IN_COMBINER; i++) {
120 irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq);
121 irq_set_chip_data(i, &combiner_data[combiner_nr]);
122 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
123 }
124}
diff --git a/arch/arm/mach-exynos/irq-eint.c b/arch/arm/mach-exynos/irq-eint.c
deleted file mode 100644
index badb8c66fc9b..000000000000
--- a/arch/arm/mach-exynos/irq-eint.c
+++ /dev/null
@@ -1,237 +0,0 @@
1/* linux/arch/arm/mach-exynos4/irq-eint.c
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * EXYNOS4 - IRQ EINT support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/interrupt.h>
15#include <linux/irq.h>
16#include <linux/io.h>
17#include <linux/sysdev.h>
18#include <linux/gpio.h>
19
20#include <plat/pm.h>
21#include <plat/cpu.h>
22#include <plat/gpio-cfg.h>
23
24#include <mach/regs-gpio.h>
25
26#include <asm/mach/irq.h>
27
28static DEFINE_SPINLOCK(eint_lock);
29
30static unsigned int eint0_15_data[16];
31
32static unsigned int exynos4_get_irq_nr(unsigned int number)
33{
34 u32 ret = 0;
35
36 switch (number) {
37 case 0 ... 3:
38 ret = (number + IRQ_EINT0);
39 break;
40 case 4 ... 7:
41 ret = (number + (IRQ_EINT4 - 4));
42 break;
43 case 8 ... 15:
44 ret = (number + (IRQ_EINT8 - 8));
45 break;
46 default:
47 printk(KERN_ERR "number available : %d\n", number);
48 }
49
50 return ret;
51}
52
53static inline void exynos4_irq_eint_mask(struct irq_data *data)
54{
55 u32 mask;
56
57 spin_lock(&eint_lock);
58 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
59 mask |= eint_irq_to_bit(data->irq);
60 __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
61 spin_unlock(&eint_lock);
62}
63
64static void exynos4_irq_eint_unmask(struct irq_data *data)
65{
66 u32 mask;
67
68 spin_lock(&eint_lock);
69 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
70 mask &= ~(eint_irq_to_bit(data->irq));
71 __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
72 spin_unlock(&eint_lock);
73}
74
75static inline void exynos4_irq_eint_ack(struct irq_data *data)
76{
77 __raw_writel(eint_irq_to_bit(data->irq),
78 S5P_EINT_PEND(EINT_REG_NR(data->irq)));
79}
80
81static void exynos4_irq_eint_maskack(struct irq_data *data)
82{
83 exynos4_irq_eint_mask(data);
84 exynos4_irq_eint_ack(data);
85}
86
87static int exynos4_irq_eint_set_type(struct irq_data *data, unsigned int type)
88{
89 int offs = EINT_OFFSET(data->irq);
90 int shift;
91 u32 ctrl, mask;
92 u32 newvalue = 0;
93
94 switch (type) {
95 case IRQ_TYPE_EDGE_RISING:
96 newvalue = S5P_IRQ_TYPE_EDGE_RISING;
97 break;
98
99 case IRQ_TYPE_EDGE_FALLING:
100 newvalue = S5P_IRQ_TYPE_EDGE_FALLING;
101 break;
102
103 case IRQ_TYPE_EDGE_BOTH:
104 newvalue = S5P_IRQ_TYPE_EDGE_BOTH;
105 break;
106
107 case IRQ_TYPE_LEVEL_LOW:
108 newvalue = S5P_IRQ_TYPE_LEVEL_LOW;
109 break;
110
111 case IRQ_TYPE_LEVEL_HIGH:
112 newvalue = S5P_IRQ_TYPE_LEVEL_HIGH;
113 break;
114
115 default:
116 printk(KERN_ERR "No such irq type %d", type);
117 return -EINVAL;
118 }
119
120 shift = (offs & 0x7) * 4;
121 mask = 0x7 << shift;
122
123 spin_lock(&eint_lock);
124 ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq)));
125 ctrl &= ~mask;
126 ctrl |= newvalue << shift;
127 __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq)));
128 spin_unlock(&eint_lock);
129
130 switch (offs) {
131 case 0 ... 7:
132 s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE);
133 break;
134 case 8 ... 15:
135 s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE);
136 break;
137 case 16 ... 23:
138 s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE);
139 break;
140 case 24 ... 31:
141 s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE);
142 break;
143 default:
144 printk(KERN_ERR "No such irq number %d", offs);
145 }
146
147 return 0;
148}
149
150static struct irq_chip exynos4_irq_eint = {
151 .name = "exynos4-eint",
152 .irq_mask = exynos4_irq_eint_mask,
153 .irq_unmask = exynos4_irq_eint_unmask,
154 .irq_mask_ack = exynos4_irq_eint_maskack,
155 .irq_ack = exynos4_irq_eint_ack,
156 .irq_set_type = exynos4_irq_eint_set_type,
157#ifdef CONFIG_PM
158 .irq_set_wake = s3c_irqext_wake,
159#endif
160};
161
162/* exynos4_irq_demux_eint
163 *
164 * This function demuxes the IRQ from from EINTs 16 to 31.
165 * It is designed to be inlined into the specific handler
166 * s5p_irq_demux_eintX_Y.
167 *
168 * Each EINT pend/mask registers handle eight of them.
169 */
170static inline void exynos4_irq_demux_eint(unsigned int start)
171{
172 unsigned int irq;
173
174 u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start)));
175 u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start)));
176
177 status &= ~mask;
178 status &= 0xff;
179
180 while (status) {
181 irq = fls(status) - 1;
182 generic_handle_irq(irq + start);
183 status &= ~(1 << irq);
184 }
185}
186
187static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
188{
189 struct irq_chip *chip = irq_get_chip(irq);
190 chained_irq_enter(chip, desc);
191 exynos4_irq_demux_eint(IRQ_EINT(16));
192 exynos4_irq_demux_eint(IRQ_EINT(24));
193 chained_irq_exit(chip, desc);
194}
195
196static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
197{
198 u32 *irq_data = irq_get_handler_data(irq);
199 struct irq_chip *chip = irq_get_chip(irq);
200
201 chained_irq_enter(chip, desc);
202 chip->irq_mask(&desc->irq_data);
203
204 if (chip->irq_ack)
205 chip->irq_ack(&desc->irq_data);
206
207 generic_handle_irq(*irq_data);
208
209 chip->irq_unmask(&desc->irq_data);
210 chained_irq_exit(chip, desc);
211}
212
213int __init exynos4_init_irq_eint(void)
214{
215 int irq;
216
217 for (irq = 0 ; irq <= 31 ; irq++) {
218 irq_set_chip_and_handler(IRQ_EINT(irq), &exynos4_irq_eint,
219 handle_level_irq);
220 set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
221 }
222
223 irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31);
224
225 for (irq = 0 ; irq <= 15 ; irq++) {
226 eint0_15_data[irq] = IRQ_EINT(irq);
227
228 irq_set_handler_data(exynos4_get_irq_nr(irq),
229 &eint0_15_data[irq]);
230 irq_set_chained_handler(exynos4_get_irq_nr(irq),
231 exynos4_irq_eint0_15);
232 }
233
234 return 0;
235}
236
237arch_initcall(exynos4_init_irq_eint);
diff --git a/arch/arm/mach-exynos/mach-armlex4210.c b/arch/arm/mach-exynos/mach-armlex4210.c
index 49da3089249a..d726fcd3acf9 100644
--- a/arch/arm/mach-exynos/mach-armlex4210.c
+++ b/arch/arm/mach-exynos/mach-armlex4210.c
@@ -21,7 +21,6 @@
21 21
22#include <plat/cpu.h> 22#include <plat/cpu.h>
23#include <plat/devs.h> 23#include <plat/devs.h>
24#include <plat/exynos4.h>
25#include <plat/gpio-cfg.h> 24#include <plat/gpio-cfg.h>
26#include <plat/regs-serial.h> 25#include <plat/regs-serial.h>
27#include <plat/regs-srom.h> 26#include <plat/regs-srom.h>
@@ -29,6 +28,8 @@
29 28
30#include <mach/map.h> 29#include <mach/map.h>
31 30
31#include "common.h"
32
32/* Following are default values for UCON, ULCON and UFCON UART registers */ 33/* Following are default values for UCON, ULCON and UFCON UART registers */
33#define ARMLEX4210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 34#define ARMLEX4210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
34 S3C2410_UCON_RXILEVEL | \ 35 S3C2410_UCON_RXILEVEL | \
@@ -188,7 +189,7 @@ static void __init armlex4210_smsc911x_init(void)
188 189
189static void __init armlex4210_map_io(void) 190static void __init armlex4210_map_io(void)
190{ 191{
191 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 192 exynos_init_io(NULL, 0);
192 s3c24xx_init_clocks(24000000); 193 s3c24xx_init_clocks(24000000);
193 s3c24xx_init_uarts(armlex4210_uartcfgs, 194 s3c24xx_init_uarts(armlex4210_uartcfgs,
194 ARRAY_SIZE(armlex4210_uartcfgs)); 195 ARRAY_SIZE(armlex4210_uartcfgs));
@@ -214,4 +215,5 @@ MACHINE_START(ARMLEX4210, "ARMLEX4210")
214 .handle_irq = gic_handle_irq, 215 .handle_irq = gic_handle_irq,
215 .init_machine = armlex4210_machine_init, 216 .init_machine = armlex4210_machine_init,
216 .timer = &exynos4_timer, 217 .timer = &exynos4_timer,
218 .restart = exynos4_restart,
217MACHINE_END 219MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 5acec11821a4..635fb97e31ab 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -38,7 +38,6 @@
38#include <plat/adc.h> 38#include <plat/adc.h>
39#include <plat/regs-fb-v4.h> 39#include <plat/regs-fb-v4.h>
40#include <plat/regs-serial.h> 40#include <plat/regs-serial.h>
41#include <plat/exynos4.h>
42#include <plat/cpu.h> 41#include <plat/cpu.h>
43#include <plat/devs.h> 42#include <plat/devs.h>
44#include <plat/fb.h> 43#include <plat/fb.h>
@@ -55,6 +54,8 @@
55 54
56#include <mach/map.h> 55#include <mach/map.h>
57 56
57#include "common.h"
58
58/* Following are default values for UCON, ULCON and UFCON UART registers */ 59/* Following are default values for UCON, ULCON and UFCON UART registers */
59#define NURI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 60#define NURI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
60 S3C2410_UCON_RXILEVEL | \ 61 S3C2410_UCON_RXILEVEL | \
@@ -1284,7 +1285,7 @@ static struct platform_device *nuri_devices[] __initdata = {
1284 1285
1285static void __init nuri_map_io(void) 1286static void __init nuri_map_io(void)
1286{ 1287{
1287 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 1288 exynos_init_io(NULL, 0);
1288 s3c24xx_init_clocks(24000000); 1289 s3c24xx_init_clocks(24000000);
1289 s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs)); 1290 s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs));
1290} 1291}
@@ -1338,4 +1339,5 @@ MACHINE_START(NURI, "NURI")
1338 .init_machine = nuri_machine_init, 1339 .init_machine = nuri_machine_init,
1339 .timer = &exynos4_timer, 1340 .timer = &exynos4_timer,
1340 .reserve = &nuri_reserve, 1341 .reserve = &nuri_reserve,
1342 .restart = exynos4_restart,
1341MACHINE_END 1343MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index 5561b06c38ec..586eb995aa96 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -29,7 +29,6 @@
29 29
30#include <plat/regs-serial.h> 30#include <plat/regs-serial.h>
31#include <plat/regs-fb-v4.h> 31#include <plat/regs-fb-v4.h>
32#include <plat/exynos4.h>
33#include <plat/cpu.h> 32#include <plat/cpu.h>
34#include <plat/devs.h> 33#include <plat/devs.h>
35#include <plat/sdhci.h> 34#include <plat/sdhci.h>
@@ -44,6 +43,8 @@
44 43
45#include <mach/map.h> 44#include <mach/map.h>
46 45
46#include "common.h"
47
47/* Following are default values for UCON, ULCON and UFCON UART registers */ 48/* Following are default values for UCON, ULCON and UFCON UART registers */
48#define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 49#define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
49 S3C2410_UCON_RXILEVEL | \ 50 S3C2410_UCON_RXILEVEL | \
@@ -639,7 +640,7 @@ static void s5p_tv_setup(void)
639 640
640static void __init origen_map_io(void) 641static void __init origen_map_io(void)
641{ 642{
642 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 643 exynos_init_io(NULL, 0);
643 s3c24xx_init_clocks(24000000); 644 s3c24xx_init_clocks(24000000);
644 s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs)); 645 s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
645} 646}
@@ -699,4 +700,5 @@ MACHINE_START(ORIGEN, "ORIGEN")
699 .init_machine = origen_machine_init, 700 .init_machine = origen_machine_init,
700 .timer = &exynos4_timer, 701 .timer = &exynos4_timer,
701 .reserve = &origen_reserve, 702 .reserve = &origen_reserve,
703 .restart = exynos4_restart,
702MACHINE_END 704MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
index 722d82d7f217..d00e4f016a68 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -28,7 +28,6 @@
28#include <plat/clock.h> 28#include <plat/clock.h>
29#include <plat/cpu.h> 29#include <plat/cpu.h>
30#include <plat/devs.h> 30#include <plat/devs.h>
31#include <plat/exynos4.h>
32#include <plat/gpio-cfg.h> 31#include <plat/gpio-cfg.h>
33#include <plat/iic.h> 32#include <plat/iic.h>
34#include <plat/keypad.h> 33#include <plat/keypad.h>
@@ -37,6 +36,8 @@
37 36
38#include <mach/map.h> 37#include <mach/map.h>
39 38
39#include "common.h"
40
40/* Following are default values for UCON, ULCON and UFCON UART registers */ 41/* Following are default values for UCON, ULCON and UFCON UART registers */
41#define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 42#define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
42 S3C2410_UCON_RXILEVEL | \ 43 S3C2410_UCON_RXILEVEL | \
@@ -250,7 +251,7 @@ static void __init smdk4x12_map_io(void)
250{ 251{
251 clk_xusbxti.rate = 24000000; 252 clk_xusbxti.rate = 24000000;
252 253
253 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 254 exynos_init_io(NULL, 0);
254 s3c24xx_init_clocks(clk_xusbxti.rate); 255 s3c24xx_init_clocks(clk_xusbxti.rate);
255 s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs)); 256 s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs));
256} 257}
@@ -291,6 +292,7 @@ MACHINE_START(SMDK4212, "SMDK4212")
291 .handle_irq = gic_handle_irq, 292 .handle_irq = gic_handle_irq,
292 .init_machine = smdk4x12_machine_init, 293 .init_machine = smdk4x12_machine_init,
293 .timer = &exynos4_timer, 294 .timer = &exynos4_timer,
295 .restart = exynos4_restart,
294MACHINE_END 296MACHINE_END
295 297
296MACHINE_START(SMDK4412, "SMDK4412") 298MACHINE_START(SMDK4412, "SMDK4412")
@@ -302,4 +304,5 @@ MACHINE_START(SMDK4412, "SMDK4412")
302 .handle_irq = gic_handle_irq, 304 .handle_irq = gic_handle_irq,
303 .init_machine = smdk4x12_machine_init, 305 .init_machine = smdk4x12_machine_init,
304 .timer = &exynos4_timer, 306 .timer = &exynos4_timer,
307 .restart = exynos4_restart,
305MACHINE_END 308MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index edc60b6108ed..5b365613b470 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -28,7 +28,6 @@
28#include <plat/regs-serial.h> 28#include <plat/regs-serial.h>
29#include <plat/regs-srom.h> 29#include <plat/regs-srom.h>
30#include <plat/regs-fb-v4.h> 30#include <plat/regs-fb-v4.h>
31#include <plat/exynos4.h>
32#include <plat/cpu.h> 31#include <plat/cpu.h>
33#include <plat/devs.h> 32#include <plat/devs.h>
34#include <plat/fb.h> 33#include <plat/fb.h>
@@ -44,6 +43,8 @@
44 43
45#include <mach/map.h> 44#include <mach/map.h>
46 45
46#include "common.h"
47
47/* Following are default values for UCON, ULCON and UFCON UART registers */ 48/* Following are default values for UCON, ULCON and UFCON UART registers */
48#define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 49#define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
49 S3C2410_UCON_RXILEVEL | \ 50 S3C2410_UCON_RXILEVEL | \
@@ -333,7 +334,7 @@ static void s5p_tv_setup(void)
333 334
334static void __init smdkv310_map_io(void) 335static void __init smdkv310_map_io(void)
335{ 336{
336 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 337 exynos_init_io(NULL, 0);
337 s3c24xx_init_clocks(24000000); 338 s3c24xx_init_clocks(24000000);
338 s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs)); 339 s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
339} 340}
@@ -380,6 +381,7 @@ MACHINE_START(SMDKV310, "SMDKV310")
380 .init_machine = smdkv310_machine_init, 381 .init_machine = smdkv310_machine_init,
381 .timer = &exynos4_timer, 382 .timer = &exynos4_timer,
382 .reserve = &smdkv310_reserve, 383 .reserve = &smdkv310_reserve,
384 .restart = exynos4_restart,
383MACHINE_END 385MACHINE_END
384 386
385MACHINE_START(SMDKC210, "SMDKC210") 387MACHINE_START(SMDKC210, "SMDKC210")
@@ -390,4 +392,5 @@ MACHINE_START(SMDKC210, "SMDKC210")
390 .handle_irq = gic_handle_irq, 392 .handle_irq = gic_handle_irq,
391 .init_machine = smdkv310_machine_init, 393 .init_machine = smdkv310_machine_init,
392 .timer = &exynos4_timer, 394 .timer = &exynos4_timer,
395 .restart = exynos4_restart,
393MACHINE_END 396MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index cfc7d5076f5a..52aea972746a 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -28,7 +28,6 @@
28#include <asm/mach-types.h> 28#include <asm/mach-types.h>
29 29
30#include <plat/regs-serial.h> 30#include <plat/regs-serial.h>
31#include <plat/exynos4.h>
32#include <plat/cpu.h> 31#include <plat/cpu.h>
33#include <plat/devs.h> 32#include <plat/devs.h>
34#include <plat/iic.h> 33#include <plat/iic.h>
@@ -48,6 +47,8 @@
48#include <media/s5p_fimc.h> 47#include <media/s5p_fimc.h>
49#include <media/m5mols.h> 48#include <media/m5mols.h>
50 49
50#include "common.h"
51
51/* Following are default values for UCON, ULCON and UFCON UART registers */ 52/* Following are default values for UCON, ULCON and UFCON UART registers */
52#define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 53#define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
53 S3C2410_UCON_RXILEVEL | \ 54 S3C2410_UCON_RXILEVEL | \
@@ -993,7 +994,7 @@ static struct platform_device *universal_devices[] __initdata = {
993 994
994static void __init universal_map_io(void) 995static void __init universal_map_io(void)
995{ 996{
996 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 997 exynos_init_io(NULL, 0);
997 s3c24xx_init_clocks(24000000); 998 s3c24xx_init_clocks(24000000);
998 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); 999 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
999} 1000}
@@ -1063,4 +1064,5 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1063 .init_machine = universal_machine_init, 1064 .init_machine = universal_machine_init,
1064 .timer = &exynos4_timer, 1065 .timer = &exynos4_timer,
1065 .reserve = &universal_reserve, 1066 .reserve = &universal_reserve,
1067 .restart = exynos4_restart,
1066MACHINE_END 1068MACHINE_END
diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c
index 97343df8f132..85b5527d0918 100644
--- a/arch/arm/mach-exynos/mct.c
+++ b/arch/arm/mach-exynos/mct.c
@@ -44,8 +44,6 @@ struct mct_clock_event_device {
44 char name[10]; 44 char name[10];
45}; 45};
46 46
47static DEFINE_PER_CPU(struct mct_clock_event_device, percpu_mct_tick);
48
49static void exynos4_mct_write(unsigned int value, void *addr) 47static void exynos4_mct_write(unsigned int value, void *addr)
50{ 48{
51 void __iomem *stat_addr; 49 void __iomem *stat_addr;
@@ -264,6 +262,9 @@ static void exynos4_clockevent_init(void)
264} 262}
265 263
266#ifdef CONFIG_LOCAL_TIMERS 264#ifdef CONFIG_LOCAL_TIMERS
265
266static DEFINE_PER_CPU(struct mct_clock_event_device, percpu_mct_tick);
267
267/* Clock event handling */ 268/* Clock event handling */
268static void exynos4_mct_tick_stop(struct mct_clock_event_device *mevt) 269static void exynos4_mct_tick_stop(struct mct_clock_event_device *mevt)
269{ 270{
@@ -428,9 +429,13 @@ int __cpuinit local_timer_setup(struct clock_event_device *evt)
428 429
429void local_timer_stop(struct clock_event_device *evt) 430void local_timer_stop(struct clock_event_device *evt)
430{ 431{
432 unsigned int cpu = smp_processor_id();
431 evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt); 433 evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt);
432 if (mct_int_type == MCT_INT_SPI) 434 if (mct_int_type == MCT_INT_SPI)
433 disable_irq(evt->irq); 435 if (cpu == 0)
436 remove_irq(evt->irq, &mct_tick0_event_irq);
437 else
438 remove_irq(evt->irq, &mct_tick1_event_irq);
434 else 439 else
435 disable_percpu_irq(IRQ_MCT_LOCALTIMER); 440 disable_percpu_irq(IRQ_MCT_LOCALTIMER);
436} 441}
@@ -443,6 +448,7 @@ static void __init exynos4_timer_resources(void)
443 448
444 clk_rate = clk_get_rate(mct_clk); 449 clk_rate = clk_get_rate(mct_clk);
445 450
451#ifdef CONFIG_LOCAL_TIMERS
446 if (mct_int_type == MCT_INT_PPI) { 452 if (mct_int_type == MCT_INT_PPI) {
447 int err; 453 int err;
448 454
@@ -452,6 +458,7 @@ static void __init exynos4_timer_resources(void)
452 WARN(err, "MCT: can't request IRQ %d (%d)\n", 458 WARN(err, "MCT: can't request IRQ %d (%d)\n",
453 IRQ_MCT_LOCALTIMER, err); 459 IRQ_MCT_LOCALTIMER, err);
454 } 460 }
461#endif /* CONFIG_LOCAL_TIMERS */
455} 462}
456 463
457static void __init exynos4_timer_init(void) 464static void __init exynos4_timer_init(void)
diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c
index 60b6774e1eaa..25b453601acc 100644
--- a/arch/arm/mach-footbridge/cats-hw.c
+++ b/arch/arm/mach-footbridge/cats-hw.c
@@ -91,4 +91,5 @@ MACHINE_START(CATS, "Chalice-CATS")
91 .map_io = footbridge_map_io, 91 .map_io = footbridge_map_io,
92 .init_irq = footbridge_init_irq, 92 .init_irq = footbridge_init_irq,
93 .timer = &isa_timer, 93 .timer = &isa_timer,
94 .restart = footbridge_restart,
94MACHINE_END 95MACHINE_END
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index 38a44f9b9da2..41978ee4f9d0 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -199,6 +199,33 @@ void __init footbridge_map_io(void)
199 iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc)); 199 iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
200} 200}
201 201
202void footbridge_restart(char mode, const char *cmd)
203{
204 if (mode == 's') {
205 /* Jump into the ROM */
206 soft_restart(0x41000000);
207 } else {
208 /*
209 * Force the watchdog to do a CPU reset.
210 *
211 * After making sure that the watchdog is disabled
212 * (so we can change the timer registers) we first
213 * enable the timer to autoreload itself. Next, the
214 * timer interval is set really short and any
215 * current interrupt request is cleared (so we can
216 * see an edge transition). Finally, TIMER4 is
217 * enabled as the watchdog.
218 */
219 *CSR_SA110_CNTL &= ~(1 << 13);
220 *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE |
221 TIMER_CNTL_AUTORELOAD |
222 TIMER_CNTL_DIV16;
223 *CSR_TIMER4_LOAD = 0x2;
224 *CSR_TIMER4_CLR = 0;
225 *CSR_SA110_CNTL |= (1 << 13);
226 }
227}
228
202#ifdef CONFIG_FOOTBRIDGE_ADDIN 229#ifdef CONFIG_FOOTBRIDGE_ADDIN
203 230
204static inline unsigned long fb_bus_sdram_offset(void) 231static inline unsigned long fb_bus_sdram_offset(void)
diff --git a/arch/arm/mach-footbridge/common.h b/arch/arm/mach-footbridge/common.h
index b05e662d21ad..c9767b892cb2 100644
--- a/arch/arm/mach-footbridge/common.h
+++ b/arch/arm/mach-footbridge/common.h
@@ -8,3 +8,4 @@ extern void footbridge_map_io(void);
8extern void footbridge_init_irq(void); 8extern void footbridge_init_irq(void);
9 9
10extern void isa_init_irq(unsigned int irq); 10extern void isa_init_irq(unsigned int irq);
11extern void footbridge_restart(char, const char *);
diff --git a/arch/arm/mach-footbridge/ebsa285.c b/arch/arm/mach-footbridge/ebsa285.c
index 012210cf7d16..27716a7e5fc1 100644
--- a/arch/arm/mach-footbridge/ebsa285.c
+++ b/arch/arm/mach-footbridge/ebsa285.c
@@ -21,5 +21,6 @@ MACHINE_START(EBSA285, "EBSA285")
21 .map_io = footbridge_map_io, 21 .map_io = footbridge_map_io,
22 .init_irq = footbridge_init_irq, 22 .init_irq = footbridge_init_irq,
23 .timer = &footbridge_timer, 23 .timer = &footbridge_timer,
24 .restart = footbridge_restart,
24MACHINE_END 25MACHINE_END
25 26
diff --git a/arch/arm/mach-footbridge/include/mach/system.h b/arch/arm/mach-footbridge/include/mach/system.h
index 249f895910fb..a174a5841bc2 100644
--- a/arch/arm/mach-footbridge/include/mach/system.h
+++ b/arch/arm/mach-footbridge/include/mach/system.h
@@ -7,63 +7,7 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#include <linux/io.h>
11#include <asm/hardware/dec21285.h>
12#include <mach/hardware.h>
13#include <asm/leds.h>
14#include <asm/mach-types.h>
15
16static inline void arch_idle(void) 10static inline void arch_idle(void)
17{ 11{
18 cpu_do_idle(); 12 cpu_do_idle();
19} 13}
20
21static inline void arch_reset(char mode, const char *cmd)
22{
23 if (mode == 's') {
24 /*
25 * Jump into the ROM
26 */
27 soft_restart(0x41000000);
28 } else {
29 if (machine_is_netwinder()) {
30 /* open up the SuperIO chip
31 */
32 outb(0x87, 0x370);
33 outb(0x87, 0x370);
34
35 /* aux function group 1 (logical device 7)
36 */
37 outb(0x07, 0x370);
38 outb(0x07, 0x371);
39
40 /* set GP16 for WD-TIMER output
41 */
42 outb(0xe6, 0x370);
43 outb(0x00, 0x371);
44
45 /* set a RED LED and toggle WD_TIMER for rebooting
46 */
47 outb(0xc4, 0x338);
48 } else {
49 /*
50 * Force the watchdog to do a CPU reset.
51 *
52 * After making sure that the watchdog is disabled
53 * (so we can change the timer registers) we first
54 * enable the timer to autoreload itself. Next, the
55 * timer interval is set really short and any
56 * current interrupt request is cleared (so we can
57 * see an edge transition). Finally, TIMER4 is
58 * enabled as the watchdog.
59 */
60 *CSR_SA110_CNTL &= ~(1 << 13);
61 *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE |
62 TIMER_CNTL_AUTORELOAD |
63 TIMER_CNTL_DIV16;
64 *CSR_TIMER4_LOAD = 0x2;
65 *CSR_TIMER4_CLR = 0;
66 *CSR_SA110_CNTL |= (1 << 13);
67 }
68 }
69}
diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c
index 0d3846f3b60d..80a1c5cc9071 100644
--- a/arch/arm/mach-footbridge/netwinder-hw.c
+++ b/arch/arm/mach-footbridge/netwinder-hw.c
@@ -645,6 +645,32 @@ fixup_netwinder(struct tag *tags, char **cmdline, struct meminfo *mi)
645#endif 645#endif
646} 646}
647 647
648static void netwinder_restart(char mode, const char *cmd)
649{
650 if (mode == 's') {
651 /* Jump into the ROM */
652 soft_restart(0x41000000);
653 } else {
654 local_irq_disable();
655 local_fiq_disable();
656
657 /* open up the SuperIO chip */
658 outb(0x87, 0x370);
659 outb(0x87, 0x370);
660
661 /* aux function group 1 (logical device 7) */
662 outb(0x07, 0x370);
663 outb(0x07, 0x371);
664
665 /* set GP16 for WD-TIMER output */
666 outb(0xe6, 0x370);
667 outb(0x00, 0x371);
668
669 /* set a RED LED and toggle WD_TIMER for rebooting */
670 outb(0xc4, 0x338);
671 }
672}
673
648MACHINE_START(NETWINDER, "Rebel-NetWinder") 674MACHINE_START(NETWINDER, "Rebel-NetWinder")
649 /* Maintainer: Russell King/Rebel.com */ 675 /* Maintainer: Russell King/Rebel.com */
650 .atag_offset = 0x100, 676 .atag_offset = 0x100,
@@ -656,4 +682,5 @@ MACHINE_START(NETWINDER, "Rebel-NetWinder")
656 .map_io = footbridge_map_io, 682 .map_io = footbridge_map_io,
657 .init_irq = footbridge_init_irq, 683 .init_irq = footbridge_init_irq,
658 .timer = &isa_timer, 684 .timer = &isa_timer,
685 .restart = netwinder_restart,
659MACHINE_END 686MACHINE_END
diff --git a/arch/arm/mach-footbridge/personal.c b/arch/arm/mach-footbridge/personal.c
index f41dba39b327..e1e9990fa957 100644
--- a/arch/arm/mach-footbridge/personal.c
+++ b/arch/arm/mach-footbridge/personal.c
@@ -19,5 +19,6 @@ MACHINE_START(PERSONAL_SERVER, "Compaq-PersonalServer")
19 .map_io = footbridge_map_io, 19 .map_io = footbridge_map_io,
20 .init_irq = footbridge_init_irq, 20 .init_irq = footbridge_init_irq,
21 .timer = &footbridge_timer, 21 .timer = &footbridge_timer,
22 .restart = footbridge_restart,
22MACHINE_END 23MACHINE_END
23 24
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index 51d4e44ab973..f8a2f6bb5483 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -242,3 +242,8 @@ void __init h720x_map_io(void)
242{ 242{
243 iotable_init(h720x_io_desc,ARRAY_SIZE(h720x_io_desc)); 243 iotable_init(h720x_io_desc,ARRAY_SIZE(h720x_io_desc));
244} 244}
245
246void h720x_restart(char mode, const char *cmd)
247{
248 CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET;
249}
diff --git a/arch/arm/mach-h720x/common.h b/arch/arm/mach-h720x/common.h
index 7dd5fa604efc..2489537d33dd 100644
--- a/arch/arm/mach-h720x/common.h
+++ b/arch/arm/mach-h720x/common.h
@@ -16,6 +16,7 @@
16extern unsigned long h720x_gettimeoffset(void); 16extern unsigned long h720x_gettimeoffset(void);
17extern void __init h720x_init_irq(void); 17extern void __init h720x_init_irq(void);
18extern void __init h720x_map_io(void); 18extern void __init h720x_map_io(void);
19extern void h720x_restart(char, const char *);
19 20
20#ifdef CONFIG_ARCH_H7202 21#ifdef CONFIG_ARCH_H7202
21extern struct sys_timer h7202_timer; 22extern struct sys_timer h7202_timer;
diff --git a/arch/arm/mach-h720x/h7201-eval.c b/arch/arm/mach-h720x/h7201-eval.c
index 9886f19805f4..5fdb20c855e2 100644
--- a/arch/arm/mach-h720x/h7201-eval.c
+++ b/arch/arm/mach-h720x/h7201-eval.c
@@ -34,4 +34,5 @@ MACHINE_START(H7201, "Hynix GMS30C7201")
34 .init_irq = h720x_init_irq, 34 .init_irq = h720x_init_irq,
35 .timer = &h7201_timer, 35 .timer = &h7201_timer,
36 .dma_zone_size = SZ_256M, 36 .dma_zone_size = SZ_256M,
37 .restart = h720x_restart,
37MACHINE_END 38MACHINE_END
diff --git a/arch/arm/mach-h720x/h7202-eval.c b/arch/arm/mach-h720x/h7202-eval.c
index 284a134819e1..169673036c59 100644
--- a/arch/arm/mach-h720x/h7202-eval.c
+++ b/arch/arm/mach-h720x/h7202-eval.c
@@ -77,4 +77,5 @@ MACHINE_START(H7202, "Hynix HMS30C7202")
77 .timer = &h7202_timer, 77 .timer = &h7202_timer,
78 .init_machine = init_eval_h7202, 78 .init_machine = init_eval_h7202,
79 .dma_zone_size = SZ_256M, 79 .dma_zone_size = SZ_256M,
80 .restart = h720x_restart,
80MACHINE_END 81MACHINE_END
diff --git a/arch/arm/mach-h720x/include/mach/system.h b/arch/arm/mach-h720x/include/mach/system.h
index a708d24ee46d..16ac46e239aa 100644
--- a/arch/arm/mach-h720x/include/mach/system.h
+++ b/arch/arm/mach-h720x/include/mach/system.h
@@ -24,10 +24,4 @@ static void arch_idle(void)
24 nop(); 24 nop();
25} 25}
26 26
27
28static __inline__ void arch_reset(char mode, const char *cmd)
29{
30 CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET;
31}
32
33#endif 27#endif
diff --git a/arch/arm/mach-highbank/core.h b/arch/arm/mach-highbank/core.h
index 7e33fc94cd1e..d8e2d0be64ac 100644
--- a/arch/arm/mach-highbank/core.h
+++ b/arch/arm/mach-highbank/core.h
@@ -1,5 +1,6 @@
1extern void highbank_set_cpu_jump(int cpu, void *jump_addr); 1extern void highbank_set_cpu_jump(int cpu, void *jump_addr);
2extern void highbank_clocks_init(void); 2extern void highbank_clocks_init(void);
3extern void highbank_restart(char, const char *);
3extern void __iomem *scu_base_addr; 4extern void __iomem *scu_base_addr;
4#ifdef CONFIG_DEBUG_HIGHBANK_UART 5#ifdef CONFIG_DEBUG_HIGHBANK_UART
5extern void highbank_lluart_map_io(void); 6extern void highbank_lluart_map_io(void);
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index 7266dd510f1a..804c4a55f803 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -147,4 +147,5 @@ DT_MACHINE_START(HIGHBANK, "Highbank")
147 .handle_irq = gic_handle_irq, 147 .handle_irq = gic_handle_irq,
148 .init_machine = highbank_init, 148 .init_machine = highbank_init,
149 .dt_compat = highbank_match, 149 .dt_compat = highbank_match,
150 .restart = highbank_restart,
150MACHINE_END 151MACHINE_END
diff --git a/arch/arm/mach-highbank/include/mach/system.h b/arch/arm/mach-highbank/include/mach/system.h
index 7e8192296cae..b1d8b5fbe373 100644
--- a/arch/arm/mach-highbank/include/mach/system.h
+++ b/arch/arm/mach-highbank/include/mach/system.h
@@ -21,6 +21,4 @@ static inline void arch_idle(void)
21 cpu_do_idle(); 21 cpu_do_idle();
22} 22}
23 23
24extern void arch_reset(char mode, const char *cmd);
25
26#endif 24#endif
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c
index 53f0c4c5ef1c..82c27230d4a9 100644
--- a/arch/arm/mach-highbank/system.c
+++ b/arch/arm/mach-highbank/system.c
@@ -20,7 +20,7 @@
20#include "core.h" 20#include "core.h"
21#include "sysregs.h" 21#include "sysregs.h"
22 22
23void arch_reset(char mode, const char *cmd) 23void highbank_restart(char mode, const char *cmd)
24{ 24{
25 if (mode == 'h') 25 if (mode == 'h')
26 hignbank_set_pwr_hard_reset(); 26 hignbank_set_pwr_hard_reset();
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c
index 039a7abb165a..9273c2a24b54 100644
--- a/arch/arm/mach-imx/clock-imx6q.c
+++ b/arch/arm/mach-imx/clock-imx6q.c
@@ -1931,14 +1931,12 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
1931 val |= 0x1 << BP_CLPCR_LPM; 1931 val |= 0x1 << BP_CLPCR_LPM;
1932 val &= ~BM_CLPCR_VSTBY; 1932 val &= ~BM_CLPCR_VSTBY;
1933 val &= ~BM_CLPCR_SBYOS; 1933 val &= ~BM_CLPCR_SBYOS;
1934 val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
1935 break; 1934 break;
1936 case STOP_POWER_OFF: 1935 case STOP_POWER_OFF:
1937 val |= 0x2 << BP_CLPCR_LPM; 1936 val |= 0x2 << BP_CLPCR_LPM;
1938 val |= 0x3 << BP_CLPCR_STBY_COUNT; 1937 val |= 0x3 << BP_CLPCR_STBY_COUNT;
1939 val |= BM_CLPCR_VSTBY; 1938 val |= BM_CLPCR_VSTBY;
1940 val |= BM_CLPCR_SBYOS; 1939 val |= BM_CLPCR_SBYOS;
1941 val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
1942 break; 1940 break;
1943 default: 1941 default:
1944 return -EINVAL; 1942 return -EINVAL;
diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c
index 1e486e67dabb..146a4f073464 100644
--- a/arch/arm/mach-imx/mach-apf9328.c
+++ b/arch/arm/mach-imx/mach-apf9328.c
@@ -139,4 +139,5 @@ MACHINE_START(APF9328, "Armadeus APF9328")
139 .handle_irq = imx1_handle_irq, 139 .handle_irq = imx1_handle_irq,
140 .timer = &apf9328_timer, 140 .timer = &apf9328_timer,
141 .init_machine = apf9328_init, 141 .init_machine = apf9328_init,
142 .restart = mxc_restart,
142MACHINE_END 143MACHINE_END
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index c9a9cf67755e..e4f426a09899 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -561,4 +561,5 @@ MACHINE_START(ARMADILLO5X0, "Armadillo-500")
561 .handle_irq = imx31_handle_irq, 561 .handle_irq = imx31_handle_irq,
562 .timer = &armadillo5x0_timer, 562 .timer = &armadillo5x0_timer,
563 .init_machine = armadillo5x0_init, 563 .init_machine = armadillo5x0_init,
564 .restart = mxc_restart,
564MACHINE_END 565MACHINE_END
diff --git a/arch/arm/mach-imx/mach-bug.c b/arch/arm/mach-imx/mach-bug.c
index 313f62ddc1ef..9a9897749dd6 100644
--- a/arch/arm/mach-imx/mach-bug.c
+++ b/arch/arm/mach-imx/mach-bug.c
@@ -65,4 +65,5 @@ MACHINE_START(BUG, "BugLabs BUGBase")
65 .handle_irq = imx31_handle_irq, 65 .handle_irq = imx31_handle_irq,
66 .timer = &bug_timer, 66 .timer = &bug_timer,
67 .init_machine = bug_board_init, 67 .init_machine = bug_board_init,
68 .restart = mxc_restart,
68MACHINE_END 69MACHINE_END
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
index edb373052576..d085aea08709 100644
--- a/arch/arm/mach-imx/mach-cpuimx27.c
+++ b/arch/arm/mach-imx/mach-cpuimx27.c
@@ -318,4 +318,5 @@ MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
318 .handle_irq = imx27_handle_irq, 318 .handle_irq = imx27_handle_irq,
319 .timer = &eukrea_cpuimx27_timer, 319 .timer = &eukrea_cpuimx27_timer,
320 .init_machine = eukrea_cpuimx27_init, 320 .init_machine = eukrea_cpuimx27_init,
321 .restart = mxc_restart,
321MACHINE_END 322MACHINE_END
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c
index 66af2e8f7e57..012e120509e0 100644
--- a/arch/arm/mach-imx/mach-cpuimx35.c
+++ b/arch/arm/mach-imx/mach-cpuimx35.c
@@ -201,4 +201,5 @@ MACHINE_START(EUKREA_CPUIMX35SD, "Eukrea CPUIMX35")
201 .handle_irq = imx35_handle_irq, 201 .handle_irq = imx35_handle_irq,
202 .timer = &eukrea_cpuimx35_timer, 202 .timer = &eukrea_cpuimx35_timer,
203 .init_machine = eukrea_cpuimx35_init, 203 .init_machine = eukrea_cpuimx35_init,
204 .restart = mxc_restart,
204MACHINE_END 205MACHINE_END
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
index ab8fbcc472b5..76a97a598b9e 100644
--- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
+++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
@@ -170,4 +170,5 @@ MACHINE_START(EUKREA_CPUIMX25SD, "Eukrea CPUIMX25")
170 .handle_irq = imx25_handle_irq, 170 .handle_irq = imx25_handle_irq,
171 .timer = &eukrea_cpuimx25_timer, 171 .timer = &eukrea_cpuimx25_timer,
172 .init_machine = eukrea_cpuimx25_init, 172 .init_machine = eukrea_cpuimx25_init,
173 .restart = mxc_restart,
173MACHINE_END 174MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index 38eb9e45110b..c2766ae02b4f 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -282,4 +282,5 @@ MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
282 .handle_irq = imx27_handle_irq, 282 .handle_irq = imx27_handle_irq,
283 .timer = &visstrim_m10_timer, 283 .timer = &visstrim_m10_timer,
284 .init_machine = visstrim_m10_board_init, 284 .init_machine = visstrim_m10_board_init,
285 .restart = mxc_restart,
285MACHINE_END 286MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27ipcam.c b/arch/arm/mach-imx/mach-imx27ipcam.c
index 7052155d0557..c9d350c5dcc8 100644
--- a/arch/arm/mach-imx/mach-imx27ipcam.c
+++ b/arch/arm/mach-imx/mach-imx27ipcam.c
@@ -78,4 +78,5 @@ MACHINE_START(IMX27IPCAM, "Freescale IMX27IPCAM")
78 .handle_irq = imx27_handle_irq, 78 .handle_irq = imx27_handle_irq,
79 .timer = &mx27ipcam_timer, 79 .timer = &mx27ipcam_timer,
80 .init_machine = mx27ipcam_init, 80 .init_machine = mx27ipcam_init,
81 .restart = mxc_restart,
81MACHINE_END 82MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c
index 8d6a63521f17..1f45b9189229 100644
--- a/arch/arm/mach-imx/mach-imx27lite.c
+++ b/arch/arm/mach-imx/mach-imx27lite.c
@@ -84,4 +84,5 @@ MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE")
84 .handle_irq = imx27_handle_irq, 84 .handle_irq = imx27_handle_irq,
85 .timer = &mx27lite_timer, 85 .timer = &mx27lite_timer,
86 .init_machine = mx27lite_init, 86 .init_machine = mx27lite_init,
87 .restart = mxc_restart,
87MACHINE_END 88MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 8deb012189b5..05b49bb5d677 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -10,10 +10,13 @@
10 * http://www.gnu.org/copyleft/gpl.html 10 * http://www.gnu.org/copyleft/gpl.html
11 */ 11 */
12 12
13#include <linux/delay.h>
13#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/io.h>
14#include <linux/irq.h> 16#include <linux/irq.h>
15#include <linux/irqdomain.h> 17#include <linux/irqdomain.h>
16#include <linux/of.h> 18#include <linux/of.h>
19#include <linux/of_address.h>
17#include <linux/of_irq.h> 20#include <linux/of_irq.h>
18#include <linux/of_platform.h> 21#include <linux/of_platform.h>
19#include <asm/hardware/cache-l2x0.h> 22#include <asm/hardware/cache-l2x0.h>
@@ -23,6 +26,36 @@
23#include <mach/common.h> 26#include <mach/common.h>
24#include <mach/hardware.h> 27#include <mach/hardware.h>
25 28
29void imx6q_restart(char mode, const char *cmd)
30{
31 struct device_node *np;
32 void __iomem *wdog_base;
33
34 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
35 wdog_base = of_iomap(np, 0);
36 if (!wdog_base)
37 goto soft;
38
39 imx_src_prepare_restart();
40
41 /* enable wdog */
42 writew_relaxed(1 << 2, wdog_base);
43 /* write twice to ensure the request will not get ignored */
44 writew_relaxed(1 << 2, wdog_base);
45
46 /* wait for reset to assert ... */
47 mdelay(500);
48
49 pr_err("Watchdog reset failed to assert reset\n");
50
51 /* delay to allow the serial port to show the message */
52 mdelay(50);
53
54soft:
55 /* we'll take a jump through zero as a poor second */
56 soft_restart(0);
57}
58
26static void __init imx6q_init_machine(void) 59static void __init imx6q_init_machine(void)
27{ 60{
28 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 61 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
@@ -83,4 +116,5 @@ DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
83 .timer = &imx6q_timer, 116 .timer = &imx6q_timer,
84 .init_machine = imx6q_init_machine, 117 .init_machine = imx6q_init_machine,
85 .dt_compat = imx6q_dt_compat, 118 .dt_compat = imx6q_dt_compat,
119 .restart = imx6q_restart,
86MACHINE_END 120MACHINE_END
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c
index 5f37f89e40fa..fc78e8071cd1 100644
--- a/arch/arm/mach-imx/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c
@@ -279,4 +279,5 @@ MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
279 .handle_irq = imx31_handle_irq, 279 .handle_irq = imx31_handle_irq,
280 .timer = &kzm_timer, 280 .timer = &kzm_timer,
281 .init_machine = kzm_board_init, 281 .init_machine = kzm_board_init,
282 .restart = mxc_restart,
282MACHINE_END 283MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c
index fc49785e7340..97046088ff1a 100644
--- a/arch/arm/mach-imx/mach-mx1ads.c
+++ b/arch/arm/mach-imx/mach-mx1ads.c
@@ -147,6 +147,7 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS")
147 .handle_irq = imx1_handle_irq, 147 .handle_irq = imx1_handle_irq,
148 .timer = &mx1ads_timer, 148 .timer = &mx1ads_timer,
149 .init_machine = mx1ads_init, 149 .init_machine = mx1ads_init,
150 .restart = mxc_restart,
150MACHINE_END 151MACHINE_END
151 152
152MACHINE_START(MXLADS, "Freescale MXLADS") 153MACHINE_START(MXLADS, "Freescale MXLADS")
@@ -157,4 +158,5 @@ MACHINE_START(MXLADS, "Freescale MXLADS")
157 .handle_irq = imx1_handle_irq, 158 .handle_irq = imx1_handle_irq,
158 .timer = &mx1ads_timer, 159 .timer = &mx1ads_timer,
159 .init_machine = mx1ads_init, 160 .init_machine = mx1ads_init,
161 .restart = mxc_restart,
160MACHINE_END 162MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c
index 25f84028d055..8d9f95514b1f 100644
--- a/arch/arm/mach-imx/mach-mx21ads.c
+++ b/arch/arm/mach-imx/mach-mx21ads.c
@@ -312,4 +312,5 @@ MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
312 .handle_irq = imx21_handle_irq, 312 .handle_irq = imx21_handle_irq,
313 .timer = &mx21ads_timer, 313 .timer = &mx21ads_timer,
314 .init_machine = mx21ads_board_init, 314 .init_machine = mx21ads_board_init,
315 .restart = mxc_restart,
315MACHINE_END 316MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c
index 88dccf122243..f26734298aa6 100644
--- a/arch/arm/mach-imx/mach-mx25_3ds.c
+++ b/arch/arm/mach-imx/mach-mx25_3ds.c
@@ -270,4 +270,5 @@ MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)")
270 .handle_irq = imx25_handle_irq, 270 .handle_irq = imx25_handle_irq,
271 .timer = &mx25pdk_timer, 271 .timer = &mx25pdk_timer,
272 .init_machine = mx25pdk_init, 272 .init_machine = mx25pdk_init,
273 .restart = mxc_restart,
273MACHINE_END 274MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index ba232d79fa81..18f35816706a 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -425,4 +425,5 @@ MACHINE_START(MX27_3DS, "Freescale MX27PDK")
425 .handle_irq = imx27_handle_irq, 425 .handle_irq = imx27_handle_irq,
426 .timer = &mx27pdk_timer, 426 .timer = &mx27pdk_timer,
427 .init_machine = mx27pdk_init, 427 .init_machine = mx27pdk_init,
428 .restart = mxc_restart,
428MACHINE_END 429MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c
index 74dd5731eb61..0228d2e07fe0 100644
--- a/arch/arm/mach-imx/mach-mx27ads.c
+++ b/arch/arm/mach-imx/mach-mx27ads.c
@@ -351,4 +351,5 @@ MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
351 .handle_irq = imx27_handle_irq, 351 .handle_irq = imx27_handle_irq,
352 .timer = &mx27ads_timer, 352 .timer = &mx27ads_timer,
353 .init_machine = mx27ads_board_init, 353 .init_machine = mx27ads_board_init,
354 .restart = mxc_restart,
354MACHINE_END 355MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c
index b8c54b840185..2b565c381347 100644
--- a/arch/arm/mach-imx/mach-mx31_3ds.c
+++ b/arch/arm/mach-imx/mach-mx31_3ds.c
@@ -770,4 +770,5 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
770 .timer = &mx31_3ds_timer, 770 .timer = &mx31_3ds_timer,
771 .init_machine = mx31_3ds_init, 771 .init_machine = mx31_3ds_init,
772 .reserve = mx31_3ds_reserve, 772 .reserve = mx31_3ds_reserve,
773 .restart = mxc_restart,
773MACHINE_END 774MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c
index 9cc1a49053bb..4917aab0e253 100644
--- a/arch/arm/mach-imx/mach-mx31ads.c
+++ b/arch/arm/mach-imx/mach-mx31ads.c
@@ -542,4 +542,5 @@ MACHINE_START(MX31ADS, "Freescale MX31ADS")
542 .handle_irq = imx31_handle_irq, 542 .handle_irq = imx31_handle_irq,
543 .timer = &mx31ads_timer, 543 .timer = &mx31ads_timer,
544 .init_machine = mx31ads_init, 544 .init_machine = mx31ads_init,
545 .restart = mxc_restart,
545MACHINE_END 546MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c
index 102ec99357cc..02401bbd6d53 100644
--- a/arch/arm/mach-imx/mach-mx31lilly.c
+++ b/arch/arm/mach-imx/mach-mx31lilly.c
@@ -303,4 +303,5 @@ MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
303 .handle_irq = imx31_handle_irq, 303 .handle_irq = imx31_handle_irq,
304 .timer = &mx31lilly_timer, 304 .timer = &mx31lilly_timer,
305 .init_machine = mx31lilly_board_init, 305 .init_machine = mx31lilly_board_init,
306 .restart = mxc_restart,
306MACHINE_END 307MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c
index 5366d2de18fd..ef80751712e7 100644
--- a/arch/arm/mach-imx/mach-mx31lite.c
+++ b/arch/arm/mach-imx/mach-mx31lite.c
@@ -287,4 +287,5 @@ MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
287 .handle_irq = imx31_handle_irq, 287 .handle_irq = imx31_handle_irq,
288 .timer = &mx31lite_timer, 288 .timer = &mx31lite_timer,
289 .init_machine = mx31lite_init, 289 .init_machine = mx31lite_init,
290 .restart = mxc_restart,
290MACHINE_END 291MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c
index 93269150309c..b95981dacb2b 100644
--- a/arch/arm/mach-imx/mach-mx31moboard.c
+++ b/arch/arm/mach-imx/mach-mx31moboard.c
@@ -600,4 +600,5 @@ MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
600 .handle_irq = imx31_handle_irq, 600 .handle_irq = imx31_handle_irq,
601 .timer = &mx31moboard_timer, 601 .timer = &mx31moboard_timer,
602 .init_machine = mx31moboard_init, 602 .init_machine = mx31moboard_init,
603 .restart = mxc_restart,
603MACHINE_END 604MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c
index 7a462025a0f7..0af6c9c5b3fd 100644
--- a/arch/arm/mach-imx/mach-mx35_3ds.c
+++ b/arch/arm/mach-imx/mach-mx35_3ds.c
@@ -224,4 +224,5 @@ MACHINE_START(MX35_3DS, "Freescale MX35PDK")
224 .handle_irq = imx35_handle_irq, 224 .handle_irq = imx35_handle_irq,
225 .timer = &mx35pdk_timer, 225 .timer = &mx35pdk_timer,
226 .init_machine = mx35_3ds_init, 226 .init_machine = mx35_3ds_init,
227 .restart = mxc_restart,
227MACHINE_END 228MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c
index 125c19643b0f..8b3d3f07d894 100644
--- a/arch/arm/mach-imx/mach-mxt_td60.c
+++ b/arch/arm/mach-imx/mach-mxt_td60.c
@@ -274,4 +274,5 @@ MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
274 .handle_irq = imx27_handle_irq, 274 .handle_irq = imx27_handle_irq,
275 .timer = &mxt_td60_timer, 275 .timer = &mxt_td60_timer,
276 .init_machine = mxt_td60_board_init, 276 .init_machine = mxt_td60_board_init,
277 .restart = mxc_restart,
277MACHINE_END 278MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c
index 26072f4b02e3..d3b9c6b5edde 100644
--- a/arch/arm/mach-imx/mach-pca100.c
+++ b/arch/arm/mach-imx/mach-pca100.c
@@ -442,4 +442,5 @@ MACHINE_START(PCA100, "phyCARD-i.MX27")
442 .handle_irq = imx27_handle_irq, 442 .handle_irq = imx27_handle_irq,
443 .init_machine = pca100_init, 443 .init_machine = pca100_init,
444 .timer = &pca100_timer, 444 .timer = &pca100_timer,
445 .restart = mxc_restart,
445MACHINE_END 446MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c
index efd6b536ef6a..d7e151669ed3 100644
--- a/arch/arm/mach-imx/mach-pcm037.c
+++ b/arch/arm/mach-imx/mach-pcm037.c
@@ -696,4 +696,5 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037")
696 .handle_irq = imx31_handle_irq, 696 .handle_irq = imx31_handle_irq,
697 .timer = &pcm037_timer, 697 .timer = &pcm037_timer,
698 .init_machine = pcm037_init, 698 .init_machine = pcm037_init,
699 .restart = mxc_restart,
699MACHINE_END 700MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
index a17e9c7dfca0..16f126da9f8f 100644
--- a/arch/arm/mach-imx/mach-pcm038.c
+++ b/arch/arm/mach-imx/mach-pcm038.c
@@ -357,4 +357,5 @@ MACHINE_START(PCM038, "phyCORE-i.MX27")
357 .handle_irq = imx27_handle_irq, 357 .handle_irq = imx27_handle_irq,
358 .timer = &pcm038_timer, 358 .timer = &pcm038_timer,
359 .init_machine = pcm038_init, 359 .init_machine = pcm038_init,
360 .restart = mxc_restart,
360MACHINE_END 361MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c
index 7366c2ae3ea5..06dc106519ae 100644
--- a/arch/arm/mach-imx/mach-pcm043.c
+++ b/arch/arm/mach-imx/mach-pcm043.c
@@ -425,4 +425,5 @@ MACHINE_START(PCM043, "Phytec Phycore pcm043")
425 .handle_irq = imx35_handle_irq, 425 .handle_irq = imx35_handle_irq,
426 .timer = &pcm043_timer, 426 .timer = &pcm043_timer,
427 .init_machine = pcm043_init, 427 .init_machine = pcm043_init,
428 .restart = mxc_restart,
428MACHINE_END 429MACHINE_END
diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c
index 4ff5faf102a8..260621055b6b 100644
--- a/arch/arm/mach-imx/mach-qong.c
+++ b/arch/arm/mach-imx/mach-qong.c
@@ -273,4 +273,5 @@ MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
273 .handle_irq = imx31_handle_irq, 273 .handle_irq = imx31_handle_irq,
274 .timer = &qong_timer, 274 .timer = &qong_timer,
275 .init_machine = qong_init, 275 .init_machine = qong_init,
276 .restart = mxc_restart,
276MACHINE_END 277MACHINE_END
diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c
index bb6e5b25d8d0..cb9ceae2f648 100644
--- a/arch/arm/mach-imx/mach-scb9328.c
+++ b/arch/arm/mach-imx/mach-scb9328.c
@@ -144,4 +144,5 @@ MACHINE_START(SCB9328, "Synertronixx scb9328")
144 .handle_irq = imx1_handle_irq, 144 .handle_irq = imx1_handle_irq,
145 .timer = &scb9328_timer, 145 .timer = &scb9328_timer,
146 .init_machine = scb9328_init, 146 .init_machine = scb9328_init,
147 .restart = mxc_restart,
147MACHINE_END 148MACHINE_END
diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c
index 69092458f2d9..033257e553ef 100644
--- a/arch/arm/mach-imx/mach-vpr200.c
+++ b/arch/arm/mach-imx/mach-vpr200.c
@@ -322,4 +322,5 @@ MACHINE_START(VPR200, "VPR200")
322 .handle_irq = imx35_handle_irq, 322 .handle_irq = imx35_handle_irq,
323 .timer = &vpr200_timer, 323 .timer = &vpr200_timer,
324 .init_machine = vpr200_board_init, 324 .init_machine = vpr200_board_init,
325 .restart = mxc_restart,
325MACHINE_END 326MACHINE_END
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c
index a8e33681b732..4bde04f99e38 100644
--- a/arch/arm/mach-imx/src.c
+++ b/arch/arm/mach-imx/src.c
@@ -19,6 +19,7 @@
19 19
20#define SRC_SCR 0x000 20#define SRC_SCR 0x000
21#define SRC_GPR1 0x020 21#define SRC_GPR1 0x020
22#define BP_SRC_SCR_WARM_RESET_ENABLE 0
22#define BP_SRC_SCR_CORE1_RST 14 23#define BP_SRC_SCR_CORE1_RST 14
23#define BP_SRC_SCR_CORE1_ENABLE 22 24#define BP_SRC_SCR_CORE1_ENABLE 22
24 25
@@ -46,11 +47,33 @@ void imx_set_cpu_jump(int cpu, void *jump_addr)
46 src_base + SRC_GPR1 + cpu * 8); 47 src_base + SRC_GPR1 + cpu * 8);
47} 48}
48 49
50void imx_src_prepare_restart(void)
51{
52 u32 val;
53
54 /* clear enable bits of secondary cores */
55 val = readl_relaxed(src_base + SRC_SCR);
56 val &= ~(0x7 << BP_SRC_SCR_CORE1_ENABLE);
57 writel_relaxed(val, src_base + SRC_SCR);
58
59 /* clear persistent entry register of primary core */
60 writel_relaxed(0, src_base + SRC_GPR1);
61}
62
49void __init imx_src_init(void) 63void __init imx_src_init(void)
50{ 64{
51 struct device_node *np; 65 struct device_node *np;
66 u32 val;
52 67
53 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-src"); 68 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-src");
54 src_base = of_iomap(np, 0); 69 src_base = of_iomap(np, 0);
55 WARN_ON(!src_base); 70 WARN_ON(!src_base);
71
72 /*
73 * force warm reset sources to generate cold reset
74 * for a more reliable restart
75 */
76 val = readl_relaxed(src_base + SRC_SCR);
77 val &= ~(1 << BP_SRC_SCR_WARM_RESET_ENABLE);
78 writel_relaxed(val, src_base + SRC_SCR);
56} 79}
diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h
index a08f9b0299df..899561d8db28 100644
--- a/arch/arm/mach-integrator/common.h
+++ b/arch/arm/mach-integrator/common.h
@@ -1,2 +1,3 @@
1void integrator_init_early(void); 1void integrator_init_early(void);
2void integrator_reserve(void); 2void integrator_reserve(void);
3void integrator_restart(char, const char *);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 4b38e13667ac..0a3e0974398a 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -238,3 +238,11 @@ void __init integrator_reserve(void)
238{ 238{
239 memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET); 239 memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET);
240} 240}
241
242/*
243 * To reset, we hit the on-board reset register in the system FPGA
244 */
245void integrator_restart(char mode, const char *cmd)
246{
247 cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
248}
diff --git a/arch/arm/mach-integrator/include/mach/system.h b/arch/arm/mach-integrator/include/mach/system.h
index e1551b8dab77..901514eba4a6 100644
--- a/arch/arm/mach-integrator/include/mach/system.h
+++ b/arch/arm/mach-integrator/include/mach/system.h
@@ -21,8 +21,6 @@
21#ifndef __ASM_ARCH_SYSTEM_H 21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H 22#define __ASM_ARCH_SYSTEM_H
23 23
24#include <mach/cm.h>
25
26static inline void arch_idle(void) 24static inline void arch_idle(void)
27{ 25{
28 /* 26 /*
@@ -32,13 +30,4 @@ static inline void arch_idle(void)
32 cpu_do_idle(); 30 cpu_do_idle();
33} 31}
34 32
35static inline void arch_reset(char mode, const char *cmd)
36{
37 /*
38 * To reset, we hit the on-board reset register
39 * in the system FPGA
40 */
41 cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
42}
43
44#endif 33#endif
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index a1769f35a86e..21a1d6cbef40 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -472,4 +472,5 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
472 .init_irq = ap_init_irq, 472 .init_irq = ap_init_irq,
473 .timer = &ap_timer, 473 .timer = &ap_timer,
474 .init_machine = ap_init, 474 .init_machine = ap_init,
475 .restart = integrator_restart,
475MACHINE_END 476MACHINE_END
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 5de49c33e4d4..3a730d447c9a 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -499,4 +499,5 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
499 .init_irq = intcp_init_irq, 499 .init_irq = intcp_init_irq,
500 .timer = &cp_timer, 500 .timer = &cp_timer,
501 .init_machine = intcp_init, 501 .init_machine = intcp_init,
502 .restart = integrator_restart,
502MACHINE_END 503MACHINE_END
diff --git a/arch/arm/mach-iop13xx/include/mach/iop13xx.h b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
index 52b7fab7ef60..07e9ff7adafb 100644
--- a/arch/arm/mach-iop13xx/include/mach/iop13xx.h
+++ b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
@@ -10,6 +10,7 @@ void iop13xx_map_io(void);
10void iop13xx_platform_init(void); 10void iop13xx_platform_init(void);
11void iop13xx_add_tpmi_devices(void); 11void iop13xx_add_tpmi_devices(void);
12void iop13xx_init_irq(void); 12void iop13xx_init_irq(void);
13void iop13xx_restart(char, const char *);
13 14
14/* CPUID CP6 R0 Page 0 */ 15/* CPUID CP6 R0 Page 0 */
15static inline int iop13xx_cpu_id(void) 16static inline int iop13xx_cpu_id(void)
diff --git a/arch/arm/mach-iop13xx/include/mach/system.h b/arch/arm/mach-iop13xx/include/mach/system.h
index d0c66ef450a7..1f31ed3f8ae2 100644
--- a/arch/arm/mach-iop13xx/include/mach/system.h
+++ b/arch/arm/mach-iop13xx/include/mach/system.h
@@ -7,21 +7,7 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#include <mach/iop13xx.h>
11static inline void arch_idle(void) 10static inline void arch_idle(void)
12{ 11{
13 cpu_do_idle(); 12 cpu_do_idle();
14} 13}
15
16static inline void arch_reset(char mode, const char *cmd)
17{
18 /*
19 * Reset the internal bus (warning both cores are reset)
20 */
21 write_wdtcr(IOP_WDTCR_EN_ARM);
22 write_wdtcr(IOP_WDTCR_EN);
23 write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET);
24 write_wdtcr(0x1000);
25
26 for(;;);
27}
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
index 4cf2cc477eae..abaee8833588 100644
--- a/arch/arm/mach-iop13xx/iq81340mc.c
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -96,4 +96,5 @@ MACHINE_START(IQ81340MC, "Intel IQ81340MC")
96 .init_irq = iop13xx_init_irq, 96 .init_irq = iop13xx_init_irq,
97 .timer = &iq81340mc_timer, 97 .timer = &iq81340mc_timer,
98 .init_machine = iq81340mc_init, 98 .init_machine = iq81340mc_init,
99 .restart = iop13xx_restart,
99MACHINE_END 100MACHINE_END
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
index cd9e27499a1e..690916a09dc6 100644
--- a/arch/arm/mach-iop13xx/iq81340sc.c
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -98,4 +98,5 @@ MACHINE_START(IQ81340SC, "Intel IQ81340SC")
98 .init_irq = iop13xx_init_irq, 98 .init_irq = iop13xx_init_irq,
99 .timer = &iq81340sc_timer, 99 .timer = &iq81340sc_timer,
100 .init_machine = iq81340sc_init, 100 .init_machine = iq81340sc_init,
101 .restart = iop13xx_restart,
101MACHINE_END 102MACHINE_END
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c
index a5b989728b9e..daabb1fa6c2c 100644
--- a/arch/arm/mach-iop13xx/setup.c
+++ b/arch/arm/mach-iop13xx/setup.c
@@ -606,3 +606,14 @@ static int __init iop13xx_init_adma_setup(char *str)
606__setup("iop13xx_init_adma", iop13xx_init_adma_setup); 606__setup("iop13xx_init_adma", iop13xx_init_adma_setup);
607__setup("iop13xx_init_uart", iop13xx_init_uart_setup); 607__setup("iop13xx_init_uart", iop13xx_init_uart_setup);
608__setup("iop13xx_init_i2c", iop13xx_init_i2c_setup); 608__setup("iop13xx_init_i2c", iop13xx_init_i2c_setup);
609
610void iop13xx_restart(char mode, const char *cmd)
611{
612 /*
613 * Reset the internal bus (warning both cores are reset)
614 */
615 write_wdtcr(IOP_WDTCR_EN_ARM);
616 write_wdtcr(IOP_WDTCR_EN);
617 write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET);
618 write_wdtcr(0x1000);
619}
diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c
index 4325055d4e19..24069e03fdc1 100644
--- a/arch/arm/mach-iop32x/em7210.c
+++ b/arch/arm/mach-iop32x/em7210.c
@@ -208,4 +208,5 @@ MACHINE_START(EM7210, "Lanner EM7210")
208 .init_irq = iop32x_init_irq, 208 .init_irq = iop32x_init_irq,
209 .timer = &em7210_timer, 209 .timer = &em7210_timer,
210 .init_machine = em7210_init_machine, 210 .init_machine = em7210_init_machine,
211 .restart = iop3xx_restart,
211MACHINE_END 212MACHINE_END
diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c
index 0edc88020577..204e1d1cd766 100644
--- a/arch/arm/mach-iop32x/glantank.c
+++ b/arch/arm/mach-iop32x/glantank.c
@@ -212,4 +212,5 @@ MACHINE_START(GLANTANK, "GLAN Tank")
212 .init_irq = iop32x_init_irq, 212 .init_irq = iop32x_init_irq,
213 .timer = &glantank_timer, 213 .timer = &glantank_timer,
214 .init_machine = glantank_init_machine, 214 .init_machine = glantank_init_machine,
215 .restart = iop3xx_restart,
215MACHINE_END 216MACHINE_END
diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h
index b4f83e5973b2..4a88727bca98 100644
--- a/arch/arm/mach-iop32x/include/mach/system.h
+++ b/arch/arm/mach-iop32x/include/mach/system.h
@@ -7,26 +7,7 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#include <asm/mach-types.h>
11#include <asm/hardware/iop3xx.h>
12#include <mach/n2100.h>
13
14static inline void arch_idle(void) 10static inline void arch_idle(void)
15{ 11{
16 cpu_do_idle(); 12 cpu_do_idle();
17} 13}
18
19static inline void arch_reset(char mode, const char *cmd)
20{
21 if (machine_is_n2100()) {
22 gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW);
23 gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT);
24 while (1)
25 ;
26 }
27
28 *IOP3XX_PCSR = 0x30;
29
30 /* Jump into ROM at address 0 */
31 soft_restart(0);
32}
diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c
index 9e7aaccfeba0..3eb642af1cdc 100644
--- a/arch/arm/mach-iop32x/iq31244.c
+++ b/arch/arm/mach-iop32x/iq31244.c
@@ -318,6 +318,7 @@ MACHINE_START(IQ31244, "Intel IQ31244")
318 .init_irq = iop32x_init_irq, 318 .init_irq = iop32x_init_irq,
319 .timer = &iq31244_timer, 319 .timer = &iq31244_timer,
320 .init_machine = iq31244_init_machine, 320 .init_machine = iq31244_init_machine,
321 .restart = iop3xx_restart,
321MACHINE_END 322MACHINE_END
322 323
323/* There should have been an ep80219 machine identifier from the beginning. 324/* There should have been an ep80219 machine identifier from the beginning.
@@ -332,4 +333,5 @@ MACHINE_START(EP80219, "Intel EP80219")
332 .init_irq = iop32x_init_irq, 333 .init_irq = iop32x_init_irq,
333 .timer = &iq31244_timer, 334 .timer = &iq31244_timer,
334 .init_machine = iq31244_init_machine, 335 .init_machine = iq31244_init_machine,
336 .restart = iop3xx_restart,
335MACHINE_END 337MACHINE_END
diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c
index 53ea86f649dd..2ec724b58a2c 100644
--- a/arch/arm/mach-iop32x/iq80321.c
+++ b/arch/arm/mach-iop32x/iq80321.c
@@ -191,4 +191,5 @@ MACHINE_START(IQ80321, "Intel IQ80321")
191 .init_irq = iop32x_init_irq, 191 .init_irq = iop32x_init_irq,
192 .timer = &iq80321_timer, 192 .timer = &iq80321_timer,
193 .init_machine = iq80321_init_machine, 193 .init_machine = iq80321_init_machine,
194 .restart = iop3xx_restart,
194MACHINE_END 195MACHINE_END
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c
index d7269279968c..6b6d55912444 100644
--- a/arch/arm/mach-iop32x/n2100.c
+++ b/arch/arm/mach-iop32x/n2100.c
@@ -291,6 +291,14 @@ static void n2100_power_off(void)
291 ; 291 ;
292} 292}
293 293
294static void n2100_restart(char mode, const char *cmd)
295{
296 gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW);
297 gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT);
298 while (1)
299 ;
300}
301
294 302
295static struct timer_list power_button_poll_timer; 303static struct timer_list power_button_poll_timer;
296 304
@@ -332,4 +340,5 @@ MACHINE_START(N2100, "Thecus N2100")
332 .init_irq = iop32x_init_irq, 340 .init_irq = iop32x_init_irq,
333 .timer = &n2100_timer, 341 .timer = &n2100_timer,
334 .init_machine = n2100_init_machine, 342 .init_machine = n2100_init_machine,
343 .restart = n2100_restart,
335MACHINE_END 344MACHINE_END
diff --git a/arch/arm/mach-iop33x/include/mach/system.h b/arch/arm/mach-iop33x/include/mach/system.h
index 86d1b20dd692..4f98e765397c 100644
--- a/arch/arm/mach-iop33x/include/mach/system.h
+++ b/arch/arm/mach-iop33x/include/mach/system.h
@@ -7,17 +7,7 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#include <asm/hardware/iop3xx.h>
11
12static inline void arch_idle(void) 10static inline void arch_idle(void)
13{ 11{
14 cpu_do_idle(); 12 cpu_do_idle();
15} 13}
16
17static inline void arch_reset(char mode, const char *cmd)
18{
19 *IOP3XX_PCSR = 0x30;
20
21 /* Jump into ROM at address 0 */
22 soft_restart(0);
23}
diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c
index 9e14ccc56f8e..abce934f3816 100644
--- a/arch/arm/mach-iop33x/iq80331.c
+++ b/arch/arm/mach-iop33x/iq80331.c
@@ -146,4 +146,5 @@ MACHINE_START(IQ80331, "Intel IQ80331")
146 .init_irq = iop33x_init_irq, 146 .init_irq = iop33x_init_irq,
147 .timer = &iq80331_timer, 147 .timer = &iq80331_timer,
148 .init_machine = iq80331_init_machine, 148 .init_machine = iq80331_init_machine,
149 .restart = iop3xx_restart,
149MACHINE_END 150MACHINE_END
diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c
index 09c899a2523f..7513559e25bb 100644
--- a/arch/arm/mach-iop33x/iq80332.c
+++ b/arch/arm/mach-iop33x/iq80332.c
@@ -146,4 +146,5 @@ MACHINE_START(IQ80332, "Intel IQ80332")
146 .init_irq = iop33x_init_irq, 146 .init_irq = iop33x_init_irq,
147 .timer = &iq80332_timer, 147 .timer = &iq80332_timer,
148 .init_machine = iq80332_init_machine, 148 .init_machine = iq80332_init_machine,
149 .restart = iop3xx_restart,
149MACHINE_END 150MACHINE_END
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index 24f0fe35f4ad..81c45370a4e6 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -515,3 +515,7 @@ void __init ixp2000_init_irq(void)
515 } 515 }
516} 516}
517 517
518void ixp2000_restart(char mode, const char *cmd)
519{
520 ixp2000_reg_wrb(IXP2000_RESET0, RSTALL);
521}
diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c
index af9994537e01..ee525416f0d2 100644
--- a/arch/arm/mach-ixp2000/enp2611.c
+++ b/arch/arm/mach-ixp2000/enp2611.c
@@ -259,6 +259,7 @@ MACHINE_START(ENP2611, "Radisys ENP-2611 PCI network processor board")
259 .init_irq = ixp2000_init_irq, 259 .init_irq = ixp2000_init_irq,
260 .timer = &enp2611_timer, 260 .timer = &enp2611_timer,
261 .init_machine = enp2611_init_machine, 261 .init_machine = enp2611_init_machine,
262 .restart = ixp2000_restart,
262MACHINE_END 263MACHINE_END
263 264
264 265
diff --git a/arch/arm/mach-ixp2000/include/mach/platform.h b/arch/arm/mach-ixp2000/include/mach/platform.h
index 42182c79ed90..bb0f8dcf9ee1 100644
--- a/arch/arm/mach-ixp2000/include/mach/platform.h
+++ b/arch/arm/mach-ixp2000/include/mach/platform.h
@@ -122,6 +122,7 @@ void ixp2000_map_io(void);
122void ixp2000_uart_init(void); 122void ixp2000_uart_init(void);
123void ixp2000_init_irq(void); 123void ixp2000_init_irq(void);
124void ixp2000_init_time(unsigned long); 124void ixp2000_init_time(unsigned long);
125void ixp2000_restart(char, const char *);
125unsigned long ixp2000_gettimeoffset(void); 126unsigned long ixp2000_gettimeoffset(void);
126 127
127struct pci_sys_data; 128struct pci_sys_data;
diff --git a/arch/arm/mach-ixp2000/include/mach/system.h b/arch/arm/mach-ixp2000/include/mach/system.h
index 810df7b93982..a7fb08b2b8e7 100644
--- a/arch/arm/mach-ixp2000/include/mach/system.h
+++ b/arch/arm/mach-ixp2000/include/mach/system.h
@@ -8,40 +8,7 @@
8 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11
12#include <mach/hardware.h>
13#include <asm/mach-types.h>
14
15static inline void arch_idle(void) 11static inline void arch_idle(void)
16{ 12{
17 cpu_do_idle(); 13 cpu_do_idle();
18} 14}
19
20static inline void arch_reset(char mode, const char *cmd)
21{
22 /*
23 * Reset flash banking register so that we are pointing at
24 * RedBoot bank.
25 */
26 if (machine_is_ixdp2401()) {
27 ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
28 ((0 >> IXDP2X01_FLASH_WINDOW_BITS)
29 | IXDP2X01_CPLD_FLASH_INTERN));
30 ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff);
31 }
32
33 /*
34 * On IXDP2801 we need to write this magic sequence to the CPLD
35 * to cause a complete reset of the CPU and all external devices
36 * and move the flash bank register back to 0.
37 */
38 if (machine_is_ixdp2801() || machine_is_ixdp28x5()) {
39 unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG;
40
41 reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF);
42 ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg);
43 ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000);
44 }
45
46 ixp2000_reg_wrb(IXP2000_RESET0, RSTALL);
47}
diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c
index f7dfd9700141..f53e911ec94a 100644
--- a/arch/arm/mach-ixp2000/ixdp2400.c
+++ b/arch/arm/mach-ixp2000/ixdp2400.c
@@ -176,5 +176,6 @@ MACHINE_START(IXDP2400, "Intel IXDP2400 Development Platform")
176 .init_irq = ixdp2400_init_irq, 176 .init_irq = ixdp2400_init_irq,
177 .timer = &ixdp2400_timer, 177 .timer = &ixdp2400_timer,
178 .init_machine = ixdp2x00_init_machine, 178 .init_machine = ixdp2x00_init_machine,
179 .restart = ixp2000_restart,
179MACHINE_END 180MACHINE_END
180 181
diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c
index d33bcac1ec92..a2e7c393e74f 100644
--- a/arch/arm/mach-ixp2000/ixdp2800.c
+++ b/arch/arm/mach-ixp2000/ixdp2800.c
@@ -291,5 +291,6 @@ MACHINE_START(IXDP2800, "Intel IXDP2800 Development Platform")
291 .init_irq = ixdp2800_init_irq, 291 .init_irq = ixdp2800_init_irq,
292 .timer = &ixdp2800_timer, 292 .timer = &ixdp2800_timer,
293 .init_machine = ixdp2x00_init_machine, 293 .init_machine = ixdp2x00_init_machine,
294 .restart = ixp2000_restart,
294MACHINE_END 295MACHINE_END
295 296
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index 61a28676b5be..7632beadabf6 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -413,6 +413,35 @@ static void __init ixdp2x01_init_machine(void)
413 ixdp2x01_uart_init(); 413 ixdp2x01_uart_init();
414} 414}
415 415
416static void ixdp2401_restart(char mode, const char *cmd)
417{
418 /*
419 * Reset flash banking register so that we are pointing at
420 * RedBoot bank.
421 */
422 ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
423 ((0 >> IXDP2X01_FLASH_WINDOW_BITS)
424 | IXDP2X01_CPLD_FLASH_INTERN));
425 ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff);
426
427 ixp2000_restart(mode, cmd);
428}
429
430static void ixdp280x_restart(char mode, const char *cmd)
431{
432 /*
433 * On IXDP2801 we need to write this magic sequence to the CPLD
434 * to cause a complete reset of the CPU and all external devices
435 * and move the flash bank register back to 0.
436 */
437 unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG;
438
439 reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF);
440 ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg);
441 ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000);
442
443 ixp2000_restart(mode, cmd);
444}
416 445
417#ifdef CONFIG_ARCH_IXDP2401 446#ifdef CONFIG_ARCH_IXDP2401
418MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform") 447MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform")
@@ -422,6 +451,7 @@ MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform")
422 .init_irq = ixdp2x01_init_irq, 451 .init_irq = ixdp2x01_init_irq,
423 .timer = &ixdp2x01_timer, 452 .timer = &ixdp2x01_timer,
424 .init_machine = ixdp2x01_init_machine, 453 .init_machine = ixdp2x01_init_machine,
454 .restart = ixdp2401_restart,
425MACHINE_END 455MACHINE_END
426#endif 456#endif
427 457
@@ -433,6 +463,7 @@ MACHINE_START(IXDP2801, "Intel IXDP2801 Development Platform")
433 .init_irq = ixdp2x01_init_irq, 463 .init_irq = ixdp2x01_init_irq,
434 .timer = &ixdp2x01_timer, 464 .timer = &ixdp2x01_timer,
435 .init_machine = ixdp2x01_init_machine, 465 .init_machine = ixdp2x01_init_machine,
466 .restart = ixdp280x_restart,
436MACHINE_END 467MACHINE_END
437 468
438/* 469/*
@@ -446,6 +477,7 @@ MACHINE_START(IXDP28X5, "Intel IXDP2805/2855 Development Platform")
446 .init_irq = ixdp2x01_init_irq, 477 .init_irq = ixdp2x01_init_irq,
447 .timer = &ixdp2x01_timer, 478 .timer = &ixdp2x01_timer,
448 .init_machine = ixdp2x01_init_machine, 479 .init_machine = ixdp2x01_init_machine,
480 .restart = ixdp280x_restart,
449MACHINE_END 481MACHINE_END
450#endif 482#endif
451 483
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index a1bee33d183e..0923bb905cc0 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -444,3 +444,9 @@ void __init ixp23xx_sys_init(void)
444 *IXP23XX_EXP_UNIT_FUSE |= 0xf; 444 *IXP23XX_EXP_UNIT_FUSE |= 0xf;
445 platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); 445 platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices));
446} 446}
447
448void ixp23xx_restart(char mode, const char *cmd)
449{
450 /* Use on-chip reset capability */
451 *IXP23XX_RESET0 |= IXP23XX_RST_ALL;
452}
diff --git a/arch/arm/mach-ixp23xx/espresso.c b/arch/arm/mach-ixp23xx/espresso.c
index 30dd31652e9d..8f2487e1fc4e 100644
--- a/arch/arm/mach-ixp23xx/espresso.c
+++ b/arch/arm/mach-ixp23xx/espresso.c
@@ -90,4 +90,5 @@ MACHINE_START(ESPRESSO, "IP Fabrics Double Espresso")
90 .timer = &ixp23xx_timer, 90 .timer = &ixp23xx_timer,
91 .atag_offset = 0x100, 91 .atag_offset = 0x100,
92 .init_machine = espresso_init, 92 .init_machine = espresso_init,
93 .restart = ixp23xx_restart,
93MACHINE_END 94MACHINE_END
diff --git a/arch/arm/mach-ixp23xx/include/mach/platform.h b/arch/arm/mach-ixp23xx/include/mach/platform.h
index db9d9416e5e4..50de558e722e 100644
--- a/arch/arm/mach-ixp23xx/include/mach/platform.h
+++ b/arch/arm/mach-ixp23xx/include/mach/platform.h
@@ -34,6 +34,7 @@ struct pci_sys_data;
34void ixp23xx_map_io(void); 34void ixp23xx_map_io(void);
35void ixp23xx_init_irq(void); 35void ixp23xx_init_irq(void);
36void ixp23xx_sys_init(void); 36void ixp23xx_sys_init(void);
37void ixp23xx_restart(char, const char *);
37int ixp23xx_pci_setup(int, struct pci_sys_data *); 38int ixp23xx_pci_setup(int, struct pci_sys_data *);
38void ixp23xx_pci_preinit(void); 39void ixp23xx_pci_preinit(void);
39struct pci_bus *ixp23xx_pci_scan_bus(int, struct pci_sys_data*); 40struct pci_bus *ixp23xx_pci_scan_bus(int, struct pci_sys_data*);
diff --git a/arch/arm/mach-ixp23xx/include/mach/system.h b/arch/arm/mach-ixp23xx/include/mach/system.h
index 8920ff2dff1f..277dda7334b9 100644
--- a/arch/arm/mach-ixp23xx/include/mach/system.h
+++ b/arch/arm/mach-ixp23xx/include/mach/system.h
@@ -7,10 +7,6 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10
11#include <mach/hardware.h>
12#include <asm/mach-types.h>
13
14static inline void arch_idle(void) 10static inline void arch_idle(void)
15{ 11{
16#if 0 12#if 0
@@ -18,16 +14,3 @@ static inline void arch_idle(void)
18 cpu_do_idle(); 14 cpu_do_idle();
19#endif 15#endif
20} 16}
21
22static inline void arch_reset(char mode, const char *cmd)
23{
24 /* First try machine specific support */
25 if (machine_is_ixdp2351()) {
26 *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_MAGIC;
27 (void) *IXDP2351_CPLD_RESET1_REG;
28 *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_ENABLE;
29 }
30
31 /* Use on-chip reset capability */
32 *IXP23XX_RESET0 |= IXP23XX_RST_ALL;
33}
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
index b3a57e0f3419..5d5dd3e8d069 100644
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -326,6 +326,17 @@ static void __init ixdp2351_init(void)
326 ixp23xx_sys_init(); 326 ixp23xx_sys_init();
327} 327}
328 328
329static void ixdp2351_restart(char mode, const char *cmd)
330{
331 /* First try machine specific support */
332
333 *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_MAGIC;
334 (void) *IXDP2351_CPLD_RESET1_REG;
335 *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_ENABLE;
336
337 ixp23xx_restart(mode, cmd);
338}
339
329MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform") 340MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform")
330 /* Maintainer: MontaVista Software, Inc. */ 341 /* Maintainer: MontaVista Software, Inc. */
331 .map_io = ixdp2351_map_io, 342 .map_io = ixdp2351_map_io,
@@ -333,4 +344,5 @@ MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform")
333 .timer = &ixp23xx_timer, 344 .timer = &ixp23xx_timer,
334 .atag_offset = 0x100, 345 .atag_offset = 0x100,
335 .init_machine = ixdp2351_init, 346 .init_machine = ixdp2351_init,
347 .restart = ixdp2351_restart,
336MACHINE_END 348MACHINE_END
diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c
index 8f4dcbba9025..377283fc658c 100644
--- a/arch/arm/mach-ixp23xx/roadrunner.c
+++ b/arch/arm/mach-ixp23xx/roadrunner.c
@@ -177,4 +177,5 @@ MACHINE_START(ROADRUNNER, "ADI Engineering RoadRunner Development Platform")
177 .timer = &ixp23xx_timer, 177 .timer = &ixp23xx_timer,
178 .atag_offset = 0x100, 178 .atag_offset = 0x100,
179 .init_machine = roadrunner_init, 179 .init_machine = roadrunner_init,
180 .restart = ixp23xx_restart,
180MACHINE_END 181MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/avila-setup.c b/arch/arm/mach-ixp4xx/avila-setup.c
index 37609a22c450..a7277ad470a5 100644
--- a/arch/arm/mach-ixp4xx/avila-setup.c
+++ b/arch/arm/mach-ixp4xx/avila-setup.c
@@ -172,6 +172,7 @@ MACHINE_START(AVILA, "Gateworks Avila Network Platform")
172#if defined(CONFIG_PCI) 172#if defined(CONFIG_PCI)
173 .dma_zone_size = SZ_64M, 173 .dma_zone_size = SZ_64M,
174#endif 174#endif
175 .restart = ixp4xx_restart,
175MACHINE_END 176MACHINE_END
176 177
177 /* 178 /*
@@ -190,6 +191,7 @@ MACHINE_START(LOFT, "Giant Shoulder Inc Loft board")
190#if defined(CONFIG_PCI) 191#if defined(CONFIG_PCI)
191 .dma_zone_size = SZ_64M, 192 .dma_zone_size = SZ_64M,
192#endif 193#endif
194 .restart = ixp4xx_restart,
193MACHINE_END 195MACHINE_END
194#endif 196#endif
195 197
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index b86a0055ab96..04aa12103bce 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -501,3 +501,23 @@ static void __init ixp4xx_clockevent_init(void)
501 501
502 clockevents_register_device(&clockevent_ixp4xx); 502 clockevents_register_device(&clockevent_ixp4xx);
503} 503}
504
505void ixp4xx_restart(char mode, const char *cmd)
506{
507 if ( 1 && mode == 's') {
508 /* Jump into ROM at address 0 */
509 soft_restart(0);
510 } else {
511 /* Use on-chip reset capability */
512
513 /* set the "key" register to enable access to
514 * "timer" and "enable" registers
515 */
516 *IXP4XX_OSWK = IXP4XX_WDT_KEY;
517
518 /* write 0 to the timer register for an immediate reset */
519 *IXP4XX_OSWT = 0;
520
521 *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE;
522 }
523}
diff --git a/arch/arm/mach-ixp4xx/coyote-setup.c b/arch/arm/mach-ixp4xx/coyote-setup.c
index 81dfec31842b..a74f86ce8bcc 100644
--- a/arch/arm/mach-ixp4xx/coyote-setup.c
+++ b/arch/arm/mach-ixp4xx/coyote-setup.c
@@ -117,6 +117,7 @@ MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote")
117#if defined(CONFIG_PCI) 117#if defined(CONFIG_PCI)
118 .dma_zone_size = SZ_64M, 118 .dma_zone_size = SZ_64M,
119#endif 119#endif
120 .restart = ixp4xx_restart,
120MACHINE_END 121MACHINE_END
121#endif 122#endif
122 123
@@ -132,6 +133,7 @@ MACHINE_START(IXDPG425, "Intel IXDPG425")
132 .timer = &ixp4xx_timer, 133 .timer = &ixp4xx_timer,
133 .atag_offset = 0x100, 134 .atag_offset = 0x100,
134 .init_machine = coyote_init, 135 .init_machine = coyote_init,
136 .restart = ixp4xx_restart,
135MACHINE_END 137MACHINE_END
136#endif 138#endif
137 139
diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c
index 8837fbca27ce..67be177b336a 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-setup.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c
@@ -286,4 +286,5 @@ MACHINE_START(DSMG600, "D-Link DSM-G600 RevA")
286#if defined(CONFIG_PCI) 286#if defined(CONFIG_PCI)
287 .dma_zone_size = SZ_64M, 287 .dma_zone_size = SZ_64M,
288#endif 288#endif
289 .restart = ixp4xx_restart,
289MACHINE_END 290MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c
index 2887c3578c17..6d5818285af8 100644
--- a/arch/arm/mach-ixp4xx/fsg-setup.c
+++ b/arch/arm/mach-ixp4xx/fsg-setup.c
@@ -277,5 +277,6 @@ MACHINE_START(FSG, "Freecom FSG-3")
277#if defined(CONFIG_PCI) 277#if defined(CONFIG_PCI)
278 .dma_zone_size = SZ_64M, 278 .dma_zone_size = SZ_64M,
279#endif 279#endif
280 .restart = ixp4xx_restart,
280MACHINE_END 281MACHINE_END
281 282
diff --git a/arch/arm/mach-ixp4xx/gateway7001-setup.c b/arch/arm/mach-ixp4xx/gateway7001-setup.c
index d69d1b053bb7..7ecf9b28f1c0 100644
--- a/arch/arm/mach-ixp4xx/gateway7001-setup.c
+++ b/arch/arm/mach-ixp4xx/gateway7001-setup.c
@@ -104,5 +104,6 @@ MACHINE_START(GATEWAY7001, "Gateway 7001 AP")
104#if defined(CONFIG_PCI) 104#if defined(CONFIG_PCI)
105 .dma_zone_size = SZ_64M, 105 .dma_zone_size = SZ_64M,
106#endif 106#endif
107 .restart = ixp4xx_restart,
107MACHINE_END 108MACHINE_END
108#endif 109#endif
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index bf6678d1a929..c0e3d69a8aec 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -504,4 +504,5 @@ MACHINE_START(GORAMO_MLR, "MultiLink")
504#if defined(CONFIG_PCI) 504#if defined(CONFIG_PCI)
505 .dma_zone_size = SZ_64M, 505 .dma_zone_size = SZ_64M,
506#endif 506#endif
507 .restart = ixp4xx_restart,
507MACHINE_END 508MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
index aa029fc19140..a23f89391458 100644
--- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c
+++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
@@ -172,6 +172,7 @@ MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)")
172#if defined(CONFIG_PCI) 172#if defined(CONFIG_PCI)
173 .dma_zone_size = SZ_64M, 173 .dma_zone_size = SZ_64M,
174#endif 174#endif
175 .restart = ixp4xx_restart,
175MACHINE_END 176MACHINE_END
176 177
177 178
diff --git a/arch/arm/mach-ixp4xx/include/mach/platform.h b/arch/arm/mach-ixp4xx/include/mach/platform.h
index e824c02c825a..df9250bbf13d 100644
--- a/arch/arm/mach-ixp4xx/include/mach/platform.h
+++ b/arch/arm/mach-ixp4xx/include/mach/platform.h
@@ -125,6 +125,7 @@ extern void ixp4xx_init_irq(void);
125extern void ixp4xx_sys_init(void); 125extern void ixp4xx_sys_init(void);
126extern void ixp4xx_timer_init(void); 126extern void ixp4xx_timer_init(void);
127extern struct sys_timer ixp4xx_timer; 127extern struct sys_timer ixp4xx_timer;
128extern void ixp4xx_restart(char, const char *);
128extern void ixp4xx_pci_preinit(void); 129extern void ixp4xx_pci_preinit(void);
129struct pci_sys_data; 130struct pci_sys_data;
130extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); 131extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
diff --git a/arch/arm/mach-ixp4xx/include/mach/system.h b/arch/arm/mach-ixp4xx/include/mach/system.h
index 24337d9d275b..140a9bef4466 100644
--- a/arch/arm/mach-ixp4xx/include/mach/system.h
+++ b/arch/arm/mach-ixp4xx/include/mach/system.h
@@ -8,9 +8,6 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 * 9 *
10 */ 10 */
11
12#include <mach/hardware.h>
13
14static inline void arch_idle(void) 11static inline void arch_idle(void)
15{ 12{
16 /* ixp4xx does not implement the XScale PWRMODE register, 13 /* ixp4xx does not implement the XScale PWRMODE register,
@@ -20,25 +17,3 @@ static inline void arch_idle(void)
20 cpu_do_idle(); 17 cpu_do_idle();
21#endif 18#endif
22} 19}
23
24
25static inline void arch_reset(char mode, const char *cmd)
26{
27 if ( 1 && mode == 's') {
28 /* Jump into ROM at address 0 */
29 soft_restart(0);
30 } else {
31 /* Use on-chip reset capability */
32
33 /* set the "key" register to enable access to
34 * "timer" and "enable" registers
35 */
36 *IXP4XX_OSWK = IXP4XX_WDT_KEY;
37
38 /* write 0 to the timer register for an immediate reset */
39 *IXP4XX_OSWT = 0;
40
41 *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE;
42 }
43}
44
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c
index f235f829dfa6..8a38b39999f8 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-setup.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c
@@ -261,6 +261,7 @@ MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
261#if defined(CONFIG_PCI) 261#if defined(CONFIG_PCI)
262 .dma_zone_size = SZ_64M, 262 .dma_zone_size = SZ_64M,
263#endif 263#endif
264 .restart = ixp4xx_restart,
264MACHINE_END 265MACHINE_END
265#endif 266#endif
266 267
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
index de716fa1aab6..1010eb7b0083 100644
--- a/arch/arm/mach-ixp4xx/nas100d-setup.c
+++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
@@ -321,4 +321,5 @@ MACHINE_START(NAS100D, "Iomega NAS 100d")
321#if defined(CONFIG_PCI) 321#if defined(CONFIG_PCI)
322 .dma_zone_size = SZ_64M, 322 .dma_zone_size = SZ_64M,
323#endif 323#endif
324 .restart = ixp4xx_restart,
324MACHINE_END 325MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
index ac81ccb26bfe..aa355c360d57 100644
--- a/arch/arm/mach-ixp4xx/nslu2-setup.c
+++ b/arch/arm/mach-ixp4xx/nslu2-setup.c
@@ -307,4 +307,5 @@ MACHINE_START(NSLU2, "Linksys NSLU2")
307#if defined(CONFIG_PCI) 307#if defined(CONFIG_PCI)
308 .dma_zone_size = SZ_64M, 308 .dma_zone_size = SZ_64M,
309#endif 309#endif
310 .restart = ixp4xx_restart,
310MACHINE_END 311MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/omixp-setup.c b/arch/arm/mach-ixp4xx/omixp-setup.c
index 3b6a81a696fc..0940869fcfdd 100644
--- a/arch/arm/mach-ixp4xx/omixp-setup.c
+++ b/arch/arm/mach-ixp4xx/omixp-setup.c
@@ -246,6 +246,7 @@ MACHINE_START(DEVIXP, "Omicron DEVIXP")
246 .init_irq = ixp4xx_init_irq, 246 .init_irq = ixp4xx_init_irq,
247 .timer = &ixp4xx_timer, 247 .timer = &ixp4xx_timer,
248 .init_machine = omixp_init, 248 .init_machine = omixp_init,
249 .restart = ixp4xx_restart,
249MACHINE_END 250MACHINE_END
250#endif 251#endif
251 252
@@ -259,6 +260,7 @@ MACHINE_START(MICCPT, "Omicron MICCPT")
259#if defined(CONFIG_PCI) 260#if defined(CONFIG_PCI)
260 .dma_zone_size = SZ_64M, 261 .dma_zone_size = SZ_64M,
261#endif 262#endif
263 .restart = ixp4xx_restart,
262MACHINE_END 264MACHINE_END
263#endif 265#endif
264 266
@@ -269,5 +271,6 @@ MACHINE_START(MIC256, "Omicron MIC256")
269 .init_irq = ixp4xx_init_irq, 271 .init_irq = ixp4xx_init_irq,
270 .timer = &ixp4xx_timer, 272 .timer = &ixp4xx_timer,
271 .init_machine = omixp_init, 273 .init_machine = omixp_init,
274 .restart = ixp4xx_restart,
272MACHINE_END 275MACHINE_END
273#endif 276#endif
diff --git a/arch/arm/mach-ixp4xx/vulcan-setup.c b/arch/arm/mach-ixp4xx/vulcan-setup.c
index 27e469ef4523..9dec20683291 100644
--- a/arch/arm/mach-ixp4xx/vulcan-setup.c
+++ b/arch/arm/mach-ixp4xx/vulcan-setup.c
@@ -244,4 +244,5 @@ MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")
244#if defined(CONFIG_PCI) 244#if defined(CONFIG_PCI)
245 .dma_zone_size = SZ_64M, 245 .dma_zone_size = SZ_64M,
246#endif 246#endif
247 .restart = ixp4xx_restart,
247MACHINE_END 248MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/wg302v2-setup.c b/arch/arm/mach-ixp4xx/wg302v2-setup.c
index b14144b967a7..5ac0f0a0fd8c 100644
--- a/arch/arm/mach-ixp4xx/wg302v2-setup.c
+++ b/arch/arm/mach-ixp4xx/wg302v2-setup.c
@@ -105,5 +105,6 @@ MACHINE_START(WG302V2, "Netgear WG302 v2 / WAG302 v2")
105#if defined(CONFIG_PCI) 105#if defined(CONFIG_PCI)
106 .dma_zone_size = SZ_64M, 106 .dma_zone_size = SZ_64M,
107#endif 107#endif
108 .restart = ixp4xx_restart,
108MACHINE_END 109MACHINE_END
109#endif 110#endif
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index f3248cfbe51d..0bff4a916231 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -534,3 +534,19 @@ static int __init kirkwood_clock_gate(void)
534 return 0; 534 return 0;
535} 535}
536late_initcall(kirkwood_clock_gate); 536late_initcall(kirkwood_clock_gate);
537
538void kirkwood_restart(char mode, const char *cmd)
539{
540 /*
541 * Enable soft reset to assert RSTOUTn.
542 */
543 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
544
545 /*
546 * Assert soft reset.
547 */
548 writel(SOFT_RESET, SYSTEM_SOFT_RESET);
549
550 while (1)
551 ;
552}
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index b9b0f0968a36..1529280246d6 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -50,6 +50,7 @@ void kirkwood_uart1_init(void);
50void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay); 50void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay);
51void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, int (*dev_ready)(struct mtd_info *)); 51void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, int (*dev_ready)(struct mtd_info *));
52void kirkwood_audio_init(void); 52void kirkwood_audio_init(void);
53void kirkwood_restart(char, const char *);
53 54
54extern int kirkwood_tclk; 55extern int kirkwood_tclk;
55extern struct sys_timer kirkwood_timer; 56extern struct sys_timer kirkwood_timer;
diff --git a/arch/arm/mach-kirkwood/d2net_v2-setup.c b/arch/arm/mach-kirkwood/d2net_v2-setup.c
index f457e07a65f0..6e1bac929ab5 100644
--- a/arch/arm/mach-kirkwood/d2net_v2-setup.c
+++ b/arch/arm/mach-kirkwood/d2net_v2-setup.c
@@ -227,4 +227,5 @@ MACHINE_START(D2NET_V2, "LaCie d2 Network v2")
227 .init_early = kirkwood_init_early, 227 .init_early = kirkwood_init_early,
228 .init_irq = kirkwood_init_irq, 228 .init_irq = kirkwood_init_irq,
229 .timer = &kirkwood_timer, 229 .timer = &kirkwood_timer,
230 .restart = kirkwood_restart,
230MACHINE_END 231MACHINE_END
diff --git a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
index ff4c21c1f923..d93359379598 100644
--- a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
+++ b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
@@ -103,4 +103,5 @@ MACHINE_START(DB88F6281_BP, "Marvell DB-88F6281-BP Development Board")
103 .init_early = kirkwood_init_early, 103 .init_early = kirkwood_init_early,
104 .init_irq = kirkwood_init_irq, 104 .init_irq = kirkwood_init_irq,
105 .timer = &kirkwood_timer, 105 .timer = &kirkwood_timer,
106 .restart = kirkwood_restart,
106MACHINE_END 107MACHINE_END
diff --git a/arch/arm/mach-kirkwood/dockstar-setup.c b/arch/arm/mach-kirkwood/dockstar-setup.c
index e4d199b2b1e8..61d9a552a054 100644
--- a/arch/arm/mach-kirkwood/dockstar-setup.c
+++ b/arch/arm/mach-kirkwood/dockstar-setup.c
@@ -108,4 +108,5 @@ MACHINE_START(DOCKSTAR, "Seagate FreeAgent DockStar")
108 .init_early = kirkwood_init_early, 108 .init_early = kirkwood_init_early,
109 .init_irq = kirkwood_init_irq, 109 .init_irq = kirkwood_init_irq,
110 .timer = &kirkwood_timer, 110 .timer = &kirkwood_timer,
111 .restart = kirkwood_restart,
111MACHINE_END 112MACHINE_END
diff --git a/arch/arm/mach-kirkwood/guruplug-setup.c b/arch/arm/mach-kirkwood/guruplug-setup.c
index 6c40f784b516..bdaed3867d13 100644
--- a/arch/arm/mach-kirkwood/guruplug-setup.c
+++ b/arch/arm/mach-kirkwood/guruplug-setup.c
@@ -127,4 +127,5 @@ MACHINE_START(GURUPLUG, "Marvell GuruPlug Reference Board")
127 .init_early = kirkwood_init_early, 127 .init_early = kirkwood_init_early,
128 .init_irq = kirkwood_init_irq, 128 .init_irq = kirkwood_init_irq,
129 .timer = &kirkwood_timer, 129 .timer = &kirkwood_timer,
130 .restart = kirkwood_restart,
130MACHINE_END 131MACHINE_END
diff --git a/arch/arm/mach-kirkwood/include/mach/system.h b/arch/arm/mach-kirkwood/include/mach/system.h
index 7568e95d279b..5fddde002b5e 100644
--- a/arch/arm/mach-kirkwood/include/mach/system.h
+++ b/arch/arm/mach-kirkwood/include/mach/system.h
@@ -9,28 +9,9 @@
9#ifndef __ASM_ARCH_SYSTEM_H 9#ifndef __ASM_ARCH_SYSTEM_H
10#define __ASM_ARCH_SYSTEM_H 10#define __ASM_ARCH_SYSTEM_H
11 11
12#include <mach/bridge-regs.h>
13
14static inline void arch_idle(void) 12static inline void arch_idle(void)
15{ 13{
16 cpu_do_idle(); 14 cpu_do_idle();
17} 15}
18 16
19static inline void arch_reset(char mode, const char *cmd)
20{
21 /*
22 * Enable soft reset to assert RSTOUTn.
23 */
24 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
25
26 /*
27 * Assert soft reset.
28 */
29 writel(SOFT_RESET, SYSTEM_SOFT_RESET);
30
31 while (1)
32 ;
33}
34
35
36#endif 17#endif
diff --git a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
index 9a1e917352f7..85f6169c2484 100644
--- a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
+++ b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
@@ -169,4 +169,5 @@ MACHINE_START(MV88F6281GTW_GE, "Marvell 88F6281 GTW GE Board")
169 .init_early = kirkwood_init_early, 169 .init_early = kirkwood_init_early,
170 .init_irq = kirkwood_init_irq, 170 .init_irq = kirkwood_init_irq,
171 .timer = &kirkwood_timer, 171 .timer = &kirkwood_timer,
172 .restart = kirkwood_restart,
172MACHINE_END 173MACHINE_END
diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c
index 8849bcc7328e..e6bba01bae38 100644
--- a/arch/arm/mach-kirkwood/netspace_v2-setup.c
+++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c
@@ -264,6 +264,7 @@ MACHINE_START(NETSPACE_V2, "LaCie Network Space v2")
264 .init_early = kirkwood_init_early, 264 .init_early = kirkwood_init_early,
265 .init_irq = kirkwood_init_irq, 265 .init_irq = kirkwood_init_irq,
266 .timer = &kirkwood_timer, 266 .timer = &kirkwood_timer,
267 .restart = kirkwood_restart,
267MACHINE_END 268MACHINE_END
268#endif 269#endif
269 270
@@ -275,6 +276,7 @@ MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2")
275 .init_early = kirkwood_init_early, 276 .init_early = kirkwood_init_early,
276 .init_irq = kirkwood_init_irq, 277 .init_irq = kirkwood_init_irq,
277 .timer = &kirkwood_timer, 278 .timer = &kirkwood_timer,
279 .restart = kirkwood_restart,
278MACHINE_END 280MACHINE_END
279#endif 281#endif
280 282
@@ -286,5 +288,6 @@ MACHINE_START(NETSPACE_MAX_V2, "LaCie Network Space Max v2")
286 .init_early = kirkwood_init_early, 288 .init_early = kirkwood_init_early,
287 .init_irq = kirkwood_init_irq, 289 .init_irq = kirkwood_init_irq,
288 .timer = &kirkwood_timer, 290 .timer = &kirkwood_timer,
291 .restart = kirkwood_restart,
289MACHINE_END 292MACHINE_END
290#endif 293#endif
diff --git a/arch/arm/mach-kirkwood/netxbig_v2-setup.c b/arch/arm/mach-kirkwood/netxbig_v2-setup.c
index 1ba12c4dff8f..31ae8de34e93 100644
--- a/arch/arm/mach-kirkwood/netxbig_v2-setup.c
+++ b/arch/arm/mach-kirkwood/netxbig_v2-setup.c
@@ -405,6 +405,7 @@ MACHINE_START(NET2BIG_V2, "LaCie 2Big Network v2")
405 .init_early = kirkwood_init_early, 405 .init_early = kirkwood_init_early,
406 .init_irq = kirkwood_init_irq, 406 .init_irq = kirkwood_init_irq,
407 .timer = &kirkwood_timer, 407 .timer = &kirkwood_timer,
408 .restart = kirkwood_restart,
408MACHINE_END 409MACHINE_END
409#endif 410#endif
410 411
@@ -416,5 +417,6 @@ MACHINE_START(NET5BIG_V2, "LaCie 5Big Network v2")
416 .init_early = kirkwood_init_early, 417 .init_early = kirkwood_init_early,
417 .init_irq = kirkwood_init_irq, 418 .init_irq = kirkwood_init_irq,
418 .timer = &kirkwood_timer, 419 .timer = &kirkwood_timer,
420 .restart = kirkwood_restart,
419MACHINE_END 421MACHINE_END
420#endif 422#endif
diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c
index 5660ca6c3d88..01f8c8992880 100644
--- a/arch/arm/mach-kirkwood/openrd-setup.c
+++ b/arch/arm/mach-kirkwood/openrd-setup.c
@@ -220,6 +220,7 @@ MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board")
220 .init_early = kirkwood_init_early, 220 .init_early = kirkwood_init_early,
221 .init_irq = kirkwood_init_irq, 221 .init_irq = kirkwood_init_irq,
222 .timer = &kirkwood_timer, 222 .timer = &kirkwood_timer,
223 .restart = kirkwood_restart,
223MACHINE_END 224MACHINE_END
224#endif 225#endif
225 226
@@ -232,6 +233,7 @@ MACHINE_START(OPENRD_CLIENT, "Marvell OpenRD Client Board")
232 .init_early = kirkwood_init_early, 233 .init_early = kirkwood_init_early,
233 .init_irq = kirkwood_init_irq, 234 .init_irq = kirkwood_init_irq,
234 .timer = &kirkwood_timer, 235 .timer = &kirkwood_timer,
236 .restart = kirkwood_restart,
235MACHINE_END 237MACHINE_END
236#endif 238#endif
237 239
@@ -244,5 +246,6 @@ MACHINE_START(OPENRD_ULTIMATE, "Marvell OpenRD Ultimate Board")
244 .init_early = kirkwood_init_early, 246 .init_early = kirkwood_init_early,
245 .init_irq = kirkwood_init_irq, 247 .init_irq = kirkwood_init_irq,
246 .timer = &kirkwood_timer, 248 .timer = &kirkwood_timer,
249 .restart = kirkwood_restart,
247MACHINE_END 250MACHINE_END
248#endif 251#endif
diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
index 6663869773ab..fd2c9c8b6831 100644
--- a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
@@ -85,4 +85,5 @@ MACHINE_START(RD88F6192_NAS, "Marvell RD-88F6192-NAS Development Board")
85 .init_early = kirkwood_init_early, 85 .init_early = kirkwood_init_early,
86 .init_irq = kirkwood_init_irq, 86 .init_irq = kirkwood_init_irq,
87 .timer = &kirkwood_timer, 87 .timer = &kirkwood_timer,
88 .restart = kirkwood_restart,
88MACHINE_END 89MACHINE_END
diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c
index 66b3c05e37a6..ef922079348b 100644
--- a/arch/arm/mach-kirkwood/rd88f6281-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c
@@ -121,4 +121,5 @@ MACHINE_START(RD88F6281, "Marvell RD-88F6281 Reference Board")
121 .init_early = kirkwood_init_early, 121 .init_early = kirkwood_init_early,
122 .init_irq = kirkwood_init_irq, 122 .init_irq = kirkwood_init_irq,
123 .timer = &kirkwood_timer, 123 .timer = &kirkwood_timer,
124 .restart = kirkwood_restart,
124MACHINE_END 125MACHINE_END
diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c
index 8b102d62e82c..85bff6b7699e 100644
--- a/arch/arm/mach-kirkwood/sheevaplug-setup.c
+++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c
@@ -144,6 +144,7 @@ MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board")
144 .init_early = kirkwood_init_early, 144 .init_early = kirkwood_init_early,
145 .init_irq = kirkwood_init_irq, 145 .init_irq = kirkwood_init_irq,
146 .timer = &kirkwood_timer, 146 .timer = &kirkwood_timer,
147 .restart = kirkwood_restart,
147MACHINE_END 148MACHINE_END
148#endif 149#endif
149 150
@@ -155,5 +156,6 @@ MACHINE_START(ESATA_SHEEVAPLUG, "Marvell eSATA SheevaPlug Reference Board")
155 .init_early = kirkwood_init_early, 156 .init_early = kirkwood_init_early,
156 .init_irq = kirkwood_init_irq, 157 .init_irq = kirkwood_init_irq,
157 .timer = &kirkwood_timer, 158 .timer = &kirkwood_timer,
159 .restart = kirkwood_restart,
158MACHINE_END 160MACHINE_END
159#endif 161#endif
diff --git a/arch/arm/mach-kirkwood/t5325-setup.c b/arch/arm/mach-kirkwood/t5325-setup.c
index ea104fb5ec3d..966b2b3bb813 100644
--- a/arch/arm/mach-kirkwood/t5325-setup.c
+++ b/arch/arm/mach-kirkwood/t5325-setup.c
@@ -207,4 +207,5 @@ MACHINE_START(T5325, "HP t5325 Thin Client")
207 .init_early = kirkwood_init_early, 207 .init_early = kirkwood_init_early,
208 .init_irq = kirkwood_init_irq, 208 .init_irq = kirkwood_init_irq,
209 .timer = &kirkwood_timer, 209 .timer = &kirkwood_timer,
210 .restart = kirkwood_restart,
210MACHINE_END 211MACHINE_END
diff --git a/arch/arm/mach-kirkwood/ts219-setup.c b/arch/arm/mach-kirkwood/ts219-setup.c
index 262c034836d4..73e2b6ca9564 100644
--- a/arch/arm/mach-kirkwood/ts219-setup.c
+++ b/arch/arm/mach-kirkwood/ts219-setup.c
@@ -138,4 +138,5 @@ MACHINE_START(TS219, "QNAP TS-119/TS-219")
138 .init_early = kirkwood_init_early, 138 .init_early = kirkwood_init_early,
139 .init_irq = kirkwood_init_irq, 139 .init_irq = kirkwood_init_irq,
140 .timer = &kirkwood_timer, 140 .timer = &kirkwood_timer,
141 .restart = kirkwood_restart,
141MACHINE_END 142MACHINE_END
diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c
index b68f5b4a9ec8..5bbca2680442 100644
--- a/arch/arm/mach-kirkwood/ts41x-setup.c
+++ b/arch/arm/mach-kirkwood/ts41x-setup.c
@@ -182,4 +182,5 @@ MACHINE_START(TS41X, "QNAP TS-41x")
182 .init_early = kirkwood_init_early, 182 .init_early = kirkwood_init_early,
183 .init_irq = kirkwood_init_irq, 183 .init_irq = kirkwood_init_irq,
184 .timer = &kirkwood_timer, 184 .timer = &kirkwood_timer,
185 .restart = kirkwood_restart,
185MACHINE_END 186MACHINE_END
diff --git a/arch/arm/mach-ks8695/board-acs5k.c b/arch/arm/mach-ks8695/board-acs5k.c
index a91f99d265aa..255502ddd879 100644
--- a/arch/arm/mach-ks8695/board-acs5k.c
+++ b/arch/arm/mach-ks8695/board-acs5k.c
@@ -228,4 +228,5 @@ MACHINE_START(ACS5K, "Brivo Systems LLC ACS-5000 Master board")
228 .init_irq = ks8695_init_irq, 228 .init_irq = ks8695_init_irq,
229 .init_machine = acs5k_init, 229 .init_machine = acs5k_init,
230 .timer = &ks8695_timer, 230 .timer = &ks8695_timer,
231 .restart = ks8695_restart,
231MACHINE_END 232MACHINE_END
diff --git a/arch/arm/mach-ks8695/board-dsm320.c b/arch/arm/mach-ks8695/board-dsm320.c
index d24bcef2e2dd..e0d36cef2c56 100644
--- a/arch/arm/mach-ks8695/board-dsm320.c
+++ b/arch/arm/mach-ks8695/board-dsm320.c
@@ -126,4 +126,5 @@ MACHINE_START(DSM320, "D-Link DSM-320 Wireless Media Player")
126 .init_irq = ks8695_init_irq, 126 .init_irq = ks8695_init_irq,
127 .init_machine = dsm320_init, 127 .init_machine = dsm320_init,
128 .timer = &ks8695_timer, 128 .timer = &ks8695_timer,
129 .restart = ks8695_restart,
129MACHINE_END 130MACHINE_END
diff --git a/arch/arm/mach-ks8695/board-micrel.c b/arch/arm/mach-ks8695/board-micrel.c
index 16c95657f8fd..a8270725b76d 100644
--- a/arch/arm/mach-ks8695/board-micrel.c
+++ b/arch/arm/mach-ks8695/board-micrel.c
@@ -58,4 +58,5 @@ MACHINE_START(KS8695, "KS8695 Centaur Development Board")
58 .init_irq = ks8695_init_irq, 58 .init_irq = ks8695_init_irq,
59 .init_machine = micrel_init, 59 .init_machine = micrel_init,
60 .timer = &ks8695_timer, 60 .timer = &ks8695_timer,
61 .restart = ks8695_restart,
61MACHINE_END 62MACHINE_END
diff --git a/arch/arm/mach-ks8695/generic.h b/arch/arm/mach-ks8695/generic.h
index 2fbfab8d5fae..f8bdb11a9c33 100644
--- a/arch/arm/mach-ks8695/generic.h
+++ b/arch/arm/mach-ks8695/generic.h
@@ -12,4 +12,5 @@
12 12
13extern __init void ks8695_map_io(void); 13extern __init void ks8695_map_io(void);
14extern __init void ks8695_init_irq(void); 14extern __init void ks8695_init_irq(void);
15extern void ks8695_restart(char, const char *);
15extern struct sys_timer ks8695_timer; 16extern struct sys_timer ks8695_timer;
diff --git a/arch/arm/mach-ks8695/include/mach/system.h b/arch/arm/mach-ks8695/include/mach/system.h
index ceb19c90aa52..59fe992395bf 100644
--- a/arch/arm/mach-ks8695/include/mach/system.h
+++ b/arch/arm/mach-ks8695/include/mach/system.h
@@ -14,9 +14,6 @@
14#ifndef __ASM_ARCH_SYSTEM_H 14#ifndef __ASM_ARCH_SYSTEM_H
15#define __ASM_ARCH_SYSTEM_H 15#define __ASM_ARCH_SYSTEM_H
16 16
17#include <linux/io.h>
18#include <mach/regs-timer.h>
19
20static void arch_idle(void) 17static void arch_idle(void)
21{ 18{
22 /* 19 /*
@@ -27,22 +24,4 @@ static void arch_idle(void)
27 24
28} 25}
29 26
30static void arch_reset(char mode, const char *cmd)
31{
32 unsigned int reg;
33
34 if (mode == 's')
35 soft_restart(0);
36
37 /* disable timer0 */
38 reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
39 __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
40
41 /* enable watchdog mode */
42 __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC);
43
44 /* re-enable timer0 */
45 __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
46}
47
48#endif 27#endif
diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c
index 69c072c2c0f9..37dfcd5bd2ad 100644
--- a/arch/arm/mach-ks8695/time.c
+++ b/arch/arm/mach-ks8695/time.c
@@ -109,3 +109,21 @@ struct sys_timer ks8695_timer = {
109 .offset = ks8695_gettimeoffset, 109 .offset = ks8695_gettimeoffset,
110 .resume = ks8695_timer_setup, 110 .resume = ks8695_timer_setup,
111}; 111};
112
113void ks8695_restart(char mode, const char *cmd)
114{
115 unsigned int reg;
116
117 if (mode == 's')
118 soft_restart(0);
119
120 /* disable timer0 */
121 reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
122 __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
123
124 /* enable watchdog mode */
125 __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC);
126
127 /* re-enable timer0 */
128 __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
129}
diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c
index 205b2dbb565b..369b152896cd 100644
--- a/arch/arm/mach-lpc32xx/common.c
+++ b/arch/arm/mach-lpc32xx/common.c
@@ -164,7 +164,7 @@ int clk_is_sysclk_mainosc(void)
164/* 164/*
165 * System reset via the watchdog timer 165 * System reset via the watchdog timer
166 */ 166 */
167void lpc32xx_watchdog_reset(void) 167static void lpc32xx_watchdog_reset(void)
168{ 168{
169 /* Make sure WDT clocks are enabled */ 169 /* Make sure WDT clocks are enabled */
170 __raw_writel(LPC32XX_CLKPWR_PWMCLK_WDOG_EN, 170 __raw_writel(LPC32XX_CLKPWR_PWMCLK_WDOG_EN,
@@ -311,3 +311,21 @@ void __init lpc32xx_map_io(void)
311{ 311{
312 iotable_init(lpc32xx_io_desc, ARRAY_SIZE(lpc32xx_io_desc)); 312 iotable_init(lpc32xx_io_desc, ARRAY_SIZE(lpc32xx_io_desc));
313} 313}
314
315void lpc23xx_restart(char mode, const char *cmd)
316{
317 switch (mode) {
318 case 's':
319 case 'h':
320 lpc32xx_watchdog_reset();
321 break;
322
323 default:
324 /* Do nothing */
325 break;
326 }
327
328 /* Wait for watchdog to reset system */
329 while (1)
330 ;
331}
diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h
index 5583f52662bd..4b4e700343c1 100644
--- a/arch/arm/mach-lpc32xx/common.h
+++ b/arch/arm/mach-lpc32xx/common.h
@@ -39,6 +39,8 @@ extern void __init lpc32xx_init_irq(void);
39extern void __init lpc32xx_map_io(void); 39extern void __init lpc32xx_map_io(void);
40extern void __init lpc32xx_serial_init(void); 40extern void __init lpc32xx_serial_init(void);
41extern void __init lpc32xx_gpio_init(void); 41extern void __init lpc32xx_gpio_init(void);
42extern void lpc23xx_restart(char, const char *);
43
42 44
43/* 45/*
44 * Structure used for setting up and querying the PLLS 46 * Structure used for setting up and querying the PLLS
diff --git a/arch/arm/mach-lpc32xx/include/mach/system.h b/arch/arm/mach-lpc32xx/include/mach/system.h
index d47f3b1c24b8..bf176c991520 100644
--- a/arch/arm/mach-lpc32xx/include/mach/system.h
+++ b/arch/arm/mach-lpc32xx/include/mach/system.h
@@ -24,26 +24,4 @@ static void arch_idle(void)
24 cpu_do_idle(); 24 cpu_do_idle();
25} 25}
26 26
27static inline void arch_reset(char mode, const char *cmd)
28{
29 extern void lpc32xx_watchdog_reset(void);
30
31 switch (mode) {
32 case 's':
33 case 'h':
34 printk(KERN_CRIT "RESET: Rebooting system\n");
35
36 lpc32xx_watchdog_reset();
37 break;
38
39 default:
40 /* Do nothing */
41 break;
42 }
43
44 /* Wait for watchdog to reset system */
45 while (1)
46 ;
47}
48
49#endif 27#endif
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index 6d2f0d1b9373..ecb94114c81b 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -388,4 +388,5 @@ MACHINE_START(PHY3250, "Phytec 3250 board with the LPC3250 Microcontroller")
388 .init_irq = lpc32xx_init_irq, 388 .init_irq = lpc32xx_init_irq,
389 .timer = &lpc32xx_timer, 389 .timer = &lpc32xx_timer,
390 .init_machine = phy3250_board_init, 390 .init_machine = phy3250_board_init,
391 .restart = lpc23xx_restart,
391MACHINE_END 392MACHINE_END
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 7a60bbbce7a4..3e6dfab59ef6 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -243,6 +243,7 @@ MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
243 .init_irq = pxa168_init_irq, 243 .init_irq = pxa168_init_irq,
244 .timer = &pxa168_timer, 244 .timer = &pxa168_timer,
245 .init_machine = common_init, 245 .init_machine = common_init,
246 .restart = pxa168_restart,
246MACHINE_END 247MACHINE_END
247 248
248MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform") 249MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
@@ -251,4 +252,5 @@ MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
251 .init_irq = pxa168_init_irq, 252 .init_irq = pxa168_init_irq,
252 .timer = &pxa168_timer, 253 .timer = &pxa168_timer,
253 .init_machine = common_init, 254 .init_machine = common_init,
255 .restart = pxa168_restart,
254MACHINE_END 256MACHINE_END
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
index 39f0878d64a0..8de3dc6131a4 100644
--- a/arch/arm/mach-mmp/avengers_lite.c
+++ b/arch/arm/mach-mmp/avengers_lite.c
@@ -45,4 +45,5 @@ MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
45 .init_irq = pxa168_init_irq, 45 .init_irq = pxa168_init_irq,
46 .timer = &pxa168_timer, 46 .timer = &pxa168_timer,
47 .init_machine = avengers_lite_init, 47 .init_machine = avengers_lite_init,
48 .restart = pxa168_restart,
48MACHINE_END 49MACHINE_END
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
index 983cfb15fbde..e16f04b39b15 100644
--- a/arch/arm/mach-mmp/brownstone.c
+++ b/arch/arm/mach-mmp/brownstone.c
@@ -219,4 +219,5 @@ MACHINE_START(BROWNSTONE, "Brownstone Development Platform")
219 .init_irq = mmp2_init_irq, 219 .init_irq = mmp2_init_irq,
220 .timer = &mmp2_timer, 220 .timer = &mmp2_timer,
221 .init_machine = brownstone_init, 221 .init_machine = brownstone_init,
222 .restart = mmp_restart,
222MACHINE_END 223MACHINE_END
diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c
index 5720674739f0..062b5b93c50e 100644
--- a/arch/arm/mach-mmp/common.c
+++ b/arch/arm/mach-mmp/common.c
@@ -45,3 +45,8 @@ void __init mmp_map_io(void)
45 /* this is early, initialize mmp_chip_id here */ 45 /* this is early, initialize mmp_chip_id here */
46 mmp_chip_id = __raw_readl(MMP_CHIPID); 46 mmp_chip_id = __raw_readl(MMP_CHIPID);
47} 47}
48
49void mmp_restart(char mode, const char *cmd)
50{
51 soft_restart(0);
52}
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h
index ec8d65ded25c..1c9d6c1ea97a 100644
--- a/arch/arm/mach-mmp/common.h
+++ b/arch/arm/mach-mmp/common.h
@@ -6,3 +6,4 @@ extern void timer_init(int irq);
6 6
7extern void __init icu_init_irq(void); 7extern void __init icu_init_irq(void);
8extern void __init mmp_map_io(void); 8extern void __init mmp_map_io(void);
9extern void mmp_restart(char, const char *);
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index c4fd806b15b4..5a6a27a6cfd0 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -121,4 +121,5 @@ MACHINE_START(FLINT, "Flint Development Platform")
121 .init_irq = mmp2_init_irq, 121 .init_irq = mmp2_init_irq,
122 .timer = &mmp2_timer, 122 .timer = &mmp2_timer,
123 .init_machine = flint_init, 123 .init_machine = flint_init,
124 .restart = mmp_restart,
124MACHINE_END 125MACHINE_END
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 4665767a4f79..1e3abbe37cac 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -194,4 +194,5 @@ MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
194 .init_irq = pxa168_init_irq, 194 .init_irq = pxa168_init_irq,
195 .timer = &pxa168_timer, 195 .timer = &pxa168_timer,
196 .init_machine = gplugd_init, 196 .init_machine = gplugd_init,
197 .restart = pxa168_restart,
197MACHINE_END 198MACHINE_END
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index 7fb568d2845b..a677aa732c26 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -5,6 +5,7 @@ struct sys_timer;
5 5
6extern struct sys_timer pxa168_timer; 6extern struct sys_timer pxa168_timer;
7extern void __init pxa168_init_irq(void); 7extern void __init pxa168_init_irq(void);
8extern void pxa168_restart(char, const char *);
8extern void pxa168_clear_keypad_wakeup(void); 9extern void pxa168_clear_keypad_wakeup(void);
9 10
10#include <linux/i2c.h> 11#include <linux/i2c.h>
diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h
index cb0637933a85..1d001eab81e1 100644
--- a/arch/arm/mach-mmp/include/mach/system.h
+++ b/arch/arm/mach-mmp/include/mach/system.h
@@ -9,18 +9,8 @@
9#ifndef __ASM_MACH_SYSTEM_H 9#ifndef __ASM_MACH_SYSTEM_H
10#define __ASM_MACH_SYSTEM_H 10#define __ASM_MACH_SYSTEM_H
11 11
12#include <mach/cputype.h>
13
14static inline void arch_idle(void) 12static inline void arch_idle(void)
15{ 13{
16 cpu_do_idle(); 14 cpu_do_idle();
17} 15}
18
19static inline void arch_reset(char mode, const char *cmd)
20{
21 if (cpu_is_pxa168())
22 soft_restart(0xffff0000);
23 else
24 soft_restart(0);
25}
26#endif /* __ASM_MACH_SYSTEM_H */ 16#endif /* __ASM_MACH_SYSTEM_H */
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
index 8bfac6612623..96cf5c8fe47d 100644
--- a/arch/arm/mach-mmp/jasper.c
+++ b/arch/arm/mach-mmp/jasper.c
@@ -175,4 +175,5 @@ MACHINE_START(MARVELL_JASPER, "Jasper Development Platform")
175 .init_irq = mmp2_init_irq, 175 .init_irq = mmp2_init_irq,
176 .timer = &mmp2_timer, 176 .timer = &mmp2_timer,
177 .init_machine = jasper_init, 177 .init_machine = jasper_init,
178 .restart = mmp_restart,
178MACHINE_END 179MACHINE_END
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 76ca15c00e45..13f23867a86a 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -214,3 +214,8 @@ int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata)
214 pxa168_device_usb_host.dev.platform_data = pdata; 214 pxa168_device_usb_host.dev.platform_data = pdata;
215 return platform_device_register(&pxa168_device_usb_host); 215 return platform_device_register(&pxa168_device_usb_host);
216} 216}
217
218void pxa168_restart(char mode, const char *cmd)
219{
220 soft_restart(0xffff0000);
221}
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index eb5be879fd8c..257a21283ec1 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -103,4 +103,5 @@ MACHINE_START(TAVOREVB, "PXA910 Evaluation Board (aka TavorEVB)")
103 .init_irq = pxa910_init_irq, 103 .init_irq = pxa910_init_irq,
104 .timer = &pxa910_timer, 104 .timer = &pxa910_timer,
105 .init_machine = tavorevb_init, 105 .init_machine = tavorevb_init,
106 .restart = mmp_restart,
106MACHINE_END 107MACHINE_END
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c
index bbe4727b96cc..8ac22a62bf1a 100644
--- a/arch/arm/mach-mmp/teton_bga.c
+++ b/arch/arm/mach-mmp/teton_bga.c
@@ -86,4 +86,5 @@ MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform")
86 .init_irq = pxa168_init_irq, 86 .init_irq = pxa168_init_irq,
87 .timer = &pxa168_timer, 87 .timer = &pxa168_timer,
88 .init_machine = teton_bga_init, 88 .init_machine = teton_bga_init,
89 .restart = pxa168_restart,
89MACHINE_END 90MACHINE_END
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index 176515a76989..f02658825576 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -159,4 +159,5 @@ MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform")
159 .init_irq = pxa910_init_irq, 159 .init_irq = pxa910_init_irq,
160 .timer = &pxa910_timer, 160 .timer = &pxa910_timer,
161 .init_machine = ttc_dkb_init, 161 .init_machine = ttc_dkb_init,
162 .restart = mmp_restart,
162MACHINE_END 163MACHINE_END
diff --git a/arch/arm/mach-msm/include/mach/system.h b/arch/arm/mach-msm/include/mach/system.h
index d2e83f42ba16..311db2b35da0 100644
--- a/arch/arm/mach-msm/include/mach/system.h
+++ b/arch/arm/mach-msm/include/mach/system.h
@@ -12,16 +12,8 @@
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 * 13 *
14 */ 14 */
15
16#include <mach/hardware.h>
17
18void arch_idle(void); 15void arch_idle(void);
19 16
20static inline void arch_reset(char mode, const char *cmd)
21{
22 for (;;) ; /* depends on IPC w/ other core */
23}
24
25/* low level hardware reset hook -- for example, hitting the 17/* low level hardware reset hook -- for example, hitting the
26 * PSHOLD line on the PMIC to hard reset the system 18 * PSHOLD line on the PMIC to hard reset the system
27 */ 19 */
diff --git a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
index 0e94268d6e6f..ee74ec97c141 100644
--- a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
+++ b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
@@ -151,4 +151,5 @@ MACHINE_START(TERASTATION_WXL, "Buffalo Nas WXL")
151 .init_early = mv78xx0_init_early, 151 .init_early = mv78xx0_init_early,
152 .init_irq = mv78xx0_init_irq, 152 .init_irq = mv78xx0_init_irq,
153 .timer = &mv78xx0_timer, 153 .timer = &mv78xx0_timer,
154 .restart = mv78xx0_restart,
154MACHINE_END 155MACHINE_END
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 23d3980ef59d..5b9632b01169 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -401,3 +401,19 @@ void __init mv78xx0_init(void)
401 feroceon_l2_init(is_l2_writethrough()); 401 feroceon_l2_init(is_l2_writethrough());
402#endif 402#endif
403} 403}
404
405void mv78xx0_restart(char mode, const char *cmd)
406{
407 /*
408 * Enable soft reset to assert RSTOUTn.
409 */
410 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
411
412 /*
413 * Assert soft reset.
414 */
415 writel(SOFT_RESET, SYSTEM_SOFT_RESET);
416
417 while (1)
418 ;
419}
diff --git a/arch/arm/mach-mv78xx0/common.h b/arch/arm/mach-mv78xx0/common.h
index 632e63d65e7a..07d5f8f6be7d 100644
--- a/arch/arm/mach-mv78xx0/common.h
+++ b/arch/arm/mach-mv78xx0/common.h
@@ -46,6 +46,7 @@ void mv78xx0_uart1_init(void);
46void mv78xx0_uart2_init(void); 46void mv78xx0_uart2_init(void);
47void mv78xx0_uart3_init(void); 47void mv78xx0_uart3_init(void);
48void mv78xx0_i2c_init(void); 48void mv78xx0_i2c_init(void);
49void mv78xx0_restart(char, const char *);
49 50
50extern struct sys_timer mv78xx0_timer; 51extern struct sys_timer mv78xx0_timer;
51 52
diff --git a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
index 50b85ae2da52..4d6d48bf51ef 100644
--- a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
+++ b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
@@ -99,4 +99,5 @@ MACHINE_START(DB78X00_BP, "Marvell DB-78x00-BP Development Board")
99 .init_early = mv78xx0_init_early, 99 .init_early = mv78xx0_init_early,
100 .init_irq = mv78xx0_init_irq, 100 .init_irq = mv78xx0_init_irq,
101 .timer = &mv78xx0_timer, 101 .timer = &mv78xx0_timer,
102 .restart = mv78xx0_restart,
102MACHINE_END 103MACHINE_END
diff --git a/arch/arm/mach-mv78xx0/include/mach/system.h b/arch/arm/mach-mv78xx0/include/mach/system.h
index 66e7ce4e90bd..8c3a5387cec7 100644
--- a/arch/arm/mach-mv78xx0/include/mach/system.h
+++ b/arch/arm/mach-mv78xx0/include/mach/system.h
@@ -9,28 +9,9 @@
9#ifndef __ASM_ARCH_SYSTEM_H 9#ifndef __ASM_ARCH_SYSTEM_H
10#define __ASM_ARCH_SYSTEM_H 10#define __ASM_ARCH_SYSTEM_H
11 11
12#include <mach/bridge-regs.h>
13
14static inline void arch_idle(void) 12static inline void arch_idle(void)
15{ 13{
16 cpu_do_idle(); 14 cpu_do_idle();
17} 15}
18 16
19static inline void arch_reset(char mode, const char *cmd)
20{
21 /*
22 * Enable soft reset to assert RSTOUTn.
23 */
24 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
25
26 /*
27 * Assert soft reset.
28 */
29 writel(SOFT_RESET, SYSTEM_SOFT_RESET);
30
31 while (1)
32 ;
33}
34
35
36#endif 17#endif
diff --git a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
index e85222e53578..9a882706e138 100644
--- a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
+++ b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
@@ -84,4 +84,5 @@ MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board")
84 .init_early = mv78xx0_init_early, 84 .init_early = mv78xx0_init_early,
85 .init_irq = mv78xx0_init_irq, 85 .init_irq = mv78xx0_init_irq,
86 .timer = &mv78xx0_timer, 86 .timer = &mv78xx0_timer,
87 .restart = mv78xx0_restart,
87MACHINE_END 88MACHINE_END
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c
index 1fc110348040..944025da8333 100644
--- a/arch/arm/mach-mx5/board-cpuimx51.c
+++ b/arch/arm/mach-mx5/board-cpuimx51.c
@@ -297,4 +297,5 @@ MACHINE_START(EUKREA_CPUIMX51, "Eukrea CPUIMX51 Module")
297 .handle_irq = imx51_handle_irq, 297 .handle_irq = imx51_handle_irq,
298 .timer = &mxc_timer, 298 .timer = &mxc_timer,
299 .init_machine = eukrea_cpuimx51_init, 299 .init_machine = eukrea_cpuimx51_init,
300 .restart = mxc_restart,
300MACHINE_END 301MACHINE_END
diff --git a/arch/arm/mach-mx5/board-cpuimx51sd.c b/arch/arm/mach-mx5/board-cpuimx51sd.c
index 52a11c1898e6..9fbe923c8b08 100644
--- a/arch/arm/mach-mx5/board-cpuimx51sd.c
+++ b/arch/arm/mach-mx5/board-cpuimx51sd.c
@@ -335,4 +335,5 @@ MACHINE_START(EUKREA_CPUIMX51SD, "Eukrea CPUIMX51SD")
335 .handle_irq = imx51_handle_irq, 335 .handle_irq = imx51_handle_irq,
336 .timer = &mxc_timer, 336 .timer = &mxc_timer,
337 .init_machine = eukrea_cpuimx51sd_init, 337 .init_machine = eukrea_cpuimx51sd_init,
338 .restart = mxc_restart,
338MACHINE_END 339MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx50_rdp.c b/arch/arm/mach-mx5/board-mx50_rdp.c
index fc3621d90bde..42b66e8d9615 100644
--- a/arch/arm/mach-mx5/board-mx50_rdp.c
+++ b/arch/arm/mach-mx5/board-mx50_rdp.c
@@ -222,4 +222,5 @@ MACHINE_START(MX50_RDP, "Freescale MX50 Reference Design Platform")
222 .handle_irq = imx50_handle_irq, 222 .handle_irq = imx50_handle_irq,
223 .timer = &mx50_rdp_timer, 223 .timer = &mx50_rdp_timer,
224 .init_machine = mx50_rdp_board_init, 224 .init_machine = mx50_rdp_board_init,
225 .restart = mxc_restart,
225MACHINE_END 226MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c
index 05783906db2b..83eab4176ca4 100644
--- a/arch/arm/mach-mx5/board-mx51_3ds.c
+++ b/arch/arm/mach-mx5/board-mx51_3ds.c
@@ -175,4 +175,5 @@ MACHINE_START(MX51_3DS, "Freescale MX51 3-Stack Board")
175 .handle_irq = imx51_handle_irq, 175 .handle_irq = imx51_handle_irq,
176 .timer = &mx51_3ds_timer, 176 .timer = &mx51_3ds_timer,
177 .init_machine = mx51_3ds_init, 177 .init_machine = mx51_3ds_init,
178 .restart = mxc_restart,
178MACHINE_END 179MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index 5c837603ff0f..e4b822e9f719 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -362,7 +362,7 @@ static void __init mx51_babbage_init(void)
362{ 362{
363 iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP; 363 iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP;
364 iomux_v3_cfg_t power_key = NEW_PAD_CTRL(MX51_PAD_EIM_A27__GPIO2_21, 364 iomux_v3_cfg_t power_key = NEW_PAD_CTRL(MX51_PAD_EIM_A27__GPIO2_21,
365 PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP); 365 PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH);
366 366
367 imx51_soc_init(); 367 imx51_soc_init();
368 368
@@ -426,4 +426,5 @@ MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board")
426 .handle_irq = imx51_handle_irq, 426 .handle_irq = imx51_handle_irq,
427 .timer = &mx51_babbage_timer, 427 .timer = &mx51_babbage_timer,
428 .init_machine = mx51_babbage_init, 428 .init_machine = mx51_babbage_init,
429 .restart = mxc_restart,
429MACHINE_END 430MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c
index a9e48662cf75..3a5ed2dd885a 100644
--- a/arch/arm/mach-mx5/board-mx51_efikamx.c
+++ b/arch/arm/mach-mx5/board-mx51_efikamx.c
@@ -182,7 +182,7 @@ static const struct gpio_keys_platform_data mx51_efikamx_powerkey_data __initcon
182 .nbuttons = ARRAY_SIZE(mx51_efikamx_powerkey), 182 .nbuttons = ARRAY_SIZE(mx51_efikamx_powerkey),
183}; 183};
184 184
185void mx51_efikamx_reset(void) 185static void mx51_efikamx_restart(char mode, const char *cmd)
186{ 186{
187 if (system_rev == 0x11) 187 if (system_rev == 0x11)
188 gpio_direction_output(EFIKAMX_RESET1_1, 0); 188 gpio_direction_output(EFIKAMX_RESET1_1, 0);
@@ -292,4 +292,5 @@ MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop")
292 .handle_irq = imx51_handle_irq, 292 .handle_irq = imx51_handle_irq,
293 .timer = &mx51_efikamx_timer, 293 .timer = &mx51_efikamx_timer,
294 .init_machine = mx51_efikamx_init, 294 .init_machine = mx51_efikamx_init,
295 .restart = mx51_efikamx_restart,
295MACHINE_END 296MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-mx5/board-mx51_efikasb.c
index 38c4a3e28d3c..ea5f65b0381a 100644
--- a/arch/arm/mach-mx5/board-mx51_efikasb.c
+++ b/arch/arm/mach-mx5/board-mx51_efikasb.c
@@ -287,4 +287,5 @@ MACHINE_START(MX51_EFIKASB, "Genesi Efika Smartbook")
287 .handle_irq = imx51_handle_irq, 287 .handle_irq = imx51_handle_irq,
288 .init_machine = efikasb_board_init, 288 .init_machine = efikasb_board_init,
289 .timer = &mx51_efikasb_timer, 289 .timer = &mx51_efikasb_timer,
290 .restart = mxc_restart,
290MACHINE_END 291MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c
index 0d7f0fffb23a..5f224f1c3eb6 100644
--- a/arch/arm/mach-mx5/board-mx53_ard.c
+++ b/arch/arm/mach-mx5/board-mx53_ard.c
@@ -257,4 +257,5 @@ MACHINE_START(MX53_ARD, "Freescale MX53 ARD Board")
257 .handle_irq = imx53_handle_irq, 257 .handle_irq = imx53_handle_irq,
258 .timer = &mx53_ard_timer, 258 .timer = &mx53_ard_timer,
259 .init_machine = mx53_ard_board_init, 259 .init_machine = mx53_ard_board_init,
260 .restart = mxc_restart,
260MACHINE_END 261MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c
index 6bea31ab8f85..d6ce137896d6 100644
--- a/arch/arm/mach-mx5/board-mx53_evk.c
+++ b/arch/arm/mach-mx5/board-mx53_evk.c
@@ -106,7 +106,7 @@ static inline void mx53_evk_fec_reset(void)
106 gpio_set_value(MX53_EVK_FEC_PHY_RST, 1); 106 gpio_set_value(MX53_EVK_FEC_PHY_RST, 1);
107} 107}
108 108
109static struct fec_platform_data mx53_evk_fec_pdata = { 109static const struct fec_platform_data mx53_evk_fec_pdata __initconst = {
110 .phy = PHY_INTERFACE_MODE_RMII, 110 .phy = PHY_INTERFACE_MODE_RMII,
111}; 111};
112 112
@@ -175,4 +175,5 @@ MACHINE_START(MX53_EVK, "Freescale MX53 EVK Board")
175 .handle_irq = imx53_handle_irq, 175 .handle_irq = imx53_handle_irq,
176 .timer = &mx53_evk_timer, 176 .timer = &mx53_evk_timer,
177 .init_machine = mx53_evk_board_init, 177 .init_machine = mx53_evk_board_init,
178 .restart = mxc_restart,
178MACHINE_END 179MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c
index 7678f7734db6..fd8b524e1c58 100644
--- a/arch/arm/mach-mx5/board-mx53_loco.c
+++ b/arch/arm/mach-mx5/board-mx53_loco.c
@@ -242,7 +242,7 @@ static inline void mx53_loco_fec_reset(void)
242 gpio_set_value(LOCO_FEC_PHY_RST, 1); 242 gpio_set_value(LOCO_FEC_PHY_RST, 1);
243} 243}
244 244
245static struct fec_platform_data mx53_loco_fec_data = { 245static const struct fec_platform_data mx53_loco_fec_data __initconst = {
246 .phy = PHY_INTERFACE_MODE_RMII, 246 .phy = PHY_INTERFACE_MODE_RMII,
247}; 247};
248 248
@@ -317,4 +317,5 @@ MACHINE_START(MX53_LOCO, "Freescale MX53 LOCO Board")
317 .handle_irq = imx53_handle_irq, 317 .handle_irq = imx53_handle_irq,
318 .timer = &mx53_loco_timer, 318 .timer = &mx53_loco_timer,
319 .init_machine = mx53_loco_board_init, 319 .init_machine = mx53_loco_board_init,
320 .restart = mxc_restart,
320MACHINE_END 321MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c
index 59c0845eb4a6..22c53c9b18aa 100644
--- a/arch/arm/mach-mx5/board-mx53_smd.c
+++ b/arch/arm/mach-mx5/board-mx53_smd.c
@@ -104,7 +104,7 @@ static inline void mx53_smd_fec_reset(void)
104 gpio_set_value(SMD_FEC_PHY_RST, 1); 104 gpio_set_value(SMD_FEC_PHY_RST, 1);
105} 105}
106 106
107static struct fec_platform_data mx53_smd_fec_data = { 107static const struct fec_platform_data mx53_smd_fec_data __initconst = {
108 .phy = PHY_INTERFACE_MODE_RMII, 108 .phy = PHY_INTERFACE_MODE_RMII,
109}; 109};
110 110
@@ -164,4 +164,5 @@ MACHINE_START(MX53_SMD, "Freescale MX53 SMD Board")
164 .handle_irq = imx53_handle_irq, 164 .handle_irq = imx53_handle_irq,
165 .timer = &mx53_smd_timer, 165 .timer = &mx53_smd_timer,
166 .init_machine = mx53_smd_board_init, 166 .init_machine = mx53_smd_board_init,
167 .restart = mxc_restart,
167MACHINE_END 168MACHINE_END
diff --git a/arch/arm/mach-mx5/imx51-dt.c b/arch/arm/mach-mx5/imx51-dt.c
index 596edd967dbf..e6bad17b908c 100644
--- a/arch/arm/mach-mx5/imx51-dt.c
+++ b/arch/arm/mach-mx5/imx51-dt.c
@@ -115,4 +115,5 @@ DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
115 .timer = &imx51_timer, 115 .timer = &imx51_timer,
116 .init_machine = imx51_dt_init, 116 .init_machine = imx51_dt_init,
117 .dt_compat = imx51_dt_board_compat, 117 .dt_compat = imx51_dt_board_compat,
118 .restart = mxc_restart,
118MACHINE_END 119MACHINE_END
diff --git a/arch/arm/mach-mx5/imx53-dt.c b/arch/arm/mach-mx5/imx53-dt.c
index 85bfd5ff21b0..05ebb3e68679 100644
--- a/arch/arm/mach-mx5/imx53-dt.c
+++ b/arch/arm/mach-mx5/imx53-dt.c
@@ -125,4 +125,5 @@ DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)")
125 .timer = &imx53_timer, 125 .timer = &imx53_timer,
126 .init_machine = imx53_dt_init, 126 .init_machine = imx53_dt_init,
127 .dt_compat = imx53_dt_board_compat, 127 .dt_compat = imx53_dt_board_compat,
128 .restart = mxc_restart,
128MACHINE_END 129MACHINE_END
diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h
index 635bb5d9a20a..1388485414c9 100644
--- a/arch/arm/mach-mxs/include/mach/common.h
+++ b/arch/arm/mach-mxs/include/mach/common.h
@@ -16,6 +16,7 @@ struct clk;
16extern const u32 *mxs_get_ocotp(void); 16extern const u32 *mxs_get_ocotp(void);
17extern int mxs_reset_block(void __iomem *); 17extern int mxs_reset_block(void __iomem *);
18extern void mxs_timer_init(struct clk *, int); 18extern void mxs_timer_init(struct clk *, int);
19extern void mxs_restart(char, const char *);
19 20
20extern int mx23_register_gpios(void); 21extern int mx23_register_gpios(void);
21extern int mx23_clocks_init(void); 22extern int mx23_clocks_init(void);
diff --git a/arch/arm/mach-mxs/include/mach/system.h b/arch/arm/mach-mxs/include/mach/system.h
index 0e428239b433..e7ad1bb29423 100644
--- a/arch/arm/mach-mxs/include/mach/system.h
+++ b/arch/arm/mach-mxs/include/mach/system.h
@@ -22,6 +22,4 @@ static inline void arch_idle(void)
22 cpu_do_idle(); 22 cpu_do_idle();
23} 23}
24 24
25void arch_reset(char mode, const char *cmd);
26
27#endif /* __MACH_MXS_SYSTEM_H__ */ 25#endif /* __MACH_MXS_SYSTEM_H__ */
diff --git a/arch/arm/mach-mxs/mach-m28evk.c b/arch/arm/mach-mxs/mach-m28evk.c
index 6b00577b7025..2f2758230edf 100644
--- a/arch/arm/mach-mxs/mach-m28evk.c
+++ b/arch/arm/mach-mxs/mach-m28evk.c
@@ -363,4 +363,5 @@ MACHINE_START(M28EVK, "DENX M28 EVK")
363 .init_irq = mx28_init_irq, 363 .init_irq = mx28_init_irq,
364 .timer = &m28evk_timer, 364 .timer = &m28evk_timer,
365 .init_machine = m28evk_init, 365 .init_machine = m28evk_init,
366 .restart = mxs_restart,
366MACHINE_END 367MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-mx23evk.c b/arch/arm/mach-mxs/mach-mx23evk.c
index c325fbe4e4c6..5ea1c57d2606 100644
--- a/arch/arm/mach-mxs/mach-mx23evk.c
+++ b/arch/arm/mach-mxs/mach-mx23evk.c
@@ -184,4 +184,5 @@ MACHINE_START(MX23EVK, "Freescale MX23 EVK")
184 .init_irq = mx23_init_irq, 184 .init_irq = mx23_init_irq,
185 .timer = &mx23evk_timer, 185 .timer = &mx23evk_timer,
186 .init_machine = mx23evk_init, 186 .init_machine = mx23evk_init,
187 .restart = mxs_restart,
187MACHINE_END 188MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
index 064ec5abaa55..d0cc37fd23a4 100644
--- a/arch/arm/mach-mxs/mach-mx28evk.c
+++ b/arch/arm/mach-mxs/mach-mx28evk.c
@@ -501,4 +501,5 @@ MACHINE_START(MX28EVK, "Freescale MX28 EVK")
501 .init_irq = mx28_init_irq, 501 .init_irq = mx28_init_irq,
502 .timer = &mx28evk_timer, 502 .timer = &mx28evk_timer,
503 .init_machine = mx28evk_init, 503 .init_machine = mx28evk_init,
504 .restart = mxs_restart,
504MACHINE_END 505MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-stmp378x_devb.c b/arch/arm/mach-mxs/mach-stmp378x_devb.c
index 6834dea38c04..a626c07b8713 100644
--- a/arch/arm/mach-mxs/mach-stmp378x_devb.c
+++ b/arch/arm/mach-mxs/mach-stmp378x_devb.c
@@ -117,4 +117,5 @@ MACHINE_START(STMP378X, "STMP378X")
117 .init_irq = mx23_init_irq, 117 .init_irq = mx23_init_irq,
118 .timer = &stmp378x_dvb_timer, 118 .timer = &stmp378x_dvb_timer,
119 .init_machine = stmp378x_dvb_init, 119 .init_machine = stmp378x_dvb_init,
120 .restart = mxs_restart,
120MACHINE_END 121MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-tx28.c b/arch/arm/mach-mxs/mach-tx28.c
index 9a1f0e7a338e..2c0862e655ee 100644
--- a/arch/arm/mach-mxs/mach-tx28.c
+++ b/arch/arm/mach-mxs/mach-tx28.c
@@ -178,4 +178,5 @@ MACHINE_START(TX28, "Ka-Ro electronics TX28 module")
178 .init_irq = mx28_init_irq, 178 .init_irq = mx28_init_irq,
179 .timer = &tx28_timer, 179 .timer = &tx28_timer,
180 .init_machine = tx28_stk5v3_init, 180 .init_machine = tx28_stk5v3_init,
181 .restart = mxs_restart,
181MACHINE_END 182MACHINE_END
diff --git a/arch/arm/mach-mxs/system.c b/arch/arm/mach-mxs/system.c
index cab88364e7c1..b936633b7682 100644
--- a/arch/arm/mach-mxs/system.c
+++ b/arch/arm/mach-mxs/system.c
@@ -42,7 +42,7 @@ static void __iomem *mxs_clkctrl_reset_addr;
42/* 42/*
43 * Reset the system. It is called by machine_restart(). 43 * Reset the system. It is called by machine_restart().
44 */ 44 */
45void arch_reset(char mode, const char *cmd) 45void mxs_restart(char mode, const char *cmd)
46{ 46{
47 /* reset the chip */ 47 /* reset the chip */
48 __mxs_setl(MXS_CLKCTRL_RESET_CHIP, mxs_clkctrl_reset_addr); 48 __mxs_setl(MXS_CLKCTRL_RESET_CHIP, mxs_clkctrl_reset_addr);
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index 00023b5cf12b..59e67979f197 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -187,3 +187,8 @@ static int __init netx_init(void)
187 187
188subsys_initcall(netx_init); 188subsys_initcall(netx_init);
189 189
190void netx_restart(char mode, const char *cmd)
191{
192 writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES,
193 NETX_SYSTEM_RES_CR);
194}
diff --git a/arch/arm/mach-netx/generic.h b/arch/arm/mach-netx/generic.h
index ede2d35341c3..9b915119b8d6 100644
--- a/arch/arm/mach-netx/generic.h
+++ b/arch/arm/mach-netx/generic.h
@@ -19,6 +19,7 @@
19 19
20extern void __init netx_map_io(void); 20extern void __init netx_map_io(void);
21extern void __init netx_init_irq(void); 21extern void __init netx_init_irq(void);
22extern void netx_restart(char, const char *);
22 23
23struct sys_timer; 24struct sys_timer;
24extern struct sys_timer netx_timer; 25extern struct sys_timer netx_timer;
diff --git a/arch/arm/mach-netx/include/mach/system.h b/arch/arm/mach-netx/include/mach/system.h
index dc7b4bc003c5..b38fa36d58c4 100644
--- a/arch/arm/mach-netx/include/mach/system.h
+++ b/arch/arm/mach-netx/include/mach/system.h
@@ -19,20 +19,10 @@
19#ifndef __ASM_ARCH_SYSTEM_H 19#ifndef __ASM_ARCH_SYSTEM_H
20#define __ASM_ARCH_SYSTEM_H 20#define __ASM_ARCH_SYSTEM_H
21 21
22#include <linux/io.h>
23#include <mach/hardware.h>
24#include "netx-regs.h"
25
26static inline void arch_idle(void) 22static inline void arch_idle(void)
27{ 23{
28 cpu_do_idle(); 24 cpu_do_idle();
29} 25}
30 26
31static inline void arch_reset(char mode, const char *cmd)
32{
33 writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES,
34 NETX_SYSTEM_RES_CR);
35}
36
37#endif 27#endif
38 28
diff --git a/arch/arm/mach-netx/nxdb500.c b/arch/arm/mach-netx/nxdb500.c
index ef8cf3574a02..180ea899a48a 100644
--- a/arch/arm/mach-netx/nxdb500.c
+++ b/arch/arm/mach-netx/nxdb500.c
@@ -207,4 +207,5 @@ MACHINE_START(NXDB500, "Hilscher nxdb500")
207 .handle_irq = vic_handle_irq, 207 .handle_irq = vic_handle_irq,
208 .timer = &netx_timer, 208 .timer = &netx_timer,
209 .init_machine = nxdb500_init, 209 .init_machine = nxdb500_init,
210 .restart = netx_restart,
210MACHINE_END 211MACHINE_END
diff --git a/arch/arm/mach-netx/nxdkn.c b/arch/arm/mach-netx/nxdkn.c
index 588558bdd800..58009e29b20e 100644
--- a/arch/arm/mach-netx/nxdkn.c
+++ b/arch/arm/mach-netx/nxdkn.c
@@ -100,4 +100,5 @@ MACHINE_START(NXDKN, "Hilscher nxdkn")
100 .handle_irq = vic_handle_irq, 100 .handle_irq = vic_handle_irq,
101 .timer = &netx_timer, 101 .timer = &netx_timer,
102 .init_machine = nxdkn_init, 102 .init_machine = nxdkn_init,
103 .restart = netx_restart,
103MACHINE_END 104MACHINE_END
diff --git a/arch/arm/mach-netx/nxeb500hmi.c b/arch/arm/mach-netx/nxeb500hmi.c
index cfcbb5038648..122e99826ef6 100644
--- a/arch/arm/mach-netx/nxeb500hmi.c
+++ b/arch/arm/mach-netx/nxeb500hmi.c
@@ -184,4 +184,5 @@ MACHINE_START(NXEB500HMI, "Hilscher nxeb500hmi")
184 .handle_irq = vic_handle_irq, 184 .handle_irq = vic_handle_irq,
185 .timer = &netx_timer, 185 .timer = &netx_timer,
186 .init_machine = nxeb500hmi_init, 186 .init_machine = nxeb500hmi_init,
187 .restart = netx_restart,
187MACHINE_END 188MACHINE_END
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index f98259c050ee..7c878bf00340 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -35,6 +35,8 @@
35#include <mach/nand.h> 35#include <mach/nand.h>
36#include <mach/fsmc.h> 36#include <mach/fsmc.h>
37 37
38#include "cpu-8815.h"
39
38/* Initial value for SRC control register: all timers use MXTAL/8 source */ 40/* Initial value for SRC control register: all timers use MXTAL/8 source */
39#define SRC_CR_INIT_MASK 0x00007fff 41#define SRC_CR_INIT_MASK 0x00007fff
40#define SRC_CR_INIT_VAL 0x2aaa8000 42#define SRC_CR_INIT_VAL 0x2aaa8000
@@ -284,4 +286,5 @@ MACHINE_START(NOMADIK, "NHK8815")
284 .handle_irq = vic_handle_irq, 286 .handle_irq = vic_handle_irq,
285 .timer = &nomadik_timer, 287 .timer = &nomadik_timer,
286 .init_machine = nhk8815_platform_init, 288 .init_machine = nhk8815_platform_init,
289 .restart = cpu8815_restart,
287MACHINE_END 290MACHINE_END
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index dc67717db6f0..65df7b4fdd3e 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -21,6 +21,7 @@
21#include <linux/device.h> 21#include <linux/device.h>
22#include <linux/amba/bus.h> 22#include <linux/amba/bus.h>
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/io.h>
24 25
25#include <plat/gpio-nomadik.h> 26#include <plat/gpio-nomadik.h>
26#include <mach/hardware.h> 27#include <mach/hardware.h>
@@ -32,6 +33,7 @@
32#include <asm/hardware/cache-l2x0.h> 33#include <asm/hardware/cache-l2x0.h>
33 34
34#include "clock.h" 35#include "clock.h"
36#include "cpu-8815.h"
35 37
36#define __MEM_4K_RESOURCE(x) \ 38#define __MEM_4K_RESOURCE(x) \
37 .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} 39 .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM}
@@ -164,3 +166,13 @@ void __init cpu8815_init_irq(void)
164#endif 166#endif
165 return; 167 return;
166} 168}
169
170void cpu8815_restart(char mode, const char *cmd)
171{
172 void __iomem *src_rstsr = io_p2v(NOMADIK_SRC_BASE + 0x18);
173
174 /* FIXME: use egpio when implemented */
175
176 /* Write anything to Reset status register */
177 writel(1, src_rstsr);
178}
diff --git a/arch/arm/mach-nomadik/cpu-8815.h b/arch/arm/mach-nomadik/cpu-8815.h
new file mode 100644
index 000000000000..71c21e8a11dc
--- /dev/null
+++ b/arch/arm/mach-nomadik/cpu-8815.h
@@ -0,0 +1,4 @@
1extern void cpu8815_map_io(void);
2extern void cpu8815_platform_init(void);
3extern void cpu8815_init_irq(void);
4extern void cpu8815_restart(char, const char *);
diff --git a/arch/arm/mach-nomadik/include/mach/setup.h b/arch/arm/mach-nomadik/include/mach/setup.h
index b7897edf1f35..bcaeaf41c053 100644
--- a/arch/arm/mach-nomadik/include/mach/setup.h
+++ b/arch/arm/mach-nomadik/include/mach/setup.h
@@ -12,9 +12,6 @@
12 12
13#ifdef CONFIG_NOMADIK_8815 13#ifdef CONFIG_NOMADIK_8815
14 14
15extern void cpu8815_map_io(void);
16extern void cpu8815_platform_init(void);
17extern void cpu8815_init_irq(void);
18extern void nmdk_timer_init(void); 15extern void nmdk_timer_init(void);
19 16
20#endif /* NOMADIK_8815 */ 17#endif /* NOMADIK_8815 */
diff --git a/arch/arm/mach-nomadik/include/mach/system.h b/arch/arm/mach-nomadik/include/mach/system.h
index 7119f688116e..25e198b8976c 100644
--- a/arch/arm/mach-nomadik/include/mach/system.h
+++ b/arch/arm/mach-nomadik/include/mach/system.h
@@ -20,9 +20,6 @@
20#ifndef __ASM_ARCH_SYSTEM_H 20#ifndef __ASM_ARCH_SYSTEM_H
21#define __ASM_ARCH_SYSTEM_H 21#define __ASM_ARCH_SYSTEM_H
22 22
23#include <linux/io.h>
24#include <mach/hardware.h>
25
26static inline void arch_idle(void) 23static inline void arch_idle(void)
27{ 24{
28 /* 25 /*
@@ -32,14 +29,4 @@ static inline void arch_idle(void)
32 cpu_do_idle(); 29 cpu_do_idle();
33} 30}
34 31
35static inline void arch_reset(char mode, const char *cmd)
36{
37 void __iomem *src_rstsr = io_p2v(NOMADIK_SRC_BASE + 0x18);
38
39 /* FIXME: use egpio when implemented */
40
41 /* Write anything to Reset status register */
42 writel(1, src_rstsr);
43}
44
45#endif 32#endif
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index af7911963c0d..88909cc0b254 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -386,6 +386,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
386 .init_irq = omap1_init_irq, 386 .init_irq = omap1_init_irq,
387 .init_machine = ams_delta_init, 387 .init_machine = ams_delta_init,
388 .timer = &omap1_timer, 388 .timer = &omap1_timer,
389 .restart = omap1_restart,
389MACHINE_END 390MACHINE_END
390 391
391EXPORT_SYMBOL(ams_delta_latch1_write); 392EXPORT_SYMBOL(ams_delta_latch1_write);
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index b9c4c0f933ee..0b9464b41212 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -390,4 +390,5 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
390 .init_irq = omap1_init_irq, 390 .init_irq = omap1_init_irq,
391 .init_machine = omap_fsample_init, 391 .init_machine = omap_fsample_init,
392 .timer = &omap1_timer, 392 .timer = &omap1_timer,
393 .restart = omap1_restart,
393MACHINE_END 394MACHINE_END
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index 7f41d7a504a5..9a5fe581bc1c 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -89,4 +89,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710")
89 .init_irq = omap1_init_irq, 89 .init_irq = omap1_init_irq,
90 .init_machine = omap_generic_init, 90 .init_machine = omap_generic_init,
91 .timer = &omap1_timer, 91 .timer = &omap1_timer,
92 .restart = omap1_restart,
92MACHINE_END 93MACHINE_END
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 7933b97698f8..00ad6b22d60a 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -456,4 +456,5 @@ MACHINE_START(OMAP_H2, "TI-H2")
456 .init_irq = omap1_init_irq, 456 .init_irq = omap1_init_irq,
457 .init_machine = h2_init, 457 .init_machine = h2_init,
458 .timer = &omap1_timer, 458 .timer = &omap1_timer,
459 .restart = omap1_restart,
459MACHINE_END 460MACHINE_END
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index 04be2f83ca09..4a7f25149703 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -444,4 +444,5 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
444 .init_irq = omap1_init_irq, 444 .init_irq = omap1_init_irq,
445 .init_machine = h3_init, 445 .init_machine = h3_init,
446 .timer = &omap1_timer, 446 .timer = &omap1_timer,
447 .restart = omap1_restart,
447MACHINE_END 448MACHINE_END
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index 46fcfeb1f11e..731cc3db7ab3 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -610,4 +610,5 @@ MACHINE_START(HERALD, "HTC Herald")
610 .init_irq = omap1_init_irq, 610 .init_irq = omap1_init_irq,
611 .init_machine = htcherald_init, 611 .init_machine = htcherald_init,
612 .timer = &omap1_timer, 612 .timer = &omap1_timer,
613 .restart = omap1_restart,
613MACHINE_END 614MACHINE_END
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index f99d11de1531..309369ea6978 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -460,4 +460,5 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
460 .init_irq = omap1_init_irq, 460 .init_irq = omap1_init_irq,
461 .init_machine = innovator_init, 461 .init_machine = innovator_init,
462 .timer = &omap1_timer, 462 .timer = &omap1_timer,
463 .restart = omap1_restart,
463MACHINE_END 464MACHINE_END
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index c64342388ec3..f9efc036ba96 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -259,4 +259,5 @@ MACHINE_START(NOKIA770, "Nokia 770")
259 .init_irq = omap1_init_irq, 259 .init_irq = omap1_init_irq,
260 .init_machine = omap_nokia770_init, 260 .init_machine = omap_nokia770_init,
261 .timer = &omap1_timer, 261 .timer = &omap1_timer,
262 .restart = omap1_restart,
262MACHINE_END 263MACHINE_END
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index a409dfcc5b18..675de06557aa 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -578,4 +578,5 @@ MACHINE_START(OMAP_OSK, "TI-OSK")
578 .init_irq = omap1_init_irq, 578 .init_irq = omap1_init_irq,
579 .init_machine = osk_init, 579 .init_machine = osk_init,
580 .timer = &omap1_timer, 580 .timer = &omap1_timer,
581 .restart = omap1_restart,
581MACHINE_END 582MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 105292d39484..81fa27f88369 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -270,4 +270,5 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")
270 .init_irq = omap1_init_irq, 270 .init_irq = omap1_init_irq,
271 .init_machine = omap_palmte_init, 271 .init_machine = omap_palmte_init,
272 .timer = &omap1_timer, 272 .timer = &omap1_timer,
273 .restart = omap1_restart,
273MACHINE_END 274MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 387a9006358d..81cb82178388 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -317,4 +317,5 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T")
317 .init_irq = omap1_init_irq, 317 .init_irq = omap1_init_irq,
318 .init_machine = omap_palmtt_init, 318 .init_machine = omap_palmtt_init,
319 .timer = &omap1_timer, 319 .timer = &omap1_timer,
320 .restart = omap1_restart,
320MACHINE_END 321MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index df6d15e68aad..e881945ce8ec 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -334,4 +334,5 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71")
334 .init_irq = omap1_init_irq, 334 .init_irq = omap1_init_irq,
335 .init_machine = omap_palmz71_init, 335 .init_machine = omap_palmz71_init,
336 .timer = &omap1_timer, 336 .timer = &omap1_timer,
337 .restart = omap1_restart,
337MACHINE_END 338MACHINE_END
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 57ecd7e09831..c000bed76276 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -352,4 +352,5 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
352 .init_irq = omap1_init_irq, 352 .init_irq = omap1_init_irq,
353 .init_machine = omap_perseus2_init, 353 .init_machine = omap_perseus2_init,
354 .timer = &omap1_timer, 354 .timer = &omap1_timer,
355 .restart = omap1_restart,
355MACHINE_END 356MACHINE_END
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 774ae39fd636..7bcd82ab0fd0 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -416,4 +416,5 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1")
416 .init_irq = omap1_init_irq, 416 .init_irq = omap1_init_irq,
417 .init_machine = omap_sx1_init, 417 .init_machine = omap_sx1_init,
418 .timer = &omap1_timer, 418 .timer = &omap1_timer,
419 .restart = omap1_restart,
419MACHINE_END 420MACHINE_END
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 7721c146d8d6..f83a502dc93c 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -28,7 +28,6 @@
28#include <linux/export.h> 28#include <linux/export.h>
29 29
30#include <mach/hardware.h> 30#include <mach/hardware.h>
31#include <mach/system.h>
32#include <asm/mach-types.h> 31#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
34#include <asm/mach/map.h> 33#include <asm/mach/map.h>
@@ -221,7 +220,7 @@ void voiceblue_wdt_ping(void)
221 gpio_set_value(0, wdt_gpio_state); 220 gpio_set_value(0, wdt_gpio_state);
222} 221}
223 222
224static void voiceblue_reset(char mode, const char *cmd) 223static void voiceblue_restart(char mode, const char *cmd)
225{ 224{
226 /* 225 /*
227 * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 226 * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
@@ -285,8 +284,6 @@ static void __init voiceblue_init(void)
285 * (it is connected through invertor) */ 284 * (it is connected through invertor) */
286 omap_writeb(0x00, OMAP_LPG1_LCR); 285 omap_writeb(0x00, OMAP_LPG1_LCR);
287 omap_writeb(0x00, OMAP_LPG1_PMR); /* Disable clock */ 286 omap_writeb(0x00, OMAP_LPG1_PMR); /* Disable clock */
288
289 arch_reset = voiceblue_reset;
290} 287}
291 288
292MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910") 289MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")
@@ -298,4 +295,5 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")
298 .init_irq = omap1_init_irq, 295 .init_irq = omap1_init_irq,
299 .init_machine = voiceblue_init, 296 .init_machine = voiceblue_init,
300 .timer = &omap1_timer, 297 .timer = &omap1_timer,
298 .restart = voiceblue_restart,
301MACHINE_END 299MACHINE_END
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h
index 52c4eda97fa8..a9a5146dd2d4 100644
--- a/arch/arm/mach-omap1/common.h
+++ b/arch/arm/mach-omap1/common.h
@@ -54,6 +54,7 @@ static inline void omap16xx_map_io(void)
54 54
55void omap1_init_early(void); 55void omap1_init_early(void);
56void omap1_init_irq(void); 56void omap1_init_irq(void);
57void omap1_restart(char, const char *);
57 58
58extern struct sys_timer omap1_timer; 59extern struct sys_timer omap1_timer;
59extern bool omap_32k_timer_init(void); 60extern bool omap_32k_timer_init(void);
diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c
index ad951ee69205..91d199b64979 100644
--- a/arch/arm/mach-omap1/reset.c
+++ b/arch/arm/mach-omap1/reset.c
@@ -5,10 +5,9 @@
5#include <linux/io.h> 5#include <linux/io.h>
6 6
7#include <mach/hardware.h> 7#include <mach/hardware.h>
8#include <mach/system.h>
9#include <plat/prcm.h> 8#include <plat/prcm.h>
10 9
11void omap1_arch_reset(char mode, const char *cmd) 10void omap1_restart(char mode, const char *cmd)
12{ 11{
13 /* 12 /*
14 * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 13 * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
@@ -21,5 +20,3 @@ void omap1_arch_reset(char mode, const char *cmd)
21 20
22 omap_writew(1, ARM_RSTCT1); 21 omap_writew(1, ARM_RSTCT1);
23} 22}
24
25void (*arch_reset)(char, const char *) = omap1_arch_reset;
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index d88143faca59..7370983f809f 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -304,4 +304,5 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
304 .handle_irq = omap2_intc_handle_irq, 304 .handle_irq = omap2_intc_handle_irq,
305 .init_machine = omap_2430sdp_init, 305 .init_machine = omap_2430sdp_init,
306 .timer = &omap2_timer, 306 .timer = &omap2_timer,
307 .restart = omap_prcm_restart,
307MACHINE_END 308MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 83126368ed99..9996334cb687 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -731,4 +731,5 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
731 .handle_irq = omap3_intc_handle_irq, 731 .handle_irq = omap3_intc_handle_irq,
732 .init_machine = omap_3430sdp_init, 732 .init_machine = omap_3430sdp_init,
733 .timer = &omap3_timer, 733 .timer = &omap3_timer,
734 .restart = omap_prcm_restart,
734MACHINE_END 735MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index 7969dd904bd3..6ef350d1ae4f 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -218,4 +218,5 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
218 .handle_irq = omap3_intc_handle_irq, 218 .handle_irq = omap3_intc_handle_irq,
219 .init_machine = omap_sdp_init, 219 .init_machine = omap_sdp_init,
220 .timer = &omap3_timer, 220 .timer = &omap3_timer,
221 .restart = omap_prcm_restart,
221MACHINE_END 222MACHINE_END
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index ef2bbc09428a..bad5d5a5ef79 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -987,4 +987,5 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
987 .handle_irq = gic_handle_irq, 987 .handle_irq = gic_handle_irq,
988 .init_machine = omap_4430sdp_init, 988 .init_machine = omap_4430sdp_init,
989 .timer = &omap4_timer, 989 .timer = &omap4_timer,
990 .restart = omap_prcm_restart,
990MACHINE_END 991MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 7e90f93263db..c3851e8de28b 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -101,4 +101,5 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
101 .handle_irq = omap3_intc_handle_irq, 101 .handle_irq = omap3_intc_handle_irq,
102 .init_machine = am3517_crane_init, 102 .init_machine = am3517_crane_init,
103 .timer = &omap3_timer, 103 .timer = &omap3_timer,
104 .restart = omap_prcm_restart,
104MACHINE_END 105MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 551cae8d9b8a..f5a3a3f11739 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -494,4 +494,5 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
494 .handle_irq = omap3_intc_handle_irq, 494 .handle_irq = omap3_intc_handle_irq,
495 .init_machine = am3517_evm_init, 495 .init_machine = am3517_evm_init,
496 .timer = &omap3_timer, 496 .timer = &omap3_timer,
497 .restart = omap_prcm_restart,
497MACHINE_END 498MACHINE_END
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 5a66480feed0..ac773829941f 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -357,4 +357,5 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
357 .handle_irq = omap2_intc_handle_irq, 357 .handle_irq = omap2_intc_handle_irq,
358 .init_machine = omap_apollon_init, 358 .init_machine = omap_apollon_init,
359 .timer = &omap2_timer, 359 .timer = &omap2_timer,
360 .restart = omap_prcm_restart,
360MACHINE_END 361MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 510b6a2ff0fa..1545102d1f9b 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -637,6 +637,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
637 .handle_irq = omap3_intc_handle_irq, 637 .handle_irq = omap3_intc_handle_irq,
638 .init_machine = cm_t35_init, 638 .init_machine = cm_t35_init,
639 .timer = &omap3_timer, 639 .timer = &omap3_timer,
640 .restart = omap_prcm_restart,
640MACHINE_END 641MACHINE_END
641 642
642MACHINE_START(CM_T3730, "Compulab CM-T3730") 643MACHINE_START(CM_T3730, "Compulab CM-T3730")
@@ -648,4 +649,5 @@ MACHINE_START(CM_T3730, "Compulab CM-T3730")
648 .handle_irq = omap3_intc_handle_irq, 649 .handle_irq = omap3_intc_handle_irq,
649 .init_machine = cm_t3730_init, 650 .init_machine = cm_t3730_init,
650 .timer = &omap3_timer, 651 .timer = &omap3_timer,
652 .restart = omap_prcm_restart,
651MACHINE_END 653MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index efc5cedb1fbb..f36d694d2159 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -302,4 +302,5 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
302 .handle_irq = omap3_intc_handle_irq, 302 .handle_irq = omap3_intc_handle_irq,
303 .init_machine = cm_t3517_init, 303 .init_machine = cm_t3517_init,
304 .timer = &omap3_timer, 304 .timer = &omap3_timer,
305 .restart = omap_prcm_restart,
305MACHINE_END 306MACHINE_END
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index d81ea7fa75ef..e873063f4fda 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -663,4 +663,5 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
663 .handle_irq = omap3_intc_handle_irq, 663 .handle_irq = omap3_intc_handle_irq,
664 .init_machine = devkit8000_init, 664 .init_machine = devkit8000_init,
665 .timer = &omap3_secure_timer, 665 .timer = &omap3_secure_timer,
666 .restart = omap_prcm_restart,
666MACHINE_END 667MACHINE_END
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 63b54163b993..f8c5b2cc7c9c 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -106,6 +106,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
106 .init_machine = omap_generic_init, 106 .init_machine = omap_generic_init,
107 .timer = &omap2_timer, 107 .timer = &omap2_timer,
108 .dt_compat = omap242x_boards_compat, 108 .dt_compat = omap242x_boards_compat,
109 .restart = omap_prcm_restart,
109MACHINE_END 110MACHINE_END
110#endif 111#endif
111 112
@@ -125,6 +126,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
125 .init_machine = omap_generic_init, 126 .init_machine = omap_generic_init,
126 .timer = &omap2_timer, 127 .timer = &omap2_timer,
127 .dt_compat = omap243x_boards_compat, 128 .dt_compat = omap243x_boards_compat,
129 .restart = omap_prcm_restart,
128MACHINE_END 130MACHINE_END
129#endif 131#endif
130 132
@@ -143,6 +145,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
143 .init_machine = omap3_init, 145 .init_machine = omap3_init,
144 .timer = &omap3_timer, 146 .timer = &omap3_timer,
145 .dt_compat = omap3_boards_compat, 147 .dt_compat = omap3_boards_compat,
148 .restart = omap_prcm_restart,
146MACHINE_END 149MACHINE_END
147#endif 150#endif
148 151
@@ -161,5 +164,6 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
161 .init_machine = omap4_init, 164 .init_machine = omap4_init,
162 .timer = &omap4_timer, 165 .timer = &omap4_timer,
163 .dt_compat = omap4_boards_compat, 166 .dt_compat = omap4_boards_compat,
167 .restart = omap_prcm_restart,
164MACHINE_END 168MACHINE_END
165#endif 169#endif
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index ec4018362e8e..54af800d143c 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -399,4 +399,5 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
399 .handle_irq = omap2_intc_handle_irq, 399 .handle_irq = omap2_intc_handle_irq,
400 .init_machine = omap_h4_init, 400 .init_machine = omap_h4_init,
401 .timer = &omap2_timer, 401 .timer = &omap2_timer,
402 .restart = omap_prcm_restart,
402MACHINE_END 403MACHINE_END
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 5949f6ae3edf..a59ace0ed560 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -675,6 +675,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
675 .handle_irq = omap3_intc_handle_irq, 675 .handle_irq = omap3_intc_handle_irq,
676 .init_machine = igep_init, 676 .init_machine = igep_init,
677 .timer = &omap3_timer, 677 .timer = &omap3_timer,
678 .restart = omap_prcm_restart,
678MACHINE_END 679MACHINE_END
679 680
680MACHINE_START(IGEP0030, "IGEP OMAP3 module") 681MACHINE_START(IGEP0030, "IGEP OMAP3 module")
@@ -686,4 +687,5 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
686 .handle_irq = omap3_intc_handle_irq, 687 .handle_irq = omap3_intc_handle_irq,
687 .init_machine = igep_init, 688 .init_machine = igep_init,
688 .timer = &omap3_timer, 689 .timer = &omap3_timer,
690 .restart = omap_prcm_restart,
689MACHINE_END 691MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 13bde0e66934..2d2a61f7dcbf 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -437,4 +437,5 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
437 .handle_irq = omap3_intc_handle_irq, 437 .handle_irq = omap3_intc_handle_irq,
438 .init_machine = omap_ldp_init, 438 .init_machine = omap_ldp_init,
439 .timer = &omap3_timer, 439 .timer = &omap3_timer,
440 .restart = omap_prcm_restart,
440MACHINE_END 441MACHINE_END
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index bebd3d84365e..cef2cf1c0b8d 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -692,6 +692,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800")
692 .handle_irq = omap2_intc_handle_irq, 692 .handle_irq = omap2_intc_handle_irq,
693 .init_machine = n8x0_init_machine, 693 .init_machine = n8x0_init_machine,
694 .timer = &omap2_timer, 694 .timer = &omap2_timer,
695 .restart = omap_prcm_restart,
695MACHINE_END 696MACHINE_END
696 697
697MACHINE_START(NOKIA_N810, "Nokia N810") 698MACHINE_START(NOKIA_N810, "Nokia N810")
@@ -703,6 +704,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810")
703 .handle_irq = omap2_intc_handle_irq, 704 .handle_irq = omap2_intc_handle_irq,
704 .init_machine = n8x0_init_machine, 705 .init_machine = n8x0_init_machine,
705 .timer = &omap2_timer, 706 .timer = &omap2_timer,
707 .restart = omap_prcm_restart,
706MACHINE_END 708MACHINE_END
707 709
708MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") 710MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
@@ -714,4 +716,5 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
714 .handle_irq = omap2_intc_handle_irq, 716 .handle_irq = omap2_intc_handle_irq,
715 .init_machine = n8x0_init_machine, 717 .init_machine = n8x0_init_machine,
716 .timer = &omap2_timer, 718 .timer = &omap2_timer,
719 .restart = omap_prcm_restart,
717MACHINE_END 720MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index c34f56588284..7ffcd2839e7b 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -562,4 +562,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
562 .handle_irq = omap3_intc_handle_irq, 562 .handle_irq = omap3_intc_handle_irq,
563 .init_machine = omap3_beagle_init, 563 .init_machine = omap3_beagle_init,
564 .timer = &omap3_secure_timer, 564 .timer = &omap3_secure_timer,
565 .restart = omap_prcm_restart,
565MACHINE_END 566MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index f11bc444e7be..003fe34c9343 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -684,4 +684,5 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
684 .handle_irq = omap3_intc_handle_irq, 684 .handle_irq = omap3_intc_handle_irq,
685 .init_machine = omap3_evm_init, 685 .init_machine = omap3_evm_init,
686 .timer = &omap3_timer, 686 .timer = &omap3_timer,
687 .restart = omap_prcm_restart,
687MACHINE_END 688MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 5fa6bad9574e..4198dd017d8f 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -211,6 +211,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
211 .handle_irq = omap3_intc_handle_irq, 211 .handle_irq = omap3_intc_handle_irq,
212 .init_machine = omap3logic_init, 212 .init_machine = omap3logic_init,
213 .timer = &omap3_timer, 213 .timer = &omap3_timer,
214 .restart = omap_prcm_restart,
214MACHINE_END 215MACHINE_END
215 216
216MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") 217MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
@@ -221,4 +222,5 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
221 .handle_irq = omap3_intc_handle_irq, 222 .handle_irq = omap3_intc_handle_irq,
222 .init_machine = omap3logic_init, 223 .init_machine = omap3logic_init,
223 .timer = &omap3_timer, 224 .timer = &omap3_timer,
225 .restart = omap_prcm_restart,
224MACHINE_END 226MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index ef315c585b75..1644b73017fc 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -609,4 +609,5 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
609 .handle_irq = omap3_intc_handle_irq, 609 .handle_irq = omap3_intc_handle_irq,
610 .init_machine = omap3pandora_init, 610 .init_machine = omap3pandora_init,
611 .timer = &omap3_timer, 611 .timer = &omap3_timer,
612 .restart = omap_prcm_restart,
612MACHINE_END 613MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index b21d70a2e4a7..cb089a46f62f 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -457,4 +457,5 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
457 .handle_irq = omap3_intc_handle_irq, 457 .handle_irq = omap3_intc_handle_irq,
458 .init_machine = omap3_stalker_init, 458 .init_machine = omap3_stalker_init,
459 .timer = &omap3_secure_timer, 459 .timer = &omap3_secure_timer,
460 .restart = omap_prcm_restart,
460MACHINE_END 461MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 18cd340f9b7b..a0b851aafcca 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -384,4 +384,5 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
384 .handle_irq = omap3_intc_handle_irq, 384 .handle_irq = omap3_intc_handle_irq,
385 .init_machine = omap3_touchbook_init, 385 .init_machine = omap3_touchbook_init,
386 .timer = &omap3_secure_timer, 386 .timer = &omap3_secure_timer,
387 .restart = omap_prcm_restart,
387MACHINE_END 388MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index b6f114436dbc..8b06c6a60d02 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -580,4 +580,5 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
580 .handle_irq = gic_handle_irq, 580 .handle_irq = gic_handle_irq,
581 .init_machine = omap4_panda_init, 581 .init_machine = omap4_panda_init,
582 .timer = &omap4_timer, 582 .timer = &omap4_timer,
583 .restart = omap_prcm_restart,
583MACHINE_END 584MACHINE_END
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 60a61ea759bf..52c0cef77165 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -565,4 +565,5 @@ MACHINE_START(OVERO, "Gumstix Overo")
565 .handle_irq = omap3_intc_handle_irq, 565 .handle_irq = omap3_intc_handle_irq,
566 .init_machine = overo_init, 566 .init_machine = overo_init,
567 .timer = &omap3_timer, 567 .timer = &omap3_timer,
568 .restart = omap_prcm_restart,
568MACHINE_END 569MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index a79d49e3fe09..8678b386c6a2 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -152,4 +152,5 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
152 .handle_irq = omap3_intc_handle_irq, 152 .handle_irq = omap3_intc_handle_irq,
153 .init_machine = rm680_init, 153 .init_machine = rm680_init,
154 .timer = &omap3_timer, 154 .timer = &omap3_timer,
155 .restart = omap_prcm_restart,
155MACHINE_END 156MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index bd18d691c6ad..108fee6146fc 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -193,7 +193,7 @@ static struct platform_device rx51_charger_device = {
193static void __init rx51_charger_init(void) 193static void __init rx51_charger_init(void)
194{ 194{
195 WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO, 195 WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
196 GPIOF_OUT_INIT_LOW, "isp1704_reset")); 196 GPIOF_OUT_INIT_HIGH, "isp1704_reset"));
197 197
198 platform_device_register(&rx51_charger_device); 198 platform_device_register(&rx51_charger_device);
199} 199}
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 4e3c0965edf3..27f01f051dff 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -130,4 +130,5 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
130 .handle_irq = omap3_intc_handle_irq, 130 .handle_irq = omap3_intc_handle_irq,
131 .init_machine = rx51_init, 131 .init_machine = rx51_init,
132 .timer = &omap3_timer, 132 .timer = &omap3_timer,
133 .restart = omap_prcm_restart,
133MACHINE_END 134MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index 8402b39b2840..74713e3993e5 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -48,4 +48,5 @@ MACHINE_START(TI8168EVM, "ti8168evm")
48 .init_irq = ti816x_init_irq, 48 .init_irq = ti816x_init_irq,
49 .timer = &omap3_timer, 49 .timer = &omap3_timer,
50 .init_machine = ti8168_evm_init, 50 .init_machine = ti8168_evm_init,
51 .restart = omap_prcm_restart,
51MACHINE_END 52MACHINE_END
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index 70e5b54a2115..5c20bcc57f2b 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -138,6 +138,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
138 .handle_irq = omap3_intc_handle_irq, 138 .handle_irq = omap3_intc_handle_irq,
139 .init_machine = omap_zoom_init, 139 .init_machine = omap_zoom_init,
140 .timer = &omap3_timer, 140 .timer = &omap3_timer,
141 .restart = omap_prcm_restart,
141MACHINE_END 142MACHINE_END
142 143
143MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") 144MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
@@ -149,4 +150,5 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
149 .handle_irq = omap3_intc_handle_irq, 150 .handle_irq = omap3_intc_handle_irq,
150 .init_machine = omap_zoom_init, 151 .init_machine = omap_zoom_init,
151 .timer = &omap3_timer, 152 .timer = &omap3_timer,
153 .restart = omap_prcm_restart,
152MACHINE_END 154MACHINE_END
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 012bac7d56a5..cda888a2e635 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -84,6 +84,7 @@ void omap3_init_early(void); /* Do not use this one */
84void am35xx_init_early(void); 84void am35xx_init_early(void);
85void ti816x_init_early(void); 85void ti816x_init_early(void);
86void omap4430_init_early(void); 86void omap4430_init_early(void);
87void omap_prcm_restart(char, const char *);
87 88
88/* 89/*
89 * IO bases for various OMAP processors 90 * IO bases for various OMAP processors
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 292eee3be15f..28fcb27005d2 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -145,6 +145,9 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
145 pdata->reg_size = 4; 145 pdata->reg_size = 4;
146 pdata->has_ccr = true; 146 pdata->has_ccr = true;
147 } 147 }
148 pdata->set_clk_src = omap2_mcbsp_set_clk_src;
149 if (id == 1)
150 pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
148 151
149 if (oh->class->rev == MCBSP_CONFIG_TYPE3) { 152 if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
150 if (id == 2) 153 if (id == 2)
@@ -174,9 +177,6 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
174 name, oh->name); 177 name, oh->name);
175 return PTR_ERR(pdev); 178 return PTR_ERR(pdev);
176 } 179 }
177 pdata->set_clk_src = omap2_mcbsp_set_clk_src;
178 if (id == 1)
179 pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
180 omap_mcbsp_count++; 180 omap_mcbsp_count++;
181 return 0; 181 return 0;
182} 182}
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index c35e5cea9f8f..626acfad7190 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -25,7 +25,6 @@
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <linux/export.h> 26#include <linux/export.h>
27 27
28#include <mach/system.h>
29#include "common.h" 28#include "common.h"
30#include <plat/prcm.h> 29#include <plat/prcm.h>
31#include <plat/irqs.h> 30#include <plat/irqs.h>
@@ -59,7 +58,7 @@ u32 omap_prcm_get_reset_sources(void)
59EXPORT_SYMBOL(omap_prcm_get_reset_sources); 58EXPORT_SYMBOL(omap_prcm_get_reset_sources);
60 59
61/* Resets clock rates and reboots the system. Only called from system.h */ 60/* Resets clock rates and reboots the system. Only called from system.h */
62static void omap_prcm_arch_reset(char mode, const char *cmd) 61void omap_prcm_restart(char mode, const char *cmd)
63{ 62{
64 s16 prcm_offs = 0; 63 s16 prcm_offs = 0;
65 64
@@ -110,8 +109,6 @@ static void omap_prcm_arch_reset(char mode, const char *cmd)
110 omap2_prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */ 109 omap2_prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */
111} 110}
112 111
113void (*arch_reset)(char, const char *) = omap_prcm_arch_reset;
114
115/** 112/**
116 * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness 113 * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness
117 * @reg: physical address of module IDLEST register 114 * @reg: physical address of module IDLEST register
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 22ace0bf2f92..41127e80cc1e 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -18,6 +18,7 @@
18#include <linux/mbus.h> 18#include <linux/mbus.h>
19#include <linux/mv643xx_i2c.h> 19#include <linux/mv643xx_i2c.h>
20#include <linux/ata_platform.h> 20#include <linux/ata_platform.h>
21#include <linux/delay.h>
21#include <net/dsa.h> 22#include <net/dsa.h>
22#include <asm/page.h> 23#include <asm/page.h>
23#include <asm/setup.h> 24#include <asm/setup.h>
@@ -304,6 +305,17 @@ void __init orion5x_init(void)
304 orion5x_wdt_init(); 305 orion5x_wdt_init();
305} 306}
306 307
308void orion5x_restart(char mode, const char *cmd)
309{
310 /*
311 * Enable and issue soft reset
312 */
313 orion5x_setbits(RSTOUTn_MASK, (1 << 2));
314 orion5x_setbits(CPU_SOFT_RESET, 1);
315 mdelay(200);
316 orion5x_clrbits(CPU_SOFT_RESET, 1);
317}
318
307/* 319/*
308 * Many orion-based systems have buggy bootloader implementations. 320 * Many orion-based systems have buggy bootloader implementations.
309 * This is a common fixup for bogus memory tags. 321 * This is a common fixup for bogus memory tags.
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 909489f4d23e..37ef18de61b7 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -39,6 +39,7 @@ void orion5x_spi_init(void);
39void orion5x_uart0_init(void); 39void orion5x_uart0_init(void);
40void orion5x_uart1_init(void); 40void orion5x_uart1_init(void);
41void orion5x_xor_init(void); 41void orion5x_xor_init(void);
42void orion5x_restart(char, const char *);
42 43
43/* 44/*
44 * PCIe/PCI functions. 45 * PCIe/PCI functions.
diff --git a/arch/arm/mach-orion5x/d2net-setup.c b/arch/arm/mach-orion5x/d2net-setup.c
index 8c8300951f46..d75dcfa0f01c 100644
--- a/arch/arm/mach-orion5x/d2net-setup.c
+++ b/arch/arm/mach-orion5x/d2net-setup.c
@@ -343,6 +343,7 @@ MACHINE_START(D2NET, "LaCie d2 Network")
343 .init_irq = orion5x_init_irq, 343 .init_irq = orion5x_init_irq,
344 .timer = &orion5x_timer, 344 .timer = &orion5x_timer,
345 .fixup = tag_fixup_mem32, 345 .fixup = tag_fixup_mem32,
346 .restart = orion5x_restart,
346MACHINE_END 347MACHINE_END
347#endif 348#endif
348 349
@@ -355,6 +356,7 @@ MACHINE_START(BIGDISK, "LaCie Big Disk Network")
355 .init_irq = orion5x_init_irq, 356 .init_irq = orion5x_init_irq,
356 .timer = &orion5x_timer, 357 .timer = &orion5x_timer,
357 .fixup = tag_fixup_mem32, 358 .fixup = tag_fixup_mem32,
359 .restart = orion5x_restart,
358MACHINE_END 360MACHINE_END
359#endif 361#endif
360 362
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c
index 4b79a80d5e1f..a104d5a80e11 100644
--- a/arch/arm/mach-orion5x/db88f5281-setup.c
+++ b/arch/arm/mach-orion5x/db88f5281-setup.c
@@ -364,4 +364,5 @@ MACHINE_START(DB88F5281, "Marvell Orion-2 Development Board")
364 .init_early = orion5x_init_early, 364 .init_early = orion5x_init_early,
365 .init_irq = orion5x_init_irq, 365 .init_irq = orion5x_init_irq,
366 .timer = &orion5x_timer, 366 .timer = &orion5x_timer,
367 .restart = orion5x_restart,
367MACHINE_END 368MACHINE_END
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 343f60e9639f..91b0f4788597 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -736,4 +736,5 @@ MACHINE_START(DNS323, "D-Link DNS-323")
736 .init_irq = orion5x_init_irq, 736 .init_irq = orion5x_init_irq,
737 .timer = &orion5x_timer, 737 .timer = &orion5x_timer,
738 .fixup = tag_fixup_mem32, 738 .fixup = tag_fixup_mem32,
739 .restart = orion5x_restart,
739MACHINE_END 740MACHINE_END
diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c
index 70a4e9265f06..355e962137c7 100644
--- a/arch/arm/mach-orion5x/edmini_v2-setup.c
+++ b/arch/arm/mach-orion5x/edmini_v2-setup.c
@@ -258,4 +258,5 @@ MACHINE_START(EDMINI_V2, "LaCie Ethernet Disk mini V2")
258 .init_irq = orion5x_init_irq, 258 .init_irq = orion5x_init_irq,
259 .timer = &orion5x_timer, 259 .timer = &orion5x_timer,
260 .fixup = tag_fixup_mem32, 260 .fixup = tag_fixup_mem32,
261 .restart = orion5x_restart,
261MACHINE_END 262MACHINE_END
diff --git a/arch/arm/mach-orion5x/include/mach/system.h b/arch/arm/mach-orion5x/include/mach/system.h
index a1d6e46ab035..825a2650cefa 100644
--- a/arch/arm/mach-orion5x/include/mach/system.h
+++ b/arch/arm/mach-orion5x/include/mach/system.h
@@ -11,23 +11,9 @@
11#ifndef __ASM_ARCH_SYSTEM_H 11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H 12#define __ASM_ARCH_SYSTEM_H
13 13
14#include <mach/bridge-regs.h>
15
16static inline void arch_idle(void) 14static inline void arch_idle(void)
17{ 15{
18 cpu_do_idle(); 16 cpu_do_idle();
19} 17}
20 18
21static inline void arch_reset(char mode, const char *cmd)
22{
23 /*
24 * Enable and issue soft reset
25 */
26 orion5x_setbits(RSTOUTn_MASK, (1 << 2));
27 orion5x_setbits(CPU_SOFT_RESET, 1);
28 mdelay(200);
29 orion5x_clrbits(CPU_SOFT_RESET, 1);
30}
31
32
33#endif 19#endif
diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c
index d3cd3f63258a..47587b832842 100644
--- a/arch/arm/mach-orion5x/kurobox_pro-setup.c
+++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c
@@ -386,6 +386,7 @@ MACHINE_START(KUROBOX_PRO, "Buffalo/Revogear Kurobox Pro")
386 .init_irq = orion5x_init_irq, 386 .init_irq = orion5x_init_irq,
387 .timer = &orion5x_timer, 387 .timer = &orion5x_timer,
388 .fixup = tag_fixup_mem32, 388 .fixup = tag_fixup_mem32,
389 .restart = orion5x_restart,
389MACHINE_END 390MACHINE_END
390#endif 391#endif
391 392
@@ -399,5 +400,6 @@ MACHINE_START(LINKSTATION_PRO, "Buffalo Linkstation Pro/Live")
399 .init_irq = orion5x_init_irq, 400 .init_irq = orion5x_init_irq,
400 .timer = &orion5x_timer, 401 .timer = &orion5x_timer,
401 .fixup = tag_fixup_mem32, 402 .fixup = tag_fixup_mem32,
403 .restart = orion5x_restart,
402MACHINE_END 404MACHINE_END
403#endif 405#endif
diff --git a/arch/arm/mach-orion5x/ls-chl-setup.c b/arch/arm/mach-orion5x/ls-chl-setup.c
index 9503fff404e3..527213169db0 100644
--- a/arch/arm/mach-orion5x/ls-chl-setup.c
+++ b/arch/arm/mach-orion5x/ls-chl-setup.c
@@ -140,7 +140,7 @@ static struct mv_sata_platform_data lschl_sata_data = {
140 140
141static void lschl_power_off(void) 141static void lschl_power_off(void)
142{ 142{
143 arm_machine_restart('h', NULL); 143 orion5x_restart('h', NULL);
144} 144}
145 145
146/***************************************************************************** 146/*****************************************************************************
@@ -325,4 +325,5 @@ MACHINE_START(LINKSTATION_LSCHL, "Buffalo Linkstation LiveV3 (LS-CHL)")
325 .init_irq = orion5x_init_irq, 325 .init_irq = orion5x_init_irq,
326 .timer = &orion5x_timer, 326 .timer = &orion5x_timer,
327 .fixup = tag_fixup_mem32, 327 .fixup = tag_fixup_mem32,
328 .restart = orion5x_restart,
328MACHINE_END 329MACHINE_END
diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c
index ed6d772f4a24..9a8697b97dd7 100644
--- a/arch/arm/mach-orion5x/ls_hgl-setup.c
+++ b/arch/arm/mach-orion5x/ls_hgl-setup.c
@@ -186,7 +186,7 @@ static struct mv_sata_platform_data ls_hgl_sata_data = {
186 186
187static void ls_hgl_power_off(void) 187static void ls_hgl_power_off(void)
188{ 188{
189 arm_machine_restart('h', NULL); 189 orion5x_restart('h', NULL);
190} 190}
191 191
192 192
@@ -272,4 +272,5 @@ MACHINE_START(LINKSTATION_LS_HGL, "Buffalo Linkstation LS-HGL")
272 .init_irq = orion5x_init_irq, 272 .init_irq = orion5x_init_irq,
273 .timer = &orion5x_timer, 273 .timer = &orion5x_timer,
274 .fixup = tag_fixup_mem32, 274 .fixup = tag_fixup_mem32,
275 .restart = orion5x_restart,
275MACHINE_END 276MACHINE_END
diff --git a/arch/arm/mach-orion5x/lsmini-setup.c b/arch/arm/mach-orion5x/lsmini-setup.c
index 743f7f1db181..09c73659f467 100644
--- a/arch/arm/mach-orion5x/lsmini-setup.c
+++ b/arch/arm/mach-orion5x/lsmini-setup.c
@@ -186,7 +186,7 @@ static struct mv_sata_platform_data lsmini_sata_data = {
186 186
187static void lsmini_power_off(void) 187static void lsmini_power_off(void)
188{ 188{
189 arm_machine_restart('h', NULL); 189 orion5x_restart('h', NULL);
190} 190}
191 191
192 192
@@ -274,5 +274,6 @@ MACHINE_START(LINKSTATION_MINI, "Buffalo Linkstation Mini")
274 .init_irq = orion5x_init_irq, 274 .init_irq = orion5x_init_irq,
275 .timer = &orion5x_timer, 275 .timer = &orion5x_timer,
276 .fixup = tag_fixup_mem32, 276 .fixup = tag_fixup_mem32,
277 .restart = orion5x_restart,
277MACHINE_END 278MACHINE_END
278#endif 279#endif
diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c
index 6020e26b1c71..65faaa34de61 100644
--- a/arch/arm/mach-orion5x/mss2-setup.c
+++ b/arch/arm/mach-orion5x/mss2-setup.c
@@ -267,5 +267,6 @@ MACHINE_START(MSS2, "Maxtor Shared Storage II")
267 .init_early = orion5x_init_early, 267 .init_early = orion5x_init_early,
268 .init_irq = orion5x_init_irq, 268 .init_irq = orion5x_init_irq,
269 .timer = &orion5x_timer, 269 .timer = &orion5x_timer,
270 .fixup = tag_fixup_mem32 270 .fixup = tag_fixup_mem32,
271 .restart = orion5x_restart,
271MACHINE_END 272MACHINE_END
diff --git a/arch/arm/mach-orion5x/mv2120-setup.c b/arch/arm/mach-orion5x/mv2120-setup.c
index 201ae3676289..c87fde4deeca 100644
--- a/arch/arm/mach-orion5x/mv2120-setup.c
+++ b/arch/arm/mach-orion5x/mv2120-setup.c
@@ -234,5 +234,6 @@ MACHINE_START(MV2120, "HP Media Vault mv2120")
234 .init_early = orion5x_init_early, 234 .init_early = orion5x_init_early,
235 .init_irq = orion5x_init_irq, 235 .init_irq = orion5x_init_irq,
236 .timer = &orion5x_timer, 236 .timer = &orion5x_timer,
237 .fixup = tag_fixup_mem32 237 .fixup = tag_fixup_mem32,
238 .restart = orion5x_restart,
238MACHINE_END 239MACHINE_END
diff --git a/arch/arm/mach-orion5x/net2big-setup.c b/arch/arm/mach-orion5x/net2big-setup.c
index 6197c79a2ecb..0180c393c711 100644
--- a/arch/arm/mach-orion5x/net2big-setup.c
+++ b/arch/arm/mach-orion5x/net2big-setup.c
@@ -426,5 +426,6 @@ MACHINE_START(NET2BIG, "LaCie 2Big Network")
426 .init_irq = orion5x_init_irq, 426 .init_irq = orion5x_init_irq,
427 .timer = &orion5x_timer, 427 .timer = &orion5x_timer,
428 .fixup = tag_fixup_mem32, 428 .fixup = tag_fixup_mem32,
429 .restart = orion5x_restart,
429MACHINE_END 430MACHINE_END
430 431
diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
index ebd6767d8e88..292038fc59fd 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
@@ -175,4 +175,5 @@ MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design")
175 .init_irq = orion5x_init_irq, 175 .init_irq = orion5x_init_irq,
176 .timer = &orion5x_timer, 176 .timer = &orion5x_timer,
177 .fixup = tag_fixup_mem32, 177 .fixup = tag_fixup_mem32,
178 .restart = orion5x_restart,
178MACHINE_END 179MACHINE_END
diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
index 05db2d336b08..c44eabaabc16 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
@@ -187,4 +187,5 @@ MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design")
187 .init_irq = orion5x_init_irq, 187 .init_irq = orion5x_init_irq,
188 .timer = &orion5x_timer, 188 .timer = &orion5x_timer,
189 .fixup = tag_fixup_mem32, 189 .fixup = tag_fixup_mem32,
190 .restart = orion5x_restart,
190MACHINE_END 191MACHINE_END
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index e47fa0578ae3..96438b6b2022 100644
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -311,4 +311,5 @@ MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design")
311 .init_early = orion5x_init_early, 311 .init_early = orion5x_init_early,
312 .init_irq = orion5x_init_irq, 312 .init_irq = orion5x_init_irq,
313 .timer = &orion5x_timer, 313 .timer = &orion5x_timer,
314 .restart = orion5x_restart,
314MACHINE_END 315MACHINE_END
diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
index 64317251ec00..2c5fab00d205 100644
--- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
@@ -128,4 +128,5 @@ MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design")
128 .init_irq = orion5x_init_irq, 128 .init_irq = orion5x_init_irq,
129 .timer = &orion5x_timer, 129 .timer = &orion5x_timer,
130 .fixup = tag_fixup_mem32, 130 .fixup = tag_fixup_mem32,
131 .restart = orion5x_restart,
131MACHINE_END 132MACHINE_END
diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c
index 29f1526f7b70..632a861ef82b 100644
--- a/arch/arm/mach-orion5x/terastation_pro2-setup.c
+++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c
@@ -364,4 +364,5 @@ MACHINE_START(TERASTATION_PRO2, "Buffalo Terastation Pro II/Live")
364 .init_irq = orion5x_init_irq, 364 .init_irq = orion5x_init_irq,
365 .timer = &orion5x_timer, 365 .timer = &orion5x_timer,
366 .fixup = tag_fixup_mem32, 366 .fixup = tag_fixup_mem32,
367 .restart = orion5x_restart,
367MACHINE_END 368MACHINE_END
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index 31e51f9b4b64..62c156b20ccd 100644
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -329,4 +329,5 @@ MACHINE_START(TS209, "QNAP TS-109/TS-209")
329 .init_irq = orion5x_init_irq, 329 .init_irq = orion5x_init_irq,
330 .timer = &orion5x_timer, 330 .timer = &orion5x_timer,
331 .fixup = tag_fixup_mem32, 331 .fixup = tag_fixup_mem32,
332 .restart = orion5x_restart,
332MACHINE_END 333MACHINE_END
diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c
index 0fbcc14e09d7..4e6ff759cd32 100644
--- a/arch/arm/mach-orion5x/ts409-setup.c
+++ b/arch/arm/mach-orion5x/ts409-setup.c
@@ -318,4 +318,5 @@ MACHINE_START(TS409, "QNAP TS-409")
318 .init_irq = orion5x_init_irq, 318 .init_irq = orion5x_init_irq,
319 .timer = &orion5x_timer, 319 .timer = &orion5x_timer,
320 .fixup = tag_fixup_mem32, 320 .fixup = tag_fixup_mem32,
321 .restart = orion5x_restart,
321MACHINE_END 322MACHINE_END
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c
index b35e2005a348..c96f37472eda 100644
--- a/arch/arm/mach-orion5x/ts78xx-setup.c
+++ b/arch/arm/mach-orion5x/ts78xx-setup.c
@@ -627,4 +627,5 @@ MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC")
627 .init_early = orion5x_init_early, 627 .init_early = orion5x_init_early,
628 .init_irq = orion5x_init_irq, 628 .init_irq = orion5x_init_irq,
629 .timer = &orion5x_timer, 629 .timer = &orion5x_timer,
630 .restart = orion5x_restart,
630MACHINE_END 631MACHINE_END
diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c
index b8be7d8d0cf4..078c03f7cd52 100644
--- a/arch/arm/mach-orion5x/wnr854t-setup.c
+++ b/arch/arm/mach-orion5x/wnr854t-setup.c
@@ -179,4 +179,5 @@ MACHINE_START(WNR854T, "Netgear WNR854T")
179 .init_irq = orion5x_init_irq, 179 .init_irq = orion5x_init_irq,
180 .timer = &orion5x_timer, 180 .timer = &orion5x_timer,
181 .fixup = tag_fixup_mem32, 181 .fixup = tag_fixup_mem32,
182 .restart = orion5x_restart,
182MACHINE_END 183MACHINE_END
diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
index faf81a039360..46a9778171ce 100644
--- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c
+++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
@@ -267,4 +267,5 @@ MACHINE_START(WRT350N_V2, "Linksys WRT350N v2")
267 .init_irq = orion5x_init_irq, 267 .init_irq = orion5x_init_irq,
268 .timer = &orion5x_timer, 268 .timer = &orion5x_timer,
269 .fixup = tag_fixup_mem32, 269 .fixup = tag_fixup_mem32,
270 .restart = orion5x_restart,
270MACHINE_END 271MACHINE_END
diff --git a/arch/arm/mach-picoxcell/include/mach/system.h b/arch/arm/mach-picoxcell/include/mach/system.h
index 67c589b0c1bc..1a5d8cb57df4 100644
--- a/arch/arm/mach-picoxcell/include/mach/system.h
+++ b/arch/arm/mach-picoxcell/include/mach/system.h
@@ -23,9 +23,4 @@ static inline void arch_idle(void)
23 cpu_do_idle(); 23 cpu_do_idle();
24} 24}
25 25
26static inline void arch_reset(int mode, const char *cmd)
27{
28 /* Watchdog reset to go here. */
29}
30
31#endif /* __ASM_ARCH_SYSTEM_H */ 26#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-pnx4008/core.c b/arch/arm/mach-pnx4008/core.c
index cdb95e726f5c..4cfb40b2ec19 100644
--- a/arch/arm/mach-pnx4008/core.c
+++ b/arch/arm/mach-pnx4008/core.c
@@ -260,6 +260,11 @@ void __init pnx4008_map_io(void)
260 iotable_init(pnx4008_io_desc, ARRAY_SIZE(pnx4008_io_desc)); 260 iotable_init(pnx4008_io_desc, ARRAY_SIZE(pnx4008_io_desc));
261} 261}
262 262
263static void pnx4008_restart(char mode, const char *cmd)
264{
265 soft_restart(0);
266}
267
263extern struct sys_timer pnx4008_timer; 268extern struct sys_timer pnx4008_timer;
264 269
265MACHINE_START(PNX4008, "Philips PNX4008") 270MACHINE_START(PNX4008, "Philips PNX4008")
@@ -269,4 +274,5 @@ MACHINE_START(PNX4008, "Philips PNX4008")
269 .init_irq = pnx4008_init_irq, 274 .init_irq = pnx4008_init_irq,
270 .init_machine = pnx4008_init, 275 .init_machine = pnx4008_init,
271 .timer = &pnx4008_timer, 276 .timer = &pnx4008_timer,
277 .restart = pnx4008_restart,
272MACHINE_END 278MACHINE_END
diff --git a/arch/arm/mach-pnx4008/include/mach/system.h b/arch/arm/mach-pnx4008/include/mach/system.h
index 5d6384a6128c..60cfe7188091 100644
--- a/arch/arm/mach-pnx4008/include/mach/system.h
+++ b/arch/arm/mach-pnx4008/include/mach/system.h
@@ -21,18 +21,9 @@
21#ifndef __ASM_ARCH_SYSTEM_H 21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H 22#define __ASM_ARCH_SYSTEM_H
23 23
24#include <linux/io.h>
25#include <mach/hardware.h>
26#include <mach/platform.h>
27
28static void arch_idle(void) 24static void arch_idle(void)
29{ 25{
30 cpu_do_idle(); 26 cpu_do_idle();
31} 27}
32 28
33static inline void arch_reset(char mode, const char *cmd)
34{
35 soft_restart(0);
36}
37
38#endif 29#endif
diff --git a/arch/arm/mach-prima2/common.h b/arch/arm/mach-prima2/common.h
index 83e5d2128118..b28a930d4f8a 100644
--- a/arch/arm/mach-prima2/common.h
+++ b/arch/arm/mach-prima2/common.h
@@ -16,6 +16,7 @@ extern struct sys_timer sirfsoc_timer;
16 16
17extern void __init sirfsoc_of_irq_init(void); 17extern void __init sirfsoc_of_irq_init(void);
18extern void __init sirfsoc_of_clk_init(void); 18extern void __init sirfsoc_of_clk_init(void);
19extern void sirfsoc_restart(char, const char *);
19 20
20#ifndef CONFIG_DEBUG_LL 21#ifndef CONFIG_DEBUG_LL
21static inline void sirfsoc_map_lluart(void) {} 22static inline void sirfsoc_map_lluart(void) {}
diff --git a/arch/arm/mach-prima2/include/mach/system.h b/arch/arm/mach-prima2/include/mach/system.h
index 0dbd257ad16d..2c7d2a9d0c92 100644
--- a/arch/arm/mach-prima2/include/mach/system.h
+++ b/arch/arm/mach-prima2/include/mach/system.h
@@ -9,21 +9,9 @@
9#ifndef __MACH_SYSTEM_H__ 9#ifndef __MACH_SYSTEM_H__
10#define __MACH_SYSTEM_H__ 10#define __MACH_SYSTEM_H__
11 11
12#include <linux/bitops.h>
13#include <mach/hardware.h>
14
15#define SIRFSOC_SYS_RST_BIT BIT(31)
16
17extern void __iomem *sirfsoc_rstc_base;
18
19static inline void arch_idle(void) 12static inline void arch_idle(void)
20{ 13{
21 cpu_do_idle(); 14 cpu_do_idle();
22} 15}
23 16
24static inline void arch_reset(char mode, const char *cmd)
25{
26 writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);
27}
28
29#endif 17#endif
diff --git a/arch/arm/mach-prima2/prima2.c b/arch/arm/mach-prima2/prima2.c
index a12b689a8702..02b9c05ff990 100644
--- a/arch/arm/mach-prima2/prima2.c
+++ b/arch/arm/mach-prima2/prima2.c
@@ -40,4 +40,5 @@ MACHINE_START(PRIMA2_EVB, "prima2cb")
40 .dma_zone_size = SZ_256M, 40 .dma_zone_size = SZ_256M,
41 .init_machine = sirfsoc_mach_init, 41 .init_machine = sirfsoc_mach_init,
42 .dt_compat = prima2cb_dt_match, 42 .dt_compat = prima2cb_dt_match,
43 .restart = sirfsoc_restart,
43MACHINE_END 44MACHINE_END
diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c
index 492cfa8d2610..762adb73ab7c 100644
--- a/arch/arm/mach-prima2/rstc.c
+++ b/arch/arm/mach-prima2/rstc.c
@@ -68,3 +68,10 @@ int sirfsoc_reset_device(struct device *dev)
68 68
69 return 0; 69 return 0;
70} 70}
71
72#define SIRFSOC_SYS_RST_BIT BIT(31)
73
74void sirfsoc_restart(char mode, const char *cmd)
75{
76 writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);
77}
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index 4b81f59a4cba..82514f5c38f1 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -829,4 +829,5 @@ MACHINE_START(BALLOON3, "Balloon3")
829 .timer = &pxa_timer, 829 .timer = &pxa_timer,
830 .init_machine = balloon3_init, 830 .init_machine = balloon3_init,
831 .atag_offset = 0x100, 831 .atag_offset = 0x100,
832 .restart = pxa_restart,
832MACHINE_END 833MACHINE_END
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c
index 4efc16d39c79..c2f0be040d27 100644
--- a/arch/arm/mach-pxa/capc7117.c
+++ b/arch/arm/mach-pxa/capc7117.c
@@ -153,5 +153,6 @@ MACHINE_START(CAPC7117,
153 .init_irq = pxa3xx_init_irq, 153 .init_irq = pxa3xx_init_irq,
154 .handle_irq = pxa3xx_handle_irq, 154 .handle_irq = pxa3xx_handle_irq,
155 .timer = &pxa_timer, 155 .timer = &pxa_timer,
156 .init_machine = capc7117_init 156 .init_machine = capc7117_init,
157 .restart = pxa_restart,
157MACHINE_END 158MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index f2e4190080cb..ec170a552c23 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -524,4 +524,5 @@ MACHINE_START(ARMCORE, "Compulab CM-X2XX")
524#ifdef CONFIG_PCI 524#ifdef CONFIG_PCI
525 .dma_zone_size = SZ_64M, 525 .dma_zone_size = SZ_64M,
526#endif 526#endif
527 .restart = pxa_restart,
527MACHINE_END 528MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index e096bba8fd57..7236974da0b7 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -858,4 +858,5 @@ MACHINE_START(CM_X300, "CM-X300 module")
858 .timer = &pxa_timer, 858 .timer = &pxa_timer,
859 .init_machine = cm_x300_init, 859 .init_machine = cm_x300_init,
860 .fixup = cm_x300_fixup, 860 .fixup = cm_x300_fixup,
861 .restart = pxa_restart,
861MACHINE_END 862MACHINE_END
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c
index 05bfa1b1c001..6a685165c9f2 100644
--- a/arch/arm/mach-pxa/colibri-pxa270.c
+++ b/arch/arm/mach-pxa/colibri-pxa270.c
@@ -313,6 +313,7 @@ MACHINE_START(COLIBRI, "Toradex Colibri PXA270")
313 .init_irq = pxa27x_init_irq, 313 .init_irq = pxa27x_init_irq,
314 .handle_irq = pxa27x_handle_irq, 314 .handle_irq = pxa27x_handle_irq,
315 .timer = &pxa_timer, 315 .timer = &pxa_timer,
316 .restart = pxa_restart,
316MACHINE_END 317MACHINE_END
317 318
318MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC") 319MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC")
@@ -322,5 +323,6 @@ MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC")
322 .init_irq = pxa27x_init_irq, 323 .init_irq = pxa27x_init_irq,
323 .handle_irq = pxa27x_handle_irq, 324 .handle_irq = pxa27x_handle_irq,
324 .timer = &pxa_timer, 325 .timer = &pxa_timer,
326 .restart = pxa_restart,
325MACHINE_END 327MACHINE_END
326 328
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index c825e8bf2db1..c01059a61f33 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -189,5 +189,6 @@ MACHINE_START(COLIBRI300, "Toradex Colibri PXA300")
189 .init_irq = pxa3xx_init_irq, 189 .init_irq = pxa3xx_init_irq,
190 .handle_irq = pxa3xx_handle_irq, 190 .handle_irq = pxa3xx_handle_irq,
191 .timer = &pxa_timer, 191 .timer = &pxa_timer,
192 .restart = pxa_restart,
192MACHINE_END 193MACHINE_END
193 194
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index d23b92b80488..5028f2300d50 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -259,5 +259,6 @@ MACHINE_START(COLIBRI320, "Toradex Colibri PXA320")
259 .init_irq = pxa3xx_init_irq, 259 .init_irq = pxa3xx_init_irq,
260 .handle_irq = pxa3xx_handle_irq, 260 .handle_irq = pxa3xx_handle_irq,
261 .timer = &pxa_timer, 261 .timer = &pxa_timer,
262 .restart = pxa_restart,
262MACHINE_END 263MACHINE_END
263 264
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 549468d088b9..9d4dc5970b9c 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -655,7 +655,7 @@ static void corgi_poweroff(void)
655 /* Green LED off tells the bootloader to halt */ 655 /* Green LED off tells the bootloader to halt */
656 gpio_set_value(CORGI_GPIO_LED_GREEN, 0); 656 gpio_set_value(CORGI_GPIO_LED_GREEN, 0);
657 657
658 arm_machine_restart('h', NULL); 658 pxa_restart('h', NULL);
659} 659}
660 660
661static void corgi_restart(char mode, const char *cmd) 661static void corgi_restart(char mode, const char *cmd)
@@ -664,13 +664,12 @@ static void corgi_restart(char mode, const char *cmd)
664 /* Green LED on tells the bootloader to reboot */ 664 /* Green LED on tells the bootloader to reboot */
665 gpio_set_value(CORGI_GPIO_LED_GREEN, 1); 665 gpio_set_value(CORGI_GPIO_LED_GREEN, 1);
666 666
667 arm_machine_restart('h', cmd); 667 pxa_restart('h', cmd);
668} 668}
669 669
670static void __init corgi_init(void) 670static void __init corgi_init(void)
671{ 671{
672 pm_power_off = corgi_poweroff; 672 pm_power_off = corgi_poweroff;
673 arm_pm_restart = corgi_restart;
674 673
675 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ 674 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
676 PCFR |= PCFR_OPDE; 675 PCFR |= PCFR_OPDE;
@@ -726,6 +725,7 @@ MACHINE_START(CORGI, "SHARP Corgi")
726 .handle_irq = pxa25x_handle_irq, 725 .handle_irq = pxa25x_handle_irq,
727 .init_machine = corgi_init, 726 .init_machine = corgi_init,
728 .timer = &pxa_timer, 727 .timer = &pxa_timer,
728 .restart = corgi_restart,
729MACHINE_END 729MACHINE_END
730#endif 730#endif
731 731
@@ -737,6 +737,7 @@ MACHINE_START(SHEPHERD, "SHARP Shepherd")
737 .handle_irq = pxa25x_handle_irq, 737 .handle_irq = pxa25x_handle_irq,
738 .init_machine = corgi_init, 738 .init_machine = corgi_init,
739 .timer = &pxa_timer, 739 .timer = &pxa_timer,
740 .restart = corgi_restart,
740MACHINE_END 741MACHINE_END
741#endif 742#endif
742 743
@@ -748,6 +749,7 @@ MACHINE_START(HUSKY, "SHARP Husky")
748 .handle_irq = pxa25x_handle_irq, 749 .handle_irq = pxa25x_handle_irq,
749 .init_machine = corgi_init, 750 .init_machine = corgi_init,
750 .timer = &pxa_timer, 751 .timer = &pxa_timer,
752 .restart = corgi_restart,
751MACHINE_END 753MACHINE_END
752#endif 754#endif
753 755
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c
index 5e2cf39e9e4c..fb5a51d834e5 100644
--- a/arch/arm/mach-pxa/csb726.c
+++ b/arch/arm/mach-pxa/csb726.c
@@ -278,4 +278,5 @@ MACHINE_START(CSB726, "Cogent CSB726")
278 .handle_irq = pxa27x_handle_irq, 278 .handle_irq = pxa27x_handle_irq,
279 .init_machine = csb726_init, 279 .init_machine = csb726_init,
280 .timer = &pxa_timer, 280 .timer = &pxa_timer,
281 .restart = pxa_restart,
281MACHINE_END 282MACHINE_END
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index 94acc0b01dd6..bd396ba67af7 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -1305,6 +1305,7 @@ MACHINE_START(EM_X270, "Compulab EM-X270")
1305 .handle_irq = pxa27x_handle_irq, 1305 .handle_irq = pxa27x_handle_irq,
1306 .timer = &pxa_timer, 1306 .timer = &pxa_timer,
1307 .init_machine = em_x270_init, 1307 .init_machine = em_x270_init,
1308 .restart = pxa_restart,
1308MACHINE_END 1309MACHINE_END
1309 1310
1310MACHINE_START(EXEDA, "Compulab eXeda") 1311MACHINE_START(EXEDA, "Compulab eXeda")
@@ -1314,4 +1315,5 @@ MACHINE_START(EXEDA, "Compulab eXeda")
1314 .handle_irq = pxa27x_handle_irq, 1315 .handle_irq = pxa27x_handle_irq,
1315 .timer = &pxa_timer, 1316 .timer = &pxa_timer,
1316 .init_machine = em_x270_init, 1317 .init_machine = em_x270_init,
1318 .restart = pxa_restart,
1317MACHINE_END 1319MACHINE_END
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index d82b7aa3c096..69473db97758 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -196,6 +196,7 @@ MACHINE_START(E330, "Toshiba e330")
196 .fixup = eseries_fixup, 196 .fixup = eseries_fixup,
197 .init_machine = e330_init, 197 .init_machine = e330_init,
198 .timer = &pxa_timer, 198 .timer = &pxa_timer,
199 .restart = pxa_restart,
199MACHINE_END 200MACHINE_END
200#endif 201#endif
201 202
@@ -246,6 +247,7 @@ MACHINE_START(E350, "Toshiba e350")
246 .fixup = eseries_fixup, 247 .fixup = eseries_fixup,
247 .init_machine = e350_init, 248 .init_machine = e350_init,
248 .timer = &pxa_timer, 249 .timer = &pxa_timer,
250 .restart = pxa_restart,
249MACHINE_END 251MACHINE_END
250#endif 252#endif
251 253
@@ -369,6 +371,7 @@ MACHINE_START(E400, "Toshiba e400")
369 .fixup = eseries_fixup, 371 .fixup = eseries_fixup,
370 .init_machine = e400_init, 372 .init_machine = e400_init,
371 .timer = &pxa_timer, 373 .timer = &pxa_timer,
374 .restart = pxa_restart,
372MACHINE_END 375MACHINE_END
373#endif 376#endif
374 377
@@ -558,6 +561,7 @@ MACHINE_START(E740, "Toshiba e740")
558 .fixup = eseries_fixup, 561 .fixup = eseries_fixup,
559 .init_machine = e740_init, 562 .init_machine = e740_init,
560 .timer = &pxa_timer, 563 .timer = &pxa_timer,
564 .restart = pxa_restart,
561MACHINE_END 565MACHINE_END
562#endif 566#endif
563 567
@@ -750,6 +754,7 @@ MACHINE_START(E750, "Toshiba e750")
750 .fixup = eseries_fixup, 754 .fixup = eseries_fixup,
751 .init_machine = e750_init, 755 .init_machine = e750_init,
752 .timer = &pxa_timer, 756 .timer = &pxa_timer,
757 .restart = pxa_restart,
753MACHINE_END 758MACHINE_END
754#endif 759#endif
755 760
@@ -955,5 +960,6 @@ MACHINE_START(E800, "Toshiba e800")
955 .fixup = eseries_fixup, 960 .fixup = eseries_fixup,
956 .init_machine = e800_init, 961 .init_machine = e800_init,
957 .timer = &pxa_timer, 962 .timer = &pxa_timer,
963 .restart = pxa_restart,
958MACHINE_END 964MACHINE_END
959#endif 965#endif
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
index 8308eee5a924..15ab2533667d 100644
--- a/arch/arm/mach-pxa/ezx.c
+++ b/arch/arm/mach-pxa/ezx.c
@@ -804,6 +804,7 @@ MACHINE_START(EZX_A780, "Motorola EZX A780")
804 .handle_irq = pxa27x_handle_irq, 804 .handle_irq = pxa27x_handle_irq,
805 .timer = &pxa_timer, 805 .timer = &pxa_timer,
806 .init_machine = a780_init, 806 .init_machine = a780_init,
807 .restart = pxa_restart,
807MACHINE_END 808MACHINE_END
808#endif 809#endif
809 810
@@ -870,6 +871,7 @@ MACHINE_START(EZX_E680, "Motorola EZX E680")
870 .handle_irq = pxa27x_handle_irq, 871 .handle_irq = pxa27x_handle_irq,
871 .timer = &pxa_timer, 872 .timer = &pxa_timer,
872 .init_machine = e680_init, 873 .init_machine = e680_init,
874 .restart = pxa_restart,
873MACHINE_END 875MACHINE_END
874#endif 876#endif
875 877
@@ -936,6 +938,7 @@ MACHINE_START(EZX_A1200, "Motorola EZX A1200")
936 .handle_irq = pxa27x_handle_irq, 938 .handle_irq = pxa27x_handle_irq,
937 .timer = &pxa_timer, 939 .timer = &pxa_timer,
938 .init_machine = a1200_init, 940 .init_machine = a1200_init,
941 .restart = pxa_restart,
939MACHINE_END 942MACHINE_END
940#endif 943#endif
941 944
@@ -1127,6 +1130,7 @@ MACHINE_START(EZX_A910, "Motorola EZX A910")
1127 .handle_irq = pxa27x_handle_irq, 1130 .handle_irq = pxa27x_handle_irq,
1128 .timer = &pxa_timer, 1131 .timer = &pxa_timer,
1129 .init_machine = a910_init, 1132 .init_machine = a910_init,
1133 .restart = pxa_restart,
1130MACHINE_END 1134MACHINE_END
1131#endif 1135#endif
1132 1136
@@ -1193,6 +1197,7 @@ MACHINE_START(EZX_E6, "Motorola EZX E6")
1193 .handle_irq = pxa27x_handle_irq, 1197 .handle_irq = pxa27x_handle_irq,
1194 .timer = &pxa_timer, 1198 .timer = &pxa_timer,
1195 .init_machine = e6_init, 1199 .init_machine = e6_init,
1200 .restart = pxa_restart,
1196MACHINE_END 1201MACHINE_END
1197#endif 1202#endif
1198 1203
@@ -1233,5 +1238,6 @@ MACHINE_START(EZX_E2, "Motorola EZX E2")
1233 .handle_irq = pxa27x_handle_irq, 1238 .handle_irq = pxa27x_handle_irq,
1234 .timer = &pxa_timer, 1239 .timer = &pxa_timer,
1235 .init_machine = e2_init, 1240 .init_machine = e2_init,
1241 .restart = pxa_restart,
1236MACHINE_END 1242MACHINE_END
1237#endif 1243#endif
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 92a2e85ab02c..0d729e6619df 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -57,3 +57,5 @@ void __init pxa_set_ffuart_info(void *info);
57void __init pxa_set_btuart_info(void *info); 57void __init pxa_set_btuart_info(void *info);
58void __init pxa_set_stuart_info(void *info); 58void __init pxa_set_stuart_info(void *info);
59void __init pxa_set_hwuart_info(void *info); 59void __init pxa_set_hwuart_info(void *info);
60
61void pxa_restart(char, const char *);
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index ffdd70dad327..ac3b1cef4751 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -239,4 +239,5 @@ MACHINE_START(GUMSTIX, "Gumstix")
239 .handle_irq = pxa25x_handle_irq, 239 .handle_irq = pxa25x_handle_irq,
240 .timer = &pxa_timer, 240 .timer = &pxa_timer,
241 .init_machine = gumstix_init, 241 .init_machine = gumstix_init,
242 .restart = pxa_restart,
242MACHINE_END 243MACHINE_END
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c
index 4b5e110640b1..fde6b4c873c4 100644
--- a/arch/arm/mach-pxa/h5000.c
+++ b/arch/arm/mach-pxa/h5000.c
@@ -209,4 +209,5 @@ MACHINE_START(H5400, "HP iPAQ H5000")
209 .handle_irq = pxa25x_handle_irq, 209 .handle_irq = pxa25x_handle_irq,
210 .timer = &pxa_timer, 210 .timer = &pxa_timer,
211 .init_machine = h5000_init, 211 .init_machine = h5000_init,
212 .restart = pxa_restart,
212MACHINE_END 213MACHINE_END
diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c
index f2c324570844..26d069a9f900 100644
--- a/arch/arm/mach-pxa/himalaya.c
+++ b/arch/arm/mach-pxa/himalaya.c
@@ -164,4 +164,5 @@ MACHINE_START(HIMALAYA, "HTC Himalaya")
164 .handle_irq = pxa25x_handle_irq, 164 .handle_irq = pxa25x_handle_irq,
165 .init_machine = himalaya_init, 165 .init_machine = himalaya_init,
166 .timer = &pxa_timer, 166 .timer = &pxa_timer,
167 .restart = pxa_restart,
167MACHINE_END 168MACHINE_END
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 6f6368ece9bd..ce16bdae96de 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -845,4 +845,5 @@ MACHINE_START(H4700, "HP iPAQ HX4700")
845 .handle_irq = pxa27x_handle_irq, 845 .handle_irq = pxa27x_handle_irq,
846 .init_machine = hx4700_init, 846 .init_machine = hx4700_init,
847 .timer = &pxa_timer, 847 .timer = &pxa_timer,
848 .restart = pxa_restart,
848MACHINE_END 849MACHINE_END
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
index f78d5db758da..e239b82c99d7 100644
--- a/arch/arm/mach-pxa/icontrol.c
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -196,5 +196,6 @@ MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM")
196 .init_irq = pxa3xx_init_irq, 196 .init_irq = pxa3xx_init_irq,
197 .handle_irq = pxa3xx_handle_irq, 197 .handle_irq = pxa3xx_handle_irq,
198 .timer = &pxa_timer, 198 .timer = &pxa_timer,
199 .init_machine = icontrol_init 199 .init_machine = icontrol_init,
200 .restart = pxa_restart,
200MACHINE_END 201MACHINE_END
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index ddf20e5c376e..fbabd84e110c 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -199,4 +199,5 @@ MACHINE_START(PXA_IDP, "Vibren PXA255 IDP")
199 .handle_irq = pxa25x_handle_irq, 199 .handle_irq = pxa25x_handle_irq,
200 .timer = &pxa_timer, 200 .timer = &pxa_timer,
201 .init_machine = idp_init, 201 .init_machine = idp_init,
202 .restart = pxa_restart,
202MACHINE_END 203MACHINE_END
diff --git a/arch/arm/mach-pxa/include/mach/system.h b/arch/arm/mach-pxa/include/mach/system.h
index d1fce8b6d105..c5afacd3cc0b 100644
--- a/arch/arm/mach-pxa/include/mach/system.h
+++ b/arch/arm/mach-pxa/include/mach/system.h
@@ -9,15 +9,7 @@
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 */ 11 */
12
13#include <asm/proc-fns.h>
14#include "hardware.h"
15#include "pxa2xx-regs.h"
16
17static inline void arch_idle(void) 12static inline void arch_idle(void)
18{ 13{
19 cpu_do_idle(); 14 cpu_do_idle();
20} 15}
21
22
23void arch_reset(char mode, const char *cmd);
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 7b324ec6449f..c337c7eed514 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -445,4 +445,5 @@ MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleto
445 .handle_irq = pxa3xx_handle_irq, 445 .handle_irq = pxa3xx_handle_irq,
446 .timer = &pxa_timer, 446 .timer = &pxa_timer,
447 .init_machine = littleton_init, 447 .init_machine = littleton_init,
448 .restart = pxa_restart,
448MACHINE_END 449MACHINE_END
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 1dd530279e0b..6119c015f393 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -505,4 +505,5 @@ MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
505 .handle_irq = pxa27x_handle_irq, 505 .handle_irq = pxa27x_handle_irq,
506 .timer = &pxa_timer, 506 .timer = &pxa_timer,
507 .init_machine = lpd270_init, 507 .init_machine = lpd270_init,
508 .restart = pxa_restart,
508MACHINE_END 509MACHINE_END
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index c48ce6da9184..4b7a52871652 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -556,4 +556,5 @@ MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)")
556 .handle_irq = pxa25x_handle_irq, 556 .handle_irq = pxa25x_handle_irq,
557 .timer = &pxa_timer, 557 .timer = &pxa_timer,
558 .init_machine = lubbock_init, 558 .init_machine = lubbock_init,
559 .restart = pxa_restart,
559MACHINE_END 560MACHINE_END
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 4b796c37af3e..4e6774fff422 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -760,4 +760,5 @@ MACHINE_START(MAGICIAN, "HTC Magician")
760 .handle_irq = pxa27x_handle_irq, 760 .handle_irq = pxa27x_handle_irq,
761 .init_machine = magician_init, 761 .init_machine = magician_init,
762 .timer = &pxa_timer, 762 .timer = &pxa_timer,
763 .restart = pxa_restart,
763MACHINE_END 764MACHINE_END
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 0567d3965fda..ca14555d5e15 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -622,4 +622,5 @@ MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
622 .handle_irq = pxa27x_handle_irq, 622 .handle_irq = pxa27x_handle_irq,
623 .timer = &pxa_timer, 623 .timer = &pxa_timer,
624 .init_machine = mainstone_init, 624 .init_machine = mainstone_init,
625 .restart = pxa_restart,
625MACHINE_END 626MACHINE_END
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 4f47a760398f..924a3b5f8da6 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -696,13 +696,13 @@ static void mioa701_machine_exit(void);
696static void mioa701_poweroff(void) 696static void mioa701_poweroff(void)
697{ 697{
698 mioa701_machine_exit(); 698 mioa701_machine_exit();
699 arm_machine_restart('s', NULL); 699 pxa_restart('s', NULL);
700} 700}
701 701
702static void mioa701_restart(char c, const char *cmd) 702static void mioa701_restart(char c, const char *cmd)
703{ 703{
704 mioa701_machine_exit(); 704 mioa701_machine_exit();
705 arm_machine_restart('s', cmd); 705 pxa_restart('s', cmd);
706} 706}
707 707
708static struct gpio global_gpios[] = { 708static struct gpio global_gpios[] = {
@@ -734,7 +734,6 @@ static void __init mioa701_machine_init(void)
734 pxa_set_udc_info(&mioa701_udc_info); 734 pxa_set_udc_info(&mioa701_udc_info);
735 pxa_set_ac97_info(&mioa701_ac97_info); 735 pxa_set_ac97_info(&mioa701_ac97_info);
736 pm_power_off = mioa701_poweroff; 736 pm_power_off = mioa701_poweroff;
737 arm_pm_restart = mioa701_restart;
738 platform_add_devices(devices, ARRAY_SIZE(devices)); 737 platform_add_devices(devices, ARRAY_SIZE(devices));
739 gsm_init(); 738 gsm_init();
740 739
@@ -758,4 +757,5 @@ MACHINE_START(MIOA701, "MIO A701")
758 .handle_irq = &pxa27x_handle_irq, 757 .handle_irq = &pxa27x_handle_irq,
759 .init_machine = mioa701_machine_init, 758 .init_machine = mioa701_machine_init,
760 .timer = &pxa_timer, 759 .timer = &pxa_timer,
760 .restart = mioa701_restart,
761MACHINE_END 761MACHINE_END
diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c
index 4af5d513c380..169bf8f97af0 100644
--- a/arch/arm/mach-pxa/mp900.c
+++ b/arch/arm/mach-pxa/mp900.c
@@ -98,5 +98,6 @@ MACHINE_START(NEC_MP900, "MobilePro900/C")
98 .init_irq = pxa25x_init_irq, 98 .init_irq = pxa25x_init_irq,
99 .handle_irq = pxa25x_handle_irq, 99 .handle_irq = pxa25x_handle_irq,
100 .init_machine = mp900c_init, 100 .init_machine = mp900c_init,
101 .restart = pxa_restart,
101MACHINE_END 102MACHINE_END
102 103
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index 3d4a2819cae1..1fa80f4f80c8 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -347,5 +347,6 @@ MACHINE_START(PALMLD, "Palm LifeDrive")
347 .init_irq = pxa27x_init_irq, 347 .init_irq = pxa27x_init_irq,
348 .handle_irq = pxa27x_handle_irq, 348 .handle_irq = pxa27x_handle_irq,
349 .timer = &pxa_timer, 349 .timer = &pxa_timer,
350 .init_machine = palmld_init 350 .init_machine = palmld_init,
351 .restart = pxa_restart,
351MACHINE_END 352MACHINE_END
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 99d6bcf1f974..5ba14316bd9c 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -208,5 +208,6 @@ MACHINE_START(PALMT5, "Palm Tungsten|T5")
208 .init_irq = pxa27x_init_irq, 208 .init_irq = pxa27x_init_irq,
209 .handle_irq = pxa27x_handle_irq, 209 .handle_irq = pxa27x_handle_irq,
210 .timer = &pxa_timer, 210 .timer = &pxa_timer,
211 .init_machine = palmt5_init 211 .init_machine = palmt5_init,
212 .restart = pxa_restart,
212MACHINE_END 213MACHINE_END
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index 2c24c67fd92b..29b51b40f09d 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -542,5 +542,6 @@ MACHINE_START(PALMTC, "Palm Tungsten|C")
542 .init_irq = pxa25x_init_irq, 542 .init_irq = pxa25x_init_irq,
543 .handle_irq = pxa25x_handle_irq, 543 .handle_irq = pxa25x_handle_irq,
544 .timer = &pxa_timer, 544 .timer = &pxa_timer,
545 .init_machine = palmtc_init 545 .init_machine = palmtc_init,
546 .restart = pxa_restart,
546MACHINE_END 547MACHINE_END
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index 9376da06404c..5ebf49acb827 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -361,5 +361,6 @@ MACHINE_START(PALMTE2, "Palm Tungsten|E2")
361 .init_irq = pxa25x_init_irq, 361 .init_irq = pxa25x_init_irq,
362 .handle_irq = pxa25x_handle_irq, 362 .handle_irq = pxa25x_handle_irq,
363 .timer = &pxa_timer, 363 .timer = &pxa_timer,
364 .init_machine = palmte2_init 364 .init_machine = palmte2_init,
365 .restart = pxa_restart,
365MACHINE_END 366MACHINE_END
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c
index 94e9708b349d..ec8249156c08 100644
--- a/arch/arm/mach-pxa/palmtreo.c
+++ b/arch/arm/mach-pxa/palmtreo.c
@@ -452,6 +452,7 @@ MACHINE_START(TREO680, "Palm Treo 680")
452 .handle_irq = pxa27x_handle_irq, 452 .handle_irq = pxa27x_handle_irq,
453 .timer = &pxa_timer, 453 .timer = &pxa_timer,
454 .init_machine = treo680_init, 454 .init_machine = treo680_init,
455 .restart = pxa_restart,
455MACHINE_END 456MACHINE_END
456#endif 457#endif
457 458
@@ -464,5 +465,6 @@ MACHINE_START(CENTRO, "Palm Centro 685")
464 .handle_irq = pxa27x_handle_irq, 465 .handle_irq = pxa27x_handle_irq,
465 .timer = &pxa_timer, 466 .timer = &pxa_timer,
466 .init_machine = centro_init, 467 .init_machine = centro_init,
468 .restart = pxa_restart,
467MACHINE_END 469MACHINE_END
468#endif 470#endif
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index 4e3e45927e95..6170d76dfba8 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -369,5 +369,6 @@ MACHINE_START(PALMTX, "Palm T|X")
369 .init_irq = pxa27x_init_irq, 369 .init_irq = pxa27x_init_irq,
370 .handle_irq = pxa27x_handle_irq, 370 .handle_irq = pxa27x_handle_irq,
371 .timer = &pxa_timer, 371 .timer = &pxa_timer,
372 .init_machine = palmtx_init 372 .init_machine = palmtx_init,
373 .restart = pxa_restart,
373MACHINE_END 374MACHINE_END
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index 68e18baf8e07..b2dff9d415eb 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -404,5 +404,6 @@ MACHINE_START(PALMZ72, "Palm Zire72")
404 .init_irq = pxa27x_init_irq, 404 .init_irq = pxa27x_init_irq,
405 .handle_irq = pxa27x_handle_irq, 405 .handle_irq = pxa27x_handle_irq,
406 .timer = &pxa_timer, 406 .timer = &pxa_timer,
407 .init_machine = palmz72_init 407 .init_machine = palmz72_init,
408 .restart = pxa_restart,
408MACHINE_END 409MACHINE_END
diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c
index 0b825a353537..fe9054435b6f 100644
--- a/arch/arm/mach-pxa/pcm027.c
+++ b/arch/arm/mach-pxa/pcm027.c
@@ -265,4 +265,5 @@ MACHINE_START(PCM027, "Phytec Messtechnik GmbH phyCORE-PXA270")
265 .handle_irq = pxa27x_handle_irq, 265 .handle_irq = pxa27x_handle_irq,
266 .timer = &pxa_timer, 266 .timer = &pxa_timer,
267 .init_machine = pcm027_init, 267 .init_machine = pcm027_init,
268 .restart = pxa_restart,
268MACHINE_END 269MACHINE_END
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index afcb48a5792c..b260ce872d2d 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -417,7 +417,7 @@ static struct i2c_board_info __initdata poodle_i2c_devices[] = {
417 417
418static void poodle_poweroff(void) 418static void poodle_poweroff(void)
419{ 419{
420 arm_machine_restart('h', NULL); 420 pxa_restart('h', NULL);
421} 421}
422 422
423static void __init poodle_init(void) 423static void __init poodle_init(void)
@@ -466,4 +466,5 @@ MACHINE_START(POODLE, "SHARP Poodle")
466 .handle_irq = pxa25x_handle_irq, 466 .handle_irq = pxa25x_handle_irq,
467 .timer = &pxa_timer, 467 .timer = &pxa_timer,
468 .init_machine = poodle_init, 468 .init_machine = poodle_init,
469 .restart = pxa_restart,
469MACHINE_END 470MACHINE_END
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index f0c05f4d12ed..4962b1676629 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -1093,6 +1093,7 @@ MACHINE_START(RAUMFELD_RC, "Raumfeld Controller")
1093 .init_irq = pxa3xx_init_irq, 1093 .init_irq = pxa3xx_init_irq,
1094 .handle_irq = pxa3xx_handle_irq, 1094 .handle_irq = pxa3xx_handle_irq,
1095 .timer = &pxa_timer, 1095 .timer = &pxa_timer,
1096 .restart = pxa_restart,
1096MACHINE_END 1097MACHINE_END
1097#endif 1098#endif
1098 1099
@@ -1104,6 +1105,7 @@ MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector")
1104 .init_irq = pxa3xx_init_irq, 1105 .init_irq = pxa3xx_init_irq,
1105 .handle_irq = pxa3xx_handle_irq, 1106 .handle_irq = pxa3xx_handle_irq,
1106 .timer = &pxa_timer, 1107 .timer = &pxa_timer,
1108 .restart = pxa_restart,
1107MACHINE_END 1109MACHINE_END
1108#endif 1110#endif
1109 1111
@@ -1115,5 +1117,6 @@ MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker")
1115 .init_irq = pxa3xx_init_irq, 1117 .init_irq = pxa3xx_init_irq,
1116 .handle_irq = pxa3xx_handle_irq, 1118 .handle_irq = pxa3xx_handle_irq,
1117 .timer = &pxa_timer, 1119 .timer = &pxa_timer,
1120 .restart = pxa_restart,
1118MACHINE_END 1121MACHINE_END
1119#endif 1122#endif
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index b8bcda15da81..c8497b00cdfe 100644
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -81,8 +81,11 @@ static void do_hw_reset(void)
81 OSMR3 = OSCR + 368640; /* ... in 100 ms */ 81 OSMR3 = OSCR + 368640; /* ... in 100 ms */
82} 82}
83 83
84void arch_reset(char mode, const char *cmd) 84void pxa_restart(char mode, const char *cmd)
85{ 85{
86 local_irq_disable();
87 local_fiq_disable();
88
86 clear_reset_status(RESET_STATUS_ALL); 89 clear_reset_status(RESET_STATUS_ALL);
87 90
88 switch (mode) { 91 switch (mode) {
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index fc2c1e05af9c..878707056e65 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -602,4 +602,5 @@ MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)")
602 .handle_irq = pxa3xx_handle_irq, 602 .handle_irq = pxa3xx_handle_irq,
603 .timer = &pxa_timer, 603 .timer = &pxa_timer,
604 .init_machine = saar_init, 604 .init_machine = saar_init,
605 .restart = pxa_restart,
605MACHINE_END 606MACHINE_END
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
index 3e999e308a2d..b6dbaca460c7 100644
--- a/arch/arm/mach-pxa/saarb.c
+++ b/arch/arm/mach-pxa/saarb.c
@@ -111,5 +111,6 @@ MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)")
111 .handle_irq = pxa3xx_handle_irq, 111 .handle_irq = pxa3xx_handle_irq,
112 .timer = &pxa_timer, 112 .timer = &pxa_timer,
113 .init_machine = saarb_init, 113 .init_machine = saarb_init,
114 .restart = pxa_restart,
114MACHINE_END 115MACHINE_END
115 116
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 2f57d94de727..a7f81a3fd132 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -926,7 +926,7 @@ static inline void spitz_i2c_init(void) {}
926 ******************************************************************************/ 926 ******************************************************************************/
927static void spitz_poweroff(void) 927static void spitz_poweroff(void)
928{ 928{
929 arm_machine_restart('g', NULL); 929 pxa_restart('g', NULL);
930} 930}
931 931
932static void spitz_restart(char mode, const char *cmd) 932static void spitz_restart(char mode, const char *cmd)
@@ -943,7 +943,6 @@ static void __init spitz_init(void)
943{ 943{
944 init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0); 944 init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0);
945 pm_power_off = spitz_poweroff; 945 pm_power_off = spitz_poweroff;
946 arm_pm_restart = spitz_restart;
947 946
948 PMCR = 0x00; 947 PMCR = 0x00;
949 948
@@ -989,6 +988,7 @@ MACHINE_START(SPITZ, "SHARP Spitz")
989 .handle_irq = pxa27x_handle_irq, 988 .handle_irq = pxa27x_handle_irq,
990 .init_machine = spitz_init, 989 .init_machine = spitz_init,
991 .timer = &pxa_timer, 990 .timer = &pxa_timer,
991 .restart = spitz_restart,
992MACHINE_END 992MACHINE_END
993#endif 993#endif
994 994
@@ -1001,6 +1001,7 @@ MACHINE_START(BORZOI, "SHARP Borzoi")
1001 .handle_irq = pxa27x_handle_irq, 1001 .handle_irq = pxa27x_handle_irq,
1002 .init_machine = spitz_init, 1002 .init_machine = spitz_init,
1003 .timer = &pxa_timer, 1003 .timer = &pxa_timer,
1004 .restart = spitz_restart,
1004MACHINE_END 1005MACHINE_END
1005#endif 1006#endif
1006 1007
@@ -1013,5 +1014,6 @@ MACHINE_START(AKITA, "SHARP Akita")
1013 .handle_irq = pxa27x_handle_irq, 1014 .handle_irq = pxa27x_handle_irq,
1014 .init_machine = spitz_init, 1015 .init_machine = spitz_init,
1015 .timer = &pxa_timer, 1016 .timer = &pxa_timer,
1017 .restart = spitz_restart,
1016MACHINE_END 1018MACHINE_END
1017#endif 1019#endif
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 4c9a48bef569..80d7f23ad0fd 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -1005,6 +1005,7 @@ MACHINE_START(INTELMOTE2, "IMOTE 2")
1005 .timer = &pxa_timer, 1005 .timer = &pxa_timer,
1006 .init_machine = imote2_init, 1006 .init_machine = imote2_init,
1007 .atag_offset = 0x100, 1007 .atag_offset = 0x100,
1008 .restart = pxa_restart,
1008MACHINE_END 1009MACHINE_END
1009#endif 1010#endif
1010 1011
@@ -1017,5 +1018,6 @@ MACHINE_START(STARGATE2, "Stargate 2")
1017 .timer = &pxa_timer, 1018 .timer = &pxa_timer,
1018 .init_machine = stargate2_init, 1019 .init_machine = stargate2_init,
1019 .atag_offset = 0x100, 1020 .atag_offset = 0x100,
1021 .restart = pxa_restart,
1020MACHINE_END 1022MACHINE_END
1021#endif 1023#endif
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index ad47bb98f30d..4fa36a3e383c 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -495,4 +495,5 @@ MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)")
495 .handle_irq = pxa3xx_handle_irq, 495 .handle_irq = pxa3xx_handle_irq,
496 .timer = &pxa_timer, 496 .timer = &pxa_timer,
497 .init_machine = tavorevb_init, 497 .init_machine = tavorevb_init,
498 .restart = pxa_restart,
498MACHINE_END 499MACHINE_END
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c
index fd569167302a..8a22879f0bb0 100644
--- a/arch/arm/mach-pxa/tavorevb3.c
+++ b/arch/arm/mach-pxa/tavorevb3.c
@@ -132,4 +132,5 @@ MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)")
132 .handle_irq = pxa3xx_handle_irq, 132 .handle_irq = pxa3xx_handle_irq,
133 .timer = &pxa_timer, 133 .timer = &pxa_timer,
134 .init_machine = evb3_init, 134 .init_machine = evb3_init,
135 .restart = pxa_restart,
135MACHINE_END 136MACHINE_END
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index ef6453041cf1..dfe40f8705aa 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -905,7 +905,7 @@ static struct platform_device *devices[] __initdata = {
905 905
906static void tosa_poweroff(void) 906static void tosa_poweroff(void)
907{ 907{
908 arm_machine_restart('g', NULL); 908 pxa_restart('g', NULL);
909} 909}
910 910
911static void tosa_restart(char mode, const char *cmd) 911static void tosa_restart(char mode, const char *cmd)
@@ -935,7 +935,6 @@ static void __init tosa_init(void)
935 init_gpio_reset(TOSA_GPIO_ON_RESET, 0, 0); 935 init_gpio_reset(TOSA_GPIO_ON_RESET, 0, 0);
936 936
937 pm_power_off = tosa_poweroff; 937 pm_power_off = tosa_poweroff;
938 arm_pm_restart = tosa_restart;
939 938
940 PCFR |= PCFR_OPDE; 939 PCFR |= PCFR_OPDE;
941 940
@@ -978,4 +977,5 @@ MACHINE_START(TOSA, "SHARP Tosa")
978 .handle_irq = pxa25x_handle_irq, 977 .handle_irq = pxa25x_handle_irq,
979 .init_machine = tosa_init, 978 .init_machine = tosa_init,
980 .timer = &pxa_timer, 979 .timer = &pxa_timer,
980 .restart = tosa_restart,
981MACHINE_END 981MACHINE_END
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 1aaed2b17e10..0f30af617d8f 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -561,6 +561,7 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
561 .init_irq = pxa27x_init_irq, 561 .init_irq = pxa27x_init_irq,
562 .handle_irq = pxa27x_handle_irq, 562 .handle_irq = pxa27x_handle_irq,
563 .timer = &pxa_timer, 563 .timer = &pxa_timer,
564 .restart = pxa_restart,
564MACHINE_END 565MACHINE_END
565 566
566MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module") 567MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
@@ -571,4 +572,5 @@ MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
571 .init_irq = pxa27x_init_irq, 572 .init_irq = pxa27x_init_irq,
572 .handle_irq = pxa27x_handle_irq, 573 .handle_irq = pxa27x_handle_irq,
573 .timer = &pxa_timer, 574 .timer = &pxa_timer,
575 .restart = pxa_restart,
574MACHINE_END 576MACHINE_END
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 242ddae332d3..afe2b7495523 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -998,4 +998,5 @@ MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
998 .handle_irq = pxa25x_handle_irq, 998 .handle_irq = pxa25x_handle_irq,
999 .timer = &pxa_timer, 999 .timer = &pxa_timer,
1000 .init_machine = viper_init, 1000 .init_machine = viper_init,
1001 .restart = pxa_restart,
1001MACHINE_END 1002MACHINE_END
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index ca0c6615028c..fed5fb088714 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -721,5 +721,6 @@ MACHINE_START(VPAC270, "Voipac PXA270")
721 .init_irq = pxa27x_init_irq, 721 .init_irq = pxa27x_init_irq,
722 .handle_irq = pxa27x_handle_irq, 722 .handle_irq = pxa27x_handle_irq,
723 .timer = &pxa_timer, 723 .timer = &pxa_timer,
724 .init_machine = vpac270_init 724 .init_machine = vpac270_init,
725 .restart = pxa_restart,
725MACHINE_END 726MACHINE_END
diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c
index 70e1730ef282..4bbe9a36fe74 100644
--- a/arch/arm/mach-pxa/xcep.c
+++ b/arch/arm/mach-pxa/xcep.c
@@ -185,5 +185,6 @@ MACHINE_START(XCEP, "Iskratel XCEP")
185 .init_irq = pxa25x_init_irq, 185 .init_irq = pxa25x_init_irq,
186 .handle_irq = pxa25x_handle_irq, 186 .handle_irq = pxa25x_handle_irq,
187 .timer = &pxa_timer, 187 .timer = &pxa_timer,
188 .restart = pxa_restart,
188MACHINE_END 189MACHINE_END
189 190
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index ead32c90fec1..d75f66ab8c34 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -725,4 +725,5 @@ MACHINE_START(ZIPIT2, "Zipit Z2")
725 .handle_irq = pxa27x_handle_irq, 725 .handle_irq = pxa27x_handle_irq,
726 .timer = &pxa_timer, 726 .timer = &pxa_timer,
727 .init_machine = z2_init, 727 .init_machine = z2_init,
728 .restart = pxa_restart,
728MACHINE_END 729MACHINE_END
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 498b83b089f3..9db35a7fcfc0 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -911,5 +911,6 @@ MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS")
911 .handle_irq = pxa27x_handle_irq, 911 .handle_irq = pxa27x_handle_irq,
912 .timer = &pxa_timer, 912 .timer = &pxa_timer,
913 .init_machine = zeus_init, 913 .init_machine = zeus_init,
914 .restart = pxa_restart,
914MACHINE_END 915MACHINE_END
915 916
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 6c39c3328418..7678b1bf7903 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -430,4 +430,5 @@ MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)")
430 .handle_irq = pxa3xx_handle_irq, 430 .handle_irq = pxa3xx_handle_irq,
431 .timer = &pxa_timer, 431 .timer = &pxa_timer,
432 .init_machine = zylonite_init, 432 .init_machine = zylonite_init,
433 .restart = pxa_restart,
433MACHINE_END 434MACHINE_END
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 47259c89a75e..735b57aaf2d6 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -65,6 +65,5 @@ extern int realview_usb_register(struct resource *res);
65extern void realview_init_early(void); 65extern void realview_init_early(void);
66extern void realview_fixup(struct tag *tags, char **from, 66extern void realview_fixup(struct tag *tags, char **from,
67 struct meminfo *meminfo); 67 struct meminfo *meminfo);
68extern void (*realview_reset)(char);
69 68
70#endif 69#endif
diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h
index 6657ff231161..471b671159ce 100644
--- a/arch/arm/mach-realview/include/mach/system.h
+++ b/arch/arm/mach-realview/include/mach/system.h
@@ -21,12 +21,6 @@
21#ifndef __ASM_ARCH_SYSTEM_H 21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H 22#define __ASM_ARCH_SYSTEM_H
23 23
24#include <linux/io.h>
25#include <mach/hardware.h>
26#include <mach/platform.h>
27
28void (*realview_reset)(char mode);
29
30static inline void arch_idle(void) 24static inline void arch_idle(void)
31{ 25{
32 /* 26 /*
@@ -36,15 +30,4 @@ static inline void arch_idle(void)
36 cpu_do_idle(); 30 cpu_do_idle();
37} 31}
38 32
39static inline void arch_reset(char mode, const char *cmd)
40{
41 /*
42 * To reset, we hit the on-board reset register
43 * in the system FPGA
44 */
45 if (realview_reset)
46 realview_reset(mode);
47 dsb();
48}
49
50#endif 33#endif
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 1ca944aea7f8..f92a920cf507 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -415,7 +415,7 @@ static struct sys_timer realview_eb_timer = {
415 .init = realview_eb_timer_init, 415 .init = realview_eb_timer_init,
416}; 416};
417 417
418static void realview_eb_reset(char mode) 418static void realview_eb_restart(char mode, const char *cmd)
419{ 419{
420 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); 420 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
421 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); 421 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
@@ -427,6 +427,7 @@ static void realview_eb_reset(char mode)
427 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); 427 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
428 if (core_tile_eb11mp()) 428 if (core_tile_eb11mp())
429 __raw_writel(0x0008, reset_ctrl); 429 __raw_writel(0x0008, reset_ctrl);
430 dsb();
430} 431}
431 432
432static void __init realview_eb_init(void) 433static void __init realview_eb_init(void)
@@ -458,7 +459,6 @@ static void __init realview_eb_init(void)
458#ifdef CONFIG_LEDS 459#ifdef CONFIG_LEDS
459 leds_event = realview_leds_event; 460 leds_event = realview_leds_event;
460#endif 461#endif
461 realview_reset = realview_eb_reset;
462} 462}
463 463
464MACHINE_START(REALVIEW_EB, "ARM-RealView EB") 464MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
@@ -474,4 +474,5 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
474#ifdef CONFIG_ZONE_DMA 474#ifdef CONFIG_ZONE_DMA
475 .dma_zone_size = SZ_256M, 475 .dma_zone_size = SZ_256M,
476#endif 476#endif
477 .restart = realview_eb_restart,
477MACHINE_END 478MACHINE_END
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index bd8fec8b20d9..8ec37b29e0fa 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -336,12 +336,13 @@ static struct sys_timer realview_pb1176_timer = {
336 .init = realview_pb1176_timer_init, 336 .init = realview_pb1176_timer_init,
337}; 337};
338 338
339static void realview_pb1176_reset(char mode) 339static void realview_pb1176_restart(char mode, const char *cmd)
340{ 340{
341 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); 341 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
342 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); 342 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
343 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); 343 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
344 __raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl); 344 __raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl);
345 dsb();
345} 346}
346 347
347static void realview_pb1176_fixup(struct tag *tags, char **from, 348static void realview_pb1176_fixup(struct tag *tags, char **from,
@@ -381,7 +382,6 @@ static void __init realview_pb1176_init(void)
381#ifdef CONFIG_LEDS 382#ifdef CONFIG_LEDS
382 leds_event = realview_leds_event; 383 leds_event = realview_leds_event;
383#endif 384#endif
384 realview_reset = realview_pb1176_reset;
385} 385}
386 386
387MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176") 387MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
@@ -397,4 +397,5 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
397#ifdef CONFIG_ZONE_DMA 397#ifdef CONFIG_ZONE_DMA
398 .dma_zone_size = SZ_256M, 398 .dma_zone_size = SZ_256M,
399#endif 399#endif
400 .restart = realview_pb1176_restart,
400MACHINE_END 401MACHINE_END
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index fa73ba81a449..f035fda8b619 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -315,7 +315,7 @@ static struct sys_timer realview_pb11mp_timer = {
315 .init = realview_pb11mp_timer_init, 315 .init = realview_pb11mp_timer_init,
316}; 316};
317 317
318static void realview_pb11mp_reset(char mode) 318static void realview_pb11mp_restart(char mode, const char *cmd)
319{ 319{
320 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); 320 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
321 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); 321 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
@@ -327,6 +327,7 @@ static void realview_pb11mp_reset(char mode)
327 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); 327 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
328 __raw_writel(0x0000, reset_ctrl); 328 __raw_writel(0x0000, reset_ctrl);
329 __raw_writel(0x0004, reset_ctrl); 329 __raw_writel(0x0004, reset_ctrl);
330 dsb();
330} 331}
331 332
332static void __init realview_pb11mp_init(void) 333static void __init realview_pb11mp_init(void)
@@ -355,7 +356,6 @@ static void __init realview_pb11mp_init(void)
355#ifdef CONFIG_LEDS 356#ifdef CONFIG_LEDS
356 leds_event = realview_leds_event; 357 leds_event = realview_leds_event;
357#endif 358#endif
358 realview_reset = realview_pb11mp_reset;
359} 359}
360 360
361MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") 361MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
@@ -371,4 +371,5 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
371#ifdef CONFIG_ZONE_DMA 371#ifdef CONFIG_ZONE_DMA
372 .dma_zone_size = SZ_256M, 372 .dma_zone_size = SZ_256M,
373#endif 373#endif
374 .restart = realview_pb11mp_restart,
374MACHINE_END 375MACHINE_END
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index 6e5f2b9ddb7e..0109c8b440cc 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -271,7 +271,7 @@ static struct sys_timer realview_pba8_timer = {
271 .init = realview_pba8_timer_init, 271 .init = realview_pba8_timer_init,
272}; 272};
273 273
274static void realview_pba8_reset(char mode) 274static void realview_pba8_restart(char mode, const char *cmd)
275{ 275{
276 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); 276 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
277 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); 277 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
@@ -283,6 +283,7 @@ static void realview_pba8_reset(char mode)
283 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); 283 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
284 __raw_writel(0x0000, reset_ctrl); 284 __raw_writel(0x0000, reset_ctrl);
285 __raw_writel(0x0004, reset_ctrl); 285 __raw_writel(0x0004, reset_ctrl);
286 dsb();
286} 287}
287 288
288static void __init realview_pba8_init(void) 289static void __init realview_pba8_init(void)
@@ -305,7 +306,6 @@ static void __init realview_pba8_init(void)
305#ifdef CONFIG_LEDS 306#ifdef CONFIG_LEDS
306 leds_event = realview_leds_event; 307 leds_event = realview_leds_event;
307#endif 308#endif
308 realview_reset = realview_pba8_reset;
309} 309}
310 310
311MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8") 311MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
@@ -321,4 +321,5 @@ MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
321#ifdef CONFIG_ZONE_DMA 321#ifdef CONFIG_ZONE_DMA
322 .dma_zone_size = SZ_256M, 322 .dma_zone_size = SZ_256M,
323#endif 323#endif
324 .restart = realview_pba8_restart,
324MACHINE_END 325MACHINE_END
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index 7aabc21af01c..0194b3e26dc1 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -339,7 +339,7 @@ static void realview_pbx_fixup(struct tag *tags, char **from,
339#endif 339#endif
340} 340}
341 341
342static void realview_pbx_reset(char mode) 342static void realview_pbx_restart(char mode, const char *cmd)
343{ 343{
344 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); 344 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
345 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); 345 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
@@ -351,6 +351,7 @@ static void realview_pbx_reset(char mode)
351 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); 351 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
352 __raw_writel(0x00F0, reset_ctrl); 352 __raw_writel(0x00F0, reset_ctrl);
353 __raw_writel(0x00F4, reset_ctrl); 353 __raw_writel(0x00F4, reset_ctrl);
354 dsb();
354} 355}
355 356
356static void __init realview_pbx_init(void) 357static void __init realview_pbx_init(void)
@@ -388,7 +389,6 @@ static void __init realview_pbx_init(void)
388#ifdef CONFIG_LEDS 389#ifdef CONFIG_LEDS
389 leds_event = realview_leds_event; 390 leds_event = realview_leds_event;
390#endif 391#endif
391 realview_reset = realview_pbx_reset;
392} 392}
393 393
394MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX") 394MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
@@ -404,4 +404,5 @@ MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
404#ifdef CONFIG_ZONE_DMA 404#ifdef CONFIG_ZONE_DMA
405 .dma_zone_size = SZ_256M, 405 .dma_zone_size = SZ_256M,
406#endif 406#endif
407 .restart = realview_pbx_restart,
407MACHINE_END 408MACHINE_END
diff --git a/arch/arm/mach-rpc/include/mach/system.h b/arch/arm/mach-rpc/include/mach/system.h
index a354f4d092c8..359bab94b6af 100644
--- a/arch/arm/mach-rpc/include/mach/system.h
+++ b/arch/arm/mach-rpc/include/mach/system.h
@@ -7,21 +7,7 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#include <linux/io.h>
11#include <mach/hardware.h>
12#include <asm/hardware/iomd.h>
13
14static inline void arch_idle(void) 10static inline void arch_idle(void)
15{ 11{
16 cpu_do_idle(); 12 cpu_do_idle();
17} 13}
18
19static inline void arch_reset(char mode, const char *cmd)
20{
21 iomd_writeb(0, IOMD_ROMCR0);
22
23 /*
24 * Jump into the ROM
25 */
26 soft_restart(0);
27}
diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c
index 8559598ab767..3d44a59fc0df 100644
--- a/arch/arm/mach-rpc/riscpc.c
+++ b/arch/arm/mach-rpc/riscpc.c
@@ -24,6 +24,7 @@
24#include <asm/elf.h> 24#include <asm/elf.h>
25#include <asm/mach-types.h> 25#include <asm/mach-types.h>
26#include <mach/hardware.h> 26#include <mach/hardware.h>
27#include <asm/hardware/iomd.h>
27#include <asm/page.h> 28#include <asm/page.h>
28#include <asm/domain.h> 29#include <asm/domain.h>
29#include <asm/setup.h> 30#include <asm/setup.h>
@@ -214,6 +215,16 @@ static int __init rpc_init(void)
214 215
215arch_initcall(rpc_init); 216arch_initcall(rpc_init);
216 217
218static void rpc_restart(char mode, const char *cmd)
219{
220 iomd_writeb(0, IOMD_ROMCR0);
221
222 /*
223 * Jump into the ROM
224 */
225 soft_restart(0);
226}
227
217extern struct sys_timer ioc_timer; 228extern struct sys_timer ioc_timer;
218 229
219MACHINE_START(RISCPC, "Acorn-RiscPC") 230MACHINE_START(RISCPC, "Acorn-RiscPC")
@@ -224,4 +235,5 @@ MACHINE_START(RISCPC, "Acorn-RiscPC")
224 .map_io = rpc_map_io, 235 .map_io = rpc_map_io,
225 .init_irq = rpc_init_irq, 236 .init_irq = rpc_init_irq,
226 .timer = &ioc_timer, 237 .timer = &ioc_timer,
238 .restart = rpc_restart,
227MACHINE_END 239MACHINE_END
diff --git a/arch/arm/mach-s3c2410/common.h b/arch/arm/mach-s3c2410/common.h
new file mode 100644
index 000000000000..f65dc8062961
--- /dev/null
+++ b/arch/arm/mach-s3c2410/common.h
@@ -0,0 +1,17 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common Header for S3C2410 machines
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __ARCH_ARM_MACH_S3C2410_COMMON_H
13#define __ARCH_ARM_MACH_S3C2410_COMMON_H
14
15void s3c2410_restart(char mode, const char *cmd);
16
17#endif /* __ARCH_ARM_MACH_S3C2410_COMMON_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/reset.h b/arch/arm/mach-s3c2410/include/mach/reset.h
deleted file mode 100644
index f8c9387b049d..000000000000
--- a/arch/arm/mach-s3c2410/include/mach/reset.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/reset.h
2 *
3 * Copyright (c) 2007 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * S3C2410 CPU reset controls
12*/
13
14#ifndef __ASM_ARCH_RESET_H
15#define __ASM_ARCH_RESET_H __FILE__
16
17/* This allows the over-ride of the default reset code
18*/
19
20extern void (*s3c24xx_reset_hook)(void);
21
22#endif /* __ASM_ARCH_RESET_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/system-reset.h b/arch/arm/mach-s3c2410/include/mach/system-reset.h
deleted file mode 100644
index 913893d44650..000000000000
--- a/arch/arm/mach-s3c2410/include/mach/system-reset.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/system-reset.h
2 *
3 * Copyright (c) 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2410 - System define for arch_reset() function
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <mach/hardware.h>
14#include <plat/watchdog-reset.h>
15
16extern void (*s3c24xx_reset_hook)(void);
17
18static void
19arch_reset(char mode, const char *cmd)
20{
21 if (mode == 's') {
22 soft_restart(0);
23 }
24
25 if (s3c24xx_reset_hook)
26 s3c24xx_reset_hook();
27
28 arch_wdt_reset();
29
30 /* we'll take a jump through zero as a poor second */
31 soft_restart(0);
32}
diff --git a/arch/arm/mach-s3c2410/include/mach/system.h b/arch/arm/mach-s3c2410/include/mach/system.h
index a8cbca6701e5..5e215c1a5c8f 100644
--- a/arch/arm/mach-s3c2410/include/mach/system.h
+++ b/arch/arm/mach-s3c2410/include/mach/system.h
@@ -15,12 +15,10 @@
15 15
16#include <mach/map.h> 16#include <mach/map.h>
17#include <mach/idle.h> 17#include <mach/idle.h>
18#include <mach/reset.h>
19 18
20#include <mach/regs-clock.h> 19#include <mach/regs-clock.h>
21 20
22void (*s3c24xx_idle)(void); 21void (*s3c24xx_idle)(void);
23void (*s3c24xx_reset_hook)(void);
24 22
25void s3c24xx_default_idle(void) 23void s3c24xx_default_idle(void)
26{ 24{
@@ -54,5 +52,3 @@ static void arch_idle(void)
54 else 52 else
55 s3c24xx_default_idle(); 53 s3c24xx_default_idle();
56} 54}
57
58#include <mach/system-reset.h>
diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c
index 79838942b0ac..4220cc60de3c 100644
--- a/arch/arm/mach-s3c2410/mach-amlm5900.c
+++ b/arch/arm/mach-s3c2410/mach-amlm5900.c
@@ -63,6 +63,8 @@
63#include <linux/mtd/map.h> 63#include <linux/mtd/map.h>
64#include <linux/mtd/physmap.h> 64#include <linux/mtd/physmap.h>
65 65
66#include "common.h"
67
66static struct resource amlm5900_nor_resource = { 68static struct resource amlm5900_nor_resource = {
67 .start = 0x00000000, 69 .start = 0x00000000,
68 .end = 0x01000000 - 1, 70 .end = 0x01000000 - 1,
@@ -241,4 +243,5 @@ MACHINE_START(AML_M5900, "AML_M5900")
241 .init_irq = s3c24xx_init_irq, 243 .init_irq = s3c24xx_init_irq,
242 .init_machine = amlm5900_init, 244 .init_machine = amlm5900_init,
243 .timer = &s3c24xx_timer, 245 .timer = &s3c24xx_timer,
246 .restart = s3c2410_restart,
244MACHINE_END 247MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index a20ae1ad4062..c6133c6ec18f 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -66,6 +66,7 @@
66 66
67#include "usb-simtec.h" 67#include "usb-simtec.h"
68#include "nor-simtec.h" 68#include "nor-simtec.h"
69#include "common.h"
69 70
70#define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics" 71#define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics"
71 72
@@ -662,4 +663,5 @@ MACHINE_START(BAST, "Simtec-BAST")
662 .init_irq = s3c24xx_init_irq, 663 .init_irq = s3c24xx_init_irq,
663 .init_machine = bast_init, 664 .init_machine = bast_init,
664 .timer = &s3c24xx_timer, 665 .timer = &s3c24xx_timer,
666 .restart = s3c2410_restart,
665MACHINE_END 667MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 05a7d16e59f5..ad9d865651d7 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -70,6 +70,8 @@
70 70
71#include <sound/uda1380.h> 71#include <sound/uda1380.h>
72 72
73#include "common.h"
74
73#define H1940_LATCH ((void __force __iomem *)0xF8000000) 75#define H1940_LATCH ((void __force __iomem *)0xF8000000)
74 76
75#define H1940_PA_LATCH S3C2410_CS2 77#define H1940_PA_LATCH S3C2410_CS2
@@ -751,4 +753,5 @@ MACHINE_START(H1940, "IPAQ-H1940")
751 .init_irq = h1940_init_irq, 753 .init_irq = h1940_init_irq,
752 .init_machine = h1940_init, 754 .init_machine = h1940_init,
753 .timer = &s3c24xx_timer, 755 .timer = &s3c24xx_timer,
756 .restart = s3c2410_restart,
754MACHINE_END 757MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 1dc3e3234417..383d00ca8f60 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -51,6 +51,8 @@
51#include <plat/s3c2410.h> 51#include <plat/s3c2410.h>
52#include <plat/udc.h> 52#include <plat/udc.h>
53 53
54#include "common.h"
55
54static struct map_desc n30_iodesc[] __initdata = { 56static struct map_desc n30_iodesc[] __initdata = {
55 /* nothing here yet */ 57 /* nothing here yet */
56}; 58};
@@ -591,6 +593,7 @@ MACHINE_START(N30, "Acer-N30")
591 .init_machine = n30_init, 593 .init_machine = n30_init,
592 .init_irq = s3c24xx_init_irq, 594 .init_irq = s3c24xx_init_irq,
593 .map_io = n30_map_io, 595 .map_io = n30_map_io,
596 .restart = s3c2410_restart,
594MACHINE_END 597MACHINE_END
595 598
596MACHINE_START(N35, "Acer-N35") 599MACHINE_START(N35, "Acer-N35")
@@ -601,4 +604,5 @@ MACHINE_START(N35, "Acer-N35")
601 .init_machine = n30_init, 604 .init_machine = n30_init,
602 .init_irq = s3c24xx_init_irq, 605 .init_irq = s3c24xx_init_irq,
603 .map_io = n30_map_io, 606 .map_io = n30_map_io,
607 .restart = s3c2410_restart,
604MACHINE_END 608MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c
index f03f3fd9cec9..5f1e0eeb38a9 100644
--- a/arch/arm/mach-s3c2410/mach-otom.c
+++ b/arch/arm/mach-s3c2410/mach-otom.c
@@ -38,6 +38,8 @@
38#include <plat/iic.h> 38#include <plat/iic.h>
39#include <plat/cpu.h> 39#include <plat/cpu.h>
40 40
41#include "common.h"
42
41static struct map_desc otom11_iodesc[] __initdata = { 43static struct map_desc otom11_iodesc[] __initdata = {
42 /* Device area */ 44 /* Device area */
43 { (u32)OTOM_VA_CS8900A_BASE, OTOM_PA_CS8900A_BASE, SZ_16M, MT_DEVICE }, 45 { (u32)OTOM_VA_CS8900A_BASE, OTOM_PA_CS8900A_BASE, SZ_16M, MT_DEVICE },
@@ -121,4 +123,5 @@ MACHINE_START(OTOM, "Nex Vision - Otom 1.1")
121 .init_machine = otom11_init, 123 .init_machine = otom11_init,
122 .init_irq = s3c24xx_init_irq, 124 .init_irq = s3c24xx_init_irq,
123 .timer = &s3c24xx_timer, 125 .timer = &s3c24xx_timer,
126 .restart = s3c2410_restart,
124MACHINE_END 127MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c
index 451852156254..58f2c17b9f0d 100644
--- a/arch/arm/mach-s3c2410/mach-qt2410.c
+++ b/arch/arm/mach-s3c2410/mach-qt2410.c
@@ -62,6 +62,8 @@
62#include <plat/cpu.h> 62#include <plat/cpu.h>
63#include <plat/pm.h> 63#include <plat/pm.h>
64 64
65#include "common.h"
66
65static struct map_desc qt2410_iodesc[] __initdata = { 67static struct map_desc qt2410_iodesc[] __initdata = {
66 { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE } 68 { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }
67}; 69};
@@ -350,6 +352,5 @@ MACHINE_START(QT2410, "QT2410")
350 .init_irq = s3c24xx_init_irq, 352 .init_irq = s3c24xx_init_irq,
351 .init_machine = qt2410_machine_init, 353 .init_machine = qt2410_machine_init,
352 .timer = &s3c24xx_timer, 354 .timer = &s3c24xx_timer,
355 .restart = s3c2410_restart,
353MACHINE_END 356MACHINE_END
354
355
diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c
index 99c9dfdb71c7..bdc27e772876 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2410.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2410.c
@@ -54,6 +54,8 @@
54 54
55#include <plat/common-smdk.h> 55#include <plat/common-smdk.h>
56 56
57#include "common.h"
58
57static struct map_desc smdk2410_iodesc[] __initdata = { 59static struct map_desc smdk2410_iodesc[] __initdata = {
58 /* nothing here yet */ 60 /* nothing here yet */
59}; 61};
@@ -116,6 +118,5 @@ MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switc
116 .init_irq = s3c24xx_init_irq, 118 .init_irq = s3c24xx_init_irq,
117 .init_machine = smdk2410_init, 119 .init_machine = smdk2410_init,
118 .timer = &s3c24xx_timer, 120 .timer = &s3c24xx_timer,
121 .restart = s3c2410_restart,
119MACHINE_END 122MACHINE_END
120
121
diff --git a/arch/arm/mach-s3c2410/mach-tct_hammer.c b/arch/arm/mach-s3c2410/mach-tct_hammer.c
index e0d0b6fb2800..1114666f0efb 100644
--- a/arch/arm/mach-s3c2410/mach-tct_hammer.c
+++ b/arch/arm/mach-s3c2410/mach-tct_hammer.c
@@ -54,6 +54,8 @@
54#include <linux/mtd/map.h> 54#include <linux/mtd/map.h>
55#include <linux/mtd/physmap.h> 55#include <linux/mtd/physmap.h>
56 56
57#include "common.h"
58
57static struct resource tct_hammer_nor_resource = { 59static struct resource tct_hammer_nor_resource = {
58 .start = 0x00000000, 60 .start = 0x00000000,
59 .end = 0x01000000 - 1, 61 .end = 0x01000000 - 1,
@@ -151,4 +153,5 @@ MACHINE_START(TCT_HAMMER, "TCT_HAMMER")
151 .init_irq = s3c24xx_init_irq, 153 .init_irq = s3c24xx_init_irq,
152 .init_machine = tct_hammer_init, 154 .init_machine = tct_hammer_init,
153 .timer = &s3c24xx_timer, 155 .timer = &s3c24xx_timer,
156 .restart = s3c2410_restart,
154MACHINE_END 157MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index df47e8e90065..cc7032b5c65b 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -53,6 +53,7 @@
53 53
54#include "usb-simtec.h" 54#include "usb-simtec.h"
55#include "nor-simtec.h" 55#include "nor-simtec.h"
56#include "common.h"
56 57
57/* macros for virtual address mods for the io space entries */ 58/* macros for virtual address mods for the io space entries */
58#define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5) 59#define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
@@ -405,4 +406,5 @@ MACHINE_START(VR1000, "Thorcom-VR1000")
405 .init_machine = vr1000_init, 406 .init_machine = vr1000_init,
406 .init_irq = s3c24xx_init_irq, 407 .init_irq = s3c24xx_init_irq,
407 .timer = &s3c24xx_timer, 408 .timer = &s3c24xx_timer,
409 .restart = s3c2410_restart,
408MACHINE_END 410MACHINE_END
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index 3d7ebc557a72..489c826e92a7 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -42,6 +42,7 @@
42#include <plat/clock.h> 42#include <plat/clock.h>
43#include <plat/pll.h> 43#include <plat/pll.h>
44#include <plat/pm.h> 44#include <plat/pm.h>
45#include <plat/watchdog-reset.h>
45 46
46#include <plat/gpio-core.h> 47#include <plat/gpio-core.h>
47#include <plat/gpio-cfg.h> 48#include <plat/gpio-cfg.h>
@@ -183,3 +184,15 @@ int __init s3c2410a_init(void)
183 s3c2410_sysdev.cls = &s3c2410a_sysclass; 184 s3c2410_sysdev.cls = &s3c2410a_sysclass;
184 return s3c2410_init(); 185 return s3c2410_init();
185} 186}
187
188void s3c2410_restart(char mode, const char *cmd)
189{
190 if (mode == 's') {
191 soft_restart(0);
192 }
193
194 arch_wdt_reset();
195
196 /* we'll take a jump through zero as a poor second */
197 soft_restart(0);
198}
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c
index 286ef1738c61..ae73ba34ecc6 100644
--- a/arch/arm/mach-s3c2412/mach-jive.c
+++ b/arch/arm/mach-s3c2412/mach-jive.c
@@ -48,6 +48,7 @@
48#include <linux/mtd/nand_ecc.h> 48#include <linux/mtd/nand_ecc.h>
49#include <linux/mtd/partitions.h> 49#include <linux/mtd/partitions.h>
50 50
51#include <plat/s3c2412.h>
51#include <plat/gpio-cfg.h> 52#include <plat/gpio-cfg.h>
52#include <plat/clock.h> 53#include <plat/clock.h>
53#include <plat/devs.h> 54#include <plat/devs.h>
@@ -661,4 +662,5 @@ MACHINE_START(JIVE, "JIVE")
661 .map_io = jive_map_io, 662 .map_io = jive_map_io,
662 .init_machine = jive_machine_init, 663 .init_machine = jive_machine_init,
663 .timer = &s3c24xx_timer, 664 .timer = &s3c24xx_timer,
665 .restart = s3c2412_restart,
664MACHINE_END 666MACHINE_END
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c
index f1eec1b54932..b11451b853d8 100644
--- a/arch/arm/mach-s3c2412/mach-smdk2413.c
+++ b/arch/arm/mach-s3c2412/mach-smdk2413.c
@@ -134,6 +134,7 @@ MACHINE_START(S3C2413, "S3C2413")
134 .map_io = smdk2413_map_io, 134 .map_io = smdk2413_map_io,
135 .init_machine = smdk2413_machine_init, 135 .init_machine = smdk2413_machine_init,
136 .timer = &s3c24xx_timer, 136 .timer = &s3c24xx_timer,
137 .restart = s3c2412_restart,
137MACHINE_END 138MACHINE_END
138 139
139MACHINE_START(SMDK2412, "SMDK2412") 140MACHINE_START(SMDK2412, "SMDK2412")
@@ -145,6 +146,7 @@ MACHINE_START(SMDK2412, "SMDK2412")
145 .map_io = smdk2413_map_io, 146 .map_io = smdk2413_map_io,
146 .init_machine = smdk2413_machine_init, 147 .init_machine = smdk2413_machine_init,
147 .timer = &s3c24xx_timer, 148 .timer = &s3c24xx_timer,
149 .restart = s3c2412_restart,
148MACHINE_END 150MACHINE_END
149 151
150MACHINE_START(SMDK2413, "SMDK2413") 152MACHINE_START(SMDK2413, "SMDK2413")
@@ -156,4 +158,5 @@ MACHINE_START(SMDK2413, "SMDK2413")
156 .map_io = smdk2413_map_io, 158 .map_io = smdk2413_map_io,
157 .init_machine = smdk2413_machine_init, 159 .init_machine = smdk2413_machine_init,
158 .timer = &s3c24xx_timer, 160 .timer = &s3c24xx_timer,
161 .restart = s3c2412_restart,
159MACHINE_END 162MACHINE_END
diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c
index 1bbb1ef5f4ff..94bfaa1fb148 100644
--- a/arch/arm/mach-s3c2412/mach-vstms.c
+++ b/arch/arm/mach-s3c2412/mach-vstms.c
@@ -162,4 +162,5 @@ MACHINE_START(VSTMS, "VSTMS")
162 .init_machine = vstms_init, 162 .init_machine = vstms_init,
163 .map_io = vstms_map_io, 163 .map_io = vstms_map_io,
164 .timer = &s3c24xx_timer, 164 .timer = &s3c24xx_timer,
165 .restart = s3c2412_restart,
165MACHINE_END 166MACHINE_END
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index 57a1e01e4e50..867ce2e269f6 100644
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -32,7 +32,6 @@
32#include <asm/proc-fns.h> 32#include <asm/proc-fns.h>
33#include <asm/irq.h> 33#include <asm/irq.h>
34 34
35#include <mach/reset.h>
36#include <mach/idle.h> 35#include <mach/idle.h>
37 36
38#include <plat/cpu-freq.h> 37#include <plat/cpu-freq.h>
@@ -131,8 +130,11 @@ static void s3c2412_idle(void)
131 cpu_do_idle(); 130 cpu_do_idle();
132} 131}
133 132
134static void s3c2412_hard_reset(void) 133void s3c2412_restart(char mode, const char *cmd)
135{ 134{
135 if (mode == 's')
136 soft_restart(0);
137
136 /* errata "Watch-dog/Software Reset Problem" specifies that 138 /* errata "Watch-dog/Software Reset Problem" specifies that
137 * this reset must be done with the SYSCLK sourced from 139 * this reset must be done with the SYSCLK sourced from
138 * EXTCLK instead of FOUT to avoid a glitch in the reset 140 * EXTCLK instead of FOUT to avoid a glitch in the reset
@@ -164,10 +166,6 @@ void __init s3c2412_map_io(void)
164 166
165 s3c24xx_idle = s3c2412_idle; 167 s3c24xx_idle = s3c2412_idle;
166 168
167 /* set custom reset hook */
168
169 s3c24xx_reset_hook = s3c2412_hard_reset;
170
171 /* register our io-tables */ 169 /* register our io-tables */
172 170
173 iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc)); 171 iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc));
diff --git a/arch/arm/mach-s3c2416/mach-smdk2416.c b/arch/arm/mach-s3c2416/mach-smdk2416.c
index a9eee531ca76..66b71736609c 100644
--- a/arch/arm/mach-s3c2416/mach-smdk2416.c
+++ b/arch/arm/mach-s3c2416/mach-smdk2416.c
@@ -251,4 +251,5 @@ MACHINE_START(SMDK2416, "SMDK2416")
251 .map_io = smdk2416_map_io, 251 .map_io = smdk2416_map_io,
252 .init_machine = smdk2416_machine_init, 252 .init_machine = smdk2416_machine_init,
253 .timer = &s3c24xx_timer, 253 .timer = &s3c24xx_timer,
254 .restart = s3c2416_restart,
254MACHINE_END 255MACHINE_END
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c
index ee214bc83c83..46062232bbc7 100644
--- a/arch/arm/mach-s3c2416/s3c2416.c
+++ b/arch/arm/mach-s3c2416/s3c2416.c
@@ -44,7 +44,6 @@
44#include <asm/proc-fns.h> 44#include <asm/proc-fns.h>
45#include <asm/irq.h> 45#include <asm/irq.h>
46 46
47#include <mach/reset.h>
48#include <mach/idle.h> 47#include <mach/idle.h>
49#include <mach/regs-s3c2443-clock.h> 48#include <mach/regs-s3c2443-clock.h>
50 49
@@ -76,8 +75,11 @@ static struct sys_device s3c2416_sysdev = {
76 .cls = &s3c2416_sysclass, 75 .cls = &s3c2416_sysclass,
77}; 76};
78 77
79static void s3c2416_hard_reset(void) 78void s3c2416_restart(char mode, const char *cmd)
80{ 79{
80 if (mode == 's')
81 soft_restart(0);
82
81 __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST); 83 __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST);
82} 84}
83 85
@@ -85,7 +87,6 @@ int __init s3c2416_init(void)
85{ 87{
86 printk(KERN_INFO "S3C2416: Initializing architecture\n"); 88 printk(KERN_INFO "S3C2416: Initializing architecture\n");
87 89
88 s3c24xx_reset_hook = s3c2416_hard_reset;
89 /* s3c24xx_idle = s3c2416_idle; */ 90 /* s3c24xx_idle = s3c2416_idle; */
90 91
91 /* change WDT IRQ number */ 92 /* change WDT IRQ number */
diff --git a/arch/arm/mach-s3c2440/common.h b/arch/arm/mach-s3c2440/common.h
new file mode 100644
index 000000000000..db8a98ac68c5
--- /dev/null
+++ b/arch/arm/mach-s3c2440/common.h
@@ -0,0 +1,17 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common Header for S3C2440 machines
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H
13#define __ARCH_ARM_MACH_S3C2440_COMMON_H
14
15void s3c2440_restart(char mode, const char *cmd);
16
17#endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index 74f92fc3fd04..121ff8d2c887 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -55,6 +55,8 @@
55#include <plat/cpu.h> 55#include <plat/cpu.h>
56#include <plat/audio-simtec.h> 56#include <plat/audio-simtec.h>
57 57
58#include "common.h"
59
58#define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics" 60#define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics"
59 61
60static struct map_desc anubis_iodesc[] __initdata = { 62static struct map_desc anubis_iodesc[] __initdata = {
@@ -503,4 +505,5 @@ MACHINE_START(ANUBIS, "Simtec-Anubis")
503 .init_machine = anubis_init, 505 .init_machine = anubis_init,
504 .init_irq = s3c24xx_init_irq, 506 .init_irq = s3c24xx_init_irq,
505 .timer = &s3c24xx_timer, 507 .timer = &s3c24xx_timer,
508 .restart = s3c2440_restart,
506MACHINE_END 509MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c
index 38887ee0c784..b7e334f07da4 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -49,6 +49,8 @@
49#include <plat/cpu.h> 49#include <plat/cpu.h>
50#include <plat/mci.h> 50#include <plat/mci.h>
51 51
52#include "common.h"
53
52static struct map_desc at2440evb_iodesc[] __initdata = { 54static struct map_desc at2440evb_iodesc[] __initdata = {
53 /* Nothing here */ 55 /* Nothing here */
54}; 56};
@@ -238,4 +240,5 @@ MACHINE_START(AT2440EVB, "AT2440EVB")
238 .init_machine = at2440evb_init, 240 .init_machine = at2440evb_init,
239 .init_irq = s3c24xx_init_irq, 241 .init_irq = s3c24xx_init_irq,
240 .timer = &s3c24xx_timer, 242 .timer = &s3c24xx_timer,
243 .restart = s3c2440_restart,
241MACHINE_END 244MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c
index de1e0ff46cec..5859e609d28c 100644
--- a/arch/arm/mach-s3c2440/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -90,6 +90,7 @@
90#include <plat/iic.h> 90#include <plat/iic.h>
91#include <plat/ts.h> 91#include <plat/ts.h>
92 92
93#include "common.h"
93 94
94static struct pcf50633 *gta02_pcf; 95static struct pcf50633 *gta02_pcf;
95 96
@@ -600,4 +601,5 @@ MACHINE_START(NEO1973_GTA02, "GTA02")
600 .init_irq = s3c24xx_init_irq, 601 .init_irq = s3c24xx_init_irq,
601 .init_machine = gta02_machine_init, 602 .init_machine = gta02_machine_init,
602 .timer = &s3c24xx_timer, 603 .timer = &s3c24xx_timer,
604 .restart = s3c2440_restart,
603MACHINE_END 605MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index 91fe0b4c95f1..437322ffd88d 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -60,6 +60,8 @@
60 60
61#include <sound/s3c24xx_uda134x.h> 61#include <sound/s3c24xx_uda134x.h>
62 62
63#include "common.h"
64
63#define MACH_MINI2440_DM9K_BASE (S3C2410_CS4 + 0x300) 65#define MACH_MINI2440_DM9K_BASE (S3C2410_CS4 + 0x300)
64 66
65static struct map_desc mini2440_iodesc[] __initdata = { 67static struct map_desc mini2440_iodesc[] __initdata = {
@@ -681,4 +683,5 @@ MACHINE_START(MINI2440, "MINI2440")
681 .init_machine = mini2440_init, 683 .init_machine = mini2440_init,
682 .init_irq = s3c24xx_init_irq, 684 .init_irq = s3c24xx_init_irq,
683 .timer = &s3c24xx_timer, 685 .timer = &s3c24xx_timer,
686 .restart = s3c2440_restart,
684MACHINE_END 687MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c
index 61c0bf148165..40eaf844bc1f 100644
--- a/arch/arm/mach-s3c2440/mach-nexcoder.c
+++ b/arch/arm/mach-s3c2440/mach-nexcoder.c
@@ -47,6 +47,8 @@
47#include <plat/devs.h> 47#include <plat/devs.h>
48#include <plat/cpu.h> 48#include <plat/cpu.h>
49 49
50#include "common.h"
51
50static struct map_desc nexcoder_iodesc[] __initdata = { 52static struct map_desc nexcoder_iodesc[] __initdata = {
51 /* nothing here yet */ 53 /* nothing here yet */
52}; 54};
@@ -156,4 +158,5 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440")
156 .init_machine = nexcoder_init, 158 .init_machine = nexcoder_init,
157 .init_irq = s3c24xx_init_irq, 159 .init_irq = s3c24xx_init_irq,
158 .timer = &s3c24xx_timer, 160 .timer = &s3c24xx_timer,
161 .restart = s3c2440_restart,
159MACHINE_END 162MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index dc142ebf8cba..e795715fba30 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -54,6 +54,8 @@
54#include <plat/devs.h> 54#include <plat/devs.h>
55#include <plat/cpu.h> 55#include <plat/cpu.h>
56 56
57#include "common.h"
58
57/* onboard perihperal map */ 59/* onboard perihperal map */
58 60
59static struct map_desc osiris_iodesc[] __initdata = { 61static struct map_desc osiris_iodesc[] __initdata = {
@@ -452,4 +454,5 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS")
452 .init_irq = s3c24xx_init_irq, 454 .init_irq = s3c24xx_init_irq,
453 .init_machine = osiris_init, 455 .init_machine = osiris_init,
454 .timer = &s3c24xx_timer, 456 .timer = &s3c24xx_timer,
457 .restart = s3c2440_restart,
455MACHINE_END 458MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c
index 0d3453bf567c..1c50d3e09177 100644
--- a/arch/arm/mach-s3c2440/mach-rx1950.c
+++ b/arch/arm/mach-s3c2440/mach-rx1950.c
@@ -62,6 +62,8 @@
62 62
63#include <sound/uda1380.h> 63#include <sound/uda1380.h>
64 64
65#include "common.h"
66
65#define LCD_PWM_PERIOD 192960 67#define LCD_PWM_PERIOD 192960
66#define LCD_PWM_DUTY 127353 68#define LCD_PWM_DUTY 127353
67 69
@@ -832,4 +834,5 @@ MACHINE_START(RX1950, "HP iPAQ RX1950")
832 .init_irq = s3c24xx_init_irq, 834 .init_irq = s3c24xx_init_irq,
833 .init_machine = rx1950_init_machine, 835 .init_machine = rx1950_init_machine,
834 .timer = &s3c24xx_timer, 836 .timer = &s3c24xx_timer,
837 .restart = s3c2440_restart,
835MACHINE_END 838MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index e19499c2f909..4d20a016b85d 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -51,6 +51,8 @@
51#include <plat/cpu.h> 51#include <plat/cpu.h>
52#include <plat/pm.h> 52#include <plat/pm.h>
53 53
54#include "common.h"
55
54static struct map_desc rx3715_iodesc[] __initdata = { 56static struct map_desc rx3715_iodesc[] __initdata = {
55 /* dump ISA space somewhere unused */ 57 /* dump ISA space somewhere unused */
56 58
@@ -224,4 +226,5 @@ MACHINE_START(RX3715, "IPAQ-RX3715")
224 .init_irq = rx3715_init_irq, 226 .init_irq = rx3715_init_irq,
225 .init_machine = rx3715_init_machine, 227 .init_machine = rx3715_init_machine,
226 .timer = &s3c24xx_timer, 228 .timer = &s3c24xx_timer,
229 .restart = s3c2440_restart,
227MACHINE_END 230MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c
index 36eeb4197a84..1deb60d12a60 100644
--- a/arch/arm/mach-s3c2440/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2440/mach-smdk2440.c
@@ -47,6 +47,8 @@
47 47
48#include <plat/common-smdk.h> 48#include <plat/common-smdk.h>
49 49
50#include "common.h"
51
50static struct map_desc smdk2440_iodesc[] __initdata = { 52static struct map_desc smdk2440_iodesc[] __initdata = {
51 /* ISA IO Space map (memory space selected by A24) */ 53 /* ISA IO Space map (memory space selected by A24) */
52 54
@@ -181,4 +183,5 @@ MACHINE_START(S3C2440, "SMDK2440")
181 .map_io = smdk2440_map_io, 183 .map_io = smdk2440_map_io,
182 .init_machine = smdk2440_machine_init, 184 .init_machine = smdk2440_machine_init,
183 .timer = &s3c24xx_timer, 185 .timer = &s3c24xx_timer,
186 .restart = s3c2440_restart,
184MACHINE_END 187MACHINE_END
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index 37f8cc6aabd4..42d73f1e0cef 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -35,6 +35,7 @@
35#include <plat/cpu.h> 35#include <plat/cpu.h>
36#include <plat/s3c244x.h> 36#include <plat/s3c244x.h>
37#include <plat/pm.h> 37#include <plat/pm.h>
38#include <plat/watchdog-reset.h>
38 39
39#include <plat/gpio-core.h> 40#include <plat/gpio-core.h>
40#include <plat/gpio-cfg.h> 41#include <plat/gpio-cfg.h>
@@ -73,3 +74,15 @@ void __init s3c2440_map_io(void)
73 s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up; 74 s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
74 s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up; 75 s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
75} 76}
77
78void s3c2440_restart(char mode, const char *cmd)
79{
80 if (mode == 's') {
81 soft_restart(0);
82 }
83
84 arch_wdt_reset();
85
86 /* we'll take a jump through zero as a poor second */
87 soft_restart(0);
88}
diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c
index bec107e00441..209236956222 100644
--- a/arch/arm/mach-s3c2443/mach-smdk2443.c
+++ b/arch/arm/mach-s3c2443/mach-smdk2443.c
@@ -145,4 +145,5 @@ MACHINE_START(SMDK2443, "SMDK2443")
145 .map_io = smdk2443_map_io, 145 .map_io = smdk2443_map_io,
146 .init_machine = smdk2443_machine_init, 146 .init_machine = smdk2443_machine_init,
147 .timer = &s3c24xx_timer, 147 .timer = &s3c24xx_timer,
148 .restart = s3c2443_restart,
148MACHINE_END 149MACHINE_END
diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c
index a22b771b0f36..4568ded338d0 100644
--- a/arch/arm/mach-s3c2443/s3c2443.c
+++ b/arch/arm/mach-s3c2443/s3c2443.c
@@ -31,7 +31,6 @@
31#include <asm/irq.h> 31#include <asm/irq.h>
32 32
33#include <mach/regs-s3c2443-clock.h> 33#include <mach/regs-s3c2443-clock.h>
34#include <mach/reset.h>
35 34
36#include <plat/gpio-core.h> 35#include <plat/gpio-core.h>
37#include <plat/gpio-cfg.h> 36#include <plat/gpio-cfg.h>
@@ -57,8 +56,11 @@ static struct sys_device s3c2443_sysdev = {
57 .cls = &s3c2443_sysclass, 56 .cls = &s3c2443_sysclass,
58}; 57};
59 58
60static void s3c2443_hard_reset(void) 59void s3c2443_restart(char mode, const char *cmd)
61{ 60{
61 if (mode == 's')
62 soft_restart(0);
63
62 __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST); 64 __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST);
63} 65}
64 66
@@ -66,8 +68,6 @@ int __init s3c2443_init(void)
66{ 68{
67 printk("S3C2443: Initialising architecture\n"); 69 printk("S3C2443: Initialising architecture\n");
68 70
69 s3c24xx_reset_hook = s3c2443_hard_reset;
70
71 s3c_nand_setname("s3c2412-nand"); 71 s3c_nand_setname("s3c2412-nand");
72 s3c_fb_setname("s3c2443-fb"); 72 s3c_fb_setname("s3c2443-fb");
73 73
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index cfc0b9941808..f37016cebbe3 100644
--- a/arch/arm/mach-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -10,54 +10,49 @@ obj-m :=
10obj-n := 10obj-n :=
11obj- := 11obj- :=
12 12
13# Core files 13# Core
14obj-y += cpu.o
15obj-y += clock.o
16 14
17# Core support for S3C6400 system 15obj-y += common.o clock.o
16
17# Core support
18 18
19obj-$(CONFIG_CPU_S3C6400) += s3c6400.o 19obj-$(CONFIG_CPU_S3C6400) += s3c6400.o
20obj-$(CONFIG_CPU_S3C6410) += s3c6410.o 20obj-$(CONFIG_CPU_S3C6410) += s3c6410.o
21 21
22obj-y += irq.o 22# PM
23obj-y += irq-eint.o 23
24obj-$(CONFIG_PM) += pm.o irq-pm.o sleep.o
24 25
25# DMA support 26# DMA support
26 27
27obj-$(CONFIG_S3C64XX_DMA) += dma.o 28obj-$(CONFIG_S3C64XX_DMA) += dma.o
28 29
29# Device setup 30# Device support
30 31
31obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o 32obj-y += dev-uart.o
32obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o 33obj-y += dev-audio.o
33obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o 34obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
34obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o
35obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o
36obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
37obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
38 35
39# PM 36# Device setup
40 37
41obj-$(CONFIG_PM) += pm.o 38obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
42obj-$(CONFIG_PM) += sleep.o 39obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o
43obj-$(CONFIG_PM) += irq-pm.o 40obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o
41obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o
42obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o
43obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o
44obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
44 45
45# Machine support 46# Machine support
46 47
47obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o 48obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o
48obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o 49obj-$(CONFIG_MACH_HMT) += mach-hmt.o
49obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o 50obj-$(CONFIG_MACH_MINI6410) += mach-mini6410.o
50obj-$(CONFIG_MACH_REAL6410) += mach-real6410.o 51obj-$(CONFIG_MACH_NCP) += mach-ncp.o
51obj-$(CONFIG_MACH_MINI6410) += mach-mini6410.o 52obj-$(CONFIG_MACH_REAL6410) += mach-real6410.o
52obj-$(CONFIG_MACH_NCP) += mach-ncp.o 53obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o
53obj-$(CONFIG_MACH_HMT) += mach-hmt.o 54obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o
54obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o 55obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o
55obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o 56obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o
56obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o 57obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o
57obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o mach-crag6410-module.o 58obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o mach-crag6410-module.o
58
59# device support
60
61obj-y += dev-uart.o
62obj-y += dev-audio.o
63obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 39c238d7a3dc..625219b9cefc 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -705,7 +705,7 @@ static struct clksrc_clk *init_parents[] = {
705 705
706#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) 706#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
707 707
708void __init_or_cpufreq s3c6400_setup_clocks(void) 708void __init_or_cpufreq s3c64xx_setup_clocks(void)
709{ 709{
710 struct clk *xtal_clk; 710 struct clk *xtal_clk;
711 unsigned long xtal; 711 unsigned long xtal;
@@ -804,7 +804,7 @@ static struct clk *clks[] __initdata = {
804 * as ARMCLK as well as the necessary parent clocks. 804 * as ARMCLK as well as the necessary parent clocks.
805 * 805 *
806 * This call does not setup the clocks, which is left to the 806 * This call does not setup the clocks, which is left to the
807 * s3c6400_setup_clocks() call which may be needed by the cpufreq 807 * s3c64xx_setup_clocks() call which may be needed by the cpufreq
808 * or resume code to re-set the clocks if the bootloader has changed 808 * or resume code to re-set the clocks if the bootloader has changed
809 * them. 809 * them.
810 */ 810 */
diff --git a/arch/arm/mach-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/common.c
index 4d203be1f4c3..35182ba049da 100644
--- a/arch/arm/mach-s3c64xx/irq-eint.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -1,11 +1,13 @@
1/* arch/arm/plat-s3c64xx/irq-eint.c 1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
2 * 4 *
3 * Copyright 2008 Openmoko, Inc. 5 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 6 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk> 7 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/ 8 * http://armlinux.simtec.co.uk/
7 * 9 *
8 * S3C64XX - Interrupt handling for IRQ_EINT(x) 10 * Common Codes for S3C64XX machines
9 * 11 *
10 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as 13 * it under the terms of the GNU General Public License version 2 as
@@ -13,21 +15,183 @@
13 */ 15 */
14 16
15#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/module.h>
16#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/ioport.h>
17#include <linux/sysdev.h> 22#include <linux/sysdev.h>
18#include <linux/gpio.h> 23#include <linux/serial_core.h>
19#include <linux/irq.h> 24#include <linux/platform_device.h>
20#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/dma-mapping.h>
27#include <linux/irq.h>
28#include <linux/gpio.h>
21 29
30#include <asm/mach/arch.h>
31#include <asm/mach/map.h>
22#include <asm/hardware/vic.h> 32#include <asm/hardware/vic.h>
23 33
24#include <plat/regs-irqtype.h> 34#include <mach/map.h>
35#include <mach/hardware.h>
25#include <mach/regs-gpio.h> 36#include <mach/regs-gpio.h>
26#include <plat/gpio-cfg.h>
27 37
28#include <mach/map.h>
29#include <plat/cpu.h> 38#include <plat/cpu.h>
39#include <plat/clock.h>
40#include <plat/devs.h>
30#include <plat/pm.h> 41#include <plat/pm.h>
42#include <plat/gpio-cfg.h>
43#include <plat/irq-uart.h>
44#include <plat/irq-vic-timer.h>
45#include <plat/regs-irqtype.h>
46#include <plat/regs-serial.h>
47#include <plat/watchdog-reset.h>
48
49#include "common.h"
50
51/* uart registration process */
52
53void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
54{
55 s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
56}
57
58/* table of supported CPUs */
59
60static const char name_s3c6400[] = "S3C6400";
61static const char name_s3c6410[] = "S3C6410";
62
63static struct cpu_table cpu_ids[] __initdata = {
64 {
65 .idcode = S3C6400_CPU_ID,
66 .idmask = S3C64XX_CPU_MASK,
67 .map_io = s3c6400_map_io,
68 .init_clocks = s3c6400_init_clocks,
69 .init_uarts = s3c64xx_init_uarts,
70 .init = s3c6400_init,
71 .name = name_s3c6400,
72 }, {
73 .idcode = S3C6410_CPU_ID,
74 .idmask = S3C64XX_CPU_MASK,
75 .map_io = s3c6410_map_io,
76 .init_clocks = s3c6410_init_clocks,
77 .init_uarts = s3c64xx_init_uarts,
78 .init = s3c6410_init,
79 .name = name_s3c6410,
80 },
81};
82
83/* minimal IO mapping */
84
85/* see notes on uart map in arch/arm/mach-s3c64xx/include/mach/debug-macro.S */
86#define UART_OFFS (S3C_PA_UART & 0xfffff)
87
88static struct map_desc s3c_iodesc[] __initdata = {
89 {
90 .virtual = (unsigned long)S3C_VA_SYS,
91 .pfn = __phys_to_pfn(S3C64XX_PA_SYSCON),
92 .length = SZ_4K,
93 .type = MT_DEVICE,
94 }, {
95 .virtual = (unsigned long)S3C_VA_MEM,
96 .pfn = __phys_to_pfn(S3C64XX_PA_SROM),
97 .length = SZ_4K,
98 .type = MT_DEVICE,
99 }, {
100 .virtual = (unsigned long)(S3C_VA_UART + UART_OFFS),
101 .pfn = __phys_to_pfn(S3C_PA_UART),
102 .length = SZ_4K,
103 .type = MT_DEVICE,
104 }, {
105 .virtual = (unsigned long)VA_VIC0,
106 .pfn = __phys_to_pfn(S3C64XX_PA_VIC0),
107 .length = SZ_16K,
108 .type = MT_DEVICE,
109 }, {
110 .virtual = (unsigned long)VA_VIC1,
111 .pfn = __phys_to_pfn(S3C64XX_PA_VIC1),
112 .length = SZ_16K,
113 .type = MT_DEVICE,
114 }, {
115 .virtual = (unsigned long)S3C_VA_TIMER,
116 .pfn = __phys_to_pfn(S3C_PA_TIMER),
117 .length = SZ_16K,
118 .type = MT_DEVICE,
119 }, {
120 .virtual = (unsigned long)S3C64XX_VA_GPIO,
121 .pfn = __phys_to_pfn(S3C64XX_PA_GPIO),
122 .length = SZ_4K,
123 .type = MT_DEVICE,
124 }, {
125 .virtual = (unsigned long)S3C64XX_VA_MODEM,
126 .pfn = __phys_to_pfn(S3C64XX_PA_MODEM),
127 .length = SZ_4K,
128 .type = MT_DEVICE,
129 }, {
130 .virtual = (unsigned long)S3C_VA_WATCHDOG,
131 .pfn = __phys_to_pfn(S3C64XX_PA_WATCHDOG),
132 .length = SZ_4K,
133 .type = MT_DEVICE,
134 }, {
135 .virtual = (unsigned long)S3C_VA_USB_HSPHY,
136 .pfn = __phys_to_pfn(S3C64XX_PA_USB_HSPHY),
137 .length = SZ_1K,
138 .type = MT_DEVICE,
139 },
140};
141
142struct sysdev_class s3c64xx_sysclass = {
143 .name = "s3c64xx-core",
144};
145
146static struct sys_device s3c64xx_sysdev = {
147 .cls = &s3c64xx_sysclass,
148};
149
150/* read cpu identification code */
151
152void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
153{
154 /* initialise the io descriptors we need for initialisation */
155 iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
156 iotable_init(mach_desc, size);
157 init_consistent_dma_size(SZ_8M);
158
159 /* detect cpu id */
160 s3c64xx_init_cpu();
161
162 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
163}
164
165static __init int s3c64xx_sysdev_init(void)
166{
167 sysdev_class_register(&s3c64xx_sysclass);
168 return sysdev_register(&s3c64xx_sysdev);
169}
170core_initcall(s3c64xx_sysdev_init);
171
172/*
173 * setup the sources the vic should advertise resume
174 * for, even though it is not doing the wake
175 * (set_irq_wake needs to be valid)
176 */
177#define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE))
178#define IRQ_VIC1_RESUME (1 << (IRQ_RTC_ALARM - IRQ_VIC1_BASE) | \
179 1 << (IRQ_PENDN - IRQ_VIC1_BASE) | \
180 1 << (IRQ_HSMMC0 - IRQ_VIC1_BASE) | \
181 1 << (IRQ_HSMMC1 - IRQ_VIC1_BASE) | \
182 1 << (IRQ_HSMMC2 - IRQ_VIC1_BASE))
183
184void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
185{
186 printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
187
188 /* initialise the pair of VICs */
189 vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
190 vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
191
192 /* add the timer sub-irqs */
193 s3c_init_vic_timer_irq(5, IRQ_TIMER0);
194}
31 195
32#define eint_offset(irq) ((irq) - IRQ_EINT(0)) 196#define eint_offset(irq) ((irq) - IRQ_EINT(0))
33#define eint_irq_to_bit(irq) ((u32)(1 << eint_offset(irq))) 197#define eint_irq_to_bit(irq) ((u32)(1 << eint_offset(irq)))
@@ -209,5 +373,13 @@ static int __init s3c64xx_init_irq_eint(void)
209 373
210 return 0; 374 return 0;
211} 375}
212
213arch_initcall(s3c64xx_init_irq_eint); 376arch_initcall(s3c64xx_init_irq_eint);
377
378void s3c64xx_restart(char mode, const char *cmd)
379{
380 if (mode != 's')
381 arch_wdt_reset();
382
383 /* if all else fails, or mode was for soft, jump to 0 */
384 soft_restart(0);
385}
diff --git a/arch/arm/mach-s3c64xx/common.h b/arch/arm/mach-s3c64xx/common.h
new file mode 100644
index 000000000000..8dc8ab6d8d6d
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/common.h
@@ -0,0 +1,57 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Copyright 2008 Openmoko, Inc.
6 * Copyright 2008 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * Common Header for S3C64XX machines
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16
17#ifndef __ARCH_ARM_MACH_S3C64XX_COMMON_H
18#define __ARCH_ARM_MACH_S3C64XX_COMMON_H
19
20void s3c64xx_init_irq(u32 vic0, u32 vic1);
21void s3c64xx_init_io(struct map_desc *mach_desc, int size);
22
23void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit);
24void s3c64xx_setup_clocks(void);
25
26void s3c64xx_restart(char mode, const char *cmd);
27
28extern struct syscore_ops s3c64xx_irq_syscore_ops;
29extern struct sysdev_class s3c64xx_sysclass;
30
31#ifdef CONFIG_CPU_S3C6400
32
33extern int s3c6400_init(void);
34extern void s3c6400_init_irq(void);
35extern void s3c6400_map_io(void);
36extern void s3c6400_init_clocks(int xtal);
37
38#else
39#define s3c6400_init_clocks NULL
40#define s3c6400_map_io NULL
41#define s3c6400_init NULL
42#endif
43
44#ifdef CONFIG_CPU_S3C6410
45
46extern int s3c6410_init(void);
47extern void s3c6410_init_irq(void);
48extern void s3c6410_map_io(void);
49extern void s3c6410_init_clocks(int xtal);
50
51#else
52#define s3c6410_init_clocks NULL
53#define s3c6410_map_io NULL
54#define s3c6410_init NULL
55#endif
56
57#endif /* __ARCH_ARM_MACH_S3C64XX_COMMON_H */
diff --git a/arch/arm/mach-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c
deleted file mode 100644
index de085b798aa4..000000000000
--- a/arch/arm/mach-s3c64xx/cpu.c
+++ /dev/null
@@ -1,161 +0,0 @@
1/* linux/arch/arm/plat-s3c64xx/cpu.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C64XX CPU Support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/interrupt.h>
18#include <linux/ioport.h>
19#include <linux/sysdev.h>
20#include <linux/serial_core.h>
21#include <linux/platform_device.h>
22#include <linux/io.h>
23#include <linux/dma-mapping.h>
24
25#include <mach/hardware.h>
26#include <mach/map.h>
27
28#include <asm/mach/arch.h>
29#include <asm/mach/map.h>
30
31#include <plat/regs-serial.h>
32
33#include <plat/cpu.h>
34#include <plat/devs.h>
35#include <plat/clock.h>
36
37#include <plat/s3c6400.h>
38#include <plat/s3c6410.h>
39
40/* table of supported CPUs */
41
42static const char name_s3c6400[] = "S3C6400";
43static const char name_s3c6410[] = "S3C6410";
44
45static struct cpu_table cpu_ids[] __initdata = {
46 {
47 .idcode = S3C6400_CPU_ID,
48 .idmask = S3C64XX_CPU_MASK,
49 .map_io = s3c6400_map_io,
50 .init_clocks = s3c6400_init_clocks,
51 .init_uarts = s3c6400_init_uarts,
52 .init = s3c6400_init,
53 .name = name_s3c6400,
54 }, {
55 .idcode = S3C6410_CPU_ID,
56 .idmask = S3C64XX_CPU_MASK,
57 .map_io = s3c6410_map_io,
58 .init_clocks = s3c6410_init_clocks,
59 .init_uarts = s3c6410_init_uarts,
60 .init = s3c6410_init,
61 .name = name_s3c6410,
62 },
63};
64
65/* minimal IO mapping */
66
67/* see notes on uart map in arch/arm/mach-s3c6400/include/mach/debug-macro.S */
68#define UART_OFFS (S3C_PA_UART & 0xfffff)
69
70static struct map_desc s3c_iodesc[] __initdata = {
71 {
72 .virtual = (unsigned long)S3C_VA_SYS,
73 .pfn = __phys_to_pfn(S3C64XX_PA_SYSCON),
74 .length = SZ_4K,
75 .type = MT_DEVICE,
76 }, {
77 .virtual = (unsigned long)S3C_VA_MEM,
78 .pfn = __phys_to_pfn(S3C64XX_PA_SROM),
79 .length = SZ_4K,
80 .type = MT_DEVICE,
81 }, {
82 .virtual = (unsigned long)(S3C_VA_UART + UART_OFFS),
83 .pfn = __phys_to_pfn(S3C_PA_UART),
84 .length = SZ_4K,
85 .type = MT_DEVICE,
86 }, {
87 .virtual = (unsigned long)VA_VIC0,
88 .pfn = __phys_to_pfn(S3C64XX_PA_VIC0),
89 .length = SZ_16K,
90 .type = MT_DEVICE,
91 }, {
92 .virtual = (unsigned long)VA_VIC1,
93 .pfn = __phys_to_pfn(S3C64XX_PA_VIC1),
94 .length = SZ_16K,
95 .type = MT_DEVICE,
96 }, {
97 .virtual = (unsigned long)S3C_VA_TIMER,
98 .pfn = __phys_to_pfn(S3C_PA_TIMER),
99 .length = SZ_16K,
100 .type = MT_DEVICE,
101 }, {
102 .virtual = (unsigned long)S3C64XX_VA_GPIO,
103 .pfn = __phys_to_pfn(S3C64XX_PA_GPIO),
104 .length = SZ_4K,
105 .type = MT_DEVICE,
106 }, {
107 .virtual = (unsigned long)S3C64XX_VA_MODEM,
108 .pfn = __phys_to_pfn(S3C64XX_PA_MODEM),
109 .length = SZ_4K,
110 .type = MT_DEVICE,
111 }, {
112 .virtual = (unsigned long)S3C_VA_WATCHDOG,
113 .pfn = __phys_to_pfn(S3C64XX_PA_WATCHDOG),
114 .length = SZ_4K,
115 .type = MT_DEVICE,
116 }, {
117 .virtual = (unsigned long)S3C_VA_USB_HSPHY,
118 .pfn = __phys_to_pfn(S3C64XX_PA_USB_HSPHY),
119 .length = SZ_1K,
120 .type = MT_DEVICE,
121 },
122};
123
124
125struct sysdev_class s3c64xx_sysclass = {
126 .name = "s3c64xx-core",
127};
128
129static struct sys_device s3c64xx_sysdev = {
130 .cls = &s3c64xx_sysclass,
131};
132
133/* uart registration process */
134
135void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
136{
137 s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
138}
139
140/* read cpu identification code */
141
142void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
143{
144 /* initialise the io descriptors we need for initialisation */
145 iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
146 iotable_init(mach_desc, size);
147 init_consistent_dma_size(SZ_8M);
148
149 /* detect cpu id */
150 s3c64xx_init_cpu();
151
152 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
153}
154
155static __init int s3c64xx_sysdev_init(void)
156{
157 sysdev_class_register(&s3c64xx_sysclass);
158 return sysdev_register(&s3c64xx_sysdev);
159}
160
161core_initcall(s3c64xx_sysdev_init);
diff --git a/arch/arm/mach-s3c64xx/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h
index d8ca5786ba25..353ed4389ae7 100644
--- a/arch/arm/mach-s3c64xx/include/mach/system.h
+++ b/arch/arm/mach-s3c64xx/include/mach/system.h
@@ -11,20 +11,9 @@
11#ifndef __ASM_ARCH_SYSTEM_H 11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H __FILE__ 12#define __ASM_ARCH_SYSTEM_H __FILE__
13 13
14#include <plat/watchdog-reset.h>
15
16static void arch_idle(void) 14static void arch_idle(void)
17{ 15{
18 /* nothing here yet */ 16 /* nothing here yet */
19} 17}
20 18
21static void arch_reset(char mode, const char *cmd)
22{
23 if (mode != 's')
24 arch_wdt_reset();
25
26 /* if all else fails, or mode was for soft, jump to 0 */
27 soft_restart(0);
28}
29
30#endif /* __ASM_ARCH_IRQ_H */ 19#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c64xx/irq.c b/arch/arm/mach-s3c64xx/irq.c
deleted file mode 100644
index b07357e94958..000000000000
--- a/arch/arm/mach-s3c64xx/irq.c
+++ /dev/null
@@ -1,47 +0,0 @@
1/* arch/arm/plat-s3c64xx/irq.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C64XX - Interrupt handling
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/interrupt.h>
17#include <linux/serial_core.h>
18#include <linux/irq.h>
19#include <linux/io.h>
20
21#include <asm/hardware/vic.h>
22
23#include <mach/map.h>
24#include <plat/irq-vic-timer.h>
25#include <plat/irq-uart.h>
26#include <plat/cpu.h>
27
28/* setup the sources the vic should advertise resume for, even though it
29 * is not doing the wake (set_irq_wake needs to be valid) */
30#define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE))
31#define IRQ_VIC1_RESUME (1 << (IRQ_RTC_ALARM - IRQ_VIC1_BASE) | \
32 1 << (IRQ_PENDN - IRQ_VIC1_BASE) | \
33 1 << (IRQ_HSMMC0 - IRQ_VIC1_BASE) | \
34 1 << (IRQ_HSMMC1 - IRQ_VIC1_BASE) | \
35 1 << (IRQ_HSMMC2 - IRQ_VIC1_BASE))
36
37void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
38{
39 printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
40
41 /* initialise the pair of VICs */
42 vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
43 vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
44
45 /* add the timer sub-irqs */
46 s3c_init_vic_timer_irq(5, IRQ_TIMER0);
47}
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index 2bbc14d93428..b86f2779e4e6 100644
--- a/arch/arm/mach-s3c64xx/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -46,13 +46,14 @@
46#include <plat/fb.h> 46#include <plat/fb.h>
47#include <plat/regs-fb-v4.h> 47#include <plat/regs-fb-v4.h>
48 48
49#include <plat/s3c6410.h>
50#include <plat/clock.h> 49#include <plat/clock.h>
51#include <plat/devs.h> 50#include <plat/devs.h>
52#include <plat/cpu.h> 51#include <plat/cpu.h>
53#include <mach/regs-gpio.h> 52#include <mach/regs-gpio.h>
54#include <mach/regs-modem.h> 53#include <mach/regs-modem.h>
55 54
55#include "common.h"
56
56/* DM9000 */ 57/* DM9000 */
57#define ANW6410_PA_DM9000 (0x18000000) 58#define ANW6410_PA_DM9000 (0x18000000)
58 59
@@ -241,4 +242,5 @@ MACHINE_START(ANW6410, "A&W6410")
241 .map_io = anw6410_map_io, 242 .map_io = anw6410_map_io,
242 .init_machine = anw6410_machine_init, 243 .init_machine = anw6410_machine_init,
243 .timer = &s3c24xx_timer, 244 .timer = &s3c24xx_timer,
245 .restart = s3c64xx_restart,
244MACHINE_END 246MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index 988ac2e48f08..f1c848aa4a1e 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -51,7 +51,6 @@
51 51
52#include <mach/regs-gpio-memport.h> 52#include <mach/regs-gpio-memport.h>
53 53
54#include <plat/s3c6410.h>
55#include <plat/regs-serial.h> 54#include <plat/regs-serial.h>
56#include <plat/regs-fb-v4.h> 55#include <plat/regs-fb-v4.h>
57#include <plat/fb.h> 56#include <plat/fb.h>
@@ -67,6 +66,8 @@
67#include <plat/iic.h> 66#include <plat/iic.h>
68#include <plat/pm.h> 67#include <plat/pm.h>
69 68
69#include "common.h"
70
70/* serial port setup */ 71/* serial port setup */
71 72
72#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) 73#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
@@ -716,4 +717,5 @@ MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
716 .map_io = crag6410_map_io, 717 .map_io = crag6410_map_io,
717 .init_machine = crag6410_machine_init, 718 .init_machine = crag6410_machine_init,
718 .timer = &s3c24xx_timer, 719 .timer = &s3c24xx_timer,
720 .restart = s3c64xx_restart,
719MACHINE_END 721MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index c5955f301709..521e07b8501b 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -38,12 +38,13 @@
38#include <plat/fb.h> 38#include <plat/fb.h>
39#include <plat/nand.h> 39#include <plat/nand.h>
40 40
41#include <plat/s3c6410.h>
42#include <plat/clock.h> 41#include <plat/clock.h>
43#include <plat/devs.h> 42#include <plat/devs.h>
44#include <plat/cpu.h> 43#include <plat/cpu.h>
45#include <plat/regs-fb-v4.h> 44#include <plat/regs-fb-v4.h>
46 45
46#include "common.h"
47
47#define UCON S3C2410_UCON_DEFAULT 48#define UCON S3C2410_UCON_DEFAULT
48#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) 49#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
49#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) 50#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
@@ -272,4 +273,5 @@ MACHINE_START(HMT, "Airgoo-HMT")
272 .map_io = hmt_map_io, 273 .map_io = hmt_map_io,
273 .init_machine = hmt_machine_init, 274 .init_machine = hmt_machine_init,
274 .timer = &s3c24xx_timer, 275 .timer = &s3c24xx_timer,
276 .restart = s3c64xx_restart,
275MACHINE_END 277MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 4415c85e3f6f..c34c2ab22ead 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -34,7 +34,6 @@
34#include <mach/regs-modem.h> 34#include <mach/regs-modem.h>
35#include <mach/regs-srom.h> 35#include <mach/regs-srom.h>
36 36
37#include <plat/s3c6410.h>
38#include <plat/adc.h> 37#include <plat/adc.h>
39#include <plat/cpu.h> 38#include <plat/cpu.h>
40#include <plat/devs.h> 39#include <plat/devs.h>
@@ -46,6 +45,8 @@
46 45
47#include <video/platform_lcd.h> 46#include <video/platform_lcd.h>
48 47
48#include "common.h"
49
49#define UCON S3C2410_UCON_DEFAULT 50#define UCON S3C2410_UCON_DEFAULT
50#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) 51#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
51#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) 52#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
@@ -350,4 +351,5 @@ MACHINE_START(MINI6410, "MINI6410")
350 .map_io = mini6410_map_io, 351 .map_io = mini6410_map_io,
351 .init_machine = mini6410_machine_init, 352 .init_machine = mini6410_machine_init,
352 .timer = &s3c24xx_timer, 353 .timer = &s3c24xx_timer,
354 .restart = s3c64xx_restart,
353MACHINE_END 355MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c
index 9b2c610eac2a..0efa2ba783b2 100644
--- a/arch/arm/mach-s3c64xx/mach-ncp.c
+++ b/arch/arm/mach-s3c64xx/mach-ncp.c
@@ -40,12 +40,13 @@
40#include <plat/iic.h> 40#include <plat/iic.h>
41#include <plat/fb.h> 41#include <plat/fb.h>
42 42
43#include <plat/s3c6410.h>
44#include <plat/clock.h> 43#include <plat/clock.h>
45#include <plat/devs.h> 44#include <plat/devs.h>
46#include <plat/cpu.h> 45#include <plat/cpu.h>
47#include <plat/regs-fb-v4.h> 46#include <plat/regs-fb-v4.h>
48 47
48#include "common.h"
49
49#define UCON S3C2410_UCON_DEFAULT 50#define UCON S3C2410_UCON_DEFAULT
50#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE 51#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE
51#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 52#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
@@ -104,4 +105,5 @@ MACHINE_START(NCP, "NCP")
104 .map_io = ncp_map_io, 105 .map_io = ncp_map_io,
105 .init_machine = ncp_machine_init, 106 .init_machine = ncp_machine_init,
106 .timer = &s3c24xx_timer, 107 .timer = &s3c24xx_timer,
108 .restart = s3c64xx_restart,
107MACHINE_END 109MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index dbab49f2713e..be2a9a22ab74 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -35,7 +35,6 @@
35#include <mach/regs-modem.h> 35#include <mach/regs-modem.h>
36#include <mach/regs-srom.h> 36#include <mach/regs-srom.h>
37 37
38#include <plat/s3c6410.h>
39#include <plat/adc.h> 38#include <plat/adc.h>
40#include <plat/cpu.h> 39#include <plat/cpu.h>
41#include <plat/devs.h> 40#include <plat/devs.h>
@@ -47,6 +46,8 @@
47 46
48#include <video/platform_lcd.h> 47#include <video/platform_lcd.h>
49 48
49#include "common.h"
50
50#define UCON S3C2410_UCON_DEFAULT 51#define UCON S3C2410_UCON_DEFAULT
51#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) 52#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
52#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) 53#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
@@ -331,4 +332,5 @@ MACHINE_START(REAL6410, "REAL6410")
331 .map_io = real6410_map_io, 332 .map_io = real6410_map_io,
332 .init_machine = real6410_machine_init, 333 .init_machine = real6410_machine_init,
333 .timer = &s3c24xx_timer, 334 .timer = &s3c24xx_timer,
335 .restart = s3c64xx_restart,
334MACHINE_END 336MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c
index cb1ebeb08763..ce31db136231 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq.c
@@ -40,6 +40,8 @@
40 40
41#include <video/platform_lcd.h> 41#include <video/platform_lcd.h>
42 42
43#include "common.h"
44
43#define UCON S3C2410_UCON_DEFAULT 45#define UCON S3C2410_UCON_DEFAULT
44#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) 46#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
45#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) 47#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c
index 053945282652..3f42431d4dda 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq5.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq5.c
@@ -24,13 +24,13 @@
24#include <mach/map.h> 24#include <mach/map.h>
25#include <mach/regs-gpio.h> 25#include <mach/regs-gpio.h>
26 26
27#include <plat/s3c6410.h>
28#include <plat/cpu.h> 27#include <plat/cpu.h>
29#include <plat/devs.h> 28#include <plat/devs.h>
30#include <plat/fb.h> 29#include <plat/fb.h>
31#include <plat/gpio-cfg.h> 30#include <plat/gpio-cfg.h>
32#include <plat/regs-fb-v4.h> 31#include <plat/regs-fb-v4.h>
33 32
33#include "common.h"
34#include "mach-smartq.h" 34#include "mach-smartq.h"
35 35
36static struct gpio_led smartq5_leds[] = { 36static struct gpio_led smartq5_leds[] = {
@@ -153,4 +153,5 @@ MACHINE_START(SMARTQ5, "SmartQ 5")
153 .map_io = smartq_map_io, 153 .map_io = smartq_map_io,
154 .init_machine = smartq5_machine_init, 154 .init_machine = smartq5_machine_init,
155 .timer = &s3c24xx_timer, 155 .timer = &s3c24xx_timer,
156 .restart = s3c64xx_restart,
156MACHINE_END 157MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c
index a58d1ba5cba2..e5c09b6db967 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq7.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq7.c
@@ -24,13 +24,13 @@
24#include <mach/map.h> 24#include <mach/map.h>
25#include <mach/regs-gpio.h> 25#include <mach/regs-gpio.h>
26 26
27#include <plat/s3c6410.h>
28#include <plat/cpu.h> 27#include <plat/cpu.h>
29#include <plat/devs.h> 28#include <plat/devs.h>
30#include <plat/fb.h> 29#include <plat/fb.h>
31#include <plat/gpio-cfg.h> 30#include <plat/gpio-cfg.h>
32#include <plat/regs-fb-v4.h> 31#include <plat/regs-fb-v4.h>
33 32
33#include "common.h"
34#include "mach-smartq.h" 34#include "mach-smartq.h"
35 35
36static struct gpio_led smartq7_leds[] = { 36static struct gpio_led smartq7_leds[] = {
@@ -169,4 +169,5 @@ MACHINE_START(SMARTQ7, "SmartQ 7")
169 .map_io = smartq_map_io, 169 .map_io = smartq_map_io,
170 .init_machine = smartq7_machine_init, 170 .init_machine = smartq7_machine_init,
171 .timer = &s3c24xx_timer, 171 .timer = &s3c24xx_timer,
172 .restart = s3c64xx_restart,
172MACHINE_END 173MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c
index be28a59e3f57..5f096534f4c4 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6400.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c
@@ -32,12 +32,13 @@
32 32
33#include <plat/regs-serial.h> 33#include <plat/regs-serial.h>
34 34
35#include <plat/s3c6400.h>
36#include <plat/clock.h> 35#include <plat/clock.h>
37#include <plat/devs.h> 36#include <plat/devs.h>
38#include <plat/cpu.h> 37#include <plat/cpu.h>
39#include <plat/iic.h> 38#include <plat/iic.h>
40 39
40#include "common.h"
41
41#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK 42#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
42#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 43#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
43#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 44#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
@@ -93,4 +94,5 @@ MACHINE_START(SMDK6400, "SMDK6400")
93 .map_io = smdk6400_map_io, 94 .map_io = smdk6400_map_io,
94 .init_machine = smdk6400_machine_init, 95 .init_machine = smdk6400_machine_init,
95 .timer = &s3c24xx_timer, 96 .timer = &s3c24xx_timer,
97 .restart = s3c64xx_restart,
96MACHINE_END 98MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 08309155d087..ca6fc204f0ea 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -64,7 +64,6 @@
64#include <plat/fb.h> 64#include <plat/fb.h>
65#include <plat/gpio-cfg.h> 65#include <plat/gpio-cfg.h>
66 66
67#include <plat/s3c6410.h>
68#include <plat/clock.h> 67#include <plat/clock.h>
69#include <plat/devs.h> 68#include <plat/devs.h>
70#include <plat/cpu.h> 69#include <plat/cpu.h>
@@ -74,6 +73,8 @@
74#include <plat/backlight.h> 73#include <plat/backlight.h>
75#include <plat/regs-fb-v4.h> 74#include <plat/regs-fb-v4.h>
76 75
76#include "common.h"
77
77#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK 78#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
78#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 79#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
79#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 80#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
@@ -705,4 +706,5 @@ MACHINE_START(SMDK6410, "SMDK6410")
705 .map_io = smdk6410_map_io, 706 .map_io = smdk6410_map_io,
706 .init_machine = smdk6410_machine_init, 707 .init_machine = smdk6410_machine_init,
707 .timer = &s3c24xx_timer, 708 .timer = &s3c24xx_timer,
709 .restart = s3c64xx_restart,
708MACHINE_END 710MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c
index 51c00f2453c6..b1e1571f2f6b 100644
--- a/arch/arm/mach-s3c64xx/s3c6400.c
+++ b/arch/arm/mach-s3c64xx/s3c6400.c
@@ -38,7 +38,8 @@
38#include <plat/sdhci.h> 38#include <plat/sdhci.h>
39#include <plat/iic-core.h> 39#include <plat/iic-core.h>
40#include <plat/onenand-core.h> 40#include <plat/onenand-core.h>
41#include <plat/s3c6400.h> 41
42#include "common.h"
42 43
43void __init s3c6400_map_io(void) 44void __init s3c6400_map_io(void)
44{ 45{
@@ -60,7 +61,7 @@ void __init s3c6400_map_io(void)
60void __init s3c6400_init_clocks(int xtal) 61void __init s3c6400_init_clocks(int xtal)
61{ 62{
62 s3c64xx_register_clocks(xtal, S3C6400_CLKDIV0_ARM_MASK); 63 s3c64xx_register_clocks(xtal, S3C6400_CLKDIV0_ARM_MASK);
63 s3c6400_setup_clocks(); 64 s3c64xx_setup_clocks();
64} 65}
65 66
66void __init s3c6400_init_irq(void) 67void __init s3c6400_init_irq(void)
diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c
index 4117003464ad..fba71bd991c7 100644
--- a/arch/arm/mach-s3c64xx/s3c6410.c
+++ b/arch/arm/mach-s3c64xx/s3c6410.c
@@ -41,8 +41,8 @@
41#include <plat/adc-core.h> 41#include <plat/adc-core.h>
42#include <plat/iic-core.h> 42#include <plat/iic-core.h>
43#include <plat/onenand-core.h> 43#include <plat/onenand-core.h>
44#include <plat/s3c6400.h> 44
45#include <plat/s3c6410.h> 45#include "common.h"
46 46
47void __init s3c6410_map_io(void) 47void __init s3c6410_map_io(void)
48{ 48{
@@ -66,7 +66,7 @@ void __init s3c6410_init_clocks(int xtal)
66{ 66{
67 printk(KERN_DEBUG "%s: initialising clocks\n", __func__); 67 printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
68 s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK); 68 s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK);
69 s3c6400_setup_clocks(); 69 s3c64xx_setup_clocks();
70} 70}
71 71
72void __init s3c6410_init_irq(void) 72void __init s3c6410_init_irq(void)
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
index a1324d8dc4e0..d3f7409999f2 100644
--- a/arch/arm/mach-s5p64x0/Makefile
+++ b/arch/arm/mach-s5p64x0/Makefile
@@ -10,14 +10,16 @@ obj-m :=
10obj-n := 10obj-n :=
11obj- := 11obj- :=
12 12
13# Core support for S5P64X0 system 13# Core
14 14
15obj-$(CONFIG_ARCH_S5P64X0) += cpu.o init.o clock.o dma.o 15obj-y += common.o clock.o
16obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o irq-eint.o
17obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o 16obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o
18obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o 17obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o
18
19obj-$(CONFIG_PM) += pm.o irq-pm.o 19obj-$(CONFIG_PM) += pm.o irq-pm.o
20 20
21obj-y += dma.o
22
21# machine support 23# machine support
22 24
23obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o 25obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o
@@ -28,5 +30,6 @@ obj-$(CONFIG_MACH_SMDK6450) += mach-smdk6450.o
28obj-y += dev-audio.o 30obj-y += dev-audio.o
29obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o 31obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
30 32
33obj-y += setup-i2c0.o
31obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o 34obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o
32obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o 35obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
index c54c65d511f0..dd2b8daef0cd 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6440.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c
@@ -31,7 +31,8 @@
31#include <plat/pll.h> 31#include <plat/pll.h>
32#include <plat/s5p-clock.h> 32#include <plat/s5p-clock.h>
33#include <plat/clock-clksrc.h> 33#include <plat/clock-clksrc.h>
34#include <plat/s5p6440.h> 34
35#include "common.h"
35 36
36static u32 epll_div[][5] = { 37static u32 epll_div[][5] = {
37 { 36000000, 0, 48, 1, 4 }, 38 { 36000000, 0, 48, 1, 4 },
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
index 2d04abfba12e..328a224f0075 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -31,7 +31,8 @@
31#include <plat/pll.h> 31#include <plat/pll.h>
32#include <plat/s5p-clock.h> 32#include <plat/s5p-clock.h>
33#include <plat/clock-clksrc.h> 33#include <plat/clock-clksrc.h>
34#include <plat/s5p6450.h> 34
35#include "common.h"
35 36
36static struct clksrc_clk clk_mout_dpll = { 37static struct clksrc_clk clk_mout_dpll = {
37 .clk = { 38 .clk = {
diff --git a/arch/arm/mach-s5p64x0/clock.c b/arch/arm/mach-s5p64x0/clock.c
index b52c6e2f37a6..b289b726a7d6 100644
--- a/arch/arm/mach-s5p64x0/clock.c
+++ b/arch/arm/mach-s5p64x0/clock.c
@@ -30,8 +30,8 @@
30#include <plat/pll.h> 30#include <plat/pll.h>
31#include <plat/s5p-clock.h> 31#include <plat/s5p-clock.h>
32#include <plat/clock-clksrc.h> 32#include <plat/clock-clksrc.h>
33#include <plat/s5p6440.h> 33
34#include <plat/s5p6450.h> 34#include "common.h"
35 35
36struct clksrc_clk clk_mout_apll = { 36struct clksrc_clk clk_mout_apll = {
37 .clk = { 37 .clk = {
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
new file mode 100644
index 000000000000..b7555a0fb0fb
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -0,0 +1,468 @@
1/*
2 * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common Codes for S5P64X0 machines
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/interrupt.h>
15#include <linux/list.h>
16#include <linux/timer.h>
17#include <linux/init.h>
18#include <linux/clk.h>
19#include <linux/io.h>
20#include <linux/sysdev.h>
21#include <linux/serial_core.h>
22#include <linux/platform_device.h>
23#include <linux/sched.h>
24#include <linux/dma-mapping.h>
25#include <linux/gpio.h>
26#include <linux/irq.h>
27
28#include <asm/irq.h>
29#include <asm/proc-fns.h>
30#include <asm/mach/arch.h>
31#include <asm/mach/map.h>
32#include <asm/mach/irq.h>
33
34#include <mach/map.h>
35#include <mach/hardware.h>
36#include <mach/regs-clock.h>
37#include <mach/regs-gpio.h>
38
39#include <plat/cpu.h>
40#include <plat/clock.h>
41#include <plat/devs.h>
42#include <plat/pm.h>
43#include <plat/adc-core.h>
44#include <plat/fb-core.h>
45#include <plat/gpio-cfg.h>
46#include <plat/regs-irqtype.h>
47#include <plat/regs-serial.h>
48#include <plat/watchdog-reset.h>
49
50#include "common.h"
51
52static const char name_s5p6440[] = "S5P6440";
53static const char name_s5p6450[] = "S5P6450";
54
55static struct cpu_table cpu_ids[] __initdata = {
56 {
57 .idcode = S5P6440_CPU_ID,
58 .idmask = S5P64XX_CPU_MASK,
59 .map_io = s5p6440_map_io,
60 .init_clocks = s5p6440_init_clocks,
61 .init_uarts = s5p6440_init_uarts,
62 .init = s5p64x0_init,
63 .name = name_s5p6440,
64 }, {
65 .idcode = S5P6450_CPU_ID,
66 .idmask = S5P64XX_CPU_MASK,
67 .map_io = s5p6450_map_io,
68 .init_clocks = s5p6450_init_clocks,
69 .init_uarts = s5p6450_init_uarts,
70 .init = s5p64x0_init,
71 .name = name_s5p6450,
72 },
73};
74
75/* Initial IO mappings */
76
77static struct map_desc s5p64x0_iodesc[] __initdata = {
78 {
79 .virtual = (unsigned long)S5P_VA_CHIPID,
80 .pfn = __phys_to_pfn(S5P64X0_PA_CHIPID),
81 .length = SZ_4K,
82 .type = MT_DEVICE,
83 }, {
84 .virtual = (unsigned long)S3C_VA_SYS,
85 .pfn = __phys_to_pfn(S5P64X0_PA_SYSCON),
86 .length = SZ_64K,
87 .type = MT_DEVICE,
88 }, {
89 .virtual = (unsigned long)S3C_VA_TIMER,
90 .pfn = __phys_to_pfn(S5P64X0_PA_TIMER),
91 .length = SZ_16K,
92 .type = MT_DEVICE,
93 }, {
94 .virtual = (unsigned long)S3C_VA_WATCHDOG,
95 .pfn = __phys_to_pfn(S5P64X0_PA_WDT),
96 .length = SZ_4K,
97 .type = MT_DEVICE,
98 }, {
99 .virtual = (unsigned long)S5P_VA_SROMC,
100 .pfn = __phys_to_pfn(S5P64X0_PA_SROMC),
101 .length = SZ_4K,
102 .type = MT_DEVICE,
103 }, {
104 .virtual = (unsigned long)S5P_VA_GPIO,
105 .pfn = __phys_to_pfn(S5P64X0_PA_GPIO),
106 .length = SZ_4K,
107 .type = MT_DEVICE,
108 }, {
109 .virtual = (unsigned long)VA_VIC0,
110 .pfn = __phys_to_pfn(S5P64X0_PA_VIC0),
111 .length = SZ_16K,
112 .type = MT_DEVICE,
113 }, {
114 .virtual = (unsigned long)VA_VIC1,
115 .pfn = __phys_to_pfn(S5P64X0_PA_VIC1),
116 .length = SZ_16K,
117 .type = MT_DEVICE,
118 },
119};
120
121static struct map_desc s5p6440_iodesc[] __initdata = {
122 {
123 .virtual = (unsigned long)S3C_VA_UART,
124 .pfn = __phys_to_pfn(S5P6440_PA_UART(0)),
125 .length = SZ_4K,
126 .type = MT_DEVICE,
127 },
128};
129
130static struct map_desc s5p6450_iodesc[] __initdata = {
131 {
132 .virtual = (unsigned long)S3C_VA_UART,
133 .pfn = __phys_to_pfn(S5P6450_PA_UART(0)),
134 .length = SZ_512K,
135 .type = MT_DEVICE,
136 }, {
137 .virtual = (unsigned long)S3C_VA_UART + SZ_512K,
138 .pfn = __phys_to_pfn(S5P6450_PA_UART(5)),
139 .length = SZ_4K,
140 .type = MT_DEVICE,
141 },
142};
143
144static void s5p64x0_idle(void)
145{
146 unsigned long val;
147
148 if (!need_resched()) {
149 val = __raw_readl(S5P64X0_PWR_CFG);
150 val &= ~(0x3 << 5);
151 val |= (0x1 << 5);
152 __raw_writel(val, S5P64X0_PWR_CFG);
153
154 cpu_do_idle();
155 }
156 local_irq_enable();
157}
158
159/*
160 * s5p64x0_map_io
161 *
162 * register the standard CPU IO areas
163 */
164
165void __init s5p64x0_init_io(struct map_desc *mach_desc, int size)
166{
167 /* initialize the io descriptors we need for initialization */
168 iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
169 if (mach_desc)
170 iotable_init(mach_desc, size);
171
172 /* detect cpu id and rev. */
173 s5p_init_cpu(S5P64X0_SYS_ID);
174
175 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
176}
177
178void __init s5p6440_map_io(void)
179{
180 /* initialize any device information early */
181 s3c_adc_setname("s3c64xx-adc");
182 s3c_fb_setname("s5p64x0-fb");
183
184 iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
185 init_consistent_dma_size(SZ_8M);
186}
187
188void __init s5p6450_map_io(void)
189{
190 /* initialize any device information early */
191 s3c_adc_setname("s3c64xx-adc");
192 s3c_fb_setname("s5p64x0-fb");
193
194 iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
195 init_consistent_dma_size(SZ_8M);
196}
197
198/*
199 * s5p64x0_init_clocks
200 *
201 * register and setup the CPU clocks
202 */
203
204void __init s5p6440_init_clocks(int xtal)
205{
206 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
207
208 s3c24xx_register_baseclocks(xtal);
209 s5p_register_clocks(xtal);
210 s5p6440_register_clocks();
211 s5p6440_setup_clocks();
212}
213
214void __init s5p6450_init_clocks(int xtal)
215{
216 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
217
218 s3c24xx_register_baseclocks(xtal);
219 s5p_register_clocks(xtal);
220 s5p6450_register_clocks();
221 s5p6450_setup_clocks();
222}
223
224/*
225 * s5p64x0_init_irq
226 *
227 * register the CPU interrupts
228 */
229
230void __init s5p6440_init_irq(void)
231{
232 /* S5P6440 supports 2 VIC */
233 u32 vic[2];
234
235 /*
236 * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
237 * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
238 */
239 vic[0] = 0xff800ae7;
240 vic[1] = 0xffbf23e5;
241
242 s5p_init_irq(vic, ARRAY_SIZE(vic));
243}
244
245void __init s5p6450_init_irq(void)
246{
247 /* S5P6450 supports only 2 VIC */
248 u32 vic[2];
249
250 /*
251 * VIC0 is missing IRQ_VIC0[(13-15), (21-22)]
252 * VIC1 is missing IRQ VIC1[12, 14, 23]
253 */
254 vic[0] = 0xff9f1fff;
255 vic[1] = 0xff7fafff;
256
257 s5p_init_irq(vic, ARRAY_SIZE(vic));
258}
259
260struct sysdev_class s5p64x0_sysclass = {
261 .name = "s5p64x0-core",
262};
263
264static struct sys_device s5p64x0_sysdev = {
265 .cls = &s5p64x0_sysclass,
266};
267
268static int __init s5p64x0_core_init(void)
269{
270 return sysdev_class_register(&s5p64x0_sysclass);
271}
272core_initcall(s5p64x0_core_init);
273
274int __init s5p64x0_init(void)
275{
276 printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
277
278 /* set idle function */
279 pm_idle = s5p64x0_idle;
280
281 return sysdev_register(&s5p64x0_sysdev);
282}
283
284static struct s3c24xx_uart_clksrc s5p64x0_serial_clocks[] = {
285 [0] = {
286 .name = "pclk_low",
287 .divisor = 1,
288 .min_baud = 0,
289 .max_baud = 0,
290 },
291 [1] = {
292 .name = "uclk1",
293 .divisor = 1,
294 .min_baud = 0,
295 .max_baud = 0,
296 },
297};
298
299/* uart registration process */
300
301void __init s5p64x0_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
302{
303 struct s3c2410_uartcfg *tcfg = cfg;
304 u32 ucnt;
305
306 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
307 if (!tcfg->clocks) {
308 tcfg->clocks = s5p64x0_serial_clocks;
309 tcfg->clocks_size = ARRAY_SIZE(s5p64x0_serial_clocks);
310 }
311 }
312}
313
314void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
315{
316 int uart;
317
318 for (uart = 0; uart < no; uart++) {
319 s5p_uart_resources[uart].resources->start = S5P6440_PA_UART(uart);
320 s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART;
321 }
322
323 s5p64x0_common_init_uarts(cfg, no);
324 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
325}
326
327void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no)
328{
329 s5p64x0_common_init_uarts(cfg, no);
330 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
331}
332
333#define eint_offset(irq) ((irq) - IRQ_EINT(0))
334
335static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type)
336{
337 int offs = eint_offset(data->irq);
338 int shift;
339 u32 ctrl, mask;
340 u32 newvalue = 0;
341
342 if (offs > 15)
343 return -EINVAL;
344
345 switch (type) {
346 case IRQ_TYPE_NONE:
347 printk(KERN_WARNING "No edge setting!\n");
348 break;
349 case IRQ_TYPE_EDGE_RISING:
350 newvalue = S3C2410_EXTINT_RISEEDGE;
351 break;
352 case IRQ_TYPE_EDGE_FALLING:
353 newvalue = S3C2410_EXTINT_FALLEDGE;
354 break;
355 case IRQ_TYPE_EDGE_BOTH:
356 newvalue = S3C2410_EXTINT_BOTHEDGE;
357 break;
358 case IRQ_TYPE_LEVEL_LOW:
359 newvalue = S3C2410_EXTINT_LOWLEV;
360 break;
361 case IRQ_TYPE_LEVEL_HIGH:
362 newvalue = S3C2410_EXTINT_HILEV;
363 break;
364 default:
365 printk(KERN_ERR "No such irq type %d", type);
366 return -EINVAL;
367 }
368
369 shift = (offs / 2) * 4;
370 mask = 0x7 << shift;
371
372 ctrl = __raw_readl(S5P64X0_EINT0CON0) & ~mask;
373 ctrl |= newvalue << shift;
374 __raw_writel(ctrl, S5P64X0_EINT0CON0);
375
376 /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
377 if (soc_is_s5p6450())
378 s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2));
379 else
380 s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2));
381
382 return 0;
383}
384
385/*
386 * s5p64x0_irq_demux_eint
387 *
388 * This function demuxes the IRQ from the group0 external interrupts,
389 * from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into
390 * the specific handlers s5p64x0_irq_demux_eintX_Y.
391 */
392static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end)
393{
394 u32 status = __raw_readl(S5P64X0_EINT0PEND);
395 u32 mask = __raw_readl(S5P64X0_EINT0MASK);
396 unsigned int irq;
397
398 status &= ~mask;
399 status >>= start;
400 status &= (1 << (end - start + 1)) - 1;
401
402 for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) {
403 if (status & 1)
404 generic_handle_irq(irq);
405 status >>= 1;
406 }
407}
408
409static void s5p64x0_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc)
410{
411 s5p64x0_irq_demux_eint(0, 3);
412}
413
414static void s5p64x0_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc)
415{
416 s5p64x0_irq_demux_eint(4, 11);
417}
418
419static void s5p64x0_irq_demux_eint12_15(unsigned int irq,
420 struct irq_desc *desc)
421{
422 s5p64x0_irq_demux_eint(12, 15);
423}
424
425static int s5p64x0_alloc_gc(void)
426{
427 struct irq_chip_generic *gc;
428 struct irq_chip_type *ct;
429
430 gc = irq_alloc_generic_chip("s5p64x0-eint", 1, S5P_IRQ_EINT_BASE,
431 S5P_VA_GPIO, handle_level_irq);
432 if (!gc) {
433 printk(KERN_ERR "%s: irq_alloc_generic_chip for group 0"
434 "external interrupts failed\n", __func__);
435 return -EINVAL;
436 }
437
438 ct = gc->chip_types;
439 ct->chip.irq_ack = irq_gc_ack_set_bit;
440 ct->chip.irq_mask = irq_gc_mask_set_bit;
441 ct->chip.irq_unmask = irq_gc_mask_clr_bit;
442 ct->chip.irq_set_type = s5p64x0_irq_eint_set_type;
443 ct->chip.irq_set_wake = s3c_irqext_wake;
444 ct->regs.ack = EINT0PEND_OFFSET;
445 ct->regs.mask = EINT0MASK_OFFSET;
446 irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE,
447 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
448 return 0;
449}
450
451static int __init s5p64x0_init_irq_eint(void)
452{
453 int ret = s5p64x0_alloc_gc();
454 irq_set_chained_handler(IRQ_EINT0_3, s5p64x0_irq_demux_eint0_3);
455 irq_set_chained_handler(IRQ_EINT4_11, s5p64x0_irq_demux_eint4_11);
456 irq_set_chained_handler(IRQ_EINT12_15, s5p64x0_irq_demux_eint12_15);
457
458 return ret;
459}
460arch_initcall(s5p64x0_init_irq_eint);
461
462void s5p64x0_restart(char mode, const char *cmd)
463{
464 if (mode != 's')
465 arch_wdt_reset();
466
467 soft_restart(0);
468}
diff --git a/arch/arm/mach-s5p64x0/common.h b/arch/arm/mach-s5p64x0/common.h
new file mode 100644
index 000000000000..f8a60fdc5884
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/common.h
@@ -0,0 +1,57 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common Header for S5P64X0 machines
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __ARCH_ARM_MACH_S5P64X0_COMMON_H
13#define __ARCH_ARM_MACH_S5P64X0_COMMON_H
14
15void s5p6440_init_irq(void);
16void s5p6450_init_irq(void);
17void s5p64x0_init_io(struct map_desc *mach_desc, int size);
18
19void s5p6440_register_clocks(void);
20void s5p6440_setup_clocks(void);
21
22void s5p6450_register_clocks(void);
23void s5p6450_setup_clocks(void);
24
25void s5p64x0_restart(char mode, const char *cmd);
26
27#ifdef CONFIG_CPU_S5P6440
28
29extern int s5p64x0_init(void);
30extern void s5p6440_map_io(void);
31extern void s5p6440_init_clocks(int xtal);
32
33extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no);
34
35#else
36#define s5p6440_init_clocks NULL
37#define s5p6440_init_uarts NULL
38#define s5p6440_map_io NULL
39#define s5p64x0_init NULL
40#endif
41
42#ifdef CONFIG_CPU_S5P6450
43
44extern int s5p64x0_init(void);
45extern void s5p6450_map_io(void);
46extern void s5p6450_init_clocks(int xtal);
47
48extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no);
49
50#else
51#define s5p6450_init_clocks NULL
52#define s5p6450_init_uarts NULL
53#define s5p6450_map_io NULL
54#define s5p64x0_init NULL
55#endif
56
57#endif /* __ARCH_ARM_MACH_S5P64X0_COMMON_H */
diff --git a/arch/arm/mach-s5p64x0/cpu.c b/arch/arm/mach-s5p64x0/cpu.c
deleted file mode 100644
index ecab40cf19ab..000000000000
--- a/arch/arm/mach-s5p64x0/cpu.c
+++ /dev/null
@@ -1,215 +0,0 @@
1/* linux/arch/arm/mach-s5p64x0/cpu.c
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/interrupt.h>
14#include <linux/list.h>
15#include <linux/timer.h>
16#include <linux/init.h>
17#include <linux/clk.h>
18#include <linux/io.h>
19#include <linux/sysdev.h>
20#include <linux/serial_core.h>
21#include <linux/platform_device.h>
22#include <linux/sched.h>
23#include <linux/dma-mapping.h>
24
25#include <asm/mach/arch.h>
26#include <asm/mach/map.h>
27#include <asm/mach/irq.h>
28#include <asm/proc-fns.h>
29#include <asm/irq.h>
30
31#include <mach/hardware.h>
32#include <mach/map.h>
33#include <mach/regs-clock.h>
34
35#include <plat/regs-serial.h>
36#include <plat/cpu.h>
37#include <plat/devs.h>
38#include <plat/clock.h>
39#include <plat/s5p6440.h>
40#include <plat/s5p6450.h>
41#include <plat/adc-core.h>
42#include <plat/fb-core.h>
43
44/* Initial IO mappings */
45
46static struct map_desc s5p64x0_iodesc[] __initdata = {
47 {
48 .virtual = (unsigned long)S5P_VA_GPIO,
49 .pfn = __phys_to_pfn(S5P64X0_PA_GPIO),
50 .length = SZ_4K,
51 .type = MT_DEVICE,
52 }, {
53 .virtual = (unsigned long)VA_VIC0,
54 .pfn = __phys_to_pfn(S5P64X0_PA_VIC0),
55 .length = SZ_16K,
56 .type = MT_DEVICE,
57 }, {
58 .virtual = (unsigned long)VA_VIC1,
59 .pfn = __phys_to_pfn(S5P64X0_PA_VIC1),
60 .length = SZ_16K,
61 .type = MT_DEVICE,
62 },
63};
64
65static struct map_desc s5p6440_iodesc[] __initdata = {
66 {
67 .virtual = (unsigned long)S3C_VA_UART,
68 .pfn = __phys_to_pfn(S5P6440_PA_UART(0)),
69 .length = SZ_4K,
70 .type = MT_DEVICE,
71 },
72};
73
74static struct map_desc s5p6450_iodesc[] __initdata = {
75 {
76 .virtual = (unsigned long)S3C_VA_UART,
77 .pfn = __phys_to_pfn(S5P6450_PA_UART(0)),
78 .length = SZ_512K,
79 .type = MT_DEVICE,
80 }, {
81 .virtual = (unsigned long)S3C_VA_UART + SZ_512K,
82 .pfn = __phys_to_pfn(S5P6450_PA_UART(5)),
83 .length = SZ_4K,
84 .type = MT_DEVICE,
85 },
86};
87
88static void s5p64x0_idle(void)
89{
90 unsigned long val;
91
92 if (!need_resched()) {
93 val = __raw_readl(S5P64X0_PWR_CFG);
94 val &= ~(0x3 << 5);
95 val |= (0x1 << 5);
96 __raw_writel(val, S5P64X0_PWR_CFG);
97
98 cpu_do_idle();
99 }
100 local_irq_enable();
101}
102
103/*
104 * s5p64x0_map_io
105 *
106 * register the standard CPU IO areas
107 */
108
109void __init s5p6440_map_io(void)
110{
111 /* initialize any device information early */
112 s3c_adc_setname("s3c64xx-adc");
113 s3c_fb_setname("s5p64x0-fb");
114
115 iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
116 iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
117 init_consistent_dma_size(SZ_8M);
118}
119
120void __init s5p6450_map_io(void)
121{
122 /* initialize any device information early */
123 s3c_adc_setname("s3c64xx-adc");
124 s3c_fb_setname("s5p64x0-fb");
125
126 iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
127 iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
128 init_consistent_dma_size(SZ_8M);
129}
130
131/*
132 * s5p64x0_init_clocks
133 *
134 * register and setup the CPU clocks
135 */
136
137void __init s5p6440_init_clocks(int xtal)
138{
139 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
140
141 s3c24xx_register_baseclocks(xtal);
142 s5p_register_clocks(xtal);
143 s5p6440_register_clocks();
144 s5p6440_setup_clocks();
145}
146
147void __init s5p6450_init_clocks(int xtal)
148{
149 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
150
151 s3c24xx_register_baseclocks(xtal);
152 s5p_register_clocks(xtal);
153 s5p6450_register_clocks();
154 s5p6450_setup_clocks();
155}
156
157/*
158 * s5p64x0_init_irq
159 *
160 * register the CPU interrupts
161 */
162
163void __init s5p6440_init_irq(void)
164{
165 /* S5P6440 supports 2 VIC */
166 u32 vic[2];
167
168 /*
169 * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
170 * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
171 */
172 vic[0] = 0xff800ae7;
173 vic[1] = 0xffbf23e5;
174
175 s5p_init_irq(vic, ARRAY_SIZE(vic));
176}
177
178void __init s5p6450_init_irq(void)
179{
180 /* S5P6450 supports only 2 VIC */
181 u32 vic[2];
182
183 /*
184 * VIC0 is missing IRQ_VIC0[(13-15), (21-22)]
185 * VIC1 is missing IRQ VIC1[12, 14, 23]
186 */
187 vic[0] = 0xff9f1fff;
188 vic[1] = 0xff7fafff;
189
190 s5p_init_irq(vic, ARRAY_SIZE(vic));
191}
192
193struct sysdev_class s5p64x0_sysclass = {
194 .name = "s5p64x0-core",
195};
196
197static struct sys_device s5p64x0_sysdev = {
198 .cls = &s5p64x0_sysclass,
199};
200
201static int __init s5p64x0_core_init(void)
202{
203 return sysdev_class_register(&s5p64x0_sysclass);
204}
205core_initcall(s5p64x0_core_init);
206
207int __init s5p64x0_init(void)
208{
209 printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
210
211 /* set idle function */
212 pm_idle = s5p64x0_idle;
213
214 return sysdev_register(&s5p64x0_sysdev);
215}
diff --git a/arch/arm/mach-s5p64x0/include/mach/system.h b/arch/arm/mach-s5p64x0/include/mach/system.h
index 60f57532c970..cf26e0954a2f 100644
--- a/arch/arm/mach-s5p64x0/include/mach/system.h
+++ b/arch/arm/mach-s5p64x0/include/mach/system.h
@@ -13,8 +13,6 @@
13#ifndef __ASM_ARCH_SYSTEM_H 13#ifndef __ASM_ARCH_SYSTEM_H
14#define __ASM_ARCH_SYSTEM_H __FILE__ 14#define __ASM_ARCH_SYSTEM_H __FILE__
15 15
16#include <plat/system-reset.h>
17
18static void arch_idle(void) 16static void arch_idle(void)
19{ 17{
20 /* nothing here yet */ 18 /* nothing here yet */
diff --git a/arch/arm/mach-s5p64x0/init.c b/arch/arm/mach-s5p64x0/init.c
deleted file mode 100644
index 79833caf8165..000000000000
--- a/arch/arm/mach-s5p64x0/init.c
+++ /dev/null
@@ -1,73 +0,0 @@
1/* linux/arch/arm/mach-s5p64x0/init.c
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5P64X0 - Init support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/init.h>
16#include <linux/serial_core.h>
17
18#include <mach/map.h>
19
20#include <plat/cpu.h>
21#include <plat/devs.h>
22#include <plat/s5p6440.h>
23#include <plat/s5p6450.h>
24#include <plat/regs-serial.h>
25
26static struct s3c24xx_uart_clksrc s5p64x0_serial_clocks[] = {
27 [0] = {
28 .name = "pclk_low",
29 .divisor = 1,
30 .min_baud = 0,
31 .max_baud = 0,
32 },
33 [1] = {
34 .name = "uclk1",
35 .divisor = 1,
36 .min_baud = 0,
37 .max_baud = 0,
38 },
39};
40
41/* uart registration process */
42
43void __init s5p64x0_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
44{
45 struct s3c2410_uartcfg *tcfg = cfg;
46 u32 ucnt;
47
48 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
49 if (!tcfg->clocks) {
50 tcfg->clocks = s5p64x0_serial_clocks;
51 tcfg->clocks_size = ARRAY_SIZE(s5p64x0_serial_clocks);
52 }
53 }
54}
55
56void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
57{
58 int uart;
59
60 for (uart = 0; uart < no; uart++) {
61 s5p_uart_resources[uart].resources->start = S5P6440_PA_UART(uart);
62 s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART;
63 }
64
65 s5p64x0_common_init_uarts(cfg, no);
66 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
67}
68
69void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no)
70{
71 s5p64x0_common_init_uarts(cfg, no);
72 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
73}
diff --git a/arch/arm/mach-s5p64x0/irq-eint.c b/arch/arm/mach-s5p64x0/irq-eint.c
deleted file mode 100644
index 275dc74f4a7b..000000000000
--- a/arch/arm/mach-s5p64x0/irq-eint.c
+++ /dev/null
@@ -1,155 +0,0 @@
1/* arch/arm/mach-s5p64x0/irq-eint.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd
4 * http://www.samsung.com/
5 *
6 * Based on linux/arch/arm/mach-s3c64xx/irq-eint.c
7 *
8 * S5P64X0 - Interrupt handling for External Interrupts.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/gpio.h>
17#include <linux/irq.h>
18#include <linux/io.h>
19
20#include <plat/cpu.h>
21#include <plat/regs-irqtype.h>
22#include <plat/gpio-cfg.h>
23#include <plat/pm.h>
24
25#include <mach/regs-gpio.h>
26#include <mach/regs-clock.h>
27
28#define eint_offset(irq) ((irq) - IRQ_EINT(0))
29
30static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type)
31{
32 int offs = eint_offset(data->irq);
33 int shift;
34 u32 ctrl, mask;
35 u32 newvalue = 0;
36
37 if (offs > 15)
38 return -EINVAL;
39
40 switch (type) {
41 case IRQ_TYPE_NONE:
42 printk(KERN_WARNING "No edge setting!\n");
43 break;
44 case IRQ_TYPE_EDGE_RISING:
45 newvalue = S3C2410_EXTINT_RISEEDGE;
46 break;
47 case IRQ_TYPE_EDGE_FALLING:
48 newvalue = S3C2410_EXTINT_FALLEDGE;
49 break;
50 case IRQ_TYPE_EDGE_BOTH:
51 newvalue = S3C2410_EXTINT_BOTHEDGE;
52 break;
53 case IRQ_TYPE_LEVEL_LOW:
54 newvalue = S3C2410_EXTINT_LOWLEV;
55 break;
56 case IRQ_TYPE_LEVEL_HIGH:
57 newvalue = S3C2410_EXTINT_HILEV;
58 break;
59 default:
60 printk(KERN_ERR "No such irq type %d", type);
61 return -EINVAL;
62 }
63
64 shift = (offs / 2) * 4;
65 mask = 0x7 << shift;
66
67 ctrl = __raw_readl(S5P64X0_EINT0CON0) & ~mask;
68 ctrl |= newvalue << shift;
69 __raw_writel(ctrl, S5P64X0_EINT0CON0);
70
71 /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
72 if (soc_is_s5p6450())
73 s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2));
74 else
75 s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2));
76
77 return 0;
78}
79
80/*
81 * s5p64x0_irq_demux_eint
82 *
83 * This function demuxes the IRQ from the group0 external interrupts,
84 * from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into
85 * the specific handlers s5p64x0_irq_demux_eintX_Y.
86 */
87static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end)
88{
89 u32 status = __raw_readl(S5P64X0_EINT0PEND);
90 u32 mask = __raw_readl(S5P64X0_EINT0MASK);
91 unsigned int irq;
92
93 status &= ~mask;
94 status >>= start;
95 status &= (1 << (end - start + 1)) - 1;
96
97 for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) {
98 if (status & 1)
99 generic_handle_irq(irq);
100 status >>= 1;
101 }
102}
103
104static void s5p64x0_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc)
105{
106 s5p64x0_irq_demux_eint(0, 3);
107}
108
109static void s5p64x0_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc)
110{
111 s5p64x0_irq_demux_eint(4, 11);
112}
113
114static void s5p64x0_irq_demux_eint12_15(unsigned int irq,
115 struct irq_desc *desc)
116{
117 s5p64x0_irq_demux_eint(12, 15);
118}
119
120static int s5p64x0_alloc_gc(void)
121{
122 struct irq_chip_generic *gc;
123 struct irq_chip_type *ct;
124
125 gc = irq_alloc_generic_chip("s5p64x0-eint", 1, S5P_IRQ_EINT_BASE,
126 S5P_VA_GPIO, handle_level_irq);
127 if (!gc) {
128 printk(KERN_ERR "%s: irq_alloc_generic_chip for group 0"
129 "external interrupts failed\n", __func__);
130 return -EINVAL;
131 }
132
133 ct = gc->chip_types;
134 ct->chip.irq_ack = irq_gc_ack_set_bit;
135 ct->chip.irq_mask = irq_gc_mask_set_bit;
136 ct->chip.irq_unmask = irq_gc_mask_clr_bit;
137 ct->chip.irq_set_type = s5p64x0_irq_eint_set_type;
138 ct->chip.irq_set_wake = s3c_irqext_wake;
139 ct->regs.ack = EINT0PEND_OFFSET;
140 ct->regs.mask = EINT0MASK_OFFSET;
141 irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE,
142 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
143 return 0;
144}
145
146static int __init s5p64x0_init_irq_eint(void)
147{
148 int ret = s5p64x0_alloc_gc();
149 irq_set_chained_handler(IRQ_EINT0_3, s5p64x0_irq_demux_eint0_3);
150 irq_set_chained_handler(IRQ_EINT4_11, s5p64x0_irq_demux_eint4_11);
151 irq_set_chained_handler(IRQ_EINT12_15, s5p64x0_irq_demux_eint12_15);
152
153 return ret;
154}
155arch_initcall(s5p64x0_init_irq_eint);
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index c272c3f7d6de..34d98a1dae57 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -41,7 +41,6 @@
41 41
42#include <plat/regs-serial.h> 42#include <plat/regs-serial.h>
43#include <plat/gpio-cfg.h> 43#include <plat/gpio-cfg.h>
44#include <plat/s5p6440.h>
45#include <plat/clock.h> 44#include <plat/clock.h>
46#include <plat/devs.h> 45#include <plat/devs.h>
47#include <plat/cpu.h> 46#include <plat/cpu.h>
@@ -54,6 +53,8 @@
54#include <plat/fb.h> 53#include <plat/fb.h>
55#include <plat/regs-fb.h> 54#include <plat/regs-fb.h>
56 55
56#include "common.h"
57
57#define SMDK6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 58#define SMDK6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
58 S3C2410_UCON_RXILEVEL | \ 59 S3C2410_UCON_RXILEVEL | \
59 S3C2410_UCON_TXIRQMODE | \ 60 S3C2410_UCON_TXIRQMODE | \
@@ -202,7 +203,7 @@ static struct platform_pwm_backlight_data smdk6440_bl_data = {
202 203
203static void __init smdk6440_map_io(void) 204static void __init smdk6440_map_io(void)
204{ 205{
205 s5p_init_io(NULL, 0, S5P64X0_SYS_ID); 206 s5p64x0_init_io(NULL, 0);
206 s3c24xx_init_clocks(12000000); 207 s3c24xx_init_clocks(12000000);
207 s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs)); 208 s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs));
208 s5p_set_timer_source(S5P_PWM3, S5P_PWM4); 209 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -247,4 +248,5 @@ MACHINE_START(SMDK6440, "SMDK6440")
247 .map_io = smdk6440_map_io, 248 .map_io = smdk6440_map_io,
248 .init_machine = smdk6440_machine_init, 249 .init_machine = smdk6440_machine_init,
249 .timer = &s5p_timer, 250 .timer = &s5p_timer,
251 .restart = s5p64x0_restart,
250MACHINE_END 252MACHINE_END
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 7a4700959616..135cf5d84737 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -41,7 +41,6 @@
41 41
42#include <plat/regs-serial.h> 42#include <plat/regs-serial.h>
43#include <plat/gpio-cfg.h> 43#include <plat/gpio-cfg.h>
44#include <plat/s5p6450.h>
45#include <plat/clock.h> 44#include <plat/clock.h>
46#include <plat/devs.h> 45#include <plat/devs.h>
47#include <plat/cpu.h> 46#include <plat/cpu.h>
@@ -54,6 +53,8 @@
54#include <plat/fb.h> 53#include <plat/fb.h>
55#include <plat/regs-fb.h> 54#include <plat/regs-fb.h>
56 55
56#include "common.h"
57
57#define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 58#define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
58 S3C2410_UCON_RXILEVEL | \ 59 S3C2410_UCON_RXILEVEL | \
59 S3C2410_UCON_TXIRQMODE | \ 60 S3C2410_UCON_TXIRQMODE | \
@@ -222,7 +223,7 @@ static struct platform_pwm_backlight_data smdk6450_bl_data = {
222 223
223static void __init smdk6450_map_io(void) 224static void __init smdk6450_map_io(void)
224{ 225{
225 s5p_init_io(NULL, 0, S5P64X0_SYS_ID); 226 s5p64x0_init_io(NULL, 0);
226 s3c24xx_init_clocks(19200000); 227 s3c24xx_init_clocks(19200000);
227 s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs)); 228 s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs));
228 s5p_set_timer_source(S5P_PWM3, S5P_PWM4); 229 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -267,4 +268,5 @@ MACHINE_START(SMDK6450, "SMDK6450")
267 .map_io = smdk6450_map_io, 268 .map_io = smdk6450_map_io,
268 .init_machine = smdk6450_machine_init, 269 .init_machine = smdk6450_machine_init,
269 .timer = &s5p_timer, 270 .timer = &s5p_timer,
271 .restart = s5p64x0_restart,
270MACHINE_END 272MACHINE_END
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile
index a5e6e608b498..c3166c4d2ace 100644
--- a/arch/arm/mach-s5pc100/Makefile
+++ b/arch/arm/mach-s5pc100/Makefile
@@ -9,28 +9,25 @@ obj-m :=
9obj-n := 9obj-n :=
10obj- := 10obj- :=
11 11
12# Core support for S5PC100 system 12# Core
13 13
14obj-$(CONFIG_CPU_S5PC100) += cpu.o init.o clock.o 14obj-y += common.o clock.o
15obj-$(CONFIG_CPU_S5PC100) += setup-i2c0.o
16obj-$(CONFIG_CPU_S5PC100) += dma.o
17 15
18# Helper and device support 16obj-y += dma.o
19
20obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o
21obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o
22obj-$(CONFIG_S5PC100_SETUP_IDE) += setup-ide.o
23obj-$(CONFIG_S5PC100_SETUP_KEYPAD) += setup-keypad.o
24obj-$(CONFIG_S5PC100_SETUP_SDHCI) += setup-sdhci.o
25obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
26
27# device support
28obj-y += dev-audio.o
29obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
30 17
31# machine support 18# machine support
32 19
33obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o 20obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o
34 21
35# device support 22# device support
23
36obj-y += dev-audio.o 24obj-y += dev-audio.o
25obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
26
27obj-y += setup-i2c0.o
28obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o
29obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o
30obj-$(CONFIG_S5PC100_SETUP_IDE) += setup-ide.o
31obj-$(CONFIG_S5PC100_SETUP_KEYPAD) += setup-keypad.o
32obj-$(CONFIG_S5PC100_SETUP_SDHCI) += setup-sdhci.o
33obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c
index 8d47709da713..c4c74893f53c 100644
--- a/arch/arm/mach-s5pc100/clock.c
+++ b/arch/arm/mach-s5pc100/clock.c
@@ -27,7 +27,8 @@
27#include <plat/pll.h> 27#include <plat/pll.h>
28#include <plat/s5p-clock.h> 28#include <plat/s5p-clock.h>
29#include <plat/clock-clksrc.h> 29#include <plat/clock-clksrc.h>
30#include <plat/s5pc100.h> 30
31#include "common.h"
31 32
32static struct clk s5p_clk_otgphy = { 33static struct clk s5p_clk_otgphy = {
33 .name = "otg_phy", 34 .name = "otg_phy",
diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/common.c
index fd2708e7d8a9..73594a2fcf26 100644
--- a/arch/arm/mach-s5pc100/cpu.c
+++ b/arch/arm/mach-s5pc100/common.c
@@ -1,17 +1,16 @@
1/* linux/arch/arm/mach-s5pc100/cpu.c 1/*
2 * 2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com 3 * http://www.samsung.com
5 * 4 *
6 * Copyright 2009 Samsung Electronics Co. 5 * Copyright 2009 Samsung Electronics Co.
7 * Byungho Min <bhmin@samsung.com> 6 * Byungho Min <bhmin@samsung.com>
8 * 7 *
9 * Based on mach-s3c6410/cpu.c 8 * Common Codes for S5PC100
10 * 9 *
11 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
14*/ 13 */
15 14
16#include <linux/kernel.h> 15#include <linux/kernel.h>
17#include <linux/types.h> 16#include <linux/types.h>
@@ -26,35 +25,73 @@
26#include <linux/platform_device.h> 25#include <linux/platform_device.h>
27#include <linux/sched.h> 26#include <linux/sched.h>
28 27
28#include <asm/irq.h>
29#include <asm/proc-fns.h>
29#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
30#include <asm/mach/map.h> 31#include <asm/mach/map.h>
31#include <asm/mach/irq.h> 32#include <asm/mach/irq.h>
32 33
33#include <asm/proc-fns.h>
34
35#include <mach/hardware.h>
36#include <mach/map.h> 34#include <mach/map.h>
37#include <asm/irq.h> 35#include <mach/hardware.h>
38
39#include <plat/regs-serial.h>
40#include <mach/regs-clock.h> 36#include <mach/regs-clock.h>
41 37
42#include <plat/cpu.h> 38#include <plat/cpu.h>
43#include <plat/devs.h> 39#include <plat/devs.h>
44#include <plat/clock.h> 40#include <plat/clock.h>
45#include <plat/ata-core.h>
46#include <plat/iic-core.h>
47#include <plat/sdhci.h> 41#include <plat/sdhci.h>
48#include <plat/adc-core.h> 42#include <plat/adc-core.h>
49#include <plat/onenand-core.h> 43#include <plat/ata-core.h>
50#include <plat/fb-core.h> 44#include <plat/fb-core.h>
45#include <plat/iic-core.h>
46#include <plat/onenand-core.h>
47#include <plat/regs-serial.h>
48#include <plat/watchdog-reset.h>
49
50#include "common.h"
51
52static const char name_s5pc100[] = "S5PC100";
51 53
52#include <plat/s5pc100.h> 54static struct cpu_table cpu_ids[] __initdata = {
55 {
56 .idcode = S5PC100_CPU_ID,
57 .idmask = S5PC100_CPU_MASK,
58 .map_io = s5pc100_map_io,
59 .init_clocks = s5pc100_init_clocks,
60 .init_uarts = s5pc100_init_uarts,
61 .init = s5pc100_init,
62 .name = name_s5pc100,
63 },
64};
53 65
54/* Initial IO mappings */ 66/* Initial IO mappings */
55 67
56static struct map_desc s5pc100_iodesc[] __initdata = { 68static struct map_desc s5pc100_iodesc[] __initdata = {
57 { 69 {
70 .virtual = (unsigned long)S5P_VA_CHIPID,
71 .pfn = __phys_to_pfn(S5PC100_PA_CHIPID),
72 .length = SZ_4K,
73 .type = MT_DEVICE,
74 }, {
75 .virtual = (unsigned long)S3C_VA_SYS,
76 .pfn = __phys_to_pfn(S5PC100_PA_SYSCON),
77 .length = SZ_64K,
78 .type = MT_DEVICE,
79 }, {
80 .virtual = (unsigned long)S3C_VA_TIMER,
81 .pfn = __phys_to_pfn(S5PC100_PA_TIMER),
82 .length = SZ_16K,
83 .type = MT_DEVICE,
84 }, {
85 .virtual = (unsigned long)S3C_VA_WATCHDOG,
86 .pfn = __phys_to_pfn(S5PC100_PA_WATCHDOG),
87 .length = SZ_4K,
88 .type = MT_DEVICE,
89 }, {
90 .virtual = (unsigned long)S5P_VA_SROMC,
91 .pfn = __phys_to_pfn(S5PC100_PA_SROMC),
92 .length = SZ_4K,
93 .type = MT_DEVICE,
94 }, {
58 .virtual = (unsigned long)S5P_VA_SYSTIMER, 95 .virtual = (unsigned long)S5P_VA_SYSTIMER,
59 .pfn = __phys_to_pfn(S5PC100_PA_SYSTIMER), 96 .pfn = __phys_to_pfn(S5PC100_PA_SYSTIMER),
60 .length = SZ_16K, 97 .length = SZ_16K,
@@ -100,15 +137,27 @@ static void s5pc100_idle(void)
100 local_irq_enable(); 137 local_irq_enable();
101} 138}
102 139
103/* s5pc100_map_io 140/*
141 * s5pc100_map_io
104 * 142 *
105 * register the standard cpu IO areas 143 * register the standard CPU IO areas
106*/ 144 */
107 145
108void __init s5pc100_map_io(void) 146void __init s5pc100_init_io(struct map_desc *mach_desc, int size)
109{ 147{
148 /* initialize the io descriptors we need for initialization */
110 iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc)); 149 iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc));
150 if (mach_desc)
151 iotable_init(mach_desc, size);
152
153 /* detect cpu id and rev. */
154 s5p_init_cpu(S5P_VA_CHIPID);
111 155
156 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
157}
158
159void __init s5pc100_map_io(void)
160{
112 /* initialise device information early */ 161 /* initialise device information early */
113 s5pc100_default_sdhci0(); 162 s5pc100_default_sdhci0();
114 s5pc100_default_sdhci1(); 163 s5pc100_default_sdhci1();
@@ -155,7 +204,6 @@ static int __init s5pc100_core_init(void)
155{ 204{
156 return sysdev_class_register(&s5pc100_sysclass); 205 return sysdev_class_register(&s5pc100_sysclass);
157} 206}
158
159core_initcall(s5pc100_core_init); 207core_initcall(s5pc100_core_init);
160 208
161int __init s5pc100_init(void) 209int __init s5pc100_init(void)
@@ -167,3 +215,18 @@ int __init s5pc100_init(void)
167 215
168 return sysdev_register(&s5pc100_sysdev); 216 return sysdev_register(&s5pc100_sysdev);
169} 217}
218
219/* uart registration process */
220
221void __init s5pc100_init_uarts(struct s3c2410_uartcfg *cfg, int no)
222{
223 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
224}
225
226void s5pc100_restart(char mode, const char *cmd)
227{
228 if (mode != 's')
229 arch_wdt_reset();
230
231 soft_restart(0);
232}
diff --git a/arch/arm/mach-s5pc100/common.h b/arch/arm/mach-s5pc100/common.h
new file mode 100644
index 000000000000..9fbd3ae2b401
--- /dev/null
+++ b/arch/arm/mach-s5pc100/common.h
@@ -0,0 +1,37 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common Header for S5PC100 machines
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __ARCH_ARM_MACH_S5PC100_COMMON_H
13#define __ARCH_ARM_MACH_S5PC100_COMMON_H
14
15void s5pc100_init_io(struct map_desc *mach_desc, int size);
16void s5pc100_init_irq(void);
17
18void s5pc100_register_clocks(void);
19void s5pc100_setup_clocks(void);
20
21void s5pc100_restart(char mode, const char *cmd);
22
23#ifdef CONFIG_CPU_S5PC100
24
25extern int s5pc100_init(void);
26extern void s5pc100_map_io(void);
27extern void s5pc100_init_clocks(int xtal);
28extern void s5pc100_init_uarts(struct s3c2410_uartcfg *cfg, int no);
29
30#else
31#define s5pc100_init_clocks NULL
32#define s5pc100_init_uarts NULL
33#define s5pc100_map_io NULL
34#define s5pc100_init NULL
35#endif
36
37#endif /* __ARCH_ARM_MACH_S5PC100_COMMON_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h
index a9ea57c06600..afc96c298518 100644
--- a/arch/arm/mach-s5pc100/include/mach/system.h
+++ b/arch/arm/mach-s5pc100/include/mach/system.h
@@ -11,8 +11,6 @@
11#ifndef __ASM_ARCH_SYSTEM_H 11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H __FILE__ 12#define __ASM_ARCH_SYSTEM_H __FILE__
13 13
14#include <plat/system-reset.h>
15
16static void arch_idle(void) 14static void arch_idle(void)
17{ 15{
18 /* nothing here yet */ 16 /* nothing here yet */
diff --git a/arch/arm/mach-s5pc100/init.c b/arch/arm/mach-s5pc100/init.c
deleted file mode 100644
index 19d7b523c137..000000000000
--- a/arch/arm/mach-s5pc100/init.c
+++ /dev/null
@@ -1,24 +0,0 @@
1/* linux/arch/arm/plat-s5pc100/s5pc100-init.c
2 *
3 * Copyright 2009 Samsung Electronics Co.
4 * Byungho Min <bhmin@samsung.com>
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/init.h>
15
16#include <plat/cpu.h>
17#include <plat/devs.h>
18#include <plat/s5pc100.h>
19
20/* uart registration process */
21void __init s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
22{
23 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
24}
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index 93ebe3a92d10..674d22992f3c 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -43,7 +43,6 @@
43#include <plat/clock.h> 43#include <plat/clock.h>
44#include <plat/devs.h> 44#include <plat/devs.h>
45#include <plat/cpu.h> 45#include <plat/cpu.h>
46#include <plat/s5pc100.h>
47#include <plat/fb.h> 46#include <plat/fb.h>
48#include <plat/iic.h> 47#include <plat/iic.h>
49#include <plat/ata.h> 48#include <plat/ata.h>
@@ -54,6 +53,8 @@
54#include <plat/backlight.h> 53#include <plat/backlight.h>
55#include <plat/regs-fb-v4.h> 54#include <plat/regs-fb-v4.h>
56 55
56#include "common.h"
57
57/* Following are default values for UCON, ULCON and UFCON UART registers */ 58/* Following are default values for UCON, ULCON and UFCON UART registers */
58#define SMDKC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 59#define SMDKC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
59 S3C2410_UCON_RXILEVEL | \ 60 S3C2410_UCON_RXILEVEL | \
@@ -216,7 +217,7 @@ static struct platform_pwm_backlight_data smdkc100_bl_data = {
216 217
217static void __init smdkc100_map_io(void) 218static void __init smdkc100_map_io(void)
218{ 219{
219 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 220 s5pc100_init_io(NULL, 0);
220 s3c24xx_init_clocks(12000000); 221 s3c24xx_init_clocks(12000000);
221 s3c24xx_init_uarts(smdkc100_uartcfgs, ARRAY_SIZE(smdkc100_uartcfgs)); 222 s3c24xx_init_uarts(smdkc100_uartcfgs, ARRAY_SIZE(smdkc100_uartcfgs));
222} 223}
@@ -255,4 +256,5 @@ MACHINE_START(SMDKC100, "SMDKC100")
255 .map_io = smdkc100_map_io, 256 .map_io = smdkc100_map_io,
256 .init_machine = smdkc100_machine_init, 257 .init_machine = smdkc100_machine_init,
257 .timer = &s3c24xx_timer, 258 .timer = &s3c24xx_timer,
259 .restart = s5pc100_restart,
258MACHINE_END 260MACHINE_END
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 009fbe53df96..4c59186de957 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -10,18 +10,20 @@ obj-m :=
10obj-n := 10obj-n :=
11obj- := 11obj- :=
12 12
13# Core support for S5PV210 system 13# Core
14
15obj-y += common.o clock.o
14 16
15obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o dma.o
16obj-$(CONFIG_CPU_S5PV210) += setup-i2c0.o
17obj-$(CONFIG_PM) += pm.o 17obj-$(CONFIG_PM) += pm.o
18 18
19obj-y += dma.o
20
19# machine support 21# machine support
20 22
21obj-$(CONFIG_MACH_AQUILA) += mach-aquila.o 23obj-$(CONFIG_MACH_AQUILA) += mach-aquila.o
22obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o
23obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o
24obj-$(CONFIG_MACH_GONI) += mach-goni.o 24obj-$(CONFIG_MACH_GONI) += mach-goni.o
25obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o
26obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o
25obj-$(CONFIG_MACH_TORBRECK) += mach-torbreck.o 27obj-$(CONFIG_MACH_TORBRECK) += mach-torbreck.o
26 28
27# device support 29# device support
@@ -29,11 +31,12 @@ obj-$(CONFIG_MACH_TORBRECK) += mach-torbreck.o
29obj-y += dev-audio.o 31obj-y += dev-audio.o
30obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o 32obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
31 33
34obj-y += setup-i2c0.o
32obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o 35obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o
33obj-$(CONFIG_S5PV210_SETUP_FIMC) += setup-fimc.o 36obj-$(CONFIG_S5PV210_SETUP_FIMC) += setup-fimc.o
34obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o 37obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o
35obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o 38obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o
36obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o 39obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o
37obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o 40obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o
38obj-$(CONFIG_S5PV210_SETUP_SDHCI) += setup-sdhci.o 41obj-$(CONFIG_S5PV210_SETUP_SDHCI) += setup-sdhci.o
39obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 42obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index 4c5ac7a69e9e..f2dbf5f75a2c 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -29,7 +29,8 @@
29#include <plat/pll.h> 29#include <plat/pll.h>
30#include <plat/s5p-clock.h> 30#include <plat/s5p-clock.h>
31#include <plat/clock-clksrc.h> 31#include <plat/clock-clksrc.h>
32#include <plat/s5pv210.h> 32
33#include "common.h"
33 34
34static unsigned long xtal; 35static unsigned long xtal;
35 36
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/common.c
index 84ec74633232..a4921bc9f1dc 100644
--- a/arch/arm/mach-s5pv210/cpu.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -1,12 +1,13 @@
1/* linux/arch/arm/mach-s5pv210/cpu.c 1/*
2 * 2 * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com 3 * http://www.samsung.com
5 * 4 *
5 * Common Codes for S5PV210
6 *
6 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
9*/ 10 */
10 11
11#include <linux/kernel.h> 12#include <linux/kernel.h>
12#include <linux/types.h> 13#include <linux/types.h>
@@ -21,33 +22,74 @@
21#include <linux/platform_device.h> 22#include <linux/platform_device.h>
22#include <linux/sched.h> 23#include <linux/sched.h>
23#include <linux/dma-mapping.h> 24#include <linux/dma-mapping.h>
25#include <linux/serial_core.h>
24 26
27#include <asm/proc-fns.h>
25#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
26#include <asm/mach/map.h> 29#include <asm/mach/map.h>
27#include <asm/mach/irq.h> 30#include <asm/mach/irq.h>
28 31
29#include <asm/proc-fns.h>
30#include <mach/map.h> 32#include <mach/map.h>
31#include <mach/regs-clock.h> 33#include <mach/regs-clock.h>
32 34
33#include <plat/cpu.h> 35#include <plat/cpu.h>
34#include <plat/devs.h>
35#include <plat/clock.h> 36#include <plat/clock.h>
36#include <plat/fb-core.h> 37#include <plat/devs.h>
37#include <plat/s5pv210.h> 38#include <plat/sdhci.h>
38#include <plat/adc-core.h> 39#include <plat/adc-core.h>
39#include <plat/ata-core.h> 40#include <plat/ata-core.h>
41#include <plat/fb-core.h>
40#include <plat/fimc-core.h> 42#include <plat/fimc-core.h>
41#include <plat/iic-core.h> 43#include <plat/iic-core.h>
42#include <plat/keypad-core.h> 44#include <plat/keypad-core.h>
43#include <plat/sdhci.h>
44#include <plat/reset.h>
45#include <plat/tv-core.h> 45#include <plat/tv-core.h>
46#include <plat/regs-serial.h>
47
48#include "common.h"
49
50static const char name_s5pv210[] = "S5PV210/S5PC110";
51
52static struct cpu_table cpu_ids[] __initdata = {
53 {
54 .idcode = S5PV210_CPU_ID,
55 .idmask = S5PV210_CPU_MASK,
56 .map_io = s5pv210_map_io,
57 .init_clocks = s5pv210_init_clocks,
58 .init_uarts = s5pv210_init_uarts,
59 .init = s5pv210_init,
60 .name = name_s5pv210,
61 },
62};
46 63
47/* Initial IO mappings */ 64/* Initial IO mappings */
48 65
49static struct map_desc s5pv210_iodesc[] __initdata = { 66static struct map_desc s5pv210_iodesc[] __initdata = {
50 { 67 {
68 .virtual = (unsigned long)S5P_VA_CHIPID,
69 .pfn = __phys_to_pfn(S5PV210_PA_CHIPID),
70 .length = SZ_4K,
71 .type = MT_DEVICE,
72 }, {
73 .virtual = (unsigned long)S3C_VA_SYS,
74 .pfn = __phys_to_pfn(S5PV210_PA_SYSCON),
75 .length = SZ_64K,
76 .type = MT_DEVICE,
77 }, {
78 .virtual = (unsigned long)S3C_VA_TIMER,
79 .pfn = __phys_to_pfn(S5PV210_PA_TIMER),
80 .length = SZ_16K,
81 .type = MT_DEVICE,
82 }, {
83 .virtual = (unsigned long)S3C_VA_WATCHDOG,
84 .pfn = __phys_to_pfn(S5PV210_PA_WATCHDOG),
85 .length = SZ_4K,
86 .type = MT_DEVICE,
87 }, {
88 .virtual = (unsigned long)S5P_VA_SROMC,
89 .pfn = __phys_to_pfn(S5PV210_PA_SROMC),
90 .length = SZ_4K,
91 .type = MT_DEVICE,
92 }, {
51 .virtual = (unsigned long)S5P_VA_SYSTIMER, 93 .virtual = (unsigned long)S5P_VA_SYSTIMER,
52 .pfn = __phys_to_pfn(S5PV210_PA_SYSTIMER), 94 .pfn = __phys_to_pfn(S5PV210_PA_SYSTIMER),
53 .length = SZ_4K, 95 .length = SZ_4K,
@@ -108,19 +150,32 @@ static void s5pv210_idle(void)
108 local_irq_enable(); 150 local_irq_enable();
109} 151}
110 152
111static void s5pv210_sw_reset(void) 153void s5pv210_restart(char mode, const char *cmd)
112{ 154{
113 __raw_writel(0x1, S5P_SWRESET); 155 __raw_writel(0x1, S5P_SWRESET);
114} 156}
115 157
116/* s5pv210_map_io 158/*
159 * s5pv210_map_io
117 * 160 *
118 * register the standard cpu IO areas 161 * register the standard cpu IO areas
119*/ 162 */
120 163
121void __init s5pv210_map_io(void) 164void __init s5pv210_init_io(struct map_desc *mach_desc, int size)
122{ 165{
166 /* initialize the io descriptors we need for initialization */
123 iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc)); 167 iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc));
168 if (mach_desc)
169 iotable_init(mach_desc, size);
170
171 /* detect cpu id and rev. */
172 s5p_init_cpu(S5P_VA_CHIPID);
173
174 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
175}
176
177void __init s5pv210_map_io(void)
178{
124 init_consistent_dma_size(14 << 20); 179 init_consistent_dma_size(14 << 20);
125 180
126 /* initialise device information early */ 181 /* initialise device information early */
@@ -186,7 +241,6 @@ static int __init s5pv210_core_init(void)
186{ 241{
187 return sysdev_class_register(&s5pv210_sysclass); 242 return sysdev_class_register(&s5pv210_sysclass);
188} 243}
189
190core_initcall(s5pv210_core_init); 244core_initcall(s5pv210_core_init);
191 245
192int __init s5pv210_init(void) 246int __init s5pv210_init(void)
@@ -196,8 +250,31 @@ int __init s5pv210_init(void)
196 /* set idle function */ 250 /* set idle function */
197 pm_idle = s5pv210_idle; 251 pm_idle = s5pv210_idle;
198 252
199 /* set sw_reset function */
200 s5p_reset_hook = s5pv210_sw_reset;
201
202 return sysdev_register(&s5pv210_sysdev); 253 return sysdev_register(&s5pv210_sysdev);
203} 254}
255
256static struct s3c24xx_uart_clksrc s5pv210_serial_clocks[] = {
257 [0] = {
258 .name = "pclk",
259 .divisor = 1,
260 .min_baud = 0,
261 .max_baud = 0,
262 },
263};
264
265/* uart registration process */
266
267void __init s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no)
268{
269 struct s3c2410_uartcfg *tcfg = cfg;
270 u32 ucnt;
271
272 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
273 if (!tcfg->clocks) {
274 tcfg->clocks = s5pv210_serial_clocks;
275 tcfg->clocks_size = ARRAY_SIZE(s5pv210_serial_clocks);
276 }
277 }
278
279 s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
280}
diff --git a/arch/arm/mach-s5pv210/common.h b/arch/arm/mach-s5pv210/common.h
new file mode 100644
index 000000000000..6ed2af5c7518
--- /dev/null
+++ b/arch/arm/mach-s5pv210/common.h
@@ -0,0 +1,37 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common Header for S5PV210 machines
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __ARCH_ARM_MACH_S5PV210_COMMON_H
13#define __ARCH_ARM_MACH_S5PV210_COMMON_H
14
15void s5pv210_init_io(struct map_desc *mach_desc, int size);
16void s5pv210_init_irq(void);
17
18void s5pv210_register_clocks(void);
19void s5pv210_setup_clocks(void);
20
21void s5pv210_restart(char mode, const char *cmd);
22
23#ifdef CONFIG_CPU_S5PV210
24
25extern int s5pv210_init(void);
26extern void s5pv210_map_io(void);
27extern void s5pv210_init_clocks(int xtal);
28extern void s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no);
29
30#else
31#define s5pv210_init_clocks NULL
32#define s5pv210_init_uarts NULL
33#define s5pv210_map_io NULL
34#define s5pv210_init NULL
35#endif
36
37#endif /* __ARCH_ARM_MACH_S5PV210_COMMON_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h
index af8a200b2135..bf288ced860a 100644
--- a/arch/arm/mach-s5pv210/include/mach/system.h
+++ b/arch/arm/mach-s5pv210/include/mach/system.h
@@ -13,8 +13,6 @@
13#ifndef __ASM_ARCH_SYSTEM_H 13#ifndef __ASM_ARCH_SYSTEM_H
14#define __ASM_ARCH_SYSTEM_H __FILE__ 14#define __ASM_ARCH_SYSTEM_H __FILE__
15 15
16#include <plat/system-reset.h>
17
18static void arch_idle(void) 16static void arch_idle(void)
19{ 17{
20 /* nothing here yet */ 18 /* nothing here yet */
diff --git a/arch/arm/mach-s5pv210/init.c b/arch/arm/mach-s5pv210/init.c
deleted file mode 100644
index 4865ae2c475a..000000000000
--- a/arch/arm/mach-s5pv210/init.c
+++ /dev/null
@@ -1,44 +0,0 @@
1/* linux/arch/arm/mach-s5pv210/init.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/serial_core.h>
15
16#include <plat/cpu.h>
17#include <plat/devs.h>
18#include <plat/s5pv210.h>
19#include <plat/regs-serial.h>
20
21static struct s3c24xx_uart_clksrc s5pv210_serial_clocks[] = {
22 [0] = {
23 .name = "pclk",
24 .divisor = 1,
25 .min_baud = 0,
26 .max_baud = 0,
27 },
28};
29
30/* uart registration process */
31void __init s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
32{
33 struct s3c2410_uartcfg *tcfg = cfg;
34 u32 ucnt;
35
36 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
37 if (!tcfg->clocks) {
38 tcfg->clocks = s5pv210_serial_clocks;
39 tcfg->clocks_size = ARRAY_SIZE(s5pv210_serial_clocks);
40 }
41 }
42
43 s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
44}
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 71ca95604d63..6f7dfe993c12 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -33,7 +33,6 @@
33 33
34#include <plat/gpio-cfg.h> 34#include <plat/gpio-cfg.h>
35#include <plat/regs-serial.h> 35#include <plat/regs-serial.h>
36#include <plat/s5pv210.h>
37#include <plat/devs.h> 36#include <plat/devs.h>
38#include <plat/cpu.h> 37#include <plat/cpu.h>
39#include <plat/fb.h> 38#include <plat/fb.h>
@@ -42,6 +41,8 @@
42#include <plat/s5p-time.h> 41#include <plat/s5p-time.h>
43#include <plat/regs-fb-v4.h> 42#include <plat/regs-fb-v4.h>
44 43
44#include "common.h"
45
45/* Following are default values for UCON, ULCON and UFCON UART registers */ 46/* Following are default values for UCON, ULCON and UFCON UART registers */
46#define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 47#define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
47 S3C2410_UCON_RXILEVEL | \ 48 S3C2410_UCON_RXILEVEL | \
@@ -645,7 +646,7 @@ static void __init aquila_sound_init(void)
645 646
646static void __init aquila_map_io(void) 647static void __init aquila_map_io(void)
647{ 648{
648 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 649 s5pv210_init_io(NULL, 0);
649 s3c24xx_init_clocks(24000000); 650 s3c24xx_init_clocks(24000000);
650 s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs)); 651 s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs));
651 s5p_set_timer_source(S5P_PWM3, S5P_PWM4); 652 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -685,4 +686,5 @@ MACHINE_START(AQUILA, "Aquila")
685 .map_io = aquila_map_io, 686 .map_io = aquila_map_io,
686 .init_machine = aquila_machine_init, 687 .init_machine = aquila_machine_init,
687 .timer = &s5p_timer, 688 .timer = &s5p_timer,
689 .restart = s5pv210_restart,
688MACHINE_END 690MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 448fd9ea96f2..12c693717398 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -38,7 +38,6 @@
38 38
39#include <plat/gpio-cfg.h> 39#include <plat/gpio-cfg.h>
40#include <plat/regs-serial.h> 40#include <plat/regs-serial.h>
41#include <plat/s5pv210.h>
42#include <plat/devs.h> 41#include <plat/devs.h>
43#include <plat/cpu.h> 42#include <plat/cpu.h>
44#include <plat/fb.h> 43#include <plat/fb.h>
@@ -55,6 +54,8 @@
55#include <media/s5p_fimc.h> 54#include <media/s5p_fimc.h>
56#include <media/noon010pc30.h> 55#include <media/noon010pc30.h>
57 56
57#include "common.h"
58
58/* Following are default values for UCON, ULCON and UFCON UART registers */ 59/* Following are default values for UCON, ULCON and UFCON UART registers */
59#define GONI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 60#define GONI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
60 S3C2410_UCON_RXILEVEL | \ 61 S3C2410_UCON_RXILEVEL | \
@@ -891,7 +892,7 @@ static void __init goni_sound_init(void)
891 892
892static void __init goni_map_io(void) 893static void __init goni_map_io(void)
893{ 894{
894 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 895 s5pv210_init_io(NULL, 0);
895 s3c24xx_init_clocks(24000000); 896 s3c24xx_init_clocks(24000000);
896 s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs)); 897 s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs));
897 s5p_set_timer_source(S5P_PWM3, S5P_PWM4); 898 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -962,4 +963,5 @@ MACHINE_START(GONI, "GONI")
962 .init_machine = goni_machine_init, 963 .init_machine = goni_machine_init,
963 .timer = &s5p_timer, 964 .timer = &s5p_timer,
964 .reserve = &goni_reserve, 965 .reserve = &goni_reserve,
966 .restart = s5pv210_restart,
965MACHINE_END 967MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index c2531ffc720b..9405da4ae3a3 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -25,7 +25,6 @@
25#include <mach/regs-clock.h> 25#include <mach/regs-clock.h>
26 26
27#include <plat/regs-serial.h> 27#include <plat/regs-serial.h>
28#include <plat/s5pv210.h>
29#include <plat/devs.h> 28#include <plat/devs.h>
30#include <plat/cpu.h> 29#include <plat/cpu.h>
31#include <plat/ata.h> 30#include <plat/ata.h>
@@ -33,6 +32,8 @@
33#include <plat/pm.h> 32#include <plat/pm.h>
34#include <plat/s5p-time.h> 33#include <plat/s5p-time.h>
35 34
35#include "common.h"
36
36/* Following are default values for UCON, ULCON and UFCON UART registers */ 37/* Following are default values for UCON, ULCON and UFCON UART registers */
37#define SMDKC110_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 38#define SMDKC110_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
38 S3C2410_UCON_RXILEVEL | \ 39 S3C2410_UCON_RXILEVEL | \
@@ -110,7 +111,7 @@ static struct i2c_board_info smdkc110_i2c_devs2[] __initdata = {
110 111
111static void __init smdkc110_map_io(void) 112static void __init smdkc110_map_io(void)
112{ 113{
113 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 114 s5pv210_init_io(NULL, 0);
114 s3c24xx_init_clocks(24000000); 115 s3c24xx_init_clocks(24000000);
115 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); 116 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
116 s5p_set_timer_source(S5P_PWM3, S5P_PWM4); 117 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -143,4 +144,5 @@ MACHINE_START(SMDKC110, "SMDKC110")
143 .map_io = smdkc110_map_io, 144 .map_io = smdkc110_map_io,
144 .init_machine = smdkc110_machine_init, 145 .init_machine = smdkc110_machine_init,
145 .timer = &s5p_timer, 146 .timer = &s5p_timer,
147 .restart = s5pv210_restart,
146MACHINE_END 148MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 4ca77c41d499..cf4da7393822 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -34,7 +34,6 @@
34#include <plat/regs-serial.h> 34#include <plat/regs-serial.h>
35#include <plat/regs-srom.h> 35#include <plat/regs-srom.h>
36#include <plat/gpio-cfg.h> 36#include <plat/gpio-cfg.h>
37#include <plat/s5pv210.h>
38#include <plat/devs.h> 37#include <plat/devs.h>
39#include <plat/cpu.h> 38#include <plat/cpu.h>
40#include <plat/adc.h> 39#include <plat/adc.h>
@@ -48,6 +47,8 @@
48#include <plat/backlight.h> 47#include <plat/backlight.h>
49#include <plat/regs-fb-v4.h> 48#include <plat/regs-fb-v4.h>
50 49
50#include "common.h"
51
51/* Following are default values for UCON, ULCON and UFCON UART registers */ 52/* Following are default values for UCON, ULCON and UFCON UART registers */
52#define SMDKV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 53#define SMDKV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
53 S3C2410_UCON_RXILEVEL | \ 54 S3C2410_UCON_RXILEVEL | \
@@ -274,11 +275,12 @@ static struct samsung_bl_gpio_info smdkv210_bl_gpio_info = {
274 275
275static struct platform_pwm_backlight_data smdkv210_bl_data = { 276static struct platform_pwm_backlight_data smdkv210_bl_data = {
276 .pwm_id = 3, 277 .pwm_id = 3,
278 .pwm_period_ns = 1000,
277}; 279};
278 280
279static void __init smdkv210_map_io(void) 281static void __init smdkv210_map_io(void)
280{ 282{
281 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 283 s5pv210_init_io(NULL, 0);
282 s3c24xx_init_clocks(24000000); 284 s3c24xx_init_clocks(24000000);
283 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); 285 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
284 s5p_set_timer_source(S5P_PWM2, S5P_PWM4); 286 s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
@@ -320,4 +322,5 @@ MACHINE_START(SMDKV210, "SMDKV210")
320 .map_io = smdkv210_map_io, 322 .map_io = smdkv210_map_io,
321 .init_machine = smdkv210_machine_init, 323 .init_machine = smdkv210_machine_init,
322 .timer = &s5p_timer, 324 .timer = &s5p_timer,
325 .restart = s5pv210_restart,
323MACHINE_END 326MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-torbreck.c b/arch/arm/mach-s5pv210/mach-torbreck.c
index df70fcb34516..74e99bc0dc9b 100644
--- a/arch/arm/mach-s5pv210/mach-torbreck.c
+++ b/arch/arm/mach-s5pv210/mach-torbreck.c
@@ -24,12 +24,13 @@
24#include <mach/regs-clock.h> 24#include <mach/regs-clock.h>
25 25
26#include <plat/regs-serial.h> 26#include <plat/regs-serial.h>
27#include <plat/s5pv210.h>
28#include <plat/devs.h> 27#include <plat/devs.h>
29#include <plat/cpu.h> 28#include <plat/cpu.h>
30#include <plat/iic.h> 29#include <plat/iic.h>
31#include <plat/s5p-time.h> 30#include <plat/s5p-time.h>
32 31
32#include "common.h"
33
33/* Following are default values for UCON, ULCON and UFCON UART registers */ 34/* Following are default values for UCON, ULCON and UFCON UART registers */
34#define TORBRECK_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 35#define TORBRECK_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
35 S3C2410_UCON_RXILEVEL | \ 36 S3C2410_UCON_RXILEVEL | \
@@ -103,7 +104,7 @@ static struct i2c_board_info torbreck_i2c_devs2[] __initdata = {
103 104
104static void __init torbreck_map_io(void) 105static void __init torbreck_map_io(void)
105{ 106{
106 s5p_init_io(NULL, 0, S5P_VA_CHIPID); 107 s5pv210_init_io(NULL, 0);
107 s3c24xx_init_clocks(24000000); 108 s3c24xx_init_clocks(24000000);
108 s3c24xx_init_uarts(torbreck_uartcfgs, ARRAY_SIZE(torbreck_uartcfgs)); 109 s3c24xx_init_uarts(torbreck_uartcfgs, ARRAY_SIZE(torbreck_uartcfgs));
109 s5p_set_timer_source(S5P_PWM3, S5P_PWM4); 110 s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -132,4 +133,5 @@ MACHINE_START(TORBRECK, "TORBRECK")
132 .map_io = torbreck_map_io, 133 .map_io = torbreck_map_io,
133 .init_machine = torbreck_machine_init, 134 .init_machine = torbreck_machine_init,
134 .timer = &s5p_timer, 135 .timer = &s5p_timer,
136 .restart = s5pv210_restart,
135MACHINE_END 137MACHINE_END
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
index 3dd133f18415..6b93e200bcac 100644
--- a/arch/arm/mach-sa1100/assabet.c
+++ b/arch/arm/mach-sa1100/assabet.c
@@ -455,4 +455,5 @@ MACHINE_START(ASSABET, "Intel-Assabet")
455#ifdef CONFIG_SA1111 455#ifdef CONFIG_SA1111
456 .dma_zone_size = SZ_1M, 456 .dma_zone_size = SZ_1M,
457#endif 457#endif
458 .restart = sa11x0_restart,
458MACHINE_END 459MACHINE_END
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c
index bda83e1ab078..b07a2c024cb7 100644
--- a/arch/arm/mach-sa1100/badge4.c
+++ b/arch/arm/mach-sa1100/badge4.c
@@ -309,4 +309,5 @@ MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4")
309#ifdef CONFIG_SA1111 309#ifdef CONFIG_SA1111
310 .dma_zone_size = SZ_1M, 310 .dma_zone_size = SZ_1M,
311#endif 311#endif
312 .restart = sa11x0_restart,
312MACHINE_END 313MACHINE_END
diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c
index 7f3da4b11ec9..11bb6d0b9be3 100644
--- a/arch/arm/mach-sa1100/cerf.c
+++ b/arch/arm/mach-sa1100/cerf.c
@@ -139,4 +139,5 @@ MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube")
139 .init_irq = cerf_init_irq, 139 .init_irq = cerf_init_irq,
140 .timer = &sa1100_timer, 140 .timer = &sa1100_timer,
141 .init_machine = cerf_init, 141 .init_machine = cerf_init,
142 .restart = sa11x0_restart,
142MACHINE_END 143MACHINE_END
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index 2965cc9d424e..b9060e236def 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -387,4 +387,5 @@ MACHINE_START(COLLIE, "Sharp-Collie")
387 .init_irq = sa1100_init_irq, 387 .init_irq = sa1100_init_irq,
388 .timer = &sa1100_timer, 388 .timer = &sa1100_timer,
389 .init_machine = collie_init, 389 .init_machine = collie_init,
390 .restart = sa11x0_restart,
390MACHINE_END 391MACHINE_END
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 5fa5ae1f39e1..bb10ee2cb89f 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -126,6 +126,17 @@ static void sa1100_power_off(void)
126 PMCR = PMCR_SF; 126 PMCR = PMCR_SF;
127} 127}
128 128
129void sa11x0_restart(char mode, const char *cmd)
130{
131 if (mode == 's') {
132 /* Jump into ROM at address 0 */
133 soft_restart(0);
134 } else {
135 /* Use on-chip reset capability */
136 RSRR = RSRR_SWR;
137 }
138}
139
129static void sa11x0_register_device(struct platform_device *dev, void *data) 140static void sa11x0_register_device(struct platform_device *dev, void *data)
130{ 141{
131 int err; 142 int err;
diff --git a/arch/arm/mach-sa1100/generic.h b/arch/arm/mach-sa1100/generic.h
index b7a9a601c2d1..33268cf6be36 100644
--- a/arch/arm/mach-sa1100/generic.h
+++ b/arch/arm/mach-sa1100/generic.h
@@ -10,6 +10,7 @@ extern struct sys_timer sa1100_timer;
10extern void __init sa1100_map_io(void); 10extern void __init sa1100_map_io(void);
11extern void __init sa1100_init_irq(void); 11extern void __init sa1100_init_irq(void);
12extern void __init sa1100_init_gpio(void); 12extern void __init sa1100_init_gpio(void);
13extern void sa11x0_restart(char, const char *);
13 14
14#define SET_BANK(__nr,__start,__size) \ 15#define SET_BANK(__nr,__start,__size) \
15 mi->bank[__nr].start = (__start), \ 16 mi->bank[__nr].start = (__start), \
diff --git a/arch/arm/mach-sa1100/h3100.c b/arch/arm/mach-sa1100/h3100.c
index b30733a2b82e..1e6b3c105ba6 100644
--- a/arch/arm/mach-sa1100/h3100.c
+++ b/arch/arm/mach-sa1100/h3100.c
@@ -89,5 +89,6 @@ MACHINE_START(H3100, "Compaq iPAQ H3100")
89 .init_irq = sa1100_init_irq, 89 .init_irq = sa1100_init_irq,
90 .timer = &sa1100_timer, 90 .timer = &sa1100_timer,
91 .init_machine = h3100_mach_init, 91 .init_machine = h3100_mach_init,
92 .restart = sa11x0_restart,
92MACHINE_END 93MACHINE_END
93 94
diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c
index 6fd324d92389..6b58e7460ecf 100644
--- a/arch/arm/mach-sa1100/h3600.c
+++ b/arch/arm/mach-sa1100/h3600.c
@@ -130,5 +130,6 @@ MACHINE_START(H3600, "Compaq iPAQ H3600")
130 .init_irq = sa1100_init_irq, 130 .init_irq = sa1100_init_irq,
131 .timer = &sa1100_timer, 131 .timer = &sa1100_timer,
132 .init_machine = h3600_mach_init, 132 .init_machine = h3600_mach_init,
133 .restart = sa11x0_restart,
133MACHINE_END 134MACHINE_END
134 135
diff --git a/arch/arm/mach-sa1100/hackkit.c b/arch/arm/mach-sa1100/hackkit.c
index 30f4a551b8e5..c01bb36db940 100644
--- a/arch/arm/mach-sa1100/hackkit.c
+++ b/arch/arm/mach-sa1100/hackkit.c
@@ -200,4 +200,5 @@ MACHINE_START(HACKKIT, "HackKit Cpu Board")
200 .init_irq = sa1100_init_irq, 200 .init_irq = sa1100_init_irq,
201 .timer = &sa1100_timer, 201 .timer = &sa1100_timer,
202 .init_machine = hackkit_init, 202 .init_machine = hackkit_init,
203 .restart = sa11x0_restart,
203MACHINE_END 204MACHINE_END
diff --git a/arch/arm/mach-sa1100/include/mach/system.h b/arch/arm/mach-sa1100/include/mach/system.h
index 345d35b7450c..e17b208f76d4 100644
--- a/arch/arm/mach-sa1100/include/mach/system.h
+++ b/arch/arm/mach-sa1100/include/mach/system.h
@@ -3,20 +3,7 @@
3 * 3 *
4 * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net> 4 * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net>
5 */ 5 */
6#include <mach/hardware.h>
7
8static inline void arch_idle(void) 6static inline void arch_idle(void)
9{ 7{
10 cpu_do_idle(); 8 cpu_do_idle();
11} 9}
12
13static inline void arch_reset(char mode, const char *cmd)
14{
15 if (mode == 's') {
16 /* Jump into ROM at address 0 */
17 soft_restart(0);
18 } else {
19 /* Use on-chip reset capability */
20 RSRR = RSRR_SWR;
21 }
22}
diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c
index 77198fe02bc5..ee121d6f0480 100644
--- a/arch/arm/mach-sa1100/jornada720.c
+++ b/arch/arm/mach-sa1100/jornada720.c
@@ -373,4 +373,5 @@ MACHINE_START(JORNADA720, "HP Jornada 720")
373#ifdef CONFIG_SA1111 373#ifdef CONFIG_SA1111
374 .dma_zone_size = SZ_1M, 374 .dma_zone_size = SZ_1M,
375#endif 375#endif
376 .restart = sa11x0_restart,
376MACHINE_END 377MACHINE_END
diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c
index 5bc59d0947ba..af4e2761f3db 100644
--- a/arch/arm/mach-sa1100/lart.c
+++ b/arch/arm/mach-sa1100/lart.c
@@ -66,4 +66,5 @@ MACHINE_START(LART, "LART")
66 .init_irq = sa1100_init_irq, 66 .init_irq = sa1100_init_irq,
67 .init_machine = lart_init, 67 .init_machine = lart_init,
68 .timer = &sa1100_timer, 68 .timer = &sa1100_timer,
69 .restart = sa11x0_restart,
69MACHINE_END 70MACHINE_END
diff --git a/arch/arm/mach-sa1100/nanoengine.c b/arch/arm/mach-sa1100/nanoengine.c
index 032f3881d145..ed77f85b9951 100644
--- a/arch/arm/mach-sa1100/nanoengine.c
+++ b/arch/arm/mach-sa1100/nanoengine.c
@@ -116,4 +116,5 @@ MACHINE_START(NANOENGINE, "BSE nanoEngine")
116 .init_irq = sa1100_init_irq, 116 .init_irq = sa1100_init_irq,
117 .timer = &sa1100_timer, 117 .timer = &sa1100_timer,
118 .init_machine = nanoengine_init, 118 .init_machine = nanoengine_init,
119 .restart = sa11x0_restart,
119MACHINE_END 120MACHINE_END
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
index 65161f2bea29..9307df053533 100644
--- a/arch/arm/mach-sa1100/pleb.c
+++ b/arch/arm/mach-sa1100/pleb.c
@@ -150,4 +150,5 @@ MACHINE_START(PLEB, "PLEB")
150 .init_irq = sa1100_init_irq, 150 .init_irq = sa1100_init_irq,
151 .timer = &sa1100_timer, 151 .timer = &sa1100_timer,
152 .init_machine = pleb_init, 152 .init_machine = pleb_init,
153 .restart = sa11x0_restart,
153MACHINE_END 154MACHINE_END
diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c
index 1cccbf5b9e9a..318b2b766a0b 100644
--- a/arch/arm/mach-sa1100/shannon.c
+++ b/arch/arm/mach-sa1100/shannon.c
@@ -87,4 +87,5 @@ MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)")
87 .init_irq = sa1100_init_irq, 87 .init_irq = sa1100_init_irq,
88 .timer = &sa1100_timer, 88 .timer = &sa1100_timer,
89 .init_machine = shannon_init, 89 .init_machine = shannon_init,
90 .restart = sa11x0_restart,
90MACHINE_END 91MACHINE_END
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
index 4790f3f3d008..e17c04d6e324 100644
--- a/arch/arm/mach-sa1100/simpad.c
+++ b/arch/arm/mach-sa1100/simpad.c
@@ -396,4 +396,5 @@ MACHINE_START(SIMPAD, "Simpad")
396 .map_io = simpad_map_io, 396 .map_io = simpad_map_io,
397 .init_irq = sa1100_init_irq, 397 .init_irq = sa1100_init_irq,
398 .timer = &sa1100_timer, 398 .timer = &sa1100_timer,
399 .restart = sa11x0_restart,
399MACHINE_END 400MACHINE_END
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index f4b25d875f3d..a851c254ad6c 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -26,7 +26,7 @@
26#define ROMCARD_SIZE 0x08000000 26#define ROMCARD_SIZE 0x08000000
27#define ROMCARD_START 0x10000000 27#define ROMCARD_START 0x10000000
28 28
29void arch_reset(char mode, const char *cmd) 29static void shark_restart(char mode, const char *cmd)
30{ 30{
31 short temp; 31 short temp;
32 /* Reset the Machine via pc[3] of the sequoia chipset */ 32 /* Reset the Machine via pc[3] of the sequoia chipset */
@@ -156,4 +156,5 @@ MACHINE_START(SHARK, "Shark")
156 .init_irq = shark_init_irq, 156 .init_irq = shark_init_irq,
157 .timer = &shark_timer, 157 .timer = &shark_timer,
158 .dma_zone_size = SZ_4M, 158 .dma_zone_size = SZ_4M,
159 .restart = shark_restart,
159MACHINE_END 160MACHINE_END
diff --git a/arch/arm/mach-shark/include/mach/system.h b/arch/arm/mach-shark/include/mach/system.h
index 21c373b30bbc..1b2f2c5050a8 100644
--- a/arch/arm/mach-shark/include/mach/system.h
+++ b/arch/arm/mach-shark/include/mach/system.h
@@ -6,9 +6,6 @@
6#ifndef __ASM_ARCH_SYSTEM_H 6#ifndef __ASM_ARCH_SYSTEM_H
7#define __ASM_ARCH_SYSTEM_H 7#define __ASM_ARCH_SYSTEM_H
8 8
9/* Found in arch/mach-shark/core.c */
10extern void arch_reset(char mode, const char *cmd);
11
12static inline void arch_idle(void) 9static inline void arch_idle(void)
13{ 10{
14} 11}
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index 202c3c6ec9d8..f71fa3c13c8c 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -607,6 +607,7 @@ struct sys_timer ag5evm_timer = {
607 607
608MACHINE_START(AG5EVM, "ag5evm") 608MACHINE_START(AG5EVM, "ag5evm")
609 .map_io = ag5evm_map_io, 609 .map_io = ag5evm_map_io,
610 .nr_irqs = NR_IRQS_LEGACY,
610 .init_irq = sh73a0_init_irq, 611 .init_irq = sh73a0_init_irq,
611 .handle_irq = gic_handle_irq, 612 .handle_irq = gic_handle_irq,
612 .init_machine = ag5evm_init, 613 .init_machine = ag5evm_init,
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index 1b4439d3f9d5..857ceeec1bb0 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -33,6 +33,7 @@
33#include <linux/input/sh_keysc.h> 33#include <linux/input/sh_keysc.h>
34#include <linux/gpio_keys.h> 34#include <linux/gpio_keys.h>
35#include <linux/leds.h> 35#include <linux/leds.h>
36#include <linux/platform_data/leds-renesas-tpu.h>
36#include <linux/mmc/host.h> 37#include <linux/mmc/host.h>
37#include <linux/mmc/sh_mmcif.h> 38#include <linux/mmc/sh_mmcif.h>
38#include <linux/mfd/tmio.h> 39#include <linux/mfd/tmio.h>
@@ -56,7 +57,7 @@ static struct resource smsc9220_resources[] = {
56 .flags = IORESOURCE_MEM, 57 .flags = IORESOURCE_MEM,
57 }, 58 },
58 [1] = { 59 [1] = {
59 .start = gic_spi(33), /* PINTA2 @ PORT144 */ 60 .start = SH73A0_PINT0_IRQ(2), /* PINTA2 */
60 .flags = IORESOURCE_IRQ, 61 .flags = IORESOURCE_IRQ,
61 }, 62 },
62}; 63};
@@ -157,10 +158,6 @@ static struct platform_device gpio_keys_device = {
157#define GPIO_LED(n, g) { .name = n, .gpio = g } 158#define GPIO_LED(n, g) { .name = n, .gpio = g }
158 159
159static struct gpio_led gpio_leds[] = { 160static struct gpio_led gpio_leds[] = {
160 GPIO_LED("V2513", GPIO_PORT153), /* PORT153 [TPU1T02] -> V2513 */
161 GPIO_LED("V2514", GPIO_PORT199), /* PORT199 [TPU4TO1] -> V2514 */
162 GPIO_LED("V2515", GPIO_PORT197), /* PORT197 [TPU2TO1] -> V2515 */
163 GPIO_LED("KEYLED", GPIO_PORT163), /* PORT163 [TPU3TO0] -> KEYLED */
164 GPIO_LED("G", GPIO_PORT20), /* PORT20 [GPO0] -> LED7 -> "G" */ 161 GPIO_LED("G", GPIO_PORT20), /* PORT20 [GPO0] -> LED7 -> "G" */
165 GPIO_LED("H", GPIO_PORT21), /* PORT21 [GPO1] -> LED8 -> "H" */ 162 GPIO_LED("H", GPIO_PORT21), /* PORT21 [GPO1] -> LED8 -> "H" */
166 GPIO_LED("J", GPIO_PORT22), /* PORT22 [GPO2] -> LED9 -> "J" */ 163 GPIO_LED("J", GPIO_PORT22), /* PORT22 [GPO2] -> LED9 -> "J" */
@@ -179,6 +176,119 @@ static struct platform_device gpio_leds_device = {
179 }, 176 },
180}; 177};
181 178
179/* TPU LED */
180static struct led_renesas_tpu_config led_renesas_tpu12_pdata = {
181 .name = "V2513",
182 .pin_gpio_fn = GPIO_FN_TPU1TO2,
183 .pin_gpio = GPIO_PORT153,
184 .channel_offset = 0x90,
185 .timer_bit = 2,
186 .max_brightness = 1000,
187};
188
189static struct resource tpu12_resources[] = {
190 [0] = {
191 .name = "TPU12",
192 .start = 0xe6610090,
193 .end = 0xe66100b5,
194 .flags = IORESOURCE_MEM,
195 },
196};
197
198static struct platform_device leds_tpu12_device = {
199 .name = "leds-renesas-tpu",
200 .id = 12,
201 .dev = {
202 .platform_data = &led_renesas_tpu12_pdata,
203 },
204 .num_resources = ARRAY_SIZE(tpu12_resources),
205 .resource = tpu12_resources,
206};
207
208static struct led_renesas_tpu_config led_renesas_tpu41_pdata = {
209 .name = "V2514",
210 .pin_gpio_fn = GPIO_FN_TPU4TO1,
211 .pin_gpio = GPIO_PORT199,
212 .channel_offset = 0x50,
213 .timer_bit = 1,
214 .max_brightness = 1000,
215};
216
217static struct resource tpu41_resources[] = {
218 [0] = {
219 .name = "TPU41",
220 .start = 0xe6640050,
221 .end = 0xe6640075,
222 .flags = IORESOURCE_MEM,
223 },
224};
225
226static struct platform_device leds_tpu41_device = {
227 .name = "leds-renesas-tpu",
228 .id = 41,
229 .dev = {
230 .platform_data = &led_renesas_tpu41_pdata,
231 },
232 .num_resources = ARRAY_SIZE(tpu41_resources),
233 .resource = tpu41_resources,
234};
235
236static struct led_renesas_tpu_config led_renesas_tpu21_pdata = {
237 .name = "V2515",
238 .pin_gpio_fn = GPIO_FN_TPU2TO1,
239 .pin_gpio = GPIO_PORT197,
240 .channel_offset = 0x50,
241 .timer_bit = 1,
242 .max_brightness = 1000,
243};
244
245static struct resource tpu21_resources[] = {
246 [0] = {
247 .name = "TPU21",
248 .start = 0xe6620050,
249 .end = 0xe6620075,
250 .flags = IORESOURCE_MEM,
251 },
252};
253
254static struct platform_device leds_tpu21_device = {
255 .name = "leds-renesas-tpu",
256 .id = 21,
257 .dev = {
258 .platform_data = &led_renesas_tpu21_pdata,
259 },
260 .num_resources = ARRAY_SIZE(tpu21_resources),
261 .resource = tpu21_resources,
262};
263
264static struct led_renesas_tpu_config led_renesas_tpu30_pdata = {
265 .name = "KEYLED",
266 .pin_gpio_fn = GPIO_FN_TPU3TO0,
267 .pin_gpio = GPIO_PORT163,
268 .channel_offset = 0x10,
269 .timer_bit = 0,
270 .max_brightness = 1000,
271};
272
273static struct resource tpu30_resources[] = {
274 [0] = {
275 .name = "TPU30",
276 .start = 0xe6630010,
277 .end = 0xe6630035,
278 .flags = IORESOURCE_MEM,
279 },
280};
281
282static struct platform_device leds_tpu30_device = {
283 .name = "leds-renesas-tpu",
284 .id = 30,
285 .dev = {
286 .platform_data = &led_renesas_tpu30_pdata,
287 },
288 .num_resources = ARRAY_SIZE(tpu30_resources),
289 .resource = tpu30_resources,
290};
291
182/* MMCIF */ 292/* MMCIF */
183static struct resource mmcif_resources[] = { 293static struct resource mmcif_resources[] = {
184 [0] = { 294 [0] = {
@@ -291,6 +401,10 @@ static struct platform_device *kota2_devices[] __initdata = {
291 &keysc_device, 401 &keysc_device,
292 &gpio_keys_device, 402 &gpio_keys_device,
293 &gpio_leds_device, 403 &gpio_leds_device,
404 &leds_tpu12_device,
405 &leds_tpu41_device,
406 &leds_tpu21_device,
407 &leds_tpu30_device,
294 &mmcif_device, 408 &mmcif_device,
295 &sdhi0_device, 409 &sdhi0_device,
296 &sdhi1_device, 410 &sdhi1_device,
@@ -317,18 +431,6 @@ static void __init kota2_map_io(void)
317 shmobile_setup_console(); 431 shmobile_setup_console();
318} 432}
319 433
320#define PINTER0A 0xe69000a0
321#define PINTCR0A 0xe69000b0
322
323void __init kota2_init_irq(void)
324{
325 sh73a0_init_irq();
326
327 /* setup PINT: enable PINTA2 as active low */
328 __raw_writel(1 << 29, PINTER0A);
329 __raw_writew(2 << 10, PINTCR0A);
330}
331
332static void __init kota2_init(void) 434static void __init kota2_init(void)
333{ 435{
334 sh73a0_pinmux_init(); 436 sh73a0_pinmux_init();
@@ -447,7 +549,8 @@ struct sys_timer kota2_timer = {
447 549
448MACHINE_START(KOTA2, "kota2") 550MACHINE_START(KOTA2, "kota2")
449 .map_io = kota2_map_io, 551 .map_io = kota2_map_io,
450 .init_irq = kota2_init_irq, 552 .nr_irqs = NR_IRQS_LEGACY,
553 .init_irq = sh73a0_init_irq,
451 .handle_irq = gic_handle_irq, 554 .handle_irq = gic_handle_irq,
452 .init_machine = kota2_init, 555 .init_machine = kota2_init,
453 .timer = &kota2_timer, 556 .timer = &kota2_timer,
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 61a846bb30f2..1370a89ca358 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -113,6 +113,12 @@ static struct clk main_clk = {
113 .ops = &main_clk_ops, 113 .ops = &main_clk_ops,
114}; 114};
115 115
116/* Divide Main clock by two */
117static struct clk main_div2_clk = {
118 .ops = &div2_clk_ops,
119 .parent = &main_clk,
120};
121
116/* PLL0, PLL1, PLL2, PLL3 */ 122/* PLL0, PLL1, PLL2, PLL3 */
117static unsigned long pll_recalc(struct clk *clk) 123static unsigned long pll_recalc(struct clk *clk)
118{ 124{
@@ -181,6 +187,7 @@ static struct clk *main_clks[] = {
181 &extal1_div2_clk, 187 &extal1_div2_clk,
182 &extal2_div2_clk, 188 &extal2_div2_clk,
183 &main_clk, 189 &main_clk,
190 &main_div2_clk,
184 &pll0_clk, 191 &pll0_clk,
185 &pll1_clk, 192 &pll1_clk,
186 &pll2_clk, 193 &pll2_clk,
@@ -243,7 +250,7 @@ static struct clk div6_clks[DIV6_NR] = {
243 [DIV6_VCK1] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR1, 0), 250 [DIV6_VCK1] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR1, 0),
244 [DIV6_VCK2] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR2, 0), 251 [DIV6_VCK2] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR2, 0),
245 [DIV6_VCK3] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR3, 0), 252 [DIV6_VCK3] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR3, 0),
246 [DIV6_ZB1] = SH_CLK_DIV6(&pll1_div2_clk, ZBCKCR, 0), 253 [DIV6_ZB1] = SH_CLK_DIV6(&pll1_div2_clk, ZBCKCR, CLK_ENABLE_ON_INIT),
247 [DIV6_FLCTL] = SH_CLK_DIV6(&pll1_div2_clk, FLCKCR, 0), 254 [DIV6_FLCTL] = SH_CLK_DIV6(&pll1_div2_clk, FLCKCR, 0),
248 [DIV6_SDHI0] = SH_CLK_DIV6(&pll1_div2_clk, SD0CKCR, 0), 255 [DIV6_SDHI0] = SH_CLK_DIV6(&pll1_div2_clk, SD0CKCR, 0),
249 [DIV6_SDHI1] = SH_CLK_DIV6(&pll1_div2_clk, SD1CKCR, 0), 256 [DIV6_SDHI1] = SH_CLK_DIV6(&pll1_div2_clk, SD1CKCR, 0),
@@ -268,6 +275,7 @@ enum { MSTP001,
268 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, 275 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
269 MSTP331, MSTP329, MSTP325, MSTP323, MSTP318, 276 MSTP331, MSTP329, MSTP325, MSTP323, MSTP318,
270 MSTP314, MSTP313, MSTP312, MSTP311, 277 MSTP314, MSTP313, MSTP312, MSTP311,
278 MSTP303, MSTP302, MSTP301, MSTP300,
271 MSTP411, MSTP410, MSTP403, 279 MSTP411, MSTP410, MSTP403,
272 MSTP_NR }; 280 MSTP_NR };
273 281
@@ -301,6 +309,10 @@ static struct clk mstp_clks[MSTP_NR] = {
301 [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */ 309 [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */
302 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */ 310 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
303 [MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */ 311 [MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */
312 [MSTP303] = MSTP(&main_div2_clk, SMSTPCR3, 3, 0), /* TPU1 */
313 [MSTP302] = MSTP(&main_div2_clk, SMSTPCR3, 2, 0), /* TPU2 */
314 [MSTP301] = MSTP(&main_div2_clk, SMSTPCR3, 1, 0), /* TPU3 */
315 [MSTP300] = MSTP(&main_div2_clk, SMSTPCR3, 0, 0), /* TPU4 */
304 [MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */ 316 [MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */
305 [MSTP410] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */ 317 [MSTP410] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */
306 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */ 318 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
@@ -350,6 +362,10 @@ static struct clk_lookup lookups[] = {
350 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ 362 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
351 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */ 363 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
352 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */ 364 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */
365 CLKDEV_DEV_ID("leds-renesas-tpu.12", &mstp_clks[MSTP303]), /* TPU1 */
366 CLKDEV_DEV_ID("leds-renesas-tpu.21", &mstp_clks[MSTP302]), /* TPU2 */
367 CLKDEV_DEV_ID("leds-renesas-tpu.30", &mstp_clks[MSTP301]), /* TPU3 */
368 CLKDEV_DEV_ID("leds-renesas-tpu.41", &mstp_clks[MSTP300]), /* TPU4 */
353 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */ 369 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */
354 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */ 370 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */
355 CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */ 371 CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
index b8f31c3935f7..14276e5a98d2 100644
--- a/arch/arm/mach-spear3xx/include/mach/generic.h
+++ b/arch/arm/mach-spear3xx/include/mach/generic.h
@@ -42,6 +42,8 @@ void __init spear3xx_map_io(void);
42void __init spear3xx_init_irq(void); 42void __init spear3xx_init_irq(void);
43void __init spear3xx_init(void); 43void __init spear3xx_init(void);
44 44
45void spear_restart(char, const char *);
46
45/* pad mux declarations */ 47/* pad mux declarations */
46#define PMX_FIRDA_MASK (1 << 14) 48#define PMX_FIRDA_MASK (1 << 14)
47#define PMX_I2C_MASK (1 << 13) 49#define PMX_I2C_MASK (1 << 13)
diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c
index 61068ba67923..3462ab9d6122 100644
--- a/arch/arm/mach-spear3xx/spear300_evb.c
+++ b/arch/arm/mach-spear3xx/spear300_evb.c
@@ -71,4 +71,5 @@ MACHINE_START(SPEAR300, "ST-SPEAR300-EVB")
71 .handle_irq = vic_handle_irq, 71 .handle_irq = vic_handle_irq,
72 .timer = &spear3xx_timer, 72 .timer = &spear3xx_timer,
73 .init_machine = spear300_evb_init, 73 .init_machine = spear300_evb_init,
74 .restart = spear_restart,
74MACHINE_END 75MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c
index 7903abe92bf6..f92c4993f65a 100644
--- a/arch/arm/mach-spear3xx/spear310_evb.c
+++ b/arch/arm/mach-spear3xx/spear310_evb.c
@@ -77,4 +77,5 @@ MACHINE_START(SPEAR310, "ST-SPEAR310-EVB")
77 .handle_irq = vic_handle_irq, 77 .handle_irq = vic_handle_irq,
78 .timer = &spear3xx_timer, 78 .timer = &spear3xx_timer,
79 .init_machine = spear310_evb_init, 79 .init_machine = spear310_evb_init,
80 .restart = spear_restart,
80MACHINE_END 81MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c
index e9751f970933..105334ab7021 100644
--- a/arch/arm/mach-spear3xx/spear320_evb.c
+++ b/arch/arm/mach-spear3xx/spear320_evb.c
@@ -75,4 +75,5 @@ MACHINE_START(SPEAR320, "ST-SPEAR320-EVB")
75 .handle_irq = vic_handle_irq, 75 .handle_irq = vic_handle_irq,
76 .timer = &spear3xx_timer, 76 .timer = &spear3xx_timer,
77 .init_machine = spear320_evb_init, 77 .init_machine = spear320_evb_init,
78 .restart = spear_restart,
78MACHINE_END 79MACHINE_END
diff --git a/arch/arm/mach-spear6xx/include/mach/generic.h b/arch/arm/mach-spear6xx/include/mach/generic.h
index 183f0238c5e2..116b99301cf5 100644
--- a/arch/arm/mach-spear6xx/include/mach/generic.h
+++ b/arch/arm/mach-spear6xx/include/mach/generic.h
@@ -41,6 +41,8 @@ void __init spear6xx_init(void);
41void __init spear600_init(void); 41void __init spear600_init(void);
42void __init spear6xx_clk_init(void); 42void __init spear6xx_clk_init(void);
43 43
44void spear_restart(char, const char *);
45
44/* Add spear600 machine device structure declarations here */ 46/* Add spear600 machine device structure declarations here */
45 47
46#endif /* __MACH_GENERIC_H */ 48#endif /* __MACH_GENERIC_H */
diff --git a/arch/arm/mach-spear6xx/spear600_evb.c b/arch/arm/mach-spear6xx/spear600_evb.c
index ff139ed0a61e..c6e4254741cc 100644
--- a/arch/arm/mach-spear6xx/spear600_evb.c
+++ b/arch/arm/mach-spear6xx/spear600_evb.c
@@ -50,4 +50,5 @@ MACHINE_START(SPEAR600, "ST-SPEAR600-EVB")
50 .handle_irq = vic_handle_irq, 50 .handle_irq = vic_handle_irq,
51 .timer = &spear6xx_timer, 51 .timer = &spear6xx_timer,
52 .init_machine = spear600_evb_init, 52 .init_machine = spear600_evb_init,
53 .restart = spear_restart,
53MACHINE_END 54MACHINE_END
diff --git a/arch/arm/mach-tcc8k/Kconfig b/arch/arm/mach-tcc8k/Kconfig
deleted file mode 100644
index ad86415d1577..000000000000
--- a/arch/arm/mach-tcc8k/Kconfig
+++ /dev/null
@@ -1,11 +0,0 @@
1if ARCH_TCC8K
2
3comment "TCC8000 systems:"
4
5config MACH_TCC8000_SDK
6 bool "Telechips TCC8000-SDK development kit"
7 default y
8 help
9 Support for the Telechips TCC8000-SDK board.
10
11endif
diff --git a/arch/arm/mach-tcc8k/Makefile b/arch/arm/mach-tcc8k/Makefile
deleted file mode 100644
index 9bacf31e49ba..000000000000
--- a/arch/arm/mach-tcc8k/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
1#
2# Makefile for TCC8K boards and common files.
3#
4
5# Common support
6obj-y += clock.o irq.o time.o io.o devices.o
7
8# Board specific support
9obj-$(CONFIG_MACH_TCC8000_SDK) += board-tcc8000-sdk.o
diff --git a/arch/arm/mach-tcc8k/Makefile.boot b/arch/arm/mach-tcc8k/Makefile.boot
deleted file mode 100644
index 5e02d4156b04..000000000000
--- a/arch/arm/mach-tcc8k/Makefile.boot
+++ /dev/null
@@ -1,3 +0,0 @@
1 zreladdr-y += 0x20008000
2params_phys-y := 0x20000100
3initrd_phys-y := 0x20800000
diff --git a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c b/arch/arm/mach-tcc8k/board-tcc8000-sdk.c
deleted file mode 100644
index 777a5bb9eed2..000000000000
--- a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c
+++ /dev/null
@@ -1,81 +0,0 @@
1/*
2 * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/delay.h>
10#include <linux/init.h>
11#include <linux/kernel.h>
12#include <linux/platform_device.h>
13
14#include <asm/mach-types.h>
15
16#include <asm/mach/arch.h>
17#include <asm/mach/map.h>
18#include <asm/mach/time.h>
19
20#include <mach/clock.h>
21#include <mach/tcc-nand.h>
22#include <mach/tcc8k-regs.h>
23
24#include "common.h"
25
26#define XI_FREQUENCY 12000000
27#define XTI_FREQUENCY 32768
28
29#ifdef CONFIG_MTD_NAND_TCC
30/* NAND */
31static struct tcc_nand_platform_data tcc8k_sdk_nand_data = {
32 .width = 1,
33 .hw_ecc = 0,
34};
35#endif
36
37static void __init tcc8k_init(void)
38{
39#ifdef CONFIG_MTD_NAND_TCC
40 tcc_nand_device.dev.platform_data = &tcc8k_sdk_nand_data;
41 platform_device_register(&tcc_nand_device);
42#endif
43}
44
45static void __init tcc8k_init_timer(void)
46{
47 tcc_clocks_init(XI_FREQUENCY, XTI_FREQUENCY);
48}
49
50static struct sys_timer tcc8k_timer = {
51 .init = tcc8k_init_timer,
52};
53
54static void __init tcc8k_map_io(void)
55{
56 tcc8k_map_common_io();
57
58 /* set PLL0 clock to 96MHz, adapt UART0 divisor */
59 __raw_writel(0x00026003, CKC_BASE + PLL0CFG_OFFS);
60 __raw_writel(0x10000001, CKC_BASE + ACLKUART0_OFFS);
61
62 /* set PLL1 clock to 192MHz */
63 __raw_writel(0x00016003, CKC_BASE + PLL1CFG_OFFS);
64
65 /* set PLL2 clock to 48MHz */
66 __raw_writel(0x00036003, CKC_BASE + PLL2CFG_OFFS);
67
68 /* with CPU freq higher than 150 MHz, need extra DTCM wait */
69 __raw_writel(0x00000001, SCFG_BASE + DTCMWAIT_OFFS);
70
71 /* PLL locking time as specified */
72 udelay(300);
73}
74
75MACHINE_START(TCC8000_SDK, "Telechips TCC8000-SDK Demo Board")
76 .atag_offset = 0x100,
77 .map_io = tcc8k_map_io,
78 .init_irq = tcc8k_init_irq,
79 .init_machine = tcc8k_init,
80 .timer = &tcc8k_timer,
81MACHINE_END
diff --git a/arch/arm/mach-tcc8k/clock.c b/arch/arm/mach-tcc8k/clock.c
deleted file mode 100644
index e7cdae5c77a4..000000000000
--- a/arch/arm/mach-tcc8k/clock.c
+++ /dev/null
@@ -1,580 +0,0 @@
1/*
2 * Lowlevel clock handling for Telechips TCC8xxx SoCs
3 *
4 * Copyright (C) 2010 by Hans J. Koch <hjk@linutronix.de>
5 *
6 * Licensed under the terms of the GPL v2
7 */
8
9#include <linux/clk.h>
10#include <linux/delay.h>
11#include <linux/err.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/spinlock.h>
15#include <linux/clkdev.h>
16
17#include <mach/clock.h>
18#include <mach/irqs.h>
19#include <mach/tcc8k-regs.h>
20
21#include "common.h"
22
23#define BCLKCTR0 (CKC_BASE + BCLKCTR0_OFFS)
24#define BCLKCTR1 (CKC_BASE + BCLKCTR1_OFFS)
25
26#define ACLKREF (CKC_BASE + ACLKREF_OFFS)
27#define ACLKUART0 (CKC_BASE + ACLKUART0_OFFS)
28#define ACLKUART1 (CKC_BASE + ACLKUART1_OFFS)
29#define ACLKUART2 (CKC_BASE + ACLKUART2_OFFS)
30#define ACLKUART3 (CKC_BASE + ACLKUART3_OFFS)
31#define ACLKUART4 (CKC_BASE + ACLKUART4_OFFS)
32#define ACLKI2C (CKC_BASE + ACLKI2C_OFFS)
33#define ACLKADC (CKC_BASE + ACLKADC_OFFS)
34#define ACLKUSBH (CKC_BASE + ACLKUSBH_OFFS)
35#define ACLKLCD (CKC_BASE + ACLKLCD_OFFS)
36#define ACLKSDH0 (CKC_BASE + ACLKSDH0_OFFS)
37#define ACLKSDH1 (CKC_BASE + ACLKSDH1_OFFS)
38#define ACLKSPI0 (CKC_BASE + ACLKSPI0_OFFS)
39#define ACLKSPI1 (CKC_BASE + ACLKSPI1_OFFS)
40#define ACLKSPDIF (CKC_BASE + ACLKSPDIF_OFFS)
41#define ACLKC3DEC (CKC_BASE + ACLKC3DEC_OFFS)
42#define ACLKCAN0 (CKC_BASE + ACLKCAN0_OFFS)
43#define ACLKCAN1 (CKC_BASE + ACLKCAN1_OFFS)
44#define ACLKGSB0 (CKC_BASE + ACLKGSB0_OFFS)
45#define ACLKGSB1 (CKC_BASE + ACLKGSB1_OFFS)
46#define ACLKGSB2 (CKC_BASE + ACLKGSB2_OFFS)
47#define ACLKGSB3 (CKC_BASE + ACLKGSB3_OFFS)
48#define ACLKTCT (CKC_BASE + ACLKTCT_OFFS)
49#define ACLKTCX (CKC_BASE + ACLKTCX_OFFS)
50#define ACLKTCZ (CKC_BASE + ACLKTCZ_OFFS)
51
52#define ACLK_MAX_DIV (0xfff + 1)
53
54/* Crystal frequencies */
55static unsigned long xi_rate, xti_rate;
56
57static void __iomem *pll_cfg_addr(int pll)
58{
59 switch (pll) {
60 case 0: return (CKC_BASE + PLL0CFG_OFFS);
61 case 1: return (CKC_BASE + PLL1CFG_OFFS);
62 case 2: return (CKC_BASE + PLL2CFG_OFFS);
63 default:
64 BUG();
65 }
66}
67
68static int pll_enable(int pll, int enable)
69{
70 u32 reg;
71 void __iomem *addr = pll_cfg_addr(pll);
72
73 reg = __raw_readl(addr);
74 if (enable)
75 reg &= ~PLLxCFG_PD;
76 else
77 reg |= PLLxCFG_PD;
78
79 __raw_writel(reg, addr);
80 return 0;
81}
82
83static int xi_enable(int enable)
84{
85 u32 reg;
86
87 reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS);
88 if (enable)
89 reg |= CLKCTRL_XE;
90 else
91 reg &= ~CLKCTRL_XE;
92
93 __raw_writel(reg, CKC_BASE + CLKCTRL_OFFS);
94 return 0;
95}
96
97static int root_clk_enable(enum root_clks src)
98{
99 switch (src) {
100 case CLK_SRC_PLL0: return pll_enable(0, 1);
101 case CLK_SRC_PLL1: return pll_enable(1, 1);
102 case CLK_SRC_PLL2: return pll_enable(2, 1);
103 case CLK_SRC_XI: return xi_enable(1);
104 default:
105 BUG();
106 }
107 return 0;
108}
109
110static int root_clk_disable(enum root_clks src)
111{
112 switch (src) {
113 case CLK_SRC_PLL0: return pll_enable(0, 0);
114 case CLK_SRC_PLL1: return pll_enable(1, 0);
115 case CLK_SRC_PLL2: return pll_enable(2, 0);
116 case CLK_SRC_XI: return xi_enable(0);
117 default:
118 BUG();
119 }
120 return 0;
121}
122
123static int enable_clk(struct clk *clk)
124{
125 u32 reg;
126
127 if (clk->root_id != CLK_SRC_NOROOT)
128 return root_clk_enable(clk->root_id);
129
130 if (clk->aclkreg) {
131 reg = __raw_readl(clk->aclkreg);
132 reg |= ACLK_EN;
133 __raw_writel(reg, clk->aclkreg);
134 }
135 if (clk->bclkctr) {
136 reg = __raw_readl(clk->bclkctr);
137 reg |= 1 << clk->bclk_shift;
138 __raw_writel(reg, clk->bclkctr);
139 }
140 return 0;
141}
142
143static void disable_clk(struct clk *clk)
144{
145 u32 reg;
146
147 if (clk->root_id != CLK_SRC_NOROOT) {
148 root_clk_disable(clk->root_id);
149 return;
150 }
151
152 if (clk->bclkctr) {
153 reg = __raw_readl(clk->bclkctr);
154 reg &= ~(1 << clk->bclk_shift);
155 __raw_writel(reg, clk->bclkctr);
156 }
157 if (clk->aclkreg) {
158 reg = __raw_readl(clk->aclkreg);
159 reg &= ~ACLK_EN;
160 __raw_writel(reg, clk->aclkreg);
161 }
162}
163
164static unsigned long get_rate_pll(int pll)
165{
166 u32 reg;
167 unsigned long s, m, p;
168 void __iomem *addr = pll_cfg_addr(pll);
169
170 reg = __raw_readl(addr);
171 s = (reg >> 16) & 0x07;
172 m = (reg >> 8) & 0xff;
173 p = reg & 0x3f;
174
175 return (m * xi_rate) / (p * (1 << s));
176}
177
178static unsigned long get_rate_pll_div(int pll)
179{
180 u32 reg;
181 unsigned long div = 0;
182 void __iomem *addr;
183
184 switch (pll) {
185 case 0:
186 addr = CKC_BASE + CLKDIVC0_OFFS;
187 reg = __raw_readl(addr);
188 if (reg & CLKDIVC0_P0E)
189 div = (reg >> 24) & 0x3f;
190 break;
191 case 1:
192 addr = CKC_BASE + CLKDIVC0_OFFS;
193 reg = __raw_readl(addr);
194 if (reg & CLKDIVC0_P1E)
195 div = (reg >> 16) & 0x3f;
196 break;
197 case 2:
198 addr = CKC_BASE + CLKDIVC1_OFFS;
199 reg = __raw_readl(addr);
200 if (reg & CLKDIVC1_P2E)
201 div = reg & 0x3f;
202 break;
203 }
204 return get_rate_pll(pll) / (div + 1);
205}
206
207static unsigned long get_rate_xi_div(void)
208{
209 unsigned long div = 0;
210 u32 reg = __raw_readl(CKC_BASE + CLKDIVC0_OFFS);
211
212 if (reg & CLKDIVC0_XE)
213 div = (reg >> 8) & 0x3f;
214
215 return xi_rate / (div + 1);
216}
217
218static unsigned long get_rate_xti_div(void)
219{
220 unsigned long div = 0;
221 u32 reg = __raw_readl(CKC_BASE + CLKDIVC0_OFFS);
222
223 if (reg & CLKDIVC0_XTE)
224 div = reg & 0x3f;
225
226 return xti_rate / (div + 1);
227}
228
229static unsigned long root_clk_get_rate(enum root_clks src)
230{
231 switch (src) {
232 case CLK_SRC_PLL0: return get_rate_pll(0);
233 case CLK_SRC_PLL1: return get_rate_pll(1);
234 case CLK_SRC_PLL2: return get_rate_pll(2);
235 case CLK_SRC_PLL0DIV: return get_rate_pll_div(0);
236 case CLK_SRC_PLL1DIV: return get_rate_pll_div(1);
237 case CLK_SRC_PLL2DIV: return get_rate_pll_div(2);
238 case CLK_SRC_XI: return xi_rate;
239 case CLK_SRC_XTI: return xti_rate;
240 case CLK_SRC_XIDIV: return get_rate_xi_div();
241 case CLK_SRC_XTIDIV: return get_rate_xti_div();
242 default: return 0;
243 }
244}
245
246static unsigned long aclk_get_rate(struct clk *clk)
247{
248 u32 reg;
249 unsigned long div;
250 unsigned int src;
251
252 reg = __raw_readl(clk->aclkreg);
253 div = reg & 0x0fff;
254 src = (reg >> ACLK_SEL_SHIFT) & CLK_SRC_MASK;
255 return root_clk_get_rate(src) / (div + 1);
256}
257
258static unsigned long aclk_best_div(struct clk *clk, unsigned long rate)
259{
260 unsigned long div, src, freq, r1, r2;
261
262 if (!rate)
263 return ACLK_MAX_DIV;
264
265 src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT;
266 src &= CLK_SRC_MASK;
267 freq = root_clk_get_rate(src);
268 div = freq / rate;
269 if (!div)
270 return 1;
271 if (div >= ACLK_MAX_DIV)
272 return ACLK_MAX_DIV;
273 r1 = freq / div;
274 r2 = freq / (div + 1);
275 if ((rate - r2) < (r1 - rate))
276 return div + 1;
277
278 return div;
279}
280
281static unsigned long aclk_round_rate(struct clk *clk, unsigned long rate)
282{
283 unsigned int src;
284
285 src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT;
286 src &= CLK_SRC_MASK;
287
288 return root_clk_get_rate(src) / aclk_best_div(clk, rate);
289}
290
291static int aclk_set_rate(struct clk *clk, unsigned long rate)
292{
293 u32 reg;
294
295 reg = __raw_readl(clk->aclkreg) & ~ACLK_DIV_MASK;
296 reg |= aclk_best_div(clk, rate) - 1;
297 __raw_writel(reg, clk->aclkreg);
298 return 0;
299}
300
301static unsigned long get_rate_sys(struct clk *clk)
302{
303 unsigned int src;
304
305 src = __raw_readl(CKC_BASE + CLKCTRL_OFFS) & CLK_SRC_MASK;
306 return root_clk_get_rate(src);
307}
308
309static unsigned long get_rate_bus(struct clk *clk)
310{
311 unsigned int reg, sdiv, bdiv, rate;
312
313 reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS);
314 rate = get_rate_sys(clk);
315 sdiv = (reg >> 20) & 3;
316 if (sdiv)
317 rate /= sdiv + 1;
318 bdiv = (reg >> 4) & 0xff;
319 if (bdiv)
320 rate /= bdiv + 1;
321 return rate;
322}
323
324static unsigned long get_rate_cpu(struct clk *clk)
325{
326 unsigned int reg, div, fsys, fbus;
327
328 fbus = get_rate_bus(clk);
329 reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS);
330 if (reg & (1 << 29))
331 return fbus;
332 fsys = get_rate_sys(clk);
333 div = (reg >> 16) & 0x0f;
334 return fbus + ((fsys - fbus) * (div + 1)) / 16;
335}
336
337static unsigned long get_rate_root(struct clk *clk)
338{
339 return root_clk_get_rate(clk->root_id);
340}
341
342static int aclk_set_parent(struct clk *clock, struct clk *parent)
343{
344 u32 reg;
345
346 if (clock->parent == parent)
347 return 0;
348
349 clock->parent = parent;
350
351 if (!parent)
352 return 0;
353
354 if (parent->root_id == CLK_SRC_NOROOT)
355 return 0;
356 reg = __raw_readl(clock->aclkreg);
357 reg &= ~ACLK_SEL_MASK;
358 reg |= (parent->root_id << ACLK_SEL_SHIFT) & ACLK_SEL_MASK;
359 __raw_writel(reg, clock->aclkreg);
360
361 return 0;
362}
363
364#define DEFINE_ROOT_CLOCK(name, ri, p) \
365 static struct clk name = { \
366 .root_id = ri, \
367 .get_rate = get_rate_root, \
368 .enable = enable_clk, \
369 .disable = disable_clk, \
370 .parent = p, \
371 };
372
373#define DEFINE_SPECIAL_CLOCK(name, gr, p) \
374 static struct clk name = { \
375 .root_id = CLK_SRC_NOROOT, \
376 .get_rate = gr, \
377 .parent = p, \
378 };
379
380#define DEFINE_ACLOCK(name, bc, bs, ar) \
381 static struct clk name = { \
382 .root_id = CLK_SRC_NOROOT, \
383 .bclkctr = bc, \
384 .bclk_shift = bs, \
385 .aclkreg = ar, \
386 .get_rate = aclk_get_rate, \
387 .set_rate = aclk_set_rate, \
388 .round_rate = aclk_round_rate, \
389 .enable = enable_clk, \
390 .disable = disable_clk, \
391 .set_parent = aclk_set_parent, \
392 };
393
394#define DEFINE_BCLOCK(name, bc, bs, gr, p) \
395 static struct clk name = { \
396 .root_id = CLK_SRC_NOROOT, \
397 .bclkctr = bc, \
398 .bclk_shift = bs, \
399 .get_rate = gr, \
400 .enable = enable_clk, \
401 .disable = disable_clk, \
402 .parent = p, \
403 };
404
405DEFINE_ROOT_CLOCK(xi, CLK_SRC_XI, NULL)
406DEFINE_ROOT_CLOCK(xti, CLK_SRC_XTI, NULL)
407DEFINE_ROOT_CLOCK(xidiv, CLK_SRC_XIDIV, &xi)
408DEFINE_ROOT_CLOCK(xtidiv, CLK_SRC_XTIDIV, &xti)
409DEFINE_ROOT_CLOCK(pll0, CLK_SRC_PLL0, &xi)
410DEFINE_ROOT_CLOCK(pll1, CLK_SRC_PLL1, &xi)
411DEFINE_ROOT_CLOCK(pll2, CLK_SRC_PLL2, &xi)
412DEFINE_ROOT_CLOCK(pll0div, CLK_SRC_PLL0DIV, &pll0)
413DEFINE_ROOT_CLOCK(pll1div, CLK_SRC_PLL1DIV, &pll1)
414DEFINE_ROOT_CLOCK(pll2div, CLK_SRC_PLL2DIV, &pll2)
415
416/* The following 3 clocks are special and are initialized explicitly later */
417DEFINE_SPECIAL_CLOCK(sys, get_rate_sys, NULL)
418DEFINE_SPECIAL_CLOCK(bus, get_rate_bus, &sys)
419DEFINE_SPECIAL_CLOCK(cpu, get_rate_cpu, &sys)
420
421DEFINE_ACLOCK(tct, NULL, 0, ACLKTCT)
422DEFINE_ACLOCK(tcx, NULL, 0, ACLKTCX)
423DEFINE_ACLOCK(tcz, NULL, 0, ACLKTCZ)
424DEFINE_ACLOCK(ref, NULL, 0, ACLKREF)
425DEFINE_ACLOCK(uart0, BCLKCTR0, 5, ACLKUART0)
426DEFINE_ACLOCK(uart1, BCLKCTR0, 23, ACLKUART1)
427DEFINE_ACLOCK(uart2, BCLKCTR0, 6, ACLKUART2)
428DEFINE_ACLOCK(uart3, BCLKCTR0, 8, ACLKUART3)
429DEFINE_ACLOCK(uart4, BCLKCTR1, 6, ACLKUART4)
430DEFINE_ACLOCK(i2c, BCLKCTR0, 7, ACLKI2C)
431DEFINE_ACLOCK(adc, BCLKCTR0, 10, ACLKADC)
432DEFINE_ACLOCK(usbh0, BCLKCTR0, 11, ACLKUSBH)
433DEFINE_ACLOCK(lcd, BCLKCTR0, 13, ACLKLCD)
434DEFINE_ACLOCK(sd0, BCLKCTR0, 17, ACLKSDH0)
435DEFINE_ACLOCK(sd1, BCLKCTR1, 5, ACLKSDH1)
436DEFINE_ACLOCK(spi0, BCLKCTR0, 24, ACLKSPI0)
437DEFINE_ACLOCK(spi1, BCLKCTR0, 30, ACLKSPI1)
438DEFINE_ACLOCK(spdif, BCLKCTR1, 2, ACLKSPDIF)
439DEFINE_ACLOCK(c3dec, BCLKCTR1, 9, ACLKC3DEC)
440DEFINE_ACLOCK(can0, BCLKCTR1, 10, ACLKCAN0)
441DEFINE_ACLOCK(can1, BCLKCTR1, 11, ACLKCAN1)
442DEFINE_ACLOCK(gsb0, BCLKCTR1, 13, ACLKGSB0)
443DEFINE_ACLOCK(gsb1, BCLKCTR1, 14, ACLKGSB1)
444DEFINE_ACLOCK(gsb2, BCLKCTR1, 15, ACLKGSB2)
445DEFINE_ACLOCK(gsb3, BCLKCTR1, 16, ACLKGSB3)
446DEFINE_ACLOCK(usbh1, BCLKCTR1, 20, ACLKUSBH)
447
448DEFINE_BCLOCK(dai0, BCLKCTR0, 0, NULL, NULL)
449DEFINE_BCLOCK(pic, BCLKCTR0, 1, NULL, NULL)
450DEFINE_BCLOCK(tc, BCLKCTR0, 2, NULL, NULL)
451DEFINE_BCLOCK(gpio, BCLKCTR0, 3, NULL, NULL)
452DEFINE_BCLOCK(usbd, BCLKCTR0, 4, NULL, NULL)
453DEFINE_BCLOCK(ecc, BCLKCTR0, 9, NULL, NULL)
454DEFINE_BCLOCK(gdma0, BCLKCTR0, 12, NULL, NULL)
455DEFINE_BCLOCK(rtc, BCLKCTR0, 15, NULL, NULL)
456DEFINE_BCLOCK(nfc, BCLKCTR0, 16, NULL, NULL)
457DEFINE_BCLOCK(g2d, BCLKCTR0, 18, NULL, NULL)
458DEFINE_BCLOCK(gdma1, BCLKCTR0, 22, NULL, NULL)
459DEFINE_BCLOCK(mscl, BCLKCTR0, 25, NULL, NULL)
460DEFINE_BCLOCK(bdma, BCLKCTR1, 0, NULL, NULL)
461DEFINE_BCLOCK(adma0, BCLKCTR1, 1, NULL, NULL)
462DEFINE_BCLOCK(scfg, BCLKCTR1, 3, NULL, NULL)
463DEFINE_BCLOCK(cid, BCLKCTR1, 4, NULL, NULL)
464DEFINE_BCLOCK(dai1, BCLKCTR1, 7, NULL, NULL)
465DEFINE_BCLOCK(adma1, BCLKCTR1, 8, NULL, NULL)
466DEFINE_BCLOCK(gps, BCLKCTR1, 12, NULL, NULL)
467DEFINE_BCLOCK(gdma2, BCLKCTR1, 17, NULL, NULL)
468DEFINE_BCLOCK(gdma3, BCLKCTR1, 18, NULL, NULL)
469DEFINE_BCLOCK(ddrc, BCLKCTR1, 19, NULL, NULL)
470
471#define _REGISTER_CLOCK(d, n, c) \
472 { \
473 .dev_id = d, \
474 .con_id = n, \
475 .clk = &c, \
476 },
477
478static struct clk_lookup lookups[] = {
479 _REGISTER_CLOCK(NULL, "bus", bus)
480 _REGISTER_CLOCK(NULL, "cpu", cpu)
481 _REGISTER_CLOCK(NULL, "tct", tct)
482 _REGISTER_CLOCK(NULL, "tcx", tcx)
483 _REGISTER_CLOCK(NULL, "tcz", tcz)
484 _REGISTER_CLOCK(NULL, "ref", ref)
485 _REGISTER_CLOCK(NULL, "dai0", dai0)
486 _REGISTER_CLOCK(NULL, "pic", pic)
487 _REGISTER_CLOCK(NULL, "tc", tc)
488 _REGISTER_CLOCK(NULL, "gpio", gpio)
489 _REGISTER_CLOCK(NULL, "usbd", usbd)
490 _REGISTER_CLOCK("tcc-uart.0", NULL, uart0)
491 _REGISTER_CLOCK("tcc-uart.2", NULL, uart2)
492 _REGISTER_CLOCK("tcc-i2c", NULL, i2c)
493 _REGISTER_CLOCK("tcc-uart.3", NULL, uart3)
494 _REGISTER_CLOCK(NULL, "ecc", ecc)
495 _REGISTER_CLOCK(NULL, "adc", adc)
496 _REGISTER_CLOCK("tcc-usbh.0", "usb", usbh0)
497 _REGISTER_CLOCK(NULL, "gdma0", gdma0)
498 _REGISTER_CLOCK(NULL, "lcd", lcd)
499 _REGISTER_CLOCK(NULL, "rtc", rtc)
500 _REGISTER_CLOCK(NULL, "nfc", nfc)
501 _REGISTER_CLOCK("tcc-mmc.0", NULL, sd0)
502 _REGISTER_CLOCK(NULL, "g2d", g2d)
503 _REGISTER_CLOCK(NULL, "gdma1", gdma1)
504 _REGISTER_CLOCK("tcc-uart.1", NULL, uart1)
505 _REGISTER_CLOCK("tcc-spi.0", NULL, spi0)
506 _REGISTER_CLOCK(NULL, "mscl", mscl)
507 _REGISTER_CLOCK("tcc-spi.1", NULL, spi1)
508 _REGISTER_CLOCK(NULL, "bdma", bdma)
509 _REGISTER_CLOCK(NULL, "adma0", adma0)
510 _REGISTER_CLOCK(NULL, "spdif", spdif)
511 _REGISTER_CLOCK(NULL, "scfg", scfg)
512 _REGISTER_CLOCK(NULL, "cid", cid)
513 _REGISTER_CLOCK("tcc-mmc.1", NULL, sd1)
514 _REGISTER_CLOCK("tcc-uart.4", NULL, uart4)
515 _REGISTER_CLOCK(NULL, "dai1", dai1)
516 _REGISTER_CLOCK(NULL, "adma1", adma1)
517 _REGISTER_CLOCK(NULL, "c3dec", c3dec)
518 _REGISTER_CLOCK("tcc-can.0", NULL, can0)
519 _REGISTER_CLOCK("tcc-can.1", NULL, can1)
520 _REGISTER_CLOCK(NULL, "gps", gps)
521 _REGISTER_CLOCK("tcc-gsb.0", NULL, gsb0)
522 _REGISTER_CLOCK("tcc-gsb.1", NULL, gsb1)
523 _REGISTER_CLOCK("tcc-gsb.2", NULL, gsb2)
524 _REGISTER_CLOCK("tcc-gsb.3", NULL, gsb3)
525 _REGISTER_CLOCK(NULL, "gdma2", gdma2)
526 _REGISTER_CLOCK(NULL, "gdma3", gdma3)
527 _REGISTER_CLOCK(NULL, "ddrc", ddrc)
528 _REGISTER_CLOCK("tcc-usbh.1", "usb", usbh1)
529};
530
531static struct clk *root_clk_by_index(enum root_clks src)
532{
533 switch (src) {
534 case CLK_SRC_PLL0: return &pll0;
535 case CLK_SRC_PLL1: return &pll1;
536 case CLK_SRC_PLL2: return &pll2;
537 case CLK_SRC_PLL0DIV: return &pll0div;
538 case CLK_SRC_PLL1DIV: return &pll1div;
539 case CLK_SRC_PLL2DIV: return &pll2div;
540 case CLK_SRC_XI: return &xi;
541 case CLK_SRC_XTI: return &xti;
542 case CLK_SRC_XIDIV: return &xidiv;
543 case CLK_SRC_XTIDIV: return &xtidiv;
544 default: return NULL;
545 }
546}
547
548static void find_aclk_parent(struct clk *clk)
549{
550 unsigned int src;
551 struct clk *clock;
552
553 if (!clk->aclkreg)
554 return;
555
556 src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT;
557 src &= CLK_SRC_MASK;
558
559 clock = root_clk_by_index(src);
560 if (!clock)
561 return;
562
563 clk->parent = clock;
564 clk->set_parent = aclk_set_parent;
565}
566
567void __init tcc_clocks_init(unsigned long xi_freq, unsigned long xti_freq)
568{
569 int i;
570
571 xi_rate = xi_freq;
572 xti_rate = xti_freq;
573
574 /* fixup parents and add the clock */
575 for (i = 0; i < ARRAY_SIZE(lookups); i++) {
576 find_aclk_parent(lookups[i].clk);
577 clkdev_add(&lookups[i]);
578 }
579 tcc8k_timer_init(&tcz, (void __iomem *)TIMER_BASE, INT_TC32);
580}
diff --git a/arch/arm/mach-tcc8k/common.h b/arch/arm/mach-tcc8k/common.h
deleted file mode 100644
index 705690add395..000000000000
--- a/arch/arm/mach-tcc8k/common.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef MACH_TCC8K_COMMON_H
2#define MACH_TCC8K_COMMON_H
3
4#include <linux/platform_device.h>
5
6extern struct platform_device tcc_nand_device;
7
8struct clk;
9
10extern void tcc_clocks_init(unsigned long xi_freq, unsigned long xti_freq);
11extern void tcc8k_timer_init(struct clk *clock, void __iomem *base, int irq);
12extern void tcc8k_init_irq(void);
13extern void tcc8k_map_common_io(void);
14
15#endif
diff --git a/arch/arm/mach-tcc8k/devices.c b/arch/arm/mach-tcc8k/devices.c
deleted file mode 100644
index 6722ad7c2836..000000000000
--- a/arch/arm/mach-tcc8k/devices.c
+++ /dev/null
@@ -1,239 +0,0 @@
1/*
2 * linux/arch/arm/mach-tcc8k/devices.c
3 *
4 * Copyright (C) Telechips, Inc.
5 * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
6 *
7 * Licensed under the terms of GPL v2.
8 *
9 */
10
11#include <linux/dma-mapping.h>
12#include <linux/init.h>
13#include <linux/io.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16
17#include <asm/mach/map.h>
18
19#include <mach/tcc8k-regs.h>
20#include <mach/irqs.h>
21
22#include "common.h"
23
24static u64 tcc8k_dmamask = DMA_BIT_MASK(32);
25
26#ifdef CONFIG_MTD_NAND_TCC
27/* NAND controller */
28static struct resource tcc_nand_resources[] = {
29 {
30 .start = (resource_size_t)NFC_BASE,
31 .end = (resource_size_t)NFC_BASE + 0x7f,
32 .flags = IORESOURCE_MEM,
33 }, {
34 .start = INT_NFC,
35 .end = INT_NFC,
36 .flags = IORESOURCE_IRQ,
37 },
38};
39
40struct platform_device tcc_nand_device = {
41 .name = "tcc_nand",
42 .id = 0,
43 .num_resources = ARRAY_SIZE(tcc_nand_resources),
44 .resource = tcc_nand_resources,
45};
46#endif
47
48#ifdef CONFIG_MMC_TCC8K
49/* MMC controller */
50static struct resource tcc8k_mmc0_resource[] = {
51 {
52 .start = INT_SD0,
53 .end = INT_SD0,
54 .flags = IORESOURCE_IRQ,
55 },
56};
57
58static struct resource tcc8k_mmc1_resource[] = {
59 {
60 .start = INT_SD1,
61 .end = INT_SD1,
62 .flags = IORESOURCE_IRQ,
63 },
64};
65
66struct platform_device tcc8k_mmc0_device = {
67 .name = "tcc-mmc",
68 .id = 0,
69 .num_resources = ARRAY_SIZE(tcc8k_mmc0_resource),
70 .resource = tcc8k_mmc0_resource,
71 .dev = {
72 .dma_mask = &tcc8k_dmamask,
73 .coherent_dma_mask = DMA_BIT_MASK(32),
74 }
75};
76
77struct platform_device tcc8k_mmc1_device = {
78 .name = "tcc-mmc",
79 .id = 1,
80 .num_resources = ARRAY_SIZE(tcc8k_mmc1_resource),
81 .resource = tcc8k_mmc1_resource,
82 .dev = {
83 .dma_mask = &tcc8k_dmamask,
84 .coherent_dma_mask = DMA_BIT_MASK(32),
85 }
86};
87
88static inline void tcc8k_init_mmc(void)
89{
90 u32 reg = __raw_readl(GPIOPS_BASE + GPIOPS_FS1_OFFS);
91
92 reg |= GPIOPS_FS1_SDH0_BITS | GPIOPS_FS1_SDH1_BITS;
93 __raw_writel(reg, GPIOPS_BASE + GPIOPS_FS1_OFFS);
94
95 platform_device_register(&tcc8k_mmc0_device);
96 platform_device_register(&tcc8k_mmc1_device);
97}
98#else
99static inline void tcc8k_init_mmc(void) { }
100#endif
101
102#ifdef CONFIG_USB_OHCI_HCD
103static int tcc8k_ohci_init(struct device *dev)
104{
105 u32 reg;
106
107 /* Use GPIO PK19 as VBUS control output */
108 reg = __raw_readl(GPIOPK_BASE + GPIOPK_FS0_OFFS);
109 reg &= ~(1 << 19);
110 __raw_writel(reg, GPIOPK_BASE + GPIOPK_FS0_OFFS);
111 reg = __raw_readl(GPIOPK_BASE + GPIOPK_FS1_OFFS);
112 reg &= ~(1 << 19);
113 __raw_writel(reg, GPIOPK_BASE + GPIOPK_FS1_OFFS);
114
115 reg = __raw_readl(GPIOPK_BASE + GPIOPK_DOE_OFFS);
116 reg |= (1 << 19);
117 __raw_writel(reg, GPIOPK_BASE + GPIOPK_DOE_OFFS);
118 /* Turn on VBUS */
119 reg = __raw_readl(GPIOPK_BASE + GPIOPK_DAT_OFFS);
120 reg |= (1 << 19);
121 __raw_writel(reg, GPIOPK_BASE + GPIOPK_DAT_OFFS);
122
123 return 0;
124}
125
126static struct resource tcc8k_ohci0_resources[] = {
127 [0] = {
128 .start = (resource_size_t)USBH0_BASE,
129 .end = (resource_size_t)USBH0_BASE + 0x5c,
130 .flags = IORESOURCE_MEM,
131 },
132 [1] = {
133 .start = INT_USBH0,
134 .end = INT_USBH0,
135 .flags = IORESOURCE_IRQ,
136 }
137};
138
139static struct resource tcc8k_ohci1_resources[] = {
140 [0] = {
141 .start = (resource_size_t)USBH1_BASE,
142 .end = (resource_size_t)USBH1_BASE + 0x5c,
143 .flags = IORESOURCE_MEM,
144 },
145 [1] = {
146 .start = INT_USBH1,
147 .end = INT_USBH1,
148 .flags = IORESOURCE_IRQ,
149 }
150};
151
152static struct tccohci_platform_data tcc8k_ohci0_platform_data = {
153 .controller = 0,
154 .port_mode = PMM_PERPORT_MODE,
155 .init = tcc8k_ohci_init,
156};
157
158static struct tccohci_platform_data tcc8k_ohci1_platform_data = {
159 .controller = 1,
160 .port_mode = PMM_PERPORT_MODE,
161 .init = tcc8k_ohci_init,
162};
163
164static struct platform_device ohci0_device = {
165 .name = "tcc-ohci",
166 .id = 0,
167 .dev = {
168 .dma_mask = &tcc8k_dmamask,
169 .coherent_dma_mask = DMA_BIT_MASK(32),
170 .platform_data = &tcc8k_ohci0_platform_data,
171 },
172 .num_resources = ARRAY_SIZE(tcc8k_ohci0_resources),
173 .resource = tcc8k_ohci0_resources,
174};
175
176static struct platform_device ohci1_device = {
177 .name = "tcc-ohci",
178 .id = 1,
179 .dev = {
180 .dma_mask = &tcc8k_dmamask,
181 .coherent_dma_mask = DMA_BIT_MASK(32),
182 .platform_data = &tcc8k_ohci1_platform_data,
183 },
184 .num_resources = ARRAY_SIZE(tcc8k_ohci1_resources),
185 .resource = tcc8k_ohci1_resources,
186};
187
188static void __init tcc8k_init_usbhost(void)
189{
190 platform_device_register(&ohci0_device);
191 platform_device_register(&ohci1_device);
192}
193#else
194static void __init tcc8k_init_usbhost(void) { }
195#endif
196
197/* USB device controller*/
198#ifdef CONFIG_USB_GADGET_TCC8K
199static struct resource udc_resources[] = {
200 [0] = {
201 .start = INT_USBD,
202 .end = INT_USBD,
203 .flags = IORESOURCE_IRQ,
204 },
205 [1] = {
206 .start = INT_UDMA,
207 .end = INT_UDMA,
208 .flags = IORESOURCE_IRQ,
209 },
210};
211
212static struct platform_device tcc8k_udc_device = {
213 .name = "tcc-udc",
214 .id = 0,
215 .resource = udc_resources,
216 .num_resources = ARRAY_SIZE(udc_resources),
217 .dev = {
218 .dma_mask = &tcc8k_dmamask,
219 .coherent_dma_mask = DMA_BIT_MASK(32),
220 },
221};
222
223static void __init tcc8k_init_usb_gadget(void)
224{
225 platform_device_register(&tcc8k_udc_device);
226}
227#else
228static void __init tcc8k_init_usb_gadget(void) { }
229#endif /* CONFIG_USB_GADGET_TCC83X */
230
231static int __init tcc8k_init_devices(void)
232{
233 tcc8k_init_mmc();
234 tcc8k_init_usbhost();
235 tcc8k_init_usb_gadget();
236 return 0;
237}
238
239arch_initcall(tcc8k_init_devices);
diff --git a/arch/arm/mach-tcc8k/io.c b/arch/arm/mach-tcc8k/io.c
deleted file mode 100644
index 9b39d7fa658f..000000000000
--- a/arch/arm/mach-tcc8k/io.c
+++ /dev/null
@@ -1,62 +0,0 @@
1/*
2 * linux/arch/arm/mach-tcc8k/io.c
3 *
4 * (C) 2009 Hans J. Koch <hjk@linutronix.de>
5 *
6 * derived from TCC83xx io.c
7 * Copyright (C) Telechips, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/init.h>
15#include <linux/io.h>
16#include <linux/kernel.h>
17
18#include <asm/mach/map.h>
19
20#include <mach/tcc8k-regs.h>
21
22/*
23 * The machine specific code may provide the extra mapping besides the
24 * default mapping provided here.
25 */
26static struct map_desc tcc8k_io_desc[] __initdata = {
27 {
28 .virtual = (unsigned long)CS1_BASE_VIRT,
29 .pfn = __phys_to_pfn(CS1_BASE),
30 .length = CS1_SIZE,
31 .type = MT_DEVICE,
32 }, {
33 .virtual = (unsigned long)AHB_PERI_BASE_VIRT,
34 .pfn = __phys_to_pfn(AHB_PERI_BASE),
35 .length = AHB_PERI_SIZE,
36 .type = MT_DEVICE,
37 }, {
38 .virtual = (unsigned long)APB0_PERI_BASE_VIRT,
39 .pfn = __phys_to_pfn(APB0_PERI_BASE),
40 .length = APB0_PERI_SIZE,
41 .type = MT_DEVICE,
42 }, {
43 .virtual = (unsigned long)APB1_PERI_BASE_VIRT,
44 .pfn = __phys_to_pfn(APB1_PERI_BASE),
45 .length = APB1_PERI_SIZE,
46 .type = MT_DEVICE,
47 }, {
48 .virtual = (unsigned long)EXT_MEM_CTRL_BASE_VIRT,
49 .pfn = __phys_to_pfn(EXT_MEM_CTRL_BASE),
50 .length = EXT_MEM_CTRL_SIZE,
51 .type = MT_DEVICE,
52 },
53};
54
55/*
56 * Maps common IO regions for tcc8k.
57 *
58 */
59void __init tcc8k_map_common_io(void)
60{
61 iotable_init(tcc8k_io_desc, ARRAY_SIZE(tcc8k_io_desc));
62}
diff --git a/arch/arm/mach-tcc8k/irq.c b/arch/arm/mach-tcc8k/irq.c
deleted file mode 100644
index 209fa5c65d4c..000000000000
--- a/arch/arm/mach-tcc8k/irq.c
+++ /dev/null
@@ -1,111 +0,0 @@
1/*
2 * Copyright (C) Telechips, Inc.
3 * Copyright (C) 2009-2010 Hans J. Koch <hjk@linutronix.de>
4 *
5 * Licensed under the terms of the GNU GPL version 2.
6 */
7
8#include <linux/init.h>
9#include <linux/interrupt.h>
10#include <linux/io.h>
11
12#include <asm/irq.h>
13#include <asm/mach/irq.h>
14
15#include <mach/tcc8k-regs.h>
16#include <mach/irqs.h>
17
18#include "common.h"
19
20/* Disable IRQ */
21static void tcc8000_mask_ack_irq0(struct irq_data *d)
22{
23 PIC0_IEN &= ~(1 << d->irq);
24 PIC0_CREQ |= (1 << d->irq);
25}
26
27static void tcc8000_mask_ack_irq1(struct irq_data *d)
28{
29 PIC1_IEN &= ~(1 << (d->irq - 32));
30 PIC1_CREQ |= (1 << (d->irq - 32));
31}
32
33static void tcc8000_mask_irq0(struct irq_data *d)
34{
35 PIC0_IEN &= ~(1 << d->irq);
36}
37
38static void tcc8000_mask_irq1(struct irq_data *d)
39{
40 PIC1_IEN &= ~(1 << (d->irq - 32));
41}
42
43static void tcc8000_ack_irq0(struct irq_data *d)
44{
45 PIC0_CREQ |= (1 << d->irq);
46}
47
48static void tcc8000_ack_irq1(struct irq_data *d)
49{
50 PIC1_CREQ |= (1 << (d->irq - 32));
51}
52
53/* Enable IRQ */
54static void tcc8000_unmask_irq0(struct irq_data *d)
55{
56 PIC0_IEN |= (1 << d->irq);
57 PIC0_INTOEN |= (1 << d->irq);
58}
59
60static void tcc8000_unmask_irq1(struct irq_data *d)
61{
62 PIC1_IEN |= (1 << (d->irq - 32));
63 PIC1_INTOEN |= (1 << (d->irq - 32));
64}
65
66static struct irq_chip tcc8000_irq_chip0 = {
67 .name = "tcc_irq0",
68 .irq_mask = tcc8000_mask_irq0,
69 .irq_ack = tcc8000_ack_irq0,
70 .irq_mask_ack = tcc8000_mask_ack_irq0,
71 .irq_unmask = tcc8000_unmask_irq0,
72};
73
74static struct irq_chip tcc8000_irq_chip1 = {
75 .name = "tcc_irq1",
76 .irq_mask = tcc8000_mask_irq1,
77 .irq_ack = tcc8000_ack_irq1,
78 .irq_mask_ack = tcc8000_mask_ack_irq1,
79 .irq_unmask = tcc8000_unmask_irq1,
80};
81
82void __init tcc8k_init_irq(void)
83{
84 int irqno;
85
86 /* Mask and clear all interrupts */
87 PIC0_IEN = 0x00000000;
88 PIC0_CREQ = 0xffffffff;
89 PIC1_IEN = 0x00000000;
90 PIC1_CREQ = 0xffffffff;
91
92 PIC0_MEN0 = 0x00000003;
93 PIC1_MEN1 = 0x00000003;
94 PIC1_MEN = 0x00000003;
95
96 /* let all IRQs be level triggered */
97 PIC0_TMODE = 0xffffffff;
98 PIC1_TMODE = 0xffffffff;
99 /* all IRQs are IRQs (not FIQs) */
100 PIC0_IRQSEL = 0xffffffff;
101 PIC1_IRQSEL = 0xffffffff;
102
103 for (irqno = 0; irqno < NR_IRQS; irqno++) {
104 if (irqno < 32)
105 irq_set_chip(irqno, &tcc8000_irq_chip0);
106 else
107 irq_set_chip(irqno, &tcc8000_irq_chip1);
108 irq_set_handler(irqno, handle_level_irq);
109 set_irq_flags(irqno, IRQF_VALID);
110 }
111}
diff --git a/arch/arm/mach-tcc8k/time.c b/arch/arm/mach-tcc8k/time.c
deleted file mode 100644
index a96babe83771..000000000000
--- a/arch/arm/mach-tcc8k/time.c
+++ /dev/null
@@ -1,134 +0,0 @@
1/*
2 * TCC8000 system timer setup
3 *
4 * (C) 2009 Hans J. Koch <hjk@linutronix.de>
5 *
6 * Licensed under the terms of the GPL version 2.
7 *
8 */
9
10#include <linux/clk.h>
11#include <linux/clockchips.h>
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/io.h>
15#include <linux/irq.h>
16#include <linux/kernel.h>
17#include <linux/spinlock.h>
18
19#include <asm/mach/time.h>
20
21#include <mach/tcc8k-regs.h>
22#include <mach/irqs.h>
23
24#include "common.h"
25
26static void __iomem *timer_base;
27
28static int tcc_set_next_event(unsigned long evt,
29 struct clock_event_device *unused)
30{
31 unsigned long reg = __raw_readl(timer_base + TC32MCNT_OFFS);
32
33 __raw_writel(reg + evt, timer_base + TC32CMP0_OFFS);
34 return 0;
35}
36
37static void tcc_set_mode(enum clock_event_mode mode,
38 struct clock_event_device *evt)
39{
40 unsigned long tc32irq;
41
42 switch (mode) {
43 case CLOCK_EVT_MODE_ONESHOT:
44 tc32irq = __raw_readl(timer_base + TC32IRQ_OFFS);
45 tc32irq |= TC32IRQ_IRQEN0;
46 __raw_writel(tc32irq, timer_base + TC32IRQ_OFFS);
47 break;
48 case CLOCK_EVT_MODE_SHUTDOWN:
49 case CLOCK_EVT_MODE_UNUSED:
50 tc32irq = __raw_readl(timer_base + TC32IRQ_OFFS);
51 tc32irq &= ~TC32IRQ_IRQEN0;
52 __raw_writel(tc32irq, timer_base + TC32IRQ_OFFS);
53 break;
54 case CLOCK_EVT_MODE_PERIODIC:
55 case CLOCK_EVT_MODE_RESUME:
56 break;
57 }
58}
59
60static irqreturn_t tcc8k_timer_interrupt(int irq, void *dev_id)
61{
62 struct clock_event_device *evt = dev_id;
63
64 /* Acknowledge TC32 interrupt by reading TC32IRQ */
65 __raw_readl(timer_base + TC32IRQ_OFFS);
66
67 evt->event_handler(evt);
68
69 return IRQ_HANDLED;
70}
71
72static struct clock_event_device clockevent_tcc = {
73 .name = "tcc_timer1",
74 .features = CLOCK_EVT_FEAT_ONESHOT,
75 .shift = 32,
76 .set_mode = tcc_set_mode,
77 .set_next_event = tcc_set_next_event,
78 .rating = 200,
79};
80
81static struct irqaction tcc8k_timer_irq = {
82 .name = "TC32_timer",
83 .flags = IRQF_DISABLED | IRQF_TIMER,
84 .handler = tcc8k_timer_interrupt,
85 .dev_id = &clockevent_tcc,
86};
87
88static int __init tcc_clockevent_init(struct clk *clock)
89{
90 unsigned int c = clk_get_rate(clock);
91
92 clocksource_mmio_init(timer_base + TC32MCNT_OFFS, "tcc_tc32", c,
93 200, 32, clocksource_mmio_readl_up);
94
95 clockevent_tcc.mult = div_sc(c, NSEC_PER_SEC,
96 clockevent_tcc.shift);
97 clockevent_tcc.max_delta_ns =
98 clockevent_delta2ns(0xfffffffe, &clockevent_tcc);
99 clockevent_tcc.min_delta_ns =
100 clockevent_delta2ns(0xff, &clockevent_tcc);
101
102 clockevent_tcc.cpumask = cpumask_of(0);
103
104 clockevents_register_device(&clockevent_tcc);
105
106 return 0;
107}
108
109void __init tcc8k_timer_init(struct clk *clock, void __iomem *base, int irq)
110{
111 u32 reg;
112
113 timer_base = base;
114 tcc8k_timer_irq.irq = irq;
115
116 /* Enable clocks */
117 clk_enable(clock);
118
119 /* Initialize 32-bit timer */
120 reg = __raw_readl(timer_base + TC32EN_OFFS);
121 reg &= ~TC32EN_ENABLE; /* Disable timer */
122 __raw_writel(reg, timer_base + TC32EN_OFFS);
123 /* Free running timer, counting from 0 to 0xffffffff */
124 __raw_writel(0, timer_base + TC32EN_OFFS);
125 __raw_writel(0, timer_base + TC32LDV_OFFS);
126 reg = __raw_readl(timer_base + TC32IRQ_OFFS);
127 reg |= TC32IRQ_IRQEN0; /* irq at match with CMP0 */
128 __raw_writel(reg, timer_base + TC32IRQ_OFFS);
129
130 __raw_writel(TC32EN_ENABLE, timer_base + TC32EN_OFFS);
131
132 tcc_clockevent_init(clock);
133 setup_irq(irq, &tcc8k_timer_irq);
134}
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
index f6f03ce340fc..e417a8383dbb 100644
--- a/arch/arm/mach-tegra/board-dt.c
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -134,5 +134,6 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
134 .handle_irq = gic_handle_irq, 134 .handle_irq = gic_handle_irq,
135 .timer = &tegra_timer, 135 .timer = &tegra_timer,
136 .init_machine = tegra_dt_init, 136 .init_machine = tegra_dt_init,
137 .restart = tegra_assert_system_reset,
137 .dt_compat = tegra_dt_board_compat, 138 .dt_compat = tegra_dt_board_compat,
138MACHINE_END 139MACHINE_END
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index fd190a8dc665..70ee674131f9 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -191,4 +191,5 @@ MACHINE_START(HARMONY, "harmony")
191 .handle_irq = gic_handle_irq, 191 .handle_irq = gic_handle_irq,
192 .timer = &tegra_timer, 192 .timer = &tegra_timer,
193 .init_machine = tegra_harmony_init, 193 .init_machine = tegra_harmony_init,
194 .restart = tegra_assert_system_reset,
194MACHINE_END 195MACHINE_END
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
index 0b7e1cfee70d..33d6205ad307 100644
--- a/arch/arm/mach-tegra/board-paz00.c
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -194,4 +194,5 @@ MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ")
194 .handle_irq = gic_handle_irq, 194 .handle_irq = gic_handle_irq,
195 .timer = &tegra_timer, 195 .timer = &tegra_timer,
196 .init_machine = tegra_paz00_init, 196 .init_machine = tegra_paz00_init,
197 .restart = tegra_assert_system_reset,
197MACHINE_END 198MACHINE_END
diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c
index 7328379b1356..c1599eb8e0cb 100644
--- a/arch/arm/mach-tegra/board-seaboard.c
+++ b/arch/arm/mach-tegra/board-seaboard.c
@@ -288,6 +288,7 @@ MACHINE_START(SEABOARD, "seaboard")
288 .handle_irq = gic_handle_irq, 288 .handle_irq = gic_handle_irq,
289 .timer = &tegra_timer, 289 .timer = &tegra_timer,
290 .init_machine = tegra_seaboard_init, 290 .init_machine = tegra_seaboard_init,
291 .restart = tegra_assert_system_reset,
291MACHINE_END 292MACHINE_END
292 293
293MACHINE_START(KAEN, "kaen") 294MACHINE_START(KAEN, "kaen")
@@ -298,6 +299,7 @@ MACHINE_START(KAEN, "kaen")
298 .handle_irq = gic_handle_irq, 299 .handle_irq = gic_handle_irq,
299 .timer = &tegra_timer, 300 .timer = &tegra_timer,
300 .init_machine = tegra_kaen_init, 301 .init_machine = tegra_kaen_init,
302 .restart = tegra_assert_system_reset,
301MACHINE_END 303MACHINE_END
302 304
303MACHINE_START(WARIO, "wario") 305MACHINE_START(WARIO, "wario")
@@ -308,4 +310,5 @@ MACHINE_START(WARIO, "wario")
308 .handle_irq = gic_handle_irq, 310 .handle_irq = gic_handle_irq,
309 .timer = &tegra_timer, 311 .timer = &tegra_timer,
310 .init_machine = tegra_wario_init, 312 .init_machine = tegra_wario_init,
313 .restart = tegra_assert_system_reset,
311MACHINE_END 314MACHINE_END
diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c
index 60a36a2e0be1..c242314a1db5 100644
--- a/arch/arm/mach-tegra/board-trimslice.c
+++ b/arch/arm/mach-tegra/board-trimslice.c
@@ -180,4 +180,5 @@ MACHINE_START(TRIMSLICE, "trimslice")
180 .handle_irq = gic_handle_irq, 180 .handle_irq = gic_handle_irq,
181 .timer = &tegra_timer, 181 .timer = &tegra_timer,
182 .init_machine = tegra_trimslice_init, 182 .init_machine = tegra_trimslice_init,
183 .restart = tegra_assert_system_reset,
183MACHINE_END 184MACHINE_END
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 690b888be506..20f396d740fa 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -31,8 +31,6 @@
31#include "clock.h" 31#include "clock.h"
32#include "fuse.h" 32#include "fuse.h"
33 33
34void (*arch_reset)(char mode, const char *cmd) = tegra_assert_system_reset;
35
36void tegra_assert_system_reset(char mode, const char *cmd) 34void tegra_assert_system_reset(char mode, const char *cmd)
37{ 35{
38 void __iomem *reset = IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x04); 36 void __iomem *reset = IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x04);
diff --git a/arch/arm/mach-tegra/include/mach/system.h b/arch/arm/mach-tegra/include/mach/system.h
index 027c4215d313..a312988bf6f8 100644
--- a/arch/arm/mach-tegra/include/mach/system.h
+++ b/arch/arm/mach-tegra/include/mach/system.h
@@ -21,10 +21,6 @@
21#ifndef __MACH_TEGRA_SYSTEM_H 21#ifndef __MACH_TEGRA_SYSTEM_H
22#define __MACH_TEGRA_SYSTEM_H 22#define __MACH_TEGRA_SYSTEM_H
23 23
24#include <mach/iomap.h>
25
26extern void (*arch_reset)(char mode, const char *cmd);
27
28static inline void arch_idle(void) 24static inline void arch_idle(void)
29{ 25{
30} 26}
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index ac0791e924bc..697930761b3e 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -1888,3 +1888,23 @@ static int core_module_init(void)
1888 return mmc_init(&mmcsd_device); 1888 return mmc_init(&mmcsd_device);
1889} 1889}
1890module_init(core_module_init); 1890module_init(core_module_init);
1891
1892/* Forward declare this function from the watchdog */
1893void coh901327_watchdog_reset(void);
1894
1895void u300_restart(char mode, const char *cmd)
1896{
1897 switch (mode) {
1898 case 's':
1899 case 'h':
1900#ifdef CONFIG_COH901327_WATCHDOG
1901 coh901327_watchdog_reset();
1902#endif
1903 break;
1904 default:
1905 /* Do nothing */
1906 break;
1907 }
1908 /* Wait for system do die/reset. */
1909 while (1);
1910}
diff --git a/arch/arm/mach-u300/include/mach/platform.h b/arch/arm/mach-u300/include/mach/platform.h
index 77d9210a82e2..096333f32fc3 100644
--- a/arch/arm/mach-u300/include/mach/platform.h
+++ b/arch/arm/mach-u300/include/mach/platform.h
@@ -14,6 +14,7 @@
14void u300_map_io(void); 14void u300_map_io(void);
15void u300_init_irq(void); 15void u300_init_irq(void);
16void u300_init_devices(void); 16void u300_init_devices(void);
17void u300_restart(char, const char *);
17extern struct sys_timer u300_timer; 18extern struct sys_timer u300_timer;
18 19
19#endif 20#endif
diff --git a/arch/arm/mach-u300/include/mach/system.h b/arch/arm/mach-u300/include/mach/system.h
index 6b6fef7a438c..574d46e38290 100644
--- a/arch/arm/mach-u300/include/mach/system.h
+++ b/arch/arm/mach-u300/include/mach/system.h
@@ -8,33 +8,7 @@
8 * System shutdown and reset functions. 8 * System shutdown and reset functions.
9 * Author: Linus Walleij <linus.walleij@stericsson.com> 9 * Author: Linus Walleij <linus.walleij@stericsson.com>
10 */ 10 */
11#include <mach/hardware.h>
12#include <asm/io.h>
13#include <asm/hardware/vic.h>
14#include <asm/irq.h>
15
16/* Forward declare this function from the watchdog */
17void coh901327_watchdog_reset(void);
18
19static inline void arch_idle(void) 11static inline void arch_idle(void)
20{ 12{
21 cpu_do_idle(); 13 cpu_do_idle();
22} 14}
23
24static void arch_reset(char mode, const char *cmd)
25{
26 switch (mode) {
27 case 's':
28 case 'h':
29 printk(KERN_CRIT "RESET: shutting down/rebooting system\n");
30#ifdef CONFIG_COH901327_WATCHDOG
31 coh901327_watchdog_reset();
32#endif
33 break;
34 default:
35 /* Do nothing */
36 break;
37 }
38 /* Wait for system do die/reset. */
39 while (1);
40}
diff --git a/arch/arm/mach-u300/u300.c b/arch/arm/mach-u300/u300.c
index 5f0f7060f3a1..f30c69d91d99 100644
--- a/arch/arm/mach-u300/u300.c
+++ b/arch/arm/mach-u300/u300.c
@@ -53,4 +53,5 @@ MACHINE_START(U300, MACH_U300_STRING)
53 .handle_irq = vic_handle_irq, 53 .handle_irq = vic_handle_irq,
54 .timer = &u300_timer, 54 .timer = &u300_timer,
55 .init_machine = u300_init_machine, 55 .init_machine = u300_init_machine,
56 .restart = u300_restart,
56MACHINE_END 57MACHINE_END
diff --git a/arch/arm/mach-ux500/include/mach/system.h b/arch/arm/mach-ux500/include/mach/system.h
index c0cd8006f1a2..258e5c919c24 100644
--- a/arch/arm/mach-ux500/include/mach/system.h
+++ b/arch/arm/mach-ux500/include/mach/system.h
@@ -17,9 +17,4 @@ static inline void arch_idle(void)
17 cpu_do_idle(); 17 cpu_do_idle();
18} 18}
19 19
20static inline void arch_reset(char mode, const char *cmd)
21{
22 /* yet to be implemented - TODO */
23}
24
25#endif 20#endif
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 4d8dfc15f3e6..cbcda61162d3 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -740,6 +740,19 @@ static void versatile_leds_event(led_event_t ledevt)
740} 740}
741#endif /* CONFIG_LEDS */ 741#endif /* CONFIG_LEDS */
742 742
743void versatile_restart(char mode, const char *cmd)
744{
745 void __iomem *sys = __io_address(VERSATILE_SYS_BASE);
746 u32 val;
747
748 val = __raw_readl(sys + VERSATILE_SYS_RESETCTL_OFFSET);
749 val |= 0x105;
750
751 __raw_writel(0xa05f, sys + VERSATILE_SYS_LOCK_OFFSET);
752 __raw_writel(val, sys + VERSATILE_SYS_RESETCTL_OFFSET);
753 __raw_writel(0, sys + VERSATILE_SYS_LOCK_OFFSET);
754}
755
743/* Early initializations */ 756/* Early initializations */
744void __init versatile_init_early(void) 757void __init versatile_init_early(void)
745{ 758{
diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h
index e01422700ebb..2ef2f555f315 100644
--- a/arch/arm/mach-versatile/core.h
+++ b/arch/arm/mach-versatile/core.h
@@ -30,6 +30,7 @@ extern void __init versatile_init_early(void);
30extern void __init versatile_init_irq(void); 30extern void __init versatile_init_irq(void);
31extern void __init versatile_map_io(void); 31extern void __init versatile_map_io(void);
32extern struct sys_timer versatile_timer; 32extern struct sys_timer versatile_timer;
33extern void versatile_restart(char, const char *);
33extern unsigned int mmc_status(struct device *dev); 34extern unsigned int mmc_status(struct device *dev);
34#ifdef CONFIG_OF 35#ifdef CONFIG_OF
35extern struct of_dev_auxdata versatile_auxdata_lookup[]; 36extern struct of_dev_auxdata versatile_auxdata_lookup[];
diff --git a/arch/arm/mach-versatile/include/mach/system.h b/arch/arm/mach-versatile/include/mach/system.h
index 8ffc12a7cb25..f3fa347895f0 100644
--- a/arch/arm/mach-versatile/include/mach/system.h
+++ b/arch/arm/mach-versatile/include/mach/system.h
@@ -21,10 +21,6 @@
21#ifndef __ASM_ARCH_SYSTEM_H 21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H 22#define __ASM_ARCH_SYSTEM_H
23 23
24#include <linux/io.h>
25#include <mach/hardware.h>
26#include <mach/platform.h>
27
28static inline void arch_idle(void) 24static inline void arch_idle(void)
29{ 25{
30 /* 26 /*
@@ -34,16 +30,4 @@ static inline void arch_idle(void)
34 cpu_do_idle(); 30 cpu_do_idle();
35} 31}
36 32
37static inline void arch_reset(char mode, const char *cmd)
38{
39 u32 val;
40
41 val = __raw_readl(IO_ADDRESS(VERSATILE_SYS_RESETCTL)) & ~0x7;
42 val |= 0x105;
43
44 __raw_writel(0xa05f, IO_ADDRESS(VERSATILE_SYS_LOCK));
45 __raw_writel(val, IO_ADDRESS(VERSATILE_SYS_RESETCTL));
46 __raw_writel(0, IO_ADDRESS(VERSATILE_SYS_LOCK));
47}
48
49#endif 33#endif
diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c
index c83a1f379f7a..63b8dd2b9f4d 100644
--- a/arch/arm/mach-versatile/versatile_ab.c
+++ b/arch/arm/mach-versatile/versatile_ab.c
@@ -43,4 +43,5 @@ MACHINE_START(VERSATILE_AB, "ARM-Versatile AB")
43 .handle_irq = vic_handle_irq, 43 .handle_irq = vic_handle_irq,
44 .timer = &versatile_timer, 44 .timer = &versatile_timer,
45 .init_machine = versatile_init, 45 .init_machine = versatile_init,
46 .restart = versatile_restart,
46MACHINE_END 47MACHINE_END
diff --git a/arch/arm/mach-versatile/versatile_dt.c b/arch/arm/mach-versatile/versatile_dt.c
index f4d1e0f072c8..ae5ad3c8f3dd 100644
--- a/arch/arm/mach-versatile/versatile_dt.c
+++ b/arch/arm/mach-versatile/versatile_dt.c
@@ -50,4 +50,5 @@ DT_MACHINE_START(VERSATILE_PB, "ARM-Versatile (Device Tree Support)")
50 .timer = &versatile_timer, 50 .timer = &versatile_timer,
51 .init_machine = versatile_dt_init, 51 .init_machine = versatile_dt_init,
52 .dt_compat = versatile_dt_match, 52 .dt_compat = versatile_dt_match,
53 .restart = versatile_restart,
53MACHINE_END 54MACHINE_END
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index 4d31eeb6c101..7aab79b665e7 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -111,4 +111,5 @@ MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
111 .handle_irq = vic_handle_irq, 111 .handle_irq = vic_handle_irq,
112 .timer = &versatile_timer, 112 .timer = &versatile_timer,
113 .init_machine = versatile_pb_init, 113 .init_machine = versatile_pb_init,
114 .restart = versatile_restart,
114MACHINE_END 115MACHINE_END
diff --git a/arch/arm/mach-vexpress/include/mach/system.h b/arch/arm/mach-vexpress/include/mach/system.h
index 899a4e628a4c..f653a8e265bd 100644
--- a/arch/arm/mach-vexpress/include/mach/system.h
+++ b/arch/arm/mach-vexpress/include/mach/system.h
@@ -30,8 +30,4 @@ static inline void arch_idle(void)
30 cpu_do_idle(); 30 cpu_do_idle();
31} 31}
32 32
33static inline void arch_reset(char mode, const char *cmd)
34{
35}
36
37#endif 33#endif
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 7aa07a8ce232..6dd10e320ef6 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -438,7 +438,6 @@ static void __init v2m_init(void)
438 amba_device_register(v2m_amba_devs[i], &iomem_resource); 438 amba_device_register(v2m_amba_devs[i], &iomem_resource);
439 439
440 pm_power_off = v2m_power_off; 440 pm_power_off = v2m_power_off;
441 arm_pm_restart = v2m_restart;
442 441
443 ct_desc->init_tile(); 442 ct_desc->init_tile();
444} 443}
@@ -451,4 +450,5 @@ MACHINE_START(VEXPRESS, "ARM-Versatile Express")
451 .timer = &v2m_timer, 450 .timer = &v2m_timer,
452 .handle_irq = gic_handle_irq, 451 .handle_irq = gic_handle_irq,
453 .init_machine = v2m_init, 452 .init_machine = v2m_init,
453 .restart = v2m_restart,
454MACHINE_END 454MACHINE_END
diff --git a/arch/arm/mach-w90x900/cpu.c b/arch/arm/mach-w90x900/cpu.c
index 0a235e502330..604e1db266e8 100644
--- a/arch/arm/mach-w90x900/cpu.c
+++ b/arch/arm/mach-w90x900/cpu.c
@@ -33,9 +33,11 @@
33#include <mach/regs-serial.h> 33#include <mach/regs-serial.h>
34#include <mach/regs-clock.h> 34#include <mach/regs-clock.h>
35#include <mach/regs-ebi.h> 35#include <mach/regs-ebi.h>
36#include <mach/regs-timer.h>
36 37
37#include "cpu.h" 38#include "cpu.h"
38#include "clock.h" 39#include "clock.h"
40#include "nuc9xx.h"
39 41
40/* Initial IO mappings */ 42/* Initial IO mappings */
41 43
@@ -222,3 +224,17 @@ void __init nuc900_init_clocks(void)
222 clkdev_add_table(nuc900_clkregs, ARRAY_SIZE(nuc900_clkregs)); 224 clkdev_add_table(nuc900_clkregs, ARRAY_SIZE(nuc900_clkregs));
223} 225}
224 226
227#define WTCR (TMR_BA + 0x1C)
228#define WTCLK (1 << 10)
229#define WTE (1 << 7)
230#define WTRE (1 << 1)
231
232void nuc9xx_restart(char mode, const char *cmd)
233{
234 if (mode == 's') {
235 /* Jump into ROM at address 0 */
236 soft_restart(0);
237 } else {
238 __raw_writel(WTE | WTRE | WTCLK, WTCR);
239 }
240}
diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h
index 68875a1c16be..2aaeb9311619 100644
--- a/arch/arm/mach-w90x900/include/mach/system.h
+++ b/arch/arm/mach-w90x900/include/mach/system.h
@@ -14,28 +14,6 @@
14 * (at your option) any later version. 14 * (at your option) any later version.
15 * 15 *
16 */ 16 */
17
18#include <linux/io.h>
19#include <asm/proc-fns.h>
20#include <mach/map.h>
21#include <mach/regs-timer.h>
22
23#define WTCR (TMR_BA + 0x1C)
24#define WTCLK (1 << 10)
25#define WTE (1 << 7)
26#define WTRE (1 << 1)
27
28static void arch_idle(void) 17static void arch_idle(void)
29{ 18{
30} 19}
31
32static void arch_reset(char mode, const char *cmd)
33{
34 if (mode == 's') {
35 /* Jump into ROM at address 0 */
36 soft_restart(0);
37 } else {
38 __raw_writel(WTE | WTRE | WTCLK, WTCR);
39 }
40}
41
diff --git a/arch/arm/mach-w90x900/mach-nuc910evb.c b/arch/arm/mach-w90x900/mach-nuc910evb.c
index 31c109018228..b4243e4f1565 100644
--- a/arch/arm/mach-w90x900/mach-nuc910evb.c
+++ b/arch/arm/mach-w90x900/mach-nuc910evb.c
@@ -38,4 +38,5 @@ MACHINE_START(W90P910EVB, "W90P910EVB")
38 .init_irq = nuc900_init_irq, 38 .init_irq = nuc900_init_irq,
39 .init_machine = nuc910evb_init, 39 .init_machine = nuc910evb_init,
40 .timer = &nuc900_timer, 40 .timer = &nuc900_timer,
41 .restart = nuc9xx_restart,
41MACHINE_END 42MACHINE_END
diff --git a/arch/arm/mach-w90x900/mach-nuc950evb.c b/arch/arm/mach-w90x900/mach-nuc950evb.c
index 4062e55a57d8..067d8f9166dc 100644
--- a/arch/arm/mach-w90x900/mach-nuc950evb.c
+++ b/arch/arm/mach-w90x900/mach-nuc950evb.c
@@ -41,4 +41,5 @@ MACHINE_START(W90P950EVB, "W90P950EVB")
41 .init_irq = nuc900_init_irq, 41 .init_irq = nuc900_init_irq,
42 .init_machine = nuc950evb_init, 42 .init_machine = nuc950evb_init,
43 .timer = &nuc900_timer, 43 .timer = &nuc900_timer,
44 .restart = nuc9xx_restart,
44MACHINE_END 45MACHINE_END
diff --git a/arch/arm/mach-w90x900/mach-nuc960evb.c b/arch/arm/mach-w90x900/mach-nuc960evb.c
index 0ab9995d5b58..cbb3adc3db10 100644
--- a/arch/arm/mach-w90x900/mach-nuc960evb.c
+++ b/arch/arm/mach-w90x900/mach-nuc960evb.c
@@ -38,4 +38,5 @@ MACHINE_START(W90N960EVB, "W90N960EVB")
38 .init_irq = nuc900_init_irq, 38 .init_irq = nuc900_init_irq,
39 .init_machine = nuc960evb_init, 39 .init_machine = nuc960evb_init,
40 .timer = &nuc900_timer, 40 .timer = &nuc900_timer,
41 .restart = nuc9xx_restart,
41MACHINE_END 42MACHINE_END
diff --git a/arch/arm/mach-w90x900/nuc9xx.h b/arch/arm/mach-w90x900/nuc9xx.h
index 847c4f3e0440..91acb4047793 100644
--- a/arch/arm/mach-w90x900/nuc9xx.h
+++ b/arch/arm/mach-w90x900/nuc9xx.h
@@ -21,3 +21,4 @@ struct sys_timer;
21 21
22extern void nuc900_init_irq(void); 22extern void nuc900_init_irq(void);
23extern struct sys_timer nuc900_timer; 23extern struct sys_timer nuc900_timer;
24extern void nuc9xx_restart(char, const char *);
diff --git a/arch/arm/mach-zynq/include/mach/system.h b/arch/arm/mach-zynq/include/mach/system.h
index 1b84d705c675..8e88e0b8d2ba 100644
--- a/arch/arm/mach-zynq/include/mach/system.h
+++ b/arch/arm/mach-zynq/include/mach/system.h
@@ -20,9 +20,4 @@ static inline void arch_idle(void)
20 cpu_do_idle(); 20 cpu_do_idle();
21} 21}
22 22
23static inline void arch_reset(char mode, const char *cmd)
24{
25 /* Add architecture specific reset processing here */
26}
27
28#endif 23#endif
diff --git a/arch/arm/plat-iop/Makefile b/arch/arm/plat-iop/Makefile
index 90f7153a8d78..a99dc15a70f7 100644
--- a/arch/arm/plat-iop/Makefile
+++ b/arch/arm/plat-iop/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_ARCH_IOP32X) += time.o
13obj-$(CONFIG_ARCH_IOP32X) += cp6.o 13obj-$(CONFIG_ARCH_IOP32X) += cp6.o
14obj-$(CONFIG_ARCH_IOP32X) += adma.o 14obj-$(CONFIG_ARCH_IOP32X) += adma.o
15obj-$(CONFIG_ARCH_IOP32X) += pmu.o 15obj-$(CONFIG_ARCH_IOP32X) += pmu.o
16obj-$(CONFIG_ARCH_IOP32X) += restart.o
16 17
17# IOP33X 18# IOP33X
18obj-$(CONFIG_ARCH_IOP33X) += gpio.o 19obj-$(CONFIG_ARCH_IOP33X) += gpio.o
@@ -23,6 +24,7 @@ obj-$(CONFIG_ARCH_IOP33X) += time.o
23obj-$(CONFIG_ARCH_IOP33X) += cp6.o 24obj-$(CONFIG_ARCH_IOP33X) += cp6.o
24obj-$(CONFIG_ARCH_IOP33X) += adma.o 25obj-$(CONFIG_ARCH_IOP33X) += adma.o
25obj-$(CONFIG_ARCH_IOP33X) += pmu.o 26obj-$(CONFIG_ARCH_IOP33X) += pmu.o
27obj-$(CONFIG_ARCH_IOP33X) += restart.o
26 28
27# IOP13XX 29# IOP13XX
28obj-$(CONFIG_ARCH_IOP13XX) += cp6.o 30obj-$(CONFIG_ARCH_IOP13XX) += cp6.o
diff --git a/arch/arm/plat-iop/restart.c b/arch/arm/plat-iop/restart.c
new file mode 100644
index 000000000000..6a85a0c502e6
--- /dev/null
+++ b/arch/arm/plat-iop/restart.c
@@ -0,0 +1,19 @@
1/*
2 * restart.c
3 *
4 * Copyright (C) 2001 MontaVista Software, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <asm/hardware/iop3xx.h>
11#include <mach/hardware.h>
12
13void iop3xx_restart(char mode, const char *cmd)
14{
15 *IOP3XX_PCSR = 0x30;
16
17 /* Jump into ROM at address 0 */
18 soft_restart(0);
19}
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c
index 74aac96cda20..adbff706ef6f 100644
--- a/arch/arm/plat-mxc/cpufreq.c
+++ b/arch/arm/plat-mxc/cpufreq.c
@@ -17,6 +17,7 @@
17 * the CPU clock speed on the fly. 17 * the CPU clock speed on the fly.
18 */ 18 */
19 19
20#include <linux/module.h>
20#include <linux/cpufreq.h> 21#include <linux/cpufreq.h>
21#include <linux/clk.h> 22#include <linux/clk.h>
22#include <linux/err.h> 23#include <linux/err.h>
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 6698cae942f7..83cca9bcfc97 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -71,8 +71,8 @@ extern int mx6q_clocks_init(void);
71extern struct platform_device *mxc_register_gpio(char *name, int id, 71extern struct platform_device *mxc_register_gpio(char *name, int id,
72 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); 72 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
73extern void mxc_set_cpu_type(unsigned int type); 73extern void mxc_set_cpu_type(unsigned int type);
74extern void mxc_restart(char, const char *);
74extern void mxc_arch_reset_init(void __iomem *); 75extern void mxc_arch_reset_init(void __iomem *);
75extern void mx51_efikamx_reset(void);
76extern int mx53_revision(void); 76extern int mx53_revision(void);
77extern int mx53_display_revision(void); 77extern int mx53_display_revision(void);
78 78
@@ -121,6 +121,7 @@ static inline void imx_smp_prepare(void) {}
121extern void imx_enable_cpu(int cpu, bool enable); 121extern void imx_enable_cpu(int cpu, bool enable);
122extern void imx_set_cpu_jump(int cpu, void *jump_addr); 122extern void imx_set_cpu_jump(int cpu, void *jump_addr);
123extern void imx_src_init(void); 123extern void imx_src_init(void);
124extern void imx_src_prepare_restart(void);
124extern void imx_gpc_init(void); 125extern void imx_gpc_init(void);
125extern void imx_gpc_pre_suspend(void); 126extern void imx_gpc_pre_suspend(void);
126extern void imx_gpc_post_resume(void); 127extern void imx_gpc_post_resume(void);
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
index b9895d250167..13ad0df2e860 100644
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ b/arch/arm/plat-mxc/include/mach/system.h
@@ -22,6 +22,4 @@ static inline void arch_idle(void)
22 cpu_do_idle(); 22 cpu_do_idle();
23} 23}
24 24
25void arch_reset(char mode, const char *cmd);
26
27#endif /* __ASM_ARCH_MXC_SYSTEM_H__ */ 25#endif /* __ASM_ARCH_MXC_SYSTEM_H__ */
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index 42d74ea59084..845de59f07ed 100644
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -32,6 +32,9 @@
32#define MX3_PWMSAR 0x0C /* PWM Sample Register */ 32#define MX3_PWMSAR 0x0C /* PWM Sample Register */
33#define MX3_PWMPR 0x10 /* PWM Period Register */ 33#define MX3_PWMPR 0x10 /* PWM Period Register */
34#define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) 34#define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4)
35#define MX3_PWMCR_DOZEEN (1 << 24)
36#define MX3_PWMCR_WAITEN (1 << 23)
37#define MX3_PWMCR_DBGEN (1 << 22)
35#define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16) 38#define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
36#define MX3_PWMCR_CLKSRC_IPG (1 << 16) 39#define MX3_PWMCR_CLKSRC_IPG (1 << 16)
37#define MX3_PWMCR_EN (1 << 0) 40#define MX3_PWMCR_EN (1 << 0)
@@ -77,7 +80,9 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
77 writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR); 80 writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR);
78 writel(period_cycles, pwm->mmio_base + MX3_PWMPR); 81 writel(period_cycles, pwm->mmio_base + MX3_PWMPR);
79 82
80 cr = MX3_PWMCR_PRESCALER(prescale) | MX3_PWMCR_EN; 83 cr = MX3_PWMCR_PRESCALER(prescale) |
84 MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
85 MX3_PWMCR_DBGEN | MX3_PWMCR_EN;
81 86
82 if (cpu_is_mx25()) 87 if (cpu_is_mx25())
83 cr |= MX3_PWMCR_CLKSRC_IPG; 88 cr |= MX3_PWMCR_CLKSRC_IPG;
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c
index 7e5c76ea4466..3599bf2cfd4f 100644
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/plat-mxc/system.c
@@ -37,17 +37,10 @@ static void __iomem *wdog_base;
37/* 37/*
38 * Reset the system. It is called by machine_restart(). 38 * Reset the system. It is called by machine_restart().
39 */ 39 */
40void arch_reset(char mode, const char *cmd) 40void mxc_restart(char mode, const char *cmd)
41{ 41{
42 unsigned int wcr_enable; 42 unsigned int wcr_enable;
43 43
44#ifdef CONFIG_MACH_MX51_EFIKAMX
45 if (machine_is_mx51_efikamx()) {
46 mx51_efikamx_reset();
47 return;
48 }
49#endif
50
51 if (cpu_is_mx1()) { 44 if (cpu_is_mx1()) {
52 wcr_enable = (1 << 0); 45 wcr_enable = (1 << 0);
53 } else { 46 } else {
diff --git a/arch/arm/plat-omap/include/plat/system.h b/arch/arm/plat-omap/include/plat/system.h
index c5fa9e929009..8e5ebd74b129 100644
--- a/arch/arm/plat-omap/include/plat/system.h
+++ b/arch/arm/plat-omap/include/plat/system.h
@@ -12,6 +12,4 @@ static inline void arch_idle(void)
12 cpu_do_idle(); 12 cpu_do_idle();
13} 13}
14 14
15extern void (*arch_reset)(char, const char *);
16
17#endif 15#endif
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 3c6335307fb1..1121df13e15f 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -192,27 +192,6 @@ static unsigned long s3c24xx_read_idcode_v4(void)
192 return __raw_readl(S3C2410_GSTATUS1); 192 return __raw_readl(S3C2410_GSTATUS1);
193} 193}
194 194
195/* Hook for arm_pm_restart to ensure we execute the reset code
196 * with the caches enabled. It seems at least the S3C2440 has a problem
197 * resetting if there is bus activity interrupted by the reset.
198 */
199static void s3c24xx_pm_restart(char mode, const char *cmd)
200{
201 if (mode != 's') {
202 unsigned long flags;
203
204 local_irq_save(flags);
205 __cpuc_flush_kern_all();
206 __cpuc_flush_user_all();
207
208 arch_reset(mode, cmd);
209 local_irq_restore(flags);
210 }
211
212 /* fallback, or unhandled */
213 arm_machine_restart(mode, cmd);
214}
215
216void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) 195void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
217{ 196{
218 /* initialise the io descriptors we need for initialisation */ 197 /* initialise the io descriptors we need for initialisation */
@@ -226,7 +205,5 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
226 } 205 }
227 s3c24xx_init_cpu(); 206 s3c24xx_init_cpu();
228 207
229 arm_pm_restart = s3c24xx_pm_restart;
230
231 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); 208 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
232} 209}
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index 876344038b8d..30d8c3016e6b 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -13,7 +13,6 @@ obj- :=
13# Core files 13# Core files
14 14
15obj-y += dev-uart.o 15obj-y += dev-uart.o
16obj-y += cpu.o
17obj-y += clock.o 16obj-y += clock.o
18obj-y += irq.o 17obj-y += irq.o
19obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o 18obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
deleted file mode 100644
index a56959e83516..000000000000
--- a/arch/arm/plat-s5p/cpu.c
+++ /dev/null
@@ -1,144 +0,0 @@
1/* linux/arch/arm/plat-s5p/cpu.c
2 *
3 * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5P CPU Support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/init.h>
14#include <linux/module.h>
15
16#include <asm/mach/arch.h>
17#include <asm/mach/map.h>
18
19#include <mach/map.h>
20#include <mach/regs-clock.h>
21
22#include <plat/cpu.h>
23#include <plat/s5p6440.h>
24#include <plat/s5p6450.h>
25#include <plat/s5pc100.h>
26#include <plat/s5pv210.h>
27#include <plat/exynos4.h>
28
29/* table of supported CPUs */
30
31static const char name_s5p6440[] = "S5P6440";
32static const char name_s5p6450[] = "S5P6450";
33static const char name_s5pc100[] = "S5PC100";
34static const char name_s5pv210[] = "S5PV210/S5PC110";
35static const char name_exynos4210[] = "EXYNOS4210";
36static const char name_exynos4212[] = "EXYNOS4212";
37static const char name_exynos4412[] = "EXYNOS4412";
38
39static struct cpu_table cpu_ids[] __initdata = {
40 {
41 .idcode = S5P6440_CPU_ID,
42 .idmask = S5P64XX_CPU_MASK,
43 .map_io = s5p6440_map_io,
44 .init_clocks = s5p6440_init_clocks,
45 .init_uarts = s5p6440_init_uarts,
46 .init = s5p64x0_init,
47 .name = name_s5p6440,
48 }, {
49 .idcode = S5P6450_CPU_ID,
50 .idmask = S5P64XX_CPU_MASK,
51 .map_io = s5p6450_map_io,
52 .init_clocks = s5p6450_init_clocks,
53 .init_uarts = s5p6450_init_uarts,
54 .init = s5p64x0_init,
55 .name = name_s5p6450,
56 }, {
57 .idcode = S5PC100_CPU_ID,
58 .idmask = S5PC100_CPU_MASK,
59 .map_io = s5pc100_map_io,
60 .init_clocks = s5pc100_init_clocks,
61 .init_uarts = s5pc100_init_uarts,
62 .init = s5pc100_init,
63 .name = name_s5pc100,
64 }, {
65 .idcode = S5PV210_CPU_ID,
66 .idmask = S5PV210_CPU_MASK,
67 .map_io = s5pv210_map_io,
68 .init_clocks = s5pv210_init_clocks,
69 .init_uarts = s5pv210_init_uarts,
70 .init = s5pv210_init,
71 .name = name_s5pv210,
72 }, {
73 .idcode = EXYNOS4210_CPU_ID,
74 .idmask = EXYNOS4_CPU_MASK,
75 .map_io = exynos4_map_io,
76 .init_clocks = exynos4_init_clocks,
77 .init_uarts = exynos4_init_uarts,
78 .init = exynos_init,
79 .name = name_exynos4210,
80 }, {
81 .idcode = EXYNOS4212_CPU_ID,
82 .idmask = EXYNOS4_CPU_MASK,
83 .map_io = exynos4_map_io,
84 .init_clocks = exynos4_init_clocks,
85 .init_uarts = exynos4_init_uarts,
86 .init = exynos_init,
87 .name = name_exynos4212,
88 }, {
89 .idcode = EXYNOS4412_CPU_ID,
90 .idmask = EXYNOS4_CPU_MASK,
91 .map_io = exynos4_map_io,
92 .init_clocks = exynos4_init_clocks,
93 .init_uarts = exynos4_init_uarts,
94 .init = exynos_init,
95 .name = name_exynos4412,
96 },
97};
98
99/* minimal IO mapping */
100
101static struct map_desc s5p_iodesc[] __initdata = {
102 {
103 .virtual = (unsigned long)S5P_VA_CHIPID,
104 .pfn = __phys_to_pfn(S5P_PA_CHIPID),
105 .length = SZ_4K,
106 .type = MT_DEVICE,
107 }, {
108 .virtual = (unsigned long)S3C_VA_SYS,
109 .pfn = __phys_to_pfn(S5P_PA_SYSCON),
110 .length = SZ_64K,
111 .type = MT_DEVICE,
112 }, {
113 .virtual = (unsigned long)S3C_VA_TIMER,
114 .pfn = __phys_to_pfn(S5P_PA_TIMER),
115 .length = SZ_16K,
116 .type = MT_DEVICE,
117 }, {
118 .virtual = (unsigned long)S3C_VA_WATCHDOG,
119 .pfn = __phys_to_pfn(S3C_PA_WDT),
120 .length = SZ_4K,
121 .type = MT_DEVICE,
122 }, {
123 .virtual = (unsigned long)S5P_VA_SROMC,
124 .pfn = __phys_to_pfn(S5P_PA_SROMC),
125 .length = SZ_4K,
126 .type = MT_DEVICE,
127 },
128};
129
130/* read cpu identification code */
131
132void __init s5p_init_io(struct map_desc *mach_desc,
133 int size, void __iomem *cpuid_addr)
134{
135 /* initialize the io descriptors we need for initialization */
136 iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc));
137 if (mach_desc)
138 iotable_init(mach_desc, size);
139
140 /* detect cpu id and rev. */
141 s5p_init_cpu(cpuid_addr);
142
143 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
144}
diff --git a/arch/arm/plat-samsung/dev-backlight.c b/arch/arm/plat-samsung/dev-backlight.c
index e657305644cc..a976c023b286 100644
--- a/arch/arm/plat-samsung/dev-backlight.c
+++ b/arch/arm/plat-samsung/dev-backlight.c
@@ -15,7 +15,6 @@
15#include <linux/slab.h> 15#include <linux/slab.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/pwm_backlight.h> 17#include <linux/pwm_backlight.h>
18#include <linux/slab.h>
19 18
20#include <plat/devs.h> 19#include <plat/devs.h>
21#include <plat/gpio-cfg.h> 20#include <plat/gpio-cfg.h>
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index 40fd7b6b5e66..258d9d8a94f2 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -152,13 +152,9 @@ extern void s3c_init_cpu(unsigned long idcode,
152/* core initialisation functions */ 152/* core initialisation functions */
153 153
154extern void s3c24xx_init_irq(void); 154extern void s3c24xx_init_irq(void);
155extern void s3c64xx_init_irq(u32 vic0, u32 vic1);
156extern void s5p_init_irq(u32 *vic, u32 num_vic); 155extern void s5p_init_irq(u32 *vic, u32 num_vic);
157 156
158extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); 157extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
159extern void s3c64xx_init_io(struct map_desc *mach_desc, int size);
160extern void s5p_init_io(struct map_desc *mach_desc,
161 int size, void __iomem *cpuid_addr);
162 158
163extern void s3c24xx_init_cpu(void); 159extern void s3c24xx_init_cpu(void);
164extern void s3c64xx_init_cpu(void); 160extern void s3c64xx_init_cpu(void);
@@ -183,7 +179,6 @@ extern struct syscore_ops s3c2410_pm_syscore_ops;
183extern struct syscore_ops s3c2412_pm_syscore_ops; 179extern struct syscore_ops s3c2412_pm_syscore_ops;
184extern struct syscore_ops s3c2416_pm_syscore_ops; 180extern struct syscore_ops s3c2416_pm_syscore_ops;
185extern struct syscore_ops s3c244x_pm_syscore_ops; 181extern struct syscore_ops s3c244x_pm_syscore_ops;
186extern struct syscore_ops s3c64xx_irq_syscore_ops;
187 182
188/* system device classes */ 183/* system device classes */
189 184
@@ -195,7 +190,6 @@ extern struct sysdev_class s3c2440_sysclass;
195extern struct sysdev_class s3c2442_sysclass; 190extern struct sysdev_class s3c2442_sysclass;
196extern struct sysdev_class s3c2443_sysclass; 191extern struct sysdev_class s3c2443_sysclass;
197extern struct sysdev_class s3c6410_sysclass; 192extern struct sysdev_class s3c6410_sysclass;
198extern struct sysdev_class s3c64xx_sysclass;
199extern struct sysdev_class s5p64x0_sysclass; 193extern struct sysdev_class s5p64x0_sysclass;
200extern struct sysdev_class s5pv210_sysclass; 194extern struct sysdev_class s5pv210_sysclass;
201extern struct sysdev_class exynos4_sysclass; 195extern struct sysdev_class exynos4_sysclass;
diff --git a/arch/arm/plat-samsung/include/plat/exynos4.h b/arch/arm/plat-samsung/include/plat/exynos4.h
deleted file mode 100644
index f546e88ebc94..000000000000
--- a/arch/arm/plat-samsung/include/plat/exynos4.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/exynos4.h
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Header file for exynos4 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* Common init code for EXYNOS4 related SoCs */
14
15extern void exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
16extern void exynos4_register_clocks(void);
17extern void exynos4210_register_clocks(void);
18extern void exynos4212_register_clocks(void);
19extern void exynos4_setup_clocks(void);
20
21#ifdef CONFIG_ARCH_EXYNOS
22extern int exynos_init(void);
23extern void exynos4_init_irq(void);
24extern void exynos4_map_io(void);
25extern void exynos4_init_clocks(int xtal);
26extern struct sys_timer exynos4_timer;
27
28#define exynos4_init_uarts exynos4_common_init_uarts
29
30#else
31#define exynos4_init_clocks NULL
32#define exynos4_init_uarts NULL
33#define exynos4_map_io NULL
34#define exynos_init NULL
35#endif
diff --git a/arch/arm/plat-samsung/include/plat/reset.h b/arch/arm/plat-samsung/include/plat/reset.h
deleted file mode 100644
index 32ca5179c6e1..000000000000
--- a/arch/arm/plat-samsung/include/plat/reset.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/reset.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#ifndef __PLAT_SAMSUNG_RESET_H
12#define __PLAT_SAMSUNG_RESET_H __FILE__
13
14extern void (*s5p_reset_hook)(void);
15
16#endif /* __PLAT_SAMSUNG_RESET_H */
diff --git a/arch/arm/plat-samsung/include/plat/s3c2412.h b/arch/arm/plat-samsung/include/plat/s3c2412.h
index 5bcfd143ba16..cbae50ddacc8 100644
--- a/arch/arm/plat-samsung/include/plat/s3c2412.h
+++ b/arch/arm/plat-samsung/include/plat/s3c2412.h
@@ -21,9 +21,12 @@ extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no);
21extern void s3c2412_init_clocks(int xtal); 21extern void s3c2412_init_clocks(int xtal);
22 22
23extern int s3c2412_baseclk_add(void); 23extern int s3c2412_baseclk_add(void);
24
25extern void s3c2412_restart(char mode, const char *cmd);
24#else 26#else
25#define s3c2412_init_clocks NULL 27#define s3c2412_init_clocks NULL
26#define s3c2412_init_uarts NULL 28#define s3c2412_init_uarts NULL
27#define s3c2412_map_io NULL 29#define s3c2412_map_io NULL
28#define s3c2412_init NULL 30#define s3c2412_init NULL
31#define s3c2412_restart NULL
29#endif 32#endif
diff --git a/arch/arm/plat-samsung/include/plat/s3c2416.h b/arch/arm/plat-samsung/include/plat/s3c2416.h
index a764f8503f52..de2b5bdc5ebd 100644
--- a/arch/arm/plat-samsung/include/plat/s3c2416.h
+++ b/arch/arm/plat-samsung/include/plat/s3c2416.h
@@ -23,9 +23,11 @@ extern void s3c2416_init_clocks(int xtal);
23 23
24extern int s3c2416_baseclk_add(void); 24extern int s3c2416_baseclk_add(void);
25 25
26extern void s3c2416_restart(char mode, const char *cmd);
26#else 27#else
27#define s3c2416_init_clocks NULL 28#define s3c2416_init_clocks NULL
28#define s3c2416_init_uarts NULL 29#define s3c2416_init_uarts NULL
29#define s3c2416_map_io NULL 30#define s3c2416_map_io NULL
30#define s3c2416_init NULL 31#define s3c2416_init NULL
32#define s3c2416_restart NULL
31#endif 33#endif
diff --git a/arch/arm/plat-samsung/include/plat/s3c2443.h b/arch/arm/plat-samsung/include/plat/s3c2443.h
index 7fae1a050694..dce05b43d51c 100644
--- a/arch/arm/plat-samsung/include/plat/s3c2443.h
+++ b/arch/arm/plat-samsung/include/plat/s3c2443.h
@@ -24,11 +24,13 @@ extern void s3c2443_init_clocks(int xtal);
24 24
25extern int s3c2443_baseclk_add(void); 25extern int s3c2443_baseclk_add(void);
26 26
27extern void s3c2443_restart(char mode, const char *cmd);
27#else 28#else
28#define s3c2443_init_clocks NULL 29#define s3c2443_init_clocks NULL
29#define s3c2443_init_uarts NULL 30#define s3c2443_init_uarts NULL
30#define s3c2443_map_io NULL 31#define s3c2443_map_io NULL
31#define s3c2443_init NULL 32#define s3c2443_init NULL
33#define s3c2443_restart NULL
32#endif 34#endif
33 35
34/* common code used by s3c2443 and others. 36/* common code used by s3c2443 and others.
diff --git a/arch/arm/plat-samsung/include/plat/s3c6400.h b/arch/arm/plat-samsung/include/plat/s3c6400.h
deleted file mode 100644
index 37d428aaaebb..000000000000
--- a/arch/arm/plat-samsung/include/plat/s3c6400.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/s3c6400.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * Header file for s3c6400 cpu support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15/* Common init code for S3C6400 related SoCs */
16
17extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
18extern void s3c6400_setup_clocks(void);
19
20extern void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit);
21
22#ifdef CONFIG_CPU_S3C6400
23
24extern int s3c6400_init(void);
25extern void s3c6400_init_irq(void);
26extern void s3c6400_map_io(void);
27extern void s3c6400_init_clocks(int xtal);
28
29#define s3c6400_init_uarts s3c6400_common_init_uarts
30
31#else
32#define s3c6400_init_clocks NULL
33#define s3c6400_init_uarts NULL
34#define s3c6400_map_io NULL
35#define s3c6400_init NULL
36#endif
diff --git a/arch/arm/plat-samsung/include/plat/s3c6410.h b/arch/arm/plat-samsung/include/plat/s3c6410.h
deleted file mode 100644
index 20a6675b9d17..000000000000
--- a/arch/arm/plat-samsung/include/plat/s3c6410.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/s3c6410.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * Header file for s3c6410 cpu support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifdef CONFIG_CPU_S3C6410
16
17extern int s3c6410_init(void);
18extern void s3c6410_init_irq(void);
19extern void s3c6410_map_io(void);
20extern void s3c6410_init_clocks(int xtal);
21
22#define s3c6410_init_uarts s3c6400_common_init_uarts
23
24#else
25#define s3c6410_init_clocks NULL
26#define s3c6410_init_uarts NULL
27#define s3c6410_map_io NULL
28#define s3c6410_init NULL
29#endif
diff --git a/arch/arm/plat-samsung/include/plat/s5p6440.h b/arch/arm/plat-samsung/include/plat/s5p6440.h
deleted file mode 100644
index bf85ebbb4fbc..000000000000
--- a/arch/arm/plat-samsung/include/plat/s5p6440.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/s5p6440.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5p6440 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13 /* Common init code for S5P6440 related SoCs */
14
15extern void s5p6440_register_clocks(void);
16extern void s5p6440_setup_clocks(void);
17
18#ifdef CONFIG_CPU_S5P6440
19
20extern int s5p64x0_init(void);
21extern void s5p6440_init_irq(void);
22extern void s5p6440_map_io(void);
23extern void s5p6440_init_clocks(int xtal);
24
25extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no);
26
27#else
28#define s5p6440_init_clocks NULL
29#define s5p6440_init_uarts NULL
30#define s5p6440_map_io NULL
31#define s5p64x0_init NULL
32#endif
33
34/* S5P6440 timer */
35
36extern struct sys_timer s5p6440_timer;
diff --git a/arch/arm/plat-samsung/include/plat/s5p6450.h b/arch/arm/plat-samsung/include/plat/s5p6450.h
deleted file mode 100644
index da25f9a1c54a..000000000000
--- a/arch/arm/plat-samsung/include/plat/s5p6450.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/s5p6450.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Header file for s5p6450 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* Common init code for S5P6450 related SoCs */
14
15extern void s5p6450_register_clocks(void);
16extern void s5p6450_setup_clocks(void);
17
18#ifdef CONFIG_CPU_S5P6450
19
20extern int s5p64x0_init(void);
21extern void s5p6450_init_irq(void);
22extern void s5p6450_map_io(void);
23extern void s5p6450_init_clocks(int xtal);
24
25extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no);
26
27#else
28#define s5p6450_init_clocks NULL
29#define s5p6450_init_uarts NULL
30#define s5p6450_map_io NULL
31#define s5p64x0_init NULL
32#endif
33
34/* S5P6450 timer */
35
36extern struct sys_timer s5p6450_timer;
diff --git a/arch/arm/plat-samsung/include/plat/s5pc100.h b/arch/arm/plat-samsung/include/plat/s5pc100.h
deleted file mode 100644
index 9a21aeaaf452..000000000000
--- a/arch/arm/plat-samsung/include/plat/s5pc100.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/s5pc100.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5pc100 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* Common init code for S5PC100 related SoCs */
14
15extern void s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
16extern void s5pc100_register_clocks(void);
17extern void s5pc100_setup_clocks(void);
18
19#ifdef CONFIG_CPU_S5PC100
20
21extern int s5pc100_init(void);
22extern void s5pc100_init_irq(void);
23extern void s5pc100_map_io(void);
24extern void s5pc100_init_clocks(int xtal);
25
26#define s5pc100_init_uarts s5pc100_common_init_uarts
27
28#else
29#define s5pc100_init_clocks NULL
30#define s5pc100_init_uarts NULL
31#define s5pc100_map_io NULL
32#define s5pc100_init NULL
33#endif
diff --git a/arch/arm/plat-samsung/include/plat/s5pv210.h b/arch/arm/plat-samsung/include/plat/s5pv210.h
deleted file mode 100644
index b4bc6be77072..000000000000
--- a/arch/arm/plat-samsung/include/plat/s5pv210.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/s5pv210.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5pv210 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* Common init code for S5PV210 related SoCs */
14
15extern void s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
16extern void s5pv210_register_clocks(void);
17extern void s5pv210_setup_clocks(void);
18
19#ifdef CONFIG_CPU_S5PV210
20
21extern int s5pv210_init(void);
22extern void s5pv210_init_irq(void);
23extern void s5pv210_map_io(void);
24extern void s5pv210_init_clocks(int xtal);
25
26#define s5pv210_init_uarts s5pv210_common_init_uarts
27
28#else
29#define s5pv210_init_clocks NULL
30#define s5pv210_init_uarts NULL
31#define s5pv210_map_io NULL
32#define s5pv210_init NULL
33#endif
diff --git a/arch/arm/plat-samsung/include/plat/system-reset.h b/arch/arm/plat-samsung/include/plat/system-reset.h
deleted file mode 100644
index a448e990964d..000000000000
--- a/arch/arm/plat-samsung/include/plat/system-reset.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/system-reset.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Based on arch/arm/mach-s3c2410/include/mach/system-reset.h
7 *
8 * S5P - System define for arch_reset()
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <plat/watchdog-reset.h>
16
17void (*s5p_reset_hook)(void);
18
19static void arch_reset(char mode, const char *cmd)
20{
21 /* SWRESET support in s5p_reset_hook() */
22
23 if (s5p_reset_hook)
24 s5p_reset_hook();
25
26 /* Perform reset using Watchdog reset
27 * if there is no s5p_reset_hook()
28 */
29
30 arch_wdt_reset();
31}
diff --git a/arch/arm/plat-samsung/include/plat/watchdog-reset.h b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
index 40dbb2b0ae22..f19aff19205c 100644
--- a/arch/arm/plat-samsung/include/plat/watchdog-reset.h
+++ b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
@@ -17,6 +17,7 @@
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/delay.h>
20 21
21static inline void arch_wdt_reset(void) 22static inline void arch_wdt_reset(void)
22{ 23{
diff --git a/arch/arm/plat-spear/Makefile b/arch/arm/plat-spear/Makefile
index b4f340b8f1f1..e0f2e5b9530c 100644
--- a/arch/arm/plat-spear/Makefile
+++ b/arch/arm/plat-spear/Makefile
@@ -3,6 +3,6 @@
3# 3#
4 4
5# Common support 5# Common support
6obj-y := clock.o time.o 6obj-y := clock.o restart.o time.o
7 7
8obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o padmux.o 8obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o padmux.o
diff --git a/arch/arm/plat-spear/include/plat/system.h b/arch/arm/plat-spear/include/plat/system.h
index 1171f228d718..86c6f83b44cc 100644
--- a/arch/arm/plat-spear/include/plat/system.h
+++ b/arch/arm/plat-spear/include/plat/system.h
@@ -14,10 +14,6 @@
14#ifndef __PLAT_SYSTEM_H 14#ifndef __PLAT_SYSTEM_H
15#define __PLAT_SYSTEM_H 15#define __PLAT_SYSTEM_H
16 16
17#include <linux/io.h>
18#include <asm/hardware/sp810.h>
19#include <mach/hardware.h>
20
21static inline void arch_idle(void) 17static inline void arch_idle(void)
22{ 18{
23 /* 19 /*
@@ -27,15 +23,4 @@ static inline void arch_idle(void)
27 cpu_do_idle(); 23 cpu_do_idle();
28} 24}
29 25
30static inline void arch_reset(char mode, const char *cmd)
31{
32 if (mode == 's') {
33 /* software reset, Jump into ROM at address 0 */
34 soft_restart(0);
35 } else {
36 /* hardware reset, Use on-chip reset capability */
37 sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE);
38 }
39}
40
41#endif /* __PLAT_SYSTEM_H */ 26#endif /* __PLAT_SYSTEM_H */
diff --git a/arch/arm/plat-spear/restart.c b/arch/arm/plat-spear/restart.c
new file mode 100644
index 000000000000..2b4e3d82957c
--- /dev/null
+++ b/arch/arm/plat-spear/restart.c
@@ -0,0 +1,27 @@
1/*
2 * arch/arm/plat-spear/restart.c
3 *
4 * SPEAr platform specific restart functions
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13#include <linux/io.h>
14#include <asm/hardware/sp810.h>
15#include <mach/hardware.h>
16#include <mach/generic.h>
17
18void spear_restart(char mode, const char *cmd)
19{
20 if (mode == 's') {
21 /* software reset, Jump into ROM at address 0 */
22 soft_restart(0);
23 } else {
24 /* hardware reset, Use on-chip reset capability */
25 sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE);
26 }
27}
diff --git a/arch/arm/plat-tcc/Kconfig b/arch/arm/plat-tcc/Kconfig
deleted file mode 100644
index 1bf499570f42..000000000000
--- a/arch/arm/plat-tcc/Kconfig
+++ /dev/null
@@ -1,20 +0,0 @@
1if ARCH_TCC_926
2
3menu "Telechips ARM926-based CPUs"
4
5choice
6 prompt "Telechips CPU type:"
7 default ARCH_TCC8K
8
9config ARCH_TCC8K
10 bool TCC8000
11 select USB_ARCH_HAS_OHCI
12 help
13 Support for Telechips TCC8000 systems
14
15endchoice
16
17source "arch/arm/mach-tcc8k/Kconfig"
18
19endmenu
20endif
diff --git a/arch/arm/plat-tcc/Makefile b/arch/arm/plat-tcc/Makefile
deleted file mode 100644
index eceabc869b8f..000000000000
--- a/arch/arm/plat-tcc/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
1# "Telechips Platform Common Modules"
2
3obj-y := clock.o system.o
diff --git a/arch/arm/plat-tcc/clock.c b/arch/arm/plat-tcc/clock.c
deleted file mode 100644
index f3ced10d5271..000000000000
--- a/arch/arm/plat-tcc/clock.c
+++ /dev/null
@@ -1,179 +0,0 @@
1/*
2 * Clock framework for Telechips SoCs
3 * Based on arch/arm/plat-mxc/clock.c
4 *
5 * Copyright (C) 2004 - 2005 Nokia corporation
6 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
7 * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
8 * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
9 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
10 * Copyright 2010 Hans J. Koch, hjk@linutronix.de
11 *
12 * Licensed under the terms of the GPL v2.
13 */
14
15#include <linux/clk.h>
16#include <linux/err.h>
17#include <linux/errno.h>
18#include <linux/module.h>
19#include <linux/mutex.h>
20#include <linux/string.h>
21
22#include <mach/clock.h>
23#include <mach/hardware.h>
24
25static DEFINE_MUTEX(clocks_mutex);
26
27/*-------------------------------------------------------------------------
28 * Standard clock functions defined in include/linux/clk.h
29 *-------------------------------------------------------------------------*/
30
31static void __clk_disable(struct clk *clk)
32{
33 BUG_ON(clk->refcount == 0);
34
35 if (!(--clk->refcount) && clk->disable) {
36 /* Unconditionally disable the clock in hardware */
37 clk->disable(clk);
38 /* recursively disable parents */
39 if (clk->parent)
40 __clk_disable(clk->parent);
41 }
42}
43
44static int __clk_enable(struct clk *clk)
45{
46 int ret = 0;
47
48 if (clk->refcount++ == 0 && clk->enable) {
49 if (clk->parent)
50 ret = __clk_enable(clk->parent);
51 if (ret)
52 return ret;
53 else
54 return clk->enable(clk);
55 }
56
57 return 0;
58}
59
60/* This function increments the reference count on the clock and enables the
61 * clock if not already enabled. The parent clock tree is recursively enabled
62 */
63int clk_enable(struct clk *clk)
64{
65 int ret = 0;
66
67 if (!clk)
68 return -EINVAL;
69
70 mutex_lock(&clocks_mutex);
71 ret = __clk_enable(clk);
72 mutex_unlock(&clocks_mutex);
73
74 return ret;
75}
76EXPORT_SYMBOL_GPL(clk_enable);
77
78/* This function decrements the reference count on the clock and disables
79 * the clock when reference count is 0. The parent clock tree is
80 * recursively disabled
81 */
82void clk_disable(struct clk *clk)
83{
84 if (!clk)
85 return;
86
87 mutex_lock(&clocks_mutex);
88 __clk_disable(clk);
89 mutex_unlock(&clocks_mutex);
90}
91EXPORT_SYMBOL_GPL(clk_disable);
92
93/* Retrieve the *current* clock rate. If the clock itself
94 * does not provide a special calculation routine, ask
95 * its parent and so on, until one is able to return
96 * a valid clock rate
97 */
98unsigned long clk_get_rate(struct clk *clk)
99{
100 if (!clk)
101 return 0UL;
102
103 if (clk->get_rate)
104 return clk->get_rate(clk);
105
106 return clk_get_rate(clk->parent);
107}
108EXPORT_SYMBOL_GPL(clk_get_rate);
109
110/* Round the requested clock rate to the nearest supported
111 * rate that is less than or equal to the requested rate.
112 * This is dependent on the clock's current parent.
113 */
114long clk_round_rate(struct clk *clk, unsigned long rate)
115{
116 if (!clk)
117 return 0;
118 if (!clk->round_rate)
119 return 0;
120
121 return clk->round_rate(clk, rate);
122}
123EXPORT_SYMBOL_GPL(clk_round_rate);
124
125/* Set the clock to the requested clock rate. The rate must
126 * match a supported rate exactly based on what clk_round_rate returns
127 */
128int clk_set_rate(struct clk *clk, unsigned long rate)
129{
130 int ret = -EINVAL;
131
132 if (!clk)
133 return ret;
134 if (!clk->set_rate || !rate)
135 return ret;
136
137 mutex_lock(&clocks_mutex);
138 ret = clk->set_rate(clk, rate);
139 mutex_unlock(&clocks_mutex);
140
141 return ret;
142}
143EXPORT_SYMBOL_GPL(clk_set_rate);
144
145/* Set the clock's parent to another clock source */
146int clk_set_parent(struct clk *clk, struct clk *parent)
147{
148 struct clk *old;
149 int ret = -EINVAL;
150
151 if (!clk)
152 return ret;
153 if (!clk->set_parent || !parent)
154 return ret;
155
156 mutex_lock(&clocks_mutex);
157 old = clk->parent;
158 if (clk->refcount)
159 __clk_enable(parent);
160 ret = clk->set_parent(clk, parent);
161 if (ret)
162 old = parent;
163 if (clk->refcount)
164 __clk_disable(old);
165 mutex_unlock(&clocks_mutex);
166
167 return ret;
168}
169EXPORT_SYMBOL_GPL(clk_set_parent);
170
171/* Retrieve the clock's parent clock source */
172struct clk *clk_get_parent(struct clk *clk)
173{
174 if (!clk)
175 return NULL;
176
177 return clk->parent;
178}
179EXPORT_SYMBOL_GPL(clk_get_parent);
diff --git a/arch/arm/plat-tcc/include/mach/clock.h b/arch/arm/plat-tcc/include/mach/clock.h
deleted file mode 100644
index a12f58ad71a8..000000000000
--- a/arch/arm/plat-tcc/include/mach/clock.h
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * Low level clock header file for Telechips TCC architecture
3 * (C) 2010 Hans J. Koch <hjk@linutronix.de>
4 *
5 * Licensed under the GPL v2.
6 */
7
8#ifndef __ASM_ARCH_TCC_CLOCK_H__
9#define __ASM_ARCH_TCC_CLOCK_H__
10
11#ifndef __ASSEMBLY__
12
13struct clk {
14 struct clk *parent;
15 /* id number of a root clock, 0 for normal clocks */
16 int root_id;
17 /* Reference count of clock enable/disable */
18 int refcount;
19 /* Address of associated BCLKCTRx register. Must be set. */
20 void __iomem *bclkctr;
21 /* Bit position for BCLKCTRx. Must be set. */
22 int bclk_shift;
23 /* Address of ACLKxxx register, if any. */
24 void __iomem *aclkreg;
25 /* get the current clock rate (always a fresh value) */
26 unsigned long (*get_rate) (struct clk *);
27 /* Function ptr to set the clock to a new rate. The rate must match a
28 supported rate returned from round_rate. Leave blank if clock is not
29 programmable */
30 int (*set_rate) (struct clk *, unsigned long);
31 /* Function ptr to round the requested clock rate to the nearest
32 supported rate that is less than or equal to the requested rate. */
33 unsigned long (*round_rate) (struct clk *, unsigned long);
34 /* Function ptr to enable the clock. Leave blank if clock can not
35 be gated. */
36 int (*enable) (struct clk *);
37 /* Function ptr to disable the clock. Leave blank if clock can not
38 be gated. */
39 void (*disable) (struct clk *);
40 /* Function ptr to set the parent clock of the clock. */
41 int (*set_parent) (struct clk *, struct clk *);
42};
43
44int clk_register(struct clk *clk);
45void clk_unregister(struct clk *clk);
46
47#endif /* __ASSEMBLY__ */
48#endif /* __ASM_ARCH_MXC_CLOCK_H__ */
diff --git a/arch/arm/plat-tcc/include/mach/debug-macro.S b/arch/arm/plat-tcc/include/mach/debug-macro.S
deleted file mode 100644
index cf17d04ec30d..000000000000
--- a/arch/arm/plat-tcc/include/mach/debug-macro.S
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * Copyright (C) 1994-1999 Russell King
3 * Copyright (C) 2008-2009 Telechips
4 * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12 .macro addruart, rp, rv, tmp
13 moveq \rp, #0x90000000 @ physical base address
14 movne \rv, #0xF1000000 @ virtual base
15 orr \rp, \rp, #0x00007000 @ UART0
16 orr \rv, \rv, #0x00007000 @ UART0
17 .endm
18
19 .macro senduart,rd,rx
20 strb \rd, [\rx, #0x44]
21 .endm
22
23 .macro waituart,rd,rx
24 .endm
25
26 .macro busyuart,rd,rx
271001:
28 ldr \rd, [\rx, #0x14]
29 tst \rd, #0x20
30
31 beq 1001b
32 .endm
diff --git a/arch/arm/plat-tcc/include/mach/entry-macro.S b/arch/arm/plat-tcc/include/mach/entry-macro.S
deleted file mode 100644
index 748f401e4b6d..000000000000
--- a/arch/arm/plat-tcc/include/mach/entry-macro.S
+++ /dev/null
@@ -1,68 +0,0 @@
1/*
2 * include/asm-arm/arch-tcc83x/entry-macro.S
3 *
4 * Author : <linux@telechips.com>
5 * Created: June 10, 2008
6 * Description: Low-level IRQ helper macros for Telechips-based platforms
7 *
8 * Copyright (C) 2008-2009 Telechips
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied.
13 */
14
15#include <mach/hardware.h>
16#include <mach/irqs.h>
17
18 .macro disable_fiq
19 .endm
20
21 .macro get_irqnr_preamble, base, tmp
22 .endm
23
24 .macro arch_ret_to_user, tmp1, tmp2
25 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28
29 ldr \base, =0xF2003000 @ base address of PIC registers
30
31 @@ read MREQ register of PIC0
32
33 mov \irqnr, #0
34 ldr \irqstat, [\base, #0x00000014 ] @ lower 32 interrupts
35 cmp \irqstat, #0
36 bne 1001f
37
38 @@ read MREQ register of PIC1
39
40 ldr \irqstat, [\base, #0x00000094] @ upper 32 interrupts
41 cmp \irqstat, #0
42 beq 1002f
43 mov \irqnr, #0x20
44
451001:
46 movs \tmp, \irqstat, lsl #16
47 movne \irqstat, \tmp
48 addeq \irqnr, \irqnr, #16
49
50 movs \tmp, \irqstat, lsl #8
51 movne \irqstat, \tmp
52 addeq \irqnr, \irqnr, #8
53
54 movs \tmp, \irqstat, lsl #4
55 movne \irqstat, \tmp
56 addeq \irqnr, \irqnr, #4
57
58 movs \tmp, \irqstat, lsl #2
59 movne \irqstat, \tmp
60 addeq \irqnr, \irqnr, #2
61
62 movs \tmp, \irqstat, lsl #1
63 addeq \irqnr, \irqnr, #1
64 orrs \base, \base, #1
651002:
66 @@ exit here, Z flag unset if IRQ
67
68 .endm
diff --git a/arch/arm/plat-tcc/include/mach/hardware.h b/arch/arm/plat-tcc/include/mach/hardware.h
deleted file mode 100644
index e70d126ccaf3..000000000000
--- a/arch/arm/plat-tcc/include/mach/hardware.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * Author: RidgeRun, Inc. Greg Lonnon <glonnon@ridgerun.com>
3 * Reorganized for Linux-2.6 by Tony Lindgren <tony@atomide.com>
4 * and Dirk Behme <dirk.behme@de.bosch.com>
5 * Rewritten by: <linux@telechips.com>
6 * Description: Hardware definitions for TCC8300 processors and boards
7 *
8 * Copyright (C) 2001 RidgeRun, Inc.
9 * Copyright (C) 2008-2009 Telechips
10 *
11 * Modifications for mainline (C) 2009 Hans J. Koch <hjk@linutronix.de>
12 *
13 * Licensed under the terms of the GNU Pulic License version 2.
14 */
15
16#ifndef __ASM_ARCH_TCC_HARDWARE_H
17#define __ASM_ARCH_TCC_HARDWARE_H
18
19#include <asm/sizes.h>
20#ifndef __ASSEMBLER__
21#include <asm/types.h>
22#endif
23#include <mach/io.h>
24
25/*
26 * ----------------------------------------------------------------------------
27 * Clocks
28 * ----------------------------------------------------------------------------
29 */
30#define CLKGEN_REG_BASE 0xfffece00
31#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0)
32#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4)
33#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8)
34#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC)
35#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10)
36#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14)
37#define ARM_SYSST (CLKGEN_REG_BASE + 0x18)
38#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24)
39
40/* DPLL control registers */
41#define DPLL_CTL 0xfffecf00
42
43#endif /* __ASM_ARCH_TCC_HARDWARE_H */
diff --git a/arch/arm/plat-tcc/include/mach/io.h b/arch/arm/plat-tcc/include/mach/io.h
deleted file mode 100644
index 3e911d3ea0f1..000000000000
--- a/arch/arm/plat-tcc/include/mach/io.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * IO definitions for TCC8000 processors and boards
3 *
4 * Copyright (C) 1997-1999 Russell King
5 * Copyright (C) 2008-2009 Telechips
6 * Copyright (C) 2010 Hans J. Koch <hjk@linutronix.de>
7 *
8 * Licensed under the terms of the GNU Public License version 2.
9 */
10
11#ifndef __ASM_ARM_ARCH_IO_H
12#define __ASM_ARM_ARCH_IO_H
13
14#define IO_SPACE_LIMIT 0xffffffff
15
16/*
17 * We don't actually have real ISA nor PCI buses, but there is so many
18 * drivers out there that might just work if we fake them...
19 */
20#define __io(a) __typesafe_io(a)
21#define __mem_pci(a) (a)
22
23#endif
diff --git a/arch/arm/plat-tcc/include/mach/irqs.h b/arch/arm/plat-tcc/include/mach/irqs.h
deleted file mode 100644
index da863894d498..000000000000
--- a/arch/arm/plat-tcc/include/mach/irqs.h
+++ /dev/null
@@ -1,83 +0,0 @@
1/*
2 * IRQ definitions for TCC8xxx
3 *
4 * Copyright (C) 2008-2009 Telechips
5 * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
6 *
7 * Licensed under the terms of the GPL v2.
8 *
9 */
10
11#ifndef __ASM_ARCH_TCC_IRQS_H
12#define __ASM_ARCH_TCC_IRQS_H
13
14#define NR_IRQS 64
15
16/* PIC0 interrupts */
17#define INT_ADMA1 0
18#define INT_BDMA 1
19#define INT_ADMA0 2
20#define INT_GDMA1 3
21#define INT_I2S0RX 4
22#define INT_I2S0TX 5
23#define INT_TC 6
24#define INT_UART0 7
25#define INT_USBD 8
26#define INT_SPI0TX 9
27#define INT_UDMA 10
28#define INT_LIRQ 11
29#define INT_GDMA2 12
30#define INT_GDMA0 13
31#define INT_TC32 14
32#define INT_LCD 15
33#define INT_ADC 16
34#define INT_I2C 17
35#define INT_RTCP 18
36#define INT_RTCA 19
37#define INT_NFC 20
38#define INT_SD0 21
39#define INT_GSB0 22
40#define INT_PK 23
41#define INT_USBH0 24
42#define INT_USBH1 25
43#define INT_G2D 26
44#define INT_ECC 27
45#define INT_SPI0RX 28
46#define INT_UART1 29
47#define INT_MSCL 30
48#define INT_GSB1 31
49/* PIC1 interrupts */
50#define INT_E0 32
51#define INT_E1 33
52#define INT_E2 34
53#define INT_E3 35
54#define INT_E4 36
55#define INT_E5 37
56#define INT_E6 38
57#define INT_E7 39
58#define INT_UART2 40
59#define INT_UART3 41
60#define INT_SPI1TX 42
61#define INT_SPI1RX 43
62#define INT_GSB2 44
63#define INT_SPDIF 45
64#define INT_CDIF 46
65#define INT_VBON 47
66#define INT_VBOFF 48
67#define INT_SD1 49
68#define INT_UART4 50
69#define INT_GDMA3 51
70#define INT_I2S1RX 52
71#define INT_I2S1TX 53
72#define INT_CAN0 54
73#define INT_CAN1 55
74#define INT_GSB3 56
75#define INT_KRST 57
76#define INT_UNUSED 58
77#define INT_SD0D3 59
78#define INT_SD1D3 60
79#define INT_GPS0 61
80#define INT_GPS1 62
81#define INT_GPS2 63
82
83#endif /* ASM_ARCH_TCC_IRQS_H */
diff --git a/arch/arm/plat-tcc/include/mach/system.h b/arch/arm/plat-tcc/include/mach/system.h
deleted file mode 100644
index 909e6035d843..000000000000
--- a/arch/arm/plat-tcc/include/mach/system.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * Author: <linux@telechips.com>
3 * Created: June 10, 2008
4 * Description: LINUX SYSTEM FUNCTIONS for TCC83x
5 *
6 * Copyright (C) 2008-2009 Telechips
7 *
8 * Licensed under the terms of the GPL v2.
9 *
10 */
11
12#ifndef __ASM_ARCH_SYSTEM_H
13#define __ASM_ARCH_SYSTEM_H
14#include <linux/clk.h>
15
16#include <asm/mach-types.h>
17#include <mach/hardware.h>
18
19extern void plat_tcc_reboot(void);
20
21static inline void arch_idle(void)
22{
23 cpu_do_idle();
24}
25
26static inline void arch_reset(char mode, const char *cmd)
27{
28 plat_tcc_reboot();
29}
30
31#endif
diff --git a/arch/arm/plat-tcc/include/mach/tcc8k-regs.h b/arch/arm/plat-tcc/include/mach/tcc8k-regs.h
deleted file mode 100644
index 1d9428295332..000000000000
--- a/arch/arm/plat-tcc/include/mach/tcc8k-regs.h
+++ /dev/null
@@ -1,807 +0,0 @@
1/*
2 * Telechips TCC8000 register definitions
3 *
4 * (C) 2009 Hans J. Koch <hjk@linutronix.de>
5 *
6 * Licensed under the terms of the GPLv2.
7 */
8
9#ifndef TCC8K_REGS_H
10#define TCC8K_REGS_H
11
12#include <linux/types.h>
13
14#define EXT_SDRAM_BASE 0x20000000
15#define INT_SRAM_BASE 0x30000000
16#define INT_SRAM_SIZE SZ_32K
17#define CS0_BASE 0x40000000
18#define CS1_BASE 0x50000000
19#define CS1_SIZE SZ_64K
20#define CS2_BASE 0x60000000
21#define CS3_BASE 0x70000000
22#define AHB_PERI_BASE 0x80000000
23#define AHB_PERI_SIZE SZ_64K
24#define APB0_PERI_BASE 0x90000000
25#define APB0_PERI_SIZE SZ_128K
26#define APB1_PERI_BASE 0x98000000
27#define APB1_PERI_SIZE SZ_128K
28#define DATA_TCM_BASE 0xa0000000
29#define DATA_TCM_SIZE SZ_8K
30#define EXT_MEM_CTRL_BASE 0xf0000000
31#define EXT_MEM_CTRL_SIZE SZ_4K
32
33#define CS1_BASE_VIRT (void __iomem *)0xf7000000
34#define AHB_PERI_BASE_VIRT (void __iomem *)0xf4000000
35#define APB0_PERI_BASE_VIRT (void __iomem *)0xf1000000
36#define APB1_PERI_BASE_VIRT (void __iomem *)0xf2000000
37#define EXT_MEM_CTRL_BASE_VIRT (void __iomem *)0xf3000000
38#define INT_SRAM_BASE_VIRT (void __iomem *)0xf5000000
39#define DATA_TCM_BASE_VIRT (void __iomem *)0xf6000000
40
41#define __REG(x) (*((volatile u32 *)(x)))
42
43/* USB Device Controller Registers */
44#define UDC_BASE (AHB_PERI_BASE_VIRT + 0x8000)
45#define UDC_BASE_PHYS (AHB_PERI_BASE + 0x8000)
46
47#define UDC_IR_OFFS 0x00
48#define UDC_EIR_OFFS 0x04
49#define UDC_EIER_OFFS 0x08
50#define UDC_FAR_OFFS 0x0c
51#define UDC_FNR_OFFS 0x10
52#define UDC_EDR_OFFS 0x14
53#define UDC_RT_OFFS 0x18
54#define UDC_SSR_OFFS 0x1c
55#define UDC_SCR_OFFS 0x20
56#define UDC_EP0SR_OFFS 0x24
57#define UDC_EP0CR_OFFS 0x28
58
59#define UDC_ESR_OFFS 0x2c
60#define UDC_ECR_OFFS 0x30
61#define UDC_BRCR_OFFS 0x34
62#define UDC_BWCR_OFFS 0x38
63#define UDC_MPR_OFFS 0x3c
64#define UDC_DCR_OFFS 0x40
65#define UDC_DTCR_OFFS 0x44
66#define UDC_DFCR_OFFS 0x48
67#define UDC_DTTCR1_OFFS 0x4c
68#define UDC_DTTCR2_OFFS 0x50
69#define UDC_ESR2_OFFS 0x54
70
71#define UDC_SCR2_OFFS 0x58
72#define UDC_EP0BUF_OFFS 0x60
73#define UDC_EP1BUF_OFFS 0x64
74#define UDC_EP2BUF_OFFS 0x68
75#define UDC_EP3BUF_OFFS 0x6c
76#define UDC_PLICR_OFFS 0xa0
77#define UDC_PCR_OFFS 0xa4
78
79#define UDC_UPCR0_OFFS 0xc8
80#define UDC_UPCR1_OFFS 0xcc
81#define UDC_UPCR2_OFFS 0xd0
82#define UDC_UPCR3_OFFS 0xd4
83
84/* Bits in UDC_EIR */
85#define UDC_EIR_EP0I (1 << 0)
86#define UDC_EIR_EP1I (1 << 1)
87#define UDC_EIR_EP2I (1 << 2)
88#define UDC_EIR_EP3I (1 << 3)
89#define UDC_EIR_EPI_MASK 0x0f
90
91/* Bits in UDC_EIER */
92#define UDC_EIER_EP0IE (1 << 0)
93#define UDC_EIER_EP1IE (1 << 1)
94#define UDC_EIER_EP2IE (1 << 2)
95#define UDC_EIER_EP3IE (1 << 3)
96
97/* Bits in UDC_FNR */
98#define UDC_FNR_FN_MASK 0x7ff
99#define UDC_FNR_SM (1 << 13)
100#define UDC_FNR_FTL (1 << 14)
101
102/* Bits in UDC_SSR */
103#define UDC_SSR_HFRES (1 << 0)
104#define UDC_SSR_HFSUSP (1 << 1)
105#define UDC_SSR_HFRM (1 << 2)
106#define UDC_SSR_SDE (1 << 3)
107#define UDC_SSR_HSP (1 << 4)
108#define UDC_SSR_DM (1 << 5)
109#define UDC_SSR_DP (1 << 6)
110#define UDC_SSR_TBM (1 << 7)
111#define UDC_SSR_VBON (1 << 8)
112#define UDC_SSR_VBOFF (1 << 9)
113#define UDC_SSR_EOERR (1 << 10)
114#define UDC_SSR_DCERR (1 << 11)
115#define UDC_SSR_TCERR (1 << 12)
116#define UDC_SSR_BSERR (1 << 13)
117#define UDC_SSR_TMERR (1 << 14)
118#define UDC_SSR_BAERR (1 << 15)
119
120/* Bits in UDC_SCR */
121#define UDC_SCR_HRESE (1 << 0)
122#define UDC_SCR_HSSPE (1 << 1)
123#define UDC_SCR_RRDE (1 << 5)
124#define UDC_SCR_SPDEN (1 << 6)
125#define UDC_SCR_DIEN (1 << 12)
126
127/* Bits in UDC_EP0SR */
128#define UDC_EP0SR_RSR (1 << 0)
129#define UDC_EP0SR_TST (1 << 1)
130#define UDC_EP0SR_SHT (1 << 4)
131#define UDC_EP0SR_LWO (1 << 6)
132
133/* Bits in UDC_EP0CR */
134#define UDC_EP0CR_ESS (1 << 1)
135
136/* Bits in UDC_ESR */
137#define UDC_ESR_RPS (1 << 0)
138#define UDC_ESR_TPS (1 << 1)
139#define UDC_ESR_LWO (1 << 4)
140#define UDC_ESR_FFS (1 << 6)
141
142/* Bits in UDC_ECR */
143#define UDC_ECR_ESS (1 << 1)
144#define UDC_ECR_CDP (1 << 2)
145
146#define UDC_ECR_FLUSH (1 << 6)
147#define UDC_ECR_DUEN (1 << 7)
148
149/* Bits in UDC_UPCR0 */
150#define UDC_UPCR0_VBD (1 << 1)
151#define UDC_UPCR0_VBDS (1 << 6)
152#define UDC_UPCR0_RCD_12 (0x0 << 9)
153#define UDC_UPCR0_RCD_24 (0x1 << 9)
154#define UDC_UPCR0_RCD_48 (0x2 << 9)
155#define UDC_UPCR0_RCS_EXT (0x1 << 11)
156#define UDC_UPCR0_RCS_XTAL (0x0 << 11)
157
158/* Bits in UDC_UPCR1 */
159#define UDC_UPCR1_CDT(x) ((x) << 0)
160#define UDC_UPCR1_OTGT(x) ((x) << 3)
161#define UDC_UPCR1_SQRXT(x) ((x) << 8)
162#define UDC_UPCR1_TXFSLST(x) ((x) << 12)
163
164/* Bits in UDC_UPCR2 */
165#define UDC_UPCR2_TP (1 << 0)
166#define UDC_UPCR2_TXRT(x) ((x) << 2)
167#define UDC_UPCR2_TXVRT(x) ((x) << 5)
168#define UDC_UPCR2_OPMODE(x) ((x) << 9)
169#define UDC_UPCR2_XCVRSEL(x) ((x) << 12)
170#define UDC_UPCR2_TM (1 << 14)
171
172/* USB Host Controller registers */
173#define USBH0_BASE (AHB_PERI_BASE_VIRT + 0xb000)
174#define USBH1_BASE (AHB_PERI_BASE_VIRT + 0xb800)
175
176#define OHCI_INT_ENABLE_OFFS 0x10
177
178#define RH_DESCRIPTOR_A_OFFS 0x48
179#define RH_DESCRIPTOR_B_OFFS 0x4c
180
181#define USBHTCFG0_OFFS 0x100
182#define USBHHCFG0_OFFS 0x104
183#define USBHHCFG1_OFFS 0x104
184
185/* DMA controller registers */
186#define DMAC0_BASE (AHB_PERI_BASE + 0x4000)
187#define DMAC1_BASE (AHB_PERI_BASE + 0xa000)
188#define DMAC2_BASE (AHB_PERI_BASE + 0x4800)
189#define DMAC3_BASE (AHB_PERI_BASE + 0xa800)
190
191#define DMAC_CH_OFFSET(ch) (ch * 0x30)
192
193#define ST_SADR_OFFS 0x00
194#define SPARAM_OFFS 0x04
195#define C_SADR_OFFS 0x0c
196#define ST_DADR_OFFS 0x10
197#define DPARAM_OFFS 0x14
198#define C_DADR_OFFS 0x1c
199#define HCOUNT_OFFS 0x20
200#define CHCTRL_OFFS 0x24
201#define RPTCTRL_OFFS 0x28
202#define EXTREQ_A_OFFS 0x2c
203
204/* Bits in CHCTRL register */
205#define CHCTRL_EN (1 << 0)
206
207#define CHCTRL_IEN (1 << 2)
208#define CHCTRL_FLAG (1 << 3)
209#define CHCTRL_WSIZE8 (0 << 4)
210#define CHCTRL_WSIZE16 (1 << 4)
211#define CHCTRL_WSIZE32 (2 << 4)
212
213#define CHCTRL_BSIZE1 (0 << 6)
214#define CHCTRL_BSIZE2 (1 << 6)
215#define CHCTRL_BSIZE4 (2 << 6)
216#define CHCTRL_BSIZE8 (3 << 6)
217
218#define CHCTRL_TYPE_SINGLE_E (0 << 8)
219#define CHCTRL_TYPE_HW (1 << 8)
220#define CHCTRL_TYPE_SW (2 << 8)
221#define CHCTRL_TYPE_SINGLE_L (3 << 8)
222
223#define CHCTRL_BST (1 << 10)
224
225/* Use DMA controller 0, channel 2 for USB */
226#define USB_DMA_BASE (DMAC0_BASE + DMAC_CH_OFFSET(2))
227
228/* NAND flash controller registers */
229#define NFC_BASE (AHB_PERI_BASE_VIRT + 0xd000)
230#define NFC_BASE_PHYS (AHB_PERI_BASE + 0xd000)
231
232#define NFC_CMD_OFFS 0x00
233#define NFC_LADDR_OFFS 0x04
234#define NFC_BADDR_OFFS 0x08
235#define NFC_SADDR_OFFS 0x0c
236#define NFC_WDATA_OFFS 0x10
237#define NFC_LDATA_OFFS 0x20
238#define NFC_SDATA_OFFS 0x40
239#define NFC_CTRL_OFFS 0x50
240#define NFC_PSTART_OFFS 0x54
241#define NFC_RSTART_OFFS 0x58
242#define NFC_DSIZE_OFFS 0x5c
243#define NFC_IREQ_OFFS 0x60
244#define NFC_RST_OFFS 0x64
245#define NFC_CTRL1_OFFS 0x68
246#define NFC_MDATA_OFFS 0x70
247
248#define NFC_WDATA_PHYS_ADDR (NFC_BASE_PHYS + NFC_WDATA_OFFS)
249
250/* Bits in NFC_CTRL */
251#define NFC_CTRL_BHLD_MASK (0xf << 0)
252#define NFC_CTRL_BPW_MASK (0xf << 4)
253#define NFC_CTRL_BSTP_MASK (0xf << 8)
254#define NFC_CTRL_CADDR_MASK (0x7 << 12)
255#define NFC_CTRL_CADDR_1 (0x0 << 12)
256#define NFC_CTRL_CADDR_2 (0x1 << 12)
257#define NFC_CTRL_CADDR_3 (0x2 << 12)
258#define NFC_CTRL_CADDR_4 (0x3 << 12)
259#define NFC_CTRL_CADDR_5 (0x4 << 12)
260#define NFC_CTRL_MSK (1 << 15)
261#define NFC_CTRL_PSIZE256 (0 << 16)
262#define NFC_CTRL_PSIZE512 (1 << 16)
263#define NFC_CTRL_PSIZE1024 (2 << 16)
264#define NFC_CTRL_PSIZE2048 (3 << 16)
265#define NFC_CTRL_PSIZE4096 (4 << 16)
266#define NFC_CTRL_PSIZE_MASK (7 << 16)
267#define NFC_CTRL_BSIZE1 (0 << 19)
268#define NFC_CTRL_BSIZE2 (1 << 19)
269#define NFC_CTRL_BSIZE4 (2 << 19)
270#define NFC_CTRL_BSIZE8 (3 << 19)
271#define NFC_CTRL_BSIZE_MASK (3 << 19)
272#define NFC_CTRL_RDY (1 << 21)
273#define NFC_CTRL_CS0SEL (1 << 22)
274#define NFC_CTRL_CS1SEL (1 << 23)
275#define NFC_CTRL_CS2SEL (1 << 24)
276#define NFC_CTRL_CS3SEL (1 << 25)
277#define NFC_CTRL_CSMASK (0xf << 22)
278#define NFC_CTRL_BW (1 << 26)
279#define NFC_CTRL_FS (1 << 27)
280#define NFC_CTRL_DEN (1 << 28)
281#define NFC_CTRL_READ_IEN (1 << 29)
282#define NFC_CTRL_PROG_IEN (1 << 30)
283#define NFC_CTRL_RDY_IEN (1 << 31)
284
285/* Bits in NFC_IREQ */
286#define NFC_IREQ_IRQ0 (1 << 0)
287#define NFC_IREQ_IRQ1 (1 << 1)
288#define NFC_IREQ_IRQ2 (1 << 2)
289
290#define NFC_IREQ_FLAG0 (1 << 4)
291#define NFC_IREQ_FLAG1 (1 << 5)
292#define NFC_IREQ_FLAG2 (1 << 6)
293
294/* MMC controller registers */
295#define MMC0_BASE (AHB_PERI_BASE_VIRT + 0xe000)
296#define MMC1_BASE (AHB_PERI_BASE_VIRT + 0xe800)
297
298/* UART base addresses */
299
300#define UART0_BASE (APB0_PERI_BASE_VIRT + 0x07000)
301#define UART0_BASE_PHYS (APB0_PERI_BASE + 0x07000)
302#define UART1_BASE (APB0_PERI_BASE_VIRT + 0x08000)
303#define UART1_BASE_PHYS (APB0_PERI_BASE + 0x08000)
304#define UART2_BASE (APB0_PERI_BASE_VIRT + 0x09000)
305#define UART2_BASE_PHYS (APB0_PERI_BASE + 0x09000)
306#define UART3_BASE (APB0_PERI_BASE_VIRT + 0x0a000)
307#define UART3_BASE_PHYS (APB0_PERI_BASE + 0x0a000)
308#define UART4_BASE (APB0_PERI_BASE_VIRT + 0x15000)
309#define UART4_BASE_PHYS (APB0_PERI_BASE + 0x15000)
310
311#define UART_BASE UART0_BASE
312#define UART_BASE_PHYS UART0_BASE_PHYS
313
314/* ECC controller */
315#define ECC_CTR_BASE (APB0_PERI_BASE_VIRT + 0xd000)
316
317#define ECC_CTRL_OFFS 0x00
318#define ECC_BASE_OFFS 0x04
319#define ECC_MASK_OFFS 0x08
320#define ECC_CLEAR_OFFS 0x0c
321#define ECC4_0_OFFS 0x10
322#define ECC4_1_OFFS 0x14
323
324#define ECC_EADDR0_OFFS 0x50
325
326#define ECC_ERRNUM_OFFS 0x90
327#define ECC_IREQ_OFFS 0x94
328
329/* Bits in ECC_CTRL */
330#define ECC_CTRL_ECC4_DIEN (1 << 28)
331#define ECC_CTRL_ECC8_DIEN (1 << 29)
332#define ECC_CTRL_ECC12_DIEN (1 << 30)
333#define ECC_CTRL_ECC_DISABLE 0x0
334#define ECC_CTRL_ECC_SLC_ENC 0x8
335#define ECC_CTRL_ECC_SLC_DEC 0x9
336#define ECC_CTRL_ECC4_ENC 0xa
337#define ECC_CTRL_ECC4_DEC 0xb
338#define ECC_CTRL_ECC8_ENC 0xc
339#define ECC_CTRL_ECC8_DEC 0xd
340#define ECC_CTRL_ECC12_ENC 0xe
341#define ECC_CTRL_ECC12_DEC 0xf
342
343/* Bits in ECC_IREQ */
344#define ECC_IREQ_E4DI (1 << 4)
345
346#define ECC_IREQ_E4DF (1 << 20)
347#define ECC_IREQ_E4EF (1 << 21)
348
349/* Interrupt controller */
350
351#define PIC0_BASE (APB1_PERI_BASE_VIRT + 0x3000)
352#define PIC0_BASE_PHYS (APB1_PERI_BASE + 0x3000)
353
354#define PIC0_IEN_OFFS 0x00
355#define PIC0_CREQ_OFFS 0x04
356#define PIC0_IREQ_OFFS 0x08
357#define PIC0_IRQSEL_OFFS 0x0c
358#define PIC0_SRC_OFFS 0x10
359#define PIC0_MREQ_OFFS 0x14
360#define PIC0_TSTREQ_OFFS 0x18
361#define PIC0_POL_OFFS 0x1c
362#define PIC0_IRQ_OFFS 0x20
363#define PIC0_FIQ_OFFS 0x24
364#define PIC0_MIRQ_OFFS 0x28
365#define PIC0_MFIQ_OFFS 0x2c
366#define PIC0_TMODE_OFFS 0x30
367#define PIC0_SYNC_OFFS 0x34
368#define PIC0_WKUP_OFFS 0x38
369#define PIC0_TMODEA_OFFS 0x3c
370#define PIC0_INTOEN_OFFS 0x40
371#define PIC0_MEN0_OFFS 0x44
372#define PIC0_MEN_OFFS 0x48
373
374#define PIC0_IEN __REG(PIC0_BASE + PIC0_IEN_OFFS)
375#define PIC0_IEN_PHYS __REG(PIC0_BASE_PHYS + PIC0_IEN_OFFS)
376#define PIC0_CREQ __REG(PIC0_BASE + PIC0_CREQ_OFFS)
377#define PIC0_CREQ_PHYS __REG(PIC0_BASE_PHYS + PIC0_CREQ_OFFS)
378#define PIC0_IREQ __REG(PIC0_BASE + PIC0_IREQ_OFFS)
379#define PIC0_IRQSEL __REG(PIC0_BASE + PIC0_IRQSEL_OFFS)
380#define PIC0_IRQSEL_PHYS __REG(PIC0_BASE_PHYS + PIC0_IRQSEL_OFFS)
381#define PIC0_SRC __REG(PIC0_BASE + PIC0_SRC_OFFS)
382#define PIC0_MREQ __REG(PIC0_BASE + PIC0_MREQ_OFFS)
383#define PIC0_TSTREQ __REG(PIC0_BASE + PIC0_TSTREQ_OFFS)
384#define PIC0_POL __REG(PIC0_BASE + PIC0_POL_OFFS)
385#define PIC0_IRQ __REG(PIC0_BASE + PIC0_IRQ_OFFS)
386#define PIC0_FIQ __REG(PIC0_BASE + PIC0_FIQ_OFFS)
387#define PIC0_MIRQ __REG(PIC0_BASE + PIC0_MIRQ_OFFS)
388#define PIC0_MFIQ __REG(PIC0_BASE + PIC0_MFIQ_OFFS)
389#define PIC0_TMODE __REG(PIC0_BASE + PIC0_TMODE_OFFS)
390#define PIC0_TMODE_PHYS __REG(PIC0_BASE_PHYS + PIC0_TMODE_OFFS)
391#define PIC0_SYNC __REG(PIC0_BASE + PIC0_SYNC_OFFS)
392#define PIC0_WKUP __REG(PIC0_BASE + PIC0_WKUP_OFFS)
393#define PIC0_TMODEA __REG(PIC0_BASE + PIC0_TMODEA_OFFS)
394#define PIC0_INTOEN __REG(PIC0_BASE + PIC0_INTOEN_OFFS)
395#define PIC0_MEN0 __REG(PIC0_BASE + PIC0_MEN0_OFFS)
396#define PIC0_MEN __REG(PIC0_BASE + PIC0_MEN_OFFS)
397
398#define PIC1_BASE (APB1_PERI_BASE_VIRT + 0x3080)
399
400#define PIC1_IEN_OFFS 0x00
401#define PIC1_CREQ_OFFS 0x04
402#define PIC1_IREQ_OFFS 0x08
403#define PIC1_IRQSEL_OFFS 0x0c
404#define PIC1_SRC_OFFS 0x10
405#define PIC1_MREQ_OFFS 0x14
406#define PIC1_TSTREQ_OFFS 0x18
407#define PIC1_POL_OFFS 0x1c
408#define PIC1_IRQ_OFFS 0x20
409#define PIC1_FIQ_OFFS 0x24
410#define PIC1_MIRQ_OFFS 0x28
411#define PIC1_MFIQ_OFFS 0x2c
412#define PIC1_TMODE_OFFS 0x30
413#define PIC1_SYNC_OFFS 0x34
414#define PIC1_WKUP_OFFS 0x38
415#define PIC1_TMODEA_OFFS 0x3c
416#define PIC1_INTOEN_OFFS 0x40
417#define PIC1_MEN1_OFFS 0x44
418#define PIC1_MEN_OFFS 0x48
419
420#define PIC1_IEN __REG(PIC1_BASE + PIC1_IEN_OFFS)
421#define PIC1_CREQ __REG(PIC1_BASE + PIC1_CREQ_OFFS)
422#define PIC1_IREQ __REG(PIC1_BASE + PIC1_IREQ_OFFS)
423#define PIC1_IRQSEL __REG(PIC1_BASE + PIC1_IRQSEL_OFFS)
424#define PIC1_SRC __REG(PIC1_BASE + PIC1_SRC_OFFS)
425#define PIC1_MREQ __REG(PIC1_BASE + PIC1_MREQ_OFFS)
426#define PIC1_TSTREQ __REG(PIC1_BASE + PIC1_TSTREQ_OFFS)
427#define PIC1_POL __REG(PIC1_BASE + PIC1_POL_OFFS)
428#define PIC1_IRQ __REG(PIC1_BASE + PIC1_IRQ_OFFS)
429#define PIC1_FIQ __REG(PIC1_BASE + PIC1_FIQ_OFFS)
430#define PIC1_MIRQ __REG(PIC1_BASE + PIC1_MIRQ_OFFS)
431#define PIC1_MFIQ __REG(PIC1_BASE + PIC1_MFIQ_OFFS)
432#define PIC1_TMODE __REG(PIC1_BASE + PIC1_TMODE_OFFS)
433#define PIC1_SYNC __REG(PIC1_BASE + PIC1_SYNC_OFFS)
434#define PIC1_WKUP __REG(PIC1_BASE + PIC1_WKUP_OFFS)
435#define PIC1_TMODEA __REG(PIC1_BASE + PIC1_TMODEA_OFFS)
436#define PIC1_INTOEN __REG(PIC1_BASE + PIC1_INTOEN_OFFS)
437#define PIC1_MEN1 __REG(PIC1_BASE + PIC1_MEN1_OFFS)
438#define PIC1_MEN __REG(PIC1_BASE + PIC1_MEN_OFFS)
439
440/* Timer registers */
441#define TIMER_BASE (APB1_PERI_BASE_VIRT + 0x4000)
442#define TIMER_BASE_PHYS (APB1_PERI_BASE + 0x4000)
443
444#define TWDCFG_OFFS 0x70
445
446#define TC32EN_OFFS 0x80
447#define TC32LDV_OFFS 0x84
448#define TC32CMP0_OFFS 0x88
449#define TC32CMP1_OFFS 0x8c
450#define TC32PCNT_OFFS 0x90
451#define TC32MCNT_OFFS 0x94
452#define TC32IRQ_OFFS 0x98
453
454/* Bits in TC32EN */
455#define TC32EN_PRESCALE_MASK 0x00ffffff
456#define TC32EN_ENABLE (1 << 24)
457#define TC32EN_LOADZERO (1 << 25)
458#define TC32EN_STOPMODE (1 << 26)
459#define TC32EN_LDM0 (1 << 28)
460#define TC32EN_LDM1 (1 << 29)
461
462/* Bits in TC32IRQ */
463#define TC32IRQ_MSTAT_MASK 0x0000001f
464#define TC32IRQ_RSTAT_MASK (0x1f << 8)
465#define TC32IRQ_IRQEN0 (1 << 16)
466#define TC32IRQ_IRQEN1 (1 << 17)
467#define TC32IRQ_IRQEN2 (1 << 18)
468#define TC32IRQ_IRQEN3 (1 << 19)
469#define TC32IRQ_IRQEN4 (1 << 20)
470#define TC32IRQ_RSYNC (1 << 30)
471#define TC32IRQ_IRQCLR (1 << 31)
472
473/* GPIO registers */
474#define GPIOPD_BASE (APB1_PERI_BASE_VIRT + 0x5000)
475
476#define GPIOPD_DAT_OFFS 0x00
477#define GPIOPD_DOE_OFFS 0x04
478#define GPIOPD_FS0_OFFS 0x08
479#define GPIOPD_FS1_OFFS 0x0c
480#define GPIOPD_FS2_OFFS 0x10
481#define GPIOPD_RPU_OFFS 0x30
482#define GPIOPD_RPD_OFFS 0x34
483#define GPIOPD_DV0_OFFS 0x38
484#define GPIOPD_DV1_OFFS 0x3c
485
486#define GPIOPS_BASE (APB1_PERI_BASE_VIRT + 0x5000)
487
488#define GPIOPS_DAT_OFFS 0x40
489#define GPIOPS_DOE_OFFS 0x44
490#define GPIOPS_FS0_OFFS 0x48
491#define GPIOPS_FS1_OFFS 0x4c
492#define GPIOPS_FS2_OFFS 0x50
493#define GPIOPS_FS3_OFFS 0x54
494#define GPIOPS_RPU_OFFS 0x70
495#define GPIOPS_RPD_OFFS 0x74
496#define GPIOPS_DV0_OFFS 0x78
497#define GPIOPS_DV1_OFFS 0x7c
498
499#define GPIOPS_FS1_SDH0_BITS 0x000000ff
500#define GPIOPS_FS1_SDH1_BITS 0x0000ff00
501
502#define GPIOPU_BASE (APB1_PERI_BASE_VIRT + 0x5000)
503
504#define GPIOPU_DAT_OFFS 0x80
505#define GPIOPU_DOE_OFFS 0x84
506#define GPIOPU_FS0_OFFS 0x88
507#define GPIOPU_FS1_OFFS 0x8c
508#define GPIOPU_FS2_OFFS 0x90
509#define GPIOPU_RPU_OFFS 0xb0
510#define GPIOPU_RPD_OFFS 0xb4
511#define GPIOPU_DV0_OFFS 0xb8
512#define GPIOPU_DV1_OFFS 0xbc
513
514#define GPIOPU_FS0_TXD0 (1 << 0)
515#define GPIOPU_FS0_RXD0 (1 << 1)
516#define GPIOPU_FS0_CTS0 (1 << 2)
517#define GPIOPU_FS0_RTS0 (1 << 3)
518#define GPIOPU_FS0_TXD1 (1 << 4)
519#define GPIOPU_FS0_RXD1 (1 << 5)
520#define GPIOPU_FS0_CTS1 (1 << 6)
521#define GPIOPU_FS0_RTS1 (1 << 7)
522#define GPIOPU_FS0_TXD2 (1 << 8)
523#define GPIOPU_FS0_RXD2 (1 << 9)
524#define GPIOPU_FS0_CTS2 (1 << 10)
525#define GPIOPU_FS0_RTS2 (1 << 11)
526#define GPIOPU_FS0_TXD3 (1 << 12)
527#define GPIOPU_FS0_RXD3 (1 << 13)
528#define GPIOPU_FS0_CTS3 (1 << 14)
529#define GPIOPU_FS0_RTS3 (1 << 15)
530#define GPIOPU_FS0_TXD4 (1 << 16)
531#define GPIOPU_FS0_RXD4 (1 << 17)
532#define GPIOPU_FS0_CTS4 (1 << 18)
533#define GPIOPU_FS0_RTS4 (1 << 19)
534
535#define GPIOFC_BASE (APB1_PERI_BASE_VIRT + 0x5000)
536
537#define GPIOFC_DAT_OFFS 0xc0
538#define GPIOFC_DOE_OFFS 0xc4
539#define GPIOFC_FS0_OFFS 0xc8
540#define GPIOFC_FS1_OFFS 0xcc
541#define GPIOFC_FS2_OFFS 0xd0
542#define GPIOFC_FS3_OFFS 0xd4
543#define GPIOFC_RPU_OFFS 0xf0
544#define GPIOFC_RPD_OFFS 0xf4
545#define GPIOFC_DV0_OFFS 0xf8
546#define GPIOFC_DV1_OFFS 0xfc
547
548#define GPIOFD_BASE (APB1_PERI_BASE_VIRT + 0x5000)
549
550#define GPIOFD_DAT_OFFS 0x100
551#define GPIOFD_DOE_OFFS 0x104
552#define GPIOFD_FS0_OFFS 0x108
553#define GPIOFD_FS1_OFFS 0x10c
554#define GPIOFD_FS2_OFFS 0x110
555#define GPIOFD_RPU_OFFS 0x130
556#define GPIOFD_RPD_OFFS 0x134
557#define GPIOFD_DV0_OFFS 0x138
558#define GPIOFD_DV1_OFFS 0x13c
559
560#define GPIOLC_BASE (APB1_PERI_BASE_VIRT + 0x5000)
561
562#define GPIOLC_DAT_OFFS 0x140
563#define GPIOLC_DOE_OFFS 0x144
564#define GPIOLC_FS0_OFFS 0x148
565#define GPIOLC_FS1_OFFS 0x14c
566#define GPIOLC_RPU_OFFS 0x170
567#define GPIOLC_RPD_OFFS 0x174
568#define GPIOLC_DV0_OFFS 0x178
569#define GPIOLC_DV1_OFFS 0x17c
570
571#define GPIOLD_BASE (APB1_PERI_BASE_VIRT + 0x5000)
572
573#define GPIOLD_DAT_OFFS 0x180
574#define GPIOLD_DOE_OFFS 0x184
575#define GPIOLD_FS0_OFFS 0x188
576#define GPIOLD_FS1_OFFS 0x18c
577#define GPIOLD_FS2_OFFS 0x190
578#define GPIOLD_RPU_OFFS 0x1b0
579#define GPIOLD_RPD_OFFS 0x1b4
580#define GPIOLD_DV0_OFFS 0x1b8
581#define GPIOLD_DV1_OFFS 0x1bc
582
583#define GPIOAD_BASE (APB1_PERI_BASE_VIRT + 0x5000)
584
585#define GPIOAD_DAT_OFFS 0x1c0
586#define GPIOAD_DOE_OFFS 0x1c4
587#define GPIOAD_FS0_OFFS 0x1c8
588#define GPIOAD_RPU_OFFS 0x1f0
589#define GPIOAD_RPD_OFFS 0x1f4
590#define GPIOAD_DV0_OFFS 0x1f8
591#define GPIOAD_DV1_OFFS 0x1fc
592
593#define GPIOXC_BASE (APB1_PERI_BASE_VIRT + 0x5000)
594
595#define GPIOXC_DAT_OFFS 0x200
596#define GPIOXC_DOE_OFFS 0x204
597#define GPIOXC_FS0_OFFS 0x208
598#define GPIOXC_RPU_OFFS 0x230
599#define GPIOXC_RPD_OFFS 0x234
600#define GPIOXC_DV0_OFFS 0x238
601#define GPIOXC_DV1_OFFS 0x23c
602
603#define GPIOXC_FS0 __REG(GPIOXC_BASE + GPIOXC_FS0_OFFS)
604
605#define GPIOXC_FS0_CS0 (1 << 26)
606#define GPIOXC_FS0_CS1 (1 << 27)
607
608#define GPIOXD_BASE (APB1_PERI_BASE_VIRT + 0x5000)
609
610#define GPIOXD_DAT_OFFS 0x240
611#define GPIOXD_FS0_OFFS 0x248
612#define GPIOXD_RPU_OFFS 0x270
613#define GPIOXD_RPD_OFFS 0x274
614#define GPIOXD_DV0_OFFS 0x278
615#define GPIOXD_DV1_OFFS 0x27c
616
617#define GPIOPK_BASE (APB1_PERI_BASE_VIRT + 0x1c000)
618
619#define GPIOPK_RST_OFFS 0x008
620#define GPIOPK_DAT_OFFS 0x100
621#define GPIOPK_DOE_OFFS 0x104
622#define GPIOPK_FS0_OFFS 0x108
623#define GPIOPK_FS1_OFFS 0x10c
624#define GPIOPK_FS2_OFFS 0x110
625#define GPIOPK_IRQST_OFFS 0x210
626#define GPIOPK_IRQEN_OFFS 0x214
627#define GPIOPK_IRQPOL_OFFS 0x218
628#define GPIOPK_IRQTM0_OFFS 0x21c
629#define GPIOPK_IRQTM1_OFFS 0x220
630#define GPIOPK_CTL_OFFS 0x22c
631
632#define PMGPIO_BASE (APB1_PERI_BASE_VIRT + 0x10000)
633#define BACKUP_RAM_BASE PMGPIO_BASE
634
635#define PMGPIO_DAT_OFFS 0x800
636#define PMGPIO_DOE_OFFS 0x804
637#define PMGPIO_FS0_OFFS 0x808
638#define PMGPIO_RPU_OFFS 0x810
639#define PMGPIO_RPD_OFFS 0x814
640#define PMGPIO_DV0_OFFS 0x818
641#define PMGPIO_DV1_OFFS 0x81c
642#define PMGPIO_EE0_OFFS 0x820
643#define PMGPIO_EE1_OFFS 0x824
644#define PMGPIO_CTL_OFFS 0x828
645#define PMGPIO_DI_OFFS 0x82c
646#define PMGPIO_STR_OFFS 0x830
647#define PMGPIO_STF_OFFS 0x834
648#define PMGPIO_POL_OFFS 0x838
649#define PMGPIO_APB_OFFS 0x800
650
651/* Clock controller registers */
652#define CKC_BASE ((void __iomem *)(APB1_PERI_BASE_VIRT + 0x6000))
653
654#define CLKCTRL_OFFS 0x00
655#define PLL0CFG_OFFS 0x04
656#define PLL1CFG_OFFS 0x08
657#define CLKDIVC0_OFFS 0x0c
658
659#define BCLKCTR0_OFFS 0x14
660#define SWRESET0_OFFS 0x18
661
662#define BCLKCTR1_OFFS 0x60
663#define SWRESET1_OFFS 0x64
664#define PWDCTL_OFFS 0x68
665#define PLL2CFG_OFFS 0x6c
666#define CLKDIVC1_OFFS 0x70
667
668#define ACLKREF_OFFS 0x80
669#define ACLKI2C_OFFS 0x84
670#define ACLKSPI0_OFFS 0x88
671#define ACLKSPI1_OFFS 0x8c
672#define ACLKUART0_OFFS 0x90
673#define ACLKUART1_OFFS 0x94
674#define ACLKUART2_OFFS 0x98
675#define ACLKUART3_OFFS 0x9c
676#define ACLKUART4_OFFS 0xa0
677#define ACLKTCT_OFFS 0xa4
678#define ACLKTCX_OFFS 0xa8
679#define ACLKTCZ_OFFS 0xac
680#define ACLKADC_OFFS 0xb0
681#define ACLKDAI0_OFFS 0xb4
682#define ACLKDAI1_OFFS 0xb8
683#define ACLKLCD_OFFS 0xbc
684#define ACLKSPDIF_OFFS 0xc0
685#define ACLKUSBH_OFFS 0xc4
686#define ACLKSDH0_OFFS 0xc8
687#define ACLKSDH1_OFFS 0xcc
688#define ACLKC3DEC_OFFS 0xd0
689#define ACLKEXT_OFFS 0xd4
690#define ACLKCAN0_OFFS 0xd8
691#define ACLKCAN1_OFFS 0xdc
692#define ACLKGSB0_OFFS 0xe0
693#define ACLKGSB1_OFFS 0xe4
694#define ACLKGSB2_OFFS 0xe8
695#define ACLKGSB3_OFFS 0xec
696
697#define PLLxCFG_PD (1 << 31)
698
699/* CLKCTRL bits */
700#define CLKCTRL_XE (1 << 31)
701
702/* CLKDIVCx bits */
703#define CLKDIVC0_XTE (1 << 7)
704#define CLKDIVC0_XE (1 << 15)
705#define CLKDIVC0_P1E (1 << 23)
706#define CLKDIVC0_P0E (1 << 31)
707
708#define CLKDIVC1_P2E (1 << 7)
709
710/* BCLKCTR0 clock bits */
711#define BCLKCTR0_USBD (1 << 4)
712#define BCLKCTR0_ECC (1 << 9)
713#define BCLKCTR0_USBH0 (1 << 11)
714#define BCLKCTR0_NFC (1 << 16)
715
716/* BCLKCTR1 clock bits */
717#define BCLKCTR1_USBH1 (1 << 20)
718
719/* SWRESET0 bits */
720#define SWRESET0_USBD (1 << 4)
721#define SWRESET0_USBH0 (1 << 11)
722
723/* SWRESET1 bits */
724#define SWRESET1_USBH1 (1 << 20)
725
726/* System clock sources.
727 * Note: These are the clock sources that serve as parents for
728 * all other clocks. They have no parents themselves.
729 *
730 * These values are used for struct clk->root_id. All clocks
731 * that are not system clock sources have this value set to
732 * CLK_SRC_NOROOT.
733 * The values for system clocks start with CLK_SRC_PLL0 == 0
734 * because this gives us exactly the values needed for the lower
735 * 4 bits of ACLK_* registers. Therefore, CLK_SRC_NOROOT is
736 * defined as -1 to not disturb the order.
737 */
738enum root_clks {
739 CLK_SRC_NOROOT = -1,
740 CLK_SRC_PLL0 = 0,
741 CLK_SRC_PLL1,
742 CLK_SRC_PLL0DIV,
743 CLK_SRC_PLL1DIV,
744 CLK_SRC_XI,
745 CLK_SRC_XIDIV,
746 CLK_SRC_XTI,
747 CLK_SRC_XTIDIV,
748 CLK_SRC_PLL2,
749 CLK_SRC_PLL2DIV,
750 CLK_SRC_PK0,
751 CLK_SRC_PK1,
752 CLK_SRC_PK2,
753 CLK_SRC_PK3,
754 CLK_SRC_PK4,
755 CLK_SRC_48MHZ
756};
757
758#define CLK_SRC_MASK 0xf
759
760/* Bits in ACLK* registers */
761#define ACLK_EN (1 << 28)
762#define ACLK_SEL_SHIFT 24
763#define ACLK_SEL_MASK 0x0f000000
764#define ACLK_DIV_MASK 0x00000fff
765
766/* System configuration registers */
767
768#define SCFG_BASE (APB1_PERI_BASE_VIRT + 0x13000)
769
770#define BMI_OFFS 0x00
771#define AHBCON0_OFFS 0x04
772#define APBPWE_OFFS 0x08
773#define DTCMWAIT_OFFS 0x0c
774#define ECCSEL_OFFS 0x10
775#define AHBCON1_OFFS 0x14
776#define SDHCFG_OFFS 0x18
777#define REMAP_OFFS 0x20
778#define LCDSIAE_OFFS 0x24
779#define XMCCFG_OFFS 0xe0
780#define IMCCFG_OFFS 0xe4
781
782/* Values for ECCSEL */
783#define ECCSEL_EXTMEM 0x0
784#define ECCSEL_DTCM 0x1
785#define ECCSEL_INT_SRAM 0x2
786#define ECCSEL_AHB 0x3
787
788/* Bits in XMCCFG */
789#define XMCCFG_NFCE (1 << 1)
790#define XMCCFG_FDXD (1 << 2)
791
792/* External memory controller registers */
793
794#define EMC_BASE EXT_MEM_CTRL_BASE
795
796#define SDCFG_OFFS 0x00
797#define SDFSM_OFFS 0x04
798#define MCFG_OFFS 0x08
799
800#define CSCFG0_OFFS 0x10
801#define CSCFG1_OFFS 0x14
802#define CSCFG2_OFFS 0x18
803#define CSCFG3_OFFS 0x1c
804
805#define MCFG_SDEN (1 << 4)
806
807#endif /* TCC8K_REGS_H */
diff --git a/arch/arm/plat-tcc/include/mach/timex.h b/arch/arm/plat-tcc/include/mach/timex.h
deleted file mode 100644
index 057acbe651d9..000000000000
--- a/arch/arm/plat-tcc/include/mach/timex.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * A definition needed by arch core code.
3 *
4 */
5#define CLOCK_TICK_RATE (HZ * 100000UL)
diff --git a/arch/arm/plat-tcc/include/mach/uncompress.h b/arch/arm/plat-tcc/include/mach/uncompress.h
deleted file mode 100644
index 7a3e33a27a30..000000000000
--- a/arch/arm/plat-tcc/include/mach/uncompress.h
+++ /dev/null
@@ -1,34 +0,0 @@
1/*
2 * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
3 *
4 * This file is licensed under the terms of the GPL version 2.
5 */
6
7#include <linux/serial_reg.h>
8#include <linux/types.h>
9
10#include <mach/tcc8k-regs.h>
11
12unsigned int system_rev;
13
14#define ID_MASK 0x7fff
15
16static void putc(int c)
17{
18 u32 *uart_lsr = (u32 *)(UART_BASE_PHYS + (UART_LSR << 2));
19 u32 *uart_tx = (u32 *)(UART_BASE_PHYS + (UART_TX << 2));
20
21 while (!(*uart_lsr & UART_LSR_THRE))
22 barrier();
23 *uart_tx = c;
24}
25
26static inline void flush(void)
27{
28}
29
30/*
31 * nothing to do
32 */
33#define arch_decomp_setup()
34#define arch_decomp_wdog()
diff --git a/arch/arm/plat-tcc/system.c b/arch/arm/plat-tcc/system.c
deleted file mode 100644
index cc208fae3e7a..000000000000
--- a/arch/arm/plat-tcc/system.c
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 * System functions for Telechips TCCxxxx SoCs
3 *
4 * Copyright (C) Hans J. Koch <hjk@linutronix.de>
5 *
6 * Licensed under the terms of the GPL v2.
7 *
8 */
9
10#include <linux/io.h>
11
12#include <mach/tcc8k-regs.h>
13
14/* System reboot */
15void plat_tcc_reboot(void)
16{
17 /* Make sure clocks are on */
18 __raw_writel(0xffffffff, CKC_BASE + BCLKCTR0_OFFS);
19
20 /* Enable watchdog reset */
21 __raw_writel(0x49, TIMER_BASE + TWDCFG_OFFS);
22 /* Wait for reset */
23 while(1)
24 ;
25}