729 files changed, 11542 insertions, 9283 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 94422601ea5b..cf006d40342c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -9,6 +9,7 @@ config ARM
         select SYS_SUPPORTS_APM_EMULATION
         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
+        select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
         select HAVE_ARCH_KGDB
         select HAVE_KPROBES if !XIP_KERNEL
         select HAVE_KRETPROBES if (HAVE_KPROBES)
@@ -21,6 +22,7 @@ config ARM
         select HAVE_KERNEL_GZIP
         select HAVE_KERNEL_LZO
         select HAVE_KERNEL_LZMA
+        select HAVE_KERNEL_XZ
         select HAVE_IRQ_WORK
         select HAVE_PERF_EVENTS
         select PERF_USE_VMALLOC
@@ -28,10 +30,10 @@ config ARM
         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
         select HAVE_C_RECORDMCOUNT
         select HAVE_GENERIC_HARDIRQS
-        select HAVE_SPARSE_IRQ
         select GENERIC_IRQ_SHOW
         select CPU_PM if (SUSPEND || CPU_IDLE)
         select GENERIC_PCI_IOMAP
+        select HAVE_BPF_JIT if NET
         help
           The ARM series is a line of low-power-consumption RISC chip designs
           licensed by ARM Ltd and targeted at embedded applications and
@@ -52,9 +54,6 @@ config MIGHT_HAVE_PCI
 config SYS_SUPPORTS_APM_EMULATION
         bool
 
-config HAVE_SCHED_CLOCK
-        bool
-
 config GENERIC_GPIO
         bool
 
@@ -180,6 +179,9 @@ config ZONE_DMA
 config NEED_DMA_MAP_STATE
        def_bool y
 
+config ARCH_HAS_DMA_SET_COHERENT_MASK
+        bool
+
 config GENERIC_ISA_DMA
         bool
 
@@ -217,6 +219,13 @@ config ARM_PATCH_PHYS_VIRT
           this feature (eg, building a kernel for a single machine) and
           you need to shrink the kernel to the minimal size.
 
+config NEED_MACH_IO_H
+        bool
+        help
+          Select this when mach/io.h is required to provide special
+          definitions for this platform.  The need for mach/io.h should
+          be avoided when possible.
+
 config NEED_MACH_MEMORY_H
         bool
         help
@@ -268,7 +277,9 @@ config ARCH_INTEGRATOR
         select GENERIC_CLOCKEVENTS
         select PLAT_VERSATILE
         select PLAT_VERSATILE_FPGA_IRQ
+        select NEED_MACH_IO_H
         select NEED_MACH_MEMORY_H
+        select SPARSE_IRQ
         help
           Support for ARM's Integrator platform.
 
@@ -315,6 +326,7 @@ config ARCH_VEXPRESS
         select HAVE_CLK
         select HAVE_PATA_PLATFORM
         select ICST
+        select NO_IOPORT
         select PLAT_VERSATILE
         select PLAT_VERSATILE_CLCD
         help
@@ -326,6 +338,7 @@ config ARCH_AT91
         select HAVE_CLK
         select CLKDEV_LOOKUP
         select IRQ_DOMAIN
+        select NEED_MACH_IO_H if PCCARD
         help
           This enables support for systems based on the Atmel AT91RM9200,
           AT91SAM9 processors.
@@ -354,6 +367,7 @@ config ARCH_HIGHBANK
         select GENERIC_CLOCKEVENTS
         select HAVE_ARM_SCU
         select HAVE_SMP
+        select SPARSE_IRQ
         select USE_OF
         help
           Support for the Calxeda Highbank SoC based boards.
@@ -404,6 +418,7 @@ config ARCH_EBSA110
         select ISA
         select NO_IOPORT
         select ARCH_USES_GETTIMEOFFSET
+        select NEED_MACH_IO_H
         select NEED_MACH_MEMORY_H
         help
           This is an evaluation board for the StrongARM processor available
@@ -430,6 +445,7 @@ config ARCH_FOOTBRIDGE
         select FOOTBRIDGE
         select GENERIC_CLOCKEVENTS
         select HAVE_IDE
+        select NEED_MACH_IO_H
         select NEED_MACH_MEMORY_H
         help
           Support for systems based on the DC21285 companion chip
@@ -442,7 +458,6 @@ config ARCH_MXC
         select CLKDEV_LOOKUP
         select CLKSRC_MMIO
         select GENERIC_IRQ_CHIP
-        select HAVE_SCHED_CLOCK
         select MULTI_IRQ_HANDLER
         help
           Support for Freescale MXC/iMX-based family of processors
@@ -482,6 +497,7 @@ config ARCH_IOP13XX
         select PCI
         select ARCH_SUPPORTS_MSI
         select VMSPLIT_1G
+        select NEED_MACH_IO_H
         select NEED_MACH_MEMORY_H
         select NEED_RET_TO_USER
         help
@@ -491,6 +507,7 @@ config ARCH_IOP32X
         bool "IOP32x-based"
         depends on MMU
         select CPU_XSCALE
+        select NEED_MACH_IO_H
         select NEED_RET_TO_USER
         select PLAT_IOP
         select PCI
@@ -503,6 +520,7 @@ config ARCH_IOP33X
         bool "IOP33x-based"
         depends on MMU
         select CPU_XSCALE
+        select NEED_MACH_IO_H
         select NEED_RET_TO_USER
         select PLAT_IOP
         select PCI
@@ -516,6 +534,7 @@ config ARCH_IXP23XX
         select CPU_XSC3
         select PCI
         select ARCH_USES_GETTIMEOFFSET
+        select NEED_MACH_IO_H
         select NEED_MACH_MEMORY_H
         help
           Support for Intel's IXP23xx (XScale) family of processors.
@@ -526,6 +545,7 @@ config ARCH_IXP2000
         select CPU_XSCALE
         select PCI
         select ARCH_USES_GETTIMEOFFSET
+        select NEED_MACH_IO_H
         select NEED_MACH_MEMORY_H
         help
           Support for Intel's IXP2400/2800 (XScale) family of processors.
@@ -533,12 +553,13 @@ config ARCH_IXP2000
 config ARCH_IXP4XX
         bool "IXP4xx-based"
         depends on MMU
+        select ARCH_HAS_DMA_SET_COHERENT_MASK
         select CLKSRC_MMIO
         select CPU_XSCALE
         select GENERIC_GPIO
         select GENERIC_CLOCKEVENTS
-        select HAVE_SCHED_CLOCK
         select MIGHT_HAVE_PCI
+        select NEED_MACH_IO_H
         select DMABOUNCE if PCI
         help
           Support for Intel's IXP4XX (XScale) family of processors.
@@ -549,6 +570,7 @@ config ARCH_DOVE
         select PCI
         select ARCH_REQUIRE_GPIOLIB
         select GENERIC_CLOCKEVENTS
+        select NEED_MACH_IO_H
         select PLAT_ORION
         help
           Support for the Marvell Dove SoC 88AP510
@@ -559,6 +581,7 @@ config ARCH_KIRKWOOD
         select PCI
         select ARCH_REQUIRE_GPIOLIB
         select GENERIC_CLOCKEVENTS
+        select NEED_MACH_IO_H
         select PLAT_ORION
         help
           Support for the following Marvell Kirkwood series SoCs:
@@ -583,6 +606,7 @@ config ARCH_MV78XX0
         select PCI
         select ARCH_REQUIRE_GPIOLIB
         select GENERIC_CLOCKEVENTS
+        select NEED_MACH_IO_H
         select PLAT_ORION
         help
           Support for the following Marvell MV78xx0 series SoCs:
@@ -608,7 +632,6 @@ config ARCH_MMP
         select CLKDEV_LOOKUP
         select GENERIC_CLOCKEVENTS
         select GPIO_PXA
-        select HAVE_SCHED_CLOCK
         select TICK_ONESHOT
         select PLAT_PXA
         select SPARSE_IRQ
@@ -649,9 +672,9 @@ config ARCH_TEGRA
         select GENERIC_CLOCKEVENTS
         select GENERIC_GPIO
         select HAVE_CLK
-        select HAVE_SCHED_CLOCK
         select HAVE_SMP
         select MIGHT_HAVE_CACHE_L2X0
+        select NEED_MACH_IO_H if PCI
         select ARCH_HAS_CPUFREQ
         help
           This enables support for NVIDIA Tegra based systems (Tegra APX,
@@ -666,7 +689,6 @@ config ARCH_PICOXCELL
         select DW_APB_TIMER
         select GENERIC_CLOCKEVENTS
         select GENERIC_GPIO
-        select HAVE_SCHED_CLOCK
         select HAVE_TCM
         select NO_IOPORT
         select SPARSE_IRQ
@@ -694,7 +716,6 @@ config ARCH_PXA
         select ARCH_REQUIRE_GPIOLIB
         select GENERIC_CLOCKEVENTS
         select GPIO_PXA
-        select HAVE_SCHED_CLOCK
         select TICK_ONESHOT
         select PLAT_PXA
         select SPARSE_IRQ
@@ -738,7 +759,6 @@ config ARCH_RPC
         bool "RiscPC"
         select ARCH_ACORN
         select FIQ
-        select TIMER_ACORN
         select ARCH_MAY_HAVE_PC_FDC
         select HAVE_PATA_PLATFORM
         select ISA_DMA_API
@@ -746,6 +766,7 @@ config ARCH_RPC
         select ARCH_SPARSEMEM_ENABLE
         select ARCH_USES_GETTIMEOFFSET
         select HAVE_IDE
+        select NEED_MACH_IO_H
         select NEED_MACH_MEMORY_H
         help
           On the Acorn Risc-PC, Linux can support the internal IDE disk and
@@ -762,11 +783,11 @@ config ARCH_SA1100
         select CPU_FREQ
         select GENERIC_CLOCKEVENTS
         select CLKDEV_LOOKUP
-        select HAVE_SCHED_CLOCK
         select TICK_ONESHOT
         select ARCH_REQUIRE_GPIOLIB
         select HAVE_IDE
         select NEED_MACH_MEMORY_H
+        select SPARSE_IRQ
         help
           Support for StrongARM 11x0 based boards.
 
@@ -780,6 +801,7 @@ config ARCH_S3C24XX
         select HAVE_S3C2410_I2C if I2C
         select HAVE_S3C_RTC if RTC_CLASS
         select HAVE_S3C2410_WATCHDOG if WATCHDOG
+        select NEED_MACH_IO_H
         help
           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
@@ -818,7 +840,6 @@ config ARCH_S5P64X0
         select CLKSRC_MMIO
         select HAVE_S3C2410_WATCHDOG if WATCHDOG
         select GENERIC_CLOCKEVENTS
-        select HAVE_SCHED_CLOCK
         select HAVE_S3C2410_I2C if I2C
         select HAVE_S3C_RTC if RTC_CLASS
         help
@@ -849,7 +870,6 @@ config ARCH_S5PV210
         select CLKSRC_MMIO
         select ARCH_HAS_CPUFREQ
         select GENERIC_CLOCKEVENTS
-        select HAVE_SCHED_CLOCK
         select HAVE_S3C2410_I2C if I2C
         select HAVE_S3C_RTC if RTC_CLASS
         select HAVE_S3C2410_WATCHDOG if WATCHDOG
@@ -883,6 +903,7 @@ config ARCH_SHARK
         select PCI
         select ARCH_USES_GETTIMEOFFSET
         select NEED_MACH_MEMORY_H
+        select NEED_MACH_IO_H
         help
           Support for the StrongARM based Digital DNARD machine, also known
           as "Shark" (<http://www.shark-linux.de/shark.html>).
@@ -892,7 +913,6 @@ config ARCH_U300
         depends on MMU
         select CLKSRC_MMIO
         select CPU_ARM926T
-        select HAVE_SCHED_CLOCK
         select HAVE_TCM
         select ARM_AMBA
         select ARM_PATCH_PHYS_VIRT
@@ -951,7 +971,6 @@ config ARCH_OMAP
         select ARCH_HAS_CPUFREQ
         select CLKSRC_MMIO
         select GENERIC_CLOCKEVENTS
-        select HAVE_SCHED_CLOCK
         select ARCH_HAS_HOLES_MEMORYMODEL
         help
           Support for TI's OMAP platform (OMAP1/2/3/4).
@@ -1115,13 +1134,11 @@ config ARCH_ACORN
 config PLAT_IOP
         bool
         select GENERIC_CLOCKEVENTS
-        select HAVE_SCHED_CLOCK
 
 config PLAT_ORION
         bool
         select CLKSRC_MMIO
         select GENERIC_IRQ_CHIP
-        select HAVE_SCHED_CLOCK
 
 config PLAT_PXA
         bool
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 66ca8014ff3e..85348a09d655 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -292,6 +292,22 @@ choice
                   Note that the system will appear to hang during boot if there
                   is nothing connected to read from the DCC.
 
+        config DEBUG_SEMIHOSTING
+                bool "Kernel low-level debug output via semihosting I"
+                help
+                  Semihosting enables code running on an ARM target to use
+                  the I/O facilities on a host debugger/emulator through a
+                  simple SVC calls. The host debugger or emulator must have
+                  semihosting enabled for the special svc call to be trapped
+                  otherwise the kernel will crash.
+
+                  This is known to work with OpenOCD, as wellas
+                  ARM's Fast Models, or any other controlling environment
+                  that implements semihosting.
+
+                  For more details about semihosting, please see
+                  chapter 8 of DUI0203I_rvct_developer_guide.pdf from ARM Ltd.
+
 endchoice
 
 config EARLY_PRINTK
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 0106f75530c0..047a20780fc1 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -180,6 +180,7 @@ machine-$(CONFIG_ARCH_S5P64X0)		:= s5p64x0
 machine-$(CONFIG_ARCH_S5PC100)          := s5pc100
 machine-$(CONFIG_ARCH_S5PV210)          := s5pv210
 machine-$(CONFIG_ARCH_EXYNOS4)          := exynos
+machine-$(CONFIG_ARCH_EXYNOS5)          := exynos
 machine-$(CONFIG_ARCH_SA1100)           := sa1100
 machine-$(CONFIG_ARCH_SHARK)            := shark
 machine-$(CONFIG_ARCH_SHMOBILE)         := shmobile
@@ -252,6 +253,7 @@ core-$(CONFIG_VFP)		+= arch/arm/vfp/
 
 # If we have a machine-specific directory, then include it in the build.
 core-y                          += arch/arm/kernel/ arch/arm/mm/ arch/arm/common/
+core-y                          += arch/arm/net/
 core-y                          += $(machdirs) $(platdirs)
 
 drivers-$(CONFIG_OPROFILE)      += arch/arm/oprofile/
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
index fc871e719aae..c877087d2000 100644
--- a/arch/arm/boot/Makefile
+++ b/arch/arm/boot/Makefile
@@ -11,8 +11,6 @@
 # Copyright (C) 1995-2002 Russell King
 #
 
-MKIMAGE         := $(srctree)/scripts/mkuboot.sh
-
 ifneq ($(MACHINE),)
 include $(srctree)/$(MACHINE)/Makefile.boot
 endif
@@ -69,22 +67,19 @@ $(obj)/dtbs: $(addprefix $(obj)/, $(dtb-y))
 
 clean-files := *.dtb
 
-quiet_cmd_uimage = UIMAGE  $@
-      cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A arm -O linux -T kernel \
-                   -C none -a $(LOADADDR) -e $(STARTADDR) \
-                   -n 'Linux-$(KERNELRELEASE)' -d $< $@
-
-ifeq ($(CONFIG_ZBOOT_ROM),y)
-$(obj)/uImage: LOADADDR=$(CONFIG_ZBOOT_ROM_TEXT)
+ifneq ($(LOADADDR),)
+  UIMAGE_LOADADDR=$(LOADADDR)
 else
-$(obj)/uImage: LOADADDR=$(ZRELADDR)
+  ifeq ($(CONFIG_ZBOOT_ROM),y)
+    UIMAGE_LOADADDR=$(CONFIG_ZBOOT_ROM_TEXT)
+  else
+    UIMAGE_LOADADDR=$(ZRELADDR)
+  endif
 endif
 
-$(obj)/uImage: STARTADDR=$(LOADADDR)
-
 check_for_multiple_loadaddr = \
-if [ $(words $(LOADADDR)) -gt 1 ]; then \
-        echo 'multiple load addresses: $(LOADADDR)'; \
+if [ $(words $(UIMAGE_LOADADDR)) -gt 1 ]; then \
+        echo 'multiple load addresses: $(UIMAGE_LOADADDR)'; \
         echo 'This is incompatible with uImages'; \
         echo 'Specify LOADADDR on the commandline to build an uImage'; \
         false; \
diff --git a/arch/arm/boot/compressed/.gitignore b/arch/arm/boot/compressed/.gitignore
index e0936a148516..d0d441c429ae 100644
--- a/arch/arm/boot/compressed/.gitignore
+++ b/arch/arm/boot/compressed/.gitignore
@@ -1,8 +1,10 @@
+ashldi3.S
 font.c
 lib1funcs.S
 piggy.gzip
 piggy.lzo
 piggy.lzma
+piggy.xzkern
 vmlinux
 vmlinux.lds
 
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index cf0a64ce4b83..bb267562e7ed 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -92,6 +92,7 @@ SEDFLAGS	= s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/
 suffix_$(CONFIG_KERNEL_GZIP) = gzip
 suffix_$(CONFIG_KERNEL_LZO)  = lzo
 suffix_$(CONFIG_KERNEL_LZMA) = lzma
+suffix_$(CONFIG_KERNEL_XZ)   = xzkern
 
 # Borrowed libfdt files for the ATAG compatibility mode
 
@@ -112,10 +113,12 @@ endif
 
 targets       := vmlinux vmlinux.lds \
                  piggy.$(suffix_y) piggy.$(suffix_y).o \
-                 lib1funcs.o lib1funcs.S font.o font.c head.o misc.o $(OBJS)
+                 lib1funcs.o lib1funcs.S ashldi3.o ashldi3.S \
+                 font.o font.c head.o misc.o $(OBJS)
 
 # Make sure files are removed during clean
-extra-y       += piggy.gzip piggy.lzo piggy.lzma lib1funcs.S $(libfdt) $(libfdt_hdrs)
+extra-y       += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern \
+                 lib1funcs.S ashldi3.S $(libfdt) $(libfdt_hdrs)
 
 ifeq ($(CONFIG_FUNCTION_TRACER),y)
 ORIG_CFLAGS := $(KBUILD_CFLAGS)
@@ -151,6 +154,12 @@ lib1funcs = $(obj)/lib1funcs.o
 $(obj)/lib1funcs.S: $(srctree)/arch/$(SRCARCH)/lib/lib1funcs.S
         $(call cmd,shipped)
 
+# For __aeabi_llsl
+ashldi3 = $(obj)/ashldi3.o
+
+$(obj)/ashldi3.S: $(srctree)/arch/$(SRCARCH)/lib/ashldi3.S
+        $(call cmd,shipped)
+
 # We need to prevent any GOTOFF relocs being used with references
 # to symbols in the .bss section since we cannot relocate them
 # independently from the rest at run time.  This can be achieved by
@@ -172,7 +181,7 @@ if [ $(words $(ZRELADDR)) -gt 1 -a "$(CONFIG_AUTO_ZRELADDR)" = "" ]; then \
 fi
 
 $(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.$(suffix_y).o \
-                $(addprefix $(obj)/, $(OBJS)) $(lib1funcs) FORCE
+                $(addprefix $(obj)/, $(OBJS)) $(lib1funcs) $(ashldi3) FORCE
         @$(check_for_multiple_zreladdr)
         $(call if_changed,ld)
         @$(check_for_bad_syms)
diff --git a/arch/arm/boot/compressed/decompress.c b/arch/arm/boot/compressed/decompress.c
index 07be5a2f8302..f41b38cafce8 100644
--- a/arch/arm/boot/compressed/decompress.c
+++ b/arch/arm/boot/compressed/decompress.c
@@ -44,6 +44,12 @@ extern void error(char *);
 #include "../../../../lib/decompress_unlzma.c"
 #endif
 
+#ifdef CONFIG_KERNEL_XZ
+#define memmove memmove
+#define memcpy memcpy
+#include "../../../../lib/decompress_unxz.c"
+#endif
+
 int do_decompress(u8 *input, int len, u8 *output, void (*error)(char *x))
 {
         return decompress(input, len, NULL, NULL, output, NULL, error);
diff --git a/arch/arm/boot/compressed/piggy.xzkern.S b/arch/arm/boot/compressed/piggy.xzkern.S
new file mode 100644
index 000000000000..5703f300d027
--- /dev/null
+++ b/arch/arm/boot/compressed/piggy.xzkern.S
@@ -0,0 +1,6 @@
+        .section .piggydata,#alloc
+        .globl  input_data
+input_data:
+        .incbin "arch/arm/boot/compressed/piggy.xzkern"
+        .globl  input_data_end
+input_data_end:
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index a100db03ec90..799ad1889b51 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -35,7 +35,7 @@
                 };
         };
 
-        memory@20000000 {
+        memory {
                 reg = <0x20000000 0x08000000>;
         };
 
@@ -59,6 +59,26 @@
                                 reg = <0xfffff000 0x200>;
                         };
 
+                        ramc0: ramc@ffffea00 {
+                                compatible = "atmel,at91sam9260-sdramc";
+                                reg = <0xffffea00 0x200>;
+                        };
+
+                        pmc: pmc@fffffc00 {
+                                compatible = "atmel,at91rm9200-pmc";
+                                reg = <0xfffffc00 0x100>;
+                        };
+
+                        rstc@fffffd00 {
+                                compatible = "atmel,at91sam9260-rstc";
+                                reg = <0xfffffd00 0x10>;
+                        };
+
+                        shdwc@fffffd10 {
+                                compatible = "atmel,at91sam9260-shdwc";
+                                reg = <0xfffffd10 0x10>;
+                        };
+
                         pit: timer@fffffd30 {
                                 compatible = "atmel,at91sam9260-pit";
                                 reg = <0xfffffd30 0xf>;
@@ -171,6 +191,49 @@
                                 interrupts = <21 4>;
                                 status = "disabled";
                         };
+
+                        usb1: gadget@fffa4000 {
+                                compatible = "atmel,at91rm9200-udc";
+                                reg = <0xfffa4000 0x4000>;
+                                interrupts = <10 4>;
+                                status = "disabled";
+                        };
+                };
+
+                nand0: nand@40000000 {
+                        compatible = "atmel,at91rm9200-nand";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x40000000 0x10000000
+                               0xffffe800 0x200
+                              >;
+                        atmel,nand-addr-offset = <21>;
+                        atmel,nand-cmd-offset = <22>;
+                        gpios = <&pioC 13 0
+                                 &pioC 14 0
+                                 0
+                                >;
+                        status = "disabled";
                 };
+
+                usb0: ohci@00500000 {
+                        compatible = "atmel,at91rm9200-ohci", "usb-ohci";
+                        reg = <0x00500000 0x100000>;
+                        interrupts = <20 4>;
+                        status = "disabled";
+                };
+        };
+
+        i2c@0 {
+                compatible = "i2c-gpio";
+                gpios = <&pioA 23 0 /* sda */
+                         &pioA 24 0 /* scl */
+                        >;
+                i2c-gpio,sda-open-drain;
+                i2c-gpio,scl-open-drain;
+                i2c-gpio,delay-us = <2>;        /* ~100 kHz */
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
         };
 };
diff --git a/arch/arm/boot/dts/at91sam9g25ek.dts b/arch/arm/boot/dts/at91sam9g25ek.dts
index e64eb932083b..7829a4d0cb22 100644
--- a/arch/arm/boot/dts/at91sam9g25ek.dts
+++ b/arch/arm/boot/dts/at91sam9g25ek.dts
@@ -15,7 +15,7 @@
         compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
 
         chosen {
-                bootargs = "128M console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
+                bootargs = "128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
         };
 
         ahb {
@@ -33,5 +33,17 @@
                                 status = "okay";
                         };
                 };
+
+                usb0: ohci@00600000 {
+                        status = "okay";
+                        num-ports = <2>;
+                        atmel,vbus-gpio = <&pioD 19 1
+                                           &pioD 20 1
+                                          >;
+                };
+
+                usb1: ehci@00700000 {
+                        status = "okay";
+                };
         };
 };
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index f779667159b1..9e6eb6ecea0e 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -36,7 +36,7 @@
                 };
         };
 
-        memory@70000000 {
+        memory {
                 reg = <0x70000000 0x10000000>;
         };
 
@@ -60,6 +60,22 @@
                                 reg = <0xfffff000 0x200>;
                         };
 
+                        ramc0: ramc@ffffe400 {
+                                compatible = "atmel,at91sam9g45-ddramc";
+                                reg = <0xffffe400 0x200
+                                       0xffffe600 0x200>;
+                        };
+
+                        pmc: pmc@fffffc00 {
+                                compatible = "atmel,at91rm9200-pmc";
+                                reg = <0xfffffc00 0x100>;
+                        };
+
+                        rstc@fffffd00 {
+                                compatible = "atmel,at91sam9g45-rstc";
+                                reg = <0xfffffd00 0x10>;
+                        };
+
                         pit: timer@fffffd30 {
                                 compatible = "atmel,at91sam9260-pit";
                                 reg = <0xfffffd30 0xf>;
@@ -67,6 +83,11 @@
                         };
 
 
+                        shdwc@fffffd10 {
+                                compatible = "atmel,at91sam9rl-shdwc";
+                                reg = <0xfffffd10 0x10>;
+                        };
+
                         tcb0: timer@fff7c000 {
                                 compatible = "atmel,at91rm9200-tcb";
                                 reg = <0xfff7c000 0x100>;
@@ -180,5 +201,48 @@
                                 status = "disabled";
                         };
                 };
+
+                nand0: nand@40000000 {
+                        compatible = "atmel,at91rm9200-nand";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x40000000 0x10000000
+                               0xffffe200 0x200
+                              >;
+                        atmel,nand-addr-offset = <21>;
+                        atmel,nand-cmd-offset = <22>;
+                        gpios = <&pioC 8 0
+                                 &pioC 14 0
+                                 0
+                                >;
+                        status = "disabled";
+                };
+
+                usb0: ohci@00700000 {
+                        compatible = "atmel,at91rm9200-ohci", "usb-ohci";
+                        reg = <0x00700000 0x100000>;
+                        interrupts = <22 4>;
+                        status = "disabled";
+                };
+
+                usb1: ehci@00800000 {
+                        compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
+                        reg = <0x00800000 0x100000>;
+                        interrupts = <22 4>;
+                        status = "disabled";
+                };
+        };
+
+        i2c@0 {
+                compatible = "i2c-gpio";
+                gpios = <&pioA 20 0 /* sda */
+                         &pioA 21 0 /* scl */
+                        >;
+                i2c-gpio,sda-open-drain;
+                i2c-gpio,scl-open-drain;
+                i2c-gpio,delay-us = <5>;        /* ~100 kHz */
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
         };
 };
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 15e25f903cad..a3633bd13111 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -14,13 +14,24 @@
         compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9";
 
         chosen {
-                bootargs = "mem=64M console=ttyS0,115200 mtdparts=atmel_nand:4M(bootstrap/uboot/kernel)ro,60M(rootfs),-(data) root=/dev/mtdblock1 rw rootfstype=jffs2";
+                bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2";
         };
 
-        memory@70000000 {
+        memory {
                 reg = <0x70000000 0x4000000>;
         };
 
+        clocks {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                main_clock: clock@0 {
+                        compatible = "atmel,osc", "fixed-clock";
+                        clock-frequency = <12000000>;
+                };
+        };
+
         ahb {
                 apb {
                         dbgu: serial@ffffee00 {
@@ -36,6 +47,39 @@
                                 status = "okay";
                         };
                 };
+
+                nand0: nand@40000000 {
+                        nand-bus-width = <8>;
+                        nand-ecc-mode = "soft";
+                        nand-on-flash-bbt;
+                        status = "okay";
+
+                        boot@0 {
+                                label = "bootstrap/uboot/kernel";
+                                reg = <0x0 0x400000>;
+                        };
+
+                        rootfs@400000 {
+                                label = "rootfs";
+                                reg = <0x400000 0x3C00000>;
+                        };
+
+                        data@4000000 {
+                                label = "data";
+                                reg = <0x4000000 0xC000000>;
+                        };
+                };
+
+                usb0: ohci@00700000 {
+                        status = "okay";
+                        num-ports = <2>;
+                        atmel,vbus-gpio = <&pioD 1 1
+                                           &pioD 3 1>;
+                };
+
+                usb1: ehci@00800000 {
+                        status = "okay";
+                };
         };
 
         leds {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index a02e636d8a57..70ab3a4e026f 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -34,7 +34,7 @@
                 };
         };
 
-        memory@20000000 {
+        memory {
                 reg = <0x20000000 0x10000000>;
         };
 
@@ -58,6 +58,26 @@
                                 reg = <0xfffff000 0x200>;
                         };
 
+                        ramc0: ramc@ffffe800 {
+                                compatible = "atmel,at91sam9g45-ddramc";
+                                reg = <0xffffe800 0x200>;
+                        };
+
+                        pmc: pmc@fffffc00 {
+                                compatible = "atmel,at91rm9200-pmc";
+                                reg = <0xfffffc00 0x100>;
+                        };
+
+                        rstc@fffffe00 {
+                                compatible = "atmel,at91sam9g45-rstc";
+                                reg = <0xfffffe00 0x10>;
+                        };
+
+                        shdwc@fffffe10 {
+                                compatible = "atmel,at91sam9x5-shdwc";
+                                reg = <0xfffffe10 0x10>;
+                        };
+
                         pit: timer@fffffe30 {
                                 compatible = "atmel,at91sam9260-pit";
                                 reg = <0xfffffe30 0xf>;
@@ -172,5 +192,73 @@
                                 status = "disabled";
                         };
                 };
+
+                nand0: nand@40000000 {
+                        compatible = "atmel,at91rm9200-nand";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x40000000 0x10000000
+                              >;
+                        atmel,nand-addr-offset = <21>;
+                        atmel,nand-cmd-offset = <22>;
+                        gpios = <&pioD 5 0
+                                 &pioD 4 0
+                                 0
+                                >;
+                        status = "disabled";
+                };
+
+                usb0: ohci@00600000 {
+                        compatible = "atmel,at91rm9200-ohci", "usb-ohci";
+                        reg = <0x00600000 0x100000>;
+                        interrupts = <22 4>;
+                        status = "disabled";
+                };
+
+                usb1: ehci@00700000 {
+                        compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
+                        reg = <0x00700000 0x100000>;
+                        interrupts = <22 4>;
+                        status = "disabled";
+                };
+        };
+
+        i2c@0 {
+                compatible = "i2c-gpio";
+                gpios = <&pioA 30 0 /* sda */
+                         &pioA 31 0 /* scl */
+                        >;
+                i2c-gpio,sda-open-drain;
+                i2c-gpio,scl-open-drain;
+                i2c-gpio,delay-us = <2>;        /* ~100 kHz */
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        i2c@1 {
+                compatible = "i2c-gpio";
+                gpios = <&pioC 0 0 /* sda */
+                         &pioC 1 0 /* scl */
+                        >;
+                i2c-gpio,sda-open-drain;
+                i2c-gpio,scl-open-drain;
+                i2c-gpio,delay-us = <2>;        /* ~100 kHz */
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
+
+        i2c@2 {
+                compatible = "i2c-gpio";
+                gpios = <&pioB 4 0 /* sda */
+                         &pioB 5 0 /* scl */
+                        >;
+                i2c-gpio,sda-open-drain;
+                i2c-gpio,scl-open-drain;
+                i2c-gpio,delay-us = <2>;        /* ~100 kHz */
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
         };
 };
diff --git a/arch/arm/boot/dts/at91sam9x5cm.dtsi b/arch/arm/boot/dts/at91sam9x5cm.dtsi
index 64ae3e890259..31e7be23703d 100644
--- a/arch/arm/boot/dts/at91sam9x5cm.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5cm.dtsi
@@ -8,10 +8,55 @@
  */
 
 / {
-        memory@20000000 {
+        memory {
                 reg = <0x20000000 0x8000000>;
         };
 
+        clocks {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                main_clock: clock@0 {
+                        compatible = "atmel,osc", "fixed-clock";
+                        clock-frequency = <12000000>;
+                };
+        };
+
+        ahb {
+                nand0: nand@40000000 {
+                        nand-bus-width = <8>;
+                        nand-ecc-mode = "soft";
+                        nand-on-flash-bbt;
+                        status = "okay";
+
+                        at91bootstrap@0 {
+                                label = "at91bootstrap";
+                                reg = <0x0 0x40000>;
+                        };
+
+                        uboot@40000 {
+                                label = "u-boot";
+                                reg = <0x40000 0x80000>;
+                        };
+
+                        ubootenv@c0000 {
+                                label = "U-Boot Env";
+                                reg = <0xc0000 0x140000>;
+                        };
+
+                        kernel@200000 {
+                                label = "kernel";
+                                reg = <0x200000 0x600000>;
+                        };
+
+                        rootfs@800000 {
+                                label = "rootfs";
+                                reg = <0x800000 0x1f800000>;
+                        };
+                };
+        };
+
         leds {
                 compatible = "gpio-leds";
 
diff --git a/arch/arm/boot/dts/db8500.dtsi b/arch/arm/boot/dts/db8500.dtsi
new file mode 100644
index 000000000000..d73dce645667
--- /dev/null
+++ b/arch/arm/boot/dts/db8500.dtsi
@@ -0,0 +1,275 @@
+/*
+ * Copyright 2012 Linaro Ltd
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+        soc-u9500 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "stericsson,db8500";
+                interrupt-parent = <&intc>;
+                ranges;
+
+                intc: interrupt-controller@a0411000 {
+                        compatible = "arm,cortex-a9-gic";
+                        #interrupt-cells = <3>;
+                        #address-cells = <1>;
+                        interrupt-controller;
+                        interrupt-parent;
+                        reg = <0xa0411000 0x1000>,
+                              <0xa0410100 0x100>;
+                };
+
+                L2: l2-cache {
+                        compatible = "arm,pl310-cache";
+                        reg = <0xa0412000 0x1000>;
+                        interrupts = <0 13 4>;
+                        cache-unified;
+                        cache-level = <2>;
+                };
+
+                pmu {
+                        compatible = "arm,cortex-a9-pmu";
+                        interrupts = <0 7 0x4>;
+                };
+
+                timer@a0410600 {
+                        compatible = "arm,cortex-a9-twd-timer";
+                        reg = <0xa0410600 0x20>;
+                        interrupts = <1 13 0x304>;
+                };
+
+                rtc@80154000 {
+                        compatible = "stericsson,db8500-rtc";
+                        reg = <0x80154000 0x1000>;
+                        interrupts = <0 18 0x4>;
+                };
+
+                gpio0: gpio@8012e000 {
+                        compatible = "stericsson,db8500-gpio",
+                                "stmicroelectronics,nomadik-gpio";
+                        reg =  <0x8012e000 0x80>;
+                        interrupts = <0 119 0x4>;
+                        supports-sleepmode;
+                        gpio-controller;
+                };
+
+                gpio1: gpio@8012e080 {
+                        compatible = "stericsson,db8500-gpio",
+                                "stmicroelectronics,nomadik-gpio";
+                        reg =  <0x8012e080 0x80>;
+                        interrupts = <0 120 0x4>;
+                        supports-sleepmode;
+                        gpio-controller;
+                };
+
+                gpio2: gpio@8000e000 {
+                        compatible = "stericsson,db8500-gpio",
+                                "stmicroelectronics,nomadik-gpio";
+                        reg =  <0x8000e000 0x80>;
+                        interrupts = <0 121 0x4>;
+                        supports-sleepmode;
+                        gpio-controller;
+                };
+
+                gpio3: gpio@8000e080 {
+                        compatible = "stericsson,db8500-gpio",
+                                "stmicroelectronics,nomadik-gpio";
+                        reg =  <0x8000e080 0x80>;
+                        interrupts = <0 122 0x4>;
+                        supports-sleepmode;
+                        gpio-controller;
+                };
+
+                gpio4: gpio@8000e100 {
+                        compatible = "stericsson,db8500-gpio",
+                                "stmicroelectronics,nomadik-gpio";
+                        reg =  <0x8000e100 0x80>;
+                        interrupts = <0 123 0x4>;
+                        supports-sleepmode;
+                        gpio-controller;
+                };
+
+                gpio5: gpio@8000e180 {
+                        compatible = "stericsson,db8500-gpio",
+                                "stmicroelectronics,nomadik-gpio";
+                        reg =  <0x8000e180 0x80>;
+                        interrupts = <0 124 0x4>;
+                        supports-sleepmode;
+                        gpio-controller;
+                };
+
+                gpio6: gpio@8011e000 {
+                        compatible = "stericsson,db8500-gpio",
+                                "stmicroelectronics,nomadik-gpio";
+                        reg =  <0x8011e000 0x80>;
+                        interrupts = <0 125 0x4>;
+                        supports-sleepmode;
+                        gpio-controller;
+                };
+
+                gpio7: gpio@8011e080 {
+                        compatible = "stericsson,db8500-gpio",
+                                "stmicroelectronics,nomadik-gpio";
+                        reg =  <0x8011e080 0x80>;
+                        interrupts = <0 126 0x4>;
+                        supports-sleepmode;
+                        gpio-controller;
+                };
+
+                gpio8: gpio@a03fe000 {
+                        compatible = "stericsson,db8500-gpio",
+                                "stmicroelectronics,nomadik-gpio";
+                        reg =  <0xa03fe000 0x80>;
+                        interrupts = <0 127 0x4>;
+                        supports-sleepmode;
+                        gpio-controller;
+                };
+
+                usb@a03e0000 {
+                        compatible = "stericsson,db8500-musb",
+                                "mentor,musb";
+                        reg = <0xa03e0000 0x10000>;
+                        interrupts = <0 23 0x4>;
+                };
+
+                dma-controller@801C0000 {
+                        compatible = "stericsson,db8500-dma40",
+                                        "stericsson,dma40";
+                        reg = <0x801C0000 0x1000 0x40010000 0x800>;
+                        interrupts = <0 25 0x4>;
+                };
+
+                prcmu@80157000 {
+                        compatible = "stericsson,db8500-prcmu";
+                        reg = <0x80157000 0x1000>;
+                        interrupts = <46 47>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        ab8500@5 {
+                                compatible = "stericsson,ab8500";
+                                reg = <5>; /* mailbox 5 is i2c */
+                                interrupts = <0 40 0x4>;
+                        };
+                };
+
+                i2c@80004000 {
+                        compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
+                        reg = <0x80004000 0x1000>;
+                        interrupts = <0 21 0x4>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
+                i2c@80122000 {
+                        compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
+                        reg = <0x80122000 0x1000>;
+                        interrupts = <0 22 0x4>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
+                i2c@80128000 {
+                        compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
+                        reg = <0x80128000 0x1000>;
+                        interrupts = <0 55 0x4>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
+                i2c@80110000 {
+                        compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
+                        reg = <0x80110000 0x1000>;
+                        interrupts = <0 12 0x4>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
+                i2c@8012a000 {
+                        compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
+                        reg = <0x8012a000 0x1000>;
+                        interrupts = <0 51 0x4>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
+                ssp@80002000 {
+                        compatible = "arm,pl022", "arm,primecell";
+                        reg = <80002000 0x1000>;
+                        interrupts = <0 14 0x4>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        status = "disabled";
+
+                        // Add one of these for each child device
+                        cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>;
+
+                };
+
+                uart@80120000 {
+                        compatible = "arm,pl011", "arm,primecell";
+                        reg = <0x80120000 0x1000>;
+                        interrupts = <0 11 0x4>;
+                        status = "disabled";
+                };
+                uart@80121000 {
+                        compatible = "arm,pl011", "arm,primecell";
+                        reg = <0x80121000 0x1000>;
+                        interrupts = <0 19 0x4>;
+                        status = "disabled";
+                };
+                uart@80007000 {
+                        compatible = "arm,pl011", "arm,primecell";
+                        reg = <0x80007000 0x1000>;
+                        interrupts = <0 26 0x4>;
+                        status = "disabled";
+                };
+
+                sdi@80126000 {
+                        compatible = "arm,pl18x", "arm,primecell";
+                        reg = <0x80126000 0x1000>;
+                        interrupts = <0 60 0x4>;
+                        status = "disabled";
+                };
+                sdi@80118000 {
+                        compatible = "arm,pl18x", "arm,primecell";
+                        reg = <0x80118000 0x1000>;
+                        interrupts = <0 50 0x4>;
+                        status = "disabled";
+                };
+                sdi@80005000 {
+                        compatible = "arm,pl18x", "arm,primecell";
+                        reg = <0x80005000 0x1000>;
+                        interrupts = <0 41 0x4>;
+                        status = "disabled";
+                };
+                sdi@80119000 {
+                        compatible = "arm,pl18x", "arm,primecell";
+                        reg = <0x80119000 0x1000>;
+                        interrupts = <0 59 0x4>;
+                        status = "disabled";
+                };
+                sdi@80114000 {
+                        compatible = "arm,pl18x", "arm,primecell";
+                        reg = <0x80114000 0x1000>;
+                        interrupts = <0 99 0x4>;
+                        status = "disabled";
+                };
+                sdi@80008000 {
+                        compatible = "arm,pl18x", "arm,primecell";
+                        reg = <0x80114000 0x1000>;
+                        interrupts = <0 100 0x4>;
+                        status = "disabled";
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
new file mode 100644
index 000000000000..399d17b231d2
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -0,0 +1,26 @@
+/*
+ * SAMSUNG SMDK5250 board device tree source
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ "exynos5250.dtsi"
+
+/ {
+        model = "SAMSUNG SMDK5250 board based on EXYNOS5250";
+        compatible = "samsung,smdk5250", "samsung,exynos5250";
+
+        memory {
+                reg = <0x40000000 0x80000000>;
+        };
+
+        chosen {
+                bootargs = "root=/dev/ram0 rw ramdisk=8192 console=ttySAC1,115200";
+        };
+};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
new file mode 100644
index 000000000000..dfc433599436
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -0,0 +1,413 @@
+/*
+ * SAMSUNG EXYNOS5250 SoC device tree source
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
+ * EXYNOS5250 based board files can include this file and provide
+ * values for board specfic bindings.
+ *
+ * Note: This file does not include device nodes for all the controllers in
+ * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
+ * additional nodes can be added to this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/include/ "skeleton.dtsi"
+
+/ {
+        compatible = "samsung,exynos5250";
+        interrupt-parent = <&gic>;
+
+        gic:interrupt-controller@10490000 {
+                compatible = "arm,cortex-a9-gic";
+                #interrupt-cells = <3>;
+                interrupt-controller;
+                reg = <0x10490000 0x1000>, <0x10480000 0x100>;
+        };
+
+        watchdog {
+                compatible = "samsung,s3c2410-wdt";
+                reg = <0x101D0000 0x100>;
+                interrupts = <0 42 0>;
+        };
+
+        rtc {
+                compatible = "samsung,s3c6410-rtc";
+                reg = <0x101E0000 0x100>;
+                interrupts = <0 43 0>, <0 44 0>;
+        };
+
+        sdhci@12200000 {
+                compatible = "samsung,exynos4210-sdhci";
+                reg = <0x12200000 0x100>;
+                interrupts = <0 75 0>;
+        };
+
+        sdhci@12210000 {
+                compatible = "samsung,exynos4210-sdhci";
+                reg = <0x12210000 0x100>;
+                interrupts = <0 76 0>;
+        };
+
+        sdhci@12220000 {
+                compatible = "samsung,exynos4210-sdhci";
+                reg = <0x12220000 0x100>;
+                interrupts = <0 77 0>;
+        };
+
+        sdhci@12230000 {
+                compatible = "samsung,exynos4210-sdhci";
+                reg = <0x12230000 0x100>;
+                interrupts = <0 78 0>;
+        };
+
+        serial@12C00000 {
+                compatible = "samsung,exynos4210-uart";
+                reg = <0x12C00000 0x100>;
+                interrupts = <0 51 0>;
+        };
+
+        serial@12C10000 {
+                compatible = "samsung,exynos4210-uart";
+                reg = <0x12C10000 0x100>;
+                interrupts = <0 52 0>;
+        };
+
+        serial@12C20000 {
+                compatible = "samsung,exynos4210-uart";
+                reg = <0x12C20000 0x100>;
+                interrupts = <0 53 0>;
+        };
+
+        serial@12C30000 {
+                compatible = "samsung,exynos4210-uart";
+                reg = <0x12C30000 0x100>;
+                interrupts = <0 54 0>;
+        };
+
+        i2c@12C60000 {
+                compatible = "samsung,s3c2440-i2c";
+                reg = <0x12C60000 0x100>;
+                interrupts = <0 56 0>;
+        };
+
+        i2c@12C70000 {
+                compatible = "samsung,s3c2440-i2c";
+                reg = <0x12C70000 0x100>;
+                interrupts = <0 57 0>;
+        };
+
+        i2c@12C80000 {
+                compatible = "samsung,s3c2440-i2c";
+                reg = <0x12C80000 0x100>;
+                interrupts = <0 58 0>;
+        };
+
+        i2c@12C90000 {
+                compatible = "samsung,s3c2440-i2c";
+                reg = <0x12C90000 0x100>;
+                interrupts = <0 59 0>;
+        };
+
+        i2c@12CA0000 {
+                compatible = "samsung,s3c2440-i2c";
+                reg = <0x12CA0000 0x100>;
+                interrupts = <0 60 0>;
+        };
+
+        i2c@12CB0000 {
+                compatible = "samsung,s3c2440-i2c";
+                reg = <0x12CB0000 0x100>;
+                interrupts = <0 61 0>;
+        };
+
+        i2c@12CC0000 {
+                compatible = "samsung,s3c2440-i2c";
+                reg = <0x12CC0000 0x100>;
+                interrupts = <0 62 0>;
+        };
+
+        i2c@12CD0000 {
+                compatible = "samsung,s3c2440-i2c";
+                reg = <0x12CD0000 0x100>;
+                interrupts = <0 63 0>;
+        };
+
+        amba {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "arm,amba-bus";
+                interrupt-parent = <&gic>;
+                ranges;
+
+                pdma0: pdma@121A0000 {
+                        compatible = "arm,pl330", "arm,primecell";
+                        reg = <0x121A0000 0x1000>;
+                        interrupts = <0 34 0>;
+                };
+
+                pdma1: pdma@121B0000 {
+                        compatible = "arm,pl330", "arm,primecell";
+                        reg = <0x121B0000 0x1000>;
+                        interrupts = <0 35 0>;
+                };
+
+                mdma0: pdma@10800000 {
+                        compatible = "arm,pl330", "arm,primecell";
+                        reg = <0x10800000 0x1000>;
+                        interrupts = <0 33 0>;
+                };
+
+                mdma1: pdma@11C10000 {
+                        compatible = "arm,pl330", "arm,primecell";
+                        reg = <0x11C10000 0x1000>;
+                        interrupts = <0 124 0>;
+                };
+        };
+
+        gpio-controllers {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                gpio-controller;
+                ranges;
+
+                gpa0: gpio-controller@11400000 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400000 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpa1: gpio-controller@11400020 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400020 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpa2: gpio-controller@11400040 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400040 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpb0: gpio-controller@11400060 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400060 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpb1: gpio-controller@11400080 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400080 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpb2: gpio-controller@114000A0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x114000A0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpb3: gpio-controller@114000C0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x114000C0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpc0: gpio-controller@114000E0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x114000E0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpc1: gpio-controller@11400100 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400100 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpc2: gpio-controller@11400120 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400120 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpc3: gpio-controller@11400140 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400140 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpd0: gpio-controller@11400160 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400160 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpd1: gpio-controller@11400180 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400180 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpy0: gpio-controller@114001A0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x114001A0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpy1: gpio-controller@114001C0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x114001C0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpy2: gpio-controller@114001E0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x114001E0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpy3: gpio-controller@11400200 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400200 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpy4: gpio-controller@11400220 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400220 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpy5: gpio-controller@11400240 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400240 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpy6: gpio-controller@11400260 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400260 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpx0: gpio-controller@11400C00 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400C00 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpx1: gpio-controller@11400C20 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400C20 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpx2: gpio-controller@11400C40 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400C40 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpx3: gpio-controller@11400C60 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400C60 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpe0: gpio-controller@13400000 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x13400000 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpe1: gpio-controller@13400020 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x13400020 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpf0: gpio-controller@13400040 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x13400040 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpf1: gpio-controller@13400060 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x13400060 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpg0: gpio-controller@13400080 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x13400080 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpg1: gpio-controller@134000A0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x134000A0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpg2: gpio-controller@134000C0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x134000C0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gph0: gpio-controller@134000E0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x134000E0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gph1: gpio-controller@13400100 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x13400100 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpv0: gpio-controller@10D10000 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x10D10000 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpv1: gpio-controller@10D10020 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x10D10020 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpv2: gpio-controller@10D10040 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x10D10040 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpv3: gpio-controller@10D10060 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x10D10060 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpv4: gpio-controller@10D10080 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x10D10080 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpz: gpio-controller@03860000 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x03860000 0x20>;
+                        #gpio-cells = <4>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/kirkwood-dreamplug.dts b/arch/arm/boot/dts/kirkwood-dreamplug.dts
index 8a5dff807b45..a5376b84227f 100644
--- a/arch/arm/boot/dts/kirkwood-dreamplug.dts
+++ b/arch/arm/boot/dts/kirkwood-dreamplug.dts
@@ -4,7 +4,7 @@
 
 / {
         model = "Globalscale Technologies Dreamplug";
-        compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+        compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";
 
         memory {
                 device_type = "memory";
@@ -15,11 +15,10 @@
                 bootargs = "console=ttyS0,115200n8 earlyprintk";
         };
 
-        serial@f1012000 {
-                compatible = "ns16550a";
-                reg = <0xf1012000 0xff>;
-                reg-shift = <2>;
-                interrupts = <33>;
-                clock-frequency = <200000000>;
+        ocp@f1000000 {
+                serial@12000 {
+                        clock-frequency = <200000000>;
+                        status = "ok";
+                };
         };
 };
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 771c6bbeb29a..3474ef890945 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -1,6 +1,36 @@
 /include/ "skeleton.dtsi"
 
 / {
-        compatible = "marvell,kirkwood";
-};
+        compatible = "mrvl,kirkwood";
+
+        ocp@f1000000 {
+                compatible = "simple-bus";
+                ranges = <0 0xf1000000 0x1000000>;
+                #address-cells = <1>;
+                #size-cells = <1>;
+
+                serial@12000 {
+                        compatible = "ns16550a";
+                        reg = <0x12000 0x100>;
+                        reg-shift = <2>;
+                        interrupts = <33>;
+                        /* set clock-frequency in board dts */
+                        status = "disabled";
+                };
 
+                serial@12100 {
+                        compatible = "ns16550a";
+                        reg = <0x12100 0x100>;
+                        reg-shift = <2>;
+                        interrupts = <34>;
+                        /* set clock-frequency in board dts */
+                        status = "disabled";
+                };
+
+                rtc@10300 {
+                        compatible = "mrvl,kirkwood-rtc", "mrvl,orion-rtc";
+                        reg = <0x10300 0x20>;
+                        interrupts = <53>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/snowball.dts b/arch/arm/boot/dts/snowball.dts
new file mode 100644
index 000000000000..359c6d679156
--- /dev/null
+++ b/arch/arm/boot/dts/snowball.dts
@@ -0,0 +1,139 @@
+/*
+ * Copyright 2011 ST-Ericsson AB
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "db8500.dtsi"
+
+/ {
+        model = "Calao Systems Snowball platform with device tree";
+        compatible = "calaosystems,snowball-a9500";
+
+        memory {
+                reg = <0x00000000 0x20000000>;
+        };
+
+        gpio_keys {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                button@1 {
+                        debounce_interval = <50>;
+                        wakeup = <1>;
+                        linux,code = <2>;
+                        label = "userpb";
+                        gpios = <&gpio1 0>;
+                };
+                button@2 {
+                        debounce_interval = <50>;
+                        wakeup = <1>;
+                        linux,code = <3>;
+                        label = "userpb";
+                        gpios = <&gpio4 23>;
+                };
+                button@3 {
+                        debounce_interval = <50>;
+                        wakeup = <1>;
+                        linux,code = <4>;
+                        label = "userpb";
+                        gpios = <&gpio4 23>;
+                };
+                button@4 {
+                        debounce_interval = <50>;
+                        wakeup = <1>;
+                        linux,code = <5>;
+                        label = "userpb";
+                        gpios = <&gpio5 1>;
+                };
+                button@5 {
+                        debounce_interval = <50>;
+                        wakeup = <1>;
+                        linux,code = <6>;
+                        label = "userpb";
+                        gpios = <&gpio5 2>;
+                };
+        };
+
+        leds {
+                compatible = "gpio-leds";
+                used-led {
+                        label = "user_led";
+                        gpios = <&gpio4 14>;
+                };
+        };
+
+        soc-u9500 {
+
+                external-bus@50000000 {
+                        compatible = "simple-bus";
+                        reg = <0x50000000 0x10000000>;
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges;
+
+                        ethernet@50000000 {
+                                compatible = "smsc,9111";
+                                reg = <0x50000000 0x10000>;
+                                interrupts = <12>;
+                                interrupt-parent = <&gpio4>;
+                        };
+                };
+
+                sdi@80126000 {
+                        status = "enabled";
+                        cd-gpios = <&gpio6 26>;
+                };
+
+                sdi@80114000 {
+                        status = "enabled";
+                };
+
+                uart@80120000 {
+                        status = "okay";
+                };
+
+                uart@80121000 {
+                        status = "okay";
+                };
+
+                uart@80007000 {
+                        status = "okay";
+                };
+
+                i2c@80004000 {
+                        tc3589x@42 {
+                                //compatible = "tc3589x";
+                                reg = <0x42>;
+                                interrupts = <25>;
+                                interrupt-parent = <&gpio6>;
+                        };
+                        tps61052@33 {
+                                //compatible = "tps61052";
+                                reg = <0x33>;
+                        };
+                };
+
+                i2c@80128000 {
+                        lp5521@0x33 {
+                                // compatible = "lp5521";
+                                reg = <0x33>;
+                        };
+                        lp5521@0x34 {
+                                // compatible = "lp5521";
+                                reg = <0x34>;
+                        };
+                        bh1780@0x29 {
+                                // compatible = "rohm,bh1780gli";
+                                reg = <0x33>;
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/spear600-evb.dts b/arch/arm/boot/dts/spear600-evb.dts
new file mode 100644
index 000000000000..636292e18c90
--- /dev/null
+++ b/arch/arm/boot/dts/spear600-evb.dts
@@ -0,0 +1,47 @@
+/*
+ * Copyright 2012 Stefan Roese <sr@denx.de>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "spear600.dtsi"
+
+/ {
+        model = "ST SPEAr600 Evaluation Board";
+        compatible = "st,spear600-evb", "st,spear600";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        memory {
+                device_type = "memory";
+                reg = <0 0x10000000>;
+        };
+
+        ahb {
+                gmac: ethernet@e0800000 {
+                        phy-mode = "gmii";
+                        status = "okay";
+                };
+
+                apb {
+                        serial@d0000000 {
+                                status = "okay";
+                        };
+
+                        serial@d0080000 {
+                                status = "okay";
+                        };
+
+                        i2c@d0200000 {
+                                clock-frequency = <400000>;
+                                status = "okay";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/spear600.dtsi b/arch/arm/boot/dts/spear600.dtsi
new file mode 100644
index 000000000000..ebe0885a2b98
--- /dev/null
+++ b/arch/arm/boot/dts/spear600.dtsi
@@ -0,0 +1,174 @@
+/*
+ * Copyright 2012 Stefan Roese <sr@denx.de>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+        compatible = "st,spear600";
+
+        cpus {
+                cpu@0 {
+                        compatible = "arm,arm926ejs";
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0 0x40000000>;
+        };
+
+        ahb {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "simple-bus";
+                ranges = <0xd0000000 0xd0000000 0x30000000>;
+
+                vic0: interrupt-controller@f1100000 {
+                        compatible = "arm,pl190-vic";
+                        interrupt-controller;
+                        reg = <0xf1100000 0x1000>;
+                        #interrupt-cells = <1>;
+                };
+
+                vic1: interrupt-controller@f1000000 {
+                        compatible = "arm,pl190-vic";
+                        interrupt-controller;
+                        reg = <0xf1000000 0x1000>;
+                        #interrupt-cells = <1>;
+                };
+
+                gmac: ethernet@e0800000 {
+                        compatible = "st,spear600-gmac";
+                        reg = <0xe0800000 0x8000>;
+                        interrupt-parent = <&vic1>;
+                        interrupts = <24 23>;
+                        interrupt-names = "macirq", "eth_wake_irq";
+                        status = "disabled";
+                };
+
+                fsmc: flash@d1800000 {
+                        compatible = "st,spear600-fsmc-nand";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0xd1800000 0x1000        /* FSMC Register */
+                               0xd2000000 0x4000>;      /* NAND Base */
+                        reg-names = "fsmc_regs", "nand_data";
+                        st,ale-off = <0x20000>;
+                        st,cle-off = <0x10000>;
+                        status = "disabled";
+                };
+
+                smi: flash@fc000000 {
+                        compatible = "st,spear600-smi";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0xfc000000 0x1000>;
+                        interrupt-parent = <&vic1>;
+                        interrupts = <12>;
+                        status = "disabled";
+                };
+
+                ehci@e1800000 {
+                        compatible = "st,spear600-ehci", "usb-ehci";
+                        reg = <0xe1800000 0x1000>;
+                        interrupt-parent = <&vic1>;
+                        interrupts = <27>;
+                        status = "disabled";
+                };
+
+                ehci@e2000000 {
+                        compatible = "st,spear600-ehci", "usb-ehci";
+                        reg = <0xe2000000 0x1000>;
+                        interrupt-parent = <&vic1>;
+                        interrupts = <29>;
+                        status = "disabled";
+                };
+
+                ohci@e1900000 {
+                        compatible = "st,spear600-ohci", "usb-ohci";
+                        reg = <0xe1900000 0x1000>;
+                        interrupt-parent = <&vic1>;
+                        interrupts = <26>;
+                        status = "disabled";
+                };
+
+                ohci@e2100000 {
+                        compatible = "st,spear600-ohci", "usb-ohci";
+                        reg = <0xe2100000 0x1000>;
+                        interrupt-parent = <&vic1>;
+                        interrupts = <28>;
+                        status = "disabled";
+                };
+
+                apb {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "simple-bus";
+                        ranges = <0xd0000000 0xd0000000 0x30000000>;
+
+                        serial@d0000000 {
+                                compatible = "arm,pl011", "arm,primecell";
+                                reg = <0xd0000000 0x1000>;
+                                interrupt-parent = <&vic0>;
+                                interrupts = <24>;
+                                status = "disabled";
+                        };
+
+                        serial@d0080000 {
+                                compatible = "arm,pl011", "arm,primecell";
+                                reg = <0xd0080000 0x1000>;
+                                interrupt-parent = <&vic0>;
+                                interrupts = <25>;
+                                status = "disabled";
+                        };
+
+                        /* local/cpu GPIO */
+                        gpio0: gpio@f0100000 {
+                                #gpio-cells = <2>;
+                                compatible = "arm,pl061", "arm,primecell";
+                                gpio-controller;
+                                reg = <0xf0100000 0x1000>;
+                                interrupt-parent = <&vic0>;
+                                interrupts = <18>;
+                        };
+
+                        /* basic GPIO */
+                        gpio1: gpio@fc980000 {
+                                #gpio-cells = <2>;
+                                compatible = "arm,pl061", "arm,primecell";
+                                gpio-controller;
+                                reg = <0xfc980000 0x1000>;
+                                interrupt-parent = <&vic1>;
+                                interrupts = <19>;
+                        };
+
+                        /* appl GPIO */
+                        gpio2: gpio@d8100000 {
+                                #gpio-cells = <2>;
+                                compatible = "arm,pl061", "arm,primecell";
+                                gpio-controller;
+                                reg = <0xd8100000 0x1000>;
+                                interrupt-parent = <&vic1>;
+                                interrupts = <4>;
+                        };
+
+                        i2c@d0200000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "snps,designware-i2c";
+                                reg = <0xd0200000 0x1000>;
+                                interrupt-parent = <&vic0>;
+                                interrupts = <28>;
+                                status = "disabled";
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/tegra-cardhu.dts b/arch/arm/boot/dts/tegra-cardhu.dts
index 73263501f581..ac3fb7558459 100644
--- a/arch/arm/boot/dts/tegra-cardhu.dts
+++ b/arch/arm/boot/dts/tegra-cardhu.dts
@@ -14,6 +14,22 @@
                 clock-frequency = < 408000000 >;
         };
 
+        serial@70006040 {
+                status = "disable";
+        };
+
+        serial@70006200 {
+                status = "disable";
+        };
+
+        serial@70006300 {
+                status = "disable";
+        };
+
+        serial@70006400 {
+                status = "disable";
+        };
+
         i2c@7000c000 {
                 clock-frequency = <100000>;
         };
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
index 876d5c92ce36..dbf1c5a171c2 100644
--- a/arch/arm/boot/dts/tegra-seaboard.dts
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -112,6 +112,7 @@
 
         usb@c5000000 {
                 nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
+                dr_mode = "otg";
         };
 
         gpio-keys {
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index aff8a175aa40..108e894a8926 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -190,6 +190,7 @@
                 reg = <0xc5000000 0x4000>;
                 interrupts = < 0 20 0x04 >;
                 phy_type = "utmi";
+                nvidia,has-legacy-mode;
         };
 
         usb@c5004000 {
diff --git a/arch/arm/boot/dts/usb_a9g20-dab-mmx.dtsi b/arch/arm/boot/dts/usb_a9g20-dab-mmx.dtsi
new file mode 100644
index 000000000000..ad3eca17c436
--- /dev/null
+++ b/arch/arm/boot/dts/usb_a9g20-dab-mmx.dtsi
@@ -0,0 +1,96 @@
+/*
+ * calao-dab-mmx.dtsi - Device Tree Include file for Calao DAB-MMX Daughter Board
+ *
+ * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Licensed under GPLv2.
+ */
+
+/ {
+        ahb {
+                apb {
+                        usart1: serial@fffb4000 {
+                                status = "okay";
+                        };
+
+                        usart3: serial@fffd0000 {
+                                status = "okay";
+                        };
+                };
+        };
+
+        i2c-gpio@0 {
+                status = "okay";
+        };
+
+        leds {
+                compatible = "gpio-leds";
+
+                user_led1 {
+                        label = "user_led1";
+                        gpios = <&pioB 20 1>;
+                };
+
+/*
+* led already used by mother board but active as high
+*               user_led2 {
+*                       label = "user_led2";
+*                       gpios = <&pioB 21 1>;
+*               };
+*/
+                user_led3 {
+                        label = "user_led3";
+                        gpios = <&pioB 22 1>;
+                };
+
+                user_led4 {
+                        label = "user_led4";
+                        gpios = <&pioB 23 1>;
+                };
+
+                red {
+                        label = "red";
+                        gpios = <&pioB 24 1>;
+                };
+
+                orange {
+                        label = "orange";
+                        gpios = <&pioB 30 1>;
+                };
+
+                green {
+                        label = "green";
+                        gpios = <&pioB 31 1>;
+                };
+        };
+
+        gpio_keys {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                user_pb1 {
+                        label = "user_pb1";
+                        gpios = <&pioB 25 1>;
+                        linux,code = <0x100>;
+                };
+
+                user_pb2 {
+                        label = "user_pb2";
+                        gpios = <&pioB 13 1>;
+                        linux,code = <0x101>;
+                };
+
+                user_pb3 {
+                        label = "user_pb3";
+                        gpios = <&pioA 26 1>;
+                        linux,code = <0x102>;
+                };
+
+                user_pb4 {
+                        label = "user_pb4";
+                        gpios = <&pioC 9 1>;
+                        linux,code = <0x103>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/usb_a9g20.dts b/arch/arm/boot/dts/usb_a9g20.dts
index d74545a2a77c..7c2399c532e5 100644
--- a/arch/arm/boot/dts/usb_a9g20.dts
+++ b/arch/arm/boot/dts/usb_a9g20.dts
@@ -13,13 +13,24 @@
         compatible = "calao,usb-a9g20", "atmel,at91sam9g20", "atmel,at91sam9";
 
         chosen {
-                bootargs = "mem=64M console=ttyS0,115200 mtdparts=atmel_nand:128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),4M(kernel),120M(rootfs),-(data) root=/dev/mtdblock5 rw rootfstype=ubifs";
+                bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
         };
 
-        memory@20000000 {
+        memory {
                 reg = <0x20000000 0x4000000>;
         };
 
+        clocks {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                main_clock: clock@0 {
+                        compatible = "atmel,osc", "fixed-clock";
+                        clock-frequency = <12000000>;
+                };
+        };
+
         ahb {
                 apb {
                         dbgu: serial@fffff200 {
@@ -30,6 +41,58 @@
                                 phy-mode = "rmii";
                                 status = "okay";
                         };
+
+                        usb1: gadget@fffa4000 {
+                                atmel,vbus-gpio = <&pioC 5 0>;
+                                status = "okay";
+                        };
+                };
+
+                nand0: nand@40000000 {
+                        nand-bus-width = <8>;
+                        nand-ecc-mode = "soft";
+                        nand-on-flash-bbt;
+                        status = "okay";
+
+                        at91bootstrap@0 {
+                                label = "at91bootstrap";
+                                reg = <0x0 0x20000>;
+                        };
+
+                        barebox@20000 {
+                                label = "barebox";
+                                reg = <0x20000 0x40000>;
+                        };
+
+                        bareboxenv@60000 {
+                                label = "bareboxenv";
+                                reg = <0x60000 0x20000>;
+                        };
+
+                        bareboxenv2@80000 {
+                                label = "bareboxenv2";
+                                reg = <0x80000 0x20000>;
+                        };
+
+                        kernel@a0000 {
+                                label = "kernel";
+                                reg = <0xa0000 0x400000>;
+                        };
+
+                        rootfs@4a0000 {
+                                label = "rootfs";
+                                reg = <0x4a0000 0x7800000>;
+                        };
+
+                        data@7ca0000 {
+                                label = "data";
+                                reg = <0x7ca0000 0x8360000>;
+                        };
+                };
+
+                usb0: ohci@00500000 {
+                        num-ports = <2>;
+                        status = "okay";
                 };
         };
 
@@ -55,4 +118,13 @@
                         gpio-key,wakeup;
                 };
         };
+
+        i2c@0 {
+                status = "okay";
+
+                rv3029c2@56 {
+                        compatible = "rv3029c2";
+                        reg = <0x56>;
+                };
+        };
 };
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 81a933eb0903..283fa1d804f4 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -24,9 +24,6 @@ config ARM_VIC_NR
 config ICST
         bool
 
-config PL330
-        bool
-
 config SA1111
         bool
         select DMABOUNCE if !ARCH_PXA
@@ -35,9 +32,6 @@ config DMABOUNCE
         bool
         select ZONE_DMA
 
-config TIMER_ACORN
-        bool
-
 config SHARP_LOCOMO
         bool
 
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index 6ea9b6f3607a..215816f1775f 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -5,11 +5,9 @@
 obj-$(CONFIG_ARM_GIC)           += gic.o
 obj-$(CONFIG_ARM_VIC)           += vic.o
 obj-$(CONFIG_ICST)              += icst.o
-obj-$(CONFIG_PL330)             += pl330.o
 obj-$(CONFIG_SA1111)            += sa1111.o
 obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o
 obj-$(CONFIG_DMABOUNCE)         += dmabounce.o
-obj-$(CONFIG_TIMER_ACORN)       += time-acorn.o
 obj-$(CONFIG_SHARP_LOCOMO)      += locomo.o
 obj-$(CONFIG_SHARP_PARAM)       += sharpsl_param.o
 obj-$(CONFIG_SHARP_SCOOP)       += scoop.o
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index f0783be17352..aa5269984187 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -686,13 +686,12 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
          * For primary GICs, skip over SGIs.
          * For secondary GICs, skip over PPIs, too.
          */
-        hwirq_base = 32;
-        if (gic_nr == 0) {
-                if ((irq_start & 31) > 0) {
-                        hwirq_base = 16;
-                        if (irq_start != -1)
-                                irq_start = (irq_start & ~31) + 16;
-                }
+        if (gic_nr == 0 && (irq_start & 31) > 0) {
+                hwirq_base = 16;
+                if (irq_start != -1)
+                        irq_start = (irq_start & ~31) + 16;
+        } else {
+                hwirq_base = 32;
         }
 
         /*
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c
deleted file mode 100644
index ff3ad2244824..000000000000
--- a/arch/arm/common/pl330.c
+++ /dev/null
@@ -1,1960 +0,0 @@
-/* linux/arch/arm/common/pl330.c
- *
- * Copyright (C) 2010 Samsung Electronics Co Ltd.
- *      Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/module.h>
-#include <linux/string.h>
-#include <linux/io.h>
-#include <linux/delay.h>
-#include <linux/interrupt.h>
-#include <linux/dma-mapping.h>
-
-#include <asm/hardware/pl330.h>
-
-/* Register and Bit field Definitions */
-#define DS              0x0
-#define DS_ST_STOP      0x0
-#define DS_ST_EXEC      0x1
-#define DS_ST_CMISS     0x2
-#define DS_ST_UPDTPC    0x3
-#define DS_ST_WFE       0x4
-#define DS_ST_ATBRR     0x5
-#define DS_ST_QBUSY     0x6
-#define DS_ST_WFP       0x7
-#define DS_ST_KILL      0x8
-#define DS_ST_CMPLT     0x9
-#define DS_ST_FLTCMP    0xe
-#define DS_ST_FAULT     0xf
-
-#define DPC             0x4
-#define INTEN           0x20
-#define ES              0x24
-#define INTSTATUS       0x28
-#define INTCLR          0x2c
-#define FSM             0x30
-#define FSC             0x34
-#define FTM             0x38
-
-#define _FTC            0x40
-#define FTC(n)          (_FTC + (n)*0x4)
-
-#define _CS             0x100
-#define CS(n)           (_CS + (n)*0x8)
-#define CS_CNS          (1 << 21)
-
-#define _CPC            0x104
-#define CPC(n)          (_CPC + (n)*0x8)
-
-#define _SA             0x400
-#define SA(n)           (_SA + (n)*0x20)
-
-#define _DA             0x404
-#define DA(n)           (_DA + (n)*0x20)
-
-#define _CC             0x408
-#define CC(n)           (_CC + (n)*0x20)
-
-#define CC_SRCINC       (1 << 0)
-#define CC_DSTINC       (1 << 14)
-#define CC_SRCPRI       (1 << 8)
-#define CC_DSTPRI       (1 << 22)
-#define CC_SRCNS        (1 << 9)
-#define CC_DSTNS        (1 << 23)
-#define CC_SRCIA        (1 << 10)
-#define CC_DSTIA        (1 << 24)
-#define CC_SRCBRSTLEN_SHFT      4
-#define CC_DSTBRSTLEN_SHFT      18
-#define CC_SRCBRSTSIZE_SHFT     1
-#define CC_DSTBRSTSIZE_SHFT     15
-#define CC_SRCCCTRL_SHFT        11
-#define CC_SRCCCTRL_MASK        0x7
-#define CC_DSTCCTRL_SHFT        25
-#define CC_DRCCCTRL_MASK        0x7
-#define CC_SWAP_SHFT    28
-
-#define _LC0            0x40c
-#define LC0(n)          (_LC0 + (n)*0x20)
-
-#define _LC1            0x410
-#define LC1(n)          (_LC1 + (n)*0x20)
-
-#define DBGSTATUS       0xd00
-#define DBG_BUSY        (1 << 0)
-
-#define DBGCMD          0xd04
-#define DBGINST0        0xd08
-#define DBGINST1        0xd0c
-
-#define CR0             0xe00
-#define CR1             0xe04
-#define CR2             0xe08
-#define CR3             0xe0c
-#define CR4             0xe10
-#define CRD             0xe14
-
-#define PERIPH_ID       0xfe0
-#define PCELL_ID        0xff0
-
-#define CR0_PERIPH_REQ_SET      (1 << 0)
-#define CR0_BOOT_EN_SET         (1 << 1)
-#define CR0_BOOT_MAN_NS         (1 << 2)
-#define CR0_NUM_CHANS_SHIFT     4
-#define CR0_NUM_CHANS_MASK      0x7
-#define CR0_NUM_PERIPH_SHIFT    12
-#define CR0_NUM_PERIPH_MASK     0x1f
-#define CR0_NUM_EVENTS_SHIFT    17
-#define CR0_NUM_EVENTS_MASK     0x1f
-
-#define CR1_ICACHE_LEN_SHIFT    0
-#define CR1_ICACHE_LEN_MASK     0x7
-#define CR1_NUM_ICACHELINES_SHIFT       4
-#define CR1_NUM_ICACHELINES_MASK        0xf
-
-#define CRD_DATA_WIDTH_SHIFT    0
-#define CRD_DATA_WIDTH_MASK     0x7
-#define CRD_WR_CAP_SHIFT        4
-#define CRD_WR_CAP_MASK         0x7
-#define CRD_WR_Q_DEP_SHIFT      8
-#define CRD_WR_Q_DEP_MASK       0xf
-#define CRD_RD_CAP_SHIFT        12
-#define CRD_RD_CAP_MASK         0x7
-#define CRD_RD_Q_DEP_SHIFT      16
-#define CRD_RD_Q_DEP_MASK       0xf
-#define CRD_DATA_BUFF_SHIFT     20
-#define CRD_DATA_BUFF_MASK      0x3ff
-
-#define PART            0x330
-#define DESIGNER        0x41
-#define REVISION        0x0
-#define INTEG_CFG       0x0
-#define PERIPH_ID_VAL   ((PART << 0) | (DESIGNER << 12))
-
-#define PCELL_ID_VAL    0xb105f00d
-
-#define PL330_STATE_STOPPED             (1 << 0)
-#define PL330_STATE_EXECUTING           (1 << 1)
-#define PL330_STATE_WFE                 (1 << 2)
-#define PL330_STATE_FAULTING            (1 << 3)
-#define PL330_STATE_COMPLETING          (1 << 4)
-#define PL330_STATE_WFP                 (1 << 5)
-#define PL330_STATE_KILLING             (1 << 6)
-#define PL330_STATE_FAULT_COMPLETING    (1 << 7)
-#define PL330_STATE_CACHEMISS           (1 << 8)
-#define PL330_STATE_UPDTPC              (1 << 9)
-#define PL330_STATE_ATBARRIER           (1 << 10)
-#define PL330_STATE_QUEUEBUSY           (1 << 11)
-#define PL330_STATE_INVALID             (1 << 15)
-
-#define PL330_STABLE_STATES (PL330_STATE_STOPPED | PL330_STATE_EXECUTING \
-                                | PL330_STATE_WFE | PL330_STATE_FAULTING)
-
-#define CMD_DMAADDH     0x54
-#define CMD_DMAEND      0x00
-#define CMD_DMAFLUSHP   0x35
-#define CMD_DMAGO       0xa0
-#define CMD_DMALD       0x04
-#define CMD_DMALDP      0x25
-#define CMD_DMALP       0x20
-#define CMD_DMALPEND    0x28
-#define CMD_DMAKILL     0x01
-#define CMD_DMAMOV      0xbc
-#define CMD_DMANOP      0x18
-#define CMD_DMARMB      0x12
-#define CMD_DMASEV      0x34
-#define CMD_DMAST       0x08
-#define CMD_DMASTP      0x29
-#define CMD_DMASTZ      0x0c
-#define CMD_DMAWFE      0x36
-#define CMD_DMAWFP      0x30
-#define CMD_DMAWMB      0x13
-
-#define SZ_DMAADDH      3
-#define SZ_DMAEND       1
-#define SZ_DMAFLUSHP    2
-#define SZ_DMALD        1
-#define SZ_DMALDP       2
-#define SZ_DMALP        2
-#define SZ_DMALPEND     2
-#define SZ_DMAKILL      1
-#define SZ_DMAMOV       6
-#define SZ_DMANOP       1
-#define SZ_DMARMB       1
-#define SZ_DMASEV       2
-#define SZ_DMAST        1
-#define SZ_DMASTP       2
-#define SZ_DMASTZ       1
-#define SZ_DMAWFE       2
-#define SZ_DMAWFP       2
-#define SZ_DMAWMB       1
-#define SZ_DMAGO        6
-
-#define BRST_LEN(ccr)   ((((ccr) >> CC_SRCBRSTLEN_SHFT) & 0xf) + 1)
-#define BRST_SIZE(ccr)  (1 << (((ccr) >> CC_SRCBRSTSIZE_SHFT) & 0x7))
-
-#define BYTE_TO_BURST(b, ccr)  ((b) / BRST_SIZE(ccr) / BRST_LEN(ccr))
-#define BURST_TO_BYTE(c, ccr)  ((c) * BRST_SIZE(ccr) * BRST_LEN(ccr))
-
-/*
- * With 256 bytes, we can do more than 2.5MB and 5MB xfers per req
- * at 1byte/burst for P<->M and M<->M respectively.
- * For typical scenario, at 1word/burst, 10MB and 20MB xfers per req
- * should be enough for P<->M and M<->M respectively.
- */
-#define MCODE_BUFF_PER_REQ      256
-
-/* If the _pl330_req is available to the client */
-#define IS_FREE(req)    (*((u8 *)((req)->mc_cpu)) == CMD_DMAEND)
-
-/* Use this _only_ to wait on transient states */
-#define UNTIL(t, s)     while (!(_state(t) & (s))) cpu_relax();
-
-#ifdef PL330_DEBUG_MCGEN
-static unsigned cmd_line;
-#define PL330_DBGCMD_DUMP(off, x...)    do { \
-                                                printk("%x:", cmd_line); \
-                                                printk(x); \
-                                                cmd_line += off; \
-                                        } while (0)
-#define PL330_DBGMC_START(addr)         (cmd_line = addr)
-#else
-#define PL330_DBGCMD_DUMP(off, x...)    do {} while (0)
-#define PL330_DBGMC_START(addr)         do {} while (0)
-#endif
-
-struct _xfer_spec {
-        u32 ccr;
-        struct pl330_req *r;
-        struct pl330_xfer *x;
-};
-
-enum dmamov_dst {
-        SAR = 0,
-        CCR,
-        DAR,
-};
-
-enum pl330_dst {
-        SRC = 0,
-        DST,
-};
-
-enum pl330_cond {
-        SINGLE,
-        BURST,
-        ALWAYS,
-};
-
-struct _pl330_req {
-        u32 mc_bus;
-        void *mc_cpu;
-        /* Number of bytes taken to setup MC for the req */
-        u32 mc_len;
-        struct pl330_req *r;
-        /* Hook to attach to DMAC's list of reqs with due callback */
-        struct list_head rqd;
-};
-
-/* ToBeDone for tasklet */
-struct _pl330_tbd {
-        bool reset_dmac;
-        bool reset_mngr;
-        u8 reset_chan;
-};
-
-/* A DMAC Thread */
-struct pl330_thread {
-        u8 id;
-        int ev;
-        /* If the channel is not yet acquired by any client */
-        bool free;
-        /* Parent DMAC */
-        struct pl330_dmac *dmac;
-        /* Only two at a time */
-        struct _pl330_req req[2];
-        /* Index of the last enqueued request */
-        unsigned lstenq;
-        /* Index of the last submitted request or -1 if the DMA is stopped */
-        int req_running;
-};
-
-enum pl330_dmac_state {
-        UNINIT,
-        INIT,
-        DYING,
-};
-
-/* A DMAC */
-struct pl330_dmac {
-        spinlock_t              lock;
-        /* Holds list of reqs with due callbacks */
-        struct list_head        req_done;
-        /* Pointer to platform specific stuff */
-        struct pl330_info       *pinfo;
-        /* Maximum possible events/irqs */
-        int                     events[32];
-        /* BUS address of MicroCode buffer */
-        u32                     mcode_bus;
-        /* CPU address of MicroCode buffer */
-        void                    *mcode_cpu;
-        /* List of all Channel threads */
-        struct pl330_thread     *channels;
-        /* Pointer to the MANAGER thread */
-        struct pl330_thread     *manager;
-        /* To handle bad news in interrupt */
-        struct tasklet_struct   tasks;
-        struct _pl330_tbd       dmac_tbd;
-        /* State of DMAC operation */
-        enum pl330_dmac_state   state;
-};
-
-static inline void _callback(struct pl330_req *r, enum pl330_op_err err)
-{
-        if (r && r->xfer_cb)
-                r->xfer_cb(r->token, err);
-}
-
-static inline bool _queue_empty(struct pl330_thread *thrd)
-{
-        return (IS_FREE(&thrd->req[0]) && IS_FREE(&thrd->req[1]))
-                ? true : false;
-}
-
-static inline bool _queue_full(struct pl330_thread *thrd)
-{
-        return (IS_FREE(&thrd->req[0]) || IS_FREE(&thrd->req[1]))
-                ? false : true;
-}
-
-static inline bool is_manager(struct pl330_thread *thrd)
-{
-        struct pl330_dmac *pl330 = thrd->dmac;
-
-        /* MANAGER is indexed at the end */
-        if (thrd->id == pl330->pinfo->pcfg.num_chan)
-                return true;
-        else
-                return false;
-}
-
-/* If manager of the thread is in Non-Secure mode */
-static inline bool _manager_ns(struct pl330_thread *thrd)
-{
-        struct pl330_dmac *pl330 = thrd->dmac;
-
-        return (pl330->pinfo->pcfg.mode & DMAC_MODE_NS) ? true : false;
-}
-
-static inline u32 get_id(struct pl330_info *pi, u32 off)
-{
-        void __iomem *regs = pi->base;
-        u32 id = 0;
-
-        id |= (readb(regs + off + 0x0) << 0);
-        id |= (readb(regs + off + 0x4) << 8);
-        id |= (readb(regs + off + 0x8) << 16);
-        id |= (readb(regs + off + 0xc) << 24);
-
-        return id;
-}
-
-static inline u32 _emit_ADDH(unsigned dry_run, u8 buf[],
-                enum pl330_dst da, u16 val)
-{
-        if (dry_run)
-                return SZ_DMAADDH;
-
-        buf[0] = CMD_DMAADDH;
-        buf[0] |= (da << 1);
-        *((u16 *)&buf[1]) = val;
-
-        PL330_DBGCMD_DUMP(SZ_DMAADDH, "\tDMAADDH %s %u\n",
-                da == 1 ? "DA" : "SA", val);
-
-        return SZ_DMAADDH;
-}
-
-static inline u32 _emit_END(unsigned dry_run, u8 buf[])
-{
-        if (dry_run)
-                return SZ_DMAEND;
-
-        buf[0] = CMD_DMAEND;
-
-        PL330_DBGCMD_DUMP(SZ_DMAEND, "\tDMAEND\n");
-
-        return SZ_DMAEND;
-}
-
-static inline u32 _emit_FLUSHP(unsigned dry_run, u8 buf[], u8 peri)
-{
-        if (dry_run)
-                return SZ_DMAFLUSHP;
-
-        buf[0] = CMD_DMAFLUSHP;
-
-        peri &= 0x1f;
-        peri <<= 3;
-        buf[1] = peri;
-
-        PL330_DBGCMD_DUMP(SZ_DMAFLUSHP, "\tDMAFLUSHP %u\n", peri >> 3);
-
-        return SZ_DMAFLUSHP;
-}
-
-static inline u32 _emit_LD(unsigned dry_run, u8 buf[],  enum pl330_cond cond)
-{
-        if (dry_run)
-                return SZ_DMALD;
-
-        buf[0] = CMD_DMALD;
-
-        if (cond == SINGLE)
-                buf[0] |= (0 << 1) | (1 << 0);
-        else if (cond == BURST)
-                buf[0] |= (1 << 1) | (1 << 0);
-
-        PL330_DBGCMD_DUMP(SZ_DMALD, "\tDMALD%c\n",
-                cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'A'));
-
-        return SZ_DMALD;
-}
-
-static inline u32 _emit_LDP(unsigned dry_run, u8 buf[],
-                enum pl330_cond cond, u8 peri)
-{
-        if (dry_run)
-                return SZ_DMALDP;
-
-        buf[0] = CMD_DMALDP;
-
-        if (cond == BURST)
-                buf[0] |= (1 << 1);
-
-        peri &= 0x1f;
-        peri <<= 3;
-        buf[1] = peri;
-
-        PL330_DBGCMD_DUMP(SZ_DMALDP, "\tDMALDP%c %u\n",
-                cond == SINGLE ? 'S' : 'B', peri >> 3);
-
-        return SZ_DMALDP;
-}
-
-static inline u32 _emit_LP(unsigned dry_run, u8 buf[],
-                unsigned loop, u8 cnt)
-{
-        if (dry_run)
-                return SZ_DMALP;
-
-        buf[0] = CMD_DMALP;
-
-        if (loop)
-                buf[0] |= (1 << 1);
-
-        cnt--; /* DMAC increments by 1 internally */
-        buf[1] = cnt;
-
-        PL330_DBGCMD_DUMP(SZ_DMALP, "\tDMALP_%c %u\n", loop ? '1' : '0', cnt);
-
-        return SZ_DMALP;
-}
-
-struct _arg_LPEND {
-        enum pl330_cond cond;
-        bool forever;
-        unsigned loop;
-        u8 bjump;
-};
-
-static inline u32 _emit_LPEND(unsigned dry_run, u8 buf[],
-                const struct _arg_LPEND *arg)
-{
-        enum pl330_cond cond = arg->cond;
-        bool forever = arg->forever;
-        unsigned loop = arg->loop;
-        u8 bjump = arg->bjump;
-
-        if (dry_run)
-                return SZ_DMALPEND;
-
-        buf[0] = CMD_DMALPEND;
-
-        if (loop)
-                buf[0] |= (1 << 2);
-
-        if (!forever)
-                buf[0] |= (1 << 4);
-
-        if (cond == SINGLE)
-                buf[0] |= (0 << 1) | (1 << 0);
-        else if (cond == BURST)
-                buf[0] |= (1 << 1) | (1 << 0);
-
-        buf[1] = bjump;
-
-        PL330_DBGCMD_DUMP(SZ_DMALPEND, "\tDMALP%s%c_%c bjmpto_%x\n",
-                        forever ? "FE" : "END",
-                        cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'A'),
-                        loop ? '1' : '0',
-                        bjump);
-
-        return SZ_DMALPEND;
-}
-
-static inline u32 _emit_KILL(unsigned dry_run, u8 buf[])
-{
-        if (dry_run)
-                return SZ_DMAKILL;
-
-        buf[0] = CMD_DMAKILL;
-
-        return SZ_DMAKILL;
-}
-
-static inline u32 _emit_MOV(unsigned dry_run, u8 buf[],
-                enum dmamov_dst dst, u32 val)
-{
-        if (dry_run)
-                return SZ_DMAMOV;
-
-        buf[0] = CMD_DMAMOV;
-        buf[1] = dst;
-        *((u32 *)&buf[2]) = val;
-
-        PL330_DBGCMD_DUMP(SZ_DMAMOV, "\tDMAMOV %s 0x%x\n",
-                dst == SAR ? "SAR" : (dst == DAR ? "DAR" : "CCR"), val);
-
-        return SZ_DMAMOV;
-}
-
-static inline u32 _emit_NOP(unsigned dry_run, u8 buf[])
-{
-        if (dry_run)
-                return SZ_DMANOP;
-
-        buf[0] = CMD_DMANOP;
-
-        PL330_DBGCMD_DUMP(SZ_DMANOP, "\tDMANOP\n");
-
-        return SZ_DMANOP;
-}
-
-static inline u32 _emit_RMB(unsigned dry_run, u8 buf[])
-{
-        if (dry_run)
-                return SZ_DMARMB;
-
-        buf[0] = CMD_DMARMB;
-
-        PL330_DBGCMD_DUMP(SZ_DMARMB, "\tDMARMB\n");
-
-        return SZ_DMARMB;
-}
-
-static inline u32 _emit_SEV(unsigned dry_run, u8 buf[], u8 ev)
-{
-        if (dry_run)
-                return SZ_DMASEV;
-
-        buf[0] = CMD_DMASEV;
-
-        ev &= 0x1f;
-        ev <<= 3;
-        buf[1] = ev;
-
-        PL330_DBGCMD_DUMP(SZ_DMASEV, "\tDMASEV %u\n", ev >> 3);
-
-        return SZ_DMASEV;
-}
-
-static inline u32 _emit_ST(unsigned dry_run, u8 buf[], enum pl330_cond cond)
-{
-        if (dry_run)
-                return SZ_DMAST;
-
-        buf[0] = CMD_DMAST;
-
-        if (cond == SINGLE)
-                buf[0] |= (0 << 1) | (1 << 0);
-        else if (cond == BURST)
-                buf[0] |= (1 << 1) | (1 << 0);
-
-        PL330_DBGCMD_DUMP(SZ_DMAST, "\tDMAST%c\n",
-                cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'A'));
-
-        return SZ_DMAST;
-}
-
-static inline u32 _emit_STP(unsigned dry_run, u8 buf[],
-                enum pl330_cond cond, u8 peri)
-{
-        if (dry_run)
-                return SZ_DMASTP;
-
-        buf[0] = CMD_DMASTP;
-
-        if (cond == BURST)
-                buf[0] |= (1 << 1);
-
-        peri &= 0x1f;
-        peri <<= 3;
-        buf[1] = peri;
-
-        PL330_DBGCMD_DUMP(SZ_DMASTP, "\tDMASTP%c %u\n",
-                cond == SINGLE ? 'S' : 'B', peri >> 3);
-
-        return SZ_DMASTP;
-}
-
-static inline u32 _emit_STZ(unsigned dry_run, u8 buf[])
-{
-        if (dry_run)
-                return SZ_DMASTZ;
-
-        buf[0] = CMD_DMASTZ;
-
-        PL330_DBGCMD_DUMP(SZ_DMASTZ, "\tDMASTZ\n");
-
-        return SZ_DMASTZ;
-}
-
-static inline u32 _emit_WFE(unsigned dry_run, u8 buf[], u8 ev,
-                unsigned invalidate)
-{
-        if (dry_run)
-                return SZ_DMAWFE;
-
-        buf[0] = CMD_DMAWFE;
-
-        ev &= 0x1f;
-        ev <<= 3;
-        buf[1] = ev;
-
-        if (invalidate)
-                buf[1] |= (1 << 1);
-
-        PL330_DBGCMD_DUMP(SZ_DMAWFE, "\tDMAWFE %u%s\n",
-                ev >> 3, invalidate ? ", I" : "");
-
-        return SZ_DMAWFE;
-}
-
-static inline u32 _emit_WFP(unsigned dry_run, u8 buf[],
-                enum pl330_cond cond, u8 peri)
-{
-        if (dry_run)
-                return SZ_DMAWFP;
-
-        buf[0] = CMD_DMAWFP;
-
-        if (cond == SINGLE)
-                buf[0] |= (0 << 1) | (0 << 0);
-        else if (cond == BURST)
-                buf[0] |= (1 << 1) | (0 << 0);
-        else
-                buf[0] |= (0 << 1) | (1 << 0);
-
-        peri &= 0x1f;
-        peri <<= 3;
-        buf[1] = peri;
-
-        PL330_DBGCMD_DUMP(SZ_DMAWFP, "\tDMAWFP%c %u\n",
-                cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'P'), peri >> 3);
-
-        return SZ_DMAWFP;
-}
-
-static inline u32 _emit_WMB(unsigned dry_run, u8 buf[])
-{
-        if (dry_run)
-                return SZ_DMAWMB;
-
-        buf[0] = CMD_DMAWMB;
-
-        PL330_DBGCMD_DUMP(SZ_DMAWMB, "\tDMAWMB\n");
-
-        return SZ_DMAWMB;
-}
-
-struct _arg_GO {
-        u8 chan;
-        u32 addr;
-        unsigned ns;
-};
-
-static inline u32 _emit_GO(unsigned dry_run, u8 buf[],
-                const struct _arg_GO *arg)
-{
-        u8 chan = arg->chan;
-        u32 addr = arg->addr;
-        unsigned ns = arg->ns;
-
-        if (dry_run)
-                return SZ_DMAGO;
-
-        buf[0] = CMD_DMAGO;
-        buf[0] |= (ns << 1);
-
-        buf[1] = chan & 0x7;
-
-        *((u32 *)&buf[2]) = addr;
-
-        return SZ_DMAGO;
-}
-
-#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
-
-/* Returns Time-Out */
-static bool _until_dmac_idle(struct pl330_thread *thrd)
-{
-        void __iomem *regs = thrd->dmac->pinfo->base;
-        unsigned long loops = msecs_to_loops(5);
-
-        do {
-                /* Until Manager is Idle */
-                if (!(readl(regs + DBGSTATUS) & DBG_BUSY))
-                        break;
-
-                cpu_relax();
-        } while (--loops);
-
-        if (!loops)
-                return true;
-
-        return false;
-}
-
-static inline void _execute_DBGINSN(struct pl330_thread *thrd,
-                u8 insn[], bool as_manager)
-{
-        void __iomem *regs = thrd->dmac->pinfo->base;
-        u32 val;
-
-        val = (insn[0] << 16) | (insn[1] << 24);
-        if (!as_manager) {
-                val |= (1 << 0);
-                val |= (thrd->id << 8); /* Channel Number */
-        }
-        writel(val, regs + DBGINST0);
-
-        val = *((u32 *)&insn[2]);
-        writel(val, regs + DBGINST1);
-
-        /* If timed out due to halted state-machine */
-        if (_until_dmac_idle(thrd)) {
-                dev_err(thrd->dmac->pinfo->dev, "DMAC halted!\n");
-                return;
-        }
-
-        /* Get going */
-        writel(0, regs + DBGCMD);
-}
-
-/*
- * Mark a _pl330_req as free.
- * We do it by writing DMAEND as the first instruction
- * because no valid request is going to have DMAEND as
- * its first instruction to execute.
- */
-static void mark_free(struct pl330_thread *thrd, int idx)
-{
-        struct _pl330_req *req = &thrd->req[idx];
-
-        _emit_END(0, req->mc_cpu);
-        req->mc_len = 0;
-
-        thrd->req_running = -1;
-}
-
-static inline u32 _state(struct pl330_thread *thrd)
-{
-        void __iomem *regs = thrd->dmac->pinfo->base;
-        u32 val;
-
-        if (is_manager(thrd))
-                val = readl(regs + DS) & 0xf;
-        else
-                val = readl(regs + CS(thrd->id)) & 0xf;
-
-        switch (val) {
-        case DS_ST_STOP:
-                return PL330_STATE_STOPPED;
-        case DS_ST_EXEC:
-                return PL330_STATE_EXECUTING;
-        case DS_ST_CMISS:
-                return PL330_STATE_CACHEMISS;
-        case DS_ST_UPDTPC:
-                return PL330_STATE_UPDTPC;
-        case DS_ST_WFE:
-                return PL330_STATE_WFE;
-        case DS_ST_FAULT:
-                return PL330_STATE_FAULTING;
-        case DS_ST_ATBRR:
-                if (is_manager(thrd))
-                        return PL330_STATE_INVALID;
-                else
-                        return PL330_STATE_ATBARRIER;
-        case DS_ST_QBUSY:
-                if (is_manager(thrd))
-                        return PL330_STATE_INVALID;
-                else
-                        return PL330_STATE_QUEUEBUSY;
-        case DS_ST_WFP:
-                if (is_manager(thrd))
-                        return PL330_STATE_INVALID;
-                else
-                        return PL330_STATE_WFP;
-        case DS_ST_KILL:
-                if (is_manager(thrd))
-                        return PL330_STATE_INVALID;
-                else
-                        return PL330_STATE_KILLING;
-        case DS_ST_CMPLT:
-                if (is_manager(thrd))
-                        return PL330_STATE_INVALID;
-                else
-                        return PL330_STATE_COMPLETING;
-        case DS_ST_FLTCMP:
-                if (is_manager(thrd))
-                        return PL330_STATE_INVALID;
-                else
-                        return PL330_STATE_FAULT_COMPLETING;
-        default:
-                return PL330_STATE_INVALID;
-        }
-}
-
-static void _stop(struct pl330_thread *thrd)
-{
-        void __iomem *regs = thrd->dmac->pinfo->base;
-        u8 insn[6] = {0, 0, 0, 0, 0, 0};
-
-        if (_state(thrd) == PL330_STATE_FAULT_COMPLETING)
-                UNTIL(thrd, PL330_STATE_FAULTING | PL330_STATE_KILLING);
-
-        /* Return if nothing needs to be done */
-        if (_state(thrd) == PL330_STATE_COMPLETING
-                  || _state(thrd) == PL330_STATE_KILLING
-                  || _state(thrd) == PL330_STATE_STOPPED)
-                return;
-
-        _emit_KILL(0, insn);
-
-        /* Stop generating interrupts for SEV */
-        writel(readl(regs + INTEN) & ~(1 << thrd->ev), regs + INTEN);
-
-        _execute_DBGINSN(thrd, insn, is_manager(thrd));
-}
-
-/* Start doing req 'idx' of thread 'thrd' */
-static bool _trigger(struct pl330_thread *thrd)
-{
-        void __iomem *regs = thrd->dmac->pinfo->base;
-        struct _pl330_req *req;
-        struct pl330_req *r;
-        struct _arg_GO go;
-        unsigned ns;
-        u8 insn[6] = {0, 0, 0, 0, 0, 0};
-        int idx;
-
-        /* Return if already ACTIVE */
-        if (_state(thrd) != PL330_STATE_STOPPED)
-                return true;
-
-        idx = 1 - thrd->lstenq;
-        if (!IS_FREE(&thrd->req[idx]))
-                req = &thrd->req[idx];
-        else {
-                idx = thrd->lstenq;
-                if (!IS_FREE(&thrd->req[idx]))
-                        req = &thrd->req[idx];
-                else
-                        req = NULL;
-        }
-
-        /* Return if no request */
-        if (!req || !req->r)
-                return true;
-
-        r = req->r;
-
-        if (r->cfg)
-                ns = r->cfg->nonsecure ? 1 : 0;
-        else if (readl(regs + CS(thrd->id)) & CS_CNS)
-                ns = 1;
-        else
-                ns = 0;
-
-        /* See 'Abort Sources' point-4 at Page 2-25 */
-        if (_manager_ns(thrd) && !ns)
-                dev_info(thrd->dmac->pinfo->dev, "%s:%d Recipe for ABORT!\n",
-                        __func__, __LINE__);
-
-        go.chan = thrd->id;
-        go.addr = req->mc_bus;
-        go.ns = ns;
-        _emit_GO(0, insn, &go);
-
-        /* Set to generate interrupts for SEV */
-        writel(readl(regs + INTEN) | (1 << thrd->ev), regs + INTEN);
-
-        /* Only manager can execute GO */
-        _execute_DBGINSN(thrd, insn, true);
-
-        thrd->req_running = idx;
-
-        return true;
-}
-
-static bool _start(struct pl330_thread *thrd)
-{
-        switch (_state(thrd)) {
-        case PL330_STATE_FAULT_COMPLETING:
-                UNTIL(thrd, PL330_STATE_FAULTING | PL330_STATE_KILLING);
-
-                if (_state(thrd) == PL330_STATE_KILLING)
-                        UNTIL(thrd, PL330_STATE_STOPPED)
-
-        case PL330_STATE_FAULTING:
-                _stop(thrd);
-
-        case PL330_STATE_KILLING:
-        case PL330_STATE_COMPLETING:
-                UNTIL(thrd, PL330_STATE_STOPPED)
-
-        case PL330_STATE_STOPPED:
-                return _trigger(thrd);
-
-        case PL330_STATE_WFP:
-        case PL330_STATE_QUEUEBUSY:
-        case PL330_STATE_ATBARRIER:
-        case PL330_STATE_UPDTPC:
-        case PL330_STATE_CACHEMISS:
-        case PL330_STATE_EXECUTING:
-                return true;
-
-        case PL330_STATE_WFE: /* For RESUME, nothing yet */
-        default:
-                return false;
-        }
-}
-
-static inline int _ldst_memtomem(unsigned dry_run, u8 buf[],
-                const struct _xfer_spec *pxs, int cyc)
-{
-        int off = 0;
-
-        while (cyc--) {
-                off += _emit_LD(dry_run, &buf[off], ALWAYS);
-                off += _emit_RMB(dry_run, &buf[off]);
-                off += _emit_ST(dry_run, &buf[off], ALWAYS);
-                off += _emit_WMB(dry_run, &buf[off]);
-        }
-
-        return off;
-}
-
-static inline int _ldst_devtomem(unsigned dry_run, u8 buf[],
-                const struct _xfer_spec *pxs, int cyc)
-{
-        int off = 0;
-
-        while (cyc--) {
-                off += _emit_WFP(dry_run, &buf[off], SINGLE, pxs->r->peri);
-                off += _emit_LDP(dry_run, &buf[off], SINGLE, pxs->r->peri);
-                off += _emit_ST(dry_run, &buf[off], ALWAYS);
-                off += _emit_FLUSHP(dry_run, &buf[off], pxs->r->peri);
-        }
-
-        return off;
-}
-
-static inline int _ldst_memtodev(unsigned dry_run, u8 buf[],
-                const struct _xfer_spec *pxs, int cyc)
-{
-        int off = 0;
-
-        while (cyc--) {
-                off += _emit_WFP(dry_run, &buf[off], SINGLE, pxs->r->peri);
-                off += _emit_LD(dry_run, &buf[off], ALWAYS);
-                off += _emit_STP(dry_run, &buf[off], SINGLE, pxs->r->peri);
-                off += _emit_FLUSHP(dry_run, &buf[off], pxs->r->peri);
-        }
-
-        return off;
-}
-
-static int _bursts(unsigned dry_run, u8 buf[],
-                const struct _xfer_spec *pxs, int cyc)
-{
-        int off = 0;
-
-        switch (pxs->r->rqtype) {
-        case MEMTODEV:
-                off += _ldst_memtodev(dry_run, &buf[off], pxs, cyc);
-                break;
-        case DEVTOMEM:
-                off += _ldst_devtomem(dry_run, &buf[off], pxs, cyc);
-                break;
-        case MEMTOMEM:
-                off += _ldst_memtomem(dry_run, &buf[off], pxs, cyc);
-                break;
-        default:
-                off += 0x40000000; /* Scare off the Client */
-                break;
-        }
-
-        return off;
-}
-
-/* Returns bytes consumed and updates bursts */
-static inline int _loop(unsigned dry_run, u8 buf[],
-                unsigned long *bursts, const struct _xfer_spec *pxs)
-{
-        int cyc, cycmax, szlp, szlpend, szbrst, off;
-        unsigned lcnt0, lcnt1, ljmp0, ljmp1;
-        struct _arg_LPEND lpend;
-
-        /* Max iterations possible in DMALP is 256 */
-        if (*bursts >= 256*256) {
-                lcnt1 = 256;
-                lcnt0 = 256;
-                cyc = *bursts / lcnt1 / lcnt0;
-        } else if (*bursts > 256) {
-                lcnt1 = 256;
-                lcnt0 = *bursts / lcnt1;
-                cyc = 1;
-        } else {
-                lcnt1 = *bursts;
-                lcnt0 = 0;
-                cyc = 1;
-        }
-
-        szlp = _emit_LP(1, buf, 0, 0);
-        szbrst = _bursts(1, buf, pxs, 1);
-
-        lpend.cond = ALWAYS;
-        lpend.forever = false;
-        lpend.loop = 0;
-        lpend.bjump = 0;
-        szlpend = _emit_LPEND(1, buf, &lpend);
-
-        if (lcnt0) {
-                szlp *= 2;
-                szlpend *= 2;
-        }
-
-        /*
-         * Max bursts that we can unroll due to limit on the
-         * size of backward jump that can be encoded in DMALPEND
-         * which is 8-bits and hence 255
-         */
-        cycmax = (255 - (szlp + szlpend)) / szbrst;
-
-        cyc = (cycmax < cyc) ? cycmax : cyc;
-
-        off = 0;
-
-        if (lcnt0) {
-                off += _emit_LP(dry_run, &buf[off], 0, lcnt0);
-                ljmp0 = off;
-        }
-
-        off += _emit_LP(dry_run, &buf[off], 1, lcnt1);
-        ljmp1 = off;
-
-        off += _bursts(dry_run, &buf[off], pxs, cyc);
-
-        lpend.cond = ALWAYS;
-        lpend.forever = false;
-        lpend.loop = 1;
-        lpend.bjump = off - ljmp1;
-        off += _emit_LPEND(dry_run, &buf[off], &lpend);
-
-        if (lcnt0) {
-                lpend.cond = ALWAYS;
-                lpend.forever = false;
-                lpend.loop = 0;
-                lpend.bjump = off - ljmp0;
-                off += _emit_LPEND(dry_run, &buf[off], &lpend);
-        }
-
-        *bursts = lcnt1 * cyc;
-        if (lcnt0)
-                *bursts *= lcnt0;
-
-        return off;
-}
-
-static inline int _setup_loops(unsigned dry_run, u8 buf[],
-                const struct _xfer_spec *pxs)
-{
-        struct pl330_xfer *x = pxs->x;
-        u32 ccr = pxs->ccr;
-        unsigned long c, bursts = BYTE_TO_BURST(x->bytes, ccr);
-        int off = 0;
-
-        while (bursts) {
-                c = bursts;
-                off += _loop(dry_run, &buf[off], &c, pxs);
-                bursts -= c;
-        }
-
-        return off;
-}
-
-static inline int _setup_xfer(unsigned dry_run, u8 buf[],
-                const struct _xfer_spec *pxs)
-{
-        struct pl330_xfer *x = pxs->x;
-        int off = 0;
-
-        /* DMAMOV SAR, x->src_addr */
-        off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr);
-        /* DMAMOV DAR, x->dst_addr */
-        off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr);
-
-        /* Setup Loop(s) */
-        off += _setup_loops(dry_run, &buf[off], pxs);
-
-        return off;
-}
-
-/*
- * A req is a sequence of one or more xfer units.
- * Returns the number of bytes taken to setup the MC for the req.
- */
-static int _setup_req(unsigned dry_run, struct pl330_thread *thrd,
-                unsigned index, struct _xfer_spec *pxs)
-{
-        struct _pl330_req *req = &thrd->req[index];
-        struct pl330_xfer *x;
-        u8 *buf = req->mc_cpu;
-        int off = 0;
-
-        PL330_DBGMC_START(req->mc_bus);
-
-        /* DMAMOV CCR, ccr */
-        off += _emit_MOV(dry_run, &buf[off], CCR, pxs->ccr);
-
-        x = pxs->r->x;
-        do {
-                /* Error if xfer length is not aligned at burst size */
-                if (x->bytes % (BRST_SIZE(pxs->ccr) * BRST_LEN(pxs->ccr)))
-                        return -EINVAL;
-
-                pxs->x = x;
-                off += _setup_xfer(dry_run, &buf[off], pxs);
-
-                x = x->next;
-        } while (x);
-
-        /* DMASEV peripheral/event */
-        off += _emit_SEV(dry_run, &buf[off], thrd->ev);
-        /* DMAEND */
-        off += _emit_END(dry_run, &buf[off]);
-
-        return off;
-}
-
-static inline u32 _prepare_ccr(const struct pl330_reqcfg *rqc)
-{
-        u32 ccr = 0;
-
-        if (rqc->src_inc)
-                ccr |= CC_SRCINC;
-
-        if (rqc->dst_inc)
-                ccr |= CC_DSTINC;
-
-        /* We set same protection levels for Src and DST for now */
-        if (rqc->privileged)
-                ccr |= CC_SRCPRI | CC_DSTPRI;
-        if (rqc->nonsecure)
-                ccr |= CC_SRCNS | CC_DSTNS;
-        if (rqc->insnaccess)
-                ccr |= CC_SRCIA | CC_DSTIA;
-
-        ccr |= (((rqc->brst_len - 1) & 0xf) << CC_SRCBRSTLEN_SHFT);
-        ccr |= (((rqc->brst_len - 1) & 0xf) << CC_DSTBRSTLEN_SHFT);
-
-        ccr |= (rqc->brst_size << CC_SRCBRSTSIZE_SHFT);
-        ccr |= (rqc->brst_size << CC_DSTBRSTSIZE_SHFT);
-
-        ccr |= (rqc->scctl << CC_SRCCCTRL_SHFT);
-        ccr |= (rqc->dcctl << CC_DSTCCTRL_SHFT);
-
-        ccr |= (rqc->swap << CC_SWAP_SHFT);
-
-        return ccr;
-}
-
-static inline bool _is_valid(u32 ccr)
-{
-        enum pl330_dstcachectrl dcctl;
-        enum pl330_srccachectrl scctl;
-
-        dcctl = (ccr >> CC_DSTCCTRL_SHFT) & CC_DRCCCTRL_MASK;
-        scctl = (ccr >> CC_SRCCCTRL_SHFT) & CC_SRCCCTRL_MASK;
-
-        if (dcctl == DINVALID1 || dcctl == DINVALID2
-                        || scctl == SINVALID1 || scctl == SINVALID2)
-                return false;
-        else
-                return true;
-}
-
-/*
- * Submit a list of xfers after which the client wants notification.
- * Client is not notified after each xfer unit, just once after all
- * xfer units are done or some error occurs.
- */
-int pl330_submit_req(void *ch_id, struct pl330_req *r)
-{
-        struct pl330_thread *thrd = ch_id;
-        struct pl330_dmac *pl330;
-        struct pl330_info *pi;
-        struct _xfer_spec xs;
-        unsigned long flags;
-        void __iomem *regs;
-        unsigned idx;
-        u32 ccr;
-        int ret = 0;
-
-        /* No Req or Unacquired Channel or DMAC */
-        if (!r || !thrd || thrd->free)
-                return -EINVAL;
-
-        pl330 = thrd->dmac;
-        pi = pl330->pinfo;
-        regs = pi->base;
-
-        if (pl330->state == DYING
-                || pl330->dmac_tbd.reset_chan & (1 << thrd->id)) {
-                dev_info(thrd->dmac->pinfo->dev, "%s:%d\n",
-                        __func__, __LINE__);
-                return -EAGAIN;
-        }
-
-        /* If request for non-existing peripheral */
-        if (r->rqtype != MEMTOMEM && r->peri >= pi->pcfg.num_peri) {
-                dev_info(thrd->dmac->pinfo->dev,
-                                "%s:%d Invalid peripheral(%u)!\n",
-                                __func__, __LINE__, r->peri);
-                return -EINVAL;
-        }
-
-        spin_lock_irqsave(&pl330->lock, flags);
-
-        if (_queue_full(thrd)) {
-                ret = -EAGAIN;
-                goto xfer_exit;
-        }
-
-        /* Prefer Secure Channel */
-        if (!_manager_ns(thrd))
-                r->cfg->nonsecure = 0;
-        else
-                r->cfg->nonsecure = 1;
-
-        /* Use last settings, if not provided */
-        if (r->cfg)
-                ccr = _prepare_ccr(r->cfg);
-        else
-                ccr = readl(regs + CC(thrd->id));
-
-        /* If this req doesn't have valid xfer settings */
-        if (!_is_valid(ccr)) {
-                ret = -EINVAL;
-                dev_info(thrd->dmac->pinfo->dev, "%s:%d Invalid CCR(%x)!\n",
-                        __func__, __LINE__, ccr);
-                goto xfer_exit;
-        }
-
-        idx = IS_FREE(&thrd->req[0]) ? 0 : 1;
-
-        xs.ccr = ccr;
-        xs.r = r;
-
-        /* First dry run to check if req is acceptable */
-        ret = _setup_req(1, thrd, idx, &xs);
-        if (ret < 0)
-                goto xfer_exit;
-
-        if (ret > pi->mcbufsz / 2) {
-                dev_info(thrd->dmac->pinfo->dev,
-                        "%s:%d Trying increasing mcbufsz\n",
-                                __func__, __LINE__);
-                ret = -ENOMEM;
-                goto xfer_exit;
-        }
-
-        /* Hook the request */
-        thrd->lstenq = idx;
-        thrd->req[idx].mc_len = _setup_req(0, thrd, idx, &xs);
-        thrd->req[idx].r = r;
-
-        ret = 0;
-
-xfer_exit:
-        spin_unlock_irqrestore(&pl330->lock, flags);
-
-        return ret;
-}
-EXPORT_SYMBOL(pl330_submit_req);
-
-static void pl330_dotask(unsigned long data)
-{
-        struct pl330_dmac *pl330 = (struct pl330_dmac *) data;
-        struct pl330_info *pi = pl330->pinfo;
-        unsigned long flags;
-        int i;
-
-        spin_lock_irqsave(&pl330->lock, flags);
-
-        /* The DMAC itself gone nuts */
-        if (pl330->dmac_tbd.reset_dmac) {
-                pl330->state = DYING;
-                /* Reset the manager too */
-                pl330->dmac_tbd.reset_mngr = true;
-                /* Clear the reset flag */
-                pl330->dmac_tbd.reset_dmac = false;
-        }
-
-        if (pl330->dmac_tbd.reset_mngr) {
-                _stop(pl330->manager);
-                /* Reset all channels */
-                pl330->dmac_tbd.reset_chan = (1 << pi->pcfg.num_chan) - 1;
-                /* Clear the reset flag */
-                pl330->dmac_tbd.reset_mngr = false;
-        }
-
-        for (i = 0; i < pi->pcfg.num_chan; i++) {
-
-                if (pl330->dmac_tbd.reset_chan & (1 << i)) {
-                        struct pl330_thread *thrd = &pl330->channels[i];
-                        void __iomem *regs = pi->base;
-                        enum pl330_op_err err;
-
-                        _stop(thrd);
-
-                        if (readl(regs + FSC) & (1 << thrd->id))
-                                err = PL330_ERR_FAIL;
-                        else
-                                err = PL330_ERR_ABORT;
-
-                        spin_unlock_irqrestore(&pl330->lock, flags);
-
-                        _callback(thrd->req[1 - thrd->lstenq].r, err);
-                        _callback(thrd->req[thrd->lstenq].r, err);
-
-                        spin_lock_irqsave(&pl330->lock, flags);
-
-                        thrd->req[0].r = NULL;
-                        thrd->req[1].r = NULL;
-                        mark_free(thrd, 0);
-                        mark_free(thrd, 1);
-
-                        /* Clear the reset flag */
-                        pl330->dmac_tbd.reset_chan &= ~(1 << i);
-                }
-        }
-
-        spin_unlock_irqrestore(&pl330->lock, flags);
-
-        return;
-}
-
-/* Returns 1 if state was updated, 0 otherwise */
-int pl330_update(const struct pl330_info *pi)
-{
-        struct _pl330_req *rqdone;
-        struct pl330_dmac *pl330;
-        unsigned long flags;
-        void __iomem *regs;
-        u32 val;
-        int id, ev, ret = 0;
-
-        if (!pi || !pi->pl330_data)
-                return 0;
-
-        regs = pi->base;
-        pl330 = pi->pl330_data;
-
-        spin_lock_irqsave(&pl330->lock, flags);
-
-        val = readl(regs + FSM) & 0x1;
-        if (val)
-                pl330->dmac_tbd.reset_mngr = true;
-        else
-                pl330->dmac_tbd.reset_mngr = false;
-
-        val = readl(regs + FSC) & ((1 << pi->pcfg.num_chan) - 1);
-        pl330->dmac_tbd.reset_chan |= val;
-        if (val) {
-                int i = 0;
-                while (i < pi->pcfg.num_chan) {
-                        if (val & (1 << i)) {
-                                dev_info(pi->dev,
-                                        "Reset Channel-%d\t CS-%x FTC-%x\n",
-                                                i, readl(regs + CS(i)),
-                                                readl(regs + FTC(i)));
-                                _stop(&pl330->channels[i]);
-                        }
-                        i++;
-                }
-        }
-
-        /* Check which event happened i.e, thread notified */
-        val = readl(regs + ES);
-        if (pi->pcfg.num_events < 32
-                        && val & ~((1 << pi->pcfg.num_events) - 1)) {
-                pl330->dmac_tbd.reset_dmac = true;
-                dev_err(pi->dev, "%s:%d Unexpected!\n", __func__, __LINE__);
-                ret = 1;
-                goto updt_exit;
-        }
-
-        for (ev = 0; ev < pi->pcfg.num_events; ev++) {
-                if (val & (1 << ev)) { /* Event occurred */
-                        struct pl330_thread *thrd;
-                        u32 inten = readl(regs + INTEN);
-                        int active;
-
-                        /* Clear the event */
-                        if (inten & (1 << ev))
-                                writel(1 << ev, regs + INTCLR);
-
-                        ret = 1;
-
-                        id = pl330->events[ev];
-
-                        thrd = &pl330->channels[id];
-
-                        active = thrd->req_running;
-                        if (active == -1) /* Aborted */
-                                continue;
-
-                        rqdone = &thrd->req[active];
-                        mark_free(thrd, active);
-
-                        /* Get going again ASAP */
-                        _start(thrd);
-
-                        /* For now, just make a list of callbacks to be done */
-                        list_add_tail(&rqdone->rqd, &pl330->req_done);
-                }
-        }
-
-        /* Now that we are in no hurry, do the callbacks */
-        while (!list_empty(&pl330->req_done)) {
-                struct pl330_req *r;
-
-                rqdone = container_of(pl330->req_done.next,
-                                        struct _pl330_req, rqd);
-
-                list_del_init(&rqdone->rqd);
-
-                /* Detach the req */
-                r = rqdone->r;
-                rqdone->r = NULL;
-
-                spin_unlock_irqrestore(&pl330->lock, flags);
-                _callback(r, PL330_ERR_NONE);
-                spin_lock_irqsave(&pl330->lock, flags);
-        }
-
-updt_exit:
-        spin_unlock_irqrestore(&pl330->lock, flags);
-
-        if (pl330->dmac_tbd.reset_dmac
-                        || pl330->dmac_tbd.reset_mngr
-                        || pl330->dmac_tbd.reset_chan) {
-                ret = 1;
-                tasklet_schedule(&pl330->tasks);
-        }
-
-        return ret;
-}
-EXPORT_SYMBOL(pl330_update);
-
-int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
-{
-        struct pl330_thread *thrd = ch_id;
-        struct pl330_dmac *pl330;
-        unsigned long flags;
-        int ret = 0, active;
-
-        if (!thrd || thrd->free || thrd->dmac->state == DYING)
-                return -EINVAL;
-
-        pl330 = thrd->dmac;
-        active = thrd->req_running;
-
-        spin_lock_irqsave(&pl330->lock, flags);
-
-        switch (op) {
-        case PL330_OP_FLUSH:
-                /* Make sure the channel is stopped */
-                _stop(thrd);
-
-                thrd->req[0].r = NULL;
-                thrd->req[1].r = NULL;
-                mark_free(thrd, 0);
-                mark_free(thrd, 1);
-                break;
-
-        case PL330_OP_ABORT:
-                /* Make sure the channel is stopped */
-                _stop(thrd);
-
-                /* ABORT is only for the active req */
-                if (active == -1)
-                        break;
-
-                thrd->req[active].r = NULL;
-                mark_free(thrd, active);
-
-                /* Start the next */
-        case PL330_OP_START:
-                if ((active == -1) && !_start(thrd))
-                        ret = -EIO;
-                break;
-
-        default:
-                ret = -EINVAL;
-        }
-
-        spin_unlock_irqrestore(&pl330->lock, flags);
-        return ret;
-}
-EXPORT_SYMBOL(pl330_chan_ctrl);
-
-int pl330_chan_status(void *ch_id, struct pl330_chanstatus *pstatus)
-{
-        struct pl330_thread *thrd = ch_id;
-        struct pl330_dmac *pl330;
-        struct pl330_info *pi;
-        void __iomem *regs;
-        int active;
-        u32 val;
-
-        if (!pstatus || !thrd || thrd->free)
-                return -EINVAL;
-
-        pl330 = thrd->dmac;
-        pi = pl330->pinfo;
-        regs = pi->base;
-
-        /* The client should remove the DMAC and add again */
-        if (pl330->state == DYING)
-                pstatus->dmac_halted = true;
-        else
-                pstatus->dmac_halted = false;
-
-        val = readl(regs + FSC);
-        if (val & (1 << thrd->id))
-                pstatus->faulting = true;
-        else
-                pstatus->faulting = false;
-
-        active = thrd->req_running;
-
-        if (active == -1) {
-                /* Indicate that the thread is not running */
-                pstatus->top_req = NULL;
-                pstatus->wait_req = NULL;
-        } else {
-                pstatus->top_req = thrd->req[active].r;
-                pstatus->wait_req = !IS_FREE(&thrd->req[1 - active])
-                                        ? thrd->req[1 - active].r : NULL;
-        }
-
-        pstatus->src_addr = readl(regs + SA(thrd->id));
-        pstatus->dst_addr = readl(regs + DA(thrd->id));
-
-        return 0;
-}
-EXPORT_SYMBOL(pl330_chan_status);
-
-/* Reserve an event */
-static inline int _alloc_event(struct pl330_thread *thrd)
-{
-        struct pl330_dmac *pl330 = thrd->dmac;
-        struct pl330_info *pi = pl330->pinfo;
-        int ev;
-
-        for (ev = 0; ev < pi->pcfg.num_events; ev++)
-                if (pl330->events[ev] == -1) {
-                        pl330->events[ev] = thrd->id;
-                        return ev;
-                }
-
-        return -1;
-}
-
-static bool _chan_ns(const struct pl330_info *pi, int i)
-{
-        return pi->pcfg.irq_ns & (1 << i);
-}
-
-/* Upon success, returns IdentityToken for the
- * allocated channel, NULL otherwise.
- */
-void *pl330_request_channel(const struct pl330_info *pi)
-{
-        struct pl330_thread *thrd = NULL;
-        struct pl330_dmac *pl330;
-        unsigned long flags;
-        int chans, i;
-
-        if (!pi || !pi->pl330_data)
-                return NULL;
-
-        pl330 = pi->pl330_data;
-
-        if (pl330->state == DYING)
-                return NULL;
-
-        chans = pi->pcfg.num_chan;
-
-        spin_lock_irqsave(&pl330->lock, flags);
-
-        for (i = 0; i < chans; i++) {
-                thrd = &pl330->channels[i];
-                if ((thrd->free) && (!_manager_ns(thrd) ||
-                                        _chan_ns(pi, i))) {
-                        thrd->ev = _alloc_event(thrd);
-                        if (thrd->ev >= 0) {
-                                thrd->free = false;
-                                thrd->lstenq = 1;
-                                thrd->req[0].r = NULL;
-                                mark_free(thrd, 0);
-                                thrd->req[1].r = NULL;
-                                mark_free(thrd, 1);
-                                break;
-                        }
-                }
-                thrd = NULL;
-        }
-
-        spin_unlock_irqrestore(&pl330->lock, flags);
-
-        return thrd;
-}
-EXPORT_SYMBOL(pl330_request_channel);
-
-/* Release an event */
-static inline void _free_event(struct pl330_thread *thrd, int ev)
-{
-        struct pl330_dmac *pl330 = thrd->dmac;
-        struct pl330_info *pi = pl330->pinfo;
-
-        /* If the event is valid and was held by the thread */
-        if (ev >= 0 && ev < pi->pcfg.num_events
-                        && pl330->events[ev] == thrd->id)
-                pl330->events[ev] = -1;
-}
-
-void pl330_release_channel(void *ch_id)
-{
-        struct pl330_thread *thrd = ch_id;
-        struct pl330_dmac *pl330;
-        unsigned long flags;
-
-        if (!thrd || thrd->free)
-                return;
-
-        _stop(thrd);
-
-        _callback(thrd->req[1 - thrd->lstenq].r, PL330_ERR_ABORT);
-        _callback(thrd->req[thrd->lstenq].r, PL330_ERR_ABORT);
-
-        pl330 = thrd->dmac;
-
-        spin_lock_irqsave(&pl330->lock, flags);
-        _free_event(thrd, thrd->ev);
-        thrd->free = true;
-        spin_unlock_irqrestore(&pl330->lock, flags);
-}
-EXPORT_SYMBOL(pl330_release_channel);
-
-/* Initialize the structure for PL330 configuration, that can be used
- * by the client driver the make best use of the DMAC
- */
-static void read_dmac_config(struct pl330_info *pi)
-{
-        void __iomem *regs = pi->base;
-        u32 val;
-
-        val = readl(regs + CRD) >> CRD_DATA_WIDTH_SHIFT;
-        val &= CRD_DATA_WIDTH_MASK;
-        pi->pcfg.data_bus_width = 8 * (1 << val);
-
-        val = readl(regs + CRD) >> CRD_DATA_BUFF_SHIFT;
-        val &= CRD_DATA_BUFF_MASK;
-        pi->pcfg.data_buf_dep = val + 1;
-
-        val = readl(regs + CR0) >> CR0_NUM_CHANS_SHIFT;
-        val &= CR0_NUM_CHANS_MASK;
-        val += 1;
-        pi->pcfg.num_chan = val;
-
-        val = readl(regs + CR0);
-        if (val & CR0_PERIPH_REQ_SET) {
-                val = (val >> CR0_NUM_PERIPH_SHIFT) & CR0_NUM_PERIPH_MASK;
-                val += 1;
-                pi->pcfg.num_peri = val;
-                pi->pcfg.peri_ns = readl(regs + CR4);
-        } else {
-                pi->pcfg.num_peri = 0;
-        }
-
-        val = readl(regs + CR0);
-        if (val & CR0_BOOT_MAN_NS)
-                pi->pcfg.mode |= DMAC_MODE_NS;
-        else
-                pi->pcfg.mode &= ~DMAC_MODE_NS;
-
-        val = readl(regs + CR0) >> CR0_NUM_EVENTS_SHIFT;
-        val &= CR0_NUM_EVENTS_MASK;
-        val += 1;
-        pi->pcfg.num_events = val;
-
-        pi->pcfg.irq_ns = readl(regs + CR3);
-
-        pi->pcfg.periph_id = get_id(pi, PERIPH_ID);
-        pi->pcfg.pcell_id = get_id(pi, PCELL_ID);
-}
-
-static inline void _reset_thread(struct pl330_thread *thrd)
-{
-        struct pl330_dmac *pl330 = thrd->dmac;
-        struct pl330_info *pi = pl330->pinfo;
-
-        thrd->req[0].mc_cpu = pl330->mcode_cpu
-                                + (thrd->id * pi->mcbufsz);
-        thrd->req[0].mc_bus = pl330->mcode_bus
-                                + (thrd->id * pi->mcbufsz);
-        thrd->req[0].r = NULL;
-        mark_free(thrd, 0);
-
-        thrd->req[1].mc_cpu = thrd->req[0].mc_cpu
-                                + pi->mcbufsz / 2;
-        thrd->req[1].mc_bus = thrd->req[0].mc_bus
-                                + pi->mcbufsz / 2;
-        thrd->req[1].r = NULL;
-        mark_free(thrd, 1);
-}
-
-static int dmac_alloc_threads(struct pl330_dmac *pl330)
-{
-        struct pl330_info *pi = pl330->pinfo;
-        int chans = pi->pcfg.num_chan;
-        struct pl330_thread *thrd;
-        int i;
-
-        /* Allocate 1 Manager and 'chans' Channel threads */
-        pl330->channels = kzalloc((1 + chans) * sizeof(*thrd),
-                                        GFP_KERNEL);
-        if (!pl330->channels)
-                return -ENOMEM;
-
-        /* Init Channel threads */
-        for (i = 0; i < chans; i++) {
-                thrd = &pl330->channels[i];
-                thrd->id = i;
-                thrd->dmac = pl330;
-                _reset_thread(thrd);
-                thrd->free = true;
-        }
-
-        /* MANAGER is indexed at the end */
-        thrd = &pl330->channels[chans];
-        thrd->id = chans;
-        thrd->dmac = pl330;
-        thrd->free = false;
-        pl330->manager = thrd;
-
-        return 0;
-}
-
-static int dmac_alloc_resources(struct pl330_dmac *pl330)
-{
-        struct pl330_info *pi = pl330->pinfo;
-        int chans = pi->pcfg.num_chan;
-        int ret;
-
-        /*
-         * Alloc MicroCode buffer for 'chans' Channel threads.
-         * A channel's buffer offset is (Channel_Id * MCODE_BUFF_PERCHAN)
-         */
-        pl330->mcode_cpu = dma_alloc_coherent(pi->dev,
-                                chans * pi->mcbufsz,
-                                &pl330->mcode_bus, GFP_KERNEL);
-        if (!pl330->mcode_cpu) {
-                dev_err(pi->dev, "%s:%d Can't allocate memory!\n",
-                        __func__, __LINE__);
-                return -ENOMEM;
-        }
-
-        ret = dmac_alloc_threads(pl330);
-        if (ret) {
-                dev_err(pi->dev, "%s:%d Can't to create channels for DMAC!\n",
-                        __func__, __LINE__);
-                dma_free_coherent(pi->dev,
-                                chans * pi->mcbufsz,
-                                pl330->mcode_cpu, pl330->mcode_bus);
-                return ret;
-        }
-
-        return 0;
-}
-
-int pl330_add(struct pl330_info *pi)
-{
-        struct pl330_dmac *pl330;
-        void __iomem *regs;
-        int i, ret;
-
-        if (!pi || !pi->dev)
-                return -EINVAL;
-
-        /* If already added */
-        if (pi->pl330_data)
-                return -EINVAL;
-
-        /*
-         * If the SoC can perform reset on the DMAC, then do it
-         * before reading its configuration.
-         */
-        if (pi->dmac_reset)
-                pi->dmac_reset(pi);
-
-        regs = pi->base;
-
-        /* Check if we can handle this DMAC */
-        if ((get_id(pi, PERIPH_ID) & 0xfffff) != PERIPH_ID_VAL
-           || get_id(pi, PCELL_ID) != PCELL_ID_VAL) {
-                dev_err(pi->dev, "PERIPH_ID 0x%x, PCELL_ID 0x%x !\n",
-                        get_id(pi, PERIPH_ID), get_id(pi, PCELL_ID));
-                return -EINVAL;
-        }
-
-        /* Read the configuration of the DMAC */
-        read_dmac_config(pi);
-
-        if (pi->pcfg.num_events == 0) {
-                dev_err(pi->dev, "%s:%d Can't work without events!\n",
-                        __func__, __LINE__);
-                return -EINVAL;
-        }
-
-        pl330 = kzalloc(sizeof(*pl330), GFP_KERNEL);
-        if (!pl330) {
-                dev_err(pi->dev, "%s:%d Can't allocate memory!\n",
-                        __func__, __LINE__);
-                return -ENOMEM;
-        }
-
-        /* Assign the info structure and private data */
-        pl330->pinfo = pi;
-        pi->pl330_data = pl330;
-
-        spin_lock_init(&pl330->lock);
-
-        INIT_LIST_HEAD(&pl330->req_done);
-
-        /* Use default MC buffer size if not provided */
-        if (!pi->mcbufsz)
-                pi->mcbufsz = MCODE_BUFF_PER_REQ * 2;
-
-        /* Mark all events as free */
-        for (i = 0; i < pi->pcfg.num_events; i++)
-                pl330->events[i] = -1;
-
-        /* Allocate resources needed by the DMAC */
-        ret = dmac_alloc_resources(pl330);
-        if (ret) {
-                dev_err(pi->dev, "Unable to create channels for DMAC\n");
-                kfree(pl330);
-                return ret;
-        }
-
-        tasklet_init(&pl330->tasks, pl330_dotask, (unsigned long) pl330);
-
-        pl330->state = INIT;
-
-        return 0;
-}
-EXPORT_SYMBOL(pl330_add);
-
-static int dmac_free_threads(struct pl330_dmac *pl330)
-{
-        struct pl330_info *pi = pl330->pinfo;
-        int chans = pi->pcfg.num_chan;
-        struct pl330_thread *thrd;
-        int i;
-
-        /* Release Channel threads */
-        for (i = 0; i < chans; i++) {
-                thrd = &pl330->channels[i];
-                pl330_release_channel((void *)thrd);
-        }
-
-        /* Free memory */
-        kfree(pl330->channels);
-
-        return 0;
-}
-
-static void dmac_free_resources(struct pl330_dmac *pl330)
-{
-        struct pl330_info *pi = pl330->pinfo;
-        int chans = pi->pcfg.num_chan;
-
-        dmac_free_threads(pl330);
-
-        dma_free_coherent(pi->dev, chans * pi->mcbufsz,
-                                pl330->mcode_cpu, pl330->mcode_bus);
-}
-
-void pl330_del(struct pl330_info *pi)
-{
-        struct pl330_dmac *pl330;
-
-        if (!pi || !pi->pl330_data)
-                return;
-
-        pl330 = pi->pl330_data;
-
-        pl330->state = UNINIT;
-
-        tasklet_kill(&pl330->tasks);
-
-        /* Free DMAC resources */
-        dmac_free_resources(pl330);
-
-        kfree(pl330);
-        pi->pl330_data = NULL;
-}
-EXPORT_SYMBOL(pl330_del);
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index 61691cdbdcf2..9173d112ea01 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -16,6 +16,7 @@
  */
 #include <linux/module.h>
 #include <linux/init.h>
+#include <linux/irq.h>
 #include <linux/kernel.h>
 #include <linux/delay.h>
 #include <linux/errno.h>
@@ -28,9 +29,8 @@
 #include <linux/io.h>
 
 #include <mach/hardware.h>
-#include <asm/mach-types.h>
-#include <asm/irq.h>
 #include <asm/mach/irq.h>
+#include <asm/mach-types.h>
 #include <asm/sizes.h>
 
 #include <asm/hardware/sa1111.h>
@@ -86,8 +86,10 @@
 #define IRQ_S1_CD_VALID         (52)
 #define IRQ_S0_BVD1_STSCHG      (53)
 #define IRQ_S1_BVD1_STSCHG      (54)
+#define SA1111_IRQ_NR           (55)
 
-extern void __init sa1110_mb_enable(void);
+extern void sa1110_mb_enable(void);
+extern void sa1110_mb_disable(void);
 
 /*
  * We keep the following data for the overall SA1111.  Note that the
@@ -104,6 +106,7 @@ struct sa1111 {
         int             irq_base;       /* base for cascaded on-chip IRQs */
         spinlock_t      lock;
         void __iomem    *base;
+        struct sa1111_platform_data *pdata;
 #ifdef CONFIG_PM
         void            *saved_state;
 #endif
@@ -118,6 +121,7 @@ static struct sa1111 *g_sa1111;
 struct sa1111_dev_info {
         unsigned long   offset;
         unsigned long   skpcr_mask;
+        bool            dma;
         unsigned int    devid;
         unsigned int    irq[6];
 };
@@ -126,6 +130,7 @@ static struct sa1111_dev_info sa1111_devices[] = {
         {
                 .offset         = SA1111_USB,
                 .skpcr_mask     = SKPCR_UCLKEN,
+                .dma            = true,
                 .devid          = SA1111_DEVID_USB,
                 .irq = {
                         IRQ_USBPWR,
@@ -139,6 +144,7 @@ static struct sa1111_dev_info sa1111_devices[] = {
         {
                 .offset         = 0x0600,
                 .skpcr_mask     = SKPCR_I2SCLKEN | SKPCR_L3CLKEN,
+                .dma            = true,
                 .devid          = SA1111_DEVID_SAC,
                 .irq = {
                         AUDXMTDMADONEA,
@@ -155,7 +161,7 @@ static struct sa1111_dev_info sa1111_devices[] = {
         {
                 .offset         = SA1111_KBD,
                 .skpcr_mask     = SKPCR_PTCLKEN,
-                .devid          = SA1111_DEVID_PS2,
+                .devid          = SA1111_DEVID_PS2_KBD,
                 .irq = {
                         IRQ_TPRXINT,
                         IRQ_TPTXINT
@@ -164,7 +170,7 @@ static struct sa1111_dev_info sa1111_devices[] = {
         {
                 .offset         = SA1111_MSE,
                 .skpcr_mask     = SKPCR_PMCLKEN,
-                .devid          = SA1111_DEVID_PS2,
+                .devid          = SA1111_DEVID_PS2_MSE,
                 .irq = {
                         IRQ_MSRXINT,
                         IRQ_MSTXINT
@@ -434,16 +440,28 @@ static struct irq_chip sa1111_high_chip = {
         .irq_set_wake   = sa1111_wake_highirq,
 };
 
-static void sa1111_setup_irq(struct sa1111 *sachip)
+static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base)
 {
         void __iomem *irqbase = sachip->base + SA1111_INTC;
-        unsigned int irq;
+        unsigned i, irq;
+        int ret;
 
         /*
          * We're guaranteed that this region hasn't been taken.
          */
         request_mem_region(sachip->phys + SA1111_INTC, 512, "irq");
 
+        ret = irq_alloc_descs(-1, irq_base, SA1111_IRQ_NR, -1);
+        if (ret <= 0) {
+                dev_err(sachip->dev, "unable to allocate %u irqs: %d\n",
+                        SA1111_IRQ_NR, ret);
+                if (ret == 0)
+                        ret = -EINVAL;
+                return ret;
+        }
+
+        sachip->irq_base = ret;
+
         /* disable all IRQs */
         sa1111_writel(0, irqbase + SA1111_INTEN0);
         sa1111_writel(0, irqbase + SA1111_INTEN1);
@@ -463,14 +481,16 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
         sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0);
         sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1);
 
-        for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
+        for (i = IRQ_GPAIN0; i <= SSPROR; i++) {
+                irq = sachip->irq_base + i;
                 irq_set_chip_and_handler(irq, &sa1111_low_chip,
                                          handle_edge_irq);
                 irq_set_chip_data(irq, sachip);
                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
         }
 
-        for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
+        for (i = AUDXMTDMADONEA; i <= IRQ_S1_BVD1_STSCHG; i++) {
+                irq = sachip->irq_base + i;
                 irq_set_chip_and_handler(irq, &sa1111_high_chip,
                                          handle_edge_irq);
                 irq_set_chip_data(irq, sachip);
@@ -483,6 +503,11 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
         irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
         irq_set_handler_data(sachip->irq, sachip);
         irq_set_chained_handler(sachip->irq, sa1111_irq_handler);
+
+        dev_info(sachip->dev, "Providing IRQ%u-%u\n",
+                sachip->irq_base, sachip->irq_base + SA1111_IRQ_NR - 1);
+
+        return 0;
 }
 
 /*
@@ -581,41 +606,10 @@ sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac,
 }
 #endif
 
-#ifdef CONFIG_DMABOUNCE
-/*
- * According to the "Intel StrongARM SA-1111 Microprocessor Companion
- * Chip Specification Update" (June 2000), erratum #7, there is a
- * significant bug in the SA1111 SDRAM shared memory controller.  If
- * an access to a region of memory above 1MB relative to the bank base,
- * it is important that address bit 10 _NOT_ be asserted. Depending
- * on the configuration of the RAM, bit 10 may correspond to one
- * of several different (processor-relative) address bits.
- *
- * This routine only identifies whether or not a given DMA address
- * is susceptible to the bug.
- *
- * This should only get called for sa1111_device types due to the
- * way we configure our device dma_masks.
- */
-static int sa1111_needs_bounce(struct device *dev, dma_addr_t addr, size_t size)
-{
-        /*
-         * Section 4.6 of the "Intel StrongARM SA-1111 Development Module
-         * User's Guide" mentions that jumpers R51 and R52 control the
-         * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or
-         * SDRAM bank 1 on Neponset). The default configuration selects
-         * Assabet, so any address in bank 1 is necessarily invalid.
-         */
-        return (machine_is_assabet() || machine_is_pfs168()) &&
-                (addr >= 0xc8000000 || (addr + size) >= 0xc8000000);
-}
-#endif
-
 static void sa1111_dev_release(struct device *_dev)
 {
         struct sa1111_dev *dev = SA1111_DEV(_dev);
 
-        release_resource(&dev->res);
         kfree(dev);
 }
 
@@ -624,67 +618,58 @@ sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
                       struct sa1111_dev_info *info)
 {
         struct sa1111_dev *dev;
+        unsigned i;
         int ret;
 
         dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL);
         if (!dev) {
                 ret = -ENOMEM;
-                goto out;
+                goto err_alloc;
         }
 
+        device_initialize(&dev->dev);
         dev_set_name(&dev->dev, "%4.4lx", info->offset);
         dev->devid       = info->devid;
         dev->dev.parent  = sachip->dev;
         dev->dev.bus     = &sa1111_bus_type;
         dev->dev.release = sa1111_dev_release;
-        dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask;
         dev->res.start   = sachip->phys + info->offset;
         dev->res.end     = dev->res.start + 511;
         dev->res.name    = dev_name(&dev->dev);
         dev->res.flags   = IORESOURCE_MEM;
         dev->mapbase     = sachip->base + info->offset;
         dev->skpcr_mask  = info->skpcr_mask;
-        memmove(dev->irq, info->irq, sizeof(dev->irq));
-
-        ret = request_resource(parent, &dev->res);
-        if (ret) {
-                printk("SA1111: failed to allocate resource for %s\n",
-                        dev->res.name);
-                dev_set_name(&dev->dev, NULL);
-                kfree(dev);
-                goto out;
-        }
-
 
-        ret = device_register(&dev->dev);
-        if (ret) {
-                release_resource(&dev->res);
-                kfree(dev);
-                goto out;
-        }
+        for (i = 0; i < ARRAY_SIZE(info->irq); i++)
+                dev->irq[i] = sachip->irq_base + info->irq[i];
 
-#ifdef CONFIG_DMABOUNCE
         /*
-         * If the parent device has a DMA mask associated with it,
-         * propagate it down to the children.
+         * If the parent device has a DMA mask associated with it, and
+         * this child supports DMA, propagate it down to the children.
          */
-        if (sachip->dev->dma_mask) {
+        if (info->dma && sachip->dev->dma_mask) {
                 dev->dma_mask = *sachip->dev->dma_mask;
                 dev->dev.dma_mask = &dev->dma_mask;
+                dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask;
+        }
 
-                if (dev->dma_mask != 0xffffffffUL) {
-                        ret = dmabounce_register_dev(&dev->dev, 1024, 4096,
-                                        sa1111_needs_bounce);
-                        if (ret) {
-                                dev_err(&dev->dev, "SA1111: Failed to register"
-                                        " with dmabounce\n");
-                                device_unregister(&dev->dev);
-                        }
-                }
+        ret = request_resource(parent, &dev->res);
+        if (ret) {
+                dev_err(sachip->dev, "failed to allocate resource for %s\n",
+                        dev->res.name);
+                goto err_resource;
         }
-#endif
 
-out:
+        ret = device_add(&dev->dev);
+        if (ret)
+                goto err_add;
+        return 0;
+
+ err_add:
+        release_resource(&dev->res);
+ err_resource:
+        put_device(&dev->dev);
+ err_alloc:
         return ret;
 }
 
@@ -698,16 +683,21 @@ out:
  *      Returns:
  *      %-ENODEV        device not found.
  *      %-EBUSY         physical address already marked in-use.
+ *      %-EINVAL        no platform data passed
  *      %0              successful.
  */
 static int __devinit
 __sa1111_probe(struct device *me, struct resource *mem, int irq)
 {
+        struct sa1111_platform_data *pd = me->platform_data;
         struct sa1111 *sachip;
         unsigned long id;
         unsigned int has_devs;
         int i, ret = -ENODEV;
 
+        if (!pd)
+                return -EINVAL;
+
         sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL);
         if (!sachip)
                 return -ENOMEM;
@@ -727,6 +717,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq)
         sachip->dev = me;
         dev_set_drvdata(sachip->dev, sachip);
 
+        sachip->pdata = pd;
         sachip->phys = mem->start;
         sachip->irq = irq;
 
@@ -759,6 +750,16 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq)
          */
         sa1111_wake(sachip);
 
+        /*
+         * The interrupt controller must be initialised before any
+         * other device to ensure that the interrupts are available.
+         */
+        if (sachip->irq != NO_IRQ) {
+                ret = sa1111_setup_irq(sachip, pd->irq_base);
+                if (ret)
+                        goto err_unmap;
+        }
+
 #ifdef CONFIG_ARCH_SA1100
         {
         unsigned int val;
@@ -789,24 +790,14 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq)
         }
 #endif
 
-        /*
-         * The interrupt controller must be initialised before any
-         * other device to ensure that the interrupts are available.
-         */
-        if (sachip->irq != NO_IRQ)
-                sa1111_setup_irq(sachip);
-
         g_sa1111 = sachip;
 
         has_devs = ~0;
-        if (machine_is_assabet() || machine_is_jornada720() ||
-            machine_is_badge4())
-                has_devs &= ~(1 << 4);
-        else
-                has_devs &= ~(1 << 1);
+        if (pd)
+                has_devs &= ~pd->disable_devs;
 
         for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++)
-                if (has_devs & (1 << i))
+                if (sa1111_devices[i].devid & has_devs)
                         sa1111_init_one_child(sachip, mem, &sa1111_devices[i]);
 
         return 0;
@@ -824,7 +815,10 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq)
 
 static int sa1111_remove_one(struct device *dev, void *data)
 {
-        device_unregister(dev);
+        struct sa1111_dev *sadev = SA1111_DEV(dev);
+        device_del(&sadev->dev);
+        release_resource(&sadev->res);
+        put_device(&sadev->dev);
         return 0;
 }
 
@@ -846,6 +840,7 @@ static void __sa1111_remove(struct sa1111 *sachip)
         if (sachip->irq != NO_IRQ) {
                 irq_set_chained_handler(sachip->irq, NULL);
                 irq_set_handler_data(sachip->irq, NULL);
+                irq_free_descs(sachip->irq_base, SA1111_IRQ_NR);
 
                 release_mem_region(sachip->phys + SA1111_INTC, 512);
         }
@@ -904,6 +899,9 @@ static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
         save->skpwm0   = sa1111_readl(base + SA1111_SKPWM0);
         save->skpwm1   = sa1111_readl(base + SA1111_SKPWM1);
 
+        sa1111_writel(0, sachip->base + SA1111_SKPWM0);
+        sa1111_writel(0, sachip->base + SA1111_SKPWM1);
+
         base = sachip->base + SA1111_INTC;
         save->intpol0  = sa1111_readl(base + SA1111_INTPOL0);
         save->intpol1  = sa1111_readl(base + SA1111_INTPOL1);
@@ -919,13 +917,15 @@ static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
          */
         val = sa1111_readl(sachip->base + SA1111_SKCR);
         sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR);
-        sa1111_writel(0, sachip->base + SA1111_SKPWM0);
-        sa1111_writel(0, sachip->base + SA1111_SKPWM1);
 
         clk_disable(sachip->clk);
 
         spin_unlock_irqrestore(&sachip->lock, flags);
 
+#ifdef CONFIG_ARCH_SA1100
+        sa1110_mb_disable();
+#endif
+
         return 0;
 }
 
@@ -966,6 +966,11 @@ static int sa1111_resume(struct platform_device *dev)
          */
         sa1111_wake(sachip);
 
+#ifdef CONFIG_ARCH_SA1100
+        /* Enable the memory bus request/grant signals */
+        sa1110_mb_enable();
+#endif
+
         /*
          * Only lock for write ops. Also, sa1111_wake must be called with
          * released spinlock!
@@ -1053,6 +1058,7 @@ static struct platform_driver sa1111_device_driver = {
         .resume         = sa1111_resume,
         .driver         = {
                 .name   = "sa1111",
+                .owner  = THIS_MODULE,
         },
 };
 
@@ -1238,16 +1244,23 @@ EXPORT_SYMBOL(sa1111_set_sleep_io);
  *      sa1111_enable_device - enable an on-chip SA1111 function block
  *      @sadev: SA1111 function block device to enable
  */
-void sa1111_enable_device(struct sa1111_dev *sadev)
+int sa1111_enable_device(struct sa1111_dev *sadev)
 {
         struct sa1111 *sachip = sa1111_chip_driver(sadev);
         unsigned long flags;
         unsigned int val;
+        int ret = 0;
 
-        spin_lock_irqsave(&sachip->lock, flags);
-        val = sa1111_readl(sachip->base + SA1111_SKPCR);
-        sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
-        spin_unlock_irqrestore(&sachip->lock, flags);
+        if (sachip->pdata && sachip->pdata->enable)
+                ret = sachip->pdata->enable(sachip->pdata->data, sadev->devid);
+
+        if (ret == 0) {
+                spin_lock_irqsave(&sachip->lock, flags);
+                val = sa1111_readl(sachip->base + SA1111_SKPCR);
+                sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
+                spin_unlock_irqrestore(&sachip->lock, flags);
+        }
+        return ret;
 }
 EXPORT_SYMBOL(sa1111_enable_device);
 
@@ -1265,6 +1278,9 @@ void sa1111_disable_device(struct sa1111_dev *sadev)
         val = sa1111_readl(sachip->base + SA1111_SKPCR);
         sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
         spin_unlock_irqrestore(&sachip->lock, flags);
+
+        if (sachip->pdata && sachip->pdata->disable)
+                sachip->pdata->disable(sachip->pdata->data, sadev->devid);
 }
 EXPORT_SYMBOL(sa1111_disable_device);
 
@@ -1279,7 +1295,7 @@ static int sa1111_match(struct device *_dev, struct device_driver *_drv)
         struct sa1111_dev *dev = SA1111_DEV(_dev);
         struct sa1111_driver *drv = SA1111_DRV(_drv);
 
-        return dev->devid == drv->devid;
+        return dev->devid & drv->devid;
 }
 
 static int sa1111_bus_suspend(struct device *dev, pm_message_t state)
@@ -1304,6 +1320,14 @@ static int sa1111_bus_resume(struct device *dev)
         return ret;
 }
 
+static void sa1111_bus_shutdown(struct device *dev)
+{
+        struct sa1111_driver *drv = SA1111_DRV(dev->driver);
+
+        if (drv && drv->shutdown)
+                drv->shutdown(SA1111_DEV(dev));
+}
+
 static int sa1111_bus_probe(struct device *dev)
 {
         struct sa1111_dev *sadev = SA1111_DEV(dev);
@@ -1333,6 +1357,7 @@ struct bus_type sa1111_bus_type = {
         .remove         = sa1111_bus_remove,
         .suspend        = sa1111_bus_suspend,
         .resume         = sa1111_bus_resume,
+        .shutdown       = sa1111_bus_shutdown,
 };
 EXPORT_SYMBOL(sa1111_bus_type);
 
@@ -1349,9 +1374,70 @@ void sa1111_driver_unregister(struct sa1111_driver *driver)
 }
 EXPORT_SYMBOL(sa1111_driver_unregister);
 
+#ifdef CONFIG_DMABOUNCE
+/*
+ * According to the "Intel StrongARM SA-1111 Microprocessor Companion
+ * Chip Specification Update" (June 2000), erratum #7, there is a
+ * significant bug in the SA1111 SDRAM shared memory controller.  If
+ * an access to a region of memory above 1MB relative to the bank base,
+ * it is important that address bit 10 _NOT_ be asserted. Depending
+ * on the configuration of the RAM, bit 10 may correspond to one
+ * of several different (processor-relative) address bits.
+ *
+ * This routine only identifies whether or not a given DMA address
+ * is susceptible to the bug.
+ *
+ * This should only get called for sa1111_device types due to the
+ * way we configure our device dma_masks.
+ */
+static int sa1111_needs_bounce(struct device *dev, dma_addr_t addr, size_t size)
+{
+        /*
+         * Section 4.6 of the "Intel StrongARM SA-1111 Development Module
+         * User's Guide" mentions that jumpers R51 and R52 control the
+         * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or
+         * SDRAM bank 1 on Neponset). The default configuration selects
+         * Assabet, so any address in bank 1 is necessarily invalid.
+         */
+        return (machine_is_assabet() || machine_is_pfs168()) &&
+                (addr >= 0xc8000000 || (addr + size) >= 0xc8000000);
+}
+
+static int sa1111_notifier_call(struct notifier_block *n, unsigned long action,
+        void *data)
+{
+        struct sa1111_dev *dev = SA1111_DEV(data);
+
+        switch (action) {
+        case BUS_NOTIFY_ADD_DEVICE:
+                if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL) {
+                        int ret = dmabounce_register_dev(&dev->dev, 1024, 4096,
+                                        sa1111_needs_bounce);
+                        if (ret)
+                                dev_err(&dev->dev, "failed to register with dmabounce: %d\n", ret);
+                }
+                break;
+
+        case BUS_NOTIFY_DEL_DEVICE:
+                if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL)
+                        dmabounce_unregister_dev(&dev->dev);
+                break;
+        }
+        return NOTIFY_OK;
+}
+
+static struct notifier_block sa1111_bus_notifier = {
+        .notifier_call = sa1111_notifier_call,
+};
+#endif
+
 static int __init sa1111_init(void)
 {
         int ret = bus_register(&sa1111_bus_type);
+#ifdef CONFIG_DMABOUNCE
+        if (ret == 0)
+                bus_register_notifier(&sa1111_bus_type, &sa1111_bus_notifier);
+#endif
         if (ret == 0)
                 platform_driver_register(&sa1111_device_driver);
         return ret;
@@ -1360,6 +1446,9 @@ static int __init sa1111_init(void)
 static void __exit sa1111_exit(void)
 {
         platform_driver_unregister(&sa1111_device_driver);
+#ifdef CONFIG_DMABOUNCE
+        bus_unregister_notifier(&sa1111_bus_type, &sa1111_bus_notifier);
+#endif
         bus_unregister(&sa1111_bus_type);
 }
 
diff --git a/arch/arm/common/via82c505.c b/arch/arm/common/via82c505.c
index 67dd2affc57a..1171a5010aea 100644
--- a/arch/arm/common/via82c505.c
+++ b/arch/arm/common/via82c505.c
@@ -6,7 +6,6 @@
 #include <linux/ioport.h>
 #include <linux/io.h>
 
-#include <asm/system.h>
 
 #include <asm/mach/pci.h>
 
diff --git a/arch/arm/configs/at91sam9g20_defconfig b/arch/arm/configs/at91sam9g20_defconfig
index 9123568d9a8d..994d331b2319 100644
--- a/arch/arm/configs/at91sam9g20_defconfig
+++ b/arch/arm/configs/at91sam9g20_defconfig
@@ -74,6 +74,8 @@ CONFIG_LEGACY_PTY_COUNT=16
 CONFIG_SERIAL_ATMEL=y
 CONFIG_SERIAL_ATMEL_CONSOLE=y
 CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_GPIO=y
 CONFIG_SPI=y
 CONFIG_SPI_ATMEL=y
 CONFIG_SPI_SPIDEV=y
@@ -105,6 +107,7 @@ CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_TIMER=y
 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_RV3029C2=y
 CONFIG_RTC_DRV_AT91SAM9=y
 CONFIG_EXT2_FS=y
 CONFIG_MSDOS_FS=y
diff --git a/arch/arm/configs/integrator_defconfig b/arch/arm/configs/integrator_defconfig
index 1103f62a1964..a8314c3ee84d 100644
--- a/arch/arm/configs/integrator_defconfig
+++ b/arch/arm/configs/integrator_defconfig
@@ -57,18 +57,24 @@ CONFIG_NETDEVICES=y
 CONFIG_NET_ETHERNET=y
 CONFIG_NET_PCI=y
 CONFIG_E100=y
+CONFIG_SMC91X=y
 # CONFIG_KEYBOARD_ATKBD is not set
 # CONFIG_SERIO_SERPORT is not set
 CONFIG_SERIAL_AMBA_PL010=y
 CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
 CONFIG_FB=y
 CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_ARMCLCD=y
 CONFIG_FB_MATROX=y
 CONFIG_FB_MATROX_MILLENIUM=y
 CONFIG_FB_MATROX_MYSTIQUE=y
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_MMC=y
+CONFIG_MMC_ARMMMCI=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_PL030=y
 CONFIG_EXT2_FS=y
+CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_CRAMFS=y
@@ -78,5 +84,7 @@ CONFIG_ROOT_NFS=y
 CONFIG_NFSD=y
 CONFIG_NFSD_V3=y
 CONFIG_PARTITION_ADVANCED=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_KERNEL=y
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index 2d7b6e7b7271..889d73ac1ae1 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -13,6 +13,7 @@ CONFIG_UX500_SOC_DB8500=y
 CONFIG_MACH_HREFV60=y
 CONFIG_MACH_SNOWBALL=y
 CONFIG_MACH_U5500=y
+CONFIG_MACH_UX500_DT=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_SMP=y
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 23371b17b23e..03fb93621d0d 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -23,6 +23,8 @@
 #include <asm/ptrace.h>
 #include <asm/domain.h>
 
+#define IOMEM(x)        (x)
+
 /*
  * Endian independent macros for shifting bytes within registers.
  */
diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h
index 86976d034382..68374ba6a943 100644
--- a/arch/arm/include/asm/atomic.h
+++ b/arch/arm/include/asm/atomic.h
@@ -13,7 +13,9 @@
 
 #include <linux/compiler.h>
 #include <linux/types.h>
-#include <asm/system.h>
+#include <linux/irqflags.h>
+#include <asm/barrier.h>
+#include <asm/cmpxchg.h>
 
 #define ATOMIC_INIT(i)  { (i) }
 
diff --git a/arch/arm/include/asm/barrier.h b/arch/arm/include/asm/barrier.h
new file mode 100644
index 000000000000..05112380dc53
--- /dev/null
+++ b/arch/arm/include/asm/barrier.h
@@ -0,0 +1,69 @@
+#ifndef __ASM_BARRIER_H
+#define __ASM_BARRIER_H
+
+#ifndef __ASSEMBLY__
+#include <asm/outercache.h>
+
+#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
+
+#if __LINUX_ARM_ARCH__ >= 7 ||          \
+        (__LINUX_ARM_ARCH__ == 6 && defined(CONFIG_CPU_32v6K))
+#define sev()   __asm__ __volatile__ ("sev" : : : "memory")
+#define wfe()   __asm__ __volatile__ ("wfe" : : : "memory")
+#define wfi()   __asm__ __volatile__ ("wfi" : : : "memory")
+#endif
+
+#if __LINUX_ARM_ARCH__ >= 7
+#define isb() __asm__ __volatile__ ("isb" : : : "memory")
+#define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
+#define dmb() __asm__ __volatile__ ("dmb" : : : "memory")
+#elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6
+#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
+                                    : : "r" (0) : "memory")
+#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
+                                    : : "r" (0) : "memory")
+#define dmb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \
+                                    : : "r" (0) : "memory")
+#elif defined(CONFIG_CPU_FA526)
+#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
+                                    : : "r" (0) : "memory")
+#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
+                                    : : "r" (0) : "memory")
+#define dmb() __asm__ __volatile__ ("" : : : "memory")
+#else
+#define isb() __asm__ __volatile__ ("" : : : "memory")
+#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
+                                    : : "r" (0) : "memory")
+#define dmb() __asm__ __volatile__ ("" : : : "memory")
+#endif
+
+#ifdef CONFIG_ARCH_HAS_BARRIERS
+#include <mach/barriers.h>
+#elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)
+#define mb()            do { dsb(); outer_sync(); } while (0)
+#define rmb()           dsb()
+#define wmb()           mb()
+#else
+#include <asm/memory.h>
+#define mb()    do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
+#define rmb()   do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
+#define wmb()   do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
+#endif
+
+#ifndef CONFIG_SMP
+#define smp_mb()        barrier()
+#define smp_rmb()       barrier()
+#define smp_wmb()       barrier()
+#else
+#define smp_mb()        dmb()
+#define smp_rmb()       dmb()
+#define smp_wmb()       dmb()
+#endif
+
+#define read_barrier_depends()          do { } while(0)
+#define smp_read_barrier_depends()      do { } while(0)
+
+#define set_mb(var, value)      do { var = value; smp_mb(); } while (0)
+
+#endif /* !__ASSEMBLY__ */
+#endif /* __ASM_BARRIER_H */
diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h
index f7419ef9c8f9..e691ec91e4d3 100644
--- a/arch/arm/include/asm/bitops.h
+++ b/arch/arm/include/asm/bitops.h
@@ -24,7 +24,7 @@
 #endif
 
 #include <linux/compiler.h>
-#include <asm/system.h>
+#include <linux/irqflags.h>
 
 #define smp_mb__before_clear_bit()      smp_mb()
 #define smp_mb__after_clear_bit()       smp_mb()
diff --git a/arch/arm/include/asm/bug.h b/arch/arm/include/asm/bug.h
index fac79dceb736..7af5c6c3653a 100644
--- a/arch/arm/include/asm/bug.h
+++ b/arch/arm/include/asm/bug.h
@@ -1,6 +1,7 @@
 #ifndef _ASMARM_BUG_H
 #define _ASMARM_BUG_H
 
+#include <linux/linkage.h>
 
 #ifdef CONFIG_BUG
 
@@ -57,4 +58,33 @@ do {								\
 
 #include <asm-generic/bug.h>
 
+struct pt_regs;
+void die(const char *msg, struct pt_regs *regs, int err);
+
+struct siginfo;
+void arm_notify_die(const char *str, struct pt_regs *regs, struct siginfo *info,
+                unsigned long err, unsigned long trap);
+
+#ifdef CONFIG_ARM_LPAE
+#define FAULT_CODE_ALIGNMENT    33
+#define FAULT_CODE_DEBUG        34
+#else
+#define FAULT_CODE_ALIGNMENT    1
+#define FAULT_CODE_DEBUG        2
+#endif
+
+void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
+                                       struct pt_regs *),
+                     int sig, int code, const char *name);
+
+void hook_ifault_code(int nr, int (*fn)(unsigned long, unsigned int,
+                                       struct pt_regs *),
+                     int sig, int code, const char *name);
+
+extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
+
+struct mm_struct;
+extern void show_pte(struct mm_struct *mm, unsigned long addr);
+extern void __show_regs(struct pt_regs *);
+
 #endif
diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h
new file mode 100644
index 000000000000..d41d7cbf0ada
--- /dev/null
+++ b/arch/arm/include/asm/cmpxchg.h
@@ -0,0 +1,295 @@
+#ifndef __ASM_ARM_CMPXCHG_H
+#define __ASM_ARM_CMPXCHG_H
+
+#include <linux/irqflags.h>
+#include <asm/barrier.h>
+
+#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110)
+/*
+ * On the StrongARM, "swp" is terminally broken since it bypasses the
+ * cache totally.  This means that the cache becomes inconsistent, and,
+ * since we use normal loads/stores as well, this is really bad.
+ * Typically, this causes oopsen in filp_close, but could have other,
+ * more disastrous effects.  There are two work-arounds:
+ *  1. Disable interrupts and emulate the atomic swap
+ *  2. Clean the cache, perform atomic swap, flush the cache
+ *
+ * We choose (1) since its the "easiest" to achieve here and is not
+ * dependent on the processor type.
+ *
+ * NOTE that this solution won't work on an SMP system, so explcitly
+ * forbid it here.
+ */
+#define swp_is_buggy
+#endif
+
+static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
+{
+        extern void __bad_xchg(volatile void *, int);
+        unsigned long ret;
+#ifdef swp_is_buggy
+        unsigned long flags;
+#endif
+#if __LINUX_ARM_ARCH__ >= 6
+        unsigned int tmp;
+#endif
+
+        smp_mb();
+
+        switch (size) {
+#if __LINUX_ARM_ARCH__ >= 6
+        case 1:
+                asm volatile("@ __xchg1\n"
+                "1:     ldrexb  %0, [%3]\n"
+                "       strexb  %1, %2, [%3]\n"
+                "       teq     %1, #0\n"
+                "       bne     1b"
+                        : "=&r" (ret), "=&r" (tmp)
+                        : "r" (x), "r" (ptr)
+                        : "memory", "cc");
+                break;
+        case 4:
+                asm volatile("@ __xchg4\n"
+                "1:     ldrex   %0, [%3]\n"
+                "       strex   %1, %2, [%3]\n"
+                "       teq     %1, #0\n"
+                "       bne     1b"
+                        : "=&r" (ret), "=&r" (tmp)
+                        : "r" (x), "r" (ptr)
+                        : "memory", "cc");
+                break;
+#elif defined(swp_is_buggy)
+#ifdef CONFIG_SMP
+#error SMP is not supported on this platform
+#endif
+        case 1:
+                raw_local_irq_save(flags);
+                ret = *(volatile unsigned char *)ptr;
+                *(volatile unsigned char *)ptr = x;
+                raw_local_irq_restore(flags);
+                break;
+
+        case 4:
+                raw_local_irq_save(flags);
+                ret = *(volatile unsigned long *)ptr;
+                *(volatile unsigned long *)ptr = x;
+                raw_local_irq_restore(flags);
+                break;
+#else
+        case 1:
+                asm volatile("@ __xchg1\n"
+                "       swpb    %0, %1, [%2]"
+                        : "=&r" (ret)
+                        : "r" (x), "r" (ptr)
+                        : "memory", "cc");
+                break;
+        case 4:
+                asm volatile("@ __xchg4\n"
+                "       swp     %0, %1, [%2]"
+                        : "=&r" (ret)
+                        : "r" (x), "r" (ptr)
+                        : "memory", "cc");
+                break;
+#endif
+        default:
+                __bad_xchg(ptr, size), ret = 0;
+                break;
+        }
+        smp_mb();
+
+        return ret;
+}
+
+#define xchg(ptr,x) \
+        ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
+
+#include <asm-generic/cmpxchg-local.h>
+
+#if __LINUX_ARM_ARCH__ < 6
+/* min ARCH < ARMv6 */
+
+#ifdef CONFIG_SMP
+#error "SMP is not supported on this platform"
+#endif
+
+/*
+ * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
+ * them available.
+ */
+#define cmpxchg_local(ptr, o, n)                                               \
+        ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
+                        (unsigned long)(n), sizeof(*(ptr))))
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+
+#ifndef CONFIG_SMP
+#include <asm-generic/cmpxchg.h>
+#endif
+
+#else   /* min ARCH >= ARMv6 */
+
+extern void __bad_cmpxchg(volatile void *ptr, int size);
+
+/*
+ * cmpxchg only support 32-bits operands on ARMv6.
+ */
+
+static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
+                                      unsigned long new, int size)
+{
+        unsigned long oldval, res;
+
+        switch (size) {
+#ifndef CONFIG_CPU_V6   /* min ARCH >= ARMv6K */
+        case 1:
+                do {
+                        asm volatile("@ __cmpxchg1\n"
+                        "       ldrexb  %1, [%2]\n"
+                        "       mov     %0, #0\n"
+                        "       teq     %1, %3\n"
+                        "       strexbeq %0, %4, [%2]\n"
+                                : "=&r" (res), "=&r" (oldval)
+                                : "r" (ptr), "Ir" (old), "r" (new)
+                                : "memory", "cc");
+                } while (res);
+                break;
+        case 2:
+                do {
+                        asm volatile("@ __cmpxchg1\n"
+                        "       ldrexh  %1, [%2]\n"
+                        "       mov     %0, #0\n"
+                        "       teq     %1, %3\n"
+                        "       strexheq %0, %4, [%2]\n"
+                                : "=&r" (res), "=&r" (oldval)
+                                : "r" (ptr), "Ir" (old), "r" (new)
+                                : "memory", "cc");
+                } while (res);
+                break;
+#endif
+        case 4:
+                do {
+                        asm volatile("@ __cmpxchg4\n"
+                        "       ldrex   %1, [%2]\n"
+                        "       mov     %0, #0\n"
+                        "       teq     %1, %3\n"
+                        "       strexeq %0, %4, [%2]\n"
+                                : "=&r" (res), "=&r" (oldval)
+                                : "r" (ptr), "Ir" (old), "r" (new)
+                                : "memory", "cc");
+                } while (res);
+                break;
+        default:
+                __bad_cmpxchg(ptr, size);
+                oldval = 0;
+        }
+
+        return oldval;
+}
+
+static inline unsigned long __cmpxchg_mb(volatile void *ptr, unsigned long old,
+                                         unsigned long new, int size)
+{
+        unsigned long ret;
+
+        smp_mb();
+        ret = __cmpxchg(ptr, old, new, size);
+        smp_mb();
+
+        return ret;
+}
+
+#define cmpxchg(ptr,o,n)                                                \
+        ((__typeof__(*(ptr)))__cmpxchg_mb((ptr),                        \
+                                          (unsigned long)(o),           \
+                                          (unsigned long)(n),           \
+                                          sizeof(*(ptr))))
+
+static inline unsigned long __cmpxchg_local(volatile void *ptr,
+                                            unsigned long old,
+                                            unsigned long new, int size)
+{
+        unsigned long ret;
+
+        switch (size) {
+#ifdef CONFIG_CPU_V6    /* min ARCH == ARMv6 */
+        case 1:
+        case 2:
+                ret = __cmpxchg_local_generic(ptr, old, new, size);
+                break;
+#endif
+        default:
+                ret = __cmpxchg(ptr, old, new, size);
+        }
+
+        return ret;
+}
+
+#define cmpxchg_local(ptr,o,n)                                          \
+        ((__typeof__(*(ptr)))__cmpxchg_local((ptr),                     \
+                                       (unsigned long)(o),              \
+                                       (unsigned long)(n),              \
+                                       sizeof(*(ptr))))
+
+#ifndef CONFIG_CPU_V6   /* min ARCH >= ARMv6K */
+
+/*
+ * Note : ARMv7-M (currently unsupported by Linux) does not support
+ * ldrexd/strexd. If ARMv7-M is ever supported by the Linux kernel, it should
+ * not be allowed to use __cmpxchg64.
+ */
+static inline unsigned long long __cmpxchg64(volatile void *ptr,
+                                             unsigned long long old,
+                                             unsigned long long new)
+{
+        register unsigned long long oldval asm("r0");
+        register unsigned long long __old asm("r2") = old;
+        register unsigned long long __new asm("r4") = new;
+        unsigned long res;
+
+        do {
+                asm volatile(
+                "       @ __cmpxchg8\n"
+                "       ldrexd  %1, %H1, [%2]\n"
+                "       mov     %0, #0\n"
+                "       teq     %1, %3\n"
+                "       teqeq   %H1, %H3\n"
+                "       strexdeq %0, %4, %H4, [%2]\n"
+                        : "=&r" (res), "=&r" (oldval)
+                        : "r" (ptr), "Ir" (__old), "r" (__new)
+                        : "memory", "cc");
+        } while (res);
+
+        return oldval;
+}
+
+static inline unsigned long long __cmpxchg64_mb(volatile void *ptr,
+                                                unsigned long long old,
+                                                unsigned long long new)
+{
+        unsigned long long ret;
+
+        smp_mb();
+        ret = __cmpxchg64(ptr, old, new);
+        smp_mb();
+
+        return ret;
+}
+
+#define cmpxchg64(ptr,o,n)                                              \
+        ((__typeof__(*(ptr)))__cmpxchg64_mb((ptr),                      \
+                                            (unsigned long long)(o),    \
+                                            (unsigned long long)(n)))
+
+#define cmpxchg64_local(ptr,o,n)                                        \
+        ((__typeof__(*(ptr)))__cmpxchg64((ptr),                         \
+                                         (unsigned long long)(o),       \
+                                         (unsigned long long)(n)))
+
+#else /* min ARCH = ARMv6 */
+
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+
+#endif
+
+#endif  /* __LINUX_ARM_ARCH__ >= 6 */
+
+#endif /* __ASM_ARM_CMPXCHG_H */
diff --git a/arch/arm/include/asm/compiler.h b/arch/arm/include/asm/compiler.h
new file mode 100644
index 000000000000..8155db2f7fa1
--- /dev/null
+++ b/arch/arm/include/asm/compiler.h
@@ -0,0 +1,15 @@
+#ifndef __ASM_ARM_COMPILER_H
+#define __ASM_ARM_COMPILER_H
+
+/*
+ * This is used to ensure the compiler did actually allocate the register we
+ * asked it for some inline assembly sequences.  Apparently we can't trust
+ * the compiler from one version to another so a bit of paranoia won't hurt.
+ * This string is meant to be concatenated with the inline asm string and
+ * will cause compilation to stop on mismatch.
+ * (for details, see gcc PR 15089)
+ */
+#define __asmeq(x, y)  ".ifnc " x "," y " ; .err ; .endif\n\t"
+
+
+#endif /* __ASM_ARM_COMPILER_H */
diff --git a/arch/arm/include/asm/cp15.h b/arch/arm/include/asm/cp15.h
new file mode 100644
index 000000000000..5ef4d8015a60
--- /dev/null
+++ b/arch/arm/include/asm/cp15.h
@@ -0,0 +1,87 @@
+#ifndef __ASM_ARM_CP15_H
+#define __ASM_ARM_CP15_H
+
+#include <asm/barrier.h>
+
+/*
+ * CR1 bits (CP#15 CR1)
+ */
+#define CR_M    (1 << 0)        /* MMU enable                           */
+#define CR_A    (1 << 1)        /* Alignment abort enable               */
+#define CR_C    (1 << 2)        /* Dcache enable                        */
+#define CR_W    (1 << 3)        /* Write buffer enable                  */
+#define CR_P    (1 << 4)        /* 32-bit exception handler             */
+#define CR_D    (1 << 5)        /* 32-bit data address range            */
+#define CR_L    (1 << 6)        /* Implementation defined               */
+#define CR_B    (1 << 7)        /* Big endian                           */
+#define CR_S    (1 << 8)        /* System MMU protection                */
+#define CR_R    (1 << 9)        /* ROM MMU protection                   */
+#define CR_F    (1 << 10)       /* Implementation defined               */
+#define CR_Z    (1 << 11)       /* Implementation defined               */
+#define CR_I    (1 << 12)       /* Icache enable                        */
+#define CR_V    (1 << 13)       /* Vectors relocated to 0xffff0000      */
+#define CR_RR   (1 << 14)       /* Round Robin cache replacement        */
+#define CR_L4   (1 << 15)       /* LDR pc can set T bit                 */
+#define CR_DT   (1 << 16)
+#define CR_IT   (1 << 18)
+#define CR_ST   (1 << 19)
+#define CR_FI   (1 << 21)       /* Fast interrupt (lower latency mode)  */
+#define CR_U    (1 << 22)       /* Unaligned access operation           */
+#define CR_XP   (1 << 23)       /* Extended page tables                 */
+#define CR_VE   (1 << 24)       /* Vectored interrupts                  */
+#define CR_EE   (1 << 25)       /* Exception (Big) Endian               */
+#define CR_TRE  (1 << 28)       /* TEX remap enable                     */
+#define CR_AFE  (1 << 29)       /* Access flag enable                   */
+#define CR_TE   (1 << 30)       /* Thumb exception enable               */
+
+#ifndef __ASSEMBLY__
+
+#if __LINUX_ARM_ARCH__ >= 4
+#define vectors_high()  (cr_alignment & CR_V)
+#else
+#define vectors_high()  (0)
+#endif
+
+extern unsigned long cr_no_alignment;   /* defined in entry-armv.S */
+extern unsigned long cr_alignment;      /* defined in entry-armv.S */
+
+static inline unsigned int get_cr(void)
+{
+        unsigned int val;
+        asm("mrc p15, 0, %0, c1, c0, 0  @ get CR" : "=r" (val) : : "cc");
+        return val;
+}
+
+static inline void set_cr(unsigned int val)
+{
+        asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR"
+          : : "r" (val) : "cc");
+        isb();
+}
+
+#ifndef CONFIG_SMP
+extern void adjust_cr(unsigned long mask, unsigned long set);
+#endif
+
+#define CPACC_FULL(n)           (3 << (n * 2))
+#define CPACC_SVC(n)            (1 << (n * 2))
+#define CPACC_DISABLE(n)        (0 << (n * 2))
+
+static inline unsigned int get_copro_access(void)
+{
+        unsigned int val;
+        asm("mrc p15, 0, %0, c1, c0, 2 @ get copro access"
+          : "=r" (val) : : "cc");
+        return val;
+}
+
+static inline void set_copro_access(unsigned int val)
+{
+        asm volatile("mcr p15, 0, %0, c1, c0, 2 @ set copro access"
+          : : "r" (val) : "cc");
+        isb();
+}
+
+#endif
+
+#endif
diff --git a/arch/arm/include/asm/cpuidle.h b/arch/arm/include/asm/cpuidle.h
new file mode 100644
index 000000000000..2fca60ab513a
--- /dev/null
+++ b/arch/arm/include/asm/cpuidle.h
@@ -0,0 +1,29 @@
+#ifndef __ASM_ARM_CPUIDLE_H
+#define __ASM_ARM_CPUIDLE_H
+
+#ifdef CONFIG_CPU_IDLE
+extern int arm_cpuidle_simple_enter(struct cpuidle_device *dev,
+                struct cpuidle_driver *drv, int index);
+#else
+static inline int arm_cpuidle_simple_enter(struct cpuidle_device *dev,
+                struct cpuidle_driver *drv, int index) { return -ENODEV; }
+#endif
+
+/* Common ARM WFI state */
+#define ARM_CPUIDLE_WFI_STATE_PWR(p) {\
+        .enter                  = arm_cpuidle_simple_enter,\
+        .exit_latency           = 1,\
+        .target_residency       = 1,\
+        .power_usage            = p,\
+        .flags                  = CPUIDLE_FLAG_TIME_VALID,\
+        .name                   = "WFI",\
+        .desc                   = "ARM WFI",\
+}
+
+/*
+ * in case power_specified == 1, give a default WFI power value needed
+ * by some governors
+ */
+#define ARM_CPUIDLE_WFI_STATE ARM_CPUIDLE_WFI_STATE_PWR(UINT_MAX)
+
+#endif
diff --git a/arch/arm/include/asm/div64.h b/arch/arm/include/asm/div64.h
index d3f0a9eee9f6..fe92ccf1d0b0 100644
--- a/arch/arm/include/asm/div64.h
+++ b/arch/arm/include/asm/div64.h
@@ -1,8 +1,8 @@
 #ifndef __ASM_ARM_DIV64
 #define __ASM_ARM_DIV64
 
-#include <asm/system.h>
 #include <linux/types.h>
+#include <asm/compiler.h>
 
 /*
  * The semantics of do_div() are:
diff --git a/arch/arm/include/asm/dma.h b/arch/arm/include/asm/dma.h
index 69a5b0b6455c..5694a0d6576b 100644
--- a/arch/arm/include/asm/dma.h
+++ b/arch/arm/include/asm/dma.h
@@ -19,7 +19,6 @@
  * It should not be re-used except for that purpose.
  */
 #include <linux/spinlock.h>
-#include <asm/system.h>
 #include <asm/scatterlist.h>
 
 #include <mach/isa-dma.h>
diff --git a/arch/arm/include/asm/domain.h b/arch/arm/include/asm/domain.h
index b5dc173d336f..3d2220498abc 100644
--- a/arch/arm/include/asm/domain.h
+++ b/arch/arm/include/asm/domain.h
@@ -10,6 +10,10 @@
 #ifndef __ASM_PROC_DOMAIN_H
 #define __ASM_PROC_DOMAIN_H
 
+#ifndef __ASSEMBLY__
+#include <asm/barrier.h>
+#endif
+
 /*
  * Domain numbers
  *
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h
index 0e9ce8d9686e..38050b1c4800 100644
--- a/arch/arm/include/asm/elf.h
+++ b/arch/arm/include/asm/elf.h
@@ -130,8 +130,4 @@ struct mm_struct;
 extern unsigned long arch_randomize_brk(struct mm_struct *mm);
 #define arch_randomize_brk arch_randomize_brk
 
-extern int vectors_user_mapping(void);
-#define arch_setup_additional_pages(bprm, uses_interp) vectors_user_mapping()
-#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
-
 #endif
diff --git a/arch/arm/include/asm/exec.h b/arch/arm/include/asm/exec.h
new file mode 100644
index 000000000000..7c4fbef72b3a
--- /dev/null
+++ b/arch/arm/include/asm/exec.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_ARM_EXEC_H
+#define __ASM_ARM_EXEC_H
+
+#define arch_align_stack(x) (x)
+
+#endif /* __ASM_ARM_EXEC_H */
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index 7df239bcdf27..c4c87bc12231 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -103,11 +103,11 @@
 #define L2X0_ADDR_FILTER_EN             1
 
 #ifndef __ASSEMBLY__
-extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask);
+extern void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask);
 #if defined(CONFIG_CACHE_L2X0) && defined(CONFIG_OF)
-extern int l2x0_of_init(__u32 aux_val, __u32 aux_mask);
+extern int l2x0_of_init(u32 aux_val, u32 aux_mask);
 #else
-static inline int l2x0_of_init(__u32 aux_val, __u32 aux_mask)
+static inline int l2x0_of_init(u32 aux_val, u32 aux_mask)
 {
         return -ENODEV;
 }
diff --git a/arch/arm/include/asm/hardware/iop3xx.h b/arch/arm/include/asm/hardware/iop3xx.h
index 077c32326c63..2ff2c75a4639 100644
--- a/arch/arm/include/asm/hardware/iop3xx.h
+++ b/arch/arm/include/asm/hardware/iop3xx.h
@@ -231,6 +231,9 @@ extern int iop3xx_get_init_atu(void);
 
 
 #ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+
 void iop3xx_map_io(void);
 void iop_init_cp6_handler(void);
 void iop_init_time(unsigned long tickrate);
diff --git a/arch/arm/include/asm/hardware/iop_adma.h b/arch/arm/include/asm/hardware/iop_adma.h
index 59b8c3892f76..122f86d8c991 100644
--- a/arch/arm/include/asm/hardware/iop_adma.h
+++ b/arch/arm/include/asm/hardware/iop_adma.h
@@ -49,7 +49,6 @@ struct iop_adma_device {
 /**
  * struct iop_adma_chan - internal representation of an ADMA device
  * @pending: allows batching of hardware operations
- * @completed_cookie: identifier for the most recently completed operation
  * @lock: serializes enqueue/dequeue operations to the slot pool
  * @mmr_base: memory mapped register base
  * @chain: device chain view of the descriptors
@@ -62,7 +61,6 @@ struct iop_adma_device {
  */
 struct iop_adma_chan {
         int pending;
-        dma_cookie_t completed_cookie;
         spinlock_t lock; /* protects the descriptor slot pool */
         void __iomem *mmr_base;
         struct list_head chain;
diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h
index 43cab498bc27..73f84fa4f366 100644
--- a/arch/arm/include/asm/hardware/it8152.h
+++ b/arch/arm/include/asm/hardware/it8152.h
@@ -9,6 +9,9 @@
 
 #ifndef __ASM_HARDWARE_IT8152_H
 #define __ASM_HARDWARE_IT8152_H
+
+#include <mach/irqs.h>
+
 extern void __iomem *it8152_base_address;
 
 #define IT8152_IO_BASE                  (it8152_base_address + 0x03e00000)
diff --git a/arch/arm/include/asm/hardware/pl330.h b/arch/arm/include/asm/hardware/pl330.h
deleted file mode 100644
index c1821385abfa..000000000000
--- a/arch/arm/include/asm/hardware/pl330.h
+++ /dev/null
@@ -1,217 +0,0 @@
-/* linux/include/asm/hardware/pl330.h
- *
- * Copyright (C) 2010 Samsung Electronics Co. Ltd.
- *      Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __PL330_CORE_H
-#define __PL330_CORE_H
-
-#define PL330_MAX_CHAN          8
-#define PL330_MAX_IRQS          32
-#define PL330_MAX_PERI          32
-
-enum pl330_srccachectrl {
-        SCCTRL0 = 0, /* Noncacheable and nonbufferable */
-        SCCTRL1, /* Bufferable only */
-        SCCTRL2, /* Cacheable, but do not allocate */
-        SCCTRL3, /* Cacheable and bufferable, but do not allocate */
-        SINVALID1,
-        SINVALID2,
-        SCCTRL6, /* Cacheable write-through, allocate on reads only */
-        SCCTRL7, /* Cacheable write-back, allocate on reads only */
-};
-
-enum pl330_dstcachectrl {
-        DCCTRL0 = 0, /* Noncacheable and nonbufferable */
-        DCCTRL1, /* Bufferable only */
-        DCCTRL2, /* Cacheable, but do not allocate */
-        DCCTRL3, /* Cacheable and bufferable, but do not allocate */
-        DINVALID1,              /* AWCACHE = 0x1000 */
-        DINVALID2,
-        DCCTRL6, /* Cacheable write-through, allocate on writes only */
-        DCCTRL7, /* Cacheable write-back, allocate on writes only */
-};
-
-/* Populated by the PL330 core driver for DMA API driver's info */
-struct pl330_config {
-        u32     periph_id;
-        u32     pcell_id;
-#define DMAC_MODE_NS    (1 << 0)
-        unsigned int    mode;
-        unsigned int    data_bus_width:10; /* In number of bits */
-        unsigned int    data_buf_dep:10;
-        unsigned int    num_chan:4;
-        unsigned int    num_peri:6;
-        u32             peri_ns;
-        unsigned int    num_events:6;
-        u32             irq_ns;
-};
-
-/* Handle to the DMAC provided to the PL330 core */
-struct pl330_info {
-        /* Owning device */
-        struct device *dev;
-        /* Size of MicroCode buffers for each channel. */
-        unsigned mcbufsz;
-        /* ioremap'ed address of PL330 registers. */
-        void __iomem    *base;
-        /* Client can freely use it. */
-        void    *client_data;
-        /* PL330 core data, Client must not touch it. */
-        void    *pl330_data;
-        /* Populated by the PL330 core driver during pl330_add */
-        struct pl330_config     pcfg;
-        /*
-         * If the DMAC has some reset mechanism, then the
-         * client may want to provide pointer to the method.
-         */
-        void (*dmac_reset)(struct pl330_info *pi);
-};
-
-enum pl330_byteswap {
-        SWAP_NO = 0,
-        SWAP_2,
-        SWAP_4,
-        SWAP_8,
-        SWAP_16,
-};
-
-/**
- * Request Configuration.
- * The PL330 core does not modify this and uses the last
- * working configuration if the request doesn't provide any.
- *
- * The Client may want to provide this info only for the
- * first request and a request with new settings.
- */
-struct pl330_reqcfg {
-        /* Address Incrementing */
-        unsigned dst_inc:1;
-        unsigned src_inc:1;
-
-        /*
-         * For now, the SRC & DST protection levels
-         * and burst size/length are assumed same.
-         */
-        bool nonsecure;
-        bool privileged;
-        bool insnaccess;
-        unsigned brst_len:5;
-        unsigned brst_size:3; /* in power of 2 */
-
-        enum pl330_dstcachectrl dcctl;
-        enum pl330_srccachectrl scctl;
-        enum pl330_byteswap swap;
-};
-
-/*
- * One cycle of DMAC operation.
- * There may be more than one xfer in a request.
- */
-struct pl330_xfer {
-        u32 src_addr;
-        u32 dst_addr;
-        /* Size to xfer */
-        u32 bytes;
-        /*
-         * Pointer to next xfer in the list.
-         * The last xfer in the req must point to NULL.
-         */
-        struct pl330_xfer *next;
-};
-
-/* The xfer callbacks are made with one of these arguments. */
-enum pl330_op_err {
-        /* The all xfers in the request were success. */
-        PL330_ERR_NONE,
-        /* If req aborted due to global error. */
-        PL330_ERR_ABORT,
-        /* If req failed due to problem with Channel. */
-        PL330_ERR_FAIL,
-};
-
-enum pl330_reqtype {
-        MEMTOMEM,
-        MEMTODEV,
-        DEVTOMEM,
-        DEVTODEV,
-};
-
-/* A request defining Scatter-Gather List ending with NULL xfer. */
-struct pl330_req {
-        enum pl330_reqtype rqtype;
-        /* Index of peripheral for the xfer. */
-        unsigned peri:5;
-        /* Unique token for this xfer, set by the client. */
-        void *token;
-        /* Callback to be called after xfer. */
-        void (*xfer_cb)(void *token, enum pl330_op_err err);
-        /* If NULL, req will be done at last set parameters. */
-        struct pl330_reqcfg *cfg;
-        /* Pointer to first xfer in the request. */
-        struct pl330_xfer *x;
-};
-
-/*
- * To know the status of the channel and DMAC, the client
- * provides a pointer to this structure. The PL330 core
- * fills it with current information.
- */
-struct pl330_chanstatus {
-        /*
-         * If the DMAC engine halted due to some error,
-         * the client should remove-add DMAC.
-         */
-        bool dmac_halted;
-        /*
-         * If channel is halted due to some error,
-         * the client should ABORT/FLUSH and START the channel.
-         */
-        bool faulting;
-        /* Location of last load */
-        u32 src_addr;
-        /* Location of last store */
-        u32 dst_addr;
-        /*
-         * Pointer to the currently active req, NULL if channel is
-         * inactive, even though the requests may be present.
-         */
-        struct pl330_req *top_req;
-        /* Pointer to req waiting second in the queue if any. */
-        struct pl330_req *wait_req;
-};
-
-enum pl330_chan_op {
-        /* Start the channel */
-        PL330_OP_START,
-        /* Abort the active xfer */
-        PL330_OP_ABORT,
-        /* Stop xfer and flush queue */
-        PL330_OP_FLUSH,
-};
-
-extern int pl330_add(struct pl330_info *);
-extern void pl330_del(struct pl330_info *pi);
-extern int pl330_update(const struct pl330_info *pi);
-extern void pl330_release_channel(void *ch_id);
-extern void *pl330_request_channel(const struct pl330_info *pi);
-extern int pl330_chan_status(void *ch_id, struct pl330_chanstatus *pstatus);
-extern int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op);
-extern int pl330_submit_req(void *ch_id, struct pl330_req *r);
-
-#endif  /* __PL330_CORE_H */
diff --git a/arch/arm/include/asm/hardware/sa1111.h b/arch/arm/include/asm/hardware/sa1111.h
index 92ed254c175b..7c2bbc7f0be1 100644
--- a/arch/arm/include/asm/hardware/sa1111.h
+++ b/arch/arm/include/asm/hardware/sa1111.h
@@ -132,34 +132,10 @@
 #define SKPCR_DCLKEN    (1<<7)
 #define SKPCR_PWMCLKEN  (1<<8)
 
-/*
- * USB Host controller
- */
+/* USB Host controller */
 #define SA1111_USB              0x0400
 
 /*
- * Offsets from SA1111_USB_BASE
- */
-#define SA1111_USB_STATUS       0x0118
-#define SA1111_USB_RESET        0x011c
-#define SA1111_USB_IRQTEST      0x0120
-
-#define USB_RESET_FORCEIFRESET  (1 << 0)
-#define USB_RESET_FORCEHCRESET  (1 << 1)
-#define USB_RESET_CLKGENRESET   (1 << 2)
-#define USB_RESET_SIMSCALEDOWN  (1 << 3)
-#define USB_RESET_USBINTTEST    (1 << 4)
-#define USB_RESET_SLEEPSTBYEN   (1 << 5)
-#define USB_RESET_PWRSENSELOW   (1 << 6)
-#define USB_RESET_PWRCTRLLOW    (1 << 7)
-
-#define USB_STATUS_IRQHCIRMTWKUP  (1 <<  7)
-#define USB_STATUS_IRQHCIBUFFACC  (1 <<  8)
-#define USB_STATUS_NIRQHCIM       (1 <<  9)
-#define USB_STATUS_NHCIMFCLR      (1 << 10)
-#define USB_STATUS_USBPWRSENSE    (1 << 11)
-
-/*
  * Serial Audio Controller
  *
  * Registers
@@ -327,22 +303,6 @@
  *    PC_SSR            GPIO Block C Sleep State
  */
 
-#define _PA_DDR         _SA1111( 0x1000 )
-#define _PA_DRR         _SA1111( 0x1004 )
-#define _PA_DWR         _SA1111( 0x1004 )
-#define _PA_SDR         _SA1111( 0x1008 )
-#define _PA_SSR         _SA1111( 0x100c )
-#define _PB_DDR         _SA1111( 0x1010 )
-#define _PB_DRR         _SA1111( 0x1014 )
-#define _PB_DWR         _SA1111( 0x1014 )
-#define _PB_SDR         _SA1111( 0x1018 )
-#define _PB_SSR         _SA1111( 0x101c )
-#define _PC_DDR         _SA1111( 0x1020 )
-#define _PC_DRR         _SA1111( 0x1024 )
-#define _PC_DWR         _SA1111( 0x1024 )
-#define _PC_SDR         _SA1111( 0x1028 )
-#define _PC_SSR         _SA1111( 0x102c )
-
 #define SA1111_GPIO     0x1000
 
 #define SA1111_GPIO_PADDR       (0x000)
@@ -425,106 +385,30 @@
 #define SA1111_WAKEPOL0         0x0034
 #define SA1111_WAKEPOL1         0x0038
 
-/*
- * PS/2 Trackpad and Mouse Interfaces
- *
- * Registers
- *    PS2CR             Control Register
- *    PS2STAT           Status Register
- *    PS2DATA           Transmit/Receive Data register
- *    PS2CLKDIV         Clock Division Register
- *    PS2PRECNT         Clock Precount Register
- *    PS2TEST1          Test register 1
- *    PS2TEST2          Test register 2
- *    PS2TEST3          Test register 3
- *    PS2TEST4          Test register 4
- */
-
+/* PS/2 Trackpad and Mouse Interfaces */
 #define SA1111_KBD              0x0a00
 #define SA1111_MSE              0x0c00
 
-/*
- * These are offsets from the above bases.
- */
-#define SA1111_PS2CR            0x0000
-#define SA1111_PS2STAT          0x0004
-#define SA1111_PS2DATA          0x0008
-#define SA1111_PS2CLKDIV        0x000c
-#define SA1111_PS2PRECNT        0x0010
-
-#define PS2CR_ENA               0x08
-#define PS2CR_FKD               0x02
-#define PS2CR_FKC               0x01
-
-#define PS2STAT_STP             0x0100
-#define PS2STAT_TXE             0x0080
-#define PS2STAT_TXB             0x0040
-#define PS2STAT_RXF             0x0020
-#define PS2STAT_RXB             0x0010
-#define PS2STAT_ENA             0x0008
-#define PS2STAT_RXP             0x0004
-#define PS2STAT_KBD             0x0002
-#define PS2STAT_KBC             0x0001
+/* PCMCIA Interface */
+#define SA1111_PCMCIA           0x1600
 
-/*
- * PCMCIA Interface
- *
- * Registers
- *    PCSR      Status Register
- *    PCCR      Control Register
- *    PCSSR     Sleep State Register
- */
-
-#define SA1111_PCMCIA   0x1600
-
-/*
- * These are offsets from the above base.
- */
-#define SA1111_PCCR     0x0000
-#define SA1111_PCSSR    0x0004
-#define SA1111_PCSR     0x0008
-
-#define PCSR_S0_READY   (1<<0)
-#define PCSR_S1_READY   (1<<1)
-#define PCSR_S0_DETECT  (1<<2)
-#define PCSR_S1_DETECT  (1<<3)
-#define PCSR_S0_VS1     (1<<4)
-#define PCSR_S0_VS2     (1<<5)
-#define PCSR_S1_VS1     (1<<6)
-#define PCSR_S1_VS2     (1<<7)
-#define PCSR_S0_WP      (1<<8)
-#define PCSR_S1_WP      (1<<9)
-#define PCSR_S0_BVD1    (1<<10)
-#define PCSR_S0_BVD2    (1<<11)
-#define PCSR_S1_BVD1    (1<<12)
-#define PCSR_S1_BVD2    (1<<13)
-
-#define PCCR_S0_RST     (1<<0)
-#define PCCR_S1_RST     (1<<1)
-#define PCCR_S0_FLT     (1<<2)
-#define PCCR_S1_FLT     (1<<3)
-#define PCCR_S0_PWAITEN (1<<4)
-#define PCCR_S1_PWAITEN (1<<5)
-#define PCCR_S0_PSE     (1<<6)
-#define PCCR_S1_PSE     (1<<7)
-
-#define PCSSR_S0_SLEEP  (1<<0)
-#define PCSSR_S1_SLEEP  (1<<1)
 
 
 
 
 extern struct bus_type sa1111_bus_type;
 
-#define SA1111_DEVID_SBI        0
-#define SA1111_DEVID_SK         1
-#define SA1111_DEVID_USB        2
-#define SA1111_DEVID_SAC        3
-#define SA1111_DEVID_SSP        4
-#define SA1111_DEVID_PS2        5
-#define SA1111_DEVID_GPIO       6
-#define SA1111_DEVID_INT        7
-#define SA1111_DEVID_PCMCIA     8
+#define SA1111_DEVID_SBI        (1 << 0)
+#define SA1111_DEVID_SK         (1 << 1)
+#define SA1111_DEVID_USB        (1 << 2)
+#define SA1111_DEVID_SAC        (1 << 3)
+#define SA1111_DEVID_SSP        (1 << 4)
+#define SA1111_DEVID_PS2        (3 << 5)
+#define SA1111_DEVID_PS2_KBD    (1 << 5)
+#define SA1111_DEVID_PS2_MSE    (1 << 6)
+#define SA1111_DEVID_GPIO       (1 << 7)
+#define SA1111_DEVID_INT        (1 << 8)
+#define SA1111_DEVID_PCMCIA     (1 << 9)
 
 struct sa1111_dev {
         struct device   dev;
@@ -548,6 +432,7 @@ struct sa1111_driver {
         int (*remove)(struct sa1111_dev *);
         int (*suspend)(struct sa1111_dev *, pm_message_t);
         int (*resume)(struct sa1111_dev *);
+        void (*shutdown)(struct sa1111_dev *);
 };
 
 #define SA1111_DRV(_d)  container_of((_d), struct sa1111_driver, drv)
@@ -555,9 +440,10 @@ struct sa1111_driver {
 #define SA1111_DRIVER_NAME(_sadev) ((_sadev)->dev.driver->name)
 
 /*
- * These frob the SKPCR register.
+ * These frob the SKPCR register, and call platform specific
+ * enable/disable functions.
  */
-void sa1111_enable_device(struct sa1111_dev *);
+int sa1111_enable_device(struct sa1111_dev *);
 void sa1111_disable_device(struct sa1111_dev *);
 
 unsigned int sa1111_pll_clock(struct sa1111_dev *);
@@ -580,6 +466,10 @@ void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned i
 
 struct sa1111_platform_data {
         int     irq_base;       /* base for cascaded on-chip IRQs */
+        unsigned disable_devs;
+        void    *data;
+        int     (*enable)(void *, unsigned);
+        void    (*disable)(void *, unsigned);
 };
 
 #endif  /* _ASM_ARCH_SA1111 */
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 9275828feb3d..9af5563dd3eb 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -26,7 +26,6 @@
 #include <linux/types.h>
 #include <asm/byteorder.h>
 #include <asm/memory.h>
-#include <asm/system.h>
 #include <asm-generic/pci_iomap.h>
 
 /*
@@ -83,6 +82,11 @@ extern void __iomem *__arm_ioremap_pfn(unsigned long, unsigned long, size_t, uns
 extern void __iomem *__arm_ioremap(unsigned long, size_t, unsigned int);
 extern void __iomem *__arm_ioremap_exec(unsigned long, size_t, bool cached);
 extern void __iounmap(volatile void __iomem *addr);
+extern void __arm_iounmap(volatile void __iomem *addr);
+
+extern void __iomem * (*arch_ioremap_caller)(unsigned long, size_t,
+        unsigned int, void *);
+extern void (*arch_iounmap)(volatile void __iomem *);
 
 /*
  * Bad read/write accesses...
@@ -97,8 +101,11 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
         return (void __iomem *)addr;
 }
 
+#define IOMEM(x)        ((void __force __iomem *)(x))
+
 /* IO barriers */
 #ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
+#include <asm/barrier.h>
 #define __iormb()               rmb()
 #define __iowmb()               wmb()
 #else
@@ -109,7 +116,11 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
 /*
  * Now, pick up the machine-defined IO definitions
  */
+#ifdef CONFIG_NEED_MACH_IO_H
 #include <mach/io.h>
+#else
+#define __io(a)         __typesafe_io((a) & IO_SPACE_LIMIT)
+#endif
 
 /*
  * This is the limit of PC card/PCI/ISA IO space, which is by default
@@ -211,18 +222,18 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
  * Again, this are defined to perform little endian accesses.  See the
  * IO port primitives for more information.
  */
-#ifdef __mem_pci
-#define readb_relaxed(c) ({ u8  __r = __raw_readb(__mem_pci(c)); __r; })
+#ifndef readl
+#define readb_relaxed(c) ({ u8  __r = __raw_readb(c); __r; })
 #define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \
-                                        __raw_readw(__mem_pci(c))); __r; })
+                                        __raw_readw(c)); __r; })
 #define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
-                                        __raw_readl(__mem_pci(c))); __r; })
+                                        __raw_readl(c)); __r; })
 
-#define writeb_relaxed(v,c)     ((void)__raw_writeb(v,__mem_pci(c)))
+#define writeb_relaxed(v,c)     ((void)__raw_writeb(v,c))
 #define writew_relaxed(v,c)     ((void)__raw_writew((__force u16) \
-                                        cpu_to_le16(v),__mem_pci(c)))
+                                        cpu_to_le16(v),c))
 #define writel_relaxed(v,c)     ((void)__raw_writel((__force u32) \
-                                        cpu_to_le32(v),__mem_pci(c)))
+                                        cpu_to_le32(v),c))
 
 #define readb(c)                ({ u8  __v = readb_relaxed(c); __iormb(); __v; })
 #define readw(c)                ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
@@ -232,30 +243,19 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
 #define writew(v,c)             ({ __iowmb(); writew_relaxed(v,c); })
 #define writel(v,c)             ({ __iowmb(); writel_relaxed(v,c); })
 
-#define readsb(p,d,l)           __raw_readsb(__mem_pci(p),d,l)
-#define readsw(p,d,l)           __raw_readsw(__mem_pci(p),d,l)
-#define readsl(p,d,l)           __raw_readsl(__mem_pci(p),d,l)
-
-#define writesb(p,d,l)          __raw_writesb(__mem_pci(p),d,l)
-#define writesw(p,d,l)          __raw_writesw(__mem_pci(p),d,l)
-#define writesl(p,d,l)          __raw_writesl(__mem_pci(p),d,l)
+#define readsb(p,d,l)           __raw_readsb(p,d,l)
+#define readsw(p,d,l)           __raw_readsw(p,d,l)
+#define readsl(p,d,l)           __raw_readsl(p,d,l)
 
-#define memset_io(c,v,l)        _memset_io(__mem_pci(c),(v),(l))
-#define memcpy_fromio(a,c,l)    _memcpy_fromio((a),__mem_pci(c),(l))
-#define memcpy_toio(c,a,l)      _memcpy_toio(__mem_pci(c),(a),(l))
+#define writesb(p,d,l)          __raw_writesb(p,d,l)
+#define writesw(p,d,l)          __raw_writesw(p,d,l)
+#define writesl(p,d,l)          __raw_writesl(p,d,l)
 
-#elif !defined(readb)
+#define memset_io(c,v,l)        _memset_io(c,(v),(l))
+#define memcpy_fromio(a,c,l)    _memcpy_fromio((a),c,(l))
+#define memcpy_toio(c,a,l)      _memcpy_toio(c,(a),(l))
 
-#define readb(c)                        (__readwrite_bug("readb"),0)
-#define readw(c)                        (__readwrite_bug("readw"),0)
-#define readl(c)                        (__readwrite_bug("readl"),0)
-#define writeb(v,c)                     __readwrite_bug("writeb")
-#define writew(v,c)                     __readwrite_bug("writew")
-#define writel(v,c)                     __readwrite_bug("writel")
-
-#define check_signature(io,sig,len)     (0)
-
-#endif  /* __mem_pci */
+#endif  /* readl */
 
 /*
  * ioremap and friends.
@@ -264,16 +264,11 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
  * Documentation/io-mapping.txt.
  *
  */
-#ifndef __arch_ioremap
-#define __arch_ioremap                  __arm_ioremap
-#define __arch_iounmap                  __iounmap
-#endif
-
-#define ioremap(cookie,size)            __arch_ioremap((cookie), (size), MT_DEVICE)
-#define ioremap_nocache(cookie,size)    __arch_ioremap((cookie), (size), MT_DEVICE)
-#define ioremap_cached(cookie,size)     __arch_ioremap((cookie), (size), MT_DEVICE_CACHED)
-#define ioremap_wc(cookie,size)         __arch_ioremap((cookie), (size), MT_DEVICE_WC)
-#define iounmap                         __arch_iounmap
+#define ioremap(cookie,size)            __arm_ioremap((cookie), (size), MT_DEVICE)
+#define ioremap_nocache(cookie,size)    __arm_ioremap((cookie), (size), MT_DEVICE)
+#define ioremap_cached(cookie,size)     __arm_ioremap((cookie), (size), MT_DEVICE_CACHED)
+#define ioremap_wc(cookie,size)         __arm_ioremap((cookie), (size), MT_DEVICE_WC)
+#define iounmap                         __arm_iounmap
 
 /*
  * io{read,write}{8,16,32} macros
diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h
index 5a526afb5f18..35c21c375d81 100644
--- a/arch/arm/include/asm/irq.h
+++ b/arch/arm/include/asm/irq.h
@@ -1,14 +1,18 @@
 #ifndef __ASM_ARM_IRQ_H
 #define __ASM_ARM_IRQ_H
 
+#define NR_IRQS_LEGACY  16
+
+#ifndef CONFIG_SPARSE_IRQ
 #include <mach/irqs.h>
+#else
+#define NR_IRQS NR_IRQS_LEGACY
+#endif
 
 #ifndef irq_canonicalize
 #define irq_canonicalize(i)     (i)
 #endif
 
-#define NR_IRQS_LEGACY  16
-
 /*
  * Use this value to indicate lack of interrupt
  * capability
diff --git a/arch/arm/include/asm/jump_label.h b/arch/arm/include/asm/jump_label.h
new file mode 100644
index 000000000000..5c5ca2ea62b0
--- /dev/null
+++ b/arch/arm/include/asm/jump_label.h
@@ -0,0 +1,41 @@
+#ifndef _ASM_ARM_JUMP_LABEL_H
+#define _ASM_ARM_JUMP_LABEL_H
+
+#ifdef __KERNEL__
+
+#include <linux/types.h>
+#include <asm/system.h>
+
+#define JUMP_LABEL_NOP_SIZE 4
+
+#ifdef CONFIG_THUMB2_KERNEL
+#define JUMP_LABEL_NOP  "nop.w"
+#else
+#define JUMP_LABEL_NOP  "nop"
+#endif
+
+static __always_inline bool arch_static_branch(struct jump_label_key *key)
+{
+        asm goto("1:\n\t"
+                 JUMP_LABEL_NOP "\n\t"
+                 ".pushsection __jump_table,  \"aw\"\n\t"
+                 ".word 1b, %l[l_yes], %c0\n\t"
+                 ".popsection\n\t"
+                 : :  "i" (key) :  : l_yes);
+
+        return false;
+l_yes:
+        return true;
+}
+
+#endif /* __KERNEL__ */
+
+typedef u32 jump_label_t;
+
+struct jump_entry {
+        jump_label_t code;
+        jump_label_t target;
+        jump_label_t key;
+};
+
+#endif
diff --git a/arch/arm/include/asm/mc146818rtc.h b/arch/arm/include/asm/mc146818rtc.h
index 6b884d2b0b69..e8567bb99dfc 100644
--- a/arch/arm/include/asm/mc146818rtc.h
+++ b/arch/arm/include/asm/mc146818rtc.h
@@ -5,7 +5,9 @@
 #define _ASM_MC146818RTC_H
 
 #include <linux/io.h>
-#include <mach/irqs.h>
+#include <linux/kernel.h>
+
+#define RTC_IRQ BUILD_BUG_ON(1)
 
 #ifndef RTC_PORT
 #define RTC_PORT(x)     (0x70 + (x))
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index a8997d71084e..fcb575747e5e 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -116,6 +116,8 @@
 #define MODULES_END             (END_MEM)
 #define MODULES_VADDR           (PHYS_OFFSET)
 
+#define XIP_VIRT_ADDR(physaddr)  (physaddr)
+
 #endif /* !CONFIG_MMU */
 
 /*
diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h
index 14965658a923..b8e580a297e4 100644
--- a/arch/arm/include/asm/mmu.h
+++ b/arch/arm/include/asm/mmu.h
@@ -34,4 +34,11 @@ typedef struct {
 
 #endif
 
+/*
+ * switch_mm() may do a full cache flush over the context switch,
+ * so enable interrupts over the context switch to avoid high
+ * latency.
+ */
+#define __ARCH_WANT_INTERRUPTS_ON_CTXSW
+
 #endif
diff --git a/arch/arm/include/asm/mmu_context.h b/arch/arm/include/asm/mmu_context.h
index 71605d9f8e42..a0b3cac0547c 100644
--- a/arch/arm/include/asm/mmu_context.h
+++ b/arch/arm/include/asm/mmu_context.h
@@ -18,6 +18,7 @@
 #include <asm/cacheflush.h>
 #include <asm/cachetype.h>
 #include <asm/proc-fns.h>
+#include <asm-generic/mm_hooks.h>
 
 void __check_kvm_seq(struct mm_struct *mm);
 
@@ -133,32 +134,4 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
 #define deactivate_mm(tsk,mm)   do { } while (0)
 #define activate_mm(prev,next)  switch_mm(prev, next, NULL)
 
-/*
- * We are inserting a "fake" vma for the user-accessible vector page so
- * gdb and friends can get to it through ptrace and /proc/<pid>/mem.
- * But we also want to remove it before the generic code gets to see it
- * during process exit or the unmapping of it would  cause total havoc.
- * (the macro is used as remove_vma() is static to mm/mmap.c)
- */
-#define arch_exit_mmap(mm) \
-do { \
-        struct vm_area_struct *high_vma = find_vma(mm, 0xffff0000); \
-        if (high_vma) { \
-                BUG_ON(high_vma->vm_next);  /* it should be last */ \
-                if (high_vma->vm_prev) \
-                        high_vma->vm_prev->vm_next = NULL; \
-                else \
-                        mm->mmap = NULL; \
-                rb_erase(&high_vma->vm_rb, &mm->mm_rb); \
-                mm->mmap_cache = NULL; \
-                mm->map_count--; \
-                remove_vma(high_vma); \
-        } \
-} while (0)
-
-static inline void arch_dup_mmap(struct mm_struct *oldmm,
-                                 struct mm_struct *mm)
-{
-}
-
 #endif
diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h
index c0efdd60966f..19c48deda70f 100644
--- a/arch/arm/include/asm/opcodes.h
+++ b/arch/arm/include/asm/opcodes.h
@@ -17,4 +17,63 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
 #define ARM_OPCODE_CONDTEST_PASS   1
 #define ARM_OPCODE_CONDTEST_UNCOND 2
 
+
+/*
+ * Opcode byteswap helpers
+ *
+ * These macros help with converting instructions between a canonical integer
+ * format and in-memory representation, in an endianness-agnostic manner.
+ *
+ * __mem_to_opcode_*() convert from in-memory representation to canonical form.
+ * __opcode_to_mem_*() convert from canonical form to in-memory representation.
+ *
+ *
+ * Canonical instruction representation:
+ *
+ *      ARM:            0xKKLLMMNN
+ *      Thumb 16-bit:   0x0000KKLL, where KK < 0xE8
+ *      Thumb 32-bit:   0xKKLLMMNN, where KK >= 0xE8
+ *
+ * There is no way to distinguish an ARM instruction in canonical representation
+ * from a Thumb instruction (just as these cannot be distinguished in memory).
+ * Where this distinction is important, it needs to be tracked separately.
+ *
+ * Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not
+ * represent any valid Thumb-2 instruction.  For this range,
+ * __opcode_is_thumb32() and __opcode_is_thumb16() will both be false.
+ */
+
+#ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+#include <linux/swab.h>
+
+#ifdef CONFIG_CPU_ENDIAN_BE8
+#define __opcode_to_mem_arm(x) swab32(x)
+#define __opcode_to_mem_thumb16(x) swab16(x)
+#define __opcode_to_mem_thumb32(x) swahb32(x)
+#else
+#define __opcode_to_mem_arm(x) ((u32)(x))
+#define __opcode_to_mem_thumb16(x) ((u16)(x))
+#define __opcode_to_mem_thumb32(x) swahw32(x)
+#endif
+
+#define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x)
+#define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x)
+#define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x)
+
+/* Operations specific to Thumb opcodes */
+
+/* Instruction size checks: */
+#define __opcode_is_thumb32(x) ((u32)(x) >= 0xE8000000UL)
+#define __opcode_is_thumb16(x) ((u32)(x) < 0xE800UL)
+
+/* Operations to construct or split 32-bit Thumb instructions: */
+#define __opcode_thumb32_first(x) ((u16)((x) >> 16))
+#define __opcode_thumb32_second(x) ((u16)(x))
+#define __opcode_thumb32_compose(first, second) \
+        (((u32)(u16)(first) << 16) | (u32)(u16)(second))
+
+#endif /* __ASSEMBLY__ */
+
 #endif /* __ASM_ARM_OPCODES_H */
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
index 97b440c25c58..5838361c48b3 100644
--- a/arch/arm/include/asm/page.h
+++ b/arch/arm/include/asm/page.h
@@ -151,6 +151,8 @@ extern void __cpu_copy_user_highpage(struct page *to, struct page *from,
 #define clear_page(page)        memset((void *)(page), 0, PAGE_SIZE)
 extern void copy_page(void *to, const void *from);
 
+#define __HAVE_ARCH_GATE_AREA 1
+
 #ifdef CONFIG_ARM_LPAE
 #include <asm/pgtable-3level-types.h>
 #else
diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h
index 7523340afb8a..00cbe10a50e3 100644
--- a/arch/arm/include/asm/perf_event.h
+++ b/arch/arm/include/asm/perf_event.h
@@ -22,6 +22,7 @@ enum arm_perf_pmu_ids {
         ARM_PERF_PMU_ID_CA9,
         ARM_PERF_PMU_ID_CA5,
         ARM_PERF_PMU_ID_CA15,
+        ARM_PERF_PMU_ID_CA7,
         ARM_NUM_PMU_IDS,
 };
 
diff --git a/arch/arm/include/asm/posix_types.h b/arch/arm/include/asm/posix_types.h
index 2446d23bfdbf..efdf99045d87 100644
--- a/arch/arm/include/asm/posix_types.h
+++ b/arch/arm/include/asm/posix_types.h
@@ -19,59 +19,22 @@
  * assume GCC is being used.
  */
 
-typedef unsigned long           __kernel_ino_t;
 typedef unsigned short          __kernel_mode_t;
+#define __kernel_mode_t __kernel_mode_t
+
 typedef unsigned short          __kernel_nlink_t;
-typedef long                    __kernel_off_t;
-typedef int                     __kernel_pid_t;
+#define __kernel_nlink_t __kernel_nlink_t
+
 typedef unsigned short          __kernel_ipc_pid_t;
+#define __kernel_ipc_pid_t __kernel_ipc_pid_t
+
 typedef unsigned short          __kernel_uid_t;
 typedef unsigned short          __kernel_gid_t;
-typedef unsigned int            __kernel_size_t;
-typedef int                     __kernel_ssize_t;
-typedef int                     __kernel_ptrdiff_t;
-typedef long                    __kernel_time_t;
-typedef long                    __kernel_suseconds_t;
-typedef long                    __kernel_clock_t;
-typedef int                     __kernel_timer_t;
-typedef int                     __kernel_clockid_t;
-typedef int                     __kernel_daddr_t;
-typedef char *                  __kernel_caddr_t;
-typedef unsigned short          __kernel_uid16_t;
-typedef unsigned short          __kernel_gid16_t;
-typedef unsigned int            __kernel_uid32_t;
-typedef unsigned int            __kernel_gid32_t;
+#define __kernel_uid_t __kernel_uid_t
 
-typedef unsigned short          __kernel_old_uid_t;
-typedef unsigned short          __kernel_old_gid_t;
 typedef unsigned short          __kernel_old_dev_t;
+#define __kernel_old_dev_t __kernel_old_dev_t
 
-#ifdef __GNUC__
-typedef long long               __kernel_loff_t;
-#endif
-
-typedef struct {
-        int     val[2];
-} __kernel_fsid_t;
-
-#if defined(__KERNEL__)
-
-#undef  __FD_SET
-#define __FD_SET(fd, fdsetp) \
-                (((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] |= (1<<((fd) & 31)))
-
-#undef  __FD_CLR
-#define __FD_CLR(fd, fdsetp) \
-                (((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] &= ~(1<<((fd) & 31)))
-
-#undef  __FD_ISSET
-#define __FD_ISSET(fd, fdsetp) \
-                ((((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] & (1<<((fd) & 31))) != 0)
-
-#undef  __FD_ZERO
-#define __FD_ZERO(fdsetp) \
-                (memset (fdsetp, 0, sizeof (*(fd_set *)(fdsetp))))
-
-#endif
+#include <asm-generic/posix_types.h>
 
 #endif
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index cb8d638924fd..5ac8d3d3e025 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -22,7 +22,6 @@
 #include <asm/hw_breakpoint.h>
 #include <asm/ptrace.h>
 #include <asm/types.h>
-#include <asm/system.h>
 
 #ifdef __KERNEL__
 #define STACK_TOP       ((current->personality & ADDR_LIMIT_32BIT) ? \
@@ -56,7 +55,6 @@ struct thread_struct {
 #define start_thread(regs,pc,sp)                                        \
 ({                                                                      \
         unsigned long *stack = (unsigned long *)sp;                     \
-        set_fs(USER_DS);                                                \
         memset(regs->uregs, 0, sizeof(regs->uregs));                    \
         if (current->personality & ADDR_LIMIT_32BIT)                    \
                 regs->ARM_cpsr = USR_MODE;                              \
@@ -90,6 +88,8 @@ unsigned long get_wchan(struct task_struct *p);
 #define cpu_relax()                     barrier()
 #endif
 
+void cpu_idle_wait(void);
+
 /*
  * Create a new kernel thread
  */
diff --git a/arch/arm/include/asm/prom.h b/arch/arm/include/asm/prom.h
index ee0363307918..aeae9c609df4 100644
--- a/arch/arm/include/asm/prom.h
+++ b/arch/arm/include/asm/prom.h
@@ -13,8 +13,6 @@
 
 #ifdef CONFIG_OF
 
-#include <asm/irq.h>
-
 extern struct machine_desc *setup_machine_fdt(unsigned int dt_phys);
 extern void arm_dt_memblock_reserve(void);
 
diff --git a/arch/arm/include/asm/switch_to.h b/arch/arm/include/asm/switch_to.h
new file mode 100644
index 000000000000..fa09e6b49bf1
--- /dev/null
+++ b/arch/arm/include/asm/switch_to.h
@@ -0,0 +1,18 @@
+#ifndef __ASM_ARM_SWITCH_TO_H
+#define __ASM_ARM_SWITCH_TO_H
+
+#include <linux/thread_info.h>
+
+/*
+ * switch_to(prev, next) should switch from task `prev' to `next'
+ * `prev' will never be the same as `next'.  schedule() itself
+ * contains the memory barrier to tell GCC not to cache `current'.
+ */
+extern struct task_struct *__switch_to(struct task_struct *, struct thread_info *, struct thread_info *);
+
+#define switch_to(prev,next,last)                                       \
+do {                                                                    \
+        last = __switch_to(prev,task_thread_info(prev), task_thread_info(next));        \
+} while (0)
+
+#endif /* __ASM_ARM_SWITCH_TO_H */
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 424aa458c487..74542c52f9be 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -1,544 +1,8 @@
-#ifndef __ASM_ARM_SYSTEM_H
-#define __ASM_ARM_SYSTEM_H
-
-#ifdef __KERNEL__
-
-#define CPU_ARCH_UNKNOWN        0
-#define CPU_ARCH_ARMv3          1
-#define CPU_ARCH_ARMv4          2
-#define CPU_ARCH_ARMv4T         3
-#define CPU_ARCH_ARMv5          4
-#define CPU_ARCH_ARMv5T         5
-#define CPU_ARCH_ARMv5TE        6
-#define CPU_ARCH_ARMv5TEJ       7
-#define CPU_ARCH_ARMv6          8
-#define CPU_ARCH_ARMv7          9
-
-/*
- * CR1 bits (CP#15 CR1)
- */
-#define CR_M    (1 << 0)        /* MMU enable                           */
-#define CR_A    (1 << 1)        /* Alignment abort enable               */
-#define CR_C    (1 << 2)        /* Dcache enable                        */
-#define CR_W    (1 << 3)        /* Write buffer enable                  */
-#define CR_P    (1 << 4)        /* 32-bit exception handler             */
-#define CR_D    (1 << 5)        /* 32-bit data address range            */
-#define CR_L    (1 << 6)        /* Implementation defined               */
-#define CR_B    (1 << 7)        /* Big endian                           */
-#define CR_S    (1 << 8)        /* System MMU protection                */
-#define CR_R    (1 << 9)        /* ROM MMU protection                   */
-#define CR_F    (1 << 10)       /* Implementation defined               */
-#define CR_Z    (1 << 11)       /* Implementation defined               */
-#define CR_I    (1 << 12)       /* Icache enable                        */
-#define CR_V    (1 << 13)       /* Vectors relocated to 0xffff0000      */
-#define CR_RR   (1 << 14)       /* Round Robin cache replacement        */
-#define CR_L4   (1 << 15)       /* LDR pc can set T bit                 */
-#define CR_DT   (1 << 16)
-#define CR_IT   (1 << 18)
-#define CR_ST   (1 << 19)
-#define CR_FI   (1 << 21)       /* Fast interrupt (lower latency mode)  */
-#define CR_U    (1 << 22)       /* Unaligned access operation           */
-#define CR_XP   (1 << 23)       /* Extended page tables                 */
-#define CR_VE   (1 << 24)       /* Vectored interrupts                  */
-#define CR_EE   (1 << 25)       /* Exception (Big) Endian               */
-#define CR_TRE  (1 << 28)       /* TEX remap enable                     */
-#define CR_AFE  (1 << 29)       /* Access flag enable                   */
-#define CR_TE   (1 << 30)       /* Thumb exception enable               */
-
-/*
- * This is used to ensure the compiler did actually allocate the register we
- * asked it for some inline assembly sequences.  Apparently we can't trust
- * the compiler from one version to another so a bit of paranoia won't hurt.
- * This string is meant to be concatenated with the inline asm string and
- * will cause compilation to stop on mismatch.
- * (for details, see gcc PR 15089)
- */
-#define __asmeq(x, y)  ".ifnc " x "," y " ; .err ; .endif\n\t"
-
-#ifndef __ASSEMBLY__
-
-#include <linux/compiler.h>
-#include <linux/linkage.h>
-#include <linux/irqflags.h>
-
-#include <asm/outercache.h>
-
-struct thread_info;
-struct task_struct;
-
-/* information about the system we're running on */
-extern unsigned int system_rev;
-extern unsigned int system_serial_low;
-extern unsigned int system_serial_high;
-extern unsigned int mem_fclk_21285;
-
-struct pt_regs;
-
-void die(const char *msg, struct pt_regs *regs, int err);
-
-struct siginfo;
-void arm_notify_die(const char *str, struct pt_regs *regs, struct siginfo *info,
-                unsigned long err, unsigned long trap);
-
-#ifdef CONFIG_ARM_LPAE
-#define FAULT_CODE_ALIGNMENT    33
-#define FAULT_CODE_DEBUG        34
-#else
-#define FAULT_CODE_ALIGNMENT    1
-#define FAULT_CODE_DEBUG        2
-#endif
-
-void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
-                                       struct pt_regs *),
-                     int sig, int code, const char *name);
-
-void hook_ifault_code(int nr, int (*fn)(unsigned long, unsigned int,
-                                       struct pt_regs *),
-                     int sig, int code, const char *name);
-
-#define xchg(ptr,x) \
-        ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
-
-extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
-
-struct mm_struct;
-extern void show_pte(struct mm_struct *mm, unsigned long addr);
-extern void __show_regs(struct pt_regs *);
-
-extern int __pure cpu_architecture(void);
-extern void cpu_init(void);
-
-void soft_restart(unsigned long);
-extern void (*arm_pm_restart)(char str, const char *cmd);
-extern void (*arm_pm_idle)(void);
-
-#define UDBG_UNDEFINED  (1 << 0)
-#define UDBG_SYSCALL    (1 << 1)
-#define UDBG_BADABORT   (1 << 2)
-#define UDBG_SEGV       (1 << 3)
-#define UDBG_BUS        (1 << 4)
-
-extern unsigned int user_debug;
-
-#if __LINUX_ARM_ARCH__ >= 4
-#define vectors_high()  (cr_alignment & CR_V)
-#else
-#define vectors_high()  (0)
-#endif
-
-#if __LINUX_ARM_ARCH__ >= 7 ||          \
-        (__LINUX_ARM_ARCH__ == 6 && defined(CONFIG_CPU_32v6K))
-#define sev()   __asm__ __volatile__ ("sev" : : : "memory")
-#define wfe()   __asm__ __volatile__ ("wfe" : : : "memory")
-#define wfi()   __asm__ __volatile__ ("wfi" : : : "memory")
-#endif
-
-#if __LINUX_ARM_ARCH__ >= 7
-#define isb() __asm__ __volatile__ ("isb" : : : "memory")
-#define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
-#define dmb() __asm__ __volatile__ ("dmb" : : : "memory")
-#elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6
-#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
-                                    : : "r" (0) : "memory")
-#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
-                                    : : "r" (0) : "memory")
-#define dmb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \
-                                    : : "r" (0) : "memory")
-#elif defined(CONFIG_CPU_FA526)
-#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
-                                    : : "r" (0) : "memory")
-#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
-                                    : : "r" (0) : "memory")
-#define dmb() __asm__ __volatile__ ("" : : : "memory")
-#else
-#define isb() __asm__ __volatile__ ("" : : : "memory")
-#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
-                                    : : "r" (0) : "memory")
-#define dmb() __asm__ __volatile__ ("" : : : "memory")
-#endif
-
-#ifdef CONFIG_ARCH_HAS_BARRIERS
-#include <mach/barriers.h>
-#elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)
-#define mb()            do { dsb(); outer_sync(); } while (0)
-#define rmb()           dsb()
-#define wmb()           mb()
-#else
-#include <asm/memory.h>
-#define mb()    do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
-#define rmb()   do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
-#define wmb()   do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
-#endif
-
-#ifndef CONFIG_SMP
-#define smp_mb()        barrier()
-#define smp_rmb()       barrier()
-#define smp_wmb()       barrier()
-#else
-#define smp_mb()        dmb()
-#define smp_rmb()       dmb()
-#define smp_wmb()       dmb()
-#endif
-
-#define read_barrier_depends()          do { } while(0)
-#define smp_read_barrier_depends()      do { } while(0)
-
-#define set_mb(var, value)      do { var = value; smp_mb(); } while (0)
-#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
-
-extern unsigned long cr_no_alignment;   /* defined in entry-armv.S */
-extern unsigned long cr_alignment;      /* defined in entry-armv.S */
-
-static inline unsigned int get_cr(void)
-{
-        unsigned int val;
-        asm("mrc p15, 0, %0, c1, c0, 0  @ get CR" : "=r" (val) : : "cc");
-        return val;
-}
-
-static inline void set_cr(unsigned int val)
-{
-        asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR"
-          : : "r" (val) : "cc");
-        isb();
-}
-
-#ifndef CONFIG_SMP
-extern void adjust_cr(unsigned long mask, unsigned long set);
-#endif
-
-#define CPACC_FULL(n)           (3 << (n * 2))
-#define CPACC_SVC(n)            (1 << (n * 2))
-#define CPACC_DISABLE(n)        (0 << (n * 2))
-
-static inline unsigned int get_copro_access(void)
-{
-        unsigned int val;
-        asm("mrc p15, 0, %0, c1, c0, 2 @ get copro access"
-          : "=r" (val) : : "cc");
-        return val;
-}
-
-static inline void set_copro_access(unsigned int val)
-{
-        asm volatile("mcr p15, 0, %0, c1, c0, 2 @ set copro access"
-          : : "r" (val) : "cc");
-        isb();
-}
-
-/*
- * switch_mm() may do a full cache flush over the context switch,
- * so enable interrupts over the context switch to avoid high
- * latency.
- */
-#define __ARCH_WANT_INTERRUPTS_ON_CTXSW
-
-/*
- * switch_to(prev, next) should switch from task `prev' to `next'
- * `prev' will never be the same as `next'.  schedule() itself
- * contains the memory barrier to tell GCC not to cache `current'.
- */
-extern struct task_struct *__switch_to(struct task_struct *, struct thread_info *, struct thread_info *);
-
-#define switch_to(prev,next,last)                                       \
-do {                                                                    \
-        last = __switch_to(prev,task_thread_info(prev), task_thread_info(next));        \
-} while (0)
-
-#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110)
-/*
- * On the StrongARM, "swp" is terminally broken since it bypasses the
- * cache totally.  This means that the cache becomes inconsistent, and,
- * since we use normal loads/stores as well, this is really bad.
- * Typically, this causes oopsen in filp_close, but could have other,
- * more disastrous effects.  There are two work-arounds:
- *  1. Disable interrupts and emulate the atomic swap
- *  2. Clean the cache, perform atomic swap, flush the cache
- *
- * We choose (1) since its the "easiest" to achieve here and is not
- * dependent on the processor type.
- *
- * NOTE that this solution won't work on an SMP system, so explcitly
- * forbid it here.
- */
-#define swp_is_buggy
-#endif
-
-static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
-{
-        extern void __bad_xchg(volatile void *, int);
-        unsigned long ret;
-#ifdef swp_is_buggy
-        unsigned long flags;
-#endif
-#if __LINUX_ARM_ARCH__ >= 6
-        unsigned int tmp;
-#endif
-
-        smp_mb();
-
-        switch (size) {
-#if __LINUX_ARM_ARCH__ >= 6
-        case 1:
-                asm volatile("@ __xchg1\n"
-                "1:     ldrexb  %0, [%3]\n"
-                "       strexb  %1, %2, [%3]\n"
-                "       teq     %1, #0\n"
-                "       bne     1b"
-                        : "=&r" (ret), "=&r" (tmp)
-                        : "r" (x), "r" (ptr)
-                        : "memory", "cc");
-                break;
-        case 4:
-                asm volatile("@ __xchg4\n"
-                "1:     ldrex   %0, [%3]\n"
-                "       strex   %1, %2, [%3]\n"
-                "       teq     %1, #0\n"
-                "       bne     1b"
-                        : "=&r" (ret), "=&r" (tmp)
-                        : "r" (x), "r" (ptr)
-                        : "memory", "cc");
-                break;
-#elif defined(swp_is_buggy)
-#ifdef CONFIG_SMP
-#error SMP is not supported on this platform
-#endif
-        case 1:
-                raw_local_irq_save(flags);
-                ret = *(volatile unsigned char *)ptr;
-                *(volatile unsigned char *)ptr = x;
-                raw_local_irq_restore(flags);
-                break;
-
-        case 4:
-                raw_local_irq_save(flags);
-                ret = *(volatile unsigned long *)ptr;
-                *(volatile unsigned long *)ptr = x;
-                raw_local_irq_restore(flags);
-                break;
-#else
-        case 1:
-                asm volatile("@ __xchg1\n"
-                "       swpb    %0, %1, [%2]"
-                        : "=&r" (ret)
-                        : "r" (x), "r" (ptr)
-                        : "memory", "cc");
-                break;
-        case 4:
-                asm volatile("@ __xchg4\n"
-                "       swp     %0, %1, [%2]"
-                        : "=&r" (ret)
-                        : "r" (x), "r" (ptr)
-                        : "memory", "cc");
-                break;
-#endif
-        default:
-                __bad_xchg(ptr, size), ret = 0;
-                break;
-        }
-        smp_mb();
-
-        return ret;
-}
-
-extern void disable_hlt(void);
-extern void enable_hlt(void);
-
-void cpu_idle_wait(void);
-
-#include <asm-generic/cmpxchg-local.h>
-
-#if __LINUX_ARM_ARCH__ < 6
-/* min ARCH < ARMv6 */
-
-#ifdef CONFIG_SMP
-#error "SMP is not supported on this platform"
-#endif
-
-/*
- * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
- * them available.
- */
-#define cmpxchg_local(ptr, o, n)                                               \
-        ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
-                        (unsigned long)(n), sizeof(*(ptr))))
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-
-#ifndef CONFIG_SMP
-#include <asm-generic/cmpxchg.h>
-#endif
-
-#else   /* min ARCH >= ARMv6 */
-
-extern void __bad_cmpxchg(volatile void *ptr, int size);
-
-/*
- * cmpxchg only support 32-bits operands on ARMv6.
- */
-
-static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
-                                      unsigned long new, int size)
-{
-        unsigned long oldval, res;
-
-        switch (size) {
-#ifndef CONFIG_CPU_V6   /* min ARCH >= ARMv6K */
-        case 1:
-                do {
-                        asm volatile("@ __cmpxchg1\n"
-                        "       ldrexb  %1, [%2]\n"
-                        "       mov     %0, #0\n"
-                        "       teq     %1, %3\n"
-                        "       strexbeq %0, %4, [%2]\n"
-                                : "=&r" (res), "=&r" (oldval)
-                                : "r" (ptr), "Ir" (old), "r" (new)
-                                : "memory", "cc");
-                } while (res);
-                break;
-        case 2:
-                do {
-                        asm volatile("@ __cmpxchg1\n"
-                        "       ldrexh  %1, [%2]\n"
-                        "       mov     %0, #0\n"
-                        "       teq     %1, %3\n"
-                        "       strexheq %0, %4, [%2]\n"
-                                : "=&r" (res), "=&r" (oldval)
-                                : "r" (ptr), "Ir" (old), "r" (new)
-                                : "memory", "cc");
-                } while (res);
-                break;
-#endif
-        case 4:
-                do {
-                        asm volatile("@ __cmpxchg4\n"
-                        "       ldrex   %1, [%2]\n"
-                        "       mov     %0, #0\n"
-                        "       teq     %1, %3\n"
-                        "       strexeq %0, %4, [%2]\n"
-                                : "=&r" (res), "=&r" (oldval)
-                                : "r" (ptr), "Ir" (old), "r" (new)
-                                : "memory", "cc");
-                } while (res);
-                break;
-        default:
-                __bad_cmpxchg(ptr, size);
-                oldval = 0;
-        }
-
-        return oldval;
-}
-
-static inline unsigned long __cmpxchg_mb(volatile void *ptr, unsigned long old,
-                                         unsigned long new, int size)
-{
-        unsigned long ret;
-
-        smp_mb();
-        ret = __cmpxchg(ptr, old, new, size);
-        smp_mb();
-
-        return ret;
-}
-
-#define cmpxchg(ptr,o,n)                                                \
-        ((__typeof__(*(ptr)))__cmpxchg_mb((ptr),                        \
-                                          (unsigned long)(o),           \
-                                          (unsigned long)(n),           \
-                                          sizeof(*(ptr))))
-
-static inline unsigned long __cmpxchg_local(volatile void *ptr,
-                                            unsigned long old,
-                                            unsigned long new, int size)
-{
-        unsigned long ret;
-
-        switch (size) {
-#ifdef CONFIG_CPU_V6    /* min ARCH == ARMv6 */
-        case 1:
-        case 2:
-                ret = __cmpxchg_local_generic(ptr, old, new, size);
-                break;
-#endif
-        default:
-                ret = __cmpxchg(ptr, old, new, size);
-        }
-
-        return ret;
-}
-
-#define cmpxchg_local(ptr,o,n)                                          \
-        ((__typeof__(*(ptr)))__cmpxchg_local((ptr),                     \
-                                       (unsigned long)(o),              \
-                                       (unsigned long)(n),              \
-                                       sizeof(*(ptr))))
-
-#ifndef CONFIG_CPU_V6   /* min ARCH >= ARMv6K */
-
-/*
- * Note : ARMv7-M (currently unsupported by Linux) does not support
- * ldrexd/strexd. If ARMv7-M is ever supported by the Linux kernel, it should
- * not be allowed to use __cmpxchg64.
- */
-static inline unsigned long long __cmpxchg64(volatile void *ptr,
-                                             unsigned long long old,
-                                             unsigned long long new)
-{
-        register unsigned long long oldval asm("r0");
-        register unsigned long long __old asm("r2") = old;
-        register unsigned long long __new asm("r4") = new;
-        unsigned long res;
-
-        do {
-                asm volatile(
-                "       @ __cmpxchg8\n"
-                "       ldrexd  %1, %H1, [%2]\n"
-                "       mov     %0, #0\n"
-                "       teq     %1, %3\n"
-                "       teqeq   %H1, %H3\n"
-                "       strexdeq %0, %4, %H4, [%2]\n"
-                        : "=&r" (res), "=&r" (oldval)
-                        : "r" (ptr), "Ir" (__old), "r" (__new)
-                        : "memory", "cc");
-        } while (res);
-
-        return oldval;
-}
-
-static inline unsigned long long __cmpxchg64_mb(volatile void *ptr,
-                                                unsigned long long old,
-                                                unsigned long long new)
-{
-        unsigned long long ret;
-
-        smp_mb();
-        ret = __cmpxchg64(ptr, old, new);
-        smp_mb();
-
-        return ret;
-}
-
-#define cmpxchg64(ptr,o,n)                                              \
-        ((__typeof__(*(ptr)))__cmpxchg64_mb((ptr),                      \
-                                            (unsigned long long)(o),    \
-                                            (unsigned long long)(n)))
-
-#define cmpxchg64_local(ptr,o,n)                                        \
-        ((__typeof__(*(ptr)))__cmpxchg64((ptr),                         \
-                                         (unsigned long long)(o),       \
-                                         (unsigned long long)(n)))
-
-#else /* min ARCH = ARMv6 */
-
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-
-#endif
-
-#endif  /* __LINUX_ARM_ARCH__ >= 6 */
-
-#endif /* __ASSEMBLY__ */
-
-#define arch_align_stack(x) (x)
-
-#endif /* __KERNEL__ */
-
-#endif
+/* FILE TO BE DELETED. DO NOT ADD STUFF HERE! */
+#include <asm/barrier.h>
+#include <asm/compiler.h>
+#include <asm/cmpxchg.h>
+#include <asm/exec.h>
+#include <asm/switch_to.h>
+#include <asm/system_info.h>
+#include <asm/system_misc.h>
diff --git a/arch/arm/include/asm/system_info.h b/arch/arm/include/asm/system_info.h
new file mode 100644
index 000000000000..dfd386d0c022
--- /dev/null
+++ b/arch/arm/include/asm/system_info.h
@@ -0,0 +1,27 @@
+#ifndef __ASM_ARM_SYSTEM_INFO_H
+#define __ASM_ARM_SYSTEM_INFO_H
+
+#define CPU_ARCH_UNKNOWN        0
+#define CPU_ARCH_ARMv3          1
+#define CPU_ARCH_ARMv4          2
+#define CPU_ARCH_ARMv4T         3
+#define CPU_ARCH_ARMv5          4
+#define CPU_ARCH_ARMv5T         5
+#define CPU_ARCH_ARMv5TE        6
+#define CPU_ARCH_ARMv5TEJ       7
+#define CPU_ARCH_ARMv6          8
+#define CPU_ARCH_ARMv7          9
+
+#ifndef __ASSEMBLY__
+
+/* information about the system we're running on */
+extern unsigned int system_rev;
+extern unsigned int system_serial_low;
+extern unsigned int system_serial_high;
+extern unsigned int mem_fclk_21285;
+
+extern int __pure cpu_architecture(void);
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* __ASM_ARM_SYSTEM_INFO_H */
diff --git a/arch/arm/include/asm/system_misc.h b/arch/arm/include/asm/system_misc.h
new file mode 100644
index 000000000000..5a85f148b607
--- /dev/null
+++ b/arch/arm/include/asm/system_misc.h
@@ -0,0 +1,29 @@
+#ifndef __ASM_ARM_SYSTEM_MISC_H
+#define __ASM_ARM_SYSTEM_MISC_H
+
+#ifndef __ASSEMBLY__
+
+#include <linux/compiler.h>
+#include <linux/linkage.h>
+#include <linux/irqflags.h>
+
+extern void cpu_init(void);
+
+void soft_restart(unsigned long);
+extern void (*arm_pm_restart)(char str, const char *cmd);
+extern void (*arm_pm_idle)(void);
+
+#define UDBG_UNDEFINED  (1 << 0)
+#define UDBG_SYSCALL    (1 << 1)
+#define UDBG_BADABORT   (1 << 2)
+#define UDBG_SEGV       (1 << 3)
+#define UDBG_BUS        (1 << 4)
+
+extern unsigned int user_debug;
+
+extern void disable_hlt(void);
+extern void enable_hlt(void);
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* __ASM_ARM_SYSTEM_MISC_H */
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index 02b2f8203982..85fe61e73202 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -318,6 +318,21 @@ extern struct cpu_tlb_fns cpu_tlb;
 
 #define tlb_flag(f)     ((always_tlb_flags & (f)) || (__tlb_flag & possible_tlb_flags & (f)))
 
+#define __tlb_op(f, insnarg, arg)                                       \
+        do {                                                            \
+                if (always_tlb_flags & (f))                             \
+                        asm("mcr " insnarg                              \
+                            : : "r" (arg) : "cc");                      \
+                else if (possible_tlb_flags & (f))                      \
+                        asm("tst %1, %2\n\t"                            \
+                            "mcrne " insnarg                            \
+                            : : "r" (arg), "r" (__tlb_flag), "Ir" (f)   \
+                            : "cc");                                    \
+        } while (0)
+
+#define tlb_op(f, regs, arg)    __tlb_op(f, "p15, 0, %0, " regs, arg)
+#define tlb_l2_op(f, regs, arg) __tlb_op(f, "p15, 1, %0, " regs, arg)
+
 static inline void local_flush_tlb_all(void)
 {
         const int zero = 0;
@@ -326,16 +341,11 @@ static inline void local_flush_tlb_all(void)
         if (tlb_flag(TLB_WB))
                 dsb();
 
-        if (tlb_flag(TLB_V3_FULL))
-                asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero) : "cc");
-        if (tlb_flag(TLB_V4_U_FULL | TLB_V6_U_FULL))
-                asm("mcr p15, 0, %0, c8, c7, 0" : : "r" (zero) : "cc");
-        if (tlb_flag(TLB_V4_D_FULL | TLB_V6_D_FULL))
-                asm("mcr p15, 0, %0, c8, c6, 0" : : "r" (zero) : "cc");
-        if (tlb_flag(TLB_V4_I_FULL | TLB_V6_I_FULL))
-                asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
-        if (tlb_flag(TLB_V7_UIS_FULL))
-                asm("mcr p15, 0, %0, c8, c3, 0" : : "r" (zero) : "cc");
+        tlb_op(TLB_V3_FULL, "c6, c0, 0", zero);
+        tlb_op(TLB_V4_U_FULL | TLB_V6_U_FULL, "c8, c7, 0", zero);
+        tlb_op(TLB_V4_D_FULL | TLB_V6_D_FULL, "c8, c6, 0", zero);
+        tlb_op(TLB_V4_I_FULL | TLB_V6_I_FULL, "c8, c5, 0", zero);
+        tlb_op(TLB_V7_UIS_FULL, "c8, c3, 0", zero);
 
         if (tlb_flag(TLB_BARRIER)) {
                 dsb();
@@ -352,29 +362,23 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
         if (tlb_flag(TLB_WB))
                 dsb();
 
-        if (cpumask_test_cpu(get_cpu(), mm_cpumask(mm))) {
-                if (tlb_flag(TLB_V3_FULL))
-                        asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero) : "cc");
-                if (tlb_flag(TLB_V4_U_FULL))
-                        asm("mcr p15, 0, %0, c8, c7, 0" : : "r" (zero) : "cc");
-                if (tlb_flag(TLB_V4_D_FULL))
-                        asm("mcr p15, 0, %0, c8, c6, 0" : : "r" (zero) : "cc");
-                if (tlb_flag(TLB_V4_I_FULL))
-                        asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
+        if (possible_tlb_flags & (TLB_V3_FULL|TLB_V4_U_FULL|TLB_V4_D_FULL|TLB_V4_I_FULL)) {
+                if (cpumask_test_cpu(get_cpu(), mm_cpumask(mm))) {
+                        tlb_op(TLB_V3_FULL, "c6, c0, 0", zero);
+                        tlb_op(TLB_V4_U_FULL, "c8, c7, 0", zero);
+                        tlb_op(TLB_V4_D_FULL, "c8, c6, 0", zero);
+                        tlb_op(TLB_V4_I_FULL, "c8, c5, 0", zero);
+                }
+                put_cpu();
         }
-        put_cpu();
-
-        if (tlb_flag(TLB_V6_U_ASID))
-                asm("mcr p15, 0, %0, c8, c7, 2" : : "r" (asid) : "cc");
-        if (tlb_flag(TLB_V6_D_ASID))
-                asm("mcr p15, 0, %0, c8, c6, 2" : : "r" (asid) : "cc");
-        if (tlb_flag(TLB_V6_I_ASID))
-                asm("mcr p15, 0, %0, c8, c5, 2" : : "r" (asid) : "cc");
-        if (tlb_flag(TLB_V7_UIS_ASID))
+
+        tlb_op(TLB_V6_U_ASID, "c8, c7, 2", asid);
+        tlb_op(TLB_V6_D_ASID, "c8, c6, 2", asid);
+        tlb_op(TLB_V6_I_ASID, "c8, c5, 2", asid);
 #ifdef CONFIG_ARM_ERRATA_720789
-                asm("mcr p15, 0, %0, c8, c3, 0" : : "r" (zero) : "cc");
+        tlb_op(TLB_V7_UIS_ASID, "c8, c3, 0", zero);
 #else
-                asm("mcr p15, 0, %0, c8, c3, 2" : : "r" (asid) : "cc");
+        tlb_op(TLB_V7_UIS_ASID, "c8, c3, 2", asid);
 #endif
 
         if (tlb_flag(TLB_BARRIER))
@@ -392,30 +396,23 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
         if (tlb_flag(TLB_WB))
                 dsb();
 
-        if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
-                if (tlb_flag(TLB_V3_PAGE))
-                        asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (uaddr) : "cc");
-                if (tlb_flag(TLB_V4_U_PAGE))
-                        asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (uaddr) : "cc");
-                if (tlb_flag(TLB_V4_D_PAGE))
-                        asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (uaddr) : "cc");
-                if (tlb_flag(TLB_V4_I_PAGE))
-                        asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr) : "cc");
+        if (possible_tlb_flags & (TLB_V3_PAGE|TLB_V4_U_PAGE|TLB_V4_D_PAGE|TLB_V4_I_PAGE|TLB_V4_I_FULL) &&
+            cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
+                tlb_op(TLB_V3_PAGE, "c6, c0, 0", uaddr);
+                tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", uaddr);
+                tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", uaddr);
+                tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", uaddr);
                 if (!tlb_flag(TLB_V4_I_PAGE) && tlb_flag(TLB_V4_I_FULL))
                         asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
         }
 
-        if (tlb_flag(TLB_V6_U_PAGE))
-                asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (uaddr) : "cc");
-        if (tlb_flag(TLB_V6_D_PAGE))
-                asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (uaddr) : "cc");
-        if (tlb_flag(TLB_V6_I_PAGE))
-                asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr) : "cc");
-        if (tlb_flag(TLB_V7_UIS_PAGE))
+        tlb_op(TLB_V6_U_PAGE, "c8, c7, 1", uaddr);
+        tlb_op(TLB_V6_D_PAGE, "c8, c6, 1", uaddr);
+        tlb_op(TLB_V6_I_PAGE, "c8, c5, 1", uaddr);
 #ifdef CONFIG_ARM_ERRATA_720789
-                asm("mcr p15, 0, %0, c8, c3, 3" : : "r" (uaddr & PAGE_MASK) : "cc");
+        tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 3", uaddr & PAGE_MASK);
 #else
-                asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (uaddr) : "cc");
+        tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 1", uaddr);
 #endif
 
         if (tlb_flag(TLB_BARRIER))
@@ -432,25 +429,17 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
         if (tlb_flag(TLB_WB))
                 dsb();
 
-        if (tlb_flag(TLB_V3_PAGE))
-                asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (kaddr) : "cc");
-        if (tlb_flag(TLB_V4_U_PAGE))
-                asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (kaddr) : "cc");
-        if (tlb_flag(TLB_V4_D_PAGE))
-                asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (kaddr) : "cc");
-        if (tlb_flag(TLB_V4_I_PAGE))
-                asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (kaddr) : "cc");
+        tlb_op(TLB_V3_PAGE, "c6, c0, 0", kaddr);
+        tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", kaddr);
+        tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", kaddr);
+        tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", kaddr);
         if (!tlb_flag(TLB_V4_I_PAGE) && tlb_flag(TLB_V4_I_FULL))
                 asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
 
-        if (tlb_flag(TLB_V6_U_PAGE))
-                asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (kaddr) : "cc");
-        if (tlb_flag(TLB_V6_D_PAGE))
-                asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (kaddr) : "cc");
-        if (tlb_flag(TLB_V6_I_PAGE))
-                asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (kaddr) : "cc");
-        if (tlb_flag(TLB_V7_UIS_PAGE))
-                asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (kaddr) : "cc");
+        tlb_op(TLB_V6_U_PAGE, "c8, c7, 1", kaddr);
+        tlb_op(TLB_V6_D_PAGE, "c8, c6, 1", kaddr);
+        tlb_op(TLB_V6_I_PAGE, "c8, c5, 1", kaddr);
+        tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 1", kaddr);
 
         if (tlb_flag(TLB_BARRIER)) {
                 dsb();
@@ -475,13 +464,8 @@ static inline void flush_pmd_entry(void *pmd)
 {
         const unsigned int __tlb_flag = __cpu_tlb_flags;
 
-        if (tlb_flag(TLB_DCLEAN))
-                asm("mcr        p15, 0, %0, c7, c10, 1  @ flush_pmd"
-                        : : "r" (pmd) : "cc");
-
-        if (tlb_flag(TLB_L2CLEAN_FR))
-                asm("mcr        p15, 1, %0, c15, c9, 1  @ L2 flush_pmd"
-                        : : "r" (pmd) : "cc");
+        tlb_op(TLB_DCLEAN, "c7, c10, 1  @ flush_pmd", pmd);
+        tlb_l2_op(TLB_L2CLEAN_FR, "c15, c9, 1  @ L2 flush_pmd", pmd);
 
         if (tlb_flag(TLB_WB))
                 dsb();
@@ -491,15 +475,11 @@ static inline void clean_pmd_entry(void *pmd)
 {
         const unsigned int __tlb_flag = __cpu_tlb_flags;
 
-        if (tlb_flag(TLB_DCLEAN))
-                asm("mcr        p15, 0, %0, c7, c10, 1  @ flush_pmd"
-                        : : "r" (pmd) : "cc");
-
-        if (tlb_flag(TLB_L2CLEAN_FR))
-                asm("mcr        p15, 1, %0, c15, c9, 1  @ L2 flush_pmd"
-                        : : "r" (pmd) : "cc");
+        tlb_op(TLB_DCLEAN, "c7, c10, 1  @ flush_pmd", pmd);
+        tlb_l2_op(TLB_L2CLEAN_FR, "c15, c9, 1  @ L2 flush_pmd", pmd);
 }
 
+#undef tlb_op
 #undef tlb_flag
 #undef always_tlb_flags
 #undef possible_tlb_flags
diff --git a/arch/arm/include/asm/traps.h b/arch/arm/include/asm/traps.h
index 5b29a6673625..f555bb3664dc 100644
--- a/arch/arm/include/asm/traps.h
+++ b/arch/arm/include/asm/traps.h
@@ -46,7 +46,7 @@ static inline int in_exception_text(unsigned long ptr)
         return in ? : __in_irqentry_text(ptr);
 }
 
-extern void __init early_trap_init(void);
+extern void __init early_trap_init(void *);
 extern void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame);
 extern void ptrace_break(struct task_struct *tsk, struct pt_regs *regs);
 
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index 2958976d867b..71f6536d17ac 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -16,8 +16,8 @@
 #include <asm/errno.h>
 #include <asm/memory.h>
 #include <asm/domain.h>
-#include <asm/system.h>
 #include <asm/unified.h>
+#include <asm/compiler.h>
 
 #define VERIFY_READ 0
 #define VERIFY_WRITE 1
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index f16d7652f34b..7b787d642af4 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -7,6 +7,8 @@ AFLAGS_head.o        := -DTEXT_OFFSET=$(TEXT_OFFSET)
 
 ifdef CONFIG_FUNCTION_TRACER
 CFLAGS_REMOVE_ftrace.o = -pg
+CFLAGS_REMOVE_insn.o = -pg
+CFLAGS_REMOVE_patch.o = -pg
 endif
 
 CFLAGS_REMOVE_return_address.o = -pg
@@ -14,30 +16,29 @@ CFLAGS_REMOVE_return_address.o = -pg
 # Object file lists.
 
 obj-y           := elf.o entry-armv.o entry-common.o irq.o opcodes.o \
-                   process.o ptrace.o return_address.o setup.o signal.o \
-                   sys_arm.o stacktrace.o time.o traps.o
+                   process.o ptrace.o return_address.o sched_clock.o \
+                   setup.o signal.o stacktrace.o sys_arm.o time.o traps.o
 
 obj-$(CONFIG_DEPRECATED_PARAM_STRUCT) += compat.o
 
 obj-$(CONFIG_LEDS)              += leds.o
 obj-$(CONFIG_OC_ETM)            += etm.o
-
+obj-$(CONFIG_CPU_IDLE)          += cpuidle.o
 obj-$(CONFIG_ISA_DMA_API)       += dma.o
-obj-$(CONFIG_ARCH_ACORN)        += ecard.o 
 obj-$(CONFIG_FIQ)               += fiq.o fiqasm.o
 obj-$(CONFIG_MODULES)           += armksyms.o module.o
 obj-$(CONFIG_ARTHUR)            += arthur.o
 obj-$(CONFIG_ISA_DMA)           += dma-isa.o
 obj-$(CONFIG_PCI)               += bios32.o isa.o
 obj-$(CONFIG_ARM_CPU_SUSPEND)   += sleep.o suspend.o
-obj-$(CONFIG_HAVE_SCHED_CLOCK)  += sched_clock.o
 obj-$(CONFIG_SMP)               += smp.o smp_tlb.o
 obj-$(CONFIG_HAVE_ARM_SCU)      += smp_scu.o
 obj-$(CONFIG_HAVE_ARM_TWD)      += smp_twd.o
-obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o
-obj-$(CONFIG_FUNCTION_GRAPH_TRACER)     += ftrace.o
+obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o insn.o
+obj-$(CONFIG_FUNCTION_GRAPH_TRACER)     += ftrace.o insn.o
+obj-$(CONFIG_JUMP_LABEL)        += jump_label.o insn.o patch.o
 obj-$(CONFIG_KEXEC)             += machine_kexec.o relocate_kernel.o
-obj-$(CONFIG_KPROBES)           += kprobes.o kprobes-common.o
+obj-$(CONFIG_KPROBES)           += kprobes.o kprobes-common.o patch.o
 ifdef CONFIG_THUMB2_KERNEL
 obj-$(CONFIG_KPROBES)           += kprobes-thumb.o
 else
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index 5b0bce61eb69..b57c75e0b01f 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -18,7 +18,6 @@
 #include <linux/io.h>
 
 #include <asm/checksum.h>
-#include <asm/system.h>
 #include <asm/ftrace.h>
 
 /*
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index 632df9a66f8c..ede5f7741c42 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -299,7 +299,6 @@ static inline int pdev_bad_for_parity(struct pci_dev *dev)
  */
 void pcibios_fixup_bus(struct pci_bus *bus)
 {
-        struct pci_sys_data *root = bus->sysdata;
         struct pci_dev *dev;
         u16 features = PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_FAST_BACK;
 
diff --git a/arch/arm/kernel/cpuidle.c b/arch/arm/kernel/cpuidle.c
new file mode 100644
index 000000000000..89545f6c8403
--- /dev/null
+++ b/arch/arm/kernel/cpuidle.c
@@ -0,0 +1,21 @@
+/*
+ * Copyright 2012 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/cpuidle.h>
+#include <asm/proc-fns.h>
+
+int arm_cpuidle_simple_enter(struct cpuidle_device *dev,
+                struct cpuidle_driver *drv, int index)
+{
+        cpu_do_idle();
+
+        return index;
+}
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index 204e2160cfcc..c45522c36787 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -10,6 +10,7 @@
  *  32-bit debugging code
  */
 #include <linux/linkage.h>
+#include <asm/assembler.h>
 
                 .text
 
@@ -100,7 +101,7 @@
 
 #endif  /* CONFIG_CPU_V6 */
 
-#else
+#elif !defined(CONFIG_DEBUG_SEMIHOSTING)
 #include <mach/debug-macro.S>
 #endif  /* CONFIG_DEBUG_ICEDCC */
 
@@ -155,6 +156,8 @@ hexbuf:		.space 16
 
                 .ltorg
 
+#ifndef CONFIG_DEBUG_SEMIHOSTING
+
 ENTRY(printascii)
                 addruart_current r3, r1, r2
                 b       2f
@@ -177,3 +180,24 @@ ENTRY(printch)
                 mov     r0, #0
                 b       1b
 ENDPROC(printch)
+
+#else
+
+ENTRY(printascii)
+                mov     r1, r0
+                mov     r0, #0x04               @ SYS_WRITE0
+        ARM(    svc     #0x123456       )
+        THUMB(  svc     #0xab           )
+                mov     pc, lr
+ENDPROC(printascii)
+
+ENTRY(printch)
+                adr     r1, hexbuf
+                strb    r0, [r1]
+                mov     r0, #0x03               @ SYS_WRITEC
+        ARM(    svc     #0x123456       )
+        THUMB(  svc     #0xab           )
+                mov     pc, lr
+ENDPROC(printch)
+
+#endif
diff --git a/arch/arm/kernel/elf.c b/arch/arm/kernel/elf.c
index ddba41d1fcf1..d0d1e83150c9 100644
--- a/arch/arm/kernel/elf.c
+++ b/arch/arm/kernel/elf.c
@@ -3,6 +3,7 @@
 #include <linux/personality.h>
 #include <linux/binfmts.h>
 #include <linux/elf.h>
+#include <asm/system_info.h>
 
 int elf_check_arch(const struct elf32_hdr *x)
 {
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 22f0ed324f37..7fd3ad048da9 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -15,6 +15,7 @@
  *  that causes it to save wrong values...  Be aware!
  */
 
+#include <asm/assembler.h>
 #include <asm/memory.h>
 #include <asm/glue-df.h>
 #include <asm/glue-pf.h>
@@ -26,7 +27,7 @@
 #include <asm/unwind.h>
 #include <asm/unistd.h>
 #include <asm/tls.h>
-#include <asm/system.h>
+#include <asm/system_info.h>
 
 #include "entry-header.S"
 #include <asm/entry-macro-multi.S>
diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c
index 4c164ece5891..c32f8456aa09 100644
--- a/arch/arm/kernel/fiq.c
+++ b/arch/arm/kernel/fiq.c
@@ -42,9 +42,9 @@
 #include <linux/seq_file.h>
 
 #include <asm/cacheflush.h>
+#include <asm/cp15.h>
 #include <asm/fiq.h>
 #include <asm/irq.h>
-#include <asm/system.h>
 #include <asm/traps.h>
 
 static unsigned long no_fiq_insn;
diff --git a/arch/arm/kernel/ftrace.c b/arch/arm/kernel/ftrace.c
index c0062ad1e847..df0bf0c8cb79 100644
--- a/arch/arm/kernel/ftrace.c
+++ b/arch/arm/kernel/ftrace.c
@@ -16,10 +16,13 @@
 #include <linux/uaccess.h>
 
 #include <asm/cacheflush.h>
+#include <asm/opcodes.h>
 #include <asm/ftrace.h>
 
+#include "insn.h"
+
 #ifdef CONFIG_THUMB2_KERNEL
-#define NOP             0xeb04f85d      /* pop.w {lr} */
+#define NOP             0xf85deb04      /* pop.w {lr} */
 #else
 #define NOP             0xe8bd4000      /* pop {lr} */
 #endif
@@ -60,76 +63,31 @@ static unsigned long adjust_address(struct dyn_ftrace *rec, unsigned long addr)
 }
 #endif
 
-#ifdef CONFIG_THUMB2_KERNEL
-static unsigned long ftrace_gen_branch(unsigned long pc, unsigned long addr,
-                                       bool link)
-{
-        unsigned long s, j1, j2, i1, i2, imm10, imm11;
-        unsigned long first, second;
-        long offset;
-
-        offset = (long)addr - (long)(pc + 4);
-        if (offset < -16777216 || offset > 16777214) {
-                WARN_ON_ONCE(1);
-                return 0;
-        }
-
-        s       = (offset >> 24) & 0x1;
-        i1      = (offset >> 23) & 0x1;
-        i2      = (offset >> 22) & 0x1;
-        imm10   = (offset >> 12) & 0x3ff;
-        imm11   = (offset >>  1) & 0x7ff;
-
-        j1 = (!i1) ^ s;
-        j2 = (!i2) ^ s;
-
-        first = 0xf000 | (s << 10) | imm10;
-        second = 0x9000 | (j1 << 13) | (j2 << 11) | imm11;
-        if (link)
-                second |= 1 << 14;
-
-        return (second << 16) | first;
-}
-#else
-static unsigned long ftrace_gen_branch(unsigned long pc, unsigned long addr,
-                                       bool link)
-{
-        unsigned long opcode = 0xea000000;
-        long offset;
-
-        if (link)
-                opcode |= 1 << 24;
-
-        offset = (long)addr - (long)(pc + 8);
-        if (unlikely(offset < -33554432 || offset > 33554428)) {
-                /* Can't generate branches that far (from ARM ARM). Ftrace
-                 * doesn't generate branches outside of kernel text.
-                 */
-                WARN_ON_ONCE(1);
-                return 0;
-        }
-
-        offset = (offset >> 2) & 0x00ffffff;
-
-        return opcode | offset;
-}
-#endif
-
 static unsigned long ftrace_call_replace(unsigned long pc, unsigned long addr)
 {
-        return ftrace_gen_branch(pc, addr, true);
+        return arm_gen_branch_link(pc, addr);
 }
 
 static int ftrace_modify_code(unsigned long pc, unsigned long old,
-                              unsigned long new)
+                              unsigned long new, bool validate)
 {
         unsigned long replaced;
 
-        if (probe_kernel_read(&replaced, (void *)pc, MCOUNT_INSN_SIZE))
-                return -EFAULT;
+        if (IS_ENABLED(CONFIG_THUMB2_KERNEL)) {
+                old = __opcode_to_mem_thumb32(old);
+                new = __opcode_to_mem_thumb32(new);
+        } else {
+                old = __opcode_to_mem_arm(old);
+                new = __opcode_to_mem_arm(new);
+        }
 
-        if (replaced != old)
-                return -EINVAL;
+        if (validate) {
+                if (probe_kernel_read(&replaced, (void *)pc, MCOUNT_INSN_SIZE))
+                        return -EFAULT;
+
+                if (replaced != old)
+                        return -EINVAL;
+        }
 
         if (probe_kernel_write((void *)pc, &new, MCOUNT_INSN_SIZE))
                 return -EPERM;
@@ -141,23 +99,21 @@ static int ftrace_modify_code(unsigned long pc, unsigned long old,
 
 int ftrace_update_ftrace_func(ftrace_func_t func)
 {
-        unsigned long pc, old;
+        unsigned long pc;
         unsigned long new;
         int ret;
 
         pc = (unsigned long)&ftrace_call;
-        memcpy(&old, &ftrace_call, MCOUNT_INSN_SIZE);
         new = ftrace_call_replace(pc, (unsigned long)func);
 
-        ret = ftrace_modify_code(pc, old, new);
+        ret = ftrace_modify_code(pc, 0, new, false);
 
 #ifdef CONFIG_OLD_MCOUNT
         if (!ret) {
                 pc = (unsigned long)&ftrace_call_old;
-                memcpy(&old, &ftrace_call_old, MCOUNT_INSN_SIZE);
                 new = ftrace_call_replace(pc, (unsigned long)func);
 
-                ret = ftrace_modify_code(pc, old, new);
+                ret = ftrace_modify_code(pc, 0, new, false);
         }
 #endif
 
@@ -172,7 +128,7 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
         old = ftrace_nop_replace(rec);
         new = ftrace_call_replace(ip, adjust_address(rec, addr));
 
-        return ftrace_modify_code(rec->ip, old, new);
+        return ftrace_modify_code(rec->ip, old, new, true);
 }
 
 int ftrace_make_nop(struct module *mod,
@@ -185,7 +141,7 @@ int ftrace_make_nop(struct module *mod,
 
         old = ftrace_call_replace(ip, adjust_address(rec, addr));
         new = ftrace_nop_replace(rec);
-        ret = ftrace_modify_code(ip, old, new);
+        ret = ftrace_modify_code(ip, old, new, true);
 
 #ifdef CONFIG_OLD_MCOUNT
         if (ret == -EINVAL && addr == MCOUNT_ADDR) {
@@ -193,7 +149,7 @@ int ftrace_make_nop(struct module *mod,
 
                 old = ftrace_call_replace(ip, adjust_address(rec, addr));
                 new = ftrace_nop_replace(rec);
-                ret = ftrace_modify_code(ip, old, new);
+                ret = ftrace_modify_code(ip, old, new, true);
         }
 #endif
 
@@ -249,12 +205,12 @@ static int __ftrace_modify_caller(unsigned long *callsite,
 {
         unsigned long caller_fn = (unsigned long) func;
         unsigned long pc = (unsigned long) callsite;
-        unsigned long branch = ftrace_gen_branch(pc, caller_fn, false);
+        unsigned long branch = arm_gen_branch(pc, caller_fn);
         unsigned long nop = 0xe1a00000; /* mov r0, r0 */
         unsigned long old = enable ? nop : branch;
         unsigned long new = enable ? branch : nop;
 
-        return ftrace_modify_code(pc, old, new);
+        return ftrace_modify_code(pc, old, new, true);
 }
 
 static int ftrace_modify_graph_caller(bool enable)
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index d46f25968bec..278cfc144f44 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -17,8 +17,8 @@
 #include <asm/assembler.h>
 #include <asm/ptrace.h>
 #include <asm/asm-offsets.h>
+#include <asm/cp15.h>
 #include <asm/thread_info.h>
-#include <asm/system.h>
 
 /*
  * Kernel startup entry point.
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 6d5791144066..3bf0c7f8b043 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -15,12 +15,12 @@
 #include <linux/init.h>
 
 #include <asm/assembler.h>
+#include <asm/cp15.h>
 #include <asm/domain.h>
 #include <asm/ptrace.h>
 #include <asm/asm-offsets.h>
 #include <asm/memory.h>
 #include <asm/thread_info.h>
-#include <asm/system.h>
 #include <asm/pgtable.h>
 
 #ifdef CONFIG_DEBUG_LL
@@ -265,7 +265,7 @@ __create_page_tables:
         str     r6, [r3]
 
 #ifdef CONFIG_DEBUG_LL
-#ifndef CONFIG_DEBUG_ICEDCC
+#if !defined(CONFIG_DEBUG_ICEDCC) && !defined(CONFIG_DEBUG_SEMIHOSTING)
         /*
          * Map in IO space for serial debugging.
          * This allows debug messages to be output
@@ -297,10 +297,10 @@ __create_page_tables:
         cmp     r0, r6
         blo     1b
 
-#else /* CONFIG_DEBUG_ICEDCC */
-        /* we don't need any serial debugging mappings for ICEDCC */
+#else /* CONFIG_DEBUG_ICEDCC || CONFIG_DEBUG_SEMIHOSTING */
+        /* we don't need any serial debugging mappings */
         ldr     r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags
-#endif /* !CONFIG_DEBUG_ICEDCC */
+#endif
 
 #if defined(CONFIG_ARCH_NETWINDER) || defined(CONFIG_ARCH_CATS)
         /*
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index d6a95ef9131d..ba386bd94107 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -34,7 +34,6 @@
 #include <asm/current.h>
 #include <asm/hw_breakpoint.h>
 #include <asm/kdebug.h>
-#include <asm/system.h>
 #include <asm/traps.h>
 
 /* Breakpoint currently in use for each BRP. */
diff --git a/arch/arm/kernel/insn.c b/arch/arm/kernel/insn.c
new file mode 100644
index 000000000000..b760340b7014
--- /dev/null
+++ b/arch/arm/kernel/insn.c
@@ -0,0 +1,62 @@
+#include <linux/bug.h>
+#include <linux/kernel.h>
+#include <asm/opcodes.h>
+
+static unsigned long
+__arm_gen_branch_thumb2(unsigned long pc, unsigned long addr, bool link)
+{
+        unsigned long s, j1, j2, i1, i2, imm10, imm11;
+        unsigned long first, second;
+        long offset;
+
+        offset = (long)addr - (long)(pc + 4);
+        if (offset < -16777216 || offset > 16777214) {
+                WARN_ON_ONCE(1);
+                return 0;
+        }
+
+        s       = (offset >> 24) & 0x1;
+        i1      = (offset >> 23) & 0x1;
+        i2      = (offset >> 22) & 0x1;
+        imm10   = (offset >> 12) & 0x3ff;
+        imm11   = (offset >>  1) & 0x7ff;
+
+        j1 = (!i1) ^ s;
+        j2 = (!i2) ^ s;
+
+        first = 0xf000 | (s << 10) | imm10;
+        second = 0x9000 | (j1 << 13) | (j2 << 11) | imm11;
+        if (link)
+                second |= 1 << 14;
+
+        return __opcode_thumb32_compose(first, second);
+}
+
+static unsigned long
+__arm_gen_branch_arm(unsigned long pc, unsigned long addr, bool link)
+{
+        unsigned long opcode = 0xea000000;
+        long offset;
+
+        if (link)
+                opcode |= 1 << 24;
+
+        offset = (long)addr - (long)(pc + 8);
+        if (unlikely(offset < -33554432 || offset > 33554428)) {
+                WARN_ON_ONCE(1);
+                return 0;
+        }
+
+        offset = (offset >> 2) & 0x00ffffff;
+
+        return opcode | offset;
+}
+
+unsigned long
+__arm_gen_branch(unsigned long pc, unsigned long addr, bool link)
+{
+        if (IS_ENABLED(CONFIG_THUMB2_KERNEL))
+                return __arm_gen_branch_thumb2(pc, addr, link);
+        else
+                return __arm_gen_branch_arm(pc, addr, link);
+}
diff --git a/arch/arm/kernel/insn.h b/arch/arm/kernel/insn.h
new file mode 100644
index 000000000000..e96065da4dae
--- /dev/null
+++ b/arch/arm/kernel/insn.h
@@ -0,0 +1,29 @@
+#ifndef __ASM_ARM_INSN_H
+#define __ASM_ARM_INSN_H
+
+static inline unsigned long
+arm_gen_nop(void)
+{
+#ifdef CONFIG_THUMB2_KERNEL
+        return 0xf3af8000; /* nop.w */
+#else
+        return 0xe1a00000; /* mov r0, r0 */
+#endif
+}
+
+unsigned long
+__arm_gen_branch(unsigned long pc, unsigned long addr, bool link);
+
+static inline unsigned long
+arm_gen_branch(unsigned long pc, unsigned long addr)
+{
+        return __arm_gen_branch(pc, addr, false);
+}
+
+static inline unsigned long
+arm_gen_branch_link(unsigned long pc, unsigned long addr)
+{
+        return __arm_gen_branch(pc, addr, true);
+}
+
+#endif
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 3efd82cc95f0..71ccdbfed662 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -36,7 +36,6 @@
 #include <linux/proc_fs.h>
 
 #include <asm/exception.h>
-#include <asm/system.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
@@ -181,10 +180,7 @@ void migrate_irqs(void)
         local_irq_save(flags);
 
         for_each_irq_desc(i, desc) {
-                bool affinity_broken = false;
-
-                if (!desc)
-                        continue;
+                bool affinity_broken;
 
                 raw_spin_lock(&desc->lock);
                 affinity_broken = migrate_one_irq(desc);
diff --git a/arch/arm/kernel/jump_label.c b/arch/arm/kernel/jump_label.c
new file mode 100644
index 000000000000..4ce4f789446d
--- /dev/null
+++ b/arch/arm/kernel/jump_label.c
@@ -0,0 +1,39 @@
+#include <linux/kernel.h>
+#include <linux/jump_label.h>
+
+#include "insn.h"
+#include "patch.h"
+
+#ifdef HAVE_JUMP_LABEL
+
+static void __arch_jump_label_transform(struct jump_entry *entry,
+                                        enum jump_label_type type,
+                                        bool is_static)
+{
+        void *addr = (void *)entry->code;
+        unsigned int insn;
+
+        if (type == JUMP_LABEL_ENABLE)
+                insn = arm_gen_branch(entry->code, entry->target);
+        else
+                insn = arm_gen_nop();
+
+        if (is_static)
+                __patch_text(addr, insn);
+        else
+                patch_text(addr, insn);
+}
+
+void arch_jump_label_transform(struct jump_entry *entry,
+                               enum jump_label_type type)
+{
+        __arch_jump_label_transform(entry, type, false);
+}
+
+void arch_jump_label_transform_static(struct jump_entry *entry,
+                                      enum jump_label_type type)
+{
+        __arch_jump_label_transform(entry, type, true);
+}
+
+#endif
diff --git a/arch/arm/kernel/kprobes-common.c b/arch/arm/kernel/kprobes-common.c
index a5394fb4e4e0..18a76282970e 100644
--- a/arch/arm/kernel/kprobes-common.c
+++ b/arch/arm/kernel/kprobes-common.c
@@ -13,6 +13,7 @@
 
 #include <linux/kernel.h>
 #include <linux/kprobes.h>
+#include <asm/system_info.h>
 
 #include "kprobes.h"
 
diff --git a/arch/arm/kernel/kprobes.c b/arch/arm/kernel/kprobes.c
index 129c1163248b..4dd41fc9e235 100644
--- a/arch/arm/kernel/kprobes.c
+++ b/arch/arm/kernel/kprobes.c
@@ -29,6 +29,7 @@
 #include <asm/cacheflush.h>
 
 #include "kprobes.h"
+#include "patch.h"
 
 #define MIN_STACK_SIZE(addr)                            \
         min((unsigned long)MAX_STACK_SIZE,              \
@@ -103,57 +104,33 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
         return 0;
 }
 
-#ifdef CONFIG_THUMB2_KERNEL
-
-/*
- * For a 32-bit Thumb breakpoint spanning two memory words we need to take
- * special precautions to insert the breakpoint atomically, especially on SMP
- * systems. This is achieved by calling this arming function using stop_machine.
- */
-static int __kprobes set_t32_breakpoint(void *addr)
-{
-        ((u16 *)addr)[0] = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION >> 16;
-        ((u16 *)addr)[1] = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION & 0xffff;
-        flush_insns(addr, 2*sizeof(u16));
-        return 0;
-}
-
 void __kprobes arch_arm_kprobe(struct kprobe *p)
 {
-        uintptr_t addr = (uintptr_t)p->addr & ~1; /* Remove any Thumb flag */
-
-        if (!is_wide_instruction(p->opcode)) {
-                *(u16 *)addr = KPROBE_THUMB16_BREAKPOINT_INSTRUCTION;
-                flush_insns(addr, sizeof(u16));
-        } else if (addr & 2) {
-                /* A 32-bit instruction spanning two words needs special care */
-                stop_machine(set_t32_breakpoint, (void *)addr, &cpu_online_map);
+        unsigned int brkp;
+        void *addr;
+
+        if (IS_ENABLED(CONFIG_THUMB2_KERNEL)) {
+                /* Remove any Thumb flag */
+                addr = (void *)((uintptr_t)p->addr & ~1);
+
+                if (is_wide_instruction(p->opcode))
+                        brkp = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION;
+                else
+                        brkp = KPROBE_THUMB16_BREAKPOINT_INSTRUCTION;
         } else {
-                /* Word aligned 32-bit instruction can be written atomically */
-                u32 bkp = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION;
-#ifndef __ARMEB__ /* Swap halfwords for little-endian */
-                bkp = (bkp >> 16) | (bkp << 16);
-#endif
-                *(u32 *)addr = bkp;
-                flush_insns(addr, sizeof(u32));
-        }
-}
+                kprobe_opcode_t insn = p->opcode;
 
-#else /* !CONFIG_THUMB2_KERNEL */
+                addr = p->addr;
+                brkp = KPROBE_ARM_BREAKPOINT_INSTRUCTION;
 
-void __kprobes arch_arm_kprobe(struct kprobe *p)
-{
-        kprobe_opcode_t insn = p->opcode;
-        kprobe_opcode_t brkp = KPROBE_ARM_BREAKPOINT_INSTRUCTION;
-        if (insn >= 0xe0000000)
-                brkp |= 0xe0000000;  /* Unconditional instruction */
-        else
-                brkp |= insn & 0xf0000000;  /* Copy condition from insn */
-        *p->addr = brkp;
-        flush_insns(p->addr, sizeof(p->addr[0]));
-}
+                if (insn >= 0xe0000000)
+                        brkp |= 0xe0000000;  /* Unconditional instruction */
+                else
+                        brkp |= insn & 0xf0000000;  /* Copy condition from insn */
+        }
 
-#endif /* !CONFIG_THUMB2_KERNEL */
+        patch_text(addr, brkp);
+}
 
 /*
  * The actual disarming is done here on each CPU and synchronized using
@@ -166,31 +143,16 @@ void __kprobes arch_arm_kprobe(struct kprobe *p)
 int __kprobes __arch_disarm_kprobe(void *p)
 {
         struct kprobe *kp = p;
-#ifdef CONFIG_THUMB2_KERNEL
-        u16 *addr = (u16 *)((uintptr_t)kp->addr & ~1);
-        kprobe_opcode_t insn = kp->opcode;
-        unsigned int len;
+        void *addr = (void *)((uintptr_t)kp->addr & ~1);
 
-        if (is_wide_instruction(insn)) {
-                ((u16 *)addr)[0] = insn>>16;
-                ((u16 *)addr)[1] = insn;
-                len = 2*sizeof(u16);
-        } else {
-                ((u16 *)addr)[0] = insn;
-                len = sizeof(u16);
-        }
-        flush_insns(addr, len);
+        __patch_text(addr, kp->opcode);
 
-#else /* !CONFIG_THUMB2_KERNEL */
-        *kp->addr = kp->opcode;
-        flush_insns(kp->addr, sizeof(kp->addr[0]));
-#endif
         return 0;
 }
 
 void __kprobes arch_disarm_kprobe(struct kprobe *p)
 {
-        stop_machine(__arch_disarm_kprobe, p, &cpu_online_map);
+        stop_machine(__arch_disarm_kprobe, p, cpu_online_mask);
 }
 
 void __kprobes arch_remove_kprobe(struct kprobe *p)
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index 764bd456d84f..dfcdb9f7c126 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -7,12 +7,13 @@
 #include <linux/delay.h>
 #include <linux/reboot.h>
 #include <linux/io.h>
+#include <linux/irq.h>
 #include <asm/pgtable.h>
 #include <asm/pgalloc.h>
 #include <asm/mmu_context.h>
 #include <asm/cacheflush.h>
 #include <asm/mach-types.h>
-#include <asm/system.h>
+#include <asm/system_misc.h>
 
 extern const unsigned char relocate_new_kernel[];
 extern const unsigned int relocate_new_kernel_size;
@@ -53,6 +54,29 @@ void machine_crash_nonpanic_core(void *unused)
                 cpu_relax();
 }
 
+static void machine_kexec_mask_interrupts(void)
+{
+        unsigned int i;
+        struct irq_desc *desc;
+
+        for_each_irq_desc(i, desc) {
+                struct irq_chip *chip;
+
+                chip = irq_desc_get_chip(desc);
+                if (!chip)
+                        continue;
+
+                if (chip->irq_eoi && irqd_irq_inprogress(&desc->irq_data))
+                        chip->irq_eoi(&desc->irq_data);
+
+                if (chip->irq_mask)
+                        chip->irq_mask(&desc->irq_data);
+
+                if (chip->irq_disable && !irqd_irq_disabled(&desc->irq_data))
+                        chip->irq_disable(&desc->irq_data);
+        }
+}
+
 void machine_crash_shutdown(struct pt_regs *regs)
 {
         unsigned long msecs;
@@ -70,6 +94,7 @@ void machine_crash_shutdown(struct pt_regs *regs)
                 printk(KERN_WARNING "Non-crashing CPUs did not react to IPI\n");
 
         crash_save_cpu(regs, smp_processor_id());
+        machine_kexec_mask_interrupts();
 
         printk(KERN_INFO "Loading crashdump kernel...\n");
 }
diff --git a/arch/arm/kernel/patch.c b/arch/arm/kernel/patch.c
new file mode 100644
index 000000000000..07314af47733
--- /dev/null
+++ b/arch/arm/kernel/patch.c
@@ -0,0 +1,75 @@
+#include <linux/kernel.h>
+#include <linux/kprobes.h>
+#include <linux/stop_machine.h>
+
+#include <asm/cacheflush.h>
+#include <asm/smp_plat.h>
+#include <asm/opcodes.h>
+
+#include "patch.h"
+
+struct patch {
+        void *addr;
+        unsigned int insn;
+};
+
+void __kprobes __patch_text(void *addr, unsigned int insn)
+{
+        bool thumb2 = IS_ENABLED(CONFIG_THUMB2_KERNEL);
+        int size;
+
+        if (thumb2 && __opcode_is_thumb16(insn)) {
+                *(u16 *)addr = __opcode_to_mem_thumb16(insn);
+                size = sizeof(u16);
+        } else if (thumb2 && ((uintptr_t)addr & 2)) {
+                u16 first = __opcode_thumb32_first(insn);
+                u16 second = __opcode_thumb32_second(insn);
+                u16 *addrh = addr;
+
+                addrh[0] = __opcode_to_mem_thumb16(first);
+                addrh[1] = __opcode_to_mem_thumb16(second);
+
+                size = sizeof(u32);
+        } else {
+                if (thumb2)
+                        insn = __opcode_to_mem_thumb32(insn);
+                else
+                        insn = __opcode_to_mem_arm(insn);
+
+                *(u32 *)addr = insn;
+                size = sizeof(u32);
+        }
+
+        flush_icache_range((uintptr_t)(addr),
+                           (uintptr_t)(addr) + size);
+}
+
+static int __kprobes patch_text_stop_machine(void *data)
+{
+        struct patch *patch = data;
+
+        __patch_text(patch->addr, patch->insn);
+
+        return 0;
+}
+
+void __kprobes patch_text(void *addr, unsigned int insn)
+{
+        struct patch patch = {
+                .addr = addr,
+                .insn = insn,
+        };
+
+        if (cache_ops_need_broadcast()) {
+                stop_machine(patch_text_stop_machine, &patch, cpu_online_mask);
+        } else {
+                bool straddles_word = IS_ENABLED(CONFIG_THUMB2_KERNEL)
+                                      && __opcode_is_thumb32(insn)
+                                      && ((uintptr_t)addr & 2);
+
+                if (straddles_word)
+                        stop_machine(patch_text_stop_machine, &patch, NULL);
+                else
+                        __patch_text(addr, insn);
+        }
+}
diff --git a/arch/arm/kernel/patch.h b/arch/arm/kernel/patch.h
new file mode 100644
index 000000000000..b4731f2dac38
--- /dev/null
+++ b/arch/arm/kernel/patch.h
@@ -0,0 +1,7 @@
+#ifndef _ARM_KERNEL_PATCH_H
+#define _ARM_KERNEL_PATCH_H
+
+void patch_text(void *addr, unsigned int insn);
+void __patch_text(void *addr, unsigned int insn);
+
+#endif
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 8a89d3b7626b..186c8cb982c5 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -738,6 +738,9 @@ init_hw_perf_events(void)
                 case 0xC0F0:    /* Cortex-A15 */
                         cpu_pmu = armv7_a15_pmu_init();
                         break;
+                case 0xC070:    /* Cortex-A7 */
+                        cpu_pmu = armv7_a7_pmu_init();
+                        break;
                 }
         /* Intel CPUs [xscale]. */
         } else if (0x69 == implementor) {
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 4d7095af2ab3..00755d82e2f2 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -610,6 +610,130 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
 };
 
 /*
+ * Cortex-A7 HW events mapping
+ */
+static const unsigned armv7_a7_perf_map[PERF_COUNT_HW_MAX] = {
+        [PERF_COUNT_HW_CPU_CYCLES]              = ARMV7_PERFCTR_CPU_CYCLES,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = ARMV7_PERFCTR_INSTR_EXECUTED,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
+        [PERF_COUNT_HW_CACHE_MISSES]            = ARMV7_PERFCTR_L1_DCACHE_REFILL,
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = ARMV7_PERFCTR_PC_WRITE,
+        [PERF_COUNT_HW_BRANCH_MISSES]           = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+        [PERF_COUNT_HW_BUS_CYCLES]              = ARMV7_PERFCTR_BUS_CYCLES,
+        [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_STALLED_CYCLES_BACKEND]  = HW_OP_UNSUPPORTED,
+};
+
+static const unsigned armv7_a7_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
+                                        [PERF_COUNT_HW_CACHE_OP_MAX]
+                                        [PERF_COUNT_HW_CACHE_RESULT_MAX] = {
+        [C(L1D)] = {
+                /*
+                 * The performance counters don't differentiate between read
+                 * and write accesses/misses so this isn't strictly correct,
+                 * but it's the best we can do. Writes and reads get
+                 * combined.
+                 */
+                [C(OP_READ)] = {
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_DCACHE_REFILL,
+                },
+                [C(OP_WRITE)] = {
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_DCACHE_REFILL,
+                },
+                [C(OP_PREFETCH)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+                },
+        },
+        [C(L1I)] = {
+                [C(OP_READ)] = {
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
+                },
+                [C(OP_WRITE)] = {
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
+                },
+                [C(OP_PREFETCH)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+                },
+        },
+        [C(LL)] = {
+                [C(OP_READ)] = {
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L2_CACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L2_CACHE_REFILL,
+                },
+                [C(OP_WRITE)] = {
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L2_CACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L2_CACHE_REFILL,
+                },
+                [C(OP_PREFETCH)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+                },
+        },
+        [C(DTLB)] = {
+                [C(OP_READ)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_DTLB_REFILL,
+                },
+                [C(OP_WRITE)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_DTLB_REFILL,
+                },
+                [C(OP_PREFETCH)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+                },
+        },
+        [C(ITLB)] = {
+                [C(OP_READ)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
+                },
+                [C(OP_WRITE)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
+                },
+                [C(OP_PREFETCH)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+                },
+        },
+        [C(BPU)] = {
+                [C(OP_READ)] = {
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+                },
+                [C(OP_WRITE)] = {
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+                },
+                [C(OP_PREFETCH)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+                },
+        },
+        [C(NODE)] = {
+                [C(OP_READ)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+                },
+                [C(OP_WRITE)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+                },
+                [C(OP_PREFETCH)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+                },
+        },
+};
+
+/*
  * Perf Events' indices
  */
 #define ARMV7_IDX_CYCLE_COUNTER 0
@@ -1104,6 +1228,12 @@ static int armv7_a15_map_event(struct perf_event *event)
                                 &armv7_a15_perf_cache_map, 0xFF);
 }
 
+static int armv7_a7_map_event(struct perf_event *event)
+{
+        return map_cpu_event(event, &armv7_a7_perf_map,
+                                &armv7_a7_perf_cache_map, 0xFF);
+}
+
 static struct arm_pmu armv7pmu = {
         .handle_irq             = armv7pmu_handle_irq,
         .enable                 = armv7pmu_enable_event,
@@ -1164,6 +1294,16 @@ static struct arm_pmu *__init armv7_a15_pmu_init(void)
         armv7pmu.set_event_filter = armv7pmu_set_event_filter;
         return &armv7pmu;
 }
+
+static struct arm_pmu *__init armv7_a7_pmu_init(void)
+{
+        armv7pmu.id             = ARM_PERF_PMU_ID_CA7;
+        armv7pmu.name           = "ARMv7 Cortex-A7";
+        armv7pmu.map_event      = armv7_a7_map_event;
+        armv7pmu.num_events     = armv7_read_num_pmnc_events();
+        armv7pmu.set_event_filter = armv7pmu_set_event_filter;
+        return &armv7pmu;
+}
 #else
 static struct arm_pmu *__init armv7_a8_pmu_init(void)
 {
@@ -1184,4 +1324,9 @@ static struct arm_pmu *__init armv7_a15_pmu_init(void)
 {
         return NULL;
 }
+
+static struct arm_pmu *__init armv7_a7_pmu_init(void)
+{
+        return NULL;
+}
 #endif  /* CONFIG_CPU_V7 */
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index d3eca4524533..2b7b017a20cd 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -35,7 +35,6 @@
 #include <asm/cacheflush.h>
 #include <asm/leds.h>
 #include <asm/processor.h>
-#include <asm/system.h>
 #include <asm/thread_notify.h>
 #include <asm/stacktrace.h>
 #include <asm/mach/time.h>
@@ -529,21 +528,39 @@ unsigned long arch_randomize_brk(struct mm_struct *mm)
 #ifdef CONFIG_MMU
 /*
  * The vectors page is always readable from user space for the
- * atomic helpers and the signal restart code.  Let's declare a mapping
- * for it so it is visible through ptrace and /proc/<pid>/mem.
+ * atomic helpers and the signal restart code. Insert it into the
+ * gate_vma so that it is visible through ptrace and /proc/<pid>/mem.
  */
+static struct vm_area_struct gate_vma;
 
-int vectors_user_mapping(void)
+static int __init gate_vma_init(void)
 {
-        struct mm_struct *mm = current->mm;
-        return install_special_mapping(mm, 0xffff0000, PAGE_SIZE,
-                                       VM_READ | VM_EXEC |
-                                       VM_MAYREAD | VM_MAYEXEC | VM_RESERVED,
-                                       NULL);
+        gate_vma.vm_start       = 0xffff0000;
+        gate_vma.vm_end         = 0xffff0000 + PAGE_SIZE;
+        gate_vma.vm_page_prot   = PAGE_READONLY_EXEC;
+        gate_vma.vm_flags       = VM_READ | VM_EXEC |
+                                  VM_MAYREAD | VM_MAYEXEC;
+        return 0;
+}
+arch_initcall(gate_vma_init);
+
+struct vm_area_struct *get_gate_vma(struct mm_struct *mm)
+{
+        return &gate_vma;
+}
+
+int in_gate_area(struct mm_struct *mm, unsigned long addr)
+{
+        return (addr >= gate_vma.vm_start) && (addr < gate_vma.vm_end);
+}
+
+int in_gate_area_no_mm(unsigned long addr)
+{
+        return in_gate_area(NULL, addr);
 }
 
 const char *arch_vma_name(struct vm_area_struct *vma)
 {
-        return (vma->vm_start == 0xffff0000) ? "[vectors]" : NULL;
+        return (vma == &gate_vma) ? "[vectors]" : NULL;
 }
 #endif
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index ede6443c34d9..80abafb9bf33 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -26,7 +26,6 @@
 #include <linux/audit.h>
 
 #include <asm/pgtable.h>
-#include <asm/system.h>
 #include <asm/traps.h>
 
 #define REG_PC  15
@@ -257,7 +256,7 @@ static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
 {
         unsigned long tmp;
 
-        if (off & 3 || off >= sizeof(struct user))
+        if (off & 3)
                 return -EIO;
 
         tmp = 0;
@@ -269,6 +268,8 @@ static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
                 tmp = tsk->mm->end_code;
         else if (off < sizeof(struct pt_regs))
                 tmp = get_user_reg(tsk, off >> 2);
+        else if (off >= sizeof(struct user))
+                return -EIO;
 
         return put_user(tmp, ret);
 }
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index 5416c7c12528..27d186abbc06 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -10,6 +10,7 @@
 #include <linux/jiffies.h>
 #include <linux/kernel.h>
 #include <linux/sched.h>
+#include <linux/syscore_ops.h>
 #include <linux/timer.h>
 
 #include <asm/sched_clock.h>
@@ -164,3 +165,20 @@ void __init sched_clock_postinit(void)
 
         sched_clock_poll(sched_clock_timer.data);
 }
+
+static int sched_clock_suspend(void)
+{
+        sched_clock_poll(sched_clock_timer.data);
+        return 0;
+}
+
+static struct syscore_ops sched_clock_ops = {
+        .suspend = sched_clock_suspend,
+};
+
+static int __init sched_clock_syscore_init(void)
+{
+        register_syscore_ops(&sched_clock_ops);
+        return 0;
+}
+device_initcall(sched_clock_syscore_init);
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index a255c39612ca..b91411371ae1 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -33,6 +33,7 @@
 #include <linux/sort.h>
 
 #include <asm/unified.h>
+#include <asm/cp15.h>
 #include <asm/cpu.h>
 #include <asm/cputype.h>
 #include <asm/elf.h>
@@ -44,12 +45,13 @@
 #include <asm/cacheflush.h>
 #include <asm/cachetype.h>
 #include <asm/tlbflush.h>
-#include <asm/system.h>
 
 #include <asm/prom.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
+#include <asm/system_info.h>
+#include <asm/system_misc.h>
 #include <asm/traps.h>
 #include <asm/unwind.h>
 #include <asm/memblock.h>
@@ -974,7 +976,6 @@ void __init setup_arch(char **cmdline_p)
         conswitchp = &dummy_con;
 #endif
 #endif
-        early_trap_init();
 
         if (mdesc->init_early)
                 mdesc->init_early();
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index 9e617bd4a146..7cb532fc8aa4 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -66,12 +66,13 @@ const unsigned long syscall_restart_code[2] = {
  */
 asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask)
 {
-        mask &= _BLOCKABLE;
-        spin_lock_irq(&current->sighand->siglock);
+        sigset_t blocked;
+
         current->saved_sigmask = current->blocked;
-        siginitset(&current->blocked, mask);
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
+
+        mask &= _BLOCKABLE;
+        siginitset(&blocked, mask);
+        set_current_blocked(&blocked);
 
         current->state = TASK_INTERRUPTIBLE;
         schedule();
@@ -280,10 +281,7 @@ static int restore_sigframe(struct pt_regs *regs, struct sigframe __user *sf)
         err = __copy_from_user(&set, &sf->uc.uc_sigmask, sizeof(set));
         if (err == 0) {
                 sigdelsetmask(&set, ~_BLOCKABLE);
-                spin_lock_irq(&current->sighand->siglock);
-                current->blocked = set;
-                recalc_sigpending();
-                spin_unlock_irq(&current->sighand->siglock);
+                set_current_blocked(&set);
         }
 
         __get_user_error(regs->ARM_r0, &sf->uc.uc_mcontext.arm_r0, err);
@@ -636,13 +634,7 @@ handle_signal(unsigned long sig, struct k_sigaction *ka,
         /*
          * Block the signal if we were successful.
          */
-        spin_lock_irq(&tsk->sighand->siglock);
-        sigorsets(&tsk->blocked, &tsk->blocked,
-                  &ka->sa.sa_mask);
-        if (!(ka->sa.sa_flags & SA_NODEFER))
-                sigaddset(&tsk->blocked, sig);
-        recalc_sigpending();
-        spin_unlock_irq(&tsk->sighand->siglock);
+        block_sigmask(ka, sig);
 
         return 0;
 }
diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index 1f268bda4552..987dcf33415c 100644
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -4,7 +4,6 @@
 #include <asm/assembler.h>
 #include <asm/glue-cache.h>
 #include <asm/glue-proc.h>
-#include <asm/system.h>
         .text
 
 /*
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 8f8cce2c46c4..addbbe8028c2 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -58,6 +58,8 @@ enum ipi_msg_type {
         IPI_CPU_STOP,
 };
 
+static DECLARE_COMPLETION(cpu_running);
+
 int __cpuinit __cpu_up(unsigned int cpu)
 {
         struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu);
@@ -98,20 +100,12 @@ int __cpuinit __cpu_up(unsigned int cpu)
          */
         ret = boot_secondary(cpu, idle);
         if (ret == 0) {
-                unsigned long timeout;
-
                 /*
                  * CPU was successfully started, wait for it
                  * to come online or time out.
                  */
-                timeout = jiffies + HZ;
-                while (time_before(jiffies, timeout)) {
-                        if (cpu_online(cpu))
-                                break;
-
-                        udelay(10);
-                        barrier();
-                }
+                wait_for_completion_timeout(&cpu_running,
+                                                 msecs_to_jiffies(1000));
 
                 if (!cpu_online(cpu)) {
                         pr_crit("CPU%u: failed to come online\n", cpu);
@@ -288,9 +282,10 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
         /*
          * OK, now it's safe to let the boot CPU continue.  Wait for
          * the CPU migration code to notice that the CPU is online
-         * before we continue.
+         * before we continue - which happens after __cpu_up returns.
          */
         set_cpu_online(cpu, true);
+        complete(&cpu_running);
 
         /*
          * Setup the percpu timer for this CPU.
@@ -354,7 +349,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
                  * re-initialize the map in platform_smp_prepare_cpus() if
                  * present != possible (e.g. physical hotplug).
                  */
-                init_cpu_present(&cpu_possible_map);
+                init_cpu_present(cpu_possible_mask);
 
                 /*
                  * Initialise the SCU if there are more than one CPU
@@ -586,8 +581,9 @@ void smp_send_stop(void)
         unsigned long timeout;
 
         if (num_online_cpus() > 1) {
-                cpumask_t mask = cpu_online_map;
-                cpu_clear(smp_processor_id(), mask);
+                struct cpumask mask;
+                cpumask_copy(&mask, cpu_online_mask);
+                cpumask_clear_cpu(smp_processor_id(), &mask);
 
                 smp_cross_call(&mask, IPI_CPU_STOP);
         }
diff --git a/arch/arm/kernel/smp_tlb.c b/arch/arm/kernel/smp_tlb.c
index 7dcb35285be7..02c5d2ce23bf 100644
--- a/arch/arm/kernel/smp_tlb.c
+++ b/arch/arm/kernel/smp_tlb.c
@@ -13,18 +13,6 @@
 #include <asm/smp_plat.h>
 #include <asm/tlbflush.h>
 
-static void on_each_cpu_mask(void (*func)(void *), void *info, int wait,
-        const struct cpumask *mask)
-{
-        preempt_disable();
-
-        smp_call_function_many(mask, func, info, wait);
-        if (cpumask_test_cpu(smp_processor_id(), mask))
-                func(info);
-
-        preempt_enable();
-}
-
 /**********************************************************************/
 
 /*
@@ -87,7 +75,7 @@ void flush_tlb_all(void)
 void flush_tlb_mm(struct mm_struct *mm)
 {
         if (tlb_ops_need_broadcast())
-                on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, mm_cpumask(mm));
+                on_each_cpu_mask(mm_cpumask(mm), ipi_flush_tlb_mm, mm, 1);
         else
                 local_flush_tlb_mm(mm);
 }
@@ -98,7 +86,8 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
                 struct tlb_args ta;
                 ta.ta_vma = vma;
                 ta.ta_start = uaddr;
-                on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, mm_cpumask(vma->vm_mm));
+                on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_page,
+                                        &ta, 1);
         } else
                 local_flush_tlb_page(vma, uaddr);
 }
@@ -121,7 +110,8 @@ void flush_tlb_range(struct vm_area_struct *vma,
                 ta.ta_vma = vma;
                 ta.ta_start = start;
                 ta.ta_end = end;
-                on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, mm_cpumask(vma->vm_mm));
+                on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_range,
+                                        &ta, 1);
         } else
                 local_flush_tlb_range(vma, start, end);
 }
diff --git a/arch/arm/kernel/tcm.c b/arch/arm/kernel/tcm.c
index 01ec453bb924..30ae6bb4a310 100644
--- a/arch/arm/kernel/tcm.c
+++ b/arch/arm/kernel/tcm.c
@@ -16,6 +16,7 @@
 #include <asm/cputype.h>
 #include <asm/mach/map.h>
 #include <asm/memory.h>
+#include <asm/system_info.h>
 #include "tcm.h"
 
 static struct gen_pool *tcm_pool;
diff --git a/arch/arm/kernel/thumbee.c b/arch/arm/kernel/thumbee.c
index 9cb7aaca159f..aab899764053 100644
--- a/arch/arm/kernel/thumbee.c
+++ b/arch/arm/kernel/thumbee.c
@@ -20,6 +20,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 
+#include <asm/system_info.h>
 #include <asm/thread_notify.h>
 
 /*
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index 8c57dd3680e9..fe31b22f18fd 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -25,8 +25,6 @@
 #include <linux/timer.h>
 #include <linux/irq.h>
 
-#include <linux/mc146818rtc.h>
-
 #include <asm/leds.h>
 #include <asm/thread_info.h>
 #include <asm/sched_clock.h>
@@ -149,8 +147,6 @@ void __init time_init(void)
 {
         system_timer = machine_desc->timer;
         system_timer->init();
-#ifdef CONFIG_HAVE_SCHED_CLOCK
         sched_clock_postinit();
-#endif
 }
 
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index f84dfe67724f..778454750a6c 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -29,11 +29,11 @@
 #include <linux/atomic.h>
 #include <asm/cacheflush.h>
 #include <asm/exception.h>
-#include <asm/system.h>
 #include <asm/unistd.h>
 #include <asm/traps.h>
 #include <asm/unwind.h>
 #include <asm/tls.h>
+#include <asm/system_misc.h>
 
 #include "signal.h"
 
@@ -227,6 +227,11 @@ void show_stack(struct task_struct *tsk, unsigned long *sp)
 #else
 #define S_SMP ""
 #endif
+#ifdef CONFIG_THUMB2_KERNEL
+#define S_ISA " THUMB2"
+#else
+#define S_ISA " ARM"
+#endif
 
 static int __die(const char *str, int err, struct thread_info *thread, struct pt_regs *regs)
 {
@@ -234,8 +239,8 @@ static int __die(const char *str, int err, struct thread_info *thread, struct pt
         static int die_counter;
         int ret;
 
-        printk(KERN_EMERG "Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
-               str, err, ++die_counter);
+        printk(KERN_EMERG "Internal error: %s: %x [#%d]" S_PREEMPT S_SMP
+               S_ISA "\n", str, err, ++die_counter);
 
         /* trap and error numbers are mostly meaningless on ARM */
         ret = notify_die(DIE_OOPS, str, regs, err, tsk->thread.trap_no, SIGSEGV);
@@ -784,18 +789,16 @@ static void __init kuser_get_tls_init(unsigned long vectors)
                 memcpy((void *)vectors + 0xfe0, (void *)vectors + 0xfe8, 4);
 }
 
-void __init early_trap_init(void)
+void __init early_trap_init(void *vectors_base)
 {
-#if defined(CONFIG_CPU_USE_DOMAINS)
-        unsigned long vectors = CONFIG_VECTORS_BASE;
-#else
-        unsigned long vectors = (unsigned long)vectors_page;
-#endif
+        unsigned long vectors = (unsigned long)vectors_base;
         extern char __stubs_start[], __stubs_end[];
         extern char __vectors_start[], __vectors_end[];
         extern char __kuser_helper_start[], __kuser_helper_end[];
         int kuser_sz = __kuser_helper_end - __kuser_helper_start;
 
+        vectors_page = vectors_base;
+
         /*
          * Copy the vectors, stubs and kuser helpers (in entry-armv.S)
          * into the vector page, mapped at 0xffff0000, and ensure these
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index e55cdcbd81fb..45db05d8d94c 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -20,9 +20,11 @@ config HAVE_AT91_USART5
 
 config AT91_SAM9_ALT_RESET
         bool
+        default !ARCH_AT91X40
 
 config AT91_SAM9G45_RESET
         bool
+        default !ARCH_AT91X40
 
 menu "Atmel AT91 System-on-Chip"
 
@@ -45,7 +47,6 @@ config ARCH_AT91SAM9260
         select HAVE_AT91_USART4
         select HAVE_AT91_USART5
         select HAVE_NET_MACB
-        select AT91_SAM9_ALT_RESET
 
 config ARCH_AT91SAM9261
         bool "AT91SAM9261"
@@ -53,7 +54,6 @@ config ARCH_AT91SAM9261
         select GENERIC_CLOCKEVENTS
         select HAVE_FB_ATMEL
         select HAVE_AT91_DBGU0
-        select AT91_SAM9_ALT_RESET
 
 config ARCH_AT91SAM9G10
         bool "AT91SAM9G10"
@@ -61,7 +61,6 @@ config ARCH_AT91SAM9G10
         select GENERIC_CLOCKEVENTS
         select HAVE_AT91_DBGU0
         select HAVE_FB_ATMEL
-        select AT91_SAM9_ALT_RESET
 
 config ARCH_AT91SAM9263
         bool "AT91SAM9263"
@@ -70,7 +69,6 @@ config ARCH_AT91SAM9263
         select HAVE_FB_ATMEL
         select HAVE_NET_MACB
         select HAVE_AT91_DBGU1
-        select AT91_SAM9_ALT_RESET
 
 config ARCH_AT91SAM9RL
         bool "AT91SAM9RL"
@@ -79,7 +77,6 @@ config ARCH_AT91SAM9RL
         select HAVE_AT91_USART3
         select HAVE_FB_ATMEL
         select HAVE_AT91_DBGU0
-        select AT91_SAM9_ALT_RESET
 
 config ARCH_AT91SAM9G20
         bool "AT91SAM9G20"
@@ -90,7 +87,6 @@ config ARCH_AT91SAM9G20
         select HAVE_AT91_USART4
         select HAVE_AT91_USART5
         select HAVE_NET_MACB
-        select AT91_SAM9_ALT_RESET
 
 config ARCH_AT91SAM9G45
         bool "AT91SAM9G45"
@@ -100,7 +96,6 @@ config ARCH_AT91SAM9G45
         select HAVE_FB_ATMEL
         select HAVE_NET_MACB
         select HAVE_AT91_DBGU1
-        select AT91_SAM9G45_RESET
 
 config ARCH_AT91SAM9X5
         bool "AT91SAM9x5 family"
@@ -109,7 +104,6 @@ config ARCH_AT91SAM9X5
         select HAVE_FB_ATMEL
         select HAVE_NET_MACB
         select HAVE_AT91_DBGU0
-        select AT91_SAM9G45_RESET
 
 config ARCH_AT91X40
         bool "AT91x40"
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 0df1045311e4..364c19357e60 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -15,6 +15,7 @@
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <asm/system_misc.h>
 #include <mach/at91rm9200.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_st.h>
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 14b5a9c9a514..46f774233298 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -16,6 +16,7 @@
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <asm/system_misc.h>
 #include <mach/cpu.h>
 #include <mach/at91_dbgu.h>
 #include <mach/at91sam9260.h>
@@ -216,6 +217,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("t0_clk", "fffdc000.timer", &tc3_clk),
         CLKDEV_CON_DEV_ID("t1_clk", "fffdc000.timer", &tc4_clk),
         CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk),
+        CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk),
         /* fake hclk clock */
         CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
         CLKDEV_CON_ID("pioA", &pioA_clk),
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 7e5651ee9f85..5652dde4bbe2 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -598,6 +598,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                 else
                         cs_pin = spi1_standard_cs[devices[i].chip_select];
 
+                if (!gpio_is_valid(cs_pin))
+                        continue;
+
                 if (devices[i].bus_num == 0)
                         enable_spi0 = 1;
                 else
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 684c5dfd92ac..7de81e6222f1 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -16,6 +16,7 @@
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <asm/system_misc.h>
 #include <mach/cpu.h>
 #include <mach/at91sam9261.h>
 #include <mach/at91_pmc.h>
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 096da87dc00d..4db961a93085 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -415,6 +415,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                 else
                         cs_pin = spi1_standard_cs[devices[i].chip_select];
 
+                if (!gpio_is_valid(cs_pin))
+                        continue;
+
                 if (devices[i].bus_num == 0)
                         enable_spi0 = 1;
                 else
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 0b4fa5a7f685..ef301be66575 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -16,6 +16,7 @@
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <asm/system_misc.h>
 #include <mach/at91sam9263.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 53688c46f956..fe99206de880 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -72,7 +72,8 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
         /* Enable VBus control for UHP ports */
         for (i = 0; i < data->ports; i++) {
                 if (gpio_is_valid(data->vbus_pin[i]))
-                        at91_set_gpio_output(data->vbus_pin[i], 0);
+                        at91_set_gpio_output(data->vbus_pin[i],
+                                             data->vbus_pin_active_low[i]);
         }
 
         /* Enable overcurrent notification */
@@ -671,6 +672,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                 else
                         cs_pin = spi1_standard_cs[devices[i].chip_select];
 
+                if (!gpio_is_valid(cs_pin))
+                        continue;
+
                 if (devices[i].bus_num == 0)
                         enable_spi0 = 1;
                 else
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 0014573dfe17..d222f8333dab 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -16,6 +16,7 @@
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <asm/system_misc.h>
 #include <mach/at91sam9g45.h>
 #include <mach/at91_pmc.h>
 #include <mach/cpu.h>
@@ -232,6 +233,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
         /* more tc lookup table for DT entries */
         CLKDEV_CON_DEV_ID("t0_clk", "fff7c000.timer", &tcb0_clk),
         CLKDEV_CON_DEV_ID("t0_clk", "fffd4000.timer", &tcb0_clk),
+        CLKDEV_CON_DEV_ID("hclk", "700000.ohci", &uhphs_clk),
+        CLKDEV_CON_DEV_ID("ehci_clk", "800000.ehci", &uhphs_clk),
         /* fake hclk clock */
         CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
         CLKDEV_CON_ID("pioA", &pioA_clk),
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 4320b2096789..6b008aee1dff 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -127,12 +127,13 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data)
         /* Enable VBus control for UHP ports */
         for (i = 0; i < data->ports; i++) {
                 if (gpio_is_valid(data->vbus_pin[i]))
-                        at91_set_gpio_output(data->vbus_pin[i], 0);
+                        at91_set_gpio_output(data->vbus_pin[i],
+                                             data->vbus_pin_active_low[i]);
         }
 
         /* Enable overcurrent notification */
         for (i = 0; i < data->ports; i++) {
-                if (data->overcurrent_pin[i])
+                if (gpio_is_valid(data->overcurrent_pin[i]))
                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
         }
 
@@ -188,7 +189,8 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data)
         /* Enable VBus control for UHP ports */
         for (i = 0; i < data->ports; i++) {
                 if (gpio_is_valid(data->vbus_pin[i]))
-                        at91_set_gpio_output(data->vbus_pin[i], 0);
+                        at91_set_gpio_output(data->vbus_pin[i],
+                                             data->vbus_pin_active_low[i]);
         }
 
         usbh_ehci_data = *data;
@@ -437,7 +439,6 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
 
         /* DMA slave channel configuration */
         atslave->dma_dev = &at_hdmac_device.dev;
-        atslave->reg_width = AT_DMA_SLAVE_WIDTH_32BIT;
         atslave->cfg = ATC_FIFOCFG_HALFFIFO
                         | ATC_SRC_H2SEL_HW | ATC_DST_H2SEL_HW;
         atslave->ctrla = ATC_SCSIZE_16 | ATC_DCSIZE_16;
@@ -786,6 +787,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                 else
                         cs_pin = spi1_standard_cs[devices[i].chip_select];
 
+                if (!gpio_is_valid(cs_pin))
+                        continue;
+
                 if (devices[i].bus_num == 0)
                         enable_spi0 = 1;
                 else
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 63d9372eb18e..d9f2774f385e 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -15,6 +15,7 @@
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <asm/system_misc.h>
 #include <mach/cpu.h>
 #include <mach/at91_dbgu.h>
 #include <mach/at91sam9rl.h>
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index eda72e83037d..fe4ae22e8561 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -419,6 +419,9 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                 else
                         cs_pin = spi_standard_cs[devices[i].chip_select];
 
+                if (!gpio_is_valid(cs_pin))
+                        continue;
+
                 /* enable chip-select pin */
                 at91_set_gpio_output(cs_pin, 1);
 
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index a34d96afa746..13c8cae60462 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -131,7 +131,7 @@ static struct clk dma1_clk = {
         .type           = CLK_TYPE_PERIPHERAL,
 };
 static struct clk uhphs_clk = {
-        .name           = "uhphs_clk",
+        .name           = "uhphs",
         .pmc_mask       = 1 << AT91SAM9X5_ID_UHPHS,
         .type           = CLK_TYPE_PERIPHERAL,
 };
@@ -223,6 +223,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk),
         CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb0_clk),
         CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk),
+        CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma0_clk),
+        CLKDEV_CON_DEV_ID("dma_clk", "ffffee00.dma-controller", &dma1_clk),
         CLKDEV_CON_ID("pioA", &pioAB_clk),
         CLKDEV_CON_ID("pioB", &pioAB_clk),
         CLKDEV_CON_ID("pioC", &pioCD_clk),
@@ -230,6 +232,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
         /* additional fake clock for macb_hclk */
         CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb0_clk),
         CLKDEV_CON_DEV_ID("hclk", "f8030000.ethernet", &macb1_clk),
+        CLKDEV_CON_DEV_ID("hclk", "600000.ohci", &uhphs_clk),
+        CLKDEV_CON_DEV_ID("ohci_clk", "600000.ohci", &uhphs_clk),
+        CLKDEV_CON_DEV_ID("ehci_clk", "700000.ehci", &uhphs_clk),
 };
 
 /*
@@ -299,14 +304,8 @@ static void __init at91sam9x5_map_io(void)
         at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE);
 }
 
-static void __init at91sam9x5_ioremap_registers(void)
-{
-        at91_ioremap_ramc(0, AT91SAM9X5_BASE_DDRSDRC0, 512);
-}
-
 void __init at91sam9x5_initialize(void)
 {
-        arm_pm_restart = at91sam9g45_restart;
         at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0);
 
         /* Register GPIO subsystem (using DT) */
@@ -314,11 +313,6 @@ void __init at91sam9x5_initialize(void)
 }
 
 /* --------------------------------------------------------------------
- *  AT91SAM9x5 devices (temporary before modification of code)
- * -------------------------------------------------------------------- */
-void __init at91_add_device_nand(struct atmel_nand_data *data) {}
-
-/* --------------------------------------------------------------------
  *  Interrupt initialization
  * -------------------------------------------------------------------- */
 /*
@@ -362,7 +356,6 @@ static unsigned int at91sam9x5_default_irq_priority[NR_AIC_IRQS] __initdata = {
 struct at91_init_soc __initdata at91sam9x5_soc = {
         .map_io = at91sam9x5_map_io,
         .default_irq_priority = at91sam9x5_default_irq_priority,
-        .ioremap_registers = at91sam9x5_ioremap_registers,
         .register_clocks = at91sam9x5_register_clocks,
         .init = at91sam9x5_initialize,
 };
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c
index 5400a1d65035..d62fe090d814 100644
--- a/arch/arm/mach-at91/at91x40.c
+++ b/arch/arm/mach-at91/at91x40.c
@@ -14,6 +14,7 @@
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <asm/proc-fns.h>
+#include <asm/system_misc.h>
 #include <asm/mach/arch.h>
 #include <mach/at91x40.h>
 #include <mach/at91_st.h>
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
index 3bb40694b02d..161efbaa1029 100644
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -138,6 +138,7 @@ static struct atmel_nand_data __initdata afeb9260_nand_data = {
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
         .bus_width_16   = 0,
+        .ecc_mode       = NAND_ECC_SOFT,
         .parts          = afeb9260_nand_partition,
         .num_parts      = ARRAY_SIZE(afeb9260_nand_partition),
         .det_pin        = -EINVAL,
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index 8510e9e54988..c6d44ee0c77e 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -140,6 +140,7 @@ static struct atmel_nand_data __initdata cam60_nand_data = {
         .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PA9,
         .enable_pin     = AT91_PIN_PA7,
+        .ecc_mode       = NAND_ECC_SOFT,
         .parts          = cam60_nand_partition,
         .num_parts      = ARRAY_SIZE(cam60_nand_partition),
 };
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
index 989e1c5a9ca0..5f3680e7c883 100644
--- a/arch/arm/mach-at91/board-cpu9krea.c
+++ b/arch/arm/mach-at91/board-cpu9krea.c
@@ -117,6 +117,7 @@ static struct atmel_nand_data __initdata cpu9krea_nand_data = {
         .enable_pin     = AT91_PIN_PC14,
         .bus_width_16   = 0,
         .det_pin        = -EINVAL,
+        .ecc_mode       = NAND_ECC_SOFT,
 };
 
 #ifdef CONFIG_MACH_CPU9260
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c
index 583b72472ad9..c18d4d307801 100644
--- a/arch/arm/mach-at91/board-dt.c
+++ b/arch/arm/mach-at91/board-dt.c
@@ -19,10 +19,7 @@
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 
-#include <mach/hardware.h>
 #include <mach/board.h>
-#include <mach/system_rev.h>
-#include <mach/at91sam9_smc.h>
 
 #include <asm/setup.h>
 #include <asm/irq.h>
@@ -30,58 +27,9 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
-#include "sam9_smc.h"
 #include "generic.h"
 
 
-static void __init ek_init_early(void)
-{
-        /* Initialize processor: 12.000 MHz crystal */
-        at91_initialize(12000000);
-}
-
-/* det_pin is not connected */
-static struct atmel_nand_data __initdata ek_nand_data = {
-        .ale            = 21,
-        .cle            = 22,
-        .det_pin        = -EINVAL,
-        .rdy_pin        = AT91_PIN_PC8,
-        .enable_pin     = AT91_PIN_PC14,
-};
-
-static struct sam9_smc_config __initdata ek_nand_smc_config = {
-        .ncs_read_setup         = 0,
-        .nrd_setup              = 2,
-        .ncs_write_setup        = 0,
-        .nwe_setup              = 2,
-
-        .ncs_read_pulse         = 4,
-        .nrd_pulse              = 4,
-        .ncs_write_pulse        = 4,
-        .nwe_pulse              = 4,
-
-        .read_cycle             = 7,
-        .write_cycle            = 7,
-
-        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
-        .tdf_cycles             = 3,
-};
-
-static void __init ek_add_device_nand(void)
-{
-        ek_nand_data.bus_width_16 = board_have_nand_16bit();
-        /* setup bus-width (8 or 16) */
-        if (ek_nand_data.bus_width_16)
-                ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
-        else
-                ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
-
-        /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(0, 3, &ek_nand_smc_config);
-
-        at91_add_device_nand(&ek_nand_data);
-}
-
 static const struct of_device_id irq_of_match[] __initconst = {
 
         { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
@@ -98,9 +46,6 @@ static void __init at91_dt_init_irq(void)
 static void __init at91_dt_device_init(void)
 {
         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-
-        /* NAND */
-        ek_add_device_nand();
 }
 
 static const char *at91_dt_board_compat[] __initdata = {
@@ -114,7 +59,7 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")
         /* Maintainer: Atmel */
         .timer          = &at91sam926x_timer,
         .map_io         = at91_map_io,
-        .init_early     = ek_init_early,
+        .init_early     = at91_dt_initialize,
         .init_irq       = at91_dt_init_irq,
         .init_machine   = at91_dt_device_init,
         .dt_compat      = at91_dt_board_compat,
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
index bb9914582013..59b92aab9bcf 100644
--- a/arch/arm/mach-at91/board-kb9202.c
+++ b/arch/arm/mach-at91/board-kb9202.c
@@ -108,6 +108,7 @@ static struct atmel_nand_data __initdata kb9202_nand_data = {
         .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PC29,
         .enable_pin     = AT91_PIN_PC28,
+        .ecc_mode       = NAND_ECC_SOFT,
         .parts          = kb9202_nand_partition,
         .num_parts      = ARRAY_SIZE(kb9202_nand_partition),
 };
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
index 3f8617c0e04e..57d5f6a4726a 100644
--- a/arch/arm/mach-at91/board-neocore926.c
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -190,6 +190,7 @@ static struct atmel_nand_data __initdata neocore926_nand_data = {
         .rdy_pin                = AT91_PIN_PB19,
         .rdy_pin_active_low     = 1,
         .enable_pin             = AT91_PIN_PD15,
+        .ecc_mode               = NAND_ECC_SOFT,
         .parts                  = neocore926_nand_partition,
         .num_parts              = ARRAY_SIZE(neocore926_nand_partition),
         .det_pin                = -EINVAL,
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index e029d220cb84..b6ed5ed7081a 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -138,6 +138,8 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
+        .ecc_mode       = NAND_ECC_SOFT,
+        .on_flash_bbt   = 1,
         .parts          = ek_nand_partition,
         .num_parts      = ARRAY_SIZE(ek_nand_partition),
 };
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c
index 9083df04e7ed..01332aa538b2 100644
--- a/arch/arm/mach-at91/board-rm9200dk.c
+++ b/arch/arm/mach-at91/board-rm9200dk.c
@@ -150,6 +150,8 @@ static struct atmel_nand_data __initdata dk_nand_data = {
         .det_pin        = AT91_PIN_PB1,
         .rdy_pin        = AT91_PIN_PC2,
         .enable_pin     = -EINVAL,
+        .ecc_mode       = NAND_ECC_SOFT,
+        .on_flash_bbt   = 1,
         .parts          = dk_nand_partition,
         .num_parts      = ARRAY_SIZE(dk_nand_partition),
 };
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index 84bce587735f..e8b116b6cba6 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -139,6 +139,7 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
+        .ecc_mode       = NAND_ECC_SOFT,
         .parts          = ek_nand_partition,
         .num_parts      = ARRAY_SIZE(ek_nand_partition),
 };
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index be8233bcabdc..d5aec55b0eb4 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -181,6 +181,8 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
+        .ecc_mode       = NAND_ECC_SOFT,
+        .on_flash_bbt   = 1,
         .parts          = ek_nand_partition,
         .num_parts      = ARRAY_SIZE(ek_nand_partition),
 };
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index 40895072a1a7..c3f994462864 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -187,6 +187,8 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PC15,
         .enable_pin     = AT91_PIN_PC14,
+        .ecc_mode       = NAND_ECC_SOFT,
+        .on_flash_bbt   = 1,
         .parts          = ek_nand_partition,
         .num_parts      = ARRAY_SIZE(ek_nand_partition),
 };
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index 29f66052fe63..2ffe50f3a9e9 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -74,6 +74,7 @@ static void __init ek_init_early(void)
 static struct at91_usbh_data __initdata ek_usbh_data = {
         .ports          = 2,
         .vbus_pin       = { AT91_PIN_PA24, AT91_PIN_PA21 },
+        .vbus_pin_active_low = {1, 1},
         .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
@@ -187,6 +188,8 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PA22,
         .enable_pin     = AT91_PIN_PD15,
+        .ecc_mode       = NAND_ECC_SOFT,
+        .on_flash_bbt   = 1,
         .parts          = ek_nand_partition,
         .num_parts      = ARRAY_SIZE(ek_nand_partition),
 };
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index 843d6286c6f4..8923ec9f5831 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -166,6 +166,8 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
         .det_pin        = -EINVAL,
+        .ecc_mode       = NAND_ECC_SOFT,
+        .on_flash_bbt   = 1,
         .parts          = ek_nand_partition,
         .num_parts      = ARRAY_SIZE(ek_nand_partition),
 };
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 57497e2b8878..c88e908ddd82 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -71,6 +71,7 @@ static void __init ek_init_early(void)
 static struct at91_usbh_data __initdata ek_usbh_hs_data = {
         .ports          = 2,
         .vbus_pin       = {AT91_PIN_PD1, AT91_PIN_PD3},
+        .vbus_pin_active_low = {1, 1},
         .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
@@ -148,6 +149,8 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .rdy_pin        = AT91_PIN_PC8,
         .enable_pin     = AT91_PIN_PC14,
         .det_pin        = -EINVAL,
+        .ecc_mode       = NAND_ECC_SOFT,
+        .on_flash_bbt   = 1,
         .parts          = ek_nand_partition,
         .num_parts      = ARRAY_SIZE(ek_nand_partition),
 };
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index c1366d0032bf..b109ce2ba864 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -94,6 +94,8 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PD17,
         .enable_pin     = AT91_PIN_PB6,
+        .ecc_mode       = NAND_ECC_SOFT,
+        .on_flash_bbt   = 1,
         .parts          = ek_nand_partition,
         .num_parts      = ARRAY_SIZE(ek_nand_partition),
 };
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c
index 3c2e3fcc310c..ebc9d01ce742 100644
--- a/arch/arm/mach-at91/board-snapper9260.c
+++ b/arch/arm/mach-at91/board-snapper9260.c
@@ -110,6 +110,7 @@ static struct atmel_nand_data __initdata snapper9260_nand_data = {
         .bus_width_16   = 0,
         .enable_pin     = -EINVAL,
         .det_pin        = -EINVAL,
+        .ecc_mode       = NAND_ECC_SOFT,
 };
 
 static struct sam9_smc_config __initdata snapper9260_nand_smc_config = {
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
index 72eb3b4d9ab6..7640049410a0 100644
--- a/arch/arm/mach-at91/board-stamp9g20.c
+++ b/arch/arm/mach-at91/board-stamp9g20.c
@@ -86,6 +86,7 @@ static struct atmel_nand_data __initdata nand_data = {
         .enable_pin     = AT91_PIN_PC14,
         .bus_width_16   = 0,
         .det_pin        = -EINVAL,
+        .ecc_mode       = NAND_ECC_SOFT,
 };
 
 static struct sam9_smc_config __initdata nand_smc_config = {
diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c
index 26c36fc2d1e5..b7483a3d0980 100644
--- a/arch/arm/mach-at91/board-usb-a926x.c
+++ b/arch/arm/mach-at91/board-usb-a926x.c
@@ -198,6 +198,8 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PA22,
         .enable_pin     = AT91_PIN_PD15,
+        .ecc_mode       = NAND_ECC_SOFT,
+        .on_flash_bbt   = 1,
         .parts          = ek_nand_partition,
         .num_parts      = ARRAY_SIZE(ek_nand_partition),
 };
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index 52f460768f71..38dd279d30b2 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -182,6 +182,7 @@ static struct atmel_nand_data __initdata yl9200_nand_data = {
         .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PC14,        /* R/!B (Sheet10) */
         .enable_pin     = AT91_PIN_PC15,        /* !CE  (Sheet10) */
+        .ecc_mode       = NAND_ECC_SOFT,
         .parts          = yl9200_nand_partition,
         .num_parts      = ARRAY_SIZE(yl9200_nand_partition),
 };
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index be51ca7f694d..a0f4d7424cdc 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -23,6 +23,7 @@
 #include <linux/delay.h>
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/of_address.h>
 
 #include <mach/hardware.h>
 #include <mach/at91_pmc.h>
@@ -671,16 +672,12 @@ static void __init at91_upll_usbfs_clock_init(unsigned long main_clock)
         uhpck.rate_hz /= 1 + ((at91_pmc_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8);
 }
 
-int __init at91_clock_init(unsigned long main_clock)
+static int __init at91_pmc_init(unsigned long main_clock)
 {
         unsigned tmp, freq, mckr;
         int i;
         int pll_overclock = false;
 
-        at91_pmc_base = ioremap(AT91_PMC, 256);
-        if (!at91_pmc_base)
-                panic("Impossible to ioremap AT91_PMC 0x%x\n", AT91_PMC);
-
         /*
          * When the bootloader initialized the main oscillator correctly,
          * there's no problem using the cycle counter.  But if it didn't,
@@ -802,6 +799,55 @@ int __init at91_clock_init(unsigned long main_clock)
         return 0;
 }
 
+#if defined(CONFIG_OF)
+static struct of_device_id pmc_ids[] = {
+        { .compatible = "atmel,at91rm9200-pmc" },
+        { /*sentinel*/ }
+};
+
+static struct of_device_id osc_ids[] = {
+        { .compatible = "atmel,osc" },
+        { /*sentinel*/ }
+};
+
+int __init at91_dt_clock_init(void)
+{
+        struct device_node *np;
+        u32 main_clock = 0;
+
+        np = of_find_matching_node(NULL, pmc_ids);
+        if (!np)
+                panic("unable to find compatible pmc node in dtb\n");
+
+        at91_pmc_base = of_iomap(np, 0);
+        if (!at91_pmc_base)
+                panic("unable to map pmc cpu registers\n");
+
+        of_node_put(np);
+
+        /* retrieve the freqency of fixed clocks from device tree */
+        np = of_find_matching_node(NULL, osc_ids);
+        if (np) {
+                u32 rate;
+                if (!of_property_read_u32(np, "clock-frequency", &rate))
+                        main_clock = rate;
+        }
+
+        of_node_put(np);
+
+        return at91_pmc_init(main_clock);
+}
+#endif
+
+int __init at91_clock_init(unsigned long main_clock)
+{
+        at91_pmc_base = ioremap(AT91_PMC, 256);
+        if (!at91_pmc_base)
+                panic("Impossible to ioremap AT91_PMC 0x%x\n", AT91_PMC);
+
+        return at91_pmc_init(main_clock);
+}
+
 /*
  * Several unused clocks may be active.  Turn them off.
  */
diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c
index 555d956b3a57..ece1f9aefb47 100644
--- a/arch/arm/mach-at91/cpuidle.c
+++ b/arch/arm/mach-at91/cpuidle.c
@@ -17,9 +17,10 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/cpuidle.h>
-#include <asm/proc-fns.h>
 #include <linux/io.h>
 #include <linux/export.h>
+#include <asm/proc-fns.h>
+#include <asm/cpuidle.h>
 
 #include "pm.h"
 
@@ -27,61 +28,39 @@
 
 static DEFINE_PER_CPU(struct cpuidle_device, at91_cpuidle_device);
 
-static struct cpuidle_driver at91_idle_driver = {
-        .name =         "at91_idle",
-        .owner =        THIS_MODULE,
-};
-
 /* Actual code that puts the SoC in different idle states */
 static int at91_enter_idle(struct cpuidle_device *dev,
                         struct cpuidle_driver *drv,
                                int index)
 {
-        struct timeval before, after;
-        int idle_time;
-
-        local_irq_disable();
-        do_gettimeofday(&before);
-        if (index == 0)
-                /* Wait for interrupt state */
-                cpu_do_idle();
-        else if (index == 1)
-                at91_standby();
+        at91_standby();
 
-        do_gettimeofday(&after);
-        local_irq_enable();
-        idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
-                        (after.tv_usec - before.tv_usec);
-
-        dev->last_residency = idle_time;
         return index;
 }
 
+static struct cpuidle_driver at91_idle_driver = {
+        .name                   = "at91_idle",
+        .owner                  = THIS_MODULE,
+        .en_core_tk_irqen       = 1,
+        .states[0]              = ARM_CPUIDLE_WFI_STATE,
+        .states[1]              = {
+                .enter                  = at91_enter_idle,
+                .exit_latency           = 10,
+                .target_residency       = 100000,
+                .flags                  = CPUIDLE_FLAG_TIME_VALID,
+                .name                   = "RAM_SR",
+                .desc                   = "WFI and DDR Self Refresh",
+        },
+        .state_count = AT91_MAX_STATES,
+};
+
 /* Initialize CPU idle by registering the idle states */
 static int at91_init_cpuidle(void)
 {
         struct cpuidle_device *device;
-        struct cpuidle_driver *driver = &at91_idle_driver;
 
         device = &per_cpu(at91_cpuidle_device, smp_processor_id());
         device->state_count = AT91_MAX_STATES;
-        driver->state_count = AT91_MAX_STATES;
-
-        /* Wait for interrupt state */
-        driver->states[0].enter = at91_enter_idle;
-        driver->states[0].exit_latency = 1;
-        driver->states[0].target_residency = 10000;
-        driver->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
-        strcpy(driver->states[0].name, "WFI");
-        strcpy(driver->states[0].desc, "Wait for interrupt");
-
-        /* Wait for interrupt and RAM self refresh state */
-        driver->states[1].enter = at91_enter_idle;
-        driver->states[1].exit_latency = 10;
-        driver->states[1].target_residency = 10000;
-        driver->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
-        strcpy(driver->states[1].name, "RAM_SR");
-        strcpy(driver->states[1].desc, "WFI and RAM Self Refresh");
 
         cpuidle_register_driver(&at91_idle_driver);
 
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 459f01a4a546..dd9b346c451d 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -20,6 +20,7 @@ extern void __init at91_init_sram(int bank, unsigned long base,
 extern void __init at91rm9200_set_type(int type);
 extern void __init at91_initialize(unsigned long main_clock);
 extern void __init at91x40_initialize(unsigned long main_clock);
+extern void __init at91_dt_initialize(void);
 
  /* Interrupts */
 extern void __init at91_init_irq_default(void);
@@ -52,6 +53,7 @@ extern void __init at91sam9rl_set_console_clock(int id);
 extern void __init at91sam9g45_set_console_clock(int id);
 #ifdef CONFIG_AT91_PMC_UNIT
 extern int __init at91_clock_init(unsigned long main_clock);
+extern int __init at91_dt_clock_init(void);
 #else
 static int inline at91_clock_init(unsigned long main_clock) { return 0; }
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91_shdwc.h b/arch/arm/mach-at91/include/mach/at91_shdwc.h
index 1d4fe822c77a..60478ea8bd46 100644
--- a/arch/arm/mach-at91/include/mach/at91_shdwc.h
+++ b/arch/arm/mach-at91/include/mach/at91_shdwc.h
@@ -36,9 +36,11 @@ extern void __iomem *at91_shdwc_base;
 #define                 AT91_SHDW_WKMODE0_HIGH          1
 #define                 AT91_SHDW_WKMODE0_LOW           2
 #define                 AT91_SHDW_WKMODE0_ANYLEVEL      3
-#define         AT91_SHDW_CPTWK0        (0xf << 4)              /* Counter On Wake Up 0 */
+#define         AT91_SHDW_CPTWK0_MAX    0xf                     /* Maximum Counter On Wake Up 0 */
+#define         AT91_SHDW_CPTWK0        (AT91_SHDW_CPTWK0_MAX << 4) /* Counter On Wake Up 0 */
 #define                 AT91_SHDW_CPTWK0_(x)    ((x) << 4)
 #define         AT91_SHDW_RTTWKEN       (1   << 16)             /* Real Time Timer Wake-up Enable */
+#define         AT91_SHDW_RTCWKEN       (1   << 17)             /* Real Time Clock Wake-up Enable */
 
 #define AT91_SHDW_SR            0x08                    /* Shut Down Status Register */
 #define         AT91_SHDW_WAKEUP0       (1 <<  0)               /* Wake-up 0 Status */
diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h b/arch/arm/mach-at91/include/mach/at91sam9x5.h
index a297a77d88e2..88e43d534cdf 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9x5.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9x5.h
@@ -55,11 +55,6 @@
 #define AT91SAM9X5_BASE_USART2  0xf8024000
 
 /*
- * System Peripherals
- */
-#define AT91SAM9X5_BASE_DDRSDRC0        0xffffe800
-
-/*
  * Base addresses for early serial code (uncompress.h)
  */
 #define AT91_DBGU       AT91_BASE_DBGU0
diff --git a/arch/arm/mach-at91/include/mach/at_hdmac.h b/arch/arm/mach-at91/include/mach/at_hdmac.h
index 187cb58345c0..fff48d1a0f4e 100644
--- a/arch/arm/mach-at91/include/mach/at_hdmac.h
+++ b/arch/arm/mach-at91/include/mach/at_hdmac.h
@@ -24,18 +24,6 @@ struct at_dma_platform_data {
 };
 
 /**
- * enum at_dma_slave_width - DMA slave register access width.
- * @AT_DMA_SLAVE_WIDTH_8BIT: Do 8-bit slave register accesses
- * @AT_DMA_SLAVE_WIDTH_16BIT: Do 16-bit slave register accesses
- * @AT_DMA_SLAVE_WIDTH_32BIT: Do 32-bit slave register accesses
- */
-enum at_dma_slave_width {
-        AT_DMA_SLAVE_WIDTH_8BIT = 0,
-        AT_DMA_SLAVE_WIDTH_16BIT,
-        AT_DMA_SLAVE_WIDTH_32BIT,
-};
-
-/**
  * struct at_dma_slave - Controller-specific information about a slave
  * @dma_dev: required DMA master device
  * @tx_reg: physical address of data register used for
@@ -48,9 +36,6 @@ enum at_dma_slave_width {
  */
 struct at_dma_slave {
         struct device           *dma_dev;
-        dma_addr_t              tx_reg;
-        dma_addr_t              rx_reg;
-        enum at_dma_slave_width reg_width;
         u32                     cfg;
         u32                     ctrla;
 };
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index dc8d6d4f17cf..49a821192c65 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -41,6 +41,7 @@
 #include <sound/atmel-ac97c.h>
 #include <linux/serial.h>
 #include <linux/platform_data/macb.h>
+#include <linux/platform_data/atmel.h>
 
  /* USB Device */
 struct at91_udc_data {
@@ -85,33 +86,20 @@ extern void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *d
 extern void __init at91_add_device_eth(struct macb_platform_data *data);
 
  /* USB Host */
+#define AT91_MAX_USBH_PORTS     3
 struct at91_usbh_data {
-        u8              ports;          /* number of ports on root hub */
-        int             vbus_pin[2];    /* port power-control pin */
-        u8              vbus_pin_active_low[2];
+        int             vbus_pin[AT91_MAX_USBH_PORTS];  /* port power-control pin */
+        int             overcurrent_pin[AT91_MAX_USBH_PORTS];
+        u8              ports;                          /* number of ports on root hub */
         u8              overcurrent_supported;
-        int             overcurrent_pin[2];
-        u8              overcurrent_status[2];
-        u8              overcurrent_changed[2];
+        u8              vbus_pin_active_low[AT91_MAX_USBH_PORTS];
+        u8              overcurrent_status[AT91_MAX_USBH_PORTS];
+        u8              overcurrent_changed[AT91_MAX_USBH_PORTS];
 };
 extern void __init at91_add_device_usbh(struct at91_usbh_data *data);
 extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data);
 extern void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data);
 
- /* NAND / SmartMedia */
-struct atmel_nand_data {
-        int             enable_pin;     /* chip enable */
-        int             det_pin;        /* card detect */
-        int             rdy_pin;        /* ready/busy */
-        u8              rdy_pin_active_low;     /* rdy_pin value is inverted */
-        u8              ale;            /* address line number connected to ALE */
-        u8              cle;            /* address line number connected to CLE */
-        u8              bus_width_16;   /* buswidth is 16 bit */
-        u8              correction_cap; /* PMECC correction capability */
-        u16             sector_size;    /* Sector size for PMECC */
-        struct mtd_partition *parts;
-        unsigned int    num_parts;
-};
 extern void __init at91_add_device_nand(struct atmel_nand_data *data);
 
  /* I2C*/
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
index 4003001eca3d..2d9ca0455745 100644
--- a/arch/arm/mach-at91/include/mach/io.h
+++ b/arch/arm/mach-at91/include/mach/io.h
@@ -21,11 +21,7 @@
 #ifndef __ASM_ARCH_IO_H
 #define __ASM_ARCH_IO_H
 
-#include <mach/hardware.h>
-
 #define IO_SPACE_LIMIT          0xFFFFFFFF
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
+#define __io(a)                 __typesafe_io(a)
 
 #endif
diff --git a/arch/arm/mach-at91/include/mach/system_rev.h b/arch/arm/mach-at91/include/mach/system_rev.h
index ec164a4124c9..ef79a9aafc08 100644
--- a/arch/arm/mach-at91/include/mach/system_rev.h
+++ b/arch/arm/mach-at91/include/mach/system_rev.h
@@ -7,6 +7,8 @@
 #ifndef __ARCH_SYSTEM_REV_H__
 #define __ARCH_SYSTEM_REV_H__
 
+#include <asm/system_info.h>
+
 /*
  * board revision encoding
  * mach specific
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
index 0234fd9d20d6..4218647c1fcd 100644
--- a/arch/arm/mach-at91/include/mach/uncompress.h
+++ b/arch/arm/mach-at91/include/mach/uncompress.h
@@ -23,6 +23,7 @@
 
 #include <linux/io.h>
 #include <linux/atmel_serial.h>
+#include <mach/hardware.h>
 
 #if defined(CONFIG_AT91_EARLY_DBGU0)
 #define UART_OFFSET AT91_BASE_DBGU0
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 6c9d5e69ac28..f630250c6b87 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -197,19 +197,6 @@ extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0,
 extern u32 at91_slow_clock_sz;
 #endif
 
-void __iomem *at91_ramc_base[2];
-
-void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
-{
-        if (id < 0 || id > 1) {
-                pr_emerg("Wrong RAM controller id (%d), cannot continue\n", id);
-                BUG();
-        }
-        at91_ramc_base[id] = ioremap(addr, size);
-        if (!at91_ramc_base[id])
-                panic("Impossible to ioremap ramc.%d 0x%x\n", id, addr);
-}
-
 static int at91_pm_enter(suspend_state_t state)
 {
         at91_gpio_suspend();
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 372396c2ecb6..97cc04dc8073 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -9,7 +9,9 @@
 #include <linux/io.h>
 #include <linux/mm.h>
 #include <linux/pm.h>
+#include <linux/of_address.h>
 
+#include <asm/system_misc.h>
 #include <asm/mach/map.h>
 
 #include <mach/hardware.h>
@@ -51,6 +53,19 @@ void __init at91_init_interrupts(unsigned int *priority)
         at91_gpio_irq_setup();
 }
 
+void __iomem *at91_ramc_base[2];
+
+void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
+{
+        if (id < 0 || id > 1) {
+                pr_emerg("Wrong RAM controller id (%d), cannot continue\n", id);
+                BUG();
+        }
+        at91_ramc_base[id] = ioremap(addr, size);
+        if (!at91_ramc_base[id])
+                panic("Impossible to ioremap ramc.%d 0x%x\n", id, addr);
+}
+
 static struct map_desc sram_desc[2] __initdata;
 
 void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
@@ -285,6 +300,150 @@ void __init at91_ioremap_matrix(u32 base_addr)
                 panic("Impossible to ioremap at91_matrix_base\n");
 }
 
+#if defined(CONFIG_OF)
+static struct of_device_id rstc_ids[] = {
+        { .compatible = "atmel,at91sam9260-rstc", .data = at91sam9_alt_restart },
+        { .compatible = "atmel,at91sam9g45-rstc", .data = at91sam9g45_restart },
+        { /*sentinel*/ }
+};
+
+static void at91_dt_rstc(void)
+{
+        struct device_node *np;
+        const struct of_device_id *of_id;
+
+        np = of_find_matching_node(NULL, rstc_ids);
+        if (!np)
+                panic("unable to find compatible rstc node in dtb\n");
+
+        at91_rstc_base = of_iomap(np, 0);
+        if (!at91_rstc_base)
+                panic("unable to map rstc cpu registers\n");
+
+        of_id = of_match_node(rstc_ids, np);
+        if (!of_id)
+                panic("AT91: rtsc no restart function availlable\n");
+
+        arm_pm_restart = of_id->data;
+
+        of_node_put(np);
+}
+
+static struct of_device_id ramc_ids[] = {
+        { .compatible = "atmel,at91sam9260-sdramc" },
+        { .compatible = "atmel,at91sam9g45-ddramc" },
+        { /*sentinel*/ }
+};
+
+static void at91_dt_ramc(void)
+{
+        struct device_node *np;
+
+        np = of_find_matching_node(NULL, ramc_ids);
+        if (!np)
+                panic("unable to find compatible ram conroller node in dtb\n");
+
+        at91_ramc_base[0] = of_iomap(np, 0);
+        if (!at91_ramc_base[0])
+                panic("unable to map ramc[0] cpu registers\n");
+        /* the controller may have 2 banks */
+        at91_ramc_base[1] = of_iomap(np, 1);
+
+        of_node_put(np);
+}
+
+static struct of_device_id shdwc_ids[] = {
+        { .compatible = "atmel,at91sam9260-shdwc", },
+        { .compatible = "atmel,at91sam9rl-shdwc", },
+        { .compatible = "atmel,at91sam9x5-shdwc", },
+        { /*sentinel*/ }
+};
+
+static const char *shdwc_wakeup_modes[] = {
+        [AT91_SHDW_WKMODE0_NONE]        = "none",
+        [AT91_SHDW_WKMODE0_HIGH]        = "high",
+        [AT91_SHDW_WKMODE0_LOW]         = "low",
+        [AT91_SHDW_WKMODE0_ANYLEVEL]    = "any",
+};
+
+const int at91_dtget_shdwc_wakeup_mode(struct device_node *np)
+{
+        const char *pm;
+        int err, i;
+
+        err = of_property_read_string(np, "atmel,wakeup-mode", &pm);
+        if (err < 0)
+                return AT91_SHDW_WKMODE0_ANYLEVEL;
+
+        for (i = 0; i < ARRAY_SIZE(shdwc_wakeup_modes); i++)
+                if (!strcasecmp(pm, shdwc_wakeup_modes[i]))
+                        return i;
+
+        return -ENODEV;
+}
+
+static void at91_dt_shdwc(void)
+{
+        struct device_node *np;
+        int wakeup_mode;
+        u32 reg;
+        u32 mode = 0;
+
+        np = of_find_matching_node(NULL, shdwc_ids);
+        if (!np) {
+                pr_debug("AT91: unable to find compatible shutdown (shdwc) conroller node in dtb\n");
+                return;
+        }
+
+        at91_shdwc_base = of_iomap(np, 0);
+        if (!at91_shdwc_base)
+                panic("AT91: unable to map shdwc cpu registers\n");
+
+        wakeup_mode = at91_dtget_shdwc_wakeup_mode(np);
+        if (wakeup_mode < 0) {
+                pr_warn("AT91: shdwc unknown wakeup mode\n");
+                goto end;
+        }
+
+        if (!of_property_read_u32(np, "atmel,wakeup-counter", &reg)) {
+                if (reg > AT91_SHDW_CPTWK0_MAX) {
+                        pr_warn("AT91: shdwc wakeup conter 0x%x > 0x%x reduce it to 0x%x\n",
+                                reg, AT91_SHDW_CPTWK0_MAX, AT91_SHDW_CPTWK0_MAX);
+                        reg = AT91_SHDW_CPTWK0_MAX;
+                }
+                mode |= AT91_SHDW_CPTWK0_(reg);
+        }
+
+        if (of_property_read_bool(np, "atmel,wakeup-rtc-timer"))
+                        mode |= AT91_SHDW_RTCWKEN;
+
+        if (of_property_read_bool(np, "atmel,wakeup-rtt-timer"))
+                        mode |= AT91_SHDW_RTTWKEN;
+
+        at91_shdwc_write(AT91_SHDW_MR, wakeup_mode | mode);
+
+end:
+        pm_power_off = at91sam9_poweroff;
+
+        of_node_put(np);
+}
+
+void __init at91_dt_initialize(void)
+{
+        at91_dt_rstc();
+        at91_dt_ramc();
+        at91_dt_shdwc();
+
+        /* Init clock subsystem */
+        at91_dt_clock_init();
+
+        /* Register the processor-specific clocks */
+        at91_boot_soc.register_clocks();
+
+        at91_boot_soc.init();
+}
+#endif
+
 void __init at91_initialize(unsigned long main_clock)
 {
         at91_boot_soc.ioremap_registers();
diff --git a/arch/arm/mach-bcmring/include/mach/io.h b/arch/arm/mach-bcmring/include/mach/io.h
deleted file mode 100644
index dae5e9b166ea..000000000000
--- a/arch/arm/mach-bcmring/include/mach/io.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- *
- *  Copyright (C) 1999 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#include <mach/hardware.h>
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We don't actually have real ISA nor PCI buses, but there is so many
- * drivers out there that might just work if we fake them...
- */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c
index 8736c1acc166..3c5b5bbf24e5 100644
--- a/arch/arm/mach-clps711x/common.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -37,6 +37,7 @@
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
 #include <asm/hardware/clps7111.h>
+#include <asm/system_misc.h>
 
 /*
  * This maps the generic CLPS711x registers
diff --git a/arch/arm/mach-clps711x/edb7211-mm.c b/arch/arm/mach-clps711x/edb7211-mm.c
index 0bea1454ae03..4372f06c9929 100644
--- a/arch/arm/mach-clps711x/edb7211-mm.c
+++ b/arch/arm/mach-clps711x/edb7211-mm.c
@@ -21,6 +21,7 @@
  */
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/bug.h>
 
 #include <mach/hardware.h>
 #include <asm/page.h>
diff --git a/arch/arm/mach-clps711x/include/mach/io.h b/arch/arm/mach-clps711x/include/mach/io.h
deleted file mode 100644
index 2e0b3ced8f07..000000000000
--- a/arch/arm/mach-clps711x/include/mach/io.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- *  arch/arm/mach-clps711x/include/mach/io.h
- *
- *  Copyright (C) 1999 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-/*
- * We don't support ins[lb]/outs[lb].  Make them fault.
- */
-#define __raw_readsb(p,d,l)     do { *(int *)0 = 0; } while (0)
-#define __raw_readsl(p,d,l)     do { *(int *)0 = 0; } while (0)
-#define __raw_writesb(p,d,l)    do { *(int *)0 = 0; } while (0)
-#define __raw_writesl(p,d,l)    do { *(int *)0 = 0; } while (0)
-
-#endif
diff --git a/arch/arm/mach-clps711x/include/mach/uncompress.h b/arch/arm/mach-clps711x/include/mach/uncompress.h
index 7164310dea7c..35ed731b9f16 100644
--- a/arch/arm/mach-clps711x/include/mach/uncompress.h
+++ b/arch/arm/mach-clps711x/include/mach/uncompress.h
@@ -17,7 +17,6 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
-#include <mach/io.h>
 #include <mach/hardware.h>
 #include <asm/hardware/clps7111.h>
 
diff --git a/arch/arm/mach-clps711x/p720t-leds.c b/arch/arm/mach-clps711x/p720t-leds.c
index 15121446efc8..dd9a6cdbeb02 100644
--- a/arch/arm/mach-clps711x/p720t-leds.c
+++ b/arch/arm/mach-clps711x/p720t-leds.c
@@ -25,7 +25,6 @@
 
 #include <mach/hardware.h>
 #include <asm/leds.h>
-#include <asm/system.h>
 #include <asm/mach-types.h>
 
 #include <asm/hardware/clps7111.h>
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c
index 941a308e1253..031805b1428d 100644
--- a/arch/arm/mach-cns3xxx/core.c
+++ b/arch/arm/mach-cns3xxx/core.c
@@ -72,13 +72,13 @@ void __init cns3xxx_map_io(void)
 /* used by entry-macro.S */
 void __init cns3xxx_init_irq(void)
 {
-        gic_init(0, 29, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT),
-                 __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT));
+        gic_init(0, 29, IOMEM(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT),
+                 IOMEM(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT));
 }
 
 void cns3xxx_power_off(void)
 {
-        u32 __iomem *pm_base = __io(CNS3XXX_PM_BASE_VIRT);
+        u32 __iomem *pm_base = IOMEM(CNS3XXX_PM_BASE_VIRT);
         u32 clkctrl;
 
         printk(KERN_INFO "powering system down...\n");
@@ -237,7 +237,7 @@ static void __init __cns3xxx_timer_init(unsigned int timer_irq)
 
 static void __init cns3xxx_timer_init(void)
 {
-        cns3xxx_tmr1 = __io(CNS3XXX_TIMER1_2_3_BASE_VIRT);
+        cns3xxx_tmr1 = IOMEM(CNS3XXX_TIMER1_2_3_BASE_VIRT);
 
         __cns3xxx_timer_init(IRQ_CNS3XXX_TIMER0);
 }
diff --git a/arch/arm/mach-cns3xxx/devices.c b/arch/arm/mach-cns3xxx/devices.c
index 79d1fb02c23f..1e40c99b015f 100644
--- a/arch/arm/mach-cns3xxx/devices.c
+++ b/arch/arm/mach-cns3xxx/devices.c
@@ -98,7 +98,7 @@ static struct platform_device cns3xxx_sdhci_pdev = {
 
 void __init cns3xxx_sdhci_init(void)
 {
-        u32 __iomem *gpioa = __io(CNS3XXX_MISC_BASE_VIRT + 0x0014);
+        u32 __iomem *gpioa = IOMEM(CNS3XXX_MISC_BASE_VIRT + 0x0014);
         u32 gpioa_pins = __raw_readl(gpioa);
 
         /* MMC/SD pins share with GPIOA */
diff --git a/arch/arm/mach-cns3xxx/include/mach/io.h b/arch/arm/mach-cns3xxx/include/mach/io.h
deleted file mode 100644
index 33b6fc1ece7c..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/io.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * Copyright 2008 Cavium Networks
- * Copyright 2003 ARM Limited
- *
- * This file is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, Version 2, as
- * published by the Free Software Foundation.
- */
-#ifndef __MACH_IO_H
-#define __MACH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a)                 __typesafe_io(a)
-#define __mem_pci(a)            (a)
-
-#endif
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index d5088900af6c..a70de24d1cbc 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -36,6 +36,7 @@
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/system_info.h>
 
 #include <mach/cp_intc.h>
 #include <mach/da8xx.h>
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 864f676eccac..3683306e0245 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -613,6 +613,113 @@ static void __init evm_init_i2c(void)
         i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
 }
 
+#define VENC_STD_ALL    (V4L2_STD_NTSC | V4L2_STD_PAL)
+
+/* venc standard timings */
+static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
+        {
+                .name           = "ntsc",
+                .timings_type   = VPBE_ENC_STD,
+                .timings        = {V4L2_STD_525_60},
+                .interlaced     = 1,
+                .xres           = 720,
+                .yres           = 480,
+                .aspect         = {11, 10},
+                .fps            = {30000, 1001},
+                .left_margin    = 0x79,
+                .upper_margin   = 0x10,
+        },
+        {
+                .name           = "pal",
+                .timings_type   = VPBE_ENC_STD,
+                .timings        = {V4L2_STD_625_50},
+                .interlaced     = 1,
+                .xres           = 720,
+                .yres           = 576,
+                .aspect         = {54, 59},
+                .fps            = {25, 1},
+                .left_margin    = 0x7e,
+                .upper_margin   = 0x16,
+        },
+};
+
+/* venc dv preset timings */
+static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
+        {
+                .name           = "480p59_94",
+                .timings_type   = VPBE_ENC_DV_PRESET,
+                .timings        = {V4L2_DV_480P59_94},
+                .interlaced     = 0,
+                .xres           = 720,
+                .yres           = 480,
+                .aspect         = {1, 1},
+                .fps            = {5994, 100},
+                .left_margin    = 0x80,
+                .upper_margin   = 0x20,
+        },
+        {
+                .name           = "576p50",
+                .timings_type   = VPBE_ENC_DV_PRESET,
+                .timings        = {V4L2_DV_576P50},
+                .interlaced     = 0,
+                .xres           = 720,
+                .yres           = 576,
+                .aspect         = {1, 1},
+                .fps            = {50, 1},
+                .left_margin    = 0x7e,
+                .upper_margin   = 0x30,
+        },
+};
+
+/*
+ * The outputs available from VPBE + encoders. Keep the order same
+ * as that of encoders. First those from venc followed by that from
+ * encoders. Index in the output refers to index on a particular encoder.
+ * Driver uses this index to pass it to encoder when it supports more
+ * than one output. Userspace applications use index of the array to
+ * set an output.
+ */
+static struct vpbe_output dm644xevm_vpbe_outputs[] = {
+        {
+                .output         = {
+                        .index          = 0,
+                        .name           = "Composite",
+                        .type           = V4L2_OUTPUT_TYPE_ANALOG,
+                        .std            = VENC_STD_ALL,
+                        .capabilities   = V4L2_OUT_CAP_STD,
+                },
+                .subdev_name    = VPBE_VENC_SUBDEV_NAME,
+                .default_mode   = "ntsc",
+                .num_modes      = ARRAY_SIZE(dm644xevm_enc_std_timing),
+                .modes          = dm644xevm_enc_std_timing,
+        },
+        {
+                .output         = {
+                        .index          = 1,
+                        .name           = "Component",
+                        .type           = V4L2_OUTPUT_TYPE_ANALOG,
+                        .capabilities   = V4L2_OUT_CAP_PRESETS,
+                },
+                .subdev_name    = VPBE_VENC_SUBDEV_NAME,
+                .default_mode   = "480p59_94",
+                .num_modes      = ARRAY_SIZE(dm644xevm_enc_preset_timing),
+                .modes          = dm644xevm_enc_preset_timing,
+        },
+};
+
+static struct vpbe_config dm644xevm_display_cfg = {
+        .module_name    = "dm644x-vpbe-display",
+        .i2c_adapter_id = 1,
+        .osd            = {
+                .module_name    = VPBE_OSD_SUBDEV_NAME,
+        },
+        .venc           = {
+                .module_name    = VPBE_VENC_SUBDEV_NAME,
+        },
+        .num_outputs    = ARRAY_SIZE(dm644xevm_vpbe_outputs),
+        .outputs        = dm644xevm_vpbe_outputs,
+};
+
 static struct platform_device *davinci_evm_devices[] __initdata = {
         &davinci_fb_device,
         &rtc_dev,
@@ -696,7 +803,7 @@ static __init void davinci_evm_init(void)
         evm_init_i2c();
 
         davinci_setup_mmc(0, &dm6446evm_mmc_config);
-        dm644x_init_video(&dm644xevm_capture_cfg);
+        dm644x_init_video(&dm644xevm_capture_cfg, &dm644xevm_display_cfg);
 
         davinci_serial_init(&uart_config);
         dm644x_init_asp(&dm644x_evm_snd_data);
diff --git a/arch/arm/mach-davinci/cpuidle.c b/arch/arm/mach-davinci/cpuidle.c
index a30c7c5a6d83..9107691adbdb 100644
--- a/arch/arm/mach-davinci/cpuidle.c
+++ b/arch/arm/mach-davinci/cpuidle.c
@@ -18,6 +18,7 @@
 #include <linux/io.h>
 #include <linux/export.h>
 #include <asm/proc-fns.h>
+#include <asm/cpuidle.h>
 
 #include <mach/cpuidle.h>
 #include <mach/ddr2.h>
@@ -30,12 +31,43 @@ struct davinci_ops {
         u32 flags;
 };
 
+/* Actual code that puts the SoC in different idle states */
+static int davinci_enter_idle(struct cpuidle_device *dev,
+                                struct cpuidle_driver *drv,
+                                                int index)
+{
+        struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
+        struct davinci_ops *ops = cpuidle_get_statedata(state_usage);
+
+        if (ops && ops->enter)
+                ops->enter(ops->flags);
+
+        index = cpuidle_wrap_enter(dev, drv, index,
+                                arm_cpuidle_simple_enter);
+
+        if (ops && ops->exit)
+                ops->exit(ops->flags);
+
+        return index;
+}
+
 /* fields in davinci_ops.flags */
 #define DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN BIT(0)
 
 static struct cpuidle_driver davinci_idle_driver = {
-        .name   = "cpuidle-davinci",
-        .owner  = THIS_MODULE,
+        .name                   = "cpuidle-davinci",
+        .owner                  = THIS_MODULE,
+        .en_core_tk_irqen       = 1,
+        .states[0]              = ARM_CPUIDLE_WFI_STATE,
+        .states[1]              = {
+                .enter                  = davinci_enter_idle,
+                .exit_latency           = 10,
+                .target_residency       = 100000,
+                .flags                  = CPUIDLE_FLAG_TIME_VALID,
+                .name                   = "DDR SR",
+                .desc                   = "WFI and DDR Self Refresh",
+        },
+        .state_count = DAVINCI_CPUIDLE_MAX_STATES,
 };
 
 static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device);
@@ -77,41 +109,10 @@ static struct davinci_ops davinci_states[DAVINCI_CPUIDLE_MAX_STATES] = {
         },
 };
 
-/* Actual code that puts the SoC in different idle states */
-static int davinci_enter_idle(struct cpuidle_device *dev,
-                                struct cpuidle_driver *drv,
-                                                int index)
-{
-        struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
-        struct davinci_ops *ops = cpuidle_get_statedata(state_usage);
-        struct timeval before, after;
-        int idle_time;
-
-        local_irq_disable();
-        do_gettimeofday(&before);
-
-        if (ops && ops->enter)
-                ops->enter(ops->flags);
-        /* Wait for interrupt state */
-        cpu_do_idle();
-        if (ops && ops->exit)
-                ops->exit(ops->flags);
-
-        do_gettimeofday(&after);
-        local_irq_enable();
-        idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
-                        (after.tv_usec - before.tv_usec);
-
-        dev->last_residency = idle_time;
-
-        return index;
-}
-
 static int __init davinci_cpuidle_probe(struct platform_device *pdev)
 {
         int ret;
         struct cpuidle_device *device;
-        struct cpuidle_driver *driver = &davinci_idle_driver;
         struct davinci_cpuidle_config *pdata = pdev->dev.platform_data;
 
         device = &per_cpu(davinci_cpuidle_device, smp_processor_id());
@@ -123,27 +124,11 @@ static int __init davinci_cpuidle_probe(struct platform_device *pdev)
 
         ddr2_reg_base = pdata->ddr2_ctlr_base;
 
-        /* Wait for interrupt state */
-        driver->states[0].enter = davinci_enter_idle;
-        driver->states[0].exit_latency = 1;
-        driver->states[0].target_residency = 10000;
-        driver->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
-        strcpy(driver->states[0].name, "WFI");
-        strcpy(driver->states[0].desc, "Wait for interrupt");
-
-        /* Wait for interrupt and DDR self refresh state */
-        driver->states[1].enter = davinci_enter_idle;
-        driver->states[1].exit_latency = 10;
-        driver->states[1].target_residency = 10000;
-        driver->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
-        strcpy(driver->states[1].name, "DDR SR");
-        strcpy(driver->states[1].desc, "WFI and DDR Self Refresh");
         if (pdata->ddr2_pdown)
                 davinci_states[1].flags |= DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN;
         cpuidle_set_statedata(&device->states_usage[1], &davinci_states[1]);
 
         device->state_count = DAVINCI_CPUIDLE_MAX_STATES;
-        driver->state_count = DAVINCI_CPUIDLE_MAX_STATES;
 
         ret = cpuidle_register_driver(&davinci_idle_driver);
         if (ret) {
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index 9d708034b57f..3e519dad5bb9 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -29,9 +29,15 @@
 
 #include <media/davinci/vpfe_capture.h>
 #include <media/davinci/vpif_types.h>
+#include <media/davinci/vpss.h>
+#include <media/davinci/vpbe_types.h>
+#include <media/davinci/vpbe_venc.h>
+#include <media/davinci/vpbe.h>
+#include <media/davinci/vpbe_osd.h>
 
 #define DAVINCI_SYSTEM_MODULE_BASE      0x01c40000
 #define SYSMOD_VIDCLKCTL                0x38
+#define SYSMOD_VPSS_CLKCTL              0x44
 #define SYSMOD_VDD3P3VPWDN              0x48
 #define SYSMOD_VSCLKDIS                 0x6c
 #define SYSMOD_PUPDCTL1                 0x7c
@@ -83,7 +89,7 @@ void dm365_set_vpfe_config(struct vpfe_config *cfg);
 /* DM644x function declarations */
 void __init dm644x_init(void);
 void __init dm644x_init_asp(struct snd_platform_data *pdata);
-int __init dm644x_init_video(struct vpfe_config *);
+int __init dm644x_init_video(struct vpfe_config *, struct vpbe_config *);
 
 /* DM646x function declarations */
 void __init dm646x_init(void);
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 23e81cafba8d..c8b866657fcb 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -627,7 +627,7 @@ static struct resource dm644x_vpfe_resources[] = {
         },
 };
 
-static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
+static u64 dm644x_video_dma_mask = DMA_BIT_MASK(32);
 static struct resource dm644x_ccdc_resource[] = {
         /* CCDC Base address */
         {
@@ -643,7 +643,7 @@ static struct platform_device dm644x_ccdc_dev = {
         .num_resources  = ARRAY_SIZE(dm644x_ccdc_resource),
         .resource       = dm644x_ccdc_resource,
         .dev = {
-                .dma_mask               = &vpfe_capture_dma_mask,
+                .dma_mask               = &dm644x_video_dma_mask,
                 .coherent_dma_mask      = DMA_BIT_MASK(32),
         },
 };
@@ -654,7 +654,134 @@ static struct platform_device dm644x_vpfe_dev = {
         .num_resources  = ARRAY_SIZE(dm644x_vpfe_resources),
         .resource       = dm644x_vpfe_resources,
         .dev = {
-                .dma_mask               = &vpfe_capture_dma_mask,
+                .dma_mask               = &dm644x_video_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+};
+
+#define DM644X_OSD_BASE         0x01c72600
+
+static struct resource dm644x_osd_resources[] = {
+        {
+                .start  = DM644X_OSD_BASE,
+                .end    = DM644X_OSD_BASE + 0x1ff,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct osd_platform_data dm644x_osd_data = {
+        .vpbe_type     = VPBE_VERSION_1,
+};
+
+static struct platform_device dm644x_osd_dev = {
+        .name           = VPBE_OSD_SUBDEV_NAME,
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(dm644x_osd_resources),
+        .resource       = dm644x_osd_resources,
+        .dev            = {
+                .dma_mask               = &dm644x_video_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                .platform_data          = &dm644x_osd_data,
+        },
+};
+
+#define DM644X_VENC_BASE                0x01c72400
+
+static struct resource dm644x_venc_resources[] = {
+        {
+                .start  = DM644X_VENC_BASE,
+                .end    = DM644X_VENC_BASE + 0x17f,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+#define DM644X_VPSS_MUXSEL_PLL2_MODE          BIT(0)
+#define DM644X_VPSS_MUXSEL_VPBECLK_MODE       BIT(1)
+#define DM644X_VPSS_VENCLKEN                  BIT(3)
+#define DM644X_VPSS_DACCLKEN                  BIT(4)
+
+static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
+                                   unsigned int mode)
+{
+        int ret = 0;
+        u32 v = DM644X_VPSS_VENCLKEN;
+
+        switch (type) {
+        case VPBE_ENC_STD:
+                v |= DM644X_VPSS_DACCLKEN;
+                writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
+                break;
+        case VPBE_ENC_DV_PRESET:
+                switch (mode) {
+                case V4L2_DV_480P59_94:
+                case V4L2_DV_576P50:
+                        v |= DM644X_VPSS_MUXSEL_PLL2_MODE |
+                             DM644X_VPSS_DACCLKEN;
+                        writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
+                        break;
+                case V4L2_DV_720P60:
+                case V4L2_DV_1080I60:
+                case V4L2_DV_1080P30:
+                        /*
+                         * For HD, use external clock source since
+                         * HD requires higher clock rate
+                         */
+                        v |= DM644X_VPSS_MUXSEL_VPBECLK_MODE;
+                        writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
+                        break;
+                default:
+                        ret = -EINVAL;
+                        break;
+                }
+                break;
+        default:
+                ret  = -EINVAL;
+        }
+
+        return ret;
+}
+
+static struct resource dm644x_v4l2_disp_resources[] = {
+        {
+                .start  = IRQ_VENCINT,
+                .end    = IRQ_VENCINT,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device dm644x_vpbe_display = {
+        .name           = "vpbe-v4l2",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(dm644x_v4l2_disp_resources),
+        .resource       = dm644x_v4l2_disp_resources,
+        .dev            = {
+                .dma_mask               = &dm644x_video_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+};
+
+static struct venc_platform_data dm644x_venc_pdata = {
+        .venc_type      = VPBE_VERSION_1,
+        .setup_clock    = dm644x_venc_setup_clock,
+};
+
+static struct platform_device dm644x_venc_dev = {
+        .name           = VPBE_VENC_SUBDEV_NAME,
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(dm644x_venc_resources),
+        .resource       = dm644x_venc_resources,
+        .dev            = {
+                .dma_mask               = &dm644x_video_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                .platform_data          = &dm644x_venc_pdata,
+        },
+};
+
+static struct platform_device dm644x_vpbe_dev = {
+        .name           = "vpbe_controller",
+        .id             = -1,
+        .dev            = {
+                .dma_mask               = &dm644x_video_dma_mask,
                 .coherent_dma_mask      = DMA_BIT_MASK(32),
         },
 };
@@ -786,17 +913,30 @@ void __init dm644x_init(void)
         davinci_map_sysmod();
 }
 
-int __init dm644x_init_video(struct vpfe_config *vpfe_cfg)
+int __init dm644x_init_video(struct vpfe_config *vpfe_cfg,
+                                struct vpbe_config *vpbe_cfg)
 {
-        dm644x_vpfe_dev.dev.platform_data = vpfe_cfg;
-
-        /* Add ccdc clock aliases */
-        clk_add_alias("master", dm644x_ccdc_dev.name, "vpss_master", NULL);
-        clk_add_alias("slave", dm644x_ccdc_dev.name, "vpss_slave", NULL);
-
-        platform_device_register(&dm644x_vpss_device);
-        platform_device_register(&dm644x_ccdc_dev);
-        platform_device_register(&dm644x_vpfe_dev);
+        if (vpfe_cfg || vpbe_cfg)
+                platform_device_register(&dm644x_vpss_device);
+
+        if (vpfe_cfg) {
+                dm644x_vpfe_dev.dev.platform_data = vpfe_cfg;
+                platform_device_register(&dm644x_ccdc_dev);
+                platform_device_register(&dm644x_vpfe_dev);
+                /* Add ccdc clock aliases */
+                clk_add_alias("master", dm644x_ccdc_dev.name,
+                              "vpss_master", NULL);
+                clk_add_alias("slave", dm644x_ccdc_dev.name,
+                              "vpss_slave", NULL);
+        }
+
+        if (vpbe_cfg) {
+                dm644x_vpbe_dev.dev.platform_data = vpbe_cfg;
+                platform_device_register(&dm644x_osd_dev);
+                platform_device_register(&dm644x_venc_dev);
+                platform_device_register(&dm644x_vpbe_dev);
+                platform_device_register(&dm644x_vpbe_display);
+        }
 
         return 0;
 }
diff --git a/arch/arm/mach-davinci/include/mach/entry-macro.S b/arch/arm/mach-davinci/include/mach/entry-macro.S
index c1661d2feca9..768b3c060214 100644
--- a/arch/arm/mach-davinci/include/mach/entry-macro.S
+++ b/arch/arm/mach-davinci/include/mach/entry-macro.S
@@ -8,7 +8,6 @@
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
  */
-#include <mach/io.h>
 #include <mach/irqs.h>
 
                 .macro  get_irqnr_preamble, base, tmp
diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h
index 0209b1fc22a1..2184691ebc2f 100644
--- a/arch/arm/mach-davinci/include/mach/hardware.h
+++ b/arch/arm/mach-davinci/include/mach/hardware.h
@@ -30,10 +30,4 @@
 #define __IO_ADDRESS(x)                 ((x) + IO_OFFSET)
 #define IO_ADDRESS(pa)                  IOMEM(__IO_ADDRESS(pa))
 
-#ifdef __ASSEMBLER__
-#define IOMEM(x)                        x
-#else
-#define IOMEM(x)                        ((void __force __iomem *)(x))
-#endif
-
 #endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h
deleted file mode 100644
index b2267d1e1a71..000000000000
--- a/arch/arm/mach-davinci/include/mach/io.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * DaVinci IO address definitions
- *
- * Copied from include/asm/arm/arch-omap/io.h
- *
- * 2007 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __ASM_ARCH_IO_H
-#define __ASM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We don't actually have real ISA nor PCI buses, but there is so many
- * drivers out there that might just work if we fake them...
- */
-#define __io(a)                 __typesafe_io(a)
-#define __mem_pci(a)            (a)
-#define __mem_isa(a)            (a)
-
-#endif /* __ASM_ARCH_IO_H */
diff --git a/arch/arm/mach-davinci/include/mach/uncompress.h b/arch/arm/mach-davinci/include/mach/uncompress.h
index 9dc7cf9664fe..da2fb2c2155a 100644
--- a/arch/arm/mach-davinci/include/mach/uncompress.h
+++ b/arch/arm/mach-davinci/include/mach/uncompress.h
@@ -25,6 +25,8 @@
 
 #include <mach/serial.h>
 
+#define IOMEM(x)        ((void __force __iomem *)(x))
+
 u32 *uart;
 
 /* PORT_16C550A, in polled non-fifo mode */
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index e1969ce904dc..75da315b6587 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -19,11 +19,14 @@
 #include <linux/err.h>
 #include <linux/platform_device.h>
 
-#include <mach/hardware.h>
+#include <asm/sched_clock.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
+
 #include <mach/cputype.h>
+#include <mach/hardware.h>
 #include <mach/time.h>
+
 #include "clock.h"
 
 static struct clock_event_device clockevent_davinci;
@@ -272,19 +275,9 @@ static cycle_t read_cycles(struct clocksource *cs)
         return (cycles_t)timer32_read(t);
 }
 
-/*
- * Kernel assumes that sched_clock can be called early but may not have
- * things ready yet.
- */
-static cycle_t read_dummy(struct clocksource *cs)
-{
-        return 0;
-}
-
-
 static struct clocksource clocksource_davinci = {
         .rating         = 300,
-        .read           = read_dummy,
+        .read           = read_cycles,
         .mask           = CLOCKSOURCE_MASK(32),
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
@@ -292,12 +285,9 @@ static struct clocksource clocksource_davinci = {
 /*
  * Overwrite weak default sched_clock with something more precise
  */
-unsigned long long notrace sched_clock(void)
+static u32 notrace davinci_read_sched_clock(void)
 {
-        const cycle_t cyc = clocksource_davinci.read(&clocksource_davinci);
-
-        return clocksource_cyc2ns(cyc, clocksource_davinci.mult,
-                                clocksource_davinci.shift);
+        return timer32_read(&timers[TID_CLOCKSOURCE]);
 }
 
 /*
@@ -397,12 +387,14 @@ static void __init davinci_timer_init(void)
         davinci_clock_tick_rate = clk_get_rate(timer_clk);
 
         /* setup clocksource */
-        clocksource_davinci.read = read_cycles;
         clocksource_davinci.name = id_to_name[clocksource_id];
         if (clocksource_register_hz(&clocksource_davinci,
                                     davinci_clock_tick_rate))
                 printk(err, clocksource_davinci.name);
 
+        setup_sched_clock(davinci_read_sched_clock, 32,
+                          davinci_clock_tick_rate);
+
         /* setup clockevent */
         clockevent_davinci.name = id_to_name[timers[TID_CLOCKEVENT].id];
         clockevent_davinci.mult = div_sc(davinci_clock_tick_rate, NSEC_PER_SEC,
diff --git a/arch/arm/mach-dove/addr-map.c b/arch/arm/mach-dove/addr-map.c
index 98b8c83b09ab..2a06c0163418 100644
--- a/arch/arm/mach-dove/addr-map.c
+++ b/arch/arm/mach-dove/addr-map.c
@@ -14,6 +14,7 @@
 #include <linux/io.h>
 #include <asm/mach/arch.h>
 #include <asm/setup.h>
+#include <mach/dove.h>
 #include <plat/addr-map.h>
 #include "common.h"
 
diff --git a/arch/arm/mach-dove/include/mach/io.h b/arch/arm/mach-dove/include/mach/io.h
index eb4936ff90ad..29c8b85355a5 100644
--- a/arch/arm/mach-dove/include/mach/io.h
+++ b/arch/arm/mach-dove/include/mach/io.h
@@ -15,6 +15,5 @@
 
 #define __io(a)         ((void __iomem *)(((a) - DOVE_PCIE0_IO_BUS_BASE) + \
                                                  DOVE_PCIE0_IO_VIRT_BASE))
-#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 804c9122b7b3..6f8068692edf 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -22,7 +22,7 @@
 #include <asm/mach-types.h>
 #include <asm/pgtable.h>
 #include <asm/page.h>
-#include <asm/system.h>
+#include <asm/system_misc.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/irq.h>
@@ -30,10 +30,7 @@
 
 #include <asm/mach/time.h>
 
-#define IRQ_MASK                0xfe000000      /* read */
-#define IRQ_MSET                0xfe000000      /* write */
-#define IRQ_STAT                0xff000000      /* read */
-#define IRQ_MCLR                0xff000000      /* write */
+#include "core.h"
 
 static void ebsa110_mask_irq(struct irq_data *d)
 {
@@ -79,22 +76,22 @@ static struct map_desc ebsa110_io_desc[] __initdata = {
         {       /* IRQ_STAT/IRQ_MCLR */
                 .virtual        = IRQ_STAT,
                 .pfn            = __phys_to_pfn(TRICK4_PHYS),
-                .length         = PGDIR_SIZE,
+                .length         = TRICK4_SIZE,
                 .type           = MT_DEVICE
         }, {    /* IRQ_MASK/IRQ_MSET */
                 .virtual        = IRQ_MASK,
                 .pfn            = __phys_to_pfn(TRICK3_PHYS),
-                .length         = PGDIR_SIZE,
+                .length         = TRICK3_SIZE,
                 .type           = MT_DEVICE
         }, {    /* SOFT_BASE */
                 .virtual        = SOFT_BASE,
                 .pfn            = __phys_to_pfn(TRICK1_PHYS),
-                .length         = PGDIR_SIZE,
+                .length         = TRICK1_SIZE,
                 .type           = MT_DEVICE
         }, {    /* PIT_BASE */
                 .virtual        = PIT_BASE,
                 .pfn            = __phys_to_pfn(TRICK0_PHYS),
-                .length         = PGDIR_SIZE,
+                .length         = TRICK0_SIZE,
                 .type           = MT_DEVICE
         },
 
@@ -119,6 +116,20 @@ static void __init ebsa110_map_io(void)
         iotable_init(ebsa110_io_desc, ARRAY_SIZE(ebsa110_io_desc));
 }
 
+static void __iomem *ebsa110_ioremap_caller(unsigned long cookie, size_t size,
+                                            unsigned int flags, void *caller)
+{
+        return (void __iomem *)cookie;
+}
+
+static void ebsa110_iounmap(volatile void __iomem *io_addr)
+{}
+
+static void __init ebsa110_init_early(void)
+{
+        arch_ioremap_caller = ebsa110_ioremap_caller;
+        arch_iounmap = ebsa110_iounmap;
+}
 
 #define PIT_CTRL                (PIT_BASE + 0x0d)
 #define PIT_T2                  (PIT_BASE + 0x09)
@@ -315,6 +326,7 @@ MACHINE_START(EBSA110, "EBSA110")
         .reserve_lp2    = 1,
         .restart_mode   = 's',
         .map_io         = ebsa110_map_io,
+        .init_early     = ebsa110_init_early,
         .init_irq       = ebsa110_init_irq,
         .timer          = &ebsa110_timer,
         .restart        = ebsa110_restart,
diff --git a/arch/arm/mach-ebsa110/core.h b/arch/arm/mach-ebsa110/core.h
new file mode 100644
index 000000000000..c93c9e43012d
--- /dev/null
+++ b/arch/arm/mach-ebsa110/core.h
@@ -0,0 +1,41 @@
+/*
+ *  Copyright (C) 1996-2000 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This file contains the core hardware definitions of the EBSA-110.
+ */
+#ifndef CORE_H
+#define CORE_H
+
+/* Physical addresses/sizes */
+#define ISAMEM_PHYS             0xe0000000
+#define ISAMEM_SIZE             0x10000000
+
+#define ISAIO_PHYS              0xf0000000
+#define ISAIO_SIZE              PGDIR_SIZE
+
+#define TRICK0_PHYS             0xf2000000
+#define TRICK0_SIZE             PGDIR_SIZE
+#define TRICK1_PHYS             0xf2400000
+#define TRICK1_SIZE             PGDIR_SIZE
+#define TRICK2_PHYS             0xf2800000
+#define TRICK3_PHYS             0xf2c00000
+#define TRICK3_SIZE             PGDIR_SIZE
+#define TRICK4_PHYS             0xf3000000
+#define TRICK4_SIZE             PGDIR_SIZE
+#define TRICK5_PHYS             0xf3400000
+#define TRICK6_PHYS             0xf3800000
+#define TRICK7_PHYS             0xf3c00000
+
+/* Virtual addresses */
+#define PIT_BASE                0xfc000000      /* trick 0 */
+#define SOFT_BASE               0xfd000000      /* trick 1 */
+#define IRQ_MASK                0xfe000000      /* trick 3 - read */
+#define IRQ_MSET                0xfe000000      /* trick 3 - write */
+#define IRQ_STAT                0xff000000      /* trick 4 - read */
+#define IRQ_MCLR                0xff000000      /* trick 4 - write */
+
+#endif
diff --git a/arch/arm/mach-ebsa110/include/mach/hardware.h b/arch/arm/mach-ebsa110/include/mach/hardware.h
index 4b2fb7743909..f4e5407bd004 100644
--- a/arch/arm/mach-ebsa110/include/mach/hardware.h
+++ b/arch/arm/mach-ebsa110/include/mach/hardware.h
@@ -12,48 +12,9 @@
 #ifndef __ASM_ARCH_HARDWARE_H
 #define __ASM_ARCH_HARDWARE_H
 
-/*
- * The EBSA110 has a weird "ISA IO" region:
- *
- * Region 0 (addr = 0xf0000000 + io << 2)
- * --------------------------------------------------------
- * Physical region      IO region
- * f0000fe0 - f0000ffc  3f8 - 3ff  ttyS0
- * f0000e60 - f0000e64  398 - 399
- * f0000de0 - f0000dfc  378 - 37f  lp0
- * f0000be0 - f0000bfc  2f8 - 2ff  ttyS1
- *
- * Region 1 (addr = 0xf0000000 + (io & ~1) << 1 + (io & 1))
- * --------------------------------------------------------
- * Physical region      IO region
- * f00014f1             a79        pnp write data
- * f00007c0 - f00007c1  3e0 - 3e1  pcmcia
- * f00004f1             279        pnp address
- * f0000440 - f000046c  220 - 236  eth0
- * f0000405             203        pnp read data
- */
-
-#define ISAMEM_PHYS             0xe0000000
-#define ISAMEM_SIZE             0x10000000
-
-#define ISAIO_PHYS              0xf0000000
-#define ISAIO_SIZE              PGDIR_SIZE
-
-#define TRICK0_PHYS             0xf2000000
-#define TRICK1_PHYS             0xf2400000
-#define TRICK2_PHYS             0xf2800000
-#define TRICK3_PHYS             0xf2c00000
-#define TRICK4_PHYS             0xf3000000
-#define TRICK5_PHYS             0xf3400000
-#define TRICK6_PHYS             0xf3800000
-#define TRICK7_PHYS             0xf3c00000
-
 #define ISAMEM_BASE             0xe0000000
 #define ISAIO_BASE              0xf0000000
 
-#define PIT_BASE                0xfc000000
-#define SOFT_BASE               0xfd000000
-
 /*
  * RAM definitions
  */
diff --git a/arch/arm/mach-ebsa110/include/mach/io.h b/arch/arm/mach-ebsa110/include/mach/io.h
index 44679db672fb..11bb0799424b 100644
--- a/arch/arm/mach-ebsa110/include/mach/io.h
+++ b/arch/arm/mach-ebsa110/include/mach/io.h
@@ -62,15 +62,6 @@ void __writel(u32 val, void __iomem *addr);
 #define writew(v,b)             __writew(v,b)
 #define writel(v,b)             __writel(v,b)
 
-static inline void __iomem *__arch_ioremap(unsigned long cookie, size_t size,
-                                           unsigned int flags)
-{
-        return (void __iomem *)cookie;
-}
-
-#define __arch_ioremap          __arch_ioremap
-#define __arch_iounmap(cookie)  do { } while (0)
-
 extern void insb(unsigned int port, void *buf, int sz);
 extern void insw(unsigned int port, void *buf, int sz);
 extern void insl(unsigned int port, void *buf, int sz);
diff --git a/arch/arm/mach-ebsa110/io.c b/arch/arm/mach-ebsa110/io.c
index c52e3047a7eb..756cc377a73d 100644
--- a/arch/arm/mach-ebsa110/io.c
+++ b/arch/arm/mach-ebsa110/io.c
@@ -177,6 +177,26 @@ void writesl(void __iomem *addr, const void *data, int len)
 }
 EXPORT_SYMBOL(writesl);
 
+/*
+ * The EBSA110 has a weird "ISA IO" region:
+ *
+ * Region 0 (addr = 0xf0000000 + io << 2)
+ * --------------------------------------------------------
+ * Physical region      IO region
+ * f0000fe0 - f0000ffc  3f8 - 3ff  ttyS0
+ * f0000e60 - f0000e64  398 - 399
+ * f0000de0 - f0000dfc  378 - 37f  lp0
+ * f0000be0 - f0000bfc  2f8 - 2ff  ttyS1
+ *
+ * Region 1 (addr = 0xf0000000 + (io & ~1) << 1 + (io & 1))
+ * --------------------------------------------------------
+ * Physical region      IO region
+ * f00014f1             a79        pnp write data
+ * f00007c0 - f00007c1  3e0 - 3e1  pcmcia
+ * f00004f1             279        pnp address
+ * f0000440 - f000046c  220 - 236  eth0
+ * f0000405             203        pnp read data
+ */
 #define SUPERIO_PORT(p) \
         (((p) >> 3) == (0x3f8 >> 3) || \
          ((p) >> 3) == (0x2f8 >> 3) || \
diff --git a/arch/arm/mach-ebsa110/leds.c b/arch/arm/mach-ebsa110/leds.c
index 6a6ea57c2a4e..99e14e362500 100644
--- a/arch/arm/mach-ebsa110/leds.c
+++ b/arch/arm/mach-ebsa110/leds.c
@@ -17,9 +17,10 @@
 
 #include <mach/hardware.h>
 #include <asm/leds.h>
-#include <asm/system.h>
 #include <asm/mach-types.h>
 
+#include "core.h"
+
 static spinlock_t leds_lock;
 
 static void ebsa110_leds_event(led_event_t ledevt)
diff --git a/arch/arm/mach-ep93xx/include/mach/io.h b/arch/arm/mach-ep93xx/include/mach/io.h
deleted file mode 100644
index 594b77f21054..000000000000
--- a/arch/arm/mach-ep93xx/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * arch/arm/mach-ep93xx/include/mach/io.h
- */
-
-#ifndef __ASM_MACH_IO_H
-#define __ASM_MACH_IO_H
-
-#define IO_SPACE_LIMIT          0xffffffff
-
-#define __io(p)                 __typesafe_io(p)
-#define __mem_pci(p)            (p)
-
-/*
- * A typesafe __io() variation for variable initialisers
- */
-#ifdef __ASSEMBLER__
-#define IOMEM(p)                p
-#else
-#define IOMEM(p)                ((void __iomem __force *)(p))
-#endif
-
-#endif /* __ASM_MACH_IO_H */
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 2bf7d6e23989..0491ceef1cda 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -11,18 +11,19 @@ if ARCH_EXYNOS
 
 menu "SAMSUNG EXYNOS SoCs Support"
 
-choice
-        prompt "EXYNOS System Type"
-        default ARCH_EXYNOS4
-
 config ARCH_EXYNOS4
         bool "SAMSUNG EXYNOS4"
+        default y
         select HAVE_SMP
         select MIGHT_HAVE_CACHE_L2X0
         help
           Samsung EXYNOS4 SoCs based systems
 
-endchoice
+config ARCH_EXYNOS5
+        bool "SAMSUNG EXYNOS5"
+        select HAVE_SMP
+        help
+          Samsung EXYNOS5 (Cortex-A15) SoC based systems
 
 comment "EXYNOS SoCs"
 
@@ -56,6 +57,13 @@ config SOC_EXYNOS4412
         help
           Enable EXYNOS4412 SoC support
 
+config SOC_EXYNOS5250
+        bool "SAMSUNG EXYNOS5250"
+        default y
+        depends on ARCH_EXYNOS5
+        help
+          Enable EXYNOS5250 SoC support
+
 config EXYNOS4_MCT
         bool
         default y
@@ -356,7 +364,7 @@ config MACH_SMDK4412
           Machine support for Samsung SMDK4412
 endif
 
-comment "Flattened Device Tree based board for Exynos4 based SoC"
+comment "Flattened Device Tree based board for EXYNOS SoCs"
 
 config MACH_EXYNOS4_DT
         bool "Samsung Exynos4 Machine using device tree"
@@ -370,6 +378,15 @@ config MACH_EXYNOS4_DT
           Note: This is under development and not all peripherals can be supported
           with this machine file.
 
+config MACH_EXYNOS5_DT
+        bool "SAMSUNG EXYNOS5 Machine using device tree"
+        select SOC_EXYNOS5250
+        select USE_OF
+        select ARM_AMBA
+        help
+          Machine support for Samsung Exynos4 machine with device tree enabled.
+          Select this if a fdt blob is available for the EXYNOS4 SoC based board.
+
 if ARCH_EXYNOS4
 
 comment "Configuration for HSMMC 8-bit bus width"
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 9a4c09896509..8631840d1b5e 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -14,6 +14,7 @@ obj-				:=
 
 obj-$(CONFIG_ARCH_EXYNOS)       += common.o
 obj-$(CONFIG_ARCH_EXYNOS4)      += clock-exynos4.o
+obj-$(CONFIG_ARCH_EXYNOS5)      += clock-exynos5.o
 obj-$(CONFIG_CPU_EXYNOS4210)    += clock-exynos4210.o
 obj-$(CONFIG_SOC_EXYNOS4212)    += clock-exynos4212.o
 
@@ -42,9 +43,11 @@ obj-$(CONFIG_MACH_SMDK4212)		+= mach-smdk4x12.o
 obj-$(CONFIG_MACH_SMDK4412)             += mach-smdk4x12.o
 
 obj-$(CONFIG_MACH_EXYNOS4_DT)           += mach-exynos4-dt.o
+obj-$(CONFIG_MACH_EXYNOS5_DT)           += mach-exynos5-dt.o
 
 # device support
 
+obj-y                                   += dev-uart.o
 obj-$(CONFIG_ARCH_EXYNOS4)              += dev-audio.o
 obj-$(CONFIG_EXYNOS4_DEV_AHCI)          += dev-ahci.o
 obj-$(CONFIG_EXYNOS4_DEV_SYSMMU)        += dev-sysmmu.o
@@ -52,7 +55,7 @@ obj-$(CONFIG_EXYNOS4_DEV_DWMCI)		+= dev-dwmci.o
 obj-$(CONFIG_EXYNOS4_DEV_DMA)           += dma.o
 obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI)      += dev-ohci.o
 
-obj-$(CONFIG_ARCH_EXYNOS4)              += setup-i2c0.o
+obj-$(CONFIG_ARCH_EXYNOS)               += setup-i2c0.o
 obj-$(CONFIG_EXYNOS4_SETUP_FIMC)        += setup-fimc.o
 obj-$(CONFIG_EXYNOS4_SETUP_FIMD0)       += setup-fimd0.o
 obj-$(CONFIG_EXYNOS4_SETUP_I2C1)        += setup-i2c1.o
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
index 200159dcb341..df54c2a92225 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -496,11 +496,6 @@ static struct clk exynos4_init_clocks_off[] = {
                 .enable         = exynos4_clk_ip_cam_ctrl,
                 .ctrlbit        = (1 << 3),
         }, {
-                .name           = "fimd",
-                .devname        = "exynos4-fb.0",
-                .enable         = exynos4_clk_ip_lcd0_ctrl,
-                .ctrlbit        = (1 << 0),
-        }, {
                 .name           = "hsmmc",
                 .devname        = "s3c-sdhci.0",
                 .parent         = &exynos4_clk_aclk_133.clk,
@@ -796,6 +791,13 @@ static struct clk exynos4_clk_mdma1 = {
         .ctrlbit        = ((1 << 8) | (1 << 5) | (1 << 2)),
 };
 
+static struct clk exynos4_clk_fimd0 = {
+        .name           = "fimd",
+        .devname        = "exynos4-fb.0",
+        .enable         = exynos4_clk_ip_lcd0_ctrl,
+        .ctrlbit        = (1 << 0),
+};
+
 struct clk *exynos4_clkset_group_list[] = {
         [0] = &clk_ext_xtal_mux,
         [1] = &clk_xusbxti,
@@ -1315,6 +1317,7 @@ static struct clk *exynos4_clk_cdev[] = {
         &exynos4_clk_pdma0,
         &exynos4_clk_pdma1,
         &exynos4_clk_mdma1,
+        &exynos4_clk_fimd0,
 };
 
 static struct clksrc_clk *exynos4_clksrc_cdev[] = {
@@ -1341,6 +1344,7 @@ static struct clk_lookup exynos4_clk_lookup[] = {
         CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &exynos4_clk_sclk_mmc1.clk),
         CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &exynos4_clk_sclk_mmc2.clk),
         CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &exynos4_clk_sclk_mmc3.clk),
+        CLKDEV_INIT("exynos4-fb.0", "lcd", &exynos4_clk_fimd0),
         CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos4_clk_pdma0),
         CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos4_clk_pdma1),
         CLKDEV_INIT("dma-pl330.2", "apb_pclk", &exynos4_clk_mdma1),
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
new file mode 100644
index 000000000000..d013982d0f8e
--- /dev/null
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -0,0 +1,1247 @@
+/*
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Clock support for EXYNOS5 SoCs
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/syscore_ops.h>
+
+#include <plat/cpu-freq.h>
+#include <plat/clock.h>
+#include <plat/cpu.h>
+#include <plat/pll.h>
+#include <plat/s5p-clock.h>
+#include <plat/clock-clksrc.h>
+#include <plat/pm.h>
+
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+#include <mach/sysmmu.h>
+
+#include "common.h"
+
+#ifdef CONFIG_PM_SLEEP
+static struct sleep_save exynos5_clock_save[] = {
+        /* will be implemented */
+};
+#endif
+
+static struct clk exynos5_clk_sclk_dptxphy = {
+        .name           = "sclk_dptx",
+};
+
+static struct clk exynos5_clk_sclk_hdmi24m = {
+        .name           = "sclk_hdmi24m",
+        .rate           = 24000000,
+};
+
+static struct clk exynos5_clk_sclk_hdmi27m = {
+        .name           = "sclk_hdmi27m",
+        .rate           = 27000000,
+};
+
+static struct clk exynos5_clk_sclk_hdmiphy = {
+        .name           = "sclk_hdmiphy",
+};
+
+static struct clk exynos5_clk_sclk_usbphy = {
+        .name           = "sclk_usbphy",
+        .rate           = 48000000,
+};
+
+static int exynos5_clksrc_mask_top_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(EXYNOS5_CLKSRC_MASK_TOP, clk, enable);
+}
+
+static int exynos5_clksrc_mask_disp1_0_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(EXYNOS5_CLKSRC_MASK_DISP1_0, clk, enable);
+}
+
+static int exynos5_clksrc_mask_fsys_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(EXYNOS5_CLKSRC_MASK_FSYS, clk, enable);
+}
+
+static int exynos5_clksrc_mask_gscl_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(EXYNOS5_CLKSRC_MASK_GSCL, clk, enable);
+}
+
+static int exynos5_clksrc_mask_peric0_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(EXYNOS5_CLKSRC_MASK_PERIC0, clk, enable);
+}
+
+static int exynos5_clk_ip_core_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(EXYNOS5_CLKGATE_IP_CORE, clk, enable);
+}
+
+static int exynos5_clk_ip_disp1_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(EXYNOS5_CLKGATE_IP_DISP1, clk, enable);
+}
+
+static int exynos5_clk_ip_fsys_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(EXYNOS5_CLKGATE_IP_FSYS, clk, enable);
+}
+
+static int exynos5_clk_block_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(EXYNOS5_CLKGATE_BLOCK, clk, enable);
+}
+
+static int exynos5_clk_ip_gen_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(EXYNOS5_CLKGATE_IP_GEN, clk, enable);
+}
+
+static int exynos5_clk_ip_gps_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(EXYNOS5_CLKGATE_IP_GPS, clk, enable);
+}
+
+static int exynos5_clk_ip_mfc_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(EXYNOS5_CLKGATE_IP_MFC, clk, enable);
+}
+
+static int exynos5_clk_ip_peric_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(EXYNOS5_CLKGATE_IP_PERIC, clk, enable);
+}
+
+static int exynos5_clk_ip_peris_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(EXYNOS5_CLKGATE_IP_PERIS, clk, enable);
+}
+
+/* Core list of CMU_CPU side */
+
+static struct clksrc_clk exynos5_clk_mout_apll = {
+        .clk    = {
+                .name           = "mout_apll",
+        },
+        .sources = &clk_src_apll,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_CPU, .shift = 0, .size = 1 },
+};
+
+static struct clksrc_clk exynos5_clk_sclk_apll = {
+        .clk    = {
+                .name           = "sclk_apll",
+                .parent         = &exynos5_clk_mout_apll.clk,
+        },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_CPU0, .shift = 24, .size = 3 },
+};
+
+static struct clksrc_clk exynos5_clk_mout_bpll = {
+        .clk    = {
+                .name           = "mout_bpll",
+        },
+        .sources = &clk_src_bpll,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_CDREX, .shift = 0, .size = 1 },
+};
+
+static struct clk *exynos5_clk_src_bpll_user_list[] = {
+        [0] = &clk_fin_mpll,
+        [1] = &exynos5_clk_mout_bpll.clk,
+};
+
+static struct clksrc_sources exynos5_clk_src_bpll_user = {
+        .sources        = exynos5_clk_src_bpll_user_list,
+        .nr_sources     = ARRAY_SIZE(exynos5_clk_src_bpll_user_list),
+};
+
+static struct clksrc_clk exynos5_clk_mout_bpll_user = {
+        .clk    = {
+                .name           = "mout_bpll_user",
+        },
+        .sources = &exynos5_clk_src_bpll_user,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_TOP2, .shift = 24, .size = 1 },
+};
+
+static struct clksrc_clk exynos5_clk_mout_cpll = {
+        .clk    = {
+                .name           = "mout_cpll",
+        },
+        .sources = &clk_src_cpll,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_TOP2, .shift = 8, .size = 1 },
+};
+
+static struct clksrc_clk exynos5_clk_mout_epll = {
+        .clk    = {
+                .name           = "mout_epll",
+        },
+        .sources = &clk_src_epll,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_TOP2, .shift = 12, .size = 1 },
+};
+
+struct clksrc_clk exynos5_clk_mout_mpll = {
+        .clk = {
+                .name           = "mout_mpll",
+        },
+        .sources = &clk_src_mpll,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_CORE1, .shift = 8, .size = 1 },
+};
+
+static struct clk *exynos_clkset_vpllsrc_list[] = {
+        [0] = &clk_fin_vpll,
+        [1] = &exynos5_clk_sclk_hdmi27m,
+};
+
+static struct clksrc_sources exynos5_clkset_vpllsrc = {
+        .sources        = exynos_clkset_vpllsrc_list,
+        .nr_sources     = ARRAY_SIZE(exynos_clkset_vpllsrc_list),
+};
+
+static struct clksrc_clk exynos5_clk_vpllsrc = {
+        .clk    = {
+                .name           = "vpll_src",
+                .enable         = exynos5_clksrc_mask_top_ctrl,
+                .ctrlbit        = (1 << 0),
+        },
+        .sources = &exynos5_clkset_vpllsrc,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_TOP2, .shift = 0, .size = 1 },
+};
+
+static struct clk *exynos5_clkset_sclk_vpll_list[] = {
+        [0] = &exynos5_clk_vpllsrc.clk,
+        [1] = &clk_fout_vpll,
+};
+
+static struct clksrc_sources exynos5_clkset_sclk_vpll = {
+        .sources        = exynos5_clkset_sclk_vpll_list,
+        .nr_sources     = ARRAY_SIZE(exynos5_clkset_sclk_vpll_list),
+};
+
+static struct clksrc_clk exynos5_clk_sclk_vpll = {
+        .clk    = {
+                .name           = "sclk_vpll",
+        },
+        .sources = &exynos5_clkset_sclk_vpll,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_TOP2, .shift = 16, .size = 1 },
+};
+
+static struct clksrc_clk exynos5_clk_sclk_pixel = {
+        .clk    = {
+                .name           = "sclk_pixel",
+                .parent         = &exynos5_clk_sclk_vpll.clk,
+        },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_DISP1_0, .shift = 28, .size = 4 },
+};
+
+static struct clk *exynos5_clkset_sclk_hdmi_list[] = {
+        [0] = &exynos5_clk_sclk_pixel.clk,
+        [1] = &exynos5_clk_sclk_hdmiphy,
+};
+
+static struct clksrc_sources exynos5_clkset_sclk_hdmi = {
+        .sources        = exynos5_clkset_sclk_hdmi_list,
+        .nr_sources     = ARRAY_SIZE(exynos5_clkset_sclk_hdmi_list),
+};
+
+static struct clksrc_clk exynos5_clk_sclk_hdmi = {
+        .clk    = {
+                .name           = "sclk_hdmi",
+                .enable         = exynos5_clksrc_mask_disp1_0_ctrl,
+                .ctrlbit        = (1 << 20),
+        },
+        .sources = &exynos5_clkset_sclk_hdmi,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_DISP1_0, .shift = 20, .size = 1 },
+};
+
+static struct clksrc_clk *exynos5_sclk_tv[] = {
+        &exynos5_clk_sclk_pixel,
+        &exynos5_clk_sclk_hdmi,
+};
+
+static struct clk *exynos5_clk_src_mpll_user_list[] = {
+        [0] = &clk_fin_mpll,
+        [1] = &exynos5_clk_mout_mpll.clk,
+};
+
+static struct clksrc_sources exynos5_clk_src_mpll_user = {
+        .sources        = exynos5_clk_src_mpll_user_list,
+        .nr_sources     = ARRAY_SIZE(exynos5_clk_src_mpll_user_list),
+};
+
+static struct clksrc_clk exynos5_clk_mout_mpll_user = {
+        .clk    = {
+                .name           = "mout_mpll_user",
+        },
+        .sources = &exynos5_clk_src_mpll_user,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_TOP2, .shift = 20, .size = 1 },
+};
+
+static struct clk *exynos5_clkset_mout_cpu_list[] = {
+        [0] = &exynos5_clk_mout_apll.clk,
+        [1] = &exynos5_clk_mout_mpll.clk,
+};
+
+static struct clksrc_sources exynos5_clkset_mout_cpu = {
+        .sources        = exynos5_clkset_mout_cpu_list,
+        .nr_sources     = ARRAY_SIZE(exynos5_clkset_mout_cpu_list),
+};
+
+static struct clksrc_clk exynos5_clk_mout_cpu = {
+        .clk    = {
+                .name           = "mout_cpu",
+        },
+        .sources = &exynos5_clkset_mout_cpu,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_CPU, .shift = 16, .size = 1 },
+};
+
+static struct clksrc_clk exynos5_clk_dout_armclk = {
+        .clk    = {
+                .name           = "dout_armclk",
+                .parent         = &exynos5_clk_mout_cpu.clk,
+        },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_CPU0, .shift = 0, .size = 3 },
+};
+
+static struct clksrc_clk exynos5_clk_dout_arm2clk = {
+        .clk    = {
+                .name           = "dout_arm2clk",
+                .parent         = &exynos5_clk_dout_armclk.clk,
+        },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_CPU0, .shift = 28, .size = 3 },
+};
+
+static struct clk exynos5_clk_armclk = {
+        .name           = "armclk",
+        .parent         = &exynos5_clk_dout_arm2clk.clk,
+};
+
+/* Core list of CMU_CDREX side */
+
+static struct clk *exynos5_clkset_cdrex_list[] = {
+        [0] = &exynos5_clk_mout_mpll.clk,
+        [1] = &exynos5_clk_mout_bpll.clk,
+};
+
+static struct clksrc_sources exynos5_clkset_cdrex = {
+        .sources        = exynos5_clkset_cdrex_list,
+        .nr_sources     = ARRAY_SIZE(exynos5_clkset_cdrex_list),
+};
+
+static struct clksrc_clk exynos5_clk_cdrex = {
+        .clk    = {
+                .name           = "clk_cdrex",
+        },
+        .sources = &exynos5_clkset_cdrex,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_CDREX, .shift = 4, .size = 1 },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_CDREX, .shift = 16, .size = 3 },
+};
+
+static struct clksrc_clk exynos5_clk_aclk_acp = {
+        .clk    = {
+                .name           = "aclk_acp",
+                .parent         = &exynos5_clk_mout_mpll.clk,
+        },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_ACP, .shift = 0, .size = 3 },
+};
+
+static struct clksrc_clk exynos5_clk_pclk_acp = {
+        .clk    = {
+                .name           = "pclk_acp",
+                .parent         = &exynos5_clk_aclk_acp.clk,
+        },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_ACP, .shift = 4, .size = 3 },
+};
+
+/* Core list of CMU_TOP side */
+
+struct clk *exynos5_clkset_aclk_top_list[] = {
+        [0] = &exynos5_clk_mout_mpll_user.clk,
+        [1] = &exynos5_clk_mout_bpll_user.clk,
+};
+
+struct clksrc_sources exynos5_clkset_aclk = {
+        .sources        = exynos5_clkset_aclk_top_list,
+        .nr_sources     = ARRAY_SIZE(exynos5_clkset_aclk_top_list),
+};
+
+static struct clksrc_clk exynos5_clk_aclk_400 = {
+        .clk    = {
+                .name           = "aclk_400",
+        },
+        .sources = &exynos5_clkset_aclk,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_TOP0, .shift = 20, .size = 1 },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 24, .size = 3 },
+};
+
+struct clk *exynos5_clkset_aclk_333_166_list[] = {
+        [0] = &exynos5_clk_mout_cpll.clk,
+        [1] = &exynos5_clk_mout_mpll_user.clk,
+};
+
+struct clksrc_sources exynos5_clkset_aclk_333_166 = {
+        .sources        = exynos5_clkset_aclk_333_166_list,
+        .nr_sources     = ARRAY_SIZE(exynos5_clkset_aclk_333_166_list),
+};
+
+static struct clksrc_clk exynos5_clk_aclk_333 = {
+        .clk    = {
+                .name           = "aclk_333",
+        },
+        .sources = &exynos5_clkset_aclk_333_166,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_TOP0, .shift = 16, .size = 1 },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 20, .size = 3 },
+};
+
+static struct clksrc_clk exynos5_clk_aclk_166 = {
+        .clk    = {
+                .name           = "aclk_166",
+        },
+        .sources = &exynos5_clkset_aclk_333_166,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_TOP0, .shift = 8, .size = 1 },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 8, .size = 3 },
+};
+
+static struct clksrc_clk exynos5_clk_aclk_266 = {
+        .clk    = {
+                .name           = "aclk_266",
+                .parent         = &exynos5_clk_mout_mpll_user.clk,
+        },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 16, .size = 3 },
+};
+
+static struct clksrc_clk exynos5_clk_aclk_200 = {
+        .clk    = {
+                .name           = "aclk_200",
+        },
+        .sources = &exynos5_clkset_aclk,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_TOP0, .shift = 12, .size = 1 },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 12, .size = 3 },
+};
+
+static struct clksrc_clk exynos5_clk_aclk_66_pre = {
+        .clk    = {
+                .name           = "aclk_66_pre",
+                .parent         = &exynos5_clk_mout_mpll_user.clk,
+        },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_TOP1, .shift = 24, .size = 3 },
+};
+
+static struct clksrc_clk exynos5_clk_aclk_66 = {
+        .clk    = {
+                .name           = "aclk_66",
+                .parent         = &exynos5_clk_aclk_66_pre.clk,
+        },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 0, .size = 3 },
+};
+
+static struct clk exynos5_init_clocks_off[] = {
+        {
+                .name           = "timers",
+                .parent         = &exynos5_clk_aclk_66.clk,
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 24),
+        }, {
+                .name           = "rtc",
+                .parent         = &exynos5_clk_aclk_66.clk,
+                .enable         = exynos5_clk_ip_peris_ctrl,
+                .ctrlbit        = (1 << 20),
+        }, {
+                .name           = "hsmmc",
+                .devname        = "s3c-sdhci.0",
+                .parent         = &exynos5_clk_aclk_200.clk,
+                .enable         = exynos5_clk_ip_fsys_ctrl,
+                .ctrlbit        = (1 << 12),
+        }, {
+                .name           = "hsmmc",
+                .devname        = "s3c-sdhci.1",
+                .parent         = &exynos5_clk_aclk_200.clk,
+                .enable         = exynos5_clk_ip_fsys_ctrl,
+                .ctrlbit        = (1 << 13),
+        }, {
+                .name           = "hsmmc",
+                .devname        = "s3c-sdhci.2",
+                .parent         = &exynos5_clk_aclk_200.clk,
+                .enable         = exynos5_clk_ip_fsys_ctrl,
+                .ctrlbit        = (1 << 14),
+        }, {
+                .name           = "hsmmc",
+                .devname        = "s3c-sdhci.3",
+                .parent         = &exynos5_clk_aclk_200.clk,
+                .enable         = exynos5_clk_ip_fsys_ctrl,
+                .ctrlbit        = (1 << 15),
+        }, {
+                .name           = "dwmci",
+                .parent         = &exynos5_clk_aclk_200.clk,
+                .enable         = exynos5_clk_ip_fsys_ctrl,
+                .ctrlbit        = (1 << 16),
+        }, {
+                .name           = "sata",
+                .devname        = "ahci",
+                .enable         = exynos5_clk_ip_fsys_ctrl,
+                .ctrlbit        = (1 << 6),
+        }, {
+                .name           = "sata_phy",
+                .enable         = exynos5_clk_ip_fsys_ctrl,
+                .ctrlbit        = (1 << 24),
+        }, {
+                .name           = "sata_phy_i2c",
+                .enable         = exynos5_clk_ip_fsys_ctrl,
+                .ctrlbit        = (1 << 25),
+        }, {
+                .name           = "mfc",
+                .devname        = "s5p-mfc",
+                .enable         = exynos5_clk_ip_mfc_ctrl,
+                .ctrlbit        = (1 << 0),
+        }, {
+                .name           = "hdmi",
+                .devname        = "exynos4-hdmi",
+                .enable         = exynos5_clk_ip_disp1_ctrl,
+                .ctrlbit        = (1 << 6),
+        }, {
+                .name           = "mixer",
+                .devname        = "s5p-mixer",
+                .enable         = exynos5_clk_ip_disp1_ctrl,
+                .ctrlbit        = (1 << 5),
+        }, {
+                .name           = "jpeg",
+                .enable         = exynos5_clk_ip_gen_ctrl,
+                .ctrlbit        = (1 << 2),
+        }, {
+                .name           = "dsim0",
+                .enable         = exynos5_clk_ip_disp1_ctrl,
+                .ctrlbit        = (1 << 3),
+        }, {
+                .name           = "iis",
+                .devname        = "samsung-i2s.1",
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 20),
+        }, {
+                .name           = "iis",
+                .devname        = "samsung-i2s.2",
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 21),
+        }, {
+                .name           = "pcm",
+                .devname        = "samsung-pcm.1",
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 22),
+        }, {
+                .name           = "pcm",
+                .devname        = "samsung-pcm.2",
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 23),
+        }, {
+                .name           = "spdif",
+                .devname        = "samsung-spdif",
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 26),
+        }, {
+                .name           = "ac97",
+                .devname        = "samsung-ac97",
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 27),
+        }, {
+                .name           = "usbhost",
+                .enable         = exynos5_clk_ip_fsys_ctrl ,
+                .ctrlbit        = (1 << 18),
+        }, {
+                .name           = "usbotg",
+                .enable         = exynos5_clk_ip_fsys_ctrl,
+                .ctrlbit        = (1 << 7),
+        }, {
+                .name           = "gps",
+                .enable         = exynos5_clk_ip_gps_ctrl,
+                .ctrlbit        = ((1 << 3) | (1 << 2) | (1 << 0)),
+        }, {
+                .name           = "nfcon",
+                .enable         = exynos5_clk_ip_fsys_ctrl,
+                .ctrlbit        = (1 << 22),
+        }, {
+                .name           = "iop",
+                .enable         = exynos5_clk_ip_fsys_ctrl,
+                .ctrlbit        = ((1 << 30) | (1 << 26) | (1 << 23)),
+        }, {
+                .name           = "core_iop",
+                .enable         = exynos5_clk_ip_core_ctrl,
+                .ctrlbit        = ((1 << 21) | (1 << 3)),
+        }, {
+                .name           = "mcu_iop",
+                .enable         = exynos5_clk_ip_fsys_ctrl,
+                .ctrlbit        = (1 << 0),
+        }, {
+                .name           = "i2c",
+                .devname        = "s3c2440-i2c.0",
+                .parent         = &exynos5_clk_aclk_66.clk,
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 6),
+        }, {
+                .name           = "i2c",
+                .devname        = "s3c2440-i2c.1",
+                .parent         = &exynos5_clk_aclk_66.clk,
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 7),
+        }, {
+                .name           = "i2c",
+                .devname        = "s3c2440-i2c.2",
+                .parent         = &exynos5_clk_aclk_66.clk,
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 8),
+        }, {
+                .name           = "i2c",
+                .devname        = "s3c2440-i2c.3",
+                .parent         = &exynos5_clk_aclk_66.clk,
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 9),
+        }, {
+                .name           = "i2c",
+                .devname        = "s3c2440-i2c.4",
+                .parent         = &exynos5_clk_aclk_66.clk,
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 10),
+        }, {
+                .name           = "i2c",
+                .devname        = "s3c2440-i2c.5",
+                .parent         = &exynos5_clk_aclk_66.clk,
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 11),
+        }, {
+                .name           = "i2c",
+                .devname        = "s3c2440-i2c.6",
+                .parent         = &exynos5_clk_aclk_66.clk,
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 12),
+        }, {
+                .name           = "i2c",
+                .devname        = "s3c2440-i2c.7",
+                .parent         = &exynos5_clk_aclk_66.clk,
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 13),
+        }, {
+                .name           = "i2c",
+                .devname        = "s3c2440-hdmiphy-i2c",
+                .parent         = &exynos5_clk_aclk_66.clk,
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 14),
+        }
+};
+
+static struct clk exynos5_init_clocks_on[] = {
+        {
+                .name           = "uart",
+                .devname        = "s5pv210-uart.0",
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 0),
+        }, {
+                .name           = "uart",
+                .devname        = "s5pv210-uart.1",
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 1),
+        }, {
+                .name           = "uart",
+                .devname        = "s5pv210-uart.2",
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 2),
+        }, {
+                .name           = "uart",
+                .devname        = "s5pv210-uart.3",
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 3),
+        }, {
+                .name           = "uart",
+                .devname        = "s5pv210-uart.4",
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 4),
+        }, {
+                .name           = "uart",
+                .devname        = "s5pv210-uart.5",
+                .enable         = exynos5_clk_ip_peric_ctrl,
+                .ctrlbit        = (1 << 5),
+        }
+};
+
+static struct clk exynos5_clk_pdma0 = {
+        .name           = "dma",
+        .devname        = "dma-pl330.0",
+        .enable         = exynos5_clk_ip_fsys_ctrl,
+        .ctrlbit        = (1 << 1),
+};
+
+static struct clk exynos5_clk_pdma1 = {
+        .name           = "dma",
+        .devname        = "dma-pl330.1",
+        .enable         = exynos5_clk_ip_fsys_ctrl,
+        .ctrlbit        = (1 << 1),
+};
+
+static struct clk exynos5_clk_mdma1 = {
+        .name           = "dma",
+        .devname        = "dma-pl330.2",
+        .enable         = exynos5_clk_ip_gen_ctrl,
+        .ctrlbit        = (1 << 4),
+};
+
+struct clk *exynos5_clkset_group_list[] = {
+        [0] = &clk_ext_xtal_mux,
+        [1] = NULL,
+        [2] = &exynos5_clk_sclk_hdmi24m,
+        [3] = &exynos5_clk_sclk_dptxphy,
+        [4] = &exynos5_clk_sclk_usbphy,
+        [5] = &exynos5_clk_sclk_hdmiphy,
+        [6] = &exynos5_clk_mout_mpll_user.clk,
+        [7] = &exynos5_clk_mout_epll.clk,
+        [8] = &exynos5_clk_sclk_vpll.clk,
+        [9] = &exynos5_clk_mout_cpll.clk,
+};
+
+struct clksrc_sources exynos5_clkset_group = {
+        .sources        = exynos5_clkset_group_list,
+        .nr_sources     = ARRAY_SIZE(exynos5_clkset_group_list),
+};
+
+/* Possible clock sources for aclk_266_gscl_sub Mux */
+static struct clk *clk_src_gscl_266_list[] = {
+        [0] = &clk_ext_xtal_mux,
+        [1] = &exynos5_clk_aclk_266.clk,
+};
+
+static struct clksrc_sources clk_src_gscl_266 = {
+        .sources        = clk_src_gscl_266_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_gscl_266_list),
+};
+
+static struct clksrc_clk exynos5_clk_dout_mmc0 = {
+        .clk            = {
+                .name           = "dout_mmc0",
+        },
+        .sources = &exynos5_clkset_group,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_FSYS, .shift = 0, .size = 4 },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS1, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk exynos5_clk_dout_mmc1 = {
+        .clk            = {
+                .name           = "dout_mmc1",
+        },
+        .sources = &exynos5_clkset_group,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_FSYS, .shift = 4, .size = 4 },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS1, .shift = 16, .size = 4 },
+};
+
+static struct clksrc_clk exynos5_clk_dout_mmc2 = {
+        .clk            = {
+                .name           = "dout_mmc2",
+        },
+        .sources = &exynos5_clkset_group,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_FSYS, .shift = 8, .size = 4 },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS2, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk exynos5_clk_dout_mmc3 = {
+        .clk            = {
+                .name           = "dout_mmc3",
+        },
+        .sources = &exynos5_clkset_group,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_FSYS, .shift = 12, .size = 4 },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS2, .shift = 16, .size = 4 },
+};
+
+static struct clksrc_clk exynos5_clk_dout_mmc4 = {
+        .clk            = {
+                .name           = "dout_mmc4",
+        },
+        .sources = &exynos5_clkset_group,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_FSYS, .shift = 16, .size = 4 },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS3, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk exynos5_clk_sclk_uart0 = {
+        .clk    = {
+                .name           = "uclk1",
+                .devname        = "exynos4210-uart.0",
+                .enable         = exynos5_clksrc_mask_peric0_ctrl,
+                .ctrlbit        = (1 << 0),
+        },
+        .sources = &exynos5_clkset_group,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_PERIC0, .shift = 0, .size = 4 },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_PERIC0, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk exynos5_clk_sclk_uart1 = {
+        .clk    = {
+                .name           = "uclk1",
+                .devname        = "exynos4210-uart.1",
+                .enable         = exynos5_clksrc_mask_peric0_ctrl,
+                .ctrlbit        = (1 << 4),
+        },
+        .sources = &exynos5_clkset_group,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_PERIC0, .shift = 4, .size = 4 },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_PERIC0, .shift = 4, .size = 4 },
+};
+
+static struct clksrc_clk exynos5_clk_sclk_uart2 = {
+        .clk    = {
+                .name           = "uclk1",
+                .devname        = "exynos4210-uart.2",
+                .enable         = exynos5_clksrc_mask_peric0_ctrl,
+                .ctrlbit        = (1 << 8),
+        },
+        .sources = &exynos5_clkset_group,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_PERIC0, .shift = 8, .size = 4 },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_PERIC0, .shift = 8, .size = 4 },
+};
+
+static struct clksrc_clk exynos5_clk_sclk_uart3 = {
+        .clk    = {
+                .name           = "uclk1",
+                .devname        = "exynos4210-uart.3",
+                .enable         = exynos5_clksrc_mask_peric0_ctrl,
+                .ctrlbit        = (1 << 12),
+        },
+        .sources = &exynos5_clkset_group,
+        .reg_src = { .reg = EXYNOS5_CLKSRC_PERIC0, .shift = 12, .size = 4 },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_PERIC0, .shift = 12, .size = 4 },
+};
+
+static struct clksrc_clk exynos5_clk_sclk_mmc0 = {
+        .clk    = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.0",
+                .parent         = &exynos5_clk_dout_mmc0.clk,
+                .enable         = exynos5_clksrc_mask_fsys_ctrl,
+                .ctrlbit        = (1 << 0),
+        },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS1, .shift = 8, .size = 8 },
+};
+
+static struct clksrc_clk exynos5_clk_sclk_mmc1 = {
+        .clk    = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.1",
+                .parent         = &exynos5_clk_dout_mmc1.clk,
+                .enable         = exynos5_clksrc_mask_fsys_ctrl,
+                .ctrlbit        = (1 << 4),
+        },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS1, .shift = 24, .size = 8 },
+};
+
+static struct clksrc_clk exynos5_clk_sclk_mmc2 = {
+        .clk    = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.2",
+                .parent         = &exynos5_clk_dout_mmc2.clk,
+                .enable         = exynos5_clksrc_mask_fsys_ctrl,
+                .ctrlbit        = (1 << 8),
+        },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS2, .shift = 8, .size = 8 },
+};
+
+static struct clksrc_clk exynos5_clk_sclk_mmc3 = {
+        .clk    = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.3",
+                .parent         = &exynos5_clk_dout_mmc3.clk,
+                .enable         = exynos5_clksrc_mask_fsys_ctrl,
+                .ctrlbit        = (1 << 12),
+        },
+        .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS2, .shift = 24, .size = 8 },
+};
+
+static struct clksrc_clk exynos5_clksrcs[] = {
+        {
+                .clk    = {
+                        .name           = "sclk_dwmci",
+                        .parent         = &exynos5_clk_dout_mmc4.clk,
+                        .enable         = exynos5_clksrc_mask_fsys_ctrl,
+                        .ctrlbit        = (1 << 16),
+                },
+                .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS3, .shift = 8, .size = 8 },
+        }, {
+                .clk    = {
+                        .name           = "sclk_fimd",
+                        .devname        = "s3cfb.1",
+                        .enable         = exynos5_clksrc_mask_disp1_0_ctrl,
+                        .ctrlbit        = (1 << 0),
+                },
+                .sources = &exynos5_clkset_group,
+                .reg_src = { .reg = EXYNOS5_CLKSRC_DISP1_0, .shift = 0, .size = 4 },
+                .reg_div = { .reg = EXYNOS5_CLKDIV_DISP1_0, .shift = 0, .size = 4 },
+        }, {
+                .clk    = {
+                        .name           = "aclk_266_gscl",
+                },
+                .sources = &clk_src_gscl_266,
+                .reg_src = { .reg = EXYNOS5_CLKSRC_TOP3, .shift = 8, .size = 1 },
+        }, {
+                .clk    = {
+                        .name           = "sclk_g3d",
+                        .devname        = "mali-t604.0",
+                        .enable         = exynos5_clk_block_ctrl,
+                        .ctrlbit        = (1 << 1),
+                },
+                .sources = &exynos5_clkset_aclk,
+                .reg_src = { .reg = EXYNOS5_CLKSRC_TOP0, .shift = 20, .size = 1 },
+                .reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 24, .size = 3 },
+        }, {
+                .clk    = {
+                        .name           = "sclk_gscl_wrap",
+                        .devname        = "s5p-mipi-csis.0",
+                        .enable         = exynos5_clksrc_mask_gscl_ctrl,
+                        .ctrlbit        = (1 << 24),
+                },
+                .sources = &exynos5_clkset_group,
+                .reg_src = { .reg = EXYNOS5_CLKSRC_GSCL, .shift = 24, .size = 4 },
+                .reg_div = { .reg = EXYNOS5_CLKDIV_GSCL, .shift = 24, .size = 4 },
+        }, {
+                .clk    = {
+                        .name           = "sclk_gscl_wrap",
+                        .devname        = "s5p-mipi-csis.1",
+                        .enable         = exynos5_clksrc_mask_gscl_ctrl,
+                        .ctrlbit        = (1 << 28),
+                },
+                .sources = &exynos5_clkset_group,
+                .reg_src = { .reg = EXYNOS5_CLKSRC_GSCL, .shift = 28, .size = 4 },
+                .reg_div = { .reg = EXYNOS5_CLKDIV_GSCL, .shift = 28, .size = 4 },
+        }, {
+                .clk    = {
+                        .name           = "sclk_cam0",
+                        .enable         = exynos5_clksrc_mask_gscl_ctrl,
+                        .ctrlbit        = (1 << 16),
+                },
+                .sources = &exynos5_clkset_group,
+                .reg_src = { .reg = EXYNOS5_CLKSRC_GSCL, .shift = 16, .size = 4 },
+                .reg_div = { .reg = EXYNOS5_CLKDIV_GSCL, .shift = 16, .size = 4 },
+        }, {
+                .clk    = {
+                        .name           = "sclk_cam1",
+                        .enable         = exynos5_clksrc_mask_gscl_ctrl,
+                        .ctrlbit        = (1 << 20),
+                },
+                .sources = &exynos5_clkset_group,
+                .reg_src = { .reg = EXYNOS5_CLKSRC_GSCL, .shift = 20, .size = 4 },
+                .reg_div = { .reg = EXYNOS5_CLKDIV_GSCL, .shift = 20, .size = 4 },
+        }, {
+                .clk    = {
+                        .name           = "sclk_jpeg",
+                        .parent         = &exynos5_clk_mout_cpll.clk,
+                },
+                .reg_div = { .reg = EXYNOS5_CLKDIV_GEN, .shift = 4, .size = 3 },
+        },
+};
+
+/* Clock initialization code */
+static struct clksrc_clk *exynos5_sysclks[] = {
+        &exynos5_clk_mout_apll,
+        &exynos5_clk_sclk_apll,
+        &exynos5_clk_mout_bpll,
+        &exynos5_clk_mout_bpll_user,
+        &exynos5_clk_mout_cpll,
+        &exynos5_clk_mout_epll,
+        &exynos5_clk_mout_mpll,
+        &exynos5_clk_mout_mpll_user,
+        &exynos5_clk_vpllsrc,
+        &exynos5_clk_sclk_vpll,
+        &exynos5_clk_mout_cpu,
+        &exynos5_clk_dout_armclk,
+        &exynos5_clk_dout_arm2clk,
+        &exynos5_clk_cdrex,
+        &exynos5_clk_aclk_400,
+        &exynos5_clk_aclk_333,
+        &exynos5_clk_aclk_266,
+        &exynos5_clk_aclk_200,
+        &exynos5_clk_aclk_166,
+        &exynos5_clk_aclk_66_pre,
+        &exynos5_clk_aclk_66,
+        &exynos5_clk_dout_mmc0,
+        &exynos5_clk_dout_mmc1,
+        &exynos5_clk_dout_mmc2,
+        &exynos5_clk_dout_mmc3,
+        &exynos5_clk_dout_mmc4,
+        &exynos5_clk_aclk_acp,
+        &exynos5_clk_pclk_acp,
+};
+
+static struct clk *exynos5_clk_cdev[] = {
+        &exynos5_clk_pdma0,
+        &exynos5_clk_pdma1,
+        &exynos5_clk_mdma1,
+};
+
+static struct clksrc_clk *exynos5_clksrc_cdev[] = {
+        &exynos5_clk_sclk_uart0,
+        &exynos5_clk_sclk_uart1,
+        &exynos5_clk_sclk_uart2,
+        &exynos5_clk_sclk_uart3,
+        &exynos5_clk_sclk_mmc0,
+        &exynos5_clk_sclk_mmc1,
+        &exynos5_clk_sclk_mmc2,
+        &exynos5_clk_sclk_mmc3,
+};
+
+static struct clk_lookup exynos5_clk_lookup[] = {
+        CLKDEV_INIT("exynos4210-uart.0", "clk_uart_baud0", &exynos5_clk_sclk_uart0.clk),
+        CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &exynos5_clk_sclk_uart1.clk),
+        CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &exynos5_clk_sclk_uart2.clk),
+        CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &exynos5_clk_sclk_uart3.clk),
+        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &exynos5_clk_sclk_mmc0.clk),
+        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &exynos5_clk_sclk_mmc1.clk),
+        CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &exynos5_clk_sclk_mmc2.clk),
+        CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &exynos5_clk_sclk_mmc3.clk),
+        CLKDEV_INIT("dma-pl330.0", "apb_pclk", &exynos5_clk_pdma0),
+        CLKDEV_INIT("dma-pl330.1", "apb_pclk", &exynos5_clk_pdma1),
+        CLKDEV_INIT("dma-pl330.2", "apb_pclk", &exynos5_clk_mdma1),
+};
+
+static unsigned long exynos5_epll_get_rate(struct clk *clk)
+{
+        return clk->rate;
+}
+
+static struct clk *exynos5_clks[] __initdata = {
+        &exynos5_clk_sclk_hdmi27m,
+        &exynos5_clk_sclk_hdmiphy,
+        &clk_fout_bpll,
+        &clk_fout_cpll,
+        &exynos5_clk_armclk,
+};
+
+static u32 epll_div[][6] = {
+        { 192000000, 0, 48, 3, 1, 0 },
+        { 180000000, 0, 45, 3, 1, 0 },
+        {  73728000, 1, 73, 3, 3, 47710 },
+        {  67737600, 1, 90, 4, 3, 20762 },
+        {  49152000, 0, 49, 3, 3, 9961 },
+        {  45158400, 0, 45, 3, 3, 10381 },
+        { 180633600, 0, 45, 3, 1, 10381 },
+};
+
+static int exynos5_epll_set_rate(struct clk *clk, unsigned long rate)
+{
+        unsigned int epll_con, epll_con_k;
+        unsigned int i;
+        unsigned int tmp;
+        unsigned int epll_rate;
+        unsigned int locktime;
+        unsigned int lockcnt;
+
+        /* Return if nothing changed */
+        if (clk->rate == rate)
+                return 0;
+
+        if (clk->parent)
+                epll_rate = clk_get_rate(clk->parent);
+        else
+                epll_rate = clk_ext_xtal_mux.rate;
+
+        if (epll_rate != 24000000) {
+                pr_err("Invalid Clock : recommended clock is 24MHz.\n");
+                return -EINVAL;
+        }
+
+        epll_con = __raw_readl(EXYNOS5_EPLL_CON0);
+        epll_con &= ~(0x1 << 27 | \
+                        PLL46XX_MDIV_MASK << PLL46XX_MDIV_SHIFT |   \
+                        PLL46XX_PDIV_MASK << PLL46XX_PDIV_SHIFT | \
+                        PLL46XX_SDIV_MASK << PLL46XX_SDIV_SHIFT);
+
+        for (i = 0; i < ARRAY_SIZE(epll_div); i++) {
+                if (epll_div[i][0] == rate) {
+                        epll_con_k = epll_div[i][5] << 0;
+                        epll_con |= epll_div[i][1] << 27;
+                        epll_con |= epll_div[i][2] << PLL46XX_MDIV_SHIFT;
+                        epll_con |= epll_div[i][3] << PLL46XX_PDIV_SHIFT;
+                        epll_con |= epll_div[i][4] << PLL46XX_SDIV_SHIFT;
+                        break;
+                }
+        }
+
+        if (i == ARRAY_SIZE(epll_div)) {
+                printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n",
+                                __func__);
+                return -EINVAL;
+        }
+
+        epll_rate /= 1000000;
+
+        /* 3000 max_cycls : specification data */
+        locktime = 3000 / epll_rate * epll_div[i][3];
+        lockcnt = locktime * 10000 / (10000 / epll_rate);
+
+        __raw_writel(lockcnt, EXYNOS5_EPLL_LOCK);
+
+        __raw_writel(epll_con, EXYNOS5_EPLL_CON0);
+        __raw_writel(epll_con_k, EXYNOS5_EPLL_CON1);
+
+        do {
+                tmp = __raw_readl(EXYNOS5_EPLL_CON0);
+        } while (!(tmp & 0x1 << EXYNOS5_EPLLCON0_LOCKED_SHIFT));
+
+        clk->rate = rate;
+
+        return 0;
+}
+
+static struct clk_ops exynos5_epll_ops = {
+        .get_rate = exynos5_epll_get_rate,
+        .set_rate = exynos5_epll_set_rate,
+};
+
+static int xtal_rate;
+
+static unsigned long exynos5_fout_apll_get_rate(struct clk *clk)
+{
+        return s5p_get_pll35xx(xtal_rate, __raw_readl(EXYNOS5_APLL_CON0));
+}
+
+static struct clk_ops exynos5_fout_apll_ops = {
+        .get_rate = exynos5_fout_apll_get_rate,
+};
+
+#ifdef CONFIG_PM
+static int exynos5_clock_suspend(void)
+{
+        s3c_pm_do_save(exynos5_clock_save, ARRAY_SIZE(exynos5_clock_save));
+
+        return 0;
+}
+
+static void exynos5_clock_resume(void)
+{
+        s3c_pm_do_restore_core(exynos5_clock_save, ARRAY_SIZE(exynos5_clock_save));
+}
+#else
+#define exynos5_clock_suspend NULL
+#define exynos5_clock_resume NULL
+#endif
+
+struct syscore_ops exynos5_clock_syscore_ops = {
+        .suspend        = exynos5_clock_suspend,
+        .resume         = exynos5_clock_resume,
+};
+
+void __init_or_cpufreq exynos5_setup_clocks(void)
+{
+        struct clk *xtal_clk;
+        unsigned long apll;
+        unsigned long bpll;
+        unsigned long cpll;
+        unsigned long mpll;
+        unsigned long epll;
+        unsigned long vpll;
+        unsigned long vpllsrc;
+        unsigned long xtal;
+        unsigned long armclk;
+        unsigned long mout_cdrex;
+        unsigned long aclk_400;
+        unsigned long aclk_333;
+        unsigned long aclk_266;
+        unsigned long aclk_200;
+        unsigned long aclk_166;
+        unsigned long aclk_66;
+        unsigned int ptr;
+
+        printk(KERN_DEBUG "%s: registering clocks\n", __func__);
+
+        xtal_clk = clk_get(NULL, "xtal");
+        BUG_ON(IS_ERR(xtal_clk));
+
+        xtal = clk_get_rate(xtal_clk);
+
+        xtal_rate = xtal;
+
+        clk_put(xtal_clk);
+
+        printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
+
+        apll = s5p_get_pll35xx(xtal, __raw_readl(EXYNOS5_APLL_CON0));
+        bpll = s5p_get_pll35xx(xtal, __raw_readl(EXYNOS5_BPLL_CON0));
+        cpll = s5p_get_pll35xx(xtal, __raw_readl(EXYNOS5_CPLL_CON0));
+        mpll = s5p_get_pll35xx(xtal, __raw_readl(EXYNOS5_MPLL_CON0));
+        epll = s5p_get_pll36xx(xtal, __raw_readl(EXYNOS5_EPLL_CON0),
+                        __raw_readl(EXYNOS5_EPLL_CON1));
+
+        vpllsrc = clk_get_rate(&exynos5_clk_vpllsrc.clk);
+        vpll = s5p_get_pll36xx(vpllsrc, __raw_readl(EXYNOS5_VPLL_CON0),
+                        __raw_readl(EXYNOS5_VPLL_CON1));
+
+        clk_fout_apll.ops = &exynos5_fout_apll_ops;
+        clk_fout_bpll.rate = bpll;
+        clk_fout_cpll.rate = cpll;
+        clk_fout_mpll.rate = mpll;
+        clk_fout_epll.rate = epll;
+        clk_fout_vpll.rate = vpll;
+
+        printk(KERN_INFO "EXYNOS5: PLL settings, A=%ld, B=%ld, C=%ld\n"
+                        "M=%ld, E=%ld V=%ld",
+                        apll, bpll, cpll, mpll, epll, vpll);
+
+        armclk = clk_get_rate(&exynos5_clk_armclk);
+        mout_cdrex = clk_get_rate(&exynos5_clk_cdrex.clk);
+
+        aclk_400 = clk_get_rate(&exynos5_clk_aclk_400.clk);
+        aclk_333 = clk_get_rate(&exynos5_clk_aclk_333.clk);
+        aclk_266 = clk_get_rate(&exynos5_clk_aclk_266.clk);
+        aclk_200 = clk_get_rate(&exynos5_clk_aclk_200.clk);
+        aclk_166 = clk_get_rate(&exynos5_clk_aclk_166.clk);
+        aclk_66 = clk_get_rate(&exynos5_clk_aclk_66.clk);
+
+        printk(KERN_INFO "EXYNOS5: ARMCLK=%ld, CDREX=%ld, ACLK400=%ld\n"
+                        "ACLK333=%ld, ACLK266=%ld, ACLK200=%ld\n"
+                        "ACLK166=%ld, ACLK66=%ld\n",
+                        armclk, mout_cdrex, aclk_400,
+                        aclk_333, aclk_266, aclk_200,
+                        aclk_166, aclk_66);
+
+
+        clk_fout_epll.ops = &exynos5_epll_ops;
+
+        if (clk_set_parent(&exynos5_clk_mout_epll.clk, &clk_fout_epll))
+                printk(KERN_ERR "Unable to set parent %s of clock %s.\n",
+                                clk_fout_epll.name, exynos5_clk_mout_epll.clk.name);
+
+        clk_set_rate(&exynos5_clk_sclk_apll.clk, 100000000);
+        clk_set_rate(&exynos5_clk_aclk_266.clk, 300000000);
+
+        clk_set_rate(&exynos5_clk_aclk_acp.clk, 267000000);
+        clk_set_rate(&exynos5_clk_pclk_acp.clk, 134000000);
+
+        for (ptr = 0; ptr < ARRAY_SIZE(exynos5_clksrcs); ptr++)
+                s3c_set_clksrc(&exynos5_clksrcs[ptr], true);
+}
+
+void __init exynos5_register_clocks(void)
+{
+        int ptr;
+
+        s3c24xx_register_clocks(exynos5_clks, ARRAY_SIZE(exynos5_clks));
+
+        for (ptr = 0; ptr < ARRAY_SIZE(exynos5_sysclks); ptr++)
+                s3c_register_clksrc(exynos5_sysclks[ptr], 1);
+
+        for (ptr = 0; ptr < ARRAY_SIZE(exynos5_sclk_tv); ptr++)
+                s3c_register_clksrc(exynos5_sclk_tv[ptr], 1);
+
+        for (ptr = 0; ptr < ARRAY_SIZE(exynos5_clksrc_cdev); ptr++)
+                s3c_register_clksrc(exynos5_clksrc_cdev[ptr], 1);
+
+        s3c_register_clksrc(exynos5_clksrcs, ARRAY_SIZE(exynos5_clksrcs));
+        s3c_register_clocks(exynos5_init_clocks_on, ARRAY_SIZE(exynos5_init_clocks_on));
+
+        s3c24xx_register_clocks(exynos5_clk_cdev, ARRAY_SIZE(exynos5_clk_cdev));
+        for (ptr = 0; ptr < ARRAY_SIZE(exynos5_clk_cdev); ptr++)
+                s3c_disable_clocks(exynos5_clk_cdev[ptr], 1);
+
+        s3c_register_clocks(exynos5_init_clocks_off, ARRAY_SIZE(exynos5_init_clocks_off));
+        s3c_disable_clocks(exynos5_init_clocks_off, ARRAY_SIZE(exynos5_init_clocks_off));
+        clkdev_add_table(exynos5_clk_lookup, ARRAY_SIZE(exynos5_clk_lookup));
+
+        register_syscore_ops(&exynos5_clock_syscore_ops);
+        s3c_pwmclk_init();
+}
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 97ca2592ce83..8614aab47cc0 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -53,6 +53,14 @@
 static const char name_exynos4210[] = "EXYNOS4210";
 static const char name_exynos4212[] = "EXYNOS4212";
 static const char name_exynos4412[] = "EXYNOS4412";
+static const char name_exynos5250[] = "EXYNOS5250";
+
+static void exynos4_map_io(void);
+static void exynos5_map_io(void);
+static void exynos4_init_clocks(int xtal);
+static void exynos5_init_clocks(int xtal);
+static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+static int exynos_init(void);
 
 static struct cpu_table cpu_ids[] __initdata = {
         {
@@ -60,7 +68,7 @@ static struct cpu_table cpu_ids[] __initdata = {
                 .idmask         = EXYNOS4_CPU_MASK,
                 .map_io         = exynos4_map_io,
                 .init_clocks    = exynos4_init_clocks,
-                .init_uarts     = exynos4_init_uarts,
+                .init_uarts     = exynos_init_uarts,
                 .init           = exynos_init,
                 .name           = name_exynos4210,
         }, {
@@ -68,7 +76,7 @@ static struct cpu_table cpu_ids[] __initdata = {
                 .idmask         = EXYNOS4_CPU_MASK,
                 .map_io         = exynos4_map_io,
                 .init_clocks    = exynos4_init_clocks,
-                .init_uarts     = exynos4_init_uarts,
+                .init_uarts     = exynos_init_uarts,
                 .init           = exynos_init,
                 .name           = name_exynos4212,
         }, {
@@ -76,9 +84,17 @@ static struct cpu_table cpu_ids[] __initdata = {
                 .idmask         = EXYNOS4_CPU_MASK,
                 .map_io         = exynos4_map_io,
                 .init_clocks    = exynos4_init_clocks,
-                .init_uarts     = exynos4_init_uarts,
+                .init_uarts     = exynos_init_uarts,
                 .init           = exynos_init,
                 .name           = name_exynos4412,
+        }, {
+                .idcode         = EXYNOS5250_SOC_ID,
+                .idmask         = EXYNOS5_SOC_MASK,
+                .map_io         = exynos5_map_io,
+                .init_clocks    = exynos5_init_clocks,
+                .init_uarts     = exynos_init_uarts,
+                .init           = exynos_init,
+                .name           = name_exynos5250,
         },
 };
 
@@ -87,10 +103,14 @@ static struct cpu_table cpu_ids[] __initdata = {
 static struct map_desc exynos_iodesc[] __initdata = {
         {
                 .virtual        = (unsigned long)S5P_VA_CHIPID,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_CHIPID),
+                .pfn            = __phys_to_pfn(EXYNOS_PA_CHIPID),
                 .length         = SZ_4K,
                 .type           = MT_DEVICE,
-        }, {
+        },
+};
+
+static struct map_desc exynos4_iodesc[] __initdata = {
+        {
                 .virtual        = (unsigned long)S3C_VA_SYS,
                 .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSCON),
                 .length         = SZ_64K,
@@ -140,11 +160,7 @@ static struct map_desc exynos_iodesc[] __initdata = {
                 .pfn            = __phys_to_pfn(EXYNOS4_PA_UART),
                 .length         = SZ_512K,
                 .type           = MT_DEVICE,
-        },
-};
-
-static struct map_desc exynos4_iodesc[] __initdata = {
-        {
+        }, {
                 .virtual        = (unsigned long)S5P_VA_CMU,
                 .pfn            = __phys_to_pfn(EXYNOS4_PA_CMU),
                 .length         = SZ_128K,
@@ -160,21 +176,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
                 .length         = SZ_4K,
                 .type           = MT_DEVICE,
         }, {
-                .virtual        = (unsigned long)S5P_VA_GPIO1,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_GPIO1),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GPIO2,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_GPIO2),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GPIO3,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_GPIO3),
-                .length         = SZ_256,
-                .type           = MT_DEVICE,
-        }, {
                 .virtual        = (unsigned long)S5P_VA_DMC0,
                 .pfn            = __phys_to_pfn(EXYNOS4_PA_DMC0),
                 .length         = SZ_64K,
@@ -210,11 +211,80 @@ static struct map_desc exynos4_iodesc1[] __initdata = {
         },
 };
 
+static struct map_desc exynos5_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S3C_VA_SYS,
+                .pfn            = __phys_to_pfn(EXYNOS5_PA_SYSCON),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_TIMER,
+                .pfn            = __phys_to_pfn(EXYNOS5_PA_TIMER),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_WATCHDOG,
+                .pfn            = __phys_to_pfn(EXYNOS5_PA_WATCHDOG),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_SROMC,
+                .pfn            = __phys_to_pfn(EXYNOS5_PA_SROMC),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_SYSTIMER,
+                .pfn            = __phys_to_pfn(EXYNOS5_PA_SYSTIMER),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_SYSRAM,
+                .pfn            = __phys_to_pfn(EXYNOS5_PA_SYSRAM),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_CMU,
+                .pfn            = __phys_to_pfn(EXYNOS5_PA_CMU),
+                .length         = 144 * SZ_1K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_PMU,
+                .pfn            = __phys_to_pfn(EXYNOS5_PA_PMU),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_COMBINER_BASE,
+                .pfn            = __phys_to_pfn(EXYNOS5_PA_COMBINER),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_UART,
+                .pfn            = __phys_to_pfn(EXYNOS5_PA_UART),
+                .length         = SZ_512K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_GIC_CPU,
+                .pfn            = __phys_to_pfn(EXYNOS5_PA_GIC_CPU),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_GIC_DIST,
+                .pfn            = __phys_to_pfn(EXYNOS5_PA_GIC_DIST),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        },
+};
+
 void exynos4_restart(char mode, const char *cmd)
 {
         __raw_writel(0x1, S5P_SWRESET);
 }
 
+void exynos5_restart(char mode, const char *cmd)
+{
+        __raw_writel(0x1, EXYNOS_SWRESET);
+}
+
 /*
  * exynos_map_io
  *
@@ -234,7 +304,7 @@ void __init exynos_init_io(struct map_desc *mach_desc, int size)
         s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
 }
 
-void __init exynos4_map_io(void)
+static void __init exynos4_map_io(void)
 {
         iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
 
@@ -265,7 +335,22 @@ void __init exynos4_map_io(void)
         s5p_hdmi_setname("exynos4-hdmi");
 }
 
-void __init exynos4_init_clocks(int xtal)
+static void __init exynos5_map_io(void)
+{
+        iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
+
+        s3c_device_i2c0.resource[0].start = EXYNOS5_PA_IIC(0);
+        s3c_device_i2c0.resource[0].end   = EXYNOS5_PA_IIC(0) + SZ_4K - 1;
+        s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC;
+        s3c_device_i2c0.resource[1].end   = EXYNOS5_IRQ_IIC;
+
+        /* The I2C bus controllers are directly compatible with s3c2440 */
+        s3c_i2c0_setname("s3c2440-i2c");
+        s3c_i2c1_setname("s3c2440-i2c");
+        s3c_i2c2_setname("s3c2440-i2c");
+}
+
+static void __init exynos4_init_clocks(int xtal)
 {
         printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
 
@@ -281,6 +366,17 @@ void __init exynos4_init_clocks(int xtal)
         exynos4_setup_clocks();
 }
 
+static void __init exynos5_init_clocks(int xtal)
+{
+        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
+        s3c24xx_register_baseclocks(xtal);
+        s5p_register_clocks(xtal);
+
+        exynos5_register_clocks();
+        exynos5_setup_clocks();
+}
+
 #define COMBINER_ENABLE_SET     0x0
 #define COMBINER_ENABLE_CLEAR   0x4
 #define COMBINER_INT_STATUS     0xC
@@ -354,7 +450,14 @@ static struct irq_chip combiner_chip = {
 
 static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
 {
-        if (combiner_nr >= MAX_COMBINER_NR)
+        unsigned int max_nr;
+
+        if (soc_is_exynos5250())
+                max_nr = EXYNOS5_MAX_COMBINER_NR;
+        else
+                max_nr = EXYNOS4_MAX_COMBINER_NR;
+
+        if (combiner_nr >= max_nr)
                 BUG();
         if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0)
                 BUG();
@@ -365,8 +468,14 @@ static void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
                           unsigned int irq_start)
 {
         unsigned int i;
+        unsigned int max_nr;
 
-        if (combiner_nr >= MAX_COMBINER_NR)
+        if (soc_is_exynos5250())
+                max_nr = EXYNOS5_MAX_COMBINER_NR;
+        else
+                max_nr = EXYNOS4_MAX_COMBINER_NR;
+
+        if (combiner_nr >= max_nr)
                 BUG();
 
         combiner_data[combiner_nr].base = base;
@@ -409,7 +518,7 @@ void __init exynos4_init_irq(void)
                 of_irq_init(exynos4_dt_irq_match);
 #endif
 
-        for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
+        for (irq = 0; irq < EXYNOS4_MAX_COMBINER_NR; irq++) {
 
                 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
                                 COMBINER_IRQ(irq, 0));
@@ -424,25 +533,61 @@ void __init exynos4_init_irq(void)
         s5p_init_irq(NULL, 0);
 }
 
+void __init exynos5_init_irq(void)
+{
+        int irq;
+
+        gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
+
+        for (irq = 0; irq < EXYNOS5_MAX_COMBINER_NR; irq++) {
+                combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
+                                COMBINER_IRQ(irq, 0));
+                combiner_cascade_irq(irq, IRQ_SPI(irq));
+        }
+
+        /*
+         * The parameters of s5p_init_irq() are for VIC init.
+         * Theses parameters should be NULL and 0 because EXYNOS4
+         * uses GIC instead of VIC.
+         */
+        s5p_init_irq(NULL, 0);
+}
+
 struct bus_type exynos4_subsys = {
         .name           = "exynos4-core",
         .dev_name       = "exynos4-core",
 };
 
+struct bus_type exynos5_subsys = {
+        .name           = "exynos5-core",
+        .dev_name       = "exynos5-core",
+};
+
 static struct device exynos4_dev = {
         .bus    = &exynos4_subsys,
 };
 
-static int __init exynos4_core_init(void)
+static struct device exynos5_dev = {
+        .bus    = &exynos5_subsys,
+};
+
+static int __init exynos_core_init(void)
 {
-        return subsys_system_register(&exynos4_subsys, NULL);
+        if (soc_is_exynos5250())
+                return subsys_system_register(&exynos5_subsys, NULL);
+        else
+                return subsys_system_register(&exynos4_subsys, NULL);
 }
-core_initcall(exynos4_core_init);
+core_initcall(exynos_core_init);
 
 #ifdef CONFIG_CACHE_L2X0
 static int __init exynos4_l2x0_cache_init(void)
 {
         int ret;
+
+        if (soc_is_exynos5250())
+                return 0;
+
         ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK);
         if (!ret) {
                 l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs);
@@ -486,19 +631,47 @@ static int __init exynos4_l2x0_cache_init(void)
         l2x0_init(S5P_VA_L2CC, L2_AUX_VAL, L2_AUX_MASK);
         return 0;
 }
-
 early_initcall(exynos4_l2x0_cache_init);
 #endif
 
-int __init exynos_init(void)
+static int __init exynos5_l2_cache_init(void)
+{
+        unsigned int val;
+
+        if (!soc_is_exynos5250())
+                return 0;
+
+        asm volatile("mrc p15, 0, %0, c1, c0, 0\n"
+                     "bic %0, %0, #(1 << 2)\n"  /* cache disable */
+                     "mcr p15, 0, %0, c1, c0, 0\n"
+                     "mrc p15, 1, %0, c9, c0, 2\n"
+                     : "=r"(val));
+
+        val |= (1 << 9) | (1 << 5) | (2 << 6) | (2 << 0);
+
+        asm volatile("mcr p15, 1, %0, c9, c0, 2\n" : : "r"(val));
+        asm volatile("mrc p15, 0, %0, c1, c0, 0\n"
+                     "orr %0, %0, #(1 << 2)\n"  /* cache enable */
+                     "mcr p15, 0, %0, c1, c0, 0\n"
+                     : : "r"(val));
+
+        return 0;
+}
+early_initcall(exynos5_l2_cache_init);
+
+static int __init exynos_init(void)
 {
         printk(KERN_INFO "EXYNOS: Initializing architecture\n");
-        return device_register(&exynos4_dev);
+
+        if (soc_is_exynos5250())
+                return device_register(&exynos5_dev);
+        else
+                return device_register(&exynos4_dev);
 }
 
 /* uart registration process */
 
-void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 {
         struct s3c2410_uartcfg *tcfg = cfg;
         u32 ucnt;
@@ -506,69 +679,138 @@ void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
         for (ucnt = 0; ucnt < no; ucnt++, tcfg++)
                 tcfg->has_fracval = 1;
 
-        s3c24xx_init_uartdevs("exynos4210-uart", s5p_uart_resources, cfg, no);
+        if (soc_is_exynos5250())
+                s3c24xx_init_uartdevs("exynos4210-uart", exynos5_uart_resources, cfg, no);
+        else
+                s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no);
 }
 
+static void __iomem *exynos_eint_base;
+
 static DEFINE_SPINLOCK(eint_lock);
 
 static unsigned int eint0_15_data[16];
 
-static unsigned int exynos4_get_irq_nr(unsigned int number)
+static inline int exynos4_irq_to_gpio(unsigned int irq)
 {
-        u32 ret = 0;
+        if (irq < IRQ_EINT(0))
+                return -EINVAL;
 
-        switch (number) {
-        case 0 ... 3:
-                ret = (number + IRQ_EINT0);
-                break;
-        case 4 ... 7:
-                ret = (number + (IRQ_EINT4 - 4));
-                break;
-        case 8 ... 15:
-                ret = (number + (IRQ_EINT8 - 8));
-                break;
-        default:
-                printk(KERN_ERR "number available : %d\n", number);
-        }
+        irq -= IRQ_EINT(0);
+        if (irq < 8)
+                return EXYNOS4_GPX0(irq);
+
+        irq -= 8;
+        if (irq < 8)
+                return EXYNOS4_GPX1(irq);
+
+        irq -= 8;
+        if (irq < 8)
+                return EXYNOS4_GPX2(irq);
+
+        irq -= 8;
+        if (irq < 8)
+                return EXYNOS4_GPX3(irq);
+
+        return -EINVAL;
+}
 
-        return ret;
+static inline int exynos5_irq_to_gpio(unsigned int irq)
+{
+        if (irq < IRQ_EINT(0))
+                return -EINVAL;
+
+        irq -= IRQ_EINT(0);
+        if (irq < 8)
+                return EXYNOS5_GPX0(irq);
+
+        irq -= 8;
+        if (irq < 8)
+                return EXYNOS5_GPX1(irq);
+
+        irq -= 8;
+        if (irq < 8)
+                return EXYNOS5_GPX2(irq);
+
+        irq -= 8;
+        if (irq < 8)
+                return EXYNOS5_GPX3(irq);
+
+        return -EINVAL;
 }
 
-static inline void exynos4_irq_eint_mask(struct irq_data *data)
+static unsigned int exynos4_eint0_15_src_int[16] = {
+        EXYNOS4_IRQ_EINT0,
+        EXYNOS4_IRQ_EINT1,
+        EXYNOS4_IRQ_EINT2,
+        EXYNOS4_IRQ_EINT3,
+        EXYNOS4_IRQ_EINT4,
+        EXYNOS4_IRQ_EINT5,
+        EXYNOS4_IRQ_EINT6,
+        EXYNOS4_IRQ_EINT7,
+        EXYNOS4_IRQ_EINT8,
+        EXYNOS4_IRQ_EINT9,
+        EXYNOS4_IRQ_EINT10,
+        EXYNOS4_IRQ_EINT11,
+        EXYNOS4_IRQ_EINT12,
+        EXYNOS4_IRQ_EINT13,
+        EXYNOS4_IRQ_EINT14,
+        EXYNOS4_IRQ_EINT15,
+};
+
+static unsigned int exynos5_eint0_15_src_int[16] = {
+        EXYNOS5_IRQ_EINT0,
+        EXYNOS5_IRQ_EINT1,
+        EXYNOS5_IRQ_EINT2,
+        EXYNOS5_IRQ_EINT3,
+        EXYNOS5_IRQ_EINT4,
+        EXYNOS5_IRQ_EINT5,
+        EXYNOS5_IRQ_EINT6,
+        EXYNOS5_IRQ_EINT7,
+        EXYNOS5_IRQ_EINT8,
+        EXYNOS5_IRQ_EINT9,
+        EXYNOS5_IRQ_EINT10,
+        EXYNOS5_IRQ_EINT11,
+        EXYNOS5_IRQ_EINT12,
+        EXYNOS5_IRQ_EINT13,
+        EXYNOS5_IRQ_EINT14,
+        EXYNOS5_IRQ_EINT15,
+};
+static inline void exynos_irq_eint_mask(struct irq_data *data)
 {
         u32 mask;
 
         spin_lock(&eint_lock);
-        mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
-        mask |= eint_irq_to_bit(data->irq);
-        __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
+        mask = __raw_readl(EINT_MASK(exynos_eint_base, data->irq));
+        mask |= EINT_OFFSET_BIT(data->irq);
+        __raw_writel(mask, EINT_MASK(exynos_eint_base, data->irq));
         spin_unlock(&eint_lock);
 }
 
-static void exynos4_irq_eint_unmask(struct irq_data *data)
+static void exynos_irq_eint_unmask(struct irq_data *data)
 {
         u32 mask;
 
         spin_lock(&eint_lock);
-        mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
-        mask &= ~(eint_irq_to_bit(data->irq));
-        __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
+        mask = __raw_readl(EINT_MASK(exynos_eint_base, data->irq));
+        mask &= ~(EINT_OFFSET_BIT(data->irq));
+        __raw_writel(mask, EINT_MASK(exynos_eint_base, data->irq));
         spin_unlock(&eint_lock);
 }
 
-static inline void exynos4_irq_eint_ack(struct irq_data *data)
+static inline void exynos_irq_eint_ack(struct irq_data *data)
 {
-        __raw_writel(eint_irq_to_bit(data->irq),
-                     S5P_EINT_PEND(EINT_REG_NR(data->irq)));
+        __raw_writel(EINT_OFFSET_BIT(data->irq),
+                     EINT_PEND(exynos_eint_base, data->irq));
 }
 
-static void exynos4_irq_eint_maskack(struct irq_data *data)
+static void exynos_irq_eint_maskack(struct irq_data *data)
 {
-        exynos4_irq_eint_mask(data);
-        exynos4_irq_eint_ack(data);
+        exynos_irq_eint_mask(data);
+        exynos_irq_eint_ack(data);
 }
 
-static int exynos4_irq_eint_set_type(struct irq_data *data, unsigned int type)
+static int exynos_irq_eint_set_type(struct irq_data *data, unsigned int type)
 {
         int offs = EINT_OFFSET(data->irq);
         int shift;
@@ -605,39 +847,27 @@ static int exynos4_irq_eint_set_type(struct irq_data *data, unsigned int type)
         mask = 0x7 << shift;
 
         spin_lock(&eint_lock);
-        ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq)));
+        ctrl = __raw_readl(EINT_CON(exynos_eint_base, data->irq));
         ctrl &= ~mask;
         ctrl |= newvalue << shift;
-        __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq)));
+        __raw_writel(ctrl, EINT_CON(exynos_eint_base, data->irq));
         spin_unlock(&eint_lock);
 
-        switch (offs) {
-        case 0 ... 7:
-                s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE);
-                break;
-        case 8 ... 15:
-                s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE);
-                break;
-        case 16 ... 23:
-                s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE);
-                break;
-        case 24 ... 31:
-                s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE);
-                break;
-        default:
-                printk(KERN_ERR "No such irq number %d", offs);
-        }
+        if (soc_is_exynos5250())
+                s3c_gpio_cfgpin(exynos5_irq_to_gpio(data->irq), S3C_GPIO_SFN(0xf));
+        else
+                s3c_gpio_cfgpin(exynos4_irq_to_gpio(data->irq), S3C_GPIO_SFN(0xf));
 
         return 0;
 }
 
-static struct irq_chip exynos4_irq_eint = {
-        .name           = "exynos4-eint",
-        .irq_mask       = exynos4_irq_eint_mask,
-        .irq_unmask     = exynos4_irq_eint_unmask,
-        .irq_mask_ack   = exynos4_irq_eint_maskack,
-        .irq_ack        = exynos4_irq_eint_ack,
-        .irq_set_type   = exynos4_irq_eint_set_type,
+static struct irq_chip exynos_irq_eint = {
+        .name           = "exynos-eint",
+        .irq_mask       = exynos_irq_eint_mask,
+        .irq_unmask     = exynos_irq_eint_unmask,
+        .irq_mask_ack   = exynos_irq_eint_maskack,
+        .irq_ack        = exynos_irq_eint_ack,
+        .irq_set_type   = exynos_irq_eint_set_type,
 #ifdef CONFIG_PM
         .irq_set_wake   = s3c_irqext_wake,
 #endif
@@ -652,12 +882,12 @@ static struct irq_chip exynos4_irq_eint = {
  *
  * Each EINT pend/mask registers handle eight of them.
  */
-static inline void exynos4_irq_demux_eint(unsigned int start)
+static inline void exynos_irq_demux_eint(unsigned int start)
 {
         unsigned int irq;
 
-        u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start)));
-        u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start)));
+        u32 status = __raw_readl(EINT_PEND(exynos_eint_base, start));
+        u32 mask = __raw_readl(EINT_MASK(exynos_eint_base, start));
 
         status &= ~mask;
         status &= 0xff;
@@ -669,16 +899,16 @@ static inline void exynos4_irq_demux_eint(unsigned int start)
         }
 }
 
-static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
+static void exynos_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
 {
         struct irq_chip *chip = irq_get_chip(irq);
         chained_irq_enter(chip, desc);
-        exynos4_irq_demux_eint(IRQ_EINT(16));
-        exynos4_irq_demux_eint(IRQ_EINT(24));
+        exynos_irq_demux_eint(IRQ_EINT(16));
+        exynos_irq_demux_eint(IRQ_EINT(24));
         chained_irq_exit(chip, desc);
 }
 
-static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
+static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
 {
         u32 *irq_data = irq_get_handler_data(irq);
         struct irq_chip *chip = irq_get_chip(irq);
@@ -695,27 +925,44 @@ static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
         chained_irq_exit(chip, desc);
 }
 
-static int __init exynos4_init_irq_eint(void)
+static int __init exynos_init_irq_eint(void)
 {
         int irq;
 
+        if (soc_is_exynos5250())
+                exynos_eint_base = ioremap(EXYNOS5_PA_GPIO1, SZ_4K);
+        else
+                exynos_eint_base = ioremap(EXYNOS4_PA_GPIO2, SZ_4K);
+
+        if (exynos_eint_base == NULL) {
+                pr_err("unable to ioremap for EINT base address\n");
+                return -ENOMEM;
+        }
+
         for (irq = 0 ; irq <= 31 ; irq++) {
-                irq_set_chip_and_handler(IRQ_EINT(irq), &exynos4_irq_eint,
+                irq_set_chip_and_handler(IRQ_EINT(irq), &exynos_irq_eint,
                                          handle_level_irq);
                 set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
         }
 
-        irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31);
+        irq_set_chained_handler(EXYNOS_IRQ_EINT16_31, exynos_irq_demux_eint16_31);
 
         for (irq = 0 ; irq <= 15 ; irq++) {
                 eint0_15_data[irq] = IRQ_EINT(irq);
 
-                irq_set_handler_data(exynos4_get_irq_nr(irq),
-                                     &eint0_15_data[irq]);
-                irq_set_chained_handler(exynos4_get_irq_nr(irq),
-                                        exynos4_irq_eint0_15);
+                if (soc_is_exynos5250()) {
+                        irq_set_handler_data(exynos5_eint0_15_src_int[irq],
+                                             &eint0_15_data[irq]);
+                        irq_set_chained_handler(exynos5_eint0_15_src_int[irq],
+                                                exynos_irq_eint0_15);
+                } else {
+                        irq_set_handler_data(exynos4_eint0_15_src_int[irq],
+                                             &eint0_15_data[irq]);
+                        irq_set_chained_handler(exynos4_eint0_15_src_int[irq],
+                                                exynos_irq_eint0_15);
+                }
         }
 
         return 0;
 }
-arch_initcall(exynos4_init_irq_eint);
+arch_initcall(exynos_init_irq_eint);
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 8c1efe692c20..677b5467df18 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -12,39 +12,44 @@
 #ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H
 #define __ARCH_ARM_MACH_EXYNOS_COMMON_H
 
+extern struct sys_timer exynos4_timer;
+
 void exynos_init_io(struct map_desc *mach_desc, int size);
 void exynos4_init_irq(void);
+void exynos5_init_irq(void);
+void exynos4_restart(char mode, const char *cmd);
+void exynos5_restart(char mode, const char *cmd);
 
 #ifdef CONFIG_ARCH_EXYNOS4
 void exynos4_register_clocks(void);
 void exynos4_setup_clocks(void);
 
-void exynos4210_register_clocks(void);
-void exynos4212_register_clocks(void);
-
 #else
 #define exynos4_register_clocks()
 #define exynos4_setup_clocks()
+#endif
 
-#define exynos4210_register_clocks()
-#define exynos4212_register_clocks()
+#ifdef CONFIG_ARCH_EXYNOS5
+void exynos5_register_clocks(void);
+void exynos5_setup_clocks(void);
+
+#else
+#define exynos5_register_clocks()
+#define exynos5_setup_clocks()
 #endif
 
-void exynos4_restart(char mode, const char *cmd);
+#ifdef CONFIG_CPU_EXYNOS4210
+void exynos4210_register_clocks(void);
 
-extern struct sys_timer exynos4_timer;
+#else
+#define exynos4210_register_clocks()
+#endif
 
-#ifdef CONFIG_ARCH_EXYNOS
-extern  int exynos_init(void);
-extern void exynos4_map_io(void);
-extern void exynos4_init_clocks(int xtal);
-extern void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+#ifdef CONFIG_SOC_EXYNOS4212
+void exynos4212_register_clocks(void);
 
 #else
-#define exynos4_init_clocks NULL
-#define exynos4_init_uarts NULL
-#define exynos4_map_io NULL
-#define exynos_init NULL
+#define exynos4212_register_clocks()
 #endif
 
 #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
diff --git a/arch/arm/mach-exynos/dev-ahci.c b/arch/arm/mach-exynos/dev-ahci.c
index f57a3de8e1d2..50ce5b0adcf1 100644
--- a/arch/arm/mach-exynos/dev-ahci.c
+++ b/arch/arm/mach-exynos/dev-ahci.c
@@ -242,8 +242,8 @@ static struct resource exynos4_ahci_resource[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = IRQ_SATA,
-                .end    = IRQ_SATA,
+                .start  = EXYNOS4_IRQ_SATA,
+                .end    = EXYNOS4_IRQ_SATA,
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/arm/mach-exynos/dev-audio.c b/arch/arm/mach-exynos/dev-audio.c
index 5a9f9c2e53bf..7199e1ae79b4 100644
--- a/arch/arm/mach-exynos/dev-audio.c
+++ b/arch/arm/mach-exynos/dev-audio.c
@@ -304,8 +304,8 @@ static struct resource exynos4_ac97_resource[] = {
                 .flags  = IORESOURCE_DMA,
         },
         [4] = {
-                .start  = IRQ_AC97,
-                .end    = IRQ_AC97,
+                .start  = EXYNOS4_IRQ_AC97,
+                .end    = EXYNOS4_IRQ_AC97,
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/arm/mach-exynos/dev-uart.c b/arch/arm/mach-exynos/dev-uart.c
new file mode 100644
index 000000000000..2e85c022fd16
--- /dev/null
+++ b/arch/arm/mach-exynos/dev-uart.c
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Base EXYNOS UART resource and device definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/ioport.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/irq.h>
+#include <mach/hardware.h>
+#include <mach/map.h>
+
+#include <plat/devs.h>
+
+#define EXYNOS_UART_RESOURCE(_series, _nr)      \
+static struct resource exynos##_series##_uart##_nr##_resource[] = {     \
+        [0] = DEFINE_RES_MEM(EXYNOS##_series##_PA_UART##_nr, EXYNOS##_series##_SZ_UART),        \
+        [1] = DEFINE_RES_IRQ(EXYNOS##_series##_IRQ_UART##_nr),  \
+};
+
+EXYNOS_UART_RESOURCE(4, 0)
+EXYNOS_UART_RESOURCE(4, 1)
+EXYNOS_UART_RESOURCE(4, 2)
+EXYNOS_UART_RESOURCE(4, 3)
+
+struct s3c24xx_uart_resources exynos4_uart_resources[] __initdata = {
+        [0] = {
+                .resources      = exynos4_uart0_resource,
+                .nr_resources   = ARRAY_SIZE(exynos4_uart0_resource),
+        },
+        [1] = {
+                .resources      = exynos4_uart1_resource,
+                .nr_resources   = ARRAY_SIZE(exynos4_uart1_resource),
+        },
+        [2] = {
+                .resources      = exynos4_uart2_resource,
+                .nr_resources   = ARRAY_SIZE(exynos4_uart2_resource),
+        },
+        [3] = {
+                .resources      = exynos4_uart3_resource,
+                .nr_resources   = ARRAY_SIZE(exynos4_uart3_resource),
+        },
+};
+
+EXYNOS_UART_RESOURCE(5, 0)
+EXYNOS_UART_RESOURCE(5, 1)
+EXYNOS_UART_RESOURCE(5, 2)
+EXYNOS_UART_RESOURCE(5, 3)
+
+struct s3c24xx_uart_resources exynos5_uart_resources[] __initdata = {
+        [0] = {
+                .resources      = exynos5_uart0_resource,
+                .nr_resources   = ARRAY_SIZE(exynos5_uart0_resource),
+        },
+        [1] = {
+                .resources      = exynos5_uart1_resource,
+                .nr_resources   = ARRAY_SIZE(exynos5_uart0_resource),
+        },
+        [2] = {
+                .resources      = exynos5_uart2_resource,
+                .nr_resources   = ARRAY_SIZE(exynos5_uart2_resource),
+        },
+        [3] = {
+                .resources      = exynos5_uart3_resource,
+                .nr_resources   = ARRAY_SIZE(exynos5_uart3_resource),
+        },
+};
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index 13607c4328b3..69aaa4503205 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -35,8 +35,6 @@
 #include <mach/irqs.h>
 #include <mach/dma.h>
 
-static u64 dma_dmamask = DMA_BIT_MASK(32);
-
 static u8 exynos4210_pdma0_peri[] = {
         DMACH_PCM0_RX,
         DMACH_PCM0_TX,
@@ -108,7 +106,7 @@ static u8 exynos4212_pdma0_peri[] = {
 struct dma_pl330_platdata exynos4_pdma0_pdata;
 
 static AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330,
-        EXYNOS4_PA_PDMA0, {IRQ_PDMA0}, &exynos4_pdma0_pdata);
+        EXYNOS4_PA_PDMA0, {EXYNOS4_IRQ_PDMA0}, &exynos4_pdma0_pdata);
 
 static u8 exynos4210_pdma1_peri[] = {
         DMACH_PCM0_RX,
@@ -174,7 +172,7 @@ static u8 exynos4212_pdma1_peri[] = {
 static struct dma_pl330_platdata exynos4_pdma1_pdata;
 
 static AMBA_AHB_DEVICE(exynos4_pdma1,  "dma-pl330.1", 0x00041330,
-        EXYNOS4_PA_PDMA1, {IRQ_PDMA1}, &exynos4_pdma1_pdata);
+        EXYNOS4_PA_PDMA1, {EXYNOS4_IRQ_PDMA1}, &exynos4_pdma1_pdata);
 
 static u8 mdma_peri[] = {
         DMACH_MTOM_0,
@@ -193,7 +191,7 @@ static struct dma_pl330_platdata exynos4_mdma1_pdata = {
 };
 
 static AMBA_AHB_DEVICE(exynos4_mdma1,  "dma-pl330.2", 0x00041330,
-        EXYNOS4_PA_MDMA1, {IRQ_MDMA1}, &exynos4_mdma1_pdata);
+        EXYNOS4_PA_MDMA1, {EXYNOS4_IRQ_MDMA1}, &exynos4_mdma1_pdata);
 
 static int __init exynos4_dma_init(void)
 {
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index dd1ad55524c9..9c17a0a43858 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -16,6 +16,7 @@
 #include <linux/io.h>
 
 #include <asm/cacheflush.h>
+#include <asm/cp15.h>
 #include <asm/smp_plat.h>
 
 #include <mach/regs-pmu.h>
diff --git a/arch/arm/mach-exynos/include/mach/debug-macro.S b/arch/arm/mach-exynos/include/mach/debug-macro.S
index 6cacf16a67a6..e0c86ea475e7 100644
--- a/arch/arm/mach-exynos/include/mach/debug-macro.S
+++ b/arch/arm/mach-exynos/include/mach/debug-macro.S
@@ -21,8 +21,12 @@
          */
 
         .macro addruart, rp, rv, tmp
-                ldr     \rp, = S3C_PA_UART
-                ldr     \rv, = S3C_VA_UART
+                mrc     p15, 0, \tmp, c0, c0, 0
+                and     \tmp, \tmp, #0xf0
+                teq     \tmp, #0xf0             @@ A15
+                ldreq   \rp, =EXYNOS5_PA_UART
+                movne   \rp, #EXYNOS4_PA_UART   @@ EXYNOS4
+                ldr     \rv, =S3C_VA_UART
 #if CONFIG_DEBUG_S3C_UART != 0
                 add     \rp, \rp, #(0x10000 * CONFIG_DEBUG_S3C_UART)
                 add     \rv, \rv, #(0x10000 * CONFIG_DEBUG_S3C_UART)
diff --git a/arch/arm/mach-exynos/include/mach/gpio.h b/arch/arm/mach-exynos/include/mach/gpio.h
index 80523ca9bb49..d7498afe036a 100644
--- a/arch/arm/mach-exynos/include/mach/gpio.h
+++ b/arch/arm/mach-exynos/include/mach/gpio.h
@@ -1,9 +1,8 @@
-/* linux/arch/arm/mach-exynos4/include/mach/gpio.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+/*
+ * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd.
  *              http://www.samsung.com
  *
- * EXYNOS4 - GPIO lib support
+ * EXYNOS - GPIO lib support
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -13,9 +12,13 @@
 #ifndef __ASM_ARCH_GPIO_H
 #define __ASM_ARCH_GPIO_H __FILE__
 
-/* Practically, GPIO banks up to GPZ are the configurable gpio banks */
+/* Macro for EXYNOS GPIO numbering */
+
+#define EXYNOS_GPIO_NEXT(__gpio) \
+        ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
+
+/* EXYNOS4 GPIO bank sizes */
 
-/* GPIO bank sizes */
 #define EXYNOS4_GPIO_A0_NR      (8)
 #define EXYNOS4_GPIO_A1_NR      (6)
 #define EXYNOS4_GPIO_B_NR       (8)
@@ -54,52 +57,50 @@
 #define EXYNOS4_GPIO_Y6_NR      (8)
 #define EXYNOS4_GPIO_Z_NR       (7)
 
-/* GPIO bank numbers */
-
-#define EXYNOS4_GPIO_NEXT(__gpio) \
-        ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
+/* EXYNOS4 GPIO bank numbers */
 
-enum s5p_gpio_number {
+enum exynos4_gpio_number {
         EXYNOS4_GPIO_A0_START   = 0,
-        EXYNOS4_GPIO_A1_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_A0),
-        EXYNOS4_GPIO_B_START    = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_A1),
-        EXYNOS4_GPIO_C0_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_B),
-        EXYNOS4_GPIO_C1_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_C0),
-        EXYNOS4_GPIO_D0_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_C1),
-        EXYNOS4_GPIO_D1_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_D0),
-        EXYNOS4_GPIO_E0_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_D1),
-        EXYNOS4_GPIO_E1_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_E0),
-        EXYNOS4_GPIO_E2_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_E1),
-        EXYNOS4_GPIO_E3_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_E2),
-        EXYNOS4_GPIO_E4_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_E3),
-        EXYNOS4_GPIO_F0_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_E4),
-        EXYNOS4_GPIO_F1_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_F0),
-        EXYNOS4_GPIO_F2_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_F1),
-        EXYNOS4_GPIO_F3_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_F2),
-        EXYNOS4_GPIO_J0_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_F3),
-        EXYNOS4_GPIO_J1_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_J0),
-        EXYNOS4_GPIO_K0_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_J1),
-        EXYNOS4_GPIO_K1_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_K0),
-        EXYNOS4_GPIO_K2_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_K1),
-        EXYNOS4_GPIO_K3_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_K2),
-        EXYNOS4_GPIO_L0_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_K3),
-        EXYNOS4_GPIO_L1_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_L0),
-        EXYNOS4_GPIO_L2_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_L1),
-        EXYNOS4_GPIO_X0_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_L2),
-        EXYNOS4_GPIO_X1_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_X0),
-        EXYNOS4_GPIO_X2_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_X1),
-        EXYNOS4_GPIO_X3_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_X2),
-        EXYNOS4_GPIO_Y0_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_X3),
-        EXYNOS4_GPIO_Y1_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y0),
-        EXYNOS4_GPIO_Y2_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y1),
-        EXYNOS4_GPIO_Y3_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y2),
-        EXYNOS4_GPIO_Y4_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y3),
-        EXYNOS4_GPIO_Y5_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y4),
-        EXYNOS4_GPIO_Y6_START   = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y5),
-        EXYNOS4_GPIO_Z_START    = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y6),
+        EXYNOS4_GPIO_A1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_A0),
+        EXYNOS4_GPIO_B_START    = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_A1),
+        EXYNOS4_GPIO_C0_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_B),
+        EXYNOS4_GPIO_C1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_C0),
+        EXYNOS4_GPIO_D0_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_C1),
+        EXYNOS4_GPIO_D1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D0),
+        EXYNOS4_GPIO_E0_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D1),
+        EXYNOS4_GPIO_E1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E0),
+        EXYNOS4_GPIO_E2_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E1),
+        EXYNOS4_GPIO_E3_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E2),
+        EXYNOS4_GPIO_E4_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E3),
+        EXYNOS4_GPIO_F0_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E4),
+        EXYNOS4_GPIO_F1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F0),
+        EXYNOS4_GPIO_F2_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F1),
+        EXYNOS4_GPIO_F3_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F2),
+        EXYNOS4_GPIO_J0_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F3),
+        EXYNOS4_GPIO_J1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_J0),
+        EXYNOS4_GPIO_K0_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_J1),
+        EXYNOS4_GPIO_K1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K0),
+        EXYNOS4_GPIO_K2_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K1),
+        EXYNOS4_GPIO_K3_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K2),
+        EXYNOS4_GPIO_L0_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K3),
+        EXYNOS4_GPIO_L1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_L0),
+        EXYNOS4_GPIO_L2_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_L1),
+        EXYNOS4_GPIO_X0_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_L2),
+        EXYNOS4_GPIO_X1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X0),
+        EXYNOS4_GPIO_X2_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X1),
+        EXYNOS4_GPIO_X3_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X2),
+        EXYNOS4_GPIO_Y0_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X3),
+        EXYNOS4_GPIO_Y1_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y0),
+        EXYNOS4_GPIO_Y2_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y1),
+        EXYNOS4_GPIO_Y3_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y2),
+        EXYNOS4_GPIO_Y4_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y3),
+        EXYNOS4_GPIO_Y5_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y4),
+        EXYNOS4_GPIO_Y6_START   = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y5),
+        EXYNOS4_GPIO_Z_START    = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y6),
 };
 
 /* EXYNOS4 GPIO number definitions */
+
 #define EXYNOS4_GPA0(_nr)       (EXYNOS4_GPIO_A0_START + (_nr))
 #define EXYNOS4_GPA1(_nr)       (EXYNOS4_GPIO_A1_START + (_nr))
 #define EXYNOS4_GPB(_nr)        (EXYNOS4_GPIO_B_START + (_nr))
@@ -139,11 +140,147 @@ enum s5p_gpio_number {
 #define EXYNOS4_GPZ(_nr)        (EXYNOS4_GPIO_Z_START + (_nr))
 
 /* the end of the EXYNOS4 specific gpios */
+
 #define EXYNOS4_GPIO_END        (EXYNOS4_GPZ(EXYNOS4_GPIO_Z_NR) + 1)
-#define S3C_GPIO_END            EXYNOS4_GPIO_END
 
-/* define the number of gpios we need to the one after the GPZ() range */
-#define ARCH_NR_GPIOS           (EXYNOS4_GPZ(EXYNOS4_GPIO_Z_NR) +       \
-                                 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
+/* EXYNOS5 GPIO bank sizes */
+
+#define EXYNOS5_GPIO_A0_NR      (8)
+#define EXYNOS5_GPIO_A1_NR      (6)
+#define EXYNOS5_GPIO_A2_NR      (8)
+#define EXYNOS5_GPIO_B0_NR      (5)
+#define EXYNOS5_GPIO_B1_NR      (5)
+#define EXYNOS5_GPIO_B2_NR      (4)
+#define EXYNOS5_GPIO_B3_NR      (4)
+#define EXYNOS5_GPIO_C0_NR      (7)
+#define EXYNOS5_GPIO_C1_NR      (7)
+#define EXYNOS5_GPIO_C2_NR      (7)
+#define EXYNOS5_GPIO_C3_NR      (7)
+#define EXYNOS5_GPIO_D0_NR      (8)
+#define EXYNOS5_GPIO_D1_NR      (8)
+#define EXYNOS5_GPIO_Y0_NR      (6)
+#define EXYNOS5_GPIO_Y1_NR      (4)
+#define EXYNOS5_GPIO_Y2_NR      (6)
+#define EXYNOS5_GPIO_Y3_NR      (8)
+#define EXYNOS5_GPIO_Y4_NR      (8)
+#define EXYNOS5_GPIO_Y5_NR      (8)
+#define EXYNOS5_GPIO_Y6_NR      (8)
+#define EXYNOS5_GPIO_X0_NR      (8)
+#define EXYNOS5_GPIO_X1_NR      (8)
+#define EXYNOS5_GPIO_X2_NR      (8)
+#define EXYNOS5_GPIO_X3_NR      (8)
+#define EXYNOS5_GPIO_E0_NR      (8)
+#define EXYNOS5_GPIO_E1_NR      (2)
+#define EXYNOS5_GPIO_F0_NR      (4)
+#define EXYNOS5_GPIO_F1_NR      (4)
+#define EXYNOS5_GPIO_G0_NR      (8)
+#define EXYNOS5_GPIO_G1_NR      (8)
+#define EXYNOS5_GPIO_G2_NR      (2)
+#define EXYNOS5_GPIO_H0_NR      (4)
+#define EXYNOS5_GPIO_H1_NR      (8)
+#define EXYNOS5_GPIO_V0_NR      (8)
+#define EXYNOS5_GPIO_V1_NR      (8)
+#define EXYNOS5_GPIO_V2_NR      (8)
+#define EXYNOS5_GPIO_V3_NR      (8)
+#define EXYNOS5_GPIO_V4_NR      (2)
+#define EXYNOS5_GPIO_Z_NR       (7)
+
+/* EXYNOS5 GPIO bank numbers */
+
+enum exynos5_gpio_number {
+        EXYNOS5_GPIO_A0_START           = 0,
+        EXYNOS5_GPIO_A1_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_A0),
+        EXYNOS5_GPIO_A2_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_A1),
+        EXYNOS5_GPIO_B0_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_A2),
+        EXYNOS5_GPIO_B1_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_B0),
+        EXYNOS5_GPIO_B2_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_B1),
+        EXYNOS5_GPIO_B3_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_B2),
+        EXYNOS5_GPIO_C0_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_B3),
+        EXYNOS5_GPIO_C1_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C0),
+        EXYNOS5_GPIO_C2_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C1),
+        EXYNOS5_GPIO_C3_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C2),
+        EXYNOS5_GPIO_D0_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C3),
+        EXYNOS5_GPIO_D1_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_D0),
+        EXYNOS5_GPIO_Y0_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_D1),
+        EXYNOS5_GPIO_Y1_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y0),
+        EXYNOS5_GPIO_Y2_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y1),
+        EXYNOS5_GPIO_Y3_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y2),
+        EXYNOS5_GPIO_Y4_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y3),
+        EXYNOS5_GPIO_Y5_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y4),
+        EXYNOS5_GPIO_Y6_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y5),
+        EXYNOS5_GPIO_X0_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y6),
+        EXYNOS5_GPIO_X1_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_X0),
+        EXYNOS5_GPIO_X2_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_X1),
+        EXYNOS5_GPIO_X3_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_X2),
+        EXYNOS5_GPIO_E0_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_X3),
+        EXYNOS5_GPIO_E1_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_E0),
+        EXYNOS5_GPIO_F0_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_E1),
+        EXYNOS5_GPIO_F1_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_F0),
+        EXYNOS5_GPIO_G0_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_F1),
+        EXYNOS5_GPIO_G1_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_G0),
+        EXYNOS5_GPIO_G2_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_G1),
+        EXYNOS5_GPIO_H0_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_G2),
+        EXYNOS5_GPIO_H1_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_H0),
+        EXYNOS5_GPIO_V0_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_H1),
+        EXYNOS5_GPIO_V1_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V0),
+        EXYNOS5_GPIO_V2_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V1),
+        EXYNOS5_GPIO_V3_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V2),
+        EXYNOS5_GPIO_V4_START           = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V3),
+        EXYNOS5_GPIO_Z_START            = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V4),
+};
+
+/* EXYNOS5 GPIO number definitions */
+
+#define EXYNOS5_GPA0(_nr)       (EXYNOS5_GPIO_A0_START + (_nr))
+#define EXYNOS5_GPA1(_nr)       (EXYNOS5_GPIO_A1_START + (_nr))
+#define EXYNOS5_GPA2(_nr)       (EXYNOS5_GPIO_A2_START + (_nr))
+#define EXYNOS5_GPB0(_nr)       (EXYNOS5_GPIO_B0_START + (_nr))
+#define EXYNOS5_GPB1(_nr)       (EXYNOS5_GPIO_B1_START + (_nr))
+#define EXYNOS5_GPB2(_nr)       (EXYNOS5_GPIO_B2_START + (_nr))
+#define EXYNOS5_GPB3(_nr)       (EXYNOS5_GPIO_B3_START + (_nr))
+#define EXYNOS5_GPC0(_nr)       (EXYNOS5_GPIO_C0_START + (_nr))
+#define EXYNOS5_GPC1(_nr)       (EXYNOS5_GPIO_C1_START + (_nr))
+#define EXYNOS5_GPC2(_nr)       (EXYNOS5_GPIO_C2_START + (_nr))
+#define EXYNOS5_GPC3(_nr)       (EXYNOS5_GPIO_C3_START + (_nr))
+#define EXYNOS5_GPD0(_nr)       (EXYNOS5_GPIO_D0_START + (_nr))
+#define EXYNOS5_GPD1(_nr)       (EXYNOS5_GPIO_D1_START + (_nr))
+#define EXYNOS5_GPY0(_nr)       (EXYNOS5_GPIO_Y0_START + (_nr))
+#define EXYNOS5_GPY1(_nr)       (EXYNOS5_GPIO_Y1_START + (_nr))
+#define EXYNOS5_GPY2(_nr)       (EXYNOS5_GPIO_Y2_START + (_nr))
+#define EXYNOS5_GPY3(_nr)       (EXYNOS5_GPIO_Y3_START + (_nr))
+#define EXYNOS5_GPY4(_nr)       (EXYNOS5_GPIO_Y4_START + (_nr))
+#define EXYNOS5_GPY5(_nr)       (EXYNOS5_GPIO_Y5_START + (_nr))
+#define EXYNOS5_GPY6(_nr)       (EXYNOS5_GPIO_Y6_START + (_nr))
+#define EXYNOS5_GPX0(_nr)       (EXYNOS5_GPIO_X0_START + (_nr))
+#define EXYNOS5_GPX1(_nr)       (EXYNOS5_GPIO_X1_START + (_nr))
+#define EXYNOS5_GPX2(_nr)       (EXYNOS5_GPIO_X2_START + (_nr))
+#define EXYNOS5_GPX3(_nr)       (EXYNOS5_GPIO_X3_START + (_nr))
+#define EXYNOS5_GPE0(_nr)       (EXYNOS5_GPIO_E0_START + (_nr))
+#define EXYNOS5_GPE1(_nr)       (EXYNOS5_GPIO_E1_START + (_nr))
+#define EXYNOS5_GPF0(_nr)       (EXYNOS5_GPIO_F0_START + (_nr))
+#define EXYNOS5_GPF1(_nr)       (EXYNOS5_GPIO_F1_START + (_nr))
+#define EXYNOS5_GPG0(_nr)       (EXYNOS5_GPIO_G0_START + (_nr))
+#define EXYNOS5_GPG1(_nr)       (EXYNOS5_GPIO_G1_START + (_nr))
+#define EXYNOS5_GPG2(_nr)       (EXYNOS5_GPIO_G2_START + (_nr))
+#define EXYNOS5_GPH0(_nr)       (EXYNOS5_GPIO_H0_START + (_nr))
+#define EXYNOS5_GPH1(_nr)       (EXYNOS5_GPIO_H1_START + (_nr))
+#define EXYNOS5_GPV0(_nr)       (EXYNOS5_GPIO_V0_START + (_nr))
+#define EXYNOS5_GPV1(_nr)       (EXYNOS5_GPIO_V1_START + (_nr))
+#define EXYNOS5_GPV2(_nr)       (EXYNOS5_GPIO_V2_START + (_nr))
+#define EXYNOS5_GPV3(_nr)       (EXYNOS5_GPIO_V3_START + (_nr))
+#define EXYNOS5_GPV4(_nr)       (EXYNOS5_GPIO_V4_START + (_nr))
+#define EXYNOS5_GPZ(_nr)        (EXYNOS5_GPIO_Z_START + (_nr))
+
+/* the end of the EXYNOS5 specific gpios */
+
+#define EXYNOS5_GPIO_END        (EXYNOS5_GPZ(EXYNOS5_GPIO_Z_NR) + 1)
+
+/* actually, EXYNOS5_GPIO_END is bigger than EXYNOS4 */
+
+#define S3C_GPIO_END            (EXYNOS5_GPIO_END)
+
+/* define the number of gpios */
+
+#define ARCH_NR_GPIOS           (CONFIG_SAMSUNG_GPIO_EXTRA + S3C_GPIO_END)
 
 #endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-exynos/include/mach/io.h b/arch/arm/mach-exynos/include/mach/io.h
deleted file mode 100644
index d5478d247535..000000000000
--- a/arch/arm/mach-exynos/include/mach/io.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* linux/arch/arm/mach-exynos4/include/mach/io.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
- *
- * Based on arch/arm/mach-s5p6442/include/mach/io.h
- *
- * Default IO routines for EXYNOS4
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H __FILE__
-
-/* No current ISA/PCI bus support. */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#define IO_SPACE_LIMIT (0xFFFFFFFF)
-
-#endif /* __ASM_ARM_ARCH_IO_H */
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index 1d401c957835..9bee8535d9e0 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -1,9 +1,8 @@
-/* linux/arch/arm/mach-exynos4/include/mach/irqs.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+/*
+ * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd.
  *              http://www.samsung.com
  *
- * EXYNOS4 - IRQ definitions
+ * EXYNOS - IRQ definitions
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -17,160 +16,450 @@
 
 /* PPI: Private Peripheral Interrupt */
 
-#define IRQ_PPI(x)              (x+16)
-
-#define IRQ_MCT_LOCALTIMER      IRQ_PPI(12)
+#define IRQ_PPI(x)                      (x + 16)
 
 /* SPI: Shared Peripheral Interrupt */
 
-#define IRQ_SPI(x)              (x+32)
-
-#define IRQ_EINT0               IRQ_SPI(16)
-#define IRQ_EINT1               IRQ_SPI(17)
-#define IRQ_EINT2               IRQ_SPI(18)
-#define IRQ_EINT3               IRQ_SPI(19)
-#define IRQ_EINT4               IRQ_SPI(20)
-#define IRQ_EINT5               IRQ_SPI(21)
-#define IRQ_EINT6               IRQ_SPI(22)
-#define IRQ_EINT7               IRQ_SPI(23)
-#define IRQ_EINT8               IRQ_SPI(24)
-#define IRQ_EINT9               IRQ_SPI(25)
-#define IRQ_EINT10              IRQ_SPI(26)
-#define IRQ_EINT11              IRQ_SPI(27)
-#define IRQ_EINT12              IRQ_SPI(28)
-#define IRQ_EINT13              IRQ_SPI(29)
-#define IRQ_EINT14              IRQ_SPI(30)
-#define IRQ_EINT15              IRQ_SPI(31)
-#define IRQ_EINT16_31           IRQ_SPI(32)
-
-#define IRQ_MDMA0               IRQ_SPI(33)
-#define IRQ_MDMA1               IRQ_SPI(34)
-#define IRQ_PDMA0               IRQ_SPI(35)
-#define IRQ_PDMA1               IRQ_SPI(36)
-#define IRQ_TIMER0_VIC          IRQ_SPI(37)
-#define IRQ_TIMER1_VIC          IRQ_SPI(38)
-#define IRQ_TIMER2_VIC          IRQ_SPI(39)
-#define IRQ_TIMER3_VIC          IRQ_SPI(40)
-#define IRQ_TIMER4_VIC          IRQ_SPI(41)
-#define IRQ_MCT_L0              IRQ_SPI(42)
-#define IRQ_WDT                 IRQ_SPI(43)
-#define IRQ_RTC_ALARM           IRQ_SPI(44)
-#define IRQ_RTC_TIC             IRQ_SPI(45)
-#define IRQ_GPIO_XB             IRQ_SPI(46)
-#define IRQ_GPIO_XA             IRQ_SPI(47)
-#define IRQ_MCT_L1              IRQ_SPI(48)
-
-#define IRQ_UART0               IRQ_SPI(52)
-#define IRQ_UART1               IRQ_SPI(53)
-#define IRQ_UART2               IRQ_SPI(54)
-#define IRQ_UART3               IRQ_SPI(55)
-#define IRQ_UART4               IRQ_SPI(56)
-#define IRQ_MCT_G0              IRQ_SPI(57)
-#define IRQ_IIC                 IRQ_SPI(58)
-#define IRQ_IIC1                IRQ_SPI(59)
-#define IRQ_IIC2                IRQ_SPI(60)
-#define IRQ_IIC3                IRQ_SPI(61)
-#define IRQ_IIC4                IRQ_SPI(62)
-#define IRQ_IIC5                IRQ_SPI(63)
-#define IRQ_IIC6                IRQ_SPI(64)
-#define IRQ_IIC7                IRQ_SPI(65)
-#define IRQ_SPI0                IRQ_SPI(66)
-#define IRQ_SPI1                IRQ_SPI(67)
-#define IRQ_SPI2                IRQ_SPI(68)
-
-#define IRQ_USB_HOST            IRQ_SPI(70)
-#define IRQ_USB_HSOTG           IRQ_SPI(71)
-#define IRQ_MODEM_IF            IRQ_SPI(72)
-#define IRQ_HSMMC0              IRQ_SPI(73)
-#define IRQ_HSMMC1              IRQ_SPI(74)
-#define IRQ_HSMMC2              IRQ_SPI(75)
-#define IRQ_HSMMC3              IRQ_SPI(76)
-#define IRQ_DWMCI               IRQ_SPI(77)
-
-#define IRQ_MIPI_CSIS0          IRQ_SPI(78)
-#define IRQ_MIPI_CSIS1          IRQ_SPI(80)
-
-#define IRQ_ONENAND_AUDI        IRQ_SPI(82)
-#define IRQ_ROTATOR             IRQ_SPI(83)
-#define IRQ_FIMC0               IRQ_SPI(84)
-#define IRQ_FIMC1               IRQ_SPI(85)
-#define IRQ_FIMC2               IRQ_SPI(86)
-#define IRQ_FIMC3               IRQ_SPI(87)
-#define IRQ_JPEG                IRQ_SPI(88)
-#define IRQ_2D                  IRQ_SPI(89)
-#define IRQ_PCIE                IRQ_SPI(90)
-
-#define IRQ_MIXER               IRQ_SPI(91)
-#define IRQ_HDMI                IRQ_SPI(92)
-#define IRQ_IIC_HDMIPHY         IRQ_SPI(93)
-#define IRQ_MFC                 IRQ_SPI(94)
-#define IRQ_SDO                 IRQ_SPI(95)
-
-#define IRQ_AUDIO_SS            IRQ_SPI(96)
-#define IRQ_I2S0                IRQ_SPI(97)
-#define IRQ_I2S1                IRQ_SPI(98)
-#define IRQ_I2S2                IRQ_SPI(99)
-#define IRQ_AC97                IRQ_SPI(100)
-
-#define IRQ_SPDIF               IRQ_SPI(104)
-#define IRQ_ADC0                IRQ_SPI(105)
-#define IRQ_PEN0                IRQ_SPI(106)
-#define IRQ_ADC1                IRQ_SPI(107)
-#define IRQ_PEN1                IRQ_SPI(108)
-#define IRQ_KEYPAD              IRQ_SPI(109)
-#define IRQ_PMU                 IRQ_SPI(110)
-#define IRQ_GPS                 IRQ_SPI(111)
-#define IRQ_INTFEEDCTRL_SSS     IRQ_SPI(112)
-#define IRQ_SLIMBUS             IRQ_SPI(113)
-
-#define IRQ_TSI                 IRQ_SPI(115)
-#define IRQ_SATA                IRQ_SPI(116)
-
-#define MAX_IRQ_IN_COMBINER     8
-#define COMBINER_GROUP(x)       ((x) * MAX_IRQ_IN_COMBINER + IRQ_SPI(128))
-#define COMBINER_IRQ(x, y)      (COMBINER_GROUP(x) + y)
-
-#define IRQ_SYSMMU_MDMA0_0      COMBINER_IRQ(4, 0)
-#define IRQ_SYSMMU_SSS_0        COMBINER_IRQ(4, 1)
-#define IRQ_SYSMMU_FIMC0_0      COMBINER_IRQ(4, 2)
-#define IRQ_SYSMMU_FIMC1_0      COMBINER_IRQ(4, 3)
-#define IRQ_SYSMMU_FIMC2_0      COMBINER_IRQ(4, 4)
-#define IRQ_SYSMMU_FIMC3_0      COMBINER_IRQ(4, 5)
-#define IRQ_SYSMMU_JPEG_0       COMBINER_IRQ(4, 6)
-#define IRQ_SYSMMU_2D_0         COMBINER_IRQ(4, 7)
-
-#define IRQ_SYSMMU_ROTATOR_0    COMBINER_IRQ(5, 0)
-#define IRQ_SYSMMU_MDMA1_0      COMBINER_IRQ(5, 1)
-#define IRQ_SYSMMU_LCD0_M0_0    COMBINER_IRQ(5, 2)
-#define IRQ_SYSMMU_LCD1_M1_0    COMBINER_IRQ(5, 3)
-#define IRQ_SYSMMU_TV_M0_0      COMBINER_IRQ(5, 4)
-#define IRQ_SYSMMU_MFC_M0_0     COMBINER_IRQ(5, 5)
-#define IRQ_SYSMMU_MFC_M1_0     COMBINER_IRQ(5, 6)
-#define IRQ_SYSMMU_PCIE_0       COMBINER_IRQ(5, 7)
-
-#define IRQ_FIMD0_FIFO          COMBINER_IRQ(11, 0)
-#define IRQ_FIMD0_VSYNC         COMBINER_IRQ(11, 1)
-#define IRQ_FIMD0_SYSTEM        COMBINER_IRQ(11, 2)
-
-#define MAX_COMBINER_NR         16
-
-#define IRQ_ADC                 IRQ_ADC0
-#define IRQ_TC                  IRQ_PEN0
-
-#define S5P_IRQ_EINT_BASE       COMBINER_IRQ(MAX_COMBINER_NR, 0)
-
-#define S5P_EINT_BASE1          (S5P_IRQ_EINT_BASE + 0)
-#define S5P_EINT_BASE2          (S5P_IRQ_EINT_BASE + 16)
-
-/* optional GPIO interrupts */
-#define S5P_GPIOINT_BASE        (S5P_IRQ_EINT_BASE + 32)
-#define IRQ_GPIO1_NR_GROUPS     16
-#define IRQ_GPIO2_NR_GROUPS     9
-#define IRQ_GPIO_END            (S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT)
-
-#define IRQ_TIMER_BASE          (IRQ_GPIO_END + 64)
+#define IRQ_SPI(x)                      (x + 32)
+
+/* COMBINER */
+
+#define MAX_IRQ_IN_COMBINER             8
+#define COMBINER_GROUP(x)               ((x) * MAX_IRQ_IN_COMBINER + IRQ_SPI(128))
+#define COMBINER_IRQ(x, y)              (COMBINER_GROUP(x) + y)
+
+/* For EXYNOS4 and EXYNOS5 */
+
+#define EXYNOS_IRQ_MCT_LOCALTIMER       IRQ_PPI(12)
+
+#define EXYNOS_IRQ_EINT16_31            IRQ_SPI(32)
+
+/* For EXYNOS4 SoCs */
+
+#define EXYNOS4_IRQ_EINT0               IRQ_SPI(16)
+#define EXYNOS4_IRQ_EINT1               IRQ_SPI(17)
+#define EXYNOS4_IRQ_EINT2               IRQ_SPI(18)
+#define EXYNOS4_IRQ_EINT3               IRQ_SPI(19)
+#define EXYNOS4_IRQ_EINT4               IRQ_SPI(20)
+#define EXYNOS4_IRQ_EINT5               IRQ_SPI(21)
+#define EXYNOS4_IRQ_EINT6               IRQ_SPI(22)
+#define EXYNOS4_IRQ_EINT7               IRQ_SPI(23)
+#define EXYNOS4_IRQ_EINT8               IRQ_SPI(24)
+#define EXYNOS4_IRQ_EINT9               IRQ_SPI(25)
+#define EXYNOS4_IRQ_EINT10              IRQ_SPI(26)
+#define EXYNOS4_IRQ_EINT11              IRQ_SPI(27)
+#define EXYNOS4_IRQ_EINT12              IRQ_SPI(28)
+#define EXYNOS4_IRQ_EINT13              IRQ_SPI(29)
+#define EXYNOS4_IRQ_EINT14              IRQ_SPI(30)
+#define EXYNOS4_IRQ_EINT15              IRQ_SPI(31)
+
+#define EXYNOS4_IRQ_MDMA0               IRQ_SPI(33)
+#define EXYNOS4_IRQ_MDMA1               IRQ_SPI(34)
+#define EXYNOS4_IRQ_PDMA0               IRQ_SPI(35)
+#define EXYNOS4_IRQ_PDMA1               IRQ_SPI(36)
+#define EXYNOS4_IRQ_TIMER0_VIC          IRQ_SPI(37)
+#define EXYNOS4_IRQ_TIMER1_VIC          IRQ_SPI(38)
+#define EXYNOS4_IRQ_TIMER2_VIC          IRQ_SPI(39)
+#define EXYNOS4_IRQ_TIMER3_VIC          IRQ_SPI(40)
+#define EXYNOS4_IRQ_TIMER4_VIC          IRQ_SPI(41)
+#define EXYNOS4_IRQ_MCT_L0              IRQ_SPI(42)
+#define EXYNOS4_IRQ_WDT                 IRQ_SPI(43)
+#define EXYNOS4_IRQ_RTC_ALARM           IRQ_SPI(44)
+#define EXYNOS4_IRQ_RTC_TIC             IRQ_SPI(45)
+#define EXYNOS4_IRQ_GPIO_XB             IRQ_SPI(46)
+#define EXYNOS4_IRQ_GPIO_XA             IRQ_SPI(47)
+#define EXYNOS4_IRQ_MCT_L1              IRQ_SPI(48)
+
+#define EXYNOS4_IRQ_UART0               IRQ_SPI(52)
+#define EXYNOS4_IRQ_UART1               IRQ_SPI(53)
+#define EXYNOS4_IRQ_UART2               IRQ_SPI(54)
+#define EXYNOS4_IRQ_UART3               IRQ_SPI(55)
+#define EXYNOS4_IRQ_UART4               IRQ_SPI(56)
+#define EXYNOS4_IRQ_MCT_G0              IRQ_SPI(57)
+#define EXYNOS4_IRQ_IIC                 IRQ_SPI(58)
+#define EXYNOS4_IRQ_IIC1                IRQ_SPI(59)
+#define EXYNOS4_IRQ_IIC2                IRQ_SPI(60)
+#define EXYNOS4_IRQ_IIC3                IRQ_SPI(61)
+#define EXYNOS4_IRQ_IIC4                IRQ_SPI(62)
+#define EXYNOS4_IRQ_IIC5                IRQ_SPI(63)
+#define EXYNOS4_IRQ_IIC6                IRQ_SPI(64)
+#define EXYNOS4_IRQ_IIC7                IRQ_SPI(65)
+#define EXYNOS4_IRQ_SPI0                IRQ_SPI(66)
+#define EXYNOS4_IRQ_SPI1                IRQ_SPI(67)
+#define EXYNOS4_IRQ_SPI2                IRQ_SPI(68)
+
+#define EXYNOS4_IRQ_USB_HOST            IRQ_SPI(70)
+#define EXYNOS4_IRQ_USB_HSOTG           IRQ_SPI(71)
+#define EXYNOS4_IRQ_MODEM_IF            IRQ_SPI(72)
+#define EXYNOS4_IRQ_HSMMC0              IRQ_SPI(73)
+#define EXYNOS4_IRQ_HSMMC1              IRQ_SPI(74)
+#define EXYNOS4_IRQ_HSMMC2              IRQ_SPI(75)
+#define EXYNOS4_IRQ_HSMMC3              IRQ_SPI(76)
+#define EXYNOS4_IRQ_DWMCI               IRQ_SPI(77)
+
+#define EXYNOS4_IRQ_MIPI_CSIS0          IRQ_SPI(78)
+#define EXYNOS4_IRQ_MIPI_CSIS1          IRQ_SPI(80)
+
+#define EXYNOS4_IRQ_ONENAND_AUDI        IRQ_SPI(82)
+#define EXYNOS4_IRQ_ROTATOR             IRQ_SPI(83)
+#define EXYNOS4_IRQ_FIMC0               IRQ_SPI(84)
+#define EXYNOS4_IRQ_FIMC1               IRQ_SPI(85)
+#define EXYNOS4_IRQ_FIMC2               IRQ_SPI(86)
+#define EXYNOS4_IRQ_FIMC3               IRQ_SPI(87)
+#define EXYNOS4_IRQ_JPEG                IRQ_SPI(88)
+#define EXYNOS4_IRQ_2D                  IRQ_SPI(89)
+#define EXYNOS4_IRQ_PCIE                IRQ_SPI(90)
+
+#define EXYNOS4_IRQ_MIXER               IRQ_SPI(91)
+#define EXYNOS4_IRQ_HDMI                IRQ_SPI(92)
+#define EXYNOS4_IRQ_IIC_HDMIPHY         IRQ_SPI(93)
+#define EXYNOS4_IRQ_MFC                 IRQ_SPI(94)
+#define EXYNOS4_IRQ_SDO                 IRQ_SPI(95)
+
+#define EXYNOS4_IRQ_AUDIO_SS            IRQ_SPI(96)
+#define EXYNOS4_IRQ_I2S0                IRQ_SPI(97)
+#define EXYNOS4_IRQ_I2S1                IRQ_SPI(98)
+#define EXYNOS4_IRQ_I2S2                IRQ_SPI(99)
+#define EXYNOS4_IRQ_AC97                IRQ_SPI(100)
+
+#define EXYNOS4_IRQ_SPDIF               IRQ_SPI(104)
+#define EXYNOS4_IRQ_ADC0                IRQ_SPI(105)
+#define EXYNOS4_IRQ_PEN0                IRQ_SPI(106)
+#define EXYNOS4_IRQ_ADC1                IRQ_SPI(107)
+#define EXYNOS4_IRQ_PEN1                IRQ_SPI(108)
+#define EXYNOS4_IRQ_KEYPAD              IRQ_SPI(109)
+#define EXYNOS4_IRQ_PMU                 IRQ_SPI(110)
+#define EXYNOS4_IRQ_GPS                 IRQ_SPI(111)
+#define EXYNOS4_IRQ_INTFEEDCTRL_SSS     IRQ_SPI(112)
+#define EXYNOS4_IRQ_SLIMBUS             IRQ_SPI(113)
+
+#define EXYNOS4_IRQ_TSI                 IRQ_SPI(115)
+#define EXYNOS4_IRQ_SATA                IRQ_SPI(116)
+
+#define EXYNOS4_IRQ_SYSMMU_MDMA0_0      COMBINER_IRQ(4, 0)
+#define EXYNOS4_IRQ_SYSMMU_SSS_0        COMBINER_IRQ(4, 1)
+#define EXYNOS4_IRQ_SYSMMU_FIMC0_0      COMBINER_IRQ(4, 2)
+#define EXYNOS4_IRQ_SYSMMU_FIMC1_0      COMBINER_IRQ(4, 3)
+#define EXYNOS4_IRQ_SYSMMU_FIMC2_0      COMBINER_IRQ(4, 4)
+#define EXYNOS4_IRQ_SYSMMU_FIMC3_0      COMBINER_IRQ(4, 5)
+#define EXYNOS4_IRQ_SYSMMU_JPEG_0       COMBINER_IRQ(4, 6)
+#define EXYNOS4_IRQ_SYSMMU_2D_0         COMBINER_IRQ(4, 7)
+
+#define EXYNOS4_IRQ_SYSMMU_ROTATOR_0    COMBINER_IRQ(5, 0)
+#define EXYNOS4_IRQ_SYSMMU_MDMA1_0      COMBINER_IRQ(5, 1)
+#define EXYNOS4_IRQ_SYSMMU_LCD0_M0_0    COMBINER_IRQ(5, 2)
+#define EXYNOS4_IRQ_SYSMMU_LCD1_M1_0    COMBINER_IRQ(5, 3)
+#define EXYNOS4_IRQ_SYSMMU_TV_M0_0      COMBINER_IRQ(5, 4)
+#define EXYNOS4_IRQ_SYSMMU_MFC_M0_0     COMBINER_IRQ(5, 5)
+#define EXYNOS4_IRQ_SYSMMU_MFC_M1_0     COMBINER_IRQ(5, 6)
+#define EXYNOS4_IRQ_SYSMMU_PCIE_0       COMBINER_IRQ(5, 7)
+
+#define EXYNOS4_IRQ_FIMD0_FIFO          COMBINER_IRQ(11, 0)
+#define EXYNOS4_IRQ_FIMD0_VSYNC         COMBINER_IRQ(11, 1)
+#define EXYNOS4_IRQ_FIMD0_SYSTEM        COMBINER_IRQ(11, 2)
+
+#define EXYNOS4_MAX_COMBINER_NR         16
+
+#define EXYNOS4_IRQ_GPIO1_NR_GROUPS     16
+#define EXYNOS4_IRQ_GPIO2_NR_GROUPS     9
+
+/*
+ * For Compatibility:
+ * the default is for EXYNOS4, and
+ * for exynos5, should be re-mapped at function
+ */
+
+#define IRQ_TIMER0_VIC                  EXYNOS4_IRQ_TIMER0_VIC
+#define IRQ_TIMER1_VIC                  EXYNOS4_IRQ_TIMER1_VIC
+#define IRQ_TIMER2_VIC                  EXYNOS4_IRQ_TIMER2_VIC
+#define IRQ_TIMER3_VIC                  EXYNOS4_IRQ_TIMER3_VIC
+#define IRQ_TIMER4_VIC                  EXYNOS4_IRQ_TIMER4_VIC
+
+#define IRQ_WDT                         EXYNOS4_IRQ_WDT
+#define IRQ_RTC_ALARM                   EXYNOS4_IRQ_RTC_ALARM
+#define IRQ_RTC_TIC                     EXYNOS4_IRQ_RTC_TIC
+#define IRQ_GPIO_XB                     EXYNOS4_IRQ_GPIO_XB
+#define IRQ_GPIO_XA                     EXYNOS4_IRQ_GPIO_XA
+
+#define IRQ_IIC                         EXYNOS4_IRQ_IIC
+#define IRQ_IIC1                        EXYNOS4_IRQ_IIC1
+#define IRQ_IIC3                        EXYNOS4_IRQ_IIC3
+#define IRQ_IIC5                        EXYNOS4_IRQ_IIC5
+#define IRQ_IIC6                        EXYNOS4_IRQ_IIC6
+#define IRQ_IIC7                        EXYNOS4_IRQ_IIC7
+
+#define IRQ_USB_HOST                    EXYNOS4_IRQ_USB_HOST
+
+#define IRQ_HSMMC0                      EXYNOS4_IRQ_HSMMC0
+#define IRQ_HSMMC1                      EXYNOS4_IRQ_HSMMC1
+#define IRQ_HSMMC2                      EXYNOS4_IRQ_HSMMC2
+#define IRQ_HSMMC3                      EXYNOS4_IRQ_HSMMC3
+
+#define IRQ_MIPI_CSIS0                  EXYNOS4_IRQ_MIPI_CSIS0
+
+#define IRQ_ONENAND_AUDI                EXYNOS4_IRQ_ONENAND_AUDI
+
+#define IRQ_FIMC0                       EXYNOS4_IRQ_FIMC0
+#define IRQ_FIMC1                       EXYNOS4_IRQ_FIMC1
+#define IRQ_FIMC2                       EXYNOS4_IRQ_FIMC2
+#define IRQ_FIMC3                       EXYNOS4_IRQ_FIMC3
+#define IRQ_JPEG                        EXYNOS4_IRQ_JPEG
+#define IRQ_2D                          EXYNOS4_IRQ_2D
+
+#define IRQ_MIXER                       EXYNOS4_IRQ_MIXER
+#define IRQ_HDMI                        EXYNOS4_IRQ_HDMI
+#define IRQ_IIC_HDMIPHY                 EXYNOS4_IRQ_IIC_HDMIPHY
+#define IRQ_MFC                         EXYNOS4_IRQ_MFC
+#define IRQ_SDO                         EXYNOS4_IRQ_SDO
+
+#define IRQ_ADC                         EXYNOS4_IRQ_ADC0
+#define IRQ_TC                          EXYNOS4_IRQ_PEN0
+
+#define IRQ_KEYPAD                      EXYNOS4_IRQ_KEYPAD
+#define IRQ_PMU                         EXYNOS4_IRQ_PMU
+
+#define IRQ_SYSMMU_MDMA0_0              EXYNOS4_IRQ_SYSMMU_MDMA0_0
+#define IRQ_SYSMMU_SSS_0                EXYNOS4_IRQ_SYSMMU_SSS_0
+#define IRQ_SYSMMU_FIMC0_0              EXYNOS4_IRQ_SYSMMU_FIMC0_0
+#define IRQ_SYSMMU_FIMC1_0              EXYNOS4_IRQ_SYSMMU_FIMC1_0
+#define IRQ_SYSMMU_FIMC2_0              EXYNOS4_IRQ_SYSMMU_FIMC2_0
+#define IRQ_SYSMMU_FIMC3_0              EXYNOS4_IRQ_SYSMMU_FIMC3_0
+#define IRQ_SYSMMU_JPEG_0               EXYNOS4_IRQ_SYSMMU_JPEG_0
+#define IRQ_SYSMMU_2D_0                 EXYNOS4_IRQ_SYSMMU_2D_0
+
+#define IRQ_SYSMMU_ROTATOR_0            EXYNOS4_IRQ_SYSMMU_ROTATOR_0
+#define IRQ_SYSMMU_MDMA1_0              EXYNOS4_IRQ_SYSMMU_MDMA1_0
+#define IRQ_SYSMMU_LCD0_M0_0            EXYNOS4_IRQ_SYSMMU_LCD0_M0_0
+#define IRQ_SYSMMU_LCD1_M1_0            EXYNOS4_IRQ_SYSMMU_LCD1_M1_0
+#define IRQ_SYSMMU_TV_M0_0              EXYNOS4_IRQ_SYSMMU_TV_M0_0
+#define IRQ_SYSMMU_MFC_M0_0             EXYNOS4_IRQ_SYSMMU_MFC_M0_0
+#define IRQ_SYSMMU_MFC_M1_0             EXYNOS4_IRQ_SYSMMU_MFC_M1_0
+#define IRQ_SYSMMU_PCIE_0               EXYNOS4_IRQ_SYSMMU_PCIE_0
+
+#define IRQ_FIMD0_FIFO                  EXYNOS4_IRQ_FIMD0_FIFO
+#define IRQ_FIMD0_VSYNC                 EXYNOS4_IRQ_FIMD0_VSYNC
+#define IRQ_FIMD0_SYSTEM                EXYNOS4_IRQ_FIMD0_SYSTEM
+
+#define IRQ_GPIO1_NR_GROUPS             EXYNOS4_IRQ_GPIO1_NR_GROUPS
+#define IRQ_GPIO2_NR_GROUPS             EXYNOS4_IRQ_GPIO2_NR_GROUPS
+
+/* For EXYNOS5 SoCs */
+
+#define EXYNOS5_IRQ_MDMA0               IRQ_SPI(33)
+#define EXYNOS5_IRQ_PDMA0               IRQ_SPI(34)
+#define EXYNOS5_IRQ_PDMA1               IRQ_SPI(35)
+#define EXYNOS5_IRQ_TIMER0_VIC          IRQ_SPI(36)
+#define EXYNOS5_IRQ_TIMER1_VIC          IRQ_SPI(37)
+#define EXYNOS5_IRQ_TIMER2_VIC          IRQ_SPI(38)
+#define EXYNOS5_IRQ_TIMER3_VIC          IRQ_SPI(39)
+#define EXYNOS5_IRQ_TIMER4_VIC          IRQ_SPI(40)
+#define EXYNOS5_IRQ_RTIC                IRQ_SPI(41)
+#define EXYNOS5_IRQ_WDT                 IRQ_SPI(42)
+#define EXYNOS5_IRQ_RTC_ALARM           IRQ_SPI(43)
+#define EXYNOS5_IRQ_RTC_TIC             IRQ_SPI(44)
+#define EXYNOS5_IRQ_GPIO_XB             IRQ_SPI(45)
+#define EXYNOS5_IRQ_GPIO_XA             IRQ_SPI(46)
+#define EXYNOS5_IRQ_GPIO                IRQ_SPI(47)
+#define EXYNOS5_IRQ_IEM_IEC             IRQ_SPI(48)
+#define EXYNOS5_IRQ_IEM_APC             IRQ_SPI(49)
+#define EXYNOS5_IRQ_GPIO_C2C            IRQ_SPI(50)
+#define EXYNOS5_IRQ_UART0               IRQ_SPI(51)
+#define EXYNOS5_IRQ_UART1               IRQ_SPI(52)
+#define EXYNOS5_IRQ_UART2               IRQ_SPI(53)
+#define EXYNOS5_IRQ_UART3               IRQ_SPI(54)
+#define EXYNOS5_IRQ_UART4               IRQ_SPI(55)
+#define EXYNOS5_IRQ_IIC                 IRQ_SPI(56)
+#define EXYNOS5_IRQ_IIC1                IRQ_SPI(57)
+#define EXYNOS5_IRQ_IIC2                IRQ_SPI(58)
+#define EXYNOS5_IRQ_IIC3                IRQ_SPI(59)
+#define EXYNOS5_IRQ_IIC4                IRQ_SPI(60)
+#define EXYNOS5_IRQ_IIC5                IRQ_SPI(61)
+#define EXYNOS5_IRQ_IIC6                IRQ_SPI(62)
+#define EXYNOS5_IRQ_IIC7                IRQ_SPI(63)
+#define EXYNOS5_IRQ_IIC_HDMIPHY         IRQ_SPI(64)
+#define EXYNOS5_IRQ_TMU                 IRQ_SPI(65)
+#define EXYNOS5_IRQ_FIQ_0               IRQ_SPI(66)
+#define EXYNOS5_IRQ_FIQ_1               IRQ_SPI(67)
+#define EXYNOS5_IRQ_SPI0                IRQ_SPI(68)
+#define EXYNOS5_IRQ_SPI1                IRQ_SPI(69)
+#define EXYNOS5_IRQ_SPI2                IRQ_SPI(70)
+#define EXYNOS5_IRQ_USB_HOST            IRQ_SPI(71)
+#define EXYNOS5_IRQ_USB3_DRD            IRQ_SPI(72)
+#define EXYNOS5_IRQ_MIPI_HSI            IRQ_SPI(73)
+#define EXYNOS5_IRQ_USB_HSOTG           IRQ_SPI(74)
+#define EXYNOS5_IRQ_HSMMC0              IRQ_SPI(75)
+#define EXYNOS5_IRQ_HSMMC1              IRQ_SPI(76)
+#define EXYNOS5_IRQ_HSMMC2              IRQ_SPI(77)
+#define EXYNOS5_IRQ_HSMMC3              IRQ_SPI(78)
+#define EXYNOS5_IRQ_MIPICSI0            IRQ_SPI(79)
+#define EXYNOS5_IRQ_MIPICSI1            IRQ_SPI(80)
+#define EXYNOS5_IRQ_EFNFCON_DMA_ABORT   IRQ_SPI(81)
+#define EXYNOS5_IRQ_MIPIDSI0            IRQ_SPI(82)
+#define EXYNOS5_IRQ_ROTATOR             IRQ_SPI(84)
+#define EXYNOS5_IRQ_GSC0                IRQ_SPI(85)
+#define EXYNOS5_IRQ_GSC1                IRQ_SPI(86)
+#define EXYNOS5_IRQ_GSC2                IRQ_SPI(87)
+#define EXYNOS5_IRQ_GSC3                IRQ_SPI(88)
+#define EXYNOS5_IRQ_JPEG                IRQ_SPI(89)
+#define EXYNOS5_IRQ_EFNFCON_DMA         IRQ_SPI(90)
+#define EXYNOS5_IRQ_2D                  IRQ_SPI(91)
+#define EXYNOS5_IRQ_SFMC0               IRQ_SPI(92)
+#define EXYNOS5_IRQ_SFMC1               IRQ_SPI(93)
+#define EXYNOS5_IRQ_MIXER               IRQ_SPI(94)
+#define EXYNOS5_IRQ_HDMI                IRQ_SPI(95)
+#define EXYNOS5_IRQ_MFC                 IRQ_SPI(96)
+#define EXYNOS5_IRQ_AUDIO_SS            IRQ_SPI(97)
+#define EXYNOS5_IRQ_I2S0                IRQ_SPI(98)
+#define EXYNOS5_IRQ_I2S1                IRQ_SPI(99)
+#define EXYNOS5_IRQ_I2S2                IRQ_SPI(100)
+#define EXYNOS5_IRQ_AC97                IRQ_SPI(101)
+#define EXYNOS5_IRQ_PCM0                IRQ_SPI(102)
+#define EXYNOS5_IRQ_PCM1                IRQ_SPI(103)
+#define EXYNOS5_IRQ_PCM2                IRQ_SPI(104)
+#define EXYNOS5_IRQ_SPDIF               IRQ_SPI(105)
+#define EXYNOS5_IRQ_ADC0                IRQ_SPI(106)
+
+#define EXYNOS5_IRQ_SATA_PHY            IRQ_SPI(108)
+#define EXYNOS5_IRQ_SATA_PMEMREQ        IRQ_SPI(109)
+#define EXYNOS5_IRQ_CAM_C               IRQ_SPI(110)
+#define EXYNOS5_IRQ_EAGLE_PMU           IRQ_SPI(111)
+#define EXYNOS5_IRQ_INTFEEDCTRL_SSS     IRQ_SPI(112)
+#define EXYNOS5_IRQ_DP1_INTP1           IRQ_SPI(113)
+#define EXYNOS5_IRQ_CEC                 IRQ_SPI(114)
+#define EXYNOS5_IRQ_SATA                IRQ_SPI(115)
+#define EXYNOS5_IRQ_NFCON               IRQ_SPI(116)
+
+#define EXYNOS5_IRQ_MMC44               IRQ_SPI(123)
+#define EXYNOS5_IRQ_MDMA1               IRQ_SPI(124)
+#define EXYNOS5_IRQ_FIMC_LITE0          IRQ_SPI(125)
+#define EXYNOS5_IRQ_FIMC_LITE1          IRQ_SPI(126)
+#define EXYNOS5_IRQ_RP_TIMER            IRQ_SPI(127)
+
+#define EXYNOS5_IRQ_PMU                 COMBINER_IRQ(1, 2)
+#define EXYNOS5_IRQ_PMU_CPU1            COMBINER_IRQ(1, 6)
+
+#define EXYNOS5_IRQ_SYSMMU_GSC0_0       COMBINER_IRQ(2, 0)
+#define EXYNOS5_IRQ_SYSMMU_GSC0_1       COMBINER_IRQ(2, 1)
+#define EXYNOS5_IRQ_SYSMMU_GSC1_0       COMBINER_IRQ(2, 2)
+#define EXYNOS5_IRQ_SYSMMU_GSC1_1       COMBINER_IRQ(2, 3)
+#define EXYNOS5_IRQ_SYSMMU_GSC2_0       COMBINER_IRQ(2, 4)
+#define EXYNOS5_IRQ_SYSMMU_GSC2_1       COMBINER_IRQ(2, 5)
+#define EXYNOS5_IRQ_SYSMMU_GSC3_0       COMBINER_IRQ(2, 6)
+#define EXYNOS5_IRQ_SYSMMU_GSC3_1       COMBINER_IRQ(2, 7)
+
+#define EXYNOS5_IRQ_SYSMMU_FIMD1_0      COMBINER_IRQ(3, 2)
+#define EXYNOS5_IRQ_SYSMMU_FIMD1_1      COMBINER_IRQ(3, 3)
+#define EXYNOS5_IRQ_SYSMMU_LITE0_0      COMBINER_IRQ(3, 4)
+#define EXYNOS5_IRQ_SYSMMU_LITE0_1      COMBINER_IRQ(3, 5)
+#define EXYNOS5_IRQ_SYSMMU_SCALERPISP_0 COMBINER_IRQ(3, 6)
+#define EXYNOS5_IRQ_SYSMMU_SCALERPISP_1 COMBINER_IRQ(3, 7)
+
+#define EXYNOS5_IRQ_SYSMMU_ROTATOR_0    COMBINER_IRQ(4, 0)
+#define EXYNOS5_IRQ_SYSMMU_ROTATOR_1    COMBINER_IRQ(4, 1)
+#define EXYNOS5_IRQ_SYSMMU_JPEG_0       COMBINER_IRQ(4, 2)
+#define EXYNOS5_IRQ_SYSMMU_JPEG_1       COMBINER_IRQ(4, 3)
+
+#define EXYNOS5_IRQ_SYSMMU_FD_0         COMBINER_IRQ(5, 0)
+#define EXYNOS5_IRQ_SYSMMU_FD_1         COMBINER_IRQ(5, 1)
+#define EXYNOS5_IRQ_SYSMMU_SCALERCISP_0 COMBINER_IRQ(5, 2)
+#define EXYNOS5_IRQ_SYSMMU_SCALERCISP_1 COMBINER_IRQ(5, 3)
+#define EXYNOS5_IRQ_SYSMMU_MCUISP_0     COMBINER_IRQ(5, 4)
+#define EXYNOS5_IRQ_SYSMMU_MCUISP_1     COMBINER_IRQ(5, 5)
+#define EXYNOS5_IRQ_SYSMMU_3DNR_0       COMBINER_IRQ(5, 6)
+#define EXYNOS5_IRQ_SYSMMU_3DNR_1       COMBINER_IRQ(5, 7)
+
+#define EXYNOS5_IRQ_SYSMMU_ARM_0        COMBINER_IRQ(6, 0)
+#define EXYNOS5_IRQ_SYSMMU_ARM_1        COMBINER_IRQ(6, 1)
+#define EXYNOS5_IRQ_SYSMMU_MFC_L_0      COMBINER_IRQ(6, 2)
+#define EXYNOS5_IRQ_SYSMMU_MFC_L_1      COMBINER_IRQ(6, 3)
+#define EXYNOS5_IRQ_SYSMMU_RTIC_0       COMBINER_IRQ(6, 4)
+#define EXYNOS5_IRQ_SYSMMU_RTIC_1       COMBINER_IRQ(6, 5)
+#define EXYNOS5_IRQ_SYSMMU_SSS_0        COMBINER_IRQ(6, 6)
+#define EXYNOS5_IRQ_SYSMMU_SSS_1        COMBINER_IRQ(6, 7)
+
+#define EXYNOS5_IRQ_SYSMMU_MDMA0_0      COMBINER_IRQ(7, 0)
+#define EXYNOS5_IRQ_SYSMMU_MDMA0_1      COMBINER_IRQ(7, 1)
+#define EXYNOS5_IRQ_SYSMMU_MDMA1_0      COMBINER_IRQ(7, 2)
+#define EXYNOS5_IRQ_SYSMMU_MDMA1_1      COMBINER_IRQ(7, 3)
+#define EXYNOS5_IRQ_SYSMMU_TV_0         COMBINER_IRQ(7, 4)
+#define EXYNOS5_IRQ_SYSMMU_TV_1         COMBINER_IRQ(7, 5)
+#define EXYNOS5_IRQ_SYSMMU_GPSX_0       COMBINER_IRQ(7, 6)
+#define EXYNOS5_IRQ_SYSMMU_GPSX_1       COMBINER_IRQ(7, 7)
+
+#define EXYNOS5_IRQ_SYSMMU_MFC_R_0      COMBINER_IRQ(8, 5)
+#define EXYNOS5_IRQ_SYSMMU_MFC_R_1      COMBINER_IRQ(8, 6)
+
+#define EXYNOS5_IRQ_SYSMMU_DIS1_0       COMBINER_IRQ(9, 4)
+#define EXYNOS5_IRQ_SYSMMU_DIS1_1       COMBINER_IRQ(9, 5)
+
+#define EXYNOS5_IRQ_DP                  COMBINER_IRQ(10, 3)
+#define EXYNOS5_IRQ_SYSMMU_DIS0_0       COMBINER_IRQ(10, 4)
+#define EXYNOS5_IRQ_SYSMMU_DIS0_1       COMBINER_IRQ(10, 5)
+#define EXYNOS5_IRQ_SYSMMU_ISP_0        COMBINER_IRQ(10, 6)
+#define EXYNOS5_IRQ_SYSMMU_ISP_1        COMBINER_IRQ(10, 7)
+
+#define EXYNOS5_IRQ_SYSMMU_ODC_0        COMBINER_IRQ(11, 0)
+#define EXYNOS5_IRQ_SYSMMU_ODC_1        COMBINER_IRQ(11, 1)
+#define EXYNOS5_IRQ_SYSMMU_DRC_0        COMBINER_IRQ(11, 6)
+#define EXYNOS5_IRQ_SYSMMU_DRC_1        COMBINER_IRQ(11, 7)
+
+#define EXYNOS5_IRQ_FIMD1_FIFO          COMBINER_IRQ(18, 4)
+#define EXYNOS5_IRQ_FIMD1_VSYNC         COMBINER_IRQ(18, 5)
+#define EXYNOS5_IRQ_FIMD1_SYSTEM        COMBINER_IRQ(18, 6)
+
+#define EXYNOS5_IRQ_EINT0               COMBINER_IRQ(23, 0)
+#define EXYNOS5_IRQ_MCT_L0              COMBINER_IRQ(23, 1)
+#define EXYNOS5_IRQ_MCT_L1              COMBINER_IRQ(23, 2)
+#define EXYNOS5_IRQ_MCT_G0              COMBINER_IRQ(23, 3)
+#define EXYNOS5_IRQ_MCT_G1              COMBINER_IRQ(23, 4)
+#define EXYNOS5_IRQ_MCT_G2              COMBINER_IRQ(23, 5)
+#define EXYNOS5_IRQ_MCT_G3              COMBINER_IRQ(23, 6)
+
+#define EXYNOS5_IRQ_EINT1               COMBINER_IRQ(24, 0)
+#define EXYNOS5_IRQ_SYSMMU_LITE1_0      COMBINER_IRQ(24, 1)
+#define EXYNOS5_IRQ_SYSMMU_LITE1_1      COMBINER_IRQ(24, 2)
+#define EXYNOS5_IRQ_SYSMMU_2D_0         COMBINER_IRQ(24, 5)
+#define EXYNOS5_IRQ_SYSMMU_2D_1         COMBINER_IRQ(24, 6)
+
+#define EXYNOS5_IRQ_EINT2               COMBINER_IRQ(25, 0)
+#define EXYNOS5_IRQ_EINT3               COMBINER_IRQ(25, 1)
+
+#define EXYNOS5_IRQ_EINT4               COMBINER_IRQ(26, 0)
+#define EXYNOS5_IRQ_EINT5               COMBINER_IRQ(26, 1)
+
+#define EXYNOS5_IRQ_EINT6               COMBINER_IRQ(27, 0)
+#define EXYNOS5_IRQ_EINT7               COMBINER_IRQ(27, 1)
+
+#define EXYNOS5_IRQ_EINT8               COMBINER_IRQ(28, 0)
+#define EXYNOS5_IRQ_EINT9               COMBINER_IRQ(28, 1)
+
+#define EXYNOS5_IRQ_EINT10              COMBINER_IRQ(29, 0)
+#define EXYNOS5_IRQ_EINT11              COMBINER_IRQ(29, 1)
+
+#define EXYNOS5_IRQ_EINT12              COMBINER_IRQ(30, 0)
+#define EXYNOS5_IRQ_EINT13              COMBINER_IRQ(30, 1)
+
+#define EXYNOS5_IRQ_EINT14              COMBINER_IRQ(31, 0)
+#define EXYNOS5_IRQ_EINT15              COMBINER_IRQ(31, 1)
+
+#define EXYNOS5_MAX_COMBINER_NR         32
+
+#define EXYNOS5_IRQ_GPIO1_NR_GROUPS     13
+#define EXYNOS5_IRQ_GPIO2_NR_GROUPS     9
+#define EXYNOS5_IRQ_GPIO3_NR_GROUPS     5
+#define EXYNOS5_IRQ_GPIO4_NR_GROUPS     1
+
+#define MAX_COMBINER_NR                 (EXYNOS4_MAX_COMBINER_NR > EXYNOS5_MAX_COMBINER_NR ? \
+                                        EXYNOS4_MAX_COMBINER_NR : EXYNOS5_MAX_COMBINER_NR)
+
+#define S5P_EINT_BASE1                  COMBINER_IRQ(MAX_COMBINER_NR, 0)
+#define S5P_EINT_BASE2                  (S5P_EINT_BASE1 + 16)
+#define S5P_GPIOINT_BASE                (S5P_EINT_BASE1 + 32)
+#define IRQ_GPIO_END                    (S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT)
+#define IRQ_TIMER_BASE                  (IRQ_GPIO_END + 64)
 
 /* Set the default NR_IRQS */
-#define NR_IRQS                 (IRQ_TIMER_BASE + IRQ_TIMER_COUNT)
+
+#define NR_IRQS                         (IRQ_TIMER_BASE + IRQ_TIMER_COUNT)
 
 #endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 609127df9b02..024d38ff1718 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -25,6 +25,7 @@
 
 #define EXYNOS4_PA_SYSRAM0              0x02025000
 #define EXYNOS4_PA_SYSRAM1              0x02020000
+#define EXYNOS5_PA_SYSRAM               0x02020000
 
 #define EXYNOS4_PA_FIMC0                0x11800000
 #define EXYNOS4_PA_FIMC1                0x11810000
@@ -48,14 +49,23 @@
 #define EXYNOS4_PA_ONENAND              0x0C000000
 #define EXYNOS4_PA_ONENAND_DMA          0x0C600000
 
-#define EXYNOS4_PA_CHIPID               0x10000000
+#define EXYNOS_PA_CHIPID                0x10000000
 
 #define EXYNOS4_PA_SYSCON               0x10010000
+#define EXYNOS5_PA_SYSCON               0x10050100
+
 #define EXYNOS4_PA_PMU                  0x10020000
+#define EXYNOS5_PA_PMU                  0x10040000
+
 #define EXYNOS4_PA_CMU                  0x10030000
+#define EXYNOS5_PA_CMU                  0x10010000
 
 #define EXYNOS4_PA_SYSTIMER             0x10050000
+#define EXYNOS5_PA_SYSTIMER             0x101C0000
+
 #define EXYNOS4_PA_WATCHDOG             0x10060000
+#define EXYNOS5_PA_WATCHDOG             0x101D0000
+
 #define EXYNOS4_PA_RTC                  0x10070000
 
 #define EXYNOS4_PA_KEYPAD               0x100A0000
@@ -64,9 +74,12 @@
 #define EXYNOS4_PA_DMC1                 0x10410000
 
 #define EXYNOS4_PA_COMBINER             0x10440000
+#define EXYNOS5_PA_COMBINER             0x10440000
 
 #define EXYNOS4_PA_GIC_CPU              0x10480000
 #define EXYNOS4_PA_GIC_DIST             0x10490000
+#define EXYNOS5_PA_GIC_CPU              0x10480000
+#define EXYNOS5_PA_GIC_DIST             0x10490000
 
 #define EXYNOS4_PA_COREPERI             0x10500000
 #define EXYNOS4_PA_TWD                  0x10500600
@@ -97,10 +110,13 @@
 #define EXYNOS4_PA_SPI1                 0x13930000
 #define EXYNOS4_PA_SPI2                 0x13940000
 
-
 #define EXYNOS4_PA_GPIO1                0x11400000
 #define EXYNOS4_PA_GPIO2                0x11000000
 #define EXYNOS4_PA_GPIO3                0x03860000
+#define EXYNOS5_PA_GPIO1                0x11400000
+#define EXYNOS5_PA_GPIO2                0x13400000
+#define EXYNOS5_PA_GPIO3                0x10D10000
+#define EXYNOS5_PA_GPIO4                0x03860000
 
 #define EXYNOS4_PA_MIPI_CSIS0           0x11880000
 #define EXYNOS4_PA_MIPI_CSIS1           0x11890000
@@ -115,6 +131,7 @@
 #define EXYNOS4_PA_SATAPHY_CTRL         0x126B0000
 
 #define EXYNOS4_PA_SROMC                0x12570000
+#define EXYNOS5_PA_SROMC                0x12250000
 
 #define EXYNOS4_PA_EHCI                 0x12580000
 #define EXYNOS4_PA_OHCI                 0x12590000
@@ -122,6 +139,7 @@
 #define EXYNOS4_PA_MFC                  0x13400000
 
 #define EXYNOS4_PA_UART                 0x13800000
+#define EXYNOS5_PA_UART                 0x12C00000
 
 #define EXYNOS4_PA_VP                   0x12C00000
 #define EXYNOS4_PA_MIXER                0x12C10000
@@ -130,6 +148,7 @@
 #define EXYNOS4_PA_IIC_HDMIPHY          0x138E0000
 
 #define EXYNOS4_PA_IIC(x)               (0x13860000 + ((x) * 0x10000))
+#define EXYNOS5_PA_IIC(x)               (0x12C60000 + ((x) * 0x10000))
 
 #define EXYNOS4_PA_ADC                  0x13910000
 #define EXYNOS4_PA_ADC1                 0x13911000
@@ -139,8 +158,10 @@
 #define EXYNOS4_PA_SPDIF                0x139B0000
 
 #define EXYNOS4_PA_TIMER                0x139D0000
+#define EXYNOS5_PA_TIMER                0x12DD0000
 
 #define EXYNOS4_PA_SDRAM                0x40000000
+#define EXYNOS5_PA_SDRAM                0x40000000
 
 /* Compatibiltiy Defines */
 
@@ -158,7 +179,6 @@
 #define S3C_PA_IIC7                     EXYNOS4_PA_IIC(7)
 #define S3C_PA_RTC                      EXYNOS4_PA_RTC
 #define S3C_PA_WDT                      EXYNOS4_PA_WATCHDOG
-#define S3C_PA_UART                     EXYNOS4_PA_UART
 #define S3C_PA_SPI0                     EXYNOS4_PA_SPI0
 #define S3C_PA_SPI1                     EXYNOS4_PA_SPI1
 #define S3C_PA_SPI2                     EXYNOS4_PA_SPI2
@@ -189,15 +209,18 @@
 
 /* Compatibility UART */
 
-#define S3C_VA_UARTx(x)                 (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
+#define EXYNOS4_PA_UART0                0x13800000
+#define EXYNOS4_PA_UART1                0x13810000
+#define EXYNOS4_PA_UART2                0x13820000
+#define EXYNOS4_PA_UART3                0x13830000
+#define EXYNOS4_SZ_UART                 SZ_256
 
-#define S5P_PA_UART(x)                  (EXYNOS4_PA_UART + ((x) * S3C_UART_OFFSET))
-#define S5P_PA_UART0                    S5P_PA_UART(0)
-#define S5P_PA_UART1                    S5P_PA_UART(1)
-#define S5P_PA_UART2                    S5P_PA_UART(2)
-#define S5P_PA_UART3                    S5P_PA_UART(3)
-#define S5P_PA_UART4                    S5P_PA_UART(4)
+#define EXYNOS5_PA_UART0                0x12C00000
+#define EXYNOS5_PA_UART1                0x12C10000
+#define EXYNOS5_PA_UART2                0x12C20000
+#define EXYNOS5_PA_UART3                0x12C30000
+#define EXYNOS5_SZ_UART                 SZ_256
 
-#define S5P_SZ_UART                     SZ_256
+#define S3C_VA_UARTx(x)                 (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
 
 #endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-exynos/include/mach/regs-clock.h b/arch/arm/mach-exynos/include/mach/regs-clock.h
index 1e4abd64a547..e141c1fd68d8 100644
--- a/arch/arm/mach-exynos/include/mach/regs-clock.h
+++ b/arch/arm/mach-exynos/include/mach/regs-clock.h
@@ -253,6 +253,68 @@
 #define EXYNOS4_CLKDIV_CAM1_JPEG_SHIFT          (0)
 #define EXYNOS4_CLKDIV_CAM1_JPEG_MASK           (0xf << EXYNOS4_CLKDIV_CAM1_JPEG_SHIFT)
 
+/* For EXYNOS5250 */
+
+#define EXYNOS5_APLL_CON0                       EXYNOS_CLKREG(0x00100)
+#define EXYNOS5_CLKSRC_CPU                      EXYNOS_CLKREG(0x00200)
+#define EXYNOS5_CLKDIV_CPU0                     EXYNOS_CLKREG(0x00500)
+#define EXYNOS5_MPLL_CON0                       EXYNOS_CLKREG(0x04100)
+#define EXYNOS5_CLKSRC_CORE1                    EXYNOS_CLKREG(0x04204)
+
+#define EXYNOS5_CLKGATE_IP_CORE                 EXYNOS_CLKREG(0x04900)
+
+#define EXYNOS5_CLKDIV_ACP                      EXYNOS_CLKREG(0x08500)
+
+#define EXYNOS5_CLKSRC_TOP2                     EXYNOS_CLKREG(0x10218)
+#define EXYNOS5_EPLL_CON0                       EXYNOS_CLKREG(0x10130)
+#define EXYNOS5_EPLL_CON1                       EXYNOS_CLKREG(0x10134)
+#define EXYNOS5_VPLL_CON0                       EXYNOS_CLKREG(0x10140)
+#define EXYNOS5_VPLL_CON1                       EXYNOS_CLKREG(0x10144)
+#define EXYNOS5_CPLL_CON0                       EXYNOS_CLKREG(0x10120)
+
+#define EXYNOS5_CLKSRC_TOP0                     EXYNOS_CLKREG(0x10210)
+#define EXYNOS5_CLKSRC_TOP3                     EXYNOS_CLKREG(0x1021C)
+#define EXYNOS5_CLKSRC_GSCL                     EXYNOS_CLKREG(0x10220)
+#define EXYNOS5_CLKSRC_DISP1_0                  EXYNOS_CLKREG(0x1022C)
+#define EXYNOS5_CLKSRC_FSYS                     EXYNOS_CLKREG(0x10244)
+#define EXYNOS5_CLKSRC_PERIC0                   EXYNOS_CLKREG(0x10250)
+
+#define EXYNOS5_CLKSRC_MASK_TOP                 EXYNOS_CLKREG(0x10310)
+#define EXYNOS5_CLKSRC_MASK_GSCL                EXYNOS_CLKREG(0x10320)
+#define EXYNOS5_CLKSRC_MASK_DISP1_0             EXYNOS_CLKREG(0x1032C)
+#define EXYNOS5_CLKSRC_MASK_FSYS                EXYNOS_CLKREG(0x10340)
+#define EXYNOS5_CLKSRC_MASK_PERIC0              EXYNOS_CLKREG(0x10350)
+
+#define EXYNOS5_CLKDIV_TOP0                     EXYNOS_CLKREG(0x10510)
+#define EXYNOS5_CLKDIV_TOP1                     EXYNOS_CLKREG(0x10514)
+#define EXYNOS5_CLKDIV_GSCL                     EXYNOS_CLKREG(0x10520)
+#define EXYNOS5_CLKDIV_DISP1_0                  EXYNOS_CLKREG(0x1052C)
+#define EXYNOS5_CLKDIV_GEN                      EXYNOS_CLKREG(0x1053C)
+#define EXYNOS5_CLKDIV_FSYS0                    EXYNOS_CLKREG(0x10548)
+#define EXYNOS5_CLKDIV_FSYS1                    EXYNOS_CLKREG(0x1054C)
+#define EXYNOS5_CLKDIV_FSYS2                    EXYNOS_CLKREG(0x10550)
+#define EXYNOS5_CLKDIV_FSYS3                    EXYNOS_CLKREG(0x10554)
+#define EXYNOS5_CLKDIV_PERIC0                   EXYNOS_CLKREG(0x10558)
+
+#define EXYNOS5_CLKGATE_IP_ACP                  EXYNOS_CLKREG(0x08800)
+#define EXYNOS5_CLKGATE_IP_GSCL                 EXYNOS_CLKREG(0x10920)
+#define EXYNOS5_CLKGATE_IP_DISP1                EXYNOS_CLKREG(0x10928)
+#define EXYNOS5_CLKGATE_IP_MFC                  EXYNOS_CLKREG(0x1092C)
+#define EXYNOS5_CLKGATE_IP_GEN                  EXYNOS_CLKREG(0x10934)
+#define EXYNOS5_CLKGATE_IP_FSYS                 EXYNOS_CLKREG(0x10944)
+#define EXYNOS5_CLKGATE_IP_GPS                  EXYNOS_CLKREG(0x1094C)
+#define EXYNOS5_CLKGATE_IP_PERIC                EXYNOS_CLKREG(0x10950)
+#define EXYNOS5_CLKGATE_IP_PERIS                EXYNOS_CLKREG(0x10960)
+#define EXYNOS5_CLKGATE_BLOCK                   EXYNOS_CLKREG(0x10980)
+
+#define EXYNOS5_BPLL_CON0                       EXYNOS_CLKREG(0x20110)
+#define EXYNOS5_CLKSRC_CDREX                    EXYNOS_CLKREG(0x20200)
+#define EXYNOS5_CLKDIV_CDREX                    EXYNOS_CLKREG(0x20500)
+
+#define EXYNOS5_EPLL_LOCK                       EXYNOS_CLKREG(0x10030)
+
+#define EXYNOS5_EPLLCON0_LOCKED_SHIFT           (29)
+
 /* Compatibility defines and inclusion */
 
 #include <mach/regs-pmu.h>
diff --git a/arch/arm/mach-exynos/include/mach/regs-gpio.h b/arch/arm/mach-exynos/include/mach/regs-gpio.h
index 1401b21663a5..e4b5b60dcb85 100644
--- a/arch/arm/mach-exynos/include/mach/regs-gpio.h
+++ b/arch/arm/mach-exynos/include/mach/regs-gpio.h
@@ -16,6 +16,15 @@
 #include <mach/map.h>
 #include <mach/irqs.h>
 
+#define EINT_REG_NR(x)                  (EINT_OFFSET(x) >> 3)
+#define EINT_CON(b, x)                  (b + 0xE00 + (EINT_REG_NR(x) * 4))
+#define EINT_FLTCON(b, x)               (b + 0xE80 + (EINT_REG_NR(x) * 4))
+#define EINT_MASK(b, x)                 (b + 0xF00 + (EINT_REG_NR(x) * 4))
+#define EINT_PEND(b, x)                 (b + 0xF40 + (EINT_REG_NR(x) * 4))
+
+#define EINT_OFFSET_BIT(x)              (1 << (EINT_OFFSET(x) & 0x7))
+
+/* compatibility for plat-s5p/irq-pm.c */
 #define EXYNOS4_EINT40CON               (S5P_VA_GPIO2 + 0xE00)
 #define S5P_EINT_CON(x)                 (EXYNOS4_EINT40CON + ((x) * 0x4))
 
@@ -28,15 +37,4 @@
 #define EXYNOS4_EINT40PEND              (S5P_VA_GPIO2 + 0xF40)
 #define S5P_EINT_PEND(x)                (EXYNOS4_EINT40PEND + ((x) * 0x4))
 
-#define EINT_REG_NR(x)                  (EINT_OFFSET(x) >> 3)
-
-#define eint_irq_to_bit(irq)            (1 << (EINT_OFFSET(irq) & 0x7))
-
-#define EINT_MODE                       S3C_GPIO_SFN(0xf)
-
-#define EINT_GPIO_0(x)                  EXYNOS4_GPX0(x)
-#define EINT_GPIO_1(x)                  EXYNOS4_GPX1(x)
-#define EINT_GPIO_2(x)                  EXYNOS4_GPX2(x)
-#define EINT_GPIO_3(x)                  EXYNOS4_GPX3(x)
-
 #endif /* __ASM_ARCH_REGS_GPIO_H */
diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h
index 4fff8e938fec..4c53f38b5a9e 100644
--- a/arch/arm/mach-exynos/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h
@@ -31,6 +31,7 @@
 #define S5P_USE_STANDBYWFE_ISP_ARM              (1 << 26)
 
 #define S5P_SWRESET                             S5P_PMUREG(0x0400)
+#define EXYNOS_SWRESET                          S5P_PMUREG(0x0400)
 
 #define S5P_WAKEUP_STAT                         S5P_PMUREG(0x0600)
 #define S5P_EINT_WAKEUP_MASK                    S5P_PMUREG(0x0604)
diff --git a/arch/arm/mach-exynos/include/mach/uncompress.h b/arch/arm/mach-exynos/include/mach/uncompress.h
index 21d97bcd9acb..2979995d5a6a 100644
--- a/arch/arm/mach-exynos/include/mach/uncompress.h
+++ b/arch/arm/mach-exynos/include/mach/uncompress.h
@@ -1,9 +1,8 @@
-/* linux/arch/arm/mach-exynos4/include/mach/uncompress.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+/*
+ * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd.
  *              http://www.samsung.com
  *
- * EXYNOS4 - uncompress code
+ * EXYNOS - uncompress code
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -13,12 +12,35 @@
 #ifndef __ASM_ARCH_UNCOMPRESS_H
 #define __ASM_ARCH_UNCOMPRESS_H __FILE__
 
+#include <asm/mach-types.h>
+
 #include <mach/map.h>
+
+volatile u8 *uart_base;
+
 #include <plat/uncompress.h>
 
+static unsigned int __raw_readl(unsigned int ptr)
+{
+        return *((volatile unsigned int *)ptr);
+}
+
 static void arch_detect_cpu(void)
 {
-        /* we do not need to do any cpu detection here at the moment. */
+        u32 chip_id = __raw_readl(EXYNOS_PA_CHIPID);
+
+        /*
+         * product_id is bits 31:12
+         *    bits 23:20 describe the exynosX family
+         *
+         */
+        chip_id >>= 20;
+        chip_id &= 0xf;
+
+        if (chip_id == 0x5)
+                uart_base = (volatile u8 *)EXYNOS5_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);
+        else
+                uart_base = (volatile u8 *)EXYNOS4_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);
 
         /*
          * For preventing FIFO overrun or infinite loop of UART console,
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c
index e6b02fdf1b09..8245f1c761d9 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -37,13 +37,13 @@
  * data from the device tree.
  */
 static const struct of_dev_auxdata exynos4210_auxdata_lookup[] __initconst = {
-        OF_DEV_AUXDATA("samsung,exynos4210-uart", S5P_PA_UART0,
+        OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS4_PA_UART0,
                                 "exynos4210-uart.0", NULL),
-        OF_DEV_AUXDATA("samsung,exynos4210-uart", S5P_PA_UART1,
+        OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS4_PA_UART1,
                                 "exynos4210-uart.1", NULL),
-        OF_DEV_AUXDATA("samsung,exynos4210-uart", S5P_PA_UART2,
+        OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS4_PA_UART2,
                                 "exynos4210-uart.2", NULL),
-        OF_DEV_AUXDATA("samsung,exynos4210-uart", S5P_PA_UART3,
+        OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS4_PA_UART3,
                                 "exynos4210-uart.3", NULL),
         OF_DEV_AUXDATA("samsung,exynos4210-sdhci", EXYNOS4_PA_HSMMC(0),
                                 "exynos4-sdhci.0", NULL),
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
new file mode 100644
index 000000000000..0d26f50081ad
--- /dev/null
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -0,0 +1,78 @@
+/*
+ * SAMSUNG EXYNOS5250 Flattened Device Tree enabled machine
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/of_platform.h>
+#include <linux/serial_core.h>
+
+#include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
+#include <mach/map.h>
+
+#include <plat/cpu.h>
+#include <plat/regs-serial.h>
+
+#include "common.h"
+
+/*
+ * The following lookup table is used to override device names when devices
+ * are registered from device tree. This is temporarily added to enable
+ * device tree support addition for the EXYNOS5 architecture.
+ *
+ * For drivers that require platform data to be provided from the machine
+ * file, a platform data pointer can also be supplied along with the
+ * devices names. Usually, the platform data elements that cannot be parsed
+ * from the device tree by the drivers (example: function pointers) are
+ * supplied. But it should be noted that this is a temporary mechanism and
+ * at some point, the drivers should be capable of parsing all the platform
+ * data from the device tree.
+ */
+static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
+        OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART0,
+                                "exynos4210-uart.0", NULL),
+        OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART1,
+                                "exynos4210-uart.1", NULL),
+        OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART2,
+                                "exynos4210-uart.2", NULL),
+        OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART3,
+                                "exynos4210-uart.3", NULL),
+        OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
+        OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
+        OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.2", NULL),
+        {},
+};
+
+static void __init exynos5250_dt_map_io(void)
+{
+        exynos_init_io(NULL, 0);
+        s3c24xx_init_clocks(24000000);
+}
+
+static void __init exynos5250_dt_machine_init(void)
+{
+        of_platform_populate(NULL, of_default_bus_match_table,
+                                exynos5250_auxdata_lookup, NULL);
+}
+
+static char const *exynos5250_dt_compat[] __initdata = {
+        "samsung,exynos5250",
+        NULL
+};
+
+DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
+        /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
+        .init_irq       = exynos5_init_irq,
+        .map_io         = exynos5250_dt_map_io,
+        .handle_irq     = gic_handle_irq,
+        .init_machine   = exynos5250_dt_machine_init,
+        .timer          = &exynos4_timer,
+        .dt_compat      = exynos5250_dt_compat,
+        .restart        = exynos5_restart,
+MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 82ea6fccfb34..b3982c867c9c 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -111,7 +111,7 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data __initdata = {
         .max_width              = 8,
         .host_caps              = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
                                 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
-                                MMC_CAP_DISABLE | MMC_CAP_ERASE),
+                                MMC_CAP_ERASE),
         .cd_type                = S3C_SDHCI_CD_PERMANENT,
         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 };
@@ -150,8 +150,7 @@ static struct platform_device emmc_fixed_voltage = {
 static struct s3c_sdhci_platdata nuri_hsmmc2_data __initdata = {
         .max_width              = 4,
         .host_caps              = MMC_CAP_4_BIT_DATA |
-                                MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
-                                MMC_CAP_DISABLE,
+                                MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
         .ext_cd_gpio            = EXYNOS4_GPX3(3),      /* XEINT_27 */
         .ext_cd_gpio_invert     = 1,
         .cd_type                = S3C_SDHCI_CD_GPIO,
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 28658da9f423..6bb9dbdd73fd 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -745,8 +745,7 @@ static struct platform_device universal_gpio_keys = {
 static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
         .max_width              = 8,
         .host_caps              = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
-                                MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
-                                MMC_CAP_DISABLE),
+                                MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
         .cd_type                = S3C_SDHCI_CD_PERMANENT,
         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 };
@@ -784,8 +783,7 @@ static struct platform_device mmc0_fixed_voltage = {
 static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
         .max_width              = 4,
         .host_caps              = MMC_CAP_4_BIT_DATA |
-                                MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
-                                MMC_CAP_DISABLE,
+                                MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
         .ext_cd_gpio            = EXYNOS4_GPX3(4),      /* XEINT_28 */
         .ext_cd_gpio_invert     = 1,
         .cd_type                = S3C_SDHCI_CD_GPIO,
@@ -796,8 +794,7 @@ static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
 static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
         .max_width              = 4,
         .host_caps              = MMC_CAP_4_BIT_DATA |
-                                MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
-                                MMC_CAP_DISABLE,
+                                MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
         .cd_type                = S3C_SDHCI_CD_EXTERNAL,
 };
 
diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c
index e8a1caaf1902..897d9a9cf226 100644
--- a/arch/arm/mach-exynos/mct.c
+++ b/arch/arm/mach-exynos/mct.c
@@ -261,7 +261,10 @@ static void exynos4_clockevent_init(void)
         mct_comp_device.cpumask = cpumask_of(0);
         clockevents_register_device(&mct_comp_device);
 
-        setup_irq(IRQ_MCT_G0, &mct_comp_event_irq);
+        if (soc_is_exynos5250())
+                setup_irq(EXYNOS5_IRQ_MCT_G0, &mct_comp_event_irq);
+        else
+                setup_irq(EXYNOS4_IRQ_MCT_G0, &mct_comp_event_irq);
 }
 
 #ifdef CONFIG_LOCAL_TIMERS
@@ -412,16 +415,16 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt)
         if (mct_int_type == MCT_INT_SPI) {
                 if (cpu == 0) {
                         mct_tick0_event_irq.dev_id = mevt;
-                        evt->irq = IRQ_MCT_L0;
-                        setup_irq(IRQ_MCT_L0, &mct_tick0_event_irq);
+                        evt->irq = EXYNOS4_IRQ_MCT_L0;
+                        setup_irq(EXYNOS4_IRQ_MCT_L0, &mct_tick0_event_irq);
                 } else {
                         mct_tick1_event_irq.dev_id = mevt;
-                        evt->irq = IRQ_MCT_L1;
-                        setup_irq(IRQ_MCT_L1, &mct_tick1_event_irq);
-                        irq_set_affinity(IRQ_MCT_L1, cpumask_of(1));
+                        evt->irq = EXYNOS4_IRQ_MCT_L1;
+                        setup_irq(EXYNOS4_IRQ_MCT_L1, &mct_tick1_event_irq);
+                        irq_set_affinity(EXYNOS4_IRQ_MCT_L1, cpumask_of(1));
                 }
         } else {
-                enable_percpu_irq(IRQ_MCT_LOCALTIMER, 0);
+                enable_percpu_irq(EXYNOS_IRQ_MCT_LOCALTIMER, 0);
         }
 
         return 0;
@@ -437,7 +440,7 @@ static void exynos4_local_timer_stop(struct clock_event_device *evt)
                 else
                         remove_irq(evt->irq, &mct_tick1_event_irq);
         else
-                disable_percpu_irq(IRQ_MCT_LOCALTIMER);
+                disable_percpu_irq(EXYNOS_IRQ_MCT_LOCALTIMER);
 }
 
 static struct local_timer_ops exynos4_mct_tick_ops __cpuinitdata = {
@@ -457,11 +460,11 @@ static void __init exynos4_timer_resources(void)
         if (mct_int_type == MCT_INT_PPI) {
                 int err;
 
-                err = request_percpu_irq(IRQ_MCT_LOCALTIMER,
+                err = request_percpu_irq(EXYNOS_IRQ_MCT_LOCALTIMER,
                                          exynos4_mct_tick_isr, "MCT",
                                          &percpu_mct_tick);
                 WARN(err, "MCT: can't request IRQ %d (%d)\n",
-                     IRQ_MCT_LOCALTIMER, err);
+                     EXYNOS_IRQ_MCT_LOCALTIMER, err);
         }
 
         local_timer_register(&exynos4_mct_tick_ops);
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 0f2035a1eb6e..36c3984aaa47 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -166,7 +166,10 @@ void __init smp_init_cpus(void)
         void __iomem *scu_base = scu_base_addr();
         unsigned int i, ncores;
 
-        ncores = scu_base ? scu_get_core_count(scu_base) : 1;
+        if (soc_is_exynos5250())
+                ncores = 2;
+        else
+                ncores = scu_base ? scu_get_core_count(scu_base) : 1;
 
         /* sanity check */
         if (ncores > nr_cpu_ids) {
@@ -183,8 +186,8 @@ void __init smp_init_cpus(void)
 
 void __init platform_smp_prepare_cpus(unsigned int max_cpus)
 {
-
-        scu_enable(scu_base_addr());
+        if (!soc_is_exynos5250())
+                scu_enable(scu_base_addr());
 
         /*
          * Write the address of secondary startup into the
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index 0b04af2b13cc..13b306808b42 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -183,6 +183,12 @@ static __init int exynos4_pm_init_power_domain(void)
 #ifdef CONFIG_S5P_DEV_CSIS1
         exynos_pm_add_dev_to_genpd(&s5p_device_mipi_csis1, &exynos4_pd_cam);
 #endif
+#ifdef CONFIG_S5P_DEV_G2D
+        exynos_pm_add_dev_to_genpd(&s5p_device_g2d, &exynos4_pd_lcd0);
+#endif
+#ifdef CONFIG_S5P_DEV_JPEG
+        exynos_pm_add_dev_to_genpd(&s5p_device_jpeg, &exynos4_pd_cam);
+#endif
         return 0;
 }
 arch_initcall(exynos4_pm_init_power_domain);
diff --git a/arch/arm/mach-exynos/setup-i2c0.c b/arch/arm/mach-exynos/setup-i2c0.c
index d395bd17c38b..b90d94c17f7c 100644
--- a/arch/arm/mach-exynos/setup-i2c0.c
+++ b/arch/arm/mach-exynos/setup-i2c0.c
@@ -1,7 +1,5 @@
 /*
- * linux/arch/arm/mach-exynos4/setup-i2c0.c
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2009-2012 Samsung Electronics Co., Ltd.
  *              http://www.samsung.com/
  *
  * I2C0 GPIO configuration.
@@ -18,9 +16,14 @@ struct platform_device; /* don't need the contents */
 #include <linux/gpio.h>
 #include <plat/iic.h>
 #include <plat/gpio-cfg.h>
+#include <plat/cpu.h>
 
 void s3c_i2c0_cfg_gpio(struct platform_device *dev)
 {
+        if (soc_is_exynos5250())
+                /* will be implemented with gpio function */
+                return;
+
         s3c_gpio_cfgall_range(EXYNOS4_GPD1(0), 2,
                               S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
 }
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index 41978ee4f9d0..3e6aaa6361da 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -21,6 +21,7 @@
 #include <asm/irq.h>
 #include <asm/mach-types.h>
 #include <asm/setup.h>
+#include <asm/system_misc.h>
 #include <asm/hardware/dec21285.h>
 
 #include <asm/mach/irq.h>
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c
index 121ad1d4fa39..3b54196447c7 100644
--- a/arch/arm/mach-footbridge/dc21285-timer.c
+++ b/arch/arm/mach-footbridge/dc21285-timer.c
@@ -14,6 +14,7 @@
 
 #include <asm/hardware/dec21285.h>
 #include <asm/mach/time.h>
+#include <asm/system_info.h>
 
 #include "common.h"
 
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index 3194d3f73503..e17e11de4f5e 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -21,7 +21,6 @@
 #include <video/vga.h>
 
 #include <asm/irq.h>
-#include <asm/system.h>
 #include <asm/mach/pci.h>
 #include <asm/hardware/dec21285.h>
 
diff --git a/arch/arm/mach-footbridge/ebsa285-leds.c b/arch/arm/mach-footbridge/ebsa285-leds.c
index 4e10090cd87f..5bd266754b95 100644
--- a/arch/arm/mach-footbridge/ebsa285-leds.c
+++ b/arch/arm/mach-footbridge/ebsa285-leds.c
@@ -24,7 +24,6 @@
 #include <mach/hardware.h>
 #include <asm/leds.h>
 #include <asm/mach-types.h>
-#include <asm/system.h>
 
 #define LED_STATE_ENABLED       1
 #define LED_STATE_CLAIMED       2
diff --git a/arch/arm/mach-footbridge/include/mach/io.h b/arch/arm/mach-footbridge/include/mach/io.h
index 15a70396c27d..aba531eebbc6 100644
--- a/arch/arm/mach-footbridge/include/mach/io.h
+++ b/arch/arm/mach-footbridge/include/mach/io.h
@@ -27,18 +27,5 @@
  * Translation of various region addresses to virtual addresses
  */
 #define __io(a)                 ((void __iomem *)(PCIO_BASE + (a)))
-#if 1
-#define __mem_pci(a)            (a)
-#else
-
-static inline void __iomem *___mem_pci(void __iomem *p)
-{
-        unsigned long a = (unsigned long)p;
-        BUG_ON(a <= 0xc0000000 || a >= 0xe0000000);
-        return p;
-}
-
-#define __mem_pci(a)            ___mem_pci(a)
-#endif
 
 #endif
diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c
index 80a1c5cc9071..cac9f67e7da7 100644
--- a/arch/arm/mach-footbridge/netwinder-hw.c
+++ b/arch/arm/mach-footbridge/netwinder-hw.c
@@ -17,6 +17,7 @@
 #include <asm/leds.h>
 #include <asm/mach-types.h>
 #include <asm/setup.h>
+#include <asm/system_misc.h>
 
 #include <asm/mach/arch.h>
 
diff --git a/arch/arm/mach-footbridge/netwinder-leds.c b/arch/arm/mach-footbridge/netwinder-leds.c
index e57102e871fc..5a2bd89cbdca 100644
--- a/arch/arm/mach-footbridge/netwinder-leds.c
+++ b/arch/arm/mach-footbridge/netwinder-leds.c
@@ -24,7 +24,6 @@
 #include <mach/hardware.h>
 #include <asm/leds.h>
 #include <asm/mach-types.h>
-#include <asm/system.h>
 
 #define LED_STATE_ENABLED       1
 #define LED_STATE_CLAIMED       2
diff --git a/arch/arm/mach-gemini/include/mach/io.h b/arch/arm/mach-gemini/include/mach/io.h
deleted file mode 100644
index c548056b98b2..000000000000
--- a/arch/arm/mach-gemini/include/mach/io.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- *  Copyright (C) 2001-2006 Storlink, Corp.
- *  Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-#ifndef __MACH_IO_H
-#define __MACH_IO_H
-
-#define IO_SPACE_LIMIT  0xffffffff
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif /* __MACH_IO_H */
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index e756d1ac00c2..aa1331e86bcf 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -24,6 +24,7 @@
 #include <asm/dma.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
+#include <asm/system_misc.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/map.h>
 #include <mach/irqs.h>
diff --git a/arch/arm/mach-h720x/include/mach/io.h b/arch/arm/mach-h720x/include/mach/io.h
deleted file mode 100644
index 2c8659c21a93..000000000000
--- a/arch/arm/mach-h720x/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * arch/arm/mach-h720x/include/mach/io.h
- *
- * Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
- *
- * Changelog:
- *
- *  09-19-2001  JJKIM
- *              Created from arch/arm/mach-l7200/include/mach/io.h
- *
- *  03-27-2003  Robert Schwebel <r.schwebel@pengutronix.de>:
- *              re-unified header files for h720x
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index 808b055289b2..410a112bb52e 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -35,7 +35,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
-#include <mach/irqs.h>
 
 #include "core.h"
 #include "sysregs.h"
diff --git a/arch/arm/mach-highbank/include/mach/io.h b/arch/arm/mach-highbank/include/mach/io.h
deleted file mode 100644
index 70cfa3ba7697..000000000000
--- a/arch/arm/mach-highbank/include/mach/io.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __MACH_IO_H
-#define __MACH_IO_H
-
-#define __io(a)         ({ (void)(a); __typesafe_io(0); })
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-highbank/include/mach/irqs.h b/arch/arm/mach-highbank/include/mach/irqs.h
deleted file mode 100644
index 9746aab14e9a..000000000000
--- a/arch/arm/mach-highbank/include/mach/irqs.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __MACH_IRQS_H
-#define __MACH_IRQS_H
-
-#define NR_IRQS                 192
-
-#endif
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 52359f80c42d..7561eca131b0 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -1,6 +1,3 @@
-config IMX_HAVE_DMA_V1
-        bool
-
 config HAVE_IMX_GPC
         bool
 
@@ -38,7 +35,6 @@ config SOC_IMX1
         bool
         select ARCH_MX1
         select CPU_ARM920T
-        select IMX_HAVE_DMA_V1
         select IMX_HAVE_IOMUX_V1
         select MXC_AVIC
 
@@ -46,7 +42,6 @@ config SOC_IMX21
         bool
         select MACH_MX21
         select CPU_ARM926T
-        select IMX_HAVE_DMA_V1
         select IMX_HAVE_IOMUX_V1
         select MXC_AVIC
 
@@ -61,7 +56,6 @@ config SOC_IMX27
         bool
         select MACH_MX27
         select CPU_ARM926T
-        select IMX_HAVE_DMA_V1
         select IMX_HAVE_IOMUX_V1
         select MXC_AVIC
 
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 35fc450fa263..ab939c5046c3 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -1,5 +1,3 @@
-obj-$(CONFIG_IMX_HAVE_DMA_V1) += dma-v1.o
-
 obj-$(CONFIG_SOC_IMX1) += clock-imx1.o mm-imx1.o
 obj-$(CONFIG_SOC_IMX21) += clock-imx21.o mm-imx21.o
 
diff --git a/arch/arm/mach-imx/clock-imx27.c b/arch/arm/mach-imx/clock-imx27.c
index b9a95ed75553..98e04f5a87dd 100644
--- a/arch/arm/mach-imx/clock-imx27.c
+++ b/arch/arm/mach-imx/clock-imx27.c
@@ -662,6 +662,7 @@ static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK(NULL, "dma", dma_clk)
         _REGISTER_CLOCK(NULL, "rtic", rtic_clk)
         _REGISTER_CLOCK(NULL, "brom", brom_clk)
+        _REGISTER_CLOCK(NULL, "emma", emma_clk)
         _REGISTER_CLOCK("m2m-emmaprp.0", NULL, emma_clk)
         _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk)
         _REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk)
diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c
index 1e279af656ad..e56c1a83eee3 100644
--- a/arch/arm/mach-imx/clock-imx35.c
+++ b/arch/arm/mach-imx/clock-imx35.c
@@ -483,7 +483,7 @@ static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)
         _REGISTER_CLOCK(NULL, "max", max_clk)
         _REGISTER_CLOCK(NULL, "audmux", audmux_clk)
-        _REGISTER_CLOCK(NULL, "csi", csi_clk)
+        _REGISTER_CLOCK("mx3-camera.0", NULL, csi_clk)
         _REGISTER_CLOCK(NULL, "iim", iim_clk)
         _REGISTER_CLOCK(NULL, "gpu2d", gpu2d_clk)
         _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk)
diff --git a/arch/arm/mach-imx/dma-v1.c b/arch/arm/mach-imx/dma-v1.c
deleted file mode 100644
index 42afc29a7da8..000000000000
--- a/arch/arm/mach-imx/dma-v1.c
+++ /dev/null
@@ -1,846 +0,0 @@
-/*
- *  linux/arch/arm/plat-mxc/dma-v1.c
- *
- *  i.MX DMA registration and IRQ dispatching
- *
- * Copyright 2006 Pavel Pisa <pisa@cmp.felk.cvut.cz>
- * Copyright 2008 Juergen Beisert, <kernel@pengutronix.de>
- * Copyright 2008 Sascha Hauer, <s.hauer@pengutronix.de>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301, USA.
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/err.h>
-#include <linux/errno.h>
-#include <linux/clk.h>
-#include <linux/scatterlist.h>
-#include <linux/io.h>
-
-#include <asm/system.h>
-#include <asm/irq.h>
-#include <mach/hardware.h>
-#include <mach/dma-v1.h>
-
-#define DMA_DCR     0x00                /* Control Register */
-#define DMA_DISR    0x04                /* Interrupt status Register */
-#define DMA_DIMR    0x08                /* Interrupt mask Register */
-#define DMA_DBTOSR  0x0c                /* Burst timeout status Register */
-#define DMA_DRTOSR  0x10                /* Request timeout Register */
-#define DMA_DSESR   0x14                /* Transfer Error Status Register */
-#define DMA_DBOSR   0x18                /* Buffer overflow status Register */
-#define DMA_DBTOCR  0x1c                /* Burst timeout control Register */
-#define DMA_WSRA    0x40                /* W-Size Register A */
-#define DMA_XSRA    0x44                /* X-Size Register A */
-#define DMA_YSRA    0x48                /* Y-Size Register A */
-#define DMA_WSRB    0x4c                /* W-Size Register B */
-#define DMA_XSRB    0x50                /* X-Size Register B */
-#define DMA_YSRB    0x54                /* Y-Size Register B */
-#define DMA_SAR(x)  (0x80 + ((x) << 6)) /* Source Address Registers */
-#define DMA_DAR(x)  (0x84 + ((x) << 6)) /* Destination Address Registers */
-#define DMA_CNTR(x) (0x88 + ((x) << 6)) /* Count Registers */
-#define DMA_CCR(x)  (0x8c + ((x) << 6)) /* Control Registers */
-#define DMA_RSSR(x) (0x90 + ((x) << 6)) /* Request source select Registers */
-#define DMA_BLR(x)  (0x94 + ((x) << 6)) /* Burst length Registers */
-#define DMA_RTOR(x) (0x98 + ((x) << 6)) /* Request timeout Registers */
-#define DMA_BUCR(x) (0x98 + ((x) << 6)) /* Bus Utilization Registers */
-#define DMA_CCNR(x) (0x9C + ((x) << 6)) /* Channel counter Registers */
-
-#define DCR_DRST           (1<<1)
-#define DCR_DEN            (1<<0)
-#define DBTOCR_EN          (1<<15)
-#define DBTOCR_CNT(x)      ((x) & 0x7fff)
-#define CNTR_CNT(x)        ((x) & 0xffffff)
-#define CCR_ACRPT          (1<<14)
-#define CCR_DMOD_LINEAR    (0x0 << 12)
-#define CCR_DMOD_2D        (0x1 << 12)
-#define CCR_DMOD_FIFO      (0x2 << 12)
-#define CCR_DMOD_EOBFIFO   (0x3 << 12)
-#define CCR_SMOD_LINEAR    (0x0 << 10)
-#define CCR_SMOD_2D        (0x1 << 10)
-#define CCR_SMOD_FIFO      (0x2 << 10)
-#define CCR_SMOD_EOBFIFO   (0x3 << 10)
-#define CCR_MDIR_DEC       (1<<9)
-#define CCR_MSEL_B         (1<<8)
-#define CCR_DSIZ_32        (0x0 << 6)
-#define CCR_DSIZ_8         (0x1 << 6)
-#define CCR_DSIZ_16        (0x2 << 6)
-#define CCR_SSIZ_32        (0x0 << 4)
-#define CCR_SSIZ_8         (0x1 << 4)
-#define CCR_SSIZ_16        (0x2 << 4)
-#define CCR_REN            (1<<3)
-#define CCR_RPT            (1<<2)
-#define CCR_FRC            (1<<1)
-#define CCR_CEN            (1<<0)
-#define RTOR_EN            (1<<15)
-#define RTOR_CLK           (1<<14)
-#define RTOR_PSC           (1<<13)
-
-/*
- * struct imx_dma_channel - i.MX specific DMA extension
- * @name: name specified by DMA client
- * @irq_handler: client callback for end of transfer
- * @err_handler: client callback for error condition
- * @data: clients context data for callbacks
- * @dma_mode: direction of the transfer %DMA_MODE_READ or %DMA_MODE_WRITE
- * @sg: pointer to the actual read/written chunk for scatter-gather emulation
- * @resbytes: total residual number of bytes to transfer
- *            (it can be lower or same as sum of SG mapped chunk sizes)
- * @sgcount: number of chunks to be read/written
- *
- * Structure is used for IMX DMA processing. It would be probably good
- * @struct dma_struct in the future for external interfacing and use
- * @struct imx_dma_channel only as extension to it.
- */
-
-struct imx_dma_channel {
-        const char *name;
-        void (*irq_handler) (int, void *);
-        void (*err_handler) (int, void *, int errcode);
-        void (*prog_handler) (int, void *, struct scatterlist *);
-        void *data;
-        unsigned int dma_mode;
-        struct scatterlist *sg;
-        unsigned int resbytes;
-        int dma_num;
-
-        int in_use;
-
-        u32 ccr_from_device;
-        u32 ccr_to_device;
-
-        struct timer_list watchdog;
-
-        int hw_chaining;
-};
-
-static void __iomem *imx_dmav1_baseaddr;
-
-static void imx_dmav1_writel(unsigned val, unsigned offset)
-{
-        __raw_writel(val, imx_dmav1_baseaddr + offset);
-}
-
-static unsigned imx_dmav1_readl(unsigned offset)
-{
-        return __raw_readl(imx_dmav1_baseaddr + offset);
-}
-
-static struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS];
-
-static struct clk *dma_clk;
-
-static int imx_dma_hw_chain(struct imx_dma_channel *imxdma)
-{
-        if (cpu_is_mx27())
-                return imxdma->hw_chaining;
-        else
-                return 0;
-}
-
-/*
- * imx_dma_sg_next - prepare next chunk for scatter-gather DMA emulation
- */
-static inline int imx_dma_sg_next(int channel, struct scatterlist *sg)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-        unsigned long now;
-
-        if (!imxdma->name) {
-                printk(KERN_CRIT "%s: called for  not allocated channel %d\n",
-                       __func__, channel);
-                return 0;
-        }
-
-        now = min(imxdma->resbytes, sg->length);
-        if (imxdma->resbytes != IMX_DMA_LENGTH_LOOP)
-                imxdma->resbytes -= now;
-
-        if ((imxdma->dma_mode & DMA_MODE_MASK) == DMA_MODE_READ)
-                imx_dmav1_writel(sg->dma_address, DMA_DAR(channel));
-        else
-                imx_dmav1_writel(sg->dma_address, DMA_SAR(channel));
-
-        imx_dmav1_writel(now, DMA_CNTR(channel));
-
-        pr_debug("imxdma%d: next sg chunk dst 0x%08x, src 0x%08x, "
-                "size 0x%08x\n", channel,
-                 imx_dmav1_readl(DMA_DAR(channel)),
-                 imx_dmav1_readl(DMA_SAR(channel)),
-                 imx_dmav1_readl(DMA_CNTR(channel)));
-
-        return now;
-}
-
-/**
- * imx_dma_setup_single - setup i.MX DMA channel for linear memory to/from
- * device transfer
- *
- * @channel: i.MX DMA channel number
- * @dma_address: the DMA/physical memory address of the linear data block
- *              to transfer
- * @dma_length: length of the data block in bytes
- * @dev_addr: physical device port address
- * @dmamode: DMA transfer mode, %DMA_MODE_READ from the device to the memory
- *           or %DMA_MODE_WRITE from memory to the device
- *
- * Return value: if incorrect parameters are provided -%EINVAL.
- *              Zero indicates success.
- */
-int
-imx_dma_setup_single(int channel, dma_addr_t dma_address,
-                     unsigned int dma_length, unsigned int dev_addr,
-                     unsigned int dmamode)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-
-        imxdma->sg = NULL;
-        imxdma->dma_mode = dmamode;
-
-        if (!dma_address) {
-                printk(KERN_ERR "imxdma%d: imx_dma_setup_single null address\n",
-                       channel);
-                return -EINVAL;
-        }
-
-        if (!dma_length) {
-                printk(KERN_ERR "imxdma%d: imx_dma_setup_single zero length\n",
-                       channel);
-                return -EINVAL;
-        }
-
-        if ((dmamode & DMA_MODE_MASK) == DMA_MODE_READ) {
-                pr_debug("imxdma%d: %s dma_addressg=0x%08x dma_length=%d "
-                        "dev_addr=0x%08x for read\n",
-                        channel, __func__, (unsigned int)dma_address,
-                        dma_length, dev_addr);
-
-                imx_dmav1_writel(dev_addr, DMA_SAR(channel));
-                imx_dmav1_writel(dma_address, DMA_DAR(channel));
-                imx_dmav1_writel(imxdma->ccr_from_device, DMA_CCR(channel));
-        } else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) {
-                pr_debug("imxdma%d: %s dma_addressg=0x%08x dma_length=%d "
-                        "dev_addr=0x%08x for write\n",
-                        channel, __func__, (unsigned int)dma_address,
-                        dma_length, dev_addr);
-
-                imx_dmav1_writel(dma_address, DMA_SAR(channel));
-                imx_dmav1_writel(dev_addr, DMA_DAR(channel));
-                imx_dmav1_writel(imxdma->ccr_to_device,
-                                DMA_CCR(channel));
-        } else {
-                printk(KERN_ERR "imxdma%d: imx_dma_setup_single bad dmamode\n",
-                       channel);
-                return -EINVAL;
-        }
-
-        imx_dmav1_writel(dma_length, DMA_CNTR(channel));
-
-        return 0;
-}
-EXPORT_SYMBOL(imx_dma_setup_single);
-
-/**
- * imx_dma_setup_sg - setup i.MX DMA channel SG list to/from device transfer
- * @channel: i.MX DMA channel number
- * @sg: pointer to the scatter-gather list/vector
- * @sgcount: scatter-gather list hungs count
- * @dma_length: total length of the transfer request in bytes
- * @dev_addr: physical device port address
- * @dmamode: DMA transfer mode, %DMA_MODE_READ from the device to the memory
- *           or %DMA_MODE_WRITE from memory to the device
- *
- * The function sets up DMA channel state and registers to be ready for
- * transfer specified by provided parameters. The scatter-gather emulation
- * is set up according to the parameters.
- *
- * The full preparation of the transfer requires setup of more register
- * by the caller before imx_dma_enable() can be called.
- *
- * %BLR(channel) holds transfer burst length in bytes, 0 means 64 bytes
- *
- * %RSSR(channel) has to be set to the DMA request line source %DMA_REQ_xxx
- *
- * %CCR(channel) has to specify transfer parameters, the next settings is
- * typical for linear or simple scatter-gather transfers if %DMA_MODE_READ is
- * specified
- *
- * %CCR_DMOD_LINEAR | %CCR_DSIZ_32 | %CCR_SMOD_FIFO | %CCR_SSIZ_x
- *
- * The typical setup for %DMA_MODE_WRITE is specified by next options
- * combination
- *
- * %CCR_SMOD_LINEAR | %CCR_SSIZ_32 | %CCR_DMOD_FIFO | %CCR_DSIZ_x
- *
- * Be careful here and do not mistakenly mix source and target device
- * port sizes constants, they are really different:
- * %CCR_SSIZ_8, %CCR_SSIZ_16, %CCR_SSIZ_32,
- * %CCR_DSIZ_8, %CCR_DSIZ_16, %CCR_DSIZ_32
- *
- * Return value: if incorrect parameters are provided -%EINVAL.
- * Zero indicates success.
- */
-int
-imx_dma_setup_sg(int channel,
-                 struct scatterlist *sg, unsigned int sgcount,
-                 unsigned int dma_length, unsigned int dev_addr,
-                 unsigned int dmamode)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-
-        if (imxdma->in_use)
-                return -EBUSY;
-
-        imxdma->sg = sg;
-        imxdma->dma_mode = dmamode;
-        imxdma->resbytes = dma_length;
-
-        if (!sg || !sgcount) {
-                printk(KERN_ERR "imxdma%d: imx_dma_setup_sg empty sg list\n",
-                       channel);
-                return -EINVAL;
-        }
-
-        if (!sg->length) {
-                printk(KERN_ERR "imxdma%d: imx_dma_setup_sg zero length\n",
-                       channel);
-                return -EINVAL;
-        }
-
-        if ((dmamode & DMA_MODE_MASK) == DMA_MODE_READ) {
-                pr_debug("imxdma%d: %s sg=%p sgcount=%d total length=%d "
-                        "dev_addr=0x%08x for read\n",
-                        channel, __func__, sg, sgcount, dma_length, dev_addr);
-
-                imx_dmav1_writel(dev_addr, DMA_SAR(channel));
-                imx_dmav1_writel(imxdma->ccr_from_device, DMA_CCR(channel));
-        } else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) {
-                pr_debug("imxdma%d: %s sg=%p sgcount=%d total length=%d "
-                        "dev_addr=0x%08x for write\n",
-                        channel, __func__, sg, sgcount, dma_length, dev_addr);
-
-                imx_dmav1_writel(dev_addr, DMA_DAR(channel));
-                imx_dmav1_writel(imxdma->ccr_to_device, DMA_CCR(channel));
-        } else {
-                printk(KERN_ERR "imxdma%d: imx_dma_setup_sg bad dmamode\n",
-                       channel);
-                return -EINVAL;
-        }
-
-        imx_dma_sg_next(channel, sg);
-
-        return 0;
-}
-EXPORT_SYMBOL(imx_dma_setup_sg);
-
-int
-imx_dma_config_channel(int channel, unsigned int config_port,
-        unsigned int config_mem, unsigned int dmareq, int hw_chaining)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-        u32 dreq = 0;
-
-        imxdma->hw_chaining = 0;
-
-        if (hw_chaining) {
-                imxdma->hw_chaining = 1;
-                if (!imx_dma_hw_chain(imxdma))
-                        return -EINVAL;
-        }
-
-        if (dmareq)
-                dreq = CCR_REN;
-
-        imxdma->ccr_from_device = config_port | (config_mem << 2) | dreq;
-        imxdma->ccr_to_device = config_mem | (config_port << 2) | dreq;
-
-        imx_dmav1_writel(dmareq, DMA_RSSR(channel));
-
-        return 0;
-}
-EXPORT_SYMBOL(imx_dma_config_channel);
-
-void imx_dma_config_burstlen(int channel, unsigned int burstlen)
-{
-        imx_dmav1_writel(burstlen, DMA_BLR(channel));
-}
-EXPORT_SYMBOL(imx_dma_config_burstlen);
-
-/**
- * imx_dma_setup_handlers - setup i.MX DMA channel end and error notification
- * handlers
- * @channel: i.MX DMA channel number
- * @irq_handler: the pointer to the function called if the transfer
- *              ends successfully
- * @err_handler: the pointer to the function called if the premature
- *              end caused by error occurs
- * @data: user specified value to be passed to the handlers
- */
-int
-imx_dma_setup_handlers(int channel,
-                       void (*irq_handler) (int, void *),
-                       void (*err_handler) (int, void *, int),
-                       void *data)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-        unsigned long flags;
-
-        if (!imxdma->name) {
-                printk(KERN_CRIT "%s: called for  not allocated channel %d\n",
-                       __func__, channel);
-                return -ENODEV;
-        }
-
-        local_irq_save(flags);
-        imx_dmav1_writel(1 << channel, DMA_DISR);
-        imxdma->irq_handler = irq_handler;
-        imxdma->err_handler = err_handler;
-        imxdma->data = data;
-        local_irq_restore(flags);
-        return 0;
-}
-EXPORT_SYMBOL(imx_dma_setup_handlers);
-
-/**
- * imx_dma_setup_progression_handler - setup i.MX DMA channel progression
- * handlers
- * @channel: i.MX DMA channel number
- * @prog_handler: the pointer to the function called if the transfer progresses
- */
-int
-imx_dma_setup_progression_handler(int channel,
-                        void (*prog_handler) (int, void*, struct scatterlist*))
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-        unsigned long flags;
-
-        if (!imxdma->name) {
-                printk(KERN_CRIT "%s: called for  not allocated channel %d\n",
-                       __func__, channel);
-                return -ENODEV;
-        }
-
-        local_irq_save(flags);
-        imxdma->prog_handler = prog_handler;
-        local_irq_restore(flags);
-        return 0;
-}
-EXPORT_SYMBOL(imx_dma_setup_progression_handler);
-
-/**
- * imx_dma_enable - function to start i.MX DMA channel operation
- * @channel: i.MX DMA channel number
- *
- * The channel has to be allocated by driver through imx_dma_request()
- * or imx_dma_request_by_prio() function.
- * The transfer parameters has to be set to the channel registers through
- * call of the imx_dma_setup_single() or imx_dma_setup_sg() function
- * and registers %BLR(channel), %RSSR(channel) and %CCR(channel) has to
- * be set prior this function call by the channel user.
- */
-void imx_dma_enable(int channel)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-        unsigned long flags;
-
-        pr_debug("imxdma%d: imx_dma_enable\n", channel);
-
-        if (!imxdma->name) {
-                printk(KERN_CRIT "%s: called for  not allocated channel %d\n",
-                       __func__, channel);
-                return;
-        }
-
-        if (imxdma->in_use)
-                return;
-
-        local_irq_save(flags);
-
-        imx_dmav1_writel(1 << channel, DMA_DISR);
-        imx_dmav1_writel(imx_dmav1_readl(DMA_DIMR) & ~(1 << channel), DMA_DIMR);
-        imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) | CCR_CEN |
-                CCR_ACRPT, DMA_CCR(channel));
-
-        if ((cpu_is_mx21() || cpu_is_mx27()) &&
-                        imxdma->sg && imx_dma_hw_chain(imxdma)) {
-                imxdma->sg = sg_next(imxdma->sg);
-                if (imxdma->sg) {
-                        u32 tmp;
-                        imx_dma_sg_next(channel, imxdma->sg);
-                        tmp = imx_dmav1_readl(DMA_CCR(channel));
-                        imx_dmav1_writel(tmp | CCR_RPT | CCR_ACRPT,
-                                DMA_CCR(channel));
-                }
-        }
-        imxdma->in_use = 1;
-
-        local_irq_restore(flags);
-}
-EXPORT_SYMBOL(imx_dma_enable);
-
-/**
- * imx_dma_disable - stop, finish i.MX DMA channel operatin
- * @channel: i.MX DMA channel number
- */
-void imx_dma_disable(int channel)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-        unsigned long flags;
-
-        pr_debug("imxdma%d: imx_dma_disable\n", channel);
-
-        if (imx_dma_hw_chain(imxdma))
-                del_timer(&imxdma->watchdog);
-
-        local_irq_save(flags);
-        imx_dmav1_writel(imx_dmav1_readl(DMA_DIMR) | (1 << channel), DMA_DIMR);
-        imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) & ~CCR_CEN,
-                        DMA_CCR(channel));
-        imx_dmav1_writel(1 << channel, DMA_DISR);
-        imxdma->in_use = 0;
-        local_irq_restore(flags);
-}
-EXPORT_SYMBOL(imx_dma_disable);
-
-static void imx_dma_watchdog(unsigned long chno)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[chno];
-
-        imx_dmav1_writel(0, DMA_CCR(chno));
-        imxdma->in_use = 0;
-        imxdma->sg = NULL;
-
-        if (imxdma->err_handler)
-                imxdma->err_handler(chno, imxdma->data, IMX_DMA_ERR_TIMEOUT);
-}
-
-static irqreturn_t dma_err_handler(int irq, void *dev_id)
-{
-        int i, disr;
-        struct imx_dma_channel *imxdma;
-        unsigned int err_mask;
-        int errcode;
-
-        disr = imx_dmav1_readl(DMA_DISR);
-
-        err_mask = imx_dmav1_readl(DMA_DBTOSR) |
-                   imx_dmav1_readl(DMA_DRTOSR) |
-                   imx_dmav1_readl(DMA_DSESR)  |
-                   imx_dmav1_readl(DMA_DBOSR);
-
-        if (!err_mask)
-                return IRQ_HANDLED;
-
-        imx_dmav1_writel(disr & err_mask, DMA_DISR);
-
-        for (i = 0; i < IMX_DMA_CHANNELS; i++) {
-                if (!(err_mask & (1 << i)))
-                        continue;
-                imxdma = &imx_dma_channels[i];
-                errcode = 0;
-
-                if (imx_dmav1_readl(DMA_DBTOSR) & (1 << i)) {
-                        imx_dmav1_writel(1 << i, DMA_DBTOSR);
-                        errcode |= IMX_DMA_ERR_BURST;
-                }
-                if (imx_dmav1_readl(DMA_DRTOSR) & (1 << i)) {
-                        imx_dmav1_writel(1 << i, DMA_DRTOSR);
-                        errcode |= IMX_DMA_ERR_REQUEST;
-                }
-                if (imx_dmav1_readl(DMA_DSESR) & (1 << i)) {
-                        imx_dmav1_writel(1 << i, DMA_DSESR);
-                        errcode |= IMX_DMA_ERR_TRANSFER;
-                }
-                if (imx_dmav1_readl(DMA_DBOSR) & (1 << i)) {
-                        imx_dmav1_writel(1 << i, DMA_DBOSR);
-                        errcode |= IMX_DMA_ERR_BUFFER;
-                }
-                if (imxdma->name && imxdma->err_handler) {
-                        imxdma->err_handler(i, imxdma->data, errcode);
-                        continue;
-                }
-
-                imx_dma_channels[i].sg = NULL;
-
-                printk(KERN_WARNING
-                       "DMA timeout on channel %d (%s) -%s%s%s%s\n",
-                       i, imxdma->name,
-                       errcode & IMX_DMA_ERR_BURST ?    " burst" : "",
-                       errcode & IMX_DMA_ERR_REQUEST ?  " request" : "",
-                       errcode & IMX_DMA_ERR_TRANSFER ? " transfer" : "",
-                       errcode & IMX_DMA_ERR_BUFFER ?   " buffer" : "");
-        }
-        return IRQ_HANDLED;
-}
-
-static void dma_irq_handle_channel(int chno)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[chno];
-
-        if (!imxdma->name) {
-                /*
-                 * IRQ for an unregistered DMA channel:
-                 * let's clear the interrupts and disable it.
-                 */
-                printk(KERN_WARNING
-                       "spurious IRQ for DMA channel %d\n", chno);
-                return;
-        }
-
-        if (imxdma->sg) {
-                u32 tmp;
-                struct scatterlist *current_sg = imxdma->sg;
-                imxdma->sg = sg_next(imxdma->sg);
-
-                if (imxdma->sg) {
-                        imx_dma_sg_next(chno, imxdma->sg);
-
-                        tmp = imx_dmav1_readl(DMA_CCR(chno));
-
-                        if (imx_dma_hw_chain(imxdma)) {
-                                /* FIXME: The timeout should probably be
-                                 * configurable
-                                 */
-                                mod_timer(&imxdma->watchdog,
-                                        jiffies + msecs_to_jiffies(500));
-
-                                tmp |= CCR_CEN | CCR_RPT | CCR_ACRPT;
-                                imx_dmav1_writel(tmp, DMA_CCR(chno));
-                        } else {
-                                imx_dmav1_writel(tmp & ~CCR_CEN, DMA_CCR(chno));
-                                tmp |= CCR_CEN;
-                        }
-
-                        imx_dmav1_writel(tmp, DMA_CCR(chno));
-
-                        if (imxdma->prog_handler)
-                                imxdma->prog_handler(chno, imxdma->data,
-                                                current_sg);
-
-                        return;
-                }
-
-                if (imx_dma_hw_chain(imxdma)) {
-                        del_timer(&imxdma->watchdog);
-                        return;
-                }
-        }
-
-        imx_dmav1_writel(0, DMA_CCR(chno));
-        imxdma->in_use = 0;
-        if (imxdma->irq_handler)
-                imxdma->irq_handler(chno, imxdma->data);
-}
-
-static irqreturn_t dma_irq_handler(int irq, void *dev_id)
-{
-        int i, disr;
-
-        if (cpu_is_mx21() || cpu_is_mx27())
-                dma_err_handler(irq, dev_id);
-
-        disr = imx_dmav1_readl(DMA_DISR);
-
-        pr_debug("imxdma: dma_irq_handler called, disr=0x%08x\n",
-                     disr);
-
-        imx_dmav1_writel(disr, DMA_DISR);
-        for (i = 0; i < IMX_DMA_CHANNELS; i++) {
-                if (disr & (1 << i))
-                        dma_irq_handle_channel(i);
-        }
-
-        return IRQ_HANDLED;
-}
-
-/**
- * imx_dma_request - request/allocate specified channel number
- * @channel: i.MX DMA channel number
- * @name: the driver/caller own non-%NULL identification
- */
-int imx_dma_request(int channel, const char *name)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-        unsigned long flags;
-        int ret = 0;
-
-        /* basic sanity checks */
-        if (!name)
-                return -EINVAL;
-
-        if (channel >= IMX_DMA_CHANNELS) {
-                printk(KERN_CRIT "%s: called for  non-existed channel %d\n",
-                       __func__, channel);
-                return -EINVAL;
-        }
-
-        local_irq_save(flags);
-        if (imxdma->name) {
-                local_irq_restore(flags);
-                return -EBUSY;
-        }
-        memset(imxdma, 0, sizeof(*imxdma));
-        imxdma->name = name;
-        local_irq_restore(flags); /* request_irq() can block */
-
-        if (cpu_is_mx21() || cpu_is_mx27()) {
-                ret = request_irq(MX2x_INT_DMACH0 + channel,
-                                dma_irq_handler, 0, "DMA", NULL);
-                if (ret) {
-                        imxdma->name = NULL;
-                        pr_crit("Can't register IRQ %d for DMA channel %d\n",
-                                        MX2x_INT_DMACH0 + channel, channel);
-                        return ret;
-                }
-                init_timer(&imxdma->watchdog);
-                imxdma->watchdog.function = &imx_dma_watchdog;
-                imxdma->watchdog.data = channel;
-        }
-
-        return ret;
-}
-EXPORT_SYMBOL(imx_dma_request);
-
-/**
- * imx_dma_free - release previously acquired channel
- * @channel: i.MX DMA channel number
- */
-void imx_dma_free(int channel)
-{
-        unsigned long flags;
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-
-        if (!imxdma->name) {
-                printk(KERN_CRIT
-                       "%s: trying to free free channel %d\n",
-                       __func__, channel);
-                return;
-        }
-
-        local_irq_save(flags);
-        /* Disable interrupts */
-        imx_dma_disable(channel);
-        imxdma->name = NULL;
-
-        if (cpu_is_mx21() || cpu_is_mx27())
-                free_irq(MX2x_INT_DMACH0 + channel, NULL);
-
-        local_irq_restore(flags);
-}
-EXPORT_SYMBOL(imx_dma_free);
-
-/**
- * imx_dma_request_by_prio - find and request some of free channels best
- * suiting requested priority
- * @channel: i.MX DMA channel number
- * @name: the driver/caller own non-%NULL identification
- *
- * This function tries to find a free channel in the specified priority group
- * if the priority cannot be achieved it tries to look for free channel
- * in the higher and then even lower priority groups.
- *
- * Return value: If there is no free channel to allocate, -%ENODEV is returned.
- *               On successful allocation channel is returned.
- */
-int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio)
-{
-        int i;
-        int best;
-
-        switch (prio) {
-        case (DMA_PRIO_HIGH):
-                best = 8;
-                break;
-        case (DMA_PRIO_MEDIUM):
-                best = 4;
-                break;
-        case (DMA_PRIO_LOW):
-        default:
-                best = 0;
-                break;
-        }
-
-        for (i = best; i < IMX_DMA_CHANNELS; i++)
-                if (!imx_dma_request(i, name))
-                        return i;
-
-        for (i = best - 1; i >= 0; i--)
-                if (!imx_dma_request(i, name))
-                        return i;
-
-        printk(KERN_ERR "%s: no free DMA channel found\n", __func__);
-
-        return -ENODEV;
-}
-EXPORT_SYMBOL(imx_dma_request_by_prio);
-
-static int __init imx_dma_init(void)
-{
-        int ret = 0;
-        int i;
-
-        if (cpu_is_mx1())
-                imx_dmav1_baseaddr = MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR);
-        else if (cpu_is_mx21())
-                imx_dmav1_baseaddr = MX21_IO_ADDRESS(MX21_DMA_BASE_ADDR);
-        else if (cpu_is_mx27())
-                imx_dmav1_baseaddr = MX27_IO_ADDRESS(MX27_DMA_BASE_ADDR);
-        else
-                return 0;
-
-        dma_clk = clk_get(NULL, "dma");
-        if (IS_ERR(dma_clk))
-                return PTR_ERR(dma_clk);
-        clk_enable(dma_clk);
-
-        /* reset DMA module */
-        imx_dmav1_writel(DCR_DRST, DMA_DCR);
-
-        if (cpu_is_mx1()) {
-                ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", NULL);
-                if (ret) {
-                        pr_crit("Wow!  Can't register IRQ for DMA\n");
-                        return ret;
-                }
-
-                ret = request_irq(MX1_DMA_ERR, dma_err_handler, 0, "DMA", NULL);
-                if (ret) {
-                        pr_crit("Wow!  Can't register ERRIRQ for DMA\n");
-                        free_irq(MX1_DMA_INT, NULL);
-                        return ret;
-                }
-        }
-
-        /* enable DMA module */
-        imx_dmav1_writel(DCR_DEN, DMA_DCR);
-
-        /* clear all interrupts */
-        imx_dmav1_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_DISR);
-
-        /* disable interrupts */
-        imx_dmav1_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_DIMR);
-
-        for (i = 0; i < IMX_DMA_CHANNELS; i++) {
-                imx_dma_channels[i].sg = NULL;
-                imx_dma_channels[i].dma_num = i;
-        }
-
-        return ret;
-}
-
-arch_initcall(imx_dma_init);
diff --git a/arch/arm/mach-imx/include/mach/dma-v1.h b/arch/arm/mach-imx/include/mach/dma-v1.h
deleted file mode 100644
index ac6fd713828a..000000000000
--- a/arch/arm/mach-imx/include/mach/dma-v1.h
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- *  linux/arch/arm/mach-imx/include/mach/dma-v1.h
- *
- *  i.MX DMA registration and IRQ dispatching
- *
- * Copyright 2006 Pavel Pisa <pisa@cmp.felk.cvut.cz>
- * Copyright 2008 Juergen Beisert, <kernel@pengutronix.de>
- * Copyright 2008 Sascha Hauer, <s.hauer@pengutronix.de>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301, USA.
- */
-
-#ifndef __MACH_DMA_V1_H__
-#define __MACH_DMA_V1_H__
-
-#define imx_has_dma_v1()        (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27())
-
-#include <mach/dma.h>
-
-#define IMX_DMA_CHANNELS  16
-
-#define DMA_MODE_READ           0
-#define DMA_MODE_WRITE          1
-#define DMA_MODE_MASK           1
-
-#define MX1_DMA_REG(offset)     MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR + (offset))
-
-/* DMA Interrupt Mask Register */
-#define MX1_DMA_DIMR            MX1_DMA_REG(0x08)
-
-/* Channel Control Register */
-#define MX1_DMA_CCR(x)          MX1_DMA_REG(0x8c + ((x) << 6))
-
-#define IMX_DMA_MEMSIZE_32      (0 << 4)
-#define IMX_DMA_MEMSIZE_8       (1 << 4)
-#define IMX_DMA_MEMSIZE_16      (2 << 4)
-#define IMX_DMA_TYPE_LINEAR     (0 << 10)
-#define IMX_DMA_TYPE_2D         (1 << 10)
-#define IMX_DMA_TYPE_FIFO       (2 << 10)
-
-#define IMX_DMA_ERR_BURST     (1 << 0)
-#define IMX_DMA_ERR_REQUEST   (1 << 1)
-#define IMX_DMA_ERR_TRANSFER  (1 << 2)
-#define IMX_DMA_ERR_BUFFER    (1 << 3)
-#define IMX_DMA_ERR_TIMEOUT   (1 << 4)
-
-int
-imx_dma_config_channel(int channel, unsigned int config_port,
-        unsigned int config_mem, unsigned int dmareq, int hw_chaining);
-
-void
-imx_dma_config_burstlen(int channel, unsigned int burstlen);
-
-int
-imx_dma_setup_single(int channel, dma_addr_t dma_address,
-                unsigned int dma_length, unsigned int dev_addr,
-                unsigned int dmamode);
-
-
-/*
- * Use this flag as the dma_length argument to imx_dma_setup_sg()
- * to create an endless running dma loop. The end of the scatterlist
- * must be linked to the beginning for this to work.
- */
-#define IMX_DMA_LENGTH_LOOP     ((unsigned int)-1)
-
-int
-imx_dma_setup_sg(int channel, struct scatterlist *sg,
-                unsigned int sgcount, unsigned int dma_length,
-                unsigned int dev_addr, unsigned int dmamode);
-
-int
-imx_dma_setup_handlers(int channel,
-                void (*irq_handler) (int, void *),
-                void (*err_handler) (int, void *, int), void *data);
-
-int
-imx_dma_setup_progression_handler(int channel,
-                void (*prog_handler) (int, void*, struct scatterlist*));
-
-void imx_dma_enable(int channel);
-
-void imx_dma_disable(int channel);
-
-int imx_dma_request(int channel, const char *name);
-
-void imx_dma_free(int channel);
-
-int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio);
-
-#endif  /* __MACH_DMA_V1_H__ */
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index 27bc27e6ea41..c650145d1646 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -38,6 +38,8 @@
 #include <linux/usb/otg.h>
 #include <linux/usb/ulpi.h>
 #include <linux/delay.h>
+#include <linux/regulator/machine.h>
+#include <linux/regulator/fixed.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
@@ -479,6 +481,11 @@ static struct platform_device *devices[] __initdata = {
         &armadillo5x0_smc911x_device,
 };
 
+static struct regulator_consumer_supply dummy_supplies[] = {
+        REGULATOR_SUPPLY("vdd33a", "smsc911x"),
+        REGULATOR_SUPPLY("vddvario", "smsc911x"),
+};
+
 /*
  * Perform board specific initializations
  */
@@ -489,6 +496,8 @@ static void __init armadillo5x0_init(void)
         mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
                         ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
 
+        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
+
         platform_add_devices(devices, ARRAY_SIZE(devices));
         imx_add_gpio_keys(&armadillo5x0_button_data);
         imx31_add_imx_i2c1(NULL);
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 7696dfa2bdba..da6c1d9af768 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -26,6 +26,7 @@
 #include <asm/hardware/gic.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
+#include <asm/system_misc.h>
 #include <mach/common.h>
 #include <mach/hardware.h>
 
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c
index fc78e8071cd1..15a26e908260 100644
--- a/arch/arm/mach-imx/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c
@@ -24,6 +24,8 @@
 #include <linux/serial_8250.h>
 #include <linux/smsc911x.h>
 #include <linux/types.h>
+#include <linux/regulator/machine.h>
+#include <linux/regulator/fixed.h>
 
 #include <asm/irq.h>
 #include <asm/mach-types.h>
@@ -166,6 +168,11 @@ static struct platform_device kzm_smsc9118_device = {
                           },
 };
 
+static struct regulator_consumer_supply dummy_supplies[] = {
+        REGULATOR_SUPPLY("vdd33a", "smsc911x"),
+        REGULATOR_SUPPLY("vddvario", "smsc911x"),
+};
+
 static int __init kzm_init_smsc9118(void)
 {
         /*
@@ -175,6 +182,8 @@ static int __init kzm_init_smsc9118(void)
         gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2), "smsc9118-int");
         gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
 
+        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
+
         return platform_device_register(&kzm_smsc9118_device);
 }
 #else
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c
index 02401bbd6d53..83714b0cc290 100644
--- a/arch/arm/mach-imx/mach-mx31lilly.c
+++ b/arch/arm/mach-imx/mach-mx31lilly.c
@@ -34,6 +34,8 @@
 #include <linux/mfd/mc13783.h>
 #include <linux/usb/otg.h>
 #include <linux/usb/ulpi.h>
+#include <linux/regulator/machine.h>
+#include <linux/regulator/fixed.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -242,6 +244,11 @@ static struct platform_device *devices[] __initdata = {
 static int mx31lilly_baseboard;
 core_param(mx31lilly_baseboard, mx31lilly_baseboard, int, 0444);
 
+static struct regulator_consumer_supply dummy_supplies[] = {
+        REGULATOR_SUPPLY("vdd33a", "smsc911x"),
+        REGULATOR_SUPPLY("vddvario", "smsc911x"),
+};
+
 static void __init mx31lilly_board_init(void)
 {
         imx31_soc_init();
@@ -280,6 +287,8 @@ static void __init mx31lilly_board_init(void)
         imx31_add_spi_imx1(&spi1_pdata);
         spi_register_board_info(&mc13783_dev, 1);
 
+        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
+
         platform_add_devices(devices, ARRAY_SIZE(devices));
 
         /* USB */
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c
index ef80751712e7..0abef5f13df5 100644
--- a/arch/arm/mach-imx/mach-mx31lite.c
+++ b/arch/arm/mach-imx/mach-mx31lite.c
@@ -29,6 +29,8 @@
 #include <linux/usb/ulpi.h>
 #include <linux/mtd/physmap.h>
 #include <linux/delay.h>
+#include <linux/regulator/machine.h>
+#include <linux/regulator/fixed.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -226,6 +228,11 @@ void __init mx31lite_map_io(void)
 static int mx31lite_baseboard;
 core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444);
 
+static struct regulator_consumer_supply dummy_supplies[] = {
+        REGULATOR_SUPPLY("vdd33a", "smsc911x"),
+        REGULATOR_SUPPLY("vddvario", "smsc911x"),
+};
+
 static void __init mx31lite_init(void)
 {
         int ret;
@@ -259,6 +266,8 @@ static void __init mx31lite_init(void)
         if (usbh2_pdata.otg)
                 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
 
+        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
+
         /* SMSC9117 IRQ pin */
         ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
         if (ret)
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c
index e14291d89e4f..6ae51c6b95b7 100644
--- a/arch/arm/mach-imx/mach-mx35_3ds.c
+++ b/arch/arm/mach-imx/mach-mx35_3ds.c
@@ -97,7 +97,7 @@ static struct i2c_board_info __initdata i2c_devices_3ds[] = {
 static int lcd_power_gpio = -ENXIO;
 
 static int mc9s08dz60_gpiochip_match(struct gpio_chip *chip,
-                                                     void *data)
+                                                     const void *data)
 {
         return !strcmp(chip->label, data);
 }
diff --git a/arch/arm/mach-imx/mach-mx51_efikamx.c b/arch/arm/mach-imx/mach-mx51_efikamx.c
index 3a5ed2dd885a..586e9f822124 100644
--- a/arch/arm/mach-imx/mach-mx51_efikamx.c
+++ b/arch/arm/mach-imx/mach-mx51_efikamx.c
@@ -33,6 +33,7 @@
 #include <mach/iomux-mx51.h>
 
 #include <asm/setup.h>
+#include <asm/system_info.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
diff --git a/arch/arm/mach-imx/mach-mx51_efikasb.c b/arch/arm/mach-imx/mach-mx51_efikasb.c
index ea5f65b0381a..24aded9e109f 100644
--- a/arch/arm/mach-imx/mach-mx51_efikasb.c
+++ b/arch/arm/mach-imx/mach-mx51_efikasb.c
@@ -36,6 +36,7 @@
 #include <mach/iomux-mx51.h>
 
 #include <asm/setup.h>
+#include <asm/system_info.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
diff --git a/arch/arm/mach-imx/mach-mx53_ard.c b/arch/arm/mach-imx/mach-mx53_ard.c
index 753f4fc9ec04..05641980dc5e 100644
--- a/arch/arm/mach-imx/mach-mx53_ard.c
+++ b/arch/arm/mach-imx/mach-mx53_ard.c
@@ -23,6 +23,8 @@
 #include <linux/delay.h>
 #include <linux/gpio.h>
 #include <linux/smsc911x.h>
+#include <linux/regulator/machine.h>
+#include <linux/regulator/fixed.h>
 
 #include <mach/common.h>
 #include <mach/hardware.h>
@@ -214,6 +216,11 @@ static int weim_cs_config(void)
         return 0;
 }
 
+static struct regulator_consumer_supply dummy_supplies[] = {
+        REGULATOR_SUPPLY("vdd33a", "smsc911x"),
+        REGULATOR_SUPPLY("vddvario", "smsc911x"),
+};
+
 void __init imx53_ard_common_init(void)
 {
         mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads,
@@ -232,6 +239,7 @@ static void __init mx53_ard_board_init(void)
 
         imx53_ard_common_init();
         mx53_ard_io_init();
+        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
         platform_add_devices(devices, ARRAY_SIZE(devices));
 
         imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data);
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index f8ca96c354f2..74127389e7ab 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -21,6 +21,7 @@
 #include <linux/err.h>
 
 #include <asm/pgtable.h>
+#include <asm/system_misc.h>
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/mach/map.h>
 
@@ -61,8 +62,8 @@ static void imx3_idle(void)
                 : "=r" (reg));
 }
 
-static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
-                                  unsigned int mtype)
+static void __iomem *imx3_ioremap_caller(unsigned long phys_addr, size_t size,
+                                         unsigned int mtype, void *caller)
 {
         if (mtype == MT_DEVICE) {
                 /*
@@ -75,7 +76,7 @@ static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
                         mtype = MT_DEVICE_NONSHARED;
         }
 
-        return __arm_ioremap(phys_addr, size, mtype);
+        return __arm_ioremap_caller(phys_addr, size, mtype, caller);
 }
 
 void __init imx3_init_l2x0(void)
@@ -134,7 +135,7 @@ void __init imx31_init_early(void)
 {
         mxc_set_cpu_type(MXC_CPU_MX31);
         mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
-        imx_ioremap = imx3_ioremap;
+        arch_ioremap_caller = imx3_ioremap_caller;
         arm_pm_idle = imx3_idle;
 }
 
@@ -208,7 +209,7 @@ void __init imx35_init_early(void)
         mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
         mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
         arm_pm_idle = imx3_idle;
-        imx_ioremap = imx3_ioremap;
+        arch_ioremap_caller = imx3_ioremap_caller;
 }
 
 void __init mx35_init_irq(void)
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c
index 51af9fa56944..05250aed61fb 100644
--- a/arch/arm/mach-imx/mm-imx5.c
+++ b/arch/arm/mach-imx/mm-imx5.c
@@ -15,6 +15,7 @@
 #include <linux/init.h>
 #include <linux/clk.h>
 
+#include <asm/system_misc.h>
 #include <asm/mach/map.h>
 
 #include <mach/hardware.h>
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 15b87f26ac96..eaf6c6366ffa 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -25,9 +25,9 @@
 
 #include <mach/hardware.h>
 #include <mach/platform.h>
-#include <asm/irq.h>
 #include <mach/cm.h>
-#include <asm/system.h>
+#include <mach/irqs.h>
+
 #include <asm/leds.h>
 #include <asm/mach-types.h>
 #include <asm/mach/time.h>
diff --git a/arch/arm/mach-integrator/include/mach/io.h b/arch/arm/mach-integrator/include/mach/io.h
index 37beed3fa3ed..8de70de3dd0a 100644
--- a/arch/arm/mach-integrator/include/mach/io.h
+++ b/arch/arm/mach-integrator/include/mach/io.h
@@ -29,6 +29,5 @@
 #define PCI_IO_VADDR            0xee000000
 
 #define __io(a)                 ((void __iomem *)(PCI_IO_VADDR + (a)))
-#define __mem_pci(a)            (a)
 
 #endif
diff --git a/arch/arm/mach-integrator/include/mach/irqs.h b/arch/arm/mach-integrator/include/mach/irqs.h
index 1fbe6d190222..a19a1a2fcf6b 100644
--- a/arch/arm/mach-integrator/include/mach/irqs.h
+++ b/arch/arm/mach-integrator/include/mach/irqs.h
@@ -78,5 +78,6 @@
 #define IRQ_SIC_CP_LMINT7               46
 #define IRQ_SIC_END                     46
 
-#define NR_IRQS                         47
+#define NR_IRQS_INTEGRATOR_AP           34
+#define NR_IRQS_INTEGRATOR_CP           47
 
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 21a1d6cbef40..871f148ffd72 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -38,12 +38,13 @@
 #include <mach/hardware.h>
 #include <mach/platform.h>
 #include <asm/hardware/arm_timer.h>
-#include <asm/irq.h>
 #include <asm/setup.h>
 #include <asm/param.h>          /* HZ */
 #include <asm/mach-types.h>
+#include <asm/sched_clock.h>
 
 #include <mach/lm.h>
+#include <mach/irqs.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/irq.h>
@@ -325,6 +326,11 @@ static void __init ap_init(void)
 
 static unsigned long timer_reload;
 
+static u32 notrace integrator_read_sched_clock(void)
+{
+        return -readl((void __iomem *) TIMER2_VA_BASE + TIMER_VALUE);
+}
+
 static void integrator_clocksource_init(unsigned long inrate)
 {
         void __iomem *base = (void __iomem *)TIMER2_VA_BASE;
@@ -341,6 +347,7 @@ static void integrator_clocksource_init(unsigned long inrate)
 
         clocksource_mmio_init(base + TIMER_VALUE, "timer2",
                         rate, 200, 16, clocksource_mmio_readl_down);
+        setup_sched_clock(integrator_read_sched_clock, 16, rate);
 }
 
 static void __iomem * const clkevt_base = (void __iomem *)TIMER1_VA_BASE;
@@ -468,6 +475,7 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
         .atag_offset    = 0x100,
         .reserve        = integrator_reserve,
         .map_io         = ap_map_io,
+        .nr_irqs        = NR_IRQS_INTEGRATOR_AP,
         .init_early     = integrator_init_early,
         .init_irq       = ap_init_irq,
         .timer          = &ap_timer,
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index be9ead4a3bcc..48a115a91d9d 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -26,7 +26,6 @@
 
 #include <mach/hardware.h>
 #include <mach/platform.h>
-#include <asm/irq.h>
 #include <asm/setup.h>
 #include <asm/mach-types.h>
 #include <asm/hardware/arm_timer.h>
@@ -34,6 +33,7 @@
 
 #include <mach/cm.h>
 #include <mach/lm.h>
+#include <mach/irqs.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/irq.h>
@@ -464,6 +464,7 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
         .atag_offset    = 0x100,
         .reserve        = integrator_reserve,
         .map_io         = intcp_map_io,
+        .nr_irqs        = NR_IRQS_INTEGRATOR_CP,
         .init_early     = intcp_init_early,
         .init_irq       = intcp_init_irq,
         .timer          = &cp_timer,
diff --git a/arch/arm/mach-integrator/leds.c b/arch/arm/mach-integrator/leds.c
index 28be186adb89..466defa97842 100644
--- a/arch/arm/mach-integrator/leds.c
+++ b/arch/arm/mach-integrator/leds.c
@@ -29,7 +29,6 @@
 #include <mach/hardware.h>
 #include <mach/platform.h>
 #include <asm/leds.h>
-#include <asm/system.h>
 #include <asm/mach-types.h>
 #include <mach/cm.h>
 
diff --git a/arch/arm/mach-integrator/pci.c b/arch/arm/mach-integrator/pci.c
index 520b6bf81bb1..f1ca9c122861 100644
--- a/arch/arm/mach-integrator/pci.c
+++ b/arch/arm/mach-integrator/pci.c
@@ -26,11 +26,11 @@
 #include <linux/interrupt.h>
 #include <linux/init.h>
 
-#include <asm/irq.h>
-#include <asm/system.h>
 #include <asm/mach/pci.h>
 #include <asm/mach-types.h>
 
+#include <mach/irqs.h>
+
 /* 
  * A small note about bridges and interrupts.  The DECchip 21050 (and
  * later) adheres to the PCI-PCI bridge specification.  This says that
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index 015be770c1d8..67e6f9a9d1a0 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -30,9 +30,9 @@
 
 #include <mach/hardware.h>
 #include <mach/platform.h>
-#include <asm/irq.h>
+#include <mach/irqs.h>
+
 #include <asm/signal.h>
-#include <asm/system.h>
 #include <asm/mach/pci.h>
 #include <asm/irq_regs.h>
 
diff --git a/arch/arm/mach-iop13xx/include/mach/io.h b/arch/arm/mach-iop13xx/include/mach/io.h
index dffb234bb967..f13188518025 100644
--- a/arch/arm/mach-iop13xx/include/mach/io.h
+++ b/arch/arm/mach-iop13xx/include/mach/io.h
@@ -22,20 +22,7 @@
 #define IO_SPACE_LIMIT 0xffffffff
 
 #define __io(a) __iop13xx_io(a)
-#define __mem_pci(a) (a)
-#define __mem_isa(a) (a)
 
 extern void __iomem * __iop13xx_io(unsigned long io_addr);
-extern void __iomem *__iop13xx_ioremap(unsigned long cookie, size_t size,
-        unsigned int mtype);
-extern void __iop13xx_iounmap(void __iomem *addr);
-
-extern u32 iop13xx_atue_mem_base;
-extern u32 iop13xx_atux_mem_base;
-extern size_t iop13xx_atue_mem_size;
-extern size_t iop13xx_atux_mem_size;
-
-#define __arch_ioremap  __iop13xx_ioremap
-#define __arch_iounmap  __iop13xx_iounmap
 
 #endif
diff --git a/arch/arm/mach-iop13xx/include/mach/iop13xx.h b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
index 07e9ff7adafb..e190dcd7d72d 100644
--- a/arch/arm/mach-iop13xx/include/mach/iop13xx.h
+++ b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
@@ -5,6 +5,7 @@
 /* The ATU offsets can change based on the strapping */
 extern u32 iop13xx_atux_pmmr_offset;
 extern u32 iop13xx_atue_pmmr_offset;
+void iop13xx_init_early(void);
 void iop13xx_init_irq(void);
 void iop13xx_map_io(void);
 void iop13xx_platform_init(void);
diff --git a/arch/arm/mach-iop13xx/io.c b/arch/arm/mach-iop13xx/io.c
index 48642e66c566..3c364198db9c 100644
--- a/arch/arm/mach-iop13xx/io.c
+++ b/arch/arm/mach-iop13xx/io.c
@@ -21,6 +21,8 @@
 #include <linux/io.h>
 #include <mach/hardware.h>
 
+#include "pci.h"
+
 void * __iomem __iop13xx_io(unsigned long io_addr)
 {
         void __iomem * io_virt;
@@ -40,8 +42,8 @@ void * __iomem __iop13xx_io(unsigned long io_addr)
 }
 EXPORT_SYMBOL(__iop13xx_io);
 
-void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size,
-        unsigned int mtype)
+static void __iomem *__iop13xx_ioremap_caller(unsigned long cookie,
+        size_t size, unsigned int mtype, void *caller)
 {
         void __iomem * retval;
 
@@ -76,17 +78,14 @@ void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size,
                 break;
         default:
                 retval = __arm_ioremap_caller(cookie, size, mtype,
-                                __builtin_return_address(0));
+                                caller);
         }
 
         return retval;
 }
-EXPORT_SYMBOL(__iop13xx_ioremap);
 
-void __iop13xx_iounmap(void __iomem *addr)
+static void __iop13xx_iounmap(volatile void __iomem *addr)
 {
-        extern void __iounmap(volatile void __iomem *addr);
-
         if (iop13xx_atue_mem_base)
                 if (addr >= (void __iomem *) iop13xx_atue_mem_base &&
                     addr < (void __iomem *) (iop13xx_atue_mem_base +
@@ -110,4 +109,9 @@ void __iop13xx_iounmap(void __iomem *addr)
 skip:
         return;
 }
-EXPORT_SYMBOL(__iop13xx_iounmap);
+
+void __init iop13xx_init_early(void)
+{
+        arch_ioremap_caller = __iop13xx_ioremap_caller;
+        arch_iounmap = __iop13xx_iounmap;
+}
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
index abaee8833588..5c96b73e6964 100644
--- a/arch/arm/mach-iop13xx/iq81340mc.c
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -92,6 +92,7 @@ static struct sys_timer iq81340mc_timer = {
 MACHINE_START(IQ81340MC, "Intel IQ81340MC")
         /* Maintainer: Dan Williams <dan.j.williams@intel.com> */
         .atag_offset    = 0x100,
+        .init_early     = iop13xx_init_early,
         .map_io         = iop13xx_map_io,
         .init_irq       = iop13xx_init_irq,
         .timer          = &iq81340mc_timer,
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
index 690916a09dc6..aa4dd750135a 100644
--- a/arch/arm/mach-iop13xx/iq81340sc.c
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -94,6 +94,7 @@ static struct sys_timer iq81340sc_timer = {
 MACHINE_START(IQ81340SC, "Intel IQ81340SC")
         /* Maintainer: Dan Williams <dan.j.williams@intel.com> */
         .atag_offset    = 0x100,
+        .init_early     = iop13xx_init_early,
         .map_io         = iop13xx_map_io,
         .init_irq       = iop13xx_init_irq,
         .timer          = &iq81340sc_timer,
diff --git a/arch/arm/mach-iop13xx/pci.h b/arch/arm/mach-iop13xx/pci.h
new file mode 100644
index 000000000000..c70cf5b41e31
--- /dev/null
+++ b/arch/arm/mach-iop13xx/pci.h
@@ -0,0 +1,6 @@
+#include <linux/types.h>
+
+extern u32 iop13xx_atue_mem_base;
+extern u32 iop13xx_atux_mem_base;
+extern size_t iop13xx_atue_mem_size;
+extern size_t iop13xx_atux_mem_size;
diff --git a/arch/arm/mach-iop32x/include/mach/io.h b/arch/arm/mach-iop32x/include/mach/io.h
index 2d88264b9863..e2ada265bb8d 100644
--- a/arch/arm/mach-iop32x/include/mach/io.h
+++ b/arch/arm/mach-iop32x/include/mach/io.h
@@ -15,6 +15,5 @@
 
 #define IO_SPACE_LIMIT          0xffffffff
 #define __io(p)         ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
-#define __mem_pci(a)            (a)
 
 #endif
diff --git a/arch/arm/mach-iop33x/include/mach/io.h b/arch/arm/mach-iop33x/include/mach/io.h
index a8a66fc8fbdb..f7c1b6595660 100644
--- a/arch/arm/mach-iop33x/include/mach/io.h
+++ b/arch/arm/mach-iop33x/include/mach/io.h
@@ -15,6 +15,5 @@
 
 #define IO_SPACE_LIMIT          0xffffffff
 #define __io(p)         ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
-#define __mem_pci(a)            (a)
 
 #endif
diff --git a/arch/arm/mach-iop33x/uart.c b/arch/arm/mach-iop33x/uart.c
index cdae24e46eea..bbf54d794ce8 100644
--- a/arch/arm/mach-iop33x/uart.c
+++ b/arch/arm/mach-iop33x/uart.c
@@ -22,7 +22,6 @@
 #include <asm/page.h>
 #include <asm/mach/map.h>
 #include <asm/setup.h>
-#include <asm/system.h>
 #include <asm/memory.h>
 #include <mach/hardware.h>
 #include <asm/hardware/iop3xx.h>
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index 81c45370a4e6..f214cdff01cb 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -32,7 +32,6 @@
 #include <asm/memory.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
-#include <asm/system.h>
 #include <asm/tlbflush.h>
 #include <asm/pgtable.h>
 
diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c
index e872d238cd0f..4867f408617c 100644
--- a/arch/arm/mach-ixp2000/enp2611.c
+++ b/arch/arm/mach-ixp2000/enp2611.c
@@ -36,7 +36,6 @@
 #include <asm/irq.h>
 #include <asm/pgtable.h>
 #include <asm/page.h>
-#include <asm/system.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 
diff --git a/arch/arm/mach-ixp2000/include/mach/io.h b/arch/arm/mach-ixp2000/include/mach/io.h
index 859e584914d9..f6552d6f35ab 100644
--- a/arch/arm/mach-ixp2000/include/mach/io.h
+++ b/arch/arm/mach-ixp2000/include/mach/io.h
@@ -18,7 +18,6 @@
 #include <mach/hardware.h>
 
 #define IO_SPACE_LIMIT          0xffffffff
-#define __mem_pci(a)            (a)
 
 /*
  * The A? revisions of the IXP2000s assert byte lanes for PCI I/O
diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c
index d519944653ad..915ad49e3b8f 100644
--- a/arch/arm/mach-ixp2000/ixdp2400.c
+++ b/arch/arm/mach-ixp2000/ixdp2400.c
@@ -29,7 +29,6 @@
 #include <asm/irq.h>
 #include <asm/pgtable.h>
 #include <asm/page.h>
-#include <asm/system.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 
diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c
index b415febd2025..a9f1819ea049 100644
--- a/arch/arm/mach-ixp2000/ixdp2800.c
+++ b/arch/arm/mach-ixp2000/ixdp2800.c
@@ -29,7 +29,6 @@
 #include <asm/irq.h>
 #include <asm/pgtable.h>
 #include <asm/page.h>
-#include <asm/system.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
index dd9838299068..421e38dc0fac 100644
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -30,7 +30,6 @@
 #include <asm/irq.h>
 #include <asm/pgtable.h>
 #include <asm/page.h>
-#include <asm/system.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index 7632beadabf6..5196c39cdba4 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -34,7 +34,6 @@
 #include <asm/irq.h>
 #include <asm/pgtable.h>
 #include <asm/page.h>
-#include <asm/system.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 
diff --git a/arch/arm/mach-ixp2000/pci.c b/arch/arm/mach-ixp2000/pci.c
index 49c36f3cd602..9c02de932fac 100644
--- a/arch/arm/mach-ixp2000/pci.c
+++ b/arch/arm/mach-ixp2000/pci.c
@@ -26,7 +26,6 @@
 #include <linux/io.h>
 
 #include <asm/irq.h>
-#include <asm/system.h>
 #include <mach/hardware.h>
 
 #include <asm/mach/pci.h>
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index 7c1495e4fe7a..d34542425990 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -34,9 +34,9 @@
 #include <asm/memory.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
-#include <asm/system.h>
 #include <asm/tlbflush.h>
 #include <asm/pgtable.h>
+#include <asm/system_misc.h>
 
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
diff --git a/arch/arm/mach-ixp23xx/espresso.c b/arch/arm/mach-ixp23xx/espresso.c
index 8f2487e1fc4e..d142d45dea12 100644
--- a/arch/arm/mach-ixp23xx/espresso.c
+++ b/arch/arm/mach-ixp23xx/espresso.c
@@ -32,7 +32,6 @@
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/irq.h>
-#include <asm/system.h>
 #include <asm/tlbflush.h>
 #include <asm/pgtable.h>
 
diff --git a/arch/arm/mach-ixp23xx/include/mach/io.h b/arch/arm/mach-ixp23xx/include/mach/io.h
index 4ce4353b9f72..a7aceb55c130 100644
--- a/arch/arm/mach-ixp23xx/include/mach/io.h
+++ b/arch/arm/mach-ixp23xx/include/mach/io.h
@@ -18,6 +18,5 @@
 #define IO_SPACE_LIMIT 0xffffffff
 
 #define __io(p)         ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT))
-#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
index 5d5dd3e8d069..b0e07db5ceaf 100644
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -36,7 +36,6 @@
 #include <asm/memory.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
-#include <asm/system.h>
 #include <asm/tlbflush.h>
 #include <asm/pgtable.h>
 
diff --git a/arch/arm/mach-ixp23xx/pci.c b/arch/arm/mach-ixp23xx/pci.c
index 3cbbd3208fa8..911f5a58e006 100644
--- a/arch/arm/mach-ixp23xx/pci.c
+++ b/arch/arm/mach-ixp23xx/pci.c
@@ -28,7 +28,6 @@
 
 #include <asm/irq.h>
 #include <asm/sizes.h>
-#include <asm/system.h>
 #include <asm/mach/pci.h>
 #include <mach/hardware.h>
 
diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c
index 377283fc658c..eaaa3fa9fd05 100644
--- a/arch/arm/mach-ixp23xx/roadrunner.c
+++ b/arch/arm/mach-ixp23xx/roadrunner.c
@@ -36,7 +36,6 @@
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/irq.h>
-#include <asm/system.h>
 #include <asm/tlbflush.h>
 #include <asm/pgtable.h>
 
diff --git a/arch/arm/mach-ixp4xx/avila-setup.c b/arch/arm/mach-ixp4xx/avila-setup.c
index a7277ad470a5..90e42e9982cb 100644
--- a/arch/arm/mach-ixp4xx/avila-setup.c
+++ b/arch/arm/mach-ixp4xx/avila-setup.c
@@ -165,6 +165,7 @@ static void __init avila_init(void)
 MACHINE_START(AVILA, "Gateworks Avila Network Platform")
         /* Maintainer: Deepak Saxena <dsaxena@plexity.net> */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
@@ -184,6 +185,7 @@ MACHINE_END
 MACHINE_START(LOFT, "Giant Shoulder Inc Loft board")
         /* Maintainer: Tom Billman <kernel@giantshoulderinc.com> */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 8508882b13f0..d5719eb42591 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -32,7 +32,6 @@
 #include <asm/cputype.h>
 #include <asm/irq.h>
 #include <asm/sizes.h>
-#include <asm/system.h>
 #include <asm/mach/pci.h>
 #include <mach/hardware.h>
 
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index a6329a0a8ec4..ebbd7fc90eb4 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -31,11 +31,13 @@
 
 #include <mach/udc.h>
 #include <mach/hardware.h>
+#include <mach/io.h>
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
 #include <asm/page.h>
 #include <asm/irq.h>
 #include <asm/sched_clock.h>
+#include <asm/system_misc.h>
 
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
@@ -517,3 +519,35 @@ void ixp4xx_restart(char mode, const char *cmd)
                 *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE;
         }
 }
+
+#ifdef CONFIG_IXP4XX_INDIRECT_PCI
+/*
+ * In the case of using indirect PCI, we simply return the actual PCI
+ * address and our read/write implementation use that to drive the
+ * access registers. If something outside of PCI is ioremap'd, we
+ * fallback to the default.
+ */
+
+static void __iomem *ixp4xx_ioremap_caller(unsigned long addr, size_t size,
+                                           unsigned int mtype, void *caller)
+{
+        if (!is_pci_memory(addr))
+                return __arm_ioremap_caller(addr, size, mtype, caller);
+
+        return (void __iomem *)addr;
+}
+
+static void ixp4xx_iounmap(void __iomem *addr)
+{
+        if (!is_pci_memory((__force u32)addr))
+                __iounmap(addr);
+}
+
+void __init ixp4xx_init_early(void)
+{
+        arch_ioremap_caller = ixp4xx_ioremap_caller;
+        arch_iounmap = ixp4xx_iounmap;
+}
+#else
+void __init ixp4xx_init_early(void) {}
+#endif
diff --git a/arch/arm/mach-ixp4xx/coyote-setup.c b/arch/arm/mach-ixp4xx/coyote-setup.c
index a74f86ce8bcc..1b83110028d6 100644
--- a/arch/arm/mach-ixp4xx/coyote-setup.c
+++ b/arch/arm/mach-ixp4xx/coyote-setup.c
@@ -110,6 +110,7 @@ static void __init coyote_init(void)
 MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote")
         /* Maintainer: MontaVista Software, Inc. */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
@@ -129,6 +130,7 @@ MACHINE_END
 MACHINE_START(IXDPG425, "Intel IXDPG425")
         /* Maintainer: MontaVista Software, Inc. */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c
index 67be177b336a..97a0af8f1955 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-setup.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c
@@ -280,6 +280,7 @@ MACHINE_START(DSMG600, "D-Link DSM-G600 RevA")
         /* Maintainer: www.nslu2-linux.org */
         .atag_offset    = 0x100,
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &dsmg600_timer,
         .init_machine   = dsmg600_init,
diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c
index 6d5818285af8..9175a25a7511 100644
--- a/arch/arm/mach-ixp4xx/fsg-setup.c
+++ b/arch/arm/mach-ixp4xx/fsg-setup.c
@@ -270,6 +270,7 @@ static void __init fsg_init(void)
 MACHINE_START(FSG, "Freecom FSG-3")
         /* Maintainer: www.nslu2-linux.org */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
diff --git a/arch/arm/mach-ixp4xx/gateway7001-setup.c b/arch/arm/mach-ixp4xx/gateway7001-setup.c
index 7ecf9b28f1c0..033c71758953 100644
--- a/arch/arm/mach-ixp4xx/gateway7001-setup.c
+++ b/arch/arm/mach-ixp4xx/gateway7001-setup.c
@@ -97,6 +97,7 @@ static void __init gateway7001_init(void)
 MACHINE_START(GATEWAY7001, "Gateway 7001 AP")
         /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index c0e3d69a8aec..46bb924962ee 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -12,7 +12,6 @@
 #include <linux/pci.h>
 #include <linux/serial_8250.h>
 #include <asm/mach-types.h>
-#include <asm/system.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
 #include <asm/mach/pci.h>
@@ -497,6 +496,7 @@ subsys_initcall(gmlr_pci_init);
 MACHINE_START(GORAMO_MLR, "MultiLink")
         /* Maintainer: Krzysztof Halasa */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
index a23f89391458..18ebc6be7969 100644
--- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c
+++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
@@ -165,6 +165,7 @@ static void __init gtwx5715_init(void)
 MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)")
         /* Maintainer: George Joseph */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
diff --git a/arch/arm/mach-ixp4xx/include/mach/hardware.h b/arch/arm/mach-ixp4xx/include/mach/hardware.h
index c30e7e923a73..034bb2a1b805 100644
--- a/arch/arm/mach-ixp4xx/include/mach/hardware.h
+++ b/arch/arm/mach-ixp4xx/include/mach/hardware.h
@@ -23,8 +23,6 @@
 #define PCIBIOS_MAX_MEM         0x4BFFFFFF
 #endif
 
-#define ARCH_HAS_DMA_SET_COHERENT_MASK
-
 /* Register locations and bits */
 #include "ixp4xx-regs.h"
 
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h
index ffb9d6afb89f..5cf30d1b78d2 100644
--- a/arch/arm/mach-ixp4xx/include/mach/io.h
+++ b/arch/arm/mach-ixp4xx/include/mach/io.h
@@ -39,11 +39,7 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
  *    but in some cases the performance hit is acceptable. In addition, you
  *    cannot mmap() PCI devices in this case.
  */
-#ifndef CONFIG_IXP4XX_INDIRECT_PCI
-
-#define __mem_pci(a)            (a)
-
-#else
+#ifdef  CONFIG_IXP4XX_INDIRECT_PCI
 
 /*
  * In the case of using indirect PCI, we simply return the actual PCI
@@ -57,24 +53,6 @@ static inline int is_pci_memory(u32 addr)
         return (addr >= PCIBIOS_MIN_MEM) && (addr <= 0x4FFFFFFF);
 }
 
-static inline void __iomem * __indirect_ioremap(unsigned long addr, size_t size,
-                                                unsigned int mtype)
-{
-        if (!is_pci_memory(addr))
-                return __arm_ioremap(addr, size, mtype);
-
-        return (void __iomem *)addr;
-}
-
-static inline void __indirect_iounmap(void __iomem *addr)
-{
-        if (!is_pci_memory((__force u32)addr))
-                __iounmap(addr);
-}
-
-#define __arch_ioremap                  __indirect_ioremap
-#define __arch_iounmap                  __indirect_iounmap
-
 #define writeb(v, p)                    __indirect_writeb(v, p)
 #define writew(v, p)                    __indirect_writew(v, p)
 #define writel(v, p)                    __indirect_writel(v, p)
diff --git a/arch/arm/mach-ixp4xx/include/mach/platform.h b/arch/arm/mach-ixp4xx/include/mach/platform.h
index df9250bbf13d..b66bedc64de1 100644
--- a/arch/arm/mach-ixp4xx/include/mach/platform.h
+++ b/arch/arm/mach-ixp4xx/include/mach/platform.h
@@ -121,6 +121,7 @@ extern unsigned long ixp4xx_timer_freq;
  * Functions used by platform-level setup code
  */
 extern void ixp4xx_map_io(void);
+extern void ixp4xx_init_early(void);
 extern void ixp4xx_init_irq(void);
 extern void ixp4xx_sys_init(void);
 extern void ixp4xx_timer_init(void);
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c
index 8a38b39999f8..3d742aee1773 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-setup.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c
@@ -254,6 +254,7 @@ static void __init ixdp425_init(void)
 MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
         /* Maintainer: MontaVista Software, Inc. */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
@@ -269,6 +270,7 @@ MACHINE_END
 MACHINE_START(IXDP465, "Intel IXDP465 Development Platform")
         /* Maintainer: MontaVista Software, Inc. */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
@@ -283,6 +285,7 @@ MACHINE_END
 MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform")
         /* Maintainer: MontaVista Software, Inc. */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
@@ -297,6 +300,7 @@ MACHINE_END
 MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform")
         /* Maintainer: MontaVista Software, Inc. */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
index 1010eb7b0083..33cb0955b6bf 100644
--- a/arch/arm/mach-ixp4xx/nas100d-setup.c
+++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
@@ -315,6 +315,7 @@ MACHINE_START(NAS100D, "Iomega NAS 100d")
         /* Maintainer: www.nslu2-linux.org */
         .atag_offset    = 0x100,
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .init_machine   = nas100d_init,
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
index aa355c360d57..e2903faaebb3 100644
--- a/arch/arm/mach-ixp4xx/nslu2-setup.c
+++ b/arch/arm/mach-ixp4xx/nslu2-setup.c
@@ -301,6 +301,7 @@ MACHINE_START(NSLU2, "Linksys NSLU2")
         /* Maintainer: www.nslu2-linux.org */
         .atag_offset    = 0x100,
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &nslu2_timer,
         .init_machine   = nslu2_init,
diff --git a/arch/arm/mach-ixp4xx/omixp-setup.c b/arch/arm/mach-ixp4xx/omixp-setup.c
index 0940869fcfdd..158ddb79821d 100644
--- a/arch/arm/mach-ixp4xx/omixp-setup.c
+++ b/arch/arm/mach-ixp4xx/omixp-setup.c
@@ -243,6 +243,7 @@ static void __init omixp_init(void)
 MACHINE_START(DEVIXP, "Omicron DEVIXP")
         .atag_offset    = 0x100,
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .init_machine   = omixp_init,
@@ -254,6 +255,7 @@ MACHINE_END
 MACHINE_START(MICCPT, "Omicron MICCPT")
         .atag_offset    = 0x100,
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .init_machine   = omixp_init,
@@ -268,6 +270,7 @@ MACHINE_END
 MACHINE_START(MIC256, "Omicron MIC256")
         .atag_offset    = 0x100,
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .init_machine   = omixp_init,
diff --git a/arch/arm/mach-ixp4xx/vulcan-setup.c b/arch/arm/mach-ixp4xx/vulcan-setup.c
index 9dec20683291..2798f435aaf4 100644
--- a/arch/arm/mach-ixp4xx/vulcan-setup.c
+++ b/arch/arm/mach-ixp4xx/vulcan-setup.c
@@ -237,6 +237,7 @@ static void __init vulcan_init(void)
 MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")
         /* Maintainer: Marc Zyngier <maz@misterjones.org> */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
diff --git a/arch/arm/mach-ixp4xx/wg302v2-setup.c b/arch/arm/mach-ixp4xx/wg302v2-setup.c
index 5ac0f0a0fd8c..a785175b115b 100644
--- a/arch/arm/mach-ixp4xx/wg302v2-setup.c
+++ b/arch/arm/mach-ixp4xx/wg302v2-setup.c
@@ -98,6 +98,7 @@ static void __init wg302v2_init(void)
 MACHINE_START(WG302V2, "Netgear WG302 v2 / WAG302 v2")
         /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index acbc5e1db06f..e299a9576bf0 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -21,3 +21,4 @@ obj-$(CONFIG_MACH_T5325)		+= t5325-setup.o
 
 obj-$(CONFIG_CPU_IDLE)                  += cpuidle.o
 obj-$(CONFIG_ARCH_KIRKWOOD_DT)          += board-dt.o
+obj-$(CONFIG_MACH_DREAMPLUG_DT)         += board-dreamplug.o
diff --git a/arch/arm/mach-kirkwood/board-dreamplug.c b/arch/arm/mach-kirkwood/board-dreamplug.c
new file mode 100644
index 000000000000..985453994dd3
--- /dev/null
+++ b/arch/arm/mach-kirkwood/board-dreamplug.c
@@ -0,0 +1,152 @@
+/*
+ * Copyright 2012 (C), Jason Cooper <jason@lakedaemon.net>
+ *
+ * arch/arm/mach-kirkwood/board-dreamplug.c
+ *
+ * Marvell DreamPlug Reference Board Init for drivers not converted to
+ * flattened device tree yet.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/partitions.h>
+#include <linux/ata_platform.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_fdt.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/gpio.h>
+#include <linux/leds.h>
+#include <linux/mtd/physmap.h>
+#include <linux/spi/flash.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/orion_spi.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <mach/kirkwood.h>
+#include <mach/bridge-regs.h>
+#include <plat/mvsdio.h>
+#include "common.h"
+#include "mpp.h"
+
+struct mtd_partition dreamplug_partitions[] = {
+        {
+                .name   = "u-boot",
+                .size   = SZ_512K,
+                .offset = 0,
+        },
+        {
+                .name   = "u-boot env",
+                .size   = SZ_64K,
+                .offset = SZ_512K + SZ_512K,
+        },
+        {
+                .name   = "dtb",
+                .size   = SZ_64K,
+                .offset = SZ_512K + SZ_512K + SZ_512K,
+        },
+};
+
+static const struct flash_platform_data dreamplug_spi_slave_data = {
+        .type           = "mx25l1606e",
+        .name           = "spi_flash",
+        .parts          = dreamplug_partitions,
+        .nr_parts       = ARRAY_SIZE(dreamplug_partitions),
+};
+
+static struct spi_board_info __initdata dreamplug_spi_slave_info[] = {
+        {
+                .modalias       = "m25p80",
+                .platform_data  = &dreamplug_spi_slave_data,
+                .irq            = -1,
+                .max_speed_hz   = 50000000,
+                .bus_num        = 0,
+                .chip_select    = 0,
+        },
+};
+
+static struct mv643xx_eth_platform_data dreamplug_ge00_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
+};
+
+static struct mv643xx_eth_platform_data dreamplug_ge01_data = {
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(1),
+};
+
+static struct mv_sata_platform_data dreamplug_sata_data = {
+        .n_ports        = 1,
+};
+
+static struct mvsdio_platform_data dreamplug_mvsdio_data = {
+        /* unfortunately the CD signal has not been connected */
+};
+
+static struct gpio_led dreamplug_led_pins[] = {
+        {
+                .name                   = "dreamplug:blue:bluetooth",
+                .gpio                   = 47,
+                .active_low             = 1,
+        },
+        {
+                .name                   = "dreamplug:green:wifi",
+                .gpio                   = 48,
+                .active_low             = 1,
+        },
+        {
+                .name                   = "dreamplug:green:wifi_ap",
+                .gpio                   = 49,
+                .active_low             = 1,
+        },
+};
+
+static struct gpio_led_platform_data dreamplug_led_data = {
+        .leds           = dreamplug_led_pins,
+        .num_leds       = ARRAY_SIZE(dreamplug_led_pins),
+};
+
+static struct platform_device dreamplug_leds = {
+        .name   = "leds-gpio",
+        .id     = -1,
+        .dev    = {
+                .platform_data  = &dreamplug_led_data,
+        }
+};
+
+static unsigned int dreamplug_mpp_config[] __initdata = {
+        MPP0_SPI_SCn,
+        MPP1_SPI_MOSI,
+        MPP2_SPI_SCK,
+        MPP3_SPI_MISO,
+        MPP47_GPIO,     /* Bluetooth LED */
+        MPP48_GPIO,     /* Wifi LED */
+        MPP49_GPIO,     /* Wifi AP LED */
+        0
+};
+
+void __init dreamplug_init(void)
+{
+        /*
+         * Basic setup. Needs to be called early.
+         */
+        kirkwood_mpp_conf(dreamplug_mpp_config);
+
+        spi_register_board_info(dreamplug_spi_slave_info,
+                                ARRAY_SIZE(dreamplug_spi_slave_info));
+        kirkwood_spi_init();
+
+        kirkwood_ehci_init();
+        kirkwood_ge00_init(&dreamplug_ge00_data);
+        kirkwood_ge01_init(&dreamplug_ge01_data);
+        kirkwood_sata_init(&dreamplug_sata_data);
+        kirkwood_sdio_init(&dreamplug_mvsdio_data);
+
+        platform_device_register(&dreamplug_leds);
+}
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index fbe6405602ed..1c672d9e6656 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -3,7 +3,7 @@
  *
  * arch/arm/mach-kirkwood/board-dt.c
  *
- * Marvell DreamPlug Reference Board Setup
+ * Flattened Device Tree board initialization
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2.  This program is licensed "as is" without any
@@ -12,150 +12,45 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/mtd/partitions.h>
-#include <linux/ata_platform.h>
-#include <linux/mv643xx_eth.h>
 #include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_fdt.h>
-#include <linux/of_irq.h>
 #include <linux/of_platform.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-#include <linux/mtd/physmap.h>
-#include <linux/spi/flash.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/orion_spi.h>
-#include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <mach/kirkwood.h>
-#include <plat/mvsdio.h>
+#include <asm/mach/map.h>
+#include <mach/bridge-regs.h>
 #include "common.h"
-#include "mpp.h"
 
 static struct of_device_id kirkwood_dt_match_table[] __initdata = {
         { .compatible = "simple-bus", },
         { }
 };
 
-struct mtd_partition dreamplug_partitions[] = {
-        {
-                .name   = "u-boot",
-                .size   = SZ_512K,
-                .offset = 0,
-        },
-        {
-                .name   = "u-boot env",
-                .size   = SZ_64K,
-                .offset = SZ_512K + SZ_512K,
-        },
-        {
-                .name   = "dtb",
-                .size   = SZ_64K,
-                .offset = SZ_512K + SZ_512K + SZ_512K,
-        },
-};
-
-static const struct flash_platform_data dreamplug_spi_slave_data = {
-        .type           = "mx25l1606e",
-        .name           = "spi_flash",
-        .parts          = dreamplug_partitions,
-        .nr_parts       = ARRAY_SIZE(dreamplug_partitions),
-};
-
-static struct spi_board_info __initdata dreamplug_spi_slave_info[] = {
-        {
-                .modalias       = "m25p80",
-                .platform_data  = &dreamplug_spi_slave_data,
-                .irq            = -1,
-                .max_speed_hz   = 50000000,
-                .bus_num        = 0,
-                .chip_select    = 0,
-        },
-};
-
-static struct mv643xx_eth_platform_data dreamplug_ge00_data = {
-        .phy_addr       = MV643XX_ETH_PHY_ADDR(0),
-};
-
-static struct mv643xx_eth_platform_data dreamplug_ge01_data = {
-        .phy_addr       = MV643XX_ETH_PHY_ADDR(1),
-};
-
-static struct mv_sata_platform_data dreamplug_sata_data = {
-        .n_ports        = 1,
-};
-
-static struct mvsdio_platform_data dreamplug_mvsdio_data = {
-        /* unfortunately the CD signal has not been connected */
-};
-
-static struct gpio_led dreamplug_led_pins[] = {
-        {
-                .name                   = "dreamplug:blue:bluetooth",
-                .gpio                   = 47,
-                .active_low             = 1,
-        },
-        {
-                .name                   = "dreamplug:green:wifi",
-                .gpio                   = 48,
-                .active_low             = 1,
-        },
-        {
-                .name                   = "dreamplug:green:wifi_ap",
-                .gpio                   = 49,
-                .active_low             = 1,
-        },
-};
-
-static struct gpio_led_platform_data dreamplug_led_data = {
-        .leds           = dreamplug_led_pins,
-        .num_leds       = ARRAY_SIZE(dreamplug_led_pins),
-};
-
-static struct platform_device dreamplug_leds = {
-        .name   = "leds-gpio",
-        .id     = -1,
-        .dev    = {
-                .platform_data  = &dreamplug_led_data,
-        }
-};
-
-static unsigned int dreamplug_mpp_config[] __initdata = {
-        MPP0_SPI_SCn,
-        MPP1_SPI_MOSI,
-        MPP2_SPI_SCK,
-        MPP3_SPI_MISO,
-        MPP47_GPIO,     /* Bluetooth LED */
-        MPP48_GPIO,     /* Wifi LED */
-        MPP49_GPIO,     /* Wifi AP LED */
-        0
-};
-
-static void __init dreamplug_init(void)
+static void __init kirkwood_dt_init(void)
 {
+        pr_info("Kirkwood: %s, TCLK=%d.\n", kirkwood_id(), kirkwood_tclk);
+
         /*
-         * Basic setup. Needs to be called early.
+         * Disable propagation of mbus errors to the CPU local bus,
+         * as this causes mbus errors (which can occur for example
+         * for PCI aborts) to throw CPU aborts, which we're not set
+         * up to deal with.
          */
-        kirkwood_mpp_conf(dreamplug_mpp_config);
+        writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
 
-        spi_register_board_info(dreamplug_spi_slave_info,
-                                ARRAY_SIZE(dreamplug_spi_slave_info));
-        kirkwood_spi_init();
+        kirkwood_setup_cpu_mbus();
 
-        kirkwood_ehci_init();
-        kirkwood_ge00_init(&dreamplug_ge00_data);
-        kirkwood_ge01_init(&dreamplug_ge01_data);
-        kirkwood_sata_init(&dreamplug_sata_data);
-        kirkwood_sdio_init(&dreamplug_mvsdio_data);
+#ifdef CONFIG_CACHE_FEROCEON_L2
+        kirkwood_l2_init();
+#endif
 
-        platform_device_register(&dreamplug_leds);
-}
+        /* internal devices that every board has */
+        kirkwood_wdt_init();
+        kirkwood_xor0_init();
+        kirkwood_xor1_init();
+        kirkwood_crypto_init();
 
-static void __init kirkwood_dt_init(void)
-{
-        kirkwood_init();
+#ifdef CONFIG_KEXEC
+        kexec_reinit = kirkwood_enable_pcie;
+#endif
 
         if (of_machine_is_compatible("globalscale,dreamplug"))
                 dreamplug_init();
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 77d4852e19f2..a02cae881f2f 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -279,7 +279,7 @@ void __init kirkwood_crypto_init(void)
 /*****************************************************************************
  * XOR0
  ****************************************************************************/
-static void __init kirkwood_xor0_init(void)
+void __init kirkwood_xor0_init(void)
 {
         kirkwood_clk_ctrl |= CGC_XOR0;
 
@@ -291,7 +291,7 @@ static void __init kirkwood_xor0_init(void)
 /*****************************************************************************
  * XOR1
  ****************************************************************************/
-static void __init kirkwood_xor1_init(void)
+void __init kirkwood_xor1_init(void)
 {
         kirkwood_clk_ctrl |= CGC_XOR1;
 
@@ -303,7 +303,7 @@ static void __init kirkwood_xor1_init(void)
 /*****************************************************************************
  * Watchdog
  ****************************************************************************/
-static void __init kirkwood_wdt_init(void)
+void __init kirkwood_wdt_init(void)
 {
         orion_wdt_init(kirkwood_tclk);
 }
@@ -392,7 +392,7 @@ void __init kirkwood_audio_init(void)
 /*
  * Identify device ID and revision.
  */
-static char * __init kirkwood_id(void)
+char * __init kirkwood_id(void)
 {
         u32 dev, rev;
 
@@ -435,7 +435,7 @@ static char * __init kirkwood_id(void)
         }
 }
 
-static void __init kirkwood_l2_init(void)
+void __init kirkwood_l2_init(void)
 {
 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
         writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
@@ -450,7 +450,6 @@ void __init kirkwood_init(void)
 {
         printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
                 kirkwood_id(), kirkwood_tclk);
-        kirkwood_i2s_data.tclk = kirkwood_tclk;
 
         /*
          * Disable propagation of mbus errors to the CPU local bus,
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index 9071a397136d..fa8e7689c436 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -51,6 +51,21 @@ void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, int (*dev
 void kirkwood_audio_init(void);
 void kirkwood_restart(char, const char *);
 
+/* board init functions for boards not fully converted to fdt */
+#ifdef CONFIG_MACH_DREAMPLUG_DT
+void dreamplug_init(void);
+#else
+static inline void dreamplug_init(void) {};
+#endif
+
+/* early init functions not converted to fdt yet */
+char *kirkwood_id(void);
+void kirkwood_l2_init(void);
+void kirkwood_wdt_init(void);
+void kirkwood_xor0_init(void);
+void kirkwood_xor1_init(void);
+void kirkwood_crypto_init(void);
+
 extern int kirkwood_tclk;
 extern struct sys_timer kirkwood_timer;
 
diff --git a/arch/arm/mach-kirkwood/cpuidle.c b/arch/arm/mach-kirkwood/cpuidle.c
index 7088180b018b..0f1710941878 100644
--- a/arch/arm/mach-kirkwood/cpuidle.c
+++ b/arch/arm/mach-kirkwood/cpuidle.c
@@ -20,77 +20,47 @@
 #include <linux/io.h>
 #include <linux/export.h>
 #include <asm/proc-fns.h>
+#include <asm/cpuidle.h>
 #include <mach/kirkwood.h>
 
 #define KIRKWOOD_MAX_STATES     2
 
-static struct cpuidle_driver kirkwood_idle_driver = {
-        .name =         "kirkwood_idle",
-        .owner =        THIS_MODULE,
-};
-
-static DEFINE_PER_CPU(struct cpuidle_device, kirkwood_cpuidle_device);
-
 /* Actual code that puts the SoC in different idle states */
 static int kirkwood_enter_idle(struct cpuidle_device *dev,
                                 struct cpuidle_driver *drv,
                                int index)
 {
-        struct timeval before, after;
-        int idle_time;
-
-        local_irq_disable();
-        do_gettimeofday(&before);
-        if (index == 0)
-                /* Wait for interrupt state */
-                cpu_do_idle();
-        else if (index == 1) {
-                /*
-                 * Following write will put DDR in self refresh.
-                 * Note that we have 256 cycles before DDR puts it
-                 * self in self-refresh, so the wait-for-interrupt
-                 * call afterwards won't get the DDR from self refresh
-                 * mode.
-                 */
-                writel(0x7, DDR_OPERATION_BASE);
-                cpu_do_idle();
-        }
-        do_gettimeofday(&after);
-        local_irq_enable();
-        idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
-                        (after.tv_usec - before.tv_usec);
-
-        /* Update last residency */
-        dev->last_residency = idle_time;
+        writel(0x7, DDR_OPERATION_BASE);
+        cpu_do_idle();
 
         return index;
 }
 
+static struct cpuidle_driver kirkwood_idle_driver = {
+        .name                   = "kirkwood_idle",
+        .owner                  = THIS_MODULE,
+        .en_core_tk_irqen       = 1,
+        .states[0]              = ARM_CPUIDLE_WFI_STATE,
+        .states[1]              = {
+                .enter                  = kirkwood_enter_idle,
+                .exit_latency           = 10,
+                .target_residency       = 100000,
+                .flags                  = CPUIDLE_FLAG_TIME_VALID,
+                .name                   = "DDR SR",
+                .desc                   = "WFI and DDR Self Refresh",
+        },
+        .state_count = KIRKWOOD_MAX_STATES,
+};
+
+static DEFINE_PER_CPU(struct cpuidle_device, kirkwood_cpuidle_device);
+
 /* Initialize CPU idle by registering the idle states */
 static int kirkwood_init_cpuidle(void)
 {
         struct cpuidle_device *device;
-        struct cpuidle_driver *driver = &kirkwood_idle_driver;
 
         device = &per_cpu(kirkwood_cpuidle_device, smp_processor_id());
         device->state_count = KIRKWOOD_MAX_STATES;
-        driver->state_count = KIRKWOOD_MAX_STATES;
-
-        /* Wait for interrupt state */
-        driver->states[0].enter = kirkwood_enter_idle;
-        driver->states[0].exit_latency = 1;
-        driver->states[0].target_residency = 10000;
-        driver->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
-        strcpy(driver->states[0].name, "WFI");
-        strcpy(driver->states[0].desc, "Wait for interrupt");
-
-        /* Wait for interrupt and DDR self refresh state */
-        driver->states[1].enter = kirkwood_enter_idle;
-        driver->states[1].exit_latency = 10;
-        driver->states[1].target_residency = 10000;
-        driver->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
-        strcpy(driver->states[1].name, "DDR SR");
-        strcpy(driver->states[1].desc, "WFI and DDR Self Refresh");
 
         cpuidle_register_driver(&kirkwood_idle_driver);
         if (cpuidle_register_device(device)) {
diff --git a/arch/arm/mach-kirkwood/include/mach/io.h b/arch/arm/mach-kirkwood/include/mach/io.h
index 49dd0cb5e166..5d0ab61700d2 100644
--- a/arch/arm/mach-kirkwood/include/mach/io.h
+++ b/arch/arm/mach-kirkwood/include/mach/io.h
@@ -20,7 +20,5 @@ static inline void __iomem *__io(unsigned long addr)
 }
 
 #define __io(a)                 __io(a)
-#define __mem_pci(a)            (a)
-
 
 #endif
diff --git a/arch/arm/mach-ks8695/include/mach/io.h b/arch/arm/mach-ks8695/include/mach/io.h
deleted file mode 100644
index a7a63ac3ba4e..000000000000
--- a/arch/arm/mach-ks8695/include/mach/io.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-ks8695/include/mach/io.h
- *
- * Copyright (C) 2006 Andrew Victor
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_IO_H
-#define __ASM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT          0xffffffff
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c
index 37dfcd5bd2ad..ec783a3070ae 100644
--- a/arch/arm/mach-ks8695/time.c
+++ b/arch/arm/mach-ks8695/time.c
@@ -27,6 +27,7 @@
 #include <linux/io.h>
 
 #include <asm/mach/time.h>
+#include <asm/system_misc.h>
 
 #include <mach/regs-timer.h>
 #include <mach/regs-irq.h>
diff --git a/arch/arm/mach-lpc32xx/Kconfig b/arch/arm/mach-lpc32xx/Kconfig
index fde663508696..75946ac89ee9 100644
--- a/arch/arm/mach-lpc32xx/Kconfig
+++ b/arch/arm/mach-lpc32xx/Kconfig
@@ -29,5 +29,30 @@ config ARCH_LPC32XX_UART6_SELECT
 
 endmenu
 
+menu "LPC32XX chip components"
+
+config ARCH_LPC32XX_IRAM_FOR_NET
+        bool "Use IRAM for network buffers"
+        default y
+        help
+          Say Y here to use the LPC internal fast IRAM (i.e. 256KB SRAM) as
+          network buffer.  If the total combined required buffer sizes is
+          larger than the size of IRAM, then SDRAM will be used instead.
+
+          This can be enabled safely if the IRAM is not intended for other
+          uses.
+
+config ARCH_LPC32XX_MII_SUPPORT
+        bool "Check to enable MII support or leave disabled for RMII support"
+        help
+          Say Y here to enable MII support, or N for RMII support. Regardless of
+          which support is selected, the ethernet interface driver needs to be
+          selected in the device driver networking section.
+
+          The PHY3250 reference board uses RMII, so users of this board should
+          say N.
+
+endmenu
+
 endif
 
diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c
index f55c772d1816..2fc24ca12054 100644
--- a/arch/arm/mach-lpc32xx/clock.c
+++ b/arch/arm/mach-lpc32xx/clock.c
@@ -87,6 +87,7 @@
 #include <linux/list.h>
 #include <linux/errno.h>
 #include <linux/device.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/clk.h>
 #include <linux/amba/bus.h>
@@ -100,6 +101,8 @@
 
 static DEFINE_SPINLOCK(global_clkregs_lock);
 
+static int usb_pll_enable, usb_pll_valid;
+
 static struct clk clk_armpll;
 static struct clk clk_usbpll;
 
@@ -384,30 +387,62 @@ static u32 local_clk_usbpll_setup(struct clk_pll_setup *pHCLKPllSetup)
 static int local_usbpll_enable(struct clk *clk, int enable)
 {
         u32 reg;
-        int ret = -ENODEV;
-        unsigned long timeout = jiffies + msecs_to_jiffies(10);
+        int ret = 0;
+        unsigned long timeout = jiffies + msecs_to_jiffies(20);
 
         reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
 
-        if (enable == 0) {
-                reg &= ~(LPC32XX_CLKPWR_USBCTRL_CLK_EN1 |
-                        LPC32XX_CLKPWR_USBCTRL_CLK_EN2);
-                __raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
-        } else if (reg & LPC32XX_CLKPWR_USBCTRL_PLL_PWRUP) {
+        __raw_writel(reg & ~(LPC32XX_CLKPWR_USBCTRL_CLK_EN2 |
+                LPC32XX_CLKPWR_USBCTRL_PLL_PWRUP),
+                LPC32XX_CLKPWR_USB_CTRL);
+        __raw_writel(reg & ~LPC32XX_CLKPWR_USBCTRL_CLK_EN1,
+                LPC32XX_CLKPWR_USB_CTRL);
+
+        if (enable && usb_pll_valid && usb_pll_enable) {
+                ret = -ENODEV;
+                /*
+                 * If the PLL rate has been previously set, then the rate
+                 * in the PLL register is valid and can be enabled here.
+                 * Otherwise, it needs to be enabled as part of setrate.
+                 */
+
+                /*
+                 * Gate clock into PLL
+                 */
                 reg |= LPC32XX_CLKPWR_USBCTRL_CLK_EN1;
                 __raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
 
-                /* Wait for PLL lock */
+                /*
+                 * Enable PLL
+                 */
+                reg |= LPC32XX_CLKPWR_USBCTRL_PLL_PWRUP;
+                __raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
+
+                /*
+                 * Wait for PLL to lock
+                 */
                 while (time_before(jiffies, timeout) && (ret == -ENODEV)) {
                         reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
                         if (reg & LPC32XX_CLKPWR_USBCTRL_PLL_STS)
                                 ret = 0;
+                        else
+                                udelay(10);
                 }
 
+                /*
+                 * Gate clock from PLL if PLL is locked
+                 */
                 if (ret == 0) {
-                        reg |= LPC32XX_CLKPWR_USBCTRL_CLK_EN2;
-                        __raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
+                        __raw_writel(reg | LPC32XX_CLKPWR_USBCTRL_CLK_EN2,
+                                LPC32XX_CLKPWR_USB_CTRL);
+                } else {
+                        __raw_writel(reg & ~(LPC32XX_CLKPWR_USBCTRL_CLK_EN1 |
+                                LPC32XX_CLKPWR_USBCTRL_PLL_PWRUP),
+                                LPC32XX_CLKPWR_USB_CTRL);
                 }
+        } else if ((enable == 0) && usb_pll_valid  && usb_pll_enable) {
+                usb_pll_valid = 0;
+                usb_pll_enable = 0;
         }
 
         return ret;
@@ -425,7 +460,7 @@ static unsigned long local_usbpll_round_rate(struct clk *clk,
          */
         rate = rate * 1000;
 
-        clkin = clk->parent->rate;
+        clkin = clk->get_rate(clk);
         usbdiv = (__raw_readl(LPC32XX_CLKPWR_USBCLK_PDIV) &
                 LPC32XX_CLKPWR_USBPDIV_PLL_MASK) + 1;
         clkin = clkin / usbdiv;
@@ -439,7 +474,8 @@ static unsigned long local_usbpll_round_rate(struct clk *clk,
 
 static int local_usbpll_set_rate(struct clk *clk, unsigned long rate)
 {
-        u32 clkin, reg, usbdiv;
+        int ret = -ENODEV;
+        u32 clkin, usbdiv;
         struct clk_pll_setup pllsetup;
 
         /*
@@ -448,7 +484,7 @@ static int local_usbpll_set_rate(struct clk *clk, unsigned long rate)
          */
         rate = rate * 1000;
 
-        clkin = clk->get_rate(clk);
+        clkin = clk->get_rate(clk->parent);
         usbdiv = (__raw_readl(LPC32XX_CLKPWR_USBCLK_PDIV) &
                 LPC32XX_CLKPWR_USBPDIV_PLL_MASK) + 1;
         clkin = clkin / usbdiv;
@@ -457,22 +493,25 @@ static int local_usbpll_set_rate(struct clk *clk, unsigned long rate)
         if (local_clk_find_pll_cfg(clkin, rate, &pllsetup) == 0)
                 return -EINVAL;
 
+        /*
+         * Disable PLL clocks during PLL change
+         */
         local_usbpll_enable(clk, 0);
-
-        reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
-        reg |= LPC32XX_CLKPWR_USBCTRL_CLK_EN1;
-        __raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
-
-        pllsetup.analog_on = 1;
+        pllsetup.analog_on = 0;
         local_clk_usbpll_setup(&pllsetup);
 
-        clk->rate = clk_check_pll_setup(clkin, &pllsetup);
+        /*
+         * Start USB PLL and check PLL status
+         */
+
+        usb_pll_valid = 1;
+        usb_pll_enable = 1;
 
-        reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
-        reg |= LPC32XX_CLKPWR_USBCTRL_CLK_EN2;
-        __raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
+        ret = local_usbpll_enable(clk, 1);
+        if (ret >= 0)
+                clk->rate = clk_check_pll_setup(clkin, &pllsetup);
 
-        return 0;
+        return ret;
 }
 
 static struct clk clk_usbpll = {
@@ -1095,7 +1134,7 @@ static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK(NULL, "i2s1_ck", clk_i2s1)
         _REGISTER_CLOCK("ts-lpc32xx", NULL, clk_tsc)
         _REGISTER_CLOCK("dev:mmc0", NULL, clk_mmc)
-        _REGISTER_CLOCK("lpc-net.0", NULL, clk_net)
+        _REGISTER_CLOCK("lpc-eth.0", NULL, clk_net)
         _REGISTER_CLOCK("dev:clcd", NULL, clk_lcd)
         _REGISTER_CLOCK("lpc32xx_udc", "ck_usbd", clk_usbd)
         _REGISTER_CLOCK("lpc32xx_rtc", NULL, clk_rtc)
diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c
index 6c76bb36559b..bbbf063a74c2 100644
--- a/arch/arm/mach-lpc32xx/common.c
+++ b/arch/arm/mach-lpc32xx/common.c
@@ -160,6 +160,53 @@ struct platform_device lpc32xx_adc_device = {
 };
 
 /*
+ * USB support
+ */
+/* The dmamask must be set for OHCI to work */
+static u64 ohci_dmamask = ~(u32) 0;
+static struct resource ohci_resources[] = {
+        {
+                .start = IO_ADDRESS(LPC32XX_USB_BASE),
+                .end = IO_ADDRESS(LPC32XX_USB_BASE + 0x100 - 1),
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = IRQ_LPC32XX_USB_HOST,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+struct platform_device lpc32xx_ohci_device = {
+        .name = "usb-ohci",
+        .id = -1,
+        .dev = {
+                .dma_mask = &ohci_dmamask,
+                .coherent_dma_mask = 0xFFFFFFFF,
+        },
+        .num_resources = ARRAY_SIZE(ohci_resources),
+        .resource = ohci_resources,
+};
+
+/*
+ * Network Support
+ */
+static struct resource net_resources[] = {
+        [0] = DEFINE_RES_MEM(LPC32XX_ETHERNET_BASE, SZ_4K),
+        [1] = DEFINE_RES_MEM(LPC32XX_IRAM_BASE, SZ_128K),
+        [2] = DEFINE_RES_IRQ(IRQ_LPC32XX_ETHERNET),
+};
+
+static u64 lpc32xx_mac_dma_mask = 0xffffffffUL;
+struct platform_device lpc32xx_net_device = {
+        .name = "lpc-eth",
+        .id = 0,
+        .dev = {
+                .dma_mask = &lpc32xx_mac_dma_mask,
+                .coherent_dma_mask = 0xffffffffUL,
+        },
+        .num_resources = ARRAY_SIZE(net_resources),
+        .resource = net_resources,
+};
+
+/*
  * Returns the unique ID for the device
  */
 void lpc32xx_get_uid(u32 devid[4])
diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h
index 68f2e46d98ad..68e45e8c9486 100644
--- a/arch/arm/mach-lpc32xx/common.h
+++ b/arch/arm/mach-lpc32xx/common.h
@@ -19,6 +19,7 @@
 #ifndef __LPC32XX_COMMON_H
 #define __LPC32XX_COMMON_H
 
+#include <mach/board.h>
 #include <linux/platform_device.h>
 
 /*
@@ -31,6 +32,8 @@ extern struct platform_device lpc32xx_i2c2_device;
 extern struct platform_device lpc32xx_tsc_device;
 extern struct platform_device lpc32xx_adc_device;
 extern struct platform_device lpc32xx_rtc_device;
+extern struct platform_device lpc32xx_ohci_device;
+extern struct platform_device lpc32xx_net_device;
 
 /*
  * Other arch specific structures and functions
@@ -67,7 +70,6 @@ extern u32 clk_get_pclk_div(void);
 extern void lpc32xx_get_uid(u32 devid[4]);
 
 extern u32 lpc32xx_return_iram_size(void);
-
 /*
  * Pointers used for sizing and copying suspend function data
  */
diff --git a/arch/arm/mach-lpc32xx/include/mach/io.h b/arch/arm/mach-lpc32xx/include/mach/board.h
index 9b59ab5cef89..52531ca7bd1d 100644
--- a/arch/arm/mach-lpc32xx/include/mach/io.h
+++ b/arch/arm/mach-lpc32xx/include/mach/board.h
@@ -1,5 +1,5 @@
 /*
- * arch/arm/mach-lpc32xx/include/mach/io.h
+ * arm/arch/mach-lpc32xx/include/mach/board.h
  *
  * Author: Kevin Wells <kevin.wells@nxp.com>
  *
@@ -16,12 +16,9 @@
  * GNU General Public License for more details.
  */
 
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
+#ifndef __ASM_ARCH_BOARD_H
+#define __ASM_ARCH_BOARD_H
 
-#define IO_SPACE_LIMIT  0xffffffff
+extern u32 lpc32xx_return_iram_size(void);
 
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
+#endif  /* __ASM_ARCH_BOARD_H */
diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c
index c74de01ab5b6..d080cb1123dd 100644
--- a/arch/arm/mach-lpc32xx/irq.c
+++ b/arch/arm/mach-lpc32xx/irq.c
@@ -150,6 +150,10 @@ static const struct lpc32xx_event_info lpc32xx_events[NR_IRQS] = {
                 .event_group = &lpc32xx_event_int_regs,
                 .mask = LPC32XX_CLKPWR_INTSRC_KEY_BIT,
         },
+        [IRQ_LPC32XX_ETHERNET] = {
+                .event_group = &lpc32xx_event_int_regs,
+                .mask = LPC32XX_CLKPWR_INTSRC_MAC_BIT,
+        },
         [IRQ_LPC32XX_USB_OTG_ATX] = {
                 .event_group = &lpc32xx_event_int_regs,
                 .mask = LPC32XX_CLKPWR_INTSRC_USBATXINT_BIT,
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index 0d79a3f8a5e0..7f7401ec7487 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -37,6 +37,7 @@
 
 #include <mach/hardware.h>
 #include <mach/platform.h>
+#include <mach/board.h>
 #include <mach/gpio-lpc32xx.h>
 #include "common.h"
 
@@ -255,6 +256,8 @@ static struct platform_device *phy3250_devs[] __initdata = {
         &lpc32xx_watchdog_device,
         &lpc32xx_gpio_led_device,
         &lpc32xx_adc_device,
+        &lpc32xx_ohci_device,
+        &lpc32xx_net_device,
 };
 
 static struct amba_device *amba_devs[] __initdata = {
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 3588a5584153..bf5d8e195c3e 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -23,6 +23,7 @@
 #include <mach/addr-map.h>
 #include <mach/mfp-pxa168.h>
 #include <mach/pxa168.h>
+#include <mach/irqs.h>
 #include <video/pxa168fb.h>
 #include <linux/input.h>
 #include <plat/pxa27x_keypad.h>
@@ -239,7 +240,7 @@ static void __init common_init(void)
 
 MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
         .map_io         = mmp_map_io,
-        .nr_irqs        = IRQ_BOARD_START,
+        .nr_irqs        = MMP_NR_IRQS,
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = common_init,
@@ -248,7 +249,7 @@ MACHINE_END
 
 MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
         .map_io         = mmp_map_io,
-        .nr_irqs        = IRQ_BOARD_START,
+        .nr_irqs        = MMP_NR_IRQS,
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = common_init,
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
index b148a9dc5a44..603542ae6fbd 100644
--- a/arch/arm/mach-mmp/avengers_lite.c
+++ b/arch/arm/mach-mmp/avengers_lite.c
@@ -43,6 +43,7 @@ static void __init avengers_lite_init(void)
 
 MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
         .map_io         = mmp_map_io,
+        .nr_irqs        = MMP_NR_IRQS,
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = avengers_lite_init,
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
index d839fe6421e6..5cb769cd26d9 100644
--- a/arch/arm/mach-mmp/brownstone.c
+++ b/arch/arm/mach-mmp/brownstone.c
@@ -28,7 +28,7 @@
 
 #include "common.h"
 
-#define BROWNSTONE_NR_IRQS      (IRQ_BOARD_START + 40)
+#define BROWNSTONE_NR_IRQS      (MMP_NR_IRQS + 40)
 
 #define GPIO_5V_ENABLE          (89)
 
@@ -158,7 +158,7 @@ static struct platform_device brownstone_v_5vp_device = {
 };
 
 static struct max8925_platform_data brownstone_max8925_info = {
-        .irq_base               = IRQ_BOARD_START,
+        .irq_base               = MMP_NR_IRQS,
 };
 
 static struct i2c_board_info brownstone_twsi1_info[] = {
diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c
index 062b5b93c50e..9292b7966e3b 100644
--- a/arch/arm/mach-mmp/common.c
+++ b/arch/arm/mach-mmp/common.c
@@ -14,6 +14,7 @@
 
 #include <asm/page.h>
 #include <asm/mach/map.h>
+#include <asm/system_misc.h>
 #include <mach/addr-map.h>
 #include <mach/cputype.h>
 
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index 2ee8cd7829dd..8059cc0905c6 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -23,10 +23,11 @@
 #include <mach/addr-map.h>
 #include <mach/mfp-mmp2.h>
 #include <mach/mmp2.h>
+#include <mach/irqs.h>
 
 #include "common.h"
 
-#define FLINT_NR_IRQS   (IRQ_BOARD_START + 48)
+#define FLINT_NR_IRQS   (MMP_NR_IRQS + 48)
 
 static unsigned long flint_pin_config[] __initdata = {
         /* UART1 */
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 87765467de63..f516e74ce0d5 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -191,7 +191,7 @@ static void __init gplugd_init(void)
 
 MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
         .map_io         = mmp_map_io,
-        .nr_irqs        = IRQ_BOARD_START,
+        .nr_irqs        = MMP_NR_IRQS,
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = gplugd_init,
diff --git a/arch/arm/mach-mmp/include/mach/addr-map.h b/arch/arm/mach-mmp/include/mach/addr-map.h
index 3e404acd6ff4..b1ece08174e8 100644
--- a/arch/arm/mach-mmp/include/mach/addr-map.h
+++ b/arch/arm/mach-mmp/include/mach/addr-map.h
@@ -11,12 +11,6 @@
 #ifndef __ASM_MACH_ADDR_MAP_H
 #define __ASM_MACH_ADDR_MAP_H
 
-#ifndef __ASSEMBLER__
-#define IOMEM(x)        ((void __iomem *)(x))
-#else
-#define IOMEM(x)        (x)
-#endif
-
 /* APB - Application Subsystem Peripheral Bus
  *
  * NOTE: the DMA controller registers are actually on the AXI fabric #1
diff --git a/arch/arm/mach-mmp/include/mach/io.h b/arch/arm/mach-mmp/include/mach/io.h
deleted file mode 100644
index e7adf3d012c1..000000000000
--- a/arch/arm/mach-mmp/include/mach/io.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * linux/arch/arm/mach-mmp/include/mach/io.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_MACH_IO_H
-#define __ASM_MACH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We don't actually have real ISA nor PCI buses, but there is so many
- * drivers out there that might just work if we fake them...
- */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif /* __ASM_MACH_IO_H */
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
index 34635a0bbb59..d0e746626a3d 100644
--- a/arch/arm/mach-mmp/include/mach/irqs.h
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -223,7 +223,6 @@
 #define MMP_GPIO_TO_IRQ(gpio)           (IRQ_GPIO_START + (gpio))
 
 #define IRQ_BOARD_START                 (IRQ_GPIO_START + MMP_NR_BUILTIN_GPIO)
-
-#define NR_IRQS                         (IRQ_BOARD_START)
+#define MMP_NR_IRQS                     IRQ_BOARD_START
 
 #endif /* __ASM_MACH_IRQS_H */
diff --git a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c
index d21c5441a3d0..7895d277421e 100644
--- a/arch/arm/mach-mmp/irq-mmp2.c
+++ b/arch/arm/mach-mmp/irq-mmp2.c
@@ -15,6 +15,7 @@
 #include <linux/irq.h>
 #include <linux/io.h>
 
+#include <mach/irqs.h>
 #include <mach/regs-icu.h>
 #include <mach/mmp2.h>
 
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
index 96cf5c8fe47d..ff73249884d0 100644
--- a/arch/arm/mach-mmp/jasper.c
+++ b/arch/arm/mach-mmp/jasper.c
@@ -19,6 +19,7 @@
 #include <linux/mfd/max8925.h>
 #include <linux/interrupt.h>
 
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <mach/addr-map.h>
@@ -27,7 +28,7 @@
 
 #include "common.h"
 
-#define JASPER_NR_IRQS          (IRQ_BOARD_START + 48)
+#define JASPER_NR_IRQS          (MMP_NR_IRQS + 48)
 
 static unsigned long jasper_pin_config[] __initdata = {
         /* UART1 */
@@ -135,7 +136,7 @@ static struct max8925_power_pdata jasper_power_data = {
 static struct max8925_platform_data jasper_max8925_info = {
         .backlight              = &jasper_backlight_data,
         .power                  = &jasper_power_data,
-        .irq_base               = IRQ_BOARD_START,
+        .irq_base               = MMP_NR_IRQS,
 };
 
 static struct i2c_board_info jasper_twsi1_info[] = {
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index f7d59c03fc67..b24d2c32cba9 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -16,6 +16,7 @@
 #include <linux/platform_device.h>
 
 #include <asm/mach/time.h>
+#include <asm/system_misc.h>
 #include <mach/addr-map.h>
 #include <mach/cputype.h>
 #include <mach/regs-apbc.h>
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index bc97170125bf..b28f9084dfff 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -101,6 +101,7 @@ static void __init tavorevb_init(void)
 
 MACHINE_START(TAVOREVB, "PXA910 Evaluation Board (aka TavorEVB)")
         .map_io         = mmp_map_io,
+        .nr_irqs        = MMP_NR_IRQS,
         .init_irq       = pxa910_init_irq,
         .timer          = &pxa910_timer,
         .init_machine   = tavorevb_init,
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c
index 0523e422990e..42bef6674ecf 100644
--- a/arch/arm/mach-mmp/teton_bga.c
+++ b/arch/arm/mach-mmp/teton_bga.c
@@ -26,6 +26,7 @@
 #include <mach/mfp-pxa168.h>
 #include <mach/pxa168.h>
 #include <mach/teton_bga.h>
+#include <mach/irqs.h>
 
 #include "common.h"
 
@@ -83,7 +84,7 @@ static void __init teton_bga_init(void)
 
 MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform")
         .map_io         = mmp_map_io,
-        .nr_irqs        = IRQ_BOARD_START,
+        .nr_irqs        = MMP_NR_IRQS,
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = teton_bga_init,
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index e72c709da44f..3fc9ed21f97d 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -38,7 +38,7 @@
  * 16 board interrupts -- PCA9575 GPIO expander
  * 24 board interrupts -- 88PM860x PMIC
  */
-#define TTCDKB_NR_IRQS          (IRQ_BOARD_START + 16 + 16 + 24)
+#define TTCDKB_NR_IRQS          (MMP_NR_IRQS + 16 + 16 + 24)
 
 static unsigned long ttc_dkb_pin_config[] __initdata = {
         /* UART2 */
@@ -131,7 +131,7 @@ static struct platform_device *ttc_dkb_devices[] = {
 static struct pca953x_platform_data max7312_data[] = {
         {
                 .gpio_base      = TTCDKB_GPIO_EXT0(0),
-                .irq_base       = IRQ_BOARD_START,
+                .irq_base       = MMP_NR_IRQS,
         },
 };
 
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index a60ab6d04ec5..3698a370d636 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -68,6 +68,11 @@ static struct platform_device *devices[] __initdata = {
 
 extern struct sys_timer msm_timer;
 
+static void __init halibut_init_early(void)
+{
+        arch_ioremap_caller = __msm_ioremap_caller;
+}
+
 static void __init halibut_init_irq(void)
 {
         msm_init_irq();
@@ -96,6 +101,7 @@ MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)")
         .atag_offset    = 0x100,
         .fixup          = halibut_fixup,
         .map_io         = halibut_map_io,
+        .init_early     = halibut_init_early,
         .init_irq       = halibut_init_irq,
         .init_machine   = halibut_init,
         .timer          = &msm_timer,
diff --git a/arch/arm/mach-msm/board-sapphire.c b/arch/arm/mach-msm/board-sapphire.c
index 97b8191d9d38..4a8ea0d40b6f 100644
--- a/arch/arm/mach-msm/board-sapphire.c
+++ b/arch/arm/mach-msm/board-sapphire.c
@@ -27,7 +27,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/flash.h>
-#include <asm/system.h>
 #include <mach/system.h>
 #include <mach/vreg.h>
 #include <mach/board.h>
diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c
index 6b9b227c87c5..5414f76ec0a9 100644
--- a/arch/arm/mach-msm/board-trout.c
+++ b/arch/arm/mach-msm/board-trout.c
@@ -43,6 +43,11 @@ static struct platform_device *devices[] __initdata = {
 
 extern struct sys_timer msm_timer;
 
+static void __init trout_init_early(void)
+{
+        arch_ioremap_caller = __msm_ioremap_caller;
+}
+
 static void __init trout_init_irq(void)
 {
         msm_init_irq();
@@ -96,6 +101,7 @@ MACHINE_START(TROUT, "HTC Dream")
         .atag_offset    = 0x100,
         .fixup          = trout_fixup,
         .map_io         = trout_map_io,
+        .init_early     = trout_init_early,
         .init_irq       = trout_init_irq,
         .init_machine   = trout_init,
         .timer          = &msm_timer,
diff --git a/arch/arm/mach-msm/include/mach/io.h b/arch/arm/mach-msm/include/mach/io.h
deleted file mode 100644
index dc1b928745e9..000000000000
--- a/arch/arm/mach-msm/include/mach/io.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/* arch/arm/mach-msm/include/mach/io.h
- *
- * Copyright (C) 2007 Google, Inc.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __arch_ioremap __msm_ioremap
-#define __arch_iounmap __iounmap
-
-void __iomem *__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype);
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-void msm_map_qsd8x50_io(void);
-void msm_map_msm7x30_io(void);
-void msm_map_msm8x60_io(void);
-void msm_map_msm8960_io(void);
-
-extern unsigned int msm_shared_ram_phys;
-
-#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
index 8af46123dab6..6c4046c21296 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
@@ -38,12 +38,6 @@
  *
  */
 
-#ifdef __ASSEMBLY__
-#define IOMEM(x)        x
-#else
-#define IOMEM(x)        ((void __force __iomem *)(x))
-#endif
-
 #define MSM_VIC_BASE          IOMEM(0xE0000000)
 #define MSM_VIC_PHYS          0xC0000000
 #define MSM_VIC_SIZE          SZ_4K
@@ -111,5 +105,11 @@
 #define MSM_AD5_PHYS          0xAC000000
 #define MSM_AD5_SIZE          (SZ_1M*13)
 
+#ifndef __ASSEMBLY__
+
+extern void __iomem *__msm_ioremap_caller(unsigned long phys_addr, size_t size,
+                                          unsigned int mtype, void *caller);
+
+#endif
 
 #endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
index 198202c267c8..f944fe65a657 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
@@ -100,4 +100,8 @@
 #define MSM_HSUSB_PHYS        0xA3600000
 #define MSM_HSUSB_SIZE        SZ_1K
 
+#ifndef __ASSEMBLY__
+extern void msm_map_msm7x30_io(void);
+#endif
+
 #endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
index 800b55767e6b..a1752c0284fc 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
@@ -50,4 +50,8 @@
 #define MSM_DEBUG_UART_PHYS     0x16440000
 #endif
 
+#ifndef __ASSEMBLY__
+extern void msm_map_msm8960_io(void);
+#endif
+
 #endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
index 0faa894729b7..da77cc1d545d 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
@@ -122,4 +122,8 @@
 #define MSM_SDC4_PHYS          0xA0600000
 #define MSM_SDC4_SIZE          SZ_4K
 
+#ifndef __ASSEMBLY__
+extern void msm_map_qsd8x50_io(void);
+#endif
+
 #endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
index 54e12caa8d86..5aed57dc808c 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
@@ -67,4 +67,8 @@
 #define MSM_DEBUG_UART_PHYS     0x19C40000
 #endif
 
+#ifndef __ASSEMBLY__
+extern void msm_map_msm8x60_io(void);
+#endif
+
 #endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index 90682f4599d3..00afdfb8c38f 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -37,12 +37,6 @@
  *
  */
 
-#ifdef __ASSEMBLY__
-#define IOMEM(x)        x
-#else
-#define IOMEM(x)        ((void __force __iomem *)(x))
-#endif
-
 #if defined(CONFIG_ARCH_MSM7X30)
 #include "msm_iomap-7x30.h"
 #elif defined(CONFIG_ARCH_QSD8X50)
diff --git a/arch/arm/mach-msm/include/mach/uncompress.h b/arch/arm/mach-msm/include/mach/uncompress.h
index 169a84007456..c14011fe832d 100644
--- a/arch/arm/mach-msm/include/mach/uncompress.h
+++ b/arch/arm/mach-msm/include/mach/uncompress.h
@@ -16,6 +16,7 @@
 #ifndef __ASM_ARCH_MSM_UNCOMPRESS_H
 #define __ASM_ARCH_MSM_UNCOMPRESS_H
 
+#include <asm/barrier.h>
 #include <asm/processor.h>
 #include <mach/msm_iomap.h>
 
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 578b04e42deb..a1e7b1168850 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -172,8 +172,8 @@ void __init msm_map_msm7x30_io(void)
 }
 #endif /* CONFIG_ARCH_MSM7X30 */
 
-void __iomem *
-__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
+void __iomem *__msm_ioremap_caller(unsigned long phys_addr, size_t size,
+                                   unsigned int mtype, void *caller)
 {
         if (mtype == MT_DEVICE) {
                 /* The peripherals in the 88000000 - D0000000 range
@@ -184,7 +184,5 @@ __msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
                         mtype = MT_DEVICE_NONSHARED;
         }
 
-        return __arm_ioremap_caller(phys_addr, size, mtype,
-                __builtin_return_address(0));
+        return __arm_ioremap_caller(phys_addr, size, mtype, caller);
 }
-EXPORT_SYMBOL(__msm_ioremap);
diff --git a/arch/arm/mach-msm/smd_debug.c b/arch/arm/mach-msm/smd_debug.c
index 0c56a5aaf588..c56df9e932ae 100644
--- a/arch/arm/mach-msm/smd_debug.c
+++ b/arch/arm/mach-msm/smd_debug.c
@@ -203,15 +203,9 @@ static ssize_t debug_read(struct file *file, char __user *buf,
         return simple_read_from_buffer(buf, count, ppos, debug_buffer, bsize);
 }
 
-static int debug_open(struct inode *inode, struct file *file)
-{
-        file->private_data = inode->i_private;
-        return 0;
-}
-
 static const struct file_operations debug_ops = {
         .read = debug_read,
-        .open = debug_open,
+        .open = simple_open,
         .llseek = default_llseek,
 };
 
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 75f4be40b3e5..812808254936 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -24,6 +24,7 @@
 #include <asm/mach/time.h>
 #include <asm/hardware/gic.h>
 #include <asm/localtimer.h>
+#include <asm/sched_clock.h>
 
 #include <mach/msm_iomap.h>
 #include <mach/cpu.h>
@@ -105,12 +106,12 @@ static union {
 
 static void __iomem *source_base;
 
-static cycle_t msm_read_timer_count(struct clocksource *cs)
+static notrace cycle_t msm_read_timer_count(struct clocksource *cs)
 {
         return readl_relaxed(source_base + TIMER_COUNT_VAL);
 }
 
-static cycle_t msm_read_timer_count_shift(struct clocksource *cs)
+static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs)
 {
         /*
          * Shift timer count down by a constant due to unreliable lower bits
@@ -166,6 +167,11 @@ static struct local_timer_ops msm_local_timer_ops __cpuinitdata = {
 };
 #endif /* CONFIG_LOCAL_TIMERS */
 
+static notrace u32 msm_sched_clock_read(void)
+{
+        return msm_clocksource.read(&msm_clocksource);
+}
+
 static void __init msm_timer_init(void)
 {
         struct clock_event_device *ce = &msm_clockevent;
@@ -232,6 +238,8 @@ err:
         res = clocksource_register_hz(cs, dgt_hz);
         if (res)
                 pr_err("clocksource_register failed\n");
+        setup_sched_clock(msm_sched_clock_read,
+                        cpu_is_msm7x01() ? 32 - MSM_DGT_SHIFT : 32, dgt_hz);
 }
 
 struct sys_timer msm_timer = {
diff --git a/arch/arm/mach-mv78xx0/include/mach/io.h b/arch/arm/mach-mv78xx0/include/mach/io.h
index 450e0e1ad092..c7d9d00d8fc1 100644
--- a/arch/arm/mach-mv78xx0/include/mach/io.h
+++ b/arch/arm/mach-mv78xx0/include/mach/io.h
@@ -20,7 +20,5 @@ static inline void __iomem *__io(unsigned long addr)
 }
 
 #define __io(a)                 __io(a)
-#define __mem_pci(a)            (a)
-
 
 #endif
diff --git a/arch/arm/mach-mxs/include/mach/dma.h b/arch/arm/mach-mxs/include/mach/dma.h
deleted file mode 100644
index 203d7c4a3e11..000000000000
--- a/arch/arm/mach-mxs/include/mach/dma.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __MACH_MXS_DMA_H__
-#define __MACH_MXS_DMA_H__
-
-#include <linux/dmaengine.h>
-
-struct mxs_dma_data {
-        int chan_irq;
-};
-
-static inline int mxs_dma_is_apbh(struct dma_chan *chan)
-{
-        return !strcmp(dev_name(chan->device->dev), "mxs-dma-apbh");
-}
-
-static inline int mxs_dma_is_apbx(struct dma_chan *chan)
-{
-        return !strcmp(dev_name(chan->device->dev), "mxs-dma-apbx");
-}
-
-#endif /* __MACH_MXS_DMA_H__ */
diff --git a/arch/arm/mach-mxs/include/mach/hardware.h b/arch/arm/mach-mxs/include/mach/hardware.h
index 53e89a09bf0d..4c0e8a64d8c7 100644
--- a/arch/arm/mach-mxs/include/mach/hardware.h
+++ b/arch/arm/mach-mxs/include/mach/hardware.h
@@ -20,10 +20,4 @@
 #ifndef __MACH_MXS_HARDWARE_H__
 #define __MACH_MXS_HARDWARE_H__
 
-#ifdef __ASSEMBLER__
-#define IOMEM(addr)     (addr)
-#else
-#define IOMEM(addr)     ((void __force __iomem *)(addr))
-#endif
-
 #endif /* __MACH_MXS_HARDWARE_H__ */
diff --git a/arch/arm/mach-mxs/include/mach/io.h b/arch/arm/mach-mxs/include/mach/io.h
deleted file mode 100644
index 289b7227e072..000000000000
--- a/arch/arm/mach-mxs/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- *  Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- */
-
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __MACH_MXS_IO_H__
-#define __MACH_MXS_IO_H__
-
-/* Allow IO space to be anywhere in the memory */
-#define IO_SPACE_LIMIT 0xffffffff
-
-/* io address mapping macro */
-#define __io(a)         __typesafe_io(a)
-
-#define __mem_pci(a)    (a)
-
-#endif /* __MACH_MXS_IO_H__ */
diff --git a/arch/arm/mach-mxs/system.c b/arch/arm/mach-mxs/system.c
index 7aa5ac5d78bf..80ac1fca8a00 100644
--- a/arch/arm/mach-mxs/system.c
+++ b/arch/arm/mach-mxs/system.c
@@ -25,7 +25,7 @@
 #include <linux/module.h>
 
 #include <asm/proc-fns.h>
-#include <asm/system.h>
+#include <asm/system_misc.h>
 
 #include <mach/mxs.h>
 #include <mach/common.h>
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index 59e67979f197..aa627465d914 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -168,7 +168,7 @@ void __init netx_init_irq(void)
 {
         int irq;
 
-        vic_init(__io(io_p2v(NETX_PA_VIC)), 0, ~0, 0);
+        vic_init(io_p2v(NETX_PA_VIC), 0, ~0, 0);
 
         for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
                 irq_set_chip_and_handler(irq, &netx_hif_chip,
diff --git a/arch/arm/mach-netx/include/mach/hardware.h b/arch/arm/mach-netx/include/mach/hardware.h
index 517a2bd37842..b661af2f2145 100644
--- a/arch/arm/mach-netx/include/mach/hardware.h
+++ b/arch/arm/mach-netx/include/mach/hardware.h
@@ -33,7 +33,7 @@
 #define XMAC_MEM_SIZE 0x1000
 #define SRAM_MEM_SIZE 0x8000
 
-#define io_p2v(x) ((x) - NETX_IO_PHYS + NETX_IO_VIRT)
+#define io_p2v(x) IOMEM((x) - NETX_IO_PHYS + NETX_IO_VIRT)
 #define io_v2p(x) ((x) - NETX_IO_VIRT + NETX_IO_PHYS)
 
 #endif
diff --git a/arch/arm/mach-netx/include/mach/io.h b/arch/arm/mach-netx/include/mach/io.h
deleted file mode 100644
index c3921cb3b6a6..000000000000
--- a/arch/arm/mach-netx/include/mach/io.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- *  arch/arm/mach-netx/include/mach/io.h
- *
- * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)            (a)
-
-#endif
diff --git a/arch/arm/mach-netx/include/mach/netx-regs.h b/arch/arm/mach-netx/include/mach/netx-regs.h
index 5a03e7ccb01a..fdde22b58ac3 100644
--- a/arch/arm/mach-netx/include/mach/netx-regs.h
+++ b/arch/arm/mach-netx/include/mach/netx-regs.h
@@ -115,7 +115,7 @@
  *********************************/
 
 /* Registers */
-#define NETX_SYSTEM_REG(ofs)            __io(NETX_VA_SYSTEM + (ofs))
+#define NETX_SYSTEM_REG(ofs)            IOMEM(NETX_VA_SYSTEM + (ofs))
 #define NETX_SYSTEM_BOO_SR          NETX_SYSTEM_REG(0x00)
 #define NETX_SYSTEM_IOC_CR          NETX_SYSTEM_REG(0x04)
 #define NETX_SYSTEM_IOC_MR          NETX_SYSTEM_REG(0x08)
@@ -185,7 +185,7 @@
  *******************************/
 
 /* Registers */
-#define NETX_GPIO_REG(ofs)                     __io(NETX_VA_GPIO + (ofs))
+#define NETX_GPIO_REG(ofs)                     IOMEM(NETX_VA_GPIO + (ofs))
 #define NETX_GPIO_CFG(gpio)                NETX_GPIO_REG(0x0  + ((gpio)<<2))
 #define NETX_GPIO_THRESHOLD_CAPTURE(gpio)  NETX_GPIO_REG(0x40 + ((gpio)<<2))
 #define NETX_GPIO_COUNTER_CTRL(counter)    NETX_GPIO_REG(0x80 + ((counter)<<2))
@@ -230,7 +230,7 @@
  *******************************/
 
 /* Registers */
-#define NETX_PIO_REG(ofs)        __io(NETX_VA_PIO + (ofs))
+#define NETX_PIO_REG(ofs)        IOMEM(NETX_VA_PIO + (ofs))
 #define NETX_PIO_INPIO       NETX_PIO_REG(0x0)
 #define NETX_PIO_OUTPIO      NETX_PIO_REG(0x4)
 #define NETX_PIO_OEPIO       NETX_PIO_REG(0x8)
@@ -240,7 +240,7 @@
  *******************************/
 
 /* Registers */
-#define NETX_MIIMU           __io(NETX_VA_MIIMU)
+#define NETX_MIIMU           IOMEM(NETX_VA_MIIMU)
 
 /* Bits */
 #define MIIMU_SNRDY        (1<<0)
@@ -317,7 +317,7 @@
  *******************************/
 
 /* Registers */
-#define NETX_PFIFO_REG(ofs)               __io(NETX_VA_PFIFO + (ofs))
+#define NETX_PFIFO_REG(ofs)               IOMEM(NETX_VA_PFIFO + (ofs))
 #define NETX_PFIFO_BASE(pfifo)        NETX_PFIFO_REG(0x00 + ((pfifo)<<2))
 #define NETX_PFIFO_BORDER_BASE(pfifo) NETX_PFIFO_REG(0x80 + ((pfifo)<<2))
 #define NETX_PFIFO_RESET              NETX_PFIFO_REG(0x100)
@@ -334,7 +334,7 @@
  *******************************/
 
 /* Registers */
-#define NETX_MEMCR_REG(ofs)               __io(NETX_VA_MEMCR + (ofs))
+#define NETX_MEMCR_REG(ofs)               IOMEM(NETX_VA_MEMCR + (ofs))
 #define NETX_MEMCR_SRAM_CTRL(cs)      NETX_MEMCR_REG(0x0 + 4 * (cs)) /* SRAM for CS 0..2 */
 #define NETX_MEMCR_SDRAM_CFG_CTRL     NETX_MEMCR_REG(0x40)
 #define NETX_MEMCR_SDRAM_TIMING_CTRL  NETX_MEMCR_REG(0x44)
@@ -355,7 +355,7 @@
  *******************************/
 
 /* Registers */
-#define NETX_DPMAS_REG(ofs)               __io(NETX_VA_DPMAS + (ofs))
+#define NETX_DPMAS_REG(ofs)               IOMEM(NETX_VA_DPMAS + (ofs))
 #define NETX_DPMAS_SYS_STAT           NETX_DPMAS_REG(0x4d8)
 #define NETX_DPMAS_INT_STAT           NETX_DPMAS_REG(0x4e0)
 #define NETX_DPMAS_INT_EN             NETX_DPMAS_REG(0x4f0)
@@ -425,7 +425,7 @@
 /*******************************
  * I2C                         *
  *******************************/
-#define NETX_I2C_REG(ofs)       __io(NETX_VA_I2C, (ofs))
+#define NETX_I2C_REG(ofs)       IOMEM(NETX_VA_I2C, (ofs))
 #define NETX_I2C_CTRL   NETX_I2C_REG(0x0)
 #define NETX_I2C_DATA   NETX_I2C_REG(0x4)
 
diff --git a/arch/arm/mach-nomadik/include/mach/io.h b/arch/arm/mach-nomadik/include/mach/io.h
deleted file mode 100644
index 2e1eca1b8243..000000000000
--- a/arch/arm/mach-nomadik/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * arch/arm/mach-nomadik/include/mach/io.h   (copied from mach-sa1100)
- *
- * Copyright (C) 1997-1999 Russell King
- *
- * Modifications:
- *  06-12-1997  RMK     Created.
- *  07-04-1999  RMK     Major cleanup
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We don't actually have real ISA nor PCI buses, but there is so many
- * drivers out there that might just work if we fake them...
- */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
index 399c4c49722f..a051cb8ae57f 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq-handler.S
+++ b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
@@ -14,6 +14,7 @@
  */
 
 #include <linux/linkage.h>
+#include <asm/assembler.h>
 
 #include <plat/board-ams-delta.h>
 
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index c3068622fdcb..553a2e535764 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -245,8 +245,6 @@ static struct resource h2_smc91x_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = OMAP_GPIO_IRQ(0),
-                .end    = OMAP_GPIO_IRQ(0),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
         },
 };
@@ -359,11 +357,9 @@ static struct tps65010_board tps_board = {
 static struct i2c_board_info __initdata h2_i2c_board_info[] = {
         {
                 I2C_BOARD_INFO("tps65010", 0x48),
-                .irq            = OMAP_GPIO_IRQ(58),
                 .platform_data  = &tps_board,
         }, {
                 I2C_BOARD_INFO("isp1301_omap", 0x2d),
-                .irq            = OMAP_GPIO_IRQ(2),
         },
 };
 
@@ -428,8 +424,12 @@ static void __init h2_init(void)
         omap_cfg_reg(E19_1610_KBR4);
         omap_cfg_reg(N19_1610_KBR5);
 
+        h2_smc91x_resources[1].start = gpio_to_irq(0);
+        h2_smc91x_resources[1].end = gpio_to_irq(0);
         platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
         omap_serial_init();
+        h2_i2c_board_info[0].irq = gpio_to_irq(58);
+        h2_i2c_board_info[1].irq = gpio_to_irq(2);
         omap_register_i2c_bus(1, 100, h2_i2c_board_info,
                               ARRAY_SIZE(h2_i2c_board_info));
         omap1_usb_init(&h2_usb_config);
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index 64b8584f64ce..4c19f4c06851 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -247,8 +247,6 @@ static struct resource smc91x_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = OMAP_GPIO_IRQ(40),
-                .end    = OMAP_GPIO_IRQ(40),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
         },
 };
@@ -338,7 +336,6 @@ static struct spi_board_info h3_spi_board_info[] __initdata = {
                 .modalias       = "tsc2101",
                 .bus_num        = 2,
                 .chip_select    = 0,
-                .irq            = OMAP_GPIO_IRQ(H3_TS_GPIO),
                 .max_speed_hz   = 16000000,
                 /* .platform_data       = &tsc_platform_data, */
         },
@@ -374,11 +371,9 @@ static struct omap_lcd_config h3_lcd_config __initdata = {
 static struct i2c_board_info __initdata h3_i2c_board_info[] = {
        {
                 I2C_BOARD_INFO("tps65013", 0x48),
-               /* .irq         = OMAP_GPIO_IRQ(??), */
        },
         {
                 I2C_BOARD_INFO("isp1301_omap", 0x2d),
-                .irq            = OMAP_GPIO_IRQ(14),
         },
 };
 
@@ -420,10 +415,14 @@ static void __init h3_init(void)
         omap_cfg_reg(E19_1610_KBR4);
         omap_cfg_reg(N19_1610_KBR5);
 
+        smc91x_resources[1].start = gpio_to_irq(40);
+        smc91x_resources[1].end = gpio_to_irq(40);
         platform_add_devices(devices, ARRAY_SIZE(devices));
+        h3_spi_board_info[0].irq = gpio_to_irq(H3_TS_GPIO);
         spi_register_board_info(h3_spi_board_info,
                                 ARRAY_SIZE(h3_spi_board_info));
         omap_serial_init();
+        h3_i2c_board_info[1].irq = gpio_to_irq(14);
         omap_register_i2c_bus(1, 100, h3_i2c_board_info,
                               ARRAY_SIZE(h3_i2c_board_info));
         omap1_usb_init(&h3_usb_config);
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index 827d83a96af8..60c06ee23855 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -324,8 +324,6 @@ static struct platform_device gpio_leds_device = {
 
 static struct resource htcpld_resources[] = {
         [0] = {
-                .start  = OMAP_GPIO_IRQ(HTCHERALD_GIRQ_BTNS),
-                .end    = OMAP_GPIO_IRQ(HTCHERALD_GIRQ_BTNS),
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -450,7 +448,6 @@ static struct spi_board_info __initdata htcherald_spi_board_info[] = {
         {
                 .modalias               = "ads7846",
                 .platform_data          = &htcherald_ts_platform_data,
-                .irq                    = OMAP_GPIO_IRQ(HTCHERALD_GPIO_TS),
                 .max_speed_hz           = 2500000,
                 .bus_num                = 2,
                 .chip_select            = 1,
@@ -576,6 +573,8 @@ static void __init htcherald_init(void)
         printk(KERN_INFO "HTC Herald init.\n");
 
         /* Do board initialization before we register all the devices */
+        htcpld_resources[0].start = gpio_to_irq(HTCHERALD_GIRQ_BTNS);
+        htcpld_resources[0].end = gpio_to_irq(HTCHERALD_GIRQ_BTNS);
         platform_add_devices(devices, ARRAY_SIZE(devices));
 
         htcherald_disable_watchdog();
@@ -583,6 +582,7 @@ static void __init htcherald_init(void)
         htcherald_usb_enable();
         omap1_usb_init(&htcherald_usb_config);
 
+        htcherald_spi_board_info[0].irq = gpio_to_irq(HTCHERALD_GPIO_TS);
         spi_register_board_info(htcherald_spi_board_info,
                 ARRAY_SIZE(htcherald_spi_board_info));
 
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 61219182d16a..67d7fd57a692 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -248,8 +248,6 @@ static struct resource innovator1610_smc91x_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = OMAP_GPIO_IRQ(0),
-                .end    = OMAP_GPIO_IRQ(0),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
         },
 };
@@ -409,6 +407,8 @@ static void __init innovator_init(void)
 #endif
 #ifdef CONFIG_ARCH_OMAP16XX
         if (!cpu_is_omap1510()) {
+                innovator1610_smc91x_resources[1].start = gpio_to_irq(0);
+                innovator1610_smc91x_resources[1].end = gpio_to_irq(0);
                 platform_add_devices(innovator1610_devices, ARRAY_SIZE(innovator1610_devices));
         }
 #endif
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index fe95ec5f6f03..d21dcc2fbc5a 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -147,7 +147,6 @@ static struct spi_board_info nokia770_spi_board_info[] __initdata = {
                 .bus_num        = 2,
                 .chip_select    = 0,
                 .max_speed_hz   = 2500000,
-                .irq            = OMAP_GPIO_IRQ(15),
                 .platform_data  = &nokia770_ads7846_platform_data,
         },
 };
@@ -237,6 +236,7 @@ static void __init omap_nokia770_init(void)
         omap_writew((omap_readw(0xfffb5004) & ~2), 0xfffb5004);
 
         platform_add_devices(nokia770_devices, ARRAY_SIZE(nokia770_devices));
+        nokia770_spi_board_info[1].irq = gpio_to_irq(15);
         spi_register_board_info(nokia770_spi_board_info,
                                 ARRAY_SIZE(nokia770_spi_board_info));
         omap_serial_init();
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 1fe347396f4d..a5f85dda3f69 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -129,8 +129,6 @@ static struct resource osk5912_smc91x_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = OMAP_GPIO_IRQ(0),
-                .end    = OMAP_GPIO_IRQ(0),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
         },
 };
@@ -147,8 +145,6 @@ static struct platform_device osk5912_smc91x_device = {
 
 static struct resource osk5912_cf_resources[] = {
         [0] = {
-                .start  = OMAP_GPIO_IRQ(62),
-                .end    = OMAP_GPIO_IRQ(62),
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -240,7 +236,6 @@ static struct tps65010_board tps_board = {
 static struct i2c_board_info __initdata osk_i2c_board_info[] = {
         {
                 I2C_BOARD_INFO("tps65010", 0x48),
-                .irq            = OMAP_GPIO_IRQ(OMAP_MPUIO(1)),
                 .platform_data  = &tps_board,
 
         },
@@ -408,7 +403,6 @@ static struct spi_board_info __initdata mistral_boardinfo[] = { {
         /* MicroWire (bus 2) CS0 has an ads7846e */
         .modalias               = "ads7846",
         .platform_data          = &mistral_ts_info,
-        .irq                    = OMAP_GPIO_IRQ(4),
         .max_speed_hz           = 120000 /* max sample rate at 3V */
                                         * 26 /* command + data + overhead */,
         .bus_num                = 2,
@@ -471,6 +465,7 @@ static void __init osk_mistral_init(void)
         gpio_direction_input(4);
         irq_set_irq_type(gpio_to_irq(4), IRQ_TYPE_EDGE_FALLING);
 
+        mistral_boardinfo[0].irq = gpio_to_irq(4);
         spi_register_board_info(mistral_boardinfo,
                         ARRAY_SIZE(mistral_boardinfo));
 
@@ -542,6 +537,10 @@ static void __init osk_init(void)
 
         osk_flash_resource.end = osk_flash_resource.start = omap_cs3_phys();
         osk_flash_resource.end += SZ_32M - 1;
+        osk5912_smc91x_resources[1].start = gpio_to_irq(0);
+        osk5912_smc91x_resources[1].end = gpio_to_irq(0);
+        osk5912_cf_resources[0].start = gpio_to_irq(62);
+        osk5912_cf_resources[0].end = gpio_to_irq(62);
         platform_add_devices(osk5912_devices, ARRAY_SIZE(osk5912_devices));
 
         l = omap_readl(USB_TRANSCEIVER_CTRL);
@@ -556,6 +555,7 @@ static void __init osk_init(void)
                 gpio_direction_input(OMAP_MPUIO(1));
 
         omap_serial_init();
+        osk_i2c_board_info[0].irq = gpio_to_irq(OMAP_MPUIO(1));
         omap_register_i2c_bus(1, 400, osk_i2c_board_info,
                               ARRAY_SIZE(osk_i2c_board_info));
         osk_mistral_init();
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 0863d8e2bdf1..a60e6c22f816 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -217,7 +217,6 @@ static struct spi_board_info palmte_spi_info[] __initdata = {
                 .modalias       = "tsc2102",
                 .bus_num        = 2,    /* uWire (officially) */
                 .chip_select    = 0,    /* As opposed to 3 */
-                .irq            = OMAP_GPIO_IRQ(PALMTE_PINTDAV_GPIO),
                 .max_speed_hz   = 8000000,
         },
 };
@@ -251,6 +250,7 @@ static void __init omap_palmte_init(void)
 
         platform_add_devices(palmte_devices, ARRAY_SIZE(palmte_devices));
 
+        palmte_spi_info[0].irq = gpio_to_irq(PALMTE_PINTDAV_GPIO);
         spi_register_board_info(palmte_spi_info, ARRAY_SIZE(palmte_spi_info));
         palmte_misc_gpio_setup();
         omap_serial_init();
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 4ff699c509c0..8d854878547b 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -257,7 +257,6 @@ static struct spi_board_info __initdata palmtt_boardinfo[] = {
                 /* MicroWire (bus 2) CS0 has an ads7846e */
                 .modalias       = "ads7846",
                 .platform_data  = &palmtt_ts_info,
-                .irq            = OMAP_GPIO_IRQ(6),
                 .max_speed_hz   = 120000        /* max sample rate at 3V */
                                         * 26    /* command + data + overhead */,
                 .bus_num        = 2,
@@ -298,6 +297,7 @@ static void __init omap_palmtt_init(void)
 
         platform_add_devices(palmtt_devices, ARRAY_SIZE(palmtt_devices));
 
+        palmtt_boardinfo[0].irq = gpio_to_irq(6);
         spi_register_board_info(palmtt_boardinfo,ARRAY_SIZE(palmtt_boardinfo));
         omap_serial_init();
         omap1_usb_init(&palmtt_usb_config);
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index abcbbd339aeb..a2c5abcd7c84 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -224,7 +224,6 @@ static struct spi_board_info __initdata palmz71_boardinfo[] = { {
         /* MicroWire (bus 2) CS0 has an ads7846e */
         .modalias       = "ads7846",
         .platform_data  = &palmz71_ts_info,
-        .irq            = OMAP_GPIO_IRQ(PALMZ71_PENIRQ_GPIO),
         .max_speed_hz   = 120000        /* max sample rate at 3V */
                                 * 26    /* command + data + overhead */,
         .bus_num        = 2,
@@ -313,6 +312,7 @@ omap_palmz71_init(void)
 
         platform_add_devices(devices, ARRAY_SIZE(devices));
 
+        palmz71_boardinfo[0].irq = gpio_to_irq(PALMZ71_PENIRQ_GPIO);
         spi_register_board_info(palmz71_boardinfo,
                                 ARRAY_SIZE(palmz71_boardinfo));
         omap1_usb_init(&palmz71_usb_config);
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 659d0f75de2c..37232d04233f 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -44,7 +44,6 @@
 static struct plat_serial8250_port voiceblue_ports[] = {
         {
                 .mapbase        = (unsigned long)(OMAP_CS1_PHYS + 0x40000),
-                .irq            = OMAP_GPIO_IRQ(12),
                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
                 .iotype         = UPIO_MEM,
                 .regshift       = 1,
@@ -52,7 +51,6 @@ static struct plat_serial8250_port voiceblue_ports[] = {
         },
         {
                 .mapbase        = (unsigned long)(OMAP_CS1_PHYS + 0x50000),
-                .irq            = OMAP_GPIO_IRQ(13),
                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
                 .iotype         = UPIO_MEM,
                 .regshift       = 1,
@@ -60,7 +58,6 @@ static struct plat_serial8250_port voiceblue_ports[] = {
         },
         {
                 .mapbase        = (unsigned long)(OMAP_CS1_PHYS + 0x60000),
-                .irq            = OMAP_GPIO_IRQ(14),
                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
                 .iotype         = UPIO_MEM,
                 .regshift       = 1,
@@ -68,7 +65,6 @@ static struct plat_serial8250_port voiceblue_ports[] = {
         },
         {
                 .mapbase        = (unsigned long)(OMAP_CS1_PHYS + 0x70000),
-                .irq            = OMAP_GPIO_IRQ(15),
                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
                 .iotype         = UPIO_MEM,
                 .regshift       = 1,
@@ -80,9 +76,6 @@ static struct plat_serial8250_port voiceblue_ports[] = {
 static struct platform_device serial_device = {
         .name                   = "serial8250",
         .id                     = PLAT8250_DEV_PLATFORM1,
-        .dev                    = {
-                .platform_data  = voiceblue_ports,
-        },
 };
 
 static int __init ext_uart_init(void)
@@ -90,6 +83,11 @@ static int __init ext_uart_init(void)
         if (!machine_is_voiceblue())
                 return -ENODEV;
 
+        voiceblue_ports[0].irq = gpio_to_irq(12);
+        voiceblue_ports[1].irq = gpio_to_irq(13);
+        voiceblue_ports[2].irq = gpio_to_irq(14);
+        voiceblue_ports[3].irq = gpio_to_irq(15);
+        serial_device.dev.platform_data = voiceblue_ports;
         return platform_device_register(&serial_device);
 }
 arch_initcall(ext_uart_init);
@@ -128,8 +126,6 @@ static struct resource voiceblue_smc91x_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = OMAP_GPIO_IRQ(8),
-                .end    = OMAP_GPIO_IRQ(8),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
         },
 };
@@ -275,6 +271,8 @@ static void __init voiceblue_init(void)
         irq_set_irq_type(gpio_to_irq(14), IRQ_TYPE_EDGE_RISING);
         irq_set_irq_type(gpio_to_irq(15), IRQ_TYPE_EDGE_RISING);
 
+        voiceblue_smc91x_resources[1].start = gpio_to_irq(8);
+        voiceblue_smc91x_resources[1].end = gpio_to_irq(8);
         platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices));
         omap_board_config = voiceblue_config;
         omap_board_config_size = ARRAY_SIZE(voiceblue_config);
diff --git a/arch/arm/mach-omap1/flash.c b/arch/arm/mach-omap1/flash.c
index f9bf78d4fdfb..401eb3c080c2 100644
--- a/arch/arm/mach-omap1/flash.c
+++ b/arch/arm/mach-omap1/flash.c
@@ -17,20 +17,12 @@
 
 void omap1_set_vpp(struct platform_device *pdev, int enable)
 {
-        static int count;
         u32 l;
 
-        if (enable) {
-                if (count++ == 0) {
-                        l = omap_readl(EMIFS_CONFIG);
-                        l |= OMAP_EMIFS_CONFIG_WP;
-                        omap_writel(l, EMIFS_CONFIG);
-                }
-        } else {
-                if (count && (--count == 0)) {
-                        l = omap_readl(EMIFS_CONFIG);
-                        l &= ~OMAP_EMIFS_CONFIG_WP;
-                        omap_writel(l, EMIFS_CONFIG);
-                }
-        }
+        l = omap_readl(EMIFS_CONFIG);
+        if (enable)
+                l |= OMAP_EMIFS_CONFIG_WP;
+        else
+                l &= ~OMAP_EMIFS_CONFIG_WP;
+        omap_writel(l, EMIFS_CONFIG);
 }
diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c
index f24c1e2c5044..2b28e1da14b0 100644
--- a/arch/arm/mach-omap1/id.c
+++ b/arch/arm/mach-omap1/id.c
@@ -15,6 +15,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <asm/system_info.h>
 
 #include <plat/cpu.h>
 
diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S
index fa0f32a686aa..88f08cab1717 100644
--- a/arch/arm/mach-omap1/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap1/include/mach/entry-macro.S
@@ -11,7 +11,6 @@
  */
 
 #include <mach/hardware.h>
-#include <mach/io.h>
 #include <mach/irqs.h>
 
 #include "../../iomap.h"
diff --git a/arch/arm/mach-omap1/include/mach/io.h b/arch/arm/mach-omap1/include/mach/io.h
index 37b12e1fd022..ce4f8005b26f 100644
--- a/arch/arm/mach-omap1/include/mach/io.h
+++ b/arch/arm/mach-omap1/include/mach/io.h
@@ -41,6 +41,5 @@
  * drivers out there that might just work if we fake them...
  */
 #define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-omap1/iomap.h b/arch/arm/mach-omap1/iomap.h
index d68175761c3d..330c4716b028 100644
--- a/arch/arm/mach-omap1/iomap.h
+++ b/arch/arm/mach-omap1/iomap.h
@@ -22,12 +22,6 @@
  * 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-#ifdef __ASSEMBLER__
-#define IOMEM(x)                (x)
-#else
-#define IOMEM(x)                ((void __force __iomem *)(x))
-#endif
-
 #define OMAP1_IO_OFFSET         0x01000000      /* Virtual IO = 0xfefb0000 */
 #define OMAP1_IO_ADDRESS(pa)    IOMEM((pa) - OMAP1_IO_OFFSET)
 
diff --git a/arch/arm/mach-omap1/leds-h2p2-debug.c b/arch/arm/mach-omap1/leds-h2p2-debug.c
index 4b818eb9f911..f6b14a14a957 100644
--- a/arch/arm/mach-omap1/leds-h2p2-debug.c
+++ b/arch/arm/mach-omap1/leds-h2p2-debug.c
@@ -17,7 +17,6 @@
 
 #include <mach/hardware.h>
 #include <asm/leds.h>
-#include <asm/system.h>
 #include <asm/mach-types.h>
 
 #include <plat/fpga.h>
diff --git a/arch/arm/mach-omap1/leds-innovator.c b/arch/arm/mach-omap1/leds-innovator.c
index 9b99c2894623..3a066ee8d02c 100644
--- a/arch/arm/mach-omap1/leds-innovator.c
+++ b/arch/arm/mach-omap1/leds-innovator.c
@@ -5,7 +5,6 @@
 
 #include <mach/hardware.h>
 #include <asm/leds.h>
-#include <asm/system.h>
 
 #include "leds.h"
 
diff --git a/arch/arm/mach-omap1/leds-osk.c b/arch/arm/mach-omap1/leds-osk.c
index da09f4364979..936ed426b84f 100644
--- a/arch/arm/mach-omap1/leds-osk.c
+++ b/arch/arm/mach-omap1/leds-osk.c
@@ -8,7 +8,6 @@
 
 #include <mach/hardware.h>
 #include <asm/leds.h>
-#include <asm/system.h>
 
 #include "leds.h"
 
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
index 5fdef7a34828..087dba0df47e 100644
--- a/arch/arm/mach-omap1/mux.c
+++ b/arch/arm/mach-omap1/mux.c
@@ -27,7 +27,6 @@
 #include <linux/io.h>
 #include <linux/spinlock.h>
 
-#include <asm/system.h>
 
 #include <plat/mux.h>
 
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index 306beaca14c5..f66c32912b22 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -44,6 +44,7 @@
 #include <linux/io.h>
 #include <linux/atomic.h>
 
+#include <asm/system_misc.h>
 #include <asm/irq.h>
 #include <asm/mach/time.h>
 #include <asm/mach/irq.h>
diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S
index 0779db150da7..0e628743bd03 100644
--- a/arch/arm/mach-omap1/sleep.S
+++ b/arch/arm/mach-omap1/sleep.S
@@ -36,8 +36,6 @@
 
 #include <asm/assembler.h>
 
-#include <mach/io.h>
-
 #include "iomap.h"
 #include "pm.h"
 
diff --git a/arch/arm/mach-omap1/sram.S b/arch/arm/mach-omap1/sram.S
index 2ce0b9ab20e5..00e9d9e9adf1 100644
--- a/arch/arm/mach-omap1/sram.S
+++ b/arch/arm/mach-omap1/sram.S
@@ -12,7 +12,6 @@
 
 #include <asm/assembler.h>
 
-#include <mach/io.h>
 #include <mach/hardware.h>
 
 #include "iomap.h"
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 2fae6a2740f1..4d8dd9a1b04c 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -44,7 +44,6 @@
 #include <linux/clockchips.h>
 #include <linux/io.h>
 
-#include <asm/system.h>
 #include <asm/leds.h>
 #include <asm/irq.h>
 #include <asm/sched_clock.h>
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index a2e6d0709df2..325b9a0aa4a0 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -46,7 +46,6 @@
 #include <linux/clockchips.h>
 #include <linux/io.h>
 
-#include <asm/system.h>
 #include <asm/leds.h>
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index c8bda62900d8..e658f835d0de 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -230,12 +230,12 @@ static struct i2c_board_info __initdata sdp2430_i2c1_boardinfo[] = {
         {
                 I2C_BOARD_INFO("isp1301_omap", 0x2D),
                 .flags = I2C_CLIENT_WAKE,
-                .irq = OMAP_GPIO_IRQ(78),
         },
 };
 
 static int __init omap2430_i2c_init(void)
 {
+        sdp2430_i2c1_boardinfo[0].irq = gpio_to_irq(78);
         omap_register_i2c_bus(1, 100, sdp2430_i2c1_boardinfo,
                         ARRAY_SIZE(sdp2430_i2c1_boardinfo));
         omap_pmic_init(2, 100, "twl4030", INT_24XX_SYS_NIRQ,
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 30768c2f53fd..a39fc4bbd2b8 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -490,21 +490,22 @@ static struct platform_device omap_vwlan_device = {
 
 static int omap4_twl6030_hsmmc_late_init(struct device *dev)
 {
-        int ret = 0;
+        int irq = 0;
         struct platform_device *pdev = container_of(dev,
                                 struct platform_device, dev);
         struct omap_mmc_platform_data *pdata = dev->platform_data;
 
         /* Setting MMC1 Card detect Irq */
         if (pdev->id == 0) {
-                ret = twl6030_mmc_card_detect_config();
-                if (ret)
+                irq = twl6030_mmc_card_detect_config();
+                if (irq < 0) {
                         pr_err("Failed configuring MMC1 card detect\n");
-                pdata->slots[0].card_detect_irq = TWL6030_IRQ_BASE +
-                                                MMCDETECT_INTR_OFFSET;
+                        return irq;
+                }
+                pdata->slots[0].card_detect_irq = irq;
                 pdata->slots[0].card_detect = twl6030_mmc_card_detect;
         }
-        return ret;
+        return 0;
 }
 
 static __init void omap4_twl6030_hsmmc_set_late_init(struct device *dev)
@@ -906,7 +907,6 @@ static void __init omap4_sdp4430_wifi_mux_init(void)
 }
 
 static struct wl12xx_platform_data omap4_sdp4430_wlan_data __initdata = {
-        .irq = OMAP_GPIO_IRQ(GPIO_WIFI_IRQ),
         .board_ref_clock = WL12XX_REFCLOCK_26,
         .board_tcxo_clock = WL12XX_TCXOCLOCK_26,
 };
@@ -916,6 +916,7 @@ static void __init omap4_sdp4430_wifi_init(void)
         int ret;
 
         omap4_sdp4430_wifi_mux_init();
+        omap4_sdp4430_wlan_data.irq = gpio_to_irq(GPIO_WIFI_IRQ);
         ret = wl12xx_set_platform_data(&omap4_sdp4430_wlan_data);
         if (ret)
                 pr_err("Error setting wl12xx data: %d\n", ret);
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index ac773829941f..768ece2e9c3b 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -136,8 +136,6 @@ static struct resource apollon_smc91x_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = OMAP_GPIO_IRQ(APOLLON_ETHR_GPIO_IRQ),
-                .end    = OMAP_GPIO_IRQ(APOLLON_ETHR_GPIO_IRQ),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
         },
 };
@@ -341,6 +339,8 @@ static void __init omap_apollon_init(void)
          * You have to mux them off in device drivers later on
          * if not needed.
          */
+        apollon_smc91x_resources[1].start = gpio_to_irq(APOLLON_ETHR_GPIO_IRQ);
+        apollon_smc91x_resources[1].end = gpio_to_irq(APOLLON_ETHR_GPIO_IRQ);
         platform_add_devices(apollon_devices, ARRAY_SIZE(apollon_devices));
         omap_serial_init();
         omap_sdrc_init(NULL, NULL);
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 41b0a2fe0b04..909a8b91b564 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -26,6 +26,7 @@
 
 #include <linux/i2c/at24.h>
 #include <linux/i2c/twl.h>
+#include <linux/regulator/fixed.h>
 #include <linux/regulator/machine.h>
 #include <linux/mmc/host.h>
 
@@ -81,8 +82,23 @@ static struct omap_smsc911x_platform_data sb_t35_smsc911x_cfg = {
         .flags          = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
 };
 
+static struct regulator_consumer_supply cm_t35_smsc911x_supplies[] = {
+        REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
+        REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
+};
+
+static struct regulator_consumer_supply sb_t35_smsc911x_supplies[] = {
+        REGULATOR_SUPPLY("vddvario", "smsc911x.1"),
+        REGULATOR_SUPPLY("vdd33a", "smsc911x.1"),
+};
+
 static void __init cm_t35_init_ethernet(void)
 {
+        regulator_register_fixed(0, cm_t35_smsc911x_supplies,
+                                 ARRAY_SIZE(cm_t35_smsc911x_supplies));
+        regulator_register_fixed(1, sb_t35_smsc911x_supplies,
+                                 ARRAY_SIZE(sb_t35_smsc911x_supplies));
+
         gpmc_smsc911x_init(&cm_t35_smsc911x_cfg);
         gpmc_smsc911x_init(&sb_t35_smsc911x_cfg);
 }
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 11cd2a806093..a2010f07de31 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -411,7 +411,6 @@ static struct resource omap_dm9000_resources[] = {
                 .flags          = IORESOURCE_MEM,
         },
         [2] = {
-                .start          = OMAP_GPIO_IRQ(OMAP_DM9000_GPIO_IRQ),
                 .flags          = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
         },
 };
@@ -639,6 +638,7 @@ static void __init devkit8000_init(void)
 
         omap_hsmmc_init(mmc);
         devkit8000_i2c_init();
+        omap_dm9000_resources[2].start = gpio_to_irq(OMAP_DM9000_GPIO_IRQ);
         platform_add_devices(devkit8000_devices,
                         ARRAY_SIZE(devkit8000_devices));
 
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 54af800d143c..0bbbabe28fcc 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -348,7 +348,6 @@ static struct at24_platform_data m24c01 = {
 static struct i2c_board_info __initdata h4_i2c_board_info[] = {
         {
                 I2C_BOARD_INFO("isp1301_omap", 0x2d),
-                .irq            = OMAP_GPIO_IRQ(125),
         },
         {       /* EEPROM on mainboard */
                 I2C_BOARD_INFO("24c01", 0x52),
@@ -377,6 +376,7 @@ static void __init omap_h4_init(void)
          */
 
         board_mkp_init();
+        h4_i2c_board_info[0].irq = gpio_to_irq(125);
         i2c_register_board_info(1, h4_i2c_board_info,
                         ARRAY_SIZE(h4_i2c_board_info));
 
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index e558800adfdf..930c0d380435 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -634,8 +634,14 @@ static void __init igep_wlan_bt_init(void)
 static inline void __init igep_wlan_bt_init(void) { }
 #endif
 
+static struct regulator_consumer_supply dummy_supplies[] = {
+        REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
+        REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
+};
+
 static void __init igep_init(void)
 {
+        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
         omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
 
         /* Get IGEP2 hardware revision */
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index d50a562adfa0..1b6049567ab4 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -22,6 +22,7 @@
 #include <linux/err.h>
 #include <linux/clk.h>
 #include <linux/spi/spi.h>
+#include <linux/regulator/fixed.h>
 #include <linux/regulator/machine.h>
 #include <linux/i2c/twl.h>
 #include <linux/io.h>
@@ -410,8 +411,14 @@ static struct mtd_partition ldp_nand_partitions[] = {
 
 };
 
+static struct regulator_consumer_supply dummy_supplies[] = {
+        REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
+        REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
+};
+
 static void __init omap_ldp_init(void)
 {
+        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
         omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
         ldp_init_smsc911x();
         omap_i2c_init();
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index a659e198892b..49df12735b41 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -114,15 +114,6 @@ static struct omap_smsc911x_platform_data smsc911x_cfg = {
 
 static inline void __init omap3evm_init_smsc911x(void)
 {
-        struct clk *l3ck;
-        unsigned int rate;
-
-        l3ck = clk_get(NULL, "l3_ck");
-        if (IS_ERR(l3ck))
-                rate = 100000000;
-        else
-                rate = clk_get_rate(l3ck);
-
         /* Configure ethernet controller reset gpio */
         if (cpu_is_omap3430()) {
                 if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1)
@@ -487,7 +478,6 @@ static struct platform_device omap3evm_wlan_regulator = {
 };
 
 struct wl12xx_platform_data omap3evm_wlan_data __initdata = {
-        .irq = OMAP_GPIO_IRQ(OMAP3EVM_WLAN_IRQ_GPIO),
         .board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */
 };
 #endif
@@ -623,6 +613,7 @@ static void __init omap3_evm_wl12xx_init(void)
         int ret;
 
         /* WL12xx WLAN Init */
+        omap3evm_wlan_data.irq = gpio_to_irq(OMAP3EVM_WLAN_IRQ_GPIO);
         ret = wl12xx_set_platform_data(&omap3evm_wlan_data);
         if (ret)
                 pr_err("error setting wl12xx data: %d\n", ret);
@@ -632,9 +623,15 @@ static void __init omap3_evm_wl12xx_init(void)
 #endif
 }
 
+static struct regulator_consumer_supply dummy_supplies[] = {
+        REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
+        REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
+};
+
 static void __init omap3_evm_init(void)
 {
         omap3_evm_get_revision();
+        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
 
         if (cpu_is_omap3630())
                 omap3_mux_init(omap36x_board_mux, OMAP_PACKAGE_CBB);
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 4a7d8c8a75da..9b3c141ff51b 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -23,6 +23,7 @@
 #include <linux/io.h>
 #include <linux/gpio.h>
 
+#include <linux/regulator/fixed.h>
 #include <linux/regulator/machine.h>
 
 #include <linux/i2c/twl.h>
@@ -188,8 +189,14 @@ static struct omap_board_mux board_mux[] __initdata = {
 };
 #endif
 
+static struct regulator_consumer_supply dummy_supplies[] = {
+        REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
+        REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
+};
+
 static void __init omap3logic_init(void)
 {
+        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
         omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
         omap3torpedo_fix_pbias_voltage();
         omap3logic_i2c_init();
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 641004380795..4dffc95bddd2 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -24,6 +24,7 @@
 #include <linux/input.h>
 #include <linux/gpio_keys.h>
 
+#include <linux/regulator/fixed.h>
 #include <linux/regulator/machine.h>
 #include <linux/i2c/twl.h>
 #include <linux/mmc/host.h>
@@ -72,15 +73,6 @@ static struct omap_smsc911x_platform_data smsc911x_cfg = {
 
 static inline void __init omap3stalker_init_eth(void)
 {
-        struct clk *l3ck;
-        unsigned int rate;
-
-        l3ck = clk_get(NULL, "l3_ck");
-        if (IS_ERR(l3ck))
-                rate = 100000000;
-        else
-                rate = clk_get_rate(l3ck);
-
         omap_mux_init_gpio(19, OMAP_PIN_INPUT_PULLUP);
         gpmc_smsc911x_init(&smsc911x_cfg);
 }
@@ -419,8 +411,14 @@ static struct omap_board_mux board_mux[] __initdata = {
 };
 #endif
 
+static struct regulator_consumer_supply dummy_supplies[] = {
+        REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
+        REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
+};
+
 static void __init omap3_stalker_init(void)
 {
+        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
         omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
         omap_board_config = omap3_stalker_config;
         omap_board_config_size = ARRAY_SIZE(omap3_stalker_config);
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 8842e04aef01..ae2251fa4a69 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -42,6 +42,7 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/flash.h>
+#include <asm/system_info.h>
 
 #include <plat/board.h>
 #include "common.h"
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index e9071a57c37b..d8c0e89f0126 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -231,14 +231,13 @@ static struct platform_device omap_vwlan_device = {
 };
 
 struct wl12xx_platform_data omap_panda_wlan_data  __initdata = {
-        .irq = OMAP_GPIO_IRQ(GPIO_WIFI_IRQ),
         /* PANDA ref clock is 38.4 MHz */
         .board_ref_clock = 2,
 };
 
 static int omap4_twl6030_hsmmc_late_init(struct device *dev)
 {
-        int ret = 0;
+        int irq = 0;
         struct platform_device *pdev = container_of(dev,
                                 struct platform_device, dev);
         struct omap_mmc_platform_data *pdata = dev->platform_data;
@@ -249,14 +248,15 @@ static int omap4_twl6030_hsmmc_late_init(struct device *dev)
         }
         /* Setting MMC1 Card detect Irq */
         if (pdev->id == 0) {
-                ret = twl6030_mmc_card_detect_config();
-                 if (ret)
+                irq = twl6030_mmc_card_detect_config();
+                if (irq < 0) {
                         dev_err(dev, "%s: Error card detect config(%d)\n",
-                                __func__, ret);
-                 else
-                        pdata->slots[0].card_detect = twl6030_mmc_card_detect;
+                                __func__, irq);
+                        return irq;
+                }
+                pdata->slots[0].card_detect = twl6030_mmc_card_detect;
         }
-        return ret;
+        return 0;
 }
 
 static __init void omap4_twl6030_hsmmc_set_late_init(struct device *dev)
@@ -557,6 +557,7 @@ static void __init omap4_panda_init(void)
                 package = OMAP_PACKAGE_CBL;
         omap4_mux_init(board_mux, NULL, package);
 
+        omap_panda_wlan_data.irq = gpio_to_irq(GPIO_WIFI_IRQ);
         ret = wl12xx_set_platform_data(&omap_panda_wlan_data);
         if (ret)
                 pr_err("error setting wl12xx data: %d\n", ret);
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 668533e2a379..33aa3910b09e 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -498,10 +498,18 @@ static struct gpio overo_bt_gpios[] __initdata = {
         { OVERO_GPIO_BT_NRESET, GPIOF_OUT_INIT_HIGH,    "lcd bl enable" },
 };
 
+static struct regulator_consumer_supply dummy_supplies[] = {
+        REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
+        REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
+        REGULATOR_SUPPLY("vddvario", "smsc911x.1"),
+        REGULATOR_SUPPLY("vdd33a", "smsc911x.1"),
+};
+
 static void __init overo_init(void)
 {
         int ret;
 
+        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
         omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
         omap_hsmmc_init(mmc);
         overo_i2c_init();
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 16aebfb8a7ec..d87ee0612098 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -25,6 +25,7 @@
 #include <linux/gpio_keys.h>
 #include <linux/mmc/host.h>
 #include <linux/power/isp1704_charger.h>
+#include <asm/system_info.h>
 
 #include <plat/mcspi.h>
 #include <plat/board.h>
@@ -169,7 +170,6 @@ static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
                 .modalias               = "tsc2005",
                 .bus_num                = 1,
                 .chip_select            = 0,
-                .irq                    = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),
                 .max_speed_hz           = 6000000,
                 .controller_data        = &tsc2005_mcspi_config,
                 .platform_data          = &tsc2005_pdata,
@@ -1128,6 +1128,8 @@ static void __init rx51_init_tsc2005(void)
         }
 
         tsc2005_pdata.set_reset = rx51_tsc2005_set_reset;
+        rx51_peripherals_spi_board_info[RX51_SPI_TSC2005].irq =
+                                gpio_to_irq(RX51_TSC2005_IRQ_GPIO);
 }
 
 void __init rx51_peripherals_init(void)
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c
index 369c2eb7715b..f64f44173061 100644
--- a/arch/arm/mach-omap2/board-zoom-debugboard.c
+++ b/arch/arm/mach-omap2/board-zoom-debugboard.c
@@ -14,6 +14,9 @@
 #include <linux/smsc911x.h>
 #include <linux/interrupt.h>
 
+#include <linux/regulator/fixed.h>
+#include <linux/regulator/machine.h>
+
 #include <plat/gpmc.h>
 #include <plat/gpmc-smsc911x.h>
 
@@ -43,7 +46,6 @@ static inline void __init zoom_init_smsc911x(void)
 static struct plat_serial8250_port serial_platform_data[] = {
         {
                 .mapbase        = ZOOM_UART_BASE,
-                .irq            = OMAP_GPIO_IRQ(102),
                 .flags          = UPF_BOOT_AUTOCONF|UPF_IOREMAP|UPF_SHARE_IRQ,
                 .irqflags       = IRQF_SHARED | IRQF_TRIGGER_RISING,
                 .iotype         = UPIO_MEM,
@@ -89,6 +91,8 @@ static inline void __init zoom_init_quaduart(void)
         if (gpio_request_one(quart_gpio, GPIOF_IN, "TL16CP754C GPIO") < 0)
                 printk(KERN_ERR "Failed to request GPIO%d for TL16CP754C\n",
                                                                 quart_gpio);
+
+        serial_platform_data[0].irq = gpio_to_irq(102);
 }
 
 static inline int omap_zoom_debugboard_detect(void)
@@ -116,11 +120,17 @@ static struct platform_device *zoom_devices[] __initdata = {
         &zoom_debugboard_serial_device,
 };
 
+static struct regulator_consumer_supply dummy_supplies[] = {
+        REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
+        REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
+};
+
 int __init zoom_debugboard_init(void)
 {
         if (!omap_zoom_debugboard_detect())
                 return 0;
 
+        regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
         zoom_init_smsc911x();
         zoom_init_quaduart();
         return platform_add_devices(zoom_devices, ARRAY_SIZE(zoom_devices));
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 3d39cdb2e250..b797cb279618 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -193,7 +193,6 @@ static struct platform_device omap_vwlan_device = {
 };
 
 static struct wl12xx_platform_data omap_zoom_wlan_data __initdata = {
-        .irq = OMAP_GPIO_IRQ(OMAP_ZOOM_WLAN_IRQ_GPIO),
         /* ZOOM ref clock is 26 MHz */
         .board_ref_clock = 1,
 };
@@ -297,7 +296,10 @@ static void enable_board_wakeup_source(void)
 
 void __init zoom_peripherals_init(void)
 {
-        int ret = wl12xx_set_platform_data(&omap_zoom_wlan_data);
+        int ret;
+
+        omap_zoom_wlan_data.irq = gpio_to_irq(OMAP_ZOOM_WLAN_IRQ_GPIO);
+        ret = wl12xx_set_platform_data(&omap_zoom_wlan_data);
 
         if (ret)
                 pr_err("error setting wl12xx data: %d\n", ret);
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 981b9f9111a4..f4a626f7c79e 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -19,6 +19,7 @@
 #include <linux/kernel.h>
 #include <linux/clk.h>
 #include <linux/list.h>
+#include <linux/io.h>
 
 #include <plat/hardware.h>
 #include <plat/clkdev_omap.h>
@@ -746,7 +747,7 @@ static struct clk dpll4_m3_ck = {
         .parent         = &dpll4_ck,
         .init           = &omap2_init_clksel_parent,
         .clksel_reg     = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL),
-        .clksel_mask    = OMAP3430_CLKSEL_TV_MASK,
+        .clksel_mask    = OMAP3630_CLKSEL_TV_MASK,
         .clksel         = dpll4_clksel,
         .clkdm_name     = "dpll4_clkdm",
         .recalc         = &omap2_clksel_recalc,
@@ -831,7 +832,7 @@ static struct clk dpll4_m4_ck = {
         .parent         = &dpll4_ck,
         .init           = &omap2_init_clksel_parent,
         .clksel_reg     = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL),
-        .clksel_mask    = OMAP3430_CLKSEL_DSS1_MASK,
+        .clksel_mask    = OMAP3630_CLKSEL_DSS1_MASK,
         .clksel         = dpll4_clksel,
         .clkdm_name     = "dpll4_clkdm",
         .recalc         = &omap2_clksel_recalc,
@@ -858,7 +859,7 @@ static struct clk dpll4_m5_ck = {
         .parent         = &dpll4_ck,
         .init           = &omap2_init_clksel_parent,
         .clksel_reg     = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_CLKSEL),
-        .clksel_mask    = OMAP3430_CLKSEL_CAM_MASK,
+        .clksel_mask    = OMAP3630_CLKSEL_CAM_MASK,
         .clksel         = dpll4_clksel,
         .clkdm_name     = "dpll4_clkdm",
         .set_rate       = &omap2_clksel_set_rate,
@@ -885,7 +886,7 @@ static struct clk dpll4_m6_ck = {
         .parent         = &dpll4_ck,
         .init           = &omap2_init_clksel_parent,
         .clksel_reg     = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
-        .clksel_mask    = OMAP3430_DIV_DPLL4_MASK,
+        .clksel_mask    = OMAP3630_DIV_DPLL4_MASK,
         .clksel         = dpll4_clksel,
         .clkdm_name     = "dpll4_clkdm",
         .recalc         = &omap2_clksel_recalc,
@@ -1393,6 +1394,7 @@ static struct clk cpefuse_fck = {
         .name           = "cpefuse_fck",
         .ops            = &clkops_omap2_dflt,
         .parent         = &sys_ck,
+        .clkdm_name     = "core_l4_clkdm",
         .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
         .enable_bit     = OMAP3430ES2_EN_CPEFUSE_SHIFT,
         .recalc         = &followparent_recalc,
@@ -1402,6 +1404,7 @@ static struct clk ts_fck = {
         .name           = "ts_fck",
         .ops            = &clkops_omap2_dflt,
         .parent         = &omap_32k_fck,
+        .clkdm_name     = "core_l4_clkdm",
         .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
         .enable_bit     = OMAP3430ES2_EN_TS_SHIFT,
         .recalc         = &followparent_recalc,
@@ -1411,6 +1414,7 @@ static struct clk usbtll_fck = {
         .name           = "usbtll_fck",
         .ops            = &clkops_omap2_dflt_wait,
         .parent         = &dpll5_m2_ck,
+        .clkdm_name     = "core_l4_clkdm",
         .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
         .enable_bit     = OMAP3430ES2_EN_USBTLL_SHIFT,
         .recalc         = &followparent_recalc,
@@ -1616,6 +1620,7 @@ static struct clk fshostusb_fck = {
         .name           = "fshostusb_fck",
         .ops            = &clkops_omap2_dflt_wait,
         .parent         = &core_48m_fck,
+        .clkdm_name     = "core_l4_clkdm",
         .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
         .enable_bit     = OMAP3430ES1_EN_FSHOSTUSB_SHIFT,
         .recalc         = &followparent_recalc,
@@ -2042,6 +2047,7 @@ static struct clk omapctrl_ick = {
         .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
         .enable_bit     = OMAP3430_EN_OMAPCTRL_SHIFT,
         .flags          = ENABLE_ON_INIT,
+        .clkdm_name     = "core_l4_clkdm",
         .recalc         = &followparent_recalc,
 };
 
@@ -2093,6 +2099,7 @@ static struct clk usb_l4_ick = {
         .clksel_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL),
         .clksel_mask    = OMAP3430ES1_CLKSEL_FSHOSTUSB_MASK,
         .clksel         = usb_l4_clksel,
+        .clkdm_name     = "core_l4_clkdm",
         .recalc         = &omap2_clksel_recalc,
 };
 
@@ -3466,8 +3473,8 @@ static struct omap_clk omap3xxx_clks[] = {
         CLK(NULL,       "ipss_ick",     &ipss_ick,      CK_AM35XX),
         CLK(NULL,       "rmii_ck",      &rmii_ck,       CK_AM35XX),
         CLK(NULL,       "pclk_ck",      &pclk_ck,       CK_AM35XX),
-        CLK("davinci_emac",     "emac_clk",     &emac_ick,      CK_AM35XX),
-        CLK("davinci_emac",     "phy_clk",      &emac_fck,      CK_AM35XX),
+        CLK("davinci_emac",     NULL,   &emac_ick,      CK_AM35XX),
+        CLK("davinci_mdio.0",   NULL,   &emac_fck,      CK_AM35XX),
         CLK("vpfe-capture",     "master",       &vpfe_ick,      CK_AM35XX),
         CLK("vpfe-capture",     "slave",        &vpfe_fck,      CK_AM35XX),
         CLK("musb-am35x",       "ick",          &hsotgusb_ick_am35xx,   CK_AM35XX),
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 79b98f22f207..fa6ea65ad44b 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -26,6 +26,7 @@
 #include <linux/kernel.h>
 #include <linux/list.h>
 #include <linux/clk.h>
+#include <linux/io.h>
 
 #include <plat/hardware.h>
 #include <plat/clkdev_omap.h>
@@ -956,8 +957,8 @@ static struct dpll_data dpll_usb_dd = {
         .modes          = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED),
         .autoidle_reg   = OMAP4430_CM_AUTOIDLE_DPLL_USB,
         .idlest_reg     = OMAP4430_CM_IDLEST_DPLL_USB,
-        .mult_mask      = OMAP4430_DPLL_MULT_MASK,
-        .div1_mask      = OMAP4430_DPLL_DIV_MASK,
+        .mult_mask      = OMAP4430_DPLL_MULT_USB_MASK,
+        .div1_mask      = OMAP4430_DPLL_DIV_0_7_MASK,
         .enable_mask    = OMAP4430_DPLL_EN_MASK,
         .autoidle_mask  = OMAP4430_AUTO_DPLL_MODE_MASK,
         .idlest_mask    = OMAP4430_ST_DPLL_CLK_MASK,
@@ -977,6 +978,7 @@ static struct clk dpll_usb_ck = {
         .recalc         = &omap3_dpll_recalc,
         .round_rate     = &omap2_dpll_round_rate,
         .set_rate       = &omap3_noncore_dpll_set_rate,
+        .clkdm_name     = "l3_init_clkdm",
 };
 
 static struct clk dpll_usb_clkdcoldo_ck = {
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index 9299ac291d28..bd7ed13515cc 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -390,7 +390,7 @@ static struct clockdomain emu_sys_44xx_clkdm = {
         .prcm_partition   = OMAP4430_PRM_PARTITION,
         .cm_inst          = OMAP4430_PRM_EMU_CM_INST,
         .clkdm_offs       = OMAP4430_PRM_EMU_CM_EMU_CDOFFS,
-        .flags            = CLKDM_CAN_HWSUP,
+        .flags            = CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_FORCE_WAKEUP,
 };
 
 static struct clockdomain l3_dma_44xx_clkdm = {
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index 9498b0f5fbd0..1706ebcec08d 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -76,7 +76,7 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
         }
 
         spi_bi->bus_num = bus_num;
-        spi_bi->irq     = OMAP_GPIO_IRQ(gpio_pendown);
+        spi_bi->irq     = gpio_to_irq(gpio_pendown);
 
         if (board_pdata) {
                 board_pdata->gpio_pendown = gpio_pendown;
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 464cffde58fe..535866489ce3 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -87,29 +87,14 @@ static int _cpuidle_deny_idle(struct powerdomain *pwrdm,
         return 0;
 }
 
-/**
- * omap3_enter_idle - Programs OMAP3 to enter the specified state
- * @dev: cpuidle device
- * @drv: cpuidle driver
- * @index: the index of state to be entered
- *
- * Called from the CPUidle framework to program the device to the
- * specified target state selected by the governor.
- */
-static int omap3_enter_idle(struct cpuidle_device *dev,
+static int __omap3_enter_idle(struct cpuidle_device *dev,
                                 struct cpuidle_driver *drv,
                                 int index)
 {
         struct omap3_idle_statedata *cx =
                         cpuidle_get_statedata(&dev->states_usage[index]);
-        struct timespec ts_preidle, ts_postidle, ts_idle;
         u32 mpu_state = cx->mpu_state, core_state = cx->core_state;
-        int idle_time;
-
-        /* Used to keep track of the total time in idle */
-        getnstimeofday(&ts_preidle);
 
-        local_irq_disable();
         local_fiq_disable();
 
         pwrdm_set_next_pwrst(mpu_pd, mpu_state);
@@ -148,22 +133,29 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
         }
 
 return_sleep_time:
-        getnstimeofday(&ts_postidle);
-        ts_idle = timespec_sub(ts_postidle, ts_preidle);
 
-        local_irq_enable();
         local_fiq_enable();
 
-        idle_time = ts_idle.tv_nsec / NSEC_PER_USEC + ts_idle.tv_sec * \
-                                                                USEC_PER_SEC;
-
-        /* Update cpuidle counters */
-        dev->last_residency = idle_time;
-
         return index;
 }
 
 /**
+ * omap3_enter_idle - Programs OMAP3 to enter the specified state
+ * @dev: cpuidle device
+ * @drv: cpuidle driver
+ * @index: the index of state to be entered
+ *
+ * Called from the CPUidle framework to program the device to the
+ * specified target state selected by the governor.
+ */
+static inline int omap3_enter_idle(struct cpuidle_device *dev,
+                                struct cpuidle_driver *drv,
+                                int index)
+{
+        return cpuidle_wrap_enter(dev, drv, index, __omap3_enter_idle);
+}
+
+/**
  * next_valid_state - Find next valid C-state
  * @dev: cpuidle device
  * @drv: cpuidle driver
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index 72e018b9b260..f386cbe9c889 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -62,15 +62,9 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
 {
         struct omap4_idle_statedata *cx =
                         cpuidle_get_statedata(&dev->states_usage[index]);
-        struct timespec ts_preidle, ts_postidle, ts_idle;
         u32 cpu1_state;
-        int idle_time;
         int cpu_id = smp_processor_id();
 
-        /* Used to keep track of the total time in idle */
-        getnstimeofday(&ts_preidle);
-
-        local_irq_disable();
         local_fiq_disable();
 
         /*
@@ -128,26 +122,17 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
         if (index > 0)
                 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu_id);
 
-        getnstimeofday(&ts_postidle);
-        ts_idle = timespec_sub(ts_postidle, ts_preidle);
-
-        local_irq_enable();
         local_fiq_enable();
 
-        idle_time = ts_idle.tv_nsec / NSEC_PER_USEC + ts_idle.tv_sec * \
-                                                                USEC_PER_SEC;
-
-        /* Update cpuidle counters */
-        dev->last_residency = idle_time;
-
         return index;
 }
 
 DEFINE_PER_CPU(struct cpuidle_device, omap4_idle_dev);
 
 struct cpuidle_driver omap4_idle_driver = {
-        .name =         "omap4_idle",
-        .owner =        THIS_MODULE,
+        .name                           = "omap4_idle",
+        .owner                          = THIS_MODULE,
+        .en_core_tk_irqen               = 1,
 };
 
 static inline void _fill_cstate(struct cpuidle_driver *drv,
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 9706c648bc19..db5a88a36c63 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -99,7 +99,7 @@ static const struct omap_dss_hwmod_data omap4_dss_hwmod_data[] __initdata = {
         { "dss_hdmi", "omapdss_hdmi", -1 },
 };
 
-static void omap4_hdmi_mux_pads(enum omap_hdmi_flags flags)
+static void __init omap4_hdmi_mux_pads(enum omap_hdmi_flags flags)
 {
         u32 reg;
         u16 control_i2c_1;
@@ -125,7 +125,7 @@ static void omap4_hdmi_mux_pads(enum omap_hdmi_flags flags)
         }
 }
 
-static int __init omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
+static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
 {
         u32 enable_mask, enable_shift;
         u32 pipd_mask, pipd_shift;
@@ -166,7 +166,7 @@ int __init omap_hdmi_init(enum omap_hdmi_flags flags)
         return 0;
 }
 
-static int __init omap_dsi_enable_pads(int dsi_id, unsigned lane_mask)
+static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask)
 {
         if (cpu_is_omap44xx())
                 return omap4_dsi_mux_pads(dsi_id, lane_mask);
@@ -174,7 +174,7 @@ static int __init omap_dsi_enable_pads(int dsi_id, unsigned lane_mask)
         return 0;
 }
 
-static void __init omap_dsi_disable_pads(int dsi_id, unsigned lane_mask)
+static void omap_dsi_disable_pads(int dsi_id, unsigned lane_mask)
 {
         if (cpu_is_omap44xx())
                 omap4_dsi_mux_pads(dsi_id, 0);
diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c b/arch/arm/mach-omap2/gpmc-smsc911x.c
index 5e5880d6d099..b6c77be3e8f7 100644
--- a/arch/arm/mach-omap2/gpmc-smsc911x.c
+++ b/arch/arm/mach-omap2/gpmc-smsc911x.c
@@ -19,15 +19,11 @@
 #include <linux/interrupt.h>
 #include <linux/io.h>
 #include <linux/smsc911x.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
 
 #include <plat/board.h>
 #include <plat/gpmc.h>
 #include <plat/gpmc-smsc911x.h>
 
-static struct omap_smsc911x_platform_data *gpmc_cfg;
-
 static struct resource gpmc_smsc911x_resources[] = {
         [0] = {
                 .flags          = IORESOURCE_MEM,
@@ -41,51 +37,6 @@ static struct smsc911x_platform_config gpmc_smsc911x_config = {
         .phy_interface  = PHY_INTERFACE_MODE_MII,
         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
         .irq_type       = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
-        .flags          = SMSC911X_USE_16BIT,
-};
-
-static struct regulator_consumer_supply gpmc_smsc911x_supply[] = {
-        REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
-        REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
-};
-
-/* Generic regulator definition to satisfy smsc911x */
-static struct regulator_init_data gpmc_smsc911x_reg_init_data = {
-        .constraints = {
-                .min_uV                 = 3300000,
-                .max_uV                 = 3300000,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = ARRAY_SIZE(gpmc_smsc911x_supply),
-        .consumer_supplies      = gpmc_smsc911x_supply,
-};
-
-static struct fixed_voltage_config gpmc_smsc911x_fixed_reg_data = {
-        .supply_name            = "gpmc_smsc911x",
-        .microvolts             = 3300000,
-        .gpio                   = -EINVAL,
-        .startup_delay          = 0,
-        .enable_high            = 0,
-        .enabled_at_boot        = 1,
-        .init_data              = &gpmc_smsc911x_reg_init_data,
-};
-
-/*
- * Platform device id of 42 is a temporary fix to avoid conflicts
- * with other reg-fixed-voltage devices. The real fix should
- * involve the driver core providing a way of dynamically
- * assigning a unique id on registration for platform devices
- * in the same name space.
- */
-static struct platform_device gpmc_smsc911x_regulator = {
-        .name           = "reg-fixed-voltage",
-        .id             = 42,
-        .dev = {
-                .platform_data  = &gpmc_smsc911x_fixed_reg_data,
-        },
 };
 
 /*
@@ -93,23 +44,12 @@ static struct platform_device gpmc_smsc911x_regulator = {
  * assume that pin multiplexing is done in the board-*.c file,
  * or in the bootloader.
  */
-void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data)
+void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *gpmc_cfg)
 {
         struct platform_device *pdev;
         unsigned long cs_mem_base;
         int ret;
 
-        gpmc_cfg = board_data;
-
-        if (!gpmc_cfg->id) {
-                ret = platform_device_register(&gpmc_smsc911x_regulator);
-                if (ret < 0) {
-                        pr_err("Unable to register smsc911x regulators: %d\n",
-                               ret);
-                        return;
-                }
-        }
-
         if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) {
                 pr_err("Failed to request GPMC mem region\n");
                 return;
@@ -139,8 +79,7 @@ void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data)
                 gpio_set_value(gpmc_cfg->gpio_reset, 1);
         }
 
-        if (gpmc_cfg->flags)
-                gpmc_smsc911x_config.flags = gpmc_cfg->flags;
+        gpmc_smsc911x_config.flags = gpmc_cfg->flags ? : SMSC911X_USE_16BIT;
 
         pdev = platform_device_register_resndata(NULL, "smsc911x", gpmc_cfg->id,
                  gpmc_smsc911x_resources, ARRAY_SIZE(gpmc_smsc911x_resources),
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 8121720e942f..b0268eaffe13 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -316,6 +316,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
         mmc->slots[0].pm_caps = c->pm_caps;
         mmc->slots[0].internal_clock = !c->ext_clock;
         mmc->dma_mask = 0xffffffff;
+        mmc->max_freq = c->max_freq;
         if (cpu_is_omap44xx())
                 mmc->reg_offset = OMAP4_MMC_REG_OFFSET;
         else
@@ -505,6 +506,13 @@ static void __init omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo,
         if (oh->dev_attr != NULL) {
                 mmc_dev_attr = oh->dev_attr;
                 mmc_data->controller_flags = mmc_dev_attr->flags;
+                /*
+                 * erratum 2.1.1.128 doesn't apply if board has
+                 * a transceiver is attached
+                 */
+                if (hsmmcinfo->transceiver)
+                        mmc_data->controller_flags &=
+                                ~OMAP_HSMMC_BROKEN_MULTIBLOCK_READ;
         }
 
         pdev = platform_device_alloc(name, ctrl_nr - 1);
diff --git a/arch/arm/mach-omap2/hsmmc.h b/arch/arm/mach-omap2/hsmmc.h
index 07831cc3c171..7f2e790e0929 100644
--- a/arch/arm/mach-omap2/hsmmc.h
+++ b/arch/arm/mach-omap2/hsmmc.h
@@ -27,6 +27,8 @@ struct omap2_hsmmc_info {
         char    *name;          /* or NULL for default */
         struct platform_device *pdev;   /* mmc controller instance */
         int     ocr_mask;       /* temporary HACK */
+        int     max_freq;       /* maximum clock, if constrained by external
+                                 * circuitry, or 0 for default */
         /* Remux (pad configuration) when powering on/off */
         void (*remux)(struct device *dev, int slot, int power_on);
         /* init some special card */
diff --git a/arch/arm/mach-omap2/include/mach/barriers.h b/arch/arm/mach-omap2/include/mach/barriers.h
index 4fa72c7cc7cd..1c582a8592b9 100644
--- a/arch/arm/mach-omap2/include/mach/barriers.h
+++ b/arch/arm/mach-omap2/include/mach/barriers.h
@@ -22,6 +22,8 @@
 #ifndef __MACH_BARRIERS_H
 #define __MACH_BARRIERS_H
 
+#include <asm/outercache.h>
+
 extern void omap_bus_sync(void);
 
 #define rmb()           dsb()
diff --git a/arch/arm/mach-omap2/include/mach/io.h b/arch/arm/mach-omap2/include/mach/io.h
deleted file mode 100644
index b8758c8a9394..000000000000
--- a/arch/arm/mach-omap2/include/mach/io.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * arch/arm/mach-omap2/include/mach/io.h
- *
- * IO definitions for TI OMAP processors and boards
- *
- * Copied from arch/arm/mach-sa1100/include/mach/io.h
- * Copyright (C) 1997-1999 Russell King
- *
- * Copyright (C) 2009 Texas Instruments
- * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Modifications:
- *  06-12-1997  RMK     Created.
- *  07-04-1999  RMK     Major cleanup
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We don't actually have real ISA nor PCI buses, but there is so many
- * drivers out there that might just work if we fake them...
- */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-omap2/iomap.h b/arch/arm/mach-omap2/iomap.h
index e6f958165296..0812b154f5b5 100644
--- a/arch/arm/mach-omap2/iomap.h
+++ b/arch/arm/mach-omap2/iomap.h
@@ -22,12 +22,6 @@
  * 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-#ifdef __ASSEMBLER__
-#define IOMEM(x)                (x)
-#else
-#define IOMEM(x)                ((void __force __iomem *)(x))
-#endif
-
 #define OMAP2_L3_IO_OFFSET      0x90000000
 #define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
 
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index f26b2faa1694..65c33911341f 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -35,7 +35,6 @@
 #include <linux/irq.h>
 #include <linux/interrupt.h>
 
-#include <asm/system.h>
 
 #include <plat/omap_hwmod.h>
 
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 63ab686834c1..13670aa84e58 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -46,7 +46,6 @@
 #include <asm/cacheflush.h>
 #include <asm/tlbflush.h>
 #include <asm/smp_scu.h>
-#include <asm/system.h>
 #include <asm/pgalloc.h>
 #include <asm/suspend.h>
 #include <asm/hardware/cache-l2x0.h>
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index eba6cd3816f5..2c27fdb61e66 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1395,7 +1395,7 @@ static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  */
 static int _ocp_softreset(struct omap_hwmod *oh)
 {
-        u32 v;
+        u32 v, softrst_mask;
         int c = 0;
         int ret = 0;
 
@@ -1427,11 +1427,13 @@ static int _ocp_softreset(struct omap_hwmod *oh)
                                                     oh->class->sysc->syss_offs)
                                    & SYSS_RESETDONE_MASK),
                                   MAX_MODULE_SOFTRESET_WAIT, c);
-        else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
+        else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
+                softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
                 omap_test_timeout(!(omap_hwmod_read(oh,
                                                      oh->class->sysc->sysc_offs)
-                                   & SYSC_TYPE2_SOFTRESET_MASK),
+                                   & softrst_mask),
                                   MAX_MODULE_SOFTRESET_WAIT, c);
+        }
 
         if (c == MAX_MODULE_SOFTRESET_WAIT)
                 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
@@ -1477,6 +1479,11 @@ static int _reset(struct omap_hwmod *oh)
 
         ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
 
+        if (oh->class->sysc) {
+                _update_sysc_cache(oh);
+                _enable_sysc(oh);
+        }
+
         return ret;
 }
 
@@ -1786,20 +1793,9 @@ static int _setup(struct omap_hwmod *oh, void *data)
                 return 0;
         }
 
-        if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
+        if (!(oh->flags & HWMOD_INIT_NO_RESET))
                 _reset(oh);
 
-                /*
-                 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
-                 * The _enable() function should be split to
-                 * avoid the rewrite of the OCP_SYSCONFIG register.
-                 */
-                if (oh->class->sysc) {
-                        _update_sysc_cache(oh);
-                        _enable_sysc(oh);
-                }
-        }
-
         postsetup_state = oh->_postsetup_state;
         if (postsetup_state == _HWMOD_STATE_UNKNOWN)
                 postsetup_state = _HWMOD_STATE_ENABLED;
@@ -1907,20 +1903,10 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  */
 int omap_hwmod_softreset(struct omap_hwmod *oh)
 {
-        u32 v;
-        int ret;
-
-        if (!oh || !(oh->_sysc_cache))
+        if (!oh)
                 return -EINVAL;
 
-        v = oh->_sysc_cache;
-        ret = _set_softreset(oh, &v);
-        if (ret)
-                goto error;
-        _write_sysconfig(v, oh);
-
-error:
-        return ret;
+        return _ocp_softreset(oh);
 }
 
 /**
@@ -2463,26 +2449,28 @@ int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  * @oh: struct omap_hwmod *
  *
  * Sets the module OCP socket ENAWAKEUP bit to allow the module to
- * send wakeups to the PRCM.  Eventually this should sets PRCM wakeup
- * registers to cause the PRCM to receive wakeup events from the
- * module.  Does not set any wakeup routing registers beyond this
- * point - if the module is to wake up any other module or subsystem,
- * that must be set separately.  Called by omap_device code.  Returns
- * -EINVAL on error or 0 upon success.
+ * send wakeups to the PRCM, and enable I/O ring wakeup events for
+ * this IP block if it has dynamic mux entries.  Eventually this
+ * should set PRCM wakeup registers to cause the PRCM to receive
+ * wakeup events from the module.  Does not set any wakeup routing
+ * registers beyond this point - if the module is to wake up any other
+ * module or subsystem, that must be set separately.  Called by
+ * omap_device code.  Returns -EINVAL on error or 0 upon success.
  */
 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
 {
         unsigned long flags;
         u32 v;
 
-        if (!oh->class->sysc ||
-            !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
-                return -EINVAL;
-
         spin_lock_irqsave(&oh->_lock, flags);
-        v = oh->_sysc_cache;
-        _enable_wakeup(oh, &v);
-        _write_sysconfig(v, oh);
+
+        if (oh->class->sysc &&
+            (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
+                v = oh->_sysc_cache;
+                _enable_wakeup(oh, &v);
+                _write_sysconfig(v, oh);
+        }
+
         _set_idle_ioring_wakeup(oh, true);
         spin_unlock_irqrestore(&oh->_lock, flags);
 
@@ -2494,26 +2482,28 @@ int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  * @oh: struct omap_hwmod *
  *
  * Clears the module OCP socket ENAWAKEUP bit to prevent the module
- * from sending wakeups to the PRCM.  Eventually this should clear
- * PRCM wakeup registers to cause the PRCM to ignore wakeup events
- * from the module.  Does not set any wakeup routing registers beyond
- * this point - if the module is to wake up any other module or
- * subsystem, that must be set separately.  Called by omap_device
- * code.  Returns -EINVAL on error or 0 upon success.
+ * from sending wakeups to the PRCM, and disable I/O ring wakeup
+ * events for this IP block if it has dynamic mux entries.  Eventually
+ * this should clear PRCM wakeup registers to cause the PRCM to ignore
+ * wakeup events from the module.  Does not set any wakeup routing
+ * registers beyond this point - if the module is to wake up any other
+ * module or subsystem, that must be set separately.  Called by
+ * omap_device code.  Returns -EINVAL on error or 0 upon success.
  */
 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
 {
         unsigned long flags;
         u32 v;
 
-        if (!oh->class->sysc ||
-            !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
-                return -EINVAL;
-
         spin_lock_irqsave(&oh->_lock, flags);
-        v = oh->_sysc_cache;
-        _disable_wakeup(oh, &v);
-        _write_sysconfig(v, oh);
+
+        if (oh->class->sysc &&
+            (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
+                v = oh->_sysc_cache;
+                _disable_wakeup(oh, &v);
+                _write_sysconfig(v, oh);
+        }
+
         _set_idle_ioring_wakeup(oh, false);
         spin_unlock_irqrestore(&oh->_lock, flags);
 
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 08daa5e0eb5f..cc9bd106a854 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2996,6 +2996,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp1_slaves[] = {
         &omap44xx_l4_abe__mcbsp1_dma,
 };
 
+static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = {
+        { .role = "pad_fck", .clk = "pad_clks_ck" },
+        { .role = "prcm_clk", .clk = "mcbsp1_sync_mux_ck" },
+};
+
 static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
         .name           = "mcbsp1",
         .class          = &omap44xx_mcbsp_hwmod_class,
@@ -3012,6 +3017,8 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
         },
         .slaves         = omap44xx_mcbsp1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mcbsp1_slaves),
+        .opt_clks       = mcbsp1_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(mcbsp1_opt_clks),
 };
 
 /* mcbsp2 */
@@ -3071,6 +3078,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp2_slaves[] = {
         &omap44xx_l4_abe__mcbsp2_dma,
 };
 
+static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = {
+        { .role = "pad_fck", .clk = "pad_clks_ck" },
+        { .role = "prcm_clk", .clk = "mcbsp2_sync_mux_ck" },
+};
+
 static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
         .name           = "mcbsp2",
         .class          = &omap44xx_mcbsp_hwmod_class,
@@ -3087,6 +3099,8 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
         },
         .slaves         = omap44xx_mcbsp2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mcbsp2_slaves),
+        .opt_clks       = mcbsp2_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(mcbsp2_opt_clks),
 };
 
 /* mcbsp3 */
@@ -3146,6 +3160,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp3_slaves[] = {
         &omap44xx_l4_abe__mcbsp3_dma,
 };
 
+static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = {
+        { .role = "pad_fck", .clk = "pad_clks_ck" },
+        { .role = "prcm_clk", .clk = "mcbsp3_sync_mux_ck" },
+};
+
 static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
         .name           = "mcbsp3",
         .class          = &omap44xx_mcbsp_hwmod_class,
@@ -3162,6 +3181,8 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
         },
         .slaves         = omap44xx_mcbsp3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mcbsp3_slaves),
+        .opt_clks       = mcbsp3_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(mcbsp3_opt_clks),
 };
 
 /* mcbsp4 */
@@ -3200,6 +3221,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp4_slaves[] = {
         &omap44xx_l4_per__mcbsp4,
 };
 
+static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = {
+        { .role = "pad_fck", .clk = "pad_clks_ck" },
+        { .role = "prcm_clk", .clk = "mcbsp4_sync_mux_ck" },
+};
+
 static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
         .name           = "mcbsp4",
         .class          = &omap44xx_mcbsp_hwmod_class,
@@ -3216,6 +3242,8 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
         },
         .slaves         = omap44xx_mcbsp4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mcbsp4_slaves),
+        .opt_clks       = mcbsp4_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(mcbsp4_opt_clks),
 };
 
 /*
diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c
index 9262a6b47702..de6d46451746 100644
--- a/arch/arm/mach-omap2/opp.c
+++ b/arch/arm/mach-omap2/opp.c
@@ -64,10 +64,10 @@ int __init omap_init_opp_table(struct omap_opp_def *opp_def,
                 }
                 oh = omap_hwmod_lookup(opp_def->hwmod_name);
                 if (!oh || !oh->od) {
-                        pr_warn("%s: no hwmod or odev for %s, [%d] "
+                        pr_debug("%s: no hwmod or odev for %s, [%d] "
                                 "cannot add OPPs.\n", __func__,
                                 opp_def->hwmod_name, i);
-                        return -EINVAL;
+                        continue;
                 }
                 dev = &oh->od->pdev->dev;
 
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index a7bdec69a2b3..d0c1c9695996 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -17,6 +17,8 @@
 #include <linux/export.h>
 #include <linux/suspend.h>
 
+#include <asm/system_misc.h>
+
 #include <plat/omap-pm.h>
 #include <plat/omap_device.h>
 #include "common.h"
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 5ca45ca76946..95442b69ae27 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -33,6 +33,7 @@
 #include <asm/mach/time.h>
 #include <asm/mach/irq.h>
 #include <asm/mach-types.h>
+#include <asm/system_misc.h>
 
 #include <plat/clock.h>
 #include <plat/sram.h>
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 027a537d72b2..703bd1099259 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -31,6 +31,7 @@
 #include <trace/events/power.h>
 
 #include <asm/suspend.h>
+#include <asm/system_misc.h>
 
 #include <plat/sram.h>
 #include "clockdomain.h"
@@ -152,8 +153,7 @@ static void omap3_save_secure_ram_context(void)
                 pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state);
                 /* Following is for error tracking, it should not happen */
                 if (ret) {
-                        printk(KERN_ERR "save_secure_sram() returns %08x\n",
-                                ret);
+                        pr_err("save_secure_sram() returns %08x\n", ret);
                         while (1)
                                 ;
                 }
@@ -288,7 +288,7 @@ void omap_sram_idle(void)
                 break;
         default:
                 /* Invalid state */
-                printk(KERN_ERR "Invalid mpu state in sram_idle\n");
+                pr_err("Invalid mpu state in sram_idle\n");
                 return;
         }
 
@@ -438,18 +438,17 @@ restore:
         list_for_each_entry(pwrst, &pwrst_list, node) {
                 state = pwrdm_read_prev_pwrst(pwrst->pwrdm);
                 if (state > pwrst->next_state) {
-                        printk(KERN_INFO "Powerdomain (%s) didn't enter "
-                               "target state %d\n",
+                        pr_info("Powerdomain (%s) didn't enter "
+                                "target state %d\n",
                                pwrst->pwrdm->name, pwrst->next_state);
                         ret = -1;
                 }
                 omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state);
         }
         if (ret)
-                printk(KERN_ERR "Could not enter target state in pm_suspend\n");
+                pr_err("Could not enter target state in pm_suspend\n");
         else
-                printk(KERN_INFO "Successfully put all powerdomains "
-                       "to target state\n");
+                pr_info("Successfully put all powerdomains to target state\n");
 
         return ret;
 }
@@ -733,21 +732,22 @@ static int __init omap3_pm_init(void)
 
         if (ret) {
                 pr_err("pm: Failed to request pm_io irq\n");
-                goto err1;
+                goto err2;
         }
 
         ret = pwrdm_for_each(pwrdms_setup, NULL);
         if (ret) {
-                printk(KERN_ERR "Failed to setup powerdomains\n");
-                goto err2;
+                pr_err("Failed to setup powerdomains\n");
+                goto err3;
         }
 
         (void) clkdm_for_each(omap_pm_clkdms_setup, NULL);
 
         mpu_pwrdm = pwrdm_lookup("mpu_pwrdm");
         if (mpu_pwrdm == NULL) {
-                printk(KERN_ERR "Failed to get mpu_pwrdm\n");
-                goto err2;
+                pr_err("Failed to get mpu_pwrdm\n");
+                ret = -EINVAL;
+                goto err3;
         }
 
         neon_pwrdm = pwrdm_lookup("neon_pwrdm");
@@ -780,8 +780,8 @@ static int __init omap3_pm_init(void)
                 omap3_secure_ram_storage =
                         kmalloc(0x803F, GFP_KERNEL);
                 if (!omap3_secure_ram_storage)
-                        printk(KERN_ERR "Memory allocation failed when"
-                                        "allocating for secure sram context\n");
+                        pr_err("Memory allocation failed when "
+                               "allocating for secure sram context\n");
 
                 local_irq_disable();
                 local_fiq_disable();
@@ -795,14 +795,17 @@ static int __init omap3_pm_init(void)
         }
 
         omap3_save_scratchpad_contents();
-err1:
         return ret;
-err2:
-        free_irq(INT_34XX_PRCM_MPU_IRQ, NULL);
+
+err3:
         list_for_each_entry_safe(pwrst, tmp, &pwrst_list, node) {
                 list_del(&pwrst->node);
                 kfree(pwrst);
         }
+        free_irq(omap_prcm_event_to_irq("io"), omap3_pm_init);
+err2:
+        free_irq(omap_prcm_event_to_irq("wkup"), NULL);
+err1:
         return ret;
 }
 
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 91e0b1c9b76c..885625352429 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -16,6 +16,7 @@
 #include <linux/list.h>
 #include <linux/err.h>
 #include <linux/slab.h>
+#include <asm/system_misc.h>
 
 #include "common.h"
 #include "clockdomain.h"
@@ -143,7 +144,7 @@ static void omap_default_idle(void)
 static int __init omap4_pm_init(void)
 {
         int ret;
-        struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm;
+        struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm, *l4wkup;
         struct clockdomain *ducati_clkdm, *l3_2_clkdm, *l4_per_clkdm;
 
         if (!cpu_is_omap44xx())
@@ -167,14 +168,19 @@ static int __init omap4_pm_init(void)
          * MPUSS -> L4_PER/L3_* and DUCATI -> L3_* doesn't work as
          * expected. The hardware recommendation is to enable static
          * dependencies for these to avoid system lock ups or random crashes.
+         * The L4 wakeup depedency is added to workaround the OCP sync hardware
+         * BUG with 32K synctimer which lead to incorrect timer value read
+         * from the 32K counter. The BUG applies for GPTIMER1 and WDT2 which
+         * are part of L4 wakeup clockdomain.
          */
         mpuss_clkdm = clkdm_lookup("mpuss_clkdm");
         emif_clkdm = clkdm_lookup("l3_emif_clkdm");
         l3_1_clkdm = clkdm_lookup("l3_1_clkdm");
         l3_2_clkdm = clkdm_lookup("l3_2_clkdm");
         l4_per_clkdm = clkdm_lookup("l4_per_clkdm");
+        l4wkup = clkdm_lookup("l4_wkup_clkdm");
         ducati_clkdm = clkdm_lookup("ducati_clkdm");
-        if ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm) ||
+        if ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm) || (!l4wkup) ||
                 (!l3_2_clkdm) || (!ducati_clkdm) || (!l4_per_clkdm))
                 goto err2;
 
@@ -182,6 +188,7 @@ static int __init omap4_pm_init(void)
         ret |= clkdm_add_wkdep(mpuss_clkdm, l3_1_clkdm);
         ret |= clkdm_add_wkdep(mpuss_clkdm, l3_2_clkdm);
         ret |= clkdm_add_wkdep(mpuss_clkdm, l4_per_clkdm);
+        ret |= clkdm_add_wkdep(mpuss_clkdm, l4wkup);
         ret |= clkdm_add_wkdep(ducati_clkdm, l3_1_clkdm);
         ret |= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm);
         if (ret) {
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 8a18d1bd61c8..96ad3dbeac34 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -972,7 +972,13 @@ int pwrdm_wait_transition(struct powerdomain *pwrdm)
 
 int pwrdm_state_switch(struct powerdomain *pwrdm)
 {
-        return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
+        int ret;
+
+        ret = pwrdm_wait_transition(pwrdm);
+        if (!ret)
+                ret = _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
+
+        return ret;
 }
 
 int pwrdm_clkdm_state_switch(struct clockdomain *clkdm)
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index eac623c7c3d8..f106d21ff581 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -147,8 +147,9 @@ static inline u32 _read_pending_irq_reg(u16 irqen_offs, u16 irqst_offs)
         u32 mask, st;
 
         /* XXX read mask from RAM? */
-        mask = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, irqen_offs);
-        st = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, irqst_offs);
+        mask = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
+                                       irqen_offs);
+        st = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, irqst_offs);
 
         return mask & st;
 }
@@ -180,7 +181,7 @@ void omap44xx_prm_read_pending_irqs(unsigned long *events)
  */
 void omap44xx_prm_ocp_barrier(void)
 {
-        omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
+        omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
                                 OMAP4_REVISION_PRM_OFFSET);
 }
 
@@ -198,19 +199,19 @@ void omap44xx_prm_ocp_barrier(void)
 void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
 {
         saved_mask[0] =
-                omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
+                omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
                                         OMAP4_PRM_IRQSTATUS_MPU_OFFSET);
         saved_mask[1] =
-                omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
+                omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
                                         OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET);
 
-        omap4_prm_write_inst_reg(0, OMAP4430_PRM_DEVICE_INST,
+        omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
                                  OMAP4_PRM_IRQENABLE_MPU_OFFSET);
-        omap4_prm_write_inst_reg(0, OMAP4430_PRM_DEVICE_INST,
+        omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
                                  OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
 
         /* OCP barrier */
-        omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
+        omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
                                 OMAP4_REVISION_PRM_OFFSET);
 }
 
@@ -226,9 +227,9 @@ void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
  */
 void omap44xx_prm_restore_irqen(u32 *saved_mask)
 {
-        omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_DEVICE_INST,
+        omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_OCP_SOCKET_INST,
                                  OMAP4_PRM_IRQENABLE_MPU_OFFSET);
-        omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_DEVICE_INST,
+        omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_OCP_SOCKET_INST,
                                  OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
 }
 
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 873b51d494ea..d28f848897d6 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -290,7 +290,7 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
                 goto err;
         }
 
-        for (i = 0; i <= irq_setup->nr_regs; i++) {
+        for (i = 0; i < irq_setup->nr_regs; i++) {
                 gc = irq_alloc_generic_chip("PRCM", 1,
                         irq_setup->base_irq + i * 32, prm_base,
                         handle_level_irq);
diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S
index abd283400490..9f6b83d1b193 100644
--- a/arch/arm/mach-omap2/sleep44xx.S
+++ b/arch/arm/mach-omap2/sleep44xx.S
@@ -10,7 +10,6 @@
  */
 
 #include <linux/linkage.h>
-#include <asm/system.h>
 #include <asm/smp_scu.h>
 #include <asm/memory.h>
 #include <asm/hardware/cache-l2x0.h>
diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
index f51348dafafd..dde8a11f47d5 100644
--- a/arch/arm/mach-omap2/usb-host.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -54,7 +54,7 @@ static struct omap_device_pm_latency omap_uhhtll_latency[] = {
 /*
  * setup_ehci_io_mux - initialize IO pad mux for USBHOST
  */
-static void setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
+static void __init setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
 {
         switch (port_mode[0]) {
         case OMAP_EHCI_PORT_MODE_PHY:
@@ -197,7 +197,8 @@ static void setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
         return;
 }
 
-static void setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
+static
+void __init setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
 {
         switch (port_mode[0]) {
         case OMAP_EHCI_PORT_MODE_PHY:
@@ -315,7 +316,7 @@ static void setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
         }
 }
 
-static void setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
+static void __init setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
 {
         switch (port_mode[0]) {
         case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
@@ -412,7 +413,8 @@ static void setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
         }
 }
 
-static void setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
+static
+void __init setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
 {
         switch (port_mode[0]) {
         case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 5dad38ec00ea..24481666d2cd 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -21,6 +21,7 @@
 #include <net/dsa.h>
 #include <asm/page.h>
 #include <asm/setup.h>
+#include <asm/system_misc.h>
 #include <asm/timex.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index d2513ac79ff5..2e6454c8d4ba 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -57,5 +57,14 @@ struct meminfo;
 struct tag;
 extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *);
 
+/*****************************************************************************
+ * Helpers to access Orion registers
+ ****************************************************************************/
+/*
+ * These are not preempt-safe.  Locks, if needed, must be taken
+ * care of by the caller.
+ */
+#define orion5x_setbits(r, mask)        writel(readl(r) | (mask), (r))
+#define orion5x_clrbits(r, mask)        writel(readl(r) & ~(mask), (r))
 
 #endif
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 91b0f4788597..c3ed15b8ea25 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -32,6 +32,7 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/pci.h>
+#include <asm/system_info.h>
 #include <mach/orion5x.h>
 #include "common.h"
 #include "mpp.h"
diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h
deleted file mode 100644
index e9d9afdc2659..000000000000
--- a/arch/arm/mach-orion5x/include/mach/io.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * arch/arm/mach-orion5x/include/mach/io.h
- *
- * Tzachi Perelstein <tzachi@marvell.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_IO_H
-#define __ASM_ARCH_IO_H
-
-#include "orion5x.h"
-
-#define IO_SPACE_LIMIT          0xffffffff
-
-#define __io(a)                 __typesafe_io(a)
-#define __mem_pci(a)            (a)
-
-
-/*****************************************************************************
- * Helpers to access Orion registers
- ****************************************************************************/
-/*
- * These are not preempt-safe.  Locks, if needed, must be taken
- * care of by the caller.
- */
-#define orion5x_setbits(r, mask)        writel(readl(r) | (mask), (r))
-#define orion5x_clrbits(r, mask)        writel(readl(r) & ~(mask), (r))
-
-
-#endif
diff --git a/arch/arm/mach-orion5x/ls-chl-setup.c b/arch/arm/mach-orion5x/ls-chl-setup.c
index 527213169db0..0c9e413b5805 100644
--- a/arch/arm/mach-orion5x/ls-chl-setup.c
+++ b/arch/arm/mach-orion5x/ls-chl-setup.c
@@ -22,7 +22,6 @@
 #include <linux/gpio.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <asm/system.h>
 #include <mach/orion5x.h>
 #include "common.h"
 #include "mpp.h"
diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c
index 9a8697b97dd7..c1b5d8a58037 100644
--- a/arch/arm/mach-orion5x/ls_hgl-setup.c
+++ b/arch/arm/mach-orion5x/ls_hgl-setup.c
@@ -21,7 +21,6 @@
 #include <linux/gpio.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <asm/system.h>
 #include <mach/orion5x.h>
 #include "common.h"
 #include "mpp.h"
diff --git a/arch/arm/mach-orion5x/lsmini-setup.c b/arch/arm/mach-orion5x/lsmini-setup.c
index 09c73659f467..949eaa8f12e3 100644
--- a/arch/arm/mach-orion5x/lsmini-setup.c
+++ b/arch/arm/mach-orion5x/lsmini-setup.c
@@ -21,7 +21,6 @@
 #include <linux/gpio.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <asm/system.h>
 #include <mach/orion5x.h>
 #include "common.h"
 #include "mpp.h"
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index d6a91948e4dc..cb19e1661bb3 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -19,6 +19,7 @@
 #include <asm/mach/pci.h>
 #include <plat/pcie.h>
 #include <plat/addr-map.h>
+#include <mach/orion5x.h>
 #include "common.h"
 
 /*****************************************************************************
diff --git a/arch/arm/mach-orion5x/tsx09-common.c b/arch/arm/mach-orion5x/tsx09-common.c
index c9abb8fbfa70..7189827d641d 100644
--- a/arch/arm/mach-orion5x/tsx09-common.c
+++ b/arch/arm/mach-orion5x/tsx09-common.c
@@ -15,6 +15,7 @@
 #include <linux/mv643xx_eth.h>
 #include <linux/timex.h>
 #include <linux/serial_reg.h>
+#include <mach/orion5x.h>
 #include "tsx09-common.h"
 #include "common.h"
 
diff --git a/arch/arm/mach-picoxcell/include/mach/io.h b/arch/arm/mach-picoxcell/include/mach/io.h
deleted file mode 100644
index 7573ec7d10a3..000000000000
--- a/arch/arm/mach-picoxcell/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * Copyright (c) 2011 Picochip Ltd., Jamie Iles
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-/* No ioports, but needed for driver compatibility. */
-#define __io(a)                 __typesafe_io(a)
-/* No PCI possible on picoxcell. */
-#define __mem_pci(a)            (a)
-
-#endif /* __ASM_ARM_ARCH_IO_H */
diff --git a/arch/arm/mach-picoxcell/include/mach/irqs.h b/arch/arm/mach-picoxcell/include/mach/irqs.h
deleted file mode 100644
index 59eac1ee2820..000000000000
--- a/arch/arm/mach-picoxcell/include/mach/irqs.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * Copyright (c) 2011 Picochip Ltd., Jamie Iles
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef __MACH_IRQS_H
-#define __MACH_IRQS_H
-
-/* We dynamically allocate our irq_desc's. */
-#define NR_IRQS                         0
-
-#endif /* __MACH_IRQS_H */
diff --git a/arch/arm/mach-pnx4008/core.c b/arch/arm/mach-pnx4008/core.c
index 4cfb40b2ec19..be4c92858509 100644
--- a/arch/arm/mach-pnx4008/core.c
+++ b/arch/arm/mach-pnx4008/core.c
@@ -32,7 +32,7 @@
 #include <asm/mach-types.h>
 #include <asm/pgtable.h>
 #include <asm/page.h>
-#include <asm/system.h>
+#include <asm/system_misc.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
diff --git a/arch/arm/mach-pnx4008/dma.c b/arch/arm/mach-pnx4008/dma.c
index 7fa4bf2e2125..a4739e9fb2fb 100644
--- a/arch/arm/mach-pnx4008/dma.c
+++ b/arch/arm/mach-pnx4008/dma.c
@@ -24,7 +24,6 @@
 #include <linux/io.h>
 #include <linux/gfp.h>
 
-#include <asm/system.h>
 #include <mach/hardware.h>
 #include <mach/dma.h>
 #include <asm/dma-mapping.h>
diff --git a/arch/arm/mach-pnx4008/include/mach/io.h b/arch/arm/mach-pnx4008/include/mach/io.h
deleted file mode 100644
index cbf0904540ea..000000000000
--- a/arch/arm/mach-pnx4008/include/mach/io.h
+++ /dev/null
@@ -1,21 +0,0 @@
-
-/*
- *  arch/arm/mach-pnx4008/include/mach/io.h
- *
- * Author: Dmitry Chigirev <chigirev@ru.mvista.com>
- *
- * 2005 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-pnx4008/irq.c b/arch/arm/mach-pnx4008/irq.c
index 7608c7a288cf..41e4201972d5 100644
--- a/arch/arm/mach-pnx4008/irq.c
+++ b/arch/arm/mach-pnx4008/irq.c
@@ -28,7 +28,6 @@
 #include <asm/setup.h>
 #include <asm/pgtable.h>
 #include <asm/page.h>
-#include <asm/system.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/map.h>
diff --git a/arch/arm/mach-pnx4008/time.c b/arch/arm/mach-pnx4008/time.c
index 0c8aad4bb0dc..0cfe8af3d3be 100644
--- a/arch/arm/mach-pnx4008/time.c
+++ b/arch/arm/mach-pnx4008/time.c
@@ -24,7 +24,6 @@
 #include <linux/irq.h>
 #include <linux/io.h>
 
-#include <asm/system.h>
 #include <mach/hardware.h>
 #include <asm/leds.h>
 #include <asm/mach/time.h>
diff --git a/arch/arm/mach-prima2/include/mach/io.h b/arch/arm/mach-prima2/include/mach/io.h
deleted file mode 100644
index 6c31e9ec279e..000000000000
--- a/arch/arm/mach-prima2/include/mach/io.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * arch/arm/mach-prima2/include/mach/io.h
- *
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- *
- * Licensed under GPLv2 or later.
- */
-
-#ifndef __MACH_PRIMA2_IO_H
-#define __MACH_PRIMA2_IO_H
-
-#define IO_SPACE_LIMIT ((resource_size_t)0)
-
-#define __mem_pci(a)            (a)
-
-#endif
diff --git a/arch/arm/mach-prima2/timer.c b/arch/arm/mach-prima2/timer.c
index b7a6091ce791..0d024b1e916d 100644
--- a/arch/arm/mach-prima2/timer.c
+++ b/arch/arm/mach-prima2/timer.c
@@ -18,6 +18,7 @@
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <mach/map.h>
+#include <asm/sched_clock.h>
 #include <asm/mach/time.h>
 
 #define SIRFSOC_TIMER_COUNTER_LO        0x0000
@@ -165,21 +166,9 @@ static struct irqaction sirfsoc_timer_irq = {
 };
 
 /* Overwrite weak default sched_clock with more precise one */
-unsigned long long notrace sched_clock(void)
+static u32 notrace sirfsoc_read_sched_clock(void)
 {
-        static int is_mapped;
-
-        /*
-         * sched_clock is called earlier than .init of sys_timer
-         * if we map timer memory in .init of sys_timer, system
-         * will panic due to illegal memory access
-         */
-        if (!is_mapped) {
-                sirfsoc_of_timer_map();
-                is_mapped = 1;
-        }
-
-        return sirfsoc_timer_read(NULL) * (NSEC_PER_SEC / CLOCK_TICK_RATE);
+        return (u32)(sirfsoc_timer_read(NULL) & 0xffffffff);
 }
 
 static void __init sirfsoc_clockevent_init(void)
@@ -210,6 +199,8 @@ static void __init sirfsoc_timer_init(void)
         BUG_ON(rate < CLOCK_TICK_RATE);
         BUG_ON(rate % CLOCK_TICK_RATE);
 
+        sirfsoc_of_timer_map();
+
         writel_relaxed(rate / CLOCK_TICK_RATE / 2 - 1, sirfsoc_timer_base + SIRFSOC_TIMER_DIV);
         writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_LO);
         writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI);
@@ -217,6 +208,8 @@ static void __init sirfsoc_timer_init(void)
 
         BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE));
 
+        setup_sched_clock(sirfsoc_read_sched_clock, 32, CLOCK_TICK_RATE);
+
         BUG_ON(setup_irq(sirfsoc_timer_irq.irq, &sirfsoc_timer_irq));
 
         sirfsoc_clockevent_init();
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 61d3c72ded84..fe2d1f80ef50 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -108,10 +108,12 @@ config CSB726_CSB701
 
 config MACH_ARMCORE
         bool "CompuLab CM-X255/CM-X270 modules"
+        select ARCH_HAS_DMA_SET_COHERENT_MASK if PCI
         select PXA27x
         select IWMMXT
         select PXA25x
         select MIGHT_HAVE_PCI
+        select NEED_MACH_IO_H if PCI
 
 config MACH_EM_X270
         bool "CompuLab EM-x270 platform"
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c
index c91727d1fe09..9a8760b72913 100644
--- a/arch/arm/mach-pxa/capc7117.c
+++ b/arch/arm/mach-pxa/capc7117.c
@@ -150,6 +150,7 @@ MACHINE_START(CAPC7117,
               "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM")
         .atag_offset = 0x100,
         .map_io = pxa3xx_map_io,
+        .nr_irqs = PXA_NR_IRQS,
         .init_irq = pxa3xx_init_irq,
         .handle_irq = pxa3xx_handle_irq,
         .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/clock-pxa2xx.c b/arch/arm/mach-pxa/clock-pxa2xx.c
index 1d5859d9a0e3..9ee2ad6a0a07 100644
--- a/arch/arm/mach-pxa/clock-pxa2xx.c
+++ b/arch/arm/mach-pxa/clock-pxa2xx.c
@@ -9,6 +9,7 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/io.h>
 #include <linux/syscore_ops.h>
 
 #include <mach/pxa2xx-regs.h>
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index 4b981b82d2a5..313274016277 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -44,6 +44,7 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/setup.h>
+#include <asm/system_info.h>
 
 #include <mach/pxa300.h>
 #include <mach/pxa27x-udc.h>
@@ -713,7 +714,6 @@ struct da9030_battery_info cm_x300_battery_info = {
 
 static struct regulator_consumer_supply buck2_consumers[] = {
         {
-                .dev = NULL,
                 .supply = "vcc_core",
         },
 };
@@ -853,6 +853,7 @@ static void __init cm_x300_fixup(struct tag *tags, char **cmdline,
 MACHINE_START(CM_X300, "CM-X300 module")
         .atag_offset    = 0x100,
         .map_io         = pxa3xx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c
index 29d5d541f602..b2f227d36125 100644
--- a/arch/arm/mach-pxa/colibri-pxa270.c
+++ b/arch/arm/mach-pxa/colibri-pxa270.c
@@ -310,6 +310,7 @@ MACHINE_START(COLIBRI, "Toradex Colibri PXA270")
         .atag_offset    = 0x100,
         .init_machine   = colibri_pxa270_init,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
@@ -320,6 +321,7 @@ MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC")
         .atag_offset    = 0x100,
         .init_machine   = colibri_pxa270_income_init,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index 0846d210cb05..bb6def8ec979 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -186,6 +186,7 @@ MACHINE_START(COLIBRI300, "Toradex Colibri PXA300")
         .atag_offset    = 0x100,
         .init_machine   = colibri_pxa300_init,
         .map_io         = pxa3xx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index 6ad3359063af..d88e7b37f1da 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -256,6 +256,7 @@ MACHINE_START(COLIBRI320, "Toradex Colibri PXA320")
         .atag_offset    = 0x100,
         .init_machine   = colibri_pxa320_init,
         .map_io         = pxa3xx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/colibri-pxa3xx.c b/arch/arm/mach-pxa/colibri-pxa3xx.c
index 2b8ca0de8a3d..68cc75fac219 100644
--- a/arch/arm/mach-pxa/colibri-pxa3xx.c
+++ b/arch/arm/mach-pxa/colibri-pxa3xx.c
@@ -18,6 +18,7 @@
 #include <asm/mach-types.h>
 #include <mach/hardware.h>
 #include <asm/sizes.h>
+#include <asm/system_info.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/irq.h>
 #include <mach/pxa3xx-regs.h>
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 11f1e735966e..c1fe32db4755 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -40,7 +40,6 @@
 #include <asm/mach-types.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
-#include <asm/system.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -730,6 +729,7 @@ static void __init fixup_corgi(struct tag *tags, char **cmdline,
 MACHINE_START(CORGI, "SHARP Corgi")
         .fixup          = fixup_corgi,
         .map_io         = pxa25x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .init_machine   = corgi_init,
@@ -742,6 +742,7 @@ MACHINE_END
 MACHINE_START(SHEPHERD, "SHARP Shepherd")
         .fixup          = fixup_corgi,
         .map_io         = pxa25x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .init_machine   = corgi_init,
@@ -754,6 +755,7 @@ MACHINE_END
 MACHINE_START(HUSKY, "SHARP Husky")
         .fixup          = fixup_corgi,
         .map_io         = pxa25x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .init_machine   = corgi_init,
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index 39e265cfc86d..048c4299473c 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -19,6 +19,7 @@
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 #include <linux/apm-emulation.h>
+#include <linux/io.h>
 
 #include <asm/irq.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-pxa/cpufreq-pxa3xx.c b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
index 88fbec05ec50..b85b4ab7aac6 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa3xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
@@ -15,6 +15,7 @@
 #include <linux/init.h>
 #include <linux/cpufreq.h>
 #include <linux/slab.h>
+#include <linux/io.h>
 
 #include <mach/pxa3xx-regs.h>
 
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c
index fb5a51d834e5..67f0de37f46e 100644
--- a/arch/arm/mach-pxa/csb726.c
+++ b/arch/arm/mach-pxa/csb726.c
@@ -274,6 +274,7 @@ static void __init csb726_init(void)
 MACHINE_START(CSB726, "Cogent CSB726")
         .atag_offset    = 0x100,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq       = pxa27x_handle_irq,
         .init_machine   = csb726_init,
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index 84f2d7015cfe..166eee5b8a70 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -12,6 +12,7 @@
 #include <mach/pxafb.h>
 #include <mach/mmc.h>
 #include <mach/irda.h>
+#include <mach/irqs.h>
 #include <mach/ohci.h>
 #include <plat/pxa27x_keypad.h>
 #include <mach/camera.h>
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index d80c0ba9a095..16ec557b8e43 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -1083,19 +1083,19 @@ static void __init em_x270_userspace_consumers_init(void)
 }
 
 /* DA9030 related initializations */
-#define REGULATOR_CONSUMER(_name, _dev, _supply)                               \
+#define REGULATOR_CONSUMER(_name, _dev_name, _supply)                   \
         static struct regulator_consumer_supply _name##_consumers[] = { \
                 {                                                       \
-                        .dev = _dev,                                    \
+                        .dev_name = _dev_name,                          \
                         .supply = _supply,                              \
                 },                                                      \
         }
 
-REGULATOR_CONSUMER(ldo3, &em_x270_gps_userspace_consumer.dev, "vcc gps");
+REGULATOR_CONSUMER(ldo3, "reg-userspace-consumer.0", "vcc gps");
 REGULATOR_CONSUMER(ldo5, NULL, "vcc cam");
-REGULATOR_CONSUMER(ldo10, &pxa_device_mci.dev, "vcc sdio");
+REGULATOR_CONSUMER(ldo10, "pxa2xx-mci", "vcc sdio");
 REGULATOR_CONSUMER(ldo12, NULL, "vcc usb");
-REGULATOR_CONSUMER(ldo19, &em_x270_gprs_userspace_consumer.dev, "vcc gprs");
+REGULATOR_CONSUMER(ldo19, "reg-userspace-consumer.1", "vcc gprs");
 REGULATOR_CONSUMER(buck2, NULL, "vcc_core");
 
 #define REGULATOR_INIT(_ldo, _min_uV, _max_uV, _ops_mask)               \
@@ -1301,6 +1301,7 @@ static void __init em_x270_init(void)
 MACHINE_START(EM_X270, "Compulab EM-X270")
         .atag_offset    = 0x100,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
@@ -1311,6 +1312,7 @@ MACHINE_END
 MACHINE_START(EXEDA, "Compulab eXeda")
         .atag_offset    = 0x100,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 5432ecb15def..42254175fcf4 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -22,7 +22,6 @@
 #include <linux/init.h>
 
 #include <mach/hardware.h>
-#include <asm/system.h>
 #include <asm/mach/map.h>
 #include <asm/mach-types.h>
 
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index ac3b1cef4751..e529a35a44ce 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -235,6 +235,7 @@ static void __init gumstix_init(void)
 MACHINE_START(GUMSTIX, "Gumstix")
         .atag_offset    = 0x100, /* match u-boot bi_boot_params */
         .map_io         = pxa25x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c
index fde6b4c873c4..e7dec589f014 100644
--- a/arch/arm/mach-pxa/h5000.c
+++ b/arch/arm/mach-pxa/h5000.c
@@ -205,6 +205,7 @@ static void __init h5000_init(void)
 MACHINE_START(H5400, "HP iPAQ H5000")
         .atag_offset = 0x100,
         .map_io = pxa25x_map_io,
+        .nr_irqs = PXA_NR_IRQS,
         .init_irq = pxa25x_init_irq,
         .handle_irq = pxa25x_handle_irq,
         .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c
index 26d069a9f900..2962de898da9 100644
--- a/arch/arm/mach-pxa/himalaya.c
+++ b/arch/arm/mach-pxa/himalaya.c
@@ -160,6 +160,7 @@ static void __init himalaya_init(void)
 MACHINE_START(HIMALAYA, "HTC Himalaya")
         .atag_offset = 0x100,
         .map_io = pxa25x_map_io,
+        .nr_irqs = PXA_NR_IRQS,
         .init_irq = pxa25x_init_irq,
         .handle_irq = pxa25x_handle_irq,
         .init_machine = himalaya_init,
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 3fa929d4a4f5..b83b95a29503 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -681,11 +681,9 @@ static struct platform_device power_supply = {
 
 static struct regulator_consumer_supply bq24022_consumers[] = {
         {
-                .dev = &gpio_vbus.dev,
                 .supply = "vbus_draw",
         },
         {
-                .dev = &power_supply.dev,
                 .supply = "ac_draw",
         },
 };
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
index 67400192ed3b..1d02eabc9c65 100644
--- a/arch/arm/mach-pxa/icontrol.c
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -193,6 +193,7 @@ static void __init icontrol_init(void)
 MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM")
         .atag_offset    = 0x100,
         .map_io         = pxa3xx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index 8af1840e12cc..6ff466bd43e8 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -195,6 +195,7 @@ static void __init idp_map_io(void)
 MACHINE_START(PXA_IDP, "Vibren PXA255 IDP")
         /* Maintainer: Vibren Technologies */
         .map_io         = idp_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index 8184669dde28..56d92e5cad85 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -40,7 +40,6 @@
 #define io_p2v(x) IOMEM(0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1))
 
 #ifndef __ASSEMBLY__
-# define IOMEM(x) ((void __iomem *)(x))
 # define __REG(x)       (*((volatile u32 __iomem *)io_p2v(x)))
 
 /* With indexed regs we don't want to feed the index through io_p2v()
@@ -52,7 +51,6 @@
 
 #else
 
-# define IOMEM(x)       x 
 # define __REG(x)       io_p2v(x)
 # define __PREG(x)      io_v2p(x)
 
@@ -337,8 +335,4 @@ extern unsigned int get_memclk_frequency_10khz(void);
 extern unsigned long get_clock_tick_rate(void);
 #endif
 
-#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
-#define ARCH_HAS_DMA_SET_COHERENT_MASK
-#endif
-
 #endif  /* _ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-pxa/include/mach/io.h b/arch/arm/mach-pxa/include/mach/io.h
index fdca3be47d9b..cd78b7fe3567 100644
--- a/arch/arm/mach-pxa/include/mach/io.h
+++ b/arch/arm/mach-pxa/include/mach/io.h
@@ -6,8 +6,6 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#include <mach/hardware.h>
-
 #define IO_SPACE_LIMIT 0xffffffff
 
 /*
@@ -15,6 +13,5 @@
  * drivers out there that might just work if we fake them...
  */
 #define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 32975adf3ca4..8765782dd955 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -100,7 +100,7 @@
  */
 #define IRQ_BOARD_START         (PXA_GPIO_IRQ_BASE + PXA_NR_BUILTIN_GPIO)
 
-#define NR_IRQS                 (IRQ_BOARD_START)
+#define PXA_NR_IRQS             (IRQ_BOARD_START)
 
 #ifndef __ASSEMBLY__
 struct irq_data;
diff --git a/arch/arm/mach-pxa/include/mach/mainstone.h b/arch/arm/mach-pxa/include/mach/mainstone.h
index 4c2d11cd824d..1bfc4e822a41 100644
--- a/arch/arm/mach-pxa/include/mach/mainstone.h
+++ b/arch/arm/mach-pxa/include/mach/mainstone.h
@@ -13,6 +13,8 @@
 #ifndef ASM_ARCH_MAINSTONE_H
 #define ASM_ARCH_MAINSTONE_H
 
+#include <mach/irqs.h>
+
 #define MST_ETH_PHYS            PXA_CS4_PHYS
 
 #define MST_FPGA_PHYS           PXA_CS2_PHYS
diff --git a/arch/arm/mach-pxa/leds-idp.c b/arch/arm/mach-pxa/leds-idp.c
index 8b9c17142d5a..06b060025d11 100644
--- a/arch/arm/mach-pxa/leds-idp.c
+++ b/arch/arm/mach-pxa/leds-idp.c
@@ -16,7 +16,6 @@
 
 #include <mach/hardware.h>
 #include <asm/leds.h>
-#include <asm/system.h>
 
 #include <mach/pxa25x.h>
 #include <mach/idp.h>
diff --git a/arch/arm/mach-pxa/leds-lubbock.c b/arch/arm/mach-pxa/leds-lubbock.c
index e26d5efe1969..0bd85c884a7c 100644
--- a/arch/arm/mach-pxa/leds-lubbock.c
+++ b/arch/arm/mach-pxa/leds-lubbock.c
@@ -15,7 +15,6 @@
 
 #include <mach/hardware.h>
 #include <asm/leds.h>
-#include <asm/system.h>
 #include <mach/pxa25x.h>
 #include <mach/lubbock.h>
 
diff --git a/arch/arm/mach-pxa/leds-mainstone.c b/arch/arm/mach-pxa/leds-mainstone.c
index db4af5eee8b2..4058ab340fe6 100644
--- a/arch/arm/mach-pxa/leds-mainstone.c
+++ b/arch/arm/mach-pxa/leds-mainstone.c
@@ -14,7 +14,6 @@
 
 #include <mach/hardware.h>
 #include <asm/leds.h>
-#include <asm/system.h>
 
 #include <mach/pxa27x.h>
 #include <mach/mainstone.h>
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 6ebd276aebeb..6bb3f47b1f14 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -223,6 +223,7 @@ static struct resource sa1111_resources[] = {
 
 static struct sa1111_platform_data sa1111_info = {
         .irq_base       = LUBBOCK_SA1111_IRQ_BASE,
+        .disable_devs   = SA1111_DEVID_SAC,
 };
 
 static struct platform_device sa1111_device = {
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 5e26f3e93fdd..8de0651d7efb 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -34,6 +34,7 @@
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/system_info.h>
 
 #include <mach/pxa27x.h>
 #include <mach/magician.h>
@@ -579,11 +580,9 @@ static struct platform_device power_supply = {
 
 static struct regulator_consumer_supply bq24022_consumers[] = {
         {
-                .dev = &gpio_vbus.dev,
                 .supply = "vbus_draw",
         },
         {
-                .dev = &power_supply.dev,
                 .supply = "ac_draw",
         },
 };
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 29b62afc6f7c..b0a842887780 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -17,6 +17,7 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/io.h>
 #include <linux/syscore_ops.h>
 
 #include <mach/pxa2xx-regs.h>
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index e80a3db735c2..061d57009cee 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -758,6 +758,7 @@ MACHINE_START(MIOA701, "MIO A701")
         .atag_offset    = 0x100,
         .restart_mode   = 's',
         .map_io         = &pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = &pxa27x_init_irq,
         .handle_irq     = &pxa27x_handle_irq,
         .init_machine   = mioa701_machine_init,
diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c
index 169bf8f97af0..152efbf093f6 100644
--- a/arch/arm/mach-pxa/mp900.c
+++ b/arch/arm/mach-pxa/mp900.c
@@ -95,6 +95,7 @@ MACHINE_START(NEC_MP900, "MobilePro900/C")
         .atag_offset    = 0x220100,
         .timer          = &pxa_timer,
         .map_io         = pxa25x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .init_machine   = mp900c_init,
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index 1fa80f4f80c8..31e0433d83ba 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -344,6 +344,7 @@ static void __init palmld_init(void)
 MACHINE_START(PALMLD, "Palm LifeDrive")
         .atag_offset    = 0x100,
         .map_io         = palmld_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 5ba14316bd9c..0f6bd4fcfa3b 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -205,6 +205,7 @@ MACHINE_START(PALMT5, "Palm Tungsten|T5")
         .atag_offset    = 0x100,
         .map_io         = pxa27x_map_io,
         .reserve        = palmt5_reserve,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index 29b51b40f09d..e2d97eed07a7 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -539,6 +539,7 @@ static void __init palmtc_init(void)
 MACHINE_START(PALMTC, "Palm Tungsten|C")
         .atag_offset    = 0x100,
         .map_io         = pxa25x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index 5ebf49acb827..c054827c567f 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -358,6 +358,7 @@ static void __init palmte2_init(void)
 MACHINE_START(PALMTE2, "Palm Tungsten|E2")
         .atag_offset    = 0x100,
         .map_io         = pxa25x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c
index ec8249156c08..fbdebee39a53 100644
--- a/arch/arm/mach-pxa/palmtreo.c
+++ b/arch/arm/mach-pxa/palmtreo.c
@@ -448,6 +448,7 @@ MACHINE_START(TREO680, "Palm Treo 680")
         .atag_offset    = 0x100,
         .map_io         = pxa27x_map_io,
         .reserve        = treo_reserve,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
@@ -461,6 +462,7 @@ MACHINE_START(CENTRO, "Palm Centro 685")
         .atag_offset    = 0x100,
         .map_io         = pxa27x_map_io,
         .reserve        = treo_reserve,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index 6170d76dfba8..9507605ed547 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -366,6 +366,7 @@ static void __init palmtx_init(void)
 MACHINE_START(PALMTX, "Palm T|X")
         .atag_offset    = 0x100,
         .map_io         = palmtx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index b2dff9d415eb..a97b59965bb9 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -401,6 +401,7 @@ static void __init palmz72_init(void)
 MACHINE_START(PALMZ72, "Palm Zire72")
         .atag_offset    = 0x100,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 744baee12c0c..89d98c832189 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -34,7 +34,6 @@
 #include <asm/mach-types.h>
 #include <asm/irq.h>
 #include <asm/setup.h>
-#include <asm/system.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
diff --git a/arch/arm/mach-pxa/pxa2xx.c b/arch/arm/mach-pxa/pxa2xx.c
index 868270421b8c..f8ec85450c42 100644
--- a/arch/arm/mach-pxa/pxa2xx.c
+++ b/arch/arm/mach-pxa/pxa2xx.c
@@ -13,6 +13,7 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/device.h>
+#include <linux/io.h>
 
 #include <mach/hardware.h>
 #include <mach/pxa2xx-regs.h>
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c
index 40bb16501d86..17cbc0c7bdb8 100644
--- a/arch/arm/mach-pxa/pxa300.c
+++ b/arch/arm/mach-pxa/pxa300.c
@@ -16,6 +16,7 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
+#include <linux/io.h>
 
 #include <mach/pxa300.h>
 
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c
index 8d614ecd8e99..6dc99d4f2dc6 100644
--- a/arch/arm/mach-pxa/pxa320.c
+++ b/arch/arm/mach-pxa/pxa320.c
@@ -16,6 +16,7 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
+#include <linux/io.h>
 
 #include <mach/pxa320.h>
 
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 1570d457fea3..dffb7e813d98 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -31,6 +31,7 @@
 #include <mach/pm.h>
 #include <mach/dma.h>
 #include <mach/smemc.h>
+#include <mach/irqs.h>
 
 #include "generic.h"
 #include "devices.h"
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 22818c7694a8..5905ed130e94 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -43,6 +43,8 @@
 #include <linux/regulator/consumer.h>
 #include <linux/delay.h>
 
+#include <asm/system_info.h>
+
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
@@ -1090,6 +1092,7 @@ MACHINE_START(RAUMFELD_RC, "Raumfeld Controller")
         .atag_offset    = 0x100,
         .init_machine   = raumfeld_controller_init,
         .map_io         = pxa3xx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
@@ -1102,6 +1105,7 @@ MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector")
         .atag_offset    = 0x100,
         .init_machine   = raumfeld_connector_init,
         .map_io         = pxa3xx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
@@ -1114,6 +1118,7 @@ MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker")
         .atag_offset    = 0x100,
         .init_machine   = raumfeld_speaker_init,
         .map_io         = pxa3xx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index c8497b00cdfe..b4528899ef08 100644
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -9,6 +9,7 @@
 #include <linux/gpio.h>
 #include <linux/io.h>
 #include <asm/proc-fns.h>
+#include <asm/system_misc.h>
 
 #include <mach/regs-ost.h>
 #include <mach/reset.h>
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index 0fe354efb931..86c95a5d8533 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -598,6 +598,7 @@ MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)")
         /* Maintainer: Eric Miao <eric.miao@marvell.com> */
         .atag_offset    = 0x100,
         .map_io         = pxa3xx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa3xx_init_irq,
         .handle_irq       = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 30989baf7f2a..bdf4cb88ca0a 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -24,6 +24,7 @@
 #include <linux/leds.h>
 #include <linux/suspend.h>
 #include <linux/gpio.h>
+#include <linux/io.h>
 
 #include <asm/mach-types.h>
 #include <mach/pm.h>
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index abf355d0c92f..df2ab0fb2ace 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -984,6 +984,7 @@ MACHINE_START(SPITZ, "SHARP Spitz")
         .restart_mode   = 'g',
         .fixup          = spitz_fixup,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .init_machine   = spitz_init,
@@ -997,6 +998,7 @@ MACHINE_START(BORZOI, "SHARP Borzoi")
         .restart_mode   = 'g',
         .fixup          = spitz_fixup,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .init_machine   = spitz_init,
@@ -1010,6 +1012,7 @@ MACHINE_START(AKITA, "SHARP Akita")
         .restart_mode   = 'g',
         .fixup          = spitz_fixup,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .init_machine   = spitz_init,
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index b0656e158d90..4cd645e29b64 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -152,7 +152,7 @@ static struct platform_device sht15 = {
 
 static struct regulator_consumer_supply stargate2_sensor_3_con[] = {
         {
-                .dev = &sht15.dev,
+                .dev_name = "sht15",
                 .supply = "vcc",
         },
 };
@@ -1006,6 +1006,7 @@ static void __init stargate2_init(void)
 #ifdef CONFIG_MACH_INTELMOTE2
 MACHINE_START(INTELMOTE2, "IMOTE 2")
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index 9fb38e80e076..736bfdc50ee6 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -491,6 +491,7 @@ MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)")
         /* Maintainer: Eric Miao <eric.miao@marvell.com> */
         .atag_offset    = 0x100,
         .map_io         = pxa3xx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa3xx_init_irq,
         .handle_irq       = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index b503049d6d26..3d6c9bd90de6 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -22,6 +22,7 @@
 #include <asm/mach/time.h>
 #include <asm/sched_clock.h>
 #include <mach/regs-ost.h>
+#include <mach/irqs.h>
 
 /*
  * This is PXA's sched_clock implementation. This has a resolution
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 0f30af617d8f..2b6ac00b2cd9 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -558,6 +558,7 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
         .atag_offset    = 0x100,
         .init_machine   = trizeps4_init,
         .map_io         = trizeps4_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
@@ -569,6 +570,7 @@ MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
         .atag_offset    = 0x100,
         .init_machine   = trizeps4_init,
         .map_io         = trizeps4_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 023d6ca789de..130379fb9d0f 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -57,6 +57,7 @@
 #include <asm/mach-types.h>
 #include <asm/irq.h>
 #include <asm/sizes.h>
+#include <asm/system_info.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -994,6 +995,7 @@ MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
         /* Maintainer: Marc Zyngier <maz@misterjones.org> */
         .atag_offset    = 0x100,
         .map_io         = viper_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = viper_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index 1f5cfa96f6d6..c57ab636ea9c 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -718,6 +718,7 @@ static void __init vpac270_init(void)
 MACHINE_START(VPAC270, "Voipac PXA270")
         .atag_offset    = 0x100,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c
index 4bbe9a36fe74..4275713ccd10 100644
--- a/arch/arm/mach-pxa/xcep.c
+++ b/arch/arm/mach-pxa/xcep.c
@@ -182,6 +182,7 @@ MACHINE_START(XCEP, "Iskratel XCEP")
         .atag_offset    = 0x100,
         .init_machine   = xcep_init,
         .map_io         = pxa25x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index b6476848b561..fa8619970841 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -721,6 +721,7 @@ static void __init z2_init(void)
 MACHINE_START(ZIPIT2, "Zipit Z2")
         .atag_offset    = 0x100,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index a4dd1c347050..af3d4f7646d7 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -32,6 +32,7 @@
 
 #include <asm/mach-types.h>
 #include <asm/suspend.h>
+#include <asm/system_info.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index acd329afc3ac..45868bb43cbd 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -33,7 +33,6 @@
 #include <linux/clkdev.h>
 #include <linux/mtd/physmap.h>
 
-#include <asm/system.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/leds.h>
diff --git a/arch/arm/mach-realview/hotplug.c b/arch/arm/mach-realview/hotplug.c
index eb55f05bef3a..57d9efba2956 100644
--- a/arch/arm/mach-realview/hotplug.c
+++ b/arch/arm/mach-realview/hotplug.c
@@ -13,6 +13,7 @@
 #include <linux/smp.h>
 
 #include <asm/cacheflush.h>
+#include <asm/cp15.h>
 #include <asm/smp_plat.h>
 
 extern volatile int pen_release;
diff --git a/arch/arm/mach-realview/include/mach/hardware.h b/arch/arm/mach-realview/include/mach/hardware.h
index 8a638d15797f..281e71c97525 100644
--- a/arch/arm/mach-realview/include/mach/hardware.h
+++ b/arch/arm/mach-realview/include/mach/hardware.h
@@ -37,6 +37,6 @@
 #else
 #define IO_ADDRESS(x)           (x)
 #endif
-#define __io_address(n)         __io(IO_ADDRESS(n))
+#define __io_address(n)         IOMEM(IO_ADDRESS(n))
 
 #endif
diff --git a/arch/arm/mach-realview/include/mach/io.h b/arch/arm/mach-realview/include/mach/io.h
deleted file mode 100644
index f05bcdf605d8..000000000000
--- a/arch/arm/mach-realview/include/mach/io.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- *  arch/arm/mach-realview/include/mach/io.h
- *
- *  Copyright (C) 2003 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-rpc/Makefile b/arch/arm/mach-rpc/Makefile
index dfa405c0cfde..992e28b4ae9a 100644
--- a/arch/arm/mach-rpc/Makefile
+++ b/arch/arm/mach-rpc/Makefile
@@ -4,7 +4,7 @@
 
 # Object file lists.
 
-obj-y                   := dma.o fiq.o irq.o riscpc.o
+obj-y                   := dma.o ecard.o fiq.o irq.o riscpc.o time.o
 obj-m                   :=
 obj-n                   :=
 obj-                    :=
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/mach-rpc/ecard.c
index 1651d4950744..b91bc87b3dcf 100644
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/mach-rpc/ecard.c
@@ -42,6 +42,7 @@
 #include <linux/init.h>
 #include <linux/mutex.h>
 #include <linux/kthread.h>
+#include <linux/irq.h>
 #include <linux/io.h>
 
 #include <asm/dma.h>
@@ -54,10 +55,6 @@
 
 #include "ecard.h"
 
-#ifndef CONFIG_ARCH_RPC
-#define HAVE_EXPMASK
-#endif
-
 struct ecard_request {
         void            (*fn)(struct ecard_request *);
         ecard_t         *ec;
@@ -77,9 +74,6 @@ struct expcard_blacklist {
 static ecard_t *cards;
 static ecard_t *slot_to_expcard[MAX_ECARDS];
 static unsigned int ectcr;
-#ifdef HAS_EXPMASK
-static unsigned int have_expmask;
-#endif
 
 /* List of descriptions of cards which don't have an extended
  * identification, or chunk directories containing a description.
@@ -391,22 +385,10 @@ int ecard_readchunk(struct in_chunk_dir *cd, ecard_t *ec, int id, int num)
 
 static void ecard_def_irq_enable(ecard_t *ec, int irqnr)
 {
-#ifdef HAS_EXPMASK
-        if (irqnr < 4 && have_expmask) {
-                have_expmask |= 1 << irqnr;
-                __raw_writeb(have_expmask, EXPMASK_ENABLE);
-        }
-#endif
 }
 
 static void ecard_def_irq_disable(ecard_t *ec, int irqnr)
 {
-#ifdef HAS_EXPMASK
-        if (irqnr < 4 && have_expmask) {
-                have_expmask &= ~(1 << irqnr);
-                __raw_writeb(have_expmask, EXPMASK_ENABLE);
-        }
-#endif
 }
 
 static int ecard_def_irq_pending(ecard_t *ec)
@@ -446,7 +428,7 @@ static expansioncard_ops_t ecard_default_ops = {
  */
 static void ecard_irq_unmask(struct irq_data *d)
 {
-        ecard_t *ec = slot_to_ecard(d->irq - 32);
+        ecard_t *ec = irq_data_get_irq_chip_data(d);
 
         if (ec) {
                 if (!ec->ops)
@@ -462,7 +444,7 @@ static void ecard_irq_unmask(struct irq_data *d)
 
 static void ecard_irq_mask(struct irq_data *d)
 {
-        ecard_t *ec = slot_to_ecard(d->irq - 32);
+        ecard_t *ec = irq_data_get_irq_chip_data(d);
 
         if (ec) {
                 if (!ec->ops)
@@ -579,7 +561,7 @@ ecard_irq_handler(unsigned int irq, struct irq_desc *desc)
         for (ec = cards; ec; ec = ec->next) {
                 int pending;
 
-                if (!ec->claimed || ec->irq == NO_IRQ || ec->slot_no == 8)
+                if (!ec->claimed || !ec->irq || ec->slot_no == 8)
                         continue;
 
                 if (ec->ops && ec->ops->irqpending)
@@ -598,83 +580,6 @@ ecard_irq_handler(unsigned int irq, struct irq_desc *desc)
                 ecard_check_lockup(desc);
 }
 
-#ifdef HAS_EXPMASK
-static unsigned char priority_masks[] =
-{
-        0xf0, 0xf1, 0xf3, 0xf7, 0xff, 0xff, 0xff, 0xff
-};
-
-static unsigned char first_set[] =
-{
-        0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
-        0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00
-};
-
-static void
-ecard_irqexp_handler(unsigned int irq, struct irq_desc *desc)
-{
-        const unsigned int statusmask = 15;
-        unsigned int status;
-
-        status = __raw_readb(EXPMASK_STATUS) & statusmask;
-        if (status) {
-                unsigned int slot = first_set[status];
-                ecard_t *ec = slot_to_ecard(slot);
-
-                if (ec->claimed) {
-                        /*
-                         * this ugly code is so that we can operate a
-                         * prioritorising system:
-                         *
-                         * Card 0       highest priority
-                         * Card 1
-                         * Card 2
-                         * Card 3       lowest priority
-                         *
-                         * Serial cards should go in 0/1, ethernet/scsi in 2/3
-                         * otherwise you will lose serial data at high speeds!
-                         */
-                        generic_handle_irq(ec->irq);
-                } else {
-                        printk(KERN_WARNING "card%d: interrupt from unclaimed "
-                               "card???\n", slot);
-                        have_expmask &= ~(1 << slot);
-                        __raw_writeb(have_expmask, EXPMASK_ENABLE);
-                }
-        } else
-                printk(KERN_WARNING "Wild interrupt from backplane (masks)\n");
-}
-
-static int __init ecard_probeirqhw(void)
-{
-        ecard_t *ec;
-        int found;
-
-        __raw_writeb(0x00, EXPMASK_ENABLE);
-        __raw_writeb(0xff, EXPMASK_STATUS);
-        found = (__raw_readb(EXPMASK_STATUS) & 15) == 0;
-        __raw_writeb(0xff, EXPMASK_ENABLE);
-
-        if (found) {
-                printk(KERN_DEBUG "Expansion card interrupt "
-                       "management hardware found\n");
-
-                /* for each card present, set a bit to '1' */
-                have_expmask = 0x80000000;
-
-                for (ec = cards; ec; ec = ec->next)
-                        have_expmask |= 1 << ec->slot_no;
-
-                __raw_writeb(have_expmask, EXPMASK_ENABLE);
-        }
-
-        return found;
-}
-#else
-#define ecard_irqexp_handler NULL
-#define ecard_probeirqhw() (0)
-#endif
-
 static void __iomem *__ecard_address(ecard_t *ec, card_type_t type, card_speed_t speed)
 {
         void __iomem *address = NULL;
@@ -806,8 +711,8 @@ static struct expansion_card *__init ecard_alloc_card(int type, int slot)
 
         ec->slot_no = slot;
         ec->easi = type == ECARD_EASI;
-        ec->irq = NO_IRQ;
-        ec->fiq = NO_IRQ;
+        ec->irq = 0;
+        ec->fiq = 0;
         ec->dma = NO_DMA;
         ec->ops = &ecard_default_ops;
 
@@ -978,8 +883,7 @@ EXPORT_SYMBOL(ecardm_iomap);
  * If bit 1 of the first byte of the card is set, then the
  * card does not exist.
  */
-static int __init
-ecard_probe(int slot, card_type_t type)
+static int __init ecard_probe(int slot, unsigned irq, card_type_t type)
 {
         ecard_t **ecp;
         ecard_t *ec;
@@ -1033,18 +937,18 @@ ecard_probe(int slot, card_type_t type)
                         break;
                 }
 
+        ec->irq = irq;
+
         /*
          * hook the interrupt handlers
          */
         if (slot < 8) {
-                ec->irq = 32 + slot;
                 irq_set_chip_and_handler(ec->irq, &ecard_chip,
                                          handle_level_irq);
+                irq_set_chip_data(ec->irq, ec);
                 set_irq_flags(ec->irq, IRQF_VALID);
         }
 
-        if (slot == 8)
-                ec->irq = 11;
 #ifdef CONFIG_ARCH_RPC
         /* On RiscPC, only first two slots have DMA capability */
         if (slot < 2)
@@ -1074,28 +978,30 @@ ecard_probe(int slot, card_type_t type)
 static int __init ecard_init(void)
 {
         struct task_struct *task;
-        int slot, irqhw;
+        int slot, irqbase;
+
+        irqbase = irq_alloc_descs(-1, 0, 8, -1);
+        if (irqbase < 0)
+                return irqbase;
 
         task = kthread_run(ecard_task, NULL, "kecardd");
         if (IS_ERR(task)) {
                 printk(KERN_ERR "Ecard: unable to create kernel thread: %ld\n",
                        PTR_ERR(task));
+                irq_free_descs(irqbase, 8);
                 return PTR_ERR(task);
         }
 
         printk("Probing expansion cards\n");
 
         for (slot = 0; slot < 8; slot ++) {
-                if (ecard_probe(slot, ECARD_EASI) == -ENODEV)
-                        ecard_probe(slot, ECARD_IOC);
+                if (ecard_probe(slot, irqbase + slot, ECARD_EASI) == -ENODEV)
+                        ecard_probe(slot, irqbase + slot, ECARD_IOC);
         }
 
-        ecard_probe(8, ECARD_IOC);
-
-        irqhw = ecard_probeirqhw();
+        ecard_probe(8, 11, ECARD_IOC);
 
-        irq_set_chained_handler(IRQ_EXPANSIONCARD,
-                                irqhw ? ecard_irqexp_handler : ecard_irq_handler);
+        irq_set_chained_handler(IRQ_EXPANSIONCARD, ecard_irq_handler);
 
         ecard_proc_init();
 
diff --git a/arch/arm/kernel/ecard.h b/arch/arm/mach-rpc/ecard.h
index 4642d436be2a..4642d436be2a 100644
--- a/arch/arm/kernel/ecard.h
+++ b/arch/arm/mach-rpc/ecard.h
diff --git a/arch/arm/mach-rpc/include/mach/hardware.h b/arch/arm/mach-rpc/include/mach/hardware.h
index 050d63c74cc1..257166b21f3d 100644
--- a/arch/arm/mach-rpc/include/mach/hardware.h
+++ b/arch/arm/mach-rpc/include/mach/hardware.h
@@ -14,12 +14,6 @@
 
 #include <mach/memory.h>
 
-#ifndef __ASSEMBLY__
-#define IOMEM(x) ((void __iomem *)(unsigned long)(x))
-#else
-#define IOMEM(x) x
-#endif /* __ASSEMBLY__ */
-
 /*
  * What hardware must be present
  */
diff --git a/arch/arm/mach-rpc/include/mach/io.h b/arch/arm/mach-rpc/include/mach/io.h
index 695f4ed2e11b..707071a7ea4e 100644
--- a/arch/arm/mach-rpc/include/mach/io.h
+++ b/arch/arm/mach-rpc/include/mach/io.h
@@ -28,9 +28,4 @@
  */
 #define __io(a)         (PCIO_BASE + ((a) << 2))
 
-/*
- * 1:1 mapping for ioremapped regions.
- */
-#define __mem_pci(x)    (x)
-
 #endif
diff --git a/arch/arm/mach-rpc/include/mach/irqs.h b/arch/arm/mach-rpc/include/mach/irqs.h
index 3d2037496e38..6868e178274d 100644
--- a/arch/arm/mach-rpc/include/mach/irqs.h
+++ b/arch/arm/mach-rpc/include/mach/irqs.h
@@ -42,6 +42,4 @@
  */
 #define FIQ_START               64
 
-#define IRQ_TIMER               IRQ_TIMER0
-
 #define NR_IRQS                 128
diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c
index 3d44a59fc0df..f3fa259ce01f 100644
--- a/arch/arm/mach-rpc/riscpc.c
+++ b/arch/arm/mach-rpc/riscpc.c
@@ -28,6 +28,7 @@
 #include <asm/page.h>
 #include <asm/domain.h>
 #include <asm/setup.h>
+#include <asm/system_misc.h>
 
 #include <asm/mach/map.h>
 #include <asm/mach/arch.h>
@@ -98,15 +99,9 @@ static void __init rpc_map_io(void)
 }
 
 static struct resource acornfb_resources[] = {
-        {       /* VIDC */
-                .start          = 0x03400000,
-                .end            = 0x035fffff,
-                .flags          = IORESOURCE_MEM,
-        }, {
-                .start          = IRQ_VSYNCPULSE,
-                .end            = IRQ_VSYNCPULSE,
-                .flags          = IORESOURCE_IRQ,
-        },
+        /* VIDC */
+        DEFINE_RES_MEM(0x03400000, 0x00200000),
+        DEFINE_RES_IRQ(IRQ_VSYNCPULSE),
 };
 
 static struct platform_device acornfb_device = {
@@ -120,11 +115,7 @@ static struct platform_device acornfb_device = {
 };
 
 static struct resource iomd_resources[] = {
-        {
-                .start          = 0x03200000,
-                .end            = 0x0320ffff,
-                .flags          = IORESOURCE_MEM,
-        },
+        DEFINE_RES_MEM(0x03200000, 0x10000),
 };
 
 static struct platform_device iomd_device = {
@@ -134,18 +125,25 @@ static struct platform_device iomd_device = {
         .resource               = iomd_resources,
 };
 
+static struct resource iomd_kart_resources[] = {
+        DEFINE_RES_IRQ(IRQ_KEYBOARDRX),
+        DEFINE_RES_IRQ(IRQ_KEYBOARDTX),
+};
+
 static struct platform_device kbd_device = {
         .name                   = "kart",
         .id                     = -1,
         .dev                    = {
                 .parent         = &iomd_device.dev,
         },
+        .num_resources          = ARRAY_SIZE(iomd_kart_resources),
+        .resource               = iomd_kart_resources,
 };
 
 static struct plat_serial8250_port serial_platform_data[] = {
         {
                 .mapbase        = 0x03010fe0,
-                .irq            = 10,
+                .irq            = IRQ_SERIALPORT,
                 .uartclk        = 1843200,
                 .regshift       = 2,
                 .iotype         = UPIO_MEM,
@@ -167,21 +165,9 @@ static struct pata_platform_info pata_platform_data = {
 };
 
 static struct resource pata_resources[] = {
-        [0] = {
-                .start          = 0x030107c0,
-                .end            = 0x030107df,
-                .flags          = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start          = 0x03010fd8,
-                .end            = 0x03010fdb,
-                .flags          = IORESOURCE_MEM,
-        },
-        [2] = {
-                .start          = IRQ_HARDDISK,
-                .end            = IRQ_HARDDISK,
-                .flags          = IORESOURCE_IRQ,
-        },
+        DEFINE_RES_MEM(0x030107c0, 0x20),
+        DEFINE_RES_MEM(0x03010fd8, 0x04),
+        DEFINE_RES_IRQ(IRQ_HARDDISK),
 };
 
 static struct platform_device pata_device = {
diff --git a/arch/arm/common/time-acorn.c b/arch/arm/mach-rpc/time.c
index deeed561b168..581fca934bb3 100644
--- a/arch/arm/common/time-acorn.c
+++ b/arch/arm/mach-rpc/time.c
@@ -85,7 +85,7 @@ static struct irqaction ioc_timer_irq = {
 static void __init ioc_timer_init(void)
 {
         ioctime_init();
-        setup_irq(IRQ_TIMER, &ioc_timer_irq);
+        setup_irq(IRQ_TIMER0, &ioc_timer_irq);
 }
 
 struct sys_timer ioc_timer = {
diff --git a/arch/arm/mach-s3c24xx/common.h b/arch/arm/mach-s3c24xx/common.h
new file mode 100644
index 000000000000..c2f596e7bc2d
--- /dev/null
+++ b/arch/arm/mach-s3c24xx/common.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Common Header for S3C24XX SoCs
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_S3C24XX_COMMON_H
+#define __ARCH_ARM_MACH_S3C24XX_COMMON_H __FILE__
+
+void s3c2410_restart(char mode, const char *cmd);
+void s3c244x_restart(char mode, const char *cmd);
+
+#endif /* __ARCH_ARM_MACH_S3C24XX_COMMON_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/io.h b/arch/arm/mach-s3c24xx/include/mach/io.h
index 118749f37c4c..5dd1db4e2677 100644
--- a/arch/arm/mach-s3c24xx/include/mach/io.h
+++ b/arch/arm/mach-s3c24xx/include/mach/io.h
@@ -208,9 +208,4 @@ DECLARE_IO(int,l,"")
 #define outsw(p,d,l)    __raw_writesw(__ioaddr(p),d,l)
 #define outsl(p,d,l)    __raw_writesl(__ioaddr(p),d,l)
 
-/*
- * 1:1 mapping for ioremapped regions.
- */
-#define __mem_pci(x)    (x)
-
 #endif
diff --git a/arch/arm/mach-s3c24xx/s3c2410.c b/arch/arm/mach-s3c24xx/s3c2410.c
index 061b6bb1a557..a3c5cb086ee2 100644
--- a/arch/arm/mach-s3c24xx/s3c2410.c
+++ b/arch/arm/mach-s3c24xx/s3c2410.c
@@ -30,6 +30,7 @@
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
+#include <asm/system_misc.h>
 
 #include <plat/cpu-freq.h>
 
diff --git a/arch/arm/mach-s3c24xx/s3c2412.c b/arch/arm/mach-s3c24xx/s3c2412.c
index c6eac9871093..d4bc7f960bbb 100644
--- a/arch/arm/mach-s3c24xx/s3c2412.c
+++ b/arch/arm/mach-s3c24xx/s3c2412.c
@@ -31,6 +31,7 @@
 #include <mach/hardware.h>
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
+#include <asm/system_misc.h>
 
 #include <plat/cpu-freq.h>
 
diff --git a/arch/arm/mach-s3c24xx/s3c2416.c b/arch/arm/mach-s3c24xx/s3c2416.c
index 0e9a71c90ed7..7743fade50df 100644
--- a/arch/arm/mach-s3c24xx/s3c2416.c
+++ b/arch/arm/mach-s3c24xx/s3c2416.c
@@ -43,6 +43,7 @@
 #include <mach/hardware.h>
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
+#include <asm/system_misc.h>
 
 #include <mach/regs-s3c2443-clock.h>
 
diff --git a/arch/arm/mach-s3c24xx/s3c2443.c b/arch/arm/mach-s3c24xx/s3c2443.c
index b7778a9dafaf..ab648ad8fa50 100644
--- a/arch/arm/mach-s3c24xx/s3c2443.c
+++ b/arch/arm/mach-s3c24xx/s3c2443.c
@@ -29,6 +29,7 @@
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
+#include <asm/system_misc.h>
 
 #include <mach/regs-s3c2443-clock.h>
 
diff --git a/arch/arm/mach-s3c24xx/s3c244x.c b/arch/arm/mach-s3c24xx/s3c244x.c
index d15852f642b7..6f74118f60c6 100644
--- a/arch/arm/mach-s3c24xx/s3c244x.c
+++ b/arch/arm/mach-s3c24xx/s3c244x.c
@@ -23,6 +23,7 @@
 #include <linux/clk.h>
 #include <linux/io.h>
 
+#include <asm/system_misc.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
diff --git a/arch/arm/mach-s3c24xx/simtec-nor.c b/arch/arm/mach-s3c24xx/simtec-nor.c
index 2119ca6a73bc..b9d6d4f92c03 100644
--- a/arch/arm/mach-s3c24xx/simtec-nor.c
+++ b/arch/arm/mach-s3c24xx/simtec-nor.c
@@ -35,9 +35,7 @@
 static void simtec_nor_vpp(struct platform_device *pdev, int vpp)
 {
         unsigned int val;
-        unsigned long flags;
 
-        local_irq_save(flags);
         val = __raw_readb(BAST_VA_CTRL3);
 
         printk(KERN_DEBUG "%s(%d)\n", __func__, vpp);
@@ -48,7 +46,6 @@ static void simtec_nor_vpp(struct platform_device *pdev, int vpp)
                 val &= ~BAST_CPLD_CTRL3_ROMWEN;
 
         __raw_writeb(val, BAST_VA_CTRL3);
-        local_irq_restore(flags);
 }
 
 static struct physmap_flash_data simtec_nor_pdata = {
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c
index bee7dcd4df7c..b313380342a5 100644
--- a/arch/arm/mach-s3c64xx/common.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -29,6 +29,7 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/hardware/vic.h>
+#include <asm/system_misc.h>
 
 #include <mach/map.h>
 #include <mach/hardware.h>
diff --git a/arch/arm/mach-s3c64xx/include/mach/io.h b/arch/arm/mach-s3c64xx/include/mach/io.h
deleted file mode 100644
index de5716dbbd65..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/io.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* arch/arm/mach-s3c64xxinclude/mach/io.h
- *
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben-linux@fluff.org>
- *
- * Default IO routines for S3C64XX based
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-/* No current ISA/PCI bus support. */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#define IO_SPACE_LIMIT (0xFFFFFFFF)
-
-#endif
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
index b6a67728cc88..0ace108c3e3d 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
@@ -17,6 +17,8 @@
 #include <linux/mfd/wm831x/gpio.h>
 #include <linux/mfd/wm8994/pdata.h>
 
+#include <linux/regulator/machine.h>
+
 #include <sound/wm5100.h>
 #include <sound/wm8996.h>
 #include <sound/wm8962.h>
@@ -153,6 +155,14 @@ static const struct i2c_board_info wm1259_devs[] = {
         },
 };
 
+static struct regulator_init_data wm8994_ldo1 = {
+        .supply_regulator = "WALLVDD",
+};
+
+static struct regulator_init_data wm8994_ldo2 = {
+        .supply_regulator = "WALLVDD",
+};
+
 static struct wm8994_pdata wm8994_pdata = {
         .gpio_base = CODEC_GPIO_BASE,
         .gpio_defaults = {
@@ -160,8 +170,8 @@ static struct wm8994_pdata wm8994_pdata = {
         },
         .irq_base = CODEC_IRQ_BASE,
         .ldo = {
-                { .supply = "WALLVDD" },
-                { .supply = "WALLVDD" },
+                 { .init_data = &wm8994_ldo1, },
+                 { .init_data = &wm8994_ldo2, },
         },
 };
 
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index 9143f8b19962..6e6a0a9d6778 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -27,6 +27,7 @@
 
 #include <asm/irq.h>
 #include <asm/proc-fns.h>
+#include <asm/system_misc.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
diff --git a/arch/arm/mach-s5p64x0/include/mach/io.h b/arch/arm/mach-s5p64x0/include/mach/io.h
deleted file mode 100644
index a3e095c02fb5..000000000000
--- a/arch/arm/mach-s5p64x0/include/mach/io.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/io.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben-linux@fluff.org>
- *
- * Default IO routines for S5P64X0 based
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-/* No current ISA/PCI bus support. */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#define IO_SPACE_LIMIT (0xFFFFFFFF)
-
-#endif
diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c
index ff71e2d467c6..621908658861 100644
--- a/arch/arm/mach-s5pc100/common.c
+++ b/arch/arm/mach-s5pc100/common.c
@@ -27,6 +27,7 @@
 
 #include <asm/irq.h>
 #include <asm/proc-fns.h>
+#include <asm/system_misc.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
diff --git a/arch/arm/mach-s5pc100/include/mach/io.h b/arch/arm/mach-s5pc100/include/mach/io.h
deleted file mode 100644
index 819acf5eaf89..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/io.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* arch/arm/mach-s5pc100/include/mach/io.h
- *
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben-linux@fluff.org>
- *
- * Default IO routines for S5PC100 systems
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-/* No current ISA/PCI bus support. */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#define IO_SPACE_LIMIT (0xFFFFFFFF)
-
-#endif
diff --git a/arch/arm/mach-s5pv210/include/mach/io.h b/arch/arm/mach-s5pv210/include/mach/io.h
deleted file mode 100644
index 5ab9d560bc86..000000000000
--- a/arch/arm/mach-s5pv210/include/mach/io.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* linux/arch/arm/mach-s5pv210/include/mach/io.h
- *
- * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Based on arch/arm/mach-s5p6442/include/mach/io.h
- *
- * Default IO routines for S5PV210
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H __FILE__
-
-/* No current ISA/PCI bus support. */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#define IO_SPACE_LIMIT (0xFFFFFFFF)
-
-#endif /* __ASM_ARM_ARCH_IO_H */
diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile
index ed7408d3216c..60b97ec01676 100644
--- a/arch/arm/mach-sa1100/Makefile
+++ b/arch/arm/mach-sa1100/Makefile
@@ -3,7 +3,7 @@
 #
 
 # Common support
-obj-y := clock.o generic.o irq.o dma.o time.o #nmi-oopser.o
+obj-y := clock.o generic.o irq.o time.o #nmi-oopser.o
 obj-m :=
 obj-n :=
 obj-  :=
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
index 0c4b76ab4d8e..375d3f779a88 100644
--- a/arch/arm/mach-sa1100/assabet.c
+++ b/arch/arm/mach-sa1100/assabet.c
@@ -15,14 +15,16 @@
 #include <linux/errno.h>
 #include <linux/ioport.h>
 #include <linux/serial_core.h>
+#include <linux/mfd/ucb1x00.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/delay.h>
 #include <linux/mm.h>
 
+#include <video/sa1100fb.h>
+
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
-#include <asm/irq.h>
 #include <asm/setup.h>
 #include <asm/page.h>
 #include <asm/pgtable-hwdef.h>
@@ -36,17 +38,18 @@
 #include <asm/mach/serial_sa1100.h>
 #include <mach/assabet.h>
 #include <mach/mcp.h>
+#include <mach/irqs.h>
 
 #include "generic.h"
 
 #define ASSABET_BCR_DB1110 \
-        (ASSABET_BCR_SPK_OFF    | ASSABET_BCR_QMUTE     | \
+        (ASSABET_BCR_SPK_OFF    | \
          ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
          ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
          ASSABET_BCR_IRDA_MD0)
 
 #define ASSABET_BCR_DB1111 \
-        (ASSABET_BCR_SPK_OFF    | ASSABET_BCR_QMUTE     | \
+        (ASSABET_BCR_SPK_OFF    | \
          ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
          ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
          ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
@@ -69,31 +72,10 @@ void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
 
 EXPORT_SYMBOL(ASSABET_BCR_frob);
 
-static void assabet_backlight_power(int on)
-{
-#ifndef ASSABET_PAL_VIDEO
-        if (on)
-                ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
-        else
-#endif
-                ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
-}
-
-/*
- * Turn on/off the backlight.  When turning the backlight on,
- * we wait 500us after turning it on so we don't cause the
- * supplies to droop when we enable the LCD controller (and
- * cause a hard reset.)
- */
-static void assabet_lcd_power(int on)
+static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
 {
-#ifndef ASSABET_PAL_VIDEO
-        if (on) {
-                ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
-                udelay(500);
-        } else
-#endif
-                ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
+        if (state == UCB_RST_PROBE)
+                ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
 }
 
 
@@ -152,15 +134,8 @@ static struct flash_platform_data assabet_flash_data = {
 };
 
 static struct resource assabet_flash_resources[] = {
-        {
-                .start  = SA1100_CS0_PHYS,
-                .end    = SA1100_CS0_PHYS + SZ_32M - 1,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = SA1100_CS1_PHYS,
-                .end    = SA1100_CS1_PHYS + SZ_32M - 1,
-                .flags  = IORESOURCE_MEM,
-        }
+        DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
+        DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
 };
 
 
@@ -199,18 +174,126 @@ static struct irda_platform_data assabet_irda_data = {
         .set_speed      = assabet_irda_set_speed,
 };
 
+static struct ucb1x00_plat_data assabet_ucb1x00_data = {
+        .reset          = assabet_ucb1x00_reset,
+        .gpio_base      = -1,
+};
+
 static struct mcp_plat_data assabet_mcp_data = {
         .mccr0          = MCCR0_ADM,
         .sclk_rate      = 11981000,
+        .codec_pdata    = &assabet_ucb1x00_data,
+};
+
+static void assabet_lcd_set_visual(u32 visual)
+{
+        u_int is_true_color = visual == FB_VISUAL_TRUECOLOR;
+
+        if (machine_is_assabet()) {
+#if 1           // phase 4 or newer Assabet's
+                if (is_true_color)
+                        ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
+                else
+                        ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
+#else
+                // older Assabet's
+                if (is_true_color)
+                        ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
+                else
+                        ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
+#endif
+        }
+}
+
+#ifndef ASSABET_PAL_VIDEO
+static void assabet_lcd_backlight_power(int on)
+{
+        if (on)
+                ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
+        else
+                ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
+}
+
+/*
+ * Turn on/off the backlight.  When turning the backlight on, we wait
+ * 500us after turning it on so we don't cause the supplies to droop
+ * when we enable the LCD controller (and cause a hard reset.)
+ */
+static void assabet_lcd_power(int on)
+{
+        if (on) {
+                ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
+                udelay(500);
+        } else
+                ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
+}
+
+/*
+ * The assabet uses a sharp LQ039Q2DS54 LCD module.  It is actually
+ * takes an RGB666 signal, but we provide it with an RGB565 signal
+ * instead (def_rgb_16).
+ */
+static struct sa1100fb_mach_info lq039q2ds54_info = {
+        .pixclock       = 171521,       .bpp            = 16,
+        .xres           = 320,          .yres           = 240,
+
+        .hsync_len      = 5,            .vsync_len      = 1,
+        .left_margin    = 61,           .upper_margin   = 3,
+        .right_margin   = 9,            .lower_margin   = 0,
+
+        .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+
+        .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
+        .lccr3          = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
+
+        .backlight_power = assabet_lcd_backlight_power,
+        .lcd_power = assabet_lcd_power,
+        .set_visual = assabet_lcd_set_visual,
+};
+#else
+static void assabet_pal_backlight_power(int on)
+{
+        ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
+}
+
+static void assabet_pal_power(int on)
+{
+        ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
+}
+
+static struct sa1100fb_mach_info pal_info = {
+        .pixclock       = 67797,        .bpp            = 16,
+        .xres           = 640,          .yres           = 512,
+
+        .hsync_len      = 64,           .vsync_len      = 6,
+        .left_margin    = 125,          .upper_margin   = 70,
+        .right_margin   = 115,          .lower_margin   = 36,
+
+        .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
+        .lccr3          = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
+
+        .backlight_power = assabet_pal_backlight_power,
+        .lcd_power = assabet_pal_power,
+        .set_visual = assabet_lcd_set_visual,
 };
+#endif
+
+#ifdef CONFIG_ASSABET_NEPONSET
+static struct resource neponset_resources[] = {
+        DEFINE_RES_MEM(0x10000000, 0x08000000),
+        DEFINE_RES_MEM(0x18000000, 0x04000000),
+        DEFINE_RES_MEM(0x40000000, SZ_8K),
+        DEFINE_RES_IRQ(IRQ_GPIO25),
+};
+#endif
 
 static void __init assabet_init(void)
 {
         /*
          * Ensure that the power supply is in "high power" mode.
          */
-        GPDR |= GPIO_GPIO16;
         GPSR = GPIO_GPIO16;
+        GPDR |= GPIO_GPIO16;
 
         /*
          * Ensure that these pins are set as outputs and are driving
@@ -218,8 +301,16 @@ static void __init assabet_init(void)
          * the WS latch in the CPLD, and we don't float causing
          * excessive power drain.  --rmk
          */
-        GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
         GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
+        GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
+
+        /*
+         * Also set GPIO27 as an output; this is used to clock UART3
+         * via the FPGA and as otherwise has no pullups or pulldowns,
+         * so stop it floating.
+         */
+        GPCR = GPIO_GPIO27;
+        GPDR |= GPIO_GPIO27;
 
         /*
          * Set up registers for sleep mode.
@@ -231,8 +322,7 @@ static void __init assabet_init(void)
         PPDR |= PPC_TXD3 | PPC_TXD1;
         PPSR |= PPC_TXD3 | PPC_TXD1;
 
-        sa1100fb_lcd_power = assabet_lcd_power;
-        sa1100fb_backlight_power = assabet_backlight_power;
+        sa11x0_ppc_configure_mcp();
 
         if (machine_has_neponset()) {
                 /*
@@ -246,9 +336,17 @@ static void __init assabet_init(void)
 #ifndef CONFIG_ASSABET_NEPONSET
                 printk( "Warning: Neponset detected but full support "
                         "hasn't been configured in the kernel\n" );
+#else
+                platform_device_register_simple("neponset", 0,
+                        neponset_resources, ARRAY_SIZE(neponset_resources));
 #endif
         }
 
+#ifndef ASSABET_PAL_VIDEO
+        sa11x0_register_lcd(&lq039q2ds54_info);
+#else
+        sa11x0_register_lcd(&pal_video);
+#endif
         sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
                             ARRAY_SIZE(assabet_flash_resources));
         sa11x0_register_irda(&assabet_irda_data);
@@ -412,21 +510,8 @@ static void __init assabet_map_io(void)
          */
         Ser1SDCR0 |= SDCR0_SUS;
 
-        if (machine_has_neponset()) {
-#ifdef CONFIG_ASSABET_NEPONSET
-                extern void neponset_map_io(void);
-
-                /*
-                 * We map Neponset registers even if it isn't present since
-                 * many drivers will try to probe their stuff (and fail).
-                 * This is still more friendly than a kernel paging request
-                 * crash.
-                 */
-                neponset_map_io();
-#endif
-        } else {
+        if (!machine_has_neponset())
                 sa1100_register_uart_fns(&assabet_port_fns);
-        }
 
         /*
          * When Neponset is attached, the first UART should be
@@ -449,6 +534,7 @@ MACHINE_START(ASSABET, "Intel-Assabet")
         .atag_offset    = 0x100,
         .fixup          = fixup_assabet,
         .map_io         = assabet_map_io,
+        .nr_irqs        = SA1100_NR_IRQS,
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = assabet_init,
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c
index b07a2c024cb7..e0f0c030258c 100644
--- a/arch/arm/mach-sa1100/badge4.c
+++ b/arch/arm/mach-sa1100/badge4.c
@@ -39,20 +39,27 @@
 #include "generic.h"
 
 static struct resource sa1111_resources[] = {
-        [0] = {
-                .start          = BADGE4_SA1111_BASE,
-                .end            = BADGE4_SA1111_BASE + 0x00001fff,
-                .flags          = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start          = BADGE4_IRQ_GPIO_SA1111,
-                .end            = BADGE4_IRQ_GPIO_SA1111,
-                .flags          = IORESOURCE_IRQ,
-        },
+        [0] = DEFINE_RES_MEM(BADGE4_SA1111_BASE, 0x2000),
+        [1] = DEFINE_RES_IRQ(BADGE4_IRQ_GPIO_SA1111),
 };
 
+static int badge4_sa1111_enable(void *data, unsigned devid)
+{
+        if (devid == SA1111_DEVID_USB)
+                badge4_set_5V(BADGE4_5V_USB, 1);
+        return 0;
+}
+
+static void badge4_sa1111_disable(void *data, unsigned devid)
+{
+        if (devid == SA1111_DEVID_USB)
+                badge4_set_5V(BADGE4_5V_USB, 0);
+}
+
 static struct sa1111_platform_data sa1111_info = {
-        .irq_base       = IRQ_BOARD_END,
+        .disable_devs   = SA1111_DEVID_PS2_MSE,
+        .enable         = badge4_sa1111_enable,
+        .disable        = badge4_sa1111_disable,
 };
 
 static u64 sa1111_dmamask = 0xffffffffUL;
@@ -121,11 +128,8 @@ static struct flash_platform_data badge4_flash_data = {
         .nr_parts       = ARRAY_SIZE(badge4_partitions),
 };
 
-static struct resource badge4_flash_resource = {
-        .start          = SA1100_CS0_PHYS,
-        .end            = SA1100_CS0_PHYS + SZ_64M - 1,
-        .flags          = IORESOURCE_MEM,
-};
+static struct resource badge4_flash_resource =
+        DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_64M);
 
 static int five_v_on __initdata = 0;
 
@@ -269,11 +273,6 @@ static struct map_desc badge4_io_desc[] __initdata = {
                 .pfn            = __phys_to_pfn(0x10000000),
                 .length         = 0x00100000,
                 .type           = MT_DEVICE
-        }, {    /* SA-1111      */
-                .virtual        = 0xf4000000,
-                .pfn            = __phys_to_pfn(0x48000000),
-                .length         = 0x00100000,
-                .type           = MT_DEVICE
         }
 };
 
@@ -304,6 +303,7 @@ static void __init badge4_map_io(void)
 MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4")
         .atag_offset    = 0x100,
         .map_io         = badge4_map_io,
+        .nr_irqs        = SA1100_NR_IRQS,
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
 #ifdef CONFIG_SA1111
diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c
index 11bb6d0b9be3..4a61f60e0502 100644
--- a/arch/arm/mach-sa1100/cerf.c
+++ b/arch/arm/mach-sa1100/cerf.c
@@ -18,7 +18,6 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 
-#include <asm/irq.h>
 #include <mach/hardware.h>
 #include <asm/setup.h>
 
@@ -30,14 +29,11 @@
 
 #include <mach/cerf.h>
 #include <mach/mcp.h>
+#include <mach/irqs.h>
 #include "generic.h"
 
 static struct resource cerfuart2_resources[] = {
-        [0] = {
-                .start  = 0x80030000,
-                .end    = 0x8003ffff,
-                .flags  = IORESOURCE_MEM,
-        },
+        [0] = DEFINE_RES_MEM(0x80030000, SZ_64K),
 };
 
 static struct platform_device cerfuart2_device = {
@@ -87,11 +83,8 @@ static struct flash_platform_data cerf_flash_data = {
         .nr_parts       = ARRAY_SIZE(cerf_partitions),
 };
 
-static struct resource cerf_flash_resource = {
-        .start          = SA1100_CS0_PHYS,
-        .end            = SA1100_CS0_PHYS + SZ_32M - 1,
-        .flags          = IORESOURCE_MEM,
-};
+static struct resource cerf_flash_resource =
+        DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
 
 static void __init cerf_init_irq(void)
 {
@@ -128,6 +121,7 @@ static struct mcp_plat_data cerf_mcp_data = {
 
 static void __init cerf_init(void)
 {
+        sa11x0_ppc_configure_mcp();
         platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices));
         sa11x0_register_mtd(&cerf_flash_data, &cerf_flash_resource, 1);
         sa11x0_register_mcp(&cerf_mcp_data);
@@ -136,6 +130,7 @@ static void __init cerf_init(void)
 MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube")
         /* Maintainer: support@intrinsyc.com */
         .map_io         = cerf_map_io,
+        .nr_irqs        = SA1100_NR_IRQS,
         .init_irq       = cerf_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = cerf_init,
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index fd5652118ed1..c7f418b0cde9 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -22,15 +22,17 @@
 #include <linux/tty.h>
 #include <linux/delay.h>
 #include <linux/platform_device.h>
+#include <linux/mfd/ucb1x00.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/timer.h>
 #include <linux/gpio.h>
 #include <linux/pda_power.h>
 
+#include <video/sa1100fb.h>
+
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
-#include <asm/irq.h>
 #include <asm/page.h>
 #include <asm/setup.h>
 #include <mach/collie.h>
@@ -44,15 +46,12 @@
 #include <asm/mach/sharpsl_param.h>
 #include <asm/hardware/locomo.h>
 #include <mach/mcp.h>
+#include <mach/irqs.h>
 
 #include "generic.h"
 
 static struct resource collie_scoop_resources[] = {
-        [0] = {
-                .start          = 0x40800000,
-                .end            = 0x40800fff,
-                .flags          = IORESOURCE_MEM,
-        },
+        [0] = DEFINE_RES_MEM(0x40800000, SZ_4K),
 };
 
 static struct scoop_config collie_scoop_setup = {
@@ -85,10 +84,14 @@ static struct scoop_pcmcia_config collie_pcmcia_config = {
         .num_devs       = 1,
 };
 
+static struct ucb1x00_plat_data collie_ucb1x00_data = {
+        .gpio_base      = COLLIE_TC35143_GPIO_BASE,
+};
+
 static struct mcp_plat_data collie_mcp_data = {
         .mccr0          = MCCR0_ADM | MCCR0_ExtClk,
         .sclk_rate      = 9216000,
-        .gpio_base      = COLLIE_TC35143_GPIO_BASE,
+        .codec_pdata    = &collie_ucb1x00_data,
 };
 
 /*
@@ -221,16 +224,8 @@ device_initcall(collie_uart_init);
 
 
 static struct resource locomo_resources[] = {
-        [0] = {
-                .start          = 0x40000000,
-                .end            = 0x40001fff,
-                .flags          = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start          = IRQ_GPIO25,
-                .end            = IRQ_GPIO25,
-                .flags          = IORESOURCE_IRQ,
-        },
+        [0] = DEFINE_RES_MEM(0x40000000, SZ_8K),
+        [1] = DEFINE_RES_IRQ(IRQ_GPIO25),
 };
 
 static struct locomo_platform_data locomo_info = {
@@ -303,11 +298,25 @@ static struct flash_platform_data collie_flash_data = {
 };
 
 static struct resource collie_flash_resources[] = {
-        {
-                .start  = SA1100_CS0_PHYS,
-                .end    = SA1100_CS0_PHYS + SZ_32M - 1,
-                .flags  = IORESOURCE_MEM,
-        }
+        DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
+};
+
+static struct sa1100fb_mach_info collie_lcd_info = {
+        .pixclock       = 171521,       .bpp            = 16,
+        .xres           = 320,          .yres           = 240,
+
+        .hsync_len      = 5,            .vsync_len      = 1,
+        .left_margin    = 11,           .upper_margin   = 2,
+        .right_margin   = 30,           .lower_margin   = 0,
+
+        .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+
+        .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
+        .lccr3          = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
+
+#ifdef CONFIG_BACKLIGHT_LOCOMO
+        .lcd_power      = locomolcd_power
+#endif
 };
 
 static void __init collie_init(void)
@@ -341,6 +350,10 @@ static void __init collie_init(void)
 
         collie_power_resource[0].start = gpio_to_irq(COLLIE_GPIO_AC_IN);
         collie_power_resource[0].end = gpio_to_irq(COLLIE_GPIO_AC_IN);
+
+        sa11x0_ppc_configure_mcp();
+
+
         platform_scoop_config = &collie_pcmcia_config;
 
         ret = platform_add_devices(devices, ARRAY_SIZE(devices));
@@ -348,6 +361,7 @@ static void __init collie_init(void)
                 printk(KERN_WARNING "collie: Unable to register LoCoMo device\n");
         }
 
+        sa11x0_register_lcd(&collie_lcd_info);
         sa11x0_register_mtd(&collie_flash_data, collie_flash_resources,
                             ARRAY_SIZE(collie_flash_resources));
         sa11x0_register_mcp(&collie_mcp_data);
@@ -383,6 +397,7 @@ static void __init collie_map_io(void)
 
 MACHINE_START(COLLIE, "Sharp-Collie")
         .map_io         = collie_map_io,
+        .nr_irqs        = SA1100_NR_IRQS,
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = collie_init,
diff --git a/arch/arm/mach-sa1100/dma.c b/arch/arm/mach-sa1100/dma.c
deleted file mode 100644
index ad660350c296..000000000000
--- a/arch/arm/mach-sa1100/dma.c
+++ /dev/null
@@ -1,348 +0,0 @@
-/*
- * arch/arm/mach-sa1100/dma.c
- *
- * Support functions for the SA11x0 internal DMA channels.
- *
- * Copyright (C) 2000, 2001 by Nicolas Pitre
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/module.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/spinlock.h>
-#include <linux/errno.h>
-
-#include <asm/system.h>
-#include <asm/irq.h>
-#include <mach/hardware.h>
-#include <mach/dma.h>
-
-
-#undef DEBUG
-#ifdef DEBUG
-#define DPRINTK( s, arg... )  printk( "dma<%p>: " s, regs , ##arg )
-#else
-#define DPRINTK( x... )
-#endif
-
-
-typedef struct {
-        const char *device_id;          /* device name */
-        u_long device;                  /* this channel device, 0  if unused*/
-        dma_callback_t callback;        /* to call when DMA completes */
-        void *data;                     /* ... with private data ptr */
-} sa1100_dma_t;
-
-static sa1100_dma_t dma_chan[SA1100_DMA_CHANNELS];
-
-static DEFINE_SPINLOCK(dma_list_lock);
-
-
-static irqreturn_t dma_irq_handler(int irq, void *dev_id)
-{
-        dma_regs_t *dma_regs = dev_id;
-        sa1100_dma_t *dma = dma_chan + (((u_int)dma_regs >> 5) & 7);
-        int status = dma_regs->RdDCSR;
-
-        if (status & (DCSR_ERROR)) {
-                printk(KERN_CRIT "DMA on \"%s\" caused an error\n", dma->device_id);
-                dma_regs->ClrDCSR = DCSR_ERROR;
-        }
-
-        dma_regs->ClrDCSR = status & (DCSR_DONEA | DCSR_DONEB);
-        if (dma->callback) {
-                if (status & DCSR_DONEA)
-                        dma->callback(dma->data);
-                if (status & DCSR_DONEB)
-                        dma->callback(dma->data);
-        }
-        return IRQ_HANDLED;
-}
-
-
-/**
- *      sa1100_request_dma - allocate one of the SA11x0's DMA channels
- *      @device: The SA11x0 peripheral targeted by this request
- *      @device_id: An ascii name for the claiming device
- *      @callback: Function to be called when the DMA completes
- *      @data: A cookie passed back to the callback function
- *      @dma_regs: Pointer to the location of the allocated channel's identifier
- *
- *      This function will search for a free DMA channel and returns the
- *      address of the hardware registers for that channel as the channel
- *      identifier. This identifier is written to the location pointed by
- *      @dma_regs. The list of possible values for @device are listed into
- *      arch/arm/mach-sa1100/include/mach/dma.h as a dma_device_t enum.
- *
- *      Note that reading from a port and writing to the same port are
- *      actually considered as two different streams requiring separate
- *      DMA registrations.
- *
- *      The @callback function is called from interrupt context when one
- *      of the two possible DMA buffers in flight has terminated. That
- *      function has to be small and efficient while posponing more complex
- *      processing to a lower priority execution context.
- *
- *      If no channels are available, or if the desired @device is already in
- *      use by another DMA channel, then an error code is returned.  This
- *      function must be called before any other DMA calls.
- **/
-
-int sa1100_request_dma (dma_device_t device, const char *device_id,
-                        dma_callback_t callback, void *data,
-                        dma_regs_t **dma_regs)
-{
-        sa1100_dma_t *dma = NULL;
-        dma_regs_t *regs;
-        int i, err;
-
-        *dma_regs = NULL;
-
-        err = 0;
-        spin_lock(&dma_list_lock);
-        for (i = 0; i < SA1100_DMA_CHANNELS; i++) {
-                if (dma_chan[i].device == device) {
-                        err = -EBUSY;
-                        break;
-                } else if (!dma_chan[i].device && !dma) {
-                        dma = &dma_chan[i];
-                }
-        }
-        if (!err) {
-                if (dma)
-                        dma->device = device;
-                else
-                        err = -ENOSR;
-        }
-        spin_unlock(&dma_list_lock);
-        if (err)
-                return err;
-
-        i = dma - dma_chan;
-        regs = (dma_regs_t *)&DDAR(i);
-        err = request_irq(IRQ_DMA0 + i, dma_irq_handler, IRQF_DISABLED,
-                          device_id, regs);
-        if (err) {
-                printk(KERN_ERR
-                       "%s: unable to request IRQ %d for %s\n",
-                       __func__, IRQ_DMA0 + i, device_id);
-                dma->device = 0;
-                return err;
-        }
-
-        *dma_regs = regs;
-        dma->device_id = device_id;
-        dma->callback = callback;
-        dma->data = data;
-
-        regs->ClrDCSR =
-                (DCSR_DONEA | DCSR_DONEB | DCSR_STRTA | DCSR_STRTB |
-                 DCSR_IE | DCSR_ERROR | DCSR_RUN);
-        regs->DDAR = device;
-
-        return 0;
-}
-
-
-/**
- *      sa1100_free_dma - free a SA11x0 DMA channel
- *      @regs: identifier for the channel to free
- *
- *      This clears all activities on a given DMA channel and releases it
- *      for future requests.  The @regs identifier is provided by a
- *      successful call to sa1100_request_dma().
- **/
-
-void sa1100_free_dma(dma_regs_t *regs)
-{
-        int i;
-
-        for (i = 0; i < SA1100_DMA_CHANNELS; i++)
-                if (regs == (dma_regs_t *)&DDAR(i))
-                        break;
-        if (i >= SA1100_DMA_CHANNELS) {
-                printk(KERN_ERR "%s: bad DMA identifier\n", __func__);
-                return;
-        }
-
-        if (!dma_chan[i].device) {
-                printk(KERN_ERR "%s: Trying to free free DMA\n", __func__);
-                return;
-        }
-
-        regs->ClrDCSR =
-                (DCSR_DONEA | DCSR_DONEB | DCSR_STRTA | DCSR_STRTB |
-                 DCSR_IE | DCSR_ERROR | DCSR_RUN);
-        free_irq(IRQ_DMA0 + i, regs);
-        dma_chan[i].device = 0;
-}
-
-
-/**
- *      sa1100_start_dma - submit a data buffer for DMA
- *      @regs: identifier for the channel to use
- *      @dma_ptr: buffer physical (or bus) start address
- *      @size: buffer size
- *
- *      This function hands the given data buffer to the hardware for DMA
- *      access. If another buffer is already in flight then this buffer
- *      will be queued so the DMA engine will switch to it automatically
- *      when the previous one is done.  The DMA engine is actually toggling
- *      between two buffers so at most 2 successful calls can be made before
- *      one of them terminates and the callback function is called.
- *
- *      The @regs identifier is provided by a successful call to
- *      sa1100_request_dma().
- *
- *      The @size must not be larger than %MAX_DMA_SIZE.  If a given buffer
- *      is larger than that then it's the caller's responsibility to split
- *      it into smaller chunks and submit them separately. If this is the
- *      case then a @size of %CUT_DMA_SIZE is recommended to avoid ending
- *      up with too small chunks. The callback function can be used to chain
- *      submissions of buffer chunks.
- *
- *      Error return values:
- *      %-EOVERFLOW:    Given buffer size is too big.
- *      %-EBUSY:        Both DMA buffers are already in use.
- *      %-EAGAIN:       Both buffers were busy but one of them just completed
- *                      but the interrupt handler has to execute first.
- *
- *      This function returs 0 on success.
- **/
-
-int sa1100_start_dma(dma_regs_t *regs, dma_addr_t dma_ptr, u_int size)
-{
-        unsigned long flags;
-        u_long status;
-        int ret;
-
-        if (dma_ptr & 3)
-                printk(KERN_WARNING "DMA: unaligned start address (0x%08lx)\n",
-                       (unsigned long)dma_ptr);
-
-        if (size > MAX_DMA_SIZE)
-                return -EOVERFLOW;
-
-        local_irq_save(flags);
-        status = regs->RdDCSR;
-
-        /* If both DMA buffers are started, there's nothing else we can do. */
-        if ((status & (DCSR_STRTA | DCSR_STRTB)) == (DCSR_STRTA | DCSR_STRTB)) {
-                DPRINTK("start: st %#x busy\n", status);
-                ret = -EBUSY;
-                goto out;
-        }
-
-        if (((status & DCSR_BIU) && (status & DCSR_STRTB)) ||
-            (!(status & DCSR_BIU) && !(status & DCSR_STRTA))) {
-                if (status & DCSR_DONEA) {
-                        /* give a chance for the interrupt to be processed */
-                        ret = -EAGAIN;
-                        goto out;
-                }
-                regs->DBSA = dma_ptr;
-                regs->DBTA = size;
-                regs->SetDCSR = DCSR_STRTA | DCSR_IE | DCSR_RUN;
-                DPRINTK("start a=%#x s=%d on A\n", dma_ptr, size);
-        } else {
-                if (status & DCSR_DONEB) {
-                        /* give a chance for the interrupt to be processed */
-                        ret = -EAGAIN;
-                        goto out;
-                }
-                regs->DBSB = dma_ptr;
-                regs->DBTB = size;
-                regs->SetDCSR = DCSR_STRTB | DCSR_IE | DCSR_RUN;
-                DPRINTK("start a=%#x s=%d on B\n", dma_ptr, size);
-        }
-        ret = 0;
-
-out:
-        local_irq_restore(flags);
-        return ret;
-}
-
-
-/**
- *      sa1100_get_dma_pos - return current DMA position
- *      @regs: identifier for the channel to use
- *
- *      This function returns the current physical (or bus) address for the
- *      given DMA channel.  If the channel is running i.e. not in a stopped
- *      state then the caller must disable interrupts prior calling this
- *      function and process the returned value before re-enabling them to
- *      prevent races with the completion interrupt handler and the callback
- *      function. The validation of the returned value is the caller's
- *      responsibility as well -- the hardware seems to return out of range
- *      values when the DMA engine completes a buffer.
- *
- *      The @regs identifier is provided by a successful call to
- *      sa1100_request_dma().
- **/
-
-dma_addr_t sa1100_get_dma_pos(dma_regs_t *regs)
-{
-        int status;
-
-        /*
-         * We must determine whether buffer A or B is active.
-         * Two possibilities: either we are in the middle of
-         * a buffer, or the DMA controller just switched to the
-         * next toggle but the interrupt hasn't been serviced yet.
-         * The former case is straight forward.  In the later case,
-         * we'll do like if DMA is just at the end of the previous
-         * toggle since all registers haven't been reset yet.
-         * This goes around the edge case and since we're always
-         * a little behind anyways it shouldn't make a big difference.
-         * If DMA has been stopped prior calling this then the
-         * position is exact.
-         */
-        status = regs->RdDCSR;
-        if ((!(status & DCSR_BIU) &&  (status & DCSR_STRTA)) ||
-            ( (status & DCSR_BIU) && !(status & DCSR_STRTB)))
-                return regs->DBSA;
-        else
-                return regs->DBSB;
-}
-
-
-/**
- *      sa1100_reset_dma - reset a DMA channel
- *      @regs: identifier for the channel to use
- *
- *      This function resets and reconfigure the given DMA channel. This is
- *      particularly useful after a sleep/wakeup event.
- *
- *      The @regs identifier is provided by a successful call to
- *      sa1100_request_dma().
- **/
-
-void sa1100_reset_dma(dma_regs_t *regs)
-{
-        int i;
-
-        for (i = 0; i < SA1100_DMA_CHANNELS; i++)
-                if (regs == (dma_regs_t *)&DDAR(i))
-                        break;
-        if (i >= SA1100_DMA_CHANNELS) {
-                printk(KERN_ERR "%s: bad DMA identifier\n", __func__);
-                return;
-        }
-
-        regs->ClrDCSR =
-                (DCSR_DONEA | DCSR_DONEB | DCSR_STRTA | DCSR_STRTB |
-                 DCSR_IE | DCSR_ERROR | DCSR_RUN);
-        regs->DDAR = dma_chan[i].device;
-}
-
-
-EXPORT_SYMBOL(sa1100_request_dma);
-EXPORT_SYMBOL(sa1100_free_dma);
-EXPORT_SYMBOL(sa1100_start_dma);
-EXPORT_SYMBOL(sa1100_get_dma_pos);
-EXPORT_SYMBOL(sa1100_reset_dma);
-
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 7c1ebf4a7920..7c524b4e415d 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -14,17 +14,22 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/delay.h>
+#include <linux/dma-mapping.h>
 #include <linux/pm.h>
 #include <linux/cpufreq.h>
 #include <linux/ioport.h>
 #include <linux/platform_device.h>
 
+#include <video/sa1100fb.h>
+
 #include <asm/div64.h>
-#include <mach/hardware.h>
-#include <asm/system.h>
 #include <asm/mach/map.h>
 #include <asm/mach/flash.h>
 #include <asm/irq.h>
+#include <asm/system_misc.h>
+
+#include <mach/hardware.h>
+#include <mach/irqs.h>
 
 #include "generic.h"
 
@@ -149,16 +154,8 @@ static void sa11x0_register_device(struct platform_device *dev, void *data)
 
 
 static struct resource sa11x0udc_resources[] = {
-        [0] = {
-                .start  = __PREG(Ser0UDCCR),
-                .end    = __PREG(Ser0UDCCR) + 0xffff,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = IRQ_Ser0UDC,
-                .end    = IRQ_Ser0UDC,
-                .flags  = IORESOURCE_IRQ,
-        },
+        [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K),
+        [1] = DEFINE_RES_IRQ(IRQ_Ser0UDC),
 };
 
 static u64 sa11x0udc_dma_mask = 0xffffffffUL;
@@ -175,16 +172,8 @@ static struct platform_device sa11x0udc_device = {
 };
 
 static struct resource sa11x0uart1_resources[] = {
-        [0] = {
-                .start  = __PREG(Ser1UTCR0),
-                .end    = __PREG(Ser1UTCR0) + 0xffff,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = IRQ_Ser1UART,
-                .end    = IRQ_Ser1UART,
-                .flags  = IORESOURCE_IRQ,
-        },
+        [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
+        [1] = DEFINE_RES_IRQ(IRQ_Ser1UART),
 };
 
 static struct platform_device sa11x0uart1_device = {
@@ -195,16 +184,8 @@ static struct platform_device sa11x0uart1_device = {
 };
 
 static struct resource sa11x0uart3_resources[] = {
-        [0] = {
-                .start  = __PREG(Ser3UTCR0),
-                .end    = __PREG(Ser3UTCR0) + 0xffff,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = IRQ_Ser3UART,
-                .end    = IRQ_Ser3UART,
-                .flags  = IORESOURCE_IRQ,
-        },
+        [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K),
+        [1] = DEFINE_RES_IRQ(IRQ_Ser3UART),
 };
 
 static struct platform_device sa11x0uart3_device = {
@@ -215,16 +196,9 @@ static struct platform_device sa11x0uart3_device = {
 };
 
 static struct resource sa11x0mcp_resources[] = {
-        [0] = {
-                .start  = __PREG(Ser4MCCR0),
-                .end    = __PREG(Ser4MCCR0) + 0xffff,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = IRQ_Ser4MCP,
-                .end    = IRQ_Ser4MCP,
-                .flags  = IORESOURCE_IRQ,
-        },
+        [0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K),
+        [1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4),
+        [2] = DEFINE_RES_IRQ(IRQ_Ser4MCP),
 };
 
 static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
@@ -240,22 +214,24 @@ static struct platform_device sa11x0mcp_device = {
         .resource       = sa11x0mcp_resources,
 };
 
+void __init sa11x0_ppc_configure_mcp(void)
+{
+        /* Setup the PPC unit for the MCP */
+        PPDR &= ~PPC_RXD4;
+        PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
+        PSDR |= PPC_RXD4;
+        PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
+        PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
+}
+
 void sa11x0_register_mcp(struct mcp_plat_data *data)
 {
         sa11x0_register_device(&sa11x0mcp_device, data);
 }
 
 static struct resource sa11x0ssp_resources[] = {
-        [0] = {
-                .start  = 0x80070000,
-                .end    = 0x8007ffff,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = IRQ_Ser4SSP,
-                .end    = IRQ_Ser4SSP,
-                .flags  = IORESOURCE_IRQ,
-        },
+        [0] = DEFINE_RES_MEM(0x80070000, SZ_64K),
+        [1] = DEFINE_RES_IRQ(IRQ_Ser4SSP),
 };
 
 static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
@@ -272,16 +248,8 @@ static struct platform_device sa11x0ssp_device = {
 };
 
 static struct resource sa11x0fb_resources[] = {
-        [0] = {
-                .start  = 0xb0100000,
-                .end    = 0xb010ffff,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = IRQ_LCD,
-                .end    = IRQ_LCD,
-                .flags  = IORESOURCE_IRQ,
-        },
+        [0] = DEFINE_RES_MEM(0xb0100000, SZ_64K),
+        [1] = DEFINE_RES_IRQ(IRQ_LCD),
 };
 
 static struct platform_device sa11x0fb_device = {
@@ -294,6 +262,11 @@ static struct platform_device sa11x0fb_device = {
         .resource       = sa11x0fb_resources,
 };
 
+void sa11x0_register_lcd(struct sa1100fb_mach_info *inf)
+{
+        sa11x0_register_device(&sa11x0fb_device, inf);
+}
+
 static struct platform_device sa11x0pcmcia_device = {
         .name           = "sa11x0-pcmcia",
         .id             = -1,
@@ -314,23 +287,10 @@ void sa11x0_register_mtd(struct flash_platform_data *flash,
 }
 
 static struct resource sa11x0ir_resources[] = {
-        {
-                .start  = __PREG(Ser2UTCR0),
-                .end    = __PREG(Ser2UTCR0) + 0x24 - 1,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = __PREG(Ser2HSCR0),
-                .end    = __PREG(Ser2HSCR0) + 0x1c - 1,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = __PREG(Ser2HSCR2),
-                .end    = __PREG(Ser2HSCR2) + 0x04 - 1,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = IRQ_Ser2ICP,
-                .end    = IRQ_Ser2ICP,
-                .flags  = IORESOURCE_IRQ,
-        }
+        DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24),
+        DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c),
+        DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04),
+        DEFINE_RES_IRQ(IRQ_Ser2ICP),
 };
 
 static struct platform_device sa11x0ir_device = {
@@ -358,14 +318,37 @@ static struct platform_device sa11x0rtc_device = {
         .resource       = sa1100_rtc_resources,
 };
 
+static struct resource sa11x0dma_resources[] = {
+        DEFINE_RES_MEM(DMA_PHYS, DMA_SIZE),
+        DEFINE_RES_IRQ(IRQ_DMA0),
+        DEFINE_RES_IRQ(IRQ_DMA1),
+        DEFINE_RES_IRQ(IRQ_DMA2),
+        DEFINE_RES_IRQ(IRQ_DMA3),
+        DEFINE_RES_IRQ(IRQ_DMA4),
+        DEFINE_RES_IRQ(IRQ_DMA5),
+};
+
+static u64 sa11x0dma_dma_mask = DMA_BIT_MASK(32);
+
+static struct platform_device sa11x0dma_device = {
+        .name           = "sa11x0-dma",
+        .id             = -1,
+        .dev = {
+                .dma_mask = &sa11x0dma_dma_mask,
+                .coherent_dma_mask = 0xffffffff,
+        },
+        .num_resources  = ARRAY_SIZE(sa11x0dma_resources),
+        .resource       = sa11x0dma_resources,
+};
+
 static struct platform_device *sa11x0_devices[] __initdata = {
         &sa11x0udc_device,
         &sa11x0uart1_device,
         &sa11x0uart3_device,
         &sa11x0ssp_device,
         &sa11x0pcmcia_device,
-        &sa11x0fb_device,
         &sa11x0rtc_device,
+        &sa11x0dma_device,
 };
 
 static int __init sa1100_init(void)
@@ -376,12 +359,6 @@ static int __init sa1100_init(void)
 
 arch_initcall(sa1100_init);
 
-void (*sa1100fb_backlight_power)(int on);
-void (*sa1100fb_lcd_power)(int on);
-
-EXPORT_SYMBOL(sa1100fb_backlight_power);
-EXPORT_SYMBOL(sa1100fb_lcd_power);
-
 
 /*
  * Common I/O mapping:
@@ -436,7 +413,7 @@ void __init sa1100_map_io(void)
  * the MBGNT signal false to ensure the SA1111 doesn't own the
  * SDRAM bus.
  */
-void __init sa1110_mb_disable(void)
+void sa1110_mb_disable(void)
 {
         unsigned long flags;
 
@@ -455,7 +432,7 @@ void __init sa1110_mb_disable(void)
  * If the system is going to use the SA-1111 DMA engines, set up
  * the memory bus request/grant pins.
  */
-void __devinit sa1110_mb_enable(void)
+void sa1110_mb_enable(void)
 {
         unsigned long flags;
 
diff --git a/arch/arm/mach-sa1100/generic.h b/arch/arm/mach-sa1100/generic.h
index 33268cf6be36..9eb3b3cd5a63 100644
--- a/arch/arm/mach-sa1100/generic.h
+++ b/arch/arm/mach-sa1100/generic.h
@@ -16,9 +16,6 @@ extern void sa11x0_restart(char, const char *);
         mi->bank[__nr].start = (__start), \
         mi->bank[__nr].size = (__size)
 
-extern void (*sa1100fb_backlight_power)(int on);
-extern void (*sa1100fb_lcd_power)(int on);
-
 extern void sa1110_mb_enable(void);
 extern void sa1110_mb_disable(void);
 
@@ -39,4 +36,8 @@ struct irda_platform_data;
 void sa11x0_register_irda(struct irda_platform_data *irda);
 
 struct mcp_plat_data;
+void sa11x0_ppc_configure_mcp(void);
 void sa11x0_register_mcp(struct mcp_plat_data *data);
+
+struct sa1100fb_mach_info;
+void sa11x0_register_lcd(struct sa1100fb_mach_info *inf);
diff --git a/arch/arm/mach-sa1100/h3100.c b/arch/arm/mach-sa1100/h3100.c
index 1e6b3c105ba6..b2e8d0f418e0 100644
--- a/arch/arm/mach-sa1100/h3100.c
+++ b/arch/arm/mach-sa1100/h3100.c
@@ -14,11 +14,14 @@
 #include <linux/kernel.h>
 #include <linux/gpio.h>
 
+#include <video/sa1100fb.h>
+
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/irda.h>
 
 #include <mach/h3xxx.h>
+#include <mach/irqs.h>
 
 #include "generic.h"
 
@@ -36,13 +39,28 @@ static void h3100_lcd_power(int enable)
         }
 }
 
+static struct sa1100fb_mach_info h3100_lcd_info = {
+        .pixclock       = 406977,       .bpp            = 4,
+        .xres           = 320,          .yres           = 240,
+
+        .hsync_len      = 26,           .vsync_len      = 41,
+        .left_margin    = 4,            .upper_margin   = 0,
+        .right_margin   = 4,            .lower_margin   = 0,
+
+        .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+        .cmap_greyscale = 1,
+        .cmap_inverse   = 1,
+
+        .lccr0          = LCCR0_Mono | LCCR0_4PixMono | LCCR0_Sngl | LCCR0_Pas,
+        .lccr3          = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
+
+        .lcd_power = h3100_lcd_power,
+};
 
 static void __init h3100_map_io(void)
 {
         h3xxx_map_io();
 
-        sa1100fb_lcd_power = h3100_lcd_power;
-
         /* Older bootldrs put GPIO2-9 in alternate mode on the
            assumption that they are used for video */
         GAFR &= ~0x000001fb;
@@ -80,12 +98,15 @@ static void __init h3100_mach_init(void)
 {
         h3xxx_init_gpio(h3100_default_gpio, ARRAY_SIZE(h3100_default_gpio));
         h3xxx_mach_init();
+
+        sa11x0_register_lcd(&h3100_lcd_info);
         sa11x0_register_irda(&h3100_irda_data);
 }
 
 MACHINE_START(H3100, "Compaq iPAQ H3100")
         .atag_offset    = 0x100,
         .map_io         = h3100_map_io,
+        .nr_irqs        = SA1100_NR_IRQS,
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = h3100_mach_init,
diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c
index 6b58e7460ecf..cb6659f294fe 100644
--- a/arch/arm/mach-sa1100/h3600.c
+++ b/arch/arm/mach-sa1100/h3600.c
@@ -14,11 +14,14 @@
 #include <linux/kernel.h>
 #include <linux/gpio.h>
 
+#include <video/sa1100fb.h>
+
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/irda.h>
 
 #include <mach/h3xxx.h>
+#include <mach/irqs.h>
 
 #include "generic.h"
 
@@ -56,11 +59,35 @@ err2:	gpio_free(H3XXX_EGPIO_LCD_ON);
 err1:   return;
 }
 
+static const struct sa1100fb_rgb h3600_rgb_16 = {
+        .red    = { .offset = 12, .length = 4, },
+        .green  = { .offset = 7,  .length = 4, },
+        .blue   = { .offset = 1,  .length = 4, },
+        .transp = { .offset = 0,  .length = 0, },
+};
+
+static struct sa1100fb_mach_info h3600_lcd_info = {
+        .pixclock       = 174757,       .bpp            = 16,
+        .xres           = 320,          .yres           = 240,
+
+        .hsync_len      = 3,            .vsync_len      = 3,
+        .left_margin    = 12,           .upper_margin   = 10,
+        .right_margin   = 17,           .lower_margin   = 1,
+
+        .cmap_static    = 1,
+
+        .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
+        .lccr3          = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
+
+        .rgb[RGB_16] = &h3600_rgb_16,
+
+        .lcd_power = h3600_lcd_power,
+};
+
+
 static void __init h3600_map_io(void)
 {
         h3xxx_map_io();
-
-        sa1100fb_lcd_power = h3600_lcd_power;
 }
 
 /*
@@ -121,12 +148,15 @@ static void __init h3600_mach_init(void)
 {
         h3xxx_init_gpio(h3600_default_gpio, ARRAY_SIZE(h3600_default_gpio));
         h3xxx_mach_init();
+
+        sa11x0_register_lcd(&h3600_lcd_info);
         sa11x0_register_irda(&h3600_irda_data);
 }
 
 MACHINE_START(H3600, "Compaq iPAQ H3600")
         .atag_offset    = 0x100,
         .map_io         = h3600_map_io,
+        .nr_irqs        = SA1100_NR_IRQS,
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = h3600_mach_init,
diff --git a/arch/arm/mach-sa1100/h3xxx.c b/arch/arm/mach-sa1100/h3xxx.c
index b0784c974c2d..63150e1ffe9e 100644
--- a/arch/arm/mach-sa1100/h3xxx.c
+++ b/arch/arm/mach-sa1100/h3xxx.c
@@ -109,11 +109,8 @@ static struct flash_platform_data h3xxx_flash_data = {
         .nr_parts       = ARRAY_SIZE(h3xxx_partitions),
 };
 
-static struct resource h3xxx_flash_resource = {
-        .start          = SA1100_CS0_PHYS,
-        .end            = SA1100_CS0_PHYS + SZ_32M - 1,
-        .flags          = IORESOURCE_MEM,
-};
+static struct resource h3xxx_flash_resource =
+        DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
 
 
 /*
@@ -186,11 +183,7 @@ static struct sa1100_port_fns h3xxx_port_fns __initdata = {
  */
 
 static struct resource egpio_resources[] = {
-        [0] = {
-                .start  = H3600_EGPIO_PHYS,
-                .end    = H3600_EGPIO_PHYS + 0x4 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
+        [0] = DEFINE_RES_MEM(H3600_EGPIO_PHYS, 0x4),
 };
 
 static struct htc_egpio_chip egpio_chips[] = {
diff --git a/arch/arm/mach-sa1100/hackkit.c b/arch/arm/mach-sa1100/hackkit.c
index c01bb36db940..5535475bf583 100644
--- a/arch/arm/mach-sa1100/hackkit.c
+++ b/arch/arm/mach-sa1100/hackkit.c
@@ -22,12 +22,10 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/setup.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
-#include <asm/irq.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
@@ -35,6 +33,9 @@
 #include <asm/mach/irq.h>
 #include <asm/mach/serial_sa1100.h>
 
+#include <mach/hardware.h>
+#include <mach/irqs.h>
+
 #include "generic.h"
 
 /**********************************************************************
@@ -179,11 +180,8 @@ static struct flash_platform_data hackkit_flash_data = {
         .nr_parts       = ARRAY_SIZE(hackkit_partitions),
 };
 
-static struct resource hackkit_flash_resource = {
-        .start          = SA1100_CS0_PHYS,
-        .end            = SA1100_CS0_PHYS + SZ_32M,
-        .flags          = IORESOURCE_MEM,
-};
+static struct resource hackkit_flash_resource =
+        DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
 
 static void __init hackkit_init(void)
 {
@@ -197,6 +195,7 @@ static void __init hackkit_init(void)
 MACHINE_START(HACKKIT, "HackKit Cpu Board")
         .atag_offset    = 0x100,
         .map_io         = hackkit_map_io,
+        .nr_irqs        = SA1100_NR_IRQS,
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = hackkit_init,
diff --git a/arch/arm/mach-sa1100/include/mach/SA-1100.h b/arch/arm/mach-sa1100/include/mach/SA-1100.h
index bae8296f5dbf..3f2d1b60188c 100644
--- a/arch/arm/mach-sa1100/include/mach/SA-1100.h
+++ b/arch/arm/mach-sa1100/include/mach/SA-1100.h
@@ -1590,224 +1590,9 @@
 
 /*
  * Direct Memory Access (DMA) control registers
- *
- * Registers
- *    DDAR0             Direct Memory Access (DMA) Device Address Register
- *                      channel 0 (read/write).
- *    DCSR0             Direct Memory Access (DMA) Control and Status
- *                      Register channel 0 (read/write).
- *    DBSA0             Direct Memory Access (DMA) Buffer Start address
- *                      register A channel 0 (read/write).
- *    DBTA0             Direct Memory Access (DMA) Buffer Transfer count
- *                      register A channel 0 (read/write).
- *    DBSB0             Direct Memory Access (DMA) Buffer Start address
- *                      register B channel 0 (read/write).
- *    DBTB0             Direct Memory Access (DMA) Buffer Transfer count
- *                      register B channel 0 (read/write).
- *
- *    DDAR1             Direct Memory Access (DMA) Device Address Register
- *                      channel 1 (read/write).
- *    DCSR1             Direct Memory Access (DMA) Control and Status
- *                      Register channel 1 (read/write).
- *    DBSA1             Direct Memory Access (DMA) Buffer Start address
- *                      register A channel 1 (read/write).
- *    DBTA1             Direct Memory Access (DMA) Buffer Transfer count
- *                      register A channel 1 (read/write).
- *    DBSB1             Direct Memory Access (DMA) Buffer Start address
- *                      register B channel 1 (read/write).
- *    DBTB1             Direct Memory Access (DMA) Buffer Transfer count
- *                      register B channel 1 (read/write).
- *
- *    DDAR2             Direct Memory Access (DMA) Device Address Register
- *                      channel 2 (read/write).
- *    DCSR2             Direct Memory Access (DMA) Control and Status
- *                      Register channel 2 (read/write).
- *    DBSA2             Direct Memory Access (DMA) Buffer Start address
- *                      register A channel 2 (read/write).
- *    DBTA2             Direct Memory Access (DMA) Buffer Transfer count
- *                      register A channel 2 (read/write).
- *    DBSB2             Direct Memory Access (DMA) Buffer Start address
- *                      register B channel 2 (read/write).
- *    DBTB2             Direct Memory Access (DMA) Buffer Transfer count
- *                      register B channel 2 (read/write).
- *
- *    DDAR3             Direct Memory Access (DMA) Device Address Register
- *                      channel 3 (read/write).
- *    DCSR3             Direct Memory Access (DMA) Control and Status
- *                      Register channel 3 (read/write).
- *    DBSA3             Direct Memory Access (DMA) Buffer Start address
- *                      register A channel 3 (read/write).
- *    DBTA3             Direct Memory Access (DMA) Buffer Transfer count
- *                      register A channel 3 (read/write).
- *    DBSB3             Direct Memory Access (DMA) Buffer Start address
- *                      register B channel 3 (read/write).
- *    DBTB3             Direct Memory Access (DMA) Buffer Transfer count
- *                      register B channel 3 (read/write).
- *
- *    DDAR4             Direct Memory Access (DMA) Device Address Register
- *                      channel 4 (read/write).
- *    DCSR4             Direct Memory Access (DMA) Control and Status
- *                      Register channel 4 (read/write).
- *    DBSA4             Direct Memory Access (DMA) Buffer Start address
- *                      register A channel 4 (read/write).
- *    DBTA4             Direct Memory Access (DMA) Buffer Transfer count
- *                      register A channel 4 (read/write).
- *    DBSB4             Direct Memory Access (DMA) Buffer Start address
- *                      register B channel 4 (read/write).
- *    DBTB4             Direct Memory Access (DMA) Buffer Transfer count
- *                      register B channel 4 (read/write).
- *
- *    DDAR5             Direct Memory Access (DMA) Device Address Register
- *                      channel 5 (read/write).
- *    DCSR5             Direct Memory Access (DMA) Control and Status
- *                      Register channel 5 (read/write).
- *    DBSA5             Direct Memory Access (DMA) Buffer Start address
- *                      register A channel 5 (read/write).
- *    DBTA5             Direct Memory Access (DMA) Buffer Transfer count
- *                      register A channel 5 (read/write).
- *    DBSB5             Direct Memory Access (DMA) Buffer Start address
- *                      register B channel 5 (read/write).
- *    DBTB5             Direct Memory Access (DMA) Buffer Transfer count
- *                      register B channel 5 (read/write).
  */
-
-#define DMASp           0x00000020      /* DMA control reg. Space [byte]   */
-
-#define DDAR(Nb)        __REG(0xB0000000 + (Nb)*DMASp)  /* DMA Device Address Reg. channel [0..5] */
-#define SetDCSR(Nb)     __REG(0xB0000004 + (Nb)*DMASp)  /* Set DMA Control & Status Reg. channel [0..5] (write) */
-#define ClrDCSR(Nb)     __REG(0xB0000008 + (Nb)*DMASp)  /* Clear DMA Control & Status Reg. channel [0..5] (write) */
-#define RdDCSR(Nb)      __REG(0xB000000C + (Nb)*DMASp)  /* Read DMA Control & Status Reg. channel [0..5] (read) */
-#define DBSA(Nb)        __REG(0xB0000010 + (Nb)*DMASp)  /* DMA Buffer Start address reg. A channel [0..5] */
-#define DBTA(Nb)        __REG(0xB0000014 + (Nb)*DMASp)  /* DMA Buffer Transfer count reg. A channel [0..5] */
-#define DBSB(Nb)        __REG(0xB0000018 + (Nb)*DMASp)  /* DMA Buffer Start address reg. B channel [0..5] */
-#define DBTB(Nb)        __REG(0xB000001C + (Nb)*DMASp)  /* DMA Buffer Transfer count reg. B channel [0..5] */
-
-#define DDAR_RW         0x00000001      /* device data Read/Write          */
-#define DDAR_DevWr      (DDAR_RW*0)     /*  Device data Write              */
-                                        /*  (memory -> device)             */
-#define DDAR_DevRd      (DDAR_RW*1)     /*  Device data Read               */
-                                        /*  (device -> memory)             */
-#define DDAR_E          0x00000002      /* big/little Endian device        */
-#define DDAR_LtlEnd     (DDAR_E*0)      /*  Little Endian device           */
-#define DDAR_BigEnd     (DDAR_E*1)      /*  Big Endian device              */
-#define DDAR_BS         0x00000004      /* device Burst Size               */
-#define DDAR_Brst4      (DDAR_BS*0)     /*  Burst-of-4 device              */
-#define DDAR_Brst8      (DDAR_BS*1)     /*  Burst-of-8 device              */
-#define DDAR_DW         0x00000008      /* device Data Width               */
-#define DDAR_8BitDev    (DDAR_DW*0)     /*  8-Bit Device                   */
-#define DDAR_16BitDev   (DDAR_DW*1)     /*  16-Bit Device                  */
-#define DDAR_DS         Fld (4, 4)      /* Device Select                   */
-#define DDAR_Ser0UDCTr                  /*  Ser. port 0 UDC Transmit       */ \
-                        (0x0 << FShft (DDAR_DS))
-#define DDAR_Ser0UDCRc                  /*  Ser. port 0 UDC Receive        */ \
-                        (0x1 << FShft (DDAR_DS))
-#define DDAR_Ser1SDLCTr                 /*  Ser. port 1 SDLC Transmit      */ \
-                        (0x2 << FShft (DDAR_DS))
-#define DDAR_Ser1SDLCRc                 /*  Ser. port 1 SDLC Receive       */ \
-                        (0x3 << FShft (DDAR_DS))
-#define DDAR_Ser1UARTTr                 /*  Ser. port 1 UART Transmit      */ \
-                        (0x4 << FShft (DDAR_DS))
-#define DDAR_Ser1UARTRc                 /*  Ser. port 1 UART Receive       */ \
-                        (0x5 << FShft (DDAR_DS))
-#define DDAR_Ser2ICPTr                  /*  Ser. port 2 ICP Transmit       */ \
-                        (0x6 << FShft (DDAR_DS))
-#define DDAR_Ser2ICPRc                  /*  Ser. port 2 ICP Receive        */ \
-                        (0x7 << FShft (DDAR_DS))
-#define DDAR_Ser3UARTTr                 /*  Ser. port 3 UART Transmit      */ \
-                        (0x8 << FShft (DDAR_DS))
-#define DDAR_Ser3UARTRc                 /*  Ser. port 3 UART Receive       */ \
-                        (0x9 << FShft (DDAR_DS))
-#define DDAR_Ser4MCP0Tr                 /*  Ser. port 4 MCP 0 Transmit     */ \
-                                        /*  (audio)                        */ \
-                        (0xA << FShft (DDAR_DS))
-#define DDAR_Ser4MCP0Rc                 /*  Ser. port 4 MCP 0 Receive      */ \
-                                        /*  (audio)                        */ \
-                        (0xB << FShft (DDAR_DS))
-#define DDAR_Ser4MCP1Tr                 /*  Ser. port 4 MCP 1 Transmit     */ \
-                                        /*  (telecom)                      */ \
-                        (0xC << FShft (DDAR_DS))
-#define DDAR_Ser4MCP1Rc                 /*  Ser. port 4 MCP 1 Receive      */ \
-                                        /*  (telecom)                      */ \
-                        (0xD << FShft (DDAR_DS))
-#define DDAR_Ser4SSPTr                  /*  Ser. port 4 SSP Transmit       */ \
-                        (0xE << FShft (DDAR_DS))
-#define DDAR_Ser4SSPRc                  /*  Ser. port 4 SSP Receive        */ \
-                        (0xF << FShft (DDAR_DS))
-#define DDAR_DA         Fld (24, 8)     /* Device Address                  */
-#define DDAR_DevAdd(Add)                /*  Device Address                 */ \
-                        (((Add) & 0xF0000000) | \
-                         (((Add) & 0X003FFFFC) << (FShft (DDAR_DA) - 2)))
-#define DDAR_Ser0UDCWr                  /* Ser. port 0 UDC Write           */ \
-                        (DDAR_DevWr + DDAR_Brst8 + DDAR_8BitDev + \
-                         DDAR_Ser0UDCTr + DDAR_DevAdd (__PREG(Ser0UDCDR)))
-#define DDAR_Ser0UDCRd                  /* Ser. port 0 UDC Read            */ \
-                        (DDAR_DevRd + DDAR_Brst8 + DDAR_8BitDev + \
-                         DDAR_Ser0UDCRc + DDAR_DevAdd (__PREG(Ser0UDCDR)))
-#define DDAR_Ser1UARTWr                 /* Ser. port 1 UART Write          */ \
-                        (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \
-                         DDAR_Ser1UARTTr + DDAR_DevAdd (__PREG(Ser1UTDR)))
-#define DDAR_Ser1UARTRd                 /* Ser. port 1 UART Read           */ \
-                        (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \
-                         DDAR_Ser1UARTRc + DDAR_DevAdd (__PREG(Ser1UTDR)))
-#define DDAR_Ser1SDLCWr                 /* Ser. port 1 SDLC Write          */ \
-                        (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \
-                         DDAR_Ser1SDLCTr + DDAR_DevAdd (__PREG(Ser1SDDR)))
-#define DDAR_Ser1SDLCRd                 /* Ser. port 1 SDLC Read           */ \
-                        (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \
-                         DDAR_Ser1SDLCRc + DDAR_DevAdd (__PREG(Ser1SDDR)))
-#define DDAR_Ser2UARTWr                 /* Ser. port 2 UART Write          */ \
-                        (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \
-                         DDAR_Ser2ICPTr + DDAR_DevAdd (__PREG(Ser2UTDR)))
-#define DDAR_Ser2UARTRd                 /* Ser. port 2 UART Read           */ \
-                        (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \
-                         DDAR_Ser2ICPRc + DDAR_DevAdd (__PREG(Ser2UTDR)))
-#define DDAR_Ser2HSSPWr                 /* Ser. port 2 HSSP Write          */ \
-                        (DDAR_DevWr + DDAR_Brst8 + DDAR_8BitDev + \
-                         DDAR_Ser2ICPTr + DDAR_DevAdd (__PREG(Ser2HSDR)))
-#define DDAR_Ser2HSSPRd                 /* Ser. port 2 HSSP Read           */ \
-                        (DDAR_DevRd + DDAR_Brst8 + DDAR_8BitDev + \
-                         DDAR_Ser2ICPRc + DDAR_DevAdd (__PREG(Ser2HSDR)))
-#define DDAR_Ser3UARTWr                 /* Ser. port 3 UART Write          */ \
-                        (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \
-                         DDAR_Ser3UARTTr + DDAR_DevAdd (__PREG(Ser3UTDR)))
-#define DDAR_Ser3UARTRd                 /* Ser. port 3 UART Read           */ \
-                        (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \
-                         DDAR_Ser3UARTRc + DDAR_DevAdd (__PREG(Ser3UTDR)))
-#define DDAR_Ser4MCP0Wr                 /* Ser. port 4 MCP 0 Write (audio) */ \
-                        (DDAR_DevWr + DDAR_Brst4 + DDAR_16BitDev + \
-                         DDAR_Ser4MCP0Tr + DDAR_DevAdd (__PREG(Ser4MCDR0)))
-#define DDAR_Ser4MCP0Rd                 /* Ser. port 4 MCP 0 Read (audio)  */ \
-                        (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \
-                         DDAR_Ser4MCP0Rc + DDAR_DevAdd (__PREG(Ser4MCDR0)))
-#define DDAR_Ser4MCP1Wr                 /* Ser. port 4 MCP 1 Write         */ \
-                                        /* (telecom)                       */ \
-                        (DDAR_DevWr + DDAR_Brst4 + DDAR_16BitDev + \
-                         DDAR_Ser4MCP1Tr + DDAR_DevAdd (__PREG(Ser4MCDR1)))
-#define DDAR_Ser4MCP1Rd                 /* Ser. port 4 MCP 1 Read          */ \
-                                        /* (telecom)                       */ \
-                        (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \
-                         DDAR_Ser4MCP1Rc + DDAR_DevAdd (__PREG(Ser4MCDR1)))
-#define DDAR_Ser4SSPWr                  /* Ser. port 4 SSP Write (16 bits) */ \
-                        (DDAR_DevWr + DDAR_Brst4 + DDAR_16BitDev + \
-                         DDAR_Ser4SSPTr + DDAR_DevAdd (__PREG(Ser4SSDR)))
-#define DDAR_Ser4SSPRd                  /* Ser. port 4 SSP Read (16 bits)  */ \
-                        (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \
-                         DDAR_Ser4SSPRc + DDAR_DevAdd (__PREG(Ser4SSDR)))
-
-#define DCSR_RUN        0x00000001      /* DMA running                     */
-#define DCSR_IE         0x00000002      /* DMA Interrupt Enable            */
-#define DCSR_ERROR      0x00000004      /* DMA ERROR                       */
-#define DCSR_DONEA      0x00000008      /* DONE DMA transfer buffer A      */
-#define DCSR_STRTA      0x00000010      /* STaRTed DMA transfer buffer A   */
-#define DCSR_DONEB      0x00000020      /* DONE DMA transfer buffer B      */
-#define DCSR_STRTB      0x00000040      /* STaRTed DMA transfer buffer B   */
-#define DCSR_BIU        0x00000080      /* DMA Buffer In Use               */
-#define DCSR_BufA       (DCSR_BIU*0)    /*  DMA Buffer A in use            */
-#define DCSR_BufB       (DCSR_BIU*1)    /*  DMA Buffer B in use            */
-
-#define DBT_TC          Fld (13, 0)     /* Transfer Count                  */
-#define DBTA_TCA        DBT_TC          /* Transfer Count buffer A         */
-#define DBTB_TCB        DBT_TC          /* Transfer Count buffer B         */
+#define DMA_SIZE        (6 * 0x20)
+#define DMA_PHYS        0xb0000000
 
 
 /*
@@ -1903,16 +1688,6 @@
 #define LCD_Int100_0A   0xF             /* LCD Intensity = 100.0% =  1     */
                                         /* (Alternative)                   */
 
-#define LCCR0           __REG(0xB0100000)  /* LCD Control Reg. 0 */
-#define LCSR            __REG(0xB0100004)  /* LCD Status Reg. */
-#define DBAR1           __REG(0xB0100010)  /* LCD DMA Base Address Reg. channel 1 */
-#define DCAR1           __REG(0xB0100014)  /* LCD DMA Current Address Reg. channel 1 */
-#define DBAR2           __REG(0xB0100018)  /* LCD DMA Base Address Reg.  channel 2 */
-#define DCAR2           __REG(0xB010001C)  /* LCD DMA Current Address Reg. channel 2 */
-#define LCCR1           __REG(0xB0100020)  /* LCD Control Reg. 1 */
-#define LCCR2           __REG(0xB0100024)  /* LCD Control Reg. 2 */
-#define LCCR3           __REG(0xB0100028)  /* LCD Control Reg. 3 */
-
 #define LCCR0_LEN       0x00000001      /* LCD ENable                      */
 #define LCCR0_CMS       0x00000002      /* Color/Monochrome display Select */
 #define LCCR0_Color     (LCCR0_CMS*0)   /*  Color display                  */
diff --git a/arch/arm/mach-sa1100/include/mach/collie.h b/arch/arm/mach-sa1100/include/mach/collie.h
index 52acda7061b7..f33679d2d3ee 100644
--- a/arch/arm/mach-sa1100/include/mach/collie.h
+++ b/arch/arm/mach-sa1100/include/mach/collie.h
@@ -1,7 +1,7 @@
 /*
  * arch/arm/mach-sa1100/include/mach/collie.h
  *
- * This file contains the hardware specific definitions for Assabet
+ * This file contains the hardware specific definitions for Collie
  * Only include this file from SA1100-specific files.
  *
  * ChangeLog:
@@ -13,6 +13,7 @@
 #ifndef __ASM_ARCH_COLLIE_H
 #define __ASM_ARCH_COLLIE_H
 
+extern void locomolcd_power(int on);
 
 #define COLLIE_SCOOP_GPIO_BASE  (GPIO_MAX + 1)
 #define COLLIE_GPIO_CHARGE_ON   (COLLIE_SCOOP_GPIO_BASE + 0)
diff --git a/arch/arm/mach-sa1100/include/mach/dma.h b/arch/arm/mach-sa1100/include/mach/dma.h
deleted file mode 100644
index dda1b351310d..000000000000
--- a/arch/arm/mach-sa1100/include/mach/dma.h
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * arch/arm/mach-sa1100/include/mach/dma.h
- *
- * Generic SA1100 DMA support
- *
- * Copyright (C) 2000 Nicolas Pitre
- *
- */
-
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-#include "hardware.h"
-
-
-/*
- * The SA1100 has six internal DMA channels.
- */
-#define SA1100_DMA_CHANNELS     6
-
-/*
- * Maximum physical DMA buffer size
- */
-#define MAX_DMA_SIZE            0x1fff
-#define CUT_DMA_SIZE            0x1000
-
-/*
- * All possible SA1100 devices a DMA channel can be attached to.
- */
-typedef enum {
-        DMA_Ser0UDCWr  = DDAR_Ser0UDCWr,   /* Ser. port 0 UDC Write */
-        DMA_Ser0UDCRd  = DDAR_Ser0UDCRd,   /* Ser. port 0 UDC Read */
-        DMA_Ser1UARTWr = DDAR_Ser1UARTWr,  /* Ser. port 1 UART Write */
-        DMA_Ser1UARTRd = DDAR_Ser1UARTRd,  /* Ser. port 1 UART Read */
-        DMA_Ser1SDLCWr = DDAR_Ser1SDLCWr,  /* Ser. port 1 SDLC Write */
-        DMA_Ser1SDLCRd = DDAR_Ser1SDLCRd,  /* Ser. port 1 SDLC Read */
-        DMA_Ser2UARTWr = DDAR_Ser2UARTWr,  /* Ser. port 2 UART Write */
-        DMA_Ser2UARTRd = DDAR_Ser2UARTRd,  /* Ser. port 2 UART Read */
-        DMA_Ser2HSSPWr = DDAR_Ser2HSSPWr,  /* Ser. port 2 HSSP Write */
-        DMA_Ser2HSSPRd = DDAR_Ser2HSSPRd,  /* Ser. port 2 HSSP Read */
-        DMA_Ser3UARTWr = DDAR_Ser3UARTWr,  /* Ser. port 3 UART Write */
-        DMA_Ser3UARTRd = DDAR_Ser3UARTRd,  /* Ser. port 3 UART Read */
-        DMA_Ser4MCP0Wr = DDAR_Ser4MCP0Wr,  /* Ser. port 4 MCP 0 Write (audio) */
-        DMA_Ser4MCP0Rd = DDAR_Ser4MCP0Rd,  /* Ser. port 4 MCP 0 Read (audio) */
-        DMA_Ser4MCP1Wr = DDAR_Ser4MCP1Wr,  /* Ser. port 4 MCP 1 Write */
-        DMA_Ser4MCP1Rd = DDAR_Ser4MCP1Rd,  /* Ser. port 4 MCP 1 Read */
-        DMA_Ser4SSPWr  = DDAR_Ser4SSPWr,   /* Ser. port 4 SSP Write (16 bits) */
-        DMA_Ser4SSPRd  = DDAR_Ser4SSPRd    /* Ser. port 4 SSP Read (16 bits) */
-} dma_device_t;
-
-typedef struct {
-        volatile u_long DDAR;
-        volatile u_long SetDCSR;
-        volatile u_long ClrDCSR;
-        volatile u_long RdDCSR;
-        volatile dma_addr_t DBSA;
-        volatile u_long DBTA;
-        volatile dma_addr_t DBSB;
-        volatile u_long DBTB;
-} dma_regs_t;
-
-typedef void (*dma_callback_t)(void *data);
-
-/*
- * DMA function prototypes
- */
-
-extern int sa1100_request_dma( dma_device_t device, const char *device_id,
-                               dma_callback_t callback, void *data,
-                               dma_regs_t **regs );
-extern void sa1100_free_dma( dma_regs_t *regs );
-extern int sa1100_start_dma( dma_regs_t *regs, dma_addr_t dma_ptr, u_int size );
-extern dma_addr_t sa1100_get_dma_pos(dma_regs_t *regs);
-extern void sa1100_reset_dma(dma_regs_t *regs);
-
-/**
- *      sa1100_stop_dma - stop DMA in progress
- *      @regs: identifier for the channel to use
- *
- *      This stops DMA without clearing buffer pointers. Unlike
- *      sa1100_clear_dma() this allows subsequent use of sa1100_resume_dma()
- *      or sa1100_get_dma_pos().
- *
- *      The @regs identifier is provided by a successful call to
- *      sa1100_request_dma().
- **/
-
-#define sa1100_stop_dma(regs)   ((regs)->ClrDCSR = DCSR_IE|DCSR_RUN)
-
-/**
- *      sa1100_resume_dma - resume DMA on a stopped channel
- *      @regs: identifier for the channel to use
- *
- *      This resumes DMA on a channel previously stopped with
- *      sa1100_stop_dma().
- *
- *      The @regs identifier is provided by a successful call to
- *      sa1100_request_dma().
- **/
-
-#define sa1100_resume_dma(regs) ((regs)->SetDCSR = DCSR_IE|DCSR_RUN)
-
-/**
- *      sa1100_clear_dma - clear DMA pointers
- *      @regs: identifier for the channel to use
- *
- *      This clear any DMA state so the DMA engine is ready to restart
- *      with new buffers through sa1100_start_dma(). Any buffers in flight
- *      are discarded.
- *
- *      The @regs identifier is provided by a successful call to
- *      sa1100_request_dma().
- **/
-
-#define sa1100_clear_dma(regs)  ((regs)->ClrDCSR = DCSR_IE|DCSR_RUN|DCSR_STRTA|DCSR_STRTB)
-
-#endif /* _ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-sa1100/include/mach/io.h b/arch/arm/mach-sa1100/include/mach/io.h
deleted file mode 100644
index dfc27ff08344..000000000000
--- a/arch/arm/mach-sa1100/include/mach/io.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * arch/arm/mach-sa1100/include/mach/io.h
- *
- * Copyright (C) 1997-1999 Russell King
- *
- * Modifications:
- *  06-12-1997  RMK     Created.
- *  07-04-1999  RMK     Major cleanup
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-/*
- * __io() is required to be an equivalent mapping to __mem_pci() for
- * SOC_COMMON to work.
- */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-sa1100/include/mach/irqs.h b/arch/arm/mach-sa1100/include/mach/irqs.h
index d18f21abef80..3790298b7142 100644
--- a/arch/arm/mach-sa1100/include/mach/irqs.h
+++ b/arch/arm/mach-sa1100/include/mach/irqs.h
@@ -71,22 +71,19 @@
 /*
  * Figure out the MAX IRQ number.
  *
- * If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1.
- * If we have an LoCoMo, the max IRQ is IRQ_BOARD_START + 4
- * Otherwise, we have the standard IRQs only.
+ * Neponset, SA1111 and UCB1x00 are sparse IRQ aware, so can dynamically
+ * allocate their IRQs above NR_IRQS.
+ *
+ * LoCoMo has 4 additional IRQs, but is not sparse IRQ aware, and so has
+ * to be included in the NR_IRQS calculation.
  */
-#ifdef CONFIG_SA1111
-#define NR_IRQS                 (IRQ_BOARD_END + 55)
-#elif defined(CONFIG_SHARP_LOCOMO)
-#define NR_IRQS                 (IRQ_BOARD_START + 4)
+#ifdef CONFIG_SHARP_LOCOMO
+#define NR_IRQS_LOCOMO          4
 #else
-#define NR_IRQS                 (IRQ_BOARD_START)
+#define NR_IRQS_LOCOMO          0
 #endif
 
-/*
- * Board specific IRQs.  Define them here.
- * Do not surround them with ifdefs.
- */
-#define IRQ_NEPONSET_SMC9196    (IRQ_BOARD_START + 0)
-#define IRQ_NEPONSET_USAR       (IRQ_BOARD_START + 1)
-#define IRQ_NEPONSET_SA1111     (IRQ_BOARD_START + 2)
+#ifndef NR_IRQS
+#define NR_IRQS (IRQ_BOARD_START + NR_IRQS_LOCOMO)
+#endif
+#define SA1100_NR_IRQS (IRQ_BOARD_START + NR_IRQS_LOCOMO)
diff --git a/arch/arm/mach-sa1100/include/mach/mcp.h b/arch/arm/mach-sa1100/include/mach/mcp.h
index ed1a331508a7..4b2860ae3828 100644
--- a/arch/arm/mach-sa1100/include/mach/mcp.h
+++ b/arch/arm/mach-sa1100/include/mach/mcp.h
@@ -16,7 +16,7 @@ struct mcp_plat_data {
         u32 mccr0;
         u32 mccr1;
         unsigned int sclk_rate;
-        int gpio_base;
+        void *codec_pdata;
 };
 
 #endif
diff --git a/arch/arm/mach-sa1100/include/mach/neponset.h b/arch/arm/mach-sa1100/include/mach/neponset.h
index ffe2bc45eed0..5516a52a329d 100644
--- a/arch/arm/mach-sa1100/include/mach/neponset.h
+++ b/arch/arm/mach-sa1100/include/mach/neponset.h
@@ -15,54 +15,6 @@
 /*
  * Neponset definitions: 
  */
-
-#define NEPONSET_CPLD_BASE      (0x10000000)
-#define Nep_p2v( x )            ((x) - NEPONSET_CPLD_BASE + 0xf3000000)
-#define Nep_v2p( x )            ((x) - 0xf3000000 + NEPONSET_CPLD_BASE)
-
-#define _IRR                    0x10000024      /* Interrupt Reason Register */
-#define _AUD_CTL                0x100000c0      /* Audio controls (RW)       */
-#define _MDM_CTL_0              0x100000b0      /* Modem control 0 (RW)      */
-#define _MDM_CTL_1              0x100000b4      /* Modem control 1 (RW)      */
-#define _NCR_0                  0x100000a0      /* Control Register (RW)     */
-#define _KP_X_OUT               0x10000090      /* Keypad row write (RW)     */
-#define _KP_Y_IN                0x10000080      /* Keypad column read (RO)   */
-#define _SWPK                   0x10000020      /* Switch pack (RO)          */
-#define _WHOAMI                 0x10000000      /* System ID Register (RO)   */
-
-#define _LEDS                   0x10000010      /* LEDs [31:0] (WO)          */
-
-#define IRR                     (*((volatile u_char *) Nep_p2v(_IRR)))
-#define AUD_CTL                 (*((volatile u_char *) Nep_p2v(_AUD_CTL)))
-#define MDM_CTL_0               (*((volatile u_char *) Nep_p2v(_MDM_CTL_0)))
-#define MDM_CTL_1               (*((volatile u_char *) Nep_p2v(_MDM_CTL_1)))
-#define NCR_0                   (*((volatile u_char *) Nep_p2v(_NCR_0)))
-#define KP_X_OUT                (*((volatile u_char *) Nep_p2v(_KP_X_OUT)))
-#define KP_Y_IN                 (*((volatile u_char *) Nep_p2v(_KP_Y_IN)))
-#define SWPK                    (*((volatile u_char *) Nep_p2v(_SWPK)))
-#define WHOAMI                  (*((volatile u_char *) Nep_p2v(_WHOAMI)))
-
-#define LEDS                    (*((volatile Word   *) Nep_p2v(_LEDS)))
-
-#define IRR_ETHERNET            (1<<0)
-#define IRR_USAR                (1<<1)
-#define IRR_SA1111              (1<<2)
-
-#define AUD_SEL_1341            (1<<0)
-#define AUD_MUTE_1341           (1<<1)
-
-#define MDM_CTL0_RTS1           (1 << 0)
-#define MDM_CTL0_DTR1           (1 << 1)
-#define MDM_CTL0_RTS2           (1 << 2)
-#define MDM_CTL0_DTR2           (1 << 3)
-
-#define MDM_CTL1_CTS1           (1 << 0)
-#define MDM_CTL1_DSR1           (1 << 1)
-#define MDM_CTL1_DCD1           (1 << 2)
-#define MDM_CTL1_CTS2           (1 << 3)
-#define MDM_CTL1_DSR2           (1 << 4)
-#define MDM_CTL1_DCD2           (1 << 5)
-
 #define NCR_GP01_OFF            (1<<0)
 #define NCR_TP_PWR_EN           (1<<1)
 #define NCR_MS_PWR_EN           (1<<2)
@@ -71,4 +23,8 @@
 #define NCR_A0VPP               (1<<5)
 #define NCR_A1VPP               (1<<6)
 
+void neponset_ncr_frob(unsigned int, unsigned int);
+#define neponset_ncr_set(v)     neponset_ncr_frob(0, v)
+#define neponset_ncr_clear(v)   neponset_ncr_frob(v, 0)
+
 #endif
diff --git a/arch/arm/mach-sa1100/include/mach/shannon.h b/arch/arm/mach-sa1100/include/mach/shannon.h
index 019f857a7938..fff39e02b496 100644
--- a/arch/arm/mach-sa1100/include/mach/shannon.h
+++ b/arch/arm/mach-sa1100/include/mach/shannon.h
@@ -21,7 +21,7 @@
 #define SHANNON_GPIO_U3_RTS             GPIO_GPIO (19)  /* ?? */
 #define SHANNON_GPIO_U3_CTS             GPIO_GPIO (20)  /* ?? */
 #define SHANNON_GPIO_SENSE_12V          GPIO_GPIO (21)  /* Input, 12v flash unprotect detected */
-#define SHANNON_GPIO_DISP_EN            GPIO_GPIO (22)  /* out */
+#define SHANNON_GPIO_DISP_EN            22              /* out */
 /* XXX GPIO 23 unaccounted for */
 #define SHANNON_GPIO_EJECT_0            24              /* in */
 #define SHANNON_GPIO_EJECT_1            25              /* in */
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c
index dfbf824a69fa..516ccc25d7fd 100644
--- a/arch/arm/mach-sa1100/irq.c
+++ b/arch/arm/mach-sa1100/irq.c
@@ -17,6 +17,7 @@
 #include <linux/syscore_ops.h>
 
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 #include <asm/mach/irq.h>
 
 #include "generic.h"
@@ -221,11 +222,8 @@ static struct irq_chip sa1100_normal_chip = {
         .irq_set_wake   = sa1100_set_wake,
 };
 
-static struct resource irq_resource = {
-        .name   = "irqs",
-        .start  = 0x90050000,
-        .end    = 0x9005ffff,
-};
+static struct resource irq_resource =
+        DEFINE_RES_MEM_NAMED(0x90050000, SZ_64K, "irqs");
 
 static struct sa1100irq_state {
         unsigned int    saved;
diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c
index ee121d6f0480..ca7a7e834720 100644
--- a/arch/arm/mach-sa1100/jornada720.c
+++ b/arch/arm/mach-sa1100/jornada720.c
@@ -23,9 +23,7 @@
 #include <linux/mtd/partitions.h>
 #include <video/s1d13xxxfb.h>
 
-#include <mach/hardware.h>
 #include <asm/hardware/sa1111.h>
-#include <asm/irq.h>
 #include <asm/page.h>
 #include <asm/mach-types.h>
 #include <asm/setup.h>
@@ -34,6 +32,9 @@
 #include <asm/mach/map.h>
 #include <asm/mach/serial_sa1100.h>
 
+#include <mach/hardware.h>
+#include <mach/irqs.h>
+
 #include "generic.h"
 
 /*
@@ -46,7 +47,7 @@
 
 /* memory space (line 52 of HP's doc) */
 #define SA1111REGSTART  0x40000000
-#define SA1111REGLEN    0x00001fff
+#define SA1111REGLEN    0x00002000
 #define EPSONREGSTART   0x48000000
 #define EPSONREGLEN     0x00100000
 #define EPSONFBSTART    0x48200000
@@ -174,16 +175,8 @@ static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
 };
 
 static struct resource s1d13xxxfb_resources[] = {
-        [0] = {
-                .start  = EPSONFBSTART,
-                .end    = EPSONFBSTART + EPSONFBLEN,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = EPSONREGSTART,
-                .end    = EPSONREGSTART + EPSONREGLEN,
-                .flags  = IORESOURCE_MEM,
-        }
+        [0] = DEFINE_RES_MEM(EPSONFBSTART, EPSONFBLEN),
+        [1] = DEFINE_RES_MEM(EPSONREGSTART, EPSONREGLEN),
 };
 
 static struct platform_device s1d13xxxfb_device = {
@@ -197,20 +190,12 @@ static struct platform_device s1d13xxxfb_device = {
 };
 
 static struct resource sa1111_resources[] = {
-        [0] = {
-                .start          = SA1111REGSTART,
-                .end            = SA1111REGSTART + SA1111REGLEN,
-                .flags          = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start          = IRQ_GPIO1,
-                .end            = IRQ_GPIO1,
-                .flags          = IORESOURCE_IRQ,
-        },
+        [0] = DEFINE_RES_MEM(SA1111REGSTART, SA1111REGLEN),
+        [1] = DEFINE_RES_IRQ(IRQ_GPIO1),
 };
 
 static struct sa1111_platform_data sa1111_info = {
-        .irq_base       = IRQ_BOARD_END,
+        .disable_devs   = SA1111_DEVID_PS2_MSE,
 };
 
 static u64 sa1111_dmamask = 0xffffffffUL;
@@ -284,11 +269,6 @@ static struct map_desc jornada720_io_desc[] __initdata = {
                 .pfn            = __phys_to_pfn(EPSONFBSTART),
                 .length         = EPSONFBLEN,
                 .type           = MT_DEVICE
-        }, {    /* SA-1111 */
-                .virtual        = 0xf4000000,
-                .pfn            = __phys_to_pfn(SA1111REGSTART),
-                .length         = SA1111REGLEN,
-                .type           = MT_DEVICE
         }
 };
 
@@ -352,11 +332,8 @@ static struct flash_platform_data jornada720_flash_data = {
         .nr_parts       = ARRAY_SIZE(jornada720_partitions),
 };
 
-static struct resource jornada720_flash_resource = {
-        .start          = SA1100_CS0_PHYS,
-        .end            = SA1100_CS0_PHYS + SZ_32M - 1,
-        .flags          = IORESOURCE_MEM,
-};
+static struct resource jornada720_flash_resource =
+        DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
 
 static void __init jornada720_mach_init(void)
 {
@@ -367,6 +344,7 @@ MACHINE_START(JORNADA720, "HP Jornada 720")
         /* Maintainer: Kristoffer Ericson <Kristoffer.Ericson@gmail.com> */
         .atag_offset    = 0x100,
         .map_io         = jornada720_map_io,
+        .nr_irqs        = SA1100_NR_IRQS,
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = jornada720_mach_init,
diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c
index af4e2761f3db..eb6534e0b0d0 100644
--- a/arch/arm/mach-sa1100/lart.c
+++ b/arch/arm/mach-sa1100/lart.c
@@ -6,6 +6,8 @@
 #include <linux/kernel.h>
 #include <linux/tty.h>
 
+#include <video/sa1100fb.h>
+
 #include <mach/hardware.h>
 #include <asm/setup.h>
 #include <asm/mach-types.h>
@@ -15,6 +17,7 @@
 #include <asm/mach/map.h>
 #include <asm/mach/serial_sa1100.h>
 #include <mach/mcp.h>
+#include <mach/irqs.h>
 
 #include "generic.h"
 
@@ -26,8 +29,86 @@ static struct mcp_plat_data lart_mcp_data = {
         .sclk_rate      = 11981000,
 };
 
+#ifdef LART_GREY_LCD
+static struct sa1100fb_mach_info lart_grey_info = {
+        .pixclock       = 150000,       .bpp            = 4,
+        .xres           = 320,          .yres           = 240,
+
+        .hsync_len      = 1,            .vsync_len      = 1,
+        .left_margin    = 4,            .upper_margin   = 0,
+        .right_margin   = 2,            .lower_margin   = 0,
+
+        .cmap_greyscale = 1,
+        .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+
+        .lccr0          = LCCR0_Mono | LCCR0_Sngl | LCCR0_Pas | LCCR0_4PixMono,
+        .lccr3          = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
+};
+#endif
+#ifdef LART_COLOR_LCD
+static struct sa1100fb_mach_info lart_color_info = {
+        .pixclock       = 150000,       .bpp            = 16,
+        .xres           = 320,          .yres           = 240,
+
+        .hsync_len      = 2,            .vsync_len      = 3,
+        .left_margin    = 69,           .upper_margin   = 14,
+        .right_margin   = 8,            .lower_margin   = 4,
+
+        .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
+        .lccr3          = LCCR3_OutEnH | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
+};
+#endif
+#ifdef LART_VIDEO_OUT
+static struct sa1100fb_mach_info lart_video_info = {
+        .pixclock       = 39721,        .bpp            = 16,
+        .xres           = 640,          .yres           = 480,
+
+        .hsync_len      = 95,           .vsync_len      = 2,
+        .left_margin    = 40,           .upper_margin   = 32,
+        .right_margin   = 24,           .lower_margin   = 11,
+
+        .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+
+        .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
+        .lccr3          = LCCR3_OutEnL | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
+};
+#endif
+
+#ifdef LART_KIT01_LCD
+static struct sa1100fb_mach_info lart_kit01_info = {
+        .pixclock       = 63291,        .bpp            = 16,
+        .xres           = 640,          .yres           = 480,
+
+        .hsync_len      = 64,           .vsync_len      = 3,
+        .left_margin    = 122,          .upper_margin   = 45,
+        .right_margin   = 10,           .lower_margin   = 10,
+
+        .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
+        .lccr3          = LCCR3_OutEnH | LCCR3_PixFlEdg
+};
+#endif
+
 static void __init lart_init(void)
 {
+        struct sa1100fb_mach_info *inf = NULL;
+
+#ifdef LART_GREY_LCD
+        inf = &lart_grey_info;
+#endif
+#ifdef LART_COLOR_LCD
+        inf = &lart_color_info;
+#endif
+#ifdef LART_VIDEO_OUT
+        inf = &lart_video_info;
+#endif
+#ifdef LART_KIT01_LCD
+        inf = &lart_kit01_info;
+#endif
+
+        if (inf)
+                sa11x0_register_lcd(inf);
+
+        sa11x0_ppc_configure_mcp();
         sa11x0_register_mcp(&lart_mcp_data);
 }
 
@@ -63,6 +144,7 @@ static void __init lart_map_io(void)
 MACHINE_START(LART, "LART")
         .atag_offset    = 0x100,
         .map_io         = lart_map_io,
+        .nr_irqs        = SA1100_NR_IRQS,
         .init_irq       = sa1100_init_irq,
         .init_machine   = lart_init,
         .timer          = &sa1100_timer,
diff --git a/arch/arm/mach-sa1100/leds-assabet.c b/arch/arm/mach-sa1100/leds-assabet.c
index 64e9b4b11b54..3699176bca94 100644
--- a/arch/arm/mach-sa1100/leds-assabet.c
+++ b/arch/arm/mach-sa1100/leds-assabet.c
@@ -13,7 +13,6 @@
 
 #include <mach/hardware.h>
 #include <asm/leds.h>
-#include <asm/system.h>
 #include <mach/assabet.h>
 
 #include "leds.h"
diff --git a/arch/arm/mach-sa1100/leds-badge4.c b/arch/arm/mach-sa1100/leds-badge4.c
index cf1e38458b81..f99fac3eedb6 100644
--- a/arch/arm/mach-sa1100/leds-badge4.c
+++ b/arch/arm/mach-sa1100/leds-badge4.c
@@ -14,7 +14,6 @@
 
 #include <mach/hardware.h>
 #include <asm/leds.h>
-#include <asm/system.h>
 
 #include "leds.h"
 
diff --git a/arch/arm/mach-sa1100/leds-cerf.c b/arch/arm/mach-sa1100/leds-cerf.c
index 259b48e0be89..040540fb7d8a 100644
--- a/arch/arm/mach-sa1100/leds-cerf.c
+++ b/arch/arm/mach-sa1100/leds-cerf.c
@@ -7,7 +7,6 @@
 
 #include <mach/hardware.h>
 #include <asm/leds.h>
-#include <asm/system.h>
 
 #include "leds.h"
 
diff --git a/arch/arm/mach-sa1100/leds-hackkit.c b/arch/arm/mach-sa1100/leds-hackkit.c
index 2bce137462e4..6a2352436e62 100644
--- a/arch/arm/mach-sa1100/leds-hackkit.c
+++ b/arch/arm/mach-sa1100/leds-hackkit.c
@@ -13,7 +13,6 @@
 
 #include <mach/hardware.h>
 #include <asm/leds.h>
-#include <asm/system.h>
 
 #include "leds.h"
 
diff --git a/arch/arm/mach-sa1100/leds-lart.c b/arch/arm/mach-sa1100/leds-lart.c
index 0505a1fdcdb2..a51830c60e53 100644
--- a/arch/arm/mach-sa1100/leds-lart.c
+++ b/arch/arm/mach-sa1100/leds-lart.c
@@ -13,7 +13,6 @@
 
 #include <mach/hardware.h>
 #include <asm/leds.h>
-#include <asm/system.h>
 
 #include "leds.h"
 
diff --git a/arch/arm/mach-sa1100/nanoengine.c b/arch/arm/mach-sa1100/nanoengine.c
index 85f6ee672225..8f6446b9f025 100644
--- a/arch/arm/mach-sa1100/nanoengine.c
+++ b/arch/arm/mach-sa1100/nanoengine.c
@@ -28,6 +28,7 @@
 
 #include <mach/hardware.h>
 #include <mach/nanoengine.h>
+#include <mach/irqs.h>
 
 #include "generic.h"
 
@@ -58,15 +59,8 @@ static struct flash_platform_data nanoengine_flash_data = {
 };
 
 static struct resource nanoengine_flash_resources[] = {
-        {
-                .start  = SA1100_CS0_PHYS,
-                .end    = SA1100_CS0_PHYS + SZ_32M - 1,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = SA1100_CS1_PHYS,
-                .end    = SA1100_CS1_PHYS + SZ_32M - 1,
-                .flags  = IORESOURCE_MEM,
-        }
+        DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
+        DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
 };
 
 static struct map_desc nanoengine_io_desc[] __initdata = {
@@ -114,6 +108,7 @@ static void __init nanoengine_init(void)
 MACHINE_START(NANOENGINE, "BSE nanoEngine")
         .atag_offset    = 0x100,
         .map_io         = nanoengine_map_io,
+        .nr_irqs        = SA1100_NR_IRQS,
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = nanoengine_init,
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index b4fa53a1427e..6c58f01b358a 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -1,89 +1,104 @@
 /*
  * linux/arch/arm/mach-sa1100/neponset.c
- *
  */
-#include <linux/kernel.h>
+#include <linux/err.h>
 #include <linux/init.h>
-#include <linux/tty.h>
 #include <linux/ioport.h>
-#include <linux/serial_core.h>
+#include <linux/irq.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/platform_device.h>
+#include <linux/pm.h>
+#include <linux/serial_core.h>
+#include <linux/slab.h>
 
-#include <mach/hardware.h>
 #include <asm/mach-types.h>
-#include <asm/irq.h>
 #include <asm/mach/map.h>
-#include <asm/mach/irq.h>
 #include <asm/mach/serial_sa1100.h>
-#include <mach/assabet.h>
-#include <mach/neponset.h>
 #include <asm/hardware/sa1111.h>
 #include <asm/sizes.h>
 
-/*
- * Install handler for Neponset IRQ.  Note that we have to loop here
- * since the ETHERNET and USAR IRQs are level based, and we need to
- * ensure that the IRQ signal is deasserted before returning.  This
- * is rather unfortunate.
- */
-static void
-neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
-{
-        unsigned int irr;
-
-        while (1) {
-                /*
-                 * Acknowledge the parent IRQ.
-                 */
-                desc->irq_data.chip->irq_ack(&desc->irq_data);
-
-                /*
-                 * Read the interrupt reason register.  Let's have all
-                 * active IRQ bits high.  Note: there is a typo in the
-                 * Neponset user's guide for the SA1111 IRR level.
-                 */
-                irr = IRR ^ (IRR_ETHERNET | IRR_USAR);
-
-                if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0)
-                        break;
-
-                /*
-                 * Since there is no individual mask, we have to
-                 * mask the parent IRQ.  This is safe, since we'll
-                 * recheck the register for any pending IRQs.
-                 */
-                if (irr & (IRR_ETHERNET | IRR_USAR)) {
-                        desc->irq_data.chip->irq_mask(&desc->irq_data);
-
-                        /*
-                         * Ack the interrupt now to prevent re-entering
-                         * this neponset handler.  Again, this is safe
-                         * since we'll check the IRR register prior to
-                         * leaving.
-                         */
-                        desc->irq_data.chip->irq_ack(&desc->irq_data);
+#include <mach/hardware.h>
+#include <mach/assabet.h>
+#include <mach/neponset.h>
+#include <mach/irqs.h>
+
+#define NEP_IRQ_SMC91X  0
+#define NEP_IRQ_USAR    1
+#define NEP_IRQ_SA1111  2
+#define NEP_IRQ_NR      3
+
+#define WHOAMI          0x00
+#define LEDS            0x10
+#define SWPK            0x20
+#define IRR             0x24
+#define KP_Y_IN         0x80
+#define KP_X_OUT        0x90
+#define NCR_0           0xa0
+#define MDM_CTL_0       0xb0
+#define MDM_CTL_1       0xb4
+#define AUD_CTL         0xc0
+
+#define IRR_ETHERNET    (1 << 0)
+#define IRR_USAR        (1 << 1)
+#define IRR_SA1111      (1 << 2)
+
+#define MDM_CTL0_RTS1   (1 << 0)
+#define MDM_CTL0_DTR1   (1 << 1)
+#define MDM_CTL0_RTS2   (1 << 2)
+#define MDM_CTL0_DTR2   (1 << 3)
+
+#define MDM_CTL1_CTS1   (1 << 0)
+#define MDM_CTL1_DSR1   (1 << 1)
+#define MDM_CTL1_DCD1   (1 << 2)
+#define MDM_CTL1_CTS2   (1 << 3)
+#define MDM_CTL1_DSR2   (1 << 4)
+#define MDM_CTL1_DCD2   (1 << 5)
+
+#define AUD_SEL_1341    (1 << 0)
+#define AUD_MUTE_1341   (1 << 1)
 
-                        if (irr & IRR_ETHERNET) {
-                                generic_handle_irq(IRQ_NEPONSET_SMC9196);
-                        }
+extern void sa1110_mb_disable(void);
 
-                        if (irr & IRR_USAR) {
-                                generic_handle_irq(IRQ_NEPONSET_USAR);
-                        }
+struct neponset_drvdata {
+        void __iomem *base;
+        struct platform_device *sa1111;
+        struct platform_device *smc91x;
+        unsigned irq_base;
+#ifdef CONFIG_PM_SLEEP
+        u32 ncr0;
+        u32 mdm_ctl_0;
+#endif
+};
 
-                        desc->irq_data.chip->irq_unmask(&desc->irq_data);
-                }
+static void __iomem *nep_base;
 
-                if (irr & IRR_SA1111) {
-                        generic_handle_irq(IRQ_NEPONSET_SA1111);
-                }
+void neponset_ncr_frob(unsigned int mask, unsigned int val)
+{
+        void __iomem *base = nep_base;
+
+        if (base) {
+                unsigned long flags;
+                unsigned v;
+
+                local_irq_save(flags);
+                v = readb_relaxed(base + NCR_0);
+                writeb_relaxed((v & ~mask) | val, base + NCR_0);
+                local_irq_restore(flags);
+        } else {
+                WARN(1, "nep_base unset\n");
         }
 }
 
 static void neponset_set_mctrl(struct uart_port *port, u_int mctrl)
 {
-        u_int mdm_ctl0 = MDM_CTL_0;
+        void __iomem *base = nep_base;
+        u_int mdm_ctl0;
 
+        if (!base)
+                return;
+
+        mdm_ctl0 = readb_relaxed(base + MDM_CTL_0);
         if (port->mapbase == _Ser1UTCR0) {
                 if (mctrl & TIOCM_RTS)
                         mdm_ctl0 &= ~MDM_CTL0_RTS2;
@@ -106,14 +121,19 @@ static void neponset_set_mctrl(struct uart_port *port, u_int mctrl)
                         mdm_ctl0 |= MDM_CTL0_DTR1;
         }
 
-        MDM_CTL_0 = mdm_ctl0;
+        writeb_relaxed(mdm_ctl0, base + MDM_CTL_0);
 }
 
 static u_int neponset_get_mctrl(struct uart_port *port)
 {
+        void __iomem *base = nep_base;
         u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
-        u_int mdm_ctl1 = MDM_CTL_1;
+        u_int mdm_ctl1;
+
+        if (!base)
+                return ret;
 
+        mdm_ctl1 = readb_relaxed(base + MDM_CTL_1);
         if (port->mapbase == _Ser1UTCR0) {
                 if (mdm_ctl1 & MDM_CTL1_DCD2)
                         ret &= ~TIOCM_CD;
@@ -138,209 +158,278 @@ static struct sa1100_port_fns neponset_port_fns __devinitdata = {
         .get_mctrl      = neponset_get_mctrl,
 };
 
-static int __devinit neponset_probe(struct platform_device *dev)
+/*
+ * Install handler for Neponset IRQ.  Note that we have to loop here
+ * since the ETHERNET and USAR IRQs are level based, and we need to
+ * ensure that the IRQ signal is deasserted before returning.  This
+ * is rather unfortunate.
+ */
+static void neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
-        sa1100_register_uart_fns(&neponset_port_fns);
+        struct neponset_drvdata *d = irq_desc_get_handler_data(desc);
+        unsigned int irr;
 
-        /*
-         * Install handler for GPIO25.
-         */
-        irq_set_irq_type(IRQ_GPIO25, IRQ_TYPE_EDGE_RISING);
-        irq_set_chained_handler(IRQ_GPIO25, neponset_irq_handler);
+        while (1) {
+                /*
+                 * Acknowledge the parent IRQ.
+                 */
+                desc->irq_data.chip->irq_ack(&desc->irq_data);
 
-        /*
-         * We would set IRQ_GPIO25 to be a wake-up IRQ, but
-         * unfortunately something on the Neponset activates
-         * this IRQ on sleep (ethernet?)
-         */
-#if 0
-        enable_irq_wake(IRQ_GPIO25);
-#endif
+                /*
+                 * Read the interrupt reason register.  Let's have all
+                 * active IRQ bits high.  Note: there is a typo in the
+                 * Neponset user's guide for the SA1111 IRR level.
+                 */
+                irr = readb_relaxed(d->base + IRR);
+                irr ^= IRR_ETHERNET | IRR_USAR;
 
-        /*
-         * Setup other Neponset IRQs.  SA1111 will be done by the
-         * generic SA1111 code.
-         */
-        irq_set_handler(IRQ_NEPONSET_SMC9196, handle_simple_irq);
-        set_irq_flags(IRQ_NEPONSET_SMC9196, IRQF_VALID | IRQF_PROBE);
-        irq_set_handler(IRQ_NEPONSET_USAR, handle_simple_irq);
-        set_irq_flags(IRQ_NEPONSET_USAR, IRQF_VALID | IRQF_PROBE);
+                if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0)
+                        break;
 
-        /*
-         * Disable GPIO 0/1 drivers so the buttons work on the module.
-         */
-        NCR_0 = NCR_GP01_OFF;
+                /*
+                 * Since there is no individual mask, we have to
+                 * mask the parent IRQ.  This is safe, since we'll
+                 * recheck the register for any pending IRQs.
+                 */
+                if (irr & (IRR_ETHERNET | IRR_USAR)) {
+                        desc->irq_data.chip->irq_mask(&desc->irq_data);
 
-        return 0;
-}
+                        /*
+                         * Ack the interrupt now to prevent re-entering
+                         * this neponset handler.  Again, this is safe
+                         * since we'll check the IRR register prior to
+                         * leaving.
+                         */
+                        desc->irq_data.chip->irq_ack(&desc->irq_data);
 
-#ifdef CONFIG_PM
+                        if (irr & IRR_ETHERNET)
+                                generic_handle_irq(d->irq_base + NEP_IRQ_SMC91X);
 
-/*
- * LDM power management.
- */
-static unsigned int neponset_saved_state;
+                        if (irr & IRR_USAR)
+                                generic_handle_irq(d->irq_base + NEP_IRQ_USAR);
 
-static int neponset_suspend(struct platform_device *dev, pm_message_t state)
-{
-        /*
-         * Save state.
-         */
-        neponset_saved_state = NCR_0;
+                        desc->irq_data.chip->irq_unmask(&desc->irq_data);
+                }
 
-        return 0;
+                if (irr & IRR_SA1111)
+                        generic_handle_irq(d->irq_base + NEP_IRQ_SA1111);
+        }
 }
 
-static int neponset_resume(struct platform_device *dev)
+/* Yes, we really do not have any kind of masking or unmasking */
+static void nochip_noop(struct irq_data *irq)
 {
-        NCR_0 = neponset_saved_state;
-
-        return 0;
 }
 
-#else
-#define neponset_suspend NULL
-#define neponset_resume  NULL
-#endif
-
-static struct platform_driver neponset_device_driver = {
-        .probe          = neponset_probe,
-        .suspend        = neponset_suspend,
-        .resume         = neponset_resume,
-        .driver         = {
-                .name   = "neponset",
-        },
-};
-
-static struct resource neponset_resources[] = {
-        [0] = {
-                .start  = 0x10000000,
-                .end    = 0x17ffffff,
-                .flags  = IORESOURCE_MEM,
-        },
-};
-
-static struct platform_device neponset_device = {
-        .name           = "neponset",
-        .id             = 0,
-        .num_resources  = ARRAY_SIZE(neponset_resources),
-        .resource       = neponset_resources,
-};
-
-static struct resource sa1111_resources[] = {
-        [0] = {
-                .start  = 0x40000000,
-                .end    = 0x40001fff,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = IRQ_NEPONSET_SA1111,
-                .end    = IRQ_NEPONSET_SA1111,
-                .flags  = IORESOURCE_IRQ,
-        },
+static struct irq_chip nochip = {
+        .name = "neponset",
+        .irq_ack = nochip_noop,
+        .irq_mask = nochip_noop,
+        .irq_unmask = nochip_noop,
 };
 
 static struct sa1111_platform_data sa1111_info = {
-        .irq_base       = IRQ_BOARD_END,
+        .disable_devs   = SA1111_DEVID_PS2_MSE,
 };
 
-static u64 sa1111_dmamask = 0xffffffffUL;
+static int __devinit neponset_probe(struct platform_device *dev)
+{
+        struct neponset_drvdata *d;
+        struct resource *nep_res, *sa1111_res, *smc91x_res;
+        struct resource sa1111_resources[] = {
+                DEFINE_RES_MEM(0x40000000, SZ_8K),
+                { .flags = IORESOURCE_IRQ },
+        };
+        struct platform_device_info sa1111_devinfo = {
+                .parent = &dev->dev,
+                .name = "sa1111",
+                .id = 0,
+                .res = sa1111_resources,
+                .num_res = ARRAY_SIZE(sa1111_resources),
+                .data = &sa1111_info,
+                .size_data = sizeof(sa1111_info),
+                .dma_mask = 0xffffffffUL,
+        };
+        struct resource smc91x_resources[] = {
+                DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS,
+                        0x02000000, "smc91x-regs"),
+                DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS + 0x02000000,
+                        0x02000000, "smc91x-attrib"),
+                { .flags = IORESOURCE_IRQ },
+        };
+        struct platform_device_info smc91x_devinfo = {
+                .parent = &dev->dev,
+                .name = "smc91x",
+                .id = 0,
+                .res = smc91x_resources,
+                .num_res = ARRAY_SIZE(smc91x_resources),
+        };
+        int ret, irq;
+
+        if (nep_base)
+                return -EBUSY;
+
+        irq = ret = platform_get_irq(dev, 0);
+        if (ret < 0)
+                goto err_alloc;
+
+        nep_res = platform_get_resource(dev, IORESOURCE_MEM, 0);
+        smc91x_res = platform_get_resource(dev, IORESOURCE_MEM, 1);
+        sa1111_res = platform_get_resource(dev, IORESOURCE_MEM, 2);
+        if (!nep_res || !smc91x_res || !sa1111_res) {
+                ret = -ENXIO;
+                goto err_alloc;
+        }
 
-static struct platform_device sa1111_device = {
-        .name           = "sa1111",
-        .id             = 0,
-        .dev            = {
-                .dma_mask = &sa1111_dmamask,
-                .coherent_dma_mask = 0xffffffff,
-                .platform_data = &sa1111_info,
-        },
-        .num_resources  = ARRAY_SIZE(sa1111_resources),
-        .resource       = sa1111_resources,
-};
+        d = kzalloc(sizeof(*d), GFP_KERNEL);
+        if (!d) {
+                ret = -ENOMEM;
+                goto err_alloc;
+        }
 
-static struct resource smc91x_resources[] = {
-        [0] = {
-                .name   = "smc91x-regs",
-                .start  = SA1100_CS3_PHYS,
-                .end    = SA1100_CS3_PHYS + 0x01ffffff,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = IRQ_NEPONSET_SMC9196,
-                .end    = IRQ_NEPONSET_SMC9196,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                .name   = "smc91x-attrib",
-                .start  = SA1100_CS3_PHYS + 0x02000000,
-                .end    = SA1100_CS3_PHYS + 0x03ffffff,
-                .flags  = IORESOURCE_MEM,
-        },
-};
+        d->base = ioremap(nep_res->start, SZ_4K);
+        if (!d->base) {
+                ret = -ENOMEM;
+                goto err_ioremap;
+        }
 
-static struct platform_device smc91x_device = {
-        .name           = "smc91x",
-        .id             = 0,
-        .num_resources  = ARRAY_SIZE(smc91x_resources),
-        .resource       = smc91x_resources,
-};
+        if (readb_relaxed(d->base + WHOAMI) != 0x11) {
+                dev_warn(&dev->dev, "Neponset board detected, but wrong ID: %02x\n",
+                         readb_relaxed(d->base + WHOAMI));
+                ret = -ENODEV;
+                goto err_id;
+        }
 
-static struct platform_device *devices[] __initdata = {
-        &neponset_device,
-        &sa1111_device,
-        &smc91x_device,
-};
+        ret = irq_alloc_descs(-1, IRQ_BOARD_START, NEP_IRQ_NR, -1);
+        if (ret <= 0) {
+                dev_err(&dev->dev, "unable to allocate %u irqs: %d\n",
+                        NEP_IRQ_NR, ret);
+                if (ret == 0)
+                        ret = -ENOMEM;
+                goto err_irq_alloc;
+        }
 
-extern void sa1110_mb_disable(void);
+        d->irq_base = ret;
 
-static int __init neponset_init(void)
-{
-        platform_driver_register(&neponset_device_driver);
+        irq_set_chip_and_handler(d->irq_base + NEP_IRQ_SMC91X, &nochip,
+                handle_simple_irq);
+        set_irq_flags(d->irq_base + NEP_IRQ_SMC91X, IRQF_VALID | IRQF_PROBE);
+        irq_set_chip_and_handler(d->irq_base + NEP_IRQ_USAR, &nochip,
+                handle_simple_irq);
+        set_irq_flags(d->irq_base + NEP_IRQ_USAR, IRQF_VALID | IRQF_PROBE);
+        irq_set_chip(d->irq_base + NEP_IRQ_SA1111, &nochip);
 
-        /*
-         * The Neponset is only present on the Assabet machine type.
-         */
-        if (!machine_is_assabet())
-                return -ENODEV;
+        irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
+        irq_set_handler_data(irq, d);
+        irq_set_chained_handler(irq, neponset_irq_handler);
 
         /*
-         * Ensure that the memory bus request/grant signals are setup,
-         * and the grant is held in its inactive state, whether or not
-         * we actually have a Neponset attached.
+         * We would set IRQ_GPIO25 to be a wake-up IRQ, but unfortunately
+         * something on the Neponset activates this IRQ on sleep (eth?)
          */
+#if 0
+        enable_irq_wake(irq);
+#endif
+
+        dev_info(&dev->dev, "Neponset daughter board, providing IRQ%u-%u\n",
+                 d->irq_base, d->irq_base + NEP_IRQ_NR - 1);
+        nep_base = d->base;
+
+        sa1100_register_uart_fns(&neponset_port_fns);
+
+        /* Ensure that the memory bus request/grant signals are setup */
         sa1110_mb_disable();
 
-        if (!machine_has_neponset()) {
-                printk(KERN_DEBUG "Neponset expansion board not present\n");
-                return -ENODEV;
-        }
+        /* Disable GPIO 0/1 drivers so the buttons work on the Assabet */
+        writeb_relaxed(NCR_GP01_OFF, d->base + NCR_0);
 
-        if (WHOAMI != 0x11) {
-                printk(KERN_WARNING "Neponset board detected, but "
-                        "wrong ID: %02x\n", WHOAMI);
-                return -ENODEV;
-        }
+        sa1111_resources[0].parent = sa1111_res;
+        sa1111_resources[1].start = d->irq_base + NEP_IRQ_SA1111;
+        sa1111_resources[1].end = d->irq_base + NEP_IRQ_SA1111;
+        d->sa1111 = platform_device_register_full(&sa1111_devinfo);
+
+        smc91x_resources[0].parent = smc91x_res;
+        smc91x_resources[1].parent = smc91x_res;
+        smc91x_resources[2].start = d->irq_base + NEP_IRQ_SMC91X;
+        smc91x_resources[2].end = d->irq_base + NEP_IRQ_SMC91X;
+        d->smc91x = platform_device_register_full(&smc91x_devinfo);
+
+        platform_set_drvdata(dev, d);
 
-        return platform_add_devices(devices, ARRAY_SIZE(devices));
+        return 0;
+
+ err_irq_alloc:
+ err_id:
+        iounmap(d->base);
+ err_ioremap:
+        kfree(d);
+ err_alloc:
+        return ret;
 }
 
-subsys_initcall(neponset_init);
+static int __devexit neponset_remove(struct platform_device *dev)
+{
+        struct neponset_drvdata *d = platform_get_drvdata(dev);
+        int irq = platform_get_irq(dev, 0);
+
+        if (!IS_ERR(d->sa1111))
+                platform_device_unregister(d->sa1111);
+        if (!IS_ERR(d->smc91x))
+                platform_device_unregister(d->smc91x);
+        irq_set_chained_handler(irq, NULL);
+        irq_free_descs(d->irq_base, NEP_IRQ_NR);
+        nep_base = NULL;
+        iounmap(d->base);
+        kfree(d);
 
-static struct map_desc neponset_io_desc[] __initdata = {
-        {       /* System Registers */
-                .virtual        =  0xf3000000,
-                .pfn            = __phys_to_pfn(0x10000000),
-                .length         = SZ_1M,
-                .type           = MT_DEVICE
-        }, {    /* SA-1111 */
-                .virtual        =  0xf4000000,
-                .pfn            = __phys_to_pfn(0x40000000),
-                .length         = SZ_1M,
-                .type           = MT_DEVICE
-        }
+        return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int neponset_suspend(struct device *dev)
+{
+        struct neponset_drvdata *d = dev_get_drvdata(dev);
+
+        d->ncr0 = readb_relaxed(d->base + NCR_0);
+        d->mdm_ctl_0 = readb_relaxed(d->base + MDM_CTL_0);
+
+        return 0;
+}
+
+static int neponset_resume(struct device *dev)
+{
+        struct neponset_drvdata *d = dev_get_drvdata(dev);
+
+        writeb_relaxed(d->ncr0, d->base + NCR_0);
+        writeb_relaxed(d->mdm_ctl_0, d->base + MDM_CTL_0);
+
+        return 0;
+}
+
+static const struct dev_pm_ops neponset_pm_ops = {
+        .suspend_noirq = neponset_suspend,
+        .resume_noirq = neponset_resume,
+        .freeze_noirq = neponset_suspend,
+        .restore_noirq = neponset_resume,
+};
+#define PM_OPS &neponset_pm_ops
+#else
+#define PM_OPS NULL
+#endif
+
+static struct platform_driver neponset_device_driver = {
+        .probe          = neponset_probe,
+        .remove         = __devexit_p(neponset_remove),
+        .driver         = {
+                .name   = "neponset",
+                .owner  = THIS_MODULE,
+                .pm     = PM_OPS,
+        },
 };
 
-void __init neponset_map_io(void)
+static int __init neponset_init(void)
 {
-        iotable_init(neponset_io_desc, ARRAY_SIZE(neponset_io_desc));
+        return platform_driver_register(&neponset_device_driver);
 }
+
+subsys_initcall(neponset_init);
diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c
index b466bca9c651..b49108b890a8 100644
--- a/arch/arm/mach-sa1100/pci-nanoengine.c
+++ b/arch/arm/mach-sa1100/pci-nanoengine.c
@@ -135,12 +135,8 @@ struct pci_bus * __init pci_nanoengine_scan_bus(int nr, struct pci_sys_data *sys
                                  &sys->resources);
 }
 
-static struct resource pci_io_ports = {
-        .name   = "PCI IO",
-        .start  = 0x400,
-        .end    = 0x7FF,
-        .flags  = IORESOURCE_IO,
-};
+static struct resource pci_io_ports =
+        DEFINE_RES_IO_NAMED(0x400, 0x400, "PCI IO");
 
 static struct resource pci_non_prefetchable_memory = {
         .name   = "PCI non-prefetchable",
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
index 9307df053533..1602575a0d5c 100644
--- a/arch/arm/mach-sa1100/pleb.c
+++ b/arch/arm/mach-sa1100/pleb.c
@@ -37,17 +37,9 @@
 #define IRQ_GPIO_ETH0_IRQ       IRQ_GPIO21
 
 static struct resource smc91x_resources[] = {
-        [0] = {
-                .start  = PLEB_ETH0_P,
-                .end    = PLEB_ETH0_P | 0x03ffffff,
-                .flags  = IORESOURCE_MEM,
-        },
+        [0] = DEFINE_RES_MEM(PLEB_ETH0_P, 0x04000000),
 #if 0 /* Autoprobe instead, to get rising/falling edge characteristic right */
-        [1] = {
-                .start  = IRQ_GPIO_ETH0_IRQ,
-                .end    = IRQ_GPIO_ETH0_IRQ,
-                .flags  = IORESOURCE_IRQ,
-        },
+        [1] = DEFINE_RES_IRQ(IRQ_GPIO_ETH0_IRQ),
 #endif
 };
 
@@ -70,16 +62,8 @@ static struct platform_device *devices[] __initdata = {
  * the two SA1100 lowest chip select outputs.
  */
 static struct resource pleb_flash_resources[] = {
-        [0] = {
-                .start = SA1100_CS0_PHYS,
-                .end   = SA1100_CS0_PHYS + SZ_8M - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = SA1100_CS1_PHYS,
-                .end   = SA1100_CS1_PHYS + SZ_8M - 1,
-                .flags = IORESOURCE_MEM,
-        }
+        [0] = DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_8M),
+        [1] = DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_8M),
 };
 
 
@@ -147,6 +131,7 @@ static void __init pleb_map_io(void)
 
 MACHINE_START(PLEB, "PLEB")
         .map_io         = pleb_map_io,
+        .nr_irqs        = SA1100_NR_IRQS,
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = pleb_init,
diff --git a/arch/arm/mach-sa1100/pm.c b/arch/arm/mach-sa1100/pm.c
index bf85b8b259d5..2fa499ec6afe 100644
--- a/arch/arm/mach-sa1100/pm.c
+++ b/arch/arm/mach-sa1100/pm.c
@@ -30,7 +30,6 @@
 #include <mach/hardware.h>
 #include <asm/memory.h>
 #include <asm/suspend.h>
-#include <asm/system.h>
 #include <asm/mach/time.h>
 
 extern int sa1100_finish_suspend(unsigned long);
diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c
index 318b2b766a0b..ca8bf59b9047 100644
--- a/arch/arm/mach-sa1100/shannon.c
+++ b/arch/arm/mach-sa1100/shannon.c
@@ -9,6 +9,8 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 
+#include <video/sa1100fb.h>
+
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/setup.h>
@@ -19,6 +21,7 @@
 #include <asm/mach/serial_sa1100.h>
 #include <mach/mcp.h>
 #include <mach/shannon.h>
+#include <mach/irqs.h>
 
 #include "generic.h"
 
@@ -46,19 +49,32 @@ static struct flash_platform_data shannon_flash_data = {
         .nr_parts       = ARRAY_SIZE(shannon_partitions),
 };
 
-static struct resource shannon_flash_resource = {
-        .start          = SA1100_CS0_PHYS,
-        .end            = SA1100_CS0_PHYS + SZ_4M - 1,
-        .flags          = IORESOURCE_MEM,
-};
+static struct resource shannon_flash_resource =
+        DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_4M);
 
 static struct mcp_plat_data shannon_mcp_data = {
         .mccr0          = MCCR0_ADM,
         .sclk_rate      = 11981000,
 };
 
+static struct sa1100fb_mach_info shannon_lcd_info = {
+        .pixclock       = 152500,       .bpp            = 8,
+        .xres           = 640,          .yres           = 480,
+
+        .hsync_len      = 4,            .vsync_len      = 3,
+        .left_margin    = 2,            .upper_margin   = 0,
+        .right_margin   = 1,            .lower_margin   = 0,
+
+        .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+
+        .lccr0          = LCCR0_Color | LCCR0_Dual | LCCR0_Pas,
+        .lccr3          = LCCR3_ACBsDiv(512),
+};
+
 static void __init shannon_init(void)
 {
+        sa11x0_ppc_configure_mcp();
+        sa11x0_register_lcd(&shannon_lcd_info);
         sa11x0_register_mtd(&shannon_flash_data, &shannon_flash_resource, 1);
         sa11x0_register_mcp(&shannon_mcp_data);
 }
@@ -84,6 +100,7 @@ static void __init shannon_map_io(void)
 MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)")
         .atag_offset    = 0x100,
         .map_io         = shannon_map_io,
+        .nr_irqs        = SA1100_NR_IRQS,
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = shannon_init,
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
index e17c04d6e324..3efae03cb3d7 100644
--- a/arch/arm/mach-sa1100/simpad.c
+++ b/arch/arm/mach-sa1100/simpad.c
@@ -7,15 +7,15 @@
 #include <linux/kernel.h>
 #include <linux/tty.h>
 #include <linux/proc_fs.h>
-#include <linux/string.h> 
+#include <linux/string.h>
 #include <linux/pm.h>
 #include <linux/platform_device.h>
+#include <linux/mfd/ucb1x00.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/io.h>
 #include <linux/gpio.h>
 
-#include <asm/irq.h>
 #include <mach/hardware.h>
 #include <asm/setup.h>
 
@@ -26,6 +26,7 @@
 #include <asm/mach/serial_sa1100.h>
 #include <mach/mcp.h>
 #include <mach/simpad.h>
+#include <mach/irqs.h>
 
 #include <linux/serial_core.h>
 #include <linux/ioport.h>
@@ -176,21 +177,18 @@ static struct flash_platform_data simpad_flash_data = {
 
 
 static struct resource simpad_flash_resources [] = {
-        {
-                .start     = SA1100_CS0_PHYS,
-                .end       = SA1100_CS0_PHYS + SZ_16M -1,
-                .flags     = IORESOURCE_MEM,
-        }, {
-                .start     = SA1100_CS1_PHYS,
-                .end       = SA1100_CS1_PHYS + SZ_16M -1,
-                .flags     = IORESOURCE_MEM,
-        }
+        DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_16M),
+        DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_16M),
+};
+
+static struct ucb1x00_plat_data simpad_ucb1x00_data = {
+        .gpio_base      = SIMPAD_UCB1X00_GPIO_BASE,
 };
 
 static struct mcp_plat_data simpad_mcp_data = {
         .mccr0          = MCCR0_ADM,
         .sclk_rate      = 11981000,
-        .gpio_base      = SIMPAD_UCB1X00_GPIO_BASE,
+        .codec_pdata    = &simpad_ucb1x00_data,
 };
 
 
@@ -376,6 +374,7 @@ static int __init simpad_init(void)
 
         pm_power_off = simpad_power_off;
 
+        sa11x0_ppc_configure_mcp();
         sa11x0_register_mtd(&simpad_flash_data, simpad_flash_resources,
                               ARRAY_SIZE(simpad_flash_resources));
         sa11x0_register_mcp(&simpad_mcp_data);
@@ -394,6 +393,7 @@ MACHINE_START(SIMPAD, "Simpad")
         /* Maintainer: Holger Freyther */
         .atag_offset    = 0x100,
         .map_io         = simpad_map_io,
+        .nr_irqs        = SA1100_NR_IRQS,
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .restart        = sa11x0_restart,
diff --git a/arch/arm/mach-sa1100/sleep.S b/arch/arm/mach-sa1100/sleep.S
index e8223315b442..30cc6721665b 100644
--- a/arch/arm/mach-sa1100/sleep.S
+++ b/arch/arm/mach-sa1100/sleep.S
@@ -26,27 +26,36 @@
  *
  * Causes sa11x0 to enter sleep state
  *
+ * Must be aligned to a cacheline.
  */
-
+        .balign 32
 ENTRY(sa1100_finish_suspend)
         @ disable clock switching
         mcr     p15, 0, r1, c15, c2, 2
 
-        @ Adjust memory timing before lowering CPU clock
-        @ Clock speed adjustment without changing memory timing makes
-        @ CPU hang in some cases
-        ldr     r0, =MDREFR
-        ldr     r1, [r0]
-        orr     r1, r1, #MDREFR_K1DB2
-        str     r1, [r0]
+        ldr     r6, =MDREFR
+        ldr     r4, [r6]
+        orr     r4, r4, #MDREFR_K1DB2
+        ldr     r5, =PPCR
+
+        @ Pre-load __udelay into the I-cache
+        mov     r0, #1
+        bl      __udelay
+        mov     r0, r0
+
+        @ The following must all exist in a single cache line to
+        @ avoid accessing memory until this sequence is complete,
+        @ otherwise we occasionally hang.
+
+        @ Adjust memory timing before lowering CPU clock
+        str     r4, [r6]
 
         @ delay 90us and set CPU PLL to lowest speed
         @ fixes resume problem on high speed SA1110
         mov     r0, #90
         bl      __udelay
-        ldr     r0, =PPCR
         mov     r1, #0
-        str     r1, [r0]
+        str     r1, [r5]
         mov     r0, #90
         bl      __udelay
 
@@ -85,12 +94,10 @@ ENTRY(sa1100_finish_suspend)
         bic     r5, r5, #FMsk(MSC_RT)
         bic     r5, r5, #FMsk(MSC_RT)<<16
 
-        ldr     r6, =MDREFR
-
         ldr     r7, [r6]
-bic     r7, r7, #0x0000FF00
-bic     r7, r7, #0x000000F0
-orr     r8, r7, #MDREFR_SLFRSH
+        bic     r7, r7, #0x0000FF00
+        bic     r7, r7, #0x000000F0
+        orr     r8, r7, #MDREFR_SLFRSH
 
         ldr     r9, =MDCNFG
         ldr     r10, [r9]
diff --git a/arch/arm/mach-sa1100/ssp.c b/arch/arm/mach-sa1100/ssp.c
index b20ff93b84a5..e22fca9ad5ec 100644
--- a/arch/arm/mach-sa1100/ssp.c
+++ b/arch/arm/mach-sa1100/ssp.c
@@ -19,8 +19,8 @@
 #include <linux/init.h>
 #include <linux/io.h>
 
-#include <asm/irq.h>
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 #include <asm/hardware/ssp.h>
 
 #define TIMEOUT 100000
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 69e33535dee6..6af26e8d55e6 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -18,6 +18,7 @@
 #include <asm/mach/time.h>
 #include <asm/sched_clock.h>
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 
 static u32 notrace sa1100_read_sched_clock(void)
 {
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index 6a2a7f2c2557..2704bcd869cd 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -15,6 +15,7 @@
 #include <asm/mach-types.h>
 #include <asm/leds.h>
 #include <asm/param.h>
+#include <asm/system_misc.h>
 
 #include <asm/mach/map.h>
 #include <asm/mach/arch.h>
diff --git a/arch/arm/mach-shark/include/mach/io.h b/arch/arm/mach-shark/include/mach/io.h
index 9ccbcecc430b..1a45fc01ff1d 100644
--- a/arch/arm/mach-shark/include/mach/io.h
+++ b/arch/arm/mach-shark/include/mach/io.h
@@ -15,6 +15,4 @@
 
 #define __io(a)                 ((void __iomem *)(0xe0000000 + (a)))
 
-#define __mem_pci(addr) (addr)
-
 #endif
diff --git a/arch/arm/mach-shark/leds.c b/arch/arm/mach-shark/leds.c
index ccd49189bbd0..25609076921f 100644
--- a/arch/arm/mach-shark/leds.c
+++ b/arch/arm/mach-shark/leds.c
@@ -23,7 +23,6 @@
 #include <linux/io.h>
 
 #include <asm/leds.h>
-#include <asm/system.h>
 
 #define LED_STATE_ENABLED       1
 #define LED_STATE_CLAIMED       2
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 060e5644c49c..34560cab45d9 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -100,6 +100,10 @@ config MACH_MARZEN
 
 comment "SH-Mobile System Configuration"
 
+config CPU_HAS_INTEVT
+        bool
+        default y
+
 menu "Memory configuration"
 
 config MEMORY_START
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index f50d7c8b1221..cb224a344af0 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -43,6 +43,7 @@
 #include <video/sh_mipi_dsi.h>
 #include <sound/sh_fsi.h>
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 #include <mach/sh73a0.h>
 #include <mach/common.h>
 #include <asm/mach-types.h>
@@ -584,7 +585,7 @@ static void __init ag5evm_init(void)
 
 #ifdef CONFIG_CACHE_L2X0
         /* Shared attribute override enable, 64K*8way */
-        l2x0_init(__io(0xf0100000), 0x00460000, 0xc2000fff);
+        l2x0_init(IOMEM(0xf0100000), 0x00460000, 0xc2000fff);
 #endif
         sh73a0_add_standard_devices();
         platform_add_devices(ag5evm_devices, ARRAY_SIZE(ag5evm_devices));
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 262f8def5577..b56dde2732bb 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -1186,6 +1186,7 @@ static struct i2c_board_info i2c1_devices[] = {
         },
 };
 
+
 #define GPIO_PORT9CR    0xE6051009
 #define GPIO_PORT10CR   0xE605100A
 #define USCCR1          0xE6058144
diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
index 8b2124da245d..81fd95f7f52a 100644
--- a/arch/arm/mach-shmobile/board-bonito.c
+++ b/arch/arm/mach-shmobile/board-bonito.c
@@ -35,6 +35,7 @@
 #include <asm/mach/time.h>
 #include <asm/hardware/cache-l2x0.h>
 #include <mach/r8a7740.h>
+#include <mach/irqs.h>
 #include <video/sh_mobile_lcdc.h>
 
 /*
@@ -370,7 +371,7 @@ static void __init bonito_init(void)
 
 #ifdef CONFIG_CACHE_L2X0
         /* Early BRESP enable, Shared attribute override enable, 32K*8way */
-        l2x0_init(__io(0xf0002000), 0x40440000, 0x82000fff);
+        l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff);
 #endif
 
         r8a7740_add_standard_devices();
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c
index b627e89037f5..39b6cf85ced6 100644
--- a/arch/arm/mach-shmobile/board-g3evm.c
+++ b/arch/arm/mach-shmobile/board-g3evm.c
@@ -33,6 +33,7 @@
 #include <linux/input.h>
 #include <linux/input/sh_keysc.h>
 #include <linux/dma-mapping.h>
+#include <mach/irqs.h>
 #include <mach/sh7367.h>
 #include <mach/common.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c
index 46d757d2759d..0e5a39c670bc 100644
--- a/arch/arm/mach-shmobile/board-g4evm.c
+++ b/arch/arm/mach-shmobile/board-g4evm.c
@@ -34,6 +34,7 @@
 #include <linux/mmc/sh_mobile_sdhi.h>
 #include <linux/gpio.h>
 #include <linux/dma-mapping.h>
+#include <mach/irqs.h>
 #include <mach/sh7377.h>
 #include <mach/common.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index 61c067294660..200dcd42a3a0 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -39,6 +39,7 @@
 #include <linux/mfd/tmio.h>
 #include <linux/mmc/sh_mobile_sdhi.h>
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 #include <mach/sh73a0.h>
 #include <mach/common.h>
 #include <asm/mach-types.h>
@@ -507,7 +508,7 @@ static void __init kota2_init(void)
 
 #ifdef CONFIG_CACHE_L2X0
         /* Early BRESP enable, Shared attribute override enable, 64K*8way */
-        l2x0_init(__io(0xf0100000), 0x40460000, 0x82000fff);
+        l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff);
 #endif
         sh73a0_add_standard_devices();
         platform_add_devices(kota2_devices, ARRAY_SIZE(kota2_devices));
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index bd4253ba05b6..f49e28abe0ab 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -39,6 +39,7 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
+#include <linux/mtd/sh_flctl.h>
 #include <linux/pm_clock.h>
 #include <linux/smsc911x.h>
 #include <linux/sh_intc.h>
@@ -54,6 +55,7 @@
 #include <sound/sh_fsi.h>
 
 #include <mach/common.h>
+#include <mach/irqs.h>
 #include <mach/sh7372.h>
 
 #include <asm/mach/arch.h>
@@ -955,6 +957,50 @@ static struct platform_device fsi_ak4643_device = {
         },
 };
 
+/* FLCTL */
+static struct mtd_partition nand_partition_info[] = {
+        {
+                .name   = "system",
+                .offset = 0,
+                .size   = 128 * 1024 * 1024,
+        },
+        {
+                .name   = "userdata",
+                .offset = MTDPART_OFS_APPEND,
+                .size   = 256 * 1024 * 1024,
+        },
+        {
+                .name   = "cache",
+                .offset = MTDPART_OFS_APPEND,
+                .size   = 128 * 1024 * 1024,
+        },
+};
+
+static struct resource nand_flash_resources[] = {
+        [0] = {
+                .start  = 0xe6a30000,
+                .end    = 0xe6a3009b,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct sh_flctl_platform_data nand_flash_data = {
+        .parts          = nand_partition_info,
+        .nr_parts       = ARRAY_SIZE(nand_partition_info),
+        .flcmncr_val    = CLK_16B_12L_4H | TYPESEL_SET
+                        | SHBUSSEL | SEL_16BIT | SNAND_E,
+        .use_holden     = 1,
+};
+
+static struct platform_device nand_flash_device = {
+        .name           = "sh_flctl",
+        .resource       = nand_flash_resources,
+        .num_resources  = ARRAY_SIZE(nand_flash_resources),
+        .dev            = {
+                .platform_data = &nand_flash_data,
+        },
+};
+
 /*
  * The card detect pin of the top SD/MMC slot (CN7) is active low and is
  * connected to GPIO A22 of SH7372 (GPIO_PORT41).
@@ -1258,6 +1304,7 @@ static struct platform_device *mackerel_devices[] __initdata = {
         &fsi_device,
         &fsi_ak4643_device,
         &fsi_hdmi_device,
+        &nand_flash_device,
         &sdhi0_device,
 #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
         &sdhi1_device,
@@ -1327,15 +1374,6 @@ static struct i2c_board_info i2c1_devices[] = {
         },
 };
 
-static void __init mackerel_map_io(void)
-{
-        sh7372_map_io();
-        /* DMA memory at 0xff200000 - 0xffdfffff. The default 2MB size isn't
-         * enough to allocate the frame buffer memory.
-         */
-        init_consistent_dma_size(12 << 20);
-}
-
 #define GPIO_PORT9CR    0xE6051009
 #define GPIO_PORT10CR   0xE605100A
 #define GPIO_PORT167CR  0xE60520A7
@@ -1496,6 +1534,30 @@ static void __init mackerel_init(void)
         gpio_request(GPIO_FN_MMCCMD0, NULL);
         gpio_request(GPIO_FN_MMCCLK0, NULL);
 
+        /* FLCTL */
+        gpio_request(GPIO_FN_D0_NAF0, NULL);
+        gpio_request(GPIO_FN_D1_NAF1, NULL);
+        gpio_request(GPIO_FN_D2_NAF2, NULL);
+        gpio_request(GPIO_FN_D3_NAF3, NULL);
+        gpio_request(GPIO_FN_D4_NAF4, NULL);
+        gpio_request(GPIO_FN_D5_NAF5, NULL);
+        gpio_request(GPIO_FN_D6_NAF6, NULL);
+        gpio_request(GPIO_FN_D7_NAF7, NULL);
+        gpio_request(GPIO_FN_D8_NAF8, NULL);
+        gpio_request(GPIO_FN_D9_NAF9, NULL);
+        gpio_request(GPIO_FN_D10_NAF10, NULL);
+        gpio_request(GPIO_FN_D11_NAF11, NULL);
+        gpio_request(GPIO_FN_D12_NAF12, NULL);
+        gpio_request(GPIO_FN_D13_NAF13, NULL);
+        gpio_request(GPIO_FN_D14_NAF14, NULL);
+        gpio_request(GPIO_FN_D15_NAF15, NULL);
+        gpio_request(GPIO_FN_FCE0, NULL);
+        gpio_request(GPIO_FN_WE0_FWE, NULL);
+        gpio_request(GPIO_FN_FRB, NULL);
+        gpio_request(GPIO_FN_A4_FOE, NULL);
+        gpio_request(GPIO_FN_A5_FCDE, NULL);
+        gpio_request(GPIO_FN_RD_FSC, NULL);
+
         /* enable GPS module (GT-720F) */
         gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
         gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
@@ -1540,6 +1602,7 @@ static void __init mackerel_init(void)
         sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device);
         sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs0_device);
         sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs1_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &nand_flash_device);
         sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device);
         sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device);
 #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
@@ -1555,7 +1618,7 @@ static void __init mackerel_init(void)
 }
 
 MACHINE_START(MACKEREL, "mackerel")
-        .map_io         = mackerel_map_io,
+        .map_io         = sh7372_map_io,
         .init_early     = sh7372_add_early_devices,
         .init_irq       = sh7372_init_irq,
         .handle_irq     = shmobile_handle_irq_intc,
diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
index cbd5e4cd06d2..ef0e13bf0b3a 100644
--- a/arch/arm/mach-shmobile/board-marzen.c
+++ b/arch/arm/mach-shmobile/board-marzen.c
@@ -31,6 +31,7 @@
 #include <mach/hardware.h>
 #include <mach/r8a7779.h>
 #include <mach/common.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index de243e3c8392..94d1f88246d3 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -511,7 +511,7 @@ enum { MSTP001, MSTP000,
        MSTP223,
        MSTP218, MSTP217, MSTP216, MSTP214, MSTP208, MSTP207,
        MSTP206, MSTP205, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
-       MSTP328, MSTP323, MSTP322, MSTP314, MSTP313, MSTP312,
+        MSTP328, MSTP323, MSTP322, MSTP315, MSTP314, MSTP313, MSTP312,
        MSTP423, MSTP415, MSTP413, MSTP411, MSTP410, MSTP407, MSTP406,
        MSTP405, MSTP404, MSTP403, MSTP400,
        MSTP_NR };
@@ -553,6 +553,7 @@ static struct clk mstp_clks[MSTP_NR] = {
         [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, 0), /* FSI2 */
         [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */
         [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */
+        [MSTP315] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 15, 0), /* FLCTL*/
         [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */
         [MSTP313] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 13, 0), /* SDHI1 */
         [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMC */
@@ -653,6 +654,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USB0 */
         CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP322]), /* USB0 */
         CLKDEV_DEV_ID("renesas_usbhs.0", &mstp_clks[MSTP322]), /* USB0 */
+        CLKDEV_DEV_ID("sh_flctl.0", &mstp_clks[MSTP315]), /* FLCTL */
         CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
         CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */
diff --git a/arch/arm/mach-shmobile/cpuidle.c b/arch/arm/mach-shmobile/cpuidle.c
index 1b2334277e85..7e6559105d40 100644
--- a/arch/arm/mach-shmobile/cpuidle.c
+++ b/arch/arm/mach-shmobile/cpuidle.c
@@ -13,7 +13,7 @@
 #include <linux/suspend.h>
 #include <linux/module.h>
 #include <linux/err.h>
-#include <asm/system.h>
+#include <asm/cpuidle.h>
 #include <asm/io.h>
 
 static void shmobile_enter_wfi(void)
@@ -29,37 +29,19 @@ static int shmobile_cpuidle_enter(struct cpuidle_device *dev,
                                   struct cpuidle_driver *drv,
                                   int index)
 {
-        ktime_t before, after;
-
-        before = ktime_get();
-
-        local_irq_disable();
-        local_fiq_disable();
-
         shmobile_cpuidle_modes[index]();
 
-        local_irq_enable();
-        local_fiq_enable();
-
-        after = ktime_get();
-        dev->last_residency = ktime_to_ns(ktime_sub(after, before)) >> 10;
-
         return index;
 }
 
 static struct cpuidle_device shmobile_cpuidle_dev;
 static struct cpuidle_driver shmobile_cpuidle_driver = {
-        .name =         "shmobile_cpuidle",
-        .owner =        THIS_MODULE,
-        .states[0] = {
-                .name = "C1",
-                .desc = "WFI",
-                .exit_latency = 1,
-                .target_residency = 1 * 2,
-                .flags = CPUIDLE_FLAG_TIME_VALID,
-        },
-        .safe_state_index = 0, /* C1 */
-        .state_count = 1,
+        .name                   = "shmobile_cpuidle",
+        .owner                  = THIS_MODULE,
+        .en_core_tk_irqen       = 1,
+        .states[0]              = ARM_CPUIDLE_WFI_STATE,
+        .safe_state_index       = 0, /* C1 */
+        .state_count            = 1,
 };
 
 void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv);
diff --git a/arch/arm/mach-shmobile/include/mach/io.h b/arch/arm/mach-shmobile/include/mach/io.h
deleted file mode 100644
index 7339fe46cb7c..000000000000
--- a/arch/arm/mach-shmobile/include/mach/io.h
+++ /dev/null
@@ -1,9 +0,0 @@
-#ifndef __ASM_MACH_IO_H
-#define __ASM_MACH_IO_H
-
-#define IO_SPACE_LIMIT          0xffffffff
-
-#define __io(a)                 ((void __iomem *)(a))
-#define __mem_pci(a)            (a)
-
-#endif /* __ASM_MACH_IO_H */
diff --git a/arch/arm/mach-shmobile/include/mach/irqs.h b/arch/arm/mach-shmobile/include/mach/irqs.h
index dcb714f4d75a..4e686cc201fc 100644
--- a/arch/arm/mach-shmobile/include/mach/irqs.h
+++ b/arch/arm/mach-shmobile/include/mach/irqs.h
@@ -1,15 +1,11 @@
 #ifndef __ASM_MACH_IRQS_H
 #define __ASM_MACH_IRQS_H
 
-#define NR_IRQS         1024
+#include <linux/sh_intc.h>
 
 /* GIC */
 #define gic_spi(nr)             ((nr) + 32)
 
-/* INTCA */
-#define evt2irq(evt)            (((evt) >> 5) - 16)
-#define irq2evt(irq)            (((irq) + 16) << 5)
-
 /* INTCS */
 #define INTCS_VECT_BASE         0x2200
 #define INTCS_VECT(n, vect)     INTC_VECT((n), INTCS_VECT_BASE + (vect))
diff --git a/arch/arm/mach-shmobile/include/mach/system.h b/arch/arm/mach-shmobile/include/mach/system.h
index 3bbcb3fa0775..540eaff08f34 100644
--- a/arch/arm/mach-shmobile/include/mach/system.h
+++ b/arch/arm/mach-shmobile/include/mach/system.h
@@ -1,6 +1,8 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
+#include <asm/system_misc.h>
+
 static inline void arch_reset(char mode, const char *cmd)
 {
         soft_restart(0);
diff --git a/arch/arm/mach-shmobile/intc-r8a7740.c b/arch/arm/mach-shmobile/intc-r8a7740.c
index 272c84c20c83..09c42afcb22d 100644
--- a/arch/arm/mach-shmobile/intc-r8a7740.c
+++ b/arch/arm/mach-shmobile/intc-r8a7740.c
@@ -25,6 +25,7 @@
 #include <linux/io.h>
 #include <linux/sh_intc.h>
 #include <mach/intc.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c
index 5d92fcde2bc3..550b23df4fd4 100644
--- a/arch/arm/mach-shmobile/intc-r8a7779.c
+++ b/arch/arm/mach-shmobile/intc-r8a7779.c
@@ -42,8 +42,8 @@ static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
 
 void __init r8a7779_init_irq(void)
 {
-        void __iomem *gic_dist_base = __io(0xf0001000);
-        void __iomem *gic_cpu_base = __io(0xf0000100);
+        void __iomem *gic_dist_base = IOMEM(0xf0001000);
+        void __iomem *gic_cpu_base = IOMEM(0xf0000100);
 
         /* use GIC to handle interrupts */
         gic_init(0, 29, gic_dist_base, gic_cpu_base);
diff --git a/arch/arm/mach-shmobile/intc-sh7367.c b/arch/arm/mach-shmobile/intc-sh7367.c
index cfde9bfc3669..5bf776495b75 100644
--- a/arch/arm/mach-shmobile/intc-sh7367.c
+++ b/arch/arm/mach-shmobile/intc-sh7367.c
@@ -23,6 +23,7 @@
 #include <linux/io.h>
 #include <linux/sh_intc.h>
 #include <mach/intc.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index 89afcaba99a1..6447e0af52d4 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -23,6 +23,7 @@
 #include <linux/io.h>
 #include <linux/sh_intc.h>
 #include <mach/intc.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
diff --git a/arch/arm/mach-shmobile/intc-sh7377.c b/arch/arm/mach-shmobile/intc-sh7377.c
index 2af4e6e9bc5b..b84a460a3405 100644
--- a/arch/arm/mach-shmobile/intc-sh7377.c
+++ b/arch/arm/mach-shmobile/intc-sh7377.c
@@ -23,6 +23,7 @@
 #include <linux/io.h>
 #include <linux/sh_intc.h>
 #include <mach/intc.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index 9857595eaa79..ee447404c857 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -24,6 +24,7 @@
 #include <linux/io.h>
 #include <linux/sh_intc.h>
 #include <mach/intc.h>
+#include <mach/irqs.h>
 #include <mach/sh73a0.h>
 #include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
@@ -420,8 +421,8 @@ static irqreturn_t sh73a0_pint1_demux(int irq, void *dev_id)
 
 void __init sh73a0_init_irq(void)
 {
-        void __iomem *gic_dist_base = __io(0xf0001000);
-        void __iomem *gic_cpu_base = __io(0xf0000100);
+        void __iomem *gic_dist_base = IOMEM(0xf0001000);
+        void __iomem *gic_cpu_base = IOMEM(0xf0000100);
         void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
         int k, n;
 
diff --git a/arch/arm/mach-shmobile/pm-r8a7779.c b/arch/arm/mach-shmobile/pm-r8a7779.c
index c38ba7b43ef8..a18a4ae16d2b 100644
--- a/arch/arm/mach-shmobile/pm-r8a7779.c
+++ b/arch/arm/mach-shmobile/pm-r8a7779.c
@@ -18,7 +18,6 @@
 #include <linux/irq.h>
 #include <linux/interrupt.h>
 #include <linux/console.h>
-#include <asm/system.h>
 #include <asm/io.h>
 #include <mach/common.h>
 #include <mach/r8a7779.h>
diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c
index fcf8b1761aef..a3bdb12acde9 100644
--- a/arch/arm/mach-shmobile/pm-sh7372.c
+++ b/arch/arm/mach-shmobile/pm-sh7372.c
@@ -21,7 +21,6 @@
 #include <linux/irq.h>
 #include <linux/bitrev.h>
 #include <linux/console.h>
-#include <asm/system.h>
 #include <asm/io.h>
 #include <asm/tlbflush.h>
 #include <asm/suspend.h>
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 74e52341dd1b..14edb5cffa7f 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -26,6 +26,7 @@
 #include <linux/sh_timer.h>
 #include <mach/r8a7740.h>
 #include <mach/common.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>
 #include <asm/mach/arch.h>
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index 6820d785493d..12c6f529ab89 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -29,6 +29,7 @@
 #include <linux/sh_intc.h>
 #include <linux/sh_timer.h>
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 #include <mach/r8a7779.h>
 #include <mach/common.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-shmobile/setup-sh7367.c b/arch/arm/mach-shmobile/setup-sh7367.c
index a51e1a1e6996..2e3074ab75b3 100644
--- a/arch/arm/mach-shmobile/setup-sh7367.c
+++ b/arch/arm/mach-shmobile/setup-sh7367.c
@@ -30,6 +30,7 @@
 #include <linux/sh_timer.h>
 #include <mach/hardware.h>
 #include <mach/common.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 5375325d7ca7..2fe8f83ca124 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -31,7 +31,9 @@
 #include <linux/sh_intc.h>
 #include <linux/sh_timer.h>
 #include <linux/pm_domain.h>
+#include <linux/dma-mapping.h>
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 #include <mach/sh7372.h>
 #include <mach/common.h>
 #include <asm/mach/map.h>
@@ -54,6 +56,12 @@ static struct map_desc sh7372_io_desc[] __initdata = {
 void __init sh7372_map_io(void)
 {
         iotable_init(sh7372_io_desc, ARRAY_SIZE(sh7372_io_desc));
+
+        /*
+         * DMA memory at 0xff200000 - 0xffdfffff. The default 2MB size isn't
+         * enough to allocate the frame buffer memory.
+         */
+        init_consistent_dma_size(12 << 20);
 }
 
 /* SCIFA0 */
diff --git a/arch/arm/mach-shmobile/setup-sh7377.c b/arch/arm/mach-shmobile/setup-sh7377.c
index 9f146095098b..d576a6abbade 100644
--- a/arch/arm/mach-shmobile/setup-sh7377.c
+++ b/arch/arm/mach-shmobile/setup-sh7377.c
@@ -32,6 +32,7 @@
 #include <mach/hardware.h>
 #include <mach/common.h>
 #include <asm/mach/map.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index b6a0734a738e..5bebffc10455 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -31,6 +31,7 @@
 #include <linux/sh_intc.h>
 #include <linux/sh_timer.h>
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 #include <mach/sh73a0.h>
 #include <mach/common.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index 9bb7b8575a1f..b62e19d4c9af 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -30,7 +30,7 @@
 #include <asm/smp_twd.h>
 #include <asm/hardware/gic.h>
 
-#define AVECR 0xfe700040
+#define AVECR IOMEM(0xfe700040)
 
 static struct r8a7779_pm_ch r8a7779_ch_cpu1 = {
         .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
@@ -138,7 +138,7 @@ void __init r8a7779_smp_prepare_cpus(void)
         scu_enable(scu_base_addr());
 
         /* Map the reset vector (in headsmp.S) */
-        __raw_writel(__pa(shmobile_secondary_vector), __io(AVECR));
+        __raw_writel(__pa(shmobile_secondary_vector), AVECR);
 
         /* enable cache coherency on CPU0 */
         modify_scu_cpu_psr(0, 3 << (cpu * 8));
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index c0a9093ba3a8..14ad8b052f1a 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -28,11 +28,11 @@
 #include <asm/smp_twd.h>
 #include <asm/hardware/gic.h>
 
-#define WUPCR           0xe6151010
-#define SRESCR          0xe6151018
-#define PSTR            0xe6151040
-#define SBAR            0xe6180020
-#define APARMBAREA      0xe6f10020
+#define WUPCR           IOMEM(0xe6151010)
+#define SRESCR          IOMEM(0xe6151018)
+#define PSTR            IOMEM(0xe6151040)
+#define SBAR            IOMEM(0xe6180020)
+#define APARMBAREA      IOMEM(0xe6f10020)
 
 static void __iomem *scu_base_addr(void)
 {
@@ -78,10 +78,10 @@ int __cpuinit sh73a0_boot_secondary(unsigned int cpu)
         /* enable cache coherency */
         modify_scu_cpu_psr(0, 3 << (cpu * 8));
 
-        if (((__raw_readl(__io(PSTR)) >> (4 * cpu)) & 3) == 3)
-                __raw_writel(1 << cpu, __io(WUPCR));    /* wake up */
+        if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3)
+                __raw_writel(1 << cpu, WUPCR);  /* wake up */
         else
-                __raw_writel(1 << cpu, __io(SRESCR));   /* reset */
+                __raw_writel(1 << cpu, SRESCR); /* reset */
 
         return 0;
 }
@@ -93,8 +93,8 @@ void __init sh73a0_smp_prepare_cpus(void)
         scu_enable(scu_base_addr());
 
         /* Map the reset vector (in headsmp.S) */
-        __raw_writel(0, __io(APARMBAREA));      /* 4k */
-        __raw_writel(__pa(shmobile_secondary_vector), __io(SBAR));
+        __raw_writel(0, APARMBAREA);      /* 4k */
+        __raw_writel(__pa(shmobile_secondary_vector), SBAR);
 
         /* enable cache coherency on CPU0 */
         modify_scu_cpu_psr(0, 3 << (cpu * 8));
diff --git a/arch/arm/mach-shmobile/suspend.c b/arch/arm/mach-shmobile/suspend.c
index c1febe13f709..4d1b86a49923 100644
--- a/arch/arm/mach-shmobile/suspend.c
+++ b/arch/arm/mach-shmobile/suspend.c
@@ -12,8 +12,8 @@
 #include <linux/suspend.h>
 #include <linux/module.h>
 #include <linux/err.h>
-#include <asm/system.h>
 #include <asm/io.h>
+#include <asm/system_misc.h>
 
 static int shmobile_suspend_default_enter(suspend_state_t suspend_state)
 {
diff --git a/arch/arm/mach-spear3xx/clock.c b/arch/arm/mach-spear3xx/clock.c
index f67860cd649f..6c4841f55223 100644
--- a/arch/arm/mach-spear3xx/clock.c
+++ b/arch/arm/mach-spear3xx/clock.c
@@ -12,6 +12,7 @@
  */
 
 #include <linux/init.h>
+#include <linux/io.h>
 #include <linux/kernel.h>
 #include <asm/mach-types.h>
 #include <plat/clock.h>
diff --git a/arch/arm/mach-spear3xx/include/mach/io.h b/arch/arm/mach-spear3xx/include/mach/io.h
deleted file mode 100644
index 30cff8a1f6b5..000000000000
--- a/arch/arm/mach-spear3xx/include/mach/io.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-spear3xx/include/mach/io.h
- *
- * IO definitions for SPEAr3xx machine family
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __MACH_IO_H
-#define __MACH_IO_H
-
-#include <plat/io.h>
-
-#endif /* __MACH_IO_H */
diff --git a/arch/arm/mach-spear6xx/Kconfig b/arch/arm/mach-spear6xx/Kconfig
index ff4ae5ba00f1..fbe298bd1d92 100644
--- a/arch/arm/mach-spear6xx/Kconfig
+++ b/arch/arm/mach-spear6xx/Kconfig
@@ -5,11 +5,12 @@
 if ARCH_SPEAR6XX
 
 menu "SPEAr6xx Implementations"
-config BOARD_SPEAR600_EVB
-        bool "SPEAr600 Evaluation Board"
+config BOARD_SPEAR600_DT
+        bool "SPEAr600 generic board configured via device-tree"
         select MACH_SPEAR600
+        select USE_OF
         help
-          Supports ST SPEAr600 Evaluation Board
+          Supports ST SPEAr600 boards configured via the device-tree
 
 endmenu
 
diff --git a/arch/arm/mach-spear6xx/Makefile b/arch/arm/mach-spear6xx/Makefile
index cc1a4d82d459..76e5750552fc 100644
--- a/arch/arm/mach-spear6xx/Makefile
+++ b/arch/arm/mach-spear6xx/Makefile
@@ -4,9 +4,3 @@
 
 # common files
 obj-y   += clock.o spear6xx.o
-
-# spear600 specific files
-obj-$(CONFIG_MACH_SPEAR600) += spear600.o
-
-# spear600 boards files
-obj-$(CONFIG_BOARD_SPEAR600_EVB) += spear600_evb.o
diff --git a/arch/arm/mach-spear6xx/clock.c b/arch/arm/mach-spear6xx/clock.c
index ac70e0d88fef..a86499a8a15f 100644
--- a/arch/arm/mach-spear6xx/clock.c
+++ b/arch/arm/mach-spear6xx/clock.c
@@ -12,6 +12,7 @@
  */
 
 #include <linux/init.h>
+#include <linux/io.h>
 #include <linux/kernel.h>
 #include <plat/clock.h>
 #include <mach/misc_regs.h>
@@ -641,8 +642,8 @@ static struct clk_lookup spear_clk_lookups[] = {
         { .con_id = "gpt0_synth_clk",   .clk = &gpt0_synth_clk},
         { .con_id = "gpt2_synth_clk",   .clk = &gpt2_synth_clk},
         { .con_id = "gpt3_synth_clk",   .clk = &gpt3_synth_clk},
-        { .dev_id = "uart0",            .clk = &uart0_clk},
-        { .dev_id = "uart1",            .clk = &uart1_clk},
+        { .dev_id = "d0000000.serial",  .clk = &uart0_clk},
+        { .dev_id = "d0080000.serial",  .clk = &uart1_clk},
         { .dev_id = "firda",            .clk = &firda_clk},
         { .dev_id = "clcd",             .clk = &clcd_clk},
         { .dev_id = "gpt0",             .clk = &gpt0_clk},
@@ -655,20 +656,20 @@ static struct clk_lookup spear_clk_lookups[] = {
         { .con_id = "usbh.1_clk",       .clk = &usbh1_clk},
         /* clock derived from ahb clk */
         { .con_id = "apb_clk",          .clk = &apb_clk},
-        { .dev_id = "i2c_designware.0", .clk = &i2c_clk},
+        { .dev_id = "d0200000.i2c",     .clk = &i2c_clk},
         { .dev_id = "dma",              .clk = &dma_clk},
         { .dev_id = "jpeg",             .clk = &jpeg_clk},
         { .dev_id = "gmac",             .clk = &gmac_clk},
         { .dev_id = "smi",              .clk = &smi_clk},
-        { .con_id = "fsmc",             .clk = &fsmc_clk},
+        { .dev_id = "fsmc-nand",        .clk = &fsmc_clk},
         /* clock derived from apb clk */
         { .dev_id = "adc",              .clk = &adc_clk},
         { .dev_id = "ssp-pl022.0",      .clk = &ssp0_clk},
         { .dev_id = "ssp-pl022.1",      .clk = &ssp1_clk},
         { .dev_id = "ssp-pl022.2",      .clk = &ssp2_clk},
-        { .dev_id = "gpio0",            .clk = &gpio0_clk},
-        { .dev_id = "gpio1",            .clk = &gpio1_clk},
-        { .dev_id = "gpio2",            .clk = &gpio2_clk},
+        { .dev_id = "f0100000.gpio",    .clk = &gpio0_clk},
+        { .dev_id = "fc980000.gpio",    .clk = &gpio1_clk},
+        { .dev_id = "d8100000.gpio",    .clk = &gpio2_clk},
 };
 
 void __init spear6xx_clk_init(void)
diff --git a/arch/arm/mach-spear6xx/include/mach/io.h b/arch/arm/mach-spear6xx/include/mach/io.h
deleted file mode 100644
index fb7c106cea94..000000000000
--- a/arch/arm/mach-spear6xx/include/mach/io.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * arch/arm/mach-spear6xx/include/mach/io.h
- *
- * IO definitions for SPEAr6xx machine family
- *
- * Copyright (C) 2009 ST Microelectronics
- * Rajeev Kumar Kumar<rajeev-dlh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __MACH_IO_H
-#define __MACH_IO_H
-
-#include <plat/io.h>
-
-#endif  /* __MACH_IO_H */
-
diff --git a/arch/arm/mach-spear6xx/spear600.c b/arch/arm/mach-spear6xx/spear600.c
deleted file mode 100644
index d0e6eeae9b04..000000000000
--- a/arch/arm/mach-spear6xx/spear600.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * arch/arm/mach-spear6xx/spear600.c
- *
- * SPEAr600 machine source file
- *
- * Copyright (C) 2009 ST Microelectronics
- * Rajeev Kumar<rajeev-dlh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/ptrace.h>
-#include <asm/irq.h>
-#include <mach/generic.h>
-#include <mach/hardware.h>
-
-/* Add spear600 specific devices here */
-
-void __init spear600_init(void)
-{
-        /* call spear6xx family common init function */
-        spear6xx_init();
-}
diff --git a/arch/arm/mach-spear6xx/spear600_evb.c b/arch/arm/mach-spear6xx/spear600_evb.c
deleted file mode 100644
index c6e4254741cc..000000000000
--- a/arch/arm/mach-spear6xx/spear600_evb.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * arch/arm/mach-spear6xx/spear600_evb.c
- *
- * SPEAr600 evaluation board source file
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <asm/hardware/vic.h>
-#include <asm/mach/arch.h>
-#include <asm/mach-types.h>
-#include <mach/generic.h>
-#include <mach/hardware.h>
-
-static struct amba_device *amba_devs[] __initdata = {
-        &gpio_device[0],
-        &gpio_device[1],
-        &gpio_device[2],
-        &uart_device[0],
-        &uart_device[1],
-};
-
-static struct platform_device *plat_devs[] __initdata = {
-};
-
-static void __init spear600_evb_init(void)
-{
-        unsigned int i;
-
-        /* call spear600 machine init function */
-        spear600_init();
-
-        /* Add Platform Devices */
-        platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs));
-
-        /* Add Amba Devices */
-        for (i = 0; i < ARRAY_SIZE(amba_devs); i++)
-                amba_device_register(amba_devs[i], &iomem_resource);
-}
-
-MACHINE_START(SPEAR600, "ST-SPEAR600-EVB")
-        .atag_offset    =       0x100,
-        .map_io         =       spear6xx_map_io,
-        .init_irq       =       spear6xx_init_irq,
-        .handle_irq     =       vic_handle_irq,
-        .timer          =       &spear6xx_timer,
-        .init_machine   =       spear600_evb_init,
-        .restart        =       spear_restart,
-MACHINE_END
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
index b997b1b10ba0..2ed8b14c82c8 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -6,111 +6,21 @@
  * Copyright (C) 2009 ST Microelectronics
  * Rajeev Kumar<rajeev-dlh.kumar@st.com>
  *
+ * Copyright 2012 Stefan Roese <sr@denx.de>
+ *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
 
-#include <linux/types.h>
-#include <linux/amba/pl061.h>
-#include <linux/ptrace.h>
-#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
 #include <asm/hardware/vic.h>
-#include <asm/irq.h>
 #include <asm/mach/arch.h>
 #include <mach/generic.h>
 #include <mach/hardware.h>
-#include <mach/irqs.h>
-
-/* Add spear6xx machines common devices here */
-/* uart device registration */
-struct amba_device uart_device[] = {
-        {
-                .dev = {
-                        .init_name = "uart0",
-                },
-                .res = {
-                        .start = SPEAR6XX_ICM1_UART0_BASE,
-                        .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1,
-                        .flags = IORESOURCE_MEM,
-                },
-                .irq = {IRQ_UART_0},
-        }, {
-                .dev = {
-                        .init_name = "uart1",
-                },
-                .res = {
-                        .start = SPEAR6XX_ICM1_UART1_BASE,
-                        .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1,
-                        .flags = IORESOURCE_MEM,
-                },
-                .irq = {IRQ_UART_1},
-        }
-};
-
-/* gpio device registration */
-static struct pl061_platform_data gpio_plat_data[] = {
-        {
-                .gpio_base      = 0,
-                .irq_base       = SPEAR_GPIO0_INT_BASE,
-        }, {
-                .gpio_base      = 8,
-                .irq_base       = SPEAR_GPIO1_INT_BASE,
-        }, {
-                .gpio_base      = 16,
-                .irq_base       = SPEAR_GPIO2_INT_BASE,
-        },
-};
-
-struct amba_device gpio_device[] = {
-        {
-                .dev = {
-                        .init_name = "gpio0",
-                        .platform_data = &gpio_plat_data[0],
-                },
-                .res = {
-                        .start = SPEAR6XX_CPU_GPIO_BASE,
-                        .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1,
-                        .flags = IORESOURCE_MEM,
-                },
-                .irq = {IRQ_LOCAL_GPIO},
-        }, {
-                .dev = {
-                        .init_name = "gpio1",
-                        .platform_data = &gpio_plat_data[1],
-                },
-                .res = {
-                        .start = SPEAR6XX_ICM3_GPIO_BASE,
-                        .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1,
-                        .flags = IORESOURCE_MEM,
-                },
-                .irq = {IRQ_BASIC_GPIO},
-        }, {
-                .dev = {
-                        .init_name = "gpio2",
-                        .platform_data = &gpio_plat_data[2],
-                },
-                .res = {
-                        .start = SPEAR6XX_ICM2_GPIO_BASE,
-                        .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1,
-                        .flags = IORESOURCE_MEM,
-                },
-                .irq = {IRQ_APPL_GPIO},
-        }
-};
-
-/* This will add devices, and do machine specific tasks */
-void __init spear6xx_init(void)
-{
-        /* nothing to do for now */
-}
-
-/* This will initialize vic */
-void __init spear6xx_init_irq(void)
-{
-        vic_init((void __iomem *)VA_SPEAR6XX_CPU_VIC_PRI_BASE, 0, ~0, 0);
-        vic_init((void __iomem *)VA_SPEAR6XX_CPU_VIC_SEC_BASE, 32, ~0, 0);
-}
 
 /* Following will create static virtual/physical mappings */
 static struct map_desc spear6xx_io_desc[] __initdata = {
@@ -181,3 +91,33 @@ static void __init spear6xx_timer_init(void)
 struct sys_timer spear6xx_timer = {
         .init = spear6xx_timer_init,
 };
+
+static void __init spear600_dt_init(void)
+{
+        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+static const char *spear600_dt_board_compat[] = {
+        "st,spear600",
+        NULL
+};
+
+static const struct of_device_id vic_of_match[] __initconst = {
+        { .compatible = "arm,pl190-vic", .data = vic_of_init, },
+        { /* Sentinel */ }
+};
+
+static void __init spear6xx_dt_init_irq(void)
+{
+        of_irq_init(vic_of_match);
+}
+
+DT_MACHINE_START(SPEAR600_DT, "ST SPEAr600 (Flattened Device Tree)")
+        .map_io         =       spear6xx_map_io,
+        .init_irq       =       spear6xx_dt_init_irq,
+        .handle_irq     =       vic_handle_irq,
+        .timer          =       &spear6xx_timer,
+        .init_machine   =       spear600_dt_init,
+        .restart        =       spear_restart,
+        .dt_compat      =       spear600_dt_board_compat,
+MACHINE_END
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 1dd2726986cf..d87d968115ec 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -8,6 +8,7 @@ obj-y                                   += timer.o
 obj-y                                   += pinmux.o
 obj-y                                   += fuse.o
 obj-y                                   += pmc.o
+obj-y                                   += flowctrl.o
 obj-$(CONFIG_CPU_IDLE)                  += cpuidle.o
 obj-$(CONFIG_CPU_IDLE)                  += sleep.o
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += powergate.o
@@ -18,6 +19,7 @@ obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= pinmux-tegra30-tables.o
 obj-$(CONFIG_ARCH_TEGRA_3x_SOC)         += board-dt-tegra30.o
 obj-$(CONFIG_ARCH_TEGRA_3x_SOC)         += tegra30_clocks.o
 obj-$(CONFIG_SMP)                       += platsmp.o headsmp.o
+obj-$(CONFIG_SMP)                       += reset.o
 obj-$(CONFIG_HOTPLUG_CPU)               += hotplug.o
 obj-$(CONFIG_TEGRA_SYSTEM_DMA)          += dma.o apbio.o
 obj-$(CONFIG_CPU_FREQ)                  += cpu-tegra.o
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c
index e20b419d5983..0952494f481a 100644
--- a/arch/arm/mach-tegra/board-dt-tegra20.c
+++ b/arch/arm/mach-tegra/board-dt-tegra20.c
@@ -68,11 +68,11 @@ struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
         OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra-i2s.1", NULL),
         OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL),
         OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0",
-                       &tegra_ehci1_device.dev.platform_data),
+                       &tegra_ehci1_pdata),
         OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1",
-                       &tegra_ehci2_device.dev.platform_data),
+                       &tegra_ehci2_pdata),
         OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2",
-                       &tegra_ehci3_device.dev.platform_data),
+                       &tegra_ehci3_pdata),
         {}
 };
 
diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c
index 96f6c0d030bd..5f7c03e972f3 100644
--- a/arch/arm/mach-tegra/board-dt-tegra30.c
+++ b/arch/arm/mach-tegra/board-dt-tegra30.c
@@ -56,7 +56,7 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
 
 static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
         /* name         parent          rate            enabled */
-        { "uartd",      "pll_p",        408000000,      true },
+        { "uarta",      "pll_p",        408000000,      true },
         { NULL,         NULL,           0,              0},
 };
 
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 2f86fcca64a6..22df10fb9972 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -27,6 +27,7 @@
 #include <asm/hardware/gic.h>
 
 #include <mach/iomap.h>
+#include <mach/powergate.h>
 
 #include "board.h"
 #include "clock.h"
@@ -118,13 +119,16 @@ void __init tegra20_init_early(void)
         tegra_clk_init_from_table(tegra20_clk_init_table);
         tegra_init_cache(0x331, 0x441);
         tegra_pmc_init();
+        tegra_powergate_init();
 }
 #endif
 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
 void __init tegra30_init_early(void)
 {
+        tegra_init_fuse();
         tegra30_init_clocks();
         tegra_init_cache(0x441, 0x551);
         tegra_pmc_init();
+        tegra_powergate_init();
 }
 #endif
diff --git a/arch/arm/mach-tegra/cpu-tegra.c b/arch/arm/mach-tegra/cpu-tegra.c
index bb5ce39b733b..7a065f0cf633 100644
--- a/arch/arm/mach-tegra/cpu-tegra.c
+++ b/arch/arm/mach-tegra/cpu-tegra.c
@@ -30,7 +30,6 @@
 #include <linux/io.h>
 #include <linux/suspend.h>
 
-#include <asm/system.h>
 
 #include <mach/clk.h>
 
diff --git a/arch/arm/mach-tegra/devices.c b/arch/arm/mach-tegra/devices.c
index 7a2a02dbd632..5f6b867e20b4 100644
--- a/arch/arm/mach-tegra/devices.c
+++ b/arch/arm/mach-tegra/devices.c
@@ -23,7 +23,6 @@
 #include <linux/fsl_devices.h>
 #include <linux/serial_8250.h>
 #include <linux/i2c-tegra.h>
-#include <linux/platform_data/tegra_usb.h>
 #include <asm/pmu.h>
 #include <mach/irqs.h>
 #include <mach/iomap.h>
@@ -446,18 +445,18 @@ static struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
         .clk = "cdev2",
 };
 
-static struct tegra_ehci_platform_data tegra_ehci1_pdata = {
+struct tegra_ehci_platform_data tegra_ehci1_pdata = {
         .operating_mode = TEGRA_USB_OTG,
         .power_down_on_bus_suspend = 1,
 };
 
-static struct tegra_ehci_platform_data tegra_ehci2_pdata = {
+struct tegra_ehci_platform_data tegra_ehci2_pdata = {
         .phy_config = &tegra_ehci2_ulpi_phy_config,
         .operating_mode = TEGRA_USB_HOST,
         .power_down_on_bus_suspend = 1,
 };
 
-static struct tegra_ehci_platform_data tegra_ehci3_pdata = {
+struct tegra_ehci_platform_data tegra_ehci3_pdata = {
         .operating_mode = TEGRA_USB_HOST,
         .power_down_on_bus_suspend = 1,
 };
diff --git a/arch/arm/mach-tegra/devices.h b/arch/arm/mach-tegra/devices.h
index 873ecb2f8ae6..ec455679b219 100644
--- a/arch/arm/mach-tegra/devices.h
+++ b/arch/arm/mach-tegra/devices.h
@@ -20,6 +20,11 @@
 #define __MACH_TEGRA_DEVICES_H
 
 #include <linux/platform_device.h>
+#include <linux/platform_data/tegra_usb.h>
+
+extern struct tegra_ehci_platform_data tegra_ehci1_pdata;
+extern struct tegra_ehci_platform_data tegra_ehci2_pdata;
+extern struct tegra_ehci_platform_data tegra_ehci3_pdata;
 
 extern struct platform_device tegra_gpio_device;
 extern struct platform_device tegra_pinmux_device;
diff --git a/arch/arm/mach-tegra/flowctrl.c b/arch/arm/mach-tegra/flowctrl.c
new file mode 100644
index 000000000000..fef66a7486ed
--- /dev/null
+++ b/arch/arm/mach-tegra/flowctrl.c
@@ -0,0 +1,62 @@
+/*
+ * arch/arm/mach-tegra/flowctrl.c
+ *
+ * functions and macros to control the flowcontroller
+ *
+ * Copyright (c) 2010-2012, NVIDIA Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+
+#include <mach/iomap.h>
+
+#include "flowctrl.h"
+
+u8 flowctrl_offset_halt_cpu[] = {
+        FLOW_CTRL_HALT_CPU0_EVENTS,
+        FLOW_CTRL_HALT_CPU1_EVENTS,
+        FLOW_CTRL_HALT_CPU1_EVENTS + 8,
+        FLOW_CTRL_HALT_CPU1_EVENTS + 16,
+};
+
+u8 flowctrl_offset_cpu_csr[] = {
+        FLOW_CTRL_CPU0_CSR,
+        FLOW_CTRL_CPU1_CSR,
+        FLOW_CTRL_CPU1_CSR + 8,
+        FLOW_CTRL_CPU1_CSR + 16,
+};
+
+static void flowctrl_update(u8 offset, u32 value)
+{
+        void __iomem *addr = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE) + offset;
+
+        writel(value, addr);
+
+        /* ensure the update has reached the flow controller */
+        wmb();
+        readl_relaxed(addr);
+}
+
+void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value)
+{
+        return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value);
+}
+
+void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value)
+{
+        return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value);
+}
diff --git a/arch/arm/mach-tegra/flowctrl.h b/arch/arm/mach-tegra/flowctrl.h
index 74c6efbe52fa..19428173855e 100644
--- a/arch/arm/mach-tegra/flowctrl.h
+++ b/arch/arm/mach-tegra/flowctrl.h
@@ -34,4 +34,9 @@
 #define FLOW_CTRL_HALT_CPU1_EVENTS      0x14
 #define FLOW_CTRL_CPU1_CSR              0x18
 
+#ifndef __ASSEMBLY__
+void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value);
+void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value);
+#endif
+
 #endif
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c
index c1afb2738769..f946d129423c 100644
--- a/arch/arm/mach-tegra/fuse.c
+++ b/arch/arm/mach-tegra/fuse.c
@@ -34,6 +34,7 @@
 int tegra_sku_id;
 int tegra_cpu_process_id;
 int tegra_core_process_id;
+int tegra_chip_id;
 enum tegra_revision tegra_revision;
 
 /* The BCT to use at boot is specified by board straps that can be read
@@ -66,12 +67,9 @@ static inline bool get_spare_fuse(int bit)
         return tegra_fuse_readl(FUSE_SPARE_BIT + bit * 4);
 }
 
-static enum tegra_revision tegra_get_revision(void)
+static enum tegra_revision tegra_get_revision(u32 id)
 {
-        void __iomem *chip_id = IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804;
-        u32 id = readl(chip_id);
         u32 minor_rev = (id >> 16) & 0xf;
-        u32 chipid = (id >> 8) & 0xff;
 
         switch (minor_rev) {
         case 1:
@@ -79,7 +77,8 @@ static enum tegra_revision tegra_get_revision(void)
         case 2:
                 return TEGRA_REVISION_A02;
         case 3:
-                if (chipid == 0x20 && (get_spare_fuse(18) || get_spare_fuse(19)))
+                if (tegra_chip_id == TEGRA20 &&
+                        (get_spare_fuse(18) || get_spare_fuse(19)))
                         return TEGRA_REVISION_A03p;
                 else
                         return TEGRA_REVISION_A03;
@@ -92,6 +91,8 @@ static enum tegra_revision tegra_get_revision(void)
 
 void tegra_init_fuse(void)
 {
+        u32 id;
+
         u32 reg = readl(IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48));
         reg |= 1 << 28;
         writel(reg, IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48));
@@ -108,10 +109,13 @@ void tegra_init_fuse(void)
         reg = tegra_apb_readl(TEGRA_APB_MISC_BASE + STRAP_OPT);
         tegra_bct_strapping = (reg & RAM_ID_MASK) >> RAM_CODE_SHIFT;
 
-        tegra_revision = tegra_get_revision();
+        id = readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804);
+        tegra_chip_id = (id >> 8) & 0xff;
+
+        tegra_revision = tegra_get_revision(id);
 
         pr_info("Tegra Revision: %s SKU: %d CPU Process: %d Core Process: %d\n",
-                tegra_revision_name[tegra_get_revision()],
+                tegra_revision_name[tegra_revision],
                 tegra_sku_id, tegra_cpu_process_id,
                 tegra_core_process_id);
 }
diff --git a/arch/arm/mach-tegra/fuse.h b/arch/arm/mach-tegra/fuse.h
index d65d2abf803b..d2107b2cb85a 100644
--- a/arch/arm/mach-tegra/fuse.h
+++ b/arch/arm/mach-tegra/fuse.h
@@ -35,9 +35,13 @@ enum tegra_revision {
 #define SKU_ID_AP25E    27
 #define SKU_ID_T25E     28
 
+#define TEGRA20         0x20
+#define TEGRA30         0x30
+
 extern int tegra_sku_id;
 extern int tegra_cpu_process_id;
 extern int tegra_core_process_id;
+extern int tegra_chip_id;
 extern enum tegra_revision tegra_revision;
 
 extern int tegra_bct_strapping;
diff --git a/arch/arm/mach-tegra/headsmp.S b/arch/arm/mach-tegra/headsmp.S
index b5349b2f13d2..fef9c2c51370 100644
--- a/arch/arm/mach-tegra/headsmp.S
+++ b/arch/arm/mach-tegra/headsmp.S
@@ -1,6 +1,23 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 
+#include <asm/cache.h>
+
+#include <mach/iomap.h>
+
+#include "flowctrl.h"
+#include "reset.h"
+
+#define APB_MISC_GP_HIDREV      0x804
+#define PMC_SCRATCH41   0x140
+
+#define RESET_DATA(x)   ((TEGRA_RESET_##x)*4)
+
+        .macro mov32, reg, val
+        movw    \reg, #:lower16:\val
+        movt    \reg, #:upper16:\val
+        .endm
+
         .section ".text.head", "ax"
         __CPUINIT
 
@@ -47,15 +64,149 @@ ENTRY(v7_invalidate_l1)
         mov     pc, lr
 ENDPROC(v7_invalidate_l1)
 
+
 ENTRY(tegra_secondary_startup)
-        msr     cpsr_fsxc, #0xd3
         bl      v7_invalidate_l1
-        mrc     p15, 0, r0, c0, c0, 5
-        and     r0, r0, #15
-        ldr     r1, =0x6000f100
-        str     r0, [r1]
-1:      ldr     r2, [r1]
-        cmp     r0, r2
-        beq     1b
+        /* Enable coresight */
+        mov32   r0, 0xC5ACCE55
+        mcr     p14, 0, r0, c7, c12, 6
         b       secondary_startup
 ENDPROC(tegra_secondary_startup)
+
+        .align L1_CACHE_SHIFT
+ENTRY(__tegra_cpu_reset_handler_start)
+
+/*
+ * __tegra_cpu_reset_handler:
+ *
+ * Common handler for all CPU reset events.
+ *
+ * Register usage within the reset handler:
+ *
+ *      R7  = CPU present (to the OS) mask
+ *      R8  = CPU in LP1 state mask
+ *      R9  = CPU in LP2 state mask
+ *      R10 = CPU number
+ *      R11 = CPU mask
+ *      R12 = pointer to reset handler data
+ *
+ * NOTE: This code is copied to IRAM. All code and data accesses
+ *       must be position-independent.
+ */
+
+        .align L1_CACHE_SHIFT
+ENTRY(__tegra_cpu_reset_handler)
+
+        cpsid   aif, 0x13                       @ SVC mode, interrupts disabled
+        mrc     p15, 0, r10, c0, c0, 5          @ MPIDR
+        and     r10, r10, #0x3                  @ R10 = CPU number
+        mov     r11, #1
+        mov     r11, r11, lsl r10               @ R11 = CPU mask
+        adr     r12, __tegra_cpu_reset_handler_data
+
+#ifdef CONFIG_SMP
+        /* Does the OS know about this CPU? */
+        ldr     r7, [r12, #RESET_DATA(MASK_PRESENT)]
+        tst     r7, r11                         @ if !present
+        bleq    __die                           @ CPU not present (to OS)
+#endif
+
+#ifdef CONFIG_ARCH_TEGRA_2x_SOC
+        /* Are we on Tegra20? */
+        mov32   r6, TEGRA_APB_MISC_BASE
+        ldr     r0, [r6, #APB_MISC_GP_HIDREV]
+        and     r0, r0, #0xff00
+        cmp     r0, #(0x20 << 8)
+        bne     1f
+        /* If not CPU0, don't let CPU0 reset CPU1 now that CPU1 is coming up. */
+        mov32   r6, TEGRA_PMC_BASE
+        mov     r0, #0
+        cmp     r10, #0
+        strne   r0, [r6, #PMC_SCRATCH41]
+1:
+#endif
+
+#ifdef CONFIG_SMP
+        /*
+         * Can only be secondary boot (initial or hotplug) but CPU 0
+         * cannot be here.
+         */
+        cmp     r10, #0
+        bleq    __die                           @ CPU0 cannot be here
+        ldr     lr, [r12, #RESET_DATA(STARTUP_SECONDARY)]
+        cmp     lr, #0
+        bleq    __die                           @ no secondary startup handler
+        bx      lr
+#endif
+
+/*
+ * We don't know why the CPU reset. Just kill it.
+ * The LR register will contain the address we died at + 4.
+ */
+
+__die:
+        sub     lr, lr, #4
+        mov32   r7, TEGRA_PMC_BASE
+        str     lr, [r7, #PMC_SCRATCH41]
+
+        mov32   r7, TEGRA_CLK_RESET_BASE
+
+        /* Are we on Tegra20? */
+        mov32   r6, TEGRA_APB_MISC_BASE
+        ldr     r0, [r6, #APB_MISC_GP_HIDREV]
+        and     r0, r0, #0xff00
+        cmp     r0, #(0x20 << 8)
+        bne     1f
+
+#ifdef CONFIG_ARCH_TEGRA_2x_SOC
+        mov32   r0, 0x1111
+        mov     r1, r0, lsl r10
+        str     r1, [r7, #0x340]                @ CLK_RST_CPU_CMPLX_SET
+#endif
+1:
+#ifdef CONFIG_ARCH_TEGRA_3x_SOC
+        mov32   r6, TEGRA_FLOW_CTRL_BASE
+
+        cmp     r10, #0
+        moveq   r1, #FLOW_CTRL_HALT_CPU0_EVENTS
+        moveq   r2, #FLOW_CTRL_CPU0_CSR
+        movne   r1, r10, lsl #3
+        addne   r2, r1, #(FLOW_CTRL_CPU1_CSR-8)
+        addne   r1, r1, #(FLOW_CTRL_HALT_CPU1_EVENTS-8)
+
+        /* Clear CPU "event" and "interrupt" flags and power gate
+           it when halting but not before it is in the "WFI" state. */
+        ldr     r0, [r6, +r2]
+        orr     r0, r0, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG
+        orr     r0, r0, #FLOW_CTRL_CSR_ENABLE
+        str     r0, [r6, +r2]
+
+        /* Unconditionally halt this CPU */
+        mov     r0, #FLOW_CTRL_WAITEVENT
+        str     r0, [r6, +r1]
+        ldr     r0, [r6, +r1]                   @ memory barrier
+
+        dsb
+        isb
+        wfi                                     @ CPU should be power gated here
+
+        /* If the CPU didn't power gate above just kill it's clock. */
+
+        mov     r0, r11, lsl #8
+        str     r0, [r7, #348]                  @ CLK_CPU_CMPLX_SET
+#endif
+
+        /* If the CPU still isn't dead, just spin here. */
+        b       .
+ENDPROC(__tegra_cpu_reset_handler)
+
+        .align L1_CACHE_SHIFT
+        .type   __tegra_cpu_reset_handler_data, %object
+        .globl  __tegra_cpu_reset_handler_data
+__tegra_cpu_reset_handler_data:
+        .rept   TEGRA_RESET_DATA_SIZE
+        .long   0
+        .endr
+        .align L1_CACHE_SHIFT
+
+ENTRY(__tegra_cpu_reset_handler_end)
diff --git a/arch/arm/mach-tegra/hotplug.c b/arch/arm/mach-tegra/hotplug.c
index f3294040d357..d8dc9ddd6d18 100644
--- a/arch/arm/mach-tegra/hotplug.c
+++ b/arch/arm/mach-tegra/hotplug.c
@@ -13,6 +13,7 @@
 #include <linux/smp.h>
 
 #include <asm/cacheflush.h>
+#include <asm/cp15.h>
 
 static inline void cpu_enter_lowpower(void)
 {
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S
index 90069abd37bd..8ce0661b8a3d 100644
--- a/arch/arm/mach-tegra/include/mach/debug-macro.S
+++ b/arch/arm/mach-tegra/include/mach/debug-macro.S
@@ -26,7 +26,6 @@
 
 #include <linux/serial_reg.h>
 
-#include <mach/io.h>
 #include <mach/iomap.h>
 #include <mach/irammap.h>
 
diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h
index f15defffb5d2..fe700f9ce7dc 100644
--- a/arch/arm/mach-tegra/include/mach/io.h
+++ b/arch/arm/mach-tegra/include/mach/io.h
@@ -23,56 +23,8 @@
 
 #define IO_SPACE_LIMIT 0xffff
 
-/* On TEGRA, many peripherals are very closely packed in
- * two 256MB io windows (that actually only use about 64KB
- * at the start of each).
- *
- * We will just map the first 1MB of each window (to minimize
- * pt entries needed) and provide a macro to transform physical
- * io addresses to an appropriate void __iomem *.
- *
- */
-
-#ifdef __ASSEMBLY__
-#define IOMEM(x)        (x)
-#else
-#define IOMEM(x)        ((void __force __iomem *)(x))
-#endif
-
-#define IO_IRAM_PHYS    0x40000000
-#define IO_IRAM_VIRT    IOMEM(0xFE400000)
-#define IO_IRAM_SIZE    SZ_256K
-
-#define IO_CPU_PHYS     0x50040000
-#define IO_CPU_VIRT     IOMEM(0xFE000000)
-#define IO_CPU_SIZE     SZ_16K
-
-#define IO_PPSB_PHYS    0x60000000
-#define IO_PPSB_VIRT    IOMEM(0xFE200000)
-#define IO_PPSB_SIZE    SZ_1M
-
-#define IO_APB_PHYS     0x70000000
-#define IO_APB_VIRT     IOMEM(0xFE300000)
-#define IO_APB_SIZE     SZ_1M
-
-#define IO_TO_VIRT_BETWEEN(p, st, sz)   ((p) >= (st) && (p) < ((st) + (sz)))
-#define IO_TO_VIRT_XLATE(p, pst, vst)   (((p) - (pst) + (vst)))
-
-#define IO_TO_VIRT(n) ( \
-        IO_TO_VIRT_BETWEEN((n), IO_PPSB_PHYS, IO_PPSB_SIZE) ?           \
-                IO_TO_VIRT_XLATE((n), IO_PPSB_PHYS, IO_PPSB_VIRT) :     \
-        IO_TO_VIRT_BETWEEN((n), IO_APB_PHYS, IO_APB_SIZE) ?             \
-                IO_TO_VIRT_XLATE((n), IO_APB_PHYS, IO_APB_VIRT) :       \
-        IO_TO_VIRT_BETWEEN((n), IO_CPU_PHYS, IO_CPU_SIZE) ?             \
-                IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) :       \
-        IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ?           \
-                IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) :     \
-        NULL)
-
 #ifndef __ASSEMBLER__
 
-#define IO_ADDRESS(n) (IO_TO_VIRT(n))
-
 #ifdef CONFIG_TEGRA_PCI
 extern void __iomem *tegra_pcie_io_base;
 
@@ -88,7 +40,6 @@ static inline void __iomem *__io(unsigned long addr)
 #endif
 
 #define __io(a)         __io(a)
-#define __mem_pci(a)    (a)
 
 #endif
 
diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h
index 67644c905d8e..7e76da73121c 100644
--- a/arch/arm/mach-tegra/include/mach/iomap.h
+++ b/arch/arm/mach-tegra/include/mach/iomap.h
@@ -113,6 +113,9 @@
 #define TEGRA_AHB_GIZMO_BASE            0x6000C004
 #define TEGRA_AHB_GIZMO_SIZE            0x10C
 
+#define TEGRA_SB_BASE                   0x6000C200
+#define TEGRA_SB_SIZE                   256
+
 #define TEGRA_STATMON_BASE              0x6000C400
 #define TEGRA_STATMON_SIZE              SZ_1K
 
@@ -274,4 +277,46 @@
 # define TEGRA_DEBUG_UART_BASE TEGRA_UARTE_BASE
 #endif
 
+/* On TEGRA, many peripherals are very closely packed in
+ * two 256MB io windows (that actually only use about 64KB
+ * at the start of each).
+ *
+ * We will just map the first 1MB of each window (to minimize
+ * pt entries needed) and provide a macro to transform physical
+ * io addresses to an appropriate void __iomem *.
+ *
+ */
+
+#define IO_IRAM_PHYS    0x40000000
+#define IO_IRAM_VIRT    IOMEM(0xFE400000)
+#define IO_IRAM_SIZE    SZ_256K
+
+#define IO_CPU_PHYS     0x50040000
+#define IO_CPU_VIRT     IOMEM(0xFE000000)
+#define IO_CPU_SIZE     SZ_16K
+
+#define IO_PPSB_PHYS    0x60000000
+#define IO_PPSB_VIRT    IOMEM(0xFE200000)
+#define IO_PPSB_SIZE    SZ_1M
+
+#define IO_APB_PHYS     0x70000000
+#define IO_APB_VIRT     IOMEM(0xFE300000)
+#define IO_APB_SIZE     SZ_1M
+
+#define IO_TO_VIRT_BETWEEN(p, st, sz)   ((p) >= (st) && (p) < ((st) + (sz)))
+#define IO_TO_VIRT_XLATE(p, pst, vst)   (((p) - (pst) + (vst)))
+
+#define IO_TO_VIRT(n) ( \
+        IO_TO_VIRT_BETWEEN((n), IO_PPSB_PHYS, IO_PPSB_SIZE) ?           \
+                IO_TO_VIRT_XLATE((n), IO_PPSB_PHYS, IO_PPSB_VIRT) :     \
+        IO_TO_VIRT_BETWEEN((n), IO_APB_PHYS, IO_APB_SIZE) ?             \
+                IO_TO_VIRT_XLATE((n), IO_APB_PHYS, IO_APB_VIRT) :       \
+        IO_TO_VIRT_BETWEEN((n), IO_CPU_PHYS, IO_CPU_SIZE) ?             \
+                IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) :       \
+        IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ?           \
+                IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) :     \
+        NULL)
+
+#define IO_ADDRESS(n) (IO_TO_VIRT(n))
+
 #endif
diff --git a/arch/arm/mach-tegra/include/mach/powergate.h b/arch/arm/mach-tegra/include/mach/powergate.h
index 39c396d2ddb0..4752b1a68f35 100644
--- a/arch/arm/mach-tegra/include/mach/powergate.h
+++ b/arch/arm/mach-tegra/include/mach/powergate.h
@@ -27,8 +27,21 @@
 #define TEGRA_POWERGATE_VDEC    4
 #define TEGRA_POWERGATE_L2      5
 #define TEGRA_POWERGATE_MPE     6
-#define TEGRA_NUM_POWERGATE     7
+#define TEGRA_POWERGATE_HEG     7
+#define TEGRA_POWERGATE_SATA    8
+#define TEGRA_POWERGATE_CPU1    9
+#define TEGRA_POWERGATE_CPU2    10
+#define TEGRA_POWERGATE_CPU3    11
+#define TEGRA_POWERGATE_CELP    12
+#define TEGRA_POWERGATE_3D1     13
 
+#define TEGRA_POWERGATE_CPU0    TEGRA_POWERGATE_CPU
+#define TEGRA_POWERGATE_3D0     TEGRA_POWERGATE_3D
+
+int  __init tegra_powergate_init(void);
+
+int tegra_cpu_powergate_id(int cpuid);
+int tegra_powergate_is_powered(int id);
 int tegra_powergate_power_on(int id);
 int tegra_powergate_power_off(int id);
 int tegra_powergate_remove_clamping(int id);
diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c
index d23ee2db2827..58b4baf9c483 100644
--- a/arch/arm/mach-tegra/io.c
+++ b/arch/arm/mach-tegra/io.c
@@ -26,6 +26,7 @@
 
 #include <asm/page.h>
 #include <asm/mach/map.h>
+#include <mach/iomap.h>
 
 #include "board.h"
 
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index 7d2b5d03c1df..1a208dbf682f 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -24,19 +24,31 @@
 #include <asm/mach-types.h>
 #include <asm/smp_scu.h>
 
+#include <mach/clk.h>
 #include <mach/iomap.h>
+#include <mach/powergate.h>
+
+#include "fuse.h"
+#include "flowctrl.h"
+#include "reset.h"
 
 extern void tegra_secondary_startup(void);
 
-static DEFINE_SPINLOCK(boot_lock);
 static void __iomem *scu_base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE);
 
 #define EVP_CPU_RESET_VECTOR \
         (IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE) + 0x100)
 #define CLK_RST_CONTROLLER_CLK_CPU_CMPLX \
         (IO_ADDRESS(TEGRA_CLK_RESET_BASE) + 0x4c)
+#define CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET \
+        (IO_ADDRESS(TEGRA_CLK_RESET_BASE) + 0x340)
 #define CLK_RST_CONTROLLER_RST_CPU_CMPLX_CLR \
         (IO_ADDRESS(TEGRA_CLK_RESET_BASE) + 0x344)
+#define CLK_RST_CONTROLLER_CLK_CPU_CMPLX_CLR \
+        (IO_ADDRESS(TEGRA_CLK_RESET_BASE) + 0x34c)
+
+#define CPU_CLOCK(cpu)  (0x1<<(8+cpu))
+#define CPU_RESET(cpu)  (0x1111ul<<(cpu))
 
 void __cpuinit platform_secondary_init(unsigned int cpu)
 {
@@ -47,63 +59,106 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
          */
         gic_secondary_init(0);
 
-        /*
-         * Synchronise with the boot thread.
-         */
-        spin_lock(&boot_lock);
-        spin_unlock(&boot_lock);
 }
 
-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int tegra20_power_up_cpu(unsigned int cpu)
 {
-        unsigned long old_boot_vector;
-        unsigned long boot_vector;
-        unsigned long timeout;
         u32 reg;
 
-        /*
-         * set synchronisation state between this boot processor
-         * and the secondary one
-         */
-        spin_lock(&boot_lock);
+        /* Enable the CPU clock. */
+        reg = readl(CLK_RST_CONTROLLER_CLK_CPU_CMPLX);
+        writel(reg & ~CPU_CLOCK(cpu), CLK_RST_CONTROLLER_CLK_CPU_CMPLX);
+        barrier();
+        reg = readl(CLK_RST_CONTROLLER_CLK_CPU_CMPLX);
 
+        /* Clear flow controller CSR. */
+        flowctrl_write_cpu_csr(cpu, 0);
 
-        /* set the reset vector to point to the secondary_startup routine */
+        return 0;
+}
 
-        boot_vector = virt_to_phys(tegra_secondary_startup);
-        old_boot_vector = readl(EVP_CPU_RESET_VECTOR);
-        writel(boot_vector, EVP_CPU_RESET_VECTOR);
+static int tegra30_power_up_cpu(unsigned int cpu)
+{
+        u32 reg;
+        int ret, pwrgateid;
+        unsigned long timeout;
 
-        /* enable cpu clock on cpu1 */
-        reg = readl(CLK_RST_CONTROLLER_CLK_CPU_CMPLX);
-        writel(reg & ~(1<<9), CLK_RST_CONTROLLER_CLK_CPU_CMPLX);
+        pwrgateid = tegra_cpu_powergate_id(cpu);
+        if (pwrgateid < 0)
+                return pwrgateid;
+
+        /* If this is the first boot, toggle powergates directly. */
+        if (!tegra_powergate_is_powered(pwrgateid)) {
+                ret = tegra_powergate_power_on(pwrgateid);
+                if (ret)
+                        return ret;
+
+                /* Wait for the power to come up. */
+                timeout = jiffies + 10*HZ;
+                while (tegra_powergate_is_powered(pwrgateid)) {
+                        if (time_after(jiffies, timeout))
+                                return -ETIMEDOUT;
+                        udelay(10);
+                }
+        }
 
-        reg = (1<<13) | (1<<9) | (1<<5) | (1<<1);
-        writel(reg, CLK_RST_CONTROLLER_RST_CPU_CMPLX_CLR);
+        /* CPU partition is powered. Enable the CPU clock. */
+        writel(CPU_CLOCK(cpu), CLK_RST_CONTROLLER_CLK_CPU_CMPLX_CLR);
+        reg = readl(CLK_RST_CONTROLLER_CLK_CPU_CMPLX_CLR);
+        udelay(10);
 
-        smp_wmb();
-        flush_cache_all();
+        /* Remove I/O clamps. */
+        ret = tegra_powergate_remove_clamping(pwrgateid);
+        udelay(10);
 
-        /* unhalt the cpu */
-        writel(0, IO_ADDRESS(TEGRA_FLOW_CTRL_BASE) + 0x14);
+        /* Clear flow controller CSR. */
+        flowctrl_write_cpu_csr(cpu, 0);
 
-        timeout = jiffies + (1 * HZ);
-        while (time_before(jiffies, timeout)) {
-                if (readl(EVP_CPU_RESET_VECTOR) != boot_vector)
-                        break;
-                udelay(10);
-        }
+        return 0;
+}
+
+int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+{
+        int status;
 
-        /* put the old boot vector back */
-        writel(old_boot_vector, EVP_CPU_RESET_VECTOR);
+        /*
+         * Force the CPU into reset. The CPU must remain in reset when the
+         * flow controller state is cleared (which will cause the flow
+         * controller to stop driving reset if the CPU has been power-gated
+         * via the flow controller). This will have no effect on first boot
+         * of the CPU since it should already be in reset.
+         */
+        writel(CPU_RESET(cpu), CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET);
+        dmb();
 
         /*
-         * now the secondary core is starting up let it run its
-         * calibrations, then wait for it to finish
+         * Unhalt the CPU. If the flow controller was used to power-gate the
+         * CPU this will cause the flow controller to stop driving reset.
+         * The CPU will remain in reset because the clock and reset block
+         * is now driving reset.
          */
-        spin_unlock(&boot_lock);
+        flowctrl_write_cpu_halt(cpu, 0);
+
+        switch (tegra_chip_id) {
+        case TEGRA20:
+                status = tegra20_power_up_cpu(cpu);
+                break;
+        case TEGRA30:
+                status = tegra30_power_up_cpu(cpu);
+                break;
+        default:
+                status = -EINVAL;
+                break;
+        }
 
-        return 0;
+        if (status)
+                goto done;
+
+        /* Take the CPU out of reset. */
+        writel(CPU_RESET(cpu), CLK_RST_CONTROLLER_RST_CPU_CMPLX_CLR);
+        wmb();
+done:
+        return status;
 }
 
 /*
@@ -128,6 +183,6 @@ void __init smp_init_cpus(void)
 
 void __init platform_smp_prepare_cpus(unsigned int max_cpus)
 {
-
+        tegra_cpu_reset_handler_init();
         scu_enable(scu_base);
 }
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index 948306491a59..c238699ae86f 100644
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -31,6 +31,8 @@
 #include <mach/iomap.h>
 #include <mach/powergate.h>
 
+#include "fuse.h"
+
 #define PWRGATE_TOGGLE          0x30
 #define  PWRGATE_TOGGLE_START   (1 << 8)
 
@@ -38,6 +40,16 @@
 
 #define PWRGATE_STATUS          0x38
 
+static int tegra_num_powerdomains;
+static int tegra_num_cpu_domains;
+static u8 *tegra_cpu_domains;
+static u8 tegra30_cpu_domains[] = {
+        TEGRA_POWERGATE_CPU0,
+        TEGRA_POWERGATE_CPU1,
+        TEGRA_POWERGATE_CPU2,
+        TEGRA_POWERGATE_CPU3,
+};
+
 static DEFINE_SPINLOCK(tegra_powergate_lock);
 
 static void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
@@ -75,7 +87,7 @@ static int tegra_powergate_set(int id, bool new_state)
 
 int tegra_powergate_power_on(int id)
 {
-        if (id < 0 || id >= TEGRA_NUM_POWERGATE)
+        if (id < 0 || id >= tegra_num_powerdomains)
                 return -EINVAL;
 
         return tegra_powergate_set(id, true);
@@ -83,17 +95,18 @@ int tegra_powergate_power_on(int id)
 
 int tegra_powergate_power_off(int id)
 {
-        if (id < 0 || id >= TEGRA_NUM_POWERGATE)
+        if (id < 0 || id >= tegra_num_powerdomains)
                 return -EINVAL;
 
         return tegra_powergate_set(id, false);
 }
 
-static bool tegra_powergate_is_powered(int id)
+int tegra_powergate_is_powered(int id)
 {
         u32 status;
 
-        WARN_ON(id < 0 || id >= TEGRA_NUM_POWERGATE);
+        if (id < 0 || id >= tegra_num_powerdomains)
+                return -EINVAL;
 
         status = pmc_read(PWRGATE_STATUS) & (1 << id);
         return !!status;
@@ -103,7 +116,7 @@ int tegra_powergate_remove_clamping(int id)
 {
         u32 mask;
 
-        if (id < 0 || id >= TEGRA_NUM_POWERGATE)
+        if (id < 0 || id >= tegra_num_powerdomains)
                 return -EINVAL;
 
         /*
@@ -156,6 +169,34 @@ err_power:
         return ret;
 }
 
+int tegra_cpu_powergate_id(int cpuid)
+{
+        if (cpuid > 0 && cpuid < tegra_num_cpu_domains)
+                return tegra_cpu_domains[cpuid];
+
+        return -EINVAL;
+}
+
+int __init tegra_powergate_init(void)
+{
+        switch (tegra_chip_id) {
+        case TEGRA20:
+                tegra_num_powerdomains = 7;
+                break;
+        case TEGRA30:
+                tegra_num_powerdomains = 14;
+                tegra_num_cpu_domains = 4;
+                tegra_cpu_domains = tegra30_cpu_domains;
+                break;
+        default:
+                /* Unknown Tegra variant. Disable powergating */
+                tegra_num_powerdomains = 0;
+                break;
+        }
+
+        return 0;
+}
+
 #ifdef CONFIG_DEBUG_FS
 
 static const char * const powergate_name[] = {
@@ -175,7 +216,7 @@ static int powergate_show(struct seq_file *s, void *data)
         seq_printf(s, " powergate powered\n");
         seq_printf(s, "------------------\n");
 
-        for (i = 0; i < TEGRA_NUM_POWERGATE; i++)
+        for (i = 0; i < tegra_num_powerdomains; i++)
                 seq_printf(s, " %9s %7s\n", powergate_name[i],
                         tegra_powergate_is_powered(i) ? "yes" : "no");
         return 0;
diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c
new file mode 100644
index 000000000000..4d6a2ee99c3b
--- /dev/null
+++ b/arch/arm/mach-tegra/reset.c
@@ -0,0 +1,84 @@
+/*
+ * arch/arm/mach-tegra/reset.c
+ *
+ * Copyright (C) 2011,2012 NVIDIA Corporation.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/cpumask.h>
+#include <linux/bitops.h>
+
+#include <asm/cacheflush.h>
+#include <asm/hardware/cache-l2x0.h>
+
+#include <mach/iomap.h>
+#include <mach/irammap.h>
+
+#include "reset.h"
+#include "fuse.h"
+
+#define TEGRA_IRAM_RESET_BASE (TEGRA_IRAM_BASE + \
+                                TEGRA_IRAM_RESET_HANDLER_OFFSET)
+
+static bool is_enabled;
+
+static void tegra_cpu_reset_handler_enable(void)
+{
+        void __iomem *iram_base = IO_ADDRESS(TEGRA_IRAM_RESET_BASE);
+        void __iomem *evp_cpu_reset =
+                IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE + 0x100);
+        void __iomem *sb_ctrl = IO_ADDRESS(TEGRA_SB_BASE);
+        u32 reg;
+
+        BUG_ON(is_enabled);
+        BUG_ON(tegra_cpu_reset_handler_size > TEGRA_IRAM_RESET_HANDLER_SIZE);
+
+        memcpy(iram_base, (void *)__tegra_cpu_reset_handler_start,
+                        tegra_cpu_reset_handler_size);
+
+        /*
+         * NOTE: This must be the one and only write to the EVP CPU reset
+         *       vector in the entire system.
+         */
+        writel(TEGRA_IRAM_RESET_BASE + tegra_cpu_reset_handler_offset,
+                        evp_cpu_reset);
+        wmb();
+        reg = readl(evp_cpu_reset);
+
+        /*
+         * Prevent further modifications to the physical reset vector.
+         *  NOTE: Has no effect on chips prior to Tegra30.
+         */
+        if (tegra_chip_id != TEGRA20) {
+                reg = readl(sb_ctrl);
+                reg |= 2;
+                writel(reg, sb_ctrl);
+                wmb();
+        }
+
+        is_enabled = true;
+}
+
+void __init tegra_cpu_reset_handler_init(void)
+{
+
+#ifdef CONFIG_SMP
+        __tegra_cpu_reset_handler_data[TEGRA_RESET_MASK_PRESENT] =
+                *((u32 *)cpu_present_mask);
+        __tegra_cpu_reset_handler_data[TEGRA_RESET_STARTUP_SECONDARY] =
+                virt_to_phys((void *)tegra_secondary_startup);
+#endif
+
+        tegra_cpu_reset_handler_enable();
+}
diff --git a/arch/arm/mach-tegra/reset.h b/arch/arm/mach-tegra/reset.h
new file mode 100644
index 000000000000..de88bf851dd3
--- /dev/null
+++ b/arch/arm/mach-tegra/reset.h
@@ -0,0 +1,50 @@
+/*
+ * arch/arm/mach-tegra/reset.h
+ *
+ * CPU reset dispatcher.
+ *
+ * Copyright (c) 2011, NVIDIA Corporation.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __MACH_TEGRA_RESET_H
+#define __MACH_TEGRA_RESET_H
+
+#define TEGRA_RESET_MASK_PRESENT        0
+#define TEGRA_RESET_MASK_LP1            1
+#define TEGRA_RESET_MASK_LP2            2
+#define TEGRA_RESET_STARTUP_SECONDARY   3
+#define TEGRA_RESET_STARTUP_LP2         4
+#define TEGRA_RESET_STARTUP_LP1         5
+#define TEGRA_RESET_DATA_SIZE           6
+
+#ifndef __ASSEMBLY__
+
+extern unsigned long __tegra_cpu_reset_handler_data[TEGRA_RESET_DATA_SIZE];
+
+void __tegra_cpu_reset_handler_start(void);
+void __tegra_cpu_reset_handler(void);
+void __tegra_cpu_reset_handler_end(void);
+void tegra_secondary_startup(void);
+
+#define tegra_cpu_reset_handler_offset \
+                ((u32)__tegra_cpu_reset_handler - \
+                 (u32)__tegra_cpu_reset_handler_start)
+
+#define tegra_cpu_reset_handler_size \
+                (__tegra_cpu_reset_handler_end - \
+                 __tegra_cpu_reset_handler_start)
+
+void __init tegra_cpu_reset_handler_init(void);
+
+#endif
+#endif
diff --git a/arch/arm/mach-tegra/sleep.S b/arch/arm/mach-tegra/sleep.S
index 8f9fde161c34..5b20197bae7f 100644
--- a/arch/arm/mach-tegra/sleep.S
+++ b/arch/arm/mach-tegra/sleep.S
@@ -23,7 +23,9 @@
  */
 
 #include <linux/linkage.h>
-#include <mach/io.h>
+
+#include <asm/assembler.h>
+
 #include <mach/iomap.h>
 
 #include "flowctrl.h"
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 8b90c44d237f..1621ad07d284 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -1544,6 +1544,8 @@ static struct fsmc_nand_platform_data nand_platform_data = {
         .nr_partitions = ARRAY_SIZE(u300_partitions),
         .options = NAND_SKIP_BBTSCAN,
         .width = FSMC_NAND_BW8,
+        .ale_off = PLAT_NAND_ALE,
+        .cle_off = PLAT_NAND_CLE,
 };
 
 static struct platform_device nand_device = {
diff --git a/arch/arm/mach-u300/include/mach/io.h b/arch/arm/mach-u300/include/mach/io.h
deleted file mode 100644
index 5d6b4c13b3a0..000000000000
--- a/arch/arm/mach-u300/include/mach/io.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- *
- * arch/arm/mach-u300/include/mach/io.h
- *
- *
- * Copyright (C) 2006-2009 ST-Ericsson AB
- * License terms: GNU General Public License (GPL) version 2
- * Dummy IO map for being able to use writew()/readw(),
- * writel()/readw() and similar accessor functions.
- * Author: Linus Walleij <linus.walleij@stericsson.com>
- */
-#ifndef __MACH_IO_H
-#define __MACH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-u300/include/mach/u300-regs.h b/arch/arm/mach-u300/include/mach/u300-regs.h
index 035fdc9dbdb0..65f87c523892 100644
--- a/arch/arm/mach-u300/include/mach/u300-regs.h
+++ b/arch/arm/mach-u300/include/mach/u300-regs.h
@@ -18,18 +18,17 @@
  * the defines are used for setting up the I/O memory mapping.
  */
 
-#ifdef __ASSEMBLER__
-#define IOMEM(a) (a)
-#else
-#define IOMEM(a) (void __iomem *) a
-#endif
-
 /* NAND Flash CS0 */
 #define U300_NAND_CS0_PHYS_BASE         0x80000000
 
 /* NFIF */
 #define U300_NAND_IF_PHYS_BASE          0x9f800000
 
+/* ALE, CLE offset for FSMC NAND */
+#define PLAT_NAND_CLE                   (1 << 16)
+#define PLAT_NAND_ALE                   (1 << 17)
+
+
 /* AHB Peripherals */
 #define U300_AHB_PER_PHYS_BASE          0xa0000000
 #define U300_AHB_PER_VIRT_BASE          0xff010000
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 9ec635812349..880d02ec89d4 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -27,6 +27,7 @@ config MACH_MOP500
         select UX500_SOC_DB8500
         select I2C
         select I2C_NOMADIK
+        select SOC_BUS
         help
           Include support for the MOP500 development platform.
 
@@ -57,6 +58,12 @@ config UX500_AUTO_PLATFORM
           At least one platform needs to be selected in order to build
           a working kernel. If everything else is disabled, this
           automatically enables MACH_MOP500.
+
+config MACH_UX500_DT
+        bool "Generic U8500 support using device tree"
+        depends on MACH_MOP500
+        select USE_OF
+
 endmenu
 
 config UX500_DEBUG_UART
diff --git a/arch/arm/mach-ux500/Makefile.boot b/arch/arm/mach-ux500/Makefile.boot
index ff0a4b5b0a82..dd5cd00e2554 100644
--- a/arch/arm/mach-ux500/Makefile.boot
+++ b/arch/arm/mach-ux500/Makefile.boot
@@ -2,3 +2,4 @@
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
 
+dtb-$(CONFIG_MACH_SNOWBALL) += snowball.dtb
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c
index 1daead3e583e..920251cf834c 100644
--- a/arch/arm/mach-ux500/board-mop500-sdi.c
+++ b/arch/arm/mach-ux500/board-mop500-sdi.c
@@ -99,7 +99,7 @@ static struct mmci_platform_data mop500_sdi0_data = {
 #endif
 };
 
-static void sdi0_configure(void)
+static void sdi0_configure(struct device *parent)
 {
         int ret;
 
@@ -118,15 +118,15 @@ static void sdi0_configure(void)
         gpio_direction_output(sdi0_en, 1);
 
         /* Add the device, force v2 to subrevision 1 */
-        db8500_add_sdi0(&mop500_sdi0_data, U8500_SDI_V2_PERIPHID);
+        db8500_add_sdi0(parent, &mop500_sdi0_data, U8500_SDI_V2_PERIPHID);
 }
 
-void mop500_sdi_tc35892_init(void)
+void mop500_sdi_tc35892_init(struct device *parent)
 {
         mop500_sdi0_data.gpio_cd = GPIO_SDMMC_CD;
         sdi0_en = GPIO_SDMMC_EN;
         sdi0_vsel = GPIO_SDMMC_1V8_3V_SEL;
-        sdi0_configure();
+        sdi0_configure(parent);
 }
 
 /*
@@ -241,12 +241,13 @@ static struct mmci_platform_data mop500_sdi4_data = {
 #endif
 };
 
-void __init mop500_sdi_init(void)
+void __init mop500_sdi_init(struct device *parent)
 {
         /* PoP:ed eMMC */
-        db8500_add_sdi2(&mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
+        db8500_add_sdi2(parent, &mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
         /* On-board eMMC */
-        db8500_add_sdi4(&mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
+        db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
+
         /*
          * On boards with the TC35892 GPIO expander, sdi0 will finally
          * be added when the TC35892 initializes and calls
@@ -254,31 +255,31 @@ void __init mop500_sdi_init(void)
          */
 }
 
-void __init snowball_sdi_init(void)
+void __init snowball_sdi_init(struct device *parent)
 {
         /* On Snowball MMC_CAP_SD_HIGHSPEED isn't supported (Hardware issue?) */
         mop500_sdi0_data.capabilities &= ~MMC_CAP_SD_HIGHSPEED;
         /* On-board eMMC */
-        db8500_add_sdi4(&mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
+        db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
         /* External Micro SD slot */
         mop500_sdi0_data.gpio_cd = SNOWBALL_SDMMC_CD_GPIO;
         mop500_sdi0_data.cd_invert = true;
         sdi0_en = SNOWBALL_SDMMC_EN_GPIO;
         sdi0_vsel = SNOWBALL_SDMMC_1V8_3V_GPIO;
-        sdi0_configure();
+        sdi0_configure(parent);
 }
 
-void __init hrefv60_sdi_init(void)
+void __init hrefv60_sdi_init(struct device *parent)
 {
         /* PoP:ed eMMC */
-        db8500_add_sdi2(&mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
+        db8500_add_sdi2(parent, &mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
         /* On-board eMMC */
-        db8500_add_sdi4(&mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
+        db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
         /* External Micro SD slot */
         mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO;
         sdi0_en = HREFV60_SDMMC_EN_GPIO;
         sdi0_vsel = HREFV60_SDMMC_1V8_3V_GPIO;
-        sdi0_configure();
+        sdi0_configure(parent);
         /* WLAN SDIO channel */
-        db8500_add_sdi1(&mop500_sdi1_data, U8500_SDI_V2_PERIPHID);
+        db8500_add_sdi1(parent, &mop500_sdi1_data, U8500_SDI_V2_PERIPHID);
 }
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 6d672a556df8..77d03c1fbd04 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -30,6 +30,9 @@
 #include <linux/gpio_keys.h>
 #include <linux/delay.h>
 
+#include <linux/of.h>
+#include <linux/of_platform.h>
+
 #include <linux/leds.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -226,7 +229,12 @@ static struct tps6105x_platform_data mop500_tps61052_data = {
 
 static void mop500_tc35892_init(struct tc3589x *tc3589x, unsigned int base)
 {
-        mop500_sdi_tc35892_init();
+        struct device *parent = NULL;
+#if 0
+        /* FIXME: Is the sdi actually part of tc3589x? */
+        parent = tc3589x->dev;
+#endif
+        mop500_sdi_tc35892_init(parent);
 }
 
 static struct tc3589x_gpio_platform_data mop500_tc35892_gpio_data = {
@@ -353,12 +361,12 @@ U8500_I2C_CONTROLLER(1, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
 U8500_I2C_CONTROLLER(2, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
 U8500_I2C_CONTROLLER(3, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
 
-static void __init mop500_i2c_init(void)
+static void __init mop500_i2c_init(struct device *parent)
 {
-        db8500_add_i2c0(&u8500_i2c0_data);
-        db8500_add_i2c1(&u8500_i2c1_data);
-        db8500_add_i2c2(&u8500_i2c2_data);
-        db8500_add_i2c3(&u8500_i2c3_data);
+        db8500_add_i2c0(parent, &u8500_i2c0_data);
+        db8500_add_i2c1(parent, &u8500_i2c1_data);
+        db8500_add_i2c2(parent, &u8500_i2c2_data);
+        db8500_add_i2c3(parent, &u8500_i2c3_data);
 }
 
 static struct gpio_keys_button mop500_gpio_keys[] = {
@@ -435,7 +443,7 @@ static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
 };
 #endif
 
-static struct pl022_ssp_controller ssp0_platform_data = {
+static struct pl022_ssp_controller ssp0_plat = {
         .bus_id = 0,
 #ifdef CONFIG_STE_DMA40
         .enable_dma = 1,
@@ -451,9 +459,9 @@ static struct pl022_ssp_controller ssp0_platform_data = {
         .num_chipselect = 5,
 };
 
-static void __init mop500_spi_init(void)
+static void __init mop500_spi_init(struct device *parent)
 {
-        db8500_add_ssp0(&ssp0_platform_data);
+        db8500_add_ssp0(parent, &ssp0_plat);
 }
 
 #ifdef CONFIG_STE_DMA40
@@ -587,11 +595,11 @@ static struct amba_pl011_data uart2_plat = {
 #endif
 };
 
-static void __init mop500_uart_init(void)
+static void __init mop500_uart_init(struct device *parent)
 {
-        db8500_add_uart0(&uart0_plat);
-        db8500_add_uart1(&uart1_plat);
-        db8500_add_uart2(&uart2_plat);
+        db8500_add_uart0(parent, &uart0_plat);
+        db8500_add_uart1(parent, &uart1_plat);
+        db8500_add_uart2(parent, &uart2_plat);
 }
 
 static struct platform_device *snowball_platform_devs[] __initdata = {
@@ -603,21 +611,27 @@ static struct platform_device *snowball_platform_devs[] __initdata = {
 
 static void __init mop500_init_machine(void)
 {
+        struct device *parent = NULL;
         int i2c0_devs;
+        int i;
 
         mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
 
-        u8500_init_devices();
+        parent = u8500_init_devices();
 
         mop500_pins_init();
 
+        /* FIXME: parent of ab8500 should be prcmu */
+        for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
+                mop500_platform_devs[i]->dev.parent = parent;
+
         platform_add_devices(mop500_platform_devs,
                         ARRAY_SIZE(mop500_platform_devs));
 
-        mop500_i2c_init();
-        mop500_sdi_init();
-        mop500_spi_init();
-        mop500_uart_init();
+        mop500_i2c_init(parent);
+        mop500_sdi_init(parent);
+        mop500_spi_init(parent);
+        mop500_uart_init(parent);
 
         i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
 
@@ -631,19 +645,24 @@ static void __init mop500_init_machine(void)
 
 static void __init snowball_init_machine(void)
 {
+        struct device *parent = NULL;
         int i2c0_devs;
+        int i;
 
-        u8500_init_devices();
+        parent = u8500_init_devices();
 
         snowball_pins_init();
 
+        for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
+                snowball_platform_devs[i]->dev.parent = parent;
+
         platform_add_devices(snowball_platform_devs,
                         ARRAY_SIZE(snowball_platform_devs));
 
-        mop500_i2c_init();
-        snowball_sdi_init();
-        mop500_spi_init();
-        mop500_uart_init();
+        mop500_i2c_init(parent);
+        snowball_sdi_init(parent);
+        mop500_spi_init(parent);
+        mop500_uart_init(parent);
 
         i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
         i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
@@ -656,7 +675,9 @@ static void __init snowball_init_machine(void)
 
 static void __init hrefv60_init_machine(void)
 {
+        struct device *parent = NULL;
         int i2c0_devs;
+        int i;
 
         /*
          * The HREFv60 board removed a GPIO expander and routed
@@ -665,17 +686,20 @@ static void __init hrefv60_init_machine(void)
          */
         mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
 
-        u8500_init_devices();
+        parent = u8500_init_devices();
 
         hrefv60_pins_init();
 
+        for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
+                mop500_platform_devs[i]->dev.parent = parent;
+
         platform_add_devices(mop500_platform_devs,
                         ARRAY_SIZE(mop500_platform_devs));
 
-        mop500_i2c_init();
-        hrefv60_sdi_init();
-        mop500_spi_init();
-        mop500_uart_init();
+        mop500_i2c_init(parent);
+        hrefv60_sdi_init(parent);
+        mop500_spi_init(parent);
+        mop500_uart_init(parent);
 
         i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
 
@@ -718,3 +742,94 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
         .handle_irq     = gic_handle_irq,
         .init_machine   = snowball_init_machine,
 MACHINE_END
+
+#ifdef CONFIG_MACH_UX500_DT
+
+struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
+        OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
+        OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
+        OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
+        OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0",  &ssp0_plat),
+        {},
+};
+
+static const struct of_device_id u8500_soc_node[] = {
+        /* only create devices below soc node */
+        { .compatible = "stericsson,db8500", },
+        { },
+};
+
+static void __init u8500_init_machine(void)
+{
+        struct device *parent = NULL;
+        int i2c0_devs;
+        int i;
+
+        parent = u8500_init_devices();
+        i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
+
+        for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
+                mop500_platform_devs[i]->dev.parent = parent;
+        for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
+                snowball_platform_devs[i]->dev.parent = parent;
+
+        /* automatically probe child nodes of db8500 device */
+        of_platform_populate(NULL, u8500_soc_node, u8500_auxdata_lookup, parent);
+
+        if (of_machine_is_compatible("st-ericsson,mop500")) {
+                mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
+                mop500_pins_init();
+
+                platform_add_devices(mop500_platform_devs,
+                                ARRAY_SIZE(mop500_platform_devs));
+
+                mop500_sdi_init(parent);
+        } else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
+                snowball_pins_init();
+                platform_add_devices(snowball_platform_devs,
+                                ARRAY_SIZE(snowball_platform_devs));
+
+                snowball_sdi_init(parent);
+        } else if (of_machine_is_compatible("st-ericsson,hrefv60+")) {
+                /*
+                 * The HREFv60 board removed a GPIO expander and routed
+                 * all these GPIO pins to the internal GPIO controller
+                 * instead.
+                 */
+                mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
+                i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
+                hrefv60_pins_init();
+                platform_add_devices(mop500_platform_devs,
+                                ARRAY_SIZE(mop500_platform_devs));
+
+                hrefv60_sdi_init(parent);
+        }
+        mop500_i2c_init(parent);
+
+        i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
+        i2c_register_board_info(2, mop500_i2c2_devices,
+                                ARRAY_SIZE(mop500_i2c2_devices));
+
+        /* This board has full regulator constraints */
+        regulator_has_full_constraints();
+}
+
+static const char * u8500_dt_board_compat[] = {
+        "calaosystems,snowball-a9500",
+        "st-ericsson,hrefv60+",
+        "st-ericsson,u8500",
+        "st-ericsson,mop500",
+        NULL,
+};
+
+
+DT_MACHINE_START(U8500_DT, "ST-Ericsson U8500 platform (Device Tree Support)")
+        .map_io         = u8500_map_io,
+        .init_irq       = ux500_init_irq,
+        /* we re-use nomadik timer here */
+        .timer          = &ux500_timer,
+        .handle_irq     = gic_handle_irq,
+        .init_machine   = u8500_init_machine,
+        .dt_compat      = u8500_dt_board_compat,
+MACHINE_END
+#endif
diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h
index 7ff6cbffc104..fdcfa8721bb4 100644
--- a/arch/arm/mach-ux500/board-mop500.h
+++ b/arch/arm/mach-ux500/board-mop500.h
@@ -75,10 +75,10 @@
 
 struct i2c_board_info;
 
-extern void mop500_sdi_init(void);
-extern void snowball_sdi_init(void);
-extern void hrefv60_sdi_init(void);
-extern void mop500_sdi_tc35892_init(void);
+extern void mop500_sdi_init(struct device *parent);
+extern void snowball_sdi_init(struct device *parent);
+extern void hrefv60_sdi_init(struct device *parent);
+extern void mop500_sdi_tc35892_init(struct device *parent);
 void __init mop500_u8500uib_init(void);
 void __init mop500_stuib_init(void);
 void __init mop500_pins_init(void);
diff --git a/arch/arm/mach-ux500/board-u5500-sdi.c b/arch/arm/mach-ux500/board-u5500-sdi.c
index 63c3f8058ffc..836112eedde7 100644
--- a/arch/arm/mach-ux500/board-u5500-sdi.c
+++ b/arch/arm/mach-ux500/board-u5500-sdi.c
@@ -66,9 +66,9 @@ static struct mmci_platform_data u5500_sdi0_data = {
 #endif
 };
 
-void __init u5500_sdi_init(void)
+void __init u5500_sdi_init(struct device *parent)
 {
         nmk_config_pins(u5500_sdi_pins, ARRAY_SIZE(u5500_sdi_pins));
 
-        db5500_add_sdi0(&u5500_sdi0_data);
+        db5500_add_sdi0(parent, &u5500_sdi0_data);
 }
diff --git a/arch/arm/mach-ux500/board-u5500.c b/arch/arm/mach-ux500/board-u5500.c
index 9de9e9c4dbbb..0ff4be72a809 100644
--- a/arch/arm/mach-ux500/board-u5500.c
+++ b/arch/arm/mach-ux500/board-u5500.c
@@ -97,9 +97,9 @@ static struct i2c_board_info __initdata u5500_i2c2_devices[] = {
         },
 };
 
-static void __init u5500_i2c_init(void)
+static void __init u5500_i2c_init(struct device *parent)
 {
-        db5500_add_i2c2(&u5500_i2c2_data);
+        db5500_add_i2c2(parent, &u5500_i2c2_data);
         i2c_register_board_info(2, ARRAY_AND_SIZE(u5500_i2c2_devices));
 }
 
@@ -126,20 +126,27 @@ static struct platform_device *u5500_platform_devices[] __initdata = {
         &ab5500_device,
 };
 
-static void __init u5500_uart_init(void)
+static void __init u5500_uart_init(struct device *parent)
 {
-        db5500_add_uart0(NULL);
-        db5500_add_uart1(NULL);
-        db5500_add_uart2(NULL);
+        db5500_add_uart0(parent, NULL);
+        db5500_add_uart1(parent, NULL);
+        db5500_add_uart2(parent, NULL);
 }
 
 static void __init u5500_init_machine(void)
 {
-        u5500_init_devices();
+        struct device *parent = NULL;
+        int i;
+
+        parent = u5500_init_devices();
         nmk_config_pins(u5500_pins, ARRAY_SIZE(u5500_pins));
-        u5500_i2c_init();
-        u5500_sdi_init();
-        u5500_uart_init();
+
+        u5500_i2c_init(parent);
+        u5500_sdi_init(parent);
+        u5500_uart_init(parent);
+
+        for (i = 0; i < ARRAY_SIZE(u5500_platform_devices); i++)
+                u5500_platform_devices[i]->dev.parent = parent;
 
         platform_add_devices(u5500_platform_devices,
                 ARRAY_SIZE(u5500_platform_devices));
diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c
index da5569d83d58..77a75ed0df67 100644
--- a/arch/arm/mach-ux500/cache-l2x0.c
+++ b/arch/arm/mach-ux500/cache-l2x0.c
@@ -5,6 +5,8 @@
  */
 
 #include <linux/io.h>
+#include <linux/of.h>
+
 #include <asm/cacheflush.h>
 #include <asm/hardware/cache-l2x0.h>
 #include <mach/hardware.h>
@@ -45,7 +47,10 @@ static int __init ux500_l2x0_init(void)
         ux500_l2x0_unlock();
 
         /* 64KB way size, 8 way associativity, force WA */
-        l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
+        if (of_have_populated_dt())
+                l2x0_of_init(0x3e060000, 0xc0000fff);
+        else
+                l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
 
         /*
          * We can't disable l2 as we are in non secure mode, currently
diff --git a/arch/arm/mach-ux500/cpu-db5500.c b/arch/arm/mach-ux500/cpu-db5500.c
index 18aa5c05c69e..bca47f32082f 100644
--- a/arch/arm/mach-ux500/cpu-db5500.c
+++ b/arch/arm/mach-ux500/cpu-db5500.c
@@ -147,13 +147,13 @@ static resource_size_t __initdata db5500_gpio_base[] = {
         U5500_GPIOBANK7_BASE,
 };
 
-static void __init db5500_add_gpios(void)
+static void __init db5500_add_gpios(struct device *parent)
 {
         struct nmk_gpio_platform_data pdata = {
                 /* No custom data yet */
         };
 
-        dbx500_add_gpios(ARRAY_AND_SIZE(db5500_gpio_base),
+        dbx500_add_gpios(parent, ARRAY_AND_SIZE(db5500_gpio_base),
                          IRQ_DB5500_GPIO0, &pdata);
 }
 
@@ -212,14 +212,36 @@ static int usb_db5500_tx_dma_cfg[] = {
         DB5500_DMA_DEV38_USB_OTG_OEP_8
 };
 
-void __init u5500_init_devices(void)
+static const char *db5500_read_soc_id(void)
 {
-        db5500_add_gpios();
+        return kasprintf(GFP_KERNEL, "u5500 currently unsupported\n");
+}
+
+static struct device * __init db5500_soc_device_init(void)
+{
+        const char *soc_id = db5500_read_soc_id();
+
+        return ux500_soc_device_init(soc_id);
+}
+
+struct device * __init u5500_init_devices(void)
+{
+        struct device *parent;
+        int i;
+
+        parent = db5500_soc_device_init();
+
+        db5500_add_gpios(parent);
         db5500_pmu_init();
-        db5500_dma_init();
-        db5500_add_rtc();
-        db5500_add_usb(usb_db5500_rx_dma_cfg, usb_db5500_tx_dma_cfg);
+        db5500_dma_init(parent);
+        db5500_add_rtc(parent);
+        db5500_add_usb(parent, usb_db5500_rx_dma_cfg, usb_db5500_tx_dma_cfg);
+
+        for (i = 0; i < ARRAY_SIZE(db5500_platform_devs); i++)
+                db5500_platform_devs[i]->dev.parent = parent;
 
         platform_add_devices(db5500_platform_devs,
                              ARRAY_SIZE(db5500_platform_devs));
+
+        return parent;
 }
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 7176ee7491ab..9bd8163896cf 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -24,6 +24,7 @@
 #include <mach/setup.h>
 #include <mach/devices.h>
 #include <mach/usb.h>
+#include <mach/db8500-regs.h>
 
 #include "devices-db8500.h"
 #include "ste-dma40-db8500.h"
@@ -132,13 +133,13 @@ static resource_size_t __initdata db8500_gpio_base[] = {
         U8500_GPIOBANK8_BASE,
 };
 
-static void __init db8500_add_gpios(void)
+static void __init db8500_add_gpios(struct device *parent)
 {
         struct nmk_gpio_platform_data pdata = {
                 .supports_sleepmode = true,
         };
 
-        dbx500_add_gpios(ARRAY_AND_SIZE(db8500_gpio_base),
+        dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base),
                          IRQ_DB8500_GPIO0, &pdata);
 }
 
@@ -164,17 +165,44 @@ static int usb_db8500_tx_dma_cfg[] = {
         DB8500_DMA_DEV39_USB_OTG_OEP_8
 };
 
+static const char *db8500_read_soc_id(void)
+{
+        void __iomem *uid = __io_address(U8500_BB_UID_BASE);
+
+        return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
+                         readl((u32 *)uid+1),
+                         readl((u32 *)uid+1), readl((u32 *)uid+2),
+                         readl((u32 *)uid+3), readl((u32 *)uid+4));
+}
+
+static struct device * __init db8500_soc_device_init(void)
+{
+        const char *soc_id = db8500_read_soc_id();
+
+        return ux500_soc_device_init(soc_id);
+}
+
 /*
  * This function is called from the board init
  */
-void __init u8500_init_devices(void)
+struct device * __init u8500_init_devices(void)
 {
-        db8500_add_rtc();
-        db8500_add_gpios();
-        db8500_add_usb(usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
+        struct device *parent;
+        int i;
+
+        parent = db8500_soc_device_init();
+
+        db8500_add_rtc(parent);
+        db8500_add_gpios(parent);
+        db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
+
+        platform_device_register_data(parent,
+                "cpufreq-u8500", -1, NULL, 0);
+
+        for (i = 0; i < ARRAY_SIZE(platform_devs); i++)
+                platform_devs[i]->dev.parent = parent;
 
-        platform_device_register_simple("cpufreq-u8500", -1, NULL, 0);
         platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
 
-        return ;
+        return parent;
 }
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index 851308bf6424..d11f3892a27d 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -2,6 +2,7 @@
  * Copyright (C) ST-Ericsson SA 2010
  *
  * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
+ * Author: Lee Jones <lee.jones@linaro.org> for ST-Ericsson
  * License terms: GNU General Public License (GPL) version 2
  */
 
@@ -11,6 +12,12 @@
 #include <linux/mfd/db8500-prcmu.h>
 #include <linux/mfd/db5500-prcmu.h>
 #include <linux/clksrc-dbx500-prcmu.h>
+#include <linux/sys_soc.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/stat.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
 
 #include <asm/hardware/gic.h>
 #include <asm/mach/map.h>
@@ -23,6 +30,11 @@
 
 void __iomem *_PRCMU_BASE;
 
+static const struct of_device_id ux500_dt_irq_match[] = {
+        { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
+        {},
+};
+
 void __init ux500_init_irq(void)
 {
         void __iomem *dist_base;
@@ -37,7 +49,12 @@ void __init ux500_init_irq(void)
         } else
                 ux500_unknown_soc();
 
-        gic_init(0, 29, dist_base, cpu_base);
+#ifdef CONFIG_OF
+        if (of_have_populated_dt())
+                of_irq_init(ux500_dt_irq_match);
+        else
+#endif
+                gic_init(0, 29, dist_base, cpu_base);
 
         /*
          * Init clocks here so that they are available for system timer
@@ -49,3 +66,73 @@ void __init ux500_init_irq(void)
                 db8500_prcmu_early_init();
         clk_init();
 }
+
+static const char * __init ux500_get_machine(void)
+{
+        return kasprintf(GFP_KERNEL, "DB%4x", dbx500_partnumber());
+}
+
+static const char * __init ux500_get_family(void)
+{
+        return kasprintf(GFP_KERNEL, "ux500");
+}
+
+static const char * __init ux500_get_revision(void)
+{
+        unsigned int rev = dbx500_revision();
+
+        if (rev == 0x01)
+                return kasprintf(GFP_KERNEL, "%s", "ED");
+        else if (rev >= 0xA0)
+                return kasprintf(GFP_KERNEL, "%d.%d",
+                                 (rev >> 4) - 0xA + 1, rev & 0xf);
+
+        return kasprintf(GFP_KERNEL, "%s", "Unknown");
+}
+
+static ssize_t ux500_get_process(struct device *dev,
+                                        struct device_attribute *attr,
+                                        char *buf)
+{
+        if (dbx500_id.process == 0x00)
+                return sprintf(buf, "Standard\n");
+
+        return sprintf(buf, "%02xnm\n", dbx500_id.process);
+}
+
+static void __init soc_info_populate(struct soc_device_attribute *soc_dev_attr,
+                                     const char *soc_id)
+{
+        soc_dev_attr->soc_id   = soc_id;
+        soc_dev_attr->machine  = ux500_get_machine();
+        soc_dev_attr->family   = ux500_get_family();
+        soc_dev_attr->revision = ux500_get_revision();
+}
+
+struct device_attribute ux500_soc_attr =
+        __ATTR(process,  S_IRUGO, ux500_get_process,  NULL);
+
+struct device * __init ux500_soc_device_init(const char *soc_id)
+{
+        struct device *parent;
+        struct soc_device *soc_dev;
+        struct soc_device_attribute *soc_dev_attr;
+
+        soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+        if (!soc_dev_attr)
+                return ERR_PTR(-ENOMEM);
+
+        soc_info_populate(soc_dev_attr, soc_id);
+
+        soc_dev = soc_device_register(soc_dev_attr);
+        if (IS_ERR_OR_NULL(soc_dev)) {
+                kfree(soc_dev_attr);
+                return NULL;
+        }
+
+        parent = soc_device_to_device(soc_dev);
+        if (!IS_ERR_OR_NULL(parent))
+                device_create_file(parent, &ux500_soc_attr);
+
+        return parent;
+}
diff --git a/arch/arm/mach-ux500/devices-common.c b/arch/arm/mach-ux500/devices-common.c
index 898a64517b09..c5312a4b49f5 100644
--- a/arch/arm/mach-ux500/devices-common.c
+++ b/arch/arm/mach-ux500/devices-common.c
@@ -20,8 +20,9 @@
 #include "devices-common.h"
 
 struct amba_device *
-dbx500_add_amba_device(const char *name, resource_size_t base,
-                       int irq, void *pdata, unsigned int periphid)
+dbx500_add_amba_device(struct device *parent, const char *name,
+                       resource_size_t base, int irq, void *pdata,
+                       unsigned int periphid)
 {
         struct amba_device *dev;
         int ret;
@@ -39,6 +40,8 @@ dbx500_add_amba_device(const char *name, resource_size_t base,
 
         dev->dev.platform_data = pdata;
 
+        dev->dev.parent = parent;
+
         ret = amba_device_add(dev, &iomem_resource);
         if (ret) {
                 amba_device_put(dev);
@@ -49,60 +52,7 @@ dbx500_add_amba_device(const char *name, resource_size_t base,
 }
 
 static struct platform_device *
-dbx500_add_platform_device(const char *name, int id, void *pdata,
-                           struct resource *res, int resnum)
-{
-        struct platform_device *dev;
-        int ret;
-
-        dev = platform_device_alloc(name, id);
-        if (!dev)
-                return ERR_PTR(-ENOMEM);
-
-        dev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
-        dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
-
-        ret = platform_device_add_resources(dev, res, resnum);
-        if (ret)
-                goto out_free;
-
-        dev->dev.platform_data = pdata;
-
-        ret = platform_device_add(dev);
-        if (ret)
-                goto out_free;
-
-        return dev;
-
-out_free:
-        platform_device_put(dev);
-        return ERR_PTR(ret);
-}
-
-struct platform_device *
-dbx500_add_platform_device_4k1irq(const char *name, int id,
-                                  resource_size_t base,
-                                  int irq, void *pdata)
-{
-        struct resource resources[] = {
-                [0] = {
-                        .start  = base,
-                        .end    = base + SZ_4K - 1,
-                        .flags  = IORESOURCE_MEM,
-                },
-                [1] = {
-                        .start  = irq,
-                        .end    = irq,
-                        .flags  = IORESOURCE_IRQ,
-                }
-        };
-
-        return dbx500_add_platform_device(name, id, pdata, resources,
-                                          ARRAY_SIZE(resources));
-}
-
-static struct platform_device *
-dbx500_add_gpio(int id, resource_size_t addr, int irq,
+dbx500_add_gpio(struct device *parent, int id, resource_size_t addr, int irq,
                 struct nmk_gpio_platform_data *pdata)
 {
         struct resource resources[] = {
@@ -118,13 +68,18 @@ dbx500_add_gpio(int id, resource_size_t addr, int irq,
                 }
         };
 
-        return platform_device_register_resndata(NULL, "gpio", id,
-                                resources, ARRAY_SIZE(resources),
-                                pdata, sizeof(*pdata));
+        return platform_device_register_resndata(
+                parent,
+                "gpio",
+                id,
+                resources,
+                ARRAY_SIZE(resources),
+                pdata,
+                sizeof(*pdata));
 }
 
-void dbx500_add_gpios(resource_size_t *base, int num, int irq,
-                      struct nmk_gpio_platform_data *pdata)
+void dbx500_add_gpios(struct device *parent, resource_size_t *base, int num,
+                      int irq, struct nmk_gpio_platform_data *pdata)
 {
         int first = 0;
         int i;
@@ -134,6 +89,6 @@ void dbx500_add_gpios(resource_size_t *base, int num, int irq,
                 pdata->first_irq = NOMADIK_GPIO_TO_IRQ(first);
                 pdata->num_gpio = 32;
 
-                dbx500_add_gpio(i, base[i], irq, pdata);
+                dbx500_add_gpio(parent, i, base[i], irq, pdata);
         }
 }
diff --git a/arch/arm/mach-ux500/devices-common.h b/arch/arm/mach-ux500/devices-common.h
index 7825705033bf..39c74ec82add 100644
--- a/arch/arm/mach-ux500/devices-common.h
+++ b/arch/arm/mach-ux500/devices-common.h
@@ -8,80 +8,89 @@
 #ifndef __DEVICES_COMMON_H
 #define __DEVICES_COMMON_H
 
-extern struct amba_device *
-dbx500_add_amba_device(const char *name, resource_size_t base,
-                       int irq, void *pdata, unsigned int periphid);
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/sys_soc.h>
+#include <plat/i2c.h>
 
-extern struct platform_device *
-dbx500_add_platform_device_4k1irq(const char *name, int id,
-                                  resource_size_t base,
-                                  int irq, void *pdata);
+extern struct amba_device *
+dbx500_add_amba_device(struct device *parent, const char *name,
+                       resource_size_t base, int irq, void *pdata,
+                       unsigned int periphid);
 
 struct spi_master_cntlr;
 
 static inline struct amba_device *
-dbx500_add_msp_spi(const char *name, resource_size_t base, int irq,
+dbx500_add_msp_spi(struct device *parent, const char *name,
+                   resource_size_t base, int irq,
                    struct spi_master_cntlr *pdata)
 {
-        return dbx500_add_amba_device(name, base, irq, pdata, 0);
+        return dbx500_add_amba_device(parent, name, base, irq,
+                                      pdata, 0);
 }
 
 static inline struct amba_device *
-dbx500_add_spi(const char *name, resource_size_t base, int irq,
-               struct spi_master_cntlr *pdata,
+dbx500_add_spi(struct device *parent, const char *name, resource_size_t base,
+               int irq, struct spi_master_cntlr *pdata,
                u32 periphid)
 {
-        return dbx500_add_amba_device(name, base, irq, pdata, periphid);
+        return dbx500_add_amba_device(parent, name, base, irq,
+                                      pdata, periphid);
 }
 
 struct mmci_platform_data;
 
 static inline struct amba_device *
-dbx500_add_sdi(const char *name, resource_size_t base, int irq,
-               struct mmci_platform_data *pdata,
-               u32 periphid)
+dbx500_add_sdi(struct device *parent, const char *name, resource_size_t base,
+               int irq, struct mmci_platform_data *pdata, u32 periphid)
 {
-        return dbx500_add_amba_device(name, base, irq, pdata, periphid);
+        return dbx500_add_amba_device(parent, name, base, irq,
+                                      pdata, periphid);
 }
 
 struct amba_pl011_data;
 
 static inline struct amba_device *
-dbx500_add_uart(const char *name, resource_size_t base, int irq,
-                struct amba_pl011_data *pdata)
+dbx500_add_uart(struct device *parent, const char *name, resource_size_t base,
+                int irq, struct amba_pl011_data *pdata)
 {
-        return dbx500_add_amba_device(name, base, irq, pdata, 0);
+        return dbx500_add_amba_device(parent, name, base, irq, pdata, 0);
 }
 
 struct nmk_i2c_controller;
 
 static inline struct platform_device *
-dbx500_add_i2c(int id, resource_size_t base, int irq,
-               struct nmk_i2c_controller *pdata)
-{
-        return dbx500_add_platform_device_4k1irq("nmk-i2c", id, base, irq,
-                                                 pdata);
-}
-
-struct msp_i2s_platform_data;
-
-static inline struct platform_device *
-dbx500_add_msp_i2s(int id, resource_size_t base, int irq,
-                   struct msp_i2s_platform_data *pdata)
+dbx500_add_i2c(struct device *parent, int id, resource_size_t base, int irq,
+               struct nmk_i2c_controller *data)
 {
-        return dbx500_add_platform_device_4k1irq("MSP_I2S", id, base, irq,
-                                                 pdata);
+        struct resource res[] = {
+                DEFINE_RES_MEM(base, SZ_4K),
+                DEFINE_RES_IRQ(irq),
+        };
+
+        struct platform_device_info pdevinfo = {
+                .parent = parent,
+                .name = "nmk-i2c",
+                .id = id,
+                .res = res,
+                .num_res = ARRAY_SIZE(res),
+                .data = data,
+                .size_data = sizeof(*data),
+                .dma_mask = DMA_BIT_MASK(32),
+        };
+
+        return platform_device_register_full(&pdevinfo);
 }
 
 static inline struct amba_device *
-dbx500_add_rtc(resource_size_t base, int irq)
+dbx500_add_rtc(struct device *parent, resource_size_t base, int irq)
 {
-        return dbx500_add_amba_device("rtc-pl031", base, irq, NULL, 0);
+        return dbx500_add_amba_device(parent, "rtc-pl031", base, irq, NULL, 0);
 }
 
 struct nmk_gpio_platform_data;
 
-void dbx500_add_gpios(resource_size_t *base, int num, int irq,
-                      struct nmk_gpio_platform_data *pdata);
+void dbx500_add_gpios(struct device *parent, resource_size_t *base, int num,
+                      int irq, struct nmk_gpio_platform_data *pdata);
 
 #endif
diff --git a/arch/arm/mach-ux500/devices-db5500.h b/arch/arm/mach-ux500/devices-db5500.h
index 0c4bccd02b90..e70955502c35 100644
--- a/arch/arm/mach-ux500/devices-db5500.h
+++ b/arch/arm/mach-ux500/devices-db5500.h
@@ -10,70 +10,90 @@
 
 #include "devices-common.h"
 
-#define db5500_add_i2c1(pdata) \
-        dbx500_add_i2c(1, U5500_I2C1_BASE, IRQ_DB5500_I2C1, pdata)
-#define db5500_add_i2c2(pdata) \
-        dbx500_add_i2c(2, U5500_I2C2_BASE, IRQ_DB5500_I2C2, pdata)
-#define db5500_add_i2c3(pdata) \
-        dbx500_add_i2c(3, U5500_I2C3_BASE, IRQ_DB5500_I2C3, pdata)
+#define db5500_add_i2c1(parent, pdata) \
+        dbx500_add_i2c(parent, 1, U5500_I2C1_BASE, IRQ_DB5500_I2C1, pdata)
+#define db5500_add_i2c2(parent, pdata) \
+        dbx500_add_i2c(parent, 2, U5500_I2C2_BASE, IRQ_DB5500_I2C2, pdata)
+#define db5500_add_i2c3(parent, pdata) \
+        dbx500_add_i2c(parent, 3, U5500_I2C3_BASE, IRQ_DB5500_I2C3, pdata)
 
-#define db5500_add_msp0_i2s(pdata) \
-        dbx500_add_msp_i2s(0, U5500_MSP0_BASE, IRQ_DB5500_MSP0, pdata)
-#define db5500_add_msp1_i2s(pdata) \
-        dbx500_add_msp_i2s(1, U5500_MSP1_BASE, IRQ_DB5500_MSP1, pdata)
-#define db5500_add_msp2_i2s(pdata) \
-        dbx500_add_msp_i2s(2, U5500_MSP2_BASE, IRQ_DB5500_MSP2, pdata)
+#define db5500_add_msp0_spi(parent, pdata) \
+        dbx500_add_msp_spi(parent, "msp0", U5500_MSP0_BASE, \
+                           IRQ_DB5500_MSP0, pdata)
+#define db5500_add_msp1_spi(parent, pdata) \
+        dbx500_add_msp_spi(parent, "msp1", U5500_MSP1_BASE, \
+                           IRQ_DB5500_MSP1, pdata)
+#define db5500_add_msp2_spi(parent, pdata) \
+        dbx500_add_msp_spi(parent, "msp2", U5500_MSP2_BASE, \
+                           IRQ_DB5500_MSP2, pdata)
 
-#define db5500_add_msp0_spi(pdata) \
-        dbx500_add_msp_spi("msp0", U5500_MSP0_BASE, IRQ_DB5500_MSP0, pdata)
-#define db5500_add_msp1_spi(pdata) \
-        dbx500_add_msp_spi("msp1", U5500_MSP1_BASE, IRQ_DB5500_MSP1, pdata)
-#define db5500_add_msp2_spi(pdata) \
-        dbx500_add_msp_spi("msp2", U5500_MSP2_BASE, IRQ_DB5500_MSP2, pdata)
+#define db5500_add_msp0_spi(parent, pdata) \
+        dbx500_add_msp_spi(parent, "msp0", U5500_MSP0_BASE, \
+                          IRQ_DB5500_MSP0, pdata)
+#define db5500_add_msp1_spi(parent, pdata) \
+        dbx500_add_msp_spi(parent, "msp1", U5500_MSP1_BASE, \
+                          IRQ_DB5500_MSP1, pdata)
+#define db5500_add_msp2_spi(parent, pdata) \
+        dbx500_add_msp_spi(parent, "msp2", U5500_MSP2_BASE, \
+                          IRQ_DB5500_MSP2, pdata)
 
-#define db5500_add_rtc() \
-        dbx500_add_rtc(U5500_RTC_BASE, IRQ_DB5500_RTC);
+#define db5500_add_rtc(parent) \
+        dbx500_add_rtc(parent, U5500_RTC_BASE, IRQ_DB5500_RTC);
 
-#define db5500_add_usb(rx_cfg, tx_cfg) \
-        ux500_add_usb(U5500_USBOTG_BASE, IRQ_DB5500_USBOTG, rx_cfg, tx_cfg)
+#define db5500_add_usb(parent, rx_cfg, tx_cfg) \
+        ux500_add_usb(parent, U5500_USBOTG_BASE, \
+                      IRQ_DB5500_USBOTG, rx_cfg, tx_cfg)
 
-#define db5500_add_sdi0(pdata) \
-        dbx500_add_sdi("sdi0", U5500_SDI0_BASE, IRQ_DB5500_SDMMC0, pdata, \
+#define db5500_add_sdi0(parent, pdata) \
+        dbx500_add_sdi(parent, "sdi0", U5500_SDI0_BASE, \
+                       IRQ_DB5500_SDMMC0, pdata,        \
                        0x10480180)
-#define db5500_add_sdi1(pdata) \
-        dbx500_add_sdi("sdi1", U5500_SDI1_BASE, IRQ_DB5500_SDMMC1, pdata, \
+#define db5500_add_sdi1(parent, pdata) \
+        dbx500_add_sdi(parent, "sdi1", U5500_SDI1_BASE, \
+                       IRQ_DB5500_SDMMC1, pdata,        \
                        0x10480180)
-#define db5500_add_sdi2(pdata) \
-        dbx500_add_sdi("sdi2", U5500_SDI2_BASE, IRQ_DB5500_SDMMC2, pdata \
+#define db5500_add_sdi2(parent, pdata) \
+        dbx500_add_sdi(parent, "sdi2", U5500_SDI2_BASE, \
+                       IRQ_DB5500_SDMMC2, pdata         \
                        0x10480180)
-#define db5500_add_sdi3(pdata) \
-        dbx500_add_sdi("sdi3", U5500_SDI3_BASE, IRQ_DB5500_SDMMC3, pdata \
+#define db5500_add_sdi3(parent, pdata) \
+        dbx500_add_sdi(parent, "sdi3", U5500_SDI3_BASE, \
+                       IRQ_DB5500_SDMMC3, pdata         \
                        0x10480180)
-#define db5500_add_sdi4(pdata) \
-        dbx500_add_sdi("sdi4", U5500_SDI4_BASE, IRQ_DB5500_SDMMC4, pdata \
+#define db5500_add_sdi4(parent, pdata) \
+        dbx500_add_sdi(parent, "sdi4", U5500_SDI4_BASE, \
+                       IRQ_DB5500_SDMMC4, pdata         \
                        0x10480180)
 
 /* This one has a bad peripheral ID in the U5500 silicon */
-#define db5500_add_spi0(pdata) \
-        dbx500_add_spi("spi0", U5500_SPI0_BASE, IRQ_DB5500_SPI0, pdata, \
+#define db5500_add_spi0(parent, pdata) \
+        dbx500_add_spi(parent, "spi0", U5500_SPI0_BASE, \
+                       IRQ_DB5500_SPI0, pdata,          \
                        0x10080023)
-#define db5500_add_spi1(pdata) \
-        dbx500_add_spi("spi1", U5500_SPI1_BASE, IRQ_DB5500_SPI1, pdata, \
+#define db5500_add_spi1(parent, pdata) \
+        dbx500_add_spi(parent, "spi1", U5500_SPI1_BASE, \
+                       IRQ_DB5500_SPI1, pdata,          \
                        0x10080023)
-#define db5500_add_spi2(pdata) \
-        dbx500_add_spi("spi2", U5500_SPI2_BASE, IRQ_DB5500_SPI2, pdata \
+#define db5500_add_spi2(parent, pdata) \
+        dbx500_add_spi(parent, "spi2", U5500_SPI2_BASE, \
+                       IRQ_DB5500_SPI2, pdata           \
                        0x10080023)
-#define db5500_add_spi3(pdata) \
-        dbx500_add_spi("spi3", U5500_SPI3_BASE, IRQ_DB5500_SPI3, pdata \
+#define db5500_add_spi3(parent, pdata) \
+        dbx500_add_spi(parent, "spi3", U5500_SPI3_BASE, \
+                       IRQ_DB5500_SPI3, pdata           \
                        0x10080023)
 
-#define db5500_add_uart0(plat) \
-        dbx500_add_uart("uart0", U5500_UART0_BASE, IRQ_DB5500_UART0, plat)
-#define db5500_add_uart1(plat) \
-        dbx500_add_uart("uart1", U5500_UART1_BASE, IRQ_DB5500_UART1, plat)
-#define db5500_add_uart2(plat) \
-        dbx500_add_uart("uart2", U5500_UART2_BASE, IRQ_DB5500_UART2, plat)
-#define db5500_add_uart3(plat) \
-        dbx500_add_uart("uart3", U5500_UART3_BASE, IRQ_DB5500_UART3, plat)
+#define db5500_add_uart0(parent, plat) \
+        dbx500_add_uart(parent, "uart0", U5500_UART0_BASE, \
+                        IRQ_DB5500_UART0, plat)
+#define db5500_add_uart1(parent, plat) \
+        dbx500_add_uart(parent, "uart1", U5500_UART1_BASE, \
+                        IRQ_DB5500_UART1, plat)
+#define db5500_add_uart2(parent, plat) \
+        dbx500_add_uart(parent, "uart2", U5500_UART2_BASE, \
+                        IRQ_DB5500_UART2, plat)
+#define db5500_add_uart3(parent, plat) \
+        dbx500_add_uart(parent, "uart3", U5500_UART3_BASE, \
+                        IRQ_DB5500_UART3, plat)
 
 #endif
diff --git a/arch/arm/mach-ux500/devices-db8500.h b/arch/arm/mach-ux500/devices-db8500.h
index cbd4a9ae8109..9fd93e9da529 100644
--- a/arch/arm/mach-ux500/devices-db8500.h
+++ b/arch/arm/mach-ux500/devices-db8500.h
@@ -14,88 +14,114 @@ struct ske_keypad_platform_data;
 struct pl022_ssp_controller;
 
 static inline struct platform_device *
-db8500_add_ske_keypad(struct ske_keypad_platform_data *pdata)
+db8500_add_ske_keypad(struct device *parent,
+                      struct ske_keypad_platform_data *pdata,
+                      size_t size)
 {
-        return dbx500_add_platform_device_4k1irq("nmk-ske-keypad", -1,
-                                                 U8500_SKE_BASE,
-                                                 IRQ_DB8500_KB, pdata);
+        struct resource resources[] = {
+                DEFINE_RES_MEM(U8500_SKE_BASE, SZ_4K),
+                DEFINE_RES_IRQ(IRQ_DB8500_KB),
+        };
+
+        return platform_device_register_resndata(parent, "nmk-ske-keypad", -1,
+                                                 resources, 2, pdata, size);
 }
 
 static inline struct amba_device *
-db8500_add_ssp(const char *name, resource_size_t base, int irq,
-               struct pl022_ssp_controller *pdata)
+db8500_add_ssp(struct device *parent, const char *name, resource_size_t base,
+               int irq, struct pl022_ssp_controller *pdata)
 {
-        return dbx500_add_amba_device(name, base, irq, pdata, 0);
+        return dbx500_add_amba_device(parent, name, base, irq, pdata, 0);
 }
 
 
-#define db8500_add_i2c0(pdata) \
-        dbx500_add_i2c(0, U8500_I2C0_BASE, IRQ_DB8500_I2C0, pdata)
-#define db8500_add_i2c1(pdata) \
-        dbx500_add_i2c(1, U8500_I2C1_BASE, IRQ_DB8500_I2C1, pdata)
-#define db8500_add_i2c2(pdata) \
-        dbx500_add_i2c(2, U8500_I2C2_BASE, IRQ_DB8500_I2C2, pdata)
-#define db8500_add_i2c3(pdata) \
-        dbx500_add_i2c(3, U8500_I2C3_BASE, IRQ_DB8500_I2C3, pdata)
-#define db8500_add_i2c4(pdata) \
-        dbx500_add_i2c(4, U8500_I2C4_BASE, IRQ_DB8500_I2C4, pdata)
-
-#define db8500_add_msp0_i2s(pdata) \
-        dbx500_add_msp_i2s(0, U8500_MSP0_BASE, IRQ_DB8500_MSP0, pdata)
-#define db8500_add_msp1_i2s(pdata) \
-        dbx500_add_msp_i2s(1, U8500_MSP1_BASE, IRQ_DB8500_MSP1, pdata)
-#define db8500_add_msp2_i2s(pdata) \
-        dbx500_add_msp_i2s(2, U8500_MSP2_BASE, IRQ_DB8500_MSP2, pdata)
-#define db8500_add_msp3_i2s(pdata) \
-        dbx500_add_msp_i2s(3, U8500_MSP3_BASE, IRQ_DB8500_MSP1, pdata)
-
-#define db8500_add_msp0_spi(pdata) \
-        dbx500_add_msp_spi("msp0", U8500_MSP0_BASE, IRQ_DB8500_MSP0, pdata)
-#define db8500_add_msp1_spi(pdata) \
-        dbx500_add_msp_spi("msp1", U8500_MSP1_BASE, IRQ_DB8500_MSP1, pdata)
-#define db8500_add_msp2_spi(pdata) \
-        dbx500_add_msp_spi("msp2", U8500_MSP2_BASE, IRQ_DB8500_MSP2, pdata)
-#define db8500_add_msp3_spi(pdata) \
-        dbx500_add_msp_spi("msp3", U8500_MSP3_BASE, IRQ_DB8500_MSP1, pdata)
-
-#define db8500_add_rtc() \
-        dbx500_add_rtc(U8500_RTC_BASE, IRQ_DB8500_RTC);
-
-#define db8500_add_usb(rx_cfg, tx_cfg) \
-        ux500_add_usb(U8500_USBOTG_BASE, IRQ_DB8500_USBOTG, rx_cfg, tx_cfg)
-
-#define db8500_add_sdi0(pdata, pid) \
-        dbx500_add_sdi("sdi0", U8500_SDI0_BASE, IRQ_DB8500_SDMMC0, pdata, pid)
-#define db8500_add_sdi1(pdata, pid) \
-        dbx500_add_sdi("sdi1", U8500_SDI1_BASE, IRQ_DB8500_SDMMC1, pdata, pid)
-#define db8500_add_sdi2(pdata, pid) \
-        dbx500_add_sdi("sdi2", U8500_SDI2_BASE, IRQ_DB8500_SDMMC2, pdata, pid)
-#define db8500_add_sdi3(pdata, pid) \
-        dbx500_add_sdi("sdi3", U8500_SDI3_BASE, IRQ_DB8500_SDMMC3, pdata, pid)
-#define db8500_add_sdi4(pdata, pid) \
-        dbx500_add_sdi("sdi4", U8500_SDI4_BASE, IRQ_DB8500_SDMMC4, pdata, pid)
-#define db8500_add_sdi5(pdata, pid) \
-        dbx500_add_sdi("sdi5", U8500_SDI5_BASE, IRQ_DB8500_SDMMC5, pdata, pid)
-
-#define db8500_add_ssp0(pdata) \
-        db8500_add_ssp("ssp0", U8500_SSP0_BASE, IRQ_DB8500_SSP0, pdata)
-#define db8500_add_ssp1(pdata) \
-        db8500_add_ssp("ssp1", U8500_SSP1_BASE, IRQ_DB8500_SSP1, pdata)
-
-#define db8500_add_spi0(pdata) \
-        dbx500_add_spi("spi0", U8500_SPI0_BASE, IRQ_DB8500_SPI0, pdata, 0)
-#define db8500_add_spi1(pdata) \
-        dbx500_add_spi("spi1", U8500_SPI1_BASE, IRQ_DB8500_SPI1, pdata, 0)
-#define db8500_add_spi2(pdata) \
-        dbx500_add_spi("spi2", U8500_SPI2_BASE, IRQ_DB8500_SPI2, pdata, 0)
-#define db8500_add_spi3(pdata) \
-        dbx500_add_spi("spi3", U8500_SPI3_BASE, IRQ_DB8500_SPI3, pdata, 0)
-
-#define db8500_add_uart0(pdata) \
-        dbx500_add_uart("uart0", U8500_UART0_BASE, IRQ_DB8500_UART0, pdata)
-#define db8500_add_uart1(pdata) \
-        dbx500_add_uart("uart1", U8500_UART1_BASE, IRQ_DB8500_UART1, pdata)
-#define db8500_add_uart2(pdata) \
-        dbx500_add_uart("uart2", U8500_UART2_BASE, IRQ_DB8500_UART2, pdata)
+#define db8500_add_i2c0(parent, pdata) \
+        dbx500_add_i2c(parent, 0, U8500_I2C0_BASE, IRQ_DB8500_I2C0, pdata)
+#define db8500_add_i2c1(parent, pdata) \
+        dbx500_add_i2c(parent, 1, U8500_I2C1_BASE, IRQ_DB8500_I2C1, pdata)
+#define db8500_add_i2c2(parent, pdata) \
+        dbx500_add_i2c(parent, 2, U8500_I2C2_BASE, IRQ_DB8500_I2C2, pdata)
+#define db8500_add_i2c3(parent, pdata) \
+        dbx500_add_i2c(parent, 3, U8500_I2C3_BASE, IRQ_DB8500_I2C3, pdata)
+#define db8500_add_i2c4(parent, pdata) \
+        dbx500_add_i2c(parent, 4, U8500_I2C4_BASE, IRQ_DB8500_I2C4, pdata)
+
+#define db8500_add_msp0_i2s(parent, pdata) \
+        dbx500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0, pdata)
+#define db8500_add_msp1_i2s(parent, pdata) \
+        dbx500_add_msp_i2s(parent, 1, U8500_MSP1_BASE, IRQ_DB8500_MSP1, pdata)
+#define db8500_add_msp2_i2s(parent, pdata) \
+        dbx500_add_msp_i2s(parent, 2, U8500_MSP2_BASE, IRQ_DB8500_MSP2, pdata)
+#define db8500_add_msp3_i2s(parent, pdata) \
+        dbx500_add_msp_i2s(parent, 3, U8500_MSP3_BASE, IRQ_DB8500_MSP1, pdata)
+
+#define db8500_add_msp0_spi(parent, pdata) \
+        dbx500_add_msp_spi(parent, "msp0", U8500_MSP0_BASE, \
+                           IRQ_DB8500_MSP0, pdata)
+#define db8500_add_msp1_spi(parent, pdata) \
+        dbx500_add_msp_spi(parent, "msp1", U8500_MSP1_BASE, \
+                           IRQ_DB8500_MSP1, pdata)
+#define db8500_add_msp2_spi(parent, pdata) \
+        dbx500_add_msp_spi(parent, "msp2", U8500_MSP2_BASE, \
+                           IRQ_DB8500_MSP2, pdata)
+#define db8500_add_msp3_spi(parent, pdata) \
+        dbx500_add_msp_spi(parent, "msp3", U8500_MSP3_BASE, \
+                           IRQ_DB8500_MSP1, pdata)
+
+#define db8500_add_rtc(parent) \
+        dbx500_add_rtc(parent, U8500_RTC_BASE, IRQ_DB8500_RTC);
+
+#define db8500_add_usb(parent, rx_cfg, tx_cfg) \
+        ux500_add_usb(parent, U8500_USBOTG_BASE, \
+                      IRQ_DB8500_USBOTG, rx_cfg, tx_cfg)
+
+#define db8500_add_sdi0(parent, pdata, pid) \
+        dbx500_add_sdi(parent, "sdi0", U8500_SDI0_BASE, \
+                       IRQ_DB8500_SDMMC0, pdata, pid)
+#define db8500_add_sdi1(parent, pdata, pid) \
+        dbx500_add_sdi(parent, "sdi1", U8500_SDI1_BASE, \
+                       IRQ_DB8500_SDMMC1, pdata, pid)
+#define db8500_add_sdi2(parent, pdata, pid) \
+        dbx500_add_sdi(parent, "sdi2", U8500_SDI2_BASE, \
+                       IRQ_DB8500_SDMMC2, pdata, pid)
+#define db8500_add_sdi3(parent, pdata, pid) \
+        dbx500_add_sdi(parent, "sdi3", U8500_SDI3_BASE, \
+                       IRQ_DB8500_SDMMC3, pdata, pid)
+#define db8500_add_sdi4(parent, pdata, pid) \
+        dbx500_add_sdi(parent, "sdi4", U8500_SDI4_BASE, \
+                       IRQ_DB8500_SDMMC4, pdata, pid)
+#define db8500_add_sdi5(parent, pdata, pid) \
+        dbx500_add_sdi(parent, "sdi5", U8500_SDI5_BASE, \
+                       IRQ_DB8500_SDMMC5, pdata, pid)
+
+#define db8500_add_ssp0(parent, pdata) \
+        db8500_add_ssp(parent, "ssp0", U8500_SSP0_BASE, \
+                       IRQ_DB8500_SSP0, pdata)
+#define db8500_add_ssp1(parent, pdata) \
+        db8500_add_ssp(parent, "ssp1", U8500_SSP1_BASE, \
+                       IRQ_DB8500_SSP1, pdata)
+
+#define db8500_add_spi0(parent, pdata) \
+        dbx500_add_spi(parent, "spi0", U8500_SPI0_BASE, \
+                       IRQ_DB8500_SPI0, pdata, 0)
+#define db8500_add_spi1(parent, pdata) \
+        dbx500_add_spi(parent, "spi1", U8500_SPI1_BASE, \
+                       IRQ_DB8500_SPI1, pdata, 0)
+#define db8500_add_spi2(parent, pdata) \
+        dbx500_add_spi(parent, "spi2", U8500_SPI2_BASE, \
+                       IRQ_DB8500_SPI2, pdata, 0)
+#define db8500_add_spi3(parent, pdata) \
+        dbx500_add_spi(parent, "spi3", U8500_SPI3_BASE, \
+                       IRQ_DB8500_SPI3, pdata, 0)
+
+#define db8500_add_uart0(parent, pdata) \
+        dbx500_add_uart(parent, "uart0", U8500_UART0_BASE, \
+                        IRQ_DB8500_UART0, pdata)
+#define db8500_add_uart1(parent, pdata) \
+        dbx500_add_uart(parent, "uart1", U8500_UART1_BASE, \
+                        IRQ_DB8500_UART1, pdata)
+#define db8500_add_uart2(parent, pdata) \
+        dbx500_add_uart(parent, "uart2", U8500_UART2_BASE, \
+                        IRQ_DB8500_UART2, pdata)
 
 #endif
diff --git a/arch/arm/mach-ux500/dma-db5500.c b/arch/arm/mach-ux500/dma-db5500.c
index 1cfab68ae417..41e9470fa0e6 100644
--- a/arch/arm/mach-ux500/dma-db5500.c
+++ b/arch/arm/mach-ux500/dma-db5500.c
@@ -125,10 +125,11 @@ static struct platform_device dma40_device = {
         .resource       = dma40_resources
 };
 
-void __init db5500_dma_init(void)
+void __init db5500_dma_init(struct device *parent)
 {
         int ret;
 
+        dma40_device.dev.parent = parent;
         ret = platform_device_register(&dma40_device);
         if (ret)
                 dev_err(&dma40_device.dev, "unable to register device: %d\n", ret);
diff --git a/arch/arm/mach-ux500/include/mach/db8500-regs.h b/arch/arm/mach-ux500/include/mach/db8500-regs.h
index 80e10f50282e..9ec20b96d8f2 100644
--- a/arch/arm/mach-ux500/include/mach/db8500-regs.h
+++ b/arch/arm/mach-ux500/include/mach/db8500-regs.h
@@ -161,4 +161,7 @@
 #define U8500_MODEM_BASE        0xe000000
 #define U8500_APE_BASE          0x6000000
 
+/* SoC identification number information */
+#define U8500_BB_UID_BASE      (U8500_BACKUPRAM1_BASE + 0xFC0)
+
 #endif
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h
index d93d6dbef25b..f84698936d36 100644
--- a/arch/arm/mach-ux500/include/mach/hardware.h
+++ b/arch/arm/mach-ux500/include/mach/hardware.h
@@ -23,7 +23,7 @@
         (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + U8500_IO_VIRTUAL)
 
 /* typesafe io address */
-#define __io_address(n)         __io(IO_ADDRESS(n))
+#define __io_address(n)         IOMEM(IO_ADDRESS(n))
 /* Used by some plat-nomadik code */
 #define io_p2v(n)               __io_address(n)
 
diff --git a/arch/arm/mach-ux500/include/mach/io.h b/arch/arm/mach-ux500/include/mach/io.h
deleted file mode 100644
index 1cf3f44ce5b2..000000000000
--- a/arch/arm/mach-ux500/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * arch/arm/mach-u8500/include/mach/io.h
- *
- * Copyright (C) 1997-1999 Russell King
- *
- * Modifications:
- *  06-12-1997  RMK     Created.
- *  07-04-1999  RMK     Major cleanup
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We don't actually have real ISA nor PCI buses, but there is so many
- * drivers out there that might just work if we fake them...
- */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h b/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h
index d2d4131435a6..7d34c52798b5 100644
--- a/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h
+++ b/arch/arm/mach-ux500/include/mach/irqs-board-mop500.h
@@ -13,7 +13,7 @@
 
 #define MOP500_AB8500_IRQ_BASE          IRQ_BOARD_START
 #define MOP500_AB8500_IRQ_END           (MOP500_AB8500_IRQ_BASE \
-                                         + AB8500_NR_IRQS)
+                                         + AB8500_MAX_NR_IRQS)
 
 /* TC35892 */
 #define TC35892_NR_INTERNAL_IRQS        8
diff --git a/arch/arm/mach-ux500/include/mach/setup.h b/arch/arm/mach-ux500/include/mach/setup.h
index 93d403955eaa..3dc00ffa7bfa 100644
--- a/arch/arm/mach-ux500/include/mach/setup.h
+++ b/arch/arm/mach-ux500/include/mach/setup.h
@@ -18,14 +18,16 @@ void __init ux500_map_io(void);
 extern void __init u5500_map_io(void);
 extern void __init u8500_map_io(void);
 
-extern void __init u5500_init_devices(void);
-extern void __init u8500_init_devices(void);
+extern struct device * __init u5500_init_devices(void);
+extern struct device * __init u8500_init_devices(void);
 
 extern void __init ux500_init_irq(void);
 
-extern void __init u5500_sdi_init(void);
+extern void __init u5500_sdi_init(struct device *parent);
 
-extern void __init db5500_dma_init(void);
+extern void __init db5500_dma_init(struct device *parent);
+
+extern struct device *ux500_soc_device_init(const char *soc_id);
 
 struct amba_device;
 extern void __init amba_add_devices(struct amba_device *devs[], int num);
diff --git a/arch/arm/mach-ux500/include/mach/usb.h b/arch/arm/mach-ux500/include/mach/usb.h
index d3739d418813..4c1cc50a595a 100644
--- a/arch/arm/mach-ux500/include/mach/usb.h
+++ b/arch/arm/mach-ux500/include/mach/usb.h
@@ -20,6 +20,6 @@ struct ux500_musb_board_data {
         bool (*dma_filter)(struct dma_chan *chan, void *filter_param);
 };
 
-void ux500_add_usb(resource_size_t base, int irq, int *dma_rx_cfg,
-        int *dma_tx_cfg);
+void ux500_add_usb(struct device *parent, resource_size_t base,
+                   int irq, int *dma_rx_cfg, int *dma_tx_cfg);
 #endif
diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c
index e9d580702fbb..d37df98b5c32 100644
--- a/arch/arm/mach-ux500/timer.c
+++ b/arch/arm/mach-ux500/timer.c
@@ -7,6 +7,7 @@
 #include <linux/io.h>
 #include <linux/errno.h>
 #include <linux/clksrc-dbx500-prcmu.h>
+#include <linux/of.h>
 
 #include <asm/smp_twd.h>
 
@@ -30,9 +31,13 @@ static void __init ux500_twd_init(void)
         twd_local_timer = cpu_is_u5500() ? &u5500_twd_local_timer :
                                            &u8500_twd_local_timer;
 
-        err = twd_local_timer_register(twd_local_timer);
-        if (err)
-                pr_err("twd_local_timer_register failed %d\n", err);
+        if (of_have_populated_dt())
+                twd_local_timer_of_register();
+        else {
+                err = twd_local_timer_register(twd_local_timer);
+                if (err)
+                        pr_err("twd_local_timer_register failed %d\n", err);
+        }
 }
 #else
 #define ux500_twd_init()        do { } while(0)
diff --git a/arch/arm/mach-ux500/usb.c b/arch/arm/mach-ux500/usb.c
index 9f9e1c203061..a74af389bc63 100644
--- a/arch/arm/mach-ux500/usb.c
+++ b/arch/arm/mach-ux500/usb.c
@@ -7,6 +7,7 @@
 #include <linux/platform_device.h>
 #include <linux/usb/musb.h>
 #include <linux/dma-mapping.h>
+
 #include <plat/ste_dma40.h>
 #include <mach/hardware.h>
 #include <mach/usb.h>
@@ -140,8 +141,8 @@ static inline void ux500_usb_dma_update_tx_ch_config(int *dst_dev_type)
                 musb_dma_tx_ch[idx].dst_dev_type = dst_dev_type[idx];
 }
 
-void ux500_add_usb(resource_size_t base, int irq, int *dma_rx_cfg,
-        int *dma_tx_cfg)
+void ux500_add_usb(struct device *parent, resource_size_t base, int irq,
+                   int *dma_rx_cfg, int *dma_tx_cfg)
 {
         ux500_musb_device.resource[0].start = base;
         ux500_musb_device.resource[0].end = base + SZ_64K - 1;
@@ -151,5 +152,7 @@ void ux500_add_usb(resource_size_t base, int irq, int *dma_rx_cfg,
         ux500_usb_dma_update_rx_ch_config(dma_rx_cfg);
         ux500_usb_dma_update_tx_ch_config(dma_tx_cfg);
 
+        ux500_musb_device.dev.parent = parent;
+
         platform_device_register(&ux500_musb_device);
 }
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 0968772aedbe..6bbd74e950ab 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -36,7 +36,6 @@
 #include <linux/clkdev.h>
 #include <linux/mtd/physmap.h>
 
-#include <asm/system.h>
 #include <asm/irq.h>
 #include <asm/leds.h>
 #include <asm/hardware/arm_timer.h>
diff --git a/arch/arm/mach-versatile/include/mach/io.h b/arch/arm/mach-versatile/include/mach/io.h
deleted file mode 100644
index f067c14c7182..000000000000
--- a/arch/arm/mach-versatile/include/mach/io.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- *  arch/arm/mach-versatile/include/mach/io.h
- *
- *  Copyright (C) 2003 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c
index 51733b022d04..d2268be8c34c 100644
--- a/arch/arm/mach-versatile/pci.c
+++ b/arch/arm/mach-versatile/pci.c
@@ -24,7 +24,6 @@
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
-#include <asm/system.h>
 #include <asm/mach/pci.h>
 
 /*
@@ -191,7 +190,7 @@ static struct resource pre_mem = {
         .flags  = IORESOURCE_MEM | IORESOURCE_PREFETCH,
 };
 
-static int __init pci_versatile_setup_resources(struct list_head *resources)
+static int __init pci_versatile_setup_resources(struct pci_sys_data *sys)
 {
         int ret = 0;
 
@@ -219,9 +218,9 @@ static int __init pci_versatile_setup_resources(struct list_head *resources)
          * the mem resource for this bus
          * the prefetch mem resource for this bus
          */
-        pci_add_resource_offset(resources, &io_mem, sys->io_offset);
-        pci_add_resource_offset(resources, &non_mem, sys->mem_offset);
-        pci_add_resource_offset(resources, &pre_mem, sys->mem_offset);
+        pci_add_resource_offset(&sys->resources, &io_mem, sys->io_offset);
+        pci_add_resource_offset(&sys->resources, &non_mem, sys->mem_offset);
+        pci_add_resource_offset(&sys->resources, &pre_mem, sys->mem_offset);
 
         goto out;
 
@@ -250,7 +249,7 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys)
 
         if (nr == 0) {
                 sys->mem_offset = 0;
-                ret = pci_versatile_setup_resources(&sys->resources);
+                ret = pci_versatile_setup_resources(sys);
                 if (ret < 0) {
                         printk("pci_versatile_setup: resources... oops?\n");
                         goto out;
diff --git a/arch/arm/mach-vexpress/hotplug.c b/arch/arm/mach-vexpress/hotplug.c
index 3034a4dab4a1..c504a72b94d6 100644
--- a/arch/arm/mach-vexpress/hotplug.c
+++ b/arch/arm/mach-vexpress/hotplug.c
@@ -14,7 +14,7 @@
 
 #include <asm/cacheflush.h>
 #include <asm/smp_plat.h>
-#include <asm/system.h>
+#include <asm/cp15.h>
 
 extern volatile int pen_release;
 
diff --git a/arch/arm/mach-vexpress/include/mach/io.h b/arch/arm/mach-vexpress/include/mach/io.h
deleted file mode 100644
index 13522d86685e..000000000000
--- a/arch/arm/mach-vexpress/include/mach/io.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- *  arch/arm/mach-vexpress/include/mach/io.h
- *
- *  Copyright (C) 2003 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-vt8500/include/mach/io.h b/arch/arm/mach-vt8500/include/mach/io.h
deleted file mode 100644
index 46181eecf273..000000000000
--- a/arch/arm/mach-vt8500/include/mach/io.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- *  arch/arm/mach-vt8500/include/mach/io.h
- *
- *  Copyright (C) 2010 Alexey Charkov
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define __io(a)         __typesafe_io((a) + 0xf0000000)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-w90x900/cpu.c b/arch/arm/mach-w90x900/cpu.c
index 9a0661992909..9e4dd8b63c4a 100644
--- a/arch/arm/mach-w90x900/cpu.c
+++ b/arch/arm/mach-w90x900/cpu.c
@@ -28,6 +28,7 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 #include <asm/irq.h>
+#include <asm/system_misc.h>
 
 #include <mach/hardware.h>
 #include <mach/regs-serial.h>
diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c
index db82568a998a..48f5b9fdfb7f 100644
--- a/arch/arm/mach-w90x900/dev.c
+++ b/arch/arm/mach-w90x900/dev.c
@@ -27,6 +27,7 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
 
+#include <asm/system_misc.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
diff --git a/arch/arm/mach-w90x900/include/mach/io.h b/arch/arm/mach-w90x900/include/mach/io.h
deleted file mode 100644
index d96ab99df05b..000000000000
--- a/arch/arm/mach-w90x900/include/mach/io.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * arch/arm/mach-w90x900/include/mach/io.h
- *
- * Copyright (c) 2008 Nuvoton technology corporation
- * All rights reserved.
- *
- * Wan ZongShun <mcuos.com@gmail.com>
- *
- * Based on arch/arm/mach-s3c2410/include/mach/io.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT  0xffffffff
-
-/*
- * 1:1 mapping for ioremapped regions.
- */
-
-#define __mem_pci(a)    (a)
-#define __io(a)         __typesafe_io(a)
-
-#endif
diff --git a/arch/arm/mach-zynq/include/mach/io.h b/arch/arm/mach-zynq/include/mach/io.h
deleted file mode 100644
index 39d9885e0e9a..000000000000
--- a/arch/arm/mach-zynq/include/mach/io.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* arch/arm/mach-zynq/include/mach/io.h
- *
- *  Copyright (C) 2011 Xilinx
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MACH_IO_H__
-#define __MACH_IO_H__
-
-/* Allow IO space to be anywhere in the memory */
-
-#define IO_SPACE_LIMIT 0xffff
-
-/* IO address mapping macros, nothing special at this time but required */
-
-#ifdef __ASSEMBLER__
-#define IOMEM(x)                (x)
-#else
-#define IOMEM(x)                ((void __force __iomem *)(x))
-#endif
-
-#define __io(a)                 __typesafe_io(a)
-#define __mem_pci(a)            (a)
-
-#endif
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index caf14dc059e5..9107231aacc5 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -22,7 +22,8 @@
 #include <linux/sched.h>
 #include <linux/uaccess.h>
 
-#include <asm/system.h>
+#include <asm/cp15.h>
+#include <asm/system_info.h>
 #include <asm/unaligned.h>
 
 #include "fault.h"
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index e0b0e7a4ec68..dd3d59122cc3 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -15,6 +15,7 @@
 #include <linux/init.h>
 #include <linux/highmem.h>
 #include <asm/cacheflush.h>
+#include <asm/cp15.h>
 #include <plat/cache-feroceon-l2.h>
 
 /*
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index b1e192ba8c24..a53fd2aaa2f4 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -30,13 +30,13 @@
 
 static void __iomem *l2x0_base;
 static DEFINE_RAW_SPINLOCK(l2x0_lock);
-static uint32_t l2x0_way_mask;  /* Bitmask of active ways */
-static uint32_t l2x0_size;
+static u32 l2x0_way_mask;       /* Bitmask of active ways */
+static u32 l2x0_size;
 
 struct l2x0_regs l2x0_saved_regs;
 
 struct l2x0_of_data {
-        void (*setup)(const struct device_node *, __u32 *, __u32 *);
+        void (*setup)(const struct device_node *, u32 *, u32 *);
         void (*save)(void);
         void (*resume)(void);
 };
@@ -288,7 +288,7 @@ static void l2x0_disable(void)
         raw_spin_unlock_irqrestore(&l2x0_lock, flags);
 }
 
-static void l2x0_unlock(__u32 cache_id)
+static void l2x0_unlock(u32 cache_id)
 {
         int lockregs;
         int i;
@@ -307,11 +307,11 @@ static void l2x0_unlock(__u32 cache_id)
         }
 }
 
-void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
+void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
 {
-        __u32 aux;
-        __u32 cache_id;
-        __u32 way_size = 0;
+        u32 aux;
+        u32 cache_id;
+        u32 way_size = 0;
         int ways;
         const char *type;
 
@@ -388,7 +388,7 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
 
 #ifdef CONFIG_OF
 static void __init l2x0_of_setup(const struct device_node *np,
-                                 __u32 *aux_val, __u32 *aux_mask)
+                                 u32 *aux_val, u32 *aux_mask)
 {
         u32 data[2] = { 0, 0 };
         u32 tag = 0;
@@ -422,7 +422,7 @@ static void __init l2x0_of_setup(const struct device_node *np,
 }
 
 static void __init pl310_of_setup(const struct device_node *np,
-                                  __u32 *aux_val, __u32 *aux_mask)
+                                  u32 *aux_val, u32 *aux_mask)
 {
         u32 data[3] = { 0, 0, 0 };
         u32 tag[3] = { 0, 0, 0 };
@@ -548,7 +548,7 @@ static const struct of_device_id l2x0_ids[] __initconst = {
         {}
 };
 
-int __init l2x0_of_init(__u32 aux_val, __u32 aux_mask)
+int __init l2x0_of_init(u32 aux_val, u32 aux_mask)
 {
         struct device_node *np;
         struct l2x0_of_data *data;
diff --git a/arch/arm/mm/cache-tauros2.c b/arch/arm/mm/cache-tauros2.c
index 50868651890f..1fbca05fe906 100644
--- a/arch/arm/mm/cache-tauros2.c
+++ b/arch/arm/mm/cache-tauros2.c
@@ -16,6 +16,7 @@
 
 #include <linux/init.h>
 #include <asm/cacheflush.h>
+#include <asm/cp15.h>
 #include <asm/hardware/cache-tauros2.h>
 
 
diff --git a/arch/arm/mm/cache-xsc3l2.c b/arch/arm/mm/cache-xsc3l2.c
index 5a32020471e3..6c3edeb66e74 100644
--- a/arch/arm/mm/cache-xsc3l2.c
+++ b/arch/arm/mm/cache-xsc3l2.c
@@ -18,7 +18,7 @@
  */
 #include <linux/init.h>
 #include <linux/highmem.h>
-#include <asm/system.h>
+#include <asm/cp15.h>
 #include <asm/cputype.h>
 #include <asm/cacheflush.h>
 
diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c
index ec8c3befb9c8..1267e64133b9 100644
--- a/arch/arm/mm/copypage-v4mc.c
+++ b/arch/arm/mm/copypage-v4mc.c
@@ -23,10 +23,6 @@
 
 #include "mm.h"
 
-/*
- * 0xffff8000 to 0xffffffff is reserved for any ARM architecture
- * specific hacks for copying pages efficiently.
- */
 #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
                                   L_PTE_MT_MINICACHE)
 
@@ -78,10 +74,9 @@ void v4_mc_copy_user_highpage(struct page *to, struct page *from,
 
         raw_spin_lock(&minicache_lock);
 
-        set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
-        flush_tlb_kernel_page(0xffff8000);
+        set_top_pte(COPYPAGE_MINICACHE, mk_pte(from, minicache_pgprot));
 
-        mc_copy_user_page((void *)0xffff8000, kto);
+        mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto);
 
         raw_spin_unlock(&minicache_lock);
 
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c
index 8b03a5814d00..b9bcc9d79176 100644
--- a/arch/arm/mm/copypage-v6.c
+++ b/arch/arm/mm/copypage-v6.c
@@ -24,9 +24,6 @@
 #error FIX ME
 #endif
 
-#define from_address    (0xffff8000)
-#define to_address      (0xffffc000)
-
 static DEFINE_RAW_SPINLOCK(v6_lock);
 
 /*
@@ -90,14 +87,11 @@ static void v6_copy_user_highpage_aliasing(struct page *to,
          */
         raw_spin_lock(&v6_lock);
 
-        set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(page_to_pfn(from), PAGE_KERNEL), 0);
-        set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(to), PAGE_KERNEL), 0);
-
-        kfrom = from_address + (offset << PAGE_SHIFT);
-        kto   = to_address + (offset << PAGE_SHIFT);
+        kfrom = COPYPAGE_V6_FROM + (offset << PAGE_SHIFT);
+        kto   = COPYPAGE_V6_TO + (offset << PAGE_SHIFT);
 
-        flush_tlb_kernel_page(kfrom);
-        flush_tlb_kernel_page(kto);
+        set_top_pte(kfrom, mk_pte(from, PAGE_KERNEL));
+        set_top_pte(kto, mk_pte(to, PAGE_KERNEL));
 
         copy_page((void *)kto, (void *)kfrom);
 
@@ -111,8 +105,7 @@ static void v6_copy_user_highpage_aliasing(struct page *to,
  */
 static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vaddr)
 {
-        unsigned int offset = CACHE_COLOUR(vaddr);
-        unsigned long to = to_address + (offset << PAGE_SHIFT);
+        unsigned long to = COPYPAGE_V6_TO + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
 
         /* FIXME: not highmem safe */
         discard_old_kernel_data(page_address(page));
@@ -123,8 +116,7 @@ static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vad
          */
         raw_spin_lock(&v6_lock);
 
-        set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(page), PAGE_KERNEL), 0);
-        flush_tlb_kernel_page(to);
+        set_top_pte(to, mk_pte(page, PAGE_KERNEL));
         clear_page((void *)to);
 
         raw_spin_unlock(&v6_lock);
diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c
index 439d106ae638..0fb85025344d 100644
--- a/arch/arm/mm/copypage-xscale.c
+++ b/arch/arm/mm/copypage-xscale.c
@@ -23,12 +23,6 @@
 
 #include "mm.h"
 
-/*
- * 0xffff8000 to 0xffffffff is reserved for any ARM architecture
- * specific hacks for copying pages efficiently.
- */
-#define COPYPAGE_MINICACHE      0xffff8000
-
 #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
                                   L_PTE_MT_MINICACHE)
 
@@ -100,8 +94,7 @@ void xscale_mc_copy_user_highpage(struct page *to, struct page *from,
 
         raw_spin_lock(&minicache_lock);
 
-        set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
-        flush_tlb_kernel_page(COPYPAGE_MINICACHE);
+        set_top_pte(COPYPAGE_MINICACHE, mk_pte(from, minicache_pgprot));
 
         mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto);
 
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 1aa664a1999f..db23ae4aaaab 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -214,7 +214,8 @@ static int __init consistent_init(void)
 core_initcall(consistent_init);
 
 static void *
-__dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot)
+__dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
+        const void *caller)
 {
         struct arm_vmregion *c;
         size_t align;
@@ -241,7 +242,7 @@ __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot)
          * Allocate a virtual address in the consistent mapping region.
          */
         c = arm_vmregion_alloc(&consistent_head, align, size,
-                            gfp & ~(__GFP_DMA | __GFP_HIGHMEM));
+                            gfp & ~(__GFP_DMA | __GFP_HIGHMEM), caller);
         if (c) {
                 pte_t *pte;
                 int idx = CONSISTENT_PTE_INDEX(c->vm_start);
@@ -320,14 +321,14 @@ static void __dma_free_remap(void *cpu_addr, size_t size)
 
 #else   /* !CONFIG_MMU */
 
-#define __dma_alloc_remap(page, size, gfp, prot)        page_address(page)
+#define __dma_alloc_remap(page, size, gfp, prot, c)     page_address(page)
 #define __dma_free_remap(addr, size)                    do { } while (0)
 
 #endif  /* CONFIG_MMU */
 
 static void *
 __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
-            pgprot_t prot)
+            pgprot_t prot, const void *caller)
 {
         struct page *page;
         void *addr;
@@ -349,7 +350,7 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
                 return NULL;
 
         if (!arch_is_coherent())
-                addr = __dma_alloc_remap(page, size, gfp, prot);
+                addr = __dma_alloc_remap(page, size, gfp, prot, caller);
         else
                 addr = page_address(page);
 
@@ -374,7 +375,8 @@ dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gf
                 return memory;
 
         return __dma_alloc(dev, size, handle, gfp,
-                           pgprot_dmacoherent(pgprot_kernel));
+                           pgprot_dmacoherent(pgprot_kernel),
+                           __builtin_return_address(0));
 }
 EXPORT_SYMBOL(dma_alloc_coherent);
 
@@ -386,7 +388,8 @@ void *
 dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
 {
         return __dma_alloc(dev, size, handle, gfp,
-                           pgprot_writecombine(pgprot_kernel));
+                           pgprot_writecombine(pgprot_kernel),
+                           __builtin_return_address(0));
 }
 EXPORT_SYMBOL(dma_alloc_writecombine);
 
@@ -723,6 +726,9 @@ EXPORT_SYMBOL(dma_set_mask);
 
 static int __init dma_debug_do_init(void)
 {
+#ifdef CONFIG_MMU
+        arm_vmregion_create_proc("dma-mappings", &consistent_head);
+#endif
         dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
         return 0;
 }
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index bb7eac381a8e..9055b5a84ec5 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -21,8 +21,9 @@
 #include <linux/perf_event.h>
 
 #include <asm/exception.h>
-#include <asm/system.h>
 #include <asm/pgtable.h>
+#include <asm/system_misc.h>
+#include <asm/system_info.h>
 #include <asm/tlbflush.h>
 
 #include "fault.h"
@@ -164,7 +165,8 @@ __do_user_fault(struct task_struct *tsk, unsigned long addr,
         struct siginfo si;
 
 #ifdef CONFIG_DEBUG_USER
-        if (user_debug & UDBG_SEGV) {
+        if (((user_debug & UDBG_SEGV) && (sig == SIGSEGV)) ||
+            ((user_debug & UDBG_BUS)  && (sig == SIGBUS))) {
                 printk(KERN_DEBUG "%s: unhandled page fault (%d) at 0x%08lx, code 0x%03x\n",
                        tsk->comm, sig, addr, fsr);
                 show_pte(tsk->mm, addr);
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 1a8d4aa821be..77458548e031 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -16,22 +16,18 @@
 #include <asm/cachetype.h>
 #include <asm/highmem.h>
 #include <asm/smp_plat.h>
-#include <asm/system.h>
 #include <asm/tlbflush.h>
 
 #include "mm.h"
 
 #ifdef CONFIG_CPU_CACHE_VIPT
 
-#define ALIAS_FLUSH_START       0xffff4000
-
 static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
 {
-        unsigned long to = ALIAS_FLUSH_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
+        unsigned long to = FLUSH_ALIAS_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
         const int zero = 0;
 
-        set_pte_ext(TOP_PTE(to), pfn_pte(pfn, PAGE_KERNEL), 0);
-        flush_tlb_kernel_page(to);
+        set_top_pte(to, pfn_pte(pfn, PAGE_KERNEL));
 
         asm(    "mcrr   p15, 0, %1, %0, c14\n"
         "       mcr     p15, 0, %2, c7, c10, 4"
@@ -42,13 +38,12 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
 
 static void flush_icache_alias(unsigned long pfn, unsigned long vaddr, unsigned long len)
 {
-        unsigned long colour = CACHE_COLOUR(vaddr);
+        unsigned long va = FLUSH_ALIAS_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
         unsigned long offset = vaddr & (PAGE_SIZE - 1);
         unsigned long to;
 
-        set_pte_ext(TOP_PTE(ALIAS_FLUSH_START) + colour, pfn_pte(pfn, PAGE_KERNEL), 0);
-        to = ALIAS_FLUSH_START + (colour << PAGE_SHIFT) + offset;
-        flush_tlb_kernel_page(to);
+        set_top_pte(va, pfn_pte(pfn, PAGE_KERNEL));
+        to = va + offset;
         flush_icache_range(to, to + len);
 }
 
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c
index 5a21505d7550..21b9e1bf9b77 100644
--- a/arch/arm/mm/highmem.c
+++ b/arch/arm/mm/highmem.c
@@ -69,15 +69,14 @@ void *kmap_atomic(struct page *page)
          * With debugging enabled, kunmap_atomic forces that entry to 0.
          * Make sure it was indeed properly unmapped.
          */
-        BUG_ON(!pte_none(*(TOP_PTE(vaddr))));
+        BUG_ON(!pte_none(get_top_pte(vaddr)));
 #endif
-        set_pte_ext(TOP_PTE(vaddr), mk_pte(page, kmap_prot), 0);
         /*
          * When debugging is off, kunmap_atomic leaves the previous mapping
-         * in place, so this TLB flush ensures the TLB is updated with the
-         * new mapping.
+         * in place, so the contained TLB flush ensures the TLB is updated
+         * with the new mapping.
          */
-        local_flush_tlb_kernel_page(vaddr);
+        set_top_pte(vaddr, mk_pte(page, kmap_prot));
 
         return (void *)vaddr;
 }
@@ -96,8 +95,7 @@ void __kunmap_atomic(void *kvaddr)
                         __cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE);
 #ifdef CONFIG_DEBUG_HIGHMEM
                 BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
-                set_pte_ext(TOP_PTE(vaddr), __pte(0), 0);
-                local_flush_tlb_kernel_page(vaddr);
+                set_top_pte(vaddr, __pte(0));
 #else
                 (void) idx;  /* to kill a warning */
 #endif
@@ -121,10 +119,9 @@ void *kmap_atomic_pfn(unsigned long pfn)
         idx = type + KM_TYPE_NR * smp_processor_id();
         vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
 #ifdef CONFIG_DEBUG_HIGHMEM
-        BUG_ON(!pte_none(*(TOP_PTE(vaddr))));
+        BUG_ON(!pte_none(get_top_pte(vaddr)));
 #endif
-        set_pte_ext(TOP_PTE(vaddr), pfn_pte(pfn, kmap_prot), 0);
-        local_flush_tlb_kernel_page(vaddr);
+        set_top_pte(vaddr, pfn_pte(pfn, kmap_prot));
 
         return (void *)vaddr;
 }
@@ -132,11 +129,9 @@ void *kmap_atomic_pfn(unsigned long pfn)
 struct page *kmap_atomic_to_page(const void *ptr)
 {
         unsigned long vaddr = (unsigned long)ptr;
-        pte_t *pte;
 
         if (vaddr < FIXADDR_START)
                 return virt_to_page(ptr);
 
-        pte = TOP_PTE(vaddr);
-        return pte_page(*pte);
+        return pte_page(get_top_pte(vaddr));
 }
diff --git a/arch/arm/mm/idmap.c b/arch/arm/mm/idmap.c
index feacf4c76712..ab88ed4f8e08 100644
--- a/arch/arm/mm/idmap.c
+++ b/arch/arm/mm/idmap.c
@@ -5,6 +5,7 @@
 #include <asm/pgalloc.h>
 #include <asm/pgtable.h>
 #include <asm/sections.h>
+#include <asm/system_info.h>
 
 pgd_t *idmap_pgd;
 
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 245a55a0a5bb..595079fa9d1d 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -658,7 +658,9 @@ void __init mem_init(void)
 #ifdef CONFIG_HIGHMEM
                         "    pkmap   : 0x%08lx - 0x%08lx   (%4ld MB)\n"
 #endif
+#ifdef CONFIG_MODULES
                         "    modules : 0x%08lx - 0x%08lx   (%4ld MB)\n"
+#endif
                         "      .text : 0x%p" " - 0x%p" "   (%4d kB)\n"
                         "      .init : 0x%p" " - 0x%p" "   (%4d kB)\n"
                         "      .data : 0x%p" " - 0x%p" "   (%4d kB)\n"
@@ -677,7 +679,9 @@ void __init mem_init(void)
                         MLM(PKMAP_BASE, (PKMAP_BASE) + (LAST_PKMAP) *
                                 (PAGE_SIZE)),
 #endif
+#ifdef CONFIG_MODULES
                         MLM(MODULES_VADDR, MODULES_END),
+#endif
 
                         MLK_ROUNDUP(_text, _etext),
                         MLK_ROUNDUP(__init_begin, __init_end),
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 80632e8d7538..4f55f5062ab7 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -26,12 +26,14 @@
 #include <linux/vmalloc.h>
 #include <linux/io.h>
 
+#include <asm/cp15.h>
 #include <asm/cputype.h>
 #include <asm/cacheflush.h>
 #include <asm/mmu_context.h>
 #include <asm/pgalloc.h>
 #include <asm/tlbflush.h>
 #include <asm/sizes.h>
+#include <asm/system_info.h>
 
 #include <asm/mach/map.h>
 #include "mm.h"
@@ -306,11 +308,15 @@ __arm_ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size,
 }
 EXPORT_SYMBOL(__arm_ioremap_pfn);
 
+void __iomem * (*arch_ioremap_caller)(unsigned long, size_t,
+                                      unsigned int, void *) =
+        __arm_ioremap_caller;
+
 void __iomem *
 __arm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
 {
-        return __arm_ioremap_caller(phys_addr, size, mtype,
-                        __builtin_return_address(0));
+        return arch_ioremap_caller(phys_addr, size, mtype,
+                __builtin_return_address(0));
 }
 EXPORT_SYMBOL(__arm_ioremap);
 
@@ -369,4 +375,11 @@ void __iounmap(volatile void __iomem *io_addr)
 
         vunmap(addr);
 }
-EXPORT_SYMBOL(__iounmap);
+
+void (*arch_iounmap)(volatile void __iomem *) = __iounmap;
+
+void __arm_iounmap(volatile void __iomem *io_addr)
+{
+        arch_iounmap(io_addr);
+}
+EXPORT_SYMBOL(__arm_iounmap);
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index 70f6d3ea4834..27f4a619b35d 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -3,7 +3,31 @@
 /* the upper-most page table pointer */
 extern pmd_t *top_pmd;
 
-#define TOP_PTE(x)      pte_offset_kernel(top_pmd, x)
+/*
+ * 0xffff8000 to 0xffffffff is reserved for any ARM architecture
+ * specific hacks for copying pages efficiently, while 0xffff4000
+ * is reserved for VIPT aliasing flushing by generic code.
+ *
+ * Note that we don't allow VIPT aliasing caches with SMP.
+ */
+#define COPYPAGE_MINICACHE      0xffff8000
+#define COPYPAGE_V6_FROM        0xffff8000
+#define COPYPAGE_V6_TO          0xffffc000
+/* PFN alias flushing, for VIPT caches */
+#define FLUSH_ALIAS_START       0xffff4000
+
+static inline void set_top_pte(unsigned long va, pte_t pte)
+{
+        pte_t *ptep = pte_offset_kernel(top_pmd, va);
+        set_pte_ext(ptep, pte, 0);
+        local_flush_tlb_kernel_page(va);
+}
+
+static inline pte_t get_top_pte(unsigned long va)
+{
+        pte_t *ptep = pte_offset_kernel(top_pmd, va);
+        return *ptep;
+}
 
 static inline pmd_t *pmd_off_k(unsigned long virt)
 {
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 94c5a0c94f5e..b86f8933ff91 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -17,6 +17,7 @@
 #include <linux/fs.h>
 #include <linux/vmalloc.h>
 
+#include <asm/cp15.h>
 #include <asm/cputype.h>
 #include <asm/sections.h>
 #include <asm/cachetype.h>
@@ -25,6 +26,7 @@
 #include <asm/smp_plat.h>
 #include <asm/tlb.h>
 #include <asm/highmem.h>
+#include <asm/system_info.h>
 #include <asm/traps.h>
 
 #include <asm/mach/arch.h>
@@ -997,11 +999,14 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
 {
         struct map_desc map;
         unsigned long addr;
+        void *vectors;
 
         /*
          * Allocate the vector page early.
          */
-        vectors_page = early_alloc(PAGE_SIZE);
+        vectors = early_alloc(PAGE_SIZE);
+
+        early_trap_init(vectors);
 
         for (addr = VMALLOC_START; addr; addr += PMD_SIZE)
                 pmd_clear(pmd_off_k(addr));
@@ -1041,7 +1046,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
          * location (0xffff0000).  If we aren't using high-vectors, also
          * create a mapping at the low-vectors virtual address.
          */
-        map.pfn = __phys_to_pfn(virt_to_phys(vectors_page));
+        map.pfn = __phys_to_pfn(virt_to_phys(vectors));
         map.virtual = 0xffff0000;
         map.length = PAGE_SIZE;
         map.type = MT_HIGH_VECTORS;
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 4fc6794cca4b..6486d2f253cd 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -86,13 +86,17 @@ void __iomem *__arm_ioremap(unsigned long phys_addr, size_t size,
 }
 EXPORT_SYMBOL(__arm_ioremap);
 
+void __iomem * (*arch_ioremap_caller)(unsigned long, size_t, unsigned int, void *);
+
 void __iomem *__arm_ioremap_caller(unsigned long phys_addr, size_t size,
                                    unsigned int mtype, void *caller)
 {
         return __arm_ioremap(phys_addr, size, mtype);
 }
 
-void __iounmap(volatile void __iomem *addr)
+void (*arch_iounmap)(volatile void __iomem *);
+
+void __arm_iounmap(volatile void __iomem *addr)
 {
 }
-EXPORT_SYMBOL(__iounmap);
+EXPORT_SYMBOL(__arm_iounmap);
diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c
index a3e78ccabd65..0acb089d0f70 100644
--- a/arch/arm/mm/pgd.c
+++ b/arch/arm/mm/pgd.c
@@ -12,6 +12,7 @@
 #include <linux/highmem.h>
 #include <linux/slab.h>
 
+#include <asm/cp15.h>
 #include <asm/pgalloc.h>
 #include <asm/page.h>
 #include <asm/tlbflush.h>
diff --git a/arch/arm/mm/proc-fa526.S b/arch/arm/mm/proc-fa526.S
index 272558a133a3..d217e9795d74 100644
--- a/arch/arm/mm/proc-fa526.S
+++ b/arch/arm/mm/proc-fa526.S
@@ -22,7 +22,6 @@
 #include <asm/pgtable.h>
 #include <asm/page.h>
 #include <asm/ptrace.h>
-#include <asm/system.h>
 
 #include "proc-macros.S"
 
diff --git a/arch/arm/mm/vmregion.c b/arch/arm/mm/vmregion.c
index 036fdbfdd62f..a631016e1f8f 100644
--- a/arch/arm/mm/vmregion.c
+++ b/arch/arm/mm/vmregion.c
@@ -1,5 +1,8 @@
+#include <linux/fs.h>
 #include <linux/spinlock.h>
 #include <linux/list.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
 #include <linux/slab.h>
 
 #include "vmregion.h"
@@ -36,7 +39,7 @@
 
 struct arm_vmregion *
 arm_vmregion_alloc(struct arm_vmregion_head *head, size_t align,
-                   size_t size, gfp_t gfp)
+                   size_t size, gfp_t gfp, const void *caller)
 {
         unsigned long start = head->vm_start, addr = head->vm_end;
         unsigned long flags;
@@ -52,6 +55,8 @@ arm_vmregion_alloc(struct arm_vmregion_head *head, size_t align,
         if (!new)
                 goto out;
 
+        new->caller = caller;
+
         spin_lock_irqsave(&head->vm_lock, flags);
 
         addr = rounddown(addr - size, align);
@@ -129,3 +134,72 @@ void arm_vmregion_free(struct arm_vmregion_head *head, struct arm_vmregion *c)
 
         kfree(c);
 }
+
+#ifdef CONFIG_PROC_FS
+static int arm_vmregion_show(struct seq_file *m, void *p)
+{
+        struct arm_vmregion *c = list_entry(p, struct arm_vmregion, vm_list);
+
+        seq_printf(m, "0x%08lx-0x%08lx %7lu", c->vm_start, c->vm_end,
+                c->vm_end - c->vm_start);
+        if (c->caller)
+                seq_printf(m, " %pS", (void *)c->caller);
+        seq_putc(m, '\n');
+        return 0;
+}
+
+static void *arm_vmregion_start(struct seq_file *m, loff_t *pos)
+{
+        struct arm_vmregion_head *h = m->private;
+        spin_lock_irq(&h->vm_lock);
+        return seq_list_start(&h->vm_list, *pos);
+}
+
+static void *arm_vmregion_next(struct seq_file *m, void *p, loff_t *pos)
+{
+        struct arm_vmregion_head *h = m->private;
+        return seq_list_next(p, &h->vm_list, pos);
+}
+
+static void arm_vmregion_stop(struct seq_file *m, void *p)
+{
+        struct arm_vmregion_head *h = m->private;
+        spin_unlock_irq(&h->vm_lock);
+}
+
+static const struct seq_operations arm_vmregion_ops = {
+        .start  = arm_vmregion_start,
+        .stop   = arm_vmregion_stop,
+        .next   = arm_vmregion_next,
+        .show   = arm_vmregion_show,
+};
+
+static int arm_vmregion_open(struct inode *inode, struct file *file)
+{
+        struct arm_vmregion_head *h = PDE(inode)->data;
+        int ret = seq_open(file, &arm_vmregion_ops);
+        if (!ret) {
+                struct seq_file *m = file->private_data;
+                m->private = h;
+        }
+        return ret;
+}
+
+static const struct file_operations arm_vmregion_fops = {
+        .open   = arm_vmregion_open,
+        .read   = seq_read,
+        .llseek = seq_lseek,
+        .release = seq_release,
+};
+
+int arm_vmregion_create_proc(const char *path, struct arm_vmregion_head *h)
+{
+        proc_create_data(path, S_IRUSR, NULL, &arm_vmregion_fops, h);
+        return 0;
+}
+#else
+int arm_vmregion_create_proc(const char *path, struct arm_vmregion_head *h)
+{
+        return 0;
+}
+#endif
diff --git a/arch/arm/mm/vmregion.h b/arch/arm/mm/vmregion.h
index 15e9f044db9f..162be662c088 100644
--- a/arch/arm/mm/vmregion.h
+++ b/arch/arm/mm/vmregion.h
@@ -19,11 +19,14 @@ struct arm_vmregion {
         unsigned long           vm_end;
         struct page             *vm_pages;
         int                     vm_active;
+        const void              *caller;
 };
 
-struct arm_vmregion *arm_vmregion_alloc(struct arm_vmregion_head *, size_t, size_t, gfp_t);
+struct arm_vmregion *arm_vmregion_alloc(struct arm_vmregion_head *, size_t, size_t, gfp_t, const void *);
 struct arm_vmregion *arm_vmregion_find(struct arm_vmregion_head *, unsigned long);
 struct arm_vmregion *arm_vmregion_find_remove(struct arm_vmregion_head *, unsigned long);
 void arm_vmregion_free(struct arm_vmregion_head *, struct arm_vmregion *);
 
+int arm_vmregion_create_proc(const char *, struct arm_vmregion_head *);
+
 #endif
diff --git a/arch/arm/net/Makefile b/arch/arm/net/Makefile
new file mode 100644
index 000000000000..c2c10841b6be
--- /dev/null
+++ b/arch/arm/net/Makefile
@@ -0,0 +1,3 @@
+# ARM-specific networking code
+
+obj-$(CONFIG_BPF_JIT) += bpf_jit_32.o
diff --git a/arch/arm/net/bpf_jit_32.c b/arch/arm/net/bpf_jit_32.c
new file mode 100644
index 000000000000..62135849f48b
--- /dev/null
+++ b/arch/arm/net/bpf_jit_32.c
@@ -0,0 +1,915 @@
+/*
+ * Just-In-Time compiler for BPF filters on 32bit ARM
+ *
+ * Copyright (c) 2011 Mircea Gherzan <mgherzan@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; version 2 of the License.
+ */
+
+#include <linux/bitops.h>
+#include <linux/compiler.h>
+#include <linux/errno.h>
+#include <linux/filter.h>
+#include <linux/moduleloader.h>
+#include <linux/netdevice.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+#include <asm/cacheflush.h>
+#include <asm/hwcap.h>
+
+#include "bpf_jit_32.h"
+
+/*
+ * ABI:
+ *
+ * r0   scratch register
+ * r4   BPF register A
+ * r5   BPF register X
+ * r6   pointer to the skb
+ * r7   skb->data
+ * r8   skb_headlen(skb)
+ */
+
+#define r_scratch       ARM_R0
+/* r1-r3 are (also) used for the unaligned loads on the non-ARMv7 slowpath */
+#define r_off           ARM_R1
+#define r_A             ARM_R4
+#define r_X             ARM_R5
+#define r_skb           ARM_R6
+#define r_skb_data      ARM_R7
+#define r_skb_hl        ARM_R8
+
+#define SCRATCH_SP_OFFSET       0
+#define SCRATCH_OFF(k)          (SCRATCH_SP_OFFSET + (k))
+
+#define SEEN_MEM                ((1 << BPF_MEMWORDS) - 1)
+#define SEEN_MEM_WORD(k)        (1 << (k))
+#define SEEN_X                  (1 << BPF_MEMWORDS)
+#define SEEN_CALL               (1 << (BPF_MEMWORDS + 1))
+#define SEEN_SKB                (1 << (BPF_MEMWORDS + 2))
+#define SEEN_DATA               (1 << (BPF_MEMWORDS + 3))
+
+#define FLAG_NEED_X_RESET       (1 << 0)
+
+struct jit_ctx {
+        const struct sk_filter *skf;
+        unsigned idx;
+        unsigned prologue_bytes;
+        int ret0_fp_idx;
+        u32 seen;
+        u32 flags;
+        u32 *offsets;
+        u32 *target;
+#if __LINUX_ARM_ARCH__ < 7
+        u16 epilogue_bytes;
+        u16 imm_count;
+        u32 *imms;
+#endif
+};
+
+int bpf_jit_enable __read_mostly;
+
+static u64 jit_get_skb_b(struct sk_buff *skb, unsigned offset)
+{
+        u8 ret;
+        int err;
+
+        err = skb_copy_bits(skb, offset, &ret, 1);
+
+        return (u64)err << 32 | ret;
+}
+
+static u64 jit_get_skb_h(struct sk_buff *skb, unsigned offset)
+{
+        u16 ret;
+        int err;
+
+        err = skb_copy_bits(skb, offset, &ret, 2);
+
+        return (u64)err << 32 | ntohs(ret);
+}
+
+static u64 jit_get_skb_w(struct sk_buff *skb, unsigned offset)
+{
+        u32 ret;
+        int err;
+
+        err = skb_copy_bits(skb, offset, &ret, 4);
+
+        return (u64)err << 32 | ntohl(ret);
+}
+
+/*
+ * Wrapper that handles both OABI and EABI and assures Thumb2 interworking
+ * (where the assembly routines like __aeabi_uidiv could cause problems).
+ */
+static u32 jit_udiv(u32 dividend, u32 divisor)
+{
+        return dividend / divisor;
+}
+
+static inline void _emit(int cond, u32 inst, struct jit_ctx *ctx)
+{
+        if (ctx->target != NULL)
+                ctx->target[ctx->idx] = inst | (cond << 28);
+
+        ctx->idx++;
+}
+
+/*
+ * Emit an instruction that will be executed unconditionally.
+ */
+static inline void emit(u32 inst, struct jit_ctx *ctx)
+{
+        _emit(ARM_COND_AL, inst, ctx);
+}
+
+static u16 saved_regs(struct jit_ctx *ctx)
+{
+        u16 ret = 0;
+
+        if ((ctx->skf->len > 1) ||
+            (ctx->skf->insns[0].code == BPF_S_RET_A))
+                ret |= 1 << r_A;
+
+#ifdef CONFIG_FRAME_POINTER
+        ret |= (1 << ARM_FP) | (1 << ARM_IP) | (1 << ARM_LR) | (1 << ARM_PC);
+#else
+        if (ctx->seen & SEEN_CALL)
+                ret |= 1 << ARM_LR;
+#endif
+        if (ctx->seen & (SEEN_DATA | SEEN_SKB))
+                ret |= 1 << r_skb;
+        if (ctx->seen & SEEN_DATA)
+                ret |= (1 << r_skb_data) | (1 << r_skb_hl);
+        if (ctx->seen & SEEN_X)
+                ret |= 1 << r_X;
+
+        return ret;
+}
+
+static inline int mem_words_used(struct jit_ctx *ctx)
+{
+        /* yes, we do waste some stack space IF there are "holes" in the set" */
+        return fls(ctx->seen & SEEN_MEM);
+}
+
+static inline bool is_load_to_a(u16 inst)
+{
+        switch (inst) {
+        case BPF_S_LD_W_LEN:
+        case BPF_S_LD_W_ABS:
+        case BPF_S_LD_H_ABS:
+        case BPF_S_LD_B_ABS:
+        case BPF_S_ANC_CPU:
+        case BPF_S_ANC_IFINDEX:
+        case BPF_S_ANC_MARK:
+        case BPF_S_ANC_PROTOCOL:
+        case BPF_S_ANC_RXHASH:
+        case BPF_S_ANC_QUEUE:
+                return true;
+        default:
+                return false;
+        }
+}
+
+static void build_prologue(struct jit_ctx *ctx)
+{
+        u16 reg_set = saved_regs(ctx);
+        u16 first_inst = ctx->skf->insns[0].code;
+        u16 off;
+
+#ifdef CONFIG_FRAME_POINTER
+        emit(ARM_MOV_R(ARM_IP, ARM_SP), ctx);
+        emit(ARM_PUSH(reg_set), ctx);
+        emit(ARM_SUB_I(ARM_FP, ARM_IP, 4), ctx);
+#else
+        if (reg_set)
+                emit(ARM_PUSH(reg_set), ctx);
+#endif
+
+        if (ctx->seen & (SEEN_DATA | SEEN_SKB))
+                emit(ARM_MOV_R(r_skb, ARM_R0), ctx);
+
+        if (ctx->seen & SEEN_DATA) {
+                off = offsetof(struct sk_buff, data);
+                emit(ARM_LDR_I(r_skb_data, r_skb, off), ctx);
+                /* headlen = len - data_len */
+                off = offsetof(struct sk_buff, len);
+                emit(ARM_LDR_I(r_skb_hl, r_skb, off), ctx);
+                off = offsetof(struct sk_buff, data_len);
+                emit(ARM_LDR_I(r_scratch, r_skb, off), ctx);
+                emit(ARM_SUB_R(r_skb_hl, r_skb_hl, r_scratch), ctx);
+        }
+
+        if (ctx->flags & FLAG_NEED_X_RESET)
+                emit(ARM_MOV_I(r_X, 0), ctx);
+
+        /* do not leak kernel data to userspace */
+        if ((first_inst != BPF_S_RET_K) && !(is_load_to_a(first_inst)))
+                emit(ARM_MOV_I(r_A, 0), ctx);
+
+        /* stack space for the BPF_MEM words */
+        if (ctx->seen & SEEN_MEM)
+                emit(ARM_SUB_I(ARM_SP, ARM_SP, mem_words_used(ctx) * 4), ctx);
+}
+
+static void build_epilogue(struct jit_ctx *ctx)
+{
+        u16 reg_set = saved_regs(ctx);
+
+        if (ctx->seen & SEEN_MEM)
+                emit(ARM_ADD_I(ARM_SP, ARM_SP, mem_words_used(ctx) * 4), ctx);
+
+        reg_set &= ~(1 << ARM_LR);
+
+#ifdef CONFIG_FRAME_POINTER
+        /* the first instruction of the prologue was: mov ip, sp */
+        reg_set &= ~(1 << ARM_IP);
+        reg_set |= (1 << ARM_SP);
+        emit(ARM_LDM(ARM_SP, reg_set), ctx);
+#else
+        if (reg_set) {
+                if (ctx->seen & SEEN_CALL)
+                        reg_set |= 1 << ARM_PC;
+                emit(ARM_POP(reg_set), ctx);
+        }
+
+        if (!(ctx->seen & SEEN_CALL))
+                emit(ARM_BX(ARM_LR), ctx);
+#endif
+}
+
+static int16_t imm8m(u32 x)
+{
+        u32 rot;
+
+        for (rot = 0; rot < 16; rot++)
+                if ((x & ~ror32(0xff, 2 * rot)) == 0)
+                        return rol32(x, 2 * rot) | (rot << 8);
+
+        return -1;
+}
+
+#if __LINUX_ARM_ARCH__ < 7
+
+static u16 imm_offset(u32 k, struct jit_ctx *ctx)
+{
+        unsigned i = 0, offset;
+        u16 imm;
+
+        /* on the "fake" run we just count them (duplicates included) */
+        if (ctx->target == NULL) {
+                ctx->imm_count++;
+                return 0;
+        }
+
+        while ((i < ctx->imm_count) && ctx->imms[i]) {
+                if (ctx->imms[i] == k)
+                        break;
+                i++;
+        }
+
+        if (ctx->imms[i] == 0)
+                ctx->imms[i] = k;
+
+        /* constants go just after the epilogue */
+        offset =  ctx->offsets[ctx->skf->len];
+        offset += ctx->prologue_bytes;
+        offset += ctx->epilogue_bytes;
+        offset += i * 4;
+
+        ctx->target[offset / 4] = k;
+
+        /* PC in ARM mode == address of the instruction + 8 */
+        imm = offset - (8 + ctx->idx * 4);
+
+        return imm;
+}
+
+#endif /* __LINUX_ARM_ARCH__ */
+
+/*
+ * Move an immediate that's not an imm8m to a core register.
+ */
+static inline void emit_mov_i_no8m(int rd, u32 val, struct jit_ctx *ctx)
+{
+#if __LINUX_ARM_ARCH__ < 7
+        emit(ARM_LDR_I(rd, ARM_PC, imm_offset(val, ctx)), ctx);
+#else
+        emit(ARM_MOVW(rd, val & 0xffff), ctx);
+        if (val > 0xffff)
+                emit(ARM_MOVT(rd, val >> 16), ctx);
+#endif
+}
+
+static inline void emit_mov_i(int rd, u32 val, struct jit_ctx *ctx)
+{
+        int imm12 = imm8m(val);
+
+        if (imm12 >= 0)
+                emit(ARM_MOV_I(rd, imm12), ctx);
+        else
+                emit_mov_i_no8m(rd, val, ctx);
+}
+
+#if __LINUX_ARM_ARCH__ < 6
+
+static void emit_load_be32(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
+{
+        _emit(cond, ARM_LDRB_I(ARM_R3, r_addr, 1), ctx);
+        _emit(cond, ARM_LDRB_I(ARM_R1, r_addr, 0), ctx);
+        _emit(cond, ARM_LDRB_I(ARM_R2, r_addr, 3), ctx);
+        _emit(cond, ARM_LSL_I(ARM_R3, ARM_R3, 16), ctx);
+        _emit(cond, ARM_LDRB_I(ARM_R0, r_addr, 2), ctx);
+        _emit(cond, ARM_ORR_S(ARM_R3, ARM_R3, ARM_R1, SRTYPE_LSL, 24), ctx);
+        _emit(cond, ARM_ORR_R(ARM_R3, ARM_R3, ARM_R2), ctx);
+        _emit(cond, ARM_ORR_S(r_res, ARM_R3, ARM_R0, SRTYPE_LSL, 8), ctx);
+}
+
+static void emit_load_be16(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
+{
+        _emit(cond, ARM_LDRB_I(ARM_R1, r_addr, 0), ctx);
+        _emit(cond, ARM_LDRB_I(ARM_R2, r_addr, 1), ctx);
+        _emit(cond, ARM_ORR_S(r_res, ARM_R2, ARM_R1, SRTYPE_LSL, 8), ctx);
+}
+
+static inline void emit_swap16(u8 r_dst, u8 r_src, struct jit_ctx *ctx)
+{
+        emit(ARM_LSL_R(ARM_R1, r_src, 8), ctx);
+        emit(ARM_ORR_S(r_dst, ARM_R1, r_src, SRTYPE_LSL, 8), ctx);
+        emit(ARM_LSL_I(r_dst, r_dst, 8), ctx);
+        emit(ARM_LSL_R(r_dst, r_dst, 8), ctx);
+}
+
+#else  /* ARMv6+ */
+
+static void emit_load_be32(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
+{
+        _emit(cond, ARM_LDR_I(r_res, r_addr, 0), ctx);
+#ifdef __LITTLE_ENDIAN
+        _emit(cond, ARM_REV(r_res, r_res), ctx);
+#endif
+}
+
+static void emit_load_be16(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
+{
+        _emit(cond, ARM_LDRH_I(r_res, r_addr, 0), ctx);
+#ifdef __LITTLE_ENDIAN
+        _emit(cond, ARM_REV16(r_res, r_res), ctx);
+#endif
+}
+
+static inline void emit_swap16(u8 r_dst __maybe_unused,
+                               u8 r_src __maybe_unused,
+                               struct jit_ctx *ctx __maybe_unused)
+{
+#ifdef __LITTLE_ENDIAN
+        emit(ARM_REV16(r_dst, r_src), ctx);
+#endif
+}
+
+#endif /* __LINUX_ARM_ARCH__ < 6 */
+
+
+/* Compute the immediate value for a PC-relative branch. */
+static inline u32 b_imm(unsigned tgt, struct jit_ctx *ctx)
+{
+        u32 imm;
+
+        if (ctx->target == NULL)
+                return 0;
+        /*
+         * BPF allows only forward jumps and the offset of the target is
+         * still the one computed during the first pass.
+         */
+        imm  = ctx->offsets[tgt] + ctx->prologue_bytes - (ctx->idx * 4 + 8);
+
+        return imm >> 2;
+}
+
+#define OP_IMM3(op, r1, r2, imm_val, ctx)                               \
+        do {                                                            \
+                imm12 = imm8m(imm_val);                                 \
+                if (imm12 < 0) {                                        \
+                        emit_mov_i_no8m(r_scratch, imm_val, ctx);       \
+                        emit(op ## _R((r1), (r2), r_scratch), ctx);     \
+                } else {                                                \
+                        emit(op ## _I((r1), (r2), imm12), ctx);         \
+                }                                                       \
+        } while (0)
+
+static inline void emit_err_ret(u8 cond, struct jit_ctx *ctx)
+{
+        if (ctx->ret0_fp_idx >= 0) {
+                _emit(cond, ARM_B(b_imm(ctx->ret0_fp_idx, ctx)), ctx);
+                /* NOP to keep the size constant between passes */
+                emit(ARM_MOV_R(ARM_R0, ARM_R0), ctx);
+        } else {
+                _emit(cond, ARM_MOV_I(ARM_R0, 0), ctx);
+                _emit(cond, ARM_B(b_imm(ctx->skf->len, ctx)), ctx);
+        }
+}
+
+static inline void emit_blx_r(u8 tgt_reg, struct jit_ctx *ctx)
+{
+#if __LINUX_ARM_ARCH__ < 5
+        emit(ARM_MOV_R(ARM_LR, ARM_PC), ctx);
+
+        if (elf_hwcap & HWCAP_THUMB)
+                emit(ARM_BX(tgt_reg), ctx);
+        else
+                emit(ARM_MOV_R(ARM_PC, tgt_reg), ctx);
+#else
+        emit(ARM_BLX_R(tgt_reg), ctx);
+#endif
+}
+
+static inline void emit_udiv(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx)
+{
+#if __LINUX_ARM_ARCH__ == 7
+        if (elf_hwcap & HWCAP_IDIVA) {
+                emit(ARM_UDIV(rd, rm, rn), ctx);
+                return;
+        }
+#endif
+        if (rm != ARM_R0)
+                emit(ARM_MOV_R(ARM_R0, rm), ctx);
+        if (rn != ARM_R1)
+                emit(ARM_MOV_R(ARM_R1, rn), ctx);
+
+        ctx->seen |= SEEN_CALL;
+        emit_mov_i(ARM_R3, (u32)jit_udiv, ctx);
+        emit_blx_r(ARM_R3, ctx);
+
+        if (rd != ARM_R0)
+                emit(ARM_MOV_R(rd, ARM_R0), ctx);
+}
+
+static inline void update_on_xread(struct jit_ctx *ctx)
+{
+        if (!(ctx->seen & SEEN_X))
+                ctx->flags |= FLAG_NEED_X_RESET;
+
+        ctx->seen |= SEEN_X;
+}
+
+static int build_body(struct jit_ctx *ctx)
+{
+        void *load_func[] = {jit_get_skb_b, jit_get_skb_h, jit_get_skb_w};
+        const struct sk_filter *prog = ctx->skf;
+        const struct sock_filter *inst;
+        unsigned i, load_order, off, condt;
+        int imm12;
+        u32 k;
+
+        for (i = 0; i < prog->len; i++) {
+                inst = &(prog->insns[i]);
+                /* K as an immediate value operand */
+                k = inst->k;
+
+                /* compute offsets only in the fake pass */
+                if (ctx->target == NULL)
+                        ctx->offsets[i] = ctx->idx * 4;
+
+                switch (inst->code) {
+                case BPF_S_LD_IMM:
+                        emit_mov_i(r_A, k, ctx);
+                        break;
+                case BPF_S_LD_W_LEN:
+                        ctx->seen |= SEEN_SKB;
+                        BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, len) != 4);
+                        emit(ARM_LDR_I(r_A, r_skb,
+                                       offsetof(struct sk_buff, len)), ctx);
+                        break;
+                case BPF_S_LD_MEM:
+                        /* A = scratch[k] */
+                        ctx->seen |= SEEN_MEM_WORD(k);
+                        emit(ARM_LDR_I(r_A, ARM_SP, SCRATCH_OFF(k)), ctx);
+                        break;
+                case BPF_S_LD_W_ABS:
+                        load_order = 2;
+                        goto load;
+                case BPF_S_LD_H_ABS:
+                        load_order = 1;
+                        goto load;
+                case BPF_S_LD_B_ABS:
+                        load_order = 0;
+load:
+                        /* the interpreter will deal with the negative K */
+                        if ((int)k < 0)
+                                return -ENOTSUPP;
+                        emit_mov_i(r_off, k, ctx);
+load_common:
+                        ctx->seen |= SEEN_DATA | SEEN_CALL;
+
+                        if (load_order > 0) {
+                                emit(ARM_SUB_I(r_scratch, r_skb_hl,
+                                               1 << load_order), ctx);
+                                emit(ARM_CMP_R(r_scratch, r_off), ctx);
+                                condt = ARM_COND_HS;
+                        } else {
+                                emit(ARM_CMP_R(r_skb_hl, r_off), ctx);
+                                condt = ARM_COND_HI;
+                        }
+
+                        _emit(condt, ARM_ADD_R(r_scratch, r_off, r_skb_data),
+                              ctx);
+
+                        if (load_order == 0)
+                                _emit(condt, ARM_LDRB_I(r_A, r_scratch, 0),
+                                      ctx);
+                        else if (load_order == 1)
+                                emit_load_be16(condt, r_A, r_scratch, ctx);
+                        else if (load_order == 2)
+                                emit_load_be32(condt, r_A, r_scratch, ctx);
+
+                        _emit(condt, ARM_B(b_imm(i + 1, ctx)), ctx);
+
+                        /* the slowpath */
+                        emit_mov_i(ARM_R3, (u32)load_func[load_order], ctx);
+                        emit(ARM_MOV_R(ARM_R0, r_skb), ctx);
+                        /* the offset is already in R1 */
+                        emit_blx_r(ARM_R3, ctx);
+                        /* check the result of skb_copy_bits */
+                        emit(ARM_CMP_I(ARM_R1, 0), ctx);
+                        emit_err_ret(ARM_COND_NE, ctx);
+                        emit(ARM_MOV_R(r_A, ARM_R0), ctx);
+                        break;
+                case BPF_S_LD_W_IND:
+                        load_order = 2;
+                        goto load_ind;
+                case BPF_S_LD_H_IND:
+                        load_order = 1;
+                        goto load_ind;
+                case BPF_S_LD_B_IND:
+                        load_order = 0;
+load_ind:
+                        OP_IMM3(ARM_ADD, r_off, r_X, k, ctx);
+                        goto load_common;
+                case BPF_S_LDX_IMM:
+                        ctx->seen |= SEEN_X;
+                        emit_mov_i(r_X, k, ctx);
+                        break;
+                case BPF_S_LDX_W_LEN:
+                        ctx->seen |= SEEN_X | SEEN_SKB;
+                        emit(ARM_LDR_I(r_X, r_skb,
+                                       offsetof(struct sk_buff, len)), ctx);
+                        break;
+                case BPF_S_LDX_MEM:
+                        ctx->seen |= SEEN_X | SEEN_MEM_WORD(k);
+                        emit(ARM_LDR_I(r_X, ARM_SP, SCRATCH_OFF(k)), ctx);
+                        break;
+                case BPF_S_LDX_B_MSH:
+                        /* x = ((*(frame + k)) & 0xf) << 2; */
+                        ctx->seen |= SEEN_X | SEEN_DATA | SEEN_CALL;
+                        /* the interpreter should deal with the negative K */
+                        if (k < 0)
+                                return -1;
+                        /* offset in r1: we might have to take the slow path */
+                        emit_mov_i(r_off, k, ctx);
+                        emit(ARM_CMP_R(r_skb_hl, r_off), ctx);
+
+                        /* load in r0: common with the slowpath */
+                        _emit(ARM_COND_HI, ARM_LDRB_R(ARM_R0, r_skb_data,
+                                                      ARM_R1), ctx);
+                        /*
+                         * emit_mov_i() might generate one or two instructions,
+                         * the same holds for emit_blx_r()
+                         */
+                        _emit(ARM_COND_HI, ARM_B(b_imm(i + 1, ctx) - 2), ctx);
+
+                        emit(ARM_MOV_R(ARM_R0, r_skb), ctx);
+                        /* r_off is r1 */
+                        emit_mov_i(ARM_R3, (u32)jit_get_skb_b, ctx);
+                        emit_blx_r(ARM_R3, ctx);
+                        /* check the return value of skb_copy_bits */
+                        emit(ARM_CMP_I(ARM_R1, 0), ctx);
+                        emit_err_ret(ARM_COND_NE, ctx);
+
+                        emit(ARM_AND_I(r_X, ARM_R0, 0x00f), ctx);
+                        emit(ARM_LSL_I(r_X, r_X, 2), ctx);
+                        break;
+                case BPF_S_ST:
+                        ctx->seen |= SEEN_MEM_WORD(k);
+                        emit(ARM_STR_I(r_A, ARM_SP, SCRATCH_OFF(k)), ctx);
+                        break;
+                case BPF_S_STX:
+                        update_on_xread(ctx);
+                        ctx->seen |= SEEN_MEM_WORD(k);
+                        emit(ARM_STR_I(r_X, ARM_SP, SCRATCH_OFF(k)), ctx);
+                        break;
+                case BPF_S_ALU_ADD_K:
+                        /* A += K */
+                        OP_IMM3(ARM_ADD, r_A, r_A, k, ctx);
+                        break;
+                case BPF_S_ALU_ADD_X:
+                        update_on_xread(ctx);
+                        emit(ARM_ADD_R(r_A, r_A, r_X), ctx);
+                        break;
+                case BPF_S_ALU_SUB_K:
+                        /* A -= K */
+                        OP_IMM3(ARM_SUB, r_A, r_A, k, ctx);
+                        break;
+                case BPF_S_ALU_SUB_X:
+                        update_on_xread(ctx);
+                        emit(ARM_SUB_R(r_A, r_A, r_X), ctx);
+                        break;
+                case BPF_S_ALU_MUL_K:
+                        /* A *= K */
+                        emit_mov_i(r_scratch, k, ctx);
+                        emit(ARM_MUL(r_A, r_A, r_scratch), ctx);
+                        break;
+                case BPF_S_ALU_MUL_X:
+                        update_on_xread(ctx);
+                        emit(ARM_MUL(r_A, r_A, r_X), ctx);
+                        break;
+                case BPF_S_ALU_DIV_K:
+                        /* current k == reciprocal_value(userspace k) */
+                        emit_mov_i(r_scratch, k, ctx);
+                        /* A = top 32 bits of the product */
+                        emit(ARM_UMULL(r_scratch, r_A, r_A, r_scratch), ctx);
+                        break;
+                case BPF_S_ALU_DIV_X:
+                        update_on_xread(ctx);
+                        emit(ARM_CMP_I(r_X, 0), ctx);
+                        emit_err_ret(ARM_COND_EQ, ctx);
+                        emit_udiv(r_A, r_A, r_X, ctx);
+                        break;
+                case BPF_S_ALU_OR_K:
+                        /* A |= K */
+                        OP_IMM3(ARM_ORR, r_A, r_A, k, ctx);
+                        break;
+                case BPF_S_ALU_OR_X:
+                        update_on_xread(ctx);
+                        emit(ARM_ORR_R(r_A, r_A, r_X), ctx);
+                        break;
+                case BPF_S_ALU_AND_K:
+                        /* A &= K */
+                        OP_IMM3(ARM_AND, r_A, r_A, k, ctx);
+                        break;
+                case BPF_S_ALU_AND_X:
+                        update_on_xread(ctx);
+                        emit(ARM_AND_R(r_A, r_A, r_X), ctx);
+                        break;
+                case BPF_S_ALU_LSH_K:
+                        if (unlikely(k > 31))
+                                return -1;
+                        emit(ARM_LSL_I(r_A, r_A, k), ctx);
+                        break;
+                case BPF_S_ALU_LSH_X:
+                        update_on_xread(ctx);
+                        emit(ARM_LSL_R(r_A, r_A, r_X), ctx);
+                        break;
+                case BPF_S_ALU_RSH_K:
+                        if (unlikely(k > 31))
+                                return -1;
+                        emit(ARM_LSR_I(r_A, r_A, k), ctx);
+                        break;
+                case BPF_S_ALU_RSH_X:
+                        update_on_xread(ctx);
+                        emit(ARM_LSR_R(r_A, r_A, r_X), ctx);
+                        break;
+                case BPF_S_ALU_NEG:
+                        /* A = -A */
+                        emit(ARM_RSB_I(r_A, r_A, 0), ctx);
+                        break;
+                case BPF_S_JMP_JA:
+                        /* pc += K */
+                        emit(ARM_B(b_imm(i + k + 1, ctx)), ctx);
+                        break;
+                case BPF_S_JMP_JEQ_K:
+                        /* pc += (A == K) ? pc->jt : pc->jf */
+                        condt  = ARM_COND_EQ;
+                        goto cmp_imm;
+                case BPF_S_JMP_JGT_K:
+                        /* pc += (A > K) ? pc->jt : pc->jf */
+                        condt  = ARM_COND_HI;
+                        goto cmp_imm;
+                case BPF_S_JMP_JGE_K:
+                        /* pc += (A >= K) ? pc->jt : pc->jf */
+                        condt  = ARM_COND_HS;
+cmp_imm:
+                        imm12 = imm8m(k);
+                        if (imm12 < 0) {
+                                emit_mov_i_no8m(r_scratch, k, ctx);
+                                emit(ARM_CMP_R(r_A, r_scratch), ctx);
+                        } else {
+                                emit(ARM_CMP_I(r_A, imm12), ctx);
+                        }
+cond_jump:
+                        if (inst->jt)
+                                _emit(condt, ARM_B(b_imm(i + inst->jt + 1,
+                                                   ctx)), ctx);
+                        if (inst->jf)
+                                _emit(condt ^ 1, ARM_B(b_imm(i + inst->jf + 1,
+                                                             ctx)), ctx);
+                        break;
+                case BPF_S_JMP_JEQ_X:
+                        /* pc += (A == X) ? pc->jt : pc->jf */
+                        condt   = ARM_COND_EQ;
+                        goto cmp_x;
+                case BPF_S_JMP_JGT_X:
+                        /* pc += (A > X) ? pc->jt : pc->jf */
+                        condt   = ARM_COND_HI;
+                        goto cmp_x;
+                case BPF_S_JMP_JGE_X:
+                        /* pc += (A >= X) ? pc->jt : pc->jf */
+                        condt   = ARM_COND_CS;
+cmp_x:
+                        update_on_xread(ctx);
+                        emit(ARM_CMP_R(r_A, r_X), ctx);
+                        goto cond_jump;
+                case BPF_S_JMP_JSET_K:
+                        /* pc += (A & K) ? pc->jt : pc->jf */
+                        condt  = ARM_COND_NE;
+                        /* not set iff all zeroes iff Z==1 iff EQ */
+
+                        imm12 = imm8m(k);
+                        if (imm12 < 0) {
+                                emit_mov_i_no8m(r_scratch, k, ctx);
+                                emit(ARM_TST_R(r_A, r_scratch), ctx);
+                        } else {
+                                emit(ARM_TST_I(r_A, imm12), ctx);
+                        }
+                        goto cond_jump;
+                case BPF_S_JMP_JSET_X:
+                        /* pc += (A & X) ? pc->jt : pc->jf */
+                        update_on_xread(ctx);
+                        condt  = ARM_COND_NE;
+                        emit(ARM_TST_R(r_A, r_X), ctx);
+                        goto cond_jump;
+                case BPF_S_RET_A:
+                        emit(ARM_MOV_R(ARM_R0, r_A), ctx);
+                        goto b_epilogue;
+                case BPF_S_RET_K:
+                        if ((k == 0) && (ctx->ret0_fp_idx < 0))
+                                ctx->ret0_fp_idx = i;
+                        emit_mov_i(ARM_R0, k, ctx);
+b_epilogue:
+                        if (i != ctx->skf->len - 1)
+                                emit(ARM_B(b_imm(prog->len, ctx)), ctx);
+                        break;
+                case BPF_S_MISC_TAX:
+                        /* X = A */
+                        ctx->seen |= SEEN_X;
+                        emit(ARM_MOV_R(r_X, r_A), ctx);
+                        break;
+                case BPF_S_MISC_TXA:
+                        /* A = X */
+                        update_on_xread(ctx);
+                        emit(ARM_MOV_R(r_A, r_X), ctx);
+                        break;
+                case BPF_S_ANC_PROTOCOL:
+                        /* A = ntohs(skb->protocol) */
+                        ctx->seen |= SEEN_SKB;
+                        BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
+                                                  protocol) != 2);
+                        off = offsetof(struct sk_buff, protocol);
+                        emit(ARM_LDRH_I(r_scratch, r_skb, off), ctx);
+                        emit_swap16(r_A, r_scratch, ctx);
+                        break;
+                case BPF_S_ANC_CPU:
+                        /* r_scratch = current_thread_info() */
+                        OP_IMM3(ARM_BIC, r_scratch, ARM_SP, THREAD_SIZE - 1, ctx);
+                        /* A = current_thread_info()->cpu */
+                        BUILD_BUG_ON(FIELD_SIZEOF(struct thread_info, cpu) != 4);
+                        off = offsetof(struct thread_info, cpu);
+                        emit(ARM_LDR_I(r_A, r_scratch, off), ctx);
+                        break;
+                case BPF_S_ANC_IFINDEX:
+                        /* A = skb->dev->ifindex */
+                        ctx->seen |= SEEN_SKB;
+                        off = offsetof(struct sk_buff, dev);
+                        emit(ARM_LDR_I(r_scratch, r_skb, off), ctx);
+
+                        emit(ARM_CMP_I(r_scratch, 0), ctx);
+                        emit_err_ret(ARM_COND_EQ, ctx);
+
+                        BUILD_BUG_ON(FIELD_SIZEOF(struct net_device,
+                                                  ifindex) != 4);
+                        off = offsetof(struct net_device, ifindex);
+                        emit(ARM_LDR_I(r_A, r_scratch, off), ctx);
+                        break;
+                case BPF_S_ANC_MARK:
+                        ctx->seen |= SEEN_SKB;
+                        BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, mark) != 4);
+                        off = offsetof(struct sk_buff, mark);
+                        emit(ARM_LDR_I(r_A, r_skb, off), ctx);
+                        break;
+                case BPF_S_ANC_RXHASH:
+                        ctx->seen |= SEEN_SKB;
+                        BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, rxhash) != 4);
+                        off = offsetof(struct sk_buff, rxhash);
+                        emit(ARM_LDR_I(r_A, r_skb, off), ctx);
+                        break;
+                case BPF_S_ANC_QUEUE:
+                        ctx->seen |= SEEN_SKB;
+                        BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
+                                                  queue_mapping) != 2);
+                        BUILD_BUG_ON(offsetof(struct sk_buff,
+                                              queue_mapping) > 0xff);
+                        off = offsetof(struct sk_buff, queue_mapping);
+                        emit(ARM_LDRH_I(r_A, r_skb, off), ctx);
+                        break;
+                default:
+                        return -1;
+                }
+        }
+
+        /* compute offsets only during the first pass */
+        if (ctx->target == NULL)
+                ctx->offsets[i] = ctx->idx * 4;
+
+        return 0;
+}
+
+
+void bpf_jit_compile(struct sk_filter *fp)
+{
+        struct jit_ctx ctx;
+        unsigned tmp_idx;
+        unsigned alloc_size;
+
+        if (!bpf_jit_enable)
+                return;
+
+        memset(&ctx, 0, sizeof(ctx));
+        ctx.skf         = fp;
+        ctx.ret0_fp_idx = -1;
+
+        ctx.offsets = kzalloc(GFP_KERNEL, 4 * (ctx.skf->len + 1));
+        if (ctx.offsets == NULL)
+                return;
+
+        /* fake pass to fill in the ctx->seen */
+        if (unlikely(build_body(&ctx)))
+                goto out;
+
+        tmp_idx = ctx.idx;
+        build_prologue(&ctx);
+        ctx.prologue_bytes = (ctx.idx - tmp_idx) * 4;
+
+#if __LINUX_ARM_ARCH__ < 7
+        tmp_idx = ctx.idx;
+        build_epilogue(&ctx);
+        ctx.epilogue_bytes = (ctx.idx - tmp_idx) * 4;
+
+        ctx.idx += ctx.imm_count;
+        if (ctx.imm_count) {
+                ctx.imms = kzalloc(GFP_KERNEL, 4 * ctx.imm_count);
+                if (ctx.imms == NULL)
+                        goto out;
+        }
+#else
+        /* there's nothing after the epilogue on ARMv7 */
+        build_epilogue(&ctx);
+#endif
+
+        alloc_size = 4 * ctx.idx;
+        ctx.target = module_alloc(max(sizeof(struct work_struct),
+                                      alloc_size));
+        if (unlikely(ctx.target == NULL))
+                goto out;
+
+        ctx.idx = 0;
+        build_prologue(&ctx);
+        build_body(&ctx);
+        build_epilogue(&ctx);
+
+        flush_icache_range((u32)ctx.target, (u32)(ctx.target + ctx.idx));
+
+#if __LINUX_ARM_ARCH__ < 7
+        if (ctx.imm_count)
+                kfree(ctx.imms);
+#endif
+
+        if (bpf_jit_enable > 1)
+                print_hex_dump(KERN_INFO, "BPF JIT code: ",
+                               DUMP_PREFIX_ADDRESS, 16, 4, ctx.target,
+                               alloc_size, false);
+
+        fp->bpf_func = (void *)ctx.target;
+out:
+        kfree(ctx.offsets);
+        return;
+}
+
+static void bpf_jit_free_worker(struct work_struct *work)
+{
+        module_free(NULL, work);
+}
+
+void bpf_jit_free(struct sk_filter *fp)
+{
+        struct work_struct *work;
+
+        if (fp->bpf_func != sk_run_filter) {
+                work = (struct work_struct *)fp->bpf_func;
+
+                INIT_WORK(work, bpf_jit_free_worker);
+                schedule_work(work);
+        }
+}
diff --git a/arch/arm/net/bpf_jit_32.h b/arch/arm/net/bpf_jit_32.h
new file mode 100644
index 000000000000..99ae5e3f46d2
--- /dev/null
+++ b/arch/arm/net/bpf_jit_32.h
@@ -0,0 +1,190 @@
+/*
+ * Just-In-Time compiler for BPF filters on 32bit ARM
+ *
+ * Copyright (c) 2011 Mircea Gherzan <mgherzan@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; version 2 of the License.
+ */
+
+#ifndef PFILTER_OPCODES_ARM_H
+#define PFILTER_OPCODES_ARM_H
+
+#define ARM_R0  0
+#define ARM_R1  1
+#define ARM_R2  2
+#define ARM_R3  3
+#define ARM_R4  4
+#define ARM_R5  5
+#define ARM_R6  6
+#define ARM_R7  7
+#define ARM_R8  8
+#define ARM_R9  9
+#define ARM_R10 10
+#define ARM_FP  11
+#define ARM_IP  12
+#define ARM_SP  13
+#define ARM_LR  14
+#define ARM_PC  15
+
+#define ARM_COND_EQ             0x0
+#define ARM_COND_NE             0x1
+#define ARM_COND_CS             0x2
+#define ARM_COND_HS             ARM_COND_CS
+#define ARM_COND_CC             0x3
+#define ARM_COND_LO             ARM_COND_CC
+#define ARM_COND_MI             0x4
+#define ARM_COND_PL             0x5
+#define ARM_COND_VS             0x6
+#define ARM_COND_VC             0x7
+#define ARM_COND_HI             0x8
+#define ARM_COND_LS             0x9
+#define ARM_COND_GE             0xa
+#define ARM_COND_LT             0xb
+#define ARM_COND_GT             0xc
+#define ARM_COND_LE             0xd
+#define ARM_COND_AL             0xe
+
+/* register shift types */
+#define SRTYPE_LSL              0
+#define SRTYPE_LSR              1
+#define SRTYPE_ASR              2
+#define SRTYPE_ROR              3
+
+#define ARM_INST_ADD_R          0x00800000
+#define ARM_INST_ADD_I          0x02800000
+
+#define ARM_INST_AND_R          0x00000000
+#define ARM_INST_AND_I          0x02000000
+
+#define ARM_INST_BIC_R          0x01c00000
+#define ARM_INST_BIC_I          0x03c00000
+
+#define ARM_INST_B              0x0a000000
+#define ARM_INST_BX             0x012FFF10
+#define ARM_INST_BLX_R          0x012fff30
+
+#define ARM_INST_CMP_R          0x01500000
+#define ARM_INST_CMP_I          0x03500000
+
+#define ARM_INST_LDRB_I         0x05d00000
+#define ARM_INST_LDRB_R         0x07d00000
+#define ARM_INST_LDRH_I         0x01d000b0
+#define ARM_INST_LDR_I          0x05900000
+
+#define ARM_INST_LDM            0x08900000
+
+#define ARM_INST_LSL_I          0x01a00000
+#define ARM_INST_LSL_R          0x01a00010
+
+#define ARM_INST_LSR_I          0x01a00020
+#define ARM_INST_LSR_R          0x01a00030
+
+#define ARM_INST_MOV_R          0x01a00000
+#define ARM_INST_MOV_I          0x03a00000
+#define ARM_INST_MOVW           0x03000000
+#define ARM_INST_MOVT           0x03400000
+
+#define ARM_INST_MUL            0x00000090
+
+#define ARM_INST_POP            0x08bd0000
+#define ARM_INST_PUSH           0x092d0000
+
+#define ARM_INST_ORR_R          0x01800000
+#define ARM_INST_ORR_I          0x03800000
+
+#define ARM_INST_REV            0x06bf0f30
+#define ARM_INST_REV16          0x06bf0fb0
+
+#define ARM_INST_RSB_I          0x02600000
+
+#define ARM_INST_SUB_R          0x00400000
+#define ARM_INST_SUB_I          0x02400000
+
+#define ARM_INST_STR_I          0x05800000
+
+#define ARM_INST_TST_R          0x01100000
+#define ARM_INST_TST_I          0x03100000
+
+#define ARM_INST_UDIV           0x0730f010
+
+#define ARM_INST_UMULL          0x00800090
+
+/* register */
+#define _AL3_R(op, rd, rn, rm)  ((op ## _R) | (rd) << 12 | (rn) << 16 | (rm))
+/* immediate */
+#define _AL3_I(op, rd, rn, imm) ((op ## _I) | (rd) << 12 | (rn) << 16 | (imm))
+
+#define ARM_ADD_R(rd, rn, rm)   _AL3_R(ARM_INST_ADD, rd, rn, rm)
+#define ARM_ADD_I(rd, rn, imm)  _AL3_I(ARM_INST_ADD, rd, rn, imm)
+
+#define ARM_AND_R(rd, rn, rm)   _AL3_R(ARM_INST_AND, rd, rn, rm)
+#define ARM_AND_I(rd, rn, imm)  _AL3_I(ARM_INST_AND, rd, rn, imm)
+
+#define ARM_BIC_R(rd, rn, rm)   _AL3_R(ARM_INST_BIC, rd, rn, rm)
+#define ARM_BIC_I(rd, rn, imm)  _AL3_I(ARM_INST_BIC, rd, rn, imm)
+
+#define ARM_B(imm24)            (ARM_INST_B | ((imm24) & 0xffffff))
+#define ARM_BX(rm)              (ARM_INST_BX | (rm))
+#define ARM_BLX_R(rm)           (ARM_INST_BLX_R | (rm))
+
+#define ARM_CMP_R(rn, rm)       _AL3_R(ARM_INST_CMP, 0, rn, rm)
+#define ARM_CMP_I(rn, imm)      _AL3_I(ARM_INST_CMP, 0, rn, imm)
+
+#define ARM_LDR_I(rt, rn, off)  (ARM_INST_LDR_I | (rt) << 12 | (rn) << 16 \
+                                 | (off))
+#define ARM_LDRB_I(rt, rn, off) (ARM_INST_LDRB_I | (rt) << 12 | (rn) << 16 \
+                                 | (off))
+#define ARM_LDRB_R(rt, rn, rm)  (ARM_INST_LDRB_R | (rt) << 12 | (rn) << 16 \
+                                 | (rm))
+#define ARM_LDRH_I(rt, rn, off) (ARM_INST_LDRH_I | (rt) << 12 | (rn) << 16 \
+                                 | (((off) & 0xf0) << 4) | ((off) & 0xf))
+
+#define ARM_LDM(rn, regs)       (ARM_INST_LDM | (rn) << 16 | (regs))
+
+#define ARM_LSL_R(rd, rn, rm)   (_AL3_R(ARM_INST_LSL, rd, 0, rn) | (rm) << 8)
+#define ARM_LSL_I(rd, rn, imm)  (_AL3_I(ARM_INST_LSL, rd, 0, rn) | (imm) << 7)
+
+#define ARM_LSR_R(rd, rn, rm)   (_AL3_R(ARM_INST_LSR, rd, 0, rn) | (rm) << 8)
+#define ARM_LSR_I(rd, rn, imm)  (_AL3_I(ARM_INST_LSR, rd, 0, rn) | (imm) << 7)
+
+#define ARM_MOV_R(rd, rm)       _AL3_R(ARM_INST_MOV, rd, 0, rm)
+#define ARM_MOV_I(rd, imm)      _AL3_I(ARM_INST_MOV, rd, 0, imm)
+
+#define ARM_MOVW(rd, imm)       \
+        (ARM_INST_MOVW | ((imm) >> 12) << 16 | (rd) << 12 | ((imm) & 0x0fff))
+
+#define ARM_MOVT(rd, imm)       \
+        (ARM_INST_MOVT | ((imm) >> 12) << 16 | (rd) << 12 | ((imm) & 0x0fff))
+
+#define ARM_MUL(rd, rm, rn)     (ARM_INST_MUL | (rd) << 16 | (rm) << 8 | (rn))
+
+#define ARM_POP(regs)           (ARM_INST_POP | (regs))
+#define ARM_PUSH(regs)          (ARM_INST_PUSH | (regs))
+
+#define ARM_ORR_R(rd, rn, rm)   _AL3_R(ARM_INST_ORR, rd, rn, rm)
+#define ARM_ORR_I(rd, rn, imm)  _AL3_I(ARM_INST_ORR, rd, rn, imm)
+#define ARM_ORR_S(rd, rn, rm, type, rs) \
+        (ARM_ORR_R(rd, rn, rm) | (type) << 5 | (rs) << 7)
+
+#define ARM_REV(rd, rm)         (ARM_INST_REV | (rd) << 12 | (rm))
+#define ARM_REV16(rd, rm)       (ARM_INST_REV16 | (rd) << 12 | (rm))
+
+#define ARM_RSB_I(rd, rn, imm)  _AL3_I(ARM_INST_RSB, rd, rn, imm)
+
+#define ARM_SUB_R(rd, rn, rm)   _AL3_R(ARM_INST_SUB, rd, rn, rm)
+#define ARM_SUB_I(rd, rn, imm)  _AL3_I(ARM_INST_SUB, rd, rn, imm)
+
+#define ARM_STR_I(rt, rn, off)  (ARM_INST_STR_I | (rt) << 12 | (rn) << 16 \
+                                 | (off))
+
+#define ARM_TST_R(rn, rm)       _AL3_R(ARM_INST_TST, 0, rn, rm)
+#define ARM_TST_I(rn, imm)      _AL3_I(ARM_INST_TST, 0, rn, imm)
+
+#define ARM_UDIV(rd, rn, rm)    (ARM_INST_UDIV | (rd) << 16 | (rn) | (rm) << 8)
+
+#define ARM_UMULL(rd_lo, rd_hi, rn, rm) (ARM_INST_UMULL | (rd_hi) << 16 \
+                                         | (rd_lo) << 12 | (rm) << 8 | rn)
+
+#endif /* PFILTER_OPCODES_ARM_H */
diff --git a/arch/arm/nwfpe/fpa11.c b/arch/arm/nwfpe/fpa11.c
index cc60acde84d9..2782ebcc2ed3 100644
--- a/arch/arm/nwfpe/fpa11.c
+++ b/arch/arm/nwfpe/fpa11.c
@@ -28,7 +28,6 @@
 
 #include <linux/compiler.h>
 #include <linux/string.h>
-#include <asm/system.h>
 
 /* Reset the FPA11 chip.  Called to initialize and reset the emulator. */
 static void resetFPA11(void)
diff --git a/arch/arm/plat-iop/i2c.c b/arch/arm/plat-iop/i2c.c
index 4efe392859ee..88215ad031a2 100644
--- a/arch/arm/plat-iop/i2c.c
+++ b/arch/arm/plat-iop/i2c.c
@@ -23,7 +23,6 @@
 #include <asm/page.h>
 #include <asm/mach/map.h>
 #include <asm/setup.h>
-#include <asm/system.h>
 #include <asm/memory.h>
 #include <mach/hardware.h>
 #include <asm/hardware/iop3xx.h>
diff --git a/arch/arm/plat-iop/pci.c b/arch/arm/plat-iop/pci.c
index 72768356447a..0da42058a20f 100644
--- a/arch/arm/plat-iop/pci.c
+++ b/arch/arm/plat-iop/pci.c
@@ -20,7 +20,6 @@
 #include <linux/io.h>
 #include <asm/irq.h>
 #include <asm/signal.h>
-#include <asm/system.h>
 #include <mach/hardware.h>
 #include <asm/mach/pci.h>
 #include <asm/hardware/iop3xx.h>
diff --git a/arch/arm/plat-iop/restart.c b/arch/arm/plat-iop/restart.c
index 6a85a0c502e6..33fa699a4d28 100644
--- a/arch/arm/plat-iop/restart.c
+++ b/arch/arm/plat-iop/restart.c
@@ -8,6 +8,7 @@
  * published by the Free Software Foundation.
  */
 #include <asm/hardware/iop3xx.h>
+#include <asm/system_misc.h>
 #include <mach/hardware.h>
 
 void iop3xx_restart(char mode, const char *cmd)
diff --git a/arch/arm/plat-mxc/3ds_debugboard.c b/arch/arm/plat-mxc/3ds_debugboard.c
index d1e31fa1b0c3..5cac2c540f4f 100644
--- a/arch/arm/plat-mxc/3ds_debugboard.c
+++ b/arch/arm/plat-mxc/3ds_debugboard.c
@@ -80,7 +80,7 @@ static struct smsc911x_platform_config smsc911x_config = {
 
 static struct platform_device smsc_lan9217_device = {
         .name = "smsc911x",
-        .id = 0,
+        .id = -1,
         .dev = {
                 .platform_data = &smsc911x_config,
         },
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index a599f01f8b92..0630513554de 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -22,11 +22,8 @@
 
 #include <asm/sizes.h>
 
-#ifdef __ASSEMBLER__
-#define IOMEM(addr)     (addr)
-#else
-#define IOMEM(addr)     ((void __force __iomem *)(addr))
-#endif
+#define addr_in_module(addr, mod) \
+        ((unsigned long)(addr) - mod ## _BASE_ADDR < mod ## _SIZE)
 
 #define IMX_IO_P2V_MODULE(addr, module)                                 \
         (((addr) - module ## _BASE_ADDR) < module ## _SIZE ?            \
diff --git a/arch/arm/plat-mxc/include/mach/io.h b/arch/arm/plat-mxc/include/mach/io.h
deleted file mode 100644
index 338300b18b00..000000000000
--- a/arch/arm/plat-mxc/include/mach/io.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- *  Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- */
-
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_MXC_IO_H__
-#define __ASM_ARCH_MXC_IO_H__
-
-/* Allow IO space to be anywhere in the memory */
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __arch_ioremap __imx_ioremap
-#define __arch_iounmap __iounmap
-
-#define addr_in_module(addr, mod) \
-        ((unsigned long)(addr) - mod ## _BASE_ADDR < mod ## _SIZE)
-
-extern void __iomem *(*imx_ioremap)(unsigned long, size_t, unsigned int);
-
-static inline void __iomem *
-__imx_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
-{
-        if (imx_ioremap != NULL)
-                return imx_ioremap(phys_addr, size, mtype);
-        else
-                return __arm_ioremap(phys_addr, size, mtype);
-}
-
-/* io address mapping macro */
-#define __io(a)         __typesafe_io(a)
-
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c
index f30dcacbbd0a..1996c3e3b8fe 100644
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/plat-mxc/system.c
@@ -25,8 +25,8 @@
 
 #include <mach/hardware.h>
 #include <mach/common.h>
+#include <asm/system_misc.h>
 #include <asm/proc-fns.h>
-#include <asm/system.h>
 #include <asm/mach-types.h>
 
 void __iomem *(*imx_ioremap)(unsigned long, size_t, unsigned int) = NULL;
diff --git a/arch/arm/plat-nomadik/Kconfig b/arch/arm/plat-nomadik/Kconfig
index bca4914b4b9d..4c48c8b60b54 100644
--- a/arch/arm/plat-nomadik/Kconfig
+++ b/arch/arm/plat-nomadik/Kconfig
@@ -23,7 +23,6 @@ config HAS_MTU
 config NOMADIK_MTU_SCHED_CLOCK
         bool
         depends on HAS_MTU
-        select HAVE_SCHED_CLOCK
         help
           Use the Multi Timer Unit as the sched_clock.
 
diff --git a/arch/arm/plat-nomadik/include/plat/ste_dma40.h b/arch/arm/plat-nomadik/include/plat/ste_dma40.h
index fd0ee84c45d1..9ff93b065686 100644
--- a/arch/arm/plat-nomadik/include/plat/ste_dma40.h
+++ b/arch/arm/plat-nomadik/include/plat/ste_dma40.h
@@ -200,8 +200,7 @@ dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
         sg.dma_address = addr;
         sg.length = size;
 
-        return chan->device->device_prep_slave_sg(chan, &sg, 1,
-                                                  direction, flags);
+        return dmaengine_prep_slave_sg(chan, &sg, 1, direction, flags);
 }
 
 #else
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index ce1e9b96ba1a..ad95c7a5d009 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -17,6 +17,7 @@ config ARCH_OMAP1
         select IRQ_DOMAIN
         select HAVE_IDE
         select NEED_MACH_MEMORY_H
+        select NEED_MACH_IO_H if PCCARD
         help
           "Systems based on omap7xx, omap15xx or omap16xx"
 
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 56b6f8b7053e..8506cbb7fea4 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -441,6 +441,8 @@ static int __init clk_disable_unused(void)
                 return 0;
 
         pr_info("clock: disabling unused clocks to save power\n");
+
+        spin_lock_irqsave(&clockfw_lock, flags);
         list_for_each_entry(ck, &clocks, node) {
                 if (ck->ops == &clkops_null)
                         continue;
@@ -448,10 +450,9 @@ static int __init clk_disable_unused(void)
                 if (ck->usecount > 0 || !ck->enable_reg)
                         continue;
 
-                spin_lock_irqsave(&clockfw_lock, flags);
                 arch_clock->clk_disable_unused(ck);
-                spin_unlock_irqrestore(&clockfw_lock, flags);
         }
+        spin_unlock_irqrestore(&clockfw_lock, flags);
 
         return 0;
 }
diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c
index 61a1ec2a6af4..39407cbe34c6 100644
--- a/arch/arm/plat-omap/debug-leds.c
+++ b/arch/arm/plat-omap/debug-leds.c
@@ -15,7 +15,6 @@
 
 #include <mach/hardware.h>
 #include <asm/leds.h>
-#include <asm/system.h>
 #include <asm/mach-types.h>
 
 #include <plat/fpga.h>
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 74300ae29b71..ecdb3da0dea9 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -36,7 +36,6 @@
 #include <linux/slab.h>
 #include <linux/delay.h>
 
-#include <asm/system.h>
 #include <mach/hardware.h>
 #include <plat/dma.h>
 
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index cb75b657b04b..2f6e9924a814 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -158,10 +158,6 @@
 #define OMAP_MPUIO(nr)          (OMAP_MAX_GPIO_LINES + (nr))
 #define OMAP_GPIO_IS_MPUIO(nr)  ((nr) >= OMAP_MAX_GPIO_LINES)
 
-#define OMAP_GPIO_IRQ(nr)       (OMAP_GPIO_IS_MPUIO(nr) ? \
-                                 IH_MPUIO_BASE + ((nr) & 0x0f) : \
-                                 IH_GPIO_BASE + (nr))
-
 struct omap_gpio_dev_attr {
         int bank_width;         /* GPIO bank width */
         bool dbck_flag;         /* dbck required or not - True for OMAP3&4 */
@@ -218,30 +214,14 @@ extern void omap_set_gpio_debounce(int gpio, int enable);
 extern void omap_set_gpio_debounce_time(int gpio, int enable);
 /*-------------------------------------------------------------------------*/
 
-/* Wrappers for "new style" GPIO calls, using the new infrastructure
+/*
+ * Wrappers for "new style" GPIO calls, using the new infrastructure
  * which lets us plug in FPGA, I2C, and other implementations.
- * *
+ *
  * The original OMAP-specific calls should eventually be removed.
  */
 
 #include <linux/errno.h>
 #include <asm-generic/gpio.h>
 
-static inline int irq_to_gpio(unsigned irq)
-{
-        int tmp;
-
-        /* omap1 SOC mpuio */
-        if (cpu_class_is_omap1() && (irq < (IH_MPUIO_BASE + 16)))
-                return (irq - IH_MPUIO_BASE) + OMAP_MAX_GPIO_LINES;
-
-        /* SOC gpio */
-        tmp = irq - IH_GPIO_BASE;
-        if (tmp < OMAP_MAX_GPIO_LINES)
-                return tmp;
-
-        /* we don't supply reverse mappings for non-SOC gpios */
-        return -EIO;
-}
-
 #endif
diff --git a/arch/arm/plat-omap/include/plat/hardware.h b/arch/arm/plat-omap/include/plat/hardware.h
index 537b05ae1f51..e897978371c2 100644
--- a/arch/arm/plat-omap/include/plat/hardware.h
+++ b/arch/arm/plat-omap/include/plat/hardware.h
@@ -43,12 +43,6 @@
 #endif
 #include <plat/serial.h>
 
-#ifdef __ASSEMBLER__
-#define IOMEM(x)                (x)
-#else
-#define IOMEM(x)                ((void __force __iomem *)(x))
-#endif
-
 /*
  * ---------------------------------------------------------------------------
  * Common definitions for all OMAP processors
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h
index f75946c3293d..7a38750c0079 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/arch/arm/plat-omap/include/plat/mmc.h
@@ -137,8 +137,6 @@ struct omap_mmc_platform_data {
                 int (*set_power)(struct device *dev, int slot,
                                  int power_on, int vdd);
                 int (*get_ro)(struct device *dev, int slot);
-                int (*set_sleep)(struct device *dev, int slot, int sleep,
-                                 int vdd, int cardsleep);
                 void (*remux)(struct device *dev, int slot, int power_on);
                 /* Call back before enabling / disabling regulators */
                 void (*before_set_reg)(struct device *dev, int slot,
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 9e8e63d52aab..8070145ccb98 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -47,17 +47,17 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
  * with the original PRCM protocol defined for OMAP2420
  */
 #define SYSC_TYPE1_MIDLEMODE_SHIFT      12
-#define SYSC_TYPE1_MIDLEMODE_MASK       (0x3 << SYSC_MIDLEMODE_SHIFT)
+#define SYSC_TYPE1_MIDLEMODE_MASK       (0x3 << SYSC_TYPE1_MIDLEMODE_SHIFT)
 #define SYSC_TYPE1_CLOCKACTIVITY_SHIFT  8
-#define SYSC_TYPE1_CLOCKACTIVITY_MASK   (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
+#define SYSC_TYPE1_CLOCKACTIVITY_MASK   (0x3 << SYSC_TYPE1_CLOCKACTIVITY_SHIFT)
 #define SYSC_TYPE1_SIDLEMODE_SHIFT      3
-#define SYSC_TYPE1_SIDLEMODE_MASK       (0x3 << SYSC_SIDLEMODE_SHIFT)
+#define SYSC_TYPE1_SIDLEMODE_MASK       (0x3 << SYSC_TYPE1_SIDLEMODE_SHIFT)
 #define SYSC_TYPE1_ENAWAKEUP_SHIFT      2
-#define SYSC_TYPE1_ENAWAKEUP_MASK       (1 << SYSC_ENAWAKEUP_SHIFT)
+#define SYSC_TYPE1_ENAWAKEUP_MASK       (1 << SYSC_TYPE1_ENAWAKEUP_SHIFT)
 #define SYSC_TYPE1_SOFTRESET_SHIFT      1
-#define SYSC_TYPE1_SOFTRESET_MASK       (1 << SYSC_SOFTRESET_SHIFT)
+#define SYSC_TYPE1_SOFTRESET_MASK       (1 << SYSC_TYPE1_SOFTRESET_SHIFT)
 #define SYSC_TYPE1_AUTOIDLE_SHIFT       0
-#define SYSC_TYPE1_AUTOIDLE_MASK        (1 << SYSC_AUTOIDLE_SHIFT)
+#define SYSC_TYPE1_AUTOIDLE_MASK        (1 << SYSC_TYPE1_AUTOIDLE_SHIFT)
 
 /*
  * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
diff --git a/arch/arm/plat-omap/include/plat/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h
index 925b12b500dc..9bb978ecd884 100644
--- a/arch/arm/plat-omap/include/plat/sdrc.h
+++ b/arch/arm/plat-omap/include/plat/sdrc.h
@@ -16,7 +16,6 @@
  * published by the Free Software Foundation.
  */
 
-#include <mach/io.h>
 
 /* SDRC register offsets - read/write with sdrc_{read,write}_reg() */
 
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index d0fc9f4dc155..762eeb0626c1 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -112,7 +112,6 @@ extern int omap4430_phy_suspend(struct device *dev, int suspend);
  */
 
 #define OMAP2_L4_IO_OFFSET      0xb2000000
-#define IOMEM(x)                ((void __force __iomem *)(x))
 #define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET)
 
 static inline u8 omap_readb(u32 pa)
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index 089899a7db72..74daf5ed1432 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -21,6 +21,7 @@
 #include <plat/orion_wdt.h>
 #include <plat/mv_xor.h>
 #include <plat/ehci-orion.h>
+#include <mach/bridge-regs.h>
 
 /* Fill in the resources structure and link it into the platform
    device structure. There is always a memory region, and nearly
@@ -568,13 +569,17 @@ void __init orion_spi_1_init(unsigned long mapbase,
  ****************************************************************************/
 static struct orion_wdt_platform_data orion_wdt_data;
 
+static struct resource orion_wdt_resource =
+                DEFINE_RES_MEM(TIMER_VIRT_BASE, 0x28);
+
 static struct platform_device orion_wdt_device = {
         .name           = "orion_wdt",
         .id             = -1,
         .dev            = {
                 .platform_data  = &orion_wdt_data,
         },
-        .num_resources  = 0,
+        .resource       = &orion_wdt_resource,
+        .num_resources  = 1,
 };
 
 void __init orion_wdt_init(unsigned long tclk)
diff --git a/arch/arm/plat-orion/include/plat/audio.h b/arch/arm/plat-orion/include/plat/audio.h
index 885f8abd927b..d6a55bd2e578 100644
--- a/arch/arm/plat-orion/include/plat/audio.h
+++ b/arch/arm/plat-orion/include/plat/audio.h
@@ -2,7 +2,6 @@
 #define __PLAT_AUDIO_H
 
 struct kirkwood_asoc_platform_data {
-        u32 tclk;
         int burst;
 };
 #endif
diff --git a/arch/arm/plat-pxa/dma.c b/arch/arm/plat-pxa/dma.c
index 2d3c19d7c7b1..79ef102e3b2b 100644
--- a/arch/arm/plat-pxa/dma.c
+++ b/arch/arm/plat-pxa/dma.c
@@ -20,7 +20,6 @@
 #include <linux/errno.h>
 #include <linux/dma-mapping.h>
 
-#include <asm/system.h>
 #include <asm/irq.h>
 #include <asm/memory.h>
 #include <mach/hardware.h>
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 32a09931350c..290942d9adda 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -35,6 +35,8 @@
 #include <mach/regs-clock.h>
 #include <asm/irq.h>
 #include <asm/cacheflush.h>
+#include <asm/system_info.h>
+#include <asm/system_misc.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 2bab4c99a234..28f898f75380 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -27,7 +27,6 @@
 #include <linux/errno.h>
 #include <linux/io.h>
 
-#include <asm/system.h>
 #include <asm/irq.h>
 #include <mach/hardware.h>
 #include <mach/dma.h>
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 7a308699f816..96bea3202304 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -9,8 +9,8 @@ config PLAT_S5P
         bool
         depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
         default y
-        select ARM_VIC if !ARCH_EXYNOS4
-        select ARM_GIC if ARCH_EXYNOS4
+        select ARM_VIC if !ARCH_EXYNOS
+        select ARM_GIC if ARCH_EXYNOS
         select GIC_NON_BANKED if ARCH_EXYNOS4
         select NO_IOPORT
         select ARCH_REQUIRE_GPIOLIB
@@ -40,6 +40,10 @@ config S5P_HRT
         help
           Use the High Resolution timer support
 
+config S5P_DEV_UART
+        def_bool y
+        depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
+
 config S5P_PM
         bool
         help
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index 30d8c3016e6b..4bd824136659 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -12,7 +12,6 @@ obj-				:=
 
 # Core files
 
-obj-y                           += dev-uart.o
 obj-y                           += clock.o
 obj-y                           += irq.o
 obj-$(CONFIG_S5P_EXT_INT)       += irq-eint.o
@@ -23,5 +22,7 @@ obj-$(CONFIG_S5P_SLEEP)		+= sleep.o
 obj-$(CONFIG_S5P_HRT)           += s5p-time.o
 
 # devices
+
+obj-$(CONFIG_S5P_DEV_UART)      += dev-uart.o
 obj-$(CONFIG_S5P_DEV_MFC)       += dev-mfc.o
 obj-$(CONFIG_S5P_SETUP_MIPIPHY) += setup-mipiphy.o
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c
index 963edea7f7e7..f68a9bb11948 100644
--- a/arch/arm/plat-s5p/clock.c
+++ b/arch/arm/plat-s5p/clock.c
@@ -61,6 +61,20 @@ struct clk clk_fout_apll = {
         .id             = -1,
 };
 
+/* BPLL clock output */
+
+struct clk clk_fout_bpll = {
+        .name           = "fout_bpll",
+        .id             = -1,
+};
+
+/* CPLL clock output */
+
+struct clk clk_fout_cpll = {
+        .name           = "fout_cpll",
+        .id             = -1,
+};
+
 /* MPLL clock output
  * No need .ctrlbit, this is always on
 */
@@ -101,6 +115,28 @@ struct clksrc_sources clk_src_apll = {
         .nr_sources     = ARRAY_SIZE(clk_src_apll_list),
 };
 
+/* Possible clock sources for BPLL Mux */
+static struct clk *clk_src_bpll_list[] = {
+        [0] = &clk_fin_bpll,
+        [1] = &clk_fout_bpll,
+};
+
+struct clksrc_sources clk_src_bpll = {
+        .sources        = clk_src_bpll_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_bpll_list),
+};
+
+/* Possible clock sources for CPLL Mux */
+static struct clk *clk_src_cpll_list[] = {
+        [0] = &clk_fin_cpll,
+        [1] = &clk_fout_cpll,
+};
+
+struct clksrc_sources clk_src_cpll = {
+        .sources        = clk_src_cpll_list,
+        .nr_sources     = ARRAY_SIZE(clk_src_cpll_list),
+};
+
 /* Possible clock sources for MPLL Mux */
 static struct clk *clk_src_mpll_list[] = {
         [0] = &clk_fin_mpll,
diff --git a/arch/arm/plat-s5p/irq-pm.c b/arch/arm/plat-s5p/irq-pm.c
index 327acb3a4464..d1bfecae6c9f 100644
--- a/arch/arm/plat-s5p/irq-pm.c
+++ b/arch/arm/plat-s5p/irq-pm.c
@@ -39,19 +39,32 @@ unsigned long s3c_irqwake_eintallow	= 0xffffffffL;
 int s3c_irq_wake(struct irq_data *data, unsigned int state)
 {
         unsigned long irqbit;
+        unsigned int irq_rtc_tic, irq_rtc_alarm;
+
+#ifdef CONFIG_ARCH_EXYNOS
+        if (soc_is_exynos5250()) {
+                irq_rtc_tic = EXYNOS5_IRQ_RTC_TIC;
+                irq_rtc_alarm = EXYNOS5_IRQ_RTC_ALARM;
+        } else {
+                irq_rtc_tic = EXYNOS4_IRQ_RTC_TIC;
+                irq_rtc_alarm = EXYNOS4_IRQ_RTC_ALARM;
+        }
+#else
+        irq_rtc_tic = IRQ_RTC_TIC;
+        irq_rtc_alarm = IRQ_RTC_ALARM;
+#endif
+
+        if (data->irq == irq_rtc_tic || data->irq == irq_rtc_alarm) {
+                irqbit = 1 << (data->irq + 1 - irq_rtc_alarm);
 
-        switch (data->irq) {
-        case IRQ_RTC_TIC:
-        case IRQ_RTC_ALARM:
-                irqbit = 1 << (data->irq + 1 - IRQ_RTC_ALARM);
                 if (!state)
                         s3c_irqwake_intmask |= irqbit;
                 else
                         s3c_irqwake_intmask &= ~irqbit;
-                break;
-        default:
+        } else {
                 return -ENOENT;
         }
+
         return 0;
 }
 
diff --git a/arch/arm/plat-samsung/cpu.c b/arch/arm/plat-samsung/cpu.c
index 81c06d44c11e..46b426e8aff5 100644
--- a/arch/arm/plat-samsung/cpu.c
+++ b/arch/arm/plat-samsung/cpu.c
@@ -15,7 +15,6 @@
 #include <linux/init.h>
 #include <linux/io.h>
 
-#include <asm/system.h>
 
 #include <mach/map.h>
 #include <plat/cpu.h>
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c
index 301d9c319d0b..eb9f4f534006 100644
--- a/arch/arm/plat-samsung/dma-ops.c
+++ b/arch/arm/plat-samsung/dma-ops.c
@@ -79,11 +79,11 @@ static int samsung_dmadev_prepare(unsigned ch,
                             info->len, offset_in_page(info->buf));
                 sg_dma_address(&sg) = info->buf;
 
-                desc = chan->device->device_prep_slave_sg(chan,
+                desc = dmaengine_prep_slave_sg(chan,
                         &sg, 1, info->direction, DMA_PREP_INTERRUPT);
                 break;
         case DMA_CYCLIC:
-                desc = chan->device->device_prep_dma_cyclic(chan,
+                desc = dmaengine_prep_dma_cyclic(chan,
                         info->buf, info->len, info->period, info->direction);
                 break;
         default:
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index 73cb3cfd0685..787ceaca0be8 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -42,6 +42,9 @@ extern unsigned long samsung_cpu_id;
 #define EXYNOS4412_CPU_ID       0xE4412200
 #define EXYNOS4_CPU_MASK        0xFFFE0000
 
+#define EXYNOS5250_SOC_ID       0x43520000
+#define EXYNOS5_SOC_MASK        0xFFFFF000
+
 #define IS_SAMSUNG_CPU(name, id, mask)          \
 static inline int is_samsung_##name(void)       \
 {                                               \
@@ -58,6 +61,7 @@ IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK)
 IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
 IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
 IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
+IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
 
 #if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \
     defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \
@@ -120,6 +124,12 @@ IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
 #define EXYNOS4210_REV_1_0      (0x10)
 #define EXYNOS4210_REV_1_1      (0x11)
 
+#if defined(CONFIG_SOC_EXYNOS5250)
+# define soc_is_exynos5250()    is_samsung_exynos5250()
+#else
+# define soc_is_exynos5250()    0
+#endif
+
 #define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
 
 #ifndef MHZ
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 5e7972de3ed5..2155d4af62a3 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -26,6 +26,8 @@ struct s3c24xx_uart_resources {
 extern struct s3c24xx_uart_resources s3c2410_uart_resources[];
 extern struct s3c24xx_uart_resources s3c64xx_uart_resources[];
 extern struct s3c24xx_uart_resources s5p_uart_resources[];
+extern struct s3c24xx_uart_resources exynos4_uart_resources[];
+extern struct s3c24xx_uart_resources exynos5_uart_resources[];
 
 extern struct platform_device *s3c24xx_uart_devs[];
 extern struct platform_device *s3c24xx_uart_src[];
diff --git a/arch/arm/plat-samsung/include/plat/s5p-clock.h b/arch/arm/plat-samsung/include/plat/s5p-clock.h
index 984bf9e7bc89..1de4b32f98e9 100644
--- a/arch/arm/plat-samsung/include/plat/s5p-clock.h
+++ b/arch/arm/plat-samsung/include/plat/s5p-clock.h
@@ -18,6 +18,8 @@
 #define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
 
 #define clk_fin_apll clk_ext_xtal_mux
+#define clk_fin_bpll clk_ext_xtal_mux
+#define clk_fin_cpll clk_ext_xtal_mux
 #define clk_fin_mpll clk_ext_xtal_mux
 #define clk_fin_epll clk_ext_xtal_mux
 #define clk_fin_dpll clk_ext_xtal_mux
@@ -29,6 +31,8 @@ extern struct clk clk_xusbxti;
 extern struct clk clk_48m;
 extern struct clk s5p_clk_27m;
 extern struct clk clk_fout_apll;
+extern struct clk clk_fout_bpll;
+extern struct clk clk_fout_cpll;
 extern struct clk clk_fout_mpll;
 extern struct clk clk_fout_epll;
 extern struct clk clk_fout_dpll;
@@ -37,6 +41,8 @@ extern struct clk clk_arm;
 extern struct clk clk_vpll;
 
 extern struct clksrc_sources clk_src_apll;
+extern struct clksrc_sources clk_src_bpll;
+extern struct clksrc_sources clk_src_cpll;
 extern struct clksrc_sources clk_src_mpll;
 extern struct clksrc_sources clk_src_epll;
 extern struct clksrc_sources clk_src_dpll;
diff --git a/arch/arm/plat-samsung/include/plat/uncompress.h b/arch/arm/plat-samsung/include/plat/uncompress.h
index ee48e12a1e72..7e068d182c3d 100644
--- a/arch/arm/plat-samsung/include/plat/uncompress.h
+++ b/arch/arm/plat-samsung/include/plat/uncompress.h
@@ -37,7 +37,9 @@ static void arch_detect_cpu(void);
 /* how many bytes we allow into the FIFO at a time in FIFO mode */
 #define FIFO_MAX         (14)
 
+#ifdef S3C_PA_UART
 #define uart_base S3C_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT)
+#endif
 
 static __inline__ void
 uart_wr(unsigned int reg, unsigned int val)
diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c
index 51583cd30164..f980cf3d2baa 100644
--- a/arch/arm/plat-samsung/irq-vic-timer.c
+++ b/arch/arm/plat-samsung/irq-vic-timer.c
@@ -19,6 +19,7 @@
 #include <linux/io.h>
 
 #include <mach/map.h>
+#include <plat/cpu.h>
 #include <plat/irq-vic-timer.h>
 #include <plat/regs-timer.h>
 
@@ -57,6 +58,21 @@ void __init s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq)
         struct irq_chip_type *ct;
         unsigned int i;
 
+#ifdef CONFIG_ARCH_EXYNOS
+        if (soc_is_exynos5250()) {
+                pirq[0] = EXYNOS5_IRQ_TIMER0_VIC;
+                pirq[1] = EXYNOS5_IRQ_TIMER1_VIC;
+                pirq[2] = EXYNOS5_IRQ_TIMER2_VIC;
+                pirq[3] = EXYNOS5_IRQ_TIMER3_VIC;
+                pirq[4] = EXYNOS5_IRQ_TIMER4_VIC;
+        } else {
+                pirq[0] = EXYNOS4_IRQ_TIMER0_VIC;
+                pirq[1] = EXYNOS4_IRQ_TIMER1_VIC;
+                pirq[2] = EXYNOS4_IRQ_TIMER2_VIC;
+                pirq[3] = EXYNOS4_IRQ_TIMER3_VIC;
+                pirq[4] = EXYNOS4_IRQ_TIMER4_VIC;
+        }
+#endif
         s3c_tgc = irq_alloc_generic_chip("s3c-timer", 1, timer_irq,
                                          S3C64XX_TINT_CSTAT, handle_level_irq);
 
diff --git a/arch/arm/plat-samsung/time.c b/arch/arm/plat-samsung/time.c
index e3bb806bbafe..4dcb11c3d894 100644
--- a/arch/arm/plat-samsung/time.c
+++ b/arch/arm/plat-samsung/time.c
@@ -28,7 +28,6 @@
 #include <linux/io.h>
 #include <linux/platform_device.h>
 
-#include <asm/system.h>
 #include <asm/leds.h>
 #include <asm/mach-types.h>
 
diff --git a/arch/arm/plat-spear/include/plat/hardware.h b/arch/arm/plat-spear/include/plat/hardware.h
index 66d677225d15..70187d763e26 100644
--- a/arch/arm/plat-spear/include/plat/hardware.h
+++ b/arch/arm/plat-spear/include/plat/hardware.h
@@ -14,10 +14,4 @@
 #ifndef __PLAT_HARDWARE_H
 #define __PLAT_HARDWARE_H
 
-#ifndef __ASSEMBLY__
-#define IOMEM(x)        ((void __iomem __force *)(x))
-#else
-#define IOMEM(x)        (x)
-#endif
-
 #endif /* __PLAT_HARDWARE_H */
diff --git a/arch/arm/plat-spear/include/plat/io.h b/arch/arm/plat-spear/include/plat/io.h
deleted file mode 100644
index 4d4ba822b3eb..000000000000
--- a/arch/arm/plat-spear/include/plat/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * arch/arm/plat-spear/include/plat/io.h
- *
- * IO definitions for SPEAr platform
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __PLAT_IO_H
-#define __PLAT_IO_H
-
-#define IO_SPACE_LIMIT          0xFFFFFFFF
-
-#define __io(a)                 __typesafe_io(a)
-#define __mem_pci(a)            (a)
-
-#endif /* __PLAT_IO_H */
diff --git a/arch/arm/plat-spear/include/plat/keyboard.h b/arch/arm/plat-spear/include/plat/keyboard.h
index c16cc31ecbed..0562f134621d 100644
--- a/arch/arm/plat-spear/include/plat/keyboard.h
+++ b/arch/arm/plat-spear/include/plat/keyboard.h
@@ -159,11 +159,4 @@ struct kbd_platform_data {
         unsigned int mode;
 };
 
-/* This function is used to set platform data field of pdev->dev */
-static inline void
-kbd_set_plat_data(struct platform_device *pdev, struct kbd_platform_data *data)
-{
-        pdev->dev.platform_data = data;
-}
-
 #endif /* __PLAT_KEYBOARD_H */
diff --git a/arch/arm/plat-spear/restart.c b/arch/arm/plat-spear/restart.c
index 2b4e3d82957c..16f203e78d89 100644
--- a/arch/arm/plat-spear/restart.c
+++ b/arch/arm/plat-spear/restart.c
@@ -11,6 +11,7 @@
  * warranty of any kind, whether express or implied.
  */
 #include <linux/io.h>
+#include <asm/system_misc.h>
 #include <asm/hardware/sp810.h>
 #include <mach/hardware.h>
 #include <mach/generic.h>
diff --git a/arch/arm/plat-versatile/Kconfig b/arch/arm/plat-versatile/Kconfig
index 52353beb369d..043f7b02a9e7 100644
--- a/arch/arm/plat-versatile/Kconfig
+++ b/arch/arm/plat-versatile/Kconfig
@@ -11,7 +11,6 @@ config PLAT_VERSATILE_LEDS
         depends on ARCH_REALVIEW || ARCH_VERSATILE
 
 config PLAT_VERSATILE_SCHED_CLOCK
-        def_bool y if !ARCH_INTEGRATOR_AP
-        select HAVE_SCHED_CLOCK
+        def_bool y
 
 endif
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index 8f3ccddbdafd..858748eaa144 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -18,7 +18,9 @@
 #include <linux/smp.h>
 #include <linux/init.h>
 
+#include <asm/cp15.h>
 #include <asm/cputype.h>
+#include <asm/system_info.h>
 #include <asm/thread_notify.h>
 #include <asm/vfp.h>