18 files changed, 96 insertions, 31 deletions

diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 5e34ca6d38b6..3e073467caca 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -28,6 +28,7 @@ config SHARP_PARAM
 
 config SHARPSL_PM
         bool
+        select APM_EMULATION
 
 config SHARP_SCOOP
         bool
diff --git a/arch/arm/kernel/dma.c b/arch/arm/kernel/dma.c
index 5a0f4bc5da95..ba99a2035523 100644
--- a/arch/arm/kernel/dma.c
+++ b/arch/arm/kernel/dma.c
@@ -228,6 +228,7 @@ int dma_channel_active(dmach_t channel)
 {
         return dma_chan[channel].active;
 }
+EXPORT_SYMBOL(dma_channel_active);
 
 void set_dma_page(dmach_t channel, char pagenr)
 {
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 03e37af315d7..0453dcc757b4 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -839,8 +839,11 @@ static int __init topology_init(void)
 {
         int cpu;
 
-        for_each_possible_cpu(cpu)
-                register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu);
+        for_each_possible_cpu(cpu) {
+                struct cpuinfo_arm *cpuinfo = &per_cpu(cpu_data, cpu);
+                cpuinfo->cpu.hotpluggable = 1;
+                register_cpu(&cpuinfo->cpu, cpu);
+        }
 
         return 0;
 }
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index f7d342ccbebf..40586e22cd38 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -320,16 +320,16 @@ void __init at91_add_device_nand(struct at91_nand_data *data)
         at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
                         | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
 
-        at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
-                        | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
+        at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
+                        | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
 
-        at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
+        at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
 
         if (data->bus_width_16)
                 mode = AT91_SMC_DBW_16;
         else
                 mode = AT91_SMC_DBW_8;
-        at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
+        at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
 
         /* enable pin */
         if (data->enable_pin)
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index 44211a0af19a..ba4a1bb3ee40 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -215,13 +215,14 @@ int gpio_direction_input(unsigned pin)
 }
 EXPORT_SYMBOL(gpio_direction_input);
 
-int gpio_direction_output(unsigned pin)
+int gpio_direction_output(unsigned pin, int value)
 {
         void __iomem    *pio = pin_to_controller(pin);
         unsigned        mask = pin_to_mask(pin);
 
         if (!pio || !(__raw_readl(pio + PIO_PSR) & mask))
                 return -EINVAL;
+        __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
         __raw_writel(mask, pio + PIO_OER);
         return 0;
 }
diff --git a/arch/arm/mach-imx/cpufreq.c b/arch/arm/mach-imx/cpufreq.c
index 4f66e90db74f..7e70e0b0b989 100644
--- a/arch/arm/mach-imx/cpufreq.c
+++ b/arch/arm/mach-imx/cpufreq.c
@@ -50,6 +50,7 @@
 #define CR_920T_ASYNC_MODE      0xC0000000
 
 static u32 mpctl0_at_boot;
+static u32 bclk_div_at_boot;
 
 static void imx_set_async_mode(void)
 {
@@ -82,13 +83,13 @@ static void imx_set_mpctl0(u32 mpctl0)
  * imx_compute_mpctl - compute new PLL parameters
  * @new_mpctl:  pointer to location assigned by new PLL control register value
  * @cur_mpctl:  current PLL control register parameters
+ * @f_ref:      reference source frequency Hz
  * @freq:       required frequency in Hz
  * @relation:   is one of %CPUFREQ_RELATION_L (supremum)
  *              and %CPUFREQ_RELATION_H (infimum)
  */
-long imx_compute_mpctl(u32 *new_mpctl, u32 cur_mpctl, unsigned long freq, int relation)
+long imx_compute_mpctl(u32 *new_mpctl, u32 cur_mpctl, u32 f_ref, unsigned long freq, int relation)
 {
-        u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512);
         u32 mfi;
         u32 mfn;
         u32 mfd;
@@ -182,7 +183,7 @@ static int imx_set_target(struct cpufreq_policy *policy,
         unsigned long flags;
         long freq;
         long sysclk;
-        unsigned int bclk_div = 1;
+        unsigned int bclk_div = bclk_div_at_boot;
 
         /*
          * Some governors do not respects CPU and policy lower limits
@@ -202,8 +203,8 @@ static int imx_set_target(struct cpufreq_policy *policy,
 
         sysclk = imx_get_system_clk();
 
-        if (freq > sysclk + 1000000) {
-                freq = imx_compute_mpctl(&mpctl0, mpctl0_at_boot, freq, relation);
+        if (freq > sysclk / bclk_div_at_boot + 1000000) {
+                freq = imx_compute_mpctl(&mpctl0, mpctl0_at_boot, CLK32 * 512, freq, relation);
                 if (freq < 0) {
                         printk(KERN_WARNING "imx: target frequency %ld Hz cannot be set\n", freq);
                         return -EINVAL;
@@ -217,6 +218,8 @@ static int imx_set_target(struct cpufreq_policy *policy,
 
                         if(bclk_div > 16)
                                 bclk_div = 16;
+                        if(bclk_div < bclk_div_at_boot)
+                                bclk_div = bclk_div_at_boot;
                 }
                 freq = (sysclk + bclk_div / 2) / bclk_div;
         }
@@ -285,7 +288,7 @@ static struct cpufreq_driver imx_driver = {
 
 static int __init imx_cpufreq_init(void)
 {
-
+        bclk_div_at_boot = __mfld2val(CSCR_BCLK_DIV, CSCR) + 1;
         mpctl0_at_boot = 0;
 
         if((CSCR & CSCR_MPEN) &&
diff --git a/arch/arm/mach-imx/generic.c b/arch/arm/mach-imx/generic.c
index b5aa49d00ca3..7a7fa51ec62c 100644
--- a/arch/arm/mach-imx/generic.c
+++ b/arch/arm/mach-imx/generic.c
@@ -102,7 +102,7 @@ EXPORT_SYMBOL(imx_gpio_mode);
  *  f = 2 * f_ref * --------------------
  *                        pd + 1
  */
-static unsigned int imx_decode_pll(unsigned int pll)
+static unsigned int imx_decode_pll(unsigned int pll, u32 f_ref)
 {
         unsigned long long ll;
         unsigned long quot;
@@ -111,7 +111,6 @@ static unsigned int imx_decode_pll(unsigned int pll)
         u32 mfn = pll & 0x3ff;
         u32 mfd = (pll >> 16) & 0x3ff;
         u32 pd =  (pll >> 26) & 0xf;
-        u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512);
 
         mfi = mfi <= 5 ? 5 : mfi;
 
@@ -124,13 +123,15 @@ static unsigned int imx_decode_pll(unsigned int pll)
 
 unsigned int imx_get_system_clk(void)
 {
-        return imx_decode_pll(SPCTL0);
+        u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512);
+
+        return imx_decode_pll(SPCTL0, f_ref);
 }
 EXPORT_SYMBOL(imx_get_system_clk);
 
 unsigned int imx_get_mcu_clk(void)
 {
-        return imx_decode_pll(MPCTL0);
+        return imx_decode_pll(MPCTL0, CLK32 * 512);
 }
 EXPORT_SYMBOL(imx_get_mcu_clk);
 
diff --git a/arch/arm/mach-iop32x/Kconfig b/arch/arm/mach-iop32x/Kconfig
index c072d94070da..9dd49cff21ff 100644
--- a/arch/arm/mach-iop32x/Kconfig
+++ b/arch/arm/mach-iop32x/Kconfig
@@ -4,6 +4,9 @@ menu "IOP32x Implementation Options"
 
 comment "IOP32x Platform Types"
 
+config MACH_EP80219
+        bool
+
 config MACH_GLANTANK
         bool "Enable support for the IO-Data GLAN Tank"
         help
@@ -19,6 +22,7 @@ config ARCH_IQ80321
 
 config ARCH_IQ31244
         bool "Enable support for EP80219/IQ31244"
+        select MACH_EP80219
         help
           Say Y here if you want to run your kernel on the Intel EP80219
           evaluation kit for the Intel 80219 processor (a IOP321 variant)
diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c
index 571ac35bc2c7..60e74309a458 100644
--- a/arch/arm/mach-iop32x/iq31244.c
+++ b/arch/arm/mach-iop32x/iq31244.c
@@ -39,22 +39,35 @@
 #include <asm/arch/time.h>
 
 /*
- * The EP80219 and IQ31244 use the same machine ID.  To find out
- * which of the two we're running on, we look at the processor ID.
+ * Until March of 2007 iq31244 platforms and ep80219 platforms shared the
+ * same machine id, and the processor type was used to select board type.
+ * However this assumption breaks for an iq80219 board which is an iop219
+ * processor on an iq31244 board.  The force_ep80219 flag has been added
+ * for old boot loaders using the iq31244 machine id for an ep80219 platform.
  */
+static int force_ep80219;
+
 static int is_80219(void)
 {
         extern int processor_id;
         return !!((processor_id & 0xffffffe0) == 0x69052e20);
 }
 
+static int is_ep80219(void)
+{
+        if (machine_is_ep80219() || force_ep80219)
+                return 1;
+        else
+                return 0;
+}
+
 
 /*
  * EP80219/IQ31244 timer tick configuration.
  */
 static void __init iq31244_timer_init(void)
 {
-        if (is_80219()) {
+        if (is_ep80219()) {
                 /* 33.333 MHz crystal.  */
                 iop_init_time(200000000);
         } else {
@@ -165,12 +178,18 @@ static struct hw_pci iq31244_pci __initdata = {
 
 static int __init iq31244_pci_init(void)
 {
-        if (machine_is_iq31244()) {
+        if (is_ep80219())
+                pci_common_init(&ep80219_pci);
+        else if (machine_is_iq31244()) {
                 if (is_80219()) {
-                        pci_common_init(&ep80219_pci);
-                } else {
-                        pci_common_init(&iq31244_pci);
+                        printk("note: iq31244 board type has been selected\n");
+                        printk("note: to select ep80219 operation:\n");
+                        printk("\t1/ specify \"force_ep80219\" on the kernel"
+                                " command line\n");
+                        printk("\t2/ update boot loader to pass"
+                                " the ep80219 id: %d\n", MACH_TYPE_EP80219);
                 }
+                pci_common_init(&iq31244_pci);
         }
 
         return 0;
@@ -277,10 +296,18 @@ static void __init iq31244_init_machine(void)
         platform_device_register(&iq31244_flash_device);
         platform_device_register(&iq31244_serial_device);
 
-        if (is_80219())
+        if (is_ep80219())
                 pm_power_off = ep80219_power_off;
 }
 
+static int __init force_ep80219_setup(char *str)
+{
+        force_ep80219 = 1;
+        return 1;
+}
+
+__setup("force_ep80219", force_ep80219_setup);
+
 MACHINE_START(IQ31244, "Intel IQ31244")
         /* Maintainer: Intel Corp. */
         .phys_io        = IQ31244_UART,
@@ -291,3 +318,19 @@ MACHINE_START(IQ31244, "Intel IQ31244")
         .timer          = &iq31244_timer,
         .init_machine   = iq31244_init_machine,
 MACHINE_END
+
+/* There should have been an ep80219 machine identifier from the beginning.
+ * Boot roms older than March 2007 do not know the ep80219 machine id.  Pass
+ * "force_ep80219" on the kernel command line, otherwise iq31244 operation
+ * will be selected.
+ */
+MACHINE_START(EP80219, "Intel EP80219")
+        /* Maintainer: Intel Corp. */
+        .phys_io        = IQ31244_UART,
+        .io_pg_offst    = ((IQ31244_UART) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .map_io         = iq31244_map_io,
+        .init_irq       = iop32x_init_irq,
+        .timer          = &iq31244_timer,
+        .init_machine   = iq31244_init_machine,
+MACHINE_END
diff --git a/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c b/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c
index a193dd931512..760c9d0db7c3 100644
--- a/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c
+++ b/arch/arm/mach-ns9xxx/mach-cc9p9360dev.c
@@ -32,7 +32,7 @@ static void __init mach_cc9p9360dev_init_machine(void)
         board_a9m9750dev_init_machine();
 }
 
-MACHINE_START(CC9P9360DEV, "Connect Core 9P 9360 on an A9M9750 Devboard")
+MACHINE_START(CC9P9360DEV, "Digi ConnectCore 9P 9360 on an A9M9750 Devboard")
         .map_io = mach_cc9p9360dev_map_io,
         .init_irq = mach_cc9p9360dev_init_irq,
         .init_machine = mach_cc9p9360dev_init_machine,
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 6e113078f7ab..ad519390dd58 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -27,6 +27,7 @@
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
 #include <linux/input.h>
+#include <linux/workqueue.h>
 
 #include <asm/hardware.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 0de201c3d50b..5170481afeab 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -27,6 +27,7 @@
 
 #include <asm/arch/clock.h>
 #include <asm/arch/sram.h>
+#include <asm/div64.h>
 
 #include "prcm-regs.h"
 #include "memory.h"
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 8816f5a33a28..162978fd5359 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -1013,7 +1013,8 @@ static struct clk dss2_fck = {		/* Alt clk used in power management */
         .name           = "dss2_fck",
         .parent         = &sys_ck,              /* fixed at sys_ck or 48MHz */
         .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                                RATE_CKCTL | CM_CORE_SEL1 | RATE_FIXED,
+                                RATE_CKCTL | CM_CORE_SEL1 | RATE_FIXED |
+                                DELAYED_APP,
         .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
         .enable_bit     = 1,
         .src_offset     = 13,
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 7915a5a22865..72738771fb57 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -28,6 +28,7 @@
 #include <asm/hardware.h>
 #include <asm/irq.h>
 #include <asm/system.h>
+#include <asm/arch/pxa-regs.h>
 #include <asm/arch/irda.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/udc.h>
@@ -35,8 +36,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
-
-#include <asm/arch/pxa-regs.h>
 #include <asm/arch/tosa.h>
 
 #include <asm/hardware/scoop.h>
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 01c60d0923cd..d052ab2d9377 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -202,7 +202,9 @@ static void __init h1940_map_io(void)
 
         /* setup PM */
 
+#ifdef CONFIG_PM_H1940
         memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
+#endif
         s3c2410_pm_init();
 }
 
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index 480ccde63fb4..ae1d0a81fd6a 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -224,7 +224,9 @@ static void __init rx3715_init_irq(void)
 
 static void __init rx3715_init_machine(void)
 {
+#ifdef CONFIG_PM_H1940
         memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
+#endif
         s3c2410_pm_init();
 
         s3c24xx_fb_set_platdata(&rx3715_lcdcfg);
diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c
index 7a45b6dcb73e..756573595b88 100644
--- a/arch/arm/mach-s3c2443/irq.c
+++ b/arch/arm/mach-s3c2443/irq.c
@@ -137,7 +137,7 @@ static struct irq_chip s3c2443_irq_lcd = {
 
 static void s3c2443_irq_demux_dma(unsigned int irq, struct irq_desc *desc)
 {
-        s3c2443_irq_demux(IRQ_S3C2443_DMA1, 6);
+        s3c2443_irq_demux(IRQ_S3C2443_DMA0, 6);
 }
 
 #define INTMSK_DMA      (1UL << (IRQ_S3C2443_DMA - IRQ_EINT0))
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 192a5a26cf2b..9e13c8358ea7 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -27,6 +27,7 @@
 #include <asm/mach/map.h>
 #include <asm/mach/flash.h>
 #include <asm/irq.h>
+#include <asm/gpio.h>
 
 #include "generic.h"
 
@@ -153,7 +154,7 @@ int gpio_direction_input(unsigned gpio)
 
 EXPORT_SYMBOL(gpio_direction_input);
 
-int gpio_direction_output(unsigned gpio)
+int gpio_direction_output(unsigned gpio, int value)
 {
         unsigned long flags;
 
@@ -161,6 +162,7 @@ int gpio_direction_output(unsigned gpio)
                 return -EINVAL;
 
         local_irq_save(flags);
+        gpio_set_value(gpio, value);
         GPDR |= GPIO_GPIO(gpio);
         local_irq_restore(flags);
         return 0;