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-rw-r--r--arch/arm/mm/proc-arm6_7.S8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S
index 0ee214b824ff..189ef6a71ba1 100644
--- a/arch/arm/mm/proc-arm6_7.S
+++ b/arch/arm/mm/proc-arm6_7.S
@@ -38,8 +38,8 @@ ENTRY(cpu_arm7_data_abort)
38 mrc p15, 0, r1, c5, c0, 0 @ get FSR 38 mrc p15, 0, r1, c5, c0, 0 @ get FSR
39 mrc p15, 0, r0, c6, c0, 0 @ get FAR 39 mrc p15, 0, r0, c6, c0, 0 @ get FAR
40 ldr r8, [r0] @ read arm instruction 40 ldr r8, [r0] @ read arm instruction
41 tst r8, #1 << 20 @ L = 1 -> write? 41 tst r8, #1 << 20 @ L = 0 -> write?
42 orreq r1, r1, #1 << 8 @ yes. 42 orreq r1, r1, #1 << 11 @ yes.
43 and r7, r8, #15 << 24 43 and r7, r8, #15 << 24
44 add pc, pc, r7, lsr #22 @ Now branch to the relevant processing routine 44 add pc, pc, r7, lsr #22 @ Now branch to the relevant processing routine
45 nop 45 nop
@@ -71,8 +71,8 @@ ENTRY(cpu_arm6_data_abort)
71 mrc p15, 0, r1, c5, c0, 0 @ get FSR 71 mrc p15, 0, r1, c5, c0, 0 @ get FSR
72 mrc p15, 0, r0, c6, c0, 0 @ get FAR 72 mrc p15, 0, r0, c6, c0, 0 @ get FAR
73 ldr r8, [r2] @ read arm instruction 73 ldr r8, [r2] @ read arm instruction
74 tst r8, #1 << 20 @ L = 1 -> write? 74 tst r8, #1 << 20 @ L = 0 -> write?
75 orreq r1, r1, #1 << 8 @ yes. 75 orreq r1, r1, #1 << 11 @ yes.
76 and r7, r8, #14 << 24 76 and r7, r8, #14 << 24
77 teq r7, #8 << 24 @ was it ldm/stm 77 teq r7, #8 << 24 @ was it ldm/stm
78 movne pc, lr 78 movne pc, lr