28 files changed, 844 insertions, 122 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 91d5ef3397be..ec77721507cb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -356,6 +356,16 @@ config HOTPLUG_CPU
           Say Y here to experiment with turning CPUs off and on.  CPUs
           can be controlled through /sys/devices/system/cpu.
 
+config LOCAL_TIMERS
+        bool "Use local timer interrupts"
+        depends on SMP && REALVIEW_MPCORE
+        default y
+        help
+          Enable support for local timers on SMP platforms, rather then the
+          legacy IPI broadcast method.  Local timers allows the system
+          accounting to be spread across the timer interval, preventing a
+          "thundering herd" at every timer tick.
+
 config PREEMPT
         bool "Preemptible Kernel (EXPERIMENTAL)"
         depends on EXPERIMENTAL
diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c
index 50f13eec6cd7..5ab94584baee 100644
--- a/arch/arm/boot/compressed/misc.c
+++ b/arch/arm/boot/compressed/misc.c
@@ -283,8 +283,14 @@ void flush_window(void)
         putstr(".");
 }
 
+#ifndef arch_error
+#define arch_error(x)
+#endif
+
 static void error(char *x)
 {
+        arch_error(x);
+
         putstr("\n\n");
         putstr(x);
         putstr("\n\n -- System halted");
diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c
index bb4eff614413..c7fdf390cef9 100644
--- a/arch/arm/common/scoop.c
+++ b/arch/arm/common/scoop.c
@@ -19,12 +19,6 @@
 
 #define SCOOP_REG(d,adr) (*(volatile unsigned short*)(d +(adr)))
 
-/* PCMCIA to Scoop linkage structures for pxa2xx_sharpsl.c
-   There is no easy way to link multiple scoop devices into one
-   single entity for the pxa2xx_pcmcia device */
-int scoop_num;
-struct scoop_pcmcia_dev *scoop_devs;
-
 struct  scoop_dev {
         void  *base;
         spinlock_t scoop_lock;
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index 7b17a87a3311..7a3261f0bf79 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -9,6 +9,7 @@
  */
 #include <linux/module.h>
 #include <linux/string.h>
+#include <linux/cryptohash.h>
 #include <linux/delay.h>
 #include <linux/in6.h>
 #include <linux/syscalls.h>
@@ -126,6 +127,9 @@ EXPORT_SYMBOL(__put_user_2);
 EXPORT_SYMBOL(__put_user_4);
 EXPORT_SYMBOL(__put_user_8);
 
+        /* crypto hash */
+EXPORT_SYMBOL(sha_transform);
+
         /* gcc lib functions */
 EXPORT_SYMBOL(__ashldi3);
 EXPORT_SYMBOL(__ashrdi3);
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index a511ec5b11a3..d9fb819bf7cc 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -47,6 +47,13 @@
         movne   r0, sp
         adrne   lr, 1b
         bne     do_IPI
+
+#ifdef CONFIG_LOCAL_TIMERS
+        test_for_ltirq r0, r6, r5, lr
+        movne   r0, sp
+        adrne   lr, 1b
+        bne     do_local_timer
+#endif
 #endif
 
         .endm
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 9def4404e1f2..d7099dbbb879 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -264,6 +264,7 @@ unlock:
 #endif
 #ifdef CONFIG_SMP
                 show_ipi_list(p);
+                show_local_irqs(p);
 #endif
                 seq_printf(p, "Err: %10lu\n", irq_err_count);
         }
@@ -995,7 +996,7 @@ void __init init_irq_proc(void)
         struct proc_dir_entry *dir;
         int irq;
 
-        dir = proc_mkdir("irq", 0);
+        dir = proc_mkdir("irq", NULL);
         if (!dir)
                 return;
 
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index ba298277becd..30494aab829a 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -86,12 +86,16 @@ EXPORT_SYMBOL(pm_power_off);
  */
 void default_idle(void)
 {
-        local_irq_disable();
-        if (!need_resched() && !hlt_counter) {
-                timer_dyn_reprogram();
-                arch_idle();
+        if (hlt_counter)
+                cpu_relax();
+        else {
+                local_irq_disable();
+                if (!need_resched()) {
+                        timer_dyn_reprogram();
+                        arch_idle();
+                }
+                local_irq_enable();
         }
-        local_irq_enable();
 }
 
 /*
@@ -116,13 +120,13 @@ void cpu_idle(void)
 
                 if (!idle)
                         idle = default_idle;
-                preempt_disable();
                 leds_event(led_idle_start);
                 while (!need_resched())
                         idle();
                 leds_event(led_idle_end);
-                preempt_enable();
+                preempt_enable_no_resched();
                 schedule();
+                preempt_disable();
         }
 }
 
@@ -355,7 +359,7 @@ copy_thread(int nr, unsigned long clone_flags, unsigned long stack_start,
         struct thread_info *thread = p->thread_info;
         struct pt_regs *childregs;
 
-        childregs = ((struct pt_regs *)((unsigned long)thread + THREAD_START_SP)) - 1;
+        childregs = (void *)thread + THREAD_START_SP - sizeof(*regs);
         *childregs = *regs;
         childregs->ARM_r0 = 0;
         childregs->ARM_sp = stack_start;
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index edb5a406922f..e55ea952f7aa 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -142,7 +142,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
                         ret = -EIO;
         }
 
-        secondary_data.stack = 0;
+        secondary_data.stack = NULL;
         secondary_data.pgdir = 0;
 
         *pmd_offset(pgd, PHYS_OFFSET) = __pmd(0);
@@ -185,6 +185,11 @@ int __cpuexit __cpu_disable(void)
         migrate_irqs();
 
         /*
+         * Stop the local timer for this CPU.
+         */
+        local_timer_stop(cpu);
+
+        /*
          * Flush user cache and TLB mappings, and then remove this CPU
          * from the vm mask set of all processes.
          */
@@ -251,7 +256,9 @@ void __cpuexit cpu_die(void)
 asmlinkage void __cpuinit secondary_start_kernel(void)
 {
         struct mm_struct *mm = &init_mm;
-        unsigned int cpu = smp_processor_id();
+        unsigned int cpu;
+
+        cpu = smp_processor_id();
 
         printk("CPU%u: Booted secondary processor\n", cpu);
 
@@ -268,6 +275,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
         local_flush_tlb_all();
 
         cpu_init();
+        preempt_disable();
 
         /*
          * Give the platform a chance to do its own initialisation.
@@ -290,6 +298,11 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
         cpu_set(cpu, cpu_online_map);
 
         /*
+         * Setup local timer for this CPU.
+         */
+        local_timer_setup(cpu);
+
+        /*
          * OK, it's off to the idle thread for us
          */
         cpu_idle();
@@ -359,8 +372,8 @@ static void send_ipi_message(cpumask_t callmap, enum ipi_msg_type msg)
  * You must not call this function with disabled interrupts, from a
  * hardware interrupt handler, nor from a bottom half handler.
  */
-int smp_call_function_on_cpu(void (*func)(void *info), void *info, int retry,
-                             int wait, cpumask_t callmap)
+static int smp_call_function_on_cpu(void (*func)(void *info), void *info,
+                                    int retry, int wait, cpumask_t callmap)
 {
         struct smp_call_struct data;
         unsigned long timeout;
@@ -454,6 +467,18 @@ void show_ipi_list(struct seq_file *p)
         seq_putc(p, '\n');
 }
 
+void show_local_irqs(struct seq_file *p)
+{
+        unsigned int cpu;
+
+        seq_printf(p, "LOC: ");
+
+        for_each_present_cpu(cpu)
+                seq_printf(p, "%10u ", irq_stat[cpu].local_timer_irqs);
+
+        seq_putc(p, '\n');
+}
+
 static void ipi_timer(struct pt_regs *regs)
 {
         int user = user_mode(regs);
@@ -464,6 +489,18 @@ static void ipi_timer(struct pt_regs *regs)
         irq_exit();
 }
 
+#ifdef CONFIG_LOCAL_TIMERS
+asmlinkage void do_local_timer(struct pt_regs *regs)
+{
+        int cpu = smp_processor_id();
+
+        if (local_timer_ack()) {
+                irq_stat[cpu].local_timer_irqs++;
+                ipi_timer(regs);
+        }
+}
+#endif
+
 /*
  * ipi_call_function - handle IPI from smp_call_function()
  *
@@ -515,7 +552,7 @@ static void ipi_cpu_stop(unsigned int cpu)
  *
  *  Bit 0 - Inter-processor function call
  */
-void do_IPI(struct pt_regs *regs)
+asmlinkage void do_IPI(struct pt_regs *regs)
 {
         unsigned int cpu = smp_processor_id();
         struct ipi_data *ipi = &per_cpu(ipi_data, cpu);
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h
index f35d91fbe117..b8c14e936697 100644
--- a/arch/arm/lib/bitops.h
+++ b/arch/arm/lib/bitops.h
@@ -34,7 +34,7 @@
         and     r2, r0, #7
         mov     r3, #1
         mov     r3, r3, lsl r2
-        save_and_disable_irqs ip, r2
+        save_and_disable_irqs ip
         ldrb    r2, [r1, r0, lsr #3]
         \instr  r2, r2, r3
         strb    r2, [r1, r0, lsr #3]
@@ -54,7 +54,7 @@
         add     r1, r1, r0, lsr #3
         and     r3, r0, #7
         mov     r0, #1
-        save_and_disable_irqs ip, r2
+        save_and_disable_irqs ip
         ldrb    r2, [r1]
         tst     r2, r0, lsl r3
         \instr  r2, r2, r0, lsl r3
diff --git a/arch/arm/mach-omap1/leds-h2p2-debug.c b/arch/arm/mach-omap1/leds-h2p2-debug.c
index be283cda63dd..399010c14036 100644
--- a/arch/arm/mach-omap1/leds-h2p2-debug.c
+++ b/arch/arm/mach-omap1/leds-h2p2-debug.c
@@ -13,7 +13,6 @@
 #include <linux/init.h>
 #include <linux/kernel_stat.h>
 #include <linux/sched.h>
-#include <linux/version.h>
 
 #include <asm/io.h>
 #include <asm/hardware.h>
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index eb5f6d744a4a..100fb31b5156 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -62,6 +62,37 @@ static struct scoop_config corgi_scoop_setup = {
         .io_out         = CORGI_SCOOP_IO_OUT,
 };
 
+struct platform_device corgiscoop_device = {
+        .name           = "sharp-scoop",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &corgi_scoop_setup,
+        },
+        .num_resources  = ARRAY_SIZE(corgi_scoop_resources),
+        .resource       = corgi_scoop_resources,
+};
+
+static void corgi_pcmcia_init(void)
+{
+        /* Setup default state of GPIO outputs
+           before we enable them as outputs. */
+        GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) |
+                GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) |
+                GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO52_nPCE_1) |
+                GPIO_bit(GPIO53_nPCE_2);
+
+        pxa_gpio_mode(GPIO48_nPOE_MD);
+        pxa_gpio_mode(GPIO49_nPWE_MD);
+        pxa_gpio_mode(GPIO50_nPIOR_MD);
+        pxa_gpio_mode(GPIO51_nPIOW_MD);
+        pxa_gpio_mode(GPIO55_nPREG_MD);
+        pxa_gpio_mode(GPIO56_nPWAIT_MD);
+        pxa_gpio_mode(GPIO57_nIOIS16_MD);
+        pxa_gpio_mode(GPIO52_nPCE_1_MD);
+        pxa_gpio_mode(GPIO53_nPCE_2_MD);
+        pxa_gpio_mode(GPIO54_pSKTSEL_MD);
+}
+
 static struct scoop_pcmcia_dev corgi_pcmcia_scoop[] = {
 {
         .dev        = &corgiscoop_device.dev,
@@ -71,16 +102,14 @@ static struct scoop_pcmcia_dev corgi_pcmcia_scoop[] = {
 },
 };
 
-struct platform_device corgiscoop_device = {
-        .name           = "sharp-scoop",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = &corgi_scoop_setup,
-        },
-        .num_resources  = ARRAY_SIZE(corgi_scoop_resources),
-        .resource       = corgi_scoop_resources,
+static struct scoop_pcmcia_config corgi_pcmcia_config = {
+        .devs         = &corgi_pcmcia_scoop[0],
+        .num_devs     = 1,
+        .pcmcia_init  = corgi_pcmcia_init,
 };
 
+EXPORT_SYMBOL(corgiscoop_device);
+
 
 /*
  * Corgi SSP Device
@@ -294,8 +323,7 @@ static void __init corgi_init(void)
         pxa_set_mci_info(&corgi_mci_platform_data);
         pxa_set_ficp_info(&corgi_ficp_platform_data);
 
-        scoop_num = 1;
-        scoop_devs = &corgi_pcmcia_scoop[0];
+        platform_scoop_config = &corgi_pcmcia_config;
 
         platform_add_devices(devices, ARRAY_SIZE(devices));
 }
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index ad6a13f95a62..eef3de26ad37 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -65,6 +65,27 @@ struct platform_device poodle_scoop_device = {
         .resource       = poodle_scoop_resources,
 };
 
+static void poodle_pcmcia_init(void)
+{
+        /* Setup default state of GPIO outputs
+           before we enable them as outputs. */
+        GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) |
+                GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) |
+                GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO52_nPCE_1) |
+                GPIO_bit(GPIO53_nPCE_2);
+
+        pxa_gpio_mode(GPIO48_nPOE_MD);
+        pxa_gpio_mode(GPIO49_nPWE_MD);
+        pxa_gpio_mode(GPIO50_nPIOR_MD);
+        pxa_gpio_mode(GPIO51_nPIOW_MD);
+        pxa_gpio_mode(GPIO55_nPREG_MD);
+        pxa_gpio_mode(GPIO56_nPWAIT_MD);
+        pxa_gpio_mode(GPIO57_nIOIS16_MD);
+        pxa_gpio_mode(GPIO52_nPCE_1_MD);
+        pxa_gpio_mode(GPIO53_nPCE_2_MD);
+        pxa_gpio_mode(GPIO54_pSKTSEL_MD);
+}
+
 static struct scoop_pcmcia_dev poodle_pcmcia_scoop[] = {
 {
         .dev        = &poodle_scoop_device.dev,
@@ -74,6 +95,14 @@ static struct scoop_pcmcia_dev poodle_pcmcia_scoop[] = {
 },
 };
 
+static struct scoop_pcmcia_config poodle_pcmcia_config = {
+        .devs         = &poodle_pcmcia_scoop[0],
+        .num_devs     = 1,
+        .pcmcia_init  = poodle_pcmcia_init,
+};
+
+EXPORT_SYMBOL(poodle_scoop_device);
+
 
 /* LoCoMo device */
 static struct resource locomo_resources[] = {
@@ -268,8 +297,7 @@ static void __init poodle_init(void)
         pxa_set_mci_info(&poodle_mci_platform_data);
         pxa_set_ficp_info(&poodle_ficp_platform_data);
 
-        scoop_num = 1;
-        scoop_devs = &poodle_pcmcia_scoop[0];
+        platform_scoop_config = &poodle_pcmcia_config;
 
         ret = platform_add_devices(devices, ARRAY_SIZE(devices));
         if (ret) {
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 6c6878cd2207..4e9a699ee428 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -104,6 +104,66 @@ struct platform_device spitzscoop2_device = {
         .resource       = spitz_scoop2_resources,
 };
 
+#define SPITZ_PWR_SD 0x01
+#define SPITZ_PWR_CF 0x02
+
+/* Power control is shared with between one of the CF slots and SD */
+static void spitz_card_pwr_ctrl(int device, unsigned short new_cpr)
+{
+        unsigned short cpr = read_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR);
+
+        if (new_cpr & 0x0007) {
+                set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CF_POWER);
+                if (!(cpr & 0x0002) && !(cpr & 0x0004))
+                        mdelay(5);
+                if (device == SPITZ_PWR_CF)
+                        cpr |= 0x0002;
+                if (device == SPITZ_PWR_SD)
+                        cpr |= 0x0004;
+                write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, cpr | new_cpr);
+        } else {
+                if (device == SPITZ_PWR_CF)
+                        cpr &= ~0x0002;
+                if (device == SPITZ_PWR_SD)
+                        cpr &= ~0x0004;
+                write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, cpr | new_cpr);
+                if (!(cpr & 0x0002) && !(cpr & 0x0004)) {
+                        mdelay(1);
+                        reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CF_POWER);
+                }
+        }
+}
+
+static void spitz_pcmcia_init(void)
+{
+        /* Setup default state of GPIO outputs
+           before we enable them as outputs. */
+        GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) |
+                GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) |
+                GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO54_nPCE_2);
+        GPSR(GPIO85_nPCE_1) = GPIO_bit(GPIO85_nPCE_1);
+
+        pxa_gpio_mode(GPIO48_nPOE_MD);
+        pxa_gpio_mode(GPIO49_nPWE_MD);
+        pxa_gpio_mode(GPIO50_nPIOR_MD);
+        pxa_gpio_mode(GPIO51_nPIOW_MD);
+        pxa_gpio_mode(GPIO55_nPREG_MD);
+        pxa_gpio_mode(GPIO56_nPWAIT_MD);
+        pxa_gpio_mode(GPIO57_nIOIS16_MD);
+        pxa_gpio_mode(GPIO85_nPCE_1_MD);
+        pxa_gpio_mode(GPIO54_nPCE_2_MD);
+        pxa_gpio_mode(GPIO104_pSKTSEL_MD);
+}
+
+static void spitz_pcmcia_pwr(struct device *scoop, unsigned short cpr, int nr)
+{
+        /* Only need to override behaviour for slot 0 */
+        if (nr == 0)
+                spitz_card_pwr_ctrl(SPITZ_PWR_CF, cpr);
+        else
+                write_scoop_reg(scoop, SCOOP_CPR, cpr);
+}
+
 static struct scoop_pcmcia_dev spitz_pcmcia_scoop[] = {
 {
         .dev        = &spitzscoop_device.dev,
@@ -117,6 +177,16 @@ static struct scoop_pcmcia_dev spitz_pcmcia_scoop[] = {
 },
 };
 
+static struct scoop_pcmcia_config spitz_pcmcia_config = {
+        .devs         = &spitz_pcmcia_scoop[0],
+        .num_devs     = 2,
+        .pcmcia_init  = spitz_pcmcia_init,
+        .power_ctrl   = spitz_pcmcia_pwr,
+};
+
+EXPORT_SYMBOL(spitzscoop_device);
+EXPORT_SYMBOL(spitzscoop2_device);
+
 
 /*
  * Spitz SSP Device
@@ -235,27 +305,14 @@ static int spitz_mci_init(struct device *dev, irqreturn_t (*spitz_detect_int)(in
         return 0;
 }
 
-/* Power control is shared with one of the CF slots so we have a mess */
 static void spitz_mci_setpower(struct device *dev, unsigned int vdd)
 {
         struct pxamci_platform_data* p_d = dev->platform_data;
 
-        unsigned short cpr = read_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR);
-
-        if (( 1 << vdd) & p_d->ocr_mask) {
-                /* printk(KERN_DEBUG "%s: on\n", __FUNCTION__); */
-                set_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CF_POWER);
-                mdelay(2);
-                write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, cpr | 0x04);
-        } else {
-                /* printk(KERN_DEBUG "%s: off\n", __FUNCTION__); */
-                write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, cpr & ~0x04);
-
-                if (!(cpr | 0x02)) {
-                        mdelay(1);
-                        reset_scoop_gpio(&spitzscoop_device.dev, SPITZ_SCP_CF_POWER);
-                }
-        }
+        if (( 1 << vdd) & p_d->ocr_mask)
+                spitz_card_pwr_ctrl(SPITZ_PWR_SD, 0x0004);
+        else
+                spitz_card_pwr_ctrl(SPITZ_PWR_SD, 0x0000);
 }
 
 static int spitz_mci_get_ro(struct device *dev)
@@ -351,8 +408,8 @@ static void __init common_init(void)
 
 static void __init spitz_init(void)
 {
-        scoop_num = 2;
-        scoop_devs = &spitz_pcmcia_scoop[0];
+        platform_scoop_config = &spitz_pcmcia_config;
+
         spitz_bl_machinfo.set_bl_intensity = spitz_bl_set_intensity;
 
         common_init();
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 7dad3f1465e0..b9b2057349eb 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -132,11 +132,13 @@ static void __init pxa_timer_init(void)
         tv.tv_sec = pxa_get_rtc_time();
         do_settimeofday(&tv);
 
-        OSMR0 = 0;              /* set initial match at 0 */
+        OIER = 0;               /* disable any timer interrupts */
+        OSCR = LATCH*2;         /* push OSCR out of the way */
+        OSMR0 = LATCH;          /* set initial match */
         OSSR = 0xf;             /* clear status on all timers */
         setup_irq(IRQ_OST0, &pxa_timer_irq);
-        OIER |= OIER_E0;        /* enable match on timer 0 to cause interrupts */
-        OSCR = 0;               /* initialize free-running timer, force first match */
+        OIER = OIER_E0;         /* enable match on timer 0 to cause interrupts */
+        OSCR = 0;               /* initialize free-running timer */
 }
 
 #ifdef CONFIG_NO_IDLE_HZ
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 400609f8b6a8..c312054dfb88 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -98,6 +98,9 @@ struct platform_device tosascoop_jc_device = {
         .resource       = tosa_scoop_jc_resources,
 };
 
+/*
+ * PCMCIA
+ */
 static struct scoop_pcmcia_dev tosa_pcmcia_scoop[] = {
 {
         .dev        = &tosascoop_device.dev,
@@ -111,16 +114,155 @@ static struct scoop_pcmcia_dev tosa_pcmcia_scoop[] = {
 },
 };
 
+static void tosa_pcmcia_init(void)
+{
+        /* Setup default state of GPIO outputs
+           before we enable them as outputs. */
+        GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) |
+                GPIO_bit(GPIO49_nPWE) | GPIO_bit(GPIO50_nPIOR) |
+                GPIO_bit(GPIO51_nPIOW) | GPIO_bit(GPIO52_nPCE_1) |
+                GPIO_bit(GPIO53_nPCE_2);
+
+        pxa_gpio_mode(GPIO48_nPOE_MD);
+        pxa_gpio_mode(GPIO49_nPWE_MD);
+        pxa_gpio_mode(GPIO50_nPIOR_MD);
+        pxa_gpio_mode(GPIO51_nPIOW_MD);
+        pxa_gpio_mode(GPIO55_nPREG_MD);
+        pxa_gpio_mode(GPIO56_nPWAIT_MD);
+        pxa_gpio_mode(GPIO57_nIOIS16_MD);
+        pxa_gpio_mode(GPIO52_nPCE_1_MD);
+        pxa_gpio_mode(GPIO53_nPCE_2_MD);
+        pxa_gpio_mode(GPIO54_pSKTSEL_MD);
+}
+
+static struct scoop_pcmcia_config tosa_pcmcia_config = {
+        .devs         = &tosa_pcmcia_scoop[0],
+        .num_devs     = 2,
+        .pcmcia_init  = tosa_pcmcia_init,
+};
+
+/*
+ * USB Device Controller
+ */
+static void tosa_udc_command(int cmd)
+{
+        switch(cmd)     {
+                case PXA2XX_UDC_CMD_CONNECT:
+                        set_scoop_gpio(&tosascoop_jc_device.dev,TOSA_SCOOP_JC_USB_PULLUP);
+                        break;
+                case PXA2XX_UDC_CMD_DISCONNECT:
+                        reset_scoop_gpio(&tosascoop_jc_device.dev,TOSA_SCOOP_JC_USB_PULLUP);
+                        break;
+        }
+}
+
+static int tosa_udc_is_connected(void)
+{
+        return ((GPLR(TOSA_GPIO_USB_IN) & GPIO_bit(TOSA_GPIO_USB_IN)) == 0);
+}
+
+
+static struct pxa2xx_udc_mach_info udc_info __initdata = {
+        .udc_command            = tosa_udc_command,
+        .udc_is_connected       = tosa_udc_is_connected,
+};
+
+/*
+ * MMC/SD Device
+ */
+static struct pxamci_platform_data tosa_mci_platform_data;
+
+static int tosa_mci_init(struct device *dev, irqreturn_t (*tosa_detect_int)(int, void *, struct pt_regs *), void *data)
+{
+        int err;
+
+        /* setup GPIO for PXA25x MMC controller */
+        pxa_gpio_mode(GPIO6_MMCCLK_MD);
+        pxa_gpio_mode(GPIO8_MMCCS0_MD);
+        pxa_gpio_mode(TOSA_GPIO_nSD_DETECT | GPIO_IN);
+
+        tosa_mci_platform_data.detect_delay = msecs_to_jiffies(250);
+
+        err = request_irq(TOSA_IRQ_GPIO_nSD_DETECT, tosa_detect_int, SA_INTERRUPT,
+                                "MMC/SD card detect", data);
+        if (err) {
+                printk(KERN_ERR "tosa_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
+                return -1;
+        }
+
+        set_irq_type(TOSA_IRQ_GPIO_nSD_DETECT, IRQT_BOTHEDGE);
+
+        return 0;
+}
+
+static void tosa_mci_setpower(struct device *dev, unsigned int vdd)
+{
+        struct pxamci_platform_data* p_d = dev->platform_data;
+
+        if (( 1 << vdd) & p_d->ocr_mask) {
+                set_scoop_gpio(&tosascoop_device.dev,TOSA_SCOOP_PWR_ON);
+        } else {
+                reset_scoop_gpio(&tosascoop_device.dev,TOSA_SCOOP_PWR_ON);
+        }
+}
+
+static int tosa_mci_get_ro(struct device *dev)
+{
+        return (read_scoop_reg(&tosascoop_device.dev, SCOOP_GPWR)&TOSA_SCOOP_SD_WP);
+}
+
+static void tosa_mci_exit(struct device *dev, void *data)
+{
+        free_irq(TOSA_IRQ_GPIO_nSD_DETECT, data);
+}
+
+static struct pxamci_platform_data tosa_mci_platform_data = {
+        .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
+        .init           = tosa_mci_init,
+        .get_ro         = tosa_mci_get_ro,
+        .setpower       = tosa_mci_setpower,
+        .exit           = tosa_mci_exit,
+};
+
+/*
+ * Irda
+ */
+static void tosa_irda_transceiver_mode(struct device *dev, int mode)
+{
+        if (mode & IR_OFF) {
+                reset_scoop_gpio(&tosascoop_device.dev,TOSA_SCOOP_IR_POWERDWN);
+                pxa_gpio_mode(GPIO47_STTXD|GPIO_DFLT_LOW);
+                pxa_gpio_mode(GPIO47_STTXD|GPIO_OUT);
+        } else {
+                pxa_gpio_mode(GPIO47_STTXD_MD);
+                set_scoop_gpio(&tosascoop_device.dev,TOSA_SCOOP_IR_POWERDWN);
+        }
+}
+
+static struct pxaficp_platform_data tosa_ficp_platform_data = {
+        .transceiver_cap  = IR_SIRMODE | IR_OFF,
+        .transceiver_mode = tosa_irda_transceiver_mode,
+};
+
+/*
+ * Tosa Keyboard
+ */
+static struct platform_device tosakbd_device = {
+        .name           = "tosa-keyboard",
+        .id             = -1,
+};
 
 static struct platform_device *devices[] __initdata = {
         &tosascoop_device,
         &tosascoop_jc_device,
+        &tosakbd_device,
 };
 
 static void __init tosa_init(void)
 {
         pxa_gpio_mode(TOSA_GPIO_ON_RESET | GPIO_IN);
         pxa_gpio_mode(TOSA_GPIO_TC6393_INT | GPIO_IN);
+        pxa_gpio_mode(TOSA_GPIO_USB_IN | GPIO_IN);
 
         /* setup sleep mode values */
         PWER  = 0x00000002;
@@ -131,13 +273,15 @@ static void __init tosa_init(void)
         PGSR2 = 0x00014000;
         PCFR |= PCFR_OPDE;
 
-        // enable batt_fault
+        /* enable batt_fault */
         PMCR = 0x01;
 
-        platform_add_devices(devices, ARRAY_SIZE(devices));
+        pxa_set_mci_info(&tosa_mci_platform_data);
+        pxa_set_udc_info(&udc_info);
+        pxa_set_ficp_info(&tosa_ficp_platform_data);
+        platform_scoop_config = &tosa_pcmcia_config;
 
-        scoop_num = 2;
-        scoop_devs = &tosa_pcmcia_scoop[0];
+        platform_add_devices(devices, ARRAY_SIZE(devices));
 }
 
 static void __init fixup_tosa(struct machine_desc *desc,
diff --git a/arch/arm/mach-realview/Makefile b/arch/arm/mach-realview/Makefile
index 011a85c10627..36e76ba937fc 100644
--- a/arch/arm/mach-realview/Makefile
+++ b/arch/arm/mach-realview/Makefile
@@ -5,3 +5,5 @@
 obj-y                                   := core.o clock.o
 obj-$(CONFIG_MACH_REALVIEW_EB)          += realview_eb.o
 obj-$(CONFIG_SMP)                       += platsmp.o headsmp.o
+obj-$(CONFIG_HOTPLUG_CPU)               += hotplug.o
+obj-$(CONFIG_LOCAL_TIMERS)              += localtimer.o
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 482eb512ebe8..e2c6fa23d3cd 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -550,6 +550,11 @@ static irqreturn_t realview_timer_interrupt(int irq, void *dev_id, struct pt_reg
 
         timer_tick(regs);
 
+#if defined(CONFIG_SMP) && !defined(CONFIG_LOCAL_TIMERS)
+        smp_send_timer();
+        update_process_times(user_mode(regs));
+#endif
+
         write_sequnlock(&xtime_lock);
 
         return IRQ_HANDLED;
diff --git a/arch/arm/mach-realview/hotplug.c b/arch/arm/mach-realview/hotplug.c
new file mode 100644
index 000000000000..09748cbcd10e
--- /dev/null
+++ b/arch/arm/mach-realview/hotplug.c
@@ -0,0 +1,138 @@
+/*
+ *  linux/arch/arm/mach-realview/hotplug.c
+ *
+ *  Copyright (C) 2002 ARM Ltd.
+ *  All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/smp.h>
+#include <linux/completion.h>
+
+extern volatile int pen_release;
+
+static DECLARE_COMPLETION(cpu_killed);
+
+static inline void cpu_enter_lowpower(void)
+{
+        unsigned int v;
+
+        asm volatile(   "mcr    p15, 0, %1, c7, c14, 0\n"
+        "       mcr     p15, 0, %1, c7, c5, 0\n"
+        "       mcr     p15, 0, %1, c7, c10, 4\n"
+        /*
+         * Turn off coherency
+         */
+        "       mrc     p15, 0, %0, c1, c0, 1\n"
+        "       bic     %0, %0, #0x20\n"
+        "       mcr     p15, 0, %0, c1, c0, 1\n"
+        "       mrc     p15, 0, %0, c1, c0, 0\n"
+        "       bic     %0, %0, #0x04\n"
+        "       mcr     p15, 0, %0, c1, c0, 0\n"
+          : "=&r" (v)
+          : "r" (0)
+          : "cc");
+}
+
+static inline void cpu_leave_lowpower(void)
+{
+        unsigned int v;
+
+        asm volatile(   "mrc    p15, 0, %0, c1, c0, 0\n"
+        "       orr     %0, %0, #0x04\n"
+        "       mcr     p15, 0, %0, c1, c0, 0\n"
+        "       mrc     p15, 0, %0, c1, c0, 1\n"
+        "       orr     %0, %0, #0x20\n"
+        "       mcr     p15, 0, %0, c1, c0, 1\n"
+          : "=&r" (v)
+          :
+          : "cc");
+}
+
+static inline void platform_do_lowpower(unsigned int cpu)
+{
+        /*
+         * there is no power-control hardware on this platform, so all
+         * we can do is put the core into WFI; this is safe as the calling
+         * code will have already disabled interrupts
+         */
+        for (;;) {
+                /*
+                 * here's the WFI
+                 */
+                asm(".word      0xe320f003\n"
+                    :
+                    :
+                    : "memory", "cc");
+
+                if (pen_release == cpu) {
+                        /*
+                         * OK, proper wakeup, we're done
+                         */
+                        break;
+                }
+
+                /*
+                 * getting here, means that we have come out of WFI without
+                 * having been woken up - this shouldn't happen
+                 *
+                 * The trouble is, letting people know about this is not really
+                 * possible, since we are currently running incoherently, and
+                 * therefore cannot safely call printk() or anything else
+                 */
+#ifdef DEBUG
+                printk("CPU%u: spurious wakeup call\n", cpu);
+#endif
+        }
+}
+
+int platform_cpu_kill(unsigned int cpu)
+{
+        return wait_for_completion_timeout(&cpu_killed, 5000);
+}
+
+/*
+ * platform-specific code to shutdown a CPU
+ *
+ * Called with IRQs disabled
+ */
+void platform_cpu_die(unsigned int cpu)
+{
+#ifdef DEBUG
+        unsigned int this_cpu = hard_smp_processor_id();
+
+        if (cpu != this_cpu) {
+                printk(KERN_CRIT "Eek! platform_cpu_die running on %u, should be %u\n",
+                           this_cpu, cpu);
+                BUG();
+        }
+#endif
+
+        printk(KERN_NOTICE "CPU%u: shutdown\n", cpu);
+        complete(&cpu_killed);
+
+        /*
+         * we're ready for shutdown now, so do it
+         */
+        cpu_enter_lowpower();
+        platform_do_lowpower(cpu);
+
+        /*
+         * bring this CPU back into the world of cache
+         * coherency, and then restore interrupts
+         */
+        cpu_leave_lowpower();
+}
+
+int mach_cpu_disable(unsigned int cpu)
+{
+        /*
+         * we don't allow CPU 0 to be shutdown (it is still too special
+         * e.g. clock tick interrupts)
+         */
+        return cpu == 0 ? -EPERM : 0;
+}
diff --git a/arch/arm/mach-realview/localtimer.c b/arch/arm/mach-realview/localtimer.c
new file mode 100644
index 000000000000..5e917e37d095
--- /dev/null
+++ b/arch/arm/mach-realview/localtimer.c
@@ -0,0 +1,130 @@
+/*
+ *  linux/arch/arm/mach-realview/localtimer.c
+ *
+ *  Copyright (C) 2002 ARM Ltd.
+ *  All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/smp.h>
+
+#include <asm/mach/time.h>
+#include <asm/hardware/arm_twd.h>
+#include <asm/hardware/gic.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+
+#include "core.h"
+
+#define TWD_BASE(cpu)   (__io_address(REALVIEW_TWD_BASE) + \
+                         ((cpu) * REALVIEW_TWD_SIZE))
+
+static unsigned long mpcore_timer_rate;
+
+/*
+ * local_timer_ack: checks for a local timer interrupt.
+ *
+ * If a local timer interrupt has occured, acknowledge and return 1.
+ * Otherwise, return 0.
+ */
+int local_timer_ack(void)
+{
+        void __iomem *base = TWD_BASE(smp_processor_id());
+
+        if (__raw_readl(base + TWD_TIMER_INTSTAT)) {
+                __raw_writel(1, base + TWD_TIMER_INTSTAT);
+                return 1;
+        }
+
+        return 0;
+}
+
+void __cpuinit local_timer_setup(unsigned int cpu)
+{
+        void __iomem *base = TWD_BASE(cpu);
+        unsigned int load, offset;
+        u64 waitjiffies;
+        unsigned int count;
+
+        /*
+         * If this is the first time round, we need to work out how fast
+         * the timer ticks
+         */
+        if (mpcore_timer_rate == 0) {
+                printk("Calibrating local timer... ");
+
+                /* Wait for a tick to start */
+                waitjiffies = get_jiffies_64() + 1;
+
+                while (get_jiffies_64() < waitjiffies)
+                        udelay(10);
+
+                /* OK, now the tick has started, let's get the timer going */
+                waitjiffies += 5;
+
+                                 /* enable, no interrupt or reload */
+                __raw_writel(0x1, base + TWD_TIMER_CONTROL);
+
+                                 /* maximum value */
+                __raw_writel(0xFFFFFFFFU, base + TWD_TIMER_COUNTER);
+
+                while (get_jiffies_64() < waitjiffies)
+                        udelay(10);
+
+                count = __raw_readl(base + TWD_TIMER_COUNTER);
+
+                mpcore_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
+
+                printk("%lu.%02luMHz.\n", mpcore_timer_rate / 1000000,
+                        (mpcore_timer_rate / 100000) % 100);
+        }
+
+        load = mpcore_timer_rate / HZ;
+
+        __raw_writel(load, base + TWD_TIMER_LOAD);
+        __raw_writel(0x7,  base + TWD_TIMER_CONTROL);
+
+        /*
+         * Now maneuver our local tick into the right part of the jiffy.
+         * Start by working out where within the tick our local timer
+         * interrupt should go.
+         */
+        offset = ((mpcore_timer_rate / HZ) / (NR_CPUS + 1)) * (cpu + 1);
+
+        /*
+         * gettimeoffset() will return a number of us since the last tick.
+         * Convert this number of us to a local timer tick count.
+         * Be careful of integer overflow whilst keeping maximum precision.
+         *
+         * with HZ=100 and 1MHz (fpga) ~ 1GHz processor:
+         * load = 1 ~ 10,000
+         * mpcore_timer_rate/10000 = 100 ~ 100,000
+         *
+         * so the multiply value will be less than 10^9 always.
+         */
+        load = (system_timer->offset() * (mpcore_timer_rate / 10000)) / 100;
+
+        /* Add on our offset to get the load value */
+        load = (load + offset) % (mpcore_timer_rate / HZ);
+
+        __raw_writel(load, base + TWD_TIMER_COUNTER);
+
+        /* Make sure our local interrupt controller has this enabled */
+        __raw_writel(1 << IRQ_LOCALTIMER,
+                     __io_address(REALVIEW_GIC_DIST_BASE) + GIC_DIST_ENABLE_SET);
+}
+
+/*
+ * take a local timer down
+ */
+void __cpuexit local_timer_stop(unsigned int cpu)
+{
+        __raw_writel(0, TWD_BASE(cpu) + TWD_TIMER_CONTROL);
+}
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index 9844644d0fb5..0c7d4ac9a7b3 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -32,7 +32,7 @@ static unsigned int __init get_core_count(void)
 {
         unsigned int ncores;
 
-        ncores = __raw_readl(IO_ADDRESS(REALVIEW_MPCORE_SCU_BASE) + SCU_CONFIG);
+        ncores = __raw_readl(__io_address(REALVIEW_MPCORE_SCU_BASE) + SCU_CONFIG);
 
         return (ncores & 0x03) + 1;
 }
@@ -133,12 +133,12 @@ static void __init poke_milo(void)
 #if 1
 #define REALVIEW_SYS_FLAGSS_OFFSET 0x30
         __raw_writel(virt_to_phys(realview_secondary_startup),
-                     (IO_ADDRESS(REALVIEW_SYS_BASE) +
-                      REALVIEW_SYS_FLAGSS_OFFSET));
+                     __io_address(REALVIEW_SYS_BASE) +
+                     REALVIEW_SYS_FLAGSS_OFFSET);
 #define REALVIEW_SYS_FLAGSC_OFFSET 0x34
         __raw_writel(3,
-                     (IO_ADDRESS(REALVIEW_SYS_BASE) +
-                      REALVIEW_SYS_FLAGSC_OFFSET));
+                     __io_address(REALVIEW_SYS_BASE) +
+                     REALVIEW_SYS_FLAGSC_OFFSET);
 #endif
 
         mb();
@@ -175,6 +175,11 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
                 max_cpus = ncores;
 
         /*
+         * Enable the local timer for primary CPU
+         */
+        local_timer_setup(cpu);
+
+        /*
          * Initialise the possible/present maps.
          * cpu_possible_map describes the set of CPUs which may be present
          * cpu_present_map describes the set of CPUs populated
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index c796bcdd6158..0b9d7ca49ec1 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -121,6 +121,14 @@ config S3C2410_BOOT_WATCHDOG
           system resets depends on the value of PCLK. The timeout on an
           200MHz s3c2410 should be about 30 seconds.
 
+config S3C2410_BOOT_ERROR_RESET
+        bool "S3C2410 Reboot on decompression error"
+        depends on ARCH_S3C2410
+        help
+          Say y here to use the watchdog to reset the system if the
+          kernel decompressor detects an error during decompression.
+
+
 comment "S3C2410 Setup"
 
 config S3C2410_DMA
diff --git a/arch/arm/mach-s3c2410/mach-anubis.c b/arch/arm/mach-s3c2410/mach-anubis.c
index 8390b685c2b6..0f81fc0c2f7f 100644
--- a/arch/arm/mach-s3c2410/mach-anubis.c
+++ b/arch/arm/mach-s3c2410/mach-anubis.c
@@ -56,8 +56,16 @@
 static struct map_desc anubis_iodesc[] __initdata = {
   /* ISA IO areas */
 
-  { (u32)S3C24XX_VA_ISA_BYTE, 0x0,         SZ_16M, MT_DEVICE },
-  { (u32)S3C24XX_VA_ISA_WORD, 0x0,         SZ_16M, MT_DEVICE },
+  {
+        .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
+        .pfn            = __phys_to_pfn(0x0),
+        .length         = SZ_4M,
+        .type           = MT_DEVICE
+  }, {
+        .virtual        = (u32)S3C24XX_VA_ISA_WORD,
+        .pfn            = __phys_to_pfn(0x0),
+        .length         = SZ_4M, MT_DEVICE
+  },
 
   /* we could possibly compress the next set down into a set of smaller tables
    * pagetables, but that would mean using an L2 section, and it still means
@@ -66,16 +74,41 @@ static struct map_desc anubis_iodesc[] __initdata = {
 
   /* CPLD control registers */
 
-  { (u32)ANUBIS_VA_CTRL1,       ANUBIS_PA_CTRL1,        SZ_4K, MT_DEVICE },
-  { (u32)ANUBIS_VA_CTRL2,       ANUBIS_PA_CTRL2,        SZ_4K, MT_DEVICE },
+  {
+        .virtual        = (u32)ANUBIS_VA_CTRL1,
+        .pfn            = __phys_to_pfn(ANUBIS_PA_CTRL1),
+        .length         = SZ_4K,
+        .type           = MT_DEVICE
+  }, {
+        .virtual        = (u32)ANUBIS_VA_CTRL2,
+        .pfn            = __phys_to_pfn(ANUBIS_PA_CTRL2),
+        .length         = SZ_4K,
+        .type           =MT_DEVICE
+  },
 
   /* IDE drives */
 
-  { (u32)ANUBIS_IDEPRI,         S3C2410_CS3,            SZ_1M, MT_DEVICE },
-  { (u32)ANUBIS_IDEPRIAUX,      S3C2410_CS3+(1<<26),    SZ_1M, MT_DEVICE },
-
-  { (u32)ANUBIS_IDESEC,         S3C2410_CS4,            SZ_1M, MT_DEVICE },
-  { (u32)ANUBIS_IDESECAUX,      S3C2410_CS4+(1<<26),    SZ_1M, MT_DEVICE },
+  {
+        .virtual        = (u32)ANUBIS_IDEPRI,
+        .pfn            = __phys_to_pfn(S3C2410_CS3),
+        .length         = SZ_1M,
+        .type           = MT_DEVICE
+  }, {
+        .virtual        = (u32)ANUBIS_IDEPRIAUX,
+        .pfn            = __phys_to_pfn(S3C2410_CS3+(1<<26)),
+        .length         = SZ_1M,
+        .type           = MT_DEVICE
+  }, {
+        .virtual        = (u32)ANUBIS_IDESEC,
+        .pfn            = __phys_to_pfn(S3C2410_CS4),
+        .length         = SZ_1M,
+        .type           = MT_DEVICE
+  }, {
+        .virtual        = (u32)ANUBIS_IDESECAUX,
+        .pfn            = __phys_to_pfn(S3C2410_CS4+(1<<26)),
+        .length         = SZ_1M,
+        .type           = MT_DEVICE
+  },
 };
 
 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 0b71c896bbd1..1be2567a7486 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -89,32 +89,63 @@
 
 /* macros to modify the physical addresses for io space */
 
-#define PA_CS2(item) ((item) + S3C2410_CS2)
-#define PA_CS3(item) ((item) + S3C2410_CS3)
-#define PA_CS4(item) ((item) + S3C2410_CS4)
-#define PA_CS5(item) ((item) + S3C2410_CS5)
+#define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
+#define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
+#define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
+#define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
 
 static struct map_desc bast_iodesc[] __initdata = {
   /* ISA IO areas */
-
-  { (u32)S3C24XX_VA_ISA_BYTE, PA_CS2(BAST_PA_ISAIO),   SZ_16M, MT_DEVICE },
-  { (u32)S3C24XX_VA_ISA_WORD, PA_CS3(BAST_PA_ISAIO),   SZ_16M, MT_DEVICE },
-
-  /* we could possibly compress the next set down into a set of smaller tables
-   * pagetables, but that would mean using an L2 section, and it still means
-   * we cannot actually feed the same register to an LDR due to 16K spacing
-   */
-
+  {
+          .virtual      = (u32)S3C24XX_VA_ISA_BYTE,
+          .pfn          = PA_CS2(BAST_PA_ISAIO),
+          .length       = SZ_16M,
+          .type         = MT_DEVICE,
+  }, {
+          .virtual      = (u32)S3C24XX_VA_ISA_WORD,
+          .pfn          = PA_CS3(BAST_PA_ISAIO),
+          .length       = SZ_16M,
+          .type         = MT_DEVICE,
+  },
   /* bast CPLD control registers, and external interrupt controls */
-  { (u32)BAST_VA_CTRL1, BAST_PA_CTRL1,             SZ_1M, MT_DEVICE },
-  { (u32)BAST_VA_CTRL2, BAST_PA_CTRL2,             SZ_1M, MT_DEVICE },
-  { (u32)BAST_VA_CTRL3, BAST_PA_CTRL3,             SZ_1M, MT_DEVICE },
-  { (u32)BAST_VA_CTRL4, BAST_PA_CTRL4,             SZ_1M, MT_DEVICE },
-
+  {
+          .virtual      = (u32)BAST_VA_CTRL1,
+          .pfn          = __phys_to_pfn(BAST_PA_CTRL1),
+          .length       = SZ_1M,
+          .type         = MT_DEVICE,
+  }, {
+          .virtual      = (u32)BAST_VA_CTRL2,
+          .pfn          = __phys_to_pfn(BAST_PA_CTRL2),
+          .length       = SZ_1M,
+          .type         = MT_DEVICE,
+  }, {
+          .virtual      = (u32)BAST_VA_CTRL3,
+          .pfn          = __phys_to_pfn(BAST_PA_CTRL3),
+          .length       = SZ_1M,
+          .type         = MT_DEVICE,
+  }, {
+          .virtual      = (u32)BAST_VA_CTRL4,
+          .pfn          = __phys_to_pfn(BAST_PA_CTRL4),
+          .length       = SZ_1M,
+          .type         = MT_DEVICE,
+  },
   /* PC104 IRQ mux */
-  { (u32)BAST_VA_PC104_IRQREQ,  BAST_PA_PC104_IRQREQ,   SZ_1M, MT_DEVICE },
-  { (u32)BAST_VA_PC104_IRQRAW,  BAST_PA_PC104_IRQRAW,   SZ_1M, MT_DEVICE },
-  { (u32)BAST_VA_PC104_IRQMASK, BAST_PA_PC104_IRQMASK,  SZ_1M, MT_DEVICE },
+  {
+          .virtual      = (u32)BAST_VA_PC104_IRQREQ,
+          .pfn          = __phys_to_pfn(BAST_PA_PC104_IRQREQ),
+          .length       = SZ_1M,
+          .type         = MT_DEVICE,
+  }, {
+          .virtual      = (u32)BAST_VA_PC104_IRQRAW,
+          .pfn          = __phys_to_pfn(BAST_PA_PC104_IRQRAW),
+          .length       = SZ_1M,
+          .type         = MT_DEVICE,
+  }, {
+          .virtual      = (u32)BAST_VA_PC104_IRQMASK,
+          .pfn          = __phys_to_pfn(BAST_PA_PC104_IRQMASK),
+          .length       = SZ_1M,
+          .type         = MT_DEVICE,
+  },
 
   /* peripheral space... one for each of fast/slow/byte/16bit */
   /* note, ide is only decoded in word space, even though some registers
diff --git a/arch/arm/mach-s3c2410/mach-rx3715.c b/arch/arm/mach-s3c2410/mach-rx3715.c
index 24d69019a843..f8d86d1e16b6 100644
--- a/arch/arm/mach-s3c2410/mach-rx3715.c
+++ b/arch/arm/mach-s3c2410/mach-rx3715.c
@@ -56,8 +56,17 @@
 static struct map_desc rx3715_iodesc[] __initdata = {
         /* dump ISA space somewhere unused */
 
-        { (u32)S3C24XX_VA_ISA_WORD, S3C2410_CS3, SZ_16M, MT_DEVICE },
-        { (u32)S3C24XX_VA_ISA_BYTE, S3C2410_CS3, SZ_16M, MT_DEVICE },
+        {
+                .virtual        = (u32)S3C24XX_VA_ISA_WORD,
+                .pfn            = __phys_to_pfn(S3C2410_CS3),
+                .length         = SZ_1M,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
+                .pfn            = __phys_to_pfn(S3C2410_CS3),
+                .length         = SZ_1M,
+                .type           = MT_DEVICE,
+        },
 };
 
 
diff --git a/arch/arm/mach-s3c2410/mach-smdk2440.c b/arch/arm/mach-s3c2410/mach-smdk2440.c
index d666c621ad06..4e31118533e6 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2440.c
@@ -58,8 +58,27 @@
 static struct map_desc smdk2440_iodesc[] __initdata = {
         /* ISA IO Space map (memory space selected by A24) */
 
-        { (u32)S3C24XX_VA_ISA_WORD, S3C2410_CS2, SZ_16M, MT_DEVICE },
-        { (u32)S3C24XX_VA_ISA_BYTE, S3C2410_CS2, SZ_16M, MT_DEVICE },
+        {
+                .virtual        = (u32)S3C24XX_VA_ISA_WORD,
+                .pfn            = __phys_to_pfn(S3C2410_CS2),
+                .length         = 0x10000,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
+                .pfn            = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
+                .length         = SZ_4M,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
+                .pfn            = __phys_to_pfn(S3C2410_CS2),
+                .length         = 0x10000,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (u32)S3C24XX_VA_ISA_BYTE + 0x10000,
+                .pfn            = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
+                .length         = SZ_4M,
+                .type           = MT_DEVICE,
+        }
 };
 
 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index 46b259673c18..ae7e099bf6c8 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -74,27 +74,47 @@
 
 /* macros to modify the physical addresses for io space */
 
-#define PA_CS2(item) ((item) + S3C2410_CS2)
-#define PA_CS3(item) ((item) + S3C2410_CS3)
-#define PA_CS4(item) ((item) + S3C2410_CS4)
-#define PA_CS5(item) ((item) + S3C2410_CS5)
+#define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
+#define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
+#define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
+#define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
 
 static struct map_desc vr1000_iodesc[] __initdata = {
   /* ISA IO areas */
-
-  { (u32)S3C24XX_VA_ISA_BYTE, PA_CS2(BAST_PA_ISAIO),       SZ_16M, MT_DEVICE },
-  { (u32)S3C24XX_VA_ISA_WORD, PA_CS3(BAST_PA_ISAIO),       SZ_16M, MT_DEVICE },
-
-  /* we could possibly compress the next set down into a set of smaller tables
-   * pagetables, but that would mean using an L2 section, and it still means
-   * we cannot actually feed the same register to an LDR due to 16K spacing
-   */
-
-  /* bast CPLD control registers, and external interrupt controls */
-  { (u32)VR1000_VA_CTRL1, VR1000_PA_CTRL1,             SZ_1M, MT_DEVICE },
-  { (u32)VR1000_VA_CTRL2, VR1000_PA_CTRL2,             SZ_1M, MT_DEVICE },
-  { (u32)VR1000_VA_CTRL3, VR1000_PA_CTRL3,             SZ_1M, MT_DEVICE },
-  { (u32)VR1000_VA_CTRL4, VR1000_PA_CTRL4,             SZ_1M, MT_DEVICE },
+  {
+          .virtual      = (u32)S3C24XX_VA_ISA_BYTE,
+          .pfn          = PA_CS2(BAST_PA_ISAIO),
+          .length       = SZ_16M,
+          .type         = MT_DEVICE,
+  }, {
+          .virtual      = (u32)S3C24XX_VA_ISA_WORD,
+          .pfn          = PA_CS3(BAST_PA_ISAIO),
+          .length       = SZ_16M,
+          .type         = MT_DEVICE,
+  },
+
+  /*  CPLD control registers, and external interrupt controls */
+  {
+          .virtual      = (u32)VR1000_VA_CTRL1,
+          .pfn          = __phys_to_pfn(VR1000_PA_CTRL1),
+          .length       = SZ_1M,
+          .type         = MT_DEVICE,
+  }, {
+          .virtual      = (u32)VR1000_VA_CTRL2,
+          .pfn          = __phys_to_pfn(VR1000_PA_CTRL2),
+          .length       = SZ_1M,
+          .type         = MT_DEVICE,
+  }, {
+          .virtual      = (u32)VR1000_VA_CTRL3,
+          .pfn          = __phys_to_pfn(VR1000_PA_CTRL3),
+          .length       = SZ_1M,
+          .type         = MT_DEVICE,
+  }, {
+          .virtual      = (u32)VR1000_VA_CTRL4,
+          .pfn          = __phys_to_pfn(VR1000_PA_CTRL4),
+          .length       = SZ_1M,
+          .type         = MT_DEVICE,
+  },
 
   /* peripheral space... one for each of fast/slow/byte/16bit */
   /* note, ide is only decoded in word space, even though some registers
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 47e0420623fc..e4b435e634e4 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -124,11 +124,13 @@ static void __init sa1100_timer_init(void)
         tv.tv_sec = sa1100_get_rtc_time();
         do_settimeofday(&tv);
 
-        OSMR0 = 0;              /* set initial match at 0 */
+        OIER = 0;               /* disable any timer interrupts */
+        OSCR = LATCH*2;         /* push OSCR out of the way */
+        OSMR0 = LATCH;          /* set initial match */
         OSSR = 0xf;             /* clear status on all timers */
         setup_irq(IRQ_OST0, &sa1100_timer_irq);
-        OIER |= OIER_E0;        /* enable match on timer 0 to cause interrupts */
-        OSCR = 0;               /* initialize free-running timer, force first match */
+        OIER = OIER_E0;         /* enable match on timer 0 to cause interrupts */
+        OSCR = 0;               /* initialize free-running timer */
 }
 
 #ifdef CONFIG_NO_IDLE_HZ
diff --git a/arch/arm/plat-omap/ocpi.c b/arch/arm/plat-omap/ocpi.c
index 1fb16f9edfd5..2ede2ee8cae4 100644
--- a/arch/arm/plat-omap/ocpi.c
+++ b/arch/arm/plat-omap/ocpi.c
@@ -25,7 +25,6 @@
 
 #include <linux/config.h>
 #include <linux/module.h>
-#include <linux/version.h>
 #include <linux/types.h>
 #include <linux/errno.h>
 #include <linux/kernel.h>