161 files changed, 1362 insertions, 1048 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 44789eff983f..e084b7e981e8 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1231,7 +1231,7 @@ config ARM_ERRATA_742231
          capabilities of the processor.
 config PL310_ERRATA_588369
-        bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
+        bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
        depends on CACHE_L2X0
        help
           The PL310 L2 cache controller implements three types of Clean &
@@ -1256,7 +1256,7 @@ config ARM_ERRATA_720789
          entries regardless of the ASID.
 config PL310_ERRATA_727915
-        bool "Background Clean & Invalidate by Way operation can cause data corruption"
+        bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
        depends on CACHE_L2X0
        help
          PL310 implements the Clean & Invalidate by Way L2 cache maintenance
@@ -1289,8 +1289,8 @@ config ARM_ERRATA_751472
          operation is received by a CPU before the ICIALLUIS has completed,
          potentially leading to corrupted entries in the cache or TLB.
-config ARM_ERRATA_753970
+config PL310_ERRATA_753970
-        bool "ARM errata: cache sync operation may be faulty"
+        bool "PL310 errata: cache sync operation may be faulty"
        depends on CACHE_PL310
        help
          This option enables the workaround for the 753970 PL310 (r3p0) erratum.
@@ -1352,6 +1352,18 @@ config ARM_ERRATA_764369
          relevant cache maintenance functions and sets a specific bit
          in the diagnostic control register of the SCU.
+config PL310_ERRATA_769419
+        bool "PL310 errata: no automatic Store Buffer drain"
+        depends on CACHE_L2X0
+        help
+          On revisions of the PL310 prior to r3p2, the Store Buffer does
+          not automatically drain. This can cause normal, non-cacheable
+          writes to be retained when the memory system is idle, leading
+          to suboptimal I/O performance for drivers using coherent DMA.
+          This option adds a write barrier to the cpu_idle loop so that,
+          on systems with an outer cache, the store buffer is drained
+          explicitly.
 endmenu
 source "arch/arm/common/Kconfig"
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts
index aeb1a7578fad..305635bd45c0 100644
--- a/arch/arm/boot/dts/highbank.dts
+++ b/arch/arm/boot/dts/highbank.dts
@@ -194,5 +194,17 @@
                        reg = <0xfff3d000 0x1000>;
                        interrupts = <0 92 4>;
                };
+                ethernet@fff50000 {
+                        compatible = "calxeda,hb-xgmac";
+                        reg = <0xfff50000 0x1000>;
+                        interrupts = <0 77 4  0 78 4  0 79 4>;
+                };
+                ethernet@fff51000 {
+                        compatible = "calxeda,hb-xgmac";
+                        reg = <0xfff51000 0x1000>;
+                        interrupts = <0 80 4  0 81 4  0 82 4>;
+                };
        };
 };
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 0e6ae470c94f..410a546060a2 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -526,7 +526,8 @@ static void __init gic_pm_init(struct gic_chip_data *gic)
                sizeof(u32));
        BUG_ON(!gic->saved_ppi_conf);
-        cpu_pm_register_notifier(&gic_notifier_block);
+        if (gic == &gic_data[0])
+                cpu_pm_register_notifier(&gic_notifier_block);
 }
 #else
 static void __init gic_pm_init(struct gic_chip_data *gic)
@@ -581,13 +582,16 @@ void __init gic_init(unsigned int gic_nr, int irq_start,
         * For primary GICs, skip over SGIs.
         * For secondary GICs, skip over PPIs, too.
         */
+        domain->hwirq_base = 32;
        if (gic_nr == 0) {
                gic_cpu_base_addr = cpu_base;
-                domain->hwirq_base = 16;
-                if (irq_start > 0)
+                if ((irq_start & 31) > 0) {
-                        irq_start = (irq_start & ~31) + 16;
+                        domain->hwirq_base = 16;
-        } else
+                        if (irq_start != -1)
-                domain->hwirq_base = 32;
+                                irq_start = (irq_start & ~31) + 16;
+                }
+        }
        /*
         * Find out how many interrupts are supported.
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c
index 7129cfbdacd6..f407a6b35d3d 100644
--- a/arch/arm/common/pl330.c
+++ b/arch/arm/common/pl330.c
@@ -1211,8 +1211,8 @@ static inline u32 _prepare_ccr(const struct pl330_reqcfg *rqc)
        ccr |= (rqc->brst_size << CC_SRCBRSTSIZE_SHFT);
        ccr |= (rqc->brst_size << CC_DSTBRSTSIZE_SHFT);
-        ccr |= (rqc->dcctl << CC_SRCCCTRL_SHFT);
+        ccr |= (rqc->scctl << CC_SRCCCTRL_SHFT);
-        ccr |= (rqc->scctl << CC_DSTCCTRL_SHFT);
+        ccr |= (rqc->dcctl << CC_DSTCCTRL_SHFT);
        ccr |= (rqc->swap << CC_SWAP_SHFT);
@@ -1623,6 +1623,11 @@ static inline int _alloc_event(struct pl330_thread *thrd)
        return -1;
 }
+static bool _chan_ns(const struct pl330_info *pi, int i)
+{
+        return pi->pcfg.irq_ns & (1 << i);
+}
 /* Upon success, returns IdentityToken for the
 * allocated channel, NULL otherwise.
 */
@@ -1647,7 +1652,8 @@ void *pl330_request_channel(const struct pl330_info *pi)
        for (i = 0; i < chans; i++) {
                thrd = &pl330->channels[i];
-                if (thrd->free) {
+                if ((thrd->free) && (!_manager_ns(thrd) ||
+                                        _chan_ns(pi, i))) {
                        thrd->ev = _alloc_event(thrd);
                        if (thrd->ev >= 0) {
                                thrd->free = false;
diff --git a/arch/arm/configs/at91cap9adk_defconfig b/arch/arm/configs/at91cap9_defconfig
index ffb1edd93363..8826eb218e73 100644
--- a/arch/arm/configs/at91cap9adk_defconfig
+++ b/arch/arm/configs/at91cap9_defconfig
@@ -38,7 +38,6 @@ CONFIG_IP_PNP_RARP=y
 # CONFIG_IPV6 is not set
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
@@ -52,16 +51,12 @@ CONFIG_MTD_NAND_ATMEL=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_ATMEL_SSC=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_MULTI_LUN=y
 CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 CONFIG_MACB=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 CONFIG_INPUT_EVDEV=y
 # CONFIG_INPUT_KEYBOARD is not set
@@ -81,7 +76,6 @@ CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_NOWAYOUT=y
 CONFIG_FB=y
 CONFIG_FB_ATMEL=y
-# CONFIG_VGA_CONSOLE is not set
 CONFIG_LOGO=y
 # CONFIG_LOGO_LINUX_MONO is not set
 # CONFIG_LOGO_LINUX_CLUT224 is not set
@@ -99,7 +93,6 @@ CONFIG_MMC_AT91=m
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AT91SAM9=y
 CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
diff --git a/arch/arm/configs/at91rm9200_defconfig b/arch/arm/configs/at91rm9200_defconfig
index 38cb7c985426..bbe4e1a1f5d8 100644
--- a/arch/arm/configs/at91rm9200_defconfig
+++ b/arch/arm/configs/at91rm9200_defconfig
@@ -5,7 +5,6 @@ CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_MODULES=y
 CONFIG_MODULE_FORCE_LOAD=y
@@ -56,7 +55,6 @@ CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 CONFIG_NET_IPIP=m
-CONFIG_NET_IPGRE=m
 CONFIG_INET_AH=m
 CONFIG_INET_ESP=m
 CONFIG_INET_IPCOMP=m
@@ -75,18 +73,8 @@ CONFIG_IPV6_TUNNEL=m
 CONFIG_BRIDGE=m
 CONFIG_VLAN_8021Q=m
 CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_SCO=m
-CONFIG_BT_RFCOMM=m
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=m
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_AFS_PARTS=y
 CONFIG_MTD_CHAR=y
@@ -108,8 +96,6 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_NBD=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_ATMEL_TCLIB=y
-CONFIG_EEPROM_LEGACY=m
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_BLK_DEV_SR=m
@@ -119,14 +105,23 @@ CONFIG_SCSI_MULTI_LUN=y
 # CONFIG_SCSI_LOWLEVEL is not set
 CONFIG_NETDEVICES=y
 CONFIG_TUN=m
+CONFIG_ARM_AT91_ETHER=y
 CONFIG_PHYLIB=y
 CONFIG_DAVICOM_PHY=y
 CONFIG_SMSC_PHY=y
 CONFIG_MICREL_PHY=y
-CONFIG_NET_ETHERNET=y
+CONFIG_PPP=y
-CONFIG_ARM_AT91_ETHER=y
+CONFIG_PPP_BSDCOMP=y
-# CONFIG_NETDEV_1000 is not set
+CONFIG_PPP_DEFLATE=y
-# CONFIG_NETDEV_10000 is not set
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_MPPE=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPPOE=m
+CONFIG_PPP_ASYNC=y
+CONFIG_SLIP=m
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLIP_SMART=y
+CONFIG_SLIP_MODE_SLIP6=y
 CONFIG_USB_CATC=m
 CONFIG_USB_KAWETH=m
 CONFIG_USB_PEGASUS=m
@@ -139,18 +134,6 @@ CONFIG_USB_NET_RNDIS_HOST=m
 CONFIG_USB_ALI_M5632=y
 CONFIG_USB_AN2720=y
 CONFIG_USB_EPSON2888=y
-CONFIG_PPP=y
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_ASYNC=y
-CONFIG_PPP_DEFLATE=y
-CONFIG_PPP_BSDCOMP=y
-CONFIG_PPP_MPPE=m
-CONFIG_PPPOE=m
-CONFIG_SLIP=m
-CONFIG_SLIP_COMPRESSED=y
-CONFIG_SLIP_SMART=y
-CONFIG_SLIP_MODE_SLIP6=y
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
@@ -158,9 +141,9 @@ CONFIG_INPUT_EVDEV=y
 CONFIG_KEYBOARD_GPIO=y
 # CONFIG_INPUT_MOUSE is not set
 CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_LEGACY_PTY_COUNT=32
 CONFIG_SERIAL_ATMEL=y
 CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=32
 CONFIG_HW_RANDOM=y
 CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
@@ -290,7 +273,6 @@ CONFIG_NFS_V3_ACL=y
 CONFIG_NFS_V4=y
 CONFIG_ROOT_NFS=y
 CONFIG_NFSD=y
-CONFIG_SMB_FS=m
 CONFIG_CIFS=m
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_MAC_PARTITION=y
@@ -335,7 +317,6 @@ CONFIG_NLS_UTF8=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_KERNEL=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_FTRACE is not set
 CONFIG_CRYPTO_PCBC=y
 CONFIG_CRYPTO_SHA1=y
diff --git a/arch/arm/configs/at91sam9260ek_defconfig b/arch/arm/configs/at91sam9260_defconfig
index f8a9226413bf..505b3765f87e 100644
--- a/arch/arm/configs/at91sam9260ek_defconfig
+++ b/arch/arm/configs/at91sam9260_defconfig
@@ -12,11 +12,23 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_IOSCHED_CFQ is not set
 CONFIG_ARCH_AT91=y
 CONFIG_ARCH_AT91SAM9260=y
+CONFIG_ARCH_AT91SAM9260_SAM9XE=y
 CONFIG_MACH_AT91SAM9260EK=y
+CONFIG_MACH_CAM60=y
+CONFIG_MACH_SAM9_L9260=y
+CONFIG_MACH_AFEB9260=y
+CONFIG_MACH_USB_A9260=y
+CONFIG_MACH_QIL_A9260=y
+CONFIG_MACH_CPU9260=y
+CONFIG_MACH_FLEXIBITY=y
+CONFIG_MACH_SNAPPER_9260=y
+CONFIG_MACH_AT91SAM_DT=y
 CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
 # CONFIG_ARM_THUMB is not set
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
 CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
 CONFIG_FPE_NWFPE=y
 CONFIG_NET=y
@@ -33,12 +45,10 @@ CONFIG_IP_PNP_BOOTP=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_ATMEL_SSC=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_MULTI_LUN=y
 CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 CONFIG_MACB=y
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
@@ -55,7 +65,6 @@ CONFIG_I2C_GPIO=y
 CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_NOWAYOUT=y
 CONFIG_AT91SAM9X_WATCHDOG=y
-# CONFIG_VGA_CONSOLE is not set
 # CONFIG_USB_HID is not set
 CONFIG_USB=y
 CONFIG_USB_DEVICEFS=y
@@ -71,7 +80,6 @@ CONFIG_USB_G_SERIAL=m
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AT91SAM9=y
 CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
 CONFIG_CRAMFS=y
diff --git a/arch/arm/configs/at91sam9g20ek_defconfig b/arch/arm/configs/at91sam9g20_defconfig
index 9e90e6d79297..9123568d9a8d 100644
--- a/arch/arm/configs/at91sam9g20ek_defconfig
+++ b/arch/arm/configs/at91sam9g20_defconfig
@@ -14,6 +14,15 @@ CONFIG_ARCH_AT91=y
 CONFIG_ARCH_AT91SAM9G20=y
 CONFIG_MACH_AT91SAM9G20EK=y
 CONFIG_MACH_AT91SAM9G20EK_2MMC=y
+CONFIG_MACH_CPU9G20=y
+CONFIG_MACH_ACMENETUSFOXG20=y
+CONFIG_MACH_PORTUXG20=y
+CONFIG_MACH_STAMP9G20=y
+CONFIG_MACH_PCONTROL_G20=y
+CONFIG_MACH_GSIA18S=y
+CONFIG_MACH_USB_A9G20=y
+CONFIG_MACH_SNAPPER_9260=y
+CONFIG_MACH_AT91SAM_DT=y
 CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
 # CONFIG_ARM_THUMB is not set
 CONFIG_AEABI=y
@@ -21,9 +30,10 @@ CONFIG_LEDS=y
 CONFIG_LEDS_CPU=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
 CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
 CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -37,8 +47,6 @@ CONFIG_IP_PNP_BOOTP=y
 # CONFIG_IPV6 is not set
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
@@ -48,17 +56,13 @@ CONFIG_MTD_NAND_ATMEL=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_ATMEL_SSC=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_MULTI_LUN=y
 # CONFIG_SCSI_LOWLEVEL is not set
 CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
 CONFIG_MACB=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 CONFIG_INPUT_MOUSEDEV_SCREEN_X=320
 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
@@ -66,15 +70,14 @@ CONFIG_INPUT_EVDEV=y
 # CONFIG_KEYBOARD_ATKBD is not set
 CONFIG_KEYBOARD_GPIO=y
 # CONFIG_INPUT_MOUSE is not set
+CONFIG_LEGACY_PTY_COUNT=16
 CONFIG_SERIAL_ATMEL=y
 CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=16
 CONFIG_HW_RANDOM=y
 CONFIG_SPI=y
 CONFIG_SPI_ATMEL=y
 CONFIG_SPI_SPIDEV=y
 # CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
 CONFIG_SOUND=y
 CONFIG_SND=y
 CONFIG_SND_SEQUENCER=y
@@ -82,7 +85,6 @@ CONFIG_SND_MIXER_OSS=y
 CONFIG_SND_PCM_OSS=y
 CONFIG_SND_SEQUENCER_OSS=y
 # CONFIG_SND_VERBOSE_PROCFS is not set
-CONFIG_SND_AT73C213=y
 CONFIG_USB=y
 CONFIG_USB_DEVICEFS=y
 # CONFIG_USB_DEVICE_CLASS is not set
@@ -105,7 +107,6 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AT91SAM9=y
 CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
 CONFIG_MSDOS_FS=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
diff --git a/arch/arm/configs/at91sam9g45_defconfig b/arch/arm/configs/at91sam9g45_defconfig
index c5876d244f4b..606d48f3b8f8 100644
--- a/arch/arm/configs/at91sam9g45_defconfig
+++ b/arch/arm/configs/at91sam9g45_defconfig
@@ -18,6 +18,7 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_ARCH_AT91=y
 CONFIG_ARCH_AT91SAM9G45=y
 CONFIG_MACH_AT91SAM9M10G45EK=y
+CONFIG_MACH_AT91SAM_DT=y
 CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
 CONFIG_AT91_SLOW_CLOCK=y
 CONFIG_AEABI=y
@@ -73,11 +74,8 @@ CONFIG_SCSI_MULTI_LUN=y
 # CONFIG_SCSI_LOWLEVEL is not set
 CONFIG_NETDEVICES=y
 CONFIG_MII=y
-CONFIG_DAVICOM_PHY=y
-CONFIG_NET_ETHERNET=y
 CONFIG_MACB=y
-# CONFIG_NETDEV_1000 is not set
+CONFIG_DAVICOM_PHY=y
-# CONFIG_NETDEV_10000 is not set
 CONFIG_LIBERTAS_THINFIRM=m
 CONFIG_LIBERTAS_THINFIRM_USB=m
 CONFIG_AT76C50X_USB=m
@@ -131,7 +129,6 @@ CONFIG_I2C_GPIO=y
 CONFIG_SPI=y
 CONFIG_SPI_ATMEL=y
 # CONFIG_HWMON is not set
-# CONFIG_MFD_SUPPORT is not set
 CONFIG_FB=y
 CONFIG_FB_ATMEL=y
 CONFIG_FB_UDL=m
diff --git a/arch/arm/configs/at91sam9rlek_defconfig b/arch/arm/configs/at91sam9rl_defconfig
index 75621e4d03fc..ad562ee64209 100644
--- a/arch/arm/configs/at91sam9rlek_defconfig
+++ b/arch/arm/configs/at91sam9rl_defconfig
@@ -23,8 +23,6 @@ CONFIG_NET=y
 CONFIG_UNIX=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
@@ -35,7 +33,6 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=4
 CONFIG_BLK_DEV_RAM_SIZE=24576
-CONFIG_ATMEL_SSC=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_MULTI_LUN=y
@@ -62,13 +59,11 @@ CONFIG_WATCHDOG_NOWAYOUT=y
 CONFIG_AT91SAM9X_WATCHDOG=y
 CONFIG_FB=y
 CONFIG_FB_ATMEL=y
-# CONFIG_VGA_CONSOLE is not set
 CONFIG_MMC=y
 CONFIG_MMC_AT91=m
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AT91SAM9=y
 CONFIG_EXT2_FS=y
-CONFIG_INOTIFY=y
 CONFIG_MSDOS_FS=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
diff --git a/arch/arm/configs/ezx_defconfig b/arch/arm/configs/ezx_defconfig
index 227a477346ed..d95763d5f0d8 100644
--- a/arch/arm/configs/ezx_defconfig
+++ b/arch/arm/configs/ezx_defconfig
@@ -287,7 +287,7 @@ CONFIG_USB=y
 # CONFIG_USB_DEVICE_CLASS is not set
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_PXA27X=y
+CONFIG_USB_PXA27X=y
 CONFIG_USB_ETH=m
 # CONFIG_USB_ETH_RNDIS is not set
 CONFIG_MMC=y
diff --git a/arch/arm/configs/imote2_defconfig b/arch/arm/configs/imote2_defconfig
index 176ec22af034..fd996bb13022 100644
--- a/arch/arm/configs/imote2_defconfig
+++ b/arch/arm/configs/imote2_defconfig
@@ -263,7 +263,7 @@ CONFIG_USB=y
 # CONFIG_USB_DEVICE_CLASS is not set
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_PXA27X=y
+CONFIG_USB_PXA27X=y
 CONFIG_USB_ETH=m
 # CONFIG_USB_ETH_RNDIS is not set
 CONFIG_MMC=y
diff --git a/arch/arm/configs/magician_defconfig b/arch/arm/configs/magician_defconfig
index a88e64d4e9a5..443675d317e6 100644
--- a/arch/arm/configs/magician_defconfig
+++ b/arch/arm/configs/magician_defconfig
@@ -132,7 +132,7 @@ CONFIG_USB_MON=m
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_VBUS_DRAW=500
-CONFIG_USB_GADGET_PXA27X=y
+CONFIG_USB_PXA27X=y
 CONFIG_USB_ETH=m
 # CONFIG_USB_ETH_RNDIS is not set
 CONFIG_USB_GADGETFS=m
diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig
index 7b63462b349d..dde2a1af7b39 100644
--- a/arch/arm/configs/omap1_defconfig
+++ b/arch/arm/configs/omap1_defconfig
@@ -48,13 +48,6 @@ CONFIG_MACH_SX1=y
 CONFIG_MACH_NOKIA770=y
 CONFIG_MACH_AMS_DELTA=y
 CONFIG_MACH_OMAP_GENERIC=y
-CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER=y
-CONFIG_OMAP_ARM_216MHZ=y
-CONFIG_OMAP_ARM_195MHZ=y
-CONFIG_OMAP_ARM_192MHZ=y
-CONFIG_OMAP_ARM_182MHZ=y
-CONFIG_OMAP_ARM_168MHZ=y
-# CONFIG_OMAP_ARM_60MHZ is not set
 # CONFIG_ARM_THUMB is not set
 CONFIG_PCCARD=y
 CONFIG_OMAP_CF=y
diff --git a/arch/arm/configs/u300_defconfig b/arch/arm/configs/u300_defconfig
index 4a5a12681be2..374000ec4e4e 100644
--- a/arch/arm/configs/u300_defconfig
+++ b/arch/arm/configs/u300_defconfig
@@ -14,8 +14,6 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_ARCH_U300=y
 CONFIG_MACH_U300=y
 CONFIG_MACH_U300_BS335=y
-CONFIG_MACH_U300_DUAL_RAM=y
-CONFIG_U300_DEBUG=y
 CONFIG_MACH_U300_SPIDUMMY=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
@@ -26,19 +24,21 @@ CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CMDLINE="root=/dev/ram0 rw rootfstype=rootfs console=ttyAMA0,115200n8 lpj=515072"
 CONFIG_CPU_IDLE=y
 CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
 # CONFIG_SUSPEND is not set
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
-# CONFIG_MISC_DEVICES is not set
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_FSMC=y
 # CONFIG_INPUT_MOUSEDEV is not set
 CONFIG_INPUT_EVDEV=y
 # CONFIG_KEYBOARD_ATKBD is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_SERIO is not set
+CONFIG_LEGACY_PTY_COUNT=16
 CONFIG_SERIAL_AMBA_PL011=y
 CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_LEGACY_PTY_COUNT=16
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C=y
 # CONFIG_HWMON is not set
@@ -51,6 +51,7 @@ CONFIG_BACKLIGHT_CLASS_DEVICE=y
 # CONFIG_HID_SUPPORT is not set
 # CONFIG_USB_SUPPORT is not set
 CONFIG_MMC=y
+CONFIG_MMC_CLKGATE=y
 CONFIG_MMC_ARMMMCI=y
 CONFIG_RTC_CLASS=y
 # CONFIG_RTC_HCTOSYS is not set
@@ -65,10 +66,8 @@ CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ISO8859_1=y
 CONFIG_PRINTK_TIME=y
 CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
 # CONFIG_SCHED_DEBUG is not set
 CONFIG_TIMER_STATS=y
 # CONFIG_DEBUG_PREEMPT is not set
 CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_CRC32 is not set
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index 97d31a4663da..2d7b6e7b7271 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -10,7 +10,7 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_ARCH_U8500=y
 CONFIG_UX500_SOC_DB5500=y
 CONFIG_UX500_SOC_DB8500=y
-CONFIG_MACH_U8500=y
+CONFIG_MACH_HREFV60=y
 CONFIG_MACH_SNOWBALL=y
 CONFIG_MACH_U5500=y
 CONFIG_NO_HZ=y
@@ -24,6 +24,7 @@ CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
 CONFIG_VFP=y
 CONFIG_NEON=y
+CONFIG_PM_RUNTIME=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -41,11 +42,8 @@ CONFIG_MISC_DEVICES=y
 CONFIG_AB8500_PWM=y
 CONFIG_SENSORS_BH1780=y
 CONFIG_NETDEVICES=y
-CONFIG_SMSC_PHY=y
-CONFIG_NET_ETHERNET=y
 CONFIG_SMSC911X=y
-# CONFIG_NETDEV_1000 is not set
+CONFIG_SMSC_PHY=y
-# CONFIG_NETDEV_10000 is not set
 # CONFIG_WLAN is not set
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 CONFIG_INPUT_EVDEV=y
@@ -72,15 +70,12 @@ CONFIG_SPI=y
 CONFIG_SPI_PL022=y
 CONFIG_GPIO_STMPE=y
 CONFIG_GPIO_TC3589X=y
-# CONFIG_HWMON is not set
 CONFIG_MFD_STMPE=y
 CONFIG_MFD_TC3589X=y
+CONFIG_AB5500_CORE=y
 CONFIG_AB8500_CORE=y
 CONFIG_REGULATOR_AB8500=y
 # CONFIG_HID_SUPPORT is not set
-CONFIG_USB_MUSB_HDRC=y
-CONFIG_USB_GADGET_MUSB_HDRC=y
-CONFIG_MUSB_PIO_ONLY=y
 CONFIG_USB_GADGET=y
 CONFIG_AB8500_USB=y
 CONFIG_MMC=y
@@ -97,6 +92,7 @@ CONFIG_DMADEVICES=y
 CONFIG_STE_DMA40=y
 CONFIG_STAGING=y
 CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y
+CONFIG_HSEM_U8500=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
 CONFIG_EXT2_FS_POSIX_ACL=y
diff --git a/arch/arm/configs/zeus_defconfig b/arch/arm/configs/zeus_defconfig
index 59577ad3f4ef..547a3c1e59db 100644
--- a/arch/arm/configs/zeus_defconfig
+++ b/arch/arm/configs/zeus_defconfig
@@ -140,7 +140,7 @@ CONFIG_USB_SERIAL=m
 CONFIG_USB_SERIAL_GENERIC=y
 CONFIG_USB_SERIAL_MCT_U232=m
 CONFIG_USB_GADGET=m
-CONFIG_USB_GADGET_PXA27X=y
+CONFIG_USB_PXA27X=y
 CONFIG_USB_ETH=m
 CONFIG_USB_GADGETFS=m
 CONFIG_USB_FILE_STORAGE=m
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index 71d99b83cdb9..0bda22c094a6 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -55,16 +55,6 @@ reserve_pmu(enum arm_pmu_type type);
 extern void
 release_pmu(enum arm_pmu_type type);
-/**
- * init_pmu() - Initialise the PMU.
- *
- * Initialise the system ready for PMU enabling. This should typically set the
- * IRQ affinity and nothing else. The users (oprofile/perf events etc) will do
- * the actual hardware initialisation.
- */
-extern int
-init_pmu(enum arm_pmu_type type);
 #else /* CONFIG_CPU_HAS_PMU */
 #include <linux/err.h>
diff --git a/arch/arm/include/asm/topology.h b/arch/arm/include/asm/topology.h
index a7e457ed27c3..58b8b84adcd2 100644
--- a/arch/arm/include/asm/topology.h
+++ b/arch/arm/include/asm/topology.h
@@ -25,7 +25,7 @@ extern struct cputopo_arm cpu_topology[NR_CPUS];
 void init_cpu_topology(void);
 void store_cpu_topology(unsigned int cpuid);
-const struct cpumask *cpu_coregroup_mask(unsigned int cpu);
+const struct cpumask *cpu_coregroup_mask(int cpu);
 #else
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 9ad50c4208ae..b145f16c91bc 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -497,7 +497,7 @@ ENDPROC(__und_usr)
        .popsection
        .pushsection __ex_table,"a"
        .long   1b, 4b
-#if __LINUX_ARM_ARCH__ >= 7
+#if CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7
        .long   2b, 4b
        .long   3b, 4b
 #endif
diff --git a/arch/arm/kernel/kprobes-arm.c b/arch/arm/kernel/kprobes-arm.c
index 9fe8910308af..8a30c89da70e 100644
--- a/arch/arm/kernel/kprobes-arm.c
+++ b/arch/arm/kernel/kprobes-arm.c
@@ -519,10 +519,12 @@ static const union decode_item arm_cccc_0000_____1001_table[] = {
 static const union decode_item arm_cccc_0001_____1001_table[] = {
        /* Synchronization primitives                                   */
+#if __LINUX_ARM_ARCH__ < 6
+        /* Deprecated on ARMv6 and may be UNDEFINED on v7               */
        /* SMP/SWPB             cccc 0001 0x00 xxxx xxxx xxxx 1001 xxxx */
        DECODE_EMULATEX (0x0fb000f0, 0x01000090, emulate_rd12rn16rm0_rwflags_nopc,
                                                 REGS(NOPC, NOPC, 0, 0, NOPC)),
+#endif
        /* LDREX/STREX{,D,B,H}  cccc 0001 1xxx xxxx xxxx xxxx 1001 xxxx */
        /* And unallocated instructions...                              */
        DECODE_END
diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c
index fc82de8bdcce..ba32b393b3f0 100644
--- a/arch/arm/kernel/kprobes-test-arm.c
+++ b/arch/arm/kernel/kprobes-test-arm.c
@@ -427,18 +427,25 @@ void kprobe_arm_test_cases(void)
        TEST_GROUP("Synchronization primitives")
-        /*
+#if __LINUX_ARM_ARCH__ < 6
-         * Use hard coded constants for SWP instructions to avoid warnings
+        TEST_RP("swp    lr, r",7,VAL2,", [r",8,0,"]")
-         * about deprecated instructions.
+        TEST_R( "swpvs  r0, r",1,VAL1,", [sp]")
-         */
+        TEST_RP("swp    sp, r",14,VAL2,", [r",12,13*4,"]")
-        TEST_RP( ".word 0xe108e097 @ swp        lr, r",7,VAL2,", [r",8,0,"]")
+#else
-        TEST_R(  ".word 0x610d0091 @ swpvs      r0, r",1,VAL1,", [sp]")
+        TEST_UNSUPPORTED(".word 0xe108e097 @ swp        lr, r7, [r8]")
-        TEST_RP( ".word 0xe10cd09e @ swp        sp, r",14,VAL2,", [r",12,13*4,"]")
+        TEST_UNSUPPORTED(".word 0x610d0091 @ swpvs      r0, r1, [sp]")
+        TEST_UNSUPPORTED(".word 0xe10cd09e @ swp        sp, r14 [r12]")
+#endif
        TEST_UNSUPPORTED(".word 0xe102f091 @ swp pc, r1, [r2]")
        TEST_UNSUPPORTED(".word 0xe102009f @ swp r0, pc, [r2]")
        TEST_UNSUPPORTED(".word 0xe10f0091 @ swp r0, r1, [pc]")
-        TEST_RP( ".word 0xe148e097 @ swpb       lr, r",7,VAL2,", [r",8,0,"]")
+#if __LINUX_ARM_ARCH__ < 6
-        TEST_R(  ".word 0x614d0091 @ swpvsb     r0, r",1,VAL1,", [sp]")
+        TEST_RP("swpb   lr, r",7,VAL2,", [r",8,0,"]")
+        TEST_R( "swpvsb r0, r",1,VAL1,", [sp]")
+#else
+        TEST_UNSUPPORTED(".word 0xe148e097 @ swpb       lr, r7, [r8]")
+        TEST_UNSUPPORTED(".word 0x614d0091 @ swpvsb     r0, r1, [sp]")
+#endif
        TEST_UNSUPPORTED(".word 0xe142f091 @ swpb pc, r1, [r2]")
        TEST_UNSUPPORTED(".word 0xe1100090") /* Unallocated space */
@@ -550,7 +557,7 @@ void kprobe_arm_test_cases(void)
        TEST_RPR(  "strccd      r",8, VAL2,", [r",13,0, ", r",12,48,"]")
        TEST_RPR(  "strd        r",4, VAL1,", [r",2, 24,", r",3, 48,"]!")
        TEST_RPR(  "strcsd      r",12,VAL2,", [r",11,48,", -r",10,24,"]!")
-        TEST_RPR(  "strd        r",2, VAL1,", [r",3, 24,"], r",4,48,"")
+        TEST_RPR(  "strd        r",2, VAL1,", [r",5, 24,"], r",4,48,"")
        TEST_RPR(  "strd        r",10,VAL2,", [r",9, 48,"], -r",7,24,"")
        TEST_UNSUPPORTED(".word 0xe1afc0fa      @ strd r12, [pc, r10]!")
diff --git a/arch/arm/kernel/kprobes-test-thumb.c b/arch/arm/kernel/kprobes-test-thumb.c
index 5e726c31c45a..5d8b85792222 100644
--- a/arch/arm/kernel/kprobes-test-thumb.c
+++ b/arch/arm/kernel/kprobes-test-thumb.c
@@ -222,8 +222,8 @@ void kprobe_thumb16_test_cases(void)
 DONT_TEST_IN_ITBLOCK(
        TEST_BF_R(  "cbnz       r",0,0, ", 2f")
        TEST_BF_R(  "cbz        r",2,-1,", 2f")
-        TEST_BF_RX( "cbnz       r",4,1, ", 2f",0x20)
+        TEST_BF_RX( "cbnz       r",4,1, ", 2f", SPACE_0x20)
-        TEST_BF_RX( "cbz        r",7,0, ", 2f",0x40)
+        TEST_BF_RX( "cbz        r",7,0, ", 2f", SPACE_0x40)
 )
        TEST_R("sxth    r0, r",7, HH1,"")
        TEST_R("sxth    r7, r",0, HH2,"")
@@ -246,7 +246,7 @@ DONT_TEST_IN_ITBLOCK(
        TESTCASE_START(code)            \
        TEST_ARG_PTR(13, offset)        \
        TEST_ARG_END("")                \
-        TEST_BRANCH_F(code,0)           \
+        TEST_BRANCH_F(code)             \
        TESTCASE_END
        TEST("push      {r0}")
@@ -319,8 +319,8 @@ CONDITION_INSTRUCTIONS(8,
        TEST_BF(  "b    2f")
        TEST_BB(  "b    2b")
-        TEST_BF_X("b    2f", 0x400)
+        TEST_BF_X("b    2f", SPACE_0x400)
-        TEST_BB_X("b    2b", 0x400)
+        TEST_BB_X("b    2b", SPACE_0x400)
        TEST_GROUP("Testing instructions in IT blocks")
@@ -746,7 +746,7 @@ CONDITION_INSTRUCTIONS(22,
        TEST_BB("bne.w  2b")
        TEST_BF("bgt.w  2f")
        TEST_BB("blt.w  2b")
-        TEST_BF_X("bpl.w        2f",0x1000)
+        TEST_BF_X("bpl.w        2f", SPACE_0x1000)
 )
        TEST_UNSUPPORTED("msr   cpsr, r0")
@@ -786,11 +786,11 @@ CONDITION_INSTRUCTIONS(22,
        TEST_BF(  "b.w  2f")
        TEST_BB(  "b.w  2b")
-        TEST_BF_X("b.w  2f", 0x1000)
+        TEST_BF_X("b.w  2f", SPACE_0x1000)
        TEST_BF(  "bl.w 2f")
        TEST_BB(  "bl.w 2b")
-        TEST_BB_X("bl.w 2b", 0x1000)
+        TEST_BB_X("bl.w 2b", SPACE_0x1000)
        TEST_X( "blx    __dummy_arm_subroutine",
                ".arm                           \n\t"
diff --git a/arch/arm/kernel/kprobes-test.h b/arch/arm/kernel/kprobes-test.h
index 0dc5d77b9356..e28a869b1ae4 100644
--- a/arch/arm/kernel/kprobes-test.h
+++ b/arch/arm/kernel/kprobes-test.h
@@ -149,23 +149,31 @@ struct test_arg_end {
        "1:     "instruction"                           \n\t"   \
        "       nop                                     \n\t"
-#define TEST_BRANCH_F(instruction, xtra_dist)                   \
+#define TEST_BRANCH_F(instruction)                              \
        TEST_INSTRUCTION(instruction)                           \
-        ".if "#xtra_dist"                               \n\t"   \
        "       b       99f                             \n\t"   \
-        ".space "#xtra_dist"                            \n\t"   \
+        "2:     nop                                     \n\t"
-        ".endif                                         \n\t"   \
+#define TEST_BRANCH_B(instruction)                              \
+        "       b       50f                             \n\t"   \
+        "       b       99f                             \n\t"   \
+        "2:     nop                                     \n\t"   \
+        "       b       99f                             \n\t"   \
+        TEST_INSTRUCTION(instruction)
+#define TEST_BRANCH_FX(instruction, codex)                      \
+        TEST_INSTRUCTION(instruction)                           \
+        "       b       99f                             \n\t"   \
+        codex"                                          \n\t"   \
        "       b       99f                             \n\t"   \
        "2:     nop                                     \n\t"
-#define TEST_BRANCH_B(instruction, xtra_dist)                   \
+#define TEST_BRANCH_BX(instruction, codex)                      \
        "       b       50f                             \n\t"   \
        "       b       99f                             \n\t"   \
        "2:     nop                                     \n\t"   \
        "       b       99f                             \n\t"   \
-        ".if "#xtra_dist"                               \n\t"   \
+        codex"                                          \n\t"   \
-        ".space "#xtra_dist"                            \n\t"   \
-        ".endif                                         \n\t"   \
        TEST_INSTRUCTION(instruction)
 #define TESTCASE_END                                            \
@@ -301,47 +309,60 @@ struct test_arg_end {
        TESTCASE_START(code1 #reg1 code2)       \
        TEST_ARG_PTR(reg1, val1)                \
        TEST_ARG_END("")                        \
-        TEST_BRANCH_F(code1 #reg1 code2, 0)     \
+        TEST_BRANCH_F(code1 #reg1 code2)        \
        TESTCASE_END
-#define TEST_BF_X(code, xtra_dist)              \
+#define TEST_BF(code)                           \
        TESTCASE_START(code)                    \
        TEST_ARG_END("")                        \
-        TEST_BRANCH_F(code, xtra_dist)          \
+        TEST_BRANCH_F(code)                     \
        TESTCASE_END
-#define TEST_BB_X(code, xtra_dist)              \
+#define TEST_BB(code)                           \
        TESTCASE_START(code)                    \
        TEST_ARG_END("")                        \
-        TEST_BRANCH_B(code, xtra_dist)          \
+        TEST_BRANCH_B(code)                     \
        TESTCASE_END
-#define TEST_BF_RX(code1, reg, val, code2, xtra_dist)   \
+#define TEST_BF_R(code1, reg, val, code2)       \
-        TESTCASE_START(code1 #reg code2)                \
+        TESTCASE_START(code1 #reg code2)        \
-        TEST_ARG_REG(reg, val)                          \
+        TEST_ARG_REG(reg, val)                  \
-        TEST_ARG_END("")                                \
+        TEST_ARG_END("")                        \
-        TEST_BRANCH_F(code1 #reg code2, xtra_dist)      \
+        TEST_BRANCH_F(code1 #reg code2)         \
        TESTCASE_END
-#define TEST_BB_RX(code1, reg, val, code2, xtra_dist)   \
+#define TEST_BB_R(code1, reg, val, code2)       \
-        TESTCASE_START(code1 #reg code2)                \
+        TESTCASE_START(code1 #reg code2)        \
-        TEST_ARG_REG(reg, val)                          \
+        TEST_ARG_REG(reg, val)                  \
-        TEST_ARG_END("")                                \
+        TEST_ARG_END("")                        \
-        TEST_BRANCH_B(code1 #reg code2, xtra_dist)      \
+        TEST_BRANCH_B(code1 #reg code2)         \
        TESTCASE_END
-#define TEST_BF(code)   TEST_BF_X(code, 0)
-#define TEST_BB(code)   TEST_BB_X(code, 0)
-#define TEST_BF_R(code1, reg, val, code2) TEST_BF_RX(code1, reg, val, code2, 0)
-#define TEST_BB_R(code1, reg, val, code2) TEST_BB_RX(code1, reg, val, code2, 0)
 #define TEST_BF_RR(code1, reg1, val1, code2, reg2, val2, code3) \
        TESTCASE_START(code1 #reg1 code2 #reg2 code3)           \
        TEST_ARG_REG(reg1, val1)                                \
        TEST_ARG_REG(reg2, val2)                                \
        TEST_ARG_END("")                                        \
-        TEST_BRANCH_F(code1 #reg1 code2 #reg2 code3, 0)         \
+        TEST_BRANCH_F(code1 #reg1 code2 #reg2 code3)            \
+        TESTCASE_END
+#define TEST_BF_X(code, codex)                  \
+        TESTCASE_START(code)                    \
+        TEST_ARG_END("")                        \
+        TEST_BRANCH_FX(code, codex)             \
+        TESTCASE_END
+#define TEST_BB_X(code, codex)                  \
+        TESTCASE_START(code)                    \
+        TEST_ARG_END("")                        \
+        TEST_BRANCH_BX(code, codex)             \
+        TESTCASE_END
+#define TEST_BF_RX(code1, reg, val, code2, codex)       \
+        TESTCASE_START(code1 #reg code2)                \
+        TEST_ARG_REG(reg, val)                          \
+        TEST_ARG_END("")                                \
+        TEST_BRANCH_FX(code1 #reg code2, codex)         \
        TESTCASE_END
 #define TEST_X(code, codex)                     \
@@ -372,6 +393,25 @@ struct test_arg_end {
        TESTCASE_END
+/*
+ * Macros for defining space directives spread over multiple lines.
+ * These are required so the compiler guesses better the length of inline asm
+ * code and will spill the literal pool early enough to avoid generating PC
+ * relative loads with out of range offsets.
+ */
+#define TWICE(x)        x x
+#define SPACE_0x8       TWICE(".space 4\n\t")
+#define SPACE_0x10      TWICE(SPACE_0x8)
+#define SPACE_0x20      TWICE(SPACE_0x10)
+#define SPACE_0x40      TWICE(SPACE_0x20)
+#define SPACE_0x80      TWICE(SPACE_0x40)
+#define SPACE_0x100     TWICE(SPACE_0x80)
+#define SPACE_0x200     TWICE(SPACE_0x100)
+#define SPACE_0x400     TWICE(SPACE_0x200)
+#define SPACE_0x800     TWICE(SPACE_0x400)
+#define SPACE_0x1000    TWICE(SPACE_0x800)
 /* Various values used in test cases... */
 #define N(val)  (val ^ 0xffffffff)
 #define VAL1    0x12345678
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 24e2347be6b1..8e9c98edc068 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -343,19 +343,25 @@ validate_group(struct perf_event *event)
 {
        struct perf_event *sibling, *leader = event->group_leader;
        struct pmu_hw_events fake_pmu;
+        DECLARE_BITMAP(fake_used_mask, ARMPMU_MAX_HWEVENTS);
-        memset(&fake_pmu, 0, sizeof(fake_pmu));
+        /*
+         * Initialise the fake PMU. We only need to populate the
+         * used_mask for the purposes of validation.
+         */
+        memset(fake_used_mask, 0, sizeof(fake_used_mask));
+        fake_pmu.used_mask = fake_used_mask;
        if (!validate_event(&fake_pmu, leader))
-                return -ENOSPC;
+                return -EINVAL;
        list_for_each_entry(sibling, &leader->sibling_list, group_entry) {
                if (!validate_event(&fake_pmu, sibling))
-                        return -ENOSPC;
+                        return -EINVAL;
        }
        if (!validate_event(&fake_pmu, event))
-                return -ENOSPC;
+                return -EINVAL;
        return 0;
 }
@@ -396,6 +402,9 @@ armpmu_reserve_hardware(struct arm_pmu *armpmu)
        int i, err, irq, irqs;
        struct platform_device *pmu_device = armpmu->plat_device;
+        if (!pmu_device)
+                return -ENODEV;
        err = reserve_pmu(armpmu->type);
        if (err) {
                pr_warning("unable to reserve pmu\n");
diff --git a/arch/arm/kernel/pmu.c b/arch/arm/kernel/pmu.c
index 2c3407ee8576..2334bf8a650a 100644
--- a/arch/arm/kernel/pmu.c
+++ b/arch/arm/kernel/pmu.c
@@ -33,3 +33,4 @@ release_pmu(enum arm_pmu_type type)
 {
        clear_bit_unlock(type, pmu_lock);
 }
+EXPORT_SYMBOL_GPL(release_pmu);
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 75316f0dd02a..3d0c6fb74ae4 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -192,6 +192,9 @@ void cpu_idle(void)
 #endif
                        local_irq_disable();
+#ifdef CONFIG_PL310_ERRATA_769419
+                        wmb();
+#endif
                        if (hlt_counter) {
                                local_irq_enable();
                                cpu_relax();
diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
index 1040c00405d0..8200deaa14f6 100644
--- a/arch/arm/kernel/topology.c
+++ b/arch/arm/kernel/topology.c
@@ -43,7 +43,7 @@
 struct cputopo_arm cpu_topology[NR_CPUS];
-const struct cpumask *cpu_coregroup_mask(unsigned int cpu)
+const struct cpumask *cpu_coregroup_mask(int cpu)
 {
        return &cpu_topology[cpu].core_sibling;
 }
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h
index 10d868a5a481..d6408d1ee543 100644
--- a/arch/arm/lib/bitops.h
+++ b/arch/arm/lib/bitops.h
@@ -1,5 +1,9 @@
+#include <asm/unwind.h>
 #if __LINUX_ARM_ARCH__ >= 6
-        .macro  bitop, instr
+        .macro  bitop, name, instr
+ENTRY(  \name           )
+UNWIND( .fnstart        )
        ands    ip, r1, #3
        strneb  r1, [ip]                @ assert word-aligned
        mov     r2, #1
@@ -13,9 +17,13 @@
        cmp     r0, #0
        bne     1b
        bx      lr
+UNWIND( .fnend          )
+ENDPROC(\name           )
        .endm
-        .macro  testop, instr, store
+        .macro  testop, name, instr, store
+ENTRY(  \name           )
+UNWIND( .fnstart        )
        ands    ip, r1, #3
        strneb  r1, [ip]                @ assert word-aligned
        mov     r2, #1
@@ -34,9 +42,13 @@
        cmp     r0, #0
        movne   r0, #1
 2:      bx      lr
+UNWIND( .fnend          )
+ENDPROC(\name           )
        .endm
 #else
-        .macro  bitop, instr
+        .macro  bitop, name, instr
+ENTRY(  \name           )
+UNWIND( .fnstart        )
        ands    ip, r1, #3
        strneb  r1, [ip]                @ assert word-aligned
        and     r2, r0, #31
@@ -49,6 +61,8 @@
        str     r2, [r1, r0, lsl #2]
        restore_irqs ip
        mov     pc, lr
+UNWIND( .fnend          )
+ENDPROC(\name           )
        .endm
 /**
@@ -59,7 +73,9 @@
 * Note: we can trivially conditionalise the store instruction
 * to avoid dirtying the data cache.
 */
-        .macro  testop, instr, store
+        .macro  testop, name, instr, store
+ENTRY(  \name           )
+UNWIND( .fnstart        )
        ands    ip, r1, #3
        strneb  r1, [ip]                @ assert word-aligned
        and     r3, r0, #31
@@ -73,5 +89,7 @@
        moveq   r0, #0
        restore_irqs ip
        mov     pc, lr
+UNWIND( .fnend          )
+ENDPROC(\name           )
        .endm
 #endif
diff --git a/arch/arm/lib/changebit.S b/arch/arm/lib/changebit.S
index 68ed5b62e839..f4027862172f 100644
--- a/arch/arm/lib/changebit.S
+++ b/arch/arm/lib/changebit.S
@@ -12,6 +12,4 @@
 #include "bitops.h"
                .text
-ENTRY(_change_bit)
+bitop   _change_bit, eor
-        bitop   eor
-ENDPROC(_change_bit)
diff --git a/arch/arm/lib/clearbit.S b/arch/arm/lib/clearbit.S
index 4c04c3b51eeb..f6b75fb64d30 100644
--- a/arch/arm/lib/clearbit.S
+++ b/arch/arm/lib/clearbit.S
@@ -12,6 +12,4 @@
 #include "bitops.h"
                .text
-ENTRY(_clear_bit)
+bitop   _clear_bit, bic
-        bitop   bic
-ENDPROC(_clear_bit)
diff --git a/arch/arm/lib/setbit.S b/arch/arm/lib/setbit.S
index bbee5c66a23e..618fedae4b37 100644
--- a/arch/arm/lib/setbit.S
+++ b/arch/arm/lib/setbit.S
@@ -12,6 +12,4 @@
 #include "bitops.h"
                .text
-ENTRY(_set_bit)
+bitop   _set_bit, orr
-        bitop   orr
-ENDPROC(_set_bit)
diff --git a/arch/arm/lib/testchangebit.S b/arch/arm/lib/testchangebit.S
index 15a4d431f229..4becdc3a59cb 100644
--- a/arch/arm/lib/testchangebit.S
+++ b/arch/arm/lib/testchangebit.S
@@ -12,6 +12,4 @@
 #include "bitops.h"
                .text
-ENTRY(_test_and_change_bit)
+testop  _test_and_change_bit, eor, str
-        testop  eor, str
-ENDPROC(_test_and_change_bit)
diff --git a/arch/arm/lib/testclearbit.S b/arch/arm/lib/testclearbit.S
index 521b66b5b95d..918841dcce7a 100644
--- a/arch/arm/lib/testclearbit.S
+++ b/arch/arm/lib/testclearbit.S
@@ -12,6 +12,4 @@
 #include "bitops.h"
                .text
-ENTRY(_test_and_clear_bit)
+testop  _test_and_clear_bit, bicne, strne
-        testop  bicne, strne
-ENDPROC(_test_and_clear_bit)
diff --git a/arch/arm/lib/testsetbit.S b/arch/arm/lib/testsetbit.S
index 1c98cc2185bb..8d1b2fe9e487 100644
--- a/arch/arm/lib/testsetbit.S
+++ b/arch/arm/lib/testsetbit.S
@@ -12,6 +12,4 @@
 #include "bitops.h"
                .text
-ENTRY(_test_and_set_bit)
+testop  _test_and_set_bit, orreq, streq
-        testop  orreq, streq
-ENDPROC(_test_and_set_bit)
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 66591fa53e05..ad930688358c 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -83,7 +83,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
 *  USB Device (Gadget)
 * -------------------------------------------------------------------- */
-#ifdef CONFIG_USB_GADGET_AT91
+#ifdef CONFIG_USB_AT91
 static struct at91_udc_data udc_data;
 static struct resource udc_resources[] = {
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index b84a9f642f59..0d20677fbef0 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -195,9 +195,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
        CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
        CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
-        CLKDEV_CON_DEV_ID("t3_clk", "atmel_tcb.1", &tc3_clk),
+        CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk),
-        CLKDEV_CON_DEV_ID("t4_clk", "atmel_tcb.1", &tc4_clk),
+        CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
-        CLKDEV_CON_DEV_ID("t5_clk", "atmel_tcb.1", &tc5_clk),
+        CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
        CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk),
        /* more usart lookup table for DT entries */
        CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 25e3464fb07f..629fa9774972 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -84,7 +84,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
 *  USB Device (Gadget)
 * -------------------------------------------------------------------- */
-#ifdef CONFIG_USB_GADGET_AT91
+#ifdef CONFIG_USB_AT91
 static struct at91_udc_data udc_data;
 static struct resource udc_resources[] = {
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index ae78f4d03b73..a178b58b0b9c 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -87,7 +87,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
 *  USB Device (Gadget)
 * -------------------------------------------------------------------- */
-#ifdef CONFIG_USB_GADGET_AT91
+#ifdef CONFIG_USB_AT91
 static struct at91_udc_data udc_data;
 static struct resource udc_resources[] = {
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index ad017eb1f8df..d5fbac9ff4fa 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -92,7 +92,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
 *  USB Device (Gadget)
 * -------------------------------------------------------------------- */
-#ifdef CONFIG_USB_GADGET_AT91
+#ifdef CONFIG_USB_AT91
 static struct at91_udc_data udc_data;
 static struct resource udc_resources[] = {
diff --git a/arch/arm/mach-at91/include/mach/system_rev.h b/arch/arm/mach-at91/include/mach/system_rev.h
index 8f4866045b41..ec164a4124c9 100644
--- a/arch/arm/mach-at91/include/mach/system_rev.h
+++ b/arch/arm/mach-at91/include/mach/system_rev.h
@@ -19,7 +19,7 @@
 #define BOARD_HAVE_NAND_16BIT   (1 << 31)
 static inline int board_have_nand_16bit(void)
 {
-        return system_rev & BOARD_HAVE_NAND_16BIT;
+        return (system_rev & BOARD_HAVE_NAND_16BIT) ? 1 : 0;
 }
 #endif /* __ARCH_SYSTEM_REV_H__ */
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 1d7d24995226..6659a90dbcad 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -753,7 +753,7 @@ static struct snd_platform_data da850_evm_snd_data = {
        .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
        .tdm_slots      = 2,
        .serial_dir     = da850_iis_serializer_direction,
-        .asp_chan_q     = EVENTQ_1,
+        .asp_chan_q     = EVENTQ_0,
        .version        = MCASP_VERSION_2,
        .txnumevt       = 1,
        .rxnumevt       = 1,
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 1918ae711428..46e1f4173b97 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -107,7 +107,7 @@ static struct mtd_partition davinci_nand_partitions[] = {
                /* UBL (a few copies) plus U-Boot */
                .name           = "bootloader",
                .offset         = 0,
-                .size           = 28 * NAND_BLOCK_SIZE,
+                .size           = 30 * NAND_BLOCK_SIZE,
                .mask_flags     = MTD_WRITEABLE, /* force read-only */
        }, {
                /* U-Boot environment */
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index e574d7f837a8..635bf7740157 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -564,7 +564,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
        int val;
        u32 value;
-        if (!vpif_vsclkdis_reg || !cpld_client)
+        if (!vpif_vidclkctl_reg || !cpld_client)
                return -ENXIO;
        val = i2c_smbus_read_byte(cpld_client);
@@ -572,7 +572,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
                return val;
        spin_lock_irqsave(&vpif_reg_lock, flags);
-        value = __raw_readl(vpif_vsclkdis_reg);
+        value = __raw_readl(vpif_vidclkctl_reg);
        if (mux_mode) {
                val &= VPIF_INPUT_TWO_CHANNEL;
                value |= VIDCH1CLK;
@@ -580,7 +580,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
                val |= VPIF_INPUT_ONE_CHANNEL;
                value &= ~VIDCH1CLK;
        }
-        __raw_writel(value, vpif_vsclkdis_reg);
+        __raw_writel(value, vpif_vidclkctl_reg);
        spin_unlock_irqrestore(&vpif_reg_lock, flags);
        err = i2c_smbus_write_byte(cpld_client, val);
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 0b68ed534f8e..af27c130595f 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -161,7 +161,6 @@ static struct clk dsp_clk = {
        .name = "dsp",
        .parent = &pll1_sysclk1,
        .lpsc = DM646X_LPSC_C64X_CPU,
-        .flags = PSC_DSP,
        .usecount = 1,                  /* REVISIT how to disable? */
 };
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index fa59c097223d..8bc3fc256171 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -233,7 +233,7 @@
 #define PTCMD           0x120
 #define PTSTAT          0x128
 #define PDSTAT          0x200
-#define PDCTL1          0x304
+#define PDCTL           0x300
 #define MDSTAT          0x800
 #define MDCTL           0xA00
@@ -244,7 +244,10 @@
 #define PSC_STATE_ENABLE        3
 #define MDSTAT_STATE_MASK       0x3f
+#define PDSTAT_STATE_MASK       0x1f
 #define MDCTL_FORCE             BIT(31)
+#define PDCTL_NEXT              BIT(1)
+#define PDCTL_EPCGOOD           BIT(8)
 #ifndef __ASSEMBLER__
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index 1fb6bdff38c1..d7e210f4b55c 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -52,7 +52,7 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
 void davinci_psc_config(unsigned int domain, unsigned int ctlr,
                unsigned int id, bool enable, u32 flags)
 {
-        u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl;
+        u32 epcpr, ptcmd, ptstat, pdstat, pdctl, mdstat, mdctl;
        void __iomem *psc_base;
        struct davinci_soc_info *soc_info = &davinci_soc_info;
        u32 next_state = PSC_STATE_ENABLE;
@@ -79,11 +79,11 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
                mdctl |= MDCTL_FORCE;
        __raw_writel(mdctl, psc_base + MDCTL + 4 * id);
-        pdstat = __raw_readl(psc_base + PDSTAT);
+        pdstat = __raw_readl(psc_base + PDSTAT + 4 * domain);
-        if ((pdstat & 0x00000001) == 0) {
+        if ((pdstat & PDSTAT_STATE_MASK) == 0) {
-                pdctl1 = __raw_readl(psc_base + PDCTL1);
+                pdctl = __raw_readl(psc_base + PDCTL + 4 * domain);
-                pdctl1 |= 0x1;
+                pdctl |= PDCTL_NEXT;
-                __raw_writel(pdctl1, psc_base + PDCTL1);
+                __raw_writel(pdctl, psc_base + PDCTL + 4 * domain);
                ptcmd = 1 << domain;
                __raw_writel(ptcmd, psc_base + PTCMD);
@@ -92,9 +92,9 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
                        epcpr = __raw_readl(psc_base + EPCPR);
                } while ((((epcpr >> domain) & 1) == 0));
-                pdctl1 = __raw_readl(psc_base + PDCTL1);
+                pdctl = __raw_readl(psc_base + PDCTL + 4 * domain);
-                pdctl1 |= 0x100;
+                pdctl |= PDCTL_EPCGOOD;
-                __raw_writel(pdctl1, psc_base + PDCTL1);
+                __raw_writel(pdctl, psc_base + PDCTL + 4 * domain);
        } else {
                ptcmd = 1 << domain;
                __raw_writel(ptcmd, psc_base + PTCMD);
diff --git a/arch/arm/mach-dove/addr-map.c b/arch/arm/mach-dove/addr-map.c
index 00be4fc26dd7..98b8c83b09ab 100644
--- a/arch/arm/mach-dove/addr-map.c
+++ b/arch/arm/mach-dove/addr-map.c
@@ -14,6 +14,7 @@
 #include <linux/io.h>
 #include <asm/mach/arch.h>
 #include <asm/setup.h>
+#include <plat/addr-map.h>
 #include "common.h"
 /*
@@ -34,98 +35,72 @@
 #define ATTR_PCIE_MEM           0xe8
 #define ATTR_SCRATCHPAD         0x0
-/*
- * CPU Address Decode Windows registers
- */
-#define WIN_CTRL(n)     (BRIDGE_VIRT_BASE + ((n) << 4) + 0x0)
-#define WIN_BASE(n)     (BRIDGE_VIRT_BASE + ((n) << 4) + 0x4)
-#define WIN_REMAP_LO(n) (BRIDGE_VIRT_BASE + ((n) << 4) + 0x8)
-#define WIN_REMAP_HI(n) (BRIDGE_VIRT_BASE + ((n) << 4) + 0xc)
-struct mbus_dram_target_info dove_mbus_dram_info;
 static inline void __iomem *ddr_map_sc(int i)
 {
        return (void __iomem *)(DOVE_MC_VIRT_BASE + 0x100 + ((i) << 4));
 }
-static int cpu_win_can_remap(int win)
+/*
-{
+ * Description of the windows needed by the platform code
-        if (win < 4)
+ */
-                return 1;
+static struct __initdata orion_addr_map_cfg addr_map_cfg = {
+        .num_wins = 8,
-        return 0;
+        .remappable_wins = 4,
-}
+        .bridge_virt_base = BRIDGE_VIRT_BASE,
+};
-static void __init setup_cpu_win(int win, u32 base, u32 size,
-                                 u8 target, u8 attr, int remap)
-{
-        u32 ctrl;
-        base &= 0xffff0000;
-        ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1;
-        writel(base, WIN_BASE(win));
-        writel(ctrl, WIN_CTRL(win));
-        if (cpu_win_can_remap(win)) {
-                if (remap < 0)
-                        remap = base;
-                writel(remap & 0xffff0000, WIN_REMAP_LO(win));
-                writel(0, WIN_REMAP_HI(win));
-        }
-}
-void __init dove_setup_cpu_mbus(void)
-{
-        int i;
-        int cs;
+static const struct __initdata orion_addr_map_info addr_map_info[] = {
        /*
-         * First, disable and clear windows.
+         * Windows for PCIe IO+MEM space.
         */
-        for (i = 0; i < 8; i++) {
+        { 0, DOVE_PCIE0_IO_PHYS_BASE, DOVE_PCIE0_IO_SIZE,
-                writel(0, WIN_BASE(i));
+          TARGET_PCIE0, ATTR_PCIE_IO, DOVE_PCIE0_IO_BUS_BASE
-                writel(0, WIN_CTRL(i));
+        },
-                if (cpu_win_can_remap(i)) {
+        { 1, DOVE_PCIE1_IO_PHYS_BASE, DOVE_PCIE1_IO_SIZE,
-                        writel(0, WIN_REMAP_LO(i));
+          TARGET_PCIE1, ATTR_PCIE_IO, DOVE_PCIE1_IO_BUS_BASE
-                        writel(0, WIN_REMAP_HI(i));
+        },
-                }
+        { 2, DOVE_PCIE0_MEM_PHYS_BASE, DOVE_PCIE0_MEM_SIZE,
-        }
+          TARGET_PCIE0, ATTR_PCIE_MEM, -1
+        },
+        { 3, DOVE_PCIE1_MEM_PHYS_BASE, DOVE_PCIE1_MEM_SIZE,
+          TARGET_PCIE1, ATTR_PCIE_MEM, -1
+        },
        /*
-         * Setup windows for PCIe IO+MEM space.
+         * Window for CESA engine.
         */
-        setup_cpu_win(0, DOVE_PCIE0_IO_PHYS_BASE, DOVE_PCIE0_IO_SIZE,
+        { 4, DOVE_CESA_PHYS_BASE, DOVE_CESA_SIZE,
-                      TARGET_PCIE0, ATTR_PCIE_IO, DOVE_PCIE0_IO_BUS_BASE);
+          TARGET_CESA, ATTR_CESA, -1
-        setup_cpu_win(1, DOVE_PCIE1_IO_PHYS_BASE, DOVE_PCIE1_IO_SIZE,
+        },
-                      TARGET_PCIE1, ATTR_PCIE_IO, DOVE_PCIE1_IO_BUS_BASE);
-        setup_cpu_win(2, DOVE_PCIE0_MEM_PHYS_BASE, DOVE_PCIE0_MEM_SIZE,
-                      TARGET_PCIE0, ATTR_PCIE_MEM, -1);
-        setup_cpu_win(3, DOVE_PCIE1_MEM_PHYS_BASE, DOVE_PCIE1_MEM_SIZE,
-                      TARGET_PCIE1, ATTR_PCIE_MEM, -1);
        /*
-         * Setup window for CESA engine.
+         * Window to the BootROM for Standby and Sleep Resume
         */
-        setup_cpu_win(4, DOVE_CESA_PHYS_BASE, DOVE_CESA_SIZE,
+        { 5, DOVE_BOOTROM_PHYS_BASE, DOVE_BOOTROM_SIZE,
-                      TARGET_CESA, ATTR_CESA, -1);
+          TARGET_BOOTROM, ATTR_BOOTROM, -1
+        },
        /*
-         * Setup the Window to the BootROM for Standby and Sleep Resume
+         * Window to the PMU Scratch Pad space
         */
-        setup_cpu_win(5, DOVE_BOOTROM_PHYS_BASE, DOVE_BOOTROM_SIZE,
+        { 6, DOVE_SCRATCHPAD_PHYS_BASE, DOVE_SCRATCHPAD_SIZE,
-                      TARGET_BOOTROM, ATTR_BOOTROM, -1);
+          TARGET_SCRATCHPAD, ATTR_SCRATCHPAD, -1
+        },
+        /* End marker */
+        { -1, 0, 0, 0, 0, 0 }
+};
+void __init dove_setup_cpu_mbus(void)
+{
+        int i;
+        int cs;
        /*
-         * Setup the Window to the PMU Scratch Pad space
+         * Disable, clear and configure windows.
         */
-        setup_cpu_win(6, DOVE_SCRATCHPAD_PHYS_BASE, DOVE_SCRATCHPAD_SIZE,
+        orion_config_wins(&addr_map_cfg, addr_map_info);
-                      TARGET_SCRATCHPAD, ATTR_SCRATCHPAD, -1);
        /*
         * Setup MBUS dram target info.
         */
-        dove_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
+        orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
        for (i = 0, cs = 0; i < 2; i++) {
                u32 map = readl(ddr_map_sc(i));
@@ -136,7 +111,7 @@ void __init dove_setup_cpu_mbus(void)
                if (map & 1) {
                        struct mbus_dram_window *w;
-                        w = &dove_mbus_dram_info.cs[cs++];
+                        w = &orion_mbus_dram_info.cs[cs++];
                        w->cs_index = i;
                        w->mbus_attr = 0; /* CS address decoding done inside */
                                          /* the DDR controller, no need to  */
@@ -145,5 +120,5 @@ void __init dove_setup_cpu_mbus(void)
                        w->size = 0x100000 << (((map & 0x000f0000) >> 16) - 4);
                }
        }
-        dove_mbus_dram_info.num_cs = cs;
+        orion_mbus_dram_info.num_cs = cs;
 }
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index a9e0dae86a26..29ff0d076f0a 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -14,7 +14,6 @@
 #include <linux/platform_device.h>
 #include <linux/pci.h>
 #include <linux/clk.h>
-#include <linux/mbus.h>
 #include <linux/ata_platform.h>
 #include <linux/gpio.h>
 #include <asm/page.h>
@@ -30,6 +29,7 @@
 #include <linux/irq.h>
 #include <plat/time.h>
 #include <plat/common.h>
+#include <plat/addr-map.h>
 #include "common.h"
 static int get_tclk(void);
@@ -71,8 +71,7 @@ void __init dove_map_io(void)
 ****************************************************************************/
 void __init dove_ehci0_init(void)
 {
-        orion_ehci_init(&dove_mbus_dram_info,
+        orion_ehci_init(DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0);
-                        DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0);
 }
 /*****************************************************************************
@@ -80,8 +79,7 @@ void __init dove_ehci0_init(void)
 ****************************************************************************/
 void __init dove_ehci1_init(void)
 {
-        orion_ehci_1_init(&dove_mbus_dram_info,
+        orion_ehci_1_init(DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
-                          DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
 }
 /*****************************************************************************
@@ -89,7 +87,7 @@ void __init dove_ehci1_init(void)
 ****************************************************************************/
 void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 {
-        orion_ge00_init(eth_data, &dove_mbus_dram_info,
+        orion_ge00_init(eth_data,
                        DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM,
                        0, get_tclk());
 }
@@ -107,8 +105,7 @@ void __init dove_rtc_init(void)
 ****************************************************************************/
 void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
 {
-        orion_sata_init(sata_data, &dove_mbus_dram_info,
+        orion_sata_init(sata_data, DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
-                        DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
 }
@@ -198,8 +195,7 @@ struct sys_timer dove_timer = {
 ****************************************************************************/
 void __init dove_xor0_init(void)
 {
-        orion_xor0_init(&dove_mbus_dram_info,
+        orion_xor0_init(DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
-                        DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
                        IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01);
 }
diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h
index 6a2046e44706..7322371d3908 100644
--- a/arch/arm/mach-dove/common.h
+++ b/arch/arm/mach-dove/common.h
@@ -15,7 +15,6 @@ struct mv643xx_eth_platform_data;
 struct mv_sata_platform_data;
 extern struct sys_timer dove_timer;
-extern struct mbus_dram_target_info dove_mbus_dram_info;
 /*
 * Basic Dove init functions used early by machine-setup.
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index aa2b3a09a51d..6c11a4df7178 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -10,7 +10,6 @@
 #include <linux/kernel.h>
 #include <linux/pci.h>
-#include <linux/mbus.h>
 #include <video/vga.h>
 #include <asm/mach/pci.h>
 #include <asm/mach/arch.h>
@@ -19,6 +18,7 @@
 #include <plat/pcie.h>
 #include <mach/irqs.h>
 #include <mach/bridge-regs.h>
+#include <plat/addr-map.h>
 #include "common.h"
 struct pcie_port {
@@ -50,7 +50,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
         */
        orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
-        orion_pcie_setup(pp->base, &dove_mbus_dram_info);
+        orion_pcie_setup(pp->base);
        /*
         * IORESOURCE_IO
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index 35f6502144ae..4ebb382c5979 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -12,6 +12,8 @@
 #include <linux/init.h>
 #include <linux/cpuidle.h>
 #include <linux/io.h>
+#include <linux/export.h>
+#include <linux/time.h>
 #include <asm/proc-fns.h>
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index b82dcf08e747..88660d500f5b 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -22,6 +22,7 @@
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/of_address.h>
+#include <linux/smp.h>
 #include <asm/cacheflush.h>
 #include <asm/unified.h>
@@ -72,6 +73,9 @@ static void __init highbank_map_io(void)
 void highbank_set_cpu_jump(int cpu, void *jump_addr)
 {
+#ifdef CONFIG_SMP
+        cpu = cpu_logical_map(cpu);
+#endif
        writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu));
        __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
        outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5f7f9c2a34ae..c44aa974e79c 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -10,11 +10,6 @@ config HAVE_IMX_MMDC
 config HAVE_IMX_SRC
        bool
-#
-# ARCH_MX31 and ARCH_MX35 are left for compatibility
-# Some usages assume that having one of them implies not having (e.g.) ARCH_MX2.
-# To easily distinguish good and reviewed from unreviewed usages new (and IMHO
-# more sensible) names are used: SOC_IMX31 and SOC_IMX35
 config ARCH_MX1
        bool
@@ -27,12 +22,6 @@ config ARCH_MX25
 config MACH_MX27
        bool
-config ARCH_MX31
-        bool
-config ARCH_MX35
-        bool
 config SOC_IMX1
        bool
        select ARCH_MX1
@@ -72,7 +61,6 @@ config SOC_IMX31
        select CPU_V6
        select IMX_HAVE_PLATFORM_MXC_RNGA
        select ARCH_MXC_AUDMUX_V2
-        select ARCH_MX31
        select MXC_AVIC
        select SMP_ON_UP if SMP
@@ -82,7 +70,6 @@ config SOC_IMX35
        select ARCH_MXC_IOMUX_V3
        select ARCH_MXC_AUDMUX_V2
        select HAVE_EPIT
-        select ARCH_MX35
        select MXC_AVIC
        select SMP_ON_UP if SMP
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c
index 613a1b993bff..039a7abb165a 100644
--- a/arch/arm/mach-imx/clock-imx6q.c
+++ b/arch/arm/mach-imx/clock-imx6q.c
@@ -1953,14 +1953,17 @@ static struct map_desc imx6q_clock_desc[] = {
        imx_map_entry(MX6Q, ANATOP, MT_DEVICE),
 };
+void __init imx6q_clock_map_io(void)
+{
+        iotable_init(imx6q_clock_desc, ARRAY_SIZE(imx6q_clock_desc));
+}
 int __init mx6q_clocks_init(void)
 {
        struct device_node *np;
        void __iomem *base;
        int i, irq;
-        iotable_init(imx6q_clock_desc, ARRAY_SIZE(imx6q_clock_desc));
        /* retrieve the freqency of fixed clocks from device tree */
        for_each_compatible_node(np, NULL, "fixed-clock") {
                u32 rate;
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 8bf5fa349484..8deb012189b5 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -34,16 +34,18 @@ static void __init imx6q_map_io(void)
 {
        imx_lluart_map_io();
        imx_scu_map_io();
+        imx6q_clock_map_io();
 }
-static void __init imx6q_gpio_add_irq_domain(struct device_node *np,
+static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
                                struct device_node *interrupt_parent)
 {
-        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
+        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
-                                   32 * 7; /* imx6q gets 7 gpio ports */
+        gpio_irq_base -= 32;
        irq_domain_add_simple(np, gpio_irq_base);
-        gpio_irq_base += 32;
+        return 0;
 }
 static const struct of_device_id imx6q_irq_match[] __initconst = {
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 9f0e82ec3398..31807d2a8b7b 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -33,29 +33,32 @@
 static void imx3_idle(void)
 {
        unsigned long reg = 0;
-        __asm__ __volatile__(
-                /* disable I and D cache */
+        if (!need_resched())
-                "mrc p15, 0, %0, c1, c0, 0\n"
+                __asm__ __volatile__(
-                "bic %0, %0, #0x00001000\n"
+                        /* disable I and D cache */
-                "bic %0, %0, #0x00000004\n"
+                        "mrc p15, 0, %0, c1, c0, 0\n"
-                "mcr p15, 0, %0, c1, c0, 0\n"
+                        "bic %0, %0, #0x00001000\n"
-                /* invalidate I cache */
+                        "bic %0, %0, #0x00000004\n"
-                "mov %0, #0\n"
+                        "mcr p15, 0, %0, c1, c0, 0\n"
-                "mcr p15, 0, %0, c7, c5, 0\n"
+                        /* invalidate I cache */
-                /* clear and invalidate D cache */
+                        "mov %0, #0\n"
-                "mov %0, #0\n"
+                        "mcr p15, 0, %0, c7, c5, 0\n"
-                "mcr p15, 0, %0, c7, c14, 0\n"
+                        /* clear and invalidate D cache */
-                /* WFI */
+                        "mov %0, #0\n"
-                "mov %0, #0\n"
+                        "mcr p15, 0, %0, c7, c14, 0\n"
-                "mcr p15, 0, %0, c7, c0, 4\n"
+                        /* WFI */
-                "nop\n" "nop\n" "nop\n" "nop\n"
+                        "mov %0, #0\n"
-                "nop\n" "nop\n" "nop\n"
+                        "mcr p15, 0, %0, c7, c0, 4\n"
-                /* enable I and D cache */
+                        "nop\n" "nop\n" "nop\n" "nop\n"
-                "mrc p15, 0, %0, c1, c0, 0\n"
+                        "nop\n" "nop\n" "nop\n"
-                "orr %0, %0, #0x00001000\n"
+                        /* enable I and D cache */
-                "orr %0, %0, #0x00000004\n"
+                        "mrc p15, 0, %0, c1, c0, 0\n"
-                "mcr p15, 0, %0, c1, c0, 0\n"
+                        "orr %0, %0, #0x00001000\n"
-                : "=r" (reg));
+                        "orr %0, %0, #0x00000004\n"
+                        "mcr p15, 0, %0, c1, c0, 0\n"
+                        : "=r" (reg));
+        local_irq_enable();
 }
 static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
@@ -108,6 +111,7 @@ void imx3_init_l2x0(void)
        l2x0_init(l2x0_base, 0x00030024, 0x00000000);
 }
+#ifdef CONFIG_SOC_IMX31
 static struct map_desc mx31_io_desc[] __initdata = {
        imx_map_entry(MX31, X_MEMC, MT_DEVICE),
        imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
@@ -126,33 +130,11 @@ void __init mx31_map_io(void)
        iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc));
 }
-static struct map_desc mx35_io_desc[] __initdata = {
-        imx_map_entry(MX35, X_MEMC, MT_DEVICE),
-        imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
-        imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
-        imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
-        imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
-};
-void __init mx35_map_io(void)
-{
-        iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
-}
 void __init imx31_init_early(void)
 {
        mxc_set_cpu_type(MXC_CPU_MX31);
        mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
-        imx_idle = imx3_idle;
+        pm_idle = imx3_idle;
-        imx_ioremap = imx3_ioremap;
-}
-void __init imx35_init_early(void)
-{
-        mxc_set_cpu_type(MXC_CPU_MX35);
-        mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
-        mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
-        imx_idle = imx3_idle;
        imx_ioremap = imx3_ioremap;
 }
@@ -161,11 +143,6 @@ void __init mx31_init_irq(void)
        mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR));
 }
-void __init mx35_init_irq(void)
-{
-        mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
-}
 static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = {
        .per_2_per_addr = 1677,
 };
@@ -199,6 +176,35 @@ void __init imx31_soc_init(void)
        imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata);
 }
+#endif /* ifdef CONFIG_SOC_IMX31 */
+#ifdef CONFIG_SOC_IMX35
+static struct map_desc mx35_io_desc[] __initdata = {
+        imx_map_entry(MX35, X_MEMC, MT_DEVICE),
+        imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
+        imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
+        imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
+        imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
+};
+void __init mx35_map_io(void)
+{
+        iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
+}
+void __init imx35_init_early(void)
+{
+        mxc_set_cpu_type(MXC_CPU_MX35);
+        mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
+        mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
+        pm_idle = imx3_idle;
+        imx_ioremap = imx3_ioremap;
+}
+void __init mx35_init_irq(void)
+{
+        mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR));
+}
 static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = {
        .ap_2_ap_addr = 642,
@@ -254,3 +260,4 @@ void __init imx35_soc_init(void)
        imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata);
 }
+#endif /* ifdef CONFIG_SOC_IMX35 */
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c
index 36cacbd0dcc2..a8e33681b732 100644
--- a/arch/arm/mach-imx/src.c
+++ b/arch/arm/mach-imx/src.c
@@ -14,6 +14,7 @@
 #include <linux/io.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
+#include <linux/smp.h>
 #include <asm/unified.h>
 #define SRC_SCR                         0x000
@@ -23,10 +24,15 @@
 static void __iomem *src_base;
+#ifndef CONFIG_SMP
+#define cpu_logical_map(cpu)            0
+#endif
 void imx_enable_cpu(int cpu, bool enable)
 {
        u32 mask, val;
+        cpu = cpu_logical_map(cpu);
        mask = 1 << (BP_SRC_SCR_CORE1_ENABLE + cpu - 1);
        val = readl_relaxed(src_base + SRC_SCR);
        val = enable ? val | mask : val & ~mask;
@@ -35,6 +41,7 @@ void imx_enable_cpu(int cpu, bool enable)
 void imx_set_cpu_jump(int cpu, void *jump_addr)
 {
+        cpu = cpu_logical_map(cpu);
        writel_relaxed(BSYM(virt_to_phys(jump_addr)),
                       src_base + SRC_GPR1 + cpu * 8);
 }
diff --git a/arch/arm/mach-kirkwood/addr-map.c b/arch/arm/mach-kirkwood/addr-map.c
index 8d03bcef5182..e9a7180863d9 100644
--- a/arch/arm/mach-kirkwood/addr-map.c
+++ b/arch/arm/mach-kirkwood/addr-map.c
@@ -13,12 +13,12 @@
 #include <linux/mbus.h>
 #include <linux/io.h>
 #include <mach/hardware.h>
+#include <plat/addr-map.h>
 #include "common.h"
 /*
 * Generic Address Decode Windows bit settings
 */
-#define TARGET_DDR              0
 #define TARGET_DEV_BUS          1
 #define TARGET_SRAM             3
 #define TARGET_PCIE             4
@@ -36,118 +36,55 @@
 #define ATTR_SRAM               0x01
 /*
- * Helpers to get DDR bank info
+ * Description of the windows needed by the platform code
 */
-#define DDR_BASE_CS_OFF(n)      (0x0000 + ((n) << 3))
+static struct __initdata orion_addr_map_cfg addr_map_cfg = {
-#define DDR_SIZE_CS_OFF(n)      (0x0004 + ((n) << 3))
+        .num_wins = 8,
+        .remappable_wins = 4,
-/*
+        .bridge_virt_base = BRIDGE_VIRT_BASE,
- * CPU Address Decode Windows registers
+};
- */
-#define WIN_OFF(n)              (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4))
-#define WIN_CTRL_OFF            0x0000
-#define WIN_BASE_OFF            0x0004
-#define WIN_REMAP_LO_OFF        0x0008
-#define WIN_REMAP_HI_OFF        0x000c
-struct mbus_dram_target_info kirkwood_mbus_dram_info;
-static int __init cpu_win_can_remap(int win)
-{
-        if (win < 4)
-                return 1;
-        return 0;
-}
-static void __init setup_cpu_win(int win, u32 base, u32 size,
-                                 u8 target, u8 attr, int remap)
-{
-        void __iomem *addr = (void __iomem *)WIN_OFF(win);
-        u32 ctrl;
-        base &= 0xffff0000;
-        ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1;
-        writel(base, addr + WIN_BASE_OFF);
-        writel(ctrl, addr + WIN_CTRL_OFF);
-        if (cpu_win_can_remap(win)) {
-                if (remap < 0)
-                        remap = base;
-                writel(remap & 0xffff0000, addr + WIN_REMAP_LO_OFF);
-                writel(0, addr + WIN_REMAP_HI_OFF);
-        }
-}
-void __init kirkwood_setup_cpu_mbus(void)
-{
-        void __iomem *addr;
-        int i;
-        int cs;
+static const struct __initdata orion_addr_map_info addr_map_info[] = {
        /*
-         * First, disable and clear windows.
+         * Windows for PCIe IO+MEM space.
         */
-        for (i = 0; i < 8; i++) {
+        { 0, KIRKWOOD_PCIE_IO_PHYS_BASE, KIRKWOOD_PCIE_IO_SIZE,
-                addr = (void __iomem *)WIN_OFF(i);
+          TARGET_PCIE, ATTR_PCIE_IO, KIRKWOOD_PCIE_IO_BUS_BASE
+        },
-                writel(0, addr + WIN_BASE_OFF);
+        { 1, KIRKWOOD_PCIE_MEM_PHYS_BASE, KIRKWOOD_PCIE_MEM_SIZE,
-                writel(0, addr + WIN_CTRL_OFF);
+          TARGET_PCIE, ATTR_PCIE_MEM, KIRKWOOD_PCIE_MEM_BUS_BASE
-                if (cpu_win_can_remap(i)) {
+        },
-                        writel(0, addr + WIN_REMAP_LO_OFF);
+        { 2, KIRKWOOD_PCIE1_IO_PHYS_BASE, KIRKWOOD_PCIE1_IO_SIZE,
-                        writel(0, addr + WIN_REMAP_HI_OFF);
+          TARGET_PCIE, ATTR_PCIE1_IO, KIRKWOOD_PCIE1_IO_BUS_BASE
-                }
+        },
-        }
+        { 3, KIRKWOOD_PCIE1_MEM_PHYS_BASE, KIRKWOOD_PCIE1_MEM_SIZE,
+          TARGET_PCIE, ATTR_PCIE1_MEM, KIRKWOOD_PCIE1_MEM_BUS_BASE
+        },
        /*
-         * Setup windows for PCIe IO+MEM space.
+         * Window for NAND controller.
         */
-        setup_cpu_win(0, KIRKWOOD_PCIE_IO_PHYS_BASE, KIRKWOOD_PCIE_IO_SIZE,
+        { 4, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE,
-                      TARGET_PCIE, ATTR_PCIE_IO, KIRKWOOD_PCIE_IO_BUS_BASE);
+          TARGET_DEV_BUS, ATTR_DEV_NAND, -1
-        setup_cpu_win(1, KIRKWOOD_PCIE_MEM_PHYS_BASE, KIRKWOOD_PCIE_MEM_SIZE,
+        },
-                      TARGET_PCIE, ATTR_PCIE_MEM, KIRKWOOD_PCIE_MEM_BUS_BASE);
-        setup_cpu_win(2, KIRKWOOD_PCIE1_IO_PHYS_BASE, KIRKWOOD_PCIE1_IO_SIZE,
-                      TARGET_PCIE, ATTR_PCIE1_IO, KIRKWOOD_PCIE1_IO_BUS_BASE);
-        setup_cpu_win(3, KIRKWOOD_PCIE1_MEM_PHYS_BASE, KIRKWOOD_PCIE1_MEM_SIZE,
-                      TARGET_PCIE, ATTR_PCIE1_MEM, KIRKWOOD_PCIE1_MEM_BUS_BASE);
        /*
-         * Setup window for NAND controller.
+         * Window for SRAM.
         */
-        setup_cpu_win(4, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE,
+        { 5, KIRKWOOD_SRAM_PHYS_BASE, KIRKWOOD_SRAM_SIZE,
-                      TARGET_DEV_BUS, ATTR_DEV_NAND, -1);
+          TARGET_SRAM, ATTR_SRAM, -1
+        },
+        /* End marker */
+        { -1, 0, 0, 0, 0, 0 }
+};
+void __init kirkwood_setup_cpu_mbus(void)
+{
        /*
-         * Setup window for SRAM.
+         * Disable, clear and configure windows.
         */
-        setup_cpu_win(5, KIRKWOOD_SRAM_PHYS_BASE, KIRKWOOD_SRAM_SIZE,
+        orion_config_wins(&addr_map_cfg, addr_map_info);
-                      TARGET_SRAM, ATTR_SRAM, -1);
        /*
         * Setup MBUS dram target info.
         */
-        kirkwood_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
+        orion_setup_cpu_mbus_target(&addr_map_cfg, DDR_WINDOW_CPU_BASE);
-        addr = (void __iomem *)DDR_WINDOW_CPU_BASE;
-        for (i = 0, cs = 0; i < 4; i++) {
-                u32 base = readl(addr + DDR_BASE_CS_OFF(i));
-                u32 size = readl(addr + DDR_SIZE_CS_OFF(i));
-                /*
-                 * Chip select enabled?
-                 */
-                if (size & 1) {
-                        struct mbus_dram_window *w;
-                        w = &kirkwood_mbus_dram_info.cs[cs++];
-                        w->cs_index = i;
-                        w->mbus_attr = 0xf & ~(1 << i);
-                        w->base = base & 0xffff0000;
-                        w->size = (size | 0x0000ffff) + 1;
-                }
-        }
-        kirkwood_mbus_dram_info.num_cs = cs;
 }
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index f3248cfbe51d..10566d4052d2 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -12,7 +12,6 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/serial_8250.h>
-#include <linux/mbus.h>
 #include <linux/ata_platform.h>
 #include <linux/mtd/nand.h>
 #include <linux/dma-mapping.h>
@@ -30,6 +29,7 @@
 #include <plat/orion_nand.h>
 #include <plat/common.h>
 #include <plat/time.h>
+#include <plat/addr-map.h>
 #include "common.h"
 /*****************************************************************************
@@ -73,8 +73,7 @@ unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
 void __init kirkwood_ehci_init(void)
 {
        kirkwood_clk_ctrl |= CGC_USB0;
-        orion_ehci_init(&kirkwood_mbus_dram_info,
+        orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB);
-                        USB_PHYS_BASE, IRQ_KIRKWOOD_USB);
 }
@@ -85,7 +84,7 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 {
        kirkwood_clk_ctrl |= CGC_GE0;
-        orion_ge00_init(eth_data, &kirkwood_mbus_dram_info,
+        orion_ge00_init(eth_data,
                        GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
                        IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk);
 }
@@ -99,7 +98,7 @@ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
        kirkwood_clk_ctrl |= CGC_GE1;
-        orion_ge01_init(eth_data, &kirkwood_mbus_dram_info,
+        orion_ge01_init(eth_data,
                        GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
                        IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk);
 }
@@ -178,8 +177,7 @@ void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
        if (sata_data->n_ports > 1)
                kirkwood_clk_ctrl |= CGC_SATA1;
-        orion_sata_init(sata_data, &kirkwood_mbus_dram_info,
+        orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
-                        SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
 }
@@ -221,7 +219,6 @@ void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
                mvsdio_data->clock = 100000000;
        else
                mvsdio_data->clock = 200000000;
-        mvsdio_data->dram = &kirkwood_mbus_dram_info;
        kirkwood_clk_ctrl |= CGC_SDIO;
        kirkwood_sdio.dev.platform_data = mvsdio_data;
        platform_device_register(&kirkwood_sdio);
@@ -285,8 +282,7 @@ static void __init kirkwood_xor0_init(void)
 {
        kirkwood_clk_ctrl |= CGC_XOR0;
-        orion_xor0_init(&kirkwood_mbus_dram_info,
+        orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
-                        XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
                        IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
 }
@@ -364,7 +360,6 @@ static struct resource kirkwood_i2s_resources[] = {
 };
 static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
-        .dram        = &kirkwood_mbus_dram_info,
        .burst       = 128,
 };
@@ -430,6 +425,8 @@ static char * __init kirkwood_id(void)
        } else if (dev == MV88F6282_DEV_ID) {
                if (rev == MV88F6282_REV_A0)
                        return "MV88F6282-Rev-A0";
+                else if (rev == MV88F6282_REV_A1)
+                        return "MV88F6282-Rev-A1";
                else
                        return "MV88F6282-Rev-Unsupported";
        } else {
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index b9b0f0968a36..4756b945106b 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -30,7 +30,6 @@ void kirkwood_init(void);
 void kirkwood_init_early(void);
 void kirkwood_init_irq(void);
-extern struct mbus_dram_target_info kirkwood_mbus_dram_info;
 void kirkwood_setup_cpu_mbus(void);
 void kirkwood_enable_pcie(void);
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index 010bdeb4ac5f..fede3d503efa 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -135,4 +135,5 @@
 #define MV88F6282_DEV_ID        0x6282
 #define MV88F6282_REV_A0        0
+#define MV88F6282_REV_A1        1
 #endif
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c
index cc431fa22ccb..0c6ad63f10c7 100644
--- a/arch/arm/mach-kirkwood/mpp.c
+++ b/arch/arm/mach-kirkwood/mpp.c
@@ -10,7 +10,6 @@
 #include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/mbus.h>
 #include <linux/io.h>
 #include <mach/hardware.h>
 #include <plat/mpp.h>
diff --git a/arch/arm/mach-kirkwood/mpp.h b/arch/arm/mach-kirkwood/mpp.h
index ac787957e2d9..e8fda45c0736 100644
--- a/arch/arm/mach-kirkwood/mpp.h
+++ b/arch/arm/mach-kirkwood/mpp.h
@@ -102,6 +102,7 @@
 #define MPP11_SATA0_ACTn        MPP( 11, 0x5, 0, 1, 0,   1,   1,   1,   1 )
 #define MPP12_GPO               MPP( 12, 0x0, 0, 1, 1,   1,   1,   1,   1 )
+#define MPP12_GPIO              MPP( 12, 0x0, 1, 1, 0,   0,   0,   1,   0 )
 #define MPP12_SD_CLK            MPP( 12, 0x1, 0, 1, 1,   1,   1,   1,   1 )
 #define MPP12_AU_SPDIF0         MPP( 12, 0xa, 0, 1, 0,   0,   0,   0,   1 )
 #define MPP12_SPI_MOSI          MPP( 12, 0xb, 0, 1, 0,   0,   0,   0,   1 )
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index 74b992d810ea..fb451bfe478b 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -11,12 +11,12 @@
 #include <linux/kernel.h>
 #include <linux/pci.h>
 #include <linux/slab.h>
-#include <linux/mbus.h>
 #include <video/vga.h>
 #include <asm/irq.h>
 #include <asm/mach/pci.h>
 #include <plat/pcie.h>
 #include <mach/bridge-regs.h>
+#include <plat/addr-map.h>
 #include "common.h"
 void kirkwood_enable_pcie(void)
@@ -208,7 +208,7 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
         */
        orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
-        orion_pcie_setup(pp->base, &kirkwood_mbus_dram_info);
+        orion_pcie_setup(pp->base);
        return 1;
 }
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 69156568bc41..4665767a4f79 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -182,7 +182,7 @@ static void __init gplugd_init(void)
        /* on-chip devices */
        pxa168_add_uart(3);
-        pxa168_add_ssp(0);
+        pxa168_add_ssp(1);
        pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
        pxa168_add_eth(&gplugd_eth_platform_data);
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
index d14eeaf16322..99b4ce1b6562 100644
--- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
+++ b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
@@ -7,7 +7,7 @@
 #define GPIO_REGS_VIRT  (APB_VIRT_BASE + 0x19000)
 #define BANK_OFF(n)     (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
-#define GPIO_REG(x)     (GPIO_REGS_VIRT + (x))
+#define GPIO_REG(x)     (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
 #define NR_BUILTIN_GPIO         IRQ_GPIO_NUM
diff --git a/arch/arm/mach-msm/devices-iommu.c b/arch/arm/mach-msm/devices-iommu.c
index 24030d0da6e3..0fb7a17df398 100644
--- a/arch/arm/mach-msm/devices-iommu.c
+++ b/arch/arm/mach-msm/devices-iommu.c
@@ -18,6 +18,7 @@
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/bootmem.h>
+#include <linux/module.h>
 #include <mach/irqs.h>
 #include <mach/iommu.h>
diff --git a/arch/arm/mach-mv78xx0/addr-map.c b/arch/arm/mach-mv78xx0/addr-map.c
index 311d5b0e9bc7..62b53d710efd 100644
--- a/arch/arm/mach-mv78xx0/addr-map.c
+++ b/arch/arm/mach-mv78xx0/addr-map.c
@@ -12,12 +12,12 @@
 #include <linux/init.h>
 #include <linux/mbus.h>
 #include <linux/io.h>
+#include <plat/addr-map.h>
 #include "common.h"
 /*
 * Generic Address Decode Windows bit settings
 */
-#define TARGET_DDR              0
 #define TARGET_DEV_BUS          1
 #define TARGET_PCIE0            4
 #define TARGET_PCIE1            8
@@ -32,23 +32,10 @@
 #define ATTR_PCIE_MEM(l)        (0xf8 & ~(0x10 << (l)))
 /*
- * Helpers to get DDR bank info
- */
-#define DDR_BASE_CS_OFF(n)      (0x0000 + ((n) << 3))
-#define DDR_SIZE_CS_OFF(n)      (0x0004 + ((n) << 3))
-/*
 * CPU Address Decode Windows registers
 */
 #define WIN0_OFF(n)             (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4))
 #define WIN8_OFF(n)             (BRIDGE_VIRT_BASE + 0x0900 + (((n) - 8) << 4))
-#define WIN_CTRL_OFF            0x0000
-#define WIN_BASE_OFF            0x0004
-#define WIN_REMAP_LO_OFF        0x0008
-#define WIN_REMAP_HI_OFF        0x000c
-struct mbus_dram_target_info mv78xx0_mbus_dram_info;
 static void __init __iomem *win_cfg_base(int win)
 {
@@ -63,94 +50,43 @@ static void __init __iomem *win_cfg_base(int win)
        return (void __iomem *)((win < 8) ? WIN0_OFF(win) : WIN8_OFF(win));
 }
-static int __init cpu_win_can_remap(int win)
+/*
-{
+ * Description of the windows needed by the platform code
-        if (win < 8)
+ */
-                return 1;
+static struct __initdata orion_addr_map_cfg addr_map_cfg = {
+        .num_wins = 14,
-        return 0;
+        .remappable_wins = 8,
-}
+        .win_cfg_base = win_cfg_base,
+};
-static void __init setup_cpu_win(int win, u32 base, u32 size,
-                                 u8 target, u8 attr, int remap)
-{
-        void __iomem *addr = win_cfg_base(win);
-        u32 ctrl;
-        base &= 0xffff0000;
-        ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1;
-        writel(base, addr + WIN_BASE_OFF);
-        writel(ctrl, addr + WIN_CTRL_OFF);
-        if (cpu_win_can_remap(win)) {
-                if (remap < 0)
-                        remap = base;
-                writel(remap & 0xffff0000, addr + WIN_REMAP_LO_OFF);
-                writel(0, addr + WIN_REMAP_HI_OFF);
-        }
-}
 void __init mv78xx0_setup_cpu_mbus(void)
 {
-        void __iomem *addr;
-        int i;
-        int cs;
        /*
-         * First, disable and clear windows.
+         * Disable, clear and configure windows.
         */
-        for (i = 0; i < 14; i++) {
+        orion_config_wins(&addr_map_cfg, NULL);
-                addr = win_cfg_base(i);
-                writel(0, addr + WIN_BASE_OFF);
-                writel(0, addr + WIN_CTRL_OFF);
-                if (cpu_win_can_remap(i)) {
-                        writel(0, addr + WIN_REMAP_LO_OFF);
-                        writel(0, addr + WIN_REMAP_HI_OFF);
-                }
-        }
        /*
         * Setup MBUS dram target info.
         */
-        mv78xx0_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
        if (mv78xx0_core_index() == 0)
-                addr = (void __iomem *)DDR_WINDOW_CPU0_BASE;
+                orion_setup_cpu_mbus_target(&addr_map_cfg,
+                                            DDR_WINDOW_CPU0_BASE);
        else
-                addr = (void __iomem *)DDR_WINDOW_CPU1_BASE;
+                orion_setup_cpu_mbus_target(&addr_map_cfg,
+                                            DDR_WINDOW_CPU1_BASE);
-        for (i = 0, cs = 0; i < 4; i++) {
-                u32 base = readl(addr + DDR_BASE_CS_OFF(i));
-                u32 size = readl(addr + DDR_SIZE_CS_OFF(i));
-                /*
-                 * Chip select enabled?
-                 */
-                if (size & 1) {
-                        struct mbus_dram_window *w;
-                        w = &mv78xx0_mbus_dram_info.cs[cs++];
-                        w->cs_index = i;
-                        w->mbus_attr = 0xf & ~(1 << i);
-                        w->base = base & 0xffff0000;
-                        w->size = (size | 0x0000ffff) + 1;
-                }
-        }
-        mv78xx0_mbus_dram_info.num_cs = cs;
 }
 void __init mv78xx0_setup_pcie_io_win(int window, u32 base, u32 size,
                                      int maj, int min)
 {
-        setup_cpu_win(window, base, size, TARGET_PCIE(maj),
+        orion_setup_cpu_win(&addr_map_cfg, window, base, size,
-                      ATTR_PCIE_IO(min), -1);
+                            TARGET_PCIE(maj), ATTR_PCIE_IO(min), -1);
 }
 void __init mv78xx0_setup_pcie_mem_win(int window, u32 base, u32 size,
                                       int maj, int min)
 {
-        setup_cpu_win(window, base, size, TARGET_PCIE(maj),
+        orion_setup_cpu_win(&addr_map_cfg, window, base, size,
-                      ATTR_PCIE_MEM(min), -1);
+                            TARGET_PCIE(maj), ATTR_PCIE_MEM(min), -1);
 }
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 23d3980ef59d..534ce204e8b9 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -12,7 +12,6 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/serial_8250.h>
-#include <linux/mbus.h>
 #include <linux/ata_platform.h>
 #include <linux/ethtool.h>
 #include <asm/mach/map.h>
@@ -23,6 +22,7 @@
 #include <plat/orion_nand.h>
 #include <plat/time.h>
 #include <plat/common.h>
+#include <plat/addr-map.h>
 #include "common.h"
 static int get_tclk(void);
@@ -169,8 +169,7 @@ void __init mv78xx0_map_io(void)
 ****************************************************************************/
 void __init mv78xx0_ehci0_init(void)
 {
-        orion_ehci_init(&mv78xx0_mbus_dram_info,
+        orion_ehci_init(USB0_PHYS_BASE, IRQ_MV78XX0_USB_0);
-                        USB0_PHYS_BASE, IRQ_MV78XX0_USB_0);
 }
@@ -179,8 +178,7 @@ void __init mv78xx0_ehci0_init(void)
 ****************************************************************************/
 void __init mv78xx0_ehci1_init(void)
 {
-        orion_ehci_1_init(&mv78xx0_mbus_dram_info,
+        orion_ehci_1_init(USB1_PHYS_BASE, IRQ_MV78XX0_USB_1);
-                          USB1_PHYS_BASE, IRQ_MV78XX0_USB_1);
 }
@@ -189,8 +187,7 @@ void __init mv78xx0_ehci1_init(void)
 ****************************************************************************/
 void __init mv78xx0_ehci2_init(void)
 {
-        orion_ehci_2_init(&mv78xx0_mbus_dram_info,
+        orion_ehci_2_init(USB2_PHYS_BASE, IRQ_MV78XX0_USB_2);
-                          USB2_PHYS_BASE, IRQ_MV78XX0_USB_2);
 }
@@ -199,7 +196,7 @@ void __init mv78xx0_ehci2_init(void)
 ****************************************************************************/
 void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 {
-        orion_ge00_init(eth_data, &mv78xx0_mbus_dram_info,
+        orion_ge00_init(eth_data,
                        GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM,
                        IRQ_MV78XX0_GE_ERR, get_tclk());
 }
@@ -210,7 +207,7 @@ void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 ****************************************************************************/
 void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data)
 {
-        orion_ge01_init(eth_data, &mv78xx0_mbus_dram_info,
+        orion_ge01_init(eth_data,
                        GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM,
                        NO_IRQ, get_tclk());
 }
@@ -234,7 +231,7 @@ void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data)
                eth_data->duplex = DUPLEX_FULL;
        }
-        orion_ge10_init(eth_data, &mv78xx0_mbus_dram_info,
+        orion_ge10_init(eth_data,
                        GE10_PHYS_BASE, IRQ_MV78XX0_GE10_SUM,
                        NO_IRQ, get_tclk());
 }
@@ -258,7 +255,7 @@ void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data)
                eth_data->duplex = DUPLEX_FULL;
        }
-        orion_ge11_init(eth_data, &mv78xx0_mbus_dram_info,
+        orion_ge11_init(eth_data,
                        GE11_PHYS_BASE, IRQ_MV78XX0_GE11_SUM,
                        NO_IRQ, get_tclk());
 }
@@ -277,8 +274,7 @@ void __init mv78xx0_i2c_init(void)
 ****************************************************************************/
 void __init mv78xx0_sata_init(struct mv_sata_platform_data *sata_data)
 {
-        orion_sata_init(sata_data, &mv78xx0_mbus_dram_info,
+        orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_MV78XX0_SATA);
-                        SATA_PHYS_BASE, IRQ_MV78XX0_SATA);
 }
diff --git a/arch/arm/mach-mv78xx0/common.h b/arch/arm/mach-mv78xx0/common.h
index 632e63d65e7a..f2ca59c75c6f 100644
--- a/arch/arm/mach-mv78xx0/common.h
+++ b/arch/arm/mach-mv78xx0/common.h
@@ -23,7 +23,6 @@ void mv78xx0_init(void);
 void mv78xx0_init_early(void);
 void mv78xx0_init_irq(void);
-extern struct mbus_dram_target_info mv78xx0_mbus_dram_info;
 void mv78xx0_setup_cpu_mbus(void);
 void mv78xx0_setup_pcie_io_win(int window, u32 base, u32 size,
                               int maj, int min);
diff --git a/arch/arm/mach-mv78xx0/mpp.c b/arch/arm/mach-mv78xx0/mpp.c
index cf4e494d44bf..df50342179e2 100644
--- a/arch/arm/mach-mv78xx0/mpp.c
+++ b/arch/arm/mach-mv78xx0/mpp.c
@@ -10,7 +10,6 @@
 #include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/mbus.h>
 #include <linux/io.h>
 #include <plat/mpp.h>
 #include <mach/hardware.h>
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c
index c51af1cac300..12fcb108b0e1 100644
--- a/arch/arm/mach-mv78xx0/pcie.c
+++ b/arch/arm/mach-mv78xx0/pcie.c
@@ -10,11 +10,11 @@
 #include <linux/kernel.h>
 #include <linux/pci.h>
-#include <linux/mbus.h>
 #include <video/vga.h>
 #include <asm/irq.h>
 #include <asm/mach/pci.h>
 #include <plat/pcie.h>
+#include <plat/addr-map.h>
 #include "common.h"
 struct pcie_port {
@@ -153,7 +153,7 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)
         * Generic PCIe unit setup.
         */
        orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
-        orion_pcie_setup(pp->base, &mv78xx0_mbus_dram_info);
+        orion_pcie_setup(pp->base);
        sys->resource[0] = &pp->res[0];
        sys->resource[1] = &pp->res[1];
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
index 5c5328257dca..5e2e7a843860 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-mx5/cpu.c
@@ -16,7 +16,7 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <mach/hardware.h>
-#include <asm/io.h>
+#include <linux/io.h>
 static int mx5_cpu_rev = -1;
@@ -67,7 +67,8 @@ static int __init mx51_neon_fixup(void)
        if (!cpu_is_mx51())
                return 0;
-        if (mx51_revision() < IMX_CHIP_REVISION_3_0 && (elf_hwcap & HWCAP_NEON)) {
+        if (mx51_revision() < IMX_CHIP_REVISION_3_0 &&
+                        (elf_hwcap & HWCAP_NEON)) {
                elf_hwcap &= ~HWCAP_NEON;
                pr_info("Turning off NEON support, detected broken NEON implementation\n");
        }
diff --git a/arch/arm/mach-mx5/imx51-dt.c b/arch/arm/mach-mx5/imx51-dt.c
index ccc61585659b..596edd967dbf 100644
--- a/arch/arm/mach-mx5/imx51-dt.c
+++ b/arch/arm/mach-mx5/imx51-dt.c
@@ -44,20 +44,22 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
        { /* sentinel */ }
 };
-static void __init imx51_tzic_add_irq_domain(struct device_node *np,
+static int __init imx51_tzic_add_irq_domain(struct device_node *np,
                                struct device_node *interrupt_parent)
 {
        irq_domain_add_simple(np, 0);
+        return 0;
 }
-static void __init imx51_gpio_add_irq_domain(struct device_node *np,
+static int __init imx51_gpio_add_irq_domain(struct device_node *np,
                                struct device_node *interrupt_parent)
 {
-        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
+        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
-                                   32 * 4; /* imx51 gets 4 gpio ports */
+        gpio_irq_base -= 32;
        irq_domain_add_simple(np, gpio_irq_base);
-        gpio_irq_base += 32;
+        return 0;
 }
 static const struct of_device_id imx51_irq_match[] __initconst = {
diff --git a/arch/arm/mach-mx5/imx53-dt.c b/arch/arm/mach-mx5/imx53-dt.c
index ccaa0b81b768..85bfd5ff21b0 100644
--- a/arch/arm/mach-mx5/imx53-dt.c
+++ b/arch/arm/mach-mx5/imx53-dt.c
@@ -48,20 +48,22 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
        { /* sentinel */ }
 };
-static void __init imx53_tzic_add_irq_domain(struct device_node *np,
+static int __init imx53_tzic_add_irq_domain(struct device_node *np,
                                struct device_node *interrupt_parent)
 {
        irq_domain_add_simple(np, 0);
+        return 0;
 }
-static void __init imx53_gpio_add_irq_domain(struct device_node *np,
+static int __init imx53_gpio_add_irq_domain(struct device_node *np,
                                struct device_node *interrupt_parent)
 {
-        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
+        static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
-                                   32 * 7; /* imx53 gets 7 gpio ports */
+        gpio_irq_base -= 32;
        irq_domain_add_simple(np, gpio_irq_base);
-        gpio_irq_base += 32;
+        return 0;
 }
 static const struct of_device_id imx53_irq_match[] __initconst = {
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index 26eacc9d0d90..df4a508f240a 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -23,7 +23,9 @@
 static void imx5_idle(void)
 {
-        mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
+        if (!need_resched())
+                mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
+        local_irq_enable();
 }
 /*
@@ -89,7 +91,7 @@ void __init imx51_init_early(void)
        mxc_set_cpu_type(MXC_CPU_MX51);
        mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
        mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
-        imx_idle = imx5_idle;
+        pm_idle = imx5_idle;
 }
 void __init imx53_init_early(void)
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index 229ae3494216..da6e4aad177c 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -404,7 +404,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate)		\
        reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr);         \
        reg &= ~BM_CLKCTRL_##dr##_DIV;                                  \
        reg |= div << BP_CLKCTRL_##dr##_DIV;                            \
-        if (reg | (1 << clk->enable_shift)) {                           \
+        if (reg & (1 << clk->enable_shift)) {                           \
                pr_err("%s: clock is gated\n", __func__);               \
                return -EINVAL;                                         \
        }                                                               \
diff --git a/arch/arm/mach-mxs/include/mach/mx28.h b/arch/arm/mach-mxs/include/mach/mx28.h
index 75d86118b76a..30c7990f3c01 100644
--- a/arch/arm/mach-mxs/include/mach/mx28.h
+++ b/arch/arm/mach-mxs/include/mach/mx28.h
@@ -104,8 +104,8 @@
 #define MX28_INT_CAN1                   9
 #define MX28_INT_LRADC_TOUCH            10
 #define MX28_INT_HSADC                  13
-#define MX28_INT_IRADC_THRESH0          14
+#define MX28_INT_LRADC_THRESH0          14
-#define MX28_INT_IRADC_THRESH1          15
+#define MX28_INT_LRADC_THRESH1          15
 #define MX28_INT_LRADC_CH0              16
 #define MX28_INT_LRADC_CH1              17
 #define MX28_INT_LRADC_CH2              18
diff --git a/arch/arm/mach-mxs/include/mach/mxs.h b/arch/arm/mach-mxs/include/mach/mxs.h
index 0d2d2b470998..bde5f6634747 100644
--- a/arch/arm/mach-mxs/include/mach/mxs.h
+++ b/arch/arm/mach-mxs/include/mach/mxs.h
@@ -30,6 +30,7 @@
 */
 #define cpu_is_mx23()           (                                       \
                machine_is_mx23evk() ||                                 \
+                machine_is_stmp378x() ||                                \
                0)
 #define cpu_is_mx28()           (                                       \
                machine_is_mx28evk() ||                                 \
diff --git a/arch/arm/mach-mxs/mach-m28evk.c b/arch/arm/mach-mxs/mach-m28evk.c
index 3b1681e4f49a..6b00577b7025 100644
--- a/arch/arm/mach-mxs/mach-m28evk.c
+++ b/arch/arm/mach-mxs/mach-m28evk.c
@@ -361,6 +361,6 @@ static struct sys_timer m28evk_timer = {
 MACHINE_START(M28EVK, "DENX M28 EVK")
        .map_io         = mx28_map_io,
        .init_irq       = mx28_init_irq,
-        .init_machine   = m28evk_init,
        .timer          = &m28evk_timer,
+        .init_machine   = m28evk_init,
 MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-stmp378x_devb.c b/arch/arm/mach-mxs/mach-stmp378x_devb.c
index 177e53123a02..6834dea38c04 100644
--- a/arch/arm/mach-mxs/mach-stmp378x_devb.c
+++ b/arch/arm/mach-mxs/mach-stmp378x_devb.c
@@ -115,6 +115,6 @@ static struct sys_timer stmp378x_dvb_timer = {
 MACHINE_START(STMP378X, "STMP378X")
        .map_io         = mx23_map_io,
        .init_irq       = mx23_init_irq,
-        .init_machine   = stmp378x_dvb_init,
        .timer          = &stmp378x_dvb_timer,
+        .init_machine   = stmp378x_dvb_init,
 MACHINE_END
diff --git a/arch/arm/mach-mxs/module-tx28.c b/arch/arm/mach-mxs/module-tx28.c
index 0fcff47009cf..9a7b08b2a925 100644
--- a/arch/arm/mach-mxs/module-tx28.c
+++ b/arch/arm/mach-mxs/module-tx28.c
@@ -66,11 +66,11 @@ static const iomux_cfg_t tx28_fec1_pads[] __initconst = {
        MX28_PAD_ENET0_CRS__ENET1_RX_EN,
 };
-static struct fec_platform_data tx28_fec0_data = {
+static const struct fec_platform_data tx28_fec0_data __initconst = {
        .phy = PHY_INTERFACE_MODE_RMII,
 };
-static struct fec_platform_data tx28_fec1_data = {
+static const struct fec_platform_data tx28_fec1_data __initconst = {
        .phy = PHY_INTERFACE_MODE_RMII,
 };
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index e0a028161dde..4f8d66f044e7 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -168,78 +168,6 @@ config MACH_OMAP_GENERIC
          custom OMAP boards. Say Y here if you have a custom
          board.
-comment "OMAP CPU Speed"
-        depends on ARCH_OMAP1
-config OMAP_CLOCKS_SET_BY_BOOTLOADER
-        bool "OMAP clocks set by bootloader"
-        depends on ARCH_OMAP1
-        help
-          Enable this option to prevent the kernel from overriding the clock
-          frequencies programmed by bootloader for MPU, DSP, MMUs, TC,
-          internal LCD controller and MPU peripherals.
-config OMAP_ARM_216MHZ
-        bool "OMAP ARM 216 MHz CPU (1710 only)"
-        depends on ARCH_OMAP1 && ARCH_OMAP16XX
-        help
-          Enable 216 MHz clock for OMAP1710 CPU. If unsure, say N.
-config OMAP_ARM_195MHZ
-        bool "OMAP ARM 195 MHz CPU"
-        depends on ARCH_OMAP1 && (ARCH_OMAP730 || ARCH_OMAP850)
-        help
-          Enable 195MHz clock for OMAP CPU. If unsure, say N.
-config OMAP_ARM_192MHZ
-        bool "OMAP ARM 192 MHz CPU"
-        depends on ARCH_OMAP1 && ARCH_OMAP16XX
-        help
-          Enable 192MHz clock for OMAP CPU. If unsure, say N.
-config OMAP_ARM_182MHZ
-        bool "OMAP ARM 182 MHz CPU"
-        depends on ARCH_OMAP1 && (ARCH_OMAP730 || ARCH_OMAP850)
-        help
-          Enable 182MHz clock for OMAP CPU. If unsure, say N.
-config OMAP_ARM_168MHZ
-        bool "OMAP ARM 168 MHz CPU"
-        depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850)
-        help
-          Enable 168MHz clock for OMAP CPU. If unsure, say N.
-config OMAP_ARM_150MHZ
-        bool "OMAP ARM 150 MHz CPU"
-        depends on ARCH_OMAP1 && ARCH_OMAP15XX
-        help
-          Enable 150MHz clock for OMAP CPU. If unsure, say N.
-config OMAP_ARM_120MHZ
-        bool "OMAP ARM 120 MHz CPU"
-        depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850)
-        help
-          Enable 120MHz clock for OMAP CPU. If unsure, say N.
-config OMAP_ARM_96MHZ
-        bool "OMAP ARM 96 MHz CPU"
-        depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850)
-        help
-          Enable 96MHz clock for OMAP CPU. If unsure, say N.
-config OMAP_ARM_60MHZ
-        bool "OMAP ARM 60 MHz CPU"
-        depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850)
-        default y
-        help
-          Enable 60MHz clock for OMAP CPU. If unsure, say Y.
-config OMAP_ARM_30MHZ
-        bool "OMAP ARM 30 MHz CPU"
-        depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730 || ARCH_OMAP850)
-        help
-          Enable 30MHz clock for OMAP CPU. If unsure, say N.
 endmenu
 endif
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index 51bae31cf361..b0f15d234a12 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -302,8 +302,6 @@ static void __init ams_delta_init(void)
        omap_cfg_reg(J19_1610_CAM_D6);
        omap_cfg_reg(J18_1610_CAM_D7);
-        iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
        omap_board_config = ams_delta_config;
        omap_board_config_size = ARRAY_SIZE(ams_delta_config);
        omap_serial_init();
@@ -373,10 +371,16 @@ static int __init ams_delta_modem_init(void)
 }
 arch_initcall(ams_delta_modem_init);
+static void __init ams_delta_map_io(void)
+{
+        omap15xx_map_io();
+        iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
+}
 MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
        /* Maintainer: Jonathan McDowell <noodles@earth.li> */
        .atag_offset    = 0x100,
-        .map_io         = omap15xx_map_io,
+        .map_io         = ams_delta_map_io,
        .init_early     = omap1_init_early,
        .reserve        = omap_reserve,
        .init_irq       = omap1_init_irq,
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
index 84ef70476b51..0c50df05d135 100644
--- a/arch/arm/mach-omap1/clock.c
+++ b/arch/arm/mach-omap1/clock.c
@@ -197,11 +197,10 @@ int omap1_select_table_rate(struct clk *clk, unsigned long rate)
        ref_rate = ck_ref_p->rate;
        for (ptr = omap1_rate_table; ptr->rate; ptr++) {
-                if (ptr->xtal != ref_rate)
+                if (!(ptr->flags & cpu_mask))
                        continue;
-                /* DPLL1 cannot be reprogrammed without risking system crash */
+                if (ptr->xtal != ref_rate)
-                if (likely(dpll1_rate != 0) && ptr->pll_rate != dpll1_rate)
                        continue;
                /* Can check only after xtal frequency check */
@@ -215,12 +214,8 @@ int omap1_select_table_rate(struct clk *clk, unsigned long rate)
        /*
         * In most cases we should not need to reprogram DPLL.
         * Reprogramming the DPLL is tricky, it must be done from SRAM.
-         * (on 730, bit 13 must always be 1)
         */
-        if (cpu_is_omap7xx())
+        omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val);
-                omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val | 0x2000);
-        else
-                omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val);
        /* XXX Do we need to recalculate the tree below DPLL1 at this point? */
        ck_dpll1_p->rate = ptr->pll_rate;
@@ -290,6 +285,9 @@ long omap1_round_to_table_rate(struct clk *clk, unsigned long rate)
        highest_rate = -EINVAL;
        for (ptr = omap1_rate_table; ptr->rate; ptr++) {
+                if (!(ptr->flags & cpu_mask))
+                        continue;
                if (ptr->xtal != ref_rate)
                        continue;
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index eaf09efb91ca..3d04f4f67676 100644
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -17,7 +17,8 @@
 #include <plat/clock.h>
-extern int __init omap1_clk_init(void);
+int omap1_clk_init(void);
+void omap1_clk_late_init(void);
 extern int omap1_clk_enable(struct clk *clk);
 extern void omap1_clk_disable(struct clk *clk);
 extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate);
@@ -110,4 +111,7 @@ extern const struct clkops clkops_dummy;
 extern const struct clkops clkops_uart_16xx;
 extern const struct clkops clkops_generic;
+/* used for passing SoC type to omap1_{select,round_to}_table_rate() */
+extern u32 cpu_mask;
 #endif
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index 92400b9eb69f..94699a82a734 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -16,6 +16,8 @@
 #include <linux/kernel.h>
 #include <linux/clk.h>
+#include <linux/cpufreq.h>
+#include <linux/delay.h>
 #include <linux/io.h>
 #include <asm/mach-types.h>  /* for machine_is_* */
@@ -23,6 +25,7 @@
 #include <plat/clock.h>
 #include <plat/cpu.h>
 #include <plat/clkdev_omap.h>
+#include <plat/sram.h>  /* for omap_sram_reprogram_clock() */
 #include <plat/usb.h>   /* for OTG_BASE */
 #include "clock.h"
@@ -767,12 +770,23 @@ static struct clk_functions omap1_clk_functions = {
        .clk_disable_unused     = omap1_clk_disable_unused,
 };
+static void __init omap1_show_rates(void)
+{
+        pr_notice("Clocking rate (xtal/DPLL1/MPU): "
+                        "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
+                ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
+                ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
+                arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
+}
+u32 cpu_mask;
 int __init omap1_clk_init(void)
 {
        struct omap_clk *c;
        const struct omap_clock_config *info;
        int crystal_type = 0; /* Default 12 MHz */
-        u32 reg, cpu_mask;
+        u32 reg;
 #ifdef CONFIG_DEBUG_LL
        /*
@@ -797,6 +811,8 @@ int __init omap1_clk_init(void)
                clk_preinit(c->lk.clk);
        cpu_mask = 0;
+        if (cpu_is_omap1710())
+                cpu_mask |= CK_1710;
        if (cpu_is_omap16xx())
                cpu_mask |= CK_16XX;
        if (cpu_is_omap1510())
@@ -835,9 +851,12 @@ int __init omap1_clk_init(void)
        /* We want to be in syncronous scalable mode */
        omap_writew(0x1000, ARM_SYSST);
-#ifdef CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER
-        /* Use values set by bootloader. Determine PLL rate and recalculate
+        /*
-         * dependent clocks as if kernel had changed PLL or divisors.
+         * Initially use the values set by bootloader. Determine PLL rate and
+         * recalculate dependent clocks as if kernel had changed PLL or
+         * divisors. See also omap1_clk_late_init() that can reprogram dpll1
+         * after the SRAM is initialized.
         */
        {
                unsigned pll_ctl_val = omap_readw(DPLL_CTL);
@@ -862,25 +881,10 @@ int __init omap1_clk_init(void)
                        }
                }
        }
-#else
-        /* Find the highest supported frequency and enable it */
-        if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
-                printk(KERN_ERR "System frequencies not set. Check your config.\n");
-                /* Guess sane values (60MHz) */
-                omap_writew(0x2290, DPLL_CTL);
-                omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL);
-                ck_dpll1.rate = 60000000;
-        }
-#endif
        propagate_rate(&ck_dpll1);
        /* Cache rates for clocks connected to ck_ref (not dpll1) */
        propagate_rate(&ck_ref);
-        printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): "
+        omap1_show_rates();
-                "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
-               ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
-               ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
-               arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
        if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
                /* Select slicer output as OMAP input clock */
                omap_writew(omap_readw(OMAP7XX_PCC_UPLD_CTRL) & ~0x1,
@@ -925,3 +929,23 @@ int __init omap1_clk_init(void)
        return 0;
 }
+#define OMAP1_DPLL1_SANE_VALUE  60000000
+void __init omap1_clk_late_init(void)
+{
+        unsigned long rate = ck_dpll1.rate;
+        /* Find the highest supported frequency and enable it */
+        if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
+                pr_err("System frequencies not set, using default. Check your config.\n");
+                /*
+                 * Reprogramming the DPLL is tricky, it must be done from SRAM.
+                 */
+                omap_sram_reprogram_clock(0x2290, 0x0005);
+                ck_dpll1.rate = OMAP1_DPLL1_SANE_VALUE;
+        }
+        propagate_rate(&ck_dpll1);
+        omap1_show_rates();
+        loops_per_jiffy = cpufreq_scale(loops_per_jiffy, rate, ck_dpll1.rate);
+}
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 48ef9888e820..475cb2f50d87 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -30,6 +30,8 @@
 #include <plat/omap7xx.h>
 #include <plat/mcbsp.h>
+#include "clock.h"
 /*-------------------------------------------------------------------------*/
 #if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE)
@@ -293,6 +295,7 @@ static int __init omap1_init_devices(void)
                return -ENODEV;
        omap_sram_init();
+        omap1_clk_late_init();
        /* please keep these calls, and their implementations above,
         * in alphabetical order so they're easier to sort through.
diff --git a/arch/arm/mach-omap1/opp.h b/arch/arm/mach-omap1/opp.h
index 07074d79adce..79a683864a5c 100644
--- a/arch/arm/mach-omap1/opp.h
+++ b/arch/arm/mach-omap1/opp.h
@@ -21,6 +21,7 @@ struct mpu_rate {
        unsigned long           pll_rate;
        __u16                   ckctl_val;
        __u16                   dpllctl_val;
+        u32                     flags;
 };
 extern struct mpu_rate omap1_rate_table[];
diff --git a/arch/arm/mach-omap1/opp_data.c b/arch/arm/mach-omap1/opp_data.c
index 75a546514994..9cd4ddb51397 100644
--- a/arch/arm/mach-omap1/opp_data.c
+++ b/arch/arm/mach-omap1/opp_data.c
@@ -10,6 +10,7 @@
 * published by the Free Software Foundation.
 */
+#include <plat/clkdev_omap.h>
 #include "opp.h"
 /*-------------------------------------------------------------------------
@@ -20,40 +21,34 @@ struct mpu_rate omap1_rate_table[] = {
         * NOTE: Comment order here is different from bits in CKCTL value:
         * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv
         */
-#if defined(CONFIG_OMAP_ARM_216MHZ)
+        { 216000000, 12000000, 216000000, 0x050d, 0x2910, /* 1/1/2/2/2/8 */
-        { 216000000, 12000000, 216000000, 0x050d, 0x2910 }, /* 1/1/2/2/2/8 */
+                        CK_1710 },
-#endif
+        { 195000000, 13000000, 195000000, 0x050e, 0x2790, /* 1/1/2/2/4/8 */
-#if defined(CONFIG_OMAP_ARM_195MHZ)
+                        CK_7XX },
-        { 195000000, 13000000, 195000000, 0x050e, 0x2790 }, /* 1/1/2/2/4/8 */
+        { 192000000, 19200000, 192000000, 0x050f, 0x2510, /* 1/1/2/2/8/8 */
-#endif
+                        CK_16XX },
-#if defined(CONFIG_OMAP_ARM_192MHZ)
+        { 192000000, 12000000, 192000000, 0x050f, 0x2810, /* 1/1/2/2/8/8 */
-        { 192000000, 19200000, 192000000, 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */
+                        CK_16XX },
-        { 192000000, 12000000, 192000000, 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */
+        {  96000000, 12000000, 192000000, 0x055f, 0x2810, /* 2/2/2/2/8/8 */
-        {  96000000, 12000000, 192000000, 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */
+                        CK_16XX },
-        {  48000000, 12000000, 192000000, 0x0baf, 0x2810 }, /* 4/4/4/8/8/8 */
+        {  48000000, 12000000, 192000000, 0x0baf, 0x2810, /* 4/4/4/8/8/8 */
-        {  24000000, 12000000, 192000000, 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */
+                        CK_16XX },
-#endif
+        {  24000000, 12000000, 192000000, 0x0fff, 0x2810, /* 8/8/8/8/8/8 */
-#if defined(CONFIG_OMAP_ARM_182MHZ)
+                        CK_16XX },
-        { 182000000, 13000000, 182000000, 0x050e, 0x2710 }, /* 1/1/2/2/4/8 */
+        { 182000000, 13000000, 182000000, 0x050e, 0x2710, /* 1/1/2/2/4/8 */
-#endif
+                        CK_7XX },
-#if defined(CONFIG_OMAP_ARM_168MHZ)
+        { 168000000, 12000000, 168000000, 0x010f, 0x2710, /* 1/1/1/2/8/8 */
-        { 168000000, 12000000, 168000000, 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */
+                        CK_16XX|CK_7XX },
-#endif
+        { 150000000, 12000000, 150000000, 0x010a, 0x2cb0, /* 1/1/1/2/4/4 */
-#if defined(CONFIG_OMAP_ARM_150MHZ)
+                        CK_1510 },
-        { 150000000, 12000000, 150000000, 0x010a, 0x2cb0 }, /* 1/1/1/2/4/4 */
+        { 120000000, 12000000, 120000000, 0x010a, 0x2510, /* 1/1/1/2/4/4 */
-#endif
+                        CK_16XX|CK_1510|CK_310|CK_7XX },
-#if defined(CONFIG_OMAP_ARM_120MHZ)
+        {  96000000, 12000000,  96000000, 0x0005, 0x2410, /* 1/1/1/1/2/2 */
-        { 120000000, 12000000, 120000000, 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */
+                        CK_16XX|CK_1510|CK_310|CK_7XX },
-#endif
+        {  60000000, 12000000,  60000000, 0x0005, 0x2290, /* 1/1/1/1/2/2 */
-#if defined(CONFIG_OMAP_ARM_96MHZ)
+                        CK_16XX|CK_1510|CK_310|CK_7XX },
-        {  96000000, 12000000,  96000000, 0x0005, 0x2410 }, /* 1/1/1/1/2/2 */
+        {  30000000, 12000000,  60000000, 0x0555, 0x2290, /* 2/2/2/2/2/2 */
-#endif
+                        CK_16XX|CK_1510|CK_310|CK_7XX },
-#if defined(CONFIG_OMAP_ARM_60MHZ)
-        {  60000000, 12000000,  60000000, 0x0005, 0x2290 }, /* 1/1/1/1/2/2 */
-#endif
-#if defined(CONFIG_OMAP_ARM_30MHZ)
-        {  30000000, 12000000,  60000000, 0x0555, 0x2290 }, /* 2/2/2/2/2/2 */
-#endif
        { 0, 0, 0, 0, 0 },
 };
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 503414718905..e1293aa513d3 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -334,6 +334,7 @@ config MACH_OMAP4_PANDA
 config OMAP3_EMU
        bool "OMAP3 debugging peripherals"
        depends on ARCH_OMAP3
+        select ARM_AMBA
        select OC_ETM
        help
          Say Y here to enable debugging hardware of omap3
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 69ab1c069134..b009f17dee56 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -4,7 +4,7 @@
 # Common support
 obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
-         common.o gpio.o dma.o wd_timer.o
+         common.o gpio.o dma.o wd_timer.o display.o
 omap-2-3-common                         = irq.o sdrc.o
 hwmod-common                            = omap_hwmod.o \
@@ -264,7 +264,4 @@ smsc911x-$(CONFIG_SMSC911X)		:= gpmc-smsc911x.o
 obj-y                                   += $(smsc911x-m) $(smsc911x-y)
 obj-$(CONFIG_ARCH_OMAP4)                += hwspinlock.o
-disp-$(CONFIG_OMAP2_DSS)                := display.o
-obj-y                                   += $(disp-m) $(disp-y)
 obj-y                                   += common-board-devices.o twl-common.o
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 1fe35c24fba2..942bb4f19f9f 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -24,6 +24,7 @@
 #include <linux/sched.h>
 #include <linux/cpuidle.h>
+#include <linux/export.h>
 #include <plat/prcm.h>
 #include <plat/irqs.h>
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index adb2756e242f..dce9905d64bb 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -27,8 +27,35 @@
 #include <plat/omap_hwmod.h>
 #include <plat/omap_device.h>
 #include <plat/omap-pm.h>
+#include <plat/common.h>
 #include "control.h"
+#include "display.h"
+#define DISPC_CONTROL           0x0040
+#define DISPC_CONTROL2          0x0238
+#define DISPC_IRQSTATUS         0x0018
+#define DSS_SYSCONFIG           0x10
+#define DSS_SYSSTATUS           0x14
+#define DSS_CONTROL             0x40
+#define DSS_SDI_CONTROL         0x44
+#define DSS_PLL_CONTROL         0x48
+#define LCD_EN_MASK             (0x1 << 0)
+#define DIGIT_EN_MASK           (0x1 << 1)
+#define FRAMEDONE_IRQ_SHIFT     0
+#define EVSYNC_EVEN_IRQ_SHIFT   2
+#define EVSYNC_ODD_IRQ_SHIFT    3
+#define FRAMEDONE2_IRQ_SHIFT    22
+#define FRAMEDONETV_IRQ_SHIFT   24
+/*
+ * FRAMEDONE_IRQ_TIMEOUT: how long (in milliseconds) to wait during DISPC
+ *     reset before deciding that something has gone wrong
+ */
+#define FRAMEDONE_IRQ_TIMEOUT           100
 static struct platform_device omap_display_device = {
        .name          = "omapdss",
@@ -172,3 +199,135 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
        return r;
 }
+static void dispc_disable_outputs(void)
+{
+        u32 v, irq_mask = 0;
+        bool lcd_en, digit_en, lcd2_en = false;
+        int i;
+        struct omap_dss_dispc_dev_attr *da;
+        struct omap_hwmod *oh;
+        oh = omap_hwmod_lookup("dss_dispc");
+        if (!oh) {
+                WARN(1, "display: could not disable outputs during reset - could not find dss_dispc hwmod\n");
+                return;
+        }
+        if (!oh->dev_attr) {
+                pr_err("display: could not disable outputs during reset due to missing dev_attr\n");
+                return;
+        }
+        da = (struct omap_dss_dispc_dev_attr *)oh->dev_attr;
+        /* store value of LCDENABLE and DIGITENABLE bits */
+        v = omap_hwmod_read(oh, DISPC_CONTROL);
+        lcd_en = v & LCD_EN_MASK;
+        digit_en = v & DIGIT_EN_MASK;
+        /* store value of LCDENABLE for LCD2 */
+        if (da->manager_count > 2) {
+                v = omap_hwmod_read(oh, DISPC_CONTROL2);
+                lcd2_en = v & LCD_EN_MASK;
+        }
+        if (!(lcd_en | digit_en | lcd2_en))
+                return; /* no managers currently enabled */
+        /*
+         * If any manager was enabled, we need to disable it before
+         * DSS clocks are disabled or DISPC module is reset
+         */
+        if (lcd_en)
+                irq_mask |= 1 << FRAMEDONE_IRQ_SHIFT;
+        if (digit_en) {
+                if (da->has_framedonetv_irq) {
+                        irq_mask |= 1 << FRAMEDONETV_IRQ_SHIFT;
+                } else {
+                        irq_mask |= 1 << EVSYNC_EVEN_IRQ_SHIFT |
+                                1 << EVSYNC_ODD_IRQ_SHIFT;
+                }
+        }
+        if (lcd2_en)
+                irq_mask |= 1 << FRAMEDONE2_IRQ_SHIFT;
+        /*
+         * clear any previous FRAMEDONE, FRAMEDONETV,
+         * EVSYNC_EVEN/ODD or FRAMEDONE2 interrupts
+         */
+        omap_hwmod_write(irq_mask, oh, DISPC_IRQSTATUS);
+        /* disable LCD and TV managers */
+        v = omap_hwmod_read(oh, DISPC_CONTROL);
+        v &= ~(LCD_EN_MASK | DIGIT_EN_MASK);
+        omap_hwmod_write(v, oh, DISPC_CONTROL);
+        /* disable LCD2 manager */
+        if (da->manager_count > 2) {
+                v = omap_hwmod_read(oh, DISPC_CONTROL2);
+                v &= ~LCD_EN_MASK;
+                omap_hwmod_write(v, oh, DISPC_CONTROL2);
+        }
+        i = 0;
+        while ((omap_hwmod_read(oh, DISPC_IRQSTATUS) & irq_mask) !=
+               irq_mask) {
+                i++;
+                if (i > FRAMEDONE_IRQ_TIMEOUT) {
+                        pr_err("didn't get FRAMEDONE1/2 or TV interrupt\n");
+                        break;
+                }
+                mdelay(1);
+        }
+}
+#define MAX_MODULE_SOFTRESET_WAIT       10000
+int omap_dss_reset(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_opt_clk *oc;
+        int c = 0;
+        int i, r;
+        if (!(oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)) {
+                pr_err("dss_core: hwmod data doesn't contain reset data\n");
+                return -EINVAL;
+        }
+        for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
+                if (oc->_clk)
+                        clk_enable(oc->_clk);
+        dispc_disable_outputs();
+        /* clear SDI registers */
+        if (cpu_is_omap3430()) {
+                omap_hwmod_write(0x0, oh, DSS_SDI_CONTROL);
+                omap_hwmod_write(0x0, oh, DSS_PLL_CONTROL);
+        }
+        /*
+         * clear DSS_CONTROL register to switch DSS clock sources to
+         * PRCM clock, if any
+         */
+        omap_hwmod_write(0x0, oh, DSS_CONTROL);
+        omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)
+                                & SYSS_RESETDONE_MASK),
+                        MAX_MODULE_SOFTRESET_WAIT, c);
+        if (c == MAX_MODULE_SOFTRESET_WAIT)
+                pr_warning("dss_core: waiting for reset to finish failed\n");
+        else
+                pr_debug("dss_core: softreset done\n");
+        for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
+                if (oc->_clk)
+                        clk_disable(oc->_clk);
+        r = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
+        return r;
+}
diff --git a/arch/arm/mach-omap2/display.h b/arch/arm/mach-omap2/display.h
new file mode 100644
index 000000000000..b871b017b352
--- /dev/null
+++ b/arch/arm/mach-omap2/display.h
@@ -0,0 +1,29 @@
+/*
+ * display.h - OMAP2+ integration-specific DSS header
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef __ARCH_ARM_MACH_OMAP2_DISPLAY_H
+#define __ARCH_ARM_MACH_OMAP2_DISPLAY_H
+#include <linux/kernel.h>
+struct omap_dss_dispc_dev_attr {
+        u8      manager_count;
+        bool    has_framedonetv_irq;
+};
+#endif
diff --git a/arch/arm/mach-omap2/io.h b/arch/arm/mach-omap2/io.h
deleted file mode 100644
index e69de29bb2d1..000000000000
--- a/arch/arm/mach-omap2/io.h
+++ /dev/null
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 6b3088db83b7..207a2ff9a8c4 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -749,7 +749,7 @@ static int _count_mpu_irqs(struct omap_hwmod *oh)
                ohii = &oh->mpu_irqs[i++];
        } while (ohii->irq != -1);
-        return i;
+        return i-1;
 }
 /**
@@ -772,7 +772,7 @@ static int _count_sdma_reqs(struct omap_hwmod *oh)
                ohdi = &oh->sdma_reqs[i++];
        } while (ohdi->dma_req != -1);
-        return i;
+        return i-1;
 }
 /**
@@ -795,7 +795,7 @@ static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
                mem = &os->addr[i++];
        } while (mem->pa_start != mem->pa_end);
-        return i;
+        return i-1;
 }
 /**
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 6d7206213525..a5409ce3f323 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -875,6 +875,10 @@ static struct omap_hwmod_ocp_if *omap2420_dss_slaves[] = {
 };
 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
+        /*
+         * The DSS HW needs all DSS clocks enabled during reset. The dss_core
+         * driver does not use these clocks.
+         */
        { .role = "tv_clk", .clk = "dss_54m_fck" },
        { .role = "sys_clk", .clk = "dss2_fck" },
 };
@@ -899,7 +903,7 @@ static struct omap_hwmod omap2420_dss_core_hwmod = {
        .slaves_cnt     = ARRAY_SIZE(omap2420_dss_slaves),
        .masters        = omap2420_dss_masters,
        .masters_cnt    = ARRAY_SIZE(omap2420_dss_masters),
-        .flags          = HWMOD_NO_IDLEST,
+        .flags          = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
 };
 /* l4_core -> dss_dispc */
@@ -939,6 +943,7 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = {
        .slaves         = omap2420_dss_dispc_slaves,
        .slaves_cnt     = ARRAY_SIZE(omap2420_dss_dispc_slaves),
        .flags          = HWMOD_NO_IDLEST,
+        .dev_attr       = &omap2_3_dss_dispc_dev_attr
 };
 /* l4_core -> dss_rfbi */
@@ -961,6 +966,10 @@ static struct omap_hwmod_ocp_if *omap2420_dss_rfbi_slaves[] = {
        &omap2420_l4_core__dss_rfbi,
 };
+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
+        { .role = "ick", .clk = "dss_ick" },
+};
 static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
        .name           = "dss_rfbi",
        .class          = &omap2_rfbi_hwmod_class,
@@ -972,6 +981,8 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
                        .module_offs = CORE_MOD,
                },
        },
+        .opt_clks       = dss_rfbi_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_rfbi_opt_clks),
        .slaves         = omap2420_dss_rfbi_slaves,
        .slaves_cnt     = ARRAY_SIZE(omap2420_dss_rfbi_slaves),
        .flags          = HWMOD_NO_IDLEST,
@@ -981,7 +992,7 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
 static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
        .master         = &omap2420_l4_core_hwmod,
        .slave          = &omap2420_dss_venc_hwmod,
-        .clk            = "dss_54m_fck",
+        .clk            = "dss_ick",
        .addr           = omap2_dss_venc_addrs,
        .fw = {
                .omap2 = {
@@ -1001,7 +1012,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_venc_slaves[] = {
 static struct omap_hwmod omap2420_dss_venc_hwmod = {
        .name           = "dss_venc",
        .class          = &omap2_venc_hwmod_class,
-        .main_clk       = "dss1_fck",
+        .main_clk       = "dss_54m_fck",
        .prcm           = {
                .omap2 = {
                        .prcm_reg_id = 1,
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index a2580d01c3ff..c4f56cb60d7d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -942,6 +942,10 @@ static struct omap_hwmod_ocp_if *omap2430_dss_slaves[] = {
 };
 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
+        /*
+         * The DSS HW needs all DSS clocks enabled during reset. The dss_core
+         * driver does not use these clocks.
+         */
        { .role = "tv_clk", .clk = "dss_54m_fck" },
        { .role = "sys_clk", .clk = "dss2_fck" },
 };
@@ -966,7 +970,7 @@ static struct omap_hwmod omap2430_dss_core_hwmod = {
        .slaves_cnt     = ARRAY_SIZE(omap2430_dss_slaves),
        .masters        = omap2430_dss_masters,
        .masters_cnt    = ARRAY_SIZE(omap2430_dss_masters),
-        .flags          = HWMOD_NO_IDLEST,
+        .flags          = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
 };
 /* l4_core -> dss_dispc */
@@ -1000,6 +1004,7 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = {
        .slaves         = omap2430_dss_dispc_slaves,
        .slaves_cnt     = ARRAY_SIZE(omap2430_dss_dispc_slaves),
        .flags          = HWMOD_NO_IDLEST,
+        .dev_attr       = &omap2_3_dss_dispc_dev_attr
 };
 /* l4_core -> dss_rfbi */
@@ -1016,6 +1021,10 @@ static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = {
        &omap2430_l4_core__dss_rfbi,
 };
+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
+        { .role = "ick", .clk = "dss_ick" },
+};
 static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
        .name           = "dss_rfbi",
        .class          = &omap2_rfbi_hwmod_class,
@@ -1027,6 +1036,8 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
                        .module_offs = CORE_MOD,
                },
        },
+        .opt_clks       = dss_rfbi_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_rfbi_opt_clks),
        .slaves         = omap2430_dss_rfbi_slaves,
        .slaves_cnt     = ARRAY_SIZE(omap2430_dss_rfbi_slaves),
        .flags          = HWMOD_NO_IDLEST,
@@ -1036,7 +1047,7 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
        .master         = &omap2430_l4_core_hwmod,
        .slave          = &omap2430_dss_venc_hwmod,
-        .clk            = "dss_54m_fck",
+        .clk            = "dss_ick",
        .addr           = omap2_dss_venc_addrs,
        .flags          = OCPIF_SWSUP_IDLE,
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
@@ -1050,7 +1061,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = {
 static struct omap_hwmod omap2430_dss_venc_hwmod = {
        .name           = "dss_venc",
        .class          = &omap2_venc_hwmod_class,
-        .main_clk       = "dss1_fck",
+        .main_clk       = "dss_54m_fck",
        .prcm           = {
                .omap2 = {
                        .prcm_reg_id = 1,
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index c451729d289a..c11273da5dcc 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -11,6 +11,7 @@
 #include <plat/omap_hwmod.h>
 #include <plat/serial.h>
 #include <plat/dma.h>
+#include <plat/common.h>
 #include <mach/irqs.h>
@@ -43,13 +44,15 @@ static struct omap_hwmod_class_sysconfig omap2_dss_sysc = {
        .rev_offs       = 0x0000,
        .sysc_offs      = 0x0010,
        .syss_offs      = 0x0014,
-        .sysc_flags     = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+        .sysc_flags     = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
+                           SYSS_HAS_RESET_STATUS),
        .sysc_fields    = &omap_hwmod_sysc_type1,
 };
 struct omap_hwmod_class omap2_dss_hwmod_class = {
        .name   = "dss",
        .sysc   = &omap2_dss_sysc,
+        .reset  = omap_dss_reset,
 };
 /*
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index bc9035ec87fc..7f8915ad5099 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1369,9 +1369,14 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_slaves[] = {
 };
 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
-        { .role = "tv_clk", .clk = "dss_tv_fck" },
+        /*
-        { .role = "video_clk", .clk = "dss_96m_fck" },
+         * The DSS HW needs all DSS clocks enabled during reset. The dss_core
+         * driver does not use these clocks.
+         */
        { .role = "sys_clk", .clk = "dss2_alwon_fck" },
+        { .role = "tv_clk", .clk = "dss_tv_fck" },
+        /* required only on OMAP3430 */
+        { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
 };
 static struct omap_hwmod omap3430es1_dss_core_hwmod = {
@@ -1394,11 +1399,12 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = {
        .slaves_cnt     = ARRAY_SIZE(omap3430es1_dss_slaves),
        .masters        = omap3xxx_dss_masters,
        .masters_cnt    = ARRAY_SIZE(omap3xxx_dss_masters),
-        .flags          = HWMOD_NO_IDLEST,
+        .flags          = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
 };
 static struct omap_hwmod omap3xxx_dss_core_hwmod = {
        .name           = "dss_core",
+        .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
        .class          = &omap2_dss_hwmod_class,
        .main_clk       = "dss1_alwon_fck", /* instead of dss_fck */
        .sdma_reqs      = omap3xxx_dss_sdma_chs,
@@ -1456,6 +1462,7 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
        .slaves         = omap3xxx_dss_dispc_slaves,
        .slaves_cnt     = ARRAY_SIZE(omap3xxx_dss_dispc_slaves),
        .flags          = HWMOD_NO_IDLEST,
+        .dev_attr       = &omap2_3_dss_dispc_dev_attr
 };
 /*
@@ -1486,6 +1493,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = {
 static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = {
        .master         = &omap3xxx_l4_core_hwmod,
        .slave          = &omap3xxx_dss_dsi1_hwmod,
+        .clk            = "dss_ick",
        .addr           = omap3xxx_dss_dsi1_addrs,
        .fw = {
                .omap2 = {
@@ -1502,6 +1510,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dsi1_slaves[] = {
        &omap3xxx_l4_core__dss_dsi1,
 };
+static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = {
+        { .role = "sys_clk", .clk = "dss2_alwon_fck" },
+};
 static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
        .name           = "dss_dsi1",
        .class          = &omap3xxx_dsi_hwmod_class,
@@ -1514,6 +1526,8 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
                        .module_offs = OMAP3430_DSS_MOD,
                },
        },
+        .opt_clks       = dss_dsi1_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_dsi1_opt_clks),
        .slaves         = omap3xxx_dss_dsi1_slaves,
        .slaves_cnt     = ARRAY_SIZE(omap3xxx_dss_dsi1_slaves),
        .flags          = HWMOD_NO_IDLEST,
@@ -1540,6 +1554,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_rfbi_slaves[] = {
        &omap3xxx_l4_core__dss_rfbi,
 };
+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
+        { .role = "ick", .clk = "dss_ick" },
+};
 static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
        .name           = "dss_rfbi",
        .class          = &omap2_rfbi_hwmod_class,
@@ -1551,6 +1569,8 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
                        .module_offs = OMAP3430_DSS_MOD,
                },
        },
+        .opt_clks       = dss_rfbi_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_rfbi_opt_clks),
        .slaves         = omap3xxx_dss_rfbi_slaves,
        .slaves_cnt     = ARRAY_SIZE(omap3xxx_dss_rfbi_slaves),
        .flags          = HWMOD_NO_IDLEST,
@@ -1560,7 +1580,7 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
 static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
        .master         = &omap3xxx_l4_core_hwmod,
        .slave          = &omap3xxx_dss_venc_hwmod,
-        .clk            = "dss_tv_fck",
+        .clk            = "dss_ick",
        .addr           = omap2_dss_venc_addrs,
        .fw = {
                .omap2 = {
@@ -1578,10 +1598,15 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_venc_slaves[] = {
        &omap3xxx_l4_core__dss_venc,
 };
+static struct omap_hwmod_opt_clk dss_venc_opt_clks[] = {
+        /* required only on OMAP3430 */
+        { .role = "tv_dac_clk", .clk = "dss_96m_fck" },
+};
 static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
        .name           = "dss_venc",
        .class          = &omap2_venc_hwmod_class,
-        .main_clk       = "dss1_alwon_fck",
+        .main_clk       = "dss_tv_fck",
        .prcm           = {
                .omap2 = {
                        .prcm_reg_id = 1,
@@ -1589,6 +1614,8 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
                        .module_offs = OMAP3430_DSS_MOD,
                },
        },
+        .opt_clks       = dss_venc_opt_clks,
+        .opt_clks_cnt   = ARRAY_SIZE(dss_venc_opt_clks),
        .slaves         = omap3xxx_dss_venc_slaves,
        .slaves_cnt     = ARRAY_SIZE(omap3xxx_dss_venc_slaves),
        .flags          = HWMOD_NO_IDLEST,
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 7695e5d43316..daaf165af696 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -30,6 +30,7 @@
 #include <plat/mmc.h>
 #include <plat/i2c.h>
 #include <plat/dmtimer.h>
+#include <plat/common.h>
 #include "omap_hwmod_common_data.h"
@@ -1187,6 +1188,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_dss_sysc = {
 static struct omap_hwmod_class omap44xx_dss_hwmod_class = {
        .name   = "dss",
        .sysc   = &omap44xx_dss_sysc,
+        .reset  = omap_dss_reset,
 };
 /* dss */
@@ -1240,12 +1242,12 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_slaves[] = {
 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
        { .role = "sys_clk", .clk = "dss_sys_clk" },
        { .role = "tv_clk", .clk = "dss_tv_clk" },
-        { .role = "dss_clk", .clk = "dss_dss_clk" },
+        { .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
-        { .role = "video_clk", .clk = "dss_48mhz_clk" },
 };
 static struct omap_hwmod omap44xx_dss_hwmod = {
        .name           = "dss_core",
+        .flags          = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
        .class          = &omap44xx_dss_hwmod_class,
        .clkdm_name     = "l3_dss_clkdm",
        .main_clk       = "dss_dss_clk",
@@ -1325,6 +1327,11 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = {
        { }
 };
+static struct omap_dss_dispc_dev_attr omap44xx_dss_dispc_dev_attr = {
+        .manager_count          = 3,
+        .has_framedonetv_irq    = 1
+};
 /* l4_per -> dss_dispc */
 static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = {
        .master         = &omap44xx_l4_per_hwmod,
@@ -1340,12 +1347,6 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = {
        &omap44xx_l4_per__dss_dispc,
 };
-static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = {
-        { .role = "sys_clk", .clk = "dss_sys_clk" },
-        { .role = "tv_clk", .clk = "dss_tv_clk" },
-        { .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
-};
 static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
        .name           = "dss_dispc",
        .class          = &omap44xx_dispc_hwmod_class,
@@ -1359,10 +1360,9 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
                        .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,
                },
        },
-        .opt_clks       = dss_dispc_opt_clks,
-        .opt_clks_cnt   = ARRAY_SIZE(dss_dispc_opt_clks),
        .slaves         = omap44xx_dss_dispc_slaves,
        .slaves_cnt     = ARRAY_SIZE(omap44xx_dss_dispc_slaves),
+        .dev_attr       = &omap44xx_dss_dispc_dev_attr
 };
 /*
@@ -1624,7 +1624,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
        .clkdm_name     = "l3_dss_clkdm",
        .mpu_irqs       = omap44xx_dss_hdmi_irqs,
        .sdma_reqs      = omap44xx_dss_hdmi_sdma_reqs,
-        .main_clk       = "dss_dss_clk",
+        .main_clk       = "dss_48mhz_clk",
        .prcm = {
                .omap4 = {
                        .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
@@ -1785,7 +1785,7 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = {
        .name           = "dss_venc",
        .class          = &omap44xx_venc_hwmod_class,
        .clkdm_name     = "l3_dss_clkdm",
-        .main_clk       = "dss_dss_clk",
+        .main_clk       = "dss_tv_clk",
        .prcm = {
                .omap4 = {
                        .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c b/arch/arm/mach-omap2/omap_hwmod_common_data.c
index de832ebc93a9..51e5418899fb 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c
@@ -49,3 +49,7 @@ struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2 = {
        .srst_shift     = SYSC_TYPE2_SOFTRESET_SHIFT,
 };
+struct omap_dss_dispc_dev_attr omap2_3_dss_dispc_dev_attr = {
+        .manager_count          = 2,
+        .has_framedonetv_irq    = 0
+};
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h
index 39a7c37f4587..ad5d8f04c0b8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.h
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h
@@ -16,6 +16,8 @@
 #include <plat/omap_hwmod.h>
+#include "display.h"
 /* Common address space across OMAP2xxx */
 extern struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[];
 extern struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[];
@@ -111,4 +113,6 @@ extern struct omap_hwmod_class omap2xxx_dma_hwmod_class;
 extern struct omap_hwmod_class omap2xxx_mailbox_hwmod_class;
 extern struct omap_hwmod_class omap2xxx_mcspi_class;
+extern struct omap_dss_dispc_dev_attr omap2_3_dss_dispc_dev_attr;
 #endif
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index 6a66aa5e2a5b..d15225ff5c49 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -237,7 +237,7 @@ static int __devexit omap4_l3_remove(struct platform_device *pdev)
 static const struct of_device_id l3_noc_match[] = {
        {.compatible = "ti,omap4-l3-noc", },
        {},
-}
+};
 MODULE_DEVICE_TABLE(of, l3_noc_match);
 #else
 #define l3_noc_match NULL
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 1e79bdf313e3..00bff46ca48b 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -24,6 +24,7 @@
 #include "powerdomain.h"
 #include "clockdomain.h"
 #include "pm.h"
+#include "twl-common.h"
 static struct omap_device_pm_latency *pm_lats;
@@ -226,11 +227,8 @@ postcore_initcall(omap2_common_pm_init);
 static int __init omap2_common_pm_late_init(void)
 {
-        /* Init the OMAP TWL parameters */
-        omap3_twl_init();
-        omap4_twl_init();
        /* Init the voltage layer */
+        omap_pmic_late_init();
        omap_voltage_late_init();
        /* Initialize the voltages */
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 6a4f6839a7d9..cf246b39bac7 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -139,7 +139,7 @@ static irqreturn_t sr_interrupt(int irq, void *data)
                sr_write_reg(sr_info, ERRCONFIG_V1, status);
        } else if (sr_info->ip_type == SR_TYPE_V2) {
                /* Read the status bits */
-                sr_read_reg(sr_info, IRQSTATUS);
+                status = sr_read_reg(sr_info, IRQSTATUS);
                /* Clear them by writing back */
                sr_write_reg(sr_info, IRQSTATUS, status);
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 522435772168..10b20c652e5d 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -30,6 +30,7 @@
 #include <plat/usb.h>
 #include "twl-common.h"
+#include "pm.h"
 static struct i2c_board_info __initdata pmic_i2c_board_info = {
        .addr           = 0x48,
@@ -48,6 +49,16 @@ void __init omap_pmic_init(int bus, u32 clkrate,
        omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
 }
+void __init omap_pmic_late_init(void)
+{
+        /* Init the OMAP TWL parameters (if PMIC has been registerd) */
+        if (!pmic_i2c_board_info.irq)
+                return;
+        omap3_twl_init();
+        omap4_twl_init();
+}
 #if defined(CONFIG_ARCH_OMAP3)
 static struct twl4030_usb_data omap3_usb_pdata = {
        .usb_mode       = T2_USB_MODE_ULPI,
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h
index 5e83a5bd37fb..275dde8cb27a 100644
--- a/arch/arm/mach-omap2/twl-common.h
+++ b/arch/arm/mach-omap2/twl-common.h
@@ -1,6 +1,8 @@
 #ifndef __OMAP_PMIC_COMMON__
 #define __OMAP_PMIC_COMMON__
+#include <plat/irqs.h>
 #define TWL_COMMON_PDATA_USB            (1 << 0)
 #define TWL_COMMON_PDATA_BCI            (1 << 1)
 #define TWL_COMMON_PDATA_MADC           (1 << 2)
@@ -30,6 +32,7 @@ struct twl4030_platform_data;
 void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
                    struct twl4030_platform_data *pmic_data);
+void omap_pmic_late_init(void);
 static inline void omap2_pmic_init(const char *pmic_type,
                                   struct twl4030_platform_data *pmic_data)
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c
index 5ceafdccc456..3638e5c12b7e 100644
--- a/arch/arm/mach-orion5x/addr-map.c
+++ b/arch/arm/mach-orion5x/addr-map.c
@@ -14,8 +14,8 @@
 #include <linux/init.h>
 #include <linux/mbus.h>
 #include <linux/io.h>
-#include <linux/errno.h>
 #include <mach/hardware.h>
+#include <plat/addr-map.h>
 #include "common.h"
 /*
@@ -41,7 +41,6 @@
 /*
 * Generic Address Decode Windows bit settings
 */
-#define TARGET_DDR              0
 #define TARGET_DEV_BUS          1
 #define TARGET_PCI              3
 #define TARGET_PCIE             4
@@ -57,27 +56,10 @@
 #define ATTR_DEV_BOOT           0xf
 #define ATTR_SRAM               0x0
-/*
- * Helpers to get DDR bank info
- */
-#define ORION5X_DDR_REG(x)      (ORION5X_DDR_VIRT_BASE | (x))
-#define DDR_BASE_CS(n)          ORION5X_DDR_REG(0x1500 + ((n) << 3))
-#define DDR_SIZE_CS(n)          ORION5X_DDR_REG(0x1504 + ((n) << 3))
-/*
- * CPU Address Decode Windows registers
- */
-#define ORION5X_BRIDGE_REG(x)   (ORION5X_BRIDGE_VIRT_BASE | (x))
-#define CPU_WIN_CTRL(n)         ORION5X_BRIDGE_REG(0x000 | ((n) << 4))
-#define CPU_WIN_BASE(n)         ORION5X_BRIDGE_REG(0x004 | ((n) << 4))
-#define CPU_WIN_REMAP_LO(n)     ORION5X_BRIDGE_REG(0x008 | ((n) << 4))
-#define CPU_WIN_REMAP_HI(n)     ORION5X_BRIDGE_REG(0x00c | ((n) << 4))
-struct mbus_dram_target_info orion5x_mbus_dram_info;
 static int __initdata win_alloc_count;
-static int __init orion5x_cpu_win_can_remap(int win)
+static int __init cpu_win_can_remap(const struct orion_addr_map_cfg *cfg,
+                  const int win)
 {
        u32 dev, rev;
@@ -91,116 +73,82 @@ static int __init orion5x_cpu_win_can_remap(int win)
        return 0;
 }
-static int __init setup_cpu_win(int win, u32 base, u32 size,
+/*
-                                 u8 target, u8 attr, int remap)
+ * Description of the windows needed by the platform code
-{
+ */
-        if (win >= 8) {
+static struct __initdata orion_addr_map_cfg addr_map_cfg = {
-                printk(KERN_ERR "setup_cpu_win: trying to allocate "
+        .num_wins = 8,
-                                "window %d\n", win);
+        .cpu_win_can_remap = cpu_win_can_remap,
-                return -ENOSPC;
+        .bridge_virt_base = ORION5X_BRIDGE_VIRT_BASE,
-        }
+};
-        writel(base & 0xffff0000, CPU_WIN_BASE(win));
-        writel(((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1,
-                CPU_WIN_CTRL(win));
-        if (orion5x_cpu_win_can_remap(win)) {
-                if (remap < 0)
-                        remap = base;
-                writel(remap & 0xffff0000, CPU_WIN_REMAP_LO(win));
-                writel(0, CPU_WIN_REMAP_HI(win));
-        }
-        return 0;
-}
-void __init orion5x_setup_cpu_mbus_bridge(void)
-{
-        int i;
-        int cs;
+static const struct __initdata orion_addr_map_info addr_map_info[] = {
        /*
-         * First, disable and clear windows.
+         * Setup windows for PCI+PCIe IO+MEM space.
         */
-        for (i = 0; i < 8; i++) {
+        { 0, ORION5X_PCIE_IO_PHYS_BASE, ORION5X_PCIE_IO_SIZE,
-                writel(0, CPU_WIN_BASE(i));
+          TARGET_PCIE, ATTR_PCIE_IO, ORION5X_PCIE_IO_BUS_BASE
-                writel(0, CPU_WIN_CTRL(i));
+        },
-                if (orion5x_cpu_win_can_remap(i)) {
+        { 1, ORION5X_PCI_IO_PHYS_BASE, ORION5X_PCI_IO_SIZE,
-                        writel(0, CPU_WIN_REMAP_LO(i));
+          TARGET_PCI, ATTR_PCI_IO, ORION5X_PCI_IO_BUS_BASE
-                        writel(0, CPU_WIN_REMAP_HI(i));
+        },
-                }
+        { 2, ORION5X_PCIE_MEM_PHYS_BASE, ORION5X_PCIE_MEM_SIZE,
-        }
+          TARGET_PCIE, ATTR_PCIE_MEM, -1
+        },
+        { 3, ORION5X_PCI_MEM_PHYS_BASE, ORION5X_PCI_MEM_SIZE,
+          TARGET_PCI, ATTR_PCI_MEM, -1
+        },
+        /* End marker */
+        { -1, 0, 0, 0, 0, 0 }
+};
+void __init orion5x_setup_cpu_mbus_bridge(void)
+{
        /*
-         * Setup windows for PCI+PCIe IO+MEM space.
+         * Disable, clear and configure windows.
         */
-        setup_cpu_win(0, ORION5X_PCIE_IO_PHYS_BASE, ORION5X_PCIE_IO_SIZE,
+        orion_config_wins(&addr_map_cfg, addr_map_info);
-                TARGET_PCIE, ATTR_PCIE_IO, ORION5X_PCIE_IO_BUS_BASE);
-        setup_cpu_win(1, ORION5X_PCI_IO_PHYS_BASE, ORION5X_PCI_IO_SIZE,
-                TARGET_PCI, ATTR_PCI_IO, ORION5X_PCI_IO_BUS_BASE);
-        setup_cpu_win(2, ORION5X_PCIE_MEM_PHYS_BASE, ORION5X_PCIE_MEM_SIZE,
-                TARGET_PCIE, ATTR_PCIE_MEM, -1);
-        setup_cpu_win(3, ORION5X_PCI_MEM_PHYS_BASE, ORION5X_PCI_MEM_SIZE,
-                TARGET_PCI, ATTR_PCI_MEM, -1);
        win_alloc_count = 4;
        /*
         * Setup MBUS dram target info.
         */
-        orion5x_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
+        orion_setup_cpu_mbus_target(&addr_map_cfg, ORION5X_DDR_WINDOW_CPU_BASE);
-        for (i = 0, cs = 0; i < 4; i++) {
-                u32 base = readl(DDR_BASE_CS(i));
-                u32 size = readl(DDR_SIZE_CS(i));
-                /*
-                 * Chip select enabled?
-                 */
-                if (size & 1) {
-                        struct mbus_dram_window *w;
-                        w = &orion5x_mbus_dram_info.cs[cs++];
-                        w->cs_index = i;
-                        w->mbus_attr = 0xf & ~(1 << i);
-                        w->base = base & 0xffff0000;
-                        w->size = (size | 0x0000ffff) + 1;
-                }
-        }
-        orion5x_mbus_dram_info.num_cs = cs;
 }
 void __init orion5x_setup_dev_boot_win(u32 base, u32 size)
 {
-        setup_cpu_win(win_alloc_count++, base, size,
+        orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
-                      TARGET_DEV_BUS, ATTR_DEV_BOOT, -1);
+                            TARGET_DEV_BUS, ATTR_DEV_BOOT, -1);
 }
 void __init orion5x_setup_dev0_win(u32 base, u32 size)
 {
-        setup_cpu_win(win_alloc_count++, base, size,
+        orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
-                      TARGET_DEV_BUS, ATTR_DEV_CS0, -1);
+                            TARGET_DEV_BUS, ATTR_DEV_CS0, -1);
 }
 void __init orion5x_setup_dev1_win(u32 base, u32 size)
 {
-        setup_cpu_win(win_alloc_count++, base, size,
+        orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
-                      TARGET_DEV_BUS, ATTR_DEV_CS1, -1);
+                            TARGET_DEV_BUS, ATTR_DEV_CS1, -1);
 }
 void __init orion5x_setup_dev2_win(u32 base, u32 size)
 {
-        setup_cpu_win(win_alloc_count++, base, size,
+        orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
-                      TARGET_DEV_BUS, ATTR_DEV_CS2, -1);
+                            TARGET_DEV_BUS, ATTR_DEV_CS2, -1);
 }
 void __init orion5x_setup_pcie_wa_win(u32 base, u32 size)
 {
-        setup_cpu_win(win_alloc_count++, base, size,
+        orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++, base, size,
-                      TARGET_PCIE, ATTR_PCIE_WA, -1);
+                            TARGET_PCIE, ATTR_PCIE_WA, -1);
 }
-int __init orion5x_setup_sram_win(void)
+void __init orion5x_setup_sram_win(void)
 {
-        return setup_cpu_win(win_alloc_count++, ORION5X_SRAM_PHYS_BASE,
+        orion_setup_cpu_win(&addr_map_cfg, win_alloc_count++,
-                        ORION5X_SRAM_SIZE, TARGET_SRAM, ATTR_SRAM, -1);
+                            ORION5X_SRAM_PHYS_BASE, ORION5X_SRAM_SIZE,
+                            TARGET_SRAM, ATTR_SRAM, -1);
 }
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 22ace0bf2f92..79ef693d2c03 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -15,7 +15,6 @@
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <linux/serial_8250.h>
-#include <linux/mbus.h>
 #include <linux/mv643xx_i2c.h>
 #include <linux/ata_platform.h>
 #include <net/dsa.h>
@@ -31,6 +30,7 @@
 #include <plat/orion_nand.h>
 #include <plat/time.h>
 #include <plat/common.h>
+#include <plat/addr-map.h>
 #include "common.h"
 /*****************************************************************************
@@ -71,8 +71,7 @@ void __init orion5x_map_io(void)
 ****************************************************************************/
 void __init orion5x_ehci0_init(void)
 {
-        orion_ehci_init(&orion5x_mbus_dram_info,
+        orion_ehci_init(ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL);
-                        ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL);
 }
@@ -81,8 +80,7 @@ void __init orion5x_ehci0_init(void)
 ****************************************************************************/
 void __init orion5x_ehci1_init(void)
 {
-        orion_ehci_1_init(&orion5x_mbus_dram_info,
+        orion_ehci_1_init(ORION5X_USB1_PHYS_BASE, IRQ_ORION5X_USB1_CTRL);
-                          ORION5X_USB1_PHYS_BASE, IRQ_ORION5X_USB1_CTRL);
 }
@@ -91,7 +89,7 @@ void __init orion5x_ehci1_init(void)
 ****************************************************************************/
 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
 {
-        orion_ge00_init(eth_data, &orion5x_mbus_dram_info,
+        orion_ge00_init(eth_data,
                        ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,
                        IRQ_ORION5X_ETH_ERR, orion5x_tclk);
 }
@@ -121,8 +119,7 @@ void __init orion5x_i2c_init(void)
 ****************************************************************************/
 void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
 {
-        orion_sata_init(sata_data, &orion5x_mbus_dram_info,
+        orion_sata_init(sata_data, ORION5X_SATA_PHYS_BASE, IRQ_ORION5X_SATA);
-                        ORION5X_SATA_PHYS_BASE, IRQ_ORION5X_SATA);
 }
@@ -158,8 +155,7 @@ void __init orion5x_uart1_init(void)
 ****************************************************************************/
 void __init orion5x_xor_init(void)
 {
-        orion_xor0_init(&orion5x_mbus_dram_info,
+        orion_xor0_init(ORION5X_XOR_PHYS_BASE,
-                        ORION5X_XOR_PHYS_BASE,
                        ORION5X_XOR_PHYS_BASE + 0x200,
                        IRQ_ORION5X_XOR0, IRQ_ORION5X_XOR1);
 }
@@ -169,12 +165,7 @@ void __init orion5x_xor_init(void)
 ****************************************************************************/
 static void __init orion5x_crypto_init(void)
 {
-        int ret;
+        orion5x_setup_sram_win();
-        ret = orion5x_setup_sram_win();
-        if (ret)
-                return;
        orion_crypto_init(ORION5X_CRYPTO_PHYS_BASE, ORION5X_SRAM_PHYS_BASE,
                          SZ_8K, IRQ_ORION5X_CESA);
 }
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 909489f4d23e..889d80c7a151 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -20,14 +20,13 @@ extern struct sys_timer orion5x_timer;
 * functions to map its interfaces and by the machine-setup to map its on-
 * board devices. Details in /mach-orion/addr-map.c
 */
-extern struct mbus_dram_target_info orion5x_mbus_dram_info;
 void orion5x_setup_cpu_mbus_bridge(void);
 void orion5x_setup_dev_boot_win(u32 base, u32 size);
 void orion5x_setup_dev0_win(u32 base, u32 size);
 void orion5x_setup_dev1_win(u32 base, u32 size);
 void orion5x_setup_dev2_win(u32 base, u32 size);
 void orion5x_setup_pcie_wa_win(u32 base, u32 size);
-int orion5x_setup_sram_win(void);
+void orion5x_setup_sram_win(void);
 void orion5x_ehci0_init(void);
 void orion5x_ehci1_init(void);
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
index 0a28bbc76891..2745f5d95b3f 100644
--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
+++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
@@ -69,7 +69,7 @@
 ******************************************************************************/
 #define ORION5X_DDR_VIRT_BASE           (ORION5X_REGS_VIRT_BASE | 0x00000)
+#define  ORION5X_DDR_WINDOW_CPU_BASE    (ORION5X_DDR_VIRT_BASE | 0x1500)
 #define ORION5X_DEV_BUS_PHYS_BASE       (ORION5X_REGS_PHYS_BASE | 0x10000)
 #define ORION5X_DEV_BUS_VIRT_BASE       (ORION5X_REGS_VIRT_BASE | 0x10000)
 #define ORION5X_DEV_BUS_REG(x)          (ORION5X_DEV_BUS_VIRT_BASE | (x))
diff --git a/arch/arm/mach-orion5x/mpp.c b/arch/arm/mach-orion5x/mpp.c
index b6ddd7a5db6a..5b70026f478c 100644
--- a/arch/arm/mach-orion5x/mpp.c
+++ b/arch/arm/mach-orion5x/mpp.c
@@ -10,7 +10,6 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/mbus.h>
 #include <linux/io.h>
 #include <mach/hardware.h>
 #include <plat/mpp.h>
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index bc4a920e26ee..a494c470e3e4 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -18,6 +18,7 @@
 #include <asm/irq.h>
 #include <asm/mach/pci.h>
 #include <plat/pcie.h>
+#include <plat/addr-map.h>
 #include "common.h"
 /*****************************************************************************
@@ -145,7 +146,7 @@ static int __init pcie_setup(struct pci_sys_data *sys)
        /*
         * Generic PCIe unit setup.
         */
-        orion_pcie_setup(PCIE_BASE, &orion5x_mbus_dram_info);
+        orion_pcie_setup(PCIE_BASE);
        /*
         * Check whether to apply Orion-1/Orion-NAS PCIe config
@@ -477,7 +478,7 @@ static int __init pci_setup(struct pci_sys_data *sys)
        /*
         * Point PCI unit MBUS decode windows to DRAM space.
         */
-        orion5x_setup_pci_wins(&orion5x_mbus_dram_info);
+        orion5x_setup_pci_wins(&orion_mbus_dram_info);
        /*
         * Master + Slave enable
diff --git a/arch/arm/mach-prima2/pm.c b/arch/arm/mach-prima2/pm.c
index cb53160f6c5d..26ebb57719df 100644
--- a/arch/arm/mach-prima2/pm.c
+++ b/arch/arm/mach-prima2/pm.c
@@ -9,6 +9,7 @@
 #include <linux/kernel.h>
 #include <linux/suspend.h>
 #include <linux/slab.h>
+#include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_device.h>
diff --git a/arch/arm/mach-prima2/prima2.c b/arch/arm/mach-prima2/prima2.c
index ef555c041962..a12b689a8702 100644
--- a/arch/arm/mach-prima2/prima2.c
+++ b/arch/arm/mach-prima2/prima2.c
@@ -8,6 +8,7 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
+#include <asm/sizes.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <linux/of.h>
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index fc0b8544e174..4b81f59a4cba 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -307,7 +307,7 @@ static inline void balloon3_mmc_init(void) {}
 /******************************************************************************
 * USB Gadget
 ******************************************************************************/
-#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE)
 static void balloon3_udc_command(int cmd)
 {
        if (cmd == PXA2XX_UDC_CMD_CONNECT)
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index 692e1ffc5586..d23b92b80488 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -146,7 +146,7 @@ static void __init colibri_pxa320_init_eth(void)
 static inline void __init colibri_pxa320_init_eth(void) {}
 #endif /* CONFIG_AX88796 */
-#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE)
 static struct gpio_vbus_mach_info colibri_pxa320_gpio_vbus_info = {
        .gpio_vbus              = mfp_to_gpio(MFP_PIN_GPIO96),
        .gpio_pullup            = -1,
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index 9c8208ca0415..ffdd70dad327 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -106,7 +106,7 @@ static void __init gumstix_mmc_init(void)
 }
 #endif
-#ifdef CONFIG_USB_GADGET_PXA25X
+#ifdef CONFIG_USB_PXA25X
 static struct gpio_vbus_mach_info gumstix_udc_info = {
        .gpio_vbus              = GPIO_GUMSTIX_USB_GPIOn,
        .gpio_pullup            = GPIO_GUMSTIX_USB_GPIOx,
diff --git a/arch/arm/mach-pxa/include/mach/palm27x.h b/arch/arm/mach-pxa/include/mach/palm27x.h
index f80bbe246afe..d4eac3d6ffb5 100644
--- a/arch/arm/mach-pxa/include/mach/palm27x.h
+++ b/arch/arm/mach-pxa/include/mach/palm27x.h
@@ -37,8 +37,8 @@ extern void __init palm27x_lcd_init(int power,
 #define palm27x_lcd_init(power, mode)   do {} while (0)
 #endif
-#if     defined(CONFIG_USB_GADGET_PXA27X) || \
+#if     defined(CONFIG_USB_PXA27X) || \
-        defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+        defined(CONFIG_USB_PXA27X_MODULE)
 extern void __init palm27x_udc_init(int vbus, int pullup,
                                        int vbus_inverted);
 #else
diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c
index 325c245c0a0d..fbc10d7b95d1 100644
--- a/arch/arm/mach-pxa/palm27x.c
+++ b/arch/arm/mach-pxa/palm27x.c
@@ -164,8 +164,8 @@ void __init palm27x_lcd_init(int power, struct pxafb_mode_info *mode)
 /******************************************************************************
 * USB Gadget
 ******************************************************************************/
-#if     defined(CONFIG_USB_GADGET_PXA27X) || \
+#if     defined(CONFIG_USB_PXA27X) || \
-        defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+        defined(CONFIG_USB_PXA27X_MODULE)
 static struct gpio_vbus_mach_info palm27x_udc_info = {
        .gpio_vbus_inverted     = 1,
 };
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index 6ec7caefb37c..2c24c67fd92b 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -338,7 +338,7 @@ static inline void palmtc_mkp_init(void) {}
 /******************************************************************************
 * UDC
 ******************************************************************************/
-#if defined(CONFIG_USB_GADGET_PXA25X)||defined(CONFIG_USB_GADGET_PXA25X_MODULE)
+#if defined(CONFIG_USB_PXA25X)||defined(CONFIG_USB_PXA25X_MODULE)
 static struct gpio_vbus_mach_info palmtc_udc_info = {
        .gpio_vbus              = GPIO_NR_PALMTC_USB_DETECT_N,
        .gpio_vbus_inverted     = 1,
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index a7539a6ed1ff..ca0c6615028c 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -343,7 +343,7 @@ static inline void vpac270_uhc_init(void) {}
 /******************************************************************************
 * USB Gadget
 ******************************************************************************/
-#if defined(CONFIG_USB_GADGET_PXA27X)||defined(CONFIG_USB_GADGET_PXA27X_MODULE)
+#if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE)
 static struct gpio_vbus_mach_info vpac270_gpio_vbus_info = {
        .gpio_vbus              = GPIO41_VPAC270_UDC_DETECT,
        .gpio_pullup            = -1,
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
index 5e6b42089eb4..3341fd118723 100644
--- a/arch/arm/mach-s3c64xx/dev-spi.c
+++ b/arch/arm/mach-s3c64xx/dev-spi.c
@@ -10,6 +10,7 @@
 #include <linux/kernel.h>
 #include <linux/string.h>
+#include <linux/export.h>
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <linux/gpio.h>
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
index 66668565ee75..f208154b1382 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
@@ -8,7 +8,7 @@
 * published by the Free Software Foundation.
 */
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/interrupt.h>
 #include <linux/i2c.h>
diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c
index 7a3bc32df425..51c00f2453c6 100644
--- a/arch/arm/mach-s3c64xx/s3c6400.c
+++ b/arch/arm/mach-s3c64xx/s3c6400.c
@@ -70,7 +70,7 @@ void __init s3c6400_init_irq(void)
        s3c64xx_init_irq(~0 & ~(0xf << 5), ~0);
 }
-struct sysdev_class s3c6400_sysclass = {
+static struct sysdev_class s3c6400_sysclass = {
        .name   = "s3c6400-core",
 };
diff --git a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
index 83d2afb79e9f..2cf80026c58d 100644
--- a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
+++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
@@ -20,7 +20,7 @@
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
-extern void s3c64xx_fb_gpio_setup_24bpp(void)
+void s3c64xx_fb_gpio_setup_24bpp(void)
 {
        s3c_gpio_cfgrange_nopull(S3C64XX_GPI(0), 16, S3C_GPIO_SFN(2));
        s3c_gpio_cfgrange_nopull(S3C64XX_GPJ(0), 12, S3C_GPIO_SFN(2));
diff --git a/arch/arm/mach-sa1100/Makefile.boot b/arch/arm/mach-sa1100/Makefile.boot
index 5a616f6e5612..f7951aa04562 100644
--- a/arch/arm/mach-sa1100/Makefile.boot
+++ b/arch/arm/mach-sa1100/Makefile.boot
@@ -1,5 +1,5 @@
-ifeq ($(CONFIG_ARCH_SA1100),y)
+ifeq ($(CONFIG_SA1111),y)
-   zreladdr-$(CONFIG_SA1111)            += 0xc0208000
+   zreladdr-y   += 0xc0208000
 else
   zreladdr-y   += 0xc0008000
 endif
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c
index 6826faeecc68..cf93dca97b9a 100644
--- a/arch/arm/mach-ux500/board-mop500-sdi.c
+++ b/arch/arm/mach-ux500/board-mop500-sdi.c
@@ -132,6 +132,42 @@ void mop500_sdi_tc35892_init(void)
 }
 /*
+ * SDI1 (SDIO WLAN)
+ */
+#ifdef CONFIG_STE_DMA40
+static struct stedma40_chan_cfg sdi1_dma_cfg_rx = {
+        .mode = STEDMA40_MODE_LOGICAL,
+        .dir = STEDMA40_PERIPH_TO_MEM,
+        .src_dev_type = DB8500_DMA_DEV32_SD_MM1_RX,
+        .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
+        .src_info.data_width = STEDMA40_WORD_WIDTH,
+        .dst_info.data_width = STEDMA40_WORD_WIDTH,
+};
+static struct stedma40_chan_cfg sdi1_dma_cfg_tx = {
+        .mode = STEDMA40_MODE_LOGICAL,
+        .dir = STEDMA40_MEM_TO_PERIPH,
+        .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
+        .dst_dev_type = DB8500_DMA_DEV32_SD_MM1_TX,
+        .src_info.data_width = STEDMA40_WORD_WIDTH,
+        .dst_info.data_width = STEDMA40_WORD_WIDTH,
+};
+#endif
+static struct mmci_platform_data mop500_sdi1_data = {
+        .ocr_mask       = MMC_VDD_29_30,
+        .f_max          = 50000000,
+        .capabilities   = MMC_CAP_4_BIT_DATA,
+        .gpio_cd        = -1,
+        .gpio_wp        = -1,
+#ifdef CONFIG_STE_DMA40
+        .dma_filter     = stedma40_filter,
+        .dma_rx_param   = &sdi1_dma_cfg_rx,
+        .dma_tx_param   = &sdi1_dma_cfg_tx,
+#endif
+};
+/*
 * SDI 2 (POP eMMC, not on DB8500ed)
 */
@@ -260,4 +296,6 @@ void __init hrefv60_sdi_init(void)
        sdi0_en = HREFV60_SDMMC_EN_GPIO;
        sdi0_vsel = HREFV60_SDMMC_1V8_3V_GPIO;
        sdi0_configure();
+        db8500_add_sdi1(&mop500_sdi1_data, periphid);
 }
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index bdd7b80dd7ad..eb85e75d86ba 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -672,7 +672,7 @@ static void __init hrefv60_init_machine(void)
                        ARRAY_SIZE(mop500_platform_devs));
        mop500_i2c_init();
-        mop500_sdi_init();
+        hrefv60_sdi_init();
        mop500_spi_init();
        mop500_uart_init();
diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h
index de18a2a23e6e..f926d3db6207 100644
--- a/arch/arm/mach-ux500/board-mop500.h
+++ b/arch/arm/mach-ux500/board-mop500.h
@@ -7,40 +7,77 @@
 #ifndef __BOARD_MOP500_H
 #define __BOARD_MOP500_H
-/* snowball GPIO for MMC card */
+/* Snowball specific GPIO assignments, this board has no GPIO expander */
-#define SNOWBALL_SDMMC_EN_GPIO 217
+#define SNOWBALL_ACCEL_INT1_GPIO        163
-#define SNOWBALL_SDMMC_1V8_3V_GPIO 228
+#define SNOWBALL_ACCEL_INT2_GPIO        164
-#define SNOWBALL_SDMMC_CD_GPIO 218
+#define SNOWBALL_MAGNET_DRDY_GPIO       165
+#define SNOWBALL_SDMMC_EN_GPIO          217
+#define SNOWBALL_SDMMC_1V8_3V_GPIO      228
+#define SNOWBALL_SDMMC_CD_GPIO          218
 /* HREFv60-specific GPIO assignments, this board has no GPIO expander */
-#define HREFV60_TOUCH_RST_GPIO          143
-#define HREFV60_PROX_SENSE_GPIO         217
-#define HREFV60_HAL_SW_GPIO             145
-#define HREFV60_SDMMC_EN_GPIO           169
 #define HREFV60_SDMMC_1V8_3V_GPIO       5
-#define HREFV60_SDMMC_CD_GPIO           95
+#define HREFV60_CAMERA_FLASH_ENABLE     21
-#define HREFV60_ACCEL_INT1_GPIO         82
-#define HREFV60_ACCEL_INT2_GPIO         83
 #define HREFV60_MAGNET_DRDY_GPIO        32
 #define HREFV60_DISP1_RST_GPIO          65
 #define HREFV60_DISP2_RST_GPIO          66
+#define HREFV60_ACCEL_INT1_GPIO         82
+#define HREFV60_ACCEL_INT2_GPIO         83
+#define HREFV60_SDMMC_CD_GPIO           95
+#define HREFV60_XSHUTDOWN_SECONDARY_SENSOR 140
+#define HREFV60_TOUCH_RST_GPIO          143
+#define HREFV60_HAL_SW_GPIO             145
+#define HREFV60_SDMMC_EN_GPIO           169
+#define HREFV60_MMIO_XENON_CHARGE       170
+#define HREFV60_PROX_SENSE_GPIO         217
+/* MOP500 generic GPIOs */
+#define CAMERA_FLASH_INT_PIN            7
+#define CYPRESS_TOUCH_INT_PIN           84
+#define XSHUTDOWN_PRIMARY_SENSOR        141
+#define XSHUTDOWN_SECONDARY_SENSOR      142
+#define CYPRESS_TOUCH_RST_GPIO          143
+#define MOP500_HDMI_RST_GPIO            196
+#define CYPRESS_SLAVE_SELECT_GPIO       216
 /* GPIOs on the TC35892 expander */
 #define MOP500_EGPIO(x)                 (NOMADIK_NR_GPIO + (x))
+#define GPIO_MAGNET_DRDY                MOP500_EGPIO(1)
 #define GPIO_SDMMC_CD                   MOP500_EGPIO(3)
+#define GPIO_CAMERA_FLASH_ENABLE        MOP500_EGPIO(4)
+#define GPIO_MMIO_XENON_CHARGE          MOP500_EGPIO(5)
 #define GPIO_PROX_SENSOR                MOP500_EGPIO(7)
+#define GPIO_HAL_SENSOR                 MOP500_EGPIO(8)
+#define GPIO_ACCEL_INT1                 MOP500_EGPIO(10)
+#define GPIO_ACCEL_INT2                 MOP500_EGPIO(11)
 #define GPIO_BU21013_CS                 MOP500_EGPIO(13)
+#define MOP500_DISP2_RST_GPIO           MOP500_EGPIO(14)
+#define MOP500_DISP1_RST_GPIO           MOP500_EGPIO(15)
 #define GPIO_SDMMC_EN                   MOP500_EGPIO(17)
 #define GPIO_SDMMC_1V8_3V_SEL           MOP500_EGPIO(18)
 #define MOP500_EGPIO_END                MOP500_EGPIO(24)
-/* GPIOs on the AB8500 mixed-signals circuit */
+/*
-#define MOP500_AB8500_GPIO(x)           (MOP500_EGPIO_END + (x))
+ * GPIOs on the AB8500 mixed-signals circuit
+ * Notice that we subtract 1 from the number passed into the macro, this is
+ * because the AB8500 GPIO pins are enumbered starting from 1, so the value in
+ * parens matches the GPIO pin number in the data sheet.
+ */
+#define MOP500_AB8500_GPIO(x)           (MOP500_EGPIO_END + (x) - 1)
+/*Snowball AB8500 GPIO */
+#define SNOWBALL_VSMPS2_1V8_GPIO        MOP500_AB8500_PIN_GPIO(1)       /* SYSCLKREQ2/GPIO1 */
+#define SNOWBALL_PM_GPIO1_GPIO          MOP500_AB8500_PIN_GPIO(2)       /* SYSCLKREQ3/GPIO2 */
+#define SNOWBALL_WLAN_CLK_REQ_GPIO      MOP500_AB8500_PIN_GPIO(3)       /* SYSCLKREQ4/GPIO3 */
+#define SNOWBALL_PM_GPIO4_GPIO          MOP500_AB8500_PIN_GPIO(4)       /* SYSCLKREQ6/GPIO4 */
+#define SNOWBALL_EN_3V6_GPIO            MOP500_AB8500_PIN_GPIO(16)      /* PWMOUT3/GPIO16 */
+#define SNOWBALL_PME_ETH_GPIO           MOP500_AB8500_PIN_GPIO(24)      /* SYSCLKREQ7/GPIO24 */
+#define SNOWBALL_EN_3V3_ETH_GPIO        MOP500_AB8500_PIN_GPIO(26)      /* GPIO26 */
 struct i2c_board_info;
 extern void mop500_sdi_init(void);
 extern void snowball_sdi_init(void);
+extern void hrefv60_sdi_init(void);
 extern void mop500_sdi_tc35892_init(void);
 void __init mop500_u8500uib_init(void);
 void __init mop500_stuib_init(void);
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 8ac9e9f84790..b1e192ba8c24 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -61,7 +61,7 @@ static inline void cache_sync(void)
 {
        void __iomem *base = l2x0_base;
-#ifdef CONFIG_ARM_ERRATA_753970
+#ifdef CONFIG_PL310_ERRATA_753970
        /* write to an unmmapped register */
        writel_relaxed(0, base + L2X0_DUMMY_REG);
 #else
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index e4e7f6cba1ab..1aa664a1999f 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -168,7 +168,7 @@ static int __init consistent_init(void)
        pte_t *pte;
        int i = 0;
        unsigned long base = consistent_base;
-        unsigned long num_ptes = (CONSISTENT_END - base) >> PGDIR_SHIFT;
+        unsigned long num_ptes = (CONSISTENT_END - base) >> PMD_SHIFT;
        consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL);
        if (!consistent_pte) {
@@ -332,6 +332,15 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
        struct page *page;
        void *addr;
+        /*
+         * Following is a work-around (a.k.a. hack) to prevent pages
+         * with __GFP_COMP being passed to split_page() which cannot
+         * handle them.  The real problem is that this flag probably
+         * should be 0 on ARM as it is not supported on this
+         * platform; see CONFIG_HUGETLBFS.
+         */
+        gfp &= ~(__GFP_COMP);
        *handle = ~0;
        size = PAGE_ALIGN(size);
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index 74be05f3e03a..44b628e4d6ea 100644
--- a/arch/arm/mm/mmap.c
+++ b/arch/arm/mm/mmap.c
@@ -9,8 +9,7 @@
 #include <linux/io.h>
 #include <linux/personality.h>
 #include <linux/random.h>
-#include <asm/cputype.h>
+#include <asm/cachetype.h>
-#include <asm/system.h>
 #define COLOUR_ALIGN(addr,pgoff)                \
        ((((addr)+SHMLBA-1)&~(SHMLBA-1)) +      \
@@ -32,25 +31,15 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
        struct mm_struct *mm = current->mm;
        struct vm_area_struct *vma;
        unsigned long start_addr;
-#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)
+        int do_align = 0;
-        unsigned int cache_type;
+        int aliasing = cache_is_vipt_aliasing();
-        int do_align = 0, aliasing = 0;
        /*
         * We only need to do colour alignment if either the I or D
-         * caches alias.  This is indicated by bits 9 and 21 of the
+         * caches alias.
-         * cache type register.
         */
-        cache_type = read_cpuid_cachetype();
+        if (aliasing)
-        if (cache_type != read_cpuid_id()) {
+                do_align = filp || (flags & MAP_SHARED);
-                aliasing = (cache_type | cache_type >> 12) & (1 << 11);
-                if (aliasing)
-                        do_align = filp || flags & MAP_SHARED;
-        }
-#else
-#define do_align 0
-#define aliasing 0
-#endif
        /*
         * We enforce the MAP_FIXED case.
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 83b745a5e1b7..c75f254abd85 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -85,7 +85,6 @@ enum mxc_cpu_pwr_mode {
 };
 extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
-extern void (*imx_idle)(void);
 extern void imx_print_silicon_rev(const char *cpu, int srev);
 void avic_handle_irq(struct pt_regs *);
@@ -133,4 +132,5 @@ extern void imx53_qsb_common_init(void);
 extern void imx53_smd_common_init(void);
 extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
 extern void imx6q_pm_init(void);
+extern void imx6q_clock_map_io(void);
 #endif
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 00a78193c681..a4d36d601d55 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -50,20 +50,6 @@
 #define IMX_CHIP_REVISION_3_3           0x33
 #define IMX_CHIP_REVISION_UNKNOWN       0xff
-#define IMX_CHIP_REVISION_1_0_STRING            "1.0"
-#define IMX_CHIP_REVISION_1_1_STRING            "1.1"
-#define IMX_CHIP_REVISION_1_2_STRING            "1.2"
-#define IMX_CHIP_REVISION_1_3_STRING            "1.3"
-#define IMX_CHIP_REVISION_2_0_STRING            "2.0"
-#define IMX_CHIP_REVISION_2_1_STRING            "2.1"
-#define IMX_CHIP_REVISION_2_2_STRING            "2.2"
-#define IMX_CHIP_REVISION_2_3_STRING            "2.3"
-#define IMX_CHIP_REVISION_3_0_STRING            "3.0"
-#define IMX_CHIP_REVISION_3_1_STRING            "3.1"
-#define IMX_CHIP_REVISION_3_2_STRING            "3.2"
-#define IMX_CHIP_REVISION_3_3_STRING            "3.3"
-#define IMX_CHIP_REVISION_UNKNOWN_STRING        "unknown"
 #ifndef __ASSEMBLY__
 extern unsigned int __mxc_cpu_type;
 #endif
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
index cf88b3593fba..b9895d250167 100644
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ b/arch/arm/plat-mxc/include/mach/system.h
@@ -17,14 +17,9 @@
 #ifndef __ASM_ARCH_MXC_SYSTEM_H__
 #define __ASM_ARCH_MXC_SYSTEM_H__
-extern void (*imx_idle)(void);
 static inline void arch_idle(void)
 {
-        if (imx_idle != NULL)
+        cpu_do_idle();
-                (imx_idle)();
-        else
-                cpu_do_idle();
 }
 void arch_reset(char mode, const char *cmd);
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c
index 9dad8dcc2ea9..d65fb31a55ca 100644
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/plat-mxc/system.c
@@ -21,6 +21,7 @@
 #include <linux/io.h>
 #include <linux/err.h>
 #include <linux/delay.h>
+#include <linux/module.h>
 #include <mach/hardware.h>
 #include <mach/common.h>
@@ -28,8 +29,8 @@
 #include <asm/system.h>
 #include <asm/mach-types.h>
-void (*imx_idle)(void) = NULL;
 void __iomem *(*imx_ioremap)(unsigned long, size_t, unsigned int) = NULL;
+EXPORT_SYMBOL_GPL(imx_ioremap);
 static void __iomem *wdog_base;
diff --git a/arch/arm/plat-omap/include/plat/clkdev_omap.h b/arch/arm/plat-omap/include/plat/clkdev_omap.h
index 387a9638991b..b299b8d201c8 100644
--- a/arch/arm/plat-omap/include/plat/clkdev_omap.h
+++ b/arch/arm/plat-omap/include/plat/clkdev_omap.h
@@ -40,6 +40,7 @@ struct omap_clk {
 #define CK_443X         (1 << 11)
 #define CK_TI816X       (1 << 12)
 #define CK_446X         (1 << 13)
+#define CK_1710         (1 << 15)       /* 1710 extra for rate selection */
 #define CK_34XX         (CK_3430ES1 | CK_3430ES2PLUS)
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index 197ca03c3f7d..eb73ab40e955 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -165,8 +165,8 @@ struct dpll_data {
        u8                      auto_recal_bit;
        u8                      recal_en_bit;
        u8                      recal_st_bit;
-        u8                      flags;
 #  endif
+        u8                      flags;
 };
 #endif
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index c50df4814f6f..3ff3e36580f2 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -30,6 +30,7 @@
 #include <linux/delay.h>
 #include <plat/i2c.h>
+#include <plat/omap_hwmod.h>
 struct sys_timer;
@@ -55,6 +56,8 @@ void am35xx_init_early(void);
 void ti816x_init_early(void);
 void omap4430_init_early(void);
+extern int omap_dss_reset(struct omap_hwmod *);
 void omap_sram_init(void);
 /*
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 8b28664d1c62..6b058a621e8d 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -141,11 +141,9 @@ static void __init omap_detect_sram(void)
                        omap_sram_size = 0x32000;       /* 200K */
                else if (cpu_is_omap15xx())
                        omap_sram_size = 0x30000;       /* 192K */
-                else if (cpu_is_omap1610() || cpu_is_omap1621() ||
+                else if (cpu_is_omap1610() || cpu_is_omap1611() ||
-                     cpu_is_omap1710())
+                                cpu_is_omap1621() || cpu_is_omap1710())
                        omap_sram_size = 0x4000;        /* 16K */
-                else if (cpu_is_omap1611())
-                        omap_sram_size = SZ_256K;
                else {
                        pr_err("Could not detect SRAM size\n");
                        omap_sram_size = 0x4000;
@@ -224,6 +222,9 @@ static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
 void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
 {
        BUG_ON(!_omap_sram_reprogram_clock);
+        /* On 730, bit 13 must always be 1 */
+        if (cpu_is_omap7xx())
+                ckctl |= 0x2000;
        _omap_sram_reprogram_clock(dpllctl, ckctl);
 }
diff --git a/arch/arm/plat-orion/Makefile b/arch/arm/plat-orion/Makefile
index 95a5fc53b6db..c20ce0f5ce33 100644
--- a/arch/arm/plat-orion/Makefile
+++ b/arch/arm/plat-orion/Makefile
@@ -2,7 +2,7 @@
 # Makefile for the linux kernel.
 #
-obj-y   := irq.o pcie.o time.o common.o mpp.o
+obj-y   := irq.o pcie.o time.o common.o mpp.o addr-map.o
 obj-m   :=
 obj-n   :=
 obj-    :=
diff --git a/arch/arm/plat-orion/addr-map.c b/arch/arm/plat-orion/addr-map.c
new file mode 100644
index 000000000000..367ca89ac403
--- /dev/null
+++ b/arch/arm/plat-orion/addr-map.c
@@ -0,0 +1,174 @@
+/*
+ * arch/arm/plat-orion/addr-map.c
+ *
+ * Address map functions for Marvell Orion based SoCs
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/mbus.h>
+#include <linux/io.h>
+#include <plat/addr-map.h>
+struct mbus_dram_target_info orion_mbus_dram_info;
+const struct mbus_dram_target_info *mv_mbus_dram_info(void)
+{
+        return &orion_mbus_dram_info;
+}
+EXPORT_SYMBOL_GPL(mv_mbus_dram_info);
+/*
+ * DDR target is the same on all Orion platforms.
+ */
+#define TARGET_DDR              0
+/*
+ * Helpers to get DDR bank info
+ */
+#define DDR_BASE_CS_OFF(n)      (0x0000 + ((n) << 3))
+#define DDR_SIZE_CS_OFF(n)      (0x0004 + ((n) << 3))
+/*
+ * CPU Address Decode Windows registers
+ */
+#define WIN_CTRL_OFF            0x0000
+#define WIN_BASE_OFF            0x0004
+#define WIN_REMAP_LO_OFF        0x0008
+#define WIN_REMAP_HI_OFF        0x000c
+/*
+ * Default implementation
+ */
+static void __init __iomem *
+orion_win_cfg_base(const struct orion_addr_map_cfg *cfg, int win)
+{
+        return (void __iomem *)(cfg->bridge_virt_base + (win << 4));
+}
+/*
+ * Default implementation
+ */
+static int __init orion_cpu_win_can_remap(const struct orion_addr_map_cfg *cfg,
+                                          const int win)
+{
+        if (win < cfg->remappable_wins)
+                return 1;
+        return 0;
+}
+void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg,
+                                const int win, const u32 base,
+                                const u32 size, const u8 target,
+                                const u8 attr, const int remap)
+{
+        void __iomem *addr = cfg->win_cfg_base(cfg, win);
+        u32 ctrl, base_high, remap_addr;
+        if (win >= cfg->num_wins) {
+                printk(KERN_ERR "setup_cpu_win: trying to allocate window "
+                       "%d when only %d allowed\n", win, cfg->num_wins);
+        }
+        base_high = base & 0xffff0000;
+        ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1;
+        writel(base_high, addr + WIN_BASE_OFF);
+        writel(ctrl, addr + WIN_CTRL_OFF);
+        if (cfg->cpu_win_can_remap(cfg, win)) {
+                if (remap < 0)
+                        remap_addr = base;
+                else
+                        remap_addr = remap;
+                writel(remap_addr & 0xffff0000, addr + WIN_REMAP_LO_OFF);
+                writel(0, addr + WIN_REMAP_HI_OFF);
+        }
+}
+/*
+ * Configure a number of windows.
+ */
+static void __init orion_setup_cpu_wins(const struct orion_addr_map_cfg * cfg,
+                                        const struct orion_addr_map_info *info)
+{
+        while (info->win != -1) {
+                orion_setup_cpu_win(cfg, info->win, info->base, info->size,
+                                    info->target, info->attr, info->remap);
+                info++;
+        }
+}
+static void __init orion_disable_wins(const struct orion_addr_map_cfg * cfg)
+{
+        void __iomem *addr;
+        int i;
+        for (i = 0; i < cfg->num_wins; i++) {
+                addr = cfg->win_cfg_base(cfg, i);
+                writel(0, addr + WIN_BASE_OFF);
+                writel(0, addr + WIN_CTRL_OFF);
+                if (cfg->cpu_win_can_remap(cfg, i)) {
+                        writel(0, addr + WIN_REMAP_LO_OFF);
+                        writel(0, addr + WIN_REMAP_HI_OFF);
+                }
+        }
+}
+/*
+ * Disable, clear and configure windows.
+ */
+void __init orion_config_wins(struct orion_addr_map_cfg * cfg,
+                              const struct orion_addr_map_info *info)
+{
+        if (!cfg->cpu_win_can_remap)
+                cfg->cpu_win_can_remap = orion_cpu_win_can_remap;
+        if (!cfg->win_cfg_base)
+                cfg->win_cfg_base = orion_win_cfg_base;
+        orion_disable_wins(cfg);
+        if (info)
+                orion_setup_cpu_wins(cfg, info);
+}
+/*
+ * Setup MBUS dram target info.
+ */
+void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
+                                        const u32 ddr_window_cpu_base)
+{
+        void __iomem *addr;
+        int i;
+        int cs;
+        orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
+        addr = (void __iomem *)ddr_window_cpu_base;
+        for (i = 0, cs = 0; i < 4; i++) {
+                u32 base = readl(addr + DDR_BASE_CS_OFF(i));
+                u32 size = readl(addr + DDR_SIZE_CS_OFF(i));
+                /*
+                 * Chip select enabled?
+                 */
+                if (size & 1) {
+                        struct mbus_dram_window *w;
+                        w = &orion_mbus_dram_info.cs[cs++];
+                        w->cs_index = i;
+                        w->mbus_attr = 0xf & ~(1 << i);
+                        w->base = base & 0xffff0000;
+                        w->size = (size | 0x0000ffff) + 1;
+                }
+        }
+        orion_mbus_dram_info.num_cs = cs;
+}
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index 9e5451b3c8e3..e5a2fde29b19 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -13,7 +13,6 @@
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <linux/serial_8250.h>
-#include <linux/mbus.h>
 #include <linux/ata_platform.h>
 #include <linux/mv643xx_eth.h>
 #include <linux/mv643xx_i2c.h>
@@ -203,13 +202,12 @@ void __init orion_rtc_init(unsigned long mapbase,
 ****************************************************************************/
 static __init void ge_complete(
        struct mv643xx_eth_shared_platform_data *orion_ge_shared_data,
-        struct mbus_dram_target_info *mbus_dram_info, int tclk,
+        int tclk,
        struct resource *orion_ge_resource, unsigned long irq,
        struct platform_device *orion_ge_shared,
        struct mv643xx_eth_platform_data *eth_data,
        struct platform_device *orion_ge)
 {
-        orion_ge_shared_data->dram = mbus_dram_info;
        orion_ge_shared_data->t_clk = tclk;
        orion_ge_resource->start = irq;
        orion_ge_resource->end = irq;
@@ -259,7 +257,6 @@ static struct platform_device orion_ge00 = {
 };
 void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
-                            struct mbus_dram_target_info *mbus_dram_info,
                            unsigned long mapbase,
                            unsigned long irq,
                            unsigned long irq_err,
@@ -267,7 +264,7 @@ void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
 {
        fill_resources(&orion_ge00_shared, orion_ge00_shared_resources,
                       mapbase + 0x2000, SZ_16K - 1, irq_err);
-        ge_complete(&orion_ge00_shared_data, mbus_dram_info, tclk,
+        ge_complete(&orion_ge00_shared_data, tclk,
                    orion_ge00_resources, irq, &orion_ge00_shared,
                    eth_data, &orion_ge00);
 }
@@ -313,7 +310,6 @@ static struct platform_device orion_ge01 = {
 };
 void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
-                            struct mbus_dram_target_info *mbus_dram_info,
                            unsigned long mapbase,
                            unsigned long irq,
                            unsigned long irq_err,
@@ -321,7 +317,7 @@ void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
 {
        fill_resources(&orion_ge01_shared, orion_ge01_shared_resources,
                       mapbase + 0x2000, SZ_16K - 1, irq_err);
-        ge_complete(&orion_ge01_shared_data, mbus_dram_info, tclk,
+        ge_complete(&orion_ge01_shared_data, tclk,
                    orion_ge01_resources, irq, &orion_ge01_shared,
                    eth_data, &orion_ge01);
 }
@@ -367,7 +363,6 @@ static struct platform_device orion_ge10 = {
 };
 void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
-                            struct mbus_dram_target_info *mbus_dram_info,
                            unsigned long mapbase,
                            unsigned long irq,
                            unsigned long irq_err,
@@ -375,7 +370,7 @@ void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
 {
        fill_resources(&orion_ge10_shared, orion_ge10_shared_resources,
                       mapbase + 0x2000, SZ_16K - 1, irq_err);
-        ge_complete(&orion_ge10_shared_data, mbus_dram_info, tclk,
+        ge_complete(&orion_ge10_shared_data, tclk,
                    orion_ge10_resources, irq, &orion_ge10_shared,
                    eth_data, &orion_ge10);
 }
@@ -421,7 +416,6 @@ static struct platform_device orion_ge11 = {
 };
 void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,
-                            struct mbus_dram_target_info *mbus_dram_info,
                            unsigned long mapbase,
                            unsigned long irq,
                            unsigned long irq_err,
@@ -429,7 +423,7 @@ void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,
 {
        fill_resources(&orion_ge11_shared, orion_ge11_shared_resources,
                       mapbase + 0x2000, SZ_16K - 1, irq_err);
-        ge_complete(&orion_ge11_shared_data, mbus_dram_info, tclk,
+        ge_complete(&orion_ge11_shared_data, tclk,
                    orion_ge11_resources, irq, &orion_ge11_shared,
                    eth_data, &orion_ge11);
 }
@@ -592,8 +586,6 @@ void __init orion_wdt_init(unsigned long tclk)
 /*****************************************************************************
 * XOR
 ****************************************************************************/
-static struct mv_xor_platform_shared_data orion_xor_shared_data;
 static u64 orion_xor_dmamask = DMA_BIT_MASK(32);
 void __init orion_xor_init_channels(
@@ -632,9 +624,6 @@ static struct resource orion_xor0_shared_resources[] = {
 static struct platform_device orion_xor0_shared = {
        .name           = MV_XOR_SHARED_NAME,
        .id             = 0,
-        .dev            = {
-                .platform_data = &orion_xor_shared_data,
-        },
        .num_resources  = ARRAY_SIZE(orion_xor0_shared_resources),
        .resource       = orion_xor0_shared_resources,
 };
@@ -687,14 +676,11 @@ static struct platform_device orion_xor01_channel = {
        },
 };
-void __init orion_xor0_init(struct mbus_dram_target_info *mbus_dram_info,
+void __init orion_xor0_init(unsigned long mapbase_low,
-                            unsigned long mapbase_low,
                            unsigned long mapbase_high,
                            unsigned long irq_0,
                            unsigned long irq_1)
 {
-        orion_xor_shared_data.dram = mbus_dram_info;
        orion_xor0_shared_resources[0].start = mapbase_low;
        orion_xor0_shared_resources[0].end = mapbase_low + 0xff;
        orion_xor0_shared_resources[1].start = mapbase_high;
@@ -727,9 +713,6 @@ static struct resource orion_xor1_shared_resources[] = {
 static struct platform_device orion_xor1_shared = {
        .name           = MV_XOR_SHARED_NAME,
        .id             = 1,
-        .dev            = {
-                .platform_data = &orion_xor_shared_data,
-        },
        .num_resources  = ARRAY_SIZE(orion_xor1_shared_resources),
        .resource       = orion_xor1_shared_resources,
 };
@@ -828,11 +811,9 @@ static struct platform_device orion_ehci = {
        },
 };
-void __init orion_ehci_init(struct mbus_dram_target_info *mbus_dram_info,
+void __init orion_ehci_init(unsigned long mapbase,
-                            unsigned long mapbase,
                            unsigned long irq)
 {
-        orion_ehci_data.dram = mbus_dram_info;
        fill_resources(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1,
                       irq);
@@ -854,11 +835,9 @@ static struct platform_device orion_ehci_1 = {
        },
 };
-void __init orion_ehci_1_init(struct mbus_dram_target_info *mbus_dram_info,
+void __init orion_ehci_1_init(unsigned long mapbase,
-                              unsigned long mapbase,
                              unsigned long irq)
 {
-        orion_ehci_data.dram = mbus_dram_info;
        fill_resources(&orion_ehci_1, orion_ehci_1_resources,
                       mapbase, SZ_4K - 1, irq);
@@ -880,11 +859,9 @@ static struct platform_device orion_ehci_2 = {
        },
 };
-void __init orion_ehci_2_init(struct mbus_dram_target_info *mbus_dram_info,
+void __init orion_ehci_2_init(unsigned long mapbase,
-                              unsigned long mapbase,
                              unsigned long irq)
 {
-        orion_ehci_data.dram = mbus_dram_info;
        fill_resources(&orion_ehci_2, orion_ehci_2_resources,
                       mapbase, SZ_4K - 1, irq);
@@ -911,11 +888,9 @@ static struct platform_device orion_sata = {
 };
 void __init orion_sata_init(struct mv_sata_platform_data *sata_data,
-                            struct mbus_dram_target_info *mbus_dram_info,
                            unsigned long mapbase,
                            unsigned long irq)
 {
-        sata_data->dram = mbus_dram_info;
        orion_sata.dev.platform_data = sata_data;
        fill_resources(&orion_sata, orion_sata_resources,
                       mapbase, 0x5000 - 1, irq);
diff --git a/arch/arm/plat-orion/include/plat/addr-map.h b/arch/arm/plat-orion/include/plat/addr-map.h
new file mode 100644
index 000000000000..fd556f77562c
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/addr-map.h
@@ -0,0 +1,53 @@
+/*
+ * arch/arm/plat-orion/include/plat/addr-map.h
+ *
+ * Marvell Orion SoC address map handling.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#ifndef __PLAT_ADDR_MAP_H
+#define __PLAT_ADDR_MAP_H
+extern struct mbus_dram_target_info orion_mbus_dram_info;
+struct orion_addr_map_cfg {
+        const int num_wins;     /* Total number of windows */
+        const int remappable_wins;
+        const u32 bridge_virt_base;
+        /* If NULL, the default cpu_win_can_remap will be used, using
+           the value in remappable_wins */
+        int (*cpu_win_can_remap) (const struct orion_addr_map_cfg *cfg,
+                                  const int win);
+        /* If NULL, the default win_cfg_base will be used, using the
+           value in bridge_virt_base */
+        void __iomem *(*win_cfg_base) (const struct orion_addr_map_cfg *cfg,
+                                 const int win);
+};
+/*
+ * Information needed to setup one address mapping.
+ */
+struct orion_addr_map_info {
+        const int win;
+        const u32 base;
+        const u32 size;
+        const u8 target;
+        const u8 attr;
+        const int remap;
+};
+void __init orion_config_wins(struct orion_addr_map_cfg *cfg,
+                              const struct orion_addr_map_info *info);
+void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg,
+                                const int win, const u32 base,
+                                const u32 size, const u8 target,
+                                const u8 attr, const int remap);
+void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
+                                        const u32 ddr_window_cpu_base);
+#endif
diff --git a/arch/arm/plat-orion/include/plat/audio.h b/arch/arm/plat-orion/include/plat/audio.h
index 9cf1f781329b..885f8abd927b 100644
--- a/arch/arm/plat-orion/include/plat/audio.h
+++ b/arch/arm/plat-orion/include/plat/audio.h
@@ -1,11 +1,8 @@
 #ifndef __PLAT_AUDIO_H
 #define __PLAT_AUDIO_H
-#include <linux/mbus.h>
 struct kirkwood_asoc_platform_data {
        u32 tclk;
-        struct mbus_dram_target_info *dram;
        int burst;
 };
 #endif
diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h
index a63c357e2ab1..0fe08d77e835 100644
--- a/arch/arm/plat-orion/include/plat/common.h
+++ b/arch/arm/plat-orion/include/plat/common.h
@@ -37,28 +37,24 @@ void __init orion_rtc_init(unsigned long mapbase,
                           unsigned long irq);
 void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
-                            struct mbus_dram_target_info *mbus_dram_info,
                            unsigned long mapbase,
                            unsigned long irq,
                            unsigned long irq_err,
                            int tclk);
 void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
-                            struct mbus_dram_target_info *mbus_dram_info,
                            unsigned long mapbase,
                            unsigned long irq,
                            unsigned long irq_err,
                            int tclk);
 void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
-                            struct mbus_dram_target_info *mbus_dram_info,
                            unsigned long mapbase,
                            unsigned long irq,
                            unsigned long irq_err,
                            int tclk);
 void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,
-                            struct mbus_dram_target_info *mbus_dram_info,
                            unsigned long mapbase,
                            unsigned long irq,
                            unsigned long irq_err,
@@ -82,8 +78,7 @@ void __init orion_spi_1_init(unsigned long mapbase,
 void __init orion_wdt_init(unsigned long tclk);
-void __init orion_xor0_init(struct mbus_dram_target_info *mbus_dram_info,
+void __init orion_xor0_init(unsigned long mapbase_low,
-                            unsigned long mapbase_low,
                            unsigned long mapbase_high,
                            unsigned long irq_0,
                            unsigned long irq_1);
@@ -93,20 +88,16 @@ void __init orion_xor1_init(unsigned long mapbase_low,
                            unsigned long irq_0,
                            unsigned long irq_1);
-void __init orion_ehci_init(struct mbus_dram_target_info *mbus_dram_info,
+void __init orion_ehci_init(unsigned long mapbase,
-                            unsigned long mapbase,
                            unsigned long irq);
-void __init orion_ehci_1_init(struct mbus_dram_target_info *mbus_dram_info,
+void __init orion_ehci_1_init(unsigned long mapbase,
-                              unsigned long mapbase,
                              unsigned long irq);
-void __init orion_ehci_2_init(struct mbus_dram_target_info *mbus_dram_info,
+void __init orion_ehci_2_init(unsigned long mapbase,
-                              unsigned long mapbase,
                              unsigned long irq);
 void __init orion_sata_init(struct mv_sata_platform_data *sata_data,
-                            struct mbus_dram_target_info *mbus_dram_info,
                            unsigned long mapbase,
                            unsigned long irq);
diff --git a/arch/arm/plat-orion/include/plat/ehci-orion.h b/arch/arm/plat-orion/include/plat/ehci-orion.h
index 4ec668e77460..6fc78e430420 100644
--- a/arch/arm/plat-orion/include/plat/ehci-orion.h
+++ b/arch/arm/plat-orion/include/plat/ehci-orion.h
@@ -19,7 +19,6 @@ enum orion_ehci_phy_ver {
 };
 struct orion_ehci_data {
-        struct mbus_dram_target_info    *dram;
        enum orion_ehci_phy_ver phy_version;
 };
diff --git a/arch/arm/plat-orion/include/plat/mv_xor.h b/arch/arm/plat-orion/include/plat/mv_xor.h
index bd5f3bdb4ae3..2ba1f7d76eef 100644
--- a/arch/arm/plat-orion/include/plat/mv_xor.h
+++ b/arch/arm/plat-orion/include/plat/mv_xor.h
@@ -13,12 +13,6 @@
 #define MV_XOR_SHARED_NAME      "mv_xor_shared"
 #define MV_XOR_NAME             "mv_xor"
-struct mbus_dram_target_info;
-struct mv_xor_platform_shared_data {
-        struct mbus_dram_target_info    *dram;
-};
 struct mv_xor_platform_data {
        struct platform_device          *shared;
        int                             hw_id;
diff --git a/arch/arm/plat-orion/include/plat/mvsdio.h b/arch/arm/plat-orion/include/plat/mvsdio.h
index 14ca88676002..1190efedcb94 100644
--- a/arch/arm/plat-orion/include/plat/mvsdio.h
+++ b/arch/arm/plat-orion/include/plat/mvsdio.h
@@ -12,7 +12,6 @@
 #include <linux/mbus.h>
 struct mvsdio_platform_data {
-        struct mbus_dram_target_info *dram;
        unsigned int clock;
        int gpio_card_detect;
        int gpio_write_protect;
diff --git a/arch/arm/plat-orion/include/plat/pcie.h b/arch/arm/plat-orion/include/plat/pcie.h
index cc99163e73fd..fe5b9e862747 100644
--- a/arch/arm/plat-orion/include/plat/pcie.h
+++ b/arch/arm/plat-orion/include/plat/pcie.h
@@ -20,8 +20,7 @@ int orion_pcie_x4_mode(void __iomem *base);
 int orion_pcie_get_local_bus_nr(void __iomem *base);
 void orion_pcie_set_local_bus_nr(void __iomem *base, int nr);
 void orion_pcie_reset(void __iomem *base);
-void orion_pcie_setup(void __iomem *base,
+void orion_pcie_setup(void __iomem *base);
-                      struct mbus_dram_target_info *dram);
 int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus,
                       u32 devfn, int where, int size, u32 *val);
 int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus,
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c
index af2d733c50b5..86dbb5bdb172 100644
--- a/arch/arm/plat-orion/pcie.c
+++ b/arch/arm/plat-orion/pcie.c
@@ -13,6 +13,7 @@
 #include <linux/mbus.h>
 #include <asm/mach/pci.h>
 #include <plat/pcie.h>
+#include <plat/addr-map.h>
 #include <linux/delay.h>
 /*
@@ -175,8 +176,7 @@ static void __init orion_pcie_setup_wins(void __iomem *base,
        writel(((size - 1) & 0xffff0000) | 1, base + PCIE_BAR_CTRL_OFF(1));
 }
-void __init orion_pcie_setup(void __iomem *base,
+void __init orion_pcie_setup(void __iomem *base)
-                             struct mbus_dram_target_info *dram)
 {
        u16 cmd;
        u32 mask;
@@ -184,7 +184,7 @@ void __init orion_pcie_setup(void __iomem *base,
        /*
         * Point PCIe unit MBUS decode windows to DRAM space.
         */
-        orion_pcie_setup_wins(base, dram);
+        orion_pcie_setup_wins(base, &orion_mbus_dram_info);
        /*
         * Master + slave enable.
diff --git a/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c b/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c
index a9276667c2fb..c7adad0e8de0 100644
--- a/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c
+++ b/arch/arm/plat-s3c24xx/cpu-freq-debugfs.c
@@ -12,7 +12,7 @@
 */
 #include <linux/init.h>
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
 #include <linux/cpufreq.h>
diff --git a/arch/arm/plat-s5p/sysmmu.c b/arch/arm/plat-s5p/sysmmu.c
index e1cbc728c775..c8bec9c7655d 100644
--- a/arch/arm/plat-s5p/sysmmu.c
+++ b/arch/arm/plat-s5p/sysmmu.c
@@ -11,6 +11,7 @@
 #include <linux/io.h>
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
+#include <linux/export.h>
 #include <asm/pgtable.h>
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index d48245bb02b3..df8155b9d4d1 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -24,6 +24,8 @@
 #ifndef __PLAT_GPIO_CFG_H
 #define __PLAT_GPIO_CFG_H __FILE__
+#include<linux/types.h>
 typedef unsigned int __bitwise__ samsung_gpio_pull_t;
 typedef unsigned int __bitwise__ s5p_gpio_drvstr_t;
diff --git a/arch/arm/plat-samsung/pd.c b/arch/arm/plat-samsung/pd.c
index efe1d564473e..312b510d86b7 100644
--- a/arch/arm/plat-samsung/pd.c
+++ b/arch/arm/plat-samsung/pd.c
@@ -11,7 +11,7 @@
 */
 #include <linux/init.h>
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/platform_device.h>
 #include <linux/err.h>
 #include <linux/pm_runtime.h>
diff --git a/arch/arm/plat-samsung/pwm.c b/arch/arm/plat-samsung/pwm.c
index dc1185dcf80d..c559d8438c70 100644
--- a/arch/arm/plat-samsung/pwm.c
+++ b/arch/arm/plat-samsung/pwm.c
@@ -11,7 +11,7 @@
 * the Free Software Foundation; either version 2 of the License.
 */
-#include <linux/module.h>
+#include <linux/export.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 5bdeef969847..ccbe16f47227 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -1123,5 +1123,6 @@ blissc			MACH_BLISSC		BLISSC			3491
 thales_adc              MACH_THALES_ADC         THALES_ADC              3492
 ubisys_p9d_evp          MACH_UBISYS_P9D_EVP     UBISYS_P9D_EVP          3493
 atdgp318                MACH_ATDGP318           ATDGP318                3494
+m28evk                  MACH_M28EVK             M28EVK                  3613
 smdk4212                MACH_SMDK4212           SMDK4212                3638
 smdk4412                MACH_SMDK4412           SMDK4412                3765