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-rw-r--r--arch/arm/Kconfig12
-rw-r--r--arch/arm/Kconfig.debug2
-rw-r--r--arch/arm/boot/Makefile2
-rw-r--r--arch/arm/boot/compressed/Makefile2
-rw-r--r--arch/arm/boot/dts/armada-370-rd.dts8
-rw-r--r--arch/arm/boot/dts/armada-370-xp.dtsi5
-rw-r--r--arch/arm/boot/dts/armada-xp.dtsi4
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi28
-rw-r--r--arch/arm/boot/dts/bcm2835.dtsi2
-rw-r--r--arch/arm/boot/dts/dove.dtsi5
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi9
-rw-r--r--arch/arm/boot/dts/exynos5440.dtsi6
-rw-r--r--arch/arm/boot/dts/imx53-mba53.dts3
-rw-r--r--arch/arm/boot/dts/kirkwood-dns320.dts2
-rw-r--r--arch/arm/boot/dts/kirkwood-dns325.dts1
-rw-r--r--arch/arm/boot/dts/kirkwood-dockstar.dts1
-rw-r--r--arch/arm/boot/dts/kirkwood-dreamplug.dts1
-rw-r--r--arch/arm/boot/dts/kirkwood-goflexnet.dts1
-rw-r--r--arch/arm/boot/dts/kirkwood-ib62x0.dts1
-rw-r--r--arch/arm/boot/dts/kirkwood-iconnect.dts1
-rw-r--r--arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts1
-rw-r--r--arch/arm/boot/dts/kirkwood-km_kirkwood.dts1
-rw-r--r--arch/arm/boot/dts/kirkwood-lschlv2.dts1
-rw-r--r--arch/arm/boot/dts/kirkwood-lsxhl.dts1
-rw-r--r--arch/arm/boot/dts/kirkwood-mplcec4.dts1
-rw-r--r--arch/arm/boot/dts/kirkwood-ns2-common.dtsi1
-rw-r--r--arch/arm/boot/dts/kirkwood-nsa310.dts1
-rw-r--r--arch/arm/boot/dts/kirkwood-openblocks_a6.dts2
-rw-r--r--arch/arm/boot/dts/kirkwood-topkick.dts1
-rw-r--r--arch/arm/boot/dts/kirkwood.dtsi5
-rw-r--r--arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts2
-rw-r--r--arch/arm/boot/dts/socfpga.dtsi3
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi1
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi1
-rw-r--r--arch/arm/configs/mxs_defconfig1
-rw-r--r--arch/arm/configs/omap2plus_defconfig2
-rw-r--r--arch/arm/include/asm/mmu.h8
-rw-r--r--arch/arm/include/asm/mmu_context.h2
-rw-r--r--arch/arm/include/asm/tlbflush.h34
-rw-r--r--arch/arm/include/uapi/asm/unistd.h2
-rw-r--r--arch/arm/kernel/asm-offsets.c2
-rw-r--r--arch/arm/kernel/calls.S2
-rw-r--r--arch/arm/kernel/head.S26
-rw-r--r--arch/arm/kernel/hw_breakpoint.c2
-rw-r--r--arch/arm/kernel/perf_event.c4
-rw-r--r--arch/arm/kernel/perf_event_v7.c2
-rw-r--r--arch/arm/kernel/smp.c1
-rw-r--r--arch/arm/kernel/smp_tlb.c12
-rw-r--r--arch/arm/kernel/smp_twd.c4
-rw-r--r--arch/arm/kernel/suspend.c1
-rw-r--r--arch/arm/lib/memset.S85
-rw-r--r--arch/arm/mach-at91/include/mach/gpio.h8
-rw-r--r--arch/arm/mach-at91/irq.c20
-rw-r--r--arch/arm/mach-at91/pm.c10
-rw-r--r--arch/arm/mach-davinci/dma.c3
-rw-r--r--arch/arm/mach-imx/clk-imx35.c1
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c2
-rw-r--r--arch/arm/mach-imx/headsmp.S18
-rw-r--r--arch/arm/mach-imx/imx25-dt.c5
-rw-r--r--arch/arm/mach-imx/pm-imx6q.c15
-rw-r--r--arch/arm/mach-kirkwood/board-dt.c25
-rw-r--r--arch/arm/mach-mmp/gplugd.c1
-rw-r--r--arch/arm/mach-mxs/icoll.c2
-rw-r--r--arch/arm/mach-mxs/mach-mxs.c10
-rw-r--r--arch/arm/mach-mxs/mm.c1
-rw-r--r--arch/arm/mach-mxs/ocotp.c1
-rw-r--r--arch/arm/mach-netx/generic.c2
-rw-r--r--arch/arm/mach-netx/include/mach/irqs.h64
-rw-r--r--arch/arm/mach-omap1/common.h2
-rw-r--r--arch/arm/mach-omap2/Kconfig6
-rw-r--r--arch/arm/mach-omap2/board-generic.c2
-rw-r--r--arch/arm/mach-omap2/board-rx51.c2
-rw-r--r--arch/arm/mach-omap2/common.h1
-rw-r--r--arch/arm/mach-omap2/gpmc.c6
-rw-r--r--arch/arm/mach-omap2/mux.c9
-rw-r--r--arch/arm/mach-s5pv210/clock.c36
-rw-r--r--arch/arm/mach-s5pv210/mach-goni.c2
-rw-r--r--arch/arm/mach-spear3xx/spear3xx.c2
-rw-r--r--arch/arm/mm/context.c29
-rw-r--r--arch/arm/mm/idmap.c1
-rw-r--r--arch/arm/mm/proc-v7-3level.S2
-rw-r--r--arch/arm/plat-orion/addr-map.c7
-rw-r--r--arch/arm/plat-spear/Kconfig2
83 files changed, 369 insertions, 236 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5b714695b01b..ca1b6fd94a3f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -556,7 +556,6 @@ config ARCH_IXP4XX
556config ARCH_DOVE 556config ARCH_DOVE
557 bool "Marvell Dove" 557 bool "Marvell Dove"
558 select ARCH_REQUIRE_GPIOLIB 558 select ARCH_REQUIRE_GPIOLIB
559 select COMMON_CLK_DOVE
560 select CPU_V7 559 select CPU_V7
561 select GENERIC_CLOCKEVENTS 560 select GENERIC_CLOCKEVENTS
562 select MIGHT_HAVE_PCI 561 select MIGHT_HAVE_PCI
@@ -1006,12 +1005,12 @@ config ARCH_MULTI_V4_V5
1006 bool 1005 bool
1007 1006
1008config ARCH_MULTI_V6 1007config ARCH_MULTI_V6
1009 bool "ARMv6 based platforms (ARM11, Scorpion, ...)" 1008 bool "ARMv6 based platforms (ARM11)"
1010 select ARCH_MULTI_V6_V7 1009 select ARCH_MULTI_V6_V7
1011 select CPU_V6 1010 select CPU_V6
1012 1011
1013config ARCH_MULTI_V7 1012config ARCH_MULTI_V7
1014 bool "ARMv7 based platforms (Cortex-A, PJ4, Krait)" 1013 bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
1015 default y 1014 default y
1016 select ARCH_MULTI_V6_V7 1015 select ARCH_MULTI_V6_V7
1017 select ARCH_VEXPRESS 1016 select ARCH_VEXPRESS
@@ -1657,13 +1656,16 @@ config LOCAL_TIMERS
1657 accounting to be spread across the timer interval, preventing a 1656 accounting to be spread across the timer interval, preventing a
1658 "thundering herd" at every timer tick. 1657 "thundering herd" at every timer tick.
1659 1658
1659# The GPIO number here must be sorted by descending number. In case of
1660# a multiplatform kernel, we just want the highest value required by the
1661# selected platforms.
1660config ARCH_NR_GPIO 1662config ARCH_NR_GPIO
1661 int 1663 int
1662 default 1024 if ARCH_SHMOBILE || ARCH_TEGRA 1664 default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1663 default 355 if ARCH_U8500
1664 default 264 if MACH_H4700
1665 default 512 if SOC_OMAP5 1665 default 512 if SOC_OMAP5
1666 default 355 if ARCH_U8500
1666 default 288 if ARCH_VT8500 || ARCH_SUNXI 1667 default 288 if ARCH_VT8500 || ARCH_SUNXI
1668 default 264 if MACH_H4700
1667 default 0 1669 default 0
1668 help 1670 help
1669 Maximum number of GPIOs in the system. 1671 Maximum number of GPIOs in the system.
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index acddddac7ee4..ecfcdba2d17c 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -492,7 +492,7 @@ config DEBUG_IMX_UART_PORT
492 DEBUG_IMX31_UART || \ 492 DEBUG_IMX31_UART || \
493 DEBUG_IMX35_UART || \ 493 DEBUG_IMX35_UART || \
494 DEBUG_IMX51_UART || \ 494 DEBUG_IMX51_UART || \
495 DEBUG_IMX50_IMX53_UART || \ 495 DEBUG_IMX53_UART || \
496 DEBUG_IMX6Q_UART 496 DEBUG_IMX6Q_UART
497 default 1 497 default 1
498 help 498 help
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
index 71768b8a1ab9..84aa2caf07ed 100644
--- a/arch/arm/boot/Makefile
+++ b/arch/arm/boot/Makefile
@@ -115,4 +115,4 @@ i:
115 $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \ 115 $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
116 $(obj)/Image System.map "$(INSTALL_PATH)" 116 $(obj)/Image System.map "$(INSTALL_PATH)"
117 117
118subdir- := bootp compressed 118subdir- := bootp compressed dts
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 5cad8a6dadb0..afed28e37ea5 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -120,7 +120,7 @@ ORIG_CFLAGS := $(KBUILD_CFLAGS)
120KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) 120KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
121endif 121endif
122 122
123ccflags-y := -fpic -fno-builtin -I$(obj) 123ccflags-y := -fpic -mno-single-pic-base -fno-builtin -I$(obj)
124asflags-y := -Wa,-march=all -DZIMAGE 124asflags-y := -Wa,-march=all -DZIMAGE
125 125
126# Supply kernel BSS size to the decompressor via a linker symbol. 126# Supply kernel BSS size to the decompressor via a linker symbol.
diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts
index f8e4855bc9a5..070bba4f2585 100644
--- a/arch/arm/boot/dts/armada-370-rd.dts
+++ b/arch/arm/boot/dts/armada-370-rd.dts
@@ -64,5 +64,13 @@
64 status = "okay"; 64 status = "okay";
65 /* No CD or WP GPIOs */ 65 /* No CD or WP GPIOs */
66 }; 66 };
67
68 usb@d0050000 {
69 status = "okay";
70 };
71
72 usb@d0051000 {
73 status = "okay";
74 };
67 }; 75 };
68}; 76};
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 6f1acc75e155..5b708208b607 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -31,7 +31,6 @@
31 mpic: interrupt-controller@d0020000 { 31 mpic: interrupt-controller@d0020000 {
32 compatible = "marvell,mpic"; 32 compatible = "marvell,mpic";
33 #interrupt-cells = <1>; 33 #interrupt-cells = <1>;
34 #address-cells = <1>;
35 #size-cells = <1>; 34 #size-cells = <1>;
36 interrupt-controller; 35 interrupt-controller;
37 }; 36 };
@@ -54,7 +53,7 @@
54 reg = <0xd0012000 0x100>; 53 reg = <0xd0012000 0x100>;
55 reg-shift = <2>; 54 reg-shift = <2>;
56 interrupts = <41>; 55 interrupts = <41>;
57 reg-io-width = <4>; 56 reg-io-width = <1>;
58 status = "disabled"; 57 status = "disabled";
59 }; 58 };
60 serial@d0012100 { 59 serial@d0012100 {
@@ -62,7 +61,7 @@
62 reg = <0xd0012100 0x100>; 61 reg = <0xd0012100 0x100>;
63 reg-shift = <2>; 62 reg-shift = <2>;
64 interrupts = <42>; 63 interrupts = <42>;
65 reg-io-width = <4>; 64 reg-io-width = <1>;
66 status = "disabled"; 65 status = "disabled";
67 }; 66 };
68 67
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index 1443949c165e..ca00d8326c87 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -46,7 +46,7 @@
46 reg = <0xd0012200 0x100>; 46 reg = <0xd0012200 0x100>;
47 reg-shift = <2>; 47 reg-shift = <2>;
48 interrupts = <43>; 48 interrupts = <43>;
49 reg-io-width = <4>; 49 reg-io-width = <1>;
50 status = "disabled"; 50 status = "disabled";
51 }; 51 };
52 serial@d0012300 { 52 serial@d0012300 {
@@ -54,7 +54,7 @@
54 reg = <0xd0012300 0x100>; 54 reg = <0xd0012300 0x100>;
55 reg-shift = <2>; 55 reg-shift = <2>;
56 interrupts = <44>; 56 interrupts = <44>;
57 reg-io-width = <4>; 57 reg-io-width = <1>;
58 status = "disabled"; 58 status = "disabled";
59 }; 59 };
60 60
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index aa98e641931f..a98c0d50fbbe 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -238,8 +238,32 @@
238 nand { 238 nand {
239 pinctrl_nand: nand-0 { 239 pinctrl_nand: nand-0 {
240 atmel,pins = 240 atmel,pins =
241 <3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */ 241 <3 0 0x1 0x0 /* PD0 periph A Read Enable */
242 3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */ 242 3 1 0x1 0x0 /* PD1 periph A Write Enable */
243 3 2 0x1 0x0 /* PD2 periph A Address Latch Enable */
244 3 3 0x1 0x0 /* PD3 periph A Command Latch Enable */
245 3 4 0x0 0x1 /* PD4 gpio Chip Enable pin pull_up */
246 3 5 0x0 0x1 /* PD5 gpio RDY/BUSY pin pull_up */
247 3 6 0x1 0x0 /* PD6 periph A Data bit 0 */
248 3 7 0x1 0x0 /* PD7 periph A Data bit 1 */
249 3 8 0x1 0x0 /* PD8 periph A Data bit 2 */
250 3 9 0x1 0x0 /* PD9 periph A Data bit 3 */
251 3 10 0x1 0x0 /* PD10 periph A Data bit 4 */
252 3 11 0x1 0x0 /* PD11 periph A Data bit 5 */
253 3 12 0x1 0x0 /* PD12 periph A Data bit 6 */
254 3 13 0x1 0x0>; /* PD13 periph A Data bit 7 */
255 };
256
257 pinctrl_nand_16bits: nand_16bits-0 {
258 atmel,pins =
259 <3 14 0x1 0x0 /* PD14 periph A Data bit 8 */
260 3 15 0x1 0x0 /* PD15 periph A Data bit 9 */
261 3 16 0x1 0x0 /* PD16 periph A Data bit 10 */
262 3 17 0x1 0x0 /* PD17 periph A Data bit 11 */
263 3 18 0x1 0x0 /* PD18 periph A Data bit 12 */
264 3 19 0x1 0x0 /* PD19 periph A Data bit 13 */
265 3 20 0x1 0x0 /* PD20 periph A Data bit 14 */
266 3 21 0x1 0x0>; /* PD21 periph A Data bit 15 */
243 }; 267 };
244 }; 268 };
245 269
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 4bf2a8774aa7..7e0481e2441a 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -105,7 +105,7 @@
105 compatible = "fixed-clock"; 105 compatible = "fixed-clock";
106 reg = <1>; 106 reg = <1>;
107 #clock-cells = <0>; 107 #clock-cells = <0>;
108 clock-frequency = <150000000>; 108 clock-frequency = <250000000>;
109 }; 109 };
110 }; 110 };
111}; 111};
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index 67dbe20868a2..f7509cafc377 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -197,6 +197,11 @@
197 status = "disabled"; 197 status = "disabled";
198 }; 198 };
199 199
200 rtc@d8500 {
201 compatible = "marvell,orion-rtc";
202 reg = <0xd8500 0x20>;
203 };
204
200 crypto: crypto@30000 { 205 crypto: crypto@30000 {
201 compatible = "marvell,orion-crypto"; 206 compatible = "marvell,orion-crypto";
202 reg = <0x30000 0x10000>, 207 reg = <0x30000 0x10000>,
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index e1347fceb5bc..1a62bcf18aa3 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -275,18 +275,27 @@
275 compatible = "arm,pl330", "arm,primecell"; 275 compatible = "arm,pl330", "arm,primecell";
276 reg = <0x12680000 0x1000>; 276 reg = <0x12680000 0x1000>;
277 interrupts = <0 35 0>; 277 interrupts = <0 35 0>;
278 #dma-cells = <1>;
279 #dma-channels = <8>;
280 #dma-requests = <32>;
278 }; 281 };
279 282
280 pdma1: pdma@12690000 { 283 pdma1: pdma@12690000 {
281 compatible = "arm,pl330", "arm,primecell"; 284 compatible = "arm,pl330", "arm,primecell";
282 reg = <0x12690000 0x1000>; 285 reg = <0x12690000 0x1000>;
283 interrupts = <0 36 0>; 286 interrupts = <0 36 0>;
287 #dma-cells = <1>;
288 #dma-channels = <8>;
289 #dma-requests = <32>;
284 }; 290 };
285 291
286 mdma1: mdma@12850000 { 292 mdma1: mdma@12850000 {
287 compatible = "arm,pl330", "arm,primecell"; 293 compatible = "arm,pl330", "arm,primecell";
288 reg = <0x12850000 0x1000>; 294 reg = <0x12850000 0x1000>;
289 interrupts = <0 34 0>; 295 interrupts = <0 34 0>;
296 #dma-cells = <1>;
297 #dma-channels = <8>;
298 #dma-requests = <1>;
290 }; 299 };
291 }; 300 };
292}; 301};
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 5f3562ad6746..9a99755920c0 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -142,12 +142,18 @@
142 compatible = "arm,pl330", "arm,primecell"; 142 compatible = "arm,pl330", "arm,primecell";
143 reg = <0x120000 0x1000>; 143 reg = <0x120000 0x1000>;
144 interrupts = <0 34 0>; 144 interrupts = <0 34 0>;
145 #dma-cells = <1>;
146 #dma-channels = <8>;
147 #dma-requests = <32>;
145 }; 148 };
146 149
147 pdma1: pdma@121B0000 { 150 pdma1: pdma@121B0000 {
148 compatible = "arm,pl330", "arm,primecell"; 151 compatible = "arm,pl330", "arm,primecell";
149 reg = <0x121000 0x1000>; 152 reg = <0x121000 0x1000>;
150 interrupts = <0 35 0>; 153 interrupts = <0 35 0>;
154 #dma-cells = <1>;
155 #dma-channels = <8>;
156 #dma-requests = <32>;
151 }; 157 };
152 }; 158 };
153 159
diff --git a/arch/arm/boot/dts/imx53-mba53.dts b/arch/arm/boot/dts/imx53-mba53.dts
index e54fffd48369..468c0a1d48d9 100644
--- a/arch/arm/boot/dts/imx53-mba53.dts
+++ b/arch/arm/boot/dts/imx53-mba53.dts
@@ -42,10 +42,9 @@
42 fsl,pins = <689 0x10000 /* DISP1_DRDY */ 42 fsl,pins = <689 0x10000 /* DISP1_DRDY */
43 482 0x10000 /* DISP1_HSYNC */ 43 482 0x10000 /* DISP1_HSYNC */
44 489 0x10000 /* DISP1_VSYNC */ 44 489 0x10000 /* DISP1_VSYNC */
45 684 0x10000 /* DISP1_DAT_0 */
46 515 0x10000 /* DISP1_DAT_22 */ 45 515 0x10000 /* DISP1_DAT_22 */
47 523 0x10000 /* DISP1_DAT_23 */ 46 523 0x10000 /* DISP1_DAT_23 */
48 543 0x10000 /* DISP1_DAT_21 */ 47 545 0x10000 /* DISP1_DAT_21 */
49 553 0x10000 /* DISP1_DAT_20 */ 48 553 0x10000 /* DISP1_DAT_20 */
50 558 0x10000 /* DISP1_DAT_19 */ 49 558 0x10000 /* DISP1_DAT_19 */
51 564 0x10000 /* DISP1_DAT_18 */ 50 564 0x10000 /* DISP1_DAT_18 */
diff --git a/arch/arm/boot/dts/kirkwood-dns320.dts b/arch/arm/boot/dts/kirkwood-dns320.dts
index 5bb0bf39d3b8..c9c44b2f62d7 100644
--- a/arch/arm/boot/dts/kirkwood-dns320.dts
+++ b/arch/arm/boot/dts/kirkwood-dns320.dts
@@ -42,12 +42,10 @@
42 42
43 ocp@f1000000 { 43 ocp@f1000000 {
44 serial@12000 { 44 serial@12000 {
45 clock-frequency = <166666667>;
46 status = "okay"; 45 status = "okay";
47 }; 46 };
48 47
49 serial@12100 { 48 serial@12100 {
50 clock-frequency = <166666667>;
51 status = "okay"; 49 status = "okay";
52 }; 50 };
53 }; 51 };
diff --git a/arch/arm/boot/dts/kirkwood-dns325.dts b/arch/arm/boot/dts/kirkwood-dns325.dts
index d430713ea9b9..e4e4930dc5cf 100644
--- a/arch/arm/boot/dts/kirkwood-dns325.dts
+++ b/arch/arm/boot/dts/kirkwood-dns325.dts
@@ -50,7 +50,6 @@
50 }; 50 };
51 }; 51 };
52 serial@12000 { 52 serial@12000 {
53 clock-frequency = <200000000>;
54 status = "okay"; 53 status = "okay";
55 }; 54 };
56 }; 55 };
diff --git a/arch/arm/boot/dts/kirkwood-dockstar.dts b/arch/arm/boot/dts/kirkwood-dockstar.dts
index 2e3dd34e21a5..0196cf6b0ef2 100644
--- a/arch/arm/boot/dts/kirkwood-dockstar.dts
+++ b/arch/arm/boot/dts/kirkwood-dockstar.dts
@@ -37,7 +37,6 @@
37 }; 37 };
38 }; 38 };
39 serial@12000 { 39 serial@12000 {
40 clock-frequency = <200000000>;
41 status = "ok"; 40 status = "ok";
42 }; 41 };
43 42
diff --git a/arch/arm/boot/dts/kirkwood-dreamplug.dts b/arch/arm/boot/dts/kirkwood-dreamplug.dts
index ef2d8c705709..289e51d86372 100644
--- a/arch/arm/boot/dts/kirkwood-dreamplug.dts
+++ b/arch/arm/boot/dts/kirkwood-dreamplug.dts
@@ -38,7 +38,6 @@
38 }; 38 };
39 }; 39 };
40 serial@12000 { 40 serial@12000 {
41 clock-frequency = <200000000>;
42 status = "ok"; 41 status = "ok";
43 }; 42 };
44 43
diff --git a/arch/arm/boot/dts/kirkwood-goflexnet.dts b/arch/arm/boot/dts/kirkwood-goflexnet.dts
index 1b133e0c566e..bd83b8fc7c83 100644
--- a/arch/arm/boot/dts/kirkwood-goflexnet.dts
+++ b/arch/arm/boot/dts/kirkwood-goflexnet.dts
@@ -73,7 +73,6 @@
73 }; 73 };
74 }; 74 };
75 serial@12000 { 75 serial@12000 {
76 clock-frequency = <200000000>;
77 status = "ok"; 76 status = "ok";
78 }; 77 };
79 78
diff --git a/arch/arm/boot/dts/kirkwood-ib62x0.dts b/arch/arm/boot/dts/kirkwood-ib62x0.dts
index 71902da33d63..5335b1aa8601 100644
--- a/arch/arm/boot/dts/kirkwood-ib62x0.dts
+++ b/arch/arm/boot/dts/kirkwood-ib62x0.dts
@@ -51,7 +51,6 @@
51 }; 51 };
52 }; 52 };
53 serial@12000 { 53 serial@12000 {
54 clock-frequency = <200000000>;
55 status = "okay"; 54 status = "okay";
56 }; 55 };
57 56
diff --git a/arch/arm/boot/dts/kirkwood-iconnect.dts b/arch/arm/boot/dts/kirkwood-iconnect.dts
index 504f16be8b54..12ccf74ac3c4 100644
--- a/arch/arm/boot/dts/kirkwood-iconnect.dts
+++ b/arch/arm/boot/dts/kirkwood-iconnect.dts
@@ -78,7 +78,6 @@
78 }; 78 };
79 }; 79 };
80 serial@12000 { 80 serial@12000 {
81 clock-frequency = <200000000>;
82 status = "ok"; 81 status = "ok";
83 }; 82 };
84 83
diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
index 6cae4599c4b3..93c3afbef9ee 100644
--- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
+++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
@@ -115,7 +115,6 @@
115 }; 115 };
116 116
117 serial@12000 { 117 serial@12000 {
118 clock-frequency = <200000000>;
119 status = "ok"; 118 status = "ok";
120 }; 119 };
121 120
diff --git a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
index 8db3123ac80f..5bbd0542cdd3 100644
--- a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
+++ b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts
@@ -34,7 +34,6 @@
34 }; 34 };
35 35
36 serial@12000 { 36 serial@12000 {
37 clock-frequency = <200000000>;
38 status = "ok"; 37 status = "ok";
39 }; 38 };
40 39
diff --git a/arch/arm/boot/dts/kirkwood-lschlv2.dts b/arch/arm/boot/dts/kirkwood-lschlv2.dts
index 9510c9ea666c..9f55d95f35f5 100644
--- a/arch/arm/boot/dts/kirkwood-lschlv2.dts
+++ b/arch/arm/boot/dts/kirkwood-lschlv2.dts
@@ -13,7 +13,6 @@
13 13
14 ocp@f1000000 { 14 ocp@f1000000 {
15 serial@12000 { 15 serial@12000 {
16 clock-frequency = <166666667>;
17 status = "okay"; 16 status = "okay";
18 }; 17 };
19 }; 18 };
diff --git a/arch/arm/boot/dts/kirkwood-lsxhl.dts b/arch/arm/boot/dts/kirkwood-lsxhl.dts
index 739019c4cba9..5c84c118ed8d 100644
--- a/arch/arm/boot/dts/kirkwood-lsxhl.dts
+++ b/arch/arm/boot/dts/kirkwood-lsxhl.dts
@@ -13,7 +13,6 @@
13 13
14 ocp@f1000000 { 14 ocp@f1000000 {
15 serial@12000 { 15 serial@12000 {
16 clock-frequency = <200000000>;
17 status = "okay"; 16 status = "okay";
18 }; 17 };
19 }; 18 };
diff --git a/arch/arm/boot/dts/kirkwood-mplcec4.dts b/arch/arm/boot/dts/kirkwood-mplcec4.dts
index 662dfd81b1ce..758824118a9a 100644
--- a/arch/arm/boot/dts/kirkwood-mplcec4.dts
+++ b/arch/arm/boot/dts/kirkwood-mplcec4.dts
@@ -90,7 +90,6 @@
90 }; 90 };
91 91
92 serial@12000 { 92 serial@12000 {
93 clock-frequency = <200000000>;
94 status = "ok"; 93 status = "ok";
95 }; 94 };
96 95
diff --git a/arch/arm/boot/dts/kirkwood-ns2-common.dtsi b/arch/arm/boot/dts/kirkwood-ns2-common.dtsi
index e8e7ecef1650..6affd924fe11 100644
--- a/arch/arm/boot/dts/kirkwood-ns2-common.dtsi
+++ b/arch/arm/boot/dts/kirkwood-ns2-common.dtsi
@@ -23,7 +23,6 @@
23 }; 23 };
24 24
25 serial@12000 { 25 serial@12000 {
26 clock-frequency = <166666667>;
27 status = "okay"; 26 status = "okay";
28 }; 27 };
29 28
diff --git a/arch/arm/boot/dts/kirkwood-nsa310.dts b/arch/arm/boot/dts/kirkwood-nsa310.dts
index 3a178cf708d7..a7412b937a8a 100644
--- a/arch/arm/boot/dts/kirkwood-nsa310.dts
+++ b/arch/arm/boot/dts/kirkwood-nsa310.dts
@@ -117,7 +117,6 @@
117 }; 117 };
118 118
119 serial@12000 { 119 serial@12000 {
120 clock-frequency = <200000000>;
121 status = "ok"; 120 status = "ok";
122 }; 121 };
123 122
diff --git a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
index ede7fe0d7a87..d27f7245f8e7 100644
--- a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
+++ b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts
@@ -18,12 +18,10 @@
18 18
19 ocp@f1000000 { 19 ocp@f1000000 {
20 serial@12000 { 20 serial@12000 {
21 clock-frequency = <200000000>;
22 status = "ok"; 21 status = "ok";
23 }; 22 };
24 23
25 serial@12100 { 24 serial@12100 {
26 clock-frequency = <200000000>;
27 status = "ok"; 25 status = "ok";
28 }; 26 };
29 27
diff --git a/arch/arm/boot/dts/kirkwood-topkick.dts b/arch/arm/boot/dts/kirkwood-topkick.dts
index 842ff95d60df..66eb45b00b25 100644
--- a/arch/arm/boot/dts/kirkwood-topkick.dts
+++ b/arch/arm/boot/dts/kirkwood-topkick.dts
@@ -108,7 +108,6 @@
108 }; 108 };
109 109
110 serial@12000 { 110 serial@12000 {
111 clock-frequency = <200000000>;
112 status = "ok"; 111 status = "ok";
113 }; 112 };
114 113
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 2c738d9dc82a..fada7e6d24d8 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -38,6 +38,7 @@
38 interrupt-controller; 38 interrupt-controller;
39 #interrupt-cells = <2>; 39 #interrupt-cells = <2>;
40 interrupts = <35>, <36>, <37>, <38>; 40 interrupts = <35>, <36>, <37>, <38>;
41 clocks = <&gate_clk 7>;
41 }; 42 };
42 43
43 gpio1: gpio@10140 { 44 gpio1: gpio@10140 {
@@ -49,6 +50,7 @@
49 interrupt-controller; 50 interrupt-controller;
50 #interrupt-cells = <2>; 51 #interrupt-cells = <2>;
51 interrupts = <39>, <40>, <41>; 52 interrupts = <39>, <40>, <41>;
53 clocks = <&gate_clk 7>;
52 }; 54 };
53 55
54 serial@12000 { 56 serial@12000 {
@@ -57,7 +59,6 @@
57 reg-shift = <2>; 59 reg-shift = <2>;
58 interrupts = <33>; 60 interrupts = <33>;
59 clocks = <&gate_clk 7>; 61 clocks = <&gate_clk 7>;
60 /* set clock-frequency in board dts */
61 status = "disabled"; 62 status = "disabled";
62 }; 63 };
63 64
@@ -67,7 +68,6 @@
67 reg-shift = <2>; 68 reg-shift = <2>;
68 interrupts = <34>; 69 interrupts = <34>;
69 clocks = <&gate_clk 7>; 70 clocks = <&gate_clk 7>;
70 /* set clock-frequency in board dts */
71 status = "disabled"; 71 status = "disabled";
72 }; 72 };
73 73
@@ -75,6 +75,7 @@
75 compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc"; 75 compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
76 reg = <0x10300 0x20>; 76 reg = <0x10300 0x20>;
77 interrupts = <53>; 77 interrupts = <53>;
78 clocks = <&gate_clk 7>;
78 }; 79 };
79 80
80 spi@10600 { 81 spi@10600 {
diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
index 5a3a58b7e18f..0077fc8510b7 100644
--- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
+++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
@@ -11,7 +11,7 @@
11 11
12/ { 12/ {
13 model = "LaCie Ethernet Disk mini V2"; 13 model = "LaCie Ethernet Disk mini V2";
14 compatible = "lacie,ethernet-disk-mini-v2", "marvell-orion5x-88f5182", "marvell,orion5x"; 14 compatible = "lacie,ethernet-disk-mini-v2", "marvell,orion5x-88f5182", "marvell,orion5x";
15 15
16 memory { 16 memory {
17 reg = <0x00000000 0x4000000>; /* 64 MB */ 17 reg = <0x00000000 0x4000000>; /* 64 MB */
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 936d2306e7e1..7e8769bd5977 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -75,6 +75,9 @@
75 compatible = "arm,pl330", "arm,primecell"; 75 compatible = "arm,pl330", "arm,primecell";
76 reg = <0xffe01000 0x1000>; 76 reg = <0xffe01000 0x1000>;
77 interrupts = <0 180 4>; 77 interrupts = <0 180 4>;
78 #dma-cells = <1>;
79 #dma-channels = <8>;
80 #dma-requests = <32>;
78 }; 81 };
79 }; 82 };
80 83
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 9a428931d042..48d00a099ce3 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -118,6 +118,7 @@
118 compatible = "arm,cortex-a9-twd-timer"; 118 compatible = "arm,cortex-a9-twd-timer";
119 reg = <0x50040600 0x20>; 119 reg = <0x50040600 0x20>;
120 interrupts = <1 13 0x304>; 120 interrupts = <1 13 0x304>;
121 clocks = <&tegra_car 132>;
121 }; 122 };
122 123
123 intc: interrupt-controller { 124 intc: interrupt-controller {
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 767803e1fd55..9d87a3ffe998 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -119,6 +119,7 @@
119 compatible = "arm,cortex-a9-twd-timer"; 119 compatible = "arm,cortex-a9-twd-timer";
120 reg = <0x50040600 0x20>; 120 reg = <0x50040600 0x20>;
121 interrupts = <1 13 0xf04>; 121 interrupts = <1 13 0xf04>;
122 clocks = <&tegra_car 214>;
122 }; 123 };
123 124
124 intc: interrupt-controller { 125 intc: interrupt-controller {
diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig
index fbbc5bb022d5..6a99e30f81d2 100644
--- a/arch/arm/configs/mxs_defconfig
+++ b/arch/arm/configs/mxs_defconfig
@@ -116,6 +116,7 @@ CONFIG_SND_SOC=y
116CONFIG_SND_MXS_SOC=y 116CONFIG_SND_MXS_SOC=y
117CONFIG_SND_SOC_MXS_SGTL5000=y 117CONFIG_SND_SOC_MXS_SGTL5000=y
118CONFIG_USB=y 118CONFIG_USB=y
119CONFIG_USB_EHCI_HCD=y
119CONFIG_USB_CHIPIDEA=y 120CONFIG_USB_CHIPIDEA=y
120CONFIG_USB_CHIPIDEA_HOST=y 121CONFIG_USB_CHIPIDEA_HOST=y
121CONFIG_USB_STORAGE=y 122CONFIG_USB_STORAGE=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index b16bae2c9a60..bd07864f14a0 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -126,6 +126,8 @@ CONFIG_INPUT_MISC=y
126CONFIG_INPUT_TWL4030_PWRBUTTON=y 126CONFIG_INPUT_TWL4030_PWRBUTTON=y
127CONFIG_VT_HW_CONSOLE_BINDING=y 127CONFIG_VT_HW_CONSOLE_BINDING=y
128# CONFIG_LEGACY_PTYS is not set 128# CONFIG_LEGACY_PTYS is not set
129CONFIG_SERIAL_8250=y
130CONFIG_SERIAL_8250_CONSOLE=y
129CONFIG_SERIAL_8250_NR_UARTS=32 131CONFIG_SERIAL_8250_NR_UARTS=32
130CONFIG_SERIAL_8250_EXTENDED=y 132CONFIG_SERIAL_8250_EXTENDED=y
131CONFIG_SERIAL_8250_MANY_PORTS=y 133CONFIG_SERIAL_8250_MANY_PORTS=y
diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h
index 9f77e7804f3b..e3d55547e755 100644
--- a/arch/arm/include/asm/mmu.h
+++ b/arch/arm/include/asm/mmu.h
@@ -5,15 +5,15 @@
5 5
6typedef struct { 6typedef struct {
7#ifdef CONFIG_CPU_HAS_ASID 7#ifdef CONFIG_CPU_HAS_ASID
8 u64 id; 8 atomic64_t id;
9#endif 9#endif
10 unsigned int vmalloc_seq; 10 unsigned int vmalloc_seq;
11} mm_context_t; 11} mm_context_t;
12 12
13#ifdef CONFIG_CPU_HAS_ASID 13#ifdef CONFIG_CPU_HAS_ASID
14#define ASID_BITS 8 14#define ASID_BITS 8
15#define ASID_MASK ((~0ULL) << ASID_BITS) 15#define ASID_MASK ((~0ULL) << ASID_BITS)
16#define ASID(mm) ((mm)->context.id & ~ASID_MASK) 16#define ASID(mm) ((mm)->context.id.counter & ~ASID_MASK)
17#else 17#else
18#define ASID(mm) (0) 18#define ASID(mm) (0)
19#endif 19#endif
@@ -26,7 +26,7 @@ typedef struct {
26 * modified for 2.6 by Hyok S. Choi <hyok.choi@samsung.com> 26 * modified for 2.6 by Hyok S. Choi <hyok.choi@samsung.com>
27 */ 27 */
28typedef struct { 28typedef struct {
29 unsigned long end_brk; 29 unsigned long end_brk;
30} mm_context_t; 30} mm_context_t;
31 31
32#endif 32#endif
diff --git a/arch/arm/include/asm/mmu_context.h b/arch/arm/include/asm/mmu_context.h
index e1f644bc7cc5..863a6611323c 100644
--- a/arch/arm/include/asm/mmu_context.h
+++ b/arch/arm/include/asm/mmu_context.h
@@ -25,7 +25,7 @@ void __check_vmalloc_seq(struct mm_struct *mm);
25#ifdef CONFIG_CPU_HAS_ASID 25#ifdef CONFIG_CPU_HAS_ASID
26 26
27void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk); 27void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk);
28#define init_new_context(tsk,mm) ({ mm->context.id = 0; }) 28#define init_new_context(tsk,mm) ({ atomic64_set(&mm->context.id, 0); 0; })
29 29
30#else /* !CONFIG_CPU_HAS_ASID */ 30#else /* !CONFIG_CPU_HAS_ASID */
31 31
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index 6e924d3a77eb..4db8c8820f0d 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -34,10 +34,13 @@
34#define TLB_V6_D_ASID (1 << 17) 34#define TLB_V6_D_ASID (1 << 17)
35#define TLB_V6_I_ASID (1 << 18) 35#define TLB_V6_I_ASID (1 << 18)
36 36
37#define TLB_V6_BP (1 << 19)
38
37/* Unified Inner Shareable TLB operations (ARMv7 MP extensions) */ 39/* Unified Inner Shareable TLB operations (ARMv7 MP extensions) */
38#define TLB_V7_UIS_PAGE (1 << 19) 40#define TLB_V7_UIS_PAGE (1 << 20)
39#define TLB_V7_UIS_FULL (1 << 20) 41#define TLB_V7_UIS_FULL (1 << 21)
40#define TLB_V7_UIS_ASID (1 << 21) 42#define TLB_V7_UIS_ASID (1 << 22)
43#define TLB_V7_UIS_BP (1 << 23)
41 44
42#define TLB_BARRIER (1 << 28) 45#define TLB_BARRIER (1 << 28)
43#define TLB_L2CLEAN_FR (1 << 29) /* Feroceon */ 46#define TLB_L2CLEAN_FR (1 << 29) /* Feroceon */
@@ -150,7 +153,8 @@
150#define v6wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \ 153#define v6wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \
151 TLB_V6_I_FULL | TLB_V6_D_FULL | \ 154 TLB_V6_I_FULL | TLB_V6_D_FULL | \
152 TLB_V6_I_PAGE | TLB_V6_D_PAGE | \ 155 TLB_V6_I_PAGE | TLB_V6_D_PAGE | \
153 TLB_V6_I_ASID | TLB_V6_D_ASID) 156 TLB_V6_I_ASID | TLB_V6_D_ASID | \
157 TLB_V6_BP)
154 158
155#ifdef CONFIG_CPU_TLB_V6 159#ifdef CONFIG_CPU_TLB_V6
156# define v6wbi_possible_flags v6wbi_tlb_flags 160# define v6wbi_possible_flags v6wbi_tlb_flags
@@ -166,9 +170,11 @@
166#endif 170#endif
167 171
168#define v7wbi_tlb_flags_smp (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \ 172#define v7wbi_tlb_flags_smp (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \
169 TLB_V7_UIS_FULL | TLB_V7_UIS_PAGE | TLB_V7_UIS_ASID) 173 TLB_V7_UIS_FULL | TLB_V7_UIS_PAGE | \
174 TLB_V7_UIS_ASID | TLB_V7_UIS_BP)
170#define v7wbi_tlb_flags_up (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \ 175#define v7wbi_tlb_flags_up (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \
171 TLB_V6_U_FULL | TLB_V6_U_PAGE | TLB_V6_U_ASID) 176 TLB_V6_U_FULL | TLB_V6_U_PAGE | \
177 TLB_V6_U_ASID | TLB_V6_BP)
172 178
173#ifdef CONFIG_CPU_TLB_V7 179#ifdef CONFIG_CPU_TLB_V7
174 180
@@ -430,6 +436,20 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
430 } 436 }
431} 437}
432 438
439static inline void local_flush_bp_all(void)
440{
441 const int zero = 0;
442 const unsigned int __tlb_flag = __cpu_tlb_flags;
443
444 if (tlb_flag(TLB_V7_UIS_BP))
445 asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero));
446 else if (tlb_flag(TLB_V6_BP))
447 asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero));
448
449 if (tlb_flag(TLB_BARRIER))
450 isb();
451}
452
433/* 453/*
434 * flush_pmd_entry 454 * flush_pmd_entry
435 * 455 *
@@ -480,6 +500,7 @@ static inline void clean_pmd_entry(void *pmd)
480#define flush_tlb_kernel_page local_flush_tlb_kernel_page 500#define flush_tlb_kernel_page local_flush_tlb_kernel_page
481#define flush_tlb_range local_flush_tlb_range 501#define flush_tlb_range local_flush_tlb_range
482#define flush_tlb_kernel_range local_flush_tlb_kernel_range 502#define flush_tlb_kernel_range local_flush_tlb_kernel_range
503#define flush_bp_all local_flush_bp_all
483#else 504#else
484extern void flush_tlb_all(void); 505extern void flush_tlb_all(void);
485extern void flush_tlb_mm(struct mm_struct *mm); 506extern void flush_tlb_mm(struct mm_struct *mm);
@@ -487,6 +508,7 @@ extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr);
487extern void flush_tlb_kernel_page(unsigned long kaddr); 508extern void flush_tlb_kernel_page(unsigned long kaddr);
488extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); 509extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end);
489extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); 510extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
511extern void flush_bp_all(void);
490#endif 512#endif
491 513
492/* 514/*
diff --git a/arch/arm/include/uapi/asm/unistd.h b/arch/arm/include/uapi/asm/unistd.h
index 4da7cde70b5d..af33b44990ed 100644
--- a/arch/arm/include/uapi/asm/unistd.h
+++ b/arch/arm/include/uapi/asm/unistd.h
@@ -404,7 +404,7 @@
404#define __NR_setns (__NR_SYSCALL_BASE+375) 404#define __NR_setns (__NR_SYSCALL_BASE+375)
405#define __NR_process_vm_readv (__NR_SYSCALL_BASE+376) 405#define __NR_process_vm_readv (__NR_SYSCALL_BASE+376)
406#define __NR_process_vm_writev (__NR_SYSCALL_BASE+377) 406#define __NR_process_vm_writev (__NR_SYSCALL_BASE+377)
407 /* 378 for kcmp */ 407#define __NR_kcmp (__NR_SYSCALL_BASE+378)
408#define __NR_finit_module (__NR_SYSCALL_BASE+379) 408#define __NR_finit_module (__NR_SYSCALL_BASE+379)
409 409
410/* 410/*
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c
index 5ce738b43508..923eec7105cf 100644
--- a/arch/arm/kernel/asm-offsets.c
+++ b/arch/arm/kernel/asm-offsets.c
@@ -110,7 +110,7 @@ int main(void)
110 BLANK(); 110 BLANK();
111#endif 111#endif
112#ifdef CONFIG_CPU_HAS_ASID 112#ifdef CONFIG_CPU_HAS_ASID
113 DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id)); 113 DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id.counter));
114 BLANK(); 114 BLANK();
115#endif 115#endif
116 DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm)); 116 DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 0cc57611fc4f..c6ca7e376773 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -387,7 +387,7 @@
387/* 375 */ CALL(sys_setns) 387/* 375 */ CALL(sys_setns)
388 CALL(sys_process_vm_readv) 388 CALL(sys_process_vm_readv)
389 CALL(sys_process_vm_writev) 389 CALL(sys_process_vm_writev)
390 CALL(sys_ni_syscall) /* reserved for sys_kcmp */ 390 CALL(sys_kcmp)
391 CALL(sys_finit_module) 391 CALL(sys_finit_module)
392#ifndef syscalls_counted 392#ifndef syscalls_counted
393.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls 393.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 486a15ae9011..e0eb9a1cae77 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -184,13 +184,22 @@ __create_page_tables:
184 orr r3, r3, #3 @ PGD block type 184 orr r3, r3, #3 @ PGD block type
185 mov r6, #4 @ PTRS_PER_PGD 185 mov r6, #4 @ PTRS_PER_PGD
186 mov r7, #1 << (55 - 32) @ L_PGD_SWAPPER 186 mov r7, #1 << (55 - 32) @ L_PGD_SWAPPER
1871: str r3, [r0], #4 @ set bottom PGD entry bits 1871:
188#ifdef CONFIG_CPU_ENDIAN_BE8
188 str r7, [r0], #4 @ set top PGD entry bits 189 str r7, [r0], #4 @ set top PGD entry bits
190 str r3, [r0], #4 @ set bottom PGD entry bits
191#else
192 str r3, [r0], #4 @ set bottom PGD entry bits
193 str r7, [r0], #4 @ set top PGD entry bits
194#endif
189 add r3, r3, #0x1000 @ next PMD table 195 add r3, r3, #0x1000 @ next PMD table
190 subs r6, r6, #1 196 subs r6, r6, #1
191 bne 1b 197 bne 1b
192 198
193 add r4, r4, #0x1000 @ point to the PMD tables 199 add r4, r4, #0x1000 @ point to the PMD tables
200#ifdef CONFIG_CPU_ENDIAN_BE8
201 add r4, r4, #4 @ we only write the bottom word
202#endif
194#endif 203#endif
195 204
196 ldr r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags 205 ldr r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags
@@ -258,6 +267,11 @@ __create_page_tables:
258 addne r6, r6, #1 << SECTION_SHIFT 267 addne r6, r6, #1 << SECTION_SHIFT
259 strne r6, [r3] 268 strne r6, [r3]
260 269
270#if defined(CONFIG_LPAE) && defined(CONFIG_CPU_ENDIAN_BE8)
271 sub r4, r4, #4 @ Fixup page table pointer
272 @ for 64-bit descriptors
273#endif
274
261#ifdef CONFIG_DEBUG_LL 275#ifdef CONFIG_DEBUG_LL
262#if !defined(CONFIG_DEBUG_ICEDCC) && !defined(CONFIG_DEBUG_SEMIHOSTING) 276#if !defined(CONFIG_DEBUG_ICEDCC) && !defined(CONFIG_DEBUG_SEMIHOSTING)
263 /* 277 /*
@@ -276,13 +290,17 @@ __create_page_tables:
276 orr r3, r7, r3, lsl #SECTION_SHIFT 290 orr r3, r7, r3, lsl #SECTION_SHIFT
277#ifdef CONFIG_ARM_LPAE 291#ifdef CONFIG_ARM_LPAE
278 mov r7, #1 << (54 - 32) @ XN 292 mov r7, #1 << (54 - 32) @ XN
293#ifdef CONFIG_CPU_ENDIAN_BE8
294 str r7, [r0], #4
295 str r3, [r0], #4
279#else 296#else
280 orr r3, r3, #PMD_SECT_XN
281#endif
282 str r3, [r0], #4 297 str r3, [r0], #4
283#ifdef CONFIG_ARM_LPAE
284 str r7, [r0], #4 298 str r7, [r0], #4
285#endif 299#endif
300#else
301 orr r3, r3, #PMD_SECT_XN
302 str r3, [r0], #4
303#endif
286 304
287#else /* CONFIG_DEBUG_ICEDCC || CONFIG_DEBUG_SEMIHOSTING */ 305#else /* CONFIG_DEBUG_ICEDCC || CONFIG_DEBUG_SEMIHOSTING */
288 /* we don't need any serial debugging mappings */ 306 /* we don't need any serial debugging mappings */
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 5eae53e7a2e1..96093b75ab90 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -1023,7 +1023,7 @@ out_mdbgen:
1023static int __cpuinit dbg_reset_notify(struct notifier_block *self, 1023static int __cpuinit dbg_reset_notify(struct notifier_block *self,
1024 unsigned long action, void *cpu) 1024 unsigned long action, void *cpu)
1025{ 1025{
1026 if (action == CPU_ONLINE) 1026 if ((action & ~CPU_TASKS_FROZEN) == CPU_ONLINE)
1027 smp_call_function_single((int)cpu, reset_ctrl_regs, NULL, 1); 1027 smp_call_function_single((int)cpu, reset_ctrl_regs, NULL, 1);
1028 1028
1029 return NOTIFY_OK; 1029 return NOTIFY_OK;
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 31e0eb353cd8..146157dfe27c 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -400,7 +400,7 @@ __hw_perf_event_init(struct perf_event *event)
400 } 400 }
401 401
402 if (event->group_leader != event) { 402 if (event->group_leader != event) {
403 if (validate_group(event) != 0); 403 if (validate_group(event) != 0)
404 return -EINVAL; 404 return -EINVAL;
405 } 405 }
406 406
@@ -484,7 +484,7 @@ const struct dev_pm_ops armpmu_dev_pm_ops = {
484 SET_RUNTIME_PM_OPS(armpmu_runtime_suspend, armpmu_runtime_resume, NULL) 484 SET_RUNTIME_PM_OPS(armpmu_runtime_suspend, armpmu_runtime_resume, NULL)
485}; 485};
486 486
487static void __init armpmu_init(struct arm_pmu *armpmu) 487static void armpmu_init(struct arm_pmu *armpmu)
488{ 488{
489 atomic_set(&armpmu->active_events, 0); 489 atomic_set(&armpmu->active_events, 0);
490 mutex_init(&armpmu->reserve_mutex); 490 mutex_init(&armpmu->reserve_mutex);
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 8c79a9e70b83..039cffb053a7 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -774,7 +774,7 @@ static const unsigned armv7_a7_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
774/* 774/*
775 * PMXEVTYPER: Event selection reg 775 * PMXEVTYPER: Event selection reg
776 */ 776 */
777#define ARMV7_EVTYPE_MASK 0xc00000ff /* Mask for writable bits */ 777#define ARMV7_EVTYPE_MASK 0xc80000ff /* Mask for writable bits */
778#define ARMV7_EVTYPE_EVENT 0xff /* Mask for EVENT bits */ 778#define ARMV7_EVTYPE_EVENT 0xff /* Mask for EVENT bits */
779 779
780/* 780/*
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 1bdfd87c8e41..31644f1978d5 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -285,6 +285,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
285 * switch away from it before attempting any exclusive accesses. 285 * switch away from it before attempting any exclusive accesses.
286 */ 286 */
287 cpu_switch_mm(mm->pgd, mm); 287 cpu_switch_mm(mm->pgd, mm);
288 local_flush_bp_all();
288 enter_lazy_tlb(mm, current); 289 enter_lazy_tlb(mm, current);
289 local_flush_tlb_all(); 290 local_flush_tlb_all();
290 291
diff --git a/arch/arm/kernel/smp_tlb.c b/arch/arm/kernel/smp_tlb.c
index 02c5d2ce23bf..bd0300531399 100644
--- a/arch/arm/kernel/smp_tlb.c
+++ b/arch/arm/kernel/smp_tlb.c
@@ -64,6 +64,11 @@ static inline void ipi_flush_tlb_kernel_range(void *arg)
64 local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end); 64 local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end);
65} 65}
66 66
67static inline void ipi_flush_bp_all(void *ignored)
68{
69 local_flush_bp_all();
70}
71
67void flush_tlb_all(void) 72void flush_tlb_all(void)
68{ 73{
69 if (tlb_ops_need_broadcast()) 74 if (tlb_ops_need_broadcast())
@@ -127,3 +132,10 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end)
127 local_flush_tlb_kernel_range(start, end); 132 local_flush_tlb_kernel_range(start, end);
128} 133}
129 134
135void flush_bp_all(void)
136{
137 if (tlb_ops_need_broadcast())
138 on_each_cpu(ipi_flush_bp_all, NULL, 1);
139 else
140 local_flush_bp_all();
141}
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index c092115d903a..3f2565037480 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -22,6 +22,7 @@
22#include <linux/of_irq.h> 22#include <linux/of_irq.h>
23#include <linux/of_address.h> 23#include <linux/of_address.h>
24 24
25#include <asm/smp_plat.h>
25#include <asm/smp_twd.h> 26#include <asm/smp_twd.h>
26#include <asm/localtimer.h> 27#include <asm/localtimer.h>
27 28
@@ -373,6 +374,9 @@ void __init twd_local_timer_of_register(void)
373 struct device_node *np; 374 struct device_node *np;
374 int err; 375 int err;
375 376
377 if (!is_smp() || !setup_max_cpus)
378 return;
379
376 np = of_find_matching_node(NULL, twd_of_match); 380 np = of_find_matching_node(NULL, twd_of_match);
377 if (!np) 381 if (!np)
378 return; 382 return;
diff --git a/arch/arm/kernel/suspend.c b/arch/arm/kernel/suspend.c
index 358bca3a995e..c59c97ea8268 100644
--- a/arch/arm/kernel/suspend.c
+++ b/arch/arm/kernel/suspend.c
@@ -68,6 +68,7 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
68 ret = __cpu_suspend(arg, fn); 68 ret = __cpu_suspend(arg, fn);
69 if (ret == 0) { 69 if (ret == 0) {
70 cpu_switch_mm(mm->pgd, mm); 70 cpu_switch_mm(mm->pgd, mm);
71 local_flush_bp_all();
71 local_flush_tlb_all(); 72 local_flush_tlb_all();
72 } 73 }
73 74
diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S
index 650d5923ab83..d912e7397ecc 100644
--- a/arch/arm/lib/memset.S
+++ b/arch/arm/lib/memset.S
@@ -19,9 +19,9 @@
191: subs r2, r2, #4 @ 1 do we have enough 191: subs r2, r2, #4 @ 1 do we have enough
20 blt 5f @ 1 bytes to align with? 20 blt 5f @ 1 bytes to align with?
21 cmp r3, #2 @ 1 21 cmp r3, #2 @ 1
22 strltb r1, [r0], #1 @ 1 22 strltb r1, [ip], #1 @ 1
23 strleb r1, [r0], #1 @ 1 23 strleb r1, [ip], #1 @ 1
24 strb r1, [r0], #1 @ 1 24 strb r1, [ip], #1 @ 1
25 add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3)) 25 add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
26/* 26/*
27 * The pointer is now aligned and the length is adjusted. Try doing the 27 * The pointer is now aligned and the length is adjusted. Try doing the
@@ -29,10 +29,14 @@
29 */ 29 */
30 30
31ENTRY(memset) 31ENTRY(memset)
32 ands r3, r0, #3 @ 1 unaligned? 32/*
33 * Preserve the contents of r0 for the return value.
34 */
35 mov ip, r0
36 ands r3, ip, #3 @ 1 unaligned?
33 bne 1b @ 1 37 bne 1b @ 1
34/* 38/*
35 * we know that the pointer in r0 is aligned to a word boundary. 39 * we know that the pointer in ip is aligned to a word boundary.
36 */ 40 */
37 orr r1, r1, r1, lsl #8 41 orr r1, r1, r1, lsl #8
38 orr r1, r1, r1, lsl #16 42 orr r1, r1, r1, lsl #16
@@ -43,29 +47,28 @@ ENTRY(memset)
43#if ! CALGN(1)+0 47#if ! CALGN(1)+0
44 48
45/* 49/*
46 * We need an extra register for this loop - save the return address and 50 * We need 2 extra registers for this loop - use r8 and the LR
47 * use the LR
48 */ 51 */
49 str lr, [sp, #-4]! 52 stmfd sp!, {r8, lr}
50 mov ip, r1 53 mov r8, r1
51 mov lr, r1 54 mov lr, r1
52 55
532: subs r2, r2, #64 562: subs r2, r2, #64
54 stmgeia r0!, {r1, r3, ip, lr} @ 64 bytes at a time. 57 stmgeia ip!, {r1, r3, r8, lr} @ 64 bytes at a time.
55 stmgeia r0!, {r1, r3, ip, lr} 58 stmgeia ip!, {r1, r3, r8, lr}
56 stmgeia r0!, {r1, r3, ip, lr} 59 stmgeia ip!, {r1, r3, r8, lr}
57 stmgeia r0!, {r1, r3, ip, lr} 60 stmgeia ip!, {r1, r3, r8, lr}
58 bgt 2b 61 bgt 2b
59 ldmeqfd sp!, {pc} @ Now <64 bytes to go. 62 ldmeqfd sp!, {r8, pc} @ Now <64 bytes to go.
60/* 63/*
61 * No need to correct the count; we're only testing bits from now on 64 * No need to correct the count; we're only testing bits from now on
62 */ 65 */
63 tst r2, #32 66 tst r2, #32
64 stmneia r0!, {r1, r3, ip, lr} 67 stmneia ip!, {r1, r3, r8, lr}
65 stmneia r0!, {r1, r3, ip, lr} 68 stmneia ip!, {r1, r3, r8, lr}
66 tst r2, #16 69 tst r2, #16
67 stmneia r0!, {r1, r3, ip, lr} 70 stmneia ip!, {r1, r3, r8, lr}
68 ldr lr, [sp], #4 71 ldmfd sp!, {r8, lr}
69 72
70#else 73#else
71 74
@@ -74,54 +77,54 @@ ENTRY(memset)
74 * whole cache lines at once. 77 * whole cache lines at once.
75 */ 78 */
76 79
77 stmfd sp!, {r4-r7, lr} 80 stmfd sp!, {r4-r8, lr}
78 mov r4, r1 81 mov r4, r1
79 mov r5, r1 82 mov r5, r1
80 mov r6, r1 83 mov r6, r1
81 mov r7, r1 84 mov r7, r1
82 mov ip, r1 85 mov r8, r1
83 mov lr, r1 86 mov lr, r1
84 87
85 cmp r2, #96 88 cmp r2, #96
86 tstgt r0, #31 89 tstgt ip, #31
87 ble 3f 90 ble 3f
88 91
89 and ip, r0, #31 92 and r8, ip, #31
90 rsb ip, ip, #32 93 rsb r8, r8, #32
91 sub r2, r2, ip 94 sub r2, r2, r8
92 movs ip, ip, lsl #(32 - 4) 95 movs r8, r8, lsl #(32 - 4)
93 stmcsia r0!, {r4, r5, r6, r7} 96 stmcsia ip!, {r4, r5, r6, r7}
94 stmmiia r0!, {r4, r5} 97 stmmiia ip!, {r4, r5}
95 tst ip, #(1 << 30) 98 tst r8, #(1 << 30)
96 mov ip, r1 99 mov r8, r1
97 strne r1, [r0], #4 100 strne r1, [ip], #4
98 101
993: subs r2, r2, #64 1023: subs r2, r2, #64
100 stmgeia r0!, {r1, r3-r7, ip, lr} 103 stmgeia ip!, {r1, r3-r8, lr}
101 stmgeia r0!, {r1, r3-r7, ip, lr} 104 stmgeia ip!, {r1, r3-r8, lr}
102 bgt 3b 105 bgt 3b
103 ldmeqfd sp!, {r4-r7, pc} 106 ldmeqfd sp!, {r4-r8, pc}
104 107
105 tst r2, #32 108 tst r2, #32
106 stmneia r0!, {r1, r3-r7, ip, lr} 109 stmneia ip!, {r1, r3-r8, lr}
107 tst r2, #16 110 tst r2, #16
108 stmneia r0!, {r4-r7} 111 stmneia ip!, {r4-r7}
109 ldmfd sp!, {r4-r7, lr} 112 ldmfd sp!, {r4-r8, lr}
110 113
111#endif 114#endif
112 115
1134: tst r2, #8 1164: tst r2, #8
114 stmneia r0!, {r1, r3} 117 stmneia ip!, {r1, r3}
115 tst r2, #4 118 tst r2, #4
116 strne r1, [r0], #4 119 strne r1, [ip], #4
117/* 120/*
118 * When we get here, we've got less than 4 bytes to zero. We 121 * When we get here, we've got less than 4 bytes to zero. We
119 * may have an unaligned pointer as well. 122 * may have an unaligned pointer as well.
120 */ 123 */
1215: tst r2, #2 1245: tst r2, #2
122 strneb r1, [r0], #1 125 strneb r1, [ip], #1
123 strneb r1, [r0], #1 126 strneb r1, [ip], #1
124 tst r2, #1 127 tst r2, #1
125 strneb r1, [r0], #1 128 strneb r1, [ip], #1
126 mov pc, lr 129 mov pc, lr
127ENDPROC(memset) 130ENDPROC(memset)
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index eed465ab0dd7..5fc23771c154 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -209,6 +209,14 @@ extern int at91_get_gpio_value(unsigned pin);
209extern void at91_gpio_suspend(void); 209extern void at91_gpio_suspend(void);
210extern void at91_gpio_resume(void); 210extern void at91_gpio_resume(void);
211 211
212#ifdef CONFIG_PINCTRL_AT91
213extern void at91_pinctrl_gpio_suspend(void);
214extern void at91_pinctrl_gpio_resume(void);
215#else
216static inline void at91_pinctrl_gpio_suspend(void) {}
217static inline void at91_pinctrl_gpio_resume(void) {}
218#endif
219
212#endif /* __ASSEMBLY__ */ 220#endif /* __ASSEMBLY__ */
213 221
214#endif 222#endif
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index 8e210262aeee..e0ca59171022 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -92,23 +92,21 @@ static int at91_aic_set_wake(struct irq_data *d, unsigned value)
92 92
93void at91_irq_suspend(void) 93void at91_irq_suspend(void)
94{ 94{
95 int i = 0, bit; 95 int bit = -1;
96 96
97 if (has_aic5()) { 97 if (has_aic5()) {
98 /* disable enabled irqs */ 98 /* disable enabled irqs */
99 while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) { 99 while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) {
100 at91_aic_write(AT91_AIC5_SSR, 100 at91_aic_write(AT91_AIC5_SSR,
101 bit & AT91_AIC5_INTSEL_MSK); 101 bit & AT91_AIC5_INTSEL_MSK);
102 at91_aic_write(AT91_AIC5_IDCR, 1); 102 at91_aic_write(AT91_AIC5_IDCR, 1);
103 i = bit;
104 } 103 }
105 /* enable wakeup irqs */ 104 /* enable wakeup irqs */
106 i = 0; 105 bit = -1;
107 while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) { 106 while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) {
108 at91_aic_write(AT91_AIC5_SSR, 107 at91_aic_write(AT91_AIC5_SSR,
109 bit & AT91_AIC5_INTSEL_MSK); 108 bit & AT91_AIC5_INTSEL_MSK);
110 at91_aic_write(AT91_AIC5_IECR, 1); 109 at91_aic_write(AT91_AIC5_IECR, 1);
111 i = bit;
112 } 110 }
113 } else { 111 } else {
114 at91_aic_write(AT91_AIC_IDCR, *backups); 112 at91_aic_write(AT91_AIC_IDCR, *backups);
@@ -118,23 +116,21 @@ void at91_irq_suspend(void)
118 116
119void at91_irq_resume(void) 117void at91_irq_resume(void)
120{ 118{
121 int i = 0, bit; 119 int bit = -1;
122 120
123 if (has_aic5()) { 121 if (has_aic5()) {
124 /* disable wakeup irqs */ 122 /* disable wakeup irqs */
125 while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) { 123 while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) {
126 at91_aic_write(AT91_AIC5_SSR, 124 at91_aic_write(AT91_AIC5_SSR,
127 bit & AT91_AIC5_INTSEL_MSK); 125 bit & AT91_AIC5_INTSEL_MSK);
128 at91_aic_write(AT91_AIC5_IDCR, 1); 126 at91_aic_write(AT91_AIC5_IDCR, 1);
129 i = bit;
130 } 127 }
131 /* enable irqs disabled for suspend */ 128 /* enable irqs disabled for suspend */
132 i = 0; 129 bit = -1;
133 while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) { 130 while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) {
134 at91_aic_write(AT91_AIC5_SSR, 131 at91_aic_write(AT91_AIC5_SSR,
135 bit & AT91_AIC5_INTSEL_MSK); 132 bit & AT91_AIC5_INTSEL_MSK);
136 at91_aic_write(AT91_AIC5_IECR, 1); 133 at91_aic_write(AT91_AIC5_IECR, 1);
137 i = bit;
138 } 134 }
139 } else { 135 } else {
140 at91_aic_write(AT91_AIC_IDCR, *wakeups); 136 at91_aic_write(AT91_AIC_IDCR, *wakeups);
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index adb6db888a1f..73f1f250403a 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -201,7 +201,10 @@ extern u32 at91_slow_clock_sz;
201 201
202static int at91_pm_enter(suspend_state_t state) 202static int at91_pm_enter(suspend_state_t state)
203{ 203{
204 at91_gpio_suspend(); 204 if (of_have_populated_dt())
205 at91_pinctrl_gpio_suspend();
206 else
207 at91_gpio_suspend();
205 at91_irq_suspend(); 208 at91_irq_suspend();
206 209
207 pr_debug("AT91: PM - wake mask %08x, pm state %d\n", 210 pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
@@ -286,7 +289,10 @@ static int at91_pm_enter(suspend_state_t state)
286error: 289error:
287 target_state = PM_SUSPEND_ON; 290 target_state = PM_SUSPEND_ON;
288 at91_irq_resume(); 291 at91_irq_resume();
289 at91_gpio_resume(); 292 if (of_have_populated_dt())
293 at91_pinctrl_gpio_resume();
294 else
295 at91_gpio_resume();
290 return 0; 296 return 0;
291} 297}
292 298
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c
index a685e9706b7b..45b7c71d9cc1 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/mach-davinci/dma.c
@@ -743,6 +743,9 @@ EXPORT_SYMBOL(edma_free_channel);
743 */ 743 */
744int edma_alloc_slot(unsigned ctlr, int slot) 744int edma_alloc_slot(unsigned ctlr, int slot)
745{ 745{
746 if (!edma_cc[ctlr])
747 return -EINVAL;
748
746 if (slot >= 0) 749 if (slot >= 0)
747 slot = EDMA_CHAN_SLOT(slot); 750 slot = EDMA_CHAN_SLOT(slot);
748 751
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index 74e3a34d78b8..e13a8fa5e62c 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -264,6 +264,7 @@ int __init mx35_clocks_init(void)
264 clk_prepare_enable(clk[gpio3_gate]); 264 clk_prepare_enable(clk[gpio3_gate]);
265 clk_prepare_enable(clk[iim_gate]); 265 clk_prepare_enable(clk[iim_gate]);
266 clk_prepare_enable(clk[emi_gate]); 266 clk_prepare_enable(clk[emi_gate]);
267 clk_prepare_enable(clk[max_gate]);
267 268
268 /* 269 /*
269 * SCC is needed to boot via mmc after a watchdog reset. The clock code 270 * SCC is needed to boot via mmc after a watchdog reset. The clock code
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 7b025ee528a5..2f9ff93a4e61 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -172,7 +172,7 @@ static struct clk *clk[clk_max];
172static struct clk_onecell_data clk_data; 172static struct clk_onecell_data clk_data;
173 173
174static enum mx6q_clks const clks_init_on[] __initconst = { 174static enum mx6q_clks const clks_init_on[] __initconst = {
175 mmdc_ch0_axi, rom, 175 mmdc_ch0_axi, rom, pll1_sys,
176}; 176};
177 177
178static struct clk_div_table clk_enet_ref_table[] = { 178static struct clk_div_table clk_enet_ref_table[] = {
diff --git a/arch/arm/mach-imx/headsmp.S b/arch/arm/mach-imx/headsmp.S
index 921fc1555854..a58c8b0527cc 100644
--- a/arch/arm/mach-imx/headsmp.S
+++ b/arch/arm/mach-imx/headsmp.S
@@ -26,16 +26,16 @@ ENDPROC(v7_secondary_startup)
26 26
27#ifdef CONFIG_PM 27#ifdef CONFIG_PM
28/* 28/*
29 * The following code is located into the .data section. This is to 29 * The following code must assume it is running from physical address
30 * allow phys_l2x0_saved_regs to be accessed with a relative load 30 * where absolute virtual addresses to the data section have to be
31 * as we are running on physical address here. 31 * turned into relative ones.
32 */ 32 */
33 .data
34 .align
35 33
36#ifdef CONFIG_CACHE_L2X0 34#ifdef CONFIG_CACHE_L2X0
37 .macro pl310_resume 35 .macro pl310_resume
38 ldr r2, phys_l2x0_saved_regs 36 adr r0, l2x0_saved_regs_offset
37 ldr r2, [r0]
38 add r2, r2, r0
39 ldr r0, [r2, #L2X0_R_PHY_BASE] @ get physical base of l2x0 39 ldr r0, [r2, #L2X0_R_PHY_BASE] @ get physical base of l2x0
40 ldr r1, [r2, #L2X0_R_AUX_CTRL] @ get aux_ctrl value 40 ldr r1, [r2, #L2X0_R_AUX_CTRL] @ get aux_ctrl value
41 str r1, [r0, #L2X0_AUX_CTRL] @ restore aux_ctrl 41 str r1, [r0, #L2X0_AUX_CTRL] @ restore aux_ctrl
@@ -43,9 +43,9 @@ ENDPROC(v7_secondary_startup)
43 str r1, [r0, #L2X0_CTRL] @ re-enable L2 43 str r1, [r0, #L2X0_CTRL] @ re-enable L2
44 .endm 44 .endm
45 45
46 .globl phys_l2x0_saved_regs 46l2x0_saved_regs_offset:
47phys_l2x0_saved_regs: 47 .word l2x0_saved_regs - .
48 .long 0 48
49#else 49#else
50 .macro pl310_resume 50 .macro pl310_resume
51 .endm 51 .endm
diff --git a/arch/arm/mach-imx/imx25-dt.c b/arch/arm/mach-imx/imx25-dt.c
index 03b65e5ea541..82348391582a 100644
--- a/arch/arm/mach-imx/imx25-dt.c
+++ b/arch/arm/mach-imx/imx25-dt.c
@@ -27,6 +27,11 @@ static const char * const imx25_dt_board_compat[] __initconst = {
27 NULL 27 NULL
28}; 28};
29 29
30static void __init imx25_timer_init(void)
31{
32 mx25_clocks_init_dt();
33}
34
30DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)") 35DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)")
31 .map_io = mx25_map_io, 36 .map_io = mx25_map_io,
32 .init_early = imx25_init_early, 37 .init_early = imx25_init_early,
diff --git a/arch/arm/mach-imx/pm-imx6q.c b/arch/arm/mach-imx/pm-imx6q.c
index ee42d20cba19..5faba7a3c95f 100644
--- a/arch/arm/mach-imx/pm-imx6q.c
+++ b/arch/arm/mach-imx/pm-imx6q.c
@@ -22,8 +22,6 @@
22#include "common.h" 22#include "common.h"
23#include "hardware.h" 23#include "hardware.h"
24 24
25extern unsigned long phys_l2x0_saved_regs;
26
27static int imx6q_suspend_finish(unsigned long val) 25static int imx6q_suspend_finish(unsigned long val)
28{ 26{
29 cpu_do_idle(); 27 cpu_do_idle();
@@ -57,18 +55,5 @@ static const struct platform_suspend_ops imx6q_pm_ops = {
57 55
58void __init imx6q_pm_init(void) 56void __init imx6q_pm_init(void)
59{ 57{
60 /*
61 * The l2x0 core code provides an infrastucture to save and restore
62 * l2x0 registers across suspend/resume cycle. But because imx6q
63 * retains L2 content during suspend and needs to resume L2 before
64 * MMU is enabled, it can only utilize register saving support and
65 * have to take care of restoring on its own. So we save physical
66 * address of the data structure used by l2x0 core to save registers,
67 * and later restore the necessary ones in imx6q resume entry.
68 */
69#ifdef CONFIG_CACHE_L2X0
70 phys_l2x0_saved_regs = __pa(&l2x0_saved_regs);
71#endif
72
73 suspend_set_ops(&imx6q_pm_ops); 58 suspend_set_ops(&imx6q_pm_ops);
74} 59}
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index 2e73e9d53f70..d367aa6b47bb 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -41,16 +41,12 @@ static void __init kirkwood_legacy_clk_init(void)
41 41
42 struct device_node *np = of_find_compatible_node( 42 struct device_node *np = of_find_compatible_node(
43 NULL, NULL, "marvell,kirkwood-gating-clock"); 43 NULL, NULL, "marvell,kirkwood-gating-clock");
44
45 struct of_phandle_args clkspec; 44 struct of_phandle_args clkspec;
45 struct clk *clk;
46 46
47 clkspec.np = np; 47 clkspec.np = np;
48 clkspec.args_count = 1; 48 clkspec.args_count = 1;
49 49
50 clkspec.args[0] = CGC_BIT_GE0;
51 orion_clkdev_add(NULL, "mv643xx_eth_port.0",
52 of_clk_get_from_provider(&clkspec));
53
54 clkspec.args[0] = CGC_BIT_PEX0; 50 clkspec.args[0] = CGC_BIT_PEX0;
55 orion_clkdev_add("0", "pcie", 51 orion_clkdev_add("0", "pcie",
56 of_clk_get_from_provider(&clkspec)); 52 of_clk_get_from_provider(&clkspec));
@@ -59,9 +55,24 @@ static void __init kirkwood_legacy_clk_init(void)
59 orion_clkdev_add("1", "pcie", 55 orion_clkdev_add("1", "pcie",
60 of_clk_get_from_provider(&clkspec)); 56 of_clk_get_from_provider(&clkspec));
61 57
62 clkspec.args[0] = CGC_BIT_GE1; 58 clkspec.args[0] = CGC_BIT_SDIO;
63 orion_clkdev_add(NULL, "mv643xx_eth_port.1", 59 orion_clkdev_add(NULL, "mvsdio",
64 of_clk_get_from_provider(&clkspec)); 60 of_clk_get_from_provider(&clkspec));
61
62 /*
63 * The ethernet interfaces forget the MAC address assigned by
64 * u-boot if the clocks are turned off. Until proper DT support
65 * is available we always enable them for now.
66 */
67 clkspec.args[0] = CGC_BIT_GE0;
68 clk = of_clk_get_from_provider(&clkspec);
69 orion_clkdev_add(NULL, "mv643xx_eth_port.0", clk);
70 clk_prepare_enable(clk);
71
72 clkspec.args[0] = CGC_BIT_GE1;
73 clk = of_clk_get_from_provider(&clkspec);
74 orion_clkdev_add(NULL, "mv643xx_eth_port.1", clk);
75 clk_prepare_enable(clk);
65} 76}
66 77
67static void __init kirkwood_of_clk_init(void) 78static void __init kirkwood_of_clk_init(void)
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index d1e2d595e79c..f62b68d926f4 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -9,6 +9,7 @@
9 */ 9 */
10 10
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/platform_device.h>
12#include <linux/gpio.h> 13#include <linux/gpio.h>
13 14
14#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
diff --git a/arch/arm/mach-mxs/icoll.c b/arch/arm/mach-mxs/icoll.c
index 8fb23af154b3..e26eeba46598 100644
--- a/arch/arm/mach-mxs/icoll.c
+++ b/arch/arm/mach-mxs/icoll.c
@@ -100,7 +100,7 @@ static struct irq_domain_ops icoll_irq_domain_ops = {
100 .xlate = irq_domain_xlate_onecell, 100 .xlate = irq_domain_xlate_onecell,
101}; 101};
102 102
103void __init icoll_of_init(struct device_node *np, 103static void __init icoll_of_init(struct device_node *np,
104 struct device_node *interrupt_parent) 104 struct device_node *interrupt_parent)
105{ 105{
106 /* 106 /*
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c
index 052186713347..3218f1f2c0e0 100644
--- a/arch/arm/mach-mxs/mach-mxs.c
+++ b/arch/arm/mach-mxs/mach-mxs.c
@@ -402,17 +402,17 @@ static void __init cfa10049_init(void)
402{ 402{
403 enable_clk_enet_out(); 403 enable_clk_enet_out();
404 update_fec_mac_prop(OUI_CRYSTALFONTZ); 404 update_fec_mac_prop(OUI_CRYSTALFONTZ);
405
406 mxsfb_pdata.mode_list = cfa10049_video_modes;
407 mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes);
408 mxsfb_pdata.default_bpp = 32;
409 mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
405} 410}
406 411
407static void __init cfa10037_init(void) 412static void __init cfa10037_init(void)
408{ 413{
409 enable_clk_enet_out(); 414 enable_clk_enet_out();
410 update_fec_mac_prop(OUI_CRYSTALFONTZ); 415 update_fec_mac_prop(OUI_CRYSTALFONTZ);
411
412 mxsfb_pdata.mode_list = cfa10049_video_modes;
413 mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes);
414 mxsfb_pdata.default_bpp = 32;
415 mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
416} 416}
417 417
418static void __init apf28_init(void) 418static void __init apf28_init(void)
diff --git a/arch/arm/mach-mxs/mm.c b/arch/arm/mach-mxs/mm.c
index a4294aa9f301..e63b7d87acbd 100644
--- a/arch/arm/mach-mxs/mm.c
+++ b/arch/arm/mach-mxs/mm.c
@@ -18,6 +18,7 @@
18 18
19#include <mach/mx23.h> 19#include <mach/mx23.h>
20#include <mach/mx28.h> 20#include <mach/mx28.h>
21#include <mach/common.h>
21 22
22/* 23/*
23 * Define the MX23 memory map. 24 * Define the MX23 memory map.
diff --git a/arch/arm/mach-mxs/ocotp.c b/arch/arm/mach-mxs/ocotp.c
index 54add60f94c9..1dff46703753 100644
--- a/arch/arm/mach-mxs/ocotp.c
+++ b/arch/arm/mach-mxs/ocotp.c
@@ -19,6 +19,7 @@
19#include <asm/processor.h> /* for cpu_relax() */ 19#include <asm/processor.h> /* for cpu_relax() */
20 20
21#include <mach/mxs.h> 21#include <mach/mxs.h>
22#include <mach/common.h>
22 23
23#define OCOTP_WORD_OFFSET 0x20 24#define OCOTP_WORD_OFFSET 0x20
24#define OCOTP_WORD_COUNT 0x20 25#define OCOTP_WORD_COUNT 0x20
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index 27c2cb7ab813..1504b68f4c66 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -168,7 +168,7 @@ void __init netx_init_irq(void)
168{ 168{
169 int irq; 169 int irq;
170 170
171 vic_init(io_p2v(NETX_PA_VIC), 0, ~0, 0); 171 vic_init(io_p2v(NETX_PA_VIC), NETX_IRQ_VIC_START, ~0, 0);
172 172
173 for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) { 173 for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
174 irq_set_chip_and_handler(irq, &netx_hif_chip, 174 irq_set_chip_and_handler(irq, &netx_hif_chip,
diff --git a/arch/arm/mach-netx/include/mach/irqs.h b/arch/arm/mach-netx/include/mach/irqs.h
index 6ce914d54a30..8f74a844a775 100644
--- a/arch/arm/mach-netx/include/mach/irqs.h
+++ b/arch/arm/mach-netx/include/mach/irqs.h
@@ -17,42 +17,42 @@
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19 19
20#define NETX_IRQ_VIC_START 0 20#define NETX_IRQ_VIC_START 64
21#define NETX_IRQ_SOFTINT 0 21#define NETX_IRQ_SOFTINT (NETX_IRQ_VIC_START + 0)
22#define NETX_IRQ_TIMER0 1 22#define NETX_IRQ_TIMER0 (NETX_IRQ_VIC_START + 1)
23#define NETX_IRQ_TIMER1 2 23#define NETX_IRQ_TIMER1 (NETX_IRQ_VIC_START + 2)
24#define NETX_IRQ_TIMER2 3 24#define NETX_IRQ_TIMER2 (NETX_IRQ_VIC_START + 3)
25#define NETX_IRQ_SYSTIME_NS 4 25#define NETX_IRQ_SYSTIME_NS (NETX_IRQ_VIC_START + 4)
26#define NETX_IRQ_SYSTIME_S 5 26#define NETX_IRQ_SYSTIME_S (NETX_IRQ_VIC_START + 5)
27#define NETX_IRQ_GPIO_15 6 27#define NETX_IRQ_GPIO_15 (NETX_IRQ_VIC_START + 6)
28#define NETX_IRQ_WATCHDOG 7 28#define NETX_IRQ_WATCHDOG (NETX_IRQ_VIC_START + 7)
29#define NETX_IRQ_UART0 8 29#define NETX_IRQ_UART0 (NETX_IRQ_VIC_START + 8)
30#define NETX_IRQ_UART1 9 30#define NETX_IRQ_UART1 (NETX_IRQ_VIC_START + 9)
31#define NETX_IRQ_UART2 10 31#define NETX_IRQ_UART2 (NETX_IRQ_VIC_START + 10)
32#define NETX_IRQ_USB 11 32#define NETX_IRQ_USB (NETX_IRQ_VIC_START + 11)
33#define NETX_IRQ_SPI 12 33#define NETX_IRQ_SPI (NETX_IRQ_VIC_START + 12)
34#define NETX_IRQ_I2C 13 34#define NETX_IRQ_I2C (NETX_IRQ_VIC_START + 13)
35#define NETX_IRQ_LCD 14 35#define NETX_IRQ_LCD (NETX_IRQ_VIC_START + 14)
36#define NETX_IRQ_HIF 15 36#define NETX_IRQ_HIF (NETX_IRQ_VIC_START + 15)
37#define NETX_IRQ_GPIO_0_14 16 37#define NETX_IRQ_GPIO_0_14 (NETX_IRQ_VIC_START + 16)
38#define NETX_IRQ_XPEC0 17 38#define NETX_IRQ_XPEC0 (NETX_IRQ_VIC_START + 17)
39#define NETX_IRQ_XPEC1 18 39#define NETX_IRQ_XPEC1 (NETX_IRQ_VIC_START + 18)
40#define NETX_IRQ_XPEC2 19 40#define NETX_IRQ_XPEC2 (NETX_IRQ_VIC_START + 19)
41#define NETX_IRQ_XPEC3 20 41#define NETX_IRQ_XPEC3 (NETX_IRQ_VIC_START + 20)
42#define NETX_IRQ_XPEC(no) (17 + (no)) 42#define NETX_IRQ_XPEC(no) (NETX_IRQ_VIC_START + 17 + (no))
43#define NETX_IRQ_MSYNC0 21 43#define NETX_IRQ_MSYNC0 (NETX_IRQ_VIC_START + 21)
44#define NETX_IRQ_MSYNC1 22 44#define NETX_IRQ_MSYNC1 (NETX_IRQ_VIC_START + 22)
45#define NETX_IRQ_MSYNC2 23 45#define NETX_IRQ_MSYNC2 (NETX_IRQ_VIC_START + 23)
46#define NETX_IRQ_MSYNC3 24 46#define NETX_IRQ_MSYNC3 (NETX_IRQ_VIC_START + 24)
47#define NETX_IRQ_IRQ_PHY 25 47#define NETX_IRQ_IRQ_PHY (NETX_IRQ_VIC_START + 25)
48#define NETX_IRQ_ISO_AREA 26 48#define NETX_IRQ_ISO_AREA (NETX_IRQ_VIC_START + 26)
49/* int 27 is reserved */ 49/* int 27 is reserved */
50/* int 28 is reserved */ 50/* int 28 is reserved */
51#define NETX_IRQ_TIMER3 29 51#define NETX_IRQ_TIMER3 (NETX_IRQ_VIC_START + 29)
52#define NETX_IRQ_TIMER4 30 52#define NETX_IRQ_TIMER4 (NETX_IRQ_VIC_START + 30)
53/* int 31 is reserved */ 53/* int 31 is reserved */
54 54
55#define NETX_IRQS 32 55#define NETX_IRQS (NETX_IRQ_VIC_START + 32)
56 56
57/* for multiplexed irqs on gpio 0..14 */ 57/* for multiplexed irqs on gpio 0..14 */
58#define NETX_IRQ_GPIO(x) (NETX_IRQS + (x)) 58#define NETX_IRQ_GPIO(x) (NETX_IRQS + (x))
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h
index fb18831e88aa..14f7e9920479 100644
--- a/arch/arm/mach-omap1/common.h
+++ b/arch/arm/mach-omap1/common.h
@@ -31,6 +31,8 @@
31 31
32#include <plat/i2c.h> 32#include <plat/i2c.h>
33 33
34#include <mach/irqs.h>
35
34#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 36#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
35void omap7xx_map_io(void); 37void omap7xx_map_io(void);
36#else 38#else
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 49ac3dfebef9..8111cd9ff3e5 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -311,9 +311,6 @@ config MACH_OMAP_ZOOM2
311 default y 311 default y
312 select OMAP_PACKAGE_CBB 312 select OMAP_PACKAGE_CBB
313 select REGULATOR_FIXED_VOLTAGE if REGULATOR 313 select REGULATOR_FIXED_VOLTAGE if REGULATOR
314 select SERIAL_8250
315 select SERIAL_8250_CONSOLE
316 select SERIAL_CORE_CONSOLE
317 314
318config MACH_OMAP_ZOOM3 315config MACH_OMAP_ZOOM3
319 bool "OMAP3630 Zoom3 board" 316 bool "OMAP3630 Zoom3 board"
@@ -321,9 +318,6 @@ config MACH_OMAP_ZOOM3
321 default y 318 default y
322 select OMAP_PACKAGE_CBP 319 select OMAP_PACKAGE_CBP
323 select REGULATOR_FIXED_VOLTAGE if REGULATOR 320 select REGULATOR_FIXED_VOLTAGE if REGULATOR
324 select SERIAL_8250
325 select SERIAL_8250_CONSOLE
326 select SERIAL_CORE_CONSOLE
327 321
328config MACH_CM_T35 322config MACH_CM_T35
329 bool "CompuLab CM-T35/CM-T3730 modules" 323 bool "CompuLab CM-T35/CM-T3730 modules"
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 0274ff7a2a2b..e54a48060198 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -102,6 +102,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
102 .init_irq = omap_intc_of_init, 102 .init_irq = omap_intc_of_init,
103 .handle_irq = omap3_intc_handle_irq, 103 .handle_irq = omap3_intc_handle_irq,
104 .init_machine = omap_generic_init, 104 .init_machine = omap_generic_init,
105 .init_late = omap3_init_late,
105 .init_time = omap3_sync32k_timer_init, 106 .init_time = omap3_sync32k_timer_init,
106 .dt_compat = omap3_boards_compat, 107 .dt_compat = omap3_boards_compat,
107 .restart = omap3xxx_restart, 108 .restart = omap3xxx_restart,
@@ -119,6 +120,7 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
119 .init_irq = omap_intc_of_init, 120 .init_irq = omap_intc_of_init,
120 .handle_irq = omap3_intc_handle_irq, 121 .handle_irq = omap3_intc_handle_irq,
121 .init_machine = omap_generic_init, 122 .init_machine = omap_generic_init,
123 .init_late = omap3_init_late,
122 .init_time = omap3_secure_sync32k_timer_init, 124 .init_time = omap3_secure_sync32k_timer_init,
123 .dt_compat = omap3_gp_boards_compat, 125 .dt_compat = omap3_gp_boards_compat,
124 .restart = omap3xxx_restart, 126 .restart = omap3xxx_restart,
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index f7c4616cbb60..d2ea68ea678a 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -17,6 +17,7 @@
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/leds.h> 19#include <linux/leds.h>
20#include <linux/usb/phy.h>
20#include <linux/usb/musb.h> 21#include <linux/usb/musb.h>
21#include <linux/platform_data/spi-omap2-mcspi.h> 22#include <linux/platform_data/spi-omap2-mcspi.h>
22 23
@@ -98,6 +99,7 @@ static void __init rx51_init(void)
98 sdrc_params = nokia_get_sdram_timings(); 99 sdrc_params = nokia_get_sdram_timings();
99 omap_sdrc_init(sdrc_params, sdrc_params); 100 omap_sdrc_init(sdrc_params, sdrc_params);
100 101
102 usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
101 usb_musb_init(&musb_board_data); 103 usb_musb_init(&musb_board_data);
102 rx51_peripherals_init(); 104 rx51_peripherals_init();
103 105
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 0a6b9c7a63da..40f4a03d728f 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -108,7 +108,6 @@ void omap35xx_init_late(void);
108void omap3630_init_late(void); 108void omap3630_init_late(void);
109void am35xx_init_late(void); 109void am35xx_init_late(void);
110void ti81xx_init_late(void); 110void ti81xx_init_late(void);
111void omap4430_init_late(void);
112int omap2_common_pm_late_init(void); 111int omap2_common_pm_late_init(void);
113 112
114#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430) 113#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index e4b16c8efe8b..410e1bac7815 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1122,9 +1122,6 @@ int gpmc_calc_timings(struct gpmc_timings *gpmc_t,
1122 /* TODO: remove, see function definition */ 1122 /* TODO: remove, see function definition */
1123 gpmc_convert_ps_to_ns(gpmc_t); 1123 gpmc_convert_ps_to_ns(gpmc_t);
1124 1124
1125 /* Now the GPMC is initialised, unreserve the chip-selects */
1126 gpmc_cs_map = 0;
1127
1128 return 0; 1125 return 0;
1129} 1126}
1130 1127
@@ -1383,6 +1380,9 @@ static int gpmc_probe(struct platform_device *pdev)
1383 if (IS_ERR_VALUE(gpmc_setup_irq())) 1380 if (IS_ERR_VALUE(gpmc_setup_irq()))
1384 dev_warn(gpmc_dev, "gpmc_setup_irq failed\n"); 1381 dev_warn(gpmc_dev, "gpmc_setup_irq failed\n");
1385 1382
1383 /* Now the GPMC is initialised, unreserve the chip-selects */
1384 gpmc_cs_map = 0;
1385
1386 rc = gpmc_probe_dt(pdev); 1386 rc = gpmc_probe_dt(pdev);
1387 if (rc < 0) { 1387 if (rc < 0) {
1388 clk_disable_unprepare(gpmc_l3_clk); 1388 clk_disable_unprepare(gpmc_l3_clk);
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 6a217c98db54..f82cf878d6af 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -211,8 +211,6 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition,
211 return -EINVAL; 211 return -EINVAL;
212 } 212 }
213 213
214 pr_err("%s: Could not find signal %s\n", __func__, muxname);
215
216 return -ENODEV; 214 return -ENODEV;
217} 215}
218 216
@@ -234,6 +232,8 @@ int __init omap_mux_get_by_name(const char *muxname,
234 return mux_mode; 232 return mux_mode;
235 } 233 }
236 234
235 pr_err("%s: Could not find signal %s\n", __func__, muxname);
236
237 return -ENODEV; 237 return -ENODEV;
238} 238}
239 239
@@ -739,8 +739,9 @@ static void __init omap_mux_dbg_create_entry(
739 list_for_each_entry(e, &partition->muxmodes, node) { 739 list_for_each_entry(e, &partition->muxmodes, node) {
740 struct omap_mux *m = &e->mux; 740 struct omap_mux *m = &e->mux;
741 741
742 (void)debugfs_create_file(m->muxnames[0], S_IWUSR, mux_dbg_dir, 742 (void)debugfs_create_file(m->muxnames[0], S_IWUSR | S_IRUGO,
743 m, &omap_mux_dbg_signal_fops); 743 mux_dbg_dir, m,
744 &omap_mux_dbg_signal_fops);
744 } 745 }
745} 746}
746 747
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index fcdf52dbcc49..f051f53e35b7 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -214,11 +214,6 @@ static struct clk clk_pcmcdclk2 = {
214 .name = "pcmcdclk", 214 .name = "pcmcdclk",
215}; 215};
216 216
217static struct clk dummy_apb_pclk = {
218 .name = "apb_pclk",
219 .id = -1,
220};
221
222static struct clk *clkset_vpllsrc_list[] = { 217static struct clk *clkset_vpllsrc_list[] = {
223 [0] = &clk_fin_vpll, 218 [0] = &clk_fin_vpll,
224 [1] = &clk_sclk_hdmi27m, 219 [1] = &clk_sclk_hdmi27m,
@@ -305,18 +300,6 @@ static struct clk_ops clk_fout_apll_ops = {
305 300
306static struct clk init_clocks_off[] = { 301static struct clk init_clocks_off[] = {
307 { 302 {
308 .name = "dma",
309 .devname = "dma-pl330.0",
310 .parent = &clk_hclk_psys.clk,
311 .enable = s5pv210_clk_ip0_ctrl,
312 .ctrlbit = (1 << 3),
313 }, {
314 .name = "dma",
315 .devname = "dma-pl330.1",
316 .parent = &clk_hclk_psys.clk,
317 .enable = s5pv210_clk_ip0_ctrl,
318 .ctrlbit = (1 << 4),
319 }, {
320 .name = "rot", 303 .name = "rot",
321 .parent = &clk_hclk_dsys.clk, 304 .parent = &clk_hclk_dsys.clk,
322 .enable = s5pv210_clk_ip0_ctrl, 305 .enable = s5pv210_clk_ip0_ctrl,
@@ -573,6 +556,20 @@ static struct clk clk_hsmmc3 = {
573 .ctrlbit = (1<<19), 556 .ctrlbit = (1<<19),
574}; 557};
575 558
559static struct clk clk_pdma0 = {
560 .name = "pdma0",
561 .parent = &clk_hclk_psys.clk,
562 .enable = s5pv210_clk_ip0_ctrl,
563 .ctrlbit = (1 << 3),
564};
565
566static struct clk clk_pdma1 = {
567 .name = "pdma1",
568 .parent = &clk_hclk_psys.clk,
569 .enable = s5pv210_clk_ip0_ctrl,
570 .ctrlbit = (1 << 4),
571};
572
576static struct clk *clkset_uart_list[] = { 573static struct clk *clkset_uart_list[] = {
577 [6] = &clk_mout_mpll.clk, 574 [6] = &clk_mout_mpll.clk,
578 [7] = &clk_mout_epll.clk, 575 [7] = &clk_mout_epll.clk,
@@ -1075,6 +1072,8 @@ static struct clk *clk_cdev[] = {
1075 &clk_hsmmc1, 1072 &clk_hsmmc1,
1076 &clk_hsmmc2, 1073 &clk_hsmmc2,
1077 &clk_hsmmc3, 1074 &clk_hsmmc3,
1075 &clk_pdma0,
1076 &clk_pdma1,
1078}; 1077};
1079 1078
1080/* Clock initialisation code */ 1079/* Clock initialisation code */
@@ -1333,6 +1332,8 @@ static struct clk_lookup s5pv210_clk_lookup[] = {
1333 CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), 1332 CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
1334 CLKDEV_INIT("s5pv210-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), 1333 CLKDEV_INIT("s5pv210-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
1335 CLKDEV_INIT("s5pv210-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), 1334 CLKDEV_INIT("s5pv210-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
1335 CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
1336 CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
1336}; 1337};
1337 1338
1338void __init s5pv210_register_clocks(void) 1339void __init s5pv210_register_clocks(void)
@@ -1361,6 +1362,5 @@ void __init s5pv210_register_clocks(void)
1361 for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++) 1362 for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
1362 s3c_disable_clocks(clk_cdev[ptr], 1); 1363 s3c_disable_clocks(clk_cdev[ptr], 1);
1363 1364
1364 s3c24xx_register_clock(&dummy_apb_pclk);
1365 s3c_pwmclk_init(); 1365 s3c_pwmclk_init();
1366} 1366}
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 3a38f7b34b94..e373de44a8b6 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -845,7 +845,7 @@ static struct fimc_source_info goni_camera_sensors[] = {
845 .mux_id = 0, 845 .mux_id = 0,
846 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING | 846 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
847 V4L2_MBUS_VSYNC_ACTIVE_LOW, 847 V4L2_MBUS_VSYNC_ACTIVE_LOW,
848 .bus_type = FIMC_BUS_TYPE_ITU_601, 848 .fimc_bus_type = FIMC_BUS_TYPE_ITU_601,
849 .board_info = &noon010pc30_board_info, 849 .board_info = &noon010pc30_board_info,
850 .i2c_bus_num = 0, 850 .i2c_bus_num = 0,
851 .clk_frequency = 16000000UL, 851 .clk_frequency = 16000000UL,
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index f9d754f90c59..d2b3937c4014 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -14,7 +14,7 @@
14#define pr_fmt(fmt) "SPEAr3xx: " fmt 14#define pr_fmt(fmt) "SPEAr3xx: " fmt
15 15
16#include <linux/amba/pl022.h> 16#include <linux/amba/pl022.h>
17#include <linux/amba/pl08x.h> 17#include <linux/amba/pl080.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <plat/pl080.h> 19#include <plat/pl080.h>
20#include <mach/generic.h> 20#include <mach/generic.h>
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index 7a0511191f6b..a5a4b2bc42ba 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -152,9 +152,9 @@ static int is_reserved_asid(u64 asid)
152 return 0; 152 return 0;
153} 153}
154 154
155static void new_context(struct mm_struct *mm, unsigned int cpu) 155static u64 new_context(struct mm_struct *mm, unsigned int cpu)
156{ 156{
157 u64 asid = mm->context.id; 157 u64 asid = atomic64_read(&mm->context.id);
158 u64 generation = atomic64_read(&asid_generation); 158 u64 generation = atomic64_read(&asid_generation);
159 159
160 if (asid != 0 && is_reserved_asid(asid)) { 160 if (asid != 0 && is_reserved_asid(asid)) {
@@ -181,13 +181,14 @@ static void new_context(struct mm_struct *mm, unsigned int cpu)
181 cpumask_clear(mm_cpumask(mm)); 181 cpumask_clear(mm_cpumask(mm));
182 } 182 }
183 183
184 mm->context.id = asid; 184 return asid;
185} 185}
186 186
187void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk) 187void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk)
188{ 188{
189 unsigned long flags; 189 unsigned long flags;
190 unsigned int cpu = smp_processor_id(); 190 unsigned int cpu = smp_processor_id();
191 u64 asid;
191 192
192 if (unlikely(mm->context.vmalloc_seq != init_mm.context.vmalloc_seq)) 193 if (unlikely(mm->context.vmalloc_seq != init_mm.context.vmalloc_seq))
193 __check_vmalloc_seq(mm); 194 __check_vmalloc_seq(mm);
@@ -198,20 +199,26 @@ void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk)
198 */ 199 */
199 cpu_set_reserved_ttbr0(); 200 cpu_set_reserved_ttbr0();
200 201
201 if (!((mm->context.id ^ atomic64_read(&asid_generation)) >> ASID_BITS) 202 asid = atomic64_read(&mm->context.id);
202 && atomic64_xchg(&per_cpu(active_asids, cpu), mm->context.id)) 203 if (!((asid ^ atomic64_read(&asid_generation)) >> ASID_BITS)
204 && atomic64_xchg(&per_cpu(active_asids, cpu), asid))
203 goto switch_mm_fastpath; 205 goto switch_mm_fastpath;
204 206
205 raw_spin_lock_irqsave(&cpu_asid_lock, flags); 207 raw_spin_lock_irqsave(&cpu_asid_lock, flags);
206 /* Check that our ASID belongs to the current generation. */ 208 /* Check that our ASID belongs to the current generation. */
207 if ((mm->context.id ^ atomic64_read(&asid_generation)) >> ASID_BITS) 209 asid = atomic64_read(&mm->context.id);
208 new_context(mm, cpu); 210 if ((asid ^ atomic64_read(&asid_generation)) >> ASID_BITS) {
209 211 asid = new_context(mm, cpu);
210 atomic64_set(&per_cpu(active_asids, cpu), mm->context.id); 212 atomic64_set(&mm->context.id, asid);
211 cpumask_set_cpu(cpu, mm_cpumask(mm)); 213 }
212 214
213 if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending)) 215 if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending)) {
216 local_flush_bp_all();
214 local_flush_tlb_all(); 217 local_flush_tlb_all();
218 }
219
220 atomic64_set(&per_cpu(active_asids, cpu), asid);
221 cpumask_set_cpu(cpu, mm_cpumask(mm));
215 raw_spin_unlock_irqrestore(&cpu_asid_lock, flags); 222 raw_spin_unlock_irqrestore(&cpu_asid_lock, flags);
216 223
217switch_mm_fastpath: 224switch_mm_fastpath:
diff --git a/arch/arm/mm/idmap.c b/arch/arm/mm/idmap.c
index 2dffc010cc41..5ee505c937d1 100644
--- a/arch/arm/mm/idmap.c
+++ b/arch/arm/mm/idmap.c
@@ -141,6 +141,7 @@ void setup_mm_for_reboot(void)
141{ 141{
142 /* Switch to the identity mapping. */ 142 /* Switch to the identity mapping. */
143 cpu_switch_mm(idmap_pgd, &init_mm); 143 cpu_switch_mm(idmap_pgd, &init_mm);
144 local_flush_bp_all();
144 145
145#ifdef CONFIG_CPU_HAS_ASID 146#ifdef CONFIG_CPU_HAS_ASID
146 /* 147 /*
diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
index 50bf1dafc9ea..6ffd78c0f9ab 100644
--- a/arch/arm/mm/proc-v7-3level.S
+++ b/arch/arm/mm/proc-v7-3level.S
@@ -48,7 +48,7 @@
48ENTRY(cpu_v7_switch_mm) 48ENTRY(cpu_v7_switch_mm)
49#ifdef CONFIG_MMU 49#ifdef CONFIG_MMU
50 mmid r1, r1 @ get mm->context.id 50 mmid r1, r1 @ get mm->context.id
51 and r3, r1, #0xff 51 asid r3, r1
52 mov r3, r3, lsl #(48 - 32) @ ASID 52 mov r3, r3, lsl #(48 - 32) @ ASID
53 mcrr p15, 0, r0, r3, c2 @ set TTB 0 53 mcrr p15, 0, r0, r3, c2 @ set TTB 0
54 isb 54 isb
diff --git a/arch/arm/plat-orion/addr-map.c b/arch/arm/plat-orion/addr-map.c
index febe3862873c..807ac8e5cbc0 100644
--- a/arch/arm/plat-orion/addr-map.c
+++ b/arch/arm/plat-orion/addr-map.c
@@ -157,9 +157,12 @@ void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
157 u32 size = readl(ddr_window_cpu_base + DDR_SIZE_CS_OFF(i)); 157 u32 size = readl(ddr_window_cpu_base + DDR_SIZE_CS_OFF(i));
158 158
159 /* 159 /*
160 * Chip select enabled? 160 * We only take care of entries for which the chip
161 * select is enabled, and that don't have high base
162 * address bits set (devices can only access the first
163 * 32 bits of the memory).
161 */ 164 */
162 if (size & 1) { 165 if ((size & 1) && !(base & 0xF)) {
163 struct mbus_dram_window *w; 166 struct mbus_dram_window *w;
164 167
165 w = &orion_mbus_dram_info.cs[cs++]; 168 w = &orion_mbus_dram_info.cs[cs++];
diff --git a/arch/arm/plat-spear/Kconfig b/arch/arm/plat-spear/Kconfig
index 739d016eb273..8a08c31b5e20 100644
--- a/arch/arm/plat-spear/Kconfig
+++ b/arch/arm/plat-spear/Kconfig
@@ -10,7 +10,7 @@ choice
10 10
11config ARCH_SPEAR13XX 11config ARCH_SPEAR13XX
12 bool "ST SPEAr13xx with Device Tree" 12 bool "ST SPEAr13xx with Device Tree"
13 select ARCH_HAVE_CPUFREQ 13 select ARCH_HAS_CPUFREQ
14 select ARM_GIC 14 select ARM_GIC
15 select CPU_V7 15 select CPU_V7
16 select GPIO_SPEAR_SPICS 16 select GPIO_SPEAR_SPICS
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-19 20:37:41 -0500