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-rw-r--r--arch/arm/mach-pxa/Kconfig8
-rw-r--r--arch/arm/mach-pxa/Makefile1
-rw-r--r--arch/arm/mach-pxa/hx4700.c851
-rw-r--r--arch/arm/mach-pxa/include/mach/hx4700.h131
-rw-r--r--arch/arm/mach-pxa/include/mach/irqs.h4
5 files changed, 994 insertions, 1 deletions
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 3b34f34db204..a911bc961dea 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -309,6 +309,14 @@ config MACH_CM_X300
309 select PXA3xx 309 select PXA3xx
310 select CPU_PXA300 310 select CPU_PXA300
311 311
312config MACH_H4700
313 bool "HP iPAQ hx4700"
314 select PXA27x
315 select IWMMXT
316 select PXA_SSP
317 select HAVE_PWM
318 select PXA_HAVE_BOARD_IRQS
319
312config MACH_MAGICIAN 320config MACH_MAGICIAN
313 bool "Enable HTC Magician Support" 321 bool "Enable HTC Magician Support"
314 select PXA27x 322 select PXA27x
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 47d01572a04d..e950c40b316e 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -46,6 +46,7 @@ obj-$(CONFIG_MACH_PCM027) += pcm027.o
46obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o 46obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o
47obj-$(CONFIG_MACH_TOSA) += tosa.o 47obj-$(CONFIG_MACH_TOSA) += tosa.o
48obj-$(CONFIG_MACH_EM_X270) += em-x270.o 48obj-$(CONFIG_MACH_EM_X270) += em-x270.o
49obj-$(CONFIG_MACH_H4700) += hx4700.o
49obj-$(CONFIG_MACH_MAGICIAN) += magician.o 50obj-$(CONFIG_MACH_MAGICIAN) += magician.o
50obj-$(CONFIG_MACH_HIMALAYA) += himalaya.o 51obj-$(CONFIG_MACH_HIMALAYA) += himalaya.o
51obj-$(CONFIG_MACH_MIOA701) += mioa701.o mioa701_bootresume.o 52obj-$(CONFIG_MACH_MIOA701) += mioa701.o mioa701_bootresume.o
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
new file mode 100644
index 000000000000..0f6568005e16
--- /dev/null
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -0,0 +1,851 @@
1/*
2 * Support for HP iPAQ hx4700 PDAs.
3 *
4 * Copyright (c) 2008-2009 Philipp Zabel
5 *
6 * Based on code:
7 * Copyright (c) 2004 Hewlett-Packard Company.
8 * Copyright (c) 2005 SDG Systems, LLC
9 * Copyright (c) 2006 Anton Vorontsov <cbou@mail.ru>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 */
16
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/platform_device.h>
20#include <linux/delay.h>
21#include <linux/fb.h>
22#include <linux/gpio.h>
23#include <linux/gpio_keys.h>
24#include <linux/input.h>
25#include <linux/lcd.h>
26#include <linux/mfd/htc-egpio.h>
27#include <linux/mfd/asic3.h>
28#include <linux/mtd/physmap.h>
29#include <linux/pda_power.h>
30#include <linux/pwm_backlight.h>
31#include <linux/regulator/bq24022.h>
32#include <linux/regulator/machine.h>
33#include <linux/spi/ads7846.h>
34#include <linux/spi/spi.h>
35#include <linux/usb/gpio_vbus.h>
36
37#include <mach/hardware.h>
38#include <asm/mach-types.h>
39#include <asm/mach/arch.h>
40
41#include <mach/pxa27x.h>
42#include <mach/hx4700.h>
43#include <plat/i2c.h>
44#include <mach/irda.h>
45#include <mach/pxa2xx_spi.h>
46
47#include <video/w100fb.h>
48
49#include "devices.h"
50#include "generic.h"
51
52/* Physical address space information */
53
54#define ATI_W3220_PHYS PXA_CS2_PHYS /* ATI Imageon 3220 Graphics */
55#define ASIC3_PHYS PXA_CS3_PHYS
56#define ASIC3_SD_PHYS (PXA_CS3_PHYS + 0x02000000)
57
58static unsigned long hx4700_pin_config[] __initdata = {
59
60 /* SDRAM and Static Memory I/O Signals */
61 GPIO20_nSDCS_2,
62 GPIO21_nSDCS_3,
63 GPIO15_nCS_1,
64 GPIO78_nCS_2, /* W3220 */
65 GPIO79_nCS_3, /* ASIC3 */
66 GPIO80_nCS_4,
67 GPIO33_nCS_5, /* EGPIO, WLAN */
68
69 /* PC CARD */
70 GPIO48_nPOE,
71 GPIO49_nPWE,
72 GPIO50_nPIOR,
73 GPIO51_nPIOW,
74 GPIO54_nPCE_2,
75 GPIO55_nPREG,
76 GPIO56_nPWAIT,
77 GPIO57_nIOIS16,
78 GPIO85_nPCE_1,
79 GPIO104_PSKTSEL,
80
81 /* I2C */
82 GPIO117_I2C_SCL,
83 GPIO118_I2C_SDA,
84
85 /* FFUART (RS-232) */
86 GPIO34_FFUART_RXD,
87 GPIO35_FFUART_CTS,
88 GPIO36_FFUART_DCD,
89 GPIO37_FFUART_DSR,
90 GPIO38_FFUART_RI,
91 GPIO39_FFUART_TXD,
92 GPIO40_FFUART_DTR,
93 GPIO41_FFUART_RTS,
94
95 /* BTUART */
96 GPIO42_BTUART_RXD,
97 GPIO43_BTUART_TXD,
98 GPIO44_BTUART_CTS,
99 GPIO45_BTUART_RTS,
100
101 /* PWM 1 (Backlight) */
102 GPIO17_PWM1_OUT,
103
104 /* I2S */
105 GPIO28_I2S_BITCLK_OUT,
106 GPIO29_I2S_SDATA_IN,
107 GPIO30_I2S_SDATA_OUT,
108 GPIO31_I2S_SYNC,
109 GPIO113_I2S_SYSCLK,
110
111 /* SSP 1 (NavPoint) */
112 GPIO23_SSP1_SCLK,
113 GPIO24_SSP1_SFRM,
114 GPIO25_SSP1_TXD,
115 GPIO26_SSP1_RXD,
116
117 /* SSP 2 (TSC2046) */
118 GPIO19_SSP2_SCLK,
119 GPIO86_SSP2_RXD,
120 GPIO87_SSP2_TXD,
121 GPIO88_GPIO,
122
123 /* HX4700 specific input GPIOs */
124 GPIO12_GPIO, /* ASIC3_IRQ */
125 GPIO13_GPIO, /* W3220_IRQ */
126 GPIO14_GPIO, /* nWLAN_IRQ */
127
128 GPIO10_GPIO, /* GSM_IRQ */
129 GPIO13_GPIO, /* CPLD_IRQ */
130 GPIO107_GPIO, /* DS1WM_IRQ */
131 GPIO108_GPIO, /* GSM_READY */
132 GPIO58_GPIO, /* TSC2046_nPENIRQ */
133 GPIO66_GPIO, /* nSDIO_IRQ */
134};
135
136#define HX4700_GPIO_IN(num, _desc) \
137 { .gpio = (num), .dir = 0, .desc = (_desc) }
138#define HX4700_GPIO_OUT(num, _init, _desc) \
139 { .gpio = (num), .dir = 1, .init = (_init), .desc = (_desc) }
140struct gpio_ress {
141 unsigned gpio : 8;
142 unsigned dir : 1;
143 unsigned init : 1;
144 char *desc;
145};
146
147static int hx4700_gpio_request(struct gpio_ress *gpios, int size)
148{
149 int i, rc = 0;
150 int gpio;
151 int dir;
152
153 for (i = 0; (!rc) && (i < size); i++) {
154 gpio = gpios[i].gpio;
155 dir = gpios[i].dir;
156 rc = gpio_request(gpio, gpios[i].desc);
157 if (rc) {
158 pr_err("Error requesting GPIO %d(%s) : %d\n",
159 gpio, gpios[i].desc, rc);
160 continue;
161 }
162 if (dir)
163 gpio_direction_output(gpio, gpios[i].init);
164 else
165 gpio_direction_input(gpio);
166 }
167 while ((rc) && (--i >= 0))
168 gpio_free(gpios[i].gpio);
169 return rc;
170}
171
172/*
173 * IRDA
174 */
175
176static void irda_transceiver_mode(struct device *dev, int mode)
177{
178 gpio_set_value(GPIO105_HX4700_nIR_ON, mode & IR_OFF);
179}
180
181static struct pxaficp_platform_data ficp_info = {
182 .transceiver_cap = IR_SIRMODE | IR_OFF,
183 .transceiver_mode = irda_transceiver_mode,
184};
185
186/*
187 * GPIO Keys
188 */
189
190#define INIT_KEY(_code, _gpio, _active_low, _desc) \
191 { \
192 .code = KEY_##_code, \
193 .gpio = _gpio, \
194 .active_low = _active_low, \
195 .desc = _desc, \
196 .type = EV_KEY, \
197 .wakeup = 1, \
198 }
199
200static struct gpio_keys_button gpio_keys_buttons[] = {
201 INIT_KEY(POWER, GPIO0_HX4700_nKEY_POWER, 1, "Power button"),
202 INIT_KEY(MAIL, GPIO94_HX4700_KEY_MAIL, 0, "Mail button"),
203 INIT_KEY(ADDRESSBOOK, GPIO99_HX4700_KEY_CONTACTS,0, "Contacts button"),
204 INIT_KEY(RECORD, GPIOD6_nKEY_RECORD, 1, "Record button"),
205 INIT_KEY(CALENDAR, GPIOD1_nKEY_CALENDAR, 1, "Calendar button"),
206 INIT_KEY(HOMEPAGE, GPIOD3_nKEY_HOME, 1, "Home button"),
207};
208
209static struct gpio_keys_platform_data gpio_keys_data = {
210 .buttons = gpio_keys_buttons,
211 .nbuttons = ARRAY_SIZE(gpio_keys_buttons),
212};
213
214static struct platform_device gpio_keys = {
215 .name = "gpio-keys",
216 .dev = {
217 .platform_data = &gpio_keys_data,
218 },
219 .id = -1,
220};
221
222/*
223 * ASIC3
224 */
225
226static u16 asic3_gpio_config[] = {
227 /* ASIC3 GPIO banks A and B along with some of C and D
228 implement the buffering for the CF slot. */
229 ASIC3_CONFIG_GPIO(0, 1, 1, 0),
230 ASIC3_CONFIG_GPIO(1, 1, 1, 0),
231 ASIC3_CONFIG_GPIO(2, 1, 1, 0),
232 ASIC3_CONFIG_GPIO(3, 1, 1, 0),
233 ASIC3_CONFIG_GPIO(4, 1, 1, 0),
234 ASIC3_CONFIG_GPIO(5, 1, 1, 0),
235 ASIC3_CONFIG_GPIO(6, 1, 1, 0),
236 ASIC3_CONFIG_GPIO(7, 1, 1, 0),
237 ASIC3_CONFIG_GPIO(8, 1, 1, 0),
238 ASIC3_CONFIG_GPIO(9, 1, 1, 0),
239 ASIC3_CONFIG_GPIO(10, 1, 1, 0),
240 ASIC3_CONFIG_GPIO(11, 1, 1, 0),
241 ASIC3_CONFIG_GPIO(12, 1, 1, 0),
242 ASIC3_CONFIG_GPIO(13, 1, 1, 0),
243 ASIC3_CONFIG_GPIO(14, 1, 1, 0),
244 ASIC3_CONFIG_GPIO(15, 1, 1, 0),
245
246 ASIC3_CONFIG_GPIO(16, 1, 1, 0),
247 ASIC3_CONFIG_GPIO(17, 1, 1, 0),
248 ASIC3_CONFIG_GPIO(18, 1, 1, 0),
249 ASIC3_CONFIG_GPIO(19, 1, 1, 0),
250 ASIC3_CONFIG_GPIO(20, 1, 1, 0),
251 ASIC3_CONFIG_GPIO(21, 1, 1, 0),
252 ASIC3_CONFIG_GPIO(22, 1, 1, 0),
253 ASIC3_CONFIG_GPIO(23, 1, 1, 0),
254 ASIC3_CONFIG_GPIO(24, 1, 1, 0),
255 ASIC3_CONFIG_GPIO(25, 1, 1, 0),
256 ASIC3_CONFIG_GPIO(26, 1, 1, 0),
257 ASIC3_CONFIG_GPIO(27, 1, 1, 0),
258 ASIC3_CONFIG_GPIO(28, 1, 1, 0),
259 ASIC3_CONFIG_GPIO(29, 1, 1, 0),
260 ASIC3_CONFIG_GPIO(30, 1, 1, 0),
261 ASIC3_CONFIG_GPIO(31, 1, 1, 0),
262
263 /* GPIOC - CF, LEDs, SD */
264 ASIC3_GPIOC0_LED0, /* red */
265 ASIC3_GPIOC1_LED1, /* green */
266 ASIC3_GPIOC2_LED2, /* blue */
267 ASIC3_GPIOC4_CF_nCD,
268 ASIC3_GPIOC5_nCIOW,
269 ASIC3_GPIOC6_nCIOR,
270 ASIC3_GPIOC7_nPCE_1,
271 ASIC3_GPIOC8_nPCE_2,
272 ASIC3_GPIOC9_nPOE,
273 ASIC3_GPIOC10_nPWE,
274 ASIC3_GPIOC11_PSKTSEL,
275 ASIC3_GPIOC12_nPREG,
276 ASIC3_GPIOC13_nPWAIT,
277 ASIC3_GPIOC14_nPIOIS16,
278 ASIC3_GPIOC15_nPIOR,
279
280 /* GPIOD: input GPIOs, CF */
281 ASIC3_GPIOD11_nCIOIS16,
282 ASIC3_GPIOD12_nCWAIT,
283 ASIC3_GPIOD15_nPIOW,
284};
285
286static struct resource asic3_resources[] = {
287 /* GPIO part */
288 [0] = {
289 .start = ASIC3_PHYS,
290 .end = ASIC3_PHYS + ASIC3_MAP_SIZE_16BIT - 1,
291 .flags = IORESOURCE_MEM,
292 },
293 [1] = {
294 .start = gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ),
295 .end = gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ),
296 .flags = IORESOURCE_IRQ,
297 },
298 /* SD part */
299 [2] = {
300 .start = ASIC3_SD_PHYS,
301 .end = ASIC3_SD_PHYS + ASIC3_MAP_SIZE_16BIT - 1,
302 .flags = IORESOURCE_MEM,
303 },
304 [3] = {
305 .start = gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
306 .end = gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
307 .flags = IORESOURCE_IRQ,
308 },
309};
310
311static struct asic3_platform_data asic3_platform_data = {
312 .gpio_config = asic3_gpio_config,
313 .gpio_config_num = ARRAY_SIZE(asic3_gpio_config),
314 .irq_base = IRQ_BOARD_START,
315 .gpio_base = HX4700_ASIC3_GPIO_BASE,
316};
317
318static struct platform_device asic3 = {
319 .name = "asic3",
320 .id = -1,
321 .resource = asic3_resources,
322 .num_resources = ARRAY_SIZE(asic3_resources),
323 .dev = {
324 .platform_data = &asic3_platform_data,
325 },
326};
327
328/*
329 * EGPIO
330 */
331
332static struct resource egpio_resources[] = {
333 [0] = {
334 .start = PXA_CS5_PHYS,
335 .end = PXA_CS5_PHYS + 0x4 - 1,
336 .flags = IORESOURCE_MEM,
337 },
338};
339
340static struct htc_egpio_chip egpio_chips[] = {
341 [0] = {
342 .reg_start = 0,
343 .gpio_base = HX4700_EGPIO_BASE,
344 .num_gpios = 8,
345 .direction = HTC_EGPIO_OUTPUT,
346 },
347};
348
349static struct htc_egpio_platform_data egpio_info = {
350 .reg_width = 16,
351 .bus_width = 16,
352 .chip = egpio_chips,
353 .num_chips = ARRAY_SIZE(egpio_chips),
354};
355
356static struct platform_device egpio = {
357 .name = "htc-egpio",
358 .id = -1,
359 .resource = egpio_resources,
360 .num_resources = ARRAY_SIZE(egpio_resources),
361 .dev = {
362 .platform_data = &egpio_info,
363 },
364};
365
366/*
367 * LCD - Sony display connected to ATI Imageon w3220
368 */
369
370static int lcd_power;
371
372static void sony_lcd_init(void)
373{
374 gpio_set_value(GPIO84_HX4700_LCD_SQN, 1);
375 gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0);
376 gpio_set_value(GPIO111_HX4700_LCD_AVDD_3V3_ON, 0);
377 gpio_set_value(GPIO70_HX4700_LCD_SLIN1, 0);
378 gpio_set_value(GPIO62_HX4700_LCD_nRESET, 0);
379 mdelay(10);
380 gpio_set_value(GPIO59_HX4700_LCD_PC1, 0);
381 gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0);
382 mdelay(20);
383
384 gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 1);
385 mdelay(5);
386 gpio_set_value(GPIO111_HX4700_LCD_AVDD_3V3_ON, 1);
387
388 /* FIXME: init w3220 registers here */
389
390 mdelay(5);
391 gpio_set_value(GPIO70_HX4700_LCD_SLIN1, 1);
392 mdelay(10);
393 gpio_set_value(GPIO62_HX4700_LCD_nRESET, 1);
394 mdelay(10);
395 gpio_set_value(GPIO59_HX4700_LCD_PC1, 1);
396 mdelay(10);
397 gpio_set_value(GPIO112_HX4700_LCD_N2V7_7V3_ON, 1);
398}
399
400static void sony_lcd_off(void)
401{
402 gpio_set_value(GPIO59_HX4700_LCD_PC1, 0);
403 gpio_set_value(GPIO62_HX4700_LCD_nRESET, 0);
404 mdelay(10);
405 gpio_set_value(GPIO112_HX4700_LCD_N2V7_7V3_ON, 0);
406 mdelay(10);
407 gpio_set_value(GPIO111_HX4700_LCD_AVDD_3V3_ON, 0);
408 mdelay(10);
409 gpio_set_value(GPIO110_HX4700_LCD_LVDD_3V3_ON, 0);
410}
411
412static int hx4700_lcd_set_power(struct lcd_device *ldev, int level)
413{
414 switch (level) {
415 case FB_BLANK_UNBLANK:
416 sony_lcd_init();
417 break;
418 case FB_BLANK_NORMAL:
419 case FB_BLANK_VSYNC_SUSPEND:
420 case FB_BLANK_HSYNC_SUSPEND:
421 case FB_BLANK_POWERDOWN:
422 sony_lcd_off();
423 break;
424 }
425 lcd_power = level;
426 return 0;
427}
428
429static int hx4700_lcd_get_power(struct lcd_device *lm)
430{
431 return lcd_power;
432}
433
434static struct lcd_ops hx4700_lcd_ops = {
435 .get_power = hx4700_lcd_get_power,
436 .set_power = hx4700_lcd_set_power,
437};
438
439static struct lcd_device *hx4700_lcd_device;
440
441#ifdef CONFIG_PM
442static void w3220_lcd_suspend(struct w100fb_par *wfb)
443{
444 sony_lcd_off();
445}
446
447static void w3220_lcd_resume(struct w100fb_par *wfb)
448{
449 sony_lcd_init();
450}
451#else
452#define w3220_lcd_resume NULL
453#define w3220_lcd_suspend NULL
454#endif
455
456static struct w100_tg_info w3220_tg_info = {
457 .suspend = w3220_lcd_suspend,
458 .resume = w3220_lcd_resume,
459};
460
461/* W3220_VGA QVGA */
462static struct w100_gen_regs w3220_regs = {
463 .lcd_format = 0x00000003,
464 .lcdd_cntl1 = 0x00000000,
465 .lcdd_cntl2 = 0x0003ffff,
466 .genlcd_cntl1 = 0x00abf003, /* 0x00fff003 */
467 .genlcd_cntl2 = 0x00000003,
468 .genlcd_cntl3 = 0x000102aa,
469};
470
471static struct w100_mode w3220_modes[] = {
472{
473 .xres = 480,
474 .yres = 640,
475 .left_margin = 15,
476 .right_margin = 16,
477 .upper_margin = 8,
478 .lower_margin = 7,
479 .crtc_ss = 0x00000000,
480 .crtc_ls = 0xa1ff01f9, /* 0x21ff01f9 */
481 .crtc_gs = 0xc0000000, /* 0x40000000 */
482 .crtc_vpos_gs = 0x0000028f,
483 .crtc_ps1_active = 0x00000000, /* 0x41060010 */
484 .crtc_rev = 0,
485 .crtc_dclk = 0x80000000,
486 .crtc_gclk = 0x040a0104,
487 .crtc_goe = 0,
488 .pll_freq = 95,
489 .pixclk_divider = 4,
490 .pixclk_divider_rotated = 4,
491 .pixclk_src = CLK_SRC_PLL,
492 .sysclk_divider = 0,
493 .sysclk_src = CLK_SRC_PLL,
494},
495{
496 .xres = 240,
497 .yres = 320,
498 .left_margin = 9,
499 .right_margin = 8,
500 .upper_margin = 5,
501 .lower_margin = 4,
502 .crtc_ss = 0x80150014,
503 .crtc_ls = 0xa0fb00f7,
504 .crtc_gs = 0xc0080007,
505 .crtc_vpos_gs = 0x00080007,
506 .crtc_rev = 0x0000000a,
507 .crtc_dclk = 0x81700030,
508 .crtc_gclk = 0x8015010f,
509 .crtc_goe = 0x00000000,
510 .pll_freq = 95,
511 .pixclk_divider = 4,
512 .pixclk_divider_rotated = 4,
513 .pixclk_src = CLK_SRC_PLL,
514 .sysclk_divider = 0,
515 .sysclk_src = CLK_SRC_PLL,
516},
517};
518
519struct w100_mem_info w3220_mem_info = {
520 .ext_cntl = 0x09640011,
521 .sdram_mode_reg = 0x00600021,
522 .ext_timing_cntl = 0x1a001545, /* 0x15001545 */
523 .io_cntl = 0x7ddd7333,
524 .size = 0x1fffff,
525};
526
527struct w100_bm_mem_info w3220_bm_mem_info = {
528 .ext_mem_bw = 0x50413e01,
529 .offset = 0,
530 .ext_timing_ctl = 0x00043f7f,
531 .ext_cntl = 0x00000010,
532 .mode_reg = 0x00250000,
533 .io_cntl = 0x0fff0000,
534 .config = 0x08301480,
535};
536
537static struct w100_gpio_regs w3220_gpio_info = {
538 .init_data1 = 0xdfe00100, /* GPIO_DATA */
539 .gpio_dir1 = 0xffff0000, /* GPIO_CNTL1 */
540 .gpio_oe1 = 0x00000000, /* GPIO_CNTL2 */
541 .init_data2 = 0x00000000, /* GPIO_DATA2 */
542 .gpio_dir2 = 0x00000000, /* GPIO_CNTL3 */
543 .gpio_oe2 = 0x00000000, /* GPIO_CNTL4 */
544};
545
546static struct w100fb_mach_info w3220_info = {
547 .tg = &w3220_tg_info,
548 .mem = &w3220_mem_info,
549 .bm_mem = &w3220_bm_mem_info,
550 .gpio = &w3220_gpio_info,
551 .regs = &w3220_regs,
552 .modelist = w3220_modes,
553 .num_modes = 2,
554 .xtal_freq = 16000000,
555};
556
557static struct resource w3220_resources[] = {
558 [0] = {
559 .start = ATI_W3220_PHYS,
560 .end = ATI_W3220_PHYS + 0x00ffffff,
561 .flags = IORESOURCE_MEM,
562 },
563};
564
565static struct platform_device w3220 = {
566 .name = "w100fb",
567 .id = -1,
568 .dev = {
569 .platform_data = &w3220_info,
570 },
571 .num_resources = ARRAY_SIZE(w3220_resources),
572 .resource = w3220_resources,
573};
574
575/*
576 * Backlight
577 */
578
579static struct platform_pwm_backlight_data backlight_data = {
580 .pwm_id = 1,
581 .max_brightness = 200,
582 .dft_brightness = 100,
583 .pwm_period_ns = 30923,
584};
585
586static struct platform_device backlight = {
587 .name = "pwm-backlight",
588 .id = -1,
589 .dev = {
590 .parent = &pxa27x_device_pwm1.dev,
591 .platform_data = &backlight_data,
592 },
593};
594
595/*
596 * USB "Transceiver"
597 */
598
599static struct gpio_vbus_mach_info gpio_vbus_info = {
600 .gpio_pullup = GPIO76_HX4700_USBC_PUEN,
601 .gpio_vbus = GPIOD14_nUSBC_DETECT,
602 .gpio_vbus_inverted = 1,
603};
604
605static struct platform_device gpio_vbus = {
606 .name = "gpio-vbus",
607 .id = -1,
608 .dev = {
609 .platform_data = &gpio_vbus_info,
610 },
611};
612
613/*
614 * Touchscreen - TSC2046 connected to SSP2
615 */
616
617static const struct ads7846_platform_data tsc2046_info = {
618 .model = 7846,
619 .vref_delay_usecs = 100,
620 .pressure_max = 512,
621 .debounce_max = 10,
622 .debounce_tol = 3,
623 .debounce_rep = 1,
624 .gpio_pendown = GPIO58_HX4700_TSC2046_nPENIRQ,
625};
626
627static struct pxa2xx_spi_chip tsc2046_chip = {
628 .tx_threshold = 1,
629 .rx_threshold = 2,
630 .timeout = 64,
631 .gpio_cs = GPIO88_HX4700_TSC2046_CS,
632};
633
634static struct spi_board_info tsc2046_board_info[] __initdata = {
635 {
636 .modalias = "ads7846",
637 .bus_num = 2,
638 .max_speed_hz = 2600000, /* 100 kHz sample rate */
639 .irq = gpio_to_irq(GPIO58_HX4700_TSC2046_nPENIRQ),
640 .platform_data = &tsc2046_info,
641 .controller_data = &tsc2046_chip,
642 },
643};
644
645static struct pxa2xx_spi_master pxa_ssp2_master_info = {
646 .num_chipselect = 1,
647 .clock_enable = CKEN_SSP2,
648 .enable_dma = 1,
649};
650
651/*
652 * External power
653 */
654
655static int power_supply_init(struct device *dev)
656{
657 return gpio_request(GPIOD9_nAC_IN, "AC charger detect");
658}
659
660static int hx4700_is_ac_online(void)
661{
662 return !gpio_get_value(GPIOD9_nAC_IN);
663}
664
665static void power_supply_exit(struct device *dev)
666{
667 gpio_free(GPIOD9_nAC_IN);
668}
669
670static char *hx4700_supplicants[] = {
671 "ds2760-battery.0", "backup-battery"
672};
673
674static struct pda_power_pdata power_supply_info = {
675 .init = power_supply_init,
676 .is_ac_online = hx4700_is_ac_online,
677 .exit = power_supply_exit,
678 .supplied_to = hx4700_supplicants,
679 .num_supplicants = ARRAY_SIZE(hx4700_supplicants),
680};
681
682static struct resource power_supply_resources[] = {
683 [0] = {
684 .name = "ac",
685 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
686 IORESOURCE_IRQ_LOWEDGE,
687 .start = gpio_to_irq(GPIOD9_nAC_IN),
688 .end = gpio_to_irq(GPIOD9_nAC_IN),
689 },
690 [1] = {
691 .name = "usb",
692 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
693 IORESOURCE_IRQ_LOWEDGE,
694 .start = gpio_to_irq(GPIOD14_nUSBC_DETECT),
695 .end = gpio_to_irq(GPIOD14_nUSBC_DETECT),
696 },
697};
698
699static struct platform_device power_supply = {
700 .name = "pda-power",
701 .id = -1,
702 .dev = {
703 .platform_data = &power_supply_info,
704 },
705 .resource = power_supply_resources,
706 .num_resources = ARRAY_SIZE(power_supply_resources),
707};
708
709/*
710 * Battery charger
711 */
712
713static struct regulator_consumer_supply bq24022_consumers[] = {
714 {
715 .dev = &gpio_vbus.dev,
716 .supply = "vbus_draw",
717 },
718 {
719 .dev = &power_supply.dev,
720 .supply = "ac_draw",
721 },
722};
723
724static struct regulator_init_data bq24022_init_data = {
725 .constraints = {
726 .max_uA = 500000,
727 .valid_ops_mask = REGULATOR_CHANGE_CURRENT,
728 },
729 .num_consumer_supplies = ARRAY_SIZE(bq24022_consumers),
730 .consumer_supplies = bq24022_consumers,
731};
732
733static struct bq24022_mach_info bq24022_info = {
734 .gpio_nce = GPIO72_HX4700_BQ24022_nCHARGE_EN,
735 .gpio_iset2 = GPIO96_HX4700_BQ24022_ISET2,
736 .init_data = &bq24022_init_data,
737};
738
739static struct platform_device bq24022 = {
740 .name = "bq24022",
741 .id = -1,
742 .dev = {
743 .platform_data = &bq24022_info,
744 },
745};
746
747/*
748 * StrataFlash
749 */
750
751static void hx4700_set_vpp(struct map_info *map, int vpp)
752{
753 gpio_set_value(GPIO91_HX4700_FLASH_VPEN, vpp);
754}
755
756static struct resource strataflash_resource = {
757 .start = PXA_CS0_PHYS,
758 .end = PXA_CS0_PHYS + SZ_128M - 1,
759 .flags = IORESOURCE_MEM,
760};
761
762static struct physmap_flash_data strataflash_data = {
763 .width = 4,
764 .set_vpp = hx4700_set_vpp,
765};
766
767static struct platform_device strataflash = {
768 .name = "physmap-flash",
769 .id = -1,
770 .resource = &strataflash_resource,
771 .num_resources = 1,
772 .dev = {
773 .platform_data = &strataflash_data,
774 },
775};
776
777/*
778 * PCMCIA
779 */
780
781static struct platform_device pcmcia = {
782 .name = "hx4700-pcmcia",
783 .dev = {
784 .parent = &asic3.dev,
785 },
786};
787
788/*
789 * Platform devices
790 */
791
792static struct platform_device *devices[] __initdata = {
793 &asic3,
794 &gpio_keys,
795 &backlight,
796 &w3220,
797 &egpio,
798 &bq24022,
799 &gpio_vbus,
800 &power_supply,
801 &strataflash,
802 &pcmcia,
803};
804
805struct gpio_ress global_gpios[] = {
806 HX4700_GPIO_IN(GPIO12_HX4700_ASIC3_IRQ, "ASIC3_IRQ"),
807 HX4700_GPIO_IN(GPIO13_HX4700_W3220_IRQ, "W3220_IRQ"),
808 HX4700_GPIO_IN(GPIO14_HX4700_nWLAN_IRQ, "WLAN_IRQ"),
809 HX4700_GPIO_OUT(GPIO59_HX4700_LCD_PC1, 1, "LCD_PC1"),
810 HX4700_GPIO_OUT(GPIO62_HX4700_LCD_nRESET, 1, "LCD_RESET"),
811 HX4700_GPIO_OUT(GPIO70_HX4700_LCD_SLIN1, 1, "LCD_SLIN1"),
812 HX4700_GPIO_OUT(GPIO84_HX4700_LCD_SQN, 1, "LCD_SQN"),
813 HX4700_GPIO_OUT(GPIO110_HX4700_LCD_LVDD_3V3_ON, 1, "LCD_LVDD"),
814 HX4700_GPIO_OUT(GPIO111_HX4700_LCD_AVDD_3V3_ON, 1, "LCD_AVDD"),
815 HX4700_GPIO_OUT(GPIO32_HX4700_RS232_ON, 1, "RS232_ON"),
816 HX4700_GPIO_OUT(GPIO71_HX4700_ASIC3_nRESET, 1, "ASIC3_nRESET"),
817 HX4700_GPIO_OUT(GPIO82_HX4700_EUART_RESET, 1, "EUART_RESET"),
818 HX4700_GPIO_OUT(GPIO105_HX4700_nIR_ON, 1, "nIR_EN"),
819};
820
821static void __init hx4700_init(void)
822{
823 pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config));
824 hx4700_gpio_request(ARRAY_AND_SIZE(global_gpios));
825
826 platform_add_devices(devices, ARRAY_SIZE(devices));
827
828 pxa_set_ficp_info(&ficp_info);
829 pxa27x_set_i2c_power_info(NULL);
830 pxa_set_i2c_info(NULL);
831 pxa2xx_set_spi_info(2, &pxa_ssp2_master_info);
832 spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info));
833
834 hx4700_lcd_device = lcd_device_register("w100fb", NULL,
835 (void *)&w3220_info, &hx4700_lcd_ops);
836
837 gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 0);
838 mdelay(10);
839 gpio_set_value(GPIO71_HX4700_ASIC3_nRESET, 1);
840 mdelay(10);
841}
842
843MACHINE_START(H4700, "HP iPAQ HX4700")
844 .phys_io = 0x40000000,
845 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
846 .boot_params = 0xa0000100,
847 .map_io = pxa_map_io,
848 .init_irq = pxa27x_init_irq,
849 .init_machine = hx4700_init,
850 .timer = &pxa_timer,
851MACHINE_END
diff --git a/arch/arm/mach-pxa/include/mach/hx4700.h b/arch/arm/mach-pxa/include/mach/hx4700.h
new file mode 100644
index 000000000000..9eaeed1f87f1
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/hx4700.h
@@ -0,0 +1,131 @@
1/*
2 * GPIO and IRQ definitions for HP iPAQ hx4700
3 *
4 * Copyright (c) 2008 Philipp Zabel
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#ifndef _HX4700_H_
13#define _HX4700_H_
14
15#include <linux/gpio.h>
16#include <linux/mfd/asic3.h>
17
18#define HX4700_ASIC3_GPIO_BASE NR_BUILTIN_GPIO
19#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS)
20
21/*
22 * PXA GPIOs
23 */
24
25#define GPIO0_HX4700_nKEY_POWER 0
26#define GPIO12_HX4700_ASIC3_IRQ 12
27#define GPIO13_HX4700_W3220_IRQ 13
28#define GPIO14_HX4700_nWLAN_IRQ 14
29#define GPIO18_HX4700_RDY 18
30#define GPIO22_HX4700_LCD_RL 22
31#define GPIO27_HX4700_CODEC_ON 27
32#define GPIO32_HX4700_RS232_ON 32
33#define GPIO52_HX4700_CPU_nBATT_FAULT 52
34#define GPIO58_HX4700_TSC2046_nPENIRQ 58
35#define GPIO59_HX4700_LCD_PC1 59
36#define GPIO60_HX4700_CF_RNB 60
37#define GPIO61_HX4700_W3220_nRESET 61
38#define GPIO62_HX4700_LCD_nRESET 62
39#define GPIO63_HX4700_CPU_SS_nRESET 63
40#define GPIO65_HX4700_TSC2046_PEN_PU 65
41#define GPIO66_HX4700_ASIC3_nSDIO_IRQ 66
42#define GPIO67_HX4700_EUART_PS 67
43#define GPIO70_HX4700_LCD_SLIN1 70
44#define GPIO71_HX4700_ASIC3_nRESET 71
45#define GPIO72_HX4700_BQ24022_nCHARGE_EN 72
46#define GPIO73_HX4700_LCD_UD_1 73
47#define GPIO75_HX4700_EARPHONE_nDET 75
48#define GPIO76_HX4700_USBC_PUEN 76
49#define GPIO81_HX4700_CPU_GP_nRESET 81
50#define GPIO82_HX4700_EUART_RESET 82
51#define GPIO83_HX4700_WLAN_nRESET 83
52#define GPIO84_HX4700_LCD_SQN 84
53#define GPIO85_HX4700_nPCE1 85
54#define GPIO88_HX4700_TSC2046_CS 88
55#define GPIO91_HX4700_FLASH_VPEN 91
56#define GPIO92_HX4700_HP_DRIVER 92
57#define GPIO93_HX4700_EUART_INT 93
58#define GPIO94_HX4700_KEY_MAIL 94
59#define GPIO95_HX4700_BATT_OFF 95
60#define GPIO96_HX4700_BQ24022_ISET2 96
61#define GPIO97_HX4700_nBL_DETECT 97
62#define GPIO99_HX4700_KEY_CONTACTS 99
63#define GPIO100_HX4700_AUTO_SENSE 100 /* BL auto brightness */
64#define GPIO102_HX4700_SYNAPTICS_POWER_ON 102
65#define GPIO103_HX4700_SYNAPTICS_INT 103
66#define GPIO105_HX4700_nIR_ON 105
67#define GPIO106_HX4700_CPU_BT_nRESET 106
68#define GPIO107_HX4700_SPK_nSD 107
69#define GPIO109_HX4700_CODEC_nPDN 109
70#define GPIO110_HX4700_LCD_LVDD_3V3_ON 110
71#define GPIO111_HX4700_LCD_AVDD_3V3_ON 111
72#define GPIO112_HX4700_LCD_N2V7_7V3_ON 112
73#define GPIO114_HX4700_CF_RESET 114
74#define GPIO116_HX4700_CPU_HW_nRESET 116
75
76/*
77 * ASIC3 GPIOs
78 */
79
80#define GPIOC_BASE (HX4700_ASIC3_GPIO_BASE + 32)
81#define GPIOD_BASE (HX4700_ASIC3_GPIO_BASE + 48)
82
83#define GPIOC0_LED_RED (GPIOC_BASE + 0)
84#define GPIOC1_LED_GREEN (GPIOC_BASE + 1)
85#define GPIOC2_LED_BLUE (GPIOC_BASE + 2)
86#define GPIOC3_nSD_CS (GPIOC_BASE + 3)
87#define GPIOC4_CF_nCD (GPIOC_BASE + 4) /* Input */
88#define GPIOC5_nCIOW (GPIOC_BASE + 5) /* Output, to CF */
89#define GPIOC6_nCIOR (GPIOC_BASE + 6) /* Output, to CF */
90#define GPIOC7_nPCE1 (GPIOC_BASE + 7) /* Input, from CPU */
91#define GPIOC8_nPCE2 (GPIOC_BASE + 8) /* Input, from CPU */
92#define GPIOC9_nPOE (GPIOC_BASE + 9) /* Input, from CPU */
93#define GPIOC10_CF_nPWE (GPIOC_BASE + 10) /* Input */
94#define GPIOC11_PSKTSEL (GPIOC_BASE + 11) /* Input, from CPU */
95#define GPIOC12_nPREG (GPIOC_BASE + 12) /* Input, from CPU */
96#define GPIOC13_nPWAIT (GPIOC_BASE + 13) /* Output, to CPU */
97#define GPIOC14_nPIOIS16 (GPIOC_BASE + 14) /* Output, to CPU */
98#define GPIOC15_nPIOR (GPIOC_BASE + 15) /* Input, from CPU */
99
100#define GPIOD0_CPU_SS_INT (GPIOD_BASE + 0) /* Input */
101#define GPIOD1_nKEY_CALENDAR (GPIOD_BASE + 1)
102#define GPIOD2_BLUETOOTH_WAKEUP (GPIOD_BASE + 2)
103#define GPIOD3_nKEY_HOME (GPIOD_BASE + 3)
104#define GPIOD4_CF_nCD (GPIOD_BASE + 4) /* Input, from CF */
105#define GPIOD5_nPIO (GPIOD_BASE + 5) /* Input */
106#define GPIOD6_nKEY_RECORD (GPIOD_BASE + 6)
107#define GPIOD7_nSDIO_DETECT (GPIOD_BASE + 7)
108#define GPIOD8_COM_DCD (GPIOD_BASE + 8) /* Input */
109#define GPIOD9_nAC_IN (GPIOD_BASE + 9)
110#define GPIOD10_nSDIO_IRQ (GPIOD_BASE + 10) /* Input */
111#define GPIOD11_nCIOIS16 (GPIOD_BASE + 11) /* Input, from CF */
112#define GPIOD12_nCWAIT (GPIOD_BASE + 12) /* Input, from CF */
113#define GPIOD13_CF_RNB (GPIOD_BASE + 13) /* Input */
114#define GPIOD14_nUSBC_DETECT (GPIOD_BASE + 14)
115#define GPIOD15_nPIOW (GPIOD_BASE + 15) /* Input, from CPU */
116
117/*
118 * EGPIOs
119 */
120
121#define EGPIO0_VCC_3V3_EN (HX4700_EGPIO_BASE + 0) /* WLAN support chip */
122#define EGPIO1_WL_VREG_EN (HX4700_EGPIO_BASE + 1) /* WLAN power */
123#define EGPIO2_VCC_2V1_WL_EN (HX4700_EGPIO_BASE + 2) /* unused */
124#define EGPIO3_SS_PWR_ON (HX4700_EGPIO_BASE + 3) /* smart slot power */
125#define EGPIO4_CF_3V3_ON (HX4700_EGPIO_BASE + 4) /* CF 3.3V enable */
126#define EGPIO5_BT_3V3_ON (HX4700_EGPIO_BASE + 5) /* BT 3.3V enable */
127#define EGPIO6_WL1V8_EN (HX4700_EGPIO_BASE + 6) /* WLAN 1.8V enable */
128#define EGPIO7_VCC_3V3_WL_EN (HX4700_EGPIO_BASE + 7) /* WLAN 3.3V enable */
129#define EGPIO8_USB_3V3_ON (HX4700_EGPIO_BASE + 8) /* unused */
130
131#endif /* _HX4700_H_ */
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index ebf38bbb347f..6a1d95993342 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -101,7 +101,9 @@
101 */ 101 */
102#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM) 102#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM)
103 103
104#if defined(CONFIG_MACH_ZYLONITE) 104#if defined(CONFIG_MACH_H4700)
105#define IRQ_BOARD_END (IRQ_BOARD_START + 70)
106#elif defined(CONFIG_MACH_ZYLONITE)
105#define IRQ_BOARD_END (IRQ_BOARD_START + 32) 107#define IRQ_BOARD_END (IRQ_BOARD_START + 32)
106#else 108#else
107#define IRQ_BOARD_END (IRQ_BOARD_START + 16) 109#define IRQ_BOARD_END (IRQ_BOARD_START + 16)
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-26 18:58:13 -0500