diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/boot/dts/at91sam9263.dtsi | 5 | ||||
-rw-r--r-- | arch/arm/boot/dts/socfpga.dtsi | 12 | ||||
-rw-r--r-- | arch/arm/boot/dts/socfpga_arria5.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/socfpga_arria5_socdk.dts | 12 | ||||
-rw-r--r-- | arch/arm/boot/dts/socfpga_cyclone5_socdk.dts | 15 | ||||
-rw-r--r-- | arch/arm/boot/dts/socfpga_cyclone5_sockit.dts | 12 | ||||
-rw-r--r-- | arch/arm/boot/dts/zynq-7000.dtsi | 24 | ||||
-rw-r--r-- | arch/arm/configs/multi_v7_defconfig | 1 | ||||
-rw-r--r-- | arch/arm/configs/sunxi_defconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-socfpga/core.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-socfpga/headsmp.S | 25 | ||||
-rw-r--r-- | arch/arm/mach-socfpga/platsmp.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-socfpga/socfpga.c | 4 |
13 files changed, 87 insertions, 32 deletions
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi index d68b3c4862bc..51416c7d0625 100644 --- a/arch/arm/boot/dts/at91sam9263.dtsi +++ b/arch/arm/boot/dts/at91sam9263.dtsi | |||
@@ -122,9 +122,10 @@ | |||
122 | interrupts-extended = <&pmc AT91_PMC_LOCKB>; | 122 | interrupts-extended = <&pmc AT91_PMC_LOCKB>; |
123 | clocks = <&main>; | 123 | clocks = <&main>; |
124 | reg = <1>; | 124 | reg = <1>; |
125 | atmel,clk-input-range = <1000000 5000000>; | 125 | atmel,clk-input-range = <1000000 32000000>; |
126 | #atmel,pll-clk-output-range-cells = <4>; | 126 | #atmel,pll-clk-output-range-cells = <4>; |
127 | atmel,pll-clk-output-ranges = <70000000 130000000 1 1>; | 127 | atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, |
128 | <190000000 240000000 2 1>; | ||
128 | }; | 129 | }; |
129 | 130 | ||
130 | mck: masterck { | 131 | mck: masterck { |
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 45fce2cf6fed..4472fd92685c 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi | |||
@@ -547,7 +547,7 @@ | |||
547 | status = "disabled"; | 547 | status = "disabled"; |
548 | }; | 548 | }; |
549 | 549 | ||
550 | gpio@ff708000 { | 550 | gpio0: gpio@ff708000 { |
551 | #address-cells = <1>; | 551 | #address-cells = <1>; |
552 | #size-cells = <0>; | 552 | #size-cells = <0>; |
553 | compatible = "snps,dw-apb-gpio"; | 553 | compatible = "snps,dw-apb-gpio"; |
@@ -555,7 +555,7 @@ | |||
555 | clocks = <&per_base_clk>; | 555 | clocks = <&per_base_clk>; |
556 | status = "disabled"; | 556 | status = "disabled"; |
557 | 557 | ||
558 | gpio0: gpio-controller@0 { | 558 | porta: gpio-controller@0 { |
559 | compatible = "snps,dw-apb-gpio-port"; | 559 | compatible = "snps,dw-apb-gpio-port"; |
560 | gpio-controller; | 560 | gpio-controller; |
561 | #gpio-cells = <2>; | 561 | #gpio-cells = <2>; |
@@ -567,7 +567,7 @@ | |||
567 | }; | 567 | }; |
568 | }; | 568 | }; |
569 | 569 | ||
570 | gpio@ff709000 { | 570 | gpio1: gpio@ff709000 { |
571 | #address-cells = <1>; | 571 | #address-cells = <1>; |
572 | #size-cells = <0>; | 572 | #size-cells = <0>; |
573 | compatible = "snps,dw-apb-gpio"; | 573 | compatible = "snps,dw-apb-gpio"; |
@@ -575,7 +575,7 @@ | |||
575 | clocks = <&per_base_clk>; | 575 | clocks = <&per_base_clk>; |
576 | status = "disabled"; | 576 | status = "disabled"; |
577 | 577 | ||
578 | gpio1: gpio-controller@0 { | 578 | portb: gpio-controller@0 { |
579 | compatible = "snps,dw-apb-gpio-port"; | 579 | compatible = "snps,dw-apb-gpio-port"; |
580 | gpio-controller; | 580 | gpio-controller; |
581 | #gpio-cells = <2>; | 581 | #gpio-cells = <2>; |
@@ -587,7 +587,7 @@ | |||
587 | }; | 587 | }; |
588 | }; | 588 | }; |
589 | 589 | ||
590 | gpio@ff70a000 { | 590 | gpio2: gpio@ff70a000 { |
591 | #address-cells = <1>; | 591 | #address-cells = <1>; |
592 | #size-cells = <0>; | 592 | #size-cells = <0>; |
593 | compatible = "snps,dw-apb-gpio"; | 593 | compatible = "snps,dw-apb-gpio"; |
@@ -595,7 +595,7 @@ | |||
595 | clocks = <&per_base_clk>; | 595 | clocks = <&per_base_clk>; |
596 | status = "disabled"; | 596 | status = "disabled"; |
597 | 597 | ||
598 | gpio2: gpio-controller@0 { | 598 | portc: gpio-controller@0 { |
599 | compatible = "snps,dw-apb-gpio-port"; | 599 | compatible = "snps,dw-apb-gpio-port"; |
600 | gpio-controller; | 600 | gpio-controller; |
601 | #gpio-cells = <2>; | 601 | #gpio-cells = <2>; |
diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi b/arch/arm/boot/dts/socfpga_arria5.dtsi index 03e8268ae219..1907cc600452 100644 --- a/arch/arm/boot/dts/socfpga_arria5.dtsi +++ b/arch/arm/boot/dts/socfpga_arria5.dtsi | |||
@@ -29,7 +29,7 @@ | |||
29 | }; | 29 | }; |
30 | }; | 30 | }; |
31 | 31 | ||
32 | dwmmc0@ff704000 { | 32 | mmc0: dwmmc0@ff704000 { |
33 | num-slots = <1>; | 33 | num-slots = <1>; |
34 | broken-cd; | 34 | broken-cd; |
35 | bus-width = <4>; | 35 | bus-width = <4>; |
diff --git a/arch/arm/boot/dts/socfpga_arria5_socdk.dts b/arch/arm/boot/dts/socfpga_arria5_socdk.dts index 27d551c384d0..ccaf41742fc3 100644 --- a/arch/arm/boot/dts/socfpga_arria5_socdk.dts +++ b/arch/arm/boot/dts/socfpga_arria5_socdk.dts | |||
@@ -37,6 +37,13 @@ | |||
37 | */ | 37 | */ |
38 | ethernet0 = &gmac1; | 38 | ethernet0 = &gmac1; |
39 | }; | 39 | }; |
40 | |||
41 | regulator_3_3v: 3-3-v-regulator { | ||
42 | compatible = "regulator-fixed"; | ||
43 | regulator-name = "3.3V"; | ||
44 | regulator-min-microvolt = <3300000>; | ||
45 | regulator-max-microvolt = <3300000>; | ||
46 | }; | ||
40 | }; | 47 | }; |
41 | 48 | ||
42 | &gmac1 { | 49 | &gmac1 { |
@@ -68,6 +75,11 @@ | |||
68 | }; | 75 | }; |
69 | }; | 76 | }; |
70 | 77 | ||
78 | &mmc0 { | ||
79 | vmmc-supply = <®ulator_3_3v>; | ||
80 | vqmmc-supply = <®ulator_3_3v>; | ||
81 | }; | ||
82 | |||
71 | &usb1 { | 83 | &usb1 { |
72 | status = "okay"; | 84 | status = "okay"; |
73 | }; | 85 | }; |
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts index d7296a5f750c..258865da8f6a 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts +++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts | |||
@@ -37,6 +37,13 @@ | |||
37 | */ | 37 | */ |
38 | ethernet0 = &gmac1; | 38 | ethernet0 = &gmac1; |
39 | }; | 39 | }; |
40 | |||
41 | regulator_3_3v: 3-3-v-regulator { | ||
42 | compatible = "regulator-fixed"; | ||
43 | regulator-name = "3.3V"; | ||
44 | regulator-min-microvolt = <3300000>; | ||
45 | regulator-max-microvolt = <3300000>; | ||
46 | }; | ||
40 | }; | 47 | }; |
41 | 48 | ||
42 | &gmac1 { | 49 | &gmac1 { |
@@ -53,6 +60,10 @@ | |||
53 | rxc-skew-ps = <2000>; | 60 | rxc-skew-ps = <2000>; |
54 | }; | 61 | }; |
55 | 62 | ||
63 | &gpio1 { | ||
64 | status = "okay"; | ||
65 | }; | ||
66 | |||
56 | &i2c0 { | 67 | &i2c0 { |
57 | status = "okay"; | 68 | status = "okay"; |
58 | 69 | ||
@@ -69,7 +80,9 @@ | |||
69 | }; | 80 | }; |
70 | 81 | ||
71 | &mmc0 { | 82 | &mmc0 { |
72 | cd-gpios = <&gpio1 18 0>; | 83 | cd-gpios = <&portb 18 0>; |
84 | vmmc-supply = <®ulator_3_3v>; | ||
85 | vqmmc-supply = <®ulator_3_3v>; | ||
73 | }; | 86 | }; |
74 | 87 | ||
75 | &usb1 { | 88 | &usb1 { |
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts index d26f155f5fd9..16ea6f5f2ab8 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts +++ b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts | |||
@@ -37,6 +37,13 @@ | |||
37 | */ | 37 | */ |
38 | ethernet0 = &gmac1; | 38 | ethernet0 = &gmac1; |
39 | }; | 39 | }; |
40 | |||
41 | regulator_3_3v: vcc3p3-regulator { | ||
42 | compatible = "regulator-fixed"; | ||
43 | regulator-name = "VCC3P3"; | ||
44 | regulator-min-microvolt = <3300000>; | ||
45 | regulator-max-microvolt = <3300000>; | ||
46 | }; | ||
40 | }; | 47 | }; |
41 | 48 | ||
42 | &gmac1 { | 49 | &gmac1 { |
@@ -53,6 +60,11 @@ | |||
53 | rxc-skew-ps = <2000>; | 60 | rxc-skew-ps = <2000>; |
54 | }; | 61 | }; |
55 | 62 | ||
63 | &mmc0 { | ||
64 | vmmc-supply = <®ulator_3_3v>; | ||
65 | vqmmc-supply = <®ulator_3_3v>; | ||
66 | }; | ||
67 | |||
56 | &usb1 { | 68 | &usb1 { |
57 | status = "okay"; | 69 | status = "okay"; |
58 | }; | 70 | }; |
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 24036c440440..ce2ef5bec4f2 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi | |||
@@ -30,7 +30,6 @@ | |||
30 | /* kHz uV */ | 30 | /* kHz uV */ |
31 | 666667 1000000 | 31 | 666667 1000000 |
32 | 333334 1000000 | 32 | 333334 1000000 |
33 | 222223 1000000 | ||
34 | >; | 33 | >; |
35 | }; | 34 | }; |
36 | 35 | ||
@@ -65,7 +64,7 @@ | |||
65 | interrupt-parent = <&intc>; | 64 | interrupt-parent = <&intc>; |
66 | ranges; | 65 | ranges; |
67 | 66 | ||
68 | adc@f8007100 { | 67 | adc: adc@f8007100 { |
69 | compatible = "xlnx,zynq-xadc-1.00.a"; | 68 | compatible = "xlnx,zynq-xadc-1.00.a"; |
70 | reg = <0xf8007100 0x20>; | 69 | reg = <0xf8007100 0x20>; |
71 | interrupts = <0 7 4>; | 70 | interrupts = <0 7 4>; |
@@ -137,7 +136,7 @@ | |||
137 | <0xF8F00100 0x100>; | 136 | <0xF8F00100 0x100>; |
138 | }; | 137 | }; |
139 | 138 | ||
140 | L2: cache-controller { | 139 | L2: cache-controller@f8f02000 { |
141 | compatible = "arm,pl310-cache"; | 140 | compatible = "arm,pl310-cache"; |
142 | reg = <0xF8F02000 0x1000>; | 141 | reg = <0xF8F02000 0x1000>; |
143 | arm,data-latency = <3 2 2>; | 142 | arm,data-latency = <3 2 2>; |
@@ -146,10 +145,10 @@ | |||
146 | cache-level = <2>; | 145 | cache-level = <2>; |
147 | }; | 146 | }; |
148 | 147 | ||
149 | memory-controller@f8006000 { | 148 | mc: memory-controller@f8006000 { |
150 | compatible = "xlnx,zynq-ddrc-a05"; | 149 | compatible = "xlnx,zynq-ddrc-a05"; |
151 | reg = <0xf8006000 0x1000>; | 150 | reg = <0xf8006000 0x1000>; |
152 | } ; | 151 | }; |
153 | 152 | ||
154 | uart0: serial@e0000000 { | 153 | uart0: serial@e0000000 { |
155 | compatible = "xlnx,xuartps", "cdns,uart-r1p8"; | 154 | compatible = "xlnx,xuartps", "cdns,uart-r1p8"; |
@@ -195,7 +194,7 @@ | |||
195 | 194 | ||
196 | gem0: ethernet@e000b000 { | 195 | gem0: ethernet@e000b000 { |
197 | compatible = "cdns,gem"; | 196 | compatible = "cdns,gem"; |
198 | reg = <0xe000b000 0x4000>; | 197 | reg = <0xe000b000 0x1000>; |
199 | status = "disabled"; | 198 | status = "disabled"; |
200 | interrupts = <0 22 4>; | 199 | interrupts = <0 22 4>; |
201 | clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>; | 200 | clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>; |
@@ -206,7 +205,7 @@ | |||
206 | 205 | ||
207 | gem1: ethernet@e000c000 { | 206 | gem1: ethernet@e000c000 { |
208 | compatible = "cdns,gem"; | 207 | compatible = "cdns,gem"; |
209 | reg = <0xe000c000 0x4000>; | 208 | reg = <0xe000c000 0x1000>; |
210 | status = "disabled"; | 209 | status = "disabled"; |
211 | interrupts = <0 45 4>; | 210 | interrupts = <0 45 4>; |
212 | clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>; | 211 | clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>; |
@@ -315,5 +314,16 @@ | |||
315 | reg = <0xf8f00600 0x20>; | 314 | reg = <0xf8f00600 0x20>; |
316 | clocks = <&clkc 4>; | 315 | clocks = <&clkc 4>; |
317 | }; | 316 | }; |
317 | |||
318 | watchdog0: watchdog@f8005000 { | ||
319 | clocks = <&clkc 45>; | ||
320 | compatible = "xlnx,zynq-wdt-r1p2"; | ||
321 | device_type = "watchdog"; | ||
322 | interrupt-parent = <&intc>; | ||
323 | interrupts = <0 9 1>; | ||
324 | reg = <0xf8005000 0x1000>; | ||
325 | reset = <0>; | ||
326 | timeout-sec = <10>; | ||
327 | }; | ||
318 | }; | 328 | }; |
319 | }; | 329 | }; |
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index 491b7d5523bf..709ecc9009ec 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig | |||
@@ -353,6 +353,7 @@ CONFIG_MMC_MVSDIO=y | |||
353 | CONFIG_MMC_SUNXI=y | 353 | CONFIG_MMC_SUNXI=y |
354 | CONFIG_MMC_DW=y | 354 | CONFIG_MMC_DW=y |
355 | CONFIG_MMC_DW_EXYNOS=y | 355 | CONFIG_MMC_DW_EXYNOS=y |
356 | CONFIG_MMC_DW_ROCKCHIP=y | ||
356 | CONFIG_NEW_LEDS=y | 357 | CONFIG_NEW_LEDS=y |
357 | CONFIG_LEDS_CLASS=y | 358 | CONFIG_LEDS_CLASS=y |
358 | CONFIG_LEDS_GPIO=y | 359 | CONFIG_LEDS_GPIO=y |
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig index 847045313101..f7ac0379850f 100644 --- a/arch/arm/configs/sunxi_defconfig +++ b/arch/arm/configs/sunxi_defconfig | |||
@@ -76,6 +76,7 @@ CONFIG_WATCHDOG=y | |||
76 | CONFIG_SUNXI_WATCHDOG=y | 76 | CONFIG_SUNXI_WATCHDOG=y |
77 | CONFIG_MFD_AXP20X=y | 77 | CONFIG_MFD_AXP20X=y |
78 | CONFIG_REGULATOR=y | 78 | CONFIG_REGULATOR=y |
79 | CONFIG_REGULATOR_FIXED_VOLTAGE=y | ||
79 | CONFIG_REGULATOR_GPIO=y | 80 | CONFIG_REGULATOR_GPIO=y |
80 | CONFIG_USB=y | 81 | CONFIG_USB=y |
81 | CONFIG_USB_EHCI_HCD=y | 82 | CONFIG_USB_EHCI_HCD=y |
diff --git a/arch/arm/mach-socfpga/core.h b/arch/arm/mach-socfpga/core.h index 572b8f719ffb..60c443dadb58 100644 --- a/arch/arm/mach-socfpga/core.h +++ b/arch/arm/mach-socfpga/core.h | |||
@@ -40,7 +40,7 @@ extern void __iomem *rst_manager_base_addr; | |||
40 | extern struct smp_operations socfpga_smp_ops; | 40 | extern struct smp_operations socfpga_smp_ops; |
41 | extern char secondary_trampoline, secondary_trampoline_end; | 41 | extern char secondary_trampoline, secondary_trampoline_end; |
42 | 42 | ||
43 | extern unsigned long cpu1start_addr; | 43 | extern unsigned long socfpga_cpu1start_addr; |
44 | 44 | ||
45 | #define SOCFPGA_SCU_VIRT_BASE 0xfffec000 | 45 | #define SOCFPGA_SCU_VIRT_BASE 0xfffec000 |
46 | 46 | ||
diff --git a/arch/arm/mach-socfpga/headsmp.S b/arch/arm/mach-socfpga/headsmp.S index 95c115d8b5ee..f65ea0af4af3 100644 --- a/arch/arm/mach-socfpga/headsmp.S +++ b/arch/arm/mach-socfpga/headsmp.S | |||
@@ -9,21 +9,26 @@ | |||
9 | */ | 9 | */ |
10 | #include <linux/linkage.h> | 10 | #include <linux/linkage.h> |
11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
12 | #include <asm/memory.h> | ||
12 | 13 | ||
13 | .arch armv7-a | 14 | .arch armv7-a |
14 | 15 | ||
15 | ENTRY(secondary_trampoline) | 16 | ENTRY(secondary_trampoline) |
16 | movw r2, #:lower16:cpu1start_addr | 17 | /* CPU1 will always fetch from 0x0 when it is brought out of reset. |
17 | movt r2, #:upper16:cpu1start_addr | 18 | * Thus, we can just subtract the PAGE_OFFSET to get the physical |
18 | 19 | * address of &cpu1start_addr. This would not work for platforms | |
19 | /* The socfpga VT cannot handle a 0xC0000000 page offset when loading | 20 | * where the physical memory does not start at 0x0. |
20 | the cpu1start_addr, we bit clear it. Tested on HW and VT. */ | 21 | */ |
21 | bic r2, r2, #0x40000000 | 22 | adr r0, 1f |
22 | 23 | ldmia r0, {r1, r2} | |
23 | ldr r0, [r2] | 24 | sub r2, r2, #PAGE_OFFSET |
24 | ldr r1, [r0] | 25 | ldr r3, [r2] |
25 | bx r1 | 26 | ldr r4, [r3] |
27 | bx r4 | ||
26 | 28 | ||
29 | .align | ||
30 | 1: .long . | ||
31 | .long socfpga_cpu1start_addr | ||
27 | ENTRY(secondary_trampoline_end) | 32 | ENTRY(secondary_trampoline_end) |
28 | 33 | ||
29 | ENTRY(socfpga_secondary_startup) | 34 | ENTRY(socfpga_secondary_startup) |
diff --git a/arch/arm/mach-socfpga/platsmp.c b/arch/arm/mach-socfpga/platsmp.c index 5356a72bc8ce..16ca97b039f9 100644 --- a/arch/arm/mach-socfpga/platsmp.c +++ b/arch/arm/mach-socfpga/platsmp.c | |||
@@ -33,11 +33,11 @@ static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle) | |||
33 | { | 33 | { |
34 | int trampoline_size = &secondary_trampoline_end - &secondary_trampoline; | 34 | int trampoline_size = &secondary_trampoline_end - &secondary_trampoline; |
35 | 35 | ||
36 | if (cpu1start_addr) { | 36 | if (socfpga_cpu1start_addr) { |
37 | memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size); | 37 | memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size); |
38 | 38 | ||
39 | __raw_writel(virt_to_phys(socfpga_secondary_startup), | 39 | __raw_writel(virt_to_phys(socfpga_secondary_startup), |
40 | (sys_manager_base_addr + (cpu1start_addr & 0x000000ff))); | 40 | (sys_manager_base_addr + (socfpga_cpu1start_addr & 0x000000ff))); |
41 | 41 | ||
42 | flush_cache_all(); | 42 | flush_cache_all(); |
43 | smp_wmb(); | 43 | smp_wmb(); |
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c index adbf38314ca8..383d61e138af 100644 --- a/arch/arm/mach-socfpga/socfpga.c +++ b/arch/arm/mach-socfpga/socfpga.c | |||
@@ -29,7 +29,7 @@ | |||
29 | void __iomem *socfpga_scu_base_addr = ((void __iomem *)(SOCFPGA_SCU_VIRT_BASE)); | 29 | void __iomem *socfpga_scu_base_addr = ((void __iomem *)(SOCFPGA_SCU_VIRT_BASE)); |
30 | void __iomem *sys_manager_base_addr; | 30 | void __iomem *sys_manager_base_addr; |
31 | void __iomem *rst_manager_base_addr; | 31 | void __iomem *rst_manager_base_addr; |
32 | unsigned long cpu1start_addr; | 32 | unsigned long socfpga_cpu1start_addr; |
33 | 33 | ||
34 | static struct map_desc scu_io_desc __initdata = { | 34 | static struct map_desc scu_io_desc __initdata = { |
35 | .virtual = SOCFPGA_SCU_VIRT_BASE, | 35 | .virtual = SOCFPGA_SCU_VIRT_BASE, |
@@ -70,7 +70,7 @@ void __init socfpga_sysmgr_init(void) | |||
70 | np = of_find_compatible_node(NULL, NULL, "altr,sys-mgr"); | 70 | np = of_find_compatible_node(NULL, NULL, "altr,sys-mgr"); |
71 | 71 | ||
72 | if (of_property_read_u32(np, "cpu1-start-addr", | 72 | if (of_property_read_u32(np, "cpu1-start-addr", |
73 | (u32 *) &cpu1start_addr)) | 73 | (u32 *) &socfpga_cpu1start_addr)) |
74 | pr_err("SMP: Need cpu1-start-addr in device tree.\n"); | 74 | pr_err("SMP: Need cpu1-start-addr in device tree.\n"); |
75 | 75 | ||
76 | sys_manager_base_addr = of_iomap(np, 0); | 76 | sys_manager_base_addr = of_iomap(np, 0); |