128 files changed, 710 insertions, 1337 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 73067efd4845..9759fec0b704 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -547,6 +547,7 @@ config ARCH_KIRKWOOD
         select CPU_FEROCEON
         select GENERIC_CLOCKEVENTS
         select PCI
+        select PCI_QUIRKS
         select PLAT_ORION_LEGACY
         help
           Support for the following Marvell Kirkwood series SoCs:
@@ -1603,8 +1604,8 @@ config NR_CPUS
         default "4"
 
 config HOTPLUG_CPU
-        bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
-        depends on SMP && HOTPLUG && EXPERIMENTAL
+        bool "Support for hot-pluggable CPUs"
+        depends on SMP && HOTPLUG
         help
           Say Y here to experiment with turning CPUs off and on.  CPUs
           can be controlled through /sys/devices/system/cpu.
@@ -1645,8 +1646,8 @@ config HZ
         default 100
 
 config THUMB2_KERNEL
-        bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
-        depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
+        bool "Compile the kernel in Thumb-2 mode"
+        depends on CPU_V7 && !CPU_V6 && !CPU_V6K
         select AEABI
         select ARM_ASM_UNIFIED
         select ARM_UNWIND
@@ -1850,6 +1851,7 @@ config XEN_DOM0
 config XEN
         bool "Xen guest support on ARM (EXPERIMENTAL)"
         depends on EXPERIMENTAL && ARM && OF
+        depends on CPU_V7 && !CPU_V6
         help
           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
 
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index f023e3acdfbd..5f914fca911b 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -21,8 +21,6 @@ endif
 OBJCOPYFLAGS    :=-O binary -R .comment -S
 GZFLAGS         :=-9
 #KBUILD_CFLAGS  +=-pipe
-# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb:
-KBUILD_CFLAGS   +=$(call cc-option,-marm,)
 
 # Never generate .eh_frame
 KBUILD_CFLAGS   += $(call cc-option,-fno-dwarf2-cfi-asm)
@@ -105,17 +103,20 @@ endif
 ifeq ($(CONFIG_THUMB2_KERNEL),y)
 AFLAGS_AUTOIT   :=$(call as-option,-Wa$(comma)-mimplicit-it=always,-Wa$(comma)-mauto-it)
 AFLAGS_NOWARN   :=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W)
-CFLAGS_THUMB2   :=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN)
-AFLAGS_THUMB2   :=$(CFLAGS_THUMB2) -Wa$(comma)-mthumb
+CFLAGS_ISA      :=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN)
+AFLAGS_ISA      :=$(CFLAGS_ISA) -Wa$(comma)-mthumb
 # Work around buggy relocation from gas if requested:
 ifeq ($(CONFIG_THUMB2_AVOID_R_ARM_THM_JUMP11),y)
 CFLAGS_MODULE   +=-fno-optimize-sibling-calls
 endif
+else
+CFLAGS_ISA      :=$(call cc-option,-marm,)
+AFLAGS_ISA      :=$(CFLAGS_ISA)
 endif
 
 # Need -Uarm for gcc < 3.x
-KBUILD_CFLAGS   +=$(CFLAGS_ABI) $(CFLAGS_THUMB2) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm
-KBUILD_AFLAGS   +=$(CFLAGS_ABI) $(AFLAGS_THUMB2) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float
+KBUILD_CFLAGS   +=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm
+KBUILD_AFLAGS   +=$(CFLAGS_ABI) $(AFLAGS_ISA) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float
 
 CHECKFLAGS      += -D__arm__
 
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
index 3fdab016aa5c..9137df539b61 100644
--- a/arch/arm/boot/Makefile
+++ b/arch/arm/boot/Makefile
@@ -33,7 +33,7 @@ ifeq ($(CONFIG_XIP_KERNEL),y)
 
 $(obj)/xipImage: vmlinux FORCE
         $(call if_changed,objcopy)
-        @echo '  Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))'
+        @$(kecho) '  Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))'
 
 $(obj)/Image $(obj)/zImage: FORCE
         @echo 'Kernel configured for XIP (CONFIG_XIP_KERNEL=y)'
@@ -48,14 +48,14 @@ $(obj)/xipImage: FORCE
 
 $(obj)/Image: vmlinux FORCE
         $(call if_changed,objcopy)
-        @echo '  Kernel: $@ is ready'
+        @$(kecho) '  Kernel: $@ is ready'
 
 $(obj)/compressed/vmlinux: $(obj)/Image FORCE
         $(Q)$(MAKE) $(build)=$(obj)/compressed $@
 
 $(obj)/zImage:  $(obj)/compressed/vmlinux FORCE
         $(call if_changed,objcopy)
-        @echo '  Kernel: $@ is ready'
+        @$(kecho) '  Kernel: $@ is ready'
 
 endif
 
@@ -90,7 +90,7 @@ fi
 $(obj)/uImage:  $(obj)/zImage FORCE
         @$(check_for_multiple_loadaddr)
         $(call if_changed,uimage)
-        @echo '  Image $@ is ready'
+        @$(kecho) '  Image $@ is ready'
 
 $(obj)/bootp/bootp: $(obj)/zImage initrd FORCE
         $(Q)$(MAKE) $(build)=$(obj)/bootp $@
@@ -98,7 +98,7 @@ $(obj)/bootp/bootp: $(obj)/zImage initrd FORCE
 
 $(obj)/bootpImage: $(obj)/bootp/bootp FORCE
         $(call if_changed,objcopy)
-        @echo '  Kernel: $@ is ready'
+        @$(kecho) '  Kernel: $@ is ready'
 
 PHONY += initrd FORCE
 initrd:
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 90275f036cd1..49ca86e37b8d 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -652,6 +652,15 @@ __setup_mmu:	sub	r3, r4, #16384		@ Page directory size
                 mov     pc, lr
 ENDPROC(__setup_mmu)
 
+@ Enable unaligned access on v6, to allow better code generation
+@ for the decompressor C code:
+__armv6_mmu_cache_on:
+                mrc     p15, 0, r0, c1, c0, 0   @ read SCTLR
+                bic     r0, r0, #2              @ A (no unaligned access fault)
+                orr     r0, r0, #1 << 22        @ U (v6 unaligned access model)
+                mcr     p15, 0, r0, c1, c0, 0   @ write SCTLR
+                b       __armv4_mmu_cache_on
+
 __arm926ejs_mmu_cache_on:
 #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
                 mov     r0, #4                  @ put dcache in WT mode
@@ -694,6 +703,9 @@ __armv7_mmu_cache_on:
                 bic     r0, r0, #1 << 28        @ clear SCTLR.TRE
                 orr     r0, r0, #0x5000         @ I-cache enable, RR cache replacement
                 orr     r0, r0, #0x003c         @ write buffer
+                bic     r0, r0, #2              @ A (no unaligned access fault)
+                orr     r0, r0, #1 << 22        @ U (v6 unaligned access model)
+                                                @ (needed for ARM1176)
 #ifdef CONFIG_MMU
 #ifdef CONFIG_CPU_ENDIAN_BE8
                 orr     r0, r0, #1 << 25        @ big-endian page tables
@@ -914,7 +926,7 @@ proc_types:
 
                 .word   0x0007b000              @ ARMv6
                 .word   0x000ff000
-                W(b)    __armv4_mmu_cache_on
+                W(b)    __armv6_mmu_cache_on
                 W(b)    __armv4_mmu_cache_off
                 W(b)    __armv6_mmu_cache_flush
 
diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
index b06c0db273b1..e6391a4e6649 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
@@ -126,14 +126,14 @@
                 #size-cells = <0>;
 
                 btn3 {
-                        label = "Buttin 3";
+                        label = "Button 3";
                         gpios = <&pioA 30 1>;
                         linux,code = <0x103>;
                         gpio-key,wakeup;
                 };
 
                 btn4 {
-                        label = "Buttin 4";
+                        label = "Button 4";
                         gpios = <&pioA 31 1>;
                         linux,code = <0x104>;
                         gpio-key,wakeup;
diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi
index 748ba7aa746c..4b0e0ca08f40 100644
--- a/arch/arm/boot/dts/dbx5x0.dtsi
+++ b/arch/arm/boot/dts/dbx5x0.dtsi
@@ -483,6 +483,8 @@
                         compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
                         reg = <0x80004000 0x1000>;
                         interrupts = <0 21 0x4>;
+                        arm,primecell-periphid = <0x180024>;
+
                         #address-cells = <1>;
                         #size-cells = <0>;
                         v-i2c-supply = <&db8500_vape_reg>;
@@ -494,6 +496,8 @@
                         compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
                         reg = <0x80122000 0x1000>;
                         interrupts = <0 22 0x4>;
+                        arm,primecell-periphid = <0x180024>;
+
                         #address-cells = <1>;
                         #size-cells = <0>;
                         v-i2c-supply = <&db8500_vape_reg>;
@@ -505,6 +509,8 @@
                         compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
                         reg = <0x80128000 0x1000>;
                         interrupts = <0 55 0x4>;
+                        arm,primecell-periphid = <0x180024>;
+
                         #address-cells = <1>;
                         #size-cells = <0>;
                         v-i2c-supply = <&db8500_vape_reg>;
@@ -516,6 +522,8 @@
                         compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
                         reg = <0x80110000 0x1000>;
                         interrupts = <0 12 0x4>;
+                        arm,primecell-periphid = <0x180024>;
+
                         #address-cells = <1>;
                         #size-cells = <0>;
                         v-i2c-supply = <&db8500_vape_reg>;
@@ -527,6 +535,8 @@
                         compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
                         reg = <0x8012a000 0x1000>;
                         interrupts = <0 51 0x4>;
+                        arm,primecell-periphid = <0x180024>;
+
                         #address-cells = <1>;
                         #size-cells = <0>;
                         v-i2c-supply = <&db8500_vape_reg>;
@@ -573,33 +583,38 @@
                         interrupts = <0 60 0x4>;
                         status = "disabled";
                 };
+
                 sdi@80118000 {
                         compatible = "arm,pl18x", "arm,primecell";
                         reg = <0x80118000 0x1000>;
                         interrupts = <0 50 0x4>;
                         status = "disabled";
                 };
+
                 sdi@80005000 {
                         compatible = "arm,pl18x", "arm,primecell";
                         reg = <0x80005000 0x1000>;
                         interrupts = <0 41 0x4>;
                         status = "disabled";
                 };
+
                 sdi@80119000 {
                         compatible = "arm,pl18x", "arm,primecell";
                         reg = <0x80119000 0x1000>;
                         interrupts = <0 59 0x4>;
                         status = "disabled";
                 };
+
                 sdi@80114000 {
                         compatible = "arm,pl18x", "arm,primecell";
                         reg = <0x80114000 0x1000>;
                         interrupts = <0 99 0x4>;
                         status = "disabled";
                 };
+
                 sdi@80008000 {
                         compatible = "arm,pl18x", "arm,primecell";
-                        reg = <0x80114000 0x1000>;
+                        reg = <0x80008000 0x1000>;
                         interrupts = <0 100 0x4>;
                         status = "disabled";
                 };
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index 73567b843e72..a21511c14071 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -20,8 +20,10 @@
         compatible = "samsung,trats", "samsung,exynos4210";
 
         memory {
-                reg =  <0x40000000 0x20000000
-                        0x60000000 0x20000000>;
+                reg =  <0x40000000 0x10000000
+                        0x50000000 0x10000000
+                        0x60000000 0x10000000
+                        0x70000000 0x10000000>;
         };
 
         chosen {
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index 9ca4ca70c1bc..6d31aa383460 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -69,6 +69,7 @@
                                 interrupts = <13>, <56>;
                                 interrupt-names = "gpmi-dma", "bch";
                                 clocks = <&clks 34>;
+                                clock-names = "gpmi_io";
                                 fsl,gpmi-dma-channel = <4>;
                                 status = "disabled";
                         };
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index e16d63155480..55c57ea6169e 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -85,6 +85,7 @@
                                 interrupts = <88>, <41>;
                                 interrupt-names = "gpmi-dma", "bch";
                                 clocks = <&clks 50>;
+                                clock-names = "gpmi_io";
                                 fsl,gpmi-dma-channel = <4>;
                                 status = "disabled";
                         };
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index f38ea8771b44..696e929d0304 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -257,7 +257,7 @@
                         interrupt-names = "common", "tx", "rx", "sidetone";
                         interrupt-parent = <&intc>;
                         ti,buffer-size = <1280>;
-                        ti,hwmods = "mcbsp2";
+                        ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
                 };
 
                 mcbsp3: mcbsp@49024000 {
@@ -272,7 +272,7 @@
                         interrupt-names = "common", "tx", "rx", "sidetone";
                         interrupt-parent = <&intc>;
                         ti,buffer-size = <128>;
-                        ti,hwmods = "mcbsp3";
+                        ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
                 };
 
                 mcbsp4: mcbsp@49026000 {
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index b1497c7d7d68..df7f2270fc91 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -73,8 +73,8 @@
 
         pinmux: pinmux {
                 compatible = "nvidia,tegra30-pinmux";
-                reg = <0x70000868 0xd0    /* Pad control registers */
-                       0x70003000 0x3e0>; /* Mux registers */
+                reg = <0x70000868 0xd4    /* Pad control registers */
+                       0x70003000 0x3e4>; /* Mux registers */
         };
 
         serial@70006000 {
diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c
index df13a3ffff35..9d2d3ba339ff 100644
--- a/arch/arm/common/timer-sp.c
+++ b/arch/arm/common/timer-sp.c
@@ -162,7 +162,6 @@ static struct clock_event_device sp804_clockevent = {
         .set_mode       = sp804_set_mode,
         .set_next_event = sp804_set_next_event,
         .rating         = 300,
-        .cpumask        = cpu_all_mask,
 };
 
 static struct irqaction sp804_timer_irq = {
@@ -185,6 +184,7 @@ void __init sp804_clockevents_init(void __iomem *base, unsigned int irq,
         clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ);
         evt->name = name;
         evt->irq = irq;
+        evt->cpumask = cpu_possible_mask;
 
         setup_irq(irq, &sp804_timer_irq);
         clockevents_config_and_register(evt, rate, 0xf, 0xffffffff);
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index 66aa7a6db884..394ded624e37 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -139,6 +139,7 @@ CONFIG_I2C_IMX=y
 CONFIG_SPI=y
 CONFIG_SPI_IMX=y
 CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_MC9S08DZ60=y
 # CONFIG_HWMON is not set
 CONFIG_WATCHDOG=y
 CONFIG_IMX2_WDT=y
@@ -155,6 +156,7 @@ CONFIG_SOC_CAMERA=y
 CONFIG_SOC_CAMERA_OV2640=y
 CONFIG_VIDEO_MX3=y
 CONFIG_FB=y
+CONFIG_LCD_PLATFORM=y
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 CONFIG_LCD_CLASS_DEVICE=y
 CONFIG_LCD_L4F00242T03=y
diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig
index 7bcf850eddcd..3458752c4bb2 100644
--- a/arch/arm/configs/mvebu_defconfig
+++ b/arch/arm/configs/mvebu_defconfig
@@ -1,6 +1,6 @@
 CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
-CONFIG_NO_HZ=y
+CONFIG_IRQ_DOMAIN_DEBUG=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
@@ -9,10 +9,12 @@ CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_ARCH_MVEBU=y
-CONFIG_MACH_ARMADA_370_XP=y
+CONFIG_MACH_ARMADA_370=y
+CONFIG_MACH_ARMADA_XP=y
+# CONFIG_CACHE_L2X0 is not set
 CONFIG_AEABI=y
 CONFIG_HIGHMEM=y
-CONFIG_USE_OF=y
+# CONFIG_COMPACTION is not set
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_ARM_APPENDED_DTB=y
@@ -23,6 +25,8 @@ CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_OF_PLATFORM=y
 CONFIG_GPIOLIB=y
 CONFIG_GPIO_SYSFS=y
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_IOMMU_SUPPORT is not set
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_FS_XATTR is not set
diff --git a/arch/arm/configs/versatile_defconfig b/arch/arm/configs/versatile_defconfig
index cdd4d2bd3962..2ba9e63d0f17 100644
--- a/arch/arm/configs/versatile_defconfig
+++ b/arch/arm/configs/versatile_defconfig
@@ -1,3 +1,4 @@
+CONFIG_ARCH_VERSATILE=y
 CONFIG_EXPERIMENTAL=y
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SYSVIPC=y
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 23004847bb05..78d8e9b5544f 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -91,6 +91,7 @@ static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
  */
 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 {
+        debug_dma_mapping_error(dev, dma_addr);
         return dma_addr == DMA_ERROR_CODE;
 }
 
diff --git a/arch/arm/include/asm/flat.h b/arch/arm/include/asm/flat.h
index 59426a4595c9..e847d23351ed 100644
--- a/arch/arm/include/asm/flat.h
+++ b/arch/arm/include/asm/flat.h
@@ -8,7 +8,7 @@
 #define flat_argvp_envp_on_stack()              1
 #define flat_old_ram_flag(flags)                (flags)
 #define flat_reloc_valid(reloc, size)           ((reloc) <= (size))
-#define flat_get_addr_from_rp(rp, relval, flags, persistent) get_unaligned(rp)
+#define flat_get_addr_from_rp(rp, relval, flags, persistent) ((void)persistent,get_unaligned(rp))
 #define flat_put_addr_at_rp(rp, val, relval)    put_unaligned(val,rp)
 #define flat_get_relocate_addr(rel)             (rel)
 #define flat_set_persistent(relval, p)          0
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 35c1ed89b936..42f042ee4ada 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -64,7 +64,7 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
 static inline void __raw_writew(u16 val, volatile void __iomem *addr)
 {
         asm volatile("strh %1, %0"
-                     : "+Qo" (*(volatile u16 __force *)addr)
+                     : "+Q" (*(volatile u16 __force *)addr)
                      : "r" (val));
 }
 
@@ -72,7 +72,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)
 {
         u16 val;
         asm volatile("ldrh %1, %0"
-                     : "+Qo" (*(volatile u16 __force *)addr),
+                     : "+Q" (*(volatile u16 __force *)addr),
                        "=r" (val));
         return val;
 }
diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h
index 05b8e82ec9f5..e3f757263438 100644
--- a/arch/arm/include/asm/sched_clock.h
+++ b/arch/arm/include/asm/sched_clock.h
@@ -10,7 +10,5 @@
 
 extern void sched_clock_postinit(void);
 extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
-extern void setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
-                unsigned long rate);
 
 #endif
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index 77bd79f2ffdb..7e1f76027f66 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -200,8 +200,8 @@ extern int __put_user_8(void *, unsigned long long);
 #define USER_DS                 KERNEL_DS
 
 #define segment_eq(a,b)         (1)
-#define __addr_ok(addr)         (1)
-#define __range_ok(addr,size)   (0)
+#define __addr_ok(addr)         ((void)(addr),1)
+#define __range_ok(addr,size)   ((void)(addr),0)
 #define get_fs()                (KERNEL_DS)
 
 static inline void set_fs(mm_segment_t fs)
diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h
index 6a6f1e485f41..301c1db3e99b 100644
--- a/arch/arm/include/asm/vfpmacros.h
+++ b/arch/arm/include/asm/vfpmacros.h
@@ -27,9 +27,9 @@
 #if __LINUX_ARM_ARCH__ <= 6
         ldr     \tmp, =elf_hwcap                    @ may not have MVFR regs
         ldr     \tmp, [\tmp, #0]
-        tst     \tmp, #HWCAP_VFPv3D16
-        ldceql  p11, cr0, [\base],#32*4             @ FLDMIAD \base!, {d16-d31}
-        addne   \base, \base, #32*4                 @ step over unused register space
+        tst     \tmp, #HWCAP_VFPD32
+        ldcnel  p11, cr0, [\base],#32*4             @ FLDMIAD \base!, {d16-d31}
+        addeq   \base, \base, #32*4                 @ step over unused register space
 #else
         VFPFMRX \tmp, MVFR0                         @ Media and VFP Feature Register 0
         and     \tmp, \tmp, #MVFR0_A_SIMD_MASK      @ A_SIMD field
@@ -51,9 +51,9 @@
 #if __LINUX_ARM_ARCH__ <= 6
         ldr     \tmp, =elf_hwcap                    @ may not have MVFR regs
         ldr     \tmp, [\tmp, #0]
-        tst     \tmp, #HWCAP_VFPv3D16
-        stceql  p11, cr0, [\base],#32*4             @ FSTMIAD \base!, {d16-d31}
-        addne   \base, \base, #32*4                 @ step over unused register space
+        tst     \tmp, #HWCAP_VFPD32
+        stcnel  p11, cr0, [\base],#32*4             @ FSTMIAD \base!, {d16-d31}
+        addeq   \base, \base, #32*4                 @ step over unused register space
 #else
         VFPFMRX \tmp, MVFR0                         @ Media and VFP Feature Register 0
         and     \tmp, \tmp, #MVFR0_A_SIMD_MASK      @ A_SIMD field
diff --git a/arch/arm/include/asm/xen/interface.h b/arch/arm/include/asm/xen/interface.h
index ae05e56dd17d..5000397134b4 100644
--- a/arch/arm/include/asm/xen/interface.h
+++ b/arch/arm/include/asm/xen/interface.h
@@ -29,16 +29,22 @@
 
 #ifndef __ASSEMBLY__
 /* Explicitly size integers that represent pfns in the interface with
- * Xen so that we can have one ABI that works for 32 and 64 bit guests. */
+ * Xen so that we can have one ABI that works for 32 and 64 bit guests.
+ * Note that this means that the xen_pfn_t type may be capable of
+ * representing pfn's which the guest cannot represent in its own pfn
+ * type. However since pfn space is controlled by the guest this is
+ * fine since it simply wouldn't be able to create any sure pfns in
+ * the first place.
+ */
 typedef uint64_t xen_pfn_t;
+#define PRI_xen_pfn "llx"
 typedef uint64_t xen_ulong_t;
+#define PRI_xen_ulong "llx"
 /* Guest handles for primitive C types. */
 __DEFINE_GUEST_HANDLE(uchar, unsigned char);
 __DEFINE_GUEST_HANDLE(uint,  unsigned int);
-__DEFINE_GUEST_HANDLE(ulong, unsigned long);
 DEFINE_GUEST_HANDLE(char);
 DEFINE_GUEST_HANDLE(int);
-DEFINE_GUEST_HANDLE(long);
 DEFINE_GUEST_HANDLE(void);
 DEFINE_GUEST_HANDLE(uint64_t);
 DEFINE_GUEST_HANDLE(uint32_t);
diff --git a/arch/arm/include/asm/xen/page.h b/arch/arm/include/asm/xen/page.h
index 174202318dff..c6b9096cef95 100644
--- a/arch/arm/include/asm/xen/page.h
+++ b/arch/arm/include/asm/xen/page.h
@@ -10,7 +10,7 @@
 #include <xen/interface/grant_table.h>
 
 #define pfn_to_mfn(pfn)                 (pfn)
-#define phys_to_machine_mapping_valid   (1)
+#define phys_to_machine_mapping_valid(pfn) (1)
 #define mfn_to_pfn(mfn)                 (mfn)
 #define mfn_to_virt(m)                  (__va(mfn_to_pfn(m) << PAGE_SHIFT))
 
@@ -30,6 +30,8 @@ typedef struct xpaddr {
 #define XMADDR(x)       ((xmaddr_t) { .maddr = (x) })
 #define XPADDR(x)       ((xpaddr_t) { .paddr = (x) })
 
+#define INVALID_P2M_ENTRY      (~0UL)
+
 static inline xmaddr_t phys_to_machine(xpaddr_t phys)
 {
         unsigned offset = phys.paddr & ~PAGE_MASK;
@@ -74,9 +76,14 @@ static inline int m2p_remove_override(struct page *page, bool clear_pte)
         return 0;
 }
 
+static inline bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn)
+{
+        BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY);
+        return true;
+}
+
 static inline bool set_phys_to_machine(unsigned long pfn, unsigned long mfn)
 {
-        BUG();
-        return false;
+        return __set_phys_to_machine(pfn, mfn);
 }
 #endif /* _ASM_ARM_XEN_PAGE_H */
diff --git a/arch/arm/include/debug/8250_32.S b/arch/arm/include/debug/8250_32.S
new file mode 100644
index 000000000000..8db01eeabbb4
--- /dev/null
+++ b/arch/arm/include/debug/8250_32.S
@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2011 Picochip Ltd., Jamie Iles
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit
+ * accesses to the 8250.
+ */
+
+#include <linux/serial_reg.h>
+
+                .macro  senduart,rd,rx
+                str     \rd, [\rx, #UART_TX << UART_SHIFT]
+                .endm
+
+                .macro  busyuart,rd,rx
+1002:           ldr     \rd, [\rx, #UART_LSR << UART_SHIFT]
+                and     \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
+                teq     \rd, #UART_LSR_TEMT | UART_LSR_THRE
+                bne     1002b
+                .endm
+
+                /* The UART's don't have any flow control IO's wired up. */
+                .macro  waituart,rd,rx
+                .endm
diff --git a/arch/arm/include/debug/picoxcell.S b/arch/arm/include/debug/picoxcell.S
index 7419deb1b948..bc1f07c49cd4 100644
--- a/arch/arm/include/debug/picoxcell.S
+++ b/arch/arm/include/debug/picoxcell.S
@@ -5,10 +5,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  *
- * Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit
- * accesses to the 8250.
  */
-#include <linux/serial_reg.h>
 
 #define UART_SHIFT 2
 #define PICOXCELL_UART1_BASE            0x80230000
@@ -19,17 +16,4 @@
                 ldr     \rp, =PICOXCELL_UART1_BASE
                 .endm
 
-                .macro  senduart,rd,rx
-                str     \rd, [\rx, #UART_TX << UART_SHIFT]
-                .endm
-
-                .macro  busyuart,rd,rx
-1002:           ldr     \rd, [\rx, #UART_LSR << UART_SHIFT]
-                and     \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
-                teq     \rd, #UART_LSR_TEMT | UART_LSR_THRE
-                bne     1002b
-                .endm
-
-                /* The UART's don't have any flow control IO's wired up. */
-                .macro  waituart,rd,rx
-                .endm
+#include "8250_32.S"
diff --git a/arch/arm/include/debug/socfpga.S b/arch/arm/include/debug/socfpga.S
index d6f26d23374f..966b2f994946 100644
--- a/arch/arm/include/debug/socfpga.S
+++ b/arch/arm/include/debug/socfpga.S
@@ -7,6 +7,9 @@
  * published by the Free Software Foundation.
  */
 
+#define UART_SHIFT 2
+#define DEBUG_LL_UART_OFFSET    0x00002000
+
                 .macro  addruart, rp, rv, tmp
                 mov     \rp, #DEBUG_LL_UART_OFFSET
                 orr     \rp, \rp, #0x00c00000
@@ -14,3 +17,5 @@
                 orr     \rp, \rp, #0xff000000   @ physical base
                 .endm
 
+#include "8250_32.S"
+
diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h
index f254f6503cce..3688fd15a32d 100644
--- a/arch/arm/include/uapi/asm/hwcap.h
+++ b/arch/arm/include/uapi/asm/hwcap.h
@@ -18,11 +18,12 @@
 #define HWCAP_THUMBEE   (1 << 11)
 #define HWCAP_NEON      (1 << 12)
 #define HWCAP_VFPv3     (1 << 13)
-#define HWCAP_VFPv3D16  (1 << 14)
+#define HWCAP_VFPv3D16  (1 << 14)       /* also set for VFPv4-D16 */
 #define HWCAP_TLS       (1 << 15)
 #define HWCAP_VFPv4     (1 << 16)
 #define HWCAP_IDIVA     (1 << 17)
 #define HWCAP_IDIVT     (1 << 18)
+#define HWCAP_VFPD32    (1 << 19)       /* set if VFP has 32 regs (not 16) */
 #define HWCAP_IDIV      (HWCAP_IDIVA | HWCAP_IDIVT)
 
 
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 16cedb42c0c3..896165096d6a 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -34,6 +34,7 @@
 #include <linux/list.h>
 #include <linux/kallsyms.h>
 #include <linux/proc_fs.h>
+#include <linux/export.h>
 
 #include <asm/exception.h>
 #include <asm/mach/arch.h>
@@ -109,6 +110,7 @@ void set_irq_flags(unsigned int irq, unsigned int iflags)
         /* Order is clear bits in "clr" then set bits in "set" */
         irq_modify_status(irq, clr, set & ~clr);
 }
+EXPORT_SYMBOL_GPL(set_irq_flags);
 
 void __init init_IRQ(void)
 {
diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c
index 38c1a3b103a0..839312905067 100644
--- a/arch/arm/kernel/kprobes-test-arm.c
+++ b/arch/arm/kernel/kprobes-test-arm.c
@@ -366,7 +366,9 @@ void kprobe_arm_test_cases(void)
         TEST_UNSUPPORTED(".word 0xe04f0392 @ umaal r0, pc, r2, r3")
         TEST_UNSUPPORTED(".word 0xe0500090 @ undef")
         TEST_UNSUPPORTED(".word 0xe05fff9f @ undef")
+#endif
 
+#if __LINUX_ARM_ARCH__ >= 7
         TEST_RRR(  "mls         r0, r",1, VAL1,", r",2, VAL2,", r",3,  VAL3,"")
         TEST_RRR(  "mlshi       r7, r",8, VAL3,", r",9, VAL1,", r",10, VAL2,"")
         TEST_RR(   "mls         lr, r",1, VAL2,", r",2, VAL3,", r13")
@@ -456,6 +458,8 @@ void kprobe_arm_test_cases(void)
         TEST_UNSUPPORTED(".word 0xe1700090") /* Unallocated space */
 #if __LINUX_ARM_ARCH__ >= 6
         TEST_UNSUPPORTED("ldrex r2, [sp]")
+#endif
+#if (__LINUX_ARM_ARCH__ >= 7) || defined(CONFIG_CPU_32v6K)
         TEST_UNSUPPORTED("strexd        r0, r2, r3, [sp]")
         TEST_UNSUPPORTED("ldrexd        r2, r3, [sp]")
         TEST_UNSUPPORTED("strexb        r0, r2, [sp]")
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index e29c3337ca81..8ef8c9337809 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -45,10 +45,9 @@ int machine_kexec_prepare(struct kimage *image)
         for (i = 0; i < image->nr_segments; i++) {
                 current_segment = &image->segment[i];
 
-                err = memblock_is_region_memory(current_segment->mem,
-                                                current_segment->memsz);
-                if (err)
-                        return - EINVAL;
+                if (!memblock_is_region_memory(current_segment->mem,
+                                               current_segment->memsz))
+                        return -EINVAL;
 
                 err = get_user(header, (__be32*)current_segment->buf);
                 if (err)
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 93971b1a4f0b..53c0304b734a 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -96,6 +96,10 @@ armpmu_event_set_period(struct perf_event *event,
         s64 period = hwc->sample_period;
         int ret = 0;
 
+        /* The period may have been changed by PERF_EVENT_IOC_PERIOD */
+        if (unlikely(period != hwc->last_period))
+                left = period - (hwc->last_period - left);
+
         if (unlikely(left <= -period)) {
                 left = period;
                 local64_set(&hwc->period_left, left);
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index e21bac20d90d..fc6692e2b603 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -107,13 +107,6 @@ static void sched_clock_poll(unsigned long wrap_ticks)
         update_sched_clock();
 }
 
-void __init setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
-                unsigned long rate)
-{
-        setup_sched_clock(read, bits, rate);
-        cd.needs_suspend = true;
-}
-
 void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
 {
         unsigned long r, w;
@@ -189,18 +182,15 @@ void __init sched_clock_postinit(void)
 static int sched_clock_suspend(void)
 {
         sched_clock_poll(sched_clock_timer.data);
-        if (cd.needs_suspend)
-                cd.suspended = true;
+        cd.suspended = true;
         return 0;
 }
 
 static void sched_clock_resume(void)
 {
-        if (cd.needs_suspend) {
-                cd.epoch_cyc = read_sched_clock();
-                cd.epoch_cyc_copy = cd.epoch_cyc;
-                cd.suspended = false;
-        }
+        cd.epoch_cyc = read_sched_clock();
+        cd.epoch_cyc_copy = cd.epoch_cyc;
+        cd.suspended = false;
 }
 
 static struct syscore_ops sched_clock_ops = {
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 8e20754dd31d..fbc8b2623d82 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -294,18 +294,24 @@ static void percpu_timer_setup(void);
 asmlinkage void __cpuinit secondary_start_kernel(void)
 {
         struct mm_struct *mm = &init_mm;
-        unsigned int cpu = smp_processor_id();
+        unsigned int cpu;
+
+        /*
+         * The identity mapping is uncached (strongly ordered), so
+         * switch away from it before attempting any exclusive accesses.
+         */
+        cpu_switch_mm(mm->pgd, mm);
+        enter_lazy_tlb(mm, current);
+        local_flush_tlb_all();
 
         /*
          * All kernel threads share the same mm context; grab a
          * reference and switch to it.
          */
+        cpu = smp_processor_id();
         atomic_inc(&mm->mm_count);
         current->active_mm = mm;
         cpumask_set_cpu(cpu, mm_cpumask(mm));
-        cpu_switch_mm(mm->pgd, mm);
-        enter_lazy_tlb(mm, current);
-        local_flush_tlb_all();
 
         printk("CPU%u: Booted secondary processor\n", cpu);
 
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index e1f906989bb8..b22d700fea27 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -42,10 +42,10 @@ static void twd_set_mode(enum clock_event_mode mode,
 
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
-                /* timer load already set up */
                 ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE
                         | TWD_TIMER_CONTROL_PERIODIC;
-                __raw_writel(twd_timer_rate / HZ, twd_base + TWD_TIMER_LOAD);
+                __raw_writel(DIV_ROUND_CLOSEST(twd_timer_rate, HZ),
+                        twd_base + TWD_TIMER_LOAD);
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
                 /* period set, and timer enabled in 'next_event' hook */
diff --git a/arch/arm/lib/delay.c b/arch/arm/lib/delay.c
index 9d0a30032d7f..0dc53854a5d8 100644
--- a/arch/arm/lib/delay.c
+++ b/arch/arm/lib/delay.c
@@ -45,6 +45,7 @@ int read_current_timer(unsigned long *timer_val)
         *timer_val = delay_timer->read_current_timer();
         return 0;
 }
+EXPORT_SYMBOL_GPL(read_current_timer);
 
 static void __timer_delay(unsigned long cycles)
 {
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index b14207101938..043624219b55 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -21,19 +21,13 @@ config SOC_AT91SAM9
         bool
         select CPU_ARM926T
         select GENERIC_CLOCKEVENTS
+        select MULTI_IRQ_HANDLER
+        select SPARSE_IRQ
 
 menu "Atmel AT91 System-on-Chip"
 
 comment "Atmel AT91 Processor"
 
-config SOC_AT91SAM9
-        bool
-        select AT91_SAM9_SMC
-        select AT91_SAM9_TIME
-        select CPU_ARM926T
-        select MULTI_IRQ_HANDLER
-        select SPARSE_IRQ
-
 config SOC_AT91RM9200
         bool "AT91RM9200"
         select CPU_ARM920T
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index b4f0565aff63..5269825194a8 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -187,7 +187,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
         CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
         CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
-        CLKDEV_CON_DEV_ID(NULL, "i2c-at91rm9200", &twi_clk),
+        CLKDEV_CON_DEV_ID(NULL, "i2c-at91rm9200.0", &twi_clk),
         /* fake hclk clock */
         CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
         CLKDEV_CON_ID("pioA", &pioA_clk),
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index a563189cdfc3..3cee0e6ea7c3 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -68,7 +68,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
 
         /* Enable overcurrent notification */
         for (i = 0; i < data->ports; i++) {
-                if (data->overcurrent_pin[i])
+                if (gpio_is_valid(data->overcurrent_pin[i]))
                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
         }
 
@@ -479,7 +479,7 @@ static struct i2c_gpio_platform_data pdata = {
 
 static struct platform_device at91rm9200_twi_device = {
         .name                   = "i2c-gpio",
-        .id                     = -1,
+        .id                     = 0,
         .dev.platform_data      = &pdata,
 };
 
@@ -512,7 +512,7 @@ static struct resource twi_resources[] = {
 
 static struct platform_device at91rm9200_twi_device = {
         .name           = "i2c-at91rm9200",
-        .id             = -1,
+        .id             = 0,
         .resource       = twi_resources,
         .num_resources  = ARRAY_SIZE(twi_resources),
 };
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index ad29f93f20ca..f8202615f4a8 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -211,8 +211,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
         CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
         CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk),
-        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260", &twi_clk),
-        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20", &twi_clk),
+        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),
+        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20.0", &twi_clk),
         /* more usart lookup table for DT entries */
         CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
         CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index a76b8684f52d..414bd855fb0c 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
 
         /* Enable overcurrent notification */
         for (i = 0; i < data->ports; i++) {
-                if (data->overcurrent_pin[i])
+                if (gpio_is_valid(data->overcurrent_pin[i]))
                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
         }
 
@@ -389,7 +389,7 @@ static struct i2c_gpio_platform_data pdata = {
 
 static struct platform_device at91sam9260_twi_device = {
         .name                   = "i2c-gpio",
-        .id                     = -1,
+        .id                     = 0,
         .dev.platform_data      = &pdata,
 };
 
@@ -421,7 +421,7 @@ static struct resource twi_resources[] = {
 };
 
 static struct platform_device at91sam9260_twi_device = {
-        .id             = -1,
+        .id             = 0,
         .resource       = twi_resources,
         .num_resources  = ARRAY_SIZE(twi_resources),
 };
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 8d999eb1a137..04295c04b3e0 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -178,8 +178,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
         CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
         CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0),
-        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9261", &twi_clk),
-        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10", &twi_clk),
+        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9261.0", &twi_clk),
+        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10.0", &twi_clk),
         CLKDEV_CON_ID("pioA", &pioA_clk),
         CLKDEV_CON_ID("pioB", &pioB_clk),
         CLKDEV_CON_ID("pioC", &pioC_clk),
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 9752f17efba9..cd604aad8e96 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
 
         /* Enable overcurrent notification */
         for (i = 0; i < data->ports; i++) {
-                if (data->overcurrent_pin[i])
+                if (gpio_is_valid(data->overcurrent_pin[i]))
                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
         }
 
@@ -285,7 +285,7 @@ static struct i2c_gpio_platform_data pdata = {
 
 static struct platform_device at91sam9261_twi_device = {
         .name                   = "i2c-gpio",
-        .id                     = -1,
+        .id                     = 0,
         .dev.platform_data      = &pdata,
 };
 
@@ -317,7 +317,7 @@ static struct resource twi_resources[] = {
 };
 
 static struct platform_device at91sam9261_twi_device = {
-        .id             = -1,
+        .id             = 0,
         .resource       = twi_resources,
         .num_resources  = ARRAY_SIZE(twi_resources),
 };
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 6a01d0360dfb..d6f9c23927c4 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -193,7 +193,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
         CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
         CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
-        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260", &twi_clk),
+        CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),
         /* fake hclk clock */
         CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
         CLKDEV_CON_ID("pioA", &pioA_clk),
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 8dde220b42b6..9c61e59a2104 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -78,7 +78,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
 
         /* Enable overcurrent notification */
         for (i = 0; i < data->ports; i++) {
-                if (data->overcurrent_pin[i])
+                if (gpio_is_valid(data->overcurrent_pin[i]))
                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
         }
 
@@ -567,7 +567,7 @@ static struct i2c_gpio_platform_data pdata = {
 
 static struct platform_device at91sam9263_twi_device = {
         .name                   = "i2c-gpio",
-        .id                     = -1,
+        .id                     = 0,
         .dev.platform_data      = &pdata,
 };
 
@@ -600,7 +600,7 @@ static struct resource twi_resources[] = {
 
 static struct platform_device at91sam9263_twi_device = {
         .name           = "i2c-at91sam9260",
-        .id             = -1,
+        .id             = 0,
         .resource       = twi_resources,
         .num_resources  = ARRAY_SIZE(twi_resources),
 };
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index b1596072dcc2..fcd233cb33d2 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -1841,8 +1841,8 @@ static struct resource sha_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = AT91SAM9G45_ID_AESTDESSHA,
-                .end    = AT91SAM9G45_ID_AESTDESSHA,
+                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
+                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1874,8 +1874,8 @@ static struct resource tdes_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = AT91SAM9G45_ID_AESTDESSHA,
-                .end    = AT91SAM9G45_ID_AESTDESSHA,
+                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
+                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1910,8 +1910,8 @@ static struct resource aes_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = AT91SAM9G45_ID_AESTDESSHA,
-                .end    = AT91SAM9G45_ID_AESTDESSHA,
+                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
+                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index d6ca0543ce8d..5047bdc92adf 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -314,7 +314,7 @@ static struct i2c_gpio_platform_data pdata = {
 
 static struct platform_device at91sam9rl_twi_device = {
         .name                   = "i2c-gpio",
-        .id                     = -1,
+        .id                     = 0,
         .dev.platform_data      = &pdata,
 };
 
@@ -347,7 +347,7 @@ static struct resource twi_resources[] = {
 
 static struct platform_device at91sam9rl_twi_device = {
         .name           = "i2c-at91sam9g20",
-        .id             = -1,
+        .id             = 0,
         .resource       = twi_resources,
         .num_resources  = ARRAY_SIZE(twi_resources),
 };
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c
index 6bd7300a2bc5..bb7f54474b92 100644
--- a/arch/arm/mach-at91/at91x40.c
+++ b/arch/arm/mach-at91/at91x40.c
@@ -88,6 +88,6 @@ void __init at91x40_init_interrupts(unsigned int priority[NR_AIC_IRQS])
         if (!priority)
                 priority = at91x40_default_irq_priority;
 
-        at91_aic_init(priority);
+        at91_aic_init(priority, at91_extern_irq);
 }
 
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
index 9cda3fd346ae..6960778af4c2 100644
--- a/arch/arm/mach-at91/board-neocore926.c
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -129,7 +129,7 @@ static struct spi_board_info neocore926_spi_devices[] = {
                 .max_speed_hz   = 125000 * 16,
                 .bus_num        = 0,
                 .platform_data  = &ads_info,
-                .irq            = AT91SAM9263_ID_IRQ1,
+                .irq            = NR_IRQS_LEGACY + AT91SAM9263_ID_IRQ1,
         },
 #endif
 };
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index 27b3af1a3047..a9167dd45f96 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -309,7 +309,7 @@ static struct spi_board_info ek_spi_devices[] = {
                 .max_speed_hz   = 125000 * 26,  /* (max sample rate @ 3V) * (cmd + data + overhead) */
                 .bus_num        = 0,
                 .platform_data  = &ads_info,
-                .irq            = AT91SAM9261_ID_IRQ0,
+                .irq            = NR_IRQS_LEGACY + AT91SAM9261_ID_IRQ0,
                 .controller_data = (void *) AT91_PIN_PA28,      /* CS pin */
         },
 #endif
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index 073e17403d98..b87dbe2be0d6 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -132,7 +132,7 @@ static struct spi_board_info ek_spi_devices[] = {
                 .max_speed_hz   = 125000 * 26,  /* (max sample rate @ 3V) * (cmd + data + overhead) */
                 .bus_num        = 0,
                 .platform_data  = &ads_info,
-                .irq            = AT91SAM9263_ID_IRQ1,
+                .irq            = NR_IRQS_LEGACY + AT91SAM9263_ID_IRQ1,
         },
 #endif
 };
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index f49650677653..b62f560e6c75 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -26,7 +26,8 @@ extern void __init at91_dt_initialize(void);
 extern void __init at91_init_irq_default(void);
 extern void __init at91_init_interrupts(unsigned int priority[]);
 extern void __init at91x40_init_interrupts(unsigned int priority[]);
-extern void __init at91_aic_init(unsigned int priority[]);
+extern void __init at91_aic_init(unsigned int priority[],
+                                 unsigned int ext_irq_mask);
 extern int  __init at91_aic_of_init(struct device_node *node,
                                     struct device_node *parent);
 extern int  __init at91_aic5_of_init(struct device_node *node,
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index 1e02c0e49dcc..febc2ee901a5 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -502,14 +502,19 @@ int __init at91_aic5_of_init(struct device_node *node,
 /*
  * Initialize the AIC interrupt controller.
  */
-void __init at91_aic_init(unsigned int *priority)
+void __init at91_aic_init(unsigned int *priority, unsigned int ext_irq_mask)
 {
         unsigned int i;
         int irq_base;
 
-        if (at91_aic_pm_init())
+        at91_extern_irq = kzalloc(BITS_TO_LONGS(n_irqs)
+                                  * sizeof(*at91_extern_irq), GFP_KERNEL);
+
+        if (at91_aic_pm_init() || at91_extern_irq == NULL)
                 panic("Unable to allocate bit maps\n");
 
+        *at91_extern_irq = ext_irq_mask;
+
         at91_aic_base = ioremap(AT91_AIC, 512);
         if (!at91_aic_base)
                 panic("Unable to ioremap AIC registers\n");
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index da9881b161e1..0b32c81730a5 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -47,7 +47,7 @@ void __init at91_init_irq_default(void)
 void __init at91_init_interrupts(unsigned int *priority)
 {
         /* Initialize the AIC interrupt controller */
-        at91_aic_init(priority);
+        at91_aic_init(priority, at91_extern_irq);
 
         /* Enable GPIO interrupts */
         at91_gpio_irq_setup();
@@ -151,7 +151,7 @@ static void __init soc_detect(u32 dbgu_base)
         }
 
         /* at91sam9g10 */
-        if ((cidr & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
+        if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
                 at91_soc_initdata.type = AT91_SOC_SAM9G10;
                 at91_boot_soc = at91sam9261_soc;
         }
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index cd0c8b1e1ecf..14e9947bad6e 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -713,8 +713,7 @@ static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
                 break;
         case VPBE_ENC_CUSTOM_TIMINGS:
                 if (pclock <= 27000000) {
-                        v |= DM644X_VPSS_MUXSEL_PLL2_MODE |
-                             DM644X_VPSS_DACCLKEN;
+                        v |= DM644X_VPSS_DACCLKEN;
                         writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
                 } else {
                         /*
diff --git a/arch/arm/mach-dove/include/mach/pm.h b/arch/arm/mach-dove/include/mach/pm.h
index 7bcd0dfce4b1..b47f75038686 100644
--- a/arch/arm/mach-dove/include/mach/pm.h
+++ b/arch/arm/mach-dove/include/mach/pm.h
@@ -63,7 +63,7 @@ static inline int pmu_to_irq(int pin)
 
 static inline int irq_to_pmu(int irq)
 {
-        if (IRQ_DOVE_PMU_START < irq && irq < NR_IRQS)
+        if (IRQ_DOVE_PMU_START <= irq && irq < NR_IRQS)
                 return irq - IRQ_DOVE_PMU_START;
 
         return -EINVAL;
diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
index 087711524e8a..bc4344aa1009 100644
--- a/arch/arm/mach-dove/irq.c
+++ b/arch/arm/mach-dove/irq.c
@@ -46,8 +46,20 @@ static void pmu_irq_ack(struct irq_data *d)
         int pin = irq_to_pmu(d->irq);
         u32 u;
 
+        /*
+         * The PMU mask register is not RW0C: it is RW.  This means that
+         * the bits take whatever value is written to them; if you write
+         * a '1', you will set the interrupt.
+         *
+         * Unfortunately this means there is NO race free way to clear
+         * these interrupts.
+         *
+         * So, let's structure the code so that the window is as small as
+         * possible.
+         */
         u = ~(1 << (pin & 31));
-        writel(u, PMU_INTERRUPT_CAUSE);
+        u &= readl_relaxed(PMU_INTERRUPT_CAUSE);
+        writel_relaxed(u, PMU_INTERRUPT_CAUSE);
 }
 
 static struct irq_chip pmu_irq_chip = {
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 715b690e5009..1947be8e5f5b 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -47,6 +47,7 @@
 #include <plat/fimc-core.h>
 #include <plat/iic-core.h>
 #include <plat/tv-core.h>
+#include <plat/spi-core.h>
 #include <plat/regs-serial.h>
 
 #include "common.h"
@@ -346,6 +347,8 @@ static void __init exynos4_map_io(void)
 
         s5p_fb_setname(0, "exynos4-fb");
         s5p_hdmi_setname("exynos4-hdmi");
+
+        s3c64xx_spi_setname("exynos4210-spi");
 }
 
 static void __init exynos5_map_io(void)
@@ -366,6 +369,8 @@ static void __init exynos5_map_io(void)
         s3c_i2c0_setname("s3c2440-i2c");
         s3c_i2c1_setname("s3c2440-i2c");
         s3c_i2c2_setname("s3c2440-i2c");
+
+        s3c64xx_spi_setname("exynos4210-spi");
 }
 
 static void __init exynos4_init_clocks(int xtal)
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index 21d568b3b149..87e07d6fc615 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -275,6 +275,9 @@ static int __init exynos_dma_init(void)
                 exynos_pdma1_pdata.nr_valid_peri =
                         ARRAY_SIZE(exynos4210_pdma1_peri);
                 exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri;
+
+                if (samsung_rev() == EXYNOS4210_REV_0)
+                        exynos_mdma1_device.res.start = EXYNOS4_PA_S_MDMA1;
         } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
                 exynos_pdma0_pdata.nr_valid_peri =
                         ARRAY_SIZE(exynos4212_pdma0_peri);
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 8480849affb9..ed4da4544cd2 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -90,6 +90,7 @@
 
 #define EXYNOS4_PA_MDMA0                0x10810000
 #define EXYNOS4_PA_MDMA1                0x12850000
+#define EXYNOS4_PA_S_MDMA1              0x12840000
 #define EXYNOS4_PA_PDMA0                0x12680000
 #define EXYNOS4_PA_PDMA1                0x12690000
 #define EXYNOS5_PA_MDMA0                0x10800000
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c
index e58d786faf78..eadf4b59e7d2 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -99,6 +99,7 @@ static char const *exynos4_dt_compat[] __initdata = {
 
 DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)")
         /* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */
+        .smp            = smp_ops(exynos_smp_ops),
         .init_irq       = exynos4_init_irq,
         .map_io         = exynos4_dt_map_io,
         .handle_irq     = gic_handle_irq,
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c
index 82c27230d4a9..86e37cd9376c 100644
--- a/arch/arm/mach-highbank/system.c
+++ b/arch/arm/mach-highbank/system.c
@@ -28,6 +28,7 @@ void highbank_restart(char mode, const char *cmd)
                 hignbank_set_pwr_soft_reset();
 
         scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
-        cpu_do_idle();
+        while (1)
+                cpu_do_idle();
 }
 
diff --git a/arch/arm/mach-imx/clk-busy.c b/arch/arm/mach-imx/clk-busy.c
index 1a7a8dd045a1..1ab91b5209e6 100644
--- a/arch/arm/mach-imx/clk-busy.c
+++ b/arch/arm/mach-imx/clk-busy.c
@@ -108,7 +108,7 @@ struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
         busy->div.hw.init = &init;
 
         clk = clk_register(NULL, &busy->div.hw);
-        if (!clk)
+        if (IS_ERR(clk))
                 kfree(busy);
 
         return clk;
diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c
index 3c1b8ff9a0a6..cc49c7ae186e 100644
--- a/arch/arm/mach-imx/clk-gate2.c
+++ b/arch/arm/mach-imx/clk-gate2.c
@@ -112,7 +112,7 @@ struct clk *clk_register_gate2(struct device *dev, const char *name,
 
         clk = clk_register(dev, &gate->hw);
         if (IS_ERR(clk))
-                kfree(clk);
+                kfree(gate);
 
         return clk;
 }
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index d20d4795f4ea..01e2f843bf2e 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -127,8 +127,8 @@ int __init mx25_clocks_init(void)
         clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0),  4);
         clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0),  5);
         clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0),  6);
-        clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per8", ccm(CCM_CGCR0),  7);
-        clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "ipg_per", ccm(CCM_CGCR0),  8);
+        clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per7", ccm(CCM_CGCR0),  7);
+        clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "per8", ccm(CCM_CGCR0),  8);
         clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13);
         clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14);
         clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15);
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 3b6b640eed24..366e5d59d886 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -109,7 +109,7 @@ int __init mx27_clocks_init(unsigned long fref)
         clk[per3_div] = imx_clk_divider("per3_div", "mpll_main2", CCM_PCDR1, 16, 6);
         clk[per4_div] = imx_clk_divider("per4_div", "mpll_main2", CCM_PCDR1, 24, 6);
         clk[vpu_sel] = imx_clk_mux("vpu_sel", CCM_CSCR, 21, 1, vpu_sel_clks, ARRAY_SIZE(vpu_sel_clks));
-        clk[vpu_div] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 3);
+        clk[vpu_div] = imx_clk_divider("vpu_div", "vpu_sel", CCM_PCDR0, 10, 6);
         clk[usb_div] = imx_clk_divider("usb_div", "spll", CCM_CSCR, 28, 3);
         clk[cpu_sel] = imx_clk_mux("cpu_sel", CCM_CSCR, 15, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks));
         clk[clko_sel] = imx_clk_mux("clko_sel", CCM_CCSR, 0, 5, clko_sel_clks, ARRAY_SIZE(clko_sel_clks));
@@ -121,7 +121,7 @@ int __init mx27_clocks_init(unsigned long fref)
         clk[ssi1_sel] = imx_clk_mux("ssi1_sel", CCM_CSCR, 22, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks));
         clk[ssi2_sel] = imx_clk_mux("ssi2_sel", CCM_CSCR, 23, 1, ssi_sel_clks, ARRAY_SIZE(ssi_sel_clks));
         clk[ssi1_div] = imx_clk_divider("ssi1_div", "ssi1_sel", CCM_PCDR0, 16, 6);
-        clk[ssi2_div] = imx_clk_divider("ssi2_div", "ssi2_sel", CCM_PCDR0, 26, 3);
+        clk[ssi2_div] = imx_clk_divider("ssi2_div", "ssi2_sel", CCM_PCDR0, 26, 6);
         clk[clko_en] = imx_clk_gate("clko_en", "clko_div", CCM_PCCR0, 0);
         clk[ssi2_ipg_gate] = imx_clk_gate("ssi2_ipg_gate", "ipg", CCM_PCCR0, 0);
         clk[ssi1_ipg_gate] = imx_clk_gate("ssi1_ipg_gate", "ipg", CCM_PCCR0, 1);
diff --git a/arch/arm/mach-imx/ehci-imx25.c b/arch/arm/mach-imx/ehci-imx25.c
index 412c583a24b0..576af7446952 100644
--- a/arch/arm/mach-imx/ehci-imx25.c
+++ b/arch/arm/mach-imx/ehci-imx25.c
@@ -30,7 +30,7 @@
 #define MX25_H1_SIC_SHIFT       21
 #define MX25_H1_SIC_MASK        (0x3 << MX25_H1_SIC_SHIFT)
 #define MX25_H1_PP_BIT          (1 << 18)
-#define MX25_H1_PM_BIT          (1 << 8)
+#define MX25_H1_PM_BIT          (1 << 16)
 #define MX25_H1_IPPUE_UP_BIT    (1 << 7)
 #define MX25_H1_IPPUE_DOWN_BIT  (1 << 6)
 #define MX25_H1_TLL_BIT         (1 << 5)
diff --git a/arch/arm/mach-imx/ehci-imx35.c b/arch/arm/mach-imx/ehci-imx35.c
index 779e16eb65cb..293397852e4e 100644
--- a/arch/arm/mach-imx/ehci-imx35.c
+++ b/arch/arm/mach-imx/ehci-imx35.c
@@ -30,7 +30,7 @@
 #define MX35_H1_SIC_SHIFT       21
 #define MX35_H1_SIC_MASK        (0x3 << MX35_H1_SIC_SHIFT)
 #define MX35_H1_PP_BIT          (1 << 18)
-#define MX35_H1_PM_BIT          (1 << 8)
+#define MX35_H1_PM_BIT          (1 << 16)
 #define MX35_H1_IPPUE_UP_BIT    (1 << 7)
 #define MX35_H1_IPPUE_DOWN_BIT  (1 << 6)
 #define MX35_H1_TLL_BIT         (1 << 5)
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 9d2c843bde02..b5deb0554552 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -108,9 +108,8 @@ void __init imx3_init_l2x0(void)
         }
 
         l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096);
-        if (IS_ERR(l2x0_base)) {
-                printk(KERN_ERR "remapping L2 cache area failed with %ld\n",
-                                PTR_ERR(l2x0_base));
+        if (!l2x0_base) {
+                printk(KERN_ERR "remapping L2 cache area failed\n");
                 return;
         }
 
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 1694f01ce2b6..6d6bde3e15fa 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -410,6 +410,7 @@ void __init ixp4xx_pci_preinit(void)
                  * Enable the IO window to be way up high, at 0xfffffc00
                  */
                 local_write_config(PCI_BASE_ADDRESS_5, 4, 0xfffffc01);
+                local_write_config(0x40, 4, 0x000080FF); /* No TRDY time limit */
         } else {
                 printk("PCI: IXP4xx is target - No bus scan performed\n");
         }
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index fdf91a160884..8c0c0e2d0727 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -67,15 +67,12 @@ static struct map_desc ixp4xx_io_desc[] __initdata = {
                 .pfn            = __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS),
                 .length         = IXP4XX_PCI_CFG_REGION_SIZE,
                 .type           = MT_DEVICE
-        },
-#ifdef CONFIG_DEBUG_LL
-        {       /* Debug UART mapping */
-                .virtual        = (unsigned long)IXP4XX_DEBUG_UART_BASE_VIRT,
-                .pfn            = __phys_to_pfn(IXP4XX_DEBUG_UART_BASE_PHYS),
-                .length         = IXP4XX_DEBUG_UART_REGION_SIZE,
+        }, {    /* Queue Manager */
+                .virtual        = (unsigned long)IXP4XX_QMGR_BASE_VIRT,
+                .pfn            = __phys_to_pfn(IXP4XX_QMGR_BASE_PHYS),
+                .length         = IXP4XX_QMGR_REGION_SIZE,
                 .type           = MT_DEVICE
-        }
-#endif
+        },
 };
 
 void __init ixp4xx_map_io(void)
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index b800a031207c..53b8348dfcc2 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -15,6 +15,7 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
 #include <asm/mach/pci.h>
+#include <asm/system_info.h>
 
 #define SLOT_ETHA               0x0B    /* IDSEL = AD21 */
 #define SLOT_ETHB               0x0C    /* IDSEL = AD20 */
@@ -329,7 +330,7 @@ static struct platform_device device_hss_tab[] = {
 };
 
 
-static struct platform_device *device_tab[6] __initdata = {
+static struct platform_device *device_tab[7] __initdata = {
         &device_flash,          /* index 0 */
 };
 
diff --git a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
index 8c9f8d564492..ff686cbc5df4 100644
--- a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S
@@ -17,8 +17,8 @@
 #else
                 mov     \rp, #0
 #endif
-                orr     \rv, \rp, #0xff000000   @ virtual
-                orr     \rv, \rv, #0x00b00000
+                orr     \rv, \rp, #0xfe000000   @ virtual
+                orr     \rv, \rv, #0x00f00000
                 orr     \rp, \rp, #0xc8000000   @ physical
                 .endm
 
diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
index eb68b61ce975..c5bae9c035d5 100644
--- a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
@@ -30,51 +30,43 @@
  *
  * 0x50000000   0x10000000      ioremap'd       EXP BUS
  *
- * 0x6000000    0x00004000      ioremap'd       QMgr
+ * 0xC8000000   0x00013000      0xFEF00000      On-Chip Peripherals
  *
- * 0xC0000000   0x00001000      0xffbff000      PCI CFG
+ * 0xC0000000   0x00001000      0xFEF13000      PCI CFG
  *
- * 0xC4000000   0x00001000      0xffbfe000      EXP CFG
+ * 0xC4000000   0x00001000      0xFEF14000      EXP CFG
  *
- * 0xC8000000   0x00013000      0xffbeb000      On-Chip Peripherals
+ * 0x60000000   0x00004000      0xFEF15000      QMgr
  */
 
 /*
  * Queue Manager
  */
-#define IXP4XX_QMGR_BASE_PHYS           (0x60000000)
-#define IXP4XX_QMGR_REGION_SIZE         (0x00004000)
+#define IXP4XX_QMGR_BASE_PHYS           0x60000000
+#define IXP4XX_QMGR_BASE_VIRT           IOMEM(0xFEF15000)
+#define IXP4XX_QMGR_REGION_SIZE         0x00004000
 
 /*
- * Expansion BUS Configuration registers
+ * Peripheral space, including debug UART. Must be section-aligned so that
+ * it can be used with the low-level debug code.
  */
-#define IXP4XX_EXP_CFG_BASE_PHYS        (0xC4000000)
-#define IXP4XX_EXP_CFG_BASE_VIRT        IOMEM(0xFFBFE000)
-#define IXP4XX_EXP_CFG_REGION_SIZE      (0x00001000)
+#define IXP4XX_PERIPHERAL_BASE_PHYS     0xC8000000
+#define IXP4XX_PERIPHERAL_BASE_VIRT     IOMEM(0xFEF00000)
+#define IXP4XX_PERIPHERAL_REGION_SIZE   0x00013000
 
 /*
  * PCI Config registers
  */
-#define IXP4XX_PCI_CFG_BASE_PHYS        (0xC0000000)
-#define IXP4XX_PCI_CFG_BASE_VIRT        IOMEM(0xFFBFF000)
-#define IXP4XX_PCI_CFG_REGION_SIZE      (0x00001000)
-
-/*
- * Peripheral space
- */
-#define IXP4XX_PERIPHERAL_BASE_PHYS     (0xC8000000)
-#define IXP4XX_PERIPHERAL_BASE_VIRT     IOMEM(0xFFBEB000)
-#define IXP4XX_PERIPHERAL_REGION_SIZE   (0x00013000)
+#define IXP4XX_PCI_CFG_BASE_PHYS        0xC0000000
+#define IXP4XX_PCI_CFG_BASE_VIRT        IOMEM(0xFEF13000)
+#define IXP4XX_PCI_CFG_REGION_SIZE      0x00001000
 
 /*
- * Debug UART
- *
- * This is basically a remap of UART1 into a region that is section
- * aligned so that it * can be used with the low-level debug code.
+ * Expansion BUS Configuration registers
  */
-#define IXP4XX_DEBUG_UART_BASE_PHYS     (0xC8000000)
-#define IXP4XX_DEBUG_UART_BASE_VIRT     IOMEM(0xffb00000)
-#define IXP4XX_DEBUG_UART_REGION_SIZE   (0x00001000)
+#define IXP4XX_EXP_CFG_BASE_PHYS        0xC4000000
+#define IXP4XX_EXP_CFG_BASE_VIRT        0xFEF14000
+#define IXP4XX_EXP_CFG_REGION_SIZE      0x00001000
 
 #define IXP4XX_EXP_CS0_OFFSET   0x00
 #define IXP4XX_EXP_CS1_OFFSET   0x04
diff --git a/arch/arm/mach-ixp4xx/include/mach/qmgr.h b/arch/arm/mach-ixp4xx/include/mach/qmgr.h
index 9e7cad2d54cb..4de8da536dbb 100644
--- a/arch/arm/mach-ixp4xx/include/mach/qmgr.h
+++ b/arch/arm/mach-ixp4xx/include/mach/qmgr.h
@@ -86,7 +86,7 @@ void qmgr_release_queue(unsigned int queue);
 
 static inline void qmgr_put_entry(unsigned int queue, u32 val)
 {
-        extern struct qmgr_regs __iomem *qmgr_regs;
+        struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
 #if DEBUG_QMGR
         BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
 
@@ -99,7 +99,7 @@ static inline void qmgr_put_entry(unsigned int queue, u32 val)
 static inline u32 qmgr_get_entry(unsigned int queue)
 {
         u32 val;
-        extern struct qmgr_regs __iomem *qmgr_regs;
+        const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
         val = __raw_readl(&qmgr_regs->acc[queue][0]);
 #if DEBUG_QMGR
         BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */
@@ -112,14 +112,14 @@ static inline u32 qmgr_get_entry(unsigned int queue)
 
 static inline int __qmgr_get_stat1(unsigned int queue)
 {
-        extern struct qmgr_regs __iomem *qmgr_regs;
+        const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
         return (__raw_readl(&qmgr_regs->stat1[queue >> 3])
                 >> ((queue & 7) << 2)) & 0xF;
 }
 
 static inline int __qmgr_get_stat2(unsigned int queue)
 {
-        extern struct qmgr_regs __iomem *qmgr_regs;
+        const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
         BUG_ON(queue >= HALF_QUEUES);
         return (__raw_readl(&qmgr_regs->stat2[queue >> 4])
                 >> ((queue & 0xF) << 1)) & 0x3;
@@ -145,7 +145,7 @@ static inline int qmgr_stat_empty(unsigned int queue)
  */
 static inline int qmgr_stat_below_low_watermark(unsigned int queue)
 {
-        extern struct qmgr_regs __iomem *qmgr_regs;
+        const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
         if (queue >= HALF_QUEUES)
                 return (__raw_readl(&qmgr_regs->statne_h) >>
                         (queue - HALF_QUEUES)) & 0x01;
@@ -172,7 +172,7 @@ static inline int qmgr_stat_above_high_watermark(unsigned int queue)
  */
 static inline int qmgr_stat_full(unsigned int queue)
 {
-        extern struct qmgr_regs __iomem *qmgr_regs;
+        const struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
         if (queue >= HALF_QUEUES)
                 return (__raw_readl(&qmgr_regs->statf_h) >>
                         (queue - HALF_QUEUES)) & 0x01;
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_npe.c b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
index a17ed79207a4..d4eb09a62863 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_npe.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
@@ -116,7 +116,11 @@
 /* NPE mailbox_status value for reset */
 #define RESET_MBOX_STAT                 0x0000F0F0
 
-const char *npe_names[] = { "NPE-A", "NPE-B", "NPE-C" };
+#define NPE_A_FIRMWARE "NPE-A"
+#define NPE_B_FIRMWARE "NPE-B"
+#define NPE_C_FIRMWARE "NPE-C"
+
+const char *npe_names[] = { NPE_A_FIRMWARE, NPE_B_FIRMWARE, NPE_C_FIRMWARE };
 
 #define print_npe(pri, npe, fmt, ...)                                   \
         printk(pri "%s: " fmt, npe_name(npe), ## __VA_ARGS__)
@@ -724,6 +728,9 @@ module_exit(npe_cleanup_module);
 
 MODULE_AUTHOR("Krzysztof Halasa");
 MODULE_LICENSE("GPL v2");
+MODULE_FIRMWARE(NPE_A_FIRMWARE);
+MODULE_FIRMWARE(NPE_B_FIRMWARE);
+MODULE_FIRMWARE(NPE_C_FIRMWARE);
 
 EXPORT_SYMBOL(npe_names);
 EXPORT_SYMBOL(npe_running);
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
index 852f7c9f87d0..9d1b6b7c394c 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
@@ -14,7 +14,7 @@
 #include <linux/module.h>
 #include <mach/qmgr.h>
 
-struct qmgr_regs __iomem *qmgr_regs;
+static struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
 static struct resource *mem_res;
 static spinlock_t qmgr_lock;
 static u32 used_sram_bitmap[4]; /* 128 16-dword pages */
@@ -293,12 +293,6 @@ static int qmgr_init(void)
         if (mem_res == NULL)
                 return -EBUSY;
 
-        qmgr_regs = ioremap(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
-        if (qmgr_regs == NULL) {
-                err = -ENOMEM;
-                goto error_map;
-        }
-
         /* reset qmgr registers */
         for (i = 0; i < 4; i++) {
                 __raw_writel(0x33333333, &qmgr_regs->stat1[i]);
@@ -347,8 +341,6 @@ static int qmgr_init(void)
 error_irq2:
         free_irq(IRQ_IXP4XX_QM1, NULL);
 error_irq:
-        iounmap(qmgr_regs);
-error_map:
         release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
         return err;
 }
@@ -359,7 +351,6 @@ static void qmgr_remove(void)
         free_irq(IRQ_IXP4XX_QM2, NULL);
         synchronize_irq(IRQ_IXP4XX_QM1);
         synchronize_irq(IRQ_IXP4XX_QM2);
-        iounmap(qmgr_regs);
         release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
 }
 
@@ -369,7 +360,6 @@ module_exit(qmgr_remove);
 MODULE_LICENSE("GPL v2");
 MODULE_AUTHOR("Krzysztof Halasa");
 
-EXPORT_SYMBOL(qmgr_regs);
 EXPORT_SYMBOL(qmgr_set_irq);
 EXPORT_SYMBOL(qmgr_enable_irq);
 EXPORT_SYMBOL(qmgr_disable_irq);
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index ec544918b12c..74fc5a074fc4 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -207,14 +207,19 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
         return 1;
 }
 
+/*
+ * The root complex has a hardwired class of PCI_CLASS_MEMORY_OTHER, when it
+ * is operating as a root complex this needs to be switched to
+ * PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on
+ * the device. Decoding setup is handled by the orion code.
+ */
 static void __devinit rc_pci_fixup(struct pci_dev *dev)
 {
-        /*
-         * Prevent enumeration of root complex.
-         */
         if (dev->bus->parent == NULL && dev->devfn == 0) {
                 int i;
 
+                dev->class &= 0xff;
+                dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
                 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
                         dev->resource[i].start = 0;
                         dev->resource[i].end   = 0;
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 2a1a898c7f90..d669e227e00c 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -11,7 +11,6 @@ config ARCH_OMAP2PLUS_TYPICAL
         select I2C_OMAP
         select MENELAUS if ARCH_OMAP2
         select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5
-        select PINCTRL
         select PM_RUNTIME
         select REGULATOR
         select SERIAL_OMAP
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index fe40d9e488c9..d6721a7f4c3b 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -184,8 +184,6 @@ obj-$(CONFIG_HW_PERF_EVENTS)		+= pmu.o
 obj-$(CONFIG_OMAP_MBOX_FWK)             += mailbox_mach.o
 mailbox_mach-objs                       := mailbox.o
 
-obj-$(CONFIG_OMAP_IOMMU)                += iommu2.o
-
 iommu-$(CONFIG_OMAP_IOMMU)              := omap-iommu.o
 obj-y                                   += $(iommu-m) $(iommu-y)
 
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 48d5e41dfbfa..378590694447 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -580,6 +580,11 @@ static void __init igep_wlan_bt_init(void)
         } else
                 return;
 
+        /* Make sure that the GPIO pins are muxed correctly */
+        omap_mux_init_gpio(igep_wlan_bt_gpios[0].gpio, OMAP_PIN_OUTPUT);
+        omap_mux_init_gpio(igep_wlan_bt_gpios[1].gpio, OMAP_PIN_OUTPUT);
+        omap_mux_init_gpio(igep_wlan_bt_gpios[2].gpio, OMAP_PIN_OUTPUT);
+
         err = gpio_request_array(igep_wlan_bt_gpios,
                                  ARRAY_SIZE(igep_wlan_bt_gpios));
         if (err) {
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 388c431c745a..d41ab98890ff 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -24,6 +24,7 @@
 #include <linux/input.h>
 #include <linux/gpio_keys.h>
 #include <linux/opp.h>
+#include <linux/cpu.h>
 
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
@@ -444,27 +445,31 @@ static struct omap_board_mux board_mux[] __initdata = {
 };
 #endif
 
-static void __init beagle_opp_init(void)
+static int __init beagle_opp_init(void)
 {
         int r = 0;
 
-        /* Initialize the omap3 opp table */
-        if (omap3_opp_init()) {
+        if (!machine_is_omap3_beagle())
+                return 0;
+
+        /* Initialize the omap3 opp table if not already created. */
+        r = omap3_opp_init();
+        if (IS_ERR_VALUE(r) && (r != -EEXIST)) {
                 pr_err("%s: opp default init failed\n", __func__);
-                return;
+                return r;
         }
 
         /* Custom OPP enabled for all xM versions */
         if (cpu_is_omap3630()) {
                 struct device *mpu_dev, *iva_dev;
 
-                mpu_dev = omap_device_get_by_hwmod_name("mpu");
+                mpu_dev = get_cpu_device(0);
                 iva_dev = omap_device_get_by_hwmod_name("iva");
 
                 if (IS_ERR(mpu_dev) || IS_ERR(iva_dev)) {
                         pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n",
                                 __func__, mpu_dev, iva_dev);
-                        return;
+                        return -ENODEV;
                 }
                 /* Enable MPU 1GHz and lower opps */
                 r = opp_enable(mpu_dev, 800000000);
@@ -484,8 +489,9 @@ static void __init beagle_opp_init(void)
                         opp_disable(iva_dev, 660000000);
                 }
         }
-        return;
+        return 0;
 }
+device_initcall(beagle_opp_init);
 
 static void __init omap3_beagle_init(void)
 {
@@ -522,8 +528,6 @@ static void __init omap3_beagle_init(void)
         /* Ensure SDRC pins are mux'd for self-refresh */
         omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
         omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
-
-        beagle_opp_init();
 }
 
 MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
diff --git a/arch/arm/mach-omap2/clock33xx_data.c b/arch/arm/mach-omap2/clock33xx_data.c
index 114ab4b8e0e3..1a45d6bd2539 100644
--- a/arch/arm/mach-omap2/clock33xx_data.c
+++ b/arch/arm/mach-omap2/clock33xx_data.c
@@ -1073,6 +1073,8 @@ static struct omap_clk am33xx_clks[] = {
         CLK(NULL,       "gfx_fck_div_ck",       &gfx_fck_div_ck,        CK_AM33XX),
         CLK(NULL,       "sysclkout_pre_ck",     &sysclkout_pre_ck,      CK_AM33XX),
         CLK(NULL,       "clkout2_ck",           &clkout2_ck,    CK_AM33XX),
+        CLK(NULL,       "timer_32k_ck",         &clkdiv32k_ick, CK_AM33XX),
+        CLK(NULL,       "timer_sys_ck",         &sys_clkin_ck,  CK_AM33XX),
 };
 
 int __init am33xx_clk_init(void)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 6efc30c961a5..067c486fe295 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -1316,16 +1316,6 @@ static struct clk dmic_fck = {
         .clkdm_name     = "abe_clkdm",
 };
 
-static struct clk dsp_fck = {
-        .name           = "dsp_fck",
-        .ops            = &clkops_omap2_dflt,
-        .enable_reg     = OMAP4430_CM_TESLA_TESLA_CLKCTRL,
-        .enable_bit     = OMAP4430_MODULEMODE_HWCTRL,
-        .clkdm_name     = "tesla_clkdm",
-        .parent         = &dpll_iva_m4x2_ck,
-        .recalc         = &followparent_recalc,
-};
-
 static struct clk dss_sys_clk = {
         .name           = "dss_sys_clk",
         .ops            = &clkops_omap2_dflt,
@@ -1696,16 +1686,6 @@ static struct clk i2c4_fck = {
         .recalc         = &followparent_recalc,
 };
 
-static struct clk ipu_fck = {
-        .name           = "ipu_fck",
-        .ops            = &clkops_omap2_dflt,
-        .enable_reg     = OMAP4430_CM_DUCATI_DUCATI_CLKCTRL,
-        .enable_bit     = OMAP4430_MODULEMODE_HWCTRL,
-        .clkdm_name     = "ducati_clkdm",
-        .parent         = &ducati_clk_mux_ck,
-        .recalc         = &followparent_recalc,
-};
-
 static struct clk iss_ctrlclk = {
         .name           = "iss_ctrlclk",
         .ops            = &clkops_omap2_dflt,
@@ -3151,7 +3131,6 @@ static struct omap_clk omap44xx_clks[] = {
         CLK(NULL,       "div_ts_ck",                    &div_ts_ck,     CK_446X),
         CLK(NULL,       "dmic_sync_mux_ck",             &dmic_sync_mux_ck,      CK_443X),
         CLK(NULL,       "dmic_fck",                     &dmic_fck,      CK_443X),
-        CLK(NULL,       "dsp_fck",                      &dsp_fck,       CK_443X),
         CLK(NULL,       "dss_sys_clk",                  &dss_sys_clk,   CK_443X),
         CLK(NULL,       "dss_tv_clk",                   &dss_tv_clk,    CK_443X),
         CLK(NULL,       "dss_48mhz_clk",                &dss_48mhz_clk, CK_443X),
@@ -3183,7 +3162,6 @@ static struct omap_clk omap44xx_clks[] = {
         CLK(NULL,       "i2c2_fck",                     &i2c2_fck,      CK_443X),
         CLK(NULL,       "i2c3_fck",                     &i2c3_fck,      CK_443X),
         CLK(NULL,       "i2c4_fck",                     &i2c4_fck,      CK_443X),
-        CLK(NULL,       "ipu_fck",                      &ipu_fck,       CK_443X),
         CLK(NULL,       "iss_ctrlclk",                  &iss_ctrlclk,   CK_443X),
         CLK(NULL,       "iss_fck",                      &iss_fck,       CK_443X),
         CLK(NULL,       "iva_fck",                      &iva_fck,       CK_443X),
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index b56d06b48782..95192a062d5d 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -359,7 +359,7 @@ static struct clockdomain iss_44xx_clkdm = {
         .clkdm_offs       = OMAP4430_CM2_CAM_CAM_CDOFFS,
         .wkdep_srcs       = iss_wkup_sleep_deps,
         .sleepdep_srcs    = iss_wkup_sleep_deps,
-        .flags            = CLKDM_CAN_HWSUP_SWSUP,
+        .flags            = CLKDM_CAN_SWSUP,
 };
 
 static struct clockdomain l3_dss_44xx_clkdm = {
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index 48daac2581b4..84551f205e46 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -64,30 +64,36 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
         struct spi_board_info *spi_bi = &ads7846_spi_board_info;
         int err;
 
-        err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown");
-        if (err) {
-                pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err);
-                return;
-        }
+        /*
+         * If a board defines get_pendown_state() function, request the pendown
+         * GPIO and set the GPIO debounce time.
+         * If a board does not define the get_pendown_state() function, then
+         * the ads7846 driver will setup the pendown GPIO itself.
+         */
+        if (board_pdata && board_pdata->get_pendown_state) {
+                err = gpio_request_one(gpio_pendown, GPIOF_IN, "TSPenDown");
+                if (err) {
+                        pr_err("Couldn't obtain gpio for TSPenDown: %d\n", err);
+                        return;
+                }
 
-        if (gpio_debounce)
-                gpio_set_debounce(gpio_pendown, gpio_debounce);
+                if (gpio_debounce)
+                        gpio_set_debounce(gpio_pendown, gpio_debounce);
+
+                gpio_export(gpio_pendown, 0);
+        }
 
         spi_bi->bus_num = bus_num;
         spi_bi->irq     = gpio_to_irq(gpio_pendown);
 
+        ads7846_config.gpio_pendown = gpio_pendown;
+
         if (board_pdata) {
                 board_pdata->gpio_pendown = gpio_pendown;
+                board_pdata->gpio_pendown_debounce = gpio_debounce;
                 spi_bi->platform_data = board_pdata;
-                if (board_pdata->get_pendown_state)
-                        gpio_export(gpio_pendown, 0);
-        } else {
-                ads7846_config.gpio_pendown = gpio_pendown;
         }
 
-        if (!board_pdata || (board_pdata && !board_pdata->get_pendown_state))
-                gpio_free(gpio_pendown);
-
         spi_register_board_info(&ads7846_spi_board_info, 1);
 }
 #else
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index cba60e05e32e..787a996ec4eb 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -19,6 +19,7 @@
 #include <linux/of.h>
 #include <linux/pinctrl/machine.h>
 #include <linux/platform_data/omap4-keypad.h>
+#include <linux/platform_data/omap_ocp2scp.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>
@@ -126,7 +127,7 @@ static struct platform_device omap2cam_device = {
 
 #if defined(CONFIG_IOMMU_API)
 
-#include <plat/iommu.h>
+#include <linux/platform_data/iommu-omap.h>
 
 static struct resource omap3isp_resources[] = {
         {
@@ -213,7 +214,7 @@ static struct platform_device omap3isp_device = {
 };
 
 static struct omap_iommu_arch_data omap3_isp_iommu = {
-        .name = "isp",
+        .name = "mmu_isp",
 };
 
 int omap3_init_camera(struct isp_platform_data *pdata)
@@ -613,6 +614,83 @@ static void omap_init_vout(void)
 static inline void omap_init_vout(void) {}
 #endif
 
+#if defined(CONFIG_OMAP_OCP2SCP) || defined(CONFIG_OMAP_OCP2SCP_MODULE)
+static int count_ocp2scp_devices(struct omap_ocp2scp_dev *ocp2scp_dev)
+{
+        int cnt = 0;
+
+        while (ocp2scp_dev->drv_name != NULL) {
+                cnt++;
+                ocp2scp_dev++;
+        }
+
+        return cnt;
+}
+
+static void omap_init_ocp2scp(void)
+{
+        struct omap_hwmod       *oh;
+        struct platform_device  *pdev;
+        int                     bus_id = -1, dev_cnt = 0, i;
+        struct omap_ocp2scp_dev *ocp2scp_dev;
+        const char              *oh_name, *name;
+        struct omap_ocp2scp_platform_data *pdata;
+
+        if (!cpu_is_omap44xx())
+                return;
+
+        oh_name = "ocp2scp_usb_phy";
+        name    = "omap-ocp2scp";
+
+        oh = omap_hwmod_lookup(oh_name);
+        if (!oh) {
+                pr_err("%s: could not find omap_hwmod for %s\n", __func__,
+                                                                oh_name);
+                return;
+        }
+
+        pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
+        if (!pdata) {
+                pr_err("%s: No memory for ocp2scp pdata\n", __func__);
+                return;
+        }
+
+        ocp2scp_dev = oh->dev_attr;
+        dev_cnt = count_ocp2scp_devices(ocp2scp_dev);
+
+        if (!dev_cnt) {
+                pr_err("%s: No devices connected to ocp2scp\n", __func__);
+                kfree(pdata);
+                return;
+        }
+
+        pdata->devices = kzalloc(sizeof(struct omap_ocp2scp_dev *)
+                                        * dev_cnt, GFP_KERNEL);
+        if (!pdata->devices) {
+                pr_err("%s: No memory for ocp2scp pdata devices\n", __func__);
+                kfree(pdata);
+                return;
+        }
+
+        for (i = 0; i < dev_cnt; i++, ocp2scp_dev++)
+                pdata->devices[i] = ocp2scp_dev;
+
+        pdata->dev_cnt  = dev_cnt;
+
+        pdev = omap_device_build(name, bus_id, oh, pdata, sizeof(*pdata), NULL,
+                                                                0, false);
+        if (IS_ERR(pdev)) {
+                pr_err("Could not build omap_device for %s %s\n",
+                                                name, oh_name);
+                kfree(pdata->devices);
+                kfree(pdata);
+                return;
+        }
+}
+#else
+static inline void omap_init_ocp2scp(void) { }
+#endif
+
 /*-------------------------------------------------------------------------*/
 
 static int __init omap2_init_devices(void)
@@ -640,6 +718,7 @@ static int __init omap2_init_devices(void)
         omap_init_sham();
         omap_init_aes();
         omap_init_vout();
+        omap_init_ocp2scp();
 
         return 0;
 }
diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c
deleted file mode 100644
index eefc37912ef3..000000000000
--- a/arch/arm/mach-omap2/iommu2.c
+++ /dev/null
@@ -1,361 +0,0 @@
-/*
- * omap iommu: omap2/3 architecture specific functions
- *
- * Copyright (C) 2008-2009 Nokia Corporation
- *
- * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>,
- *              Paul Mundt and Toshihiro Kobayashi
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/err.h>
-#include <linux/device.h>
-#include <linux/jiffies.h>
-#include <linux/module.h>
-#include <linux/slab.h>
-#include <linux/stringify.h>
-
-#include <plat/iommu.h>
-
-/*
- * omap2 architecture specific register bit definitions
- */
-#define IOMMU_ARCH_VERSION      0x00000011
-
-/* SYSCONF */
-#define MMU_SYS_IDLE_SHIFT      3
-#define MMU_SYS_IDLE_FORCE      (0 << MMU_SYS_IDLE_SHIFT)
-#define MMU_SYS_IDLE_NONE       (1 << MMU_SYS_IDLE_SHIFT)
-#define MMU_SYS_IDLE_SMART      (2 << MMU_SYS_IDLE_SHIFT)
-#define MMU_SYS_IDLE_MASK       (3 << MMU_SYS_IDLE_SHIFT)
-
-#define MMU_SYS_SOFTRESET       (1 << 1)
-#define MMU_SYS_AUTOIDLE        1
-
-/* SYSSTATUS */
-#define MMU_SYS_RESETDONE       1
-
-/* IRQSTATUS & IRQENABLE */
-#define MMU_IRQ_MULTIHITFAULT   (1 << 4)
-#define MMU_IRQ_TABLEWALKFAULT  (1 << 3)
-#define MMU_IRQ_EMUMISS         (1 << 2)
-#define MMU_IRQ_TRANSLATIONFAULT        (1 << 1)
-#define MMU_IRQ_TLBMISS         (1 << 0)
-
-#define __MMU_IRQ_FAULT         \
-        (MMU_IRQ_MULTIHITFAULT | MMU_IRQ_EMUMISS | MMU_IRQ_TRANSLATIONFAULT)
-#define MMU_IRQ_MASK            \
-        (__MMU_IRQ_FAULT | MMU_IRQ_TABLEWALKFAULT | MMU_IRQ_TLBMISS)
-#define MMU_IRQ_TWL_MASK        (__MMU_IRQ_FAULT | MMU_IRQ_TABLEWALKFAULT)
-#define MMU_IRQ_TLB_MISS_MASK   (__MMU_IRQ_FAULT | MMU_IRQ_TLBMISS)
-
-/* MMU_CNTL */
-#define MMU_CNTL_SHIFT          1
-#define MMU_CNTL_MASK           (7 << MMU_CNTL_SHIFT)
-#define MMU_CNTL_EML_TLB        (1 << 3)
-#define MMU_CNTL_TWL_EN         (1 << 2)
-#define MMU_CNTL_MMU_EN         (1 << 1)
-
-#define get_cam_va_mask(pgsz)                           \
-        (((pgsz) == MMU_CAM_PGSZ_16M) ? 0xff000000 :    \
-         ((pgsz) == MMU_CAM_PGSZ_1M)  ? 0xfff00000 :    \
-         ((pgsz) == MMU_CAM_PGSZ_64K) ? 0xffff0000 :    \
-         ((pgsz) == MMU_CAM_PGSZ_4K)  ? 0xfffff000 : 0)
-
-
-static void __iommu_set_twl(struct omap_iommu *obj, bool on)
-{
-        u32 l = iommu_read_reg(obj, MMU_CNTL);
-
-        if (on)
-                iommu_write_reg(obj, MMU_IRQ_TWL_MASK, MMU_IRQENABLE);
-        else
-                iommu_write_reg(obj, MMU_IRQ_TLB_MISS_MASK, MMU_IRQENABLE);
-
-        l &= ~MMU_CNTL_MASK;
-        if (on)
-                l |= (MMU_CNTL_MMU_EN | MMU_CNTL_TWL_EN);
-        else
-                l |= (MMU_CNTL_MMU_EN);
-
-        iommu_write_reg(obj, l, MMU_CNTL);
-}
-
-
-static int omap2_iommu_enable(struct omap_iommu *obj)
-{
-        u32 l, pa;
-        unsigned long timeout;
-
-        if (!obj->iopgd || !IS_ALIGNED((u32)obj->iopgd,  SZ_16K))
-                return -EINVAL;
-
-        pa = virt_to_phys(obj->iopgd);
-        if (!IS_ALIGNED(pa, SZ_16K))
-                return -EINVAL;
-
-        iommu_write_reg(obj, MMU_SYS_SOFTRESET, MMU_SYSCONFIG);
-
-        timeout = jiffies + msecs_to_jiffies(20);
-        do {
-                l = iommu_read_reg(obj, MMU_SYSSTATUS);
-                if (l & MMU_SYS_RESETDONE)
-                        break;
-        } while (!time_after(jiffies, timeout));
-
-        if (!(l & MMU_SYS_RESETDONE)) {
-                dev_err(obj->dev, "can't take mmu out of reset\n");
-                return -ENODEV;
-        }
-
-        l = iommu_read_reg(obj, MMU_REVISION);
-        dev_info(obj->dev, "%s: version %d.%d\n", obj->name,
-                 (l >> 4) & 0xf, l & 0xf);
-
-        l = iommu_read_reg(obj, MMU_SYSCONFIG);
-        l &= ~MMU_SYS_IDLE_MASK;
-        l |= (MMU_SYS_IDLE_SMART | MMU_SYS_AUTOIDLE);
-        iommu_write_reg(obj, l, MMU_SYSCONFIG);
-
-        iommu_write_reg(obj, pa, MMU_TTB);
-
-        __iommu_set_twl(obj, true);
-
-        return 0;
-}
-
-static void omap2_iommu_disable(struct omap_iommu *obj)
-{
-        u32 l = iommu_read_reg(obj, MMU_CNTL);
-
-        l &= ~MMU_CNTL_MASK;
-        iommu_write_reg(obj, l, MMU_CNTL);
-        iommu_write_reg(obj, MMU_SYS_IDLE_FORCE, MMU_SYSCONFIG);
-
-        dev_dbg(obj->dev, "%s is shutting down\n", obj->name);
-}
-
-static void omap2_iommu_set_twl(struct omap_iommu *obj, bool on)
-{
-        __iommu_set_twl(obj, false);
-}
-
-static u32 omap2_iommu_fault_isr(struct omap_iommu *obj, u32 *ra)
-{
-        u32 stat, da;
-        u32 errs = 0;
-
-        stat = iommu_read_reg(obj, MMU_IRQSTATUS);
-        stat &= MMU_IRQ_MASK;
-        if (!stat) {
-                *ra = 0;
-                return 0;
-        }
-
-        da = iommu_read_reg(obj, MMU_FAULT_AD);
-        *ra = da;
-
-        if (stat & MMU_IRQ_TLBMISS)
-                errs |= OMAP_IOMMU_ERR_TLB_MISS;
-        if (stat & MMU_IRQ_TRANSLATIONFAULT)
-                errs |= OMAP_IOMMU_ERR_TRANS_FAULT;
-        if (stat & MMU_IRQ_EMUMISS)
-                errs |= OMAP_IOMMU_ERR_EMU_MISS;
-        if (stat & MMU_IRQ_TABLEWALKFAULT)
-                errs |= OMAP_IOMMU_ERR_TBLWALK_FAULT;
-        if (stat & MMU_IRQ_MULTIHITFAULT)
-                errs |= OMAP_IOMMU_ERR_MULTIHIT_FAULT;
-        iommu_write_reg(obj, stat, MMU_IRQSTATUS);
-
-        return errs;
-}
-
-static void omap2_tlb_read_cr(struct omap_iommu *obj, struct cr_regs *cr)
-{
-        cr->cam = iommu_read_reg(obj, MMU_READ_CAM);
-        cr->ram = iommu_read_reg(obj, MMU_READ_RAM);
-}
-
-static void omap2_tlb_load_cr(struct omap_iommu *obj, struct cr_regs *cr)
-{
-        iommu_write_reg(obj, cr->cam | MMU_CAM_V, MMU_CAM);
-        iommu_write_reg(obj, cr->ram, MMU_RAM);
-}
-
-static u32 omap2_cr_to_virt(struct cr_regs *cr)
-{
-        u32 page_size = cr->cam & MMU_CAM_PGSZ_MASK;
-        u32 mask = get_cam_va_mask(cr->cam & page_size);
-
-        return cr->cam & mask;
-}
-
-static struct cr_regs *omap2_alloc_cr(struct omap_iommu *obj,
-                                                struct iotlb_entry *e)
-{
-        struct cr_regs *cr;
-
-        if (e->da & ~(get_cam_va_mask(e->pgsz))) {
-                dev_err(obj->dev, "%s:\twrong alignment: %08x\n", __func__,
-                        e->da);
-                return ERR_PTR(-EINVAL);
-        }
-
-        cr = kmalloc(sizeof(*cr), GFP_KERNEL);
-        if (!cr)
-                return ERR_PTR(-ENOMEM);
-
-        cr->cam = (e->da & MMU_CAM_VATAG_MASK) | e->prsvd | e->pgsz | e->valid;
-        cr->ram = e->pa | e->endian | e->elsz | e->mixed;
-
-        return cr;
-}
-
-static inline int omap2_cr_valid(struct cr_regs *cr)
-{
-        return cr->cam & MMU_CAM_V;
-}
-
-static u32 omap2_get_pte_attr(struct iotlb_entry *e)
-{
-        u32 attr;
-
-        attr = e->mixed << 5;
-        attr |= e->endian;
-        attr |= e->elsz >> 3;
-        attr <<= (((e->pgsz == MMU_CAM_PGSZ_4K) ||
-                        (e->pgsz == MMU_CAM_PGSZ_64K)) ? 0 : 6);
-        return attr;
-}
-
-static ssize_t
-omap2_dump_cr(struct omap_iommu *obj, struct cr_regs *cr, char *buf)
-{
-        char *p = buf;
-
-        /* FIXME: Need more detail analysis of cam/ram */
-        p += sprintf(p, "%08x %08x %01x\n", cr->cam, cr->ram,
-                                        (cr->cam & MMU_CAM_P) ? 1 : 0);
-
-        return p - buf;
-}
-
-#define pr_reg(name)                                                    \
-        do {                                                            \
-                ssize_t bytes;                                          \
-                const char *str = "%20s: %08x\n";                       \
-                const int maxcol = 32;                                  \
-                bytes = snprintf(p, maxcol, str, __stringify(name),     \
-                                 iommu_read_reg(obj, MMU_##name));      \
-                p += bytes;                                             \
-                len -= bytes;                                           \
-                if (len < maxcol)                                       \
-                        goto out;                                       \
-        } while (0)
-
-static ssize_t
-omap2_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len)
-{
-        char *p = buf;
-
-        pr_reg(REVISION);
-        pr_reg(SYSCONFIG);
-        pr_reg(SYSSTATUS);
-        pr_reg(IRQSTATUS);
-        pr_reg(IRQENABLE);
-        pr_reg(WALKING_ST);
-        pr_reg(CNTL);
-        pr_reg(FAULT_AD);
-        pr_reg(TTB);
-        pr_reg(LOCK);
-        pr_reg(LD_TLB);
-        pr_reg(CAM);
-        pr_reg(RAM);
-        pr_reg(GFLUSH);
-        pr_reg(FLUSH_ENTRY);
-        pr_reg(READ_CAM);
-        pr_reg(READ_RAM);
-        pr_reg(EMU_FAULT_AD);
-out:
-        return p - buf;
-}
-
-static void omap2_iommu_save_ctx(struct omap_iommu *obj)
-{
-        int i;
-        u32 *p = obj->ctx;
-
-        for (i = 0; i < (MMU_REG_SIZE / sizeof(u32)); i++) {
-                p[i] = iommu_read_reg(obj, i * sizeof(u32));
-                dev_dbg(obj->dev, "%s\t[%02d] %08x\n", __func__, i, p[i]);
-        }
-
-        BUG_ON(p[0] != IOMMU_ARCH_VERSION);
-}
-
-static void omap2_iommu_restore_ctx(struct omap_iommu *obj)
-{
-        int i;
-        u32 *p = obj->ctx;
-
-        for (i = 0; i < (MMU_REG_SIZE / sizeof(u32)); i++) {
-                iommu_write_reg(obj, p[i], i * sizeof(u32));
-                dev_dbg(obj->dev, "%s\t[%02d] %08x\n", __func__, i, p[i]);
-        }
-
-        BUG_ON(p[0] != IOMMU_ARCH_VERSION);
-}
-
-static void omap2_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e)
-{
-        e->da           = cr->cam & MMU_CAM_VATAG_MASK;
-        e->pa           = cr->ram & MMU_RAM_PADDR_MASK;
-        e->valid        = cr->cam & MMU_CAM_V;
-        e->pgsz         = cr->cam & MMU_CAM_PGSZ_MASK;
-        e->endian       = cr->ram & MMU_RAM_ENDIAN_MASK;
-        e->elsz         = cr->ram & MMU_RAM_ELSZ_MASK;
-        e->mixed        = cr->ram & MMU_RAM_MIXED;
-}
-
-static const struct iommu_functions omap2_iommu_ops = {
-        .version        = IOMMU_ARCH_VERSION,
-
-        .enable         = omap2_iommu_enable,
-        .disable        = omap2_iommu_disable,
-        .set_twl        = omap2_iommu_set_twl,
-        .fault_isr      = omap2_iommu_fault_isr,
-
-        .tlb_read_cr    = omap2_tlb_read_cr,
-        .tlb_load_cr    = omap2_tlb_load_cr,
-
-        .cr_to_e        = omap2_cr_to_e,
-        .cr_to_virt     = omap2_cr_to_virt,
-        .alloc_cr       = omap2_alloc_cr,
-        .cr_valid       = omap2_cr_valid,
-        .dump_cr        = omap2_dump_cr,
-
-        .get_pte_attr   = omap2_get_pte_attr,
-
-        .save_ctx       = omap2_iommu_save_ctx,
-        .restore_ctx    = omap2_iommu_restore_ctx,
-        .dump_ctx       = omap2_iommu_dump_ctx,
-};
-
-static int __init omap2_iommu_init(void)
-{
-        return omap_install_iommu_arch(&omap2_iommu_ops);
-}
-module_init(omap2_iommu_init);
-
-static void __exit omap2_iommu_exit(void)
-{
-        omap_uninstall_iommu_arch(&omap2_iommu_ops);
-}
-module_exit(omap2_iommu_exit);
-
-MODULE_AUTHOR("Hiroshi DOYU, Paul Mundt and Toshihiro Kobayashi");
-MODULE_DESCRIPTION("omap iommu: omap2/3 architecture specific functions");
-MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c
index 17f80e4ab162..c47140bbbec4 100644
--- a/arch/arm/mach-omap2/mux34xx.c
+++ b/arch/arm/mach-omap2/mux34xx.c
@@ -614,16 +614,16 @@ static struct omap_mux __initdata omap3_muxmodes[] = {
                 "sys_off_mode", NULL, NULL, NULL,
                 "gpio_9", NULL, NULL, "safe_mode"),
         _OMAP3_MUXENTRY(UART1_CTS, 150,
-                "uart1_cts", NULL, NULL, NULL,
+                "uart1_cts", "ssi1_rdy_tx", NULL, NULL,
                 "gpio_150", "hsusb3_tll_clk", NULL, "safe_mode"),
         _OMAP3_MUXENTRY(UART1_RTS, 149,
-                "uart1_rts", NULL, NULL, NULL,
+                "uart1_rts", "ssi1_flag_tx", NULL, NULL,
                 "gpio_149", NULL, NULL, "safe_mode"),
         _OMAP3_MUXENTRY(UART1_RX, 151,
-                "uart1_rx", NULL, "mcbsp1_clkr", "mcspi4_clk",
+                "uart1_rx", "ss1_wake_tx", "mcbsp1_clkr", "mcspi4_clk",
                 "gpio_151", NULL, NULL, "safe_mode"),
         _OMAP3_MUXENTRY(UART1_TX, 148,
-                "uart1_tx", NULL, NULL, NULL,
+                "uart1_tx", "ssi1_dat_tx", NULL, NULL,
                 "gpio_148", NULL, NULL, "safe_mode"),
         _OMAP3_MUXENTRY(UART2_CTS, 144,
                 "uart2_cts", "mcbsp3_dx", "gpt9_pwm_evt", NULL,
diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c
index df298d46707c..7642fc4672c1 100644
--- a/arch/arm/mach-omap2/omap-iommu.c
+++ b/arch/arm/mach-omap2/omap-iommu.c
@@ -12,153 +12,60 @@
 
 #include <linux/module.h>
 #include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/slab.h>
 
-#include <plat/iommu.h>
+#include <linux/platform_data/iommu-omap.h>
+#include <plat/omap_hwmod.h>
+#include <plat/omap_device.h>
 
-#include "soc.h"
-#include "common.h"
-
-struct iommu_device {
-        resource_size_t base;
-        int irq;
-        struct iommu_platform_data pdata;
-        struct resource res[2];
-};
-static struct iommu_device *devices;
-static int num_iommu_devices;
-
-#ifdef CONFIG_ARCH_OMAP3
-static struct iommu_device omap3_devices[] = {
-        {
-                .base = 0x480bd400,
-                .irq = 24 + OMAP_INTC_START,
-                .pdata = {
-                        .name = "isp",
-                        .nr_tlb_entries = 8,
-                        .clk_name = "cam_ick",
-                        .da_start = 0x0,
-                        .da_end = 0xFFFFF000,
-                },
-        },
-#if defined(CONFIG_OMAP_IOMMU_IVA2)
-        {
-                .base = 0x5d000000,
-                .irq = 28 + OMAP_INTC_START,
-                .pdata = {
-                        .name = "iva2",
-                        .nr_tlb_entries = 32,
-                        .clk_name = "iva2_ck",
-                        .da_start = 0x11000000,
-                        .da_end = 0xFFFFF000,
-                },
-        },
-#endif
-};
-#define NR_OMAP3_IOMMU_DEVICES ARRAY_SIZE(omap3_devices)
-static struct platform_device *omap3_iommu_pdev[NR_OMAP3_IOMMU_DEVICES];
-#else
-#define omap3_devices           NULL
-#define NR_OMAP3_IOMMU_DEVICES  0
-#define omap3_iommu_pdev        NULL
-#endif
-
-#ifdef CONFIG_ARCH_OMAP4
-static struct iommu_device omap4_devices[] = {
-        {
-                .base = OMAP4_MMU1_BASE,
-                .irq = 100 + OMAP44XX_IRQ_GIC_START,
-                .pdata = {
-                        .name = "ducati",
-                        .nr_tlb_entries = 32,
-                        .clk_name = "ipu_fck",
-                        .da_start = 0x0,
-                        .da_end = 0xFFFFF000,
-                },
-        },
-        {
-                .base = OMAP4_MMU2_BASE,
-                .irq = 28 + OMAP44XX_IRQ_GIC_START,
-                .pdata = {
-                        .name = "tesla",
-                        .nr_tlb_entries = 32,
-                        .clk_name = "dsp_fck",
-                        .da_start = 0x0,
-                        .da_end = 0xFFFFF000,
-                },
-        },
-};
-#define NR_OMAP4_IOMMU_DEVICES ARRAY_SIZE(omap4_devices)
-static struct platform_device *omap4_iommu_pdev[NR_OMAP4_IOMMU_DEVICES];
-#else
-#define omap4_devices           NULL
-#define NR_OMAP4_IOMMU_DEVICES  0
-#define omap4_iommu_pdev        NULL
-#endif
-
-static struct platform_device **omap_iommu_pdev;
-
-static int __init omap_iommu_init(void)
+static int __init omap_iommu_dev_init(struct omap_hwmod *oh, void *unused)
 {
-        int i, err;
-        struct resource res[] = {
-                { .flags = IORESOURCE_MEM },
-                { .flags = IORESOURCE_IRQ },
-        };
+        struct platform_device *pdev;
+        struct iommu_platform_data *pdata;
+        struct omap_mmu_dev_attr *a = (struct omap_mmu_dev_attr *)oh->dev_attr;
+        static int i;
+
+        pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
+        if (!pdata)
+                return -ENOMEM;
+
+        pdata->name = oh->name;
+        pdata->nr_tlb_entries = a->nr_tlb_entries;
+        pdata->da_start = a->da_start;
+        pdata->da_end = a->da_end;
+
+        if (oh->rst_lines_cnt == 1) {
+                pdata->reset_name = oh->rst_lines->name;
+                pdata->assert_reset = omap_device_assert_hardreset;
+                pdata->deassert_reset = omap_device_deassert_hardreset;
+        }
 
-        if (cpu_is_omap34xx()) {
-                devices = omap3_devices;
-                omap_iommu_pdev = omap3_iommu_pdev;
-                num_iommu_devices = NR_OMAP3_IOMMU_DEVICES;
-        } else if (cpu_is_omap44xx()) {
-                devices = omap4_devices;
-                omap_iommu_pdev = omap4_iommu_pdev;
-                num_iommu_devices = NR_OMAP4_IOMMU_DEVICES;
-        } else
-                return -ENODEV;
+        pdev = omap_device_build("omap-iommu", i, oh, pdata, sizeof(*pdata),
+                                NULL, 0, 0);
 
-        for (i = 0; i < num_iommu_devices; i++) {
-                struct platform_device *pdev;
-                const struct iommu_device *d = &devices[i];
+        kfree(pdata);
 
-                pdev = platform_device_alloc("omap-iommu", i);
-                if (!pdev) {
-                        err = -ENOMEM;
-                        goto err_out;
-                }
+        if (IS_ERR(pdev)) {
+                pr_err("%s: device build err: %ld\n", __func__, PTR_ERR(pdev));
+                return PTR_ERR(pdev);
+        }
 
-                res[0].start = d->base;
-                res[0].end = d->base + MMU_REG_SIZE - 1;
-                res[1].start = res[1].end = d->irq;
+        i++;
 
-                err = platform_device_add_resources(pdev, res,
-                                                    ARRAY_SIZE(res));
-                if (err)
-                        goto err_out;
-                err = platform_device_add_data(pdev, &d->pdata,
-                                               sizeof(d->pdata));
-                if (err)
-                        goto err_out;
-                err = platform_device_add(pdev);
-                if (err)
-                        goto err_out;
-                omap_iommu_pdev[i] = pdev;
-        }
         return 0;
+}
 
-err_out:
-        while (i--)
-                platform_device_put(omap_iommu_pdev[i]);
-        return err;
+static int __init omap_iommu_init(void)
+{
+        return omap_hwmod_for_each_by_class("mmu", omap_iommu_dev_init, NULL);
 }
 /* must be ready before omap3isp is probed */
 subsys_initcall(omap_iommu_init);
 
 static void __exit omap_iommu_exit(void)
 {
-        int i;
-
-        for (i = 0; i < num_iommu_devices; i++)
-                platform_device_unregister(omap_iommu_pdev[i]);
+        /* Do nothing */
 }
 module_exit(omap_iommu_exit);
 
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index b969ab1d258b..87cc6d058de2 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -422,6 +422,38 @@ static int _set_softreset(struct omap_hwmod *oh, u32 *v)
 }
 
 /**
+ * _wait_softreset_complete - wait for an OCP softreset to complete
+ * @oh: struct omap_hwmod * to wait on
+ *
+ * Wait until the IP block represented by @oh reports that its OCP
+ * softreset is complete.  This can be triggered by software (see
+ * _ocp_softreset()) or by hardware upon returning from off-mode (one
+ * example is HSMMC).  Waits for up to MAX_MODULE_SOFTRESET_WAIT
+ * microseconds.  Returns the number of microseconds waited.
+ */
+static int _wait_softreset_complete(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_class_sysconfig *sysc;
+        u32 softrst_mask;
+        int c = 0;
+
+        sysc = oh->class->sysc;
+
+        if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
+                omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
+                                   & SYSS_RESETDONE_MASK),
+                                  MAX_MODULE_SOFTRESET_WAIT, c);
+        else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
+                softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
+                omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
+                                    & softrst_mask),
+                                  MAX_MODULE_SOFTRESET_WAIT, c);
+        }
+
+        return c;
+}
+
+/**
  * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
  * @oh: struct omap_hwmod *
  *
@@ -1282,6 +1314,18 @@ static void _enable_sysc(struct omap_hwmod *oh)
         if (!oh->class->sysc)
                 return;
 
+        /*
+         * Wait until reset has completed, this is needed as the IP
+         * block is reset automatically by hardware in some cases
+         * (off-mode for example), and the drivers require the
+         * IP to be ready when they access it
+         */
+        if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
+                _enable_optional_clocks(oh);
+        _wait_softreset_complete(oh);
+        if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
+                _disable_optional_clocks(oh);
+
         v = oh->_sysc_cache;
         sf = oh->class->sysc->sysc_flags;
 
@@ -1804,7 +1848,7 @@ static int _am33xx_disable_module(struct omap_hwmod *oh)
  */
 static int _ocp_softreset(struct omap_hwmod *oh)
 {
-        u32 v, softrst_mask;
+        u32 v;
         int c = 0;
         int ret = 0;
 
@@ -1834,19 +1878,7 @@ static int _ocp_softreset(struct omap_hwmod *oh)
         if (oh->class->sysc->srst_udelay)
                 udelay(oh->class->sysc->srst_udelay);
 
-        if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
-                omap_test_timeout((omap_hwmod_read(oh,
-                                                    oh->class->sysc->syss_offs)
-                                   & SYSS_RESETDONE_MASK),
-                                  MAX_MODULE_SOFTRESET_WAIT, c);
-        else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
-                softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
-                omap_test_timeout(!(omap_hwmod_read(oh,
-                                                     oh->class->sysc->sysc_offs)
-                                   & softrst_mask),
-                                  MAX_MODULE_SOFTRESET_WAIT, c);
-        }
-
+        c = _wait_softreset_complete(oh);
         if (c == MAX_MODULE_SOFTRESET_WAIT)
                 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
                            oh->name, MAX_MODULE_SOFTRESET_WAIT);
@@ -2352,6 +2384,9 @@ static int __init _setup_reset(struct omap_hwmod *oh)
         if (oh->_state != _HWMOD_STATE_INITIALIZED)
                 return -EINVAL;
 
+        if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
+                return -EPERM;
+
         if (oh->rst_lines_cnt == 0) {
                 r = _enable(oh);
                 if (r) {
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index f67b7ee07dd4..621bc7137233 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -26,8 +26,8 @@
 #include <plat/mmc.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
+#include <linux/platform_data/iommu-omap.h>
 #include <plat/dmtimer.h>
-#include <plat/iommu.h>
 
 #include "am35xx.h"
 
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 652d0285bd6d..4b985b9b81d0 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -21,16 +21,17 @@
 #include <linux/io.h>
 #include <linux/platform_data/gpio-omap.h>
 #include <linux/power/smartreflex.h>
+#include <linux/platform_data/omap_ocp2scp.h>
 
 #include <plat/omap_hwmod.h>
 #include <plat/i2c.h>
 #include <plat/dma.h>
 #include <linux/platform_data/spi-omap2-mcspi.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
+#include <linux/platform_data/iommu-omap.h>
 #include <plat/mmc.h>
 #include <plat/dmtimer.h>
 #include <plat/common.h>
-#include <plat/iommu.h>
 
 #include "omap_hwmod_common_data.h"
 #include "cm1_44xx.h"
@@ -650,7 +651,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod = {
         .mpu_irqs       = omap44xx_dsp_irqs,
         .rst_lines      = omap44xx_dsp_resets,
         .rst_lines_cnt  = ARRAY_SIZE(omap44xx_dsp_resets),
-        .main_clk       = "dsp_fck",
+        .main_clk       = "dpll_iva_m4x2_ck",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET,
@@ -1677,7 +1678,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
         .mpu_irqs       = omap44xx_ipu_irqs,
         .rst_lines      = omap44xx_ipu_resets,
         .rst_lines_cnt  = ARRAY_SIZE(omap44xx_ipu_resets),
-        .main_clk       = "ipu_fck",
+        .main_clk       = "ducati_clk_mux_ck",
         .prcm = {
                 .omap4 = {
                         .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET,
@@ -2125,6 +2126,14 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {
         .name           = "mcpdm",
         .class          = &omap44xx_mcpdm_hwmod_class,
         .clkdm_name     = "abe_clkdm",
+        /*
+         * It's suspected that the McPDM requires an off-chip main
+         * functional clock, controlled via I2C.  This IP block is
+         * currently reset very early during boot, before I2C is
+         * available, so it doesn't seem that we have any choice in
+         * the kernel other than to avoid resetting it.
+         */
+        .flags          = HWMOD_EXT_OPT_MAIN_CLK,
         .mpu_irqs       = omap44xx_mcpdm_irqs,
         .sdma_reqs      = omap44xx_mcpdm_sdma_reqs,
         .main_clk       = "mcpdm_fck",
@@ -2681,6 +2690,32 @@ static struct omap_hwmod_class omap44xx_ocp2scp_hwmod_class = {
         .sysc   = &omap44xx_ocp2scp_sysc,
 };
 
+/* ocp2scp dev_attr */
+static struct resource omap44xx_usb_phy_and_pll_addrs[] = {
+        {
+                .name           = "usb_phy",
+                .start          = 0x4a0ad080,
+                .end            = 0x4a0ae000,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                /* XXX: Remove this once control module driver is in place */
+                .name           = "ctrl_dev",
+                .start          = 0x4a002300,
+                .end            = 0x4a002303,
+                .flags          = IORESOURCE_MEM,
+        },
+        { }
+};
+
+static struct omap_ocp2scp_dev ocp2scp_dev_attr[] = {
+        {
+                .drv_name       = "omap-usb2",
+                .res            = omap44xx_usb_phy_and_pll_addrs,
+        },
+        { }
+};
+
 /* ocp2scp_usb_phy */
 static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
         .name           = "ocp2scp_usb_phy",
@@ -2694,6 +2729,7 @@ static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
                         .modulemode   = MODULEMODE_HWCTRL,
                 },
         },
+        .dev_attr       = ocp2scp_dev_attr,
 };
 
 /*
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 686137d164da..67d66131cfa7 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -91,6 +91,7 @@ extern void omap3_save_scratchpad_contents(void);
 
 #define PM_RTA_ERRATUM_i608             (1 << 0)
 #define PM_SDRC_WAKEUP_ERRATUM_i583     (1 << 1)
+#define PM_PER_MEMORIES_ERRATUM_i582    (1 << 2)
 
 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
 extern u16 pm34xx_errata;
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index ba670db1fd37..3a904de4313e 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -652,14 +652,17 @@ static void __init pm_errata_configure(void)
                 /* Enable the l2 cache toggling in sleep logic */
                 enable_omap3630_toggle_l2_on_restore();
                 if (omap_rev() < OMAP3630_REV_ES1_2)
-                        pm34xx_errata |= PM_SDRC_WAKEUP_ERRATUM_i583;
+                        pm34xx_errata |= (PM_SDRC_WAKEUP_ERRATUM_i583 |
+                                          PM_PER_MEMORIES_ERRATUM_i582);
+        } else if (cpu_is_omap34xx()) {
+                pm34xx_errata |= PM_PER_MEMORIES_ERRATUM_i582;
         }
 }
 
 int __init omap3_pm_init(void)
 {
         struct power_state *pwrst, *tmp;
-        struct clockdomain *neon_clkdm, *mpu_clkdm;
+        struct clockdomain *neon_clkdm, *mpu_clkdm, *per_clkdm, *wkup_clkdm;
         int ret;
 
         if (!omap3_has_io_chain_ctrl())
@@ -711,6 +714,8 @@ int __init omap3_pm_init(void)
 
         neon_clkdm = clkdm_lookup("neon_clkdm");
         mpu_clkdm = clkdm_lookup("mpu_clkdm");
+        per_clkdm = clkdm_lookup("per_clkdm");
+        wkup_clkdm = clkdm_lookup("wkup_clkdm");
 
 #ifdef CONFIG_SUSPEND
         omap_pm_suspend = omap3_pm_suspend;
@@ -727,6 +732,27 @@ int __init omap3_pm_init(void)
         if (IS_PM34XX_ERRATUM(PM_RTA_ERRATUM_i608))
                 omap3630_ctrl_disable_rta();
 
+        /*
+         * The UART3/4 FIFO and the sidetone memory in McBSP2/3 are
+         * not correctly reset when the PER powerdomain comes back
+         * from OFF or OSWR when the CORE powerdomain is kept active.
+         * See OMAP36xx Erratum i582 "PER Domain reset issue after
+         * Domain-OFF/OSWR Wakeup".  This wakeup dependency is not a
+         * complete workaround.  The kernel must also prevent the PER
+         * powerdomain from going to OSWR/OFF while the CORE
+         * powerdomain is not going to OSWR/OFF.  And if PER last
+         * power state was off while CORE last power state was ON, the
+         * UART3/4 and McBSP2/3 SIDETONE devices need to run a
+         * self-test using their loopback tests; if that fails, those
+         * devices are unusable until the PER/CORE can complete a transition
+         * from ON to OSWR/OFF and then back to ON.
+         *
+         * XXX Technically this workaround is only needed if off-mode
+         * or OSWR is enabled.
+         */
+        if (IS_PM34XX_ERRATUM(PM_PER_MEMORIES_ERRATUM_i582))
+                clkdm_add_wkdep(per_clkdm, wkup_clkdm);
+
         clkdm_add_wkdep(neon_clkdm, mpu_clkdm);
         if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
                 omap3_secure_ram_storage =
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 0405c8190803..a507cd6cf4f1 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -329,6 +329,11 @@ void __init omap_serial_init_port(struct omap_board_data *bdata,
 
         oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
 
+        if (console_uart_id == bdata->id) {
+                omap_device_enable(pdev);
+                pm_runtime_set_active(&pdev->dev);
+        }
+
         oh->dev_attr = uart;
 
         if (((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads)
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 635e109f5ad3..a256135d8e48 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -73,6 +73,7 @@ void __init omap4_pmic_init(const char *pmic_type,
 {
         /* PMIC part*/
         omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
+        omap_mux_init_signal("fref_clk0_out.sys_drm_msecure", OMAP_PIN_OUTPUT);
         omap_pmic_init(1, 400, pmic_type, 7 + OMAP44XX_IRQ_GIC_START, pmic_data);
 
         /* Register additional devices on i2c1 bus if needed */
@@ -366,7 +367,7 @@ static struct regulator_init_data omap4_clk32kg_idata = {
 };
 
 static struct regulator_consumer_supply omap4_vdd1_supply[] = {
-        REGULATOR_SUPPLY("vcc", "mpu.0"),
+        REGULATOR_SUPPLY("vcc", "cpu0"),
 };
 
 static struct regulator_consumer_supply omap4_vdd2_supply[] = {
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 880249b17012..75878c37959b 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -264,7 +264,7 @@ static void __init omap_vc_i2c_init(struct voltagedomain *voltdm)
 
         if (initialized) {
                 if (voltdm->pmic->i2c_high_speed != i2c_high_speed)
-                        pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).",
+                        pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).\n",
                                 __func__, voltdm->name, i2c_high_speed);
                 return;
         }
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 5ecbd17b5641..e2c6391863fe 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -28,6 +28,7 @@
 #include <linux/mfd/asic3.h>
 #include <linux/mtd/physmap.h>
 #include <linux/pda_power.h>
+#include <linux/pwm.h>
 #include <linux/pwm_backlight.h>
 #include <linux/regulator/driver.h>
 #include <linux/regulator/gpio-regulator.h>
@@ -556,7 +557,7 @@ static struct platform_device hx4700_lcd = {
  */
 
 static struct platform_pwm_backlight_data backlight_data = {
-        .pwm_id         = 1,
+        .pwm_id         = -1,   /* Superseded by pwm_lookup */
         .max_brightness = 200,
         .dft_brightness = 100,
         .pwm_period_ns  = 30923,
@@ -571,6 +572,10 @@ static struct platform_device backlight = {
         },
 };
 
+static struct pwm_lookup hx4700_pwm_lookup[] = {
+        PWM_LOOKUP("pxa27x-pwm.1", 0, "pwm-backlight", NULL),
+};
+
 /*
  * USB "Transceiver"
  */
@@ -872,6 +877,7 @@ static void __init hx4700_init(void)
         pxa_set_stuart_info(NULL);
 
         platform_add_devices(devices, ARRAY_SIZE(devices));
+        pwm_add_table(hx4700_pwm_lookup, ARRAY_SIZE(hx4700_pwm_lookup));
 
         pxa_set_ficp_info(&ficp_info);
         pxa27x_set_i2c_power_info(NULL);
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 438f02fe122a..842596d4d31e 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -86,10 +86,7 @@ static void spitz_discharge1(int on)
         gpio_set_value(SPITZ_GPIO_LED_GREEN, on);
 }
 
-static unsigned long gpio18_config[] = {
-        GPIO18_RDY,
-        GPIO18_GPIO,
-};
+static unsigned long gpio18_config = GPIO18_GPIO;
 
 static void spitz_presuspend(void)
 {
@@ -112,7 +109,7 @@ static void spitz_presuspend(void)
         PGSR3 &= ~SPITZ_GPIO_G3_STROBE_BIT;
         PGSR2 |= GPIO_bit(SPITZ_GPIO_KEY_STROBE0);
 
-        pxa2xx_mfp_config(&gpio18_config[0], 1);
+        pxa2xx_mfp_config(&gpio18_config, 1);
         gpio_request_one(18, GPIOF_OUT_INIT_HIGH, "Unknown");
         gpio_free(18);
 
@@ -131,7 +128,6 @@ static void spitz_presuspend(void)
 
 static void spitz_postsuspend(void)
 {
-        pxa2xx_mfp_config(&gpio18_config[1], 1);
 }
 
 static int spitz_should_wakeup(unsigned int resume_on_alarm)
diff --git a/arch/arm/mach-s3c24xx/s3c2416.c b/arch/arm/mach-s3c24xx/s3c2416.c
index ed5a95ece9eb..77ee0b732237 100644
--- a/arch/arm/mach-s3c24xx/s3c2416.c
+++ b/arch/arm/mach-s3c24xx/s3c2416.c
@@ -61,6 +61,7 @@
 #include <plat/nand-core.h>
 #include <plat/adc-core.h>
 #include <plat/rtc-core.h>
+#include <plat/spi-core.h>
 
 static struct map_desc s3c2416_iodesc[] __initdata = {
         IODESC_ENT(WATCHDOG),
@@ -132,6 +133,7 @@ void __init s3c2416_map_io(void)
         /* initialize device information early */
         s3c2416_default_sdhci0();
         s3c2416_default_sdhci1();
+        s3c64xx_spi_setname("s3c2443-spi");
 
         iotable_init(s3c2416_iodesc, ARRAY_SIZE(s3c2416_iodesc));
 }
diff --git a/arch/arm/mach-s3c24xx/s3c2443.c b/arch/arm/mach-s3c24xx/s3c2443.c
index ab648ad8fa50..165b6a6b3daa 100644
--- a/arch/arm/mach-s3c24xx/s3c2443.c
+++ b/arch/arm/mach-s3c24xx/s3c2443.c
@@ -43,6 +43,7 @@
 #include <plat/nand-core.h>
 #include <plat/adc-core.h>
 #include <plat/rtc-core.h>
+#include <plat/spi-core.h>
 
 static struct map_desc s3c2443_iodesc[] __initdata = {
         IODESC_ENT(WATCHDOG),
@@ -100,6 +101,9 @@ void __init s3c2443_map_io(void)
         s3c24xx_gpiocfg_default.set_pull = s3c2443_gpio_setpull;
         s3c24xx_gpiocfg_default.get_pull = s3c2443_gpio_getpull;
 
+        /* initialize device information early */
+        s3c64xx_spi_setname("s3c2443-spi");
+
         iotable_init(s3c2443_iodesc, ARRAY_SIZE(s3c2443_iodesc));
 }
 
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index 6e6a0a9d6778..111e404a81fd 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -44,6 +44,7 @@
 #include <plat/sdhci.h>
 #include <plat/adc-core.h>
 #include <plat/fb-core.h>
+#include <plat/spi-core.h>
 #include <plat/gpio-cfg.h>
 #include <plat/regs-irqtype.h>
 #include <plat/regs-serial.h>
@@ -179,6 +180,7 @@ void __init s5p6440_map_io(void)
         /* initialize any device information early */
         s3c_adc_setname("s3c64xx-adc");
         s3c_fb_setname("s5p64x0-fb");
+        s3c64xx_spi_setname("s5p64x0-spi");
 
         s5p64x0_default_sdhci0();
         s5p64x0_default_sdhci1();
@@ -193,6 +195,7 @@ void __init s5p6450_map_io(void)
         /* initialize any device information early */
         s3c_adc_setname("s3c64xx-adc");
         s3c_fb_setname("s5p64x0-fb");
+        s3c64xx_spi_setname("s5p64x0-spi");
 
         s5p64x0_default_sdhci0();
         s5p64x0_default_sdhci1();
diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c
index 621908658861..cc6e561c9958 100644
--- a/arch/arm/mach-s5pc100/common.c
+++ b/arch/arm/mach-s5pc100/common.c
@@ -45,6 +45,7 @@
 #include <plat/fb-core.h>
 #include <plat/iic-core.h>
 #include <plat/onenand-core.h>
+#include <plat/spi-core.h>
 #include <plat/regs-serial.h>
 #include <plat/watchdog-reset.h>
 
@@ -165,6 +166,8 @@ void __init s5pc100_map_io(void)
         s3c_onenand_setname("s5pc100-onenand");
         s3c_fb_setname("s5pc100-fb");
         s3c_cfcon_setname("s5pc100-pata");
+
+        s3c64xx_spi_setname("s5pc100-spi");
 }
 
 void __init s5pc100_init_clocks(int xtal)
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c
index 4c9e9027df9a..a0c50efe8145 100644
--- a/arch/arm/mach-s5pv210/common.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -43,6 +43,7 @@
 #include <plat/iic-core.h>
 #include <plat/keypad-core.h>
 #include <plat/tv-core.h>
+#include <plat/spi-core.h>
 #include <plat/regs-serial.h>
 
 #include "common.h"
@@ -196,6 +197,8 @@ void __init s5pv210_map_io(void)
 
         /* setup TV devices */
         s5p_hdmi_setname("s5pv210-hdmi");
+
+        s3c64xx_spi_setname("s5pv210-spi");
 }
 
 void __init s5pv210_init_clocks(int xtal)
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index 2917668f0091..ebbffc25f24f 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -247,7 +247,7 @@ void __init r8a7779_add_standard_devices(void)
 {
 #ifdef CONFIG_CACHE_L2X0
         /* Early BRESP enable, Shared attribute override enable, 64K*16way */
-        l2x0_init((void __iomem __force *)(0xf0100000), 0x40470000, 0x82000fff);
+        l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff);
 #endif
         r8a7779_pm_init();
 
diff --git a/arch/arm/mach-spear13xx/include/mach/spear1310_misc_regs.h b/arch/arm/mach-spear13xx/include/mach/spear1310_misc_regs.h
deleted file mode 100644
index e69de29bb2d1..000000000000
--- a/arch/arm/mach-spear13xx/include/mach/spear1310_misc_regs.h
+++ /dev/null
diff --git a/arch/arm/mach-spear13xx/include/mach/spear1340_misc_regs.h b/arch/arm/mach-spear13xx/include/mach/spear1340_misc_regs.h
deleted file mode 100644
index e69de29bb2d1..000000000000
--- a/arch/arm/mach-spear13xx/include/mach/spear1340_misc_regs.h
+++ /dev/null
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index 2236cbd03cd7..1f3fbc2bb776 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -16,6 +16,7 @@
 #include <linux/stat.h>
 #include <linux/of.h>
 #include <linux/of_irq.h>
+#include <linux/irq.h>
 #include <linux/platform_data/clk-ux500.h>
 
 #include <asm/hardware/gic.h>
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index b9f60ebe3bc4..b820edaf3184 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -745,7 +745,7 @@ do_alignment_t32_to_handler(unsigned long *pinstr, struct pt_regs *regs,
 static int
 do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
 {
-        union offset_union offset;
+        union offset_union uninitialized_var(offset);
         unsigned long instr = 0, instrptr;
         int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs);
         unsigned int type;
@@ -856,8 +856,10 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
                 if (thumb2_32b) {
                         offset.un = 0;
                         handler = do_alignment_t32_to_handler(&instr, regs, &offset);
-                } else
+                } else {
+                        offset.un = 0;
                         handler = do_alignment_ldmstm;
+                }
                 break;
 
         default:
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 477a2d23ddf1..58bc3e4d3bd0 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -610,7 +610,7 @@ static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
                          gfp_t gfp, pgprot_t prot, bool is_coherent, const void *caller)
 {
         u64 mask = get_coherent_dma_mask(dev);
-        struct page *page;
+        struct page *page = NULL;
         void *addr;
 
 #ifdef CONFIG_DMA_API_DEBUG
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 86b8b480634f..09c5233f4dfc 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -89,7 +89,7 @@ ENTRY(cpu_v6_dcache_clean_area)
         mov     pc, lr
 
 /*
- *      cpu_arm926_switch_mm(pgd_phys, tsk)
+ *      cpu_v6_switch_mm(pgd_phys, tsk)
  *
  *      Set the translation table base pointer to be pgd_phys
  *
diff --git a/arch/arm/mm/vmregion.h b/arch/arm/mm/vmregion.h
index bf312c354a21..0f5a5f2a2c7b 100644
--- a/arch/arm/mm/vmregion.h
+++ b/arch/arm/mm/vmregion.h
@@ -17,7 +17,6 @@ struct arm_vmregion {
         struct list_head        vm_list;
         unsigned long           vm_start;
         unsigned long           vm_end;
-        void                    *priv;
         int                     vm_active;
         const void              *caller;
 };
diff --git a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c b/arch/arm/plat-mxc/devices/platform-mxc-mmc.c
index 540d3a7d92df..e7b920b58675 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c
+++ b/arch/arm/plat-mxc/devices/platform-mxc-mmc.c
@@ -55,7 +55,7 @@ struct platform_device *__init imx_add_mxc_mmc(
         struct resource res[] = {
                 {
                         .start = data->iobase,
-                        .end = data->iobase + SZ_4K - 1,
+                        .end = data->iobase + data->iosize - 1,
                         .flags = IORESOURCE_MEM,
                 }, {
                         .start = data->irq,
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 7cd56ed5cd94..82fcb206b5b2 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -26,6 +26,7 @@ config ARCH_OMAP2PLUS
         select CLKDEV_LOOKUP
         select GENERIC_IRQ_CHIP
         select OMAP_DM_TIMER
+        select PINCTRL
         select PROC_DEVICETREE if PROC_FS
         select SPARSE_IRQ
         select USE_OF
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index a5683a84c6ee..6013831a043e 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -26,12 +26,14 @@
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/i2c.h>
+#include <linux/i2c-omap.h>
 #include <linux/slab.h>
 #include <linux/err.h>
 #include <linux/clk.h>
 
 #include <mach/irqs.h>
 #include <plat/i2c.h>
+#include <plat/omap-pm.h>
 #include <plat/omap_device.h>
 
 #define OMAP_I2C_SIZE           0x3f
@@ -127,6 +129,16 @@ static inline int omap1_i2c_add_bus(int bus_id)
 
 
 #ifdef CONFIG_ARCH_OMAP2PLUS
+/*
+ * XXX This function is a temporary compatibility wrapper - only
+ * needed until the I2C driver can be converted to call
+ * omap_pm_set_max_dev_wakeup_lat() and handle a return code.
+ */
+static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
+{
+        omap_pm_set_max_mpu_wakeup_lat(dev, t);
+}
+
 static inline int omap2_i2c_add_bus(int bus_id)
 {
         int l;
@@ -158,6 +170,15 @@ static inline int omap2_i2c_add_bus(int bus_id)
         dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
         pdata->flags = dev_attr->flags;
 
+        /*
+         * When waiting for completion of a i2c transfer, we need to
+         * set a wake up latency constraint for the MPU. This is to
+         * ensure quick enough wakeup from idle, when transfer
+         * completes.
+         * Only omap3 has support for constraints
+         */
+        if (cpu_is_omap34xx())
+                pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
         pdev = omap_device_build(name, bus_id, oh, pdata,
                         sizeof(struct omap_i2c_bus_platform_data),
                         NULL, 0, 0);
diff --git a/arch/arm/plat-omap/include/plat/iommu.h b/arch/arm/plat-omap/include/plat/iommu.h
deleted file mode 100644
index 68b5f0362f35..000000000000
--- a/arch/arm/plat-omap/include/plat/iommu.h
+++ /dev/null
@@ -1,221 +0,0 @@
-/*
- * omap iommu: main structures
- *
- * Copyright (C) 2008-2009 Nokia Corporation
- *
- * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __MACH_IOMMU_H
-#define __MACH_IOMMU_H
-
-struct iotlb_entry {
-        u32 da;
-        u32 pa;
-        u32 pgsz, prsvd, valid;
-        union {
-                u16 ap;
-                struct {
-                        u32 endian, elsz, mixed;
-                };
-        };
-};
-
-struct omap_iommu {
-        const char      *name;
-        struct module   *owner;
-        struct clk      *clk;
-        void __iomem    *regbase;
-        struct device   *dev;
-        void            *isr_priv;
-        struct iommu_domain *domain;
-
-        unsigned int    refcount;
-        spinlock_t      iommu_lock;     /* global for this whole object */
-
-        /*
-         * We don't change iopgd for a situation like pgd for a task,
-         * but share it globally for each iommu.
-         */
-        u32             *iopgd;
-        spinlock_t      page_table_lock; /* protect iopgd */
-
-        int             nr_tlb_entries;
-
-        struct list_head        mmap;
-        struct mutex            mmap_lock; /* protect mmap */
-
-        void *ctx; /* iommu context: registres saved area */
-        u32 da_start;
-        u32 da_end;
-};
-
-struct cr_regs {
-        union {
-                struct {
-                        u16 cam_l;
-                        u16 cam_h;
-                };
-                u32 cam;
-        };
-        union {
-                struct {
-                        u16 ram_l;
-                        u16 ram_h;
-                };
-                u32 ram;
-        };
-};
-
-struct iotlb_lock {
-        short base;
-        short vict;
-};
-
-/* architecture specific functions */
-struct iommu_functions {
-        unsigned long   version;
-
-        int (*enable)(struct omap_iommu *obj);
-        void (*disable)(struct omap_iommu *obj);
-        void (*set_twl)(struct omap_iommu *obj, bool on);
-        u32 (*fault_isr)(struct omap_iommu *obj, u32 *ra);
-
-        void (*tlb_read_cr)(struct omap_iommu *obj, struct cr_regs *cr);
-        void (*tlb_load_cr)(struct omap_iommu *obj, struct cr_regs *cr);
-
-        struct cr_regs *(*alloc_cr)(struct omap_iommu *obj,
-                                                        struct iotlb_entry *e);
-        int (*cr_valid)(struct cr_regs *cr);
-        u32 (*cr_to_virt)(struct cr_regs *cr);
-        void (*cr_to_e)(struct cr_regs *cr, struct iotlb_entry *e);
-        ssize_t (*dump_cr)(struct omap_iommu *obj, struct cr_regs *cr,
-                                                        char *buf);
-
-        u32 (*get_pte_attr)(struct iotlb_entry *e);
-
-        void (*save_ctx)(struct omap_iommu *obj);
-        void (*restore_ctx)(struct omap_iommu *obj);
-        ssize_t (*dump_ctx)(struct omap_iommu *obj, char *buf, ssize_t len);
-};
-
-/**
- * struct omap_mmu_dev_attr - OMAP mmu device attributes for omap_hwmod
- * @da_start:           device address where the va space starts.
- * @da_end:             device address where the va space ends.
- * @nr_tlb_entries:     number of entries supported by the translation
- *                      look-aside buffer (TLB).
- */
-struct omap_mmu_dev_attr {
-        u32 da_start;
-        u32 da_end;
-        int nr_tlb_entries;
-};
-
-struct iommu_platform_data {
-        const char *name;
-        const char *clk_name;
-        const int nr_tlb_entries;
-        u32 da_start;
-        u32 da_end;
-};
-
-/**
- * struct iommu_arch_data - omap iommu private data
- * @name: name of the iommu device
- * @iommu_dev: handle of the iommu device
- *
- * This is an omap iommu private data object, which binds an iommu user
- * to its iommu device. This object should be placed at the iommu user's
- * dev_archdata so generic IOMMU API can be used without having to
- * utilize omap-specific plumbing anymore.
- */
-struct omap_iommu_arch_data {
-        const char *name;
-        struct omap_iommu *iommu_dev;
-};
-
-#ifdef CONFIG_IOMMU_API
-/**
- * dev_to_omap_iommu() - retrieves an omap iommu object from a user device
- * @dev: iommu client device
- */
-static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev)
-{
-        struct omap_iommu_arch_data *arch_data = dev->archdata.iommu;
-
-        return arch_data->iommu_dev;
-}
-#endif
-
-/* IOMMU errors */
-#define OMAP_IOMMU_ERR_TLB_MISS         (1 << 0)
-#define OMAP_IOMMU_ERR_TRANS_FAULT      (1 << 1)
-#define OMAP_IOMMU_ERR_EMU_MISS         (1 << 2)
-#define OMAP_IOMMU_ERR_TBLWALK_FAULT    (1 << 3)
-#define OMAP_IOMMU_ERR_MULTIHIT_FAULT   (1 << 4)
-
-#if defined(CONFIG_ARCH_OMAP1)
-#error "iommu for this processor not implemented yet"
-#else
-#include <plat/iommu2.h>
-#endif
-
-/*
- * utilities for super page(16MB, 1MB, 64KB and 4KB)
- */
-
-#define iopgsz_max(bytes)                       \
-        (((bytes) >= SZ_16M) ? SZ_16M :         \
-         ((bytes) >= SZ_1M)  ? SZ_1M  :         \
-         ((bytes) >= SZ_64K) ? SZ_64K :         \
-         ((bytes) >= SZ_4K)  ? SZ_4K  : 0)
-
-#define bytes_to_iopgsz(bytes)                          \
-        (((bytes) == SZ_16M) ? MMU_CAM_PGSZ_16M :       \
-         ((bytes) == SZ_1M)  ? MMU_CAM_PGSZ_1M  :       \
-         ((bytes) == SZ_64K) ? MMU_CAM_PGSZ_64K :       \
-         ((bytes) == SZ_4K)  ? MMU_CAM_PGSZ_4K  : -1)
-
-#define iopgsz_to_bytes(iopgsz)                         \
-        (((iopgsz) == MMU_CAM_PGSZ_16M) ? SZ_16M :      \
-         ((iopgsz) == MMU_CAM_PGSZ_1M)  ? SZ_1M  :      \
-         ((iopgsz) == MMU_CAM_PGSZ_64K) ? SZ_64K :      \
-         ((iopgsz) == MMU_CAM_PGSZ_4K)  ? SZ_4K  : 0)
-
-#define iopgsz_ok(bytes) (bytes_to_iopgsz(bytes) >= 0)
-
-/*
- * global functions
- */
-extern u32 omap_iommu_arch_version(void);
-
-extern void omap_iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e);
-
-extern int
-omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e);
-
-extern int omap_iommu_set_isr(const char *name,
-                 int (*isr)(struct omap_iommu *obj, u32 da, u32 iommu_errs,
-                                    void *priv),
-                         void *isr_priv);
-
-extern void omap_iommu_save_ctx(struct device *dev);
-extern void omap_iommu_restore_ctx(struct device *dev);
-
-extern int omap_install_iommu_arch(const struct iommu_functions *ops);
-extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops);
-
-extern int omap_foreach_iommu_device(void *data,
-                                int (*fn)(struct device *, void *));
-
-extern ssize_t
-omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len);
-extern size_t
-omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t len);
-
-#endif /* __MACH_IOMMU_H */
diff --git a/arch/arm/plat-omap/include/plat/iommu2.h b/arch/arm/plat-omap/include/plat/iommu2.h
deleted file mode 100644
index d4116b595e40..000000000000
--- a/arch/arm/plat-omap/include/plat/iommu2.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * omap iommu: omap2 architecture specific definitions
- *
- * Copyright (C) 2008-2009 Nokia Corporation
- *
- * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __MACH_IOMMU2_H
-#define __MACH_IOMMU2_H
-
-#include <linux/io.h>
-
-/*
- * MMU Register offsets
- */
-#define MMU_REVISION            0x00
-#define MMU_SYSCONFIG           0x10
-#define MMU_SYSSTATUS           0x14
-#define MMU_IRQSTATUS           0x18
-#define MMU_IRQENABLE           0x1c
-#define MMU_WALKING_ST          0x40
-#define MMU_CNTL                0x44
-#define MMU_FAULT_AD            0x48
-#define MMU_TTB                 0x4c
-#define MMU_LOCK                0x50
-#define MMU_LD_TLB              0x54
-#define MMU_CAM                 0x58
-#define MMU_RAM                 0x5c
-#define MMU_GFLUSH              0x60
-#define MMU_FLUSH_ENTRY         0x64
-#define MMU_READ_CAM            0x68
-#define MMU_READ_RAM            0x6c
-#define MMU_EMU_FAULT_AD        0x70
-
-#define MMU_REG_SIZE            256
-
-/*
- * MMU Register bit definitions
- */
-#define MMU_LOCK_BASE_SHIFT     10
-#define MMU_LOCK_BASE_MASK      (0x1f << MMU_LOCK_BASE_SHIFT)
-#define MMU_LOCK_BASE(x)        \
-        ((x & MMU_LOCK_BASE_MASK) >> MMU_LOCK_BASE_SHIFT)
-
-#define MMU_LOCK_VICT_SHIFT     4
-#define MMU_LOCK_VICT_MASK      (0x1f << MMU_LOCK_VICT_SHIFT)
-#define MMU_LOCK_VICT(x)        \
-        ((x & MMU_LOCK_VICT_MASK) >> MMU_LOCK_VICT_SHIFT)
-
-#define MMU_CAM_VATAG_SHIFT     12
-#define MMU_CAM_VATAG_MASK \
-        ((~0UL >> MMU_CAM_VATAG_SHIFT) << MMU_CAM_VATAG_SHIFT)
-#define MMU_CAM_P               (1 << 3)
-#define MMU_CAM_V               (1 << 2)
-#define MMU_CAM_PGSZ_MASK       3
-#define MMU_CAM_PGSZ_1M         (0 << 0)
-#define MMU_CAM_PGSZ_64K        (1 << 0)
-#define MMU_CAM_PGSZ_4K         (2 << 0)
-#define MMU_CAM_PGSZ_16M        (3 << 0)
-
-#define MMU_RAM_PADDR_SHIFT     12
-#define MMU_RAM_PADDR_MASK \
-        ((~0UL >> MMU_RAM_PADDR_SHIFT) << MMU_RAM_PADDR_SHIFT)
-#define MMU_RAM_ENDIAN_SHIFT    9
-#define MMU_RAM_ENDIAN_MASK     (1 << MMU_RAM_ENDIAN_SHIFT)
-#define MMU_RAM_ENDIAN_BIG      (1 << MMU_RAM_ENDIAN_SHIFT)
-#define MMU_RAM_ENDIAN_LITTLE   (0 << MMU_RAM_ENDIAN_SHIFT)
-#define MMU_RAM_ELSZ_SHIFT      7
-#define MMU_RAM_ELSZ_MASK       (3 << MMU_RAM_ELSZ_SHIFT)
-#define MMU_RAM_ELSZ_8          (0 << MMU_RAM_ELSZ_SHIFT)
-#define MMU_RAM_ELSZ_16         (1 << MMU_RAM_ELSZ_SHIFT)
-#define MMU_RAM_ELSZ_32         (2 << MMU_RAM_ELSZ_SHIFT)
-#define MMU_RAM_ELSZ_NONE       (3 << MMU_RAM_ELSZ_SHIFT)
-#define MMU_RAM_MIXED_SHIFT     6
-#define MMU_RAM_MIXED_MASK      (1 << MMU_RAM_MIXED_SHIFT)
-#define MMU_RAM_MIXED           MMU_RAM_MIXED_MASK
-
-/*
- * register accessors
- */
-static inline u32 iommu_read_reg(struct omap_iommu *obj, size_t offs)
-{
-        return __raw_readl(obj->regbase + offs);
-}
-
-static inline void iommu_write_reg(struct omap_iommu *obj, u32 val, size_t offs)
-{
-        __raw_writel(val, obj->regbase + offs);
-}
-
-#endif /* __MACH_IOMMU2_H */
diff --git a/arch/arm/plat-omap/include/plat/iopgtable.h b/arch/arm/plat-omap/include/plat/iopgtable.h
deleted file mode 100644
index 66a813977d52..000000000000
--- a/arch/arm/plat-omap/include/plat/iopgtable.h
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- * omap iommu: pagetable definitions
- *
- * Copyright (C) 2008-2010 Nokia Corporation
- *
- * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __PLAT_OMAP_IOMMU_H
-#define __PLAT_OMAP_IOMMU_H
-
-/*
- * "L2 table" address mask and size definitions.
- */
-#define IOPGD_SHIFT             20
-#define IOPGD_SIZE              (1UL << IOPGD_SHIFT)
-#define IOPGD_MASK              (~(IOPGD_SIZE - 1))
-
-/*
- * "section" address mask and size definitions.
- */
-#define IOSECTION_SHIFT         20
-#define IOSECTION_SIZE          (1UL << IOSECTION_SHIFT)
-#define IOSECTION_MASK          (~(IOSECTION_SIZE - 1))
-
-/*
- * "supersection" address mask and size definitions.
- */
-#define IOSUPER_SHIFT           24
-#define IOSUPER_SIZE            (1UL << IOSUPER_SHIFT)
-#define IOSUPER_MASK            (~(IOSUPER_SIZE - 1))
-
-#define PTRS_PER_IOPGD          (1UL << (32 - IOPGD_SHIFT))
-#define IOPGD_TABLE_SIZE        (PTRS_PER_IOPGD * sizeof(u32))
-
-/*
- * "small page" address mask and size definitions.
- */
-#define IOPTE_SHIFT             12
-#define IOPTE_SIZE              (1UL << IOPTE_SHIFT)
-#define IOPTE_MASK              (~(IOPTE_SIZE - 1))
-
-/*
- * "large page" address mask and size definitions.
- */
-#define IOLARGE_SHIFT           16
-#define IOLARGE_SIZE            (1UL << IOLARGE_SHIFT)
-#define IOLARGE_MASK            (~(IOLARGE_SIZE - 1))
-
-#define PTRS_PER_IOPTE          (1UL << (IOPGD_SHIFT - IOPTE_SHIFT))
-#define IOPTE_TABLE_SIZE        (PTRS_PER_IOPTE * sizeof(u32))
-
-#define IOPAGE_MASK             IOPTE_MASK
-
-/**
- * omap_iommu_translate() - va to pa translation
- * @d:          omap iommu descriptor
- * @va:         virtual address
- * @mask:       omap iommu descriptor mask
- *
- * va to pa translation
- */
-static inline phys_addr_t omap_iommu_translate(u32 d, u32 va, u32 mask)
-{
-        return (d & mask) | (va & (~mask));
-}
-
-/*
- * some descriptor attributes.
- */
-#define IOPGD_TABLE             (1 << 0)
-#define IOPGD_SECTION           (2 << 0)
-#define IOPGD_SUPER             (1 << 18 | 2 << 0)
-
-#define iopgd_is_table(x)       (((x) & 3) == IOPGD_TABLE)
-#define iopgd_is_section(x)     (((x) & (1 << 18 | 3)) == IOPGD_SECTION)
-#define iopgd_is_super(x)       (((x) & (1 << 18 | 3)) == IOPGD_SUPER)
-
-#define IOPTE_SMALL             (2 << 0)
-#define IOPTE_LARGE             (1 << 0)
-
-#define iopte_is_small(x)       (((x) & 2) == IOPTE_SMALL)
-#define iopte_is_large(x)       (((x) & 3) == IOPTE_LARGE)
-
-/* to find an entry in a page-table-directory */
-#define iopgd_index(da)         (((da) >> IOPGD_SHIFT) & (PTRS_PER_IOPGD - 1))
-#define iopgd_offset(obj, da)   ((obj)->iopgd + iopgd_index(da))
-
-#define iopgd_page_paddr(iopgd) (*iopgd & ~((1 << 10) - 1))
-#define iopgd_page_vaddr(iopgd) ((u32 *)phys_to_virt(iopgd_page_paddr(iopgd)))
-
-/* to find an entry in the second-level page table. */
-#define iopte_index(da)         (((da) >> IOPTE_SHIFT) & (PTRS_PER_IOPTE - 1))
-#define iopte_offset(iopgd, da) (iopgd_page_vaddr(iopgd) + iopte_index(da))
-
-static inline u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa,
-                                   u32 flags)
-{
-        memset(e, 0, sizeof(*e));
-
-        e->da           = da;
-        e->pa           = pa;
-        e->valid        = 1;
-        /* FIXME: add OMAP1 support */
-        e->pgsz         = flags & MMU_CAM_PGSZ_MASK;
-        e->endian       = flags & MMU_RAM_ENDIAN_MASK;
-        e->elsz         = flags & MMU_RAM_ELSZ_MASK;
-        e->mixed        = flags & MMU_RAM_MIXED_MASK;
-
-        return iopgsz_to_bytes(e->pgsz);
-}
-
-#define to_iommu(dev)                                                   \
-        (struct omap_iommu *)platform_get_drvdata(to_platform_device(dev))
-
-#endif /* __PLAT_OMAP_IOMMU_H */
diff --git a/arch/arm/plat-omap/include/plat/iovmm.h b/arch/arm/plat-omap/include/plat/iovmm.h
deleted file mode 100644
index 498e57cda6cd..000000000000
--- a/arch/arm/plat-omap/include/plat/iovmm.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * omap iommu: simple virtual address space management
- *
- * Copyright (C) 2008-2009 Nokia Corporation
- *
- * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __IOMMU_MMAP_H
-#define __IOMMU_MMAP_H
-
-#include <linux/iommu.h>
-
-struct iovm_struct {
-        struct omap_iommu       *iommu; /* iommu object which this belongs to */
-        u32                     da_start; /* area definition */
-        u32                     da_end;
-        u32                     flags; /* IOVMF_: see below */
-        struct list_head        list; /* linked in ascending order */
-        const struct sg_table   *sgt; /* keep 'page' <-> 'da' mapping */
-        void                    *va; /* mpu side mapped address */
-};
-
-/*
- * IOVMF_FLAGS: attribute for iommu virtual memory area(iovma)
- *
- * lower 16 bit is used for h/w and upper 16 bit is for s/w.
- */
-#define IOVMF_SW_SHIFT          16
-
-/*
- * iovma: h/w flags derived from cam and ram attribute
- */
-#define IOVMF_CAM_MASK          (~((1 << 10) - 1))
-#define IOVMF_RAM_MASK          (~IOVMF_CAM_MASK)
-
-#define IOVMF_PGSZ_MASK         (3 << 0)
-#define IOVMF_PGSZ_1M           MMU_CAM_PGSZ_1M
-#define IOVMF_PGSZ_64K          MMU_CAM_PGSZ_64K
-#define IOVMF_PGSZ_4K           MMU_CAM_PGSZ_4K
-#define IOVMF_PGSZ_16M          MMU_CAM_PGSZ_16M
-
-#define IOVMF_ENDIAN_MASK       (1 << 9)
-#define IOVMF_ENDIAN_BIG        MMU_RAM_ENDIAN_BIG
-#define IOVMF_ENDIAN_LITTLE     MMU_RAM_ENDIAN_LITTLE
-
-#define IOVMF_ELSZ_MASK         (3 << 7)
-#define IOVMF_ELSZ_8            MMU_RAM_ELSZ_8
-#define IOVMF_ELSZ_16           MMU_RAM_ELSZ_16
-#define IOVMF_ELSZ_32           MMU_RAM_ELSZ_32
-#define IOVMF_ELSZ_NONE         MMU_RAM_ELSZ_NONE
-
-#define IOVMF_MIXED_MASK        (1 << 6)
-#define IOVMF_MIXED             MMU_RAM_MIXED
-
-/*
- * iovma: s/w flags, used for mapping and umapping internally.
- */
-#define IOVMF_MMIO              (1 << IOVMF_SW_SHIFT)
-#define IOVMF_ALLOC             (2 << IOVMF_SW_SHIFT)
-#define IOVMF_ALLOC_MASK        (3 << IOVMF_SW_SHIFT)
-
-/* "superpages" is supported just with physically linear pages */
-#define IOVMF_DISCONT           (1 << (2 + IOVMF_SW_SHIFT))
-#define IOVMF_LINEAR            (2 << (2 + IOVMF_SW_SHIFT))
-#define IOVMF_LINEAR_MASK       (3 << (2 + IOVMF_SW_SHIFT))
-
-#define IOVMF_DA_FIXED          (1 << (4 + IOVMF_SW_SHIFT))
-
-
-extern struct iovm_struct *omap_find_iovm_area(struct device *dev, u32 da);
-extern u32
-omap_iommu_vmap(struct iommu_domain *domain, struct device *dev, u32 da,
-                        const struct sg_table *sgt, u32 flags);
-extern struct sg_table *omap_iommu_vunmap(struct iommu_domain *domain,
-                                struct device *dev, u32 da);
-extern u32
-omap_iommu_vmalloc(struct iommu_domain *domain, struct device *dev,
-                                u32 da, size_t bytes, u32 flags);
-extern void
-omap_iommu_vfree(struct iommu_domain *domain, struct device *dev,
-                                const u32 da);
-extern void *omap_da_to_va(struct device *dev, u32 da);
-
-#endif /* __IOMMU_MMAP_H */
diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h
index f4a4cd014795..1957a8516e93 100644
--- a/arch/arm/plat-omap/include/plat/omap-serial.h
+++ b/arch/arm/plat-omap/include/plat/omap-serial.h
@@ -40,10 +40,10 @@
 #define OMAP_UART_WER_MOD_WKUP  0X7F
 
 /* Enable XON/XOFF flow control on output */
-#define OMAP_UART_SW_TX         0x8
+#define OMAP_UART_SW_TX         0x04
 
 /* Enable XON/XOFF flow control on input */
-#define OMAP_UART_SW_RX         0x2
+#define OMAP_UART_SW_RX         0x04
 
 #define OMAP_UART_SYSC_RESET    0X07
 #define OMAP_UART_TCR_TRIG      0X0F
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index b3349f7b1a2c..1db029438022 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -443,6 +443,11 @@ struct omap_hwmod_omap4_prcm {
  *     in order to complete the reset. Optional clocks will be disabled
  *     again after the reset.
  * HWMOD_16BIT_REG: Module has 16bit registers
+ * HWMOD_EXT_OPT_MAIN_CLK: The only main functional clock source for
+ *     this IP block comes from an off-chip source and is not always
+ *     enabled.  This prevents the hwmod code from being able to
+ *     enable and reset the IP block early.  XXX Eventually it should
+ *     be possible to query the clock framework for this information.
  */
 #define HWMOD_SWSUP_SIDLE                       (1 << 0)
 #define HWMOD_SWSUP_MSTANDBY                    (1 << 1)
@@ -453,6 +458,7 @@ struct omap_hwmod_omap4_prcm {
 #define HWMOD_NO_IDLEST                         (1 << 6)
 #define HWMOD_CONTROL_OPT_CLKS_IN_RESET         (1 << 7)
 #define HWMOD_16BIT_REG                         (1 << 8)
+#define HWMOD_EXT_OPT_MAIN_CLK                  (1 << 9)
 
 /*
  * omap_hwmod._int_flags definitions
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index db98e7021f0d..0abd1c469887 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -473,12 +473,13 @@ int s3c2410_dma_enqueue(enum dma_ch channel, void *id,
                 pr_debug("dma%d: %s: buffer %p queued onto non-empty channel\n",
                          chan->number, __func__, buf);
 
-                if (chan->end == NULL)
+                if (chan->end == NULL) {
                         pr_debug("dma%d: %s: %p not empty, and chan->end==NULL?\n",
                                  chan->number, __func__, chan);
-
-                chan->end->next = buf;
-                chan->end = buf;
+                } else {
+                        chan->end->next = buf;
+                        chan->end = buf;
+                }
         }
 
         /* if necessary, update the next buffer field */
diff --git a/arch/arm/plat-samsung/include/plat/spi-core.h b/arch/arm/plat-samsung/include/plat/spi-core.h
new file mode 100644
index 000000000000..0b9428ab3fc3
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/spi-core.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2012 Heiko Stuebner <heiko@sntech.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __PLAT_S3C_SPI_CORE_H
+#define __PLAT_S3C_SPI_CORE_H
+
+/* These functions are only for use with the core support code, such as
+ * the cpu specific initialisation code
+ */
+
+/* re-define device name depending on support. */
+static inline void s3c64xx_spi_setname(char *name)
+{
+#ifdef CONFIG_S3C64XX_DEV_SPI0
+        s3c64xx_device_spi0.name = name;
+#endif
+#ifdef CONFIG_S3C64XX_DEV_SPI1
+        s3c64xx_device_spi1.name = name;
+#endif
+#ifdef CONFIG_S3C64XX_DEV_SPI2
+        s3c64xx_device_spi2.name = name;
+#endif
+}
+
+#endif /* __PLAT_S3C_SPI_CORE_H */
diff --git a/arch/arm/tools/Makefile b/arch/arm/tools/Makefile
index 635cb1865e4d..32d05c8219dc 100644
--- a/arch/arm/tools/Makefile
+++ b/arch/arm/tools/Makefile
@@ -5,6 +5,6 @@
 #
 
 include/generated/mach-types.h: $(src)/gen-mach-types $(src)/mach-types
-        @echo '  Generating $@'
+        @$(kecho) '  Generating $@'
         @mkdir -p $(dir $@)
         $(Q)$(AWK) -f $^ > $@ || { rm -f $@; /bin/false; }
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index c834b32af275..3b44e0dd0a93 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -701,11 +701,14 @@ static int __init vfp_init(void)
                         elf_hwcap |= HWCAP_VFPv3;
 
                         /*
-                         * Check for VFPv3 D16. CPUs in this configuration
-                         * only have 16 x 64bit registers.
+                         * Check for VFPv3 D16 and VFPv4 D16.  CPUs in
+                         * this configuration only have 16 x 64bit
+                         * registers.
                          */
                         if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1)
-                                elf_hwcap |= HWCAP_VFPv3D16;
+                                elf_hwcap |= HWCAP_VFPv3D16; /* also v4-D16 */
+                        else
+                                elf_hwcap |= HWCAP_VFPD32;
                 }
 #endif
                 /*
diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c
index 59bcb96ac369..f57609275449 100644
--- a/arch/arm/xen/enlighten.c
+++ b/arch/arm/xen/enlighten.c
@@ -166,3 +166,14 @@ void free_xenballooned_pages(int nr_pages, struct page **pages)
         *pages = NULL;
 }
 EXPORT_SYMBOL_GPL(free_xenballooned_pages);
+
+/* In the hypervisor.S file. */
+EXPORT_SYMBOL_GPL(HYPERVISOR_event_channel_op);
+EXPORT_SYMBOL_GPL(HYPERVISOR_grant_table_op);
+EXPORT_SYMBOL_GPL(HYPERVISOR_xen_version);
+EXPORT_SYMBOL_GPL(HYPERVISOR_console_io);
+EXPORT_SYMBOL_GPL(HYPERVISOR_sched_op);
+EXPORT_SYMBOL_GPL(HYPERVISOR_hvm_op);
+EXPORT_SYMBOL_GPL(HYPERVISOR_memory_op);
+EXPORT_SYMBOL_GPL(HYPERVISOR_physdev_op);
+EXPORT_SYMBOL_GPL(privcmd_call);
diff --git a/arch/arm/xen/grant-table.c b/arch/arm/xen/grant-table.c
index dbd1330c0196..859a9bb002d5 100644
--- a/arch/arm/xen/grant-table.c
+++ b/arch/arm/xen/grant-table.c
@@ -33,7 +33,7 @@
 #include <xen/page.h>
 #include <xen/grant_table.h>
 
-int arch_gnttab_map_shared(unsigned long *frames, unsigned long nr_gframes,
+int arch_gnttab_map_shared(xen_pfn_t *frames, unsigned long nr_gframes,
                            unsigned long max_nr_gframes,
                            void **__shared)
 {
diff --git a/arch/arm/xen/hypercall.S b/arch/arm/xen/hypercall.S
index 074f5ed101b9..71f723984cbd 100644
--- a/arch/arm/xen/hypercall.S
+++ b/arch/arm/xen/hypercall.S
@@ -48,20 +48,16 @@
 
 #include <linux/linkage.h>
 #include <asm/assembler.h>
+#include <asm/opcodes-virt.h>
 #include <xen/interface/xen.h>
 
 
-/* HVC 0xEA1 */
-#ifdef CONFIG_THUMB2_KERNEL
-#define xen_hvc .word 0xf7e08ea1
-#else
-#define xen_hvc .word 0xe140ea71
-#endif
+#define XEN_IMM 0xEA1
 
 #define HYPERCALL_SIMPLE(hypercall)             \
 ENTRY(HYPERVISOR_##hypercall)                   \
         mov r12, #__HYPERVISOR_##hypercall;     \
-        xen_hvc;                                                        \
+        __HVC(XEN_IMM);                                         \
         mov pc, lr;                                                     \
 ENDPROC(HYPERVISOR_##hypercall)
 
@@ -76,7 +72,7 @@ ENTRY(HYPERVISOR_##hypercall)			\
         stmdb sp!, {r4}                                         \
         ldr r4, [sp, #4]                                        \
         mov r12, #__HYPERVISOR_##hypercall;     \
-        xen_hvc                                                         \
+        __HVC(XEN_IMM);                                         \
         ldm sp!, {r4}                                           \
         mov pc, lr                                                      \
 ENDPROC(HYPERVISOR_##hypercall)
@@ -100,7 +96,7 @@ ENTRY(privcmd_call)
         mov r2, r3
         ldr r3, [sp, #8]
         ldr r4, [sp, #4]
-        xen_hvc
+        __HVC(XEN_IMM)
         ldm sp!, {r4}
         mov pc, lr
 ENDPROC(privcmd_call);