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-rw-r--r--arch/arm/configs/n8x0_defconfig1
-rw-r--r--arch/arm/configs/omap_zoom2_defconfig2
-rw-r--r--arch/arm/configs/omap_zoom3_defconfig2
-rw-r--r--arch/arm/configs/rx51_defconfig3
-rw-r--r--arch/arm/include/asm/highmem.h15
-rw-r--r--arch/arm/include/asm/kmap_types.h1
-rw-r--r--arch/arm/include/asm/ucontext.h23
-rw-r--r--arch/arm/include/asm/user.h12
-rw-r--r--arch/arm/kernel/signal.c93
-rw-r--r--arch/arm/mach-at91/Makefile4
-rw-r--r--arch/arm/mach-at91/pm_slowclock.S4
-rw-r--r--arch/arm/mach-omap1/timer32k.c15
-rw-r--r--arch/arm/mach-omap2/Kconfig6
-rw-r--r--arch/arm/mach-omap2/board-3630sdp.c1
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c4
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c39
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c8
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c18
-rw-r--r--arch/arm/mach-omap2/board-sdp-flash.c8
-rw-r--r--arch/arm/mach-omap2/board-zoom-debugboard.c2
-rw-r--r--arch/arm/mach-omap2/board-zoom-peripherals.c1
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c8
-rw-r--r--arch/arm/mach-omap2/clockdomain.c6
-rw-r--r--arch/arm/mach-omap2/devices.c2
-rw-r--r--arch/arm/mach-omap2/gpmc-nand.c3
-rw-r--r--arch/arm/mach-omap2/include/mach/entry-macro.S2
-rw-r--r--arch/arm/mach-omap2/omap-headsmp.S6
-rw-r--r--arch/arm/mach-omap2/omap44xx-smc.S2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c3
-rw-r--r--arch/arm/mach-omap2/powerdomain.c2
-rw-r--r--arch/arm/mach-omap2/prcm.c4
-rw-r--r--arch/arm/mach-omap2/serial.c35
-rw-r--r--arch/arm/mm/copypage-v6.c9
-rw-r--r--arch/arm/mm/dma-mapping.c5
-rw-r--r--arch/arm/mm/flush.c25
-rw-r--r--arch/arm/mm/highmem.c87
-rw-r--r--arch/arm/mm/mmu.c10
-rw-r--r--arch/arm/plat-omap/common.c22
-rw-r--r--arch/arm/plat-omap/dma.c9
-rw-r--r--arch/arm/plat-omap/gpio.c6
-rw-r--r--arch/arm/plat-omap/include/plat/irqs.h2
-rw-r--r--arch/arm/plat-omap/include/plat/mcbsp.h2
-rw-r--r--arch/arm/plat-omap/include/plat/nand.h7
-rw-r--r--arch/arm/plat-omap/include/plat/omap44xx.h2
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h2
-rw-r--r--arch/arm/vfp/vfpmodule.c31
47 files changed, 364 insertions, 192 deletions
diff --git a/arch/arm/configs/n8x0_defconfig b/arch/arm/configs/n8x0_defconfig
index 216ad00948af..9405e32783de 100644
--- a/arch/arm/configs/n8x0_defconfig
+++ b/arch/arm/configs/n8x0_defconfig
@@ -1058,7 +1058,6 @@ CONFIG_JFFS2_CMODE_PRIORITY=y
1058# CONFIG_ROMFS_FS is not set 1058# CONFIG_ROMFS_FS is not set
1059# CONFIG_SYSV_FS is not set 1059# CONFIG_SYSV_FS is not set
1060# CONFIG_UFS_FS is not set 1060# CONFIG_UFS_FS is not set
1061# CONFIG_NILFS2_FS is not set
1062CONFIG_NETWORK_FILESYSTEMS=y 1061CONFIG_NETWORK_FILESYSTEMS=y
1063# CONFIG_NFS_FS is not set 1062# CONFIG_NFS_FS is not set
1064# CONFIG_NFSD is not set 1063# CONFIG_NFSD is not set
diff --git a/arch/arm/configs/omap_zoom2_defconfig b/arch/arm/configs/omap_zoom2_defconfig
index f5c6e11cf189..881faea03d79 100644
--- a/arch/arm/configs/omap_zoom2_defconfig
+++ b/arch/arm/configs/omap_zoom2_defconfig
@@ -661,7 +661,7 @@ CONFIG_DEVKMEM=y
661CONFIG_SERIAL_8250=y 661CONFIG_SERIAL_8250=y
662CONFIG_SERIAL_8250_CONSOLE=y 662CONFIG_SERIAL_8250_CONSOLE=y
663CONFIG_SERIAL_8250_NR_UARTS=32 663CONFIG_SERIAL_8250_NR_UARTS=32
664CONFIG_SERIAL_8250_RUNTIME_UARTS=4 664CONFIG_SERIAL_8250_RUNTIME_UARTS=1
665CONFIG_SERIAL_8250_EXTENDED=y 665CONFIG_SERIAL_8250_EXTENDED=y
666CONFIG_SERIAL_8250_MANY_PORTS=y 666CONFIG_SERIAL_8250_MANY_PORTS=y
667CONFIG_SERIAL_8250_SHARE_IRQ=y 667CONFIG_SERIAL_8250_SHARE_IRQ=y
diff --git a/arch/arm/configs/omap_zoom3_defconfig b/arch/arm/configs/omap_zoom3_defconfig
index ea9a5012d332..5e55b550a408 100644
--- a/arch/arm/configs/omap_zoom3_defconfig
+++ b/arch/arm/configs/omap_zoom3_defconfig
@@ -680,7 +680,7 @@ CONFIG_DEVKMEM=y
680CONFIG_SERIAL_8250=y 680CONFIG_SERIAL_8250=y
681CONFIG_SERIAL_8250_CONSOLE=y 681CONFIG_SERIAL_8250_CONSOLE=y
682CONFIG_SERIAL_8250_NR_UARTS=32 682CONFIG_SERIAL_8250_NR_UARTS=32
683CONFIG_SERIAL_8250_RUNTIME_UARTS=4 683CONFIG_SERIAL_8250_RUNTIME_UARTS=1
684CONFIG_SERIAL_8250_EXTENDED=y 684CONFIG_SERIAL_8250_EXTENDED=y
685CONFIG_SERIAL_8250_MANY_PORTS=y 685CONFIG_SERIAL_8250_MANY_PORTS=y
686CONFIG_SERIAL_8250_SHARE_IRQ=y 686CONFIG_SERIAL_8250_SHARE_IRQ=y
diff --git a/arch/arm/configs/rx51_defconfig b/arch/arm/configs/rx51_defconfig
index 45135ffadc57..473f9e13f08b 100644
--- a/arch/arm/configs/rx51_defconfig
+++ b/arch/arm/configs/rx51_defconfig
@@ -59,8 +59,6 @@ CONFIG_FAIR_GROUP_SCHED=y
59CONFIG_USER_SCHED=y 59CONFIG_USER_SCHED=y
60# CONFIG_CGROUP_SCHED is not set 60# CONFIG_CGROUP_SCHED is not set
61# CONFIG_CGROUPS is not set 61# CONFIG_CGROUPS is not set
62CONFIG_SYSFS_DEPRECATED=y
63CONFIG_SYSFS_DEPRECATED_V2=y
64# CONFIG_RELAY is not set 62# CONFIG_RELAY is not set
65# CONFIG_NAMESPACES is not set 63# CONFIG_NAMESPACES is not set
66CONFIG_BLK_DEV_INITRD=y 64CONFIG_BLK_DEV_INITRD=y
@@ -480,7 +478,6 @@ CONFIG_BT_HIDP=m
480# CONFIG_BT_HCIBFUSB is not set 478# CONFIG_BT_HCIBFUSB is not set
481# CONFIG_BT_HCIVHCI is not set 479# CONFIG_BT_HCIVHCI is not set
482# CONFIG_AF_RXRPC is not set 480# CONFIG_AF_RXRPC is not set
483# CONFIG_PHONET is not set
484CONFIG_WIRELESS=y 481CONFIG_WIRELESS=y
485CONFIG_CFG80211=y 482CONFIG_CFG80211=y
486# CONFIG_CFG80211_REG_DEBUG is not set 483# CONFIG_CFG80211_REG_DEBUG is not set
diff --git a/arch/arm/include/asm/highmem.h b/arch/arm/include/asm/highmem.h
index 7f36d00600b4..feb988a7ec37 100644
--- a/arch/arm/include/asm/highmem.h
+++ b/arch/arm/include/asm/highmem.h
@@ -11,7 +11,11 @@
11 11
12#define kmap_prot PAGE_KERNEL 12#define kmap_prot PAGE_KERNEL
13 13
14#define flush_cache_kmaps() flush_cache_all() 14#define flush_cache_kmaps() \
15 do { \
16 if (cache_is_vivt()) \
17 flush_cache_all(); \
18 } while (0)
15 19
16extern pte_t *pkmap_page_table; 20extern pte_t *pkmap_page_table;
17 21
@@ -21,11 +25,20 @@ extern void *kmap_high(struct page *page);
21extern void *kmap_high_get(struct page *page); 25extern void *kmap_high_get(struct page *page);
22extern void kunmap_high(struct page *page); 26extern void kunmap_high(struct page *page);
23 27
28extern void *kmap_high_l1_vipt(struct page *page, pte_t *saved_pte);
29extern void kunmap_high_l1_vipt(struct page *page, pte_t saved_pte);
30
31/*
32 * The following functions are already defined by <linux/highmem.h>
33 * when CONFIG_HIGHMEM is not set.
34 */
35#ifdef CONFIG_HIGHMEM
24extern void *kmap(struct page *page); 36extern void *kmap(struct page *page);
25extern void kunmap(struct page *page); 37extern void kunmap(struct page *page);
26extern void *kmap_atomic(struct page *page, enum km_type type); 38extern void *kmap_atomic(struct page *page, enum km_type type);
27extern void kunmap_atomic(void *kvaddr, enum km_type type); 39extern void kunmap_atomic(void *kvaddr, enum km_type type);
28extern void *kmap_atomic_pfn(unsigned long pfn, enum km_type type); 40extern void *kmap_atomic_pfn(unsigned long pfn, enum km_type type);
29extern struct page *kmap_atomic_to_page(const void *ptr); 41extern struct page *kmap_atomic_to_page(const void *ptr);
42#endif
30 43
31#endif 44#endif
diff --git a/arch/arm/include/asm/kmap_types.h b/arch/arm/include/asm/kmap_types.h
index c019949a5189..c4b2ea3fbe42 100644
--- a/arch/arm/include/asm/kmap_types.h
+++ b/arch/arm/include/asm/kmap_types.h
@@ -18,6 +18,7 @@ enum km_type {
18 KM_IRQ1, 18 KM_IRQ1,
19 KM_SOFTIRQ0, 19 KM_SOFTIRQ0,
20 KM_SOFTIRQ1, 20 KM_SOFTIRQ1,
21 KM_L1_CACHE,
21 KM_L2_CACHE, 22 KM_L2_CACHE,
22 KM_TYPE_NR 23 KM_TYPE_NR
23}; 24};
diff --git a/arch/arm/include/asm/ucontext.h b/arch/arm/include/asm/ucontext.h
index bf65e9f4525d..47f023aa8495 100644
--- a/arch/arm/include/asm/ucontext.h
+++ b/arch/arm/include/asm/ucontext.h
@@ -59,23 +59,22 @@ struct iwmmxt_sigframe {
59#endif /* CONFIG_IWMMXT */ 59#endif /* CONFIG_IWMMXT */
60 60
61#ifdef CONFIG_VFP 61#ifdef CONFIG_VFP
62#if __LINUX_ARM_ARCH__ < 6
63/* For ARM pre-v6, we use fstmiax and fldmiax. This adds one extra
64 * word after the registers, and a word of padding at the end for
65 * alignment. */
66#define VFP_MAGIC 0x56465001 62#define VFP_MAGIC 0x56465001
67#define VFP_STORAGE_SIZE 152
68#else
69#define VFP_MAGIC 0x56465002
70#define VFP_STORAGE_SIZE 144
71#endif
72 63
73struct vfp_sigframe 64struct vfp_sigframe
74{ 65{
75 unsigned long magic; 66 unsigned long magic;
76 unsigned long size; 67 unsigned long size;
77 union vfp_state storage; 68 struct user_vfp ufp;
78}; 69 struct user_vfp_exc ufp_exc;
70} __attribute__((__aligned__(8)));
71
72/*
73 * 8 byte for magic and size, 264 byte for ufp, 12 bytes for ufp_exc,
74 * 4 bytes padding.
75 */
76#define VFP_STORAGE_SIZE sizeof(struct vfp_sigframe)
77
79#endif /* CONFIG_VFP */ 78#endif /* CONFIG_VFP */
80 79
81/* 80/*
@@ -91,7 +90,7 @@ struct aux_sigframe {
91#ifdef CONFIG_IWMMXT 90#ifdef CONFIG_IWMMXT
92 struct iwmmxt_sigframe iwmmxt; 91 struct iwmmxt_sigframe iwmmxt;
93#endif 92#endif
94#if 0 && defined CONFIG_VFP /* Not yet saved. */ 93#ifdef CONFIG_VFP
95 struct vfp_sigframe vfp; 94 struct vfp_sigframe vfp;
96#endif 95#endif
97 /* Something that isn't a valid magic number for any coprocessor. */ 96 /* Something that isn't a valid magic number for any coprocessor. */
diff --git a/arch/arm/include/asm/user.h b/arch/arm/include/asm/user.h
index df95e050f9dd..05ac4b06876a 100644
--- a/arch/arm/include/asm/user.h
+++ b/arch/arm/include/asm/user.h
@@ -83,11 +83,21 @@ struct user{
83 83
84/* 84/*
85 * User specific VFP registers. If only VFPv2 is present, registers 16 to 31 85 * User specific VFP registers. If only VFPv2 is present, registers 16 to 31
86 * are ignored by the ptrace system call. 86 * are ignored by the ptrace system call and the signal handler.
87 */ 87 */
88struct user_vfp { 88struct user_vfp {
89 unsigned long long fpregs[32]; 89 unsigned long long fpregs[32];
90 unsigned long fpscr; 90 unsigned long fpscr;
91}; 91};
92 92
93/*
94 * VFP exception registers exposed to user space during signal delivery.
95 * Fields not relavant to the current VFP architecture are ignored.
96 */
97struct user_vfp_exc {
98 unsigned long fpexc;
99 unsigned long fpinst;
100 unsigned long fpinst2;
101};
102
93#endif /* _ARM_USER_H */ 103#endif /* _ARM_USER_H */
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index e7714f367eb8..907d5a620bca 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -18,6 +18,7 @@
18#include <asm/cacheflush.h> 18#include <asm/cacheflush.h>
19#include <asm/ucontext.h> 19#include <asm/ucontext.h>
20#include <asm/unistd.h> 20#include <asm/unistd.h>
21#include <asm/vfp.h>
21 22
22#include "ptrace.h" 23#include "ptrace.h"
23#include "signal.h" 24#include "signal.h"
@@ -175,6 +176,90 @@ static int restore_iwmmxt_context(struct iwmmxt_sigframe *frame)
175 176
176#endif 177#endif
177 178
179#ifdef CONFIG_VFP
180
181static int preserve_vfp_context(struct vfp_sigframe __user *frame)
182{
183 struct thread_info *thread = current_thread_info();
184 struct vfp_hard_struct *h = &thread->vfpstate.hard;
185 const unsigned long magic = VFP_MAGIC;
186 const unsigned long size = VFP_STORAGE_SIZE;
187 int err = 0;
188
189 vfp_sync_hwstate(thread);
190 __put_user_error(magic, &frame->magic, err);
191 __put_user_error(size, &frame->size, err);
192
193 /*
194 * Copy the floating point registers. There can be unused
195 * registers see asm/hwcap.h for details.
196 */
197 err |= __copy_to_user(&frame->ufp.fpregs, &h->fpregs,
198 sizeof(h->fpregs));
199 /*
200 * Copy the status and control register.
201 */
202 __put_user_error(h->fpscr, &frame->ufp.fpscr, err);
203
204 /*
205 * Copy the exception registers.
206 */
207 __put_user_error(h->fpexc, &frame->ufp_exc.fpexc, err);
208 __put_user_error(h->fpinst, &frame->ufp_exc.fpinst, err);
209 __put_user_error(h->fpinst2, &frame->ufp_exc.fpinst2, err);
210
211 return err ? -EFAULT : 0;
212}
213
214static int restore_vfp_context(struct vfp_sigframe __user *frame)
215{
216 struct thread_info *thread = current_thread_info();
217 struct vfp_hard_struct *h = &thread->vfpstate.hard;
218 unsigned long magic;
219 unsigned long size;
220 unsigned long fpexc;
221 int err = 0;
222
223 __get_user_error(magic, &frame->magic, err);
224 __get_user_error(size, &frame->size, err);
225
226 if (err)
227 return -EFAULT;
228 if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE)
229 return -EINVAL;
230
231 /*
232 * Copy the floating point registers. There can be unused
233 * registers see asm/hwcap.h for details.
234 */
235 err |= __copy_from_user(&h->fpregs, &frame->ufp.fpregs,
236 sizeof(h->fpregs));
237 /*
238 * Copy the status and control register.
239 */
240 __get_user_error(h->fpscr, &frame->ufp.fpscr, err);
241
242 /*
243 * Sanitise and restore the exception registers.
244 */
245 __get_user_error(fpexc, &frame->ufp_exc.fpexc, err);
246 /* Ensure the VFP is enabled. */
247 fpexc |= FPEXC_EN;
248 /* Ensure FPINST2 is invalid and the exception flag is cleared. */
249 fpexc &= ~(FPEXC_EX | FPEXC_FP2V);
250 h->fpexc = fpexc;
251
252 __get_user_error(h->fpinst, &frame->ufp_exc.fpinst, err);
253 __get_user_error(h->fpinst2, &frame->ufp_exc.fpinst2, err);
254
255 if (!err)
256 vfp_flush_hwstate(thread);
257
258 return err ? -EFAULT : 0;
259}
260
261#endif
262
178/* 263/*
179 * Do a signal return; undo the signal stack. These are aligned to 64-bit. 264 * Do a signal return; undo the signal stack. These are aligned to 64-bit.
180 */ 265 */
@@ -233,8 +318,8 @@ static int restore_sigframe(struct pt_regs *regs, struct sigframe __user *sf)
233 err |= restore_iwmmxt_context(&aux->iwmmxt); 318 err |= restore_iwmmxt_context(&aux->iwmmxt);
234#endif 319#endif
235#ifdef CONFIG_VFP 320#ifdef CONFIG_VFP
236// if (err == 0) 321 if (err == 0)
237// err |= vfp_restore_state(&sf->aux.vfp); 322 err |= restore_vfp_context(&aux->vfp);
238#endif 323#endif
239 324
240 return err; 325 return err;
@@ -348,8 +433,8 @@ setup_sigframe(struct sigframe __user *sf, struct pt_regs *regs, sigset_t *set)
348 err |= preserve_iwmmxt_context(&aux->iwmmxt); 433 err |= preserve_iwmmxt_context(&aux->iwmmxt);
349#endif 434#endif
350#ifdef CONFIG_VFP 435#ifdef CONFIG_VFP
351// if (err == 0) 436 if (err == 0)
352// err |= vfp_save_state(&sf->aux.vfp); 437 err |= preserve_vfp_context(&aux->vfp);
353#endif 438#endif
354 __put_user_error(0, &aux->end_magic, err); 439 __put_user_error(0, &aux->end_magic, err);
355 440
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 027dd570dcc3..d4004557532a 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -16,8 +16,8 @@ obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_d
16obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o 16obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
17obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o 17obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
18obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o 18obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
19obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o 19obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
20 obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o 20obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
21obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o 21obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
22obj-$(CONFIG_ARCH_AT572D940HF) += at572d940hf.o at91sam926x_time.o at572d940hf_devices.o sam9_smc.o 22obj-$(CONFIG_ARCH_AT572D940HF) += at572d940hf.o at91sam926x_time.o at572d940hf_devices.o sam9_smc.o
23obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o 23obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 9fcbd6ca0090..9c5b48e68a71 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -175,8 +175,6 @@ ENTRY(at91_slow_clock)
175 orr r3, r3, #(1 << 29) /* bit 29 always set */ 175 orr r3, r3, #(1 << 29) /* bit 29 always set */
176 str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)] 176 str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
177 177
178 wait_pllalock
179
180 /* Save PLLB setting and disable it */ 178 /* Save PLLB setting and disable it */
181 ldr r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)] 179 ldr r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
182 str r3, .saved_pllbr 180 str r3, .saved_pllbr
@@ -184,8 +182,6 @@ ENTRY(at91_slow_clock)
184 mov r3, #AT91_PMC_PLLCOUNT 182 mov r3, #AT91_PMC_PLLCOUNT
185 str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)] 183 str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
186 184
187 wait_pllblock
188
189 /* Turn off the main oscillator */ 185 /* Turn off the main oscillator */
190 ldr r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)] 186 ldr r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
191 bic r3, r3, #AT91_PMC_MOSCEN 187 bic r3, r3, #AT91_PMC_MOSCEN
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index 9ad118563f7d..20cfbcc6c60c 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -68,12 +68,6 @@ struct sys_timer omap_timer;
68 * --------------------------------------------------------------------------- 68 * ---------------------------------------------------------------------------
69 */ 69 */
70 70
71#if defined(CONFIG_ARCH_OMAP16XX)
72#define TIMER_32K_SYNCHRONIZED 0xfffbc410
73#else
74#error OMAP 32KHz timer does not currently work on 15XX!
75#endif
76
77/* 16xx specific defines */ 71/* 16xx specific defines */
78#define OMAP1_32K_TIMER_BASE 0xfffb9000 72#define OMAP1_32K_TIMER_BASE 0xfffb9000
79#define OMAP1_32K_TIMER_CR 0x08 73#define OMAP1_32K_TIMER_CR 0x08
@@ -150,15 +144,6 @@ static struct clock_event_device clockevent_32k_timer = {
150 .set_mode = omap_32k_timer_set_mode, 144 .set_mode = omap_32k_timer_set_mode,
151}; 145};
152 146
153/*
154 * The 32KHz synchronized timer is an additional timer on 16xx.
155 * It is always running.
156 */
157static inline unsigned long omap_32k_sync_timer_read(void)
158{
159 return omap_readl(TIMER_32K_SYNCHRONIZED);
160}
161
162static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id) 147static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id)
163{ 148{
164 struct clock_event_device *evt = &clockevent_32k_timer; 149 struct clock_event_device *evt = &clockevent_32k_timer;
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index a8a3d1e23e26..2455dcc744a0 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -59,8 +59,10 @@ config MACH_OMAP3_BEAGLE
59 select OMAP_PACKAGE_CBB 59 select OMAP_PACKAGE_CBB
60 60
61config MACH_DEVKIT8000 61config MACH_DEVKIT8000
62 bool "DEVKIT8000 board" 62 bool "DEVKIT8000 board"
63 depends on ARCH_OMAP3 63 depends on ARCH_OMAP3
64 select OMAP_PACKAGE_CUS
65 select OMAP_MUX
64 66
65config MACH_OMAP_LDP 67config MACH_OMAP_LDP
66 bool "OMAP3 LDP board" 68 bool "OMAP3 LDP board"
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index a0a2a113465c..504d2bd222fe 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -96,6 +96,7 @@ static struct omap_board_mux board_mux[] __initdata = {
96static void __init omap_sdp_init(void) 96static void __init omap_sdp_init(void)
97{ 97{
98 omap3_mux_init(board_mux, OMAP_PACKAGE_CBP); 98 omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
99 omap_serial_init();
99 zoom_peripherals_init(); 100 zoom_peripherals_init();
100 board_smc91x_init(); 101 board_smc91x_init();
101 enable_board_wakeup_source(); 102 enable_board_wakeup_source();
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 6ae880585d54..c1c4389fbd8f 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -294,9 +294,9 @@ static struct omap_board_mux board_mux[] __initdata = {
294 294
295static void __init am3517_evm_init(void) 295static void __init am3517_evm_init(void)
296{ 296{
297 am3517_evm_i2c_init();
298
299 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 297 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
298
299 am3517_evm_i2c_init();
300 platform_add_devices(am3517_evm_devices, 300 platform_add_devices(am3517_evm_devices,
301 ARRAY_SIZE(am3517_evm_devices)); 301 ARRAY_SIZE(am3517_evm_devices));
302 302
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 5bfc13b3176c..47e3af2166d4 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -50,7 +50,6 @@
50#include <linux/input/matrix_keypad.h> 50#include <linux/input/matrix_keypad.h>
51#include <linux/spi/spi.h> 51#include <linux/spi/spi.h>
52#include <linux/spi/ads7846.h> 52#include <linux/spi/ads7846.h>
53#include <linux/usb/otg.h>
54#include <linux/dm9000.h> 53#include <linux/dm9000.h>
55#include <linux/interrupt.h> 54#include <linux/interrupt.h>
56 55
@@ -269,20 +268,6 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
269 devkit8000_vmmc1_supply.dev = mmc[0].dev; 268 devkit8000_vmmc1_supply.dev = mmc[0].dev;
270 devkit8000_vsim_supply.dev = mmc[0].dev; 269 devkit8000_vsim_supply.dev = mmc[0].dev;
271 270
272 /* REVISIT: need ehci-omap hooks for external VBUS
273 * power switch and overcurrent detect
274 */
275
276 gpio_request(gpio + 1, "EHCI_nOC");
277 gpio_direction_input(gpio + 1);
278
279 /* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */
280 gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR");
281 gpio_direction_output(gpio + TWL4030_GPIO_MAX, 1);
282
283 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
284 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
285
286 return 0; 271 return 0;
287} 272}
288 273
@@ -303,7 +288,7 @@ static struct regulator_consumer_supply devkit8000_vpll2_supplies[] = {
303 .dev = &devkit8000_lcd_device.dev, 288 .dev = &devkit8000_lcd_device.dev,
304 }, 289 },
305 { 290 {
306 .supply = "vdss_dsi", 291 .supply = "vdds_dsi",
307 .dev = &devkit8000_dss_device.dev, 292 .dev = &devkit8000_dss_device.dev,
308 } 293 }
309}; 294};
@@ -639,17 +624,21 @@ static struct omap_musb_board_data musb_board_data = {
639static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { 624static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
640 625
641 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY, 626 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
642 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, 627 .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN,
643 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 628 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
644 629
645 .phy_reset = true, 630 .phy_reset = true,
646 .reset_gpio_port[0] = -EINVAL, 631 .reset_gpio_port[0] = -EINVAL,
647 .reset_gpio_port[1] = 147, 632 .reset_gpio_port[1] = -EINVAL,
648 .reset_gpio_port[2] = -EINVAL 633 .reset_gpio_port[2] = -EINVAL
649}; 634};
650 635
651static void __init devkit8000_init(void) 636static void __init devkit8000_init(void)
652{ 637{
638 omap_serial_init();
639
640 omap_dm9000_init();
641
653 devkit8000_i2c_init(); 642 devkit8000_i2c_init();
654 platform_add_devices(devkit8000_devices, 643 platform_add_devices(devkit8000_devices,
655 ARRAY_SIZE(devkit8000_devices)); 644 ARRAY_SIZE(devkit8000_devices));
@@ -659,25 +648,15 @@ static void __init devkit8000_init(void)
659 spi_register_board_info(devkit8000_spi_board_info, 648 spi_register_board_info(devkit8000_spi_board_info,
660 ARRAY_SIZE(devkit8000_spi_board_info)); 649 ARRAY_SIZE(devkit8000_spi_board_info));
661 650
662 omap_serial_init();
663
664 omap_dm9000_init();
665
666 devkit8000_ads7846_init(); 651 devkit8000_ads7846_init();
667 652
668 omap_mux_init_gpio(170, OMAP_PIN_INPUT);
669
670 gpio_request(170, "DVI_nPD");
671 /* REVISIT leave DVI powered down until it's needed ... */
672 gpio_direction_output(170, true);
673
674 usb_musb_init(&musb_board_data); 653 usb_musb_init(&musb_board_data);
675 usb_ehci_init(&ehci_pdata); 654 usb_ehci_init(&ehci_pdata);
676 devkit8000_flash_init(); 655 devkit8000_flash_init();
677 656
678 /* Ensure SDRC pins are mux'd for self-refresh */ 657 /* Ensure SDRC pins are mux'd for self-refresh */
679 omap_mux_init_signal("sdr_cke0", OMAP_PIN_OUTPUT); 658 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
680 omap_mux_init_signal("sdr_cke1", OMAP_PIN_OUTPUT); 659 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
681} 660}
682 661
683static void __init devkit8000_map_io(void) 662static void __init devkit8000_map_io(void)
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 3c7789d45051..d55c57b761a9 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -458,13 +458,13 @@ static struct omap_musb_board_data musb_board_data = {
458}; 458};
459 459
460static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { 460static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
461 .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN, 461 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
462 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, 462 .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN,
463 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, 463 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
464 464
465 .phy_reset = true, 465 .phy_reset = true,
466 .reset_gpio_port[0] = -EINVAL, 466 .reset_gpio_port[0] = IGEP2_GPIO_USBH_NRESET,
467 .reset_gpio_port[1] = IGEP2_GPIO_USBH_NRESET, 467 .reset_gpio_port[1] = -EINVAL,
468 .reset_gpio_port[2] = -EINVAL, 468 .reset_gpio_port[2] = -EINVAL,
469}; 469};
470 470
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index da9bcb898991..3ccc34ebdcc7 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -216,7 +216,7 @@ static void __init n8x0_onenand_init(void) {}
216 */ 216 */
217#define N8X0_SLOT_SWITCH_GPIO 96 217#define N8X0_SLOT_SWITCH_GPIO 96
218#define N810_EMMC_VSD_GPIO 23 218#define N810_EMMC_VSD_GPIO 23
219#define NN810_EMMC_VIO_GPIO 9 219#define N810_EMMC_VIO_GPIO 9
220 220
221static int n8x0_mmc_switch_slot(struct device *dev, int slot) 221static int n8x0_mmc_switch_slot(struct device *dev, int slot)
222{ 222{
@@ -304,10 +304,10 @@ static void n810_set_power_emmc(struct device *dev,
304 if (power_on) { 304 if (power_on) {
305 gpio_set_value(N810_EMMC_VSD_GPIO, 1); 305 gpio_set_value(N810_EMMC_VSD_GPIO, 1);
306 msleep(1); 306 msleep(1);
307 gpio_set_value(NN810_EMMC_VIO_GPIO, 1); 307 gpio_set_value(N810_EMMC_VIO_GPIO, 1);
308 msleep(1); 308 msleep(1);
309 } else { 309 } else {
310 gpio_set_value(NN810_EMMC_VIO_GPIO, 0); 310 gpio_set_value(N810_EMMC_VIO_GPIO, 0);
311 msleep(50); 311 msleep(50);
312 gpio_set_value(N810_EMMC_VSD_GPIO, 0); 312 gpio_set_value(N810_EMMC_VSD_GPIO, 0);
313 msleep(50); 313 msleep(50);
@@ -468,7 +468,7 @@ static void n8x0_mmc_cleanup(struct device *dev)
468 468
469 if (machine_is_nokia_n810()) { 469 if (machine_is_nokia_n810()) {
470 gpio_free(N810_EMMC_VSD_GPIO); 470 gpio_free(N810_EMMC_VSD_GPIO);
471 gpio_free(NN810_EMMC_VIO_GPIO); 471 gpio_free(N810_EMMC_VIO_GPIO);
472 } 472 }
473} 473}
474 474
@@ -529,7 +529,7 @@ void __init n8x0_mmc_init(void)
529 529
530 err = gpio_request(N8X0_SLOT_SWITCH_GPIO, "MMC slot switch"); 530 err = gpio_request(N8X0_SLOT_SWITCH_GPIO, "MMC slot switch");
531 if (err) 531 if (err)
532 return err; 532 return;
533 533
534 gpio_direction_output(N8X0_SLOT_SWITCH_GPIO, 0); 534 gpio_direction_output(N8X0_SLOT_SWITCH_GPIO, 0);
535 535
@@ -537,17 +537,17 @@ void __init n8x0_mmc_init(void)
537 err = gpio_request(N810_EMMC_VSD_GPIO, "MMC slot 2 Vddf"); 537 err = gpio_request(N810_EMMC_VSD_GPIO, "MMC slot 2 Vddf");
538 if (err) { 538 if (err) {
539 gpio_free(N8X0_SLOT_SWITCH_GPIO); 539 gpio_free(N8X0_SLOT_SWITCH_GPIO);
540 return err; 540 return;
541 } 541 }
542 gpio_direction_output(N810_EMMC_VSD_GPIO, 0); 542 gpio_direction_output(N810_EMMC_VSD_GPIO, 0);
543 543
544 err = gpio_request(NN810_EMMC_VIO_GPIO, "MMC slot 2 Vdd"); 544 err = gpio_request(N810_EMMC_VIO_GPIO, "MMC slot 2 Vdd");
545 if (err) { 545 if (err) {
546 gpio_free(N8X0_SLOT_SWITCH_GPIO); 546 gpio_free(N8X0_SLOT_SWITCH_GPIO);
547 gpio_free(N810_EMMC_VSD_GPIO); 547 gpio_free(N810_EMMC_VSD_GPIO);
548 return err; 548 return;
549 } 549 }
550 gpio_direction_output(NN810_EMMC_VIO_GPIO, 0); 550 gpio_direction_output(N810_EMMC_VIO_GPIO, 0);
551 } 551 }
552 552
553 mmc_data[0] = &mmc1_data; 553 mmc_data[0] = &mmc1_data;
diff --git a/arch/arm/mach-omap2/board-sdp-flash.c b/arch/arm/mach-omap2/board-sdp-flash.c
index b1b88deec7f2..2d026328e385 100644
--- a/arch/arm/mach-omap2/board-sdp-flash.c
+++ b/arch/arm/mach-omap2/board-sdp-flash.c
@@ -253,20 +253,20 @@ void __init sdp_flash_init(struct flash_partitions sdp_partition_info[])
253 } 253 }
254 254
255 if (norcs > GPMC_CS_NUM) 255 if (norcs > GPMC_CS_NUM)
256 printk(KERN_INFO "OneNAND: Unable to find configuration " 256 printk(KERN_INFO "NOR: Unable to find configuration "
257 " in GPMC\n "); 257 "in GPMC\n");
258 else 258 else
259 board_nor_init(sdp_partition_info[0], norcs); 259 board_nor_init(sdp_partition_info[0], norcs);
260 260
261 if (onenandcs > GPMC_CS_NUM) 261 if (onenandcs > GPMC_CS_NUM)
262 printk(KERN_INFO "OneNAND: Unable to find configuration " 262 printk(KERN_INFO "OneNAND: Unable to find configuration "
263 " in GPMC\n "); 263 "in GPMC\n");
264 else 264 else
265 board_onenand_init(sdp_partition_info[1], onenandcs); 265 board_onenand_init(sdp_partition_info[1], onenandcs);
266 266
267 if (nandcs > GPMC_CS_NUM) 267 if (nandcs > GPMC_CS_NUM)
268 printk(KERN_INFO "NAND: Unable to find configuration " 268 printk(KERN_INFO "NAND: Unable to find configuration "
269 " in GPMC\n "); 269 "in GPMC\n");
270 else 270 else
271 board_nand_init(sdp_partition_info[2], nandcs); 271 board_nand_init(sdp_partition_info[2], nandcs);
272} 272}
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c
index bb4018b60642..e15d2e87cfc1 100644
--- a/arch/arm/mach-omap2/board-zoom-debugboard.c
+++ b/arch/arm/mach-omap2/board-zoom-debugboard.c
@@ -96,7 +96,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
96 96
97static struct platform_device zoom_debugboard_serial_device = { 97static struct platform_device zoom_debugboard_serial_device = {
98 .name = "serial8250", 98 .name = "serial8250",
99 .id = 3, 99 .id = PLAT8250_DEV_PLATFORM,
100 .dev = { 100 .dev = {
101 .platform_data = serial_platform_data, 101 .platform_data = serial_platform_data,
102 }, 102 },
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index ca95d8d64136..6b3984964cc5 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -280,7 +280,6 @@ static void enable_board_wakeup_source(void)
280void __init zoom_peripherals_init(void) 280void __init zoom_peripherals_init(void)
281{ 281{
282 omap_i2c_init(); 282 omap_i2c_init();
283 omap_serial_init();
284 usb_musb_init(&musb_board_data); 283 usb_musb_init(&musb_board_data);
285 enable_board_wakeup_source(); 284 enable_board_wakeup_source();
286} 285}
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index d5153b6bd6cb..9cba5560519b 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -895,7 +895,7 @@ static struct clk dpll4_m4x2_ck = {
895 .ops = &clkops_omap2_dflt_wait, 895 .ops = &clkops_omap2_dflt_wait,
896 .parent = &dpll4_m4_ck, 896 .parent = &dpll4_m4_ck,
897 .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), 897 .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
898 .enable_bit = OMAP3430_PWRDN_CAM_SHIFT, 898 .enable_bit = OMAP3430_PWRDN_DSS1_SHIFT,
899 .flags = INVERT_ENABLE, 899 .flags = INVERT_ENABLE,
900 .clkdm_name = "dpll4_clkdm", 900 .clkdm_name = "dpll4_clkdm",
901 .recalc = &omap3_clkoutx2_recalc, 901 .recalc = &omap3_clkoutx2_recalc,
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 28b107967c86..a5c0c9c8e496 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -2671,10 +2671,10 @@ static struct omap_clk omap44xx_clks[] = {
2671 CLK("omap-mcbsp.2", "ick", &dummy_ck, CK_443X), 2671 CLK("omap-mcbsp.2", "ick", &dummy_ck, CK_443X),
2672 CLK("omap-mcbsp.3", "ick", &dummy_ck, CK_443X), 2672 CLK("omap-mcbsp.3", "ick", &dummy_ck, CK_443X),
2673 CLK("omap-mcbsp.4", "ick", &dummy_ck, CK_443X), 2673 CLK("omap-mcbsp.4", "ick", &dummy_ck, CK_443X),
2674 CLK("omap-mcspi.1", "ick", &dummy_ck, CK_443X), 2674 CLK("omap2_mcspi.1", "ick", &dummy_ck, CK_443X),
2675 CLK("omap-mcspi.2", "ick", &dummy_ck, CK_443X), 2675 CLK("omap2_mcspi.2", "ick", &dummy_ck, CK_443X),
2676 CLK("omap-mcspi.3", "ick", &dummy_ck, CK_443X), 2676 CLK("omap2_mcspi.3", "ick", &dummy_ck, CK_443X),
2677 CLK("omap-mcspi.4", "ick", &dummy_ck, CK_443X), 2677 CLK("omap2_mcspi.4", "ick", &dummy_ck, CK_443X),
2678 CLK(NULL, "uart1_ick", &dummy_ck, CK_443X), 2678 CLK(NULL, "uart1_ick", &dummy_ck, CK_443X),
2679 CLK(NULL, "uart2_ick", &dummy_ck, CK_443X), 2679 CLK(NULL, "uart2_ick", &dummy_ck, CK_443X),
2680 CLK(NULL, "uart3_ick", &dummy_ck, CK_443X), 2680 CLK(NULL, "uart3_ick", &dummy_ck, CK_443X),
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index b87ad66f083e..6e568ec995ee 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -240,7 +240,7 @@ static void _omap2_clkdm_set_hwsup(struct clockdomain *clkdm, int enable)
240 bits = OMAP24XX_CLKSTCTRL_ENABLE_AUTO; 240 bits = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
241 else 241 else
242 bits = OMAP24XX_CLKSTCTRL_DISABLE_AUTO; 242 bits = OMAP24XX_CLKSTCTRL_DISABLE_AUTO;
243 } else if (cpu_is_omap34xx() | cpu_is_omap44xx()) { 243 } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
244 if (enable) 244 if (enable)
245 bits = OMAP34XX_CLKSTCTRL_ENABLE_AUTO; 245 bits = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
246 else 246 else
@@ -812,7 +812,7 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm)
812 cm_set_mod_reg_bits(OMAP24XX_FORCESTATE, 812 cm_set_mod_reg_bits(OMAP24XX_FORCESTATE,
813 clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL); 813 clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL);
814 814
815 } else if (cpu_is_omap34xx() | cpu_is_omap44xx()) { 815 } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
816 816
817 u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP << 817 u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP <<
818 __ffs(clkdm->clktrctrl_mask)); 818 __ffs(clkdm->clktrctrl_mask));
@@ -856,7 +856,7 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm)
856 cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE, 856 cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE,
857 clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL); 857 clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL);
858 858
859 } else if (cpu_is_omap34xx() | cpu_is_omap44xx()) { 859 } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
860 860
861 u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP << 861 u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP <<
862 __ffs(clkdm->clktrctrl_mask)); 862 __ffs(clkdm->clktrctrl_mask));
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 23e4d7733610..2271b9bd1f50 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -726,7 +726,7 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
726 if (!cpu_is_omap44xx()) 726 if (!cpu_is_omap44xx())
727 return; 727 return;
728 base = OMAP4_MMC5_BASE + OMAP4_MMC_REG_OFFSET; 728 base = OMAP4_MMC5_BASE + OMAP4_MMC_REG_OFFSET;
729 irq = OMAP44XX_IRQ_MMC4; 729 irq = OMAP44XX_IRQ_MMC5;
730 break; 730 break;
731 default: 731 default:
732 continue; 732 continue;
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 64d74f05abbe..e57fb29ff855 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -39,6 +39,9 @@ static int omap2_nand_gpmc_retime(void)
39 struct gpmc_timings t; 39 struct gpmc_timings t;
40 int err; 40 int err;
41 41
42 if (!gpmc_nand_data->gpmc_t)
43 return 0;
44
42 memset(&t, 0, sizeof(t)); 45 memset(&t, 0, sizeof(t));
43 t.sync_clk = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->sync_clk); 46 t.sync_clk = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->sync_clk);
44 t.cs_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_on); 47 t.cs_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_on);
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
index ff25c7e4e606..50fd74916643 100644
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap2/include/mach/entry-macro.S
@@ -52,7 +52,7 @@ omap_irq_base: .word 0
52 52
53 mrc p15, 0, \tmp, c0, c0, 0 @ get processor revision 53 mrc p15, 0, \tmp, c0, c0, 0 @ get processor revision
54 and \tmp, \tmp, #0x000f0000 @ only check architecture 54 and \tmp, \tmp, #0x000f0000 @ only check architecture
55 cmp \tmp, #0x00060000 @ is v6? 55 cmp \tmp, #0x00070000 @ is v6?
56 beq 2400f @ found v6 so it's omap24xx 56 beq 2400f @ found v6 so it's omap24xx
57 mrc p15, 0, \tmp, c0, c0, 0 @ get processor revision 57 mrc p15, 0, \tmp, c0, c0, 0 @ get processor revision
58 and \tmp, \tmp, #0x000000f0 @ check cortex 8 or 9 58 and \tmp, \tmp, #0x000000f0 @ check cortex 8 or 9
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index aa3f65c2ac97..ef0e7a00dd6c 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -33,7 +33,7 @@
33ENTRY(omap_secondary_startup) 33ENTRY(omap_secondary_startup)
34hold: ldr r12,=0x103 34hold: ldr r12,=0x103
35 dsb 35 dsb
36 smc @ read from AuxCoreBoot0 36 smc #0 @ read from AuxCoreBoot0
37 mov r0, r0, lsr #9 37 mov r0, r0, lsr #9
38 mrc p15, 0, r4, c0, c0, 5 38 mrc p15, 0, r4, c0, c0, 5
39 and r4, r4, #0x0f 39 and r4, r4, #0x0f
@@ -52,7 +52,7 @@ ENTRY(omap_modify_auxcoreboot0)
52 stmfd sp!, {r1-r12, lr} 52 stmfd sp!, {r1-r12, lr}
53 ldr r12, =0x104 53 ldr r12, =0x104
54 dsb 54 dsb
55 smc 55 smc #0
56 ldmfd sp!, {r1-r12, pc} 56 ldmfd sp!, {r1-r12, pc}
57END(omap_modify_auxcoreboot0) 57END(omap_modify_auxcoreboot0)
58 58
@@ -60,6 +60,6 @@ ENTRY(omap_auxcoreboot_addr)
60 stmfd sp!, {r2-r12, lr} 60 stmfd sp!, {r2-r12, lr}
61 ldr r12, =0x105 61 ldr r12, =0x105
62 dsb 62 dsb
63 smc 63 smc #0
64 ldmfd sp!, {r2-r12, pc} 64 ldmfd sp!, {r2-r12, pc}
65END(omap_auxcoreboot_addr) 65END(omap_auxcoreboot_addr)
diff --git a/arch/arm/mach-omap2/omap44xx-smc.S b/arch/arm/mach-omap2/omap44xx-smc.S
index 89bb2b141473..f61c7771ca47 100644
--- a/arch/arm/mach-omap2/omap44xx-smc.S
+++ b/arch/arm/mach-omap2/omap44xx-smc.S
@@ -27,6 +27,6 @@ ENTRY(omap_smc1)
27 mov r12, r0 27 mov r12, r0
28 mov r0, r1 28 mov r0, r1
29 dsb 29 dsb
30 smc 30 smc #0
31 ldmfd sp!, {r2-r12, pc} 31 ldmfd sp!, {r2-r12, pc}
32END(omap_smc1) 32END(omap_smc1)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index c6649472ce0d..e436dcb19795 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1511,6 +1511,9 @@ struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
1511 c = oh->slaves[oh->_mpu_port_index]->_clk; 1511 c = oh->slaves[oh->_mpu_port_index]->_clk;
1512 } 1512 }
1513 1513
1514 if (!c->clkdm)
1515 return NULL;
1516
1514 return c->clkdm->pwrdm.ptr; 1517 return c->clkdm->pwrdm.ptr;
1515 1518
1516} 1519}
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 9a0fb385622b..ebfce7d1a5d3 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -222,7 +222,7 @@ void pwrdm_init(struct powerdomain **pwrdm_list)
222{ 222{
223 struct powerdomain **p = NULL; 223 struct powerdomain **p = NULL;
224 224
225 if (cpu_is_omap24xx() | cpu_is_omap34xx()) { 225 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
226 pwrstctrl_reg_offs = OMAP2_PM_PWSTCTRL; 226 pwrstctrl_reg_offs = OMAP2_PM_PWSTCTRL;
227 pwrstst_reg_offs = OMAP2_PM_PWSTST; 227 pwrstst_reg_offs = OMAP2_PM_PWSTST;
228 } else if (cpu_is_omap44xx()) { 228 } else if (cpu_is_omap44xx()) {
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 9537f6f2352d..07a60f1204ca 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -123,7 +123,7 @@ struct omap3_prcm_regs prcm_context;
123u32 omap_prcm_get_reset_sources(void) 123u32 omap_prcm_get_reset_sources(void)
124{ 124{
125 /* XXX This presumably needs modification for 34XX */ 125 /* XXX This presumably needs modification for 34XX */
126 if (cpu_is_omap24xx() | cpu_is_omap34xx()) 126 if (cpu_is_omap24xx() || cpu_is_omap34xx())
127 return prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST) & 0x7f; 127 return prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST) & 0x7f;
128 if (cpu_is_omap44xx()) 128 if (cpu_is_omap44xx())
129 return prm_read_mod_reg(WKUP_MOD, OMAP4_RM_RSTST) & 0x7f; 129 return prm_read_mod_reg(WKUP_MOD, OMAP4_RM_RSTST) & 0x7f;
@@ -157,7 +157,7 @@ void omap_prcm_arch_reset(char mode, const char *cmd)
157 else 157 else
158 WARN_ON(1); 158 WARN_ON(1);
159 159
160 if (cpu_is_omap24xx() | cpu_is_omap34xx()) 160 if (cpu_is_omap24xx() || cpu_is_omap34xx())
161 prm_set_mod_reg_bits(OMAP_RST_DPLL3, prcm_offs, 161 prm_set_mod_reg_bits(OMAP_RST_DPLL3, prcm_offs,
162 OMAP2_RM_RSTCTRL); 162 OMAP2_RM_RSTCTRL);
163 if (cpu_is_omap44xx()) 163 if (cpu_is_omap44xx())
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index da77930480e9..3771254dfa81 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -115,7 +115,6 @@ static struct plat_serial8250_port serial_platform_data2[] = {
115 } 115 }
116}; 116};
117 117
118#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
119static struct plat_serial8250_port serial_platform_data3[] = { 118static struct plat_serial8250_port serial_platform_data3[] = {
120 { 119 {
121 .irq = 70, 120 .irq = 70,
@@ -128,23 +127,12 @@ static struct plat_serial8250_port serial_platform_data3[] = {
128 } 127 }
129}; 128};
130 129
131static inline void omap2_set_globals_uart4(struct omap_globals *omap2_globals)
132{
133 serial_platform_data3[0].mapbase = omap2_globals->uart4_phys;
134}
135#else
136static inline void omap2_set_globals_uart4(struct omap_globals *omap2_globals)
137{
138}
139#endif
140
141void __init omap2_set_globals_uart(struct omap_globals *omap2_globals) 130void __init omap2_set_globals_uart(struct omap_globals *omap2_globals)
142{ 131{
143 serial_platform_data0[0].mapbase = omap2_globals->uart1_phys; 132 serial_platform_data0[0].mapbase = omap2_globals->uart1_phys;
144 serial_platform_data1[0].mapbase = omap2_globals->uart2_phys; 133 serial_platform_data1[0].mapbase = omap2_globals->uart2_phys;
145 serial_platform_data2[0].mapbase = omap2_globals->uart3_phys; 134 serial_platform_data2[0].mapbase = omap2_globals->uart3_phys;
146 if (cpu_is_omap3630() || cpu_is_omap44xx()) 135 serial_platform_data3[0].mapbase = omap2_globals->uart4_phys;
147 omap2_set_globals_uart4(omap2_globals);
148} 136}
149 137
150static inline unsigned int __serial_read_reg(struct uart_port *up, 138static inline unsigned int __serial_read_reg(struct uart_port *up,
@@ -550,7 +538,7 @@ static ssize_t sleep_timeout_store(struct device *dev,
550 unsigned int value; 538 unsigned int value;
551 539
552 if (sscanf(buf, "%u", &value) != 1) { 540 if (sscanf(buf, "%u", &value) != 1) {
553 printk(KERN_ERR "sleep_timeout_store: Invalid value\n"); 541 dev_err(dev, "sleep_timeout_store: Invalid value\n");
554 return -EINVAL; 542 return -EINVAL;
555 } 543 }
556 544
@@ -664,27 +652,33 @@ void __init omap_serial_early_init(void)
664 struct device *dev = &pdev->dev; 652 struct device *dev = &pdev->dev;
665 struct plat_serial8250_port *p = dev->platform_data; 653 struct plat_serial8250_port *p = dev->platform_data;
666 654
655 /* Don't map zero-based physical address */
656 if (p->mapbase == 0) {
657 dev_warn(dev, "no physical address for uart#%d,"
658 " so skipping early_init...\n", i);
659 continue;
660 }
667 /* 661 /*
668 * Module 4KB + L4 interconnect 4KB 662 * Module 4KB + L4 interconnect 4KB
669 * Static mapping, never released 663 * Static mapping, never released
670 */ 664 */
671 p->membase = ioremap(p->mapbase, SZ_8K); 665 p->membase = ioremap(p->mapbase, SZ_8K);
672 if (!p->membase) { 666 if (!p->membase) {
673 printk(KERN_ERR "ioremap failed for uart%i\n", i + 1); 667 dev_err(dev, "ioremap failed for uart%i\n", i + 1);
674 continue; 668 continue;
675 } 669 }
676 670
677 sprintf(name, "uart%d_ick", i + 1); 671 sprintf(name, "uart%d_ick", i + 1);
678 uart->ick = clk_get(NULL, name); 672 uart->ick = clk_get(NULL, name);
679 if (IS_ERR(uart->ick)) { 673 if (IS_ERR(uart->ick)) {
680 printk(KERN_ERR "Could not get uart%d_ick\n", i + 1); 674 dev_err(dev, "Could not get uart%d_ick\n", i + 1);
681 uart->ick = NULL; 675 uart->ick = NULL;
682 } 676 }
683 677
684 sprintf(name, "uart%d_fck", i+1); 678 sprintf(name, "uart%d_fck", i+1);
685 uart->fck = clk_get(NULL, name); 679 uart->fck = clk_get(NULL, name);
686 if (IS_ERR(uart->fck)) { 680 if (IS_ERR(uart->fck)) {
687 printk(KERN_ERR "Could not get uart%d_fck\n", i + 1); 681 dev_err(dev, "Could not get uart%d_fck\n", i + 1);
688 uart->fck = NULL; 682 uart->fck = NULL;
689 } 683 }
690 684
@@ -727,6 +721,13 @@ void __init omap_serial_init_port(int port)
727 pdev = &uart->pdev; 721 pdev = &uart->pdev;
728 dev = &pdev->dev; 722 dev = &pdev->dev;
729 723
724 /* Don't proceed if there's no clocks available */
725 if (unlikely(!uart->ick || !uart->fck)) {
726 WARN(1, "%s: can't init uart%d, no clocks available\n",
727 kobject_name(&dev->kobj), port);
728 return;
729 }
730
730 omap_uart_enable_clocks(uart); 731 omap_uart_enable_clocks(uart);
731 732
732 omap_uart_reset(uart); 733 omap_uart_reset(uart);
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c
index 8bca4dea6dfa..f55fa1044f72 100644
--- a/arch/arm/mm/copypage-v6.c
+++ b/arch/arm/mm/copypage-v6.c
@@ -41,14 +41,7 @@ static void v6_copy_user_highpage_nonaliasing(struct page *to,
41 kfrom = kmap_atomic(from, KM_USER0); 41 kfrom = kmap_atomic(from, KM_USER0);
42 kto = kmap_atomic(to, KM_USER1); 42 kto = kmap_atomic(to, KM_USER1);
43 copy_page(kto, kfrom); 43 copy_page(kto, kfrom);
44#ifdef CONFIG_HIGHMEM 44 __cpuc_flush_dcache_area(kto, PAGE_SIZE);
45 /*
46 * kmap_atomic() doesn't set the page virtual address, and
47 * kunmap_atomic() takes care of cache flushing already.
48 */
49 if (page_address(to) != NULL)
50#endif
51 __cpuc_flush_dcache_area(kto, PAGE_SIZE);
52 kunmap_atomic(kto, KM_USER1); 45 kunmap_atomic(kto, KM_USER1);
53 kunmap_atomic(kfrom, KM_USER0); 46 kunmap_atomic(kfrom, KM_USER0);
54} 47}
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 1351edc0b26f..13fa536d82e6 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -464,6 +464,11 @@ static void dma_cache_maint_page(struct page *page, unsigned long offset,
464 vaddr += offset; 464 vaddr += offset;
465 op(vaddr, len, dir); 465 op(vaddr, len, dir);
466 kunmap_high(page); 466 kunmap_high(page);
467 } else if (cache_is_vipt()) {
468 pte_t saved_pte;
469 vaddr = kmap_high_l1_vipt(page, &saved_pte);
470 op(vaddr + offset, len, dir);
471 kunmap_high_l1_vipt(page, saved_pte);
467 } 472 }
468 } else { 473 } else {
469 vaddr = page_address(page) + offset; 474 vaddr = page_address(page) + offset;
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index e34f095e2090..c6844cb9b508 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -13,6 +13,7 @@
13 13
14#include <asm/cacheflush.h> 14#include <asm/cacheflush.h>
15#include <asm/cachetype.h> 15#include <asm/cachetype.h>
16#include <asm/highmem.h>
16#include <asm/smp_plat.h> 17#include <asm/smp_plat.h>
17#include <asm/system.h> 18#include <asm/system.h>
18#include <asm/tlbflush.h> 19#include <asm/tlbflush.h>
@@ -152,21 +153,25 @@ void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
152 153
153void __flush_dcache_page(struct address_space *mapping, struct page *page) 154void __flush_dcache_page(struct address_space *mapping, struct page *page)
154{ 155{
155 void *addr = page_address(page);
156
157 /* 156 /*
158 * Writeback any data associated with the kernel mapping of this 157 * Writeback any data associated with the kernel mapping of this
159 * page. This ensures that data in the physical page is mutually 158 * page. This ensures that data in the physical page is mutually
160 * coherent with the kernels mapping. 159 * coherent with the kernels mapping.
161 */ 160 */
162#ifdef CONFIG_HIGHMEM 161 if (!PageHighMem(page)) {
163 /* 162 __cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);
164 * kmap_atomic() doesn't set the page virtual address, and 163 } else {
165 * kunmap_atomic() takes care of cache flushing already. 164 void *addr = kmap_high_get(page);
166 */ 165 if (addr) {
167 if (addr) 166 __cpuc_flush_dcache_area(addr, PAGE_SIZE);
168#endif 167 kunmap_high(page);
169 __cpuc_flush_dcache_area(addr, PAGE_SIZE); 168 } else if (cache_is_vipt()) {
169 pte_t saved_pte;
170 addr = kmap_high_l1_vipt(page, &saved_pte);
171 __cpuc_flush_dcache_area(addr, PAGE_SIZE);
172 kunmap_high_l1_vipt(page, saved_pte);
173 }
174 }
170 175
171 /* 176 /*
172 * If this is a page cache page, and we have an aliasing VIPT cache, 177 * If this is a page cache page, and we have an aliasing VIPT cache,
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c
index 2be1ec7c1b41..77b030f5ec09 100644
--- a/arch/arm/mm/highmem.c
+++ b/arch/arm/mm/highmem.c
@@ -79,7 +79,8 @@ void kunmap_atomic(void *kvaddr, enum km_type type)
79 unsigned int idx = type + KM_TYPE_NR * smp_processor_id(); 79 unsigned int idx = type + KM_TYPE_NR * smp_processor_id();
80 80
81 if (kvaddr >= (void *)FIXADDR_START) { 81 if (kvaddr >= (void *)FIXADDR_START) {
82 __cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE); 82 if (cache_is_vivt())
83 __cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE);
83#ifdef CONFIG_DEBUG_HIGHMEM 84#ifdef CONFIG_DEBUG_HIGHMEM
84 BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); 85 BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
85 set_pte_ext(TOP_PTE(vaddr), __pte(0), 0); 86 set_pte_ext(TOP_PTE(vaddr), __pte(0), 0);
@@ -124,3 +125,87 @@ struct page *kmap_atomic_to_page(const void *ptr)
124 pte = TOP_PTE(vaddr); 125 pte = TOP_PTE(vaddr);
125 return pte_page(*pte); 126 return pte_page(*pte);
126} 127}
128
129#ifdef CONFIG_CPU_CACHE_VIPT
130
131#include <linux/percpu.h>
132
133/*
134 * The VIVT cache of a highmem page is always flushed before the page
135 * is unmapped. Hence unmapped highmem pages need no cache maintenance
136 * in that case.
137 *
138 * However unmapped pages may still be cached with a VIPT cache, and
139 * it is not possible to perform cache maintenance on them using physical
140 * addresses unfortunately. So we have no choice but to set up a temporary
141 * virtual mapping for that purpose.
142 *
143 * Yet this VIPT cache maintenance may be triggered from DMA support
144 * functions which are possibly called from interrupt context. As we don't
145 * want to keep interrupt disabled all the time when such maintenance is
146 * taking place, we therefore allow for some reentrancy by preserving and
147 * restoring the previous fixmap entry before the interrupted context is
148 * resumed. If the reentrancy depth is 0 then there is no need to restore
149 * the previous fixmap, and leaving the current one in place allow it to
150 * be reused the next time without a TLB flush (common with DMA).
151 */
152
153static DEFINE_PER_CPU(int, kmap_high_l1_vipt_depth);
154
155void *kmap_high_l1_vipt(struct page *page, pte_t *saved_pte)
156{
157 unsigned int idx, cpu = smp_processor_id();
158 int *depth = &per_cpu(kmap_high_l1_vipt_depth, cpu);
159 unsigned long vaddr, flags;
160 pte_t pte, *ptep;
161
162 idx = KM_L1_CACHE + KM_TYPE_NR * cpu;
163 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
164 ptep = TOP_PTE(vaddr);
165 pte = mk_pte(page, kmap_prot);
166
167 if (!in_interrupt())
168 preempt_disable();
169
170 raw_local_irq_save(flags);
171 (*depth)++;
172 if (pte_val(*ptep) == pte_val(pte)) {
173 *saved_pte = pte;
174 } else {
175 *saved_pte = *ptep;
176 set_pte_ext(ptep, pte, 0);
177 local_flush_tlb_kernel_page(vaddr);
178 }
179 raw_local_irq_restore(flags);
180
181 return (void *)vaddr;
182}
183
184void kunmap_high_l1_vipt(struct page *page, pte_t saved_pte)
185{
186 unsigned int idx, cpu = smp_processor_id();
187 int *depth = &per_cpu(kmap_high_l1_vipt_depth, cpu);
188 unsigned long vaddr, flags;
189 pte_t pte, *ptep;
190
191 idx = KM_L1_CACHE + KM_TYPE_NR * cpu;
192 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
193 ptep = TOP_PTE(vaddr);
194 pte = mk_pte(page, kmap_prot);
195
196 BUG_ON(pte_val(*ptep) != pte_val(pte));
197 BUG_ON(*depth <= 0);
198
199 raw_local_irq_save(flags);
200 (*depth)--;
201 if (*depth != 0 && pte_val(pte) != pte_val(saved_pte)) {
202 set_pte_ext(ptep, saved_pte, 0);
203 local_flush_tlb_kernel_page(vaddr);
204 }
205 raw_local_irq_restore(flags);
206
207 if (!in_interrupt())
208 preempt_enable();
209}
210
211#endif /* CONFIG_CPU_CACHE_VIPT */
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 4223d086aa17..241c24a1c18f 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -1054,10 +1054,12 @@ void setup_mm_for_reboot(char mode)
1054 pgd_t *pgd; 1054 pgd_t *pgd;
1055 int i; 1055 int i;
1056 1056
1057 if (current->mm && current->mm->pgd) 1057 /*
1058 pgd = current->mm->pgd; 1058 * We need to access to user-mode page tables here. For kernel threads
1059 else 1059 * we don't have any user-mode mappings so we use the context that we
1060 pgd = init_mm.pgd; 1060 * "borrowed".
1061 */
1062 pgd = current->active_mm->pgd;
1061 1063
1062 base_pmdval = PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT; 1064 base_pmdval = PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT;
1063 if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) 1065 if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 088c1a03b946..f12f0e39ddf2 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -44,9 +44,6 @@
44 44
45#define NO_LENGTH_CHECK 0xffffffff 45#define NO_LENGTH_CHECK 0xffffffff
46 46
47unsigned char omap_bootloader_tag[512];
48int omap_bootloader_tag_len;
49
50struct omap_board_config_kernel *omap_board_config; 47struct omap_board_config_kernel *omap_board_config;
51int omap_board_config_size; 48int omap_board_config_size;
52 49
@@ -100,10 +97,17 @@ EXPORT_SYMBOL(omap_get_var_config);
100 97
101#include <linux/clocksource.h> 98#include <linux/clocksource.h>
102 99
100/*
101 * offset_32k holds the init time counter value. It is then subtracted
102 * from every counter read to achieve a counter that counts time from the
103 * kernel boot (needed for sched_clock()).
104 */
105static u32 offset_32k __read_mostly;
106
103#ifdef CONFIG_ARCH_OMAP16XX 107#ifdef CONFIG_ARCH_OMAP16XX
104static cycle_t omap16xx_32k_read(struct clocksource *cs) 108static cycle_t omap16xx_32k_read(struct clocksource *cs)
105{ 109{
106 return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED); 110 return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k;
107} 111}
108#else 112#else
109#define omap16xx_32k_read NULL 113#define omap16xx_32k_read NULL
@@ -112,7 +116,7 @@ static cycle_t omap16xx_32k_read(struct clocksource *cs)
112#ifdef CONFIG_ARCH_OMAP2420 116#ifdef CONFIG_ARCH_OMAP2420
113static cycle_t omap2420_32k_read(struct clocksource *cs) 117static cycle_t omap2420_32k_read(struct clocksource *cs)
114{ 118{
115 return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10); 119 return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k;
116} 120}
117#else 121#else
118#define omap2420_32k_read NULL 122#define omap2420_32k_read NULL
@@ -121,7 +125,7 @@ static cycle_t omap2420_32k_read(struct clocksource *cs)
121#ifdef CONFIG_ARCH_OMAP2430 125#ifdef CONFIG_ARCH_OMAP2430
122static cycle_t omap2430_32k_read(struct clocksource *cs) 126static cycle_t omap2430_32k_read(struct clocksource *cs)
123{ 127{
124 return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10); 128 return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k;
125} 129}
126#else 130#else
127#define omap2430_32k_read NULL 131#define omap2430_32k_read NULL
@@ -130,7 +134,7 @@ static cycle_t omap2430_32k_read(struct clocksource *cs)
130#ifdef CONFIG_ARCH_OMAP3 134#ifdef CONFIG_ARCH_OMAP3
131static cycle_t omap34xx_32k_read(struct clocksource *cs) 135static cycle_t omap34xx_32k_read(struct clocksource *cs)
132{ 136{
133 return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10); 137 return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k;
134} 138}
135#else 139#else
136#define omap34xx_32k_read NULL 140#define omap34xx_32k_read NULL
@@ -139,7 +143,7 @@ static cycle_t omap34xx_32k_read(struct clocksource *cs)
139#ifdef CONFIG_ARCH_OMAP4 143#ifdef CONFIG_ARCH_OMAP4
140static cycle_t omap44xx_32k_read(struct clocksource *cs) 144static cycle_t omap44xx_32k_read(struct clocksource *cs)
141{ 145{
142 return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10); 146 return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k;
143} 147}
144#else 148#else
145#define omap44xx_32k_read NULL 149#define omap44xx_32k_read NULL
@@ -227,6 +231,8 @@ static int __init omap_init_clocksource_32k(void)
227 clocksource_32k.mult = clocksource_hz2mult(32768, 231 clocksource_32k.mult = clocksource_hz2mult(32768,
228 clocksource_32k.shift); 232 clocksource_32k.shift);
229 233
234 offset_32k = clocksource_32k.read(&clocksource_32k);
235
230 if (clocksource_register(&clocksource_32k)) 236 if (clocksource_register(&clocksource_32k))
231 printk(err, clocksource_32k.name); 237 printk(err, clocksource_32k.name);
232 } 238 }
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 5c6c342c53f5..1d959965ff52 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -937,6 +937,15 @@ void omap_start_dma(int lch)
937{ 937{
938 u32 l; 938 u32 l;
939 939
940 /*
941 * The CPC/CDAC register needs to be initialized to zero
942 * before starting dma transfer.
943 */
944 if (cpu_is_omap15xx())
945 dma_write(0, CPC(lch));
946 else
947 dma_write(0, CDAC(lch));
948
940 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) { 949 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
941 int next_lch, cur_lch; 950 int next_lch, cur_lch;
942 char dma_chan_link_map[OMAP_DMA4_LOGICAL_DMA_CH_COUNT]; 951 char dma_chan_link_map[OMAP_DMA4_LOGICAL_DMA_CH_COUNT];
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 76a347b3ce07..45a225d09125 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -798,7 +798,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
798 case METHOD_MPUIO: 798 case METHOD_MPUIO:
799 reg += OMAP_MPUIO_GPIO_INT_EDGE; 799 reg += OMAP_MPUIO_GPIO_INT_EDGE;
800 l = __raw_readl(reg); 800 l = __raw_readl(reg);
801 if (trigger & IRQ_TYPE_EDGE_BOTH) 801 if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
802 bank->toggle_mask |= 1 << gpio; 802 bank->toggle_mask |= 1 << gpio;
803 if (trigger & IRQ_TYPE_EDGE_RISING) 803 if (trigger & IRQ_TYPE_EDGE_RISING)
804 l |= 1 << gpio; 804 l |= 1 << gpio;
@@ -812,7 +812,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
812 case METHOD_GPIO_1510: 812 case METHOD_GPIO_1510:
813 reg += OMAP1510_GPIO_INT_CONTROL; 813 reg += OMAP1510_GPIO_INT_CONTROL;
814 l = __raw_readl(reg); 814 l = __raw_readl(reg);
815 if (trigger & IRQ_TYPE_EDGE_BOTH) 815 if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
816 bank->toggle_mask |= 1 << gpio; 816 bank->toggle_mask |= 1 << gpio;
817 if (trigger & IRQ_TYPE_EDGE_RISING) 817 if (trigger & IRQ_TYPE_EDGE_RISING)
818 l |= 1 << gpio; 818 l |= 1 << gpio;
@@ -846,7 +846,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
846 case METHOD_GPIO_7XX: 846 case METHOD_GPIO_7XX:
847 reg += OMAP7XX_GPIO_INT_CONTROL; 847 reg += OMAP7XX_GPIO_INT_CONTROL;
848 l = __raw_readl(reg); 848 l = __raw_readl(reg);
849 if (trigger & IRQ_TYPE_EDGE_BOTH) 849 if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
850 bank->toggle_mask |= 1 << gpio; 850 bank->toggle_mask |= 1 << gpio;
851 if (trigger & IRQ_TYPE_EDGE_RISING) 851 if (trigger & IRQ_TYPE_EDGE_RISING)
852 l |= 1 << gpio; 852 l |= 1 << gpio;
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index b65088a869e9..401701977dbb 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -345,8 +345,6 @@
345#define INT_34XX_MMC3_IRQ 94 345#define INT_34XX_MMC3_IRQ 94
346#define INT_34XX_GPT12_IRQ 95 346#define INT_34XX_GPT12_IRQ 95
347 347
348#define INT_34XX_BENCH_MPU_EMUL 3
349
350#define INT_35XX_HECC0_IRQ 24 348#define INT_35XX_HECC0_IRQ 24
351#define INT_35XX_HECC1_IRQ 28 349#define INT_35XX_HECC1_IRQ 28
352#define INT_35XX_EMAC_C0_RXTHRESH_IRQ 67 350#define INT_35XX_EMAC_C0_RXTHRESH_IRQ 67
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index 39748354ce45..7de903d7c1ce 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -59,7 +59,7 @@
59#define OMAP44XX_MCBSP1_BASE 0x49022000 59#define OMAP44XX_MCBSP1_BASE 0x49022000
60#define OMAP44XX_MCBSP2_BASE 0x49024000 60#define OMAP44XX_MCBSP2_BASE 0x49024000
61#define OMAP44XX_MCBSP3_BASE 0x49026000 61#define OMAP44XX_MCBSP3_BASE 0x49026000
62#define OMAP44XX_MCBSP4_BASE 0x48074000 62#define OMAP44XX_MCBSP4_BASE 0x48096000
63 63
64#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 64#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
65 65
diff --git a/arch/arm/plat-omap/include/plat/nand.h b/arch/arm/plat-omap/include/plat/nand.h
index 6ba88d2630d9..f8efd5466b1d 100644
--- a/arch/arm/plat-omap/include/plat/nand.h
+++ b/arch/arm/plat-omap/include/plat/nand.h
@@ -29,4 +29,11 @@ struct omap_nand_platform_data {
29/* size (4 KiB) for IO mapping */ 29/* size (4 KiB) for IO mapping */
30#define NAND_IO_SIZE SZ_4K 30#define NAND_IO_SIZE SZ_4K
31 31
32#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
32extern int gpmc_nand_init(struct omap_nand_platform_data *d); 33extern int gpmc_nand_init(struct omap_nand_platform_data *d);
34#else
35static inline int gpmc_nand_init(struct omap_nand_platform_data *d)
36{
37 return 0;
38}
39#endif
diff --git a/arch/arm/plat-omap/include/plat/omap44xx.h b/arch/arm/plat-omap/include/plat/omap44xx.h
index 2302474a3748..b3ef1a7f53cc 100644
--- a/arch/arm/plat-omap/include/plat/omap44xx.h
+++ b/arch/arm/plat-omap/include/plat/omap44xx.h
@@ -32,7 +32,7 @@
32#define OMAP4430_PRM_BASE 0x4a306000 32#define OMAP4430_PRM_BASE 0x4a306000
33#define OMAP44XX_GPMC_BASE 0x50000000 33#define OMAP44XX_GPMC_BASE 0x50000000
34#define OMAP443X_SCM_BASE 0x4a002000 34#define OMAP443X_SCM_BASE 0x4a002000
35#define OMAP443X_CTRL_BASE OMAP443X_SCM_BASE 35#define OMAP443X_CTRL_BASE 0x4a100000
36#define OMAP44XX_IC_BASE 0x48200000 36#define OMAP44XX_IC_BASE 0x48200000
37#define OMAP44XX_IVA_INTC_BASE 0x40000000 37#define OMAP44XX_IVA_INTC_BASE 0x40000000
38#define IRQ_SIR_IRQ 0x0040 38#define IRQ_SIR_IRQ 0x0040
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 440b4164f2f6..36d6ea56ab51 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -294,8 +294,8 @@ struct omap_hwmod_class_sysconfig {
294 u16 rev_offs; 294 u16 rev_offs;
295 u16 sysc_offs; 295 u16 sysc_offs;
296 u16 syss_offs; 296 u16 syss_offs;
297 u16 sysc_flags;
297 u8 idlemodes; 298 u8 idlemodes;
298 u8 sysc_flags;
299 u8 clockact; 299 u8 clockact;
300 struct omap_hwmod_sysc_fields *sysc_fields; 300 struct omap_hwmod_sysc_fields *sysc_fields;
301}; 301};
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index a420cb949328..315a540c7ce5 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -428,26 +428,6 @@ static void vfp_pm_init(void)
428static inline void vfp_pm_init(void) { } 428static inline void vfp_pm_init(void) { }
429#endif /* CONFIG_PM */ 429#endif /* CONFIG_PM */
430 430
431/*
432 * Synchronise the hardware VFP state of a thread other than current with the
433 * saved one. This function is used by the ptrace mechanism.
434 */
435#ifdef CONFIG_SMP
436void vfp_sync_hwstate(struct thread_info *thread)
437{
438}
439
440void vfp_flush_hwstate(struct thread_info *thread)
441{
442 /*
443 * On SMP systems, the VFP state is automatically saved at every
444 * context switch. We mark the thread VFP state as belonging to a
445 * non-existent CPU so that the saved one will be reloaded when
446 * needed.
447 */
448 thread->vfpstate.hard.cpu = NR_CPUS;
449}
450#else
451void vfp_sync_hwstate(struct thread_info *thread) 431void vfp_sync_hwstate(struct thread_info *thread)
452{ 432{
453 unsigned int cpu = get_cpu(); 433 unsigned int cpu = get_cpu();
@@ -490,9 +470,18 @@ void vfp_flush_hwstate(struct thread_info *thread)
490 last_VFP_context[cpu] = NULL; 470 last_VFP_context[cpu] = NULL;
491 } 471 }
492 472
473#ifdef CONFIG_SMP
474 /*
475 * For SMP we still have to take care of the case where the thread
476 * migrates to another CPU and then back to the original CPU on which
477 * the last VFP user is still the same thread. Mark the thread VFP
478 * state as belonging to a non-existent CPU so that the saved one will
479 * be reloaded in the above case.
480 */
481 thread->vfpstate.hard.cpu = NR_CPUS;
482#endif
493 put_cpu(); 483 put_cpu();
494} 484}
495#endif
496 485
497#include <linux/smp.h> 486#include <linux/smp.h>
498 487