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-rw-r--r--arch/arm/Kconfig50
-rw-r--r--arch/arm/Kconfig.debug2
-rw-r--r--arch/arm/Makefile14
-rw-r--r--arch/arm/configs/s3c6400_defconfig360
-rw-r--r--arch/arm/configs/s5p6442_defconfig883
-rw-r--r--arch/arm/configs/s5pc110_defconfig894
-rw-r--r--arch/arm/configs/s5pv210_defconfig894
-rw-r--r--arch/arm/mach-s3c2410/dma.c2
-rw-r--r--arch/arm/mach-s3c2410/include/mach/pm-core.h (renamed from arch/arm/plat-s3c24xx/include/plat/pm-core.h)2
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-gpio.h10
-rw-r--r--arch/arm/mach-s3c2410/include/mach/timex.h (renamed from arch/arm/plat-s3c/include/mach/timex.h)2
-rw-r--r--arch/arm/mach-s3c2410/include/mach/vmalloc.h (renamed from arch/arm/plat-s3c/include/mach/vmalloc.h)2
-rw-r--r--arch/arm/mach-s3c2412/dma.c2
-rw-r--r--arch/arm/mach-s3c2440/Kconfig74
-rw-r--r--arch/arm/mach-s3c2440/Makefile11
-rw-r--r--arch/arm/mach-s3c2440/dma.c2
-rw-r--r--arch/arm/mach-s3c2440/dsc.c2
-rw-r--r--arch/arm/mach-s3c2440/include/mach/gta02.h (renamed from arch/arm/mach-s3c2442/include/mach/gta02.h)0
-rw-r--r--arch/arm/mach-s3c2440/mach-gta02.c (renamed from arch/arm/mach-s3c2442/mach-gta02.c)0
-rw-r--r--arch/arm/mach-s3c2440/mach-nexcoder.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-smdk2440.c2
-rw-r--r--arch/arm/mach-s3c2440/s3c2440.c2
-rw-r--r--arch/arm/mach-s3c2440/s3c2442.c (renamed from arch/arm/mach-s3c2442/clock.c)16
-rw-r--r--arch/arm/mach-s3c2440/s3c244x-clock.c (renamed from arch/arm/plat-s3c24xx/s3c244x-clock.c)0
-rw-r--r--arch/arm/mach-s3c2440/s3c244x-irq.c (renamed from arch/arm/plat-s3c24xx/s3c244x-irq.c)0
-rw-r--r--arch/arm/mach-s3c2440/s3c244x.c (renamed from arch/arm/plat-s3c24xx/s3c244x.c)3
-rw-r--r--arch/arm/mach-s3c2442/Kconfig37
-rw-r--r--arch/arm/mach-s3c2442/Makefile18
-rw-r--r--arch/arm/mach-s3c2442/s3c2442.c34
-rw-r--r--arch/arm/mach-s3c2443/dma.c2
-rw-r--r--arch/arm/mach-s3c2443/mach-smdk2443.c10
-rw-r--r--arch/arm/mach-s3c24a0/include/mach/io.h (renamed from arch/arm/plat-s3c/include/mach/io.h)4
-rw-r--r--arch/arm/mach-s3c6400/Kconfig30
-rw-r--r--arch/arm/mach-s3c6400/Makefile23
-rw-r--r--arch/arm/mach-s3c6400/include/mach/dma.h70
-rw-r--r--arch/arm/mach-s3c6400/include/mach/irqs.h16
-rw-r--r--arch/arm/mach-s3c6400/include/mach/regs-clock.h16
-rw-r--r--arch/arm/mach-s3c6410/Makefile26
-rw-r--r--arch/arm/mach-s3c6410/setup-sdhci.c68
-rw-r--r--arch/arm/mach-s3c64xx/Kconfig (renamed from arch/arm/mach-s3c6410/Kconfig)87
-rw-r--r--arch/arm/mach-s3c64xx/Makefile (renamed from arch/arm/plat-s3c64xx/Makefile)54
-rw-r--r--arch/arm/mach-s3c64xx/Makefile.boot (renamed from arch/arm/mach-s3c6400/Makefile.boot)0
-rw-r--r--arch/arm/mach-s3c64xx/clock.c (renamed from arch/arm/plat-s3c64xx/s3c6400-clock.c)311
-rw-r--r--arch/arm/mach-s3c64xx/cpu.c (renamed from arch/arm/plat-s3c64xx/cpu.c)10
-rw-r--r--arch/arm/mach-s3c64xx/cpufreq.c (renamed from arch/arm/plat-s3c64xx/cpufreq.c)0
-rw-r--r--arch/arm/mach-s3c64xx/dev-adc.c (renamed from arch/arm/plat-s3c64xx/dev-adc.c)0
-rw-r--r--arch/arm/mach-s3c64xx/dev-audio.c (renamed from arch/arm/plat-s3c64xx/dev-audio.c)87
-rw-r--r--arch/arm/mach-s3c64xx/dev-rtc.c (renamed from arch/arm/plat-s3c64xx/dev-rtc.c)0
-rw-r--r--arch/arm/mach-s3c64xx/dev-spi.c (renamed from arch/arm/plat-s3c64xx/dev-spi.c)5
-rw-r--r--arch/arm/mach-s3c64xx/dev-uart.c (renamed from arch/arm/plat-s3c64xx/dev-uart.c)0
-rw-r--r--arch/arm/mach-s3c64xx/dma.c (renamed from arch/arm/plat-s3c64xx/dma.c)3
-rw-r--r--arch/arm/mach-s3c64xx/gpiolib.c (renamed from arch/arm/plat-s3c64xx/gpiolib.c)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/debug-macro.S (renamed from arch/arm/mach-s3c6400/include/mach/debug-macro.S)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/dma.h (renamed from arch/arm/plat-s3c64xx/include/plat/dma-plat.h)79
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/entry-macro.S (renamed from arch/arm/mach-s3c6400/include/mach/entry-macro.S)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h (renamed from arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/gpio.h (renamed from arch/arm/mach-s3c6400/include/mach/gpio.h)6
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/hardware.h (renamed from arch/arm/mach-s3c6400/include/mach/hardware.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/io.h18
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/irqs.h (renamed from arch/arm/plat-s3c64xx/include/plat/irqs.h)12
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/map.h (renamed from arch/arm/mach-s3c6400/include/mach/map.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/memory.h (renamed from arch/arm/mach-s3c6400/include/mach/memory.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/pll.h (renamed from arch/arm/plat-s3c64xx/include/plat/pll.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/pm-core.h (renamed from arch/arm/plat-s3c64xx/include/plat/pm-core.h)4
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/pwm-clock.h (renamed from arch/arm/mach-s3c6400/include/mach/pwm-clock.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-clock.h (renamed from arch/arm/plat-s3c64xx/include/plat/regs-clock.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-fb.h (renamed from arch/arm/mach-s3c6400/include/mach/regs-fb.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h (renamed from arch/arm/plat-s3c64xx/include/plat/regs-gpio-memport.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-gpio.h (renamed from arch/arm/plat-s3c64xx/include/plat/regs-gpio.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-irq.h (renamed from arch/arm/mach-s3c6400/include/mach/regs-irq.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-modem.h (renamed from arch/arm/plat-s3c64xx/include/plat/regs-modem.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-srom.h (renamed from arch/arm/plat-s3c64xx/include/plat/regs-srom.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-sys.h (renamed from arch/arm/plat-s3c64xx/include/plat/regs-sys.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-syscon-power.h (renamed from arch/arm/plat-s3c64xx/include/plat/regs-syscon-power.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/s3c6400.h (renamed from arch/arm/plat-s3c64xx/include/plat/s3c6400.h)6
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/s3c6410.h (renamed from arch/arm/plat-s3c64xx/include/plat/s3c6410.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/spi-clocks.h (renamed from arch/arm/plat-s3c64xx/include/plat/spi-clocks.h)2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/system.h (renamed from arch/arm/mach-s3c6400/include/mach/system.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/tick.h (renamed from arch/arm/mach-s3c6400/include/mach/tick.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/timex.h24
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/uncompress.h (renamed from arch/arm/mach-s3c6400/include/mach/uncompress.h)0
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/vmalloc.h20
-rw-r--r--arch/arm/mach-s3c64xx/irq-eint.c (renamed from arch/arm/plat-s3c64xx/irq-eint.c)2
-rw-r--r--arch/arm/mach-s3c64xx/irq-pm.c (renamed from arch/arm/plat-s3c64xx/irq-pm.c)2
-rw-r--r--arch/arm/mach-s3c64xx/irq.c (renamed from arch/arm/plat-s3c64xx/irq.c)0
-rw-r--r--arch/arm/mach-s3c64xx/mach-anw6410.c (renamed from arch/arm/mach-s3c6410/mach-anw6410.c)8
-rw-r--r--arch/arm/mach-s3c64xx/mach-hmt.c (renamed from arch/arm/mach-s3c6410/mach-hmt.c)2
-rw-r--r--arch/arm/mach-s3c64xx/mach-ncp.c (renamed from arch/arm/mach-s3c6410/mach-ncp.c)4
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6400.c (renamed from arch/arm/mach-s3c6400/mach-smdk6400.c)4
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6410.c (renamed from arch/arm/mach-s3c6410/mach-smdk6410.c)299
-rw-r--r--arch/arm/mach-s3c64xx/pm.c (renamed from arch/arm/plat-s3c64xx/pm.c)12
-rw-r--r--arch/arm/mach-s3c64xx/s3c6400.c (renamed from arch/arm/mach-s3c6400/s3c6400.c)11
-rw-r--r--arch/arm/mach-s3c64xx/s3c6410.c (renamed from arch/arm/mach-s3c6410/cpu.c)24
-rw-r--r--arch/arm/mach-s3c64xx/setup-fb-24bpp.c (renamed from arch/arm/plat-s3c64xx/setup-fb-24bpp.c)0
-rw-r--r--arch/arm/mach-s3c64xx/setup-i2c0.c (renamed from arch/arm/plat-s3c64xx/setup-i2c0.c)2
-rw-r--r--arch/arm/mach-s3c64xx/setup-i2c1.c (renamed from arch/arm/plat-s3c64xx/setup-i2c1.c)2
-rw-r--r--arch/arm/mach-s3c64xx/setup-sdhci-gpio.c (renamed from arch/arm/plat-s3c64xx/setup-sdhci-gpio.c)0
-rw-r--r--arch/arm/mach-s3c64xx/setup-sdhci.c (renamed from arch/arm/mach-s3c6400/setup-sdhci.c)15
-rw-r--r--arch/arm/mach-s3c64xx/sleep.S (renamed from arch/arm/plat-s3c64xx/sleep.S)6
-rw-r--r--arch/arm/mach-s5p6440/Kconfig2
-rw-r--r--arch/arm/mach-s5p6440/Makefile2
-rw-r--r--arch/arm/mach-s5p6440/clock.c (renamed from arch/arm/plat-s5p/s5p6440-clock.c)2
-rw-r--r--arch/arm/mach-s5p6440/gpio.c (renamed from arch/arm/mach-s5p6440/s5p6440-gpio.c)2
-rw-r--r--arch/arm/mach-s5p6440/include/mach/debug-macro.S4
-rw-r--r--arch/arm/mach-s5p6440/include/mach/io.h18
-rw-r--r--arch/arm/mach-s5p6440/include/mach/map.h65
-rw-r--r--arch/arm/mach-s5p6440/include/mach/regs-clock.h2
-rw-r--r--arch/arm/mach-s5p6440/include/mach/tick.h2
-rw-r--r--arch/arm/mach-s5p6440/include/mach/timex.h24
-rw-r--r--arch/arm/mach-s5p6440/include/mach/vmalloc.h17
-rw-r--r--arch/arm/mach-s5p6440/init.c (renamed from arch/arm/plat-s5p/s5p6440-init.c)4
-rw-r--r--arch/arm/mach-s5p6440/mach-smdk6440.c4
-rw-r--r--arch/arm/mach-s5p6442/Kconfig24
-rw-r--r--arch/arm/mach-s5p6442/Makefile19
-rw-r--r--arch/arm/mach-s5p6442/Makefile.boot2
-rw-r--r--arch/arm/mach-s5p6442/clock.c396
-rw-r--r--arch/arm/mach-s5p6442/cpu.c121
-rw-r--r--arch/arm/mach-s5p6442/include/mach/debug-macro.S36
-rw-r--r--arch/arm/mach-s5p6442/include/mach/entry-macro.S48
-rw-r--r--arch/arm/mach-s5p6442/include/mach/gpio.h123
-rw-r--r--arch/arm/mach-s5p6442/include/mach/hardware.h18
-rw-r--r--arch/arm/mach-s5p6442/include/mach/io.h17
-rw-r--r--arch/arm/mach-s5p6442/include/mach/irqs.h86
-rw-r--r--arch/arm/mach-s5p6442/include/mach/map.h58
-rw-r--r--arch/arm/mach-s5p6442/include/mach/memory.h19
-rw-r--r--arch/arm/mach-s5p6442/include/mach/pwm-clock.h69
-rw-r--r--arch/arm/mach-s5p6442/include/mach/regs-clock.h103
-rw-r--r--arch/arm/mach-s5p6442/include/mach/regs-irq.h19
-rw-r--r--arch/arm/mach-s5p6442/include/mach/system.h26
-rw-r--r--arch/arm/mach-s5p6442/include/mach/tick.h26
-rw-r--r--arch/arm/mach-s5p6442/include/mach/timex.h24
-rw-r--r--arch/arm/mach-s5p6442/include/mach/uncompress.h24
-rw-r--r--arch/arm/mach-s5p6442/include/mach/vmalloc.h17
-rw-r--r--arch/arm/mach-s5p6442/init.c44
-rw-r--r--arch/arm/mach-s5p6442/mach-smdk6442.c91
-rw-r--r--arch/arm/mach-s5pc100/include/mach/io.h18
-rw-r--r--arch/arm/mach-s5pc100/include/mach/timex.h24
-rw-r--r--arch/arm/mach-s5pc100/include/mach/vmalloc.h17
-rw-r--r--arch/arm/mach-s5pv210/Kconfig40
-rw-r--r--arch/arm/mach-s5pv210/Makefile20
-rw-r--r--arch/arm/mach-s5pv210/Makefile.boot2
-rw-r--r--arch/arm/mach-s5pv210/clock.c454
-rw-r--r--arch/arm/mach-s5pv210/cpu.c126
-rw-r--r--arch/arm/mach-s5pv210/include/mach/debug-macro.S42
-rw-r--r--arch/arm/mach-s5pv210/include/mach/entry-macro.S54
-rw-r--r--arch/arm/mach-s5pv210/include/mach/gpio.h129
-rw-r--r--arch/arm/mach-s5pv210/include/mach/hardware.h18
-rw-r--r--arch/arm/mach-s5pv210/include/mach/io.h26
-rw-r--r--arch/arm/mach-s5pv210/include/mach/irqs.h146
-rw-r--r--arch/arm/mach-s5pv210/include/mach/map.h65
-rw-r--r--arch/arm/mach-s5pv210/include/mach/memory.h23
-rw-r--r--arch/arm/mach-s5pv210/include/mach/pwm-clock.h69
-rw-r--r--arch/arm/mach-s5pv210/include/mach/regs-clock.h169
-rw-r--r--arch/arm/mach-s5pv210/include/mach/regs-irq.h19
-rw-r--r--arch/arm/mach-s5pv210/include/mach/system.h26
-rw-r--r--arch/arm/mach-s5pv210/include/mach/tick.h26
-rw-r--r--arch/arm/mach-s5pv210/include/mach/timex.h29
-rw-r--r--arch/arm/mach-s5pv210/include/mach/uncompress.h24
-rw-r--r--arch/arm/mach-s5pv210/include/mach/vmalloc.h22
-rw-r--r--arch/arm/mach-s5pv210/init.c44
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkc110.c98
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkv210.c98
-rw-r--r--arch/arm/plat-s3c/Kconfig96
-rw-r--r--arch/arm/plat-s3c/Makefile23
-rw-r--r--arch/arm/plat-s3c24xx/Kconfig53
-rw-r--r--arch/arm/plat-s3c24xx/Makefile7
-rw-r--r--arch/arm/plat-s3c24xx/cpu.c4
-rw-r--r--arch/arm/plat-s3c24xx/devs.c18
-rw-r--r--arch/arm/plat-s3c24xx/dma.c2
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/audio-simtec.h (renamed from arch/arm/plat-s3c/include/plat/audio-simtec.h)2
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/s3c2440.h17
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/s3c2442.h17
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/s3c244x.h (renamed from arch/arm/plat-s3c24xx/s3c244x.h)14
-rw-r--r--arch/arm/plat-s3c64xx/Kconfig75
-rw-r--r--arch/arm/plat-s3c64xx/clock.c304
-rw-r--r--arch/arm/plat-s3c64xx/s3c6400-init.c29
-rw-r--r--arch/arm/plat-s5p/Kconfig19
-rw-r--r--arch/arm/plat-s5p/Makefile5
-rw-r--r--arch/arm/plat-s5p/clock.c13
-rw-r--r--arch/arm/plat-s5p/cpu.c39
-rw-r--r--arch/arm/plat-s5p/dev-uart.c2
-rw-r--r--arch/arm/plat-s5p/include/plat/irqs.h9
-rw-r--r--arch/arm/plat-s5p/include/plat/map-s5p.h34
-rw-r--r--arch/arm/plat-s5p/include/plat/s5p-clock.h2
-rw-r--r--arch/arm/plat-s5p/include/plat/s5p6442.h33
-rw-r--r--arch/arm/plat-s5p/include/plat/s5pv210.h33
-rw-r--r--arch/arm/plat-s5p/irq.c7
-rw-r--r--arch/arm/plat-samsung/Kconfig66
-rw-r--r--arch/arm/plat-samsung/Makefile7
-rw-r--r--arch/arm/plat-samsung/adc.c26
-rw-r--r--arch/arm/plat-samsung/clock.c20
-rw-r--r--arch/arm/plat-samsung/dev-usb-hsotg.c7
-rw-r--r--arch/arm/plat-samsung/dma.c (renamed from arch/arm/plat-s3c/dma.c)4
-rw-r--r--arch/arm/plat-samsung/include/plat/audio.h (renamed from arch/arm/plat-s3c/include/plat/audio.h)10
-rw-r--r--arch/arm/plat-samsung/include/plat/clock.h1
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu-freq.h (renamed from arch/arm/plat-s3c/include/plat/cpu-freq.h)2
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu.h (renamed from arch/arm/plat-s3c/include/plat/cpu.h)2
-rw-r--r--arch/arm/plat-samsung/include/plat/debug-macro.S (renamed from arch/arm/plat-s3c/include/plat/debug-macro.S)14
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h (renamed from arch/arm/plat-s3c/include/plat/devs.h)5
-rw-r--r--arch/arm/plat-samsung/include/plat/dma-s3c24xx.h (renamed from arch/arm/plat-s3c24xx/include/plat/dma-plat.h)4
-rw-r--r--arch/arm/plat-samsung/include/plat/dma.h (renamed from arch/arm/plat-s3c/include/plat/dma.h)2
-rw-r--r--arch/arm/plat-samsung/include/plat/fb.h (renamed from arch/arm/plat-s3c/include/plat/fb.h)2
-rw-r--r--arch/arm/plat-samsung/include/plat/map-base.h (renamed from arch/arm/plat-s3c/include/plat/map-base.h)0
-rw-r--r--arch/arm/plat-samsung/include/plat/pm.h (renamed from arch/arm/plat-s3c/include/plat/pm.h)2
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-adc.h1
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-fb-v4.h (renamed from arch/arm/plat-s3c/include/plat/regs-fb-v4.h)2
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-fb.h (renamed from arch/arm/plat-s3c/include/plat/regs-fb.h)2
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-serial.h (renamed from arch/arm/plat-s3c/include/plat/regs-serial.h)2
-rw-r--r--arch/arm/plat-samsung/include/plat/sdhci.h43
-rw-r--r--arch/arm/plat-samsung/include/plat/uncompress.h (renamed from arch/arm/plat-s3c/include/plat/uncompress.h)2
-rw-r--r--arch/arm/plat-samsung/include/plat/usb-control.h (renamed from arch/arm/plat-s3c/include/plat/usb-control.h)2
-rw-r--r--arch/arm/plat-samsung/init.c (renamed from arch/arm/plat-s3c/init.c)0
-rw-r--r--arch/arm/plat-samsung/pm.c (renamed from arch/arm/plat-s3c/pm.c)2
-rw-r--r--arch/arm/plat-samsung/time.c (renamed from arch/arm/plat-s3c/time.c)2
227 files changed, 7766 insertions, 1449 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ee74c3a03883..14b03684ba86 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -631,9 +631,24 @@ config ARCH_S3C2410
631 631
632config ARCH_S3C64XX 632config ARCH_S3C64XX
633 bool "Samsung S3C64XX" 633 bool "Samsung S3C64XX"
634 select PLAT_SAMSUNG
635 select CPU_V6
634 select GENERIC_GPIO 636 select GENERIC_GPIO
637 select ARM_VIC
635 select HAVE_CLK 638 select HAVE_CLK
639 select NO_IOPORT
636 select ARCH_HAS_CPUFREQ 640 select ARCH_HAS_CPUFREQ
641 select ARCH_REQUIRE_GPIOLIB
642 select SAMSUNG_CLKSRC
643 select SAMSUNG_IRQ_VIC_TIMER
644 select SAMSUNG_IRQ_UART
645 select S3C_GPIO_TRACK
646 select S3C_GPIO_PULL_UPDOWN
647 select S3C_GPIO_CFG_S3C24XX
648 select S3C_GPIO_CFG_S3C64XX
649 select S3C_DEV_NAND
650 select USB_ARCH_HAS_OHCI
651 select SAMSUNG_GPIOLIB_4BIT
637 help 652 help
638 Samsung S3C64XX series based systems 653 Samsung S3C64XX series based systems
639 654
@@ -645,6 +660,14 @@ config ARCH_S5P6440
645 help 660 help
646 Samsung S5P6440 CPU based systems 661 Samsung S5P6440 CPU based systems
647 662
663config ARCH_S5P6442
664 bool "Samsung S5P6442"
665 select CPU_V6
666 select GENERIC_GPIO
667 select HAVE_CLK
668 help
669 Samsung S5P6442 CPU based systems
670
648config ARCH_S5PC1XX 671config ARCH_S5PC1XX
649 bool "Samsung S5PC1XX" 672 bool "Samsung S5PC1XX"
650 select GENERIC_GPIO 673 select GENERIC_GPIO
@@ -653,6 +676,15 @@ config ARCH_S5PC1XX
653 help 676 help
654 Samsung S5PC1XX series based systems 677 Samsung S5PC1XX series based systems
655 678
679config ARCH_S5PV210
680 bool "Samsung S5PV210/S5PC110"
681 select CPU_V7
682 select GENERIC_GPIO
683 select HAVE_CLK
684 select ARM_L1_CACHE_SHIFT_6
685 help
686 Samsung S5PV210/S5PC110 series based systems
687
656config ARCH_SHARK 688config ARCH_SHARK
657 bool "Shark" 689 bool "Shark"
658 select CPU_SA110 690 select CPU_SA110
@@ -816,8 +848,6 @@ source "arch/arm/mach-sa1100/Kconfig"
816 848
817source "arch/arm/plat-samsung/Kconfig" 849source "arch/arm/plat-samsung/Kconfig"
818source "arch/arm/plat-s3c24xx/Kconfig" 850source "arch/arm/plat-s3c24xx/Kconfig"
819source "arch/arm/plat-s3c64xx/Kconfig"
820source "arch/arm/plat-s3c/Kconfig"
821source "arch/arm/plat-s5p/Kconfig" 851source "arch/arm/plat-s5p/Kconfig"
822source "arch/arm/plat-s5pc1xx/Kconfig" 852source "arch/arm/plat-s5pc1xx/Kconfig"
823 853
@@ -826,25 +856,27 @@ source "arch/arm/mach-s3c2400/Kconfig"
826source "arch/arm/mach-s3c2410/Kconfig" 856source "arch/arm/mach-s3c2410/Kconfig"
827source "arch/arm/mach-s3c2412/Kconfig" 857source "arch/arm/mach-s3c2412/Kconfig"
828source "arch/arm/mach-s3c2440/Kconfig" 858source "arch/arm/mach-s3c2440/Kconfig"
829source "arch/arm/mach-s3c2442/Kconfig"
830source "arch/arm/mach-s3c2443/Kconfig" 859source "arch/arm/mach-s3c2443/Kconfig"
831endif 860endif
832 861
833if ARCH_S3C64XX 862if ARCH_S3C64XX
834source "arch/arm/mach-s3c6400/Kconfig" 863source "arch/arm/mach-s3c64xx/Kconfig"
835source "arch/arm/mach-s3c6410/Kconfig"
836endif 864endif
837 865
838source "arch/arm/mach-s5p6440/Kconfig" 866source "arch/arm/mach-s5p6440/Kconfig"
839 867
840source "arch/arm/mach-shmobile/Kconfig" 868source "arch/arm/mach-s5p6442/Kconfig"
841
842source "arch/arm/plat-stmp3xxx/Kconfig"
843 869
844if ARCH_S5PC1XX 870if ARCH_S5PC1XX
845source "arch/arm/mach-s5pc100/Kconfig" 871source "arch/arm/mach-s5pc100/Kconfig"
846endif 872endif
847 873
874source "arch/arm/mach-s5pv210/Kconfig"
875
876source "arch/arm/mach-shmobile/Kconfig"
877
878source "arch/arm/plat-stmp3xxx/Kconfig"
879
848source "arch/arm/mach-u300/Kconfig" 880source "arch/arm/mach-u300/Kconfig"
849 881
850source "arch/arm/mach-ux500/Kconfig" 882source "arch/arm/mach-ux500/Kconfig"
@@ -1092,7 +1124,7 @@ source kernel/Kconfig.preempt
1092config HZ 1124config HZ
1093 int 1125 int
1094 default 128 if ARCH_L7200 1126 default 128 if ARCH_L7200
1095 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 1127 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210
1096 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER 1128 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1097 default AT91_TIMER_HZ if ARCH_AT91 1129 default AT91_TIMER_HZ if ARCH_AT91
1098 default 100 1130 default 100
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 5cb9326df7a7..91344af75f39 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -117,7 +117,7 @@ config DEBUG_CLPS711X_UART2
117 cause the debug messages to appear on the first serial port. 117 cause the debug messages to appear on the first serial port.
118 118
119config DEBUG_S3C_UART 119config DEBUG_S3C_UART
120 depends on PLAT_S3C 120 depends on PLAT_SAMSUNG
121 int "S3C UART to use for low-level debug" 121 int "S3C UART to use for low-level debug"
122 default "0" 122 default "0"
123 help 123 help
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 10e933b2f40c..2dca13f60168 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -160,11 +160,13 @@ machine-$(CONFIG_ARCH_PNX4008) := pnx4008
160machine-$(CONFIG_ARCH_PXA) := pxa 160machine-$(CONFIG_ARCH_PXA) := pxa
161machine-$(CONFIG_ARCH_REALVIEW) := realview 161machine-$(CONFIG_ARCH_REALVIEW) := realview
162machine-$(CONFIG_ARCH_RPC) := rpc 162machine-$(CONFIG_ARCH_RPC) := rpc
163machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443 163machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2440 s3c2443
164machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0 164machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0
165machine-$(CONFIG_ARCH_S3C64XX) := s3c6400 s3c6410 165machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx
166machine-$(CONFIG_ARCH_S5P6440) := s5p6440 166machine-$(CONFIG_ARCH_S5P6440) := s5p6440
167machine-$(CONFIG_ARCH_S5P6442) := s5p6442
167machine-$(CONFIG_ARCH_S5PC1XX) := s5pc100 168machine-$(CONFIG_ARCH_S5PC1XX) := s5pc100
169machine-$(CONFIG_ARCH_S5PV210) := s5pv210
168machine-$(CONFIG_ARCH_SA1100) := sa1100 170machine-$(CONFIG_ARCH_SA1100) := sa1100
169machine-$(CONFIG_ARCH_SHARK) := shark 171machine-$(CONFIG_ARCH_SHARK) := shark
170machine-$(CONFIG_ARCH_SHMOBILE) := shmobile 172machine-$(CONFIG_ARCH_SHMOBILE) := shmobile
@@ -180,15 +182,15 @@ machine-$(CONFIG_FOOTBRIDGE) := footbridge
180# by CONFIG_* macro name. 182# by CONFIG_* macro name.
181plat-$(CONFIG_ARCH_MXC) := mxc 183plat-$(CONFIG_ARCH_MXC) := mxc
182plat-$(CONFIG_ARCH_OMAP) := omap 184plat-$(CONFIG_ARCH_OMAP) := omap
185plat-$(CONFIG_ARCH_S3C64XX) := samsung
183plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx 186plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx
184plat-$(CONFIG_PLAT_IOP) := iop 187plat-$(CONFIG_PLAT_IOP) := iop
185plat-$(CONFIG_PLAT_NOMADIK) := nomadik 188plat-$(CONFIG_PLAT_NOMADIK) := nomadik
186plat-$(CONFIG_PLAT_ORION) := orion 189plat-$(CONFIG_PLAT_ORION) := orion
187plat-$(CONFIG_PLAT_PXA) := pxa 190plat-$(CONFIG_PLAT_PXA) := pxa
188plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c samsung 191plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx samsung
189plat-$(CONFIG_PLAT_S3C64XX) := s3c64xx s3c samsung 192plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx samsung
190plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx s3c samsung 193plat-$(CONFIG_PLAT_S5P) := s5p samsung
191plat-$(CONFIG_PLAT_S5P) := s5p samsung s3c
192 194
193ifeq ($(CONFIG_ARCH_EBSA110),y) 195ifeq ($(CONFIG_ARCH_EBSA110),y)
194# This is what happens if you forget the IOCS16 line. 196# This is what happens if you forget the IOCS16 line.
diff --git a/arch/arm/configs/s3c6400_defconfig b/arch/arm/configs/s3c6400_defconfig
index f56e50fab79b..5e7d4c1b8fc1 100644
--- a/arch/arm/configs/s3c6400_defconfig
+++ b/arch/arm/configs/s3c6400_defconfig
@@ -1,14 +1,11 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28-rc3 3# Linux kernel version: 2.6.33-rc4
4# Mon Nov 3 10:10:30 2008 4# Tue Jan 19 13:12:40 2010
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y 8CONFIG_GENERIC_GPIO=y
9# CONFIG_GENERIC_TIME is not set
10# CONFIG_GENERIC_CLOCKEVENTS is not set
11CONFIG_MMU=y
12CONFIG_NO_IOPORT=y 9CONFIG_NO_IOPORT=y
13CONFIG_GENERIC_HARDIRQS=y 10CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y 11CONFIG_STACKTRACE_SUPPORT=y
@@ -18,13 +15,13 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_HARDIRQS_SW_RESEND=y 15CONFIG_HARDIRQS_SW_RESEND=y
19CONFIG_GENERIC_IRQ_PROBE=y 16CONFIG_GENERIC_IRQ_PROBE=y
20CONFIG_RWSEM_GENERIC_SPINLOCK=y 17CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set 18CONFIG_ARCH_HAS_CPUFREQ=y
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y 19CONFIG_GENERIC_HWEIGHT=y
24CONFIG_GENERIC_CALIBRATE_DELAY=y 20CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 21CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
26CONFIG_VECTORS_BASE=0xffff0000 22CONFIG_VECTORS_BASE=0xffff0000
27CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
28 25
29# 26#
30# General setup 27# General setup
@@ -34,13 +31,30 @@ CONFIG_BROKEN_ON_SMP=y
34CONFIG_INIT_ENV_ARG_LIMIT=32 31CONFIG_INIT_ENV_ARG_LIMIT=32
35CONFIG_LOCALVERSION="" 32CONFIG_LOCALVERSION=""
36CONFIG_LOCALVERSION_AUTO=y 33CONFIG_LOCALVERSION_AUTO=y
34CONFIG_HAVE_KERNEL_GZIP=y
35CONFIG_HAVE_KERNEL_LZO=y
36CONFIG_KERNEL_GZIP=y
37# CONFIG_KERNEL_BZIP2 is not set
38# CONFIG_KERNEL_LZMA is not set
39# CONFIG_KERNEL_LZO is not set
37CONFIG_SWAP=y 40CONFIG_SWAP=y
38# CONFIG_SYSVIPC is not set 41# CONFIG_SYSVIPC is not set
39# CONFIG_BSD_PROCESS_ACCT is not set 42# CONFIG_BSD_PROCESS_ACCT is not set
43
44#
45# RCU Subsystem
46#
47CONFIG_TREE_RCU=y
48# CONFIG_TREE_PREEMPT_RCU is not set
49# CONFIG_TINY_RCU is not set
50# CONFIG_RCU_TRACE is not set
51CONFIG_RCU_FANOUT=32
52# CONFIG_RCU_FANOUT_EXACT is not set
53# CONFIG_TREE_RCU_TRACE is not set
40# CONFIG_IKCONFIG is not set 54# CONFIG_IKCONFIG is not set
41CONFIG_LOG_BUF_SHIFT=17 55CONFIG_LOG_BUF_SHIFT=17
42# CONFIG_CGROUPS is not set
43# CONFIG_GROUP_SCHED is not set 56# CONFIG_GROUP_SCHED is not set
57# CONFIG_CGROUPS is not set
44CONFIG_SYSFS_DEPRECATED=y 58CONFIG_SYSFS_DEPRECATED=y
45CONFIG_SYSFS_DEPRECATED_V2=y 59CONFIG_SYSFS_DEPRECATED_V2=y
46# CONFIG_RELAY is not set 60# CONFIG_RELAY is not set
@@ -50,8 +64,13 @@ CONFIG_NAMESPACES=y
50# CONFIG_PID_NS is not set 64# CONFIG_PID_NS is not set
51CONFIG_BLK_DEV_INITRD=y 65CONFIG_BLK_DEV_INITRD=y
52CONFIG_INITRAMFS_SOURCE="" 66CONFIG_INITRAMFS_SOURCE=""
67CONFIG_RD_GZIP=y
68CONFIG_RD_BZIP2=y
69CONFIG_RD_LZMA=y
70CONFIG_RD_LZO=y
53CONFIG_CC_OPTIMIZE_FOR_SIZE=y 71CONFIG_CC_OPTIMIZE_FOR_SIZE=y
54CONFIG_SYSCTL=y 72CONFIG_SYSCTL=y
73CONFIG_ANON_INODES=y
55# CONFIG_EMBEDDED is not set 74# CONFIG_EMBEDDED is not set
56CONFIG_UID16=y 75CONFIG_UID16=y
57CONFIG_SYSCTL_SYSCALL=y 76CONFIG_SYSCTL_SYSCALL=y
@@ -62,32 +81,38 @@ CONFIG_HOTPLUG=y
62CONFIG_PRINTK=y 81CONFIG_PRINTK=y
63CONFIG_BUG=y 82CONFIG_BUG=y
64CONFIG_ELF_CORE=y 83CONFIG_ELF_CORE=y
65CONFIG_COMPAT_BRK=y
66CONFIG_BASE_FULL=y 84CONFIG_BASE_FULL=y
67CONFIG_FUTEX=y 85CONFIG_FUTEX=y
68CONFIG_ANON_INODES=y
69CONFIG_EPOLL=y 86CONFIG_EPOLL=y
70CONFIG_SIGNALFD=y 87CONFIG_SIGNALFD=y
71CONFIG_TIMERFD=y 88CONFIG_TIMERFD=y
72CONFIG_EVENTFD=y 89CONFIG_EVENTFD=y
73CONFIG_SHMEM=y 90CONFIG_SHMEM=y
74CONFIG_AIO=y 91CONFIG_AIO=y
92
93#
94# Kernel Performance Events And Counters
95#
75CONFIG_VM_EVENT_COUNTERS=y 96CONFIG_VM_EVENT_COUNTERS=y
76CONFIG_SLUB_DEBUG=y 97CONFIG_SLUB_DEBUG=y
98CONFIG_COMPAT_BRK=y
77# CONFIG_SLAB is not set 99# CONFIG_SLAB is not set
78CONFIG_SLUB=y 100CONFIG_SLUB=y
79# CONFIG_SLOB is not set 101# CONFIG_SLOB is not set
80# CONFIG_PROFILING is not set 102# CONFIG_PROFILING is not set
81# CONFIG_MARKERS is not set
82CONFIG_HAVE_OPROFILE=y 103CONFIG_HAVE_OPROFILE=y
83# CONFIG_KPROBES is not set 104# CONFIG_KPROBES is not set
84CONFIG_HAVE_KPROBES=y 105CONFIG_HAVE_KPROBES=y
85CONFIG_HAVE_KRETPROBES=y 106CONFIG_HAVE_KRETPROBES=y
86CONFIG_HAVE_CLK=y 107CONFIG_HAVE_CLK=y
108
109#
110# GCOV-based kernel profiling
111#
112# CONFIG_SLOW_WORK is not set
87CONFIG_HAVE_GENERIC_DMA_COHERENT=y 113CONFIG_HAVE_GENERIC_DMA_COHERENT=y
88CONFIG_SLABINFO=y 114CONFIG_SLABINFO=y
89CONFIG_RT_MUTEXES=y 115CONFIG_RT_MUTEXES=y
90# CONFIG_TINY_SHMEM is not set
91CONFIG_BASE_SMALL=0 116CONFIG_BASE_SMALL=0
92CONFIG_MODULES=y 117CONFIG_MODULES=y
93# CONFIG_MODULE_FORCE_LOAD is not set 118# CONFIG_MODULE_FORCE_LOAD is not set
@@ -95,11 +120,8 @@ CONFIG_MODULE_UNLOAD=y
95# CONFIG_MODULE_FORCE_UNLOAD is not set 120# CONFIG_MODULE_FORCE_UNLOAD is not set
96# CONFIG_MODVERSIONS is not set 121# CONFIG_MODVERSIONS is not set
97# CONFIG_MODULE_SRCVERSION_ALL is not set 122# CONFIG_MODULE_SRCVERSION_ALL is not set
98CONFIG_KMOD=y
99CONFIG_BLOCK=y 123CONFIG_BLOCK=y
100CONFIG_LBD=y 124CONFIG_LBDAF=y
101# CONFIG_BLK_DEV_IO_TRACE is not set
102CONFIG_LSF=y
103# CONFIG_BLK_DEV_BSG is not set 125# CONFIG_BLK_DEV_BSG is not set
104# CONFIG_BLK_DEV_INTEGRITY is not set 126# CONFIG_BLK_DEV_INTEGRITY is not set
105 127
@@ -107,33 +129,62 @@ CONFIG_LSF=y
107# IO Schedulers 129# IO Schedulers
108# 130#
109CONFIG_IOSCHED_NOOP=y 131CONFIG_IOSCHED_NOOP=y
110CONFIG_IOSCHED_AS=y
111CONFIG_IOSCHED_DEADLINE=y 132CONFIG_IOSCHED_DEADLINE=y
112CONFIG_IOSCHED_CFQ=y 133CONFIG_IOSCHED_CFQ=y
113# CONFIG_DEFAULT_AS is not set
114# CONFIG_DEFAULT_DEADLINE is not set 134# CONFIG_DEFAULT_DEADLINE is not set
115CONFIG_DEFAULT_CFQ=y 135CONFIG_DEFAULT_CFQ=y
116# CONFIG_DEFAULT_NOOP is not set 136# CONFIG_DEFAULT_NOOP is not set
117CONFIG_DEFAULT_IOSCHED="cfq" 137CONFIG_DEFAULT_IOSCHED="cfq"
118CONFIG_CLASSIC_RCU=y 138# CONFIG_INLINE_SPIN_TRYLOCK is not set
139# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
140# CONFIG_INLINE_SPIN_LOCK is not set
141# CONFIG_INLINE_SPIN_LOCK_BH is not set
142# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
143# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
144# CONFIG_INLINE_SPIN_UNLOCK is not set
145# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
146# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
147# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
148# CONFIG_INLINE_READ_TRYLOCK is not set
149# CONFIG_INLINE_READ_LOCK is not set
150# CONFIG_INLINE_READ_LOCK_BH is not set
151# CONFIG_INLINE_READ_LOCK_IRQ is not set
152# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
153# CONFIG_INLINE_READ_UNLOCK is not set
154# CONFIG_INLINE_READ_UNLOCK_BH is not set
155# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
156# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
157# CONFIG_INLINE_WRITE_TRYLOCK is not set
158# CONFIG_INLINE_WRITE_LOCK is not set
159# CONFIG_INLINE_WRITE_LOCK_BH is not set
160# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
161# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
162# CONFIG_INLINE_WRITE_UNLOCK is not set
163# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
164# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
165# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
166# CONFIG_MUTEX_SPIN_ON_OWNER is not set
119# CONFIG_FREEZER is not set 167# CONFIG_FREEZER is not set
120 168
121# 169#
122# System Type 170# System Type
123# 171#
172CONFIG_MMU=y
124# CONFIG_ARCH_AAEC2000 is not set 173# CONFIG_ARCH_AAEC2000 is not set
125# CONFIG_ARCH_INTEGRATOR is not set 174# CONFIG_ARCH_INTEGRATOR is not set
126# CONFIG_ARCH_REALVIEW is not set 175# CONFIG_ARCH_REALVIEW is not set
127# CONFIG_ARCH_VERSATILE is not set 176# CONFIG_ARCH_VERSATILE is not set
128# CONFIG_ARCH_AT91 is not set 177# CONFIG_ARCH_AT91 is not set
129# CONFIG_ARCH_CLPS7500 is not set
130# CONFIG_ARCH_CLPS711X is not set 178# CONFIG_ARCH_CLPS711X is not set
179# CONFIG_ARCH_GEMINI is not set
131# CONFIG_ARCH_EBSA110 is not set 180# CONFIG_ARCH_EBSA110 is not set
132# CONFIG_ARCH_EP93XX is not set 181# CONFIG_ARCH_EP93XX is not set
133# CONFIG_ARCH_FOOTBRIDGE is not set 182# CONFIG_ARCH_FOOTBRIDGE is not set
183# CONFIG_ARCH_MXC is not set
184# CONFIG_ARCH_STMP3XXX is not set
134# CONFIG_ARCH_NETX is not set 185# CONFIG_ARCH_NETX is not set
135# CONFIG_ARCH_H720X is not set 186# CONFIG_ARCH_H720X is not set
136# CONFIG_ARCH_IMX is not set 187# CONFIG_ARCH_NOMADIK is not set
137# CONFIG_ARCH_IOP13XX is not set 188# CONFIG_ARCH_IOP13XX is not set
138# CONFIG_ARCH_IOP32X is not set 189# CONFIG_ARCH_IOP32X is not set
139# CONFIG_ARCH_IOP33X is not set 190# CONFIG_ARCH_IOP33X is not set
@@ -141,35 +192,62 @@ CONFIG_CLASSIC_RCU=y
141# CONFIG_ARCH_IXP2000 is not set 192# CONFIG_ARCH_IXP2000 is not set
142# CONFIG_ARCH_IXP4XX is not set 193# CONFIG_ARCH_IXP4XX is not set
143# CONFIG_ARCH_L7200 is not set 194# CONFIG_ARCH_L7200 is not set
195# CONFIG_ARCH_DOVE is not set
144# CONFIG_ARCH_KIRKWOOD is not set 196# CONFIG_ARCH_KIRKWOOD is not set
145# CONFIG_ARCH_KS8695 is not set
146# CONFIG_ARCH_NS9XXX is not set
147# CONFIG_ARCH_LOKI is not set 197# CONFIG_ARCH_LOKI is not set
148# CONFIG_ARCH_MV78XX0 is not set 198# CONFIG_ARCH_MV78XX0 is not set
149# CONFIG_ARCH_MXC is not set
150# CONFIG_ARCH_ORION5X is not set 199# CONFIG_ARCH_ORION5X is not set
200# CONFIG_ARCH_MMP is not set
201# CONFIG_ARCH_KS8695 is not set
202# CONFIG_ARCH_NS9XXX is not set
203# CONFIG_ARCH_W90X900 is not set
151# CONFIG_ARCH_PNX4008 is not set 204# CONFIG_ARCH_PNX4008 is not set
152# CONFIG_ARCH_PXA is not set 205# CONFIG_ARCH_PXA is not set
206# CONFIG_ARCH_MSM is not set
153# CONFIG_ARCH_RPC is not set 207# CONFIG_ARCH_RPC is not set
154# CONFIG_ARCH_SA1100 is not set 208# CONFIG_ARCH_SA1100 is not set
155# CONFIG_ARCH_S3C2410 is not set 209# CONFIG_ARCH_S3C2410 is not set
156CONFIG_ARCH_S3C64XX=y 210CONFIG_ARCH_S3C64XX=y
211# CONFIG_ARCH_S5P6440 is not set
212# CONFIG_ARCH_S5PC1XX is not set
157# CONFIG_ARCH_SHARK is not set 213# CONFIG_ARCH_SHARK is not set
158# CONFIG_ARCH_LH7A40X is not set 214# CONFIG_ARCH_LH7A40X is not set
215# CONFIG_ARCH_U300 is not set
159# CONFIG_ARCH_DAVINCI is not set 216# CONFIG_ARCH_DAVINCI is not set
160# CONFIG_ARCH_OMAP is not set 217# CONFIG_ARCH_OMAP is not set
161# CONFIG_ARCH_MSM is not set 218# CONFIG_ARCH_BCMRING is not set
219# CONFIG_ARCH_U8500 is not set
220CONFIG_PLAT_SAMSUNG=y
221CONFIG_SAMSUNG_CLKSRC=y
222CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
223CONFIG_SAMSUNG_IRQ_UART=y
224CONFIG_S3C_GPIO_CFG_S3C24XX=y
225CONFIG_S3C_GPIO_CFG_S3C64XX=y
226CONFIG_S3C_GPIO_PULL_UPDOWN=y
227CONFIG_SAMSUNG_GPIO_EXTRA=0
228# CONFIG_S3C_ADC is not set
229CONFIG_S3C_DEV_HSMMC=y
230CONFIG_S3C_DEV_HSMMC1=y
231CONFIG_S3C_DEV_I2C1=y
232CONFIG_S3C_DEV_FB=y
233CONFIG_S3C_DEV_USB_HOST=y
234CONFIG_S3C_DEV_USB_HSOTG=y
235CONFIG_S3C_DEV_NAND=y
162CONFIG_PLAT_S3C64XX=y 236CONFIG_PLAT_S3C64XX=y
163CONFIG_CPU_S3C6400_INIT=y 237CONFIG_CPU_S3C6400_INIT=y
164CONFIG_CPU_S3C6400_CLOCK=y 238CONFIG_CPU_S3C6400_CLOCK=y
239# CONFIG_S3C64XX_DMA is not set
165CONFIG_S3C64XX_SETUP_I2C0=y 240CONFIG_S3C64XX_SETUP_I2C0=y
166CONFIG_S3C64XX_SETUP_I2C1=y 241CONFIG_S3C64XX_SETUP_I2C1=y
242CONFIG_S3C64XX_SETUP_FB_24BPP=y
243CONFIG_S3C64XX_SETUP_SDHCI_GPIO=y
167CONFIG_PLAT_S3C=y 244CONFIG_PLAT_S3C=y
168 245
169# 246#
170# Boot options 247# Boot options
171# 248#
172CONFIG_S3C_BOOT_ERROR_RESET=y 249CONFIG_S3C_BOOT_ERROR_RESET=y
250CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
173 251
174# 252#
175# Power management 253# Power management
@@ -177,17 +255,16 @@ CONFIG_S3C_BOOT_ERROR_RESET=y
177CONFIG_S3C_LOWLEVEL_UART_PORT=0 255CONFIG_S3C_LOWLEVEL_UART_PORT=0
178CONFIG_S3C_GPIO_SPACE=0 256CONFIG_S3C_GPIO_SPACE=0
179CONFIG_S3C_GPIO_TRACK=y 257CONFIG_S3C_GPIO_TRACK=y
180CONFIG_S3C_GPIO_PULL_UPDOWN=y 258# CONFIG_MACH_SMDK6400 is not set
181CONFIG_S3C_GPIO_CFG_S3C24XX=y
182CONFIG_S3C_GPIO_CFG_S3C64XX=y
183CONFIG_S3C_DEV_HSMMC=y
184CONFIG_S3C_DEV_HSMMC1=y
185CONFIG_S3C_DEV_I2C1=y
186CONFIG_CPU_S3C6410=y 259CONFIG_CPU_S3C6410=y
187CONFIG_S3C6410_SETUP_SDHCI=y 260CONFIG_S3C6410_SETUP_SDHCI=y
261# CONFIG_MACH_ANW6410 is not set
188CONFIG_MACH_SMDK6410=y 262CONFIG_MACH_SMDK6410=y
189CONFIG_SMDK6410_SD_CH0=y 263CONFIG_SMDK6410_SD_CH0=y
190# CONFIG_SMDK6410_SD_CH1 is not set 264# CONFIG_SMDK6410_SD_CH1 is not set
265# CONFIG_SMDK6410_WM1190_EV1 is not set
266# CONFIG_MACH_NCP is not set
267# CONFIG_MACH_HMT is not set
191 268
192# 269#
193# Processor Type 270# Processor Type
@@ -196,7 +273,7 @@ CONFIG_CPU_V6=y
196CONFIG_CPU_32v6K=y 273CONFIG_CPU_32v6K=y
197CONFIG_CPU_32v6=y 274CONFIG_CPU_32v6=y
198CONFIG_CPU_ABRT_EV6=y 275CONFIG_CPU_ABRT_EV6=y
199CONFIG_CPU_PABRT_NOIFAR=y 276CONFIG_CPU_PABRT_V6=y
200CONFIG_CPU_CACHE_V6=y 277CONFIG_CPU_CACHE_V6=y
201CONFIG_CPU_CACHE_VIPT=y 278CONFIG_CPU_CACHE_VIPT=y
202CONFIG_CPU_COPY_V6=y 279CONFIG_CPU_COPY_V6=y
@@ -212,8 +289,10 @@ CONFIG_ARM_THUMB=y
212# CONFIG_CPU_ICACHE_DISABLE is not set 289# CONFIG_CPU_ICACHE_DISABLE is not set
213# CONFIG_CPU_DCACHE_DISABLE is not set 290# CONFIG_CPU_DCACHE_DISABLE is not set
214# CONFIG_CPU_BPREDICT_DISABLE is not set 291# CONFIG_CPU_BPREDICT_DISABLE is not set
215# CONFIG_OUTER_CACHE is not set 292CONFIG_ARM_L1_CACHE_SHIFT=5
293# CONFIG_ARM_ERRATA_411920 is not set
216CONFIG_ARM_VIC=y 294CONFIG_ARM_VIC=y
295CONFIG_ARM_VIC_NR=2
217 296
218# 297#
219# Bus support 298# Bus support
@@ -229,13 +308,15 @@ CONFIG_VMSPLIT_3G=y
229# CONFIG_VMSPLIT_2G is not set 308# CONFIG_VMSPLIT_2G is not set
230# CONFIG_VMSPLIT_1G is not set 309# CONFIG_VMSPLIT_1G is not set
231CONFIG_PAGE_OFFSET=0xC0000000 310CONFIG_PAGE_OFFSET=0xC0000000
311CONFIG_PREEMPT_NONE=y
312# CONFIG_PREEMPT_VOLUNTARY is not set
232# CONFIG_PREEMPT is not set 313# CONFIG_PREEMPT is not set
233CONFIG_HZ=100 314CONFIG_HZ=100
234CONFIG_AEABI=y 315CONFIG_AEABI=y
235CONFIG_OABI_COMPAT=y 316CONFIG_OABI_COMPAT=y
236CONFIG_ARCH_FLATMEM_HAS_HOLES=y
237# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set 317# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
238# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set 318# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
319# CONFIG_HIGHMEM is not set
239CONFIG_SELECT_MEMORY_MODEL=y 320CONFIG_SELECT_MEMORY_MODEL=y
240CONFIG_FLATMEM_MANUAL=y 321CONFIG_FLATMEM_MANUAL=y
241# CONFIG_DISCONTIGMEM_MANUAL is not set 322# CONFIG_DISCONTIGMEM_MANUAL is not set
@@ -243,26 +324,28 @@ CONFIG_FLATMEM_MANUAL=y
243CONFIG_FLATMEM=y 324CONFIG_FLATMEM=y
244CONFIG_FLAT_NODE_MEM_MAP=y 325CONFIG_FLAT_NODE_MEM_MAP=y
245CONFIG_PAGEFLAGS_EXTENDED=y 326CONFIG_PAGEFLAGS_EXTENDED=y
246CONFIG_SPLIT_PTLOCK_CPUS=4 327CONFIG_SPLIT_PTLOCK_CPUS=999999
247# CONFIG_RESOURCES_64BIT is not set
248# CONFIG_PHYS_ADDR_T_64BIT is not set 328# CONFIG_PHYS_ADDR_T_64BIT is not set
249CONFIG_ZONE_DMA_FLAG=0 329CONFIG_ZONE_DMA_FLAG=0
250CONFIG_VIRT_TO_BUS=y 330CONFIG_VIRT_TO_BUS=y
251CONFIG_UNEVICTABLE_LRU=y 331# CONFIG_KSM is not set
332CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
252CONFIG_ALIGNMENT_TRAP=y 333CONFIG_ALIGNMENT_TRAP=y
334# CONFIG_UACCESS_WITH_MEMCPY is not set
253 335
254# 336#
255# Boot options 337# Boot options
256# 338#
257CONFIG_ZBOOT_ROM_TEXT=0 339CONFIG_ZBOOT_ROM_TEXT=0
258CONFIG_ZBOOT_ROM_BSS=0 340CONFIG_ZBOOT_ROM_BSS=0
259CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/bin/bash initrd=0x51000000,4M" 341CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/linuxrc initrd=0x51000000,6M ramdisk_size=6144"
260# CONFIG_XIP_KERNEL is not set 342# CONFIG_XIP_KERNEL is not set
261# CONFIG_KEXEC is not set 343# CONFIG_KEXEC is not set
262 344
263# 345#
264# CPU Power Management 346# CPU Power Management
265# 347#
348# CONFIG_CPU_FREQ is not set
266# CONFIG_CPU_IDLE is not set 349# CONFIG_CPU_IDLE is not set
267 350
268# 351#
@@ -300,6 +383,7 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
300# Generic Driver Options 383# Generic Driver Options
301# 384#
302CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 385CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
386# CONFIG_DEVTMPFS is not set
303CONFIG_STANDALONE=y 387CONFIG_STANDALONE=y
304CONFIG_PREVENT_FIRMWARE_BUILD=y 388CONFIG_PREVENT_FIRMWARE_BUILD=y
305CONFIG_FW_LOADER=y 389CONFIG_FW_LOADER=y
@@ -314,14 +398,32 @@ CONFIG_BLK_DEV=y
314# CONFIG_BLK_DEV_COW_COMMON is not set 398# CONFIG_BLK_DEV_COW_COMMON is not set
315CONFIG_BLK_DEV_LOOP=y 399CONFIG_BLK_DEV_LOOP=y
316# CONFIG_BLK_DEV_CRYPTOLOOP is not set 400# CONFIG_BLK_DEV_CRYPTOLOOP is not set
401
402#
403# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
404#
317CONFIG_BLK_DEV_RAM=y 405CONFIG_BLK_DEV_RAM=y
318CONFIG_BLK_DEV_RAM_COUNT=16 406CONFIG_BLK_DEV_RAM_COUNT=16
319CONFIG_BLK_DEV_RAM_SIZE=4096 407CONFIG_BLK_DEV_RAM_SIZE=4096
320# CONFIG_BLK_DEV_XIP is not set 408# CONFIG_BLK_DEV_XIP is not set
321# CONFIG_CDROM_PKTCDVD is not set 409# CONFIG_CDROM_PKTCDVD is not set
410# CONFIG_MG_DISK is not set
322CONFIG_MISC_DEVICES=y 411CONFIG_MISC_DEVICES=y
323# CONFIG_EEPROM_93CX6 is not set 412# CONFIG_AD525X_DPOT is not set
413# CONFIG_ICS932S401 is not set
324# CONFIG_ENCLOSURE_SERVICES is not set 414# CONFIG_ENCLOSURE_SERVICES is not set
415# CONFIG_ISL29003 is not set
416# CONFIG_DS1682 is not set
417# CONFIG_C2PORT is not set
418
419#
420# EEPROM support
421#
422CONFIG_EEPROM_AT24=y
423# CONFIG_EEPROM_LEGACY is not set
424# CONFIG_EEPROM_MAX6875 is not set
425# CONFIG_EEPROM_93CX6 is not set
426# CONFIG_IWMC3200TOP is not set
325CONFIG_HAVE_IDE=y 427CONFIG_HAVE_IDE=y
326# CONFIG_IDE is not set 428# CONFIG_IDE is not set
327 429
@@ -334,6 +436,7 @@ CONFIG_HAVE_IDE=y
334# CONFIG_SCSI_NETLINK is not set 436# CONFIG_SCSI_NETLINK is not set
335# CONFIG_ATA is not set 437# CONFIG_ATA is not set
336# CONFIG_MD is not set 438# CONFIG_MD is not set
439# CONFIG_PHONE is not set
337 440
338# 441#
339# Input device support 442# Input device support
@@ -341,6 +444,7 @@ CONFIG_HAVE_IDE=y
341CONFIG_INPUT=y 444CONFIG_INPUT=y
342# CONFIG_INPUT_FF_MEMLESS is not set 445# CONFIG_INPUT_FF_MEMLESS is not set
343# CONFIG_INPUT_POLLDEV is not set 446# CONFIG_INPUT_POLLDEV is not set
447# CONFIG_INPUT_SPARSEKMAP is not set
344 448
345# 449#
346# Userland interfaces 450# Userland interfaces
@@ -357,27 +461,33 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
357# Input Device Drivers 461# Input Device Drivers
358# 462#
359CONFIG_INPUT_KEYBOARD=y 463CONFIG_INPUT_KEYBOARD=y
464# CONFIG_KEYBOARD_ADP5588 is not set
360CONFIG_KEYBOARD_ATKBD=y 465CONFIG_KEYBOARD_ATKBD=y
361# CONFIG_KEYBOARD_SUNKBD is not set 466# CONFIG_QT2160 is not set
362# CONFIG_KEYBOARD_LKKBD is not set 467# CONFIG_KEYBOARD_LKKBD is not set
363# CONFIG_KEYBOARD_XTKBD is not set 468# CONFIG_KEYBOARD_GPIO is not set
469# CONFIG_KEYBOARD_MATRIX is not set
470# CONFIG_KEYBOARD_MAX7359 is not set
364# CONFIG_KEYBOARD_NEWTON is not set 471# CONFIG_KEYBOARD_NEWTON is not set
472# CONFIG_KEYBOARD_OPENCORES is not set
365# CONFIG_KEYBOARD_STOWAWAY is not set 473# CONFIG_KEYBOARD_STOWAWAY is not set
366# CONFIG_KEYBOARD_GPIO is not set 474# CONFIG_KEYBOARD_SUNKBD is not set
475# CONFIG_KEYBOARD_XTKBD is not set
367CONFIG_INPUT_MOUSE=y 476CONFIG_INPUT_MOUSE=y
368CONFIG_MOUSE_PS2=y 477CONFIG_MOUSE_PS2=y
369CONFIG_MOUSE_PS2_ALPS=y 478CONFIG_MOUSE_PS2_ALPS=y
370CONFIG_MOUSE_PS2_LOGIPS2PP=y 479CONFIG_MOUSE_PS2_LOGIPS2PP=y
371CONFIG_MOUSE_PS2_SYNAPTICS=y 480CONFIG_MOUSE_PS2_SYNAPTICS=y
372CONFIG_MOUSE_PS2_LIFEBOOK=y
373CONFIG_MOUSE_PS2_TRACKPOINT=y 481CONFIG_MOUSE_PS2_TRACKPOINT=y
374# CONFIG_MOUSE_PS2_ELANTECH is not set 482# CONFIG_MOUSE_PS2_ELANTECH is not set
483# CONFIG_MOUSE_PS2_SENTELIC is not set
375# CONFIG_MOUSE_PS2_TOUCHKIT is not set 484# CONFIG_MOUSE_PS2_TOUCHKIT is not set
376# CONFIG_MOUSE_SERIAL is not set 485# CONFIG_MOUSE_SERIAL is not set
377# CONFIG_MOUSE_APPLETOUCH is not set 486# CONFIG_MOUSE_APPLETOUCH is not set
378# CONFIG_MOUSE_BCM5974 is not set 487# CONFIG_MOUSE_BCM5974 is not set
379# CONFIG_MOUSE_VSXXXAA is not set 488# CONFIG_MOUSE_VSXXXAA is not set
380# CONFIG_MOUSE_GPIO is not set 489# CONFIG_MOUSE_GPIO is not set
490# CONFIG_MOUSE_SYNAPTICS_I2C is not set
381# CONFIG_INPUT_JOYSTICK is not set 491# CONFIG_INPUT_JOYSTICK is not set
382# CONFIG_INPUT_TABLET is not set 492# CONFIG_INPUT_TABLET is not set
383# CONFIG_INPUT_TOUCHSCREEN is not set 493# CONFIG_INPUT_TOUCHSCREEN is not set
@@ -390,6 +500,7 @@ CONFIG_SERIO=y
390CONFIG_SERIO_SERPORT=y 500CONFIG_SERIO_SERPORT=y
391CONFIG_SERIO_LIBPS2=y 501CONFIG_SERIO_LIBPS2=y
392# CONFIG_SERIO_RAW is not set 502# CONFIG_SERIO_RAW is not set
503# CONFIG_SERIO_ALTERA_PS2 is not set
393# CONFIG_GAMEPORT is not set 504# CONFIG_GAMEPORT is not set
394 505
395# 506#
@@ -423,16 +534,18 @@ CONFIG_SERIAL_S3C6400=y
423CONFIG_SERIAL_CORE=y 534CONFIG_SERIAL_CORE=y
424CONFIG_SERIAL_CORE_CONSOLE=y 535CONFIG_SERIAL_CORE_CONSOLE=y
425CONFIG_UNIX98_PTYS=y 536CONFIG_UNIX98_PTYS=y
537# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
426CONFIG_LEGACY_PTYS=y 538CONFIG_LEGACY_PTYS=y
427CONFIG_LEGACY_PTY_COUNT=256 539CONFIG_LEGACY_PTY_COUNT=256
428# CONFIG_IPMI_HANDLER is not set 540# CONFIG_IPMI_HANDLER is not set
429CONFIG_HW_RANDOM=y 541CONFIG_HW_RANDOM=y
430# CONFIG_NVRAM is not set 542# CONFIG_HW_RANDOM_TIMERIOMEM is not set
431# CONFIG_R3964 is not set 543# CONFIG_R3964 is not set
432# CONFIG_RAW_DRIVER is not set 544# CONFIG_RAW_DRIVER is not set
433# CONFIG_TCG_TPM is not set 545# CONFIG_TCG_TPM is not set
434CONFIG_I2C=y 546CONFIG_I2C=y
435CONFIG_I2C_BOARDINFO=y 547CONFIG_I2C_BOARDINFO=y
548CONFIG_I2C_COMPAT=y
436CONFIG_I2C_CHARDEV=y 549CONFIG_I2C_CHARDEV=y
437CONFIG_I2C_HELPER_AUTO=y 550CONFIG_I2C_HELPER_AUTO=y
438 551
@@ -443,6 +556,7 @@ CONFIG_I2C_HELPER_AUTO=y
443# 556#
444# I2C system bus drivers (mostly embedded / system-on-chip) 557# I2C system bus drivers (mostly embedded / system-on-chip)
445# 558#
559# CONFIG_I2C_DESIGNWARE is not set
446# CONFIG_I2C_GPIO is not set 560# CONFIG_I2C_GPIO is not set
447# CONFIG_I2C_OCORES is not set 561# CONFIG_I2C_OCORES is not set
448CONFIG_I2C_S3C2410=y 562CONFIG_I2C_S3C2410=y
@@ -463,32 +577,33 @@ CONFIG_I2C_S3C2410=y
463# 577#
464# Miscellaneous I2C Chip support 578# Miscellaneous I2C Chip support
465# 579#
466# CONFIG_DS1682 is not set
467CONFIG_EEPROM_AT24=y
468# CONFIG_EEPROM_LEGACY is not set
469# CONFIG_SENSORS_PCF8574 is not set
470# CONFIG_PCF8575 is not set
471# CONFIG_SENSORS_PCA9539 is not set
472# CONFIG_SENSORS_PCF8591 is not set
473# CONFIG_TPS65010 is not set
474# CONFIG_SENSORS_MAX6875 is not set
475# CONFIG_SENSORS_TSL2550 is not set 580# CONFIG_SENSORS_TSL2550 is not set
476# CONFIG_I2C_DEBUG_CORE is not set 581# CONFIG_I2C_DEBUG_CORE is not set
477# CONFIG_I2C_DEBUG_ALGO is not set 582# CONFIG_I2C_DEBUG_ALGO is not set
478# CONFIG_I2C_DEBUG_BUS is not set 583# CONFIG_I2C_DEBUG_BUS is not set
479# CONFIG_I2C_DEBUG_CHIP is not set 584# CONFIG_I2C_DEBUG_CHIP is not set
480# CONFIG_SPI is not set 585# CONFIG_SPI is not set
586
587#
588# PPS support
589#
590# CONFIG_PPS is not set
481CONFIG_ARCH_REQUIRE_GPIOLIB=y 591CONFIG_ARCH_REQUIRE_GPIOLIB=y
482CONFIG_GPIOLIB=y 592CONFIG_GPIOLIB=y
483# CONFIG_DEBUG_GPIO is not set 593# CONFIG_DEBUG_GPIO is not set
484# CONFIG_GPIO_SYSFS is not set 594# CONFIG_GPIO_SYSFS is not set
485 595
486# 596#
597# Memory mapped GPIO expanders:
598#
599
600#
487# I2C GPIO expanders: 601# I2C GPIO expanders:
488# 602#
489# CONFIG_GPIO_MAX732X is not set 603# CONFIG_GPIO_MAX732X is not set
490# CONFIG_GPIO_PCA953X is not set 604# CONFIG_GPIO_PCA953X is not set
491# CONFIG_GPIO_PCF857X is not set 605# CONFIG_GPIO_PCF857X is not set
606# CONFIG_GPIO_ADP5588 is not set
492 607
493# 608#
494# PCI GPIO expanders: 609# PCI GPIO expanders:
@@ -497,10 +612,19 @@ CONFIG_GPIOLIB=y
497# 612#
498# SPI GPIO expanders: 613# SPI GPIO expanders:
499# 614#
615
616#
617# AC97 GPIO expanders:
618#
500# CONFIG_W1 is not set 619# CONFIG_W1 is not set
501# CONFIG_POWER_SUPPLY is not set 620# CONFIG_POWER_SUPPLY is not set
502CONFIG_HWMON=y 621CONFIG_HWMON=y
503# CONFIG_HWMON_VID is not set 622# CONFIG_HWMON_VID is not set
623# CONFIG_HWMON_DEBUG_CHIP is not set
624
625#
626# Native drivers
627#
504# CONFIG_SENSORS_AD7414 is not set 628# CONFIG_SENSORS_AD7414 is not set
505# CONFIG_SENSORS_AD7418 is not set 629# CONFIG_SENSORS_AD7418 is not set
506# CONFIG_SENSORS_ADM1021 is not set 630# CONFIG_SENSORS_ADM1021 is not set
@@ -509,17 +633,21 @@ CONFIG_HWMON=y
509# CONFIG_SENSORS_ADM1029 is not set 633# CONFIG_SENSORS_ADM1029 is not set
510# CONFIG_SENSORS_ADM1031 is not set 634# CONFIG_SENSORS_ADM1031 is not set
511# CONFIG_SENSORS_ADM9240 is not set 635# CONFIG_SENSORS_ADM9240 is not set
636# CONFIG_SENSORS_ADT7462 is not set
512# CONFIG_SENSORS_ADT7470 is not set 637# CONFIG_SENSORS_ADT7470 is not set
513# CONFIG_SENSORS_ADT7473 is not set 638# CONFIG_SENSORS_ADT7473 is not set
639# CONFIG_SENSORS_ADT7475 is not set
514# CONFIG_SENSORS_ATXP1 is not set 640# CONFIG_SENSORS_ATXP1 is not set
515# CONFIG_SENSORS_DS1621 is not set 641# CONFIG_SENSORS_DS1621 is not set
516# CONFIG_SENSORS_F71805F is not set 642# CONFIG_SENSORS_F71805F is not set
517# CONFIG_SENSORS_F71882FG is not set 643# CONFIG_SENSORS_F71882FG is not set
518# CONFIG_SENSORS_F75375S is not set 644# CONFIG_SENSORS_F75375S is not set
645# CONFIG_SENSORS_G760A is not set
519# CONFIG_SENSORS_GL518SM is not set 646# CONFIG_SENSORS_GL518SM is not set
520# CONFIG_SENSORS_GL520SM is not set 647# CONFIG_SENSORS_GL520SM is not set
521# CONFIG_SENSORS_IT87 is not set 648# CONFIG_SENSORS_IT87 is not set
522# CONFIG_SENSORS_LM63 is not set 649# CONFIG_SENSORS_LM63 is not set
650# CONFIG_SENSORS_LM73 is not set
523# CONFIG_SENSORS_LM75 is not set 651# CONFIG_SENSORS_LM75 is not set
524# CONFIG_SENSORS_LM77 is not set 652# CONFIG_SENSORS_LM77 is not set
525# CONFIG_SENSORS_LM78 is not set 653# CONFIG_SENSORS_LM78 is not set
@@ -530,16 +658,24 @@ CONFIG_HWMON=y
530# CONFIG_SENSORS_LM90 is not set 658# CONFIG_SENSORS_LM90 is not set
531# CONFIG_SENSORS_LM92 is not set 659# CONFIG_SENSORS_LM92 is not set
532# CONFIG_SENSORS_LM93 is not set 660# CONFIG_SENSORS_LM93 is not set
661# CONFIG_SENSORS_LTC4215 is not set
662# CONFIG_SENSORS_LTC4245 is not set
663# CONFIG_SENSORS_LM95241 is not set
533# CONFIG_SENSORS_MAX1619 is not set 664# CONFIG_SENSORS_MAX1619 is not set
534# CONFIG_SENSORS_MAX6650 is not set 665# CONFIG_SENSORS_MAX6650 is not set
535# CONFIG_SENSORS_PC87360 is not set 666# CONFIG_SENSORS_PC87360 is not set
536# CONFIG_SENSORS_PC87427 is not set 667# CONFIG_SENSORS_PC87427 is not set
668# CONFIG_SENSORS_PCF8591 is not set
669# CONFIG_SENSORS_SHT15 is not set
537# CONFIG_SENSORS_DME1737 is not set 670# CONFIG_SENSORS_DME1737 is not set
538# CONFIG_SENSORS_SMSC47M1 is not set 671# CONFIG_SENSORS_SMSC47M1 is not set
539# CONFIG_SENSORS_SMSC47M192 is not set 672# CONFIG_SENSORS_SMSC47M192 is not set
540# CONFIG_SENSORS_SMSC47B397 is not set 673# CONFIG_SENSORS_SMSC47B397 is not set
541# CONFIG_SENSORS_ADS7828 is not set 674# CONFIG_SENSORS_ADS7828 is not set
675# CONFIG_SENSORS_AMC6821 is not set
542# CONFIG_SENSORS_THMC50 is not set 676# CONFIG_SENSORS_THMC50 is not set
677# CONFIG_SENSORS_TMP401 is not set
678# CONFIG_SENSORS_TMP421 is not set
543# CONFIG_SENSORS_VT1211 is not set 679# CONFIG_SENSORS_VT1211 is not set
544# CONFIG_SENSORS_W83781D is not set 680# CONFIG_SENSORS_W83781D is not set
545# CONFIG_SENSORS_W83791D is not set 681# CONFIG_SENSORS_W83791D is not set
@@ -549,15 +685,14 @@ CONFIG_HWMON=y
549# CONFIG_SENSORS_W83L786NG is not set 685# CONFIG_SENSORS_W83L786NG is not set
550# CONFIG_SENSORS_W83627HF is not set 686# CONFIG_SENSORS_W83627HF is not set
551# CONFIG_SENSORS_W83627EHF is not set 687# CONFIG_SENSORS_W83627EHF is not set
552# CONFIG_HWMON_DEBUG_CHIP is not set 688# CONFIG_SENSORS_LIS3_I2C is not set
553# CONFIG_THERMAL is not set 689# CONFIG_THERMAL is not set
554# CONFIG_THERMAL_HWMON is not set
555# CONFIG_WATCHDOG is not set 690# CONFIG_WATCHDOG is not set
691CONFIG_SSB_POSSIBLE=y
556 692
557# 693#
558# Sonics Silicon Backplane 694# Sonics Silicon Backplane
559# 695#
560CONFIG_SSB_POSSIBLE=y
561# CONFIG_SSB is not set 696# CONFIG_SSB is not set
562 697
563# 698#
@@ -568,28 +703,22 @@ CONFIG_SSB_POSSIBLE=y
568# CONFIG_MFD_ASIC3 is not set 703# CONFIG_MFD_ASIC3 is not set
569# CONFIG_HTC_EGPIO is not set 704# CONFIG_HTC_EGPIO is not set
570# CONFIG_HTC_PASIC3 is not set 705# CONFIG_HTC_PASIC3 is not set
706# CONFIG_TPS65010 is not set
707# CONFIG_TWL4030_CORE is not set
571# CONFIG_MFD_TMIO is not set 708# CONFIG_MFD_TMIO is not set
572# CONFIG_MFD_T7L66XB is not set 709# CONFIG_MFD_T7L66XB is not set
573# CONFIG_MFD_TC6387XB is not set 710# CONFIG_MFD_TC6387XB is not set
574# CONFIG_MFD_TC6393XB is not set 711# CONFIG_MFD_TC6393XB is not set
575# CONFIG_PMIC_DA903X is not set 712# CONFIG_PMIC_DA903X is not set
713# CONFIG_PMIC_ADP5520 is not set
576# CONFIG_MFD_WM8400 is not set 714# CONFIG_MFD_WM8400 is not set
715# CONFIG_MFD_WM831X is not set
577# CONFIG_MFD_WM8350_I2C is not set 716# CONFIG_MFD_WM8350_I2C is not set
578 717# CONFIG_MFD_PCF50633 is not set
579# 718# CONFIG_AB3100_CORE is not set
580# Multimedia devices 719# CONFIG_MFD_88PM8607 is not set
581# 720# CONFIG_REGULATOR is not set
582 721# CONFIG_MEDIA_SUPPORT is not set
583#
584# Multimedia core support
585#
586# CONFIG_VIDEO_DEV is not set
587# CONFIG_VIDEO_MEDIA is not set
588
589#
590# Multimedia drivers
591#
592# CONFIG_DAB is not set
593 722
594# 723#
595# Graphics support 724# Graphics support
@@ -612,17 +741,15 @@ CONFIG_DUMMY_CONSOLE=y
612# CONFIG_SOUND is not set 741# CONFIG_SOUND is not set
613CONFIG_HID_SUPPORT=y 742CONFIG_HID_SUPPORT=y
614CONFIG_HID=y 743CONFIG_HID=y
615CONFIG_HID_DEBUG=y
616# CONFIG_HIDRAW is not set 744# CONFIG_HIDRAW is not set
617# CONFIG_HID_PID is not set 745# CONFIG_HID_PID is not set
618 746
619# 747#
620# Special HID drivers 748# Special HID drivers
621# 749#
622# CONFIG_HID_COMPAT is not set
623CONFIG_USB_SUPPORT=y 750CONFIG_USB_SUPPORT=y
624CONFIG_USB_ARCH_HAS_HCD=y 751CONFIG_USB_ARCH_HAS_HCD=y
625# CONFIG_USB_ARCH_HAS_OHCI is not set 752CONFIG_USB_ARCH_HAS_OHCI=y
626# CONFIG_USB_ARCH_HAS_EHCI is not set 753# CONFIG_USB_ARCH_HAS_EHCI is not set
627# CONFIG_USB is not set 754# CONFIG_USB is not set
628 755
@@ -631,9 +758,13 @@ CONFIG_USB_ARCH_HAS_HCD=y
631# 758#
632 759
633# 760#
634# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 761# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
635# 762#
636# CONFIG_USB_GADGET is not set 763# CONFIG_USB_GADGET is not set
764
765#
766# OTG and related infrastructure
767#
637CONFIG_MMC=y 768CONFIG_MMC=y
638CONFIG_MMC_DEBUG=y 769CONFIG_MMC_DEBUG=y
639CONFIG_MMC_UNSAFE_RESUME=y 770CONFIG_MMC_UNSAFE_RESUME=y
@@ -650,22 +781,24 @@ CONFIG_SDIO_UART=y
650# MMC/SD/SDIO Host Controller Drivers 781# MMC/SD/SDIO Host Controller Drivers
651# 782#
652CONFIG_MMC_SDHCI=y 783CONFIG_MMC_SDHCI=y
784# CONFIG_MMC_SDHCI_PLTFM is not set
653CONFIG_MMC_SDHCI_S3C=y 785CONFIG_MMC_SDHCI_S3C=y
786# CONFIG_MMC_SDHCI_S3C_DMA is not set
787# CONFIG_MMC_AT91 is not set
788# CONFIG_MMC_ATMELMCI is not set
654# CONFIG_MEMSTICK is not set 789# CONFIG_MEMSTICK is not set
655# CONFIG_ACCESSIBILITY is not set
656# CONFIG_NEW_LEDS is not set 790# CONFIG_NEW_LEDS is not set
791# CONFIG_ACCESSIBILITY is not set
657CONFIG_RTC_LIB=y 792CONFIG_RTC_LIB=y
658# CONFIG_RTC_CLASS is not set 793# CONFIG_RTC_CLASS is not set
659# CONFIG_DMADEVICES is not set 794# CONFIG_DMADEVICES is not set
795# CONFIG_AUXDISPLAY is not set
796# CONFIG_UIO is not set
660 797
661# 798#
662# Voltage and Current regulators 799# TI VLYNQ
663# 800#
664# CONFIG_REGULATOR is not set 801# CONFIG_STAGING is not set
665# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
666# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
667# CONFIG_REGULATOR_BQ24022 is not set
668# CONFIG_UIO is not set
669 802
670# 803#
671# File systems 804# File systems
@@ -674,6 +807,7 @@ CONFIG_EXT2_FS=y
674# CONFIG_EXT2_FS_XATTR is not set 807# CONFIG_EXT2_FS_XATTR is not set
675# CONFIG_EXT2_FS_XIP is not set 808# CONFIG_EXT2_FS_XIP is not set
676CONFIG_EXT3_FS=y 809CONFIG_EXT3_FS=y
810# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
677CONFIG_EXT3_FS_XATTR=y 811CONFIG_EXT3_FS_XATTR=y
678CONFIG_EXT3_FS_POSIX_ACL=y 812CONFIG_EXT3_FS_POSIX_ACL=y
679CONFIG_EXT3_FS_SECURITY=y 813CONFIG_EXT3_FS_SECURITY=y
@@ -683,9 +817,12 @@ CONFIG_FS_MBCACHE=y
683# CONFIG_REISERFS_FS is not set 817# CONFIG_REISERFS_FS is not set
684# CONFIG_JFS_FS is not set 818# CONFIG_JFS_FS is not set
685CONFIG_FS_POSIX_ACL=y 819CONFIG_FS_POSIX_ACL=y
686CONFIG_FILE_LOCKING=y
687# CONFIG_XFS_FS is not set 820# CONFIG_XFS_FS is not set
688# CONFIG_GFS2_FS is not set 821# CONFIG_GFS2_FS is not set
822# CONFIG_BTRFS_FS is not set
823# CONFIG_NILFS2_FS is not set
824CONFIG_FILE_LOCKING=y
825CONFIG_FSNOTIFY=y
689CONFIG_DNOTIFY=y 826CONFIG_DNOTIFY=y
690CONFIG_INOTIFY=y 827CONFIG_INOTIFY=y
691CONFIG_INOTIFY_USER=y 828CONFIG_INOTIFY_USER=y
@@ -696,6 +833,11 @@ CONFIG_INOTIFY_USER=y
696CONFIG_GENERIC_ACL=y 833CONFIG_GENERIC_ACL=y
697 834
698# 835#
836# Caches
837#
838# CONFIG_FSCACHE is not set
839
840#
699# CD-ROM/DVD Filesystems 841# CD-ROM/DVD Filesystems
700# 842#
701# CONFIG_ISO9660_FS is not set 843# CONFIG_ISO9660_FS is not set
@@ -719,10 +861,7 @@ CONFIG_TMPFS=y
719CONFIG_TMPFS_POSIX_ACL=y 861CONFIG_TMPFS_POSIX_ACL=y
720# CONFIG_HUGETLB_PAGE is not set 862# CONFIG_HUGETLB_PAGE is not set
721# CONFIG_CONFIGFS_FS is not set 863# CONFIG_CONFIGFS_FS is not set
722 864CONFIG_MISC_FILESYSTEMS=y
723#
724# Miscellaneous filesystems
725#
726# CONFIG_ADFS_FS is not set 865# CONFIG_ADFS_FS is not set
727# CONFIG_AFFS_FS is not set 866# CONFIG_AFFS_FS is not set
728# CONFIG_HFS_FS is not set 867# CONFIG_HFS_FS is not set
@@ -731,12 +870,17 @@ CONFIG_TMPFS_POSIX_ACL=y
731# CONFIG_BFS_FS is not set 870# CONFIG_BFS_FS is not set
732# CONFIG_EFS_FS is not set 871# CONFIG_EFS_FS is not set
733CONFIG_CRAMFS=y 872CONFIG_CRAMFS=y
873# CONFIG_SQUASHFS is not set
734# CONFIG_VXFS_FS is not set 874# CONFIG_VXFS_FS is not set
735# CONFIG_MINIX_FS is not set 875# CONFIG_MINIX_FS is not set
736# CONFIG_OMFS_FS is not set 876# CONFIG_OMFS_FS is not set
737# CONFIG_HPFS_FS is not set 877# CONFIG_HPFS_FS is not set
738# CONFIG_QNX4FS_FS is not set 878# CONFIG_QNX4FS_FS is not set
739CONFIG_ROMFS_FS=y 879CONFIG_ROMFS_FS=y
880CONFIG_ROMFS_BACKED_BY_BLOCK=y
881# CONFIG_ROMFS_BACKED_BY_MTD is not set
882# CONFIG_ROMFS_BACKED_BY_BOTH is not set
883CONFIG_ROMFS_ON_BLOCK=y
740# CONFIG_SYSV_FS is not set 884# CONFIG_SYSV_FS is not set
741# CONFIG_UFS_FS is not set 885# CONFIG_UFS_FS is not set
742 886
@@ -755,6 +899,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
755CONFIG_ENABLE_MUST_CHECK=y 899CONFIG_ENABLE_MUST_CHECK=y
756CONFIG_FRAME_WARN=1024 900CONFIG_FRAME_WARN=1024
757CONFIG_MAGIC_SYSRQ=y 901CONFIG_MAGIC_SYSRQ=y
902# CONFIG_STRIP_ASM_SYMS is not set
758# CONFIG_UNUSED_SYMBOLS is not set 903# CONFIG_UNUSED_SYMBOLS is not set
759# CONFIG_DEBUG_FS is not set 904# CONFIG_DEBUG_FS is not set
760# CONFIG_HEADERS_CHECK is not set 905# CONFIG_HEADERS_CHECK is not set
@@ -763,12 +908,16 @@ CONFIG_DEBUG_KERNEL=y
763CONFIG_DETECT_SOFTLOCKUP=y 908CONFIG_DETECT_SOFTLOCKUP=y
764# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set 909# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
765CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 910CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
911CONFIG_DETECT_HUNG_TASK=y
912# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
913CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
766CONFIG_SCHED_DEBUG=y 914CONFIG_SCHED_DEBUG=y
767# CONFIG_SCHEDSTATS is not set 915# CONFIG_SCHEDSTATS is not set
768# CONFIG_TIMER_STATS is not set 916# CONFIG_TIMER_STATS is not set
769# CONFIG_DEBUG_OBJECTS is not set 917# CONFIG_DEBUG_OBJECTS is not set
770# CONFIG_SLUB_DEBUG_ON is not set 918# CONFIG_SLUB_DEBUG_ON is not set
771# CONFIG_SLUB_STATS is not set 919# CONFIG_SLUB_STATS is not set
920# CONFIG_DEBUG_KMEMLEAK is not set
772CONFIG_DEBUG_RT_MUTEXES=y 921CONFIG_DEBUG_RT_MUTEXES=y
773CONFIG_DEBUG_PI_LIST=y 922CONFIG_DEBUG_PI_LIST=y
774# CONFIG_RT_MUTEX_TESTER is not set 923# CONFIG_RT_MUTEX_TESTER is not set
@@ -787,34 +936,43 @@ CONFIG_DEBUG_INFO=y
787CONFIG_DEBUG_MEMORY_INIT=y 936CONFIG_DEBUG_MEMORY_INIT=y
788# CONFIG_DEBUG_LIST is not set 937# CONFIG_DEBUG_LIST is not set
789# CONFIG_DEBUG_SG is not set 938# CONFIG_DEBUG_SG is not set
790CONFIG_FRAME_POINTER=y 939# CONFIG_DEBUG_NOTIFIERS is not set
940# CONFIG_DEBUG_CREDENTIALS is not set
791# CONFIG_BOOT_PRINTK_DELAY is not set 941# CONFIG_BOOT_PRINTK_DELAY is not set
792# CONFIG_RCU_TORTURE_TEST is not set 942# CONFIG_RCU_TORTURE_TEST is not set
793# CONFIG_RCU_CPU_STALL_DETECTOR is not set 943# CONFIG_RCU_CPU_STALL_DETECTOR is not set
794# CONFIG_BACKTRACE_SELF_TEST is not set 944# CONFIG_BACKTRACE_SELF_TEST is not set
795# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 945# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
946# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
796# CONFIG_FAULT_INJECTION is not set 947# CONFIG_FAULT_INJECTION is not set
797# CONFIG_LATENCYTOP is not set 948# CONFIG_LATENCYTOP is not set
798CONFIG_SYSCTL_SYSCALL_CHECK=y 949CONFIG_SYSCTL_SYSCALL_CHECK=y
950# CONFIG_PAGE_POISONING is not set
799CONFIG_HAVE_FUNCTION_TRACER=y 951CONFIG_HAVE_FUNCTION_TRACER=y
800 952CONFIG_TRACING_SUPPORT=y
801# 953CONFIG_FTRACE=y
802# Tracers
803#
804# CONFIG_FUNCTION_TRACER is not set 954# CONFIG_FUNCTION_TRACER is not set
805# CONFIG_SCHED_TRACER is not set 955# CONFIG_SCHED_TRACER is not set
806# CONFIG_CONTEXT_SWITCH_TRACER is not set 956# CONFIG_ENABLE_DEFAULT_TRACERS is not set
807# CONFIG_BOOT_TRACER is not set 957# CONFIG_BOOT_TRACER is not set
958CONFIG_BRANCH_PROFILE_NONE=y
959# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
960# CONFIG_PROFILE_ALL_BRANCHES is not set
808# CONFIG_STACK_TRACER is not set 961# CONFIG_STACK_TRACER is not set
809# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 962# CONFIG_KMEMTRACE is not set
963# CONFIG_WORKQUEUE_TRACER is not set
964# CONFIG_BLK_DEV_IO_TRACE is not set
810# CONFIG_SAMPLES is not set 965# CONFIG_SAMPLES is not set
811CONFIG_HAVE_ARCH_KGDB=y 966CONFIG_HAVE_ARCH_KGDB=y
812# CONFIG_KGDB is not set 967# CONFIG_KGDB is not set
968CONFIG_ARM_UNWIND=y
813CONFIG_DEBUG_USER=y 969CONFIG_DEBUG_USER=y
814CONFIG_DEBUG_ERRORS=y 970CONFIG_DEBUG_ERRORS=y
815# CONFIG_DEBUG_STACK_USAGE is not set 971# CONFIG_DEBUG_STACK_USAGE is not set
816CONFIG_DEBUG_LL=y 972CONFIG_DEBUG_LL=y
973# CONFIG_EARLY_PRINTK is not set
817# CONFIG_DEBUG_ICEDCC is not set 974# CONFIG_DEBUG_ICEDCC is not set
975# CONFIG_OC_ETM is not set
818CONFIG_DEBUG_S3C_UART=0 976CONFIG_DEBUG_S3C_UART=0
819 977
820# 978#
@@ -823,13 +981,19 @@ CONFIG_DEBUG_S3C_UART=0
823# CONFIG_KEYS is not set 981# CONFIG_KEYS is not set
824# CONFIG_SECURITY is not set 982# CONFIG_SECURITY is not set
825# CONFIG_SECURITYFS is not set 983# CONFIG_SECURITYFS is not set
826# CONFIG_SECURITY_FILE_CAPABILITIES is not set 984# CONFIG_DEFAULT_SECURITY_SELINUX is not set
985# CONFIG_DEFAULT_SECURITY_SMACK is not set
986# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
987CONFIG_DEFAULT_SECURITY_DAC=y
988CONFIG_DEFAULT_SECURITY=""
827# CONFIG_CRYPTO is not set 989# CONFIG_CRYPTO is not set
990# CONFIG_BINARY_PRINTF is not set
828 991
829# 992#
830# Library routines 993# Library routines
831# 994#
832CONFIG_BITREVERSE=y 995CONFIG_BITREVERSE=y
996CONFIG_GENERIC_FIND_LAST_BIT=y
833# CONFIG_CRC_CCITT is not set 997# CONFIG_CRC_CCITT is not set
834# CONFIG_CRC16 is not set 998# CONFIG_CRC16 is not set
835# CONFIG_CRC_T10DIF is not set 999# CONFIG_CRC_T10DIF is not set
@@ -838,6 +1002,10 @@ CONFIG_CRC32=y
838# CONFIG_CRC7 is not set 1002# CONFIG_CRC7 is not set
839# CONFIG_LIBCRC32C is not set 1003# CONFIG_LIBCRC32C is not set
840CONFIG_ZLIB_INFLATE=y 1004CONFIG_ZLIB_INFLATE=y
841CONFIG_PLIST=y 1005CONFIG_LZO_DECOMPRESS=y
1006CONFIG_DECOMPRESS_GZIP=y
1007CONFIG_DECOMPRESS_BZIP2=y
1008CONFIG_DECOMPRESS_LZMA=y
1009CONFIG_DECOMPRESS_LZO=y
842CONFIG_HAS_IOMEM=y 1010CONFIG_HAS_IOMEM=y
843CONFIG_HAS_DMA=y 1011CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/s5p6442_defconfig b/arch/arm/configs/s5p6442_defconfig
new file mode 100644
index 000000000000..74e20bfc0487
--- /dev/null
+++ b/arch/arm/configs/s5p6442_defconfig
@@ -0,0 +1,883 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc4
4# Mon Jan 25 08:50:28 2010
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_NO_IOPORT=y
10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_STACKTRACE_SUPPORT=y
12CONFIG_HAVE_LATENCYTOP_SUPPORT=y
13CONFIG_LOCKDEP_SUPPORT=y
14CONFIG_TRACE_IRQFLAGS_SUPPORT=y
15CONFIG_HARDIRQS_SW_RESEND=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_RWSEM_GENERIC_SPINLOCK=y
18CONFIG_GENERIC_HWEIGHT=y
19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
21CONFIG_VECTORS_BASE=0xffff0000
22CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
23CONFIG_CONSTRUCTORS=y
24
25#
26# General setup
27#
28CONFIG_EXPERIMENTAL=y
29CONFIG_BROKEN_ON_SMP=y
30CONFIG_INIT_ENV_ARG_LIMIT=32
31CONFIG_LOCALVERSION=""
32CONFIG_LOCALVERSION_AUTO=y
33CONFIG_HAVE_KERNEL_GZIP=y
34CONFIG_HAVE_KERNEL_LZO=y
35CONFIG_KERNEL_GZIP=y
36# CONFIG_KERNEL_BZIP2 is not set
37# CONFIG_KERNEL_LZMA is not set
38# CONFIG_KERNEL_LZO is not set
39CONFIG_SWAP=y
40# CONFIG_SYSVIPC is not set
41# CONFIG_BSD_PROCESS_ACCT is not set
42
43#
44# RCU Subsystem
45#
46CONFIG_TREE_RCU=y
47# CONFIG_TREE_PREEMPT_RCU is not set
48# CONFIG_TINY_RCU is not set
49# CONFIG_RCU_TRACE is not set
50CONFIG_RCU_FANOUT=32
51# CONFIG_RCU_FANOUT_EXACT is not set
52# CONFIG_TREE_RCU_TRACE is not set
53# CONFIG_IKCONFIG is not set
54CONFIG_LOG_BUF_SHIFT=17
55# CONFIG_GROUP_SCHED is not set
56# CONFIG_CGROUPS is not set
57CONFIG_SYSFS_DEPRECATED=y
58CONFIG_SYSFS_DEPRECATED_V2=y
59# CONFIG_RELAY is not set
60CONFIG_NAMESPACES=y
61# CONFIG_UTS_NS is not set
62# CONFIG_USER_NS is not set
63# CONFIG_PID_NS is not set
64CONFIG_BLK_DEV_INITRD=y
65CONFIG_INITRAMFS_SOURCE=""
66CONFIG_RD_GZIP=y
67CONFIG_RD_BZIP2=y
68CONFIG_RD_LZMA=y
69CONFIG_RD_LZO=y
70CONFIG_CC_OPTIMIZE_FOR_SIZE=y
71CONFIG_SYSCTL=y
72CONFIG_ANON_INODES=y
73# CONFIG_EMBEDDED is not set
74CONFIG_UID16=y
75CONFIG_SYSCTL_SYSCALL=y
76CONFIG_KALLSYMS=y
77CONFIG_KALLSYMS_ALL=y
78# CONFIG_KALLSYMS_EXTRA_PASS is not set
79CONFIG_HOTPLUG=y
80CONFIG_PRINTK=y
81CONFIG_BUG=y
82CONFIG_ELF_CORE=y
83CONFIG_BASE_FULL=y
84CONFIG_FUTEX=y
85CONFIG_EPOLL=y
86CONFIG_SIGNALFD=y
87CONFIG_TIMERFD=y
88CONFIG_EVENTFD=y
89CONFIG_SHMEM=y
90CONFIG_AIO=y
91
92#
93# Kernel Performance Events And Counters
94#
95CONFIG_VM_EVENT_COUNTERS=y
96CONFIG_SLUB_DEBUG=y
97CONFIG_COMPAT_BRK=y
98# CONFIG_SLAB is not set
99CONFIG_SLUB=y
100# CONFIG_SLOB is not set
101# CONFIG_PROFILING is not set
102CONFIG_HAVE_OPROFILE=y
103# CONFIG_KPROBES is not set
104CONFIG_HAVE_KPROBES=y
105CONFIG_HAVE_KRETPROBES=y
106CONFIG_HAVE_CLK=y
107
108#
109# GCOV-based kernel profiling
110#
111# CONFIG_SLOW_WORK is not set
112CONFIG_HAVE_GENERIC_DMA_COHERENT=y
113CONFIG_SLABINFO=y
114CONFIG_RT_MUTEXES=y
115CONFIG_BASE_SMALL=0
116CONFIG_MODULES=y
117# CONFIG_MODULE_FORCE_LOAD is not set
118CONFIG_MODULE_UNLOAD=y
119# CONFIG_MODULE_FORCE_UNLOAD is not set
120# CONFIG_MODVERSIONS is not set
121# CONFIG_MODULE_SRCVERSION_ALL is not set
122CONFIG_BLOCK=y
123CONFIG_LBDAF=y
124# CONFIG_BLK_DEV_BSG is not set
125# CONFIG_BLK_DEV_INTEGRITY is not set
126
127#
128# IO Schedulers
129#
130CONFIG_IOSCHED_NOOP=y
131CONFIG_IOSCHED_DEADLINE=y
132CONFIG_IOSCHED_CFQ=y
133# CONFIG_DEFAULT_DEADLINE is not set
134CONFIG_DEFAULT_CFQ=y
135# CONFIG_DEFAULT_NOOP is not set
136CONFIG_DEFAULT_IOSCHED="cfq"
137# CONFIG_INLINE_SPIN_TRYLOCK is not set
138# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
139# CONFIG_INLINE_SPIN_LOCK is not set
140# CONFIG_INLINE_SPIN_LOCK_BH is not set
141# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
142# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
143# CONFIG_INLINE_SPIN_UNLOCK is not set
144# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
145# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
146# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
147# CONFIG_INLINE_READ_TRYLOCK is not set
148# CONFIG_INLINE_READ_LOCK is not set
149# CONFIG_INLINE_READ_LOCK_BH is not set
150# CONFIG_INLINE_READ_LOCK_IRQ is not set
151# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
152# CONFIG_INLINE_READ_UNLOCK is not set
153# CONFIG_INLINE_READ_UNLOCK_BH is not set
154# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
155# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
156# CONFIG_INLINE_WRITE_TRYLOCK is not set
157# CONFIG_INLINE_WRITE_LOCK is not set
158# CONFIG_INLINE_WRITE_LOCK_BH is not set
159# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
160# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
161# CONFIG_INLINE_WRITE_UNLOCK is not set
162# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
163# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
164# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
165# CONFIG_MUTEX_SPIN_ON_OWNER is not set
166# CONFIG_FREEZER is not set
167
168#
169# System Type
170#
171CONFIG_MMU=y
172# CONFIG_ARCH_AAEC2000 is not set
173# CONFIG_ARCH_INTEGRATOR is not set
174# CONFIG_ARCH_REALVIEW is not set
175# CONFIG_ARCH_VERSATILE is not set
176# CONFIG_ARCH_AT91 is not set
177# CONFIG_ARCH_CLPS711X is not set
178# CONFIG_ARCH_GEMINI is not set
179# CONFIG_ARCH_EBSA110 is not set
180# CONFIG_ARCH_EP93XX is not set
181# CONFIG_ARCH_FOOTBRIDGE is not set
182# CONFIG_ARCH_MXC is not set
183# CONFIG_ARCH_STMP3XXX is not set
184# CONFIG_ARCH_NETX is not set
185# CONFIG_ARCH_H720X is not set
186# CONFIG_ARCH_NOMADIK is not set
187# CONFIG_ARCH_IOP13XX is not set
188# CONFIG_ARCH_IOP32X is not set
189# CONFIG_ARCH_IOP33X is not set
190# CONFIG_ARCH_IXP23XX is not set
191# CONFIG_ARCH_IXP2000 is not set
192# CONFIG_ARCH_IXP4XX is not set
193# CONFIG_ARCH_L7200 is not set
194# CONFIG_ARCH_DOVE is not set
195# CONFIG_ARCH_KIRKWOOD is not set
196# CONFIG_ARCH_LOKI is not set
197# CONFIG_ARCH_MV78XX0 is not set
198# CONFIG_ARCH_ORION5X is not set
199# CONFIG_ARCH_MMP is not set
200# CONFIG_ARCH_KS8695 is not set
201# CONFIG_ARCH_NS9XXX is not set
202# CONFIG_ARCH_W90X900 is not set
203# CONFIG_ARCH_PNX4008 is not set
204# CONFIG_ARCH_PXA is not set
205# CONFIG_ARCH_MSM is not set
206# CONFIG_ARCH_RPC is not set
207# CONFIG_ARCH_SA1100 is not set
208# CONFIG_ARCH_S3C2410 is not set
209# CONFIG_ARCH_S3C64XX is not set
210# CONFIG_ARCH_S5P6440 is not set
211CONFIG_ARCH_S5P6442=y
212# CONFIG_ARCH_S5PC1XX is not set
213# CONFIG_ARCH_SHARK is not set
214# CONFIG_ARCH_LH7A40X is not set
215# CONFIG_ARCH_U300 is not set
216# CONFIG_ARCH_DAVINCI is not set
217# CONFIG_ARCH_OMAP is not set
218# CONFIG_ARCH_BCMRING is not set
219# CONFIG_ARCH_U8500 is not set
220CONFIG_PLAT_SAMSUNG=y
221CONFIG_SAMSUNG_CLKSRC=y
222CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
223CONFIG_SAMSUNG_IRQ_UART=y
224CONFIG_SAMSUNG_GPIOLIB_4BIT=y
225CONFIG_S3C_GPIO_CFG_S3C24XX=y
226CONFIG_S3C_GPIO_CFG_S3C64XX=y
227CONFIG_S3C_GPIO_PULL_UPDOWN=y
228CONFIG_SAMSUNG_GPIO_EXTRA=0
229# CONFIG_S3C_ADC is not set
230
231#
232# Power management
233#
234CONFIG_PLAT_S3C=y
235
236#
237# Boot options
238#
239# CONFIG_S3C_BOOT_ERROR_RESET is not set
240CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
241CONFIG_S3C_LOWLEVEL_UART_PORT=1
242CONFIG_S3C_GPIO_SPACE=0
243CONFIG_S3C_GPIO_TRACK=y
244CONFIG_PLAT_S5P=y
245CONFIG_CPU_S5P6442=y
246CONFIG_MACH_SMDK6442=y
247
248#
249# Processor Type
250#
251CONFIG_CPU_V6=y
252CONFIG_CPU_32v6K=y
253CONFIG_CPU_32v6=y
254CONFIG_CPU_ABRT_EV6=y
255CONFIG_CPU_PABRT_V6=y
256CONFIG_CPU_CACHE_V6=y
257CONFIG_CPU_CACHE_VIPT=y
258CONFIG_CPU_COPY_V6=y
259CONFIG_CPU_TLB_V6=y
260CONFIG_CPU_HAS_ASID=y
261CONFIG_CPU_CP15=y
262CONFIG_CPU_CP15_MMU=y
263
264#
265# Processor Features
266#
267CONFIG_ARM_THUMB=y
268# CONFIG_CPU_ICACHE_DISABLE is not set
269# CONFIG_CPU_DCACHE_DISABLE is not set
270# CONFIG_CPU_BPREDICT_DISABLE is not set
271CONFIG_ARM_L1_CACHE_SHIFT=5
272# CONFIG_ARM_ERRATA_411920 is not set
273CONFIG_ARM_VIC=y
274CONFIG_ARM_VIC_NR=2
275
276#
277# Bus support
278#
279# CONFIG_PCI_SYSCALL is not set
280# CONFIG_ARCH_SUPPORTS_MSI is not set
281# CONFIG_PCCARD is not set
282
283#
284# Kernel Features
285#
286CONFIG_VMSPLIT_3G=y
287# CONFIG_VMSPLIT_2G is not set
288# CONFIG_VMSPLIT_1G is not set
289CONFIG_PAGE_OFFSET=0xC0000000
290CONFIG_PREEMPT_NONE=y
291# CONFIG_PREEMPT_VOLUNTARY is not set
292# CONFIG_PREEMPT is not set
293CONFIG_HZ=200
294CONFIG_AEABI=y
295CONFIG_OABI_COMPAT=y
296# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
297# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
298# CONFIG_HIGHMEM is not set
299CONFIG_SELECT_MEMORY_MODEL=y
300CONFIG_FLATMEM_MANUAL=y
301# CONFIG_DISCONTIGMEM_MANUAL is not set
302# CONFIG_SPARSEMEM_MANUAL is not set
303CONFIG_FLATMEM=y
304CONFIG_FLAT_NODE_MEM_MAP=y
305CONFIG_PAGEFLAGS_EXTENDED=y
306CONFIG_SPLIT_PTLOCK_CPUS=999999
307# CONFIG_PHYS_ADDR_T_64BIT is not set
308CONFIG_ZONE_DMA_FLAG=0
309CONFIG_VIRT_TO_BUS=y
310# CONFIG_KSM is not set
311CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
312CONFIG_ALIGNMENT_TRAP=y
313# CONFIG_UACCESS_WITH_MEMCPY is not set
314
315#
316# Boot options
317#
318CONFIG_ZBOOT_ROM_TEXT=0
319CONFIG_ZBOOT_ROM_BSS=0
320CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
321# CONFIG_XIP_KERNEL is not set
322# CONFIG_KEXEC is not set
323
324#
325# CPU Power Management
326#
327# CONFIG_CPU_IDLE is not set
328
329#
330# Floating point emulation
331#
332
333#
334# At least one emulation must be selected
335#
336CONFIG_FPE_NWFPE=y
337# CONFIG_FPE_NWFPE_XP is not set
338# CONFIG_FPE_FASTFPE is not set
339# CONFIG_VFP is not set
340
341#
342# Userspace binary formats
343#
344CONFIG_BINFMT_ELF=y
345# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
346CONFIG_HAVE_AOUT=y
347# CONFIG_BINFMT_AOUT is not set
348# CONFIG_BINFMT_MISC is not set
349
350#
351# Power management options
352#
353# CONFIG_PM is not set
354CONFIG_ARCH_SUSPEND_POSSIBLE=y
355# CONFIG_NET is not set
356
357#
358# Device Drivers
359#
360
361#
362# Generic Driver Options
363#
364CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
365# CONFIG_DEVTMPFS is not set
366CONFIG_STANDALONE=y
367# CONFIG_PREVENT_FIRMWARE_BUILD is not set
368CONFIG_FW_LOADER=y
369CONFIG_FIRMWARE_IN_KERNEL=y
370CONFIG_EXTRA_FIRMWARE=""
371# CONFIG_DEBUG_DRIVER is not set
372# CONFIG_DEBUG_DEVRES is not set
373# CONFIG_SYS_HYPERVISOR is not set
374# CONFIG_MTD is not set
375# CONFIG_PARPORT is not set
376CONFIG_BLK_DEV=y
377# CONFIG_BLK_DEV_COW_COMMON is not set
378CONFIG_BLK_DEV_LOOP=y
379# CONFIG_BLK_DEV_CRYPTOLOOP is not set
380
381#
382# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
383#
384CONFIG_BLK_DEV_RAM=y
385CONFIG_BLK_DEV_RAM_COUNT=16
386CONFIG_BLK_DEV_RAM_SIZE=8192
387# CONFIG_BLK_DEV_XIP is not set
388# CONFIG_CDROM_PKTCDVD is not set
389# CONFIG_MG_DISK is not set
390# CONFIG_MISC_DEVICES is not set
391CONFIG_HAVE_IDE=y
392# CONFIG_IDE is not set
393
394#
395# SCSI device support
396#
397# CONFIG_RAID_ATTRS is not set
398CONFIG_SCSI=y
399CONFIG_SCSI_DMA=y
400# CONFIG_SCSI_TGT is not set
401# CONFIG_SCSI_NETLINK is not set
402CONFIG_SCSI_PROC_FS=y
403
404#
405# SCSI support type (disk, tape, CD-ROM)
406#
407CONFIG_BLK_DEV_SD=y
408# CONFIG_CHR_DEV_ST is not set
409# CONFIG_CHR_DEV_OSST is not set
410# CONFIG_BLK_DEV_SR is not set
411CONFIG_CHR_DEV_SG=y
412# CONFIG_CHR_DEV_SCH is not set
413# CONFIG_SCSI_MULTI_LUN is not set
414# CONFIG_SCSI_CONSTANTS is not set
415# CONFIG_SCSI_LOGGING is not set
416# CONFIG_SCSI_SCAN_ASYNC is not set
417CONFIG_SCSI_WAIT_SCAN=m
418
419#
420# SCSI Transports
421#
422# CONFIG_SCSI_SPI_ATTRS is not set
423# CONFIG_SCSI_FC_ATTRS is not set
424# CONFIG_SCSI_SAS_LIBSAS is not set
425# CONFIG_SCSI_SRP_ATTRS is not set
426CONFIG_SCSI_LOWLEVEL=y
427# CONFIG_LIBFC is not set
428# CONFIG_LIBFCOE is not set
429# CONFIG_SCSI_DEBUG is not set
430# CONFIG_SCSI_DH is not set
431# CONFIG_SCSI_OSD_INITIATOR is not set
432# CONFIG_ATA is not set
433# CONFIG_MD is not set
434# CONFIG_PHONE is not set
435
436#
437# Input device support
438#
439CONFIG_INPUT=y
440# CONFIG_INPUT_FF_MEMLESS is not set
441# CONFIG_INPUT_POLLDEV is not set
442# CONFIG_INPUT_SPARSEKMAP is not set
443
444#
445# Userland interfaces
446#
447CONFIG_INPUT_MOUSEDEV=y
448CONFIG_INPUT_MOUSEDEV_PSAUX=y
449CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
450CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
451# CONFIG_INPUT_JOYDEV is not set
452CONFIG_INPUT_EVDEV=y
453# CONFIG_INPUT_EVBUG is not set
454
455#
456# Input Device Drivers
457#
458# CONFIG_INPUT_KEYBOARD is not set
459# CONFIG_INPUT_MOUSE is not set
460# CONFIG_INPUT_JOYSTICK is not set
461# CONFIG_INPUT_TABLET is not set
462CONFIG_INPUT_TOUCHSCREEN=y
463# CONFIG_TOUCHSCREEN_AD7879 is not set
464# CONFIG_TOUCHSCREEN_DYNAPRO is not set
465# CONFIG_TOUCHSCREEN_FUJITSU is not set
466# CONFIG_TOUCHSCREEN_GUNZE is not set
467# CONFIG_TOUCHSCREEN_ELO is not set
468# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
469# CONFIG_TOUCHSCREEN_MTOUCH is not set
470# CONFIG_TOUCHSCREEN_INEXIO is not set
471# CONFIG_TOUCHSCREEN_MK712 is not set
472# CONFIG_TOUCHSCREEN_PENMOUNT is not set
473# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
474# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
475# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
476# CONFIG_TOUCHSCREEN_W90X900 is not set
477# CONFIG_INPUT_MISC is not set
478
479#
480# Hardware I/O ports
481#
482CONFIG_SERIO=y
483CONFIG_SERIO_SERPORT=y
484# CONFIG_SERIO_RAW is not set
485# CONFIG_SERIO_ALTERA_PS2 is not set
486# CONFIG_GAMEPORT is not set
487
488#
489# Character devices
490#
491CONFIG_VT=y
492CONFIG_CONSOLE_TRANSLATIONS=y
493CONFIG_VT_CONSOLE=y
494CONFIG_HW_CONSOLE=y
495# CONFIG_VT_HW_CONSOLE_BINDING is not set
496CONFIG_DEVKMEM=y
497# CONFIG_SERIAL_NONSTANDARD is not set
498
499#
500# Serial drivers
501#
502CONFIG_SERIAL_8250=y
503# CONFIG_SERIAL_8250_CONSOLE is not set
504CONFIG_SERIAL_8250_NR_UARTS=3
505CONFIG_SERIAL_8250_RUNTIME_UARTS=3
506# CONFIG_SERIAL_8250_EXTENDED is not set
507
508#
509# Non-8250 serial port support
510#
511CONFIG_SERIAL_SAMSUNG=y
512CONFIG_SERIAL_SAMSUNG_UARTS=3
513# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
514CONFIG_SERIAL_SAMSUNG_CONSOLE=y
515CONFIG_SERIAL_S5PV210=y
516CONFIG_SERIAL_CORE=y
517CONFIG_SERIAL_CORE_CONSOLE=y
518CONFIG_UNIX98_PTYS=y
519# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
520CONFIG_LEGACY_PTYS=y
521CONFIG_LEGACY_PTY_COUNT=256
522# CONFIG_IPMI_HANDLER is not set
523CONFIG_HW_RANDOM=y
524# CONFIG_HW_RANDOM_TIMERIOMEM is not set
525# CONFIG_R3964 is not set
526# CONFIG_RAW_DRIVER is not set
527# CONFIG_TCG_TPM is not set
528# CONFIG_I2C is not set
529# CONFIG_SPI is not set
530
531#
532# PPS support
533#
534# CONFIG_PPS is not set
535CONFIG_ARCH_REQUIRE_GPIOLIB=y
536CONFIG_GPIOLIB=y
537# CONFIG_DEBUG_GPIO is not set
538# CONFIG_GPIO_SYSFS is not set
539
540#
541# Memory mapped GPIO expanders:
542#
543
544#
545# I2C GPIO expanders:
546#
547
548#
549# PCI GPIO expanders:
550#
551
552#
553# SPI GPIO expanders:
554#
555
556#
557# AC97 GPIO expanders:
558#
559# CONFIG_W1 is not set
560# CONFIG_POWER_SUPPLY is not set
561# CONFIG_HWMON is not set
562# CONFIG_THERMAL is not set
563# CONFIG_WATCHDOG is not set
564CONFIG_SSB_POSSIBLE=y
565
566#
567# Sonics Silicon Backplane
568#
569# CONFIG_SSB is not set
570
571#
572# Multifunction device drivers
573#
574# CONFIG_MFD_CORE is not set
575# CONFIG_MFD_SM501 is not set
576# CONFIG_MFD_ASIC3 is not set
577# CONFIG_HTC_EGPIO is not set
578# CONFIG_HTC_PASIC3 is not set
579# CONFIG_MFD_TMIO is not set
580# CONFIG_MFD_T7L66XB is not set
581# CONFIG_MFD_TC6387XB is not set
582# CONFIG_MFD_TC6393XB is not set
583# CONFIG_REGULATOR is not set
584# CONFIG_MEDIA_SUPPORT is not set
585
586#
587# Graphics support
588#
589# CONFIG_VGASTATE is not set
590# CONFIG_VIDEO_OUTPUT_CONTROL is not set
591# CONFIG_FB is not set
592# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
593
594#
595# Display device support
596#
597# CONFIG_DISPLAY_SUPPORT is not set
598
599#
600# Console display driver support
601#
602# CONFIG_VGA_CONSOLE is not set
603CONFIG_DUMMY_CONSOLE=y
604# CONFIG_SOUND is not set
605# CONFIG_HID_SUPPORT is not set
606# CONFIG_USB_SUPPORT is not set
607# CONFIG_MMC is not set
608# CONFIG_MEMSTICK is not set
609# CONFIG_NEW_LEDS is not set
610# CONFIG_ACCESSIBILITY is not set
611CONFIG_RTC_LIB=y
612# CONFIG_RTC_CLASS is not set
613# CONFIG_DMADEVICES is not set
614# CONFIG_AUXDISPLAY is not set
615# CONFIG_UIO is not set
616
617#
618# TI VLYNQ
619#
620# CONFIG_STAGING is not set
621
622#
623# File systems
624#
625CONFIG_EXT2_FS=y
626# CONFIG_EXT2_FS_XATTR is not set
627# CONFIG_EXT2_FS_XIP is not set
628# CONFIG_EXT3_FS is not set
629# CONFIG_EXT4_FS is not set
630# CONFIG_REISERFS_FS is not set
631# CONFIG_JFS_FS is not set
632CONFIG_FS_POSIX_ACL=y
633# CONFIG_XFS_FS is not set
634# CONFIG_GFS2_FS is not set
635# CONFIG_BTRFS_FS is not set
636# CONFIG_NILFS2_FS is not set
637CONFIG_FILE_LOCKING=y
638CONFIG_FSNOTIFY=y
639CONFIG_DNOTIFY=y
640CONFIG_INOTIFY=y
641CONFIG_INOTIFY_USER=y
642# CONFIG_QUOTA is not set
643# CONFIG_AUTOFS_FS is not set
644# CONFIG_AUTOFS4_FS is not set
645# CONFIG_FUSE_FS is not set
646CONFIG_GENERIC_ACL=y
647
648#
649# Caches
650#
651# CONFIG_FSCACHE is not set
652
653#
654# CD-ROM/DVD Filesystems
655#
656# CONFIG_ISO9660_FS is not set
657# CONFIG_UDF_FS is not set
658
659#
660# DOS/FAT/NT Filesystems
661#
662CONFIG_FAT_FS=y
663CONFIG_MSDOS_FS=y
664CONFIG_VFAT_FS=y
665CONFIG_FAT_DEFAULT_CODEPAGE=437
666CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
667# CONFIG_NTFS_FS is not set
668
669#
670# Pseudo filesystems
671#
672CONFIG_PROC_FS=y
673CONFIG_PROC_SYSCTL=y
674CONFIG_PROC_PAGE_MONITOR=y
675CONFIG_SYSFS=y
676CONFIG_TMPFS=y
677CONFIG_TMPFS_POSIX_ACL=y
678# CONFIG_HUGETLB_PAGE is not set
679# CONFIG_CONFIGFS_FS is not set
680CONFIG_MISC_FILESYSTEMS=y
681# CONFIG_ADFS_FS is not set
682# CONFIG_AFFS_FS is not set
683# CONFIG_HFS_FS is not set
684# CONFIG_HFSPLUS_FS is not set
685# CONFIG_BEFS_FS is not set
686# CONFIG_BFS_FS is not set
687# CONFIG_EFS_FS is not set
688CONFIG_CRAMFS=y
689# CONFIG_SQUASHFS is not set
690# CONFIG_VXFS_FS is not set
691# CONFIG_MINIX_FS is not set
692# CONFIG_OMFS_FS is not set
693# CONFIG_HPFS_FS is not set
694# CONFIG_QNX4FS_FS is not set
695CONFIG_ROMFS_FS=y
696CONFIG_ROMFS_BACKED_BY_BLOCK=y
697# CONFIG_ROMFS_BACKED_BY_MTD is not set
698# CONFIG_ROMFS_BACKED_BY_BOTH is not set
699CONFIG_ROMFS_ON_BLOCK=y
700# CONFIG_SYSV_FS is not set
701# CONFIG_UFS_FS is not set
702
703#
704# Partition Types
705#
706CONFIG_PARTITION_ADVANCED=y
707# CONFIG_ACORN_PARTITION is not set
708# CONFIG_OSF_PARTITION is not set
709# CONFIG_AMIGA_PARTITION is not set
710# CONFIG_ATARI_PARTITION is not set
711# CONFIG_MAC_PARTITION is not set
712CONFIG_MSDOS_PARTITION=y
713CONFIG_BSD_DISKLABEL=y
714# CONFIG_MINIX_SUBPARTITION is not set
715CONFIG_SOLARIS_X86_PARTITION=y
716# CONFIG_UNIXWARE_DISKLABEL is not set
717# CONFIG_LDM_PARTITION is not set
718# CONFIG_SGI_PARTITION is not set
719# CONFIG_ULTRIX_PARTITION is not set
720# CONFIG_SUN_PARTITION is not set
721# CONFIG_KARMA_PARTITION is not set
722# CONFIG_EFI_PARTITION is not set
723# CONFIG_SYSV68_PARTITION is not set
724CONFIG_NLS=y
725CONFIG_NLS_DEFAULT="iso8859-1"
726CONFIG_NLS_CODEPAGE_437=y
727# CONFIG_NLS_CODEPAGE_737 is not set
728# CONFIG_NLS_CODEPAGE_775 is not set
729# CONFIG_NLS_CODEPAGE_850 is not set
730# CONFIG_NLS_CODEPAGE_852 is not set
731# CONFIG_NLS_CODEPAGE_855 is not set
732# CONFIG_NLS_CODEPAGE_857 is not set
733# CONFIG_NLS_CODEPAGE_860 is not set
734# CONFIG_NLS_CODEPAGE_861 is not set
735# CONFIG_NLS_CODEPAGE_862 is not set
736# CONFIG_NLS_CODEPAGE_863 is not set
737# CONFIG_NLS_CODEPAGE_864 is not set
738# CONFIG_NLS_CODEPAGE_865 is not set
739# CONFIG_NLS_CODEPAGE_866 is not set
740# CONFIG_NLS_CODEPAGE_869 is not set
741# CONFIG_NLS_CODEPAGE_936 is not set
742# CONFIG_NLS_CODEPAGE_950 is not set
743# CONFIG_NLS_CODEPAGE_932 is not set
744# CONFIG_NLS_CODEPAGE_949 is not set
745# CONFIG_NLS_CODEPAGE_874 is not set
746# CONFIG_NLS_ISO8859_8 is not set
747# CONFIG_NLS_CODEPAGE_1250 is not set
748# CONFIG_NLS_CODEPAGE_1251 is not set
749CONFIG_NLS_ASCII=y
750CONFIG_NLS_ISO8859_1=y
751# CONFIG_NLS_ISO8859_2 is not set
752# CONFIG_NLS_ISO8859_3 is not set
753# CONFIG_NLS_ISO8859_4 is not set
754# CONFIG_NLS_ISO8859_5 is not set
755# CONFIG_NLS_ISO8859_6 is not set
756# CONFIG_NLS_ISO8859_7 is not set
757# CONFIG_NLS_ISO8859_9 is not set
758# CONFIG_NLS_ISO8859_13 is not set
759# CONFIG_NLS_ISO8859_14 is not set
760# CONFIG_NLS_ISO8859_15 is not set
761# CONFIG_NLS_KOI8_R is not set
762# CONFIG_NLS_KOI8_U is not set
763# CONFIG_NLS_UTF8 is not set
764
765#
766# Kernel hacking
767#
768# CONFIG_PRINTK_TIME is not set
769CONFIG_ENABLE_WARN_DEPRECATED=y
770CONFIG_ENABLE_MUST_CHECK=y
771CONFIG_FRAME_WARN=1024
772CONFIG_MAGIC_SYSRQ=y
773# CONFIG_STRIP_ASM_SYMS is not set
774# CONFIG_UNUSED_SYMBOLS is not set
775# CONFIG_DEBUG_FS is not set
776# CONFIG_HEADERS_CHECK is not set
777CONFIG_DEBUG_KERNEL=y
778# CONFIG_DEBUG_SHIRQ is not set
779CONFIG_DETECT_SOFTLOCKUP=y
780# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
781CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
782CONFIG_DETECT_HUNG_TASK=y
783# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
784CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
785CONFIG_SCHED_DEBUG=y
786# CONFIG_SCHEDSTATS is not set
787# CONFIG_TIMER_STATS is not set
788# CONFIG_DEBUG_OBJECTS is not set
789# CONFIG_SLUB_DEBUG_ON is not set
790# CONFIG_SLUB_STATS is not set
791# CONFIG_DEBUG_KMEMLEAK is not set
792CONFIG_DEBUG_RT_MUTEXES=y
793CONFIG_DEBUG_PI_LIST=y
794# CONFIG_RT_MUTEX_TESTER is not set
795CONFIG_DEBUG_SPINLOCK=y
796CONFIG_DEBUG_MUTEXES=y
797# CONFIG_DEBUG_LOCK_ALLOC is not set
798# CONFIG_PROVE_LOCKING is not set
799# CONFIG_LOCK_STAT is not set
800CONFIG_DEBUG_SPINLOCK_SLEEP=y
801# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
802# CONFIG_DEBUG_KOBJECT is not set
803CONFIG_DEBUG_BUGVERBOSE=y
804CONFIG_DEBUG_INFO=y
805# CONFIG_DEBUG_VM is not set
806# CONFIG_DEBUG_WRITECOUNT is not set
807CONFIG_DEBUG_MEMORY_INIT=y
808# CONFIG_DEBUG_LIST is not set
809# CONFIG_DEBUG_SG is not set
810# CONFIG_DEBUG_NOTIFIERS is not set
811# CONFIG_DEBUG_CREDENTIALS is not set
812CONFIG_FRAME_POINTER=y
813# CONFIG_BOOT_PRINTK_DELAY is not set
814# CONFIG_RCU_TORTURE_TEST is not set
815# CONFIG_RCU_CPU_STALL_DETECTOR is not set
816# CONFIG_BACKTRACE_SELF_TEST is not set
817# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
818# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
819# CONFIG_FAULT_INJECTION is not set
820# CONFIG_LATENCYTOP is not set
821CONFIG_SYSCTL_SYSCALL_CHECK=y
822# CONFIG_PAGE_POISONING is not set
823CONFIG_HAVE_FUNCTION_TRACER=y
824CONFIG_TRACING_SUPPORT=y
825CONFIG_FTRACE=y
826# CONFIG_FUNCTION_TRACER is not set
827# CONFIG_SCHED_TRACER is not set
828# CONFIG_ENABLE_DEFAULT_TRACERS is not set
829# CONFIG_BOOT_TRACER is not set
830CONFIG_BRANCH_PROFILE_NONE=y
831# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
832# CONFIG_PROFILE_ALL_BRANCHES is not set
833# CONFIG_STACK_TRACER is not set
834# CONFIG_KMEMTRACE is not set
835# CONFIG_WORKQUEUE_TRACER is not set
836# CONFIG_BLK_DEV_IO_TRACE is not set
837# CONFIG_SAMPLES is not set
838CONFIG_HAVE_ARCH_KGDB=y
839# CONFIG_KGDB is not set
840# CONFIG_ARM_UNWIND is not set
841CONFIG_DEBUG_USER=y
842CONFIG_DEBUG_ERRORS=y
843# CONFIG_DEBUG_STACK_USAGE is not set
844CONFIG_DEBUG_LL=y
845# CONFIG_EARLY_PRINTK is not set
846# CONFIG_DEBUG_ICEDCC is not set
847# CONFIG_OC_ETM is not set
848CONFIG_DEBUG_S3C_UART=1
849
850#
851# Security options
852#
853# CONFIG_KEYS is not set
854# CONFIG_SECURITY is not set
855# CONFIG_SECURITYFS is not set
856# CONFIG_DEFAULT_SECURITY_SELINUX is not set
857# CONFIG_DEFAULT_SECURITY_SMACK is not set
858# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
859CONFIG_DEFAULT_SECURITY_DAC=y
860CONFIG_DEFAULT_SECURITY=""
861# CONFIG_CRYPTO is not set
862# CONFIG_BINARY_PRINTF is not set
863
864#
865# Library routines
866#
867CONFIG_BITREVERSE=y
868CONFIG_GENERIC_FIND_LAST_BIT=y
869CONFIG_CRC_CCITT=y
870# CONFIG_CRC16 is not set
871# CONFIG_CRC_T10DIF is not set
872# CONFIG_CRC_ITU_T is not set
873CONFIG_CRC32=y
874# CONFIG_CRC7 is not set
875# CONFIG_LIBCRC32C is not set
876CONFIG_ZLIB_INFLATE=y
877CONFIG_LZO_DECOMPRESS=y
878CONFIG_DECOMPRESS_GZIP=y
879CONFIG_DECOMPRESS_BZIP2=y
880CONFIG_DECOMPRESS_LZMA=y
881CONFIG_DECOMPRESS_LZO=y
882CONFIG_HAS_IOMEM=y
883CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/s5pc110_defconfig b/arch/arm/configs/s5pc110_defconfig
new file mode 100644
index 000000000000..6ea636131ac8
--- /dev/null
+++ b/arch/arm/configs/s5pc110_defconfig
@@ -0,0 +1,894 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc4
4# Wed Feb 24 15:36:54 2010
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_NO_IOPORT=y
10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_STACKTRACE_SUPPORT=y
12CONFIG_HAVE_LATENCYTOP_SUPPORT=y
13CONFIG_LOCKDEP_SUPPORT=y
14CONFIG_TRACE_IRQFLAGS_SUPPORT=y
15CONFIG_HARDIRQS_SW_RESEND=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_RWSEM_GENERIC_SPINLOCK=y
18CONFIG_GENERIC_HWEIGHT=y
19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
21CONFIG_ARM_L1_CACHE_SHIFT_6=y
22CONFIG_VECTORS_BASE=0xffff0000
23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
25
26#
27# General setup
28#
29CONFIG_EXPERIMENTAL=y
30CONFIG_BROKEN_ON_SMP=y
31CONFIG_LOCK_KERNEL=y
32CONFIG_INIT_ENV_ARG_LIMIT=32
33CONFIG_LOCALVERSION=""
34CONFIG_LOCALVERSION_AUTO=y
35CONFIG_HAVE_KERNEL_GZIP=y
36CONFIG_HAVE_KERNEL_LZO=y
37CONFIG_KERNEL_GZIP=y
38# CONFIG_KERNEL_BZIP2 is not set
39# CONFIG_KERNEL_LZMA is not set
40# CONFIG_KERNEL_LZO is not set
41CONFIG_SWAP=y
42# CONFIG_SYSVIPC is not set
43# CONFIG_BSD_PROCESS_ACCT is not set
44
45#
46# RCU Subsystem
47#
48CONFIG_TREE_RCU=y
49# CONFIG_TREE_PREEMPT_RCU is not set
50# CONFIG_TINY_RCU is not set
51# CONFIG_RCU_TRACE is not set
52CONFIG_RCU_FANOUT=32
53# CONFIG_RCU_FANOUT_EXACT is not set
54# CONFIG_TREE_RCU_TRACE is not set
55# CONFIG_IKCONFIG is not set
56CONFIG_LOG_BUF_SHIFT=17
57# CONFIG_GROUP_SCHED is not set
58# CONFIG_CGROUPS is not set
59CONFIG_SYSFS_DEPRECATED=y
60CONFIG_SYSFS_DEPRECATED_V2=y
61# CONFIG_RELAY is not set
62CONFIG_NAMESPACES=y
63# CONFIG_UTS_NS is not set
64# CONFIG_USER_NS is not set
65# CONFIG_PID_NS is not set
66CONFIG_BLK_DEV_INITRD=y
67CONFIG_INITRAMFS_SOURCE=""
68CONFIG_RD_GZIP=y
69CONFIG_RD_BZIP2=y
70CONFIG_RD_LZMA=y
71CONFIG_RD_LZO=y
72CONFIG_CC_OPTIMIZE_FOR_SIZE=y
73CONFIG_SYSCTL=y
74CONFIG_ANON_INODES=y
75# CONFIG_EMBEDDED is not set
76CONFIG_UID16=y
77CONFIG_SYSCTL_SYSCALL=y
78CONFIG_KALLSYMS=y
79CONFIG_KALLSYMS_ALL=y
80# CONFIG_KALLSYMS_EXTRA_PASS is not set
81CONFIG_HOTPLUG=y
82CONFIG_PRINTK=y
83CONFIG_BUG=y
84CONFIG_ELF_CORE=y
85CONFIG_BASE_FULL=y
86CONFIG_FUTEX=y
87CONFIG_EPOLL=y
88CONFIG_SIGNALFD=y
89CONFIG_TIMERFD=y
90CONFIG_EVENTFD=y
91CONFIG_SHMEM=y
92CONFIG_AIO=y
93
94#
95# Kernel Performance Events And Counters
96#
97CONFIG_VM_EVENT_COUNTERS=y
98CONFIG_SLUB_DEBUG=y
99CONFIG_COMPAT_BRK=y
100# CONFIG_SLAB is not set
101CONFIG_SLUB=y
102# CONFIG_SLOB is not set
103# CONFIG_PROFILING is not set
104CONFIG_HAVE_OPROFILE=y
105# CONFIG_KPROBES is not set
106CONFIG_HAVE_KPROBES=y
107CONFIG_HAVE_KRETPROBES=y
108CONFIG_HAVE_CLK=y
109
110#
111# GCOV-based kernel profiling
112#
113# CONFIG_SLOW_WORK is not set
114CONFIG_HAVE_GENERIC_DMA_COHERENT=y
115CONFIG_SLABINFO=y
116CONFIG_RT_MUTEXES=y
117CONFIG_BASE_SMALL=0
118CONFIG_MODULES=y
119# CONFIG_MODULE_FORCE_LOAD is not set
120CONFIG_MODULE_UNLOAD=y
121# CONFIG_MODULE_FORCE_UNLOAD is not set
122# CONFIG_MODVERSIONS is not set
123# CONFIG_MODULE_SRCVERSION_ALL is not set
124CONFIG_BLOCK=y
125CONFIG_LBDAF=y
126# CONFIG_BLK_DEV_BSG is not set
127# CONFIG_BLK_DEV_INTEGRITY is not set
128
129#
130# IO Schedulers
131#
132CONFIG_IOSCHED_NOOP=y
133CONFIG_IOSCHED_DEADLINE=y
134CONFIG_IOSCHED_CFQ=y
135# CONFIG_DEFAULT_DEADLINE is not set
136CONFIG_DEFAULT_CFQ=y
137# CONFIG_DEFAULT_NOOP is not set
138CONFIG_DEFAULT_IOSCHED="cfq"
139# CONFIG_INLINE_SPIN_TRYLOCK is not set
140# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
141# CONFIG_INLINE_SPIN_LOCK is not set
142# CONFIG_INLINE_SPIN_LOCK_BH is not set
143# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
144# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
145# CONFIG_INLINE_SPIN_UNLOCK is not set
146# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
147# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
148# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
149# CONFIG_INLINE_READ_TRYLOCK is not set
150# CONFIG_INLINE_READ_LOCK is not set
151# CONFIG_INLINE_READ_LOCK_BH is not set
152# CONFIG_INLINE_READ_LOCK_IRQ is not set
153# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
154# CONFIG_INLINE_READ_UNLOCK is not set
155# CONFIG_INLINE_READ_UNLOCK_BH is not set
156# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
157# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
158# CONFIG_INLINE_WRITE_TRYLOCK is not set
159# CONFIG_INLINE_WRITE_LOCK is not set
160# CONFIG_INLINE_WRITE_LOCK_BH is not set
161# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
162# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
163# CONFIG_INLINE_WRITE_UNLOCK is not set
164# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
165# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
166# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
167# CONFIG_MUTEX_SPIN_ON_OWNER is not set
168# CONFIG_FREEZER is not set
169
170#
171# System Type
172#
173CONFIG_MMU=y
174# CONFIG_ARCH_AAEC2000 is not set
175# CONFIG_ARCH_INTEGRATOR is not set
176# CONFIG_ARCH_REALVIEW is not set
177# CONFIG_ARCH_VERSATILE is not set
178# CONFIG_ARCH_AT91 is not set
179# CONFIG_ARCH_CLPS711X is not set
180# CONFIG_ARCH_GEMINI is not set
181# CONFIG_ARCH_EBSA110 is not set
182# CONFIG_ARCH_EP93XX is not set
183# CONFIG_ARCH_FOOTBRIDGE is not set
184# CONFIG_ARCH_MXC is not set
185# CONFIG_ARCH_STMP3XXX is not set
186# CONFIG_ARCH_NETX is not set
187# CONFIG_ARCH_H720X is not set
188# CONFIG_ARCH_NOMADIK is not set
189# CONFIG_ARCH_IOP13XX is not set
190# CONFIG_ARCH_IOP32X is not set
191# CONFIG_ARCH_IOP33X is not set
192# CONFIG_ARCH_IXP23XX is not set
193# CONFIG_ARCH_IXP2000 is not set
194# CONFIG_ARCH_IXP4XX is not set
195# CONFIG_ARCH_L7200 is not set
196# CONFIG_ARCH_DOVE is not set
197# CONFIG_ARCH_KIRKWOOD is not set
198# CONFIG_ARCH_LOKI is not set
199# CONFIG_ARCH_MV78XX0 is not set
200# CONFIG_ARCH_ORION5X is not set
201# CONFIG_ARCH_MMP is not set
202# CONFIG_ARCH_KS8695 is not set
203# CONFIG_ARCH_NS9XXX is not set
204# CONFIG_ARCH_W90X900 is not set
205# CONFIG_ARCH_PNX4008 is not set
206# CONFIG_ARCH_PXA is not set
207# CONFIG_ARCH_MSM is not set
208# CONFIG_ARCH_RPC is not set
209# CONFIG_ARCH_SA1100 is not set
210# CONFIG_ARCH_S3C2410 is not set
211# CONFIG_ARCH_S3C64XX is not set
212# CONFIG_ARCH_S5P6440 is not set
213# CONFIG_ARCH_S5P6442 is not set
214# CONFIG_ARCH_S5PC1XX is not set
215CONFIG_ARCH_S5PV210=y
216# CONFIG_ARCH_SHARK is not set
217# CONFIG_ARCH_LH7A40X is not set
218# CONFIG_ARCH_U300 is not set
219# CONFIG_ARCH_DAVINCI is not set
220# CONFIG_ARCH_OMAP is not set
221# CONFIG_ARCH_BCMRING is not set
222# CONFIG_ARCH_U8500 is not set
223CONFIG_PLAT_SAMSUNG=y
224
225#
226# Boot options
227#
228# CONFIG_S3C_BOOT_ERROR_RESET is not set
229CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
230CONFIG_S3C_LOWLEVEL_UART_PORT=1
231CONFIG_SAMSUNG_CLKSRC=y
232CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
233CONFIG_SAMSUNG_IRQ_UART=y
234CONFIG_SAMSUNG_GPIOLIB_4BIT=y
235CONFIG_S3C_GPIO_CFG_S3C24XX=y
236CONFIG_S3C_GPIO_CFG_S3C64XX=y
237CONFIG_S3C_GPIO_PULL_UPDOWN=y
238CONFIG_SAMSUNG_GPIO_EXTRA=0
239CONFIG_S3C_GPIO_SPACE=0
240CONFIG_S3C_GPIO_TRACK=y
241# CONFIG_S3C_ADC is not set
242
243#
244# Power management
245#
246CONFIG_PLAT_S5P=y
247CONFIG_CPU_S5PV210=y
248# CONFIG_MACH_SMDKV210 is not set
249CONFIG_MACH_SMDKC110=y
250
251#
252# Processor Type
253#
254CONFIG_CPU_32v6K=y
255CONFIG_CPU_V7=y
256CONFIG_CPU_32v7=y
257CONFIG_CPU_ABRT_EV7=y
258CONFIG_CPU_PABRT_V7=y
259CONFIG_CPU_CACHE_V7=y
260CONFIG_CPU_CACHE_VIPT=y
261CONFIG_CPU_COPY_V6=y
262CONFIG_CPU_TLB_V7=y
263CONFIG_CPU_HAS_ASID=y
264CONFIG_CPU_CP15=y
265CONFIG_CPU_CP15_MMU=y
266
267#
268# Processor Features
269#
270CONFIG_ARM_THUMB=y
271# CONFIG_ARM_THUMBEE is not set
272# CONFIG_CPU_ICACHE_DISABLE is not set
273# CONFIG_CPU_DCACHE_DISABLE is not set
274# CONFIG_CPU_BPREDICT_DISABLE is not set
275CONFIG_HAS_TLS_REG=y
276CONFIG_ARM_L1_CACHE_SHIFT=6
277# CONFIG_ARM_ERRATA_430973 is not set
278# CONFIG_ARM_ERRATA_458693 is not set
279# CONFIG_ARM_ERRATA_460075 is not set
280CONFIG_ARM_VIC=y
281CONFIG_ARM_VIC_NR=2
282
283#
284# Bus support
285#
286# CONFIG_PCI_SYSCALL is not set
287# CONFIG_ARCH_SUPPORTS_MSI is not set
288# CONFIG_PCCARD is not set
289
290#
291# Kernel Features
292#
293# CONFIG_VMSPLIT_3G is not set
294CONFIG_VMSPLIT_2G=y
295# CONFIG_VMSPLIT_1G is not set
296CONFIG_PAGE_OFFSET=0x80000000
297# CONFIG_PREEMPT_NONE is not set
298# CONFIG_PREEMPT_VOLUNTARY is not set
299CONFIG_PREEMPT=y
300CONFIG_HZ=200
301# CONFIG_THUMB2_KERNEL is not set
302CONFIG_AEABI=y
303CONFIG_OABI_COMPAT=y
304CONFIG_ARCH_SPARSEMEM_ENABLE=y
305CONFIG_ARCH_SPARSEMEM_DEFAULT=y
306# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
307# CONFIG_HIGHMEM is not set
308CONFIG_SELECT_MEMORY_MODEL=y
309# CONFIG_FLATMEM_MANUAL is not set
310# CONFIG_DISCONTIGMEM_MANUAL is not set
311CONFIG_SPARSEMEM_MANUAL=y
312CONFIG_SPARSEMEM=y
313CONFIG_HAVE_MEMORY_PRESENT=y
314CONFIG_SPARSEMEM_EXTREME=y
315CONFIG_SPLIT_PTLOCK_CPUS=999999
316# CONFIG_PHYS_ADDR_T_64BIT is not set
317CONFIG_ZONE_DMA_FLAG=0
318CONFIG_VIRT_TO_BUS=y
319# CONFIG_KSM is not set
320CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
321CONFIG_ALIGNMENT_TRAP=y
322# CONFIG_UACCESS_WITH_MEMCPY is not set
323
324#
325# Boot options
326#
327CONFIG_ZBOOT_ROM_TEXT=0
328CONFIG_ZBOOT_ROM_BSS=0
329CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
330# CONFIG_XIP_KERNEL is not set
331# CONFIG_KEXEC is not set
332
333#
334# CPU Power Management
335#
336# CONFIG_CPU_IDLE is not set
337
338#
339# Floating point emulation
340#
341
342#
343# At least one emulation must be selected
344#
345# CONFIG_FPE_NWFPE is not set
346# CONFIG_FPE_FASTFPE is not set
347CONFIG_VFP=y
348CONFIG_VFPv3=y
349CONFIG_NEON=y
350
351#
352# Userspace binary formats
353#
354CONFIG_BINFMT_ELF=y
355# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
356CONFIG_HAVE_AOUT=y
357# CONFIG_BINFMT_AOUT is not set
358# CONFIG_BINFMT_MISC is not set
359
360#
361# Power management options
362#
363# CONFIG_PM is not set
364CONFIG_ARCH_SUSPEND_POSSIBLE=y
365# CONFIG_NET is not set
366
367#
368# Device Drivers
369#
370
371#
372# Generic Driver Options
373#
374CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
375# CONFIG_DEVTMPFS is not set
376CONFIG_STANDALONE=y
377CONFIG_PREVENT_FIRMWARE_BUILD=y
378CONFIG_FW_LOADER=y
379CONFIG_FIRMWARE_IN_KERNEL=y
380CONFIG_EXTRA_FIRMWARE=""
381# CONFIG_DEBUG_DRIVER is not set
382# CONFIG_DEBUG_DEVRES is not set
383# CONFIG_SYS_HYPERVISOR is not set
384# CONFIG_MTD is not set
385# CONFIG_PARPORT is not set
386CONFIG_BLK_DEV=y
387# CONFIG_BLK_DEV_COW_COMMON is not set
388CONFIG_BLK_DEV_LOOP=y
389# CONFIG_BLK_DEV_CRYPTOLOOP is not set
390
391#
392# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
393#
394CONFIG_BLK_DEV_RAM=y
395CONFIG_BLK_DEV_RAM_COUNT=16
396CONFIG_BLK_DEV_RAM_SIZE=8192
397# CONFIG_BLK_DEV_XIP is not set
398# CONFIG_CDROM_PKTCDVD is not set
399# CONFIG_MG_DISK is not set
400# CONFIG_MISC_DEVICES is not set
401CONFIG_HAVE_IDE=y
402# CONFIG_IDE is not set
403
404#
405# SCSI device support
406#
407# CONFIG_RAID_ATTRS is not set
408CONFIG_SCSI=y
409CONFIG_SCSI_DMA=y
410# CONFIG_SCSI_TGT is not set
411# CONFIG_SCSI_NETLINK is not set
412CONFIG_SCSI_PROC_FS=y
413
414#
415# SCSI support type (disk, tape, CD-ROM)
416#
417CONFIG_BLK_DEV_SD=y
418# CONFIG_CHR_DEV_ST is not set
419# CONFIG_CHR_DEV_OSST is not set
420# CONFIG_BLK_DEV_SR is not set
421CONFIG_CHR_DEV_SG=y
422# CONFIG_CHR_DEV_SCH is not set
423# CONFIG_SCSI_MULTI_LUN is not set
424# CONFIG_SCSI_CONSTANTS is not set
425# CONFIG_SCSI_LOGGING is not set
426# CONFIG_SCSI_SCAN_ASYNC is not set
427CONFIG_SCSI_WAIT_SCAN=m
428
429#
430# SCSI Transports
431#
432# CONFIG_SCSI_SPI_ATTRS is not set
433# CONFIG_SCSI_FC_ATTRS is not set
434# CONFIG_SCSI_SAS_LIBSAS is not set
435# CONFIG_SCSI_SRP_ATTRS is not set
436CONFIG_SCSI_LOWLEVEL=y
437# CONFIG_LIBFC is not set
438# CONFIG_LIBFCOE is not set
439# CONFIG_SCSI_DEBUG is not set
440# CONFIG_SCSI_DH is not set
441# CONFIG_SCSI_OSD_INITIATOR is not set
442# CONFIG_ATA is not set
443# CONFIG_MD is not set
444# CONFIG_PHONE is not set
445
446#
447# Input device support
448#
449CONFIG_INPUT=y
450# CONFIG_INPUT_FF_MEMLESS is not set
451# CONFIG_INPUT_POLLDEV is not set
452# CONFIG_INPUT_SPARSEKMAP is not set
453
454#
455# Userland interfaces
456#
457CONFIG_INPUT_MOUSEDEV=y
458CONFIG_INPUT_MOUSEDEV_PSAUX=y
459CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
460CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
461# CONFIG_INPUT_JOYDEV is not set
462CONFIG_INPUT_EVDEV=y
463# CONFIG_INPUT_EVBUG is not set
464
465#
466# Input Device Drivers
467#
468# CONFIG_INPUT_KEYBOARD is not set
469# CONFIG_INPUT_MOUSE is not set
470# CONFIG_INPUT_JOYSTICK is not set
471# CONFIG_INPUT_TABLET is not set
472CONFIG_INPUT_TOUCHSCREEN=y
473# CONFIG_TOUCHSCREEN_AD7879 is not set
474# CONFIG_TOUCHSCREEN_DYNAPRO is not set
475# CONFIG_TOUCHSCREEN_FUJITSU is not set
476# CONFIG_TOUCHSCREEN_GUNZE is not set
477# CONFIG_TOUCHSCREEN_ELO is not set
478# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
479# CONFIG_TOUCHSCREEN_MTOUCH is not set
480# CONFIG_TOUCHSCREEN_INEXIO is not set
481# CONFIG_TOUCHSCREEN_MK712 is not set
482# CONFIG_TOUCHSCREEN_PENMOUNT is not set
483# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
484# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
485# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
486# CONFIG_TOUCHSCREEN_W90X900 is not set
487# CONFIG_INPUT_MISC is not set
488
489#
490# Hardware I/O ports
491#
492CONFIG_SERIO=y
493CONFIG_SERIO_SERPORT=y
494# CONFIG_SERIO_RAW is not set
495# CONFIG_SERIO_ALTERA_PS2 is not set
496# CONFIG_GAMEPORT is not set
497
498#
499# Character devices
500#
501CONFIG_VT=y
502CONFIG_CONSOLE_TRANSLATIONS=y
503CONFIG_VT_CONSOLE=y
504CONFIG_HW_CONSOLE=y
505# CONFIG_VT_HW_CONSOLE_BINDING is not set
506CONFIG_DEVKMEM=y
507# CONFIG_SERIAL_NONSTANDARD is not set
508
509#
510# Serial drivers
511#
512CONFIG_SERIAL_8250=y
513# CONFIG_SERIAL_8250_CONSOLE is not set
514CONFIG_SERIAL_8250_NR_UARTS=4
515CONFIG_SERIAL_8250_RUNTIME_UARTS=4
516# CONFIG_SERIAL_8250_EXTENDED is not set
517
518#
519# Non-8250 serial port support
520#
521CONFIG_SERIAL_SAMSUNG=y
522CONFIG_SERIAL_SAMSUNG_UARTS_4=y
523CONFIG_SERIAL_SAMSUNG_UARTS=4
524# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
525CONFIG_SERIAL_SAMSUNG_CONSOLE=y
526CONFIG_SERIAL_S5PV210=y
527CONFIG_SERIAL_CORE=y
528CONFIG_SERIAL_CORE_CONSOLE=y
529CONFIG_UNIX98_PTYS=y
530# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
531CONFIG_LEGACY_PTYS=y
532CONFIG_LEGACY_PTY_COUNT=256
533# CONFIG_IPMI_HANDLER is not set
534CONFIG_HW_RANDOM=y
535# CONFIG_HW_RANDOM_TIMERIOMEM is not set
536# CONFIG_R3964 is not set
537# CONFIG_RAW_DRIVER is not set
538# CONFIG_TCG_TPM is not set
539# CONFIG_I2C is not set
540# CONFIG_SPI is not set
541
542#
543# PPS support
544#
545# CONFIG_PPS is not set
546CONFIG_ARCH_REQUIRE_GPIOLIB=y
547CONFIG_GPIOLIB=y
548# CONFIG_DEBUG_GPIO is not set
549# CONFIG_GPIO_SYSFS is not set
550
551#
552# Memory mapped GPIO expanders:
553#
554
555#
556# I2C GPIO expanders:
557#
558
559#
560# PCI GPIO expanders:
561#
562
563#
564# SPI GPIO expanders:
565#
566
567#
568# AC97 GPIO expanders:
569#
570# CONFIG_W1 is not set
571# CONFIG_POWER_SUPPLY is not set
572# CONFIG_HWMON is not set
573# CONFIG_THERMAL is not set
574# CONFIG_WATCHDOG is not set
575CONFIG_SSB_POSSIBLE=y
576
577#
578# Sonics Silicon Backplane
579#
580# CONFIG_SSB is not set
581
582#
583# Multifunction device drivers
584#
585# CONFIG_MFD_CORE is not set
586# CONFIG_MFD_SM501 is not set
587# CONFIG_MFD_ASIC3 is not set
588# CONFIG_HTC_EGPIO is not set
589# CONFIG_HTC_PASIC3 is not set
590# CONFIG_MFD_TMIO is not set
591# CONFIG_MFD_T7L66XB is not set
592# CONFIG_MFD_TC6387XB is not set
593# CONFIG_MFD_TC6393XB is not set
594# CONFIG_REGULATOR is not set
595# CONFIG_MEDIA_SUPPORT is not set
596
597#
598# Graphics support
599#
600# CONFIG_VGASTATE is not set
601# CONFIG_VIDEO_OUTPUT_CONTROL is not set
602# CONFIG_FB is not set
603# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
604
605#
606# Display device support
607#
608# CONFIG_DISPLAY_SUPPORT is not set
609
610#
611# Console display driver support
612#
613# CONFIG_VGA_CONSOLE is not set
614CONFIG_DUMMY_CONSOLE=y
615# CONFIG_SOUND is not set
616# CONFIG_HID_SUPPORT is not set
617# CONFIG_USB_SUPPORT is not set
618# CONFIG_MMC is not set
619# CONFIG_MEMSTICK is not set
620# CONFIG_NEW_LEDS is not set
621# CONFIG_ACCESSIBILITY is not set
622CONFIG_RTC_LIB=y
623# CONFIG_RTC_CLASS is not set
624# CONFIG_DMADEVICES is not set
625# CONFIG_AUXDISPLAY is not set
626# CONFIG_UIO is not set
627
628#
629# TI VLYNQ
630#
631# CONFIG_STAGING is not set
632
633#
634# File systems
635#
636CONFIG_EXT2_FS=y
637# CONFIG_EXT2_FS_XATTR is not set
638# CONFIG_EXT2_FS_XIP is not set
639# CONFIG_EXT3_FS is not set
640# CONFIG_EXT4_FS is not set
641# CONFIG_REISERFS_FS is not set
642# CONFIG_JFS_FS is not set
643CONFIG_FS_POSIX_ACL=y
644# CONFIG_XFS_FS is not set
645# CONFIG_GFS2_FS is not set
646# CONFIG_BTRFS_FS is not set
647# CONFIG_NILFS2_FS is not set
648CONFIG_FILE_LOCKING=y
649CONFIG_FSNOTIFY=y
650CONFIG_DNOTIFY=y
651CONFIG_INOTIFY=y
652CONFIG_INOTIFY_USER=y
653# CONFIG_QUOTA is not set
654# CONFIG_AUTOFS_FS is not set
655# CONFIG_AUTOFS4_FS is not set
656# CONFIG_FUSE_FS is not set
657CONFIG_GENERIC_ACL=y
658
659#
660# Caches
661#
662# CONFIG_FSCACHE is not set
663
664#
665# CD-ROM/DVD Filesystems
666#
667# CONFIG_ISO9660_FS is not set
668# CONFIG_UDF_FS is not set
669
670#
671# DOS/FAT/NT Filesystems
672#
673CONFIG_FAT_FS=y
674CONFIG_MSDOS_FS=y
675CONFIG_VFAT_FS=y
676CONFIG_FAT_DEFAULT_CODEPAGE=437
677CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
678# CONFIG_NTFS_FS is not set
679
680#
681# Pseudo filesystems
682#
683CONFIG_PROC_FS=y
684CONFIG_PROC_SYSCTL=y
685CONFIG_PROC_PAGE_MONITOR=y
686CONFIG_SYSFS=y
687CONFIG_TMPFS=y
688CONFIG_TMPFS_POSIX_ACL=y
689# CONFIG_HUGETLB_PAGE is not set
690# CONFIG_CONFIGFS_FS is not set
691CONFIG_MISC_FILESYSTEMS=y
692# CONFIG_ADFS_FS is not set
693# CONFIG_AFFS_FS is not set
694# CONFIG_HFS_FS is not set
695# CONFIG_HFSPLUS_FS is not set
696# CONFIG_BEFS_FS is not set
697# CONFIG_BFS_FS is not set
698# CONFIG_EFS_FS is not set
699CONFIG_CRAMFS=y
700# CONFIG_SQUASHFS is not set
701# CONFIG_VXFS_FS is not set
702# CONFIG_MINIX_FS is not set
703# CONFIG_OMFS_FS is not set
704# CONFIG_HPFS_FS is not set
705# CONFIG_QNX4FS_FS is not set
706CONFIG_ROMFS_FS=y
707CONFIG_ROMFS_BACKED_BY_BLOCK=y
708# CONFIG_ROMFS_BACKED_BY_MTD is not set
709# CONFIG_ROMFS_BACKED_BY_BOTH is not set
710CONFIG_ROMFS_ON_BLOCK=y
711# CONFIG_SYSV_FS is not set
712# CONFIG_UFS_FS is not set
713
714#
715# Partition Types
716#
717CONFIG_PARTITION_ADVANCED=y
718# CONFIG_ACORN_PARTITION is not set
719# CONFIG_OSF_PARTITION is not set
720# CONFIG_AMIGA_PARTITION is not set
721# CONFIG_ATARI_PARTITION is not set
722# CONFIG_MAC_PARTITION is not set
723CONFIG_MSDOS_PARTITION=y
724CONFIG_BSD_DISKLABEL=y
725# CONFIG_MINIX_SUBPARTITION is not set
726CONFIG_SOLARIS_X86_PARTITION=y
727# CONFIG_UNIXWARE_DISKLABEL is not set
728# CONFIG_LDM_PARTITION is not set
729# CONFIG_SGI_PARTITION is not set
730# CONFIG_ULTRIX_PARTITION is not set
731# CONFIG_SUN_PARTITION is not set
732# CONFIG_KARMA_PARTITION is not set
733# CONFIG_EFI_PARTITION is not set
734# CONFIG_SYSV68_PARTITION is not set
735CONFIG_NLS=y
736CONFIG_NLS_DEFAULT="iso8859-1"
737CONFIG_NLS_CODEPAGE_437=y
738# CONFIG_NLS_CODEPAGE_737 is not set
739# CONFIG_NLS_CODEPAGE_775 is not set
740# CONFIG_NLS_CODEPAGE_850 is not set
741# CONFIG_NLS_CODEPAGE_852 is not set
742# CONFIG_NLS_CODEPAGE_855 is not set
743# CONFIG_NLS_CODEPAGE_857 is not set
744# CONFIG_NLS_CODEPAGE_860 is not set
745# CONFIG_NLS_CODEPAGE_861 is not set
746# CONFIG_NLS_CODEPAGE_862 is not set
747# CONFIG_NLS_CODEPAGE_863 is not set
748# CONFIG_NLS_CODEPAGE_864 is not set
749# CONFIG_NLS_CODEPAGE_865 is not set
750# CONFIG_NLS_CODEPAGE_866 is not set
751# CONFIG_NLS_CODEPAGE_869 is not set
752# CONFIG_NLS_CODEPAGE_936 is not set
753# CONFIG_NLS_CODEPAGE_950 is not set
754# CONFIG_NLS_CODEPAGE_932 is not set
755# CONFIG_NLS_CODEPAGE_949 is not set
756# CONFIG_NLS_CODEPAGE_874 is not set
757# CONFIG_NLS_ISO8859_8 is not set
758# CONFIG_NLS_CODEPAGE_1250 is not set
759# CONFIG_NLS_CODEPAGE_1251 is not set
760CONFIG_NLS_ASCII=y
761CONFIG_NLS_ISO8859_1=y
762# CONFIG_NLS_ISO8859_2 is not set
763# CONFIG_NLS_ISO8859_3 is not set
764# CONFIG_NLS_ISO8859_4 is not set
765# CONFIG_NLS_ISO8859_5 is not set
766# CONFIG_NLS_ISO8859_6 is not set
767# CONFIG_NLS_ISO8859_7 is not set
768# CONFIG_NLS_ISO8859_9 is not set
769# CONFIG_NLS_ISO8859_13 is not set
770# CONFIG_NLS_ISO8859_14 is not set
771# CONFIG_NLS_ISO8859_15 is not set
772# CONFIG_NLS_KOI8_R is not set
773# CONFIG_NLS_KOI8_U is not set
774# CONFIG_NLS_UTF8 is not set
775
776#
777# Kernel hacking
778#
779# CONFIG_PRINTK_TIME is not set
780CONFIG_ENABLE_WARN_DEPRECATED=y
781CONFIG_ENABLE_MUST_CHECK=y
782CONFIG_FRAME_WARN=1024
783CONFIG_MAGIC_SYSRQ=y
784# CONFIG_STRIP_ASM_SYMS is not set
785# CONFIG_UNUSED_SYMBOLS is not set
786# CONFIG_DEBUG_FS is not set
787# CONFIG_HEADERS_CHECK is not set
788CONFIG_DEBUG_KERNEL=y
789# CONFIG_DEBUG_SHIRQ is not set
790CONFIG_DETECT_SOFTLOCKUP=y
791# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
792CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
793CONFIG_DETECT_HUNG_TASK=y
794# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
795CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
796CONFIG_SCHED_DEBUG=y
797# CONFIG_SCHEDSTATS is not set
798# CONFIG_TIMER_STATS is not set
799# CONFIG_DEBUG_OBJECTS is not set
800# CONFIG_SLUB_DEBUG_ON is not set
801# CONFIG_SLUB_STATS is not set
802# CONFIG_DEBUG_KMEMLEAK is not set
803# CONFIG_DEBUG_PREEMPT is not set
804CONFIG_DEBUG_RT_MUTEXES=y
805CONFIG_DEBUG_PI_LIST=y
806# CONFIG_RT_MUTEX_TESTER is not set
807CONFIG_DEBUG_SPINLOCK=y
808CONFIG_DEBUG_MUTEXES=y
809# CONFIG_DEBUG_LOCK_ALLOC is not set
810# CONFIG_PROVE_LOCKING is not set
811# CONFIG_LOCK_STAT is not set
812CONFIG_DEBUG_SPINLOCK_SLEEP=y
813# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
814# CONFIG_DEBUG_KOBJECT is not set
815CONFIG_DEBUG_BUGVERBOSE=y
816CONFIG_DEBUG_INFO=y
817# CONFIG_DEBUG_VM is not set
818# CONFIG_DEBUG_WRITECOUNT is not set
819CONFIG_DEBUG_MEMORY_INIT=y
820# CONFIG_DEBUG_LIST is not set
821# CONFIG_DEBUG_SG is not set
822# CONFIG_DEBUG_NOTIFIERS is not set
823# CONFIG_DEBUG_CREDENTIALS is not set
824# CONFIG_BOOT_PRINTK_DELAY is not set
825# CONFIG_RCU_TORTURE_TEST is not set
826# CONFIG_RCU_CPU_STALL_DETECTOR is not set
827# CONFIG_BACKTRACE_SELF_TEST is not set
828# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
829# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
830# CONFIG_FAULT_INJECTION is not set
831# CONFIG_LATENCYTOP is not set
832CONFIG_SYSCTL_SYSCALL_CHECK=y
833# CONFIG_PAGE_POISONING is not set
834CONFIG_HAVE_FUNCTION_TRACER=y
835CONFIG_TRACING_SUPPORT=y
836CONFIG_FTRACE=y
837# CONFIG_FUNCTION_TRACER is not set
838# CONFIG_SCHED_TRACER is not set
839# CONFIG_ENABLE_DEFAULT_TRACERS is not set
840# CONFIG_BOOT_TRACER is not set
841CONFIG_BRANCH_PROFILE_NONE=y
842# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
843# CONFIG_PROFILE_ALL_BRANCHES is not set
844# CONFIG_STACK_TRACER is not set
845# CONFIG_KMEMTRACE is not set
846# CONFIG_WORKQUEUE_TRACER is not set
847# CONFIG_BLK_DEV_IO_TRACE is not set
848# CONFIG_SAMPLES is not set
849CONFIG_HAVE_ARCH_KGDB=y
850# CONFIG_KGDB is not set
851CONFIG_ARM_UNWIND=y
852CONFIG_DEBUG_USER=y
853CONFIG_DEBUG_ERRORS=y
854# CONFIG_DEBUG_STACK_USAGE is not set
855CONFIG_DEBUG_LL=y
856CONFIG_EARLY_PRINTK=y
857# CONFIG_DEBUG_ICEDCC is not set
858# CONFIG_OC_ETM is not set
859CONFIG_DEBUG_S3C_UART=1
860
861#
862# Security options
863#
864# CONFIG_KEYS is not set
865# CONFIG_SECURITY is not set
866# CONFIG_SECURITYFS is not set
867# CONFIG_DEFAULT_SECURITY_SELINUX is not set
868# CONFIG_DEFAULT_SECURITY_SMACK is not set
869# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
870CONFIG_DEFAULT_SECURITY_DAC=y
871CONFIG_DEFAULT_SECURITY=""
872# CONFIG_CRYPTO is not set
873# CONFIG_BINARY_PRINTF is not set
874
875#
876# Library routines
877#
878CONFIG_BITREVERSE=y
879CONFIG_GENERIC_FIND_LAST_BIT=y
880CONFIG_CRC_CCITT=y
881# CONFIG_CRC16 is not set
882# CONFIG_CRC_T10DIF is not set
883# CONFIG_CRC_ITU_T is not set
884CONFIG_CRC32=y
885# CONFIG_CRC7 is not set
886# CONFIG_LIBCRC32C is not set
887CONFIG_ZLIB_INFLATE=y
888CONFIG_LZO_DECOMPRESS=y
889CONFIG_DECOMPRESS_GZIP=y
890CONFIG_DECOMPRESS_BZIP2=y
891CONFIG_DECOMPRESS_LZMA=y
892CONFIG_DECOMPRESS_LZO=y
893CONFIG_HAS_IOMEM=y
894CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/s5pv210_defconfig b/arch/arm/configs/s5pv210_defconfig
new file mode 100644
index 000000000000..3f7d47491b54
--- /dev/null
+++ b/arch/arm/configs/s5pv210_defconfig
@@ -0,0 +1,894 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc4
4# Wed Feb 24 15:36:16 2010
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_NO_IOPORT=y
10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_STACKTRACE_SUPPORT=y
12CONFIG_HAVE_LATENCYTOP_SUPPORT=y
13CONFIG_LOCKDEP_SUPPORT=y
14CONFIG_TRACE_IRQFLAGS_SUPPORT=y
15CONFIG_HARDIRQS_SW_RESEND=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_RWSEM_GENERIC_SPINLOCK=y
18CONFIG_GENERIC_HWEIGHT=y
19CONFIG_GENERIC_CALIBRATE_DELAY=y
20CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
21CONFIG_ARM_L1_CACHE_SHIFT_6=y
22CONFIG_VECTORS_BASE=0xffff0000
23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
24CONFIG_CONSTRUCTORS=y
25
26#
27# General setup
28#
29CONFIG_EXPERIMENTAL=y
30CONFIG_BROKEN_ON_SMP=y
31CONFIG_LOCK_KERNEL=y
32CONFIG_INIT_ENV_ARG_LIMIT=32
33CONFIG_LOCALVERSION=""
34CONFIG_LOCALVERSION_AUTO=y
35CONFIG_HAVE_KERNEL_GZIP=y
36CONFIG_HAVE_KERNEL_LZO=y
37CONFIG_KERNEL_GZIP=y
38# CONFIG_KERNEL_BZIP2 is not set
39# CONFIG_KERNEL_LZMA is not set
40# CONFIG_KERNEL_LZO is not set
41CONFIG_SWAP=y
42# CONFIG_SYSVIPC is not set
43# CONFIG_BSD_PROCESS_ACCT is not set
44
45#
46# RCU Subsystem
47#
48CONFIG_TREE_RCU=y
49# CONFIG_TREE_PREEMPT_RCU is not set
50# CONFIG_TINY_RCU is not set
51# CONFIG_RCU_TRACE is not set
52CONFIG_RCU_FANOUT=32
53# CONFIG_RCU_FANOUT_EXACT is not set
54# CONFIG_TREE_RCU_TRACE is not set
55# CONFIG_IKCONFIG is not set
56CONFIG_LOG_BUF_SHIFT=17
57# CONFIG_GROUP_SCHED is not set
58# CONFIG_CGROUPS is not set
59CONFIG_SYSFS_DEPRECATED=y
60CONFIG_SYSFS_DEPRECATED_V2=y
61# CONFIG_RELAY is not set
62CONFIG_NAMESPACES=y
63# CONFIG_UTS_NS is not set
64# CONFIG_USER_NS is not set
65# CONFIG_PID_NS is not set
66CONFIG_BLK_DEV_INITRD=y
67CONFIG_INITRAMFS_SOURCE=""
68CONFIG_RD_GZIP=y
69CONFIG_RD_BZIP2=y
70CONFIG_RD_LZMA=y
71CONFIG_RD_LZO=y
72CONFIG_CC_OPTIMIZE_FOR_SIZE=y
73CONFIG_SYSCTL=y
74CONFIG_ANON_INODES=y
75# CONFIG_EMBEDDED is not set
76CONFIG_UID16=y
77CONFIG_SYSCTL_SYSCALL=y
78CONFIG_KALLSYMS=y
79CONFIG_KALLSYMS_ALL=y
80# CONFIG_KALLSYMS_EXTRA_PASS is not set
81CONFIG_HOTPLUG=y
82CONFIG_PRINTK=y
83CONFIG_BUG=y
84CONFIG_ELF_CORE=y
85CONFIG_BASE_FULL=y
86CONFIG_FUTEX=y
87CONFIG_EPOLL=y
88CONFIG_SIGNALFD=y
89CONFIG_TIMERFD=y
90CONFIG_EVENTFD=y
91CONFIG_SHMEM=y
92CONFIG_AIO=y
93
94#
95# Kernel Performance Events And Counters
96#
97CONFIG_VM_EVENT_COUNTERS=y
98CONFIG_SLUB_DEBUG=y
99CONFIG_COMPAT_BRK=y
100# CONFIG_SLAB is not set
101CONFIG_SLUB=y
102# CONFIG_SLOB is not set
103# CONFIG_PROFILING is not set
104CONFIG_HAVE_OPROFILE=y
105# CONFIG_KPROBES is not set
106CONFIG_HAVE_KPROBES=y
107CONFIG_HAVE_KRETPROBES=y
108CONFIG_HAVE_CLK=y
109
110#
111# GCOV-based kernel profiling
112#
113# CONFIG_SLOW_WORK is not set
114CONFIG_HAVE_GENERIC_DMA_COHERENT=y
115CONFIG_SLABINFO=y
116CONFIG_RT_MUTEXES=y
117CONFIG_BASE_SMALL=0
118CONFIG_MODULES=y
119# CONFIG_MODULE_FORCE_LOAD is not set
120CONFIG_MODULE_UNLOAD=y
121# CONFIG_MODULE_FORCE_UNLOAD is not set
122# CONFIG_MODVERSIONS is not set
123# CONFIG_MODULE_SRCVERSION_ALL is not set
124CONFIG_BLOCK=y
125CONFIG_LBDAF=y
126# CONFIG_BLK_DEV_BSG is not set
127# CONFIG_BLK_DEV_INTEGRITY is not set
128
129#
130# IO Schedulers
131#
132CONFIG_IOSCHED_NOOP=y
133CONFIG_IOSCHED_DEADLINE=y
134CONFIG_IOSCHED_CFQ=y
135# CONFIG_DEFAULT_DEADLINE is not set
136CONFIG_DEFAULT_CFQ=y
137# CONFIG_DEFAULT_NOOP is not set
138CONFIG_DEFAULT_IOSCHED="cfq"
139# CONFIG_INLINE_SPIN_TRYLOCK is not set
140# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
141# CONFIG_INLINE_SPIN_LOCK is not set
142# CONFIG_INLINE_SPIN_LOCK_BH is not set
143# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
144# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
145# CONFIG_INLINE_SPIN_UNLOCK is not set
146# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
147# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
148# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
149# CONFIG_INLINE_READ_TRYLOCK is not set
150# CONFIG_INLINE_READ_LOCK is not set
151# CONFIG_INLINE_READ_LOCK_BH is not set
152# CONFIG_INLINE_READ_LOCK_IRQ is not set
153# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
154# CONFIG_INLINE_READ_UNLOCK is not set
155# CONFIG_INLINE_READ_UNLOCK_BH is not set
156# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
157# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
158# CONFIG_INLINE_WRITE_TRYLOCK is not set
159# CONFIG_INLINE_WRITE_LOCK is not set
160# CONFIG_INLINE_WRITE_LOCK_BH is not set
161# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
162# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
163# CONFIG_INLINE_WRITE_UNLOCK is not set
164# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
165# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
166# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
167# CONFIG_MUTEX_SPIN_ON_OWNER is not set
168# CONFIG_FREEZER is not set
169
170#
171# System Type
172#
173CONFIG_MMU=y
174# CONFIG_ARCH_AAEC2000 is not set
175# CONFIG_ARCH_INTEGRATOR is not set
176# CONFIG_ARCH_REALVIEW is not set
177# CONFIG_ARCH_VERSATILE is not set
178# CONFIG_ARCH_AT91 is not set
179# CONFIG_ARCH_CLPS711X is not set
180# CONFIG_ARCH_GEMINI is not set
181# CONFIG_ARCH_EBSA110 is not set
182# CONFIG_ARCH_EP93XX is not set
183# CONFIG_ARCH_FOOTBRIDGE is not set
184# CONFIG_ARCH_MXC is not set
185# CONFIG_ARCH_STMP3XXX is not set
186# CONFIG_ARCH_NETX is not set
187# CONFIG_ARCH_H720X is not set
188# CONFIG_ARCH_NOMADIK is not set
189# CONFIG_ARCH_IOP13XX is not set
190# CONFIG_ARCH_IOP32X is not set
191# CONFIG_ARCH_IOP33X is not set
192# CONFIG_ARCH_IXP23XX is not set
193# CONFIG_ARCH_IXP2000 is not set
194# CONFIG_ARCH_IXP4XX is not set
195# CONFIG_ARCH_L7200 is not set
196# CONFIG_ARCH_DOVE is not set
197# CONFIG_ARCH_KIRKWOOD is not set
198# CONFIG_ARCH_LOKI is not set
199# CONFIG_ARCH_MV78XX0 is not set
200# CONFIG_ARCH_ORION5X is not set
201# CONFIG_ARCH_MMP is not set
202# CONFIG_ARCH_KS8695 is not set
203# CONFIG_ARCH_NS9XXX is not set
204# CONFIG_ARCH_W90X900 is not set
205# CONFIG_ARCH_PNX4008 is not set
206# CONFIG_ARCH_PXA is not set
207# CONFIG_ARCH_MSM is not set
208# CONFIG_ARCH_RPC is not set
209# CONFIG_ARCH_SA1100 is not set
210# CONFIG_ARCH_S3C2410 is not set
211# CONFIG_ARCH_S3C64XX is not set
212# CONFIG_ARCH_S5P6440 is not set
213# CONFIG_ARCH_S5P6442 is not set
214# CONFIG_ARCH_S5PC1XX is not set
215CONFIG_ARCH_S5PV210=y
216# CONFIG_ARCH_SHARK is not set
217# CONFIG_ARCH_LH7A40X is not set
218# CONFIG_ARCH_U300 is not set
219# CONFIG_ARCH_DAVINCI is not set
220# CONFIG_ARCH_OMAP is not set
221# CONFIG_ARCH_BCMRING is not set
222# CONFIG_ARCH_U8500 is not set
223CONFIG_PLAT_SAMSUNG=y
224
225#
226# Boot options
227#
228# CONFIG_S3C_BOOT_ERROR_RESET is not set
229CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
230CONFIG_S3C_LOWLEVEL_UART_PORT=1
231CONFIG_SAMSUNG_CLKSRC=y
232CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
233CONFIG_SAMSUNG_IRQ_UART=y
234CONFIG_SAMSUNG_GPIOLIB_4BIT=y
235CONFIG_S3C_GPIO_CFG_S3C24XX=y
236CONFIG_S3C_GPIO_CFG_S3C64XX=y
237CONFIG_S3C_GPIO_PULL_UPDOWN=y
238CONFIG_SAMSUNG_GPIO_EXTRA=0
239CONFIG_S3C_GPIO_SPACE=0
240CONFIG_S3C_GPIO_TRACK=y
241# CONFIG_S3C_ADC is not set
242
243#
244# Power management
245#
246CONFIG_PLAT_S5P=y
247CONFIG_CPU_S5PV210=y
248CONFIG_MACH_SMDKV210=y
249# CONFIG_MACH_SMDKC110 is not set
250
251#
252# Processor Type
253#
254CONFIG_CPU_32v6K=y
255CONFIG_CPU_V7=y
256CONFIG_CPU_32v7=y
257CONFIG_CPU_ABRT_EV7=y
258CONFIG_CPU_PABRT_V7=y
259CONFIG_CPU_CACHE_V7=y
260CONFIG_CPU_CACHE_VIPT=y
261CONFIG_CPU_COPY_V6=y
262CONFIG_CPU_TLB_V7=y
263CONFIG_CPU_HAS_ASID=y
264CONFIG_CPU_CP15=y
265CONFIG_CPU_CP15_MMU=y
266
267#
268# Processor Features
269#
270CONFIG_ARM_THUMB=y
271# CONFIG_ARM_THUMBEE is not set
272# CONFIG_CPU_ICACHE_DISABLE is not set
273# CONFIG_CPU_DCACHE_DISABLE is not set
274# CONFIG_CPU_BPREDICT_DISABLE is not set
275CONFIG_HAS_TLS_REG=y
276CONFIG_ARM_L1_CACHE_SHIFT=6
277# CONFIG_ARM_ERRATA_430973 is not set
278# CONFIG_ARM_ERRATA_458693 is not set
279# CONFIG_ARM_ERRATA_460075 is not set
280CONFIG_ARM_VIC=y
281CONFIG_ARM_VIC_NR=2
282
283#
284# Bus support
285#
286# CONFIG_PCI_SYSCALL is not set
287# CONFIG_ARCH_SUPPORTS_MSI is not set
288# CONFIG_PCCARD is not set
289
290#
291# Kernel Features
292#
293# CONFIG_VMSPLIT_3G is not set
294CONFIG_VMSPLIT_2G=y
295# CONFIG_VMSPLIT_1G is not set
296CONFIG_PAGE_OFFSET=0x80000000
297# CONFIG_PREEMPT_NONE is not set
298# CONFIG_PREEMPT_VOLUNTARY is not set
299CONFIG_PREEMPT=y
300CONFIG_HZ=200
301# CONFIG_THUMB2_KERNEL is not set
302CONFIG_AEABI=y
303CONFIG_OABI_COMPAT=y
304CONFIG_ARCH_SPARSEMEM_ENABLE=y
305CONFIG_ARCH_SPARSEMEM_DEFAULT=y
306# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
307# CONFIG_HIGHMEM is not set
308CONFIG_SELECT_MEMORY_MODEL=y
309# CONFIG_FLATMEM_MANUAL is not set
310# CONFIG_DISCONTIGMEM_MANUAL is not set
311CONFIG_SPARSEMEM_MANUAL=y
312CONFIG_SPARSEMEM=y
313CONFIG_HAVE_MEMORY_PRESENT=y
314CONFIG_SPARSEMEM_EXTREME=y
315CONFIG_SPLIT_PTLOCK_CPUS=999999
316# CONFIG_PHYS_ADDR_T_64BIT is not set
317CONFIG_ZONE_DMA_FLAG=0
318CONFIG_VIRT_TO_BUS=y
319# CONFIG_KSM is not set
320CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
321CONFIG_ALIGNMENT_TRAP=y
322# CONFIG_UACCESS_WITH_MEMCPY is not set
323
324#
325# Boot options
326#
327CONFIG_ZBOOT_ROM_TEXT=0
328CONFIG_ZBOOT_ROM_BSS=0
329CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
330# CONFIG_XIP_KERNEL is not set
331# CONFIG_KEXEC is not set
332
333#
334# CPU Power Management
335#
336# CONFIG_CPU_IDLE is not set
337
338#
339# Floating point emulation
340#
341
342#
343# At least one emulation must be selected
344#
345# CONFIG_FPE_NWFPE is not set
346# CONFIG_FPE_FASTFPE is not set
347CONFIG_VFP=y
348CONFIG_VFPv3=y
349CONFIG_NEON=y
350
351#
352# Userspace binary formats
353#
354CONFIG_BINFMT_ELF=y
355# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
356CONFIG_HAVE_AOUT=y
357# CONFIG_BINFMT_AOUT is not set
358# CONFIG_BINFMT_MISC is not set
359
360#
361# Power management options
362#
363# CONFIG_PM is not set
364CONFIG_ARCH_SUSPEND_POSSIBLE=y
365# CONFIG_NET is not set
366
367#
368# Device Drivers
369#
370
371#
372# Generic Driver Options
373#
374CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
375# CONFIG_DEVTMPFS is not set
376CONFIG_STANDALONE=y
377CONFIG_PREVENT_FIRMWARE_BUILD=y
378CONFIG_FW_LOADER=y
379CONFIG_FIRMWARE_IN_KERNEL=y
380CONFIG_EXTRA_FIRMWARE=""
381# CONFIG_DEBUG_DRIVER is not set
382# CONFIG_DEBUG_DEVRES is not set
383# CONFIG_SYS_HYPERVISOR is not set
384# CONFIG_MTD is not set
385# CONFIG_PARPORT is not set
386CONFIG_BLK_DEV=y
387# CONFIG_BLK_DEV_COW_COMMON is not set
388CONFIG_BLK_DEV_LOOP=y
389# CONFIG_BLK_DEV_CRYPTOLOOP is not set
390
391#
392# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
393#
394CONFIG_BLK_DEV_RAM=y
395CONFIG_BLK_DEV_RAM_COUNT=16
396CONFIG_BLK_DEV_RAM_SIZE=8192
397# CONFIG_BLK_DEV_XIP is not set
398# CONFIG_CDROM_PKTCDVD is not set
399# CONFIG_MG_DISK is not set
400# CONFIG_MISC_DEVICES is not set
401CONFIG_HAVE_IDE=y
402# CONFIG_IDE is not set
403
404#
405# SCSI device support
406#
407# CONFIG_RAID_ATTRS is not set
408CONFIG_SCSI=y
409CONFIG_SCSI_DMA=y
410# CONFIG_SCSI_TGT is not set
411# CONFIG_SCSI_NETLINK is not set
412CONFIG_SCSI_PROC_FS=y
413
414#
415# SCSI support type (disk, tape, CD-ROM)
416#
417CONFIG_BLK_DEV_SD=y
418# CONFIG_CHR_DEV_ST is not set
419# CONFIG_CHR_DEV_OSST is not set
420# CONFIG_BLK_DEV_SR is not set
421CONFIG_CHR_DEV_SG=y
422# CONFIG_CHR_DEV_SCH is not set
423# CONFIG_SCSI_MULTI_LUN is not set
424# CONFIG_SCSI_CONSTANTS is not set
425# CONFIG_SCSI_LOGGING is not set
426# CONFIG_SCSI_SCAN_ASYNC is not set
427CONFIG_SCSI_WAIT_SCAN=m
428
429#
430# SCSI Transports
431#
432# CONFIG_SCSI_SPI_ATTRS is not set
433# CONFIG_SCSI_FC_ATTRS is not set
434# CONFIG_SCSI_SAS_LIBSAS is not set
435# CONFIG_SCSI_SRP_ATTRS is not set
436CONFIG_SCSI_LOWLEVEL=y
437# CONFIG_LIBFC is not set
438# CONFIG_LIBFCOE is not set
439# CONFIG_SCSI_DEBUG is not set
440# CONFIG_SCSI_DH is not set
441# CONFIG_SCSI_OSD_INITIATOR is not set
442# CONFIG_ATA is not set
443# CONFIG_MD is not set
444# CONFIG_PHONE is not set
445
446#
447# Input device support
448#
449CONFIG_INPUT=y
450# CONFIG_INPUT_FF_MEMLESS is not set
451# CONFIG_INPUT_POLLDEV is not set
452# CONFIG_INPUT_SPARSEKMAP is not set
453
454#
455# Userland interfaces
456#
457CONFIG_INPUT_MOUSEDEV=y
458CONFIG_INPUT_MOUSEDEV_PSAUX=y
459CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
460CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
461# CONFIG_INPUT_JOYDEV is not set
462CONFIG_INPUT_EVDEV=y
463# CONFIG_INPUT_EVBUG is not set
464
465#
466# Input Device Drivers
467#
468# CONFIG_INPUT_KEYBOARD is not set
469# CONFIG_INPUT_MOUSE is not set
470# CONFIG_INPUT_JOYSTICK is not set
471# CONFIG_INPUT_TABLET is not set
472CONFIG_INPUT_TOUCHSCREEN=y
473# CONFIG_TOUCHSCREEN_AD7879 is not set
474# CONFIG_TOUCHSCREEN_DYNAPRO is not set
475# CONFIG_TOUCHSCREEN_FUJITSU is not set
476# CONFIG_TOUCHSCREEN_GUNZE is not set
477# CONFIG_TOUCHSCREEN_ELO is not set
478# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
479# CONFIG_TOUCHSCREEN_MTOUCH is not set
480# CONFIG_TOUCHSCREEN_INEXIO is not set
481# CONFIG_TOUCHSCREEN_MK712 is not set
482# CONFIG_TOUCHSCREEN_PENMOUNT is not set
483# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
484# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
485# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
486# CONFIG_TOUCHSCREEN_W90X900 is not set
487# CONFIG_INPUT_MISC is not set
488
489#
490# Hardware I/O ports
491#
492CONFIG_SERIO=y
493CONFIG_SERIO_SERPORT=y
494# CONFIG_SERIO_RAW is not set
495# CONFIG_SERIO_ALTERA_PS2 is not set
496# CONFIG_GAMEPORT is not set
497
498#
499# Character devices
500#
501CONFIG_VT=y
502CONFIG_CONSOLE_TRANSLATIONS=y
503CONFIG_VT_CONSOLE=y
504CONFIG_HW_CONSOLE=y
505# CONFIG_VT_HW_CONSOLE_BINDING is not set
506CONFIG_DEVKMEM=y
507# CONFIG_SERIAL_NONSTANDARD is not set
508
509#
510# Serial drivers
511#
512CONFIG_SERIAL_8250=y
513# CONFIG_SERIAL_8250_CONSOLE is not set
514CONFIG_SERIAL_8250_NR_UARTS=4
515CONFIG_SERIAL_8250_RUNTIME_UARTS=4
516# CONFIG_SERIAL_8250_EXTENDED is not set
517
518#
519# Non-8250 serial port support
520#
521CONFIG_SERIAL_SAMSUNG=y
522CONFIG_SERIAL_SAMSUNG_UARTS_4=y
523CONFIG_SERIAL_SAMSUNG_UARTS=4
524# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
525CONFIG_SERIAL_SAMSUNG_CONSOLE=y
526CONFIG_SERIAL_S5PV210=y
527CONFIG_SERIAL_CORE=y
528CONFIG_SERIAL_CORE_CONSOLE=y
529CONFIG_UNIX98_PTYS=y
530# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
531CONFIG_LEGACY_PTYS=y
532CONFIG_LEGACY_PTY_COUNT=256
533# CONFIG_IPMI_HANDLER is not set
534CONFIG_HW_RANDOM=y
535# CONFIG_HW_RANDOM_TIMERIOMEM is not set
536# CONFIG_R3964 is not set
537# CONFIG_RAW_DRIVER is not set
538# CONFIG_TCG_TPM is not set
539# CONFIG_I2C is not set
540# CONFIG_SPI is not set
541
542#
543# PPS support
544#
545# CONFIG_PPS is not set
546CONFIG_ARCH_REQUIRE_GPIOLIB=y
547CONFIG_GPIOLIB=y
548# CONFIG_DEBUG_GPIO is not set
549# CONFIG_GPIO_SYSFS is not set
550
551#
552# Memory mapped GPIO expanders:
553#
554
555#
556# I2C GPIO expanders:
557#
558
559#
560# PCI GPIO expanders:
561#
562
563#
564# SPI GPIO expanders:
565#
566
567#
568# AC97 GPIO expanders:
569#
570# CONFIG_W1 is not set
571# CONFIG_POWER_SUPPLY is not set
572# CONFIG_HWMON is not set
573# CONFIG_THERMAL is not set
574# CONFIG_WATCHDOG is not set
575CONFIG_SSB_POSSIBLE=y
576
577#
578# Sonics Silicon Backplane
579#
580# CONFIG_SSB is not set
581
582#
583# Multifunction device drivers
584#
585# CONFIG_MFD_CORE is not set
586# CONFIG_MFD_SM501 is not set
587# CONFIG_MFD_ASIC3 is not set
588# CONFIG_HTC_EGPIO is not set
589# CONFIG_HTC_PASIC3 is not set
590# CONFIG_MFD_TMIO is not set
591# CONFIG_MFD_T7L66XB is not set
592# CONFIG_MFD_TC6387XB is not set
593# CONFIG_MFD_TC6393XB is not set
594# CONFIG_REGULATOR is not set
595# CONFIG_MEDIA_SUPPORT is not set
596
597#
598# Graphics support
599#
600# CONFIG_VGASTATE is not set
601# CONFIG_VIDEO_OUTPUT_CONTROL is not set
602# CONFIG_FB is not set
603# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
604
605#
606# Display device support
607#
608# CONFIG_DISPLAY_SUPPORT is not set
609
610#
611# Console display driver support
612#
613# CONFIG_VGA_CONSOLE is not set
614CONFIG_DUMMY_CONSOLE=y
615# CONFIG_SOUND is not set
616# CONFIG_HID_SUPPORT is not set
617# CONFIG_USB_SUPPORT is not set
618# CONFIG_MMC is not set
619# CONFIG_MEMSTICK is not set
620# CONFIG_NEW_LEDS is not set
621# CONFIG_ACCESSIBILITY is not set
622CONFIG_RTC_LIB=y
623# CONFIG_RTC_CLASS is not set
624# CONFIG_DMADEVICES is not set
625# CONFIG_AUXDISPLAY is not set
626# CONFIG_UIO is not set
627
628#
629# TI VLYNQ
630#
631# CONFIG_STAGING is not set
632
633#
634# File systems
635#
636CONFIG_EXT2_FS=y
637# CONFIG_EXT2_FS_XATTR is not set
638# CONFIG_EXT2_FS_XIP is not set
639# CONFIG_EXT3_FS is not set
640# CONFIG_EXT4_FS is not set
641# CONFIG_REISERFS_FS is not set
642# CONFIG_JFS_FS is not set
643CONFIG_FS_POSIX_ACL=y
644# CONFIG_XFS_FS is not set
645# CONFIG_GFS2_FS is not set
646# CONFIG_BTRFS_FS is not set
647# CONFIG_NILFS2_FS is not set
648CONFIG_FILE_LOCKING=y
649CONFIG_FSNOTIFY=y
650CONFIG_DNOTIFY=y
651CONFIG_INOTIFY=y
652CONFIG_INOTIFY_USER=y
653# CONFIG_QUOTA is not set
654# CONFIG_AUTOFS_FS is not set
655# CONFIG_AUTOFS4_FS is not set
656# CONFIG_FUSE_FS is not set
657CONFIG_GENERIC_ACL=y
658
659#
660# Caches
661#
662# CONFIG_FSCACHE is not set
663
664#
665# CD-ROM/DVD Filesystems
666#
667# CONFIG_ISO9660_FS is not set
668# CONFIG_UDF_FS is not set
669
670#
671# DOS/FAT/NT Filesystems
672#
673CONFIG_FAT_FS=y
674CONFIG_MSDOS_FS=y
675CONFIG_VFAT_FS=y
676CONFIG_FAT_DEFAULT_CODEPAGE=437
677CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
678# CONFIG_NTFS_FS is not set
679
680#
681# Pseudo filesystems
682#
683CONFIG_PROC_FS=y
684CONFIG_PROC_SYSCTL=y
685CONFIG_PROC_PAGE_MONITOR=y
686CONFIG_SYSFS=y
687CONFIG_TMPFS=y
688CONFIG_TMPFS_POSIX_ACL=y
689# CONFIG_HUGETLB_PAGE is not set
690# CONFIG_CONFIGFS_FS is not set
691CONFIG_MISC_FILESYSTEMS=y
692# CONFIG_ADFS_FS is not set
693# CONFIG_AFFS_FS is not set
694# CONFIG_HFS_FS is not set
695# CONFIG_HFSPLUS_FS is not set
696# CONFIG_BEFS_FS is not set
697# CONFIG_BFS_FS is not set
698# CONFIG_EFS_FS is not set
699CONFIG_CRAMFS=y
700# CONFIG_SQUASHFS is not set
701# CONFIG_VXFS_FS is not set
702# CONFIG_MINIX_FS is not set
703# CONFIG_OMFS_FS is not set
704# CONFIG_HPFS_FS is not set
705# CONFIG_QNX4FS_FS is not set
706CONFIG_ROMFS_FS=y
707CONFIG_ROMFS_BACKED_BY_BLOCK=y
708# CONFIG_ROMFS_BACKED_BY_MTD is not set
709# CONFIG_ROMFS_BACKED_BY_BOTH is not set
710CONFIG_ROMFS_ON_BLOCK=y
711# CONFIG_SYSV_FS is not set
712# CONFIG_UFS_FS is not set
713
714#
715# Partition Types
716#
717CONFIG_PARTITION_ADVANCED=y
718# CONFIG_ACORN_PARTITION is not set
719# CONFIG_OSF_PARTITION is not set
720# CONFIG_AMIGA_PARTITION is not set
721# CONFIG_ATARI_PARTITION is not set
722# CONFIG_MAC_PARTITION is not set
723CONFIG_MSDOS_PARTITION=y
724CONFIG_BSD_DISKLABEL=y
725# CONFIG_MINIX_SUBPARTITION is not set
726CONFIG_SOLARIS_X86_PARTITION=y
727# CONFIG_UNIXWARE_DISKLABEL is not set
728# CONFIG_LDM_PARTITION is not set
729# CONFIG_SGI_PARTITION is not set
730# CONFIG_ULTRIX_PARTITION is not set
731# CONFIG_SUN_PARTITION is not set
732# CONFIG_KARMA_PARTITION is not set
733# CONFIG_EFI_PARTITION is not set
734# CONFIG_SYSV68_PARTITION is not set
735CONFIG_NLS=y
736CONFIG_NLS_DEFAULT="iso8859-1"
737CONFIG_NLS_CODEPAGE_437=y
738# CONFIG_NLS_CODEPAGE_737 is not set
739# CONFIG_NLS_CODEPAGE_775 is not set
740# CONFIG_NLS_CODEPAGE_850 is not set
741# CONFIG_NLS_CODEPAGE_852 is not set
742# CONFIG_NLS_CODEPAGE_855 is not set
743# CONFIG_NLS_CODEPAGE_857 is not set
744# CONFIG_NLS_CODEPAGE_860 is not set
745# CONFIG_NLS_CODEPAGE_861 is not set
746# CONFIG_NLS_CODEPAGE_862 is not set
747# CONFIG_NLS_CODEPAGE_863 is not set
748# CONFIG_NLS_CODEPAGE_864 is not set
749# CONFIG_NLS_CODEPAGE_865 is not set
750# CONFIG_NLS_CODEPAGE_866 is not set
751# CONFIG_NLS_CODEPAGE_869 is not set
752# CONFIG_NLS_CODEPAGE_936 is not set
753# CONFIG_NLS_CODEPAGE_950 is not set
754# CONFIG_NLS_CODEPAGE_932 is not set
755# CONFIG_NLS_CODEPAGE_949 is not set
756# CONFIG_NLS_CODEPAGE_874 is not set
757# CONFIG_NLS_ISO8859_8 is not set
758# CONFIG_NLS_CODEPAGE_1250 is not set
759# CONFIG_NLS_CODEPAGE_1251 is not set
760CONFIG_NLS_ASCII=y
761CONFIG_NLS_ISO8859_1=y
762# CONFIG_NLS_ISO8859_2 is not set
763# CONFIG_NLS_ISO8859_3 is not set
764# CONFIG_NLS_ISO8859_4 is not set
765# CONFIG_NLS_ISO8859_5 is not set
766# CONFIG_NLS_ISO8859_6 is not set
767# CONFIG_NLS_ISO8859_7 is not set
768# CONFIG_NLS_ISO8859_9 is not set
769# CONFIG_NLS_ISO8859_13 is not set
770# CONFIG_NLS_ISO8859_14 is not set
771# CONFIG_NLS_ISO8859_15 is not set
772# CONFIG_NLS_KOI8_R is not set
773# CONFIG_NLS_KOI8_U is not set
774# CONFIG_NLS_UTF8 is not set
775
776#
777# Kernel hacking
778#
779# CONFIG_PRINTK_TIME is not set
780CONFIG_ENABLE_WARN_DEPRECATED=y
781CONFIG_ENABLE_MUST_CHECK=y
782CONFIG_FRAME_WARN=1024
783CONFIG_MAGIC_SYSRQ=y
784# CONFIG_STRIP_ASM_SYMS is not set
785# CONFIG_UNUSED_SYMBOLS is not set
786# CONFIG_DEBUG_FS is not set
787# CONFIG_HEADERS_CHECK is not set
788CONFIG_DEBUG_KERNEL=y
789# CONFIG_DEBUG_SHIRQ is not set
790CONFIG_DETECT_SOFTLOCKUP=y
791# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
792CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
793CONFIG_DETECT_HUNG_TASK=y
794# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
795CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
796CONFIG_SCHED_DEBUG=y
797# CONFIG_SCHEDSTATS is not set
798# CONFIG_TIMER_STATS is not set
799# CONFIG_DEBUG_OBJECTS is not set
800# CONFIG_SLUB_DEBUG_ON is not set
801# CONFIG_SLUB_STATS is not set
802# CONFIG_DEBUG_KMEMLEAK is not set
803# CONFIG_DEBUG_PREEMPT is not set
804CONFIG_DEBUG_RT_MUTEXES=y
805CONFIG_DEBUG_PI_LIST=y
806# CONFIG_RT_MUTEX_TESTER is not set
807CONFIG_DEBUG_SPINLOCK=y
808CONFIG_DEBUG_MUTEXES=y
809# CONFIG_DEBUG_LOCK_ALLOC is not set
810# CONFIG_PROVE_LOCKING is not set
811# CONFIG_LOCK_STAT is not set
812CONFIG_DEBUG_SPINLOCK_SLEEP=y
813# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
814# CONFIG_DEBUG_KOBJECT is not set
815CONFIG_DEBUG_BUGVERBOSE=y
816CONFIG_DEBUG_INFO=y
817# CONFIG_DEBUG_VM is not set
818# CONFIG_DEBUG_WRITECOUNT is not set
819CONFIG_DEBUG_MEMORY_INIT=y
820# CONFIG_DEBUG_LIST is not set
821# CONFIG_DEBUG_SG is not set
822# CONFIG_DEBUG_NOTIFIERS is not set
823# CONFIG_DEBUG_CREDENTIALS is not set
824# CONFIG_BOOT_PRINTK_DELAY is not set
825# CONFIG_RCU_TORTURE_TEST is not set
826# CONFIG_RCU_CPU_STALL_DETECTOR is not set
827# CONFIG_BACKTRACE_SELF_TEST is not set
828# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
829# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
830# CONFIG_FAULT_INJECTION is not set
831# CONFIG_LATENCYTOP is not set
832CONFIG_SYSCTL_SYSCALL_CHECK=y
833# CONFIG_PAGE_POISONING is not set
834CONFIG_HAVE_FUNCTION_TRACER=y
835CONFIG_TRACING_SUPPORT=y
836CONFIG_FTRACE=y
837# CONFIG_FUNCTION_TRACER is not set
838# CONFIG_SCHED_TRACER is not set
839# CONFIG_ENABLE_DEFAULT_TRACERS is not set
840# CONFIG_BOOT_TRACER is not set
841CONFIG_BRANCH_PROFILE_NONE=y
842# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
843# CONFIG_PROFILE_ALL_BRANCHES is not set
844# CONFIG_STACK_TRACER is not set
845# CONFIG_KMEMTRACE is not set
846# CONFIG_WORKQUEUE_TRACER is not set
847# CONFIG_BLK_DEV_IO_TRACE is not set
848# CONFIG_SAMPLES is not set
849CONFIG_HAVE_ARCH_KGDB=y
850# CONFIG_KGDB is not set
851CONFIG_ARM_UNWIND=y
852CONFIG_DEBUG_USER=y
853CONFIG_DEBUG_ERRORS=y
854# CONFIG_DEBUG_STACK_USAGE is not set
855CONFIG_DEBUG_LL=y
856CONFIG_EARLY_PRINTK=y
857# CONFIG_DEBUG_ICEDCC is not set
858# CONFIG_OC_ETM is not set
859CONFIG_DEBUG_S3C_UART=1
860
861#
862# Security options
863#
864# CONFIG_KEYS is not set
865# CONFIG_SECURITY is not set
866# CONFIG_SECURITYFS is not set
867# CONFIG_DEFAULT_SECURITY_SELINUX is not set
868# CONFIG_DEFAULT_SECURITY_SMACK is not set
869# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
870CONFIG_DEFAULT_SECURITY_DAC=y
871CONFIG_DEFAULT_SECURITY=""
872# CONFIG_CRYPTO is not set
873# CONFIG_BINARY_PRINTF is not set
874
875#
876# Library routines
877#
878CONFIG_BITREVERSE=y
879CONFIG_GENERIC_FIND_LAST_BIT=y
880CONFIG_CRC_CCITT=y
881# CONFIG_CRC16 is not set
882# CONFIG_CRC_T10DIF is not set
883# CONFIG_CRC_ITU_T is not set
884CONFIG_CRC32=y
885# CONFIG_CRC7 is not set
886# CONFIG_LIBCRC32C is not set
887CONFIG_ZLIB_INFLATE=y
888CONFIG_LZO_DECOMPRESS=y
889CONFIG_DECOMPRESS_GZIP=y
890CONFIG_DECOMPRESS_BZIP2=y
891CONFIG_DECOMPRESS_LZMA=y
892CONFIG_DECOMPRESS_LZO=y
893CONFIG_HAS_IOMEM=y
894CONFIG_HAS_DMA=y
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 63b753f56c64..0d8e043804c2 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -21,7 +21,7 @@
21#include <mach/dma.h> 21#include <mach/dma.h>
22 22
23#include <plat/cpu.h> 23#include <plat/cpu.h>
24#include <plat/dma-plat.h> 24#include <plat/dma-s3c24xx.h>
25 25
26#include <plat/regs-serial.h> 26#include <plat/regs-serial.h>
27#include <mach/regs-gpio.h> 27#include <mach/regs-gpio.h>
diff --git a/arch/arm/plat-s3c24xx/include/plat/pm-core.h b/arch/arm/mach-s3c2410/include/mach/pm-core.h
index fb45dd9adca5..70a83b209e25 100644
--- a/arch/arm/plat-s3c24xx/include/plat/pm-core.h
+++ b/arch/arm/mach-s3c2410/include/mach/pm-core.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c24xx/include/plat/pll.h 1/* linux/arch/arm/mach-s3c2410/include/pm-core.h
2 * 2 *
3 * Copyright 2008 Simtec Electronics 3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
index ebc85c6dadbf..fd672f330bf2 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
@@ -406,31 +406,31 @@
406#define S3C2443_GPE5_SD1_CLK (0x02 << 10) 406#define S3C2443_GPE5_SD1_CLK (0x02 << 10)
407#define S3C2400_GPE5_EINT5 (0x02 << 10) 407#define S3C2400_GPE5_EINT5 (0x02 << 10)
408#define S3C2400_GPE5_TCLK1 (0x03 << 10) 408#define S3C2400_GPE5_TCLK1 (0x03 << 10)
409#define S3C2443_GPE5_AC_BITCLK (0x03 << 10)
409 410
410#define S3C2410_GPE6_SDCMD (0x02 << 12) 411#define S3C2410_GPE6_SDCMD (0x02 << 12)
411#define S3C2443_GPE6_SD1_CMD (0x02 << 12) 412#define S3C2443_GPE6_SD1_CMD (0x02 << 12)
412#define S3C2443_GPE6_AC_BITCLK (0x03 << 12) 413#define S3C2443_GPE6_AC_SDI (0x03 << 12)
413#define S3C2400_GPE6_EINT6 (0x02 << 12) 414#define S3C2400_GPE6_EINT6 (0x02 << 12)
414 415
415#define S3C2410_GPE7_SDDAT0 (0x02 << 14) 416#define S3C2410_GPE7_SDDAT0 (0x02 << 14)
416#define S3C2443_GPE5_SD1_DAT0 (0x02 << 14) 417#define S3C2443_GPE5_SD1_DAT0 (0x02 << 14)
417#define S3C2443_GPE7_AC_SDI (0x03 << 14) 418#define S3C2443_GPE7_AC_SDO (0x03 << 14)
418#define S3C2400_GPE7_EINT7 (0x02 << 14) 419#define S3C2400_GPE7_EINT7 (0x02 << 14)
419 420
420#define S3C2410_GPE8_SDDAT1 (0x02 << 16) 421#define S3C2410_GPE8_SDDAT1 (0x02 << 16)
421#define S3C2443_GPE8_SD1_DAT1 (0x02 << 16) 422#define S3C2443_GPE8_SD1_DAT1 (0x02 << 16)
422#define S3C2443_GPE8_AC_SDO (0x03 << 16) 423#define S3C2443_GPE8_AC_SYNC (0x03 << 16)
423#define S3C2400_GPE8_nXDACK0 (0x02 << 16) 424#define S3C2400_GPE8_nXDACK0 (0x02 << 16)
424 425
425#define S3C2410_GPE9_SDDAT2 (0x02 << 18) 426#define S3C2410_GPE9_SDDAT2 (0x02 << 18)
426#define S3C2443_GPE9_SD1_DAT2 (0x02 << 18) 427#define S3C2443_GPE9_SD1_DAT2 (0x02 << 18)
427#define S3C2443_GPE9_AC_SYNC (0x03 << 18) 428#define S3C2443_GPE9_AC_nRESET (0x03 << 18)
428#define S3C2400_GPE9_nXDACK1 (0x02 << 18) 429#define S3C2400_GPE9_nXDACK1 (0x02 << 18)
429#define S3C2400_GPE9_nXBACK (0x03 << 18) 430#define S3C2400_GPE9_nXBACK (0x03 << 18)
430 431
431#define S3C2410_GPE10_SDDAT3 (0x02 << 20) 432#define S3C2410_GPE10_SDDAT3 (0x02 << 20)
432#define S3C2443_GPE10_SD1_DAT3 (0x02 << 20) 433#define S3C2443_GPE10_SD1_DAT3 (0x02 << 20)
433#define S3C2443_GPE10_AC_nRESET (0x03 << 20)
434#define S3C2400_GPE10_nXDREQ0 (0x02 << 20) 434#define S3C2400_GPE10_nXDREQ0 (0x02 << 20)
435 435
436#define S3C2410_GPE11_SPIMISO0 (0x02 << 22) 436#define S3C2410_GPE11_SPIMISO0 (0x02 << 22)
diff --git a/arch/arm/plat-s3c/include/mach/timex.h b/arch/arm/mach-s3c2410/include/mach/timex.h
index 2a425ed0a7e0..fe9ca1ffd51b 100644
--- a/arch/arm/plat-s3c/include/mach/timex.h
+++ b/arch/arm/mach-s3c2410/include/mach/timex.h
@@ -19,8 +19,6 @@
19 * for the time conversion functions to/from jiffies is acceptable. 19 * for the time conversion functions to/from jiffies is acceptable.
20*/ 20*/
21 21
22
23#define CLOCK_TICK_RATE 12000000 22#define CLOCK_TICK_RATE 12000000
24 23
25
26#endif /* __ASM_ARCH_TIMEX_H */ 24#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/plat-s3c/include/mach/vmalloc.h b/arch/arm/mach-s3c2410/include/mach/vmalloc.h
index bfd2ca6e3074..315b0078a34d 100644
--- a/arch/arm/plat-s3c/include/mach/vmalloc.h
+++ b/arch/arm/mach-s3c2410/include/mach/vmalloc.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c/include/mach/vmalloc.h 1/* arch/arm/mach-s3c2410/include/mach/vmalloc.h
2 * 2 *
3 * from arch/arm/mach-iop3xx/include/mach/vmalloc.h 3 * from arch/arm/mach-iop3xx/include/mach/vmalloc.h
4 * 4 *
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c
index f8d16fc10bc6..e880524904eb 100644
--- a/arch/arm/mach-s3c2412/dma.c
+++ b/arch/arm/mach-s3c2412/dma.c
@@ -20,7 +20,7 @@
20 20
21#include <mach/dma.h> 21#include <mach/dma.h>
22 22
23#include <plat/dma-plat.h> 23#include <plat/dma-s3c24xx.h>
24#include <plat/cpu.h> 24#include <plat/cpu.h>
25 25
26#include <plat/regs-serial.h> 26#include <plat/regs-serial.h>
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index 80879358eb2f..7f465265cf04 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -15,14 +15,67 @@ config CPU_S3C2440
15 help 15 help
16 Support for S3C2440 Samsung Mobile CPU based systems. 16 Support for S3C2440 Samsung Mobile CPU based systems.
17 17
18config CPU_S3C2442
19 bool
20 depends on ARCH_S3C2410
21 select CPU_ARM920T
22 select S3C2410_CLOCK
23 select S3C2410_GPIO
24 select S3C2410_PM if PM
25 select CPU_S3C244X
26 select CPU_LLSERIAL_S3C2440
27 help
28 Support for S3C2442 Samsung Mobile CPU based systems.
29
30config CPU_S3C244X
31 bool
32 depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442)
33 help
34 Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems.
35
36
37
38config S3C2440_CPUFREQ
39 bool "S3C2440/S3C2442 CPU Frequency scaling support"
40 depends on CPU_FREQ_S3C24XX && (CPU_S3C2440 || CPU_S3C2442)
41 select S3C2410_CPUFREQ_UTILS
42 default y
43 help
44 CPU Frequency scaling support for S3C2440 and S3C2442 SoC CPUs.
45
46config S3C2440_XTAL_12000000
47 bool
48 help
49 Indicate that the build needs to support 12MHz system
50 crystal.
51
52config S3C2440_XTAL_16934400
53 bool
54 help
55 Indicate that the build needs to support 16.9344MHz system
56 crystal.
57
58config S3C2440_PLL_12000000
59 bool
60 depends on S3C2440_CPUFREQ && S3C2440_XTAL_12000000
61 default y if CPU_FREQ_S3C24XX_PLL
62 help
63 PLL tables for S3C2440 or S3C2442 CPUs with 12MHz crystals.
64
65config S3C2440_PLL_16934400
66 bool
67 depends on S3C2440_CPUFREQ && S3C2440_XTAL_16934400
68 default y if CPU_FREQ_S3C24XX_PLL
69 help
70 PLL tables for S3C2440 or S3C2442 CPUs with 16.934MHz crystals.
71
18config S3C2440_DMA 72config S3C2440_DMA
19 bool 73 bool
20 depends on ARCH_S3C2410 && CPU_S3C24405B 74 depends on ARCH_S3C2410 && CPU_S3C24405B
21 help 75 help
22 Support for S3C2440 specific DMA code5A 76 Support for S3C2440 specific DMA code5A
23 77
24 78menu "S3C2440 and S3C2442 Machines"
25menu "S3C2440 Machines"
26 79
27config MACH_ANUBIS 80config MACH_ANUBIS
28 bool "Simtec Electronics ANUBIS" 81 bool "Simtec Electronics ANUBIS"
@@ -37,6 +90,18 @@ config MACH_ANUBIS
37 Say Y here if you are using the Simtec Electronics ANUBIS 90 Say Y here if you are using the Simtec Electronics ANUBIS
38 development system 91 development system
39 92
93config MACH_NEO1973_GTA02
94 bool "Openmoko GTA02 / Freerunner phone"
95 select CPU_S3C2442
96 select MFD_PCF50633
97 select PCF50633_GPIO
98 select I2C
99 select POWER_SUPPLY
100 select MACH_NEO1973
101 select S3C2410_PWM
102 help
103 Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone
104
40config MACH_OSIRIS 105config MACH_OSIRIS
41 bool "Simtec IM2440D20 (OSIRIS) module" 106 bool "Simtec IM2440D20 (OSIRIS) module"
42 select CPU_S3C2440 107 select CPU_S3C2440
@@ -94,11 +159,14 @@ config MACH_NEXCODER_2440
94 159
95config SMDK2440_CPU2440 160config SMDK2440_CPU2440
96 bool "SMDK2440 with S3C2440 CPU module" 161 bool "SMDK2440 with S3C2440 CPU module"
97 depends on ARCH_S3C2440
98 default y if ARCH_S3C2440 162 default y if ARCH_S3C2440
99 select S3C2440_XTAL_16934400 163 select S3C2440_XTAL_16934400
100 select CPU_S3C2440 164 select CPU_S3C2440
101 165
166config SMDK2440_CPU2442
167 bool "SMDM2440 with S3C2442 CPU module"
168 select CPU_S3C2442
169
102config MACH_AT2440EVB 170config MACH_AT2440EVB
103 bool "Avantech AT2440EVB development board" 171 bool "Avantech AT2440EVB development board"
104 select CPU_S3C2440 172 select CPU_S3C2440
diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile
index 5f3224531885..c85ba32d8956 100644
--- a/arch/arm/mach-s3c2440/Makefile
+++ b/arch/arm/mach-s3c2440/Makefile
@@ -10,10 +10,20 @@ obj-n :=
10obj- := 10obj- :=
11 11
12obj-$(CONFIG_CPU_S3C2440) += s3c2440.o dsc.o 12obj-$(CONFIG_CPU_S3C2440) += s3c2440.o dsc.o
13obj-$(CONFIG_CPU_S3C2442) += s3c2442.o
14
13obj-$(CONFIG_CPU_S3C2440) += irq.o 15obj-$(CONFIG_CPU_S3C2440) += irq.o
14obj-$(CONFIG_CPU_S3C2440) += clock.o 16obj-$(CONFIG_CPU_S3C2440) += clock.o
15obj-$(CONFIG_S3C2440_DMA) += dma.o 17obj-$(CONFIG_S3C2440_DMA) += dma.o
16 18
19obj-$(CONFIG_CPU_S3C244X) += s3c244x.o
20obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o
21obj-$(CONFIG_CPU_S3C244X) += s3c244x-clock.o
22obj-$(CONFIG_S3C2440_CPUFREQ) += s3c2440-cpufreq.o
23
24obj-$(CONFIG_S3C2440_PLL_12000000) += s3c2440-pll-12000000.o
25obj-$(CONFIG_S3C2440_PLL_16934400) += s3c2440-pll-16934400.o
26
17# Machine support 27# Machine support
18 28
19obj-$(CONFIG_MACH_ANUBIS) += mach-anubis.o 29obj-$(CONFIG_MACH_ANUBIS) += mach-anubis.o
@@ -23,6 +33,7 @@ obj-$(CONFIG_ARCH_S3C2440) += mach-smdk2440.o
23obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o 33obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o
24obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o 34obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o
25obj-$(CONFIG_MACH_MINI2440) += mach-mini2440.o 35obj-$(CONFIG_MACH_MINI2440) += mach-mini2440.o
36obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o
26 37
27# extra machine support 38# extra machine support
28 39
diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c
index e08e081430f0..3b0529f54e9c 100644
--- a/arch/arm/mach-s3c2440/dma.c
+++ b/arch/arm/mach-s3c2440/dma.c
@@ -20,7 +20,7 @@
20#include <mach/map.h> 20#include <mach/map.h>
21#include <mach/dma.h> 21#include <mach/dma.h>
22 22
23#include <plat/dma-plat.h> 23#include <plat/dma-s3c24xx.h>
24#include <plat/cpu.h> 24#include <plat/cpu.h>
25 25
26#include <plat/regs-serial.h> 26#include <plat/regs-serial.h>
diff --git a/arch/arm/mach-s3c2440/dsc.c b/arch/arm/mach-s3c2440/dsc.c
index 554044272771..9ea66e31f626 100644
--- a/arch/arm/mach-s3c2440/dsc.c
+++ b/arch/arm/mach-s3c2440/dsc.c
@@ -28,7 +28,7 @@
28#include <mach/regs-dsc.h> 28#include <mach/regs-dsc.h>
29 29
30#include <plat/cpu.h> 30#include <plat/cpu.h>
31#include <plat/s3c2440.h> 31#include <plat/s3c244x.h>
32 32
33int s3c2440_set_dsc(unsigned int pin, unsigned int value) 33int s3c2440_set_dsc(unsigned int pin, unsigned int value)
34{ 34{
diff --git a/arch/arm/mach-s3c2442/include/mach/gta02.h b/arch/arm/mach-s3c2440/include/mach/gta02.h
index 953331d8d56a..953331d8d56a 100644
--- a/arch/arm/mach-s3c2442/include/mach/gta02.h
+++ b/arch/arm/mach-s3c2440/include/mach/gta02.h
diff --git a/arch/arm/mach-s3c2442/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c
index 45799c608d8f..45799c608d8f 100644
--- a/arch/arm/mach-s3c2442/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c
index 86a243b3e37d..342041593f22 100644
--- a/arch/arm/mach-s3c2440/mach-nexcoder.c
+++ b/arch/arm/mach-s3c2440/mach-nexcoder.c
@@ -41,7 +41,7 @@
41#include <plat/iic.h> 41#include <plat/iic.h>
42 42
43#include <plat/s3c2410.h> 43#include <plat/s3c2410.h>
44#include <plat/s3c2440.h> 44#include <plat/s3c244x.h>
45#include <plat/clock.h> 45#include <plat/clock.h>
46#include <plat/devs.h> 46#include <plat/devs.h>
47#include <plat/cpu.h> 47#include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c
index df3e9a3be82f..3ac3d636d615 100644
--- a/arch/arm/mach-s3c2440/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2440/mach-smdk2440.c
@@ -40,7 +40,7 @@
40#include <plat/iic.h> 40#include <plat/iic.h>
41 41
42#include <plat/s3c2410.h> 42#include <plat/s3c2410.h>
43#include <plat/s3c2440.h> 43#include <plat/s3c244x.h>
44#include <plat/clock.h> 44#include <plat/clock.h>
45#include <plat/devs.h> 45#include <plat/devs.h>
46#include <plat/cpu.h> 46#include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index ac1f7ea5f405..2b68f7ea45ae 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -29,9 +29,9 @@
29#include <mach/hardware.h> 29#include <mach/hardware.h>
30#include <asm/irq.h> 30#include <asm/irq.h>
31 31
32#include <plat/s3c2440.h>
33#include <plat/devs.h> 32#include <plat/devs.h>
34#include <plat/cpu.h> 33#include <plat/cpu.h>
34#include <plat/s3c244x.h>
35 35
36static struct sys_device s3c2440_sysdev = { 36static struct sys_device s3c2440_sysdev = {
37 .cls = &s3c2440_sysclass, 37 .cls = &s3c2440_sysclass,
diff --git a/arch/arm/mach-s3c2442/clock.c b/arch/arm/mach-s3c2440/s3c2442.c
index d9b692a12480..188ad1e57dc0 100644
--- a/arch/arm/mach-s3c2442/clock.c
+++ b/arch/arm/mach-s3c2440/s3c2442.c
@@ -1,10 +1,10 @@
1/* linux/arch/arm/mach-s3c2442/clock.c 1/* linux/arch/arm/mach-s3c2442/s3c2442.c
2 * 2 *
3 * Copyright (c) 2004-2005 Simtec Electronics 3 * Copyright (c) 2004-2005 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * 6 *
7 * S3C2442 Clock support 7 * S3C2442 core and lock support
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
@@ -151,3 +151,15 @@ static __init int s3c2442_clk_init(void)
151} 151}
152 152
153arch_initcall(s3c2442_clk_init); 153arch_initcall(s3c2442_clk_init);
154
155
156static struct sys_device s3c2442_sysdev = {
157 .cls = &s3c2442_sysclass,
158};
159
160int __init s3c2442_init(void)
161{
162 printk("S3C2442: Initialising architecture\n");
163
164 return sysdev_register(&s3c2442_sysdev);
165}
diff --git a/arch/arm/plat-s3c24xx/s3c244x-clock.c b/arch/arm/mach-s3c2440/s3c244x-clock.c
index f8d96130d1d1..f8d96130d1d1 100644
--- a/arch/arm/plat-s3c24xx/s3c244x-clock.c
+++ b/arch/arm/mach-s3c2440/s3c244x-clock.c
diff --git a/arch/arm/plat-s3c24xx/s3c244x-irq.c b/arch/arm/mach-s3c2440/s3c244x-irq.c
index a75c0c2431ea..a75c0c2431ea 100644
--- a/arch/arm/plat-s3c24xx/s3c244x-irq.c
+++ b/arch/arm/mach-s3c2440/s3c244x-irq.c
diff --git a/arch/arm/plat-s3c24xx/s3c244x.c b/arch/arm/mach-s3c2440/s3c244x.c
index 12623a474b54..5e4a97e76533 100644
--- a/arch/arm/plat-s3c24xx/s3c244x.c
+++ b/arch/arm/mach-s3c2440/s3c244x.c
@@ -38,8 +38,7 @@
38#include <mach/regs-dsc.h> 38#include <mach/regs-dsc.h>
39 39
40#include <plat/s3c2410.h> 40#include <plat/s3c2410.h>
41#include <plat/s3c2440.h> 41#include <plat/s3c244x.h>
42#include "s3c244x.h"
43#include <plat/clock.h> 42#include <plat/clock.h>
44#include <plat/devs.h> 43#include <plat/devs.h>
45#include <plat/cpu.h> 44#include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c2442/Kconfig b/arch/arm/mach-s3c2442/Kconfig
deleted file mode 100644
index 8d3811852fc7..000000000000
--- a/arch/arm/mach-s3c2442/Kconfig
+++ /dev/null
@@ -1,37 +0,0 @@
1# Copyright 2007 Simtec Electronics
2#
3# Licensed under GPLv2
4
5config CPU_S3C2442
6 bool
7 depends on ARCH_S3C2410
8 select CPU_ARM920T
9 select S3C2410_CLOCK
10 select S3C2410_GPIO
11 select S3C2410_PM if PM
12 select CPU_S3C244X
13 select CPU_LLSERIAL_S3C2440
14 help
15 Support for S3C2442 Samsung Mobile CPU based systems.
16
17
18menu "S3C2442 Machines"
19
20config SMDK2440_CPU2442
21 bool "SMDM2440 with S3C2442 CPU module"
22 depends on ARCH_S3C2440
23 select CPU_S3C2442
24
25config MACH_NEO1973_GTA02
26 bool "Openmoko GTA02 / Freerunner phone"
27 select CPU_S3C2442
28 select MFD_PCF50633
29 select PCF50633_GPIO
30 select I2C
31 select POWER_SUPPLY
32 select MACH_NEO1973
33 select S3C2410_PWM
34 help
35 Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone
36
37endmenu
diff --git a/arch/arm/mach-s3c2442/Makefile b/arch/arm/mach-s3c2442/Makefile
deleted file mode 100644
index 2a19113a5769..000000000000
--- a/arch/arm/mach-s3c2442/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
1# arch/arm/mach-s3c2442/Makefile
2#
3# Copyright 2007 Simtec Electronics
4#
5# Licensed under GPLv2
6
7obj-y :=
8obj-m :=
9obj-n :=
10obj- :=
11
12obj-$(CONFIG_CPU_S3C2442) += s3c2442.o
13obj-$(CONFIG_CPU_S3C2442) += clock.o
14
15obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o
16
17# Machine support
18
diff --git a/arch/arm/mach-s3c2442/s3c2442.c b/arch/arm/mach-s3c2442/s3c2442.c
deleted file mode 100644
index 4663bdc7fff6..000000000000
--- a/arch/arm/mach-s3c2442/s3c2442.c
+++ /dev/null
@@ -1,34 +0,0 @@
1/* linux/arch/arm/mach-s3c2442/s3c2442.c
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Samsung S3C2442 Mobile CPU support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/timer.h>
18#include <linux/init.h>
19#include <linux/serial_core.h>
20#include <linux/sysdev.h>
21
22#include <plat/s3c2442.h>
23#include <plat/cpu.h>
24
25static struct sys_device s3c2442_sysdev = {
26 .cls = &s3c2442_sysclass,
27};
28
29int __init s3c2442_init(void)
30{
31 printk("S3C2442: Initialising architecture\n");
32
33 return sysdev_register(&s3c2442_sysdev);
34}
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c
index 397f3b5c0b47..3f658685ec16 100644
--- a/arch/arm/mach-s3c2443/dma.c
+++ b/arch/arm/mach-s3c2443/dma.c
@@ -20,7 +20,7 @@
20 20
21#include <mach/dma.h> 21#include <mach/dma.h>
22 22
23#include <plat/dma-plat.h> 23#include <plat/dma-s3c24xx.h>
24#include <plat/cpu.h> 24#include <plat/cpu.h>
25 25
26#include <plat/regs-serial.h> 26#include <plat/regs-serial.h>
diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c
index 039a46243105..e2e362bda9b7 100644
--- a/arch/arm/mach-s3c2443/mach-smdk2443.c
+++ b/arch/arm/mach-s3c2443/mach-smdk2443.c
@@ -40,7 +40,7 @@
40#include <plat/iic.h> 40#include <plat/iic.h>
41 41
42#include <plat/s3c2410.h> 42#include <plat/s3c2410.h>
43#include <plat/s3c2440.h> 43#include <plat/s3c2443.h>
44#include <plat/clock.h> 44#include <plat/clock.h>
45#include <plat/devs.h> 45#include <plat/devs.h>
46#include <plat/cpu.h> 46#include <plat/cpu.h>
@@ -106,6 +106,9 @@ static struct platform_device *smdk2443_devices[] __initdata = {
106 &s3c_device_wdt, 106 &s3c_device_wdt,
107 &s3c_device_i2c0, 107 &s3c_device_i2c0,
108 &s3c_device_hsmmc0, 108 &s3c_device_hsmmc0,
109#ifdef CONFIG_SND_SOC_SMDK2443_WM9710
110 &s3c_device_ac97,
111#endif
109}; 112};
110 113
111static void __init smdk2443_map_io(void) 114static void __init smdk2443_map_io(void)
@@ -118,6 +121,11 @@ static void __init smdk2443_map_io(void)
118static void __init smdk2443_machine_init(void) 121static void __init smdk2443_machine_init(void)
119{ 122{
120 s3c_i2c0_set_platdata(NULL); 123 s3c_i2c0_set_platdata(NULL);
124
125#ifdef CONFIG_SND_SOC_SMDK2443_WM9710
126 s3c24xx_ac97_setup_gpio(S3C24XX_AC97_GPE0);
127#endif
128
121 platform_add_devices(smdk2443_devices, ARRAY_SIZE(smdk2443_devices)); 129 platform_add_devices(smdk2443_devices, ARRAY_SIZE(smdk2443_devices));
122 smdk_machine_init(); 130 smdk_machine_init();
123} 131}
diff --git a/arch/arm/plat-s3c/include/mach/io.h b/arch/arm/mach-s3c24a0/include/mach/io.h
index f6a53631b665..4326c30fabcb 100644
--- a/arch/arm/plat-s3c/include/mach/io.h
+++ b/arch/arm/mach-s3c24a0/include/mach/io.h
@@ -1,9 +1,9 @@
1/* arch/arm/plat-s3c/include/mach/io.h 1/* arch/arm/mach-s3c24a0/include/mach/io.h
2 * 2 *
3 * Copyright 2008 Simtec Electronics 3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben-linux@fluff.org> 4 * Ben Dooks <ben-linux@fluff.org>
5 * 5 *
6 * Default IO routines for plat-s3c based systems, such as S3C24A0 6 * Default IO routines for S3C24A0
7 */ 7 */
8 8
9#ifndef __ASM_ARM_ARCH_IO_H 9#ifndef __ASM_ARM_ARCH_IO_H
diff --git a/arch/arm/mach-s3c6400/Kconfig b/arch/arm/mach-s3c6400/Kconfig
deleted file mode 100644
index a250bf68709f..000000000000
--- a/arch/arm/mach-s3c6400/Kconfig
+++ /dev/null
@@ -1,30 +0,0 @@
1# Copyright 2008 Openmoko, Inc.
2# Simtec Electronics, Ben Dooks <ben@simtec.co.uk>
3#
4# Licensed under GPLv2
5
6# Configuration options for the S3C6410 CPU
7
8config CPU_S3C6400
9 bool
10 select CPU_S3C6400_INIT
11 select CPU_S3C6400_CLOCK
12 help
13 Enable S3C6400 CPU support
14
15config S3C6400_SETUP_SDHCI
16 bool
17 help
18 Internal configuration for default SDHCI
19 setup for S3C6400.
20
21# S36400 Macchine support
22
23config MACH_SMDK6400
24 bool "SMDK6400"
25 select CPU_S3C6400
26 select S3C_DEV_HSMMC
27 select S3C_DEV_NAND
28 select S3C6400_SETUP_SDHCI
29 help
30 Machine support for the Samsung SMDK6400
diff --git a/arch/arm/mach-s3c6400/Makefile b/arch/arm/mach-s3c6400/Makefile
deleted file mode 100644
index df1ce4aa03e5..000000000000
--- a/arch/arm/mach-s3c6400/Makefile
+++ /dev/null
@@ -1,23 +0,0 @@
1# arch/arm/mach-s3c6400/Makefile
2#
3# Copyright 2008 Openmoko, Inc.
4# Copyright 2008 Simtec Electronics
5#
6# Licensed under GPLv2
7
8obj-y :=
9obj-m :=
10obj-n :=
11obj- :=
12
13# Core support for S3C6400 system
14
15obj-$(CONFIG_CPU_S3C6400) += s3c6400.o
16
17# setup support
18
19obj-$(CONFIG_S3C6400_SETUP_SDHCI) += setup-sdhci.o
20
21# Machine support
22
23obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o
diff --git a/arch/arm/mach-s3c6400/include/mach/dma.h b/arch/arm/mach-s3c6400/include/mach/dma.h
deleted file mode 100644
index 6723860748be..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/dma.h
+++ /dev/null
@@ -1,70 +0,0 @@
1/* linux/arch/arm/mach-s3c6400/include/mach/dma.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C6400 - DMA support
9 */
10
11#ifndef __ASM_ARCH_DMA_H
12#define __ASM_ARCH_DMA_H __FILE__
13
14#define S3C_DMA_CHANNELS (16)
15
16/* see mach-s3c2410/dma.h for notes on dma channel numbers */
17
18/* Note, for the S3C64XX architecture we keep the DMACH_
19 * defines in the order they are allocated to [S]DMA0/[S]DMA1
20 * so that is easy to do DHACH_ -> DMA controller conversion
21 */
22enum dma_ch {
23 /* DMA0/SDMA0 */
24 DMACH_UART0 = 0,
25 DMACH_UART0_SRC2,
26 DMACH_UART1,
27 DMACH_UART1_SRC2,
28 DMACH_UART2,
29 DMACH_UART2_SRC2,
30 DMACH_UART3,
31 DMACH_UART3_SRC2,
32 DMACH_PCM0_TX,
33 DMACH_PCM0_RX,
34 DMACH_I2S0_OUT,
35 DMACH_I2S0_IN,
36 DMACH_SPI0_TX,
37 DMACH_SPI0_RX,
38 DMACH_HSI_I2SV40_TX,
39 DMACH_HSI_I2SV40_RX,
40
41 /* DMA1/SDMA1 */
42 DMACH_PCM1_TX = 16,
43 DMACH_PCM1_RX,
44 DMACH_I2S1_OUT,
45 DMACH_I2S1_IN,
46 DMACH_SPI1_TX,
47 DMACH_SPI1_RX,
48 DMACH_AC97_PCMOUT,
49 DMACH_AC97_PCMIN,
50 DMACH_AC97_MICIN,
51 DMACH_PWM,
52 DMACH_IRDA,
53 DMACH_EXTERNAL,
54 DMACH_RES1,
55 DMACH_RES2,
56 DMACH_SECURITY_RX, /* SDMA1 only */
57 DMACH_SECURITY_TX, /* SDMA1 only */
58 DMACH_MAX /* the end */
59};
60
61static __inline__ bool s3c_dma_has_circular(void)
62{
63 return true;
64}
65
66#define S3C2410_DMAF_CIRCULAR (1 << 0)
67
68#include <plat/dma.h>
69
70#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/irqs.h b/arch/arm/mach-s3c6400/include/mach/irqs.h
deleted file mode 100644
index 4c97f9a4370b..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/irqs.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/* linux/arch/arm/mach-s3c6400/include/mach/irqs.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C6400 - IRQ definitions
9 */
10
11#ifndef __ASM_ARCH_IRQS_H
12#define __ASM_ARCH_IRQS_H __FILE__
13
14#include <plat/irqs.h>
15
16#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-clock.h b/arch/arm/mach-s3c6400/include/mach/regs-clock.h
deleted file mode 100644
index a6c7f4eb3a1b..000000000000
--- a/arch/arm/mach-s3c6400/include/mach/regs-clock.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/* linux/arch/arm/mach-s3c6400/include/mach/regs-clock.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C64XX - clock register compatibility with s3c24xx
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <plat/regs-clock.h>
16
diff --git a/arch/arm/mach-s3c6410/Makefile b/arch/arm/mach-s3c6410/Makefile
deleted file mode 100644
index 3e48c3dbf973..000000000000
--- a/arch/arm/mach-s3c6410/Makefile
+++ /dev/null
@@ -1,26 +0,0 @@
1# arch/arm/plat-s3c6410/Makefile
2#
3# Copyright 2008 Openmoko, Inc.
4# Copyright 2008 Simtec Electronics
5#
6# Licensed under GPLv2
7
8obj-y :=
9obj-m :=
10obj-n :=
11obj- :=
12
13# Core support for S3C6410 system
14
15obj-$(CONFIG_CPU_S3C6410) += cpu.o
16
17# Helper and device support
18
19obj-$(CONFIG_S3C6410_SETUP_SDHCI) += setup-sdhci.o
20
21# machine support
22
23obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o
24obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o
25obj-$(CONFIG_MACH_NCP) += mach-ncp.o
26obj-$(CONFIG_MACH_HMT) += mach-hmt.o
diff --git a/arch/arm/mach-s3c6410/setup-sdhci.c b/arch/arm/mach-s3c6410/setup-sdhci.c
deleted file mode 100644
index 816d2d9f9ef8..000000000000
--- a/arch/arm/mach-s3c6410/setup-sdhci.c
+++ /dev/null
@@ -1,68 +0,0 @@
1/* linux/arch/arm/mach-s3c6410/setup-sdhci.c
2 *
3 * Copyright 2008 Simtec Electronics
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/interrupt.h>
18#include <linux/platform_device.h>
19#include <linux/io.h>
20
21#include <linux/mmc/card.h>
22#include <linux/mmc/host.h>
23
24#include <plat/regs-sdhci.h>
25#include <plat/sdhci.h>
26
27/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
28
29char *s3c6410_hsmmc_clksrcs[4] = {
30 [0] = "hsmmc",
31 [1] = "hsmmc",
32 [2] = "mmc_bus",
33 /* [3] = "48m", - note not successfully used yet */
34};
35
36
37void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev,
38 void __iomem *r,
39 struct mmc_ios *ios,
40 struct mmc_card *card)
41{
42 u32 ctrl2, ctrl3;
43
44 /* don't need to alter anything acording to card-type */
45
46 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
47
48 ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
49 ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
50 ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
51 S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
52 S3C_SDHCI_CTRL2_ENFBCLKRX |
53 S3C_SDHCI_CTRL2_DFCNT_NONE |
54 S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
55
56 if (ios->clock < 25 * 1000000)
57 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
58 S3C_SDHCI_CTRL3_FCSEL2 |
59 S3C_SDHCI_CTRL3_FCSEL1 |
60 S3C_SDHCI_CTRL3_FCSEL0);
61 else
62 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
63
64 printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3);
65 writel(ctrl2, r + S3C_SDHCI_CONTROL2);
66 writel(ctrl3, r + S3C_SDHCI_CONTROL3);
67}
68
diff --git a/arch/arm/mach-s3c6410/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 162f4561f80f..959df3840de5 100644
--- a/arch/arm/mach-s3c6410/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -1,22 +1,78 @@
1# Copyright 2008 Openmoko, Inc. 1# Copyright 2008 Openmoko, Inc.
2# Copyright 2008 Simtec Electronics 2# Simtec Electronics, Ben Dooks <ben@simtec.co.uk>
3# 3#
4# Licensed under GPLv2 4# Licensed under GPLv2
5 5
6# temporary until we can eliminate all drivers using it.
7config PLAT_S3C64XX
8 bool
9 depends on ARCH_S3C64XX
10 default y
11 help
12 Base platform code for any Samsung S3C64XX device
13
14
6# Configuration options for the S3C6410 CPU 15# Configuration options for the S3C6410 CPU
7 16
17config CPU_S3C6400
18 bool
19 help
20 Enable S3C6400 CPU support
21
8config CPU_S3C6410 22config CPU_S3C6410
9 bool 23 bool
10 select CPU_S3C6400_INIT
11 select CPU_S3C6400_CLOCK
12 help 24 help
13 Enable S3C6410 CPU support 25 Enable S3C6410 CPU support
14 26
15config S3C6410_SETUP_SDHCI 27config S3C64XX_DMA
16 bool 28 bool "S3C64XX DMA"
29 select S3C_DMA
30
31config S3C64XX_SETUP_SDHCI
17 select S3C64XX_SETUP_SDHCI_GPIO 32 select S3C64XX_SETUP_SDHCI_GPIO
33 bool
18 help 34 help
19 Internal helper functions for S3C6410 based SDHCI systems 35 Internal configuration for default SDHCI setup for S3C6400 and
36 S3C6410 SoCs.
37
38# platform specific device setup
39
40config S3C64XX_SETUP_I2C0
41 bool
42 default y
43 help
44 Common setup code for i2c bus 0.
45
46 Note, currently since i2c0 is always compiled, this setup helper
47 is always compiled with it.
48
49config S3C64XX_SETUP_I2C1
50 bool
51 help
52 Common setup code for i2c bus 1.
53
54config S3C64XX_SETUP_FB_24BPP
55 bool
56 help
57 Common setup code for S3C64XX with an 24bpp RGB display helper.
58
59config S3C64XX_SETUP_SDHCI_GPIO
60 bool
61 help
62 Common setup code for S3C64XX SDHCI GPIO configurations
63
64# S36400 Macchine support
65
66config MACH_SMDK6400
67 bool "SMDK6400"
68 select CPU_S3C6400
69 select S3C_DEV_HSMMC
70 select S3C_DEV_NAND
71 select S3C64XX_SETUP_SDHCI
72 help
73 Machine support for the Samsung SMDK6400
74
75# S3C6410 machine support
20 76
21config MACH_ANW6410 77config MACH_ANW6410
22 bool "A&W6410" 78 bool "A&W6410"
@@ -35,7 +91,7 @@ config MACH_SMDK6410
35 select S3C_DEV_FB 91 select S3C_DEV_FB
36 select S3C_DEV_USB_HOST 92 select S3C_DEV_USB_HOST
37 select S3C_DEV_USB_HSOTG 93 select S3C_DEV_USB_HSOTG
38 select S3C6410_SETUP_SDHCI 94 select S3C64XX_SETUP_SDHCI
39 select S3C64XX_SETUP_I2C1 95 select S3C64XX_SETUP_I2C1
40 select S3C64XX_SETUP_FB_24BPP 96 select S3C64XX_SETUP_FB_24BPP
41 help 97 help
@@ -58,7 +114,7 @@ config SMDK6410_SD_CH0
58 at least some SMDK6410 boards come with the 114 at least some SMDK6410 boards come with the
59 resistors fitted so that the card detects for 115 resistors fitted so that the card detects for
60 channels 0 and 1 are the same. 116 channels 0 and 1 are the same.
61 117
62config SMDK6410_SD_CH1 118config SMDK6410_SD_CH1
63 bool "Use channel 1 only" 119 bool "Use channel 1 only"
64 depends on MACH_SMDK6410 120 depends on MACH_SMDK6410
@@ -88,6 +144,21 @@ config SMDK6410_WM1190_EV1
88 detected at runtime so the the resulting kernel can be used 144 detected at runtime so the the resulting kernel can be used
89 with or without the 1190-EV1 fitted. 145 with or without the 1190-EV1 fitted.
90 146
147config SMDK6410_WM1192_EV1
148 bool "Support Wolfson Microelectronics 1192-EV1 PMIC card"
149 depends on MACH_SMDK6410
150 select REGULATOR
151 select REGULATOR_WM831X
152 select S3C24XX_GPIO_EXTRA64
153 select MFD_WM831X
154 help
155 The Wolfson Microelectronics 1192-EV1 is a WM831x based PMIC
156 daughtercard for the Samsung SMDK6410 reference platform.
157 Enabling this option will build support for this module into
158 the kernel. The presence of the daughtercard will be
159 detected at runtime so the the resulting kernel can be used
160 with or without the 1192-EV1 fitted.
161
91config MACH_NCP 162config MACH_NCP
92 bool "NCP" 163 bool "NCP"
93 select CPU_S3C6410 164 select CPU_S3C6410
diff --git a/arch/arm/plat-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index 80255a5e1789..d1d341a14f75 100644
--- a/arch/arm/plat-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -1,4 +1,4 @@
1# arch/arm/plat-s3c64xx/Makefile 1# arch/arm/mach-s3c64xx/Makefile
2# 2#
3# Copyright 2008 Openmoko, Inc. 3# Copyright 2008 Openmoko, Inc.
4# Copyright 2008 Simtec Electronics 4# Copyright 2008 Simtec Electronics
@@ -7,44 +7,56 @@
7 7
8obj-y := 8obj-y :=
9obj-m := 9obj-m :=
10obj-n := dummy.o 10obj-n :=
11obj- := 11obj- :=
12 12
13# Core files 13# Core files
14
15obj-y += dev-uart.o
16obj-y += dev-rtc.o
17obj-y += cpu.o 14obj-y += cpu.o
18obj-y += irq.o
19obj-y += irq-eint.o
20obj-y += clock.o 15obj-y += clock.o
21obj-y += gpiolib.o 16obj-y += gpiolib.o
22 17
23# CPU support 18# Core support for S3C6400 system
24 19
25obj-$(CONFIG_CPU_S3C6400_INIT) += s3c6400-init.o 20obj-$(CONFIG_CPU_S3C6400) += s3c6400.o
26obj-$(CONFIG_CPU_S3C6400_CLOCK) += s3c6400-clock.o 21obj-$(CONFIG_CPU_S3C6410) += s3c6410.o
27obj-$(CONFIG_CPU_FREQ_S3C64XX) += cpufreq.o 22
23obj-y += irq.o
24obj-y += irq-eint.o
28 25
29# PM support 26# CPU frequency scaling
30 27
31obj-$(CONFIG_PM) += pm.o 28obj-$(CONFIG_CPU_FREQ_S3C64XX) += cpufreq.o
32obj-$(CONFIG_PM) += sleep.o
33obj-$(CONFIG_PM) += irq-pm.o
34 29
35# DMA support 30# DMA support
36 31
37obj-$(CONFIG_S3C64XX_DMA) += dma.o 32obj-$(CONFIG_S3C64XX_DMA) += dma.o
38 33
39# ADC support
40
41obj-$(CONFIG_S3C_ADC) += dev-adc.o
42
43# Device setup 34# Device setup
44 35
45obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o 36obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o
46obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o 37obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o
38obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o
47obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o 39obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
48obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 40obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
49obj-$(CONFIG_SND_S3C24XX_SOC) += dev-audio.o 41
50obj-$(CONFIG_SPI_S3C64XX) += dev-spi.o 42# PM
43
44obj-$(CONFIG_PM) += pm.o
45obj-$(CONFIG_PM) += sleep.o
46obj-$(CONFIG_PM) += irq-pm.o
47
48# Machine support
49
50obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o
51obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o
52obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o
53obj-$(CONFIG_MACH_NCP) += mach-ncp.o
54obj-$(CONFIG_MACH_HMT) += mach-hmt.o
55
56# device support
57
58obj-y += dev-uart.o
59obj-y += dev-rtc.o
60obj-$(CONFIG_S3C_ADC) += dev-adc.o
61obj-$(CONFIG_SND_S3C24XX_SOC) += dev-audio.o
62obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
diff --git a/arch/arm/mach-s3c6400/Makefile.boot b/arch/arm/mach-s3c64xx/Makefile.boot
index ba41fdc0a586..ba41fdc0a586 100644
--- a/arch/arm/mach-s3c6400/Makefile.boot
+++ b/arch/arm/mach-s3c64xx/Makefile.boot
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/mach-s3c64xx/clock.c
index cb2bf4bff051..2ac2e7d73e53 100644
--- a/arch/arm/plat-s3c64xx/s3c6400-clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -1,11 +1,11 @@
1/* linux/arch/arm/plat-s3c64xx/s3c6400-clock.c 1/* linux/arch/arm/plat-s3c64xx/clock.c
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/ 6 * http://armlinux.simtec.co.uk/
7 * 7 *
8 * S3C6400 based common clock support 8 * S3C64XX Base clock support
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
@@ -14,24 +14,24 @@
14 14
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/kernel.h> 17#include <linux/interrupt.h>
18#include <linux/list.h> 18#include <linux/ioport.h>
19#include <linux/errno.h>
20#include <linux/err.h>
21#include <linux/clk.h> 19#include <linux/clk.h>
22#include <linux/sysdev.h> 20#include <linux/err.h>
23#include <linux/io.h> 21#include <linux/io.h>
24 22
25#include <mach/hardware.h> 23#include <mach/hardware.h>
26#include <mach/map.h> 24#include <mach/map.h>
27 25
28#include <plat/cpu-freq.h> 26#include <mach/regs-sys.h>
27#include <mach/regs-clock.h>
28#include <mach/pll.h>
29 29
30#include <plat/regs-clock.h> 30#include <plat/cpu.h>
31#include <plat/devs.h>
32#include <plat/cpu-freq.h>
31#include <plat/clock.h> 33#include <plat/clock.h>
32#include <plat/clock-clksrc.h> 34#include <plat/clock-clksrc.h>
33#include <plat/cpu.h>
34#include <plat/pll.h>
35 35
36/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call 36/* fin_apll, fin_mpll and fin_epll are all the same clock, which we call
37 * ext_xtal_mux for want of an actual name from the manual. 37 * ext_xtal_mux for want of an actual name from the manual.
@@ -49,6 +49,259 @@ static struct clk clk_ext_xtal_mux = {
49#define clk_fout_mpll clk_mpll 49#define clk_fout_mpll clk_mpll
50#define clk_fout_epll clk_epll 50#define clk_fout_epll clk_epll
51 51
52struct clk clk_h2 = {
53 .name = "hclk2",
54 .id = -1,
55 .rate = 0,
56};
57
58struct clk clk_27m = {
59 .name = "clk_27m",
60 .id = -1,
61 .rate = 27000000,
62};
63
64static int clk_48m_ctrl(struct clk *clk, int enable)
65{
66 unsigned long flags;
67 u32 val;
68
69 /* can't rely on clock lock, this register has other usages */
70 local_irq_save(flags);
71
72 val = __raw_readl(S3C64XX_OTHERS);
73 if (enable)
74 val |= S3C64XX_OTHERS_USBMASK;
75 else
76 val &= ~S3C64XX_OTHERS_USBMASK;
77
78 __raw_writel(val, S3C64XX_OTHERS);
79 local_irq_restore(flags);
80
81 return 0;
82}
83
84struct clk clk_48m = {
85 .name = "clk_48m",
86 .id = -1,
87 .rate = 48000000,
88 .enable = clk_48m_ctrl,
89};
90
91static int inline s3c64xx_gate(void __iomem *reg,
92 struct clk *clk,
93 int enable)
94{
95 unsigned int ctrlbit = clk->ctrlbit;
96 u32 con;
97
98 con = __raw_readl(reg);
99
100 if (enable)
101 con |= ctrlbit;
102 else
103 con &= ~ctrlbit;
104
105 __raw_writel(con, reg);
106 return 0;
107}
108
109static int s3c64xx_pclk_ctrl(struct clk *clk, int enable)
110{
111 return s3c64xx_gate(S3C_PCLK_GATE, clk, enable);
112}
113
114static int s3c64xx_hclk_ctrl(struct clk *clk, int enable)
115{
116 return s3c64xx_gate(S3C_HCLK_GATE, clk, enable);
117}
118
119int s3c64xx_sclk_ctrl(struct clk *clk, int enable)
120{
121 return s3c64xx_gate(S3C_SCLK_GATE, clk, enable);
122}
123
124static struct clk init_clocks_disable[] = {
125 {
126 .name = "nand",
127 .id = -1,
128 .parent = &clk_h,
129 }, {
130 .name = "adc",
131 .id = -1,
132 .parent = &clk_p,
133 .enable = s3c64xx_pclk_ctrl,
134 .ctrlbit = S3C_CLKCON_PCLK_TSADC,
135 }, {
136 .name = "i2c",
137 .id = -1,
138 .parent = &clk_p,
139 .enable = s3c64xx_pclk_ctrl,
140 .ctrlbit = S3C_CLKCON_PCLK_IIC,
141 }, {
142 .name = "iis",
143 .id = 0,
144 .parent = &clk_p,
145 .enable = s3c64xx_pclk_ctrl,
146 .ctrlbit = S3C_CLKCON_PCLK_IIS0,
147 }, {
148 .name = "iis",
149 .id = 1,
150 .parent = &clk_p,
151 .enable = s3c64xx_pclk_ctrl,
152 .ctrlbit = S3C_CLKCON_PCLK_IIS1,
153 }, {
154#ifdef CONFIG_CPU_S3C6410
155 .name = "iis",
156 .id = -1, /* There's only one IISv4 port */
157 .parent = &clk_p,
158 .enable = s3c64xx_pclk_ctrl,
159 .ctrlbit = S3C6410_CLKCON_PCLK_IIS2,
160 }, {
161#endif
162 .name = "spi",
163 .id = 0,
164 .parent = &clk_p,
165 .enable = s3c64xx_pclk_ctrl,
166 .ctrlbit = S3C_CLKCON_PCLK_SPI0,
167 }, {
168 .name = "spi",
169 .id = 1,
170 .parent = &clk_p,
171 .enable = s3c64xx_pclk_ctrl,
172 .ctrlbit = S3C_CLKCON_PCLK_SPI1,
173 }, {
174 .name = "spi_48m",
175 .id = 0,
176 .parent = &clk_48m,
177 .enable = s3c64xx_sclk_ctrl,
178 .ctrlbit = S3C_CLKCON_SCLK_SPI0_48,
179 }, {
180 .name = "spi_48m",
181 .id = 1,
182 .parent = &clk_48m,
183 .enable = s3c64xx_sclk_ctrl,
184 .ctrlbit = S3C_CLKCON_SCLK_SPI1_48,
185 }, {
186 .name = "48m",
187 .id = 0,
188 .parent = &clk_48m,
189 .enable = s3c64xx_sclk_ctrl,
190 .ctrlbit = S3C_CLKCON_SCLK_MMC0_48,
191 }, {
192 .name = "48m",
193 .id = 1,
194 .parent = &clk_48m,
195 .enable = s3c64xx_sclk_ctrl,
196 .ctrlbit = S3C_CLKCON_SCLK_MMC1_48,
197 }, {
198 .name = "48m",
199 .id = 2,
200 .parent = &clk_48m,
201 .enable = s3c64xx_sclk_ctrl,
202 .ctrlbit = S3C_CLKCON_SCLK_MMC2_48,
203 }, {
204 .name = "dma0",
205 .id = -1,
206 .parent = &clk_h,
207 .enable = s3c64xx_hclk_ctrl,
208 .ctrlbit = S3C_CLKCON_HCLK_DMA0,
209 }, {
210 .name = "dma1",
211 .id = -1,
212 .parent = &clk_h,
213 .enable = s3c64xx_hclk_ctrl,
214 .ctrlbit = S3C_CLKCON_HCLK_DMA1,
215 },
216};
217
218static struct clk init_clocks[] = {
219 {
220 .name = "lcd",
221 .id = -1,
222 .parent = &clk_h,
223 .enable = s3c64xx_hclk_ctrl,
224 .ctrlbit = S3C_CLKCON_HCLK_LCD,
225 }, {
226 .name = "gpio",
227 .id = -1,
228 .parent = &clk_p,
229 .enable = s3c64xx_pclk_ctrl,
230 .ctrlbit = S3C_CLKCON_PCLK_GPIO,
231 }, {
232 .name = "usb-host",
233 .id = -1,
234 .parent = &clk_h,
235 .enable = s3c64xx_hclk_ctrl,
236 .ctrlbit = S3C_CLKCON_HCLK_UHOST,
237 }, {
238 .name = "hsmmc",
239 .id = 0,
240 .parent = &clk_h,
241 .enable = s3c64xx_hclk_ctrl,
242 .ctrlbit = S3C_CLKCON_HCLK_HSMMC0,
243 }, {
244 .name = "hsmmc",
245 .id = 1,
246 .parent = &clk_h,
247 .enable = s3c64xx_hclk_ctrl,
248 .ctrlbit = S3C_CLKCON_HCLK_HSMMC1,
249 }, {
250 .name = "hsmmc",
251 .id = 2,
252 .parent = &clk_h,
253 .enable = s3c64xx_hclk_ctrl,
254 .ctrlbit = S3C_CLKCON_HCLK_HSMMC2,
255 }, {
256 .name = "timers",
257 .id = -1,
258 .parent = &clk_p,
259 .enable = s3c64xx_pclk_ctrl,
260 .ctrlbit = S3C_CLKCON_PCLK_PWM,
261 }, {
262 .name = "uart",
263 .id = 0,
264 .parent = &clk_p,
265 .enable = s3c64xx_pclk_ctrl,
266 .ctrlbit = S3C_CLKCON_PCLK_UART0,
267 }, {
268 .name = "uart",
269 .id = 1,
270 .parent = &clk_p,
271 .enable = s3c64xx_pclk_ctrl,
272 .ctrlbit = S3C_CLKCON_PCLK_UART1,
273 }, {
274 .name = "uart",
275 .id = 2,
276 .parent = &clk_p,
277 .enable = s3c64xx_pclk_ctrl,
278 .ctrlbit = S3C_CLKCON_PCLK_UART2,
279 }, {
280 .name = "uart",
281 .id = 3,
282 .parent = &clk_p,
283 .enable = s3c64xx_pclk_ctrl,
284 .ctrlbit = S3C_CLKCON_PCLK_UART3,
285 }, {
286 .name = "rtc",
287 .id = -1,
288 .parent = &clk_p,
289 .enable = s3c64xx_pclk_ctrl,
290 .ctrlbit = S3C_CLKCON_PCLK_RTC,
291 }, {
292 .name = "watchdog",
293 .id = -1,
294 .parent = &clk_p,
295 .ctrlbit = S3C_CLKCON_PCLK_WDT,
296 }, {
297 .name = "ac97",
298 .id = -1,
299 .parent = &clk_p,
300 .ctrlbit = S3C_CLKCON_PCLK_AC97,
301 }
302};
303
304
52static struct clk clk_fout_apll = { 305static struct clk clk_fout_apll = {
53 .name = "fout_apll", 306 .name = "fout_apll",
54 .id = -1, 307 .id = -1,
@@ -492,7 +745,7 @@ void __init_or_cpufreq s3c6400_setup_clocks(void)
492 s3c_set_clksrc(&clksrcs[ptr], true); 745 s3c_set_clksrc(&clksrcs[ptr], true);
493} 746}
494 747
495static struct clk *clks[] __initdata = { 748static struct clk *clks1[] __initdata = {
496 &clk_ext_xtal_mux, 749 &clk_ext_xtal_mux,
497 &clk_iis_cd0, 750 &clk_iis_cd0,
498 &clk_iis_cd1, 751 &clk_iis_cd1,
@@ -503,19 +756,29 @@ static struct clk *clks[] __initdata = {
503 &clk_arm, 756 &clk_arm,
504}; 757};
505 758
759static struct clk *clks[] __initdata = {
760 &clk_ext,
761 &clk_epll,
762 &clk_27m,
763 &clk_48m,
764 &clk_h2,
765};
766
506/** 767/**
507 * s3c6400_register_clocks - register clocks for s3c6400 and above 768 * s3c64xx_register_clocks - register clocks for s3c6400 and s3c6410
508 * @armclk_divlimit: Divisor mask for ARMCLK 769 * @xtal: The rate for the clock crystal feeding the PLLs.
770 * @armclk_divlimit: Divisor mask for ARMCLK.
509 * 771 *
510 * Register the clocks for the S3C6400 and above SoC range, such 772 * Register the clocks for the S3C6400 and S3C6410 SoC range, such
511 * as ARMCLK and the clocks which have divider chains attached. 773 * as ARMCLK as well as the necessary parent clocks.
512 * 774 *
513 * This call does not setup the clocks, which is left to the 775 * This call does not setup the clocks, which is left to the
514 * s3c6400_setup_clocks() call which may be needed by the cpufreq 776 * s3c6400_setup_clocks() call which may be needed by the cpufreq
515 * or resume code to re-set the clocks if the bootloader has changed 777 * or resume code to re-set the clocks if the bootloader has changed
516 * them. 778 * them.
517 */ 779 */
518void __init s3c6400_register_clocks(unsigned armclk_divlimit) 780void __init s3c64xx_register_clocks(unsigned long xtal,
781 unsigned armclk_divlimit)
519{ 782{
520 struct clk *clkp; 783 struct clk *clkp;
521 int ret; 784 int ret;
@@ -523,14 +786,24 @@ void __init s3c6400_register_clocks(unsigned armclk_divlimit)
523 786
524 armclk_mask = armclk_divlimit; 787 armclk_mask = armclk_divlimit;
525 788
526 for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) { 789 s3c24xx_register_baseclocks(xtal);
527 clkp = clks[ptr]; 790 s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
791
792 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
793
794 clkp = init_clocks_disable;
795 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
796
528 ret = s3c24xx_register_clock(clkp); 797 ret = s3c24xx_register_clock(clkp);
529 if (ret < 0) { 798 if (ret < 0) {
530 printk(KERN_ERR "Failed to register clock %s (%d)\n", 799 printk(KERN_ERR "Failed to register clock %s (%d)\n",
531 clkp->name, ret); 800 clkp->name, ret);
532 } 801 }
802
803 (clkp->enable)(clkp, 0);
533 } 804 }
534 805
806 s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1));
535 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); 807 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
808 s3c_pwmclk_init();
536} 809}
diff --git a/arch/arm/plat-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c
index bc7ca1812e32..374e45e566b8 100644
--- a/arch/arm/plat-s3c64xx/cpu.c
+++ b/arch/arm/mach-s3c64xx/cpu.c
@@ -33,8 +33,8 @@
33#include <plat/devs.h> 33#include <plat/devs.h>
34#include <plat/clock.h> 34#include <plat/clock.h>
35 35
36#include <plat/s3c6400.h> 36#include <mach/s3c6400.h>
37#include <plat/s3c6410.h> 37#include <mach/s3c6410.h>
38 38
39/* table of supported CPUs */ 39/* table of supported CPUs */
40 40
@@ -129,6 +129,12 @@ static struct sys_device s3c64xx_sysdev = {
129 .cls = &s3c64xx_sysclass, 129 .cls = &s3c64xx_sysclass,
130}; 130};
131 131
132/* uart registration process */
133
134void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
135{
136 s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
137}
132 138
133/* read cpu identification code */ 139/* read cpu identification code */
134 140
diff --git a/arch/arm/plat-s3c64xx/cpufreq.c b/arch/arm/mach-s3c64xx/cpufreq.c
index 74c0e8347de5..74c0e8347de5 100644
--- a/arch/arm/plat-s3c64xx/cpufreq.c
+++ b/arch/arm/mach-s3c64xx/cpufreq.c
diff --git a/arch/arm/plat-s3c64xx/dev-adc.c b/arch/arm/mach-s3c64xx/dev-adc.c
index fafef9b6bcfa..fafef9b6bcfa 100644
--- a/arch/arm/plat-s3c64xx/dev-adc.c
+++ b/arch/arm/mach-s3c64xx/dev-adc.c
diff --git a/arch/arm/plat-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c
index f6b7bfb519d7..c3e9e73bd0f9 100644
--- a/arch/arm/plat-s3c64xx/dev-audio.c
+++ b/arch/arm/mach-s3c64xx/dev-audio.c
@@ -11,6 +11,7 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/string.h> 12#include <linux/string.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/dma-mapping.h>
14 15
15#include <mach/irqs.h> 16#include <mach/irqs.h>
16#include <mach/map.h> 17#include <mach/map.h>
@@ -19,12 +20,13 @@
19 20
20#include <plat/devs.h> 21#include <plat/devs.h>
21#include <plat/audio.h> 22#include <plat/audio.h>
22#include <plat/gpio-bank-c.h>
23#include <plat/gpio-bank-d.h>
24#include <plat/gpio-bank-e.h>
25#include <plat/gpio-bank-h.h>
26#include <plat/gpio-cfg.h> 23#include <plat/gpio-cfg.h>
27 24
25#include <mach/gpio-bank-c.h>
26#include <mach/gpio-bank-d.h>
27#include <mach/gpio-bank-e.h>
28#include <mach/gpio-bank-h.h>
29
28static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev) 30static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev)
29{ 31{
30 switch (pdev->id) { 32 switch (pdev->id) {
@@ -254,3 +256,80 @@ struct platform_device s3c64xx_device_pcm1 = {
254 }, 256 },
255}; 257};
256EXPORT_SYMBOL(s3c64xx_device_pcm1); 258EXPORT_SYMBOL(s3c64xx_device_pcm1);
259
260/* AC97 Controller platform devices */
261
262static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev)
263{
264 s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_AC97_BITCLK);
265 s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_AC97_nRESET);
266 s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_AC97_SYNC);
267 s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_AC97_SDI);
268 s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_AC97_SDO);
269
270 return 0;
271}
272
273static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev)
274{
275 s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_AC97_BITCLK);
276 s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_AC97_nRESET);
277 s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_AC97_SYNC);
278 s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_AC97_SDI);
279 s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_AC97_SDO);
280
281 return 0;
282}
283
284static struct resource s3c64xx_ac97_resource[] = {
285 [0] = {
286 .start = S3C64XX_PA_AC97,
287 .end = S3C64XX_PA_AC97 + 0x100 - 1,
288 .flags = IORESOURCE_MEM,
289 },
290 [1] = {
291 .start = DMACH_AC97_PCMOUT,
292 .end = DMACH_AC97_PCMOUT,
293 .flags = IORESOURCE_DMA,
294 },
295 [2] = {
296 .start = DMACH_AC97_PCMIN,
297 .end = DMACH_AC97_PCMIN,
298 .flags = IORESOURCE_DMA,
299 },
300 [3] = {
301 .start = DMACH_AC97_MICIN,
302 .end = DMACH_AC97_MICIN,
303 .flags = IORESOURCE_DMA,
304 },
305 [4] = {
306 .start = IRQ_AC97,
307 .end = IRQ_AC97,
308 .flags = IORESOURCE_IRQ,
309 },
310};
311
312static struct s3c_audio_pdata s3c_ac97_pdata;
313
314static u64 s3c64xx_ac97_dmamask = DMA_BIT_MASK(32);
315
316struct platform_device s3c64xx_device_ac97 = {
317 .name = "s3c-ac97",
318 .id = -1,
319 .num_resources = ARRAY_SIZE(s3c64xx_ac97_resource),
320 .resource = s3c64xx_ac97_resource,
321 .dev = {
322 .platform_data = &s3c_ac97_pdata,
323 .dma_mask = &s3c64xx_ac97_dmamask,
324 .coherent_dma_mask = DMA_BIT_MASK(32),
325 },
326};
327EXPORT_SYMBOL(s3c64xx_device_ac97);
328
329void __init s3c64xx_ac97_setup_gpio(int num)
330{
331 if (num == S3C64XX_AC97_GPD)
332 s3c_ac97_pdata.cfg_gpio = s3c64xx_ac97_cfg_gpd;
333 else
334 s3c_ac97_pdata.cfg_gpio = s3c64xx_ac97_cfg_gpe;
335}
diff --git a/arch/arm/plat-s3c64xx/dev-rtc.c b/arch/arm/mach-s3c64xx/dev-rtc.c
index b9e7a05f0129..b9e7a05f0129 100644
--- a/arch/arm/plat-s3c64xx/dev-rtc.c
+++ b/arch/arm/mach-s3c64xx/dev-rtc.c
diff --git a/arch/arm/plat-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
index ca10388d7ed1..29c32d088515 100644
--- a/arch/arm/plat-s3c64xx/dev-spi.c
+++ b/arch/arm/mach-s3c64xx/dev-spi.c
@@ -16,11 +16,10 @@
16#include <mach/dma.h> 16#include <mach/dma.h>
17#include <mach/map.h> 17#include <mach/map.h>
18#include <mach/gpio.h> 18#include <mach/gpio.h>
19 19#include <mach/gpio-bank-c.h>
20#include <plat/spi-clocks.h> 20#include <mach/spi-clocks.h>
21 21
22#include <plat/s3c64xx-spi.h> 22#include <plat/s3c64xx-spi.h>
23#include <plat/gpio-bank-c.h>
24#include <plat/gpio-cfg.h> 23#include <plat/gpio-cfg.h>
25#include <plat/irqs.h> 24#include <plat/irqs.h>
26 25
diff --git a/arch/arm/plat-s3c64xx/dev-uart.c b/arch/arm/mach-s3c64xx/dev-uart.c
index f797f748b999..f797f748b999 100644
--- a/arch/arm/plat-s3c64xx/dev-uart.c
+++ b/arch/arm/mach-s3c64xx/dev-uart.c
diff --git a/arch/arm/plat-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index d554b936fcfb..b62bdf18dca4 100644
--- a/arch/arm/plat-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -27,8 +27,7 @@
27#include <mach/map.h> 27#include <mach/map.h>
28#include <mach/irqs.h> 28#include <mach/irqs.h>
29 29
30#include <plat/dma-plat.h> 30#include <mach/regs-sys.h>
31#include <plat/regs-sys.h>
32 31
33#include <asm/hardware/pl080.h> 32#include <asm/hardware/pl080.h>
34 33
diff --git a/arch/arm/plat-s3c64xx/gpiolib.c b/arch/arm/mach-s3c64xx/gpiolib.c
index b6e3f55321fa..66e6794481d2 100644
--- a/arch/arm/plat-s3c64xx/gpiolib.c
+++ b/arch/arm/mach-s3c64xx/gpiolib.c
@@ -22,7 +22,7 @@
22#include <plat/gpio-core.h> 22#include <plat/gpio-core.h>
23#include <plat/gpio-cfg.h> 23#include <plat/gpio-cfg.h>
24#include <plat/gpio-cfg-helpers.h> 24#include <plat/gpio-cfg-helpers.h>
25#include <plat/regs-gpio.h> 25#include <mach/regs-gpio.h>
26 26
27/* GPIO bank summary: 27/* GPIO bank summary:
28 * 28 *
diff --git a/arch/arm/mach-s3c6400/include/mach/debug-macro.S b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S
index b18ac5266dfc..b18ac5266dfc 100644
--- a/arch/arm/mach-s3c6400/include/mach/debug-macro.S
+++ b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S
diff --git a/arch/arm/plat-s3c64xx/include/plat/dma-plat.h b/arch/arm/mach-s3c64xx/include/mach/dma.h
index 8f76a1e474d6..0a5d9268a23e 100644
--- a/arch/arm/plat-s3c64xx/include/plat/dma-plat.h
+++ b/arch/arm/mach-s3c64xx/include/mach/dma.h
@@ -1,16 +1,71 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/dma-plat.h 1/* linux/arch/arm/mach-s3c6400/include/mach/dma.h
2 * 2 *
3 * Copyright 2009 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2009 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/ 6 * http://armlinux.simtec.co.uk/
7 * 7 *
8 * S3C64XX DMA core 8 * S3C6400 - DMA support
9 * 9 */
10 * This program is free software; you can redistribute it and/or modify 10
11 * it under the terms of the GNU General Public License version 2 as 11#ifndef __ASM_ARCH_DMA_H
12 * published by the Free Software Foundation. 12#define __ASM_ARCH_DMA_H __FILE__
13*/ 13
14#define S3C_DMA_CHANNELS (16)
15
16/* see mach-s3c2410/dma.h for notes on dma channel numbers */
17
18/* Note, for the S3C64XX architecture we keep the DMACH_
19 * defines in the order they are allocated to [S]DMA0/[S]DMA1
20 * so that is easy to do DHACH_ -> DMA controller conversion
21 */
22enum dma_ch {
23 /* DMA0/SDMA0 */
24 DMACH_UART0 = 0,
25 DMACH_UART0_SRC2,
26 DMACH_UART1,
27 DMACH_UART1_SRC2,
28 DMACH_UART2,
29 DMACH_UART2_SRC2,
30 DMACH_UART3,
31 DMACH_UART3_SRC2,
32 DMACH_PCM0_TX,
33 DMACH_PCM0_RX,
34 DMACH_I2S0_OUT,
35 DMACH_I2S0_IN,
36 DMACH_SPI0_TX,
37 DMACH_SPI0_RX,
38 DMACH_HSI_I2SV40_TX,
39 DMACH_HSI_I2SV40_RX,
40
41 /* DMA1/SDMA1 */
42 DMACH_PCM1_TX = 16,
43 DMACH_PCM1_RX,
44 DMACH_I2S1_OUT,
45 DMACH_I2S1_IN,
46 DMACH_SPI1_TX,
47 DMACH_SPI1_RX,
48 DMACH_AC97_PCMOUT,
49 DMACH_AC97_PCMIN,
50 DMACH_AC97_MICIN,
51 DMACH_PWM,
52 DMACH_IRDA,
53 DMACH_EXTERNAL,
54 DMACH_RES1,
55 DMACH_RES2,
56 DMACH_SECURITY_RX, /* SDMA1 only */
57 DMACH_SECURITY_TX, /* SDMA1 only */
58 DMACH_MAX /* the end */
59};
60
61static __inline__ bool s3c_dma_has_circular(void)
62{
63 return true;
64}
65
66#define S3C2410_DMAF_CIRCULAR (1 << 0)
67
68#include <plat/dma.h>
14 69
15#define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */ 70#define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */
16 71
@@ -68,3 +123,5 @@ struct s3c2410_dma_chan {
68}; 123};
69 124
70#include <plat/dma-core.h> 125#include <plat/dma-core.h>
126
127#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
index 33a8fe240882..dd362604dcce 100644
--- a/arch/arm/mach-s3c6400/include/mach/entry-macro.S
+++ b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S
@@ -13,6 +13,6 @@
13*/ 13*/
14 14
15#include <mach/map.h> 15#include <mach/map.h>
16#include <plat/irqs.h> 16#include <mach/irqs.h>
17 17
18#include <asm/entry-macro-vic2.S> 18#include <asm/entry-macro-vic2.S>
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h
index 9aa0e427d113..34212e1a7e81 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-a.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-a.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h
index 3933adb4d50a..7232c037e642 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-b.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-b.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h
index e22b49f4f982..db189ab1639a 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-c.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-c.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h
index 6fe4a49c26f0..1a01cee7aca3 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-d.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-d.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h
index 7fcf3d8e0a48..f057adb627dd 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-e.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h
index f3faff974a18..62ab8f5e7835 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-f.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-f.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h
index 35bbd2378e55..b94954af1598 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-g.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h
index 2ba1767512d7..5d75aaad865e 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-h.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h
index ce9ebe335566..4ceaa6098bc7 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-i.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-i.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h
index 21a906299d30..6f25cd079a40 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-j.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-j.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h
index 569e76120881..d0aeda1cd9de 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-n.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-n.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h
index b09e12954b57..21868fa102d0 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-o.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-o.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h
index 92f00517926b..46bcfb63b8de 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-p.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-p.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h
index 565e60aaee47..1712223487b0 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/gpio-bank-q.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-q.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/mach-s3c6400/include/mach/gpio.h b/arch/arm/mach-s3c64xx/include/mach/gpio.h
index e8e35e8fe731..0d46e994048a 100644
--- a/arch/arm/mach-s3c6400/include/mach/gpio.h
+++ b/arch/arm/mach-s3c64xx/include/mach/gpio.h
@@ -91,6 +91,10 @@ enum s3c_gpio_number {
91#define S3C_GPIO_END S3C64XX_GPIO_END 91#define S3C_GPIO_END S3C64XX_GPIO_END
92 92
93/* define the number of gpios we need to the one after the GPQ() range */ 93/* define the number of gpios we need to the one after the GPQ() range */
94#define ARCH_NR_GPIOS (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1) 94#define GPIO_BOARD_START (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
95
96#define BOARD_NR_GPIOS 16
97
98#define ARCH_NR_GPIOS (GPIO_BOARD_START + BOARD_NR_GPIOS)
95 99
96#include <asm-generic/gpio.h> 100#include <asm-generic/gpio.h>
diff --git a/arch/arm/mach-s3c6400/include/mach/hardware.h b/arch/arm/mach-s3c64xx/include/mach/hardware.h
index 862d033e57a4..862d033e57a4 100644
--- a/arch/arm/mach-s3c6400/include/mach/hardware.h
+++ b/arch/arm/mach-s3c64xx/include/mach/hardware.h
diff --git a/arch/arm/mach-s3c64xx/include/mach/io.h b/arch/arm/mach-s3c64xx/include/mach/io.h
new file mode 100644
index 000000000000..de5716dbbd65
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/io.h
@@ -0,0 +1,18 @@
1/* arch/arm/mach-s3c64xxinclude/mach/io.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben-linux@fluff.org>
5 *
6 * Default IO routines for S3C64XX based
7 */
8
9#ifndef __ASM_ARM_ARCH_IO_H
10#define __ASM_ARM_ARCH_IO_H
11
12/* No current ISA/PCI bus support. */
13#define __io(a) __typesafe_io(a)
14#define __mem_pci(a) (a)
15
16#define IO_SPACE_LIMIT (0xFFFFFFFF)
17
18#endif
diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h
index a22758194e6d..e9ab4ac0b9a8 100644
--- a/arch/arm/plat-s3c64xx/include/plat/irqs.h
+++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h
@@ -1,15 +1,15 @@
1/* linux/arch/arm/plat-s3c64xx/include/mach/irqs.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/irqs.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/ 6 * http://armlinux.simtec.co.uk/
7 * 7 *
8 * S3C64XX - Common IRQ support 8 * S3C64XX - IRQ support
9 */ 9 */
10 10
11#ifndef __ASM_PLAT_S3C64XX_IRQS_H 11#ifndef __ASM_MACH_S3C64XX_IRQS_H
12#define __ASM_PLAT_S3C64XX_IRQS_H __FILE__ 12#define __ASM_MACH_S3C64XX_IRQS_H __FILE__
13 13
14/* we keep the first set of CPU IRQs out of the range of 14/* we keep the first set of CPU IRQs out of the range of
15 * the ISA space, so that the PC104 has them to itself 15 * the ISA space, so that the PC104 has them to itself
@@ -200,6 +200,8 @@
200 200
201#ifdef CONFIG_SMDK6410_WM1190_EV1 201#ifdef CONFIG_SMDK6410_WM1190_EV1
202#define IRQ_BOARD_NR 64 202#define IRQ_BOARD_NR 64
203#elif defined(CONFIG_SMDK6410_WM1192_EV1)
204#define IRQ_BOARD_NR 64
203#else 205#else
204#define IRQ_BOARD_NR 16 206#define IRQ_BOARD_NR 16
205#endif 207#endif
@@ -210,5 +212,5 @@
210 212
211#define NR_IRQS (IRQ_BOARD_END + 1) 213#define NR_IRQS (IRQ_BOARD_END + 1)
212 214
213#endif /* __ASM_PLAT_S3C64XX_IRQS_H */ 215#endif /* __ASM_MACH_S3C64XX_IRQS_H */
214 216
diff --git a/arch/arm/mach-s3c6400/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h
index 801c1c0f3a95..801c1c0f3a95 100644
--- a/arch/arm/mach-s3c6400/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
diff --git a/arch/arm/mach-s3c6400/include/mach/memory.h b/arch/arm/mach-s3c64xx/include/mach/memory.h
index a3ac84a65480..a3ac84a65480 100644
--- a/arch/arm/mach-s3c6400/include/mach/memory.h
+++ b/arch/arm/mach-s3c64xx/include/mach/memory.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/pll.h b/arch/arm/mach-s3c64xx/include/mach/pll.h
index 90bbd72fdc4e..90bbd72fdc4e 100644
--- a/arch/arm/plat-s3c64xx/include/plat/pll.h
+++ b/arch/arm/mach-s3c64xx/include/mach/pll.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/pm-core.h b/arch/arm/mach-s3c64xx/include/mach/pm-core.h
index d347de3ba0dc..1e9f20f0bb7b 100644
--- a/arch/arm/plat-s3c64xx/include/plat/pm-core.h
+++ b/arch/arm/mach-s3c64xx/include/mach/pm-core.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/pm-core.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/pm-core.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
@@ -12,7 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14 14
15#include <plat/regs-gpio.h> 15#include <mach/regs-gpio.h>
16 16
17static inline void s3c_pm_debug_init_uart(void) 17static inline void s3c_pm_debug_init_uart(void)
18{ 18{
diff --git a/arch/arm/mach-s3c6400/include/mach/pwm-clock.h b/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
index b25bedee0d52..b25bedee0d52 100644
--- a/arch/arm/mach-s3c6400/include/mach/pwm-clock.h
+++ b/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
index 3ef62741e5d1..3ef62741e5d1 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-fb.h b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h
index f56611526c63..f56611526c63 100644
--- a/arch/arm/mach-s3c6400/include/mach/regs-fb.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-gpio-memport.h b/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h
index 82342f6fd27d..82342f6fd27d 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-gpio-memport.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-gpio.h b/arch/arm/mach-s3c64xx/include/mach/regs-gpio.h
index 81f7f6e6832e..81f7f6e6832e 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-gpio.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-gpio.h
diff --git a/arch/arm/mach-s3c6400/include/mach/regs-irq.h b/arch/arm/mach-s3c64xx/include/mach/regs-irq.h
index bcce68a0bb75..bcce68a0bb75 100644
--- a/arch/arm/mach-s3c6400/include/mach/regs-irq.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-irq.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-modem.h b/arch/arm/mach-s3c64xx/include/mach/regs-modem.h
index 49f7759dedfa..49f7759dedfa 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-modem.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-modem.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-srom.h b/arch/arm/mach-s3c64xx/include/mach/regs-srom.h
index 756731b36297..756731b36297 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-srom.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-srom.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-sys.h b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h
index 69b78d9f83b8..69b78d9f83b8 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-sys.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-sys.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-syscon-power.h b/arch/arm/mach-s3c64xx/include/mach/regs-syscon-power.h
index 270d96ac9705..270d96ac9705 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-syscon-power.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-syscon-power.h
diff --git a/arch/arm/plat-s3c64xx/include/plat/s3c6400.h b/arch/arm/mach-s3c64xx/include/mach/s3c6400.h
index 11f2e1e119b0..f86958d05352 100644
--- a/arch/arm/plat-s3c64xx/include/plat/s3c6400.h
+++ b/arch/arm/mach-s3c64xx/include/mach/s3c6400.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c64xx/include/plat/s3c6400.h 1/* arch/arm/mach-s3c64xx/include/macht/s3c6400.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
@@ -15,9 +15,10 @@
15/* Common init code for S3C6400 related SoCs */ 15/* Common init code for S3C6400 related SoCs */
16 16
17extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); 17extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
18extern void s3c6400_register_clocks(unsigned armclk_divlimit);
19extern void s3c6400_setup_clocks(void); 18extern void s3c6400_setup_clocks(void);
20 19
20extern void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit);
21
21#ifdef CONFIG_CPU_S3C6400 22#ifdef CONFIG_CPU_S3C6400
22 23
23extern int s3c6400_init(void); 24extern int s3c6400_init(void);
@@ -33,4 +34,3 @@ extern void s3c6400_init_clocks(int xtal);
33#define s3c6400_map_io NULL 34#define s3c6400_map_io NULL
34#define s3c6400_init NULL 35#define s3c6400_init NULL
35#endif 36#endif
36
diff --git a/arch/arm/plat-s3c64xx/include/plat/s3c6410.h b/arch/arm/mach-s3c64xx/include/mach/s3c6410.h
index 50dcdd6f6800..24f1141ffcb7 100644
--- a/arch/arm/plat-s3c64xx/include/plat/s3c6410.h
+++ b/arch/arm/mach-s3c64xx/include/mach/s3c6410.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c64xx/include/plat/s3c6410.h 1/* arch/arm/mach-s3c64xx/include/mach/s3c6410.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c64xx/include/plat/spi-clocks.h b/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h
index 524bdae3f625..9d0c43b4b687 100644
--- a/arch/arm/plat-s3c64xx/include/plat/spi-clocks.h
+++ b/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c64xx/include/plat/spi-clocks.h 1/* linux/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h
2 * 2 *
3 * Copyright (C) 2009 Samsung Electronics Ltd. 3 * Copyright (C) 2009 Samsung Electronics Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com> 4 * Jaswinder Singh <jassi.brar@samsung.com>
diff --git a/arch/arm/mach-s3c6400/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h
index 2e58cb7a7147..2e58cb7a7147 100644
--- a/arch/arm/mach-s3c6400/include/mach/system.h
+++ b/arch/arm/mach-s3c64xx/include/mach/system.h
diff --git a/arch/arm/mach-s3c6400/include/mach/tick.h b/arch/arm/mach-s3c64xx/include/mach/tick.h
index ebe18a9469b8..ebe18a9469b8 100644
--- a/arch/arm/mach-s3c6400/include/mach/tick.h
+++ b/arch/arm/mach-s3c64xx/include/mach/tick.h
diff --git a/arch/arm/mach-s3c64xx/include/mach/timex.h b/arch/arm/mach-s3c64xx/include/mach/timex.h
new file mode 100644
index 000000000000..fb2e8cd40829
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/timex.h
@@ -0,0 +1,24 @@
1/* arch/arm/mach-s3c64xx/include/mach/timex.h
2 *
3 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C6400 - time parameters
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_TIMEX_H
14#define __ASM_ARCH_TIMEX_H
15
16/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
17 * a variable is useless. It seems as long as we make our timers an
18 * exact multiple of HZ, any value that makes a 1->1 correspondence
19 * for the time conversion functions to/from jiffies is acceptable.
20*/
21
22#define CLOCK_TICK_RATE 12000000
23
24#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s3c6400/include/mach/uncompress.h b/arch/arm/mach-s3c64xx/include/mach/uncompress.h
index c6a82a20bf2a..c6a82a20bf2a 100644
--- a/arch/arm/mach-s3c6400/include/mach/uncompress.h
+++ b/arch/arm/mach-s3c64xx/include/mach/uncompress.h
diff --git a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h
new file mode 100644
index 000000000000..7411ef3711a6
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h
@@ -0,0 +1,20 @@
1/* arch/arm/mach-s3c64xx/include/mach/vmalloc.h
2 *
3 * from arch/arm/mach-iop3xx/include/mach/vmalloc.h
4 *
5 * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
6 * http://www.simtec.co.uk/products/SWLINUX/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * S3C6400 vmalloc definition
13*/
14
15#ifndef __ASM_ARCH_VMALLOC_H
16#define __ASM_ARCH_VMALLOC_H
17
18#define VMALLOC_END (0xE0000000)
19
20#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/irq-eint.c
index ebdf183a0911..5682d6a7f4af 100644
--- a/arch/arm/plat-s3c64xx/irq-eint.c
+++ b/arch/arm/mach-s3c64xx/irq-eint.c
@@ -22,7 +22,7 @@
22#include <asm/hardware/vic.h> 22#include <asm/hardware/vic.h>
23 23
24#include <plat/regs-irqtype.h> 24#include <plat/regs-irqtype.h>
25#include <plat/regs-gpio.h> 25#include <mach/regs-gpio.h>
26#include <plat/gpio-cfg.h> 26#include <plat/gpio-cfg.h>
27 27
28#include <mach/map.h> 28#include <mach/map.h>
diff --git a/arch/arm/plat-s3c64xx/irq-pm.c b/arch/arm/mach-s3c64xx/irq-pm.c
index ca523b5d4c17..da1bec64b9da 100644
--- a/arch/arm/plat-s3c64xx/irq-pm.c
+++ b/arch/arm/mach-s3c64xx/irq-pm.c
@@ -23,7 +23,7 @@
23 23
24#include <plat/regs-serial.h> 24#include <plat/regs-serial.h>
25#include <plat/regs-timer.h> 25#include <plat/regs-timer.h>
26#include <plat/regs-gpio.h> 26#include <mach/regs-gpio.h>
27#include <plat/cpu.h> 27#include <plat/cpu.h>
28#include <plat/pm.h> 28#include <plat/pm.h>
29 29
diff --git a/arch/arm/plat-s3c64xx/irq.c b/arch/arm/mach-s3c64xx/irq.c
index 67a145d440f3..67a145d440f3 100644
--- a/arch/arm/plat-s3c64xx/irq.c
+++ b/arch/arm/mach-s3c64xx/irq.c
diff --git a/arch/arm/mach-s3c6410/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index 661cca63de25..4a0bb243d14a 100644
--- a/arch/arm/mach-s3c6410/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/mach-s3c6410/mach-anw6410.c 1/* linux/arch/arm/mach-s3c64xx/mach-anw6410.c
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
@@ -45,12 +45,12 @@
45#include <plat/iic.h> 45#include <plat/iic.h>
46#include <plat/fb.h> 46#include <plat/fb.h>
47 47
48#include <plat/s3c6410.h> 48#include <mach/s3c6410.h>
49#include <plat/clock.h> 49#include <plat/clock.h>
50#include <plat/devs.h> 50#include <plat/devs.h>
51#include <plat/cpu.h> 51#include <plat/cpu.h>
52#include <plat/regs-gpio.h> 52#include <mach/regs-gpio.h>
53#include <plat/regs-modem.h> 53#include <mach/regs-modem.h>
54 54
55/* DM9000 */ 55/* DM9000 */
56#define ANW6410_PA_DM9000 (0x18000000) 56#define ANW6410_PA_DM9000 (0x18000000)
diff --git a/arch/arm/mach-s3c6410/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index f05d95784d72..187441a78dd5 100644
--- a/arch/arm/mach-s3c6410/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -38,7 +38,7 @@
38#include <plat/fb.h> 38#include <plat/fb.h>
39#include <plat/nand.h> 39#include <plat/nand.h>
40 40
41#include <plat/s3c6410.h> 41#include <mach/s3c6410.h>
42#include <plat/clock.h> 42#include <plat/clock.h>
43#include <plat/devs.h> 43#include <plat/devs.h>
44#include <plat/cpu.h> 44#include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c6410/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c
index 55e9bbfaf68b..bf65747ea68e 100644
--- a/arch/arm/mach-s3c6410/mach-ncp.c
+++ b/arch/arm/mach-s3c64xx/mach-ncp.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-s3c6410/mach-ncp.c 2 * linux/arch/arm/mach-s3c64xx/mach-ncp.c
3 * 3 *
4 * Copyright (C) 2008-2009 Samsung Electronics 4 * Copyright (C) 2008-2009 Samsung Electronics
5 * 5 *
@@ -40,7 +40,7 @@
40#include <plat/iic.h> 40#include <plat/iic.h>
41#include <plat/fb.h> 41#include <plat/fb.h>
42 42
43#include <plat/s3c6410.h> 43#include <mach/s3c6410.h>
44#include <plat/clock.h> 44#include <plat/clock.h>
45#include <plat/devs.h> 45#include <plat/devs.h>
46#include <plat/cpu.h> 46#include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c6400/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c
index ab19285389a7..f7b18983950c 100644
--- a/arch/arm/mach-s3c6400/mach-smdk6400.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/mach-s3c6400/mach-smdk6400.c 1/* linux/arch/arm/mach-s3c64xx/mach-smdk6400.c
2 * 2 *
3 * Copyright 2008 Simtec Electronics 3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
@@ -31,7 +31,7 @@
31 31
32#include <plat/regs-serial.h> 32#include <plat/regs-serial.h>
33 33
34#include <plat/s3c6400.h> 34#include <mach/s3c6400.h>
35#include <plat/clock.h> 35#include <plat/clock.h>
36#include <plat/devs.h> 36#include <plat/devs.h>
37#include <plat/cpu.h> 37#include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c6410/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index eba345fadffe..2d5afd221d77 100644
--- a/arch/arm/mach-s3c6410/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/mach-s3c6410/mach-smdk6410.c 1/* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
@@ -21,6 +21,7 @@
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/i2c.h> 23#include <linux/i2c.h>
24#include <linux/leds.h>
24#include <linux/fb.h> 25#include <linux/fb.h>
25#include <linux/gpio.h> 26#include <linux/gpio.h>
26#include <linux/delay.h> 27#include <linux/delay.h>
@@ -32,6 +33,11 @@
32#include <linux/mfd/wm8350/pmic.h> 33#include <linux/mfd/wm8350/pmic.h>
33#endif 34#endif
34 35
36#ifdef CONFIG_SMDK6410_WM1192_EV1
37#include <linux/mfd/wm831x/core.h>
38#include <linux/mfd/wm831x/pdata.h>
39#endif
40
35#include <video/platform_lcd.h> 41#include <video/platform_lcd.h>
36 42
37#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
@@ -46,15 +52,15 @@
46#include <asm/mach-types.h> 52#include <asm/mach-types.h>
47 53
48#include <plat/regs-serial.h> 54#include <plat/regs-serial.h>
49#include <plat/regs-modem.h> 55#include <mach/regs-modem.h>
50#include <plat/regs-gpio.h> 56#include <mach/regs-gpio.h>
51#include <plat/regs-sys.h> 57#include <mach/regs-sys.h>
52#include <plat/regs-srom.h> 58#include <mach/regs-srom.h>
53#include <plat/iic.h> 59#include <plat/iic.h>
54#include <plat/fb.h> 60#include <plat/fb.h>
55#include <plat/gpio-cfg.h> 61#include <plat/gpio-cfg.h>
56 62
57#include <plat/s3c6410.h> 63#include <mach/s3c6410.h>
58#include <plat/clock.h> 64#include <plat/clock.h>
59#include <plat/devs.h> 65#include <plat/devs.h>
60#include <plat/cpu.h> 66#include <plat/cpu.h>
@@ -248,6 +254,7 @@ static struct platform_device *smdk6410_devices[] __initdata = {
248 &s3c_device_fb, 254 &s3c_device_fb,
249 &s3c_device_ohci, 255 &s3c_device_ohci,
250 &s3c_device_usb_hsotg, 256 &s3c_device_usb_hsotg,
257 &s3c64xx_device_iisv4,
251 258
252#ifdef CONFIG_REGULATOR 259#ifdef CONFIG_REGULATOR
253 &smdk6410_b_pwr_5v, 260 &smdk6410_b_pwr_5v,
@@ -257,77 +264,124 @@ static struct platform_device *smdk6410_devices[] __initdata = {
257 &smdk6410_smsc911x, 264 &smdk6410_smsc911x,
258}; 265};
259 266
260#ifdef CONFIG_SMDK6410_WM1190_EV1 267#ifdef CONFIG_REGULATOR
261/* S3C64xx internal logic & PLL */ 268/* ARM core */
262static struct regulator_init_data wm8350_dcdc1_data = { 269static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
270 {
271 .supply = "vddarm",
272 }
273};
274
275/* VDDARM, BUCK1 on J5 */
276static struct regulator_init_data smdk6410_vddarm = {
263 .constraints = { 277 .constraints = {
264 .name = "PVDD_INT/PVDD_PLL", 278 .name = "PVDD_ARM",
265 .min_uV = 1200000, 279 .min_uV = 1000000,
280 .max_uV = 1300000,
281 .always_on = 1,
282 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
283 },
284 .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
285 .consumer_supplies = smdk6410_vddarm_consumers,
286};
287
288/* VDD_INT, BUCK2 on J5 */
289static struct regulator_init_data smdk6410_vddint = {
290 .constraints = {
291 .name = "PVDD_INT",
292 .min_uV = 1000000,
266 .max_uV = 1200000, 293 .max_uV = 1200000,
267 .always_on = 1, 294 .always_on = 1,
268 .apply_uV = 1, 295 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
269 }, 296 },
270}; 297};
271 298
272/* Memory */ 299/* VDD_HI, LDO3 on J5 */
273static struct regulator_init_data wm8350_dcdc3_data = { 300static struct regulator_init_data smdk6410_vddhi = {
274 .constraints = { 301 .constraints = {
275 .name = "PVDD_MEM", 302 .name = "PVDD_HI",
276 .min_uV = 1800000,
277 .max_uV = 1800000,
278 .always_on = 1, 303 .always_on = 1,
279 .state_mem = {
280 .uV = 1800000,
281 .mode = REGULATOR_MODE_NORMAL,
282 .enabled = 1,
283 },
284 .initial_state = PM_SUSPEND_MEM,
285 }, 304 },
286}; 305};
287 306
288/* USB, EXT, PCM, ADC/DAC, USB, MMC */ 307/* VDD_PLL, LDO2 on J5 */
289static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = { 308static struct regulator_init_data smdk6410_vddpll = {
290 { 309 .constraints = {
291 /* WM8580 */ 310 .name = "PVDD_PLL",
292 .supply = "DVDD", 311 .always_on = 1,
293 .dev_name = "0-001b",
294 }, 312 },
295}; 313};
296 314
297static struct regulator_init_data wm8350_dcdc4_data = { 315/* VDD_UH_MMC, LDO5 on J5 */
316static struct regulator_init_data smdk6410_vdduh_mmc = {
298 .constraints = { 317 .constraints = {
299 .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV", 318 .name = "PVDD_UH/PVDD_MMC",
300 .min_uV = 3000000,
301 .max_uV = 3000000,
302 .always_on = 1, 319 .always_on = 1,
303 }, 320 },
304 .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
305 .consumer_supplies = wm8350_dcdc4_consumers,
306}; 321};
307 322
308/* ARM core */ 323/* VCCM3BT, LDO8 on J5 */
309static struct regulator_consumer_supply dcdc6_consumers[] = { 324static struct regulator_init_data smdk6410_vccmc3bt = {
310 { 325 .constraints = {
311 .supply = "vddarm", 326 .name = "PVCCM3BT",
312 } 327 .always_on = 1,
328 },
313}; 329};
314 330
315static struct regulator_init_data wm8350_dcdc6_data = { 331/* VCCM2MTV, LDO11 on J5 */
332static struct regulator_init_data smdk6410_vccm2mtv = {
316 .constraints = { 333 .constraints = {
317 .name = "PVDD_ARM", 334 .name = "PVCCM2MTV",
318 .min_uV = 1000000, 335 .always_on = 1,
319 .max_uV = 1300000, 336 },
337};
338
339/* VDD_LCD, LDO12 on J5 */
340static struct regulator_init_data smdk6410_vddlcd = {
341 .constraints = {
342 .name = "PVDD_LCD",
320 .always_on = 1, 343 .always_on = 1,
321 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
322 }, 344 },
323 .num_consumer_supplies = ARRAY_SIZE(dcdc6_consumers),
324 .consumer_supplies = dcdc6_consumers,
325}; 345};
326 346
327/* Alive */ 347/* VDD_OTGI, LDO9 on J5 */
328static struct regulator_init_data wm8350_ldo1_data = { 348static struct regulator_init_data smdk6410_vddotgi = {
349 .constraints = {
350 .name = "PVDD_OTGI",
351 .always_on = 1,
352 },
353};
354
355/* VDD_OTG, LDO14 on J5 */
356static struct regulator_init_data smdk6410_vddotg = {
357 .constraints = {
358 .name = "PVDD_OTG",
359 .always_on = 1,
360 },
361};
362
363/* VDD_ALIVE, LDO15 on J5 */
364static struct regulator_init_data smdk6410_vddalive = {
329 .constraints = { 365 .constraints = {
330 .name = "PVDD_ALIVE", 366 .name = "PVDD_ALIVE",
367 .always_on = 1,
368 },
369};
370
371/* VDD_AUDIO, VLDO_AUDIO on J5 */
372static struct regulator_init_data smdk6410_vddaudio = {
373 .constraints = {
374 .name = "PVDD_AUDIO",
375 .always_on = 1,
376 },
377};
378#endif
379
380#ifdef CONFIG_SMDK6410_WM1190_EV1
381/* S3C64xx internal logic & PLL */
382static struct regulator_init_data wm8350_dcdc1_data = {
383 .constraints = {
384 .name = "PVDD_INT/PVDD_PLL",
331 .min_uV = 1200000, 385 .min_uV = 1200000,
332 .max_uV = 1200000, 386 .max_uV = 1200000,
333 .always_on = 1, 387 .always_on = 1,
@@ -335,24 +389,40 @@ static struct regulator_init_data wm8350_ldo1_data = {
335 }, 389 },
336}; 390};
337 391
338/* OTG */ 392/* Memory */
339static struct regulator_init_data wm8350_ldo2_data = { 393static struct regulator_init_data wm8350_dcdc3_data = {
340 .constraints = { 394 .constraints = {
341 .name = "PVDD_OTG", 395 .name = "PVDD_MEM",
342 .min_uV = 3300000, 396 .min_uV = 1800000,
343 .max_uV = 3300000, 397 .max_uV = 1800000,
344 .always_on = 1, 398 .always_on = 1,
399 .state_mem = {
400 .uV = 1800000,
401 .mode = REGULATOR_MODE_NORMAL,
402 .enabled = 1,
403 },
404 .initial_state = PM_SUSPEND_MEM,
405 },
406};
407
408/* USB, EXT, PCM, ADC/DAC, USB, MMC */
409static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
410 {
411 /* WM8580 */
412 .supply = "DVDD",
413 .dev_name = "0-001b",
345 }, 414 },
346}; 415};
347 416
348/* LCD */ 417static struct regulator_init_data wm8350_dcdc4_data = {
349static struct regulator_init_data wm8350_ldo3_data = {
350 .constraints = { 418 .constraints = {
351 .name = "PVDD_LCD", 419 .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
352 .min_uV = 3000000, 420 .min_uV = 3000000,
353 .max_uV = 3000000, 421 .max_uV = 3000000,
354 .always_on = 1, 422 .always_on = 1,
355 }, 423 },
424 .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
425 .consumer_supplies = wm8350_dcdc4_consumers,
356}; 426};
357 427
358/* OTGi/1190-EV1 HPVDD & AVDD */ 428/* OTGi/1190-EV1 HPVDD & AVDD */
@@ -373,10 +443,10 @@ static struct {
373 { WM8350_DCDC_1, &wm8350_dcdc1_data }, 443 { WM8350_DCDC_1, &wm8350_dcdc1_data },
374 { WM8350_DCDC_3, &wm8350_dcdc3_data }, 444 { WM8350_DCDC_3, &wm8350_dcdc3_data },
375 { WM8350_DCDC_4, &wm8350_dcdc4_data }, 445 { WM8350_DCDC_4, &wm8350_dcdc4_data },
376 { WM8350_DCDC_6, &wm8350_dcdc6_data }, 446 { WM8350_DCDC_6, &smdk6410_vddarm },
377 { WM8350_LDO_1, &wm8350_ldo1_data }, 447 { WM8350_LDO_1, &smdk6410_vddalive },
378 { WM8350_LDO_2, &wm8350_ldo2_data }, 448 { WM8350_LDO_2, &smdk6410_vddotg },
379 { WM8350_LDO_3, &wm8350_ldo3_data }, 449 { WM8350_LDO_3, &smdk6410_vddlcd },
380 { WM8350_LDO_4, &wm8350_ldo4_data }, 450 { WM8350_LDO_4, &wm8350_ldo4_data },
381}; 451};
382 452
@@ -403,10 +473,117 @@ static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
403}; 473};
404#endif 474#endif
405 475
476#ifdef CONFIG_SMDK6410_WM1192_EV1
477static struct gpio_led wm1192_pmic_leds[] = {
478 {
479 .name = "PMIC:red:power",
480 .gpio = GPIO_BOARD_START + 3,
481 .default_state = LEDS_GPIO_DEFSTATE_ON,
482 },
483};
484
485static struct gpio_led_platform_data wm1192_pmic_led = {
486 .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
487 .leds = wm1192_pmic_leds,
488};
489
490static struct platform_device wm1192_pmic_led_dev = {
491 .name = "leds-gpio",
492 .id = -1,
493 .dev = {
494 .platform_data = &wm1192_pmic_led,
495 },
496};
497
498static int wm1192_pre_init(struct wm831x *wm831x)
499{
500 int ret;
501
502 /* Configure the IRQ line */
503 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
504
505 ret = platform_device_register(&wm1192_pmic_led_dev);
506 if (ret != 0)
507 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
508
509 return 0;
510}
511
512static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
513 .isink = 1,
514 .max_uA = 27554,
515};
516
517static struct regulator_init_data wm1192_dcdc3 = {
518 .constraints = {
519 .name = "PVDD_MEM/PVDD_GPS",
520 .always_on = 1,
521 },
522};
523
524static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
525 { .supply = "DVDD", .dev_name = "0-001b", }, /* WM8580 */
526};
527
528static struct regulator_init_data wm1192_ldo1 = {
529 .constraints = {
530 .name = "PVDD_LCD/PVDD_EXT",
531 .always_on = 1,
532 },
533 .consumer_supplies = wm1192_ldo1_consumers,
534 .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
535};
536
537static struct wm831x_status_pdata wm1192_led7_pdata = {
538 .name = "LED7:green:",
539};
540
541static struct wm831x_status_pdata wm1192_led8_pdata = {
542 .name = "LED8:green:",
543};
544
545static struct wm831x_pdata smdk6410_wm1192_pdata = {
546 .pre_init = wm1192_pre_init,
547 .irq_base = IRQ_BOARD_START,
548
549 .backlight = &wm1192_backlight_pdata,
550 .dcdc = {
551 &smdk6410_vddarm, /* DCDC1 */
552 &smdk6410_vddint, /* DCDC2 */
553 &wm1192_dcdc3,
554 },
555 .gpio_base = GPIO_BOARD_START,
556 .ldo = {
557 &wm1192_ldo1, /* LDO1 */
558 &smdk6410_vdduh_mmc, /* LDO2 */
559 NULL, /* LDO3 NC */
560 &smdk6410_vddotgi, /* LDO4 */
561 &smdk6410_vddotg, /* LDO5 */
562 &smdk6410_vddhi, /* LDO6 */
563 &smdk6410_vddaudio, /* LDO7 */
564 &smdk6410_vccm2mtv, /* LDO8 */
565 &smdk6410_vddpll, /* LDO9 */
566 &smdk6410_vccmc3bt, /* LDO10 */
567 &smdk6410_vddalive, /* LDO11 */
568 },
569 .status = {
570 &wm1192_led7_pdata,
571 &wm1192_led8_pdata,
572 },
573};
574#endif
575
406static struct i2c_board_info i2c_devs0[] __initdata = { 576static struct i2c_board_info i2c_devs0[] __initdata = {
407 { I2C_BOARD_INFO("24c08", 0x50), }, 577 { I2C_BOARD_INFO("24c08", 0x50), },
408 { I2C_BOARD_INFO("wm8580", 0x1b), }, 578 { I2C_BOARD_INFO("wm8580", 0x1b), },
409 579
580#ifdef CONFIG_SMDK6410_WM1192_EV1
581 { I2C_BOARD_INFO("wm8312", 0x34),
582 .platform_data = &smdk6410_wm1192_pdata,
583 .irq = S3C_EINT(12),
584 },
585#endif
586
410#ifdef CONFIG_SMDK6410_WM1190_EV1 587#ifdef CONFIG_SMDK6410_WM1190_EV1
411 { I2C_BOARD_INFO("wm8350", 0x1a), 588 { I2C_BOARD_INFO("wm8350", 0x1a),
412 .platform_data = &smdk6410_wm8350_pdata, 589 .platform_data = &smdk6410_wm8350_pdata,
diff --git a/arch/arm/plat-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index 47632fc7eb66..b8ac4597fad7 100644
--- a/arch/arm/plat-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -20,14 +20,14 @@
20#include <mach/map.h> 20#include <mach/map.h>
21 21
22#include <plat/pm.h> 22#include <plat/pm.h>
23#include <plat/regs-sys.h> 23#include <mach/regs-sys.h>
24#include <plat/regs-gpio.h> 24#include <mach/regs-gpio.h>
25#include <plat/regs-clock.h> 25#include <mach/regs-clock.h>
26#include <plat/regs-syscon-power.h> 26#include <mach/regs-syscon-power.h>
27#include <plat/regs-gpio-memport.h> 27#include <mach/regs-gpio-memport.h>
28 28
29#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK 29#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
30#include <plat/gpio-bank-n.h> 30#include <mach/gpio-bank-n.h>
31 31
32void s3c_pm_debug_smdkled(u32 set, u32 clear) 32void s3c_pm_debug_smdkled(u32 set, u32 clear)
33{ 33{
diff --git a/arch/arm/mach-s3c6400/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c
index d876ee503671..707e34e3afd1 100644
--- a/arch/arm/mach-s3c6400/s3c6400.c
+++ b/arch/arm/mach-s3c64xx/s3c6400.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/mach-s3c6410/cpu.c 1/* linux/arch/arm/mach-s3c64xx/cpu.c
2 * 2 *
3 * Copyright 2009 Simtec Electronics 3 * Copyright 2009 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
@@ -30,14 +30,14 @@
30 30
31#include <plat/cpu-freq.h> 31#include <plat/cpu-freq.h>
32#include <plat/regs-serial.h> 32#include <plat/regs-serial.h>
33#include <plat/regs-clock.h> 33#include <mach/regs-clock.h>
34 34
35#include <plat/cpu.h> 35#include <plat/cpu.h>
36#include <plat/devs.h> 36#include <plat/devs.h>
37#include <plat/clock.h> 37#include <plat/clock.h>
38#include <plat/sdhci.h> 38#include <plat/sdhci.h>
39#include <plat/iic-core.h> 39#include <plat/iic-core.h>
40#include <plat/s3c6400.h> 40#include <mach/s3c6400.h>
41 41
42void __init s3c6400_map_io(void) 42void __init s3c6400_map_io(void)
43{ 43{
@@ -55,10 +55,7 @@ void __init s3c6400_map_io(void)
55 55
56void __init s3c6400_init_clocks(int xtal) 56void __init s3c6400_init_clocks(int xtal)
57{ 57{
58 printk(KERN_DEBUG "%s: initialising clocks\n", __func__); 58 s3c64xx_register_clocks(xtal, S3C6400_CLKDIV0_ARM_MASK);
59 s3c24xx_register_baseclocks(xtal);
60 s3c64xx_register_clocks();
61 s3c6400_register_clocks(S3C6400_CLKDIV0_ARM_MASK);
62 s3c6400_setup_clocks(); 59 s3c6400_setup_clocks();
63} 60}
64 61
diff --git a/arch/arm/mach-s3c6410/cpu.c b/arch/arm/mach-s3c64xx/s3c6410.c
index 522c08691952..59635d19466a 100644
--- a/arch/arm/mach-s3c6410/cpu.c
+++ b/arch/arm/mach-s3c64xx/s3c6410.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/mach-s3c6410/cpu.c 1/* linux/arch/arm/mach-s3c64xx/s3c6410.c
2 * 2 *
3 * Copyright 2008 Simtec Electronics 3 * Copyright 2008 Simtec Electronics
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
@@ -31,30 +31,18 @@
31 31
32#include <plat/cpu-freq.h> 32#include <plat/cpu-freq.h>
33#include <plat/regs-serial.h> 33#include <plat/regs-serial.h>
34#include <plat/regs-clock.h> 34#include <mach/regs-clock.h>
35 35
36#include <plat/cpu.h> 36#include <plat/cpu.h>
37#include <plat/devs.h> 37#include <plat/devs.h>
38#include <plat/clock.h> 38#include <plat/clock.h>
39#include <plat/sdhci.h> 39#include <plat/sdhci.h>
40#include <plat/iic-core.h> 40#include <plat/iic-core.h>
41#include <plat/s3c6400.h> 41#include <mach/s3c6400.h>
42#include <plat/s3c6410.h> 42#include <mach/s3c6410.h>
43
44/* Initial IO mappings */
45
46static struct map_desc s3c6410_iodesc[] __initdata = {
47};
48
49/* s3c6410_map_io
50 *
51 * register the standard cpu IO areas
52*/
53 43
54void __init s3c6410_map_io(void) 44void __init s3c6410_map_io(void)
55{ 45{
56 iotable_init(s3c6410_iodesc, ARRAY_SIZE(s3c6410_iodesc));
57
58 /* initialise device information early */ 46 /* initialise device information early */
59 s3c6410_default_sdhci0(); 47 s3c6410_default_sdhci0();
60 s3c6410_default_sdhci1(); 48 s3c6410_default_sdhci1();
@@ -70,9 +58,7 @@ void __init s3c6410_map_io(void)
70void __init s3c6410_init_clocks(int xtal) 58void __init s3c6410_init_clocks(int xtal)
71{ 59{
72 printk(KERN_DEBUG "%s: initialising clocks\n", __func__); 60 printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
73 s3c24xx_register_baseclocks(xtal); 61 s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK);
74 s3c64xx_register_clocks();
75 s3c6400_register_clocks(S3C6410_CLKDIV0_ARM_MASK);
76 s3c6400_setup_clocks(); 62 s3c6400_setup_clocks();
77} 63}
78 64
diff --git a/arch/arm/plat-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
index 8e28e448dd20..8e28e448dd20 100644
--- a/arch/arm/plat-s3c64xx/setup-fb-24bpp.c
+++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
diff --git a/arch/arm/plat-s3c64xx/setup-i2c0.c b/arch/arm/mach-s3c64xx/setup-i2c0.c
index 364480763728..d1b11e6e77e8 100644
--- a/arch/arm/plat-s3c64xx/setup-i2c0.c
+++ b/arch/arm/mach-s3c64xx/setup-i2c0.c
@@ -18,8 +18,8 @@
18struct platform_device; /* don't need the contents */ 18struct platform_device; /* don't need the contents */
19 19
20#include <mach/gpio.h> 20#include <mach/gpio.h>
21#include <mach/gpio-bank-b.h>
21#include <plat/iic.h> 22#include <plat/iic.h>
22#include <plat/gpio-bank-b.h>
23#include <plat/gpio-cfg.h> 23#include <plat/gpio-cfg.h>
24 24
25void s3c_i2c0_cfg_gpio(struct platform_device *dev) 25void s3c_i2c0_cfg_gpio(struct platform_device *dev)
diff --git a/arch/arm/plat-s3c64xx/setup-i2c1.c b/arch/arm/mach-s3c64xx/setup-i2c1.c
index bbe229bd90ca..2dce57d8c6f8 100644
--- a/arch/arm/plat-s3c64xx/setup-i2c1.c
+++ b/arch/arm/mach-s3c64xx/setup-i2c1.c
@@ -18,8 +18,8 @@
18struct platform_device; /* don't need the contents */ 18struct platform_device; /* don't need the contents */
19 19
20#include <mach/gpio.h> 20#include <mach/gpio.h>
21#include <mach/gpio-bank-b.h>
21#include <plat/iic.h> 22#include <plat/iic.h>
22#include <plat/gpio-bank-b.h>
23#include <plat/gpio-cfg.h> 23#include <plat/gpio-cfg.h>
24 24
25void s3c_i2c1_cfg_gpio(struct platform_device *dev) 25void s3c_i2c1_cfg_gpio(struct platform_device *dev)
diff --git a/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c
index a58c0cc7ba5e..a58c0cc7ba5e 100644
--- a/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c
+++ b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c
diff --git a/arch/arm/mach-s3c6400/setup-sdhci.c b/arch/arm/mach-s3c64xx/setup-sdhci.c
index 1039937403be..1a942037c4ef 100644
--- a/arch/arm/mach-s3c6400/setup-sdhci.c
+++ b/arch/arm/mach-s3c64xx/setup-sdhci.c
@@ -1,11 +1,11 @@
1/* linux/arch/arm/mach-s3c6410/setup-sdhci.c 1/* linux/arch/arm/mach-s3c64xx/setup-sdhci.c
2 * 2 *
3 * Copyright 2008 Simtec Electronics 3 * Copyright 2008 Simtec Electronics
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/ 6 * http://armlinux.simtec.co.uk/
7 * 7 *
8 * S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC) 8 * S3C6400/S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
@@ -26,7 +26,7 @@
26 26
27/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ 27/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
28 28
29char *s3c6400_hsmmc_clksrcs[4] = { 29char *s3c64xx_hsmmc_clksrcs[4] = {
30 [0] = "hsmmc", 30 [0] = "hsmmc",
31 [1] = "hsmmc", 31 [1] = "hsmmc",
32 [2] = "mmc_bus", 32 [2] = "mmc_bus",
@@ -61,3 +61,12 @@ void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
61 writel(ctrl3, r + S3C_SDHCI_CONTROL3); 61 writel(ctrl3, r + S3C_SDHCI_CONTROL3);
62} 62}
63 63
64void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
65 void __iomem *r,
66 struct mmc_ios *ios,
67 struct mmc_card *card)
68{
69 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
70
71 s3c6400_setup_sdhci_cfg_card(dev, r, ios, card);
72}
diff --git a/arch/arm/plat-s3c64xx/sleep.S b/arch/arm/mach-s3c64xx/sleep.S
index 8e71fe90a373..b2ef44317368 100644
--- a/arch/arm/plat-s3c64xx/sleep.S
+++ b/arch/arm/mach-s3c64xx/sleep.S
@@ -1,4 +1,4 @@
1/* linux/0arch/arm/plat-s3c64xx/sleep.S 1/* linux/arch/arm/plat-s3c64xx/sleep.S
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
@@ -19,8 +19,8 @@
19#undef S3C64XX_VA_GPIO 19#undef S3C64XX_VA_GPIO
20#define S3C64XX_VA_GPIO (0x0) 20#define S3C64XX_VA_GPIO (0x0)
21 21
22#include <plat/regs-gpio.h> 22#include <mach/regs-gpio.h>
23#include <plat/gpio-bank-n.h> 23#include <mach/gpio-bank-n.h>
24 24
25#define LL_UART (S3C_PA_UART + (0x400 * CONFIG_S3C_LOWLEVEL_UART_PORT)) 25#define LL_UART (S3C_PA_UART + (0x400 * CONFIG_S3C_LOWLEVEL_UART_PORT))
26 26
diff --git a/arch/arm/mach-s5p6440/Kconfig b/arch/arm/mach-s5p6440/Kconfig
index 3aa246244dcf..4c29ff8b07de 100644
--- a/arch/arm/mach-s5p6440/Kconfig
+++ b/arch/arm/mach-s5p6440/Kconfig
@@ -9,8 +9,6 @@ if ARCH_S5P6440
9 9
10config CPU_S5P6440 10config CPU_S5P6440
11 bool 11 bool
12 select CPU_S5P6440_INIT
13 select CPU_S5P6440_CLOCK
14 help 12 help
15 Enable S5P6440 CPU support 13 Enable S5P6440 CPU support
16 14
diff --git a/arch/arm/mach-s5p6440/Makefile b/arch/arm/mach-s5p6440/Makefile
index a79b13011edc..1ad894b1d3ab 100644
--- a/arch/arm/mach-s5p6440/Makefile
+++ b/arch/arm/mach-s5p6440/Makefile
@@ -12,7 +12,7 @@ obj- :=
12 12
13# Core support for S5P6440 system 13# Core support for S5P6440 system
14 14
15obj-$(CONFIG_CPU_S5P6440) += cpu.o s5p6440-gpio.o 15obj-$(CONFIG_CPU_S5P6440) += cpu.o init.o clock.o gpio.o
16 16
17# machine support 17# machine support
18 18
diff --git a/arch/arm/plat-s5p/s5p6440-clock.c b/arch/arm/mach-s5p6440/clock.c
index 2f412f8c1212..b2672e16e7aa 100644
--- a/arch/arm/plat-s5p/s5p6440-clock.c
+++ b/arch/arm/mach-s5p6440/clock.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s5p/s5p6440-clock.c 1/* linux/arch/arm/mach-s5p6440/clock.c
2 * 2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd. 3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/ 4 * http://www.samsung.com/
diff --git a/arch/arm/mach-s5p6440/s5p6440-gpio.c b/arch/arm/mach-s5p6440/gpio.c
index 742264c29f2a..b0ea741177ad 100644
--- a/arch/arm/mach-s5p6440/s5p6440-gpio.c
+++ b/arch/arm/mach-s5p6440/gpio.c
@@ -1,4 +1,4 @@
1/* arch/arm/mach-s5p6440/s5p6440-gpio.c 1/* arch/arm/mach-s5p6440/gpio.c
2 * 2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd. 3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/ 4 * http://www.samsung.com/
diff --git a/arch/arm/mach-s5p6440/include/mach/debug-macro.S b/arch/arm/mach-s5p6440/include/mach/debug-macro.S
index f3a5d1635be5..48cdb0da026c 100644
--- a/arch/arm/mach-s5p6440/include/mach/debug-macro.S
+++ b/arch/arm/mach-s5p6440/include/mach/debug-macro.S
@@ -22,8 +22,8 @@
22 .macro addruart, rx 22 .macro addruart, rx
23 mrc p15, 0, \rx, c1, c0 23 mrc p15, 0, \rx, c1, c0
24 tst \rx, #1 24 tst \rx, #1
25 ldreq \rx, = S5P_PA_UART 25 ldreq \rx, = S3C_PA_UART
26 ldrne \rx, = (S5P_VA_UART + S5P_PA_UART & 0xfffff) 26 ldrne \rx, = S3C_VA_UART
27#if CONFIG_DEBUG_S3C_UART != 0 27#if CONFIG_DEBUG_S3C_UART != 0
28 add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) 28 add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
29#endif 29#endif
diff --git a/arch/arm/mach-s5p6440/include/mach/io.h b/arch/arm/mach-s5p6440/include/mach/io.h
new file mode 100644
index 000000000000..fa2d69cb1ad7
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/io.h
@@ -0,0 +1,18 @@
1/* arch/arm/mach-s5p6440/include/mach/io.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben-linux@fluff.org>
5 *
6 * Default IO routines for S3C64XX based
7 */
8
9#ifndef __ASM_ARM_ARCH_IO_H
10#define __ASM_ARM_ARCH_IO_H
11
12/* No current ISA/PCI bus support. */
13#define __io(a) __typesafe_io(a)
14#define __mem_pci(a) (a)
15
16#define IO_SPACE_LIMIT (0xFFFFFFFF)
17
18#endif
diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h
index 4a73e73c9428..8924e5a4d6a6 100644
--- a/arch/arm/mach-s5p6440/include/mach/map.h
+++ b/arch/arm/mach-s5p6440/include/mach/map.h
@@ -14,94 +14,55 @@
14#define __ASM_ARCH_MAP_H __FILE__ 14#define __ASM_ARCH_MAP_H __FILE__
15 15
16#include <plat/map-base.h> 16#include <plat/map-base.h>
17#include <plat/map-s5p.h>
17 18
18/* Chip ID */
19#define S5P6440_PA_CHIPID (0xE0000000) 19#define S5P6440_PA_CHIPID (0xE0000000)
20#define S5P_PA_CHIPID S5P6440_PA_CHIPID 20#define S5P_PA_CHIPID S5P6440_PA_CHIPID
21#define S5P_VA_CHIPID S3C_ADDR(0x00700000)
22 21
23/* SYSCON */
24#define S5P6440_PA_SYSCON (0xE0100000) 22#define S5P6440_PA_SYSCON (0xE0100000)
25#define S5P_PA_SYSCON S5P6440_PA_SYSCON
26#define S5P_VA_SYSCON S3C_VA_SYS
27
28#define S5P6440_PA_CLK (S5P6440_PA_SYSCON + 0x0) 23#define S5P6440_PA_CLK (S5P6440_PA_SYSCON + 0x0)
29#define S5P_PA_CLK S5P6440_PA_CLK 24#define S5P_PA_SYSCON S5P6440_PA_SYSCON
30#define S5P_VA_CLK (S5P_VA_SYSCON + 0x0)
31 25
32/* GPIO */
33#define S5P6440_PA_GPIO (0xE0308000) 26#define S5P6440_PA_GPIO (0xE0308000)
34#define S5P_PA_GPIO S5P6440_PA_GPIO 27#define S5P_PA_GPIO S5P6440_PA_GPIO
35#define S5P_VA_GPIO S3C_ADDR(0x00500000)
36 28
37/* VIC0 */
38#define S5P6440_PA_VIC0 (0xE4000000) 29#define S5P6440_PA_VIC0 (0xE4000000)
39#define S5P_PA_VIC0 S5P6440_PA_VIC0 30#define S5P_PA_VIC0 S5P6440_PA_VIC0
40#define S5P_VA_VIC0 (S3C_VA_IRQ + 0x0)
41#define VA_VIC0 S5P_VA_VIC0
42 31
43/* VIC1 */
44#define S5P6440_PA_VIC1 (0xE4100000) 32#define S5P6440_PA_VIC1 (0xE4100000)
45#define S5P_PA_VIC1 S5P6440_PA_VIC1 33#define S5P_PA_VIC1 S5P6440_PA_VIC1
46#define S5P_VA_VIC1 (S3C_VA_IRQ + 0x10000)
47#define VA_VIC1 S5P_VA_VIC1
48 34
49/* Timer */
50#define S5P6440_PA_TIMER (0xEA000000) 35#define S5P6440_PA_TIMER (0xEA000000)
51#define S5P_PA_TIMER S5P6440_PA_TIMER 36#define S5P_PA_TIMER S5P6440_PA_TIMER
52#define S5P_VA_TIMER S3C_VA_TIMER
53 37
54/* RTC */
55#define S5P6440_PA_RTC (0xEA100000) 38#define S5P6440_PA_RTC (0xEA100000)
56#define S5P_PA_RTC S5P6440_PA_RTC 39#define S5P_PA_RTC S5P6440_PA_RTC
57#define S5P_VA_RTC S3C_ADDR(0x00600000)
58 40
59/* WDT */
60#define S5P6440_PA_WDT (0xEA200000) 41#define S5P6440_PA_WDT (0xEA200000)
61#define S5P_PA_WDT S5P6440_PA_WDT 42#define S5P_PA_WDT S5P6440_PA_WDT
62#define S5p_VA_WDT S3C_VA_WATCHDOG
63 43
64/* UART */
65#define S5P6440_PA_UART (0xEC000000) 44#define S5P6440_PA_UART (0xEC000000)
66#define S5P_PA_UART S5P6440_PA_UART
67#define S5P_VA_UART S3C_VA_UART
68 45
69/* HS USB OtG */ 46#define S5P_PA_UART0 (S5P6440_PA_UART + 0x0)
47#define S5P_PA_UART1 (S5P6440_PA_UART + 0x400)
48#define S5P_PA_UART2 (S5P6440_PA_UART + 0x800)
49#define S5P_PA_UART3 (S5P6440_PA_UART + 0xC00)
50
51#define S5P_SZ_UART SZ_256
52
53#define S5P6440_PA_IIC0 (0xEC104000)
54
70#define S5P6440_PA_HSOTG (0xED100000) 55#define S5P6440_PA_HSOTG (0xED100000)
71 56
72/* HSMMC */
73#define S5P6440_PA_HSMMC0 (0xED800000) 57#define S5P6440_PA_HSMMC0 (0xED800000)
74#define S5P6440_PA_HSMMC1 (0xED900000) 58#define S5P6440_PA_HSMMC1 (0xED900000)
75#define S5P6440_PA_HSMMC2 (0xEDA00000) 59#define S5P6440_PA_HSMMC2 (0xEDA00000)
76 60
77#define S5P_PA_UART0 (S5P_PA_UART + 0x0)
78#define S5P_PA_UART1 (S5P_PA_UART + 0x400)
79#define S5P_PA_UART2 (S5P_PA_UART + 0x800)
80#define S5P_PA_UART3 (S5P_PA_UART + 0xC00)
81#define S5P_UART_OFFSET (0x400)
82
83#define S5P_VA_UARTx(x) (S5P_VA_UART + (S5P_PA_UART & 0xfffff) \
84 + ((x) * S5P_UART_OFFSET))
85
86#define S5P_VA_UART0 S5P_VA_UARTx(0)
87#define S5P_VA_UART1 S5P_VA_UARTx(1)
88#define S5P_VA_UART2 S5P_VA_UARTx(2)
89#define S5P_VA_UART3 S5P_VA_UARTx(3)
90#define S5P_SZ_UART SZ_256
91
92/* I2C */
93#define S5P6440_PA_IIC0 (0xEC104000)
94#define S5P_PA_IIC0 S5P6440_PA_IIC0
95#define S5p_VA_IIC0 S3C_ADDR(0x00700000)
96
97/* SDRAM */
98#define S5P6440_PA_SDRAM (0x20000000) 61#define S5P6440_PA_SDRAM (0x20000000)
99#define S5P_PA_SDRAM S5P6440_PA_SDRAM 62#define S5P_PA_SDRAM S5P6440_PA_SDRAM
100 63
101/* compatibiltiy defines. */ 64/* compatibiltiy defines. */
102#define S3C_PA_UART S5P_PA_UART 65#define S3C_PA_UART S5P6440_PA_UART
103#define S3C_UART_OFFSET S5P_UART_OFFSET 66#define S3C_PA_IIC S5P6440_PA_IIC0
104#define S3C_PA_TIMER S5P_PA_TIMER
105#define S3C_PA_IIC S5P_PA_IIC0
106 67
107#endif /* __ASM_ARCH_MAP_H */ 68#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-clock.h b/arch/arm/mach-s5p6440/include/mach/regs-clock.h
index b7af28342bc4..c783ecc9f193 100644
--- a/arch/arm/mach-s5p6440/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5p6440/include/mach/regs-clock.h
@@ -15,7 +15,7 @@
15 15
16#include <mach/map.h> 16#include <mach/map.h>
17 17
18#define S5P_CLKREG(x) (S5P_VA_CLK + (x)) 18#define S5P_CLKREG(x) (S3C_VA_SYS + (x))
19 19
20#define S5P_APLL_LOCK S5P_CLKREG(0x00) 20#define S5P_APLL_LOCK S5P_CLKREG(0x00)
21#define S5P_MPLL_LOCK S5P_CLKREG(0x04) 21#define S5P_MPLL_LOCK S5P_CLKREG(0x04)
diff --git a/arch/arm/mach-s5p6440/include/mach/tick.h b/arch/arm/mach-s5p6440/include/mach/tick.h
index 0815aeb4f2cf..2f25c7f07970 100644
--- a/arch/arm/mach-s5p6440/include/mach/tick.h
+++ b/arch/arm/mach-s5p6440/include/mach/tick.h
@@ -15,7 +15,7 @@
15 15
16static inline u32 s3c24xx_ostimer_pending(void) 16static inline u32 s3c24xx_ostimer_pending(void)
17{ 17{
18 u32 pend = __raw_readl(S5P_VA_VIC0 + VIC_RAW_STATUS); 18 u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
19 return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0))); 19 return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
20} 20}
21 21
diff --git a/arch/arm/mach-s5p6440/include/mach/timex.h b/arch/arm/mach-s5p6440/include/mach/timex.h
new file mode 100644
index 000000000000..fb2e8cd40829
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/timex.h
@@ -0,0 +1,24 @@
1/* arch/arm/mach-s3c64xx/include/mach/timex.h
2 *
3 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C6400 - time parameters
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_TIMEX_H
14#define __ASM_ARCH_TIMEX_H
15
16/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
17 * a variable is useless. It seems as long as we make our timers an
18 * exact multiple of HZ, any value that makes a 1->1 correspondence
19 * for the time conversion functions to/from jiffies is acceptable.
20*/
21
22#define CLOCK_TICK_RATE 12000000
23
24#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/vmalloc.h b/arch/arm/mach-s5p6440/include/mach/vmalloc.h
new file mode 100644
index 000000000000..16df257b1dce
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/vmalloc.h
@@ -0,0 +1,17 @@
1/* arch/arm/mach-s5p6440/include/mach/vmalloc.h
2 *
3 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * S3C6400 vmalloc definition
10*/
11
12#ifndef __ASM_ARCH_VMALLOC_H
13#define __ASM_ARCH_VMALLOC_H
14
15#define VMALLOC_END (0xE0000000)
16
17#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/plat-s5p/s5p6440-init.c b/arch/arm/mach-s5p6440/init.c
index 90178256cc28..a1f3727e4021 100644
--- a/arch/arm/plat-s5p/s5p6440-init.c
+++ b/arch/arm/mach-s5p6440/init.c
@@ -1,8 +1,10 @@
1/* linux/arch/arm/plat-s5p/s5p6440-init.c 1/* linux/arch/arm/mach-s5p6440/init.c
2 * 2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd. 3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/ 4 * http://www.samsung.com/
5 * 5 *
6 * S5P6440 - Init support
7 *
6 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
diff --git a/arch/arm/mach-s5p6440/mach-smdk6440.c b/arch/arm/mach-s5p6440/mach-smdk6440.c
index 760ea5424a78..3ae88f2c7c77 100644
--- a/arch/arm/mach-s5p6440/mach-smdk6440.c
+++ b/arch/arm/mach-s5p6440/mach-smdk6440.c
@@ -100,8 +100,8 @@ static void __init smdk6440_machine_init(void)
100 100
101MACHINE_START(SMDK6440, "SMDK6440") 101MACHINE_START(SMDK6440, "SMDK6440")
102 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 102 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
103 .phys_io = S5P_PA_UART & 0xfff00000, 103 .phys_io = S3C_PA_UART & 0xfff00000,
104 .io_pg_offst = (((u32)S5P_VA_UART) >> 18) & 0xfffc, 104 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
105 .boot_params = S5P_PA_SDRAM + 0x100, 105 .boot_params = S5P_PA_SDRAM + 0x100,
106 106
107 .init_irq = s5p6440_init_irq, 107 .init_irq = s5p6440_init_irq,
diff --git a/arch/arm/mach-s5p6442/Kconfig b/arch/arm/mach-s5p6442/Kconfig
new file mode 100644
index 000000000000..4f3f6de6a013
--- /dev/null
+++ b/arch/arm/mach-s5p6442/Kconfig
@@ -0,0 +1,24 @@
1# arch/arm/mach-s5p6442/Kconfig
2#
3# Copyright (c) 2010 Samsung Electronics Co., Ltd.
4# http://www.samsung.com/
5#
6# Licensed under GPLv2
7
8# Configuration options for the S5P6442
9
10if ARCH_S5P6442
11
12config CPU_S5P6442
13 bool
14 select PLAT_S5P
15 help
16 Enable S5P6442 CPU support
17
18config MACH_SMDK6442
19 bool "SMDK6442"
20 select CPU_S5P6442
21 help
22 Machine support for Samsung SMDK6442
23
24endif
diff --git a/arch/arm/mach-s5p6442/Makefile b/arch/arm/mach-s5p6442/Makefile
new file mode 100644
index 000000000000..dde39a6ce6bc
--- /dev/null
+++ b/arch/arm/mach-s5p6442/Makefile
@@ -0,0 +1,19 @@
1# arch/arm/mach-s5p6442/Makefile
2#
3# Copyright (c) 2010 Samsung Electronics Co., Ltd.
4# http://www.samsung.com/
5#
6# Licensed under GPLv2
7
8obj-y :=
9obj-m :=
10obj-n :=
11obj- :=
12
13# Core support for S5P6442 system
14
15obj-$(CONFIG_CPU_S5P6442) += cpu.o init.o clock.o
16
17# machine support
18
19obj-$(CONFIG_MACH_SMDK6442) += mach-smdk6442.o
diff --git a/arch/arm/mach-s5p6442/Makefile.boot b/arch/arm/mach-s5p6442/Makefile.boot
new file mode 100644
index 000000000000..ff90aa13bd67
--- /dev/null
+++ b/arch/arm/mach-s5p6442/Makefile.boot
@@ -0,0 +1,2 @@
1 zreladdr-y := 0x20008000
2params_phys-y := 0x20000100
diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c
new file mode 100644
index 000000000000..3aadbf42c112
--- /dev/null
+++ b/arch/arm/mach-s5p6442/clock.c
@@ -0,0 +1,396 @@
1/* linux/arch/arm/mach-s5p6442/clock.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - Clock support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/list.h>
17#include <linux/err.h>
18#include <linux/clk.h>
19#include <linux/io.h>
20
21#include <mach/map.h>
22
23#include <plat/cpu-freq.h>
24#include <mach/regs-clock.h>
25#include <plat/clock.h>
26#include <plat/cpu.h>
27#include <plat/pll.h>
28#include <plat/s5p-clock.h>
29#include <plat/clock-clksrc.h>
30#include <plat/s5p6442.h>
31
32static struct clksrc_clk clk_mout_apll = {
33 .clk = {
34 .name = "mout_apll",
35 .id = -1,
36 },
37 .sources = &clk_src_apll,
38 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
39};
40
41static struct clksrc_clk clk_mout_mpll = {
42 .clk = {
43 .name = "mout_mpll",
44 .id = -1,
45 },
46 .sources = &clk_src_mpll,
47 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 },
48};
49
50static struct clksrc_clk clk_mout_epll = {
51 .clk = {
52 .name = "mout_epll",
53 .id = -1,
54 },
55 .sources = &clk_src_epll,
56 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 },
57};
58
59/* Possible clock sources for ARM Mux */
60static struct clk *clk_src_arm_list[] = {
61 [1] = &clk_mout_apll.clk,
62 [2] = &clk_mout_mpll.clk,
63};
64
65static struct clksrc_sources clk_src_arm = {
66 .sources = clk_src_arm_list,
67 .nr_sources = ARRAY_SIZE(clk_src_arm_list),
68};
69
70static struct clksrc_clk clk_mout_arm = {
71 .clk = {
72 .name = "mout_arm",
73 .id = -1,
74 },
75 .sources = &clk_src_arm,
76 .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 16, .size = 3 },
77};
78
79static struct clk clk_dout_a2m = {
80 .name = "dout_a2m",
81 .id = -1,
82 .parent = &clk_mout_apll.clk,
83};
84
85/* Possible clock sources for D0 Mux */
86static struct clk *clk_src_d0_list[] = {
87 [1] = &clk_mout_mpll.clk,
88 [2] = &clk_dout_a2m,
89};
90
91static struct clksrc_sources clk_src_d0 = {
92 .sources = clk_src_d0_list,
93 .nr_sources = ARRAY_SIZE(clk_src_d0_list),
94};
95
96static struct clksrc_clk clk_mout_d0 = {
97 .clk = {
98 .name = "mout_d0",
99 .id = -1,
100 },
101 .sources = &clk_src_d0,
102 .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 20, .size = 3 },
103};
104
105static struct clk clk_dout_apll = {
106 .name = "dout_apll",
107 .id = -1,
108 .parent = &clk_mout_arm.clk,
109};
110
111/* Possible clock sources for D0SYNC Mux */
112static struct clk *clk_src_d0sync_list[] = {
113 [1] = &clk_mout_d0.clk,
114 [2] = &clk_dout_apll,
115};
116
117static struct clksrc_sources clk_src_d0sync = {
118 .sources = clk_src_d0sync_list,
119 .nr_sources = ARRAY_SIZE(clk_src_d0sync_list),
120};
121
122static struct clksrc_clk clk_mout_d0sync = {
123 .clk = {
124 .name = "mout_d0sync",
125 .id = -1,
126 },
127 .sources = &clk_src_d0sync,
128 .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 },
129};
130
131/* Possible clock sources for D1 Mux */
132static struct clk *clk_src_d1_list[] = {
133 [1] = &clk_mout_mpll.clk,
134 [2] = &clk_dout_a2m,
135};
136
137static struct clksrc_sources clk_src_d1 = {
138 .sources = clk_src_d1_list,
139 .nr_sources = ARRAY_SIZE(clk_src_d1_list),
140};
141
142static struct clksrc_clk clk_mout_d1 = {
143 .clk = {
144 .name = "mout_d1",
145 .id = -1,
146 },
147 .sources = &clk_src_d1,
148 .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 24, .size = 3 },
149};
150
151/* Possible clock sources for D1SYNC Mux */
152static struct clk *clk_src_d1sync_list[] = {
153 [1] = &clk_mout_d1.clk,
154 [2] = &clk_dout_apll,
155};
156
157static struct clksrc_sources clk_src_d1sync = {
158 .sources = clk_src_d1sync_list,
159 .nr_sources = ARRAY_SIZE(clk_src_d1sync_list),
160};
161
162static struct clksrc_clk clk_mout_d1sync = {
163 .clk = {
164 .name = "mout_d1sync",
165 .id = -1,
166 },
167 .sources = &clk_src_d1sync,
168 .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 },
169};
170
171static struct clk clk_hclkd0 = {
172 .name = "hclkd0",
173 .id = -1,
174 .parent = &clk_mout_d0sync.clk,
175};
176
177static struct clk clk_hclkd1 = {
178 .name = "hclkd1",
179 .id = -1,
180 .parent = &clk_mout_d1sync.clk,
181};
182
183static struct clk clk_pclkd0 = {
184 .name = "pclkd0",
185 .id = -1,
186 .parent = &clk_hclkd0,
187};
188
189static struct clk clk_pclkd1 = {
190 .name = "pclkd1",
191 .id = -1,
192 .parent = &clk_hclkd1,
193};
194
195int s5p6442_clk_ip3_ctrl(struct clk *clk, int enable)
196{
197 return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable);
198}
199
200static struct clksrc_clk clksrcs[] = {
201 {
202 .clk = {
203 .name = "dout_a2m",
204 .id = -1,
205 .parent = &clk_mout_apll.clk,
206 },
207 .sources = &clk_src_apll,
208 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
209 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 3 },
210 }, {
211 .clk = {
212 .name = "dout_apll",
213 .id = -1,
214 .parent = &clk_mout_arm.clk,
215 },
216 .sources = &clk_src_arm,
217 .reg_src = { .reg = S5P_CLK_MUX_STAT0, .shift = 16, .size = 3 },
218 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 3 },
219 }, {
220 .clk = {
221 .name = "hclkd1",
222 .id = -1,
223 .parent = &clk_mout_d1sync.clk,
224 },
225 .sources = &clk_src_d1sync,
226 .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 },
227 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 24, .size = 4 },
228 }, {
229 .clk = {
230 .name = "hclkd0",
231 .id = -1,
232 .parent = &clk_mout_d0sync.clk,
233 },
234 .sources = &clk_src_d0sync,
235 .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 },
236 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 16, .size = 4 },
237 }, {
238 .clk = {
239 .name = "pclkd0",
240 .id = -1,
241 .parent = &clk_hclkd0,
242 },
243 .sources = &clk_src_d0sync,
244 .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 28, .size = 3 },
245 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 20, .size = 3 },
246 }, {
247 .clk = {
248 .name = "pclkd1",
249 .id = -1,
250 .parent = &clk_hclkd1,
251 },
252 .sources = &clk_src_d1sync,
253 .reg_src = { .reg = S5P_CLK_MUX_STAT1, .shift = 24, .size = 3 },
254 .reg_div = { .reg = S5P_CLK_DIV0, .shift = 28, .size = 3 },
255 }
256};
257
258/* Clock initialisation code */
259static struct clksrc_clk *init_parents[] = {
260 &clk_mout_apll,
261 &clk_mout_mpll,
262 &clk_mout_epll,
263 &clk_mout_arm,
264 &clk_mout_d0,
265 &clk_mout_d0sync,
266 &clk_mout_d1,
267 &clk_mout_d1sync,
268};
269
270void __init_or_cpufreq s5p6442_setup_clocks(void)
271{
272 struct clk *pclkd0_clk;
273 struct clk *pclkd1_clk;
274
275 unsigned long xtal;
276 unsigned long arm;
277 unsigned long hclkd0 = 0;
278 unsigned long hclkd1 = 0;
279 unsigned long pclkd0 = 0;
280 unsigned long pclkd1 = 0;
281
282 unsigned long apll;
283 unsigned long mpll;
284 unsigned long epll;
285 unsigned int ptr;
286
287 printk(KERN_DEBUG "%s: registering clocks\n", __func__);
288
289 xtal = clk_get_rate(&clk_xtal);
290
291 printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
292
293 apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508);
294 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
295 epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500);
296
297 printk(KERN_INFO "S5P6440: PLL settings, A=%ld, M=%ld, E=%ld",
298 apll, mpll, epll);
299
300 clk_fout_apll.rate = apll;
301 clk_fout_mpll.rate = mpll;
302 clk_fout_epll.rate = epll;
303
304 for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
305 s3c_set_clksrc(init_parents[ptr], true);
306
307 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
308 s3c_set_clksrc(&clksrcs[ptr], true);
309
310 arm = clk_get_rate(&clk_dout_apll);
311 hclkd0 = clk_get_rate(&clk_hclkd0);
312 hclkd1 = clk_get_rate(&clk_hclkd1);
313
314 pclkd0_clk = clk_get(NULL, "pclkd0");
315 BUG_ON(IS_ERR(pclkd0_clk));
316
317 pclkd0 = clk_get_rate(pclkd0_clk);
318 clk_put(pclkd0_clk);
319
320 pclkd1_clk = clk_get(NULL, "pclkd1");
321 BUG_ON(IS_ERR(pclkd1_clk));
322
323 pclkd1 = clk_get_rate(pclkd1_clk);
324 clk_put(pclkd1_clk);
325
326 printk(KERN_INFO "S5P6442: HCLKD0=%ld, HCLKD1=%ld, PCLKD0=%ld, PCLKD1=%ld\n",
327 hclkd0, hclkd1, pclkd0, pclkd1);
328
329 /* For backward compatibility */
330 clk_f.rate = arm;
331 clk_h.rate = hclkd1;
332 clk_p.rate = pclkd1;
333
334 clk_pclkd0.rate = pclkd0;
335 clk_pclkd1.rate = pclkd1;
336}
337
338static struct clk init_clocks[] = {
339 {
340 .name = "systimer",
341 .id = -1,
342 .parent = &clk_pclkd1,
343 .enable = s5p6442_clk_ip3_ctrl,
344 .ctrlbit = (1<<16),
345 }, {
346 .name = "uart",
347 .id = 0,
348 .parent = &clk_pclkd1,
349 .enable = s5p6442_clk_ip3_ctrl,
350 .ctrlbit = (1<<17),
351 }, {
352 .name = "uart",
353 .id = 1,
354 .parent = &clk_pclkd1,
355 .enable = s5p6442_clk_ip3_ctrl,
356 .ctrlbit = (1<<18),
357 }, {
358 .name = "uart",
359 .id = 2,
360 .parent = &clk_pclkd1,
361 .enable = s5p6442_clk_ip3_ctrl,
362 .ctrlbit = (1<<19),
363 }, {
364 .name = "timers",
365 .id = -1,
366 .parent = &clk_pclkd1,
367 .enable = s5p6442_clk_ip3_ctrl,
368 .ctrlbit = (1<<23),
369 },
370};
371
372static struct clk *clks[] __initdata = {
373 &clk_ext,
374 &clk_epll,
375 &clk_mout_apll.clk,
376 &clk_mout_mpll.clk,
377 &clk_mout_epll.clk,
378 &clk_mout_d0.clk,
379 &clk_mout_d0sync.clk,
380 &clk_mout_d1.clk,
381 &clk_mout_d1sync.clk,
382 &clk_hclkd0,
383 &clk_pclkd0,
384 &clk_hclkd1,
385 &clk_pclkd1,
386};
387
388void __init s5p6442_register_clocks(void)
389{
390 s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
391
392 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
393 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
394
395 s3c_pwmclk_init();
396}
diff --git a/arch/arm/mach-s5p6442/cpu.c b/arch/arm/mach-s5p6442/cpu.c
new file mode 100644
index 000000000000..bc2524df89b3
--- /dev/null
+++ b/arch/arm/mach-s5p6442/cpu.c
@@ -0,0 +1,121 @@
1/* linux/arch/arm/mach-s5p6442/cpu.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/interrupt.h>
14#include <linux/list.h>
15#include <linux/timer.h>
16#include <linux/init.h>
17#include <linux/clk.h>
18#include <linux/io.h>
19#include <linux/sysdev.h>
20#include <linux/serial_core.h>
21#include <linux/platform_device.h>
22
23#include <asm/mach/arch.h>
24#include <asm/mach/map.h>
25#include <asm/mach/irq.h>
26
27#include <asm/proc-fns.h>
28
29#include <mach/hardware.h>
30#include <mach/map.h>
31#include <asm/irq.h>
32
33#include <plat/regs-serial.h>
34#include <mach/regs-clock.h>
35
36#include <plat/cpu.h>
37#include <plat/devs.h>
38#include <plat/clock.h>
39#include <plat/s5p6442.h>
40
41/* Initial IO mappings */
42
43static struct map_desc s5p6442_iodesc[] __initdata = {
44 {
45 .virtual = (unsigned long)S5P_VA_SYSTIMER,
46 .pfn = __phys_to_pfn(S5P6442_PA_SYSTIMER),
47 .length = SZ_16K,
48 .type = MT_DEVICE,
49 }, {
50 .virtual = (unsigned long)VA_VIC2,
51 .pfn = __phys_to_pfn(S5P6442_PA_VIC2),
52 .length = SZ_16K,
53 .type = MT_DEVICE,
54 }
55};
56
57static void s5p6442_idle(void)
58{
59 if (!need_resched())
60 cpu_do_idle();
61
62 local_irq_enable();
63}
64
65/* s5p6442_map_io
66 *
67 * register the standard cpu IO areas
68*/
69
70void __init s5p6442_map_io(void)
71{
72 iotable_init(s5p6442_iodesc, ARRAY_SIZE(s5p6442_iodesc));
73}
74
75void __init s5p6442_init_clocks(int xtal)
76{
77 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
78
79 s3c24xx_register_baseclocks(xtal);
80 s5p_register_clocks(xtal);
81 s5p6442_register_clocks();
82 s5p6442_setup_clocks();
83}
84
85void __init s5p6442_init_irq(void)
86{
87 /* S5P6442 supports 3 VIC */
88 u32 vic[3];
89
90 /* VIC0, VIC1, and VIC2: some interrupt reserved */
91 vic[0] = 0x7fefffff;
92 vic[1] = 0X7f389c81;
93 vic[2] = 0X1bbbcfff;
94
95 s5p_init_irq(vic, ARRAY_SIZE(vic));
96}
97
98static struct sysdev_class s5p6442_sysclass = {
99 .name = "s5p6442-core",
100};
101
102static struct sys_device s5p6442_sysdev = {
103 .cls = &s5p6442_sysclass,
104};
105
106static int __init s5p6442_core_init(void)
107{
108 return sysdev_class_register(&s5p6442_sysclass);
109}
110
111core_initcall(s5p6442_core_init);
112
113int __init s5p6442_init(void)
114{
115 printk(KERN_INFO "S5P6442: Initializing architecture\n");
116
117 /* set idle function */
118 pm_idle = s5p6442_idle;
119
120 return sysdev_register(&s5p6442_sysdev);
121}
diff --git a/arch/arm/mach-s5p6442/include/mach/debug-macro.S b/arch/arm/mach-s5p6442/include/mach/debug-macro.S
new file mode 100644
index 000000000000..1aae691e58ef
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/debug-macro.S
@@ -0,0 +1,36 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/debug-macro.S
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* pull in the relevant register and map files. */
14
15#include <mach/map.h>
16#include <plat/regs-serial.h>
17
18 .macro addruart, rx
19 mrc p15, 0, \rx, c1, c0
20 tst \rx, #1
21 ldreq \rx, = S3C_PA_UART
22 ldrne \rx, = S3C_VA_UART
23#if CONFIG_DEBUG_S3C_UART != 0
24 add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
25#endif
26 .endm
27
28#define fifo_full fifo_full_s5pv210
29#define fifo_level fifo_level_s5pv210
30
31/* include the reset of the code which will do the work, we're only
32 * compiling for a single cpu processor type so the default of s3c2440
33 * will be fine with us.
34 */
35
36#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5p6442/include/mach/entry-macro.S b/arch/arm/mach-s5p6442/include/mach/entry-macro.S
new file mode 100644
index 000000000000..6d574edbf1ae
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/entry-macro.S
@@ -0,0 +1,48 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/entry-macro.S
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Low-level IRQ helper macros for the Samsung S5P6442
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <asm/hardware/vic.h>
14#include <mach/map.h>
15#include <plat/irqs.h>
16
17 .macro disable_fiq
18 .endm
19
20 .macro get_irqnr_preamble, base, tmp
21 ldr \base, =VA_VIC0
22 .endm
23
24 .macro arch_ret_to_user, tmp1, tmp2
25 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28
29 @ check the vic0
30 mov \irqnr, # S5P_IRQ_OFFSET + 31
31 ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
32 teq \irqstat, #0
33
34 @ otherwise try vic1
35 addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
36 addeq \irqnr, \irqnr, #32
37 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
38 teqeq \irqstat, #0
39
40 @ otherwise try vic2
41 addeq \tmp, \base, #(VA_VIC2 - VA_VIC0)
42 addeq \irqnr, \irqnr, #32
43 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
44 teqeq \irqstat, #0
45
46 clzne \irqstat, \irqstat
47 subne \irqnr, \irqnr, \irqstat
48 .endm
diff --git a/arch/arm/mach-s5p6442/include/mach/gpio.h b/arch/arm/mach-s5p6442/include/mach/gpio.h
new file mode 100644
index 000000000000..b8715df2fdab
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/gpio.h
@@ -0,0 +1,123 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/gpio.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - GPIO lib support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_GPIO_H
14#define __ASM_ARCH_GPIO_H __FILE__
15
16#define gpio_get_value __gpio_get_value
17#define gpio_set_value __gpio_set_value
18#define gpio_cansleep __gpio_cansleep
19#define gpio_to_irq __gpio_to_irq
20
21/* GPIO bank sizes */
22#define S5P6442_GPIO_A0_NR (8)
23#define S5P6442_GPIO_A1_NR (2)
24#define S5P6442_GPIO_B_NR (4)
25#define S5P6442_GPIO_C0_NR (5)
26#define S5P6442_GPIO_C1_NR (5)
27#define S5P6442_GPIO_D0_NR (2)
28#define S5P6442_GPIO_D1_NR (6)
29#define S5P6442_GPIO_E0_NR (8)
30#define S5P6442_GPIO_E1_NR (5)
31#define S5P6442_GPIO_F0_NR (8)
32#define S5P6442_GPIO_F1_NR (8)
33#define S5P6442_GPIO_F2_NR (8)
34#define S5P6442_GPIO_F3_NR (6)
35#define S5P6442_GPIO_G0_NR (7)
36#define S5P6442_GPIO_G1_NR (7)
37#define S5P6442_GPIO_G2_NR (7)
38#define S5P6442_GPIO_H0_NR (8)
39#define S5P6442_GPIO_H1_NR (8)
40#define S5P6442_GPIO_H2_NR (8)
41#define S5P6442_GPIO_H3_NR (8)
42#define S5P6442_GPIO_J0_NR (8)
43#define S5P6442_GPIO_J1_NR (6)
44#define S5P6442_GPIO_J2_NR (8)
45#define S5P6442_GPIO_J3_NR (8)
46#define S5P6442_GPIO_J4_NR (5)
47
48/* GPIO bank numbers */
49
50/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
51 * space for debugging purposes so that any accidental
52 * change from one gpio bank to another can be caught.
53*/
54
55#define S5P6442_GPIO_NEXT(__gpio) \
56 ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
57
58enum s5p_gpio_number {
59 S5P6442_GPIO_A0_START = 0,
60 S5P6442_GPIO_A1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_A0),
61 S5P6442_GPIO_B_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_A1),
62 S5P6442_GPIO_C0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_B),
63 S5P6442_GPIO_C1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_C0),
64 S5P6442_GPIO_D0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_C1),
65 S5P6442_GPIO_D1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_D0),
66 S5P6442_GPIO_E0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_D1),
67 S5P6442_GPIO_E1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_E0),
68 S5P6442_GPIO_F0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_E1),
69 S5P6442_GPIO_F1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F0),
70 S5P6442_GPIO_F2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F1),
71 S5P6442_GPIO_F3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F2),
72 S5P6442_GPIO_G0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F3),
73 S5P6442_GPIO_G1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G0),
74 S5P6442_GPIO_G2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G1),
75 S5P6442_GPIO_H0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G2),
76 S5P6442_GPIO_H1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H0),
77 S5P6442_GPIO_H2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H1),
78 S5P6442_GPIO_H3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H2),
79 S5P6442_GPIO_J0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H3),
80 S5P6442_GPIO_J1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J0),
81 S5P6442_GPIO_J2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J1),
82 S5P6442_GPIO_J3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J2),
83 S5P6442_GPIO_J4_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J3),
84};
85
86/* S5P6442 GPIO number definitions. */
87#define S5P6442_GPA0(_nr) (S5P6442_GPIO_A0_START + (_nr))
88#define S5P6442_GPA1(_nr) (S5P6442_GPIO_A1_START + (_nr))
89#define S5P6442_GPB(_nr) (S5P6442_GPIO_B_START + (_nr))
90#define S5P6442_GPC0(_nr) (S5P6442_GPIO_C0_START + (_nr))
91#define S5P6442_GPC1(_nr) (S5P6442_GPIO_C1_START + (_nr))
92#define S5P6442_GPD0(_nr) (S5P6442_GPIO_D0_START + (_nr))
93#define S5P6442_GPD1(_nr) (S5P6442_GPIO_D1_START + (_nr))
94#define S5P6442_GPE0(_nr) (S5P6442_GPIO_E0_START + (_nr))
95#define S5P6442_GPE1(_nr) (S5P6442_GPIO_E1_START + (_nr))
96#define S5P6442_GPF0(_nr) (S5P6442_GPIO_F0_START + (_nr))
97#define S5P6442_GPF1(_nr) (S5P6442_GPIO_F1_START + (_nr))
98#define S5P6442_GPF2(_nr) (S5P6442_GPIO_F2_START + (_nr))
99#define S5P6442_GPF3(_nr) (S5P6442_GPIO_F3_START + (_nr))
100#define S5P6442_GPG0(_nr) (S5P6442_GPIO_G0_START + (_nr))
101#define S5P6442_GPG1(_nr) (S5P6442_GPIO_G1_START + (_nr))
102#define S5P6442_GPG2(_nr) (S5P6442_GPIO_G2_START + (_nr))
103#define S5P6442_GPH0(_nr) (S5P6442_GPIO_H0_START + (_nr))
104#define S5P6442_GPH1(_nr) (S5P6442_GPIO_H1_START + (_nr))
105#define S5P6442_GPH2(_nr) (S5P6442_GPIO_H2_START + (_nr))
106#define S5P6442_GPH3(_nr) (S5P6442_GPIO_H3_START + (_nr))
107#define S5P6442_GPJ0(_nr) (S5P6442_GPIO_J0_START + (_nr))
108#define S5P6442_GPJ1(_nr) (S5P6442_GPIO_J1_START + (_nr))
109#define S5P6442_GPJ2(_nr) (S5P6442_GPIO_J2_START + (_nr))
110#define S5P6442_GPJ3(_nr) (S5P6442_GPIO_J3_START + (_nr))
111#define S5P6442_GPJ4(_nr) (S5P6442_GPIO_J4_START + (_nr))
112
113/* the end of the S5P6442 specific gpios */
114#define S5P6442_GPIO_END (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) + 1)
115#define S3C_GPIO_END S5P6442_GPIO_END
116
117/* define the number of gpios we need to the one after the GPJ4() range */
118#define ARCH_NR_GPIOS (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) + \
119 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
120
121#include <asm-generic/gpio.h>
122
123#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/hardware.h b/arch/arm/mach-s5p6442/include/mach/hardware.h
new file mode 100644
index 000000000000..8cd7b67b49d4
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/hardware.h
@@ -0,0 +1,18 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/hardware.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - Hardware support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_HARDWARE_H
14#define __ASM_ARCH_HARDWARE_H __FILE__
15
16/* currently nothing here, placeholder */
17
18#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/io.h b/arch/arm/mach-s5p6442/include/mach/io.h
new file mode 100644
index 000000000000..5d2195ad0b67
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/io.h
@@ -0,0 +1,17 @@
1/* arch/arm/mach-s5p6442/include/mach/io.h
2 *
3 * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
4 *
5 * Default IO routines for S5P6442
6 */
7
8#ifndef __ASM_ARM_ARCH_IO_H
9#define __ASM_ARM_ARCH_IO_H
10
11/* No current ISA/PCI bus support. */
12#define __io(a) __typesafe_io(a)
13#define __mem_pci(a) (a)
14
15#define IO_SPACE_LIMIT (0xFFFFFFFF)
16
17#endif
diff --git a/arch/arm/mach-s5p6442/include/mach/irqs.h b/arch/arm/mach-s5p6442/include/mach/irqs.h
new file mode 100644
index 000000000000..da665809f6e4
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/irqs.h
@@ -0,0 +1,86 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/irqs.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - IRQ definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_IRQS_H
14#define __ASM_ARCH_IRQS_H __FILE__
15
16#include <plat/irqs.h>
17
18/* VIC0 */
19#define IRQ_EINT16_31 S5P_IRQ_VIC0(16)
20#define IRQ_BATF S5P_IRQ_VIC0(17)
21#define IRQ_MDMA S5P_IRQ_VIC0(18)
22#define IRQ_PDMA S5P_IRQ_VIC0(19)
23#define IRQ_TIMER0_VIC S5P_IRQ_VIC0(21)
24#define IRQ_TIMER1_VIC S5P_IRQ_VIC0(22)
25#define IRQ_TIMER2_VIC S5P_IRQ_VIC0(23)
26#define IRQ_TIMER3_VIC S5P_IRQ_VIC0(24)
27#define IRQ_TIMER4_VIC S5P_IRQ_VIC0(25)
28#define IRQ_SYSTIMER S5P_IRQ_VIC0(26)
29#define IRQ_WDT S5P_IRQ_VIC0(27)
30#define IRQ_RTC_ALARM S5P_IRQ_VIC0(28)
31#define IRQ_RTC_TIC S5P_IRQ_VIC0(29)
32#define IRQ_GPIOINT S5P_IRQ_VIC0(30)
33
34/* VIC1 */
35#define IRQ_nPMUIRQ S5P_IRQ_VIC1(0)
36#define IRQ_ONENAND S5P_IRQ_VIC1(7)
37#define IRQ_UART0 S5P_IRQ_VIC1(10)
38#define IRQ_UART1 S5P_IRQ_VIC1(11)
39#define IRQ_UART2 S5P_IRQ_VIC1(12)
40#define IRQ_SPI0 S5P_IRQ_VIC1(15)
41#define IRQ_IIC S5P_IRQ_VIC1(19)
42#define IRQ_IIC1 S5P_IRQ_VIC1(20)
43#define IRQ_IIC2 S5P_IRQ_VIC1(21)
44#define IRQ_OTG S5P_IRQ_VIC1(24)
45#define IRQ_MSM S5P_IRQ_VIC1(25)
46#define IRQ_HSMMC0 S5P_IRQ_VIC1(26)
47#define IRQ_HSMMC1 S5P_IRQ_VIC1(27)
48#define IRQ_HSMMC2 S5P_IRQ_VIC1(28)
49#define IRQ_COMMRX S5P_IRQ_VIC1(29)
50#define IRQ_COMMTX S5P_IRQ_VIC1(30)
51
52/* VIC2 */
53#define IRQ_LCD0 S5P_IRQ_VIC2(0)
54#define IRQ_LCD1 S5P_IRQ_VIC2(1)
55#define IRQ_LCD2 S5P_IRQ_VIC2(2)
56#define IRQ_LCD3 S5P_IRQ_VIC2(3)
57#define IRQ_ROTATOR S5P_IRQ_VIC2(4)
58#define IRQ_FIMC0 S5P_IRQ_VIC2(5)
59#define IRQ_FIMC1 S5P_IRQ_VIC2(6)
60#define IRQ_FIMC2 S5P_IRQ_VIC2(7)
61#define IRQ_JPEG S5P_IRQ_VIC2(8)
62#define IRQ_3D S5P_IRQ_VIC2(10)
63#define IRQ_Mixer S5P_IRQ_VIC2(11)
64#define IRQ_MFC S5P_IRQ_VIC2(14)
65#define IRQ_TVENC S5P_IRQ_VIC2(15)
66#define IRQ_I2S0 S5P_IRQ_VIC2(16)
67#define IRQ_I2S1 S5P_IRQ_VIC2(17)
68#define IRQ_RP S5P_IRQ_VIC2(19)
69#define IRQ_PCM0 S5P_IRQ_VIC2(20)
70#define IRQ_PCM1 S5P_IRQ_VIC2(21)
71#define IRQ_ADC S5P_IRQ_VIC2(23)
72#define IRQ_PENDN S5P_IRQ_VIC2(24)
73#define IRQ_KEYPAD S5P_IRQ_VIC2(25)
74#define IRQ_SSS_INT S5P_IRQ_VIC2(27)
75#define IRQ_SSS_HASH S5P_IRQ_VIC2(28)
76#define IRQ_VIC_END S5P_IRQ_VIC2(31)
77
78#define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1)
79
80#define IRQ_EINT(x) ((x) < 16 ? S5P_IRQ_VIC0(x) : \
81 (S5P_IRQ_EINT_BASE + (x)-16))
82/* Set the default NR_IRQS */
83
84#define NR_IRQS (IRQ_EINT(31) + 1)
85
86#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h
new file mode 100644
index 000000000000..685277d792fb
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/map.h
@@ -0,0 +1,58 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/map.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_MAP_H
14#define __ASM_ARCH_MAP_H __FILE__
15
16#include <plat/map-base.h>
17#include <plat/map-s5p.h>
18
19#define S5P6442_PA_CHIPID (0xE0000000)
20#define S5P_PA_CHIPID S5P6442_PA_CHIPID
21
22#define S5P6442_PA_SYSCON (0xE0100000)
23#define S5P_PA_SYSCON S5P6442_PA_SYSCON
24
25#define S5P6442_PA_GPIO (0xE0200000)
26#define S5P_PA_GPIO S5P6442_PA_GPIO
27
28#define S5P6442_PA_VIC0 (0xE4000000)
29#define S5P_PA_VIC0 S5P6442_PA_VIC0
30
31#define S5P6442_PA_VIC1 (0xE4100000)
32#define S5P_PA_VIC1 S5P6442_PA_VIC1
33
34#define S5P6442_PA_VIC2 (0xE4200000)
35#define S5P_PA_VIC2 S5P6442_PA_VIC2
36
37#define S5P6442_PA_TIMER (0xEA000000)
38#define S5P_PA_TIMER S5P6442_PA_TIMER
39
40#define S5P6442_PA_SYSTIMER (0xEA100000)
41
42#define S5P6442_PA_UART (0xEC000000)
43
44#define S5P_PA_UART0 (S5P6442_PA_UART + 0x0)
45#define S5P_PA_UART1 (S5P6442_PA_UART + 0x400)
46#define S5P_PA_UART2 (S5P6442_PA_UART + 0x800)
47#define S5P_SZ_UART SZ_256
48
49#define S5P6442_PA_IIC0 (0xEC100000)
50
51#define S5P6442_PA_SDRAM (0x20000000)
52#define S5P_PA_SDRAM S5P6442_PA_SDRAM
53
54/* compatibiltiy defines. */
55#define S3C_PA_UART S5P6442_PA_UART
56#define S3C_PA_IIC S5P6442_PA_IIC0
57
58#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/memory.h b/arch/arm/mach-s5p6442/include/mach/memory.h
new file mode 100644
index 000000000000..9ddd877ba2ea
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/memory.h
@@ -0,0 +1,19 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/memory.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - Memory definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_MEMORY_H
14#define __ASM_ARCH_MEMORY_H
15
16#define PHYS_OFFSET UL(0x20000000)
17#define CONSISTENT_DMA_SIZE SZ_8M
18
19#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/pwm-clock.h b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
new file mode 100644
index 000000000000..15e8525da0f1
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
@@ -0,0 +1,69 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * Copyright 2010 Samsung Electronics Co., Ltd.
8 * http://www.samsung.com/
9 *
10 * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
11 *
12 * S5P6442 - pwm clock and timer support
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17*/
18
19#ifndef __ASM_ARCH_PWMCLK_H
20#define __ASM_ARCH_PWMCLK_H __FILE__
21
22/**
23 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
24 * @cfg: The timer TCFG1 register bits shifted down to 0.
25 *
26 * Return true if the given configuration from TCFG1 is a TCLK instead
27 * any of the TDIV clocks.
28 */
29static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
30{
31 return tcfg == S3C2410_TCFG1_MUX_TCLK;
32}
33
34/**
35 * tcfg_to_divisor() - convert tcfg1 setting to a divisor
36 * @tcfg1: The tcfg1 setting, shifted down.
37 *
38 * Get the divisor value for the given tcfg1 setting. We assume the
39 * caller has already checked to see if this is not a TCLK source.
40 */
41static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
42{
43 return 1 << (1 + tcfg1);
44}
45
46/**
47 * pwm_tdiv_has_div1() - does the tdiv setting have a /1
48 *
49 * Return true if we have a /1 in the tdiv setting.
50 */
51static inline unsigned int pwm_tdiv_has_div1(void)
52{
53 return 0;
54}
55
56/**
57 * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
58 * @div: The divisor to calculate the bit information for.
59 *
60 * Turn a divisor into the necessary bit field for TCFG1.
61 */
62static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
63{
64 return ilog2(div) - 1;
65}
66
67#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK
68
69#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/regs-clock.h b/arch/arm/mach-s5p6442/include/mach/regs-clock.h
new file mode 100644
index 000000000000..d8360b5d4ece
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/regs-clock.h
@@ -0,0 +1,103 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/regs-clock.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - Clock register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_CLOCK_H
14#define __ASM_ARCH_REGS_CLOCK_H __FILE__
15
16#include <mach/map.h>
17
18#define S5P_CLKREG(x) (S3C_VA_SYS + (x))
19
20#define S5P_APLL_LOCK S5P_CLKREG(0x00)
21#define S5P_MPLL_LOCK S5P_CLKREG(0x08)
22#define S5P_EPLL_LOCK S5P_CLKREG(0x10)
23#define S5P_VPLL_LOCK S5P_CLKREG(0x20)
24
25#define S5P_APLL_CON S5P_CLKREG(0x100)
26#define S5P_MPLL_CON S5P_CLKREG(0x108)
27#define S5P_EPLL_CON S5P_CLKREG(0x110)
28#define S5P_VPLL_CON S5P_CLKREG(0x120)
29
30#define S5P_CLK_SRC0 S5P_CLKREG(0x200)
31#define S5P_CLK_SRC1 S5P_CLKREG(0x204)
32#define S5P_CLK_SRC2 S5P_CLKREG(0x208)
33#define S5P_CLK_SRC3 S5P_CLKREG(0x20C)
34#define S5P_CLK_SRC4 S5P_CLKREG(0x210)
35#define S5P_CLK_SRC5 S5P_CLKREG(0x214)
36#define S5P_CLK_SRC6 S5P_CLKREG(0x218)
37
38#define S5P_CLK_SRC_MASK0 S5P_CLKREG(0x280)
39#define S5P_CLK_SRC_MASK1 S5P_CLKREG(0x284)
40
41#define S5P_CLK_DIV0 S5P_CLKREG(0x300)
42#define S5P_CLK_DIV1 S5P_CLKREG(0x304)
43#define S5P_CLK_DIV2 S5P_CLKREG(0x308)
44#define S5P_CLK_DIV3 S5P_CLKREG(0x30C)
45#define S5P_CLK_DIV4 S5P_CLKREG(0x310)
46#define S5P_CLK_DIV5 S5P_CLKREG(0x314)
47#define S5P_CLK_DIV6 S5P_CLKREG(0x318)
48
49#define S5P_CLKGATE_IP3 S5P_CLKREG(0x46C)
50
51/* CLK_OUT */
52#define S5P_CLK_OUT_SHIFT (12)
53#define S5P_CLK_OUT_MASK (0x1F << S5P_CLK_OUT_SHIFT)
54#define S5P_CLK_OUT S5P_CLKREG(0x500)
55
56#define S5P_CLK_DIV_STAT0 S5P_CLKREG(0x1000)
57#define S5P_CLK_DIV_STAT1 S5P_CLKREG(0x1004)
58
59#define S5P_CLK_MUX_STAT0 S5P_CLKREG(0x1100)
60#define S5P_CLK_MUX_STAT1 S5P_CLKREG(0x1104)
61
62#define S5P_MDNIE_SEL S5P_CLKREG(0x7008)
63
64/* Register Bit definition */
65#define S5P_EPLL_EN (1<<31)
66#define S5P_EPLL_MASK 0xffffffff
67#define S5P_EPLLVAL(_m, _p, _s) ((_m) << 16 | ((_p) << 8) | ((_s)))
68
69/* CLKDIV0 */
70#define S5P_CLKDIV0_APLL_SHIFT (0)
71#define S5P_CLKDIV0_APLL_MASK (0x7 << S5P_CLKDIV0_APLL_SHIFT)
72#define S5P_CLKDIV0_A2M_SHIFT (4)
73#define S5P_CLKDIV0_A2M_MASK (0x7 << S5P_CLKDIV0_A2M_SHIFT)
74#define S5P_CLKDIV0_D0CLK_SHIFT (16)
75#define S5P_CLKDIV0_D0CLK_MASK (0xF << S5P_CLKDIV0_D0CLK_SHIFT)
76#define S5P_CLKDIV0_P0CLK_SHIFT (20)
77#define S5P_CLKDIV0_P0CLK_MASK (0x7 << S5P_CLKDIV0_P0CLK_SHIFT)
78#define S5P_CLKDIV0_D1CLK_SHIFT (24)
79#define S5P_CLKDIV0_D1CLK_MASK (0xF << S5P_CLKDIV0_D1CLK_SHIFT)
80#define S5P_CLKDIV0_P1CLK_SHIFT (28)
81#define S5P_CLKDIV0_P1CLK_MASK (0x7 << S5P_CLKDIV0_P1CLK_SHIFT)
82
83/* Clock MUX status Registers */
84#define S5P_CLK_MUX_STAT0_APLL_SHIFT (0)
85#define S5P_CLK_MUX_STAT0_APLL_MASK (0x7 << S5P_CLK_MUX_STAT0_APLL_SHIFT)
86#define S5P_CLK_MUX_STAT0_MPLL_SHIFT (4)
87#define S5P_CLK_MUX_STAT0_MPLL_MASK (0x7 << S5P_CLK_MUX_STAT0_MPLL_SHIFT)
88#define S5P_CLK_MUX_STAT0_EPLL_SHIFT (8)
89#define S5P_CLK_MUX_STAT0_EPLL_MASK (0x7 << S5P_CLK_MUX_STAT0_EPLL_SHIFT)
90#define S5P_CLK_MUX_STAT0_VPLL_SHIFT (12)
91#define S5P_CLK_MUX_STAT0_VPLL_MASK (0x7 << S5P_CLK_MUX_STAT0_VPLL_SHIFT)
92#define S5P_CLK_MUX_STAT0_MUXARM_SHIFT (16)
93#define S5P_CLK_MUX_STAT0_MUXARM_MASK (0x7 << S5P_CLK_MUX_STAT0_MUXARM_SHIFT)
94#define S5P_CLK_MUX_STAT0_MUXD0_SHIFT (20)
95#define S5P_CLK_MUX_STAT0_MUXD0_MASK (0x7 << S5P_CLK_MUX_STAT0_MUXD0_SHIFT)
96#define S5P_CLK_MUX_STAT0_MUXD1_SHIFT (24)
97#define S5P_CLK_MUX_STAT0_MUXD1_MASK (0x7 << S5P_CLK_MUX_STAT0_MUXD1_SHIFT)
98#define S5P_CLK_MUX_STAT1_D1SYNC_SHIFT (24)
99#define S5P_CLK_MUX_STAT1_D1SYNC_MASK (0x7 << S5P_CLK_MUX_STAT1_D1SYNC_SHIFT)
100#define S5P_CLK_MUX_STAT1_D0SYNC_SHIFT (28)
101#define S5P_CLK_MUX_STAT1_D0SYNC_MASK (0x7 << S5P_CLK_MUX_STAT1_D0SYNC_SHIFT)
102
103#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/regs-irq.h b/arch/arm/mach-s5p6442/include/mach/regs-irq.h
new file mode 100644
index 000000000000..73782b52a83b
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/regs-irq.h
@@ -0,0 +1,19 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/regs-irq.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - IRQ register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_IRQ_H
14#define __ASM_ARCH_REGS_IRQ_H __FILE__
15
16#include <asm/hardware/vic.h>
17#include <mach/map.h>
18
19#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/system.h b/arch/arm/mach-s5p6442/include/mach/system.h
new file mode 100644
index 000000000000..8bcd8ed0c3c3
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/system.h
@@ -0,0 +1,26 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/system.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - system support header
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_SYSTEM_H
14#define __ASM_ARCH_SYSTEM_H __FILE__
15
16static void arch_idle(void)
17{
18 /* nothing here yet */
19}
20
21static void arch_reset(char mode, const char *cmd)
22{
23 /* nothing here yet */
24}
25
26#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/tick.h b/arch/arm/mach-s5p6442/include/mach/tick.h
new file mode 100644
index 000000000000..e1d4cabf8297
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/tick.h
@@ -0,0 +1,26 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/tick.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Based on arch/arm/mach-s3c6400/include/mach/tick.h
7 *
8 * S5P6442 - Timer tick support definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_TICK_H
16#define __ASM_ARCH_TICK_H __FILE__
17
18static inline u32 s3c24xx_ostimer_pending(void)
19{
20 u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
21 return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
22}
23
24#define TICK_MAX (0xffffffff)
25
26#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/timex.h b/arch/arm/mach-s5p6442/include/mach/timex.h
new file mode 100644
index 000000000000..ff8f2fcadeb7
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/timex.h
@@ -0,0 +1,24 @@
1/* arch/arm/mach-s5p6442/include/mach/timex.h
2 *
3 * Copyright (c) 2003-2010 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S5P6442 - time parameters
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_TIMEX_H
14#define __ASM_ARCH_TIMEX_H
15
16/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
17 * a variable is useless. It seems as long as we make our timers an
18 * exact multiple of HZ, any value that makes a 1->1 correspondence
19 * for the time conversion functions to/from jiffies is acceptable.
20*/
21
22#define CLOCK_TICK_RATE 12000000
23
24#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/uncompress.h b/arch/arm/mach-s5p6442/include/mach/uncompress.h
new file mode 100644
index 000000000000..5ac7cbeeb987
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/uncompress.h
@@ -0,0 +1,24 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/uncompress.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6442 - uncompress code
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_UNCOMPRESS_H
14#define __ASM_ARCH_UNCOMPRESS_H
15
16#include <mach/map.h>
17#include <plat/uncompress.h>
18
19static void arch_detect_cpu(void)
20{
21 /* we do not need to do any cpu detection here at the moment. */
22}
23
24#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5p6442/include/mach/vmalloc.h b/arch/arm/mach-s5p6442/include/mach/vmalloc.h
new file mode 100644
index 000000000000..be3333688c20
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/vmalloc.h
@@ -0,0 +1,17 @@
1/* arch/arm/mach-s5p6442/include/mach/vmalloc.h
2 *
3 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * S5P6442 vmalloc definition
10*/
11
12#ifndef __ASM_ARCH_VMALLOC_H
13#define __ASM_ARCH_VMALLOC_H
14
15#define VMALLOC_END (0xE0000000)
16
17#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5p6442/init.c b/arch/arm/mach-s5p6442/init.c
new file mode 100644
index 000000000000..1874bdb71e1d
--- /dev/null
+++ b/arch/arm/mach-s5p6442/init.c
@@ -0,0 +1,44 @@
1/* linux/arch/arm/mach-s5p6442/s5p6442-init.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/serial_core.h>
15
16#include <plat/cpu.h>
17#include <plat/devs.h>
18#include <plat/s5p6442.h>
19#include <plat/regs-serial.h>
20
21static struct s3c24xx_uart_clksrc s5p6442_serial_clocks[] = {
22 [0] = {
23 .name = "pclk",
24 .divisor = 1,
25 .min_baud = 0,
26 .max_baud = 0,
27 },
28};
29
30/* uart registration process */
31void __init s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
32{
33 struct s3c2410_uartcfg *tcfg = cfg;
34 u32 ucnt;
35
36 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
37 if (!tcfg->clocks) {
38 tcfg->clocks = s5p6442_serial_clocks;
39 tcfg->clocks_size = ARRAY_SIZE(s5p6442_serial_clocks);
40 }
41 }
42
43 s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
44}
diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c
new file mode 100644
index 000000000000..0d63371ce07c
--- /dev/null
+++ b/arch/arm/mach-s5p6442/mach-smdk6442.c
@@ -0,0 +1,91 @@
1/* linux/arch/arm/mach-s5p6442/mach-smdk6442.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/serial_core.h>
15
16#include <asm/mach/arch.h>
17#include <asm/mach/map.h>
18#include <asm/setup.h>
19#include <asm/mach-types.h>
20
21#include <mach/map.h>
22#include <mach/regs-clock.h>
23
24#include <plat/regs-serial.h>
25#include <plat/s5p6442.h>
26#include <plat/devs.h>
27#include <plat/cpu.h>
28
29/* Following are default values for UCON, ULCON and UFCON UART registers */
30#define S5P6442_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
31 S3C2410_UCON_RXILEVEL | \
32 S3C2410_UCON_TXIRQMODE | \
33 S3C2410_UCON_RXIRQMODE | \
34 S3C2410_UCON_RXFIFO_TOI | \
35 S3C2443_UCON_RXERR_IRQEN)
36
37#define S5P6442_ULCON_DEFAULT S3C2410_LCON_CS8
38
39#define S5P6442_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
40 S5PV210_UFCON_TXTRIG4 | \
41 S5PV210_UFCON_RXTRIG4)
42
43static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = {
44 [0] = {
45 .hwport = 0,
46 .flags = 0,
47 .ucon = S5P6442_UCON_DEFAULT,
48 .ulcon = S5P6442_ULCON_DEFAULT,
49 .ufcon = S5P6442_UFCON_DEFAULT,
50 },
51 [1] = {
52 .hwport = 1,
53 .flags = 0,
54 .ucon = S5P6442_UCON_DEFAULT,
55 .ulcon = S5P6442_ULCON_DEFAULT,
56 .ufcon = S5P6442_UFCON_DEFAULT,
57 },
58 [2] = {
59 .hwport = 2,
60 .flags = 0,
61 .ucon = S5P6442_UCON_DEFAULT,
62 .ulcon = S5P6442_ULCON_DEFAULT,
63 .ufcon = S5P6442_UFCON_DEFAULT,
64 },
65};
66
67static struct platform_device *smdk6442_devices[] __initdata = {
68};
69
70static void __init smdk6442_map_io(void)
71{
72 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
73 s3c24xx_init_clocks(12000000);
74 s3c24xx_init_uarts(smdk6442_uartcfgs, ARRAY_SIZE(smdk6442_uartcfgs));
75}
76
77static void __init smdk6442_machine_init(void)
78{
79 platform_add_devices(smdk6442_devices, ARRAY_SIZE(smdk6442_devices));
80}
81
82MACHINE_START(SMDK6442, "SMDK6442")
83 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
84 .phys_io = S3C_PA_UART & 0xfff00000,
85 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
86 .boot_params = S5P_PA_SDRAM + 0x100,
87 .init_irq = s5p6442_init_irq,
88 .map_io = smdk6442_map_io,
89 .init_machine = smdk6442_machine_init,
90 .timer = &s3c24xx_timer,
91MACHINE_END
diff --git a/arch/arm/mach-s5pc100/include/mach/io.h b/arch/arm/mach-s5pc100/include/mach/io.h
new file mode 100644
index 000000000000..819acf5eaf89
--- /dev/null
+++ b/arch/arm/mach-s5pc100/include/mach/io.h
@@ -0,0 +1,18 @@
1/* arch/arm/mach-s5pc100/include/mach/io.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben-linux@fluff.org>
5 *
6 * Default IO routines for S5PC100 systems
7 */
8
9#ifndef __ASM_ARM_ARCH_IO_H
10#define __ASM_ARM_ARCH_IO_H
11
12/* No current ISA/PCI bus support. */
13#define __io(a) __typesafe_io(a)
14#define __mem_pci(a) (a)
15
16#define IO_SPACE_LIMIT (0xFFFFFFFF)
17
18#endif
diff --git a/arch/arm/mach-s5pc100/include/mach/timex.h b/arch/arm/mach-s5pc100/include/mach/timex.h
new file mode 100644
index 000000000000..47ffb17aff96
--- /dev/null
+++ b/arch/arm/mach-s5pc100/include/mach/timex.h
@@ -0,0 +1,24 @@
1/* arch/arm/mach-s5pc100/include/mach/timex.h
2 *
3 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C6400 - time parameters
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_TIMEX_H
14#define __ASM_ARCH_TIMEX_H
15
16/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
17 * a variable is useless. It seems as long as we make our timers an
18 * exact multiple of HZ, any value that makes a 1->1 correspondence
19 * for the time conversion functions to/from jiffies is acceptable.
20*/
21
22#define CLOCK_TICK_RATE 12000000
23
24#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/vmalloc.h b/arch/arm/mach-s5pc100/include/mach/vmalloc.h
new file mode 100644
index 000000000000..61b95158a437
--- /dev/null
+++ b/arch/arm/mach-s5pc100/include/mach/vmalloc.h
@@ -0,0 +1,17 @@
1/* arch/arm/mach-s5pc100/include/mach/vmalloc.h
2 *
3 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * S3C6400 vmalloc definition
10*/
11
12#ifndef __ASM_ARCH_VMALLOC_H
13#define __ASM_ARCH_VMALLOC_H
14
15#define VMALLOC_END (0xE0000000)
16
17#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
new file mode 100644
index 000000000000..af33a1a89b72
--- /dev/null
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -0,0 +1,40 @@
1# arch/arm/mach-s5pv210/Kconfig
2#
3# Copyright (c) 2010 Samsung Electronics Co., Ltd.
4# http://www.samsung.com/
5#
6# Licensed under GPLv2
7
8# Configuration options for the S5PV210/S5PC110
9
10if ARCH_S5PV210
11
12config CPU_S5PV210
13 bool
14 select PLAT_S5P
15 help
16 Enable S5PV210 CPU support
17
18choice
19 prompt "Select machine type"
20 depends on ARCH_S5PV210
21 default MACH_SMDKV210
22
23config MACH_SMDKV210
24 bool "SMDKV210"
25 select CPU_S5PV210
26 select ARCH_SPARSEMEM_ENABLE
27 help
28 Machine support for Samsung SMDKV210
29
30config MACH_SMDKC110
31 bool "SMDKC110"
32 select CPU_S5PV210
33 select ARCH_SPARSEMEM_ENABLE
34 help
35 Machine support for Samsung SMDKC110
36 S5PC110(MCP) is one of package option of S5PV210
37
38endchoice
39
40endif
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
new file mode 100644
index 000000000000..8ebf51c52a01
--- /dev/null
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -0,0 +1,20 @@
1# arch/arm/mach-s5pv210/Makefile
2#
3# Copyright (c) 2010 Samsung Electronics Co., Ltd.
4# http://www.samsung.com/
5#
6# Licensed under GPLv2
7
8obj-y :=
9obj-m :=
10obj-n :=
11obj- :=
12
13# Core support for S5PV210 system
14
15obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o
16
17# machine support
18
19obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o
20obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o
diff --git a/arch/arm/mach-s5pv210/Makefile.boot b/arch/arm/mach-s5pv210/Makefile.boot
new file mode 100644
index 000000000000..ff90aa13bd67
--- /dev/null
+++ b/arch/arm/mach-s5pv210/Makefile.boot
@@ -0,0 +1,2 @@
1 zreladdr-y := 0x20008000
2params_phys-y := 0x20000100
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
new file mode 100644
index 000000000000..ccccae262351
--- /dev/null
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -0,0 +1,454 @@
1/* linux/arch/arm/mach-s5pv210/clock.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - Clock support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/list.h>
17#include <linux/errno.h>
18#include <linux/err.h>
19#include <linux/clk.h>
20#include <linux/sysdev.h>
21#include <linux/io.h>
22
23#include <mach/map.h>
24
25#include <plat/cpu-freq.h>
26#include <mach/regs-clock.h>
27#include <plat/clock.h>
28#include <plat/cpu.h>
29#include <plat/pll.h>
30#include <plat/s5p-clock.h>
31#include <plat/clock-clksrc.h>
32#include <plat/s5pv210.h>
33
34static int s5pv210_clk_ip0_ctrl(struct clk *clk, int enable)
35{
36 return s5p_gatectrl(S5P_CLKGATE_IP0, clk, enable);
37}
38
39static int s5pv210_clk_ip1_ctrl(struct clk *clk, int enable)
40{
41 return s5p_gatectrl(S5P_CLKGATE_IP1, clk, enable);
42}
43
44static int s5pv210_clk_ip2_ctrl(struct clk *clk, int enable)
45{
46 return s5p_gatectrl(S5P_CLKGATE_IP2, clk, enable);
47}
48
49static int s5pv210_clk_ip3_ctrl(struct clk *clk, int enable)
50{
51 return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable);
52}
53
54static struct clk clk_h200 = {
55 .name = "hclk200",
56 .id = -1,
57};
58
59static struct clk clk_h100 = {
60 .name = "hclk100",
61 .id = -1,
62};
63
64static struct clk clk_h166 = {
65 .name = "hclk166",
66 .id = -1,
67};
68
69static struct clk clk_h133 = {
70 .name = "hclk133",
71 .id = -1,
72};
73
74static struct clk clk_p100 = {
75 .name = "pclk100",
76 .id = -1,
77};
78
79static struct clk clk_p83 = {
80 .name = "pclk83",
81 .id = -1,
82};
83
84static struct clk clk_p66 = {
85 .name = "pclk66",
86 .id = -1,
87};
88
89static struct clk *sys_clks[] = {
90 &clk_h200,
91 &clk_h100,
92 &clk_h166,
93 &clk_h133,
94 &clk_p100,
95 &clk_p83,
96 &clk_p66
97};
98
99static struct clk init_clocks_disable[] = {
100 {
101 .name = "rot",
102 .id = -1,
103 .parent = &clk_h166,
104 .enable = s5pv210_clk_ip0_ctrl,
105 .ctrlbit = (1<<29),
106 }, {
107 .name = "otg",
108 .id = -1,
109 .parent = &clk_h133,
110 .enable = s5pv210_clk_ip1_ctrl,
111 .ctrlbit = (1<<16),
112 }, {
113 .name = "usb-host",
114 .id = -1,
115 .parent = &clk_h133,
116 .enable = s5pv210_clk_ip1_ctrl,
117 .ctrlbit = (1<<17),
118 }, {
119 .name = "lcd",
120 .id = -1,
121 .parent = &clk_h166,
122 .enable = s5pv210_clk_ip1_ctrl,
123 .ctrlbit = (1<<0),
124 }, {
125 .name = "cfcon",
126 .id = 0,
127 .parent = &clk_h133,
128 .enable = s5pv210_clk_ip1_ctrl,
129 .ctrlbit = (1<<25),
130 }, {
131 .name = "hsmmc",
132 .id = 0,
133 .parent = &clk_h133,
134 .enable = s5pv210_clk_ip2_ctrl,
135 .ctrlbit = (1<<16),
136 }, {
137 .name = "hsmmc",
138 .id = 1,
139 .parent = &clk_h133,
140 .enable = s5pv210_clk_ip2_ctrl,
141 .ctrlbit = (1<<17),
142 }, {
143 .name = "hsmmc",
144 .id = 2,
145 .parent = &clk_h133,
146 .enable = s5pv210_clk_ip2_ctrl,
147 .ctrlbit = (1<<18),
148 }, {
149 .name = "hsmmc",
150 .id = 3,
151 .parent = &clk_h133,
152 .enable = s5pv210_clk_ip2_ctrl,
153 .ctrlbit = (1<<19),
154 }, {
155 .name = "systimer",
156 .id = -1,
157 .parent = &clk_p66,
158 .enable = s5pv210_clk_ip3_ctrl,
159 .ctrlbit = (1<<16),
160 }, {
161 .name = "watchdog",
162 .id = -1,
163 .parent = &clk_p66,
164 .enable = s5pv210_clk_ip3_ctrl,
165 .ctrlbit = (1<<22),
166 }, {
167 .name = "rtc",
168 .id = -1,
169 .parent = &clk_p66,
170 .enable = s5pv210_clk_ip3_ctrl,
171 .ctrlbit = (1<<15),
172 }, {
173 .name = "i2c",
174 .id = 0,
175 .parent = &clk_p66,
176 .enable = s5pv210_clk_ip3_ctrl,
177 .ctrlbit = (1<<7),
178 }, {
179 .name = "i2c",
180 .id = 1,
181 .parent = &clk_p66,
182 .enable = s5pv210_clk_ip3_ctrl,
183 .ctrlbit = (1<<8),
184 }, {
185 .name = "i2c",
186 .id = 2,
187 .parent = &clk_p66,
188 .enable = s5pv210_clk_ip3_ctrl,
189 .ctrlbit = (1<<9),
190 }, {
191 .name = "spi",
192 .id = 0,
193 .parent = &clk_p66,
194 .enable = s5pv210_clk_ip3_ctrl,
195 .ctrlbit = (1<<12),
196 }, {
197 .name = "spi",
198 .id = 1,
199 .parent = &clk_p66,
200 .enable = s5pv210_clk_ip3_ctrl,
201 .ctrlbit = (1<<13),
202 }, {
203 .name = "spi",
204 .id = 2,
205 .parent = &clk_p66,
206 .enable = s5pv210_clk_ip3_ctrl,
207 .ctrlbit = (1<<14),
208 }, {
209 .name = "timers",
210 .id = -1,
211 .parent = &clk_p66,
212 .enable = s5pv210_clk_ip3_ctrl,
213 .ctrlbit = (1<<23),
214 }, {
215 .name = "adc",
216 .id = -1,
217 .parent = &clk_p66,
218 .enable = s5pv210_clk_ip3_ctrl,
219 .ctrlbit = (1<<24),
220 }, {
221 .name = "keypad",
222 .id = -1,
223 .parent = &clk_p66,
224 .enable = s5pv210_clk_ip3_ctrl,
225 .ctrlbit = (1<<21),
226 }, {
227 .name = "i2s_v50",
228 .id = 0,
229 .parent = &clk_p,
230 .enable = s5pv210_clk_ip3_ctrl,
231 .ctrlbit = (1<<4),
232 }, {
233 .name = "i2s_v32",
234 .id = 0,
235 .parent = &clk_p,
236 .enable = s5pv210_clk_ip3_ctrl,
237 .ctrlbit = (1<<4),
238 }, {
239 .name = "i2s_v32",
240 .id = 1,
241 .parent = &clk_p,
242 .enable = s5pv210_clk_ip3_ctrl,
243 .ctrlbit = (1<<4),
244 }
245};
246
247static struct clk init_clocks[] = {
248 {
249 .name = "uart",
250 .id = 0,
251 .parent = &clk_p66,
252 .enable = s5pv210_clk_ip3_ctrl,
253 .ctrlbit = (1<<7),
254 }, {
255 .name = "uart",
256 .id = 1,
257 .parent = &clk_p66,
258 .enable = s5pv210_clk_ip3_ctrl,
259 .ctrlbit = (1<<8),
260 }, {
261 .name = "uart",
262 .id = 2,
263 .parent = &clk_p66,
264 .enable = s5pv210_clk_ip3_ctrl,
265 .ctrlbit = (1<<9),
266 }, {
267 .name = "uart",
268 .id = 3,
269 .parent = &clk_p66,
270 .enable = s5pv210_clk_ip3_ctrl,
271 .ctrlbit = (1<<10),
272 },
273};
274
275static struct clksrc_clk clk_mout_apll = {
276 .clk = {
277 .name = "mout_apll",
278 .id = -1,
279 },
280 .sources = &clk_src_apll,
281 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
282};
283
284static struct clksrc_clk clk_mout_epll = {
285 .clk = {
286 .name = "mout_epll",
287 .id = -1,
288 },
289 .sources = &clk_src_epll,
290 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 },
291};
292
293static struct clksrc_clk clk_mout_mpll = {
294 .clk = {
295 .name = "mout_mpll",
296 .id = -1,
297 },
298 .sources = &clk_src_mpll,
299 .reg_src = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 },
300};
301
302static struct clk *clkset_uart_list[] = {
303 [6] = &clk_mout_mpll.clk,
304 [7] = &clk_mout_epll.clk,
305};
306
307static struct clksrc_sources clkset_uart = {
308 .sources = clkset_uart_list,
309 .nr_sources = ARRAY_SIZE(clkset_uart_list),
310};
311
312static struct clksrc_clk clksrcs[] = {
313 {
314 .clk = {
315 .name = "uclk1",
316 .id = -1,
317 .ctrlbit = (1<<17),
318 .enable = s5pv210_clk_ip3_ctrl,
319 },
320 .sources = &clkset_uart,
321 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 },
322 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 },
323 }
324};
325
326/* Clock initialisation code */
327static struct clksrc_clk *init_parents[] = {
328 &clk_mout_apll,
329 &clk_mout_epll,
330 &clk_mout_mpll,
331};
332
333#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
334
335void __init_or_cpufreq s5pv210_setup_clocks(void)
336{
337 struct clk *xtal_clk;
338 unsigned long xtal;
339 unsigned long armclk;
340 unsigned long hclk200;
341 unsigned long hclk166;
342 unsigned long hclk133;
343 unsigned long pclk100;
344 unsigned long pclk83;
345 unsigned long pclk66;
346 unsigned long apll;
347 unsigned long mpll;
348 unsigned long epll;
349 unsigned int ptr;
350 u32 clkdiv0, clkdiv1;
351
352 printk(KERN_DEBUG "%s: registering clocks\n", __func__);
353
354 clkdiv0 = __raw_readl(S5P_CLK_DIV0);
355 clkdiv1 = __raw_readl(S5P_CLK_DIV1);
356
357 printk(KERN_DEBUG "%s: clkdiv0 = %08x, clkdiv1 = %08x\n",
358 __func__, clkdiv0, clkdiv1);
359
360 xtal_clk = clk_get(NULL, "xtal");
361 BUG_ON(IS_ERR(xtal_clk));
362
363 xtal = clk_get_rate(xtal_clk);
364 clk_put(xtal_clk);
365
366 printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
367
368 apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508);
369 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
370 epll = s5p_get_pll45xx(xtal, __raw_readl(S5P_EPLL_CON), pll_4500);
371
372 printk(KERN_INFO "S5PV210: PLL settings, A=%ld, M=%ld, E=%ld",
373 apll, mpll, epll);
374
375 armclk = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_APLL);
376 if (__raw_readl(S5P_CLK_SRC0) & S5P_CLKSRC0_MUX200_MASK)
377 hclk200 = mpll / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK200);
378 else
379 hclk200 = armclk / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK200);
380
381 if (__raw_readl(S5P_CLK_SRC0) & S5P_CLKSRC0_MUX166_MASK) {
382 hclk166 = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_A2M);
383 hclk166 = hclk166 / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK166);
384 } else
385 hclk166 = mpll / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK166);
386
387 if (__raw_readl(S5P_CLK_SRC0) & S5P_CLKSRC0_MUX133_MASK) {
388 hclk133 = apll / GET_DIV(clkdiv0, S5P_CLKDIV0_A2M);
389 hclk133 = hclk133 / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK133);
390 } else
391 hclk133 = mpll / GET_DIV(clkdiv0, S5P_CLKDIV0_HCLK133);
392
393 pclk100 = hclk200 / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK100);
394 pclk83 = hclk166 / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK83);
395 pclk66 = hclk133 / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK66);
396
397 printk(KERN_INFO "S5PV210: ARMCLK=%ld, HCLKM=%ld, HCLKD=%ld, \
398 HCLKP=%ld, PCLKM=%ld, PCLKD=%ld, PCLKP=%ld\n",
399 armclk, hclk200, hclk166, hclk133, pclk100, pclk83, pclk66);
400
401 clk_fout_apll.rate = apll;
402 clk_fout_mpll.rate = mpll;
403 clk_fout_epll.rate = epll;
404
405 clk_f.rate = armclk;
406 clk_h.rate = hclk133;
407 clk_p.rate = pclk66;
408 clk_p66.rate = pclk66;
409 clk_p83.rate = pclk83;
410 clk_h133.rate = hclk133;
411 clk_h166.rate = hclk166;
412 clk_h200.rate = hclk200;
413
414 for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++)
415 s3c_set_clksrc(init_parents[ptr], true);
416
417 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
418 s3c_set_clksrc(&clksrcs[ptr], true);
419}
420
421static struct clk *clks[] __initdata = {
422 &clk_mout_epll.clk,
423 &clk_mout_mpll.clk,
424};
425
426void __init s5pv210_register_clocks(void)
427{
428 struct clk *clkp;
429 int ret;
430 int ptr;
431
432 ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
433 if (ret > 0)
434 printk(KERN_ERR "Failed to register %u clocks\n", ret);
435
436 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
437 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
438
439 ret = s3c24xx_register_clocks(sys_clks, ARRAY_SIZE(sys_clks));
440 if (ret > 0)
441 printk(KERN_ERR "Failed to register system clocks\n");
442
443 clkp = init_clocks_disable;
444 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
445 ret = s3c24xx_register_clock(clkp);
446 if (ret < 0) {
447 printk(KERN_ERR "Failed to register clock %s (%d)\n",
448 clkp->name, ret);
449 }
450 (clkp->enable)(clkp, 0);
451 }
452
453 s3c_pwmclk_init();
454}
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
new file mode 100644
index 000000000000..0e0f8fde2aa6
--- /dev/null
+++ b/arch/arm/mach-s5pv210/cpu.c
@@ -0,0 +1,126 @@
1/* linux/arch/arm/mach-s5pv210/cpu.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/interrupt.h>
14#include <linux/list.h>
15#include <linux/timer.h>
16#include <linux/init.h>
17#include <linux/module.h>
18#include <linux/clk.h>
19#include <linux/io.h>
20#include <linux/sysdev.h>
21#include <linux/platform_device.h>
22
23#include <asm/mach/arch.h>
24#include <asm/mach/map.h>
25#include <asm/mach/irq.h>
26
27#include <asm/proc-fns.h>
28#include <mach/map.h>
29#include <mach/regs-clock.h>
30
31#include <plat/cpu.h>
32#include <plat/devs.h>
33#include <plat/clock.h>
34#include <plat/s5pv210.h>
35
36/* Initial IO mappings */
37
38static struct map_desc s5pv210_iodesc[] __initdata = {
39 {
40 .virtual = (unsigned long)S5P_VA_SYSTIMER,
41 .pfn = __phys_to_pfn(S5PV210_PA_SYSTIMER),
42 .length = SZ_1M,
43 .type = MT_DEVICE,
44 }, {
45 .virtual = (unsigned long)VA_VIC2,
46 .pfn = __phys_to_pfn(S5PV210_PA_VIC2),
47 .length = SZ_16K,
48 .type = MT_DEVICE,
49 }, {
50 .virtual = (unsigned long)VA_VIC3,
51 .pfn = __phys_to_pfn(S5PV210_PA_VIC3),
52 .length = SZ_16K,
53 .type = MT_DEVICE,
54 }, {
55 .virtual = (unsigned long)S5P_VA_SROMC,
56 .pfn = __phys_to_pfn(S5PV210_PA_SROMC),
57 .length = SZ_4K,
58 .type = MT_DEVICE,
59 }
60};
61
62static void s5pv210_idle(void)
63{
64 if (!need_resched())
65 cpu_do_idle();
66
67 local_irq_enable();
68}
69
70/* s5pv210_map_io
71 *
72 * register the standard cpu IO areas
73*/
74
75void __init s5pv210_map_io(void)
76{
77 iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc));
78}
79
80void __init s5pv210_init_clocks(int xtal)
81{
82 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
83
84 s3c24xx_register_baseclocks(xtal);
85 s5p_register_clocks(xtal);
86 s5pv210_register_clocks();
87 s5pv210_setup_clocks();
88}
89
90void __init s5pv210_init_irq(void)
91{
92 u32 vic[4]; /* S5PV210 supports 4 VIC */
93
94 /* All the VICs are fully populated. */
95 vic[0] = ~0;
96 vic[1] = ~0;
97 vic[2] = ~0;
98 vic[3] = ~0;
99
100 s5p_init_irq(vic, ARRAY_SIZE(vic));
101}
102
103static struct sysdev_class s5pv210_sysclass = {
104 .name = "s5pv210-core",
105};
106
107static struct sys_device s5pv210_sysdev = {
108 .cls = &s5pv210_sysclass,
109};
110
111static int __init s5pv210_core_init(void)
112{
113 return sysdev_class_register(&s5pv210_sysclass);
114}
115
116core_initcall(s5pv210_core_init);
117
118int __init s5pv210_init(void)
119{
120 printk(KERN_INFO "S5PV210: Initializing architecture\n");
121
122 /* set idle function */
123 pm_idle = s5pv210_idle;
124
125 return sysdev_register(&s5pv210_sysdev);
126}
diff --git a/arch/arm/mach-s5pv210/include/mach/debug-macro.S b/arch/arm/mach-s5pv210/include/mach/debug-macro.S
new file mode 100644
index 000000000000..8aec853310a7
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/debug-macro.S
@@ -0,0 +1,42 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/debug-macro.S
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* pull in the relevant register and map files. */
14
15#include <mach/map.h>
16#include <plat/regs-serial.h>
17
18 /* note, for the boot process to work we have to keep the UART
19 * virtual address aligned to an 1MiB boundary for the L1
20 * mapping the head code makes. We keep the UART virtual address
21 * aligned and add in the offset when we load the value here.
22 */
23
24 .macro addruart, rx
25 mrc p15, 0, \rx, c1, c0
26 tst \rx, #1
27 ldreq \rx, = S3C_PA_UART
28 ldrne \rx, = S3C_VA_UART
29#if CONFIG_DEBUG_S3C_UART != 0
30 add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
31#endif
32 .endm
33
34#define fifo_full fifo_full_s5pv210
35#define fifo_level fifo_level_s5pv210
36
37/* include the reset of the code which will do the work, we're only
38 * compiling for a single cpu processor type so the default of s3c2440
39 * will be fine with us.
40 */
41
42#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
new file mode 100644
index 000000000000..3aa41ac59f07
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/entry-macro.S
@@ -0,0 +1,54 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/entry-macro.S
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Low-level IRQ helper macros for the Samsung S5PV210
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <asm/hardware/vic.h>
14#include <mach/map.h>
15#include <plat/irqs.h>
16
17 .macro disable_fiq
18 .endm
19
20 .macro get_irqnr_preamble, base, tmp
21 ldr \base, =VA_VIC0
22 .endm
23
24 .macro arch_ret_to_user, tmp1, tmp2
25 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28
29 @ check the vic0
30 mov \irqnr, # S5P_IRQ_OFFSET + 31
31 ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
32 teq \irqstat, #0
33
34 @ otherwise try vic1
35 addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
36 addeq \irqnr, \irqnr, #32
37 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
38 teqeq \irqstat, #0
39
40 @ otherwise try vic2
41 addeq \tmp, \base, #(VA_VIC2 - VA_VIC0)
42 addeq \irqnr, \irqnr, #32
43 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
44 teqeq \irqstat, #0
45
46 @ otherwise try vic3
47 addeq \tmp, \base, #(VA_VIC3 - VA_VIC0)
48 addeq \irqnr, \irqnr, #32
49 ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
50 teqeq \irqstat, #0
51
52 clzne \irqstat, \irqstat
53 subne \irqnr, \irqnr, \irqstat
54 .endm
diff --git a/arch/arm/mach-s5pv210/include/mach/gpio.h b/arch/arm/mach-s5pv210/include/mach/gpio.h
new file mode 100644
index 000000000000..533b020e21e9
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/gpio.h
@@ -0,0 +1,129 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/gpio.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - GPIO lib support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_GPIO_H
14#define __ASM_ARCH_GPIO_H __FILE__
15
16#define gpio_get_value __gpio_get_value
17#define gpio_set_value __gpio_set_value
18#define gpio_cansleep __gpio_cansleep
19#define gpio_to_irq __gpio_to_irq
20
21/* GPIO bank sizes */
22#define S5PV210_GPIO_A0_NR (8)
23#define S5PV210_GPIO_A1_NR (4)
24#define S5PV210_GPIO_B_NR (8)
25#define S5PV210_GPIO_C0_NR (5)
26#define S5PV210_GPIO_C1_NR (5)
27#define S5PV210_GPIO_D0_NR (4)
28#define S5PV210_GPIO_D1_NR (6)
29#define S5PV210_GPIO_E0_NR (8)
30#define S5PV210_GPIO_E1_NR (5)
31#define S5PV210_GPIO_F0_NR (8)
32#define S5PV210_GPIO_F1_NR (8)
33#define S5PV210_GPIO_F2_NR (8)
34#define S5PV210_GPIO_F3_NR (6)
35#define S5PV210_GPIO_G0_NR (7)
36#define S5PV210_GPIO_G1_NR (7)
37#define S5PV210_GPIO_G2_NR (7)
38#define S5PV210_GPIO_G3_NR (7)
39#define S5PV210_GPIO_H0_NR (8)
40#define S5PV210_GPIO_H1_NR (8)
41#define S5PV210_GPIO_H2_NR (8)
42#define S5PV210_GPIO_H3_NR (8)
43#define S5PV210_GPIO_I_NR (7)
44#define S5PV210_GPIO_J0_NR (8)
45#define S5PV210_GPIO_J1_NR (6)
46#define S5PV210_GPIO_J2_NR (8)
47#define S5PV210_GPIO_J3_NR (8)
48#define S5PV210_GPIO_J4_NR (5)
49
50/* GPIO bank numbers */
51
52/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
53 * space for debugging purposes so that any accidental
54 * change from one gpio bank to another can be caught.
55*/
56
57#define S5PV210_GPIO_NEXT(__gpio) \
58 ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
59
60enum s5p_gpio_number {
61 S5PV210_GPIO_A0_START = 0,
62 S5PV210_GPIO_A1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_A0),
63 S5PV210_GPIO_B_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_A1),
64 S5PV210_GPIO_C0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_B),
65 S5PV210_GPIO_C1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_C0),
66 S5PV210_GPIO_D0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_C1),
67 S5PV210_GPIO_D1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_D0),
68 S5PV210_GPIO_E0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_D1),
69 S5PV210_GPIO_E1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_E0),
70 S5PV210_GPIO_F0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_E1),
71 S5PV210_GPIO_F1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F0),
72 S5PV210_GPIO_F2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F1),
73 S5PV210_GPIO_F3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F2),
74 S5PV210_GPIO_G0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F3),
75 S5PV210_GPIO_G1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G0),
76 S5PV210_GPIO_G2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G1),
77 S5PV210_GPIO_G3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G2),
78 S5PV210_GPIO_H0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G3),
79 S5PV210_GPIO_H1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H0),
80 S5PV210_GPIO_H2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H1),
81 S5PV210_GPIO_H3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H2),
82 S5PV210_GPIO_I_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H3),
83 S5PV210_GPIO_J0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_I),
84 S5PV210_GPIO_J1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J0),
85 S5PV210_GPIO_J2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J1),
86 S5PV210_GPIO_J3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J2),
87 S5PV210_GPIO_J4_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J3),
88};
89
90/* S5PV210 GPIO number definitions */
91#define S5PV210_GPA0(_nr) (S5PV210_GPIO_A0_START + (_nr))
92#define S5PV210_GPA1(_nr) (S5PV210_GPIO_A1_START + (_nr))
93#define S5PV210_GPB(_nr) (S5PV210_GPIO_B_START + (_nr))
94#define S5PV210_GPC0(_nr) (S5PV210_GPIO_C0_START + (_nr))
95#define S5PV210_GPC1(_nr) (S5PV210_GPIO_C1_START + (_nr))
96#define S5PV210_GPD0(_nr) (S5PV210_GPIO_D0_START + (_nr))
97#define S5PV210_GPD1(_nr) (S5PV210_GPIO_D1_START + (_nr))
98#define S5PV210_GPE0(_nr) (S5PV210_GPIO_E0_START + (_nr))
99#define S5PV210_GPE1(_nr) (S5PV210_GPIO_E1_START + (_nr))
100#define S5PV210_GPF0(_nr) (S5PV210_GPIO_F0_START + (_nr))
101#define S5PV210_GPF1(_nr) (S5PV210_GPIO_F1_START + (_nr))
102#define S5PV210_GPF2(_nr) (S5PV210_GPIO_F2_START + (_nr))
103#define S5PV210_GPF3(_nr) (S5PV210_GPIO_F3_START + (_nr))
104#define S5PV210_GPG0(_nr) (S5PV210_GPIO_G0_START + (_nr))
105#define S5PV210_GPG1(_nr) (S5PV210_GPIO_G1_START + (_nr))
106#define S5PV210_GPG2(_nr) (S5PV210_GPIO_G2_START + (_nr))
107#define S5PV210_GPG3(_nr) (S5PV210_GPIO_G3_START + (_nr))
108#define S5PV210_GPH0(_nr) (S5PV210_GPIO_H0_START + (_nr))
109#define S5PV210_GPH1(_nr) (S5PV210_GPIO_H1_START + (_nr))
110#define S5PV210_GPH2(_nr) (S5PV210_GPIO_H2_START + (_nr))
111#define S5PV210_GPH3(_nr) (S5PV210_GPIO_H3_START + (_nr))
112#define S5PV210_GPI(_nr) (S5PV210_GPIO_I_START + (_nr))
113#define S5PV210_GPJ0(_nr) (S5PV210_GPIO_J0_START + (_nr))
114#define S5PV210_GPJ1(_nr) (S5PV210_GPIO_J1_START + (_nr))
115#define S5PV210_GPJ2(_nr) (S5PV210_GPIO_J2_START + (_nr))
116#define S5PV210_GPJ3(_nr) (S5PV210_GPIO_J3_START + (_nr))
117#define S5PV210_GPJ4(_nr) (S5PV210_GPIO_J4_START + (_nr))
118
119/* the end of the S5PV210 specific gpios */
120#define S5PV210_GPIO_END (S5PV210_GPJ4(S5PV210_GPIO_J4_NR) + 1)
121#define S3C_GPIO_END S5PV210_GPIO_END
122
123/* define the number of gpios we need to the one after the GPJ4() range */
124#define ARCH_NR_GPIOS (S5PV210_GPJ4(S5PV210_GPIO_J4_NR) + \
125 CONFIG_SAMSUNG_GPIO_EXTRA + 1)
126
127#include <asm-generic/gpio.h>
128
129#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/hardware.h b/arch/arm/mach-s5pv210/include/mach/hardware.h
new file mode 100644
index 000000000000..fada7a392d09
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/hardware.h
@@ -0,0 +1,18 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/hardware.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - Hardware support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_HARDWARE_H
14#define __ASM_ARCH_HARDWARE_H __FILE__
15
16/* currently nothing here, placeholder */
17
18#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/io.h b/arch/arm/mach-s5pv210/include/mach/io.h
new file mode 100644
index 000000000000..5ab9d560bc86
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/io.h
@@ -0,0 +1,26 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/io.h
2 *
3 * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
4 *
5 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com/
7 *
8 * Based on arch/arm/mach-s5p6442/include/mach/io.h
9 *
10 * Default IO routines for S5PV210
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15*/
16
17#ifndef __ASM_ARM_ARCH_IO_H
18#define __ASM_ARM_ARCH_IO_H __FILE__
19
20/* No current ISA/PCI bus support. */
21#define __io(a) __typesafe_io(a)
22#define __mem_pci(a) (a)
23
24#define IO_SPACE_LIMIT (0xFFFFFFFF)
25
26#endif /* __ASM_ARM_ARCH_IO_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
new file mode 100644
index 000000000000..62c5175ef291
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -0,0 +1,146 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/irqs.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - IRQ definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_IRQS_H
14#define __ASM_ARCH_IRQS_H __FILE__
15
16#include <plat/irqs.h>
17
18/* VIC0: System, DMA, Timer */
19
20#define IRQ_EINT0 S5P_IRQ_VIC0(0)
21#define IRQ_EINT1 S5P_IRQ_VIC0(1)
22#define IRQ_EINT2 S5P_IRQ_VIC0(2)
23#define IRQ_EINT3 S5P_IRQ_VIC0(3)
24#define IRQ_EINT4 S5P_IRQ_VIC0(4)
25#define IRQ_EINT5 S5P_IRQ_VIC0(5)
26#define IRQ_EINT6 S5P_IRQ_VIC0(6)
27#define IRQ_EINT7 S5P_IRQ_VIC0(7)
28#define IRQ_EINT8 S5P_IRQ_VIC0(8)
29#define IRQ_EINT9 S5P_IRQ_VIC0(9)
30#define IRQ_EINT10 S5P_IRQ_VIC0(10)
31#define IRQ_EINT11 S5P_IRQ_VIC0(11)
32#define IRQ_EINT12 S5P_IRQ_VIC0(12)
33#define IRQ_EINT13 S5P_IRQ_VIC0(13)
34#define IRQ_EINT14 S5P_IRQ_VIC0(14)
35#define IRQ_EINT15 S5P_IRQ_VIC0(15)
36#define IRQ_EINT16_31 S5P_IRQ_VIC0(16)
37#define IRQ_BATF S5P_IRQ_VIC0(17)
38#define IRQ_MDMA S5P_IRQ_VIC0(18)
39#define IRQ_PDMA0 S5P_IRQ_VIC0(19)
40#define IRQ_PDMA1 S5P_IRQ_VIC0(20)
41#define IRQ_TIMER0_VIC S5P_IRQ_VIC0(21)
42#define IRQ_TIMER1_VIC S5P_IRQ_VIC0(22)
43#define IRQ_TIMER2_VIC S5P_IRQ_VIC0(23)
44#define IRQ_TIMER3_VIC S5P_IRQ_VIC0(24)
45#define IRQ_TIMER4_VIC S5P_IRQ_VIC0(25)
46#define IRQ_SYSTIMER S5P_IRQ_VIC0(26)
47#define IRQ_WDT S5P_IRQ_VIC0(27)
48#define IRQ_RTC_ALARM S5P_IRQ_VIC0(28)
49#define IRQ_RTC_TIC S5P_IRQ_VIC0(29)
50#define IRQ_GPIOINT S5P_IRQ_VIC0(30)
51#define IRQ_FIMC3 S5P_IRQ_VIC0(31)
52
53/* VIC1: ARM, Power, Memory, Connectivity, Storage */
54
55#define IRQ_CORTEX0 S5P_IRQ_VIC1(0)
56#define IRQ_CORTEX1 S5P_IRQ_VIC1(1)
57#define IRQ_CORTEX2 S5P_IRQ_VIC1(2)
58#define IRQ_CORTEX3 S5P_IRQ_VIC1(3)
59#define IRQ_CORTEX4 S5P_IRQ_VIC1(4)
60#define IRQ_IEMAPC S5P_IRQ_VIC1(5)
61#define IRQ_IEMIEC S5P_IRQ_VIC1(6)
62#define IRQ_ONENAND S5P_IRQ_VIC1(7)
63#define IRQ_NFC S5P_IRQ_VIC1(8)
64#define IRQ_CFC S5P_IRQ_VIC1(9)
65#define IRQ_UART0 S5P_IRQ_VIC1(10)
66#define IRQ_UART1 S5P_IRQ_VIC1(11)
67#define IRQ_UART2 S5P_IRQ_VIC1(12)
68#define IRQ_UART3 S5P_IRQ_VIC1(13)
69#define IRQ_IIC S5P_IRQ_VIC1(14)
70#define IRQ_SPI0 S5P_IRQ_VIC1(15)
71#define IRQ_SPI1 S5P_IRQ_VIC1(16)
72#define IRQ_SPI2 S5P_IRQ_VIC1(17)
73#define IRQ_IRDA S5P_IRQ_VIC1(18)
74#define IRQ_CAN0 S5P_IRQ_VIC1(19)
75#define IRQ_CAN1 S5P_IRQ_VIC1(20)
76#define IRQ_HSIRX S5P_IRQ_VIC1(21)
77#define IRQ_HSITX S5P_IRQ_VIC1(22)
78#define IRQ_UHOST S5P_IRQ_VIC1(23)
79#define IRQ_OTG S5P_IRQ_VIC1(24)
80#define IRQ_MSM S5P_IRQ_VIC1(25)
81#define IRQ_HSMMC0 S5P_IRQ_VIC1(26)
82#define IRQ_HSMMC1 S5P_IRQ_VIC1(27)
83#define IRQ_HSMMC2 S5P_IRQ_VIC1(28)
84#define IRQ_MIPICSI S5P_IRQ_VIC1(29)
85#define IRQ_MIPIDSI S5P_IRQ_VIC1(30)
86#define IRQ_ONENAND_AUDI S5P_IRQ_VIC1(31)
87
88/* VIC2: Multimedia, Audio, Security */
89
90#define IRQ_LCD0 S5P_IRQ_VIC2(0)
91#define IRQ_LCD1 S5P_IRQ_VIC2(1)
92#define IRQ_LCD2 S5P_IRQ_VIC2(2)
93#define IRQ_LCD3 S5P_IRQ_VIC2(3)
94#define IRQ_ROTATOR S5P_IRQ_VIC2(4)
95#define IRQ_FIMC0 S5P_IRQ_VIC2(5)
96#define IRQ_FIMC1 S5P_IRQ_VIC2(6)
97#define IRQ_FIMC2 S5P_IRQ_VIC2(7)
98#define IRQ_JPEG S5P_IRQ_VIC2(8)
99#define IRQ_2D S5P_IRQ_VIC2(9)
100#define IRQ_3D S5P_IRQ_VIC2(10)
101#define IRQ_MIXER S5P_IRQ_VIC2(11)
102#define IRQ_HDMI S5P_IRQ_VIC2(12)
103#define IRQ_IIC1 S5P_IRQ_VIC2(13)
104#define IRQ_MFC S5P_IRQ_VIC2(14)
105#define IRQ_TVENC S5P_IRQ_VIC2(15)
106#define IRQ_I2S0 S5P_IRQ_VIC2(16)
107#define IRQ_I2S1 S5P_IRQ_VIC2(17)
108#define IRQ_I2S2 S5P_IRQ_VIC2(18)
109#define IRQ_AC97 S5P_IRQ_VIC2(19)
110#define IRQ_PCM0 S5P_IRQ_VIC2(20)
111#define IRQ_PCM1 S5P_IRQ_VIC2(21)
112#define IRQ_SPDIF S5P_IRQ_VIC2(22)
113#define IRQ_ADC S5P_IRQ_VIC2(23)
114#define IRQ_PENDN S5P_IRQ_VIC2(24)
115#define IRQ_TC IRQ_PENDN
116#define IRQ_KEYPAD S5P_IRQ_VIC2(25)
117#define IRQ_CG S5P_IRQ_VIC2(26)
118#define IRQ_SEC S5P_IRQ_VIC2(27)
119#define IRQ_SECRX S5P_IRQ_VIC2(28)
120#define IRQ_SECTX S5P_IRQ_VIC2(29)
121#define IRQ_SDMIRQ S5P_IRQ_VIC2(30)
122#define IRQ_SDMFIQ S5P_IRQ_VIC2(31)
123
124/* VIC3: Etc */
125
126#define IRQ_IPC S5P_IRQ_VIC3(0)
127#define IRQ_HOSTIF S5P_IRQ_VIC3(1)
128#define IRQ_MMC3 S5P_IRQ_VIC3(2)
129#define IRQ_CEC S5P_IRQ_VIC3(3)
130#define IRQ_TSI S5P_IRQ_VIC3(4)
131#define IRQ_MDNIE0 S5P_IRQ_VIC3(5)
132#define IRQ_MDNIE1 S5P_IRQ_VIC3(6)
133#define IRQ_MDNIE2 S5P_IRQ_VIC3(7)
134#define IRQ_MDNIE3 S5P_IRQ_VIC3(8)
135#define IRQ_VIC_END S5P_IRQ_VIC3(31)
136
137#define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1)
138
139#define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE)
140#define IRQ_EINT(x) S5P_EINT(x)
141
142/* Set the default NR_IRQS */
143
144#define NR_IRQS (IRQ_EINT(31) + 1)
145
146#endif /* ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
new file mode 100644
index 000000000000..c22694c8231f
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -0,0 +1,65 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/map.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_MAP_H
14#define __ASM_ARCH_MAP_H __FILE__
15
16#include <plat/map-base.h>
17#include <plat/map-s5p.h>
18
19#define S5PV210_PA_CHIPID (0xE0000000)
20#define S5P_PA_CHIPID S5PV210_PA_CHIPID
21
22#define S5PV210_PA_SYSCON (0xE0100000)
23#define S5P_PA_SYSCON S5PV210_PA_SYSCON
24
25#define S5PV210_PA_GPIO (0xE0200000)
26#define S5P_PA_GPIO S5PV210_PA_GPIO
27
28#define S5PV210_PA_IIC0 (0xE1800000)
29
30#define S5PV210_PA_TIMER (0xE2500000)
31#define S5P_PA_TIMER S5PV210_PA_TIMER
32
33#define S5PV210_PA_SYSTIMER (0xE2600000)
34
35#define S5PV210_PA_UART (0xE2900000)
36
37#define S5P_PA_UART0 (S5PV210_PA_UART + 0x0)
38#define S5P_PA_UART1 (S5PV210_PA_UART + 0x400)
39#define S5P_PA_UART2 (S5PV210_PA_UART + 0x800)
40#define S5P_PA_UART3 (S5PV210_PA_UART + 0xC00)
41
42#define S5P_SZ_UART SZ_256
43
44#define S5PV210_PA_SROMC (0xE8000000)
45
46#define S5PV210_PA_VIC0 (0xF2000000)
47#define S5P_PA_VIC0 S5PV210_PA_VIC0
48
49#define S5PV210_PA_VIC1 (0xF2100000)
50#define S5P_PA_VIC1 S5PV210_PA_VIC1
51
52#define S5PV210_PA_VIC2 (0xF2200000)
53#define S5P_PA_VIC2 S5PV210_PA_VIC2
54
55#define S5PV210_PA_VIC3 (0xF2300000)
56#define S5P_PA_VIC3 S5PV210_PA_VIC3
57
58#define S5PV210_PA_SDRAM (0x20000000)
59#define S5P_PA_SDRAM S5PV210_PA_SDRAM
60
61/* compatibiltiy defines. */
62#define S3C_PA_UART S5PV210_PA_UART
63#define S3C_PA_IIC S5PV210_PA_IIC0
64
65#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/memory.h b/arch/arm/mach-s5pv210/include/mach/memory.h
new file mode 100644
index 000000000000..379117e27600
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/memory.h
@@ -0,0 +1,23 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/memory.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - Memory definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_MEMORY_H
14#define __ASM_ARCH_MEMORY_H
15
16#define PHYS_OFFSET UL(0x20000000)
17#define CONSISTENT_DMA_SIZE (SZ_8M + SZ_4M + SZ_2M)
18
19/* Maximum of 256MiB in one bank */
20#define MAX_PHYSMEM_BITS 32
21#define SECTION_SIZE_BITS 28
22
23#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/pwm-clock.h b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
new file mode 100644
index 000000000000..69027fea987a
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
@@ -0,0 +1,69 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/pwm-clock.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
8 * http://www.samsung.com/
9 *
10 * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
11 *
12 * S5PV210 - pwm clock and timer support
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17*/
18
19#ifndef __ASM_ARCH_PWMCLK_H
20#define __ASM_ARCH_PWMCLK_H __FILE__
21
22/**
23 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
24 * @cfg: The timer TCFG1 register bits shifted down to 0.
25 *
26 * Return true if the given configuration from TCFG1 is a TCLK instead
27 * any of the TDIV clocks.
28 */
29static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
30{
31 return tcfg == S3C2410_TCFG1_MUX_TCLK;
32}
33
34/**
35 * tcfg_to_divisor() - convert tcfg1 setting to a divisor
36 * @tcfg1: The tcfg1 setting, shifted down.
37 *
38 * Get the divisor value for the given tcfg1 setting. We assume the
39 * caller has already checked to see if this is not a TCLK source.
40 */
41static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
42{
43 return 1 << (1 + tcfg1);
44}
45
46/**
47 * pwm_tdiv_has_div1() - does the tdiv setting have a /1
48 *
49 * Return true if we have a /1 in the tdiv setting.
50 */
51static inline unsigned int pwm_tdiv_has_div1(void)
52{
53 return 0;
54}
55
56/**
57 * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
58 * @div: The divisor to calculate the bit information for.
59 *
60 * Turn a divisor into the necessary bit field for TCFG1.
61 */
62static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
63{
64 return ilog2(div) - 1;
65}
66
67#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK
68
69#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
new file mode 100644
index 000000000000..e56e0e4673ed
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
@@ -0,0 +1,169 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/regs-clock.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - Clock register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_CLOCK_H
14#define __ASM_ARCH_REGS_CLOCK_H __FILE__
15
16#include <mach/map.h>
17
18#define S5P_CLKREG(x) (S3C_VA_SYS + (x))
19
20#define S5P_APLL_LOCK S5P_CLKREG(0x00)
21#define S5P_MPLL_LOCK S5P_CLKREG(0x08)
22#define S5P_EPLL_LOCK S5P_CLKREG(0x10)
23#define S5P_VPLL_LOCK S5P_CLKREG(0x20)
24
25#define S5P_APLL_CON S5P_CLKREG(0x100)
26#define S5P_MPLL_CON S5P_CLKREG(0x108)
27#define S5P_EPLL_CON S5P_CLKREG(0x110)
28#define S5P_VPLL_CON S5P_CLKREG(0x120)
29
30#define S5P_CLK_SRC0 S5P_CLKREG(0x200)
31#define S5P_CLK_SRC1 S5P_CLKREG(0x204)
32#define S5P_CLK_SRC2 S5P_CLKREG(0x208)
33#define S5P_CLK_SRC3 S5P_CLKREG(0x20C)
34#define S5P_CLK_SRC4 S5P_CLKREG(0x210)
35#define S5P_CLK_SRC5 S5P_CLKREG(0x214)
36#define S5P_CLK_SRC6 S5P_CLKREG(0x218)
37
38#define S5P_CLK_SRC_MASK0 S5P_CLKREG(0x280)
39#define S5P_CLK_SRC_MASK1 S5P_CLKREG(0x284)
40
41#define S5P_CLK_DIV0 S5P_CLKREG(0x300)
42#define S5P_CLK_DIV1 S5P_CLKREG(0x304)
43#define S5P_CLK_DIV2 S5P_CLKREG(0x308)
44#define S5P_CLK_DIV3 S5P_CLKREG(0x30C)
45#define S5P_CLK_DIV4 S5P_CLKREG(0x310)
46#define S5P_CLK_DIV5 S5P_CLKREG(0x314)
47#define S5P_CLK_DIV6 S5P_CLKREG(0x318)
48#define S5P_CLK_DIV7 S5P_CLKREG(0x31C)
49
50#define S5P_CLKGATE_MAIN0 S5P_CLKREG(0x400)
51#define S5P_CLKGATE_MAIN1 S5P_CLKREG(0x404)
52#define S5P_CLKGATE_MAIN2 S5P_CLKREG(0x408)
53
54#define S5P_CLKGATE_PERI0 S5P_CLKREG(0x420)
55#define S5P_CLKGATE_PERI1 S5P_CLKREG(0x424)
56
57#define S5P_CLKGATE_SCLK0 S5P_CLKREG(0x440)
58#define S5P_CLKGATE_SCLK1 S5P_CLKREG(0x444)
59#define S5P_CLKGATE_IP0 S5P_CLKREG(0x460)
60#define S5P_CLKGATE_IP1 S5P_CLKREG(0x464)
61#define S5P_CLKGATE_IP2 S5P_CLKREG(0x468)
62#define S5P_CLKGATE_IP3 S5P_CLKREG(0x46C)
63#define S5P_CLKGATE_IP4 S5P_CLKREG(0x470)
64
65#define S5P_CLKGATE_BLOCK S5P_CLKREG(0x480)
66#define S5P_CLKGATE_BUS0 S5P_CLKREG(0x484)
67#define S5P_CLKGATE_BUS1 S5P_CLKREG(0x488)
68#define S5P_CLK_OUT S5P_CLKREG(0x500)
69
70/* CLKSRC0 */
71#define S5P_CLKSRC0_MUX200_MASK (0x1<<16)
72#define S5P_CLKSRC0_MUX166_MASK (0x1<<20)
73#define S5P_CLKSRC0_MUX133_MASK (0x1<<24)
74
75/* CLKDIV0 */
76#define S5P_CLKDIV0_APLL_SHIFT (0)
77#define S5P_CLKDIV0_APLL_MASK (0x7 << S5P_CLKDIV0_APLL_SHIFT)
78#define S5P_CLKDIV0_A2M_SHIFT (4)
79#define S5P_CLKDIV0_A2M_MASK (0x7 << S5P_CLKDIV0_A2M_SHIFT)
80#define S5P_CLKDIV0_HCLK200_SHIFT (8)
81#define S5P_CLKDIV0_HCLK200_MASK (0x7 << S5P_CLKDIV0_HCLK200_SHIFT)
82#define S5P_CLKDIV0_PCLK100_SHIFT (12)
83#define S5P_CLKDIV0_PCLK100_MASK (0x7 << S5P_CLKDIV0_PCLK100_SHIFT)
84#define S5P_CLKDIV0_HCLK166_SHIFT (16)
85#define S5P_CLKDIV0_HCLK166_MASK (0xF << S5P_CLKDIV0_HCLK166_SHIFT)
86#define S5P_CLKDIV0_PCLK83_SHIFT (20)
87#define S5P_CLKDIV0_PCLK83_MASK (0x7 << S5P_CLKDIV0_PCLK83_SHIFT)
88#define S5P_CLKDIV0_HCLK133_SHIFT (24)
89#define S5P_CLKDIV0_HCLK133_MASK (0xF << S5P_CLKDIV0_HCLK133_SHIFT)
90#define S5P_CLKDIV0_PCLK66_SHIFT (28)
91#define S5P_CLKDIV0_PCLK66_MASK (0x7 << S5P_CLKDIV0_PCLK66_SHIFT)
92
93/* Registers related to power management */
94#define S5P_PWR_CFG S5P_CLKREG(0xC000)
95#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0xC004)
96#define S5P_WAKEUP_MASK S5P_CLKREG(0xC008)
97#define S5P_PWR_MODE S5P_CLKREG(0xC00C)
98#define S5P_NORMAL_CFG S5P_CLKREG(0xC010)
99#define S5P_IDLE_CFG S5P_CLKREG(0xC020)
100#define S5P_STOP_CFG S5P_CLKREG(0xC030)
101#define S5P_STOP_MEM_CFG S5P_CLKREG(0xC034)
102#define S5P_SLEEP_CFG S5P_CLKREG(0xC040)
103
104#define S5P_OSC_FREQ S5P_CLKREG(0xC100)
105#define S5P_OSC_STABLE S5P_CLKREG(0xC104)
106#define S5P_PWR_STABLE S5P_CLKREG(0xC108)
107#define S5P_MTC_STABLE S5P_CLKREG(0xC110)
108#define S5P_CLAMP_STABLE S5P_CLKREG(0xC114)
109
110#define S5P_WAKEUP_STAT S5P_CLKREG(0xC200)
111#define S5P_BLK_PWR_STAT S5P_CLKREG(0xC204)
112
113#define S5P_OTHERS S5P_CLKREG(0xE000)
114#define S5P_OM_STAT S5P_CLKREG(0xE100)
115#define S5P_USB_PHY_CONTROL S5P_CLKREG(0xE80C)
116#define S5P_DAC_CONTROL S5P_CLKREG(0xE810)
117
118#define S5P_INFORM0 S5P_CLKREG(0xF000)
119#define S5P_INFORM1 S5P_CLKREG(0xF004)
120#define S5P_INFORM2 S5P_CLKREG(0xF008)
121#define S5P_INFORM3 S5P_CLKREG(0xF00C)
122#define S5P_INFORM4 S5P_CLKREG(0xF010)
123#define S5P_INFORM5 S5P_CLKREG(0xF014)
124#define S5P_INFORM6 S5P_CLKREG(0xF018)
125#define S5P_INFORM7 S5P_CLKREG(0xF01C)
126
127#define S5P_RST_STAT S5P_CLKREG(0xA000)
128#define S5P_OSC_CON S5P_CLKREG(0x8000)
129#define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200)
130#define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204)
131#define S5P_MIPI_CONTROL S5P_CLKREG(0xE814)
132
133#define S5P_IDLE_CFG_TL_MASK (3 << 30)
134#define S5P_IDLE_CFG_TM_MASK (3 << 28)
135#define S5P_IDLE_CFG_TL_ON (2 << 30)
136#define S5P_IDLE_CFG_TM_ON (2 << 28)
137#define S5P_IDLE_CFG_DIDLE (1 << 0)
138
139#define S5P_CFG_WFI_CLEAN (~(3 << 8))
140#define S5P_CFG_WFI_IDLE (1 << 8)
141#define S5P_CFG_WFI_STOP (2 << 8)
142#define S5P_CFG_WFI_SLEEP (3 << 8)
143
144#define S5P_OTHER_SYS_INT 24
145#define S5P_OTHER_STA_TYPE 23
146#define S5P_OTHER_SYSC_INTOFF (1 << 0)
147#define STA_TYPE_EXPON 0
148#define STA_TYPE_SFR 1
149
150#define S5P_PWR_STA_EXP_SCALE 0
151#define S5P_PWR_STA_CNT 4
152
153#define S5P_PWR_STABLE_COUNT 85500
154
155#define S5P_SLEEP_CFG_OSC_EN (1 << 0)
156#define S5P_SLEEP_CFG_USBOSC_EN (1 << 1)
157
158/* OTHERS Resgister */
159#define S5P_OTHERS_USB_SIG_MASK (1 << 16)
160#define S5P_OTHERS_MIPI_DPHY_EN (1 << 28)
161
162/* MIPI */
163#define S5P_MIPI_DPHY_EN (3)
164
165/* S5P_DAC_CONTROL */
166#define S5P_DAC_ENABLE (1)
167#define S5P_DAC_DISABLE (0)
168
169#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-irq.h b/arch/arm/mach-s5pv210/include/mach/regs-irq.h
new file mode 100644
index 000000000000..5c3b104a7c86
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/regs-irq.h
@@ -0,0 +1,19 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/regs-irq.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - IRQ register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_IRQ_H
14#define __ASM_ARCH_REGS_IRQ_H __FILE__
15
16#include <asm/hardware/vic.h>
17#include <mach/map.h>
18
19#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h
new file mode 100644
index 000000000000..1ca04d5025b3
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/system.h
@@ -0,0 +1,26 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/system.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - system support header
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_SYSTEM_H
14#define __ASM_ARCH_SYSTEM_H __FILE__
15
16static void arch_idle(void)
17{
18 /* nothing here yet */
19}
20
21static void arch_reset(char mode, const char *cmd)
22{
23 /* nothing here yet */
24}
25
26#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/tick.h b/arch/arm/mach-s5pv210/include/mach/tick.h
new file mode 100644
index 000000000000..7993b3603ccf
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/tick.h
@@ -0,0 +1,26 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/tick.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Based on arch/arm/mach-s3c6400/include/mach/tick.h
7 *
8 * S5PV210 - Timer tick support definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_TICK_H
16#define __ASM_ARCH_TICK_H __FILE__
17
18static inline u32 s3c24xx_ostimer_pending(void)
19{
20 u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
21 return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
22}
23
24#define TICK_MAX (0xffffffff)
25
26#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/timex.h b/arch/arm/mach-s5pv210/include/mach/timex.h
new file mode 100644
index 000000000000..73dc85496a83
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/timex.h
@@ -0,0 +1,29 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/timex.h
2 *
3 * Copyright (c) 2003-2010 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
7 * http://www.samsung.com/
8 *
9 * Based on arch/arm/mach-s5p6442/include/mach/timex.h
10 *
11 * S5PV210 - time parameters
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16*/
17
18#ifndef __ASM_ARCH_TIMEX_H
19#define __ASM_ARCH_TIMEX_H __FILE__
20
21/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
22 * a variable is useless. It seems as long as we make our timers an
23 * exact multiple of HZ, any value that makes a 1->1 correspondence
24 * for the time conversion functions to/from jiffies is acceptable.
25*/
26
27#define CLOCK_TICK_RATE 12000000
28
29#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/uncompress.h b/arch/arm/mach-s5pv210/include/mach/uncompress.h
new file mode 100644
index 000000000000..08ff2fda1fb9
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/uncompress.h
@@ -0,0 +1,24 @@
1/* linux/arch/arm/mach-s5pv210/include/mach/uncompress.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - uncompress code
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_UNCOMPRESS_H
14#define __ASM_ARCH_UNCOMPRESS_H
15
16#include <mach/map.h>
17#include <plat/uncompress.h>
18
19static void arch_detect_cpu(void)
20{
21 /* we do not need to do any cpu detection here at the moment. */
22}
23
24#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/vmalloc.h b/arch/arm/mach-s5pv210/include/mach/vmalloc.h
new file mode 100644
index 000000000000..58f515e0747e
--- /dev/null
+++ b/arch/arm/mach-s5pv210/include/mach/vmalloc.h
@@ -0,0 +1,22 @@
1/* linux/arch/arm/mach-s5p6442/include/mach/vmalloc.h
2 *
3 * Copyright 2010 Ben Dooks <ben-linux@fluff.org>
4 *
5 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com/
7 *
8 * Based on arch/arm/mach-s5p6442/include/mach/vmalloc.h
9 *
10 * S5PV210 vmalloc definition
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15*/
16
17#ifndef __ASM_ARCH_VMALLOC_H
18#define __ASM_ARCH_VMALLOC_H __FILE__
19
20#define VMALLOC_END (0xE0000000)
21
22#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-s5pv210/init.c b/arch/arm/mach-s5pv210/init.c
new file mode 100644
index 000000000000..4865ae2c475a
--- /dev/null
+++ b/arch/arm/mach-s5pv210/init.c
@@ -0,0 +1,44 @@
1/* linux/arch/arm/mach-s5pv210/init.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/serial_core.h>
15
16#include <plat/cpu.h>
17#include <plat/devs.h>
18#include <plat/s5pv210.h>
19#include <plat/regs-serial.h>
20
21static struct s3c24xx_uart_clksrc s5pv210_serial_clocks[] = {
22 [0] = {
23 .name = "pclk",
24 .divisor = 1,
25 .min_baud = 0,
26 .max_baud = 0,
27 },
28};
29
30/* uart registration process */
31void __init s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
32{
33 struct s3c2410_uartcfg *tcfg = cfg;
34 u32 ucnt;
35
36 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
37 if (!tcfg->clocks) {
38 tcfg->clocks = s5pv210_serial_clocks;
39 tcfg->clocks_size = ARRAY_SIZE(s5pv210_serial_clocks);
40 }
41 }
42
43 s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
44}
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
new file mode 100644
index 000000000000..ab4869df30c0
--- /dev/null
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -0,0 +1,98 @@
1/* linux/arch/arm/mach-s5pv210/mach-smdkc110.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/serial_core.h>
15
16#include <asm/mach/arch.h>
17#include <asm/mach/map.h>
18#include <asm/setup.h>
19#include <asm/mach-types.h>
20
21#include <mach/map.h>
22#include <mach/regs-clock.h>
23
24#include <plat/regs-serial.h>
25#include <plat/s5pv210.h>
26#include <plat/devs.h>
27#include <plat/cpu.h>
28
29/* Following are default values for UCON, ULCON and UFCON UART registers */
30#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
31 S3C2410_UCON_RXILEVEL | \
32 S3C2410_UCON_TXIRQMODE | \
33 S3C2410_UCON_RXIRQMODE | \
34 S3C2410_UCON_RXFIFO_TOI | \
35 S3C2443_UCON_RXERR_IRQEN)
36
37#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8
38
39#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
40 S5PV210_UFCON_TXTRIG4 | \
41 S5PV210_UFCON_RXTRIG4)
42
43static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
44 [0] = {
45 .hwport = 0,
46 .flags = 0,
47 .ucon = S5PV210_UCON_DEFAULT,
48 .ulcon = S5PV210_ULCON_DEFAULT,
49 .ufcon = S5PV210_UFCON_DEFAULT,
50 },
51 [1] = {
52 .hwport = 1,
53 .flags = 0,
54 .ucon = S5PV210_UCON_DEFAULT,
55 .ulcon = S5PV210_ULCON_DEFAULT,
56 .ufcon = S5PV210_UFCON_DEFAULT,
57 },
58 [2] = {
59 .hwport = 2,
60 .flags = 0,
61 .ucon = S5PV210_UCON_DEFAULT,
62 .ulcon = S5PV210_ULCON_DEFAULT,
63 .ufcon = S5PV210_UFCON_DEFAULT,
64 },
65 [3] = {
66 .hwport = 3,
67 .flags = 0,
68 .ucon = S5PV210_UCON_DEFAULT,
69 .ulcon = S5PV210_ULCON_DEFAULT,
70 .ufcon = S5PV210_UFCON_DEFAULT,
71 },
72};
73
74static struct platform_device *smdkc110_devices[] __initdata = {
75};
76
77static void __init smdkc110_map_io(void)
78{
79 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
80 s3c24xx_init_clocks(24000000);
81 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
82}
83
84static void __init smdkc110_machine_init(void)
85{
86 platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices));
87}
88
89MACHINE_START(SMDKC110, "SMDKC110")
90 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
91 .phys_io = S3C_PA_UART & 0xfff00000,
92 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
93 .boot_params = S5P_PA_SDRAM + 0x100,
94 .init_irq = s5pv210_init_irq,
95 .map_io = smdkc110_map_io,
96 .init_machine = smdkc110_machine_init,
97 .timer = &s3c24xx_timer,
98MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
new file mode 100644
index 000000000000..a27883253204
--- /dev/null
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -0,0 +1,98 @@
1/* linux/arch/arm/mach-s5pv210/mach-smdkv210.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/serial_core.h>
15
16#include <asm/mach/arch.h>
17#include <asm/mach/map.h>
18#include <asm/setup.h>
19#include <asm/mach-types.h>
20
21#include <mach/map.h>
22#include <mach/regs-clock.h>
23
24#include <plat/regs-serial.h>
25#include <plat/s5pv210.h>
26#include <plat/devs.h>
27#include <plat/cpu.h>
28
29/* Following are default values for UCON, ULCON and UFCON UART registers */
30#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
31 S3C2410_UCON_RXILEVEL | \
32 S3C2410_UCON_TXIRQMODE | \
33 S3C2410_UCON_RXIRQMODE | \
34 S3C2410_UCON_RXFIFO_TOI | \
35 S3C2443_UCON_RXERR_IRQEN)
36
37#define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8
38
39#define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
40 S5PV210_UFCON_TXTRIG4 | \
41 S5PV210_UFCON_RXTRIG4)
42
43static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
44 [0] = {
45 .hwport = 0,
46 .flags = 0,
47 .ucon = S5PV210_UCON_DEFAULT,
48 .ulcon = S5PV210_ULCON_DEFAULT,
49 .ufcon = S5PV210_UFCON_DEFAULT,
50 },
51 [1] = {
52 .hwport = 1,
53 .flags = 0,
54 .ucon = S5PV210_UCON_DEFAULT,
55 .ulcon = S5PV210_ULCON_DEFAULT,
56 .ufcon = S5PV210_UFCON_DEFAULT,
57 },
58 [2] = {
59 .hwport = 2,
60 .flags = 0,
61 .ucon = S5PV210_UCON_DEFAULT,
62 .ulcon = S5PV210_ULCON_DEFAULT,
63 .ufcon = S5PV210_UFCON_DEFAULT,
64 },
65 [3] = {
66 .hwport = 3,
67 .flags = 0,
68 .ucon = S5PV210_UCON_DEFAULT,
69 .ulcon = S5PV210_ULCON_DEFAULT,
70 .ufcon = S5PV210_UFCON_DEFAULT,
71 },
72};
73
74static struct platform_device *smdkv210_devices[] __initdata = {
75};
76
77static void __init smdkv210_map_io(void)
78{
79 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
80 s3c24xx_init_clocks(24000000);
81 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
82}
83
84static void __init smdkv210_machine_init(void)
85{
86 platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
87}
88
89MACHINE_START(SMDKV210, "SMDKV210")
90 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
91 .phys_io = S3C_PA_UART & 0xfff00000,
92 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
93 .boot_params = S5P_PA_SDRAM + 0x100,
94 .init_irq = s5pv210_init_irq,
95 .map_io = smdkv210_map_io,
96 .init_machine = smdkv210_machine_init,
97 .timer = &s3c24xx_timer,
98MACHINE_END
diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig
deleted file mode 100644
index 2367908c4f62..000000000000
--- a/arch/arm/plat-s3c/Kconfig
+++ /dev/null
@@ -1,96 +0,0 @@
1# Copyright 2007 Simtec Electronics
2#
3# Licensed under GPLv2
4
5config PLAT_S3C
6 bool
7 depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX
8 default y
9 select NO_IOPORT
10 help
11 Base platform code for any Samsung S3C device
12
13# low-level serial option nodes
14
15if PLAT_S3C
16
17config CPU_LLSERIAL_S3C2410_ONLY
18 bool
19 default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440
20
21config CPU_LLSERIAL_S3C2440_ONLY
22 bool
23 default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410
24
25config CPU_LLSERIAL_S3C2410
26 bool
27 help
28 Selected if there is an S3C2410 (or register compatible) serial
29 low-level implementation needed
30
31config CPU_LLSERIAL_S3C2440
32 bool
33 help
34 Selected if there is an S3C2440 (or register compatible) serial
35 low-level implementation needed
36
37# boot configurations
38
39comment "Boot options"
40
41config S3C_BOOT_WATCHDOG
42 bool "S3C Initialisation watchdog"
43 depends on S3C2410_WATCHDOG
44 help
45 Say y to enable the watchdog during the kernel decompression
46 stage. If the kernel fails to uncompress, then the watchdog
47 will trigger a reset and the system should restart.
48
49config S3C_BOOT_ERROR_RESET
50 bool "S3C Reboot on decompression error"
51 help
52 Say y here to use the watchdog to reset the system if the
53 kernel decompressor detects an error during decompression.
54
55config S3C_BOOT_UART_FORCE_FIFO
56 bool "Force UART FIFO on during boot process"
57 default y
58 help
59 Say Y here to force the UART FIFOs on during the kernel
60 uncompressor
61
62
63config S3C_LOWLEVEL_UART_PORT
64 int "S3C UART to use for low-level messages"
65 default 0
66 help
67 Choice of which UART port to use for the low-level messages,
68 such as the `Uncompressing...` at start time. The value of
69 this configuration should be between zero and two. The port
70 must have been initialised by the boot-loader before use.
71
72# options for gpiolib support
73
74config S3C_GPIO_SPACE
75 int "Space between gpio banks"
76 default 0
77 help
78 Add a number of spare GPIO entries between each bank for debugging
79 purposes. This allows any problems where an counter overflows from
80 one bank to another to be caught, at the expense of using a little
81 more memory.
82
83config S3C_GPIO_TRACK
84 bool
85 help
86 Internal configuration option to enable the s3c specific gpio
87 chip tracking if the platform requires it.
88
89# DMA
90
91config S3C_DMA
92 bool
93 help
94 Internal configuration for S3C DMA core
95
96endif
diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile
deleted file mode 100644
index 89dbdb0adebf..000000000000
--- a/arch/arm/plat-s3c/Makefile
+++ /dev/null
@@ -1,23 +0,0 @@
1# arch/arm/plat-s3c/Makefile
2#
3# Copyright 2008 Simtec Electronics
4#
5# Licensed under GPLv2
6
7obj-y :=
8obj-m :=
9obj-n :=
10obj- :=
11
12# Core support for all Samsung SoCs
13
14obj-y += init.o
15obj-y += time.o
16
17# DMA support
18
19obj-$(CONFIG_S3C_DMA) += dma.o
20
21# PM support
22
23obj-$(CONFIG_PM) += pm.o
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig
index a806f359ceb6..6e93ef8f3d43 100644
--- a/arch/arm/plat-s3c24xx/Kconfig
+++ b/arch/arm/plat-s3c24xx/Kconfig
@@ -14,58 +14,40 @@ config PLAT_S3C24XX
14 14
15if PLAT_S3C24XX 15if PLAT_S3C24XX
16 16
17# code that is shared between a number of the s3c24xx implementations 17# low-level serial option nodes
18 18
19config S3C2410_CLOCK 19config CPU_LLSERIAL_S3C2410_ONLY
20 bool 20 bool
21 help 21 default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440
22 Clock code for the S3C2410, and similar processors which
23 is currently includes the S3C2410, S3C2440, S3C2442.
24 22
25config S3C24XX_DCLK 23config CPU_LLSERIAL_S3C2440_ONLY
26 bool 24 bool
27 help 25 default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410
28 Clock code for supporting DCLK/CLKOUT on S3C24XX architectures
29 26
30config CPU_S3C244X 27config CPU_LLSERIAL_S3C2410
31 bool 28 bool
32 depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442)
33 help
34 Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems.
35
36config S3C2440_CPUFREQ
37 bool "S3C2440/S3C2442 CPU Frequency scaling support"
38 depends on CPU_FREQ_S3C24XX && (CPU_S3C2440 || CPU_S3C2442)
39 select S3C2410_CPUFREQ_UTILS
40 default y
41 help 29 help
42 CPU Frequency scaling support for S3C2440 and S3C2442 SoC CPUs. 30 Selected if there is an S3C2410 (or register compatible) serial
31 low-level implementation needed
43 32
44config S3C2440_XTAL_12000000 33config CPU_LLSERIAL_S3C2440
45 bool 34 bool
46 help 35 help
47 Indicate that the build needs to support 12MHz system 36 Selected if there is an S3C2440 (or register compatible) serial
48 crystal. 37 low-level implementation needed
49 38
50config S3C2440_XTAL_16934400 39# code that is shared between a number of the s3c24xx implementations
51 bool
52 help
53 Indicate that the build needs to support 16.9344MHz system
54 crystal.
55 40
56config S3C2440_PLL_12000000 41config S3C2410_CLOCK
57 bool 42 bool
58 depends on S3C2440_CPUFREQ && S3C2440_XTAL_12000000
59 default y if CPU_FREQ_S3C24XX_PLL
60 help 43 help
61 PLL tables for S3C2440 or S3C2442 CPUs with 12MHz crystals. 44 Clock code for the S3C2410, and similar processors which
45 is currently includes the S3C2410, S3C2440, S3C2442.
62 46
63config S3C2440_PLL_16934400 47config S3C24XX_DCLK
64 bool 48 bool
65 depends on S3C2440_CPUFREQ && S3C2440_XTAL_16934400
66 default y if CPU_FREQ_S3C24XX_PLL
67 help 49 help
68 PLL tables for S3C2440 or S3C2442 CPUs with 16.934MHz crystals. 50 Clock code for supporting DCLK/CLKOUT on S3C24XX architectures
69 51
70config S3C24XX_PWM 52config S3C24XX_PWM
71 bool "PWM device support" 53 bool "PWM device support"
@@ -74,7 +56,6 @@ config S3C24XX_PWM
74 Support for exporting the PWM timer blocks via the pwm device 56 Support for exporting the PWM timer blocks via the pwm device
75 system. 57 system.
76 58
77
78# gpio configurations 59# gpio configurations
79 60
80config S3C24XX_GPIO_EXTRA 61config S3C24XX_GPIO_EXTRA
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile
index e0100266d039..c2237c41141f 100644
--- a/arch/arm/plat-s3c24xx/Makefile
+++ b/arch/arm/plat-s3c24xx/Makefile
@@ -25,13 +25,6 @@ obj-$(CONFIG_CPU_FREQ_S3C24XX_DEBUGFS) += cpu-freq-debugfs.o
25 25
26# Architecture dependant builds 26# Architecture dependant builds
27 27
28obj-$(CONFIG_CPU_S3C244X) += s3c244x.o
29obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o
30obj-$(CONFIG_CPU_S3C244X) += s3c244x-clock.o
31obj-$(CONFIG_S3C2440_CPUFREQ) += s3c2440-cpufreq.o
32obj-$(CONFIG_S3C2440_PLL_12000000) += s3c2440-pll-12000000.o
33obj-$(CONFIG_S3C2440_PLL_16934400) += s3c2440-pll-16934400.o
34
35obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o 28obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o
36obj-$(CONFIG_PM) += pm.o 29obj-$(CONFIG_PM) += pm.o
37obj-$(CONFIG_PM) += irq-pm.o 30obj-$(CONFIG_PM) += irq-pm.o
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 4af9dd948793..9ca64df35bf6 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -49,9 +49,7 @@
49#include <plat/s3c2400.h> 49#include <plat/s3c2400.h>
50#include <plat/s3c2410.h> 50#include <plat/s3c2410.h>
51#include <plat/s3c2412.h> 51#include <plat/s3c2412.h>
52#include "s3c244x.h" 52#include <plat/s3c244x.h>
53#include <plat/s3c2440.h>
54#include <plat/s3c2442.h>
55#include <plat/s3c2443.h> 53#include <plat/s3c2443.h>
56 54
57/* table of supported CPUs */ 55/* table of supported CPUs */
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index 986d4e5408f5..8c6de1c9968f 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -158,9 +158,27 @@ void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
158} 158}
159 159
160/* Touchscreen */ 160/* Touchscreen */
161
162static struct resource s3c_ts_resource[] = {
163 [0] = {
164 .start = S3C24XX_PA_ADC,
165 .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
166 .flags = IORESOURCE_MEM,
167 },
168 [1] = {
169 .start = IRQ_TC,
170 .end = IRQ_TC,
171 .flags = IORESOURCE_IRQ,
172 },
173
174};
175
161struct platform_device s3c_device_ts = { 176struct platform_device s3c_device_ts = {
162 .name = "s3c2410-ts", 177 .name = "s3c2410-ts",
163 .id = -1, 178 .id = -1,
179 .dev.parent = &s3c_device_adc.dev,
180 .num_resources = ARRAY_SIZE(s3c_ts_resource),
181 .resource = s3c_ts_resource,
164}; 182};
165EXPORT_SYMBOL(s3c_device_ts); 183EXPORT_SYMBOL(s3c_device_ts);
166 184
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index f0ea7943ac5a..93827b3d4e84 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -33,7 +33,7 @@
33#include <mach/dma.h> 33#include <mach/dma.h>
34#include <mach/map.h> 34#include <mach/map.h>
35 35
36#include <plat/dma-plat.h> 36#include <plat/dma-s3c24xx.h>
37#include <plat/regs-dma.h> 37#include <plat/regs-dma.h>
38 38
39/* io map for dma */ 39/* io map for dma */
diff --git a/arch/arm/plat-s3c/include/plat/audio-simtec.h b/arch/arm/plat-s3c24xx/include/plat/audio-simtec.h
index 53a93656d5db..de5e88fdcb31 100644
--- a/arch/arm/plat-s3c/include/plat/audio-simtec.h
+++ b/arch/arm/plat-s3c24xx/include/plat/audio-simtec.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c/include/plat/audio-simtec.h 1/* arch/arm/plat-s3c24xx/include/plat/audio-simtec.h
2 * 2 *
3 * Copyright 2008 Simtec Electronics 3 * Copyright 2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 4 * http://armlinux.simtec.co.uk/
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2440.h b/arch/arm/plat-s3c24xx/include/plat/s3c2440.h
deleted file mode 100644
index 107853bf9481..000000000000
--- a/arch/arm/plat-s3c24xx/include/plat/s3c2440.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2440.h
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2440 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifdef CONFIG_CPU_S3C2440
14extern int s3c2440_init(void);
15#else
16#define s3c2440_init NULL
17#endif
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2442.h b/arch/arm/plat-s3c24xx/include/plat/s3c2442.h
deleted file mode 100644
index 451a23a2092a..000000000000
--- a/arch/arm/plat-s3c24xx/include/plat/s3c2442.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2442.h
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2442 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifdef CONFIG_CPU_S3C2442
14extern int s3c2442_init(void);
15#else
16#define s3c2442_init NULL
17#endif
diff --git a/arch/arm/plat-s3c24xx/s3c244x.h b/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
index 6aab5eaae2b4..307248d1ccbb 100644
--- a/arch/arm/plat-s3c24xx/s3c244x.h
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c24xx/s3c244x.h 1/* linux/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
2 * 2 *
3 * Copyright (c) 2004-2005 Simtec Electronics 3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
@@ -23,3 +23,15 @@ extern void s3c244x_init_clocks(int xtal);
23#define s3c244x_init_uarts NULL 23#define s3c244x_init_uarts NULL
24#define s3c244x_map_io NULL 24#define s3c244x_map_io NULL
25#endif 25#endif
26
27#ifdef CONFIG_CPU_S3C2440
28extern int s3c2440_init(void);
29#else
30#define s3c2440_init NULL
31#endif
32
33#ifdef CONFIG_CPU_S3C2442
34extern int s3c2442_init(void);
35#else
36#define s3c2442_init NULL
37#endif
diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig
deleted file mode 100644
index 37b4519fb832..000000000000
--- a/arch/arm/plat-s3c64xx/Kconfig
+++ /dev/null
@@ -1,75 +0,0 @@
1# Copyright 2008 Openmoko, Inc.
2# Copyright 2008 Simtec Electronics
3# Ben Dooks <ben@simtec.co.uk>
4#
5# Licensed under GPLv2
6
7config PLAT_S3C64XX
8 bool
9 depends on ARCH_S3C64XX
10 default y
11 select CPU_V6
12 select PLAT_S3C
13 select ARM_VIC
14 select NO_IOPORT
15 select ARCH_REQUIRE_GPIOLIB
16 select SAMSUNG_CLKSRC
17 select SAMSUNG_IRQ_VIC_TIMER
18 select SAMSUNG_IRQ_UART
19 select S3C_GPIO_TRACK
20 select S3C_GPIO_PULL_UPDOWN
21 select S3C_GPIO_CFG_S3C24XX
22 select S3C_GPIO_CFG_S3C64XX
23 select S3C_DEV_NAND
24 select USB_ARCH_HAS_OHCI
25 select SAMSUNG_GPIOLIB_4BIT
26 help
27 Base platform code for any Samsung S3C64XX device
28
29if PLAT_S3C64XX
30
31# Configuration options shared by all S3C64XX implementations
32
33config CPU_S3C6400_INIT
34 bool
35 help
36 Common initialisation code for the S3C6400 that is shared
37 by other CPUs in the series, such as the S3C6410.
38
39config CPU_S3C6400_CLOCK
40 bool
41 help
42 Common clock support code for the S3C6400 that is shared
43 by other CPUs in the series, such as the S3C6410.
44
45config S3C64XX_DMA
46 bool "S3C64XX DMA"
47 select S3C_DMA
48
49# platform specific device setup
50
51config S3C64XX_SETUP_I2C0
52 bool
53 default y
54 help
55 Common setup code for i2c bus 0.
56
57 Note, currently since i2c0 is always compiled, this setup helper
58 is always compiled with it.
59
60config S3C64XX_SETUP_I2C1
61 bool
62 help
63 Common setup code for i2c bus 1.
64
65config S3C64XX_SETUP_FB_24BPP
66 bool
67 help
68 Common setup code for S3C64XX with an 24bpp RGB display helper.
69
70config S3C64XX_SETUP_SDHCI_GPIO
71 bool
72 help
73 Common setup code for S3C64XX SDHCI GPIO configurations
74
75endif
diff --git a/arch/arm/plat-s3c64xx/clock.c b/arch/arm/plat-s3c64xx/clock.c
deleted file mode 100644
index 2989c3a2e94d..000000000000
--- a/arch/arm/plat-s3c64xx/clock.c
+++ /dev/null
@@ -1,304 +0,0 @@
1/* linux/arch/arm/plat-s3c64xx/clock.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C64XX Base clock support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/interrupt.h>
18#include <linux/ioport.h>
19#include <linux/io.h>
20
21#include <mach/hardware.h>
22#include <mach/map.h>
23
24#include <plat/regs-sys.h>
25#include <plat/regs-clock.h>
26#include <plat/cpu.h>
27#include <plat/devs.h>
28#include <plat/clock.h>
29
30struct clk clk_h2 = {
31 .name = "hclk2",
32 .id = -1,
33 .rate = 0,
34};
35
36struct clk clk_27m = {
37 .name = "clk_27m",
38 .id = -1,
39 .rate = 27000000,
40};
41
42static int clk_48m_ctrl(struct clk *clk, int enable)
43{
44 unsigned long flags;
45 u32 val;
46
47 /* can't rely on clock lock, this register has other usages */
48 local_irq_save(flags);
49
50 val = __raw_readl(S3C64XX_OTHERS);
51 if (enable)
52 val |= S3C64XX_OTHERS_USBMASK;
53 else
54 val &= ~S3C64XX_OTHERS_USBMASK;
55
56 __raw_writel(val, S3C64XX_OTHERS);
57 local_irq_restore(flags);
58
59 return 0;
60}
61
62struct clk clk_48m = {
63 .name = "clk_48m",
64 .id = -1,
65 .rate = 48000000,
66 .enable = clk_48m_ctrl,
67};
68
69static int inline s3c64xx_gate(void __iomem *reg,
70 struct clk *clk,
71 int enable)
72{
73 unsigned int ctrlbit = clk->ctrlbit;
74 u32 con;
75
76 con = __raw_readl(reg);
77
78 if (enable)
79 con |= ctrlbit;
80 else
81 con &= ~ctrlbit;
82
83 __raw_writel(con, reg);
84 return 0;
85}
86
87static int s3c64xx_pclk_ctrl(struct clk *clk, int enable)
88{
89 return s3c64xx_gate(S3C_PCLK_GATE, clk, enable);
90}
91
92static int s3c64xx_hclk_ctrl(struct clk *clk, int enable)
93{
94 return s3c64xx_gate(S3C_HCLK_GATE, clk, enable);
95}
96
97int s3c64xx_sclk_ctrl(struct clk *clk, int enable)
98{
99 return s3c64xx_gate(S3C_SCLK_GATE, clk, enable);
100}
101
102static struct clk init_clocks_disable[] = {
103 {
104 .name = "nand",
105 .id = -1,
106 .parent = &clk_h,
107 }, {
108 .name = "adc",
109 .id = -1,
110 .parent = &clk_p,
111 .enable = s3c64xx_pclk_ctrl,
112 .ctrlbit = S3C_CLKCON_PCLK_TSADC,
113 }, {
114 .name = "i2c",
115 .id = -1,
116 .parent = &clk_p,
117 .enable = s3c64xx_pclk_ctrl,
118 .ctrlbit = S3C_CLKCON_PCLK_IIC,
119 }, {
120 .name = "iis",
121 .id = 0,
122 .parent = &clk_p,
123 .enable = s3c64xx_pclk_ctrl,
124 .ctrlbit = S3C_CLKCON_PCLK_IIS0,
125 }, {
126 .name = "iis",
127 .id = 1,
128 .parent = &clk_p,
129 .enable = s3c64xx_pclk_ctrl,
130 .ctrlbit = S3C_CLKCON_PCLK_IIS1,
131 }, {
132 .name = "spi",
133 .id = 0,
134 .parent = &clk_p,
135 .enable = s3c64xx_pclk_ctrl,
136 .ctrlbit = S3C_CLKCON_PCLK_SPI0,
137 }, {
138 .name = "spi",
139 .id = 1,
140 .parent = &clk_p,
141 .enable = s3c64xx_pclk_ctrl,
142 .ctrlbit = S3C_CLKCON_PCLK_SPI1,
143 }, {
144 .name = "spi_48m",
145 .id = 0,
146 .parent = &clk_48m,
147 .enable = s3c64xx_sclk_ctrl,
148 .ctrlbit = S3C_CLKCON_SCLK_SPI0_48,
149 }, {
150 .name = "spi_48m",
151 .id = 1,
152 .parent = &clk_48m,
153 .enable = s3c64xx_sclk_ctrl,
154 .ctrlbit = S3C_CLKCON_SCLK_SPI1_48,
155 }, {
156 .name = "48m",
157 .id = 0,
158 .parent = &clk_48m,
159 .enable = s3c64xx_sclk_ctrl,
160 .ctrlbit = S3C_CLKCON_SCLK_MMC0_48,
161 }, {
162 .name = "48m",
163 .id = 1,
164 .parent = &clk_48m,
165 .enable = s3c64xx_sclk_ctrl,
166 .ctrlbit = S3C_CLKCON_SCLK_MMC1_48,
167 }, {
168 .name = "48m",
169 .id = 2,
170 .parent = &clk_48m,
171 .enable = s3c64xx_sclk_ctrl,
172 .ctrlbit = S3C_CLKCON_SCLK_MMC2_48,
173 }, {
174 .name = "dma0",
175 .id = -1,
176 .parent = &clk_h,
177 .enable = s3c64xx_hclk_ctrl,
178 .ctrlbit = S3C_CLKCON_HCLK_DMA0,
179 }, {
180 .name = "dma1",
181 .id = -1,
182 .parent = &clk_h,
183 .enable = s3c64xx_hclk_ctrl,
184 .ctrlbit = S3C_CLKCON_HCLK_DMA1,
185 },
186};
187
188static struct clk init_clocks[] = {
189 {
190 .name = "lcd",
191 .id = -1,
192 .parent = &clk_h,
193 .enable = s3c64xx_hclk_ctrl,
194 .ctrlbit = S3C_CLKCON_HCLK_LCD,
195 }, {
196 .name = "gpio",
197 .id = -1,
198 .parent = &clk_p,
199 .enable = s3c64xx_pclk_ctrl,
200 .ctrlbit = S3C_CLKCON_PCLK_GPIO,
201 }, {
202 .name = "usb-host",
203 .id = -1,
204 .parent = &clk_h,
205 .enable = s3c64xx_hclk_ctrl,
206 .ctrlbit = S3C_CLKCON_HCLK_UHOST,
207 }, {
208 .name = "hsmmc",
209 .id = 0,
210 .parent = &clk_h,
211 .enable = s3c64xx_hclk_ctrl,
212 .ctrlbit = S3C_CLKCON_HCLK_HSMMC0,
213 }, {
214 .name = "hsmmc",
215 .id = 1,
216 .parent = &clk_h,
217 .enable = s3c64xx_hclk_ctrl,
218 .ctrlbit = S3C_CLKCON_HCLK_HSMMC1,
219 }, {
220 .name = "hsmmc",
221 .id = 2,
222 .parent = &clk_h,
223 .enable = s3c64xx_hclk_ctrl,
224 .ctrlbit = S3C_CLKCON_HCLK_HSMMC2,
225 }, {
226 .name = "timers",
227 .id = -1,
228 .parent = &clk_p,
229 .enable = s3c64xx_pclk_ctrl,
230 .ctrlbit = S3C_CLKCON_PCLK_PWM,
231 }, {
232 .name = "uart",
233 .id = 0,
234 .parent = &clk_p,
235 .enable = s3c64xx_pclk_ctrl,
236 .ctrlbit = S3C_CLKCON_PCLK_UART0,
237 }, {
238 .name = "uart",
239 .id = 1,
240 .parent = &clk_p,
241 .enable = s3c64xx_pclk_ctrl,
242 .ctrlbit = S3C_CLKCON_PCLK_UART1,
243 }, {
244 .name = "uart",
245 .id = 2,
246 .parent = &clk_p,
247 .enable = s3c64xx_pclk_ctrl,
248 .ctrlbit = S3C_CLKCON_PCLK_UART2,
249 }, {
250 .name = "uart",
251 .id = 3,
252 .parent = &clk_p,
253 .enable = s3c64xx_pclk_ctrl,
254 .ctrlbit = S3C_CLKCON_PCLK_UART3,
255 }, {
256 .name = "rtc",
257 .id = -1,
258 .parent = &clk_p,
259 .enable = s3c64xx_pclk_ctrl,
260 .ctrlbit = S3C_CLKCON_PCLK_RTC,
261 }, {
262 .name = "watchdog",
263 .id = -1,
264 .parent = &clk_p,
265 .ctrlbit = S3C_CLKCON_PCLK_WDT,
266 }, {
267 .name = "ac97",
268 .id = -1,
269 .parent = &clk_p,
270 .ctrlbit = S3C_CLKCON_PCLK_AC97,
271 }
272};
273
274static struct clk *clks[] __initdata = {
275 &clk_ext,
276 &clk_epll,
277 &clk_27m,
278 &clk_48m,
279 &clk_h2,
280};
281
282void __init s3c64xx_register_clocks(void)
283{
284 struct clk *clkp;
285 int ret;
286 int ptr;
287
288 s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
289 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
290
291 clkp = init_clocks_disable;
292 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
293
294 ret = s3c24xx_register_clock(clkp);
295 if (ret < 0) {
296 printk(KERN_ERR "Failed to register clock %s (%d)\n",
297 clkp->name, ret);
298 }
299
300 (clkp->enable)(clkp, 0);
301 }
302
303 s3c_pwmclk_init();
304}
diff --git a/arch/arm/plat-s3c64xx/s3c6400-init.c b/arch/arm/plat-s3c64xx/s3c6400-init.c
deleted file mode 100644
index 6c28f39df097..000000000000
--- a/arch/arm/plat-s3c64xx/s3c6400-init.c
+++ /dev/null
@@ -1,29 +0,0 @@
1/* linux/arch/arm/plat-s3c64xx/s3c6400-init.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C6400 - CPU initialisation (common with other S3C64XX chips)
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/init.h>
18
19#include <plat/cpu.h>
20#include <plat/devs.h>
21#include <plat/s3c6400.h>
22#include <plat/s3c6410.h>
23
24/* uart registration process */
25
26void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
27{
28 s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
29}
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index e7c31e7060e5..d400a6a20fe4 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -7,9 +7,8 @@
7 7
8config PLAT_S5P 8config PLAT_S5P
9 bool 9 bool
10 depends on ARCH_S5P6440 10 depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210)
11 default y 11 default y
12 select PLAT_S3C
13 select ARM_VIC 12 select ARM_VIC
14 select NO_IOPORT 13 select NO_IOPORT
15 select ARCH_REQUIRE_GPIOLIB 14 select ARCH_REQUIRE_GPIOLIB
@@ -24,19 +23,3 @@ config PLAT_S5P
24 select SAMSUNG_IRQ_UART 23 select SAMSUNG_IRQ_UART
25 help 24 help
26 Base platform code for Samsung's S5P series SoC. 25 Base platform code for Samsung's S5P series SoC.
27
28if (PLAT_S5P && ARCH_S5P6440)
29
30# Configuration options shared by all S5P64XX implementations
31
32config CPU_S5P6440_INIT
33 bool
34 help
35 Initialisation code for the S5P6440.
36
37config CPU_S5P6440_CLOCK
38 bool
39 help
40 Clock support code for the S5P6440.
41
42endif
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index 92b647450542..a7c54b332d27 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -17,8 +17,3 @@ obj-y += cpu.o
17obj-y += clock.o 17obj-y += clock.o
18obj-y += irq.o 18obj-y += irq.o
19obj-y += setup-i2c0.o 19obj-y += setup-i2c0.o
20
21# CPU support
22
23obj-$(CONFIG_CPU_S5P6440_INIT) += s5p6440-init.o
24obj-$(CONFIG_CPU_S5P6440_CLOCK) += s5p6440-clock.o
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c
index 3d3c0f1934fc..aa96e335073b 100644
--- a/arch/arm/plat-s5p/clock.c
+++ b/arch/arm/plat-s5p/clock.c
@@ -33,6 +33,12 @@ struct clk clk_ext_xtal_mux = {
33 .id = -1, 33 .id = -1,
34}; 34};
35 35
36static struct clk s5p_clk_27m = {
37 .name = "clk_27m",
38 .id = -1,
39 .rate = 27000000,
40};
41
36/* 48MHz USB Phy clock output */ 42/* 48MHz USB Phy clock output */
37struct clk clk_48m = { 43struct clk clk_48m = {
38 .name = "clk_48m", 44 .name = "clk_48m",
@@ -104,6 +110,11 @@ struct clksrc_sources clk_src_epll = {
104 .nr_sources = ARRAY_SIZE(clk_src_epll_list), 110 .nr_sources = ARRAY_SIZE(clk_src_epll_list),
105}; 111};
106 112
113struct clk clk_vpll = {
114 .name = "vpll",
115 .id = -1,
116};
117
107int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable) 118int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable)
108{ 119{
109 unsigned int ctrlbit = clk->ctrlbit; 120 unsigned int ctrlbit = clk->ctrlbit;
@@ -118,10 +129,12 @@ int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable)
118static struct clk *s5p_clks[] __initdata = { 129static struct clk *s5p_clks[] __initdata = {
119 &clk_ext_xtal_mux, 130 &clk_ext_xtal_mux,
120 &clk_48m, 131 &clk_48m,
132 &s5p_clk_27m,
121 &clk_fout_apll, 133 &clk_fout_apll,
122 &clk_fout_mpll, 134 &clk_fout_mpll,
123 &clk_fout_epll, 135 &clk_fout_epll,
124 &clk_arm, 136 &clk_arm,
137 &clk_vpll,
125}; 138};
126 139
127void __init s5p_register_clocks(unsigned long xtal_freq) 140void __init s5p_register_clocks(unsigned long xtal_freq)
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
index 0895a77a2835..f92e5de3a755 100644
--- a/arch/arm/plat-s5p/cpu.c
+++ b/arch/arm/plat-s5p/cpu.c
@@ -18,10 +18,14 @@
18#include <mach/regs-clock.h> 18#include <mach/regs-clock.h>
19#include <plat/cpu.h> 19#include <plat/cpu.h>
20#include <plat/s5p6440.h> 20#include <plat/s5p6440.h>
21#include <plat/s5p6442.h>
22#include <plat/s5pv210.h>
21 23
22/* table of supported CPUs */ 24/* table of supported CPUs */
23 25
24static const char name_s5p6440[] = "S5P6440"; 26static const char name_s5p6440[] = "S5P6440";
27static const char name_s5p6442[] = "S5P6442";
28static const char name_s5pv210[] = "S5PV210/S5PC110";
25 29
26static struct cpu_table cpu_ids[] __initdata = { 30static struct cpu_table cpu_ids[] __initdata = {
27 { 31 {
@@ -32,36 +36,55 @@ static struct cpu_table cpu_ids[] __initdata = {
32 .init_uarts = s5p6440_init_uarts, 36 .init_uarts = s5p6440_init_uarts,
33 .init = s5p6440_init, 37 .init = s5p6440_init,
34 .name = name_s5p6440, 38 .name = name_s5p6440,
39 }, {
40 .idcode = 0x36442000,
41 .idmask = 0xffffff00,
42 .map_io = s5p6442_map_io,
43 .init_clocks = s5p6442_init_clocks,
44 .init_uarts = s5p6442_init_uarts,
45 .init = s5p6442_init,
46 .name = name_s5p6442,
47 }, {
48 .idcode = 0x43110000,
49 .idmask = 0xfffff000,
50 .map_io = s5pv210_map_io,
51 .init_clocks = s5pv210_init_clocks,
52 .init_uarts = s5pv210_init_uarts,
53 .init = s5pv210_init,
54 .name = name_s5pv210,
35 }, 55 },
36}; 56};
37 57
38/* minimal IO mapping */ 58/* minimal IO mapping */
39 59
40#define UART_OFFS (S5P_PA_UART & 0xfffff)
41
42static struct map_desc s5p_iodesc[] __initdata = { 60static struct map_desc s5p_iodesc[] __initdata = {
43 { 61 {
44 .virtual = (unsigned long)S5P_VA_SYSCON, 62 .virtual = (unsigned long)S5P_VA_CHIPID,
63 .pfn = __phys_to_pfn(S5P_PA_CHIPID),
64 .length = SZ_4K,
65 .type = MT_DEVICE,
66 }, {
67 .virtual = (unsigned long)S3C_VA_SYS,
45 .pfn = __phys_to_pfn(S5P_PA_SYSCON), 68 .pfn = __phys_to_pfn(S5P_PA_SYSCON),
46 .length = SZ_64K, 69 .length = SZ_64K,
47 .type = MT_DEVICE, 70 .type = MT_DEVICE,
48 }, { 71 }, {
49 .virtual = (unsigned long)(S5P_VA_UART + UART_OFFS), 72 .virtual = (unsigned long)S3C_VA_UART,
50 .pfn = __phys_to_pfn(S5P_PA_UART), 73 .pfn = __phys_to_pfn(S3C_PA_UART),
51 .length = SZ_4K, 74 .length = SZ_4K,
52 .type = MT_DEVICE, 75 .type = MT_DEVICE,
53 }, { 76 }, {
54 .virtual = (unsigned long)S5P_VA_VIC0, 77 .virtual = (unsigned long)VA_VIC0,
55 .pfn = __phys_to_pfn(S5P_PA_VIC0), 78 .pfn = __phys_to_pfn(S5P_PA_VIC0),
56 .length = SZ_16K, 79 .length = SZ_16K,
57 .type = MT_DEVICE, 80 .type = MT_DEVICE,
58 }, { 81 }, {
59 .virtual = (unsigned long)S5P_VA_VIC1, 82 .virtual = (unsigned long)VA_VIC1,
60 .pfn = __phys_to_pfn(S5P_PA_VIC1), 83 .pfn = __phys_to_pfn(S5P_PA_VIC1),
61 .length = SZ_16K, 84 .length = SZ_16K,
62 .type = MT_DEVICE, 85 .type = MT_DEVICE,
63 }, { 86 }, {
64 .virtual = (unsigned long)S5P_VA_TIMER, 87 .virtual = (unsigned long)S3C_VA_TIMER,
65 .pfn = __phys_to_pfn(S5P_PA_TIMER), 88 .pfn = __phys_to_pfn(S5P_PA_TIMER),
66 .length = SZ_16K, 89 .length = SZ_16K,
67 .type = MT_DEVICE, 90 .type = MT_DEVICE,
diff --git a/arch/arm/plat-s5p/dev-uart.c b/arch/arm/plat-s5p/dev-uart.c
index 23c75316d491..a89331ef4ae1 100644
--- a/arch/arm/plat-s5p/dev-uart.c
+++ b/arch/arm/plat-s5p/dev-uart.c
@@ -95,6 +95,7 @@ static struct resource s5p_uart2_resource[] = {
95}; 95};
96 96
97static struct resource s5p_uart3_resource[] = { 97static struct resource s5p_uart3_resource[] = {
98#if CONFIG_SERIAL_SAMSUNG_UARTS > 3
98 [0] = { 99 [0] = {
99 .start = S5P_PA_UART3, 100 .start = S5P_PA_UART3,
100 .end = S5P_PA_UART3 + S5P_SZ_UART, 101 .end = S5P_PA_UART3 + S5P_SZ_UART,
@@ -115,6 +116,7 @@ static struct resource s5p_uart3_resource[] = {
115 .end = IRQ_S5P_UART_ERR3, 116 .end = IRQ_S5P_UART_ERR3,
116 .flags = IORESOURCE_IRQ, 117 .flags = IORESOURCE_IRQ,
117 }, 118 },
119#endif
118}; 120};
119 121
120struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = { 122struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = {
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h
index 5d7937dddad2..42e757f2e40c 100644
--- a/arch/arm/plat-s5p/include/plat/irqs.h
+++ b/arch/arm/plat-s5p/include/plat/irqs.h
@@ -28,9 +28,14 @@
28 28
29#define S5P_VIC0_BASE S5P_IRQ(0) 29#define S5P_VIC0_BASE S5P_IRQ(0)
30#define S5P_VIC1_BASE S5P_IRQ(32) 30#define S5P_VIC1_BASE S5P_IRQ(32)
31#define S5P_VIC2_BASE S5P_IRQ(64)
32#define S5P_VIC3_BASE S5P_IRQ(96)
33
34#define VIC_BASE(x) (S5P_VIC0_BASE + ((x)*32))
31 35
32#define IRQ_VIC0_BASE S5P_VIC0_BASE 36#define IRQ_VIC0_BASE S5P_VIC0_BASE
33#define IRQ_VIC1_BASE S5P_VIC1_BASE 37#define IRQ_VIC1_BASE S5P_VIC1_BASE
38#define IRQ_VIC2_BASE S5P_VIC2_BASE
34 39
35/* UART interrupts, each UART has 4 intterupts per channel so 40/* UART interrupts, each UART has 4 intterupts per channel so
36 * use the space between the ISA and S3C main interrupts. Note, these 41 * use the space between the ISA and S3C main interrupts. Note, these
@@ -71,8 +76,10 @@
71 76
72#define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x)) 77#define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x))
73#define S5P_IRQ_VIC1(x) (S5P_VIC1_BASE + (x)) 78#define S5P_IRQ_VIC1(x) (S5P_VIC1_BASE + (x))
79#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x))
80#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x))
74 81
75#define S5P_TIMER_IRQ(x) S5P_IRQ(64 + (x)) 82#define S5P_TIMER_IRQ(x) S5P_IRQ(11 + (x))
76 83
77#define IRQ_TIMER0 S5P_TIMER_IRQ(0) 84#define IRQ_TIMER0 S5P_TIMER_IRQ(0)
78#define IRQ_TIMER1 S5P_TIMER_IRQ(1) 85#define IRQ_TIMER1 S5P_TIMER_IRQ(1)
diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-s5p/include/plat/map-s5p.h
new file mode 100644
index 000000000000..14828521f70c
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/map-s5p.h
@@ -0,0 +1,34 @@
1/* linux/arch/arm/plat-s5p/include/plat/map-s5p.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_MAP_S5P_H
14#define __ASM_PLAT_MAP_S5P_H __FILE__
15
16#define S5P_VA_CHIPID S3C_ADDR(0x00700000)
17#define S5P_VA_GPIO S3C_ADDR(0x00500000)
18#define S5P_VA_SYSTIMER S3C_ADDR(0x01200000)
19#define S5P_VA_SROMC S3C_ADDR(0x01100000)
20
21#define S5P_VA_UART0 (S3C_VA_UART + 0x0)
22#define S5P_VA_UART1 (S3C_VA_UART + 0x400)
23#define S5P_VA_UART2 (S3C_VA_UART + 0x800)
24#define S5P_VA_UART3 (S3C_VA_UART + 0xC00)
25
26#define S3C_UART_OFFSET (0x400)
27
28#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000))
29#define VA_VIC0 VA_VIC(0)
30#define VA_VIC1 VA_VIC(1)
31#define VA_VIC2 VA_VIC(2)
32#define VA_VIC3 VA_VIC(3)
33
34#endif /* __ASM_PLAT_MAP_S5P_H */
diff --git a/arch/arm/plat-s5p/include/plat/s5p-clock.h b/arch/arm/plat-s5p/include/plat/s5p-clock.h
index e1a7444b8829..56fb8b414d41 100644
--- a/arch/arm/plat-s5p/include/plat/s5p-clock.h
+++ b/arch/arm/plat-s5p/include/plat/s5p-clock.h
@@ -20,6 +20,7 @@
20#define clk_fin_apll clk_ext_xtal_mux 20#define clk_fin_apll clk_ext_xtal_mux
21#define clk_fin_mpll clk_ext_xtal_mux 21#define clk_fin_mpll clk_ext_xtal_mux
22#define clk_fin_epll clk_ext_xtal_mux 22#define clk_fin_epll clk_ext_xtal_mux
23#define clk_fin_vpll clk_ext_xtal_mux
23 24
24extern struct clk clk_ext_xtal_mux; 25extern struct clk clk_ext_xtal_mux;
25extern struct clk clk_48m; 26extern struct clk clk_48m;
@@ -27,6 +28,7 @@ extern struct clk clk_fout_apll;
27extern struct clk clk_fout_mpll; 28extern struct clk clk_fout_mpll;
28extern struct clk clk_fout_epll; 29extern struct clk clk_fout_epll;
29extern struct clk clk_arm; 30extern struct clk clk_arm;
31extern struct clk clk_vpll;
30 32
31extern struct clksrc_sources clk_src_apll; 33extern struct clksrc_sources clk_src_apll;
32extern struct clksrc_sources clk_src_mpll; 34extern struct clksrc_sources clk_src_mpll;
diff --git a/arch/arm/plat-s5p/include/plat/s5p6442.h b/arch/arm/plat-s5p/include/plat/s5p6442.h
new file mode 100644
index 000000000000..7b8801349c94
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5p6442.h
@@ -0,0 +1,33 @@
1/* arch/arm/plat-s5p/include/plat/s5p6442.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5p6442 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* Common init code for S5P6442 related SoCs */
14
15extern void s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
16extern void s5p6442_register_clocks(void);
17extern void s5p6442_setup_clocks(void);
18
19#ifdef CONFIG_CPU_S5P6442
20
21extern int s5p6442_init(void);
22extern void s5p6442_init_irq(void);
23extern void s5p6442_map_io(void);
24extern void s5p6442_init_clocks(int xtal);
25
26#define s5p6442_init_uarts s5p6442_common_init_uarts
27
28#else
29#define s5p6442_init_clocks NULL
30#define s5p6442_init_uarts NULL
31#define s5p6442_map_io NULL
32#define s5p6442_init NULL
33#endif
diff --git a/arch/arm/plat-s5p/include/plat/s5pv210.h b/arch/arm/plat-s5p/include/plat/s5pv210.h
new file mode 100644
index 000000000000..6c93a0c78100
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5pv210.h
@@ -0,0 +1,33 @@
1/* linux/arch/arm/plat-s5p/include/plat/s5pv210.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5pv210 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* Common init code for S5PV210 related SoCs */
14
15extern void s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
16extern void s5pv210_register_clocks(void);
17extern void s5pv210_setup_clocks(void);
18
19#ifdef CONFIG_CPU_S5PV210
20
21extern int s5pv210_init(void);
22extern void s5pv210_init_irq(void);
23extern void s5pv210_map_io(void);
24extern void s5pv210_init_clocks(int xtal);
25
26#define s5pv210_init_uarts s5pv210_common_init_uarts
27
28#else
29#define s5pv210_init_clocks NULL
30#define s5pv210_init_uarts NULL
31#define s5pv210_map_io NULL
32#define s5pv210_init NULL
33#endif
diff --git a/arch/arm/plat-s5p/irq.c b/arch/arm/plat-s5p/irq.c
index eada40d0847d..25e1eb6de59e 100644
--- a/arch/arm/plat-s5p/irq.c
+++ b/arch/arm/plat-s5p/irq.c
@@ -25,9 +25,6 @@
25#include <plat/irq-vic-timer.h> 25#include <plat/irq-vic-timer.h>
26#include <plat/irq-uart.h> 26#include <plat/irq-uart.h>
27 27
28#define VIC_VAADDR(no) (S5P_VA_VIC0 + ((no)*0x10000))
29#define VIC_BASE(no) (S5P_VIC0_BASE + ((no)*32))
30
31/* 28/*
32 * Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3] 29 * Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
33 * are consecutive when looking up the interrupt in the demux routines. 30 * are consecutive when looking up the interrupt in the demux routines.
@@ -48,11 +45,13 @@ static struct s3c_uart_irq uart_irqs[] = {
48 .base_irq = IRQ_S5P_UART_BASE2, 45 .base_irq = IRQ_S5P_UART_BASE2,
49 .parent_irq = IRQ_UART2, 46 .parent_irq = IRQ_UART2,
50 }, 47 },
48#if CONFIG_SERIAL_SAMSUNG_UARTS > 3
51 [3] = { 49 [3] = {
52 .regs = S5P_VA_UART3, 50 .regs = S5P_VA_UART3,
53 .base_irq = IRQ_S5P_UART_BASE3, 51 .base_irq = IRQ_S5P_UART_BASE3,
54 .parent_irq = IRQ_UART3, 52 .parent_irq = IRQ_UART3,
55 }, 53 },
54#endif
56}; 55};
57 56
58void __init s5p_init_irq(u32 *vic, u32 num_vic) 57void __init s5p_init_irq(u32 *vic, u32 num_vic)
@@ -61,7 +60,7 @@ void __init s5p_init_irq(u32 *vic, u32 num_vic)
61 60
62 /* initialize the VICs */ 61 /* initialize the VICs */
63 for (irq = 0; irq < num_vic; irq++) 62 for (irq = 0; irq < num_vic; irq++)
64 vic_init(VIC_VAADDR(irq), VIC_BASE(irq), vic[irq], 0); 63 vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
65 64
66 s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0); 65 s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
67 s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1); 66 s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 1c2fe91c23e9..d552c65fa1b0 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -7,12 +7,50 @@
7config PLAT_SAMSUNG 7config PLAT_SAMSUNG
8 bool 8 bool
9 depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX || ARCH_S5PC1XX 9 depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX || ARCH_S5PC1XX
10 select NO_IOPORT
10 default y 11 default y
11 help 12 help
12 Base platform code for all Samsung SoC based systems 13 Base platform code for all Samsung SoC based systems
13 14
14if PLAT_SAMSUNG 15if PLAT_SAMSUNG
15 16
17# boot configurations
18
19comment "Boot options"
20
21config S3C_BOOT_WATCHDOG
22 bool "S3C Initialisation watchdog"
23 depends on S3C2410_WATCHDOG
24 help
25 Say y to enable the watchdog during the kernel decompression
26 stage. If the kernel fails to uncompress, then the watchdog
27 will trigger a reset and the system should restart.
28
29config S3C_BOOT_ERROR_RESET
30 bool "S3C Reboot on decompression error"
31 help
32 Say y here to use the watchdog to reset the system if the
33 kernel decompressor detects an error during decompression.
34
35config S3C_BOOT_UART_FORCE_FIFO
36 bool "Force UART FIFO on during boot process"
37 default y
38 help
39 Say Y here to force the UART FIFOs on during the kernel
40 uncompressor
41
42
43config S3C_LOWLEVEL_UART_PORT
44 int "S3C UART to use for low-level messages"
45 default 0
46 help
47 Choice of which UART port to use for the low-level messages,
48 such as the `Uncompressing...` at start time. The value of
49 this configuration should be between zero and two. The port
50 must have been initialised by the boot-loader before use.
51
52# clock options
53
16config SAMSUNG_CLKSRC 54config SAMSUNG_CLKSRC
17 bool 55 bool
18 help 56 help
@@ -81,6 +119,21 @@ config SAMSUNG_GPIO_EXTRA
81 provides. This allows expanding the GPIO space for use with 119 provides. This allows expanding the GPIO space for use with
82 GPIO expanders. 120 GPIO expanders.
83 121
122config S3C_GPIO_SPACE
123 int "Space between gpio banks"
124 default 0
125 help
126 Add a number of spare GPIO entries between each bank for debugging
127 purposes. This allows any problems where an counter overflows from
128 one bank to another to be caught, at the expense of using a little
129 more memory.
130
131config S3C_GPIO_TRACK
132 bool
133 help
134 Internal configuration option to enable the s3c specific gpio
135 chip tracking if the platform requires it.
136
84# ADC driver 137# ADC driver
85 138
86config S3C_ADC 139config S3C_ADC
@@ -132,6 +185,19 @@ config S3C_DEV_NAND
132 help 185 help
133 Compile in platform device definition for NAND controller 186 Compile in platform device definition for NAND controller
134 187
188config S3C64XX_DEV_SPI
189 bool
190 help
191 Compile in platform device definitions for S3C64XX's type
192 SPI controllers.
193
194# DMA
195
196config S3C_DMA
197 bool
198 help
199 Internal configuration for S3C DMA core
200
135comment "Power management" 201comment "Power management"
136 202
137config SAMSUNG_PM_DEBUG 203config SAMSUNG_PM_DEBUG
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index c8c8caec8cde..22c89d08f6e5 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -11,6 +11,8 @@ obj- :=
11 11
12# Objects we always build independent of SoC choice 12# Objects we always build independent of SoC choice
13 13
14obj-y += init.o
15obj-y += time.o
14obj-y += clock.o 16obj-y += clock.o
15obj-y += pwm-clock.o 17obj-y += pwm-clock.o
16obj-y += gpio.o 18obj-y += gpio.o
@@ -39,8 +41,13 @@ obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o
39obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o 41obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o
40obj-$(CONFIG_S3C_DEV_NAND) += dev-nand.o 42obj-$(CONFIG_S3C_DEV_NAND) += dev-nand.o
41 43
44# DMA support
45
46obj-$(CONFIG_S3C_DMA) += dma.o
47
42# PM support 48# PM support
43 49
50obj-$(CONFIG_PM) += pm.o
44obj-$(CONFIG_PM) += pm-gpio.o 51obj-$(CONFIG_PM) += pm-gpio.o
45obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o 52obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o
46 53
diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c
index c7659b7378b1..0b5833b9ac5b 100644
--- a/arch/arm/plat-samsung/adc.c
+++ b/arch/arm/plat-samsung/adc.c
@@ -262,6 +262,7 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw)
262{ 262{
263 struct adc_device *adc = pw; 263 struct adc_device *adc = pw;
264 struct s3c_adc_client *client = adc->cur; 264 struct s3c_adc_client *client = adc->cur;
265 enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data;
265 unsigned long flags; 266 unsigned long flags;
266 unsigned data0, data1; 267 unsigned data0, data1;
267 268
@@ -276,9 +277,17 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw)
276 277
277 client->nr_samples--; 278 client->nr_samples--;
278 279
280 if (cpu == TYPE_S3C64XX) {
281 /* S3C64XX ADC resolution is 12-bit */
282 data0 &= 0xfff;
283 data1 &= 0xfff;
284 } else {
285 data0 &= 0x3ff;
286 data1 &= 0x3ff;
287 }
288
279 if (client->convert_cb) 289 if (client->convert_cb)
280 (client->convert_cb)(client, data0 & 0x3ff, data1 & 0x3ff, 290 (client->convert_cb)(client, data0, data1, &client->nr_samples);
281 &client->nr_samples);
282 291
283 if (client->nr_samples > 0) { 292 if (client->nr_samples > 0) {
284 /* fire another conversion for this */ 293 /* fire another conversion for this */
@@ -295,7 +304,7 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw)
295 } 304 }
296 305
297exit: 306exit:
298 if (platform_get_device_id(adc->pdev)->driver_data == TYPE_S3C64XX) { 307 if (cpu == TYPE_S3C64XX) {
299 /* Clear ADC interrupt */ 308 /* Clear ADC interrupt */
300 writel(0, adc->regs + S3C64XX_ADCCLRINT); 309 writel(0, adc->regs + S3C64XX_ADCCLRINT);
301 } 310 }
@@ -308,6 +317,7 @@ static int s3c_adc_probe(struct platform_device *pdev)
308 struct adc_device *adc; 317 struct adc_device *adc;
309 struct resource *regs; 318 struct resource *regs;
310 int ret; 319 int ret;
320 unsigned tmp;
311 321
312 adc = kzalloc(sizeof(struct adc_device), GFP_KERNEL); 322 adc = kzalloc(sizeof(struct adc_device), GFP_KERNEL);
313 if (adc == NULL) { 323 if (adc == NULL) {
@@ -354,8 +364,12 @@ static int s3c_adc_probe(struct platform_device *pdev)
354 364
355 clk_enable(adc->clk); 365 clk_enable(adc->clk);
356 366
357 writel(adc->prescale | S3C2410_ADCCON_PRSCEN, 367 tmp = adc->prescale | S3C2410_ADCCON_PRSCEN;
358 adc->regs + S3C2410_ADCCON); 368 if (platform_get_device_id(pdev)->driver_data == TYPE_S3C64XX) {
369 /* Enable 12-bit ADC resolution */
370 tmp |= S3C64XX_ADCCON_RESSEL;
371 }
372 writel(tmp, adc->regs + S3C2410_ADCCON);
359 373
360 dev_info(dev, "attached adc driver\n"); 374 dev_info(dev, "attached adc driver\n");
361 375
@@ -398,6 +412,7 @@ static int s3c_adc_suspend(struct platform_device *pdev, pm_message_t state)
398 con |= S3C2410_ADCCON_STDBM; 412 con |= S3C2410_ADCCON_STDBM;
399 writel(con, adc->regs + S3C2410_ADCCON); 413 writel(con, adc->regs + S3C2410_ADCCON);
400 414
415 disable_irq(adc->irq);
401 clk_disable(adc->clk); 416 clk_disable(adc->clk);
402 417
403 return 0; 418 return 0;
@@ -408,6 +423,7 @@ static int s3c_adc_resume(struct platform_device *pdev)
408 struct adc_device *adc = platform_get_drvdata(pdev); 423 struct adc_device *adc = platform_get_drvdata(pdev);
409 424
410 clk_enable(adc->clk); 425 clk_enable(adc->clk);
426 enable_irq(adc->irq);
411 427
412 writel(adc->prescale | S3C2410_ADCCON_PRSCEN, 428 writel(adc->prescale | S3C2410_ADCCON_PRSCEN,
413 adc->regs + S3C2410_ADCCON); 429 adc->regs + S3C2410_ADCCON);
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c
index e9cdbe47beb6..1b25c9d8c403 100644
--- a/arch/arm/plat-samsung/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -307,6 +307,12 @@ struct clk s3c24xx_uclk = {
307 307
308/* initialise the clock system */ 308/* initialise the clock system */
309 309
310/**
311 * s3c24xx_register_clock() - register a clock
312 * @clk: The clock to register
313 *
314 * Add the specified clock to the list of clocks known by the system.
315 */
310int s3c24xx_register_clock(struct clk *clk) 316int s3c24xx_register_clock(struct clk *clk)
311{ 317{
312 if (clk->enable == NULL) 318 if (clk->enable == NULL)
@@ -324,13 +330,25 @@ int s3c24xx_register_clock(struct clk *clk)
324 return 0; 330 return 0;
325} 331}
326 332
333/**
334 * s3c24xx_register_clocks() - register an array of clock pointers
335 * @clks: Pointer to an array of struct clk pointers
336 * @nr_clks: The number of clocks in the @clks array.
337 *
338 * Call s3c24xx_register_clock() for all the clock pointers contained
339 * in the @clks list. Returns the number of failures.
340 */
327int s3c24xx_register_clocks(struct clk **clks, int nr_clks) 341int s3c24xx_register_clocks(struct clk **clks, int nr_clks)
328{ 342{
329 int fails = 0; 343 int fails = 0;
330 344
331 for (; nr_clks > 0; nr_clks--, clks++) { 345 for (; nr_clks > 0; nr_clks--, clks++) {
332 if (s3c24xx_register_clock(*clks) < 0) 346 if (s3c24xx_register_clock(*clks) < 0) {
347 struct clk *clk = *clks;
348 printk(KERN_ERR "%s: failed to register %p: %s\n",
349 __func__, clk, clk->name);
333 fails++; 350 fails++;
351 }
334 } 352 }
335 353
336 return fails; 354 return fails;
diff --git a/arch/arm/plat-samsung/dev-usb-hsotg.c b/arch/arm/plat-samsung/dev-usb-hsotg.c
index e2f604b51c86..33a844ab6917 100644
--- a/arch/arm/plat-samsung/dev-usb-hsotg.c
+++ b/arch/arm/plat-samsung/dev-usb-hsotg.c
@@ -14,6 +14,7 @@
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/string.h> 15#include <linux/string.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/dma-mapping.h>
17 18
18#include <mach/irqs.h> 19#include <mach/irqs.h>
19#include <mach/map.h> 20#include <mach/map.h>
@@ -33,9 +34,15 @@ static struct resource s3c_usb_hsotg_resources[] = {
33 }, 34 },
34}; 35};
35 36
37static u64 s3c_hsotg_dmamask = DMA_BIT_MASK(32);
38
36struct platform_device s3c_device_usb_hsotg = { 39struct platform_device s3c_device_usb_hsotg = {
37 .name = "s3c-hsotg", 40 .name = "s3c-hsotg",
38 .id = -1, 41 .id = -1,
39 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources), 42 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
40 .resource = s3c_usb_hsotg_resources, 43 .resource = s3c_usb_hsotg_resources,
44 .dev = {
45 .dma_mask = &s3c_hsotg_dmamask,
46 .coherent_dma_mask = DMA_BIT_MASK(32),
47 },
41}; 48};
diff --git a/arch/arm/plat-s3c/dma.c b/arch/arm/plat-samsung/dma.c
index a995850cd9d5..cb459dd95459 100644
--- a/arch/arm/plat-s3c/dma.c
+++ b/arch/arm/plat-samsung/dma.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c/dma.c 1/* linux/arch/arm/plat-samsung/dma.c
2 * 2 *
3 * Copyright (c) 2003-2009 Simtec Electronics 3 * Copyright (c) 2003-2009 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
@@ -20,8 +20,6 @@ struct s3c2410_dma_buf;
20#include <mach/dma.h> 20#include <mach/dma.h>
21#include <mach/irqs.h> 21#include <mach/irqs.h>
22 22
23#include <plat/dma-plat.h>
24
25/* dma channel state information */ 23/* dma channel state information */
26struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS]; 24struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS];
27struct s3c2410_dma_chan *s3c_dma_chan_map[DMACH_MAX]; 25struct s3c2410_dma_chan *s3c_dma_chan_map[DMACH_MAX];
diff --git a/arch/arm/plat-s3c/include/plat/audio.h b/arch/arm/plat-samsung/include/plat/audio.h
index f22d23bb6271..e32f9edfd4b7 100644
--- a/arch/arm/plat-s3c/include/plat/audio.h
+++ b/arch/arm/plat-samsung/include/plat/audio.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c/include/plat/audio.h 1/* arch/arm/plat-samsung/include/plat/audio.h
2 * 2 *
3 * Copyright (c) 2009 Samsung Electronics Co. Ltd 3 * Copyright (c) 2009 Samsung Electronics Co. Ltd
4 * Author: Jaswinder Singh <jassi.brar@samsung.com> 4 * Author: Jaswinder Singh <jassi.brar@samsung.com>
@@ -8,6 +8,14 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11/* The machine init code calls s3c*_ac97_setup_gpio with
12 * one of these defines in order to select appropriate bank
13 * of GPIO for AC97 pins
14 */
15#define S3C64XX_AC97_GPD 0
16#define S3C64XX_AC97_GPE 1
17extern void s3c64xx_ac97_setup_gpio(int);
18
11/** 19/**
12 * struct s3c_audio_pdata - common platform data for audio device drivers 20 * struct s3c_audio_pdata - common platform data for audio device drivers
13 * @cfg_gpio: Callback function to setup mux'ed pins in I2S/PCM/AC97 mode 21 * @cfg_gpio: Callback function to setup mux'ed pins in I2S/PCM/AC97 mode
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index ba9a1cdd3a28..60b62692ac7a 100644
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -94,7 +94,6 @@ extern void s3c_register_clocks(struct clk *clk, int nr_clks);
94 94
95extern int s3c24xx_register_baseclocks(unsigned long xtal); 95extern int s3c24xx_register_baseclocks(unsigned long xtal);
96 96
97extern void s3c64xx_register_clocks(void);
98extern void s5p_register_clocks(unsigned long xtal_freq); 97extern void s5p_register_clocks(unsigned long xtal_freq);
99 98
100extern void s3c24xx_setup_clocks(unsigned long fclk, 99extern void s3c24xx_setup_clocks(unsigned long fclk,
diff --git a/arch/arm/plat-s3c/include/plat/cpu-freq.h b/arch/arm/plat-samsung/include/plat/cpu-freq.h
index 94eb06a2ea5c..80c4a809c721 100644
--- a/arch/arm/plat-s3c/include/plat/cpu-freq.h
+++ b/arch/arm/plat-samsung/include/plat/cpu-freq.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c/include/plat/cpu-freq.h 1/* arch/arm/plat-samsung/include/plat/cpu-freq.h
2 * 2 *
3 * Copyright (c) 2006-2007 Simtec Electronics 3 * Copyright (c) 2006-2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 4 * http://armlinux.simtec.co.uk/
diff --git a/arch/arm/plat-s3c/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index 676db9465674..d316b4a579f4 100644
--- a/arch/arm/plat-s3c/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c/include/plat/cpu.h 1/* linux/arch/arm/plat-samsung/include/plat/cpu.h
2 * 2 *
3 * Copyright (c) 2004-2005 Simtec Electronics 3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/plat-s3c/include/plat/debug-macro.S b/arch/arm/plat-samsung/include/plat/debug-macro.S
index 3634d4e3708b..dc6efd90e8ff 100644
--- a/arch/arm/plat-s3c/include/plat/debug-macro.S
+++ b/arch/arm/plat-samsung/include/plat/debug-macro.S
@@ -1,4 +1,4 @@
1/* linux/include/asm-arm/plat-s3c/debug-macro.S 1/* arch/arm/plat-samsung/include/plat/debug-macro.S
2 * 2 *
3 * Copyright 2005, 2007 Simtec Electronics 3 * Copyright 2005, 2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 4 * http://armlinux.simtec.co.uk/
@@ -11,6 +11,18 @@
11 11
12#include <plat/regs-serial.h> 12#include <plat/regs-serial.h>
13 13
14/* The S5PV210/S5PC110 and S5P6442 implementations are as belows. */
15
16 .macro fifo_level_s5pv210 rd, rx
17 ldr \rd, [ \rx, # S3C2410_UFSTAT ]
18 and \rd, \rd, #S5PV210_UFSTAT_TXMASK
19 .endm
20
21 .macro fifo_full_s5pv210 rd, rx
22 ldr \rd, [ \rx, # S3C2410_UFSTAT ]
23 tst \rd, #S5PV210_UFSTAT_TXFULL
24 .endm
25
14/* The S3C2440 implementations are used by default as they are the 26/* The S3C2440 implementations are used by default as they are the
15 * most widely re-used */ 27 * most widely re-used */
16 28
diff --git a/arch/arm/plat-s3c/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index c6f9b7310490..796d24258313 100644
--- a/arch/arm/plat-s3c/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -1,4 +1,4 @@
1/* linux/include/asm-arm/plat-s3c24xx/devs.h 1/* arch/arm/plat-samsung/include/plat/devs.h
2 * 2 *
3 * Copyright (c) 2004 Simtec Electronics 3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
@@ -35,7 +35,10 @@ extern struct platform_device s3c64xx_device_spi1;
35extern struct platform_device s3c64xx_device_pcm0; 35extern struct platform_device s3c64xx_device_pcm0;
36extern struct platform_device s3c64xx_device_pcm1; 36extern struct platform_device s3c64xx_device_pcm1;
37 37
38extern struct platform_device s3c64xx_device_ac97;
39
38extern struct platform_device s3c_device_ts; 40extern struct platform_device s3c_device_ts;
41
39extern struct platform_device s3c_device_fb; 42extern struct platform_device s3c_device_fb;
40extern struct platform_device s3c_device_ohci; 43extern struct platform_device s3c_device_ohci;
41extern struct platform_device s3c_device_lcd; 44extern struct platform_device s3c_device_lcd;
diff --git a/arch/arm/plat-s3c24xx/include/plat/dma-plat.h b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
index 9565ead1bc9b..336d5ac02035 100644
--- a/arch/arm/plat-s3c24xx/include/plat/dma-plat.h
+++ b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
@@ -1,9 +1,9 @@
1/* linux/arch/arm/plat-s3c24xx/include/plat/dma-plat.h 1/* linux/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
2 * 2 *
3 * Copyright (C) 2006 Simtec Electronics 3 * Copyright (C) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
5 * 5 *
6 * Samsung S3C24XX DMA support 6 * Samsung S3C24XX DMA support - per SoC functions
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/plat-s3c/include/plat/dma.h b/arch/arm/plat-samsung/include/plat/dma.h
index e429d10be3ad..7584d751ed51 100644
--- a/arch/arm/plat-s3c/include/plat/dma.h
+++ b/arch/arm/plat-samsung/include/plat/dma.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c/include/plat/dma.h 1/* arch/arm/plat-samsung/include/plat/dma.h
2 * 2 *
3 * Copyright (C) 2003-2006 Simtec Electronics 3 * Copyright (C) 2003-2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/plat-s3c/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h
index f8db87930f8b..ffc01a76b7ce 100644
--- a/arch/arm/plat-s3c/include/plat/fb.h
+++ b/arch/arm/plat-samsung/include/plat/fb.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c/include/plat/fb.h 1/* arch/arm/plat-samsung/include/plat/fb.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c/include/plat/map-base.h b/arch/arm/plat-samsung/include/plat/map-base.h
index 250be311c85b..250be311c85b 100644
--- a/arch/arm/plat-s3c/include/plat/map-base.h
+++ b/arch/arm/plat-samsung/include/plat/map-base.h
diff --git a/arch/arm/plat-s3c/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h
index 2543bd227f2d..245836d91931 100644
--- a/arch/arm/plat-s3c/include/plat/pm.h
+++ b/arch/arm/plat-samsung/include/plat/pm.h
@@ -1,4 +1,4 @@
1/* linux/include/asm-arm/plat-s3c24xx/pm.h 1/* arch/arm/plat-samsung/include/plat/pm.h
2 * 2 *
3 * Copyright (c) 2004 Simtec Electronics 3 * Copyright (c) 2004 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 4 * http://armlinux.simtec.co.uk/
diff --git a/arch/arm/plat-samsung/include/plat/regs-adc.h b/arch/arm/plat-samsung/include/plat/regs-adc.h
index f43c8dab39e4..7554c4fcddb9 100644
--- a/arch/arm/plat-samsung/include/plat/regs-adc.h
+++ b/arch/arm/plat-samsung/include/plat/regs-adc.h
@@ -25,6 +25,7 @@
25 25
26 26
27/* ADCCON Register Bits */ 27/* ADCCON Register Bits */
28#define S3C64XX_ADCCON_RESSEL (1<<16)
28#define S3C2410_ADCCON_ECFLG (1<<15) 29#define S3C2410_ADCCON_ECFLG (1<<15)
29#define S3C2410_ADCCON_PRSCEN (1<<14) 30#define S3C2410_ADCCON_PRSCEN (1<<14)
30#define S3C2410_ADCCON_PRSCVL(x) (((x)&0xFF)<<6) 31#define S3C2410_ADCCON_PRSCVL(x) (((x)&0xFF)<<6)
diff --git a/arch/arm/plat-s3c/include/plat/regs-fb-v4.h b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
index a60ed0d06c94..0f43599248ad 100644
--- a/arch/arm/plat-s3c/include/plat/regs-fb-v4.h
+++ b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c/include/plat/regs-fb-v4.h 1/* arch/arm/plat-samsung/include/plat/regs-fb-v4.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c/include/plat/regs-fb.h b/arch/arm/plat-samsung/include/plat/regs-fb.h
index e9ee599d430e..0ef806e50344 100644
--- a/arch/arm/plat-s3c/include/plat/regs-fb.h
+++ b/arch/arm/plat-samsung/include/plat/regs-fb.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c/include/plat/regs-fb.h 1/* arch/arm/plat-samsung/include/plat/regs-fb.h
2 * 2 *
3 * Copyright 2008 Openmoko, Inc. 3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics 4 * Copyright 2008 Simtec Electronics
diff --git a/arch/arm/plat-s3c/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h
index 60d6604185ea..a6eba8496b24 100644
--- a/arch/arm/plat-s3c/include/plat/regs-serial.h
+++ b/arch/arm/plat-samsung/include/plat/regs-serial.h
@@ -1,4 +1,4 @@
1/* arch/arm/mach-s3c2410/include/mach/regs-serial.h 1/* arch/arm/plat-samsung/include/plat/regs-serial.h
2 * 2 *
3 * From linux/include/asm-arm/hardware/serial_s3c2410.h 3 * From linux/include/asm-arm/hardware/serial_s3c2410.h
4 * 4 *
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index 53198673b6bd..7d07cd7aa4f2 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -78,8 +78,8 @@ extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
78 78
79/* S3C6400 SDHCI setup */ 79/* S3C6400 SDHCI setup */
80 80
81#ifdef CONFIG_S3C6400_SETUP_SDHCI 81#ifdef CONFIG_S3C64XX_SETUP_SDHCI
82extern char *s3c6400_hsmmc_clksrcs[4]; 82extern char *s3c64xx_hsmmc_clksrcs[4];
83 83
84#ifdef CONFIG_S3C_DEV_HSMMC 84#ifdef CONFIG_S3C_DEV_HSMMC
85extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, 85extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
@@ -89,7 +89,7 @@ extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
89 89
90static inline void s3c6400_default_sdhci0(void) 90static inline void s3c6400_default_sdhci0(void)
91{ 91{
92 s3c_hsmmc0_def_platdata.clocks = s3c6400_hsmmc_clksrcs; 92 s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
93 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; 93 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
94 s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; 94 s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
95} 95}
@@ -101,7 +101,7 @@ static inline void s3c6400_default_sdhci0(void) { }
101#ifdef CONFIG_S3C_DEV_HSMMC1 101#ifdef CONFIG_S3C_DEV_HSMMC1
102static inline void s3c6400_default_sdhci1(void) 102static inline void s3c6400_default_sdhci1(void)
103{ 103{
104 s3c_hsmmc1_def_platdata.clocks = s3c6400_hsmmc_clksrcs; 104 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
105 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; 105 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
106 s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; 106 s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
107} 107}
@@ -112,7 +112,7 @@ static inline void s3c6400_default_sdhci1(void) { }
112#ifdef CONFIG_S3C_DEV_HSMMC2 112#ifdef CONFIG_S3C_DEV_HSMMC2
113static inline void s3c6400_default_sdhci2(void) 113static inline void s3c6400_default_sdhci2(void)
114{ 114{
115 s3c_hsmmc2_def_platdata.clocks = s3c6400_hsmmc_clksrcs; 115 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
116 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; 116 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
117 s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; 117 s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
118} 118}
@@ -120,27 +120,19 @@ static inline void s3c6400_default_sdhci2(void)
120static inline void s3c6400_default_sdhci2(void) { } 120static inline void s3c6400_default_sdhci2(void) { }
121#endif /* CONFIG_S3C_DEV_HSMMC2 */ 121#endif /* CONFIG_S3C_DEV_HSMMC2 */
122 122
123#else
124static inline void s3c6400_default_sdhci0(void) { }
125static inline void s3c6400_default_sdhci1(void) { }
126#endif /* CONFIG_S3C6400_SETUP_SDHCI */
127
128/* S3C6410 SDHCI setup */ 123/* S3C6410 SDHCI setup */
129 124
130#ifdef CONFIG_S3C6410_SETUP_SDHCI 125extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
131extern char *s3c6410_hsmmc_clksrcs[4]; 126 void __iomem *r,
132 127 struct mmc_ios *ios,
133extern void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev, 128 struct mmc_card *card);
134 void __iomem *r,
135 struct mmc_ios *ios,
136 struct mmc_card *card);
137 129
138#ifdef CONFIG_S3C_DEV_HSMMC 130#ifdef CONFIG_S3C_DEV_HSMMC
139static inline void s3c6410_default_sdhci0(void) 131static inline void s3c6410_default_sdhci0(void)
140{ 132{
141 s3c_hsmmc0_def_platdata.clocks = s3c6410_hsmmc_clksrcs; 133 s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
142 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; 134 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
143 s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card; 135 s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
144} 136}
145#else 137#else
146static inline void s3c6410_default_sdhci0(void) { } 138static inline void s3c6410_default_sdhci0(void) { }
@@ -149,9 +141,9 @@ static inline void s3c6410_default_sdhci0(void) { }
149#ifdef CONFIG_S3C_DEV_HSMMC1 141#ifdef CONFIG_S3C_DEV_HSMMC1
150static inline void s3c6410_default_sdhci1(void) 142static inline void s3c6410_default_sdhci1(void)
151{ 143{
152 s3c_hsmmc1_def_platdata.clocks = s3c6410_hsmmc_clksrcs; 144 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
153 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; 145 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
154 s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card; 146 s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
155} 147}
156#else 148#else
157static inline void s3c6410_default_sdhci1(void) { } 149static inline void s3c6410_default_sdhci1(void) { }
@@ -160,9 +152,9 @@ static inline void s3c6410_default_sdhci1(void) { }
160#ifdef CONFIG_S3C_DEV_HSMMC2 152#ifdef CONFIG_S3C_DEV_HSMMC2
161static inline void s3c6410_default_sdhci2(void) 153static inline void s3c6410_default_sdhci2(void)
162{ 154{
163 s3c_hsmmc2_def_platdata.clocks = s3c6410_hsmmc_clksrcs; 155 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
164 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; 156 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
165 s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card; 157 s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
166} 158}
167#else 159#else
168static inline void s3c6410_default_sdhci2(void) { } 160static inline void s3c6410_default_sdhci2(void) { }
@@ -171,7 +163,10 @@ static inline void s3c6410_default_sdhci2(void) { }
171#else 163#else
172static inline void s3c6410_default_sdhci0(void) { } 164static inline void s3c6410_default_sdhci0(void) { }
173static inline void s3c6410_default_sdhci1(void) { } 165static inline void s3c6410_default_sdhci1(void) { }
174#endif /* CONFIG_S3C6410_SETUP_SDHCI */ 166static inline void s3c6400_default_sdhci0(void) { }
167static inline void s3c6400_default_sdhci1(void) { }
168
169#endif /* CONFIG_S3C64XX_SETUP_SDHCI */
175 170
176/* S5PC100 SDHCI setup */ 171/* S5PC100 SDHCI setup */
177 172
diff --git a/arch/arm/plat-s3c/include/plat/uncompress.h b/arch/arm/plat-samsung/include/plat/uncompress.h
index dc66a477f62e..e87ce8ffbbcd 100644
--- a/arch/arm/plat-s3c/include/plat/uncompress.h
+++ b/arch/arm/plat-samsung/include/plat/uncompress.h
@@ -1,4 +1,4 @@
1/* linux/include/asm-arm/plat-s3c/uncompress.h 1/* arch/arm/plat-samsung/include/plat/uncompress.h
2 * 2 *
3 * Copyright 2003, 2007 Simtec Electronics 3 * Copyright 2003, 2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/ 4 * http://armlinux.simtec.co.uk/
diff --git a/arch/arm/plat-s3c/include/plat/usb-control.h b/arch/arm/plat-samsung/include/plat/usb-control.h
index a6a57bf796bd..7fa1fbefc3f2 100644
--- a/arch/arm/plat-s3c/include/plat/usb-control.h
+++ b/arch/arm/plat-samsung/include/plat/usb-control.h
@@ -1,4 +1,4 @@
1/* arch/arm/plat-s3c/include/plat/usb-control.h 1/* arch/arm/plat-samsung/include/plat/usb-control.h
2 * 2 *
3 * Copyright (c) 2004 Simtec Electronics 3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk> 4 * Ben Dooks <ben@simtec.co.uk>
diff --git a/arch/arm/plat-s3c/init.c b/arch/arm/plat-samsung/init.c
index 6790edfaca6f..6790edfaca6f 100644
--- a/arch/arm/plat-s3c/init.c
+++ b/arch/arm/plat-samsung/init.c
diff --git a/arch/arm/plat-s3c/pm.c b/arch/arm/plat-samsung/pm.c
index e5eef126791b..27cfca597699 100644
--- a/arch/arm/plat-s3c/pm.c
+++ b/arch/arm/plat-samsung/pm.c
@@ -29,7 +29,7 @@
29#include <asm/irq.h> 29#include <asm/irq.h>
30 30
31#include <plat/pm.h> 31#include <plat/pm.h>
32#include <plat/pm-core.h> 32#include <mach/pm-core.h>
33 33
34/* for external use */ 34/* for external use */
35 35
diff --git a/arch/arm/plat-s3c/time.c b/arch/arm/plat-samsung/time.c
index 3b27b29da478..2231d80ad817 100644
--- a/arch/arm/plat-s3c/time.c
+++ b/arch/arm/plat-samsung/time.c
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s3c24xx/time.c 1/* linux/arch/arm/plat-samsung/time.c
2 * 2 *
3 * Copyright (C) 2003-2005 Simtec Electronics 3 * Copyright (C) 2003-2005 Simtec Electronics
4 * Ben Dooks, <ben@simtec.co.uk> 4 * Ben Dooks, <ben@simtec.co.uk>