diff options
Diffstat (limited to 'arch/arm')
21 files changed, 267 insertions, 203 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3f8718fc4050..1cb098f6950b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -699,14 +699,14 @@ config ARCH_S5P6442 | |||
699 | help | 699 | help |
700 | Samsung S5P6442 CPU based systems | 700 | Samsung S5P6442 CPU based systems |
701 | 701 | ||
702 | config ARCH_S5PC1XX | 702 | config ARCH_S5PC100 |
703 | bool "Samsung S5PC1XX" | 703 | bool "Samsung S5PC100" |
704 | select GENERIC_GPIO | 704 | select GENERIC_GPIO |
705 | select HAVE_CLK | 705 | select HAVE_CLK |
706 | select CPU_V7 | 706 | select CPU_V7 |
707 | select ARM_L1_CACHE_SHIFT_6 | 707 | select ARM_L1_CACHE_SHIFT_6 |
708 | help | 708 | help |
709 | Samsung S5PC1XX series based systems | 709 | Samsung S5PC100 series based systems |
710 | 710 | ||
711 | config ARCH_S5PV210 | 711 | config ARCH_S5PV210 |
712 | bool "Samsung S5PV210/S5PC110" | 712 | bool "Samsung S5PV210/S5PC110" |
@@ -890,7 +890,6 @@ source "arch/arm/mach-sa1100/Kconfig" | |||
890 | source "arch/arm/plat-samsung/Kconfig" | 890 | source "arch/arm/plat-samsung/Kconfig" |
891 | source "arch/arm/plat-s3c24xx/Kconfig" | 891 | source "arch/arm/plat-s3c24xx/Kconfig" |
892 | source "arch/arm/plat-s5p/Kconfig" | 892 | source "arch/arm/plat-s5p/Kconfig" |
893 | source "arch/arm/plat-s5pc1xx/Kconfig" | ||
894 | 893 | ||
895 | if ARCH_S3C2410 | 894 | if ARCH_S3C2410 |
896 | source "arch/arm/mach-s3c2400/Kconfig" | 895 | source "arch/arm/mach-s3c2400/Kconfig" |
@@ -909,9 +908,7 @@ source "arch/arm/mach-s5p6440/Kconfig" | |||
909 | 908 | ||
910 | source "arch/arm/mach-s5p6442/Kconfig" | 909 | source "arch/arm/mach-s5p6442/Kconfig" |
911 | 910 | ||
912 | if ARCH_S5PC1XX | ||
913 | source "arch/arm/mach-s5pc100/Kconfig" | 911 | source "arch/arm/mach-s5pc100/Kconfig" |
914 | endif | ||
915 | 912 | ||
916 | source "arch/arm/mach-s5pv210/Kconfig" | 913 | source "arch/arm/mach-s5pv210/Kconfig" |
917 | 914 | ||
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 9505a70bfc0a..f7cb6d495484 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -167,7 +167,7 @@ machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0 | |||
167 | machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx | 167 | machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx |
168 | machine-$(CONFIG_ARCH_S5P6440) := s5p6440 | 168 | machine-$(CONFIG_ARCH_S5P6440) := s5p6440 |
169 | machine-$(CONFIG_ARCH_S5P6442) := s5p6442 | 169 | machine-$(CONFIG_ARCH_S5P6442) := s5p6442 |
170 | machine-$(CONFIG_ARCH_S5PC1XX) := s5pc100 | 170 | machine-$(CONFIG_ARCH_S5PC100) := s5pc100 |
171 | machine-$(CONFIG_ARCH_S5PV210) := s5pv210 | 171 | machine-$(CONFIG_ARCH_S5PV210) := s5pv210 |
172 | machine-$(CONFIG_ARCH_SA1100) := sa1100 | 172 | machine-$(CONFIG_ARCH_SA1100) := sa1100 |
173 | machine-$(CONFIG_ARCH_SHARK) := shark | 173 | machine-$(CONFIG_ARCH_SHARK) := shark |
@@ -192,7 +192,6 @@ plat-$(CONFIG_PLAT_NOMADIK) := nomadik | |||
192 | plat-$(CONFIG_PLAT_ORION) := orion | 192 | plat-$(CONFIG_PLAT_ORION) := orion |
193 | plat-$(CONFIG_PLAT_PXA) := pxa | 193 | plat-$(CONFIG_PLAT_PXA) := pxa |
194 | plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx samsung | 194 | plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx samsung |
195 | plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx samsung | ||
196 | plat-$(CONFIG_PLAT_S5P) := s5p samsung | 195 | plat-$(CONFIG_PLAT_S5P) := s5p samsung |
197 | 196 | ||
198 | ifeq ($(CONFIG_ARCH_EBSA110),y) | 197 | ifeq ($(CONFIG_ARCH_EBSA110),y) |
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig index 70b57d19bc91..fe1216b0ed58 100644 --- a/arch/arm/mach-s5pc100/Kconfig +++ b/arch/arm/mach-s5pc100/Kconfig | |||
@@ -5,10 +5,11 @@ | |||
5 | 5 | ||
6 | # Configuration options for the S5PC100 CPU | 6 | # Configuration options for the S5PC100 CPU |
7 | 7 | ||
8 | if ARCH_S5PC100 | ||
9 | |||
8 | config CPU_S5PC100 | 10 | config CPU_S5PC100 |
9 | bool | 11 | bool |
10 | select CPU_S5PC100_INIT | 12 | select PLAT_S5P |
11 | select CPU_S5PC100_CLOCK | ||
12 | help | 13 | help |
13 | Enable S5PC100 CPU support | 14 | Enable S5PC100 CPU support |
14 | 15 | ||
@@ -46,3 +47,5 @@ config MACH_SMDKC100 | |||
46 | select S5PC100_SETUP_SDHCI | 47 | select S5PC100_SETUP_SDHCI |
47 | help | 48 | help |
48 | Machine support for the Samsung SMDKC100 | 49 | Machine support for the Samsung SMDKC100 |
50 | |||
51 | endif | ||
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile index 9a545cad682b..9b52d2af013f 100644 --- a/arch/arm/mach-s5pc100/Makefile +++ b/arch/arm/mach-s5pc100/Makefile | |||
@@ -11,7 +11,7 @@ obj- := | |||
11 | 11 | ||
12 | # Core support for S5PC100 system | 12 | # Core support for S5PC100 system |
13 | 13 | ||
14 | obj-$(CONFIG_CPU_S5PC100) += cpu.o gpiolib.o | 14 | obj-$(CONFIG_CPU_S5PC100) += cpu.o init.o clock.o gpiolib.o |
15 | obj-$(CONFIG_CPU_S5PC100) += setup-i2c0.o | 15 | obj-$(CONFIG_CPU_S5PC100) += setup-i2c0.o |
16 | 16 | ||
17 | # Helper and device support | 17 | # Helper and device support |
@@ -22,4 +22,5 @@ obj-$(CONFIG_S5PC100_SETUP_SDHCI) += setup-sdhci.o | |||
22 | obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | 22 | obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o |
23 | 23 | ||
24 | # machine support | 24 | # machine support |
25 | |||
25 | obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o | 26 | obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o |
diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/cpu.c index d79e7574a852..d424a9fda034 100644 --- a/arch/arm/mach-s5pc100/cpu.c +++ b/arch/arm/mach-s5pc100/cpu.c | |||
@@ -22,47 +22,53 @@ | |||
22 | #include <linux/serial_core.h> | 22 | #include <linux/serial_core.h> |
23 | #include <linux/platform_device.h> | 23 | #include <linux/platform_device.h> |
24 | 24 | ||
25 | #include <asm/proc-fns.h> | ||
26 | |||
27 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
28 | #include <asm/mach/map.h> | 26 | #include <asm/mach/map.h> |
29 | #include <asm/mach/irq.h> | 27 | #include <asm/mach/irq.h> |
30 | 28 | ||
29 | #include <asm/proc-fns.h> | ||
30 | |||
31 | #include <mach/hardware.h> | 31 | #include <mach/hardware.h> |
32 | #include <mach/map.h> | 32 | #include <mach/map.h> |
33 | #include <asm/irq.h> | 33 | #include <asm/irq.h> |
34 | 34 | ||
35 | #include <plat/cpu-freq.h> | ||
36 | #include <plat/regs-serial.h> | 35 | #include <plat/regs-serial.h> |
37 | #include <plat/regs-power.h> | 36 | #include <mach/regs-clock.h> |
38 | 37 | ||
39 | #include <plat/cpu.h> | 38 | #include <plat/cpu.h> |
40 | #include <plat/devs.h> | 39 | #include <plat/devs.h> |
41 | #include <plat/clock.h> | 40 | #include <plat/clock.h> |
42 | #include <plat/sdhci.h> | ||
43 | #include <plat/iic-core.h> | 41 | #include <plat/iic-core.h> |
42 | #include <plat/sdhci.h> | ||
44 | #include <plat/s5pc100.h> | 43 | #include <plat/s5pc100.h> |
45 | 44 | ||
46 | /* Initial IO mappings */ | 45 | /* Initial IO mappings */ |
47 | 46 | ||
48 | static struct map_desc s5pc100_iodesc[] __initdata = { | 47 | static struct map_desc s5pc100_iodesc[] __initdata = { |
48 | { | ||
49 | .virtual = (unsigned long)S5P_VA_SYSTIMER, | ||
50 | .pfn = __phys_to_pfn(S5PC100_PA_SYSTIMER), | ||
51 | .length = SZ_16K, | ||
52 | .type = MT_DEVICE, | ||
53 | }, { | ||
54 | .virtual = (unsigned long)VA_VIC2, | ||
55 | .pfn = __phys_to_pfn(S5PC100_PA_VIC2), | ||
56 | .length = SZ_16K, | ||
57 | .type = MT_DEVICE, | ||
58 | }, { | ||
59 | .virtual = (unsigned long)S5PC100_VA_OTHERS, | ||
60 | .pfn = __phys_to_pfn(S5PC100_PA_OTHERS), | ||
61 | .length = SZ_4K, | ||
62 | .type = MT_DEVICE, | ||
63 | } | ||
49 | }; | 64 | }; |
50 | 65 | ||
51 | static void s5pc100_idle(void) | 66 | static void s5pc100_idle(void) |
52 | { | 67 | { |
53 | unsigned long tmp; | 68 | if (!need_resched()) |
54 | 69 | cpu_do_idle(); | |
55 | tmp = __raw_readl(S5PC100_PWR_CFG); | ||
56 | tmp &= ~S5PC100_PWRCFG_CFG_DEEP_IDLE; | ||
57 | tmp &= ~S5PC100_PWRCFG_CFG_WFI_MASK; | ||
58 | tmp |= S5PC100_PWRCFG_CFG_WFI_DEEP_IDLE; | ||
59 | __raw_writel(tmp, S5PC100_PWR_CFG); | ||
60 | 70 | ||
61 | tmp = __raw_readl(S5PC100_OTHERS); | 71 | local_irq_enable(); |
62 | tmp |= S5PC100_PMU_INT_DISABLE; | ||
63 | __raw_writel(tmp, S5PC100_OTHERS); | ||
64 | |||
65 | cpu_do_idle(); | ||
66 | } | 72 | } |
67 | 73 | ||
68 | /* s5pc100_map_io | 74 | /* s5pc100_map_io |
@@ -86,22 +92,23 @@ void __init s5pc100_map_io(void) | |||
86 | 92 | ||
87 | void __init s5pc100_init_clocks(int xtal) | 93 | void __init s5pc100_init_clocks(int xtal) |
88 | { | 94 | { |
89 | printk(KERN_DEBUG "%s: initialising clocks\n", __func__); | 95 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); |
96 | |||
90 | s3c24xx_register_baseclocks(xtal); | 97 | s3c24xx_register_baseclocks(xtal); |
91 | s5pc1xx_register_clocks(); | 98 | s5p_register_clocks(xtal); |
92 | s5pc100_register_clocks(); | 99 | s5pc100_register_clocks(); |
93 | s5pc100_setup_clocks(); | 100 | s5pc100_setup_clocks(); |
94 | } | 101 | } |
95 | 102 | ||
96 | void __init s5pc100_init_irq(void) | 103 | void __init s5pc100_init_irq(void) |
97 | { | 104 | { |
98 | u32 vic_valid[] = {~0, ~0, ~0}; | 105 | u32 vic[] = {~0, ~0, ~0}; |
99 | 106 | ||
100 | /* VIC0, VIC1, and VIC2 are fully populated. */ | 107 | /* VIC0, VIC1, and VIC2 are fully populated. */ |
101 | s5pc1xx_init_irq(vic_valid, ARRAY_SIZE(vic_valid)); | 108 | s5p_init_irq(vic, ARRAY_SIZE(vic)); |
102 | } | 109 | } |
103 | 110 | ||
104 | struct sysdev_class s5pc100_sysclass = { | 111 | static struct sysdev_class s5pc100_sysclass = { |
105 | .name = "s5pc100-core", | 112 | .name = "s5pc100-core", |
106 | }; | 113 | }; |
107 | 114 | ||
@@ -118,9 +125,10 @@ core_initcall(s5pc100_core_init); | |||
118 | 125 | ||
119 | int __init s5pc100_init(void) | 126 | int __init s5pc100_init(void) |
120 | { | 127 | { |
121 | printk(KERN_DEBUG "S5PC100: Initialising architecture\n"); | 128 | printk(KERN_INFO "S5PC100: Initializing architecture\n"); |
122 | 129 | ||
123 | s5pc1xx_idle = s5pc100_idle; | 130 | /* set idle function */ |
131 | pm_idle = s5pc100_idle; | ||
124 | 132 | ||
125 | return sysdev_register(&s5pc100_sysdev); | 133 | return sysdev_register(&s5pc100_sysdev); |
126 | } | 134 | } |
diff --git a/arch/arm/mach-s5pc100/gpiolib.c b/arch/arm/mach-s5pc100/gpiolib.c index c8e8336a3a12..494a53b10479 100644 --- a/arch/arm/mach-s5pc100/gpiolib.c +++ b/arch/arm/mach-s5pc100/gpiolib.c | |||
@@ -1,10 +1,10 @@ | |||
1 | /* | 1 | /* |
2 | * arch/arm/plat-s5pc1xx/gpiolib.c | 2 | * arch/arm/plat-s5pc100/gpiolib.c |
3 | * | 3 | * |
4 | * Copyright 2009 Samsung Electronics Co | 4 | * Copyright 2009 Samsung Electronics Co |
5 | * Kyungmin Park <kyungmin.park@samsung.com> | 5 | * Kyungmin Park <kyungmin.park@samsung.com> |
6 | * | 6 | * |
7 | * S5PC1XX - GPIOlib support | 7 | * S5PC100 - GPIOlib support |
8 | * | 8 | * |
9 | * This program is free software; you can redistribute it and/or modify | 9 | * This program is free software; you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License version 2 as | 10 | * it under the terms of the GNU General Public License version 2 as |
@@ -62,12 +62,12 @@ | |||
62 | */ | 62 | */ |
63 | 63 | ||
64 | #if 0 | 64 | #if 0 |
65 | static int s5pc1xx_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) | 65 | static int s5pc100_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) |
66 | { | 66 | { |
67 | return S3C_IRQ_GPIO(chip->base + offset); | 67 | return S3C_IRQ_GPIO(chip->base + offset); |
68 | } | 68 | } |
69 | 69 | ||
70 | static int s5pc1xx_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset) | 70 | static int s5pc100_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset) |
71 | { | 71 | { |
72 | int base; | 72 | int base; |
73 | 73 | ||
@@ -382,8 +382,8 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = { | |||
382 | }; | 382 | }; |
383 | 383 | ||
384 | /* FIXME move from irq-gpio.c */ | 384 | /* FIXME move from irq-gpio.c */ |
385 | extern struct irq_chip s5pc1xx_gpioint; | 385 | extern struct irq_chip s5pc100_gpioint; |
386 | extern void s5pc1xx_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc); | 386 | extern void s5pc100_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc); |
387 | 387 | ||
388 | static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip) | 388 | static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip) |
389 | { | 389 | { |
@@ -392,21 +392,21 @@ static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip) | |||
392 | if (chip->config == &gpio_cfg) { | 392 | if (chip->config == &gpio_cfg) { |
393 | int i, irq; | 393 | int i, irq; |
394 | 394 | ||
395 | chip->chip.to_irq = s5pc1xx_gpiolib_to_irq; | 395 | chip->chip.to_irq = s5pc100_gpiolib_to_irq; |
396 | 396 | ||
397 | for (i = 0; i < chip->chip.ngpio; i++) { | 397 | for (i = 0; i < chip->chip.ngpio; i++) { |
398 | irq = S3C_IRQ_GPIO_BASE + chip->chip.base + i; | 398 | irq = S3C_IRQ_GPIO_BASE + chip->chip.base + i; |
399 | set_irq_chip(irq, &s5pc1xx_gpioint); | 399 | set_irq_chip(irq, &s5pc100_gpioint); |
400 | set_irq_data(irq, &chip->chip); | 400 | set_irq_data(irq, &chip->chip); |
401 | set_irq_handler(irq, handle_level_irq); | 401 | set_irq_handler(irq, handle_level_irq); |
402 | set_irq_flags(irq, IRQF_VALID); | 402 | set_irq_flags(irq, IRQF_VALID); |
403 | } | 403 | } |
404 | } else if (chip->config == &gpio_cfg_eint) | 404 | } else if (chip->config == &gpio_cfg_eint) |
405 | chip->chip.to_irq = s5pc1xx_gpiolib_to_eint; | 405 | chip->chip.to_irq = s5pc100_gpiolib_to_eint; |
406 | #endif | 406 | #endif |
407 | } | 407 | } |
408 | 408 | ||
409 | static __init int s5pc1xx_gpiolib_init(void) | 409 | static __init int s5pc100_gpiolib_init(void) |
410 | { | 410 | { |
411 | struct s3c_gpio_chip *chip; | 411 | struct s3c_gpio_chip *chip; |
412 | int nr_chips; | 412 | int nr_chips; |
@@ -421,8 +421,8 @@ static __init int s5pc1xx_gpiolib_init(void) | |||
421 | ARRAY_SIZE(s5pc100_gpio_chips)); | 421 | ARRAY_SIZE(s5pc100_gpio_chips)); |
422 | #if 0 | 422 | #if 0 |
423 | /* Interrupt */ | 423 | /* Interrupt */ |
424 | set_irq_chained_handler(IRQ_GPIOINT, s5pc1xx_irq_gpioint_handler); | 424 | set_irq_chained_handler(IRQ_GPIOINT, s5pc100_irq_gpioint_handler); |
425 | #endif | 425 | #endif |
426 | return 0; | 426 | return 0; |
427 | } | 427 | } |
428 | core_initcall(s5pc1xx_gpiolib_init); | 428 | core_initcall(s5pc100_gpiolib_init); |
diff --git a/arch/arm/mach-s5pc100/include/mach/debug-macro.S b/arch/arm/mach-s5pc100/include/mach/debug-macro.S index e181f5789482..70e02e91ee3c 100644 --- a/arch/arm/mach-s5pc100/include/mach/debug-macro.S +++ b/arch/arm/mach-s5pc100/include/mach/debug-macro.S | |||
@@ -22,12 +22,14 @@ | |||
22 | * aligned and add in the offset when we load the value here. | 22 | * aligned and add in the offset when we load the value here. |
23 | */ | 23 | */ |
24 | 24 | ||
25 | .macro addruart, rx, tmp | 25 | .macro addruart, rx, rtmp |
26 | mrc p15, 0, \rx, c1, c0 | 26 | mrc p15, 0, \rx, c1, c0 |
27 | tst \rx, #1 | 27 | tst \rx, #1 |
28 | ldreq \rx, = S3C_PA_UART | 28 | ldreq \rx, = S3C_PA_UART |
29 | ldrne \rx, = (S3C_VA_UART + S3C_PA_UART & 0xfffff) | 29 | ldrne \rx, = S3C_VA_UART |
30 | #if CONFIG_DEBUG_S3C_UART != 0 | ||
30 | add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) | 31 | add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) |
32 | #endif | ||
31 | .endm | 33 | .endm |
32 | 34 | ||
33 | /* include the reset of the code which will do the work, we're only | 35 | /* include the reset of the code which will do the work, we're only |
diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S index 67131939e626..ba76af052c81 100644 --- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S +++ b/arch/arm/mach-s5pc100/include/mach/entry-macro.S | |||
@@ -20,7 +20,7 @@ | |||
20 | .endm | 20 | .endm |
21 | 21 | ||
22 | .macro get_irqnr_preamble, base, tmp | 22 | .macro get_irqnr_preamble, base, tmp |
23 | ldr \base, =S3C_VA_VIC0 | 23 | ldr \base, =VA_VIC0 |
24 | .endm | 24 | .endm |
25 | 25 | ||
26 | .macro arch_ret_to_user, tmp1, tmp2 | 26 | .macro arch_ret_to_user, tmp1, tmp2 |
@@ -29,18 +29,18 @@ | |||
29 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 29 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
30 | 30 | ||
31 | @ check the vic0 | 31 | @ check the vic0 |
32 | mov \irqnr, # S3C_IRQ_OFFSET + 31 | 32 | mov \irqnr, # S5P_IRQ_OFFSET + 31 |
33 | ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] | 33 | ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] |
34 | teq \irqstat, #0 | 34 | teq \irqstat, #0 |
35 | 35 | ||
36 | @ otherwise try vic1 | 36 | @ otherwise try vic1 |
37 | addeq \tmp, \base, #(S3C_VA_VIC1 - S3C_VA_VIC0) | 37 | addeq \tmp, \base, #(VA_VIC1 - VA_VIC0) |
38 | addeq \irqnr, \irqnr, #32 | 38 | addeq \irqnr, \irqnr, #32 |
39 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] | 39 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] |
40 | teqeq \irqstat, #0 | 40 | teqeq \irqstat, #0 |
41 | 41 | ||
42 | @ otherwise try vic2 | 42 | @ otherwise try vic2 |
43 | addeq \tmp, \base, #(S3C_VA_VIC2 - S3C_VA_VIC0) | 43 | addeq \tmp, \base, #(VA_VIC2 - VA_VIC0) |
44 | addeq \irqnr, \irqnr, #32 | 44 | addeq \irqnr, \irqnr, #32 |
45 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] | 45 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] |
46 | teqeq \irqstat, #0 | 46 | teqeq \irqstat, #0 |
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h index b53fa48a52c6..84c74acaa63a 100644 --- a/arch/arm/mach-s5pc100/include/mach/irqs.h +++ b/arch/arm/mach-s5pc100/include/mach/irqs.h | |||
@@ -11,9 +11,106 @@ | |||
11 | 11 | ||
12 | #include <plat/irqs.h> | 12 | #include <plat/irqs.h> |
13 | 13 | ||
14 | /* LCD */ | 14 | /* VIC0: system, DMA, timer */ |
15 | #define IRQ_EINT16_31 S5P_IRQ_VIC0(16) | ||
16 | #define IRQ_BATF S5P_IRQ_VIC0(17) | ||
17 | #define IRQ_MDMA S5P_IRQ_VIC0(18) | ||
18 | #define IRQ_PDMA0 S5P_IRQ_VIC0(19) | ||
19 | #define IRQ_PDMA1 S5P_IRQ_VIC0(20) | ||
20 | #define IRQ_TIMER0_VIC S5P_IRQ_VIC0(21) | ||
21 | #define IRQ_TIMER1_VIC S5P_IRQ_VIC0(22) | ||
22 | #define IRQ_TIMER2_VIC S5P_IRQ_VIC0(23) | ||
23 | #define IRQ_TIMER3_VIC S5P_IRQ_VIC0(24) | ||
24 | #define IRQ_TIMER4_VIC S5P_IRQ_VIC0(25) | ||
25 | #define IRQ_SYSTIMER S5P_IRQ_VIC0(26) | ||
26 | #define IRQ_WDT S5P_IRQ_VIC0(27) | ||
27 | #define IRQ_RTC_ALARM S5P_IRQ_VIC0(28) | ||
28 | #define IRQ_RTC_TIC S5P_IRQ_VIC0(29) | ||
29 | #define IRQ_GPIOINT S5P_IRQ_VIC0(30) | ||
30 | |||
31 | /* VIC1: ARM, power, memory, connectivity */ | ||
32 | #define IRQ_CORTEX0 S5P_IRQ_VIC1(0) | ||
33 | #define IRQ_CORTEX1 S5P_IRQ_VIC1(1) | ||
34 | #define IRQ_CORTEX2 S5P_IRQ_VIC1(2) | ||
35 | #define IRQ_CORTEX3 S5P_IRQ_VIC1(3) | ||
36 | #define IRQ_CORTEX4 S5P_IRQ_VIC1(4) | ||
37 | #define IRQ_IEMAPC S5P_IRQ_VIC1(5) | ||
38 | #define IRQ_IEMIEC S5P_IRQ_VIC1(6) | ||
39 | #define IRQ_ONENAND S5P_IRQ_VIC1(7) | ||
40 | #define IRQ_NFC S5P_IRQ_VIC1(8) | ||
41 | #define IRQ_CFC S5P_IRQ_VIC1(9) | ||
42 | #define IRQ_UART0 S5P_IRQ_VIC1(10) | ||
43 | #define IRQ_UART1 S5P_IRQ_VIC1(11) | ||
44 | #define IRQ_UART2 S5P_IRQ_VIC1(12) | ||
45 | #define IRQ_UART3 S5P_IRQ_VIC1(13) | ||
46 | #define IRQ_IIC S5P_IRQ_VIC1(14) | ||
47 | #define IRQ_SPI0 S5P_IRQ_VIC1(15) | ||
48 | #define IRQ_SPI1 S5P_IRQ_VIC1(16) | ||
49 | #define IRQ_SPI2 S5P_IRQ_VIC1(17) | ||
50 | #define IRQ_IRDA S5P_IRQ_VIC1(18) | ||
51 | #define IRQ_CAN0 S5P_IRQ_VIC1(19) | ||
52 | #define IRQ_CAN1 S5P_IRQ_VIC1(20) | ||
53 | #define IRQ_HSIRX S5P_IRQ_VIC1(21) | ||
54 | #define IRQ_HSITX S5P_IRQ_VIC1(22) | ||
55 | #define IRQ_UHOST S5P_IRQ_VIC1(23) | ||
56 | #define IRQ_OTG S5P_IRQ_VIC1(24) | ||
57 | #define IRQ_MSM S5P_IRQ_VIC1(25) | ||
58 | #define IRQ_HSMMC0 S5P_IRQ_VIC1(26) | ||
59 | #define IRQ_HSMMC1 S5P_IRQ_VIC1(27) | ||
60 | #define IRQ_HSMMC2 S5P_IRQ_VIC1(28) | ||
61 | #define IRQ_MIPICSI S5P_IRQ_VIC1(29) | ||
62 | #define IRQ_MIPIDSI S5P_IRQ_VIC1(30) | ||
63 | |||
64 | /* VIC2: multimedia, audio, security */ | ||
65 | #define IRQ_LCD0 S5P_IRQ_VIC2(0) | ||
66 | #define IRQ_LCD1 S5P_IRQ_VIC2(1) | ||
67 | #define IRQ_LCD2 S5P_IRQ_VIC2(2) | ||
68 | #define IRQ_LCD3 S5P_IRQ_VIC2(3) | ||
69 | #define IRQ_ROTATOR S5P_IRQ_VIC2(4) | ||
70 | #define IRQ_FIMC0 S5P_IRQ_VIC2(5) | ||
71 | #define IRQ_FIMC1 S5P_IRQ_VIC2(6) | ||
72 | #define IRQ_FIMC2 S5P_IRQ_VIC2(7) | ||
73 | #define IRQ_JPEG S5P_IRQ_VIC2(8) | ||
74 | #define IRQ_2D S5P_IRQ_VIC2(9) | ||
75 | #define IRQ_3D S5P_IRQ_VIC2(10) | ||
76 | #define IRQ_MIXER S5P_IRQ_VIC2(11) | ||
77 | #define IRQ_HDMI S5P_IRQ_VIC2(12) | ||
78 | #define IRQ_IIC1 S5P_IRQ_VIC2(13) | ||
79 | #define IRQ_MFC S5P_IRQ_VIC2(14) | ||
80 | #define IRQ_TVENC S5P_IRQ_VIC2(15) | ||
81 | #define IRQ_I2S0 S5P_IRQ_VIC2(16) | ||
82 | #define IRQ_I2S1 S5P_IRQ_VIC2(17) | ||
83 | #define IRQ_I2S2 S5P_IRQ_VIC2(18) | ||
84 | #define IRQ_AC97 S5P_IRQ_VIC2(19) | ||
85 | #define IRQ_PCM0 S5P_IRQ_VIC2(20) | ||
86 | #define IRQ_PCM1 S5P_IRQ_VIC2(21) | ||
87 | #define IRQ_SPDIF S5P_IRQ_VIC2(22) | ||
88 | #define IRQ_ADC S5P_IRQ_VIC2(23) | ||
89 | #define IRQ_PENDN S5P_IRQ_VIC2(24) | ||
90 | #define IRQ_TC IRQ_PENDN | ||
91 | #define IRQ_KEYPAD S5P_IRQ_VIC2(25) | ||
92 | #define IRQ_CG S5P_IRQ_VIC2(26) | ||
93 | #define IRQ_SEC S5P_IRQ_VIC2(27) | ||
94 | #define IRQ_SECRX S5P_IRQ_VIC2(28) | ||
95 | #define IRQ_SECTX S5P_IRQ_VIC2(29) | ||
96 | #define IRQ_SDMIRQ S5P_IRQ_VIC2(30) | ||
97 | #define IRQ_SDMFIQ S5P_IRQ_VIC2(31) | ||
98 | #define IRQ_VIC_END S5P_IRQ_VIC2(31) | ||
99 | |||
100 | #define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1) | ||
101 | |||
102 | #define IRQ_EINT(x) ((x) < 16 ? S5P_IRQ_VIC0(x) : \ | ||
103 | (S5P_IRQ_EINT_BASE + (x)-16)) | ||
104 | |||
105 | #define S3C_IRQ_GPIO_BASE (IRQ_EINT(31) + 1) | ||
106 | #define S3C_IRQ_GPIO(x) (S3C_IRQ_GPIO_BASE + (x)) | ||
107 | |||
108 | /* Until MP04 Groups -> 40 (exactly 39) Groups * 8 ~= 320 GPIOs */ | ||
109 | #define NR_IRQS (S3C_IRQ_GPIO(320) + 1) | ||
110 | |||
111 | /* Compatibility */ | ||
15 | #define IRQ_LCD_FIFO IRQ_LCD0 | 112 | #define IRQ_LCD_FIFO IRQ_LCD0 |
16 | #define IRQ_LCD_VSYNC IRQ_LCD1 | 113 | #define IRQ_LCD_VSYNC IRQ_LCD1 |
17 | #define IRQ_LCD_SYSTEM IRQ_LCD2 | 114 | #define IRQ_LCD_SYSTEM IRQ_LCD2 |
18 | 115 | ||
19 | #endif /* __ASM_ARCH_IRQ_H */ | 116 | #endif /* __ASM_ARCH_IRQS_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h index 4681ebe8bef6..6428f4898202 100644 --- a/arch/arm/mach-s5pc100/include/mach/map.h +++ b/arch/arm/mach-s5pc100/include/mach/map.h | |||
@@ -3,9 +3,7 @@ | |||
3 | * Copyright 2009 Samsung Electronics Co. | 3 | * Copyright 2009 Samsung Electronics Co. |
4 | * Byungho Min <bhmin@samsung.com> | 4 | * Byungho Min <bhmin@samsung.com> |
5 | * | 5 | * |
6 | * Based on mach-s3c6400/include/mach/map.h | 6 | * S5PC100 - Memory map definitions |
7 | * | ||
8 | * S5PC1XX - Memory map definitions | ||
9 | * | 7 | * |
10 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
@@ -16,135 +14,59 @@ | |||
16 | #define __ASM_ARCH_MAP_H __FILE__ | 14 | #define __ASM_ARCH_MAP_H __FILE__ |
17 | 15 | ||
18 | #include <plat/map-base.h> | 16 | #include <plat/map-base.h> |
17 | #include <plat/map-s5p.h> | ||
19 | 18 | ||
20 | /* | ||
21 | * map-base.h has already defined virtual memory address | ||
22 | * S3C_VA_IRQ S3C_ADDR(0x00000000) irq controller(s) | ||
23 | * S3C_VA_SYS S3C_ADDR(0x00100000) system control | ||
24 | * S3C_VA_MEM S3C_ADDR(0x00200000) system control (not used) | ||
25 | * S3C_VA_TIMER S3C_ADDR(0x00300000) timer block | ||
26 | * S3C_VA_WATCHDOG S3C_ADDR(0x00400000) watchdog | ||
27 | * S3C_VA_UART S3C_ADDR(0x01000000) UART | ||
28 | * | ||
29 | * S5PC100 specific virtual memory address can be defined here | ||
30 | * S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) GPIO | ||
31 | * | ||
32 | */ | ||
33 | |||
34 | /* Chip ID */ | ||
35 | #define S5PC100_PA_CHIPID (0xE0000000) | 19 | #define S5PC100_PA_CHIPID (0xE0000000) |
36 | #define S5PC1XX_PA_CHIPID S5PC100_PA_CHIPID | 20 | #define S5P_PA_CHIPID S5PC100_PA_CHIPID |
37 | #define S5PC1XX_VA_CHIPID S3C_VA_SYS | 21 | |
38 | 22 | #define S5PC100_PA_SYSCON (0xE0100000) | |
39 | /* System */ | 23 | #define S5P_PA_SYSCON S5PC100_PA_SYSCON |
40 | #define S5PC100_PA_CLK (0xE0100000) | 24 | |
41 | #define S5PC100_PA_CLK_OTHER (0xE0200000) | 25 | #define S5PC100_PA_OTHERS (0xE0200000) |
42 | #define S5PC100_PA_PWR (0xE0108000) | 26 | #define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000) |
43 | #define S5PC1XX_PA_CLK S5PC100_PA_CLK | 27 | |
44 | #define S5PC1XX_PA_PWR S5PC100_PA_PWR | ||
45 | #define S5PC1XX_PA_CLK_OTHER S5PC100_PA_CLK_OTHER | ||
46 | #define S5PC1XX_VA_CLK (S3C_VA_SYS + 0x10000) | ||
47 | #define S5PC1XX_VA_PWR (S3C_VA_SYS + 0x20000) | ||
48 | #define S5PC1XX_VA_CLK_OTHER (S3C_VA_SYS + 0x30000) | ||
49 | |||
50 | /* GPIO */ | ||
51 | #define S5PC100_PA_GPIO (0xE0300000) | 28 | #define S5PC100_PA_GPIO (0xE0300000) |
52 | #define S5PC1XX_PA_GPIO S5PC100_PA_GPIO | 29 | #define S5P_PA_GPIO S5PC100_PA_GPIO |
53 | #define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) | ||
54 | |||
55 | /* Interrupt */ | ||
56 | #define S5PC100_PA_VIC (0xE4000000) | ||
57 | #define S5PC100_VA_VIC S3C_VA_IRQ | ||
58 | #define S5PC100_PA_VIC_OFFSET 0x100000 | ||
59 | #define S5PC100_VA_VIC_OFFSET 0x10000 | ||
60 | #define S5PC1XX_PA_VIC(x) (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET)) | ||
61 | #define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET)) | ||
62 | |||
63 | /* DMA */ | ||
64 | #define S5PC100_PA_MDMA (0xE8100000) | ||
65 | #define S5PC100_PA_PDMA0 (0xE9000000) | ||
66 | #define S5PC100_PA_PDMA1 (0xE9200000) | ||
67 | |||
68 | /* Timer */ | ||
69 | #define S5PC100_PA_TIMER (0xEA000000) | ||
70 | #define S5PC1XX_PA_TIMER S5PC100_PA_TIMER | ||
71 | #define S5PC1XX_VA_TIMER S3C_VA_TIMER | ||
72 | 30 | ||
73 | /* RTC */ | 31 | #define S5PC100_PA_VIC0 (0xE4000000) |
74 | #define S5PC100_PA_RTC (0xEA300000) | 32 | #define S5P_PA_VIC0 S5PC100_PA_VIC0 |
75 | 33 | ||
76 | /* UART */ | 34 | #define S5PC100_PA_VIC1 (0xE4100000) |
77 | #define S5PC100_PA_UART (0xEC000000) | 35 | #define S5P_PA_VIC1 S5PC100_PA_VIC1 |
78 | #define S5PC1XX_PA_UART S5PC100_PA_UART | ||
79 | #define S5PC1XX_VA_UART S3C_VA_UART | ||
80 | 36 | ||
81 | /* I2C */ | 37 | #define S5PC100_PA_VIC2 (0xE4200000) |
82 | #define S5PC100_PA_I2C (0xEC100000) | 38 | #define S5P_PA_VIC2 S5PC100_PA_VIC2 |
83 | #define S5PC100_PA_I2C1 (0xEC200000) | ||
84 | 39 | ||
85 | /* USB HS OTG */ | 40 | #define S5PC100_PA_TIMER (0xEA000000) |
86 | #define S5PC100_PA_USB_HSOTG (0xED200000) | 41 | #define S5P_PA_TIMER S5PC100_PA_TIMER |
87 | #define S5PC100_PA_USB_HSPHY (0xED300000) | ||
88 | 42 | ||
89 | /* SD/MMC */ | 43 | #define S5PC100_PA_SYSTIMER (0xEA100000) |
90 | #define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) | ||
91 | #define S5PC100_PA_HSMMC0 S5PC100_PA_HSMMC(0) | ||
92 | #define S5PC100_PA_HSMMC1 S5PC100_PA_HSMMC(1) | ||
93 | #define S5PC100_PA_HSMMC2 S5PC100_PA_HSMMC(2) | ||
94 | 44 | ||
95 | /* LCD */ | 45 | #define S5PC100_PA_UART (0xEC000000) |
96 | #define S5PC100_PA_FB (0xEE000000) | ||
97 | 46 | ||
98 | /* Multimedia */ | 47 | #define S5P_PA_UART0 (S5PC100_PA_UART + 0x0) |
99 | #define S5PC100_PA_G2D (0xEE800000) | 48 | #define S5P_PA_UART1 (S5PC100_PA_UART + 0x400) |
100 | #define S5PC100_PA_JPEG (0xEE500000) | 49 | #define S5P_PA_UART2 (S5PC100_PA_UART + 0x800) |
101 | #define S5PC100_PA_ROTATOR (0xEE100000) | 50 | #define S5P_PA_UART3 (S5PC100_PA_UART + 0xC00) |
102 | #define S5PC100_PA_G3D (0xEF000000) | 51 | #define S5P_SZ_UART SZ_256 |
103 | 52 | ||
104 | /* I2S */ | 53 | #define S5PC100_PA_IIC0 (0xEC100000) |
105 | #define S5PC100_PA_I2S0 (0xF2000000) | 54 | #define S5PC100_PA_IIC1 (0xEC200000) |
106 | #define S5PC100_PA_I2S1 (0xF2100000) | ||
107 | #define S5PC100_PA_I2S2 (0xF2200000) | ||
108 | 55 | ||
109 | /* KEYPAD */ | 56 | #define S5PC100_PA_FB (0xEE000000) |
110 | #define S5PC100_PA_KEYPAD (0xF3100000) | ||
111 | 57 | ||
112 | /* ADC & TouchScreen */ | 58 | #define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) |
113 | #define S5PC100_PA_TSADC (0xF3000000) | ||
114 | 59 | ||
115 | /* ETC */ | ||
116 | #define S5PC100_PA_SDRAM (0x20000000) | 60 | #define S5PC100_PA_SDRAM (0x20000000) |
117 | #define S5PC1XX_PA_SDRAM S5PC100_PA_SDRAM | 61 | #define S5P_PA_SDRAM S5PC100_PA_SDRAM |
118 | 62 | ||
119 | /* compatibility defines. */ | 63 | /* compatibiltiy defines. */ |
120 | #define S3C_PA_RTC S5PC100_PA_RTC | ||
121 | #define S3C_PA_UART S5PC100_PA_UART | 64 | #define S3C_PA_UART S5PC100_PA_UART |
122 | #define S3C_PA_UART0 (S5PC100_PA_UART + 0x0) | 65 | #define S3C_PA_IIC S5PC100_PA_IIC0 |
123 | #define S3C_PA_UART1 (S5PC100_PA_UART + 0x400) | 66 | #define S3C_PA_IIC1 S5PC100_PA_IIC1 |
124 | #define S3C_PA_UART2 (S5PC100_PA_UART + 0x800) | ||
125 | #define S3C_PA_UART3 (S5PC100_PA_UART + 0xC00) | ||
126 | #define S3C_VA_UART0 (S3C_VA_UART + 0x0) | ||
127 | #define S3C_VA_UART1 (S3C_VA_UART + 0x400) | ||
128 | #define S3C_VA_UART2 (S3C_VA_UART + 0x800) | ||
129 | #define S3C_VA_UART3 (S3C_VA_UART + 0xC00) | ||
130 | #define S3C_UART_OFFSET 0x400 | ||
131 | #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) | ||
132 | #define S3C_PA_FB S5PC100_PA_FB | 67 | #define S3C_PA_FB S5PC100_PA_FB |
133 | #define S3C_PA_G2D S5PC100_PA_G2D | 68 | #define S3C_PA_HSMMC0 S5PC100_PA_HSMMC(0) |
134 | #define S3C_PA_G3D S5PC100_PA_G3D | 69 | #define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1) |
135 | #define S3C_PA_JPEG S5PC100_PA_JPEG | 70 | #define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2) |
136 | #define S3C_PA_ROTATOR S5PC100_PA_ROTATOR | 71 | |
137 | #define S3C_VA_VIC0 (S3C_VA_IRQ + 0x0) | 72 | #endif /* __ASM_ARCH_MAP_H */ |
138 | #define S3C_VA_VIC1 (S3C_VA_IRQ + 0x10000) | ||
139 | #define S3C_VA_VIC2 (S3C_VA_IRQ + 0x20000) | ||
140 | #define S3C_PA_IIC S5PC100_PA_I2C | ||
141 | #define S3C_PA_IIC1 S5PC100_PA_I2C1 | ||
142 | #define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG | ||
143 | #define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY | ||
144 | #define S3C_PA_HSMMC0 S5PC100_PA_HSMMC0 | ||
145 | #define S3C_PA_HSMMC1 S5PC100_PA_HSMMC1 | ||
146 | #define S3C_PA_HSMMC2 S5PC100_PA_HSMMC2 | ||
147 | #define S3C_PA_KEYPAD S5PC100_PA_KEYPAD | ||
148 | #define S3C_PA_TSADC S5PC100_PA_TSADC | ||
149 | |||
150 | #endif /* __ASM_ARCH_C100_MAP_H */ | ||
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-clock.h b/arch/arm/mach-s5pc100/include/mach/regs-clock.h index f2283bdc941e..5d27d286d504 100644 --- a/arch/arm/mach-s5pc100/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pc100/include/mach/regs-clock.h | |||
@@ -17,6 +17,8 @@ | |||
17 | 17 | ||
18 | #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) | 18 | #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) |
19 | 19 | ||
20 | #define S5PC100_REG_OTHERS(x) (S5PC100_VA_OTHERS + (x)) | ||
21 | |||
20 | #define S5P_APLL_LOCK S5P_CLKREG(0x00) | 22 | #define S5P_APLL_LOCK S5P_CLKREG(0x00) |
21 | #define S5P_MPLL_LOCK S5P_CLKREG(0x04) | 23 | #define S5P_MPLL_LOCK S5P_CLKREG(0x04) |
22 | #define S5P_EPLL_LOCK S5P_CLKREG(0x08) | 24 | #define S5P_EPLL_LOCK S5P_CLKREG(0x08) |
@@ -68,4 +70,8 @@ | |||
68 | #define S5P_CLKDIV1_PCLKD1_MASK (0x7<<16) | 70 | #define S5P_CLKDIV1_PCLKD1_MASK (0x7<<16) |
69 | #define S5P_CLKDIV1_PCLKD1_SHIFT (16) | 71 | #define S5P_CLKDIV1_PCLKD1_SHIFT (16) |
70 | 72 | ||
73 | #define S5PC100_SWRESET S5PC100_REG_OTHERS(0x000) | ||
74 | |||
75 | #define S5PC100_SWRESET_RESETVAL 0xc100 | ||
76 | |||
71 | #endif /* __ASM_ARCH_REGS_CLOCK_H */ | 77 | #endif /* __ASM_ARCH_REGS_CLOCK_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h index 68666913354c..cd6200adabce 100644 --- a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h +++ b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* linux/arch/arm/plat-s5pc1xx/include/plat/regs-gpio.h | 1 | /* linux/arch/arm/plat-s5pc100/include/plat/regs-gpio.h |
2 | * | 2 | * |
3 | * Copyright 2009 Samsung Electronics Co. | 3 | * Copyright 2009 Samsung Electronics Co. |
4 | * Byungho Min <bhmin@samsung.com> | 4 | * Byungho Min <bhmin@samsung.com> |
@@ -12,7 +12,7 @@ | |||
12 | #include <mach/map.h> | 12 | #include <mach/map.h> |
13 | 13 | ||
14 | /* S5PC100 */ | 14 | /* S5PC100 */ |
15 | #define S5PC100_GPIO_BASE S5PC1XX_VA_GPIO | 15 | #define S5PC100_GPIO_BASE S5P_VA_GPIO |
16 | #define S5PC100_GPA0_BASE (S5PC100_GPIO_BASE + 0x0000) | 16 | #define S5PC100_GPA0_BASE (S5PC100_GPIO_BASE + 0x0000) |
17 | #define S5PC100_GPA1_BASE (S5PC100_GPIO_BASE + 0x0020) | 17 | #define S5PC100_GPA1_BASE (S5PC100_GPIO_BASE + 0x0020) |
18 | #define S5PC100_GPB_BASE (S5PC100_GPIO_BASE + 0x0040) | 18 | #define S5PC100_GPB_BASE (S5PC100_GPIO_BASE + 0x0040) |
@@ -60,7 +60,7 @@ | |||
60 | 60 | ||
61 | /* Common part */ | 61 | /* Common part */ |
62 | /* External interrupt base is same at both s5pc100 and s5pc110 */ | 62 | /* External interrupt base is same at both s5pc100 and s5pc110 */ |
63 | #define S5PC1XX_EINT_BASE (S5PC100_EINT_BASE) | 63 | #define S5P_EINT_BASE (S5PC100_EINT_BASE) |
64 | 64 | ||
65 | #define S5PC100_GPx_INPUT(__gpio) (0x0 << ((__gpio) * 4)) | 65 | #define S5PC100_GPx_INPUT(__gpio) (0x0 << ((__gpio) * 4)) |
66 | #define S5PC100_GPx_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) | 66 | #define S5PC100_GPx_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) |
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-irq.h b/arch/arm/mach-s5pc100/include/mach/regs-irq.h index 751ac15438c8..4d9036d0f288 100644 --- a/arch/arm/mach-s5pc100/include/mach/regs-irq.h +++ b/arch/arm/mach-s5pc100/include/mach/regs-irq.h | |||
@@ -3,7 +3,7 @@ | |||
3 | * Copyright 2009 Samsung Electronics Co. | 3 | * Copyright 2009 Samsung Electronics Co. |
4 | * Byungho Min <bhmin@samsung.com> | 4 | * Byungho Min <bhmin@samsung.com> |
5 | * | 5 | * |
6 | * S5PC1XX - IRQ register definitions | 6 | * S5PC100 - IRQ register definitions |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
@@ -16,9 +16,4 @@ | |||
16 | #include <mach/map.h> | 16 | #include <mach/map.h> |
17 | #include <asm/hardware/vic.h> | 17 | #include <asm/hardware/vic.h> |
18 | 18 | ||
19 | /* interrupt controller */ | ||
20 | #define S5PC1XX_VIC0REG(x) ((x) + S5PC1XX_VA_VIC(0)) | ||
21 | #define S5PC1XX_VIC1REG(x) ((x) + S5PC1XX_VA_VIC(1)) | ||
22 | #define S5PC1XX_VIC2REG(x) ((x) + S5PC1XX_VA_VIC(2)) | ||
23 | |||
24 | #endif /* __ASM_ARCH_REGS_IRQ_H */ | 19 | #endif /* __ASM_ARCH_REGS_IRQ_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h index f0d31a2a598c..681f626a9ae1 100644 --- a/arch/arm/mach-s5pc100/include/mach/system.h +++ b/arch/arm/mach-s5pc100/include/mach/system.h | |||
@@ -3,7 +3,7 @@ | |||
3 | * Copyright 2009 Samsung Electronics Co. | 3 | * Copyright 2009 Samsung Electronics Co. |
4 | * Byungho Min <bhmin@samsung.com> | 4 | * Byungho Min <bhmin@samsung.com> |
5 | * | 5 | * |
6 | * S5PC1XX - system implementation | 6 | * S5PC100 - system implementation |
7 | * | 7 | * |
8 | * Based on mach-s3c6400/include/mach/system.h | 8 | * Based on mach-s3c6400/include/mach/system.h |
9 | */ | 9 | */ |
@@ -13,14 +13,11 @@ | |||
13 | 13 | ||
14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
15 | #include <mach/map.h> | 15 | #include <mach/map.h> |
16 | #include <plat/regs-clock.h> | 16 | #include <mach/regs-clock.h> |
17 | |||
18 | void (*s5pc1xx_idle)(void); | ||
19 | 17 | ||
20 | static void arch_idle(void) | 18 | static void arch_idle(void) |
21 | { | 19 | { |
22 | if (s5pc1xx_idle) | 20 | /* nothing here yet */ |
23 | s5pc1xx_idle(); | ||
24 | } | 21 | } |
25 | 22 | ||
26 | static void arch_reset(char mode, const char *cmd) | 23 | static void arch_reset(char mode, const char *cmd) |
diff --git a/arch/arm/mach-s5pc100/include/mach/tick.h b/arch/arm/mach-s5pc100/include/mach/tick.h index f338c9eec717..20f68730ed18 100644 --- a/arch/arm/mach-s5pc100/include/mach/tick.h +++ b/arch/arm/mach-s5pc100/include/mach/tick.h | |||
@@ -20,8 +20,8 @@ | |||
20 | */ | 20 | */ |
21 | static inline u32 s3c24xx_ostimer_pending(void) | 21 | static inline u32 s3c24xx_ostimer_pending(void) |
22 | { | 22 | { |
23 | u32 pend = __raw_readl(S3C_VA_VIC0 + VIC_RAW_STATUS); | 23 | u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS); |
24 | return pend & 1 << (IRQ_TIMER4_VIC - S5PC1XX_IRQ_VIC0(0)); | 24 | return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0))); |
25 | } | 25 | } |
26 | 26 | ||
27 | #define TICK_MAX (0xffffffff) | 27 | #define TICK_MAX (0xffffffff) |
diff --git a/arch/arm/plat-s5pc1xx/s5pc100-init.c b/arch/arm/mach-s5pc100/init.c index c58710884ceb..19d7b523c137 100644 --- a/arch/arm/plat-s5pc1xx/s5pc100-init.c +++ b/arch/arm/mach-s5pc100/init.c | |||
@@ -1,9 +1,8 @@ | |||
1 | /* linux/arch/arm/plat-s5pc1xx/s5pc100-init.c | 1 | /* linux/arch/arm/plat-s5pc100/s5pc100-init.c |
2 | * | 2 | * |
3 | * Copyright 2009 Samsung Electronics Co. | 3 | * Copyright 2009 Samsung Electronics Co. |
4 | * Byungho Min <bhmin@samsung.com> | 4 | * Byungho Min <bhmin@samsung.com> |
5 | * | 5 | * |
6 | * S5PC100 - CPU initialisation (common with other S5PC1XX chips) | ||
7 | * | 6 | * |
8 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
@@ -19,9 +18,7 @@ | |||
19 | #include <plat/s5pc100.h> | 18 | #include <plat/s5pc100.h> |
20 | 19 | ||
21 | /* uart registration process */ | 20 | /* uart registration process */ |
22 | |||
23 | void __init s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) | 21 | void __init s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) |
24 | { | 22 | { |
25 | /* The driver name is s3c6400-uart to reuse s3c6400_serial_drv */ | 23 | s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); |
26 | s3c24xx_init_uartdevs("s3c6400-uart", s5pc1xx_uart_resources, cfg, no); | ||
27 | } | 24 | } |
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c index b6f8a58cf94c..a95d8f7d36d1 100644 --- a/arch/arm/mach-s5pc100/mach-smdkc100.c +++ b/arch/arm/mach-s5pc100/mach-smdkc100.c | |||
@@ -149,8 +149,6 @@ static struct s3c_fb_platdata smdkc100_lcd_pdata __initdata = { | |||
149 | .setup_gpio = s5pc100_fb_gpio_setup_24bpp, | 149 | .setup_gpio = s5pc100_fb_gpio_setup_24bpp, |
150 | }; | 150 | }; |
151 | 151 | ||
152 | static struct map_desc smdkc100_iodesc[] = {}; | ||
153 | |||
154 | static struct platform_device *smdkc100_devices[] __initdata = { | 152 | static struct platform_device *smdkc100_devices[] __initdata = { |
155 | &s3c_device_i2c0, | 153 | &s3c_device_i2c0, |
156 | &s3c_device_i2c1, | 154 | &s3c_device_i2c1, |
@@ -163,7 +161,7 @@ static struct platform_device *smdkc100_devices[] __initdata = { | |||
163 | 161 | ||
164 | static void __init smdkc100_map_io(void) | 162 | static void __init smdkc100_map_io(void) |
165 | { | 163 | { |
166 | s5pc1xx_init_io(smdkc100_iodesc, ARRAY_SIZE(smdkc100_iodesc)); | 164 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); |
167 | s3c24xx_init_clocks(12000000); | 165 | s3c24xx_init_clocks(12000000); |
168 | s3c24xx_init_uarts(smdkc100_uartcfgs, ARRAY_SIZE(smdkc100_uartcfgs)); | 166 | s3c24xx_init_uarts(smdkc100_uartcfgs, ARRAY_SIZE(smdkc100_uartcfgs)); |
169 | } | 167 | } |
@@ -187,10 +185,9 @@ static void __init smdkc100_machine_init(void) | |||
187 | 185 | ||
188 | MACHINE_START(SMDKC100, "SMDKC100") | 186 | MACHINE_START(SMDKC100, "SMDKC100") |
189 | /* Maintainer: Byungho Min <bhmin@samsung.com> */ | 187 | /* Maintainer: Byungho Min <bhmin@samsung.com> */ |
190 | .phys_io = S5PC100_PA_UART & 0xfff00000, | 188 | .phys_io = S3C_PA_UART & 0xfff00000, |
191 | .io_pg_offst = (((u32)S5PC1XX_VA_UART) >> 18) & 0xfffc, | 189 | .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, |
192 | .boot_params = S5PC100_PA_SDRAM + 0x100, | 190 | .boot_params = S5P_PA_SDRAM + 0x100, |
193 | |||
194 | .init_irq = s5pc100_init_irq, | 191 | .init_irq = s5pc100_init_irq, |
195 | .map_io = smdkc100_map_io, | 192 | .map_io = smdkc100_map_io, |
196 | .init_machine = smdkc100_machine_init, | 193 | .init_machine = smdkc100_machine_init, |
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig index 92bd75607b43..189be6e95226 100644 --- a/arch/arm/plat-s5p/Kconfig +++ b/arch/arm/plat-s5p/Kconfig | |||
@@ -7,7 +7,7 @@ | |||
7 | 7 | ||
8 | config PLAT_S5P | 8 | config PLAT_S5P |
9 | bool | 9 | bool |
10 | depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210) | 10 | depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210) |
11 | default y | 11 | default y |
12 | select ARM_VIC | 12 | select ARM_VIC |
13 | select NO_IOPORT | 13 | select NO_IOPORT |
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c index f92e5de3a755..75cb8c37ca2c 100644 --- a/arch/arm/plat-s5p/cpu.c +++ b/arch/arm/plat-s5p/cpu.c | |||
@@ -19,12 +19,14 @@ | |||
19 | #include <plat/cpu.h> | 19 | #include <plat/cpu.h> |
20 | #include <plat/s5p6440.h> | 20 | #include <plat/s5p6440.h> |
21 | #include <plat/s5p6442.h> | 21 | #include <plat/s5p6442.h> |
22 | #include <plat/s5pc100.h> | ||
22 | #include <plat/s5pv210.h> | 23 | #include <plat/s5pv210.h> |
23 | 24 | ||
24 | /* table of supported CPUs */ | 25 | /* table of supported CPUs */ |
25 | 26 | ||
26 | static const char name_s5p6440[] = "S5P6440"; | 27 | static const char name_s5p6440[] = "S5P6440"; |
27 | static const char name_s5p6442[] = "S5P6442"; | 28 | static const char name_s5p6442[] = "S5P6442"; |
29 | static const char name_s5pc100[] = "S5PC100"; | ||
28 | static const char name_s5pv210[] = "S5PV210/S5PC110"; | 30 | static const char name_s5pv210[] = "S5PV210/S5PC110"; |
29 | 31 | ||
30 | static struct cpu_table cpu_ids[] __initdata = { | 32 | static struct cpu_table cpu_ids[] __initdata = { |
@@ -45,6 +47,14 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
45 | .init = s5p6442_init, | 47 | .init = s5p6442_init, |
46 | .name = name_s5p6442, | 48 | .name = name_s5p6442, |
47 | }, { | 49 | }, { |
50 | .idcode = 0x43100000, | ||
51 | .idmask = 0xfffff000, | ||
52 | .map_io = s5pc100_map_io, | ||
53 | .init_clocks = s5pc100_init_clocks, | ||
54 | .init_uarts = s5pc100_init_uarts, | ||
55 | .init = s5pc100_init, | ||
56 | .name = name_s5pc100, | ||
57 | }, { | ||
48 | .idcode = 0x43110000, | 58 | .idcode = 0x43110000, |
49 | .idmask = 0xfffff000, | 59 | .idmask = 0xfffff000, |
50 | .map_io = s5pv210_map_io, | 60 | .map_io = s5pv210_map_io, |
diff --git a/arch/arm/plat-s5p/include/plat/s5pc100.h b/arch/arm/plat-s5p/include/plat/s5pc100.h new file mode 100644 index 000000000000..5f6099dd7cad --- /dev/null +++ b/arch/arm/plat-s5p/include/plat/s5pc100.h | |||
@@ -0,0 +1,33 @@ | |||
1 | /* arch/arm/plat-s5p/include/plat/s5pc100.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Header file for s5pc100 cpu support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* Common init code for S5PC100 related SoCs */ | ||
14 | |||
15 | extern void s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
16 | extern void s5pc100_register_clocks(void); | ||
17 | extern void s5pc100_setup_clocks(void); | ||
18 | |||
19 | #ifdef CONFIG_CPU_S5PC100 | ||
20 | |||
21 | extern int s5pc100_init(void); | ||
22 | extern void s5pc100_init_irq(void); | ||
23 | extern void s5pc100_map_io(void); | ||
24 | extern void s5pc100_init_clocks(int xtal); | ||
25 | |||
26 | #define s5pc100_init_uarts s5pc100_common_init_uarts | ||
27 | |||
28 | #else | ||
29 | #define s5pc100_init_clocks NULL | ||
30 | #define s5pc100_init_uarts NULL | ||
31 | #define s5pc100_map_io NULL | ||
32 | #define s5pc100_init NULL | ||
33 | #endif | ||
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 229919e9744c..1077ebebfb03 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig | |||
@@ -6,7 +6,7 @@ | |||
6 | 6 | ||
7 | config PLAT_SAMSUNG | 7 | config PLAT_SAMSUNG |
8 | bool | 8 | bool |
9 | depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX || ARCH_S5PC1XX | 9 | depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX |
10 | select NO_IOPORT | 10 | select NO_IOPORT |
11 | default y | 11 | default y |
12 | help | 12 | help |