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-rw-r--r--arch/arm/Kconfig11
-rw-r--r--arch/arm/include/asm/processor.h2
2 files changed, 12 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ec0f6589af05..d3f2de37a4b7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1213,6 +1213,17 @@ config ARM_ERRATA_754322
1213 the new ASID. This workaround places two dsb instructions in the mm 1213 the new ASID. This workaround places two dsb instructions in the mm
1214 switching code so that no page table walks can cross the ASID switch. 1214 switching code so that no page table walks can cross the ASID switch.
1215 1215
1216config ARM_ERRATA_754327
1217 bool "ARM errata: no automatic Store Buffer drain"
1218 depends on CPU_V7 && SMP
1219 help
1220 This option enables the workaround for the 754327 Cortex-A9 (prior to
1221 r2p0) erratum. The Store Buffer does not have any automatic draining
1222 mechanism and therefore a livelock may occur if an external agent
1223 continuously polls a memory location waiting to observe an update.
1224 This workaround defines cpu_relax() as smp_mb(), preventing correctly
1225 written polling loops from denying visibility of updates to memory.
1226
1216endmenu 1227endmenu
1217 1228
1218source "arch/arm/common/Kconfig" 1229source "arch/arm/common/Kconfig"
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index 67357baaeeeb..7a1f03c10f1b 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -95,7 +95,7 @@ extern void release_thread(struct task_struct *);
95 95
96unsigned long get_wchan(struct task_struct *p); 96unsigned long get_wchan(struct task_struct *p);
97 97
98#if __LINUX_ARM_ARCH__ == 6 98#if __LINUX_ARM_ARCH__ == 6 || defined(CONFIG_ARM_ERRATA_754327)
99#define cpu_relax() smp_mb() 99#define cpu_relax() smp_mb()
100#else 100#else
101#define cpu_relax() barrier() 101#define cpu_relax() barrier()