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-rw-r--r--arch/arm/Kconfig34
-rw-r--r--arch/arm/common/gic.c28
-rw-r--r--arch/arm/include/asm/hardware/it8152.h2
-rw-r--r--arch/arm/kernel/hw_breakpoint.c3
-rw-r--r--arch/arm/kernel/perf_event.c2
-rw-r--r--arch/arm/kernel/stacktrace.c2
-rw-r--r--arch/arm/kernel/traps.c5
-rw-r--r--arch/arm/kernel/unwind.c2
-rw-r--r--arch/arm/mach-ep93xx/include/mach/dma.h111
-rw-r--r--arch/arm/mach-kirkwood/common.c7
-rw-r--r--arch/arm/mach-kirkwood/d2net_v2-setup.c2
-rw-r--r--arch/arm/mach-kirkwood/lacie_v2-common.c14
-rw-r--r--arch/arm/mach-kirkwood/lacie_v2-common.h2
-rw-r--r--arch/arm/mach-kirkwood/mpp.c4
-rw-r--r--arch/arm/mach-kirkwood/netspace_v2-setup.c6
-rw-r--r--arch/arm/mach-kirkwood/netxbig_v2-setup.c4
-rw-r--r--arch/arm/mach-kirkwood/ts41x-setup.c14
-rw-r--r--arch/arm/mach-mmp/include/mach/cputype.h3
-rw-r--r--arch/arm/mach-mv78xx0/mpp.c4
-rw-r--r--arch/arm/mach-omap1/devices.c5
-rw-r--r--arch/arm/mach-omap1/include/mach/camera.h2
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c3
-rw-r--r--arch/arm/mach-orion5x/mpp.c4
-rw-r--r--arch/arm/mach-orion5x/ts78xx-setup.c2
-rw-r--r--arch/arm/mach-pxa/cm-x2xx.c2
-rw-r--r--arch/arm/mach-pxa/saar.c2
-rw-r--r--arch/arm/mach-s3c64xx/Kconfig2
-rw-r--r--arch/arm/mach-shmobile/Kconfig2
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c52
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c102
-rw-r--r--arch/arm/mach-shmobile/include/mach/gpio.h4
-rw-r--r--arch/arm/mach-shmobile/include/mach/sh7372.h2
-rw-r--r--arch/arm/mach-shmobile/intc-sh7372.c2
-rw-r--r--arch/arm/mach-vexpress/ct-ca9x4.c2
-rw-r--r--arch/arm/mm/dma-mapping.c2
-rw-r--r--arch/arm/plat-omap/devices.c4
-rw-r--r--arch/arm/plat-omap/dma.c2
-rw-r--r--arch/arm/plat-orion/include/plat/pcie.h3
-rw-r--r--arch/arm/plat-orion/pcie.c5
39 files changed, 354 insertions, 99 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a19a5266d5fc..db524e75c4a2 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -6,7 +6,7 @@ config ARM
6 select HAVE_MEMBLOCK 6 select HAVE_MEMBLOCK
7 select RTC_LIB 7 select RTC_LIB
8 select SYS_SUPPORTS_APM_EMULATION 8 select SYS_SUPPORTS_APM_EMULATION
9 select GENERIC_ATOMIC64 if (!CPU_32v6K) 9 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
10 select HAVE_OPROFILE if (HAVE_PERF_EVENTS) 10 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
11 select HAVE_ARCH_KGDB 11 select HAVE_ARCH_KGDB
12 select HAVE_KPROBES if (!XIP_KERNEL) 12 select HAVE_KPROBES if (!XIP_KERNEL)
@@ -646,7 +646,7 @@ config ARCH_S3C2410
646 select ARCH_HAS_CPUFREQ 646 select ARCH_HAS_CPUFREQ
647 select HAVE_CLK 647 select HAVE_CLK
648 select ARCH_USES_GETTIMEOFFSET 648 select ARCH_USES_GETTIMEOFFSET
649 select HAVE_S3C2410_I2C 649 select HAVE_S3C2410_I2C if I2C
650 help 650 help
651 Samsung S3C2410X CPU based systems, such as the Simtec Electronics 651 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
652 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or 652 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
@@ -676,8 +676,8 @@ config ARCH_S3C64XX
676 select S3C_DEV_NAND 676 select S3C_DEV_NAND
677 select USB_ARCH_HAS_OHCI 677 select USB_ARCH_HAS_OHCI
678 select SAMSUNG_GPIOLIB_4BIT 678 select SAMSUNG_GPIOLIB_4BIT
679 select HAVE_S3C2410_I2C 679 select HAVE_S3C2410_I2C if I2C
680 select HAVE_S3C2410_WATCHDOG 680 select HAVE_S3C2410_WATCHDOG if WATCHDOG
681 help 681 help
682 Samsung S3C64XX series based systems 682 Samsung S3C64XX series based systems
683 683
@@ -686,10 +686,10 @@ config ARCH_S5P64X0
686 select CPU_V6 686 select CPU_V6
687 select GENERIC_GPIO 687 select GENERIC_GPIO
688 select HAVE_CLK 688 select HAVE_CLK
689 select HAVE_S3C2410_WATCHDOG 689 select HAVE_S3C2410_WATCHDOG if WATCHDOG
690 select ARCH_USES_GETTIMEOFFSET 690 select ARCH_USES_GETTIMEOFFSET
691 select HAVE_S3C2410_I2C 691 select HAVE_S3C2410_I2C if I2C
692 select HAVE_S3C_RTC 692 select HAVE_S3C_RTC if RTC_CLASS
693 help 693 help
694 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, 694 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
695 SMDK6450. 695 SMDK6450.
@@ -700,7 +700,7 @@ config ARCH_S5P6442
700 select GENERIC_GPIO 700 select GENERIC_GPIO
701 select HAVE_CLK 701 select HAVE_CLK
702 select ARCH_USES_GETTIMEOFFSET 702 select ARCH_USES_GETTIMEOFFSET
703 select HAVE_S3C2410_WATCHDOG 703 select HAVE_S3C2410_WATCHDOG if WATCHDOG
704 help 704 help
705 Samsung S5P6442 CPU based systems 705 Samsung S5P6442 CPU based systems
706 706
@@ -711,9 +711,9 @@ config ARCH_S5PC100
711 select CPU_V7 711 select CPU_V7
712 select ARM_L1_CACHE_SHIFT_6 712 select ARM_L1_CACHE_SHIFT_6
713 select ARCH_USES_GETTIMEOFFSET 713 select ARCH_USES_GETTIMEOFFSET
714 select HAVE_S3C2410_I2C 714 select HAVE_S3C2410_I2C if I2C
715 select HAVE_S3C_RTC 715 select HAVE_S3C_RTC if RTC_CLASS
716 select HAVE_S3C2410_WATCHDOG 716 select HAVE_S3C2410_WATCHDOG if WATCHDOG
717 help 717 help
718 Samsung S5PC100 series based systems 718 Samsung S5PC100 series based systems
719 719
@@ -726,9 +726,9 @@ config ARCH_S5PV210
726 select ARM_L1_CACHE_SHIFT_6 726 select ARM_L1_CACHE_SHIFT_6
727 select ARCH_HAS_CPUFREQ 727 select ARCH_HAS_CPUFREQ
728 select ARCH_USES_GETTIMEOFFSET 728 select ARCH_USES_GETTIMEOFFSET
729 select HAVE_S3C2410_I2C 729 select HAVE_S3C2410_I2C if I2C
730 select HAVE_S3C_RTC 730 select HAVE_S3C_RTC if RTC_CLASS
731 select HAVE_S3C2410_WATCHDOG 731 select HAVE_S3C2410_WATCHDOG if WATCHDOG
732 help 732 help
733 Samsung S5PV210/S5PC110 series based systems 733 Samsung S5PV210/S5PC110 series based systems
734 734
@@ -739,9 +739,9 @@ config ARCH_S5PV310
739 select GENERIC_GPIO 739 select GENERIC_GPIO
740 select HAVE_CLK 740 select HAVE_CLK
741 select GENERIC_CLOCKEVENTS 741 select GENERIC_CLOCKEVENTS
742 select HAVE_S3C_RTC 742 select HAVE_S3C_RTC if RTC_CLASS
743 select HAVE_S3C2410_I2C 743 select HAVE_S3C2410_I2C if I2C
744 select HAVE_S3C2410_WATCHDOG 744 select HAVE_S3C2410_WATCHDOG if WATCHDOG
745 help 745 help
746 Samsung S5PV310 series based systems 746 Samsung S5PV310 series based systems
747 747
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index ada6359160eb..772f95f1aecd 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -251,15 +251,16 @@ void __init gic_dist_init(unsigned int gic_nr, void __iomem *base,
251 writel(cpumask, base + GIC_DIST_TARGET + i * 4 / 4); 251 writel(cpumask, base + GIC_DIST_TARGET + i * 4 / 4);
252 252
253 /* 253 /*
254 * Set priority on all interrupts. 254 * Set priority on all global interrupts.
255 */ 255 */
256 for (i = 0; i < max_irq; i += 4) 256 for (i = 32; i < max_irq; i += 4)
257 writel(0xa0a0a0a0, base + GIC_DIST_PRI + i * 4 / 4); 257 writel(0xa0a0a0a0, base + GIC_DIST_PRI + i * 4 / 4);
258 258
259 /* 259 /*
260 * Disable all interrupts. 260 * Disable all interrupts. Leave the PPI and SGIs alone
261 * as these enables are banked registers.
261 */ 262 */
262 for (i = 0; i < max_irq; i += 32) 263 for (i = 32; i < max_irq; i += 32)
263 writel(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32); 264 writel(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32);
264 265
265 /* 266 /*
@@ -277,11 +278,30 @@ void __init gic_dist_init(unsigned int gic_nr, void __iomem *base,
277 278
278void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base) 279void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base)
279{ 280{
281 void __iomem *dist_base;
282 int i;
283
280 if (gic_nr >= MAX_GIC_NR) 284 if (gic_nr >= MAX_GIC_NR)
281 BUG(); 285 BUG();
282 286
287 dist_base = gic_data[gic_nr].dist_base;
288 BUG_ON(!dist_base);
289
283 gic_data[gic_nr].cpu_base = base; 290 gic_data[gic_nr].cpu_base = base;
284 291
292 /*
293 * Deal with the banked PPI and SGI interrupts - disable all
294 * PPI interrupts, ensure all SGI interrupts are enabled.
295 */
296 writel(0xffff0000, dist_base + GIC_DIST_ENABLE_CLEAR);
297 writel(0x0000ffff, dist_base + GIC_DIST_ENABLE_SET);
298
299 /*
300 * Set priority on PPI and SGI interrupts
301 */
302 for (i = 0; i < 32; i += 4)
303 writel(0xa0a0a0a0, dist_base + GIC_DIST_PRI + i * 4 / 4);
304
285 writel(0xf0, base + GIC_CPU_PRIMASK); 305 writel(0xf0, base + GIC_CPU_PRIMASK);
286 writel(1, base + GIC_CPU_CTRL); 306 writel(1, base + GIC_CPU_CTRL);
287} 307}
diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h
index 6700c7fc7ebd..21fa272301f8 100644
--- a/arch/arm/include/asm/hardware/it8152.h
+++ b/arch/arm/include/asm/hardware/it8152.h
@@ -75,7 +75,7 @@ extern unsigned long it8152_base_address;
75 IT8152_PD_IRQ(1) USB (USBR) 75 IT8152_PD_IRQ(1) USB (USBR)
76 IT8152_PD_IRQ(0) Audio controller (ACR) 76 IT8152_PD_IRQ(0) Audio controller (ACR)
77 */ 77 */
78#define IT8152_IRQ(x) (IRQ_BOARD_END + (x)) 78#define IT8152_IRQ(x) (IRQ_BOARD_START + (x))
79 79
80/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */ 80/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
81#define IT8152_LD_IRQ_COUNT 9 81#define IT8152_LD_IRQ_COUNT 9
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 54593b0c241b..21e3a4ab3b8c 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -748,8 +748,7 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr,
748 breakpoint_handler(addr, regs); 748 breakpoint_handler(addr, regs);
749 break; 749 break;
750 case ARM_ENTRY_ASYNC_WATCHPOINT: 750 case ARM_ENTRY_ASYNC_WATCHPOINT:
751 WARN_ON("Asynchronous watchpoint exception taken. " 751 WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n");
752 "Debugging results may be unreliable");
753 case ARM_ENTRY_SYNC_WATCHPOINT: 752 case ARM_ENTRY_SYNC_WATCHPOINT:
754 watchpoint_handler(addr, regs); 753 watchpoint_handler(addr, regs);
755 break; 754 break;
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 49643b1467e6..07a50357492a 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -1749,7 +1749,7 @@ static inline int armv7_pmnc_has_overflowed(unsigned long pmnc)
1749static inline int armv7_pmnc_counter_has_overflowed(unsigned long pmnc, 1749static inline int armv7_pmnc_counter_has_overflowed(unsigned long pmnc,
1750 enum armv7_counters counter) 1750 enum armv7_counters counter)
1751{ 1751{
1752 int ret; 1752 int ret = 0;
1753 1753
1754 if (counter == ARMV7_CYCLE_COUNTER) 1754 if (counter == ARMV7_CYCLE_COUNTER)
1755 ret = pmnc & ARMV7_FLAG_C; 1755 ret = pmnc & ARMV7_FLAG_C;
diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c
index 20b7411e47fd..c2e112e1a05f 100644
--- a/arch/arm/kernel/stacktrace.c
+++ b/arch/arm/kernel/stacktrace.c
@@ -28,7 +28,7 @@ int notrace unwind_frame(struct stackframe *frame)
28 28
29 /* only go to a higher address on the stack */ 29 /* only go to a higher address on the stack */
30 low = frame->sp; 30 low = frame->sp;
31 high = ALIGN(low, THREAD_SIZE) + THREAD_SIZE; 31 high = ALIGN(low, THREAD_SIZE);
32 32
33 /* check current frame pointer is within bounds */ 33 /* check current frame pointer is within bounds */
34 if (fp < (low + 12) || fp + 4 >= high) 34 if (fp < (low + 12) || fp + 4 >= high)
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index cda78d59aa31..446aee97436f 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -53,10 +53,7 @@ static void dump_mem(const char *, const char *, unsigned long, unsigned long);
53void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame) 53void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame)
54{ 54{
55#ifdef CONFIG_KALLSYMS 55#ifdef CONFIG_KALLSYMS
56 char sym1[KSYM_SYMBOL_LEN], sym2[KSYM_SYMBOL_LEN]; 56 printk("[<%08lx>] (%pS) from [<%08lx>] (%pS)\n", where, (void *)where, from, (void *)from);
57 sprint_symbol(sym1, where);
58 sprint_symbol(sym2, from);
59 printk("[<%08lx>] (%s) from [<%08lx>] (%s)\n", where, sym1, from, sym2);
60#else 57#else
61 printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from); 58 printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from);
62#endif 59#endif
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c
index 2a161765f6d5..d2cb0b3c9872 100644
--- a/arch/arm/kernel/unwind.c
+++ b/arch/arm/kernel/unwind.c
@@ -279,7 +279,7 @@ int unwind_frame(struct stackframe *frame)
279 279
280 /* only go to a higher address on the stack */ 280 /* only go to a higher address on the stack */
281 low = frame->sp; 281 low = frame->sp;
282 high = ALIGN(low, THREAD_SIZE) + THREAD_SIZE; 282 high = ALIGN(low, THREAD_SIZE);
283 283
284 pr_debug("%s(pc = %08lx lr = %08lx sp = %08lx)\n", __func__, 284 pr_debug("%s(pc = %08lx lr = %08lx sp = %08lx)\n", __func__,
285 frame->pc, frame->lr, frame->sp); 285 frame->pc, frame->lr, frame->sp);
diff --git a/arch/arm/mach-ep93xx/include/mach/dma.h b/arch/arm/mach-ep93xx/include/mach/dma.h
index 3a5961d3f3b1..5e31b2b25da9 100644
--- a/arch/arm/mach-ep93xx/include/mach/dma.h
+++ b/arch/arm/mach-ep93xx/include/mach/dma.h
@@ -1,5 +1,13 @@
1/* 1/**
2 * arch/arm/mach-ep93xx/include/mach/dma.h 2 * DOC: EP93xx DMA M2P memory to peripheral and peripheral to memory engine
3 *
4 * The EP93xx DMA M2P subsystem handles DMA transfers between memory and
5 * peripherals. DMA M2P channels are available for audio, UARTs and IrDA.
6 * See chapter 10 of the EP93xx users guide for full details on the DMA M2P
7 * engine.
8 *
9 * See sound/soc/ep93xx/ep93xx-pcm.c for an example use of the DMA M2P code.
10 *
3 */ 11 */
4 12
5#ifndef __ASM_ARCH_DMA_H 13#ifndef __ASM_ARCH_DMA_H
@@ -8,12 +16,34 @@
8#include <linux/list.h> 16#include <linux/list.h>
9#include <linux/types.h> 17#include <linux/types.h>
10 18
19/**
20 * struct ep93xx_dma_buffer - Information about a buffer to be transferred
21 * using the DMA M2P engine
22 *
23 * @list: Entry in DMA buffer list
24 * @bus_addr: Physical address of the buffer
25 * @size: Size of the buffer in bytes
26 */
11struct ep93xx_dma_buffer { 27struct ep93xx_dma_buffer {
12 struct list_head list; 28 struct list_head list;
13 u32 bus_addr; 29 u32 bus_addr;
14 u16 size; 30 u16 size;
15}; 31};
16 32
33/**
34 * struct ep93xx_dma_m2p_client - Information about a DMA M2P client
35 *
36 * @name: Unique name for this client
37 * @flags: Client flags
38 * @cookie: User data to pass to callback functions
39 * @buffer_started: Non NULL function to call when a transfer is started.
40 * The arguments are the user data cookie and the DMA
41 * buffer which is starting.
42 * @buffer_finished: Non NULL function to call when a transfer is completed.
43 * The arguments are the user data cookie, the DMA buffer
44 * which has completed, and a boolean flag indicating if
45 * the transfer had an error.
46 */
17struct ep93xx_dma_m2p_client { 47struct ep93xx_dma_m2p_client {
18 char *name; 48 char *name;
19 u8 flags; 49 u8 flags;
@@ -24,10 +54,11 @@ struct ep93xx_dma_m2p_client {
24 struct ep93xx_dma_buffer *buf, 54 struct ep93xx_dma_buffer *buf,
25 int bytes, int error); 55 int bytes, int error);
26 56
27 /* Internal to the DMA code. */ 57 /* private: Internal use only */
28 void *channel; 58 void *channel;
29}; 59};
30 60
61/* DMA M2P ports */
31#define EP93XX_DMA_M2P_PORT_I2S1 0x00 62#define EP93XX_DMA_M2P_PORT_I2S1 0x00
32#define EP93XX_DMA_M2P_PORT_I2S2 0x01 63#define EP93XX_DMA_M2P_PORT_I2S2 0x01
33#define EP93XX_DMA_M2P_PORT_AAC1 0x02 64#define EP93XX_DMA_M2P_PORT_AAC1 0x02
@@ -39,18 +70,80 @@ struct ep93xx_dma_m2p_client {
39#define EP93XX_DMA_M2P_PORT_UART3 0x08 70#define EP93XX_DMA_M2P_PORT_UART3 0x08
40#define EP93XX_DMA_M2P_PORT_IRDA 0x09 71#define EP93XX_DMA_M2P_PORT_IRDA 0x09
41#define EP93XX_DMA_M2P_PORT_MASK 0x0f 72#define EP93XX_DMA_M2P_PORT_MASK 0x0f
42#define EP93XX_DMA_M2P_TX 0x00
43#define EP93XX_DMA_M2P_RX 0x10
44#define EP93XX_DMA_M2P_ABORT_ON_ERROR 0x20
45#define EP93XX_DMA_M2P_IGNORE_ERROR 0x40
46#define EP93XX_DMA_M2P_ERROR_MASK 0x60
47 73
48int ep93xx_dma_m2p_client_register(struct ep93xx_dma_m2p_client *m2p); 74/* DMA M2P client flags */
75#define EP93XX_DMA_M2P_TX 0x00 /* Memory to peripheral */
76#define EP93XX_DMA_M2P_RX 0x10 /* Peripheral to memory */
77
78/*
79 * DMA M2P client error handling flags. See the EP93xx users guide
80 * documentation on the DMA M2P CONTROL register for more details
81 */
82#define EP93XX_DMA_M2P_ABORT_ON_ERROR 0x20 /* Abort on peripheral error */
83#define EP93XX_DMA_M2P_IGNORE_ERROR 0x40 /* Ignore peripheral errors */
84#define EP93XX_DMA_M2P_ERROR_MASK 0x60 /* Mask of error bits */
85
86/**
87 * ep93xx_dma_m2p_client_register - Register a client with the DMA M2P
88 * subsystem
89 *
90 * @m2p: Client information to register
91 * returns 0 on success
92 *
93 * The DMA M2P subsystem allocates a channel and an interrupt line for the DMA
94 * client
95 */
96int ep93xx_dma_m2p_client_register(struct ep93xx_dma_m2p_client *m2p);
97
98/**
99 * ep93xx_dma_m2p_client_unregister - Unregister a client from the DMA M2P
100 * subsystem
101 *
102 * @m2p: Client to unregister
103 *
104 * Any transfers currently in progress will be completed in hardware, but
105 * ignored in software.
106 */
49void ep93xx_dma_m2p_client_unregister(struct ep93xx_dma_m2p_client *m2p); 107void ep93xx_dma_m2p_client_unregister(struct ep93xx_dma_m2p_client *m2p);
108
109/**
110 * ep93xx_dma_m2p_submit - Submit a DMA M2P transfer
111 *
112 * @m2p: DMA Client to submit the transfer on
113 * @buf: DMA Buffer to submit
114 *
115 * If the current or next transfer positions are free on the M2P client then
116 * the transfer is started immediately. If not, the transfer is added to the
117 * list of pending transfers. This function must not be called from the
118 * buffer_finished callback for an M2P channel.
119 *
120 */
50void ep93xx_dma_m2p_submit(struct ep93xx_dma_m2p_client *m2p, 121void ep93xx_dma_m2p_submit(struct ep93xx_dma_m2p_client *m2p,
51 struct ep93xx_dma_buffer *buf); 122 struct ep93xx_dma_buffer *buf);
123
124/**
125 * ep93xx_dma_m2p_submit_recursive - Put a DMA transfer on the pending list
126 * for an M2P channel
127 *
128 * @m2p: DMA Client to submit the transfer on
129 * @buf: DMA Buffer to submit
130 *
131 * This function must only be called from the buffer_finished callback for an
132 * M2P channel. It is commonly used to add the next transfer in a chained list
133 * of DMA transfers.
134 */
52void ep93xx_dma_m2p_submit_recursive(struct ep93xx_dma_m2p_client *m2p, 135void ep93xx_dma_m2p_submit_recursive(struct ep93xx_dma_m2p_client *m2p,
53 struct ep93xx_dma_buffer *buf); 136 struct ep93xx_dma_buffer *buf);
137
138/**
139 * ep93xx_dma_m2p_flush - Flush all pending transfers on a DMA M2P client
140 *
141 * @m2p: DMA client to flush transfers on
142 *
143 * Any transfers currently in progress will be completed in hardware, but
144 * ignored in software.
145 *
146 */
54void ep93xx_dma_m2p_flush(struct ep93xx_dma_m2p_client *m2p); 147void ep93xx_dma_m2p_flush(struct ep93xx_dma_m2p_client *m2p);
55 148
56#endif /* __ASM_ARCH_DMA_H */ 149#endif /* __ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 51ff23b72d3a..3688123b5ad8 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -854,10 +854,9 @@ int __init kirkwood_find_tclk(void)
854 854
855 kirkwood_pcie_id(&dev, &rev); 855 kirkwood_pcie_id(&dev, &rev);
856 856
857 if ((dev == MV88F6281_DEV_ID && (rev == MV88F6281_REV_A0 || 857 if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID)
858 rev == MV88F6281_REV_A1)) || 858 if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0)
859 (dev == MV88F6282_DEV_ID)) 859 return 200000000;
860 return 200000000;
861 860
862 return 166666667; 861 return 166666667;
863} 862}
diff --git a/arch/arm/mach-kirkwood/d2net_v2-setup.c b/arch/arm/mach-kirkwood/d2net_v2-setup.c
index 4aa86e4a152c..a31c9499ab36 100644
--- a/arch/arm/mach-kirkwood/d2net_v2-setup.c
+++ b/arch/arm/mach-kirkwood/d2net_v2-setup.c
@@ -225,5 +225,5 @@ MACHINE_START(D2NET_V2, "LaCie d2 Network v2")
225 .init_machine = d2net_v2_init, 225 .init_machine = d2net_v2_init,
226 .map_io = kirkwood_map_io, 226 .map_io = kirkwood_map_io,
227 .init_irq = kirkwood_init_irq, 227 .init_irq = kirkwood_init_irq,
228 .timer = &lacie_v2_timer, 228 .timer = &kirkwood_timer,
229MACHINE_END 229MACHINE_END
diff --git a/arch/arm/mach-kirkwood/lacie_v2-common.c b/arch/arm/mach-kirkwood/lacie_v2-common.c
index d3ea1b6c8a02..285edab776e9 100644
--- a/arch/arm/mach-kirkwood/lacie_v2-common.c
+++ b/arch/arm/mach-kirkwood/lacie_v2-common.c
@@ -111,17 +111,3 @@ void __init lacie_v2_hdd_power_init(int hdd_num)
111 pr_err("Failed to power up HDD%d\n", i + 1); 111 pr_err("Failed to power up HDD%d\n", i + 1);
112 } 112 }
113} 113}
114
115/*****************************************************************************
116 * Timer
117 ****************************************************************************/
118
119static void lacie_v2_timer_init(void)
120{
121 kirkwood_tclk = 166666667;
122 orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
123}
124
125struct sys_timer lacie_v2_timer = {
126 .init = lacie_v2_timer_init,
127};
diff --git a/arch/arm/mach-kirkwood/lacie_v2-common.h b/arch/arm/mach-kirkwood/lacie_v2-common.h
index af521315b87b..fc64f578536e 100644
--- a/arch/arm/mach-kirkwood/lacie_v2-common.h
+++ b/arch/arm/mach-kirkwood/lacie_v2-common.h
@@ -13,6 +13,4 @@ void lacie_v2_register_flash(void);
13void lacie_v2_register_i2c_devices(void); 13void lacie_v2_register_i2c_devices(void);
14void lacie_v2_hdd_power_init(int hdd_num); 14void lacie_v2_hdd_power_init(int hdd_num);
15 15
16extern struct sys_timer lacie_v2_timer;
17
18#endif 16#endif
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c
index 065187d177c6..27901f702feb 100644
--- a/arch/arm/mach-kirkwood/mpp.c
+++ b/arch/arm/mach-kirkwood/mpp.c
@@ -59,7 +59,7 @@ void __init kirkwood_mpp_conf(unsigned int *mpp_list)
59 } 59 }
60 printk("\n"); 60 printk("\n");
61 61
62 while (*mpp_list) { 62 for ( ; *mpp_list; mpp_list++) {
63 unsigned int num = MPP_NUM(*mpp_list); 63 unsigned int num = MPP_NUM(*mpp_list);
64 unsigned int sel = MPP_SEL(*mpp_list); 64 unsigned int sel = MPP_SEL(*mpp_list);
65 int shift, gpio_mode; 65 int shift, gpio_mode;
@@ -88,8 +88,6 @@ void __init kirkwood_mpp_conf(unsigned int *mpp_list)
88 if (sel != 0) 88 if (sel != 0)
89 gpio_mode = 0; 89 gpio_mode = 0;
90 orion_gpio_set_valid(num, gpio_mode); 90 orion_gpio_set_valid(num, gpio_mode);
91
92 mpp_list++;
93 } 91 }
94 92
95 printk(KERN_DEBUG " final MPP regs:"); 93 printk(KERN_DEBUG " final MPP regs:");
diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c
index 5ea66f1f4178..65ee21fd2f3b 100644
--- a/arch/arm/mach-kirkwood/netspace_v2-setup.c
+++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c
@@ -262,7 +262,7 @@ MACHINE_START(NETSPACE_V2, "LaCie Network Space v2")
262 .init_machine = netspace_v2_init, 262 .init_machine = netspace_v2_init,
263 .map_io = kirkwood_map_io, 263 .map_io = kirkwood_map_io,
264 .init_irq = kirkwood_init_irq, 264 .init_irq = kirkwood_init_irq,
265 .timer = &lacie_v2_timer, 265 .timer = &kirkwood_timer,
266MACHINE_END 266MACHINE_END
267#endif 267#endif
268 268
@@ -272,7 +272,7 @@ MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2")
272 .init_machine = netspace_v2_init, 272 .init_machine = netspace_v2_init,
273 .map_io = kirkwood_map_io, 273 .map_io = kirkwood_map_io,
274 .init_irq = kirkwood_init_irq, 274 .init_irq = kirkwood_init_irq,
275 .timer = &lacie_v2_timer, 275 .timer = &kirkwood_timer,
276MACHINE_END 276MACHINE_END
277#endif 277#endif
278 278
@@ -282,6 +282,6 @@ MACHINE_START(NETSPACE_MAX_V2, "LaCie Network Space Max v2")
282 .init_machine = netspace_v2_init, 282 .init_machine = netspace_v2_init,
283 .map_io = kirkwood_map_io, 283 .map_io = kirkwood_map_io,
284 .init_irq = kirkwood_init_irq, 284 .init_irq = kirkwood_init_irq,
285 .timer = &lacie_v2_timer, 285 .timer = &kirkwood_timer,
286MACHINE_END 286MACHINE_END
287#endif 287#endif
diff --git a/arch/arm/mach-kirkwood/netxbig_v2-setup.c b/arch/arm/mach-kirkwood/netxbig_v2-setup.c
index a1b45d501aef..93afd3c8bfd8 100644
--- a/arch/arm/mach-kirkwood/netxbig_v2-setup.c
+++ b/arch/arm/mach-kirkwood/netxbig_v2-setup.c
@@ -403,7 +403,7 @@ MACHINE_START(NET2BIG_V2, "LaCie 2Big Network v2")
403 .init_machine = netxbig_v2_init, 403 .init_machine = netxbig_v2_init,
404 .map_io = kirkwood_map_io, 404 .map_io = kirkwood_map_io,
405 .init_irq = kirkwood_init_irq, 405 .init_irq = kirkwood_init_irq,
406 .timer = &lacie_v2_timer, 406 .timer = &kirkwood_timer,
407MACHINE_END 407MACHINE_END
408#endif 408#endif
409 409
@@ -413,6 +413,6 @@ MACHINE_START(NET5BIG_V2, "LaCie 5Big Network v2")
413 .init_machine = netxbig_v2_init, 413 .init_machine = netxbig_v2_init,
414 .map_io = kirkwood_map_io, 414 .map_io = kirkwood_map_io,
415 .init_irq = kirkwood_init_irq, 415 .init_irq = kirkwood_init_irq,
416 .timer = &lacie_v2_timer, 416 .timer = &kirkwood_timer,
417MACHINE_END 417MACHINE_END
418#endif 418#endif
diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c
index 8be09a0ce4ac..3587a281d993 100644
--- a/arch/arm/mach-kirkwood/ts41x-setup.c
+++ b/arch/arm/mach-kirkwood/ts41x-setup.c
@@ -27,6 +27,10 @@
27#include "mpp.h" 27#include "mpp.h"
28#include "tsx1x-common.h" 28#include "tsx1x-common.h"
29 29
30/* for the PCIe reset workaround */
31#include <plat/pcie.h>
32
33
30#define QNAP_TS41X_JUMPER_JP1 45 34#define QNAP_TS41X_JUMPER_JP1 45
31 35
32static struct i2c_board_info __initdata qnap_ts41x_i2c_rtc = { 36static struct i2c_board_info __initdata qnap_ts41x_i2c_rtc = {
@@ -140,8 +144,16 @@ static void __init qnap_ts41x_init(void)
140 144
141static int __init ts41x_pci_init(void) 145static int __init ts41x_pci_init(void)
142{ 146{
143 if (machine_is_ts41x()) 147 if (machine_is_ts41x()) {
148 /*
149 * Without this explicit reset, the PCIe SATA controller
150 * (Marvell 88sx7042/sata_mv) is known to stop working
151 * after a few minutes.
152 */
153 orion_pcie_reset((void __iomem *)PCIE_VIRT_BASE);
154
144 kirkwood_pcie_init(KW_PCIE0); 155 kirkwood_pcie_init(KW_PCIE0);
156 }
145 157
146 return 0; 158 return 0;
147} 159}
diff --git a/arch/arm/mach-mmp/include/mach/cputype.h b/arch/arm/mach-mmp/include/mach/cputype.h
index f43a68b213f1..8a3b56dfd35d 100644
--- a/arch/arm/mach-mmp/include/mach/cputype.h
+++ b/arch/arm/mach-mmp/include/mach/cputype.h
@@ -46,7 +46,8 @@ static inline int cpu_is_pxa910(void)
46#ifdef CONFIG_CPU_MMP2 46#ifdef CONFIG_CPU_MMP2
47static inline int cpu_is_mmp2(void) 47static inline int cpu_is_mmp2(void)
48{ 48{
49 return (((cpu_readid_id() >> 8) & 0xff) == 0x58); 49 return (((read_cpuid_id() >> 8) & 0xff) == 0x58);
50}
50#else 51#else
51#define cpu_is_mmp2() (0) 52#define cpu_is_mmp2() (0)
52#endif 53#endif
diff --git a/arch/arm/mach-mv78xx0/mpp.c b/arch/arm/mach-mv78xx0/mpp.c
index 354ac514eb89..84db2dfc475c 100644
--- a/arch/arm/mach-mv78xx0/mpp.c
+++ b/arch/arm/mach-mv78xx0/mpp.c
@@ -54,7 +54,7 @@ void __init mv78xx0_mpp_conf(unsigned int *mpp_list)
54 } 54 }
55 printk("\n"); 55 printk("\n");
56 56
57 while (*mpp_list) { 57 for ( ; *mpp_list; mpp_list++) {
58 unsigned int num = MPP_NUM(*mpp_list); 58 unsigned int num = MPP_NUM(*mpp_list);
59 unsigned int sel = MPP_SEL(*mpp_list); 59 unsigned int sel = MPP_SEL(*mpp_list);
60 int shift, gpio_mode; 60 int shift, gpio_mode;
@@ -83,8 +83,6 @@ void __init mv78xx0_mpp_conf(unsigned int *mpp_list)
83 if (sel != 0) 83 if (sel != 0)
84 gpio_mode = 0; 84 gpio_mode = 0;
85 orion_gpio_set_valid(num, gpio_mode); 85 orion_gpio_set_valid(num, gpio_mode);
86
87 mpp_list++;
88 } 86 }
89 87
90 printk(KERN_DEBUG " final MPP regs:"); 88 printk(KERN_DEBUG " final MPP regs:");
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index ea0d80a89da7..e7f9ee63dce5 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -321,10 +321,9 @@ static struct platform_device omap_wdt_device = {
321static int __init omap_init_wdt(void) 321static int __init omap_init_wdt(void)
322{ 322{
323 if (!cpu_is_omap16xx()) 323 if (!cpu_is_omap16xx())
324 return; 324 return -ENODEV;
325 325
326 platform_device_register(&omap_wdt_device); 326 return platform_device_register(&omap_wdt_device);
327 return 0;
328} 327}
329subsys_initcall(omap_init_wdt); 328subsys_initcall(omap_init_wdt);
330#endif 329#endif
diff --git a/arch/arm/mach-omap1/include/mach/camera.h b/arch/arm/mach-omap1/include/mach/camera.h
index fd54b452eb22..847d00f0bb0a 100644
--- a/arch/arm/mach-omap1/include/mach/camera.h
+++ b/arch/arm/mach-omap1/include/mach/camera.h
@@ -1,6 +1,8 @@
1#ifndef __ASM_ARCH_CAMERA_H_ 1#ifndef __ASM_ARCH_CAMERA_H_
2#define __ASM_ARCH_CAMERA_H_ 2#define __ASM_ARCH_CAMERA_H_
3 3
4#include <media/omap1_camera.h>
5
4void omap1_camera_init(void *); 6void omap1_camera_init(void *);
5 7
6static inline void omap1_set_camera_info(struct omap1_cam_platform_data *info) 8static inline void omap1_set_camera_info(struct omap1_cam_platform_data *info)
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 067f4379c87f..53ac762518bd 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -242,9 +242,6 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
242 mmc[0].gpio_cd = gpio + 0; 242 mmc[0].gpio_cd = gpio + 0;
243 omap2_hsmmc_init(mmc); 243 omap2_hsmmc_init(mmc);
244 244
245 /* link regulators to MMC adapters */
246 devkit8000_vmmc1_supply.dev = mmc[0].dev;
247
248 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ 245 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
249 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; 246 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
250 247
diff --git a/arch/arm/mach-orion5x/mpp.c b/arch/arm/mach-orion5x/mpp.c
index bc4c3b9aaf83..db485d3b8144 100644
--- a/arch/arm/mach-orion5x/mpp.c
+++ b/arch/arm/mach-orion5x/mpp.c
@@ -127,7 +127,7 @@ void __init orion5x_mpp_conf(struct orion5x_mpp_mode *mode)
127 /* Initialize gpiolib. */ 127 /* Initialize gpiolib. */
128 orion_gpio_init(); 128 orion_gpio_init();
129 129
130 while (mode->mpp >= 0) { 130 for ( ; mode->mpp >= 0; mode++) {
131 u32 *reg; 131 u32 *reg;
132 int num_type; 132 int num_type;
133 int shift; 133 int shift;
@@ -160,8 +160,6 @@ void __init orion5x_mpp_conf(struct orion5x_mpp_mode *mode)
160 orion_gpio_set_unused(mode->mpp); 160 orion_gpio_set_unused(mode->mpp);
161 161
162 orion_gpio_set_valid(mode->mpp, !!(mode->type == MPP_GPIO)); 162 orion_gpio_set_valid(mode->mpp, !!(mode->type == MPP_GPIO));
163
164 mode++;
165 } 163 }
166 164
167 writel(mpp_0_7_ctrl, MPP_0_7_CTRL); 165 writel(mpp_0_7_ctrl, MPP_0_7_CTRL);
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c
index 16f1bd5324be..c1c1cd04bdde 100644
--- a/arch/arm/mach-orion5x/ts78xx-setup.c
+++ b/arch/arm/mach-orion5x/ts78xx-setup.c
@@ -239,7 +239,7 @@ static struct platform_nand_data ts78xx_ts_nand_data = {
239static struct resource ts78xx_ts_nand_resources = { 239static struct resource ts78xx_ts_nand_resources = {
240 .start = TS_NAND_DATA, 240 .start = TS_NAND_DATA,
241 .end = TS_NAND_DATA + 4, 241 .end = TS_NAND_DATA + 4,
242 .flags = IORESOURCE_IO, 242 .flags = IORESOURCE_MEM,
243}; 243};
244 244
245static struct platform_device ts78xx_ts_nand_device = { 245static struct platform_device ts78xx_ts_nand_device = {
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index ac5598ce9724..d34b99febeb9 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -476,8 +476,6 @@ static void __init cmx2xx_init(void)
476 476
477static void __init cmx2xx_init_irq(void) 477static void __init cmx2xx_init_irq(void)
478{ 478{
479 pxa27x_init_irq();
480
481 if (cpu_is_pxa25x()) { 479 if (cpu_is_pxa25x()) {
482 pxa25x_init_irq(); 480 pxa25x_init_irq();
483 cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ); 481 cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ);
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index 4b521e045d75..ffa50e633ee6 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -116,7 +116,7 @@ static struct platform_device smc91x_device = {
116 }, 116 },
117}; 117};
118 118
119#if defined(CONFIG_FB_PXA) || (CONFIG_FB_PXA_MODULE) 119#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
120static uint16_t lcd_power_on[] = { 120static uint16_t lcd_power_on[] = {
121 /* single frame */ 121 /* single frame */
122 SMART_CMD_NOOP, 122 SMART_CMD_NOOP,
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 1ca7bdc6485c..579d2f0f4dd0 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -143,7 +143,7 @@ config MACH_SMDK6410
143 select S3C_DEV_USB_HSOTG 143 select S3C_DEV_USB_HSOTG
144 select S3C_DEV_WDT 144 select S3C_DEV_WDT
145 select SAMSUNG_DEV_KEYPAD 145 select SAMSUNG_DEV_KEYPAD
146 select HAVE_S3C2410_WATCHDOG 146 select HAVE_S3C2410_WATCHDOG if WATCHDOG
147 select S3C64XX_SETUP_SDHCI 147 select S3C64XX_SETUP_SDHCI
148 select S3C64XX_SETUP_I2C1 148 select S3C64XX_SETUP_I2C1
149 select S3C64XX_SETUP_IDE 149 select S3C64XX_SETUP_IDE
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 54b479c35ee0..51dcd59eda6a 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -116,4 +116,6 @@ endmenu
116config SH_CLK_CPG 116config SH_CLK_CPG
117 bool 117 bool
118 118
119source "drivers/sh/Kconfig"
120
119endif 121endif
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 46ca4d4abf91..d3260542b943 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -163,11 +163,13 @@ static struct mtd_partition nor_flash_partitions[] = {
163 .name = "loader", 163 .name = "loader",
164 .offset = 0x00000000, 164 .offset = 0x00000000,
165 .size = 512 * 1024, 165 .size = 512 * 1024,
166 .mask_flags = MTD_WRITEABLE,
166 }, 167 },
167 { 168 {
168 .name = "bootenv", 169 .name = "bootenv",
169 .offset = MTDPART_OFS_APPEND, 170 .offset = MTDPART_OFS_APPEND,
170 .size = 512 * 1024, 171 .size = 512 * 1024,
172 .mask_flags = MTD_WRITEABLE,
171 }, 173 },
172 { 174 {
173 .name = "kernel_ro", 175 .name = "kernel_ro",
@@ -565,12 +567,54 @@ static struct platform_device *qhd_devices[] __initdata = {
565 567
566/* FSI */ 568/* FSI */
567#define IRQ_FSI evt2irq(0x1840) 569#define IRQ_FSI evt2irq(0x1840)
570
571static int fsi_set_rate(int is_porta, int rate)
572{
573 struct clk *fsib_clk;
574 struct clk *fdiv_clk = &sh7372_fsidivb_clk;
575 int ret;
576
577 /* set_rate is not needed if port A */
578 if (is_porta)
579 return 0;
580
581 fsib_clk = clk_get(NULL, "fsib_clk");
582 if (IS_ERR(fsib_clk))
583 return -EINVAL;
584
585 switch (rate) {
586 case 44100:
587 clk_set_rate(fsib_clk, clk_round_rate(fsib_clk, 11283000));
588 ret = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
589 break;
590 case 48000:
591 clk_set_rate(fsib_clk, clk_round_rate(fsib_clk, 85428000));
592 clk_set_rate(fdiv_clk, clk_round_rate(fdiv_clk, 12204000));
593 ret = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
594 break;
595 default:
596 pr_err("unsupported rate in FSI2 port B\n");
597 ret = -EINVAL;
598 break;
599 }
600
601 clk_put(fsib_clk);
602
603 return ret;
604}
605
568static struct sh_fsi_platform_info fsi_info = { 606static struct sh_fsi_platform_info fsi_info = {
569 .porta_flags = SH_FSI_BRS_INV | 607 .porta_flags = SH_FSI_BRS_INV |
570 SH_FSI_OUT_SLAVE_MODE | 608 SH_FSI_OUT_SLAVE_MODE |
571 SH_FSI_IN_SLAVE_MODE | 609 SH_FSI_IN_SLAVE_MODE |
572 SH_FSI_OFMT(PCM) | 610 SH_FSI_OFMT(PCM) |
573 SH_FSI_IFMT(PCM), 611 SH_FSI_IFMT(PCM),
612
613 .portb_flags = SH_FSI_BRS_INV |
614 SH_FSI_BRM_INV |
615 SH_FSI_LRS_INV |
616 SH_FSI_OFMT(SPDIF),
617 .set_rate = fsi_set_rate,
574}; 618};
575 619
576static struct resource fsi_resources[] = { 620static struct resource fsi_resources[] = {
@@ -634,6 +678,7 @@ static struct platform_device lcdc1_device = {
634static struct sh_mobile_hdmi_info hdmi_info = { 678static struct sh_mobile_hdmi_info hdmi_info = {
635 .lcd_chan = &sh_mobile_lcdc1_info.ch[0], 679 .lcd_chan = &sh_mobile_lcdc1_info.ch[0],
636 .lcd_dev = &lcdc1_device.dev, 680 .lcd_dev = &lcdc1_device.dev,
681 .flags = HDMI_SND_SRC_SPDIF,
637}; 682};
638 683
639static struct resource hdmi_resources[] = { 684static struct resource hdmi_resources[] = {
@@ -992,6 +1037,7 @@ static void __init ap4evb_map_io(void)
992 1037
993#define GPIO_PORT9CR 0xE6051009 1038#define GPIO_PORT9CR 0xE6051009
994#define GPIO_PORT10CR 0xE605100A 1039#define GPIO_PORT10CR 0xE605100A
1040#define USCCR1 0xE6058144
995static void __init ap4evb_init(void) 1041static void __init ap4evb_init(void)
996{ 1042{
997 u32 srcr4; 1043 u32 srcr4;
@@ -1062,7 +1108,7 @@ static void __init ap4evb_init(void)
1062 /* setup USB phy */ 1108 /* setup USB phy */
1063 __raw_writew(0x8a0a, 0xE6058130); /* USBCR2 */ 1109 __raw_writew(0x8a0a, 0xE6058130); /* USBCR2 */
1064 1110
1065 /* enable FSI2 */ 1111 /* enable FSI2 port A (ak4643) */
1066 gpio_request(GPIO_FN_FSIAIBT, NULL); 1112 gpio_request(GPIO_FN_FSIAIBT, NULL);
1067 gpio_request(GPIO_FN_FSIAILR, NULL); 1113 gpio_request(GPIO_FN_FSIAILR, NULL);
1068 gpio_request(GPIO_FN_FSIAISLD, NULL); 1114 gpio_request(GPIO_FN_FSIAISLD, NULL);
@@ -1079,6 +1125,10 @@ static void __init ap4evb_init(void)
1079 gpio_request(GPIO_PORT41, NULL); 1125 gpio_request(GPIO_PORT41, NULL);
1080 gpio_direction_input(GPIO_PORT41); 1126 gpio_direction_input(GPIO_PORT41);
1081 1127
1128 /* setup FSI2 port B (HDMI) */
1129 gpio_request(GPIO_FN_FSIBCK, NULL);
1130 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
1131
1082 /* set SPU2 clock to 119.6 MHz */ 1132 /* set SPU2 clock to 119.6 MHz */
1083 clk = clk_get(NULL, "spu_clk"); 1133 clk = clk_get(NULL, "spu_clk");
1084 if (!IS_ERR(clk)) { 1134 if (!IS_ERR(clk)) {
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 8565aefa21fd..7db31e6c6bf2 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -50,6 +50,9 @@
50#define SMSTPCR3 0xe615013c 50#define SMSTPCR3 0xe615013c
51#define SMSTPCR4 0xe6150140 51#define SMSTPCR4 0xe6150140
52 52
53#define FSIDIVA 0xFE1F8000
54#define FSIDIVB 0xFE1F8008
55
53/* Platforms must set frequency on their DV_CLKI pin */ 56/* Platforms must set frequency on their DV_CLKI pin */
54struct clk sh7372_dv_clki_clk = { 57struct clk sh7372_dv_clki_clk = {
55}; 58};
@@ -288,6 +291,7 @@ struct clk sh7372_pllc2_clk = {
288 .ops = &pllc2_clk_ops, 291 .ops = &pllc2_clk_ops,
289 .parent = &extal1_div2_clk, 292 .parent = &extal1_div2_clk,
290 .freq_table = pllc2_freq_table, 293 .freq_table = pllc2_freq_table,
294 .nr_freqs = ARRAY_SIZE(pllc2_freq_table) - 1,
291 .parent_table = pllc2_parent, 295 .parent_table = pllc2_parent,
292 .parent_num = ARRAY_SIZE(pllc2_parent), 296 .parent_num = ARRAY_SIZE(pllc2_parent),
293}; 297};
@@ -417,6 +421,101 @@ static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
417 fsibckcr_parent, ARRAY_SIZE(fsibckcr_parent), 6, 2), 421 fsibckcr_parent, ARRAY_SIZE(fsibckcr_parent), 6, 2),
418}; 422};
419 423
424/* FSI DIV */
425static unsigned long fsidiv_recalc(struct clk *clk)
426{
427 unsigned long value;
428
429 value = __raw_readl(clk->mapping->base);
430
431 if ((value & 0x3) != 0x3)
432 return 0;
433
434 value >>= 16;
435 if (value < 2)
436 return 0;
437
438 return clk->parent->rate / value;
439}
440
441static long fsidiv_round_rate(struct clk *clk, unsigned long rate)
442{
443 return clk_rate_div_range_round(clk, 2, 0xffff, rate);
444}
445
446static void fsidiv_disable(struct clk *clk)
447{
448 __raw_writel(0, clk->mapping->base);
449}
450
451static int fsidiv_enable(struct clk *clk)
452{
453 unsigned long value;
454
455 value = __raw_readl(clk->mapping->base) >> 16;
456 if (value < 2) {
457 fsidiv_disable(clk);
458 return -ENOENT;
459 }
460
461 __raw_writel((value << 16) | 0x3, clk->mapping->base);
462
463 return 0;
464}
465
466static int fsidiv_set_rate(struct clk *clk,
467 unsigned long rate, int algo_id)
468{
469 int idx;
470
471 if (clk->parent->rate == rate) {
472 fsidiv_disable(clk);
473 return 0;
474 }
475
476 idx = (clk->parent->rate / rate) & 0xffff;
477 if (idx < 2)
478 return -ENOENT;
479
480 __raw_writel(idx << 16, clk->mapping->base);
481 return fsidiv_enable(clk);
482}
483
484static struct clk_ops fsidiv_clk_ops = {
485 .recalc = fsidiv_recalc,
486 .round_rate = fsidiv_round_rate,
487 .set_rate = fsidiv_set_rate,
488 .enable = fsidiv_enable,
489 .disable = fsidiv_disable,
490};
491
492static struct clk_mapping sh7372_fsidiva_clk_mapping = {
493 .phys = FSIDIVA,
494 .len = 8,
495};
496
497struct clk sh7372_fsidiva_clk = {
498 .ops = &fsidiv_clk_ops,
499 .parent = &div6_reparent_clks[DIV6_FSIA], /* late install */
500 .mapping = &sh7372_fsidiva_clk_mapping,
501};
502
503static struct clk_mapping sh7372_fsidivb_clk_mapping = {
504 .phys = FSIDIVB,
505 .len = 8,
506};
507
508struct clk sh7372_fsidivb_clk = {
509 .ops = &fsidiv_clk_ops,
510 .parent = &div6_reparent_clks[DIV6_FSIB], /* late install */
511 .mapping = &sh7372_fsidivb_clk_mapping,
512};
513
514static struct clk *late_main_clks[] = {
515 &sh7372_fsidiva_clk,
516 &sh7372_fsidivb_clk,
517};
518
420enum { MSTP001, 519enum { MSTP001,
421 MSTP131, MSTP130, 520 MSTP131, MSTP130,
422 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, 521 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125,
@@ -585,6 +684,9 @@ void __init sh7372_clock_init(void)
585 if (!ret) 684 if (!ret)
586 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 685 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
587 686
687 for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
688 ret = clk_register(late_main_clks[k]);
689
588 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 690 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
589 691
590 if (!ret) 692 if (!ret)
diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/include/mach/gpio.h
index 5bc6bd444d72..2b1bb9e43dda 100644
--- a/arch/arm/mach-shmobile/include/mach/gpio.h
+++ b/arch/arm/mach-shmobile/include/mach/gpio.h
@@ -35,12 +35,12 @@ static inline int gpio_cansleep(unsigned gpio)
35 35
36static inline int gpio_to_irq(unsigned gpio) 36static inline int gpio_to_irq(unsigned gpio)
37{ 37{
38 return -ENOSYS; 38 return __gpio_to_irq(gpio);
39} 39}
40 40
41static inline int irq_to_gpio(unsigned int irq) 41static inline int irq_to_gpio(unsigned int irq)
42{ 42{
43 return -EINVAL; 43 return -ENOSYS;
44} 44}
45 45
46#endif /* CONFIG_GPIOLIB */ 46#endif /* CONFIG_GPIOLIB */
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
index 147775a94bce..e4f9004e7103 100644
--- a/arch/arm/mach-shmobile/include/mach/sh7372.h
+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
@@ -464,5 +464,7 @@ extern struct clk sh7372_dv_clki_div2_clk;
464extern struct clk sh7372_pllc2_clk; 464extern struct clk sh7372_pllc2_clk;
465extern struct clk sh7372_fsiack_clk; 465extern struct clk sh7372_fsiack_clk;
466extern struct clk sh7372_fsibck_clk; 466extern struct clk sh7372_fsibck_clk;
467extern struct clk sh7372_fsidiva_clk;
468extern struct clk sh7372_fsidivb_clk;
467 469
468#endif /* __ASM_SH7372_H__ */ 470#endif /* __ASM_SH7372_H__ */
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index 4cd3cae38e72..30b2f400666a 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -98,7 +98,7 @@ static struct intc_vect intca_vectors[] __initdata = {
98 INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0), 98 INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0),
99 INTC_VECT(IRQ16A, 0x3200), INTC_VECT(IRQ17A, 0x3220), 99 INTC_VECT(IRQ16A, 0x3200), INTC_VECT(IRQ17A, 0x3220),
100 INTC_VECT(IRQ18A, 0x3240), INTC_VECT(IRQ19A, 0x3260), 100 INTC_VECT(IRQ18A, 0x3240), INTC_VECT(IRQ19A, 0x3260),
101 INTC_VECT(IRQ20A, 0x3280), INTC_VECT(IRQ31A, 0x32a0), 101 INTC_VECT(IRQ20A, 0x3280), INTC_VECT(IRQ21A, 0x32a0),
102 INTC_VECT(IRQ22A, 0x32c0), INTC_VECT(IRQ23A, 0x32e0), 102 INTC_VECT(IRQ22A, 0x32c0), INTC_VECT(IRQ23A, 0x32e0),
103 INTC_VECT(IRQ24A, 0x3300), INTC_VECT(IRQ25A, 0x3320), 103 INTC_VECT(IRQ24A, 0x3300), INTC_VECT(IRQ25A, 0x3320),
104 INTC_VECT(IRQ26A, 0x3340), INTC_VECT(IRQ27A, 0x3360), 104 INTC_VECT(IRQ26A, 0x3340), INTC_VECT(IRQ27A, 0x3360),
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index c2e405a9e025..fd25ccd7272f 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -54,7 +54,9 @@ static struct map_desc ct_ca9x4_io_desc[] __initdata = {
54 54
55static void __init ct_ca9x4_map_io(void) 55static void __init ct_ca9x4_map_io(void)
56{ 56{
57#ifdef CONFIG_LOCAL_TIMERS
57 twd_base = MMIO_P2V(A9_MPCORE_TWD); 58 twd_base = MMIO_P2V(A9_MPCORE_TWD);
59#endif
58 v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc)); 60 v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc));
59} 61}
60 62
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index e4dd0646e859..ac6a36142fcd 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -198,7 +198,7 @@ __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot)
198 * fragmentation of the DMA space, and also prevents allocations 198 * fragmentation of the DMA space, and also prevents allocations
199 * smaller than a section from crossing a section boundary. 199 * smaller than a section from crossing a section boundary.
200 */ 200 */
201 bit = fls(size - 1) + 1; 201 bit = fls(size - 1);
202 if (bit > SECTION_SHIFT) 202 if (bit > SECTION_SHIFT)
203 bit = SECTION_SHIFT; 203 bit = SECTION_SHIFT;
204 align = 1 << bit; 204 align = 1 << bit;
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 6f42a18b8aa4..fc819120978d 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -284,12 +284,14 @@ void __init omap_dsp_reserve_sdram_memblock(void)
284 if (!size) 284 if (!size)
285 return; 285 return;
286 286
287 paddr = __memblock_alloc_base(size, SZ_1M, MEMBLOCK_REAL_LIMIT); 287 paddr = memblock_alloc(size, SZ_1M);
288 if (!paddr) { 288 if (!paddr) {
289 pr_err("%s: failed to reserve %x bytes\n", 289 pr_err("%s: failed to reserve %x bytes\n",
290 __func__, size); 290 __func__, size);
291 return; 291 return;
292 } 292 }
293 memblock_free(paddr, size);
294 memblock_remove(paddr, size);
293 295
294 omap_dsp_phys_mempool_base = paddr; 296 omap_dsp_phys_mempool_base = paddr;
295} 297}
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index f5c5b8da9a87..2c2826571d45 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -1983,6 +1983,8 @@ static int omap2_dma_handle_ch(int ch)
1983 1983
1984 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(ch)); 1984 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(ch));
1985 dma_write(1 << ch, IRQSTATUS_L0); 1985 dma_write(1 << ch, IRQSTATUS_L0);
1986 /* read back the register to flush the write */
1987 dma_read(IRQSTATUS_L0);
1986 1988
1987 /* If the ch is not chained then chain_id will be -1 */ 1989 /* If the ch is not chained then chain_id will be -1 */
1988 if (dma_chan[ch].chain_id != -1) { 1990 if (dma_chan[ch].chain_id != -1) {
diff --git a/arch/arm/plat-orion/include/plat/pcie.h b/arch/arm/plat-orion/include/plat/pcie.h
index 3ebfef72b4e7..cc99163e73fd 100644
--- a/arch/arm/plat-orion/include/plat/pcie.h
+++ b/arch/arm/plat-orion/include/plat/pcie.h
@@ -11,12 +11,15 @@
11#ifndef __PLAT_PCIE_H 11#ifndef __PLAT_PCIE_H
12#define __PLAT_PCIE_H 12#define __PLAT_PCIE_H
13 13
14struct pci_bus;
15
14u32 orion_pcie_dev_id(void __iomem *base); 16u32 orion_pcie_dev_id(void __iomem *base);
15u32 orion_pcie_rev(void __iomem *base); 17u32 orion_pcie_rev(void __iomem *base);
16int orion_pcie_link_up(void __iomem *base); 18int orion_pcie_link_up(void __iomem *base);
17int orion_pcie_x4_mode(void __iomem *base); 19int orion_pcie_x4_mode(void __iomem *base);
18int orion_pcie_get_local_bus_nr(void __iomem *base); 20int orion_pcie_get_local_bus_nr(void __iomem *base);
19void orion_pcie_set_local_bus_nr(void __iomem *base, int nr); 21void orion_pcie_set_local_bus_nr(void __iomem *base, int nr);
22void orion_pcie_reset(void __iomem *base);
20void orion_pcie_setup(void __iomem *base, 23void orion_pcie_setup(void __iomem *base,
21 struct mbus_dram_target_info *dram); 24 struct mbus_dram_target_info *dram);
22int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, 25int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus,
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c
index 779553a1595e..af2d733c50b5 100644
--- a/arch/arm/plat-orion/pcie.c
+++ b/arch/arm/plat-orion/pcie.c
@@ -182,11 +182,6 @@ void __init orion_pcie_setup(void __iomem *base,
182 u32 mask; 182 u32 mask;
183 183
184 /* 184 /*
185 * soft reset PCIe unit
186 */
187 orion_pcie_reset(base);
188
189 /*
190 * Point PCIe unit MBUS decode windows to DRAM space. 185 * Point PCIe unit MBUS decode windows to DRAM space.
191 */ 186 */
192 orion_pcie_setup_wins(base, dram); 187 orion_pcie_setup_wins(base, dram);