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-rw-r--r--arch/arm/mach-iop13xx/setup.c217
1 files changed, 214 insertions, 3 deletions
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c
index bc4871553f6a..bfe0c87e3397 100644
--- a/arch/arm/mach-iop13xx/setup.c
+++ b/arch/arm/mach-iop13xx/setup.c
@@ -25,6 +25,7 @@
25#include <asm/hardware.h> 25#include <asm/hardware.h>
26#include <asm/irq.h> 26#include <asm/irq.h>
27#include <asm/io.h> 27#include <asm/io.h>
28#include <asm/hardware/iop_adma.h>
28 29
29#define IOP13XX_UART_XTAL 33334000 30#define IOP13XX_UART_XTAL 33334000
30#define IOP13XX_SETUP_DEBUG 0 31#define IOP13XX_SETUP_DEBUG 0
@@ -236,19 +237,143 @@ static unsigned long iq8134x_probe_flash_size(void)
236} 237}
237#endif 238#endif
238 239
240/* ADMA Channels */
241static struct resource iop13xx_adma_0_resources[] = {
242 [0] = {
243 .start = IOP13XX_ADMA_PHYS_BASE(0),
244 .end = IOP13XX_ADMA_UPPER_PA(0),
245 .flags = IORESOURCE_MEM,
246 },
247 [1] = {
248 .start = IRQ_IOP13XX_ADMA0_EOT,
249 .end = IRQ_IOP13XX_ADMA0_EOT,
250 .flags = IORESOURCE_IRQ
251 },
252 [2] = {
253 .start = IRQ_IOP13XX_ADMA0_EOC,
254 .end = IRQ_IOP13XX_ADMA0_EOC,
255 .flags = IORESOURCE_IRQ
256 },
257 [3] = {
258 .start = IRQ_IOP13XX_ADMA0_ERR,
259 .end = IRQ_IOP13XX_ADMA0_ERR,
260 .flags = IORESOURCE_IRQ
261 }
262};
263
264static struct resource iop13xx_adma_1_resources[] = {
265 [0] = {
266 .start = IOP13XX_ADMA_PHYS_BASE(1),
267 .end = IOP13XX_ADMA_UPPER_PA(1),
268 .flags = IORESOURCE_MEM,
269 },
270 [1] = {
271 .start = IRQ_IOP13XX_ADMA1_EOT,
272 .end = IRQ_IOP13XX_ADMA1_EOT,
273 .flags = IORESOURCE_IRQ
274 },
275 [2] = {
276 .start = IRQ_IOP13XX_ADMA1_EOC,
277 .end = IRQ_IOP13XX_ADMA1_EOC,
278 .flags = IORESOURCE_IRQ
279 },
280 [3] = {
281 .start = IRQ_IOP13XX_ADMA1_ERR,
282 .end = IRQ_IOP13XX_ADMA1_ERR,
283 .flags = IORESOURCE_IRQ
284 }
285};
286
287static struct resource iop13xx_adma_2_resources[] = {
288 [0] = {
289 .start = IOP13XX_ADMA_PHYS_BASE(2),
290 .end = IOP13XX_ADMA_UPPER_PA(2),
291 .flags = IORESOURCE_MEM,
292 },
293 [1] = {
294 .start = IRQ_IOP13XX_ADMA2_EOT,
295 .end = IRQ_IOP13XX_ADMA2_EOT,
296 .flags = IORESOURCE_IRQ
297 },
298 [2] = {
299 .start = IRQ_IOP13XX_ADMA2_EOC,
300 .end = IRQ_IOP13XX_ADMA2_EOC,
301 .flags = IORESOURCE_IRQ
302 },
303 [3] = {
304 .start = IRQ_IOP13XX_ADMA2_ERR,
305 .end = IRQ_IOP13XX_ADMA2_ERR,
306 .flags = IORESOURCE_IRQ
307 }
308};
309
310static u64 iop13xx_adma_dmamask = DMA_64BIT_MASK;
311static struct iop_adma_platform_data iop13xx_adma_0_data = {
312 .hw_id = 0,
313 .pool_size = PAGE_SIZE,
314};
315
316static struct iop_adma_platform_data iop13xx_adma_1_data = {
317 .hw_id = 1,
318 .pool_size = PAGE_SIZE,
319};
320
321static struct iop_adma_platform_data iop13xx_adma_2_data = {
322 .hw_id = 2,
323 .pool_size = PAGE_SIZE,
324};
325
326/* The ids are fixed up later in iop13xx_platform_init */
327static struct platform_device iop13xx_adma_0_channel = {
328 .name = "iop-adma",
329 .id = 0,
330 .num_resources = 4,
331 .resource = iop13xx_adma_0_resources,
332 .dev = {
333 .dma_mask = &iop13xx_adma_dmamask,
334 .coherent_dma_mask = DMA_64BIT_MASK,
335 .platform_data = (void *) &iop13xx_adma_0_data,
336 },
337};
338
339static struct platform_device iop13xx_adma_1_channel = {
340 .name = "iop-adma",
341 .id = 0,
342 .num_resources = 4,
343 .resource = iop13xx_adma_1_resources,
344 .dev = {
345 .dma_mask = &iop13xx_adma_dmamask,
346 .coherent_dma_mask = DMA_64BIT_MASK,
347 .platform_data = (void *) &iop13xx_adma_1_data,
348 },
349};
350
351static struct platform_device iop13xx_adma_2_channel = {
352 .name = "iop-adma",
353 .id = 0,
354 .num_resources = 4,
355 .resource = iop13xx_adma_2_resources,
356 .dev = {
357 .dma_mask = &iop13xx_adma_dmamask,
358 .coherent_dma_mask = DMA_64BIT_MASK,
359 .platform_data = (void *) &iop13xx_adma_2_data,
360 },
361};
362
239void __init iop13xx_map_io(void) 363void __init iop13xx_map_io(void)
240{ 364{
241 /* Initialize the Static Page Table maps */ 365 /* Initialize the Static Page Table maps */
242 iotable_init(iop13xx_std_desc, ARRAY_SIZE(iop13xx_std_desc)); 366 iotable_init(iop13xx_std_desc, ARRAY_SIZE(iop13xx_std_desc));
243} 367}
244 368
245static int init_uart = 0; 369static int init_uart;
246static int init_i2c = 0; 370static int init_i2c;
371static int init_adma;
247 372
248void __init iop13xx_platform_init(void) 373void __init iop13xx_platform_init(void)
249{ 374{
250 int i; 375 int i;
251 u32 uart_idx, i2c_idx, plat_idx; 376 u32 uart_idx, i2c_idx, adma_idx, plat_idx;
252 struct platform_device *iop13xx_devices[IQ81340_MAX_PLAT_DEVICES]; 377 struct platform_device *iop13xx_devices[IQ81340_MAX_PLAT_DEVICES];
253 378
254 /* set the bases so we can read the device id */ 379 /* set the bases so we can read the device id */
@@ -294,6 +419,12 @@ void __init iop13xx_platform_init(void)
294 } 419 }
295 } 420 }
296 421
422 if (init_adma == IOP13XX_INIT_ADMA_DEFAULT) {
423 init_adma |= IOP13XX_INIT_ADMA_0;
424 init_adma |= IOP13XX_INIT_ADMA_1;
425 init_adma |= IOP13XX_INIT_ADMA_2;
426 }
427
297 plat_idx = 0; 428 plat_idx = 0;
298 uart_idx = 0; 429 uart_idx = 0;
299 i2c_idx = 0; 430 i2c_idx = 0;
@@ -332,6 +463,56 @@ void __init iop13xx_platform_init(void)
332 } 463 }
333 } 464 }
334 465
466 /* initialize adma channel ids and capabilities */
467 adma_idx = 0;
468 for (i = 0; i < IQ81340_NUM_ADMA; i++) {
469 struct iop_adma_platform_data *plat_data;
470 if ((init_adma & (1 << i)) && IOP13XX_SETUP_DEBUG)
471 printk(KERN_INFO
472 "Adding adma%d to platform device list\n", i);
473 switch (init_adma & (1 << i)) {
474 case IOP13XX_INIT_ADMA_0:
475 iop13xx_adma_0_channel.id = adma_idx++;
476 iop13xx_devices[plat_idx++] = &iop13xx_adma_0_channel;
477 plat_data = &iop13xx_adma_0_data;
478 dma_cap_set(DMA_MEMCPY, plat_data->cap_mask);
479 dma_cap_set(DMA_XOR, plat_data->cap_mask);
480 dma_cap_set(DMA_DUAL_XOR, plat_data->cap_mask);
481 dma_cap_set(DMA_ZERO_SUM, plat_data->cap_mask);
482 dma_cap_set(DMA_MEMSET, plat_data->cap_mask);
483 dma_cap_set(DMA_MEMCPY_CRC32C, plat_data->cap_mask);
484 dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask);
485 break;
486 case IOP13XX_INIT_ADMA_1:
487 iop13xx_adma_1_channel.id = adma_idx++;
488 iop13xx_devices[plat_idx++] = &iop13xx_adma_1_channel;
489 plat_data = &iop13xx_adma_1_data;
490 dma_cap_set(DMA_MEMCPY, plat_data->cap_mask);
491 dma_cap_set(DMA_XOR, plat_data->cap_mask);
492 dma_cap_set(DMA_DUAL_XOR, plat_data->cap_mask);
493 dma_cap_set(DMA_ZERO_SUM, plat_data->cap_mask);
494 dma_cap_set(DMA_MEMSET, plat_data->cap_mask);
495 dma_cap_set(DMA_MEMCPY_CRC32C, plat_data->cap_mask);
496 dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask);
497 break;
498 case IOP13XX_INIT_ADMA_2:
499 iop13xx_adma_2_channel.id = adma_idx++;
500 iop13xx_devices[plat_idx++] = &iop13xx_adma_2_channel;
501 plat_data = &iop13xx_adma_2_data;
502 dma_cap_set(DMA_MEMCPY, plat_data->cap_mask);
503 dma_cap_set(DMA_XOR, plat_data->cap_mask);
504 dma_cap_set(DMA_DUAL_XOR, plat_data->cap_mask);
505 dma_cap_set(DMA_ZERO_SUM, plat_data->cap_mask);
506 dma_cap_set(DMA_MEMSET, plat_data->cap_mask);
507 dma_cap_set(DMA_MEMCPY_CRC32C, plat_data->cap_mask);
508 dma_cap_set(DMA_INTERRUPT, plat_data->cap_mask);
509 dma_cap_set(DMA_PQ_XOR, plat_data->cap_mask);
510 dma_cap_set(DMA_PQ_UPDATE, plat_data->cap_mask);
511 dma_cap_set(DMA_PQ_ZERO_SUM, plat_data->cap_mask);
512 break;
513 }
514 }
515
335#ifdef CONFIG_MTD_PHYSMAP 516#ifdef CONFIG_MTD_PHYSMAP
336 iq8134x_flash_resource.end = iq8134x_flash_resource.start + 517 iq8134x_flash_resource.end = iq8134x_flash_resource.start +
337 iq8134x_probe_flash_size() - 1; 518 iq8134x_probe_flash_size() - 1;
@@ -399,5 +580,35 @@ static int __init iop13xx_init_i2c_setup(char *str)
399 return 1; 580 return 1;
400} 581}
401 582
583static int __init iop13xx_init_adma_setup(char *str)
584{
585 if (str) {
586 while (*str != '\0') {
587 switch (*str) {
588 case '0':
589 init_adma |= IOP13XX_INIT_ADMA_0;
590 break;
591 case '1':
592 init_adma |= IOP13XX_INIT_ADMA_1;
593 break;
594 case '2':
595 init_adma |= IOP13XX_INIT_ADMA_2;
596 break;
597 case ',':
598 case '=':
599 break;
600 default:
601 PRINTK("\"iop13xx_init_adma\" malformed"
602 " at character: \'%c\'", *str);
603 *(str + 1) = '\0';
604 init_adma = IOP13XX_INIT_ADMA_DEFAULT;
605 }
606 str++;
607 }
608 }
609 return 1;
610}
611
612__setup("iop13xx_init_adma", iop13xx_init_adma_setup);
402__setup("iop13xx_init_uart", iop13xx_init_uart_setup); 613__setup("iop13xx_init_uart", iop13xx_init_uart_setup);
403__setup("iop13xx_init_i2c", iop13xx_init_i2c_setup); 614__setup("iop13xx_init_i2c", iop13xx_init_i2c_setup);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 14:14:20 -0500