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-rw-r--r--arch/arm/common/gic.c95
-rw-r--r--arch/arm/common/vic.c16
-rw-r--r--arch/arm/include/asm/hardware/gic.h4
-rw-r--r--arch/arm/include/asm/hardware/vic.h2
-rw-r--r--arch/arm/kernel/traps.c5
-rw-r--r--arch/arm/kernel/vmlinux.lds.S1
-rw-r--r--arch/arm/mach-exynos/common.c2
-rw-r--r--arch/arm/mach-imx/imx51-dt.c4
-rw-r--r--arch/arm/mach-imx/imx53-dt.c4
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c3
-rw-r--r--arch/arm/mach-msm/board-msm8x60.c8
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c17
-rw-r--r--arch/arm/mach-omap2/board-generic.c2
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c23
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c6
-rw-r--r--arch/arm/mach-omap2/board-zoom-peripherals.c6
-rw-r--r--arch/arm/mach-omap2/hsmmc.c8
-rw-r--r--arch/arm/mach-omap2/mux.c22
-rw-r--r--arch/arm/mach-omap2/omap-headsmp.S1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c16
-rw-r--r--arch/arm/mach-omap2/prm44xx.c1
-rw-r--r--arch/arm/mach-omap2/serial.c8
-rw-r--r--arch/arm/mach-omap2/vc.c10
-rw-r--r--arch/arm/mach-omap2/vp.c5
-rw-r--r--arch/arm/mach-prima2/irq.c2
-rw-r--r--arch/arm/mach-versatile/core.c7
-rw-r--r--arch/arm/mm/cache-v7.S6
27 files changed, 151 insertions, 133 deletions
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index c47d6199b784..f0783be17352 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -51,7 +51,6 @@ union gic_base {
51}; 51};
52 52
53struct gic_chip_data { 53struct gic_chip_data {
54 unsigned int irq_offset;
55 union gic_base dist_base; 54 union gic_base dist_base;
56 union gic_base cpu_base; 55 union gic_base cpu_base;
57#ifdef CONFIG_CPU_PM 56#ifdef CONFIG_CPU_PM
@@ -61,9 +60,7 @@ struct gic_chip_data {
61 u32 __percpu *saved_ppi_enable; 60 u32 __percpu *saved_ppi_enable;
62 u32 __percpu *saved_ppi_conf; 61 u32 __percpu *saved_ppi_conf;
63#endif 62#endif
64#ifdef CONFIG_IRQ_DOMAIN 63 struct irq_domain *domain;
65 struct irq_domain domain;
66#endif
67 unsigned int gic_irqs; 64 unsigned int gic_irqs;
68#ifdef CONFIG_GIC_NON_BANKED 65#ifdef CONFIG_GIC_NON_BANKED
69 void __iomem *(*get_base)(union gic_base *); 66 void __iomem *(*get_base)(union gic_base *);
@@ -282,7 +279,7 @@ asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
282 irqnr = irqstat & ~0x1c00; 279 irqnr = irqstat & ~0x1c00;
283 280
284 if (likely(irqnr > 15 && irqnr < 1021)) { 281 if (likely(irqnr > 15 && irqnr < 1021)) {
285 irqnr = irq_domain_to_irq(&gic->domain, irqnr); 282 irqnr = irq_find_mapping(gic->domain, irqnr);
286 handle_IRQ(irqnr, regs); 283 handle_IRQ(irqnr, regs);
287 continue; 284 continue;
288 } 285 }
@@ -314,8 +311,8 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
314 if (gic_irq == 1023) 311 if (gic_irq == 1023)
315 goto out; 312 goto out;
316 313
317 cascade_irq = irq_domain_to_irq(&chip_data->domain, gic_irq); 314 cascade_irq = irq_find_mapping(chip_data->domain, gic_irq);
318 if (unlikely(gic_irq < 32 || gic_irq > 1020 || cascade_irq >= NR_IRQS)) 315 if (unlikely(gic_irq < 32 || gic_irq > 1020))
319 do_bad_IRQ(cascade_irq, desc); 316 do_bad_IRQ(cascade_irq, desc);
320 else 317 else
321 generic_handle_irq(cascade_irq); 318 generic_handle_irq(cascade_irq);
@@ -348,10 +345,9 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
348 345
349static void __init gic_dist_init(struct gic_chip_data *gic) 346static void __init gic_dist_init(struct gic_chip_data *gic)
350{ 347{
351 unsigned int i, irq; 348 unsigned int i;
352 u32 cpumask; 349 u32 cpumask;
353 unsigned int gic_irqs = gic->gic_irqs; 350 unsigned int gic_irqs = gic->gic_irqs;
354 struct irq_domain *domain = &gic->domain;
355 void __iomem *base = gic_data_dist_base(gic); 351 void __iomem *base = gic_data_dist_base(gic);
356 u32 cpu = cpu_logical_map(smp_processor_id()); 352 u32 cpu = cpu_logical_map(smp_processor_id());
357 353
@@ -386,23 +382,6 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
386 for (i = 32; i < gic_irqs; i += 32) 382 for (i = 32; i < gic_irqs; i += 32)
387 writel_relaxed(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32); 383 writel_relaxed(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32);
388 384
389 /*
390 * Setup the Linux IRQ subsystem.
391 */
392 irq_domain_for_each_irq(domain, i, irq) {
393 if (i < 32) {
394 irq_set_percpu_devid(irq);
395 irq_set_chip_and_handler(irq, &gic_chip,
396 handle_percpu_devid_irq);
397 set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN);
398 } else {
399 irq_set_chip_and_handler(irq, &gic_chip,
400 handle_fasteoi_irq);
401 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
402 }
403 irq_set_chip_data(irq, gic);
404 }
405
406 writel_relaxed(1, base + GIC_DIST_CTRL); 385 writel_relaxed(1, base + GIC_DIST_CTRL);
407} 386}
408 387
@@ -618,11 +597,27 @@ static void __init gic_pm_init(struct gic_chip_data *gic)
618} 597}
619#endif 598#endif
620 599
621#ifdef CONFIG_OF 600static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
622static int gic_irq_domain_dt_translate(struct irq_domain *d, 601 irq_hw_number_t hw)
623 struct device_node *controller, 602{
624 const u32 *intspec, unsigned int intsize, 603 if (hw < 32) {
625 unsigned long *out_hwirq, unsigned int *out_type) 604 irq_set_percpu_devid(irq);
605 irq_set_chip_and_handler(irq, &gic_chip,
606 handle_percpu_devid_irq);
607 set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN);
608 } else {
609 irq_set_chip_and_handler(irq, &gic_chip,
610 handle_fasteoi_irq);
611 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
612 }
613 irq_set_chip_data(irq, d->host_data);
614 return 0;
615}
616
617static int gic_irq_domain_xlate(struct irq_domain *d,
618 struct device_node *controller,
619 const u32 *intspec, unsigned int intsize,
620 unsigned long *out_hwirq, unsigned int *out_type)
626{ 621{
627 if (d->of_node != controller) 622 if (d->of_node != controller)
628 return -EINVAL; 623 return -EINVAL;
@@ -639,26 +634,23 @@ static int gic_irq_domain_dt_translate(struct irq_domain *d,
639 *out_type = intspec[2] & IRQ_TYPE_SENSE_MASK; 634 *out_type = intspec[2] & IRQ_TYPE_SENSE_MASK;
640 return 0; 635 return 0;
641} 636}
642#endif
643 637
644const struct irq_domain_ops gic_irq_domain_ops = { 638const struct irq_domain_ops gic_irq_domain_ops = {
645#ifdef CONFIG_OF 639 .map = gic_irq_domain_map,
646 .dt_translate = gic_irq_domain_dt_translate, 640 .xlate = gic_irq_domain_xlate,
647#endif
648}; 641};
649 642
650void __init gic_init_bases(unsigned int gic_nr, int irq_start, 643void __init gic_init_bases(unsigned int gic_nr, int irq_start,
651 void __iomem *dist_base, void __iomem *cpu_base, 644 void __iomem *dist_base, void __iomem *cpu_base,
652 u32 percpu_offset) 645 u32 percpu_offset, struct device_node *node)
653{ 646{
647 irq_hw_number_t hwirq_base;
654 struct gic_chip_data *gic; 648 struct gic_chip_data *gic;
655 struct irq_domain *domain; 649 int gic_irqs, irq_base;
656 int gic_irqs;
657 650
658 BUG_ON(gic_nr >= MAX_GIC_NR); 651 BUG_ON(gic_nr >= MAX_GIC_NR);
659 652
660 gic = &gic_data[gic_nr]; 653 gic = &gic_data[gic_nr];
661 domain = &gic->domain;
662#ifdef CONFIG_GIC_NON_BANKED 654#ifdef CONFIG_GIC_NON_BANKED
663 if (percpu_offset) { /* Frankein-GIC without banked registers... */ 655 if (percpu_offset) { /* Frankein-GIC without banked registers... */
664 unsigned int cpu; 656 unsigned int cpu;
@@ -694,10 +686,10 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
694 * For primary GICs, skip over SGIs. 686 * For primary GICs, skip over SGIs.
695 * For secondary GICs, skip over PPIs, too. 687 * For secondary GICs, skip over PPIs, too.
696 */ 688 */
697 domain->hwirq_base = 32; 689 hwirq_base = 32;
698 if (gic_nr == 0) { 690 if (gic_nr == 0) {
699 if ((irq_start & 31) > 0) { 691 if ((irq_start & 31) > 0) {
700 domain->hwirq_base = 16; 692 hwirq_base = 16;
701 if (irq_start != -1) 693 if (irq_start != -1)
702 irq_start = (irq_start & ~31) + 16; 694 irq_start = (irq_start & ~31) + 16;
703 } 695 }
@@ -713,17 +705,17 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
713 gic_irqs = 1020; 705 gic_irqs = 1020;
714 gic->gic_irqs = gic_irqs; 706 gic->gic_irqs = gic_irqs;
715 707
716 domain->nr_irq = gic_irqs - domain->hwirq_base; 708 gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */
717 domain->irq_base = irq_alloc_descs(irq_start, 16, domain->nr_irq, 709 irq_base = irq_alloc_descs(irq_start, 16, gic_irqs, numa_node_id());
718 numa_node_id()); 710 if (IS_ERR_VALUE(irq_base)) {
719 if (IS_ERR_VALUE(domain->irq_base)) {
720 WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n", 711 WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n",
721 irq_start); 712 irq_start);
722 domain->irq_base = irq_start; 713 irq_base = irq_start;
723 } 714 }
724 domain->priv = gic; 715 gic->domain = irq_domain_add_legacy(node, gic_irqs, irq_base,
725 domain->ops = &gic_irq_domain_ops; 716 hwirq_base, &gic_irq_domain_ops, gic);
726 irq_domain_add(domain); 717 if (WARN_ON(!gic->domain))
718 return;
727 719
728 gic_chip.flags |= gic_arch_extn.flags; 720 gic_chip.flags |= gic_arch_extn.flags;
729 gic_dist_init(gic); 721 gic_dist_init(gic);
@@ -768,7 +760,6 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
768 void __iomem *dist_base; 760 void __iomem *dist_base;
769 u32 percpu_offset; 761 u32 percpu_offset;
770 int irq; 762 int irq;
771 struct irq_domain *domain = &gic_data[gic_cnt].domain;
772 763
773 if (WARN_ON(!node)) 764 if (WARN_ON(!node))
774 return -ENODEV; 765 return -ENODEV;
@@ -782,9 +773,7 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
782 if (of_property_read_u32(node, "cpu-offset", &percpu_offset)) 773 if (of_property_read_u32(node, "cpu-offset", &percpu_offset))
783 percpu_offset = 0; 774 percpu_offset = 0;
784 775
785 domain->of_node = of_node_get(node); 776 gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset, node);
786
787 gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset);
788 777
789 if (parent) { 778 if (parent) {
790 irq = irq_of_parse_and_map(node, 0); 779 irq = irq_of_parse_and_map(node, 0);
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index dcb004a804c7..7a66311f3066 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -56,7 +56,7 @@ struct vic_device {
56 u32 int_enable; 56 u32 int_enable;
57 u32 soft_int; 57 u32 soft_int;
58 u32 protect; 58 u32 protect;
59 struct irq_domain domain; 59 struct irq_domain *domain;
60}; 60};
61 61
62/* we cannot allocate memory when VICs are initially registered */ 62/* we cannot allocate memory when VICs are initially registered */
@@ -192,14 +192,8 @@ static void __init vic_register(void __iomem *base, unsigned int irq,
192 v->resume_sources = resume_sources; 192 v->resume_sources = resume_sources;
193 v->irq = irq; 193 v->irq = irq;
194 vic_id++; 194 vic_id++;
195 195 v->domain = irq_domain_add_legacy(node, 32, irq, 0,
196 v->domain.irq_base = irq; 196 &irq_domain_simple_ops, v);
197 v->domain.nr_irq = 32;
198#ifdef CONFIG_OF_IRQ
199 v->domain.of_node = of_node_get(node);
200#endif /* CONFIG_OF */
201 v->domain.ops = &irq_domain_simple_ops;
202 irq_domain_add(&v->domain);
203} 197}
204 198
205static void vic_ack_irq(struct irq_data *d) 199static void vic_ack_irq(struct irq_data *d)
@@ -348,7 +342,7 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
348 vic_register(base, irq_start, 0, node); 342 vic_register(base, irq_start, 0, node);
349} 343}
350 344
351static void __init __vic_init(void __iomem *base, unsigned int irq_start, 345void __init __vic_init(void __iomem *base, unsigned int irq_start,
352 u32 vic_sources, u32 resume_sources, 346 u32 vic_sources, u32 resume_sources,
353 struct device_node *node) 347 struct device_node *node)
354{ 348{
@@ -444,7 +438,7 @@ static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs)
444 stat = readl_relaxed(vic->base + VIC_IRQ_STATUS); 438 stat = readl_relaxed(vic->base + VIC_IRQ_STATUS);
445 while (stat) { 439 while (stat) {
446 irq = ffs(stat) - 1; 440 irq = ffs(stat) - 1;
447 handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs); 441 handle_IRQ(irq_find_mapping(vic->domain, irq), regs);
448 stat &= ~(1 << irq); 442 stat &= ~(1 << irq);
449 handled = 1; 443 handled = 1;
450 } 444 }
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 4bdfe0018696..4b1ce6cd477f 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -39,7 +39,7 @@ struct device_node;
39extern struct irq_chip gic_arch_extn; 39extern struct irq_chip gic_arch_extn;
40 40
41void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *, 41void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
42 u32 offset); 42 u32 offset, struct device_node *);
43int gic_of_init(struct device_node *node, struct device_node *parent); 43int gic_of_init(struct device_node *node, struct device_node *parent);
44void gic_secondary_init(unsigned int); 44void gic_secondary_init(unsigned int);
45void gic_handle_irq(struct pt_regs *regs); 45void gic_handle_irq(struct pt_regs *regs);
@@ -49,7 +49,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
49static inline void gic_init(unsigned int nr, int start, 49static inline void gic_init(unsigned int nr, int start,
50 void __iomem *dist , void __iomem *cpu) 50 void __iomem *dist , void __iomem *cpu)
51{ 51{
52 gic_init_bases(nr, start, dist, cpu, 0); 52 gic_init_bases(nr, start, dist, cpu, 0, NULL);
53} 53}
54 54
55#endif 55#endif
diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h
index f42ebd619590..e14af1a1a320 100644
--- a/arch/arm/include/asm/hardware/vic.h
+++ b/arch/arm/include/asm/hardware/vic.h
@@ -47,6 +47,8 @@
47struct device_node; 47struct device_node;
48struct pt_regs; 48struct pt_regs;
49 49
50void __vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources,
51 u32 resume_sources, struct device_node *node);
50void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources); 52void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
51int vic_of_init(struct device_node *node, struct device_node *parent); 53int vic_of_init(struct device_node *node, struct device_node *parent);
52void vic_handle_irq(struct pt_regs *regs); 54void vic_handle_irq(struct pt_regs *regs);
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 99a572702509..f84dfe67724f 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -266,6 +266,7 @@ void die(const char *str, struct pt_regs *regs, int err)
266{ 266{
267 struct thread_info *thread = current_thread_info(); 267 struct thread_info *thread = current_thread_info();
268 int ret; 268 int ret;
269 enum bug_trap_type bug_type = BUG_TRAP_TYPE_NONE;
269 270
270 oops_enter(); 271 oops_enter();
271 272
@@ -273,7 +274,9 @@ void die(const char *str, struct pt_regs *regs, int err)
273 console_verbose(); 274 console_verbose();
274 bust_spinlocks(1); 275 bust_spinlocks(1);
275 if (!user_mode(regs)) 276 if (!user_mode(regs))
276 report_bug(regs->ARM_pc, regs); 277 bug_type = report_bug(regs->ARM_pc, regs);
278 if (bug_type != BUG_TRAP_TYPE_NONE)
279 str = "Oops - BUG";
277 ret = __die(str, err, thread, regs); 280 ret = __die(str, err, thread, regs);
278 281
279 if (regs && kexec_should_crash(thread->task)) 282 if (regs && kexec_should_crash(thread->task))
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 1e19691e0406..43a31fb06318 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -10,6 +10,7 @@
10#include <asm/page.h> 10#include <asm/page.h>
11 11
12#define PROC_INFO \ 12#define PROC_INFO \
13 . = ALIGN(4); \
13 VMLINUX_SYMBOL(__proc_info_begin) = .; \ 14 VMLINUX_SYMBOL(__proc_info_begin) = .; \
14 *(.proc.info.init) \ 15 *(.proc.info.init) \
15 VMLINUX_SYMBOL(__proc_info_end) = .; 16 VMLINUX_SYMBOL(__proc_info_end) = .;
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 031c1e5b3dfe..93fa2d532e4a 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -394,7 +394,7 @@ void __init exynos4_init_irq(void)
394 gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000; 394 gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
395 395
396 if (!of_have_populated_dt()) 396 if (!of_have_populated_dt())
397 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset); 397 gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL);
398#ifdef CONFIG_OF 398#ifdef CONFIG_OF
399 else 399 else
400 of_irq_init(exynos4_dt_irq_match); 400 of_irq_init(exynos4_dt_irq_match);
diff --git a/arch/arm/mach-imx/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c
index e6bad17b908c..1e03ef42faa0 100644
--- a/arch/arm/mach-imx/imx51-dt.c
+++ b/arch/arm/mach-imx/imx51-dt.c
@@ -47,7 +47,7 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
47static int __init imx51_tzic_add_irq_domain(struct device_node *np, 47static int __init imx51_tzic_add_irq_domain(struct device_node *np,
48 struct device_node *interrupt_parent) 48 struct device_node *interrupt_parent)
49{ 49{
50 irq_domain_add_simple(np, 0); 50 irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);
51 return 0; 51 return 0;
52} 52}
53 53
@@ -57,7 +57,7 @@ static int __init imx51_gpio_add_irq_domain(struct device_node *np,
57 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; 57 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
58 58
59 gpio_irq_base -= 32; 59 gpio_irq_base -= 32;
60 irq_domain_add_simple(np, gpio_irq_base); 60 irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL);
61 61
62 return 0; 62 return 0;
63} 63}
diff --git a/arch/arm/mach-imx/imx53-dt.c b/arch/arm/mach-imx/imx53-dt.c
index 05ebb3e68679..fd5be0f20fbb 100644
--- a/arch/arm/mach-imx/imx53-dt.c
+++ b/arch/arm/mach-imx/imx53-dt.c
@@ -51,7 +51,7 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
51static int __init imx53_tzic_add_irq_domain(struct device_node *np, 51static int __init imx53_tzic_add_irq_domain(struct device_node *np,
52 struct device_node *interrupt_parent) 52 struct device_node *interrupt_parent)
53{ 53{
54 irq_domain_add_simple(np, 0); 54 irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);
55 return 0; 55 return 0;
56} 56}
57 57
@@ -61,7 +61,7 @@ static int __init imx53_gpio_add_irq_domain(struct device_node *np,
61 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; 61 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
62 62
63 gpio_irq_base -= 32; 63 gpio_irq_base -= 32;
64 irq_domain_add_simple(np, gpio_irq_base); 64 irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL);
65 65
66 return 0; 66 return 0;
67} 67}
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index c25728106917..6075d4d62dd6 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -97,7 +97,8 @@ static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
97 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; 97 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
98 98
99 gpio_irq_base -= 32; 99 gpio_irq_base -= 32;
100 irq_domain_add_simple(np, gpio_irq_base); 100 irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops,
101 NULL);
101 102
102 return 0; 103 return 0;
103} 104}
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 0a113424632c..962e71169750 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -80,12 +80,8 @@ static struct of_device_id msm_dt_gic_match[] __initdata = {
80 80
81static void __init msm8x60_dt_init(void) 81static void __init msm8x60_dt_init(void)
82{ 82{
83 struct device_node *node; 83 irq_domain_generate_simple(msm_dt_gic_match, MSM8X60_QGIC_DIST_PHYS,
84 84 GIC_SPI_START);
85 node = of_find_matching_node_by_address(NULL, msm_dt_gic_match,
86 MSM8X60_QGIC_DIST_PHYS);
87 if (node)
88 irq_domain_add_simple(node, GIC_SPI_START);
89 85
90 if (of_machine_is_compatible("qcom,msm8660-surf")) { 86 if (of_machine_is_compatible("qcom,msm8660-surf")) {
91 printk(KERN_INFO "Init surf UART registers\n"); 87 printk(KERN_INFO "Init surf UART registers\n");
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 21fc87648660..4e9071589bfb 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -814,7 +814,7 @@ static struct omap_dss_board_info sdp4430_dss_data = {
814 .default_device = &sdp4430_lcd_device, 814 .default_device = &sdp4430_lcd_device,
815}; 815};
816 816
817static void omap_4430sdp_display_init(void) 817static void __init omap_4430sdp_display_init(void)
818{ 818{
819 int r; 819 int r;
820 820
@@ -851,7 +851,7 @@ static struct omap_board_mux board_mux[] __initdata = {
851#define board_mux NULL 851#define board_mux NULL
852 #endif 852 #endif
853 853
854static void omap4_sdp4430_wifi_mux_init(void) 854static void __init omap4_sdp4430_wifi_mux_init(void)
855{ 855{
856 omap_mux_init_gpio(GPIO_WIFI_IRQ, OMAP_PIN_INPUT | 856 omap_mux_init_gpio(GPIO_WIFI_IRQ, OMAP_PIN_INPUT |
857 OMAP_PIN_OFF_WAKEUPENABLE); 857 OMAP_PIN_OFF_WAKEUPENABLE);
@@ -878,12 +878,17 @@ static struct wl12xx_platform_data omap4_sdp4430_wlan_data __initdata = {
878 .board_tcxo_clock = WL12XX_TCXOCLOCK_26, 878 .board_tcxo_clock = WL12XX_TCXOCLOCK_26,
879}; 879};
880 880
881static void omap4_sdp4430_wifi_init(void) 881static void __init omap4_sdp4430_wifi_init(void)
882{ 882{
883 int ret;
884
883 omap4_sdp4430_wifi_mux_init(); 885 omap4_sdp4430_wifi_mux_init();
884 if (wl12xx_set_platform_data(&omap4_sdp4430_wlan_data)) 886 ret = wl12xx_set_platform_data(&omap4_sdp4430_wlan_data);
885 pr_err("Error setting wl12xx data\n"); 887 if (ret)
886 platform_device_register(&omap_vwlan_device); 888 pr_err("Error setting wl12xx data: %d\n", ret);
889 ret = platform_device_register(&omap_vwlan_device);
890 if (ret)
891 pr_err("Error registering wl12xx device: %d\n", ret);
887} 892}
888 893
889static void __init omap_4430sdp_init(void) 894static void __init omap_4430sdp_init(void)
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index d58756060483..00b1d024fa87 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -67,7 +67,7 @@ static void __init omap_generic_init(void)
67{ 67{
68 struct device_node *node = of_find_matching_node(NULL, intc_match); 68 struct device_node *node = of_find_matching_node(NULL, intc_match);
69 if (node) 69 if (node)
70 irq_domain_add_simple(node, 0); 70 irq_domain_add_legacy(node, 32, 0, 0, &irq_domain_simple_ops, NULL);
71 71
72 omap_sdrc_init(NULL, NULL); 72 omap_sdrc_init(NULL, NULL);
73 73
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index 003fe34c9343..c775bead1497 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -617,6 +617,21 @@ static struct gpio omap3_evm_ehci_gpios[] __initdata = {
617 { OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" }, 617 { OMAP3_EVM_EHCI_SELECT, GPIOF_OUT_INIT_LOW, "select EHCI port" },
618}; 618};
619 619
620static void __init omap3_evm_wl12xx_init(void)
621{
622#ifdef CONFIG_WL12XX_PLATFORM_DATA
623 int ret;
624
625 /* WL12xx WLAN Init */
626 ret = wl12xx_set_platform_data(&omap3evm_wlan_data);
627 if (ret)
628 pr_err("error setting wl12xx data: %d\n", ret);
629 ret = platform_device_register(&omap3evm_wlan_regulator);
630 if (ret)
631 pr_err("error registering wl12xx device: %d\n", ret);
632#endif
633}
634
620static void __init omap3_evm_init(void) 635static void __init omap3_evm_init(void)
621{ 636{
622 omap3_evm_get_revision(); 637 omap3_evm_get_revision();
@@ -665,13 +680,7 @@ static void __init omap3_evm_init(void)
665 omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL); 680 omap_ads7846_init(1, OMAP3_EVM_TS_GPIO, 310, NULL);
666 omap3evm_init_smsc911x(); 681 omap3evm_init_smsc911x();
667 omap3_evm_display_init(); 682 omap3_evm_display_init();
668 683 omap3_evm_wl12xx_init();
669#ifdef CONFIG_WL12XX_PLATFORM_DATA
670 /* WL12xx WLAN Init */
671 if (wl12xx_set_platform_data(&omap3evm_wlan_data))
672 pr_err("error setting wl12xx data\n");
673 platform_device_register(&omap3evm_wlan_regulator);
674#endif
675} 684}
676 685
677MACHINE_START(OMAP3EVM, "OMAP3 EVM") 686MACHINE_START(OMAP3EVM, "OMAP3 EVM")
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index b7779c206a90..28fc271f7031 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -488,13 +488,15 @@ void omap4_panda_display_init(void)
488static void __init omap4_panda_init(void) 488static void __init omap4_panda_init(void)
489{ 489{
490 int package = OMAP_PACKAGE_CBS; 490 int package = OMAP_PACKAGE_CBS;
491 int ret;
491 492
492 if (omap_rev() == OMAP4430_REV_ES1_0) 493 if (omap_rev() == OMAP4430_REV_ES1_0)
493 package = OMAP_PACKAGE_CBL; 494 package = OMAP_PACKAGE_CBL;
494 omap4_mux_init(board_mux, NULL, package); 495 omap4_mux_init(board_mux, NULL, package);
495 496
496 if (wl12xx_set_platform_data(&omap_panda_wlan_data)) 497 ret = wl12xx_set_platform_data(&omap_panda_wlan_data);
497 pr_err("error setting wl12xx data\n"); 498 if (ret)
499 pr_err("error setting wl12xx data: %d\n", ret);
498 500
499 omap4_panda_i2c_init(); 501 omap4_panda_i2c_init();
500 platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices)); 502 platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 8d7ce11cfeaf..c126461836ac 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -296,8 +296,10 @@ static void enable_board_wakeup_source(void)
296 296
297void __init zoom_peripherals_init(void) 297void __init zoom_peripherals_init(void)
298{ 298{
299 if (wl12xx_set_platform_data(&omap_zoom_wlan_data)) 299 int ret = wl12xx_set_platform_data(&omap_zoom_wlan_data);
300 pr_err("error setting wl12xx data\n"); 300
301 if (ret)
302 pr_err("error setting wl12xx data: %d\n", ret);
301 303
302 omap_i2c_init(); 304 omap_i2c_init();
303 platform_device_register(&omap_vwlan_device); 305 platform_device_register(&omap_vwlan_device);
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index ad0adb5a1e0e..b40c28895298 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -293,8 +293,8 @@ static inline void omap_hsmmc_mux(struct omap_mmc_platform_data *mmc_controller,
293 } 293 }
294} 294}
295 295
296static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, 296static int omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
297 struct omap_mmc_platform_data *mmc) 297 struct omap_mmc_platform_data *mmc)
298{ 298{
299 char *hc_name; 299 char *hc_name;
300 300
@@ -430,7 +430,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
430 430
431#define MAX_OMAP_MMC_HWMOD_NAME_LEN 16 431#define MAX_OMAP_MMC_HWMOD_NAME_LEN 16
432 432
433void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) 433void omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
434{ 434{
435 struct omap_hwmod *oh; 435 struct omap_hwmod *oh;
436 struct platform_device *pdev; 436 struct platform_device *pdev;
@@ -487,7 +487,7 @@ done:
487 kfree(mmc_data); 487 kfree(mmc_data);
488} 488}
489 489
490void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers) 490void omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
491{ 491{
492 u32 reg; 492 u32 reg;
493 493
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index e1cc75d1a57a..fb8bc9fa43b1 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -100,8 +100,8 @@ void omap_mux_write_array(struct omap_mux_partition *partition,
100 100
101static char *omap_mux_options; 101static char *omap_mux_options;
102 102
103static int __init _omap_mux_init_gpio(struct omap_mux_partition *partition, 103static int _omap_mux_init_gpio(struct omap_mux_partition *partition,
104 int gpio, int val) 104 int gpio, int val)
105{ 105{
106 struct omap_mux_entry *e; 106 struct omap_mux_entry *e;
107 struct omap_mux *gpio_mux = NULL; 107 struct omap_mux *gpio_mux = NULL;
@@ -145,7 +145,7 @@ static int __init _omap_mux_init_gpio(struct omap_mux_partition *partition,
145 return 0; 145 return 0;
146} 146}
147 147
148int __init omap_mux_init_gpio(int gpio, int val) 148int omap_mux_init_gpio(int gpio, int val)
149{ 149{
150 struct omap_mux_partition *partition; 150 struct omap_mux_partition *partition;
151 int ret; 151 int ret;
@@ -159,9 +159,9 @@ int __init omap_mux_init_gpio(int gpio, int val)
159 return -ENODEV; 159 return -ENODEV;
160} 160}
161 161
162static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition, 162static int _omap_mux_get_by_name(struct omap_mux_partition *partition,
163 const char *muxname, 163 const char *muxname,
164 struct omap_mux **found_mux) 164 struct omap_mux **found_mux)
165{ 165{
166 struct omap_mux *mux = NULL; 166 struct omap_mux *mux = NULL;
167 struct omap_mux_entry *e; 167 struct omap_mux_entry *e;
@@ -240,7 +240,7 @@ omap_mux_get_by_name(const char *muxname,
240 return -ENODEV; 240 return -ENODEV;
241} 241}
242 242
243int __init omap_mux_init_signal(const char *muxname, int val) 243int omap_mux_init_signal(const char *muxname, int val)
244{ 244{
245 struct omap_mux_partition *partition = NULL; 245 struct omap_mux_partition *partition = NULL;
246 struct omap_mux *mux = NULL; 246 struct omap_mux *mux = NULL;
@@ -1094,8 +1094,8 @@ static void omap_mux_init_package(struct omap_mux *superset,
1094 omap_mux_package_init_balls(package_balls, superset); 1094 omap_mux_package_init_balls(package_balls, superset);
1095} 1095}
1096 1096
1097static void omap_mux_init_signals(struct omap_mux_partition *partition, 1097static void __init omap_mux_init_signals(struct omap_mux_partition *partition,
1098 struct omap_board_mux *board_mux) 1098 struct omap_board_mux *board_mux)
1099{ 1099{
1100 omap_mux_set_cmdline_signals(); 1100 omap_mux_set_cmdline_signals();
1101 omap_mux_write_array(partition, board_mux); 1101 omap_mux_write_array(partition, board_mux);
@@ -1109,8 +1109,8 @@ static void omap_mux_init_package(struct omap_mux *superset,
1109{ 1109{
1110} 1110}
1111 1111
1112static void omap_mux_init_signals(struct omap_mux_partition *partition, 1112static void __init omap_mux_init_signals(struct omap_mux_partition *partition,
1113 struct omap_board_mux *board_mux) 1113 struct omap_board_mux *board_mux)
1114{ 1114{
1115} 1115}
1116 1116
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index b13ef7ef5ef4..503ac777a2ba 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -18,6 +18,7 @@
18#include <linux/linkage.h> 18#include <linux/linkage.h>
19#include <linux/init.h> 19#include <linux/init.h>
20 20
21 __CPUINIT
21/* 22/*
22 * OMAP4 specific entry point for secondary CPU to jump from ROM 23 * OMAP4 specific entry point for secondary CPU to jump from ROM
23 * code. This routine also provides a holding flag into which 24 * code. This routine also provides a holding flag into which
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 5192cabb40ed..eba6cd3816f5 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1517,8 +1517,8 @@ static int _enable(struct omap_hwmod *oh)
1517 if (oh->_state != _HWMOD_STATE_INITIALIZED && 1517 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1518 oh->_state != _HWMOD_STATE_IDLE && 1518 oh->_state != _HWMOD_STATE_IDLE &&
1519 oh->_state != _HWMOD_STATE_DISABLED) { 1519 oh->_state != _HWMOD_STATE_DISABLED) {
1520 WARN(1, "omap_hwmod: %s: enabled state can only be entered " 1520 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1521 "from initialized, idle, or disabled state\n", oh->name); 1521 oh->name);
1522 return -EINVAL; 1522 return -EINVAL;
1523 } 1523 }
1524 1524
@@ -1600,8 +1600,8 @@ static int _idle(struct omap_hwmod *oh)
1600 pr_debug("omap_hwmod: %s: idling\n", oh->name); 1600 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1601 1601
1602 if (oh->_state != _HWMOD_STATE_ENABLED) { 1602 if (oh->_state != _HWMOD_STATE_ENABLED) {
1603 WARN(1, "omap_hwmod: %s: idle state can only be entered from " 1603 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1604 "enabled state\n", oh->name); 1604 oh->name);
1605 return -EINVAL; 1605 return -EINVAL;
1606 } 1606 }
1607 1607
@@ -1682,8 +1682,8 @@ static int _shutdown(struct omap_hwmod *oh)
1682 1682
1683 if (oh->_state != _HWMOD_STATE_IDLE && 1683 if (oh->_state != _HWMOD_STATE_IDLE &&
1684 oh->_state != _HWMOD_STATE_ENABLED) { 1684 oh->_state != _HWMOD_STATE_ENABLED) {
1685 WARN(1, "omap_hwmod: %s: disabled state can only be entered " 1685 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
1686 "from idle, or enabled state\n", oh->name); 1686 oh->name);
1687 return -EINVAL; 1687 return -EINVAL;
1688 } 1688 }
1689 1689
@@ -2240,8 +2240,8 @@ void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
2240 BUG_ON(!oh); 2240 BUG_ON(!oh);
2241 2241
2242 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) { 2242 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
2243 WARN(1, "omap_device: %s: OCP barrier impossible due to " 2243 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
2244 "device configuration\n", oh->name); 2244 oh->name);
2245 return; 2245 return;
2246 } 2246 }
2247 2247
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 33dd655e6aab..a1d6154dc120 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -19,6 +19,7 @@
19 19
20#include "common.h" 20#include "common.h"
21#include <plat/cpu.h> 21#include <plat/cpu.h>
22#include <plat/irqs.h>
22#include <plat/prcm.h> 23#include <plat/prcm.h>
23 24
24#include "vp.h" 25#include "vp.h"
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 247d89478f24..f590afc1f673 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -107,18 +107,18 @@ static void omap_uart_set_noidle(struct platform_device *pdev)
107 omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_NO); 107 omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_NO);
108} 108}
109 109
110static void omap_uart_set_forceidle(struct platform_device *pdev) 110static void omap_uart_set_smartidle(struct platform_device *pdev)
111{ 111{
112 struct omap_device *od = to_omap_device(pdev); 112 struct omap_device *od = to_omap_device(pdev);
113 113
114 omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_FORCE); 114 omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_SMART);
115} 115}
116 116
117#else 117#else
118static void omap_uart_enable_wakeup(struct platform_device *pdev, bool enable) 118static void omap_uart_enable_wakeup(struct platform_device *pdev, bool enable)
119{} 119{}
120static void omap_uart_set_noidle(struct platform_device *pdev) {} 120static void omap_uart_set_noidle(struct platform_device *pdev) {}
121static void omap_uart_set_forceidle(struct platform_device *pdev) {} 121static void omap_uart_set_smartidle(struct platform_device *pdev) {}
122#endif /* CONFIG_PM */ 122#endif /* CONFIG_PM */
123 123
124#ifdef CONFIG_OMAP_MUX 124#ifdef CONFIG_OMAP_MUX
@@ -349,7 +349,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata,
349 omap_up.uartclk = OMAP24XX_BASE_BAUD * 16; 349 omap_up.uartclk = OMAP24XX_BASE_BAUD * 16;
350 omap_up.flags = UPF_BOOT_AUTOCONF; 350 omap_up.flags = UPF_BOOT_AUTOCONF;
351 omap_up.get_context_loss_count = omap_pm_get_dev_context_loss_count; 351 omap_up.get_context_loss_count = omap_pm_get_dev_context_loss_count;
352 omap_up.set_forceidle = omap_uart_set_forceidle; 352 omap_up.set_forceidle = omap_uart_set_smartidle;
353 omap_up.set_noidle = omap_uart_set_noidle; 353 omap_up.set_noidle = omap_uart_set_noidle;
354 omap_up.enable_wakeup = omap_uart_enable_wakeup; 354 omap_up.enable_wakeup = omap_uart_enable_wakeup;
355 omap_up.dma_rx_buf_size = info->dma_rx_buf_size; 355 omap_up.dma_rx_buf_size = info->dma_rx_buf_size;
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 031d116fbf10..175b7d86d86a 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -247,7 +247,7 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm)
247 * omap_vc_i2c_init - initialize I2C interface to PMIC 247 * omap_vc_i2c_init - initialize I2C interface to PMIC
248 * @voltdm: voltage domain containing VC data 248 * @voltdm: voltage domain containing VC data
249 * 249 *
250 * Use PMIC supplied seetings for I2C high-speed mode and 250 * Use PMIC supplied settings for I2C high-speed mode and
251 * master code (if set) and program the VC I2C configuration 251 * master code (if set) and program the VC I2C configuration
252 * register. 252 * register.
253 * 253 *
@@ -265,8 +265,8 @@ static void __init omap_vc_i2c_init(struct voltagedomain *voltdm)
265 265
266 if (initialized) { 266 if (initialized) {
267 if (voltdm->pmic->i2c_high_speed != i2c_high_speed) 267 if (voltdm->pmic->i2c_high_speed != i2c_high_speed)
268 pr_warn("%s: I2C config for all channels must match.", 268 pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).",
269 __func__); 269 __func__, voltdm->name, i2c_high_speed);
270 return; 270 return;
271 } 271 }
272 272
@@ -292,9 +292,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
292 u32 val; 292 u32 val;
293 293
294 if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) { 294 if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
295 pr_err("%s: PMIC info requried to configure vc for" 295 pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name);
296 "vdd_%s not populated.Hence cannot initialize vc\n",
297 __func__, voltdm->name);
298 return; 296 return;
299 } 297 }
300 298
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index 807391d84a9d..0df88820978d 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -41,6 +41,11 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
41 u32 val, sys_clk_rate, timeout, waittime; 41 u32 val, sys_clk_rate, timeout, waittime;
42 u32 vddmin, vddmax, vstepmin, vstepmax; 42 u32 vddmin, vddmax, vstepmin, vstepmax;
43 43
44 if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
45 pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name);
46 return;
47 }
48
44 if (!voltdm->read || !voltdm->write) { 49 if (!voltdm->read || !voltdm->write) {
45 pr_err("%s: No read/write API for accessing vdd_%s regs\n", 50 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
46 __func__, voltdm->name); 51 __func__, voltdm->name);
diff --git a/arch/arm/mach-prima2/irq.c b/arch/arm/mach-prima2/irq.c
index d93ceef4a50a..37c2de9b6f26 100644
--- a/arch/arm/mach-prima2/irq.c
+++ b/arch/arm/mach-prima2/irq.c
@@ -68,7 +68,7 @@ void __init sirfsoc_of_irq_init(void)
68 if (!sirfsoc_intc_base) 68 if (!sirfsoc_intc_base)
69 panic("unable to map intc cpu registers\n"); 69 panic("unable to map intc cpu registers\n");
70 70
71 irq_domain_add_simple(np, 0); 71 irq_domain_add_legacy(np, 32, 0, 0, &irq_domain_simple_ops, NULL);
72 72
73 of_node_put(np); 73 of_node_put(np);
74 74
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 4f352e45be0a..0968772aedbe 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -98,8 +98,11 @@ static const struct of_device_id sic_of_match[] __initconst = {
98 98
99void __init versatile_init_irq(void) 99void __init versatile_init_irq(void)
100{ 100{
101 vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0); 101 struct device_node *np;
102 irq_domain_generate_simple(vic_of_match, VERSATILE_VIC_BASE, IRQ_VIC_START); 102
103 np = of_find_matching_node_by_address(NULL, vic_of_match,
104 VERSATILE_VIC_BASE);
105 __vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0, np);
103 106
104 writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); 107 writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
105 108
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 07c4bc8ea0a4..7a24d39661f0 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -54,9 +54,15 @@ loop1:
54 and r1, r1, #7 @ mask of the bits for current cache only 54 and r1, r1, #7 @ mask of the bits for current cache only
55 cmp r1, #2 @ see what cache we have at this level 55 cmp r1, #2 @ see what cache we have at this level
56 blt skip @ skip if no cache, or just i-cache 56 blt skip @ skip if no cache, or just i-cache
57#ifdef CONFIG_PREEMPT
58 save_and_disable_irqs r9 @ make cssr&csidr read atomic
59#endif
57 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr 60 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
58 isb @ isb to sych the new cssr&csidr 61 isb @ isb to sych the new cssr&csidr
59 mrc p15, 1, r1, c0, c0, 0 @ read the new csidr 62 mrc p15, 1, r1, c0, c0, 0 @ read the new csidr
63#ifdef CONFIG_PREEMPT
64 restore_irqs_notrace r9
65#endif
60 and r2, r1, #7 @ extract the length of the cache lines 66 and r2, r1, #7 @ extract the length of the cache lines
61 add r2, r2, #4 @ add 4 (line length offset) 67 add r2, r2, #4 @ add 4 (line length offset)
62 ldr r4, =0x3ff 68 ldr r4, =0x3ff