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-rw-r--r--arch/arm/mach-omap2/powerdomains.h3
-rw-r--r--arch/arm/mach-omap2/powerdomains34xx.h25
2 files changed, 25 insertions, 3 deletions
diff --git a/arch/arm/mach-omap2/powerdomains.h b/arch/arm/mach-omap2/powerdomains.h
index 1329443f2cd5..691470ea4c6a 100644
--- a/arch/arm/mach-omap2/powerdomains.h
+++ b/arch/arm/mach-omap2/powerdomains.h
@@ -171,7 +171,8 @@ static struct powerdomain *powerdomains_omap[] __initdata = {
171 &iva2_pwrdm, 171 &iva2_pwrdm,
172 &mpu_34xx_pwrdm, 172 &mpu_34xx_pwrdm,
173 &neon_pwrdm, 173 &neon_pwrdm,
174 &core_34xx_pwrdm, 174 &core_34xx_pre_es3_1_pwrdm,
175 &core_34xx_es3_1_pwrdm,
175 &cam_pwrdm, 176 &cam_pwrdm,
176 &dss_pwrdm, 177 &dss_pwrdm,
177 &per_pwrdm, 178 &per_pwrdm,
diff --git a/arch/arm/mach-omap2/powerdomains34xx.h b/arch/arm/mach-omap2/powerdomains34xx.h
index 78acfce8bbdc..4dcf94b800ab 100644
--- a/arch/arm/mach-omap2/powerdomains34xx.h
+++ b/arch/arm/mach-omap2/powerdomains34xx.h
@@ -200,12 +200,33 @@ static struct powerdomain mpu_34xx_pwrdm = {
200}; 200};
201 201
202/* No wkdeps or sleepdeps for 34xx core apparently */ 202/* No wkdeps or sleepdeps for 34xx core apparently */
203static struct powerdomain core_34xx_pwrdm = { 203static struct powerdomain core_34xx_pre_es3_1_pwrdm = {
204 .name = "core_pwrdm", 204 .name = "core_pwrdm",
205 .prcm_offs = CORE_MOD, 205 .prcm_offs = CORE_MOD,
206 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), 206 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
207 CHIP_IS_OMAP3430ES2 |
208 CHIP_IS_OMAP3430ES3_0),
209 .pwrsts = PWRSTS_OFF_RET_ON,
210 .dep_bit = OMAP3430_EN_CORE_SHIFT,
211 .banks = 2,
212 .pwrsts_mem_ret = {
213 [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */
214 [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */
215 },
216 .pwrsts_mem_on = {
217 [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
218 [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
219 },
220};
221
222/* No wkdeps or sleepdeps for 34xx core apparently */
223static struct powerdomain core_34xx_es3_1_pwrdm = {
224 .name = "core_pwrdm",
225 .prcm_offs = CORE_MOD,
226 .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3_1),
207 .pwrsts = PWRSTS_OFF_RET_ON, 227 .pwrsts = PWRSTS_OFF_RET_ON,
208 .dep_bit = OMAP3430_EN_CORE_SHIFT, 228 .dep_bit = OMAP3430_EN_CORE_SHIFT,
229 .flags = PWRDM_HAS_HDWR_SAR, /* for USBTLL only */
209 .banks = 2, 230 .banks = 2,
210 .pwrsts_mem_ret = { 231 .pwrsts_mem_ret = {
211 [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */ 232 [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */