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-rw-r--r--arch/arm/configs/omap1_defconfig3
-rw-r--r--arch/arm/mach-omap1/Makefile4
-rw-r--r--arch/arm/mach-omap1/mailbox.c199
-rw-r--r--arch/arm/mach-omap2/Makefile3
-rw-r--r--arch/arm/mach-omap2/devices.c13
-rw-r--r--arch/arm/mach-omap2/mailbox.c430
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c14
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c13
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c13
-rw-r--r--arch/arm/plat-omap/Kconfig16
-rw-r--r--arch/arm/plat-omap/Makefile3
-rw-r--r--arch/arm/plat-omap/include/plat/mailbox.h105
-rw-r--r--arch/arm/plat-omap/mailbox.c435
13 files changed, 52 insertions, 1199 deletions
diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig
index 9940f7b4e438..d74edbad18fc 100644
--- a/arch/arm/configs/omap1_defconfig
+++ b/arch/arm/configs/omap1_defconfig
@@ -26,7 +26,8 @@ CONFIG_ARCH_OMAP=y
26CONFIG_ARCH_OMAP1=y 26CONFIG_ARCH_OMAP1=y
27CONFIG_OMAP_RESET_CLOCKS=y 27CONFIG_OMAP_RESET_CLOCKS=y
28# CONFIG_OMAP_MUX is not set 28# CONFIG_OMAP_MUX is not set
29CONFIG_OMAP_MBOX_FWK=y 29CONFIG_MAILBOX=y
30CONFIG_OMAP1_MBOX=y
30CONFIG_OMAP_32K_TIMER=y 31CONFIG_OMAP_32K_TIMER=y
31CONFIG_OMAP_DM_TIMER=y 32CONFIG_OMAP_DM_TIMER=y
32CONFIG_ARCH_OMAP730=y 33CONFIG_ARCH_OMAP730=y
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index 222d58c0ae76..3889b6cd211e 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -19,10 +19,6 @@ obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o
19# Power Management 19# Power Management
20obj-$(CONFIG_PM) += pm.o sleep.o 20obj-$(CONFIG_PM) += pm.o sleep.o
21 21
22# DSP
23obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o
24mailbox_mach-objs := mailbox.o
25
26i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o 22i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o
27obj-y += $(i2c-omap-m) $(i2c-omap-y) 23obj-y += $(i2c-omap-m) $(i2c-omap-y)
28 24
diff --git a/arch/arm/mach-omap1/mailbox.c b/arch/arm/mach-omap1/mailbox.c
deleted file mode 100644
index efc8f207f6fc..000000000000
--- a/arch/arm/mach-omap1/mailbox.c
+++ /dev/null
@@ -1,199 +0,0 @@
1/*
2 * Mailbox reservation modules for OMAP1
3 *
4 * Copyright (C) 2006-2009 Nokia Corporation
5 * Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11
12#include <linux/module.h>
13#include <linux/interrupt.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <plat/mailbox.h>
17
18#define MAILBOX_ARM2DSP1 0x00
19#define MAILBOX_ARM2DSP1b 0x04
20#define MAILBOX_DSP2ARM1 0x08
21#define MAILBOX_DSP2ARM1b 0x0c
22#define MAILBOX_DSP2ARM2 0x10
23#define MAILBOX_DSP2ARM2b 0x14
24#define MAILBOX_ARM2DSP1_Flag 0x18
25#define MAILBOX_DSP2ARM1_Flag 0x1c
26#define MAILBOX_DSP2ARM2_Flag 0x20
27
28static void __iomem *mbox_base;
29
30struct omap_mbox1_fifo {
31 unsigned long cmd;
32 unsigned long data;
33 unsigned long flag;
34};
35
36struct omap_mbox1_priv {
37 struct omap_mbox1_fifo tx_fifo;
38 struct omap_mbox1_fifo rx_fifo;
39};
40
41static inline int mbox_read_reg(size_t ofs)
42{
43 return __raw_readw(mbox_base + ofs);
44}
45
46static inline void mbox_write_reg(u32 val, size_t ofs)
47{
48 __raw_writew(val, mbox_base + ofs);
49}
50
51/* msg */
52static mbox_msg_t omap1_mbox_fifo_read(struct omap_mbox *mbox)
53{
54 struct omap_mbox1_fifo *fifo =
55 &((struct omap_mbox1_priv *)mbox->priv)->rx_fifo;
56 mbox_msg_t msg;
57
58 msg = mbox_read_reg(fifo->data);
59 msg |= ((mbox_msg_t) mbox_read_reg(fifo->cmd)) << 16;
60
61 return msg;
62}
63
64static void
65omap1_mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
66{
67 struct omap_mbox1_fifo *fifo =
68 &((struct omap_mbox1_priv *)mbox->priv)->tx_fifo;
69
70 mbox_write_reg(msg & 0xffff, fifo->data);
71 mbox_write_reg(msg >> 16, fifo->cmd);
72}
73
74static int omap1_mbox_fifo_empty(struct omap_mbox *mbox)
75{
76 return 0;
77}
78
79static int omap1_mbox_fifo_full(struct omap_mbox *mbox)
80{
81 struct omap_mbox1_fifo *fifo =
82 &((struct omap_mbox1_priv *)mbox->priv)->rx_fifo;
83
84 return mbox_read_reg(fifo->flag);
85}
86
87/* irq */
88static void
89omap1_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_type_t irq)
90{
91 if (irq == IRQ_RX)
92 enable_irq(mbox->irq);
93}
94
95static void
96omap1_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_type_t irq)
97{
98 if (irq == IRQ_RX)
99 disable_irq(mbox->irq);
100}
101
102static int
103omap1_mbox_is_irq(struct omap_mbox *mbox, omap_mbox_type_t irq)
104{
105 if (irq == IRQ_TX)
106 return 0;
107 return 1;
108}
109
110static struct omap_mbox_ops omap1_mbox_ops = {
111 .type = OMAP_MBOX_TYPE1,
112 .fifo_read = omap1_mbox_fifo_read,
113 .fifo_write = omap1_mbox_fifo_write,
114 .fifo_empty = omap1_mbox_fifo_empty,
115 .fifo_full = omap1_mbox_fifo_full,
116 .enable_irq = omap1_mbox_enable_irq,
117 .disable_irq = omap1_mbox_disable_irq,
118 .is_irq = omap1_mbox_is_irq,
119};
120
121/* FIXME: the following struct should be created automatically by the user id */
122
123/* DSP */
124static struct omap_mbox1_priv omap1_mbox_dsp_priv = {
125 .tx_fifo = {
126 .cmd = MAILBOX_ARM2DSP1b,
127 .data = MAILBOX_ARM2DSP1,
128 .flag = MAILBOX_ARM2DSP1_Flag,
129 },
130 .rx_fifo = {
131 .cmd = MAILBOX_DSP2ARM1b,
132 .data = MAILBOX_DSP2ARM1,
133 .flag = MAILBOX_DSP2ARM1_Flag,
134 },
135};
136
137static struct omap_mbox mbox_dsp_info = {
138 .name = "dsp",
139 .ops = &omap1_mbox_ops,
140 .priv = &omap1_mbox_dsp_priv,
141};
142
143static struct omap_mbox *omap1_mboxes[] = { &mbox_dsp_info, NULL };
144
145static int omap1_mbox_probe(struct platform_device *pdev)
146{
147 struct resource *mem;
148 int ret;
149 struct omap_mbox **list;
150
151 list = omap1_mboxes;
152 list[0]->irq = platform_get_irq_byname(pdev, "dsp");
153
154 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
155 mbox_base = ioremap(mem->start, resource_size(mem));
156 if (!mbox_base)
157 return -ENOMEM;
158
159 ret = omap_mbox_register(&pdev->dev, list);
160 if (ret) {
161 iounmap(mbox_base);
162 return ret;
163 }
164
165 return 0;
166}
167
168static int omap1_mbox_remove(struct platform_device *pdev)
169{
170 omap_mbox_unregister();
171 iounmap(mbox_base);
172 return 0;
173}
174
175static struct platform_driver omap1_mbox_driver = {
176 .probe = omap1_mbox_probe,
177 .remove = omap1_mbox_remove,
178 .driver = {
179 .name = "omap-mailbox",
180 },
181};
182
183static int __init omap1_mbox_init(void)
184{
185 return platform_driver_register(&omap1_mbox_driver);
186}
187
188static void __exit omap1_mbox_exit(void)
189{
190 platform_driver_unregister(&omap1_mbox_driver);
191}
192
193module_init(omap1_mbox_init);
194module_exit(omap1_mbox_exit);
195
196MODULE_LICENSE("GPL v2");
197MODULE_DESCRIPTION("omap mailbox: omap1 architecture specific functions");
198MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>");
199MODULE_ALIAS("platform:omap1-mailbox");
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 55a9d6777683..f2d19af051eb 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -203,9 +203,6 @@ obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o
203obj-$(CONFIG_OMAP3_EMU) += emu.o 203obj-$(CONFIG_OMAP3_EMU) += emu.o
204obj-$(CONFIG_HW_PERF_EVENTS) += pmu.o 204obj-$(CONFIG_HW_PERF_EVENTS) += pmu.o
205 205
206obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o
207mailbox_mach-objs := mailbox.o
208
209iommu-$(CONFIG_OMAP_IOMMU) := omap-iommu.o 206iommu-$(CONFIG_OMAP_IOMMU) := omap-iommu.o
210obj-y += $(iommu-m) $(iommu-y) 207obj-y += $(iommu-m) $(iommu-y)
211 208
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 4269fc145698..73762accd128 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -20,6 +20,7 @@
20#include <linux/pinctrl/machine.h> 20#include <linux/pinctrl/machine.h>
21#include <linux/platform_data/omap4-keypad.h> 21#include <linux/platform_data/omap4-keypad.h>
22#include <linux/platform_data/omap_ocp2scp.h> 22#include <linux/platform_data/omap_ocp2scp.h>
23#include <linux/platform_data/mailbox-omap.h>
23#include <linux/usb/omap_control_usb.h> 24#include <linux/usb/omap_control_usb.h>
24 25
25#include <asm/mach-types.h> 26#include <asm/mach-types.h>
@@ -327,25 +328,31 @@ int __init omap4_keyboard_init(struct omap4_keypad_platform_data
327 return 0; 328 return 0;
328} 329}
329 330
330#if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE) 331#if defined(CONFIG_OMAP2PLUS_MBOX) || defined(CONFIG_OMAP2PLUS_MBOX_MODULE)
331static inline void __init omap_init_mbox(void) 332static inline void __init omap_init_mbox(void)
332{ 333{
333 struct omap_hwmod *oh; 334 struct omap_hwmod *oh;
334 struct platform_device *pdev; 335 struct platform_device *pdev;
336 struct omap_mbox_pdata *pdata;
335 337
336 oh = omap_hwmod_lookup("mailbox"); 338 oh = omap_hwmod_lookup("mailbox");
337 if (!oh) { 339 if (!oh) {
338 pr_err("%s: unable to find hwmod\n", __func__); 340 pr_err("%s: unable to find hwmod\n", __func__);
339 return; 341 return;
340 } 342 }
343 if (!oh->dev_attr) {
344 pr_err("%s: hwmod doesn't have valid attrs\n", __func__);
345 return;
346 }
341 347
342 pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0); 348 pdata = (struct omap_mbox_pdata *)oh->dev_attr;
349 pdev = omap_device_build("omap-mailbox", -1, oh, pdata, sizeof(*pdata));
343 WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n", 350 WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n",
344 __func__, PTR_ERR(pdev)); 351 __func__, PTR_ERR(pdev));
345} 352}
346#else 353#else
347static inline void omap_init_mbox(void) { } 354static inline void omap_init_mbox(void) { }
348#endif /* CONFIG_OMAP_MBOX_FWK */ 355#endif /* CONFIG_OMAP2PLUS_MBOX */
349 356
350static inline void omap_init_sti(void) {} 357static inline void omap_init_sti(void) {}
351 358
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
deleted file mode 100644
index 0b080267b7f6..000000000000
--- a/arch/arm/mach-omap2/mailbox.c
+++ /dev/null
@@ -1,430 +0,0 @@
1/*
2 * Mailbox reservation modules for OMAP2/3
3 *
4 * Copyright (C) 2006-2009 Nokia Corporation
5 * Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
6 * and Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/module.h>
14#include <linux/clk.h>
15#include <linux/err.h>
16#include <linux/platform_device.h>
17#include <linux/io.h>
18#include <linux/pm_runtime.h>
19
20#include <plat/mailbox.h>
21
22#include "soc.h"
23
24#define MAILBOX_REVISION 0x000
25#define MAILBOX_MESSAGE(m) (0x040 + 4 * (m))
26#define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m))
27#define MAILBOX_MSGSTATUS(m) (0x0c0 + 4 * (m))
28#define MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u))
29#define MAILBOX_IRQENABLE(u) (0x104 + 8 * (u))
30
31#define OMAP4_MAILBOX_IRQSTATUS(u) (0x104 + 0x10 * (u))
32#define OMAP4_MAILBOX_IRQENABLE(u) (0x108 + 0x10 * (u))
33#define OMAP4_MAILBOX_IRQENABLE_CLR(u) (0x10c + 0x10 * (u))
34
35#define MAILBOX_IRQ_NEWMSG(m) (1 << (2 * (m)))
36#define MAILBOX_IRQ_NOTFULL(m) (1 << (2 * (m) + 1))
37
38#define MBOX_REG_SIZE 0x120
39
40#define OMAP4_MBOX_REG_SIZE 0x130
41
42#define MBOX_NR_REGS (MBOX_REG_SIZE / sizeof(u32))
43#define OMAP4_MBOX_NR_REGS (OMAP4_MBOX_REG_SIZE / sizeof(u32))
44
45static void __iomem *mbox_base;
46
47struct omap_mbox2_fifo {
48 unsigned long msg;
49 unsigned long fifo_stat;
50 unsigned long msg_stat;
51};
52
53struct omap_mbox2_priv {
54 struct omap_mbox2_fifo tx_fifo;
55 struct omap_mbox2_fifo rx_fifo;
56 unsigned long irqenable;
57 unsigned long irqstatus;
58 u32 newmsg_bit;
59 u32 notfull_bit;
60 u32 ctx[OMAP4_MBOX_NR_REGS];
61 unsigned long irqdisable;
62};
63
64static void omap2_mbox_enable_irq(struct omap_mbox *mbox,
65 omap_mbox_type_t irq);
66
67static inline unsigned int mbox_read_reg(size_t ofs)
68{
69 return __raw_readl(mbox_base + ofs);
70}
71
72static inline void mbox_write_reg(u32 val, size_t ofs)
73{
74 __raw_writel(val, mbox_base + ofs);
75}
76
77/* Mailbox H/W preparations */
78static int omap2_mbox_startup(struct omap_mbox *mbox)
79{
80 u32 l;
81
82 pm_runtime_enable(mbox->dev->parent);
83 pm_runtime_get_sync(mbox->dev->parent);
84
85 l = mbox_read_reg(MAILBOX_REVISION);
86 pr_debug("omap mailbox rev %d.%d\n", (l & 0xf0) >> 4, (l & 0x0f));
87
88 return 0;
89}
90
91static void omap2_mbox_shutdown(struct omap_mbox *mbox)
92{
93 pm_runtime_put_sync(mbox->dev->parent);
94 pm_runtime_disable(mbox->dev->parent);
95}
96
97/* Mailbox FIFO handle functions */
98static mbox_msg_t omap2_mbox_fifo_read(struct omap_mbox *mbox)
99{
100 struct omap_mbox2_fifo *fifo =
101 &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo;
102 return (mbox_msg_t) mbox_read_reg(fifo->msg);
103}
104
105static void omap2_mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
106{
107 struct omap_mbox2_fifo *fifo =
108 &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo;
109 mbox_write_reg(msg, fifo->msg);
110}
111
112static int omap2_mbox_fifo_empty(struct omap_mbox *mbox)
113{
114 struct omap_mbox2_fifo *fifo =
115 &((struct omap_mbox2_priv *)mbox->priv)->rx_fifo;
116 return (mbox_read_reg(fifo->msg_stat) == 0);
117}
118
119static int omap2_mbox_fifo_full(struct omap_mbox *mbox)
120{
121 struct omap_mbox2_fifo *fifo =
122 &((struct omap_mbox2_priv *)mbox->priv)->tx_fifo;
123 return mbox_read_reg(fifo->fifo_stat);
124}
125
126/* Mailbox IRQ handle functions */
127static void omap2_mbox_enable_irq(struct omap_mbox *mbox,
128 omap_mbox_type_t irq)
129{
130 struct omap_mbox2_priv *p = mbox->priv;
131 u32 l, bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
132
133 l = mbox_read_reg(p->irqenable);
134 l |= bit;
135 mbox_write_reg(l, p->irqenable);
136}
137
138static void omap2_mbox_disable_irq(struct omap_mbox *mbox,
139 omap_mbox_type_t irq)
140{
141 struct omap_mbox2_priv *p = mbox->priv;
142 u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
143
144 if (!cpu_is_omap44xx())
145 bit = mbox_read_reg(p->irqdisable) & ~bit;
146
147 mbox_write_reg(bit, p->irqdisable);
148}
149
150static void omap2_mbox_ack_irq(struct omap_mbox *mbox,
151 omap_mbox_type_t irq)
152{
153 struct omap_mbox2_priv *p = mbox->priv;
154 u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
155
156 mbox_write_reg(bit, p->irqstatus);
157
158 /* Flush posted write for irq status to avoid spurious interrupts */
159 mbox_read_reg(p->irqstatus);
160}
161
162static int omap2_mbox_is_irq(struct omap_mbox *mbox,
163 omap_mbox_type_t irq)
164{
165 struct omap_mbox2_priv *p = mbox->priv;
166 u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
167 u32 enable = mbox_read_reg(p->irqenable);
168 u32 status = mbox_read_reg(p->irqstatus);
169
170 return (int)(enable & status & bit);
171}
172
173static void omap2_mbox_save_ctx(struct omap_mbox *mbox)
174{
175 int i;
176 struct omap_mbox2_priv *p = mbox->priv;
177 int nr_regs;
178 if (cpu_is_omap44xx())
179 nr_regs = OMAP4_MBOX_NR_REGS;
180 else
181 nr_regs = MBOX_NR_REGS;
182 for (i = 0; i < nr_regs; i++) {
183 p->ctx[i] = mbox_read_reg(i * sizeof(u32));
184
185 dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__,
186 i, p->ctx[i]);
187 }
188}
189
190static void omap2_mbox_restore_ctx(struct omap_mbox *mbox)
191{
192 int i;
193 struct omap_mbox2_priv *p = mbox->priv;
194 int nr_regs;
195 if (cpu_is_omap44xx())
196 nr_regs = OMAP4_MBOX_NR_REGS;
197 else
198 nr_regs = MBOX_NR_REGS;
199 for (i = 0; i < nr_regs; i++) {
200 mbox_write_reg(p->ctx[i], i * sizeof(u32));
201
202 dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__,
203 i, p->ctx[i]);
204 }
205}
206
207static struct omap_mbox_ops omap2_mbox_ops = {
208 .type = OMAP_MBOX_TYPE2,
209 .startup = omap2_mbox_startup,
210 .shutdown = omap2_mbox_shutdown,
211 .fifo_read = omap2_mbox_fifo_read,
212 .fifo_write = omap2_mbox_fifo_write,
213 .fifo_empty = omap2_mbox_fifo_empty,
214 .fifo_full = omap2_mbox_fifo_full,
215 .enable_irq = omap2_mbox_enable_irq,
216 .disable_irq = omap2_mbox_disable_irq,
217 .ack_irq = omap2_mbox_ack_irq,
218 .is_irq = omap2_mbox_is_irq,
219 .save_ctx = omap2_mbox_save_ctx,
220 .restore_ctx = omap2_mbox_restore_ctx,
221};
222
223/*
224 * MAILBOX 0: ARM -> DSP,
225 * MAILBOX 1: ARM <- DSP.
226 * MAILBOX 2: ARM -> IVA,
227 * MAILBOX 3: ARM <- IVA.
228 */
229
230/* FIXME: the following structs should be filled automatically by the user id */
231
232#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP2)
233/* DSP */
234static struct omap_mbox2_priv omap2_mbox_dsp_priv = {
235 .tx_fifo = {
236 .msg = MAILBOX_MESSAGE(0),
237 .fifo_stat = MAILBOX_FIFOSTATUS(0),
238 },
239 .rx_fifo = {
240 .msg = MAILBOX_MESSAGE(1),
241 .msg_stat = MAILBOX_MSGSTATUS(1),
242 },
243 .irqenable = MAILBOX_IRQENABLE(0),
244 .irqstatus = MAILBOX_IRQSTATUS(0),
245 .notfull_bit = MAILBOX_IRQ_NOTFULL(0),
246 .newmsg_bit = MAILBOX_IRQ_NEWMSG(1),
247 .irqdisable = MAILBOX_IRQENABLE(0),
248};
249
250struct omap_mbox mbox_dsp_info = {
251 .name = "dsp",
252 .ops = &omap2_mbox_ops,
253 .priv = &omap2_mbox_dsp_priv,
254};
255#endif
256
257#if defined(CONFIG_ARCH_OMAP3)
258struct omap_mbox *omap3_mboxes[] = { &mbox_dsp_info, NULL };
259#endif
260
261#if defined(CONFIG_SOC_OMAP2420)
262/* IVA */
263static struct omap_mbox2_priv omap2_mbox_iva_priv = {
264 .tx_fifo = {
265 .msg = MAILBOX_MESSAGE(2),
266 .fifo_stat = MAILBOX_FIFOSTATUS(2),
267 },
268 .rx_fifo = {
269 .msg = MAILBOX_MESSAGE(3),
270 .msg_stat = MAILBOX_MSGSTATUS(3),
271 },
272 .irqenable = MAILBOX_IRQENABLE(3),
273 .irqstatus = MAILBOX_IRQSTATUS(3),
274 .notfull_bit = MAILBOX_IRQ_NOTFULL(2),
275 .newmsg_bit = MAILBOX_IRQ_NEWMSG(3),
276 .irqdisable = MAILBOX_IRQENABLE(3),
277};
278
279static struct omap_mbox mbox_iva_info = {
280 .name = "iva",
281 .ops = &omap2_mbox_ops,
282 .priv = &omap2_mbox_iva_priv,
283};
284#endif
285
286#ifdef CONFIG_ARCH_OMAP2
287struct omap_mbox *omap2_mboxes[] = {
288 &mbox_dsp_info,
289#ifdef CONFIG_SOC_OMAP2420
290 &mbox_iva_info,
291#endif
292 NULL
293};
294#endif
295
296#if defined(CONFIG_ARCH_OMAP4)
297/* OMAP4 */
298static struct omap_mbox2_priv omap2_mbox_1_priv = {
299 .tx_fifo = {
300 .msg = MAILBOX_MESSAGE(0),
301 .fifo_stat = MAILBOX_FIFOSTATUS(0),
302 },
303 .rx_fifo = {
304 .msg = MAILBOX_MESSAGE(1),
305 .msg_stat = MAILBOX_MSGSTATUS(1),
306 },
307 .irqenable = OMAP4_MAILBOX_IRQENABLE(0),
308 .irqstatus = OMAP4_MAILBOX_IRQSTATUS(0),
309 .notfull_bit = MAILBOX_IRQ_NOTFULL(0),
310 .newmsg_bit = MAILBOX_IRQ_NEWMSG(1),
311 .irqdisable = OMAP4_MAILBOX_IRQENABLE_CLR(0),
312};
313
314struct omap_mbox mbox_1_info = {
315 .name = "mailbox-1",
316 .ops = &omap2_mbox_ops,
317 .priv = &omap2_mbox_1_priv,
318};
319
320static struct omap_mbox2_priv omap2_mbox_2_priv = {
321 .tx_fifo = {
322 .msg = MAILBOX_MESSAGE(3),
323 .fifo_stat = MAILBOX_FIFOSTATUS(3),
324 },
325 .rx_fifo = {
326 .msg = MAILBOX_MESSAGE(2),
327 .msg_stat = MAILBOX_MSGSTATUS(2),
328 },
329 .irqenable = OMAP4_MAILBOX_IRQENABLE(0),
330 .irqstatus = OMAP4_MAILBOX_IRQSTATUS(0),
331 .notfull_bit = MAILBOX_IRQ_NOTFULL(3),
332 .newmsg_bit = MAILBOX_IRQ_NEWMSG(2),
333 .irqdisable = OMAP4_MAILBOX_IRQENABLE_CLR(0),
334};
335
336struct omap_mbox mbox_2_info = {
337 .name = "mailbox-2",
338 .ops = &omap2_mbox_ops,
339 .priv = &omap2_mbox_2_priv,
340};
341
342struct omap_mbox *omap4_mboxes[] = { &mbox_1_info, &mbox_2_info, NULL };
343#endif
344
345static int omap2_mbox_probe(struct platform_device *pdev)
346{
347 struct resource *mem;
348 int ret;
349 struct omap_mbox **list;
350
351 if (false)
352 ;
353#if defined(CONFIG_ARCH_OMAP3)
354 else if (cpu_is_omap34xx()) {
355 list = omap3_mboxes;
356
357 list[0]->irq = platform_get_irq(pdev, 0);
358 }
359#endif
360#if defined(CONFIG_ARCH_OMAP2)
361 else if (cpu_is_omap2430()) {
362 list = omap2_mboxes;
363
364 list[0]->irq = platform_get_irq(pdev, 0);
365 } else if (cpu_is_omap2420()) {
366 list = omap2_mboxes;
367
368 list[0]->irq = platform_get_irq_byname(pdev, "dsp");
369 list[1]->irq = platform_get_irq_byname(pdev, "iva");
370 }
371#endif
372#if defined(CONFIG_ARCH_OMAP4)
373 else if (cpu_is_omap44xx()) {
374 list = omap4_mboxes;
375
376 list[0]->irq = list[1]->irq = platform_get_irq(pdev, 0);
377 }
378#endif
379 else {
380 pr_err("%s: platform not supported\n", __func__);
381 return -ENODEV;
382 }
383
384 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
385 mbox_base = ioremap(mem->start, resource_size(mem));
386 if (!mbox_base)
387 return -ENOMEM;
388
389 ret = omap_mbox_register(&pdev->dev, list);
390 if (ret) {
391 iounmap(mbox_base);
392 return ret;
393 }
394
395 return 0;
396}
397
398static int omap2_mbox_remove(struct platform_device *pdev)
399{
400 omap_mbox_unregister();
401 iounmap(mbox_base);
402 return 0;
403}
404
405static struct platform_driver omap2_mbox_driver = {
406 .probe = omap2_mbox_probe,
407 .remove = omap2_mbox_remove,
408 .driver = {
409 .name = "omap-mailbox",
410 },
411};
412
413static int __init omap2_mbox_init(void)
414{
415 return platform_driver_register(&omap2_mbox_driver);
416}
417
418static void __exit omap2_mbox_exit(void)
419{
420 platform_driver_unregister(&omap2_mbox_driver);
421}
422
423module_init(omap2_mbox_init);
424module_exit(omap2_mbox_exit);
425
426MODULE_LICENSE("GPL v2");
427MODULE_DESCRIPTION("omap mailbox: omap2/3/4 architecture specific functions");
428MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>");
429MODULE_AUTHOR("Paul Mundt");
430MODULE_ALIAS("platform:omap2-mailbox");
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 5137cc84b504..d8b9d60f854f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -16,6 +16,7 @@
16#include <linux/i2c-omap.h> 16#include <linux/i2c-omap.h>
17#include <linux/platform_data/spi-omap2-mcspi.h> 17#include <linux/platform_data/spi-omap2-mcspi.h>
18#include <linux/omap-dma.h> 18#include <linux/omap-dma.h>
19#include <linux/platform_data/mailbox-omap.h>
19#include <plat/dmtimer.h> 20#include <plat/dmtimer.h>
20 21
21#include "omap_hwmod.h" 22#include "omap_hwmod.h"
@@ -166,6 +167,18 @@ static struct omap_hwmod omap2420_dma_system_hwmod = {
166}; 167};
167 168
168/* mailbox */ 169/* mailbox */
170static struct omap_mbox_dev_info omap2420_mailbox_info[] = {
171 { .name = "dsp", .tx_id = 0, .rx_id = 1, .irq_id = 0, .usr_id = 0 },
172 { .name = "iva", .tx_id = 2, .rx_id = 3, .irq_id = 1, .usr_id = 3 },
173};
174
175static struct omap_mbox_pdata omap2420_mailbox_attrs = {
176 .num_users = 4,
177 .num_fifos = 6,
178 .info_cnt = ARRAY_SIZE(omap2420_mailbox_info),
179 .info = omap2420_mailbox_info,
180};
181
169static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { 182static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = {
170 { .name = "dsp", .irq = 26 + OMAP_INTC_START, }, 183 { .name = "dsp", .irq = 26 + OMAP_INTC_START, },
171 { .name = "iva", .irq = 34 + OMAP_INTC_START, }, 184 { .name = "iva", .irq = 34 + OMAP_INTC_START, },
@@ -186,6 +199,7 @@ static struct omap_hwmod omap2420_mailbox_hwmod = {
186 .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT, 199 .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT,
187 }, 200 },
188 }, 201 },
202 .dev_attr = &omap2420_mailbox_attrs,
189}; 203};
190 204
191/* 205/*
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 4ce999ee3ee9..5b9083461dc5 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -17,6 +17,7 @@
17#include <linux/platform_data/asoc-ti-mcbsp.h> 17#include <linux/platform_data/asoc-ti-mcbsp.h>
18#include <linux/platform_data/spi-omap2-mcspi.h> 18#include <linux/platform_data/spi-omap2-mcspi.h>
19#include <linux/omap-dma.h> 19#include <linux/omap-dma.h>
20#include <linux/platform_data/mailbox-omap.h>
20#include <plat/dmtimer.h> 21#include <plat/dmtimer.h>
21 22
22#include "omap_hwmod.h" 23#include "omap_hwmod.h"
@@ -170,6 +171,17 @@ static struct omap_hwmod omap2430_dma_system_hwmod = {
170}; 171};
171 172
172/* mailbox */ 173/* mailbox */
174static struct omap_mbox_dev_info omap2430_mailbox_info[] = {
175 { .name = "dsp", .tx_id = 0, .rx_id = 1 },
176};
177
178static struct omap_mbox_pdata omap2430_mailbox_attrs = {
179 .num_users = 4,
180 .num_fifos = 6,
181 .info_cnt = ARRAY_SIZE(omap2430_mailbox_info),
182 .info = omap2430_mailbox_info,
183};
184
173static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { 185static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = {
174 { .irq = 26 + OMAP_INTC_START, }, 186 { .irq = 26 + OMAP_INTC_START, },
175 { .irq = -1 }, 187 { .irq = -1 },
@@ -189,6 +201,7 @@ static struct omap_hwmod omap2430_mailbox_hwmod = {
189 .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT, 201 .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT,
190 }, 202 },
191 }, 203 },
204 .dev_attr = &omap2430_mailbox_attrs,
192}; 205};
193 206
194/* mcspi3 */ 207/* mcspi3 */
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 31c7126eb3bb..8e4cbc99ce28 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -25,6 +25,7 @@
25#include <linux/platform_data/asoc-ti-mcbsp.h> 25#include <linux/platform_data/asoc-ti-mcbsp.h>
26#include <linux/platform_data/spi-omap2-mcspi.h> 26#include <linux/platform_data/spi-omap2-mcspi.h>
27#include <linux/platform_data/iommu-omap.h> 27#include <linux/platform_data/iommu-omap.h>
28#include <linux/platform_data/mailbox-omap.h>
28#include <plat/dmtimer.h> 29#include <plat/dmtimer.h>
29 30
30#include "am35xx.h" 31#include "am35xx.h"
@@ -1505,6 +1506,17 @@ static struct omap_hwmod_class omap3xxx_mailbox_hwmod_class = {
1505 .sysc = &omap3xxx_mailbox_sysc, 1506 .sysc = &omap3xxx_mailbox_sysc,
1506}; 1507};
1507 1508
1509static struct omap_mbox_dev_info omap3xxx_mailbox_info[] = {
1510 { .name = "dsp", .tx_id = 0, .rx_id = 1 },
1511};
1512
1513static struct omap_mbox_pdata omap3xxx_mailbox_attrs = {
1514 .num_users = 2,
1515 .num_fifos = 2,
1516 .info_cnt = ARRAY_SIZE(omap3xxx_mailbox_info),
1517 .info = omap3xxx_mailbox_info,
1518};
1519
1508static struct omap_hwmod_irq_info omap3xxx_mailbox_irqs[] = { 1520static struct omap_hwmod_irq_info omap3xxx_mailbox_irqs[] = {
1509 { .irq = 26 + OMAP_INTC_START, }, 1521 { .irq = 26 + OMAP_INTC_START, },
1510 { .irq = -1 }, 1522 { .irq = -1 },
@@ -1524,6 +1536,7 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = {
1524 .idlest_idle_bit = OMAP3430_ST_MAILBOXES_SHIFT, 1536 .idlest_idle_bit = OMAP3430_ST_MAILBOXES_SHIFT,
1525 }, 1537 },
1526 }, 1538 },
1539 .dev_attr = &omap3xxx_mailbox_attrs,
1527}; 1540};
1528 1541
1529/* 1542/*
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index ce66eb9be481..f82bae2171eb 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -86,22 +86,6 @@ config OMAP_MUX_WARNINGS
86 to change the pin multiplexing setup. When there are no warnings 86 to change the pin multiplexing setup. When there are no warnings
87 printed, it's safe to deselect OMAP_MUX for your product. 87 printed, it's safe to deselect OMAP_MUX for your product.
88 88
89config OMAP_MBOX_FWK
90 tristate "Mailbox framework support"
91 depends on ARCH_OMAP && !ARCH_MULTIPLATFORM
92 help
93 Say Y here if you want to use OMAP Mailbox framework support for
94 DSP, IVA1.0 and IVA2 in OMAP1/2/3.
95
96config OMAP_MBOX_KFIFO_SIZE
97 int "Mailbox kfifo default buffer size (bytes)"
98 depends on OMAP_MBOX_FWK
99 default 256
100 help
101 Specify the default size of mailbox's kfifo buffers (bytes).
102 This can also be changed at runtime (via the mbox_kfifo_size
103 module parameter).
104
105config OMAP_IOMMU_IVA2 89config OMAP_IOMMU_IVA2
106 bool 90 bool
107 91
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 31199417b56a..0b01b68fd033 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -17,6 +17,3 @@ obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
17i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o 17i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o
18obj-y += $(i2c-omap-m) $(i2c-omap-y) 18obj-y += $(i2c-omap-m) $(i2c-omap-y)
19 19
20# OMAP mailbox framework
21obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o
22
diff --git a/arch/arm/plat-omap/include/plat/mailbox.h b/arch/arm/plat-omap/include/plat/mailbox.h
deleted file mode 100644
index cc3921e9059c..000000000000
--- a/arch/arm/plat-omap/include/plat/mailbox.h
+++ /dev/null
@@ -1,105 +0,0 @@
1/* mailbox.h */
2
3#ifndef MAILBOX_H
4#define MAILBOX_H
5
6#include <linux/spinlock.h>
7#include <linux/workqueue.h>
8#include <linux/interrupt.h>
9#include <linux/device.h>
10#include <linux/kfifo.h>
11
12typedef u32 mbox_msg_t;
13struct omap_mbox;
14
15typedef int __bitwise omap_mbox_irq_t;
16#define IRQ_TX ((__force omap_mbox_irq_t) 1)
17#define IRQ_RX ((__force omap_mbox_irq_t) 2)
18
19typedef int __bitwise omap_mbox_type_t;
20#define OMAP_MBOX_TYPE1 ((__force omap_mbox_type_t) 1)
21#define OMAP_MBOX_TYPE2 ((__force omap_mbox_type_t) 2)
22
23struct omap_mbox_ops {
24 omap_mbox_type_t type;
25 int (*startup)(struct omap_mbox *mbox);
26 void (*shutdown)(struct omap_mbox *mbox);
27 /* fifo */
28 mbox_msg_t (*fifo_read)(struct omap_mbox *mbox);
29 void (*fifo_write)(struct omap_mbox *mbox, mbox_msg_t msg);
30 int (*fifo_empty)(struct omap_mbox *mbox);
31 int (*fifo_full)(struct omap_mbox *mbox);
32 /* irq */
33 void (*enable_irq)(struct omap_mbox *mbox,
34 omap_mbox_irq_t irq);
35 void (*disable_irq)(struct omap_mbox *mbox,
36 omap_mbox_irq_t irq);
37 void (*ack_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq);
38 int (*is_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq);
39 /* ctx */
40 void (*save_ctx)(struct omap_mbox *mbox);
41 void (*restore_ctx)(struct omap_mbox *mbox);
42};
43
44struct omap_mbox_queue {
45 spinlock_t lock;
46 struct kfifo fifo;
47 struct work_struct work;
48 struct tasklet_struct tasklet;
49 struct omap_mbox *mbox;
50 bool full;
51};
52
53struct omap_mbox {
54 char *name;
55 unsigned int irq;
56 struct omap_mbox_queue *txq, *rxq;
57 struct omap_mbox_ops *ops;
58 struct device *dev;
59 void *priv;
60 int use_count;
61 struct blocking_notifier_head notifier;
62};
63
64int omap_mbox_msg_send(struct omap_mbox *, mbox_msg_t msg);
65void omap_mbox_init_seq(struct omap_mbox *);
66
67struct omap_mbox *omap_mbox_get(const char *, struct notifier_block *nb);
68void omap_mbox_put(struct omap_mbox *mbox, struct notifier_block *nb);
69
70int omap_mbox_register(struct device *parent, struct omap_mbox **);
71int omap_mbox_unregister(void);
72
73static inline void omap_mbox_save_ctx(struct omap_mbox *mbox)
74{
75 if (!mbox->ops->save_ctx) {
76 dev_err(mbox->dev, "%s:\tno save\n", __func__);
77 return;
78 }
79
80 mbox->ops->save_ctx(mbox);
81}
82
83static inline void omap_mbox_restore_ctx(struct omap_mbox *mbox)
84{
85 if (!mbox->ops->restore_ctx) {
86 dev_err(mbox->dev, "%s:\tno restore\n", __func__);
87 return;
88 }
89
90 mbox->ops->restore_ctx(mbox);
91}
92
93static inline void omap_mbox_enable_irq(struct omap_mbox *mbox,
94 omap_mbox_irq_t irq)
95{
96 mbox->ops->enable_irq(mbox, irq);
97}
98
99static inline void omap_mbox_disable_irq(struct omap_mbox *mbox,
100 omap_mbox_irq_t irq)
101{
102 mbox->ops->disable_irq(mbox, irq);
103}
104
105#endif /* MAILBOX_H */
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
deleted file mode 100644
index 42377ef9ea3d..000000000000
--- a/arch/arm/plat-omap/mailbox.c
+++ /dev/null
@@ -1,435 +0,0 @@
1/*
2 * OMAP mailbox driver
3 *
4 * Copyright (C) 2006-2009 Nokia Corporation. All rights reserved.
5 *
6 * Contact: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#include <linux/interrupt.h>
25#include <linux/spinlock.h>
26#include <linux/mutex.h>
27#include <linux/delay.h>
28#include <linux/slab.h>
29#include <linux/kfifo.h>
30#include <linux/err.h>
31#include <linux/notifier.h>
32#include <linux/module.h>
33
34#include <plat/mailbox.h>
35
36static struct omap_mbox **mboxes;
37
38static int mbox_configured;
39static DEFINE_MUTEX(mbox_configured_lock);
40
41static unsigned int mbox_kfifo_size = CONFIG_OMAP_MBOX_KFIFO_SIZE;
42module_param(mbox_kfifo_size, uint, S_IRUGO);
43MODULE_PARM_DESC(mbox_kfifo_size, "Size of omap's mailbox kfifo (bytes)");
44
45/* Mailbox FIFO handle functions */
46static inline mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox)
47{
48 return mbox->ops->fifo_read(mbox);
49}
50static inline void mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
51{
52 mbox->ops->fifo_write(mbox, msg);
53}
54static inline int mbox_fifo_empty(struct omap_mbox *mbox)
55{
56 return mbox->ops->fifo_empty(mbox);
57}
58static inline int mbox_fifo_full(struct omap_mbox *mbox)
59{
60 return mbox->ops->fifo_full(mbox);
61}
62
63/* Mailbox IRQ handle functions */
64static inline void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
65{
66 if (mbox->ops->ack_irq)
67 mbox->ops->ack_irq(mbox, irq);
68}
69static inline int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
70{
71 return mbox->ops->is_irq(mbox, irq);
72}
73
74/*
75 * message sender
76 */
77static int __mbox_poll_for_space(struct omap_mbox *mbox)
78{
79 int ret = 0, i = 1000;
80
81 while (mbox_fifo_full(mbox)) {
82 if (mbox->ops->type == OMAP_MBOX_TYPE2)
83 return -1;
84 if (--i == 0)
85 return -1;
86 udelay(1);
87 }
88 return ret;
89}
90
91int omap_mbox_msg_send(struct omap_mbox *mbox, mbox_msg_t msg)
92{
93 struct omap_mbox_queue *mq = mbox->txq;
94 int ret = 0, len;
95
96 spin_lock_bh(&mq->lock);
97
98 if (kfifo_avail(&mq->fifo) < sizeof(msg)) {
99 ret = -ENOMEM;
100 goto out;
101 }
102
103 if (kfifo_is_empty(&mq->fifo) && !__mbox_poll_for_space(mbox)) {
104 mbox_fifo_write(mbox, msg);
105 goto out;
106 }
107
108 len = kfifo_in(&mq->fifo, (unsigned char *)&msg, sizeof(msg));
109 WARN_ON(len != sizeof(msg));
110
111 tasklet_schedule(&mbox->txq->tasklet);
112
113out:
114 spin_unlock_bh(&mq->lock);
115 return ret;
116}
117EXPORT_SYMBOL(omap_mbox_msg_send);
118
119static void mbox_tx_tasklet(unsigned long tx_data)
120{
121 struct omap_mbox *mbox = (struct omap_mbox *)tx_data;
122 struct omap_mbox_queue *mq = mbox->txq;
123 mbox_msg_t msg;
124 int ret;
125
126 while (kfifo_len(&mq->fifo)) {
127 if (__mbox_poll_for_space(mbox)) {
128 omap_mbox_enable_irq(mbox, IRQ_TX);
129 break;
130 }
131
132 ret = kfifo_out(&mq->fifo, (unsigned char *)&msg,
133 sizeof(msg));
134 WARN_ON(ret != sizeof(msg));
135
136 mbox_fifo_write(mbox, msg);
137 }
138}
139
140/*
141 * Message receiver(workqueue)
142 */
143static void mbox_rx_work(struct work_struct *work)
144{
145 struct omap_mbox_queue *mq =
146 container_of(work, struct omap_mbox_queue, work);
147 mbox_msg_t msg;
148 int len;
149
150 while (kfifo_len(&mq->fifo) >= sizeof(msg)) {
151 len = kfifo_out(&mq->fifo, (unsigned char *)&msg, sizeof(msg));
152 WARN_ON(len != sizeof(msg));
153
154 blocking_notifier_call_chain(&mq->mbox->notifier, len,
155 (void *)msg);
156 spin_lock_irq(&mq->lock);
157 if (mq->full) {
158 mq->full = false;
159 omap_mbox_enable_irq(mq->mbox, IRQ_RX);
160 }
161 spin_unlock_irq(&mq->lock);
162 }
163}
164
165/*
166 * Mailbox interrupt handler
167 */
168static void __mbox_tx_interrupt(struct omap_mbox *mbox)
169{
170 omap_mbox_disable_irq(mbox, IRQ_TX);
171 ack_mbox_irq(mbox, IRQ_TX);
172 tasklet_schedule(&mbox->txq->tasklet);
173}
174
175static void __mbox_rx_interrupt(struct omap_mbox *mbox)
176{
177 struct omap_mbox_queue *mq = mbox->rxq;
178 mbox_msg_t msg;
179 int len;
180
181 while (!mbox_fifo_empty(mbox)) {
182 if (unlikely(kfifo_avail(&mq->fifo) < sizeof(msg))) {
183 omap_mbox_disable_irq(mbox, IRQ_RX);
184 mq->full = true;
185 goto nomem;
186 }
187
188 msg = mbox_fifo_read(mbox);
189
190 len = kfifo_in(&mq->fifo, (unsigned char *)&msg, sizeof(msg));
191 WARN_ON(len != sizeof(msg));
192
193 if (mbox->ops->type == OMAP_MBOX_TYPE1)
194 break;
195 }
196
197 /* no more messages in the fifo. clear IRQ source. */
198 ack_mbox_irq(mbox, IRQ_RX);
199nomem:
200 schedule_work(&mbox->rxq->work);
201}
202
203static irqreturn_t mbox_interrupt(int irq, void *p)
204{
205 struct omap_mbox *mbox = p;
206
207 if (is_mbox_irq(mbox, IRQ_TX))
208 __mbox_tx_interrupt(mbox);
209
210 if (is_mbox_irq(mbox, IRQ_RX))
211 __mbox_rx_interrupt(mbox);
212
213 return IRQ_HANDLED;
214}
215
216static struct omap_mbox_queue *mbox_queue_alloc(struct omap_mbox *mbox,
217 void (*work) (struct work_struct *),
218 void (*tasklet)(unsigned long))
219{
220 struct omap_mbox_queue *mq;
221
222 mq = kzalloc(sizeof(struct omap_mbox_queue), GFP_KERNEL);
223 if (!mq)
224 return NULL;
225
226 spin_lock_init(&mq->lock);
227
228 if (kfifo_alloc(&mq->fifo, mbox_kfifo_size, GFP_KERNEL))
229 goto error;
230
231 if (work)
232 INIT_WORK(&mq->work, work);
233
234 if (tasklet)
235 tasklet_init(&mq->tasklet, tasklet, (unsigned long)mbox);
236 return mq;
237error:
238 kfree(mq);
239 return NULL;
240}
241
242static void mbox_queue_free(struct omap_mbox_queue *q)
243{
244 kfifo_free(&q->fifo);
245 kfree(q);
246}
247
248static int omap_mbox_startup(struct omap_mbox *mbox)
249{
250 int ret = 0;
251 struct omap_mbox_queue *mq;
252
253 mutex_lock(&mbox_configured_lock);
254 if (!mbox_configured++) {
255 if (likely(mbox->ops->startup)) {
256 ret = mbox->ops->startup(mbox);
257 if (unlikely(ret))
258 goto fail_startup;
259 } else
260 goto fail_startup;
261 }
262
263 if (!mbox->use_count++) {
264 ret = request_irq(mbox->irq, mbox_interrupt, IRQF_SHARED,
265 mbox->name, mbox);
266 if (unlikely(ret)) {
267 pr_err("failed to register mailbox interrupt:%d\n",
268 ret);
269 goto fail_request_irq;
270 }
271 mq = mbox_queue_alloc(mbox, NULL, mbox_tx_tasklet);
272 if (!mq) {
273 ret = -ENOMEM;
274 goto fail_alloc_txq;
275 }
276 mbox->txq = mq;
277
278 mq = mbox_queue_alloc(mbox, mbox_rx_work, NULL);
279 if (!mq) {
280 ret = -ENOMEM;
281 goto fail_alloc_rxq;
282 }
283 mbox->rxq = mq;
284 mq->mbox = mbox;
285
286 omap_mbox_enable_irq(mbox, IRQ_RX);
287 }
288 mutex_unlock(&mbox_configured_lock);
289 return 0;
290
291fail_alloc_rxq:
292 mbox_queue_free(mbox->txq);
293fail_alloc_txq:
294 free_irq(mbox->irq, mbox);
295fail_request_irq:
296 if (mbox->ops->shutdown)
297 mbox->ops->shutdown(mbox);
298 mbox->use_count--;
299fail_startup:
300 mbox_configured--;
301 mutex_unlock(&mbox_configured_lock);
302 return ret;
303}
304
305static void omap_mbox_fini(struct omap_mbox *mbox)
306{
307 mutex_lock(&mbox_configured_lock);
308
309 if (!--mbox->use_count) {
310 omap_mbox_disable_irq(mbox, IRQ_RX);
311 free_irq(mbox->irq, mbox);
312 tasklet_kill(&mbox->txq->tasklet);
313 flush_work(&mbox->rxq->work);
314 mbox_queue_free(mbox->txq);
315 mbox_queue_free(mbox->rxq);
316 }
317
318 if (likely(mbox->ops->shutdown)) {
319 if (!--mbox_configured)
320 mbox->ops->shutdown(mbox);
321 }
322
323 mutex_unlock(&mbox_configured_lock);
324}
325
326struct omap_mbox *omap_mbox_get(const char *name, struct notifier_block *nb)
327{
328 struct omap_mbox *_mbox, *mbox = NULL;
329 int i, ret;
330
331 if (!mboxes)
332 return ERR_PTR(-EINVAL);
333
334 for (i = 0; (_mbox = mboxes[i]); i++) {
335 if (!strcmp(_mbox->name, name)) {
336 mbox = _mbox;
337 break;
338 }
339 }
340
341 if (!mbox)
342 return ERR_PTR(-ENOENT);
343
344 if (nb)
345 blocking_notifier_chain_register(&mbox->notifier, nb);
346
347 ret = omap_mbox_startup(mbox);
348 if (ret) {
349 blocking_notifier_chain_unregister(&mbox->notifier, nb);
350 return ERR_PTR(-ENODEV);
351 }
352
353 return mbox;
354}
355EXPORT_SYMBOL(omap_mbox_get);
356
357void omap_mbox_put(struct omap_mbox *mbox, struct notifier_block *nb)
358{
359 blocking_notifier_chain_unregister(&mbox->notifier, nb);
360 omap_mbox_fini(mbox);
361}
362EXPORT_SYMBOL(omap_mbox_put);
363
364static struct class omap_mbox_class = { .name = "mbox", };
365
366int omap_mbox_register(struct device *parent, struct omap_mbox **list)
367{
368 int ret;
369 int i;
370
371 mboxes = list;
372 if (!mboxes)
373 return -EINVAL;
374
375 for (i = 0; mboxes[i]; i++) {
376 struct omap_mbox *mbox = mboxes[i];
377 mbox->dev = device_create(&omap_mbox_class,
378 parent, 0, mbox, "%s", mbox->name);
379 if (IS_ERR(mbox->dev)) {
380 ret = PTR_ERR(mbox->dev);
381 goto err_out;
382 }
383
384 BLOCKING_INIT_NOTIFIER_HEAD(&mbox->notifier);
385 }
386 return 0;
387
388err_out:
389 while (i--)
390 device_unregister(mboxes[i]->dev);
391 return ret;
392}
393EXPORT_SYMBOL(omap_mbox_register);
394
395int omap_mbox_unregister(void)
396{
397 int i;
398
399 if (!mboxes)
400 return -EINVAL;
401
402 for (i = 0; mboxes[i]; i++)
403 device_unregister(mboxes[i]->dev);
404 mboxes = NULL;
405 return 0;
406}
407EXPORT_SYMBOL(omap_mbox_unregister);
408
409static int __init omap_mbox_init(void)
410{
411 int err;
412
413 err = class_register(&omap_mbox_class);
414 if (err)
415 return err;
416
417 /* kfifo size sanity check: alignment and minimal size */
418 mbox_kfifo_size = ALIGN(mbox_kfifo_size, sizeof(mbox_msg_t));
419 mbox_kfifo_size = max_t(unsigned int, mbox_kfifo_size,
420 sizeof(mbox_msg_t));
421
422 return 0;
423}
424subsys_initcall(omap_mbox_init);
425
426static void __exit omap_mbox_exit(void)
427{
428 class_unregister(&omap_mbox_class);
429}
430module_exit(omap_mbox_exit);
431
432MODULE_LICENSE("GPL v2");
433MODULE_DESCRIPTION("omap mailbox: interrupt driven messaging");
434MODULE_AUTHOR("Toshihiro Kobayashi");
435MODULE_AUTHOR("Hiroshi DOYU");
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-09 17:33:30 -0400