241 files changed, 2518 insertions, 2117 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ba412e02ec0c..75e2edaac61a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -20,7 +20,6 @@ config ARM
         select GENERIC_STRNCPY_FROM_USER
         select GENERIC_STRNLEN_USER
         select HARDIRQS_SW_RESEND
-        select HAVE_AOUT
         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
         select HAVE_ARCH_KGDB
         select HAVE_ARCH_SECCOMP_FILTER
@@ -218,7 +217,8 @@ config VECTORS_BASE
         default DRAM_BASE if REMAP_VECTORS_TO_RAM
         default 0x00000000
         help
-          The base address of exception vectors.
+          The base address of exception vectors.  This must be two pages
+          in size.
 
 config ARM_PATCH_PHYS_VIRT
         bool "Patch physical to virtual translations at runtime" if EMBEDDED
@@ -557,6 +557,7 @@ config ARCH_MMP
         select GENERIC_CLOCKEVENTS
         select GPIO_PXA
         select IRQ_DOMAIN
+        select MULTI_IRQ_HANDLER
         select NEED_MACH_GPIO_H
         select PINCTRL
         select PLAT_PXA
@@ -1600,8 +1601,7 @@ config LOCAL_TIMERS
 config ARCH_NR_GPIO
         int
         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
-        default 512 if SOC_OMAP5
-        default 512 if ARCH_KEYSTONE
+        default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5
         default 392 if ARCH_U8500
         default 352 if ARCH_VT8500
         default 288 if ARCH_SUNXI
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index e401a766c0bd..583f4a00ec32 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -804,9 +804,19 @@ config DEBUG_LL_INCLUDE
 
 config DEBUG_UNCOMPRESS
         bool
-        default y if ARCH_MULTIPLATFORM && DEBUG_LL && \
-                     !DEBUG_OMAP2PLUS_UART && \
+        depends on ARCH_MULTIPLATFORM
+        default y if DEBUG_LL && !DEBUG_OMAP2PLUS_UART && \
                      !DEBUG_TEGRA_UART
+        help
+          This option influences the normal decompressor output for
+          multiplatform kernels.  Normally, multiplatform kernels disable
+          decompressor output because it is not possible to know where to
+          send the decompressor output.
+
+          When this option is set, the selected DEBUG_LL output method
+          will be re-used for normal decompressor output on multiplatform
+          kernels.
+          
 
 config UNCOMPRESS_INCLUDE
         string
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index c0ac0f5e5e5c..6fd2ceae305a 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -153,6 +153,7 @@ machine-$(CONFIG_ARCH_DAVINCI)		+= davinci
 machine-$(CONFIG_ARCH_DOVE)             += dove
 machine-$(CONFIG_ARCH_EBSA110)          += ebsa110
 machine-$(CONFIG_ARCH_EP93XX)           += ep93xx
+machine-$(CONFIG_ARCH_EXYNOS)           += exynos
 machine-$(CONFIG_ARCH_GEMINI)           += gemini
 machine-$(CONFIG_ARCH_HIGHBANK)         += highbank
 machine-$(CONFIG_ARCH_INTEGRATOR)       += integrator
@@ -160,15 +161,16 @@ machine-$(CONFIG_ARCH_IOP13XX)		+= iop13xx
 machine-$(CONFIG_ARCH_IOP32X)           += iop32x
 machine-$(CONFIG_ARCH_IOP33X)           += iop33x
 machine-$(CONFIG_ARCH_IXP4XX)           += ixp4xx
+machine-$(CONFIG_ARCH_KEYSTONE)         += keystone
 machine-$(CONFIG_ARCH_KIRKWOOD)         += kirkwood
 machine-$(CONFIG_ARCH_KS8695)           += ks8695
 machine-$(CONFIG_ARCH_LPC32XX)          += lpc32xx
 machine-$(CONFIG_ARCH_MMP)              += mmp
 machine-$(CONFIG_ARCH_MSM)              += msm
 machine-$(CONFIG_ARCH_MV78XX0)          += mv78xx0
+machine-$(CONFIG_ARCH_MVEBU)            += mvebu
 machine-$(CONFIG_ARCH_MXC)              += imx
 machine-$(CONFIG_ARCH_MXS)              += mxs
-machine-$(CONFIG_ARCH_MVEBU)            += mvebu
 machine-$(CONFIG_ARCH_NETX)             += netx
 machine-$(CONFIG_ARCH_NOMADIK)          += nomadik
 machine-$(CONFIG_ARCH_NSPIRE)           += nspire
@@ -176,7 +178,6 @@ machine-$(CONFIG_ARCH_OMAP1)		+= omap1
 machine-$(CONFIG_ARCH_OMAP2PLUS)        += omap2
 machine-$(CONFIG_ARCH_ORION5X)          += orion5x
 machine-$(CONFIG_ARCH_PICOXCELL)        += picoxcell
-machine-$(CONFIG_ARCH_SIRF)             += prima2
 machine-$(CONFIG_ARCH_PXA)              += pxa
 machine-$(CONFIG_ARCH_REALVIEW)         += realview
 machine-$(CONFIG_ARCH_ROCKCHIP)         += rockchip
@@ -186,25 +187,24 @@ machine-$(CONFIG_ARCH_S3C64XX)		+= s3c64xx
 machine-$(CONFIG_ARCH_S5P64X0)          += s5p64x0
 machine-$(CONFIG_ARCH_S5PC100)          += s5pc100
 machine-$(CONFIG_ARCH_S5PV210)          += s5pv210
-machine-$(CONFIG_ARCH_EXYNOS)           += exynos
 machine-$(CONFIG_ARCH_SA1100)           += sa1100
 machine-$(CONFIG_ARCH_SHARK)            += shark
 machine-$(CONFIG_ARCH_SHMOBILE)         += shmobile
+machine-$(CONFIG_ARCH_SIRF)             += prima2
+machine-$(CONFIG_ARCH_SOCFPGA)          += socfpga
+machine-$(CONFIG_ARCH_STI)              += sti
+machine-$(CONFIG_ARCH_SUNXI)            += sunxi
 machine-$(CONFIG_ARCH_TEGRA)            += tegra
 machine-$(CONFIG_ARCH_U300)             += u300
 machine-$(CONFIG_ARCH_U8500)            += ux500
 machine-$(CONFIG_ARCH_VERSATILE)        += versatile
 machine-$(CONFIG_ARCH_VEXPRESS)         += vexpress
+machine-$(CONFIG_ARCH_VIRT)             += virt
 machine-$(CONFIG_ARCH_VT8500)           += vt8500
 machine-$(CONFIG_ARCH_W90X900)          += w90x900
+machine-$(CONFIG_ARCH_ZYNQ)             += zynq
 machine-$(CONFIG_FOOTBRIDGE)            += footbridge
-machine-$(CONFIG_ARCH_SOCFPGA)          += socfpga
 machine-$(CONFIG_PLAT_SPEAR)            += spear
-machine-$(CONFIG_ARCH_STI)              += sti
-machine-$(CONFIG_ARCH_VIRT)             += virt
-machine-$(CONFIG_ARCH_ZYNQ)             += zynq
-machine-$(CONFIG_ARCH_SUNXI)            += sunxi
-machine-$(CONFIG_ARCH_KEYSTONE)         += keystone
 
 # Platform directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index ec1a3f50d226..05f6c2a29019 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -53,13 +53,14 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
         exynos4210-trats.dtb \
         exynos4210-universal_c210.dtb \
         exynos4412-odroidx.dtb \
-        exynos4412-smdk4412.dtb \
         exynos4412-origen.dtb \
+        exynos4412-smdk4412.dtb \
+        exynos4412-trats2.dtb \
         exynos5250-arndale.dtb \
-        exynos5440-sd5v1.dtb \
         exynos5250-smdk5250.dtb \
         exynos5250-snow.dtb \
         exynos5420-smdk5420.dtb \
+        exynos5440-sd5v1.dtb \
         exynos5440-ssdk5440.dtb
 dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \
         ecx-2000.dtb
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index 92b9e21389db..f77065506f1e 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -120,6 +120,7 @@
                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
                                 #address-cells = <1>;
                                 #size-cells = <0>;
+                                pinctrl-names = "default";
                                 status = "disabled";
                         };
 
diff --git a/arch/arm/boot/dts/at91rm9200_pqfp.dtsi b/arch/arm/boot/dts/at91rm9200_pqfp.dtsi
new file mode 100644
index 000000000000..93ca66f80360
--- /dev/null
+++ b/arch/arm/boot/dts/at91rm9200_pqfp.dtsi
@@ -0,0 +1,17 @@
+/*
+ * at91rm9200_pqfp.dtsi - Device Tree Include file for AT91RM9200 PQFP family SoC
+ *
+ * Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+#include "at91rm9200.dtsi"
+
+/ {
+        compatible = "atmel,at91rm9200-pqfp", "atmel,at91rm9200";
+};
+
+&pioD {
+        status = "disabled";
+};
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index c7ccbcbffb3e..56ee8282a7a8 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -572,6 +572,7 @@
                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
                                 #address-cells = <1>;
                                 #size-cells = <0>;
+                                pinctrl-names = "default";
                                 status = "disabled";
                         };
 
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index bb7f564b3a55..9fb7ffd32af2 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -291,6 +291,22 @@
                                         };
                                 };
 
+                                i2c0 {
+                                        pinctrl_i2c0: i2c0-0 {
+                                                atmel,pins =
+                                                        <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
+                                                         AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                        };
+                                };
+
+                                i2c1 {
+                                        pinctrl_i2c1: i2c1-0 {
+                                                atmel,pins =
+                                                        <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE
+                                                         AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;
+                                        };
+                                };
+
                                 tcb0 {
                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
                                                 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
@@ -471,6 +487,8 @@
                                 dma-names = "tx", "rx";
                                 #address-cells = <1>;
                                 #size-cells = <0>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_i2c0>;
                                 status = "disabled";
                         };
 
@@ -483,6 +501,8 @@
                                 dma-names = "tx", "rx";
                                 #address-cells = <1>;
                                 #size-cells = <0>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_i2c1>;
                                 status = "disabled";
                         };
 
diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts
index d59b70c6a6a0..27a9352b9d7a 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -14,11 +14,11 @@
         compatible = "atmel,at91sam9n12ek", "atmel,at91sam9n12", "atmel,at91sam9";
 
         chosen {
-                bootargs = "mem=128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2";
+                bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2";
         };
 
         memory {
-                reg = <0x20000000 0x10000000>;
+                reg = <0x20000000 0x8000000>;
         };
 
         clocks {
@@ -40,6 +40,15 @@
 
                         i2c0: i2c@f8010000 {
                                 status = "okay";
+
+                                qt1070: keyboard@1b {
+                                        compatible = "qt1070";
+                                        reg = <0x1b>;
+                                        interrupt-parent = <&pioA>;
+                                        interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+                                        pinctrl-names = "default";
+                                        pinctrl-0 = <&pinctrl_qt1070_irq>;
+                                };
                         };
 
                         i2c1: i2c@f8014000 {
@@ -66,6 +75,13 @@
                                                         <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;   /* PA7 gpio CD pin pull up and deglitch */
                                         };
                                 };
+
+                                qt1070 {
+                                        pinctrl_qt1070_irq: qt1070_irq {
+                                                atmel,pins =
+                                                        <AT91_PIOA 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
+                                        };
+                                };
                         };
 
                         spi0: spi@f0000000 {
@@ -121,7 +137,7 @@
 
                 enter {
                         label = "Enter";
-                        gpios = <&pioB 4 GPIO_ACTIVE_LOW>;
+                        gpios = <&pioB 3 GPIO_ACTIVE_LOW>;
                         linux,code = <28>;
                         gpio-key,wakeup;
                 };
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 57d45f5bea09..cf78ac0b04b1 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -542,6 +542,9 @@
                                 compatible = "atmel,at91sam9g45-ssc";
                                 reg = <0xf0010000 0x4000>;
                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
+                                dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
+                                       <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
+                                dma-names = "tx", "rx";
                                 pinctrl-names = "default";
                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
                                 status = "disabled";
diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi b/arch/arm/boot/dts/at91sam9x5ek.dtsi
index b753855b2058..3a9f6fa4a36a 100644
--- a/arch/arm/boot/dts/at91sam9x5ek.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi
@@ -59,6 +59,11 @@
 
                         i2c0: i2c@f8010000 {
                                 status = "okay";
+
+                                wm8731: wm8731@1a {
+                                        compatible = "wm8731";
+                                        reg = <0x1a>;
+                                };
                         };
 
                         pinctrl@fffff400 {
@@ -90,12 +95,17 @@
                         watchdog@fffffe40 {
                                 status = "okay";
                         };
+
+                        ssc0: ssc@f0010000 {
+                                status = "okay";
+                        };
                 };
 
                 usb0: ohci@00600000 {
                         status = "okay";
-                        num-ports = <2>;
-                        atmel,vbus-gpio = <&pioD 19 GPIO_ACTIVE_LOW
+                        num-ports = <3>;
+                        atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW *//* Activate to have access to port A */
+                                           &pioD 19 GPIO_ACTIVE_LOW
                                            &pioD 20 GPIO_ACTIVE_LOW
                                           >;
                 };
@@ -104,4 +114,19 @@
                         status = "okay";
                 };
         };
+
+        sound {
+                compatible = "atmel,sam9x5-wm8731-audio";
+
+                atmel,model = "wm8731 @ AT91SAM9X5EK";
+
+                atmel,audio-routing =
+                        "Headphone Jack", "RHPOUT",
+                        "Headphone Jack", "LHPOUT",
+                        "LLINEIN", "Line In Jack",
+                        "RLINEIN", "Line In Jack";
+
+                atmel,ssc-controller = <&ssc0>;
+                atmel,audio-codec = <&wm8731>;
+        };
 };
diff --git a/arch/arm/boot/dts/atlas6.dtsi b/arch/arm/boot/dts/atlas6.dtsi
index 9866cd736dee..a0f2721ea583 100644
--- a/arch/arm/boot/dts/atlas6.dtsi
+++ b/arch/arm/boot/dts/atlas6.dtsi
@@ -485,6 +485,12 @@
                                                 sirf,function = "usp0";
                                         };
                                 };
+                                usp0_uart_nostreamctrl_pins_a: usp0@1 {
+                                        usp0 {
+                                                sirf,pins = "usp0_uart_nostreamctrl_grp";
+                                                sirf,function = "usp0_uart_nostreamctrl";
+                                        };
+                                };
                                 usp1_pins_a: usp1@0 {
                                         usp1 {
                                                 sirf,pins = "usp1grp";
@@ -515,16 +521,16 @@
                                                 sirf,function = "pulse_count";
                                         };
                                 };
-                                cko0_rst_pins_a: cko0_rst@0 {
-                                        cko0_rst {
-                                                sirf,pins = "cko0_rstgrp";
-                                                sirf,function = "cko0_rst";
+                                cko0_pins_a: cko0@0 {
+                                        cko0 {
+                                                sirf,pins = "cko0grp";
+                                                sirf,function = "cko0";
                                         };
                                 };
-                                cko1_rst_pins_a: cko1_rst@0 {
-                                        cko1_rst {
-                                                sirf,pins = "cko1_rstgrp";
-                                                sirf,function = "cko1_rst";
+                                cko1_pins_a: cko1@0 {
+                                        cko1 {
+                                                sirf,pins = "cko1grp";
+                                                sirf,function = "cko1";
                                         };
                                 };
                         };
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 3f94fe8e3706..93c250139159 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -36,6 +36,12 @@
                 i2c5 = &i2c_5;
                 i2c6 = &i2c_6;
                 i2c7 = &i2c_7;
+                csis0 = &csis_0;
+                csis1 = &csis_1;
+                fimc0 = &fimc_0;
+                fimc1 = &fimc_1;
+                fimc2 = &fimc_2;
+                fimc3 = &fimc_3;
         };
 
         chipid@10000000 {
@@ -92,6 +98,88 @@
                 reg = <0x10010000 0x400>;
         };
 
+        camera {
+                compatible = "samsung,fimc", "simple-bus";
+                status = "disabled";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+
+                clock_cam: clock-controller {
+                         #clock-cells = <1>;
+                };
+
+                fimc_0: fimc@11800000 {
+                        compatible = "samsung,exynos4210-fimc";
+                        reg = <0x11800000 0x1000>;
+                        interrupts = <0 84 0>;
+                        clocks = <&clock 256>, <&clock 128>;
+                        clock-names = "fimc", "sclk_fimc";
+                        samsung,power-domain = <&pd_cam>;
+                        samsung,sysreg = <&sys_reg>;
+                        status = "disabled";
+                };
+
+                fimc_1: fimc@11810000 {
+                        compatible = "samsung,exynos4210-fimc";
+                        reg = <0x11810000 0x1000>;
+                        interrupts = <0 85 0>;
+                        clocks = <&clock 257>, <&clock 129>;
+                        clock-names = "fimc", "sclk_fimc";
+                        samsung,power-domain = <&pd_cam>;
+                        samsung,sysreg = <&sys_reg>;
+                        status = "disabled";
+                };
+
+                fimc_2: fimc@11820000 {
+                        compatible = "samsung,exynos4210-fimc";
+                        reg = <0x11820000 0x1000>;
+                        interrupts = <0 86 0>;
+                        clocks = <&clock 258>, <&clock 130>;
+                        clock-names = "fimc", "sclk_fimc";
+                        samsung,power-domain = <&pd_cam>;
+                        samsung,sysreg = <&sys_reg>;
+                        status = "disabled";
+                };
+
+                fimc_3: fimc@11830000 {
+                        compatible = "samsung,exynos4210-fimc";
+                        reg = <0x11830000 0x1000>;
+                        interrupts = <0 87 0>;
+                        clocks = <&clock 259>, <&clock 131>;
+                        clock-names = "fimc", "sclk_fimc";
+                        samsung,power-domain = <&pd_cam>;
+                        samsung,sysreg = <&sys_reg>;
+                        status = "disabled";
+                };
+
+                csis_0: csis@11880000 {
+                        compatible = "samsung,exynos4210-csis";
+                        reg = <0x11880000 0x4000>;
+                        interrupts = <0 78 0>;
+                        clocks = <&clock 260>, <&clock 134>;
+                        clock-names = "csis", "sclk_csis";
+                        bus-width = <4>;
+                        samsung,power-domain = <&pd_cam>;
+                        status = "disabled";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+
+                csis_1: csis@11890000 {
+                        compatible = "samsung,exynos4210-csis";
+                        reg = <0x11890000 0x4000>;
+                        interrupts = <0 80 0>;
+                        clocks = <&clock 261>, <&clock 135>;
+                        clock-names = "csis", "sclk_csis";
+                        bus-width = <2>;
+                        samsung,power-domain = <&pd_cam>;
+                        status = "disabled";
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                };
+        };
+
         watchdog@10060000 {
                 compatible = "samsung,s3c2410-wdt";
                 reg = <0x10060000 0x100>;
@@ -155,13 +243,31 @@
                 status = "disabled";
         };
 
+        ehci@12580000 {
+                compatible = "samsung,exynos4210-ehci";
+                reg = <0x12580000 0x100>;
+                interrupts = <0 70 0>;
+                clocks = <&clock 304>;
+                clock-names = "usbhost";
+                status = "disabled";
+        };
+
+        ohci@12590000 {
+                compatible = "samsung,exynos4210-ohci";
+                reg = <0x12590000 0x100>;
+                interrupts = <0 70 0>;
+                clocks = <&clock 304>;
+                clock-names = "usbhost";
+                status = "disabled";
+        };
+
         mfc: codec@13400000 {
                 compatible = "samsung,mfc-v5";
                 reg = <0x13400000 0x10000>;
                 interrupts = <0 94 0>;
                 samsung,power-domain = <&pd_mfc>;
-                clocks = <&clock 170>, <&clock 273>;
-                clock-names = "sclk_mfc", "mfc";
+                clocks = <&clock 273>;
+                clock-names = "mfc";
                 status = "disabled";
         };
 
@@ -297,8 +403,8 @@
                 compatible = "samsung,exynos4210-spi";
                 reg = <0x13920000 0x100>;
                 interrupts = <0 66 0>;
-                tx-dma-channel = <&pdma0 7>; /* preliminary */
-                rx-dma-channel = <&pdma0 6>; /* preliminary */
+                dmas = <&pdma0 7>, <&pdma0 6>;
+                dma-names = "tx", "rx";
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&clock 327>, <&clock 159>;
@@ -312,8 +418,8 @@
                 compatible = "samsung,exynos4210-spi";
                 reg = <0x13930000 0x100>;
                 interrupts = <0 67 0>;
-                tx-dma-channel = <&pdma1 7>; /* preliminary */
-                rx-dma-channel = <&pdma1 6>; /* preliminary */
+                dmas = <&pdma1 7>, <&pdma1 6>;
+                dma-names = "tx", "rx";
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&clock 328>, <&clock 160>;
@@ -327,8 +433,8 @@
                 compatible = "samsung,exynos4210-spi";
                 reg = <0x13940000 0x100>;
                 interrupts = <0 68 0>;
-                tx-dma-channel = <&pdma0 9>; /* preliminary */
-                rx-dma-channel = <&pdma0 8>; /* preliminary */
+                dmas = <&pdma0 9>, <&pdma0 8>;
+                dma-names = "tx", "rx";
                 #address-cells = <1>;
                 #size-cells = <0>;
                 clocks = <&clock 329>, <&clock 161>;
diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
index 553bceae8967..a7c212891674 100644
--- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
@@ -797,6 +797,29 @@
                         samsung,pin-pud = <0>;
                         samsung,pin-drv = <0>;
                 };
+
+                cam_port_a_io: cam-port-a-io {
+                        samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3",
+                                        "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7",
+                                        "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                cam_port_a_clk_active: cam-port-a-clk-active {
+                        samsung,pins = "gpj1-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                cam_port_a_clk_idle: cam-port-a-clk-idle {
+                        samsung,pins = "gpj1-3";
+                        samsung,pin-function = <0>;
+                        samsung,pin-pud = <1>;
+                        samsung,pin-drv = <0>;
+                };
         };
 
         pinctrl@03860000 {
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index 94eebffe3044..1c164f234bcc 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -30,13 +30,62 @@
                 bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5";
         };
 
-        vemmc_reg: voltage-regulator@0 {
-                compatible = "regulator-fixed";
-                regulator-name = "VMEM_VDD_2.8V";
-                regulator-min-microvolt = <2800000>;
-                regulator-max-microvolt = <2800000>;
-                gpio = <&gpk0 2 0>;
-                enable-active-high;
+        regulators {
+                compatible = "simple-bus";
+
+                vemmc_reg: regulator-0 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "VMEM_VDD_2.8V";
+                        regulator-min-microvolt = <2800000>;
+                        regulator-max-microvolt = <2800000>;
+                        gpio = <&gpk0 2 0>;
+                        enable-active-high;
+                };
+
+                tsp_reg: regulator-1 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "TSP_FIXED_VOLTAGES";
+                        regulator-min-microvolt = <2800000>;
+                        regulator-max-microvolt = <2800000>;
+                        gpio = <&gpl0 3 0>;
+                        enable-active-high;
+                };
+
+                cam_af_28v_reg: regulator-2 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "8M_AF_2.8V_EN";
+                        regulator-min-microvolt = <2800000>;
+                        regulator-max-microvolt = <2800000>;
+                        gpio = <&gpk1 1 0>;
+                        enable-active-high;
+                };
+
+                cam_io_en_reg: regulator-3 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "CAM_IO_EN";
+                        regulator-min-microvolt = <2800000>;
+                        regulator-max-microvolt = <2800000>;
+                        gpio = <&gpe2 1 0>;
+                        enable-active-high;
+                };
+
+                cam_io_12v_reg: regulator-4 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "8M_1.2V_EN";
+                        regulator-min-microvolt = <1200000>;
+                        regulator-max-microvolt = <1200000>;
+                        gpio = <&gpe2 5 0>;
+                        enable-active-high;
+                };
+
+                vt_core_15v_reg: regulator-5 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "VT_CORE_1.5V";
+                        regulator-min-microvolt = <1500000>;
+                        regulator-max-microvolt = <1500000>;
+                        gpio = <&gpe2 2 0>;
+                        enable-active-high;
+                };
         };
 
         sdhci_emmc: sdhci@12510000 {
@@ -97,15 +146,6 @@
                 };
         };
 
-        tsp_reg: voltage-regulator {
-                compatible = "regulator-fixed";
-                regulator-name = "TSP_FIXED_VOLTAGES";
-                regulator-min-microvolt = <2800000>;
-                regulator-max-microvolt = <2800000>;
-                gpio = <&gpl0 3 0>;
-                enable-active-high;
-        };
-
         i2c@13890000 {
                 samsung,i2c-sda-delay = <100>;
                 samsung,i2c-slave-addr = <0x10>;
@@ -218,6 +258,12 @@
                                      regulator-always-on;
                                 };
 
+                                vtcam_reg: LDO12 {
+                                     regulator-name = "VT_CAM_1.8V";
+                                     regulator-min-microvolt = <1800000>;
+                                     regulator-max-microvolt = <1800000>;
+                                };
+
                                 vcclcd_reg: LDO13 {
                                      regulator-name = "VCC_3.3V_LCD";
                                      regulator-min-microvolt = <3300000>;
@@ -301,4 +347,26 @@
                         clock-frequency = <24000000>;
                 };
         };
+
+        camera {
+                pinctrl-names = "default";
+                pinctrl-0 = <>;
+                status = "okay";
+
+                fimc_0: fimc@11800000 {
+                        status = "okay";
+                };
+
+                fimc_1: fimc@11810000 {
+                        status = "okay";
+                };
+
+                fimc_2: fimc@11820000 {
+                        status = "okay";
+                };
+
+                fimc_3: fimc@11830000 {
+                        status = "okay";
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index b7f358a93bcb..ef8c2a5d2d7f 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -125,4 +125,34 @@
                 clock-names = "sclk_fimg2d", "fimg2d";
                 status = "disabled";
         };
+
+        camera {
+                clocks = <&clock 132>, <&clock 133>, <&clock 351>, <&clock 352>;
+                clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
+
+                fimc_0: fimc@11800000 {
+                        samsung,pix-limits = <4224 8192 1920 4224>;
+                        samsung,mainscaler-ext;
+                        samsung,cam-if;
+                };
+
+                fimc_1: fimc@11810000 {
+                        samsung,pix-limits = <4224 8192 1920 4224>;
+                        samsung,mainscaler-ext;
+                        samsung,cam-if;
+                };
+
+                fimc_2: fimc@11820000 {
+                        samsung,pix-limits = <4224 8192 1920 4224>;
+                        samsung,mainscaler-ext;
+                        samsung,lcd-wb;
+                };
+
+                fimc_3: fimc@11830000 {
+                        samsung,pix-limits = <1920 8192 1366 1920>;
+                        samsung,rotators = <0>;
+                        samsung,mainscaler-ext;
+                        samsung,lcd-wb;
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts
index 7993641cb32a..8768b03702e5 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -27,6 +27,11 @@
                 bootargs ="console=ttySAC2,115200";
         };
 
+        firmware@0203F000 {
+                compatible = "samsung,secure-firmware";
+                reg = <0x0203F000 0x1000>;
+        };
+
         mmc_reg: voltage-regulator {
                 compatible = "regulator-fixed";
                 regulator-name = "VMEM_VDD_2.8V";
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
new file mode 100644
index 000000000000..fb7b9ae5f399
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -0,0 +1,579 @@
+/*
+ * Samsung's Exynos4412 based Trats 2 board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Device tree source file for Samsung's Trats 2 board which is based on
+ * Samsung's Exynos4412 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+#include "exynos4412.dtsi"
+
+/ {
+        model = "Samsung Trats 2 based on Exynos4412";
+        compatible = "samsung,trats2", "samsung,exynos4412";
+
+        aliases {
+                i2c8 = &i2c_ak8975;
+        };
+
+        memory {
+                reg =  <0x40000000 0x40000000>;
+        };
+
+        chosen {
+                bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5";
+        };
+
+        firmware@0204F000 {
+                compatible = "samsung,secure-firmware";
+                reg = <0x0204F000 0x1000>;
+        };
+
+        fixed-rate-clocks {
+                xxti {
+                        compatible = "samsung,clock-xxti", "fixed-clock";
+                        clock-frequency = <0>;
+                };
+
+                xusbxti {
+                        compatible = "samsung,clock-xusbxti", "fixed-clock";
+                        clock-frequency = <24000000>;
+                };
+        };
+
+        regulators {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                vemmc_reg: regulator-0 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "VMEM_VDD_2.8V";
+                        regulator-min-microvolt = <2800000>;
+                        regulator-max-microvolt = <2800000>;
+                        gpio = <&gpk0 2 0>;
+                        enable-active-high;
+                };
+
+                cam_io_reg: voltage-regulator-1 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "CAM_SENSOR_A";
+                        regulator-min-microvolt = <2800000>;
+                        regulator-max-microvolt = <2800000>;
+                        gpio = <&gpm0 2 0>;
+                        enable-active-high;
+                };
+
+                /* More to come */
+        };
+
+        gpio-keys {
+                compatible = "gpio-keys";
+
+                key-down {
+                        interrupt-parent = <&gpj1>;
+                        interrupts = <2 0>;
+                        gpios = <&gpj1 2 1>;
+                        linux,code = <114>;
+                        label = "volume down";
+                        debounce-interval = <10>;
+                };
+
+                key-up {
+                        interrupt-parent = <&gpj1>;
+                        interrupts = <1 0>;
+                        gpios = <&gpj1 1 1>;
+                        linux,code = <115>;
+                        label = "volume up";
+                        debounce-interval = <10>;
+                };
+
+                key-power {
+                        interrupt-parent = <&gpx2>;
+                        interrupts = <7 0>;
+                        gpios = <&gpx2 7 1>;
+                        linux,code = <116>;
+                        label = "power";
+                        debounce-interval = <10>;
+                        gpio-key,wakeup;
+                };
+        };
+
+        i2c@13890000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-slave-addr = <0x10>;
+                samsung,i2c-max-bus-freq = <400000>;
+                pinctrl-0 = <&i2c3_bus>;
+                pinctrl-names = "default";
+                status = "okay";
+
+                mms114-touchscreen@48 {
+                        compatible = "melfas,mms114";
+                        reg = <0x48>;
+                        interrupt-parent = <&gpm2>;
+                        interrupts = <3 2>;
+                        x-size = <720>;
+                        y-size = <1280>;
+                        avdd-supply = <&ldo23_reg>;
+                        vdd-supply = <&ldo24_reg>;
+                };
+        };
+
+        i2c@138D0000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-slave-addr = <0x10>;
+                samsung,i2c-max-bus-freq = <100000>;
+                pinctrl-0 = <&i2c7_bus>;
+                pinctrl-names = "default";
+                status = "okay";
+
+                max77686_pmic@09 {
+                        compatible = "maxim,max77686";
+                        interrupt-parent = <&gpx0>;
+                        interrupts = <7 0>;
+                        reg = <0x09>;
+
+                        voltage-regulators {
+                                ldo1_reg: ldo1 {
+                                        regulator-compatible = "LDO1";
+                                        regulator-name = "VALIVE_1.0V_AP";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1000000>;
+                                        regulator-always-on;
+                                        regulator-mem-on;
+                                };
+
+                                ldo2_reg: ldo2 {
+                                        regulator-compatible = "LDO2";
+                                        regulator-name = "VM1M2_1.2V_AP";
+                                        regulator-min-microvolt = <1200000>;
+                                        regulator-max-microvolt = <1200000>;
+                                        regulator-always-on;
+                                        regulator-mem-on;
+                                };
+
+                                ldo3_reg: ldo3 {
+                                        regulator-compatible = "LDO3";
+                                        regulator-name = "VCC_1.8V_AP";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        regulator-mem-on;
+                                };
+
+                                ldo4_reg: ldo4 {
+                                        regulator-compatible = "LDO4";
+                                        regulator-name = "VCC_2.8V_AP";
+                                        regulator-min-microvolt = <2800000>;
+                                        regulator-max-microvolt = <2800000>;
+                                        regulator-always-on;
+                                        regulator-mem-on;
+                                };
+
+                                ldo5_reg: ldo5 {
+                                        regulator-compatible = "LDO5";
+                                        regulator-name = "VCC_1.8V_IO";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-always-on;
+                                        regulator-mem-on;
+                                };
+
+                                ldo6_reg: ldo6 {
+                                        regulator-compatible = "LDO6";
+                                        regulator-name = "VMPLL_1.0V_AP";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1000000>;
+                                        regulator-always-on;
+                                        regulator-mem-on;
+                                };
+
+                                ldo7_reg: ldo7 {
+                                        regulator-compatible = "LDO7";
+                                        regulator-name = "VPLL_1.0V_AP";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1000000>;
+                                        regulator-always-on;
+                                        regulator-mem-on;
+                                };
+
+                                ldo8_reg: ldo8 {
+                                        regulator-compatible = "LDO8";
+                                        regulator-name = "VMIPI_1.0V";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1000000>;
+                                        regulator-mem-off;
+                                };
+
+                                ldo9_reg: ldo9 {
+                                        regulator-compatible = "LDO9";
+                                        regulator-name = "CAM_ISP_MIPI_1.2V";
+                                        regulator-min-microvolt = <1200000>;
+                                        regulator-max-microvolt = <1200000>;
+                                        regulator-mem-idle;
+                                };
+
+                                ldo10_reg: ldo10 {
+                                        regulator-compatible = "LDO10";
+                                        regulator-name = "VMIPI_1.8V";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-mem-off;
+                                };
+
+                                ldo11_reg: ldo11 {
+                                        regulator-compatible = "LDO11";
+                                        regulator-name = "VABB1_1.95V";
+                                        regulator-min-microvolt = <1950000>;
+                                        regulator-max-microvolt = <1950000>;
+                                        regulator-always-on;
+                                        regulator-mem-off;
+                                };
+
+                                ldo12_reg: ldo12 {
+                                        regulator-compatible = "LDO12";
+                                        regulator-name = "VUOTG_3.0V";
+                                        regulator-min-microvolt = <3000000>;
+                                        regulator-max-microvolt = <3000000>;
+                                        regulator-mem-off;
+                                };
+
+                                ldo13_reg: ldo13 {
+                                        regulator-compatible = "LDO13";
+                                        regulator-name = "NFC_AVDD_1.8V";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-mem-idle;
+                                };
+
+                                ldo14_reg: ldo14 {
+                                        regulator-compatible = "LDO14";
+                                        regulator-name = "VABB2_1.95V";
+                                        regulator-min-microvolt = <1950000>;
+                                        regulator-max-microvolt = <1950000>;
+                                        regulator-always-on;
+                                        regulator-mem-off;
+                                };
+
+                                ldo15_reg: ldo15 {
+                                        regulator-compatible = "LDO15";
+                                        regulator-name = "VHSIC_1.0V";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1000000>;
+                                        regulator-mem-off;
+                                };
+
+                                ldo16_reg: ldo16 {
+                                        regulator-compatible = "LDO16";
+                                        regulator-name = "VHSIC_1.8V";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-mem-off;
+                                };
+
+                                ldo17_reg: ldo17 {
+                                        regulator-compatible = "LDO17";
+                                        regulator-name = "CAM_SENSOR_CORE_1.2V";
+                                        regulator-min-microvolt = <1200000>;
+                                        regulator-max-microvolt = <1200000>;
+                                        regulator-mem-idle;
+                                };
+
+                                ldo18_reg: ldo18 {
+                                        regulator-compatible = "LDO18";
+                                        regulator-name = "CAM_ISP_SEN_IO_1.8V";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-mem-idle;
+                                };
+
+                                ldo19_reg: ldo19 {
+                                        regulator-compatible = "LDO19";
+                                        regulator-name = "VT_CAM_1.8V";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-mem-idle;
+                                };
+
+                                ldo20_reg: ldo20 {
+                                        regulator-compatible = "LDO20";
+                                        regulator-name = "VDDQ_PRE_1.8V";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-mem-idle;
+                                };
+
+                                ldo21_reg: ldo21 {
+                                        regulator-compatible = "LDO21";
+                                        regulator-name = "VTF_2.8V";
+                                        regulator-min-microvolt = <2800000>;
+                                        regulator-max-microvolt = <2800000>;
+                                        regulator-mem-idle;
+                                };
+
+                                ldo22_reg: ldo22 {
+                                        regulator-compatible = "LDO22";
+                                        regulator-name = "VMEM_VDD_2.8V";
+                                        regulator-min-microvolt = <2800000>;
+                                        regulator-max-microvolt = <2800000>;
+                                        regulator-always-on;
+                                        regulator-mem-off;
+                                };
+
+                                ldo23_reg: ldo23 {
+                                        regulator-compatible = "LDO23";
+                                        regulator-name = "TSP_AVDD_3.3V";
+                                        regulator-min-microvolt = <3300000>;
+                                        regulator-max-microvolt = <3300000>;
+                                        regulator-mem-idle;
+                                };
+
+                                ldo24_reg: ldo24 {
+                                        regulator-compatible = "LDO24";
+                                        regulator-name = "TSP_VDD_1.8V";
+                                        regulator-min-microvolt = <1800000>;
+                                        regulator-max-microvolt = <1800000>;
+                                        regulator-mem-idle;
+                                };
+
+                                ldo25_reg: ldo25 {
+                                        regulator-compatible = "LDO25";
+                                        regulator-name = "LCD_VCC_3.3V";
+                                        regulator-min-microvolt = <2800000>;
+                                        regulator-max-microvolt = <2800000>;
+                                        regulator-mem-idle;
+                                };
+
+                                ldo26_reg: ldo26 {
+                                        regulator-compatible = "LDO26";
+                                        regulator-name = "MOTOR_VCC_3.0V";
+                                        regulator-min-microvolt = <3000000>;
+                                        regulator-max-microvolt = <3000000>;
+                                        regulator-mem-idle;
+                                };
+
+                                buck1_reg: buck1 {
+                                        regulator-compatible = "BUCK1";
+                                        regulator-name = "vdd_mif";
+                                        regulator-min-microvolt = <850000>;
+                                        regulator-max-microvolt = <1100000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                        regulator-mem-off;
+                                };
+
+                                buck2_reg: buck2 {
+                                        regulator-compatible = "BUCK2";
+                                        regulator-name = "vdd_arm";
+                                        regulator-min-microvolt = <850000>;
+                                        regulator-max-microvolt = <1500000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                        regulator-mem-off;
+                                };
+
+                                buck3_reg: buck3 {
+                                        regulator-compatible = "BUCK3";
+                                        regulator-name = "vdd_int";
+                                        regulator-min-microvolt = <850000>;
+                                        regulator-max-microvolt = <1150000>;
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                        regulator-mem-off;
+                                };
+
+                                buck4_reg: buck4 {
+                                        regulator-compatible = "BUCK4";
+                                        regulator-name = "vdd_g3d";
+                                        regulator-min-microvolt = <850000>;
+                                        regulator-max-microvolt = <1150000>;
+                                        regulator-boot-on;
+                                        regulator-mem-off;
+                                };
+
+                                buck5_reg: buck5 {
+                                        regulator-compatible = "BUCK5";
+                                        regulator-name = "VMEM_1.2V_AP";
+                                        regulator-min-microvolt = <1200000>;
+                                        regulator-max-microvolt = <1200000>;
+                                        regulator-always-on;
+                                };
+
+                                buck6_reg: buck6 {
+                                        regulator-compatible = "BUCK6";
+                                        regulator-name = "VCC_SUB_1.35V";
+                                        regulator-min-microvolt = <1350000>;
+                                        regulator-max-microvolt = <1350000>;
+                                        regulator-always-on;
+                                };
+
+                                buck7_reg: buck7 {
+                                        regulator-compatible = "BUCK7";
+                                        regulator-name = "VCC_SUB_2.0V";
+                                        regulator-min-microvolt = <2000000>;
+                                        regulator-max-microvolt = <2000000>;
+                                        regulator-always-on;
+                                };
+
+                                buck8_reg: buck8 {
+                                        regulator-compatible = "BUCK8";
+                                        regulator-name = "VMEM_VDDF_3.0V";
+                                        regulator-min-microvolt = <2850000>;
+                                        regulator-max-microvolt = <2850000>;
+                                        regulator-always-on;
+                                        regulator-mem-off;
+                                };
+
+                                buck9_reg: buck9 {
+                                        regulator-compatible = "BUCK9";
+                                        regulator-name = "CAM_ISP_CORE_1.2V";
+                                        regulator-min-microvolt = <1000000>;
+                                        regulator-max-microvolt = <1200000>;
+                                        regulator-mem-off;
+                                };
+                        };
+                };
+        };
+
+        sdhci@12510000 {
+                bus-width = <8>;
+                non-removable;
+                pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>;
+                pinctrl-names = "default";
+                vmmc-supply = <&vemmc_reg>;
+                status = "okay";
+        };
+
+        serial@13800000 {
+                status = "okay";
+        };
+
+        serial@13810000 {
+                status = "okay";
+        };
+
+        serial@13820000 {
+                status = "okay";
+        };
+
+        serial@13830000 {
+                status = "okay";
+        };
+
+        i2c_ak8975: i2c-gpio-0 {
+                compatible = "i2c-gpio";
+                gpios = <&gpy2 4 0>, <&gpy2 5 0>;
+                i2c-gpio,delay-us = <2>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "okay";
+
+                ak8975@0c {
+                        compatible = "ak,ak8975";
+                        reg = <0x0c>;
+                        gpios = <&gpj0 7 0>;
+                };
+        };
+
+        spi_1: spi@13930000 {
+                pinctrl-names = "default";
+                pinctrl-0 = <&spi1_bus>;
+                status = "okay";
+
+                s5c73m3_spi: s5c73m3 {
+                        compatible = "samsung,s5c73m3";
+                        spi-max-frequency = <50000000>;
+                        reg = <0>;
+                        controller-data {
+                                cs-gpio = <&gpb 5 0>;
+                                samsung,spi-feedback-delay = <2>;
+                        };
+                };
+        };
+
+        camera {
+                pinctrl-0 = <&cam_port_b_clk_active>;
+                pinctrl-names = "default";
+                status = "okay";
+
+                fimc_0: fimc@11800000 {
+                        status = "okay";
+                };
+
+                fimc_1: fimc@11810000 {
+                        status = "okay";
+                };
+
+                fimc_2: fimc@11820000 {
+                        status = "okay";
+                };
+
+                fimc_3: fimc@11830000 {
+                        status = "okay";
+                };
+
+                csis_1: csis@11890000 {
+                        vddcore-supply = <&ldo8_reg>;
+                        vddio-supply = <&ldo10_reg>;
+                        clock-frequency = <160000000>;
+                        status = "okay";
+
+                        /* Camera D (4) MIPI CSI-2 (CSIS1) */
+                        port@4 {
+                                reg = <4>;
+                                csis1_ep: endpoint {
+                                        remote-endpoint = <&is_s5k6a3_ep>;
+                                        data-lanes = <1>;
+                                        samsung,csis-hs-settle = <18>;
+                                        samsung,csis-wclk;
+                                };
+                        };
+                };
+
+                fimc_lite_0: fimc-lite@12390000 {
+                        status = "okay";
+                };
+
+                fimc_lite_1: fimc-lite@123A0000 {
+                        status = "okay";
+                };
+
+                fimc-is@12000000 {
+                        pinctrl-0 = <&fimc_is_uart>;
+                        pinctrl-names = "default";
+                        status = "okay";
+
+                        i2c1_isp: i2c-isp@12140000 {
+                                pinctrl-0 = <&fimc_is_i2c1>;
+                                pinctrl-names = "default";
+
+                                s5k6a3@10 {
+                                        compatible = "samsung,s5k6a3";
+                                        reg = <0x10>;
+                                        svdda-supply = <&cam_io_reg>;
+                                        svddio-supply = <&ldo19_reg>;
+                                        clock-frequency = <24000000>;
+                                        /* CAM_B_CLKOUT */
+                                        clocks = <&clock_cam 1>;
+                                        clock-names = "mclk";
+                                        samsung,camclk-out = <1>;
+                                        gpios = <&gpm1 6 0>;
+
+                                        port {
+                                                is_s5k6a3_ep: endpoint {
+                                                        remote-endpoint = <&csis1_ep>;
+                                                        data-lanes = <1>;
+                                                };
+                                        };
+                                };
+                        };
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
index 704290f7c5c0..99b26df8dbc7 100644
--- a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
@@ -401,13 +401,26 @@
                         samsung,pin-drv = <0>;
                 };
 
-                cam_port_a: cam-port-a {
+                cam_port_a_io: cam-port-a-io {
                         samsung,pins = "gpj0-0", "gpj0-1", "gpj0-2", "gpj0-3",
                                         "gpj0-4", "gpj0-5", "gpj0-6", "gpj0-7",
-                                        "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-3",
-                                        "gpj1-4";
+                                        "gpj1-0", "gpj1-1", "gpj1-2", "gpj1-4";
                         samsung,pin-function = <2>;
-                        samsung,pin-pud = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                cam_port_a_clk_active: cam-port-a-clk-active {
+                        samsung,pins = "gpj1-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                cam_port_a_clk_idle: cam-port-a-clk-idle {
+                        samsung,pins = "gpj1-3";
+                        samsung,pin-function = <0>;
+                        samsung,pin-pud = <1>;
                         samsung,pin-drv = <0>;
                 };
         };
@@ -778,16 +791,29 @@
                         samsung,pin-drv = <3>;
                 };
 
-                cam_port_b: cam-port-b {
+                cam_port_b_io: cam-port-b-io {
                         samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3",
                                         "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7",
-                                        "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1",
-                                        "gpm2-2";
+                                        "gpm1-0", "gpm1-1", "gpm2-0", "gpm2-1";
                         samsung,pin-function = <3>;
                         samsung,pin-pud = <3>;
                         samsung,pin-drv = <0>;
                 };
 
+                cam_port_b_clk_active: cam-port-b-clk-active {
+                        samsung,pins = "gpm2-2";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <3>;
+                };
+
+                cam_port_b_clk_idle: cam-port-b-clk-idle {
+                        samsung,pins = "gpm2-2";
+                        samsung,pin-function = <0>;
+                        samsung,pin-pud = <1>;
+                        samsung,pin-drv = <0>;
+                };
+
                 eint0: ext-int0 {
                         samsung,pins = "gpx0-0";
                         samsung,pin-function = <0xf>;
@@ -822,6 +848,27 @@
                         samsung,pin-pud = <0>;
                         samsung,pin-drv = <0>;
                 };
+
+                fimc_is_i2c0: fimc-is-i2c0 {
+                        samsung,pins = "gpm4-0", "gpm4-1";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                fimc_is_i2c1: fimc-is-i2c1 {
+                        samsung,pins = "gpm4-2", "gpm4-3";
+                        samsung,pin-function = <2>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
+
+                fimc_is_uart: fimc-is-uart {
+                        samsung,pins = "gpm3-5", "gpm3-7";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samsung,pin-drv = <0>;
+                };
         };
 
         pinctrl@03860000 {
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index 01da194ba329..954628c7f167 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -26,6 +26,13 @@
                 pinctrl1 = &pinctrl_1;
                 pinctrl2 = &pinctrl_2;
                 pinctrl3 = &pinctrl_3;
+                fimc-lite0 = &fimc_lite_0;
+                fimc-lite1 = &fimc_lite_1;
+        };
+
+        pd_isp: isp-power-domain@10023CA0 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10023CA0 0x20>;
         };
 
         clock: clock-controller@0x10030000 {
@@ -73,4 +80,100 @@
                 clock-names = "sclk_fimg2d", "fimg2d";
                 status = "disabled";
         };
+
+        camera {
+                clocks = <&clock 132>, <&clock 133>, <&clock 351>, <&clock 352>;
+                clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
+
+                fimc_0: fimc@11800000 {
+                        compatible = "samsung,exynos4212-fimc";
+                        samsung,pix-limits = <4224 8192 1920 4224>;
+                        samsung,mainscaler-ext;
+                        samsung,isp-wb;
+                        samsung,cam-if;
+                };
+
+                fimc_1: fimc@11810000 {
+                        compatible = "samsung,exynos4212-fimc";
+                        samsung,pix-limits = <4224 8192 1920 4224>;
+                        samsung,mainscaler-ext;
+                        samsung,isp-wb;
+                        samsung,cam-if;
+                };
+
+                fimc_2: fimc@11820000 {
+                        compatible = "samsung,exynos4212-fimc";
+                        samsung,pix-limits = <4224 8192 1920 4224>;
+                        samsung,mainscaler-ext;
+                        samsung,isp-wb;
+                        samsung,lcd-wb;
+                        samsung,cam-if;
+                };
+
+                fimc_3: fimc@11830000 {
+                        compatible = "samsung,exynos4212-fimc";
+                        samsung,pix-limits = <1920 8192 1366 1920>;
+                        samsung,rotators = <0>;
+                        samsung,mainscaler-ext;
+                        samsung,isp-wb;
+                        samsung,lcd-wb;
+                };
+
+                fimc_lite_0: fimc-lite@12390000 {
+                        compatible = "samsung,exynos4212-fimc-lite";
+                        reg = <0x12390000 0x1000>;
+                        interrupts = <0 105 0>;
+                        samsung,power-domain = <&pd_isp>;
+                        clocks = <&clock 353>;
+                        clock-names = "flite";
+                        status = "disabled";
+                };
+
+                fimc_lite_1: fimc-lite@123A0000 {
+                        compatible = "samsung,exynos4212-fimc-lite";
+                        reg = <0x123A0000 0x1000>;
+                        interrupts = <0 106 0>;
+                        samsung,power-domain = <&pd_isp>;
+                        clocks = <&clock 354>;
+                        clock-names = "flite";
+                        status = "disabled";
+                };
+
+                fimc_is: fimc-is@12000000 {
+                        compatible = "samsung,exynos4212-fimc-is", "simple-bus";
+                        reg = <0x12000000 0x260000>;
+                        interrupts = <0 90 0>, <0 95 0>;
+                        samsung,power-domain = <&pd_isp>;
+                        clocks = <&clock 353>, <&clock 354>, <&clock 355>,
+                                <&clock 356>, <&clock 17>, <&clock 357>,
+                                <&clock 358>, <&clock 359>, <&clock 360>,
+                                <&clock 450>,<&clock 451>, <&clock 452>,
+                                <&clock 453>, <&clock 176>, <&clock 13>,
+                                <&clock 454>, <&clock 395>, <&clock 455>;
+                        clock-names = "lite0", "lite1", "ppmuispx",
+                                      "ppmuispmx", "mpll", "isp",
+                                      "drc", "fd", "mcuisp",
+                                      "ispdiv0", "ispdiv1", "mcuispdiv0",
+                                      "mcuispdiv1", "uart", "aclk200",
+                                      "div_aclk200", "aclk400mcuisp",
+                                      "div_aclk400mcuisp";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges;
+                        status = "disabled";
+
+                        pmu {
+                                reg = <0x10020000 0x3000>;
+                        };
+
+                        i2c1_isp: i2c-isp@12140000 {
+                                compatible = "samsung,exynos4212-i2c-isp";
+                                reg = <0x12140000 0x100>;
+                                clocks = <&clock 370>;
+                                clock-names = "i2c_isp";
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                        };
+                };
+        };
 };
diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index f65e124c04a6..074739d39e2d 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -95,7 +95,7 @@
                 interrupts = <0 54 0>;
         };
 
-        rtc {
+        rtc@101E0000 {
                 compatible = "samsung,s3c6410-rtc";
                 reg = <0x101E0000 0x100>;
                 interrupts = <0 43 0>, <0 44 0>;
@@ -108,4 +108,23 @@
                 interrupts = <0 42 0>;
                 status = "disabled";
         };
+
+        fimd@14400000 {
+                compatible = "samsung,exynos5250-fimd";
+                interrupt-parent = <&combiner>;
+                reg = <0x14400000 0x40000>;
+                interrupt-names = "fifo", "vsync", "lcd_sys";
+                interrupts = <18 4>, <18 5>, <18 6>;
+                status = "disabled";
+        };
+
+        dp-controller@145B0000 {
+                compatible = "samsung,exynos5-dp";
+                reg = <0x145B0000 0x1000>;
+                interrupts = <10 3>;
+                interrupt-parent = <&combiner>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                status = "disabled";
+        };
 };
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index abc7272c7afd..cee55fa33731 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -11,6 +11,7 @@
 
 /dts-v1/;
 #include "exynos5250.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
 
 / {
         model = "Insignal Arndale evaluation board based on EXYNOS5250";
@@ -37,6 +38,28 @@
                 s5m8767_pmic@66 {
                         compatible = "samsung,s5m8767-pmic";
                         reg = <0x66>;
+                        interrupt-parent = <&gpx3>;
+                        interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+
+                        vinb1-supply = <&main_dc_reg>;
+                        vinb2-supply = <&main_dc_reg>;
+                        vinb3-supply = <&main_dc_reg>;
+                        vinb4-supply = <&main_dc_reg>;
+                        vinb5-supply = <&main_dc_reg>;
+                        vinb6-supply = <&main_dc_reg>;
+                        vinb7-supply = <&main_dc_reg>;
+                        vinb8-supply = <&main_dc_reg>;
+                        vinb9-supply = <&main_dc_reg>;
+
+                        vinl1-supply = <&buck7_reg>;
+                        vinl2-supply = <&buck7_reg>;
+                        vinl3-supply = <&buck7_reg>;
+                        vinl4-supply = <&main_dc_reg>;
+                        vinl5-supply = <&main_dc_reg>;
+                        vinl6-supply = <&main_dc_reg>;
+                        vinl7-supply = <&main_dc_reg>;
+                        vinl8-supply = <&buck8_reg>;
+                        vinl9-supply = <&buck8_reg>;
 
                         s5m8767,pmic-buck2-dvs-voltage = <1300000>;
                         s5m8767,pmic-buck3-dvs-voltage = <1100000>;
@@ -276,6 +299,16 @@
                                         op_mode = <1>;
                                 };
 
+                                buck7_reg: BUCK7 {
+                                        regulator-name = "PVDD_BUCK7";
+                                        regulator-always-on;
+                                };
+
+                                buck8_reg: BUCK8 {
+                                        regulator-name = "PVDD_BUCK8";
+                                        regulator-always-on;
+                                };
+
                                 buck9_reg: BUCK9 {
                                         regulator-name = "VDD_33_OFF_EXT1";
                                         regulator-min-microvolt = <750000>;
@@ -295,7 +328,22 @@
         };
 
         i2c@12C90000 {
-                status = "disabled";
+                wm1811a@1a {
+                        compatible = "wlf,wm1811";
+                        reg = <0x1a>;
+
+                        AVDD2-supply = <&main_dc_reg>;
+                        CPVDD-supply = <&main_dc_reg>;
+                        DBVDD1-supply = <&main_dc_reg>;
+                        DBVDD2-supply = <&main_dc_reg>;
+                        DBVDD3-supply = <&main_dc_reg>;
+                        LDO1VDD-supply = <&main_dc_reg>;
+                        SPKVDD1-supply = <&main_dc_reg>;
+                        SPKVDD2-supply = <&main_dc_reg>;
+
+                        wlf,ldo1ena = <&gpb0 0 0>;
+                        wlf,ldo2ena = <&gpb0 1 0>;
+                };
         };
 
         i2c@12CA0000 {
@@ -429,18 +477,29 @@
                 vdd-supply = <&ldo8_reg>;
         };
 
-        mmc_reg: voltage-regulator {
-                compatible = "regulator-fixed";
-                regulator-name = "VDD_33ON_2.8V";
-                regulator-min-microvolt = <2800000>;
-                regulator-max-microvolt = <2800000>;
-                gpio = <&gpx1 1 1>;
-                enable-active-high;
-        };
+        regulators {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                main_dc_reg: fixedregulator@1 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "MAIN_DC";
+                };
 
-        reg_hdmi_en: fixedregulator@0 {
-                compatible = "regulator-fixed";
-                regulator-name = "hdmi-en";
+                mmc_reg: voltage-regulator {
+                        compatible = "regulator-fixed";
+                        regulator-name = "VDD_33ON_2.8V";
+                        regulator-min-microvolt = <2800000>;
+                        regulator-max-microvolt = <2800000>;
+                        gpio = <&gpx1 1 1>;
+                        enable-active-high;
+                };
+
+                reg_hdmi_en: fixedregulator@0 {
+                        compatible = "regulator-fixed";
+                        regulator-name = "hdmi-en";
+                };
         };
 
         fixed-rate-clocks {
@@ -450,16 +509,18 @@
                 };
         };
 
-        dp-controller {
+        dp-controller@145B0000 {
                 samsung,color-space = <0>;
                 samsung,dynamic-range = <0>;
                 samsung,ycbcr-coeff = <0>;
                 samsung,color-depth = <1>;
                 samsung,link-rate = <0x0a>;
                 samsung,lane-count = <4>;
+                status = "okay";
         };
 
         fimd: fimd@14400000 {
+                status = "okay";
                 display-timings {
                         native-mode = <&timing0>;
                         timing0: timing@0 {
@@ -477,7 +538,21 @@
                 };
         };
 
-        rtc {
-                status = "okay";
+        usb_hub_bus {
+                compatible = "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                // SMSC USB3503 connected in hardware only mode as a PHY
+                usb_hub: usb_hub {
+                        compatible = "smsc,usb3503a";
+
+                        reset-gpios = <&gpx3 5 1>;
+                        connect-gpios = <&gpd1 7 1>;
+                };
+        };
+
+        usb@12110000 {
+                usb-phy = <&usb2_phy>;
         };
 };
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 49f18c24a576..2538b329f2ce 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -250,7 +250,7 @@
                 samsung,vbus-gpio = <&gpx2 6 0>;
         };
 
-        dp-controller {
+        dp-controller@145B0000 {
                 samsung,color-space = <0>;
                 samsung,dynamic-range = <0>;
                 samsung,ycbcr-coeff = <0>;
@@ -260,21 +260,25 @@
 
                 pinctrl-names = "default";
                 pinctrl-0 = <&dp_hpd>;
+                status = "okay";
         };
 
-        display-timings {
-                native-mode = <&timing0>;
-                timing0: timing@0 {
-                        /* 1280x800 */
-                        clock-frequency = <50000>;
-                        hactive = <1280>;
-                        vactive = <800>;
-                        hfront-porch = <4>;
-                        hback-porch = <4>;
-                        hsync-len = <4>;
-                        vback-porch = <4>;
-                        vfront-porch = <4>;
-                        vsync-len = <4>;
+        fimd@14400000 {
+                status = "okay";
+                display-timings {
+                        native-mode = <&timing0>;
+                        timing0: timing@0 {
+                                /* 1280x800 */
+                                clock-frequency = <50000>;
+                                hactive = <1280>;
+                                vactive = <800>;
+                                hfront-porch = <4>;
+                                hback-porch = <4>;
+                                hsync-len = <4>;
+                                vback-porch = <4>;
+                                vfront-porch = <4>;
+                                vsync-len = <4>;
+                        };
                 };
         };
 
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts
index e79331dba12d..fd711e245e8d 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -171,10 +171,6 @@
                 };
         };
 
-        rtc {
-                status = "okay";
-        };
-
         /*
          * On Snow we've got SIP WiFi and so can keep drive strengths low to
          * reduce EMI.
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index ef57277fc38f..b2841e6ed6a5 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -163,16 +163,27 @@
                 clock-names = "watchdog";
         };
 
+        g2d@10850000 {
+                compatible = "samsung,exynos5250-g2d";
+                reg = <0x10850000 0x1000>;
+                interrupts = <0 91 0>;
+                clocks = <&clock 345>;
+                clock-names = "fimg2d";
+        };
+
         codec@11000000 {
                 compatible = "samsung,mfc-v6";
                 reg = <0x11000000 0x10000>;
                 interrupts = <0 96 0>;
                 samsung,power-domain = <&pd_mfc>;
+                clocks = <&clock 266>;
+                clock-names = "mfc";
         };
 
-        rtc {
+        rtc@101E0000 {
                 clocks = <&clock 337>;
                 clock-names = "rtc";
+                status = "okay";
         };
 
         tmu@10060000 {
@@ -614,29 +625,32 @@
                 interrupts = <0 94 0>;
         };
 
-        dp-controller {
-                compatible = "samsung,exynos5-dp";
-                reg = <0x145b0000 0x1000>;
-                interrupts = <10 3>;
-                interrupt-parent = <&combiner>;
+        dp_phy: video-phy@10040720 {
+                compatible = "samsung,exynos5250-dp-video-phy";
+                reg = <0x10040720 4>;
+                #phy-cells = <0>;
+        };
+
+        dp-controller@145B0000 {
                 clocks = <&clock 342>;
                 clock-names = "dp";
-                #address-cells = <1>;
-                #size-cells = <0>;
-
-                dptx-phy {
-                        reg = <0x10040720>;
-                        samsung,enable-mask = <1>;
-                };
+                phys = <&dp_phy>;
+                phy-names = "dp";
         };
 
-        fimd {
-                compatible = "samsung,exynos5250-fimd";
-                interrupt-parent = <&combiner>;
-                reg = <0x14400000 0x40000>;
-                interrupt-names = "fifo", "vsync", "lcd_sys";
-                interrupts = <18 4>, <18 5>, <18 6>;
+        fimd@14400000 {
                 clocks = <&clock 133>, <&clock 339>;
                 clock-names = "sclk_fimd", "fimd";
         };
+
+        adc: adc@12D10000 {
+                compatible = "samsung,exynos-adc-v1";
+                reg = <0x12D10000 0x100>, <0x10040718 0x4>;
+                interrupts = <0 106 0>;
+                clocks = <&clock 303>;
+                clock-names = "adc";
+                #io-channel-cells = <1>;
+                io-channel-ranges;
+                status = "disabled";
+        };
 };
diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
index 5848c425ae4d..e695aba5f73c 100644
--- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
@@ -59,6 +59,13 @@
                         interrupt-controller;
                         #interrupt-cells = <2>;
                 };
+
+                dp_hpd: dp_hpd {
+                        samsung,pins = "gpx0-7";
+                        samsung,pin-function = <3>;
+                        samsung,pin-pud = <0>;
+                        samaung,pin-drv = <0>;
+                };
         };
 
         pinctrl@13410000 {
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index 08607df6a180..bafba25ba7c2 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -30,4 +30,35 @@
                         clock-frequency = <24000000>;
                 };
         };
+
+        dp-controller@145B0000 {
+                pinctrl-names = "default";
+                pinctrl-0 = <&dp_hpd>;
+                samsung,color-space = <0>;
+                samsung,dynamic-range = <0>;
+                samsung,ycbcr-coeff = <0>;
+                samsung,color-depth = <1>;
+                samsung,link-rate = <0x0a>;
+                samsung,lane-count = <4>;
+                status = "okay";
+        };
+
+        fimd@14400000 {
+                status = "okay";
+                display-timings {
+                        native-mode = <&timing0>;
+                        timing0: timing@0 {
+                                clock-frequency = <50000>;
+                                hactive = <2560>;
+                                vactive = <1600>;
+                                hfront-porch = <48>;
+                                hback-porch = <80>;
+                                hsync-len = <32>;
+                                vback-porch = <16>;
+                                vfront-porch = <8>;
+                                vsync-len = <6>;
+                        };
+                };
+        };
+
 };
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 8c54c4b74f0e..0646fa7dc5df 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -14,7 +14,10 @@
  */
 
 #include "exynos5.dtsi"
-/include/ "exynos5420-pinctrl.dtsi"
+#include "exynos5420-pinctrl.dtsi"
+
+#include <dt-bindings/clk/exynos-audss-clk.h>
+
 / {
         compatible = "samsung,exynos5420";
 
@@ -65,6 +68,22 @@
                 #clock-cells = <1>;
         };
 
+        clock_audss: audss-clock-controller@3810000 {
+                compatible = "samsung,exynos5420-audss-clock";
+                reg = <0x03810000 0x0C>;
+                #clock-cells = <1>;
+                clocks = <&clock 148>;
+                clock-names = "sclk_audio";
+        };
+
+        codec@11000000 {
+                compatible = "samsung,mfc-v7";
+                reg = <0x11000000 0x10000>;
+                interrupts = <0 96 0>;
+                clocks = <&clock 401>;
+                clock-names = "mfc";
+        };
+
         mct@101C0000 {
                 compatible = "samsung,exynos4210-mct";
                 reg = <0x101C0000 0x800>;
@@ -90,6 +109,41 @@
                 };
         };
 
+        gsc_pd: power-domain@10044000 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10044000 0x20>;
+        };
+
+        isp_pd: power-domain@10044020 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10044020 0x20>;
+        };
+
+        mfc_pd: power-domain@10044060 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10044060 0x20>;
+        };
+
+        disp_pd: power-domain@100440C0 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x100440C0 0x20>;
+        };
+
+        mau_pd: power-domain@100440E0 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x100440E0 0x20>;
+        };
+
+        g2d_pd: power-domain@10044100 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10044100 0x20>;
+        };
+
+        msc_pd: power-domain@10044120 {
+                compatible = "samsung,exynos4210-pd";
+                reg = <0x10044120 0x20>;
+        };
+
         pinctrl_0: pinctrl@13400000 {
                 compatible = "samsung,exynos5420-pinctrl";
                 reg = <0x13400000 0x1000>;
@@ -126,6 +180,12 @@
                 interrupts = <0 47 0>;
         };
 
+        rtc@101E0000 {
+                clocks = <&clock 317>;
+                clock-names = "rtc";
+                status = "okay";
+        };
+
         serial@12C00000 {
                 clocks = <&clock 257>, <&clock 128>;
                 clock-names = "uart", "clk_uart_baud0";
@@ -145,4 +205,34 @@
                 clocks = <&clock 260>, <&clock 131>;
                 clock-names = "uart", "clk_uart_baud0";
         };
+
+        dp_phy: video-phy@10040728 {
+                compatible = "samsung,exynos5250-dp-video-phy";
+                reg = <0x10040728 4>;
+                #phy-cells = <0>;
+        };
+
+        dp-controller@145B0000 {
+                clocks = <&clock 412>;
+                clock-names = "dp";
+                phys = <&dp_phy>;
+                phy-names = "dp";
+        };
+
+        fimd@14400000 {
+                samsung,power-domain = <&disp_pd>;
+                clocks = <&clock 147>, <&clock 421>;
+                clock-names = "sclk_fimd", "fimd";
+        };
+
+        adc: adc@12D10000 {
+                compatible = "samsung,exynos-adc-v2";
+                reg = <0x12D10000 0x100>, <0x10040720 0x4>;
+                interrupts = <0 106 0>;
+                clocks = <&clock 270>;
+                clock-names = "adc";
+                #io-channel-cells = <1>;
+                io-channel-ranges;
+                status = "disabled";
+        };
 };
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index ff7f5d855845..606da5f39269 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -18,6 +18,9 @@
 
         aliases {
                 spi0 = &spi_0;
+                tmuctrl0 = &tmuctrl_0;
+                tmuctrl1 = &tmuctrl_1;
+                tmuctrl2 = &tmuctrl_2;
         };
 
         clock: clock-controller@0x160000 {
@@ -207,6 +210,30 @@
                 clock-names = "rtc";
         };
 
+        tmuctrl_0: tmuctrl@160118 {
+                compatible = "samsung,exynos5440-tmu";
+                reg = <0x160118 0x230>, <0x160368 0x10>;
+                interrupts = <0 58 0>;
+                clocks = <&clock 21>;
+                clock-names = "tmu_apbif";
+        };
+
+        tmuctrl_1: tmuctrl@16011C {
+                compatible = "samsung,exynos5440-tmu";
+                reg = <0x16011C 0x230>, <0x160368 0x10>;
+                interrupts = <0 58 0>;
+                clocks = <&clock 21>;
+                clock-names = "tmu_apbif";
+        };
+
+        tmuctrl_2: tmuctrl@160120 {
+                compatible = "samsung,exynos5440-tmu";
+                reg = <0x160120 0x230>, <0x160368 0x10>;
+                interrupts = <0 58 0>;
+                clocks = <&clock 21>;
+                clock-names = "tmu_apbif";
+        };
+
         sata@210000 {
                 compatible = "snps,exynos5440-ahci";
                 reg = <0x210000 0x10000>;
diff --git a/arch/arm/boot/dts/imx28-apx4devkit.dts b/arch/arm/boot/dts/imx28-apx4devkit.dts
index 43bf3c796cba..0e7fed47bd8d 100644
--- a/arch/arm/boot/dts/imx28-apx4devkit.dts
+++ b/arch/arm/boot/dts/imx28-apx4devkit.dts
@@ -147,7 +147,7 @@
                                         reg = <0x0a>;
                                         VDDA-supply = <&reg_3p3v>;
                                         VDDIO-supply = <&reg_3p3v>;
-
+                                        clocks = <&saif0>;
                                 };
 
                                 pcf8563: rtc@51 {
diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts
index 1f0d38d7b16f..e035f4664b97 100644
--- a/arch/arm/boot/dts/imx28-evk.dts
+++ b/arch/arm/boot/dts/imx28-evk.dts
@@ -195,7 +195,7 @@
                                         reg = <0x0a>;
                                         VDDA-supply = <&reg_3p3v>;
                                         VDDIO-supply = <&reg_3p3v>;
-
+                                        clocks = <&saif0>;
                                 };
 
                                 at24@51 {
diff --git a/arch/arm/boot/dts/imx28-m28evk.dts b/arch/arm/boot/dts/imx28-m28evk.dts
index 880df2f13be8..44d9da57736e 100644
--- a/arch/arm/boot/dts/imx28-m28evk.dts
+++ b/arch/arm/boot/dts/imx28-m28evk.dts
@@ -184,7 +184,7 @@
                                         reg = <0x0a>;
                                         VDDA-supply = <&reg_3p3v>;
                                         VDDIO-supply = <&reg_3p3v>;
-
+                                        clocks = <&saif0>;
                                 };
 
                                 eeprom: eeprom@51 {
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 6a8acb01b1d3..9524a0571281 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -837,6 +837,7 @@
                                 compatible = "fsl,imx28-saif";
                                 reg = <0x80042000 0x2000>;
                                 interrupts = <59 80>;
+                                #clock-cells = <0>;
                                 clocks = <&clks 53>;
                                 dmas = <&dma_apbx 4>;
                                 dma-names = "rx-tx";
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index 6dd9486c755b..ad3471ca17c7 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -61,6 +61,16 @@
                 mux-int-port = <2>;
                 mux-ext-port = <3>;
         };
+
+        clocks {
+                clk_26M: codec_clock {
+                        compatible = "fixed-clock";
+                        reg=<0>;
+                        #clock-cells = <0>;
+                        clock-frequency = <26000000>;
+                        gpios = <&gpio4 26 1>;
+                };
+        };
 };
 
 &esdhc1 {
@@ -229,6 +239,7 @@
                                 MX51_PAD_EIM_A27__GPIO2_21   0x5
                                 MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
                                 MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
+                                MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
                         >;
                 };
         };
@@ -255,7 +266,7 @@
         sgtl5000: codec@0a {
                 compatible = "fsl,sgtl5000";
                 reg = <0x0a>;
-                clock-frequency = <26000000>;
+                clocks = <&clk_26M>;
                 VDDA-supply = <&vdig_reg>;
                 VDDIO-supply = <&vvideo_reg>;
         };
diff --git a/arch/arm/boot/dts/imx53-mba53.dts b/arch/arm/boot/dts/imx53-mba53.dts
index aaa33bc99f78..a63090267941 100644
--- a/arch/arm/boot/dts/imx53-mba53.dts
+++ b/arch/arm/boot/dts/imx53-mba53.dts
@@ -27,7 +27,7 @@
 
         backlight {
                 compatible = "pwm-backlight";
-                pwms = <&pwm2 0 50000 0 0>;
+                pwms = <&pwm2 0 50000>;
                 brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>;
                 default-brightness-level = <10>;
                 enable-gpios = <&gpio7 7 0>;
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 3895fbba8fce..569aa9f2c4ed 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -725,15 +725,15 @@
                                 uart1 {
                                         pinctrl_uart1_1: uart1grp-1 {
                                                 fsl,pins = <
-                                                        MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1c5
-                                                        MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1c5
+                                                        MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4
+                                                        MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1e4
                                                 >;
                                         };
 
                                         pinctrl_uart1_2: uart1grp-2 {
                                                 fsl,pins = <
-                                                        MX53_PAD_PATA_DIOW__UART1_TXD_MUX  0x1c5
-                                                        MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1c5
+                                                        MX53_PAD_PATA_DIOW__UART1_TXD_MUX  0x1e4
+                                                        MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
                                                 >;
                                         };
 
@@ -748,8 +748,8 @@
                                 uart2 {
                                         pinctrl_uart2_1: uart2grp-1 {
                                                 fsl,pins = <
-                                                        MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1c5
-                                                        MX53_PAD_PATA_DMARQ__UART2_TXD_MUX     0x1c5
+                                                        MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
+                                                        MX53_PAD_PATA_DMARQ__UART2_TXD_MUX     0x1e4
                                                 >;
                                         };
 
@@ -766,17 +766,17 @@
                                 uart3 {
                                         pinctrl_uart3_1: uart3grp-1 {
                                                 fsl,pins = <
-                                                        MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1c5
-                                                        MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1c5
-                                                        MX53_PAD_PATA_DA_1__UART3_CTS     0x1c5
-                                                        MX53_PAD_PATA_DA_2__UART3_RTS     0x1c5
+                                                        MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
+                                                        MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
+                                                        MX53_PAD_PATA_DA_1__UART3_CTS     0x1e4
+                                                        MX53_PAD_PATA_DA_2__UART3_RTS     0x1e4
                                                 >;
                                         };
 
                                         pinctrl_uart3_2: uart3grp-2 {
                                                 fsl,pins = <
-                                                        MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1c5
-                                                        MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1c5
+                                                        MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
+                                                        MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
                                                 >;
                                         };
 
@@ -785,8 +785,8 @@
                                 uart4 {
                                         pinctrl_uart4_1: uart4grp-1 {
                                                 fsl,pins = <
-                                                        MX53_PAD_KEY_COL0__UART4_TXD_MUX 0x1c5
-                                                        MX53_PAD_KEY_ROW0__UART4_RXD_MUX 0x1c5
+                                                        MX53_PAD_KEY_COL0__UART4_TXD_MUX 0x1e4
+                                                        MX53_PAD_KEY_ROW0__UART4_RXD_MUX 0x1e4
                                                 >;
                                         };
                                 };
@@ -794,8 +794,8 @@
                                 uart5 {
                                         pinctrl_uart5_1: uart5grp-1 {
                                                 fsl,pins = <
-                                                        MX53_PAD_KEY_COL1__UART5_TXD_MUX 0x1c5
-                                                        MX53_PAD_KEY_ROW1__UART5_RXD_MUX 0x1c5
+                                                        MX53_PAD_KEY_COL1__UART5_TXD_MUX 0x1e4
+                                                        MX53_PAD_KEY_ROW1__UART5_RXD_MUX 0x1e4
                                                 >;
                                         };
                                 };
diff --git a/arch/arm/boot/dts/msm8960-cdp.dts b/arch/arm/boot/dts/msm8960-cdp.dts
index db2060c46540..9c1167b0459b 100644
--- a/arch/arm/boot/dts/msm8960-cdp.dts
+++ b/arch/arm/boot/dts/msm8960-cdp.dts
@@ -26,7 +26,7 @@
                 cpu-offset = <0x80000>;
         };
 
-        msmgpio: gpio@fd510000 {
+        msmgpio: gpio@800000 {
                 compatible = "qcom,msm-gpio";
                 gpio-controller;
                 #gpio-cells = <2>;
@@ -34,7 +34,7 @@
                 interrupts = <0 32 0x4>;
                 interrupt-controller;
                 #interrupt-cells = <2>;
-                reg = <0xfd510000 0x4000>;
+                reg = <0x800000 0x4000>;
         };
 
         serial@16440000 {
diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
index 08b72678abff..65d7b601651c 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
+++ b/arch/arm/boot/dts/omap5-uevm.dts
@@ -235,7 +235,7 @@
 };
 
 &mmc1 {
-        vmmc-supply = <&vmmcsd_fixed>;
+        vmmc-supply = <&ldo9_reg>;
         bus-width = <4>;
 };
 
@@ -282,6 +282,7 @@
 
                         regulators {
                                 smps123_reg: smps123 {
+                                        /* VDD_OPP_MPU */
                                         regulator-name = "smps123";
                                         regulator-min-microvolt = < 600000>;
                                         regulator-max-microvolt = <1500000>;
@@ -290,6 +291,7 @@
                                 };
 
                                 smps45_reg: smps45 {
+                                        /* VDD_OPP_MM */
                                         regulator-name = "smps45";
                                         regulator-min-microvolt = < 600000>;
                                         regulator-max-microvolt = <1310000>;
@@ -298,6 +300,7 @@
                                 };
 
                                 smps6_reg: smps6 {
+                                        /* VDD_DDR3 - over VDD_SMPS6 */
                                         regulator-name = "smps6";
                                         regulator-min-microvolt = <1200000>;
                                         regulator-max-microvolt = <1200000>;
@@ -306,6 +309,7 @@
                                 };
 
                                 smps7_reg: smps7 {
+                                        /* VDDS_1v8_OMAP over VDDS_1v8_MAIN */
                                         regulator-name = "smps7";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
@@ -314,6 +318,7 @@
                                 };
 
                                 smps8_reg: smps8 {
+                                        /* VDD_OPP_CORE */
                                         regulator-name = "smps8";
                                         regulator-min-microvolt = < 600000>;
                                         regulator-max-microvolt = <1310000>;
@@ -322,15 +327,15 @@
                                 };
 
                                 smps9_reg: smps9 {
+                                        /* VDDA_2v1_AUD over VDD_2v1 */
                                         regulator-name = "smps9";
                                         regulator-min-microvolt = <2100000>;
                                         regulator-max-microvolt = <2100000>;
-                                        regulator-always-on;
-                                        regulator-boot-on;
                                         ti,smps-range = <0x80>;
                                 };
 
                                 smps10_reg: smps10 {
+                                        /* VBUS_5V_OTG */
                                         regulator-name = "smps10";
                                         regulator-min-microvolt = <5000000>;
                                         regulator-max-microvolt = <5000000>;
@@ -339,38 +344,40 @@
                                 };
 
                                 ldo1_reg: ldo1 {
+                                        /* VDDAPHY_CAM: vdda_csiport */
                                         regulator-name = "ldo1";
-                                        regulator-min-microvolt = <2800000>;
-                                        regulator-max-microvolt = <2800000>;
-                                        regulator-always-on;
-                                        regulator-boot-on;
+                                        regulator-min-microvolt = <1500000>;
+                                        regulator-max-microvolt = <1800000>;
                                 };
 
                                 ldo2_reg: ldo2 {
+                                        /* VCC_2V8_DISP: Does not go anywhere */
                                         regulator-name = "ldo2";
-                                        regulator-min-microvolt = <2900000>;
-                                        regulator-max-microvolt = <2900000>;
-                                        regulator-always-on;
-                                        regulator-boot-on;
+                                        regulator-min-microvolt = <2800000>;
+                                        regulator-max-microvolt = <2800000>;
+                                        /* Unused */
+                                        status = "disabled";
                                 };
 
                                 ldo3_reg: ldo3 {
+                                        /* VDDAPHY_MDM: vdda_lli */
                                         regulator-name = "ldo3";
-                                        regulator-min-microvolt = <3000000>;
-                                        regulator-max-microvolt = <3000000>;
-                                        regulator-always-on;
+                                        regulator-min-microvolt = <1500000>;
+                                        regulator-max-microvolt = <1500000>;
                                         regulator-boot-on;
+                                        /* Only if Modem is used */
+                                        status = "disabled";
                                 };
 
                                 ldo4_reg: ldo4 {
+                                        /* VDDAPHY_DISP: vdda_dsiport/hdmi */
                                         regulator-name = "ldo4";
-                                        regulator-min-microvolt = <2200000>;
-                                        regulator-max-microvolt = <2200000>;
-                                        regulator-always-on;
-                                        regulator-boot-on;
+                                        regulator-min-microvolt = <1500000>;
+                                        regulator-max-microvolt = <1800000>;
                                 };
 
                                 ldo5_reg: ldo5 {
+                                        /* VDDA_1V8_PHY: usb/sata/hdmi.. */
                                         regulator-name = "ldo5";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
@@ -379,38 +386,43 @@
                                 };
 
                                 ldo6_reg: ldo6 {
+                                        /* VDDS_1V2_WKUP: hsic/ldo_emu_wkup */
                                         regulator-name = "ldo6";
-                                        regulator-min-microvolt = <1500000>;
-                                        regulator-max-microvolt = <1500000>;
+                                        regulator-min-microvolt = <1200000>;
+                                        regulator-max-microvolt = <1200000>;
                                         regulator-always-on;
                                         regulator-boot-on;
                                 };
 
                                 ldo7_reg: ldo7 {
+                                        /* VDD_VPP: vpp1 */
                                         regulator-name = "ldo7";
-                                        regulator-min-microvolt = <1500000>;
-                                        regulator-max-microvolt = <1500000>;
-                                        regulator-always-on;
-                                        regulator-boot-on;
+                                        regulator-min-microvolt = <2000000>;
+                                        regulator-max-microvolt = <2000000>;
+                                        /* Only for efuse reprograming! */
+                                        status = "disabled";
                                 };
 
                                 ldo8_reg: ldo8 {
+                                        /* VDD_3v0: Does not go anywhere */
                                         regulator-name = "ldo8";
-                                        regulator-min-microvolt = <1500000>;
-                                        regulator-max-microvolt = <1500000>;
-                                        regulator-always-on;
+                                        regulator-min-microvolt = <3000000>;
+                                        regulator-max-microvolt = <3000000>;
                                         regulator-boot-on;
+                                        /* Unused */
+                                        status = "disabled";
                                 };
 
                                 ldo9_reg: ldo9 {
+                                        /* VCC_DV_SDIO: vdds_sdcard */
                                         regulator-name = "ldo9";
                                         regulator-min-microvolt = <1800000>;
-                                        regulator-max-microvolt = <3300000>;
-                                        regulator-always-on;
+                                        regulator-max-microvolt = <3000000>;
                                         regulator-boot-on;
                                 };
 
                                 ldoln_reg: ldoln {
+                                        /* VDDA_1v8_REF: vdds_osc/mm_l4per.. */
                                         regulator-name = "ldoln";
                                         regulator-min-microvolt = <1800000>;
                                         regulator-max-microvolt = <1800000>;
@@ -419,12 +431,20 @@
                                 };
 
                                 ldousb_reg: ldousb {
+                                        /* VDDA_3V_USB: VDDA_USBHS33 */
                                         regulator-name = "ldousb";
                                         regulator-min-microvolt = <3250000>;
                                         regulator-max-microvolt = <3250000>;
                                         regulator-always-on;
                                         regulator-boot-on;
                                 };
+
+                                regen3_reg: regen3 {
+                                        /* REGEN3 controls LDO9 supply to card */
+                                        regulator-name = "regen3";
+                                        regulator-always-on;
+                                        regulator-boot-on;
+                                };
                         };
                 };
         };
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi
index 05e9489cf95c..bbeb623fc2c6 100644
--- a/arch/arm/boot/dts/prima2.dtsi
+++ b/arch/arm/boot/dts/prima2.dtsi
@@ -515,16 +515,16 @@
                                                 sirf,function = "pulse_count";
                                         };
                                 };
-                                cko0_rst_pins_a: cko0_rst@0 {
-                                        cko0_rst {
-                                                sirf,pins = "cko0_rstgrp";
-                                                sirf,function = "cko0_rst";
+                                cko0_pins_a: cko0@0 {
+                                        cko0 {
+                                                sirf,pins = "cko0grp";
+                                                sirf,function = "cko0";
                                         };
                                 };
-                                cko1_rst_pins_a: cko1_rst@0 {
-                                        cko1_rst {
-                                                sirf,pins = "cko1_rstgrp";
-                                                sirf,function = "cko1_rst";
+                                cko1_pins_a: cko1@0 {
+                                        cko1 {
+                                                sirf,pins = "cko1grp";
+                                                sirf,function = "cko1";
                                         };
                                 };
                         };
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index a1d5e25a6698..b7f49615120d 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -48,6 +48,11 @@
                 };
         };
 
+        pmu {
+                compatible = "arm,cortex-a5-pmu";
+                interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
+        };
+
         memory {
                 reg = <0x20000000 0x8000000>;
         };
@@ -1029,21 +1034,30 @@
                         compatible = "atmel,at91rm9200-nand";
                         #address-cells = <1>;
                         #size-cells = <1>;
+                        ranges;
                         reg = < 0x60000000 0x01000000   /* EBI CS3 */
                                 0xffffc070 0x00000490   /* SMC PMECC regs */
                                 0xffffc500 0x00000100   /* SMC PMECC Error Location regs */
-                                0x00100000 0x00100000   /* ROM code */
-                                0x70000000 0x10000000   /* NFC Command Registers */
-                                0xffffc000 0x00000070   /* NFC HSMC regs */
-                                0x00200000 0x00100000   /* NFC SRAM banks */
+                                0x00110000 0x00018000   /* ROM code */
                                 >;
                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
                         atmel,nand-addr-offset = <21>;
                         atmel,nand-cmd-offset = <22>;
                         pinctrl-names = "default";
                         pinctrl-0 = <&pinctrl_nand0_ale_cle>;
-                        atmel,pmecc-lookup-table-offset = <0x10000 0x18000>;
+                        atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
                         status = "disabled";
+
+                        nfc@70000000 {
+                                compatible = "atmel,sama5d3-nfc";
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                reg = <
+                                        0x70000000 0x10000000   /* NFC Command Registers */
+                                        0xffffc000 0x00000070   /* NFC HSMC regs */
+                                        0x00200000 0x00100000   /* NFC SRAM banks */
+                                        >;
+                        };
                 };
         };
 };
diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi
index 1f8050813a54..31ed9e3bb649 100644
--- a/arch/arm/boot/dts/sama5d3xcm.dtsi
+++ b/arch/arm/boot/dts/sama5d3xcm.dtsi
@@ -47,8 +47,6 @@
                         atmel,has-pmecc;
                         atmel,pmecc-cap = <4>;
                         atmel,pmecc-sector-size = <512>;
-                        atmel,has-nfc;
-                        atmel,use-nfc-sram;
                         nand-on-flash-bbt;
                         status = "okay";
 
diff --git a/arch/arm/boot/dts/stih416-pinctrl.dtsi b/arch/arm/boot/dts/stih416-pinctrl.dtsi
index 957b21a71b4b..0f246c979262 100644
--- a/arch/arm/boot/dts/stih416-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih416-pinctrl.dtsi
@@ -166,6 +166,15 @@
                                 reg             = <0x9000 0x100>;
                                 st,bank-name    = "PIO31";
                         };
+
+                        serial2-oe {
+                                pinctrl_serial2_oe: serial2-1 {
+                                        st,pins {
+                                                output-enable   = <&PIO11 3 ALT2 OUT>;
+                                        };
+                                };
+                        };
+
                 };
 
                 pin-controller-rear {
@@ -218,7 +227,6 @@
                                         st,pins {
                                                 tx      = <&PIO17 4 ALT2 OUT>;
                                                 rx      = <&PIO17 5 ALT2 IN>;
-                                                output-enable   = <&PIO11 3 ALT2 OUT>;
                                         };
                                 };
                         };
diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi
index 3cecd9689a49..1a0326ea7d07 100644
--- a/arch/arm/boot/dts/stih416.dtsi
+++ b/arch/arm/boot/dts/stih416.dtsi
@@ -79,7 +79,7 @@
                         interrupts      = <0 197 0>;
                         clocks          = <&CLK_S_ICN_REG_0>;
                         pinctrl-names   = "default";
-                        pinctrl-0       = <&pinctrl_serial2>;
+                        pinctrl-0       = <&pinctrl_serial2 &pinctrl_serial2_oe>;
                 };
 
                 /* SBC_UART1 */
diff --git a/arch/arm/boot/dts/stih41x.dtsi b/arch/arm/boot/dts/stih41x.dtsi
index 7321403cab8a..f5b9898d9c6e 100644
--- a/arch/arm/boot/dts/stih41x.dtsi
+++ b/arch/arm/boot/dts/stih41x.dtsi
@@ -6,10 +6,12 @@
                 #address-cells = <1>;
                 #size-cells = <0>;
                 cpu@0 {
+                        device_type = "cpu";
                         compatible = "arm,cortex-a9";
                         reg = <0>;
                 };
                 cpu@1 {
+                        device_type = "cpu";
                         compatible = "arm,cortex-a9";
                         reg = <1>;
                 };
diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
index 2fcb3f2ca160..5592be6f2f7a 100644
--- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
@@ -457,6 +457,7 @@
         };
 
         usb-phy@c5004000 {
+                status = "okay";
                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
                         GPIO_ACTIVE_LOW>;
         };
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index 365760b33a26..40e6fb280333 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -830,6 +830,8 @@
                         regulator-max-microvolt = <5000000>;
                         enable-active-high;
                         gpio = <&gpio 24 0>; /* PD0 */
+                        regulator-always-on;
+                        regulator-boot-on;
                 };
         };
 
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index ed4b901b0227..37c93d3c4812 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -412,6 +412,8 @@
                         regulator-max-microvolt = <5000000>;
                         enable-active-high;
                         gpio = <&gpio 170 0>; /* PV2 */
+                        regulator-always-on;
+                        regulator-boot-on;
                 };
         };
 
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts
index ab67c94db280..a3d0ebad78a1 100644
--- a/arch/arm/boot/dts/tegra20-whistler.dts
+++ b/arch/arm/boot/dts/tegra20-whistler.dts
@@ -588,6 +588,8 @@
                         regulator-max-microvolt = <5000000>;
                         enable-active-high;
                         gpio = <&tca6416 0 0>; /* GPIO_PMU0 */
+                        regulator-always-on;
+                        regulator-boot-on;
                 };
 
                 vbus3_reg: regulator@3 {
@@ -598,6 +600,8 @@
                         regulator-max-microvolt = <5000000>;
                         enable-active-high;
                         gpio = <&tca6416 1 0>; /* GPIO_PMU1 */
+                        regulator-always-on;
+                        regulator-boot-on;
                 };
         };
 
diff --git a/arch/arm/boot/dts/twl4030.dtsi b/arch/arm/boot/dts/twl4030.dtsi
index b3034da00a37..ae6a17aed9ee 100644
--- a/arch/arm/boot/dts/twl4030.dtsi
+++ b/arch/arm/boot/dts/twl4030.dtsi
@@ -47,6 +47,12 @@
                 regulator-max-microvolt = <3150000>;
         };
 
+        vmmc2: regulator-vmmc2 {
+                compatible = "ti,twl4030-vmmc2";
+                regulator-min-microvolt = <1850000>;
+                regulator-max-microvolt = <3150000>;
+        };
+
         vusb1v5: regulator-vusb1v5 {
                 compatible = "ti,twl4030-vusb1v5";
         };
diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
index e1eb7dadda80..67d929cf9804 100644
--- a/arch/arm/boot/dts/vf610.dtsi
+++ b/arch/arm/boot/dts/vf610.dtsi
@@ -442,8 +442,8 @@
                                 compatible = "fsl,mvf600-fec";
                                 reg = <0x400d0000 0x1000>;
                                 interrupts = <0 78 0x04>;
-                                clocks = <&clks VF610_CLK_ENET>,
-                                        <&clks VF610_CLK_ENET>,
+                                clocks = <&clks VF610_CLK_ENET0>,
+                                        <&clks VF610_CLK_ENET0>,
                                         <&clks VF610_CLK_ENET>;
                                 clock-names = "ipg", "ahb", "ptp";
                                 status = "disabled";
@@ -453,8 +453,8 @@
                                 compatible = "fsl,mvf600-fec";
                                 reg = <0x400d1000 0x1000>;
                                 interrupts = <0 79 0x04>;
-                                clocks = <&clks VF610_CLK_ENET>,
-                                        <&clks VF610_CLK_ENET>,
+                                clocks = <&clks VF610_CLK_ENET1>,
+                                        <&clks VF610_CLK_ENET1>,
                                         <&clks VF610_CLK_ENET>;
                                 clock-names = "ipg", "ahb", "ptp";
                                 status = "disabled";
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index a432e6c1dac1..39ad030ac0c7 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -26,7 +26,6 @@
 #include <linux/io.h>
 #include <linux/slab.h>
 #include <linux/edma.h>
-#include <linux/err.h>
 #include <linux/of_address.h>
 #include <linux/of_device.h>
 #include <linux/of_dma.h>
diff --git a/arch/arm/common/mcpm_platsmp.c b/arch/arm/common/mcpm_platsmp.c
index 510e5b13aa2e..1bc34c7567fd 100644
--- a/arch/arm/common/mcpm_platsmp.c
+++ b/arch/arm/common/mcpm_platsmp.c
@@ -19,7 +19,7 @@
 #include <asm/smp.h>
 #include <asm/smp_plat.h>
 
-static int __cpuinit mcpm_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int mcpm_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned int mpidr, pcpu, pcluster, ret;
         extern void secondary_startup(void);
@@ -40,7 +40,7 @@ static int __cpuinit mcpm_boot_secondary(unsigned int cpu, struct task_struct *i
         return 0;
 }
 
-static void __cpuinit mcpm_secondary_init(unsigned int cpu)
+static void mcpm_secondary_init(unsigned int cpu)
 {
         mcpm_cpu_powered_up();
 }
diff --git a/arch/arm/configs/da8xx_omapl_defconfig b/arch/arm/configs/da8xx_omapl_defconfig
index 7c868139bdb0..1571bea48bed 100644
--- a/arch/arm/configs/da8xx_omapl_defconfig
+++ b/arch/arm/configs/da8xx_omapl_defconfig
@@ -102,6 +102,8 @@ CONFIG_SND_SOC=m
 CONFIG_SND_DAVINCI_SOC=m
 # CONFIG_HID_SUPPORT is not set
 # CONFIG_USB_SUPPORT is not set
+CONFIG_DMADEVICES=y
+CONFIG_TI_EDMA=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 CONFIG_XFS_FS=m
diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig
index c86fd75e181a..ab2f7378352c 100644
--- a/arch/arm/configs/davinci_all_defconfig
+++ b/arch/arm/configs/davinci_all_defconfig
@@ -162,6 +162,8 @@ CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_TIMER=m
 CONFIG_LEDS_TRIGGER_HEARTBEAT=m
 CONFIG_RTC_CLASS=y
+CONFIG_DMADEVICES=y
+CONFIG_TI_EDMA=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 CONFIG_XFS_FS=m
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index fe0bdc361d2c..6e572c64cf5a 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -53,6 +53,7 @@ CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_OMAP_OCP2SCP=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_ATA=y
 CONFIG_SATA_AHCI_PLATFORM=y
@@ -61,6 +62,7 @@ CONFIG_SATA_MV=y
 CONFIG_NETDEVICES=y
 CONFIG_SUN4I_EMAC=y
 CONFIG_NET_CALXEDA_XGMAC=y
+CONFIG_KS8851=y
 CONFIG_SMSC911X=y
 CONFIG_STMMAC_ETH=y
 CONFIG_MDIO_SUN4I=y
@@ -89,6 +91,7 @@ CONFIG_I2C_DESIGNWARE_PLATFORM=y
 CONFIG_I2C_SIRF=y
 CONFIG_I2C_TEGRA=y
 CONFIG_SPI=y
+CONFIG_SPI_OMAP24XX=y
 CONFIG_SPI_PL022=y
 CONFIG_SPI_SIRF=y
 CONFIG_SPI_TEGRA114=y
@@ -111,11 +114,12 @@ CONFIG_FB_SIMPLE=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_MXC=y
 CONFIG_USB_EHCI_TEGRA=y
 CONFIG_USB_EHCI_HCD_PLATFORM=y
 CONFIG_USB_ISP1760_HCD=y
 CONFIG_USB_STORAGE=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_HOST=y
 CONFIG_AB8500_USB=y
 CONFIG_NOP_USB_XCEIV=y
 CONFIG_OMAP_USB2=y
diff --git a/arch/arm/configs/nhk8815_defconfig b/arch/arm/configs/nhk8815_defconfig
index 35f8cf299fa2..263ae3869e32 100644
--- a/arch/arm/configs/nhk8815_defconfig
+++ b/arch/arm/configs/nhk8815_defconfig
@@ -1,6 +1,8 @@
 # CONFIG_LOCALVERSION_AUTO is not set
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_HIGH_RES_TIMERS=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -48,7 +50,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_MTD=y
 CONFIG_MTD_TESTS=m
 CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_NAND_ECC_SMC=y
 CONFIG_MTD_NAND=y
@@ -94,8 +95,10 @@ CONFIG_I2C_GPIO=y
 CONFIG_I2C_NOMADIK=y
 CONFIG_DEBUG_GPIO=y
 # CONFIG_HWMON is not set
+CONFIG_REGULATOR=y
 CONFIG_MMC=y
-CONFIG_MMC_CLKGATE=y
+CONFIG_MMC_UNSAFE_RESUME=y
+# CONFIG_MMC_BLOCK_BOUNCE is not set
 CONFIG_MMC_ARMMMCI=y
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
diff --git a/arch/arm/include/asm/a.out-core.h b/arch/arm/include/asm/a.out-core.h
deleted file mode 100644
index 92f10cb5c70c..000000000000
--- a/arch/arm/include/asm/a.out-core.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/* a.out coredump register dumper
- *
- * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
- * Written by David Howells (dhowells@redhat.com)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public Licence
- * as published by the Free Software Foundation; either version
- * 2 of the Licence, or (at your option) any later version.
- */
-
-#ifndef _ASM_A_OUT_CORE_H
-#define _ASM_A_OUT_CORE_H
-
-#ifdef __KERNEL__
-
-#include <linux/user.h>
-#include <linux/elfcore.h>
-
-/*
- * fill in the user structure for an a.out core dump
- */
-static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
-{
-        struct task_struct *tsk = current;
-
-        dump->magic = CMAGIC;
-        dump->start_code = tsk->mm->start_code;
-        dump->start_stack = regs->ARM_sp & ~(PAGE_SIZE - 1);
-
-        dump->u_tsize = (tsk->mm->end_code - tsk->mm->start_code) >> PAGE_SHIFT;
-        dump->u_dsize = (tsk->mm->brk - tsk->mm->start_data + PAGE_SIZE - 1) >> PAGE_SHIFT;
-        dump->u_ssize = 0;
-
-        memset(dump->u_debugreg, 0, sizeof(dump->u_debugreg));
-
-        if (dump->start_stack < 0x04000000)
-                dump->u_ssize = (0x04000000 - dump->start_stack) >> PAGE_SHIFT;
-
-        dump->regs = *regs;
-        dump->u_fpvalid = dump_fpu (regs, &dump->u_fp);
-}
-
-#endif /* __KERNEL__ */
-#endif /* _ASM_A_OUT_CORE_H */
diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
index accefe099182..e406d575c94f 100644
--- a/arch/arm/include/asm/arch_timer.h
+++ b/arch/arm/include/asm/arch_timer.h
@@ -89,7 +89,7 @@ static inline u64 arch_counter_get_cntvct(void)
         return cval;
 }
 
-static inline void __cpuinit arch_counter_set_user_access(void)
+static inline void arch_counter_set_user_access(void)
 {
         u32 cntkctl;
 
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index 8c25dc4e9851..9672e978d50d 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -89,13 +89,18 @@ extern unsigned int processor_id;
                 __val;                                                  \
         })
 
+/*
+ * The memory clobber prevents gcc 4.5 from reordering the mrc before
+ * any is_smp() tests, which can cause undefined instruction aborts on
+ * ARM1136 r0 due to the missing extended CP15 registers.
+ */
 #define read_cpuid_ext(ext_reg)                                         \
         ({                                                              \
                 unsigned int __val;                                     \
                 asm("mrc        p15, 0, %0, c0, " ext_reg               \
                     : "=r" (__val)                                      \
                     :                                                   \
-                    : "cc");                                            \
+                    : "memory");                                        \
                 __val;                                                  \
         })
 
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h
index 38050b1c4800..56211f2084ef 100644
--- a/arch/arm/include/asm/elf.h
+++ b/arch/arm/include/asm/elf.h
@@ -130,4 +130,10 @@ struct mm_struct;
 extern unsigned long arch_randomize_brk(struct mm_struct *mm);
 #define arch_randomize_brk arch_randomize_brk
 
+#ifdef CONFIG_MMU
+#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
+struct linux_binprm;
+int arch_setup_additional_pages(struct linux_binprm *, int);
+#endif
+
 #endif
diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h
index e3d55547e755..6f18da09668b 100644
--- a/arch/arm/include/asm/mmu.h
+++ b/arch/arm/include/asm/mmu.h
@@ -6,8 +6,11 @@
 typedef struct {
 #ifdef CONFIG_CPU_HAS_ASID
         atomic64_t      id;
+#else
+        int             switch_pending;
 #endif
         unsigned int    vmalloc_seq;
+        unsigned long   sigpage;
 } mm_context_t;
 
 #ifdef CONFIG_CPU_HAS_ASID
diff --git a/arch/arm/include/asm/mmu_context.h b/arch/arm/include/asm/mmu_context.h
index b5792b7fd8d3..9b32f76bb0dd 100644
--- a/arch/arm/include/asm/mmu_context.h
+++ b/arch/arm/include/asm/mmu_context.h
@@ -56,7 +56,7 @@ static inline void check_and_switch_context(struct mm_struct *mm,
                  * on non-ASID CPUs, the old mm will remain valid until the
                  * finish_arch_post_lock_switch() call.
                  */
-                set_ti_thread_flag(task_thread_info(tsk), TIF_SWITCH_MM);
+                mm->context.switch_pending = 1;
         else
                 cpu_switch_mm(mm->pgd, mm);
 }
@@ -65,9 +65,21 @@ static inline void check_and_switch_context(struct mm_struct *mm,
         finish_arch_post_lock_switch
 static inline void finish_arch_post_lock_switch(void)
 {
-        if (test_and_clear_thread_flag(TIF_SWITCH_MM)) {
-                struct mm_struct *mm = current->mm;
-                cpu_switch_mm(mm->pgd, mm);
+        struct mm_struct *mm = current->mm;
+
+        if (mm && mm->context.switch_pending) {
+                /*
+                 * Preemption must be disabled during cpu_switch_mm() as we
+                 * have some stateful cache flush implementations. Check
+                 * switch_pending again in case we were preempted and the
+                 * switch to this mm was already done.
+                 */
+                preempt_disable();
+                if (mm->context.switch_pending) {
+                        mm->context.switch_pending = 0;
+                        cpu_switch_mm(mm->pgd, mm);
+                }
+                preempt_enable_no_resched();
         }
 }
 
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
index 6363f3d1d505..4355f0ec44d6 100644
--- a/arch/arm/include/asm/page.h
+++ b/arch/arm/include/asm/page.h
@@ -142,7 +142,9 @@ extern void __cpu_copy_user_highpage(struct page *to, struct page *from,
 #define clear_page(page)        memset((void *)(page), 0, PAGE_SIZE)
 extern void copy_page(void *to, const void *from);
 
+#ifdef CONFIG_KUSER_HELPERS
 #define __HAVE_ARCH_GATE_AREA 1
+#endif
 
 #ifdef CONFIG_ARM_LPAE
 #include <asm/pgtable-3level-types.h>
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index 06e7d509eaac..413f3876341c 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -54,7 +54,6 @@ struct thread_struct {
 
 #define start_thread(regs,pc,sp)                                        \
 ({                                                                      \
-        unsigned long *stack = (unsigned long *)sp;                     \
         memset(regs->uregs, 0, sizeof(regs->uregs));                    \
         if (current->personality & ADDR_LIMIT_32BIT)                    \
                 regs->ARM_cpsr = USR_MODE;                              \
@@ -65,9 +64,6 @@ struct thread_struct {
         regs->ARM_cpsr |= PSR_ENDSTATE;                                 \
         regs->ARM_pc = pc & ~1;         /* pc */                        \
         regs->ARM_sp = sp;              /* sp */                        \
-        regs->ARM_r2 = stack[2];        /* r2 (envp) */                 \
-        regs->ARM_r1 = stack[1];        /* r1 (argv) */                 \
-        regs->ARM_r0 = stack[0];        /* r0 (argc) */                 \
         nommu_start_thread(regs);                                       \
 })
 
diff --git a/arch/arm/include/asm/smp_plat.h b/arch/arm/include/asm/smp_plat.h
index 6462a721ebd4..a252c0bfacf5 100644
--- a/arch/arm/include/asm/smp_plat.h
+++ b/arch/arm/include/asm/smp_plat.h
@@ -88,4 +88,7 @@ static inline u32 mpidr_hash_size(void)
 {
         return 1 << mpidr_hash.bits;
 }
+
+extern int platform_can_cpu_hotplug(void);
+
 #endif
diff --git a/arch/arm/include/asm/spinlock.h b/arch/arm/include/asm/spinlock.h
index f8b8965666e9..b07c09e5a0ac 100644
--- a/arch/arm/include/asm/spinlock.h
+++ b/arch/arm/include/asm/spinlock.h
@@ -107,7 +107,7 @@ static inline int arch_spin_trylock(arch_spinlock_t *lock)
                 "       subs    %1, %0, %0, ror #16\n"
                 "       addeq   %0, %0, %4\n"
                 "       strexeq %2, %0, [%3]"
-                : "=&r" (slock), "=&r" (contended), "=r" (res)
+                : "=&r" (slock), "=&r" (contended), "=&r" (res)
                 : "r" (&lock->slock), "I" (1 << TICKET_SHIFT)
                 : "cc");
         } while (res);
@@ -168,17 +168,20 @@ static inline void arch_write_lock(arch_rwlock_t *rw)
 
 static inline int arch_write_trylock(arch_rwlock_t *rw)
 {
-        unsigned long tmp;
+        unsigned long contended, res;
 
-        __asm__ __volatile__(
-"       ldrex   %0, [%1]\n"
-"       teq     %0, #0\n"
-"       strexeq %0, %2, [%1]"
-        : "=&r" (tmp)
-        : "r" (&rw->lock), "r" (0x80000000)
-        : "cc");
+        do {
+                __asm__ __volatile__(
+                "       ldrex   %0, [%2]\n"
+                "       mov     %1, #0\n"
+                "       teq     %0, #0\n"
+                "       strexeq %1, %3, [%2]"
+                : "=&r" (contended), "=&r" (res)
+                : "r" (&rw->lock), "r" (0x80000000)
+                : "cc");
+        } while (res);
 
-        if (tmp == 0) {
+        if (!contended) {
                 smp_mb();
                 return 1;
         } else {
@@ -254,18 +257,26 @@ static inline void arch_read_unlock(arch_rwlock_t *rw)
 
 static inline int arch_read_trylock(arch_rwlock_t *rw)
 {
-        unsigned long tmp, tmp2 = 1;
+        unsigned long contended, res;
 
-        __asm__ __volatile__(
-"       ldrex   %0, [%2]\n"
-"       adds    %0, %0, #1\n"
-"       strexpl %1, %0, [%2]\n"
-        : "=&r" (tmp), "+r" (tmp2)
-        : "r" (&rw->lock)
-        : "cc");
+        do {
+                __asm__ __volatile__(
+                "       ldrex   %0, [%2]\n"
+                "       mov     %1, #0\n"
+                "       adds    %0, %0, #1\n"
+                "       strexpl %1, %0, [%2]"
+                : "=&r" (contended), "=&r" (res)
+                : "r" (&rw->lock)
+                : "cc");
+        } while (res);
 
-        smp_mb();
-        return tmp2 == 0;
+        /* If the lock is negative, then it is already held for write. */
+        if (contended < 0x80000000) {
+                smp_mb();
+                return 1;
+        } else {
+                return 0;
+        }
 }
 
 /* read_can_lock - would read_trylock() succeed? */
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index 214d4158089a..2b8114fcba09 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -156,7 +156,6 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
 #define TIF_USING_IWMMXT        17
 #define TIF_MEMDIE              18      /* is terminating due to OOM killer */
 #define TIF_RESTORE_SIGMASK     20
-#define TIF_SWITCH_MM           22      /* deferred switch_mm */
 
 #define _TIF_SIGPENDING         (1 << TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED       (1 << TIF_NEED_RESCHED)
diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h
index 46e7cfb3e721..0baf7f0d9394 100644
--- a/arch/arm/include/asm/tlb.h
+++ b/arch/arm/include/asm/tlb.h
@@ -43,6 +43,7 @@ struct mmu_gather {
         struct mm_struct        *mm;
         unsigned int            fullmm;
         struct vm_area_struct   *vma;
+        unsigned long           start, end;
         unsigned long           range_start;
         unsigned long           range_end;
         unsigned int            nr;
@@ -107,10 +108,12 @@ static inline void tlb_flush_mmu(struct mmu_gather *tlb)
 }
 
 static inline void
-tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned int fullmm)
+tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long start, unsigned long end)
 {
         tlb->mm = mm;
-        tlb->fullmm = fullmm;
+        tlb->fullmm = !(start | (end+1));
+        tlb->start = start;
+        tlb->end = end;
         tlb->vma = NULL;
         tlb->max = ARRAY_SIZE(tlb->local);
         tlb->pages = tlb->local;
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index fdbb9e369745..f467e9b3f8d5 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -443,7 +443,18 @@ static inline void local_flush_bp_all(void)
                 isb();
 }
 
+#include <asm/cputype.h>
 #ifdef CONFIG_ARM_ERRATA_798181
+static inline int erratum_a15_798181(void)
+{
+        unsigned int midr = read_cpuid_id();
+
+        /* Cortex-A15 r0p0..r3p2 affected */
+        if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2)
+                return 0;
+        return 1;
+}
+
 static inline void dummy_flush_tlb_a15_erratum(void)
 {
         /*
@@ -453,6 +464,11 @@ static inline void dummy_flush_tlb_a15_erratum(void)
         dsb();
 }
 #else
+static inline int erratum_a15_798181(void)
+{
+        return 0;
+}
+
 static inline void dummy_flush_tlb_a15_erratum(void)
 {
 }
diff --git a/arch/arm/include/asm/virt.h b/arch/arm/include/asm/virt.h
index 50af92bac737..4371f45c5784 100644
--- a/arch/arm/include/asm/virt.h
+++ b/arch/arm/include/asm/virt.h
@@ -29,6 +29,7 @@
 #define BOOT_CPU_MODE_MISMATCH  PSR_N_BIT
 
 #ifndef __ASSEMBLY__
+#include <asm/cacheflush.h>
 
 #ifdef CONFIG_ARM_VIRT_EXT
 /*
@@ -41,10 +42,21 @@
  */
 extern int __boot_cpu_mode;
 
+static inline void sync_boot_mode(void)
+{
+        /*
+         * As secondaries write to __boot_cpu_mode with caches disabled, we
+         * must flush the corresponding cache entries to ensure the visibility
+         * of their writes.
+         */
+        sync_cache_r(&__boot_cpu_mode);
+}
+
 void __hyp_set_vectors(unsigned long phys_vector_base);
 unsigned long __hyp_get_vectors(void);
 #else
 #define __boot_cpu_mode (SVC_MODE)
+#define sync_boot_mode()
 #endif
 
 #ifndef ZIMAGE
diff --git a/arch/arm/include/uapi/asm/Kbuild b/arch/arm/include/uapi/asm/Kbuild
index 47bcb2d254af..18d76fd5a2af 100644
--- a/arch/arm/include/uapi/asm/Kbuild
+++ b/arch/arm/include/uapi/asm/Kbuild
@@ -1,7 +1,6 @@
 # UAPI Header export list
 include include/uapi/asm-generic/Kbuild.asm
 
-header-y += a.out.h
 header-y += byteorder.h
 header-y += fcntl.h
 header-y += hwcap.h
diff --git a/arch/arm/include/uapi/asm/a.out.h b/arch/arm/include/uapi/asm/a.out.h
deleted file mode 100644
index 083894b2e3bc..000000000000
--- a/arch/arm/include/uapi/asm/a.out.h
+++ /dev/null
@@ -1,34 +0,0 @@
-#ifndef __ARM_A_OUT_H__
-#define __ARM_A_OUT_H__
-
-#include <linux/personality.h>
-#include <linux/types.h>
-
-struct exec
-{
-  __u32 a_info;         /* Use macros N_MAGIC, etc for access */
-  __u32 a_text;         /* length of text, in bytes */
-  __u32 a_data;         /* length of data, in bytes */
-  __u32 a_bss;          /* length of uninitialized data area for file, in bytes */
-  __u32 a_syms;         /* length of symbol table data in file, in bytes */
-  __u32 a_entry;        /* start address */
-  __u32 a_trsize;       /* length of relocation info for text, in bytes */
-  __u32 a_drsize;       /* length of relocation info for data, in bytes */
-};
-
-/*
- * This is always the same
- */
-#define N_TXTADDR(a)    (0x00008000)
-
-#define N_TRSIZE(a)     ((a).a_trsize)
-#define N_DRSIZE(a)     ((a).a_drsize)
-#define N_SYMSIZE(a)    ((a).a_syms)
-
-#define M_ARM 103
-
-#ifndef LIBRARY_START_TEXT
-#define LIBRARY_START_TEXT      (0x00c00000)
-#endif
-
-#endif /* __A_OUT_GNU_H__ */
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index a39cfc2a1f90..9cbe70c8b0ef 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -357,7 +357,8 @@ ENDPROC(__pabt_svc)
         .endm
 
         .macro  kuser_cmpxchg_check
-#if !defined(CONFIG_CPU_32v6K) && !defined(CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG)
+#if !defined(CONFIG_CPU_32v6K) && defined(CONFIG_KUSER_HELPERS) && \
+    !defined(CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG)
 #ifndef CONFIG_MMU
 #warning "NPTL on non MMU needs fixing"
 #else
@@ -742,6 +743,18 @@ ENDPROC(__switch_to)
 #endif
         .endm
 
+        .macro  kuser_pad, sym, size
+        .if     (. - \sym) & 3
+        .rept   4 - (. - \sym) & 3
+        .byte   0
+        .endr
+        .endif
+        .rept   (\size - (. - \sym)) / 4
+        .word   0xe7fddef1
+        .endr
+        .endm
+
+#ifdef CONFIG_KUSER_HELPERS
         .align  5
         .globl  __kuser_helper_start
 __kuser_helper_start:
@@ -832,18 +845,13 @@ kuser_cmpxchg64_fixup:
 #error "incoherent kernel configuration"
 #endif
 
-        /* pad to next slot */
-        .rept   (16 - (. - __kuser_cmpxchg64)/4)
-        .word   0
-        .endr
-
-        .align  5
+        kuser_pad __kuser_cmpxchg64, 64
 
 __kuser_memory_barrier:                         @ 0xffff0fa0
         smp_dmb arm
         usr_ret lr
 
-        .align  5
+        kuser_pad __kuser_memory_barrier, 32
 
 __kuser_cmpxchg:                                @ 0xffff0fc0
 
@@ -916,13 +924,14 @@ kuser_cmpxchg32_fixup:
 
 #endif
 
-        .align  5
+        kuser_pad __kuser_cmpxchg, 32
 
 __kuser_get_tls:                                @ 0xffff0fe0
         ldr     r0, [pc, #(16 - 8)]     @ read TLS, set in kuser_get_tls_init
         usr_ret lr
         mrc     p15, 0, r0, c13, c0, 3  @ 0xffff0fe8 hardware TLS code
-        .rep    4
+        kuser_pad __kuser_get_tls, 16
+        .rep    3
         .word   0                       @ 0xffff0ff0 software TLS value, then
         .endr                           @ pad up to __kuser_helper_version
 
@@ -932,14 +941,16 @@ __kuser_helper_version:				@ 0xffff0ffc
         .globl  __kuser_helper_end
 __kuser_helper_end:
 
+#endif
+
  THUMB( .thumb  )
 
 /*
  * Vector stubs.
  *
- * This code is copied to 0xffff0200 so we can use branches in the
- * vectors, rather than ldr's.  Note that this code must not
- * exceed 0x300 bytes.
+ * This code is copied to 0xffff1000 so we can use branches in the
+ * vectors, rather than ldr's.  Note that this code must not exceed
+ * a page size.
  *
  * Common stub entry macro:
  *   Enter in IRQ mode, spsr = SVC/USR CPSR, lr = SVC/USR PC
@@ -986,8 +997,17 @@ ENDPROC(vector_\name)
 1:
         .endm
 
-        .globl  __stubs_start
+        .section .stubs, "ax", %progbits
 __stubs_start:
+        @ This must be the first word
+        .word   vector_swi
+
+vector_rst:
+ ARM(   swi     SYS_ERROR0      )
+ THUMB( svc     #0              )
+ THUMB( nop                     )
+        b       vector_und
+
 /*
  * Interrupt dispatcher
  */
@@ -1082,6 +1102,16 @@ __stubs_start:
         .align  5
 
 /*=============================================================================
+ * Address exception handler
+ *-----------------------------------------------------------------------------
+ * These aren't too critical.
+ * (they're not supposed to happen, and won't happen in 32-bit data mode).
+ */
+
+vector_addrexcptn:
+        b       vector_addrexcptn
+
+/*=============================================================================
  * Undefined FIQs
  *-----------------------------------------------------------------------------
  * Enter in FIQ mode, spsr = ANY CPSR, lr = ANY PC
@@ -1094,45 +1124,19 @@ __stubs_start:
 vector_fiq:
         subs    pc, lr, #4
 
-/*=============================================================================
- * Address exception handler
- *-----------------------------------------------------------------------------
- * These aren't too critical.
- * (they're not supposed to happen, and won't happen in 32-bit data mode).
- */
-
-vector_addrexcptn:
-        b       vector_addrexcptn
-
-/*
- * We group all the following data together to optimise
- * for CPUs with separate I & D caches.
- */
-        .align  5
-
-.LCvswi:
-        .word   vector_swi
-
-        .globl  __stubs_end
-__stubs_end:
-
-        .equ    stubs_offset, __vectors_start + 0x200 - __stubs_start
+        .globl  vector_fiq_offset
+        .equ    vector_fiq_offset, vector_fiq
 
-        .globl  __vectors_start
+        .section .vectors, "ax", %progbits
 __vectors_start:
- ARM(   swi     SYS_ERROR0      )
- THUMB( svc     #0              )
- THUMB( nop                     )
-        W(b)    vector_und + stubs_offset
-        W(ldr)  pc, .LCvswi + stubs_offset
-        W(b)    vector_pabt + stubs_offset
-        W(b)    vector_dabt + stubs_offset
-        W(b)    vector_addrexcptn + stubs_offset
-        W(b)    vector_irq + stubs_offset
-        W(b)    vector_fiq + stubs_offset
-
-        .globl  __vectors_end
-__vectors_end:
+        W(b)    vector_rst
+        W(b)    vector_und
+        W(ldr)  pc, __vectors_start + 0x1000
+        W(b)    vector_pabt
+        W(b)    vector_dabt
+        W(b)    vector_addrexcptn
+        W(b)    vector_irq
+        W(b)    vector_fiq
 
         .data
 
diff --git a/arch/arm/kernel/entry-v7m.S b/arch/arm/kernel/entry-v7m.S
index e00621f1403f..52b26432c9a9 100644
--- a/arch/arm/kernel/entry-v7m.S
+++ b/arch/arm/kernel/entry-v7m.S
@@ -49,7 +49,7 @@ __irq_entry:
         mov     r1, sp
         stmdb   sp!, {lr}
         @ routine called with r0 = irq number, r1 = struct pt_regs *
-        bl      nvic_do_IRQ
+        bl      nvic_handle_irq
 
         pop     {lr}
         @
diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c
index 2adda11f712f..918875d96d5d 100644
--- a/arch/arm/kernel/fiq.c
+++ b/arch/arm/kernel/fiq.c
@@ -47,6 +47,11 @@
 #include <asm/irq.h>
 #include <asm/traps.h>
 
+#define FIQ_OFFSET ({                                   \
+                extern void *vector_fiq_offset;         \
+                (unsigned)&vector_fiq_offset;           \
+        })
+
 static unsigned long no_fiq_insn;
 
 /* Default reacquire function
@@ -79,14 +84,14 @@ int show_fiq_list(struct seq_file *p, int prec)
 
 void set_fiq_handler(void *start, unsigned int length)
 {
-#if defined(CONFIG_CPU_USE_DOMAINS)
-        memcpy((void *)0xffff001c, start, length);
-#else
-        memcpy(vectors_page + 0x1c, start, length);
-#endif
-        flush_icache_range(0xffff001c, 0xffff001c + length);
-        if (!vectors_high())
-                flush_icache_range(0x1c, 0x1c + length);
+        void *base = vectors_page;
+        unsigned offset = FIQ_OFFSET;
+
+        memcpy(base + offset, start, length);
+        if (!cache_is_vipt_nonaliasing())
+                flush_icache_range((unsigned long)base + offset, offset +
+                                   length);
+        flush_icache_range(0xffff0000 + offset, 0xffff0000 + offset + length);
 }
 
 int claim_fiq(struct fiq_handler *f)
@@ -144,6 +149,7 @@ EXPORT_SYMBOL(disable_fiq);
 
 void __init init_FIQ(int start)
 {
-        no_fiq_insn = *(unsigned long *)0xffff001c;
+        unsigned offset = FIQ_OFFSET;
+        no_fiq_insn = *(unsigned long *)(0xffff0000 + offset);
         fiq_start = start;
 }
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index 76ab5ca50610..47cd974e57ea 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S
@@ -149,7 +149,6 @@ ENDPROC(lookup_processor_type)
  *      r5 = proc_info pointer in physical address space
  *      r9 = cpuid (preserved)
  */
-        __CPUINIT
 __lookup_processor_type:
         adr     r3, __lookup_processor_type_data
         ldmia   r3, {r4 - r6}
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index 75f14cc3e073..14235ba64a90 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -87,7 +87,7 @@ ENTRY(stext)
 ENDPROC(stext)
 
 #ifdef CONFIG_SMP
-        __CPUINIT
+        .text
 ENTRY(secondary_startup)
         /*
          * Common entry point for secondary CPUs.
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 45e8935cae4e..2c7cc1e03473 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -343,7 +343,7 @@ __turn_mmu_on_loc:
         .long   __turn_mmu_on_end
 
 #if defined(CONFIG_SMP)
-        __CPUINIT
+        .text
 ENTRY(secondary_startup)
         /*
          * Common entry point for secondary CPUs.
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 1fd749ee4a1b..7b95de601357 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -1020,7 +1020,7 @@ out_mdbgen:
                 cpumask_or(&debug_err_mask, &debug_err_mask, cpumask_of(cpu));
 }
 
-static int __cpuinit dbg_reset_notify(struct notifier_block *self,
+static int dbg_reset_notify(struct notifier_block *self,
                                       unsigned long action, void *cpu)
 {
         if ((action & ~CPU_TASKS_FROZEN) == CPU_ONLINE)
@@ -1029,7 +1029,7 @@ static int __cpuinit dbg_reset_notify(struct notifier_block *self,
         return NOTIFY_OK;
 }
 
-static struct notifier_block __cpuinitdata dbg_reset_nb = {
+static struct notifier_block dbg_reset_nb = {
         .notifier_call = dbg_reset_notify,
 };
 
diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S
index 4910232c4833..797b1a6a4906 100644
--- a/arch/arm/kernel/hyp-stub.S
+++ b/arch/arm/kernel/hyp-stub.S
@@ -56,8 +56,8 @@ ENTRY(__boot_cpu_mode)
         ldr     \reg3, [\reg2]
         ldr     \reg1, [\reg2, \reg3]
         cmp     \mode, \reg1            @ matches primary CPU boot mode?
-        orrne   r7, r7, #BOOT_CPU_MODE_MISMATCH
-        strne   r7, [r5, r6]            @ record what happened and give up
+        orrne   \reg1, \reg1, #BOOT_CPU_MODE_MISMATCH
+        strne   \reg1, [\reg2, \reg3]   @ record what happened and give up
         .endm
 
 #else   /* ZIMAGE */
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index 4fb074c446bf..57221e349a7c 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -15,6 +15,7 @@
 #include <asm/mmu_context.h>
 #include <asm/cacheflush.h>
 #include <asm/mach-types.h>
+#include <asm/smp_plat.h>
 #include <asm/system_misc.h>
 
 extern const unsigned char relocate_new_kernel[];
@@ -39,6 +40,14 @@ int machine_kexec_prepare(struct kimage *image)
         int i, err;
 
         /*
+         * Validate that if the current HW supports SMP, then the SW supports
+         * and implements CPU hotplug for the current HW. If not, we won't be
+         * able to kexec reliably, so fail the prepare operation.
+         */
+        if (num_possible_cpus() > 1 && !platform_can_cpu_hotplug())
+                return -EINVAL;
+
+        /*
          * No segment at default ATAGs address. try to locate
          * a dtb using magic.
          */
@@ -73,6 +82,7 @@ void machine_crash_nonpanic_core(void *unused)
         crash_save_cpu(&regs, smp_processor_id());
         flush_cache_all();
 
+        set_cpu_online(smp_processor_id(), false);
         atomic_dec(&waiting_for_crash_ipi);
         while (1)
                 cpu_relax();
@@ -134,10 +144,13 @@ void machine_kexec(struct kimage *image)
         unsigned long reboot_code_buffer_phys;
         void *reboot_code_buffer;
 
-        if (num_online_cpus() > 1) {
-                pr_err("kexec: error: multiple CPUs still online\n");
-                return;
-        }
+        /*
+         * This can only happen if machine_shutdown() failed to disable some
+         * CPU, and that can only happen if the checks in
+         * machine_kexec_prepare() were not correct. If this fails, we can't
+         * reliably kexec anyway, so BUG_ON is appropriate.
+         */
+        BUG_ON(num_online_cpus() > 1);
 
         page_list = image->head & PAGE_MASK;
 
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index d9f5cd4e533f..e186ee1e63f6 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -53,7 +53,12 @@ armpmu_map_cache_event(const unsigned (*cache_map)
 static int
 armpmu_map_hw_event(const unsigned (*event_map)[PERF_COUNT_HW_MAX], u64 config)
 {
-        int mapping = (*event_map)[config];
+        int mapping;
+
+        if (config >= PERF_COUNT_HW_MAX)
+                return -EINVAL;
+
+        mapping = (*event_map)[config];
         return mapping == HW_OP_UNSUPPORTED ? -ENOENT : mapping;
 }
 
@@ -253,6 +258,9 @@ validate_event(struct pmu_hw_events *hw_events,
         struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
         struct pmu *leader_pmu = event->group_leader->pmu;
 
+        if (is_software_event(event))
+                return 1;
+
         if (event->pmu != leader_pmu || event->state < PERF_EVENT_STATE_OFF)
                 return 1;
 
diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c
index 1f2740e3dbc0..aebe0e99c153 100644
--- a/arch/arm/kernel/perf_event_cpu.c
+++ b/arch/arm/kernel/perf_event_cpu.c
@@ -157,8 +157,8 @@ static void cpu_pmu_init(struct arm_pmu *cpu_pmu)
  * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
  * junk values out of them.
  */
-static int __cpuinit cpu_pmu_notify(struct notifier_block *b,
-                                    unsigned long action, void *hcpu)
+static int cpu_pmu_notify(struct notifier_block *b, unsigned long action,
+                          void *hcpu)
 {
         if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
                 return NOTIFY_DONE;
@@ -171,7 +171,7 @@ static int __cpuinit cpu_pmu_notify(struct notifier_block *b,
         return NOTIFY_OK;
 }
 
-static struct notifier_block __cpuinitdata cpu_pmu_hotplug_notifier = {
+static struct notifier_block cpu_pmu_hotplug_notifier = {
         .notifier_call = cpu_pmu_notify,
 };
 
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index d3ca4f6915af..94f6b05f9e24 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -197,6 +197,7 @@ void machine_shutdown(void)
  */
 void machine_halt(void)
 {
+        local_irq_disable();
         smp_send_stop();
 
         local_irq_disable();
@@ -211,6 +212,7 @@ void machine_halt(void)
  */
 void machine_power_off(void)
 {
+        local_irq_disable();
         smp_send_stop();
 
         if (pm_power_off)
@@ -230,6 +232,7 @@ void machine_power_off(void)
  */
 void machine_restart(char *cmd)
 {
+        local_irq_disable();
         smp_send_stop();
 
         arm_pm_restart(reboot_mode, cmd);
@@ -426,10 +429,11 @@ unsigned long arch_randomize_brk(struct mm_struct *mm)
 }
 
 #ifdef CONFIG_MMU
+#ifdef CONFIG_KUSER_HELPERS
 /*
  * The vectors page is always readable from user space for the
- * atomic helpers and the signal restart code. Insert it into the
- * gate_vma so that it is visible through ptrace and /proc/<pid>/mem.
+ * atomic helpers. Insert it into the gate_vma so that it is visible
+ * through ptrace and /proc/<pid>/mem.
  */
 static struct vm_area_struct gate_vma = {
         .vm_start       = 0xffff0000,
@@ -458,9 +462,48 @@ int in_gate_area_no_mm(unsigned long addr)
 {
         return in_gate_area(NULL, addr);
 }
+#define is_gate_vma(vma)        ((vma) == &gate_vma)
+#else
+#define is_gate_vma(vma)        0
+#endif
 
 const char *arch_vma_name(struct vm_area_struct *vma)
 {
-        return (vma == &gate_vma) ? "[vectors]" : NULL;
+        return is_gate_vma(vma) ? "[vectors]" :
+                (vma->vm_mm && vma->vm_start == vma->vm_mm->context.sigpage) ?
+                 "[sigpage]" : NULL;
+}
+
+static struct page *signal_page;
+extern struct page *get_signal_page(void);
+
+int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
+{
+        struct mm_struct *mm = current->mm;
+        unsigned long addr;
+        int ret;
+
+        if (!signal_page)
+                signal_page = get_signal_page();
+        if (!signal_page)
+                return -ENOMEM;
+
+        down_write(&mm->mmap_sem);
+        addr = get_unmapped_area(NULL, 0, PAGE_SIZE, 0, 0);
+        if (IS_ERR_VALUE(addr)) {
+                ret = addr;
+                goto up_fail;
+        }
+
+        ret = install_special_mapping(mm, addr, PAGE_SIZE,
+                VM_READ | VM_EXEC | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC,
+                &signal_page);
+
+        if (ret == 0)
+                mm->context.sigpage = addr;
+
+ up_fail:
+        up_write(&mm->mmap_sem);
+        return ret;
 }
 #endif
diff --git a/arch/arm/kernel/psci_smp.c b/arch/arm/kernel/psci_smp.c
index 219f1d73572a..70ded3fb42d9 100644
--- a/arch/arm/kernel/psci_smp.c
+++ b/arch/arm/kernel/psci_smp.c
@@ -46,8 +46,7 @@
 
 extern void secondary_startup(void);
 
-static int __cpuinit psci_boot_secondary(unsigned int cpu,
-                                         struct task_struct *idle)
+static int psci_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         if (psci_ops.cpu_on)
                 return psci_ops.cpu_on(cpu_logical_map(cpu),
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 63af9a7ae512..afc2489ee13b 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -836,6 +836,8 @@ static int __init meminfo_cmp(const void *_a, const void *_b)
 void __init hyp_mode_check(void)
 {
 #ifdef CONFIG_ARM_VIRT_EXT
+        sync_boot_mode();
+
         if (is_hyp_mode_available()) {
                 pr_info("CPU: All CPU(s) started in HYP mode.\n");
                 pr_info("CPU: Virtualization extensions available.\n");
@@ -971,6 +973,7 @@ static const char *hwcap_str[] = {
         "vfpv4",
         "idiva",
         "idivt",
+        "vfpd32",
         "lpae",
         NULL
 };
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index 1c16c35c271a..ab3304225272 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -8,6 +8,7 @@
  * published by the Free Software Foundation.
  */
 #include <linux/errno.h>
+#include <linux/random.h>
 #include <linux/signal.h>
 #include <linux/personality.h>
 #include <linux/uaccess.h>
@@ -15,12 +16,11 @@
 
 #include <asm/elf.h>
 #include <asm/cacheflush.h>
+#include <asm/traps.h>
 #include <asm/ucontext.h>
 #include <asm/unistd.h>
 #include <asm/vfp.h>
 
-#include "signal.h"
-
 /*
  * For ARM syscalls, we encode the syscall number into the instruction.
  */
@@ -40,11 +40,13 @@
 #define SWI_THUMB_SIGRETURN     (0xdf00 << 16 | 0x2700 | (__NR_sigreturn - __NR_SYSCALL_BASE))
 #define SWI_THUMB_RT_SIGRETURN  (0xdf00 << 16 | 0x2700 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE))
 
-const unsigned long sigreturn_codes[7] = {
+static const unsigned long sigreturn_codes[7] = {
         MOV_R7_NR_SIGRETURN,    SWI_SYS_SIGRETURN,    SWI_THUMB_SIGRETURN,
         MOV_R7_NR_RT_SIGRETURN, SWI_SYS_RT_SIGRETURN, SWI_THUMB_RT_SIGRETURN,
 };
 
+static unsigned long signal_return_offset;
+
 #ifdef CONFIG_CRUNCH
 static int preserve_crunch_context(struct crunch_sigframe __user *frame)
 {
@@ -400,14 +402,20 @@ setup_return(struct pt_regs *regs, struct ksignal *ksig,
                     __put_user(sigreturn_codes[idx+1], rc+1))
                         return 1;
 
-                if ((cpsr & MODE32_BIT) && !IS_ENABLED(CONFIG_ARM_MPU)) {
+#ifdef CONFIG_MMU
+                if (cpsr & MODE32_BIT) {
+                        struct mm_struct *mm = current->mm;
+
                         /*
-                         * 32-bit code can use the new high-page
-                         * signal return code support except when the MPU has
-                         * protected the vectors page from PL0
+                         * 32-bit code can use the signal return page
+                         * except when the MPU has protected the vectors
+                         * page from PL0
                          */
-                        retcode = KERN_SIGRETURN_CODE + (idx << 2) + thumb;
-                } else {
+                        retcode = mm->context.sigpage + signal_return_offset +
+                                  (idx << 2) + thumb;
+                } else
+#endif
+                {
                         /*
                          * Ensure that the instruction cache sees
                          * the return code written onto the stack.
@@ -608,3 +616,33 @@ do_work_pending(struct pt_regs *regs, unsigned int thread_flags, int syscall)
         } while (thread_flags & _TIF_WORK_MASK);
         return 0;
 }
+
+struct page *get_signal_page(void)
+{
+        unsigned long ptr;
+        unsigned offset;
+        struct page *page;
+        void *addr;
+
+        page = alloc_pages(GFP_KERNEL, 0);
+
+        if (!page)
+                return NULL;
+
+        addr = page_address(page);
+
+        /* Give the signal return code some randomness */
+        offset = 0x200 + (get_random_int() & 0x7fc);
+        signal_return_offset = offset;
+
+        /*
+         * Copy signal return handlers into the vector page, and
+         * set sigreturn to be a pointer to these.
+         */
+        memcpy(addr + offset, sigreturn_codes, sizeof(sigreturn_codes));
+
+        ptr = (unsigned long)addr + offset;
+        flush_icache_range(ptr, ptr + sizeof(sigreturn_codes));
+
+        return page;
+}
diff --git a/arch/arm/kernel/signal.h b/arch/arm/kernel/signal.h
deleted file mode 100644
index 5ff067b7c752..000000000000
--- a/arch/arm/kernel/signal.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- *  linux/arch/arm/kernel/signal.h
- *
- *  Copyright (C) 2005-2009 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#define KERN_SIGRETURN_CODE     (CONFIG_VECTORS_BASE + 0x00000500)
-
-extern const unsigned long sigreturn_codes[7];
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index c5fb5469054b..2dc19349eb19 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -58,7 +58,7 @@ struct secondary_data secondary_data;
  * control for which core is the next to come out of the secondary
  * boot "holding pen"
  */
-volatile int __cpuinitdata pen_release = -1;
+volatile int pen_release = -1;
 
 enum ipi_msg_type {
         IPI_WAKEUP,
@@ -86,7 +86,7 @@ static unsigned long get_arch_pgd(pgd_t *pgd)
         return pgdir >> ARCH_PGD_SHIFT;
 }
 
-int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
+int __cpu_up(unsigned int cpu, struct task_struct *idle)
 {
         int ret;
 
@@ -138,13 +138,23 @@ void __init smp_init_cpus(void)
                 smp_ops.smp_init_cpus();
 }
 
-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+int boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         if (smp_ops.smp_boot_secondary)
                 return smp_ops.smp_boot_secondary(cpu, idle);
         return -ENOSYS;
 }
 
+int platform_can_cpu_hotplug(void)
+{
+#ifdef CONFIG_HOTPLUG_CPU
+        if (smp_ops.cpu_kill)
+                return 1;
+#endif
+
+        return 0;
+}
+
 #ifdef CONFIG_HOTPLUG_CPU
 static void percpu_timer_stop(void);
 
@@ -170,7 +180,7 @@ static int platform_cpu_disable(unsigned int cpu)
 /*
  * __cpu_disable runs on the processor to be shutdown.
  */
-int __cpuinit __cpu_disable(void)
+int __cpu_disable(void)
 {
         unsigned int cpu = smp_processor_id();
         int ret;
@@ -216,7 +226,7 @@ static DECLARE_COMPLETION(cpu_died);
  * called on the thread which is asking for a CPU to be shutdown -
  * waits until shutdown has completed, or it is timed out.
  */
-void __cpuinit __cpu_die(unsigned int cpu)
+void __cpu_die(unsigned int cpu)
 {
         if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
                 pr_err("CPU%u: cpu didn't die\n", cpu);
@@ -306,7 +316,7 @@ void __ref cpu_die(void)
  * Called by both boot and secondaries to move global data into
  * per-processor storage.
  */
-static void __cpuinit smp_store_cpu_info(unsigned int cpuid)
+static void smp_store_cpu_info(unsigned int cpuid)
 {
         struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
 
@@ -322,7 +332,7 @@ static void percpu_timer_setup(void);
  * This is the secondary CPU boot entry.  We're using this CPUs
  * idle thread stack, but a set of temporary page tables.
  */
-asmlinkage void __cpuinit secondary_start_kernel(void)
+asmlinkage void secondary_start_kernel(void)
 {
         struct mm_struct *mm = &init_mm;
         unsigned int cpu;
@@ -521,7 +531,7 @@ static void broadcast_timer_set_mode(enum clock_event_mode mode,
 {
 }
 
-static void __cpuinit broadcast_timer_setup(struct clock_event_device *evt)
+static void broadcast_timer_setup(struct clock_event_device *evt)
 {
         evt->name       = "dummy_timer";
         evt->features   = CLOCK_EVT_FEAT_ONESHOT |
@@ -550,7 +560,7 @@ int local_timer_register(struct local_timer_ops *ops)
 }
 #endif
 
-static void __cpuinit percpu_timer_setup(void)
+static void percpu_timer_setup(void)
 {
         unsigned int cpu = smp_processor_id();
         struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu);
diff --git a/arch/arm/kernel/smp_tlb.c b/arch/arm/kernel/smp_tlb.c
index a98b62dca2fa..c2edfff573c2 100644
--- a/arch/arm/kernel/smp_tlb.c
+++ b/arch/arm/kernel/smp_tlb.c
@@ -70,23 +70,6 @@ static inline void ipi_flush_bp_all(void *ignored)
         local_flush_bp_all();
 }
 
-#ifdef CONFIG_ARM_ERRATA_798181
-static int erratum_a15_798181(void)
-{
-        unsigned int midr = read_cpuid_id();
-
-        /* Cortex-A15 r0p0..r3p2 affected */
-        if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2)
-                return 0;
-        return 1;
-}
-#else
-static int erratum_a15_798181(void)
-{
-        return 0;
-}
-#endif
-
 static void ipi_flush_tlb_a15_erratum(void *arg)
 {
         dmb();
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index f6fd1d4398c6..25956204ef23 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -187,7 +187,7 @@ core_initcall(twd_cpufreq_init);
 
 #endif
 
-static void __cpuinit twd_calibrate_rate(void)
+static void twd_calibrate_rate(void)
 {
         unsigned long count;
         u64 waitjiffies;
@@ -265,7 +265,7 @@ static void twd_get_clock(struct device_node *np)
 /*
  * Setup the local clock events for a CPU.
  */
-static int __cpuinit twd_timer_setup(struct clock_event_device *clk)
+static int twd_timer_setup(struct clock_event_device *clk)
 {
         struct clock_event_device **this_cpu_clk;
         int cpu = smp_processor_id();
@@ -308,7 +308,7 @@ static int __cpuinit twd_timer_setup(struct clock_event_device *clk)
         return 0;
 }
 
-static struct local_timer_ops twd_lt_ops __cpuinitdata = {
+static struct local_timer_ops twd_lt_ops = {
         .setup  = twd_timer_setup,
         .stop   = twd_timer_stop,
 };
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index cab094c234ee..ab517fcce21b 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -35,8 +35,6 @@
 #include <asm/tls.h>
 #include <asm/system_misc.h>
 
-#include "signal.h"
-
 static const char *handler[]= { "prefetch abort", "data abort", "address exception", "interrupt" };
 
 void *vectors_page;
@@ -800,15 +798,26 @@ void __init trap_init(void)
         return;
 }
 
-static void __init kuser_get_tls_init(unsigned long vectors)
+#ifdef CONFIG_KUSER_HELPERS
+static void __init kuser_init(void *vectors)
 {
+        extern char __kuser_helper_start[], __kuser_helper_end[];
+        int kuser_sz = __kuser_helper_end - __kuser_helper_start;
+
+        memcpy(vectors + 0x1000 - kuser_sz, __kuser_helper_start, kuser_sz);
+
         /*
          * vectors + 0xfe0 = __kuser_get_tls
          * vectors + 0xfe8 = hardware TLS instruction at 0xffff0fe8
          */
         if (tls_emu || has_tls_reg)
-                memcpy((void *)vectors + 0xfe0, (void *)vectors + 0xfe8, 4);
+                memcpy(vectors + 0xfe0, vectors + 0xfe8, 4);
 }
+#else
+static void __init kuser_init(void *vectors)
+{
+}
+#endif
 
 void __init early_trap_init(void *vectors_base)
 {
@@ -816,33 +825,30 @@ void __init early_trap_init(void *vectors_base)
         unsigned long vectors = (unsigned long)vectors_base;
         extern char __stubs_start[], __stubs_end[];
         extern char __vectors_start[], __vectors_end[];
-        extern char __kuser_helper_start[], __kuser_helper_end[];
-        int kuser_sz = __kuser_helper_end - __kuser_helper_start;
+        unsigned i;
 
         vectors_page = vectors_base;
 
         /*
+         * Poison the vectors page with an undefined instruction.  This
+         * instruction is chosen to be undefined for both ARM and Thumb
+         * ISAs.  The Thumb version is an undefined instruction with a
+         * branch back to the undefined instruction.
+         */
+        for (i = 0; i < PAGE_SIZE / sizeof(u32); i++)
+                ((u32 *)vectors_base)[i] = 0xe7fddef1;
+
+        /*
          * Copy the vectors, stubs and kuser helpers (in entry-armv.S)
          * into the vector page, mapped at 0xffff0000, and ensure these
          * are visible to the instruction stream.
          */
         memcpy((void *)vectors, __vectors_start, __vectors_end - __vectors_start);
-        memcpy((void *)vectors + 0x200, __stubs_start, __stubs_end - __stubs_start);
-        memcpy((void *)vectors + 0x1000 - kuser_sz, __kuser_helper_start, kuser_sz);
+        memcpy((void *)vectors + 0x1000, __stubs_start, __stubs_end - __stubs_start);
 
-        /*
-         * Do processor specific fixups for the kuser helpers
-         */
-        kuser_get_tls_init(vectors);
-
-        /*
-         * Copy signal return handlers into the vector page, and
-         * set sigreturn to be a pointer to these.
-         */
-        memcpy((void *)(vectors + KERN_SIGRETURN_CODE - CONFIG_VECTORS_BASE),
-               sigreturn_codes, sizeof(sigreturn_codes));
+        kuser_init(vectors_base);
 
-        flush_icache_range(vectors, vectors + PAGE_SIZE);
+        flush_icache_range(vectors, vectors + PAGE_SIZE * 2);
         modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
 #else /* ifndef CONFIG_CPU_V7M */
         /*
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index fa25e4e425f6..7bcee5c9b604 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -148,6 +148,23 @@ SECTIONS
         . = ALIGN(PAGE_SIZE);
         __init_begin = .;
 #endif
+        /*
+         * The vectors and stubs are relocatable code, and the
+         * only thing that matters is their relative offsets
+         */
+        __vectors_start = .;
+        .vectors 0 : AT(__vectors_start) {
+                *(.vectors)
+        }
+        . = __vectors_start + SIZEOF(.vectors);
+        __vectors_end = .;
+
+        __stubs_start = .;
+        .stubs 0x1000 : AT(__stubs_start) {
+                *(.stubs)
+        }
+        . = __stubs_start + SIZEOF(.stubs);
+        __stubs_end = .;
 
         INIT_TEXT_SECTION(8)
         .exit.text : {
diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c
index 4a5199070430..db9cf692d4dd 100644
--- a/arch/arm/kvm/coproc.c
+++ b/arch/arm/kvm/coproc.c
@@ -146,7 +146,11 @@ static bool pm_fake(struct kvm_vcpu *vcpu,
 #define access_pmintenclr pm_fake
 
 /* Architected CP15 registers.
- * Important: Must be sorted ascending by CRn, CRM, Op1, Op2
+ * CRn denotes the primary register number, but is copied to the CRm in the
+ * user space API for 64-bit register access in line with the terminology used
+ * in the ARM ARM.
+ * Important: Must be sorted ascending by CRn, CRM, Op1, Op2 and with 64-bit
+ *            registers preceding 32-bit ones.
  */
 static const struct coproc_reg cp15_regs[] = {
         /* CSSELR: swapped by interrupt.S. */
@@ -154,8 +158,8 @@ static const struct coproc_reg cp15_regs[] = {
                         NULL, reset_unknown, c0_CSSELR },
 
         /* TTBR0/TTBR1: swapped by interrupt.S. */
-        { CRm( 2), Op1( 0), is64, NULL, reset_unknown64, c2_TTBR0 },
-        { CRm( 2), Op1( 1), is64, NULL, reset_unknown64, c2_TTBR1 },
+        { CRm64( 2), Op1( 0), is64, NULL, reset_unknown64, c2_TTBR0 },
+        { CRm64( 2), Op1( 1), is64, NULL, reset_unknown64, c2_TTBR1 },
 
         /* TTBCR: swapped by interrupt.S. */
         { CRn( 2), CRm( 0), Op1( 0), Op2( 2), is32,
@@ -182,7 +186,7 @@ static const struct coproc_reg cp15_regs[] = {
                         NULL, reset_unknown, c6_IFAR },
 
         /* PAR swapped by interrupt.S */
-        { CRn( 7), Op1( 0), is64, NULL, reset_unknown64, c7_PAR },
+        { CRm64( 7), Op1( 0), is64, NULL, reset_unknown64, c7_PAR },
 
         /*
          * DC{C,I,CI}SW operations:
@@ -399,12 +403,13 @@ static bool index_to_params(u64 id, struct coproc_params *params)
                               | KVM_REG_ARM_OPC1_MASK))
                         return false;
                 params->is_64bit = true;
-                params->CRm = ((id & KVM_REG_ARM_CRM_MASK)
+                /* CRm to CRn: see cp15_to_index for details */
+                params->CRn = ((id & KVM_REG_ARM_CRM_MASK)
                                >> KVM_REG_ARM_CRM_SHIFT);
                 params->Op1 = ((id & KVM_REG_ARM_OPC1_MASK)
                                >> KVM_REG_ARM_OPC1_SHIFT);
                 params->Op2 = 0;
-                params->CRn = 0;
+                params->CRm = 0;
                 return true;
         default:
                 return false;
@@ -898,7 +903,14 @@ static u64 cp15_to_index(const struct coproc_reg *reg)
         if (reg->is_64) {
                 val |= KVM_REG_SIZE_U64;
                 val |= (reg->Op1 << KVM_REG_ARM_OPC1_SHIFT);
-                val |= (reg->CRm << KVM_REG_ARM_CRM_SHIFT);
+                /*
+                 * CRn always denotes the primary coproc. reg. nr. for the
+                 * in-kernel representation, but the user space API uses the
+                 * CRm for the encoding, because it is modelled after the
+                 * MRRC/MCRR instructions: see the ARM ARM rev. c page
+                 * B3-1445
+                 */
+                val |= (reg->CRn << KVM_REG_ARM_CRM_SHIFT);
         } else {
                 val |= KVM_REG_SIZE_U32;
                 val |= (reg->Op1 << KVM_REG_ARM_OPC1_SHIFT);
diff --git a/arch/arm/kvm/coproc.h b/arch/arm/kvm/coproc.h
index b7301d3e4799..0461d5c8d3de 100644
--- a/arch/arm/kvm/coproc.h
+++ b/arch/arm/kvm/coproc.h
@@ -135,6 +135,8 @@ static inline int cmp_reg(const struct coproc_reg *i1,
                 return -1;
         if (i1->CRn != i2->CRn)
                 return i1->CRn - i2->CRn;
+        if (i1->is_64 != i2->is_64)
+                return i2->is_64 - i1->is_64;
         if (i1->CRm != i2->CRm)
                 return i1->CRm - i2->CRm;
         if (i1->Op1 != i2->Op1)
@@ -145,6 +147,7 @@ static inline int cmp_reg(const struct coproc_reg *i1,
 
 #define CRn(_x)         .CRn = _x
 #define CRm(_x)         .CRm = _x
+#define CRm64(_x)       .CRn = _x, .CRm = 0
 #define Op1(_x)         .Op1 = _x
 #define Op2(_x)         .Op2 = _x
 #define is64            .is_64 = true
diff --git a/arch/arm/kvm/coproc_a15.c b/arch/arm/kvm/coproc_a15.c
index 685063a6d0cf..cf93472b9dd6 100644
--- a/arch/arm/kvm/coproc_a15.c
+++ b/arch/arm/kvm/coproc_a15.c
@@ -114,7 +114,11 @@ static bool access_l2ectlr(struct kvm_vcpu *vcpu,
 
 /*
  * A15-specific CP15 registers.
- * Important: Must be sorted ascending by CRn, CRM, Op1, Op2
+ * CRn denotes the primary register number, but is copied to the CRm in the
+ * user space API for 64-bit register access in line with the terminology used
+ * in the ARM ARM.
+ * Important: Must be sorted ascending by CRn, CRM, Op1, Op2 and with 64-bit
+ *            registers preceding 32-bit ones.
  */
 static const struct coproc_reg a15_regs[] = {
         /* MPIDR: we use VMPIDR for guest access. */
diff --git a/arch/arm/kvm/mmio.c b/arch/arm/kvm/mmio.c
index b8e06b7a2833..0c25d9487d53 100644
--- a/arch/arm/kvm/mmio.c
+++ b/arch/arm/kvm/mmio.c
@@ -63,7 +63,8 @@ int kvm_handle_mmio_return(struct kvm_vcpu *vcpu, struct kvm_run *run)
 static int decode_hsr(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
                       struct kvm_exit_mmio *mmio)
 {
-        unsigned long rt, len;
+        unsigned long rt;
+        int len;
         bool is_write, sign_extend;
 
         if (kvm_vcpu_dabt_isextabt(vcpu)) {
diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
index ca6bea4859b4..0988d9e04dd4 100644
--- a/arch/arm/kvm/mmu.c
+++ b/arch/arm/kvm/mmu.c
@@ -85,6 +85,12 @@ static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
         return p;
 }
 
+static bool page_empty(void *ptr)
+{
+        struct page *ptr_page = virt_to_page(ptr);
+        return page_count(ptr_page) == 1;
+}
+
 static void clear_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr)
 {
         pmd_t *pmd_table = pmd_offset(pud, 0);
@@ -103,12 +109,6 @@ static void clear_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr)
         put_page(virt_to_page(pmd));
 }
 
-static bool pmd_empty(pmd_t *pmd)
-{
-        struct page *pmd_page = virt_to_page(pmd);
-        return page_count(pmd_page) == 1;
-}
-
 static void clear_pte_entry(struct kvm *kvm, pte_t *pte, phys_addr_t addr)
 {
         if (pte_present(*pte)) {
@@ -118,12 +118,6 @@ static void clear_pte_entry(struct kvm *kvm, pte_t *pte, phys_addr_t addr)
         }
 }
 
-static bool pte_empty(pte_t *pte)
-{
-        struct page *pte_page = virt_to_page(pte);
-        return page_count(pte_page) == 1;
-}
-
 static void unmap_range(struct kvm *kvm, pgd_t *pgdp,
                         unsigned long long start, u64 size)
 {
@@ -132,37 +126,37 @@ static void unmap_range(struct kvm *kvm, pgd_t *pgdp,
         pmd_t *pmd;
         pte_t *pte;
         unsigned long long addr = start, end = start + size;
-        u64 range;
+        u64 next;
 
         while (addr < end) {
                 pgd = pgdp + pgd_index(addr);
                 pud = pud_offset(pgd, addr);
                 if (pud_none(*pud)) {
-                        addr += PUD_SIZE;
+                        addr = pud_addr_end(addr, end);
                         continue;
                 }
 
                 pmd = pmd_offset(pud, addr);
                 if (pmd_none(*pmd)) {
-                        addr += PMD_SIZE;
+                        addr = pmd_addr_end(addr, end);
                         continue;
                 }
 
                 pte = pte_offset_kernel(pmd, addr);
                 clear_pte_entry(kvm, pte, addr);
-                range = PAGE_SIZE;
+                next = addr + PAGE_SIZE;
 
                 /* If we emptied the pte, walk back up the ladder */
-                if (pte_empty(pte)) {
+                if (page_empty(pte)) {
                         clear_pmd_entry(kvm, pmd, addr);
-                        range = PMD_SIZE;
-                        if (pmd_empty(pmd)) {
+                        next = pmd_addr_end(addr, end);
+                        if (page_empty(pmd) && !page_empty(pud)) {
                                 clear_pud_entry(kvm, pud, addr);
-                                range = PUD_SIZE;
+                                next = pud_addr_end(addr, end);
                         }
                 }
 
-                addr += range;
+                addr = next;
         }
 }
 
diff --git a/arch/arm/lib/delay.c b/arch/arm/lib/delay.c
index 64dbfa57204a..5306de350133 100644
--- a/arch/arm/lib/delay.c
+++ b/arch/arm/lib/delay.c
@@ -86,7 +86,7 @@ void __init register_current_timer_delay(const struct delay_timer *timer)
         }
 }
 
-unsigned long __cpuinit calibrate_delay_is_known(void)
+unsigned long calibrate_delay_is_known(void)
 {
         delay_calibrated = true;
         return lpj_fine;
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index 2abee6626aac..916e5a142917 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -227,6 +227,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("usart", "f8020000.serial", &usart1_clk),
         CLKDEV_CON_DEV_ID("usart", "f8024000.serial", &usart2_clk),
         CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk),
+        CLKDEV_CON_DEV_ID("usart", "f8040000.serial", &uart0_clk),
+        CLKDEV_CON_DEV_ID("usart", "f8044000.serial", &uart1_clk),
         CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb0_clk),
         CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk),
         CLKDEV_CON_DEV_ID("mci_clk", "f0008000.mmc", &mmc0_clk),
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index dff4ddc5ef81..139e42da25f0 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -75,6 +75,7 @@ static struct davinci_nand_pdata davinci_nand_data = {
         .parts                  = davinci_nand_partitions,
         .nr_parts               = ARRAY_SIZE(davinci_nand_partitions),
         .ecc_mode               = NAND_ECC_HW_SYNDROME,
+        .ecc_bits               = 4,
         .bbt_options            = NAND_BBT_USE_FLASH,
 };
 
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index afbc439f11d4..4cdb61c54459 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -505,7 +505,7 @@ static struct vpbe_output dm365evm_vpbe_outputs[] = {
 /*
  * Amplifiers on the board
  */
-struct ths7303_platform_data ths7303_pdata = {
+static struct ths7303_platform_data ths7303_pdata = {
         .ch_1 = 3,
         .ch_2 = 3,
         .ch_3 = 3,
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index a33686a6fbb2..fa4bfaf952d8 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -153,6 +153,7 @@ static struct davinci_nand_pdata davinci_evm_nandflash_data = {
         .parts          = davinci_evm_nandflash_partition,
         .nr_parts       = ARRAY_SIZE(davinci_evm_nandflash_partition),
         .ecc_mode       = NAND_ECC_HW,
+        .ecc_bits       = 1,
         .bbt_options    = NAND_BBT_USE_FLASH,
         .timing         = &davinci_evm_nandflash_timing,
 };
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index fbb8e5ab1dc1..0c005e876cac 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -90,6 +90,7 @@ static struct davinci_nand_pdata davinci_nand_data = {
         .parts                  = davinci_nand_partitions,
         .nr_parts               = ARRAY_SIZE(davinci_nand_partitions),
         .ecc_mode               = NAND_ECC_HW,
+        .ecc_bits               = 1,
         .options                = 0,
 };
 
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 2bc112adf565..808233b60e3d 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -88,6 +88,7 @@ static struct davinci_nand_pdata davinci_ntosd2_nandflash_data = {
         .parts          = davinci_ntosd2_nandflash_partition,
         .nr_parts       = ARRAY_SIZE(davinci_ntosd2_nandflash_partition),
         .ecc_mode       = NAND_ECC_HW,
+        .ecc_bits       = 1,
         .bbt_options    = NAND_BBT_USE_FLASH,
 };
 
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 42ef53f62c6c..86100d179694 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -860,7 +860,7 @@ static struct platform_device dm355_vpbe_display = {
         },
 };
 
-struct venc_platform_data dm355_venc_pdata = {
+static struct venc_platform_data dm355_venc_pdata = {
         .setup_pinmux   = dm355_vpbe_setup_pinmux,
         .setup_clock    = dm355_venc_setup_clock,
 };
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index fa7af5eda52d..dad28029ba9b 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1349,7 +1349,7 @@ static struct platform_device dm365_vpbe_display = {
         },
 };
 
-struct venc_platform_data dm365_venc_pdata = {
+static struct venc_platform_data dm365_venc_pdata = {
         .setup_pinmux   = dm365_vpbe_setup_pinmux,
         .setup_clock    = dm365_venc_setup_clock,
 };
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 855d4a7b462d..56fe819ee10b 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -36,6 +36,7 @@ config CPU_EXYNOS4210
         bool "SAMSUNG EXYNOS4210"
         default y
         depends on ARCH_EXYNOS4
+        select ARCH_HAS_BANDGAP
         select ARM_CPU_SUSPEND if PM
         select PINCTRL_EXYNOS
         select PM_GENERIC_DOMAINS if PM
@@ -49,7 +50,9 @@ config SOC_EXYNOS4212
         bool "SAMSUNG EXYNOS4212"
         default y
         depends on ARCH_EXYNOS4
+        select ARCH_HAS_BANDGAP
         select PINCTRL_EXYNOS
+        select PM_GENERIC_DOMAINS if PM
         select S5P_PM if PM
         select S5P_SLEEP if PM
         select SAMSUNG_DMADEV
@@ -60,7 +63,9 @@ config SOC_EXYNOS4412
         bool "SAMSUNG EXYNOS4412"
         default y
         depends on ARCH_EXYNOS4
+        select ARCH_HAS_BANDGAP
         select PINCTRL_EXYNOS
+        select PM_GENERIC_DOMAINS if PM
         select SAMSUNG_DMADEV
         help
           Enable EXYNOS4412 SoC support
@@ -69,6 +74,7 @@ config SOC_EXYNOS5250
         bool "SAMSUNG EXYNOS5250"
         default y
         depends on ARCH_EXYNOS5
+        select ARCH_HAS_BANDGAP
         select PINCTRL_EXYNOS
         select PM_GENERIC_DOMAINS if PM
         select S5P_PM if PM
@@ -92,6 +98,8 @@ config SOC_EXYNOS5440
         bool "SAMSUNG EXYNOS5440"
         default y
         depends on ARCH_EXYNOS5
+        select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
+        select ARCH_HAS_BANDGAP
         select ARCH_HAS_OPP
         select HAVE_ARM_ARCH_TIMER
         select AUTO_ZRELADDR
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index e970a7a4e278..53696154aead 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -14,7 +14,7 @@ obj-				:=
 
 obj-$(CONFIG_ARCH_EXYNOS)       += common.o
 
-obj-$(CONFIG_PM)                += pm.o
+obj-$(CONFIG_S5P_PM)            += pm.o
 obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
 obj-$(CONFIG_CPU_IDLE)          += cpuidle.o
 
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 164685bd25c8..ba95e5db2501 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -58,7 +58,6 @@ static const char name_exynos5440[] = "EXYNOS5440";
 
 static void exynos4_map_io(void);
 static void exynos5_map_io(void);
-static void exynos5440_map_io(void);
 static int exynos_init(void);
 
 static struct cpu_table cpu_ids[] __initdata = {
@@ -95,7 +94,6 @@ static struct cpu_table cpu_ids[] __initdata = {
         }, {
                 .idcode         = EXYNOS5440_SOC_ID,
                 .idmask         = EXYNOS5_SOC_MASK,
-                .map_io         = exynos5440_map_io,
                 .init           = exynos_init,
                 .name           = name_exynos5440,
         },
@@ -150,11 +148,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
                 .length         = SZ_64K,
                 .type           = MT_DEVICE,
         }, {
-                .virtual        = (unsigned long)S3C_VA_UART,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_UART),
-                .length         = SZ_512K,
-                .type           = MT_DEVICE,
-        }, {
                 .virtual        = (unsigned long)S5P_VA_CMU,
                 .pfn            = __phys_to_pfn(EXYNOS4_PA_CMU),
                 .length         = SZ_128K,
@@ -268,20 +261,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
                 .pfn            = __phys_to_pfn(EXYNOS5_PA_PMU),
                 .length         = SZ_64K,
                 .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_UART,
-                .pfn            = __phys_to_pfn(EXYNOS5_PA_UART),
-                .length         = SZ_512K,
-                .type           = MT_DEVICE,
-        },
-};
-
-static struct map_desc exynos5440_iodesc0[] __initdata = {
-        {
-                .virtual        = (unsigned long)S3C_VA_UART,
-                .pfn            = __phys_to_pfn(EXYNOS5440_PA_UART0),
-                .length         = SZ_512K,
-                .type           = MT_DEVICE,
         },
 };
 
@@ -388,11 +367,6 @@ static void __init exynos5_map_io(void)
                 iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
 }
 
-static void __init exynos5440_map_io(void)
-{
-        iotable_init(exynos5440_iodesc0, ARRAY_SIZE(exynos5440_iodesc0));
-}
-
 void __init exynos_init_time(void)
 {
         of_clk_init(NULL);
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 3e156bcddcb4..972490fc09d6 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -97,6 +97,5 @@ struct exynos_pmu_conf {
 };
 
 extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
-extern void s3c_cpu_resume(void);
 
 #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index 17a18ff3d71e..ac139226d63c 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -25,6 +25,7 @@
 #include <mach/regs-pmu.h>
 
 #include <plat/cpu.h>
+#include <plat/pm.h>
 
 #include "common.h"
 
@@ -199,6 +200,9 @@ static int __init exynos4_init_cpuidle(void)
         if (soc_is_exynos5250())
                 exynos5_core_down_clk();
 
+        if (soc_is_exynos5440())
+                exynos4_idle_driver.state_count = 1;
+
         ret = cpuidle_register_driver(&exynos4_idle_driver);
         if (ret) {
                 printk(KERN_ERR "CPUidle failed to register driver\n");
diff --git a/arch/arm/mach-exynos/headsmp.S b/arch/arm/mach-exynos/headsmp.S
index 5364d4bfa8bc..cdd9d91e9933 100644
--- a/arch/arm/mach-exynos/headsmp.S
+++ b/arch/arm/mach-exynos/headsmp.S
@@ -13,8 +13,6 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 
-        __CPUINIT
-
 /*
  * exynos4 specific entry point for secondary CPUs.  This provides
  * a "holding pen" into which all secondary cores are held until we're
diff --git a/arch/arm/mach-exynos/include/mach/memory.h b/arch/arm/mach-exynos/include/mach/memory.h
index 374ef2cf7152..2a4cdb7cb326 100644
--- a/arch/arm/mach-exynos/include/mach/memory.h
+++ b/arch/arm/mach-exynos/include/mach/memory.h
@@ -15,8 +15,13 @@
 
 #define PLAT_PHYS_OFFSET                UL(0x40000000)
 
+#ifndef CONFIG_ARM_LPAE
 /* Maximum of 256MiB in one bank */
 #define MAX_PHYSMEM_BITS        32
 #define SECTION_SIZE_BITS       28
+#else
+#define MAX_PHYSMEM_BITS        36
+#define SECTION_SIZE_BITS       31
+#endif
 
 #endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index deba1308ff16..58b43e6f9262 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -75,7 +75,7 @@ static void __iomem *scu_base_addr(void)
 
 static DEFINE_SPINLOCK(boot_lock);
 
-static void __cpuinit exynos_secondary_init(unsigned int cpu)
+static void exynos_secondary_init(unsigned int cpu)
 {
         /*
          * let the primary processor know we're out of the
@@ -90,7 +90,7 @@ static void __cpuinit exynos_secondary_init(unsigned int cpu)
         spin_unlock(&boot_lock);
 }
 
-static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long timeout;
         unsigned long phys_cpu = cpu_logical_map(cpu);
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 41c20692a13f..c679db577269 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -217,6 +217,9 @@ static __init int exynos_pm_drvinit(void)
         struct clk *pll_base;
         unsigned int tmp;
 
+        if (soc_is_exynos5440())
+                return 0;
+
         s3c_pm_init();
 
         /* All wakeup disable */
@@ -340,6 +343,9 @@ static struct syscore_ops exynos_pm_syscore_ops = {
 
 static __init int exynos_pm_syscore_init(void)
 {
+        if (soc_is_exynos5440())
+                return 0;
+
         register_syscore_ops(&exynos_pm_syscore_ops);
         return 0;
 }
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index a7cd2cf5e08d..3490a24f969e 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -276,8 +276,6 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys)
 
         sys->mem_offset  = DC21285_PCI_MEM;
 
-        pci_ioremap_io(0, DC21285_PCI_IO);
-
         pci_add_resource_offset(&sys->resources, &res[0], sys->mem_offset);
         pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
 
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index dc5d6becd8c7..88815795fe26 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -115,6 +115,7 @@ static int highbank_platform_notifier(struct notifier_block *nb,
 {
         struct resource *res;
         int reg = -1;
+        u32 val;
         struct device *dev = __dev;
 
         if (event != BUS_NOTIFY_ADD_DEVICE)
@@ -141,10 +142,10 @@ static int highbank_platform_notifier(struct notifier_block *nb,
                 return NOTIFY_DONE;
 
         if (of_property_read_bool(dev->of_node, "dma-coherent")) {
-                writel(0xff31, sregs_base + reg);
+                val = readl(sregs_base + reg);
+                writel(val | 0xff01, sregs_base + reg);
                 set_dma_ops(dev, &arm_coherent_dma_ops);
-        } else
-                writel(0, sregs_base + reg);
+        }
 
         return NOTIFY_OK;
 }
diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c
index a984573e0d02..32d75cf55cbc 100644
--- a/arch/arm/mach-highbank/platsmp.c
+++ b/arch/arm/mach-highbank/platsmp.c
@@ -24,7 +24,7 @@
 
 extern void secondary_startup(void);
 
-static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         highbank_set_cpu_jump(cpu, secondary_startup);
         arch_send_wakeup_ipi_mask(cpumask_of(cpu));
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 4282e99f5ca1..86567d980b07 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -199,7 +199,8 @@ static const char *pcie_axi_sels[]	= { "axi", "ahb", };
 static const char *ssi_sels[]           = { "pll3_pfd2_508m", "pll3_pfd3_454m", "pll4_post_div", };
 static const char *usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", };
 static const char *enfc_sels[]  = { "pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", };
-static const char *emi_sels[]           = { "axi", "pll3_usb_otg", "pll2_pfd2_396m", "pll2_pfd0_352m", };
+static const char *emi_sels[]           = { "pll2_pfd2_396m", "pll3_usb_otg", "axi", "pll2_pfd0_352m", };
+static const char *emi_slow_sels[]      = { "axi", "pll3_usb_otg", "pll2_pfd2_396m", "pll2_pfd0_352m", };
 static const char *vdo_axi_sels[]       = { "axi", "ahb", };
 static const char *vpu_axi_sels[]       = { "axi", "pll2_pfd2_396m", "pll2_pfd0_352m", };
 static const char *cko1_sels[]  = { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5_video_div",
@@ -392,7 +393,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
         clk[usdhc4_sel]       = imx_clk_mux("usdhc4_sel",       base + 0x1c, 19, 1, usdhc_sels,        ARRAY_SIZE(usdhc_sels));
         clk[enfc_sel]         = imx_clk_mux("enfc_sel",         base + 0x2c, 16, 2, enfc_sels,         ARRAY_SIZE(enfc_sels));
         clk[emi_sel]          = imx_clk_mux("emi_sel",          base + 0x1c, 27, 2, emi_sels,          ARRAY_SIZE(emi_sels));
-        clk[emi_slow_sel]     = imx_clk_mux("emi_slow_sel",     base + 0x1c, 29, 2, emi_sels,          ARRAY_SIZE(emi_sels));
+        clk[emi_slow_sel]     = imx_clk_mux("emi_slow_sel",     base + 0x1c, 29, 2, emi_slow_sels,     ARRAY_SIZE(emi_slow_sels));
         clk[vdo_axi_sel]      = imx_clk_mux("vdo_axi_sel",      base + 0x18, 11, 1, vdo_axi_sels,      ARRAY_SIZE(vdo_axi_sels));
         clk[vpu_axi_sel]      = imx_clk_mux("vpu_axi_sel",      base + 0x18, 14, 2, vpu_axi_sels,      ARRAY_SIZE(vpu_axi_sels));
         clk[cko1_sel]         = imx_clk_mux("cko1_sel",         base + 0x60, 0,  4, cko1_sels,         ARRAY_SIZE(cko1_sels));
diff --git a/arch/arm/mach-imx/clk-vf610.c b/arch/arm/mach-imx/clk-vf610.c
index d617c0b7c809..b169a396d93b 100644
--- a/arch/arm/mach-imx/clk-vf610.c
+++ b/arch/arm/mach-imx/clk-vf610.c
@@ -183,6 +183,8 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
         clk[VF610_CLK_ENET_TS_SEL] = imx_clk_mux("enet_ts_sel", CCM_CSCMR2, 0, 3, enet_ts_sels, 7);
         clk[VF610_CLK_ENET] = imx_clk_gate("enet", "enet_sel", CCM_CSCDR1, 24);
         clk[VF610_CLK_ENET_TS] = imx_clk_gate("enet_ts", "enet_ts_sel", CCM_CSCDR1, 23);
+        clk[VF610_CLK_ENET0] = imx_clk_gate2("enet0", "ipg_bus", CCM_CCGR9, CCM_CCGRx_CGn(0));
+        clk[VF610_CLK_ENET1] = imx_clk_gate2("enet1", "ipg_bus", CCM_CCGR9, CCM_CCGRx_CGn(1));
 
         clk[VF610_CLK_PIT] = imx_clk_gate2("pit", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(7));
 
diff --git a/arch/arm/mach-imx/mx27.h b/arch/arm/mach-imx/mx27.h
index e074616d54ca..8a65f192e7f3 100644
--- a/arch/arm/mach-imx/mx27.h
+++ b/arch/arm/mach-imx/mx27.h
@@ -135,7 +135,7 @@
 #define MX27_INT_GPT4           (NR_IRQS_LEGACY + 4)
 #define MX27_INT_RTIC           (NR_IRQS_LEGACY + 5)
 #define MX27_INT_CSPI3          (NR_IRQS_LEGACY + 6)
-#define MX27_INT_SDHC           (NR_IRQS_LEGACY + 7)
+#define MX27_INT_MSHC           (NR_IRQS_LEGACY + 7)
 #define MX27_INT_GPIO           (NR_IRQS_LEGACY + 8)
 #define MX27_INT_SDHC3          (NR_IRQS_LEGACY + 9)
 #define MX27_INT_SDHC2          (NR_IRQS_LEGACY + 10)
diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c
index c6e1ab544882..1f24c1fdfea4 100644
--- a/arch/arm/mach-imx/platsmp.c
+++ b/arch/arm/mach-imx/platsmp.c
@@ -53,7 +53,7 @@ void imx_scu_standby_enable(void)
         writel_relaxed(val, scu_base);
 }
 
-static int __cpuinit imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         imx_set_cpu_jump(cpu, v7_secondary_startup);
         imx_enable_cpu(cpu, true);
diff --git a/arch/arm/mach-keystone/keystone.c b/arch/arm/mach-keystone/keystone.c
index fe4d9ff93a7e..b661c5c2870a 100644
--- a/arch/arm/mach-keystone/keystone.c
+++ b/arch/arm/mach-keystone/keystone.c
@@ -49,7 +49,7 @@ static const char *keystone_match[] __initconst = {
         NULL,
 };
 
-void keystone_restart(char mode, const char *cmd)
+void keystone_restart(enum reboot_mode mode, const char *cmd)
 {
         u32 val;
 
diff --git a/arch/arm/mach-keystone/platsmp.c b/arch/arm/mach-keystone/platsmp.c
index 1d4181e1daf2..14378e3fef16 100644
--- a/arch/arm/mach-keystone/platsmp.c
+++ b/arch/arm/mach-keystone/platsmp.c
@@ -21,7 +21,7 @@
 
 #include "keystone.h"
 
-static int __cpuinit keystone_smp_boot_secondary(unsigned int cpu,
+static int keystone_smp_boot_secondary(unsigned int cpu,
                                                 struct task_struct *idle)
 {
         unsigned long start = virt_to_phys(&secondary_startup);
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
index 095c155d6fb8..9b702a1dc7b0 100644
--- a/arch/arm/mach-mmp/Makefile
+++ b/arch/arm/mach-mmp/Makefile
@@ -2,7 +2,7 @@
 # Makefile for Marvell's PXA168 processors line
 #
 
-obj-y                           += common.o devices.o time.o irq.o
+obj-y                           += common.o devices.o time.o
 
 # SoC support
 obj-$(CONFIG_CPU_PXA168)        += pxa168.o
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h
index 991d7e9877de..cf445bae6d77 100644
--- a/arch/arm/mach-mmp/common.h
+++ b/arch/arm/mach-mmp/common.h
@@ -3,7 +3,6 @@
 
 extern void timer_init(int irq);
 
-extern void __init icu_init_irq(void);
 extern void __init mmp_map_io(void);
 extern void mmp_restart(enum reboot_mode, const char *);
 extern void __init pxa168_clk_init(void);
diff --git a/arch/arm/mach-mmp/include/mach/entry-macro.S b/arch/arm/mach-mmp/include/mach/entry-macro.S
deleted file mode 100644
index bd152e24e6d7..000000000000
--- a/arch/arm/mach-mmp/include/mach/entry-macro.S
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * linux/arch/arm/mach-mmp/include/mach/entry-macro.S
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <asm/irq.h>
-#include <mach/regs-icu.h>
-
-        .macro  get_irqnr_preamble, base, tmp
-        mrc     p15, 0, \tmp, c0, c0, 0         @ CPUID
-        and     \tmp, \tmp, #0xff00
-        cmp     \tmp, #0x5800
-        ldr     \base, =mmp_icu_base
-        ldr     \base, [\base, #0]
-        addne   \base, \base, #0x10c            @ PJ1 AP INT SEL register
-        addeq   \base, \base, #0x104            @ PJ4 IRQ SEL register
-        .endm
-
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        ldr     \tmp, [\base, #0]
-        and     \irqnr, \tmp, #0x3f
-        tst     \tmp, #(1 << 6)
-        .endm
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index 459c2d03eb5c..a83ba7cb525d 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -4,6 +4,7 @@
 #include <linux/reboot.h>
 
 extern void pxa168_timer_init(void);
+extern void __init icu_init_irq(void);
 extern void __init pxa168_init_irq(void);
 extern void pxa168_restart(enum reboot_mode, const char *);
 extern void pxa168_clear_keypad_wakeup(void);
diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h
index b914afa1fcdc..92253203f5b4 100644
--- a/arch/arm/mach-mmp/include/mach/pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/pxa910.h
@@ -2,6 +2,7 @@
 #define __ASM_MACH_PXA910_H
 
 extern void pxa910_timer_init(void);
+extern void __init icu_init_irq(void);
 extern void __init pxa910_init_irq(void);
 
 #include <linux/i2c.h>
diff --git a/arch/arm/mach-mmp/irq.c b/arch/arm/mach-mmp/irq.c
deleted file mode 100644
index 3c71246cd994..000000000000
--- a/arch/arm/mach-mmp/irq.c
+++ /dev/null
@@ -1,463 +0,0 @@
-/*
- *  linux/arch/arm/mach-mmp/irq.c
- *
- *  Generic IRQ handling, GPIO IRQ demultiplexing, etc.
- *  Copyright (C) 2008 - 2012 Marvell Technology Group Ltd.
- *
- *  Author:     Bin Yang <bin.yang@marvell.com>
- *              Haojian Zhuang <haojian.zhuang@gmail.com>
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  published by the Free Software Foundation.
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/irqdomain.h>
-#include <linux/io.h>
-#include <linux/ioport.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
-
-#include <mach/irqs.h>
-
-#ifdef CONFIG_CPU_MMP2
-#include <mach/pm-mmp2.h>
-#endif
-#ifdef CONFIG_CPU_PXA910
-#include <mach/pm-pxa910.h>
-#endif
-
-#include "common.h"
-
-#define MAX_ICU_NR              16
-
-struct icu_chip_data {
-        int                     nr_irqs;
-        unsigned int            virq_base;
-        unsigned int            cascade_irq;
-        void __iomem            *reg_status;
-        void __iomem            *reg_mask;
-        unsigned int            conf_enable;
-        unsigned int            conf_disable;
-        unsigned int            conf_mask;
-        unsigned int            clr_mfp_irq_base;
-        unsigned int            clr_mfp_hwirq;
-        struct irq_domain       *domain;
-};
-
-struct mmp_intc_conf {
-        unsigned int    conf_enable;
-        unsigned int    conf_disable;
-        unsigned int    conf_mask;
-};
-
-void __iomem *mmp_icu_base;
-static struct icu_chip_data icu_data[MAX_ICU_NR];
-static int max_icu_nr;
-
-extern void mmp2_clear_pmic_int(void);
-
-static void icu_mask_ack_irq(struct irq_data *d)
-{
-        struct irq_domain *domain = d->domain;
-        struct icu_chip_data *data = (struct icu_chip_data *)domain->host_data;
-        int hwirq;
-        u32 r;
-
-        hwirq = d->irq - data->virq_base;
-        if (data == &icu_data[0]) {
-                r = readl_relaxed(mmp_icu_base + (hwirq << 2));
-                r &= ~data->conf_mask;
-                r |= data->conf_disable;
-                writel_relaxed(r, mmp_icu_base + (hwirq << 2));
-        } else {
-#ifdef CONFIG_CPU_MMP2
-                if ((data->virq_base == data->clr_mfp_irq_base)
-                        && (hwirq == data->clr_mfp_hwirq))
-                        mmp2_clear_pmic_int();
-#endif
-                r = readl_relaxed(data->reg_mask) | (1 << hwirq);
-                writel_relaxed(r, data->reg_mask);
-        }
-}
-
-static void icu_mask_irq(struct irq_data *d)
-{
-        struct irq_domain *domain = d->domain;
-        struct icu_chip_data *data = (struct icu_chip_data *)domain->host_data;
-        int hwirq;
-        u32 r;
-
-        hwirq = d->irq - data->virq_base;
-        if (data == &icu_data[0]) {
-                r = readl_relaxed(mmp_icu_base + (hwirq << 2));
-                r &= ~data->conf_mask;
-                r |= data->conf_disable;
-                writel_relaxed(r, mmp_icu_base + (hwirq << 2));
-        } else {
-                r = readl_relaxed(data->reg_mask) | (1 << hwirq);
-                writel_relaxed(r, data->reg_mask);
-        }
-}
-
-static void icu_unmask_irq(struct irq_data *d)
-{
-        struct irq_domain *domain = d->domain;
-        struct icu_chip_data *data = (struct icu_chip_data *)domain->host_data;
-        int hwirq;
-        u32 r;
-
-        hwirq = d->irq - data->virq_base;
-        if (data == &icu_data[0]) {
-                r = readl_relaxed(mmp_icu_base + (hwirq << 2));
-                r &= ~data->conf_mask;
-                r |= data->conf_enable;
-                writel_relaxed(r, mmp_icu_base + (hwirq << 2));
-        } else {
-                r = readl_relaxed(data->reg_mask) & ~(1 << hwirq);
-                writel_relaxed(r, data->reg_mask);
-        }
-}
-
-static struct irq_chip icu_irq_chip = {
-        .name           = "icu_irq",
-        .irq_mask       = icu_mask_irq,
-        .irq_mask_ack   = icu_mask_ack_irq,
-        .irq_unmask     = icu_unmask_irq,
-};
-
-static void icu_mux_irq_demux(unsigned int irq, struct irq_desc *desc)
-{
-        struct irq_domain *domain;
-        struct icu_chip_data *data;
-        int i;
-        unsigned long mask, status, n;
-
-        for (i = 1; i < max_icu_nr; i++) {
-                if (irq == icu_data[i].cascade_irq) {
-                        domain = icu_data[i].domain;
-                        data = (struct icu_chip_data *)domain->host_data;
-                        break;
-                }
-        }
-        if (i >= max_icu_nr) {
-                pr_err("Spurious irq %d in MMP INTC\n", irq);
-                return;
-        }
-
-        mask = readl_relaxed(data->reg_mask);
-        while (1) {
-                status = readl_relaxed(data->reg_status) & ~mask;
-                if (status == 0)
-                        break;
-                for_each_set_bit(n, &status, BITS_PER_LONG) {
-                        generic_handle_irq(icu_data[i].virq_base + n);
-                }
-        }
-}
-
-static int mmp_irq_domain_map(struct irq_domain *d, unsigned int irq,
-                              irq_hw_number_t hw)
-{
-        irq_set_chip_and_handler(irq, &icu_irq_chip, handle_level_irq);
-        set_irq_flags(irq, IRQF_VALID);
-        return 0;
-}
-
-static int mmp_irq_domain_xlate(struct irq_domain *d, struct device_node *node,
-                                const u32 *intspec, unsigned int intsize,
-                                unsigned long *out_hwirq,
-                                unsigned int *out_type)
-{
-        *out_hwirq = intspec[0];
-        return 0;
-}
-
-const struct irq_domain_ops mmp_irq_domain_ops = {
-        .map            = mmp_irq_domain_map,
-        .xlate          = mmp_irq_domain_xlate,
-};
-
-static struct mmp_intc_conf mmp_conf = {
-        .conf_enable    = 0x51,
-        .conf_disable   = 0x0,
-        .conf_mask      = 0x7f,
-};
-
-static struct mmp_intc_conf mmp2_conf = {
-        .conf_enable    = 0x20,
-        .conf_disable   = 0x0,
-        .conf_mask      = 0x7f,
-};
-
-/* MMP (ARMv5) */
-void __init icu_init_irq(void)
-{
-        int irq;
-
-        max_icu_nr = 1;
-        mmp_icu_base = ioremap(0xd4282000, 0x1000);
-        icu_data[0].conf_enable = mmp_conf.conf_enable;
-        icu_data[0].conf_disable = mmp_conf.conf_disable;
-        icu_data[0].conf_mask = mmp_conf.conf_mask;
-        icu_data[0].nr_irqs = 64;
-        icu_data[0].virq_base = 0;
-        icu_data[0].domain = irq_domain_add_legacy(NULL, 64, 0, 0,
-                                                   &irq_domain_simple_ops,
-                                                   &icu_data[0]);
-        for (irq = 0; irq < 64; irq++) {
-                icu_mask_irq(irq_get_irq_data(irq));
-                irq_set_chip_and_handler(irq, &icu_irq_chip, handle_level_irq);
-                set_irq_flags(irq, IRQF_VALID);
-        }
-        irq_set_default_host(icu_data[0].domain);
-#ifdef CONFIG_CPU_PXA910
-        icu_irq_chip.irq_set_wake = pxa910_set_wake;
-#endif
-}
-
-/* MMP2 (ARMv7) */
-void __init mmp2_init_icu(void)
-{
-        int irq;
-
-        max_icu_nr = 8;
-        mmp_icu_base = ioremap(0xd4282000, 0x1000);
-        icu_data[0].conf_enable = mmp2_conf.conf_enable;
-        icu_data[0].conf_disable = mmp2_conf.conf_disable;
-        icu_data[0].conf_mask = mmp2_conf.conf_mask;
-        icu_data[0].nr_irqs = 64;
-        icu_data[0].virq_base = 0;
-        icu_data[0].domain = irq_domain_add_legacy(NULL, 64, 0, 0,
-                                                   &irq_domain_simple_ops,
-                                                   &icu_data[0]);
-        icu_data[1].reg_status = mmp_icu_base + 0x150;
-        icu_data[1].reg_mask = mmp_icu_base + 0x168;
-        icu_data[1].clr_mfp_irq_base = IRQ_MMP2_PMIC_BASE;
-        icu_data[1].clr_mfp_hwirq = IRQ_MMP2_PMIC - IRQ_MMP2_PMIC_BASE;
-        icu_data[1].nr_irqs = 2;
-        icu_data[1].cascade_irq = 4;
-        icu_data[1].virq_base = IRQ_MMP2_PMIC_BASE;
-        icu_data[1].domain = irq_domain_add_legacy(NULL, icu_data[1].nr_irqs,
-                                                   icu_data[1].virq_base, 0,
-                                                   &irq_domain_simple_ops,
-                                                   &icu_data[1]);
-        icu_data[2].reg_status = mmp_icu_base + 0x154;
-        icu_data[2].reg_mask = mmp_icu_base + 0x16c;
-        icu_data[2].nr_irqs = 2;
-        icu_data[2].cascade_irq = 5;
-        icu_data[2].virq_base = IRQ_MMP2_RTC_BASE;
-        icu_data[2].domain = irq_domain_add_legacy(NULL, icu_data[2].nr_irqs,
-                                                   icu_data[2].virq_base, 0,
-                                                   &irq_domain_simple_ops,
-                                                   &icu_data[2]);
-        icu_data[3].reg_status = mmp_icu_base + 0x180;
-        icu_data[3].reg_mask = mmp_icu_base + 0x17c;
-        icu_data[3].nr_irqs = 3;
-        icu_data[3].cascade_irq = 9;
-        icu_data[3].virq_base = IRQ_MMP2_KEYPAD_BASE;
-        icu_data[3].domain = irq_domain_add_legacy(NULL, icu_data[3].nr_irqs,
-                                                   icu_data[3].virq_base, 0,
-                                                   &irq_domain_simple_ops,
-                                                   &icu_data[3]);
-        icu_data[4].reg_status = mmp_icu_base + 0x158;
-        icu_data[4].reg_mask = mmp_icu_base + 0x170;
-        icu_data[4].nr_irqs = 5;
-        icu_data[4].cascade_irq = 17;
-        icu_data[4].virq_base = IRQ_MMP2_TWSI_BASE;
-        icu_data[4].domain = irq_domain_add_legacy(NULL, icu_data[4].nr_irqs,
-                                                   icu_data[4].virq_base, 0,
-                                                   &irq_domain_simple_ops,
-                                                   &icu_data[4]);
-        icu_data[5].reg_status = mmp_icu_base + 0x15c;
-        icu_data[5].reg_mask = mmp_icu_base + 0x174;
-        icu_data[5].nr_irqs = 15;
-        icu_data[5].cascade_irq = 35;
-        icu_data[5].virq_base = IRQ_MMP2_MISC_BASE;
-        icu_data[5].domain = irq_domain_add_legacy(NULL, icu_data[5].nr_irqs,
-                                                   icu_data[5].virq_base, 0,
-                                                   &irq_domain_simple_ops,
-                                                   &icu_data[5]);
-        icu_data[6].reg_status = mmp_icu_base + 0x160;
-        icu_data[6].reg_mask = mmp_icu_base + 0x178;
-        icu_data[6].nr_irqs = 2;
-        icu_data[6].cascade_irq = 51;
-        icu_data[6].virq_base = IRQ_MMP2_MIPI_HSI1_BASE;
-        icu_data[6].domain = irq_domain_add_legacy(NULL, icu_data[6].nr_irqs,
-                                                   icu_data[6].virq_base, 0,
-                                                   &irq_domain_simple_ops,
-                                                   &icu_data[6]);
-        icu_data[7].reg_status = mmp_icu_base + 0x188;
-        icu_data[7].reg_mask = mmp_icu_base + 0x184;
-        icu_data[7].nr_irqs = 2;
-        icu_data[7].cascade_irq = 55;
-        icu_data[7].virq_base = IRQ_MMP2_MIPI_HSI0_BASE;
-        icu_data[7].domain = irq_domain_add_legacy(NULL, icu_data[7].nr_irqs,
-                                                   icu_data[7].virq_base, 0,
-                                                   &irq_domain_simple_ops,
-                                                   &icu_data[7]);
-        for (irq = 0; irq < IRQ_MMP2_MUX_END; irq++) {
-                icu_mask_irq(irq_get_irq_data(irq));
-                switch (irq) {
-                case IRQ_MMP2_PMIC_MUX:
-                case IRQ_MMP2_RTC_MUX:
-                case IRQ_MMP2_KEYPAD_MUX:
-                case IRQ_MMP2_TWSI_MUX:
-                case IRQ_MMP2_MISC_MUX:
-                case IRQ_MMP2_MIPI_HSI1_MUX:
-                case IRQ_MMP2_MIPI_HSI0_MUX:
-                        irq_set_chip(irq, &icu_irq_chip);
-                        irq_set_chained_handler(irq, icu_mux_irq_demux);
-                        break;
-                default:
-                        irq_set_chip_and_handler(irq, &icu_irq_chip,
-                                                 handle_level_irq);
-                        break;
-                }
-                set_irq_flags(irq, IRQF_VALID);
-        }
-        irq_set_default_host(icu_data[0].domain);
-#ifdef CONFIG_CPU_MMP2
-        icu_irq_chip.irq_set_wake = mmp2_set_wake;
-#endif
-}
-
-#ifdef CONFIG_OF
-static const struct of_device_id intc_ids[] __initconst = {
-        { .compatible = "mrvl,mmp-intc", .data = &mmp_conf },
-        { .compatible = "mrvl,mmp2-intc", .data = &mmp2_conf },
-        {}
-};
-
-static const struct of_device_id mmp_mux_irq_match[] __initconst = {
-        { .compatible = "mrvl,mmp2-mux-intc" },
-        {}
-};
-
-int __init mmp2_mux_init(struct device_node *parent)
-{
-        struct device_node *node;
-        const struct of_device_id *of_id;
-        struct resource res;
-        int i, irq_base, ret, irq;
-        u32 nr_irqs, mfp_irq;
-
-        node = parent;
-        max_icu_nr = 1;
-        for (i = 1; i < MAX_ICU_NR; i++) {
-                node = of_find_matching_node(node, mmp_mux_irq_match);
-                if (!node)
-                        break;
-                of_id = of_match_node(&mmp_mux_irq_match[0], node);
-                ret = of_property_read_u32(node, "mrvl,intc-nr-irqs",
-                                           &nr_irqs);
-                if (ret) {
-                        pr_err("Not found mrvl,intc-nr-irqs property\n");
-                        ret = -EINVAL;
-                        goto err;
-                }
-                ret = of_address_to_resource(node, 0, &res);
-                if (ret < 0) {
-                        pr_err("Not found reg property\n");
-                        ret = -EINVAL;
-                        goto err;
-                }
-                icu_data[i].reg_status = mmp_icu_base + res.start;
-                ret = of_address_to_resource(node, 1, &res);
-                if (ret < 0) {
-                        pr_err("Not found reg property\n");
-                        ret = -EINVAL;
-                        goto err;
-                }
-                icu_data[i].reg_mask = mmp_icu_base + res.start;
-                icu_data[i].cascade_irq = irq_of_parse_and_map(node, 0);
-                if (!icu_data[i].cascade_irq) {
-                        ret = -EINVAL;
-                        goto err;
-                }
-
-                irq_base = irq_alloc_descs(-1, 0, nr_irqs, 0);
-                if (irq_base < 0) {
-                        pr_err("Failed to allocate IRQ numbers for mux intc\n");
-                        ret = irq_base;
-                        goto err;
-                }
-                if (!of_property_read_u32(node, "mrvl,clr-mfp-irq",
-                                          &mfp_irq)) {
-                        icu_data[i].clr_mfp_irq_base = irq_base;
-                        icu_data[i].clr_mfp_hwirq = mfp_irq;
-                }
-                irq_set_chained_handler(icu_data[i].cascade_irq,
-                                        icu_mux_irq_demux);
-                icu_data[i].nr_irqs = nr_irqs;
-                icu_data[i].virq_base = irq_base;
-                icu_data[i].domain = irq_domain_add_legacy(node, nr_irqs,
-                                                           irq_base, 0,
-                                                           &mmp_irq_domain_ops,
-                                                           &icu_data[i]);
-                for (irq = irq_base; irq < irq_base + nr_irqs; irq++)
-                        icu_mask_irq(irq_get_irq_data(irq));
-        }
-        max_icu_nr = i;
-        return 0;
-err:
-        of_node_put(node);
-        max_icu_nr = i;
-        return ret;
-}
-
-void __init mmp_dt_irq_init(void)
-{
-        struct device_node *node;
-        const struct of_device_id *of_id;
-        struct mmp_intc_conf *conf;
-        int nr_irqs, irq_base, ret, irq;
-
-        node = of_find_matching_node(NULL, intc_ids);
-        if (!node) {
-                pr_err("Failed to find interrupt controller in arch-mmp\n");
-                return;
-        }
-        of_id = of_match_node(intc_ids, node);
-        conf = of_id->data;
-
-        ret = of_property_read_u32(node, "mrvl,intc-nr-irqs", &nr_irqs);
-        if (ret) {
-                pr_err("Not found mrvl,intc-nr-irqs property\n");
-                return;
-        }
-
-        mmp_icu_base = of_iomap(node, 0);
-        if (!mmp_icu_base) {
-                pr_err("Failed to get interrupt controller register\n");
-                return;
-        }
-
-        irq_base = irq_alloc_descs(-1, 0, nr_irqs - NR_IRQS_LEGACY, 0);
-        if (irq_base < 0) {
-                pr_err("Failed to allocate IRQ numbers\n");
-                goto err;
-        } else if (irq_base != NR_IRQS_LEGACY) {
-                pr_err("ICU's irqbase should be started from 0\n");
-                goto err;
-        }
-        icu_data[0].conf_enable = conf->conf_enable;
-        icu_data[0].conf_disable = conf->conf_disable;
-        icu_data[0].conf_mask = conf->conf_mask;
-        icu_data[0].nr_irqs = nr_irqs;
-        icu_data[0].virq_base = 0;
-        icu_data[0].domain = irq_domain_add_legacy(node, nr_irqs, 0, 0,
-                                                   &mmp_irq_domain_ops,
-                                                   &icu_data[0]);
-        irq_set_default_host(icu_data[0].domain);
-        for (irq = 0; irq < nr_irqs; irq++)
-                icu_mask_irq(irq_get_irq_data(irq));
-        mmp2_mux_init(node);
-        return;
-err:
-        iounmap(mmp_icu_base);
-}
-#endif
diff --git a/arch/arm/mach-mmp/mmp-dt.c b/arch/arm/mach-mmp/mmp-dt.c
index b37915dc4470..cca529ceecb7 100644
--- a/arch/arm/mach-mmp/mmp-dt.c
+++ b/arch/arm/mach-mmp/mmp-dt.c
@@ -9,17 +9,13 @@
  *  publishhed by the Free Software Foundation.
  */
 
-#include <linux/irq.h>
-#include <linux/irqdomain.h>
-#include <linux/of_irq.h>
+#include <linux/irqchip.h>
 #include <linux/of_platform.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
-#include <mach/irqs.h>
 
 #include "common.h"
 
-extern void __init mmp_dt_irq_init(void);
 extern void __init mmp_dt_init_timer(void);
 
 static const struct of_dev_auxdata pxa168_auxdata_lookup[] __initconst = {
@@ -64,7 +60,6 @@ static const char *mmp_dt_board_compat[] __initdata = {
 
 DT_MACHINE_START(PXA168_DT, "Marvell PXA168 (Device Tree Support)")
         .map_io         = mmp_map_io,
-        .init_irq       = mmp_dt_irq_init,
         .init_time      = mmp_dt_init_timer,
         .init_machine   = pxa168_dt_init,
         .dt_compat      = mmp_dt_board_compat,
@@ -72,7 +67,6 @@ MACHINE_END
 
 DT_MACHINE_START(PXA910_DT, "Marvell PXA910 (Device Tree Support)")
         .map_io         = mmp_map_io,
-        .init_irq       = mmp_dt_irq_init,
         .init_time      = mmp_dt_init_timer,
         .init_machine   = pxa910_dt_init,
         .dt_compat      = mmp_dt_board_compat,
diff --git a/arch/arm/mach-mmp/mmp2-dt.c b/arch/arm/mach-mmp/mmp2-dt.c
index 4ac256720f7d..023cb453f157 100644
--- a/arch/arm/mach-mmp/mmp2-dt.c
+++ b/arch/arm/mach-mmp/mmp2-dt.c
@@ -10,18 +10,13 @@
  */
 
 #include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/irqdomain.h>
-#include <linux/of_irq.h>
+#include <linux/irqchip.h>
 #include <linux/of_platform.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
-#include <mach/irqs.h>
-#include <mach/regs-apbc.h>
 
 #include "common.h"
 
-extern void __init mmp_dt_irq_init(void);
 extern void __init mmp_dt_init_timer(void);
 
 static const struct of_dev_auxdata mmp2_auxdata_lookup[] __initconst = {
@@ -49,7 +44,6 @@ static const char *mmp2_dt_board_compat[] __initdata = {
 
 DT_MACHINE_START(MMP2_DT, "Marvell MMP2 (Device Tree Support)")
         .map_io         = mmp_map_io,
-        .init_irq       = mmp_dt_irq_init,
         .init_time      = mmp_dt_init_timer,
         .init_machine   = mmp2_dt_init,
         .dt_compat      = mmp2_dt_board_compat,
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index c7592f168bbd..a70b5530bd42 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -13,6 +13,8 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/irqchip/mmp.h>
 #include <linux/platform_device.h>
 
 #include <asm/hardware/cache-tauros2.h>
@@ -26,6 +28,7 @@
 #include <mach/mfp.h>
 #include <mach/devices.h>
 #include <mach/mmp2.h>
+#include <mach/pm-mmp2.h>
 
 #include "common.h"
 
@@ -94,6 +97,9 @@ void mmp2_clear_pmic_int(void)
 void __init mmp2_init_irq(void)
 {
         mmp2_init_icu();
+#ifdef CONFIG_PM
+        icu_irq_chip.irq_set_wake = mmp2_set_wake;
+#endif
 }
 
 static int __init mmp2_init(void)
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index ce6393acad86..eb57ee196842 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -12,6 +12,8 @@
 #include <linux/init.h>
 #include <linux/list.h>
 #include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/irqchip/mmp.h>
 #include <linux/platform_device.h>
 
 #include <asm/hardware/cache-tauros2.h>
@@ -23,6 +25,8 @@
 #include <mach/dma.h>
 #include <mach/mfp.h>
 #include <mach/devices.h>
+#include <mach/pm-pxa910.h>
+#include <mach/pxa910.h>
 
 #include "common.h"
 
@@ -79,6 +83,9 @@ static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
 void __init pxa910_init_irq(void)
 {
         icu_init_irq();
+#ifdef CONFIG_PM
+        icu_irq_chip.irq_set_wake = pxa910_set_wake;
+#endif
 }
 
 static int __init pxa910_init(void)
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 614e41e7881b..905efc8cac79 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -121,8 +121,7 @@ config MSM_SMD
         bool
 
 config MSM_GPIOMUX
-        depends on !(ARCH_MSM8X60 || ARCH_MSM8960)
-        bool "MSM V1 TLMM GPIOMUX architecture"
+        bool
         help
           Support for MSM V1 TLMM GPIOMUX architecture.
 
diff --git a/arch/arm/mach-msm/gpiomux-v1.c b/arch/arm/mach-msm/gpiomux-v1.c
deleted file mode 100644
index 27de2abd7144..000000000000
--- a/arch/arm/mach-msm/gpiomux-v1.c
+++ /dev/null
@@ -1,33 +0,0 @@
-/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-#include <linux/kernel.h>
-#include "gpiomux.h"
-#include "proc_comm.h"
-
-void __msm_gpiomux_write(unsigned gpio, gpiomux_config_t val)
-{
-        unsigned tlmm_config  = (val & ~GPIOMUX_CTL_MASK) |
-                                ((gpio & 0x3ff) << 4);
-        unsigned tlmm_disable = 0;
-        int rc;
-
-        rc = msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX,
-                           &tlmm_config, &tlmm_disable);
-        if (rc)
-                pr_err("%s: unexpected proc_comm failure %d: %08x %08x\n",
-                       __func__, rc, tlmm_config, tlmm_disable);
-}
diff --git a/arch/arm/mach-msm/gpiomux.h b/arch/arm/mach-msm/gpiomux.h
index 8e82f41a8923..4410d7766f93 100644
--- a/arch/arm/mach-msm/gpiomux.h
+++ b/arch/arm/mach-msm/gpiomux.h
@@ -73,16 +73,6 @@ extern struct msm_gpiomux_config msm_gpiomux_configs[GPIOMUX_NGPIOS];
 int msm_gpiomux_write(unsigned gpio,
                       gpiomux_config_t active,
                       gpiomux_config_t suspended);
-
-/* Architecture-internal function for use by the framework only.
- * This function can assume the following:
- * - the gpio value has passed a bounds-check
- * - the gpiomux spinlock has been obtained
- *
- * This function is not for public consumption.  External users
- * should use msm_gpiomux_write.
- */
-void __msm_gpiomux_write(unsigned gpio, gpiomux_config_t val);
 #else
 static inline int msm_gpiomux_write(unsigned gpio,
                                     gpiomux_config_t active,
diff --git a/arch/arm/mach-msm/headsmp.S b/arch/arm/mach-msm/headsmp.S
index bcd5af223dea..6c62c3f82fe6 100644
--- a/arch/arm/mach-msm/headsmp.S
+++ b/arch/arm/mach-msm/headsmp.S
@@ -11,8 +11,6 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 
-        __CPUINIT
-
 /*
  * MSM specific entry point for secondary CPUs.  This provides
  * a "holding pen" into which all secondary cores are held until we're
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 00cdb0a5dac8..3f06edcdd0ce 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -38,7 +38,7 @@ static inline int get_core_count(void)
         return ((read_cpuid_id() >> 4) & 3) + 1;
 }
 
-static void __cpuinit msm_secondary_init(unsigned int cpu)
+static void msm_secondary_init(unsigned int cpu)
 {
         /*
          * let the primary processor know we're out of the
@@ -54,7 +54,7 @@ static void __cpuinit msm_secondary_init(unsigned int cpu)
         spin_unlock(&boot_lock);
 }
 
-static __cpuinit void prepare_cold_cpu(unsigned int cpu)
+static void prepare_cold_cpu(unsigned int cpu)
 {
         int ret;
         ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup),
@@ -73,7 +73,7 @@ static __cpuinit void prepare_cold_cpu(unsigned int cpu)
                                   "address\n");
 }
 
-static int __cpuinit msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long timeout;
         static int cold_boot_done;
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index b6418fd5fe0d..8697cfc0d0b6 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -139,7 +139,7 @@ static struct clocksource msm_clocksource = {
 };
 
 #ifdef CONFIG_LOCAL_TIMERS
-static int __cpuinit msm_local_timer_setup(struct clock_event_device *evt)
+static int msm_local_timer_setup(struct clock_event_device *evt)
 {
         /* Use existing clock_event for cpu 0 */
         if (!smp_processor_id())
@@ -164,7 +164,7 @@ static void msm_local_timer_stop(struct clock_event_device *evt)
         disable_percpu_irq(evt->irq);
 }
 
-static struct local_timer_ops msm_local_timer_ops __cpuinitdata = {
+static struct local_timer_ops msm_local_timer_ops = {
         .setup  = msm_local_timer_setup,
         .stop   = msm_local_timer_stop,
 };
diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c
index be117591f7f2..4c24303ec481 100644
--- a/arch/arm/mach-mvebu/coherency.c
+++ b/arch/arm/mach-mvebu/coherency.c
@@ -28,7 +28,7 @@
 #include <asm/cacheflush.h>
 #include "armada-370-xp.h"
 
-unsigned long __cpuinitdata coherency_phys_base;
+unsigned long coherency_phys_base;
 static void __iomem *coherency_base;
 static void __iomem *coherency_cpu_base;
 
diff --git a/arch/arm/mach-mvebu/headsmp.S b/arch/arm/mach-mvebu/headsmp.S
index 7147300c8af2..8a1b0c96e9ec 100644
--- a/arch/arm/mach-mvebu/headsmp.S
+++ b/arch/arm/mach-mvebu/headsmp.S
@@ -21,8 +21,6 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 
-        __CPUINIT
-
 /*
  * Armada XP specific entry point for secondary CPUs.
  * We add the CPU to the coherency fabric and then jump to secondary
diff --git a/arch/arm/mach-mvebu/platsmp.c b/arch/arm/mach-mvebu/platsmp.c
index 93f2f3ab45f1..ce81d3031405 100644
--- a/arch/arm/mach-mvebu/platsmp.c
+++ b/arch/arm/mach-mvebu/platsmp.c
@@ -71,13 +71,12 @@ void __init set_secondary_cpus_clock(void)
         }
 }
 
-static void __cpuinit armada_xp_secondary_init(unsigned int cpu)
+static void armada_xp_secondary_init(unsigned int cpu)
 {
         armada_xp_mpic_smp_cpu_init();
 }
 
-static int __cpuinit armada_xp_boot_secondary(unsigned int cpu,
-                                              struct task_struct *idle)
+static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         pr_info("Booting CPU %d\n", cpu);
 
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 627fa7e41fba..3eed0006d189 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -62,7 +62,7 @@ config SOC_OMAP5
         select HAVE_SMP
         select COMMON_CLK
         select HAVE_ARM_ARCH_TIMER
-        select ARM_ERRATA_798181
+        select ARM_ERRATA_798181 if SMP
 
 config SOC_AM33XX
         bool "AM33XX support"
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index e5fbfed69aa2..be5d005ebad2 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -15,6 +15,7 @@
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/irqdomain.h>
+#include <linux/clk.h>
 
 #include <asm/mach/arch.h>
 
@@ -35,6 +36,21 @@ static struct of_device_id omap_dt_match_table[] __initdata = {
         { }
 };
 
+/*
+ * Create alias for USB host PHY clock.
+ * Remove this when clock phandle can be provided via DT
+ */
+static void __init legacy_init_ehci_clk(char *clkname)
+{
+        int ret;
+
+        ret = clk_add_alias("main_clk", NULL, clkname, NULL);
+        if (ret) {
+                pr_err("%s:Failed to add main_clk alias to %s :%d\n",
+                                                __func__, clkname, ret);
+        }
+}
+
 static void __init omap_generic_init(void)
 {
         omap_sdrc_init(NULL, NULL);
@@ -45,10 +61,15 @@ static void __init omap_generic_init(void)
          * HACK: call display setup code for selected boards to enable omapdss.
          * This will be removed when omapdss supports DT.
          */
-        if (of_machine_is_compatible("ti,omap4-panda"))
+        if (of_machine_is_compatible("ti,omap4-panda")) {
                 omap4_panda_display_init_of();
+                legacy_init_ehci_clk("auxclk3_ck");
+
+        }
         else if (of_machine_is_compatible("ti,omap4-sdp"))
                 omap_4430sdp_display_init_of();
+        else if (of_machine_is_compatible("ti,omap5-uevm"))
+                legacy_init_ehci_clk("auxclk1_ck");
 }
 
 #ifdef CONFIG_SOC_OMAP2420
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index f6eeb87e4e95..827d15009a86 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -122,11 +122,7 @@ static struct musb_hdrc_config musb_config = {
 };
 
 static struct musb_hdrc_platform_data tusb_data = {
-#ifdef CONFIG_USB_GADGET_MUSB_HDRC
         .mode           = MUSB_OTG,
-#else
-        .mode           = MUSB_HOST,
-#endif
         .set_power      = tusb_set_power,
         .min_power      = 25,   /* x2 = 50 mA drawn from VBUS as peripheral */
         .power          = 100,  /* Max 100 mA VBUS for host mode */
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index d2ea68ea678a..7735105561d8 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -85,7 +85,7 @@ static struct omap_board_mux board_mux[] __initdata = {
 
 static struct omap_musb_board_data musb_board_data = {
         .interface_type         = MUSB_INTERFACE_ULPI,
-        .mode                   = MUSB_PERIPHERAL,
+        .mode                   = MUSB_OTG,
         .power                  = 0,
 };
 
diff --git a/arch/arm/mach-omap2/dss-common.c b/arch/arm/mach-omap2/dss-common.c
index 393aeefaebb0..043e5705f2a6 100644
--- a/arch/arm/mach-omap2/dss-common.c
+++ b/arch/arm/mach-omap2/dss-common.c
@@ -42,7 +42,7 @@
 
 /* Using generic display panel */
 static struct tfp410_platform_data omap4_dvi_panel = {
-        .i2c_bus_num            = 3,
+        .i2c_bus_num            = 2,
         .power_down_gpio        = PANDA_DVI_TFP410_POWER_DOWN_GPIO,
 };
 
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index 4ea308114165..75e92952c18e 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -20,8 +20,6 @@
 
 #include "omap44xx.h"
 
-        __CPUINIT
-
 /* Physical address needed since MMU not enabled yet on secondary core */
 #define AUX_CORE_BOOT0_PA                       0x48281800
 
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index f993a4188701..f991016e2a6a 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -291,7 +291,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
  * @cpu : CPU ID
  * @power_state: CPU low power state.
  */
-int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
+int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
 {
         struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu);
         unsigned int cpu_state = 0;
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 98a11463a843..8708b2a9da45 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -51,7 +51,7 @@ void __iomem *omap4_get_scu_base(void)
         return scu_base;
 }
 
-static void __cpuinit omap4_secondary_init(unsigned int cpu)
+static void omap4_secondary_init(unsigned int cpu)
 {
         /*
          * Configure ACTRL and enable NS SMP bit access on CPU1 on HS device.
@@ -72,7 +72,7 @@ static void __cpuinit omap4_secondary_init(unsigned int cpu)
         spin_unlock(&boot_lock);
 }
 
-static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         static struct clockdomain *cpu1_clkdm;
         static bool booted;
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index f8bb3b9b6a76..813c61558a5f 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -323,8 +323,8 @@ static void irq_save_secure_context(void)
 #endif
 
 #ifdef CONFIG_HOTPLUG_CPU
-static int __cpuinit irq_cpu_hotplug_notify(struct notifier_block *self,
-                                         unsigned long action, void *hcpu)
+static int irq_cpu_hotplug_notify(struct notifier_block *self,
+                                  unsigned long action, void *hcpu)
 {
         unsigned int cpu = (unsigned int)hcpu;
 
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index 5cc92874be7e..f99f68e1e85b 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -129,6 +129,7 @@ static int omap_device_build_from_dt(struct platform_device *pdev)
         struct device_node *node = pdev->dev.of_node;
         const char *oh_name;
         int oh_cnt, i, ret = 0;
+        bool device_active = false;
 
         oh_cnt = of_property_count_strings(node, "ti,hwmods");
         if (oh_cnt <= 0) {
@@ -152,6 +153,8 @@ static int omap_device_build_from_dt(struct platform_device *pdev)
                         goto odbfd_exit1;
                 }
                 hwmods[i] = oh;
+                if (oh->flags & HWMOD_INIT_NO_IDLE)
+                        device_active = true;
         }
 
         od = omap_device_alloc(pdev, hwmods, oh_cnt);
@@ -172,6 +175,11 @@ static int omap_device_build_from_dt(struct platform_device *pdev)
 
         pdev->dev.pm_domain = &omap_device_pm_domain;
 
+        if (device_active) {
+                omap_device_enable(pdev);
+                pm_runtime_set_active(&pdev->dev);
+        }
+
 odbfd_exit1:
         kfree(hwmods);
 odbfd_exit:
@@ -842,6 +850,7 @@ static int __init omap_device_late_idle(struct device *dev, void *data)
 {
         struct platform_device *pdev = to_platform_device(dev);
         struct omap_device *od = to_omap_device(pdev);
+        int i;
 
         if (!od)
                 return 0;
@@ -850,6 +859,15 @@ static int __init omap_device_late_idle(struct device *dev, void *data)
          * If omap_device state is enabled, but has no driver bound,
          * idle it.
          */
+
+        /*
+         * Some devices (like memory controllers) are always kept
+         * enabled, and should not be idled even with no drivers.
+         */
+        for (i = 0; i < od->hwmods_cnt; i++)
+                if (od->hwmods[i]->flags & HWMOD_INIT_NO_IDLE)
+                        return 0;
+
         if (od->_driver_status != BUS_NOTIFY_BOUND_DRIVER) {
                 if (od->_state == OMAP_DEVICE_STATE_ENABLED) {
                         dev_warn(dev, "%s: enabled but no driver.  Idling\n",
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 7341eff63f56..7f4db12b1459 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2386,7 +2386,7 @@ static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
 
                 np = of_dev_hwmod_lookup(of_find_node_by_name(NULL, "ocp"), oh);
                 if (np)
-                        va_start = of_iomap(np, 0);
+                        va_start = of_iomap(np, oh->mpu_rt_idx);
         } else {
                 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
         }
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index aab33fd814c0..e1482a9b3bc2 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -95,6 +95,54 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3;
 #define MODULEMODE_HWCTRL               1
 #define MODULEMODE_SWCTRL               2
 
+#define DEBUG_OMAP2UART1_FLAGS  0
+#define DEBUG_OMAP2UART2_FLAGS  0
+#define DEBUG_OMAP2UART3_FLAGS  0
+#define DEBUG_OMAP3UART3_FLAGS  0
+#define DEBUG_OMAP3UART4_FLAGS  0
+#define DEBUG_OMAP4UART3_FLAGS  0
+#define DEBUG_OMAP4UART4_FLAGS  0
+#define DEBUG_TI81XXUART1_FLAGS 0
+#define DEBUG_TI81XXUART2_FLAGS 0
+#define DEBUG_TI81XXUART3_FLAGS 0
+#define DEBUG_AM33XXUART1_FLAGS 0
+
+#define DEBUG_OMAPUART_FLAGS    (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET)
+
+#if defined(CONFIG_DEBUG_OMAP2UART1)
+#undef DEBUG_OMAP2UART1_FLAGS
+#define DEBUG_OMAP2UART1_FLAGS DEBUG_OMAPUART_FLAGS
+#elif defined(CONFIG_DEBUG_OMAP2UART2)
+#undef DEBUG_OMAP2UART2_FLAGS
+#define DEBUG_OMAP2UART2_FLAGS DEBUG_OMAPUART_FLAGS
+#elif defined(CONFIG_DEBUG_OMAP2UART3)
+#undef DEBUG_OMAP2UART3_FLAGS
+#define DEBUG_OMAP2UART3_FLAGS DEBUG_OMAPUART_FLAGS
+#elif defined(CONFIG_DEBUG_OMAP3UART3)
+#undef DEBUG_OMAP3UART3_FLAGS
+#define DEBUG_OMAP3UART3_FLAGS DEBUG_OMAPUART_FLAGS
+#elif defined(CONFIG_DEBUG_OMAP3UART4)
+#undef DEBUG_OMAP3UART4_FLAGS
+#define DEBUG_OMAP3UART4_FLAGS DEBUG_OMAPUART_FLAGS
+#elif defined(CONFIG_DEBUG_OMAP4UART3)
+#undef DEBUG_OMAP4UART3_FLAGS
+#define DEBUG_OMAP4UART3_FLAGS DEBUG_OMAPUART_FLAGS
+#elif defined(CONFIG_DEBUG_OMAP4UART4)
+#undef DEBUG_OMAP4UART4_FLAGS
+#define DEBUG_OMAP4UART4_FLAGS DEBUG_OMAPUART_FLAGS
+#elif defined(CONFIG_DEBUG_TI81XXUART1)
+#undef DEBUG_TI81XXUART1_FLAGS
+#define DEBUG_TI81XXUART1_FLAGS DEBUG_OMAPUART_FLAGS
+#elif defined(CONFIG_DEBUG_TI81XXUART2)
+#undef DEBUG_TI81XXUART2_FLAGS
+#define DEBUG_TI81XXUART2_FLAGS DEBUG_OMAPUART_FLAGS
+#elif defined(CONFIG_DEBUG_TI81XXUART3)
+#undef DEBUG_TI81XXUART3_FLAGS
+#define DEBUG_TI81XXUART3_FLAGS DEBUG_OMAPUART_FLAGS
+#elif defined(CONFIG_DEBUG_AM33XXUART1)
+#undef DEBUG_AM33XXUART1_FLAGS
+#define DEBUG_AM33XXUART1_FLAGS DEBUG_OMAPUART_FLAGS
+#endif
 
 /**
  * struct omap_hwmod_mux_info - hwmod specific mux configuration
@@ -568,6 +616,7 @@ struct omap_hwmod_link {
  * @voltdm: pointer to voltage domain (filled in at runtime)
  * @dev_attr: arbitrary device attributes that can be passed to the driver
  * @_sysc_cache: internal-use hwmod flags
+ * @mpu_rt_idx: index of device address space for register target (for DT boot)
  * @_mpu_rt_va: cached register target start address (internal use)
  * @_mpu_port: cached MPU register target slave (internal use)
  * @opt_clks_cnt: number of @opt_clks
@@ -617,6 +666,7 @@ struct omap_hwmod {
         struct list_head                node;
         struct omap_hwmod_ocp_if        *_mpu_port;
         u16                             flags;
+        u8                              mpu_rt_idx;
         u8                              response_lat;
         u8                              rst_lines_cnt;
         u8                              opt_clks_cnt;
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index d05fc7b54567..56cebb05509e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -512,7 +512,7 @@ struct omap_hwmod omap2xxx_uart1_hwmod = {
         .mpu_irqs       = omap2_uart1_mpu_irqs,
         .sdma_reqs      = omap2_uart1_sdma_reqs,
         .main_clk       = "uart1_fck",
-        .flags          = HWMOD_SWSUP_SIDLE_ACT,
+        .flags          = DEBUG_OMAP2UART1_FLAGS | HWMOD_SWSUP_SIDLE_ACT,
         .prcm           = {
                 .omap2 = {
                         .module_offs = CORE_MOD,
@@ -532,7 +532,7 @@ struct omap_hwmod omap2xxx_uart2_hwmod = {
         .mpu_irqs       = omap2_uart2_mpu_irqs,
         .sdma_reqs      = omap2_uart2_sdma_reqs,
         .main_clk       = "uart2_fck",
-        .flags          = HWMOD_SWSUP_SIDLE_ACT,
+        .flags          = DEBUG_OMAP2UART2_FLAGS | HWMOD_SWSUP_SIDLE_ACT,
         .prcm           = {
                 .omap2 = {
                         .module_offs = CORE_MOD,
@@ -552,7 +552,7 @@ struct omap_hwmod omap2xxx_uart3_hwmod = {
         .mpu_irqs       = omap2_uart3_mpu_irqs,
         .sdma_reqs      = omap2_uart3_sdma_reqs,
         .main_clk       = "uart3_fck",
-        .flags          = HWMOD_SWSUP_SIDLE_ACT,
+        .flags          = DEBUG_OMAP2UART3_FLAGS | HWMOD_SWSUP_SIDLE_ACT,
         .prcm           = {
                 .omap2 = {
                         .module_offs = CORE_MOD,
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 28bbd56346a9..eb2f3b93b51c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -562,6 +562,7 @@ static struct omap_hwmod am33xx_cpgmac0_hwmod = {
         .clkdm_name     = "cpsw_125mhz_clkdm",
         .flags          = (HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY),
         .main_clk       = "cpsw_125mhz_gclk",
+        .mpu_rt_idx     = 1,
         .prcm           = {
                 .omap4  = {
                         .clkctrl_offs   = AM33XX_CM_PER_CPGMAC0_CLKCTRL_OFFSET,
@@ -1512,7 +1513,7 @@ static struct omap_hwmod am33xx_uart1_hwmod = {
         .name           = "uart1",
         .class          = &uart_class,
         .clkdm_name     = "l4_wkup_clkdm",
-        .flags          = HWMOD_SWSUP_SIDLE_ACT,
+        .flags          = DEBUG_AM33XXUART1_FLAGS | HWMOD_SWSUP_SIDLE_ACT,
         .main_clk       = "dpll_per_m2_div4_wkupdm_ck",
         .prcm           = {
                 .omap4  = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index f7a3df2fb579..0c3a427da544 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -490,7 +490,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {
         .mpu_irqs       = omap2_uart1_mpu_irqs,
         .sdma_reqs      = omap2_uart1_sdma_reqs,
         .main_clk       = "uart1_fck",
-        .flags          = HWMOD_SWSUP_SIDLE_ACT,
+        .flags          = DEBUG_TI81XXUART1_FLAGS | HWMOD_SWSUP_SIDLE_ACT,
         .prcm           = {
                 .omap2 = {
                         .module_offs = CORE_MOD,
@@ -509,7 +509,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {
         .mpu_irqs       = omap2_uart2_mpu_irqs,
         .sdma_reqs      = omap2_uart2_sdma_reqs,
         .main_clk       = "uart2_fck",
-        .flags          = HWMOD_SWSUP_SIDLE_ACT,
+        .flags          = DEBUG_TI81XXUART2_FLAGS | HWMOD_SWSUP_SIDLE_ACT,
         .prcm           = {
                 .omap2 = {
                         .module_offs = CORE_MOD,
@@ -528,7 +528,8 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = {
         .mpu_irqs       = omap2_uart3_mpu_irqs,
         .sdma_reqs      = omap2_uart3_sdma_reqs,
         .main_clk       = "uart3_fck",
-        .flags          = HWMOD_SWSUP_SIDLE_ACT,
+        .flags          = DEBUG_OMAP3UART3_FLAGS | DEBUG_TI81XXUART3_FLAGS |
+                                HWMOD_SWSUP_SIDLE_ACT,
         .prcm           = {
                 .omap2 = {
                         .module_offs = OMAP3430_PER_MOD,
@@ -558,7 +559,7 @@ static struct omap_hwmod omap36xx_uart4_hwmod = {
         .mpu_irqs       = uart4_mpu_irqs,
         .sdma_reqs      = uart4_sdma_reqs,
         .main_clk       = "uart4_fck",
-        .flags          = HWMOD_SWSUP_SIDLE_ACT,
+        .flags          = DEBUG_OMAP3UART4_FLAGS | HWMOD_SWSUP_SIDLE_ACT,
         .prcm           = {
                 .omap2 = {
                         .module_offs = OMAP3430_PER_MOD,
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index d04b5e60fdbe..9c3b504477d7 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2858,8 +2858,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = {
         .name           = "uart3",
         .class          = &omap44xx_uart_hwmod_class,
         .clkdm_name     = "l4_per_clkdm",
-        .flags          = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET |
-                                HWMOD_SWSUP_SIDLE_ACT,
+        .flags          = DEBUG_OMAP4UART3_FLAGS | HWMOD_SWSUP_SIDLE_ACT,
         .main_clk       = "func_48m_fclk",
         .prcm = {
                 .omap4 = {
@@ -2875,7 +2874,7 @@ static struct omap_hwmod omap44xx_uart4_hwmod = {
         .name           = "uart4",
         .class          = &omap44xx_uart_hwmod_class,
         .clkdm_name     = "l4_per_clkdm",
-        .flags          = HWMOD_SWSUP_SIDLE_ACT,
+        .flags          = DEBUG_OMAP4UART4_FLAGS | HWMOD_SWSUP_SIDLE_ACT,
         .main_clk       = "func_48m_fclk",
         .prcm = {
                 .omap4 = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index f37ae96b70a1..3c70f5c1860f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -1375,7 +1375,7 @@ static struct omap_hwmod omap54xx_uart3_hwmod = {
         .name           = "uart3",
         .class          = &omap54xx_uart_hwmod_class,
         .clkdm_name     = "l4per_clkdm",
-        .flags          = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
+        .flags          = DEBUG_OMAP4UART3_FLAGS,
         .main_clk       = "func_48m_fclk",
         .prcm = {
                 .omap4 = {
@@ -1391,6 +1391,7 @@ static struct omap_hwmod omap54xx_uart4_hwmod = {
         .name           = "uart4",
         .class          = &omap54xx_uart_hwmod_class,
         .clkdm_name     = "l4per_clkdm",
+        .flags          = DEBUG_OMAP4UART4_FLAGS,
         .main_clk       = "func_48m_fclk",
         .prcm = {
                 .omap4 = {
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 3a674de6cb63..a388f8c1bcb3 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -208,17 +208,6 @@ static int __init omap_serial_early_init(void)
                                 pr_info("%s used as console in debug mode: uart%d clocks will not be gated",
                                         uart_name, uart->num);
                         }
-
-                        /*
-                         * omap-uart can be used for earlyprintk logs
-                         * So if omap-uart is used as console then prevent
-                         * uart reset and idle to get logs from omap-uart
-                         * until uart console driver is available to take
-                         * care for console messages.
-                         * Idling or resetting omap-uart while printing logs
-                         * early boot logs can stall the boot-up.
-                         */
-                        oh->flags |= HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET;
                 }
         } while (1);
 
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index 8c4de2708cf2..bc897231bd10 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -38,11 +38,8 @@ static struct musb_hdrc_config musb_config = {
 };
 
 static struct musb_hdrc_platform_data musb_plat = {
-#ifdef CONFIG_USB_GADGET_MUSB_HDRC
         .mode           = MUSB_OTG,
-#else
-        .mode           = MUSB_HOST,
-#endif
+
         /* .clock is set dynamically */
         .config         = &musb_config,
 
diff --git a/arch/arm/mach-prima2/headsmp.S b/arch/arm/mach-prima2/headsmp.S
index 5b8a408d8921..d86fe33c5f53 100644
--- a/arch/arm/mach-prima2/headsmp.S
+++ b/arch/arm/mach-prima2/headsmp.S
@@ -9,8 +9,6 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 
-        __CPUINIT
-
 /*
  * SIRFSOC specific entry point for secondary CPUs.  This provides
  * a "holding pen" into which all secondary cores are held until we're
diff --git a/arch/arm/mach-prima2/platsmp.c b/arch/arm/mach-prima2/platsmp.c
index 1c3de7bed841..3dbcb1ab6e37 100644
--- a/arch/arm/mach-prima2/platsmp.c
+++ b/arch/arm/mach-prima2/platsmp.c
@@ -44,7 +44,7 @@ void __init sirfsoc_map_scu(void)
         scu_base = (void __iomem *)SIRFSOC_VA(base);
 }
 
-static void __cpuinit sirfsoc_secondary_init(unsigned int cpu)
+static void sirfsoc_secondary_init(unsigned int cpu)
 {
         /*
          * let the primary processor know we're out of the
@@ -65,7 +65,7 @@ static struct of_device_id rsc_ids[]  = {
         {},
 };
 
-static int __cpuinit sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long timeout;
         struct device_node *np;
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index f6726bb4eb95..3a3362fa793e 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -477,16 +477,24 @@ static int em_x270_usb_hub_init(void)
         /* USB Hub power-on and reset */
         gpio_direction_output(usb_hub_reset, 1);
         gpio_direction_output(GPIO9_USB_VBUS_EN, 0);
-        regulator_enable(em_x270_usb_ldo);
+        err = regulator_enable(em_x270_usb_ldo);
+        if (err)
+                goto err_free_rst_gpio;
+
         gpio_set_value(usb_hub_reset, 0);
         gpio_set_value(usb_hub_reset, 1);
         regulator_disable(em_x270_usb_ldo);
-        regulator_enable(em_x270_usb_ldo);
+        err = regulator_enable(em_x270_usb_ldo);
+        if (err)
+                goto err_free_rst_gpio;
+
         gpio_set_value(usb_hub_reset, 0);
         gpio_set_value(GPIO9_USB_VBUS_EN, 1);
 
         return 0;
 
+err_free_rst_gpio:
+        gpio_free(usb_hub_reset);
 err_free_vbus_gpio:
         gpio_free(GPIO9_USB_VBUS_EN);
 err_free_usb_ldo:
@@ -592,7 +600,7 @@ err_irq:
         return err;
 }
 
-static void em_x270_mci_setpower(struct device *dev, unsigned int vdd)
+static int em_x270_mci_setpower(struct device *dev, unsigned int vdd)
 {
         struct pxamci_platform_data* p_d = dev->platform_data;
 
@@ -600,10 +608,11 @@ static void em_x270_mci_setpower(struct device *dev, unsigned int vdd)
                 int vdd_uV = (2000 + (vdd - __ffs(MMC_VDD_20_21)) * 100) * 1000;
 
                 regulator_set_voltage(em_x270_sdio_ldo, vdd_uV, vdd_uV);
-                regulator_enable(em_x270_sdio_ldo);
+                return regulator_enable(em_x270_sdio_ldo);
         } else {
                 regulator_disable(em_x270_sdio_ldo);
         }
+        return 0;
 }
 
 static void em_x270_mci_exit(struct device *dev, void *data)
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index d2c652318376..dd70343c8708 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -408,7 +408,7 @@ static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_in
         return err;
 }
 
-static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
+static int mainstone_mci_setpower(struct device *dev, unsigned int vdd)
 {
         struct pxamci_platform_data* p_d = dev->platform_data;
 
@@ -420,6 +420,7 @@ static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
                 printk(KERN_DEBUG "%s: off\n", __func__);
                 MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
         }
+        return 0;
 }
 
 static void mainstone_mci_exit(struct device *dev, void *data)
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index fb7f1d1627dc..13e5b00eae90 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -335,7 +335,7 @@ static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
         return err;
 }
 
-static void pcm990_mci_setpower(struct device *dev, unsigned int vdd)
+static int pcm990_mci_setpower(struct device *dev, unsigned int vdd)
 {
         struct pxamci_platform_data *p_d = dev->platform_data;
         u8 val;
@@ -348,6 +348,7 @@ static void pcm990_mci_setpower(struct device *dev, unsigned int vdd)
                 val &= ~PCM990_CTRL_MMC2PWR;
 
         pcm990_cpld_writeb(PCM990_CTRL_MMC2PWR, PCM990_CTRL_REG5);
+        return 0;
 }
 
 static void pcm990_mci_exit(struct device *dev, void *data)
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 711d37e26bd8..aedf053a1de5 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -258,7 +258,7 @@ err_free_2:
         return err;
 }
 
-static void poodle_mci_setpower(struct device *dev, unsigned int vdd)
+static int poodle_mci_setpower(struct device *dev, unsigned int vdd)
 {
         struct pxamci_platform_data* p_d = dev->platform_data;
 
@@ -270,6 +270,8 @@ static void poodle_mci_setpower(struct device *dev, unsigned int vdd)
                 gpio_set_value(POODLE_GPIO_SD_PWR1, 0);
                 gpio_set_value(POODLE_GPIO_SD_PWR, 0);
         }
+
+        return 0;
 }
 
 static void poodle_mci_exit(struct device *dev, void *data)
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 2125df0444e7..4c29173026e8 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -598,7 +598,7 @@ static inline void spitz_spi_init(void) {}
  * NOTE: The card detect interrupt isn't debounced so we delay it by 250ms to
  * give the card a chance to fully insert/eject.
  */
-static void spitz_mci_setpower(struct device *dev, unsigned int vdd)
+static int spitz_mci_setpower(struct device *dev, unsigned int vdd)
 {
         struct pxamci_platform_data* p_d = dev->platform_data;
 
@@ -606,6 +606,8 @@ static void spitz_mci_setpower(struct device *dev, unsigned int vdd)
                 spitz_card_pwr_ctrl(SCOOP_CPR_SD_3V, SCOOP_CPR_SD_3V);
         else
                 spitz_card_pwr_ctrl(SCOOP_CPR_SD_3V, 0x0);
+
+        return 0;
 }
 
 static struct pxamci_platform_data spitz_mci_platform_data = {
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 88fde43c948c..62aea3e835f3 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -734,9 +734,10 @@ static int stargate2_mci_init(struct device *dev,
  *
  * Very simple control. Either it is on or off and is controlled by
  * a gpio pin */
-static void stargate2_mci_setpower(struct device *dev, unsigned int vdd)
+static int stargate2_mci_setpower(struct device *dev, unsigned int vdd)
 {
         gpio_set_value(SG2_SD_POWER_ENABLE, !!vdd);
+        return 0;
 }
 
 static void stargate2_mci_exit(struct device *dev, void *data)
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 6d9252e081ce..7791ac76f945 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -208,7 +208,7 @@ config S3C24XX_GPIO_EXTRA128
 
 config S3C24XX_PLL
         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
-        depends on ARM_S3C24XX
+        depends on ARM_S3C24XX_CPUFREQ
         help
           Compile in support for changing the PLL frequency from the
           S3C24XX series CPUfreq driver. The PLL takes time to settle
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2410.c b/arch/arm/mach-s3c24xx/clock-s3c2410.c
index 34fffdf6fc1d..564553694b54 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2410.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2410.c
@@ -119,66 +119,101 @@ static struct clk init_clocks_off[] = {
         }
 };
 
-static struct clk init_clocks[] = {
-        {
-                .name           = "lcd",
-                .parent         = &clk_h,
-                .enable         = s3c2410_clkcon_enable,
-                .ctrlbit        = S3C2410_CLKCON_LCDC,
-        }, {
-                .name           = "gpio",
-                .parent         = &clk_p,
-                .enable         = s3c2410_clkcon_enable,
-                .ctrlbit        = S3C2410_CLKCON_GPIO,
-        }, {
-                .name           = "usb-host",
-                .parent         = &clk_h,
-                .enable         = s3c2410_clkcon_enable,
-                .ctrlbit        = S3C2410_CLKCON_USBH,
-        }, {
-                .name           = "usb-device",
-                .parent         = &clk_h,
-                .enable         = s3c2410_clkcon_enable,
-                .ctrlbit        = S3C2410_CLKCON_USBD,
-        }, {
-                .name           = "timers",
-                .parent         = &clk_p,
-                .enable         = s3c2410_clkcon_enable,
-                .ctrlbit        = S3C2410_CLKCON_PWMT,
-        }, {
-                .name           = "uart",
-                .devname        = "s3c2410-uart.0",
-                .parent         = &clk_p,
-                .enable         = s3c2410_clkcon_enable,
-                .ctrlbit        = S3C2410_CLKCON_UART0,
-        }, {
-                .name           = "uart",
-                .devname        = "s3c2410-uart.1",
-                .parent         = &clk_p,
-                .enable         = s3c2410_clkcon_enable,
-                .ctrlbit        = S3C2410_CLKCON_UART1,
-        }, {
-                .name           = "uart",
-                .devname        = "s3c2410-uart.2",
-                .parent         = &clk_p,
-                .enable         = s3c2410_clkcon_enable,
-                .ctrlbit        = S3C2410_CLKCON_UART2,
-        }, {
-                .name           = "rtc",
-                .parent         = &clk_p,
-                .enable         = s3c2410_clkcon_enable,
-                .ctrlbit        = S3C2410_CLKCON_RTC,
-        }, {
-                .name           = "watchdog",
-                .parent         = &clk_p,
-                .ctrlbit        = 0,
-        }, {
-                .name           = "usb-bus-host",
-                .parent         = &clk_usb_bus,
-        }, {
-                .name           = "usb-bus-gadget",
-                .parent         = &clk_usb_bus,
-        },
+static struct clk clk_lcd = {
+        .name           = "lcd",
+        .parent         = &clk_h,
+        .enable         = s3c2410_clkcon_enable,
+        .ctrlbit        = S3C2410_CLKCON_LCDC,
+};
+
+static struct clk clk_gpio = {
+        .name           = "gpio",
+        .parent         = &clk_p,
+        .enable         = s3c2410_clkcon_enable,
+        .ctrlbit        = S3C2410_CLKCON_GPIO,
+};
+
+static struct clk clk_usb_host = {
+        .name           = "usb-host",
+        .parent         = &clk_h,
+        .enable         = s3c2410_clkcon_enable,
+        .ctrlbit        = S3C2410_CLKCON_USBH,
+};
+
+static struct clk clk_usb_device = {
+        .name           = "usb-device",
+        .parent         = &clk_h,
+        .enable         = s3c2410_clkcon_enable,
+        .ctrlbit        = S3C2410_CLKCON_USBD,
+};
+
+static struct clk clk_timers = {
+        .name           = "timers",
+        .parent         = &clk_p,
+        .enable         = s3c2410_clkcon_enable,
+        .ctrlbit        = S3C2410_CLKCON_PWMT,
+};
+
+struct clk s3c24xx_clk_uart0 = {
+        .name           = "uart",
+        .devname        = "s3c2410-uart.0",
+        .parent         = &clk_p,
+        .enable         = s3c2410_clkcon_enable,
+        .ctrlbit        = S3C2410_CLKCON_UART0,
+};
+
+struct clk s3c24xx_clk_uart1 = {
+        .name           = "uart",
+        .devname        = "s3c2410-uart.1",
+        .parent         = &clk_p,
+        .enable         = s3c2410_clkcon_enable,
+        .ctrlbit        = S3C2410_CLKCON_UART1,
+};
+
+struct clk s3c24xx_clk_uart2 = {
+        .name           = "uart",
+        .devname        = "s3c2410-uart.2",
+        .parent         = &clk_p,
+        .enable         = s3c2410_clkcon_enable,
+        .ctrlbit        = S3C2410_CLKCON_UART2,
+};
+
+static struct clk clk_rtc = {
+        .name           = "rtc",
+        .parent         = &clk_p,
+        .enable         = s3c2410_clkcon_enable,
+        .ctrlbit        = S3C2410_CLKCON_RTC,
+};
+
+static struct clk clk_watchdog = {
+        .name           = "watchdog",
+        .parent         = &clk_p,
+        .ctrlbit        = 0,
+};
+
+static struct clk clk_usb_bus_host = {
+        .name           = "usb-bus-host",
+        .parent         = &clk_usb_bus,
+};
+
+static struct clk clk_usb_bus_gadget = {
+        .name           = "usb-bus-gadget",
+        .parent         = &clk_usb_bus,
+};
+
+static struct clk *init_clocks[] = {
+        &clk_lcd,
+        &clk_gpio,
+        &clk_usb_host,
+        &clk_usb_device,
+        &clk_timers,
+        &s3c24xx_clk_uart0,
+        &s3c24xx_clk_uart1,
+        &s3c24xx_clk_uart2,
+        &clk_rtc,
+        &clk_watchdog,
+        &clk_usb_bus_host,
+        &clk_usb_bus_gadget,
 };
 
 /* s3c2410_baseclk_add()
@@ -195,7 +230,6 @@ int __init s3c2410_baseclk_add(void)
 {
         unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW);
         unsigned long clkcon  = __raw_readl(S3C2410_CLKCON);
-        struct clk *clkp;
         struct clk *xtal;
         int ret;
         int ptr;
@@ -207,8 +241,9 @@ int __init s3c2410_baseclk_add(void)
 
         /* register clocks from clock array */
 
-        clkp = init_clocks;
-        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) {
+        for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++) {
+                struct clk *clkp = init_clocks[ptr];
+
                 /* ensure that we note the clock state */
 
                 clkp->usage = clkcon & clkp->ctrlbit ? 1 : 0;
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2440.c b/arch/arm/mach-s3c24xx/clock-s3c2440.c
index 1069b5680826..aaf006d1d6dc 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2440.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2440.c
@@ -166,6 +166,9 @@ static struct clk_lookup s3c2440_clk_lookup[] = {
         CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
         CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
         CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n),
+        CLKDEV_INIT("s3c2440-uart.0", "uart", &s3c24xx_clk_uart0),
+        CLKDEV_INIT("s3c2440-uart.1", "uart", &s3c24xx_clk_uart1),
+        CLKDEV_INIT("s3c2440-uart.2", "uart", &s3c24xx_clk_uart2),
         CLKDEV_INIT("s3c2440-camif", "camera", &s3c2440_clk_cam_upll),
 };
 
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index e115f6742107..c5be60d85e4b 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -1162,9 +1162,6 @@ static void __init eva_init(void)
         gpio_request_one(61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
         gpio_request_one(202, GPIOF_OUT_INIT_LOW, NULL); /* LCD0_LED_CONT */
 
-        /* Touchscreen */
-        gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */
-
         /* GETHER */
         gpio_request_one(18, GPIOF_OUT_INIT_HIGH, NULL); /* PHY_RST */
 
diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
index d5554646916c..3354a85c90f7 100644
--- a/arch/arm/mach-shmobile/board-bockw.c
+++ b/arch/arm/mach-shmobile/board-bockw.c
@@ -167,7 +167,13 @@ static const struct pinctrl_map bockw_pinctrl_map[] = {
                                   "usb1", "usb1"),
         /* SDHI0 */
         PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
-                                  "sdhi0", "sdhi0"),
+                                  "sdhi0_data4", "sdhi0"),
+        PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
+                                  "sdhi0_ctrl", "sdhi0"),
+        PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
+                                  "sdhi0_cd", "sdhi0"),
+        PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
+                                  "sdhi0_wp", "sdhi0"),
 };
 
 #define FPGA    0x18200000
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index d73e21d3ea8a..8d6bd5c5efb9 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -59,7 +59,7 @@ static __initdata struct gpio_led_platform_data lager_leds_pdata = {
 #define GPIO_KEY(c, g, d, ...) \
         { .code = c, .gpio = g, .desc = d, .active_low = 1 }
 
-static __initdata struct gpio_keys_button gpio_buttons[] = {
+static struct gpio_keys_button gpio_buttons[] = {
         GPIO_KEY(KEY_4,         RCAR_GP_PIN(1, 28),     "SW2-pin4"),
         GPIO_KEY(KEY_3,         RCAR_GP_PIN(1, 26),     "SW2-pin3"),
         GPIO_KEY(KEY_2,         RCAR_GP_PIN(1, 24),     "SW2-pin2"),
diff --git a/arch/arm/mach-shmobile/headsmp-scu.S b/arch/arm/mach-shmobile/headsmp-scu.S
index 6f9865467258..bfd920083a3b 100644
--- a/arch/arm/mach-shmobile/headsmp-scu.S
+++ b/arch/arm/mach-shmobile/headsmp-scu.S
@@ -23,7 +23,6 @@
 #include <linux/init.h>
 #include <asm/memory.h>
 
-        __CPUINIT
 /*
  * Boot code for secondary CPUs.
  *
diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S
index 559d1ce5f57e..a9d212498987 100644
--- a/arch/arm/mach-shmobile/headsmp.S
+++ b/arch/arm/mach-shmobile/headsmp.S
@@ -14,8 +14,6 @@
 #include <linux/init.h>
 #include <asm/memory.h>
 
-        __CPUINIT
-
 ENTRY(shmobile_invalidate_start)
         bl      v7_invalidate_l1
         b       secondary_startup
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
index 80991b35f4ac..22a05a869d25 100644
--- a/arch/arm/mach-shmobile/smp-emev2.c
+++ b/arch/arm/mach-shmobile/smp-emev2.c
@@ -30,7 +30,7 @@
 
 #define EMEV2_SCU_BASE 0x1e000000
 
-static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         arch_send_wakeup_ipi_mask(cpumask_of(cpu_logical_map(cpu)));
         return 0;
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index 526cfaae81c1..9bdf810f2a87 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -81,7 +81,7 @@ static int r8a7779_platform_cpu_kill(unsigned int cpu)
         return ret ? ret : 1;
 }
 
-static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         struct r8a7779_pm_ch *ch = NULL;
         int ret = -EIO;
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index d613113a04bd..d5fc3ed4e315 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -48,7 +48,7 @@ void __init sh73a0_register_twd(void)
 }
 #endif
 
-static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         cpu = cpu_logical_map(cpu);
 
diff --git a/arch/arm/mach-socfpga/headsmp.S b/arch/arm/mach-socfpga/headsmp.S
index 9004bfb1756e..95c115d8b5ee 100644
--- a/arch/arm/mach-socfpga/headsmp.S
+++ b/arch/arm/mach-socfpga/headsmp.S
@@ -10,7 +10,6 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 
-        __CPUINIT
         .arch   armv7-a
 
 ENTRY(secondary_trampoline)
diff --git a/arch/arm/mach-socfpga/platsmp.c b/arch/arm/mach-socfpga/platsmp.c
index b51ce8c7929d..5356a72bc8ce 100644
--- a/arch/arm/mach-socfpga/platsmp.c
+++ b/arch/arm/mach-socfpga/platsmp.c
@@ -29,7 +29,7 @@
 
 #include "core.h"
 
-static int __cpuinit socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
 
diff --git a/arch/arm/mach-spear/generic.h b/arch/arm/mach-spear/generic.h
index 904f2c907b46..a99d90a4d09c 100644
--- a/arch/arm/mach-spear/generic.h
+++ b/arch/arm/mach-spear/generic.h
@@ -37,7 +37,7 @@ void __init spear13xx_l2x0_init(void);
 void spear_restart(enum reboot_mode, const char *);
 
 void spear13xx_secondary_startup(void);
-void __cpuinit spear13xx_cpu_die(unsigned int cpu);
+void spear13xx_cpu_die(unsigned int cpu);
 
 extern struct smp_operations spear13xx_smp_ops;
 
diff --git a/arch/arm/mach-spear/platsmp.c b/arch/arm/mach-spear/platsmp.c
index 9c4c722c954e..5c4a19887b2b 100644
--- a/arch/arm/mach-spear/platsmp.c
+++ b/arch/arm/mach-spear/platsmp.c
@@ -24,7 +24,7 @@ static DEFINE_SPINLOCK(boot_lock);
 
 static void __iomem *scu_base = IOMEM(VA_SCU_BASE);
 
-static void __cpuinit spear13xx_secondary_init(unsigned int cpu)
+static void spear13xx_secondary_init(unsigned int cpu)
 {
         /*
          * let the primary processor know we're out of the
@@ -40,7 +40,7 @@ static void __cpuinit spear13xx_secondary_init(unsigned int cpu)
         spin_unlock(&boot_lock);
 }
 
-static int __cpuinit spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long timeout;
 
diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
index d04e3bfe1918..835833e3c4f8 100644
--- a/arch/arm/mach-sti/Kconfig
+++ b/arch/arm/mach-sti/Kconfig
@@ -11,8 +11,9 @@ menuconfig ARCH_STI
         select HAVE_SMP
         select HAVE_ARM_SCU if SMP
         select ARCH_REQUIRE_GPIOLIB
-        select ARM_ERRATA_720789
         select ARM_ERRATA_754322
+        select ARM_ERRATA_764369
+        select ARM_ERRATA_775420
         select PL310_ERRATA_753970 if CACHE_PL310
         select PL310_ERRATA_769419 if CACHE_PL310
         help
diff --git a/arch/arm/mach-sti/headsmp.S b/arch/arm/mach-sti/headsmp.S
index 78ebc7559f53..4c09bae86edf 100644
--- a/arch/arm/mach-sti/headsmp.S
+++ b/arch/arm/mach-sti/headsmp.S
@@ -16,8 +16,6 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 
-        __INIT
-
 /*
  * ST specific entry point for secondary CPUs.  This provides
  * a "holding pen" into which all secondary cores are held until we're
diff --git a/arch/arm/mach-sti/platsmp.c b/arch/arm/mach-sti/platsmp.c
index 977a863468fc..dce50d983a8e 100644
--- a/arch/arm/mach-sti/platsmp.c
+++ b/arch/arm/mach-sti/platsmp.c
@@ -27,7 +27,7 @@
 
 #include "smp.h"
 
-static void __cpuinit write_pen_release(int val)
+static void write_pen_release(int val)
 {
         pen_release = val;
         smp_wmb();
@@ -37,7 +37,7 @@ static void __cpuinit write_pen_release(int val)
 
 static DEFINE_SPINLOCK(boot_lock);
 
-void __cpuinit sti_secondary_init(unsigned int cpu)
+void sti_secondary_init(unsigned int cpu)
 {
         trace_hardirqs_off();
 
@@ -54,7 +54,7 @@ void __cpuinit sti_secondary_init(unsigned int cpu)
         spin_unlock(&boot_lock);
 }
 
-int __cpuinit sti_boot_secondary(unsigned int cpu, struct task_struct *idle)
+int sti_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long timeout;
 
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index 24db4ac428ae..97b33a2a2d75 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -35,7 +35,7 @@
 
 static cpumask_t tegra_cpu_init_mask;
 
-static void __cpuinit tegra_secondary_init(unsigned int cpu)
+static void tegra_secondary_init(unsigned int cpu)
 {
         cpumask_set_cpu(cpu, &tegra_cpu_init_mask);
 }
@@ -167,7 +167,7 @@ static int tegra114_boot_secondary(unsigned int cpu, struct task_struct *idle)
         return ret;
 }
 
-static int __cpuinit tegra_boot_secondary(unsigned int cpu,
+static int tegra_boot_secondary(unsigned int cpu,
                                           struct task_struct *idle)
 {
         if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && tegra_chip_id == TEGRA20)
diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c
index 94e69bee3da5..261fec140c06 100644
--- a/arch/arm/mach-tegra/pm.c
+++ b/arch/arm/mach-tegra/pm.c
@@ -191,7 +191,7 @@ static const char *lp_state[TEGRA_MAX_SUSPEND_MODE] = {
         [TEGRA_SUSPEND_LP0] = "LP0",
 };
 
-static int __cpuinit tegra_suspend_enter(suspend_state_t state)
+static int tegra_suspend_enter(suspend_state_t state)
 {
         enum tegra_suspend_mode mode = tegra_pmc_get_suspend_mode();
 
diff --git a/arch/arm/mach-ux500/board-mop500-audio.c b/arch/arm/mach-ux500/board-mop500-audio.c
index bfe443daf4b0..ec0807247e60 100644
--- a/arch/arm/mach-ux500/board-mop500-audio.c
+++ b/arch/arm/mach-ux500/board-mop500-audio.c
@@ -17,7 +17,6 @@
 #include "ste-dma40-db8500.h"
 #include "board-mop500.h"
 #include "devices-db8500.h"
-#include "pins-db8500.h"
 
 static struct stedma40_chan_cfg msp0_dma_rx = {
         .high_priority = true,
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index 7936d40a5c37..0efb1560fc35 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -14,7 +14,6 @@
 
 #include <asm/mach-types.h>
 
-#include "pins-db8500.h"
 #include "board-mop500.h"
 
 enum custom_pin_cfg_t {
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index df5d27a532e9..ad0806eff762 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -42,7 +42,6 @@
 #include <linux/platform_data/dma-ste-dma40.h>
 
 #include <asm/mach-types.h>
-#include <asm/mach/arch.h>
 
 #include "setup.h"
 #include "devices.h"
@@ -325,21 +324,19 @@ static struct lp55xx_platform_data __initdata lp5521_sec_data = {
        .clock_mode     = LP55XX_CLOCK_EXT,
 };
 
+/* I2C0 devices only available on the first HREF/MOP500 */
 static struct i2c_board_info __initdata mop500_i2c0_devices[] = {
         {
                 I2C_BOARD_INFO("tc3589x", 0x42),
                 .irq            = NOMADIK_GPIO_TO_IRQ(217),
                 .platform_data  = &mop500_tc35892_data,
         },
-        /* I2C0 devices only available prior to HREFv60 */
         {
                 I2C_BOARD_INFO("tps61052", 0x33),
                 .platform_data  = &mop500_tps61052_data,
         },
 };
 
-#define NUM_PRE_V60_I2C0_DEVICES 1
-
 static struct i2c_board_info __initdata mop500_i2c2_devices[] = {
         {
                 /* lp5521 LED driver, 1st device */
@@ -357,6 +354,17 @@ static struct i2c_board_info __initdata mop500_i2c2_devices[] = {
         },
 };
 
+static int __init mop500_i2c_board_init(void)
+{
+        if (machine_is_u8500())
+                mop500_uib_i2c_add(0, mop500_i2c0_devices,
+                                   ARRAY_SIZE(mop500_i2c0_devices));
+        mop500_uib_i2c_add(2, mop500_i2c2_devices,
+                           ARRAY_SIZE(mop500_i2c2_devices));
+        return 0;
+}
+device_initcall(mop500_i2c_board_init);
+
 static void __init mop500_i2c_init(struct device *parent)
 {
         db8500_add_i2c0(parent, NULL);
@@ -565,7 +573,6 @@ static struct platform_device *snowball_platform_devs[] __initdata = {
 static void __init mop500_init_machine(void)
 {
         struct device *parent = NULL;
-        int i2c0_devs;
         int i;
 
         platform_device_register(&db8500_prcmu_device);
@@ -588,19 +595,13 @@ static void __init mop500_init_machine(void)
         mop500_spi_init(parent);
         mop500_audio_init(parent);
         mop500_uart_init(parent);
-
         u8500_cryp1_hash1_init(parent);
 
-        i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
-
-        i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
-        i2c_register_board_info(2, mop500_i2c2_devices,
-                                ARRAY_SIZE(mop500_i2c2_devices));
-
         /* This board has full regulator constraints */
         regulator_has_full_constraints();
 }
 
+
 static void __init snowball_init_machine(void)
 {
         struct device *parent = NULL;
@@ -635,7 +636,6 @@ static void __init snowball_init_machine(void)
 static void __init hrefv60_init_machine(void)
 {
         struct device *parent = NULL;
-        int i2c0_devs;
         int i;
 
         platform_device_register(&db8500_prcmu_device);
@@ -664,14 +664,6 @@ static void __init hrefv60_init_machine(void)
         mop500_audio_init(parent);
         mop500_uart_init(parent);
 
-        i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
-
-        i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
-
-        i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
-        i2c_register_board_info(2, mop500_i2c2_devices,
-                                ARRAY_SIZE(mop500_i2c2_devices));
-
         /* This board has full regulator constraints */
         regulator_has_full_constraints();
 }
@@ -686,6 +678,7 @@ MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
         .init_time      = ux500_timer_init,
         .init_machine   = mop500_init_machine,
         .init_late      = ux500_init_late,
+        .restart        = ux500_restart,
 MACHINE_END
 
 MACHINE_START(U8520, "ST-Ericsson U8520 Platform HREFP520")
@@ -695,6 +688,7 @@ MACHINE_START(U8520, "ST-Ericsson U8520 Platform HREFP520")
         .init_time      = ux500_timer_init,
         .init_machine   = mop500_init_machine,
         .init_late      = ux500_init_late,
+        .restart        = ux500_restart,
 MACHINE_END
 
 MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
@@ -705,6 +699,7 @@ MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
         .init_time      = ux500_timer_init,
         .init_machine   = hrefv60_init_machine,
         .init_late      = ux500_init_late,
+        .restart        = ux500_restart,
 MACHINE_END
 
 MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
@@ -716,4 +711,5 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
         .init_time      = ux500_timer_init,
         .init_machine   = snowball_init_machine,
         .init_late      = NULL,
+        .restart        = ux500_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 12eee8167525..23590b7f00b7 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -26,7 +26,6 @@
 
 #include <asm/pmu.h>
 #include <asm/mach/map.h>
-#include <asm/mach/arch.h>
 
 #include "setup.h"
 #include "devices.h"
@@ -157,7 +156,8 @@ static void __init db8500_add_gpios(struct device *parent)
                 .supports_sleepmode = true,
         };
 
-        dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base),
+        dbx500_add_gpios(parent, db8500_gpio_base,
+                         ARRAY_SIZE(db8500_gpio_base),
                          IRQ_DB8500_GPIO0, &pdata);
         dbx500_add_pinctrl(parent, "pinctrl-db8500", U8500_PRCMU_BASE);
 }
@@ -325,6 +325,7 @@ DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
         .init_machine   = u8500_init_machine,
         .init_late      = NULL,
         .dt_compat      = stericsson_dt_platform_compat,
+        .restart        = ux500_restart,
 MACHINE_END
 
 #endif
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index e6fb0239151b..5d7eebcabc63 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -31,6 +31,14 @@
 #include "db8500-regs.h"
 #include "id.h"
 
+void ux500_restart(enum reboot_mode mode, const char *cmd)
+{
+        local_irq_disable();
+        local_fiq_disable();
+
+        prcmu_system_reset(0);
+}
+
 /*
  * FIXME: Should we set up the GPIO domain here?
  *
diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c
index 516a6f57d159..bc316062e0c2 100644
--- a/arch/arm/mach-ux500/devices-db8500.c
+++ b/arch/arm/mach-ux500/devices-db8500.c
@@ -49,6 +49,7 @@ struct stedma40_platform_data dma40_plat_data = {
 struct platform_device u8500_dma40_device = {
         .dev = {
                 .platform_data = &dma40_plat_data,
+                .coherent_dma_mask = DMA_BIT_MASK(32),
         },
         .name = "dma40",
         .id = 0,
diff --git a/arch/arm/mach-ux500/headsmp.S b/arch/arm/mach-ux500/headsmp.S
index 08da5589bcd8..9cdea049485d 100644
--- a/arch/arm/mach-ux500/headsmp.S
+++ b/arch/arm/mach-ux500/headsmp.S
@@ -11,8 +11,6 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 
-        __INIT
-
 /*
  * U8500 specific entry point for secondary CPUs.
  */
diff --git a/arch/arm/mach-ux500/pins-db8500.h b/arch/arm/mach-ux500/pins-db8500.h
deleted file mode 100644
index 062c7acf4576..000000000000
--- a/arch/arm/mach-ux500/pins-db8500.h
+++ /dev/null
@@ -1,746 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2010
- *
- * License terms: GNU General Public License, version 2
- * Author: Rabin Vincent <rabin.vincent@stericsson.com>
- */
-
-#ifndef __MACH_PINS_DB8500_H
-#define __MACH_PINS_DB8500_H
-
-/*
- * TODO: Eventually encode all non-board specific pull up/down configuration
- * here.
- */
-
-#define GPIO0_GPIO              PIN_CFG(0, GPIO)
-#define GPIO0_U0_CTSn           PIN_CFG(0, ALT_A)
-#define GPIO0_TRIG_OUT          PIN_CFG(0, ALT_B)
-#define GPIO0_IP_TDO            PIN_CFG(0, ALT_C)
-
-#define GPIO1_GPIO              PIN_CFG(1, GPIO)
-#define GPIO1_U0_RTSn           PIN_CFG(1, ALT_A)
-#define GPIO1_TRIG_IN           PIN_CFG(1, ALT_B)
-#define GPIO1_IP_TDI            PIN_CFG(1, ALT_C)
-
-#define GPIO2_GPIO              PIN_CFG(2, GPIO)
-#define GPIO2_U0_RXD            PIN_CFG(2, ALT_A)
-#define GPIO2_NONE              PIN_CFG(2, ALT_B)
-#define GPIO2_IP_TMS            PIN_CFG(2, ALT_C)
-
-#define GPIO3_GPIO              PIN_CFG(3, GPIO)
-#define GPIO3_U0_TXD            PIN_CFG(3, ALT_A)
-#define GPIO3_NONE              PIN_CFG(3, ALT_B)
-#define GPIO3_IP_TCK            PIN_CFG(3, ALT_C)
-
-#define GPIO4_GPIO              PIN_CFG(4, GPIO)
-#define GPIO4_U1_RXD            PIN_CFG(4, ALT_A)
-#define GPIO4_I2C4_SCL          PIN_CFG(4, ALT_B)
-#define GPIO4_IP_TRSTn          PIN_CFG(4, ALT_C)
-
-#define GPIO5_GPIO              PIN_CFG(5, GPIO)
-#define GPIO5_U1_TXD            PIN_CFG(5, ALT_A)
-#define GPIO5_I2C4_SDA          PIN_CFG(5, ALT_B)
-#define GPIO5_IP_GPIO6          PIN_CFG(5, ALT_C)
-
-#define GPIO6_GPIO              PIN_CFG(6, GPIO)
-#define GPIO6_U1_CTSn           PIN_CFG(6, ALT_A)
-#define GPIO6_I2C1_SCL          PIN_CFG(6, ALT_B)
-#define GPIO6_IP_GPIO0          PIN_CFG(6, ALT_C)
-
-#define GPIO7_GPIO              PIN_CFG(7, GPIO)
-#define GPIO7_U1_RTSn           PIN_CFG(7, ALT_A)
-#define GPIO7_I2C1_SDA          PIN_CFG(7, ALT_B)
-#define GPIO7_IP_GPIO1          PIN_CFG(7, ALT_C)
-
-#define GPIO8_GPIO              PIN_CFG(8, GPIO)
-#define GPIO8_IPI2C_SDA         PIN_CFG(8, ALT_A)
-#define GPIO8_I2C2_SDA          PIN_CFG(8, ALT_B)
-
-#define GPIO9_GPIO              PIN_CFG(9, GPIO)
-#define GPIO9_IPI2C_SCL         PIN_CFG(9, ALT_A)
-#define GPIO9_I2C2_SCL          PIN_CFG(9, ALT_B)
-
-#define GPIO10_GPIO             PIN_CFG(10, GPIO)
-#define GPIO10_IPI2C_SDA        PIN_CFG(10, ALT_A)
-#define GPIO10_I2C2_SDA         PIN_CFG(10, ALT_B)
-#define GPIO10_IP_GPIO3         PIN_CFG(10, ALT_C)
-
-#define GPIO11_GPIO             PIN_CFG(11, GPIO)
-#define GPIO11_IPI2C_SCL        PIN_CFG(11, ALT_A)
-#define GPIO11_I2C2_SCL         PIN_CFG(11, ALT_B)
-#define GPIO11_IP_GPIO2         PIN_CFG(11, ALT_C)
-
-#define GPIO12_GPIO             PIN_CFG(12, GPIO)
-#define GPIO12_MSP0_TXD         PIN_CFG(12, ALT_A)
-#define GPIO12_MSP0_RXD         PIN_CFG(12, ALT_B)
-
-#define GPIO13_GPIO             PIN_CFG(13, GPIO)
-#define GPIO13_MSP0_TFS         PIN_CFG(13, ALT_A)
-
-#define GPIO14_GPIO             PIN_CFG(14, GPIO)
-#define GPIO14_MSP0_TCK         PIN_CFG(14, ALT_A)
-
-#define GPIO15_GPIO             PIN_CFG(15, GPIO)
-#define GPIO15_MSP0_RXD         PIN_CFG(15, ALT_A)
-#define GPIO15_MSP0_TXD         PIN_CFG(15, ALT_B)
-
-#define GPIO16_GPIO             PIN_CFG(16, GPIO)
-#define GPIO16_MSP0_RFS         PIN_CFG(16, ALT_A)
-#define GPIO16_I2C1_SCL         PIN_CFG(16, ALT_B)
-#define GPIO16_SLIM0_DAT        PIN_CFG(16, ALT_C)
-
-#define GPIO17_GPIO             PIN_CFG(17, GPIO)
-#define GPIO17_MSP0_RCK         PIN_CFG(17, ALT_A)
-#define GPIO17_I2C1_SDA         PIN_CFG(17, ALT_B)
-#define GPIO17_SLIM0_CLK        PIN_CFG(17, ALT_C)
-
-#define GPIO18_GPIO             PIN_CFG(18, GPIO)
-#define GPIO18_MC0_CMDDIR       PIN_CFG_INPUT(18, ALT_A, PULLUP)
-#define GPIO18_U2_RXD           PIN_CFG(18, ALT_B)
-#define GPIO18_MS_IEP           PIN_CFG(18, ALT_C)
-
-#define GPIO19_GPIO             PIN_CFG(19, GPIO)
-#define GPIO19_MC0_DAT0DIR      PIN_CFG_INPUT(19, ALT_A, PULLUP)
-#define GPIO19_U2_TXD           PIN_CFG(19, ALT_B)
-#define GPIO19_MS_DAT0DIR       PIN_CFG(19, ALT_C)
-
-#define GPIO20_GPIO             PIN_CFG(20, GPIO)
-#define GPIO20_MC0_DAT2DIR      PIN_CFG_INPUT(20, ALT_A, PULLUP)
-#define GPIO20_UARTMOD_TXD      PIN_CFG(20, ALT_B)
-#define GPIO20_IP_TRIGOUT       PIN_CFG(20, ALT_C)
-
-#define GPIO21_GPIO             PIN_CFG(21, GPIO)
-#define GPIO21_MC0_DAT31DIR     PIN_CFG_INPUT(21, ALT_A, PULLUP)
-#define GPIO21_MSP0_SCK         PIN_CFG(21, ALT_B)
-#define GPIO21_MS_DAT31DIR      PIN_CFG(21, ALT_C)
-
-#define GPIO22_GPIO             PIN_CFG(22, GPIO)
-#define GPIO22_MC0_FBCLK        PIN_CFG_INPUT(22, ALT_A, PULLUP)
-#define GPIO22_UARTMOD_RXD      PIN_CFG(22, ALT_B)
-#define GPIO22_MS_FBCLK         PIN_CFG(22, ALT_C)
-
-#define GPIO23_GPIO             PIN_CFG(23, GPIO)
-#define GPIO23_MC0_CLK          PIN_CFG_INPUT(23, ALT_A, PULLUP)
-#define GPIO23_STMMOD_CLK       PIN_CFG(23, ALT_B)
-#define GPIO23_MS_CLK           PIN_CFG(23, ALT_C)
-
-#define GPIO24_GPIO             PIN_CFG(24, GPIO)
-#define GPIO24_MC0_CMD          PIN_CFG_INPUT(24, ALT_A, PULLUP)
-#define GPIO24_UARTMOD_RXD      PIN_CFG(24, ALT_B)
-#define GPIO24_MS_BS            PIN_CFG(24, ALT_C)
-
-#define GPIO25_GPIO             PIN_CFG(25, GPIO)
-#define GPIO25_MC0_DAT0         PIN_CFG_INPUT(25, ALT_A, PULLUP)
-#define GPIO25_STMMOD_DAT0      PIN_CFG(25, ALT_B)
-#define GPIO25_MS_DAT0          PIN_CFG(25, ALT_C)
-
-#define GPIO26_GPIO             PIN_CFG(26, GPIO)
-#define GPIO26_MC0_DAT1         PIN_CFG_INPUT(26, ALT_A, PULLUP)
-#define GPIO26_STMMOD_DAT1      PIN_CFG(26, ALT_B)
-#define GPIO26_MS_DAT1          PIN_CFG(26, ALT_C)
-
-#define GPIO27_GPIO             PIN_CFG(27, GPIO)
-#define GPIO27_MC0_DAT2         PIN_CFG_INPUT(27, ALT_A, PULLUP)
-#define GPIO27_STMMOD_DAT2      PIN_CFG(27, ALT_B)
-#define GPIO27_MS_DAT2          PIN_CFG(27, ALT_C)
-
-#define GPIO28_GPIO             PIN_CFG(28, GPIO)
-#define GPIO28_MC0_DAT3         PIN_CFG_INPUT(28, ALT_A, PULLUP)
-#define GPIO28_STMMOD_DAT3      PIN_CFG(28, ALT_B)
-#define GPIO28_MS_DAT3          PIN_CFG(28, ALT_C)
-
-#define GPIO29_GPIO             PIN_CFG(29, GPIO)
-#define GPIO29_MC0_DAT4         PIN_CFG(29, ALT_A)
-#define GPIO29_SPI3_CLK         PIN_CFG(29, ALT_B)
-#define GPIO29_U2_RXD           PIN_CFG(29, ALT_C)
-
-#define GPIO30_GPIO             PIN_CFG(30, GPIO)
-#define GPIO30_MC0_DAT5         PIN_CFG(30, ALT_A)
-#define GPIO30_SPI3_RXD         PIN_CFG(30, ALT_B)
-#define GPIO30_U2_TXD           PIN_CFG(30, ALT_C)
-
-#define GPIO31_GPIO             PIN_CFG(31, GPIO)
-#define GPIO31_MC0_DAT6         PIN_CFG(31, ALT_A)
-#define GPIO31_SPI3_FRM         PIN_CFG(31, ALT_B)
-#define GPIO31_U2_CTSn          PIN_CFG(31, ALT_C)
-
-#define GPIO32_GPIO             PIN_CFG(32, GPIO)
-#define GPIO32_MC0_DAT7         PIN_CFG(32, ALT_A)
-#define GPIO32_SPI3_TXD         PIN_CFG(32, ALT_B)
-#define GPIO32_U2_RTSn          PIN_CFG(32, ALT_C)
-
-#define GPIO33_GPIO             PIN_CFG(33, GPIO)
-#define GPIO33_MSP1_TXD         PIN_CFG(33, ALT_A)
-#define GPIO33_MSP1_RXD         PIN_CFG(33, ALT_B)
-#define GPIO33_U0_DTRn          PIN_CFG(33, ALT_C)
-
-#define GPIO34_GPIO             PIN_CFG(34, GPIO)
-#define GPIO34_MSP1_TFS         PIN_CFG(34, ALT_A)
-#define GPIO34_NONE             PIN_CFG(34, ALT_B)
-#define GPIO34_U0_DCDn          PIN_CFG(34, ALT_C)
-
-#define GPIO35_GPIO             PIN_CFG(35, GPIO)
-#define GPIO35_MSP1_TCK         PIN_CFG(35, ALT_A)
-#define GPIO35_NONE             PIN_CFG(35, ALT_B)
-#define GPIO35_U0_DSRn          PIN_CFG(35, ALT_C)
-
-#define GPIO36_GPIO             PIN_CFG(36, GPIO)
-#define GPIO36_MSP1_RXD         PIN_CFG(36, ALT_A)
-#define GPIO36_MSP1_TXD         PIN_CFG(36, ALT_B)
-#define GPIO36_U0_RIn           PIN_CFG(36, ALT_C)
-
-#define GPIO64_GPIO             PIN_CFG(64, GPIO)
-#define GPIO64_LCDB_DE          PIN_CFG(64, ALT_A)
-#define GPIO64_KP_O1            PIN_CFG(64, ALT_B)
-#define GPIO64_IP_GPIO4         PIN_CFG(64, ALT_C)
-
-#define GPIO65_GPIO             PIN_CFG(65, GPIO)
-#define GPIO65_LCDB_HSO         PIN_CFG(65, ALT_A)
-#define GPIO65_KP_O0            PIN_CFG(65, ALT_B)
-#define GPIO65_IP_GPIO5         PIN_CFG(65, ALT_C)
-
-#define GPIO66_GPIO             PIN_CFG(66, GPIO)
-#define GPIO66_LCDB_VSO         PIN_CFG(66, ALT_A)
-#define GPIO66_KP_I1            PIN_CFG(66, ALT_B)
-#define GPIO66_IP_GPIO6         PIN_CFG(66, ALT_C)
-
-#define GPIO67_GPIO             PIN_CFG(67, GPIO)
-#define GPIO67_LCDB_CLK         PIN_CFG(67, ALT_A)
-#define GPIO67_KP_I0            PIN_CFG(67, ALT_B)
-#define GPIO67_IP_GPIO7         PIN_CFG(67, ALT_C)
-
-#define GPIO68_GPIO             PIN_CFG(68, GPIO)
-#define GPIO68_LCD_VSI0         PIN_CFG(68, ALT_A)
-#define GPIO68_KP_O7            PIN_CFG(68, ALT_B)
-#define GPIO68_SM_CLE           PIN_CFG(68, ALT_C)
-
-#define GPIO69_GPIO             PIN_CFG(69, GPIO)
-#define GPIO69_LCD_VSI1         PIN_CFG(69, ALT_A)
-#define GPIO69_KP_I7            PIN_CFG(69, ALT_B)
-#define GPIO69_SM_ALE           PIN_CFG(69, ALT_C)
-
-#define GPIO70_GPIO             PIN_CFG(70, GPIO)
-#define GPIO70_LCD_D0           PIN_CFG(70, ALT_A)
-#define GPIO70_KP_O5            PIN_CFG(70, ALT_B)
-#define GPIO70_STMAPE_CLK       PIN_CFG(70, ALT_C)
-
-#define GPIO71_GPIO             PIN_CFG(71, GPIO)
-#define GPIO71_LCD_D1           PIN_CFG(71, ALT_A)
-#define GPIO71_KP_O4            PIN_CFG(71, ALT_B)
-#define GPIO71_STMAPE_DAT3      PIN_CFG(71, ALT_C)
-
-#define GPIO72_GPIO             PIN_CFG(72, GPIO)
-#define GPIO72_LCD_D2           PIN_CFG(72, ALT_A)
-#define GPIO72_KP_O3            PIN_CFG(72, ALT_B)
-#define GPIO72_STMAPE_DAT2      PIN_CFG(72, ALT_C)
-
-#define GPIO73_GPIO             PIN_CFG(73, GPIO)
-#define GPIO73_LCD_D3           PIN_CFG(73, ALT_A)
-#define GPIO73_KP_O2            PIN_CFG(73, ALT_B)
-#define GPIO73_STMAPE_DAT1      PIN_CFG(73, ALT_C)
-
-#define GPIO74_GPIO             PIN_CFG(74, GPIO)
-#define GPIO74_LCD_D4           PIN_CFG(74, ALT_A)
-#define GPIO74_KP_I5            PIN_CFG(74, ALT_B)
-#define GPIO74_STMAPE_DAT0      PIN_CFG(74, ALT_C)
-
-#define GPIO75_GPIO             PIN_CFG(75, GPIO)
-#define GPIO75_LCD_D5           PIN_CFG(75, ALT_A)
-#define GPIO75_KP_I4            PIN_CFG(75, ALT_B)
-#define GPIO75_U2_RXD           PIN_CFG(75, ALT_C)
-
-#define GPIO76_GPIO             PIN_CFG(76, GPIO)
-#define GPIO76_LCD_D6           PIN_CFG(76, ALT_A)
-#define GPIO76_KP_I3            PIN_CFG(76, ALT_B)
-#define GPIO76_U2_TXD           PIN_CFG(76, ALT_C)
-
-#define GPIO77_GPIO             PIN_CFG(77, GPIO)
-#define GPIO77_LCD_D7           PIN_CFG(77, ALT_A)
-#define GPIO77_KP_I2            PIN_CFG(77, ALT_B)
-#define GPIO77_NONE             PIN_CFG(77, ALT_C)
-
-#define GPIO78_GPIO             PIN_CFG(78, GPIO)
-#define GPIO78_LCD_D8           PIN_CFG(78, ALT_A)
-#define GPIO78_KP_O6            PIN_CFG(78, ALT_B)
-#define GPIO78_IP_GPIO2         PIN_CFG(78, ALT_C)
-
-#define GPIO79_GPIO             PIN_CFG(79, GPIO)
-#define GPIO79_LCD_D9           PIN_CFG(79, ALT_A)
-#define GPIO79_KP_I6            PIN_CFG(79, ALT_B)
-#define GPIO79_IP_GPIO3         PIN_CFG(79, ALT_C)
-
-#define GPIO80_GPIO             PIN_CFG(80, GPIO)
-#define GPIO80_LCD_D10          PIN_CFG(80, ALT_A)
-#define GPIO80_KP_SKA0          PIN_CFG(80, ALT_B)
-#define GPIO80_IP_GPIO4         PIN_CFG(80, ALT_C)
-
-#define GPIO81_GPIO             PIN_CFG(81, GPIO)
-#define GPIO81_LCD_D11          PIN_CFG(81, ALT_A)
-#define GPIO81_KP_SKB0          PIN_CFG(81, ALT_B)
-#define GPIO81_IP_GPIO5         PIN_CFG(81, ALT_C)
-
-#define GPIO82_GPIO             PIN_CFG(82, GPIO)
-#define GPIO82_LCD_D12          PIN_CFG(82, ALT_A)
-#define GPIO82_KP_O5            PIN_CFG(82, ALT_B)
-
-#define GPIO83_GPIO             PIN_CFG(83, GPIO)
-#define GPIO83_LCD_D13          PIN_CFG(83, ALT_A)
-#define GPIO83_KP_O4            PIN_CFG(83, ALT_B)
-
-#define GPIO84_GPIO             PIN_CFG(84, GPIO)
-#define GPIO84_LCD_D14          PIN_CFG(84, ALT_A)
-#define GPIO84_KP_I5            PIN_CFG(84, ALT_B)
-
-#define GPIO85_GPIO             PIN_CFG(85, GPIO)
-#define GPIO85_LCD_D15          PIN_CFG(85, ALT_A)
-#define GPIO85_KP_I4            PIN_CFG(85, ALT_B)
-
-#define GPIO86_GPIO             PIN_CFG(86, GPIO)
-#define GPIO86_LCD_D16          PIN_CFG(86, ALT_A)
-#define GPIO86_SM_ADQ0          PIN_CFG(86, ALT_B)
-#define GPIO86_MC5_DAT0         PIN_CFG(86, ALT_C)
-
-#define GPIO87_GPIO             PIN_CFG(87, GPIO)
-#define GPIO87_LCD_D17          PIN_CFG(87, ALT_A)
-#define GPIO87_SM_ADQ1          PIN_CFG(87, ALT_B)
-#define GPIO87_MC5_DAT1         PIN_CFG(87, ALT_C)
-
-#define GPIO88_GPIO             PIN_CFG(88, GPIO)
-#define GPIO88_LCD_D18          PIN_CFG(88, ALT_A)
-#define GPIO88_SM_ADQ2          PIN_CFG(88, ALT_B)
-#define GPIO88_MC5_DAT2         PIN_CFG(88, ALT_C)
-
-#define GPIO89_GPIO             PIN_CFG(89, GPIO)
-#define GPIO89_LCD_D19          PIN_CFG(89, ALT_A)
-#define GPIO89_SM_ADQ3          PIN_CFG(89, ALT_B)
-#define GPIO89_MC5_DAT3         PIN_CFG(89, ALT_C)
-
-#define GPIO90_GPIO             PIN_CFG(90, GPIO)
-#define GPIO90_LCD_D20          PIN_CFG(90, ALT_A)
-#define GPIO90_SM_ADQ4          PIN_CFG(90, ALT_B)
-#define GPIO90_MC5_CMD          PIN_CFG(90, ALT_C)
-
-#define GPIO91_GPIO             PIN_CFG(91, GPIO)
-#define GPIO91_LCD_D21          PIN_CFG(91, ALT_A)
-#define GPIO91_SM_ADQ5          PIN_CFG(91, ALT_B)
-#define GPIO91_MC5_FBCLK        PIN_CFG(91, ALT_C)
-
-#define GPIO92_GPIO             PIN_CFG(92, GPIO)
-#define GPIO92_LCD_D22          PIN_CFG(92, ALT_A)
-#define GPIO92_SM_ADQ6          PIN_CFG(92, ALT_B)
-#define GPIO92_MC5_CLK          PIN_CFG(92, ALT_C)
-
-#define GPIO93_GPIO             PIN_CFG(93, GPIO)
-#define GPIO93_LCD_D23          PIN_CFG(93, ALT_A)
-#define GPIO93_SM_ADQ7          PIN_CFG(93, ALT_B)
-#define GPIO93_MC5_DAT4         PIN_CFG(93, ALT_C)
-
-#define GPIO94_GPIO             PIN_CFG(94, GPIO)
-#define GPIO94_KP_O7            PIN_CFG(94, ALT_A)
-#define GPIO94_SM_ADVn          PIN_CFG(94, ALT_B)
-#define GPIO94_MC5_DAT5         PIN_CFG(94, ALT_C)
-
-#define GPIO95_GPIO             PIN_CFG(95, GPIO)
-#define GPIO95_KP_I7            PIN_CFG(95, ALT_A)
-#define GPIO95_SM_CS0n          PIN_CFG(95, ALT_B)
-#define GPIO95_SM_PS0n          PIN_CFG(95, ALT_C)
-
-#define GPIO96_GPIO             PIN_CFG(96, GPIO)
-#define GPIO96_KP_O6            PIN_CFG(96, ALT_A)
-#define GPIO96_SM_OEn           PIN_CFG(96, ALT_B)
-#define GPIO96_MC5_DAT6         PIN_CFG(96, ALT_C)
-
-#define GPIO97_GPIO             PIN_CFG(97, GPIO)
-#define GPIO97_KP_I6            PIN_CFG(97, ALT_A)
-#define GPIO97_SM_WEn           PIN_CFG(97, ALT_B)
-#define GPIO97_MC5_DAT7         PIN_CFG(97, ALT_C)
-
-#define GPIO128_GPIO            PIN_CFG(128, GPIO)
-#define GPIO128_MC2_CLK         PIN_CFG_INPUT(128, ALT_A, PULLUP)
-#define GPIO128_SM_CKO          PIN_CFG(128, ALT_B)
-
-#define GPIO129_GPIO            PIN_CFG(129, GPIO)
-#define GPIO129_MC2_CMD         PIN_CFG_INPUT(129, ALT_A, PULLUP)
-#define GPIO129_SM_WAIT0n       PIN_CFG(129, ALT_B)
-
-#define GPIO130_GPIO            PIN_CFG(130, GPIO)
-#define GPIO130_MC2_FBCLK       PIN_CFG_INPUT(130, ALT_A, PULLUP)
-#define GPIO130_SM_FBCLK        PIN_CFG(130, ALT_B)
-#define GPIO130_MC2_RSTN        PIN_CFG(130, ALT_C)
-
-#define GPIO131_GPIO            PIN_CFG(131, GPIO)
-#define GPIO131_MC2_DAT0        PIN_CFG_INPUT(131, ALT_A, PULLUP)
-#define GPIO131_SM_ADQ8         PIN_CFG(131, ALT_B)
-
-#define GPIO132_GPIO            PIN_CFG(132, GPIO)
-#define GPIO132_MC2_DAT1        PIN_CFG_INPUT(132, ALT_A, PULLUP)
-#define GPIO132_SM_ADQ9         PIN_CFG(132, ALT_B)
-
-#define GPIO133_GPIO            PIN_CFG(133, GPIO)
-#define GPIO133_MC2_DAT2        PIN_CFG_INPUT(133, ALT_A, PULLUP)
-#define GPIO133_SM_ADQ10        PIN_CFG(133, ALT_B)
-
-#define GPIO134_GPIO            PIN_CFG(134, GPIO)
-#define GPIO134_MC2_DAT3        PIN_CFG_INPUT(134, ALT_A, PULLUP)
-#define GPIO134_SM_ADQ11        PIN_CFG(134, ALT_B)
-
-#define GPIO135_GPIO            PIN_CFG(135, GPIO)
-#define GPIO135_MC2_DAT4        PIN_CFG_INPUT(135, ALT_A, PULLUP)
-#define GPIO135_SM_ADQ12        PIN_CFG(135, ALT_B)
-
-#define GPIO136_GPIO            PIN_CFG(136, GPIO)
-#define GPIO136_MC2_DAT5        PIN_CFG_INPUT(136, ALT_A, PULLUP)
-#define GPIO136_SM_ADQ13        PIN_CFG(136, ALT_B)
-
-#define GPIO137_GPIO            PIN_CFG(137, GPIO)
-#define GPIO137_MC2_DAT6        PIN_CFG_INPUT(137, ALT_A, PULLUP)
-#define GPIO137_SM_ADQ14        PIN_CFG(137, ALT_B)
-
-#define GPIO138_GPIO            PIN_CFG(138, GPIO)
-#define GPIO138_MC2_DAT7        PIN_CFG_INPUT(138, ALT_A, PULLUP)
-#define GPIO138_SM_ADQ15        PIN_CFG(138, ALT_B)
-
-#define GPIO139_GPIO            PIN_CFG(139, GPIO)
-#define GPIO139_SSP1_RXD        PIN_CFG(139, ALT_A)
-#define GPIO139_SM_WAIT1n       PIN_CFG(139, ALT_B)
-#define GPIO139_KP_O8           PIN_CFG(139, ALT_C)
-
-#define GPIO140_GPIO            PIN_CFG(140, GPIO)
-#define GPIO140_SSP1_TXD        PIN_CFG(140, ALT_A)
-#define GPIO140_IP_GPIO7        PIN_CFG(140, ALT_B)
-#define GPIO140_KP_SKA1         PIN_CFG(140, ALT_C)
-
-#define GPIO141_GPIO            PIN_CFG(141, GPIO)
-#define GPIO141_SSP1_CLK        PIN_CFG(141, ALT_A)
-#define GPIO141_IP_GPIO2        PIN_CFG(141, ALT_B)
-#define GPIO141_KP_O9           PIN_CFG(141, ALT_C)
-
-#define GPIO142_GPIO            PIN_CFG(142, GPIO)
-#define GPIO142_SSP1_FRM        PIN_CFG(142, ALT_A)
-#define GPIO142_IP_GPIO3        PIN_CFG(142, ALT_B)
-#define GPIO142_KP_SKB1         PIN_CFG(142, ALT_C)
-
-#define GPIO143_GPIO            PIN_CFG(143, GPIO)
-#define GPIO143_SSP0_CLK        PIN_CFG(143, ALT_A)
-
-#define GPIO144_GPIO            PIN_CFG(144, GPIO)
-#define GPIO144_SSP0_FRM        PIN_CFG(144, ALT_A)
-
-#define GPIO145_GPIO            PIN_CFG(145, GPIO)
-#define GPIO145_SSP0_RXD        PIN_CFG(145, ALT_A)
-
-#define GPIO146_GPIO            PIN_CFG(146, GPIO)
-#define GPIO146_SSP0_TXD        PIN_CFG(146, ALT_A)
-
-#define GPIO147_GPIO            PIN_CFG(147, GPIO)
-#define GPIO147_I2C0_SCL        PIN_CFG(147, ALT_A)
-
-#define GPIO148_GPIO            PIN_CFG(148, GPIO)
-#define GPIO148_I2C0_SDA        PIN_CFG(148, ALT_A)
-
-#define GPIO149_GPIO            PIN_CFG(149, GPIO)
-#define GPIO149_IP_GPIO0        PIN_CFG(149, ALT_A)
-#define GPIO149_SM_CS1n         PIN_CFG(149, ALT_B)
-#define GPIO149_SM_PS1n         PIN_CFG(149, ALT_C)
-
-#define GPIO150_GPIO            PIN_CFG(150, GPIO)
-#define GPIO150_IP_GPIO1        PIN_CFG(150, ALT_A)
-#define GPIO150_LCDA_CLK        PIN_CFG(150, ALT_B)
-
-#define GPIO151_GPIO            PIN_CFG(151, GPIO)
-#define GPIO151_KP_SKA0         PIN_CFG(151, ALT_A)
-#define GPIO151_LCD_VSI0        PIN_CFG(151, ALT_B)
-#define GPIO151_KP_O8           PIN_CFG(151, ALT_C)
-
-#define GPIO152_GPIO            PIN_CFG(152, GPIO)
-#define GPIO152_KP_SKB0         PIN_CFG(152, ALT_A)
-#define GPIO152_LCD_VSI1        PIN_CFG(152, ALT_B)
-#define GPIO152_KP_O9           PIN_CFG(152, ALT_C)
-
-#define GPIO153_GPIO            PIN_CFG(153, GPIO)
-#define GPIO153_KP_I7           PIN_CFG(153, ALT_A)
-#define GPIO153_LCD_D24         PIN_CFG(153, ALT_B)
-#define GPIO153_U2_RXD          PIN_CFG(153, ALT_C)
-
-#define GPIO154_GPIO            PIN_CFG(154, GPIO)
-#define GPIO154_KP_I6           PIN_CFG(154, ALT_A)
-#define GPIO154_LCD_D25         PIN_CFG(154, ALT_B)
-#define GPIO154_U2_TXD          PIN_CFG(154, ALT_C)
-
-#define GPIO155_GPIO            PIN_CFG(155, GPIO)
-#define GPIO155_KP_I5           PIN_CFG(155, ALT_A)
-#define GPIO155_LCD_D26         PIN_CFG(155, ALT_B)
-#define GPIO155_STMAPE_CLK      PIN_CFG(155, ALT_C)
-
-#define GPIO156_GPIO            PIN_CFG(156, GPIO)
-#define GPIO156_KP_I4           PIN_CFG(156, ALT_A)
-#define GPIO156_LCD_D27         PIN_CFG(156, ALT_B)
-#define GPIO156_STMAPE_DAT3     PIN_CFG(156, ALT_C)
-
-#define GPIO157_GPIO            PIN_CFG(157, GPIO)
-#define GPIO157_KP_O7           PIN_CFG(157, ALT_A)
-#define GPIO157_LCD_D28         PIN_CFG(157, ALT_B)
-#define GPIO157_STMAPE_DAT2     PIN_CFG(157, ALT_C)
-
-#define GPIO158_GPIO            PIN_CFG(158, GPIO)
-#define GPIO158_KP_O6           PIN_CFG(158, ALT_A)
-#define GPIO158_LCD_D29         PIN_CFG(158, ALT_B)
-#define GPIO158_STMAPE_DAT1     PIN_CFG(158, ALT_C)
-
-#define GPIO159_GPIO            PIN_CFG(159, GPIO)
-#define GPIO159_KP_O5           PIN_CFG(159, ALT_A)
-#define GPIO159_LCD_D30         PIN_CFG(159, ALT_B)
-#define GPIO159_STMAPE_DAT0     PIN_CFG(159, ALT_C)
-
-#define GPIO160_GPIO            PIN_CFG(160, GPIO)
-#define GPIO160_KP_O4           PIN_CFG(160, ALT_A)
-#define GPIO160_LCD_D31         PIN_CFG(160, ALT_B)
-#define GPIO160_NONE            PIN_CFG(160, ALT_C)
-
-#define GPIO161_GPIO            PIN_CFG(161, GPIO)
-#define GPIO161_KP_I3           PIN_CFG(161, ALT_A)
-#define GPIO161_LCD_D32         PIN_CFG(161, ALT_B)
-#define GPIO161_UARTMOD_RXD     PIN_CFG(161, ALT_C)
-
-#define GPIO162_GPIO            PIN_CFG(162, GPIO)
-#define GPIO162_KP_I2           PIN_CFG(162, ALT_A)
-#define GPIO162_LCD_D33         PIN_CFG(162, ALT_B)
-#define GPIO162_UARTMOD_TXD     PIN_CFG(162, ALT_C)
-
-#define GPIO163_GPIO            PIN_CFG(163, GPIO)
-#define GPIO163_KP_I1           PIN_CFG(163, ALT_A)
-#define GPIO163_LCD_D34         PIN_CFG(163, ALT_B)
-#define GPIO163_STMMOD_CLK      PIN_CFG(163, ALT_C)
-
-#define GPIO164_GPIO            PIN_CFG(164, GPIO)
-#define GPIO164_KP_I0           PIN_CFG(164, ALT_A)
-#define GPIO164_LCD_D35         PIN_CFG(164, ALT_B)
-#define GPIO164_STMMOD_DAT3     PIN_CFG(164, ALT_C)
-
-#define GPIO165_GPIO            PIN_CFG(165, GPIO)
-#define GPIO165_KP_O3           PIN_CFG(165, ALT_A)
-#define GPIO165_LCD_D36         PIN_CFG(165, ALT_B)
-#define GPIO165_STMMOD_DAT2     PIN_CFG(165, ALT_C)
-
-#define GPIO166_GPIO            PIN_CFG(166, GPIO)
-#define GPIO166_KP_O2           PIN_CFG(166, ALT_A)
-#define GPIO166_LCD_D37         PIN_CFG(166, ALT_B)
-#define GPIO166_STMMOD_DAT1     PIN_CFG(166, ALT_C)
-
-#define GPIO167_GPIO            PIN_CFG(167, GPIO)
-#define GPIO167_KP_O1           PIN_CFG(167, ALT_A)
-#define GPIO167_LCD_D38         PIN_CFG(167, ALT_B)
-#define GPIO167_STMMOD_DAT0     PIN_CFG(167, ALT_C)
-
-#define GPIO168_GPIO            PIN_CFG(168, GPIO)
-#define GPIO168_KP_O0           PIN_CFG(168, ALT_A)
-#define GPIO168_LCD_D39         PIN_CFG(168, ALT_B)
-#define GPIO168_NONE            PIN_CFG(168, ALT_C)
-
-#define GPIO169_GPIO            PIN_CFG(169, GPIO)
-#define GPIO169_RF_PURn         PIN_CFG(169, ALT_A)
-#define GPIO169_LCDA_DE         PIN_CFG(169, ALT_B)
-#define GPIO169_USBSIM_PDC      PIN_CFG(169, ALT_C)
-
-#define GPIO170_GPIO            PIN_CFG(170, GPIO)
-#define GPIO170_MODEM_STATE     PIN_CFG(170, ALT_A)
-#define GPIO170_LCDA_VSO        PIN_CFG(170, ALT_B)
-#define GPIO170_KP_SKA1         PIN_CFG(170, ALT_C)
-
-#define GPIO171_GPIO            PIN_CFG(171, GPIO)
-#define GPIO171_MODEM_PWREN     PIN_CFG(171, ALT_A)
-#define GPIO171_LCDA_HSO        PIN_CFG(171, ALT_B)
-#define GPIO171_KP_SKB1         PIN_CFG(171, ALT_C)
-
-#define GPIO192_GPIO            PIN_CFG(192, GPIO)
-#define GPIO192_MSP2_SCK        PIN_CFG(192, ALT_A)
-
-#define GPIO193_GPIO            PIN_CFG(193, GPIO)
-#define GPIO193_MSP2_TXD        PIN_CFG(193, ALT_A)
-
-#define GPIO194_GPIO            PIN_CFG(194, GPIO)
-#define GPIO194_MSP2_TCK        PIN_CFG(194, ALT_A)
-
-#define GPIO195_GPIO            PIN_CFG(195, GPIO)
-#define GPIO195_MSP2_TFS        PIN_CFG(195, ALT_A)
-
-#define GPIO196_GPIO            PIN_CFG(196, GPIO)
-#define GPIO196_MSP2_RXD        PIN_CFG(196, ALT_A)
-
-#define GPIO197_GPIO            PIN_CFG(197, GPIO)
-#define GPIO197_MC4_DAT3        PIN_CFG_INPUT(197, ALT_A, PULLUP)
-
-#define GPIO198_GPIO            PIN_CFG(198, GPIO)
-#define GPIO198_MC4_DAT2        PIN_CFG_INPUT(198, ALT_A, PULLUP)
-
-#define GPIO199_GPIO            PIN_CFG(199, GPIO)
-#define GPIO199_MC4_DAT1        PIN_CFG_INPUT(199, ALT_A, PULLUP)
-
-#define GPIO200_GPIO            PIN_CFG(200, GPIO)
-#define GPIO200_MC4_DAT0        PIN_CFG_INPUT(200, ALT_A, PULLUP)
-
-#define GPIO201_GPIO            PIN_CFG(201, GPIO)
-#define GPIO201_MC4_CMD         PIN_CFG_INPUT(201, ALT_A, PULLUP)
-
-#define GPIO202_GPIO            PIN_CFG(202, GPIO)
-#define GPIO202_MC4_FBCLK       PIN_CFG_INPUT(202, ALT_A, PULLUP)
-#define GPIO202_PWL             PIN_CFG(202, ALT_B)
-#define GPIO202_MC4_RSTN        PIN_CFG(202, ALT_C)
-
-#define GPIO203_GPIO            PIN_CFG(203, GPIO)
-#define GPIO203_MC4_CLK         PIN_CFG_INPUT(203, ALT_A, PULLUP)
-
-#define GPIO204_GPIO            PIN_CFG(204, GPIO)
-#define GPIO204_MC4_DAT7        PIN_CFG_INPUT(204, ALT_A, PULLUP)
-
-#define GPIO205_GPIO            PIN_CFG(205, GPIO)
-#define GPIO205_MC4_DAT6        PIN_CFG_INPUT(205, ALT_A, PULLUP)
-
-#define GPIO206_GPIO            PIN_CFG(206, GPIO)
-#define GPIO206_MC4_DAT5        PIN_CFG_INPUT(206, ALT_A, PULLUP)
-
-#define GPIO207_GPIO            PIN_CFG(207, GPIO)
-#define GPIO207_MC4_DAT4        PIN_CFG_INPUT(207, ALT_A, PULLUP)
-
-#define GPIO208_GPIO            PIN_CFG(208, GPIO)
-#define GPIO208_MC1_CLK         PIN_CFG(208, ALT_A)
-
-#define GPIO209_GPIO            PIN_CFG(209, GPIO)
-#define GPIO209_MC1_FBCLK       PIN_CFG(209, ALT_A)
-#define GPIO209_SPI1_CLK        PIN_CFG(209, ALT_B)
-
-#define GPIO210_GPIO            PIN_CFG(210, GPIO)
-#define GPIO210_MC1_CMD         PIN_CFG(210, ALT_A)
-
-#define GPIO211_GPIO            PIN_CFG(211, GPIO)
-#define GPIO211_MC1_DAT0        PIN_CFG(211, ALT_A)
-
-#define GPIO212_GPIO            PIN_CFG(212, GPIO)
-#define GPIO212_MC1_DAT1        PIN_CFG(212, ALT_A)
-#define GPIO212_SPI1_FRM        PIN_CFG(212, ALT_B)
-
-#define GPIO213_GPIO            PIN_CFG(213, GPIO)
-#define GPIO213_MC1_DAT2        PIN_CFG(213, ALT_A)
-#define GPIO213_SPI1_TXD        PIN_CFG(213, ALT_B)
-
-#define GPIO214_GPIO            PIN_CFG(214, GPIO)
-#define GPIO214_MC1_DAT3        PIN_CFG(214, ALT_A)
-#define GPIO214_SPI1_RXD        PIN_CFG(214, ALT_B)
-
-#define GPIO215_GPIO            PIN_CFG(215, GPIO)
-#define GPIO215_MC1_CMDDIR      PIN_CFG(215, ALT_A)
-#define GPIO215_MC3_DAT2DIR     PIN_CFG(215, ALT_B)
-#define GPIO215_CLKOUT1         PIN_CFG(215, ALT_C)
-#define GPIO215_SPI2_TXD        PIN_CFG(215, ALT_C)
-
-#define GPIO216_GPIO            PIN_CFG(216, GPIO)
-#define GPIO216_MC1_DAT2DIR     PIN_CFG(216, ALT_A)
-#define GPIO216_MC3_CMDDIR      PIN_CFG(216, ALT_B)
-#define GPIO216_I2C3_SDA        PIN_CFG(216, ALT_C)
-#define GPIO216_SPI2_FRM        PIN_CFG(216, ALT_C)
-
-#define GPIO217_GPIO            PIN_CFG(217, GPIO)
-#define GPIO217_MC1_DAT0DIR     PIN_CFG(217, ALT_A)
-#define GPIO217_MC3_DAT31DIR    PIN_CFG(217, ALT_B)
-#define GPIO217_CLKOUT2         PIN_CFG(217, ALT_C)
-#define GPIO217_SPI2_CLK        PIN_CFG(217, ALT_C)
-
-#define GPIO218_GPIO            PIN_CFG(218, GPIO)
-#define GPIO218_MC1_DAT31DIR    PIN_CFG(218, ALT_A)
-#define GPIO218_MC3_DAT0DIR     PIN_CFG(218, ALT_B)
-#define GPIO218_I2C3_SCL        PIN_CFG(218, ALT_C)
-#define GPIO218_SPI2_RXD        PIN_CFG(218, ALT_C)
-
-#define GPIO219_GPIO            PIN_CFG(219, GPIO)
-#define GPIO219_HSIR_FLA0       PIN_CFG(219, ALT_A)
-#define GPIO219_MC3_CLK         PIN_CFG(219, ALT_B)
-
-#define GPIO220_GPIO            PIN_CFG(220, GPIO)
-#define GPIO220_HSIR_DAT0       PIN_CFG(220, ALT_A)
-#define GPIO220_MC3_FBCLK       PIN_CFG(220, ALT_B)
-#define GPIO220_SPI0_CLK        PIN_CFG(220, ALT_C)
-
-#define GPIO221_GPIO            PIN_CFG(221, GPIO)
-#define GPIO221_HSIR_RDY0       PIN_CFG(221, ALT_A)
-#define GPIO221_MC3_CMD         PIN_CFG(221, ALT_B)
-
-#define GPIO222_GPIO            PIN_CFG(222, GPIO)
-#define GPIO222_HSIT_FLA0       PIN_CFG(222, ALT_A)
-#define GPIO222_MC3_DAT0        PIN_CFG(222, ALT_B)
-
-#define GPIO223_GPIO            PIN_CFG(223, GPIO)
-#define GPIO223_HSIT_DAT0       PIN_CFG(223, ALT_A)
-#define GPIO223_MC3_DAT1        PIN_CFG(223, ALT_B)
-#define GPIO223_SPI0_FRM        PIN_CFG(223, ALT_C)
-
-#define GPIO224_GPIO            PIN_CFG(224, GPIO)
-#define GPIO224_HSIT_RDY0       PIN_CFG(224, ALT_A)
-#define GPIO224_MC3_DAT2        PIN_CFG(224, ALT_B)
-#define GPIO224_SPI0_TXD        PIN_CFG(224, ALT_C)
-
-#define GPIO225_GPIO            PIN_CFG(225, GPIO)
-#define GPIO225_HSIT_CAWAKE0    PIN_CFG(225, ALT_A)
-#define GPIO225_MC3_DAT3        PIN_CFG(225, ALT_B)
-#define GPIO225_SPI0_RXD        PIN_CFG(225, ALT_C)
-
-#define GPIO226_GPIO            PIN_CFG(226, GPIO)
-#define GPIO226_HSIT_ACWAKE0    PIN_CFG(226, ALT_A)
-#define GPIO226_PWL             PIN_CFG(226, ALT_B)
-#define GPIO226_USBSIM_PDC      PIN_CFG(226, ALT_C)
-
-#define GPIO227_GPIO            PIN_CFG(227, GPIO)
-#define GPIO227_CLKOUT1         PIN_CFG(227, ALT_A)
-
-#define GPIO228_GPIO            PIN_CFG(228, GPIO)
-#define GPIO228_CLKOUT2         PIN_CFG(228, ALT_A)
-
-#define GPIO229_GPIO            PIN_CFG(229, GPIO)
-#define GPIO229_CLKOUT1         PIN_CFG(229, ALT_A)
-#define GPIO229_PWL             PIN_CFG(229, ALT_B)
-#define GPIO229_I2C3_SDA        PIN_CFG(229, ALT_C)
-
-#define GPIO230_GPIO            PIN_CFG(230, GPIO)
-#define GPIO230_CLKOUT2         PIN_CFG(230, ALT_A)
-#define GPIO230_PWL             PIN_CFG(230, ALT_B)
-#define GPIO230_I2C3_SCL        PIN_CFG(230, ALT_C)
-
-#define GPIO256_GPIO            PIN_CFG(256, GPIO)
-#define GPIO256_USB_NXT         PIN_CFG(256, ALT_A)
-
-#define GPIO257_GPIO            PIN_CFG(257, GPIO)
-#define GPIO257_USB_STP         PIN_CFG(257, ALT_A)
-
-#define GPIO258_GPIO            PIN_CFG(258, GPIO)
-#define GPIO258_USB_XCLK        PIN_CFG(258, ALT_A)
-#define GPIO258_NONE            PIN_CFG(258, ALT_B)
-#define GPIO258_DDR_TRIG        PIN_CFG(258, ALT_C)
-
-#define GPIO259_GPIO            PIN_CFG(259, GPIO)
-#define GPIO259_USB_DIR         PIN_CFG(259, ALT_A)
-
-#define GPIO260_GPIO            PIN_CFG(260, GPIO)
-#define GPIO260_USB_DAT7        PIN_CFG(260, ALT_A)
-
-#define GPIO261_GPIO            PIN_CFG(261, GPIO)
-#define GPIO261_USB_DAT6        PIN_CFG(261, ALT_A)
-
-#define GPIO262_GPIO            PIN_CFG(262, GPIO)
-#define GPIO262_USB_DAT5        PIN_CFG(262, ALT_A)
-
-#define GPIO263_GPIO            PIN_CFG(263, GPIO)
-#define GPIO263_USB_DAT4        PIN_CFG(263, ALT_A)
-
-#define GPIO264_GPIO            PIN_CFG(264, GPIO)
-#define GPIO264_USB_DAT3        PIN_CFG(264, ALT_A)
-
-#define GPIO265_GPIO            PIN_CFG(265, GPIO)
-#define GPIO265_USB_DAT2        PIN_CFG(265, ALT_A)
-
-#define GPIO266_GPIO            PIN_CFG(266, GPIO)
-#define GPIO266_USB_DAT1        PIN_CFG(266, ALT_A)
-
-#define GPIO267_GPIO            PIN_CFG(267, GPIO)
-#define GPIO267_USB_DAT0        PIN_CFG(267, ALT_A)
-
-#endif
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index 14d90469392f..1f296e796a4f 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -54,7 +54,7 @@ static void __iomem *scu_base_addr(void)
 
 static DEFINE_SPINLOCK(boot_lock);
 
-static void __cpuinit ux500_secondary_init(unsigned int cpu)
+static void ux500_secondary_init(unsigned int cpu)
 {
         /*
          * let the primary processor know we're out of the
@@ -69,7 +69,7 @@ static void __cpuinit ux500_secondary_init(unsigned int cpu)
         spin_unlock(&boot_lock);
 }
 
-static int __cpuinit ux500_boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int ux500_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long timeout;
 
diff --git a/arch/arm/mach-ux500/setup.h b/arch/arm/mach-ux500/setup.h
index cad3ca86c540..656324aad18e 100644
--- a/arch/arm/mach-ux500/setup.h
+++ b/arch/arm/mach-ux500/setup.h
@@ -11,10 +11,13 @@
 #ifndef __ASM_ARCH_SETUP_H
 #define __ASM_ARCH_SETUP_H
 
+#include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <linux/init.h>
 #include <linux/mfd/abx500/ab8500.h>
 
+void ux500_restart(enum reboot_mode mode, const char *cmd);
+
 void __init ux500_map_io(void);
 extern void __init u8500_map_io(void);
 
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index 5b799c29886e..5f252569c689 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -91,7 +91,7 @@ static void __init zynq_map_io(void)
         zynq_scu_map_io();
 }
 
-static void zynq_system_reset(char mode, const char *cmd)
+static void zynq_system_reset(enum reboot_mode mode, const char *cmd)
 {
         zynq_slcr_system_reset();
 }
diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h
index fbbd0e21c404..3040d219570f 100644
--- a/arch/arm/mach-zynq/common.h
+++ b/arch/arm/mach-zynq/common.h
@@ -27,7 +27,7 @@ extern void secondary_startup(void);
 extern char zynq_secondary_trampoline;
 extern char zynq_secondary_trampoline_jump;
 extern char zynq_secondary_trampoline_end;
-extern int __cpuinit zynq_cpun_start(u32 address, int cpu);
+extern int zynq_cpun_start(u32 address, int cpu);
 extern struct smp_operations zynq_smp_ops __initdata;
 #endif
 
diff --git a/arch/arm/mach-zynq/headsmp.S b/arch/arm/mach-zynq/headsmp.S
index d183cd234a9b..d4cd5f34fe5c 100644
--- a/arch/arm/mach-zynq/headsmp.S
+++ b/arch/arm/mach-zynq/headsmp.S
@@ -9,8 +9,6 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 
-        __CPUINIT
-
 ENTRY(zynq_secondary_trampoline)
         ldr     r0, [pc]
         bx      r0
diff --git a/arch/arm/mach-zynq/platsmp.c b/arch/arm/mach-zynq/platsmp.c
index 023f225493f2..689fbbc3d9c8 100644
--- a/arch/arm/mach-zynq/platsmp.c
+++ b/arch/arm/mach-zynq/platsmp.c
@@ -30,11 +30,11 @@
 /*
  * Store number of cores in the system
  * Because of scu_get_core_count() must be in __init section and can't
- * be called from zynq_cpun_start() because it is in __cpuinit section.
+ * be called from zynq_cpun_start() because it is not in __init section.
  */
 static int ncores;
 
-int __cpuinit zynq_cpun_start(u32 address, int cpu)
+int zynq_cpun_start(u32 address, int cpu)
 {
         u32 trampoline_code_size = &zynq_secondary_trampoline_end -
                                                 &zynq_secondary_trampoline;
@@ -92,7 +92,7 @@ int __cpuinit zynq_cpun_start(u32 address, int cpu)
 }
 EXPORT_SYMBOL(zynq_cpun_start);
 
-static int __cpuinit zynq_boot_secondary(unsigned int cpu,
+static int zynq_boot_secondary(unsigned int cpu,
                                                 struct task_struct *idle)
 {
         return zynq_cpun_start(virt_to_phys(secondary_startup), cpu);
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 6cacdc8dd654..cd2c88e7a8f7 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -421,24 +421,28 @@ config CPU_32v3
         select CPU_USE_DOMAINS if MMU
         select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
         select TLS_REG_EMUL if SMP || !MMU
+        select NEED_KUSER_HELPERS
 
 config CPU_32v4
         bool
         select CPU_USE_DOMAINS if MMU
         select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
         select TLS_REG_EMUL if SMP || !MMU
+        select NEED_KUSER_HELPERS
 
 config CPU_32v4T
         bool
         select CPU_USE_DOMAINS if MMU
         select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
         select TLS_REG_EMUL if SMP || !MMU
+        select NEED_KUSER_HELPERS
 
 config CPU_32v5
         bool
         select CPU_USE_DOMAINS if MMU
         select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
         select TLS_REG_EMUL if SMP || !MMU
+        select NEED_KUSER_HELPERS
 
 config CPU_32v6
         bool
@@ -776,6 +780,7 @@ config CPU_BPREDICT_DISABLE
 
 config TLS_REG_EMUL
         bool
+        select NEED_KUSER_HELPERS
         help
           An SMP system using a pre-ARMv6 processor (there are apparently
           a few prototypes like that in existence) and therefore access to
@@ -783,11 +788,43 @@ config TLS_REG_EMUL
 
 config NEEDS_SYSCALL_FOR_CMPXCHG
         bool
+        select NEED_KUSER_HELPERS
         help
           SMP on a pre-ARMv6 processor?  Well OK then.
           Forget about fast user space cmpxchg support.
           It is just not possible.
 
+config NEED_KUSER_HELPERS
+        bool
+
+config KUSER_HELPERS
+        bool "Enable kuser helpers in vector page" if !NEED_KUSER_HELPERS
+        default y
+        help
+          Warning: disabling this option may break user programs.
+
+          Provide kuser helpers in the vector page.  The kernel provides
+          helper code to userspace in read only form at a fixed location
+          in the high vector page to allow userspace to be independent of
+          the CPU type fitted to the system.  This permits binaries to be
+          run on ARMv4 through to ARMv7 without modification.
+
+          See Documentation/arm/kernel_user_helpers.txt for details.
+
+          However, the fixed address nature of these helpers can be used
+          by ROP (return orientated programming) authors when creating
+          exploits.
+
+          If all of the binaries and libraries which run on your platform
+          are built specifically for your platform, and make no use of
+          these helpers, then you can turn this option off to hinder
+          such exploits. However, in that case, if a binary or library
+          relying on those helpers is run, it will receive a SIGILL signal,
+          which will terminate the program.
+
+          Say N here only if you are absolutely certain that you do not
+          need these helpers; otherwise, the safe option is to say Y.
+
 config DMA_CACHE_RWFO
         bool "Enable read/write for ownership DMA cache maintenance"
         depends on CPU_V6K && SMP
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index b55b1015724b..4a0544492f10 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -245,7 +245,8 @@ void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk)
         if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending)) {
                 local_flush_bp_all();
                 local_flush_tlb_all();
-                dummy_flush_tlb_a15_erratum();
+                if (erratum_a15_798181())
+                        dummy_flush_tlb_a15_erratum();
         }
 
         atomic64_set(&per_cpu(active_asids, cpu), asid);
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 4f56617a2392..53cdbd39ec8e 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -989,6 +989,7 @@ phys_addr_t arm_lowmem_limit __initdata = 0;
 
 void __init sanity_check_meminfo(void)
 {
+        phys_addr_t memblock_limit = 0;
         int i, j, highmem = 0;
         phys_addr_t vmalloc_limit = __pa(vmalloc_min - 1) + 1;
 
@@ -1052,9 +1053,32 @@ void __init sanity_check_meminfo(void)
                         bank->size = size_limit;
                 }
 #endif
-                if (!bank->highmem && bank->start + bank->size > arm_lowmem_limit)
-                        arm_lowmem_limit = bank->start + bank->size;
+                if (!bank->highmem) {
+                        phys_addr_t bank_end = bank->start + bank->size;
 
+                        if (bank_end > arm_lowmem_limit)
+                                arm_lowmem_limit = bank_end;
+
+                        /*
+                         * Find the first non-section-aligned page, and point
+                         * memblock_limit at it. This relies on rounding the
+                         * limit down to be section-aligned, which happens at
+                         * the end of this function.
+                         *
+                         * With this algorithm, the start or end of almost any
+                         * bank can be non-section-aligned. The only exception
+                         * is that the start of the bank 0 must be section-
+                         * aligned, since otherwise memory would need to be
+                         * allocated when mapping the start of bank 0, which
+                         * occurs before any free memory is mapped.
+                         */
+                        if (!memblock_limit) {
+                                if (!IS_ALIGNED(bank->start, SECTION_SIZE))
+                                        memblock_limit = bank->start;
+                                else if (!IS_ALIGNED(bank_end, SECTION_SIZE))
+                                        memblock_limit = bank_end;
+                        }
+                }
                 j++;
         }
 #ifdef CONFIG_HIGHMEM
@@ -1079,7 +1103,18 @@ void __init sanity_check_meminfo(void)
 #endif
         meminfo.nr_banks = j;
         high_memory = __va(arm_lowmem_limit - 1) + 1;
-        memblock_set_current_limit(arm_lowmem_limit);
+
+        /*
+         * Round the memblock limit down to a section size.  This
+         * helps to ensure that we will allocate memory from the
+         * last full section, which should be mapped.
+         */
+        if (memblock_limit)
+                memblock_limit = round_down(memblock_limit, SECTION_SIZE);
+        if (!memblock_limit)
+                memblock_limit = arm_lowmem_limit;
+
+        memblock_set_current_limit(memblock_limit);
 }
 
 static inline void prepare_page_table(void)
@@ -1160,7 +1195,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
         /*
          * Allocate the vector page early.
          */
-        vectors = early_alloc(PAGE_SIZE);
+        vectors = early_alloc(PAGE_SIZE * 2);
 
         early_trap_init(vectors);
 
@@ -1205,15 +1240,27 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
         map.pfn = __phys_to_pfn(virt_to_phys(vectors));
         map.virtual = 0xffff0000;
         map.length = PAGE_SIZE;
+#ifdef CONFIG_KUSER_HELPERS
         map.type = MT_HIGH_VECTORS;
+#else
+        map.type = MT_LOW_VECTORS;
+#endif
         create_mapping(&map);
 
         if (!vectors_high()) {
                 map.virtual = 0;
+                map.length = PAGE_SIZE * 2;
                 map.type = MT_LOW_VECTORS;
                 create_mapping(&map);
         }
 
+        /* Now create a kernel read-only mapping */
+        map.pfn += 1;
+        map.virtual = 0xffff0000 + PAGE_SIZE;
+        map.length = PAGE_SIZE;
+        map.type = MT_LOW_VECTORS;
+        create_mapping(&map);
+
         /*
          * Ask the machine support to map in the statically mapped devices.
          */
@@ -1276,8 +1323,6 @@ void __init paging_init(struct machine_desc *mdesc)
 {
         void *zero_page;
 
-        memblock_set_current_limit(arm_lowmem_limit);
-
         build_mem_type_table();
         prepare_page_table();
         map_lowmem();
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S
index 2bb61e703d6c..d1a2d05971e0 100644
--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -443,8 +443,6 @@ ENTRY(cpu_arm1020_set_pte_ext)
 #endif /* CONFIG_MMU */
         mov     pc, lr
 
-        __CPUINIT
-
         .type   __arm1020_setup, #function
 __arm1020_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index 8f96aa40f510..9d89405c3d03 100644
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -425,8 +425,6 @@ ENTRY(cpu_arm1020e_set_pte_ext)
 #endif /* CONFIG_MMU */
         mov     pc, lr
 
-        __CPUINIT
-
         .type   __arm1020e_setup, #function
 __arm1020e_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index 8ebe4a469a22..6f01a0ae3b30 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -407,8 +407,6 @@ ENTRY(cpu_arm1022_set_pte_ext)
 #endif /* CONFIG_MMU */
         mov     pc, lr
 
-        __CPUINIT
-
         .type   __arm1022_setup, #function
 __arm1022_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 093fc7e520c3..4799a24b43e6 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -396,9 +396,6 @@ ENTRY(cpu_arm1026_set_pte_ext)
 #endif /* CONFIG_MMU */
         mov     pc, lr
 
-
-        __CPUINIT
-
         .type   __arm1026_setup, #function
 __arm1026_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S
index 0ac908c7ade1..d42c37f9f5bc 100644
--- a/arch/arm/mm/proc-arm720.S
+++ b/arch/arm/mm/proc-arm720.S
@@ -116,8 +116,6 @@ ENTRY(cpu_arm720_reset)
 ENDPROC(cpu_arm720_reset)
                 .popsection
 
-        __CPUINIT
-
         .type   __arm710_setup, #function
 __arm710_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S
index fde2d2a794cf..9b0ae90cbf17 100644
--- a/arch/arm/mm/proc-arm740.S
+++ b/arch/arm/mm/proc-arm740.S
@@ -60,8 +60,6 @@ ENTRY(cpu_arm740_reset)
 ENDPROC(cpu_arm740_reset)
         .popsection
 
-        __CPUINIT
-
         .type   __arm740_setup, #function
 __arm740_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm7tdmi.S b/arch/arm/mm/proc-arm7tdmi.S
index 6ddea3e464bd..f6cc3f63ce39 100644
--- a/arch/arm/mm/proc-arm7tdmi.S
+++ b/arch/arm/mm/proc-arm7tdmi.S
@@ -51,8 +51,6 @@ ENTRY(cpu_arm7tdmi_reset)
 ENDPROC(cpu_arm7tdmi_reset)
                 .popsection
 
-                __CPUINIT
-
                 .type   __arm7tdmi_setup, #function
 __arm7tdmi_setup:
                 mov     pc, lr
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 2556cf1c2da1..549557df6d57 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -410,8 +410,6 @@ ENTRY(cpu_arm920_do_resume)
 ENDPROC(cpu_arm920_do_resume)
 #endif
 
-        __CPUINIT
-
         .type   __arm920_setup, #function
 __arm920_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index 4464c49d7449..2a758b06c6f6 100644
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -388,8 +388,6 @@ ENTRY(cpu_arm922_set_pte_ext)
 #endif /* CONFIG_MMU */
         mov     pc, lr
 
-        __CPUINIT
-
         .type   __arm922_setup, #function
 __arm922_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 281eb9b9c1d6..97448c3acf38 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -438,8 +438,6 @@ ENTRY(cpu_arm925_set_pte_ext)
 #endif /* CONFIG_MMU */
         mov     pc, lr
 
-        __CPUINIT
-
         .type   __arm925_setup, #function
 __arm925_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 344c8a548cc0..0f098f407c9f 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -425,8 +425,6 @@ ENTRY(cpu_arm926_do_resume)
 ENDPROC(cpu_arm926_do_resume)
 #endif
 
-        __CPUINIT
-
         .type   __arm926_setup, #function
 __arm926_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S
index 8da189d4a402..1c39a704ff6e 100644
--- a/arch/arm/mm/proc-arm940.S
+++ b/arch/arm/mm/proc-arm940.S
@@ -273,8 +273,6 @@ ENDPROC(arm940_dma_unmap_area)
         @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
         define_cache_functions arm940
 
-        __CPUINIT
-
         .type   __arm940_setup, #function
 __arm940_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S
index f666cf34075a..0289cd905e73 100644
--- a/arch/arm/mm/proc-arm946.S
+++ b/arch/arm/mm/proc-arm946.S
@@ -326,8 +326,6 @@ ENTRY(cpu_arm946_dcache_clean_area)
         mcr     p15, 0, r0, c7, c10, 4          @ drain WB
         mov     pc, lr
 
-        __CPUINIT
-
         .type   __arm946_setup, #function
 __arm946_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-arm9tdmi.S b/arch/arm/mm/proc-arm9tdmi.S
index 8881391dfb9e..f51197ba754a 100644
--- a/arch/arm/mm/proc-arm9tdmi.S
+++ b/arch/arm/mm/proc-arm9tdmi.S
@@ -51,8 +51,6 @@ ENTRY(cpu_arm9tdmi_reset)
 ENDPROC(cpu_arm9tdmi_reset)
                 .popsection
 
-                __CPUINIT
-
                 .type   __arm9tdmi_setup, #function
 __arm9tdmi_setup:
                 mov     pc, lr
diff --git a/arch/arm/mm/proc-fa526.S b/arch/arm/mm/proc-fa526.S
index aaeb6c127c7a..2dfc0f1d3bfd 100644
--- a/arch/arm/mm/proc-fa526.S
+++ b/arch/arm/mm/proc-fa526.S
@@ -135,8 +135,6 @@ ENTRY(cpu_fa526_set_pte_ext)
 #endif
         mov     pc, lr
 
-        __CPUINIT
-
         .type   __fa526_setup, #function
 __fa526_setup:
         /* On return of this routine, r0 must carry correct flags for CFG register */
diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S
index 4106b09e0c29..d5146b98c8d1 100644
--- a/arch/arm/mm/proc-feroceon.S
+++ b/arch/arm/mm/proc-feroceon.S
@@ -514,8 +514,6 @@ ENTRY(cpu_feroceon_set_pte_ext)
 #endif
         mov     pc, lr
 
-        __CPUINIT
-
         .type   __feroceon_setup, #function
 __feroceon_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S
index 0b60dd3d742a..40acba595731 100644
--- a/arch/arm/mm/proc-mohawk.S
+++ b/arch/arm/mm/proc-mohawk.S
@@ -383,8 +383,6 @@ ENTRY(cpu_mohawk_do_resume)
 ENDPROC(cpu_mohawk_do_resume)
 #endif
 
-        __CPUINIT
-
         .type   __mohawk_setup, #function
 __mohawk_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S
index 775d70fba937..c45319c8f1d9 100644
--- a/arch/arm/mm/proc-sa110.S
+++ b/arch/arm/mm/proc-sa110.S
@@ -159,8 +159,6 @@ ENTRY(cpu_sa110_set_pte_ext)
 #endif
         mov     pc, lr
 
-        __CPUINIT
-
         .type   __sa110_setup, #function
 __sa110_setup:
         mov     r10, #0
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index d92dfd081429..09d241ae2dbe 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -198,8 +198,6 @@ ENTRY(cpu_sa1100_do_resume)
 ENDPROC(cpu_sa1100_do_resume)
 #endif
 
-        __CPUINIT
-
         .type   __sa1100_setup, #function
 __sa1100_setup:
         mov     r0, #0
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 2d1ef87328a1..1128064fddcb 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -180,8 +180,6 @@ ENDPROC(cpu_v6_do_resume)
 
         .align
 
-        __CPUINIT
-
 /*
  *      __v6_setup
  *
diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S
index 9704097c450e..bdd3be4be77a 100644
--- a/arch/arm/mm/proc-v7-2level.S
+++ b/arch/arm/mm/proc-v7-2level.S
@@ -110,7 +110,7 @@ ENTRY(cpu_v7_set_pte_ext)
  ARM(   str     r3, [r0, #2048]! )
  THUMB( add     r0, r0, #2048 )
  THUMB( str     r3, [r0] )
-        ALT_SMP(mov     pc,lr)
+        ALT_SMP(W(nop))
         ALT_UP (mcr     p15, 0, r0, c7, c10, 1)         @ flush_pte
 #endif
         mov     pc, lr
@@ -160,8 +160,6 @@ ENDPROC(cpu_v7_set_pte_ext)
         mcr     p15, 0, \ttbr1, c2, c0, 1       @ load TTB1
         .endm
 
-        __CPUINIT
-
         /*   AT
          *  TFR   EV X F   I D LR    S
          * .EEE ..EE PUI. .T.T 4RVI ZWRS BLDP WCAM
@@ -172,5 +170,3 @@ ENDPROC(cpu_v7_set_pte_ext)
         .type   v7_crval, #object
 v7_crval:
         crval   clear=0x2120c302, mmuset=0x10c03c7d, ucset=0x00c01c7c
-
-        .previous
diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
index 5ffe1956c6d9..01a719e18bb0 100644
--- a/arch/arm/mm/proc-v7-3level.S
+++ b/arch/arm/mm/proc-v7-3level.S
@@ -81,7 +81,7 @@ ENTRY(cpu_v7_set_pte_ext)
         tst     r3, #1 << (55 - 32)             @ L_PTE_DIRTY
         orreq   r2, #L_PTE_RDONLY
 1:      strd    r2, r3, [r0]
-        ALT_SMP(mov     pc, lr)
+        ALT_SMP(W(nop))
         ALT_UP (mcr     p15, 0, r0, c7, c10, 1)         @ flush_pte
 #endif
         mov     pc, lr
@@ -140,8 +140,6 @@ ENDPROC(cpu_v7_set_pte_ext)
         mcrr    p15, 0, \ttbr0, \zero, c2                       @ load TTBR0
         .endm
 
-        __CPUINIT
-
         /*
          *   AT
          *  TFR   EV X F   IHD LR    S
@@ -153,5 +151,3 @@ ENDPROC(cpu_v7_set_pte_ext)
         .type   v7_crval, #object
 v7_crval:
         crval   clear=0x0120c302, mmuset=0x30c23c7d, ucset=0x00c01c7c
-
-        .previous
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 7ef3ad05df39..73398bcf9bd8 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -75,13 +75,14 @@ ENTRY(cpu_v7_do_idle)
 ENDPROC(cpu_v7_do_idle)
 
 ENTRY(cpu_v7_dcache_clean_area)
-        ALT_SMP(mov     pc, lr)                 @ MP extensions imply L1 PTW
-        ALT_UP(W(nop))
-        dcache_line_size r2, r3
-1:      mcr     p15, 0, r0, c7, c10, 1          @ clean D entry
+        ALT_SMP(W(nop))                 @ MP extensions imply L1 PTW
+        ALT_UP_B(1f)
+        mov     pc, lr
+1:      dcache_line_size r2, r3
+2:      mcr     p15, 0, r0, c7, c10, 1          @ clean D entry
         add     r0, r0, r2
         subs    r1, r1, r2
-        bhi     1b
+        bhi     2b
         dsb
         mov     pc, lr
 ENDPROC(cpu_v7_dcache_clean_area)
@@ -167,8 +168,6 @@ ENDPROC(cpu_pj4b_do_idle)
 
 #endif
 
-        __CPUINIT
-
 /*
  *      __v7_setup
  *
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index e8efd83b6f25..dc1645890042 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -446,8 +446,6 @@ ENTRY(cpu_xsc3_do_resume)
 ENDPROC(cpu_xsc3_do_resume)
 #endif
 
-        __CPUINIT
-
         .type   __xsc3_setup, #function
 __xsc3_setup:
         mov     r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index e766f889bfd6..d19b1cfcad91 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -558,8 +558,6 @@ ENTRY(cpu_xscale_do_resume)
 ENDPROC(cpu_xscale_do_resume)
 #endif
 
-        __CPUINIT
-
         .type   __xscale_setup, #function
 __xscale_setup:
         mcr     p15, 0, ip, c7, c7, 0           @ invalidate I, D caches & BTB
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 3dc5cbea86cc..a5b5ff6e68d2 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -29,6 +29,13 @@ config PLAT_S5P
         help
           Base platform code for Samsung's S5P series SoC.
 
+config SAMSUNG_PM
+        bool
+        depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || ARCH_S5P64X0 || S5P_PM)
+        default y
+        help
+          Base platform power management code for samsung code
+
 if PLAT_SAMSUNG
 
 # boot configurations
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 98d07d8fc7a7..199bbe304d02 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -51,7 +51,7 @@ obj-$(CONFIG_SAMSUNG_DMADEV)	+= dma-ops.o
 
 # PM support
 
-obj-$(CONFIG_PM)                += pm.o
+obj-$(CONFIG_SAMSUNG_PM)        += pm.o
 obj-$(CONFIG_SAMSUNG_PM_GPIO)   += pm-gpio.o
 obj-$(CONFIG_SAMSUNG_PM_CHECK)  += pm-check.o
 
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index a62753dc15ba..df45d6edc98d 100644
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -83,6 +83,11 @@ extern struct clk clk_ext;
 extern struct clksrc_clk clk_epllref;
 extern struct clksrc_clk clk_esysclk;
 
+/* S3C24XX UART clocks */
+extern struct clk s3c24xx_clk_uart0;
+extern struct clk s3c24xx_clk_uart1;
+extern struct clk s3c24xx_clk_uart2;
+
 /* S3C64XX specific clocks */
 extern struct clk clk_h2;
 extern struct clk clk_27m;
diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h
index 5d47ca35cabd..6bc1a8f471e3 100644
--- a/arch/arm/plat-samsung/include/plat/pm.h
+++ b/arch/arm/plat-samsung/include/plat/pm.h
@@ -19,7 +19,7 @@
 
 struct device;
 
-#ifdef CONFIG_PM
+#ifdef CONFIG_SAMSUNG_PM
 
 extern __init int s3c_pm_init(void);
 extern __init int s3c64xx_pm_init(void);
@@ -58,8 +58,6 @@ extern unsigned char pm_uart_udivslot;  /* true to save UART UDIVSLOT */
 
 /* from sleep.S */
 
-extern void s3c_cpu_resume(void);
-
 extern int s3c2410_cpu_suspend(unsigned long);
 
 /* sleep save info */
@@ -106,12 +104,14 @@ extern void s3c_pm_do_save(struct sleep_save *ptr, int count);
 extern void s3c_pm_do_restore(struct sleep_save *ptr, int count);
 extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count);
 
-#ifdef CONFIG_PM
+#ifdef CONFIG_SAMSUNG_PM
 extern int s3c_irq_wake(struct irq_data *data, unsigned int state);
 extern int s3c_irqext_wake(struct irq_data *data, unsigned int state);
+extern void s3c_cpu_resume(void);
 #else
 #define s3c_irq_wake NULL
 #define s3c_irqext_wake NULL
+#define s3c_cpu_resume NULL
 #endif
 
 /* PM debug functions */
diff --git a/arch/arm/plat-samsung/init.c b/arch/arm/plat-samsung/init.c
index 3e5c4619caa5..50a3ea0037db 100644
--- a/arch/arm/plat-samsung/init.c
+++ b/arch/arm/plat-samsung/init.c
@@ -55,12 +55,13 @@ void __init s3c_init_cpu(unsigned long idcode,
 
         printk("CPU %s (id 0x%08lx)\n", cpu->name, idcode);
 
-        if (cpu->map_io == NULL || cpu->init == NULL) {
+        if (cpu->init == NULL) {
                 printk(KERN_ERR "CPU %s support not enabled\n", cpu->name);
                 panic("Unsupported Samsung CPU");
         }
 
-        cpu->map_io();
+        if (cpu->map_io)
+                cpu->map_io();
 }
 
 /* s3c24xx_init_clocks
diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c
index ea3613642451..d0c23010b693 100644
--- a/arch/arm/plat-samsung/pm.c
+++ b/arch/arm/plat-samsung/pm.c
@@ -80,7 +80,7 @@ unsigned char pm_uart_udivslot;
 
 #ifdef CONFIG_SAMSUNG_PM_DEBUG
 
-static struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];
+static struct pm_uart_save uart_save;
 
 static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
 {
@@ -101,11 +101,7 @@ static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
 
 static void s3c_pm_save_uarts(void)
 {
-        struct pm_uart_save *save = uart_save;
-        unsigned int uart;
-
-        for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
-                s3c_pm_save_uart(uart, save);
+        s3c_pm_save_uart(CONFIG_DEBUG_S3C_UART, &uart_save);
 }
 
 static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
@@ -126,11 +122,7 @@ static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
 
 static void s3c_pm_restore_uarts(void)
 {
-        struct pm_uart_save *save = uart_save;
-        unsigned int uart;
-
-        for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
-                s3c_pm_restore_uart(uart, save);
+        s3c_pm_restore_uart(CONFIG_DEBUG_S3C_UART, &uart_save);
 }
 #else
 static void s3c_pm_save_uarts(void) { }
diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c
index 1e1b2d769748..39895d892c3b 100644
--- a/arch/arm/plat-versatile/platsmp.c
+++ b/arch/arm/plat-versatile/platsmp.c
@@ -23,7 +23,7 @@
  * observers, irrespective of whether they're taking part in coherency
  * or not.  This is necessary for the hotplug code to work reliably.
  */
-static void __cpuinit write_pen_release(int val)
+static void write_pen_release(int val)
 {
         pen_release = val;
         smp_wmb();
@@ -33,7 +33,7 @@ static void __cpuinit write_pen_release(int val)
 
 static DEFINE_SPINLOCK(boot_lock);
 
-void __cpuinit versatile_secondary_init(unsigned int cpu)
+void versatile_secondary_init(unsigned int cpu)
 {
         /*
          * let the primary processor know we're out of the
@@ -48,7 +48,7 @@ void __cpuinit versatile_secondary_init(unsigned int cpu)
         spin_unlock(&boot_lock);
 }
 
-int __cpuinit versatile_boot_secondary(unsigned int cpu, struct task_struct *idle)
+int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
         unsigned long timeout;
 
diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c
index f71c37edca26..8a6295c86209 100644
--- a/arch/arm/xen/enlighten.c
+++ b/arch/arm/xen/enlighten.c
@@ -170,9 +170,10 @@ static void __init xen_percpu_init(void *unused)
         per_cpu(xen_vcpu, cpu) = vcpup;
 
         enable_percpu_irq(xen_events_irq, 0);
+        put_cpu();
 }
 
-static void xen_restart(char str, const char *cmd)
+static void xen_restart(enum reboot_mode reboot_mode, const char *cmd)
 {
         struct sched_shutdown r = { .reason = SHUTDOWN_reboot };
         int rc;