313 files changed, 2686 insertions, 5291 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5098564d5879..93180845ae16 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -9,6 +9,7 @@ config ARM
         select SYS_SUPPORTS_APM_EMULATION
         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
+        select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
         select HAVE_ARCH_KGDB
         select HAVE_KPROBES if !XIP_KERNEL
         select HAVE_KRETPROBES if (HAVE_KPROBES)
@@ -21,6 +22,7 @@ config ARM
         select HAVE_KERNEL_GZIP
         select HAVE_KERNEL_LZO
         select HAVE_KERNEL_LZMA
+        select HAVE_KERNEL_XZ
         select HAVE_IRQ_WORK
         select HAVE_PERF_EVENTS
         select PERF_USE_VMALLOC
@@ -28,10 +30,10 @@ config ARM
         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
         select HAVE_C_RECORDMCOUNT
         select HAVE_GENERIC_HARDIRQS
-        select HAVE_SPARSE_IRQ
         select GENERIC_IRQ_SHOW
         select CPU_PM if (SUSPEND || CPU_IDLE)
         select GENERIC_PCI_IOMAP
+        select HAVE_BPF_JIT if NET
         help
           The ARM series is a line of low-power-consumption RISC chip designs
           licensed by ARM Ltd and targeted at embedded applications and
@@ -52,9 +54,6 @@ config MIGHT_HAVE_PCI
 config SYS_SUPPORTS_APM_EMULATION
         bool
 
-config HAVE_SCHED_CLOCK
-        bool
-
 config GENERIC_GPIO
         bool
 
@@ -180,6 +179,9 @@ config ZONE_DMA
 config NEED_DMA_MAP_STATE
        def_bool y
 
+config ARCH_HAS_DMA_SET_COHERENT_MASK
+        bool
+
 config GENERIC_ISA_DMA
         bool
 
@@ -217,6 +219,13 @@ config ARM_PATCH_PHYS_VIRT
           this feature (eg, building a kernel for a single machine) and
           you need to shrink the kernel to the minimal size.
 
+config NEED_MACH_IO_H
+        bool
+        help
+          Select this when mach/io.h is required to provide special
+          definitions for this platform.  The need for mach/io.h should
+          be avoided when possible.
+
 config NEED_MACH_MEMORY_H
         bool
         help
@@ -268,7 +277,9 @@ config ARCH_INTEGRATOR
         select GENERIC_CLOCKEVENTS
         select PLAT_VERSATILE
         select PLAT_VERSATILE_FPGA_IRQ
+        select NEED_MACH_IO_H
         select NEED_MACH_MEMORY_H
+        select SPARSE_IRQ
         help
           Support for ARM's Integrator platform.
 
@@ -315,6 +326,7 @@ config ARCH_VEXPRESS
         select HAVE_CLK
         select HAVE_PATA_PLATFORM
         select ICST
+        select NO_IOPORT
         select PLAT_VERSATILE
         select PLAT_VERSATILE_CLCD
         help
@@ -354,6 +366,7 @@ config ARCH_HIGHBANK
         select GENERIC_CLOCKEVENTS
         select HAVE_ARM_SCU
         select HAVE_SMP
+        select SPARSE_IRQ
         select USE_OF
         help
           Support for the Calxeda Highbank SoC based boards.
@@ -404,6 +417,7 @@ config ARCH_EBSA110
         select ISA
         select NO_IOPORT
         select ARCH_USES_GETTIMEOFFSET
+        select NEED_MACH_IO_H
         select NEED_MACH_MEMORY_H
         help
           This is an evaluation board for the StrongARM processor available
@@ -430,6 +444,7 @@ config ARCH_FOOTBRIDGE
         select FOOTBRIDGE
         select GENERIC_CLOCKEVENTS
         select HAVE_IDE
+        select NEED_MACH_IO_H
         select NEED_MACH_MEMORY_H
         help
           Support for systems based on the DC21285 companion chip
@@ -442,7 +457,6 @@ config ARCH_MXC
         select CLKDEV_LOOKUP
         select CLKSRC_MMIO
         select GENERIC_IRQ_CHIP
-        select HAVE_SCHED_CLOCK
         select MULTI_IRQ_HANDLER
         help
           Support for Freescale MXC/iMX-based family of processors
@@ -482,6 +496,7 @@ config ARCH_IOP13XX
         select PCI
         select ARCH_SUPPORTS_MSI
         select VMSPLIT_1G
+        select NEED_MACH_IO_H
         select NEED_MACH_MEMORY_H
         select NEED_RET_TO_USER
         help
@@ -491,6 +506,7 @@ config ARCH_IOP32X
         bool "IOP32x-based"
         depends on MMU
         select CPU_XSCALE
+        select NEED_MACH_IO_H
         select NEED_RET_TO_USER
         select PLAT_IOP
         select PCI
@@ -503,6 +519,7 @@ config ARCH_IOP33X
         bool "IOP33x-based"
         depends on MMU
         select CPU_XSCALE
+        select NEED_MACH_IO_H
         select NEED_RET_TO_USER
         select PLAT_IOP
         select PCI
@@ -516,6 +533,7 @@ config ARCH_IXP23XX
         select CPU_XSC3
         select PCI
         select ARCH_USES_GETTIMEOFFSET
+        select NEED_MACH_IO_H
         select NEED_MACH_MEMORY_H
         help
           Support for Intel's IXP23xx (XScale) family of processors.
@@ -526,6 +544,7 @@ config ARCH_IXP2000
         select CPU_XSCALE
         select PCI
         select ARCH_USES_GETTIMEOFFSET
+        select NEED_MACH_IO_H
         select NEED_MACH_MEMORY_H
         help
           Support for Intel's IXP2400/2800 (XScale) family of processors.
@@ -533,12 +552,13 @@ config ARCH_IXP2000
 config ARCH_IXP4XX
         bool "IXP4xx-based"
         depends on MMU
+        select ARCH_HAS_DMA_SET_COHERENT_MASK
         select CLKSRC_MMIO
         select CPU_XSCALE
         select GENERIC_GPIO
         select GENERIC_CLOCKEVENTS
-        select HAVE_SCHED_CLOCK
         select MIGHT_HAVE_PCI
+        select NEED_MACH_IO_H
         select DMABOUNCE if PCI
         help
           Support for Intel's IXP4XX (XScale) family of processors.
@@ -549,6 +569,7 @@ config ARCH_DOVE
         select PCI
         select ARCH_REQUIRE_GPIOLIB
         select GENERIC_CLOCKEVENTS
+        select NEED_MACH_IO_H
         select PLAT_ORION
         help
           Support for the Marvell Dove SoC 88AP510
@@ -559,6 +580,7 @@ config ARCH_KIRKWOOD
         select PCI
         select ARCH_REQUIRE_GPIOLIB
         select GENERIC_CLOCKEVENTS
+        select NEED_MACH_IO_H
         select PLAT_ORION
         help
           Support for the following Marvell Kirkwood series SoCs:
@@ -583,6 +605,7 @@ config ARCH_MV78XX0
         select PCI
         select ARCH_REQUIRE_GPIOLIB
         select GENERIC_CLOCKEVENTS
+        select NEED_MACH_IO_H
         select PLAT_ORION
         help
           Support for the following Marvell MV78xx0 series SoCs:
@@ -608,7 +631,6 @@ config ARCH_MMP
         select CLKDEV_LOOKUP
         select GENERIC_CLOCKEVENTS
         select GPIO_PXA
-        select HAVE_SCHED_CLOCK
         select TICK_ONESHOT
         select PLAT_PXA
         select SPARSE_IRQ
@@ -649,9 +671,9 @@ config ARCH_TEGRA
         select GENERIC_CLOCKEVENTS
         select GENERIC_GPIO
         select HAVE_CLK
-        select HAVE_SCHED_CLOCK
         select HAVE_SMP
         select MIGHT_HAVE_CACHE_L2X0
+        select NEED_MACH_IO_H if PCI
         select ARCH_HAS_CPUFREQ
         help
           This enables support for NVIDIA Tegra based systems (Tegra APX,
@@ -666,7 +688,6 @@ config ARCH_PICOXCELL
         select DW_APB_TIMER
         select GENERIC_CLOCKEVENTS
         select GENERIC_GPIO
-        select HAVE_SCHED_CLOCK
         select HAVE_TCM
         select NO_IOPORT
         select SPARSE_IRQ
@@ -694,7 +715,6 @@ config ARCH_PXA
         select ARCH_REQUIRE_GPIOLIB
         select GENERIC_CLOCKEVENTS
         select GPIO_PXA
-        select HAVE_SCHED_CLOCK
         select TICK_ONESHOT
         select PLAT_PXA
         select SPARSE_IRQ
@@ -745,6 +765,7 @@ config ARCH_RPC
         select ARCH_SPARSEMEM_ENABLE
         select ARCH_USES_GETTIMEOFFSET
         select HAVE_IDE
+        select NEED_MACH_IO_H
         select NEED_MACH_MEMORY_H
         help
           On the Acorn Risc-PC, Linux can support the internal IDE disk and
@@ -761,7 +782,6 @@ config ARCH_SA1100
         select CPU_FREQ
         select GENERIC_CLOCKEVENTS
         select CLKDEV_LOOKUP
-        select HAVE_SCHED_CLOCK
         select TICK_ONESHOT
         select ARCH_REQUIRE_GPIOLIB
         select HAVE_IDE
@@ -780,6 +800,7 @@ config ARCH_S3C24XX
         select HAVE_S3C2410_I2C if I2C
         select HAVE_S3C_RTC if RTC_CLASS
         select HAVE_S3C2410_WATCHDOG if WATCHDOG
+        select NEED_MACH_IO_H
         help
           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
@@ -818,7 +839,6 @@ config ARCH_S5P64X0
         select CLKSRC_MMIO
         select HAVE_S3C2410_WATCHDOG if WATCHDOG
         select GENERIC_CLOCKEVENTS
-        select HAVE_SCHED_CLOCK
         select HAVE_S3C2410_I2C if I2C
         select HAVE_S3C_RTC if RTC_CLASS
         help
@@ -849,7 +869,6 @@ config ARCH_S5PV210
         select CLKSRC_MMIO
         select ARCH_HAS_CPUFREQ
         select GENERIC_CLOCKEVENTS
-        select HAVE_SCHED_CLOCK
         select HAVE_S3C2410_I2C if I2C
         select HAVE_S3C_RTC if RTC_CLASS
         select HAVE_S3C2410_WATCHDOG if WATCHDOG
@@ -883,6 +902,7 @@ config ARCH_SHARK
         select PCI
         select ARCH_USES_GETTIMEOFFSET
         select NEED_MACH_MEMORY_H
+        select NEED_MACH_IO_H
         help
           Support for the StrongARM based Digital DNARD machine, also known
           as "Shark" (<http://www.shark-linux.de/shark.html>).
@@ -892,7 +912,6 @@ config ARCH_U300
         depends on MMU
         select CLKSRC_MMIO
         select CPU_ARM926T
-        select HAVE_SCHED_CLOCK
         select HAVE_TCM
         select ARM_AMBA
         select ARM_PATCH_PHYS_VIRT
@@ -951,7 +970,6 @@ config ARCH_OMAP
         select ARCH_HAS_CPUFREQ
         select CLKSRC_MMIO
         select GENERIC_CLOCKEVENTS
-        select HAVE_SCHED_CLOCK
         select ARCH_HAS_HOLES_MEMORYMODEL
         help
           Support for TI's OMAP platform (OMAP1/2/3/4).
@@ -1115,13 +1133,11 @@ config ARCH_ACORN
 config PLAT_IOP
         bool
         select GENERIC_CLOCKEVENTS
-        select HAVE_SCHED_CLOCK
 
 config PLAT_ORION
         bool
         select CLKSRC_MMIO
         select GENERIC_IRQ_CHIP
-        select HAVE_SCHED_CLOCK
 
 config PLAT_PXA
         bool
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 66ca8014ff3e..85348a09d655 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -292,6 +292,22 @@ choice
                   Note that the system will appear to hang during boot if there
                   is nothing connected to read from the DCC.
 
+        config DEBUG_SEMIHOSTING
+                bool "Kernel low-level debug output via semihosting I"
+                help
+                  Semihosting enables code running on an ARM target to use
+                  the I/O facilities on a host debugger/emulator through a
+                  simple SVC calls. The host debugger or emulator must have
+                  semihosting enabled for the special svc call to be trapped
+                  otherwise the kernel will crash.
+
+                  This is known to work with OpenOCD, as wellas
+                  ARM's Fast Models, or any other controlling environment
+                  that implements semihosting.
+
+                  For more details about semihosting, please see
+                  chapter 8 of DUI0203I_rvct_developer_guide.pdf from ARM Ltd.
+
 endchoice
 
 config EARLY_PRINTK
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index dcb088e868fe..047a20780fc1 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -253,6 +253,7 @@ core-$(CONFIG_VFP)		+= arch/arm/vfp/
 
 # If we have a machine-specific directory, then include it in the build.
 core-y                          += arch/arm/kernel/ arch/arm/mm/ arch/arm/common/
+core-y                          += arch/arm/net/
 core-y                          += $(machdirs) $(platdirs)
 
 drivers-$(CONFIG_OPROFILE)      += arch/arm/oprofile/
diff --git a/arch/arm/boot/compressed/.gitignore b/arch/arm/boot/compressed/.gitignore
index e0936a148516..d0d441c429ae 100644
--- a/arch/arm/boot/compressed/.gitignore
+++ b/arch/arm/boot/compressed/.gitignore
@@ -1,8 +1,10 @@
+ashldi3.S
 font.c
 lib1funcs.S
 piggy.gzip
 piggy.lzo
 piggy.lzma
+piggy.xzkern
 vmlinux
 vmlinux.lds
 
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index cf0a64ce4b83..bb267562e7ed 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -92,6 +92,7 @@ SEDFLAGS	= s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/
 suffix_$(CONFIG_KERNEL_GZIP) = gzip
 suffix_$(CONFIG_KERNEL_LZO)  = lzo
 suffix_$(CONFIG_KERNEL_LZMA) = lzma
+suffix_$(CONFIG_KERNEL_XZ)   = xzkern
 
 # Borrowed libfdt files for the ATAG compatibility mode
 
@@ -112,10 +113,12 @@ endif
 
 targets       := vmlinux vmlinux.lds \
                  piggy.$(suffix_y) piggy.$(suffix_y).o \
-                 lib1funcs.o lib1funcs.S font.o font.c head.o misc.o $(OBJS)
+                 lib1funcs.o lib1funcs.S ashldi3.o ashldi3.S \
+                 font.o font.c head.o misc.o $(OBJS)
 
 # Make sure files are removed during clean
-extra-y       += piggy.gzip piggy.lzo piggy.lzma lib1funcs.S $(libfdt) $(libfdt_hdrs)
+extra-y       += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern \
+                 lib1funcs.S ashldi3.S $(libfdt) $(libfdt_hdrs)
 
 ifeq ($(CONFIG_FUNCTION_TRACER),y)
 ORIG_CFLAGS := $(KBUILD_CFLAGS)
@@ -151,6 +154,12 @@ lib1funcs = $(obj)/lib1funcs.o
 $(obj)/lib1funcs.S: $(srctree)/arch/$(SRCARCH)/lib/lib1funcs.S
         $(call cmd,shipped)
 
+# For __aeabi_llsl
+ashldi3 = $(obj)/ashldi3.o
+
+$(obj)/ashldi3.S: $(srctree)/arch/$(SRCARCH)/lib/ashldi3.S
+        $(call cmd,shipped)
+
 # We need to prevent any GOTOFF relocs being used with references
 # to symbols in the .bss section since we cannot relocate them
 # independently from the rest at run time.  This can be achieved by
@@ -172,7 +181,7 @@ if [ $(words $(ZRELADDR)) -gt 1 -a "$(CONFIG_AUTO_ZRELADDR)" = "" ]; then \
 fi
 
 $(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.$(suffix_y).o \
-                $(addprefix $(obj)/, $(OBJS)) $(lib1funcs) FORCE
+                $(addprefix $(obj)/, $(OBJS)) $(lib1funcs) $(ashldi3) FORCE
         @$(check_for_multiple_zreladdr)
         $(call if_changed,ld)
         @$(check_for_bad_syms)
diff --git a/arch/arm/boot/compressed/decompress.c b/arch/arm/boot/compressed/decompress.c
index 07be5a2f8302..f41b38cafce8 100644
--- a/arch/arm/boot/compressed/decompress.c
+++ b/arch/arm/boot/compressed/decompress.c
@@ -44,6 +44,12 @@ extern void error(char *);
 #include "../../../../lib/decompress_unlzma.c"
 #endif
 
+#ifdef CONFIG_KERNEL_XZ
+#define memmove memmove
+#define memcpy memcpy
+#include "../../../../lib/decompress_unxz.c"
+#endif
+
 int do_decompress(u8 *input, int len, u8 *output, void (*error)(char *x))
 {
         return decompress(input, len, NULL, NULL, output, NULL, error);
diff --git a/arch/arm/boot/compressed/piggy.xzkern.S b/arch/arm/boot/compressed/piggy.xzkern.S
new file mode 100644
index 000000000000..5703f300d027
--- /dev/null
+++ b/arch/arm/boot/compressed/piggy.xzkern.S
@@ -0,0 +1,6 @@
+        .section .piggydata,#alloc
+        .globl  input_data
+input_data:
+        .incbin "arch/arm/boot/compressed/piggy.xzkern"
+        .globl  input_data_end
+input_data_end:
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 3bb1d7589bd9..283fa1d804f4 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -24,9 +24,6 @@ config ARM_VIC_NR
 config ICST
         bool
 
-config PL330
-        bool
-
 config SA1111
         bool
         select DMABOUNCE if !ARCH_PXA
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index 69feafe7286c..215816f1775f 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -5,7 +5,6 @@
 obj-$(CONFIG_ARM_GIC)           += gic.o
 obj-$(CONFIG_ARM_VIC)           += vic.o
 obj-$(CONFIG_ICST)              += icst.o
-obj-$(CONFIG_PL330)             += pl330.o
 obj-$(CONFIG_SA1111)            += sa1111.o
 obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o
 obj-$(CONFIG_DMABOUNCE)         += dmabounce.o
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index f0783be17352..aa5269984187 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -686,13 +686,12 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
          * For primary GICs, skip over SGIs.
          * For secondary GICs, skip over PPIs, too.
          */
-        hwirq_base = 32;
-        if (gic_nr == 0) {
-                if ((irq_start & 31) > 0) {
-                        hwirq_base = 16;
-                        if (irq_start != -1)
-                                irq_start = (irq_start & ~31) + 16;
-                }
+        if (gic_nr == 0 && (irq_start & 31) > 0) {
+                hwirq_base = 16;
+                if (irq_start != -1)
+                        irq_start = (irq_start & ~31) + 16;
+        } else {
+                hwirq_base = 32;
         }
 
         /*
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c
deleted file mode 100644
index ff3ad2244824..000000000000
--- a/arch/arm/common/pl330.c
+++ /dev/null
@@ -1,1960 +0,0 @@
-/* linux/arch/arm/common/pl330.c
- *
- * Copyright (C) 2010 Samsung Electronics Co Ltd.
- *      Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/module.h>
-#include <linux/string.h>
-#include <linux/io.h>
-#include <linux/delay.h>
-#include <linux/interrupt.h>
-#include <linux/dma-mapping.h>
-
-#include <asm/hardware/pl330.h>
-
-/* Register and Bit field Definitions */
-#define DS              0x0
-#define DS_ST_STOP      0x0
-#define DS_ST_EXEC      0x1
-#define DS_ST_CMISS     0x2
-#define DS_ST_UPDTPC    0x3
-#define DS_ST_WFE       0x4
-#define DS_ST_ATBRR     0x5
-#define DS_ST_QBUSY     0x6
-#define DS_ST_WFP       0x7
-#define DS_ST_KILL      0x8
-#define DS_ST_CMPLT     0x9
-#define DS_ST_FLTCMP    0xe
-#define DS_ST_FAULT     0xf
-
-#define DPC             0x4
-#define INTEN           0x20
-#define ES              0x24
-#define INTSTATUS       0x28
-#define INTCLR          0x2c
-#define FSM             0x30
-#define FSC             0x34
-#define FTM             0x38
-
-#define _FTC            0x40
-#define FTC(n)          (_FTC + (n)*0x4)
-
-#define _CS             0x100
-#define CS(n)           (_CS + (n)*0x8)
-#define CS_CNS          (1 << 21)
-
-#define _CPC            0x104
-#define CPC(n)          (_CPC + (n)*0x8)
-
-#define _SA             0x400
-#define SA(n)           (_SA + (n)*0x20)
-
-#define _DA             0x404
-#define DA(n)           (_DA + (n)*0x20)
-
-#define _CC             0x408
-#define CC(n)           (_CC + (n)*0x20)
-
-#define CC_SRCINC       (1 << 0)
-#define CC_DSTINC       (1 << 14)
-#define CC_SRCPRI       (1 << 8)
-#define CC_DSTPRI       (1 << 22)
-#define CC_SRCNS        (1 << 9)
-#define CC_DSTNS        (1 << 23)
-#define CC_SRCIA        (1 << 10)
-#define CC_DSTIA        (1 << 24)
-#define CC_SRCBRSTLEN_SHFT      4
-#define CC_DSTBRSTLEN_SHFT      18
-#define CC_SRCBRSTSIZE_SHFT     1
-#define CC_DSTBRSTSIZE_SHFT     15
-#define CC_SRCCCTRL_SHFT        11
-#define CC_SRCCCTRL_MASK        0x7
-#define CC_DSTCCTRL_SHFT        25
-#define CC_DRCCCTRL_MASK        0x7
-#define CC_SWAP_SHFT    28
-
-#define _LC0            0x40c
-#define LC0(n)          (_LC0 + (n)*0x20)
-
-#define _LC1            0x410
-#define LC1(n)          (_LC1 + (n)*0x20)
-
-#define DBGSTATUS       0xd00
-#define DBG_BUSY        (1 << 0)
-
-#define DBGCMD          0xd04
-#define DBGINST0        0xd08
-#define DBGINST1        0xd0c
-
-#define CR0             0xe00
-#define CR1             0xe04
-#define CR2             0xe08
-#define CR3             0xe0c
-#define CR4             0xe10
-#define CRD             0xe14
-
-#define PERIPH_ID       0xfe0
-#define PCELL_ID        0xff0
-
-#define CR0_PERIPH_REQ_SET      (1 << 0)
-#define CR0_BOOT_EN_SET         (1 << 1)
-#define CR0_BOOT_MAN_NS         (1 << 2)
-#define CR0_NUM_CHANS_SHIFT     4
-#define CR0_NUM_CHANS_MASK      0x7
-#define CR0_NUM_PERIPH_SHIFT    12
-#define CR0_NUM_PERIPH_MASK     0x1f
-#define CR0_NUM_EVENTS_SHIFT    17
-#define CR0_NUM_EVENTS_MASK     0x1f
-
-#define CR1_ICACHE_LEN_SHIFT    0
-#define CR1_ICACHE_LEN_MASK     0x7
-#define CR1_NUM_ICACHELINES_SHIFT       4
-#define CR1_NUM_ICACHELINES_MASK        0xf
-
-#define CRD_DATA_WIDTH_SHIFT    0
-#define CRD_DATA_WIDTH_MASK     0x7
-#define CRD_WR_CAP_SHIFT        4
-#define CRD_WR_CAP_MASK         0x7
-#define CRD_WR_Q_DEP_SHIFT      8
-#define CRD_WR_Q_DEP_MASK       0xf
-#define CRD_RD_CAP_SHIFT        12
-#define CRD_RD_CAP_MASK         0x7
-#define CRD_RD_Q_DEP_SHIFT      16
-#define CRD_RD_Q_DEP_MASK       0xf
-#define CRD_DATA_BUFF_SHIFT     20
-#define CRD_DATA_BUFF_MASK      0x3ff
-
-#define PART            0x330
-#define DESIGNER        0x41
-#define REVISION        0x0
-#define INTEG_CFG       0x0
-#define PERIPH_ID_VAL   ((PART << 0) | (DESIGNER << 12))
-
-#define PCELL_ID_VAL    0xb105f00d
-
-#define PL330_STATE_STOPPED             (1 << 0)
-#define PL330_STATE_EXECUTING           (1 << 1)
-#define PL330_STATE_WFE                 (1 << 2)
-#define PL330_STATE_FAULTING            (1 << 3)
-#define PL330_STATE_COMPLETING          (1 << 4)
-#define PL330_STATE_WFP                 (1 << 5)
-#define PL330_STATE_KILLING             (1 << 6)
-#define PL330_STATE_FAULT_COMPLETING    (1 << 7)
-#define PL330_STATE_CACHEMISS           (1 << 8)
-#define PL330_STATE_UPDTPC              (1 << 9)
-#define PL330_STATE_ATBARRIER           (1 << 10)
-#define PL330_STATE_QUEUEBUSY           (1 << 11)
-#define PL330_STATE_INVALID             (1 << 15)
-
-#define PL330_STABLE_STATES (PL330_STATE_STOPPED | PL330_STATE_EXECUTING \
-                                | PL330_STATE_WFE | PL330_STATE_FAULTING)
-
-#define CMD_DMAADDH     0x54
-#define CMD_DMAEND      0x00
-#define CMD_DMAFLUSHP   0x35
-#define CMD_DMAGO       0xa0
-#define CMD_DMALD       0x04
-#define CMD_DMALDP      0x25
-#define CMD_DMALP       0x20
-#define CMD_DMALPEND    0x28
-#define CMD_DMAKILL     0x01
-#define CMD_DMAMOV      0xbc
-#define CMD_DMANOP      0x18
-#define CMD_DMARMB      0x12
-#define CMD_DMASEV      0x34
-#define CMD_DMAST       0x08
-#define CMD_DMASTP      0x29
-#define CMD_DMASTZ      0x0c
-#define CMD_DMAWFE      0x36
-#define CMD_DMAWFP      0x30
-#define CMD_DMAWMB      0x13
-
-#define SZ_DMAADDH      3
-#define SZ_DMAEND       1
-#define SZ_DMAFLUSHP    2
-#define SZ_DMALD        1
-#define SZ_DMALDP       2
-#define SZ_DMALP        2
-#define SZ_DMALPEND     2
-#define SZ_DMAKILL      1
-#define SZ_DMAMOV       6
-#define SZ_DMANOP       1
-#define SZ_DMARMB       1
-#define SZ_DMASEV       2
-#define SZ_DMAST        1
-#define SZ_DMASTP       2
-#define SZ_DMASTZ       1
-#define SZ_DMAWFE       2
-#define SZ_DMAWFP       2
-#define SZ_DMAWMB       1
-#define SZ_DMAGO        6
-
-#define BRST_LEN(ccr)   ((((ccr) >> CC_SRCBRSTLEN_SHFT) & 0xf) + 1)
-#define BRST_SIZE(ccr)  (1 << (((ccr) >> CC_SRCBRSTSIZE_SHFT) & 0x7))
-
-#define BYTE_TO_BURST(b, ccr)  ((b) / BRST_SIZE(ccr) / BRST_LEN(ccr))
-#define BURST_TO_BYTE(c, ccr)  ((c) * BRST_SIZE(ccr) * BRST_LEN(ccr))
-
-/*
- * With 256 bytes, we can do more than 2.5MB and 5MB xfers per req
- * at 1byte/burst for P<->M and M<->M respectively.
- * For typical scenario, at 1word/burst, 10MB and 20MB xfers per req
- * should be enough for P<->M and M<->M respectively.
- */
-#define MCODE_BUFF_PER_REQ      256
-
-/* If the _pl330_req is available to the client */
-#define IS_FREE(req)    (*((u8 *)((req)->mc_cpu)) == CMD_DMAEND)
-
-/* Use this _only_ to wait on transient states */
-#define UNTIL(t, s)     while (!(_state(t) & (s))) cpu_relax();
-
-#ifdef PL330_DEBUG_MCGEN
-static unsigned cmd_line;
-#define PL330_DBGCMD_DUMP(off, x...)    do { \
-                                                printk("%x:", cmd_line); \
-                                                printk(x); \
-                                                cmd_line += off; \
-                                        } while (0)
-#define PL330_DBGMC_START(addr)         (cmd_line = addr)
-#else
-#define PL330_DBGCMD_DUMP(off, x...)    do {} while (0)
-#define PL330_DBGMC_START(addr)         do {} while (0)
-#endif
-
-struct _xfer_spec {
-        u32 ccr;
-        struct pl330_req *r;
-        struct pl330_xfer *x;
-};
-
-enum dmamov_dst {
-        SAR = 0,
-        CCR,
-        DAR,
-};
-
-enum pl330_dst {
-        SRC = 0,
-        DST,
-};
-
-enum pl330_cond {
-        SINGLE,
-        BURST,
-        ALWAYS,
-};
-
-struct _pl330_req {
-        u32 mc_bus;
-        void *mc_cpu;
-        /* Number of bytes taken to setup MC for the req */
-        u32 mc_len;
-        struct pl330_req *r;
-        /* Hook to attach to DMAC's list of reqs with due callback */
-        struct list_head rqd;
-};
-
-/* ToBeDone for tasklet */
-struct _pl330_tbd {
-        bool reset_dmac;
-        bool reset_mngr;
-        u8 reset_chan;
-};
-
-/* A DMAC Thread */
-struct pl330_thread {
-        u8 id;
-        int ev;
-        /* If the channel is not yet acquired by any client */
-        bool free;
-        /* Parent DMAC */
-        struct pl330_dmac *dmac;
-        /* Only two at a time */
-        struct _pl330_req req[2];
-        /* Index of the last enqueued request */
-        unsigned lstenq;
-        /* Index of the last submitted request or -1 if the DMA is stopped */
-        int req_running;
-};
-
-enum pl330_dmac_state {
-        UNINIT,
-        INIT,
-        DYING,
-};
-
-/* A DMAC */
-struct pl330_dmac {
-        spinlock_t              lock;
-        /* Holds list of reqs with due callbacks */
-        struct list_head        req_done;
-        /* Pointer to platform specific stuff */
-        struct pl330_info       *pinfo;
-        /* Maximum possible events/irqs */
-        int                     events[32];
-        /* BUS address of MicroCode buffer */
-        u32                     mcode_bus;
-        /* CPU address of MicroCode buffer */
-        void                    *mcode_cpu;
-        /* List of all Channel threads */
-        struct pl330_thread     *channels;
-        /* Pointer to the MANAGER thread */
-        struct pl330_thread     *manager;
-        /* To handle bad news in interrupt */
-        struct tasklet_struct   tasks;
-        struct _pl330_tbd       dmac_tbd;
-        /* State of DMAC operation */
-        enum pl330_dmac_state   state;
-};
-
-static inline void _callback(struct pl330_req *r, enum pl330_op_err err)
-{
-        if (r && r->xfer_cb)
-                r->xfer_cb(r->token, err);
-}
-
-static inline bool _queue_empty(struct pl330_thread *thrd)
-{
-        return (IS_FREE(&thrd->req[0]) && IS_FREE(&thrd->req[1]))
-                ? true : false;
-}
-
-static inline bool _queue_full(struct pl330_thread *thrd)
-{
-        return (IS_FREE(&thrd->req[0]) || IS_FREE(&thrd->req[1]))
-                ? false : true;
-}
-
-static inline bool is_manager(struct pl330_thread *thrd)
-{
-        struct pl330_dmac *pl330 = thrd->dmac;
-
-        /* MANAGER is indexed at the end */
-        if (thrd->id == pl330->pinfo->pcfg.num_chan)
-                return true;
-        else
-                return false;
-}
-
-/* If manager of the thread is in Non-Secure mode */
-static inline bool _manager_ns(struct pl330_thread *thrd)
-{
-        struct pl330_dmac *pl330 = thrd->dmac;
-
-        return (pl330->pinfo->pcfg.mode & DMAC_MODE_NS) ? true : false;
-}
-
-static inline u32 get_id(struct pl330_info *pi, u32 off)
-{
-        void __iomem *regs = pi->base;
-        u32 id = 0;
-
-        id |= (readb(regs + off + 0x0) << 0);
-        id |= (readb(regs + off + 0x4) << 8);
-        id |= (readb(regs + off + 0x8) << 16);
-        id |= (readb(regs + off + 0xc) << 24);
-
-        return id;
-}
-
-static inline u32 _emit_ADDH(unsigned dry_run, u8 buf[],
-                enum pl330_dst da, u16 val)
-{
-        if (dry_run)
-                return SZ_DMAADDH;
-
-        buf[0] = CMD_DMAADDH;
-        buf[0] |= (da << 1);
-        *((u16 *)&buf[1]) = val;
-
-        PL330_DBGCMD_DUMP(SZ_DMAADDH, "\tDMAADDH %s %u\n",
-                da == 1 ? "DA" : "SA", val);
-
-        return SZ_DMAADDH;
-}
-
-static inline u32 _emit_END(unsigned dry_run, u8 buf[])
-{
-        if (dry_run)
-                return SZ_DMAEND;
-
-        buf[0] = CMD_DMAEND;
-
-        PL330_DBGCMD_DUMP(SZ_DMAEND, "\tDMAEND\n");
-
-        return SZ_DMAEND;
-}
-
-static inline u32 _emit_FLUSHP(unsigned dry_run, u8 buf[], u8 peri)
-{
-        if (dry_run)
-                return SZ_DMAFLUSHP;
-
-        buf[0] = CMD_DMAFLUSHP;
-
-        peri &= 0x1f;
-        peri <<= 3;
-        buf[1] = peri;
-
-        PL330_DBGCMD_DUMP(SZ_DMAFLUSHP, "\tDMAFLUSHP %u\n", peri >> 3);
-
-        return SZ_DMAFLUSHP;
-}
-
-static inline u32 _emit_LD(unsigned dry_run, u8 buf[],  enum pl330_cond cond)
-{
-        if (dry_run)
-                return SZ_DMALD;
-
-        buf[0] = CMD_DMALD;
-
-        if (cond == SINGLE)
-                buf[0] |= (0 << 1) | (1 << 0);
-        else if (cond == BURST)
-                buf[0] |= (1 << 1) | (1 << 0);
-
-        PL330_DBGCMD_DUMP(SZ_DMALD, "\tDMALD%c\n",
-                cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'A'));
-
-        return SZ_DMALD;
-}
-
-static inline u32 _emit_LDP(unsigned dry_run, u8 buf[],
-                enum pl330_cond cond, u8 peri)
-{
-        if (dry_run)
-                return SZ_DMALDP;
-
-        buf[0] = CMD_DMALDP;
-
-        if (cond == BURST)
-                buf[0] |= (1 << 1);
-
-        peri &= 0x1f;
-        peri <<= 3;
-        buf[1] = peri;
-
-        PL330_DBGCMD_DUMP(SZ_DMALDP, "\tDMALDP%c %u\n",
-                cond == SINGLE ? 'S' : 'B', peri >> 3);
-
-        return SZ_DMALDP;
-}
-
-static inline u32 _emit_LP(unsigned dry_run, u8 buf[],
-                unsigned loop, u8 cnt)
-{
-        if (dry_run)
-                return SZ_DMALP;
-
-        buf[0] = CMD_DMALP;
-
-        if (loop)
-                buf[0] |= (1 << 1);
-
-        cnt--; /* DMAC increments by 1 internally */
-        buf[1] = cnt;
-
-        PL330_DBGCMD_DUMP(SZ_DMALP, "\tDMALP_%c %u\n", loop ? '1' : '0', cnt);
-
-        return SZ_DMALP;
-}
-
-struct _arg_LPEND {
-        enum pl330_cond cond;
-        bool forever;
-        unsigned loop;
-        u8 bjump;
-};
-
-static inline u32 _emit_LPEND(unsigned dry_run, u8 buf[],
-                const struct _arg_LPEND *arg)
-{
-        enum pl330_cond cond = arg->cond;
-        bool forever = arg->forever;
-        unsigned loop = arg->loop;
-        u8 bjump = arg->bjump;
-
-        if (dry_run)
-                return SZ_DMALPEND;
-
-        buf[0] = CMD_DMALPEND;
-
-        if (loop)
-                buf[0] |= (1 << 2);
-
-        if (!forever)
-                buf[0] |= (1 << 4);
-
-        if (cond == SINGLE)
-                buf[0] |= (0 << 1) | (1 << 0);
-        else if (cond == BURST)
-                buf[0] |= (1 << 1) | (1 << 0);
-
-        buf[1] = bjump;
-
-        PL330_DBGCMD_DUMP(SZ_DMALPEND, "\tDMALP%s%c_%c bjmpto_%x\n",
-                        forever ? "FE" : "END",
-                        cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'A'),
-                        loop ? '1' : '0',
-                        bjump);
-
-        return SZ_DMALPEND;
-}
-
-static inline u32 _emit_KILL(unsigned dry_run, u8 buf[])
-{
-        if (dry_run)
-                return SZ_DMAKILL;
-
-        buf[0] = CMD_DMAKILL;
-
-        return SZ_DMAKILL;
-}
-
-static inline u32 _emit_MOV(unsigned dry_run, u8 buf[],
-                enum dmamov_dst dst, u32 val)
-{
-        if (dry_run)
-                return SZ_DMAMOV;
-
-        buf[0] = CMD_DMAMOV;
-        buf[1] = dst;
-        *((u32 *)&buf[2]) = val;
-
-        PL330_DBGCMD_DUMP(SZ_DMAMOV, "\tDMAMOV %s 0x%x\n",
-                dst == SAR ? "SAR" : (dst == DAR ? "DAR" : "CCR"), val);
-
-        return SZ_DMAMOV;
-}
-
-static inline u32 _emit_NOP(unsigned dry_run, u8 buf[])
-{
-        if (dry_run)
-                return SZ_DMANOP;
-
-        buf[0] = CMD_DMANOP;
-
-        PL330_DBGCMD_DUMP(SZ_DMANOP, "\tDMANOP\n");
-
-        return SZ_DMANOP;
-}
-
-static inline u32 _emit_RMB(unsigned dry_run, u8 buf[])
-{
-        if (dry_run)
-                return SZ_DMARMB;
-
-        buf[0] = CMD_DMARMB;
-
-        PL330_DBGCMD_DUMP(SZ_DMARMB, "\tDMARMB\n");
-
-        return SZ_DMARMB;
-}
-
-static inline u32 _emit_SEV(unsigned dry_run, u8 buf[], u8 ev)
-{
-        if (dry_run)
-                return SZ_DMASEV;
-
-        buf[0] = CMD_DMASEV;
-
-        ev &= 0x1f;
-        ev <<= 3;
-        buf[1] = ev;
-
-        PL330_DBGCMD_DUMP(SZ_DMASEV, "\tDMASEV %u\n", ev >> 3);
-
-        return SZ_DMASEV;
-}
-
-static inline u32 _emit_ST(unsigned dry_run, u8 buf[], enum pl330_cond cond)
-{
-        if (dry_run)
-                return SZ_DMAST;
-
-        buf[0] = CMD_DMAST;
-
-        if (cond == SINGLE)
-                buf[0] |= (0 << 1) | (1 << 0);
-        else if (cond == BURST)
-                buf[0] |= (1 << 1) | (1 << 0);
-
-        PL330_DBGCMD_DUMP(SZ_DMAST, "\tDMAST%c\n",
-                cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'A'));
-
-        return SZ_DMAST;
-}
-
-static inline u32 _emit_STP(unsigned dry_run, u8 buf[],
-                enum pl330_cond cond, u8 peri)
-{
-        if (dry_run)
-                return SZ_DMASTP;
-
-        buf[0] = CMD_DMASTP;
-
-        if (cond == BURST)
-                buf[0] |= (1 << 1);
-
-        peri &= 0x1f;
-        peri <<= 3;
-        buf[1] = peri;
-
-        PL330_DBGCMD_DUMP(SZ_DMASTP, "\tDMASTP%c %u\n",
-                cond == SINGLE ? 'S' : 'B', peri >> 3);
-
-        return SZ_DMASTP;
-}
-
-static inline u32 _emit_STZ(unsigned dry_run, u8 buf[])
-{
-        if (dry_run)
-                return SZ_DMASTZ;
-
-        buf[0] = CMD_DMASTZ;
-
-        PL330_DBGCMD_DUMP(SZ_DMASTZ, "\tDMASTZ\n");
-
-        return SZ_DMASTZ;
-}
-
-static inline u32 _emit_WFE(unsigned dry_run, u8 buf[], u8 ev,
-                unsigned invalidate)
-{
-        if (dry_run)
-                return SZ_DMAWFE;
-
-        buf[0] = CMD_DMAWFE;
-
-        ev &= 0x1f;
-        ev <<= 3;
-        buf[1] = ev;
-
-        if (invalidate)
-                buf[1] |= (1 << 1);
-
-        PL330_DBGCMD_DUMP(SZ_DMAWFE, "\tDMAWFE %u%s\n",
-                ev >> 3, invalidate ? ", I" : "");
-
-        return SZ_DMAWFE;
-}
-
-static inline u32 _emit_WFP(unsigned dry_run, u8 buf[],
-                enum pl330_cond cond, u8 peri)
-{
-        if (dry_run)
-                return SZ_DMAWFP;
-
-        buf[0] = CMD_DMAWFP;
-
-        if (cond == SINGLE)
-                buf[0] |= (0 << 1) | (0 << 0);
-        else if (cond == BURST)
-                buf[0] |= (1 << 1) | (0 << 0);
-        else
-                buf[0] |= (0 << 1) | (1 << 0);
-
-        peri &= 0x1f;
-        peri <<= 3;
-        buf[1] = peri;
-
-        PL330_DBGCMD_DUMP(SZ_DMAWFP, "\tDMAWFP%c %u\n",
-                cond == SINGLE ? 'S' : (cond == BURST ? 'B' : 'P'), peri >> 3);
-
-        return SZ_DMAWFP;
-}
-
-static inline u32 _emit_WMB(unsigned dry_run, u8 buf[])
-{
-        if (dry_run)
-                return SZ_DMAWMB;
-
-        buf[0] = CMD_DMAWMB;
-
-        PL330_DBGCMD_DUMP(SZ_DMAWMB, "\tDMAWMB\n");
-
-        return SZ_DMAWMB;
-}
-
-struct _arg_GO {
-        u8 chan;
-        u32 addr;
-        unsigned ns;
-};
-
-static inline u32 _emit_GO(unsigned dry_run, u8 buf[],
-                const struct _arg_GO *arg)
-{
-        u8 chan = arg->chan;
-        u32 addr = arg->addr;
-        unsigned ns = arg->ns;
-
-        if (dry_run)
-                return SZ_DMAGO;
-
-        buf[0] = CMD_DMAGO;
-        buf[0] |= (ns << 1);
-
-        buf[1] = chan & 0x7;
-
-        *((u32 *)&buf[2]) = addr;
-
-        return SZ_DMAGO;
-}
-
-#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
-
-/* Returns Time-Out */
-static bool _until_dmac_idle(struct pl330_thread *thrd)
-{
-        void __iomem *regs = thrd->dmac->pinfo->base;
-        unsigned long loops = msecs_to_loops(5);
-
-        do {
-                /* Until Manager is Idle */
-                if (!(readl(regs + DBGSTATUS) & DBG_BUSY))
-                        break;
-
-                cpu_relax();
-        } while (--loops);
-
-        if (!loops)
-                return true;
-
-        return false;
-}
-
-static inline void _execute_DBGINSN(struct pl330_thread *thrd,
-                u8 insn[], bool as_manager)
-{
-        void __iomem *regs = thrd->dmac->pinfo->base;
-        u32 val;
-
-        val = (insn[0] << 16) | (insn[1] << 24);
-        if (!as_manager) {
-                val |= (1 << 0);
-                val |= (thrd->id << 8); /* Channel Number */
-        }
-        writel(val, regs + DBGINST0);
-
-        val = *((u32 *)&insn[2]);
-        writel(val, regs + DBGINST1);
-
-        /* If timed out due to halted state-machine */
-        if (_until_dmac_idle(thrd)) {
-                dev_err(thrd->dmac->pinfo->dev, "DMAC halted!\n");
-                return;
-        }
-
-        /* Get going */
-        writel(0, regs + DBGCMD);
-}
-
-/*
- * Mark a _pl330_req as free.
- * We do it by writing DMAEND as the first instruction
- * because no valid request is going to have DMAEND as
- * its first instruction to execute.
- */
-static void mark_free(struct pl330_thread *thrd, int idx)
-{
-        struct _pl330_req *req = &thrd->req[idx];
-
-        _emit_END(0, req->mc_cpu);
-        req->mc_len = 0;
-
-        thrd->req_running = -1;
-}
-
-static inline u32 _state(struct pl330_thread *thrd)
-{
-        void __iomem *regs = thrd->dmac->pinfo->base;
-        u32 val;
-
-        if (is_manager(thrd))
-                val = readl(regs + DS) & 0xf;
-        else
-                val = readl(regs + CS(thrd->id)) & 0xf;
-
-        switch (val) {
-        case DS_ST_STOP:
-                return PL330_STATE_STOPPED;
-        case DS_ST_EXEC:
-                return PL330_STATE_EXECUTING;
-        case DS_ST_CMISS:
-                return PL330_STATE_CACHEMISS;
-        case DS_ST_UPDTPC:
-                return PL330_STATE_UPDTPC;
-        case DS_ST_WFE:
-                return PL330_STATE_WFE;
-        case DS_ST_FAULT:
-                return PL330_STATE_FAULTING;
-        case DS_ST_ATBRR:
-                if (is_manager(thrd))
-                        return PL330_STATE_INVALID;
-                else
-                        return PL330_STATE_ATBARRIER;
-        case DS_ST_QBUSY:
-                if (is_manager(thrd))
-                        return PL330_STATE_INVALID;
-                else
-                        return PL330_STATE_QUEUEBUSY;
-        case DS_ST_WFP:
-                if (is_manager(thrd))
-                        return PL330_STATE_INVALID;
-                else
-                        return PL330_STATE_WFP;
-        case DS_ST_KILL:
-                if (is_manager(thrd))
-                        return PL330_STATE_INVALID;
-                else
-                        return PL330_STATE_KILLING;
-        case DS_ST_CMPLT:
-                if (is_manager(thrd))
-                        return PL330_STATE_INVALID;
-                else
-                        return PL330_STATE_COMPLETING;
-        case DS_ST_FLTCMP:
-                if (is_manager(thrd))
-                        return PL330_STATE_INVALID;
-                else
-                        return PL330_STATE_FAULT_COMPLETING;
-        default:
-                return PL330_STATE_INVALID;
-        }
-}
-
-static void _stop(struct pl330_thread *thrd)
-{
-        void __iomem *regs = thrd->dmac->pinfo->base;
-        u8 insn[6] = {0, 0, 0, 0, 0, 0};
-
-        if (_state(thrd) == PL330_STATE_FAULT_COMPLETING)
-                UNTIL(thrd, PL330_STATE_FAULTING | PL330_STATE_KILLING);
-
-        /* Return if nothing needs to be done */
-        if (_state(thrd) == PL330_STATE_COMPLETING
-                  || _state(thrd) == PL330_STATE_KILLING
-                  || _state(thrd) == PL330_STATE_STOPPED)
-                return;
-
-        _emit_KILL(0, insn);
-
-        /* Stop generating interrupts for SEV */
-        writel(readl(regs + INTEN) & ~(1 << thrd->ev), regs + INTEN);
-
-        _execute_DBGINSN(thrd, insn, is_manager(thrd));
-}
-
-/* Start doing req 'idx' of thread 'thrd' */
-static bool _trigger(struct pl330_thread *thrd)
-{
-        void __iomem *regs = thrd->dmac->pinfo->base;
-        struct _pl330_req *req;
-        struct pl330_req *r;
-        struct _arg_GO go;
-        unsigned ns;
-        u8 insn[6] = {0, 0, 0, 0, 0, 0};
-        int idx;
-
-        /* Return if already ACTIVE */
-        if (_state(thrd) != PL330_STATE_STOPPED)
-                return true;
-
-        idx = 1 - thrd->lstenq;
-        if (!IS_FREE(&thrd->req[idx]))
-                req = &thrd->req[idx];
-        else {
-                idx = thrd->lstenq;
-                if (!IS_FREE(&thrd->req[idx]))
-                        req = &thrd->req[idx];
-                else
-                        req = NULL;
-        }
-
-        /* Return if no request */
-        if (!req || !req->r)
-                return true;
-
-        r = req->r;
-
-        if (r->cfg)
-                ns = r->cfg->nonsecure ? 1 : 0;
-        else if (readl(regs + CS(thrd->id)) & CS_CNS)
-                ns = 1;
-        else
-                ns = 0;
-
-        /* See 'Abort Sources' point-4 at Page 2-25 */
-        if (_manager_ns(thrd) && !ns)
-                dev_info(thrd->dmac->pinfo->dev, "%s:%d Recipe for ABORT!\n",
-                        __func__, __LINE__);
-
-        go.chan = thrd->id;
-        go.addr = req->mc_bus;
-        go.ns = ns;
-        _emit_GO(0, insn, &go);
-
-        /* Set to generate interrupts for SEV */
-        writel(readl(regs + INTEN) | (1 << thrd->ev), regs + INTEN);
-
-        /* Only manager can execute GO */
-        _execute_DBGINSN(thrd, insn, true);
-
-        thrd->req_running = idx;
-
-        return true;
-}
-
-static bool _start(struct pl330_thread *thrd)
-{
-        switch (_state(thrd)) {
-        case PL330_STATE_FAULT_COMPLETING:
-                UNTIL(thrd, PL330_STATE_FAULTING | PL330_STATE_KILLING);
-
-                if (_state(thrd) == PL330_STATE_KILLING)
-                        UNTIL(thrd, PL330_STATE_STOPPED)
-
-        case PL330_STATE_FAULTING:
-                _stop(thrd);
-
-        case PL330_STATE_KILLING:
-        case PL330_STATE_COMPLETING:
-                UNTIL(thrd, PL330_STATE_STOPPED)
-
-        case PL330_STATE_STOPPED:
-                return _trigger(thrd);
-
-        case PL330_STATE_WFP:
-        case PL330_STATE_QUEUEBUSY:
-        case PL330_STATE_ATBARRIER:
-        case PL330_STATE_UPDTPC:
-        case PL330_STATE_CACHEMISS:
-        case PL330_STATE_EXECUTING:
-                return true;
-
-        case PL330_STATE_WFE: /* For RESUME, nothing yet */
-        default:
-                return false;
-        }
-}
-
-static inline int _ldst_memtomem(unsigned dry_run, u8 buf[],
-                const struct _xfer_spec *pxs, int cyc)
-{
-        int off = 0;
-
-        while (cyc--) {
-                off += _emit_LD(dry_run, &buf[off], ALWAYS);
-                off += _emit_RMB(dry_run, &buf[off]);
-                off += _emit_ST(dry_run, &buf[off], ALWAYS);
-                off += _emit_WMB(dry_run, &buf[off]);
-        }
-
-        return off;
-}
-
-static inline int _ldst_devtomem(unsigned dry_run, u8 buf[],
-                const struct _xfer_spec *pxs, int cyc)
-{
-        int off = 0;
-
-        while (cyc--) {
-                off += _emit_WFP(dry_run, &buf[off], SINGLE, pxs->r->peri);
-                off += _emit_LDP(dry_run, &buf[off], SINGLE, pxs->r->peri);
-                off += _emit_ST(dry_run, &buf[off], ALWAYS);
-                off += _emit_FLUSHP(dry_run, &buf[off], pxs->r->peri);
-        }
-
-        return off;
-}
-
-static inline int _ldst_memtodev(unsigned dry_run, u8 buf[],
-                const struct _xfer_spec *pxs, int cyc)
-{
-        int off = 0;
-
-        while (cyc--) {
-                off += _emit_WFP(dry_run, &buf[off], SINGLE, pxs->r->peri);
-                off += _emit_LD(dry_run, &buf[off], ALWAYS);
-                off += _emit_STP(dry_run, &buf[off], SINGLE, pxs->r->peri);
-                off += _emit_FLUSHP(dry_run, &buf[off], pxs->r->peri);
-        }
-
-        return off;
-}
-
-static int _bursts(unsigned dry_run, u8 buf[],
-                const struct _xfer_spec *pxs, int cyc)
-{
-        int off = 0;
-
-        switch (pxs->r->rqtype) {
-        case MEMTODEV:
-                off += _ldst_memtodev(dry_run, &buf[off], pxs, cyc);
-                break;
-        case DEVTOMEM:
-                off += _ldst_devtomem(dry_run, &buf[off], pxs, cyc);
-                break;
-        case MEMTOMEM:
-                off += _ldst_memtomem(dry_run, &buf[off], pxs, cyc);
-                break;
-        default:
-                off += 0x40000000; /* Scare off the Client */
-                break;
-        }
-
-        return off;
-}
-
-/* Returns bytes consumed and updates bursts */
-static inline int _loop(unsigned dry_run, u8 buf[],
-                unsigned long *bursts, const struct _xfer_spec *pxs)
-{
-        int cyc, cycmax, szlp, szlpend, szbrst, off;
-        unsigned lcnt0, lcnt1, ljmp0, ljmp1;
-        struct _arg_LPEND lpend;
-
-        /* Max iterations possible in DMALP is 256 */
-        if (*bursts >= 256*256) {
-                lcnt1 = 256;
-                lcnt0 = 256;
-                cyc = *bursts / lcnt1 / lcnt0;
-        } else if (*bursts > 256) {
-                lcnt1 = 256;
-                lcnt0 = *bursts / lcnt1;
-                cyc = 1;
-        } else {
-                lcnt1 = *bursts;
-                lcnt0 = 0;
-                cyc = 1;
-        }
-
-        szlp = _emit_LP(1, buf, 0, 0);
-        szbrst = _bursts(1, buf, pxs, 1);
-
-        lpend.cond = ALWAYS;
-        lpend.forever = false;
-        lpend.loop = 0;
-        lpend.bjump = 0;
-        szlpend = _emit_LPEND(1, buf, &lpend);
-
-        if (lcnt0) {
-                szlp *= 2;
-                szlpend *= 2;
-        }
-
-        /*
-         * Max bursts that we can unroll due to limit on the
-         * size of backward jump that can be encoded in DMALPEND
-         * which is 8-bits and hence 255
-         */
-        cycmax = (255 - (szlp + szlpend)) / szbrst;
-
-        cyc = (cycmax < cyc) ? cycmax : cyc;
-
-        off = 0;
-
-        if (lcnt0) {
-                off += _emit_LP(dry_run, &buf[off], 0, lcnt0);
-                ljmp0 = off;
-        }
-
-        off += _emit_LP(dry_run, &buf[off], 1, lcnt1);
-        ljmp1 = off;
-
-        off += _bursts(dry_run, &buf[off], pxs, cyc);
-
-        lpend.cond = ALWAYS;
-        lpend.forever = false;
-        lpend.loop = 1;
-        lpend.bjump = off - ljmp1;
-        off += _emit_LPEND(dry_run, &buf[off], &lpend);
-
-        if (lcnt0) {
-                lpend.cond = ALWAYS;
-                lpend.forever = false;
-                lpend.loop = 0;
-                lpend.bjump = off - ljmp0;
-                off += _emit_LPEND(dry_run, &buf[off], &lpend);
-        }
-
-        *bursts = lcnt1 * cyc;
-        if (lcnt0)
-                *bursts *= lcnt0;
-
-        return off;
-}
-
-static inline int _setup_loops(unsigned dry_run, u8 buf[],
-                const struct _xfer_spec *pxs)
-{
-        struct pl330_xfer *x = pxs->x;
-        u32 ccr = pxs->ccr;
-        unsigned long c, bursts = BYTE_TO_BURST(x->bytes, ccr);
-        int off = 0;
-
-        while (bursts) {
-                c = bursts;
-                off += _loop(dry_run, &buf[off], &c, pxs);
-                bursts -= c;
-        }
-
-        return off;
-}
-
-static inline int _setup_xfer(unsigned dry_run, u8 buf[],
-                const struct _xfer_spec *pxs)
-{
-        struct pl330_xfer *x = pxs->x;
-        int off = 0;
-
-        /* DMAMOV SAR, x->src_addr */
-        off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr);
-        /* DMAMOV DAR, x->dst_addr */
-        off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr);
-
-        /* Setup Loop(s) */
-        off += _setup_loops(dry_run, &buf[off], pxs);
-
-        return off;
-}
-
-/*
- * A req is a sequence of one or more xfer units.
- * Returns the number of bytes taken to setup the MC for the req.
- */
-static int _setup_req(unsigned dry_run, struct pl330_thread *thrd,
-                unsigned index, struct _xfer_spec *pxs)
-{
-        struct _pl330_req *req = &thrd->req[index];
-        struct pl330_xfer *x;
-        u8 *buf = req->mc_cpu;
-        int off = 0;
-
-        PL330_DBGMC_START(req->mc_bus);
-
-        /* DMAMOV CCR, ccr */
-        off += _emit_MOV(dry_run, &buf[off], CCR, pxs->ccr);
-
-        x = pxs->r->x;
-        do {
-                /* Error if xfer length is not aligned at burst size */
-                if (x->bytes % (BRST_SIZE(pxs->ccr) * BRST_LEN(pxs->ccr)))
-                        return -EINVAL;
-
-                pxs->x = x;
-                off += _setup_xfer(dry_run, &buf[off], pxs);
-
-                x = x->next;
-        } while (x);
-
-        /* DMASEV peripheral/event */
-        off += _emit_SEV(dry_run, &buf[off], thrd->ev);
-        /* DMAEND */
-        off += _emit_END(dry_run, &buf[off]);
-
-        return off;
-}
-
-static inline u32 _prepare_ccr(const struct pl330_reqcfg *rqc)
-{
-        u32 ccr = 0;
-
-        if (rqc->src_inc)
-                ccr |= CC_SRCINC;
-
-        if (rqc->dst_inc)
-                ccr |= CC_DSTINC;
-
-        /* We set same protection levels for Src and DST for now */
-        if (rqc->privileged)
-                ccr |= CC_SRCPRI | CC_DSTPRI;
-        if (rqc->nonsecure)
-                ccr |= CC_SRCNS | CC_DSTNS;
-        if (rqc->insnaccess)
-                ccr |= CC_SRCIA | CC_DSTIA;
-
-        ccr |= (((rqc->brst_len - 1) & 0xf) << CC_SRCBRSTLEN_SHFT);
-        ccr |= (((rqc->brst_len - 1) & 0xf) << CC_DSTBRSTLEN_SHFT);
-
-        ccr |= (rqc->brst_size << CC_SRCBRSTSIZE_SHFT);
-        ccr |= (rqc->brst_size << CC_DSTBRSTSIZE_SHFT);
-
-        ccr |= (rqc->scctl << CC_SRCCCTRL_SHFT);
-        ccr |= (rqc->dcctl << CC_DSTCCTRL_SHFT);
-
-        ccr |= (rqc->swap << CC_SWAP_SHFT);
-
-        return ccr;
-}
-
-static inline bool _is_valid(u32 ccr)
-{
-        enum pl330_dstcachectrl dcctl;
-        enum pl330_srccachectrl scctl;
-
-        dcctl = (ccr >> CC_DSTCCTRL_SHFT) & CC_DRCCCTRL_MASK;
-        scctl = (ccr >> CC_SRCCCTRL_SHFT) & CC_SRCCCTRL_MASK;
-
-        if (dcctl == DINVALID1 || dcctl == DINVALID2
-                        || scctl == SINVALID1 || scctl == SINVALID2)
-                return false;
-        else
-                return true;
-}
-
-/*
- * Submit a list of xfers after which the client wants notification.
- * Client is not notified after each xfer unit, just once after all
- * xfer units are done or some error occurs.
- */
-int pl330_submit_req(void *ch_id, struct pl330_req *r)
-{
-        struct pl330_thread *thrd = ch_id;
-        struct pl330_dmac *pl330;
-        struct pl330_info *pi;
-        struct _xfer_spec xs;
-        unsigned long flags;
-        void __iomem *regs;
-        unsigned idx;
-        u32 ccr;
-        int ret = 0;
-
-        /* No Req or Unacquired Channel or DMAC */
-        if (!r || !thrd || thrd->free)
-                return -EINVAL;
-
-        pl330 = thrd->dmac;
-        pi = pl330->pinfo;
-        regs = pi->base;
-
-        if (pl330->state == DYING
-                || pl330->dmac_tbd.reset_chan & (1 << thrd->id)) {
-                dev_info(thrd->dmac->pinfo->dev, "%s:%d\n",
-                        __func__, __LINE__);
-                return -EAGAIN;
-        }
-
-        /* If request for non-existing peripheral */
-        if (r->rqtype != MEMTOMEM && r->peri >= pi->pcfg.num_peri) {
-                dev_info(thrd->dmac->pinfo->dev,
-                                "%s:%d Invalid peripheral(%u)!\n",
-                                __func__, __LINE__, r->peri);
-                return -EINVAL;
-        }
-
-        spin_lock_irqsave(&pl330->lock, flags);
-
-        if (_queue_full(thrd)) {
-                ret = -EAGAIN;
-                goto xfer_exit;
-        }
-
-        /* Prefer Secure Channel */
-        if (!_manager_ns(thrd))
-                r->cfg->nonsecure = 0;
-        else
-                r->cfg->nonsecure = 1;
-
-        /* Use last settings, if not provided */
-        if (r->cfg)
-                ccr = _prepare_ccr(r->cfg);
-        else
-                ccr = readl(regs + CC(thrd->id));
-
-        /* If this req doesn't have valid xfer settings */
-        if (!_is_valid(ccr)) {
-                ret = -EINVAL;
-                dev_info(thrd->dmac->pinfo->dev, "%s:%d Invalid CCR(%x)!\n",
-                        __func__, __LINE__, ccr);
-                goto xfer_exit;
-        }
-
-        idx = IS_FREE(&thrd->req[0]) ? 0 : 1;
-
-        xs.ccr = ccr;
-        xs.r = r;
-
-        /* First dry run to check if req is acceptable */
-        ret = _setup_req(1, thrd, idx, &xs);
-        if (ret < 0)
-                goto xfer_exit;
-
-        if (ret > pi->mcbufsz / 2) {
-                dev_info(thrd->dmac->pinfo->dev,
-                        "%s:%d Trying increasing mcbufsz\n",
-                                __func__, __LINE__);
-                ret = -ENOMEM;
-                goto xfer_exit;
-        }
-
-        /* Hook the request */
-        thrd->lstenq = idx;
-        thrd->req[idx].mc_len = _setup_req(0, thrd, idx, &xs);
-        thrd->req[idx].r = r;
-
-        ret = 0;
-
-xfer_exit:
-        spin_unlock_irqrestore(&pl330->lock, flags);
-
-        return ret;
-}
-EXPORT_SYMBOL(pl330_submit_req);
-
-static void pl330_dotask(unsigned long data)
-{
-        struct pl330_dmac *pl330 = (struct pl330_dmac *) data;
-        struct pl330_info *pi = pl330->pinfo;
-        unsigned long flags;
-        int i;
-
-        spin_lock_irqsave(&pl330->lock, flags);
-
-        /* The DMAC itself gone nuts */
-        if (pl330->dmac_tbd.reset_dmac) {
-                pl330->state = DYING;
-                /* Reset the manager too */
-                pl330->dmac_tbd.reset_mngr = true;
-                /* Clear the reset flag */
-                pl330->dmac_tbd.reset_dmac = false;
-        }
-
-        if (pl330->dmac_tbd.reset_mngr) {
-                _stop(pl330->manager);
-                /* Reset all channels */
-                pl330->dmac_tbd.reset_chan = (1 << pi->pcfg.num_chan) - 1;
-                /* Clear the reset flag */
-                pl330->dmac_tbd.reset_mngr = false;
-        }
-
-        for (i = 0; i < pi->pcfg.num_chan; i++) {
-
-                if (pl330->dmac_tbd.reset_chan & (1 << i)) {
-                        struct pl330_thread *thrd = &pl330->channels[i];
-                        void __iomem *regs = pi->base;
-                        enum pl330_op_err err;
-
-                        _stop(thrd);
-
-                        if (readl(regs + FSC) & (1 << thrd->id))
-                                err = PL330_ERR_FAIL;
-                        else
-                                err = PL330_ERR_ABORT;
-
-                        spin_unlock_irqrestore(&pl330->lock, flags);
-
-                        _callback(thrd->req[1 - thrd->lstenq].r, err);
-                        _callback(thrd->req[thrd->lstenq].r, err);
-
-                        spin_lock_irqsave(&pl330->lock, flags);
-
-                        thrd->req[0].r = NULL;
-                        thrd->req[1].r = NULL;
-                        mark_free(thrd, 0);
-                        mark_free(thrd, 1);
-
-                        /* Clear the reset flag */
-                        pl330->dmac_tbd.reset_chan &= ~(1 << i);
-                }
-        }
-
-        spin_unlock_irqrestore(&pl330->lock, flags);
-
-        return;
-}
-
-/* Returns 1 if state was updated, 0 otherwise */
-int pl330_update(const struct pl330_info *pi)
-{
-        struct _pl330_req *rqdone;
-        struct pl330_dmac *pl330;
-        unsigned long flags;
-        void __iomem *regs;
-        u32 val;
-        int id, ev, ret = 0;
-
-        if (!pi || !pi->pl330_data)
-                return 0;
-
-        regs = pi->base;
-        pl330 = pi->pl330_data;
-
-        spin_lock_irqsave(&pl330->lock, flags);
-
-        val = readl(regs + FSM) & 0x1;
-        if (val)
-                pl330->dmac_tbd.reset_mngr = true;
-        else
-                pl330->dmac_tbd.reset_mngr = false;
-
-        val = readl(regs + FSC) & ((1 << pi->pcfg.num_chan) - 1);
-        pl330->dmac_tbd.reset_chan |= val;
-        if (val) {
-                int i = 0;
-                while (i < pi->pcfg.num_chan) {
-                        if (val & (1 << i)) {
-                                dev_info(pi->dev,
-                                        "Reset Channel-%d\t CS-%x FTC-%x\n",
-                                                i, readl(regs + CS(i)),
-                                                readl(regs + FTC(i)));
-                                _stop(&pl330->channels[i]);
-                        }
-                        i++;
-                }
-        }
-
-        /* Check which event happened i.e, thread notified */
-        val = readl(regs + ES);
-        if (pi->pcfg.num_events < 32
-                        && val & ~((1 << pi->pcfg.num_events) - 1)) {
-                pl330->dmac_tbd.reset_dmac = true;
-                dev_err(pi->dev, "%s:%d Unexpected!\n", __func__, __LINE__);
-                ret = 1;
-                goto updt_exit;
-        }
-
-        for (ev = 0; ev < pi->pcfg.num_events; ev++) {
-                if (val & (1 << ev)) { /* Event occurred */
-                        struct pl330_thread *thrd;
-                        u32 inten = readl(regs + INTEN);
-                        int active;
-
-                        /* Clear the event */
-                        if (inten & (1 << ev))
-                                writel(1 << ev, regs + INTCLR);
-
-                        ret = 1;
-
-                        id = pl330->events[ev];
-
-                        thrd = &pl330->channels[id];
-
-                        active = thrd->req_running;
-                        if (active == -1) /* Aborted */
-                                continue;
-
-                        rqdone = &thrd->req[active];
-                        mark_free(thrd, active);
-
-                        /* Get going again ASAP */
-                        _start(thrd);
-
-                        /* For now, just make a list of callbacks to be done */
-                        list_add_tail(&rqdone->rqd, &pl330->req_done);
-                }
-        }
-
-        /* Now that we are in no hurry, do the callbacks */
-        while (!list_empty(&pl330->req_done)) {
-                struct pl330_req *r;
-
-                rqdone = container_of(pl330->req_done.next,
-                                        struct _pl330_req, rqd);
-
-                list_del_init(&rqdone->rqd);
-
-                /* Detach the req */
-                r = rqdone->r;
-                rqdone->r = NULL;
-
-                spin_unlock_irqrestore(&pl330->lock, flags);
-                _callback(r, PL330_ERR_NONE);
-                spin_lock_irqsave(&pl330->lock, flags);
-        }
-
-updt_exit:
-        spin_unlock_irqrestore(&pl330->lock, flags);
-
-        if (pl330->dmac_tbd.reset_dmac
-                        || pl330->dmac_tbd.reset_mngr
-                        || pl330->dmac_tbd.reset_chan) {
-                ret = 1;
-                tasklet_schedule(&pl330->tasks);
-        }
-
-        return ret;
-}
-EXPORT_SYMBOL(pl330_update);
-
-int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
-{
-        struct pl330_thread *thrd = ch_id;
-        struct pl330_dmac *pl330;
-        unsigned long flags;
-        int ret = 0, active;
-
-        if (!thrd || thrd->free || thrd->dmac->state == DYING)
-                return -EINVAL;
-
-        pl330 = thrd->dmac;
-        active = thrd->req_running;
-
-        spin_lock_irqsave(&pl330->lock, flags);
-
-        switch (op) {
-        case PL330_OP_FLUSH:
-                /* Make sure the channel is stopped */
-                _stop(thrd);
-
-                thrd->req[0].r = NULL;
-                thrd->req[1].r = NULL;
-                mark_free(thrd, 0);
-                mark_free(thrd, 1);
-                break;
-
-        case PL330_OP_ABORT:
-                /* Make sure the channel is stopped */
-                _stop(thrd);
-
-                /* ABORT is only for the active req */
-                if (active == -1)
-                        break;
-
-                thrd->req[active].r = NULL;
-                mark_free(thrd, active);
-
-                /* Start the next */
-        case PL330_OP_START:
-                if ((active == -1) && !_start(thrd))
-                        ret = -EIO;
-                break;
-
-        default:
-                ret = -EINVAL;
-        }
-
-        spin_unlock_irqrestore(&pl330->lock, flags);
-        return ret;
-}
-EXPORT_SYMBOL(pl330_chan_ctrl);
-
-int pl330_chan_status(void *ch_id, struct pl330_chanstatus *pstatus)
-{
-        struct pl330_thread *thrd = ch_id;
-        struct pl330_dmac *pl330;
-        struct pl330_info *pi;
-        void __iomem *regs;
-        int active;
-        u32 val;
-
-        if (!pstatus || !thrd || thrd->free)
-                return -EINVAL;
-
-        pl330 = thrd->dmac;
-        pi = pl330->pinfo;
-        regs = pi->base;
-
-        /* The client should remove the DMAC and add again */
-        if (pl330->state == DYING)
-                pstatus->dmac_halted = true;
-        else
-                pstatus->dmac_halted = false;
-
-        val = readl(regs + FSC);
-        if (val & (1 << thrd->id))
-                pstatus->faulting = true;
-        else
-                pstatus->faulting = false;
-
-        active = thrd->req_running;
-
-        if (active == -1) {
-                /* Indicate that the thread is not running */
-                pstatus->top_req = NULL;
-                pstatus->wait_req = NULL;
-        } else {
-                pstatus->top_req = thrd->req[active].r;
-                pstatus->wait_req = !IS_FREE(&thrd->req[1 - active])
-                                        ? thrd->req[1 - active].r : NULL;
-        }
-
-        pstatus->src_addr = readl(regs + SA(thrd->id));
-        pstatus->dst_addr = readl(regs + DA(thrd->id));
-
-        return 0;
-}
-EXPORT_SYMBOL(pl330_chan_status);
-
-/* Reserve an event */
-static inline int _alloc_event(struct pl330_thread *thrd)
-{
-        struct pl330_dmac *pl330 = thrd->dmac;
-        struct pl330_info *pi = pl330->pinfo;
-        int ev;
-
-        for (ev = 0; ev < pi->pcfg.num_events; ev++)
-                if (pl330->events[ev] == -1) {
-                        pl330->events[ev] = thrd->id;
-                        return ev;
-                }
-
-        return -1;
-}
-
-static bool _chan_ns(const struct pl330_info *pi, int i)
-{
-        return pi->pcfg.irq_ns & (1 << i);
-}
-
-/* Upon success, returns IdentityToken for the
- * allocated channel, NULL otherwise.
- */
-void *pl330_request_channel(const struct pl330_info *pi)
-{
-        struct pl330_thread *thrd = NULL;
-        struct pl330_dmac *pl330;
-        unsigned long flags;
-        int chans, i;
-
-        if (!pi || !pi->pl330_data)
-                return NULL;
-
-        pl330 = pi->pl330_data;
-
-        if (pl330->state == DYING)
-                return NULL;
-
-        chans = pi->pcfg.num_chan;
-
-        spin_lock_irqsave(&pl330->lock, flags);
-
-        for (i = 0; i < chans; i++) {
-                thrd = &pl330->channels[i];
-                if ((thrd->free) && (!_manager_ns(thrd) ||
-                                        _chan_ns(pi, i))) {
-                        thrd->ev = _alloc_event(thrd);
-                        if (thrd->ev >= 0) {
-                                thrd->free = false;
-                                thrd->lstenq = 1;
-                                thrd->req[0].r = NULL;
-                                mark_free(thrd, 0);
-                                thrd->req[1].r = NULL;
-                                mark_free(thrd, 1);
-                                break;
-                        }
-                }
-                thrd = NULL;
-        }
-
-        spin_unlock_irqrestore(&pl330->lock, flags);
-
-        return thrd;
-}
-EXPORT_SYMBOL(pl330_request_channel);
-
-/* Release an event */
-static inline void _free_event(struct pl330_thread *thrd, int ev)
-{
-        struct pl330_dmac *pl330 = thrd->dmac;
-        struct pl330_info *pi = pl330->pinfo;
-
-        /* If the event is valid and was held by the thread */
-        if (ev >= 0 && ev < pi->pcfg.num_events
-                        && pl330->events[ev] == thrd->id)
-                pl330->events[ev] = -1;
-}
-
-void pl330_release_channel(void *ch_id)
-{
-        struct pl330_thread *thrd = ch_id;
-        struct pl330_dmac *pl330;
-        unsigned long flags;
-
-        if (!thrd || thrd->free)
-                return;
-
-        _stop(thrd);
-
-        _callback(thrd->req[1 - thrd->lstenq].r, PL330_ERR_ABORT);
-        _callback(thrd->req[thrd->lstenq].r, PL330_ERR_ABORT);
-
-        pl330 = thrd->dmac;
-
-        spin_lock_irqsave(&pl330->lock, flags);
-        _free_event(thrd, thrd->ev);
-        thrd->free = true;
-        spin_unlock_irqrestore(&pl330->lock, flags);
-}
-EXPORT_SYMBOL(pl330_release_channel);
-
-/* Initialize the structure for PL330 configuration, that can be used
- * by the client driver the make best use of the DMAC
- */
-static void read_dmac_config(struct pl330_info *pi)
-{
-        void __iomem *regs = pi->base;
-        u32 val;
-
-        val = readl(regs + CRD) >> CRD_DATA_WIDTH_SHIFT;
-        val &= CRD_DATA_WIDTH_MASK;
-        pi->pcfg.data_bus_width = 8 * (1 << val);
-
-        val = readl(regs + CRD) >> CRD_DATA_BUFF_SHIFT;
-        val &= CRD_DATA_BUFF_MASK;
-        pi->pcfg.data_buf_dep = val + 1;
-
-        val = readl(regs + CR0) >> CR0_NUM_CHANS_SHIFT;
-        val &= CR0_NUM_CHANS_MASK;
-        val += 1;
-        pi->pcfg.num_chan = val;
-
-        val = readl(regs + CR0);
-        if (val & CR0_PERIPH_REQ_SET) {
-                val = (val >> CR0_NUM_PERIPH_SHIFT) & CR0_NUM_PERIPH_MASK;
-                val += 1;
-                pi->pcfg.num_peri = val;
-                pi->pcfg.peri_ns = readl(regs + CR4);
-        } else {
-                pi->pcfg.num_peri = 0;
-        }
-
-        val = readl(regs + CR0);
-        if (val & CR0_BOOT_MAN_NS)
-                pi->pcfg.mode |= DMAC_MODE_NS;
-        else
-                pi->pcfg.mode &= ~DMAC_MODE_NS;
-
-        val = readl(regs + CR0) >> CR0_NUM_EVENTS_SHIFT;
-        val &= CR0_NUM_EVENTS_MASK;
-        val += 1;
-        pi->pcfg.num_events = val;
-
-        pi->pcfg.irq_ns = readl(regs + CR3);
-
-        pi->pcfg.periph_id = get_id(pi, PERIPH_ID);
-        pi->pcfg.pcell_id = get_id(pi, PCELL_ID);
-}
-
-static inline void _reset_thread(struct pl330_thread *thrd)
-{
-        struct pl330_dmac *pl330 = thrd->dmac;
-        struct pl330_info *pi = pl330->pinfo;
-
-        thrd->req[0].mc_cpu = pl330->mcode_cpu
-                                + (thrd->id * pi->mcbufsz);
-        thrd->req[0].mc_bus = pl330->mcode_bus
-                                + (thrd->id * pi->mcbufsz);
-        thrd->req[0].r = NULL;
-        mark_free(thrd, 0);
-
-        thrd->req[1].mc_cpu = thrd->req[0].mc_cpu
-                                + pi->mcbufsz / 2;
-        thrd->req[1].mc_bus = thrd->req[0].mc_bus
-                                + pi->mcbufsz / 2;
-        thrd->req[1].r = NULL;
-        mark_free(thrd, 1);
-}
-
-static int dmac_alloc_threads(struct pl330_dmac *pl330)
-{
-        struct pl330_info *pi = pl330->pinfo;
-        int chans = pi->pcfg.num_chan;
-        struct pl330_thread *thrd;
-        int i;
-
-        /* Allocate 1 Manager and 'chans' Channel threads */
-        pl330->channels = kzalloc((1 + chans) * sizeof(*thrd),
-                                        GFP_KERNEL);
-        if (!pl330->channels)
-                return -ENOMEM;
-
-        /* Init Channel threads */
-        for (i = 0; i < chans; i++) {
-                thrd = &pl330->channels[i];
-                thrd->id = i;
-                thrd->dmac = pl330;
-                _reset_thread(thrd);
-                thrd->free = true;
-        }
-
-        /* MANAGER is indexed at the end */
-        thrd = &pl330->channels[chans];
-        thrd->id = chans;
-        thrd->dmac = pl330;
-        thrd->free = false;
-        pl330->manager = thrd;
-
-        return 0;
-}
-
-static int dmac_alloc_resources(struct pl330_dmac *pl330)
-{
-        struct pl330_info *pi = pl330->pinfo;
-        int chans = pi->pcfg.num_chan;
-        int ret;
-
-        /*
-         * Alloc MicroCode buffer for 'chans' Channel threads.
-         * A channel's buffer offset is (Channel_Id * MCODE_BUFF_PERCHAN)
-         */
-        pl330->mcode_cpu = dma_alloc_coherent(pi->dev,
-                                chans * pi->mcbufsz,
-                                &pl330->mcode_bus, GFP_KERNEL);
-        if (!pl330->mcode_cpu) {
-                dev_err(pi->dev, "%s:%d Can't allocate memory!\n",
-                        __func__, __LINE__);
-                return -ENOMEM;
-        }
-
-        ret = dmac_alloc_threads(pl330);
-        if (ret) {
-                dev_err(pi->dev, "%s:%d Can't to create channels for DMAC!\n",
-                        __func__, __LINE__);
-                dma_free_coherent(pi->dev,
-                                chans * pi->mcbufsz,
-                                pl330->mcode_cpu, pl330->mcode_bus);
-                return ret;
-        }
-
-        return 0;
-}
-
-int pl330_add(struct pl330_info *pi)
-{
-        struct pl330_dmac *pl330;
-        void __iomem *regs;
-        int i, ret;
-
-        if (!pi || !pi->dev)
-                return -EINVAL;
-
-        /* If already added */
-        if (pi->pl330_data)
-                return -EINVAL;
-
-        /*
-         * If the SoC can perform reset on the DMAC, then do it
-         * before reading its configuration.
-         */
-        if (pi->dmac_reset)
-                pi->dmac_reset(pi);
-
-        regs = pi->base;
-
-        /* Check if we can handle this DMAC */
-        if ((get_id(pi, PERIPH_ID) & 0xfffff) != PERIPH_ID_VAL
-           || get_id(pi, PCELL_ID) != PCELL_ID_VAL) {
-                dev_err(pi->dev, "PERIPH_ID 0x%x, PCELL_ID 0x%x !\n",
-                        get_id(pi, PERIPH_ID), get_id(pi, PCELL_ID));
-                return -EINVAL;
-        }
-
-        /* Read the configuration of the DMAC */
-        read_dmac_config(pi);
-
-        if (pi->pcfg.num_events == 0) {
-                dev_err(pi->dev, "%s:%d Can't work without events!\n",
-                        __func__, __LINE__);
-                return -EINVAL;
-        }
-
-        pl330 = kzalloc(sizeof(*pl330), GFP_KERNEL);
-        if (!pl330) {
-                dev_err(pi->dev, "%s:%d Can't allocate memory!\n",
-                        __func__, __LINE__);
-                return -ENOMEM;
-        }
-
-        /* Assign the info structure and private data */
-        pl330->pinfo = pi;
-        pi->pl330_data = pl330;
-
-        spin_lock_init(&pl330->lock);
-
-        INIT_LIST_HEAD(&pl330->req_done);
-
-        /* Use default MC buffer size if not provided */
-        if (!pi->mcbufsz)
-                pi->mcbufsz = MCODE_BUFF_PER_REQ * 2;
-
-        /* Mark all events as free */
-        for (i = 0; i < pi->pcfg.num_events; i++)
-                pl330->events[i] = -1;
-
-        /* Allocate resources needed by the DMAC */
-        ret = dmac_alloc_resources(pl330);
-        if (ret) {
-                dev_err(pi->dev, "Unable to create channels for DMAC\n");
-                kfree(pl330);
-                return ret;
-        }
-
-        tasklet_init(&pl330->tasks, pl330_dotask, (unsigned long) pl330);
-
-        pl330->state = INIT;
-
-        return 0;
-}
-EXPORT_SYMBOL(pl330_add);
-
-static int dmac_free_threads(struct pl330_dmac *pl330)
-{
-        struct pl330_info *pi = pl330->pinfo;
-        int chans = pi->pcfg.num_chan;
-        struct pl330_thread *thrd;
-        int i;
-
-        /* Release Channel threads */
-        for (i = 0; i < chans; i++) {
-                thrd = &pl330->channels[i];
-                pl330_release_channel((void *)thrd);
-        }
-
-        /* Free memory */
-        kfree(pl330->channels);
-
-        return 0;
-}
-
-static void dmac_free_resources(struct pl330_dmac *pl330)
-{
-        struct pl330_info *pi = pl330->pinfo;
-        int chans = pi->pcfg.num_chan;
-
-        dmac_free_threads(pl330);
-
-        dma_free_coherent(pi->dev, chans * pi->mcbufsz,
-                                pl330->mcode_cpu, pl330->mcode_bus);
-}
-
-void pl330_del(struct pl330_info *pi)
-{
-        struct pl330_dmac *pl330;
-
-        if (!pi || !pi->pl330_data)
-                return;
-
-        pl330 = pi->pl330_data;
-
-        pl330->state = UNINIT;
-
-        tasklet_kill(&pl330->tasks);
-
-        /* Free DMAC resources */
-        dmac_free_resources(pl330);
-
-        kfree(pl330);
-        pi->pl330_data = NULL;
-}
-EXPORT_SYMBOL(pl330_del);
diff --git a/arch/arm/configs/integrator_defconfig b/arch/arm/configs/integrator_defconfig
index 1103f62a1964..a8314c3ee84d 100644
--- a/arch/arm/configs/integrator_defconfig
+++ b/arch/arm/configs/integrator_defconfig
@@ -57,18 +57,24 @@ CONFIG_NETDEVICES=y
 CONFIG_NET_ETHERNET=y
 CONFIG_NET_PCI=y
 CONFIG_E100=y
+CONFIG_SMC91X=y
 # CONFIG_KEYBOARD_ATKBD is not set
 # CONFIG_SERIO_SERPORT is not set
 CONFIG_SERIAL_AMBA_PL010=y
 CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
 CONFIG_FB=y
 CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_ARMCLCD=y
 CONFIG_FB_MATROX=y
 CONFIG_FB_MATROX_MILLENIUM=y
 CONFIG_FB_MATROX_MYSTIQUE=y
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_MMC=y
+CONFIG_MMC_ARMMMCI=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_PL030=y
 CONFIG_EXT2_FS=y
+CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_CRAMFS=y
@@ -78,5 +84,7 @@ CONFIG_ROOT_NFS=y
 CONFIG_NFSD=y
 CONFIG_NFSD_V3=y
 CONFIG_PARTITION_ADVANCED=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_KERNEL=y
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 23371b17b23e..03fb93621d0d 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -23,6 +23,8 @@
 #include <asm/ptrace.h>
 #include <asm/domain.h>
 
+#define IOMEM(x)        (x)
+
 /*
  * Endian independent macros for shifting bytes within registers.
  */
diff --git a/arch/arm/include/asm/cpuidle.h b/arch/arm/include/asm/cpuidle.h
new file mode 100644
index 000000000000..2fca60ab513a
--- /dev/null
+++ b/arch/arm/include/asm/cpuidle.h
@@ -0,0 +1,29 @@
+#ifndef __ASM_ARM_CPUIDLE_H
+#define __ASM_ARM_CPUIDLE_H
+
+#ifdef CONFIG_CPU_IDLE
+extern int arm_cpuidle_simple_enter(struct cpuidle_device *dev,
+                struct cpuidle_driver *drv, int index);
+#else
+static inline int arm_cpuidle_simple_enter(struct cpuidle_device *dev,
+                struct cpuidle_driver *drv, int index) { return -ENODEV; }
+#endif
+
+/* Common ARM WFI state */
+#define ARM_CPUIDLE_WFI_STATE_PWR(p) {\
+        .enter                  = arm_cpuidle_simple_enter,\
+        .exit_latency           = 1,\
+        .target_residency       = 1,\
+        .power_usage            = p,\
+        .flags                  = CPUIDLE_FLAG_TIME_VALID,\
+        .name                   = "WFI",\
+        .desc                   = "ARM WFI",\
+}
+
+/*
+ * in case power_specified == 1, give a default WFI power value needed
+ * by some governors
+ */
+#define ARM_CPUIDLE_WFI_STATE ARM_CPUIDLE_WFI_STATE_PWR(UINT_MAX)
+
+#endif
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h
index 0e9ce8d9686e..38050b1c4800 100644
--- a/arch/arm/include/asm/elf.h
+++ b/arch/arm/include/asm/elf.h
@@ -130,8 +130,4 @@ struct mm_struct;
 extern unsigned long arch_randomize_brk(struct mm_struct *mm);
 #define arch_randomize_brk arch_randomize_brk
 
-extern int vectors_user_mapping(void);
-#define arch_setup_additional_pages(bprm, uses_interp) vectors_user_mapping()
-#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
-
 #endif
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index 7df239bcdf27..c4c87bc12231 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -103,11 +103,11 @@
 #define L2X0_ADDR_FILTER_EN             1
 
 #ifndef __ASSEMBLY__
-extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask);
+extern void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask);
 #if defined(CONFIG_CACHE_L2X0) && defined(CONFIG_OF)
-extern int l2x0_of_init(__u32 aux_val, __u32 aux_mask);
+extern int l2x0_of_init(u32 aux_val, u32 aux_mask);
 #else
-static inline int l2x0_of_init(__u32 aux_val, __u32 aux_mask)
+static inline int l2x0_of_init(u32 aux_val, u32 aux_mask)
 {
         return -ENODEV;
 }
diff --git a/arch/arm/include/asm/hardware/iop_adma.h b/arch/arm/include/asm/hardware/iop_adma.h
index 59b8c3892f76..122f86d8c991 100644
--- a/arch/arm/include/asm/hardware/iop_adma.h
+++ b/arch/arm/include/asm/hardware/iop_adma.h
@@ -49,7 +49,6 @@ struct iop_adma_device {
 /**
  * struct iop_adma_chan - internal representation of an ADMA device
  * @pending: allows batching of hardware operations
- * @completed_cookie: identifier for the most recently completed operation
  * @lock: serializes enqueue/dequeue operations to the slot pool
  * @mmr_base: memory mapped register base
  * @chain: device chain view of the descriptors
@@ -62,7 +61,6 @@ struct iop_adma_device {
  */
 struct iop_adma_chan {
         int pending;
-        dma_cookie_t completed_cookie;
         spinlock_t lock; /* protects the descriptor slot pool */
         void __iomem *mmr_base;
         struct list_head chain;
diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h
index 43cab498bc27..73f84fa4f366 100644
--- a/arch/arm/include/asm/hardware/it8152.h
+++ b/arch/arm/include/asm/hardware/it8152.h
@@ -9,6 +9,9 @@
 
 #ifndef __ASM_HARDWARE_IT8152_H
 #define __ASM_HARDWARE_IT8152_H
+
+#include <mach/irqs.h>
+
 extern void __iomem *it8152_base_address;
 
 #define IT8152_IO_BASE                  (it8152_base_address + 0x03e00000)
diff --git a/arch/arm/include/asm/hardware/pl330.h b/arch/arm/include/asm/hardware/pl330.h
deleted file mode 100644
index c1821385abfa..000000000000
--- a/arch/arm/include/asm/hardware/pl330.h
+++ /dev/null
@@ -1,217 +0,0 @@
-/* linux/include/asm/hardware/pl330.h
- *
- * Copyright (C) 2010 Samsung Electronics Co. Ltd.
- *      Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __PL330_CORE_H
-#define __PL330_CORE_H
-
-#define PL330_MAX_CHAN          8
-#define PL330_MAX_IRQS          32
-#define PL330_MAX_PERI          32
-
-enum pl330_srccachectrl {
-        SCCTRL0 = 0, /* Noncacheable and nonbufferable */
-        SCCTRL1, /* Bufferable only */
-        SCCTRL2, /* Cacheable, but do not allocate */
-        SCCTRL3, /* Cacheable and bufferable, but do not allocate */
-        SINVALID1,
-        SINVALID2,
-        SCCTRL6, /* Cacheable write-through, allocate on reads only */
-        SCCTRL7, /* Cacheable write-back, allocate on reads only */
-};
-
-enum pl330_dstcachectrl {
-        DCCTRL0 = 0, /* Noncacheable and nonbufferable */
-        DCCTRL1, /* Bufferable only */
-        DCCTRL2, /* Cacheable, but do not allocate */
-        DCCTRL3, /* Cacheable and bufferable, but do not allocate */
-        DINVALID1,              /* AWCACHE = 0x1000 */
-        DINVALID2,
-        DCCTRL6, /* Cacheable write-through, allocate on writes only */
-        DCCTRL7, /* Cacheable write-back, allocate on writes only */
-};
-
-/* Populated by the PL330 core driver for DMA API driver's info */
-struct pl330_config {
-        u32     periph_id;
-        u32     pcell_id;
-#define DMAC_MODE_NS    (1 << 0)
-        unsigned int    mode;
-        unsigned int    data_bus_width:10; /* In number of bits */
-        unsigned int    data_buf_dep:10;
-        unsigned int    num_chan:4;
-        unsigned int    num_peri:6;
-        u32             peri_ns;
-        unsigned int    num_events:6;
-        u32             irq_ns;
-};
-
-/* Handle to the DMAC provided to the PL330 core */
-struct pl330_info {
-        /* Owning device */
-        struct device *dev;
-        /* Size of MicroCode buffers for each channel. */
-        unsigned mcbufsz;
-        /* ioremap'ed address of PL330 registers. */
-        void __iomem    *base;
-        /* Client can freely use it. */
-        void    *client_data;
-        /* PL330 core data, Client must not touch it. */
-        void    *pl330_data;
-        /* Populated by the PL330 core driver during pl330_add */
-        struct pl330_config     pcfg;
-        /*
-         * If the DMAC has some reset mechanism, then the
-         * client may want to provide pointer to the method.
-         */
-        void (*dmac_reset)(struct pl330_info *pi);
-};
-
-enum pl330_byteswap {
-        SWAP_NO = 0,
-        SWAP_2,
-        SWAP_4,
-        SWAP_8,
-        SWAP_16,
-};
-
-/**
- * Request Configuration.
- * The PL330 core does not modify this and uses the last
- * working configuration if the request doesn't provide any.
- *
- * The Client may want to provide this info only for the
- * first request and a request with new settings.
- */
-struct pl330_reqcfg {
-        /* Address Incrementing */
-        unsigned dst_inc:1;
-        unsigned src_inc:1;
-
-        /*
-         * For now, the SRC & DST protection levels
-         * and burst size/length are assumed same.
-         */
-        bool nonsecure;
-        bool privileged;
-        bool insnaccess;
-        unsigned brst_len:5;
-        unsigned brst_size:3; /* in power of 2 */
-
-        enum pl330_dstcachectrl dcctl;
-        enum pl330_srccachectrl scctl;
-        enum pl330_byteswap swap;
-};
-
-/*
- * One cycle of DMAC operation.
- * There may be more than one xfer in a request.
- */
-struct pl330_xfer {
-        u32 src_addr;
-        u32 dst_addr;
-        /* Size to xfer */
-        u32 bytes;
-        /*
-         * Pointer to next xfer in the list.
-         * The last xfer in the req must point to NULL.
-         */
-        struct pl330_xfer *next;
-};
-
-/* The xfer callbacks are made with one of these arguments. */
-enum pl330_op_err {
-        /* The all xfers in the request were success. */
-        PL330_ERR_NONE,
-        /* If req aborted due to global error. */
-        PL330_ERR_ABORT,
-        /* If req failed due to problem with Channel. */
-        PL330_ERR_FAIL,
-};
-
-enum pl330_reqtype {
-        MEMTOMEM,
-        MEMTODEV,
-        DEVTOMEM,
-        DEVTODEV,
-};
-
-/* A request defining Scatter-Gather List ending with NULL xfer. */
-struct pl330_req {
-        enum pl330_reqtype rqtype;
-        /* Index of peripheral for the xfer. */
-        unsigned peri:5;
-        /* Unique token for this xfer, set by the client. */
-        void *token;
-        /* Callback to be called after xfer. */
-        void (*xfer_cb)(void *token, enum pl330_op_err err);
-        /* If NULL, req will be done at last set parameters. */
-        struct pl330_reqcfg *cfg;
-        /* Pointer to first xfer in the request. */
-        struct pl330_xfer *x;
-};
-
-/*
- * To know the status of the channel and DMAC, the client
- * provides a pointer to this structure. The PL330 core
- * fills it with current information.
- */
-struct pl330_chanstatus {
-        /*
-         * If the DMAC engine halted due to some error,
-         * the client should remove-add DMAC.
-         */
-        bool dmac_halted;
-        /*
-         * If channel is halted due to some error,
-         * the client should ABORT/FLUSH and START the channel.
-         */
-        bool faulting;
-        /* Location of last load */
-        u32 src_addr;
-        /* Location of last store */
-        u32 dst_addr;
-        /*
-         * Pointer to the currently active req, NULL if channel is
-         * inactive, even though the requests may be present.
-         */
-        struct pl330_req *top_req;
-        /* Pointer to req waiting second in the queue if any. */
-        struct pl330_req *wait_req;
-};
-
-enum pl330_chan_op {
-        /* Start the channel */
-        PL330_OP_START,
-        /* Abort the active xfer */
-        PL330_OP_ABORT,
-        /* Stop xfer and flush queue */
-        PL330_OP_FLUSH,
-};
-
-extern int pl330_add(struct pl330_info *);
-extern void pl330_del(struct pl330_info *pi);
-extern int pl330_update(const struct pl330_info *pi);
-extern void pl330_release_channel(void *ch_id);
-extern void *pl330_request_channel(const struct pl330_info *pi);
-extern int pl330_chan_status(void *ch_id, struct pl330_chanstatus *pstatus);
-extern int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op);
-extern int pl330_submit_req(void *ch_id, struct pl330_req *r);
-
-#endif  /* __PL330_CORE_H */
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index bae7eb6011d2..df0ac0bb39aa 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -82,6 +82,11 @@ extern void __iomem *__arm_ioremap_pfn(unsigned long, unsigned long, size_t, uns
 extern void __iomem *__arm_ioremap(unsigned long, size_t, unsigned int);
 extern void __iomem *__arm_ioremap_exec(unsigned long, size_t, bool cached);
 extern void __iounmap(volatile void __iomem *addr);
+extern void __arm_iounmap(volatile void __iomem *addr);
+
+extern void __iomem * (*arch_ioremap_caller)(unsigned long, size_t,
+        unsigned int, void *);
+extern void (*arch_iounmap)(volatile void __iomem *);
 
 /*
  * Bad read/write accesses...
@@ -96,6 +101,8 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
         return (void __iomem *)addr;
 }
 
+#define IOMEM(x)        ((void __force __iomem *)(x))
+
 /* IO barriers */
 #ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
 #include <asm/barrier.h>
@@ -109,7 +116,11 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
 /*
  * Now, pick up the machine-defined IO definitions
  */
+#ifdef CONFIG_NEED_MACH_IO_H
 #include <mach/io.h>
+#else
+#define __io(a)         ({ (void)(a); __typesafe_io(0); })
+#endif
 
 /*
  * This is the limit of PC card/PCI/ISA IO space, which is by default
@@ -211,18 +222,18 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
  * Again, this are defined to perform little endian accesses.  See the
  * IO port primitives for more information.
  */
-#ifdef __mem_pci
-#define readb_relaxed(c) ({ u8  __r = __raw_readb(__mem_pci(c)); __r; })
+#ifndef readl
+#define readb_relaxed(c) ({ u8  __r = __raw_readb(c); __r; })
 #define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \
-                                        __raw_readw(__mem_pci(c))); __r; })
+                                        __raw_readw(c)); __r; })
 #define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
-                                        __raw_readl(__mem_pci(c))); __r; })
+                                        __raw_readl(c)); __r; })
 
-#define writeb_relaxed(v,c)     ((void)__raw_writeb(v,__mem_pci(c)))
+#define writeb_relaxed(v,c)     ((void)__raw_writeb(v,c))
 #define writew_relaxed(v,c)     ((void)__raw_writew((__force u16) \
-                                        cpu_to_le16(v),__mem_pci(c)))
+                                        cpu_to_le16(v),c))
 #define writel_relaxed(v,c)     ((void)__raw_writel((__force u32) \
-                                        cpu_to_le32(v),__mem_pci(c)))
+                                        cpu_to_le32(v),c))
 
 #define readb(c)                ({ u8  __v = readb_relaxed(c); __iormb(); __v; })
 #define readw(c)                ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
@@ -232,30 +243,19 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
 #define writew(v,c)             ({ __iowmb(); writew_relaxed(v,c); })
 #define writel(v,c)             ({ __iowmb(); writel_relaxed(v,c); })
 
-#define readsb(p,d,l)           __raw_readsb(__mem_pci(p),d,l)
-#define readsw(p,d,l)           __raw_readsw(__mem_pci(p),d,l)
-#define readsl(p,d,l)           __raw_readsl(__mem_pci(p),d,l)
-
-#define writesb(p,d,l)          __raw_writesb(__mem_pci(p),d,l)
-#define writesw(p,d,l)          __raw_writesw(__mem_pci(p),d,l)
-#define writesl(p,d,l)          __raw_writesl(__mem_pci(p),d,l)
+#define readsb(p,d,l)           __raw_readsb(p,d,l)
+#define readsw(p,d,l)           __raw_readsw(p,d,l)
+#define readsl(p,d,l)           __raw_readsl(p,d,l)
 
-#define memset_io(c,v,l)        _memset_io(__mem_pci(c),(v),(l))
-#define memcpy_fromio(a,c,l)    _memcpy_fromio((a),__mem_pci(c),(l))
-#define memcpy_toio(c,a,l)      _memcpy_toio(__mem_pci(c),(a),(l))
+#define writesb(p,d,l)          __raw_writesb(p,d,l)
+#define writesw(p,d,l)          __raw_writesw(p,d,l)
+#define writesl(p,d,l)          __raw_writesl(p,d,l)
 
-#elif !defined(readb)
+#define memset_io(c,v,l)        _memset_io(c,(v),(l))
+#define memcpy_fromio(a,c,l)    _memcpy_fromio((a),c,(l))
+#define memcpy_toio(c,a,l)      _memcpy_toio(c,(a),(l))
 
-#define readb(c)                        (__readwrite_bug("readb"),0)
-#define readw(c)                        (__readwrite_bug("readw"),0)
-#define readl(c)                        (__readwrite_bug("readl"),0)
-#define writeb(v,c)                     __readwrite_bug("writeb")
-#define writew(v,c)                     __readwrite_bug("writew")
-#define writel(v,c)                     __readwrite_bug("writel")
-
-#define check_signature(io,sig,len)     (0)
-
-#endif  /* __mem_pci */
+#endif  /* readl */
 
 /*
  * ioremap and friends.
@@ -264,16 +264,11 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
  * Documentation/io-mapping.txt.
  *
  */
-#ifndef __arch_ioremap
-#define __arch_ioremap                  __arm_ioremap
-#define __arch_iounmap                  __iounmap
-#endif
-
-#define ioremap(cookie,size)            __arch_ioremap((cookie), (size), MT_DEVICE)
-#define ioremap_nocache(cookie,size)    __arch_ioremap((cookie), (size), MT_DEVICE)
-#define ioremap_cached(cookie,size)     __arch_ioremap((cookie), (size), MT_DEVICE_CACHED)
-#define ioremap_wc(cookie,size)         __arch_ioremap((cookie), (size), MT_DEVICE_WC)
-#define iounmap                         __arch_iounmap
+#define ioremap(cookie,size)            __arm_ioremap((cookie), (size), MT_DEVICE)
+#define ioremap_nocache(cookie,size)    __arm_ioremap((cookie), (size), MT_DEVICE)
+#define ioremap_cached(cookie,size)     __arm_ioremap((cookie), (size), MT_DEVICE_CACHED)
+#define ioremap_wc(cookie,size)         __arm_ioremap((cookie), (size), MT_DEVICE_WC)
+#define iounmap                         __arm_iounmap
 
 /*
  * io{read,write}{8,16,32} macros
diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h
index 5a526afb5f18..35c21c375d81 100644
--- a/arch/arm/include/asm/irq.h
+++ b/arch/arm/include/asm/irq.h
@@ -1,14 +1,18 @@
 #ifndef __ASM_ARM_IRQ_H
 #define __ASM_ARM_IRQ_H
 
+#define NR_IRQS_LEGACY  16
+
+#ifndef CONFIG_SPARSE_IRQ
 #include <mach/irqs.h>
+#else
+#define NR_IRQS NR_IRQS_LEGACY
+#endif
 
 #ifndef irq_canonicalize
 #define irq_canonicalize(i)     (i)
 #endif
 
-#define NR_IRQS_LEGACY  16
-
 /*
  * Use this value to indicate lack of interrupt
  * capability
diff --git a/arch/arm/include/asm/jump_label.h b/arch/arm/include/asm/jump_label.h
new file mode 100644
index 000000000000..5c5ca2ea62b0
--- /dev/null
+++ b/arch/arm/include/asm/jump_label.h
@@ -0,0 +1,41 @@
+#ifndef _ASM_ARM_JUMP_LABEL_H
+#define _ASM_ARM_JUMP_LABEL_H
+
+#ifdef __KERNEL__
+
+#include <linux/types.h>
+#include <asm/system.h>
+
+#define JUMP_LABEL_NOP_SIZE 4
+
+#ifdef CONFIG_THUMB2_KERNEL
+#define JUMP_LABEL_NOP  "nop.w"
+#else
+#define JUMP_LABEL_NOP  "nop"
+#endif
+
+static __always_inline bool arch_static_branch(struct jump_label_key *key)
+{
+        asm goto("1:\n\t"
+                 JUMP_LABEL_NOP "\n\t"
+                 ".pushsection __jump_table,  \"aw\"\n\t"
+                 ".word 1b, %l[l_yes], %c0\n\t"
+                 ".popsection\n\t"
+                 : :  "i" (key) :  : l_yes);
+
+        return false;
+l_yes:
+        return true;
+}
+
+#endif /* __KERNEL__ */
+
+typedef u32 jump_label_t;
+
+struct jump_entry {
+        jump_label_t code;
+        jump_label_t target;
+        jump_label_t key;
+};
+
+#endif
diff --git a/arch/arm/include/asm/mc146818rtc.h b/arch/arm/include/asm/mc146818rtc.h
index 6b884d2b0b69..e8567bb99dfc 100644
--- a/arch/arm/include/asm/mc146818rtc.h
+++ b/arch/arm/include/asm/mc146818rtc.h
@@ -5,7 +5,9 @@
 #define _ASM_MC146818RTC_H
 
 #include <linux/io.h>
-#include <mach/irqs.h>
+#include <linux/kernel.h>
+
+#define RTC_IRQ BUILD_BUG_ON(1)
 
 #ifndef RTC_PORT
 #define RTC_PORT(x)     (0x70 + (x))
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index a8997d71084e..fcb575747e5e 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -116,6 +116,8 @@
 #define MODULES_END             (END_MEM)
 #define MODULES_VADDR           (PHYS_OFFSET)
 
+#define XIP_VIRT_ADDR(physaddr)  (physaddr)
+
 #endif /* !CONFIG_MMU */
 
 /*
diff --git a/arch/arm/include/asm/mmu_context.h b/arch/arm/include/asm/mmu_context.h
index 71605d9f8e42..a0b3cac0547c 100644
--- a/arch/arm/include/asm/mmu_context.h
+++ b/arch/arm/include/asm/mmu_context.h
@@ -18,6 +18,7 @@
 #include <asm/cacheflush.h>
 #include <asm/cachetype.h>
 #include <asm/proc-fns.h>
+#include <asm-generic/mm_hooks.h>
 
 void __check_kvm_seq(struct mm_struct *mm);
 
@@ -133,32 +134,4 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
 #define deactivate_mm(tsk,mm)   do { } while (0)
 #define activate_mm(prev,next)  switch_mm(prev, next, NULL)
 
-/*
- * We are inserting a "fake" vma for the user-accessible vector page so
- * gdb and friends can get to it through ptrace and /proc/<pid>/mem.
- * But we also want to remove it before the generic code gets to see it
- * during process exit or the unmapping of it would  cause total havoc.
- * (the macro is used as remove_vma() is static to mm/mmap.c)
- */
-#define arch_exit_mmap(mm) \
-do { \
-        struct vm_area_struct *high_vma = find_vma(mm, 0xffff0000); \
-        if (high_vma) { \
-                BUG_ON(high_vma->vm_next);  /* it should be last */ \
-                if (high_vma->vm_prev) \
-                        high_vma->vm_prev->vm_next = NULL; \
-                else \
-                        mm->mmap = NULL; \
-                rb_erase(&high_vma->vm_rb, &mm->mm_rb); \
-                mm->mmap_cache = NULL; \
-                mm->map_count--; \
-                remove_vma(high_vma); \
-        } \
-} while (0)
-
-static inline void arch_dup_mmap(struct mm_struct *oldmm,
-                                 struct mm_struct *mm)
-{
-}
-
 #endif
diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h
index c0efdd60966f..19c48deda70f 100644
--- a/arch/arm/include/asm/opcodes.h
+++ b/arch/arm/include/asm/opcodes.h
@@ -17,4 +17,63 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
 #define ARM_OPCODE_CONDTEST_PASS   1
 #define ARM_OPCODE_CONDTEST_UNCOND 2
 
+
+/*
+ * Opcode byteswap helpers
+ *
+ * These macros help with converting instructions between a canonical integer
+ * format and in-memory representation, in an endianness-agnostic manner.
+ *
+ * __mem_to_opcode_*() convert from in-memory representation to canonical form.
+ * __opcode_to_mem_*() convert from canonical form to in-memory representation.
+ *
+ *
+ * Canonical instruction representation:
+ *
+ *      ARM:            0xKKLLMMNN
+ *      Thumb 16-bit:   0x0000KKLL, where KK < 0xE8
+ *      Thumb 32-bit:   0xKKLLMMNN, where KK >= 0xE8
+ *
+ * There is no way to distinguish an ARM instruction in canonical representation
+ * from a Thumb instruction (just as these cannot be distinguished in memory).
+ * Where this distinction is important, it needs to be tracked separately.
+ *
+ * Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not
+ * represent any valid Thumb-2 instruction.  For this range,
+ * __opcode_is_thumb32() and __opcode_is_thumb16() will both be false.
+ */
+
+#ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+#include <linux/swab.h>
+
+#ifdef CONFIG_CPU_ENDIAN_BE8
+#define __opcode_to_mem_arm(x) swab32(x)
+#define __opcode_to_mem_thumb16(x) swab16(x)
+#define __opcode_to_mem_thumb32(x) swahb32(x)
+#else
+#define __opcode_to_mem_arm(x) ((u32)(x))
+#define __opcode_to_mem_thumb16(x) ((u16)(x))
+#define __opcode_to_mem_thumb32(x) swahw32(x)
+#endif
+
+#define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x)
+#define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x)
+#define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x)
+
+/* Operations specific to Thumb opcodes */
+
+/* Instruction size checks: */
+#define __opcode_is_thumb32(x) ((u32)(x) >= 0xE8000000UL)
+#define __opcode_is_thumb16(x) ((u32)(x) < 0xE800UL)
+
+/* Operations to construct or split 32-bit Thumb instructions: */
+#define __opcode_thumb32_first(x) ((u16)((x) >> 16))
+#define __opcode_thumb32_second(x) ((u16)(x))
+#define __opcode_thumb32_compose(first, second) \
+        (((u32)(u16)(first) << 16) | (u32)(u16)(second))
+
+#endif /* __ASSEMBLY__ */
+
 #endif /* __ASM_ARM_OPCODES_H */
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
index 97b440c25c58..5838361c48b3 100644
--- a/arch/arm/include/asm/page.h
+++ b/arch/arm/include/asm/page.h
@@ -151,6 +151,8 @@ extern void __cpu_copy_user_highpage(struct page *to, struct page *from,
 #define clear_page(page)        memset((void *)(page), 0, PAGE_SIZE)
 extern void copy_page(void *to, const void *from);
 
+#define __HAVE_ARCH_GATE_AREA 1
+
 #ifdef CONFIG_ARM_LPAE
 #include <asm/pgtable-3level-types.h>
 #else
diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h
index 7523340afb8a..00cbe10a50e3 100644
--- a/arch/arm/include/asm/perf_event.h
+++ b/arch/arm/include/asm/perf_event.h
@@ -22,6 +22,7 @@ enum arm_perf_pmu_ids {
         ARM_PERF_PMU_ID_CA9,
         ARM_PERF_PMU_ID_CA5,
         ARM_PERF_PMU_ID_CA15,
+        ARM_PERF_PMU_ID_CA7,
         ARM_NUM_PMU_IDS,
 };
 
diff --git a/arch/arm/include/asm/posix_types.h b/arch/arm/include/asm/posix_types.h
index 2446d23bfdbf..efdf99045d87 100644
--- a/arch/arm/include/asm/posix_types.h
+++ b/arch/arm/include/asm/posix_types.h
@@ -19,59 +19,22 @@
  * assume GCC is being used.
  */
 
-typedef unsigned long           __kernel_ino_t;
 typedef unsigned short          __kernel_mode_t;
+#define __kernel_mode_t __kernel_mode_t
+
 typedef unsigned short          __kernel_nlink_t;
-typedef long                    __kernel_off_t;
-typedef int                     __kernel_pid_t;
+#define __kernel_nlink_t __kernel_nlink_t
+
 typedef unsigned short          __kernel_ipc_pid_t;
+#define __kernel_ipc_pid_t __kernel_ipc_pid_t
+
 typedef unsigned short          __kernel_uid_t;
 typedef unsigned short          __kernel_gid_t;
-typedef unsigned int            __kernel_size_t;
-typedef int                     __kernel_ssize_t;
-typedef int                     __kernel_ptrdiff_t;
-typedef long                    __kernel_time_t;
-typedef long                    __kernel_suseconds_t;
-typedef long                    __kernel_clock_t;
-typedef int                     __kernel_timer_t;
-typedef int                     __kernel_clockid_t;
-typedef int                     __kernel_daddr_t;
-typedef char *                  __kernel_caddr_t;
-typedef unsigned short          __kernel_uid16_t;
-typedef unsigned short          __kernel_gid16_t;
-typedef unsigned int            __kernel_uid32_t;
-typedef unsigned int            __kernel_gid32_t;
+#define __kernel_uid_t __kernel_uid_t
 
-typedef unsigned short          __kernel_old_uid_t;
-typedef unsigned short          __kernel_old_gid_t;
 typedef unsigned short          __kernel_old_dev_t;
+#define __kernel_old_dev_t __kernel_old_dev_t
 
-#ifdef __GNUC__
-typedef long long               __kernel_loff_t;
-#endif
-
-typedef struct {
-        int     val[2];
-} __kernel_fsid_t;
-
-#if defined(__KERNEL__)
-
-#undef  __FD_SET
-#define __FD_SET(fd, fdsetp) \
-                (((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] |= (1<<((fd) & 31)))
-
-#undef  __FD_CLR
-#define __FD_CLR(fd, fdsetp) \
-                (((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] &= ~(1<<((fd) & 31)))
-
-#undef  __FD_ISSET
-#define __FD_ISSET(fd, fdsetp) \
-                ((((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] & (1<<((fd) & 31))) != 0)
-
-#undef  __FD_ZERO
-#define __FD_ZERO(fdsetp) \
-                (memset (fdsetp, 0, sizeof (*(fd_set *)(fdsetp))))
-
-#endif
+#include <asm-generic/posix_types.h>
 
 #endif
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index f4d7f56ee51f..5ac8d3d3e025 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -55,7 +55,6 @@ struct thread_struct {
 #define start_thread(regs,pc,sp)                                        \
 ({                                                                      \
         unsigned long *stack = (unsigned long *)sp;                     \
-        set_fs(USER_DS);                                                \
         memset(regs->uregs, 0, sizeof(regs->uregs));                    \
         if (current->personality & ADDR_LIMIT_32BIT)                    \
                 regs->ARM_cpsr = USR_MODE;                              \
diff --git a/arch/arm/include/asm/prom.h b/arch/arm/include/asm/prom.h
index ee0363307918..aeae9c609df4 100644
--- a/arch/arm/include/asm/prom.h
+++ b/arch/arm/include/asm/prom.h
@@ -13,8 +13,6 @@
 
 #ifdef CONFIG_OF
 
-#include <asm/irq.h>
-
 extern struct machine_desc *setup_machine_fdt(unsigned int dt_phys);
 extern void arm_dt_memblock_reserve(void);
 
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index 02b2f8203982..85fe61e73202 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -318,6 +318,21 @@ extern struct cpu_tlb_fns cpu_tlb;
 
 #define tlb_flag(f)     ((always_tlb_flags & (f)) || (__tlb_flag & possible_tlb_flags & (f)))
 
+#define __tlb_op(f, insnarg, arg)                                       \
+        do {                                                            \
+                if (always_tlb_flags & (f))                             \
+                        asm("mcr " insnarg                              \
+                            : : "r" (arg) : "cc");                      \
+                else if (possible_tlb_flags & (f))                      \
+                        asm("tst %1, %2\n\t"                            \
+                            "mcrne " insnarg                            \
+                            : : "r" (arg), "r" (__tlb_flag), "Ir" (f)   \
+                            : "cc");                                    \
+        } while (0)
+
+#define tlb_op(f, regs, arg)    __tlb_op(f, "p15, 0, %0, " regs, arg)
+#define tlb_l2_op(f, regs, arg) __tlb_op(f, "p15, 1, %0, " regs, arg)
+
 static inline void local_flush_tlb_all(void)
 {
         const int zero = 0;
@@ -326,16 +341,11 @@ static inline void local_flush_tlb_all(void)
         if (tlb_flag(TLB_WB))
                 dsb();
 
-        if (tlb_flag(TLB_V3_FULL))
-                asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero) : "cc");
-        if (tlb_flag(TLB_V4_U_FULL | TLB_V6_U_FULL))
-                asm("mcr p15, 0, %0, c8, c7, 0" : : "r" (zero) : "cc");
-        if (tlb_flag(TLB_V4_D_FULL | TLB_V6_D_FULL))
-                asm("mcr p15, 0, %0, c8, c6, 0" : : "r" (zero) : "cc");
-        if (tlb_flag(TLB_V4_I_FULL | TLB_V6_I_FULL))
-                asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
-        if (tlb_flag(TLB_V7_UIS_FULL))
-                asm("mcr p15, 0, %0, c8, c3, 0" : : "r" (zero) : "cc");
+        tlb_op(TLB_V3_FULL, "c6, c0, 0", zero);
+        tlb_op(TLB_V4_U_FULL | TLB_V6_U_FULL, "c8, c7, 0", zero);
+        tlb_op(TLB_V4_D_FULL | TLB_V6_D_FULL, "c8, c6, 0", zero);
+        tlb_op(TLB_V4_I_FULL | TLB_V6_I_FULL, "c8, c5, 0", zero);
+        tlb_op(TLB_V7_UIS_FULL, "c8, c3, 0", zero);
 
         if (tlb_flag(TLB_BARRIER)) {
                 dsb();
@@ -352,29 +362,23 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
         if (tlb_flag(TLB_WB))
                 dsb();
 
-        if (cpumask_test_cpu(get_cpu(), mm_cpumask(mm))) {
-                if (tlb_flag(TLB_V3_FULL))
-                        asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero) : "cc");
-                if (tlb_flag(TLB_V4_U_FULL))
-                        asm("mcr p15, 0, %0, c8, c7, 0" : : "r" (zero) : "cc");
-                if (tlb_flag(TLB_V4_D_FULL))
-                        asm("mcr p15, 0, %0, c8, c6, 0" : : "r" (zero) : "cc");
-                if (tlb_flag(TLB_V4_I_FULL))
-                        asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
+        if (possible_tlb_flags & (TLB_V3_FULL|TLB_V4_U_FULL|TLB_V4_D_FULL|TLB_V4_I_FULL)) {
+                if (cpumask_test_cpu(get_cpu(), mm_cpumask(mm))) {
+                        tlb_op(TLB_V3_FULL, "c6, c0, 0", zero);
+                        tlb_op(TLB_V4_U_FULL, "c8, c7, 0", zero);
+                        tlb_op(TLB_V4_D_FULL, "c8, c6, 0", zero);
+                        tlb_op(TLB_V4_I_FULL, "c8, c5, 0", zero);
+                }
+                put_cpu();
         }
-        put_cpu();
-
-        if (tlb_flag(TLB_V6_U_ASID))
-                asm("mcr p15, 0, %0, c8, c7, 2" : : "r" (asid) : "cc");
-        if (tlb_flag(TLB_V6_D_ASID))
-                asm("mcr p15, 0, %0, c8, c6, 2" : : "r" (asid) : "cc");
-        if (tlb_flag(TLB_V6_I_ASID))
-                asm("mcr p15, 0, %0, c8, c5, 2" : : "r" (asid) : "cc");
-        if (tlb_flag(TLB_V7_UIS_ASID))
+
+        tlb_op(TLB_V6_U_ASID, "c8, c7, 2", asid);
+        tlb_op(TLB_V6_D_ASID, "c8, c6, 2", asid);
+        tlb_op(TLB_V6_I_ASID, "c8, c5, 2", asid);
 #ifdef CONFIG_ARM_ERRATA_720789
-                asm("mcr p15, 0, %0, c8, c3, 0" : : "r" (zero) : "cc");
+        tlb_op(TLB_V7_UIS_ASID, "c8, c3, 0", zero);
 #else
-                asm("mcr p15, 0, %0, c8, c3, 2" : : "r" (asid) : "cc");
+        tlb_op(TLB_V7_UIS_ASID, "c8, c3, 2", asid);
 #endif
 
         if (tlb_flag(TLB_BARRIER))
@@ -392,30 +396,23 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
         if (tlb_flag(TLB_WB))
                 dsb();
 
-        if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
-                if (tlb_flag(TLB_V3_PAGE))
-                        asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (uaddr) : "cc");
-                if (tlb_flag(TLB_V4_U_PAGE))
-                        asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (uaddr) : "cc");
-                if (tlb_flag(TLB_V4_D_PAGE))
-                        asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (uaddr) : "cc");
-                if (tlb_flag(TLB_V4_I_PAGE))
-                        asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr) : "cc");
+        if (possible_tlb_flags & (TLB_V3_PAGE|TLB_V4_U_PAGE|TLB_V4_D_PAGE|TLB_V4_I_PAGE|TLB_V4_I_FULL) &&
+            cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
+                tlb_op(TLB_V3_PAGE, "c6, c0, 0", uaddr);
+                tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", uaddr);
+                tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", uaddr);
+                tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", uaddr);
                 if (!tlb_flag(TLB_V4_I_PAGE) && tlb_flag(TLB_V4_I_FULL))
                         asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
         }
 
-        if (tlb_flag(TLB_V6_U_PAGE))
-                asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (uaddr) : "cc");
-        if (tlb_flag(TLB_V6_D_PAGE))
-                asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (uaddr) : "cc");
-        if (tlb_flag(TLB_V6_I_PAGE))
-                asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr) : "cc");
-        if (tlb_flag(TLB_V7_UIS_PAGE))
+        tlb_op(TLB_V6_U_PAGE, "c8, c7, 1", uaddr);
+        tlb_op(TLB_V6_D_PAGE, "c8, c6, 1", uaddr);
+        tlb_op(TLB_V6_I_PAGE, "c8, c5, 1", uaddr);
 #ifdef CONFIG_ARM_ERRATA_720789
-                asm("mcr p15, 0, %0, c8, c3, 3" : : "r" (uaddr & PAGE_MASK) : "cc");
+        tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 3", uaddr & PAGE_MASK);
 #else
-                asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (uaddr) : "cc");
+        tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 1", uaddr);
 #endif
 
         if (tlb_flag(TLB_BARRIER))
@@ -432,25 +429,17 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
         if (tlb_flag(TLB_WB))
                 dsb();
 
-        if (tlb_flag(TLB_V3_PAGE))
-                asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (kaddr) : "cc");
-        if (tlb_flag(TLB_V4_U_PAGE))
-                asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (kaddr) : "cc");
-        if (tlb_flag(TLB_V4_D_PAGE))
-                asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (kaddr) : "cc");
-        if (tlb_flag(TLB_V4_I_PAGE))
-                asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (kaddr) : "cc");
+        tlb_op(TLB_V3_PAGE, "c6, c0, 0", kaddr);
+        tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", kaddr);
+        tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", kaddr);
+        tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", kaddr);
         if (!tlb_flag(TLB_V4_I_PAGE) && tlb_flag(TLB_V4_I_FULL))
                 asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
 
-        if (tlb_flag(TLB_V6_U_PAGE))
-                asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (kaddr) : "cc");
-        if (tlb_flag(TLB_V6_D_PAGE))
-                asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (kaddr) : "cc");
-        if (tlb_flag(TLB_V6_I_PAGE))
-                asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (kaddr) : "cc");
-        if (tlb_flag(TLB_V7_UIS_PAGE))
-                asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (kaddr) : "cc");
+        tlb_op(TLB_V6_U_PAGE, "c8, c7, 1", kaddr);
+        tlb_op(TLB_V6_D_PAGE, "c8, c6, 1", kaddr);
+        tlb_op(TLB_V6_I_PAGE, "c8, c5, 1", kaddr);
+        tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 1", kaddr);
 
         if (tlb_flag(TLB_BARRIER)) {
                 dsb();
@@ -475,13 +464,8 @@ static inline void flush_pmd_entry(void *pmd)
 {
         const unsigned int __tlb_flag = __cpu_tlb_flags;
 
-        if (tlb_flag(TLB_DCLEAN))
-                asm("mcr        p15, 0, %0, c7, c10, 1  @ flush_pmd"
-                        : : "r" (pmd) : "cc");
-
-        if (tlb_flag(TLB_L2CLEAN_FR))
-                asm("mcr        p15, 1, %0, c15, c9, 1  @ L2 flush_pmd"
-                        : : "r" (pmd) : "cc");
+        tlb_op(TLB_DCLEAN, "c7, c10, 1  @ flush_pmd", pmd);
+        tlb_l2_op(TLB_L2CLEAN_FR, "c15, c9, 1  @ L2 flush_pmd", pmd);
 
         if (tlb_flag(TLB_WB))
                 dsb();
@@ -491,15 +475,11 @@ static inline void clean_pmd_entry(void *pmd)
 {
         const unsigned int __tlb_flag = __cpu_tlb_flags;
 
-        if (tlb_flag(TLB_DCLEAN))
-                asm("mcr        p15, 0, %0, c7, c10, 1  @ flush_pmd"
-                        : : "r" (pmd) : "cc");
-
-        if (tlb_flag(TLB_L2CLEAN_FR))
-                asm("mcr        p15, 1, %0, c15, c9, 1  @ L2 flush_pmd"
-                        : : "r" (pmd) : "cc");
+        tlb_op(TLB_DCLEAN, "c7, c10, 1  @ flush_pmd", pmd);
+        tlb_l2_op(TLB_L2CLEAN_FR, "c15, c9, 1  @ L2 flush_pmd", pmd);
 }
 
+#undef tlb_op
 #undef tlb_flag
 #undef always_tlb_flags
 #undef possible_tlb_flags
diff --git a/arch/arm/include/asm/traps.h b/arch/arm/include/asm/traps.h
index 5b29a6673625..f555bb3664dc 100644
--- a/arch/arm/include/asm/traps.h
+++ b/arch/arm/include/asm/traps.h
@@ -46,7 +46,7 @@ static inline int in_exception_text(unsigned long ptr)
         return in ? : __in_irqentry_text(ptr);
 }
 
-extern void __init early_trap_init(void);
+extern void __init early_trap_init(void *);
 extern void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame);
 extern void ptrace_break(struct task_struct *tsk, struct pt_regs *regs);
 
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 3a274878412e..7b787d642af4 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -7,6 +7,8 @@ AFLAGS_head.o        := -DTEXT_OFFSET=$(TEXT_OFFSET)
 
 ifdef CONFIG_FUNCTION_TRACER
 CFLAGS_REMOVE_ftrace.o = -pg
+CFLAGS_REMOVE_insn.o = -pg
+CFLAGS_REMOVE_patch.o = -pg
 endif
 
 CFLAGS_REMOVE_return_address.o = -pg
@@ -14,14 +16,14 @@ CFLAGS_REMOVE_return_address.o = -pg
 # Object file lists.
 
 obj-y           := elf.o entry-armv.o entry-common.o irq.o opcodes.o \
-                   process.o ptrace.o return_address.o setup.o signal.o \
-                   sys_arm.o stacktrace.o time.o traps.o
+                   process.o ptrace.o return_address.o sched_clock.o \
+                   setup.o signal.o stacktrace.o sys_arm.o time.o traps.o
 
 obj-$(CONFIG_DEPRECATED_PARAM_STRUCT) += compat.o
 
 obj-$(CONFIG_LEDS)              += leds.o
 obj-$(CONFIG_OC_ETM)            += etm.o
-
+obj-$(CONFIG_CPU_IDLE)          += cpuidle.o
 obj-$(CONFIG_ISA_DMA_API)       += dma.o
 obj-$(CONFIG_FIQ)               += fiq.o fiqasm.o
 obj-$(CONFIG_MODULES)           += armksyms.o module.o
@@ -29,14 +31,14 @@ obj-$(CONFIG_ARTHUR)		+= arthur.o
 obj-$(CONFIG_ISA_DMA)           += dma-isa.o
 obj-$(CONFIG_PCI)               += bios32.o isa.o
 obj-$(CONFIG_ARM_CPU_SUSPEND)   += sleep.o suspend.o
-obj-$(CONFIG_HAVE_SCHED_CLOCK)  += sched_clock.o
 obj-$(CONFIG_SMP)               += smp.o smp_tlb.o
 obj-$(CONFIG_HAVE_ARM_SCU)      += smp_scu.o
 obj-$(CONFIG_HAVE_ARM_TWD)      += smp_twd.o
-obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o
-obj-$(CONFIG_FUNCTION_GRAPH_TRACER)     += ftrace.o
+obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o insn.o
+obj-$(CONFIG_FUNCTION_GRAPH_TRACER)     += ftrace.o insn.o
+obj-$(CONFIG_JUMP_LABEL)        += jump_label.o insn.o patch.o
 obj-$(CONFIG_KEXEC)             += machine_kexec.o relocate_kernel.o
-obj-$(CONFIG_KPROBES)           += kprobes.o kprobes-common.o
+obj-$(CONFIG_KPROBES)           += kprobes.o kprobes-common.o patch.o
 ifdef CONFIG_THUMB2_KERNEL
 obj-$(CONFIG_KPROBES)           += kprobes-thumb.o
 else
diff --git a/arch/arm/kernel/cpuidle.c b/arch/arm/kernel/cpuidle.c
new file mode 100644
index 000000000000..89545f6c8403
--- /dev/null
+++ b/arch/arm/kernel/cpuidle.c
@@ -0,0 +1,21 @@
+/*
+ * Copyright 2012 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/cpuidle.h>
+#include <asm/proc-fns.h>
+
+int arm_cpuidle_simple_enter(struct cpuidle_device *dev,
+                struct cpuidle_driver *drv, int index)
+{
+        cpu_do_idle();
+
+        return index;
+}
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index 204e2160cfcc..c45522c36787 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -10,6 +10,7 @@
  *  32-bit debugging code
  */
 #include <linux/linkage.h>
+#include <asm/assembler.h>
 
                 .text
 
@@ -100,7 +101,7 @@
 
 #endif  /* CONFIG_CPU_V6 */
 
-#else
+#elif !defined(CONFIG_DEBUG_SEMIHOSTING)
 #include <mach/debug-macro.S>
 #endif  /* CONFIG_DEBUG_ICEDCC */
 
@@ -155,6 +156,8 @@ hexbuf:		.space 16
 
                 .ltorg
 
+#ifndef CONFIG_DEBUG_SEMIHOSTING
+
 ENTRY(printascii)
                 addruart_current r3, r1, r2
                 b       2f
@@ -177,3 +180,24 @@ ENTRY(printch)
                 mov     r0, #0
                 b       1b
 ENDPROC(printch)
+
+#else
+
+ENTRY(printascii)
+                mov     r1, r0
+                mov     r0, #0x04               @ SYS_WRITE0
+        ARM(    svc     #0x123456       )
+        THUMB(  svc     #0xab           )
+                mov     pc, lr
+ENDPROC(printascii)
+
+ENTRY(printch)
+                adr     r1, hexbuf
+                strb    r0, [r1]
+                mov     r0, #0x03               @ SYS_WRITEC
+        ARM(    svc     #0x123456       )
+        THUMB(  svc     #0xab           )
+                mov     pc, lr
+ENDPROC(printch)
+
+#endif
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 8ec5eed55e37..7fd3ad048da9 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -15,6 +15,7 @@
  *  that causes it to save wrong values...  Be aware!
  */
 
+#include <asm/assembler.h>
 #include <asm/memory.h>
 #include <asm/glue-df.h>
 #include <asm/glue-pf.h>
diff --git a/arch/arm/kernel/ftrace.c b/arch/arm/kernel/ftrace.c
index c0062ad1e847..df0bf0c8cb79 100644
--- a/arch/arm/kernel/ftrace.c
+++ b/arch/arm/kernel/ftrace.c
@@ -16,10 +16,13 @@
 #include <linux/uaccess.h>
 
 #include <asm/cacheflush.h>
+#include <asm/opcodes.h>
 #include <asm/ftrace.h>
 
+#include "insn.h"
+
 #ifdef CONFIG_THUMB2_KERNEL
-#define NOP             0xeb04f85d      /* pop.w {lr} */
+#define NOP             0xf85deb04      /* pop.w {lr} */
 #else
 #define NOP             0xe8bd4000      /* pop {lr} */
 #endif
@@ -60,76 +63,31 @@ static unsigned long adjust_address(struct dyn_ftrace *rec, unsigned long addr)
 }
 #endif
 
-#ifdef CONFIG_THUMB2_KERNEL
-static unsigned long ftrace_gen_branch(unsigned long pc, unsigned long addr,
-                                       bool link)
-{
-        unsigned long s, j1, j2, i1, i2, imm10, imm11;
-        unsigned long first, second;
-        long offset;
-
-        offset = (long)addr - (long)(pc + 4);
-        if (offset < -16777216 || offset > 16777214) {
-                WARN_ON_ONCE(1);
-                return 0;
-        }
-
-        s       = (offset >> 24) & 0x1;
-        i1      = (offset >> 23) & 0x1;
-        i2      = (offset >> 22) & 0x1;
-        imm10   = (offset >> 12) & 0x3ff;
-        imm11   = (offset >>  1) & 0x7ff;
-
-        j1 = (!i1) ^ s;
-        j2 = (!i2) ^ s;
-
-        first = 0xf000 | (s << 10) | imm10;
-        second = 0x9000 | (j1 << 13) | (j2 << 11) | imm11;
-        if (link)
-                second |= 1 << 14;
-
-        return (second << 16) | first;
-}
-#else
-static unsigned long ftrace_gen_branch(unsigned long pc, unsigned long addr,
-                                       bool link)
-{
-        unsigned long opcode = 0xea000000;
-        long offset;
-
-        if (link)
-                opcode |= 1 << 24;
-
-        offset = (long)addr - (long)(pc + 8);
-        if (unlikely(offset < -33554432 || offset > 33554428)) {
-                /* Can't generate branches that far (from ARM ARM). Ftrace
-                 * doesn't generate branches outside of kernel text.
-                 */
-                WARN_ON_ONCE(1);
-                return 0;
-        }
-
-        offset = (offset >> 2) & 0x00ffffff;
-
-        return opcode | offset;
-}
-#endif
-
 static unsigned long ftrace_call_replace(unsigned long pc, unsigned long addr)
 {
-        return ftrace_gen_branch(pc, addr, true);
+        return arm_gen_branch_link(pc, addr);
 }
 
 static int ftrace_modify_code(unsigned long pc, unsigned long old,
-                              unsigned long new)
+                              unsigned long new, bool validate)
 {
         unsigned long replaced;
 
-        if (probe_kernel_read(&replaced, (void *)pc, MCOUNT_INSN_SIZE))
-                return -EFAULT;
+        if (IS_ENABLED(CONFIG_THUMB2_KERNEL)) {
+                old = __opcode_to_mem_thumb32(old);
+                new = __opcode_to_mem_thumb32(new);
+        } else {
+                old = __opcode_to_mem_arm(old);
+                new = __opcode_to_mem_arm(new);
+        }
 
-        if (replaced != old)
-                return -EINVAL;
+        if (validate) {
+                if (probe_kernel_read(&replaced, (void *)pc, MCOUNT_INSN_SIZE))
+                        return -EFAULT;
+
+                if (replaced != old)
+                        return -EINVAL;
+        }
 
         if (probe_kernel_write((void *)pc, &new, MCOUNT_INSN_SIZE))
                 return -EPERM;
@@ -141,23 +99,21 @@ static int ftrace_modify_code(unsigned long pc, unsigned long old,
 
 int ftrace_update_ftrace_func(ftrace_func_t func)
 {
-        unsigned long pc, old;
+        unsigned long pc;
         unsigned long new;
         int ret;
 
         pc = (unsigned long)&ftrace_call;
-        memcpy(&old, &ftrace_call, MCOUNT_INSN_SIZE);
         new = ftrace_call_replace(pc, (unsigned long)func);
 
-        ret = ftrace_modify_code(pc, old, new);
+        ret = ftrace_modify_code(pc, 0, new, false);
 
 #ifdef CONFIG_OLD_MCOUNT
         if (!ret) {
                 pc = (unsigned long)&ftrace_call_old;
-                memcpy(&old, &ftrace_call_old, MCOUNT_INSN_SIZE);
                 new = ftrace_call_replace(pc, (unsigned long)func);
 
-                ret = ftrace_modify_code(pc, old, new);
+                ret = ftrace_modify_code(pc, 0, new, false);
         }
 #endif
 
@@ -172,7 +128,7 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
         old = ftrace_nop_replace(rec);
         new = ftrace_call_replace(ip, adjust_address(rec, addr));
 
-        return ftrace_modify_code(rec->ip, old, new);
+        return ftrace_modify_code(rec->ip, old, new, true);
 }
 
 int ftrace_make_nop(struct module *mod,
@@ -185,7 +141,7 @@ int ftrace_make_nop(struct module *mod,
 
         old = ftrace_call_replace(ip, adjust_address(rec, addr));
         new = ftrace_nop_replace(rec);
-        ret = ftrace_modify_code(ip, old, new);
+        ret = ftrace_modify_code(ip, old, new, true);
 
 #ifdef CONFIG_OLD_MCOUNT
         if (ret == -EINVAL && addr == MCOUNT_ADDR) {
@@ -193,7 +149,7 @@ int ftrace_make_nop(struct module *mod,
 
                 old = ftrace_call_replace(ip, adjust_address(rec, addr));
                 new = ftrace_nop_replace(rec);
-                ret = ftrace_modify_code(ip, old, new);
+                ret = ftrace_modify_code(ip, old, new, true);
         }
 #endif
 
@@ -249,12 +205,12 @@ static int __ftrace_modify_caller(unsigned long *callsite,
 {
         unsigned long caller_fn = (unsigned long) func;
         unsigned long pc = (unsigned long) callsite;
-        unsigned long branch = ftrace_gen_branch(pc, caller_fn, false);
+        unsigned long branch = arm_gen_branch(pc, caller_fn);
         unsigned long nop = 0xe1a00000; /* mov r0, r0 */
         unsigned long old = enable ? nop : branch;
         unsigned long new = enable ? branch : nop;
 
-        return ftrace_modify_code(pc, old, new);
+        return ftrace_modify_code(pc, old, new, true);
 }
 
 static int ftrace_modify_graph_caller(bool enable)
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index a2e9694a68ee..3bf0c7f8b043 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -265,7 +265,7 @@ __create_page_tables:
         str     r6, [r3]
 
 #ifdef CONFIG_DEBUG_LL
-#ifndef CONFIG_DEBUG_ICEDCC
+#if !defined(CONFIG_DEBUG_ICEDCC) && !defined(CONFIG_DEBUG_SEMIHOSTING)
         /*
          * Map in IO space for serial debugging.
          * This allows debug messages to be output
@@ -297,10 +297,10 @@ __create_page_tables:
         cmp     r0, r6
         blo     1b
 
-#else /* CONFIG_DEBUG_ICEDCC */
-        /* we don't need any serial debugging mappings for ICEDCC */
+#else /* CONFIG_DEBUG_ICEDCC || CONFIG_DEBUG_SEMIHOSTING */
+        /* we don't need any serial debugging mappings */
         ldr     r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags
-#endif /* !CONFIG_DEBUG_ICEDCC */
+#endif
 
 #if defined(CONFIG_ARCH_NETWINDER) || defined(CONFIG_ARCH_CATS)
         /*
diff --git a/arch/arm/kernel/insn.c b/arch/arm/kernel/insn.c
new file mode 100644
index 000000000000..ab312e516546
--- /dev/null
+++ b/arch/arm/kernel/insn.c
@@ -0,0 +1,61 @@
+#include <linux/kernel.h>
+#include <asm/opcodes.h>
+
+static unsigned long
+__arm_gen_branch_thumb2(unsigned long pc, unsigned long addr, bool link)
+{
+        unsigned long s, j1, j2, i1, i2, imm10, imm11;
+        unsigned long first, second;
+        long offset;
+
+        offset = (long)addr - (long)(pc + 4);
+        if (offset < -16777216 || offset > 16777214) {
+                WARN_ON_ONCE(1);
+                return 0;
+        }
+
+        s       = (offset >> 24) & 0x1;
+        i1      = (offset >> 23) & 0x1;
+        i2      = (offset >> 22) & 0x1;
+        imm10   = (offset >> 12) & 0x3ff;
+        imm11   = (offset >>  1) & 0x7ff;
+
+        j1 = (!i1) ^ s;
+        j2 = (!i2) ^ s;
+
+        first = 0xf000 | (s << 10) | imm10;
+        second = 0x9000 | (j1 << 13) | (j2 << 11) | imm11;
+        if (link)
+                second |= 1 << 14;
+
+        return __opcode_thumb32_compose(first, second);
+}
+
+static unsigned long
+__arm_gen_branch_arm(unsigned long pc, unsigned long addr, bool link)
+{
+        unsigned long opcode = 0xea000000;
+        long offset;
+
+        if (link)
+                opcode |= 1 << 24;
+
+        offset = (long)addr - (long)(pc + 8);
+        if (unlikely(offset < -33554432 || offset > 33554428)) {
+                WARN_ON_ONCE(1);
+                return 0;
+        }
+
+        offset = (offset >> 2) & 0x00ffffff;
+
+        return opcode | offset;
+}
+
+unsigned long
+__arm_gen_branch(unsigned long pc, unsigned long addr, bool link)
+{
+        if (IS_ENABLED(CONFIG_THUMB2_KERNEL))
+                return __arm_gen_branch_thumb2(pc, addr, link);
+        else
+                return __arm_gen_branch_arm(pc, addr, link);
+}
diff --git a/arch/arm/kernel/insn.h b/arch/arm/kernel/insn.h
new file mode 100644
index 000000000000..e96065da4dae
--- /dev/null
+++ b/arch/arm/kernel/insn.h
@@ -0,0 +1,29 @@
+#ifndef __ASM_ARM_INSN_H
+#define __ASM_ARM_INSN_H
+
+static inline unsigned long
+arm_gen_nop(void)
+{
+#ifdef CONFIG_THUMB2_KERNEL
+        return 0xf3af8000; /* nop.w */
+#else
+        return 0xe1a00000; /* mov r0, r0 */
+#endif
+}
+
+unsigned long
+__arm_gen_branch(unsigned long pc, unsigned long addr, bool link);
+
+static inline unsigned long
+arm_gen_branch(unsigned long pc, unsigned long addr)
+{
+        return __arm_gen_branch(pc, addr, false);
+}
+
+static inline unsigned long
+arm_gen_branch_link(unsigned long pc, unsigned long addr)
+{
+        return __arm_gen_branch(pc, addr, true);
+}
+
+#endif
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 6a6a097edd61..71ccdbfed662 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -180,10 +180,7 @@ void migrate_irqs(void)
         local_irq_save(flags);
 
         for_each_irq_desc(i, desc) {
-                bool affinity_broken = false;
-
-                if (!desc)
-                        continue;
+                bool affinity_broken;
 
                 raw_spin_lock(&desc->lock);
                 affinity_broken = migrate_one_irq(desc);
diff --git a/arch/arm/kernel/jump_label.c b/arch/arm/kernel/jump_label.c
new file mode 100644
index 000000000000..4ce4f789446d
--- /dev/null
+++ b/arch/arm/kernel/jump_label.c
@@ -0,0 +1,39 @@
+#include <linux/kernel.h>
+#include <linux/jump_label.h>
+
+#include "insn.h"
+#include "patch.h"
+
+#ifdef HAVE_JUMP_LABEL
+
+static void __arch_jump_label_transform(struct jump_entry *entry,
+                                        enum jump_label_type type,
+                                        bool is_static)
+{
+        void *addr = (void *)entry->code;
+        unsigned int insn;
+
+        if (type == JUMP_LABEL_ENABLE)
+                insn = arm_gen_branch(entry->code, entry->target);
+        else
+                insn = arm_gen_nop();
+
+        if (is_static)
+                __patch_text(addr, insn);
+        else
+                patch_text(addr, insn);
+}
+
+void arch_jump_label_transform(struct jump_entry *entry,
+                               enum jump_label_type type)
+{
+        __arch_jump_label_transform(entry, type, false);
+}
+
+void arch_jump_label_transform_static(struct jump_entry *entry,
+                                      enum jump_label_type type)
+{
+        __arch_jump_label_transform(entry, type, true);
+}
+
+#endif
diff --git a/arch/arm/kernel/kprobes.c b/arch/arm/kernel/kprobes.c
index 129c1163248b..ab1869dac97a 100644
--- a/arch/arm/kernel/kprobes.c
+++ b/arch/arm/kernel/kprobes.c
@@ -29,6 +29,7 @@
 #include <asm/cacheflush.h>
 
 #include "kprobes.h"
+#include "patch.h"
 
 #define MIN_STACK_SIZE(addr)                            \
         min((unsigned long)MAX_STACK_SIZE,              \
@@ -103,57 +104,33 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
         return 0;
 }
 
-#ifdef CONFIG_THUMB2_KERNEL
-
-/*
- * For a 32-bit Thumb breakpoint spanning two memory words we need to take
- * special precautions to insert the breakpoint atomically, especially on SMP
- * systems. This is achieved by calling this arming function using stop_machine.
- */
-static int __kprobes set_t32_breakpoint(void *addr)
-{
-        ((u16 *)addr)[0] = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION >> 16;
-        ((u16 *)addr)[1] = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION & 0xffff;
-        flush_insns(addr, 2*sizeof(u16));
-        return 0;
-}
-
 void __kprobes arch_arm_kprobe(struct kprobe *p)
 {
-        uintptr_t addr = (uintptr_t)p->addr & ~1; /* Remove any Thumb flag */
-
-        if (!is_wide_instruction(p->opcode)) {
-                *(u16 *)addr = KPROBE_THUMB16_BREAKPOINT_INSTRUCTION;
-                flush_insns(addr, sizeof(u16));
-        } else if (addr & 2) {
-                /* A 32-bit instruction spanning two words needs special care */
-                stop_machine(set_t32_breakpoint, (void *)addr, &cpu_online_map);
+        unsigned int brkp;
+        void *addr;
+
+        if (IS_ENABLED(CONFIG_THUMB2_KERNEL)) {
+                /* Remove any Thumb flag */
+                addr = (void *)((uintptr_t)p->addr & ~1);
+
+                if (is_wide_instruction(p->opcode))
+                        brkp = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION;
+                else
+                        brkp = KPROBE_THUMB16_BREAKPOINT_INSTRUCTION;
         } else {
-                /* Word aligned 32-bit instruction can be written atomically */
-                u32 bkp = KPROBE_THUMB32_BREAKPOINT_INSTRUCTION;
-#ifndef __ARMEB__ /* Swap halfwords for little-endian */
-                bkp = (bkp >> 16) | (bkp << 16);
-#endif
-                *(u32 *)addr = bkp;
-                flush_insns(addr, sizeof(u32));
-        }
-}
+                kprobe_opcode_t insn = p->opcode;
 
-#else /* !CONFIG_THUMB2_KERNEL */
+                addr = p->addr;
+                brkp = KPROBE_ARM_BREAKPOINT_INSTRUCTION;
 
-void __kprobes arch_arm_kprobe(struct kprobe *p)
-{
-        kprobe_opcode_t insn = p->opcode;
-        kprobe_opcode_t brkp = KPROBE_ARM_BREAKPOINT_INSTRUCTION;
-        if (insn >= 0xe0000000)
-                brkp |= 0xe0000000;  /* Unconditional instruction */
-        else
-                brkp |= insn & 0xf0000000;  /* Copy condition from insn */
-        *p->addr = brkp;
-        flush_insns(p->addr, sizeof(p->addr[0]));
-}
+                if (insn >= 0xe0000000)
+                        brkp |= 0xe0000000;  /* Unconditional instruction */
+                else
+                        brkp |= insn & 0xf0000000;  /* Copy condition from insn */
+        }
 
-#endif /* !CONFIG_THUMB2_KERNEL */
+        patch_text(addr, brkp);
+}
 
 /*
  * The actual disarming is done here on each CPU and synchronized using
@@ -166,25 +143,10 @@ void __kprobes arch_arm_kprobe(struct kprobe *p)
 int __kprobes __arch_disarm_kprobe(void *p)
 {
         struct kprobe *kp = p;
-#ifdef CONFIG_THUMB2_KERNEL
-        u16 *addr = (u16 *)((uintptr_t)kp->addr & ~1);
-        kprobe_opcode_t insn = kp->opcode;
-        unsigned int len;
+        void *addr = (void *)((uintptr_t)kp->addr & ~1);
 
-        if (is_wide_instruction(insn)) {
-                ((u16 *)addr)[0] = insn>>16;
-                ((u16 *)addr)[1] = insn;
-                len = 2*sizeof(u16);
-        } else {
-                ((u16 *)addr)[0] = insn;
-                len = sizeof(u16);
-        }
-        flush_insns(addr, len);
+        __patch_text(addr, kp->opcode);
 
-#else /* !CONFIG_THUMB2_KERNEL */
-        *kp->addr = kp->opcode;
-        flush_insns(kp->addr, sizeof(kp->addr[0]));
-#endif
         return 0;
 }
 
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index 56995983eed8..dfcdb9f7c126 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -7,6 +7,7 @@
 #include <linux/delay.h>
 #include <linux/reboot.h>
 #include <linux/io.h>
+#include <linux/irq.h>
 #include <asm/pgtable.h>
 #include <asm/pgalloc.h>
 #include <asm/mmu_context.h>
@@ -53,6 +54,29 @@ void machine_crash_nonpanic_core(void *unused)
                 cpu_relax();
 }
 
+static void machine_kexec_mask_interrupts(void)
+{
+        unsigned int i;
+        struct irq_desc *desc;
+
+        for_each_irq_desc(i, desc) {
+                struct irq_chip *chip;
+
+                chip = irq_desc_get_chip(desc);
+                if (!chip)
+                        continue;
+
+                if (chip->irq_eoi && irqd_irq_inprogress(&desc->irq_data))
+                        chip->irq_eoi(&desc->irq_data);
+
+                if (chip->irq_mask)
+                        chip->irq_mask(&desc->irq_data);
+
+                if (chip->irq_disable && !irqd_irq_disabled(&desc->irq_data))
+                        chip->irq_disable(&desc->irq_data);
+        }
+}
+
 void machine_crash_shutdown(struct pt_regs *regs)
 {
         unsigned long msecs;
@@ -70,6 +94,7 @@ void machine_crash_shutdown(struct pt_regs *regs)
                 printk(KERN_WARNING "Non-crashing CPUs did not react to IPI\n");
 
         crash_save_cpu(regs, smp_processor_id());
+        machine_kexec_mask_interrupts();
 
         printk(KERN_INFO "Loading crashdump kernel...\n");
 }
diff --git a/arch/arm/kernel/patch.c b/arch/arm/kernel/patch.c
new file mode 100644
index 000000000000..07314af47733
--- /dev/null
+++ b/arch/arm/kernel/patch.c
@@ -0,0 +1,75 @@
+#include <linux/kernel.h>
+#include <linux/kprobes.h>
+#include <linux/stop_machine.h>
+
+#include <asm/cacheflush.h>
+#include <asm/smp_plat.h>
+#include <asm/opcodes.h>
+
+#include "patch.h"
+
+struct patch {
+        void *addr;
+        unsigned int insn;
+};
+
+void __kprobes __patch_text(void *addr, unsigned int insn)
+{
+        bool thumb2 = IS_ENABLED(CONFIG_THUMB2_KERNEL);
+        int size;
+
+        if (thumb2 && __opcode_is_thumb16(insn)) {
+                *(u16 *)addr = __opcode_to_mem_thumb16(insn);
+                size = sizeof(u16);
+        } else if (thumb2 && ((uintptr_t)addr & 2)) {
+                u16 first = __opcode_thumb32_first(insn);
+                u16 second = __opcode_thumb32_second(insn);
+                u16 *addrh = addr;
+
+                addrh[0] = __opcode_to_mem_thumb16(first);
+                addrh[1] = __opcode_to_mem_thumb16(second);
+
+                size = sizeof(u32);
+        } else {
+                if (thumb2)
+                        insn = __opcode_to_mem_thumb32(insn);
+                else
+                        insn = __opcode_to_mem_arm(insn);
+
+                *(u32 *)addr = insn;
+                size = sizeof(u32);
+        }
+
+        flush_icache_range((uintptr_t)(addr),
+                           (uintptr_t)(addr) + size);
+}
+
+static int __kprobes patch_text_stop_machine(void *data)
+{
+        struct patch *patch = data;
+
+        __patch_text(patch->addr, patch->insn);
+
+        return 0;
+}
+
+void __kprobes patch_text(void *addr, unsigned int insn)
+{
+        struct patch patch = {
+                .addr = addr,
+                .insn = insn,
+        };
+
+        if (cache_ops_need_broadcast()) {
+                stop_machine(patch_text_stop_machine, &patch, cpu_online_mask);
+        } else {
+                bool straddles_word = IS_ENABLED(CONFIG_THUMB2_KERNEL)
+                                      && __opcode_is_thumb32(insn)
+                                      && ((uintptr_t)addr & 2);
+
+                if (straddles_word)
+                        stop_machine(patch_text_stop_machine, &patch, NULL);
+                else
+                        __patch_text(addr, insn);
+        }
+}
diff --git a/arch/arm/kernel/patch.h b/arch/arm/kernel/patch.h
new file mode 100644
index 000000000000..b4731f2dac38
--- /dev/null
+++ b/arch/arm/kernel/patch.h
@@ -0,0 +1,7 @@
+#ifndef _ARM_KERNEL_PATCH_H
+#define _ARM_KERNEL_PATCH_H
+
+void patch_text(void *addr, unsigned int insn);
+void __patch_text(void *addr, unsigned int insn);
+
+#endif
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 8a89d3b7626b..186c8cb982c5 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -738,6 +738,9 @@ init_hw_perf_events(void)
                 case 0xC0F0:    /* Cortex-A15 */
                         cpu_pmu = armv7_a15_pmu_init();
                         break;
+                case 0xC070:    /* Cortex-A7 */
+                        cpu_pmu = armv7_a7_pmu_init();
+                        break;
                 }
         /* Intel CPUs [xscale]. */
         } else if (0x69 == implementor) {
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 4d7095af2ab3..00755d82e2f2 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -610,6 +610,130 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
 };
 
 /*
+ * Cortex-A7 HW events mapping
+ */
+static const unsigned armv7_a7_perf_map[PERF_COUNT_HW_MAX] = {
+        [PERF_COUNT_HW_CPU_CYCLES]              = ARMV7_PERFCTR_CPU_CYCLES,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = ARMV7_PERFCTR_INSTR_EXECUTED,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
+        [PERF_COUNT_HW_CACHE_MISSES]            = ARMV7_PERFCTR_L1_DCACHE_REFILL,
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = ARMV7_PERFCTR_PC_WRITE,
+        [PERF_COUNT_HW_BRANCH_MISSES]           = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+        [PERF_COUNT_HW_BUS_CYCLES]              = ARMV7_PERFCTR_BUS_CYCLES,
+        [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = HW_OP_UNSUPPORTED,
+        [PERF_COUNT_HW_STALLED_CYCLES_BACKEND]  = HW_OP_UNSUPPORTED,
+};
+
+static const unsigned armv7_a7_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
+                                        [PERF_COUNT_HW_CACHE_OP_MAX]
+                                        [PERF_COUNT_HW_CACHE_RESULT_MAX] = {
+        [C(L1D)] = {
+                /*
+                 * The performance counters don't differentiate between read
+                 * and write accesses/misses so this isn't strictly correct,
+                 * but it's the best we can do. Writes and reads get
+                 * combined.
+                 */
+                [C(OP_READ)] = {
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_DCACHE_REFILL,
+                },
+                [C(OP_WRITE)] = {
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_DCACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_DCACHE_REFILL,
+                },
+                [C(OP_PREFETCH)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+                },
+        },
+        [C(L1I)] = {
+                [C(OP_READ)] = {
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
+                },
+                [C(OP_WRITE)] = {
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L1_ICACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L1_ICACHE_REFILL,
+                },
+                [C(OP_PREFETCH)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+                },
+        },
+        [C(LL)] = {
+                [C(OP_READ)] = {
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L2_CACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L2_CACHE_REFILL,
+                },
+                [C(OP_WRITE)] = {
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_L2_CACHE_ACCESS,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_L2_CACHE_REFILL,
+                },
+                [C(OP_PREFETCH)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+                },
+        },
+        [C(DTLB)] = {
+                [C(OP_READ)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_DTLB_REFILL,
+                },
+                [C(OP_WRITE)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_DTLB_REFILL,
+                },
+                [C(OP_PREFETCH)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+                },
+        },
+        [C(ITLB)] = {
+                [C(OP_READ)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
+                },
+                [C(OP_WRITE)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_ITLB_REFILL,
+                },
+                [C(OP_PREFETCH)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+                },
+        },
+        [C(BPU)] = {
+                [C(OP_READ)] = {
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+                },
+                [C(OP_WRITE)] = {
+                        [C(RESULT_ACCESS)]      = ARMV7_PERFCTR_PC_BRANCH_PRED,
+                        [C(RESULT_MISS)]        = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
+                },
+                [C(OP_PREFETCH)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+                },
+        },
+        [C(NODE)] = {
+                [C(OP_READ)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+                },
+                [C(OP_WRITE)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+                },
+                [C(OP_PREFETCH)] = {
+                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+                },
+        },
+};
+
+/*
  * Perf Events' indices
  */
 #define ARMV7_IDX_CYCLE_COUNTER 0
@@ -1104,6 +1228,12 @@ static int armv7_a15_map_event(struct perf_event *event)
                                 &armv7_a15_perf_cache_map, 0xFF);
 }
 
+static int armv7_a7_map_event(struct perf_event *event)
+{
+        return map_cpu_event(event, &armv7_a7_perf_map,
+                                &armv7_a7_perf_cache_map, 0xFF);
+}
+
 static struct arm_pmu armv7pmu = {
         .handle_irq             = armv7pmu_handle_irq,
         .enable                 = armv7pmu_enable_event,
@@ -1164,6 +1294,16 @@ static struct arm_pmu *__init armv7_a15_pmu_init(void)
         armv7pmu.set_event_filter = armv7pmu_set_event_filter;
         return &armv7pmu;
 }
+
+static struct arm_pmu *__init armv7_a7_pmu_init(void)
+{
+        armv7pmu.id             = ARM_PERF_PMU_ID_CA7;
+        armv7pmu.name           = "ARMv7 Cortex-A7";
+        armv7pmu.map_event      = armv7_a7_map_event;
+        armv7pmu.num_events     = armv7_read_num_pmnc_events();
+        armv7pmu.set_event_filter = armv7pmu_set_event_filter;
+        return &armv7pmu;
+}
 #else
 static struct arm_pmu *__init armv7_a8_pmu_init(void)
 {
@@ -1184,4 +1324,9 @@ static struct arm_pmu *__init armv7_a15_pmu_init(void)
 {
         return NULL;
 }
+
+static struct arm_pmu *__init armv7_a7_pmu_init(void)
+{
+        return NULL;
+}
 #endif  /* CONFIG_CPU_V7 */
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 7b9cddef6e53..2b7b017a20cd 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -528,21 +528,39 @@ unsigned long arch_randomize_brk(struct mm_struct *mm)
 #ifdef CONFIG_MMU
 /*
  * The vectors page is always readable from user space for the
- * atomic helpers and the signal restart code.  Let's declare a mapping
- * for it so it is visible through ptrace and /proc/<pid>/mem.
+ * atomic helpers and the signal restart code. Insert it into the
+ * gate_vma so that it is visible through ptrace and /proc/<pid>/mem.
  */
+static struct vm_area_struct gate_vma;
 
-int vectors_user_mapping(void)
+static int __init gate_vma_init(void)
 {
-        struct mm_struct *mm = current->mm;
-        return install_special_mapping(mm, 0xffff0000, PAGE_SIZE,
-                                       VM_READ | VM_EXEC |
-                                       VM_MAYREAD | VM_MAYEXEC | VM_RESERVED,
-                                       NULL);
+        gate_vma.vm_start       = 0xffff0000;
+        gate_vma.vm_end         = 0xffff0000 + PAGE_SIZE;
+        gate_vma.vm_page_prot   = PAGE_READONLY_EXEC;
+        gate_vma.vm_flags       = VM_READ | VM_EXEC |
+                                  VM_MAYREAD | VM_MAYEXEC;
+        return 0;
+}
+arch_initcall(gate_vma_init);
+
+struct vm_area_struct *get_gate_vma(struct mm_struct *mm)
+{
+        return &gate_vma;
+}
+
+int in_gate_area(struct mm_struct *mm, unsigned long addr)
+{
+        return (addr >= gate_vma.vm_start) && (addr < gate_vma.vm_end);
+}
+
+int in_gate_area_no_mm(unsigned long addr)
+{
+        return in_gate_area(NULL, addr);
 }
 
 const char *arch_vma_name(struct vm_area_struct *vma)
 {
-        return (vma->vm_start == 0xffff0000) ? "[vectors]" : NULL;
+        return (vma == &gate_vma) ? "[vectors]" : NULL;
 }
 #endif
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index 5416c7c12528..27d186abbc06 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -10,6 +10,7 @@
 #include <linux/jiffies.h>
 #include <linux/kernel.h>
 #include <linux/sched.h>
+#include <linux/syscore_ops.h>
 #include <linux/timer.h>
 
 #include <asm/sched_clock.h>
@@ -164,3 +165,20 @@ void __init sched_clock_postinit(void)
 
         sched_clock_poll(sched_clock_timer.data);
 }
+
+static int sched_clock_suspend(void)
+{
+        sched_clock_poll(sched_clock_timer.data);
+        return 0;
+}
+
+static struct syscore_ops sched_clock_ops = {
+        .suspend = sched_clock_suspend,
+};
+
+static int __init sched_clock_syscore_init(void)
+{
+        register_syscore_ops(&sched_clock_ops);
+        return 0;
+}
+device_initcall(sched_clock_syscore_init);
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 9e0fdb3a1988..b91411371ae1 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -976,7 +976,6 @@ void __init setup_arch(char **cmdline_p)
         conswitchp = &dummy_con;
 #endif
 #endif
-        early_trap_init();
 
         if (mdesc->init_early)
                 mdesc->init_early();
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index 9e617bd4a146..7cb532fc8aa4 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -66,12 +66,13 @@ const unsigned long syscall_restart_code[2] = {
  */
 asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask)
 {
-        mask &= _BLOCKABLE;
-        spin_lock_irq(&current->sighand->siglock);
+        sigset_t blocked;
+
         current->saved_sigmask = current->blocked;
-        siginitset(&current->blocked, mask);
-        recalc_sigpending();
-        spin_unlock_irq(&current->sighand->siglock);
+
+        mask &= _BLOCKABLE;
+        siginitset(&blocked, mask);
+        set_current_blocked(&blocked);
 
         current->state = TASK_INTERRUPTIBLE;
         schedule();
@@ -280,10 +281,7 @@ static int restore_sigframe(struct pt_regs *regs, struct sigframe __user *sf)
         err = __copy_from_user(&set, &sf->uc.uc_sigmask, sizeof(set));
         if (err == 0) {
                 sigdelsetmask(&set, ~_BLOCKABLE);
-                spin_lock_irq(&current->sighand->siglock);
-                current->blocked = set;
-                recalc_sigpending();
-                spin_unlock_irq(&current->sighand->siglock);
+                set_current_blocked(&set);
         }
 
         __get_user_error(regs->ARM_r0, &sf->uc.uc_mcontext.arm_r0, err);
@@ -636,13 +634,7 @@ handle_signal(unsigned long sig, struct k_sigaction *ka,
         /*
          * Block the signal if we were successful.
          */
-        spin_lock_irq(&tsk->sighand->siglock);
-        sigorsets(&tsk->blocked, &tsk->blocked,
-                  &ka->sa.sa_mask);
-        if (!(ka->sa.sa_flags & SA_NODEFER))
-                sigaddset(&tsk->blocked, sig);
-        recalc_sigpending();
-        spin_unlock_irq(&tsk->sighand->siglock);
+        block_sigmask(ka, sig);
 
         return 0;
 }
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 8f8cce2c46c4..2cee7d1eb958 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -58,6 +58,8 @@ enum ipi_msg_type {
         IPI_CPU_STOP,
 };
 
+static DECLARE_COMPLETION(cpu_running);
+
 int __cpuinit __cpu_up(unsigned int cpu)
 {
         struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu);
@@ -98,20 +100,12 @@ int __cpuinit __cpu_up(unsigned int cpu)
          */
         ret = boot_secondary(cpu, idle);
         if (ret == 0) {
-                unsigned long timeout;
-
                 /*
                  * CPU was successfully started, wait for it
                  * to come online or time out.
                  */
-                timeout = jiffies + HZ;
-                while (time_before(jiffies, timeout)) {
-                        if (cpu_online(cpu))
-                                break;
-
-                        udelay(10);
-                        barrier();
-                }
+                wait_for_completion_timeout(&cpu_running,
+                                                 msecs_to_jiffies(1000));
 
                 if (!cpu_online(cpu)) {
                         pr_crit("CPU%u: failed to come online\n", cpu);
@@ -288,9 +282,10 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
         /*
          * OK, now it's safe to let the boot CPU continue.  Wait for
          * the CPU migration code to notice that the CPU is online
-         * before we continue.
+         * before we continue - which happens after __cpu_up returns.
          */
         set_cpu_online(cpu, true);
+        complete(&cpu_running);
 
         /*
          * Setup the percpu timer for this CPU.
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index 8c57dd3680e9..fe31b22f18fd 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -25,8 +25,6 @@
 #include <linux/timer.h>
 #include <linux/irq.h>
 
-#include <linux/mc146818rtc.h>
-
 #include <asm/leds.h>
 #include <asm/thread_info.h>
 #include <asm/sched_clock.h>
@@ -149,8 +147,6 @@ void __init time_init(void)
 {
         system_timer = machine_desc->timer;
         system_timer->init();
-#ifdef CONFIG_HAVE_SCHED_CLOCK
         sched_clock_postinit();
-#endif
 }
 
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index cd77743472a2..778454750a6c 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -227,6 +227,11 @@ void show_stack(struct task_struct *tsk, unsigned long *sp)
 #else
 #define S_SMP ""
 #endif
+#ifdef CONFIG_THUMB2_KERNEL
+#define S_ISA " THUMB2"
+#else
+#define S_ISA " ARM"
+#endif
 
 static int __die(const char *str, int err, struct thread_info *thread, struct pt_regs *regs)
 {
@@ -234,8 +239,8 @@ static int __die(const char *str, int err, struct thread_info *thread, struct pt
         static int die_counter;
         int ret;
 
-        printk(KERN_EMERG "Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
-               str, err, ++die_counter);
+        printk(KERN_EMERG "Internal error: %s: %x [#%d]" S_PREEMPT S_SMP
+               S_ISA "\n", str, err, ++die_counter);
 
         /* trap and error numbers are mostly meaningless on ARM */
         ret = notify_die(DIE_OOPS, str, regs, err, tsk->thread.trap_no, SIGSEGV);
@@ -784,18 +789,16 @@ static void __init kuser_get_tls_init(unsigned long vectors)
                 memcpy((void *)vectors + 0xfe0, (void *)vectors + 0xfe8, 4);
 }
 
-void __init early_trap_init(void)
+void __init early_trap_init(void *vectors_base)
 {
-#if defined(CONFIG_CPU_USE_DOMAINS)
-        unsigned long vectors = CONFIG_VECTORS_BASE;
-#else
-        unsigned long vectors = (unsigned long)vectors_page;
-#endif
+        unsigned long vectors = (unsigned long)vectors_base;
         extern char __stubs_start[], __stubs_end[];
         extern char __vectors_start[], __vectors_end[];
         extern char __kuser_helper_start[], __kuser_helper_end[];
         int kuser_sz = __kuser_helper_end - __kuser_helper_start;
 
+        vectors_page = vectors_base;
+
         /*
          * Copy the vectors, stubs and kuser helpers (in entry-armv.S)
          * into the vector page, mapped at 0xffff0000, and ensure these
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 4320b2096789..698479f1e197 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -437,7 +437,6 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
 
         /* DMA slave channel configuration */
         atslave->dma_dev = &at_hdmac_device.dev;
-        atslave->reg_width = AT_DMA_SLAVE_WIDTH_32BIT;
         atslave->cfg = ATC_FIFOCFG_HALFFIFO
                         | ATC_SRC_H2SEL_HW | ATC_DST_H2SEL_HW;
         atslave->ctrla = ATC_SCSIZE_16 | ATC_DCSIZE_16;
diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c
index 555d956b3a57..ece1f9aefb47 100644
--- a/arch/arm/mach-at91/cpuidle.c
+++ b/arch/arm/mach-at91/cpuidle.c
@@ -17,9 +17,10 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/cpuidle.h>
-#include <asm/proc-fns.h>
 #include <linux/io.h>
 #include <linux/export.h>
+#include <asm/proc-fns.h>
+#include <asm/cpuidle.h>
 
 #include "pm.h"
 
@@ -27,61 +28,39 @@
 
 static DEFINE_PER_CPU(struct cpuidle_device, at91_cpuidle_device);
 
-static struct cpuidle_driver at91_idle_driver = {
-        .name =         "at91_idle",
-        .owner =        THIS_MODULE,
-};
-
 /* Actual code that puts the SoC in different idle states */
 static int at91_enter_idle(struct cpuidle_device *dev,
                         struct cpuidle_driver *drv,
                                int index)
 {
-        struct timeval before, after;
-        int idle_time;
-
-        local_irq_disable();
-        do_gettimeofday(&before);
-        if (index == 0)
-                /* Wait for interrupt state */
-                cpu_do_idle();
-        else if (index == 1)
-                at91_standby();
+        at91_standby();
 
-        do_gettimeofday(&after);
-        local_irq_enable();
-        idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
-                        (after.tv_usec - before.tv_usec);
-
-        dev->last_residency = idle_time;
         return index;
 }
 
+static struct cpuidle_driver at91_idle_driver = {
+        .name                   = "at91_idle",
+        .owner                  = THIS_MODULE,
+        .en_core_tk_irqen       = 1,
+        .states[0]              = ARM_CPUIDLE_WFI_STATE,
+        .states[1]              = {
+                .enter                  = at91_enter_idle,
+                .exit_latency           = 10,
+                .target_residency       = 100000,
+                .flags                  = CPUIDLE_FLAG_TIME_VALID,
+                .name                   = "RAM_SR",
+                .desc                   = "WFI and DDR Self Refresh",
+        },
+        .state_count = AT91_MAX_STATES,
+};
+
 /* Initialize CPU idle by registering the idle states */
 static int at91_init_cpuidle(void)
 {
         struct cpuidle_device *device;
-        struct cpuidle_driver *driver = &at91_idle_driver;
 
         device = &per_cpu(at91_cpuidle_device, smp_processor_id());
         device->state_count = AT91_MAX_STATES;
-        driver->state_count = AT91_MAX_STATES;
-
-        /* Wait for interrupt state */
-        driver->states[0].enter = at91_enter_idle;
-        driver->states[0].exit_latency = 1;
-        driver->states[0].target_residency = 10000;
-        driver->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
-        strcpy(driver->states[0].name, "WFI");
-        strcpy(driver->states[0].desc, "Wait for interrupt");
-
-        /* Wait for interrupt and RAM self refresh state */
-        driver->states[1].enter = at91_enter_idle;
-        driver->states[1].exit_latency = 10;
-        driver->states[1].target_residency = 10000;
-        driver->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
-        strcpy(driver->states[1].name, "RAM_SR");
-        strcpy(driver->states[1].desc, "WFI and RAM Self Refresh");
 
         cpuidle_register_driver(&at91_idle_driver);
 
diff --git a/arch/arm/mach-at91/include/mach/at_hdmac.h b/arch/arm/mach-at91/include/mach/at_hdmac.h
index 187cb58345c0..fff48d1a0f4e 100644
--- a/arch/arm/mach-at91/include/mach/at_hdmac.h
+++ b/arch/arm/mach-at91/include/mach/at_hdmac.h
@@ -24,18 +24,6 @@ struct at_dma_platform_data {
 };
 
 /**
- * enum at_dma_slave_width - DMA slave register access width.
- * @AT_DMA_SLAVE_WIDTH_8BIT: Do 8-bit slave register accesses
- * @AT_DMA_SLAVE_WIDTH_16BIT: Do 16-bit slave register accesses
- * @AT_DMA_SLAVE_WIDTH_32BIT: Do 32-bit slave register accesses
- */
-enum at_dma_slave_width {
-        AT_DMA_SLAVE_WIDTH_8BIT = 0,
-        AT_DMA_SLAVE_WIDTH_16BIT,
-        AT_DMA_SLAVE_WIDTH_32BIT,
-};
-
-/**
  * struct at_dma_slave - Controller-specific information about a slave
  * @dma_dev: required DMA master device
  * @tx_reg: physical address of data register used for
@@ -48,9 +36,6 @@ enum at_dma_slave_width {
  */
 struct at_dma_slave {
         struct device           *dma_dev;
-        dma_addr_t              tx_reg;
-        dma_addr_t              rx_reg;
-        enum at_dma_slave_width reg_width;
         u32                     cfg;
         u32                     ctrla;
 };
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
deleted file mode 100644
index 4003001eca3d..000000000000
--- a/arch/arm/mach-at91/include/mach/io.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/io.h
- *
- *  Copyright (C) 2003 SAN People
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#ifndef __ASM_ARCH_IO_H
-#define __ASM_ARCH_IO_H
-
-#include <mach/hardware.h>
-
-#define IO_SPACE_LIMIT          0xFFFFFFFF
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
index 0234fd9d20d6..4218647c1fcd 100644
--- a/arch/arm/mach-at91/include/mach/uncompress.h
+++ b/arch/arm/mach-at91/include/mach/uncompress.h
@@ -23,6 +23,7 @@
 
 #include <linux/io.h>
 #include <linux/atmel_serial.h>
+#include <mach/hardware.h>
 
 #if defined(CONFIG_AT91_EARLY_DBGU0)
 #define UART_OFFSET AT91_BASE_DBGU0
diff --git a/arch/arm/mach-bcmring/include/mach/io.h b/arch/arm/mach-bcmring/include/mach/io.h
deleted file mode 100644
index dae5e9b166ea..000000000000
--- a/arch/arm/mach-bcmring/include/mach/io.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- *
- *  Copyright (C) 1999 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#include <mach/hardware.h>
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We don't actually have real ISA nor PCI buses, but there is so many
- * drivers out there that might just work if we fake them...
- */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-clps711x/include/mach/io.h b/arch/arm/mach-clps711x/include/mach/io.h
deleted file mode 100644
index 2e0b3ced8f07..000000000000
--- a/arch/arm/mach-clps711x/include/mach/io.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- *  arch/arm/mach-clps711x/include/mach/io.h
- *
- *  Copyright (C) 1999 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-/*
- * We don't support ins[lb]/outs[lb].  Make them fault.
- */
-#define __raw_readsb(p,d,l)     do { *(int *)0 = 0; } while (0)
-#define __raw_readsl(p,d,l)     do { *(int *)0 = 0; } while (0)
-#define __raw_writesb(p,d,l)    do { *(int *)0 = 0; } while (0)
-#define __raw_writesl(p,d,l)    do { *(int *)0 = 0; } while (0)
-
-#endif
diff --git a/arch/arm/mach-clps711x/include/mach/uncompress.h b/arch/arm/mach-clps711x/include/mach/uncompress.h
index 7164310dea7c..35ed731b9f16 100644
--- a/arch/arm/mach-clps711x/include/mach/uncompress.h
+++ b/arch/arm/mach-clps711x/include/mach/uncompress.h
@@ -17,7 +17,6 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
-#include <mach/io.h>
 #include <mach/hardware.h>
 #include <asm/hardware/clps7111.h>
 
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c
index 941a308e1253..031805b1428d 100644
--- a/arch/arm/mach-cns3xxx/core.c
+++ b/arch/arm/mach-cns3xxx/core.c
@@ -72,13 +72,13 @@ void __init cns3xxx_map_io(void)
 /* used by entry-macro.S */
 void __init cns3xxx_init_irq(void)
 {
-        gic_init(0, 29, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT),
-                 __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT));
+        gic_init(0, 29, IOMEM(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT),
+                 IOMEM(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT));
 }
 
 void cns3xxx_power_off(void)
 {
-        u32 __iomem *pm_base = __io(CNS3XXX_PM_BASE_VIRT);
+        u32 __iomem *pm_base = IOMEM(CNS3XXX_PM_BASE_VIRT);
         u32 clkctrl;
 
         printk(KERN_INFO "powering system down...\n");
@@ -237,7 +237,7 @@ static void __init __cns3xxx_timer_init(unsigned int timer_irq)
 
 static void __init cns3xxx_timer_init(void)
 {
-        cns3xxx_tmr1 = __io(CNS3XXX_TIMER1_2_3_BASE_VIRT);
+        cns3xxx_tmr1 = IOMEM(CNS3XXX_TIMER1_2_3_BASE_VIRT);
 
         __cns3xxx_timer_init(IRQ_CNS3XXX_TIMER0);
 }
diff --git a/arch/arm/mach-cns3xxx/devices.c b/arch/arm/mach-cns3xxx/devices.c
index 79d1fb02c23f..1e40c99b015f 100644
--- a/arch/arm/mach-cns3xxx/devices.c
+++ b/arch/arm/mach-cns3xxx/devices.c
@@ -98,7 +98,7 @@ static struct platform_device cns3xxx_sdhci_pdev = {
 
 void __init cns3xxx_sdhci_init(void)
 {
-        u32 __iomem *gpioa = __io(CNS3XXX_MISC_BASE_VIRT + 0x0014);
+        u32 __iomem *gpioa = IOMEM(CNS3XXX_MISC_BASE_VIRT + 0x0014);
         u32 gpioa_pins = __raw_readl(gpioa);
 
         /* MMC/SD pins share with GPIOA */
diff --git a/arch/arm/mach-cns3xxx/include/mach/io.h b/arch/arm/mach-cns3xxx/include/mach/io.h
deleted file mode 100644
index 33b6fc1ece7c..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/io.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * Copyright 2008 Cavium Networks
- * Copyright 2003 ARM Limited
- *
- * This file is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License, Version 2, as
- * published by the Free Software Foundation.
- */
-#ifndef __MACH_IO_H
-#define __MACH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a)                 __typesafe_io(a)
-#define __mem_pci(a)            (a)
-
-#endif
diff --git a/arch/arm/mach-davinci/cpuidle.c b/arch/arm/mach-davinci/cpuidle.c
index a30c7c5a6d83..9107691adbdb 100644
--- a/arch/arm/mach-davinci/cpuidle.c
+++ b/arch/arm/mach-davinci/cpuidle.c
@@ -18,6 +18,7 @@
 #include <linux/io.h>
 #include <linux/export.h>
 #include <asm/proc-fns.h>
+#include <asm/cpuidle.h>
 
 #include <mach/cpuidle.h>
 #include <mach/ddr2.h>
@@ -30,12 +31,43 @@ struct davinci_ops {
         u32 flags;
 };
 
+/* Actual code that puts the SoC in different idle states */
+static int davinci_enter_idle(struct cpuidle_device *dev,
+                                struct cpuidle_driver *drv,
+                                                int index)
+{
+        struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
+        struct davinci_ops *ops = cpuidle_get_statedata(state_usage);
+
+        if (ops && ops->enter)
+                ops->enter(ops->flags);
+
+        index = cpuidle_wrap_enter(dev, drv, index,
+                                arm_cpuidle_simple_enter);
+
+        if (ops && ops->exit)
+                ops->exit(ops->flags);
+
+        return index;
+}
+
 /* fields in davinci_ops.flags */
 #define DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN BIT(0)
 
 static struct cpuidle_driver davinci_idle_driver = {
-        .name   = "cpuidle-davinci",
-        .owner  = THIS_MODULE,
+        .name                   = "cpuidle-davinci",
+        .owner                  = THIS_MODULE,
+        .en_core_tk_irqen       = 1,
+        .states[0]              = ARM_CPUIDLE_WFI_STATE,
+        .states[1]              = {
+                .enter                  = davinci_enter_idle,
+                .exit_latency           = 10,
+                .target_residency       = 100000,
+                .flags                  = CPUIDLE_FLAG_TIME_VALID,
+                .name                   = "DDR SR",
+                .desc                   = "WFI and DDR Self Refresh",
+        },
+        .state_count = DAVINCI_CPUIDLE_MAX_STATES,
 };
 
 static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device);
@@ -77,41 +109,10 @@ static struct davinci_ops davinci_states[DAVINCI_CPUIDLE_MAX_STATES] = {
         },
 };
 
-/* Actual code that puts the SoC in different idle states */
-static int davinci_enter_idle(struct cpuidle_device *dev,
-                                struct cpuidle_driver *drv,
-                                                int index)
-{
-        struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
-        struct davinci_ops *ops = cpuidle_get_statedata(state_usage);
-        struct timeval before, after;
-        int idle_time;
-
-        local_irq_disable();
-        do_gettimeofday(&before);
-
-        if (ops && ops->enter)
-                ops->enter(ops->flags);
-        /* Wait for interrupt state */
-        cpu_do_idle();
-        if (ops && ops->exit)
-                ops->exit(ops->flags);
-
-        do_gettimeofday(&after);
-        local_irq_enable();
-        idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
-                        (after.tv_usec - before.tv_usec);
-
-        dev->last_residency = idle_time;
-
-        return index;
-}
-
 static int __init davinci_cpuidle_probe(struct platform_device *pdev)
 {
         int ret;
         struct cpuidle_device *device;
-        struct cpuidle_driver *driver = &davinci_idle_driver;
         struct davinci_cpuidle_config *pdata = pdev->dev.platform_data;
 
         device = &per_cpu(davinci_cpuidle_device, smp_processor_id());
@@ -123,27 +124,11 @@ static int __init davinci_cpuidle_probe(struct platform_device *pdev)
 
         ddr2_reg_base = pdata->ddr2_ctlr_base;
 
-        /* Wait for interrupt state */
-        driver->states[0].enter = davinci_enter_idle;
-        driver->states[0].exit_latency = 1;
-        driver->states[0].target_residency = 10000;
-        driver->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
-        strcpy(driver->states[0].name, "WFI");
-        strcpy(driver->states[0].desc, "Wait for interrupt");
-
-        /* Wait for interrupt and DDR self refresh state */
-        driver->states[1].enter = davinci_enter_idle;
-        driver->states[1].exit_latency = 10;
-        driver->states[1].target_residency = 10000;
-        driver->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
-        strcpy(driver->states[1].name, "DDR SR");
-        strcpy(driver->states[1].desc, "WFI and DDR Self Refresh");
         if (pdata->ddr2_pdown)
                 davinci_states[1].flags |= DAVINCI_CPUIDLE_FLAGS_DDR2_PWDN;
         cpuidle_set_statedata(&device->states_usage[1], &davinci_states[1]);
 
         device->state_count = DAVINCI_CPUIDLE_MAX_STATES;
-        driver->state_count = DAVINCI_CPUIDLE_MAX_STATES;
 
         ret = cpuidle_register_driver(&davinci_idle_driver);
         if (ret) {
diff --git a/arch/arm/mach-davinci/include/mach/entry-macro.S b/arch/arm/mach-davinci/include/mach/entry-macro.S
index c1661d2feca9..768b3c060214 100644
--- a/arch/arm/mach-davinci/include/mach/entry-macro.S
+++ b/arch/arm/mach-davinci/include/mach/entry-macro.S
@@ -8,7 +8,6 @@
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
  */
-#include <mach/io.h>
 #include <mach/irqs.h>
 
                 .macro  get_irqnr_preamble, base, tmp
diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h
index 0209b1fc22a1..2184691ebc2f 100644
--- a/arch/arm/mach-davinci/include/mach/hardware.h
+++ b/arch/arm/mach-davinci/include/mach/hardware.h
@@ -30,10 +30,4 @@
 #define __IO_ADDRESS(x)                 ((x) + IO_OFFSET)
 #define IO_ADDRESS(pa)                  IOMEM(__IO_ADDRESS(pa))
 
-#ifdef __ASSEMBLER__
-#define IOMEM(x)                        x
-#else
-#define IOMEM(x)                        ((void __force __iomem *)(x))
-#endif
-
 #endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h
deleted file mode 100644
index b2267d1e1a71..000000000000
--- a/arch/arm/mach-davinci/include/mach/io.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * DaVinci IO address definitions
- *
- * Copied from include/asm/arm/arch-omap/io.h
- *
- * 2007 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __ASM_ARCH_IO_H
-#define __ASM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We don't actually have real ISA nor PCI buses, but there is so many
- * drivers out there that might just work if we fake them...
- */
-#define __io(a)                 __typesafe_io(a)
-#define __mem_pci(a)            (a)
-#define __mem_isa(a)            (a)
-
-#endif /* __ASM_ARCH_IO_H */
diff --git a/arch/arm/mach-davinci/include/mach/uncompress.h b/arch/arm/mach-davinci/include/mach/uncompress.h
index 9dc7cf9664fe..da2fb2c2155a 100644
--- a/arch/arm/mach-davinci/include/mach/uncompress.h
+++ b/arch/arm/mach-davinci/include/mach/uncompress.h
@@ -25,6 +25,8 @@
 
 #include <mach/serial.h>
 
+#define IOMEM(x)        ((void __force __iomem *)(x))
+
 u32 *uart;
 
 /* PORT_16C550A, in polled non-fifo mode */
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index e1969ce904dc..75da315b6587 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -19,11 +19,14 @@
 #include <linux/err.h>
 #include <linux/platform_device.h>
 
-#include <mach/hardware.h>
+#include <asm/sched_clock.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
+
 #include <mach/cputype.h>
+#include <mach/hardware.h>
 #include <mach/time.h>
+
 #include "clock.h"
 
 static struct clock_event_device clockevent_davinci;
@@ -272,19 +275,9 @@ static cycle_t read_cycles(struct clocksource *cs)
         return (cycles_t)timer32_read(t);
 }
 
-/*
- * Kernel assumes that sched_clock can be called early but may not have
- * things ready yet.
- */
-static cycle_t read_dummy(struct clocksource *cs)
-{
-        return 0;
-}
-
-
 static struct clocksource clocksource_davinci = {
         .rating         = 300,
-        .read           = read_dummy,
+        .read           = read_cycles,
         .mask           = CLOCKSOURCE_MASK(32),
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
@@ -292,12 +285,9 @@ static struct clocksource clocksource_davinci = {
 /*
  * Overwrite weak default sched_clock with something more precise
  */
-unsigned long long notrace sched_clock(void)
+static u32 notrace davinci_read_sched_clock(void)
 {
-        const cycle_t cyc = clocksource_davinci.read(&clocksource_davinci);
-
-        return clocksource_cyc2ns(cyc, clocksource_davinci.mult,
-                                clocksource_davinci.shift);
+        return timer32_read(&timers[TID_CLOCKSOURCE]);
 }
 
 /*
@@ -397,12 +387,14 @@ static void __init davinci_timer_init(void)
         davinci_clock_tick_rate = clk_get_rate(timer_clk);
 
         /* setup clocksource */
-        clocksource_davinci.read = read_cycles;
         clocksource_davinci.name = id_to_name[clocksource_id];
         if (clocksource_register_hz(&clocksource_davinci,
                                     davinci_clock_tick_rate))
                 printk(err, clocksource_davinci.name);
 
+        setup_sched_clock(davinci_read_sched_clock, 32,
+                          davinci_clock_tick_rate);
+
         /* setup clockevent */
         clockevent_davinci.name = id_to_name[timers[TID_CLOCKEVENT].id];
         clockevent_davinci.mult = div_sc(davinci_clock_tick_rate, NSEC_PER_SEC,
diff --git a/arch/arm/mach-dove/addr-map.c b/arch/arm/mach-dove/addr-map.c
index 98b8c83b09ab..2a06c0163418 100644
--- a/arch/arm/mach-dove/addr-map.c
+++ b/arch/arm/mach-dove/addr-map.c
@@ -14,6 +14,7 @@
 #include <linux/io.h>
 #include <asm/mach/arch.h>
 #include <asm/setup.h>
+#include <mach/dove.h>
 #include <plat/addr-map.h>
 #include "common.h"
 
diff --git a/arch/arm/mach-dove/include/mach/io.h b/arch/arm/mach-dove/include/mach/io.h
index eb4936ff90ad..29c8b85355a5 100644
--- a/arch/arm/mach-dove/include/mach/io.h
+++ b/arch/arm/mach-dove/include/mach/io.h
@@ -15,6 +15,5 @@
 
 #define __io(a)         ((void __iomem *)(((a) - DOVE_PCIE0_IO_BUS_BASE) + \
                                                  DOVE_PCIE0_IO_VIRT_BASE))
-#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 8c9f56a3e8ec..6f8068692edf 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -116,6 +116,20 @@ static void __init ebsa110_map_io(void)
         iotable_init(ebsa110_io_desc, ARRAY_SIZE(ebsa110_io_desc));
 }
 
+static void __iomem *ebsa110_ioremap_caller(unsigned long cookie, size_t size,
+                                            unsigned int flags, void *caller)
+{
+        return (void __iomem *)cookie;
+}
+
+static void ebsa110_iounmap(volatile void __iomem *io_addr)
+{}
+
+static void __init ebsa110_init_early(void)
+{
+        arch_ioremap_caller = ebsa110_ioremap_caller;
+        arch_iounmap = ebsa110_iounmap;
+}
 
 #define PIT_CTRL                (PIT_BASE + 0x0d)
 #define PIT_T2                  (PIT_BASE + 0x09)
@@ -312,6 +326,7 @@ MACHINE_START(EBSA110, "EBSA110")
         .reserve_lp2    = 1,
         .restart_mode   = 's',
         .map_io         = ebsa110_map_io,
+        .init_early     = ebsa110_init_early,
         .init_irq       = ebsa110_init_irq,
         .timer          = &ebsa110_timer,
         .restart        = ebsa110_restart,
diff --git a/arch/arm/mach-ebsa110/include/mach/io.h b/arch/arm/mach-ebsa110/include/mach/io.h
index 44679db672fb..11bb0799424b 100644
--- a/arch/arm/mach-ebsa110/include/mach/io.h
+++ b/arch/arm/mach-ebsa110/include/mach/io.h
@@ -62,15 +62,6 @@ void __writel(u32 val, void __iomem *addr);
 #define writew(v,b)             __writew(v,b)
 #define writel(v,b)             __writel(v,b)
 
-static inline void __iomem *__arch_ioremap(unsigned long cookie, size_t size,
-                                           unsigned int flags)
-{
-        return (void __iomem *)cookie;
-}
-
-#define __arch_ioremap          __arch_ioremap
-#define __arch_iounmap(cookie)  do { } while (0)
-
 extern void insb(unsigned int port, void *buf, int sz);
 extern void insw(unsigned int port, void *buf, int sz);
 extern void insl(unsigned int port, void *buf, int sz);
diff --git a/arch/arm/mach-ep93xx/include/mach/io.h b/arch/arm/mach-ep93xx/include/mach/io.h
deleted file mode 100644
index 594b77f21054..000000000000
--- a/arch/arm/mach-ep93xx/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * arch/arm/mach-ep93xx/include/mach/io.h
- */
-
-#ifndef __ASM_MACH_IO_H
-#define __ASM_MACH_IO_H
-
-#define IO_SPACE_LIMIT          0xffffffff
-
-#define __io(p)                 __typesafe_io(p)
-#define __mem_pci(p)            (p)
-
-/*
- * A typesafe __io() variation for variable initialisers
- */
-#ifdef __ASSEMBLER__
-#define IOMEM(p)                p
-#else
-#define IOMEM(p)                ((void __iomem __force *)(p))
-#endif
-
-#endif /* __ASM_MACH_IO_H */
diff --git a/arch/arm/mach-exynos/include/mach/io.h b/arch/arm/mach-exynos/include/mach/io.h
deleted file mode 100644
index d5478d247535..000000000000
--- a/arch/arm/mach-exynos/include/mach/io.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* linux/arch/arm/mach-exynos4/include/mach/io.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
- *
- * Based on arch/arm/mach-s5p6442/include/mach/io.h
- *
- * Default IO routines for EXYNOS4
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H __FILE__
-
-/* No current ISA/PCI bus support. */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#define IO_SPACE_LIMIT (0xFFFFFFFF)
-
-#endif /* __ASM_ARM_ARCH_IO_H */
diff --git a/arch/arm/mach-footbridge/include/mach/io.h b/arch/arm/mach-footbridge/include/mach/io.h
index 15a70396c27d..aba531eebbc6 100644
--- a/arch/arm/mach-footbridge/include/mach/io.h
+++ b/arch/arm/mach-footbridge/include/mach/io.h
@@ -27,18 +27,5 @@
  * Translation of various region addresses to virtual addresses
  */
 #define __io(a)                 ((void __iomem *)(PCIO_BASE + (a)))
-#if 1
-#define __mem_pci(a)            (a)
-#else
-
-static inline void __iomem *___mem_pci(void __iomem *p)
-{
-        unsigned long a = (unsigned long)p;
-        BUG_ON(a <= 0xc0000000 || a >= 0xe0000000);
-        return p;
-}
-
-#define __mem_pci(a)            ___mem_pci(a)
-#endif
 
 #endif
diff --git a/arch/arm/mach-gemini/include/mach/io.h b/arch/arm/mach-gemini/include/mach/io.h
deleted file mode 100644
index c548056b98b2..000000000000
--- a/arch/arm/mach-gemini/include/mach/io.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- *  Copyright (C) 2001-2006 Storlink, Corp.
- *  Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-#ifndef __MACH_IO_H
-#define __MACH_IO_H
-
-#define IO_SPACE_LIMIT  0xffffffff
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif /* __MACH_IO_H */
diff --git a/arch/arm/mach-h720x/include/mach/io.h b/arch/arm/mach-h720x/include/mach/io.h
deleted file mode 100644
index 2c8659c21a93..000000000000
--- a/arch/arm/mach-h720x/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * arch/arm/mach-h720x/include/mach/io.h
- *
- * Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
- *
- * Changelog:
- *
- *  09-19-2001  JJKIM
- *              Created from arch/arm/mach-l7200/include/mach/io.h
- *
- *  03-27-2003  Robert Schwebel <r.schwebel@pengutronix.de>:
- *              re-unified header files for h720x
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index 808b055289b2..410a112bb52e 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -35,7 +35,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
-#include <mach/irqs.h>
 
 #include "core.h"
 #include "sysregs.h"
diff --git a/arch/arm/mach-highbank/include/mach/io.h b/arch/arm/mach-highbank/include/mach/io.h
deleted file mode 100644
index 70cfa3ba7697..000000000000
--- a/arch/arm/mach-highbank/include/mach/io.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __MACH_IO_H
-#define __MACH_IO_H
-
-#define __io(a)         ({ (void)(a); __typesafe_io(0); })
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-highbank/include/mach/irqs.h b/arch/arm/mach-highbank/include/mach/irqs.h
deleted file mode 100644
index 9746aab14e9a..000000000000
--- a/arch/arm/mach-highbank/include/mach/irqs.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __MACH_IRQS_H
-#define __MACH_IRQS_H
-
-#define NR_IRQS                 192
-
-#endif
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 52359f80c42d..7561eca131b0 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -1,6 +1,3 @@
-config IMX_HAVE_DMA_V1
-        bool
-
 config HAVE_IMX_GPC
         bool
 
@@ -38,7 +35,6 @@ config SOC_IMX1
         bool
         select ARCH_MX1
         select CPU_ARM920T
-        select IMX_HAVE_DMA_V1
         select IMX_HAVE_IOMUX_V1
         select MXC_AVIC
 
@@ -46,7 +42,6 @@ config SOC_IMX21
         bool
         select MACH_MX21
         select CPU_ARM926T
-        select IMX_HAVE_DMA_V1
         select IMX_HAVE_IOMUX_V1
         select MXC_AVIC
 
@@ -61,7 +56,6 @@ config SOC_IMX27
         bool
         select MACH_MX27
         select CPU_ARM926T
-        select IMX_HAVE_DMA_V1
         select IMX_HAVE_IOMUX_V1
         select MXC_AVIC
 
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 35fc450fa263..ab939c5046c3 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -1,5 +1,3 @@
-obj-$(CONFIG_IMX_HAVE_DMA_V1) += dma-v1.o
-
 obj-$(CONFIG_SOC_IMX1) += clock-imx1.o mm-imx1.o
 obj-$(CONFIG_SOC_IMX21) += clock-imx21.o mm-imx21.o
 
diff --git a/arch/arm/mach-imx/dma-v1.c b/arch/arm/mach-imx/dma-v1.c
deleted file mode 100644
index 3189a6004cf9..000000000000
--- a/arch/arm/mach-imx/dma-v1.c
+++ /dev/null
@@ -1,845 +0,0 @@
-/*
- *  linux/arch/arm/plat-mxc/dma-v1.c
- *
- *  i.MX DMA registration and IRQ dispatching
- *
- * Copyright 2006 Pavel Pisa <pisa@cmp.felk.cvut.cz>
- * Copyright 2008 Juergen Beisert, <kernel@pengutronix.de>
- * Copyright 2008 Sascha Hauer, <s.hauer@pengutronix.de>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301, USA.
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/err.h>
-#include <linux/errno.h>
-#include <linux/clk.h>
-#include <linux/scatterlist.h>
-#include <linux/io.h>
-
-#include <asm/irq.h>
-#include <mach/hardware.h>
-#include <mach/dma-v1.h>
-
-#define DMA_DCR     0x00                /* Control Register */
-#define DMA_DISR    0x04                /* Interrupt status Register */
-#define DMA_DIMR    0x08                /* Interrupt mask Register */
-#define DMA_DBTOSR  0x0c                /* Burst timeout status Register */
-#define DMA_DRTOSR  0x10                /* Request timeout Register */
-#define DMA_DSESR   0x14                /* Transfer Error Status Register */
-#define DMA_DBOSR   0x18                /* Buffer overflow status Register */
-#define DMA_DBTOCR  0x1c                /* Burst timeout control Register */
-#define DMA_WSRA    0x40                /* W-Size Register A */
-#define DMA_XSRA    0x44                /* X-Size Register A */
-#define DMA_YSRA    0x48                /* Y-Size Register A */
-#define DMA_WSRB    0x4c                /* W-Size Register B */
-#define DMA_XSRB    0x50                /* X-Size Register B */
-#define DMA_YSRB    0x54                /* Y-Size Register B */
-#define DMA_SAR(x)  (0x80 + ((x) << 6)) /* Source Address Registers */
-#define DMA_DAR(x)  (0x84 + ((x) << 6)) /* Destination Address Registers */
-#define DMA_CNTR(x) (0x88 + ((x) << 6)) /* Count Registers */
-#define DMA_CCR(x)  (0x8c + ((x) << 6)) /* Control Registers */
-#define DMA_RSSR(x) (0x90 + ((x) << 6)) /* Request source select Registers */
-#define DMA_BLR(x)  (0x94 + ((x) << 6)) /* Burst length Registers */
-#define DMA_RTOR(x) (0x98 + ((x) << 6)) /* Request timeout Registers */
-#define DMA_BUCR(x) (0x98 + ((x) << 6)) /* Bus Utilization Registers */
-#define DMA_CCNR(x) (0x9C + ((x) << 6)) /* Channel counter Registers */
-
-#define DCR_DRST           (1<<1)
-#define DCR_DEN            (1<<0)
-#define DBTOCR_EN          (1<<15)
-#define DBTOCR_CNT(x)      ((x) & 0x7fff)
-#define CNTR_CNT(x)        ((x) & 0xffffff)
-#define CCR_ACRPT          (1<<14)
-#define CCR_DMOD_LINEAR    (0x0 << 12)
-#define CCR_DMOD_2D        (0x1 << 12)
-#define CCR_DMOD_FIFO      (0x2 << 12)
-#define CCR_DMOD_EOBFIFO   (0x3 << 12)
-#define CCR_SMOD_LINEAR    (0x0 << 10)
-#define CCR_SMOD_2D        (0x1 << 10)
-#define CCR_SMOD_FIFO      (0x2 << 10)
-#define CCR_SMOD_EOBFIFO   (0x3 << 10)
-#define CCR_MDIR_DEC       (1<<9)
-#define CCR_MSEL_B         (1<<8)
-#define CCR_DSIZ_32        (0x0 << 6)
-#define CCR_DSIZ_8         (0x1 << 6)
-#define CCR_DSIZ_16        (0x2 << 6)
-#define CCR_SSIZ_32        (0x0 << 4)
-#define CCR_SSIZ_8         (0x1 << 4)
-#define CCR_SSIZ_16        (0x2 << 4)
-#define CCR_REN            (1<<3)
-#define CCR_RPT            (1<<2)
-#define CCR_FRC            (1<<1)
-#define CCR_CEN            (1<<0)
-#define RTOR_EN            (1<<15)
-#define RTOR_CLK           (1<<14)
-#define RTOR_PSC           (1<<13)
-
-/*
- * struct imx_dma_channel - i.MX specific DMA extension
- * @name: name specified by DMA client
- * @irq_handler: client callback for end of transfer
- * @err_handler: client callback for error condition
- * @data: clients context data for callbacks
- * @dma_mode: direction of the transfer %DMA_MODE_READ or %DMA_MODE_WRITE
- * @sg: pointer to the actual read/written chunk for scatter-gather emulation
- * @resbytes: total residual number of bytes to transfer
- *            (it can be lower or same as sum of SG mapped chunk sizes)
- * @sgcount: number of chunks to be read/written
- *
- * Structure is used for IMX DMA processing. It would be probably good
- * @struct dma_struct in the future for external interfacing and use
- * @struct imx_dma_channel only as extension to it.
- */
-
-struct imx_dma_channel {
-        const char *name;
-        void (*irq_handler) (int, void *);
-        void (*err_handler) (int, void *, int errcode);
-        void (*prog_handler) (int, void *, struct scatterlist *);
-        void *data;
-        unsigned int dma_mode;
-        struct scatterlist *sg;
-        unsigned int resbytes;
-        int dma_num;
-
-        int in_use;
-
-        u32 ccr_from_device;
-        u32 ccr_to_device;
-
-        struct timer_list watchdog;
-
-        int hw_chaining;
-};
-
-static void __iomem *imx_dmav1_baseaddr;
-
-static void imx_dmav1_writel(unsigned val, unsigned offset)
-{
-        __raw_writel(val, imx_dmav1_baseaddr + offset);
-}
-
-static unsigned imx_dmav1_readl(unsigned offset)
-{
-        return __raw_readl(imx_dmav1_baseaddr + offset);
-}
-
-static struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS];
-
-static struct clk *dma_clk;
-
-static int imx_dma_hw_chain(struct imx_dma_channel *imxdma)
-{
-        if (cpu_is_mx27())
-                return imxdma->hw_chaining;
-        else
-                return 0;
-}
-
-/*
- * imx_dma_sg_next - prepare next chunk for scatter-gather DMA emulation
- */
-static inline int imx_dma_sg_next(int channel, struct scatterlist *sg)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-        unsigned long now;
-
-        if (!imxdma->name) {
-                printk(KERN_CRIT "%s: called for  not allocated channel %d\n",
-                       __func__, channel);
-                return 0;
-        }
-
-        now = min(imxdma->resbytes, sg->length);
-        if (imxdma->resbytes != IMX_DMA_LENGTH_LOOP)
-                imxdma->resbytes -= now;
-
-        if ((imxdma->dma_mode & DMA_MODE_MASK) == DMA_MODE_READ)
-                imx_dmav1_writel(sg->dma_address, DMA_DAR(channel));
-        else
-                imx_dmav1_writel(sg->dma_address, DMA_SAR(channel));
-
-        imx_dmav1_writel(now, DMA_CNTR(channel));
-
-        pr_debug("imxdma%d: next sg chunk dst 0x%08x, src 0x%08x, "
-                "size 0x%08x\n", channel,
-                 imx_dmav1_readl(DMA_DAR(channel)),
-                 imx_dmav1_readl(DMA_SAR(channel)),
-                 imx_dmav1_readl(DMA_CNTR(channel)));
-
-        return now;
-}
-
-/**
- * imx_dma_setup_single - setup i.MX DMA channel for linear memory to/from
- * device transfer
- *
- * @channel: i.MX DMA channel number
- * @dma_address: the DMA/physical memory address of the linear data block
- *              to transfer
- * @dma_length: length of the data block in bytes
- * @dev_addr: physical device port address
- * @dmamode: DMA transfer mode, %DMA_MODE_READ from the device to the memory
- *           or %DMA_MODE_WRITE from memory to the device
- *
- * Return value: if incorrect parameters are provided -%EINVAL.
- *              Zero indicates success.
- */
-int
-imx_dma_setup_single(int channel, dma_addr_t dma_address,
-                     unsigned int dma_length, unsigned int dev_addr,
-                     unsigned int dmamode)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-
-        imxdma->sg = NULL;
-        imxdma->dma_mode = dmamode;
-
-        if (!dma_address) {
-                printk(KERN_ERR "imxdma%d: imx_dma_setup_single null address\n",
-                       channel);
-                return -EINVAL;
-        }
-
-        if (!dma_length) {
-                printk(KERN_ERR "imxdma%d: imx_dma_setup_single zero length\n",
-                       channel);
-                return -EINVAL;
-        }
-
-        if ((dmamode & DMA_MODE_MASK) == DMA_MODE_READ) {
-                pr_debug("imxdma%d: %s dma_addressg=0x%08x dma_length=%d "
-                        "dev_addr=0x%08x for read\n",
-                        channel, __func__, (unsigned int)dma_address,
-                        dma_length, dev_addr);
-
-                imx_dmav1_writel(dev_addr, DMA_SAR(channel));
-                imx_dmav1_writel(dma_address, DMA_DAR(channel));
-                imx_dmav1_writel(imxdma->ccr_from_device, DMA_CCR(channel));
-        } else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) {
-                pr_debug("imxdma%d: %s dma_addressg=0x%08x dma_length=%d "
-                        "dev_addr=0x%08x for write\n",
-                        channel, __func__, (unsigned int)dma_address,
-                        dma_length, dev_addr);
-
-                imx_dmav1_writel(dma_address, DMA_SAR(channel));
-                imx_dmav1_writel(dev_addr, DMA_DAR(channel));
-                imx_dmav1_writel(imxdma->ccr_to_device,
-                                DMA_CCR(channel));
-        } else {
-                printk(KERN_ERR "imxdma%d: imx_dma_setup_single bad dmamode\n",
-                       channel);
-                return -EINVAL;
-        }
-
-        imx_dmav1_writel(dma_length, DMA_CNTR(channel));
-
-        return 0;
-}
-EXPORT_SYMBOL(imx_dma_setup_single);
-
-/**
- * imx_dma_setup_sg - setup i.MX DMA channel SG list to/from device transfer
- * @channel: i.MX DMA channel number
- * @sg: pointer to the scatter-gather list/vector
- * @sgcount: scatter-gather list hungs count
- * @dma_length: total length of the transfer request in bytes
- * @dev_addr: physical device port address
- * @dmamode: DMA transfer mode, %DMA_MODE_READ from the device to the memory
- *           or %DMA_MODE_WRITE from memory to the device
- *
- * The function sets up DMA channel state and registers to be ready for
- * transfer specified by provided parameters. The scatter-gather emulation
- * is set up according to the parameters.
- *
- * The full preparation of the transfer requires setup of more register
- * by the caller before imx_dma_enable() can be called.
- *
- * %BLR(channel) holds transfer burst length in bytes, 0 means 64 bytes
- *
- * %RSSR(channel) has to be set to the DMA request line source %DMA_REQ_xxx
- *
- * %CCR(channel) has to specify transfer parameters, the next settings is
- * typical for linear or simple scatter-gather transfers if %DMA_MODE_READ is
- * specified
- *
- * %CCR_DMOD_LINEAR | %CCR_DSIZ_32 | %CCR_SMOD_FIFO | %CCR_SSIZ_x
- *
- * The typical setup for %DMA_MODE_WRITE is specified by next options
- * combination
- *
- * %CCR_SMOD_LINEAR | %CCR_SSIZ_32 | %CCR_DMOD_FIFO | %CCR_DSIZ_x
- *
- * Be careful here and do not mistakenly mix source and target device
- * port sizes constants, they are really different:
- * %CCR_SSIZ_8, %CCR_SSIZ_16, %CCR_SSIZ_32,
- * %CCR_DSIZ_8, %CCR_DSIZ_16, %CCR_DSIZ_32
- *
- * Return value: if incorrect parameters are provided -%EINVAL.
- * Zero indicates success.
- */
-int
-imx_dma_setup_sg(int channel,
-                 struct scatterlist *sg, unsigned int sgcount,
-                 unsigned int dma_length, unsigned int dev_addr,
-                 unsigned int dmamode)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-
-        if (imxdma->in_use)
-                return -EBUSY;
-
-        imxdma->sg = sg;
-        imxdma->dma_mode = dmamode;
-        imxdma->resbytes = dma_length;
-
-        if (!sg || !sgcount) {
-                printk(KERN_ERR "imxdma%d: imx_dma_setup_sg empty sg list\n",
-                       channel);
-                return -EINVAL;
-        }
-
-        if (!sg->length) {
-                printk(KERN_ERR "imxdma%d: imx_dma_setup_sg zero length\n",
-                       channel);
-                return -EINVAL;
-        }
-
-        if ((dmamode & DMA_MODE_MASK) == DMA_MODE_READ) {
-                pr_debug("imxdma%d: %s sg=%p sgcount=%d total length=%d "
-                        "dev_addr=0x%08x for read\n",
-                        channel, __func__, sg, sgcount, dma_length, dev_addr);
-
-                imx_dmav1_writel(dev_addr, DMA_SAR(channel));
-                imx_dmav1_writel(imxdma->ccr_from_device, DMA_CCR(channel));
-        } else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) {
-                pr_debug("imxdma%d: %s sg=%p sgcount=%d total length=%d "
-                        "dev_addr=0x%08x for write\n",
-                        channel, __func__, sg, sgcount, dma_length, dev_addr);
-
-                imx_dmav1_writel(dev_addr, DMA_DAR(channel));
-                imx_dmav1_writel(imxdma->ccr_to_device, DMA_CCR(channel));
-        } else {
-                printk(KERN_ERR "imxdma%d: imx_dma_setup_sg bad dmamode\n",
-                       channel);
-                return -EINVAL;
-        }
-
-        imx_dma_sg_next(channel, sg);
-
-        return 0;
-}
-EXPORT_SYMBOL(imx_dma_setup_sg);
-
-int
-imx_dma_config_channel(int channel, unsigned int config_port,
-        unsigned int config_mem, unsigned int dmareq, int hw_chaining)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-        u32 dreq = 0;
-
-        imxdma->hw_chaining = 0;
-
-        if (hw_chaining) {
-                imxdma->hw_chaining = 1;
-                if (!imx_dma_hw_chain(imxdma))
-                        return -EINVAL;
-        }
-
-        if (dmareq)
-                dreq = CCR_REN;
-
-        imxdma->ccr_from_device = config_port | (config_mem << 2) | dreq;
-        imxdma->ccr_to_device = config_mem | (config_port << 2) | dreq;
-
-        imx_dmav1_writel(dmareq, DMA_RSSR(channel));
-
-        return 0;
-}
-EXPORT_SYMBOL(imx_dma_config_channel);
-
-void imx_dma_config_burstlen(int channel, unsigned int burstlen)
-{
-        imx_dmav1_writel(burstlen, DMA_BLR(channel));
-}
-EXPORT_SYMBOL(imx_dma_config_burstlen);
-
-/**
- * imx_dma_setup_handlers - setup i.MX DMA channel end and error notification
- * handlers
- * @channel: i.MX DMA channel number
- * @irq_handler: the pointer to the function called if the transfer
- *              ends successfully
- * @err_handler: the pointer to the function called if the premature
- *              end caused by error occurs
- * @data: user specified value to be passed to the handlers
- */
-int
-imx_dma_setup_handlers(int channel,
-                       void (*irq_handler) (int, void *),
-                       void (*err_handler) (int, void *, int),
-                       void *data)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-        unsigned long flags;
-
-        if (!imxdma->name) {
-                printk(KERN_CRIT "%s: called for  not allocated channel %d\n",
-                       __func__, channel);
-                return -ENODEV;
-        }
-
-        local_irq_save(flags);
-        imx_dmav1_writel(1 << channel, DMA_DISR);
-        imxdma->irq_handler = irq_handler;
-        imxdma->err_handler = err_handler;
-        imxdma->data = data;
-        local_irq_restore(flags);
-        return 0;
-}
-EXPORT_SYMBOL(imx_dma_setup_handlers);
-
-/**
- * imx_dma_setup_progression_handler - setup i.MX DMA channel progression
- * handlers
- * @channel: i.MX DMA channel number
- * @prog_handler: the pointer to the function called if the transfer progresses
- */
-int
-imx_dma_setup_progression_handler(int channel,
-                        void (*prog_handler) (int, void*, struct scatterlist*))
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-        unsigned long flags;
-
-        if (!imxdma->name) {
-                printk(KERN_CRIT "%s: called for  not allocated channel %d\n",
-                       __func__, channel);
-                return -ENODEV;
-        }
-
-        local_irq_save(flags);
-        imxdma->prog_handler = prog_handler;
-        local_irq_restore(flags);
-        return 0;
-}
-EXPORT_SYMBOL(imx_dma_setup_progression_handler);
-
-/**
- * imx_dma_enable - function to start i.MX DMA channel operation
- * @channel: i.MX DMA channel number
- *
- * The channel has to be allocated by driver through imx_dma_request()
- * or imx_dma_request_by_prio() function.
- * The transfer parameters has to be set to the channel registers through
- * call of the imx_dma_setup_single() or imx_dma_setup_sg() function
- * and registers %BLR(channel), %RSSR(channel) and %CCR(channel) has to
- * be set prior this function call by the channel user.
- */
-void imx_dma_enable(int channel)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-        unsigned long flags;
-
-        pr_debug("imxdma%d: imx_dma_enable\n", channel);
-
-        if (!imxdma->name) {
-                printk(KERN_CRIT "%s: called for  not allocated channel %d\n",
-                       __func__, channel);
-                return;
-        }
-
-        if (imxdma->in_use)
-                return;
-
-        local_irq_save(flags);
-
-        imx_dmav1_writel(1 << channel, DMA_DISR);
-        imx_dmav1_writel(imx_dmav1_readl(DMA_DIMR) & ~(1 << channel), DMA_DIMR);
-        imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) | CCR_CEN |
-                CCR_ACRPT, DMA_CCR(channel));
-
-        if ((cpu_is_mx21() || cpu_is_mx27()) &&
-                        imxdma->sg && imx_dma_hw_chain(imxdma)) {
-                imxdma->sg = sg_next(imxdma->sg);
-                if (imxdma->sg) {
-                        u32 tmp;
-                        imx_dma_sg_next(channel, imxdma->sg);
-                        tmp = imx_dmav1_readl(DMA_CCR(channel));
-                        imx_dmav1_writel(tmp | CCR_RPT | CCR_ACRPT,
-                                DMA_CCR(channel));
-                }
-        }
-        imxdma->in_use = 1;
-
-        local_irq_restore(flags);
-}
-EXPORT_SYMBOL(imx_dma_enable);
-
-/**
- * imx_dma_disable - stop, finish i.MX DMA channel operatin
- * @channel: i.MX DMA channel number
- */
-void imx_dma_disable(int channel)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-        unsigned long flags;
-
-        pr_debug("imxdma%d: imx_dma_disable\n", channel);
-
-        if (imx_dma_hw_chain(imxdma))
-                del_timer(&imxdma->watchdog);
-
-        local_irq_save(flags);
-        imx_dmav1_writel(imx_dmav1_readl(DMA_DIMR) | (1 << channel), DMA_DIMR);
-        imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) & ~CCR_CEN,
-                        DMA_CCR(channel));
-        imx_dmav1_writel(1 << channel, DMA_DISR);
-        imxdma->in_use = 0;
-        local_irq_restore(flags);
-}
-EXPORT_SYMBOL(imx_dma_disable);
-
-static void imx_dma_watchdog(unsigned long chno)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[chno];
-
-        imx_dmav1_writel(0, DMA_CCR(chno));
-        imxdma->in_use = 0;
-        imxdma->sg = NULL;
-
-        if (imxdma->err_handler)
-                imxdma->err_handler(chno, imxdma->data, IMX_DMA_ERR_TIMEOUT);
-}
-
-static irqreturn_t dma_err_handler(int irq, void *dev_id)
-{
-        int i, disr;
-        struct imx_dma_channel *imxdma;
-        unsigned int err_mask;
-        int errcode;
-
-        disr = imx_dmav1_readl(DMA_DISR);
-
-        err_mask = imx_dmav1_readl(DMA_DBTOSR) |
-                   imx_dmav1_readl(DMA_DRTOSR) |
-                   imx_dmav1_readl(DMA_DSESR)  |
-                   imx_dmav1_readl(DMA_DBOSR);
-
-        if (!err_mask)
-                return IRQ_HANDLED;
-
-        imx_dmav1_writel(disr & err_mask, DMA_DISR);
-
-        for (i = 0; i < IMX_DMA_CHANNELS; i++) {
-                if (!(err_mask & (1 << i)))
-                        continue;
-                imxdma = &imx_dma_channels[i];
-                errcode = 0;
-
-                if (imx_dmav1_readl(DMA_DBTOSR) & (1 << i)) {
-                        imx_dmav1_writel(1 << i, DMA_DBTOSR);
-                        errcode |= IMX_DMA_ERR_BURST;
-                }
-                if (imx_dmav1_readl(DMA_DRTOSR) & (1 << i)) {
-                        imx_dmav1_writel(1 << i, DMA_DRTOSR);
-                        errcode |= IMX_DMA_ERR_REQUEST;
-                }
-                if (imx_dmav1_readl(DMA_DSESR) & (1 << i)) {
-                        imx_dmav1_writel(1 << i, DMA_DSESR);
-                        errcode |= IMX_DMA_ERR_TRANSFER;
-                }
-                if (imx_dmav1_readl(DMA_DBOSR) & (1 << i)) {
-                        imx_dmav1_writel(1 << i, DMA_DBOSR);
-                        errcode |= IMX_DMA_ERR_BUFFER;
-                }
-                if (imxdma->name && imxdma->err_handler) {
-                        imxdma->err_handler(i, imxdma->data, errcode);
-                        continue;
-                }
-
-                imx_dma_channels[i].sg = NULL;
-
-                printk(KERN_WARNING
-                       "DMA timeout on channel %d (%s) -%s%s%s%s\n",
-                       i, imxdma->name,
-                       errcode & IMX_DMA_ERR_BURST ?    " burst" : "",
-                       errcode & IMX_DMA_ERR_REQUEST ?  " request" : "",
-                       errcode & IMX_DMA_ERR_TRANSFER ? " transfer" : "",
-                       errcode & IMX_DMA_ERR_BUFFER ?   " buffer" : "");
-        }
-        return IRQ_HANDLED;
-}
-
-static void dma_irq_handle_channel(int chno)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[chno];
-
-        if (!imxdma->name) {
-                /*
-                 * IRQ for an unregistered DMA channel:
-                 * let's clear the interrupts and disable it.
-                 */
-                printk(KERN_WARNING
-                       "spurious IRQ for DMA channel %d\n", chno);
-                return;
-        }
-
-        if (imxdma->sg) {
-                u32 tmp;
-                struct scatterlist *current_sg = imxdma->sg;
-                imxdma->sg = sg_next(imxdma->sg);
-
-                if (imxdma->sg) {
-                        imx_dma_sg_next(chno, imxdma->sg);
-
-                        tmp = imx_dmav1_readl(DMA_CCR(chno));
-
-                        if (imx_dma_hw_chain(imxdma)) {
-                                /* FIXME: The timeout should probably be
-                                 * configurable
-                                 */
-                                mod_timer(&imxdma->watchdog,
-                                        jiffies + msecs_to_jiffies(500));
-
-                                tmp |= CCR_CEN | CCR_RPT | CCR_ACRPT;
-                                imx_dmav1_writel(tmp, DMA_CCR(chno));
-                        } else {
-                                imx_dmav1_writel(tmp & ~CCR_CEN, DMA_CCR(chno));
-                                tmp |= CCR_CEN;
-                        }
-
-                        imx_dmav1_writel(tmp, DMA_CCR(chno));
-
-                        if (imxdma->prog_handler)
-                                imxdma->prog_handler(chno, imxdma->data,
-                                                current_sg);
-
-                        return;
-                }
-
-                if (imx_dma_hw_chain(imxdma)) {
-                        del_timer(&imxdma->watchdog);
-                        return;
-                }
-        }
-
-        imx_dmav1_writel(0, DMA_CCR(chno));
-        imxdma->in_use = 0;
-        if (imxdma->irq_handler)
-                imxdma->irq_handler(chno, imxdma->data);
-}
-
-static irqreturn_t dma_irq_handler(int irq, void *dev_id)
-{
-        int i, disr;
-
-        if (cpu_is_mx21() || cpu_is_mx27())
-                dma_err_handler(irq, dev_id);
-
-        disr = imx_dmav1_readl(DMA_DISR);
-
-        pr_debug("imxdma: dma_irq_handler called, disr=0x%08x\n",
-                     disr);
-
-        imx_dmav1_writel(disr, DMA_DISR);
-        for (i = 0; i < IMX_DMA_CHANNELS; i++) {
-                if (disr & (1 << i))
-                        dma_irq_handle_channel(i);
-        }
-
-        return IRQ_HANDLED;
-}
-
-/**
- * imx_dma_request - request/allocate specified channel number
- * @channel: i.MX DMA channel number
- * @name: the driver/caller own non-%NULL identification
- */
-int imx_dma_request(int channel, const char *name)
-{
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-        unsigned long flags;
-        int ret = 0;
-
-        /* basic sanity checks */
-        if (!name)
-                return -EINVAL;
-
-        if (channel >= IMX_DMA_CHANNELS) {
-                printk(KERN_CRIT "%s: called for  non-existed channel %d\n",
-                       __func__, channel);
-                return -EINVAL;
-        }
-
-        local_irq_save(flags);
-        if (imxdma->name) {
-                local_irq_restore(flags);
-                return -EBUSY;
-        }
-        memset(imxdma, 0, sizeof(*imxdma));
-        imxdma->name = name;
-        local_irq_restore(flags); /* request_irq() can block */
-
-        if (cpu_is_mx21() || cpu_is_mx27()) {
-                ret = request_irq(MX2x_INT_DMACH0 + channel,
-                                dma_irq_handler, 0, "DMA", NULL);
-                if (ret) {
-                        imxdma->name = NULL;
-                        pr_crit("Can't register IRQ %d for DMA channel %d\n",
-                                        MX2x_INT_DMACH0 + channel, channel);
-                        return ret;
-                }
-                init_timer(&imxdma->watchdog);
-                imxdma->watchdog.function = &imx_dma_watchdog;
-                imxdma->watchdog.data = channel;
-        }
-
-        return ret;
-}
-EXPORT_SYMBOL(imx_dma_request);
-
-/**
- * imx_dma_free - release previously acquired channel
- * @channel: i.MX DMA channel number
- */
-void imx_dma_free(int channel)
-{
-        unsigned long flags;
-        struct imx_dma_channel *imxdma = &imx_dma_channels[channel];
-
-        if (!imxdma->name) {
-                printk(KERN_CRIT
-                       "%s: trying to free free channel %d\n",
-                       __func__, channel);
-                return;
-        }
-
-        local_irq_save(flags);
-        /* Disable interrupts */
-        imx_dma_disable(channel);
-        imxdma->name = NULL;
-
-        if (cpu_is_mx21() || cpu_is_mx27())
-                free_irq(MX2x_INT_DMACH0 + channel, NULL);
-
-        local_irq_restore(flags);
-}
-EXPORT_SYMBOL(imx_dma_free);
-
-/**
- * imx_dma_request_by_prio - find and request some of free channels best
- * suiting requested priority
- * @channel: i.MX DMA channel number
- * @name: the driver/caller own non-%NULL identification
- *
- * This function tries to find a free channel in the specified priority group
- * if the priority cannot be achieved it tries to look for free channel
- * in the higher and then even lower priority groups.
- *
- * Return value: If there is no free channel to allocate, -%ENODEV is returned.
- *               On successful allocation channel is returned.
- */
-int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio)
-{
-        int i;
-        int best;
-
-        switch (prio) {
-        case (DMA_PRIO_HIGH):
-                best = 8;
-                break;
-        case (DMA_PRIO_MEDIUM):
-                best = 4;
-                break;
-        case (DMA_PRIO_LOW):
-        default:
-                best = 0;
-                break;
-        }
-
-        for (i = best; i < IMX_DMA_CHANNELS; i++)
-                if (!imx_dma_request(i, name))
-                        return i;
-
-        for (i = best - 1; i >= 0; i--)
-                if (!imx_dma_request(i, name))
-                        return i;
-
-        printk(KERN_ERR "%s: no free DMA channel found\n", __func__);
-
-        return -ENODEV;
-}
-EXPORT_SYMBOL(imx_dma_request_by_prio);
-
-static int __init imx_dma_init(void)
-{
-        int ret = 0;
-        int i;
-
-        if (cpu_is_mx1())
-                imx_dmav1_baseaddr = MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR);
-        else if (cpu_is_mx21())
-                imx_dmav1_baseaddr = MX21_IO_ADDRESS(MX21_DMA_BASE_ADDR);
-        else if (cpu_is_mx27())
-                imx_dmav1_baseaddr = MX27_IO_ADDRESS(MX27_DMA_BASE_ADDR);
-        else
-                return 0;
-
-        dma_clk = clk_get(NULL, "dma");
-        if (IS_ERR(dma_clk))
-                return PTR_ERR(dma_clk);
-        clk_enable(dma_clk);
-
-        /* reset DMA module */
-        imx_dmav1_writel(DCR_DRST, DMA_DCR);
-
-        if (cpu_is_mx1()) {
-                ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", NULL);
-                if (ret) {
-                        pr_crit("Wow!  Can't register IRQ for DMA\n");
-                        return ret;
-                }
-
-                ret = request_irq(MX1_DMA_ERR, dma_err_handler, 0, "DMA", NULL);
-                if (ret) {
-                        pr_crit("Wow!  Can't register ERRIRQ for DMA\n");
-                        free_irq(MX1_DMA_INT, NULL);
-                        return ret;
-                }
-        }
-
-        /* enable DMA module */
-        imx_dmav1_writel(DCR_DEN, DMA_DCR);
-
-        /* clear all interrupts */
-        imx_dmav1_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_DISR);
-
-        /* disable interrupts */
-        imx_dmav1_writel((1 << IMX_DMA_CHANNELS) - 1, DMA_DIMR);
-
-        for (i = 0; i < IMX_DMA_CHANNELS; i++) {
-                imx_dma_channels[i].sg = NULL;
-                imx_dma_channels[i].dma_num = i;
-        }
-
-        return ret;
-}
-
-arch_initcall(imx_dma_init);
diff --git a/arch/arm/mach-imx/include/mach/dma-v1.h b/arch/arm/mach-imx/include/mach/dma-v1.h
deleted file mode 100644
index ac6fd713828a..000000000000
--- a/arch/arm/mach-imx/include/mach/dma-v1.h
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- *  linux/arch/arm/mach-imx/include/mach/dma-v1.h
- *
- *  i.MX DMA registration and IRQ dispatching
- *
- * Copyright 2006 Pavel Pisa <pisa@cmp.felk.cvut.cz>
- * Copyright 2008 Juergen Beisert, <kernel@pengutronix.de>
- * Copyright 2008 Sascha Hauer, <s.hauer@pengutronix.de>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301, USA.
- */
-
-#ifndef __MACH_DMA_V1_H__
-#define __MACH_DMA_V1_H__
-
-#define imx_has_dma_v1()        (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27())
-
-#include <mach/dma.h>
-
-#define IMX_DMA_CHANNELS  16
-
-#define DMA_MODE_READ           0
-#define DMA_MODE_WRITE          1
-#define DMA_MODE_MASK           1
-
-#define MX1_DMA_REG(offset)     MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR + (offset))
-
-/* DMA Interrupt Mask Register */
-#define MX1_DMA_DIMR            MX1_DMA_REG(0x08)
-
-/* Channel Control Register */
-#define MX1_DMA_CCR(x)          MX1_DMA_REG(0x8c + ((x) << 6))
-
-#define IMX_DMA_MEMSIZE_32      (0 << 4)
-#define IMX_DMA_MEMSIZE_8       (1 << 4)
-#define IMX_DMA_MEMSIZE_16      (2 << 4)
-#define IMX_DMA_TYPE_LINEAR     (0 << 10)
-#define IMX_DMA_TYPE_2D         (1 << 10)
-#define IMX_DMA_TYPE_FIFO       (2 << 10)
-
-#define IMX_DMA_ERR_BURST     (1 << 0)
-#define IMX_DMA_ERR_REQUEST   (1 << 1)
-#define IMX_DMA_ERR_TRANSFER  (1 << 2)
-#define IMX_DMA_ERR_BUFFER    (1 << 3)
-#define IMX_DMA_ERR_TIMEOUT   (1 << 4)
-
-int
-imx_dma_config_channel(int channel, unsigned int config_port,
-        unsigned int config_mem, unsigned int dmareq, int hw_chaining);
-
-void
-imx_dma_config_burstlen(int channel, unsigned int burstlen);
-
-int
-imx_dma_setup_single(int channel, dma_addr_t dma_address,
-                unsigned int dma_length, unsigned int dev_addr,
-                unsigned int dmamode);
-
-
-/*
- * Use this flag as the dma_length argument to imx_dma_setup_sg()
- * to create an endless running dma loop. The end of the scatterlist
- * must be linked to the beginning for this to work.
- */
-#define IMX_DMA_LENGTH_LOOP     ((unsigned int)-1)
-
-int
-imx_dma_setup_sg(int channel, struct scatterlist *sg,
-                unsigned int sgcount, unsigned int dma_length,
-                unsigned int dev_addr, unsigned int dmamode);
-
-int
-imx_dma_setup_handlers(int channel,
-                void (*irq_handler) (int, void *),
-                void (*err_handler) (int, void *, int), void *data);
-
-int
-imx_dma_setup_progression_handler(int channel,
-                void (*prog_handler) (int, void*, struct scatterlist*));
-
-void imx_dma_enable(int channel);
-
-void imx_dma_disable(int channel);
-
-int imx_dma_request(int channel, const char *name);
-
-void imx_dma_free(int channel);
-
-int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio);
-
-#endif  /* __MACH_DMA_V1_H__ */
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 1912ab578676..74127389e7ab 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -62,8 +62,8 @@ static void imx3_idle(void)
                 : "=r" (reg));
 }
 
-static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
-                                  unsigned int mtype)
+static void __iomem *imx3_ioremap_caller(unsigned long phys_addr, size_t size,
+                                         unsigned int mtype, void *caller)
 {
         if (mtype == MT_DEVICE) {
                 /*
@@ -76,7 +76,7 @@ static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
                         mtype = MT_DEVICE_NONSHARED;
         }
 
-        return __arm_ioremap(phys_addr, size, mtype);
+        return __arm_ioremap_caller(phys_addr, size, mtype, caller);
 }
 
 void __init imx3_init_l2x0(void)
@@ -135,7 +135,7 @@ void __init imx31_init_early(void)
 {
         mxc_set_cpu_type(MXC_CPU_MX31);
         mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
-        imx_ioremap = imx3_ioremap;
+        arch_ioremap_caller = imx3_ioremap_caller;
         arm_pm_idle = imx3_idle;
 }
 
@@ -209,7 +209,7 @@ void __init imx35_init_early(void)
         mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
         mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
         arm_pm_idle = imx3_idle;
-        imx_ioremap = imx3_ioremap;
+        arch_ioremap_caller = imx3_ioremap_caller;
 }
 
 void __init mx35_init_irq(void)
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 1a65d77bd55d..eaf6c6366ffa 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -25,8 +25,9 @@
 
 #include <mach/hardware.h>
 #include <mach/platform.h>
-#include <asm/irq.h>
 #include <mach/cm.h>
+#include <mach/irqs.h>
+
 #include <asm/leds.h>
 #include <asm/mach-types.h>
 #include <asm/mach/time.h>
diff --git a/arch/arm/mach-integrator/include/mach/io.h b/arch/arm/mach-integrator/include/mach/io.h
index 37beed3fa3ed..8de70de3dd0a 100644
--- a/arch/arm/mach-integrator/include/mach/io.h
+++ b/arch/arm/mach-integrator/include/mach/io.h
@@ -29,6 +29,5 @@
 #define PCI_IO_VADDR            0xee000000
 
 #define __io(a)                 ((void __iomem *)(PCI_IO_VADDR + (a)))
-#define __mem_pci(a)            (a)
 
 #endif
diff --git a/arch/arm/mach-integrator/include/mach/irqs.h b/arch/arm/mach-integrator/include/mach/irqs.h
index 1fbe6d190222..a19a1a2fcf6b 100644
--- a/arch/arm/mach-integrator/include/mach/irqs.h
+++ b/arch/arm/mach-integrator/include/mach/irqs.h
@@ -78,5 +78,6 @@
 #define IRQ_SIC_CP_LMINT7               46
 #define IRQ_SIC_END                     46
 
-#define NR_IRQS                         47
+#define NR_IRQS_INTEGRATOR_AP           34
+#define NR_IRQS_INTEGRATOR_CP           47
 
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 21a1d6cbef40..871f148ffd72 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -38,12 +38,13 @@
 #include <mach/hardware.h>
 #include <mach/platform.h>
 #include <asm/hardware/arm_timer.h>
-#include <asm/irq.h>
 #include <asm/setup.h>
 #include <asm/param.h>          /* HZ */
 #include <asm/mach-types.h>
+#include <asm/sched_clock.h>
 
 #include <mach/lm.h>
+#include <mach/irqs.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/irq.h>
@@ -325,6 +326,11 @@ static void __init ap_init(void)
 
 static unsigned long timer_reload;
 
+static u32 notrace integrator_read_sched_clock(void)
+{
+        return -readl((void __iomem *) TIMER2_VA_BASE + TIMER_VALUE);
+}
+
 static void integrator_clocksource_init(unsigned long inrate)
 {
         void __iomem *base = (void __iomem *)TIMER2_VA_BASE;
@@ -341,6 +347,7 @@ static void integrator_clocksource_init(unsigned long inrate)
 
         clocksource_mmio_init(base + TIMER_VALUE, "timer2",
                         rate, 200, 16, clocksource_mmio_readl_down);
+        setup_sched_clock(integrator_read_sched_clock, 16, rate);
 }
 
 static void __iomem * const clkevt_base = (void __iomem *)TIMER1_VA_BASE;
@@ -468,6 +475,7 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
         .atag_offset    = 0x100,
         .reserve        = integrator_reserve,
         .map_io         = ap_map_io,
+        .nr_irqs        = NR_IRQS_INTEGRATOR_AP,
         .init_early     = integrator_init_early,
         .init_irq       = ap_init_irq,
         .timer          = &ap_timer,
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index be9ead4a3bcc..48a115a91d9d 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -26,7 +26,6 @@
 
 #include <mach/hardware.h>
 #include <mach/platform.h>
-#include <asm/irq.h>
 #include <asm/setup.h>
 #include <asm/mach-types.h>
 #include <asm/hardware/arm_timer.h>
@@ -34,6 +33,7 @@
 
 #include <mach/cm.h>
 #include <mach/lm.h>
+#include <mach/irqs.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/irq.h>
@@ -464,6 +464,7 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
         .atag_offset    = 0x100,
         .reserve        = integrator_reserve,
         .map_io         = intcp_map_io,
+        .nr_irqs        = NR_IRQS_INTEGRATOR_CP,
         .init_early     = intcp_init_early,
         .init_irq       = intcp_init_irq,
         .timer          = &cp_timer,
diff --git a/arch/arm/mach-integrator/pci.c b/arch/arm/mach-integrator/pci.c
index 36068f438f2b..f1ca9c122861 100644
--- a/arch/arm/mach-integrator/pci.c
+++ b/arch/arm/mach-integrator/pci.c
@@ -26,10 +26,11 @@
 #include <linux/interrupt.h>
 #include <linux/init.h>
 
-#include <asm/irq.h>
 #include <asm/mach/pci.h>
 #include <asm/mach-types.h>
 
+#include <mach/irqs.h>
+
 /* 
  * A small note about bridges and interrupts.  The DECchip 21050 (and
  * later) adheres to the PCI-PCI bridge specification.  This says that
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index 4be172c3cbe0..67e6f9a9d1a0 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -30,7 +30,8 @@
 
 #include <mach/hardware.h>
 #include <mach/platform.h>
-#include <asm/irq.h>
+#include <mach/irqs.h>
+
 #include <asm/signal.h>
 #include <asm/mach/pci.h>
 #include <asm/irq_regs.h>
diff --git a/arch/arm/mach-iop13xx/include/mach/io.h b/arch/arm/mach-iop13xx/include/mach/io.h
index dffb234bb967..f13188518025 100644
--- a/arch/arm/mach-iop13xx/include/mach/io.h
+++ b/arch/arm/mach-iop13xx/include/mach/io.h
@@ -22,20 +22,7 @@
 #define IO_SPACE_LIMIT 0xffffffff
 
 #define __io(a) __iop13xx_io(a)
-#define __mem_pci(a) (a)
-#define __mem_isa(a) (a)
 
 extern void __iomem * __iop13xx_io(unsigned long io_addr);
-extern void __iomem *__iop13xx_ioremap(unsigned long cookie, size_t size,
-        unsigned int mtype);
-extern void __iop13xx_iounmap(void __iomem *addr);
-
-extern u32 iop13xx_atue_mem_base;
-extern u32 iop13xx_atux_mem_base;
-extern size_t iop13xx_atue_mem_size;
-extern size_t iop13xx_atux_mem_size;
-
-#define __arch_ioremap  __iop13xx_ioremap
-#define __arch_iounmap  __iop13xx_iounmap
 
 #endif
diff --git a/arch/arm/mach-iop13xx/include/mach/iop13xx.h b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
index 07e9ff7adafb..e190dcd7d72d 100644
--- a/arch/arm/mach-iop13xx/include/mach/iop13xx.h
+++ b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
@@ -5,6 +5,7 @@
 /* The ATU offsets can change based on the strapping */
 extern u32 iop13xx_atux_pmmr_offset;
 extern u32 iop13xx_atue_pmmr_offset;
+void iop13xx_init_early(void);
 void iop13xx_init_irq(void);
 void iop13xx_map_io(void);
 void iop13xx_platform_init(void);
diff --git a/arch/arm/mach-iop13xx/io.c b/arch/arm/mach-iop13xx/io.c
index 48642e66c566..3c364198db9c 100644
--- a/arch/arm/mach-iop13xx/io.c
+++ b/arch/arm/mach-iop13xx/io.c
@@ -21,6 +21,8 @@
 #include <linux/io.h>
 #include <mach/hardware.h>
 
+#include "pci.h"
+
 void * __iomem __iop13xx_io(unsigned long io_addr)
 {
         void __iomem * io_virt;
@@ -40,8 +42,8 @@ void * __iomem __iop13xx_io(unsigned long io_addr)
 }
 EXPORT_SYMBOL(__iop13xx_io);
 
-void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size,
-        unsigned int mtype)
+static void __iomem *__iop13xx_ioremap_caller(unsigned long cookie,
+        size_t size, unsigned int mtype, void *caller)
 {
         void __iomem * retval;
 
@@ -76,17 +78,14 @@ void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size,
                 break;
         default:
                 retval = __arm_ioremap_caller(cookie, size, mtype,
-                                __builtin_return_address(0));
+                                caller);
         }
 
         return retval;
 }
-EXPORT_SYMBOL(__iop13xx_ioremap);
 
-void __iop13xx_iounmap(void __iomem *addr)
+static void __iop13xx_iounmap(volatile void __iomem *addr)
 {
-        extern void __iounmap(volatile void __iomem *addr);
-
         if (iop13xx_atue_mem_base)
                 if (addr >= (void __iomem *) iop13xx_atue_mem_base &&
                     addr < (void __iomem *) (iop13xx_atue_mem_base +
@@ -110,4 +109,9 @@ void __iop13xx_iounmap(void __iomem *addr)
 skip:
         return;
 }
-EXPORT_SYMBOL(__iop13xx_iounmap);
+
+void __init iop13xx_init_early(void)
+{
+        arch_ioremap_caller = __iop13xx_ioremap_caller;
+        arch_iounmap = __iop13xx_iounmap;
+}
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
index abaee8833588..5c96b73e6964 100644
--- a/arch/arm/mach-iop13xx/iq81340mc.c
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -92,6 +92,7 @@ static struct sys_timer iq81340mc_timer = {
 MACHINE_START(IQ81340MC, "Intel IQ81340MC")
         /* Maintainer: Dan Williams <dan.j.williams@intel.com> */
         .atag_offset    = 0x100,
+        .init_early     = iop13xx_init_early,
         .map_io         = iop13xx_map_io,
         .init_irq       = iop13xx_init_irq,
         .timer          = &iq81340mc_timer,
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
index 690916a09dc6..aa4dd750135a 100644
--- a/arch/arm/mach-iop13xx/iq81340sc.c
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -94,6 +94,7 @@ static struct sys_timer iq81340sc_timer = {
 MACHINE_START(IQ81340SC, "Intel IQ81340SC")
         /* Maintainer: Dan Williams <dan.j.williams@intel.com> */
         .atag_offset    = 0x100,
+        .init_early     = iop13xx_init_early,
         .map_io         = iop13xx_map_io,
         .init_irq       = iop13xx_init_irq,
         .timer          = &iq81340sc_timer,
diff --git a/arch/arm/mach-iop13xx/pci.h b/arch/arm/mach-iop13xx/pci.h
new file mode 100644
index 000000000000..c70cf5b41e31
--- /dev/null
+++ b/arch/arm/mach-iop13xx/pci.h
@@ -0,0 +1,6 @@
+#include <linux/types.h>
+
+extern u32 iop13xx_atue_mem_base;
+extern u32 iop13xx_atux_mem_base;
+extern size_t iop13xx_atue_mem_size;
+extern size_t iop13xx_atux_mem_size;
diff --git a/arch/arm/mach-iop32x/include/mach/io.h b/arch/arm/mach-iop32x/include/mach/io.h
index 2d88264b9863..e2ada265bb8d 100644
--- a/arch/arm/mach-iop32x/include/mach/io.h
+++ b/arch/arm/mach-iop32x/include/mach/io.h
@@ -15,6 +15,5 @@
 
 #define IO_SPACE_LIMIT          0xffffffff
 #define __io(p)         ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
-#define __mem_pci(a)            (a)
 
 #endif
diff --git a/arch/arm/mach-iop33x/include/mach/io.h b/arch/arm/mach-iop33x/include/mach/io.h
index a8a66fc8fbdb..f7c1b6595660 100644
--- a/arch/arm/mach-iop33x/include/mach/io.h
+++ b/arch/arm/mach-iop33x/include/mach/io.h
@@ -15,6 +15,5 @@
 
 #define IO_SPACE_LIMIT          0xffffffff
 #define __io(p)         ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p))
-#define __mem_pci(a)            (a)
 
 #endif
diff --git a/arch/arm/mach-ixp2000/include/mach/io.h b/arch/arm/mach-ixp2000/include/mach/io.h
index 859e584914d9..f6552d6f35ab 100644
--- a/arch/arm/mach-ixp2000/include/mach/io.h
+++ b/arch/arm/mach-ixp2000/include/mach/io.h
@@ -18,7 +18,6 @@
 #include <mach/hardware.h>
 
 #define IO_SPACE_LIMIT          0xffffffff
-#define __mem_pci(a)            (a)
 
 /*
  * The A? revisions of the IXP2000s assert byte lanes for PCI I/O
diff --git a/arch/arm/mach-ixp23xx/include/mach/io.h b/arch/arm/mach-ixp23xx/include/mach/io.h
index 4ce4353b9f72..a7aceb55c130 100644
--- a/arch/arm/mach-ixp23xx/include/mach/io.h
+++ b/arch/arm/mach-ixp23xx/include/mach/io.h
@@ -18,6 +18,5 @@
 #define IO_SPACE_LIMIT 0xffffffff
 
 #define __io(p)         ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT))
-#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-ixp4xx/avila-setup.c b/arch/arm/mach-ixp4xx/avila-setup.c
index a7277ad470a5..90e42e9982cb 100644
--- a/arch/arm/mach-ixp4xx/avila-setup.c
+++ b/arch/arm/mach-ixp4xx/avila-setup.c
@@ -165,6 +165,7 @@ static void __init avila_init(void)
 MACHINE_START(AVILA, "Gateworks Avila Network Platform")
         /* Maintainer: Deepak Saxena <dsaxena@plexity.net> */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
@@ -184,6 +185,7 @@ MACHINE_END
 MACHINE_START(LOFT, "Giant Shoulder Inc Loft board")
         /* Maintainer: Tom Billman <kernel@giantshoulderinc.com> */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index fa7c9c0e5672..ebbd7fc90eb4 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -31,6 +31,7 @@
 
 #include <mach/udc.h>
 #include <mach/hardware.h>
+#include <mach/io.h>
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
 #include <asm/page.h>
@@ -518,3 +519,35 @@ void ixp4xx_restart(char mode, const char *cmd)
                 *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE;
         }
 }
+
+#ifdef CONFIG_IXP4XX_INDIRECT_PCI
+/*
+ * In the case of using indirect PCI, we simply return the actual PCI
+ * address and our read/write implementation use that to drive the
+ * access registers. If something outside of PCI is ioremap'd, we
+ * fallback to the default.
+ */
+
+static void __iomem *ixp4xx_ioremap_caller(unsigned long addr, size_t size,
+                                           unsigned int mtype, void *caller)
+{
+        if (!is_pci_memory(addr))
+                return __arm_ioremap_caller(addr, size, mtype, caller);
+
+        return (void __iomem *)addr;
+}
+
+static void ixp4xx_iounmap(void __iomem *addr)
+{
+        if (!is_pci_memory((__force u32)addr))
+                __iounmap(addr);
+}
+
+void __init ixp4xx_init_early(void)
+{
+        arch_ioremap_caller = ixp4xx_ioremap_caller;
+        arch_iounmap = ixp4xx_iounmap;
+}
+#else
+void __init ixp4xx_init_early(void) {}
+#endif
diff --git a/arch/arm/mach-ixp4xx/coyote-setup.c b/arch/arm/mach-ixp4xx/coyote-setup.c
index a74f86ce8bcc..1b83110028d6 100644
--- a/arch/arm/mach-ixp4xx/coyote-setup.c
+++ b/arch/arm/mach-ixp4xx/coyote-setup.c
@@ -110,6 +110,7 @@ static void __init coyote_init(void)
 MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote")
         /* Maintainer: MontaVista Software, Inc. */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
@@ -129,6 +130,7 @@ MACHINE_END
 MACHINE_START(IXDPG425, "Intel IXDPG425")
         /* Maintainer: MontaVista Software, Inc. */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c
index 67be177b336a..97a0af8f1955 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-setup.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c
@@ -280,6 +280,7 @@ MACHINE_START(DSMG600, "D-Link DSM-G600 RevA")
         /* Maintainer: www.nslu2-linux.org */
         .atag_offset    = 0x100,
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &dsmg600_timer,
         .init_machine   = dsmg600_init,
diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c
index 6d5818285af8..9175a25a7511 100644
--- a/arch/arm/mach-ixp4xx/fsg-setup.c
+++ b/arch/arm/mach-ixp4xx/fsg-setup.c
@@ -270,6 +270,7 @@ static void __init fsg_init(void)
 MACHINE_START(FSG, "Freecom FSG-3")
         /* Maintainer: www.nslu2-linux.org */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
diff --git a/arch/arm/mach-ixp4xx/gateway7001-setup.c b/arch/arm/mach-ixp4xx/gateway7001-setup.c
index 7ecf9b28f1c0..033c71758953 100644
--- a/arch/arm/mach-ixp4xx/gateway7001-setup.c
+++ b/arch/arm/mach-ixp4xx/gateway7001-setup.c
@@ -97,6 +97,7 @@ static void __init gateway7001_init(void)
 MACHINE_START(GATEWAY7001, "Gateway 7001 AP")
         /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index 78ae12c46261..46bb924962ee 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -496,6 +496,7 @@ subsys_initcall(gmlr_pci_init);
 MACHINE_START(GORAMO_MLR, "MultiLink")
         /* Maintainer: Krzysztof Halasa */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
index a23f89391458..18ebc6be7969 100644
--- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c
+++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
@@ -165,6 +165,7 @@ static void __init gtwx5715_init(void)
 MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)")
         /* Maintainer: George Joseph */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
diff --git a/arch/arm/mach-ixp4xx/include/mach/hardware.h b/arch/arm/mach-ixp4xx/include/mach/hardware.h
index c30e7e923a73..034bb2a1b805 100644
--- a/arch/arm/mach-ixp4xx/include/mach/hardware.h
+++ b/arch/arm/mach-ixp4xx/include/mach/hardware.h
@@ -23,8 +23,6 @@
 #define PCIBIOS_MAX_MEM         0x4BFFFFFF
 #endif
 
-#define ARCH_HAS_DMA_SET_COHERENT_MASK
-
 /* Register locations and bits */
 #include "ixp4xx-regs.h"
 
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h
index ffb9d6afb89f..5cf30d1b78d2 100644
--- a/arch/arm/mach-ixp4xx/include/mach/io.h
+++ b/arch/arm/mach-ixp4xx/include/mach/io.h
@@ -39,11 +39,7 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
  *    but in some cases the performance hit is acceptable. In addition, you
  *    cannot mmap() PCI devices in this case.
  */
-#ifndef CONFIG_IXP4XX_INDIRECT_PCI
-
-#define __mem_pci(a)            (a)
-
-#else
+#ifdef  CONFIG_IXP4XX_INDIRECT_PCI
 
 /*
  * In the case of using indirect PCI, we simply return the actual PCI
@@ -57,24 +53,6 @@ static inline int is_pci_memory(u32 addr)
         return (addr >= PCIBIOS_MIN_MEM) && (addr <= 0x4FFFFFFF);
 }
 
-static inline void __iomem * __indirect_ioremap(unsigned long addr, size_t size,
-                                                unsigned int mtype)
-{
-        if (!is_pci_memory(addr))
-                return __arm_ioremap(addr, size, mtype);
-
-        return (void __iomem *)addr;
-}
-
-static inline void __indirect_iounmap(void __iomem *addr)
-{
-        if (!is_pci_memory((__force u32)addr))
-                __iounmap(addr);
-}
-
-#define __arch_ioremap                  __indirect_ioremap
-#define __arch_iounmap                  __indirect_iounmap
-
 #define writeb(v, p)                    __indirect_writeb(v, p)
 #define writew(v, p)                    __indirect_writew(v, p)
 #define writel(v, p)                    __indirect_writel(v, p)
diff --git a/arch/arm/mach-ixp4xx/include/mach/platform.h b/arch/arm/mach-ixp4xx/include/mach/platform.h
index df9250bbf13d..b66bedc64de1 100644
--- a/arch/arm/mach-ixp4xx/include/mach/platform.h
+++ b/arch/arm/mach-ixp4xx/include/mach/platform.h
@@ -121,6 +121,7 @@ extern unsigned long ixp4xx_timer_freq;
  * Functions used by platform-level setup code
  */
 extern void ixp4xx_map_io(void);
+extern void ixp4xx_init_early(void);
 extern void ixp4xx_init_irq(void);
 extern void ixp4xx_sys_init(void);
 extern void ixp4xx_timer_init(void);
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c
index 8a38b39999f8..3d742aee1773 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-setup.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c
@@ -254,6 +254,7 @@ static void __init ixdp425_init(void)
 MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
         /* Maintainer: MontaVista Software, Inc. */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
@@ -269,6 +270,7 @@ MACHINE_END
 MACHINE_START(IXDP465, "Intel IXDP465 Development Platform")
         /* Maintainer: MontaVista Software, Inc. */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
@@ -283,6 +285,7 @@ MACHINE_END
 MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform")
         /* Maintainer: MontaVista Software, Inc. */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
@@ -297,6 +300,7 @@ MACHINE_END
 MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform")
         /* Maintainer: MontaVista Software, Inc. */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
index 1010eb7b0083..33cb0955b6bf 100644
--- a/arch/arm/mach-ixp4xx/nas100d-setup.c
+++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
@@ -315,6 +315,7 @@ MACHINE_START(NAS100D, "Iomega NAS 100d")
         /* Maintainer: www.nslu2-linux.org */
         .atag_offset    = 0x100,
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .init_machine   = nas100d_init,
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
index aa355c360d57..e2903faaebb3 100644
--- a/arch/arm/mach-ixp4xx/nslu2-setup.c
+++ b/arch/arm/mach-ixp4xx/nslu2-setup.c
@@ -301,6 +301,7 @@ MACHINE_START(NSLU2, "Linksys NSLU2")
         /* Maintainer: www.nslu2-linux.org */
         .atag_offset    = 0x100,
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &nslu2_timer,
         .init_machine   = nslu2_init,
diff --git a/arch/arm/mach-ixp4xx/omixp-setup.c b/arch/arm/mach-ixp4xx/omixp-setup.c
index 0940869fcfdd..158ddb79821d 100644
--- a/arch/arm/mach-ixp4xx/omixp-setup.c
+++ b/arch/arm/mach-ixp4xx/omixp-setup.c
@@ -243,6 +243,7 @@ static void __init omixp_init(void)
 MACHINE_START(DEVIXP, "Omicron DEVIXP")
         .atag_offset    = 0x100,
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .init_machine   = omixp_init,
@@ -254,6 +255,7 @@ MACHINE_END
 MACHINE_START(MICCPT, "Omicron MICCPT")
         .atag_offset    = 0x100,
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .init_machine   = omixp_init,
@@ -268,6 +270,7 @@ MACHINE_END
 MACHINE_START(MIC256, "Omicron MIC256")
         .atag_offset    = 0x100,
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .init_machine   = omixp_init,
diff --git a/arch/arm/mach-ixp4xx/vulcan-setup.c b/arch/arm/mach-ixp4xx/vulcan-setup.c
index 9dec20683291..2798f435aaf4 100644
--- a/arch/arm/mach-ixp4xx/vulcan-setup.c
+++ b/arch/arm/mach-ixp4xx/vulcan-setup.c
@@ -237,6 +237,7 @@ static void __init vulcan_init(void)
 MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")
         /* Maintainer: Marc Zyngier <maz@misterjones.org> */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
diff --git a/arch/arm/mach-ixp4xx/wg302v2-setup.c b/arch/arm/mach-ixp4xx/wg302v2-setup.c
index 5ac0f0a0fd8c..a785175b115b 100644
--- a/arch/arm/mach-ixp4xx/wg302v2-setup.c
+++ b/arch/arm/mach-ixp4xx/wg302v2-setup.c
@@ -98,6 +98,7 @@ static void __init wg302v2_init(void)
 MACHINE_START(WG302V2, "Netgear WG302 v2 / WAG302 v2")
         /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
         .map_io         = ixp4xx_map_io,
+        .init_early     = ixp4xx_init_early,
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
diff --git a/arch/arm/mach-kirkwood/cpuidle.c b/arch/arm/mach-kirkwood/cpuidle.c
index 7088180b018b..0f1710941878 100644
--- a/arch/arm/mach-kirkwood/cpuidle.c
+++ b/arch/arm/mach-kirkwood/cpuidle.c
@@ -20,77 +20,47 @@
 #include <linux/io.h>
 #include <linux/export.h>
 #include <asm/proc-fns.h>
+#include <asm/cpuidle.h>
 #include <mach/kirkwood.h>
 
 #define KIRKWOOD_MAX_STATES     2
 
-static struct cpuidle_driver kirkwood_idle_driver = {
-        .name =         "kirkwood_idle",
-        .owner =        THIS_MODULE,
-};
-
-static DEFINE_PER_CPU(struct cpuidle_device, kirkwood_cpuidle_device);
-
 /* Actual code that puts the SoC in different idle states */
 static int kirkwood_enter_idle(struct cpuidle_device *dev,
                                 struct cpuidle_driver *drv,
                                int index)
 {
-        struct timeval before, after;
-        int idle_time;
-
-        local_irq_disable();
-        do_gettimeofday(&before);
-        if (index == 0)
-                /* Wait for interrupt state */
-                cpu_do_idle();
-        else if (index == 1) {
-                /*
-                 * Following write will put DDR in self refresh.
-                 * Note that we have 256 cycles before DDR puts it
-                 * self in self-refresh, so the wait-for-interrupt
-                 * call afterwards won't get the DDR from self refresh
-                 * mode.
-                 */
-                writel(0x7, DDR_OPERATION_BASE);
-                cpu_do_idle();
-        }
-        do_gettimeofday(&after);
-        local_irq_enable();
-        idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
-                        (after.tv_usec - before.tv_usec);
-
-        /* Update last residency */
-        dev->last_residency = idle_time;
+        writel(0x7, DDR_OPERATION_BASE);
+        cpu_do_idle();
 
         return index;
 }
 
+static struct cpuidle_driver kirkwood_idle_driver = {
+        .name                   = "kirkwood_idle",
+        .owner                  = THIS_MODULE,
+        .en_core_tk_irqen       = 1,
+        .states[0]              = ARM_CPUIDLE_WFI_STATE,
+        .states[1]              = {
+                .enter                  = kirkwood_enter_idle,
+                .exit_latency           = 10,
+                .target_residency       = 100000,
+                .flags                  = CPUIDLE_FLAG_TIME_VALID,
+                .name                   = "DDR SR",
+                .desc                   = "WFI and DDR Self Refresh",
+        },
+        .state_count = KIRKWOOD_MAX_STATES,
+};
+
+static DEFINE_PER_CPU(struct cpuidle_device, kirkwood_cpuidle_device);
+
 /* Initialize CPU idle by registering the idle states */
 static int kirkwood_init_cpuidle(void)
 {
         struct cpuidle_device *device;
-        struct cpuidle_driver *driver = &kirkwood_idle_driver;
 
         device = &per_cpu(kirkwood_cpuidle_device, smp_processor_id());
         device->state_count = KIRKWOOD_MAX_STATES;
-        driver->state_count = KIRKWOOD_MAX_STATES;
-
-        /* Wait for interrupt state */
-        driver->states[0].enter = kirkwood_enter_idle;
-        driver->states[0].exit_latency = 1;
-        driver->states[0].target_residency = 10000;
-        driver->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
-        strcpy(driver->states[0].name, "WFI");
-        strcpy(driver->states[0].desc, "Wait for interrupt");
-
-        /* Wait for interrupt and DDR self refresh state */
-        driver->states[1].enter = kirkwood_enter_idle;
-        driver->states[1].exit_latency = 10;
-        driver->states[1].target_residency = 10000;
-        driver->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
-        strcpy(driver->states[1].name, "DDR SR");
-        strcpy(driver->states[1].desc, "WFI and DDR Self Refresh");
 
         cpuidle_register_driver(&kirkwood_idle_driver);
         if (cpuidle_register_device(device)) {
diff --git a/arch/arm/mach-kirkwood/include/mach/io.h b/arch/arm/mach-kirkwood/include/mach/io.h
index 49dd0cb5e166..5d0ab61700d2 100644
--- a/arch/arm/mach-kirkwood/include/mach/io.h
+++ b/arch/arm/mach-kirkwood/include/mach/io.h
@@ -20,7 +20,5 @@ static inline void __iomem *__io(unsigned long addr)
 }
 
 #define __io(a)                 __io(a)
-#define __mem_pci(a)            (a)
-
 
 #endif
diff --git a/arch/arm/mach-ks8695/include/mach/io.h b/arch/arm/mach-ks8695/include/mach/io.h
deleted file mode 100644
index a7a63ac3ba4e..000000000000
--- a/arch/arm/mach-ks8695/include/mach/io.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-ks8695/include/mach/io.h
- *
- * Copyright (C) 2006 Andrew Victor
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_IO_H
-#define __ASM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT          0xffffffff
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-lpc32xx/include/mach/io.h b/arch/arm/mach-lpc32xx/include/mach/io.h
deleted file mode 100644
index 9b59ab5cef89..000000000000
--- a/arch/arm/mach-lpc32xx/include/mach/io.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * arch/arm/mach-lpc32xx/include/mach/io.h
- *
- * Author: Kevin Wells <kevin.wells@nxp.com>
- *
- * Copyright (C) 2010 NXP Semiconductors
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT  0xffffffff
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 3588a5584153..bf5d8e195c3e 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -23,6 +23,7 @@
 #include <mach/addr-map.h>
 #include <mach/mfp-pxa168.h>
 #include <mach/pxa168.h>
+#include <mach/irqs.h>
 #include <video/pxa168fb.h>
 #include <linux/input.h>
 #include <plat/pxa27x_keypad.h>
@@ -239,7 +240,7 @@ static void __init common_init(void)
 
 MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
         .map_io         = mmp_map_io,
-        .nr_irqs        = IRQ_BOARD_START,
+        .nr_irqs        = MMP_NR_IRQS,
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = common_init,
@@ -248,7 +249,7 @@ MACHINE_END
 
 MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
         .map_io         = mmp_map_io,
-        .nr_irqs        = IRQ_BOARD_START,
+        .nr_irqs        = MMP_NR_IRQS,
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = common_init,
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
index b148a9dc5a44..603542ae6fbd 100644
--- a/arch/arm/mach-mmp/avengers_lite.c
+++ b/arch/arm/mach-mmp/avengers_lite.c
@@ -43,6 +43,7 @@ static void __init avengers_lite_init(void)
 
 MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
         .map_io         = mmp_map_io,
+        .nr_irqs        = MMP_NR_IRQS,
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = avengers_lite_init,
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
index d839fe6421e6..5cb769cd26d9 100644
--- a/arch/arm/mach-mmp/brownstone.c
+++ b/arch/arm/mach-mmp/brownstone.c
@@ -28,7 +28,7 @@
 
 #include "common.h"
 
-#define BROWNSTONE_NR_IRQS      (IRQ_BOARD_START + 40)
+#define BROWNSTONE_NR_IRQS      (MMP_NR_IRQS + 40)
 
 #define GPIO_5V_ENABLE          (89)
 
@@ -158,7 +158,7 @@ static struct platform_device brownstone_v_5vp_device = {
 };
 
 static struct max8925_platform_data brownstone_max8925_info = {
-        .irq_base               = IRQ_BOARD_START,
+        .irq_base               = MMP_NR_IRQS,
 };
 
 static struct i2c_board_info brownstone_twsi1_info[] = {
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index 2ee8cd7829dd..8059cc0905c6 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -23,10 +23,11 @@
 #include <mach/addr-map.h>
 #include <mach/mfp-mmp2.h>
 #include <mach/mmp2.h>
+#include <mach/irqs.h>
 
 #include "common.h"
 
-#define FLINT_NR_IRQS   (IRQ_BOARD_START + 48)
+#define FLINT_NR_IRQS   (MMP_NR_IRQS + 48)
 
 static unsigned long flint_pin_config[] __initdata = {
         /* UART1 */
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 87765467de63..f516e74ce0d5 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -191,7 +191,7 @@ static void __init gplugd_init(void)
 
 MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
         .map_io         = mmp_map_io,
-        .nr_irqs        = IRQ_BOARD_START,
+        .nr_irqs        = MMP_NR_IRQS,
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = gplugd_init,
diff --git a/arch/arm/mach-mmp/include/mach/addr-map.h b/arch/arm/mach-mmp/include/mach/addr-map.h
index 3e404acd6ff4..b1ece08174e8 100644
--- a/arch/arm/mach-mmp/include/mach/addr-map.h
+++ b/arch/arm/mach-mmp/include/mach/addr-map.h
@@ -11,12 +11,6 @@
 #ifndef __ASM_MACH_ADDR_MAP_H
 #define __ASM_MACH_ADDR_MAP_H
 
-#ifndef __ASSEMBLER__
-#define IOMEM(x)        ((void __iomem *)(x))
-#else
-#define IOMEM(x)        (x)
-#endif
-
 /* APB - Application Subsystem Peripheral Bus
  *
  * NOTE: the DMA controller registers are actually on the AXI fabric #1
diff --git a/arch/arm/mach-mmp/include/mach/io.h b/arch/arm/mach-mmp/include/mach/io.h
deleted file mode 100644
index e7adf3d012c1..000000000000
--- a/arch/arm/mach-mmp/include/mach/io.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * linux/arch/arm/mach-mmp/include/mach/io.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_MACH_IO_H
-#define __ASM_MACH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We don't actually have real ISA nor PCI buses, but there is so many
- * drivers out there that might just work if we fake them...
- */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif /* __ASM_MACH_IO_H */
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
index 34635a0bbb59..d0e746626a3d 100644
--- a/arch/arm/mach-mmp/include/mach/irqs.h
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -223,7 +223,6 @@
 #define MMP_GPIO_TO_IRQ(gpio)           (IRQ_GPIO_START + (gpio))
 
 #define IRQ_BOARD_START                 (IRQ_GPIO_START + MMP_NR_BUILTIN_GPIO)
-
-#define NR_IRQS                         (IRQ_BOARD_START)
+#define MMP_NR_IRQS                     IRQ_BOARD_START
 
 #endif /* __ASM_MACH_IRQS_H */
diff --git a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c
index d21c5441a3d0..7895d277421e 100644
--- a/arch/arm/mach-mmp/irq-mmp2.c
+++ b/arch/arm/mach-mmp/irq-mmp2.c
@@ -15,6 +15,7 @@
 #include <linux/irq.h>
 #include <linux/io.h>
 
+#include <mach/irqs.h>
 #include <mach/regs-icu.h>
 #include <mach/mmp2.h>
 
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
index 96cf5c8fe47d..ff73249884d0 100644
--- a/arch/arm/mach-mmp/jasper.c
+++ b/arch/arm/mach-mmp/jasper.c
@@ -19,6 +19,7 @@
 #include <linux/mfd/max8925.h>
 #include <linux/interrupt.h>
 
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <mach/addr-map.h>
@@ -27,7 +28,7 @@
 
 #include "common.h"
 
-#define JASPER_NR_IRQS          (IRQ_BOARD_START + 48)
+#define JASPER_NR_IRQS          (MMP_NR_IRQS + 48)
 
 static unsigned long jasper_pin_config[] __initdata = {
         /* UART1 */
@@ -135,7 +136,7 @@ static struct max8925_power_pdata jasper_power_data = {
 static struct max8925_platform_data jasper_max8925_info = {
         .backlight              = &jasper_backlight_data,
         .power                  = &jasper_power_data,
-        .irq_base               = IRQ_BOARD_START,
+        .irq_base               = MMP_NR_IRQS,
 };
 
 static struct i2c_board_info jasper_twsi1_info[] = {
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index bc97170125bf..b28f9084dfff 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -101,6 +101,7 @@ static void __init tavorevb_init(void)
 
 MACHINE_START(TAVOREVB, "PXA910 Evaluation Board (aka TavorEVB)")
         .map_io         = mmp_map_io,
+        .nr_irqs        = MMP_NR_IRQS,
         .init_irq       = pxa910_init_irq,
         .timer          = &pxa910_timer,
         .init_machine   = tavorevb_init,
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c
index 0523e422990e..42bef6674ecf 100644
--- a/arch/arm/mach-mmp/teton_bga.c
+++ b/arch/arm/mach-mmp/teton_bga.c
@@ -26,6 +26,7 @@
 #include <mach/mfp-pxa168.h>
 #include <mach/pxa168.h>
 #include <mach/teton_bga.h>
+#include <mach/irqs.h>
 
 #include "common.h"
 
@@ -83,7 +84,7 @@ static void __init teton_bga_init(void)
 
 MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform")
         .map_io         = mmp_map_io,
-        .nr_irqs        = IRQ_BOARD_START,
+        .nr_irqs        = MMP_NR_IRQS,
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = teton_bga_init,
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index e72c709da44f..3fc9ed21f97d 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -38,7 +38,7 @@
  * 16 board interrupts -- PCA9575 GPIO expander
  * 24 board interrupts -- 88PM860x PMIC
  */
-#define TTCDKB_NR_IRQS          (IRQ_BOARD_START + 16 + 16 + 24)
+#define TTCDKB_NR_IRQS          (MMP_NR_IRQS + 16 + 16 + 24)
 
 static unsigned long ttc_dkb_pin_config[] __initdata = {
         /* UART2 */
@@ -131,7 +131,7 @@ static struct platform_device *ttc_dkb_devices[] = {
 static struct pca953x_platform_data max7312_data[] = {
         {
                 .gpio_base      = TTCDKB_GPIO_EXT0(0),
-                .irq_base       = IRQ_BOARD_START,
+                .irq_base       = MMP_NR_IRQS,
         },
 };
 
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index a60ab6d04ec5..3698a370d636 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -68,6 +68,11 @@ static struct platform_device *devices[] __initdata = {
 
 extern struct sys_timer msm_timer;
 
+static void __init halibut_init_early(void)
+{
+        arch_ioremap_caller = __msm_ioremap_caller;
+}
+
 static void __init halibut_init_irq(void)
 {
         msm_init_irq();
@@ -96,6 +101,7 @@ MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)")
         .atag_offset    = 0x100,
         .fixup          = halibut_fixup,
         .map_io         = halibut_map_io,
+        .init_early     = halibut_init_early,
         .init_irq       = halibut_init_irq,
         .init_machine   = halibut_init,
         .timer          = &msm_timer,
diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c
index 6b9b227c87c5..5414f76ec0a9 100644
--- a/arch/arm/mach-msm/board-trout.c
+++ b/arch/arm/mach-msm/board-trout.c
@@ -43,6 +43,11 @@ static struct platform_device *devices[] __initdata = {
 
 extern struct sys_timer msm_timer;
 
+static void __init trout_init_early(void)
+{
+        arch_ioremap_caller = __msm_ioremap_caller;
+}
+
 static void __init trout_init_irq(void)
 {
         msm_init_irq();
@@ -96,6 +101,7 @@ MACHINE_START(TROUT, "HTC Dream")
         .atag_offset    = 0x100,
         .fixup          = trout_fixup,
         .map_io         = trout_map_io,
+        .init_early     = trout_init_early,
         .init_irq       = trout_init_irq,
         .init_machine   = trout_init,
         .timer          = &msm_timer,
diff --git a/arch/arm/mach-msm/include/mach/io.h b/arch/arm/mach-msm/include/mach/io.h
deleted file mode 100644
index dc1b928745e9..000000000000
--- a/arch/arm/mach-msm/include/mach/io.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/* arch/arm/mach-msm/include/mach/io.h
- *
- * Copyright (C) 2007 Google, Inc.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __arch_ioremap __msm_ioremap
-#define __arch_iounmap __iounmap
-
-void __iomem *__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype);
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-void msm_map_qsd8x50_io(void);
-void msm_map_msm7x30_io(void);
-void msm_map_msm8x60_io(void);
-void msm_map_msm8960_io(void);
-
-extern unsigned int msm_shared_ram_phys;
-
-#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
index 8af46123dab6..6c4046c21296 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
@@ -38,12 +38,6 @@
  *
  */
 
-#ifdef __ASSEMBLY__
-#define IOMEM(x)        x
-#else
-#define IOMEM(x)        ((void __force __iomem *)(x))
-#endif
-
 #define MSM_VIC_BASE          IOMEM(0xE0000000)
 #define MSM_VIC_PHYS          0xC0000000
 #define MSM_VIC_SIZE          SZ_4K
@@ -111,5 +105,11 @@
 #define MSM_AD5_PHYS          0xAC000000
 #define MSM_AD5_SIZE          (SZ_1M*13)
 
+#ifndef __ASSEMBLY__
+
+extern void __iomem *__msm_ioremap_caller(unsigned long phys_addr, size_t size,
+                                          unsigned int mtype, void *caller);
+
+#endif
 
 #endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
index 198202c267c8..f944fe65a657 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
@@ -100,4 +100,8 @@
 #define MSM_HSUSB_PHYS        0xA3600000
 #define MSM_HSUSB_SIZE        SZ_1K
 
+#ifndef __ASSEMBLY__
+extern void msm_map_msm7x30_io(void);
+#endif
+
 #endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
index 800b55767e6b..a1752c0284fc 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
@@ -50,4 +50,8 @@
 #define MSM_DEBUG_UART_PHYS     0x16440000
 #endif
 
+#ifndef __ASSEMBLY__
+extern void msm_map_msm8960_io(void);
+#endif
+
 #endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
index 0faa894729b7..da77cc1d545d 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
@@ -122,4 +122,8 @@
 #define MSM_SDC4_PHYS          0xA0600000
 #define MSM_SDC4_SIZE          SZ_4K
 
+#ifndef __ASSEMBLY__
+extern void msm_map_qsd8x50_io(void);
+#endif
+
 #endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
index 54e12caa8d86..5aed57dc808c 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
@@ -67,4 +67,8 @@
 #define MSM_DEBUG_UART_PHYS     0x19C40000
 #endif
 
+#ifndef __ASSEMBLY__
+extern void msm_map_msm8x60_io(void);
+#endif
+
 #endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index 90682f4599d3..00afdfb8c38f 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -37,12 +37,6 @@
  *
  */
 
-#ifdef __ASSEMBLY__
-#define IOMEM(x)        x
-#else
-#define IOMEM(x)        ((void __force __iomem *)(x))
-#endif
-
 #if defined(CONFIG_ARCH_MSM7X30)
 #include "msm_iomap-7x30.h"
 #elif defined(CONFIG_ARCH_QSD8X50)
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 578b04e42deb..a1e7b1168850 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -172,8 +172,8 @@ void __init msm_map_msm7x30_io(void)
 }
 #endif /* CONFIG_ARCH_MSM7X30 */
 
-void __iomem *
-__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
+void __iomem *__msm_ioremap_caller(unsigned long phys_addr, size_t size,
+                                   unsigned int mtype, void *caller)
 {
         if (mtype == MT_DEVICE) {
                 /* The peripherals in the 88000000 - D0000000 range
@@ -184,7 +184,5 @@ __msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
                         mtype = MT_DEVICE_NONSHARED;
         }
 
-        return __arm_ioremap_caller(phys_addr, size, mtype,
-                __builtin_return_address(0));
+        return __arm_ioremap_caller(phys_addr, size, mtype, caller);
 }
-EXPORT_SYMBOL(__msm_ioremap);
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 75f4be40b3e5..812808254936 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -24,6 +24,7 @@
 #include <asm/mach/time.h>
 #include <asm/hardware/gic.h>
 #include <asm/localtimer.h>
+#include <asm/sched_clock.h>
 
 #include <mach/msm_iomap.h>
 #include <mach/cpu.h>
@@ -105,12 +106,12 @@ static union {
 
 static void __iomem *source_base;
 
-static cycle_t msm_read_timer_count(struct clocksource *cs)
+static notrace cycle_t msm_read_timer_count(struct clocksource *cs)
 {
         return readl_relaxed(source_base + TIMER_COUNT_VAL);
 }
 
-static cycle_t msm_read_timer_count_shift(struct clocksource *cs)
+static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs)
 {
         /*
          * Shift timer count down by a constant due to unreliable lower bits
@@ -166,6 +167,11 @@ static struct local_timer_ops msm_local_timer_ops __cpuinitdata = {
 };
 #endif /* CONFIG_LOCAL_TIMERS */
 
+static notrace u32 msm_sched_clock_read(void)
+{
+        return msm_clocksource.read(&msm_clocksource);
+}
+
 static void __init msm_timer_init(void)
 {
         struct clock_event_device *ce = &msm_clockevent;
@@ -232,6 +238,8 @@ err:
         res = clocksource_register_hz(cs, dgt_hz);
         if (res)
                 pr_err("clocksource_register failed\n");
+        setup_sched_clock(msm_sched_clock_read,
+                        cpu_is_msm7x01() ? 32 - MSM_DGT_SHIFT : 32, dgt_hz);
 }
 
 struct sys_timer msm_timer = {
diff --git a/arch/arm/mach-mv78xx0/include/mach/io.h b/arch/arm/mach-mv78xx0/include/mach/io.h
index 450e0e1ad092..c7d9d00d8fc1 100644
--- a/arch/arm/mach-mv78xx0/include/mach/io.h
+++ b/arch/arm/mach-mv78xx0/include/mach/io.h
@@ -20,7 +20,5 @@ static inline void __iomem *__io(unsigned long addr)
 }
 
 #define __io(a)                 __io(a)
-#define __mem_pci(a)            (a)
-
 
 #endif
diff --git a/arch/arm/mach-mxs/include/mach/hardware.h b/arch/arm/mach-mxs/include/mach/hardware.h
index 53e89a09bf0d..4c0e8a64d8c7 100644
--- a/arch/arm/mach-mxs/include/mach/hardware.h
+++ b/arch/arm/mach-mxs/include/mach/hardware.h
@@ -20,10 +20,4 @@
 #ifndef __MACH_MXS_HARDWARE_H__
 #define __MACH_MXS_HARDWARE_H__
 
-#ifdef __ASSEMBLER__
-#define IOMEM(addr)     (addr)
-#else
-#define IOMEM(addr)     ((void __force __iomem *)(addr))
-#endif
-
 #endif /* __MACH_MXS_HARDWARE_H__ */
diff --git a/arch/arm/mach-mxs/include/mach/io.h b/arch/arm/mach-mxs/include/mach/io.h
deleted file mode 100644
index 289b7227e072..000000000000
--- a/arch/arm/mach-mxs/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- *  Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- */
-
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __MACH_MXS_IO_H__
-#define __MACH_MXS_IO_H__
-
-/* Allow IO space to be anywhere in the memory */
-#define IO_SPACE_LIMIT 0xffffffff
-
-/* io address mapping macro */
-#define __io(a)         __typesafe_io(a)
-
-#define __mem_pci(a)    (a)
-
-#endif /* __MACH_MXS_IO_H__ */
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index 59e67979f197..aa627465d914 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -168,7 +168,7 @@ void __init netx_init_irq(void)
 {
         int irq;
 
-        vic_init(__io(io_p2v(NETX_PA_VIC)), 0, ~0, 0);
+        vic_init(io_p2v(NETX_PA_VIC), 0, ~0, 0);
 
         for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
                 irq_set_chip_and_handler(irq, &netx_hif_chip,
diff --git a/arch/arm/mach-netx/include/mach/hardware.h b/arch/arm/mach-netx/include/mach/hardware.h
index 517a2bd37842..b661af2f2145 100644
--- a/arch/arm/mach-netx/include/mach/hardware.h
+++ b/arch/arm/mach-netx/include/mach/hardware.h
@@ -33,7 +33,7 @@
 #define XMAC_MEM_SIZE 0x1000
 #define SRAM_MEM_SIZE 0x8000
 
-#define io_p2v(x) ((x) - NETX_IO_PHYS + NETX_IO_VIRT)
+#define io_p2v(x) IOMEM((x) - NETX_IO_PHYS + NETX_IO_VIRT)
 #define io_v2p(x) ((x) - NETX_IO_VIRT + NETX_IO_PHYS)
 
 #endif
diff --git a/arch/arm/mach-netx/include/mach/io.h b/arch/arm/mach-netx/include/mach/io.h
deleted file mode 100644
index c3921cb3b6a6..000000000000
--- a/arch/arm/mach-netx/include/mach/io.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- *  arch/arm/mach-netx/include/mach/io.h
- *
- * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)            (a)
-
-#endif
diff --git a/arch/arm/mach-netx/include/mach/netx-regs.h b/arch/arm/mach-netx/include/mach/netx-regs.h
index 5a03e7ccb01a..fdde22b58ac3 100644
--- a/arch/arm/mach-netx/include/mach/netx-regs.h
+++ b/arch/arm/mach-netx/include/mach/netx-regs.h
@@ -115,7 +115,7 @@
  *********************************/
 
 /* Registers */
-#define NETX_SYSTEM_REG(ofs)            __io(NETX_VA_SYSTEM + (ofs))
+#define NETX_SYSTEM_REG(ofs)            IOMEM(NETX_VA_SYSTEM + (ofs))
 #define NETX_SYSTEM_BOO_SR          NETX_SYSTEM_REG(0x00)
 #define NETX_SYSTEM_IOC_CR          NETX_SYSTEM_REG(0x04)
 #define NETX_SYSTEM_IOC_MR          NETX_SYSTEM_REG(0x08)
@@ -185,7 +185,7 @@
  *******************************/
 
 /* Registers */
-#define NETX_GPIO_REG(ofs)                     __io(NETX_VA_GPIO + (ofs))
+#define NETX_GPIO_REG(ofs)                     IOMEM(NETX_VA_GPIO + (ofs))
 #define NETX_GPIO_CFG(gpio)                NETX_GPIO_REG(0x0  + ((gpio)<<2))
 #define NETX_GPIO_THRESHOLD_CAPTURE(gpio)  NETX_GPIO_REG(0x40 + ((gpio)<<2))
 #define NETX_GPIO_COUNTER_CTRL(counter)    NETX_GPIO_REG(0x80 + ((counter)<<2))
@@ -230,7 +230,7 @@
  *******************************/
 
 /* Registers */
-#define NETX_PIO_REG(ofs)        __io(NETX_VA_PIO + (ofs))
+#define NETX_PIO_REG(ofs)        IOMEM(NETX_VA_PIO + (ofs))
 #define NETX_PIO_INPIO       NETX_PIO_REG(0x0)
 #define NETX_PIO_OUTPIO      NETX_PIO_REG(0x4)
 #define NETX_PIO_OEPIO       NETX_PIO_REG(0x8)
@@ -240,7 +240,7 @@
  *******************************/
 
 /* Registers */
-#define NETX_MIIMU           __io(NETX_VA_MIIMU)
+#define NETX_MIIMU           IOMEM(NETX_VA_MIIMU)
 
 /* Bits */
 #define MIIMU_SNRDY        (1<<0)
@@ -317,7 +317,7 @@
  *******************************/
 
 /* Registers */
-#define NETX_PFIFO_REG(ofs)               __io(NETX_VA_PFIFO + (ofs))
+#define NETX_PFIFO_REG(ofs)               IOMEM(NETX_VA_PFIFO + (ofs))
 #define NETX_PFIFO_BASE(pfifo)        NETX_PFIFO_REG(0x00 + ((pfifo)<<2))
 #define NETX_PFIFO_BORDER_BASE(pfifo) NETX_PFIFO_REG(0x80 + ((pfifo)<<2))
 #define NETX_PFIFO_RESET              NETX_PFIFO_REG(0x100)
@@ -334,7 +334,7 @@
  *******************************/
 
 /* Registers */
-#define NETX_MEMCR_REG(ofs)               __io(NETX_VA_MEMCR + (ofs))
+#define NETX_MEMCR_REG(ofs)               IOMEM(NETX_VA_MEMCR + (ofs))
 #define NETX_MEMCR_SRAM_CTRL(cs)      NETX_MEMCR_REG(0x0 + 4 * (cs)) /* SRAM for CS 0..2 */
 #define NETX_MEMCR_SDRAM_CFG_CTRL     NETX_MEMCR_REG(0x40)
 #define NETX_MEMCR_SDRAM_TIMING_CTRL  NETX_MEMCR_REG(0x44)
@@ -355,7 +355,7 @@
  *******************************/
 
 /* Registers */
-#define NETX_DPMAS_REG(ofs)               __io(NETX_VA_DPMAS + (ofs))
+#define NETX_DPMAS_REG(ofs)               IOMEM(NETX_VA_DPMAS + (ofs))
 #define NETX_DPMAS_SYS_STAT           NETX_DPMAS_REG(0x4d8)
 #define NETX_DPMAS_INT_STAT           NETX_DPMAS_REG(0x4e0)
 #define NETX_DPMAS_INT_EN             NETX_DPMAS_REG(0x4f0)
@@ -425,7 +425,7 @@
 /*******************************
  * I2C                         *
  *******************************/
-#define NETX_I2C_REG(ofs)       __io(NETX_VA_I2C, (ofs))
+#define NETX_I2C_REG(ofs)       IOMEM(NETX_VA_I2C, (ofs))
 #define NETX_I2C_CTRL   NETX_I2C_REG(0x0)
 #define NETX_I2C_DATA   NETX_I2C_REG(0x4)
 
diff --git a/arch/arm/mach-nomadik/include/mach/io.h b/arch/arm/mach-nomadik/include/mach/io.h
deleted file mode 100644
index 2e1eca1b8243..000000000000
--- a/arch/arm/mach-nomadik/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * arch/arm/mach-nomadik/include/mach/io.h   (copied from mach-sa1100)
- *
- * Copyright (C) 1997-1999 Russell King
- *
- * Modifications:
- *  06-12-1997  RMK     Created.
- *  07-04-1999  RMK     Major cleanup
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We don't actually have real ISA nor PCI buses, but there is so many
- * drivers out there that might just work if we fake them...
- */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
index 399c4c49722f..a051cb8ae57f 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq-handler.S
+++ b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
@@ -14,6 +14,7 @@
  */
 
 #include <linux/linkage.h>
+#include <asm/assembler.h>
 
 #include <plat/board-ams-delta.h>
 
diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S
index fa0f32a686aa..88f08cab1717 100644
--- a/arch/arm/mach-omap1/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap1/include/mach/entry-macro.S
@@ -11,7 +11,6 @@
  */
 
 #include <mach/hardware.h>
-#include <mach/io.h>
 #include <mach/irqs.h>
 
 #include "../../iomap.h"
diff --git a/arch/arm/mach-omap1/include/mach/io.h b/arch/arm/mach-omap1/include/mach/io.h
deleted file mode 100644
index 37b12e1fd022..000000000000
--- a/arch/arm/mach-omap1/include/mach/io.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * arch/arm/mach-omap1/include/mach/io.h
- *
- * IO definitions for TI OMAP processors and boards
- *
- * Copied from arch/arm/mach-sa1100/include/mach/io.h
- * Copyright (C) 1997-1999 Russell King
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Modifications:
- *  06-12-1997  RMK     Created.
- *  07-04-1999  RMK     Major cleanup
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We don't actually have real ISA nor PCI buses, but there is so many
- * drivers out there that might just work if we fake them...
- */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-omap1/iomap.h b/arch/arm/mach-omap1/iomap.h
index d68175761c3d..330c4716b028 100644
--- a/arch/arm/mach-omap1/iomap.h
+++ b/arch/arm/mach-omap1/iomap.h
@@ -22,12 +22,6 @@
  * 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-#ifdef __ASSEMBLER__
-#define IOMEM(x)                (x)
-#else
-#define IOMEM(x)                ((void __force __iomem *)(x))
-#endif
-
 #define OMAP1_IO_OFFSET         0x01000000      /* Virtual IO = 0xfefb0000 */
 #define OMAP1_IO_ADDRESS(pa)    IOMEM((pa) - OMAP1_IO_OFFSET)
 
diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S
index 0779db150da7..0e628743bd03 100644
--- a/arch/arm/mach-omap1/sleep.S
+++ b/arch/arm/mach-omap1/sleep.S
@@ -36,8 +36,6 @@
 
 #include <asm/assembler.h>
 
-#include <mach/io.h>
-
 #include "iomap.h"
 #include "pm.h"
 
diff --git a/arch/arm/mach-omap1/sram.S b/arch/arm/mach-omap1/sram.S
index 2ce0b9ab20e5..00e9d9e9adf1 100644
--- a/arch/arm/mach-omap1/sram.S
+++ b/arch/arm/mach-omap1/sram.S
@@ -12,7 +12,6 @@
 
 #include <asm/assembler.h>
 
-#include <mach/io.h>
 #include <mach/hardware.h>
 
 #include "iomap.h"
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 981b9f9111a4..480fb8f09aed 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -19,6 +19,7 @@
 #include <linux/kernel.h>
 #include <linux/clk.h>
 #include <linux/list.h>
+#include <linux/io.h>
 
 #include <plat/hardware.h>
 #include <plat/clkdev_omap.h>
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 79b98f22f207..c03c1108468e 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -26,6 +26,7 @@
 #include <linux/kernel.h>
 #include <linux/list.h>
 #include <linux/clk.h>
+#include <linux/io.h>
 
 #include <plat/hardware.h>
 #include <plat/clkdev_omap.h>
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 464cffde58fe..535866489ce3 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -87,29 +87,14 @@ static int _cpuidle_deny_idle(struct powerdomain *pwrdm,
         return 0;
 }
 
-/**
- * omap3_enter_idle - Programs OMAP3 to enter the specified state
- * @dev: cpuidle device
- * @drv: cpuidle driver
- * @index: the index of state to be entered
- *
- * Called from the CPUidle framework to program the device to the
- * specified target state selected by the governor.
- */
-static int omap3_enter_idle(struct cpuidle_device *dev,
+static int __omap3_enter_idle(struct cpuidle_device *dev,
                                 struct cpuidle_driver *drv,
                                 int index)
 {
         struct omap3_idle_statedata *cx =
                         cpuidle_get_statedata(&dev->states_usage[index]);
-        struct timespec ts_preidle, ts_postidle, ts_idle;
         u32 mpu_state = cx->mpu_state, core_state = cx->core_state;
-        int idle_time;
-
-        /* Used to keep track of the total time in idle */
-        getnstimeofday(&ts_preidle);
 
-        local_irq_disable();
         local_fiq_disable();
 
         pwrdm_set_next_pwrst(mpu_pd, mpu_state);
@@ -148,22 +133,29 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
         }
 
 return_sleep_time:
-        getnstimeofday(&ts_postidle);
-        ts_idle = timespec_sub(ts_postidle, ts_preidle);
 
-        local_irq_enable();
         local_fiq_enable();
 
-        idle_time = ts_idle.tv_nsec / NSEC_PER_USEC + ts_idle.tv_sec * \
-                                                                USEC_PER_SEC;
-
-        /* Update cpuidle counters */
-        dev->last_residency = idle_time;
-
         return index;
 }
 
 /**
+ * omap3_enter_idle - Programs OMAP3 to enter the specified state
+ * @dev: cpuidle device
+ * @drv: cpuidle driver
+ * @index: the index of state to be entered
+ *
+ * Called from the CPUidle framework to program the device to the
+ * specified target state selected by the governor.
+ */
+static inline int omap3_enter_idle(struct cpuidle_device *dev,
+                                struct cpuidle_driver *drv,
+                                int index)
+{
+        return cpuidle_wrap_enter(dev, drv, index, __omap3_enter_idle);
+}
+
+/**
  * next_valid_state - Find next valid C-state
  * @dev: cpuidle device
  * @drv: cpuidle driver
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index 72e018b9b260..f386cbe9c889 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -62,15 +62,9 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
 {
         struct omap4_idle_statedata *cx =
                         cpuidle_get_statedata(&dev->states_usage[index]);
-        struct timespec ts_preidle, ts_postidle, ts_idle;
         u32 cpu1_state;
-        int idle_time;
         int cpu_id = smp_processor_id();
 
-        /* Used to keep track of the total time in idle */
-        getnstimeofday(&ts_preidle);
-
-        local_irq_disable();
         local_fiq_disable();
 
         /*
@@ -128,26 +122,17 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
         if (index > 0)
                 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu_id);
 
-        getnstimeofday(&ts_postidle);
-        ts_idle = timespec_sub(ts_postidle, ts_preidle);
-
-        local_irq_enable();
         local_fiq_enable();
 
-        idle_time = ts_idle.tv_nsec / NSEC_PER_USEC + ts_idle.tv_sec * \
-                                                                USEC_PER_SEC;
-
-        /* Update cpuidle counters */
-        dev->last_residency = idle_time;
-
         return index;
 }
 
 DEFINE_PER_CPU(struct cpuidle_device, omap4_idle_dev);
 
 struct cpuidle_driver omap4_idle_driver = {
-        .name =         "omap4_idle",
-        .owner =        THIS_MODULE,
+        .name                           = "omap4_idle",
+        .owner                          = THIS_MODULE,
+        .en_core_tk_irqen               = 1,
 };
 
 static inline void _fill_cstate(struct cpuidle_driver *drv,
diff --git a/arch/arm/mach-omap2/include/mach/io.h b/arch/arm/mach-omap2/include/mach/io.h
deleted file mode 100644
index b8758c8a9394..000000000000
--- a/arch/arm/mach-omap2/include/mach/io.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * arch/arm/mach-omap2/include/mach/io.h
- *
- * IO definitions for TI OMAP processors and boards
- *
- * Copied from arch/arm/mach-sa1100/include/mach/io.h
- * Copyright (C) 1997-1999 Russell King
- *
- * Copyright (C) 2009 Texas Instruments
- * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Modifications:
- *  06-12-1997  RMK     Created.
- *  07-04-1999  RMK     Major cleanup
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We don't actually have real ISA nor PCI buses, but there is so many
- * drivers out there that might just work if we fake them...
- */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-omap2/iomap.h b/arch/arm/mach-omap2/iomap.h
index e6f958165296..0812b154f5b5 100644
--- a/arch/arm/mach-omap2/iomap.h
+++ b/arch/arm/mach-omap2/iomap.h
@@ -22,12 +22,6 @@
  * 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-#ifdef __ASSEMBLER__
-#define IOMEM(x)                (x)
-#else
-#define IOMEM(x)                ((void __force __iomem *)(x))
-#endif
-
 #define OMAP2_L3_IO_OFFSET      0x90000000
 #define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
 
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index d2513ac79ff5..2e6454c8d4ba 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -57,5 +57,14 @@ struct meminfo;
 struct tag;
 extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *);
 
+/*****************************************************************************
+ * Helpers to access Orion registers
+ ****************************************************************************/
+/*
+ * These are not preempt-safe.  Locks, if needed, must be taken
+ * care of by the caller.
+ */
+#define orion5x_setbits(r, mask)        writel(readl(r) | (mask), (r))
+#define orion5x_clrbits(r, mask)        writel(readl(r) & ~(mask), (r))
 
 #endif
diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h
deleted file mode 100644
index e9d9afdc2659..000000000000
--- a/arch/arm/mach-orion5x/include/mach/io.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * arch/arm/mach-orion5x/include/mach/io.h
- *
- * Tzachi Perelstein <tzachi@marvell.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2.  This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __ASM_ARCH_IO_H
-#define __ASM_ARCH_IO_H
-
-#include "orion5x.h"
-
-#define IO_SPACE_LIMIT          0xffffffff
-
-#define __io(a)                 __typesafe_io(a)
-#define __mem_pci(a)            (a)
-
-
-/*****************************************************************************
- * Helpers to access Orion registers
- ****************************************************************************/
-/*
- * These are not preempt-safe.  Locks, if needed, must be taken
- * care of by the caller.
- */
-#define orion5x_setbits(r, mask)        writel(readl(r) | (mask), (r))
-#define orion5x_clrbits(r, mask)        writel(readl(r) & ~(mask), (r))
-
-
-#endif
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index d6a91948e4dc..cb19e1661bb3 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -19,6 +19,7 @@
 #include <asm/mach/pci.h>
 #include <plat/pcie.h>
 #include <plat/addr-map.h>
+#include <mach/orion5x.h>
 #include "common.h"
 
 /*****************************************************************************
diff --git a/arch/arm/mach-orion5x/tsx09-common.c b/arch/arm/mach-orion5x/tsx09-common.c
index c9abb8fbfa70..7189827d641d 100644
--- a/arch/arm/mach-orion5x/tsx09-common.c
+++ b/arch/arm/mach-orion5x/tsx09-common.c
@@ -15,6 +15,7 @@
 #include <linux/mv643xx_eth.h>
 #include <linux/timex.h>
 #include <linux/serial_reg.h>
+#include <mach/orion5x.h>
 #include "tsx09-common.h"
 #include "common.h"
 
diff --git a/arch/arm/mach-picoxcell/include/mach/io.h b/arch/arm/mach-picoxcell/include/mach/io.h
deleted file mode 100644
index 7573ec7d10a3..000000000000
--- a/arch/arm/mach-picoxcell/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * Copyright (c) 2011 Picochip Ltd., Jamie Iles
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-/* No ioports, but needed for driver compatibility. */
-#define __io(a)                 __typesafe_io(a)
-/* No PCI possible on picoxcell. */
-#define __mem_pci(a)            (a)
-
-#endif /* __ASM_ARM_ARCH_IO_H */
diff --git a/arch/arm/mach-picoxcell/include/mach/irqs.h b/arch/arm/mach-picoxcell/include/mach/irqs.h
deleted file mode 100644
index 59eac1ee2820..000000000000
--- a/arch/arm/mach-picoxcell/include/mach/irqs.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * Copyright (c) 2011 Picochip Ltd., Jamie Iles
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef __MACH_IRQS_H
-#define __MACH_IRQS_H
-
-/* We dynamically allocate our irq_desc's. */
-#define NR_IRQS                         0
-
-#endif /* __MACH_IRQS_H */
diff --git a/arch/arm/mach-pnx4008/include/mach/io.h b/arch/arm/mach-pnx4008/include/mach/io.h
deleted file mode 100644
index cbf0904540ea..000000000000
--- a/arch/arm/mach-pnx4008/include/mach/io.h
+++ /dev/null
@@ -1,21 +0,0 @@
-
-/*
- *  arch/arm/mach-pnx4008/include/mach/io.h
- *
- * Author: Dmitry Chigirev <chigirev@ru.mvista.com>
- *
- * 2005 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-prima2/include/mach/io.h b/arch/arm/mach-prima2/include/mach/io.h
deleted file mode 100644
index 6c31e9ec279e..000000000000
--- a/arch/arm/mach-prima2/include/mach/io.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * arch/arm/mach-prima2/include/mach/io.h
- *
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- *
- * Licensed under GPLv2 or later.
- */
-
-#ifndef __MACH_PRIMA2_IO_H
-#define __MACH_PRIMA2_IO_H
-
-#define IO_SPACE_LIMIT ((resource_size_t)0)
-
-#define __mem_pci(a)            (a)
-
-#endif
diff --git a/arch/arm/mach-prima2/timer.c b/arch/arm/mach-prima2/timer.c
index b7a6091ce791..0d024b1e916d 100644
--- a/arch/arm/mach-prima2/timer.c
+++ b/arch/arm/mach-prima2/timer.c
@@ -18,6 +18,7 @@
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <mach/map.h>
+#include <asm/sched_clock.h>
 #include <asm/mach/time.h>
 
 #define SIRFSOC_TIMER_COUNTER_LO        0x0000
@@ -165,21 +166,9 @@ static struct irqaction sirfsoc_timer_irq = {
 };
 
 /* Overwrite weak default sched_clock with more precise one */
-unsigned long long notrace sched_clock(void)
+static u32 notrace sirfsoc_read_sched_clock(void)
 {
-        static int is_mapped;
-
-        /*
-         * sched_clock is called earlier than .init of sys_timer
-         * if we map timer memory in .init of sys_timer, system
-         * will panic due to illegal memory access
-         */
-        if (!is_mapped) {
-                sirfsoc_of_timer_map();
-                is_mapped = 1;
-        }
-
-        return sirfsoc_timer_read(NULL) * (NSEC_PER_SEC / CLOCK_TICK_RATE);
+        return (u32)(sirfsoc_timer_read(NULL) & 0xffffffff);
 }
 
 static void __init sirfsoc_clockevent_init(void)
@@ -210,6 +199,8 @@ static void __init sirfsoc_timer_init(void)
         BUG_ON(rate < CLOCK_TICK_RATE);
         BUG_ON(rate % CLOCK_TICK_RATE);
 
+        sirfsoc_of_timer_map();
+
         writel_relaxed(rate / CLOCK_TICK_RATE / 2 - 1, sirfsoc_timer_base + SIRFSOC_TIMER_DIV);
         writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_LO);
         writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI);
@@ -217,6 +208,8 @@ static void __init sirfsoc_timer_init(void)
 
         BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE));
 
+        setup_sched_clock(sirfsoc_read_sched_clock, 32, CLOCK_TICK_RATE);
+
         BUG_ON(setup_irq(sirfsoc_timer_irq.irq, &sirfsoc_timer_irq));
 
         sirfsoc_clockevent_init();
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 61d3c72ded84..109ccd2a8885 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -108,6 +108,7 @@ config CSB726_CSB701
 
 config MACH_ARMCORE
         bool "CompuLab CM-X255/CM-X270 modules"
+        select ARCH_HAS_DMA_SET_COHERENT_MASK if PCI
         select PXA27x
         select IWMMXT
         select PXA25x
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c
index c91727d1fe09..9a8760b72913 100644
--- a/arch/arm/mach-pxa/capc7117.c
+++ b/arch/arm/mach-pxa/capc7117.c
@@ -150,6 +150,7 @@ MACHINE_START(CAPC7117,
               "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM")
         .atag_offset = 0x100,
         .map_io = pxa3xx_map_io,
+        .nr_irqs = PXA_NR_IRQS,
         .init_irq = pxa3xx_init_irq,
         .handle_irq = pxa3xx_handle_irq,
         .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/clock-pxa2xx.c b/arch/arm/mach-pxa/clock-pxa2xx.c
index 1d5859d9a0e3..9ee2ad6a0a07 100644
--- a/arch/arm/mach-pxa/clock-pxa2xx.c
+++ b/arch/arm/mach-pxa/clock-pxa2xx.c
@@ -9,6 +9,7 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/io.h>
 #include <linux/syscore_ops.h>
 
 #include <mach/pxa2xx-regs.h>
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index 0c920fccb79e..313274016277 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -853,6 +853,7 @@ static void __init cm_x300_fixup(struct tag *tags, char **cmdline,
 MACHINE_START(CM_X300, "CM-X300 module")
         .atag_offset    = 0x100,
         .map_io         = pxa3xx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c
index 29d5d541f602..b2f227d36125 100644
--- a/arch/arm/mach-pxa/colibri-pxa270.c
+++ b/arch/arm/mach-pxa/colibri-pxa270.c
@@ -310,6 +310,7 @@ MACHINE_START(COLIBRI, "Toradex Colibri PXA270")
         .atag_offset    = 0x100,
         .init_machine   = colibri_pxa270_init,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
@@ -320,6 +321,7 @@ MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC")
         .atag_offset    = 0x100,
         .init_machine   = colibri_pxa270_income_init,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index 0846d210cb05..bb6def8ec979 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -186,6 +186,7 @@ MACHINE_START(COLIBRI300, "Toradex Colibri PXA300")
         .atag_offset    = 0x100,
         .init_machine   = colibri_pxa300_init,
         .map_io         = pxa3xx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index 6ad3359063af..d88e7b37f1da 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -256,6 +256,7 @@ MACHINE_START(COLIBRI320, "Toradex Colibri PXA320")
         .atag_offset    = 0x100,
         .init_machine   = colibri_pxa320_init,
         .map_io         = pxa3xx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index de9d45e673fd..c1fe32db4755 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -729,6 +729,7 @@ static void __init fixup_corgi(struct tag *tags, char **cmdline,
 MACHINE_START(CORGI, "SHARP Corgi")
         .fixup          = fixup_corgi,
         .map_io         = pxa25x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .init_machine   = corgi_init,
@@ -741,6 +742,7 @@ MACHINE_END
 MACHINE_START(SHEPHERD, "SHARP Shepherd")
         .fixup          = fixup_corgi,
         .map_io         = pxa25x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .init_machine   = corgi_init,
@@ -753,6 +755,7 @@ MACHINE_END
 MACHINE_START(HUSKY, "SHARP Husky")
         .fixup          = fixup_corgi,
         .map_io         = pxa25x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .init_machine   = corgi_init,
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index 39e265cfc86d..048c4299473c 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -19,6 +19,7 @@
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
 #include <linux/apm-emulation.h>
+#include <linux/io.h>
 
 #include <asm/irq.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-pxa/cpufreq-pxa3xx.c b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
index 88fbec05ec50..b85b4ab7aac6 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa3xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
@@ -15,6 +15,7 @@
 #include <linux/init.h>
 #include <linux/cpufreq.h>
 #include <linux/slab.h>
+#include <linux/io.h>
 
 #include <mach/pxa3xx-regs.h>
 
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c
index fb5a51d834e5..67f0de37f46e 100644
--- a/arch/arm/mach-pxa/csb726.c
+++ b/arch/arm/mach-pxa/csb726.c
@@ -274,6 +274,7 @@ static void __init csb726_init(void)
 MACHINE_START(CSB726, "Cogent CSB726")
         .atag_offset    = 0x100,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq       = pxa27x_handle_irq,
         .init_machine   = csb726_init,
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index 84f2d7015cfe..166eee5b8a70 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -12,6 +12,7 @@
 #include <mach/pxafb.h>
 #include <mach/mmc.h>
 #include <mach/irda.h>
+#include <mach/irqs.h>
 #include <mach/ohci.h>
 #include <plat/pxa27x_keypad.h>
 #include <mach/camera.h>
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index b88e11cd75ed..16ec557b8e43 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -1301,6 +1301,7 @@ static void __init em_x270_init(void)
 MACHINE_START(EM_X270, "Compulab EM-X270")
         .atag_offset    = 0x100,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
@@ -1311,6 +1312,7 @@ MACHINE_END
 MACHINE_START(EXEDA, "Compulab eXeda")
         .atag_offset    = 0x100,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index ac3b1cef4751..e529a35a44ce 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -235,6 +235,7 @@ static void __init gumstix_init(void)
 MACHINE_START(GUMSTIX, "Gumstix")
         .atag_offset    = 0x100, /* match u-boot bi_boot_params */
         .map_io         = pxa25x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c
index fde6b4c873c4..e7dec589f014 100644
--- a/arch/arm/mach-pxa/h5000.c
+++ b/arch/arm/mach-pxa/h5000.c
@@ -205,6 +205,7 @@ static void __init h5000_init(void)
 MACHINE_START(H5400, "HP iPAQ H5000")
         .atag_offset = 0x100,
         .map_io = pxa25x_map_io,
+        .nr_irqs = PXA_NR_IRQS,
         .init_irq = pxa25x_init_irq,
         .handle_irq = pxa25x_handle_irq,
         .timer = &pxa_timer,
diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c
index 26d069a9f900..2962de898da9 100644
--- a/arch/arm/mach-pxa/himalaya.c
+++ b/arch/arm/mach-pxa/himalaya.c
@@ -160,6 +160,7 @@ static void __init himalaya_init(void)
 MACHINE_START(HIMALAYA, "HTC Himalaya")
         .atag_offset = 0x100,
         .map_io = pxa25x_map_io,
+        .nr_irqs = PXA_NR_IRQS,
         .init_irq = pxa25x_init_irq,
         .handle_irq = pxa25x_handle_irq,
         .init_machine = himalaya_init,
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
index 67400192ed3b..1d02eabc9c65 100644
--- a/arch/arm/mach-pxa/icontrol.c
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -193,6 +193,7 @@ static void __init icontrol_init(void)
 MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM")
         .atag_offset    = 0x100,
         .map_io         = pxa3xx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index 8af1840e12cc..6ff466bd43e8 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -195,6 +195,7 @@ static void __init idp_map_io(void)
 MACHINE_START(PXA_IDP, "Vibren PXA255 IDP")
         /* Maintainer: Vibren Technologies */
         .map_io         = idp_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index 8184669dde28..56d92e5cad85 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -40,7 +40,6 @@
 #define io_p2v(x) IOMEM(0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1))
 
 #ifndef __ASSEMBLY__
-# define IOMEM(x) ((void __iomem *)(x))
 # define __REG(x)       (*((volatile u32 __iomem *)io_p2v(x)))
 
 /* With indexed regs we don't want to feed the index through io_p2v()
@@ -52,7 +51,6 @@
 
 #else
 
-# define IOMEM(x)       x 
 # define __REG(x)       io_p2v(x)
 # define __PREG(x)      io_v2p(x)
 
@@ -337,8 +335,4 @@ extern unsigned int get_memclk_frequency_10khz(void);
 extern unsigned long get_clock_tick_rate(void);
 #endif
 
-#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
-#define ARCH_HAS_DMA_SET_COHERENT_MASK
-#endif
-
 #endif  /* _ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-pxa/include/mach/io.h b/arch/arm/mach-pxa/include/mach/io.h
deleted file mode 100644
index fdca3be47d9b..000000000000
--- a/arch/arm/mach-pxa/include/mach/io.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * arch/arm/mach-pxa/include/mach/io.h
- *
- * Copied from asm/arch/sa1100/io.h
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#include <mach/hardware.h>
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We don't actually have real ISA nor PCI buses, but there is so many
- * drivers out there that might just work if we fake them...
- */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 32975adf3ca4..8765782dd955 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -100,7 +100,7 @@
  */
 #define IRQ_BOARD_START         (PXA_GPIO_IRQ_BASE + PXA_NR_BUILTIN_GPIO)
 
-#define NR_IRQS                 (IRQ_BOARD_START)
+#define PXA_NR_IRQS             (IRQ_BOARD_START)
 
 #ifndef __ASSEMBLY__
 struct irq_data;
diff --git a/arch/arm/mach-pxa/include/mach/mainstone.h b/arch/arm/mach-pxa/include/mach/mainstone.h
index 4c2d11cd824d..1bfc4e822a41 100644
--- a/arch/arm/mach-pxa/include/mach/mainstone.h
+++ b/arch/arm/mach-pxa/include/mach/mainstone.h
@@ -13,6 +13,8 @@
 #ifndef ASM_ARCH_MAINSTONE_H
 #define ASM_ARCH_MAINSTONE_H
 
+#include <mach/irqs.h>
+
 #define MST_ETH_PHYS            PXA_CS4_PHYS
 
 #define MST_FPGA_PHYS           PXA_CS2_PHYS
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 29b62afc6f7c..b0a842887780 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -17,6 +17,7 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/io.h>
 #include <linux/syscore_ops.h>
 
 #include <mach/pxa2xx-regs.h>
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index e80a3db735c2..061d57009cee 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -758,6 +758,7 @@ MACHINE_START(MIOA701, "MIO A701")
         .atag_offset    = 0x100,
         .restart_mode   = 's',
         .map_io         = &pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = &pxa27x_init_irq,
         .handle_irq     = &pxa27x_handle_irq,
         .init_machine   = mioa701_machine_init,
diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c
index 169bf8f97af0..152efbf093f6 100644
--- a/arch/arm/mach-pxa/mp900.c
+++ b/arch/arm/mach-pxa/mp900.c
@@ -95,6 +95,7 @@ MACHINE_START(NEC_MP900, "MobilePro900/C")
         .atag_offset    = 0x220100,
         .timer          = &pxa_timer,
         .map_io         = pxa25x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .init_machine   = mp900c_init,
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index 1fa80f4f80c8..31e0433d83ba 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -344,6 +344,7 @@ static void __init palmld_init(void)
 MACHINE_START(PALMLD, "Palm LifeDrive")
         .atag_offset    = 0x100,
         .map_io         = palmld_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 5ba14316bd9c..0f6bd4fcfa3b 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -205,6 +205,7 @@ MACHINE_START(PALMT5, "Palm Tungsten|T5")
         .atag_offset    = 0x100,
         .map_io         = pxa27x_map_io,
         .reserve        = palmt5_reserve,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index 29b51b40f09d..e2d97eed07a7 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -539,6 +539,7 @@ static void __init palmtc_init(void)
 MACHINE_START(PALMTC, "Palm Tungsten|C")
         .atag_offset    = 0x100,
         .map_io         = pxa25x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index 5ebf49acb827..c054827c567f 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -358,6 +358,7 @@ static void __init palmte2_init(void)
 MACHINE_START(PALMTE2, "Palm Tungsten|E2")
         .atag_offset    = 0x100,
         .map_io         = pxa25x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c
index ec8249156c08..fbdebee39a53 100644
--- a/arch/arm/mach-pxa/palmtreo.c
+++ b/arch/arm/mach-pxa/palmtreo.c
@@ -448,6 +448,7 @@ MACHINE_START(TREO680, "Palm Treo 680")
         .atag_offset    = 0x100,
         .map_io         = pxa27x_map_io,
         .reserve        = treo_reserve,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
@@ -461,6 +462,7 @@ MACHINE_START(CENTRO, "Palm Centro 685")
         .atag_offset    = 0x100,
         .map_io         = pxa27x_map_io,
         .reserve        = treo_reserve,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index 6170d76dfba8..9507605ed547 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -366,6 +366,7 @@ static void __init palmtx_init(void)
 MACHINE_START(PALMTX, "Palm T|X")
         .atag_offset    = 0x100,
         .map_io         = palmtx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index b2dff9d415eb..a97b59965bb9 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -401,6 +401,7 @@ static void __init palmz72_init(void)
 MACHINE_START(PALMZ72, "Palm Zire72")
         .atag_offset    = 0x100,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/pxa2xx.c b/arch/arm/mach-pxa/pxa2xx.c
index 868270421b8c..f8ec85450c42 100644
--- a/arch/arm/mach-pxa/pxa2xx.c
+++ b/arch/arm/mach-pxa/pxa2xx.c
@@ -13,6 +13,7 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/device.h>
+#include <linux/io.h>
 
 #include <mach/hardware.h>
 #include <mach/pxa2xx-regs.h>
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c
index 40bb16501d86..17cbc0c7bdb8 100644
--- a/arch/arm/mach-pxa/pxa300.c
+++ b/arch/arm/mach-pxa/pxa300.c
@@ -16,6 +16,7 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
+#include <linux/io.h>
 
 #include <mach/pxa300.h>
 
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c
index 8d614ecd8e99..6dc99d4f2dc6 100644
--- a/arch/arm/mach-pxa/pxa320.c
+++ b/arch/arm/mach-pxa/pxa320.c
@@ -16,6 +16,7 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
+#include <linux/io.h>
 
 #include <mach/pxa320.h>
 
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 1570d457fea3..dffb7e813d98 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -31,6 +31,7 @@
 #include <mach/pm.h>
 #include <mach/dma.h>
 #include <mach/smemc.h>
+#include <mach/irqs.h>
 
 #include "generic.h"
 #include "devices.h"
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 708b4f407acc..5905ed130e94 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -1092,6 +1092,7 @@ MACHINE_START(RAUMFELD_RC, "Raumfeld Controller")
         .atag_offset    = 0x100,
         .init_machine   = raumfeld_controller_init,
         .map_io         = pxa3xx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
@@ -1104,6 +1105,7 @@ MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector")
         .atag_offset    = 0x100,
         .init_machine   = raumfeld_connector_init,
         .map_io         = pxa3xx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
@@ -1116,6 +1118,7 @@ MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker")
         .atag_offset    = 0x100,
         .init_machine   = raumfeld_speaker_init,
         .map_io         = pxa3xx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index 0fe354efb931..86c95a5d8533 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -598,6 +598,7 @@ MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)")
         /* Maintainer: Eric Miao <eric.miao@marvell.com> */
         .atag_offset    = 0x100,
         .map_io         = pxa3xx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa3xx_init_irq,
         .handle_irq       = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 30989baf7f2a..bdf4cb88ca0a 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -24,6 +24,7 @@
 #include <linux/leds.h>
 #include <linux/suspend.h>
 #include <linux/gpio.h>
+#include <linux/io.h>
 
 #include <asm/mach-types.h>
 #include <mach/pm.h>
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index abf355d0c92f..df2ab0fb2ace 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -984,6 +984,7 @@ MACHINE_START(SPITZ, "SHARP Spitz")
         .restart_mode   = 'g',
         .fixup          = spitz_fixup,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .init_machine   = spitz_init,
@@ -997,6 +998,7 @@ MACHINE_START(BORZOI, "SHARP Borzoi")
         .restart_mode   = 'g',
         .fixup          = spitz_fixup,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .init_machine   = spitz_init,
@@ -1010,6 +1012,7 @@ MACHINE_START(AKITA, "SHARP Akita")
         .restart_mode   = 'g',
         .fixup          = spitz_fixup,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .init_machine   = spitz_init,
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 227a6309dba7..4cd645e29b64 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -1006,6 +1006,7 @@ static void __init stargate2_init(void)
 #ifdef CONFIG_MACH_INTELMOTE2
 MACHINE_START(INTELMOTE2, "IMOTE 2")
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index 9fb38e80e076..736bfdc50ee6 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -491,6 +491,7 @@ MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)")
         /* Maintainer: Eric Miao <eric.miao@marvell.com> */
         .atag_offset    = 0x100,
         .map_io         = pxa3xx_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa3xx_init_irq,
         .handle_irq       = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index b503049d6d26..3d6c9bd90de6 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -22,6 +22,7 @@
 #include <asm/mach/time.h>
 #include <asm/sched_clock.h>
 #include <mach/regs-ost.h>
+#include <mach/irqs.h>
 
 /*
  * This is PXA's sched_clock implementation. This has a resolution
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 0f30af617d8f..2b6ac00b2cd9 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -558,6 +558,7 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
         .atag_offset    = 0x100,
         .init_machine   = trizeps4_init,
         .map_io         = trizeps4_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
@@ -569,6 +570,7 @@ MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
         .atag_offset    = 0x100,
         .init_machine   = trizeps4_init,
         .map_io         = trizeps4_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 7a3d342a7732..130379fb9d0f 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -995,6 +995,7 @@ MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
         /* Maintainer: Marc Zyngier <maz@misterjones.org> */
         .atag_offset    = 0x100,
         .map_io         = viper_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = viper_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index 1f5cfa96f6d6..c57ab636ea9c 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -718,6 +718,7 @@ static void __init vpac270_init(void)
 MACHINE_START(VPAC270, "Voipac PXA270")
         .atag_offset    = 0x100,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c
index 4bbe9a36fe74..4275713ccd10 100644
--- a/arch/arm/mach-pxa/xcep.c
+++ b/arch/arm/mach-pxa/xcep.c
@@ -182,6 +182,7 @@ MACHINE_START(XCEP, "Iskratel XCEP")
         .atag_offset    = 0x100,
         .init_machine   = xcep_init,
         .map_io         = pxa25x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index b6476848b561..fa8619970841 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -721,6 +721,7 @@ static void __init z2_init(void)
 MACHINE_START(ZIPIT2, "Zipit Z2")
         .atag_offset    = 0x100,
         .map_io         = pxa27x_map_io,
+        .nr_irqs        = PXA_NR_IRQS,
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
diff --git a/arch/arm/mach-realview/include/mach/hardware.h b/arch/arm/mach-realview/include/mach/hardware.h
index 8a638d15797f..281e71c97525 100644
--- a/arch/arm/mach-realview/include/mach/hardware.h
+++ b/arch/arm/mach-realview/include/mach/hardware.h
@@ -37,6 +37,6 @@
 #else
 #define IO_ADDRESS(x)           (x)
 #endif
-#define __io_address(n)         __io(IO_ADDRESS(n))
+#define __io_address(n)         IOMEM(IO_ADDRESS(n))
 
 #endif
diff --git a/arch/arm/mach-realview/include/mach/io.h b/arch/arm/mach-realview/include/mach/io.h
deleted file mode 100644
index f05bcdf605d8..000000000000
--- a/arch/arm/mach-realview/include/mach/io.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- *  arch/arm/mach-realview/include/mach/io.h
- *
- *  Copyright (C) 2003 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-rpc/include/mach/hardware.h b/arch/arm/mach-rpc/include/mach/hardware.h
index 050d63c74cc1..257166b21f3d 100644
--- a/arch/arm/mach-rpc/include/mach/hardware.h
+++ b/arch/arm/mach-rpc/include/mach/hardware.h
@@ -14,12 +14,6 @@
 
 #include <mach/memory.h>
 
-#ifndef __ASSEMBLY__
-#define IOMEM(x) ((void __iomem *)(unsigned long)(x))
-#else
-#define IOMEM(x) x
-#endif /* __ASSEMBLY__ */
-
 /*
  * What hardware must be present
  */
diff --git a/arch/arm/mach-rpc/include/mach/io.h b/arch/arm/mach-rpc/include/mach/io.h
index 695f4ed2e11b..707071a7ea4e 100644
--- a/arch/arm/mach-rpc/include/mach/io.h
+++ b/arch/arm/mach-rpc/include/mach/io.h
@@ -28,9 +28,4 @@
  */
 #define __io(a)         (PCIO_BASE + ((a) << 2))
 
-/*
- * 1:1 mapping for ioremapped regions.
- */
-#define __mem_pci(x)    (x)
-
 #endif
diff --git a/arch/arm/mach-s3c24xx/include/mach/io.h b/arch/arm/mach-s3c24xx/include/mach/io.h
index 118749f37c4c..5dd1db4e2677 100644
--- a/arch/arm/mach-s3c24xx/include/mach/io.h
+++ b/arch/arm/mach-s3c24xx/include/mach/io.h
@@ -208,9 +208,4 @@ DECLARE_IO(int,l,"")
 #define outsw(p,d,l)    __raw_writesw(__ioaddr(p),d,l)
 #define outsl(p,d,l)    __raw_writesl(__ioaddr(p),d,l)
 
-/*
- * 1:1 mapping for ioremapped regions.
- */
-#define __mem_pci(x)    (x)
-
 #endif
diff --git a/arch/arm/mach-s3c64xx/include/mach/io.h b/arch/arm/mach-s3c64xx/include/mach/io.h
deleted file mode 100644
index de5716dbbd65..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/io.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* arch/arm/mach-s3c64xxinclude/mach/io.h
- *
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben-linux@fluff.org>
- *
- * Default IO routines for S3C64XX based
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-/* No current ISA/PCI bus support. */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#define IO_SPACE_LIMIT (0xFFFFFFFF)
-
-#endif
diff --git a/arch/arm/mach-s5p64x0/include/mach/io.h b/arch/arm/mach-s5p64x0/include/mach/io.h
deleted file mode 100644
index a3e095c02fb5..000000000000
--- a/arch/arm/mach-s5p64x0/include/mach/io.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/io.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben-linux@fluff.org>
- *
- * Default IO routines for S5P64X0 based
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-/* No current ISA/PCI bus support. */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#define IO_SPACE_LIMIT (0xFFFFFFFF)
-
-#endif
diff --git a/arch/arm/mach-s5pc100/include/mach/io.h b/arch/arm/mach-s5pc100/include/mach/io.h
deleted file mode 100644
index 819acf5eaf89..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/io.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* arch/arm/mach-s5pc100/include/mach/io.h
- *
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben-linux@fluff.org>
- *
- * Default IO routines for S5PC100 systems
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-/* No current ISA/PCI bus support. */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#define IO_SPACE_LIMIT (0xFFFFFFFF)
-
-#endif
diff --git a/arch/arm/mach-s5pv210/include/mach/io.h b/arch/arm/mach-s5pv210/include/mach/io.h
deleted file mode 100644
index 5ab9d560bc86..000000000000
--- a/arch/arm/mach-s5pv210/include/mach/io.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* linux/arch/arm/mach-s5pv210/include/mach/io.h
- *
- * Copyright 2008-2010 Ben Dooks <ben-linux@fluff.org>
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Based on arch/arm/mach-s5p6442/include/mach/io.h
- *
- * Default IO routines for S5PV210
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H __FILE__
-
-/* No current ISA/PCI bus support. */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#define IO_SPACE_LIMIT (0xFFFFFFFF)
-
-#endif /* __ASM_ARM_ARCH_IO_H */
diff --git a/arch/arm/mach-sa1100/include/mach/io.h b/arch/arm/mach-sa1100/include/mach/io.h
deleted file mode 100644
index dfc27ff08344..000000000000
--- a/arch/arm/mach-sa1100/include/mach/io.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * arch/arm/mach-sa1100/include/mach/io.h
- *
- * Copyright (C) 1997-1999 Russell King
- *
- * Modifications:
- *  06-12-1997  RMK     Created.
- *  07-04-1999  RMK     Major cleanup
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-/*
- * __io() is required to be an equivalent mapping to __mem_pci() for
- * SOC_COMMON to work.
- */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-shark/include/mach/io.h b/arch/arm/mach-shark/include/mach/io.h
index 9ccbcecc430b..1a45fc01ff1d 100644
--- a/arch/arm/mach-shark/include/mach/io.h
+++ b/arch/arm/mach-shark/include/mach/io.h
@@ -15,6 +15,4 @@
 
 #define __io(a)                 ((void __iomem *)(0xe0000000 + (a)))
 
-#define __mem_pci(addr) (addr)
-
 #endif
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 060e5644c49c..34560cab45d9 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -100,6 +100,10 @@ config MACH_MARZEN
 
 comment "SH-Mobile System Configuration"
 
+config CPU_HAS_INTEVT
+        bool
+        default y
+
 menu "Memory configuration"
 
 config MEMORY_START
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index f50d7c8b1221..cb224a344af0 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -43,6 +43,7 @@
 #include <video/sh_mipi_dsi.h>
 #include <sound/sh_fsi.h>
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 #include <mach/sh73a0.h>
 #include <mach/common.h>
 #include <asm/mach-types.h>
@@ -584,7 +585,7 @@ static void __init ag5evm_init(void)
 
 #ifdef CONFIG_CACHE_L2X0
         /* Shared attribute override enable, 64K*8way */
-        l2x0_init(__io(0xf0100000), 0x00460000, 0xc2000fff);
+        l2x0_init(IOMEM(0xf0100000), 0x00460000, 0xc2000fff);
 #endif
         sh73a0_add_standard_devices();
         platform_add_devices(ag5evm_devices, ARRAY_SIZE(ag5evm_devices));
diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
index 8b2124da245d..81fd95f7f52a 100644
--- a/arch/arm/mach-shmobile/board-bonito.c
+++ b/arch/arm/mach-shmobile/board-bonito.c
@@ -35,6 +35,7 @@
 #include <asm/mach/time.h>
 #include <asm/hardware/cache-l2x0.h>
 #include <mach/r8a7740.h>
+#include <mach/irqs.h>
 #include <video/sh_mobile_lcdc.h>
 
 /*
@@ -370,7 +371,7 @@ static void __init bonito_init(void)
 
 #ifdef CONFIG_CACHE_L2X0
         /* Early BRESP enable, Shared attribute override enable, 32K*8way */
-        l2x0_init(__io(0xf0002000), 0x40440000, 0x82000fff);
+        l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff);
 #endif
 
         r8a7740_add_standard_devices();
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c
index b627e89037f5..39b6cf85ced6 100644
--- a/arch/arm/mach-shmobile/board-g3evm.c
+++ b/arch/arm/mach-shmobile/board-g3evm.c
@@ -33,6 +33,7 @@
 #include <linux/input.h>
 #include <linux/input/sh_keysc.h>
 #include <linux/dma-mapping.h>
+#include <mach/irqs.h>
 #include <mach/sh7367.h>
 #include <mach/common.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c
index 46d757d2759d..0e5a39c670bc 100644
--- a/arch/arm/mach-shmobile/board-g4evm.c
+++ b/arch/arm/mach-shmobile/board-g4evm.c
@@ -34,6 +34,7 @@
 #include <linux/mmc/sh_mobile_sdhi.h>
 #include <linux/gpio.h>
 #include <linux/dma-mapping.h>
+#include <mach/irqs.h>
 #include <mach/sh7377.h>
 #include <mach/common.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index 61c067294660..200dcd42a3a0 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -39,6 +39,7 @@
 #include <linux/mfd/tmio.h>
 #include <linux/mmc/sh_mobile_sdhi.h>
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 #include <mach/sh73a0.h>
 #include <mach/common.h>
 #include <asm/mach-types.h>
@@ -507,7 +508,7 @@ static void __init kota2_init(void)
 
 #ifdef CONFIG_CACHE_L2X0
         /* Early BRESP enable, Shared attribute override enable, 64K*8way */
-        l2x0_init(__io(0xf0100000), 0x40460000, 0x82000fff);
+        l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff);
 #endif
         sh73a0_add_standard_devices();
         platform_add_devices(kota2_devices, ARRAY_SIZE(kota2_devices));
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index ca609502d6cd..a125d4e114ec 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -54,6 +54,7 @@
 #include <sound/sh_fsi.h>
 
 #include <mach/common.h>
+#include <mach/irqs.h>
 #include <mach/sh7372.h>
 
 #include <asm/mach/arch.h>
diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
index cbd5e4cd06d2..ef0e13bf0b3a 100644
--- a/arch/arm/mach-shmobile/board-marzen.c
+++ b/arch/arm/mach-shmobile/board-marzen.c
@@ -31,6 +31,7 @@
 #include <mach/hardware.h>
 #include <mach/r8a7779.h>
 #include <mach/common.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
diff --git a/arch/arm/mach-shmobile/cpuidle.c b/arch/arm/mach-shmobile/cpuidle.c
index 21b09b6455e4..7e6559105d40 100644
--- a/arch/arm/mach-shmobile/cpuidle.c
+++ b/arch/arm/mach-shmobile/cpuidle.c
@@ -13,6 +13,7 @@
 #include <linux/suspend.h>
 #include <linux/module.h>
 #include <linux/err.h>
+#include <asm/cpuidle.h>
 #include <asm/io.h>
 
 static void shmobile_enter_wfi(void)
@@ -28,37 +29,19 @@ static int shmobile_cpuidle_enter(struct cpuidle_device *dev,
                                   struct cpuidle_driver *drv,
                                   int index)
 {
-        ktime_t before, after;
-
-        before = ktime_get();
-
-        local_irq_disable();
-        local_fiq_disable();
-
         shmobile_cpuidle_modes[index]();
 
-        local_irq_enable();
-        local_fiq_enable();
-
-        after = ktime_get();
-        dev->last_residency = ktime_to_ns(ktime_sub(after, before)) >> 10;
-
         return index;
 }
 
 static struct cpuidle_device shmobile_cpuidle_dev;
 static struct cpuidle_driver shmobile_cpuidle_driver = {
-        .name =         "shmobile_cpuidle",
-        .owner =        THIS_MODULE,
-        .states[0] = {
-                .name = "C1",
-                .desc = "WFI",
-                .exit_latency = 1,
-                .target_residency = 1 * 2,
-                .flags = CPUIDLE_FLAG_TIME_VALID,
-        },
-        .safe_state_index = 0, /* C1 */
-        .state_count = 1,
+        .name                   = "shmobile_cpuidle",
+        .owner                  = THIS_MODULE,
+        .en_core_tk_irqen       = 1,
+        .states[0]              = ARM_CPUIDLE_WFI_STATE,
+        .safe_state_index       = 0, /* C1 */
+        .state_count            = 1,
 };
 
 void (*shmobile_cpuidle_setup)(struct cpuidle_driver *drv);
diff --git a/arch/arm/mach-shmobile/include/mach/io.h b/arch/arm/mach-shmobile/include/mach/io.h
deleted file mode 100644
index 7339fe46cb7c..000000000000
--- a/arch/arm/mach-shmobile/include/mach/io.h
+++ /dev/null
@@ -1,9 +0,0 @@
-#ifndef __ASM_MACH_IO_H
-#define __ASM_MACH_IO_H
-
-#define IO_SPACE_LIMIT          0xffffffff
-
-#define __io(a)                 ((void __iomem *)(a))
-#define __mem_pci(a)            (a)
-
-#endif /* __ASM_MACH_IO_H */
diff --git a/arch/arm/mach-shmobile/include/mach/irqs.h b/arch/arm/mach-shmobile/include/mach/irqs.h
index dcb714f4d75a..4e686cc201fc 100644
--- a/arch/arm/mach-shmobile/include/mach/irqs.h
+++ b/arch/arm/mach-shmobile/include/mach/irqs.h
@@ -1,15 +1,11 @@
 #ifndef __ASM_MACH_IRQS_H
 #define __ASM_MACH_IRQS_H
 
-#define NR_IRQS         1024
+#include <linux/sh_intc.h>
 
 /* GIC */
 #define gic_spi(nr)             ((nr) + 32)
 
-/* INTCA */
-#define evt2irq(evt)            (((evt) >> 5) - 16)
-#define irq2evt(irq)            (((irq) + 16) << 5)
-
 /* INTCS */
 #define INTCS_VECT_BASE         0x2200
 #define INTCS_VECT(n, vect)     INTC_VECT((n), INTCS_VECT_BASE + (vect))
diff --git a/arch/arm/mach-shmobile/intc-r8a7740.c b/arch/arm/mach-shmobile/intc-r8a7740.c
index 272c84c20c83..09c42afcb22d 100644
--- a/arch/arm/mach-shmobile/intc-r8a7740.c
+++ b/arch/arm/mach-shmobile/intc-r8a7740.c
@@ -25,6 +25,7 @@
 #include <linux/io.h>
 #include <linux/sh_intc.h>
 #include <mach/intc.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c
index 5d92fcde2bc3..550b23df4fd4 100644
--- a/arch/arm/mach-shmobile/intc-r8a7779.c
+++ b/arch/arm/mach-shmobile/intc-r8a7779.c
@@ -42,8 +42,8 @@ static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
 
 void __init r8a7779_init_irq(void)
 {
-        void __iomem *gic_dist_base = __io(0xf0001000);
-        void __iomem *gic_cpu_base = __io(0xf0000100);
+        void __iomem *gic_dist_base = IOMEM(0xf0001000);
+        void __iomem *gic_cpu_base = IOMEM(0xf0000100);
 
         /* use GIC to handle interrupts */
         gic_init(0, 29, gic_dist_base, gic_cpu_base);
diff --git a/arch/arm/mach-shmobile/intc-sh7367.c b/arch/arm/mach-shmobile/intc-sh7367.c
index cfde9bfc3669..5bf776495b75 100644
--- a/arch/arm/mach-shmobile/intc-sh7367.c
+++ b/arch/arm/mach-shmobile/intc-sh7367.c
@@ -23,6 +23,7 @@
 #include <linux/io.h>
 #include <linux/sh_intc.h>
 #include <mach/intc.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index 89afcaba99a1..6447e0af52d4 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -23,6 +23,7 @@
 #include <linux/io.h>
 #include <linux/sh_intc.h>
 #include <mach/intc.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
diff --git a/arch/arm/mach-shmobile/intc-sh7377.c b/arch/arm/mach-shmobile/intc-sh7377.c
index 2af4e6e9bc5b..b84a460a3405 100644
--- a/arch/arm/mach-shmobile/intc-sh7377.c
+++ b/arch/arm/mach-shmobile/intc-sh7377.c
@@ -23,6 +23,7 @@
 #include <linux/io.h>
 #include <linux/sh_intc.h>
 #include <mach/intc.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index 9857595eaa79..ee447404c857 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -24,6 +24,7 @@
 #include <linux/io.h>
 #include <linux/sh_intc.h>
 #include <mach/intc.h>
+#include <mach/irqs.h>
 #include <mach/sh73a0.h>
 #include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
@@ -420,8 +421,8 @@ static irqreturn_t sh73a0_pint1_demux(int irq, void *dev_id)
 
 void __init sh73a0_init_irq(void)
 {
-        void __iomem *gic_dist_base = __io(0xf0001000);
-        void __iomem *gic_cpu_base = __io(0xf0000100);
+        void __iomem *gic_dist_base = IOMEM(0xf0001000);
+        void __iomem *gic_cpu_base = IOMEM(0xf0000100);
         void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
         int k, n;
 
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 74e52341dd1b..14edb5cffa7f 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -26,6 +26,7 @@
 #include <linux/sh_timer.h>
 #include <mach/r8a7740.h>
 #include <mach/common.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>
 #include <asm/mach/arch.h>
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
index 6820d785493d..12c6f529ab89 100644
--- a/arch/arm/mach-shmobile/setup-r8a7779.c
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -29,6 +29,7 @@
 #include <linux/sh_intc.h>
 #include <linux/sh_timer.h>
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 #include <mach/r8a7779.h>
 #include <mach/common.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-shmobile/setup-sh7367.c b/arch/arm/mach-shmobile/setup-sh7367.c
index a51e1a1e6996..2e3074ab75b3 100644
--- a/arch/arm/mach-shmobile/setup-sh7367.c
+++ b/arch/arm/mach-shmobile/setup-sh7367.c
@@ -30,6 +30,7 @@
 #include <linux/sh_timer.h>
 #include <mach/hardware.h>
 #include <mach/common.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 4e818b7de781..2fe8f83ca124 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -33,6 +33,7 @@
 #include <linux/pm_domain.h>
 #include <linux/dma-mapping.h>
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 #include <mach/sh7372.h>
 #include <mach/common.h>
 #include <asm/mach/map.h>
diff --git a/arch/arm/mach-shmobile/setup-sh7377.c b/arch/arm/mach-shmobile/setup-sh7377.c
index 9f146095098b..d576a6abbade 100644
--- a/arch/arm/mach-shmobile/setup-sh7377.c
+++ b/arch/arm/mach-shmobile/setup-sh7377.c
@@ -32,6 +32,7 @@
 #include <mach/hardware.h>
 #include <mach/common.h>
 #include <asm/mach/map.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index b6a0734a738e..5bebffc10455 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -31,6 +31,7 @@
 #include <linux/sh_intc.h>
 #include <linux/sh_timer.h>
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 #include <mach/sh73a0.h>
 #include <mach/common.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index 9bb7b8575a1f..b62e19d4c9af 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -30,7 +30,7 @@
 #include <asm/smp_twd.h>
 #include <asm/hardware/gic.h>
 
-#define AVECR 0xfe700040
+#define AVECR IOMEM(0xfe700040)
 
 static struct r8a7779_pm_ch r8a7779_ch_cpu1 = {
         .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
@@ -138,7 +138,7 @@ void __init r8a7779_smp_prepare_cpus(void)
         scu_enable(scu_base_addr());
 
         /* Map the reset vector (in headsmp.S) */
-        __raw_writel(__pa(shmobile_secondary_vector), __io(AVECR));
+        __raw_writel(__pa(shmobile_secondary_vector), AVECR);
 
         /* enable cache coherency on CPU0 */
         modify_scu_cpu_psr(0, 3 << (cpu * 8));
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index c0a9093ba3a8..14ad8b052f1a 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -28,11 +28,11 @@
 #include <asm/smp_twd.h>
 #include <asm/hardware/gic.h>
 
-#define WUPCR           0xe6151010
-#define SRESCR          0xe6151018
-#define PSTR            0xe6151040
-#define SBAR            0xe6180020
-#define APARMBAREA      0xe6f10020
+#define WUPCR           IOMEM(0xe6151010)
+#define SRESCR          IOMEM(0xe6151018)
+#define PSTR            IOMEM(0xe6151040)
+#define SBAR            IOMEM(0xe6180020)
+#define APARMBAREA      IOMEM(0xe6f10020)
 
 static void __iomem *scu_base_addr(void)
 {
@@ -78,10 +78,10 @@ int __cpuinit sh73a0_boot_secondary(unsigned int cpu)
         /* enable cache coherency */
         modify_scu_cpu_psr(0, 3 << (cpu * 8));
 
-        if (((__raw_readl(__io(PSTR)) >> (4 * cpu)) & 3) == 3)
-                __raw_writel(1 << cpu, __io(WUPCR));    /* wake up */
+        if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3)
+                __raw_writel(1 << cpu, WUPCR);  /* wake up */
         else
-                __raw_writel(1 << cpu, __io(SRESCR));   /* reset */
+                __raw_writel(1 << cpu, SRESCR); /* reset */
 
         return 0;
 }
@@ -93,8 +93,8 @@ void __init sh73a0_smp_prepare_cpus(void)
         scu_enable(scu_base_addr());
 
         /* Map the reset vector (in headsmp.S) */
-        __raw_writel(0, __io(APARMBAREA));      /* 4k */
-        __raw_writel(__pa(shmobile_secondary_vector), __io(SBAR));
+        __raw_writel(0, APARMBAREA);      /* 4k */
+        __raw_writel(__pa(shmobile_secondary_vector), SBAR);
 
         /* enable cache coherency on CPU0 */
         modify_scu_cpu_psr(0, 3 << (cpu * 8));
diff --git a/arch/arm/mach-spear3xx/clock.c b/arch/arm/mach-spear3xx/clock.c
index f67860cd649f..6c4841f55223 100644
--- a/arch/arm/mach-spear3xx/clock.c
+++ b/arch/arm/mach-spear3xx/clock.c
@@ -12,6 +12,7 @@
  */
 
 #include <linux/init.h>
+#include <linux/io.h>
 #include <linux/kernel.h>
 #include <asm/mach-types.h>
 #include <plat/clock.h>
diff --git a/arch/arm/mach-spear3xx/include/mach/io.h b/arch/arm/mach-spear3xx/include/mach/io.h
deleted file mode 100644
index 30cff8a1f6b5..000000000000
--- a/arch/arm/mach-spear3xx/include/mach/io.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-spear3xx/include/mach/io.h
- *
- * IO definitions for SPEAr3xx machine family
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __MACH_IO_H
-#define __MACH_IO_H
-
-#include <plat/io.h>
-
-#endif /* __MACH_IO_H */
diff --git a/arch/arm/mach-spear6xx/clock.c b/arch/arm/mach-spear6xx/clock.c
index 358f2800f17b..a86499a8a15f 100644
--- a/arch/arm/mach-spear6xx/clock.c
+++ b/arch/arm/mach-spear6xx/clock.c
@@ -12,6 +12,7 @@
  */
 
 #include <linux/init.h>
+#include <linux/io.h>
 #include <linux/kernel.h>
 #include <plat/clock.h>
 #include <mach/misc_regs.h>
diff --git a/arch/arm/mach-spear6xx/include/mach/io.h b/arch/arm/mach-spear6xx/include/mach/io.h
deleted file mode 100644
index fb7c106cea94..000000000000
--- a/arch/arm/mach-spear6xx/include/mach/io.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * arch/arm/mach-spear6xx/include/mach/io.h
- *
- * IO definitions for SPEAr6xx machine family
- *
- * Copyright (C) 2009 ST Microelectronics
- * Rajeev Kumar Kumar<rajeev-dlh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __MACH_IO_H
-#define __MACH_IO_H
-
-#include <plat/io.h>
-
-#endif  /* __MACH_IO_H */
-
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S
index 90069abd37bd..8ce0661b8a3d 100644
--- a/arch/arm/mach-tegra/include/mach/debug-macro.S
+++ b/arch/arm/mach-tegra/include/mach/debug-macro.S
@@ -26,7 +26,6 @@
 
 #include <linux/serial_reg.h>
 
-#include <mach/io.h>
 #include <mach/iomap.h>
 #include <mach/irammap.h>
 
diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h
index f15defffb5d2..fe700f9ce7dc 100644
--- a/arch/arm/mach-tegra/include/mach/io.h
+++ b/arch/arm/mach-tegra/include/mach/io.h
@@ -23,56 +23,8 @@
 
 #define IO_SPACE_LIMIT 0xffff
 
-/* On TEGRA, many peripherals are very closely packed in
- * two 256MB io windows (that actually only use about 64KB
- * at the start of each).
- *
- * We will just map the first 1MB of each window (to minimize
- * pt entries needed) and provide a macro to transform physical
- * io addresses to an appropriate void __iomem *.
- *
- */
-
-#ifdef __ASSEMBLY__
-#define IOMEM(x)        (x)
-#else
-#define IOMEM(x)        ((void __force __iomem *)(x))
-#endif
-
-#define IO_IRAM_PHYS    0x40000000
-#define IO_IRAM_VIRT    IOMEM(0xFE400000)
-#define IO_IRAM_SIZE    SZ_256K
-
-#define IO_CPU_PHYS     0x50040000
-#define IO_CPU_VIRT     IOMEM(0xFE000000)
-#define IO_CPU_SIZE     SZ_16K
-
-#define IO_PPSB_PHYS    0x60000000
-#define IO_PPSB_VIRT    IOMEM(0xFE200000)
-#define IO_PPSB_SIZE    SZ_1M
-
-#define IO_APB_PHYS     0x70000000
-#define IO_APB_VIRT     IOMEM(0xFE300000)
-#define IO_APB_SIZE     SZ_1M
-
-#define IO_TO_VIRT_BETWEEN(p, st, sz)   ((p) >= (st) && (p) < ((st) + (sz)))
-#define IO_TO_VIRT_XLATE(p, pst, vst)   (((p) - (pst) + (vst)))
-
-#define IO_TO_VIRT(n) ( \
-        IO_TO_VIRT_BETWEEN((n), IO_PPSB_PHYS, IO_PPSB_SIZE) ?           \
-                IO_TO_VIRT_XLATE((n), IO_PPSB_PHYS, IO_PPSB_VIRT) :     \
-        IO_TO_VIRT_BETWEEN((n), IO_APB_PHYS, IO_APB_SIZE) ?             \
-                IO_TO_VIRT_XLATE((n), IO_APB_PHYS, IO_APB_VIRT) :       \
-        IO_TO_VIRT_BETWEEN((n), IO_CPU_PHYS, IO_CPU_SIZE) ?             \
-                IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) :       \
-        IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ?           \
-                IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) :     \
-        NULL)
-
 #ifndef __ASSEMBLER__
 
-#define IO_ADDRESS(n) (IO_TO_VIRT(n))
-
 #ifdef CONFIG_TEGRA_PCI
 extern void __iomem *tegra_pcie_io_base;
 
@@ -88,7 +40,6 @@ static inline void __iomem *__io(unsigned long addr)
 #endif
 
 #define __io(a)         __io(a)
-#define __mem_pci(a)    (a)
 
 #endif
 
diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h
index cff672a344f4..7e76da73121c 100644
--- a/arch/arm/mach-tegra/include/mach/iomap.h
+++ b/arch/arm/mach-tegra/include/mach/iomap.h
@@ -277,4 +277,46 @@
 # define TEGRA_DEBUG_UART_BASE TEGRA_UARTE_BASE
 #endif
 
+/* On TEGRA, many peripherals are very closely packed in
+ * two 256MB io windows (that actually only use about 64KB
+ * at the start of each).
+ *
+ * We will just map the first 1MB of each window (to minimize
+ * pt entries needed) and provide a macro to transform physical
+ * io addresses to an appropriate void __iomem *.
+ *
+ */
+
+#define IO_IRAM_PHYS    0x40000000
+#define IO_IRAM_VIRT    IOMEM(0xFE400000)
+#define IO_IRAM_SIZE    SZ_256K
+
+#define IO_CPU_PHYS     0x50040000
+#define IO_CPU_VIRT     IOMEM(0xFE000000)
+#define IO_CPU_SIZE     SZ_16K
+
+#define IO_PPSB_PHYS    0x60000000
+#define IO_PPSB_VIRT    IOMEM(0xFE200000)
+#define IO_PPSB_SIZE    SZ_1M
+
+#define IO_APB_PHYS     0x70000000
+#define IO_APB_VIRT     IOMEM(0xFE300000)
+#define IO_APB_SIZE     SZ_1M
+
+#define IO_TO_VIRT_BETWEEN(p, st, sz)   ((p) >= (st) && (p) < ((st) + (sz)))
+#define IO_TO_VIRT_XLATE(p, pst, vst)   (((p) - (pst) + (vst)))
+
+#define IO_TO_VIRT(n) ( \
+        IO_TO_VIRT_BETWEEN((n), IO_PPSB_PHYS, IO_PPSB_SIZE) ?           \
+                IO_TO_VIRT_XLATE((n), IO_PPSB_PHYS, IO_PPSB_VIRT) :     \
+        IO_TO_VIRT_BETWEEN((n), IO_APB_PHYS, IO_APB_SIZE) ?             \
+                IO_TO_VIRT_XLATE((n), IO_APB_PHYS, IO_APB_VIRT) :       \
+        IO_TO_VIRT_BETWEEN((n), IO_CPU_PHYS, IO_CPU_SIZE) ?             \
+                IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) :       \
+        IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ?           \
+                IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) :     \
+        NULL)
+
+#define IO_ADDRESS(n) (IO_TO_VIRT(n))
+
 #endif
diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c
index d23ee2db2827..58b4baf9c483 100644
--- a/arch/arm/mach-tegra/io.c
+++ b/arch/arm/mach-tegra/io.c
@@ -26,6 +26,7 @@
 
 #include <asm/page.h>
 #include <asm/mach/map.h>
+#include <mach/iomap.h>
 
 #include "board.h"
 
diff --git a/arch/arm/mach-tegra/sleep.S b/arch/arm/mach-tegra/sleep.S
index 8f9fde161c34..5b20197bae7f 100644
--- a/arch/arm/mach-tegra/sleep.S
+++ b/arch/arm/mach-tegra/sleep.S
@@ -23,7 +23,9 @@
  */
 
 #include <linux/linkage.h>
-#include <mach/io.h>
+
+#include <asm/assembler.h>
+
 #include <mach/iomap.h>
 
 #include "flowctrl.h"
diff --git a/arch/arm/mach-u300/include/mach/io.h b/arch/arm/mach-u300/include/mach/io.h
deleted file mode 100644
index 5d6b4c13b3a0..000000000000
--- a/arch/arm/mach-u300/include/mach/io.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- *
- * arch/arm/mach-u300/include/mach/io.h
- *
- *
- * Copyright (C) 2006-2009 ST-Ericsson AB
- * License terms: GNU General Public License (GPL) version 2
- * Dummy IO map for being able to use writew()/readw(),
- * writel()/readw() and similar accessor functions.
- * Author: Linus Walleij <linus.walleij@stericsson.com>
- */
-#ifndef __MACH_IO_H
-#define __MACH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-u300/include/mach/u300-regs.h b/arch/arm/mach-u300/include/mach/u300-regs.h
index 035fdc9dbdb0..7b7cba960b69 100644
--- a/arch/arm/mach-u300/include/mach/u300-regs.h
+++ b/arch/arm/mach-u300/include/mach/u300-regs.h
@@ -18,12 +18,6 @@
  * the defines are used for setting up the I/O memory mapping.
  */
 
-#ifdef __ASSEMBLER__
-#define IOMEM(a) (a)
-#else
-#define IOMEM(a) (void __iomem *) a
-#endif
-
 /* NAND Flash CS0 */
 #define U300_NAND_CS0_PHYS_BASE         0x80000000
 
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h
index d93d6dbef25b..f84698936d36 100644
--- a/arch/arm/mach-ux500/include/mach/hardware.h
+++ b/arch/arm/mach-ux500/include/mach/hardware.h
@@ -23,7 +23,7 @@
         (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + U8500_IO_VIRTUAL)
 
 /* typesafe io address */
-#define __io_address(n)         __io(IO_ADDRESS(n))
+#define __io_address(n)         IOMEM(IO_ADDRESS(n))
 /* Used by some plat-nomadik code */
 #define io_p2v(n)               __io_address(n)
 
diff --git a/arch/arm/mach-ux500/include/mach/io.h b/arch/arm/mach-ux500/include/mach/io.h
deleted file mode 100644
index 1cf3f44ce5b2..000000000000
--- a/arch/arm/mach-ux500/include/mach/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * arch/arm/mach-u8500/include/mach/io.h
- *
- * Copyright (C) 1997-1999 Russell King
- *
- * Modifications:
- *  06-12-1997  RMK     Created.
- *  07-04-1999  RMK     Major cleanup
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We don't actually have real ISA nor PCI buses, but there is so many
- * drivers out there that might just work if we fake them...
- */
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-versatile/include/mach/io.h b/arch/arm/mach-versatile/include/mach/io.h
deleted file mode 100644
index f067c14c7182..000000000000
--- a/arch/arm/mach-versatile/include/mach/io.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- *  arch/arm/mach-versatile/include/mach/io.h
- *
- *  Copyright (C) 2003 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-vexpress/include/mach/io.h b/arch/arm/mach-vexpress/include/mach/io.h
deleted file mode 100644
index 13522d86685e..000000000000
--- a/arch/arm/mach-vexpress/include/mach/io.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- *  arch/arm/mach-vexpress/include/mach/io.h
- *
- *  Copyright (C) 2003 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define __io(a)         __typesafe_io(a)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-vt8500/include/mach/io.h b/arch/arm/mach-vt8500/include/mach/io.h
deleted file mode 100644
index 46181eecf273..000000000000
--- a/arch/arm/mach-vt8500/include/mach/io.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- *  arch/arm/mach-vt8500/include/mach/io.h
- *
- *  Copyright (C) 2010 Alexey Charkov
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define __io(a)         __typesafe_io((a) + 0xf0000000)
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/mach-w90x900/include/mach/io.h b/arch/arm/mach-w90x900/include/mach/io.h
deleted file mode 100644
index d96ab99df05b..000000000000
--- a/arch/arm/mach-w90x900/include/mach/io.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * arch/arm/mach-w90x900/include/mach/io.h
- *
- * Copyright (c) 2008 Nuvoton technology corporation
- * All rights reserved.
- *
- * Wan ZongShun <mcuos.com@gmail.com>
- *
- * Based on arch/arm/mach-s3c2410/include/mach/io.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT  0xffffffff
-
-/*
- * 1:1 mapping for ioremapped regions.
- */
-
-#define __mem_pci(a)    (a)
-#define __io(a)         __typesafe_io(a)
-
-#endif
diff --git a/arch/arm/mach-zynq/include/mach/io.h b/arch/arm/mach-zynq/include/mach/io.h
deleted file mode 100644
index 39d9885e0e9a..000000000000
--- a/arch/arm/mach-zynq/include/mach/io.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* arch/arm/mach-zynq/include/mach/io.h
- *
- *  Copyright (C) 2011 Xilinx
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MACH_IO_H__
-#define __MACH_IO_H__
-
-/* Allow IO space to be anywhere in the memory */
-
-#define IO_SPACE_LIMIT 0xffff
-
-/* IO address mapping macros, nothing special at this time but required */
-
-#ifdef __ASSEMBLER__
-#define IOMEM(x)                (x)
-#else
-#define IOMEM(x)                ((void __force __iomem *)(x))
-#endif
-
-#define __io(a)                 __typesafe_io(a)
-#define __mem_pci(a)            (a)
-
-#endif
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index b1e192ba8c24..a53fd2aaa2f4 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -30,13 +30,13 @@
 
 static void __iomem *l2x0_base;
 static DEFINE_RAW_SPINLOCK(l2x0_lock);
-static uint32_t l2x0_way_mask;  /* Bitmask of active ways */
-static uint32_t l2x0_size;
+static u32 l2x0_way_mask;       /* Bitmask of active ways */
+static u32 l2x0_size;
 
 struct l2x0_regs l2x0_saved_regs;
 
 struct l2x0_of_data {
-        void (*setup)(const struct device_node *, __u32 *, __u32 *);
+        void (*setup)(const struct device_node *, u32 *, u32 *);
         void (*save)(void);
         void (*resume)(void);
 };
@@ -288,7 +288,7 @@ static void l2x0_disable(void)
         raw_spin_unlock_irqrestore(&l2x0_lock, flags);
 }
 
-static void l2x0_unlock(__u32 cache_id)
+static void l2x0_unlock(u32 cache_id)
 {
         int lockregs;
         int i;
@@ -307,11 +307,11 @@ static void l2x0_unlock(__u32 cache_id)
         }
 }
 
-void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
+void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
 {
-        __u32 aux;
-        __u32 cache_id;
-        __u32 way_size = 0;
+        u32 aux;
+        u32 cache_id;
+        u32 way_size = 0;
         int ways;
         const char *type;
 
@@ -388,7 +388,7 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
 
 #ifdef CONFIG_OF
 static void __init l2x0_of_setup(const struct device_node *np,
-                                 __u32 *aux_val, __u32 *aux_mask)
+                                 u32 *aux_val, u32 *aux_mask)
 {
         u32 data[2] = { 0, 0 };
         u32 tag = 0;
@@ -422,7 +422,7 @@ static void __init l2x0_of_setup(const struct device_node *np,
 }
 
 static void __init pl310_of_setup(const struct device_node *np,
-                                  __u32 *aux_val, __u32 *aux_mask)
+                                  u32 *aux_val, u32 *aux_mask)
 {
         u32 data[3] = { 0, 0, 0 };
         u32 tag[3] = { 0, 0, 0 };
@@ -548,7 +548,7 @@ static const struct of_device_id l2x0_ids[] __initconst = {
         {}
 };
 
-int __init l2x0_of_init(__u32 aux_val, __u32 aux_mask)
+int __init l2x0_of_init(u32 aux_val, u32 aux_mask)
 {
         struct device_node *np;
         struct l2x0_of_data *data;
diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c
index ec8c3befb9c8..1267e64133b9 100644
--- a/arch/arm/mm/copypage-v4mc.c
+++ b/arch/arm/mm/copypage-v4mc.c
@@ -23,10 +23,6 @@
 
 #include "mm.h"
 
-/*
- * 0xffff8000 to 0xffffffff is reserved for any ARM architecture
- * specific hacks for copying pages efficiently.
- */
 #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
                                   L_PTE_MT_MINICACHE)
 
@@ -78,10 +74,9 @@ void v4_mc_copy_user_highpage(struct page *to, struct page *from,
 
         raw_spin_lock(&minicache_lock);
 
-        set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
-        flush_tlb_kernel_page(0xffff8000);
+        set_top_pte(COPYPAGE_MINICACHE, mk_pte(from, minicache_pgprot));
 
-        mc_copy_user_page((void *)0xffff8000, kto);
+        mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto);
 
         raw_spin_unlock(&minicache_lock);
 
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c
index 8b03a5814d00..b9bcc9d79176 100644
--- a/arch/arm/mm/copypage-v6.c
+++ b/arch/arm/mm/copypage-v6.c
@@ -24,9 +24,6 @@
 #error FIX ME
 #endif
 
-#define from_address    (0xffff8000)
-#define to_address      (0xffffc000)
-
 static DEFINE_RAW_SPINLOCK(v6_lock);
 
 /*
@@ -90,14 +87,11 @@ static void v6_copy_user_highpage_aliasing(struct page *to,
          */
         raw_spin_lock(&v6_lock);
 
-        set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(page_to_pfn(from), PAGE_KERNEL), 0);
-        set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(to), PAGE_KERNEL), 0);
-
-        kfrom = from_address + (offset << PAGE_SHIFT);
-        kto   = to_address + (offset << PAGE_SHIFT);
+        kfrom = COPYPAGE_V6_FROM + (offset << PAGE_SHIFT);
+        kto   = COPYPAGE_V6_TO + (offset << PAGE_SHIFT);
 
-        flush_tlb_kernel_page(kfrom);
-        flush_tlb_kernel_page(kto);
+        set_top_pte(kfrom, mk_pte(from, PAGE_KERNEL));
+        set_top_pte(kto, mk_pte(to, PAGE_KERNEL));
 
         copy_page((void *)kto, (void *)kfrom);
 
@@ -111,8 +105,7 @@ static void v6_copy_user_highpage_aliasing(struct page *to,
  */
 static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vaddr)
 {
-        unsigned int offset = CACHE_COLOUR(vaddr);
-        unsigned long to = to_address + (offset << PAGE_SHIFT);
+        unsigned long to = COPYPAGE_V6_TO + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
 
         /* FIXME: not highmem safe */
         discard_old_kernel_data(page_address(page));
@@ -123,8 +116,7 @@ static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vad
          */
         raw_spin_lock(&v6_lock);
 
-        set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(page), PAGE_KERNEL), 0);
-        flush_tlb_kernel_page(to);
+        set_top_pte(to, mk_pte(page, PAGE_KERNEL));
         clear_page((void *)to);
 
         raw_spin_unlock(&v6_lock);
diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c
index 439d106ae638..0fb85025344d 100644
--- a/arch/arm/mm/copypage-xscale.c
+++ b/arch/arm/mm/copypage-xscale.c
@@ -23,12 +23,6 @@
 
 #include "mm.h"
 
-/*
- * 0xffff8000 to 0xffffffff is reserved for any ARM architecture
- * specific hacks for copying pages efficiently.
- */
-#define COPYPAGE_MINICACHE      0xffff8000
-
 #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
                                   L_PTE_MT_MINICACHE)
 
@@ -100,8 +94,7 @@ void xscale_mc_copy_user_highpage(struct page *to, struct page *from,
 
         raw_spin_lock(&minicache_lock);
 
-        set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
-        flush_tlb_kernel_page(COPYPAGE_MINICACHE);
+        set_top_pte(COPYPAGE_MINICACHE, mk_pte(from, minicache_pgprot));
 
         mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto);
 
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 1aa664a1999f..db23ae4aaaab 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -214,7 +214,8 @@ static int __init consistent_init(void)
 core_initcall(consistent_init);
 
 static void *
-__dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot)
+__dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
+        const void *caller)
 {
         struct arm_vmregion *c;
         size_t align;
@@ -241,7 +242,7 @@ __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot)
          * Allocate a virtual address in the consistent mapping region.
          */
         c = arm_vmregion_alloc(&consistent_head, align, size,
-                            gfp & ~(__GFP_DMA | __GFP_HIGHMEM));
+                            gfp & ~(__GFP_DMA | __GFP_HIGHMEM), caller);
         if (c) {
                 pte_t *pte;
                 int idx = CONSISTENT_PTE_INDEX(c->vm_start);
@@ -320,14 +321,14 @@ static void __dma_free_remap(void *cpu_addr, size_t size)
 
 #else   /* !CONFIG_MMU */
 
-#define __dma_alloc_remap(page, size, gfp, prot)        page_address(page)
+#define __dma_alloc_remap(page, size, gfp, prot, c)     page_address(page)
 #define __dma_free_remap(addr, size)                    do { } while (0)
 
 #endif  /* CONFIG_MMU */
 
 static void *
 __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
-            pgprot_t prot)
+            pgprot_t prot, const void *caller)
 {
         struct page *page;
         void *addr;
@@ -349,7 +350,7 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
                 return NULL;
 
         if (!arch_is_coherent())
-                addr = __dma_alloc_remap(page, size, gfp, prot);
+                addr = __dma_alloc_remap(page, size, gfp, prot, caller);
         else
                 addr = page_address(page);
 
@@ -374,7 +375,8 @@ dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gf
                 return memory;
 
         return __dma_alloc(dev, size, handle, gfp,
-                           pgprot_dmacoherent(pgprot_kernel));
+                           pgprot_dmacoherent(pgprot_kernel),
+                           __builtin_return_address(0));
 }
 EXPORT_SYMBOL(dma_alloc_coherent);
 
@@ -386,7 +388,8 @@ void *
 dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
 {
         return __dma_alloc(dev, size, handle, gfp,
-                           pgprot_writecombine(pgprot_kernel));
+                           pgprot_writecombine(pgprot_kernel),
+                           __builtin_return_address(0));
 }
 EXPORT_SYMBOL(dma_alloc_writecombine);
 
@@ -723,6 +726,9 @@ EXPORT_SYMBOL(dma_set_mask);
 
 static int __init dma_debug_do_init(void)
 {
+#ifdef CONFIG_MMU
+        arm_vmregion_create_proc("dma-mappings", &consistent_head);
+#endif
         dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
         return 0;
 }
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index 5bdff5c3e6cb..9055b5a84ec5 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -165,7 +165,8 @@ __do_user_fault(struct task_struct *tsk, unsigned long addr,
         struct siginfo si;
 
 #ifdef CONFIG_DEBUG_USER
-        if (user_debug & UDBG_SEGV) {
+        if (((user_debug & UDBG_SEGV) && (sig == SIGSEGV)) ||
+            ((user_debug & UDBG_BUS)  && (sig == SIGBUS))) {
                 printk(KERN_DEBUG "%s: unhandled page fault (%d) at 0x%08lx, code 0x%03x\n",
                        tsk->comm, sig, addr, fsr);
                 show_pte(tsk->mm, addr);
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 062d61a1f87d..77458548e031 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -22,15 +22,12 @@
 
 #ifdef CONFIG_CPU_CACHE_VIPT
 
-#define ALIAS_FLUSH_START       0xffff4000
-
 static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
 {
-        unsigned long to = ALIAS_FLUSH_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
+        unsigned long to = FLUSH_ALIAS_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
         const int zero = 0;
 
-        set_pte_ext(TOP_PTE(to), pfn_pte(pfn, PAGE_KERNEL), 0);
-        flush_tlb_kernel_page(to);
+        set_top_pte(to, pfn_pte(pfn, PAGE_KERNEL));
 
         asm(    "mcrr   p15, 0, %1, %0, c14\n"
         "       mcr     p15, 0, %2, c7, c10, 4"
@@ -41,13 +38,12 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
 
 static void flush_icache_alias(unsigned long pfn, unsigned long vaddr, unsigned long len)
 {
-        unsigned long colour = CACHE_COLOUR(vaddr);
+        unsigned long va = FLUSH_ALIAS_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
         unsigned long offset = vaddr & (PAGE_SIZE - 1);
         unsigned long to;
 
-        set_pte_ext(TOP_PTE(ALIAS_FLUSH_START) + colour, pfn_pte(pfn, PAGE_KERNEL), 0);
-        to = ALIAS_FLUSH_START + (colour << PAGE_SHIFT) + offset;
-        flush_tlb_kernel_page(to);
+        set_top_pte(va, pfn_pte(pfn, PAGE_KERNEL));
+        to = va + offset;
         flush_icache_range(to, to + len);
 }
 
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c
index 5a21505d7550..21b9e1bf9b77 100644
--- a/arch/arm/mm/highmem.c
+++ b/arch/arm/mm/highmem.c
@@ -69,15 +69,14 @@ void *kmap_atomic(struct page *page)
          * With debugging enabled, kunmap_atomic forces that entry to 0.
          * Make sure it was indeed properly unmapped.
          */
-        BUG_ON(!pte_none(*(TOP_PTE(vaddr))));
+        BUG_ON(!pte_none(get_top_pte(vaddr)));
 #endif
-        set_pte_ext(TOP_PTE(vaddr), mk_pte(page, kmap_prot), 0);
         /*
          * When debugging is off, kunmap_atomic leaves the previous mapping
-         * in place, so this TLB flush ensures the TLB is updated with the
-         * new mapping.
+         * in place, so the contained TLB flush ensures the TLB is updated
+         * with the new mapping.
          */
-        local_flush_tlb_kernel_page(vaddr);
+        set_top_pte(vaddr, mk_pte(page, kmap_prot));
 
         return (void *)vaddr;
 }
@@ -96,8 +95,7 @@ void __kunmap_atomic(void *kvaddr)
                         __cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE);
 #ifdef CONFIG_DEBUG_HIGHMEM
                 BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
-                set_pte_ext(TOP_PTE(vaddr), __pte(0), 0);
-                local_flush_tlb_kernel_page(vaddr);
+                set_top_pte(vaddr, __pte(0));
 #else
                 (void) idx;  /* to kill a warning */
 #endif
@@ -121,10 +119,9 @@ void *kmap_atomic_pfn(unsigned long pfn)
         idx = type + KM_TYPE_NR * smp_processor_id();
         vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
 #ifdef CONFIG_DEBUG_HIGHMEM
-        BUG_ON(!pte_none(*(TOP_PTE(vaddr))));
+        BUG_ON(!pte_none(get_top_pte(vaddr)));
 #endif
-        set_pte_ext(TOP_PTE(vaddr), pfn_pte(pfn, kmap_prot), 0);
-        local_flush_tlb_kernel_page(vaddr);
+        set_top_pte(vaddr, pfn_pte(pfn, kmap_prot));
 
         return (void *)vaddr;
 }
@@ -132,11 +129,9 @@ void *kmap_atomic_pfn(unsigned long pfn)
 struct page *kmap_atomic_to_page(const void *ptr)
 {
         unsigned long vaddr = (unsigned long)ptr;
-        pte_t *pte;
 
         if (vaddr < FIXADDR_START)
                 return virt_to_page(ptr);
 
-        pte = TOP_PTE(vaddr);
-        return pte_page(*pte);
+        return pte_page(get_top_pte(vaddr));
 }
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 245a55a0a5bb..595079fa9d1d 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -658,7 +658,9 @@ void __init mem_init(void)
 #ifdef CONFIG_HIGHMEM
                         "    pkmap   : 0x%08lx - 0x%08lx   (%4ld MB)\n"
 #endif
+#ifdef CONFIG_MODULES
                         "    modules : 0x%08lx - 0x%08lx   (%4ld MB)\n"
+#endif
                         "      .text : 0x%p" " - 0x%p" "   (%4d kB)\n"
                         "      .init : 0x%p" " - 0x%p" "   (%4d kB)\n"
                         "      .data : 0x%p" " - 0x%p" "   (%4d kB)\n"
@@ -677,7 +679,9 @@ void __init mem_init(void)
                         MLM(PKMAP_BASE, (PKMAP_BASE) + (LAST_PKMAP) *
                                 (PAGE_SIZE)),
 #endif
+#ifdef CONFIG_MODULES
                         MLM(MODULES_VADDR, MODULES_END),
+#endif
 
                         MLK_ROUNDUP(_text, _etext),
                         MLK_ROUNDUP(__init_begin, __init_end),
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 6780b49f2c69..4f55f5062ab7 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -308,11 +308,15 @@ __arm_ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size,
 }
 EXPORT_SYMBOL(__arm_ioremap_pfn);
 
+void __iomem * (*arch_ioremap_caller)(unsigned long, size_t,
+                                      unsigned int, void *) =
+        __arm_ioremap_caller;
+
 void __iomem *
 __arm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
 {
-        return __arm_ioremap_caller(phys_addr, size, mtype,
-                        __builtin_return_address(0));
+        return arch_ioremap_caller(phys_addr, size, mtype,
+                __builtin_return_address(0));
 }
 EXPORT_SYMBOL(__arm_ioremap);
 
@@ -371,4 +375,11 @@ void __iounmap(volatile void __iomem *io_addr)
 
         vunmap(addr);
 }
-EXPORT_SYMBOL(__iounmap);
+
+void (*arch_iounmap)(volatile void __iomem *) = __iounmap;
+
+void __arm_iounmap(volatile void __iomem *io_addr)
+{
+        arch_iounmap(io_addr);
+}
+EXPORT_SYMBOL(__arm_iounmap);
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index 70f6d3ea4834..27f4a619b35d 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -3,7 +3,31 @@
 /* the upper-most page table pointer */
 extern pmd_t *top_pmd;
 
-#define TOP_PTE(x)      pte_offset_kernel(top_pmd, x)
+/*
+ * 0xffff8000 to 0xffffffff is reserved for any ARM architecture
+ * specific hacks for copying pages efficiently, while 0xffff4000
+ * is reserved for VIPT aliasing flushing by generic code.
+ *
+ * Note that we don't allow VIPT aliasing caches with SMP.
+ */
+#define COPYPAGE_MINICACHE      0xffff8000
+#define COPYPAGE_V6_FROM        0xffff8000
+#define COPYPAGE_V6_TO          0xffffc000
+/* PFN alias flushing, for VIPT caches */
+#define FLUSH_ALIAS_START       0xffff4000
+
+static inline void set_top_pte(unsigned long va, pte_t pte)
+{
+        pte_t *ptep = pte_offset_kernel(top_pmd, va);
+        set_pte_ext(ptep, pte, 0);
+        local_flush_tlb_kernel_page(va);
+}
+
+static inline pte_t get_top_pte(unsigned long va)
+{
+        pte_t *ptep = pte_offset_kernel(top_pmd, va);
+        return *ptep;
+}
 
 static inline pmd_t *pmd_off_k(unsigned long virt)
 {
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index cd439c1dd506..b86f8933ff91 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -999,11 +999,14 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
 {
         struct map_desc map;
         unsigned long addr;
+        void *vectors;
 
         /*
          * Allocate the vector page early.
          */
-        vectors_page = early_alloc(PAGE_SIZE);
+        vectors = early_alloc(PAGE_SIZE);
+
+        early_trap_init(vectors);
 
         for (addr = VMALLOC_START; addr; addr += PMD_SIZE)
                 pmd_clear(pmd_off_k(addr));
@@ -1043,7 +1046,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
          * location (0xffff0000).  If we aren't using high-vectors, also
          * create a mapping at the low-vectors virtual address.
          */
-        map.pfn = __phys_to_pfn(virt_to_phys(vectors_page));
+        map.pfn = __phys_to_pfn(virt_to_phys(vectors));
         map.virtual = 0xffff0000;
         map.length = PAGE_SIZE;
         map.type = MT_HIGH_VECTORS;
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 4fc6794cca4b..6486d2f253cd 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -86,13 +86,17 @@ void __iomem *__arm_ioremap(unsigned long phys_addr, size_t size,
 }
 EXPORT_SYMBOL(__arm_ioremap);
 
+void __iomem * (*arch_ioremap_caller)(unsigned long, size_t, unsigned int, void *);
+
 void __iomem *__arm_ioremap_caller(unsigned long phys_addr, size_t size,
                                    unsigned int mtype, void *caller)
 {
         return __arm_ioremap(phys_addr, size, mtype);
 }
 
-void __iounmap(volatile void __iomem *addr)
+void (*arch_iounmap)(volatile void __iomem *);
+
+void __arm_iounmap(volatile void __iomem *addr)
 {
 }
-EXPORT_SYMBOL(__iounmap);
+EXPORT_SYMBOL(__arm_iounmap);
diff --git a/arch/arm/mm/vmregion.c b/arch/arm/mm/vmregion.c
index 036fdbfdd62f..a631016e1f8f 100644
--- a/arch/arm/mm/vmregion.c
+++ b/arch/arm/mm/vmregion.c
@@ -1,5 +1,8 @@
+#include <linux/fs.h>
 #include <linux/spinlock.h>
 #include <linux/list.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
 #include <linux/slab.h>
 
 #include "vmregion.h"
@@ -36,7 +39,7 @@
 
 struct arm_vmregion *
 arm_vmregion_alloc(struct arm_vmregion_head *head, size_t align,
-                   size_t size, gfp_t gfp)
+                   size_t size, gfp_t gfp, const void *caller)
 {
         unsigned long start = head->vm_start, addr = head->vm_end;
         unsigned long flags;
@@ -52,6 +55,8 @@ arm_vmregion_alloc(struct arm_vmregion_head *head, size_t align,
         if (!new)
                 goto out;
 
+        new->caller = caller;
+
         spin_lock_irqsave(&head->vm_lock, flags);
 
         addr = rounddown(addr - size, align);
@@ -129,3 +134,72 @@ void arm_vmregion_free(struct arm_vmregion_head *head, struct arm_vmregion *c)
 
         kfree(c);
 }
+
+#ifdef CONFIG_PROC_FS
+static int arm_vmregion_show(struct seq_file *m, void *p)
+{
+        struct arm_vmregion *c = list_entry(p, struct arm_vmregion, vm_list);
+
+        seq_printf(m, "0x%08lx-0x%08lx %7lu", c->vm_start, c->vm_end,
+                c->vm_end - c->vm_start);
+        if (c->caller)
+                seq_printf(m, " %pS", (void *)c->caller);
+        seq_putc(m, '\n');
+        return 0;
+}
+
+static void *arm_vmregion_start(struct seq_file *m, loff_t *pos)
+{
+        struct arm_vmregion_head *h = m->private;
+        spin_lock_irq(&h->vm_lock);
+        return seq_list_start(&h->vm_list, *pos);
+}
+
+static void *arm_vmregion_next(struct seq_file *m, void *p, loff_t *pos)
+{
+        struct arm_vmregion_head *h = m->private;
+        return seq_list_next(p, &h->vm_list, pos);
+}
+
+static void arm_vmregion_stop(struct seq_file *m, void *p)
+{
+        struct arm_vmregion_head *h = m->private;
+        spin_unlock_irq(&h->vm_lock);
+}
+
+static const struct seq_operations arm_vmregion_ops = {
+        .start  = arm_vmregion_start,
+        .stop   = arm_vmregion_stop,
+        .next   = arm_vmregion_next,
+        .show   = arm_vmregion_show,
+};
+
+static int arm_vmregion_open(struct inode *inode, struct file *file)
+{
+        struct arm_vmregion_head *h = PDE(inode)->data;
+        int ret = seq_open(file, &arm_vmregion_ops);
+        if (!ret) {
+                struct seq_file *m = file->private_data;
+                m->private = h;
+        }
+        return ret;
+}
+
+static const struct file_operations arm_vmregion_fops = {
+        .open   = arm_vmregion_open,
+        .read   = seq_read,
+        .llseek = seq_lseek,
+        .release = seq_release,
+};
+
+int arm_vmregion_create_proc(const char *path, struct arm_vmregion_head *h)
+{
+        proc_create_data(path, S_IRUSR, NULL, &arm_vmregion_fops, h);
+        return 0;
+}
+#else
+int arm_vmregion_create_proc(const char *path, struct arm_vmregion_head *h)
+{
+        return 0;
+}
+#endif
diff --git a/arch/arm/mm/vmregion.h b/arch/arm/mm/vmregion.h
index 15e9f044db9f..162be662c088 100644
--- a/arch/arm/mm/vmregion.h
+++ b/arch/arm/mm/vmregion.h
@@ -19,11 +19,14 @@ struct arm_vmregion {
         unsigned long           vm_end;
         struct page             *vm_pages;
         int                     vm_active;
+        const void              *caller;
 };
 
-struct arm_vmregion *arm_vmregion_alloc(struct arm_vmregion_head *, size_t, size_t, gfp_t);
+struct arm_vmregion *arm_vmregion_alloc(struct arm_vmregion_head *, size_t, size_t, gfp_t, const void *);
 struct arm_vmregion *arm_vmregion_find(struct arm_vmregion_head *, unsigned long);
 struct arm_vmregion *arm_vmregion_find_remove(struct arm_vmregion_head *, unsigned long);
 void arm_vmregion_free(struct arm_vmregion_head *, struct arm_vmregion *);
 
+int arm_vmregion_create_proc(const char *, struct arm_vmregion_head *);
+
 #endif
diff --git a/arch/arm/net/Makefile b/arch/arm/net/Makefile
new file mode 100644
index 000000000000..c2c10841b6be
--- /dev/null
+++ b/arch/arm/net/Makefile
@@ -0,0 +1,3 @@
+# ARM-specific networking code
+
+obj-$(CONFIG_BPF_JIT) += bpf_jit_32.o
diff --git a/arch/arm/net/bpf_jit_32.c b/arch/arm/net/bpf_jit_32.c
new file mode 100644
index 000000000000..62135849f48b
--- /dev/null
+++ b/arch/arm/net/bpf_jit_32.c
@@ -0,0 +1,915 @@
+/*
+ * Just-In-Time compiler for BPF filters on 32bit ARM
+ *
+ * Copyright (c) 2011 Mircea Gherzan <mgherzan@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; version 2 of the License.
+ */
+
+#include <linux/bitops.h>
+#include <linux/compiler.h>
+#include <linux/errno.h>
+#include <linux/filter.h>
+#include <linux/moduleloader.h>
+#include <linux/netdevice.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+#include <asm/cacheflush.h>
+#include <asm/hwcap.h>
+
+#include "bpf_jit_32.h"
+
+/*
+ * ABI:
+ *
+ * r0   scratch register
+ * r4   BPF register A
+ * r5   BPF register X
+ * r6   pointer to the skb
+ * r7   skb->data
+ * r8   skb_headlen(skb)
+ */
+
+#define r_scratch       ARM_R0
+/* r1-r3 are (also) used for the unaligned loads on the non-ARMv7 slowpath */
+#define r_off           ARM_R1
+#define r_A             ARM_R4
+#define r_X             ARM_R5
+#define r_skb           ARM_R6
+#define r_skb_data      ARM_R7
+#define r_skb_hl        ARM_R8
+
+#define SCRATCH_SP_OFFSET       0
+#define SCRATCH_OFF(k)          (SCRATCH_SP_OFFSET + (k))
+
+#define SEEN_MEM                ((1 << BPF_MEMWORDS) - 1)
+#define SEEN_MEM_WORD(k)        (1 << (k))
+#define SEEN_X                  (1 << BPF_MEMWORDS)
+#define SEEN_CALL               (1 << (BPF_MEMWORDS + 1))
+#define SEEN_SKB                (1 << (BPF_MEMWORDS + 2))
+#define SEEN_DATA               (1 << (BPF_MEMWORDS + 3))
+
+#define FLAG_NEED_X_RESET       (1 << 0)
+
+struct jit_ctx {
+        const struct sk_filter *skf;
+        unsigned idx;
+        unsigned prologue_bytes;
+        int ret0_fp_idx;
+        u32 seen;
+        u32 flags;
+        u32 *offsets;
+        u32 *target;
+#if __LINUX_ARM_ARCH__ < 7
+        u16 epilogue_bytes;
+        u16 imm_count;
+        u32 *imms;
+#endif
+};
+
+int bpf_jit_enable __read_mostly;
+
+static u64 jit_get_skb_b(struct sk_buff *skb, unsigned offset)
+{
+        u8 ret;
+        int err;
+
+        err = skb_copy_bits(skb, offset, &ret, 1);
+
+        return (u64)err << 32 | ret;
+}
+
+static u64 jit_get_skb_h(struct sk_buff *skb, unsigned offset)
+{
+        u16 ret;
+        int err;
+
+        err = skb_copy_bits(skb, offset, &ret, 2);
+
+        return (u64)err << 32 | ntohs(ret);
+}
+
+static u64 jit_get_skb_w(struct sk_buff *skb, unsigned offset)
+{
+        u32 ret;
+        int err;
+
+        err = skb_copy_bits(skb, offset, &ret, 4);
+
+        return (u64)err << 32 | ntohl(ret);
+}
+
+/*
+ * Wrapper that handles both OABI and EABI and assures Thumb2 interworking
+ * (where the assembly routines like __aeabi_uidiv could cause problems).
+ */
+static u32 jit_udiv(u32 dividend, u32 divisor)
+{
+        return dividend / divisor;
+}
+
+static inline void _emit(int cond, u32 inst, struct jit_ctx *ctx)
+{
+        if (ctx->target != NULL)
+                ctx->target[ctx->idx] = inst | (cond << 28);
+
+        ctx->idx++;
+}
+
+/*
+ * Emit an instruction that will be executed unconditionally.
+ */
+static inline void emit(u32 inst, struct jit_ctx *ctx)
+{
+        _emit(ARM_COND_AL, inst, ctx);
+}
+
+static u16 saved_regs(struct jit_ctx *ctx)
+{
+        u16 ret = 0;
+
+        if ((ctx->skf->len > 1) ||
+            (ctx->skf->insns[0].code == BPF_S_RET_A))
+                ret |= 1 << r_A;
+
+#ifdef CONFIG_FRAME_POINTER
+        ret |= (1 << ARM_FP) | (1 << ARM_IP) | (1 << ARM_LR) | (1 << ARM_PC);
+#else
+        if (ctx->seen & SEEN_CALL)
+                ret |= 1 << ARM_LR;
+#endif
+        if (ctx->seen & (SEEN_DATA | SEEN_SKB))
+                ret |= 1 << r_skb;
+        if (ctx->seen & SEEN_DATA)
+                ret |= (1 << r_skb_data) | (1 << r_skb_hl);
+        if (ctx->seen & SEEN_X)
+                ret |= 1 << r_X;
+
+        return ret;
+}
+
+static inline int mem_words_used(struct jit_ctx *ctx)
+{
+        /* yes, we do waste some stack space IF there are "holes" in the set" */
+        return fls(ctx->seen & SEEN_MEM);
+}
+
+static inline bool is_load_to_a(u16 inst)
+{
+        switch (inst) {
+        case BPF_S_LD_W_LEN:
+        case BPF_S_LD_W_ABS:
+        case BPF_S_LD_H_ABS:
+        case BPF_S_LD_B_ABS:
+        case BPF_S_ANC_CPU:
+        case BPF_S_ANC_IFINDEX:
+        case BPF_S_ANC_MARK:
+        case BPF_S_ANC_PROTOCOL:
+        case BPF_S_ANC_RXHASH:
+        case BPF_S_ANC_QUEUE:
+                return true;
+        default:
+                return false;
+        }
+}
+
+static void build_prologue(struct jit_ctx *ctx)
+{
+        u16 reg_set = saved_regs(ctx);
+        u16 first_inst = ctx->skf->insns[0].code;
+        u16 off;
+
+#ifdef CONFIG_FRAME_POINTER
+        emit(ARM_MOV_R(ARM_IP, ARM_SP), ctx);
+        emit(ARM_PUSH(reg_set), ctx);
+        emit(ARM_SUB_I(ARM_FP, ARM_IP, 4), ctx);
+#else
+        if (reg_set)
+                emit(ARM_PUSH(reg_set), ctx);
+#endif
+
+        if (ctx->seen & (SEEN_DATA | SEEN_SKB))
+                emit(ARM_MOV_R(r_skb, ARM_R0), ctx);
+
+        if (ctx->seen & SEEN_DATA) {
+                off = offsetof(struct sk_buff, data);
+                emit(ARM_LDR_I(r_skb_data, r_skb, off), ctx);
+                /* headlen = len - data_len */
+                off = offsetof(struct sk_buff, len);
+                emit(ARM_LDR_I(r_skb_hl, r_skb, off), ctx);
+                off = offsetof(struct sk_buff, data_len);
+                emit(ARM_LDR_I(r_scratch, r_skb, off), ctx);
+                emit(ARM_SUB_R(r_skb_hl, r_skb_hl, r_scratch), ctx);
+        }
+
+        if (ctx->flags & FLAG_NEED_X_RESET)
+                emit(ARM_MOV_I(r_X, 0), ctx);
+
+        /* do not leak kernel data to userspace */
+        if ((first_inst != BPF_S_RET_K) && !(is_load_to_a(first_inst)))
+                emit(ARM_MOV_I(r_A, 0), ctx);
+
+        /* stack space for the BPF_MEM words */
+        if (ctx->seen & SEEN_MEM)
+                emit(ARM_SUB_I(ARM_SP, ARM_SP, mem_words_used(ctx) * 4), ctx);
+}
+
+static void build_epilogue(struct jit_ctx *ctx)
+{
+        u16 reg_set = saved_regs(ctx);
+
+        if (ctx->seen & SEEN_MEM)
+                emit(ARM_ADD_I(ARM_SP, ARM_SP, mem_words_used(ctx) * 4), ctx);
+
+        reg_set &= ~(1 << ARM_LR);
+
+#ifdef CONFIG_FRAME_POINTER
+        /* the first instruction of the prologue was: mov ip, sp */
+        reg_set &= ~(1 << ARM_IP);
+        reg_set |= (1 << ARM_SP);
+        emit(ARM_LDM(ARM_SP, reg_set), ctx);
+#else
+        if (reg_set) {
+                if (ctx->seen & SEEN_CALL)
+                        reg_set |= 1 << ARM_PC;
+                emit(ARM_POP(reg_set), ctx);
+        }
+
+        if (!(ctx->seen & SEEN_CALL))
+                emit(ARM_BX(ARM_LR), ctx);
+#endif
+}
+
+static int16_t imm8m(u32 x)
+{
+        u32 rot;
+
+        for (rot = 0; rot < 16; rot++)
+                if ((x & ~ror32(0xff, 2 * rot)) == 0)
+                        return rol32(x, 2 * rot) | (rot << 8);
+
+        return -1;
+}
+
+#if __LINUX_ARM_ARCH__ < 7
+
+static u16 imm_offset(u32 k, struct jit_ctx *ctx)
+{
+        unsigned i = 0, offset;
+        u16 imm;
+
+        /* on the "fake" run we just count them (duplicates included) */
+        if (ctx->target == NULL) {
+                ctx->imm_count++;
+                return 0;
+        }
+
+        while ((i < ctx->imm_count) && ctx->imms[i]) {
+                if (ctx->imms[i] == k)
+                        break;
+                i++;
+        }
+
+        if (ctx->imms[i] == 0)
+                ctx->imms[i] = k;
+
+        /* constants go just after the epilogue */
+        offset =  ctx->offsets[ctx->skf->len];
+        offset += ctx->prologue_bytes;
+        offset += ctx->epilogue_bytes;
+        offset += i * 4;
+
+        ctx->target[offset / 4] = k;
+
+        /* PC in ARM mode == address of the instruction + 8 */
+        imm = offset - (8 + ctx->idx * 4);
+
+        return imm;
+}
+
+#endif /* __LINUX_ARM_ARCH__ */
+
+/*
+ * Move an immediate that's not an imm8m to a core register.
+ */
+static inline void emit_mov_i_no8m(int rd, u32 val, struct jit_ctx *ctx)
+{
+#if __LINUX_ARM_ARCH__ < 7
+        emit(ARM_LDR_I(rd, ARM_PC, imm_offset(val, ctx)), ctx);
+#else
+        emit(ARM_MOVW(rd, val & 0xffff), ctx);
+        if (val > 0xffff)
+                emit(ARM_MOVT(rd, val >> 16), ctx);
+#endif
+}
+
+static inline void emit_mov_i(int rd, u32 val, struct jit_ctx *ctx)
+{
+        int imm12 = imm8m(val);
+
+        if (imm12 >= 0)
+                emit(ARM_MOV_I(rd, imm12), ctx);
+        else
+                emit_mov_i_no8m(rd, val, ctx);
+}
+
+#if __LINUX_ARM_ARCH__ < 6
+
+static void emit_load_be32(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
+{
+        _emit(cond, ARM_LDRB_I(ARM_R3, r_addr, 1), ctx);
+        _emit(cond, ARM_LDRB_I(ARM_R1, r_addr, 0), ctx);
+        _emit(cond, ARM_LDRB_I(ARM_R2, r_addr, 3), ctx);
+        _emit(cond, ARM_LSL_I(ARM_R3, ARM_R3, 16), ctx);
+        _emit(cond, ARM_LDRB_I(ARM_R0, r_addr, 2), ctx);
+        _emit(cond, ARM_ORR_S(ARM_R3, ARM_R3, ARM_R1, SRTYPE_LSL, 24), ctx);
+        _emit(cond, ARM_ORR_R(ARM_R3, ARM_R3, ARM_R2), ctx);
+        _emit(cond, ARM_ORR_S(r_res, ARM_R3, ARM_R0, SRTYPE_LSL, 8), ctx);
+}
+
+static void emit_load_be16(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
+{
+        _emit(cond, ARM_LDRB_I(ARM_R1, r_addr, 0), ctx);
+        _emit(cond, ARM_LDRB_I(ARM_R2, r_addr, 1), ctx);
+        _emit(cond, ARM_ORR_S(r_res, ARM_R2, ARM_R1, SRTYPE_LSL, 8), ctx);
+}
+
+static inline void emit_swap16(u8 r_dst, u8 r_src, struct jit_ctx *ctx)
+{
+        emit(ARM_LSL_R(ARM_R1, r_src, 8), ctx);
+        emit(ARM_ORR_S(r_dst, ARM_R1, r_src, SRTYPE_LSL, 8), ctx);
+        emit(ARM_LSL_I(r_dst, r_dst, 8), ctx);
+        emit(ARM_LSL_R(r_dst, r_dst, 8), ctx);
+}
+
+#else  /* ARMv6+ */
+
+static void emit_load_be32(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
+{
+        _emit(cond, ARM_LDR_I(r_res, r_addr, 0), ctx);
+#ifdef __LITTLE_ENDIAN
+        _emit(cond, ARM_REV(r_res, r_res), ctx);
+#endif
+}
+
+static void emit_load_be16(u8 cond, u8 r_res, u8 r_addr, struct jit_ctx *ctx)
+{
+        _emit(cond, ARM_LDRH_I(r_res, r_addr, 0), ctx);
+#ifdef __LITTLE_ENDIAN
+        _emit(cond, ARM_REV16(r_res, r_res), ctx);
+#endif
+}
+
+static inline void emit_swap16(u8 r_dst __maybe_unused,
+                               u8 r_src __maybe_unused,
+                               struct jit_ctx *ctx __maybe_unused)
+{
+#ifdef __LITTLE_ENDIAN
+        emit(ARM_REV16(r_dst, r_src), ctx);
+#endif
+}
+
+#endif /* __LINUX_ARM_ARCH__ < 6 */
+
+
+/* Compute the immediate value for a PC-relative branch. */
+static inline u32 b_imm(unsigned tgt, struct jit_ctx *ctx)
+{
+        u32 imm;
+
+        if (ctx->target == NULL)
+                return 0;
+        /*
+         * BPF allows only forward jumps and the offset of the target is
+         * still the one computed during the first pass.
+         */
+        imm  = ctx->offsets[tgt] + ctx->prologue_bytes - (ctx->idx * 4 + 8);
+
+        return imm >> 2;
+}
+
+#define OP_IMM3(op, r1, r2, imm_val, ctx)                               \
+        do {                                                            \
+                imm12 = imm8m(imm_val);                                 \
+                if (imm12 < 0) {                                        \
+                        emit_mov_i_no8m(r_scratch, imm_val, ctx);       \
+                        emit(op ## _R((r1), (r2), r_scratch), ctx);     \
+                } else {                                                \
+                        emit(op ## _I((r1), (r2), imm12), ctx);         \
+                }                                                       \
+        } while (0)
+
+static inline void emit_err_ret(u8 cond, struct jit_ctx *ctx)
+{
+        if (ctx->ret0_fp_idx >= 0) {
+                _emit(cond, ARM_B(b_imm(ctx->ret0_fp_idx, ctx)), ctx);
+                /* NOP to keep the size constant between passes */
+                emit(ARM_MOV_R(ARM_R0, ARM_R0), ctx);
+        } else {
+                _emit(cond, ARM_MOV_I(ARM_R0, 0), ctx);
+                _emit(cond, ARM_B(b_imm(ctx->skf->len, ctx)), ctx);
+        }
+}
+
+static inline void emit_blx_r(u8 tgt_reg, struct jit_ctx *ctx)
+{
+#if __LINUX_ARM_ARCH__ < 5
+        emit(ARM_MOV_R(ARM_LR, ARM_PC), ctx);
+
+        if (elf_hwcap & HWCAP_THUMB)
+                emit(ARM_BX(tgt_reg), ctx);
+        else
+                emit(ARM_MOV_R(ARM_PC, tgt_reg), ctx);
+#else
+        emit(ARM_BLX_R(tgt_reg), ctx);
+#endif
+}
+
+static inline void emit_udiv(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx)
+{
+#if __LINUX_ARM_ARCH__ == 7
+        if (elf_hwcap & HWCAP_IDIVA) {
+                emit(ARM_UDIV(rd, rm, rn), ctx);
+                return;
+        }
+#endif
+        if (rm != ARM_R0)
+                emit(ARM_MOV_R(ARM_R0, rm), ctx);
+        if (rn != ARM_R1)
+                emit(ARM_MOV_R(ARM_R1, rn), ctx);
+
+        ctx->seen |= SEEN_CALL;
+        emit_mov_i(ARM_R3, (u32)jit_udiv, ctx);
+        emit_blx_r(ARM_R3, ctx);
+
+        if (rd != ARM_R0)
+                emit(ARM_MOV_R(rd, ARM_R0), ctx);
+}
+
+static inline void update_on_xread(struct jit_ctx *ctx)
+{
+        if (!(ctx->seen & SEEN_X))
+                ctx->flags |= FLAG_NEED_X_RESET;
+
+        ctx->seen |= SEEN_X;
+}
+
+static int build_body(struct jit_ctx *ctx)
+{
+        void *load_func[] = {jit_get_skb_b, jit_get_skb_h, jit_get_skb_w};
+        const struct sk_filter *prog = ctx->skf;
+        const struct sock_filter *inst;
+        unsigned i, load_order, off, condt;
+        int imm12;
+        u32 k;
+
+        for (i = 0; i < prog->len; i++) {
+                inst = &(prog->insns[i]);
+                /* K as an immediate value operand */
+                k = inst->k;
+
+                /* compute offsets only in the fake pass */
+                if (ctx->target == NULL)
+                        ctx->offsets[i] = ctx->idx * 4;
+
+                switch (inst->code) {
+                case BPF_S_LD_IMM:
+                        emit_mov_i(r_A, k, ctx);
+                        break;
+                case BPF_S_LD_W_LEN:
+                        ctx->seen |= SEEN_SKB;
+                        BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, len) != 4);
+                        emit(ARM_LDR_I(r_A, r_skb,
+                                       offsetof(struct sk_buff, len)), ctx);
+                        break;
+                case BPF_S_LD_MEM:
+                        /* A = scratch[k] */
+                        ctx->seen |= SEEN_MEM_WORD(k);
+                        emit(ARM_LDR_I(r_A, ARM_SP, SCRATCH_OFF(k)), ctx);
+                        break;
+                case BPF_S_LD_W_ABS:
+                        load_order = 2;
+                        goto load;
+                case BPF_S_LD_H_ABS:
+                        load_order = 1;
+                        goto load;
+                case BPF_S_LD_B_ABS:
+                        load_order = 0;
+load:
+                        /* the interpreter will deal with the negative K */
+                        if ((int)k < 0)
+                                return -ENOTSUPP;
+                        emit_mov_i(r_off, k, ctx);
+load_common:
+                        ctx->seen |= SEEN_DATA | SEEN_CALL;
+
+                        if (load_order > 0) {
+                                emit(ARM_SUB_I(r_scratch, r_skb_hl,
+                                               1 << load_order), ctx);
+                                emit(ARM_CMP_R(r_scratch, r_off), ctx);
+                                condt = ARM_COND_HS;
+                        } else {
+                                emit(ARM_CMP_R(r_skb_hl, r_off), ctx);
+                                condt = ARM_COND_HI;
+                        }
+
+                        _emit(condt, ARM_ADD_R(r_scratch, r_off, r_skb_data),
+                              ctx);
+
+                        if (load_order == 0)
+                                _emit(condt, ARM_LDRB_I(r_A, r_scratch, 0),
+                                      ctx);
+                        else if (load_order == 1)
+                                emit_load_be16(condt, r_A, r_scratch, ctx);
+                        else if (load_order == 2)
+                                emit_load_be32(condt, r_A, r_scratch, ctx);
+
+                        _emit(condt, ARM_B(b_imm(i + 1, ctx)), ctx);
+
+                        /* the slowpath */
+                        emit_mov_i(ARM_R3, (u32)load_func[load_order], ctx);
+                        emit(ARM_MOV_R(ARM_R0, r_skb), ctx);
+                        /* the offset is already in R1 */
+                        emit_blx_r(ARM_R3, ctx);
+                        /* check the result of skb_copy_bits */
+                        emit(ARM_CMP_I(ARM_R1, 0), ctx);
+                        emit_err_ret(ARM_COND_NE, ctx);
+                        emit(ARM_MOV_R(r_A, ARM_R0), ctx);
+                        break;
+                case BPF_S_LD_W_IND:
+                        load_order = 2;
+                        goto load_ind;
+                case BPF_S_LD_H_IND:
+                        load_order = 1;
+                        goto load_ind;
+                case BPF_S_LD_B_IND:
+                        load_order = 0;
+load_ind:
+                        OP_IMM3(ARM_ADD, r_off, r_X, k, ctx);
+                        goto load_common;
+                case BPF_S_LDX_IMM:
+                        ctx->seen |= SEEN_X;
+                        emit_mov_i(r_X, k, ctx);
+                        break;
+                case BPF_S_LDX_W_LEN:
+                        ctx->seen |= SEEN_X | SEEN_SKB;
+                        emit(ARM_LDR_I(r_X, r_skb,
+                                       offsetof(struct sk_buff, len)), ctx);
+                        break;
+                case BPF_S_LDX_MEM:
+                        ctx->seen |= SEEN_X | SEEN_MEM_WORD(k);
+                        emit(ARM_LDR_I(r_X, ARM_SP, SCRATCH_OFF(k)), ctx);
+                        break;
+                case BPF_S_LDX_B_MSH:
+                        /* x = ((*(frame + k)) & 0xf) << 2; */
+                        ctx->seen |= SEEN_X | SEEN_DATA | SEEN_CALL;
+                        /* the interpreter should deal with the negative K */
+                        if (k < 0)
+                                return -1;
+                        /* offset in r1: we might have to take the slow path */
+                        emit_mov_i(r_off, k, ctx);
+                        emit(ARM_CMP_R(r_skb_hl, r_off), ctx);
+
+                        /* load in r0: common with the slowpath */
+                        _emit(ARM_COND_HI, ARM_LDRB_R(ARM_R0, r_skb_data,
+                                                      ARM_R1), ctx);
+                        /*
+                         * emit_mov_i() might generate one or two instructions,
+                         * the same holds for emit_blx_r()
+                         */
+                        _emit(ARM_COND_HI, ARM_B(b_imm(i + 1, ctx) - 2), ctx);
+
+                        emit(ARM_MOV_R(ARM_R0, r_skb), ctx);
+                        /* r_off is r1 */
+                        emit_mov_i(ARM_R3, (u32)jit_get_skb_b, ctx);
+                        emit_blx_r(ARM_R3, ctx);
+                        /* check the return value of skb_copy_bits */
+                        emit(ARM_CMP_I(ARM_R1, 0), ctx);
+                        emit_err_ret(ARM_COND_NE, ctx);
+
+                        emit(ARM_AND_I(r_X, ARM_R0, 0x00f), ctx);
+                        emit(ARM_LSL_I(r_X, r_X, 2), ctx);
+                        break;
+                case BPF_S_ST:
+                        ctx->seen |= SEEN_MEM_WORD(k);
+                        emit(ARM_STR_I(r_A, ARM_SP, SCRATCH_OFF(k)), ctx);
+                        break;
+                case BPF_S_STX:
+                        update_on_xread(ctx);
+                        ctx->seen |= SEEN_MEM_WORD(k);
+                        emit(ARM_STR_I(r_X, ARM_SP, SCRATCH_OFF(k)), ctx);
+                        break;
+                case BPF_S_ALU_ADD_K:
+                        /* A += K */
+                        OP_IMM3(ARM_ADD, r_A, r_A, k, ctx);
+                        break;
+                case BPF_S_ALU_ADD_X:
+                        update_on_xread(ctx);
+                        emit(ARM_ADD_R(r_A, r_A, r_X), ctx);
+                        break;
+                case BPF_S_ALU_SUB_K:
+                        /* A -= K */
+                        OP_IMM3(ARM_SUB, r_A, r_A, k, ctx);
+                        break;
+                case BPF_S_ALU_SUB_X:
+                        update_on_xread(ctx);
+                        emit(ARM_SUB_R(r_A, r_A, r_X), ctx);
+                        break;
+                case BPF_S_ALU_MUL_K:
+                        /* A *= K */
+                        emit_mov_i(r_scratch, k, ctx);
+                        emit(ARM_MUL(r_A, r_A, r_scratch), ctx);
+                        break;
+                case BPF_S_ALU_MUL_X:
+                        update_on_xread(ctx);
+                        emit(ARM_MUL(r_A, r_A, r_X), ctx);
+                        break;
+                case BPF_S_ALU_DIV_K:
+                        /* current k == reciprocal_value(userspace k) */
+                        emit_mov_i(r_scratch, k, ctx);
+                        /* A = top 32 bits of the product */
+                        emit(ARM_UMULL(r_scratch, r_A, r_A, r_scratch), ctx);
+                        break;
+                case BPF_S_ALU_DIV_X:
+                        update_on_xread(ctx);
+                        emit(ARM_CMP_I(r_X, 0), ctx);
+                        emit_err_ret(ARM_COND_EQ, ctx);
+                        emit_udiv(r_A, r_A, r_X, ctx);
+                        break;
+                case BPF_S_ALU_OR_K:
+                        /* A |= K */
+                        OP_IMM3(ARM_ORR, r_A, r_A, k, ctx);
+                        break;
+                case BPF_S_ALU_OR_X:
+                        update_on_xread(ctx);
+                        emit(ARM_ORR_R(r_A, r_A, r_X), ctx);
+                        break;
+                case BPF_S_ALU_AND_K:
+                        /* A &= K */
+                        OP_IMM3(ARM_AND, r_A, r_A, k, ctx);
+                        break;
+                case BPF_S_ALU_AND_X:
+                        update_on_xread(ctx);
+                        emit(ARM_AND_R(r_A, r_A, r_X), ctx);
+                        break;
+                case BPF_S_ALU_LSH_K:
+                        if (unlikely(k > 31))
+                                return -1;
+                        emit(ARM_LSL_I(r_A, r_A, k), ctx);
+                        break;
+                case BPF_S_ALU_LSH_X:
+                        update_on_xread(ctx);
+                        emit(ARM_LSL_R(r_A, r_A, r_X), ctx);
+                        break;
+                case BPF_S_ALU_RSH_K:
+                        if (unlikely(k > 31))
+                                return -1;
+                        emit(ARM_LSR_I(r_A, r_A, k), ctx);
+                        break;
+                case BPF_S_ALU_RSH_X:
+                        update_on_xread(ctx);
+                        emit(ARM_LSR_R(r_A, r_A, r_X), ctx);
+                        break;
+                case BPF_S_ALU_NEG:
+                        /* A = -A */
+                        emit(ARM_RSB_I(r_A, r_A, 0), ctx);
+                        break;
+                case BPF_S_JMP_JA:
+                        /* pc += K */
+                        emit(ARM_B(b_imm(i + k + 1, ctx)), ctx);
+                        break;
+                case BPF_S_JMP_JEQ_K:
+                        /* pc += (A == K) ? pc->jt : pc->jf */
+                        condt  = ARM_COND_EQ;
+                        goto cmp_imm;
+                case BPF_S_JMP_JGT_K:
+                        /* pc += (A > K) ? pc->jt : pc->jf */
+                        condt  = ARM_COND_HI;
+                        goto cmp_imm;
+                case BPF_S_JMP_JGE_K:
+                        /* pc += (A >= K) ? pc->jt : pc->jf */
+                        condt  = ARM_COND_HS;
+cmp_imm:
+                        imm12 = imm8m(k);
+                        if (imm12 < 0) {
+                                emit_mov_i_no8m(r_scratch, k, ctx);
+                                emit(ARM_CMP_R(r_A, r_scratch), ctx);
+                        } else {
+                                emit(ARM_CMP_I(r_A, imm12), ctx);
+                        }
+cond_jump:
+                        if (inst->jt)
+                                _emit(condt, ARM_B(b_imm(i + inst->jt + 1,
+                                                   ctx)), ctx);
+                        if (inst->jf)
+                                _emit(condt ^ 1, ARM_B(b_imm(i + inst->jf + 1,
+                                                             ctx)), ctx);
+                        break;
+                case BPF_S_JMP_JEQ_X:
+                        /* pc += (A == X) ? pc->jt : pc->jf */
+                        condt   = ARM_COND_EQ;
+                        goto cmp_x;
+                case BPF_S_JMP_JGT_X:
+                        /* pc += (A > X) ? pc->jt : pc->jf */
+                        condt   = ARM_COND_HI;
+                        goto cmp_x;
+                case BPF_S_JMP_JGE_X:
+                        /* pc += (A >= X) ? pc->jt : pc->jf */
+                        condt   = ARM_COND_CS;
+cmp_x:
+                        update_on_xread(ctx);
+                        emit(ARM_CMP_R(r_A, r_X), ctx);
+                        goto cond_jump;
+                case BPF_S_JMP_JSET_K:
+                        /* pc += (A & K) ? pc->jt : pc->jf */
+                        condt  = ARM_COND_NE;
+                        /* not set iff all zeroes iff Z==1 iff EQ */
+
+                        imm12 = imm8m(k);
+                        if (imm12 < 0) {
+                                emit_mov_i_no8m(r_scratch, k, ctx);
+                                emit(ARM_TST_R(r_A, r_scratch), ctx);
+                        } else {
+                                emit(ARM_TST_I(r_A, imm12), ctx);
+                        }
+                        goto cond_jump;
+                case BPF_S_JMP_JSET_X:
+                        /* pc += (A & X) ? pc->jt : pc->jf */
+                        update_on_xread(ctx);
+                        condt  = ARM_COND_NE;
+                        emit(ARM_TST_R(r_A, r_X), ctx);
+                        goto cond_jump;
+                case BPF_S_RET_A:
+                        emit(ARM_MOV_R(ARM_R0, r_A), ctx);
+                        goto b_epilogue;
+                case BPF_S_RET_K:
+                        if ((k == 0) && (ctx->ret0_fp_idx < 0))
+                                ctx->ret0_fp_idx = i;
+                        emit_mov_i(ARM_R0, k, ctx);
+b_epilogue:
+                        if (i != ctx->skf->len - 1)
+                                emit(ARM_B(b_imm(prog->len, ctx)), ctx);
+                        break;
+                case BPF_S_MISC_TAX:
+                        /* X = A */
+                        ctx->seen |= SEEN_X;
+                        emit(ARM_MOV_R(r_X, r_A), ctx);
+                        break;
+                case BPF_S_MISC_TXA:
+                        /* A = X */
+                        update_on_xread(ctx);
+                        emit(ARM_MOV_R(r_A, r_X), ctx);
+                        break;
+                case BPF_S_ANC_PROTOCOL:
+                        /* A = ntohs(skb->protocol) */
+                        ctx->seen |= SEEN_SKB;
+                        BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
+                                                  protocol) != 2);
+                        off = offsetof(struct sk_buff, protocol);
+                        emit(ARM_LDRH_I(r_scratch, r_skb, off), ctx);
+                        emit_swap16(r_A, r_scratch, ctx);
+                        break;
+                case BPF_S_ANC_CPU:
+                        /* r_scratch = current_thread_info() */
+                        OP_IMM3(ARM_BIC, r_scratch, ARM_SP, THREAD_SIZE - 1, ctx);
+                        /* A = current_thread_info()->cpu */
+                        BUILD_BUG_ON(FIELD_SIZEOF(struct thread_info, cpu) != 4);
+                        off = offsetof(struct thread_info, cpu);
+                        emit(ARM_LDR_I(r_A, r_scratch, off), ctx);
+                        break;
+                case BPF_S_ANC_IFINDEX:
+                        /* A = skb->dev->ifindex */
+                        ctx->seen |= SEEN_SKB;
+                        off = offsetof(struct sk_buff, dev);
+                        emit(ARM_LDR_I(r_scratch, r_skb, off), ctx);
+
+                        emit(ARM_CMP_I(r_scratch, 0), ctx);
+                        emit_err_ret(ARM_COND_EQ, ctx);
+
+                        BUILD_BUG_ON(FIELD_SIZEOF(struct net_device,
+                                                  ifindex) != 4);
+                        off = offsetof(struct net_device, ifindex);
+                        emit(ARM_LDR_I(r_A, r_scratch, off), ctx);
+                        break;
+                case BPF_S_ANC_MARK:
+                        ctx->seen |= SEEN_SKB;
+                        BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, mark) != 4);
+                        off = offsetof(struct sk_buff, mark);
+                        emit(ARM_LDR_I(r_A, r_skb, off), ctx);
+                        break;
+                case BPF_S_ANC_RXHASH:
+                        ctx->seen |= SEEN_SKB;
+                        BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, rxhash) != 4);
+                        off = offsetof(struct sk_buff, rxhash);
+                        emit(ARM_LDR_I(r_A, r_skb, off), ctx);
+                        break;
+                case BPF_S_ANC_QUEUE:
+                        ctx->seen |= SEEN_SKB;
+                        BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
+                                                  queue_mapping) != 2);
+                        BUILD_BUG_ON(offsetof(struct sk_buff,
+                                              queue_mapping) > 0xff);
+                        off = offsetof(struct sk_buff, queue_mapping);
+                        emit(ARM_LDRH_I(r_A, r_skb, off), ctx);
+                        break;
+                default:
+                        return -1;
+                }
+        }
+
+        /* compute offsets only during the first pass */
+        if (ctx->target == NULL)
+                ctx->offsets[i] = ctx->idx * 4;
+
+        return 0;
+}
+
+
+void bpf_jit_compile(struct sk_filter *fp)
+{
+        struct jit_ctx ctx;
+        unsigned tmp_idx;
+        unsigned alloc_size;
+
+        if (!bpf_jit_enable)
+                return;
+
+        memset(&ctx, 0, sizeof(ctx));
+        ctx.skf         = fp;
+        ctx.ret0_fp_idx = -1;
+
+        ctx.offsets = kzalloc(GFP_KERNEL, 4 * (ctx.skf->len + 1));
+        if (ctx.offsets == NULL)
+                return;
+
+        /* fake pass to fill in the ctx->seen */
+        if (unlikely(build_body(&ctx)))
+                goto out;
+
+        tmp_idx = ctx.idx;
+        build_prologue(&ctx);
+        ctx.prologue_bytes = (ctx.idx - tmp_idx) * 4;
+
+#if __LINUX_ARM_ARCH__ < 7
+        tmp_idx = ctx.idx;
+        build_epilogue(&ctx);
+        ctx.epilogue_bytes = (ctx.idx - tmp_idx) * 4;
+
+        ctx.idx += ctx.imm_count;
+        if (ctx.imm_count) {
+                ctx.imms = kzalloc(GFP_KERNEL, 4 * ctx.imm_count);
+                if (ctx.imms == NULL)
+                        goto out;
+        }
+#else
+        /* there's nothing after the epilogue on ARMv7 */
+        build_epilogue(&ctx);
+#endif
+
+        alloc_size = 4 * ctx.idx;
+        ctx.target = module_alloc(max(sizeof(struct work_struct),
+                                      alloc_size));
+        if (unlikely(ctx.target == NULL))
+                goto out;
+
+        ctx.idx = 0;
+        build_prologue(&ctx);
+        build_body(&ctx);
+        build_epilogue(&ctx);
+
+        flush_icache_range((u32)ctx.target, (u32)(ctx.target + ctx.idx));
+
+#if __LINUX_ARM_ARCH__ < 7
+        if (ctx.imm_count)
+                kfree(ctx.imms);
+#endif
+
+        if (bpf_jit_enable > 1)
+                print_hex_dump(KERN_INFO, "BPF JIT code: ",
+                               DUMP_PREFIX_ADDRESS, 16, 4, ctx.target,
+                               alloc_size, false);
+
+        fp->bpf_func = (void *)ctx.target;
+out:
+        kfree(ctx.offsets);
+        return;
+}
+
+static void bpf_jit_free_worker(struct work_struct *work)
+{
+        module_free(NULL, work);
+}
+
+void bpf_jit_free(struct sk_filter *fp)
+{
+        struct work_struct *work;
+
+        if (fp->bpf_func != sk_run_filter) {
+                work = (struct work_struct *)fp->bpf_func;
+
+                INIT_WORK(work, bpf_jit_free_worker);
+                schedule_work(work);
+        }
+}
diff --git a/arch/arm/net/bpf_jit_32.h b/arch/arm/net/bpf_jit_32.h
new file mode 100644
index 000000000000..99ae5e3f46d2
--- /dev/null
+++ b/arch/arm/net/bpf_jit_32.h
@@ -0,0 +1,190 @@
+/*
+ * Just-In-Time compiler for BPF filters on 32bit ARM
+ *
+ * Copyright (c) 2011 Mircea Gherzan <mgherzan@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; version 2 of the License.
+ */
+
+#ifndef PFILTER_OPCODES_ARM_H
+#define PFILTER_OPCODES_ARM_H
+
+#define ARM_R0  0
+#define ARM_R1  1
+#define ARM_R2  2
+#define ARM_R3  3
+#define ARM_R4  4
+#define ARM_R5  5
+#define ARM_R6  6
+#define ARM_R7  7
+#define ARM_R8  8
+#define ARM_R9  9
+#define ARM_R10 10
+#define ARM_FP  11
+#define ARM_IP  12
+#define ARM_SP  13
+#define ARM_LR  14
+#define ARM_PC  15
+
+#define ARM_COND_EQ             0x0
+#define ARM_COND_NE             0x1
+#define ARM_COND_CS             0x2
+#define ARM_COND_HS             ARM_COND_CS
+#define ARM_COND_CC             0x3
+#define ARM_COND_LO             ARM_COND_CC
+#define ARM_COND_MI             0x4
+#define ARM_COND_PL             0x5
+#define ARM_COND_VS             0x6
+#define ARM_COND_VC             0x7
+#define ARM_COND_HI             0x8
+#define ARM_COND_LS             0x9
+#define ARM_COND_GE             0xa
+#define ARM_COND_LT             0xb
+#define ARM_COND_GT             0xc
+#define ARM_COND_LE             0xd
+#define ARM_COND_AL             0xe
+
+/* register shift types */
+#define SRTYPE_LSL              0
+#define SRTYPE_LSR              1
+#define SRTYPE_ASR              2
+#define SRTYPE_ROR              3
+
+#define ARM_INST_ADD_R          0x00800000
+#define ARM_INST_ADD_I          0x02800000
+
+#define ARM_INST_AND_R          0x00000000
+#define ARM_INST_AND_I          0x02000000
+
+#define ARM_INST_BIC_R          0x01c00000
+#define ARM_INST_BIC_I          0x03c00000
+
+#define ARM_INST_B              0x0a000000
+#define ARM_INST_BX             0x012FFF10
+#define ARM_INST_BLX_R          0x012fff30
+
+#define ARM_INST_CMP_R          0x01500000
+#define ARM_INST_CMP_I          0x03500000
+
+#define ARM_INST_LDRB_I         0x05d00000
+#define ARM_INST_LDRB_R         0x07d00000
+#define ARM_INST_LDRH_I         0x01d000b0
+#define ARM_INST_LDR_I          0x05900000
+
+#define ARM_INST_LDM            0x08900000
+
+#define ARM_INST_LSL_I          0x01a00000
+#define ARM_INST_LSL_R          0x01a00010
+
+#define ARM_INST_LSR_I          0x01a00020
+#define ARM_INST_LSR_R          0x01a00030
+
+#define ARM_INST_MOV_R          0x01a00000
+#define ARM_INST_MOV_I          0x03a00000
+#define ARM_INST_MOVW           0x03000000
+#define ARM_INST_MOVT           0x03400000
+
+#define ARM_INST_MUL            0x00000090
+
+#define ARM_INST_POP            0x08bd0000
+#define ARM_INST_PUSH           0x092d0000
+
+#define ARM_INST_ORR_R          0x01800000
+#define ARM_INST_ORR_I          0x03800000
+
+#define ARM_INST_REV            0x06bf0f30
+#define ARM_INST_REV16          0x06bf0fb0
+
+#define ARM_INST_RSB_I          0x02600000
+
+#define ARM_INST_SUB_R          0x00400000
+#define ARM_INST_SUB_I          0x02400000
+
+#define ARM_INST_STR_I          0x05800000
+
+#define ARM_INST_TST_R          0x01100000
+#define ARM_INST_TST_I          0x03100000
+
+#define ARM_INST_UDIV           0x0730f010
+
+#define ARM_INST_UMULL          0x00800090
+
+/* register */
+#define _AL3_R(op, rd, rn, rm)  ((op ## _R) | (rd) << 12 | (rn) << 16 | (rm))
+/* immediate */
+#define _AL3_I(op, rd, rn, imm) ((op ## _I) | (rd) << 12 | (rn) << 16 | (imm))
+
+#define ARM_ADD_R(rd, rn, rm)   _AL3_R(ARM_INST_ADD, rd, rn, rm)
+#define ARM_ADD_I(rd, rn, imm)  _AL3_I(ARM_INST_ADD, rd, rn, imm)
+
+#define ARM_AND_R(rd, rn, rm)   _AL3_R(ARM_INST_AND, rd, rn, rm)
+#define ARM_AND_I(rd, rn, imm)  _AL3_I(ARM_INST_AND, rd, rn, imm)
+
+#define ARM_BIC_R(rd, rn, rm)   _AL3_R(ARM_INST_BIC, rd, rn, rm)
+#define ARM_BIC_I(rd, rn, imm)  _AL3_I(ARM_INST_BIC, rd, rn, imm)
+
+#define ARM_B(imm24)            (ARM_INST_B | ((imm24) & 0xffffff))
+#define ARM_BX(rm)              (ARM_INST_BX | (rm))
+#define ARM_BLX_R(rm)           (ARM_INST_BLX_R | (rm))
+
+#define ARM_CMP_R(rn, rm)       _AL3_R(ARM_INST_CMP, 0, rn, rm)
+#define ARM_CMP_I(rn, imm)      _AL3_I(ARM_INST_CMP, 0, rn, imm)
+
+#define ARM_LDR_I(rt, rn, off)  (ARM_INST_LDR_I | (rt) << 12 | (rn) << 16 \
+                                 | (off))
+#define ARM_LDRB_I(rt, rn, off) (ARM_INST_LDRB_I | (rt) << 12 | (rn) << 16 \
+                                 | (off))
+#define ARM_LDRB_R(rt, rn, rm)  (ARM_INST_LDRB_R | (rt) << 12 | (rn) << 16 \
+                                 | (rm))
+#define ARM_LDRH_I(rt, rn, off) (ARM_INST_LDRH_I | (rt) << 12 | (rn) << 16 \
+                                 | (((off) & 0xf0) << 4) | ((off) & 0xf))
+
+#define ARM_LDM(rn, regs)       (ARM_INST_LDM | (rn) << 16 | (regs))
+
+#define ARM_LSL_R(rd, rn, rm)   (_AL3_R(ARM_INST_LSL, rd, 0, rn) | (rm) << 8)
+#define ARM_LSL_I(rd, rn, imm)  (_AL3_I(ARM_INST_LSL, rd, 0, rn) | (imm) << 7)
+
+#define ARM_LSR_R(rd, rn, rm)   (_AL3_R(ARM_INST_LSR, rd, 0, rn) | (rm) << 8)
+#define ARM_LSR_I(rd, rn, imm)  (_AL3_I(ARM_INST_LSR, rd, 0, rn) | (imm) << 7)
+
+#define ARM_MOV_R(rd, rm)       _AL3_R(ARM_INST_MOV, rd, 0, rm)
+#define ARM_MOV_I(rd, imm)      _AL3_I(ARM_INST_MOV, rd, 0, imm)
+
+#define ARM_MOVW(rd, imm)       \
+        (ARM_INST_MOVW | ((imm) >> 12) << 16 | (rd) << 12 | ((imm) & 0x0fff))
+
+#define ARM_MOVT(rd, imm)       \
+        (ARM_INST_MOVT | ((imm) >> 12) << 16 | (rd) << 12 | ((imm) & 0x0fff))
+
+#define ARM_MUL(rd, rm, rn)     (ARM_INST_MUL | (rd) << 16 | (rm) << 8 | (rn))
+
+#define ARM_POP(regs)           (ARM_INST_POP | (regs))
+#define ARM_PUSH(regs)          (ARM_INST_PUSH | (regs))
+
+#define ARM_ORR_R(rd, rn, rm)   _AL3_R(ARM_INST_ORR, rd, rn, rm)
+#define ARM_ORR_I(rd, rn, imm)  _AL3_I(ARM_INST_ORR, rd, rn, imm)
+#define ARM_ORR_S(rd, rn, rm, type, rs) \
+        (ARM_ORR_R(rd, rn, rm) | (type) << 5 | (rs) << 7)
+
+#define ARM_REV(rd, rm)         (ARM_INST_REV | (rd) << 12 | (rm))
+#define ARM_REV16(rd, rm)       (ARM_INST_REV16 | (rd) << 12 | (rm))
+
+#define ARM_RSB_I(rd, rn, imm)  _AL3_I(ARM_INST_RSB, rd, rn, imm)
+
+#define ARM_SUB_R(rd, rn, rm)   _AL3_R(ARM_INST_SUB, rd, rn, rm)
+#define ARM_SUB_I(rd, rn, imm)  _AL3_I(ARM_INST_SUB, rd, rn, imm)
+
+#define ARM_STR_I(rt, rn, off)  (ARM_INST_STR_I | (rt) << 12 | (rn) << 16 \
+                                 | (off))
+
+#define ARM_TST_R(rn, rm)       _AL3_R(ARM_INST_TST, 0, rn, rm)
+#define ARM_TST_I(rn, imm)      _AL3_I(ARM_INST_TST, 0, rn, imm)
+
+#define ARM_UDIV(rd, rn, rm)    (ARM_INST_UDIV | (rd) << 16 | (rn) | (rm) << 8)
+
+#define ARM_UMULL(rd_lo, rd_hi, rn, rm) (ARM_INST_UMULL | (rd_hi) << 16 \
+                                         | (rd_lo) << 12 | (rm) << 8 | rn)
+
+#endif /* PFILTER_OPCODES_ARM_H */
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index a599f01f8b92..0630513554de 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -22,11 +22,8 @@
 
 #include <asm/sizes.h>
 
-#ifdef __ASSEMBLER__
-#define IOMEM(addr)     (addr)
-#else
-#define IOMEM(addr)     ((void __force __iomem *)(addr))
-#endif
+#define addr_in_module(addr, mod) \
+        ((unsigned long)(addr) - mod ## _BASE_ADDR < mod ## _SIZE)
 
 #define IMX_IO_P2V_MODULE(addr, module)                                 \
         (((addr) - module ## _BASE_ADDR) < module ## _SIZE ?            \
diff --git a/arch/arm/plat-mxc/include/mach/io.h b/arch/arm/plat-mxc/include/mach/io.h
deleted file mode 100644
index 338300b18b00..000000000000
--- a/arch/arm/plat-mxc/include/mach/io.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- *  Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- */
-
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_MXC_IO_H__
-#define __ASM_ARCH_MXC_IO_H__
-
-/* Allow IO space to be anywhere in the memory */
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __arch_ioremap __imx_ioremap
-#define __arch_iounmap __iounmap
-
-#define addr_in_module(addr, mod) \
-        ((unsigned long)(addr) - mod ## _BASE_ADDR < mod ## _SIZE)
-
-extern void __iomem *(*imx_ioremap)(unsigned long, size_t, unsigned int);
-
-static inline void __iomem *
-__imx_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
-{
-        if (imx_ioremap != NULL)
-                return imx_ioremap(phys_addr, size, mtype);
-        else
-                return __arm_ioremap(phys_addr, size, mtype);
-}
-
-/* io address mapping macro */
-#define __io(a)         __typesafe_io(a)
-
-#define __mem_pci(a)    (a)
-
-#endif
diff --git a/arch/arm/plat-nomadik/Kconfig b/arch/arm/plat-nomadik/Kconfig
index bca4914b4b9d..4c48c8b60b54 100644
--- a/arch/arm/plat-nomadik/Kconfig
+++ b/arch/arm/plat-nomadik/Kconfig
@@ -23,7 +23,6 @@ config HAS_MTU
 config NOMADIK_MTU_SCHED_CLOCK
         bool
         depends on HAS_MTU
-        select HAVE_SCHED_CLOCK
         help
           Use the Multi Timer Unit as the sched_clock.
 
diff --git a/arch/arm/plat-nomadik/include/plat/ste_dma40.h b/arch/arm/plat-nomadik/include/plat/ste_dma40.h
index fd0ee84c45d1..9ff93b065686 100644
--- a/arch/arm/plat-nomadik/include/plat/ste_dma40.h
+++ b/arch/arm/plat-nomadik/include/plat/ste_dma40.h
@@ -200,8 +200,7 @@ dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
         sg.dma_address = addr;
         sg.length = size;
 
-        return chan->device->device_prep_slave_sg(chan, &sg, 1,
-                                                  direction, flags);
+        return dmaengine_prep_slave_sg(chan, &sg, 1, direction, flags);
 }
 
 #else
diff --git a/arch/arm/plat-omap/include/plat/hardware.h b/arch/arm/plat-omap/include/plat/hardware.h
index 537b05ae1f51..e897978371c2 100644
--- a/arch/arm/plat-omap/include/plat/hardware.h
+++ b/arch/arm/plat-omap/include/plat/hardware.h
@@ -43,12 +43,6 @@
 #endif
 #include <plat/serial.h>
 
-#ifdef __ASSEMBLER__
-#define IOMEM(x)                (x)
-#else
-#define IOMEM(x)                ((void __force __iomem *)(x))
-#endif
-
 /*
  * ---------------------------------------------------------------------------
  * Common definitions for all OMAP processors
diff --git a/arch/arm/plat-omap/include/plat/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h
index 925b12b500dc..9bb978ecd884 100644
--- a/arch/arm/plat-omap/include/plat/sdrc.h
+++ b/arch/arm/plat-omap/include/plat/sdrc.h
@@ -16,7 +16,6 @@
  * published by the Free Software Foundation.
  */
 
-#include <mach/io.h>
 
 /* SDRC register offsets - read/write with sdrc_{read,write}_reg() */
 
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index d0fc9f4dc155..762eeb0626c1 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -112,7 +112,6 @@ extern int omap4430_phy_suspend(struct device *dev, int suspend);
  */
 
 #define OMAP2_L4_IO_OFFSET      0xb2000000
-#define IOMEM(x)                ((void __force __iomem *)(x))
 #define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET)
 
 static inline u8 omap_readb(u32 pa)
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c
index 301d9c319d0b..eb9f4f534006 100644
--- a/arch/arm/plat-samsung/dma-ops.c
+++ b/arch/arm/plat-samsung/dma-ops.c
@@ -79,11 +79,11 @@ static int samsung_dmadev_prepare(unsigned ch,
                             info->len, offset_in_page(info->buf));
                 sg_dma_address(&sg) = info->buf;
 
-                desc = chan->device->device_prep_slave_sg(chan,
+                desc = dmaengine_prep_slave_sg(chan,
                         &sg, 1, info->direction, DMA_PREP_INTERRUPT);
                 break;
         case DMA_CYCLIC:
-                desc = chan->device->device_prep_dma_cyclic(chan,
+                desc = dmaengine_prep_dma_cyclic(chan,
                         info->buf, info->len, info->period, info->direction);
                 break;
         default:
diff --git a/arch/arm/plat-spear/include/plat/hardware.h b/arch/arm/plat-spear/include/plat/hardware.h
index 66d677225d15..70187d763e26 100644
--- a/arch/arm/plat-spear/include/plat/hardware.h
+++ b/arch/arm/plat-spear/include/plat/hardware.h
@@ -14,10 +14,4 @@
 #ifndef __PLAT_HARDWARE_H
 #define __PLAT_HARDWARE_H
 
-#ifndef __ASSEMBLY__
-#define IOMEM(x)        ((void __iomem __force *)(x))
-#else
-#define IOMEM(x)        (x)
-#endif
-
 #endif /* __PLAT_HARDWARE_H */
diff --git a/arch/arm/plat-spear/include/plat/io.h b/arch/arm/plat-spear/include/plat/io.h
deleted file mode 100644
index 4d4ba822b3eb..000000000000
--- a/arch/arm/plat-spear/include/plat/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * arch/arm/plat-spear/include/plat/io.h
- *
- * IO definitions for SPEAr platform
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<viresh.kumar@st.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __PLAT_IO_H
-#define __PLAT_IO_H
-
-#define IO_SPACE_LIMIT          0xFFFFFFFF
-
-#define __io(a)                 __typesafe_io(a)
-#define __mem_pci(a)            (a)
-
-#endif /* __PLAT_IO_H */
diff --git a/arch/arm/plat-spear/include/plat/keyboard.h b/arch/arm/plat-spear/include/plat/keyboard.h
index c16cc31ecbed..0562f134621d 100644
--- a/arch/arm/plat-spear/include/plat/keyboard.h
+++ b/arch/arm/plat-spear/include/plat/keyboard.h
@@ -159,11 +159,4 @@ struct kbd_platform_data {
         unsigned int mode;
 };
 
-/* This function is used to set platform data field of pdev->dev */
-static inline void
-kbd_set_plat_data(struct platform_device *pdev, struct kbd_platform_data *data)
-{
-        pdev->dev.platform_data = data;
-}
-
 #endif /* __PLAT_KEYBOARD_H */
diff --git a/arch/arm/plat-versatile/Kconfig b/arch/arm/plat-versatile/Kconfig
index 52353beb369d..043f7b02a9e7 100644
--- a/arch/arm/plat-versatile/Kconfig
+++ b/arch/arm/plat-versatile/Kconfig
@@ -11,7 +11,6 @@ config PLAT_VERSATILE_LEDS
         depends on ARCH_REALVIEW || ARCH_VERSATILE
 
 config PLAT_VERSATILE_SCHED_CLOCK
-        def_bool y if !ARCH_INTEGRATOR_AP
-        select HAVE_SCHED_CLOCK
+        def_bool y
 
 endif