diff options
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mm/cache-v7.S | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index 793d061b4dce..a134d8a13d00 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S | |||
| @@ -97,10 +97,9 @@ ALT_UP( mov r3, r0, lsr #26) @ move LoUU into position | |||
| 97 | #ifdef CONFIG_ARM_ERRATA_643719 | 97 | #ifdef CONFIG_ARM_ERRATA_643719 |
| 98 | ALT_SMP(mrc p15, 0, r2, c0, c0, 0) @ read main ID register | 98 | ALT_SMP(mrc p15, 0, r2, c0, c0, 0) @ read main ID register |
| 99 | ALT_UP( ret lr) @ LoUU is zero, so nothing to do | 99 | ALT_UP( ret lr) @ LoUU is zero, so nothing to do |
| 100 | movw r1, #:lower16:0x410fc090 @ ID of ARM Cortex A9 r0p? | 100 | movw r1, #:lower16:(0x410fc090 >> 4) @ ID of ARM Cortex A9 r0p? |
| 101 | movt r1, #:upper16:0x410fc090 | 101 | movt r1, #:upper16:(0x410fc090 >> 4) |
| 102 | bic r2, r2, #0x0000000f @ clear minor revision number | 102 | teq r1, r2, lsr #4 @ test for errata affected core and if so... |
| 103 | teq r2, r1 @ test for errata affected core and if so... | ||
| 104 | moveq r3, #1 << 1 @ fix LoUIS value | 103 | moveq r3, #1 << 1 @ fix LoUIS value |
| 105 | beq start_flush_levels @ start flushing cache levels | 104 | beq start_flush_levels @ start flushing cache levels |
| 106 | #endif | 105 | #endif |