diff options
Diffstat (limited to 'arch/arm')
549 files changed, 3166 insertions, 7697 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a48aecc17eac..1655c0734d72 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -186,6 +186,9 @@ config GENERIC_ISA_DMA | |||
186 | config FIQ | 186 | config FIQ |
187 | bool | 187 | bool |
188 | 188 | ||
189 | config NEED_RET_TO_USER | ||
190 | bool | ||
191 | |||
189 | config ARCH_MTD_XIP | 192 | config ARCH_MTD_XIP |
190 | bool | 193 | bool |
191 | 194 | ||
@@ -324,7 +327,7 @@ config ARCH_AT91 | |||
324 | select CLKDEV_LOOKUP | 327 | select CLKDEV_LOOKUP |
325 | help | 328 | help |
326 | This enables support for systems based on the Atmel AT91RM9200, | 329 | This enables support for systems based on the Atmel AT91RM9200, |
327 | AT91SAM9 and AT91CAP9 processors. | 330 | AT91SAM9 processors. |
328 | 331 | ||
329 | config ARCH_BCMRING | 332 | config ARCH_BCMRING |
330 | bool "Broadcom BCMRING" | 333 | bool "Broadcom BCMRING" |
@@ -479,6 +482,7 @@ config ARCH_IOP13XX | |||
479 | select ARCH_SUPPORTS_MSI | 482 | select ARCH_SUPPORTS_MSI |
480 | select VMSPLIT_1G | 483 | select VMSPLIT_1G |
481 | select NEED_MACH_MEMORY_H | 484 | select NEED_MACH_MEMORY_H |
485 | select NEED_RET_TO_USER | ||
482 | help | 486 | help |
483 | Support for Intel's IOP13XX (XScale) family of processors. | 487 | Support for Intel's IOP13XX (XScale) family of processors. |
484 | 488 | ||
@@ -486,6 +490,7 @@ config ARCH_IOP32X | |||
486 | bool "IOP32x-based" | 490 | bool "IOP32x-based" |
487 | depends on MMU | 491 | depends on MMU |
488 | select CPU_XSCALE | 492 | select CPU_XSCALE |
493 | select NEED_RET_TO_USER | ||
489 | select PLAT_IOP | 494 | select PLAT_IOP |
490 | select PCI | 495 | select PCI |
491 | select ARCH_REQUIRE_GPIOLIB | 496 | select ARCH_REQUIRE_GPIOLIB |
@@ -497,6 +502,7 @@ config ARCH_IOP33X | |||
497 | bool "IOP33x-based" | 502 | bool "IOP33x-based" |
498 | depends on MMU | 503 | depends on MMU |
499 | select CPU_XSCALE | 504 | select CPU_XSCALE |
505 | select NEED_RET_TO_USER | ||
500 | select PLAT_IOP | 506 | select PLAT_IOP |
501 | select PCI | 507 | select PCI |
502 | select ARCH_REQUIRE_GPIOLIB | 508 | select ARCH_REQUIRE_GPIOLIB |
@@ -763,22 +769,21 @@ config ARCH_SA1100 | |||
763 | help | 769 | help |
764 | Support for StrongARM 11x0 based boards. | 770 | Support for StrongARM 11x0 based boards. |
765 | 771 | ||
766 | config ARCH_S3C2410 | 772 | config ARCH_S3C24XX |
767 | bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450" | 773 | bool "Samsung S3C24XX SoCs" |
768 | select GENERIC_GPIO | 774 | select GENERIC_GPIO |
769 | select ARCH_HAS_CPUFREQ | 775 | select ARCH_HAS_CPUFREQ |
770 | select HAVE_CLK | 776 | select HAVE_CLK |
771 | select CLKDEV_LOOKUP | 777 | select CLKDEV_LOOKUP |
772 | select ARCH_USES_GETTIMEOFFSET | 778 | select ARCH_USES_GETTIMEOFFSET |
773 | select HAVE_S3C2410_I2C if I2C | 779 | select HAVE_S3C2410_I2C if I2C |
780 | select HAVE_S3C_RTC if RTC_CLASS | ||
781 | select HAVE_S3C2410_WATCHDOG if WATCHDOG | ||
774 | help | 782 | help |
775 | Samsung S3C2410X CPU based systems, such as the Simtec Electronics | 783 | Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443 |
776 | BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or | 784 | and S3C2450 SoCs based systems, such as the Simtec Electronics BAST |
777 | the Samsung SMDK2410 development board (and derivatives). | 785 | (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the |
778 | 786 | Samsung SMDK2410 development board (and derivatives). | |
779 | Note, the S3C2416 and the S3C2450 are so close that they even share | ||
780 | the same SoC ID code. This means that there is no separate machine | ||
781 | directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. | ||
782 | 787 | ||
783 | config ARCH_S3C64XX | 788 | config ARCH_S3C64XX |
784 | bool "Samsung S3C64XX" | 789 | bool "Samsung S3C64XX" |
@@ -1066,12 +1071,10 @@ source "arch/arm/plat-s5p/Kconfig" | |||
1066 | 1071 | ||
1067 | source "arch/arm/plat-spear/Kconfig" | 1072 | source "arch/arm/plat-spear/Kconfig" |
1068 | 1073 | ||
1069 | if ARCH_S3C2410 | 1074 | source "arch/arm/mach-s3c24xx/Kconfig" |
1070 | source "arch/arm/mach-s3c2410/Kconfig" | 1075 | if ARCH_S3C24XX |
1071 | source "arch/arm/mach-s3c2412/Kconfig" | 1076 | source "arch/arm/mach-s3c2412/Kconfig" |
1072 | source "arch/arm/mach-s3c2416/Kconfig" | ||
1073 | source "arch/arm/mach-s3c2440/Kconfig" | 1077 | source "arch/arm/mach-s3c2440/Kconfig" |
1074 | source "arch/arm/mach-s3c2443/Kconfig" | ||
1075 | endif | 1078 | endif |
1076 | 1079 | ||
1077 | if ARCH_S3C64XX | 1080 | if ARCH_S3C64XX |
@@ -1588,7 +1591,7 @@ source kernel/Kconfig.preempt | |||
1588 | 1591 | ||
1589 | config HZ | 1592 | config HZ |
1590 | int | 1593 | int |
1591 | default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ | 1594 | default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \ |
1592 | ARCH_S5PV210 || ARCH_EXYNOS4 | 1595 | ARCH_S5PV210 || ARCH_EXYNOS4 |
1593 | default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER | 1596 | default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER |
1594 | default AT91_TIMER_HZ if ARCH_AT91 | 1597 | default AT91_TIMER_HZ if ARCH_AT91 |
@@ -2114,7 +2117,7 @@ config CPU_FREQ_S3C | |||
2114 | 2117 | ||
2115 | config CPU_FREQ_S3C24XX | 2118 | config CPU_FREQ_S3C24XX |
2116 | bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)" | 2119 | bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)" |
2117 | depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL | 2120 | depends on ARCH_S3C24XX && CPU_FREQ && EXPERIMENTAL |
2118 | select CPU_FREQ_S3C | 2121 | select CPU_FREQ_S3C |
2119 | help | 2122 | help |
2120 | This enables the CPUfreq driver for the Samsung S3C24XX family | 2123 | This enables the CPUfreq driver for the Samsung S3C24XX family |
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index e0d236d7ff73..b895a2a92da8 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug | |||
@@ -81,47 +81,14 @@ choice | |||
81 | prompt "Kernel low-level debugging port" | 81 | prompt "Kernel low-level debugging port" |
82 | depends on DEBUG_LL | 82 | depends on DEBUG_LL |
83 | 83 | ||
84 | config DEBUG_LL_UART_NONE | ||
85 | bool "No low-level debugging UART" | ||
86 | help | ||
87 | Say Y here if your platform doesn't provide a UART option | ||
88 | below. This relies on your platform choosing the right UART | ||
89 | definition internally in order for low-level debugging to | ||
90 | work. | ||
91 | |||
92 | config DEBUG_ICEDCC | ||
93 | bool "Kernel low-level debugging via EmbeddedICE DCC channel" | ||
94 | help | ||
95 | Say Y here if you want the debug print routines to direct | ||
96 | their output to the EmbeddedICE macrocell's DCC channel using | ||
97 | co-processor 14. This is known to work on the ARM9 style ICE | ||
98 | channel and on the XScale with the PEEDI. | ||
99 | |||
100 | Note that the system will appear to hang during boot if there | ||
101 | is nothing connected to read from the DCC. | ||
102 | |||
103 | config AT91_DEBUG_LL_DBGU0 | 84 | config AT91_DEBUG_LL_DBGU0 |
104 | bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" | 85 | bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" |
105 | depends on HAVE_AT91_DBGU0 | 86 | depends on HAVE_AT91_DBGU0 |
106 | 87 | ||
107 | config AT91_DEBUG_LL_DBGU1 | 88 | config AT91_DEBUG_LL_DBGU1 |
108 | bool "Kernel low-level debugging on 9263, 9g45 and cap9" | 89 | bool "Kernel low-level debugging on 9263 and 9g45" |
109 | depends on HAVE_AT91_DBGU1 | 90 | depends on HAVE_AT91_DBGU1 |
110 | 91 | ||
111 | config DEBUG_FOOTBRIDGE_COM1 | ||
112 | bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" | ||
113 | depends on FOOTBRIDGE | ||
114 | help | ||
115 | Say Y here if you want the debug print routines to direct | ||
116 | their output to the 8250 at PCI COM1. | ||
117 | |||
118 | config DEBUG_DC21285_PORT | ||
119 | bool "Kernel low-level debugging messages via footbridge serial port" | ||
120 | depends on FOOTBRIDGE | ||
121 | help | ||
122 | Say Y here if you want the debug print routines to direct | ||
123 | their output to the serial port in the DC21285 (Footbridge). | ||
124 | |||
125 | config DEBUG_CLPS711X_UART1 | 92 | config DEBUG_CLPS711X_UART1 |
126 | bool "Kernel low-level debugging messages via UART1" | 93 | bool "Kernel low-level debugging messages via UART1" |
127 | depends on ARCH_CLPS711X | 94 | depends on ARCH_CLPS711X |
@@ -136,6 +103,20 @@ choice | |||
136 | Say Y here if you want the debug print routines to direct | 103 | Say Y here if you want the debug print routines to direct |
137 | their output to the second serial port on these devices. | 104 | their output to the second serial port on these devices. |
138 | 105 | ||
106 | config DEBUG_DC21285_PORT | ||
107 | bool "Kernel low-level debugging messages via footbridge serial port" | ||
108 | depends on FOOTBRIDGE | ||
109 | help | ||
110 | Say Y here if you want the debug print routines to direct | ||
111 | their output to the serial port in the DC21285 (Footbridge). | ||
112 | |||
113 | config DEBUG_FOOTBRIDGE_COM1 | ||
114 | bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" | ||
115 | depends on FOOTBRIDGE | ||
116 | help | ||
117 | Say Y here if you want the debug print routines to direct | ||
118 | their output to the 8250 at PCI COM1. | ||
119 | |||
139 | config DEBUG_HIGHBANK_UART | 120 | config DEBUG_HIGHBANK_UART |
140 | bool "Kernel low-level debugging messages via Highbank UART" | 121 | bool "Kernel low-level debugging messages via Highbank UART" |
141 | depends on ARCH_HIGHBANK | 122 | depends on ARCH_HIGHBANK |
@@ -206,38 +187,42 @@ choice | |||
206 | Say Y here if you want kernel low-level debugging support | 187 | Say Y here if you want kernel low-level debugging support |
207 | on i.MX6Q. | 188 | on i.MX6Q. |
208 | 189 | ||
209 | config DEBUG_S3C_UART0 | 190 | config DEBUG_MSM_UART1 |
210 | depends on PLAT_SAMSUNG | 191 | bool "Kernel low-level debugging messages via MSM UART1" |
211 | bool "Use S3C UART 0 for low-level debug" | 192 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 |
212 | help | 193 | help |
213 | Say Y here if you want the debug print routines to direct | 194 | Say Y here if you want the debug print routines to direct |
214 | their output to UART 0. The port must have been initialised | 195 | their output to the first serial port on MSM devices. |
215 | by the boot-loader before use. | ||
216 | |||
217 | The uncompressor code port configuration is now handled | ||
218 | by CONFIG_S3C_LOWLEVEL_UART_PORT. | ||
219 | 196 | ||
220 | config DEBUG_S3C_UART1 | 197 | config DEBUG_MSM_UART2 |
221 | depends on PLAT_SAMSUNG | 198 | bool "Kernel low-level debugging messages via MSM UART2" |
222 | bool "Use S3C UART 1 for low-level debug" | 199 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 |
223 | help | 200 | help |
224 | Say Y here if you want the debug print routines to direct | 201 | Say Y here if you want the debug print routines to direct |
225 | their output to UART 1. The port must have been initialised | 202 | their output to the second serial port on MSM devices. |
226 | by the boot-loader before use. | ||
227 | 203 | ||
228 | The uncompressor code port configuration is now handled | 204 | config DEBUG_MSM_UART3 |
229 | by CONFIG_S3C_LOWLEVEL_UART_PORT. | 205 | bool "Kernel low-level debugging messages via MSM UART3" |
206 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | ||
207 | help | ||
208 | Say Y here if you want the debug print routines to direct | ||
209 | their output to the third serial port on MSM devices. | ||
230 | 210 | ||
231 | config DEBUG_S3C_UART2 | 211 | config DEBUG_MSM8660_UART |
232 | depends on PLAT_SAMSUNG | 212 | bool "Kernel low-level debugging messages via MSM 8660 UART" |
233 | bool "Use S3C UART 2 for low-level debug" | 213 | depends on ARCH_MSM8X60 |
214 | select MSM_HAS_DEBUG_UART_HS | ||
234 | help | 215 | help |
235 | Say Y here if you want the debug print routines to direct | 216 | Say Y here if you want the debug print routines to direct |
236 | their output to UART 2. The port must have been initialised | 217 | their output to the serial port on MSM 8660 devices. |
237 | by the boot-loader before use. | ||
238 | 218 | ||
239 | The uncompressor code port configuration is now handled | 219 | config DEBUG_MSM8960_UART |
240 | by CONFIG_S3C_LOWLEVEL_UART_PORT. | 220 | bool "Kernel low-level debugging messages via MSM 8960 UART" |
221 | depends on ARCH_MSM8960 | ||
222 | select MSM_HAS_DEBUG_UART_HS | ||
223 | help | ||
224 | Say Y here if you want the debug print routines to direct | ||
225 | their output to the serial port on MSM 8960 devices. | ||
241 | 226 | ||
242 | config DEBUG_REALVIEW_STD_PORT | 227 | config DEBUG_REALVIEW_STD_PORT |
243 | bool "RealView Default UART" | 228 | bool "RealView Default UART" |
@@ -255,42 +240,57 @@ choice | |||
255 | their output to the standard serial port on the RealView | 240 | their output to the standard serial port on the RealView |
256 | PB1176 platform. | 241 | PB1176 platform. |
257 | 242 | ||
258 | config DEBUG_MSM_UART1 | 243 | config DEBUG_S3C_UART0 |
259 | bool "Kernel low-level debugging messages via MSM UART1" | 244 | depends on PLAT_SAMSUNG |
260 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | 245 | bool "Use S3C UART 0 for low-level debug" |
261 | help | 246 | help |
262 | Say Y here if you want the debug print routines to direct | 247 | Say Y here if you want the debug print routines to direct |
263 | their output to the first serial port on MSM devices. | 248 | their output to UART 0. The port must have been initialised |
249 | by the boot-loader before use. | ||
264 | 250 | ||
265 | config DEBUG_MSM_UART2 | 251 | The uncompressor code port configuration is now handled |
266 | bool "Kernel low-level debugging messages via MSM UART2" | 252 | by CONFIG_S3C_LOWLEVEL_UART_PORT. |
267 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | 253 | |
254 | config DEBUG_S3C_UART1 | ||
255 | depends on PLAT_SAMSUNG | ||
256 | bool "Use S3C UART 1 for low-level debug" | ||
268 | help | 257 | help |
269 | Say Y here if you want the debug print routines to direct | 258 | Say Y here if you want the debug print routines to direct |
270 | their output to the second serial port on MSM devices. | 259 | their output to UART 1. The port must have been initialised |
260 | by the boot-loader before use. | ||
271 | 261 | ||
272 | config DEBUG_MSM_UART3 | 262 | The uncompressor code port configuration is now handled |
273 | bool "Kernel low-level debugging messages via MSM UART3" | 263 | by CONFIG_S3C_LOWLEVEL_UART_PORT. |
274 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | 264 | |
265 | config DEBUG_S3C_UART2 | ||
266 | depends on PLAT_SAMSUNG | ||
267 | bool "Use S3C UART 2 for low-level debug" | ||
275 | help | 268 | help |
276 | Say Y here if you want the debug print routines to direct | 269 | Say Y here if you want the debug print routines to direct |
277 | their output to the third serial port on MSM devices. | 270 | their output to UART 2. The port must have been initialised |
271 | by the boot-loader before use. | ||
278 | 272 | ||
279 | config DEBUG_MSM8660_UART | 273 | The uncompressor code port configuration is now handled |
280 | bool "Kernel low-level debugging messages via MSM 8660 UART" | 274 | by CONFIG_S3C_LOWLEVEL_UART_PORT. |
281 | depends on ARCH_MSM8X60 | 275 | |
282 | select MSM_HAS_DEBUG_UART_HS | 276 | config DEBUG_LL_UART_NONE |
277 | bool "No low-level debugging UART" | ||
283 | help | 278 | help |
284 | Say Y here if you want the debug print routines to direct | 279 | Say Y here if your platform doesn't provide a UART option |
285 | their output to the serial port on MSM 8660 devices. | 280 | below. This relies on your platform choosing the right UART |
281 | definition internally in order for low-level debugging to | ||
282 | work. | ||
286 | 283 | ||
287 | config DEBUG_MSM8960_UART | 284 | config DEBUG_ICEDCC |
288 | bool "Kernel low-level debugging messages via MSM 8960 UART" | 285 | bool "Kernel low-level debugging via EmbeddedICE DCC channel" |
289 | depends on ARCH_MSM8960 | ||
290 | select MSM_HAS_DEBUG_UART_HS | ||
291 | help | 286 | help |
292 | Say Y here if you want the debug print routines to direct | 287 | Say Y here if you want the debug print routines to direct |
293 | their output to the serial port on MSM 8960 devices. | 288 | their output to the EmbeddedICE macrocell's DCC channel using |
289 | co-processor 14. This is known to work on the ARM9 style ICE | ||
290 | channel and on the XScale with the PEEDI. | ||
291 | |||
292 | Note that the system will appear to hang during boot if there | ||
293 | is nothing connected to read from the DCC. | ||
294 | 294 | ||
295 | endchoice | 295 | endchoice |
296 | 296 | ||
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 1683bfb9166f..0106f75530c0 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -174,7 +174,7 @@ machine-$(CONFIG_ARCH_PRIMA2) := prima2 | |||
174 | machine-$(CONFIG_ARCH_PXA) := pxa | 174 | machine-$(CONFIG_ARCH_PXA) := pxa |
175 | machine-$(CONFIG_ARCH_REALVIEW) := realview | 175 | machine-$(CONFIG_ARCH_REALVIEW) := realview |
176 | machine-$(CONFIG_ARCH_RPC) := rpc | 176 | machine-$(CONFIG_ARCH_RPC) := rpc |
177 | machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2412 s3c2416 s3c2440 s3c2443 | 177 | machine-$(CONFIG_ARCH_S3C24XX) := s3c24xx s3c2412 s3c2440 |
178 | machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx | 178 | machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx |
179 | machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0 | 179 | machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0 |
180 | machine-$(CONFIG_ARCH_S5PC100) := s5pc100 | 180 | machine-$(CONFIG_ARCH_S5PC100) := s5pc100 |
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index c5d60250d43d..5f6045f1766c 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S | |||
@@ -58,7 +58,7 @@ | |||
58 | add \rb, \rb, #0x00010000 @ Ser1 | 58 | add \rb, \rb, #0x00010000 @ Ser1 |
59 | #endif | 59 | #endif |
60 | .endm | 60 | .endm |
61 | #elif defined(CONFIG_ARCH_S3C2410) | 61 | #elif defined(CONFIG_ARCH_S3C24XX) |
62 | .macro loadsp, rb, tmp | 62 | .macro loadsp, rb, tmp |
63 | mov \rb, #0x50000000 | 63 | mov \rb, #0x50000000 |
64 | add \rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT | 64 | add \rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT |
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c index d1bcd7b13ebc..fb1f1cfce60c 100644 --- a/arch/arm/common/it8152.c +++ b/arch/arm/common/it8152.c | |||
@@ -320,13 +320,6 @@ err0: | |||
320 | return -EBUSY; | 320 | return -EBUSY; |
321 | } | 321 | } |
322 | 322 | ||
323 | /* | ||
324 | * If we set up a device for bus mastering, we need to check the latency | ||
325 | * timer as we don't have even crappy BIOSes to set it properly. | ||
326 | * The implementation is from arch/i386/pci/i386.c | ||
327 | */ | ||
328 | unsigned int pcibios_max_latency = 255; | ||
329 | |||
330 | /* ITE bridge requires setting latency timer to avoid early bus access | 323 | /* ITE bridge requires setting latency timer to avoid early bus access |
331 | termination by PCI bus master devices | 324 | termination by PCI bus master devices |
332 | */ | 325 | */ |
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c index d8e44a43047c..ff3ad2244824 100644 --- a/arch/arm/common/pl330.c +++ b/arch/arm/common/pl330.c | |||
@@ -1502,12 +1502,13 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op) | |||
1502 | struct pl330_thread *thrd = ch_id; | 1502 | struct pl330_thread *thrd = ch_id; |
1503 | struct pl330_dmac *pl330; | 1503 | struct pl330_dmac *pl330; |
1504 | unsigned long flags; | 1504 | unsigned long flags; |
1505 | int ret = 0, active = thrd->req_running; | 1505 | int ret = 0, active; |
1506 | 1506 | ||
1507 | if (!thrd || thrd->free || thrd->dmac->state == DYING) | 1507 | if (!thrd || thrd->free || thrd->dmac->state == DYING) |
1508 | return -EINVAL; | 1508 | return -EINVAL; |
1509 | 1509 | ||
1510 | pl330 = thrd->dmac; | 1510 | pl330 = thrd->dmac; |
1511 | active = thrd->req_running; | ||
1511 | 1512 | ||
1512 | spin_lock_irqsave(&pl330->lock, flags); | 1513 | spin_lock_irqsave(&pl330->lock, flags); |
1513 | 1514 | ||
diff --git a/arch/arm/configs/at91cap9_defconfig b/arch/arm/configs/at91cap9_defconfig deleted file mode 100644 index 8826eb218e73..000000000000 --- a/arch/arm/configs/at91cap9_defconfig +++ /dev/null | |||
@@ -1,108 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_LOCALVERSION_AUTO is not set | ||
3 | # CONFIG_SWAP is not set | ||
4 | CONFIG_SYSVIPC=y | ||
5 | CONFIG_LOG_BUF_SHIFT=14 | ||
6 | CONFIG_BLK_DEV_INITRD=y | ||
7 | CONFIG_SLAB=y | ||
8 | CONFIG_MODULES=y | ||
9 | CONFIG_MODULE_UNLOAD=y | ||
10 | # CONFIG_BLK_DEV_BSG is not set | ||
11 | # CONFIG_IOSCHED_DEADLINE is not set | ||
12 | # CONFIG_IOSCHED_CFQ is not set | ||
13 | CONFIG_ARCH_AT91=y | ||
14 | CONFIG_ARCH_AT91CAP9=y | ||
15 | CONFIG_MACH_AT91CAP9ADK=y | ||
16 | CONFIG_MTD_AT91_DATAFLASH_CARD=y | ||
17 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
18 | # CONFIG_ARM_THUMB is not set | ||
19 | CONFIG_AEABI=y | ||
20 | CONFIG_LEDS=y | ||
21 | CONFIG_LEDS_CPU=y | ||
22 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
23 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
24 | CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/ram0 rw" | ||
25 | CONFIG_FPE_NWFPE=y | ||
26 | CONFIG_NET=y | ||
27 | CONFIG_PACKET=y | ||
28 | CONFIG_UNIX=y | ||
29 | CONFIG_INET=y | ||
30 | CONFIG_IP_PNP=y | ||
31 | CONFIG_IP_PNP_BOOTP=y | ||
32 | CONFIG_IP_PNP_RARP=y | ||
33 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
34 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
35 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
36 | # CONFIG_INET_LRO is not set | ||
37 | # CONFIG_INET_DIAG is not set | ||
38 | # CONFIG_IPV6 is not set | ||
39 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
40 | CONFIG_MTD=y | ||
41 | CONFIG_MTD_CMDLINE_PARTS=y | ||
42 | CONFIG_MTD_CHAR=y | ||
43 | CONFIG_MTD_BLOCK=y | ||
44 | CONFIG_MTD_CFI=y | ||
45 | CONFIG_MTD_JEDECPROBE=y | ||
46 | CONFIG_MTD_CFI_AMDSTD=y | ||
47 | CONFIG_MTD_PHYSMAP=y | ||
48 | CONFIG_MTD_DATAFLASH=y | ||
49 | CONFIG_MTD_NAND=y | ||
50 | CONFIG_MTD_NAND_ATMEL=y | ||
51 | CONFIG_BLK_DEV_LOOP=y | ||
52 | CONFIG_BLK_DEV_RAM=y | ||
53 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
54 | CONFIG_SCSI=y | ||
55 | CONFIG_BLK_DEV_SD=y | ||
56 | CONFIG_SCSI_MULTI_LUN=y | ||
57 | CONFIG_NETDEVICES=y | ||
58 | CONFIG_MII=y | ||
59 | CONFIG_MACB=y | ||
60 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
61 | CONFIG_INPUT_EVDEV=y | ||
62 | # CONFIG_INPUT_KEYBOARD is not set | ||
63 | # CONFIG_INPUT_MOUSE is not set | ||
64 | CONFIG_INPUT_TOUCHSCREEN=y | ||
65 | CONFIG_TOUCHSCREEN_ADS7846=y | ||
66 | # CONFIG_SERIO is not set | ||
67 | CONFIG_SERIAL_ATMEL=y | ||
68 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
69 | CONFIG_HW_RANDOM=y | ||
70 | CONFIG_I2C=y | ||
71 | CONFIG_I2C_CHARDEV=y | ||
72 | CONFIG_SPI=y | ||
73 | CONFIG_SPI_ATMEL=y | ||
74 | # CONFIG_HWMON is not set | ||
75 | CONFIG_WATCHDOG=y | ||
76 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
77 | CONFIG_FB=y | ||
78 | CONFIG_FB_ATMEL=y | ||
79 | CONFIG_LOGO=y | ||
80 | # CONFIG_LOGO_LINUX_MONO is not set | ||
81 | # CONFIG_LOGO_LINUX_CLUT224 is not set | ||
82 | # CONFIG_USB_HID is not set | ||
83 | CONFIG_USB=y | ||
84 | CONFIG_USB_DEVICEFS=y | ||
85 | CONFIG_USB_MON=y | ||
86 | CONFIG_USB_OHCI_HCD=y | ||
87 | CONFIG_USB_STORAGE=y | ||
88 | CONFIG_USB_GADGET=y | ||
89 | CONFIG_USB_ETH=m | ||
90 | CONFIG_USB_FILE_STORAGE=m | ||
91 | CONFIG_MMC=y | ||
92 | CONFIG_MMC_AT91=m | ||
93 | CONFIG_RTC_CLASS=y | ||
94 | CONFIG_RTC_DRV_AT91SAM9=y | ||
95 | CONFIG_EXT2_FS=y | ||
96 | CONFIG_VFAT_FS=y | ||
97 | CONFIG_TMPFS=y | ||
98 | CONFIG_JFFS2_FS=y | ||
99 | CONFIG_CRAMFS=y | ||
100 | CONFIG_NFS_FS=y | ||
101 | CONFIG_ROOT_NFS=y | ||
102 | CONFIG_NLS_CODEPAGE_437=y | ||
103 | CONFIG_NLS_CODEPAGE_850=y | ||
104 | CONFIG_NLS_ISO8859_1=y | ||
105 | CONFIG_DEBUG_FS=y | ||
106 | CONFIG_DEBUG_KERNEL=y | ||
107 | CONFIG_DEBUG_INFO=y | ||
108 | CONFIG_DEBUG_USER=y | ||
diff --git a/arch/arm/configs/mini2440_defconfig b/arch/arm/configs/mini2440_defconfig index 2472a9585834..42da9183acc8 100644 --- a/arch/arm/configs/mini2440_defconfig +++ b/arch/arm/configs/mini2440_defconfig | |||
@@ -13,7 +13,7 @@ CONFIG_MODULE_UNLOAD=y | |||
13 | CONFIG_MODULE_FORCE_UNLOAD=y | 13 | CONFIG_MODULE_FORCE_UNLOAD=y |
14 | # CONFIG_BLK_DEV_BSG is not set | 14 | # CONFIG_BLK_DEV_BSG is not set |
15 | CONFIG_BLK_DEV_INTEGRITY=y | 15 | CONFIG_BLK_DEV_INTEGRITY=y |
16 | CONFIG_ARCH_S3C2410=y | 16 | CONFIG_ARCH_S3C24XX=y |
17 | CONFIG_S3C_ADC=y | 17 | CONFIG_S3C_ADC=y |
18 | CONFIG_S3C24XX_PWM=y | 18 | CONFIG_S3C24XX_PWM=y |
19 | CONFIG_MACH_MINI2440=y | 19 | CONFIG_MACH_MINI2440=y |
diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig index f9096c1b0a65..193448f31284 100644 --- a/arch/arm/configs/s3c2410_defconfig +++ b/arch/arm/configs/s3c2410_defconfig | |||
@@ -3,40 +3,47 @@ CONFIG_SYSVIPC=y | |||
3 | CONFIG_IKCONFIG=m | 3 | CONFIG_IKCONFIG=m |
4 | CONFIG_IKCONFIG_PROC=y | 4 | CONFIG_IKCONFIG_PROC=y |
5 | CONFIG_LOG_BUF_SHIFT=16 | 5 | CONFIG_LOG_BUF_SHIFT=16 |
6 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
7 | CONFIG_BLK_DEV_INITRD=y | 6 | CONFIG_BLK_DEV_INITRD=y |
8 | CONFIG_SLAB=y | 7 | CONFIG_SLAB=y |
9 | CONFIG_MODULES=y | 8 | CONFIG_MODULES=y |
10 | CONFIG_MODULE_UNLOAD=y | 9 | CONFIG_MODULE_UNLOAD=y |
11 | # CONFIG_BLK_DEV_BSG is not set | 10 | # CONFIG_BLK_DEV_BSG is not set |
12 | CONFIG_ARCH_S3C2410=y | 11 | CONFIG_PARTITION_ADVANCED=y |
12 | CONFIG_BSD_DISKLABEL=y | ||
13 | CONFIG_SOLARIS_X86_PARTITION=y | ||
14 | CONFIG_ARCH_S3C24XX=y | ||
13 | CONFIG_S3C_BOOT_ERROR_RESET=y | 15 | CONFIG_S3C_BOOT_ERROR_RESET=y |
14 | CONFIG_S3C_ADC=y | 16 | CONFIG_S3C_ADC=y |
15 | CONFIG_S3C24XX_PWM=y | 17 | CONFIG_S3C24XX_PWM=y |
16 | CONFIG_ARCH_SMDK2410=y | 18 | CONFIG_CPU_S3C2412=y |
19 | CONFIG_CPU_S3C2416=y | ||
20 | CONFIG_CPU_S3C2440=y | ||
21 | CONFIG_CPU_S3C2442=y | ||
22 | CONFIG_CPU_S3C2443=y | ||
23 | CONFIG_MACH_AML_M5900=y | ||
24 | CONFIG_ARCH_BAST=y | ||
17 | CONFIG_ARCH_H1940=y | 25 | CONFIG_ARCH_H1940=y |
18 | CONFIG_MACH_N30=y | 26 | CONFIG_MACH_N30=y |
19 | CONFIG_ARCH_BAST=y | ||
20 | CONFIG_MACH_OTOM=y | 27 | CONFIG_MACH_OTOM=y |
21 | CONFIG_MACH_AML_M5900=y | 28 | CONFIG_MACH_QT2410=y |
29 | CONFIG_ARCH_SMDK2410=y | ||
22 | CONFIG_MACH_TCT_HAMMER=y | 30 | CONFIG_MACH_TCT_HAMMER=y |
23 | CONFIG_MACH_VR1000=y | 31 | CONFIG_MACH_VR1000=y |
24 | CONFIG_MACH_QT2410=y | ||
25 | CONFIG_MACH_JIVE=y | 32 | CONFIG_MACH_JIVE=y |
26 | CONFIG_MACH_SMDK2412=y | 33 | CONFIG_MACH_SMDK2412=y |
27 | CONFIG_MACH_VSTMS=y | 34 | CONFIG_MACH_VSTMS=y |
28 | CONFIG_MACH_SMDK2416=y | 35 | CONFIG_MACH_SMDK2416=y |
29 | CONFIG_MACH_ANUBIS=y | 36 | CONFIG_MACH_ANUBIS=y |
30 | CONFIG_MACH_NEO1973_GTA02=y | 37 | CONFIG_MACH_AT2440EVB=y |
38 | CONFIG_MACH_MINI2440=y | ||
39 | CONFIG_MACH_NEXCODER_2440=y | ||
31 | CONFIG_MACH_OSIRIS=y | 40 | CONFIG_MACH_OSIRIS=y |
32 | CONFIG_MACH_OSIRIS_DVS=m | 41 | CONFIG_MACH_OSIRIS_DVS=m |
33 | CONFIG_MACH_RX3715=y | 42 | CONFIG_MACH_RX3715=y |
34 | CONFIG_ARCH_S3C2440=y | 43 | CONFIG_ARCH_S3C2440=y |
35 | CONFIG_MACH_NEXCODER_2440=y | 44 | CONFIG_MACH_NEO1973_GTA02=y |
36 | CONFIG_SMDK2440_CPU2442=y | ||
37 | CONFIG_MACH_AT2440EVB=y | ||
38 | CONFIG_MACH_MINI2440=y | ||
39 | CONFIG_MACH_RX1950=y | 45 | CONFIG_MACH_RX1950=y |
46 | CONFIG_SMDK2440_CPU2442=y | ||
40 | CONFIG_MACH_SMDK2443=y | 47 | CONFIG_MACH_SMDK2443=y |
41 | # CONFIG_ARM_THUMB is not set | 48 | # CONFIG_ARM_THUMB is not set |
42 | CONFIG_ZBOOT_ROM_TEXT=0x0 | 49 | CONFIG_ZBOOT_ROM_TEXT=0x0 |
@@ -45,7 +52,6 @@ CONFIG_CMDLINE="root=/dev/hda1 ro init=/bin/bash console=ttySAC0" | |||
45 | CONFIG_FPE_NWFPE=y | 52 | CONFIG_FPE_NWFPE=y |
46 | CONFIG_FPE_NWFPE_XP=y | 53 | CONFIG_FPE_NWFPE_XP=y |
47 | CONFIG_BINFMT_AOUT=y | 54 | CONFIG_BINFMT_AOUT=y |
48 | CONFIG_PM=y | ||
49 | CONFIG_APM_EMULATION=m | 55 | CONFIG_APM_EMULATION=m |
50 | CONFIG_NET=y | 56 | CONFIG_NET=y |
51 | CONFIG_PACKET=y | 57 | CONFIG_PACKET=y |
@@ -58,7 +64,6 @@ CONFIG_IP_PNP=y | |||
58 | CONFIG_IP_PNP_DHCP=y | 64 | CONFIG_IP_PNP_DHCP=y |
59 | CONFIG_IP_PNP_BOOTP=y | 65 | CONFIG_IP_PNP_BOOTP=y |
60 | CONFIG_NET_IPIP=m | 66 | CONFIG_NET_IPIP=m |
61 | CONFIG_NET_IPGRE=m | ||
62 | CONFIG_INET_AH=m | 67 | CONFIG_INET_AH=m |
63 | CONFIG_INET_ESP=m | 68 | CONFIG_INET_ESP=m |
64 | CONFIG_INET_IPCOMP=m | 69 | CONFIG_INET_IPCOMP=m |
@@ -80,7 +85,6 @@ CONFIG_IPV6_MIP6=m | |||
80 | CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m | 85 | CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m |
81 | CONFIG_IPV6_TUNNEL=m | 86 | CONFIG_IPV6_TUNNEL=m |
82 | CONFIG_NETFILTER=y | 87 | CONFIG_NETFILTER=y |
83 | CONFIG_NETFILTER_NETLINK_QUEUE=m | ||
84 | CONFIG_NF_CONNTRACK=m | 88 | CONFIG_NF_CONNTRACK=m |
85 | CONFIG_NF_CONNTRACK_EVENTS=y | 89 | CONFIG_NF_CONNTRACK_EVENTS=y |
86 | CONFIG_NF_CT_PROTO_DCCP=m | 90 | CONFIG_NF_CT_PROTO_DCCP=m |
@@ -138,7 +142,6 @@ CONFIG_IP_VS=m | |||
138 | CONFIG_NF_CONNTRACK_IPV4=m | 142 | CONFIG_NF_CONNTRACK_IPV4=m |
139 | CONFIG_IP_NF_QUEUE=m | 143 | CONFIG_IP_NF_QUEUE=m |
140 | CONFIG_IP_NF_IPTABLES=m | 144 | CONFIG_IP_NF_IPTABLES=m |
141 | CONFIG_IP_NF_MATCH_ADDRTYPE=m | ||
142 | CONFIG_IP_NF_MATCH_AH=m | 145 | CONFIG_IP_NF_MATCH_AH=m |
143 | CONFIG_IP_NF_MATCH_ECN=m | 146 | CONFIG_IP_NF_MATCH_ECN=m |
144 | CONFIG_IP_NF_MATCH_TTL=m | 147 | CONFIG_IP_NF_MATCH_TTL=m |
@@ -150,7 +153,6 @@ CONFIG_NF_NAT=m | |||
150 | CONFIG_IP_NF_TARGET_MASQUERADE=m | 153 | CONFIG_IP_NF_TARGET_MASQUERADE=m |
151 | CONFIG_IP_NF_TARGET_NETMAP=m | 154 | CONFIG_IP_NF_TARGET_NETMAP=m |
152 | CONFIG_IP_NF_TARGET_REDIRECT=m | 155 | CONFIG_IP_NF_TARGET_REDIRECT=m |
153 | CONFIG_NF_NAT_SNMP_BASIC=m | ||
154 | CONFIG_IP_NF_MANGLE=m | 156 | CONFIG_IP_NF_MANGLE=m |
155 | CONFIG_IP_NF_TARGET_CLUSTERIP=m | 157 | CONFIG_IP_NF_TARGET_CLUSTERIP=m |
156 | CONFIG_IP_NF_TARGET_ECN=m | 158 | CONFIG_IP_NF_TARGET_ECN=m |
@@ -177,8 +179,6 @@ CONFIG_IP6_NF_TARGET_REJECT=m | |||
177 | CONFIG_IP6_NF_MANGLE=m | 179 | CONFIG_IP6_NF_MANGLE=m |
178 | CONFIG_IP6_NF_RAW=m | 180 | CONFIG_IP6_NF_RAW=m |
179 | CONFIG_BT=m | 181 | CONFIG_BT=m |
180 | CONFIG_BT_L2CAP=m | ||
181 | CONFIG_BT_SCO=m | ||
182 | CONFIG_BT_RFCOMM=m | 182 | CONFIG_BT_RFCOMM=m |
183 | CONFIG_BT_RFCOMM_TTY=y | 183 | CONFIG_BT_RFCOMM_TTY=y |
184 | CONFIG_BT_BNEP=m | 184 | CONFIG_BT_BNEP=m |
@@ -199,7 +199,6 @@ CONFIG_MAC80211_MESH=y | |||
199 | CONFIG_MAC80211_LEDS=y | 199 | CONFIG_MAC80211_LEDS=y |
200 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 200 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
201 | CONFIG_MTD=y | 201 | CONFIG_MTD=y |
202 | CONFIG_MTD_PARTITIONS=y | ||
203 | CONFIG_MTD_REDBOOT_PARTS=y | 202 | CONFIG_MTD_REDBOOT_PARTS=y |
204 | CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y | 203 | CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y |
205 | CONFIG_MTD_CMDLINE_PARTS=y | 204 | CONFIG_MTD_CMDLINE_PARTS=y |
@@ -221,9 +220,6 @@ CONFIG_BLK_DEV_NBD=m | |||
221 | CONFIG_BLK_DEV_UB=m | 220 | CONFIG_BLK_DEV_UB=m |
222 | CONFIG_BLK_DEV_RAM=y | 221 | CONFIG_BLK_DEV_RAM=y |
223 | CONFIG_ATA_OVER_ETH=m | 222 | CONFIG_ATA_OVER_ETH=m |
224 | CONFIG_EEPROM_AT25=m | ||
225 | CONFIG_EEPROM_LEGACY=m | ||
226 | CONFIG_EEPROM_93CX6=m | ||
227 | CONFIG_IDE=y | 223 | CONFIG_IDE=y |
228 | CONFIG_BLK_DEV_IDECD=y | 224 | CONFIG_BLK_DEV_IDECD=y |
229 | CONFIG_BLK_DEV_IDETAPE=m | 225 | CONFIG_BLK_DEV_IDETAPE=m |
@@ -240,7 +236,6 @@ CONFIG_SCSI_MULTI_LUN=y | |||
240 | CONFIG_SCSI_CONSTANTS=y | 236 | CONFIG_SCSI_CONSTANTS=y |
241 | CONFIG_SCSI_SCAN_ASYNC=y | 237 | CONFIG_SCSI_SCAN_ASYNC=y |
242 | CONFIG_NETDEVICES=y | 238 | CONFIG_NETDEVICES=y |
243 | CONFIG_NET_ETHERNET=y | ||
244 | CONFIG_DM9000=y | 239 | CONFIG_DM9000=y |
245 | CONFIG_INPUT_EVDEV=y | 240 | CONFIG_INPUT_EVDEV=y |
246 | CONFIG_MOUSE_APPLETOUCH=m | 241 | CONFIG_MOUSE_APPLETOUCH=m |
@@ -274,7 +269,6 @@ CONFIG_JOYSTICK_XPAD_LEDS=y | |||
274 | CONFIG_INPUT_TOUCHSCREEN=y | 269 | CONFIG_INPUT_TOUCHSCREEN=y |
275 | CONFIG_TOUCHSCREEN_USB_COMPOSITE=m | 270 | CONFIG_TOUCHSCREEN_USB_COMPOSITE=m |
276 | CONFIG_INPUT_MISC=y | 271 | CONFIG_INPUT_MISC=y |
277 | CONFIG_INPUT_ATI_REMOTE=m | ||
278 | CONFIG_INPUT_ATI_REMOTE2=m | 272 | CONFIG_INPUT_ATI_REMOTE2=m |
279 | CONFIG_INPUT_KEYSPAN_REMOTE=m | 273 | CONFIG_INPUT_KEYSPAN_REMOTE=m |
280 | CONFIG_INPUT_POWERMATE=m | 274 | CONFIG_INPUT_POWERMATE=m |
@@ -300,7 +294,6 @@ CONFIG_I2C_SIMTEC=y | |||
300 | CONFIG_SPI=y | 294 | CONFIG_SPI=y |
301 | CONFIG_SPI_GPIO=m | 295 | CONFIG_SPI_GPIO=m |
302 | CONFIG_SPI_S3C24XX=m | 296 | CONFIG_SPI_S3C24XX=m |
303 | CONFIG_SPI_S3C24XX_GPIO=m | ||
304 | CONFIG_SPI_SPIDEV=m | 297 | CONFIG_SPI_SPIDEV=m |
305 | CONFIG_SPI_TLE62X0=m | 298 | CONFIG_SPI_TLE62X0=m |
306 | CONFIG_SENSORS_LM75=m | 299 | CONFIG_SENSORS_LM75=m |
@@ -315,7 +308,6 @@ CONFIG_FB_MODE_HELPERS=y | |||
315 | CONFIG_FB_S3C2410=y | 308 | CONFIG_FB_S3C2410=y |
316 | CONFIG_FB_SM501=y | 309 | CONFIG_FB_SM501=y |
317 | CONFIG_BACKLIGHT_PWM=m | 310 | CONFIG_BACKLIGHT_PWM=m |
318 | # CONFIG_VGA_CONSOLE is not set | ||
319 | CONFIG_FRAMEBUFFER_CONSOLE=y | 311 | CONFIG_FRAMEBUFFER_CONSOLE=y |
320 | CONFIG_SOUND=y | 312 | CONFIG_SOUND=y |
321 | CONFIG_SND=y | 313 | CONFIG_SND=y |
@@ -330,10 +322,6 @@ CONFIG_SND_VERBOSE_PRINTK=y | |||
330 | CONFIG_SND_USB_AUDIO=m | 322 | CONFIG_SND_USB_AUDIO=m |
331 | CONFIG_SND_USB_CAIAQ=m | 323 | CONFIG_SND_USB_CAIAQ=m |
332 | CONFIG_SND_SOC=y | 324 | CONFIG_SND_SOC=y |
333 | CONFIG_SND_S3C24XX_SOC=y | ||
334 | CONFIG_SND_S3C24XX_SOC_JIVE_WM8750=m | ||
335 | CONFIG_SND_S3C24XX_SOC_SMDK2443_WM9710=m | ||
336 | CONFIG_SND_S3C24XX_SOC_LN2440SBC_ALC650=m | ||
337 | # CONFIG_USB_HID is not set | 325 | # CONFIG_USB_HID is not set |
338 | CONFIG_USB=y | 326 | CONFIG_USB=y |
339 | CONFIG_USB_DEVICEFS=y | 327 | CONFIG_USB_DEVICEFS=y |
@@ -387,9 +375,7 @@ CONFIG_MMC_TEST=m | |||
387 | CONFIG_MMC_SDHCI=m | 375 | CONFIG_MMC_SDHCI=m |
388 | CONFIG_MMC_SPI=m | 376 | CONFIG_MMC_SPI=m |
389 | CONFIG_MMC_S3C=y | 377 | CONFIG_MMC_S3C=y |
390 | CONFIG_LEDS_CLASS=m | ||
391 | CONFIG_LEDS_S3C24XX=m | 378 | CONFIG_LEDS_S3C24XX=m |
392 | CONFIG_LEDS_H1940=m | ||
393 | CONFIG_LEDS_PCA9532=m | 379 | CONFIG_LEDS_PCA9532=m |
394 | CONFIG_LEDS_GPIO=m | 380 | CONFIG_LEDS_GPIO=m |
395 | CONFIG_LEDS_PCA955X=m | 381 | CONFIG_LEDS_PCA955X=m |
@@ -410,8 +396,6 @@ CONFIG_EXT3_FS=y | |||
410 | CONFIG_EXT3_FS_POSIX_ACL=y | 396 | CONFIG_EXT3_FS_POSIX_ACL=y |
411 | CONFIG_EXT4_FS=m | 397 | CONFIG_EXT4_FS=m |
412 | CONFIG_EXT4_FS_POSIX_ACL=y | 398 | CONFIG_EXT4_FS_POSIX_ACL=y |
413 | CONFIG_INOTIFY=y | ||
414 | CONFIG_AUTOFS_FS=m | ||
415 | CONFIG_AUTOFS4_FS=m | 399 | CONFIG_AUTOFS4_FS=m |
416 | CONFIG_FUSE_FS=m | 400 | CONFIG_FUSE_FS=m |
417 | CONFIG_ISO9660_FS=y | 401 | CONFIG_ISO9660_FS=y |
@@ -436,9 +420,6 @@ CONFIG_NFSD=m | |||
436 | CONFIG_NFSD_V3_ACL=y | 420 | CONFIG_NFSD_V3_ACL=y |
437 | CONFIG_NFSD_V4=y | 421 | CONFIG_NFSD_V4=y |
438 | CONFIG_CIFS=m | 422 | CONFIG_CIFS=m |
439 | CONFIG_PARTITION_ADVANCED=y | ||
440 | CONFIG_BSD_DISKLABEL=y | ||
441 | CONFIG_SOLARIS_X86_PARTITION=y | ||
442 | CONFIG_NLS_CODEPAGE_437=y | 423 | CONFIG_NLS_CODEPAGE_437=y |
443 | CONFIG_NLS_CODEPAGE_737=m | 424 | CONFIG_NLS_CODEPAGE_737=m |
444 | CONFIG_NLS_CODEPAGE_775=m | 425 | CONFIG_NLS_CODEPAGE_775=m |
@@ -481,9 +462,7 @@ CONFIG_MAGIC_SYSRQ=y | |||
481 | CONFIG_DEBUG_KERNEL=y | 462 | CONFIG_DEBUG_KERNEL=y |
482 | CONFIG_DEBUG_MUTEXES=y | 463 | CONFIG_DEBUG_MUTEXES=y |
483 | CONFIG_DEBUG_INFO=y | 464 | CONFIG_DEBUG_INFO=y |
484 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
485 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 465 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
486 | CONFIG_DEBUG_USER=y | 466 | CONFIG_DEBUG_USER=y |
487 | CONFIG_DEBUG_ERRORS=y | ||
488 | CONFIG_DEBUG_LL=y | 467 | CONFIG_DEBUG_LL=y |
489 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | 468 | # CONFIG_CRYPTO_ANSI_CPRNG is not set |
diff --git a/arch/arm/configs/tct_hammer_defconfig b/arch/arm/configs/tct_hammer_defconfig index 95c0f0d63db6..1d24f8458bef 100644 --- a/arch/arm/configs/tct_hammer_defconfig +++ b/arch/arm/configs/tct_hammer_defconfig | |||
@@ -14,7 +14,7 @@ CONFIG_SLOB=y | |||
14 | CONFIG_MODULES=y | 14 | CONFIG_MODULES=y |
15 | CONFIG_MODULE_UNLOAD=y | 15 | CONFIG_MODULE_UNLOAD=y |
16 | # CONFIG_BLK_DEV_BSG is not set | 16 | # CONFIG_BLK_DEV_BSG is not set |
17 | CONFIG_ARCH_S3C2410=y | 17 | CONFIG_ARCH_S3C24XX=y |
18 | CONFIG_MACH_TCT_HAMMER=y | 18 | CONFIG_MACH_TCT_HAMMER=y |
19 | CONFIG_ZBOOT_ROM_TEXT=0x0 | 19 | CONFIG_ZBOOT_ROM_TEXT=0x0 |
20 | CONFIG_ZBOOT_ROM_BSS=0x0 | 20 | CONFIG_ZBOOT_ROM_BSS=0x0 |
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index 62f8095d46de..23371b17b23e 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h | |||
@@ -137,6 +137,11 @@ | |||
137 | disable_irq | 137 | disable_irq |
138 | .endm | 138 | .endm |
139 | 139 | ||
140 | .macro save_and_disable_irqs_notrace, oldcpsr | ||
141 | mrs \oldcpsr, cpsr | ||
142 | disable_irq_notrace | ||
143 | .endm | ||
144 | |||
140 | /* | 145 | /* |
141 | * Restore interrupt state previously stored in a register. We don't | 146 | * Restore interrupt state previously stored in a register. We don't |
142 | * guarantee that this will preserve the flags. | 147 | * guarantee that this will preserve the flags. |
diff --git a/arch/arm/include/asm/hardware/entry-macro-iomd.S b/arch/arm/include/asm/hardware/entry-macro-iomd.S index e0af4983723f..8c215acd9b57 100644 --- a/arch/arm/include/asm/hardware/entry-macro-iomd.S +++ b/arch/arm/include/asm/hardware/entry-macro-iomd.S | |||
@@ -11,14 +11,6 @@ | |||
11 | /* IOC / IOMD based hardware */ | 11 | /* IOC / IOMD based hardware */ |
12 | #include <asm/hardware/iomd.h> | 12 | #include <asm/hardware/iomd.h> |
13 | 13 | ||
14 | .macro disable_fiq | ||
15 | mov r12, #ioc_base_high | ||
16 | .if ioc_base_low | ||
17 | orr r12, r12, #ioc_base_low | ||
18 | .endif | ||
19 | strb r12, [r12, #0x38] @ Disable FIQ register | ||
20 | .endm | ||
21 | |||
22 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 14 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
23 | ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first | 15 | ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first |
24 | ldr \tmp, =irq_prio_h | 16 | ldr \tmp, =irq_prio_h |
diff --git a/arch/arm/include/asm/hardware/pl330.h b/arch/arm/include/asm/hardware/pl330.h index 575fa8186ca0..c1821385abfa 100644 --- a/arch/arm/include/asm/hardware/pl330.h +++ b/arch/arm/include/asm/hardware/pl330.h | |||
@@ -41,7 +41,7 @@ enum pl330_dstcachectrl { | |||
41 | DCCTRL1, /* Bufferable only */ | 41 | DCCTRL1, /* Bufferable only */ |
42 | DCCTRL2, /* Cacheable, but do not allocate */ | 42 | DCCTRL2, /* Cacheable, but do not allocate */ |
43 | DCCTRL3, /* Cacheable and bufferable, but do not allocate */ | 43 | DCCTRL3, /* Cacheable and bufferable, but do not allocate */ |
44 | DINVALID1 = 8, | 44 | DINVALID1, /* AWCACHE = 0x1000 */ |
45 | DINVALID2, | 45 | DINVALID2, |
46 | DCCTRL6, /* Cacheable write-through, allocate on writes only */ | 46 | DCCTRL6, /* Cacheable write-through, allocate on writes only */ |
47 | DCCTRL7, /* Cacheable write-back, allocate on writes only */ | 47 | DCCTRL7, /* Cacheable write-back, allocate on writes only */ |
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h index ce280b8d613c..cb8d638924fd 100644 --- a/arch/arm/include/asm/processor.h +++ b/arch/arm/include/asm/processor.h | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <asm/hw_breakpoint.h> | 22 | #include <asm/hw_breakpoint.h> |
23 | #include <asm/ptrace.h> | 23 | #include <asm/ptrace.h> |
24 | #include <asm/types.h> | 24 | #include <asm/types.h> |
25 | #include <asm/system.h> | ||
25 | 26 | ||
26 | #ifdef __KERNEL__ | 27 | #ifdef __KERNEL__ |
27 | #define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \ | 28 | #define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \ |
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index e4c96cc6ec0c..424aa458c487 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h | |||
@@ -110,6 +110,7 @@ extern void cpu_init(void); | |||
110 | 110 | ||
111 | void soft_restart(unsigned long); | 111 | void soft_restart(unsigned long); |
112 | extern void (*arm_pm_restart)(char str, const char *cmd); | 112 | extern void (*arm_pm_restart)(char str, const char *cmd); |
113 | extern void (*arm_pm_idle)(void); | ||
113 | 114 | ||
114 | #define UDBG_UNDEFINED (1 << 0) | 115 | #define UDBG_UNDEFINED (1 << 0) |
115 | #define UDBG_SYSCALL (1 << 1) | 116 | #define UDBG_SYSCALL (1 << 1) |
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index be16a48007b4..22f0ed324f37 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
@@ -19,7 +19,9 @@ | |||
19 | #include <asm/glue-df.h> | 19 | #include <asm/glue-df.h> |
20 | #include <asm/glue-pf.h> | 20 | #include <asm/glue-pf.h> |
21 | #include <asm/vfpmacros.h> | 21 | #include <asm/vfpmacros.h> |
22 | #ifndef CONFIG_MULTI_IRQ_HANDLER | ||
22 | #include <mach/entry-macro.S> | 23 | #include <mach/entry-macro.S> |
24 | #endif | ||
23 | #include <asm/thread_notify.h> | 25 | #include <asm/thread_notify.h> |
24 | #include <asm/unwind.h> | 26 | #include <asm/unwind.h> |
25 | #include <asm/unistd.h> | 27 | #include <asm/unistd.h> |
@@ -1101,7 +1103,6 @@ __stubs_start: | |||
1101 | * get out of that mode without clobbering one register. | 1103 | * get out of that mode without clobbering one register. |
1102 | */ | 1104 | */ |
1103 | vector_fiq: | 1105 | vector_fiq: |
1104 | disable_fiq | ||
1105 | subs pc, lr, #4 | 1106 | subs pc, lr, #4 |
1106 | 1107 | ||
1107 | /*============================================================================= | 1108 | /*============================================================================= |
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 9fd0ba90c1d2..54ee265dd819 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S | |||
@@ -10,9 +10,15 @@ | |||
10 | 10 | ||
11 | #include <asm/unistd.h> | 11 | #include <asm/unistd.h> |
12 | #include <asm/ftrace.h> | 12 | #include <asm/ftrace.h> |
13 | #include <mach/entry-macro.S> | ||
14 | #include <asm/unwind.h> | 13 | #include <asm/unwind.h> |
15 | 14 | ||
15 | #ifdef CONFIG_NEED_RET_TO_USER | ||
16 | #include <mach/entry-macro.S> | ||
17 | #else | ||
18 | .macro arch_ret_to_user, tmp1, tmp2 | ||
19 | .endm | ||
20 | #endif | ||
21 | |||
16 | #include "entry-header.S" | 22 | #include "entry-header.S" |
17 | 23 | ||
18 | 24 | ||
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 971d65c253a9..008e7ce766a7 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c | |||
@@ -61,8 +61,6 @@ extern void setup_mm_for_reboot(void); | |||
61 | 61 | ||
62 | static volatile int hlt_counter; | 62 | static volatile int hlt_counter; |
63 | 63 | ||
64 | #include <mach/system.h> | ||
65 | |||
66 | void disable_hlt(void) | 64 | void disable_hlt(void) |
67 | { | 65 | { |
68 | hlt_counter++; | 66 | hlt_counter++; |
@@ -181,13 +179,17 @@ void cpu_idle_wait(void) | |||
181 | EXPORT_SYMBOL_GPL(cpu_idle_wait); | 179 | EXPORT_SYMBOL_GPL(cpu_idle_wait); |
182 | 180 | ||
183 | /* | 181 | /* |
184 | * This is our default idle handler. We need to disable | 182 | * This is our default idle handler. |
185 | * interrupts here to ensure we don't miss a wakeup call. | ||
186 | */ | 183 | */ |
184 | |||
185 | void (*arm_pm_idle)(void); | ||
186 | |||
187 | static void default_idle(void) | 187 | static void default_idle(void) |
188 | { | 188 | { |
189 | if (!need_resched()) | 189 | if (arm_pm_idle) |
190 | arch_idle(); | 190 | arm_pm_idle(); |
191 | else | ||
192 | cpu_do_idle(); | ||
191 | local_irq_enable(); | 193 | local_irq_enable(); |
192 | } | 194 | } |
193 | 195 | ||
@@ -215,6 +217,10 @@ void cpu_idle(void) | |||
215 | cpu_die(); | 217 | cpu_die(); |
216 | #endif | 218 | #endif |
217 | 219 | ||
220 | /* | ||
221 | * We need to disable interrupts here | ||
222 | * to ensure we don't miss a wakeup call. | ||
223 | */ | ||
218 | local_irq_disable(); | 224 | local_irq_disable(); |
219 | #ifdef CONFIG_PL310_ERRATA_769419 | 225 | #ifdef CONFIG_PL310_ERRATA_769419 |
220 | wmb(); | 226 | wmb(); |
@@ -222,19 +228,18 @@ void cpu_idle(void) | |||
222 | if (hlt_counter) { | 228 | if (hlt_counter) { |
223 | local_irq_enable(); | 229 | local_irq_enable(); |
224 | cpu_relax(); | 230 | cpu_relax(); |
225 | } else { | 231 | } else if (!need_resched()) { |
226 | stop_critical_timings(); | 232 | stop_critical_timings(); |
227 | if (cpuidle_idle_call()) | 233 | if (cpuidle_idle_call()) |
228 | pm_idle(); | 234 | pm_idle(); |
229 | start_critical_timings(); | 235 | start_critical_timings(); |
230 | /* | 236 | /* |
231 | * This will eventually be removed - pm_idle | 237 | * pm_idle functions must always |
232 | * functions should always return with IRQs | 238 | * return with IRQs enabled. |
233 | * enabled. | ||
234 | */ | 239 | */ |
235 | WARN_ON(irqs_disabled()); | 240 | WARN_ON(irqs_disabled()); |
241 | } else | ||
236 | local_irq_enable(); | 242 | local_irq_enable(); |
237 | } | ||
238 | } | 243 | } |
239 | leds_event(led_idle_end); | 244 | leds_event(led_idle_end); |
240 | rcu_idle_exit(); | 245 | rcu_idle_exit(); |
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c index e33870ff0ac0..ede6443c34d9 100644 --- a/arch/arm/kernel/ptrace.c +++ b/arch/arm/kernel/ptrace.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/perf_event.h> | 23 | #include <linux/perf_event.h> |
24 | #include <linux/hw_breakpoint.h> | 24 | #include <linux/hw_breakpoint.h> |
25 | #include <linux/regset.h> | 25 | #include <linux/regset.h> |
26 | #include <linux/audit.h> | ||
26 | 27 | ||
27 | #include <asm/pgtable.h> | 28 | #include <asm/pgtable.h> |
28 | #include <asm/system.h> | 29 | #include <asm/system.h> |
@@ -904,6 +905,12 @@ long arch_ptrace(struct task_struct *child, long request, | |||
904 | return ret; | 905 | return ret; |
905 | } | 906 | } |
906 | 907 | ||
908 | #ifdef __ARMEB__ | ||
909 | #define AUDIT_ARCH_NR AUDIT_ARCH_ARMEB | ||
910 | #else | ||
911 | #define AUDIT_ARCH_NR AUDIT_ARCH_ARM | ||
912 | #endif | ||
913 | |||
907 | asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) | 914 | asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) |
908 | { | 915 | { |
909 | unsigned long ip; | 916 | unsigned long ip; |
@@ -918,7 +925,7 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) | |||
918 | if (!ip) | 925 | if (!ip) |
919 | audit_syscall_exit(regs); | 926 | audit_syscall_exit(regs); |
920 | else | 927 | else |
921 | audit_syscall_entry(AUDIT_ARCH_ARMEB, scno, regs->ARM_r0, | 928 | audit_syscall_entry(AUDIT_ARCH_NR, scno, regs->ARM_r0, |
922 | regs->ARM_r1, regs->ARM_r2, regs->ARM_r3); | 929 | regs->ARM_r1, regs->ARM_r2, regs->ARM_r3); |
923 | 930 | ||
924 | if (!test_thread_flag(TIF_SYSCALL_TRACE)) | 931 | if (!test_thread_flag(TIF_SYSCALL_TRACE)) |
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index 4285daa077b0..7a79b24597b2 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c | |||
@@ -129,7 +129,7 @@ static struct notifier_block twd_cpufreq_nb = { | |||
129 | 129 | ||
130 | static int twd_cpufreq_init(void) | 130 | static int twd_cpufreq_init(void) |
131 | { | 131 | { |
132 | if (!IS_ERR(twd_clk)) | 132 | if (twd_evt && *__this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk)) |
133 | return cpufreq_register_notifier(&twd_cpufreq_nb, | 133 | return cpufreq_register_notifier(&twd_cpufreq_nb, |
134 | CPUFREQ_TRANSITION_NOTIFIER); | 134 | CPUFREQ_TRANSITION_NOTIFIER); |
135 | 135 | ||
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 71feb00a1e99..0284e66c47f9 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig | |||
@@ -102,15 +102,6 @@ config ARCH_AT91SAM9G45 | |||
102 | select HAVE_AT91_DBGU1 | 102 | select HAVE_AT91_DBGU1 |
103 | select AT91_SAM9G45_RESET | 103 | select AT91_SAM9G45_RESET |
104 | 104 | ||
105 | config ARCH_AT91CAP9 | ||
106 | bool "AT91CAP9" | ||
107 | select CPU_ARM926T | ||
108 | select GENERIC_CLOCKEVENTS | ||
109 | select HAVE_FB_ATMEL | ||
110 | select HAVE_NET_MACB | ||
111 | select HAVE_AT91_DBGU1 | ||
112 | select AT91_SAM9G45_RESET | ||
113 | |||
114 | config ARCH_AT91X40 | 105 | config ARCH_AT91X40 |
115 | bool "AT91x40" | 106 | bool "AT91x40" |
116 | select ARCH_USES_GETTIMEOFFSET | 107 | select ARCH_USES_GETTIMEOFFSET |
@@ -447,21 +438,6 @@ endif | |||
447 | 438 | ||
448 | # ---------------------------------------------------------- | 439 | # ---------------------------------------------------------- |
449 | 440 | ||
450 | if ARCH_AT91CAP9 | ||
451 | |||
452 | comment "AT91CAP9 Board Type" | ||
453 | |||
454 | config MACH_AT91CAP9ADK | ||
455 | bool "Atmel AT91CAP9A-DK Evaluation Kit" | ||
456 | select HAVE_AT91_DATAFLASH_CARD | ||
457 | help | ||
458 | Select this if you are using Atmel's AT91CAP9A-DK Evaluation Kit. | ||
459 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4138> | ||
460 | |||
461 | endif | ||
462 | |||
463 | # ---------------------------------------------------------- | ||
464 | |||
465 | if ARCH_AT91X40 | 441 | if ARCH_AT91X40 |
466 | 442 | ||
467 | comment "AT91X40 Board Type" | 443 | comment "AT91X40 Board Type" |
@@ -544,7 +520,7 @@ config AT91_EARLY_DBGU0 | |||
544 | depends on HAVE_AT91_DBGU0 | 520 | depends on HAVE_AT91_DBGU0 |
545 | 521 | ||
546 | config AT91_EARLY_DBGU1 | 522 | config AT91_EARLY_DBGU1 |
547 | bool "DBGU on 9263, 9g45 and cap9" | 523 | bool "DBGU on 9263 and 9g45" |
548 | depends on HAVE_AT91_DBGU1 | 524 | depends on HAVE_AT91_DBGU1 |
549 | 525 | ||
550 | config AT91_EARLY_USART0 | 526 | config AT91_EARLY_USART0 |
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 705e1fbded39..aeb76f1690d9 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile | |||
@@ -20,7 +20,6 @@ obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_d | |||
20 | obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o | 20 | obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o |
21 | obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o | 21 | obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o |
22 | obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o | 22 | obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o |
23 | obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o | ||
24 | obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o | 23 | obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o |
25 | 24 | ||
26 | # AT91RM9200 board-specific support | 25 | # AT91RM9200 board-specific support |
@@ -81,9 +80,6 @@ obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o | |||
81 | # AT91SAM board with device-tree | 80 | # AT91SAM board with device-tree |
82 | obj-$(CONFIG_MACH_AT91SAM_DT) += board-dt.o | 81 | obj-$(CONFIG_MACH_AT91SAM_DT) += board-dt.o |
83 | 82 | ||
84 | # AT91CAP9 board-specific support | ||
85 | obj-$(CONFIG_MACH_AT91CAP9ADK) += board-cap9adk.o | ||
86 | |||
87 | # AT91X40 board-specific support | 83 | # AT91X40 board-specific support |
88 | obj-$(CONFIG_MACH_AT91EB01) += board-eb01.o | 84 | obj-$(CONFIG_MACH_AT91EB01) += board-eb01.o |
89 | 85 | ||
diff --git a/arch/arm/mach-at91/Makefile.boot b/arch/arm/mach-at91/Makefile.boot index 8ddafadfdc7d..2fd051eb2449 100644 --- a/arch/arm/mach-at91/Makefile.boot +++ b/arch/arm/mach-at91/Makefile.boot | |||
@@ -3,11 +3,7 @@ | |||
3 | # PARAMS_PHYS must be within 4MB of ZRELADDR | 3 | # PARAMS_PHYS must be within 4MB of ZRELADDR |
4 | # INITRD_PHYS must be in RAM | 4 | # INITRD_PHYS must be in RAM |
5 | 5 | ||
6 | ifeq ($(CONFIG_ARCH_AT91CAP9),y) | 6 | ifeq ($(CONFIG_ARCH_AT91SAM9G45),y) |
7 | zreladdr-y += 0x70008000 | ||
8 | params_phys-y := 0x70000100 | ||
9 | initrd_phys-y := 0x70410000 | ||
10 | else ifeq ($(CONFIG_ARCH_AT91SAM9G45),y) | ||
11 | zreladdr-y += 0x70008000 | 7 | zreladdr-y += 0x70008000 |
12 | params_phys-y := 0x70000100 | 8 | params_phys-y := 0x70000100 |
13 | initrd_phys-y := 0x70410000 | 9 | initrd_phys-y := 0x70410000 |
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c deleted file mode 100644 index a42edc25a87e..000000000000 --- a/arch/arm/mach-at91/at91cap9.c +++ /dev/null | |||
@@ -1,396 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-at91/at91cap9.c | ||
3 | * | ||
4 | * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> | ||
5 | * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> | ||
6 | * Copyright (C) 2007 Atmel Corporation. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | #include <linux/module.h> | ||
16 | |||
17 | #include <asm/irq.h> | ||
18 | #include <asm/mach/arch.h> | ||
19 | #include <asm/mach/map.h> | ||
20 | |||
21 | #include <mach/cpu.h> | ||
22 | #include <mach/at91cap9.h> | ||
23 | #include <mach/at91_pmc.h> | ||
24 | |||
25 | #include "soc.h" | ||
26 | #include "generic.h" | ||
27 | #include "clock.h" | ||
28 | #include "sam9_smc.h" | ||
29 | |||
30 | /* -------------------------------------------------------------------- | ||
31 | * Clocks | ||
32 | * -------------------------------------------------------------------- */ | ||
33 | |||
34 | /* | ||
35 | * The peripheral clocks. | ||
36 | */ | ||
37 | static struct clk pioABCD_clk = { | ||
38 | .name = "pioABCD_clk", | ||
39 | .pmc_mask = 1 << AT91CAP9_ID_PIOABCD, | ||
40 | .type = CLK_TYPE_PERIPHERAL, | ||
41 | }; | ||
42 | static struct clk mpb0_clk = { | ||
43 | .name = "mpb0_clk", | ||
44 | .pmc_mask = 1 << AT91CAP9_ID_MPB0, | ||
45 | .type = CLK_TYPE_PERIPHERAL, | ||
46 | }; | ||
47 | static struct clk mpb1_clk = { | ||
48 | .name = "mpb1_clk", | ||
49 | .pmc_mask = 1 << AT91CAP9_ID_MPB1, | ||
50 | .type = CLK_TYPE_PERIPHERAL, | ||
51 | }; | ||
52 | static struct clk mpb2_clk = { | ||
53 | .name = "mpb2_clk", | ||
54 | .pmc_mask = 1 << AT91CAP9_ID_MPB2, | ||
55 | .type = CLK_TYPE_PERIPHERAL, | ||
56 | }; | ||
57 | static struct clk mpb3_clk = { | ||
58 | .name = "mpb3_clk", | ||
59 | .pmc_mask = 1 << AT91CAP9_ID_MPB3, | ||
60 | .type = CLK_TYPE_PERIPHERAL, | ||
61 | }; | ||
62 | static struct clk mpb4_clk = { | ||
63 | .name = "mpb4_clk", | ||
64 | .pmc_mask = 1 << AT91CAP9_ID_MPB4, | ||
65 | .type = CLK_TYPE_PERIPHERAL, | ||
66 | }; | ||
67 | static struct clk usart0_clk = { | ||
68 | .name = "usart0_clk", | ||
69 | .pmc_mask = 1 << AT91CAP9_ID_US0, | ||
70 | .type = CLK_TYPE_PERIPHERAL, | ||
71 | }; | ||
72 | static struct clk usart1_clk = { | ||
73 | .name = "usart1_clk", | ||
74 | .pmc_mask = 1 << AT91CAP9_ID_US1, | ||
75 | .type = CLK_TYPE_PERIPHERAL, | ||
76 | }; | ||
77 | static struct clk usart2_clk = { | ||
78 | .name = "usart2_clk", | ||
79 | .pmc_mask = 1 << AT91CAP9_ID_US2, | ||
80 | .type = CLK_TYPE_PERIPHERAL, | ||
81 | }; | ||
82 | static struct clk mmc0_clk = { | ||
83 | .name = "mci0_clk", | ||
84 | .pmc_mask = 1 << AT91CAP9_ID_MCI0, | ||
85 | .type = CLK_TYPE_PERIPHERAL, | ||
86 | }; | ||
87 | static struct clk mmc1_clk = { | ||
88 | .name = "mci1_clk", | ||
89 | .pmc_mask = 1 << AT91CAP9_ID_MCI1, | ||
90 | .type = CLK_TYPE_PERIPHERAL, | ||
91 | }; | ||
92 | static struct clk can_clk = { | ||
93 | .name = "can_clk", | ||
94 | .pmc_mask = 1 << AT91CAP9_ID_CAN, | ||
95 | .type = CLK_TYPE_PERIPHERAL, | ||
96 | }; | ||
97 | static struct clk twi_clk = { | ||
98 | .name = "twi_clk", | ||
99 | .pmc_mask = 1 << AT91CAP9_ID_TWI, | ||
100 | .type = CLK_TYPE_PERIPHERAL, | ||
101 | }; | ||
102 | static struct clk spi0_clk = { | ||
103 | .name = "spi0_clk", | ||
104 | .pmc_mask = 1 << AT91CAP9_ID_SPI0, | ||
105 | .type = CLK_TYPE_PERIPHERAL, | ||
106 | }; | ||
107 | static struct clk spi1_clk = { | ||
108 | .name = "spi1_clk", | ||
109 | .pmc_mask = 1 << AT91CAP9_ID_SPI1, | ||
110 | .type = CLK_TYPE_PERIPHERAL, | ||
111 | }; | ||
112 | static struct clk ssc0_clk = { | ||
113 | .name = "ssc0_clk", | ||
114 | .pmc_mask = 1 << AT91CAP9_ID_SSC0, | ||
115 | .type = CLK_TYPE_PERIPHERAL, | ||
116 | }; | ||
117 | static struct clk ssc1_clk = { | ||
118 | .name = "ssc1_clk", | ||
119 | .pmc_mask = 1 << AT91CAP9_ID_SSC1, | ||
120 | .type = CLK_TYPE_PERIPHERAL, | ||
121 | }; | ||
122 | static struct clk ac97_clk = { | ||
123 | .name = "ac97_clk", | ||
124 | .pmc_mask = 1 << AT91CAP9_ID_AC97C, | ||
125 | .type = CLK_TYPE_PERIPHERAL, | ||
126 | }; | ||
127 | static struct clk tcb_clk = { | ||
128 | .name = "tcb_clk", | ||
129 | .pmc_mask = 1 << AT91CAP9_ID_TCB, | ||
130 | .type = CLK_TYPE_PERIPHERAL, | ||
131 | }; | ||
132 | static struct clk pwm_clk = { | ||
133 | .name = "pwm_clk", | ||
134 | .pmc_mask = 1 << AT91CAP9_ID_PWMC, | ||
135 | .type = CLK_TYPE_PERIPHERAL, | ||
136 | }; | ||
137 | static struct clk macb_clk = { | ||
138 | .name = "pclk", | ||
139 | .pmc_mask = 1 << AT91CAP9_ID_EMAC, | ||
140 | .type = CLK_TYPE_PERIPHERAL, | ||
141 | }; | ||
142 | static struct clk aestdes_clk = { | ||
143 | .name = "aestdes_clk", | ||
144 | .pmc_mask = 1 << AT91CAP9_ID_AESTDES, | ||
145 | .type = CLK_TYPE_PERIPHERAL, | ||
146 | }; | ||
147 | static struct clk adc_clk = { | ||
148 | .name = "adc_clk", | ||
149 | .pmc_mask = 1 << AT91CAP9_ID_ADC, | ||
150 | .type = CLK_TYPE_PERIPHERAL, | ||
151 | }; | ||
152 | static struct clk isi_clk = { | ||
153 | .name = "isi_clk", | ||
154 | .pmc_mask = 1 << AT91CAP9_ID_ISI, | ||
155 | .type = CLK_TYPE_PERIPHERAL, | ||
156 | }; | ||
157 | static struct clk lcdc_clk = { | ||
158 | .name = "lcdc_clk", | ||
159 | .pmc_mask = 1 << AT91CAP9_ID_LCDC, | ||
160 | .type = CLK_TYPE_PERIPHERAL, | ||
161 | }; | ||
162 | static struct clk dma_clk = { | ||
163 | .name = "dma_clk", | ||
164 | .pmc_mask = 1 << AT91CAP9_ID_DMA, | ||
165 | .type = CLK_TYPE_PERIPHERAL, | ||
166 | }; | ||
167 | static struct clk udphs_clk = { | ||
168 | .name = "udphs_clk", | ||
169 | .pmc_mask = 1 << AT91CAP9_ID_UDPHS, | ||
170 | .type = CLK_TYPE_PERIPHERAL, | ||
171 | }; | ||
172 | static struct clk ohci_clk = { | ||
173 | .name = "ohci_clk", | ||
174 | .pmc_mask = 1 << AT91CAP9_ID_UHP, | ||
175 | .type = CLK_TYPE_PERIPHERAL, | ||
176 | }; | ||
177 | |||
178 | static struct clk *periph_clocks[] __initdata = { | ||
179 | &pioABCD_clk, | ||
180 | &mpb0_clk, | ||
181 | &mpb1_clk, | ||
182 | &mpb2_clk, | ||
183 | &mpb3_clk, | ||
184 | &mpb4_clk, | ||
185 | &usart0_clk, | ||
186 | &usart1_clk, | ||
187 | &usart2_clk, | ||
188 | &mmc0_clk, | ||
189 | &mmc1_clk, | ||
190 | &can_clk, | ||
191 | &twi_clk, | ||
192 | &spi0_clk, | ||
193 | &spi1_clk, | ||
194 | &ssc0_clk, | ||
195 | &ssc1_clk, | ||
196 | &ac97_clk, | ||
197 | &tcb_clk, | ||
198 | &pwm_clk, | ||
199 | &macb_clk, | ||
200 | &aestdes_clk, | ||
201 | &adc_clk, | ||
202 | &isi_clk, | ||
203 | &lcdc_clk, | ||
204 | &dma_clk, | ||
205 | &udphs_clk, | ||
206 | &ohci_clk, | ||
207 | // irq0 .. irq1 | ||
208 | }; | ||
209 | |||
210 | static struct clk_lookup periph_clocks_lookups[] = { | ||
211 | /* One additional fake clock for macb_hclk */ | ||
212 | CLKDEV_CON_ID("hclk", &macb_clk), | ||
213 | CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk), | ||
214 | CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk), | ||
215 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), | ||
216 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk), | ||
217 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), | ||
218 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), | ||
219 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), | ||
220 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), | ||
221 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), | ||
222 | /* fake hclk clock */ | ||
223 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), | ||
224 | CLKDEV_CON_ID("pioA", &pioABCD_clk), | ||
225 | CLKDEV_CON_ID("pioB", &pioABCD_clk), | ||
226 | CLKDEV_CON_ID("pioC", &pioABCD_clk), | ||
227 | CLKDEV_CON_ID("pioD", &pioABCD_clk), | ||
228 | }; | ||
229 | |||
230 | static struct clk_lookup usart_clocks_lookups[] = { | ||
231 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck), | ||
232 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk), | ||
233 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk), | ||
234 | CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk), | ||
235 | }; | ||
236 | |||
237 | /* | ||
238 | * The four programmable clocks. | ||
239 | * You must configure pin multiplexing to bring these signals out. | ||
240 | */ | ||
241 | static struct clk pck0 = { | ||
242 | .name = "pck0", | ||
243 | .pmc_mask = AT91_PMC_PCK0, | ||
244 | .type = CLK_TYPE_PROGRAMMABLE, | ||
245 | .id = 0, | ||
246 | }; | ||
247 | static struct clk pck1 = { | ||
248 | .name = "pck1", | ||
249 | .pmc_mask = AT91_PMC_PCK1, | ||
250 | .type = CLK_TYPE_PROGRAMMABLE, | ||
251 | .id = 1, | ||
252 | }; | ||
253 | static struct clk pck2 = { | ||
254 | .name = "pck2", | ||
255 | .pmc_mask = AT91_PMC_PCK2, | ||
256 | .type = CLK_TYPE_PROGRAMMABLE, | ||
257 | .id = 2, | ||
258 | }; | ||
259 | static struct clk pck3 = { | ||
260 | .name = "pck3", | ||
261 | .pmc_mask = AT91_PMC_PCK3, | ||
262 | .type = CLK_TYPE_PROGRAMMABLE, | ||
263 | .id = 3, | ||
264 | }; | ||
265 | |||
266 | static void __init at91cap9_register_clocks(void) | ||
267 | { | ||
268 | int i; | ||
269 | |||
270 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) | ||
271 | clk_register(periph_clocks[i]); | ||
272 | |||
273 | clkdev_add_table(periph_clocks_lookups, | ||
274 | ARRAY_SIZE(periph_clocks_lookups)); | ||
275 | clkdev_add_table(usart_clocks_lookups, | ||
276 | ARRAY_SIZE(usart_clocks_lookups)); | ||
277 | |||
278 | clk_register(&pck0); | ||
279 | clk_register(&pck1); | ||
280 | clk_register(&pck2); | ||
281 | clk_register(&pck3); | ||
282 | } | ||
283 | |||
284 | static struct clk_lookup console_clock_lookup; | ||
285 | |||
286 | void __init at91cap9_set_console_clock(int id) | ||
287 | { | ||
288 | if (id >= ARRAY_SIZE(usart_clocks_lookups)) | ||
289 | return; | ||
290 | |||
291 | console_clock_lookup.con_id = "usart"; | ||
292 | console_clock_lookup.clk = usart_clocks_lookups[id].clk; | ||
293 | clkdev_add(&console_clock_lookup); | ||
294 | } | ||
295 | |||
296 | /* -------------------------------------------------------------------- | ||
297 | * GPIO | ||
298 | * -------------------------------------------------------------------- */ | ||
299 | |||
300 | static struct at91_gpio_bank at91cap9_gpio[] __initdata = { | ||
301 | { | ||
302 | .id = AT91CAP9_ID_PIOABCD, | ||
303 | .regbase = AT91CAP9_BASE_PIOA, | ||
304 | }, { | ||
305 | .id = AT91CAP9_ID_PIOABCD, | ||
306 | .regbase = AT91CAP9_BASE_PIOB, | ||
307 | }, { | ||
308 | .id = AT91CAP9_ID_PIOABCD, | ||
309 | .regbase = AT91CAP9_BASE_PIOC, | ||
310 | }, { | ||
311 | .id = AT91CAP9_ID_PIOABCD, | ||
312 | .regbase = AT91CAP9_BASE_PIOD, | ||
313 | } | ||
314 | }; | ||
315 | |||
316 | /* -------------------------------------------------------------------- | ||
317 | * AT91CAP9 processor initialization | ||
318 | * -------------------------------------------------------------------- */ | ||
319 | |||
320 | static void __init at91cap9_map_io(void) | ||
321 | { | ||
322 | at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE); | ||
323 | } | ||
324 | |||
325 | static void __init at91cap9_ioremap_registers(void) | ||
326 | { | ||
327 | at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC); | ||
328 | at91_ioremap_rstc(AT91CAP9_BASE_RSTC); | ||
329 | at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT); | ||
330 | at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC); | ||
331 | } | ||
332 | |||
333 | static void __init at91cap9_initialize(void) | ||
334 | { | ||
335 | arm_pm_restart = at91sam9g45_restart; | ||
336 | at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); | ||
337 | |||
338 | /* Register GPIO subsystem */ | ||
339 | at91_gpio_init(at91cap9_gpio, 4); | ||
340 | |||
341 | /* Remember the silicon revision */ | ||
342 | if (cpu_is_at91cap9_revB()) | ||
343 | system_rev = 0xB; | ||
344 | else if (cpu_is_at91cap9_revC()) | ||
345 | system_rev = 0xC; | ||
346 | } | ||
347 | |||
348 | /* -------------------------------------------------------------------- | ||
349 | * Interrupt initialization | ||
350 | * -------------------------------------------------------------------- */ | ||
351 | |||
352 | /* | ||
353 | * The default interrupt priority levels (0 = lowest, 7 = highest). | ||
354 | */ | ||
355 | static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = { | ||
356 | 7, /* Advanced Interrupt Controller (FIQ) */ | ||
357 | 7, /* System Peripherals */ | ||
358 | 1, /* Parallel IO Controller A, B, C and D */ | ||
359 | 0, /* MP Block Peripheral 0 */ | ||
360 | 0, /* MP Block Peripheral 1 */ | ||
361 | 0, /* MP Block Peripheral 2 */ | ||
362 | 0, /* MP Block Peripheral 3 */ | ||
363 | 0, /* MP Block Peripheral 4 */ | ||
364 | 5, /* USART 0 */ | ||
365 | 5, /* USART 1 */ | ||
366 | 5, /* USART 2 */ | ||
367 | 0, /* Multimedia Card Interface 0 */ | ||
368 | 0, /* Multimedia Card Interface 1 */ | ||
369 | 3, /* CAN */ | ||
370 | 6, /* Two-Wire Interface */ | ||
371 | 5, /* Serial Peripheral Interface 0 */ | ||
372 | 5, /* Serial Peripheral Interface 1 */ | ||
373 | 4, /* Serial Synchronous Controller 0 */ | ||
374 | 4, /* Serial Synchronous Controller 1 */ | ||
375 | 5, /* AC97 Controller */ | ||
376 | 0, /* Timer Counter 0, 1 and 2 */ | ||
377 | 0, /* Pulse Width Modulation Controller */ | ||
378 | 3, /* Ethernet */ | ||
379 | 0, /* Advanced Encryption Standard, Triple DES*/ | ||
380 | 0, /* Analog-to-Digital Converter */ | ||
381 | 0, /* Image Sensor Interface */ | ||
382 | 3, /* LCD Controller */ | ||
383 | 0, /* DMA Controller */ | ||
384 | 2, /* USB Device Port */ | ||
385 | 2, /* USB Host port */ | ||
386 | 0, /* Advanced Interrupt Controller (IRQ0) */ | ||
387 | 0, /* Advanced Interrupt Controller (IRQ1) */ | ||
388 | }; | ||
389 | |||
390 | struct at91_init_soc __initdata at91cap9_soc = { | ||
391 | .map_io = at91cap9_map_io, | ||
392 | .default_irq_priority = at91cap9_default_irq_priority, | ||
393 | .ioremap_registers = at91cap9_ioremap_registers, | ||
394 | .register_clocks = at91cap9_register_clocks, | ||
395 | .init = at91cap9_initialize, | ||
396 | }; | ||
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c deleted file mode 100644 index d298fb7cb210..000000000000 --- a/arch/arm/mach-at91/at91cap9_devices.c +++ /dev/null | |||
@@ -1,1273 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-at91/at91cap9_devices.c | ||
3 | * | ||
4 | * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> | ||
5 | * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> | ||
6 | * Copyright (C) 2007 Atmel Corporation. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | */ | ||
14 | #include <asm/mach/arch.h> | ||
15 | #include <asm/mach/map.h> | ||
16 | #include <asm/mach/irq.h> | ||
17 | |||
18 | #include <linux/dma-mapping.h> | ||
19 | #include <linux/gpio.h> | ||
20 | #include <linux/platform_device.h> | ||
21 | #include <linux/i2c-gpio.h> | ||
22 | |||
23 | #include <video/atmel_lcdc.h> | ||
24 | |||
25 | #include <mach/board.h> | ||
26 | #include <mach/cpu.h> | ||
27 | #include <mach/at91cap9.h> | ||
28 | #include <mach/at91cap9_matrix.h> | ||
29 | #include <mach/at91sam9_smc.h> | ||
30 | |||
31 | #include "generic.h" | ||
32 | |||
33 | |||
34 | /* -------------------------------------------------------------------- | ||
35 | * USB Host | ||
36 | * -------------------------------------------------------------------- */ | ||
37 | |||
38 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | ||
39 | static u64 ohci_dmamask = DMA_BIT_MASK(32); | ||
40 | static struct at91_usbh_data usbh_data; | ||
41 | |||
42 | static struct resource usbh_resources[] = { | ||
43 | [0] = { | ||
44 | .start = AT91CAP9_UHP_BASE, | ||
45 | .end = AT91CAP9_UHP_BASE + SZ_1M - 1, | ||
46 | .flags = IORESOURCE_MEM, | ||
47 | }, | ||
48 | [1] = { | ||
49 | .start = AT91CAP9_ID_UHP, | ||
50 | .end = AT91CAP9_ID_UHP, | ||
51 | .flags = IORESOURCE_IRQ, | ||
52 | }, | ||
53 | }; | ||
54 | |||
55 | static struct platform_device at91_usbh_device = { | ||
56 | .name = "at91_ohci", | ||
57 | .id = -1, | ||
58 | .dev = { | ||
59 | .dma_mask = &ohci_dmamask, | ||
60 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
61 | .platform_data = &usbh_data, | ||
62 | }, | ||
63 | .resource = usbh_resources, | ||
64 | .num_resources = ARRAY_SIZE(usbh_resources), | ||
65 | }; | ||
66 | |||
67 | void __init at91_add_device_usbh(struct at91_usbh_data *data) | ||
68 | { | ||
69 | int i; | ||
70 | |||
71 | if (!data) | ||
72 | return; | ||
73 | |||
74 | if (cpu_is_at91cap9_revB()) | ||
75 | irq_set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH); | ||
76 | |||
77 | /* Enable VBus control for UHP ports */ | ||
78 | for (i = 0; i < data->ports; i++) { | ||
79 | if (gpio_is_valid(data->vbus_pin[i])) | ||
80 | at91_set_gpio_output(data->vbus_pin[i], 0); | ||
81 | } | ||
82 | |||
83 | /* Enable overcurrent notification */ | ||
84 | for (i = 0; i < data->ports; i++) { | ||
85 | if (data->overcurrent_pin[i]) | ||
86 | at91_set_gpio_input(data->overcurrent_pin[i], 1); | ||
87 | } | ||
88 | |||
89 | usbh_data = *data; | ||
90 | platform_device_register(&at91_usbh_device); | ||
91 | } | ||
92 | #else | ||
93 | void __init at91_add_device_usbh(struct at91_usbh_data *data) {} | ||
94 | #endif | ||
95 | |||
96 | |||
97 | /* -------------------------------------------------------------------- | ||
98 | * USB HS Device (Gadget) | ||
99 | * -------------------------------------------------------------------- */ | ||
100 | |||
101 | #if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE) | ||
102 | |||
103 | static struct resource usba_udc_resources[] = { | ||
104 | [0] = { | ||
105 | .start = AT91CAP9_UDPHS_FIFO, | ||
106 | .end = AT91CAP9_UDPHS_FIFO + SZ_512K - 1, | ||
107 | .flags = IORESOURCE_MEM, | ||
108 | }, | ||
109 | [1] = { | ||
110 | .start = AT91CAP9_BASE_UDPHS, | ||
111 | .end = AT91CAP9_BASE_UDPHS + SZ_1K - 1, | ||
112 | .flags = IORESOURCE_MEM, | ||
113 | }, | ||
114 | [2] = { | ||
115 | .start = AT91CAP9_ID_UDPHS, | ||
116 | .end = AT91CAP9_ID_UDPHS, | ||
117 | .flags = IORESOURCE_IRQ, | ||
118 | }, | ||
119 | }; | ||
120 | |||
121 | #define EP(nam, idx, maxpkt, maxbk, dma, isoc) \ | ||
122 | [idx] = { \ | ||
123 | .name = nam, \ | ||
124 | .index = idx, \ | ||
125 | .fifo_size = maxpkt, \ | ||
126 | .nr_banks = maxbk, \ | ||
127 | .can_dma = dma, \ | ||
128 | .can_isoc = isoc, \ | ||
129 | } | ||
130 | |||
131 | static struct usba_ep_data usba_udc_ep[] = { | ||
132 | EP("ep0", 0, 64, 1, 0, 0), | ||
133 | EP("ep1", 1, 1024, 3, 1, 1), | ||
134 | EP("ep2", 2, 1024, 3, 1, 1), | ||
135 | EP("ep3", 3, 1024, 2, 1, 1), | ||
136 | EP("ep4", 4, 1024, 2, 1, 1), | ||
137 | EP("ep5", 5, 1024, 2, 1, 0), | ||
138 | EP("ep6", 6, 1024, 2, 1, 0), | ||
139 | EP("ep7", 7, 1024, 2, 0, 0), | ||
140 | }; | ||
141 | |||
142 | #undef EP | ||
143 | |||
144 | /* | ||
145 | * pdata doesn't have room for any endpoints, so we need to | ||
146 | * append room for the ones we need right after it. | ||
147 | */ | ||
148 | static struct { | ||
149 | struct usba_platform_data pdata; | ||
150 | struct usba_ep_data ep[8]; | ||
151 | } usba_udc_data; | ||
152 | |||
153 | static struct platform_device at91_usba_udc_device = { | ||
154 | .name = "atmel_usba_udc", | ||
155 | .id = -1, | ||
156 | .dev = { | ||
157 | .platform_data = &usba_udc_data.pdata, | ||
158 | }, | ||
159 | .resource = usba_udc_resources, | ||
160 | .num_resources = ARRAY_SIZE(usba_udc_resources), | ||
161 | }; | ||
162 | |||
163 | void __init at91_add_device_usba(struct usba_platform_data *data) | ||
164 | { | ||
165 | if (cpu_is_at91cap9_revB()) { | ||
166 | irq_set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH); | ||
167 | at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS | | ||
168 | AT91_MATRIX_UDPHS_BYPASS_LOCK); | ||
169 | } | ||
170 | else | ||
171 | at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS); | ||
172 | |||
173 | /* | ||
174 | * Invalid pins are 0 on AT91, but the usba driver is shared | ||
175 | * with AVR32, which use negative values instead. Once/if | ||
176 | * gpio_is_valid() is ported to AT91, revisit this code. | ||
177 | */ | ||
178 | usba_udc_data.pdata.vbus_pin = -EINVAL; | ||
179 | usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); | ||
180 | memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); | ||
181 | |||
182 | if (data && gpio_is_valid(data->vbus_pin)) { | ||
183 | at91_set_gpio_input(data->vbus_pin, 0); | ||
184 | at91_set_deglitch(data->vbus_pin, 1); | ||
185 | usba_udc_data.pdata.vbus_pin = data->vbus_pin; | ||
186 | } | ||
187 | |||
188 | /* Pullup pin is handled internally by USB device peripheral */ | ||
189 | |||
190 | platform_device_register(&at91_usba_udc_device); | ||
191 | } | ||
192 | #else | ||
193 | void __init at91_add_device_usba(struct usba_platform_data *data) {} | ||
194 | #endif | ||
195 | |||
196 | |||
197 | /* -------------------------------------------------------------------- | ||
198 | * Ethernet | ||
199 | * -------------------------------------------------------------------- */ | ||
200 | |||
201 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) | ||
202 | static u64 eth_dmamask = DMA_BIT_MASK(32); | ||
203 | static struct macb_platform_data eth_data; | ||
204 | |||
205 | static struct resource eth_resources[] = { | ||
206 | [0] = { | ||
207 | .start = AT91CAP9_BASE_EMAC, | ||
208 | .end = AT91CAP9_BASE_EMAC + SZ_16K - 1, | ||
209 | .flags = IORESOURCE_MEM, | ||
210 | }, | ||
211 | [1] = { | ||
212 | .start = AT91CAP9_ID_EMAC, | ||
213 | .end = AT91CAP9_ID_EMAC, | ||
214 | .flags = IORESOURCE_IRQ, | ||
215 | }, | ||
216 | }; | ||
217 | |||
218 | static struct platform_device at91cap9_eth_device = { | ||
219 | .name = "macb", | ||
220 | .id = -1, | ||
221 | .dev = { | ||
222 | .dma_mask = ð_dmamask, | ||
223 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
224 | .platform_data = ð_data, | ||
225 | }, | ||
226 | .resource = eth_resources, | ||
227 | .num_resources = ARRAY_SIZE(eth_resources), | ||
228 | }; | ||
229 | |||
230 | void __init at91_add_device_eth(struct macb_platform_data *data) | ||
231 | { | ||
232 | if (!data) | ||
233 | return; | ||
234 | |||
235 | if (gpio_is_valid(data->phy_irq_pin)) { | ||
236 | at91_set_gpio_input(data->phy_irq_pin, 0); | ||
237 | at91_set_deglitch(data->phy_irq_pin, 1); | ||
238 | } | ||
239 | |||
240 | /* Pins used for MII and RMII */ | ||
241 | at91_set_A_periph(AT91_PIN_PB21, 0); /* ETXCK_EREFCK */ | ||
242 | at91_set_A_periph(AT91_PIN_PB22, 0); /* ERXDV */ | ||
243 | at91_set_A_periph(AT91_PIN_PB25, 0); /* ERX0 */ | ||
244 | at91_set_A_periph(AT91_PIN_PB26, 0); /* ERX1 */ | ||
245 | at91_set_A_periph(AT91_PIN_PB27, 0); /* ERXER */ | ||
246 | at91_set_A_periph(AT91_PIN_PB28, 0); /* ETXEN */ | ||
247 | at91_set_A_periph(AT91_PIN_PB23, 0); /* ETX0 */ | ||
248 | at91_set_A_periph(AT91_PIN_PB24, 0); /* ETX1 */ | ||
249 | at91_set_A_periph(AT91_PIN_PB30, 0); /* EMDIO */ | ||
250 | at91_set_A_periph(AT91_PIN_PB29, 0); /* EMDC */ | ||
251 | |||
252 | if (!data->is_rmii) { | ||
253 | at91_set_B_periph(AT91_PIN_PC25, 0); /* ECRS */ | ||
254 | at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */ | ||
255 | at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */ | ||
256 | at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */ | ||
257 | at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */ | ||
258 | at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */ | ||
259 | at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */ | ||
260 | at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */ | ||
261 | } | ||
262 | |||
263 | eth_data = *data; | ||
264 | platform_device_register(&at91cap9_eth_device); | ||
265 | } | ||
266 | #else | ||
267 | void __init at91_add_device_eth(struct macb_platform_data *data) {} | ||
268 | #endif | ||
269 | |||
270 | |||
271 | /* -------------------------------------------------------------------- | ||
272 | * MMC / SD | ||
273 | * -------------------------------------------------------------------- */ | ||
274 | |||
275 | #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) | ||
276 | static u64 mmc_dmamask = DMA_BIT_MASK(32); | ||
277 | static struct at91_mmc_data mmc0_data, mmc1_data; | ||
278 | |||
279 | static struct resource mmc0_resources[] = { | ||
280 | [0] = { | ||
281 | .start = AT91CAP9_BASE_MCI0, | ||
282 | .end = AT91CAP9_BASE_MCI0 + SZ_16K - 1, | ||
283 | .flags = IORESOURCE_MEM, | ||
284 | }, | ||
285 | [1] = { | ||
286 | .start = AT91CAP9_ID_MCI0, | ||
287 | .end = AT91CAP9_ID_MCI0, | ||
288 | .flags = IORESOURCE_IRQ, | ||
289 | }, | ||
290 | }; | ||
291 | |||
292 | static struct platform_device at91cap9_mmc0_device = { | ||
293 | .name = "at91_mci", | ||
294 | .id = 0, | ||
295 | .dev = { | ||
296 | .dma_mask = &mmc_dmamask, | ||
297 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
298 | .platform_data = &mmc0_data, | ||
299 | }, | ||
300 | .resource = mmc0_resources, | ||
301 | .num_resources = ARRAY_SIZE(mmc0_resources), | ||
302 | }; | ||
303 | |||
304 | static struct resource mmc1_resources[] = { | ||
305 | [0] = { | ||
306 | .start = AT91CAP9_BASE_MCI1, | ||
307 | .end = AT91CAP9_BASE_MCI1 + SZ_16K - 1, | ||
308 | .flags = IORESOURCE_MEM, | ||
309 | }, | ||
310 | [1] = { | ||
311 | .start = AT91CAP9_ID_MCI1, | ||
312 | .end = AT91CAP9_ID_MCI1, | ||
313 | .flags = IORESOURCE_IRQ, | ||
314 | }, | ||
315 | }; | ||
316 | |||
317 | static struct platform_device at91cap9_mmc1_device = { | ||
318 | .name = "at91_mci", | ||
319 | .id = 1, | ||
320 | .dev = { | ||
321 | .dma_mask = &mmc_dmamask, | ||
322 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
323 | .platform_data = &mmc1_data, | ||
324 | }, | ||
325 | .resource = mmc1_resources, | ||
326 | .num_resources = ARRAY_SIZE(mmc1_resources), | ||
327 | }; | ||
328 | |||
329 | void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | ||
330 | { | ||
331 | if (!data) | ||
332 | return; | ||
333 | |||
334 | /* input/irq */ | ||
335 | if (gpio_is_valid(data->det_pin)) { | ||
336 | at91_set_gpio_input(data->det_pin, 1); | ||
337 | at91_set_deglitch(data->det_pin, 1); | ||
338 | } | ||
339 | if (gpio_is_valid(data->wp_pin)) | ||
340 | at91_set_gpio_input(data->wp_pin, 1); | ||
341 | if (gpio_is_valid(data->vcc_pin)) | ||
342 | at91_set_gpio_output(data->vcc_pin, 0); | ||
343 | |||
344 | if (mmc_id == 0) { /* MCI0 */ | ||
345 | /* CLK */ | ||
346 | at91_set_A_periph(AT91_PIN_PA2, 0); | ||
347 | |||
348 | /* CMD */ | ||
349 | at91_set_A_periph(AT91_PIN_PA1, 1); | ||
350 | |||
351 | /* DAT0, maybe DAT1..DAT3 */ | ||
352 | at91_set_A_periph(AT91_PIN_PA0, 1); | ||
353 | if (data->wire4) { | ||
354 | at91_set_A_periph(AT91_PIN_PA3, 1); | ||
355 | at91_set_A_periph(AT91_PIN_PA4, 1); | ||
356 | at91_set_A_periph(AT91_PIN_PA5, 1); | ||
357 | } | ||
358 | |||
359 | mmc0_data = *data; | ||
360 | platform_device_register(&at91cap9_mmc0_device); | ||
361 | } else { /* MCI1 */ | ||
362 | /* CLK */ | ||
363 | at91_set_A_periph(AT91_PIN_PA16, 0); | ||
364 | |||
365 | /* CMD */ | ||
366 | at91_set_A_periph(AT91_PIN_PA17, 1); | ||
367 | |||
368 | /* DAT0, maybe DAT1..DAT3 */ | ||
369 | at91_set_A_periph(AT91_PIN_PA18, 1); | ||
370 | if (data->wire4) { | ||
371 | at91_set_A_periph(AT91_PIN_PA19, 1); | ||
372 | at91_set_A_periph(AT91_PIN_PA20, 1); | ||
373 | at91_set_A_periph(AT91_PIN_PA21, 1); | ||
374 | } | ||
375 | |||
376 | mmc1_data = *data; | ||
377 | platform_device_register(&at91cap9_mmc1_device); | ||
378 | } | ||
379 | } | ||
380 | #else | ||
381 | void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} | ||
382 | #endif | ||
383 | |||
384 | |||
385 | /* -------------------------------------------------------------------- | ||
386 | * NAND / SmartMedia | ||
387 | * -------------------------------------------------------------------- */ | ||
388 | |||
389 | #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE) | ||
390 | static struct atmel_nand_data nand_data; | ||
391 | |||
392 | #define NAND_BASE AT91_CHIPSELECT_3 | ||
393 | |||
394 | static struct resource nand_resources[] = { | ||
395 | [0] = { | ||
396 | .start = NAND_BASE, | ||
397 | .end = NAND_BASE + SZ_256M - 1, | ||
398 | .flags = IORESOURCE_MEM, | ||
399 | }, | ||
400 | [1] = { | ||
401 | .start = AT91CAP9_BASE_ECC, | ||
402 | .end = AT91CAP9_BASE_ECC + SZ_512 - 1, | ||
403 | .flags = IORESOURCE_MEM, | ||
404 | } | ||
405 | }; | ||
406 | |||
407 | static struct platform_device at91cap9_nand_device = { | ||
408 | .name = "atmel_nand", | ||
409 | .id = -1, | ||
410 | .dev = { | ||
411 | .platform_data = &nand_data, | ||
412 | }, | ||
413 | .resource = nand_resources, | ||
414 | .num_resources = ARRAY_SIZE(nand_resources), | ||
415 | }; | ||
416 | |||
417 | void __init at91_add_device_nand(struct atmel_nand_data *data) | ||
418 | { | ||
419 | unsigned long csa; | ||
420 | |||
421 | if (!data) | ||
422 | return; | ||
423 | |||
424 | csa = at91_sys_read(AT91_MATRIX_EBICSA); | ||
425 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); | ||
426 | |||
427 | /* enable pin */ | ||
428 | if (gpio_is_valid(data->enable_pin)) | ||
429 | at91_set_gpio_output(data->enable_pin, 1); | ||
430 | |||
431 | /* ready/busy pin */ | ||
432 | if (gpio_is_valid(data->rdy_pin)) | ||
433 | at91_set_gpio_input(data->rdy_pin, 1); | ||
434 | |||
435 | /* card detect pin */ | ||
436 | if (gpio_is_valid(data->det_pin)) | ||
437 | at91_set_gpio_input(data->det_pin, 1); | ||
438 | |||
439 | nand_data = *data; | ||
440 | platform_device_register(&at91cap9_nand_device); | ||
441 | } | ||
442 | #else | ||
443 | void __init at91_add_device_nand(struct atmel_nand_data *data) {} | ||
444 | #endif | ||
445 | |||
446 | |||
447 | /* -------------------------------------------------------------------- | ||
448 | * TWI (i2c) | ||
449 | * -------------------------------------------------------------------- */ | ||
450 | |||
451 | /* | ||
452 | * Prefer the GPIO code since the TWI controller isn't robust | ||
453 | * (gets overruns and underruns under load) and can only issue | ||
454 | * repeated STARTs in one scenario (the driver doesn't yet handle them). | ||
455 | */ | ||
456 | #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) | ||
457 | |||
458 | static struct i2c_gpio_platform_data pdata = { | ||
459 | .sda_pin = AT91_PIN_PB4, | ||
460 | .sda_is_open_drain = 1, | ||
461 | .scl_pin = AT91_PIN_PB5, | ||
462 | .scl_is_open_drain = 1, | ||
463 | .udelay = 2, /* ~100 kHz */ | ||
464 | }; | ||
465 | |||
466 | static struct platform_device at91cap9_twi_device = { | ||
467 | .name = "i2c-gpio", | ||
468 | .id = -1, | ||
469 | .dev.platform_data = &pdata, | ||
470 | }; | ||
471 | |||
472 | void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) | ||
473 | { | ||
474 | at91_set_GPIO_periph(AT91_PIN_PB4, 1); /* TWD (SDA) */ | ||
475 | at91_set_multi_drive(AT91_PIN_PB4, 1); | ||
476 | |||
477 | at91_set_GPIO_periph(AT91_PIN_PB5, 1); /* TWCK (SCL) */ | ||
478 | at91_set_multi_drive(AT91_PIN_PB5, 1); | ||
479 | |||
480 | i2c_register_board_info(0, devices, nr_devices); | ||
481 | platform_device_register(&at91cap9_twi_device); | ||
482 | } | ||
483 | |||
484 | #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE) | ||
485 | |||
486 | static struct resource twi_resources[] = { | ||
487 | [0] = { | ||
488 | .start = AT91CAP9_BASE_TWI, | ||
489 | .end = AT91CAP9_BASE_TWI + SZ_16K - 1, | ||
490 | .flags = IORESOURCE_MEM, | ||
491 | }, | ||
492 | [1] = { | ||
493 | .start = AT91CAP9_ID_TWI, | ||
494 | .end = AT91CAP9_ID_TWI, | ||
495 | .flags = IORESOURCE_IRQ, | ||
496 | }, | ||
497 | }; | ||
498 | |||
499 | static struct platform_device at91cap9_twi_device = { | ||
500 | .name = "at91_i2c", | ||
501 | .id = -1, | ||
502 | .resource = twi_resources, | ||
503 | .num_resources = ARRAY_SIZE(twi_resources), | ||
504 | }; | ||
505 | |||
506 | void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) | ||
507 | { | ||
508 | /* pins used for TWI interface */ | ||
509 | at91_set_B_periph(AT91_PIN_PB4, 0); /* TWD */ | ||
510 | at91_set_multi_drive(AT91_PIN_PB4, 1); | ||
511 | |||
512 | at91_set_B_periph(AT91_PIN_PB5, 0); /* TWCK */ | ||
513 | at91_set_multi_drive(AT91_PIN_PB5, 1); | ||
514 | |||
515 | i2c_register_board_info(0, devices, nr_devices); | ||
516 | platform_device_register(&at91cap9_twi_device); | ||
517 | } | ||
518 | #else | ||
519 | void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {} | ||
520 | #endif | ||
521 | |||
522 | /* -------------------------------------------------------------------- | ||
523 | * SPI | ||
524 | * -------------------------------------------------------------------- */ | ||
525 | |||
526 | #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) | ||
527 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
528 | |||
529 | static struct resource spi0_resources[] = { | ||
530 | [0] = { | ||
531 | .start = AT91CAP9_BASE_SPI0, | ||
532 | .end = AT91CAP9_BASE_SPI0 + SZ_16K - 1, | ||
533 | .flags = IORESOURCE_MEM, | ||
534 | }, | ||
535 | [1] = { | ||
536 | .start = AT91CAP9_ID_SPI0, | ||
537 | .end = AT91CAP9_ID_SPI0, | ||
538 | .flags = IORESOURCE_IRQ, | ||
539 | }, | ||
540 | }; | ||
541 | |||
542 | static struct platform_device at91cap9_spi0_device = { | ||
543 | .name = "atmel_spi", | ||
544 | .id = 0, | ||
545 | .dev = { | ||
546 | .dma_mask = &spi_dmamask, | ||
547 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
548 | }, | ||
549 | .resource = spi0_resources, | ||
550 | .num_resources = ARRAY_SIZE(spi0_resources), | ||
551 | }; | ||
552 | |||
553 | static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PD0, AT91_PIN_PD1 }; | ||
554 | |||
555 | static struct resource spi1_resources[] = { | ||
556 | [0] = { | ||
557 | .start = AT91CAP9_BASE_SPI1, | ||
558 | .end = AT91CAP9_BASE_SPI1 + SZ_16K - 1, | ||
559 | .flags = IORESOURCE_MEM, | ||
560 | }, | ||
561 | [1] = { | ||
562 | .start = AT91CAP9_ID_SPI1, | ||
563 | .end = AT91CAP9_ID_SPI1, | ||
564 | .flags = IORESOURCE_IRQ, | ||
565 | }, | ||
566 | }; | ||
567 | |||
568 | static struct platform_device at91cap9_spi1_device = { | ||
569 | .name = "atmel_spi", | ||
570 | .id = 1, | ||
571 | .dev = { | ||
572 | .dma_mask = &spi_dmamask, | ||
573 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
574 | }, | ||
575 | .resource = spi1_resources, | ||
576 | .num_resources = ARRAY_SIZE(spi1_resources), | ||
577 | }; | ||
578 | |||
579 | static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 }; | ||
580 | |||
581 | void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | ||
582 | { | ||
583 | int i; | ||
584 | unsigned long cs_pin; | ||
585 | short enable_spi0 = 0; | ||
586 | short enable_spi1 = 0; | ||
587 | |||
588 | /* Choose SPI chip-selects */ | ||
589 | for (i = 0; i < nr_devices; i++) { | ||
590 | if (devices[i].controller_data) | ||
591 | cs_pin = (unsigned long) devices[i].controller_data; | ||
592 | else if (devices[i].bus_num == 0) | ||
593 | cs_pin = spi0_standard_cs[devices[i].chip_select]; | ||
594 | else | ||
595 | cs_pin = spi1_standard_cs[devices[i].chip_select]; | ||
596 | |||
597 | if (devices[i].bus_num == 0) | ||
598 | enable_spi0 = 1; | ||
599 | else | ||
600 | enable_spi1 = 1; | ||
601 | |||
602 | /* enable chip-select pin */ | ||
603 | at91_set_gpio_output(cs_pin, 1); | ||
604 | |||
605 | /* pass chip-select pin to driver */ | ||
606 | devices[i].controller_data = (void *) cs_pin; | ||
607 | } | ||
608 | |||
609 | spi_register_board_info(devices, nr_devices); | ||
610 | |||
611 | /* Configure SPI bus(es) */ | ||
612 | if (enable_spi0) { | ||
613 | at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ | ||
614 | at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ | ||
615 | at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ | ||
616 | |||
617 | platform_device_register(&at91cap9_spi0_device); | ||
618 | } | ||
619 | if (enable_spi1) { | ||
620 | at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */ | ||
621 | at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */ | ||
622 | at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */ | ||
623 | |||
624 | platform_device_register(&at91cap9_spi1_device); | ||
625 | } | ||
626 | } | ||
627 | #else | ||
628 | void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {} | ||
629 | #endif | ||
630 | |||
631 | |||
632 | /* -------------------------------------------------------------------- | ||
633 | * Timer/Counter block | ||
634 | * -------------------------------------------------------------------- */ | ||
635 | |||
636 | #ifdef CONFIG_ATMEL_TCLIB | ||
637 | |||
638 | static struct resource tcb_resources[] = { | ||
639 | [0] = { | ||
640 | .start = AT91CAP9_BASE_TCB0, | ||
641 | .end = AT91CAP9_BASE_TCB0 + SZ_16K - 1, | ||
642 | .flags = IORESOURCE_MEM, | ||
643 | }, | ||
644 | [1] = { | ||
645 | .start = AT91CAP9_ID_TCB, | ||
646 | .end = AT91CAP9_ID_TCB, | ||
647 | .flags = IORESOURCE_IRQ, | ||
648 | }, | ||
649 | }; | ||
650 | |||
651 | static struct platform_device at91cap9_tcb_device = { | ||
652 | .name = "atmel_tcb", | ||
653 | .id = 0, | ||
654 | .resource = tcb_resources, | ||
655 | .num_resources = ARRAY_SIZE(tcb_resources), | ||
656 | }; | ||
657 | |||
658 | static void __init at91_add_device_tc(void) | ||
659 | { | ||
660 | platform_device_register(&at91cap9_tcb_device); | ||
661 | } | ||
662 | #else | ||
663 | static void __init at91_add_device_tc(void) { } | ||
664 | #endif | ||
665 | |||
666 | |||
667 | /* -------------------------------------------------------------------- | ||
668 | * RTT | ||
669 | * -------------------------------------------------------------------- */ | ||
670 | |||
671 | static struct resource rtt_resources[] = { | ||
672 | { | ||
673 | .start = AT91CAP9_BASE_RTT, | ||
674 | .end = AT91CAP9_BASE_RTT + SZ_16 - 1, | ||
675 | .flags = IORESOURCE_MEM, | ||
676 | } | ||
677 | }; | ||
678 | |||
679 | static struct platform_device at91cap9_rtt_device = { | ||
680 | .name = "at91_rtt", | ||
681 | .id = 0, | ||
682 | .resource = rtt_resources, | ||
683 | .num_resources = ARRAY_SIZE(rtt_resources), | ||
684 | }; | ||
685 | |||
686 | static void __init at91_add_device_rtt(void) | ||
687 | { | ||
688 | platform_device_register(&at91cap9_rtt_device); | ||
689 | } | ||
690 | |||
691 | |||
692 | /* -------------------------------------------------------------------- | ||
693 | * Watchdog | ||
694 | * -------------------------------------------------------------------- */ | ||
695 | |||
696 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) | ||
697 | static struct resource wdt_resources[] = { | ||
698 | { | ||
699 | .start = AT91CAP9_BASE_WDT, | ||
700 | .end = AT91CAP9_BASE_WDT + SZ_16 - 1, | ||
701 | .flags = IORESOURCE_MEM, | ||
702 | } | ||
703 | }; | ||
704 | |||
705 | static struct platform_device at91cap9_wdt_device = { | ||
706 | .name = "at91_wdt", | ||
707 | .id = -1, | ||
708 | .resource = wdt_resources, | ||
709 | .num_resources = ARRAY_SIZE(wdt_resources), | ||
710 | }; | ||
711 | |||
712 | static void __init at91_add_device_watchdog(void) | ||
713 | { | ||
714 | platform_device_register(&at91cap9_wdt_device); | ||
715 | } | ||
716 | #else | ||
717 | static void __init at91_add_device_watchdog(void) {} | ||
718 | #endif | ||
719 | |||
720 | |||
721 | /* -------------------------------------------------------------------- | ||
722 | * PWM | ||
723 | * --------------------------------------------------------------------*/ | ||
724 | |||
725 | #if defined(CONFIG_ATMEL_PWM) | ||
726 | static u32 pwm_mask; | ||
727 | |||
728 | static struct resource pwm_resources[] = { | ||
729 | [0] = { | ||
730 | .start = AT91CAP9_BASE_PWMC, | ||
731 | .end = AT91CAP9_BASE_PWMC + SZ_16K - 1, | ||
732 | .flags = IORESOURCE_MEM, | ||
733 | }, | ||
734 | [1] = { | ||
735 | .start = AT91CAP9_ID_PWMC, | ||
736 | .end = AT91CAP9_ID_PWMC, | ||
737 | .flags = IORESOURCE_IRQ, | ||
738 | }, | ||
739 | }; | ||
740 | |||
741 | static struct platform_device at91cap9_pwm0_device = { | ||
742 | .name = "atmel_pwm", | ||
743 | .id = -1, | ||
744 | .dev = { | ||
745 | .platform_data = &pwm_mask, | ||
746 | }, | ||
747 | .resource = pwm_resources, | ||
748 | .num_resources = ARRAY_SIZE(pwm_resources), | ||
749 | }; | ||
750 | |||
751 | void __init at91_add_device_pwm(u32 mask) | ||
752 | { | ||
753 | if (mask & (1 << AT91_PWM0)) | ||
754 | at91_set_A_periph(AT91_PIN_PB19, 1); /* enable PWM0 */ | ||
755 | |||
756 | if (mask & (1 << AT91_PWM1)) | ||
757 | at91_set_B_periph(AT91_PIN_PB8, 1); /* enable PWM1 */ | ||
758 | |||
759 | if (mask & (1 << AT91_PWM2)) | ||
760 | at91_set_B_periph(AT91_PIN_PC29, 1); /* enable PWM2 */ | ||
761 | |||
762 | if (mask & (1 << AT91_PWM3)) | ||
763 | at91_set_B_periph(AT91_PIN_PA11, 1); /* enable PWM3 */ | ||
764 | |||
765 | pwm_mask = mask; | ||
766 | |||
767 | platform_device_register(&at91cap9_pwm0_device); | ||
768 | } | ||
769 | #else | ||
770 | void __init at91_add_device_pwm(u32 mask) {} | ||
771 | #endif | ||
772 | |||
773 | |||
774 | |||
775 | /* -------------------------------------------------------------------- | ||
776 | * AC97 | ||
777 | * -------------------------------------------------------------------- */ | ||
778 | |||
779 | #if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE) | ||
780 | static u64 ac97_dmamask = DMA_BIT_MASK(32); | ||
781 | static struct ac97c_platform_data ac97_data; | ||
782 | |||
783 | static struct resource ac97_resources[] = { | ||
784 | [0] = { | ||
785 | .start = AT91CAP9_BASE_AC97C, | ||
786 | .end = AT91CAP9_BASE_AC97C + SZ_16K - 1, | ||
787 | .flags = IORESOURCE_MEM, | ||
788 | }, | ||
789 | [1] = { | ||
790 | .start = AT91CAP9_ID_AC97C, | ||
791 | .end = AT91CAP9_ID_AC97C, | ||
792 | .flags = IORESOURCE_IRQ, | ||
793 | }, | ||
794 | }; | ||
795 | |||
796 | static struct platform_device at91cap9_ac97_device = { | ||
797 | .name = "atmel_ac97c", | ||
798 | .id = 1, | ||
799 | .dev = { | ||
800 | .dma_mask = &ac97_dmamask, | ||
801 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
802 | .platform_data = &ac97_data, | ||
803 | }, | ||
804 | .resource = ac97_resources, | ||
805 | .num_resources = ARRAY_SIZE(ac97_resources), | ||
806 | }; | ||
807 | |||
808 | void __init at91_add_device_ac97(struct ac97c_platform_data *data) | ||
809 | { | ||
810 | if (!data) | ||
811 | return; | ||
812 | |||
813 | at91_set_A_periph(AT91_PIN_PA6, 0); /* AC97FS */ | ||
814 | at91_set_A_periph(AT91_PIN_PA7, 0); /* AC97CK */ | ||
815 | at91_set_A_periph(AT91_PIN_PA8, 0); /* AC97TX */ | ||
816 | at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */ | ||
817 | |||
818 | /* reset */ | ||
819 | if (gpio_is_valid(data->reset_pin)) | ||
820 | at91_set_gpio_output(data->reset_pin, 0); | ||
821 | |||
822 | ac97_data = *data; | ||
823 | platform_device_register(&at91cap9_ac97_device); | ||
824 | } | ||
825 | #else | ||
826 | void __init at91_add_device_ac97(struct ac97c_platform_data *data) {} | ||
827 | #endif | ||
828 | |||
829 | |||
830 | /* -------------------------------------------------------------------- | ||
831 | * LCD Controller | ||
832 | * -------------------------------------------------------------------- */ | ||
833 | |||
834 | #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) | ||
835 | static u64 lcdc_dmamask = DMA_BIT_MASK(32); | ||
836 | static struct atmel_lcdfb_info lcdc_data; | ||
837 | |||
838 | static struct resource lcdc_resources[] = { | ||
839 | [0] = { | ||
840 | .start = AT91CAP9_LCDC_BASE, | ||
841 | .end = AT91CAP9_LCDC_BASE + SZ_4K - 1, | ||
842 | .flags = IORESOURCE_MEM, | ||
843 | }, | ||
844 | [1] = { | ||
845 | .start = AT91CAP9_ID_LCDC, | ||
846 | .end = AT91CAP9_ID_LCDC, | ||
847 | .flags = IORESOURCE_IRQ, | ||
848 | }, | ||
849 | }; | ||
850 | |||
851 | static struct platform_device at91_lcdc_device = { | ||
852 | .name = "atmel_lcdfb", | ||
853 | .id = 0, | ||
854 | .dev = { | ||
855 | .dma_mask = &lcdc_dmamask, | ||
856 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
857 | .platform_data = &lcdc_data, | ||
858 | }, | ||
859 | .resource = lcdc_resources, | ||
860 | .num_resources = ARRAY_SIZE(lcdc_resources), | ||
861 | }; | ||
862 | |||
863 | void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) | ||
864 | { | ||
865 | if (!data) | ||
866 | return; | ||
867 | |||
868 | if (cpu_is_at91cap9_revB()) | ||
869 | irq_set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH); | ||
870 | |||
871 | at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ | ||
872 | at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ | ||
873 | at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */ | ||
874 | at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */ | ||
875 | at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */ | ||
876 | at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */ | ||
877 | at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */ | ||
878 | at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */ | ||
879 | at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */ | ||
880 | at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */ | ||
881 | at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */ | ||
882 | at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */ | ||
883 | at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */ | ||
884 | at91_set_A_periph(AT91_PIN_PC17, 0); /* LCDD13 */ | ||
885 | at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */ | ||
886 | at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */ | ||
887 | at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */ | ||
888 | at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */ | ||
889 | at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */ | ||
890 | at91_set_A_periph(AT91_PIN_PC25, 0); /* LCDD21 */ | ||
891 | at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */ | ||
892 | at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */ | ||
893 | |||
894 | lcdc_data = *data; | ||
895 | platform_device_register(&at91_lcdc_device); | ||
896 | } | ||
897 | #else | ||
898 | void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} | ||
899 | #endif | ||
900 | |||
901 | |||
902 | /* -------------------------------------------------------------------- | ||
903 | * SSC -- Synchronous Serial Controller | ||
904 | * -------------------------------------------------------------------- */ | ||
905 | |||
906 | #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE) | ||
907 | static u64 ssc0_dmamask = DMA_BIT_MASK(32); | ||
908 | |||
909 | static struct resource ssc0_resources[] = { | ||
910 | [0] = { | ||
911 | .start = AT91CAP9_BASE_SSC0, | ||
912 | .end = AT91CAP9_BASE_SSC0 + SZ_16K - 1, | ||
913 | .flags = IORESOURCE_MEM, | ||
914 | }, | ||
915 | [1] = { | ||
916 | .start = AT91CAP9_ID_SSC0, | ||
917 | .end = AT91CAP9_ID_SSC0, | ||
918 | .flags = IORESOURCE_IRQ, | ||
919 | }, | ||
920 | }; | ||
921 | |||
922 | static struct platform_device at91cap9_ssc0_device = { | ||
923 | .name = "ssc", | ||
924 | .id = 0, | ||
925 | .dev = { | ||
926 | .dma_mask = &ssc0_dmamask, | ||
927 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
928 | }, | ||
929 | .resource = ssc0_resources, | ||
930 | .num_resources = ARRAY_SIZE(ssc0_resources), | ||
931 | }; | ||
932 | |||
933 | static inline void configure_ssc0_pins(unsigned pins) | ||
934 | { | ||
935 | if (pins & ATMEL_SSC_TF) | ||
936 | at91_set_A_periph(AT91_PIN_PB0, 1); | ||
937 | if (pins & ATMEL_SSC_TK) | ||
938 | at91_set_A_periph(AT91_PIN_PB1, 1); | ||
939 | if (pins & ATMEL_SSC_TD) | ||
940 | at91_set_A_periph(AT91_PIN_PB2, 1); | ||
941 | if (pins & ATMEL_SSC_RD) | ||
942 | at91_set_A_periph(AT91_PIN_PB3, 1); | ||
943 | if (pins & ATMEL_SSC_RK) | ||
944 | at91_set_A_periph(AT91_PIN_PB4, 1); | ||
945 | if (pins & ATMEL_SSC_RF) | ||
946 | at91_set_A_periph(AT91_PIN_PB5, 1); | ||
947 | } | ||
948 | |||
949 | static u64 ssc1_dmamask = DMA_BIT_MASK(32); | ||
950 | |||
951 | static struct resource ssc1_resources[] = { | ||
952 | [0] = { | ||
953 | .start = AT91CAP9_BASE_SSC1, | ||
954 | .end = AT91CAP9_BASE_SSC1 + SZ_16K - 1, | ||
955 | .flags = IORESOURCE_MEM, | ||
956 | }, | ||
957 | [1] = { | ||
958 | .start = AT91CAP9_ID_SSC1, | ||
959 | .end = AT91CAP9_ID_SSC1, | ||
960 | .flags = IORESOURCE_IRQ, | ||
961 | }, | ||
962 | }; | ||
963 | |||
964 | static struct platform_device at91cap9_ssc1_device = { | ||
965 | .name = "ssc", | ||
966 | .id = 1, | ||
967 | .dev = { | ||
968 | .dma_mask = &ssc1_dmamask, | ||
969 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
970 | }, | ||
971 | .resource = ssc1_resources, | ||
972 | .num_resources = ARRAY_SIZE(ssc1_resources), | ||
973 | }; | ||
974 | |||
975 | static inline void configure_ssc1_pins(unsigned pins) | ||
976 | { | ||
977 | if (pins & ATMEL_SSC_TF) | ||
978 | at91_set_A_periph(AT91_PIN_PB6, 1); | ||
979 | if (pins & ATMEL_SSC_TK) | ||
980 | at91_set_A_periph(AT91_PIN_PB7, 1); | ||
981 | if (pins & ATMEL_SSC_TD) | ||
982 | at91_set_A_periph(AT91_PIN_PB8, 1); | ||
983 | if (pins & ATMEL_SSC_RD) | ||
984 | at91_set_A_periph(AT91_PIN_PB9, 1); | ||
985 | if (pins & ATMEL_SSC_RK) | ||
986 | at91_set_A_periph(AT91_PIN_PB10, 1); | ||
987 | if (pins & ATMEL_SSC_RF) | ||
988 | at91_set_A_periph(AT91_PIN_PB11, 1); | ||
989 | } | ||
990 | |||
991 | /* | ||
992 | * SSC controllers are accessed through library code, instead of any | ||
993 | * kind of all-singing/all-dancing driver. For example one could be | ||
994 | * used by a particular I2S audio codec's driver, while another one | ||
995 | * on the same system might be used by a custom data capture driver. | ||
996 | */ | ||
997 | void __init at91_add_device_ssc(unsigned id, unsigned pins) | ||
998 | { | ||
999 | struct platform_device *pdev; | ||
1000 | |||
1001 | /* | ||
1002 | * NOTE: caller is responsible for passing information matching | ||
1003 | * "pins" to whatever will be using each particular controller. | ||
1004 | */ | ||
1005 | switch (id) { | ||
1006 | case AT91CAP9_ID_SSC0: | ||
1007 | pdev = &at91cap9_ssc0_device; | ||
1008 | configure_ssc0_pins(pins); | ||
1009 | break; | ||
1010 | case AT91CAP9_ID_SSC1: | ||
1011 | pdev = &at91cap9_ssc1_device; | ||
1012 | configure_ssc1_pins(pins); | ||
1013 | break; | ||
1014 | default: | ||
1015 | return; | ||
1016 | } | ||
1017 | |||
1018 | platform_device_register(pdev); | ||
1019 | } | ||
1020 | |||
1021 | #else | ||
1022 | void __init at91_add_device_ssc(unsigned id, unsigned pins) {} | ||
1023 | #endif | ||
1024 | |||
1025 | |||
1026 | /* -------------------------------------------------------------------- | ||
1027 | * UART | ||
1028 | * -------------------------------------------------------------------- */ | ||
1029 | |||
1030 | #if defined(CONFIG_SERIAL_ATMEL) | ||
1031 | static struct resource dbgu_resources[] = { | ||
1032 | [0] = { | ||
1033 | .start = AT91CAP9_BASE_DBGU, | ||
1034 | .end = AT91CAP9_BASE_DBGU + SZ_512 - 1, | ||
1035 | .flags = IORESOURCE_MEM, | ||
1036 | }, | ||
1037 | [1] = { | ||
1038 | .start = AT91_ID_SYS, | ||
1039 | .end = AT91_ID_SYS, | ||
1040 | .flags = IORESOURCE_IRQ, | ||
1041 | }, | ||
1042 | }; | ||
1043 | |||
1044 | static struct atmel_uart_data dbgu_data = { | ||
1045 | .use_dma_tx = 0, | ||
1046 | .use_dma_rx = 0, /* DBGU not capable of receive DMA */ | ||
1047 | }; | ||
1048 | |||
1049 | static u64 dbgu_dmamask = DMA_BIT_MASK(32); | ||
1050 | |||
1051 | static struct platform_device at91cap9_dbgu_device = { | ||
1052 | .name = "atmel_usart", | ||
1053 | .id = 0, | ||
1054 | .dev = { | ||
1055 | .dma_mask = &dbgu_dmamask, | ||
1056 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
1057 | .platform_data = &dbgu_data, | ||
1058 | }, | ||
1059 | .resource = dbgu_resources, | ||
1060 | .num_resources = ARRAY_SIZE(dbgu_resources), | ||
1061 | }; | ||
1062 | |||
1063 | static inline void configure_dbgu_pins(void) | ||
1064 | { | ||
1065 | at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ | ||
1066 | at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ | ||
1067 | } | ||
1068 | |||
1069 | static struct resource uart0_resources[] = { | ||
1070 | [0] = { | ||
1071 | .start = AT91CAP9_BASE_US0, | ||
1072 | .end = AT91CAP9_BASE_US0 + SZ_16K - 1, | ||
1073 | .flags = IORESOURCE_MEM, | ||
1074 | }, | ||
1075 | [1] = { | ||
1076 | .start = AT91CAP9_ID_US0, | ||
1077 | .end = AT91CAP9_ID_US0, | ||
1078 | .flags = IORESOURCE_IRQ, | ||
1079 | }, | ||
1080 | }; | ||
1081 | |||
1082 | static struct atmel_uart_data uart0_data = { | ||
1083 | .use_dma_tx = 1, | ||
1084 | .use_dma_rx = 1, | ||
1085 | }; | ||
1086 | |||
1087 | static u64 uart0_dmamask = DMA_BIT_MASK(32); | ||
1088 | |||
1089 | static struct platform_device at91cap9_uart0_device = { | ||
1090 | .name = "atmel_usart", | ||
1091 | .id = 1, | ||
1092 | .dev = { | ||
1093 | .dma_mask = &uart0_dmamask, | ||
1094 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
1095 | .platform_data = &uart0_data, | ||
1096 | }, | ||
1097 | .resource = uart0_resources, | ||
1098 | .num_resources = ARRAY_SIZE(uart0_resources), | ||
1099 | }; | ||
1100 | |||
1101 | static inline void configure_usart0_pins(unsigned pins) | ||
1102 | { | ||
1103 | at91_set_A_periph(AT91_PIN_PA22, 1); /* TXD0 */ | ||
1104 | at91_set_A_periph(AT91_PIN_PA23, 0); /* RXD0 */ | ||
1105 | |||
1106 | if (pins & ATMEL_UART_RTS) | ||
1107 | at91_set_A_periph(AT91_PIN_PA24, 0); /* RTS0 */ | ||
1108 | if (pins & ATMEL_UART_CTS) | ||
1109 | at91_set_A_periph(AT91_PIN_PA25, 0); /* CTS0 */ | ||
1110 | } | ||
1111 | |||
1112 | static struct resource uart1_resources[] = { | ||
1113 | [0] = { | ||
1114 | .start = AT91CAP9_BASE_US1, | ||
1115 | .end = AT91CAP9_BASE_US1 + SZ_16K - 1, | ||
1116 | .flags = IORESOURCE_MEM, | ||
1117 | }, | ||
1118 | [1] = { | ||
1119 | .start = AT91CAP9_ID_US1, | ||
1120 | .end = AT91CAP9_ID_US1, | ||
1121 | .flags = IORESOURCE_IRQ, | ||
1122 | }, | ||
1123 | }; | ||
1124 | |||
1125 | static struct atmel_uart_data uart1_data = { | ||
1126 | .use_dma_tx = 1, | ||
1127 | .use_dma_rx = 1, | ||
1128 | }; | ||
1129 | |||
1130 | static u64 uart1_dmamask = DMA_BIT_MASK(32); | ||
1131 | |||
1132 | static struct platform_device at91cap9_uart1_device = { | ||
1133 | .name = "atmel_usart", | ||
1134 | .id = 2, | ||
1135 | .dev = { | ||
1136 | .dma_mask = &uart1_dmamask, | ||
1137 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
1138 | .platform_data = &uart1_data, | ||
1139 | }, | ||
1140 | .resource = uart1_resources, | ||
1141 | .num_resources = ARRAY_SIZE(uart1_resources), | ||
1142 | }; | ||
1143 | |||
1144 | static inline void configure_usart1_pins(unsigned pins) | ||
1145 | { | ||
1146 | at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ | ||
1147 | at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ | ||
1148 | |||
1149 | if (pins & ATMEL_UART_RTS) | ||
1150 | at91_set_B_periph(AT91_PIN_PD7, 0); /* RTS1 */ | ||
1151 | if (pins & ATMEL_UART_CTS) | ||
1152 | at91_set_B_periph(AT91_PIN_PD8, 0); /* CTS1 */ | ||
1153 | } | ||
1154 | |||
1155 | static struct resource uart2_resources[] = { | ||
1156 | [0] = { | ||
1157 | .start = AT91CAP9_BASE_US2, | ||
1158 | .end = AT91CAP9_BASE_US2 + SZ_16K - 1, | ||
1159 | .flags = IORESOURCE_MEM, | ||
1160 | }, | ||
1161 | [1] = { | ||
1162 | .start = AT91CAP9_ID_US2, | ||
1163 | .end = AT91CAP9_ID_US2, | ||
1164 | .flags = IORESOURCE_IRQ, | ||
1165 | }, | ||
1166 | }; | ||
1167 | |||
1168 | static struct atmel_uart_data uart2_data = { | ||
1169 | .use_dma_tx = 1, | ||
1170 | .use_dma_rx = 1, | ||
1171 | }; | ||
1172 | |||
1173 | static u64 uart2_dmamask = DMA_BIT_MASK(32); | ||
1174 | |||
1175 | static struct platform_device at91cap9_uart2_device = { | ||
1176 | .name = "atmel_usart", | ||
1177 | .id = 3, | ||
1178 | .dev = { | ||
1179 | .dma_mask = &uart2_dmamask, | ||
1180 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
1181 | .platform_data = &uart2_data, | ||
1182 | }, | ||
1183 | .resource = uart2_resources, | ||
1184 | .num_resources = ARRAY_SIZE(uart2_resources), | ||
1185 | }; | ||
1186 | |||
1187 | static inline void configure_usart2_pins(unsigned pins) | ||
1188 | { | ||
1189 | at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ | ||
1190 | at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ | ||
1191 | |||
1192 | if (pins & ATMEL_UART_RTS) | ||
1193 | at91_set_B_periph(AT91_PIN_PD5, 0); /* RTS2 */ | ||
1194 | if (pins & ATMEL_UART_CTS) | ||
1195 | at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */ | ||
1196 | } | ||
1197 | |||
1198 | static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ | ||
1199 | struct platform_device *atmel_default_console_device; /* the serial console device */ | ||
1200 | |||
1201 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | ||
1202 | { | ||
1203 | struct platform_device *pdev; | ||
1204 | struct atmel_uart_data *pdata; | ||
1205 | |||
1206 | switch (id) { | ||
1207 | case 0: /* DBGU */ | ||
1208 | pdev = &at91cap9_dbgu_device; | ||
1209 | configure_dbgu_pins(); | ||
1210 | break; | ||
1211 | case AT91CAP9_ID_US0: | ||
1212 | pdev = &at91cap9_uart0_device; | ||
1213 | configure_usart0_pins(pins); | ||
1214 | break; | ||
1215 | case AT91CAP9_ID_US1: | ||
1216 | pdev = &at91cap9_uart1_device; | ||
1217 | configure_usart1_pins(pins); | ||
1218 | break; | ||
1219 | case AT91CAP9_ID_US2: | ||
1220 | pdev = &at91cap9_uart2_device; | ||
1221 | configure_usart2_pins(pins); | ||
1222 | break; | ||
1223 | default: | ||
1224 | return; | ||
1225 | } | ||
1226 | pdata = pdev->dev.platform_data; | ||
1227 | pdata->num = portnr; /* update to mapped ID */ | ||
1228 | |||
1229 | if (portnr < ATMEL_MAX_UART) | ||
1230 | at91_uarts[portnr] = pdev; | ||
1231 | } | ||
1232 | |||
1233 | void __init at91_set_serial_console(unsigned portnr) | ||
1234 | { | ||
1235 | if (portnr < ATMEL_MAX_UART) { | ||
1236 | atmel_default_console_device = at91_uarts[portnr]; | ||
1237 | at91cap9_set_console_clock(at91_uarts[portnr]->id); | ||
1238 | } | ||
1239 | } | ||
1240 | |||
1241 | void __init at91_add_device_serial(void) | ||
1242 | { | ||
1243 | int i; | ||
1244 | |||
1245 | for (i = 0; i < ATMEL_MAX_UART; i++) { | ||
1246 | if (at91_uarts[i]) | ||
1247 | platform_device_register(at91_uarts[i]); | ||
1248 | } | ||
1249 | |||
1250 | if (!atmel_default_console_device) | ||
1251 | printk(KERN_INFO "AT91: No default serial console defined.\n"); | ||
1252 | } | ||
1253 | #else | ||
1254 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} | ||
1255 | void __init at91_set_serial_console(unsigned portnr) {} | ||
1256 | void __init at91_add_device_serial(void) {} | ||
1257 | #endif | ||
1258 | |||
1259 | |||
1260 | /* -------------------------------------------------------------------- */ | ||
1261 | /* | ||
1262 | * These devices are always present and don't need any board-specific | ||
1263 | * setup. | ||
1264 | */ | ||
1265 | static int __init at91_add_standard_devices(void) | ||
1266 | { | ||
1267 | at91_add_device_rtt(); | ||
1268 | at91_add_device_watchdog(); | ||
1269 | at91_add_device_tc(); | ||
1270 | return 0; | ||
1271 | } | ||
1272 | |||
1273 | arch_initcall(at91_add_standard_devices); | ||
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 99c3174e24a2..dd6e2de13420 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c | |||
@@ -289,6 +289,15 @@ static struct at91_gpio_bank at91rm9200_gpio[] __initdata = { | |||
289 | } | 289 | } |
290 | }; | 290 | }; |
291 | 291 | ||
292 | static void at91rm9200_idle(void) | ||
293 | { | ||
294 | /* | ||
295 | * Disable the processor clock. The processor will be automatically | ||
296 | * re-enabled by an interrupt or by a reset. | ||
297 | */ | ||
298 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
299 | } | ||
300 | |||
292 | static void at91rm9200_restart(char mode, const char *cmd) | 301 | static void at91rm9200_restart(char mode, const char *cmd) |
293 | { | 302 | { |
294 | /* | 303 | /* |
@@ -314,6 +323,7 @@ static void __init at91rm9200_ioremap_registers(void) | |||
314 | 323 | ||
315 | static void __init at91rm9200_initialize(void) | 324 | static void __init at91rm9200_initialize(void) |
316 | { | 325 | { |
326 | arm_pm_idle = at91rm9200_idle; | ||
317 | arm_pm_restart = at91rm9200_restart; | 327 | arm_pm_restart = at91rm9200_restart; |
318 | at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) | 328 | at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) |
319 | | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) | 329 | | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) |
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index d4036ba43612..9ac8c6fe3363 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | 14 | ||
15 | #include <asm/proc-fns.h> | ||
15 | #include <asm/irq.h> | 16 | #include <asm/irq.h> |
16 | #include <asm/mach/arch.h> | 17 | #include <asm/mach/arch.h> |
17 | #include <asm/mach/map.h> | 18 | #include <asm/mach/map.h> |
@@ -328,8 +329,15 @@ static void __init at91sam9260_ioremap_registers(void) | |||
328 | at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); | 329 | at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); |
329 | } | 330 | } |
330 | 331 | ||
332 | static void at91sam9260_idle(void) | ||
333 | { | ||
334 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
335 | cpu_do_idle(); | ||
336 | } | ||
337 | |||
331 | static void __init at91sam9260_initialize(void) | 338 | static void __init at91sam9260_initialize(void) |
332 | { | 339 | { |
340 | arm_pm_idle = at91sam9260_idle; | ||
333 | arm_pm_restart = at91sam9_alt_restart; | 341 | arm_pm_restart = at91sam9_alt_restart; |
334 | at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) | 342 | at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) |
335 | | (1 << AT91SAM9260_ID_IRQ2); | 343 | | (1 << AT91SAM9260_ID_IRQ2); |
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 023c2ff138df..ab76868f01f5 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | 14 | ||
15 | #include <asm/proc-fns.h> | ||
15 | #include <asm/irq.h> | 16 | #include <asm/irq.h> |
16 | #include <asm/mach/arch.h> | 17 | #include <asm/mach/arch.h> |
17 | #include <asm/mach/map.h> | 18 | #include <asm/mach/map.h> |
@@ -286,8 +287,15 @@ static void __init at91sam9261_ioremap_registers(void) | |||
286 | at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); | 287 | at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); |
287 | } | 288 | } |
288 | 289 | ||
290 | static void at91sam9261_idle(void) | ||
291 | { | ||
292 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
293 | cpu_do_idle(); | ||
294 | } | ||
295 | |||
289 | static void __init at91sam9261_initialize(void) | 296 | static void __init at91sam9261_initialize(void) |
290 | { | 297 | { |
298 | arm_pm_idle = at91sam9261_idle; | ||
291 | arm_pm_restart = at91sam9_alt_restart; | 299 | arm_pm_restart = at91sam9_alt_restart; |
292 | at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) | 300 | at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) |
293 | | (1 << AT91SAM9261_ID_IRQ2); | 301 | | (1 << AT91SAM9261_ID_IRQ2); |
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 75e876c258af..247ab633abcc 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | 14 | ||
15 | #include <asm/proc-fns.h> | ||
15 | #include <asm/irq.h> | 16 | #include <asm/irq.h> |
16 | #include <asm/mach/arch.h> | 17 | #include <asm/mach/arch.h> |
17 | #include <asm/mach/map.h> | 18 | #include <asm/mach/map.h> |
@@ -307,8 +308,15 @@ static void __init at91sam9263_ioremap_registers(void) | |||
307 | at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); | 308 | at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); |
308 | } | 309 | } |
309 | 310 | ||
311 | static void at91sam9263_idle(void) | ||
312 | { | ||
313 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
314 | cpu_do_idle(); | ||
315 | } | ||
316 | |||
310 | static void __init at91sam9263_initialize(void) | 317 | static void __init at91sam9263_initialize(void) |
311 | { | 318 | { |
319 | arm_pm_idle = at91sam9263_idle; | ||
312 | arm_pm_restart = at91sam9_alt_restart; | 320 | arm_pm_restart = at91sam9_alt_restart; |
313 | at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); | 321 | at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); |
314 | 322 | ||
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 1cb6a96b1c1e..5b12192e52ec 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c | |||
@@ -317,6 +317,12 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = { | |||
317 | } | 317 | } |
318 | }; | 318 | }; |
319 | 319 | ||
320 | static void at91sam9g45_idle(void) | ||
321 | { | ||
322 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
323 | cpu_do_idle(); | ||
324 | } | ||
325 | |||
320 | /* -------------------------------------------------------------------- | 326 | /* -------------------------------------------------------------------- |
321 | * AT91SAM9G45 processor initialization | 327 | * AT91SAM9G45 processor initialization |
322 | * -------------------------------------------------------------------- */ | 328 | * -------------------------------------------------------------------- */ |
@@ -337,6 +343,7 @@ static void __init at91sam9g45_ioremap_registers(void) | |||
337 | 343 | ||
338 | static void __init at91sam9g45_initialize(void) | 344 | static void __init at91sam9g45_initialize(void) |
339 | { | 345 | { |
346 | arm_pm_idle = at91sam9g45_idle; | ||
340 | arm_pm_restart = at91sam9g45_restart; | 347 | arm_pm_restart = at91sam9g45_restart; |
341 | at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); | 348 | at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); |
342 | 349 | ||
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index d2c91a841cb8..fd60e226a987 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c | |||
@@ -11,6 +11,7 @@ | |||
11 | 11 | ||
12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
13 | 13 | ||
14 | #include <asm/proc-fns.h> | ||
14 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
15 | #include <asm/mach/arch.h> | 16 | #include <asm/mach/arch.h> |
16 | #include <asm/mach/map.h> | 17 | #include <asm/mach/map.h> |
@@ -291,8 +292,15 @@ static void __init at91sam9rl_ioremap_registers(void) | |||
291 | at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); | 292 | at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); |
292 | } | 293 | } |
293 | 294 | ||
295 | static void at91sam9rl_idle(void) | ||
296 | { | ||
297 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
298 | cpu_do_idle(); | ||
299 | } | ||
300 | |||
294 | static void __init at91sam9rl_initialize(void) | 301 | static void __init at91sam9rl_initialize(void) |
295 | { | 302 | { |
303 | arm_pm_idle = at91sam9rl_idle; | ||
296 | arm_pm_restart = at91sam9_alt_restart; | 304 | arm_pm_restart = at91sam9_alt_restart; |
297 | at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); | 305 | at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); |
298 | 306 | ||
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c index 56ba3bd035ae..0154b7f44ff1 100644 --- a/arch/arm/mach-at91/at91x40.c +++ b/arch/arm/mach-at91/at91x40.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/irq.h> | 15 | #include <linux/irq.h> |
16 | #include <asm/proc-fns.h> | ||
16 | #include <asm/mach/arch.h> | 17 | #include <asm/mach/arch.h> |
17 | #include <mach/at91x40.h> | 18 | #include <mach/at91x40.h> |
18 | #include <mach/at91_st.h> | 19 | #include <mach/at91_st.h> |
@@ -37,8 +38,19 @@ unsigned long clk_get_rate(struct clk *clk) | |||
37 | return AT91X40_MASTER_CLOCK; | 38 | return AT91X40_MASTER_CLOCK; |
38 | } | 39 | } |
39 | 40 | ||
41 | static void at91x40_idle(void) | ||
42 | { | ||
43 | /* | ||
44 | * Disable the processor clock. The processor will be automatically | ||
45 | * re-enabled by an interrupt or by a reset. | ||
46 | */ | ||
47 | at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU); | ||
48 | cpu_do_idle(); | ||
49 | } | ||
50 | |||
40 | void __init at91x40_initialize(unsigned long main_clock) | 51 | void __init at91x40_initialize(unsigned long main_clock) |
41 | { | 52 | { |
53 | arm_pm_idle = at91x40_idle; | ||
42 | at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1) | 54 | at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1) |
43 | | (1 << AT91X40_ID_IRQ2); | 55 | | (1 << AT91X40_ID_IRQ2); |
44 | } | 56 | } |
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c deleted file mode 100644 index ac3de4f7c31d..000000000000 --- a/arch/arm/mach-at91/board-cap9adk.c +++ /dev/null | |||
@@ -1,396 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-at91/board-cap9adk.c | ||
3 | * | ||
4 | * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> | ||
5 | * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> | ||
6 | * Copyright (C) 2005 SAN People | ||
7 | * Copyright (C) 2007 Atmel Corporation. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
22 | */ | ||
23 | |||
24 | #include <linux/types.h> | ||
25 | #include <linux/gpio.h> | ||
26 | #include <linux/init.h> | ||
27 | #include <linux/mm.h> | ||
28 | #include <linux/module.h> | ||
29 | #include <linux/platform_device.h> | ||
30 | #include <linux/spi/spi.h> | ||
31 | #include <linux/spi/ads7846.h> | ||
32 | #include <linux/fb.h> | ||
33 | #include <linux/mtd/physmap.h> | ||
34 | |||
35 | #include <video/atmel_lcdc.h> | ||
36 | |||
37 | #include <mach/hardware.h> | ||
38 | #include <asm/setup.h> | ||
39 | #include <asm/mach-types.h> | ||
40 | |||
41 | #include <asm/mach/arch.h> | ||
42 | #include <asm/mach/map.h> | ||
43 | |||
44 | #include <mach/board.h> | ||
45 | #include <mach/at91cap9_matrix.h> | ||
46 | #include <mach/at91sam9_smc.h> | ||
47 | #include <mach/system_rev.h> | ||
48 | |||
49 | #include "sam9_smc.h" | ||
50 | #include "generic.h" | ||
51 | |||
52 | |||
53 | static void __init cap9adk_init_early(void) | ||
54 | { | ||
55 | /* Initialize processor: 12 MHz crystal */ | ||
56 | at91_initialize(12000000); | ||
57 | |||
58 | /* Setup the LEDs: USER1 and USER2 LED for cpu/timer... */ | ||
59 | at91_init_leds(AT91_PIN_PA10, AT91_PIN_PA11); | ||
60 | /* ... POWER LED always on */ | ||
61 | at91_set_gpio_output(AT91_PIN_PC29, 1); | ||
62 | |||
63 | /* Setup the serial ports and console */ | ||
64 | at91_register_uart(0, 0, 0); /* DBGU = ttyS0 */ | ||
65 | at91_set_serial_console(0); | ||
66 | } | ||
67 | |||
68 | /* | ||
69 | * USB Host port | ||
70 | */ | ||
71 | static struct at91_usbh_data __initdata cap9adk_usbh_data = { | ||
72 | .ports = 2, | ||
73 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
74 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
75 | }; | ||
76 | |||
77 | /* | ||
78 | * USB HS Device port | ||
79 | */ | ||
80 | static struct usba_platform_data __initdata cap9adk_usba_udc_data = { | ||
81 | .vbus_pin = AT91_PIN_PB31, | ||
82 | }; | ||
83 | |||
84 | /* | ||
85 | * ADS7846 Touchscreen | ||
86 | */ | ||
87 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | ||
88 | static int ads7843_pendown_state(void) | ||
89 | { | ||
90 | return !at91_get_gpio_value(AT91_PIN_PC4); /* Touchscreen PENIRQ */ | ||
91 | } | ||
92 | |||
93 | static struct ads7846_platform_data ads_info = { | ||
94 | .model = 7843, | ||
95 | .x_min = 150, | ||
96 | .x_max = 3830, | ||
97 | .y_min = 190, | ||
98 | .y_max = 3830, | ||
99 | .vref_delay_usecs = 100, | ||
100 | .x_plate_ohms = 450, | ||
101 | .y_plate_ohms = 250, | ||
102 | .pressure_max = 15000, | ||
103 | .debounce_max = 1, | ||
104 | .debounce_rep = 0, | ||
105 | .debounce_tol = (~0), | ||
106 | .get_pendown_state = ads7843_pendown_state, | ||
107 | }; | ||
108 | |||
109 | static void __init cap9adk_add_device_ts(void) | ||
110 | { | ||
111 | at91_set_gpio_input(AT91_PIN_PC4, 1); /* Touchscreen PENIRQ */ | ||
112 | at91_set_gpio_input(AT91_PIN_PC5, 1); /* Touchscreen BUSY */ | ||
113 | } | ||
114 | #else | ||
115 | static void __init cap9adk_add_device_ts(void) {} | ||
116 | #endif | ||
117 | |||
118 | |||
119 | /* | ||
120 | * SPI devices. | ||
121 | */ | ||
122 | static struct spi_board_info cap9adk_spi_devices[] = { | ||
123 | #if defined(CONFIG_MTD_AT91_DATAFLASH_CARD) | ||
124 | { /* DataFlash card */ | ||
125 | .modalias = "mtd_dataflash", | ||
126 | .chip_select = 0, | ||
127 | .max_speed_hz = 15 * 1000 * 1000, | ||
128 | .bus_num = 0, | ||
129 | }, | ||
130 | #endif | ||
131 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | ||
132 | { | ||
133 | .modalias = "ads7846", | ||
134 | .chip_select = 3, /* can be 2 or 3, depending on J2 jumper */ | ||
135 | .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */ | ||
136 | .bus_num = 0, | ||
137 | .platform_data = &ads_info, | ||
138 | .irq = AT91_PIN_PC4, | ||
139 | }, | ||
140 | #endif | ||
141 | }; | ||
142 | |||
143 | |||
144 | /* | ||
145 | * MCI (SD/MMC) | ||
146 | */ | ||
147 | static struct at91_mmc_data __initdata cap9adk_mmc_data = { | ||
148 | .wire4 = 1, | ||
149 | .det_pin = -EINVAL, | ||
150 | .wp_pin = -EINVAL, | ||
151 | .vcc_pin = -EINVAL, | ||
152 | }; | ||
153 | |||
154 | |||
155 | /* | ||
156 | * MACB Ethernet device | ||
157 | */ | ||
158 | static struct macb_platform_data __initdata cap9adk_macb_data = { | ||
159 | .phy_irq_pin = -EINVAL, | ||
160 | .is_rmii = 1, | ||
161 | }; | ||
162 | |||
163 | |||
164 | /* | ||
165 | * NAND flash | ||
166 | */ | ||
167 | static struct mtd_partition __initdata cap9adk_nand_partitions[] = { | ||
168 | { | ||
169 | .name = "NAND partition", | ||
170 | .offset = 0, | ||
171 | .size = MTDPART_SIZ_FULL, | ||
172 | }, | ||
173 | }; | ||
174 | |||
175 | static struct atmel_nand_data __initdata cap9adk_nand_data = { | ||
176 | .ale = 21, | ||
177 | .cle = 22, | ||
178 | .det_pin = -EINVAL, | ||
179 | .rdy_pin = -EINVAL, | ||
180 | .enable_pin = AT91_PIN_PD15, | ||
181 | .parts = cap9adk_nand_partitions, | ||
182 | .num_parts = ARRAY_SIZE(cap9adk_nand_partitions), | ||
183 | }; | ||
184 | |||
185 | static struct sam9_smc_config __initdata cap9adk_nand_smc_config = { | ||
186 | .ncs_read_setup = 1, | ||
187 | .nrd_setup = 2, | ||
188 | .ncs_write_setup = 1, | ||
189 | .nwe_setup = 2, | ||
190 | |||
191 | .ncs_read_pulse = 6, | ||
192 | .nrd_pulse = 4, | ||
193 | .ncs_write_pulse = 6, | ||
194 | .nwe_pulse = 4, | ||
195 | |||
196 | .read_cycle = 8, | ||
197 | .write_cycle = 8, | ||
198 | |||
199 | .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE, | ||
200 | .tdf_cycles = 1, | ||
201 | }; | ||
202 | |||
203 | static void __init cap9adk_add_device_nand(void) | ||
204 | { | ||
205 | unsigned long csa; | ||
206 | |||
207 | csa = at91_sys_read(AT91_MATRIX_EBICSA); | ||
208 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); | ||
209 | |||
210 | cap9adk_nand_data.bus_width_16 = board_have_nand_16bit(); | ||
211 | /* setup bus-width (8 or 16) */ | ||
212 | if (cap9adk_nand_data.bus_width_16) | ||
213 | cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16; | ||
214 | else | ||
215 | cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8; | ||
216 | |||
217 | /* configure chip-select 3 (NAND) */ | ||
218 | sam9_smc_configure(0, 3, &cap9adk_nand_smc_config); | ||
219 | |||
220 | at91_add_device_nand(&cap9adk_nand_data); | ||
221 | } | ||
222 | |||
223 | |||
224 | /* | ||
225 | * NOR flash | ||
226 | */ | ||
227 | static struct mtd_partition cap9adk_nor_partitions[] = { | ||
228 | { | ||
229 | .name = "NOR partition", | ||
230 | .offset = 0, | ||
231 | .size = MTDPART_SIZ_FULL, | ||
232 | }, | ||
233 | }; | ||
234 | |||
235 | static struct physmap_flash_data cap9adk_nor_data = { | ||
236 | .width = 2, | ||
237 | .parts = cap9adk_nor_partitions, | ||
238 | .nr_parts = ARRAY_SIZE(cap9adk_nor_partitions), | ||
239 | }; | ||
240 | |||
241 | #define NOR_BASE AT91_CHIPSELECT_0 | ||
242 | #define NOR_SIZE SZ_8M | ||
243 | |||
244 | static struct resource nor_flash_resources[] = { | ||
245 | { | ||
246 | .start = NOR_BASE, | ||
247 | .end = NOR_BASE + NOR_SIZE - 1, | ||
248 | .flags = IORESOURCE_MEM, | ||
249 | } | ||
250 | }; | ||
251 | |||
252 | static struct platform_device cap9adk_nor_flash = { | ||
253 | .name = "physmap-flash", | ||
254 | .id = 0, | ||
255 | .dev = { | ||
256 | .platform_data = &cap9adk_nor_data, | ||
257 | }, | ||
258 | .resource = nor_flash_resources, | ||
259 | .num_resources = ARRAY_SIZE(nor_flash_resources), | ||
260 | }; | ||
261 | |||
262 | static struct sam9_smc_config __initdata cap9adk_nor_smc_config = { | ||
263 | .ncs_read_setup = 2, | ||
264 | .nrd_setup = 4, | ||
265 | .ncs_write_setup = 2, | ||
266 | .nwe_setup = 4, | ||
267 | |||
268 | .ncs_read_pulse = 10, | ||
269 | .nrd_pulse = 8, | ||
270 | .ncs_write_pulse = 10, | ||
271 | .nwe_pulse = 8, | ||
272 | |||
273 | .read_cycle = 16, | ||
274 | .write_cycle = 16, | ||
275 | |||
276 | .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16, | ||
277 | .tdf_cycles = 1, | ||
278 | }; | ||
279 | |||
280 | static __init void cap9adk_add_device_nor(void) | ||
281 | { | ||
282 | unsigned long csa; | ||
283 | |||
284 | csa = at91_sys_read(AT91_MATRIX_EBICSA); | ||
285 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); | ||
286 | |||
287 | /* configure chip-select 0 (NOR) */ | ||
288 | sam9_smc_configure(0, 0, &cap9adk_nor_smc_config); | ||
289 | |||
290 | platform_device_register(&cap9adk_nor_flash); | ||
291 | } | ||
292 | |||
293 | |||
294 | /* | ||
295 | * LCD Controller | ||
296 | */ | ||
297 | #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) | ||
298 | static struct fb_videomode at91_tft_vga_modes[] = { | ||
299 | { | ||
300 | .name = "TX09D50VM1CCA @ 60", | ||
301 | .refresh = 60, | ||
302 | .xres = 240, .yres = 320, | ||
303 | .pixclock = KHZ2PICOS(4965), | ||
304 | |||
305 | .left_margin = 1, .right_margin = 33, | ||
306 | .upper_margin = 1, .lower_margin = 0, | ||
307 | .hsync_len = 5, .vsync_len = 1, | ||
308 | |||
309 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | ||
310 | .vmode = FB_VMODE_NONINTERLACED, | ||
311 | }, | ||
312 | }; | ||
313 | |||
314 | static struct fb_monspecs at91fb_default_monspecs = { | ||
315 | .manufacturer = "HIT", | ||
316 | .monitor = "TX09D70VM1CCA", | ||
317 | |||
318 | .modedb = at91_tft_vga_modes, | ||
319 | .modedb_len = ARRAY_SIZE(at91_tft_vga_modes), | ||
320 | .hfmin = 15000, | ||
321 | .hfmax = 64000, | ||
322 | .vfmin = 50, | ||
323 | .vfmax = 150, | ||
324 | }; | ||
325 | |||
326 | #define AT91CAP9_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \ | ||
327 | | ATMEL_LCDC_DISTYPE_TFT \ | ||
328 | | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE) | ||
329 | |||
330 | static void at91_lcdc_power_control(int on) | ||
331 | { | ||
332 | if (on) | ||
333 | at91_set_gpio_value(AT91_PIN_PC0, 0); /* power up */ | ||
334 | else | ||
335 | at91_set_gpio_value(AT91_PIN_PC0, 1); /* power down */ | ||
336 | } | ||
337 | |||
338 | /* Driver datas */ | ||
339 | static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data = { | ||
340 | .default_bpp = 16, | ||
341 | .default_dmacon = ATMEL_LCDC_DMAEN, | ||
342 | .default_lcdcon2 = AT91CAP9_DEFAULT_LCDCON2, | ||
343 | .default_monspecs = &at91fb_default_monspecs, | ||
344 | .atmel_lcdfb_power_control = at91_lcdc_power_control, | ||
345 | .guard_time = 1, | ||
346 | }; | ||
347 | |||
348 | #else | ||
349 | static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data; | ||
350 | #endif | ||
351 | |||
352 | |||
353 | /* | ||
354 | * AC97 | ||
355 | */ | ||
356 | static struct ac97c_platform_data cap9adk_ac97_data = { | ||
357 | .reset_pin = -EINVAL, | ||
358 | }; | ||
359 | |||
360 | |||
361 | static void __init cap9adk_board_init(void) | ||
362 | { | ||
363 | /* Serial */ | ||
364 | at91_add_device_serial(); | ||
365 | /* USB Host */ | ||
366 | at91_add_device_usbh(&cap9adk_usbh_data); | ||
367 | /* USB HS */ | ||
368 | at91_add_device_usba(&cap9adk_usba_udc_data); | ||
369 | /* SPI */ | ||
370 | at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices)); | ||
371 | /* Touchscreen */ | ||
372 | cap9adk_add_device_ts(); | ||
373 | /* MMC */ | ||
374 | at91_add_device_mmc(1, &cap9adk_mmc_data); | ||
375 | /* Ethernet */ | ||
376 | at91_add_device_eth(&cap9adk_macb_data); | ||
377 | /* NAND */ | ||
378 | cap9adk_add_device_nand(); | ||
379 | /* NOR Flash */ | ||
380 | cap9adk_add_device_nor(); | ||
381 | /* I2C */ | ||
382 | at91_add_device_i2c(NULL, 0); | ||
383 | /* LCD Controller */ | ||
384 | at91_add_device_lcdc(&cap9adk_lcdc_data); | ||
385 | /* AC97 */ | ||
386 | at91_add_device_ac97(&cap9adk_ac97_data); | ||
387 | } | ||
388 | |||
389 | MACHINE_START(AT91CAP9ADK, "Atmel AT91CAP9A-DK") | ||
390 | /* Maintainer: Stelian Pop <stelian.pop@leadtechdesign.com> */ | ||
391 | .timer = &at91sam926x_timer, | ||
392 | .map_io = at91_map_io, | ||
393 | .init_early = cap9adk_init_early, | ||
394 | .init_irq = at91_init_irq_default, | ||
395 | .init_machine = cap9adk_board_init, | ||
396 | MACHINE_END | ||
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 61873f3aa92d..aa04e22a9da6 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c | |||
@@ -47,8 +47,7 @@ | |||
47 | /* | 47 | /* |
48 | * Chips have some kind of clocks : group them by functionality | 48 | * Chips have some kind of clocks : group them by functionality |
49 | */ | 49 | */ |
50 | #define cpu_has_utmi() ( cpu_is_at91cap9() \ | 50 | #define cpu_has_utmi() ( cpu_is_at91sam9rl() \ |
51 | || cpu_is_at91sam9rl() \ | ||
52 | || cpu_is_at91sam9g45()) | 51 | || cpu_is_at91sam9g45()) |
53 | 52 | ||
54 | #define cpu_has_800M_plla() ( cpu_is_at91sam9g20() \ | 53 | #define cpu_has_800M_plla() ( cpu_is_at91sam9g20() \ |
@@ -602,8 +601,6 @@ static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock) | |||
602 | cpu_is_at91sam9g10()) { | 601 | cpu_is_at91sam9g10()) { |
603 | uhpck.pmc_mask = AT91SAM926x_PMC_UHP; | 602 | uhpck.pmc_mask = AT91SAM926x_PMC_UHP; |
604 | udpck.pmc_mask = AT91SAM926x_PMC_UDP; | 603 | udpck.pmc_mask = AT91SAM926x_PMC_UDP; |
605 | } else if (cpu_is_at91cap9()) { | ||
606 | uhpck.pmc_mask = AT91CAP9_PMC_UHP; | ||
607 | } | 604 | } |
608 | at91_sys_write(AT91_CKGR_PLLBR, 0); | 605 | at91_sys_write(AT91_CKGR_PLLBR, 0); |
609 | 606 | ||
diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c index a851e6c98421..555d956b3a57 100644 --- a/arch/arm/mach-at91/cpuidle.c +++ b/arch/arm/mach-at91/cpuidle.c | |||
@@ -39,20 +39,15 @@ static int at91_enter_idle(struct cpuidle_device *dev, | |||
39 | { | 39 | { |
40 | struct timeval before, after; | 40 | struct timeval before, after; |
41 | int idle_time; | 41 | int idle_time; |
42 | u32 saved_lpr; | ||
43 | 42 | ||
44 | local_irq_disable(); | 43 | local_irq_disable(); |
45 | do_gettimeofday(&before); | 44 | do_gettimeofday(&before); |
46 | if (index == 0) | 45 | if (index == 0) |
47 | /* Wait for interrupt state */ | 46 | /* Wait for interrupt state */ |
48 | cpu_do_idle(); | 47 | cpu_do_idle(); |
49 | else if (index == 1) { | 48 | else if (index == 1) |
50 | asm("b 1f; .align 5; 1:"); | 49 | at91_standby(); |
51 | asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ | 50 | |
52 | saved_lpr = sdram_selfrefresh_enable(); | ||
53 | cpu_do_idle(); | ||
54 | sdram_selfrefresh_disable(saved_lpr); | ||
55 | } | ||
56 | do_gettimeofday(&after); | 51 | do_gettimeofday(&after); |
57 | local_irq_enable(); | 52 | local_irq_enable(); |
58 | idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC + | 53 | idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC + |
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index 594133451c0c..7e8280e798c1 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h | |||
@@ -45,7 +45,6 @@ extern void __init at91sam9261_set_console_clock(int id); | |||
45 | extern void __init at91sam9263_set_console_clock(int id); | 45 | extern void __init at91sam9263_set_console_clock(int id); |
46 | extern void __init at91sam9rl_set_console_clock(int id); | 46 | extern void __init at91sam9rl_set_console_clock(int id); |
47 | extern void __init at91sam9g45_set_console_clock(int id); | 47 | extern void __init at91sam9g45_set_console_clock(int id); |
48 | extern void __init at91cap9_set_console_clock(int id); | ||
49 | #ifdef CONFIG_AT91_PMC_UNIT | 48 | #ifdef CONFIG_AT91_PMC_UNIT |
50 | extern int __init at91_clock_init(unsigned long main_clock); | 49 | extern int __init at91_clock_init(unsigned long main_clock); |
51 | #else | 50 | #else |
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h index e46f93e34aab..dbdd6ae473d5 100644 --- a/arch/arm/mach-at91/include/mach/at91_pmc.h +++ b/arch/arm/mach-at91/include/mach/at91_pmc.h | |||
@@ -23,10 +23,8 @@ | |||
23 | #define AT91_PMC_PCK (1 << 0) /* Processor Clock */ | 23 | #define AT91_PMC_PCK (1 << 0) /* Processor Clock */ |
24 | #define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */ | 24 | #define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */ |
25 | #define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */ | 25 | #define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */ |
26 | #define AT91CAP9_PMC_DDR (1 << 2) /* DDR Clock [CAP9 revC & some SAM9 only] */ | ||
27 | #define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */ | 26 | #define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */ |
28 | #define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */ | 27 | #define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */ |
29 | #define AT91CAP9_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91CAP9 only] */ | ||
30 | #define AT91SAM926x_PMC_UDP (1 << 7) /* USB Devcice Port Clock [AT91SAM926x only] */ | 28 | #define AT91SAM926x_PMC_UDP (1 << 7) /* USB Devcice Port Clock [AT91SAM926x only] */ |
31 | #define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */ | 29 | #define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */ |
32 | #define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */ | 30 | #define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */ |
@@ -40,7 +38,7 @@ | |||
40 | #define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */ | 38 | #define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */ |
41 | #define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */ | 39 | #define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */ |
42 | 40 | ||
43 | #define AT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock Register [some SAM9, CAP9] */ | 41 | #define AT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock Register [some SAM9] */ |
44 | #define AT91_PMC_UPLLEN (1 << 16) /* UTMI PLL Enable */ | 42 | #define AT91_PMC_UPLLEN (1 << 16) /* UTMI PLL Enable */ |
45 | #define AT91_PMC_UPLLCOUNT (0xf << 20) /* UTMI PLL Start-up Time */ | 43 | #define AT91_PMC_UPLLCOUNT (0xf << 20) /* UTMI PLL Start-up Time */ |
46 | #define AT91_PMC_BIASEN (1 << 24) /* UTMI BIAS Enable */ | 44 | #define AT91_PMC_BIASEN (1 << 24) /* UTMI BIAS Enable */ |
@@ -48,7 +46,7 @@ | |||
48 | 46 | ||
49 | #define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */ | 47 | #define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */ |
50 | #define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ | 48 | #define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ |
51 | #define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [SAM9x, CAP9] */ | 49 | #define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [SAM9x] */ |
52 | #define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ | 50 | #define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ |
53 | 51 | ||
54 | #define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */ | 52 | #define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */ |
@@ -87,7 +85,7 @@ | |||
87 | #define AT91RM9200_PMC_MDIV_2 (1 << 8) | 85 | #define AT91RM9200_PMC_MDIV_2 (1 << 8) |
88 | #define AT91RM9200_PMC_MDIV_3 (2 << 8) | 86 | #define AT91RM9200_PMC_MDIV_3 (2 << 8) |
89 | #define AT91RM9200_PMC_MDIV_4 (3 << 8) | 87 | #define AT91RM9200_PMC_MDIV_4 (3 << 8) |
90 | #define AT91SAM9_PMC_MDIV_1 (0 << 8) /* [SAM9,CAP9 only] */ | 88 | #define AT91SAM9_PMC_MDIV_1 (0 << 8) /* [SAM9 only] */ |
91 | #define AT91SAM9_PMC_MDIV_2 (1 << 8) | 89 | #define AT91SAM9_PMC_MDIV_2 (1 << 8) |
92 | #define AT91SAM9_PMC_MDIV_4 (2 << 8) | 90 | #define AT91SAM9_PMC_MDIV_4 (2 << 8) |
93 | #define AT91SAM9_PMC_MDIV_6 (3 << 8) /* [some SAM9 only] */ | 91 | #define AT91SAM9_PMC_MDIV_6 (3 << 8) /* [some SAM9 only] */ |
@@ -117,17 +115,15 @@ | |||
117 | #define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */ | 115 | #define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */ |
118 | #define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ | 116 | #define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ |
119 | #define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ | 117 | #define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ |
120 | #define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [some SAM9, AT91CAP9 only] */ | 118 | #define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [some SAM9] */ |
121 | #define AT91_PMC_OSCSEL (1 << 7) /* Slow Clock Oscillator [AT91CAP9 revC only] */ | ||
122 | #define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ | 119 | #define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ |
123 | #define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ | 120 | #define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ |
124 | #define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ | 121 | #define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ |
125 | #define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */ | 122 | #define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */ |
126 | #define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */ | 123 | #define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */ |
127 | 124 | ||
128 | #define AT91_PMC_PROT (AT91_PMC + 0xe4) /* Protect Register [AT91CAP9 revC only] */ | 125 | #define AT91_PMC_PROT (AT91_PMC + 0xe4) /* Write Protect Mode Register [some SAM9] */ |
129 | #define AT91_PMC_PROTKEY 0x504d4301 /* Activation Code */ | 126 | #define AT91_PMC_PROTKEY 0x504d4301 /* Activation Code */ |
130 | 127 | ||
131 | #define AT91_PMC_VER (AT91_PMC + 0xfc) /* PMC Module Version [AT91CAP9 only] */ | ||
132 | 128 | ||
133 | #endif | 129 | #endif |
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h deleted file mode 100644 index 61d952902f2b..000000000000 --- a/arch/arm/mach-at91/include/mach/at91cap9.h +++ /dev/null | |||
@@ -1,122 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-at91/include/mach/at91cap9.h | ||
3 | * | ||
4 | * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> | ||
5 | * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> | ||
6 | * Copyright (C) 2007 Atmel Corporation. | ||
7 | * | ||
8 | * Common definitions. | ||
9 | * Based on AT91CAP9 datasheet revision B (Preliminary). | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License as published by | ||
13 | * the Free Software Foundation; either version 2 of the License, or | ||
14 | * (at your option) any later version. | ||
15 | */ | ||
16 | |||
17 | #ifndef AT91CAP9_H | ||
18 | #define AT91CAP9_H | ||
19 | |||
20 | /* | ||
21 | * Peripheral identifiers/interrupts. | ||
22 | */ | ||
23 | #define AT91CAP9_ID_PIOABCD 2 /* Parallel IO Controller A, B, C and D */ | ||
24 | #define AT91CAP9_ID_MPB0 3 /* MP Block Peripheral 0 */ | ||
25 | #define AT91CAP9_ID_MPB1 4 /* MP Block Peripheral 1 */ | ||
26 | #define AT91CAP9_ID_MPB2 5 /* MP Block Peripheral 2 */ | ||
27 | #define AT91CAP9_ID_MPB3 6 /* MP Block Peripheral 3 */ | ||
28 | #define AT91CAP9_ID_MPB4 7 /* MP Block Peripheral 4 */ | ||
29 | #define AT91CAP9_ID_US0 8 /* USART 0 */ | ||
30 | #define AT91CAP9_ID_US1 9 /* USART 1 */ | ||
31 | #define AT91CAP9_ID_US2 10 /* USART 2 */ | ||
32 | #define AT91CAP9_ID_MCI0 11 /* Multimedia Card Interface 0 */ | ||
33 | #define AT91CAP9_ID_MCI1 12 /* Multimedia Card Interface 1 */ | ||
34 | #define AT91CAP9_ID_CAN 13 /* CAN */ | ||
35 | #define AT91CAP9_ID_TWI 14 /* Two-Wire Interface */ | ||
36 | #define AT91CAP9_ID_SPI0 15 /* Serial Peripheral Interface 0 */ | ||
37 | #define AT91CAP9_ID_SPI1 16 /* Serial Peripheral Interface 0 */ | ||
38 | #define AT91CAP9_ID_SSC0 17 /* Serial Synchronous Controller 0 */ | ||
39 | #define AT91CAP9_ID_SSC1 18 /* Serial Synchronous Controller 1 */ | ||
40 | #define AT91CAP9_ID_AC97C 19 /* AC97 Controller */ | ||
41 | #define AT91CAP9_ID_TCB 20 /* Timer Counter 0, 1 and 2 */ | ||
42 | #define AT91CAP9_ID_PWMC 21 /* Pulse Width Modulation Controller */ | ||
43 | #define AT91CAP9_ID_EMAC 22 /* Ethernet */ | ||
44 | #define AT91CAP9_ID_AESTDES 23 /* Advanced Encryption Standard, Triple DES */ | ||
45 | #define AT91CAP9_ID_ADC 24 /* Analog-to-Digital Converter */ | ||
46 | #define AT91CAP9_ID_ISI 25 /* Image Sensor Interface */ | ||
47 | #define AT91CAP9_ID_LCDC 26 /* LCD Controller */ | ||
48 | #define AT91CAP9_ID_DMA 27 /* DMA Controller */ | ||
49 | #define AT91CAP9_ID_UDPHS 28 /* USB High Speed Device Port */ | ||
50 | #define AT91CAP9_ID_UHP 29 /* USB Host Port */ | ||
51 | #define AT91CAP9_ID_IRQ0 30 /* Advanced Interrupt Controller (IRQ0) */ | ||
52 | #define AT91CAP9_ID_IRQ1 31 /* Advanced Interrupt Controller (IRQ1) */ | ||
53 | |||
54 | /* | ||
55 | * User Peripheral physical base addresses. | ||
56 | */ | ||
57 | #define AT91CAP9_BASE_UDPHS 0xfff78000 | ||
58 | #define AT91CAP9_BASE_TCB0 0xfff7c000 | ||
59 | #define AT91CAP9_BASE_TC0 0xfff7c000 | ||
60 | #define AT91CAP9_BASE_TC1 0xfff7c040 | ||
61 | #define AT91CAP9_BASE_TC2 0xfff7c080 | ||
62 | #define AT91CAP9_BASE_MCI0 0xfff80000 | ||
63 | #define AT91CAP9_BASE_MCI1 0xfff84000 | ||
64 | #define AT91CAP9_BASE_TWI 0xfff88000 | ||
65 | #define AT91CAP9_BASE_US0 0xfff8c000 | ||
66 | #define AT91CAP9_BASE_US1 0xfff90000 | ||
67 | #define AT91CAP9_BASE_US2 0xfff94000 | ||
68 | #define AT91CAP9_BASE_SSC0 0xfff98000 | ||
69 | #define AT91CAP9_BASE_SSC1 0xfff9c000 | ||
70 | #define AT91CAP9_BASE_AC97C 0xfffa0000 | ||
71 | #define AT91CAP9_BASE_SPI0 0xfffa4000 | ||
72 | #define AT91CAP9_BASE_SPI1 0xfffa8000 | ||
73 | #define AT91CAP9_BASE_CAN 0xfffac000 | ||
74 | #define AT91CAP9_BASE_PWMC 0xfffb8000 | ||
75 | #define AT91CAP9_BASE_EMAC 0xfffbc000 | ||
76 | #define AT91CAP9_BASE_ADC 0xfffc0000 | ||
77 | #define AT91CAP9_BASE_ISI 0xfffc4000 | ||
78 | |||
79 | /* | ||
80 | * System Peripherals (offset from AT91_BASE_SYS) | ||
81 | */ | ||
82 | #define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS) | ||
83 | #define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) | ||
84 | #define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) | ||
85 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | ||
86 | #define AT91_GPBR (cpu_is_at91cap9_revB() ? \ | ||
87 | (0xfffffd50 - AT91_BASE_SYS) : \ | ||
88 | (0xfffffd60 - AT91_BASE_SYS)) | ||
89 | |||
90 | #define AT91CAP9_BASE_ECC 0xffffe200 | ||
91 | #define AT91CAP9_BASE_DMA 0xffffec00 | ||
92 | #define AT91CAP9_BASE_SMC 0xffffe800 | ||
93 | #define AT91CAP9_BASE_DBGU AT91_BASE_DBGU1 | ||
94 | #define AT91CAP9_BASE_PIOA 0xfffff200 | ||
95 | #define AT91CAP9_BASE_PIOB 0xfffff400 | ||
96 | #define AT91CAP9_BASE_PIOC 0xfffff600 | ||
97 | #define AT91CAP9_BASE_PIOD 0xfffff800 | ||
98 | #define AT91CAP9_BASE_RSTC 0xfffffd00 | ||
99 | #define AT91CAP9_BASE_SHDWC 0xfffffd10 | ||
100 | #define AT91CAP9_BASE_RTT 0xfffffd20 | ||
101 | #define AT91CAP9_BASE_PIT 0xfffffd30 | ||
102 | #define AT91CAP9_BASE_WDT 0xfffffd40 | ||
103 | |||
104 | #define AT91_USART0 AT91CAP9_BASE_US0 | ||
105 | #define AT91_USART1 AT91CAP9_BASE_US1 | ||
106 | #define AT91_USART2 AT91CAP9_BASE_US2 | ||
107 | |||
108 | |||
109 | /* | ||
110 | * Internal Memory. | ||
111 | */ | ||
112 | #define AT91CAP9_SRAM_BASE 0x00100000 /* Internal SRAM base address */ | ||
113 | #define AT91CAP9_SRAM_SIZE (32 * SZ_1K) /* Internal SRAM size (32Kb) */ | ||
114 | |||
115 | #define AT91CAP9_ROM_BASE 0x00400000 /* Internal ROM base address */ | ||
116 | #define AT91CAP9_ROM_SIZE (32 * SZ_1K) /* Internal ROM size (32Kb) */ | ||
117 | |||
118 | #define AT91CAP9_LCDC_BASE 0x00500000 /* LCD Controller */ | ||
119 | #define AT91CAP9_UDPHS_FIFO 0x00600000 /* USB High Speed Device Port */ | ||
120 | #define AT91CAP9_UHP_BASE 0x00700000 /* USB Host controller */ | ||
121 | |||
122 | #endif | ||
diff --git a/arch/arm/mach-at91/include/mach/at91cap9_matrix.h b/arch/arm/mach-at91/include/mach/at91cap9_matrix.h deleted file mode 100644 index 4b9d4aff4b4f..000000000000 --- a/arch/arm/mach-at91/include/mach/at91cap9_matrix.h +++ /dev/null | |||
@@ -1,137 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-at91/include/mach/at91cap9_matrix.h | ||
3 | * | ||
4 | * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> | ||
5 | * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> | ||
6 | * Copyright (C) 2006 Atmel Corporation. | ||
7 | * | ||
8 | * Memory Controllers (MATRIX, EBI) - System peripherals registers. | ||
9 | * Based on AT91CAP9 datasheet revision B (Preliminary). | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License as published by | ||
13 | * the Free Software Foundation; either version 2 of the License, or | ||
14 | * (at your option) any later version. | ||
15 | */ | ||
16 | |||
17 | #ifndef AT91CAP9_MATRIX_H | ||
18 | #define AT91CAP9_MATRIX_H | ||
19 | |||
20 | #define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ | ||
21 | #define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ | ||
22 | #define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ | ||
23 | #define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ | ||
24 | #define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ | ||
25 | #define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ | ||
26 | #define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */ | ||
27 | #define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */ | ||
28 | #define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */ | ||
29 | #define AT91_MATRIX_MCFG9 (AT91_MATRIX + 0x24) /* Master Configuration Register 9 */ | ||
30 | #define AT91_MATRIX_MCFG10 (AT91_MATRIX + 0x28) /* Master Configuration Register 10 */ | ||
31 | #define AT91_MATRIX_MCFG11 (AT91_MATRIX + 0x2C) /* Master Configuration Register 11 */ | ||
32 | #define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ | ||
33 | #define AT91_MATRIX_ULBT_INFINITE (0 << 0) | ||
34 | #define AT91_MATRIX_ULBT_SINGLE (1 << 0) | ||
35 | #define AT91_MATRIX_ULBT_FOUR (2 << 0) | ||
36 | #define AT91_MATRIX_ULBT_EIGHT (3 << 0) | ||
37 | #define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) | ||
38 | |||
39 | #define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ | ||
40 | #define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ | ||
41 | #define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ | ||
42 | #define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ | ||
43 | #define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ | ||
44 | #define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ | ||
45 | #define AT91_MATRIX_SCFG6 (AT91_MATRIX + 0x58) /* Slave Configuration Register 6 */ | ||
46 | #define AT91_MATRIX_SCFG7 (AT91_MATRIX + 0x5C) /* Slave Configuration Register 7 */ | ||
47 | #define AT91_MATRIX_SCFG8 (AT91_MATRIX + 0x60) /* Slave Configuration Register 8 */ | ||
48 | #define AT91_MATRIX_SCFG9 (AT91_MATRIX + 0x64) /* Slave Configuration Register 9 */ | ||
49 | #define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ | ||
50 | #define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ | ||
51 | #define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) | ||
52 | #define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) | ||
53 | #define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) | ||
54 | #define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ | ||
55 | #define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ | ||
56 | #define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) | ||
57 | #define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) | ||
58 | |||
59 | #define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ | ||
60 | #define AT91_MATRIX_PRBS0 (AT91_MATRIX + 0x84) /* Priority Register B for Slave 0 */ | ||
61 | #define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ | ||
62 | #define AT91_MATRIX_PRBS1 (AT91_MATRIX + 0x8C) /* Priority Register B for Slave 1 */ | ||
63 | #define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ | ||
64 | #define AT91_MATRIX_PRBS2 (AT91_MATRIX + 0x94) /* Priority Register B for Slave 2 */ | ||
65 | #define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ | ||
66 | #define AT91_MATRIX_PRBS3 (AT91_MATRIX + 0x9C) /* Priority Register B for Slave 3 */ | ||
67 | #define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ | ||
68 | #define AT91_MATRIX_PRBS4 (AT91_MATRIX + 0xA4) /* Priority Register B for Slave 4 */ | ||
69 | #define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ | ||
70 | #define AT91_MATRIX_PRBS5 (AT91_MATRIX + 0xAC) /* Priority Register B for Slave 5 */ | ||
71 | #define AT91_MATRIX_PRAS6 (AT91_MATRIX + 0xB0) /* Priority Register A for Slave 6 */ | ||
72 | #define AT91_MATRIX_PRBS6 (AT91_MATRIX + 0xB4) /* Priority Register B for Slave 6 */ | ||
73 | #define AT91_MATRIX_PRAS7 (AT91_MATRIX + 0xB8) /* Priority Register A for Slave 7 */ | ||
74 | #define AT91_MATRIX_PRBS7 (AT91_MATRIX + 0xBC) /* Priority Register B for Slave 7 */ | ||
75 | #define AT91_MATRIX_PRAS8 (AT91_MATRIX + 0xC0) /* Priority Register A for Slave 8 */ | ||
76 | #define AT91_MATRIX_PRBS8 (AT91_MATRIX + 0xC4) /* Priority Register B for Slave 8 */ | ||
77 | #define AT91_MATRIX_PRAS9 (AT91_MATRIX + 0xC8) /* Priority Register A for Slave 9 */ | ||
78 | #define AT91_MATRIX_PRBS9 (AT91_MATRIX + 0xCC) /* Priority Register B for Slave 9 */ | ||
79 | #define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ | ||
80 | #define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ | ||
81 | #define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ | ||
82 | #define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ | ||
83 | #define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ | ||
84 | #define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ | ||
85 | #define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */ | ||
86 | #define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */ | ||
87 | #define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */ | ||
88 | #define AT91_MATRIX_M9PR (3 << 4) /* Master 9 Priority (in Register B) */ | ||
89 | #define AT91_MATRIX_M10PR (3 << 8) /* Master 10 Priority (in Register B) */ | ||
90 | #define AT91_MATRIX_M11PR (3 << 12) /* Master 11 Priority (in Register B) */ | ||
91 | |||
92 | #define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ | ||
93 | #define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ | ||
94 | #define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ | ||
95 | #define AT91_MATRIX_RCB2 (1 << 2) | ||
96 | #define AT91_MATRIX_RCB3 (1 << 3) | ||
97 | #define AT91_MATRIX_RCB4 (1 << 4) | ||
98 | #define AT91_MATRIX_RCB5 (1 << 5) | ||
99 | #define AT91_MATRIX_RCB6 (1 << 6) | ||
100 | #define AT91_MATRIX_RCB7 (1 << 7) | ||
101 | #define AT91_MATRIX_RCB8 (1 << 8) | ||
102 | #define AT91_MATRIX_RCB9 (1 << 9) | ||
103 | #define AT91_MATRIX_RCB10 (1 << 10) | ||
104 | #define AT91_MATRIX_RCB11 (1 << 11) | ||
105 | |||
106 | #define AT91_MPBS0_SFR (AT91_MATRIX + 0x114) /* MPBlock Slave 0 Special Function Register */ | ||
107 | #define AT91_MPBS1_SFR (AT91_MATRIX + 0x11C) /* MPBlock Slave 1 Special Function Register */ | ||
108 | |||
109 | #define AT91_MATRIX_UDPHS (AT91_MATRIX + 0x118) /* USBHS Special Function Register [AT91CAP9 only] */ | ||
110 | #define AT91_MATRIX_SELECT_UDPHS (0 << 31) /* select High Speed UDP */ | ||
111 | #define AT91_MATRIX_SELECT_UDP (1 << 31) /* select standard UDP */ | ||
112 | #define AT91_MATRIX_UDPHS_BYPASS_LOCK (1 << 30) /* bypass lock bit */ | ||
113 | |||
114 | #define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI Chip Select Assignment Register */ | ||
115 | #define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */ | ||
116 | #define AT91_MATRIX_EBI_CS1A_SMC (0 << 1) | ||
117 | #define AT91_MATRIX_EBI_CS1A_BCRAMC (1 << 1) | ||
118 | #define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */ | ||
119 | #define AT91_MATRIX_EBI_CS3A_SMC (0 << 3) | ||
120 | #define AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA (1 << 3) | ||
121 | #define AT91_MATRIX_EBI_CS4A (1 << 4) /* Chip Select 4 Assignment */ | ||
122 | #define AT91_MATRIX_EBI_CS4A_SMC (0 << 4) | ||
123 | #define AT91_MATRIX_EBI_CS4A_SMC_CF1 (1 << 4) | ||
124 | #define AT91_MATRIX_EBI_CS5A (1 << 5) /* Chip Select 5 Assignment */ | ||
125 | #define AT91_MATRIX_EBI_CS5A_SMC (0 << 5) | ||
126 | #define AT91_MATRIX_EBI_CS5A_SMC_CF2 (1 << 5) | ||
127 | #define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ | ||
128 | #define AT91_MATRIX_EBI_DQSPDC (1 << 9) /* Data Qualifier Strobe Pull-Down Configuration */ | ||
129 | #define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */ | ||
130 | #define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16) | ||
131 | #define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16) | ||
132 | |||
133 | #define AT91_MPBS2_SFR (AT91_MATRIX + 0x12C) /* MPBlock Slave 2 Special Function Register */ | ||
134 | #define AT91_MPBS3_SFR (AT91_MATRIX + 0x130) /* MPBlock Slave 3 Special Function Register */ | ||
135 | #define AT91_APB_SFR (AT91_MATRIX + 0x134) /* APB Bridge Special Function Register */ | ||
136 | |||
137 | #endif | ||
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h index e2f8da8ce5bc..5d4a9f846584 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h +++ b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h | |||
@@ -59,7 +59,6 @@ | |||
59 | #define AT91_DDRSDRC_TRP (0xf << 16) /* Row precharge delay */ | 59 | #define AT91_DDRSDRC_TRP (0xf << 16) /* Row precharge delay */ |
60 | #define AT91_DDRSDRC_TRRD (0xf << 20) /* Active BankA to BankB */ | 60 | #define AT91_DDRSDRC_TRRD (0xf << 20) /* Active BankA to BankB */ |
61 | #define AT91_DDRSDRC_TWTR (0x7 << 24) /* Internal Write to Read delay */ | 61 | #define AT91_DDRSDRC_TWTR (0x7 << 24) /* Internal Write to Read delay */ |
62 | #define AT91CAP9_DDRSDRC_TWTR (1 << 24) /* Internal Write to Read delay */ | ||
63 | #define AT91_DDRSDRC_RED_WRRD (0x1 << 27) /* Reduce Write to Read Delay [SAM9 Only] */ | 62 | #define AT91_DDRSDRC_RED_WRRD (0x1 << 27) /* Reduce Write to Read Delay [SAM9 Only] */ |
64 | #define AT91_DDRSDRC_TMRD (0xf << 28) /* Load mode to active/refresh delay */ | 63 | #define AT91_DDRSDRC_TMRD (0xf << 28) /* Load mode to active/refresh delay */ |
65 | 64 | ||
@@ -76,7 +75,6 @@ | |||
76 | #define AT91_DDRSDRC_TRTP (0x7 << 12) /* Read to Precharge delay */ | 75 | #define AT91_DDRSDRC_TRTP (0x7 << 12) /* Read to Precharge delay */ |
77 | 76 | ||
78 | #define AT91_DDRSDRC_LPR 0x1C /* Low Power Register */ | 77 | #define AT91_DDRSDRC_LPR 0x1C /* Low Power Register */ |
79 | #define AT91CAP9_DDRSDRC_LPR 0x18 /* Low Power Register */ | ||
80 | #define AT91_DDRSDRC_LPCB (3 << 0) /* Low-power Configurations */ | 78 | #define AT91_DDRSDRC_LPCB (3 << 0) /* Low-power Configurations */ |
81 | #define AT91_DDRSDRC_LPCB_DISABLE 0 | 79 | #define AT91_DDRSDRC_LPCB_DISABLE 0 |
82 | #define AT91_DDRSDRC_LPCB_SELF_REFRESH 1 | 80 | #define AT91_DDRSDRC_LPCB_SELF_REFRESH 1 |
@@ -94,11 +92,9 @@ | |||
94 | #define AT91_DDRSDRC_UPD_MR (3 << 20) /* Update load mode register and extended mode register */ | 92 | #define AT91_DDRSDRC_UPD_MR (3 << 20) /* Update load mode register and extended mode register */ |
95 | 93 | ||
96 | #define AT91_DDRSDRC_MDR 0x20 /* Memory Device Register */ | 94 | #define AT91_DDRSDRC_MDR 0x20 /* Memory Device Register */ |
97 | #define AT91CAP9_DDRSDRC_MDR 0x1C /* Memory Device Register */ | ||
98 | #define AT91_DDRSDRC_MD (3 << 0) /* Memory Device Type */ | 95 | #define AT91_DDRSDRC_MD (3 << 0) /* Memory Device Type */ |
99 | #define AT91_DDRSDRC_MD_SDR 0 | 96 | #define AT91_DDRSDRC_MD_SDR 0 |
100 | #define AT91_DDRSDRC_MD_LOW_POWER_SDR 1 | 97 | #define AT91_DDRSDRC_MD_LOW_POWER_SDR 1 |
101 | #define AT91CAP9_DDRSDRC_MD_DDR 2 | ||
102 | #define AT91_DDRSDRC_MD_LOW_POWER_DDR 3 | 98 | #define AT91_DDRSDRC_MD_LOW_POWER_DDR 3 |
103 | #define AT91_DDRSDRC_MD_DDR2 6 /* [SAM9 Only] */ | 99 | #define AT91_DDRSDRC_MD_DDR2 6 /* [SAM9 Only] */ |
104 | #define AT91_DDRSDRC_DBW (1 << 4) /* Data Bus Width */ | 100 | #define AT91_DDRSDRC_DBW (1 << 4) /* Data Bus Width */ |
@@ -106,16 +102,10 @@ | |||
106 | #define AT91_DDRSDRC_DBW_16BITS (1 << 4) | 102 | #define AT91_DDRSDRC_DBW_16BITS (1 << 4) |
107 | 103 | ||
108 | #define AT91_DDRSDRC_DLL 0x24 /* DLL Information Register */ | 104 | #define AT91_DDRSDRC_DLL 0x24 /* DLL Information Register */ |
109 | #define AT91CAP9_DDRSDRC_DLL 0x20 /* DLL Information Register */ | ||
110 | #define AT91_DDRSDRC_MDINC (1 << 0) /* Master Delay increment */ | 105 | #define AT91_DDRSDRC_MDINC (1 << 0) /* Master Delay increment */ |
111 | #define AT91_DDRSDRC_MDDEC (1 << 1) /* Master Delay decrement */ | 106 | #define AT91_DDRSDRC_MDDEC (1 << 1) /* Master Delay decrement */ |
112 | #define AT91_DDRSDRC_MDOVF (1 << 2) /* Master Delay Overflow */ | 107 | #define AT91_DDRSDRC_MDOVF (1 << 2) /* Master Delay Overflow */ |
113 | #define AT91CAP9_DDRSDRC_SDCOVF (1 << 3) /* Slave Delay Correction Overflow */ | ||
114 | #define AT91CAP9_DDRSDRC_SDCUDF (1 << 4) /* Slave Delay Correction Underflow */ | ||
115 | #define AT91CAP9_DDRSDRC_SDERF (1 << 5) /* Slave Delay Correction error */ | ||
116 | #define AT91_DDRSDRC_MDVAL (0xff << 8) /* Master Delay value */ | 108 | #define AT91_DDRSDRC_MDVAL (0xff << 8) /* Master Delay value */ |
117 | #define AT91CAP9_DDRSDRC_SDVAL (0xff << 16) /* Slave Delay value */ | ||
118 | #define AT91CAP9_DDRSDRC_SDCVAL (0xff << 24) /* Slave Delay Correction value */ | ||
119 | 109 | ||
120 | #define AT91_DDRSDRC_HS 0x2C /* High Speed Register [SAM9 Only] */ | 110 | #define AT91_DDRSDRC_HS 0x2C /* High Speed Register [SAM9 Only] */ |
121 | #define AT91_DDRSDRC_DIS_ATCP_RD (1 << 2) /* Anticip read access is disabled */ | 111 | #define AT91_DDRSDRC_DIS_ATCP_RD (1 << 2) /* Anticip read access is disabled */ |
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h index f6ce936dba2b..0118c3338552 100644 --- a/arch/arm/mach-at91/include/mach/cpu.h +++ b/arch/arm/mach-at91/include/mach/cpu.h | |||
@@ -25,7 +25,6 @@ | |||
25 | #define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */ | 25 | #define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */ |
26 | #define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */ | 26 | #define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */ |
27 | #define ARCH_ID_AT91SAM9X5 0x819a05a0 | 27 | #define ARCH_ID_AT91SAM9X5 0x819a05a0 |
28 | #define ARCH_ID_AT91CAP9 0x039A03A0 | ||
29 | 28 | ||
30 | #define ARCH_ID_AT91SAM9XE128 0x329973a0 | 29 | #define ARCH_ID_AT91SAM9XE128 0x329973a0 |
31 | #define ARCH_ID_AT91SAM9XE256 0x329a93a0 | 30 | #define ARCH_ID_AT91SAM9XE256 0x329a93a0 |
@@ -51,10 +50,6 @@ | |||
51 | #define ARCH_FAMILY_AT91SAM9 0x01900000 | 50 | #define ARCH_FAMILY_AT91SAM9 0x01900000 |
52 | #define ARCH_FAMILY_AT91SAM9XE 0x02900000 | 51 | #define ARCH_FAMILY_AT91SAM9XE 0x02900000 |
53 | 52 | ||
54 | /* PMC revision */ | ||
55 | #define ARCH_REVISION_CAP9_B 0x399 | ||
56 | #define ARCH_REVISION_CAP9_C 0x601 | ||
57 | |||
58 | /* RM9200 type */ | 53 | /* RM9200 type */ |
59 | #define ARCH_REVISON_9200_BGA (0 << 0) | 54 | #define ARCH_REVISON_9200_BGA (0 << 0) |
60 | #define ARCH_REVISON_9200_PQFP (1 << 0) | 55 | #define ARCH_REVISON_9200_PQFP (1 << 0) |
@@ -63,9 +58,6 @@ enum at91_soc_type { | |||
63 | /* 920T */ | 58 | /* 920T */ |
64 | AT91_SOC_RM9200, | 59 | AT91_SOC_RM9200, |
65 | 60 | ||
66 | /* CAP */ | ||
67 | AT91_SOC_CAP9, | ||
68 | |||
69 | /* SAM92xx */ | 61 | /* SAM92xx */ |
70 | AT91_SOC_SAM9260, AT91_SOC_SAM9261, AT91_SOC_SAM9263, | 62 | AT91_SOC_SAM9260, AT91_SOC_SAM9261, AT91_SOC_SAM9263, |
71 | 63 | ||
@@ -86,9 +78,6 @@ enum at91_soc_subtype { | |||
86 | /* RM9200 */ | 78 | /* RM9200 */ |
87 | AT91_SOC_RM9200_BGA, AT91_SOC_RM9200_PQFP, | 79 | AT91_SOC_RM9200_BGA, AT91_SOC_RM9200_PQFP, |
88 | 80 | ||
89 | /* CAP9 */ | ||
90 | AT91_SOC_CAP9_REV_B, AT91_SOC_CAP9_REV_C, | ||
91 | |||
92 | /* SAM9260 */ | 81 | /* SAM9260 */ |
93 | AT91_SOC_SAM9XE, | 82 | AT91_SOC_SAM9XE, |
94 | 83 | ||
@@ -195,16 +184,6 @@ static inline int at91_soc_is_detected(void) | |||
195 | #define cpu_is_at91sam9x25() (0) | 184 | #define cpu_is_at91sam9x25() (0) |
196 | #endif | 185 | #endif |
197 | 186 | ||
198 | #ifdef CONFIG_ARCH_AT91CAP9 | ||
199 | #define cpu_is_at91cap9() (at91_soc_initdata.type == AT91_SOC_CAP9) | ||
200 | #define cpu_is_at91cap9_revB() (at91_soc_initdata.subtype == AT91_SOC_CAP9_REV_B) | ||
201 | #define cpu_is_at91cap9_revC() (at91_soc_initdata.subtype == AT91_SOC_CAP9_REV_C) | ||
202 | #else | ||
203 | #define cpu_is_at91cap9() (0) | ||
204 | #define cpu_is_at91cap9_revB() (0) | ||
205 | #define cpu_is_at91cap9_revC() (0) | ||
206 | #endif | ||
207 | |||
208 | /* | 187 | /* |
209 | * Since this is ARM, we will never run on any AVR32 CPU. But these | 188 | * Since this is ARM, we will never run on any AVR32 CPU. But these |
210 | * definitions may reduce clutter in common drivers. | 189 | * definitions may reduce clutter in common drivers. |
diff --git a/arch/arm/mach-at91/include/mach/entry-macro.S b/arch/arm/mach-at91/include/mach/entry-macro.S index 423eea0ed74c..903bf205a333 100644 --- a/arch/arm/mach-at91/include/mach/entry-macro.S +++ b/arch/arm/mach-at91/include/mach/entry-macro.S | |||
@@ -13,17 +13,11 @@ | |||
13 | #include <mach/hardware.h> | 13 | #include <mach/hardware.h> |
14 | #include <mach/at91_aic.h> | 14 | #include <mach/at91_aic.h> |
15 | 15 | ||
16 | .macro disable_fiq | ||
17 | .endm | ||
18 | |||
19 | .macro get_irqnr_preamble, base, tmp | 16 | .macro get_irqnr_preamble, base, tmp |
20 | ldr \base, =at91_aic_base @ base virtual address of AIC peripheral | 17 | ldr \base, =at91_aic_base @ base virtual address of AIC peripheral |
21 | ldr \base, [\base] | 18 | ldr \base, [\base] |
22 | .endm | 19 | .endm |
23 | 20 | ||
24 | .macro arch_ret_to_user, tmp1, tmp2 | ||
25 | .endm | ||
26 | |||
27 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 21 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
28 | ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) | 22 | ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) |
29 | ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number | 23 | ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number |
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h index 2d0e4e998566..c213f28628c0 100644 --- a/arch/arm/mach-at91/include/mach/hardware.h +++ b/arch/arm/mach-at91/include/mach/hardware.h | |||
@@ -19,7 +19,7 @@ | |||
19 | /* DBGU base */ | 19 | /* DBGU base */ |
20 | /* rm9200, 9260/9g20, 9261/9g10, 9rl */ | 20 | /* rm9200, 9260/9g20, 9261/9g10, 9rl */ |
21 | #define AT91_BASE_DBGU0 0xfffff200 | 21 | #define AT91_BASE_DBGU0 0xfffff200 |
22 | /* 9263, 9g45, cap9 */ | 22 | /* 9263, 9g45 */ |
23 | #define AT91_BASE_DBGU1 0xffffee00 | 23 | #define AT91_BASE_DBGU1 0xffffee00 |
24 | 24 | ||
25 | #if defined(CONFIG_ARCH_AT91RM9200) | 25 | #if defined(CONFIG_ARCH_AT91RM9200) |
@@ -34,8 +34,6 @@ | |||
34 | #include <mach/at91sam9rl.h> | 34 | #include <mach/at91sam9rl.h> |
35 | #elif defined(CONFIG_ARCH_AT91SAM9G45) | 35 | #elif defined(CONFIG_ARCH_AT91SAM9G45) |
36 | #include <mach/at91sam9g45.h> | 36 | #include <mach/at91sam9g45.h> |
37 | #elif defined(CONFIG_ARCH_AT91CAP9) | ||
38 | #include <mach/at91cap9.h> | ||
39 | #elif defined(CONFIG_ARCH_AT91X40) | 37 | #elif defined(CONFIG_ARCH_AT91X40) |
40 | #include <mach/at91x40.h> | 38 | #include <mach/at91x40.h> |
41 | #else | 39 | #else |
diff --git a/arch/arm/mach-at91/include/mach/system.h b/arch/arm/mach-at91/include/mach/system.h deleted file mode 100644 index cbd64f3bcecd..000000000000 --- a/arch/arm/mach-at91/include/mach/system.h +++ /dev/null | |||
@@ -1,50 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-at91/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2003 SAN People | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #ifndef __ASM_ARCH_SYSTEM_H | ||
22 | #define __ASM_ARCH_SYSTEM_H | ||
23 | |||
24 | #include <mach/hardware.h> | ||
25 | #include <mach/at91_st.h> | ||
26 | #include <mach/at91_dbgu.h> | ||
27 | #include <mach/at91_pmc.h> | ||
28 | |||
29 | static inline void arch_idle(void) | ||
30 | { | ||
31 | /* | ||
32 | * Disable the processor clock. The processor will be automatically | ||
33 | * re-enabled by an interrupt or by a reset. | ||
34 | */ | ||
35 | #ifdef AT91_PS | ||
36 | at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU); | ||
37 | #else | ||
38 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
39 | #endif | ||
40 | #ifndef CONFIG_CPU_ARM920T | ||
41 | /* | ||
42 | * Set the processor (CP15) into 'Wait for Interrupt' mode. | ||
43 | * Post-RM9200 processors need this in conjunction with the above | ||
44 | * to save power when idle. | ||
45 | */ | ||
46 | cpu_do_idle(); | ||
47 | #endif | ||
48 | } | ||
49 | |||
50 | #endif | ||
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 1606379ac284..d554e6771b4e 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c | |||
@@ -150,11 +150,6 @@ static int at91_pm_verify_clocks(void) | |||
150 | pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); | 150 | pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); |
151 | return 0; | 151 | return 0; |
152 | } | 152 | } |
153 | } else if (cpu_is_at91cap9()) { | ||
154 | if ((scsr & AT91CAP9_PMC_UHP) != 0) { | ||
155 | pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); | ||
156 | return 0; | ||
157 | } | ||
158 | } | 153 | } |
159 | 154 | ||
160 | #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS | 155 | #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS |
@@ -203,7 +198,6 @@ extern u32 at91_slow_clock_sz; | |||
203 | 198 | ||
204 | static int at91_pm_enter(suspend_state_t state) | 199 | static int at91_pm_enter(suspend_state_t state) |
205 | { | 200 | { |
206 | u32 saved_lpr; | ||
207 | at91_gpio_suspend(); | 201 | at91_gpio_suspend(); |
208 | at91_irq_suspend(); | 202 | at91_irq_suspend(); |
209 | 203 | ||
@@ -259,16 +253,7 @@ static int at91_pm_enter(suspend_state_t state) | |||
259 | * For ARM 926 based chips, this requirement is weaker | 253 | * For ARM 926 based chips, this requirement is weaker |
260 | * as at91sam9 can access a RAM in self-refresh mode. | 254 | * as at91sam9 can access a RAM in self-refresh mode. |
261 | */ | 255 | */ |
262 | asm volatile ( "mov r0, #0\n\t" | 256 | at91_standby(); |
263 | "b 1f\n\t" | ||
264 | ".align 5\n\t" | ||
265 | "1: mcr p15, 0, r0, c7, c10, 4\n\t" | ||
266 | : /* no output */ | ||
267 | : /* no input */ | ||
268 | : "r0"); | ||
269 | saved_lpr = sdram_selfrefresh_enable(); | ||
270 | wait_for_interrupt_enable(); | ||
271 | sdram_selfrefresh_disable(saved_lpr); | ||
272 | break; | 257 | break; |
273 | 258 | ||
274 | case PM_SUSPEND_ON: | 259 | case PM_SUSPEND_ON: |
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h index 7eb40d24242f..bba9ce1aaaec 100644 --- a/arch/arm/mach-at91/pm.h +++ b/arch/arm/mach-at91/pm.h | |||
@@ -1,3 +1,16 @@ | |||
1 | /* | ||
2 | * AT91 Power Management | ||
3 | * | ||
4 | * Copyright (C) 2005 David Brownell | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | */ | ||
11 | #ifndef __ARCH_ARM_MACH_AT91_PM | ||
12 | #define __ARCH_ARM_MACH_AT91_PM | ||
13 | |||
1 | #ifdef CONFIG_ARCH_AT91RM9200 | 14 | #ifdef CONFIG_ARCH_AT91RM9200 |
2 | #include <mach/at91rm9200_mc.h> | 15 | #include <mach/at91rm9200_mc.h> |
3 | 16 | ||
@@ -11,36 +24,25 @@ | |||
11 | * still in self-refresh is "not recommended", but seems to work. | 24 | * still in self-refresh is "not recommended", but seems to work. |
12 | */ | 25 | */ |
13 | 26 | ||
14 | static inline u32 sdram_selfrefresh_enable(void) | 27 | static inline void at91rm9200_standby(void) |
15 | { | ||
16 | u32 saved_lpr = at91_sys_read(AT91_SDRAMC_LPR); | ||
17 | |||
18 | at91_sys_write(AT91_SDRAMC_LPR, 0); | ||
19 | at91_sys_write(AT91_SDRAMC_SRR, 1); | ||
20 | return saved_lpr; | ||
21 | } | ||
22 | |||
23 | #define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) | ||
24 | #define wait_for_interrupt_enable() asm volatile ("mcr p15, 0, %0, c7, c0, 4" \ | ||
25 | : : "r" (0)) | ||
26 | |||
27 | #elif defined(CONFIG_ARCH_AT91CAP9) | ||
28 | #include <mach/at91sam9_ddrsdr.h> | ||
29 | |||
30 | |||
31 | static inline u32 sdram_selfrefresh_enable(void) | ||
32 | { | 28 | { |
33 | u32 saved_lpr, lpr; | 29 | u32 lpr = at91_sys_read(AT91_SDRAMC_LPR); |
34 | 30 | ||
35 | saved_lpr = at91_ramc_read(0, AT91CAP9_DDRSDRC_LPR); | 31 | asm volatile( |
36 | 32 | "b 1f\n\t" | |
37 | lpr = saved_lpr & ~AT91_DDRSDRC_LPCB; | 33 | ".align 5\n\t" |
38 | at91_ramc_write(0, AT91CAP9_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH); | 34 | "1: mcr p15, 0, %0, c7, c10, 4\n\t" |
39 | return saved_lpr; | 35 | " str %0, [%1, %2]\n\t" |
36 | " str %3, [%1, %4]\n\t" | ||
37 | " mcr p15, 0, %0, c7, c0, 4\n\t" | ||
38 | " str %5, [%1, %2]" | ||
39 | : | ||
40 | : "r" (0), "r" (AT91_BASE_SYS), "r" (AT91_SDRAMC_LPR), | ||
41 | "r" (1), "r" (AT91_SDRAMC_SRR), | ||
42 | "r" (lpr)); | ||
40 | } | 43 | } |
41 | 44 | ||
42 | #define sdram_selfrefresh_disable(saved_lpr) at91_ramc_write(0, AT91CAP9_DDRSDRC_LPR, saved_lpr) | 45 | #define at91_standby at91rm9200_standby |
43 | #define wait_for_interrupt_enable() cpu_do_idle() | ||
44 | 46 | ||
45 | #elif defined(CONFIG_ARCH_AT91SAM9G45) | 47 | #elif defined(CONFIG_ARCH_AT91SAM9G45) |
46 | #include <mach/at91sam9_ddrsdr.h> | 48 | #include <mach/at91sam9_ddrsdr.h> |
@@ -48,14 +50,12 @@ static inline u32 sdram_selfrefresh_enable(void) | |||
48 | /* We manage both DDRAM/SDRAM controllers, we need more than one value to | 50 | /* We manage both DDRAM/SDRAM controllers, we need more than one value to |
49 | * remember. | 51 | * remember. |
50 | */ | 52 | */ |
51 | static u32 saved_lpr1; | 53 | static inline void at91sam9g45_standby(void) |
52 | |||
53 | static inline u32 sdram_selfrefresh_enable(void) | ||
54 | { | 54 | { |
55 | /* Those tow values allow us to delay self-refresh activation | 55 | /* Those two values allow us to delay self-refresh activation |
56 | * to the maximum. */ | 56 | * to the maximum. */ |
57 | u32 lpr0, lpr1; | 57 | u32 lpr0, lpr1; |
58 | u32 saved_lpr0; | 58 | u32 saved_lpr0, saved_lpr1; |
59 | 59 | ||
60 | saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR); | 60 | saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR); |
61 | lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB; | 61 | lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB; |
@@ -69,15 +69,13 @@ static inline u32 sdram_selfrefresh_enable(void) | |||
69 | at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0); | 69 | at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0); |
70 | at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1); | 70 | at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1); |
71 | 71 | ||
72 | return saved_lpr0; | 72 | cpu_do_idle(); |
73 | |||
74 | at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); | ||
75 | at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); | ||
73 | } | 76 | } |
74 | 77 | ||
75 | #define sdram_selfrefresh_disable(saved_lpr0) \ | 78 | #define at91_standby at91sam9g45_standby |
76 | do { \ | ||
77 | at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); \ | ||
78 | at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); \ | ||
79 | } while (0) | ||
80 | #define wait_for_interrupt_enable() cpu_do_idle() | ||
81 | 79 | ||
82 | #else | 80 | #else |
83 | #include <mach/at91sam9_sdramc.h> | 81 | #include <mach/at91sam9_sdramc.h> |
@@ -90,18 +88,23 @@ static inline u32 sdram_selfrefresh_enable(void) | |||
90 | #warning Assuming EB1 SDRAM controller is *NOT* used | 88 | #warning Assuming EB1 SDRAM controller is *NOT* used |
91 | #endif | 89 | #endif |
92 | 90 | ||
93 | static inline u32 sdram_selfrefresh_enable(void) | 91 | static inline void at91sam9_standby(void) |
94 | { | 92 | { |
95 | u32 saved_lpr, lpr; | 93 | u32 saved_lpr, lpr; |
96 | 94 | ||
97 | saved_lpr = at91_ramc_read(0, AT91_SDRAMC_LPR); | 95 | saved_lpr = at91_ramc_read(0, AT91_SDRAMC_LPR); |
98 | 96 | ||
99 | lpr = saved_lpr & ~AT91_SDRAMC_LPCB; | 97 | lpr = saved_lpr & ~AT91_SDRAMC_LPCB; |
100 | at91_ramc_write(0, AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH); | 98 | at91_ramc_write(0, AT91_SDRAMC_LPR, lpr | |
101 | return saved_lpr; | 99 | AT91_SDRAMC_LPCB_SELF_REFRESH); |
100 | |||
101 | cpu_do_idle(); | ||
102 | |||
103 | at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr); | ||
102 | } | 104 | } |
103 | 105 | ||
104 | #define sdram_selfrefresh_disable(saved_lpr) at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr) | 106 | #define at91_standby at91sam9_standby |
105 | #define wait_for_interrupt_enable() cpu_do_idle() | 107 | |
108 | #endif | ||
106 | 109 | ||
107 | #endif | 110 | #endif |
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S index 92dfb8461392..f8539a8bcd6c 100644 --- a/arch/arm/mach-at91/pm_slowclock.S +++ b/arch/arm/mach-at91/pm_slowclock.S | |||
@@ -18,8 +18,7 @@ | |||
18 | 18 | ||
19 | #if defined(CONFIG_ARCH_AT91RM9200) | 19 | #if defined(CONFIG_ARCH_AT91RM9200) |
20 | #include <mach/at91rm9200_mc.h> | 20 | #include <mach/at91rm9200_mc.h> |
21 | #elif defined(CONFIG_ARCH_AT91CAP9) \ | 21 | #elif defined(CONFIG_ARCH_AT91SAM9G45) |
22 | || defined(CONFIG_ARCH_AT91SAM9G45) | ||
23 | #include <mach/at91sam9_ddrsdr.h> | 22 | #include <mach/at91sam9_ddrsdr.h> |
24 | #else | 23 | #else |
25 | #include <mach/at91sam9_sdramc.h> | 24 | #include <mach/at91sam9_sdramc.h> |
@@ -130,8 +129,7 @@ ENTRY(at91_slow_clock) | |||
130 | /* Put SDRAM in self-refresh mode */ | 129 | /* Put SDRAM in self-refresh mode */ |
131 | mov r3, #1 | 130 | mov r3, #1 |
132 | str r3, [r2, #AT91_SDRAMC_SRR] | 131 | str r3, [r2, #AT91_SDRAMC_SRR] |
133 | #elif defined(CONFIG_ARCH_AT91CAP9) \ | 132 | #elif defined(CONFIG_ARCH_AT91SAM9G45) |
134 | || defined(CONFIG_ARCH_AT91SAM9G45) | ||
135 | 133 | ||
136 | /* prepare for DDRAM self-refresh mode */ | 134 | /* prepare for DDRAM self-refresh mode */ |
137 | ldr r3, [r2, #AT91_DDRSDRC_LPR] | 135 | ldr r3, [r2, #AT91_DDRSDRC_LPR] |
@@ -263,8 +261,7 @@ ENTRY(at91_slow_clock) | |||
263 | 261 | ||
264 | #ifdef CONFIG_ARCH_AT91RM9200 | 262 | #ifdef CONFIG_ARCH_AT91RM9200 |
265 | /* Do nothing - self-refresh is automatically disabled. */ | 263 | /* Do nothing - self-refresh is automatically disabled. */ |
266 | #elif defined(CONFIG_ARCH_AT91CAP9) \ | 264 | #elif defined(CONFIG_ARCH_AT91SAM9G45) |
267 | || defined(CONFIG_ARCH_AT91SAM9G45) | ||
268 | /* Restore LPR on AT91 with DDRAM */ | 265 | /* Restore LPR on AT91 with DDRAM */ |
269 | ldr r3, .saved_sam9_lpr | 266 | ldr r3, .saved_sam9_lpr |
270 | str r3, [r2, #AT91_DDRSDRC_LPR] | 267 | str r3, [r2, #AT91_DDRSDRC_LPR] |
@@ -305,8 +302,7 @@ ENTRY(at91_slow_clock) | |||
305 | #ifdef CONFIG_ARCH_AT91RM9200 | 302 | #ifdef CONFIG_ARCH_AT91RM9200 |
306 | .at91_va_base_sdramc: | 303 | .at91_va_base_sdramc: |
307 | .word AT91_VA_BASE_SYS | 304 | .word AT91_VA_BASE_SYS |
308 | #elif defined(CONFIG_ARCH_AT91CAP9) \ | 305 | #elif defined(CONFIG_ARCH_AT91SAM9G45) |
309 | || defined(CONFIG_ARCH_AT91SAM9G45) | ||
310 | .at91_va_base_sdramc: | 306 | .at91_va_base_sdramc: |
311 | .word AT91_VA_BASE_SYS + AT91_DDRSDRC0 | 307 | .word AT91_VA_BASE_SYS + AT91_DDRSDRC0 |
312 | #else | 308 | #else |
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index 69d3fc4c46f3..620c67e8f814 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c | |||
@@ -86,20 +86,6 @@ static void __init soc_detect(u32 dbgu_base) | |||
86 | socid = cidr & ~AT91_CIDR_VERSION; | 86 | socid = cidr & ~AT91_CIDR_VERSION; |
87 | 87 | ||
88 | switch (socid) { | 88 | switch (socid) { |
89 | case ARCH_ID_AT91CAP9: { | ||
90 | #ifdef CONFIG_AT91_PMC_UNIT | ||
91 | u32 pmc_ver = at91_sys_read(AT91_PMC_VER); | ||
92 | |||
93 | if (pmc_ver == ARCH_REVISION_CAP9_B) | ||
94 | at91_soc_initdata.subtype = AT91_SOC_CAP9_REV_B; | ||
95 | else if (pmc_ver == ARCH_REVISION_CAP9_C) | ||
96 | at91_soc_initdata.subtype = AT91_SOC_CAP9_REV_C; | ||
97 | #endif | ||
98 | at91_soc_initdata.type = AT91_SOC_CAP9; | ||
99 | at91_boot_soc = at91cap9_soc; | ||
100 | break; | ||
101 | } | ||
102 | |||
103 | case ARCH_ID_AT91RM9200: | 89 | case ARCH_ID_AT91RM9200: |
104 | at91_soc_initdata.type = AT91_SOC_RM9200; | 90 | at91_soc_initdata.type = AT91_SOC_RM9200; |
105 | at91_boot_soc = at91rm9200_soc; | 91 | at91_boot_soc = at91rm9200_soc; |
@@ -200,7 +186,6 @@ static void __init soc_detect(u32 dbgu_base) | |||
200 | 186 | ||
201 | static const char *soc_name[] = { | 187 | static const char *soc_name[] = { |
202 | [AT91_SOC_RM9200] = "at91rm9200", | 188 | [AT91_SOC_RM9200] = "at91rm9200", |
203 | [AT91_SOC_CAP9] = "at91cap9", | ||
204 | [AT91_SOC_SAM9260] = "at91sam9260", | 189 | [AT91_SOC_SAM9260] = "at91sam9260", |
205 | [AT91_SOC_SAM9261] = "at91sam9261", | 190 | [AT91_SOC_SAM9261] = "at91sam9261", |
206 | [AT91_SOC_SAM9263] = "at91sam9263", | 191 | [AT91_SOC_SAM9263] = "at91sam9263", |
@@ -221,8 +206,6 @@ EXPORT_SYMBOL(at91_get_soc_type); | |||
221 | static const char *soc_subtype_name[] = { | 206 | static const char *soc_subtype_name[] = { |
222 | [AT91_SOC_RM9200_BGA] = "at91rm9200 BGA", | 207 | [AT91_SOC_RM9200_BGA] = "at91rm9200 BGA", |
223 | [AT91_SOC_RM9200_PQFP] = "at91rm9200 PQFP", | 208 | [AT91_SOC_RM9200_PQFP] = "at91rm9200 PQFP", |
224 | [AT91_SOC_CAP9_REV_B] = "at91cap9 revB", | ||
225 | [AT91_SOC_CAP9_REV_C] = "at91cap9 revC", | ||
226 | [AT91_SOC_SAM9XE] = "at91sam9xe", | 209 | [AT91_SOC_SAM9XE] = "at91sam9xe", |
227 | [AT91_SOC_SAM9G45ES] = "at91sam9g45es", | 210 | [AT91_SOC_SAM9G45ES] = "at91sam9g45es", |
228 | [AT91_SOC_SAM9M10] = "at91sam9m10", | 211 | [AT91_SOC_SAM9M10] = "at91sam9m10", |
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h index 4588ae6f7acd..5db4aa45404a 100644 --- a/arch/arm/mach-at91/soc.h +++ b/arch/arm/mach-at91/soc.h | |||
@@ -13,7 +13,6 @@ struct at91_init_soc { | |||
13 | }; | 13 | }; |
14 | 14 | ||
15 | extern struct at91_init_soc at91_boot_soc; | 15 | extern struct at91_init_soc at91_boot_soc; |
16 | extern struct at91_init_soc at91cap9_soc; | ||
17 | extern struct at91_init_soc at91rm9200_soc; | 16 | extern struct at91_init_soc at91rm9200_soc; |
18 | extern struct at91_init_soc at91sam9260_soc; | 17 | extern struct at91_init_soc at91sam9260_soc; |
19 | extern struct at91_init_soc at91sam9261_soc; | 18 | extern struct at91_init_soc at91sam9261_soc; |
@@ -27,10 +26,6 @@ static inline int at91_soc_is_enabled(void) | |||
27 | return at91_boot_soc.init != NULL; | 26 | return at91_boot_soc.init != NULL; |
28 | } | 27 | } |
29 | 28 | ||
30 | #if !defined(CONFIG_ARCH_AT91CAP9) | ||
31 | #define at91cap9_soc at91_boot_soc | ||
32 | #endif | ||
33 | |||
34 | #if !defined(CONFIG_ARCH_AT91RM9200) | 29 | #if !defined(CONFIG_ARCH_AT91RM9200) |
35 | #define at91rm9200_soc at91_boot_soc | 30 | #define at91rm9200_soc at91_boot_soc |
36 | #endif | 31 | #endif |
diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c index 6b67b7e8426c..22e4e0a28ad1 100644 --- a/arch/arm/mach-bcmring/core.c +++ b/arch/arm/mach-bcmring/core.c | |||
@@ -52,27 +52,8 @@ | |||
52 | #include <mach/csp/chipcHw_inline.h> | 52 | #include <mach/csp/chipcHw_inline.h> |
53 | #include <mach/csp/tmrHw_reg.h> | 53 | #include <mach/csp/tmrHw_reg.h> |
54 | 54 | ||
55 | #define AMBA_DEVICE(name, initname, base, plat, size) \ | 55 | static AMBA_APB_DEVICE(uartA, "uarta", MM_ADDR_IO_UARTA, { IRQ_UARTA }, NULL); |
56 | static struct amba_device name##_device = { \ | 56 | static AMBA_APB_DEVICE(uartB, "uartb", MM_ADDR_IO_UARTB, { IRQ_UARTB }, NULL); |
57 | .dev = { \ | ||
58 | .coherent_dma_mask = ~0, \ | ||
59 | .init_name = initname, \ | ||
60 | .platform_data = plat \ | ||
61 | }, \ | ||
62 | .res = { \ | ||
63 | .start = MM_ADDR_IO_##base, \ | ||
64 | .end = MM_ADDR_IO_##base + (size) - 1, \ | ||
65 | .flags = IORESOURCE_MEM \ | ||
66 | }, \ | ||
67 | .dma_mask = ~0, \ | ||
68 | .irq = { \ | ||
69 | IRQ_##base \ | ||
70 | } \ | ||
71 | } | ||
72 | |||
73 | |||
74 | AMBA_DEVICE(uartA, "uarta", UARTA, NULL, SZ_4K); | ||
75 | AMBA_DEVICE(uartB, "uartb", UARTB, NULL, SZ_4K); | ||
76 | 57 | ||
77 | static struct clk pll1_clk = { | 58 | static struct clk pll1_clk = { |
78 | .name = "PLL1", | 59 | .name = "PLL1", |
diff --git a/arch/arm/mach-bcmring/include/mach/entry-macro.S b/arch/arm/mach-bcmring/include/mach/entry-macro.S index 94c950d783ba..2f316f0e6e69 100644 --- a/arch/arm/mach-bcmring/include/mach/entry-macro.S +++ b/arch/arm/mach-bcmring/include/mach/entry-macro.S | |||
@@ -21,9 +21,6 @@ | |||
21 | #include <mach/hardware.h> | 21 | #include <mach/hardware.h> |
22 | #include <mach/csp/mm_io.h> | 22 | #include <mach/csp/mm_io.h> |
23 | 23 | ||
24 | .macro disable_fiq | ||
25 | .endm | ||
26 | |||
27 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 24 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
28 | ldr \base, =(MM_IO_BASE_INTC0) | 25 | ldr \base, =(MM_IO_BASE_INTC0) |
29 | ldr \irqstat, [\base, #0] @ get status | 26 | ldr \irqstat, [\base, #0] @ get status |
@@ -77,6 +74,3 @@ | |||
77 | 74 | ||
78 | .macro get_irqnr_preamble, base, tmp | 75 | .macro get_irqnr_preamble, base, tmp |
79 | .endm | 76 | .endm |
80 | |||
81 | .macro arch_ret_to_user, tmp1, tmp2 | ||
82 | .endm | ||
diff --git a/arch/arm/mach-bcmring/include/mach/system.h b/arch/arm/mach-bcmring/include/mach/system.h deleted file mode 100644 index cb78250db649..000000000000 --- a/arch/arm/mach-bcmring/include/mach/system.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * Copyright (C) 1999 ARM Limited | ||
4 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARCH_SYSTEM_H | ||
21 | #define __ASM_ARCH_SYSTEM_H | ||
22 | |||
23 | static inline void arch_idle(void) | ||
24 | { | ||
25 | cpu_do_idle(); | ||
26 | } | ||
27 | |||
28 | #endif | ||
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c index ab1711b9b4d6..8736c1acc166 100644 --- a/arch/arm/mach-clps711x/common.c +++ b/arch/arm/mach-clps711x/common.c | |||
@@ -225,3 +225,19 @@ void clps711x_restart(char mode, const char *cmd) | |||
225 | { | 225 | { |
226 | soft_restart(0); | 226 | soft_restart(0); |
227 | } | 227 | } |
228 | |||
229 | static void clps711x_idle(void) | ||
230 | { | ||
231 | clps_writel(1, HALT); | ||
232 | __asm__ __volatile__( | ||
233 | "mov r0, r0\n\ | ||
234 | mov r0, r0"); | ||
235 | } | ||
236 | |||
237 | static int __init clps711x_idle_init(void) | ||
238 | { | ||
239 | arm_pm_idle = clps711x_idle; | ||
240 | return 0; | ||
241 | } | ||
242 | |||
243 | arch_initcall(clps711x_idle_init); | ||
diff --git a/arch/arm/mach-clps711x/include/mach/entry-macro.S b/arch/arm/mach-clps711x/include/mach/entry-macro.S index 90fa2f70489f..125af59d7a29 100644 --- a/arch/arm/mach-clps711x/include/mach/entry-macro.S +++ b/arch/arm/mach-clps711x/include/mach/entry-macro.S | |||
@@ -10,15 +10,9 @@ | |||
10 | #include <mach/hardware.h> | 10 | #include <mach/hardware.h> |
11 | #include <asm/hardware/clps7111.h> | 11 | #include <asm/hardware/clps7111.h> |
12 | 12 | ||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro get_irqnr_preamble, base, tmp | 13 | .macro get_irqnr_preamble, base, tmp |
17 | .endm | 14 | .endm |
18 | 15 | ||
19 | .macro arch_ret_to_user, tmp1, tmp2 | ||
20 | .endm | ||
21 | |||
22 | #if (INTSR2 - INTSR1) != (INTMR2 - INTMR1) | 16 | #if (INTSR2 - INTSR1) != (INTMR2 - INTMR1) |
23 | #error INTSR stride != INTMR stride | 17 | #error INTSR stride != INTMR stride |
24 | #endif | 18 | #endif |
diff --git a/arch/arm/mach-clps711x/include/mach/system.h b/arch/arm/mach-clps711x/include/mach/system.h deleted file mode 100644 index 23d6ef8c84da..000000000000 --- a/arch/arm/mach-clps711x/include/mach/system.h +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-clps711x/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARCH_SYSTEM_H | ||
21 | #define __ASM_ARCH_SYSTEM_H | ||
22 | |||
23 | #include <linux/io.h> | ||
24 | #include <mach/hardware.h> | ||
25 | #include <asm/hardware/clps7111.h> | ||
26 | |||
27 | static inline void arch_idle(void) | ||
28 | { | ||
29 | clps_writel(1, HALT); | ||
30 | __asm__ __volatile__( | ||
31 | "mov r0, r0\n\ | ||
32 | mov r0, r0"); | ||
33 | } | ||
34 | |||
35 | #endif | ||
diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S deleted file mode 100644 index 01c57df5f716..000000000000 --- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* | ||
2 | * Low-level IRQ helper macros for Cavium Networks platforms | ||
3 | * | ||
4 | * Copyright 2008 Cavium Networks | ||
5 | * | ||
6 | * This file is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License, Version 2, as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro arch_ret_to_user, tmp1, tmp2 | ||
15 | .endm | ||
diff --git a/arch/arm/mach-cns3xxx/include/mach/system.h b/arch/arm/mach-cns3xxx/include/mach/system.h deleted file mode 100644 index 9e56b7dc133a..000000000000 --- a/arch/arm/mach-cns3xxx/include/mach/system.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2000 Deep Blue Solutions Ltd | ||
3 | * Copyright 2003 ARM Limited | ||
4 | * Copyright 2008 Cavium Networks | ||
5 | * | ||
6 | * This file is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License, Version 2, as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __MACH_SYSTEM_H | ||
12 | #define __MACH_SYSTEM_H | ||
13 | |||
14 | #include <asm/proc-fns.h> | ||
15 | |||
16 | static inline void arch_idle(void) | ||
17 | { | ||
18 | /* | ||
19 | * This should do all the clock switching | ||
20 | * and wait for interrupt tricks | ||
21 | */ | ||
22 | cpu_do_idle(); | ||
23 | } | ||
24 | |||
25 | #endif | ||
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c index 275341f159fb..82ed753fb360 100644 --- a/arch/arm/mach-davinci/board-dm355-evm.c +++ b/arch/arm/mach-davinci/board-dm355-evm.c | |||
@@ -26,13 +26,14 @@ | |||
26 | #include <asm/mach-types.h> | 26 | #include <asm/mach-types.h> |
27 | #include <asm/mach/arch.h> | 27 | #include <asm/mach/arch.h> |
28 | 28 | ||
29 | #include <mach/dm355.h> | ||
30 | #include <mach/i2c.h> | 29 | #include <mach/i2c.h> |
31 | #include <mach/serial.h> | 30 | #include <mach/serial.h> |
32 | #include <mach/nand.h> | 31 | #include <mach/nand.h> |
33 | #include <mach/mmc.h> | 32 | #include <mach/mmc.h> |
34 | #include <mach/usb.h> | 33 | #include <mach/usb.h> |
35 | 34 | ||
35 | #include "davinci.h" | ||
36 | |||
36 | /* NOTE: this is geared for the standard config, with a socketed | 37 | /* NOTE: this is geared for the standard config, with a socketed |
37 | * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you | 38 | * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you |
38 | * swap chips, maybe with a different block size, partitioning may | 39 | * swap chips, maybe with a different block size, partitioning may |
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c index e99db28181ae..d74a8b3445fb 100644 --- a/arch/arm/mach-davinci/board-dm355-leopard.c +++ b/arch/arm/mach-davinci/board-dm355-leopard.c | |||
@@ -23,13 +23,14 @@ | |||
23 | #include <asm/mach-types.h> | 23 | #include <asm/mach-types.h> |
24 | #include <asm/mach/arch.h> | 24 | #include <asm/mach/arch.h> |
25 | 25 | ||
26 | #include <mach/dm355.h> | ||
27 | #include <mach/i2c.h> | 26 | #include <mach/i2c.h> |
28 | #include <mach/serial.h> | 27 | #include <mach/serial.h> |
29 | #include <mach/nand.h> | 28 | #include <mach/nand.h> |
30 | #include <mach/mmc.h> | 29 | #include <mach/mmc.h> |
31 | #include <mach/usb.h> | 30 | #include <mach/usb.h> |
32 | 31 | ||
32 | #include "davinci.h" | ||
33 | |||
33 | /* NOTE: this is geared for the standard config, with a socketed | 34 | /* NOTE: this is geared for the standard config, with a socketed |
34 | * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you | 35 | * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you |
35 | * swap chips, maybe with a different block size, partitioning may | 36 | * swap chips, maybe with a different block size, partitioning may |
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 849311d3cb7c..5bce2b83bb4f 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c | |||
@@ -32,7 +32,6 @@ | |||
32 | #include <asm/mach/arch.h> | 32 | #include <asm/mach/arch.h> |
33 | 33 | ||
34 | #include <mach/mux.h> | 34 | #include <mach/mux.h> |
35 | #include <mach/dm365.h> | ||
36 | #include <mach/common.h> | 35 | #include <mach/common.h> |
37 | #include <mach/i2c.h> | 36 | #include <mach/i2c.h> |
38 | #include <mach/serial.h> | 37 | #include <mach/serial.h> |
@@ -42,6 +41,8 @@ | |||
42 | 41 | ||
43 | #include <media/tvp514x.h> | 42 | #include <media/tvp514x.h> |
44 | 43 | ||
44 | #include "davinci.h" | ||
45 | |||
45 | static inline int have_imager(void) | 46 | static inline int have_imager(void) |
46 | { | 47 | { |
47 | /* REVISIT when it's supported, trigger via Kconfig */ | 48 | /* REVISIT when it's supported, trigger via Kconfig */ |
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index 1247ecdcf752..864f676eccac 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c | |||
@@ -30,7 +30,6 @@ | |||
30 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
31 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
32 | 32 | ||
33 | #include <mach/dm644x.h> | ||
34 | #include <mach/common.h> | 33 | #include <mach/common.h> |
35 | #include <mach/i2c.h> | 34 | #include <mach/i2c.h> |
36 | #include <mach/serial.h> | 35 | #include <mach/serial.h> |
@@ -40,6 +39,8 @@ | |||
40 | #include <mach/usb.h> | 39 | #include <mach/usb.h> |
41 | #include <mach/aemif.h> | 40 | #include <mach/aemif.h> |
42 | 41 | ||
42 | #include "davinci.h" | ||
43 | |||
43 | #define DM644X_EVM_PHY_ID "davinci_mdio-0:01" | 44 | #define DM644X_EVM_PHY_ID "davinci_mdio-0:01" |
44 | #define LXT971_PHY_ID (0x001378e2) | 45 | #define LXT971_PHY_ID (0x001378e2) |
45 | #define LXT971_PHY_MASK (0xfffffff0) | 46 | #define LXT971_PHY_MASK (0xfffffff0) |
@@ -189,7 +190,7 @@ static struct platform_device davinci_fb_device = { | |||
189 | .num_resources = 0, | 190 | .num_resources = 0, |
190 | }; | 191 | }; |
191 | 192 | ||
192 | static struct tvp514x_platform_data tvp5146_pdata = { | 193 | static struct tvp514x_platform_data dm644xevm_tvp5146_pdata = { |
193 | .clk_polarity = 0, | 194 | .clk_polarity = 0, |
194 | .hs_polarity = 1, | 195 | .hs_polarity = 1, |
195 | .vs_polarity = 1 | 196 | .vs_polarity = 1 |
@@ -197,7 +198,7 @@ static struct tvp514x_platform_data tvp5146_pdata = { | |||
197 | 198 | ||
198 | #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) | 199 | #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) |
199 | /* Inputs available at the TVP5146 */ | 200 | /* Inputs available at the TVP5146 */ |
200 | static struct v4l2_input tvp5146_inputs[] = { | 201 | static struct v4l2_input dm644xevm_tvp5146_inputs[] = { |
201 | { | 202 | { |
202 | .index = 0, | 203 | .index = 0, |
203 | .name = "Composite", | 204 | .name = "Composite", |
@@ -217,7 +218,7 @@ static struct v4l2_input tvp5146_inputs[] = { | |||
217 | * ouput that goes to vpfe. There is a one to one correspondence | 218 | * ouput that goes to vpfe. There is a one to one correspondence |
218 | * with tvp5146_inputs | 219 | * with tvp5146_inputs |
219 | */ | 220 | */ |
220 | static struct vpfe_route tvp5146_routes[] = { | 221 | static struct vpfe_route dm644xevm_tvp5146_routes[] = { |
221 | { | 222 | { |
222 | .input = INPUT_CVBS_VI2B, | 223 | .input = INPUT_CVBS_VI2B, |
223 | .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, | 224 | .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, |
@@ -228,13 +229,13 @@ static struct vpfe_route tvp5146_routes[] = { | |||
228 | }, | 229 | }, |
229 | }; | 230 | }; |
230 | 231 | ||
231 | static struct vpfe_subdev_info vpfe_sub_devs[] = { | 232 | static struct vpfe_subdev_info dm644xevm_vpfe_sub_devs[] = { |
232 | { | 233 | { |
233 | .name = "tvp5146", | 234 | .name = "tvp5146", |
234 | .grp_id = 0, | 235 | .grp_id = 0, |
235 | .num_inputs = ARRAY_SIZE(tvp5146_inputs), | 236 | .num_inputs = ARRAY_SIZE(dm644xevm_tvp5146_inputs), |
236 | .inputs = tvp5146_inputs, | 237 | .inputs = dm644xevm_tvp5146_inputs, |
237 | .routes = tvp5146_routes, | 238 | .routes = dm644xevm_tvp5146_routes, |
238 | .can_route = 1, | 239 | .can_route = 1, |
239 | .ccdc_if_params = { | 240 | .ccdc_if_params = { |
240 | .if_type = VPFE_BT656, | 241 | .if_type = VPFE_BT656, |
@@ -243,15 +244,15 @@ static struct vpfe_subdev_info vpfe_sub_devs[] = { | |||
243 | }, | 244 | }, |
244 | .board_info = { | 245 | .board_info = { |
245 | I2C_BOARD_INFO("tvp5146", 0x5d), | 246 | I2C_BOARD_INFO("tvp5146", 0x5d), |
246 | .platform_data = &tvp5146_pdata, | 247 | .platform_data = &dm644xevm_tvp5146_pdata, |
247 | }, | 248 | }, |
248 | }, | 249 | }, |
249 | }; | 250 | }; |
250 | 251 | ||
251 | static struct vpfe_config vpfe_cfg = { | 252 | static struct vpfe_config dm644xevm_capture_cfg = { |
252 | .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), | 253 | .num_subdevs = ARRAY_SIZE(dm644xevm_vpfe_sub_devs), |
253 | .i2c_adapter_id = 1, | 254 | .i2c_adapter_id = 1, |
254 | .sub_devs = vpfe_sub_devs, | 255 | .sub_devs = dm644xevm_vpfe_sub_devs, |
255 | .card_name = "DM6446 EVM", | 256 | .card_name = "DM6446 EVM", |
256 | .ccdc = "DM6446 CCDC", | 257 | .ccdc = "DM6446 CCDC", |
257 | }; | 258 | }; |
@@ -624,8 +625,6 @@ static struct davinci_uart_config uart_config __initdata = { | |||
624 | static void __init | 625 | static void __init |
625 | davinci_evm_map_io(void) | 626 | davinci_evm_map_io(void) |
626 | { | 627 | { |
627 | /* setup input configuration for VPFE input devices */ | ||
628 | dm644x_set_vpfe_config(&vpfe_cfg); | ||
629 | dm644x_init(); | 628 | dm644x_init(); |
630 | } | 629 | } |
631 | 630 | ||
@@ -697,6 +696,7 @@ static __init void davinci_evm_init(void) | |||
697 | evm_init_i2c(); | 696 | evm_init_i2c(); |
698 | 697 | ||
699 | davinci_setup_mmc(0, &dm6446evm_mmc_config); | 698 | davinci_setup_mmc(0, &dm6446evm_mmc_config); |
699 | dm644x_init_video(&dm644xevm_capture_cfg); | ||
700 | 700 | ||
701 | davinci_serial_init(&uart_config); | 701 | davinci_serial_init(&uart_config); |
702 | dm644x_init_asp(&dm644x_evm_snd_data); | 702 | dm644x_init_asp(&dm644x_evm_snd_data); |
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index 872ac69fa049..d72ab948d630 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c | |||
@@ -36,7 +36,6 @@ | |||
36 | #include <asm/mach-types.h> | 36 | #include <asm/mach-types.h> |
37 | #include <asm/mach/arch.h> | 37 | #include <asm/mach/arch.h> |
38 | 38 | ||
39 | #include <mach/dm646x.h> | ||
40 | #include <mach/common.h> | 39 | #include <mach/common.h> |
41 | #include <mach/serial.h> | 40 | #include <mach/serial.h> |
42 | #include <mach/i2c.h> | 41 | #include <mach/i2c.h> |
@@ -45,6 +44,7 @@ | |||
45 | #include <mach/cdce949.h> | 44 | #include <mach/cdce949.h> |
46 | #include <mach/aemif.h> | 45 | #include <mach/aemif.h> |
47 | 46 | ||
47 | #include "davinci.h" | ||
48 | #include "clock.h" | 48 | #include "clock.h" |
49 | 49 | ||
50 | #define NAND_BLOCK_SIZE SZ_128K | 50 | #define NAND_BLOCK_SIZE SZ_128K |
@@ -410,8 +410,6 @@ static struct davinci_i2c_platform_data i2c_pdata = { | |||
410 | .bus_delay = 0 /* usec */, | 410 | .bus_delay = 0 /* usec */, |
411 | }; | 411 | }; |
412 | 412 | ||
413 | #define VIDCLKCTL_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x38) | ||
414 | #define VSCLKDIS_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x6c) | ||
415 | #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8)) | 413 | #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8)) |
416 | #define VCH2CLK_SYSCLK8 (BIT(9)) | 414 | #define VCH2CLK_SYSCLK8 (BIT(9)) |
417 | #define VCH2CLK_AUXCLK (BIT(9) | BIT(8)) | 415 | #define VCH2CLK_AUXCLK (BIT(9) | BIT(8)) |
@@ -429,8 +427,6 @@ static struct davinci_i2c_platform_data i2c_pdata = { | |||
429 | #define TVP5147_CH0 "tvp514x-0" | 427 | #define TVP5147_CH0 "tvp514x-0" |
430 | #define TVP5147_CH1 "tvp514x-1" | 428 | #define TVP5147_CH1 "tvp514x-1" |
431 | 429 | ||
432 | static void __iomem *vpif_vidclkctl_reg; | ||
433 | static void __iomem *vpif_vsclkdis_reg; | ||
434 | /* spin lock for updating above registers */ | 430 | /* spin lock for updating above registers */ |
435 | static spinlock_t vpif_reg_lock; | 431 | static spinlock_t vpif_reg_lock; |
436 | 432 | ||
@@ -441,14 +437,14 @@ static int set_vpif_clock(int mux_mode, int hd) | |||
441 | int val = 0; | 437 | int val = 0; |
442 | int err = 0; | 438 | int err = 0; |
443 | 439 | ||
444 | if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg || !cpld_client) | 440 | if (!cpld_client) |
445 | return -ENXIO; | 441 | return -ENXIO; |
446 | 442 | ||
447 | /* disable the clock */ | 443 | /* disable the clock */ |
448 | spin_lock_irqsave(&vpif_reg_lock, flags); | 444 | spin_lock_irqsave(&vpif_reg_lock, flags); |
449 | value = __raw_readl(vpif_vsclkdis_reg); | 445 | value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS)); |
450 | value |= (VIDCH3CLK | VIDCH2CLK); | 446 | value |= (VIDCH3CLK | VIDCH2CLK); |
451 | __raw_writel(value, vpif_vsclkdis_reg); | 447 | __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS)); |
452 | spin_unlock_irqrestore(&vpif_reg_lock, flags); | 448 | spin_unlock_irqrestore(&vpif_reg_lock, flags); |
453 | 449 | ||
454 | val = i2c_smbus_read_byte(cpld_client); | 450 | val = i2c_smbus_read_byte(cpld_client); |
@@ -464,7 +460,7 @@ static int set_vpif_clock(int mux_mode, int hd) | |||
464 | if (err) | 460 | if (err) |
465 | return err; | 461 | return err; |
466 | 462 | ||
467 | value = __raw_readl(vpif_vidclkctl_reg); | 463 | value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL)); |
468 | value &= ~(VCH2CLK_MASK); | 464 | value &= ~(VCH2CLK_MASK); |
469 | value &= ~(VCH3CLK_MASK); | 465 | value &= ~(VCH3CLK_MASK); |
470 | 466 | ||
@@ -473,13 +469,13 @@ static int set_vpif_clock(int mux_mode, int hd) | |||
473 | else | 469 | else |
474 | value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK); | 470 | value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK); |
475 | 471 | ||
476 | __raw_writel(value, vpif_vidclkctl_reg); | 472 | __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL)); |
477 | 473 | ||
478 | spin_lock_irqsave(&vpif_reg_lock, flags); | 474 | spin_lock_irqsave(&vpif_reg_lock, flags); |
479 | value = __raw_readl(vpif_vsclkdis_reg); | 475 | value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS)); |
480 | /* enable the clock */ | 476 | /* enable the clock */ |
481 | value &= ~(VIDCH3CLK | VIDCH2CLK); | 477 | value &= ~(VIDCH3CLK | VIDCH2CLK); |
482 | __raw_writel(value, vpif_vsclkdis_reg); | 478 | __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS)); |
483 | spin_unlock_irqrestore(&vpif_reg_lock, flags); | 479 | spin_unlock_irqrestore(&vpif_reg_lock, flags); |
484 | 480 | ||
485 | return 0; | 481 | return 0; |
@@ -564,7 +560,7 @@ static int setup_vpif_input_channel_mode(int mux_mode) | |||
564 | int val; | 560 | int val; |
565 | u32 value; | 561 | u32 value; |
566 | 562 | ||
567 | if (!vpif_vidclkctl_reg || !cpld_client) | 563 | if (!cpld_client) |
568 | return -ENXIO; | 564 | return -ENXIO; |
569 | 565 | ||
570 | val = i2c_smbus_read_byte(cpld_client); | 566 | val = i2c_smbus_read_byte(cpld_client); |
@@ -572,7 +568,7 @@ static int setup_vpif_input_channel_mode(int mux_mode) | |||
572 | return val; | 568 | return val; |
573 | 569 | ||
574 | spin_lock_irqsave(&vpif_reg_lock, flags); | 570 | spin_lock_irqsave(&vpif_reg_lock, flags); |
575 | value = __raw_readl(vpif_vidclkctl_reg); | 571 | value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL)); |
576 | if (mux_mode) { | 572 | if (mux_mode) { |
577 | val &= VPIF_INPUT_TWO_CHANNEL; | 573 | val &= VPIF_INPUT_TWO_CHANNEL; |
578 | value |= VIDCH1CLK; | 574 | value |= VIDCH1CLK; |
@@ -580,7 +576,7 @@ static int setup_vpif_input_channel_mode(int mux_mode) | |||
580 | val |= VPIF_INPUT_ONE_CHANNEL; | 576 | val |= VPIF_INPUT_ONE_CHANNEL; |
581 | value &= ~VIDCH1CLK; | 577 | value &= ~VIDCH1CLK; |
582 | } | 578 | } |
583 | __raw_writel(value, vpif_vidclkctl_reg); | 579 | __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL)); |
584 | spin_unlock_irqrestore(&vpif_reg_lock, flags); | 580 | spin_unlock_irqrestore(&vpif_reg_lock, flags); |
585 | 581 | ||
586 | err = i2c_smbus_write_byte(cpld_client, val); | 582 | err = i2c_smbus_write_byte(cpld_client, val); |
@@ -674,12 +670,6 @@ static struct vpif_capture_config dm646x_vpif_capture_cfg = { | |||
674 | 670 | ||
675 | static void __init evm_init_video(void) | 671 | static void __init evm_init_video(void) |
676 | { | 672 | { |
677 | vpif_vidclkctl_reg = ioremap(VIDCLKCTL_OFFSET, 4); | ||
678 | vpif_vsclkdis_reg = ioremap(VSCLKDIS_OFFSET, 4); | ||
679 | if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg) { | ||
680 | pr_err("Can't map VPIF VIDCLKCTL or VSCLKDIS registers\n"); | ||
681 | return; | ||
682 | } | ||
683 | spin_lock_init(&vpif_reg_lock); | 673 | spin_lock_init(&vpif_reg_lock); |
684 | 674 | ||
685 | dm646x_setup_vpif(&dm646x_vpif_display_config, | 675 | dm646x_setup_vpif(&dm646x_vpif_display_config, |
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c index 8d34f513d415..a772bb45570a 100644 --- a/arch/arm/mach-davinci/board-neuros-osd2.c +++ b/arch/arm/mach-davinci/board-neuros-osd2.c | |||
@@ -30,7 +30,6 @@ | |||
30 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
31 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
32 | 32 | ||
33 | #include <mach/dm644x.h> | ||
34 | #include <mach/common.h> | 33 | #include <mach/common.h> |
35 | #include <mach/i2c.h> | 34 | #include <mach/i2c.h> |
36 | #include <mach/serial.h> | 35 | #include <mach/serial.h> |
@@ -39,6 +38,8 @@ | |||
39 | #include <mach/mmc.h> | 38 | #include <mach/mmc.h> |
40 | #include <mach/usb.h> | 39 | #include <mach/usb.h> |
41 | 40 | ||
41 | #include "davinci.h" | ||
42 | |||
42 | #define NEUROS_OSD2_PHY_ID "davinci_mdio-0:01" | 43 | #define NEUROS_OSD2_PHY_ID "davinci_mdio-0:01" |
43 | #define LXT971_PHY_ID 0x001378e2 | 44 | #define LXT971_PHY_ID 0x001378e2 |
44 | #define LXT971_PHY_MASK 0xfffffff0 | 45 | #define LXT971_PHY_MASK 0xfffffff0 |
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c index 31da3c5b2ba3..76e675096104 100644 --- a/arch/arm/mach-davinci/board-sffsdr.c +++ b/arch/arm/mach-davinci/board-sffsdr.c | |||
@@ -35,13 +35,14 @@ | |||
35 | #include <asm/mach/arch.h> | 35 | #include <asm/mach/arch.h> |
36 | #include <asm/mach/flash.h> | 36 | #include <asm/mach/flash.h> |
37 | 37 | ||
38 | #include <mach/dm644x.h> | ||
39 | #include <mach/common.h> | 38 | #include <mach/common.h> |
40 | #include <mach/i2c.h> | 39 | #include <mach/i2c.h> |
41 | #include <mach/serial.h> | 40 | #include <mach/serial.h> |
42 | #include <mach/mux.h> | 41 | #include <mach/mux.h> |
43 | #include <mach/usb.h> | 42 | #include <mach/usb.h> |
44 | 43 | ||
44 | #include "davinci.h" | ||
45 | |||
45 | #define SFFSDR_PHY_ID "davinci_mdio-0:01" | 46 | #define SFFSDR_PHY_ID "davinci_mdio-0:01" |
46 | static struct mtd_partition davinci_sffsdr_nandflash_partition[] = { | 47 | static struct mtd_partition davinci_sffsdr_nandflash_partition[] = { |
47 | /* U-Boot Environment: Block 0 | 48 | /* U-Boot Environment: Block 0 |
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h new file mode 100644 index 000000000000..9d708034b57f --- /dev/null +++ b/arch/arm/mach-davinci/davinci.h | |||
@@ -0,0 +1,96 @@ | |||
1 | /* | ||
2 | * This file contains the processor specific definitions | ||
3 | * of the TI DM644x, DM355, DM365, and DM646x. | ||
4 | * | ||
5 | * Copyright (C) 2011 Texas Instruments Incorporated | ||
6 | * Copyright (c) 2007 Deep Root Systems, LLC | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License as | ||
10 | * published by the Free Software Foundation version 2. | ||
11 | * | ||
12 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | ||
13 | * kind, whether express or implied; without even the implied warranty | ||
14 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | */ | ||
17 | #ifndef __DAVINCI_H | ||
18 | #define __DAVINCI_H | ||
19 | |||
20 | #include <linux/clk.h> | ||
21 | #include <linux/videodev2.h> | ||
22 | #include <linux/davinci_emac.h> | ||
23 | #include <linux/platform_device.h> | ||
24 | #include <linux/spi/spi.h> | ||
25 | |||
26 | #include <mach/asp.h> | ||
27 | #include <mach/keyscan.h> | ||
28 | #include <mach/hardware.h> | ||
29 | |||
30 | #include <media/davinci/vpfe_capture.h> | ||
31 | #include <media/davinci/vpif_types.h> | ||
32 | |||
33 | #define DAVINCI_SYSTEM_MODULE_BASE 0x01c40000 | ||
34 | #define SYSMOD_VIDCLKCTL 0x38 | ||
35 | #define SYSMOD_VDD3P3VPWDN 0x48 | ||
36 | #define SYSMOD_VSCLKDIS 0x6c | ||
37 | #define SYSMOD_PUPDCTL1 0x7c | ||
38 | |||
39 | extern void __iomem *davinci_sysmod_base; | ||
40 | #define DAVINCI_SYSMOD_VIRT(x) (davinci_sysmod_base + (x)) | ||
41 | void davinci_map_sysmod(void); | ||
42 | |||
43 | /* DM355 base addresses */ | ||
44 | #define DM355_ASYNC_EMIF_CONTROL_BASE 0x01e10000 | ||
45 | #define DM355_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
46 | |||
47 | #define ASP1_TX_EVT_EN 1 | ||
48 | #define ASP1_RX_EVT_EN 2 | ||
49 | |||
50 | /* DM365 base addresses */ | ||
51 | #define DM365_ASYNC_EMIF_CONTROL_BASE 0x01d10000 | ||
52 | #define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
53 | #define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 | ||
54 | |||
55 | /* DM644x base addresses */ | ||
56 | #define DM644X_ASYNC_EMIF_CONTROL_BASE 0x01e00000 | ||
57 | #define DM644X_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
58 | #define DM644X_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 | ||
59 | #define DM644X_ASYNC_EMIF_DATA_CE2_BASE 0x06000000 | ||
60 | #define DM644X_ASYNC_EMIF_DATA_CE3_BASE 0x08000000 | ||
61 | |||
62 | /* DM646x base addresses */ | ||
63 | #define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000 | ||
64 | #define DM646X_ASYNC_EMIF_CS2_SPACE_BASE 0x42000000 | ||
65 | |||
66 | /* DM355 function declarations */ | ||
67 | void __init dm355_init(void); | ||
68 | void dm355_init_spi0(unsigned chipselect_mask, | ||
69 | struct spi_board_info *info, unsigned len); | ||
70 | void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata); | ||
71 | void dm355_set_vpfe_config(struct vpfe_config *cfg); | ||
72 | |||
73 | /* DM365 function declarations */ | ||
74 | void __init dm365_init(void); | ||
75 | void __init dm365_init_asp(struct snd_platform_data *pdata); | ||
76 | void __init dm365_init_vc(struct snd_platform_data *pdata); | ||
77 | void __init dm365_init_ks(struct davinci_ks_platform_data *pdata); | ||
78 | void __init dm365_init_rtc(void); | ||
79 | void dm365_init_spi0(unsigned chipselect_mask, | ||
80 | struct spi_board_info *info, unsigned len); | ||
81 | void dm365_set_vpfe_config(struct vpfe_config *cfg); | ||
82 | |||
83 | /* DM644x function declarations */ | ||
84 | void __init dm644x_init(void); | ||
85 | void __init dm644x_init_asp(struct snd_platform_data *pdata); | ||
86 | int __init dm644x_init_video(struct vpfe_config *); | ||
87 | |||
88 | /* DM646x function declarations */ | ||
89 | void __init dm646x_init(void); | ||
90 | void __init dm646x_init_mcasp0(struct snd_platform_data *pdata); | ||
91 | void __init dm646x_init_mcasp1(struct snd_platform_data *pdata); | ||
92 | int __init dm646x_init_edma(struct edma_rsv_info *rsv); | ||
93 | void dm646x_video_init(void); | ||
94 | void dm646x_setup_vpif(struct vpif_display_config *, | ||
95 | struct vpif_capture_config *); | ||
96 | #endif /*__DAVINCI_H */ | ||
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c index 50c0156b4262..d2f9666284a7 100644 --- a/arch/arm/mach-davinci/devices.c +++ b/arch/arm/mach-davinci/devices.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <mach/mmc.h> | 23 | #include <mach/mmc.h> |
24 | #include <mach/time.h> | 24 | #include <mach/time.h> |
25 | 25 | ||
26 | #include "davinci.h" | ||
26 | #include "clock.h" | 27 | #include "clock.h" |
27 | 28 | ||
28 | #define DAVINCI_I2C_BASE 0x01C21000 | 29 | #define DAVINCI_I2C_BASE 0x01C21000 |
@@ -33,8 +34,19 @@ | |||
33 | #define DM365_MMCSD0_BASE 0x01D11000 | 34 | #define DM365_MMCSD0_BASE 0x01D11000 |
34 | #define DM365_MMCSD1_BASE 0x01D00000 | 35 | #define DM365_MMCSD1_BASE 0x01D00000 |
35 | 36 | ||
36 | /* System control register offsets */ | 37 | void __iomem *davinci_sysmod_base; |
37 | #define DM64XX_VDD3P3V_PWDN 0x48 | 38 | |
39 | void davinci_map_sysmod(void) | ||
40 | { | ||
41 | davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE, | ||
42 | 0x800); | ||
43 | /* | ||
44 | * Throw a bug since a lot of board initialization code depends | ||
45 | * on system module availability. ioremap() failing this early | ||
46 | * need careful looking into anyway. | ||
47 | */ | ||
48 | BUG_ON(!davinci_sysmod_base); | ||
49 | } | ||
38 | 50 | ||
39 | static struct resource i2c_resources[] = { | 51 | static struct resource i2c_resources[] = { |
40 | { | 52 | { |
@@ -212,12 +224,12 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config) | |||
212 | davinci_cfg_reg(DM355_SD1_DATA2); | 224 | davinci_cfg_reg(DM355_SD1_DATA2); |
213 | davinci_cfg_reg(DM355_SD1_DATA3); | 225 | davinci_cfg_reg(DM355_SD1_DATA3); |
214 | } else if (cpu_is_davinci_dm365()) { | 226 | } else if (cpu_is_davinci_dm365()) { |
215 | void __iomem *pupdctl1 = | ||
216 | IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c); | ||
217 | |||
218 | /* Configure pull down control */ | 227 | /* Configure pull down control */ |
219 | __raw_writel((__raw_readl(pupdctl1) & ~0xfc0), | 228 | unsigned v; |
220 | pupdctl1); | 229 | |
230 | v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1)); | ||
231 | __raw_writel(v & ~0xfc0, | ||
232 | DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1)); | ||
221 | 233 | ||
222 | mmcsd1_resources[0].start = DM365_MMCSD1_BASE; | 234 | mmcsd1_resources[0].start = DM365_MMCSD1_BASE; |
223 | mmcsd1_resources[0].end = DM365_MMCSD1_BASE + | 235 | mmcsd1_resources[0].end = DM365_MMCSD1_BASE + |
@@ -246,11 +258,9 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config) | |||
246 | mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0; | 258 | mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0; |
247 | } else if (cpu_is_davinci_dm644x()) { | 259 | } else if (cpu_is_davinci_dm644x()) { |
248 | /* REVISIT: should this be in board-init code? */ | 260 | /* REVISIT: should this be in board-init code? */ |
249 | void __iomem *base = | ||
250 | IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE); | ||
251 | |||
252 | /* Power-on 3.3V IO cells */ | 261 | /* Power-on 3.3V IO cells */ |
253 | __raw_writel(0, base + DM64XX_VDD3P3V_PWDN); | 262 | __raw_writel(0, |
263 | DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN)); | ||
254 | /*Set up the pull regiter for MMC */ | 264 | /*Set up the pull regiter for MMC */ |
255 | davinci_cfg_reg(DM644X_MSTK); | 265 | davinci_cfg_reg(DM644X_MSTK); |
256 | } | 266 | } |
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 19667cfc5de0..fd3d09aa6cde 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c | |||
@@ -18,7 +18,6 @@ | |||
18 | 18 | ||
19 | #include <asm/mach/map.h> | 19 | #include <asm/mach/map.h> |
20 | 20 | ||
21 | #include <mach/dm355.h> | ||
22 | #include <mach/cputype.h> | 21 | #include <mach/cputype.h> |
23 | #include <mach/edma.h> | 22 | #include <mach/edma.h> |
24 | #include <mach/psc.h> | 23 | #include <mach/psc.h> |
@@ -31,6 +30,7 @@ | |||
31 | #include <mach/spi.h> | 30 | #include <mach/spi.h> |
32 | #include <mach/gpio-davinci.h> | 31 | #include <mach/gpio-davinci.h> |
33 | 32 | ||
33 | #include "davinci.h" | ||
34 | #include "clock.h" | 34 | #include "clock.h" |
35 | #include "mux.h" | 35 | #include "mux.h" |
36 | 36 | ||
@@ -871,6 +871,7 @@ void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata) | |||
871 | void __init dm355_init(void) | 871 | void __init dm355_init(void) |
872 | { | 872 | { |
873 | davinci_common_init(&davinci_soc_info_dm355); | 873 | davinci_common_init(&davinci_soc_info_dm355); |
874 | davinci_map_sysmod(); | ||
874 | } | 875 | } |
875 | 876 | ||
876 | static int __init dm355_init_devices(void) | 877 | static int __init dm355_init_devices(void) |
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index f15b435cc655..1a2e953082b3 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c | |||
@@ -21,7 +21,6 @@ | |||
21 | 21 | ||
22 | #include <asm/mach/map.h> | 22 | #include <asm/mach/map.h> |
23 | 23 | ||
24 | #include <mach/dm365.h> | ||
25 | #include <mach/cputype.h> | 24 | #include <mach/cputype.h> |
26 | #include <mach/edma.h> | 25 | #include <mach/edma.h> |
27 | #include <mach/psc.h> | 26 | #include <mach/psc.h> |
@@ -35,11 +34,28 @@ | |||
35 | #include <mach/spi.h> | 34 | #include <mach/spi.h> |
36 | #include <mach/gpio-davinci.h> | 35 | #include <mach/gpio-davinci.h> |
37 | 36 | ||
37 | #include "davinci.h" | ||
38 | #include "clock.h" | 38 | #include "clock.h" |
39 | #include "mux.h" | 39 | #include "mux.h" |
40 | 40 | ||
41 | #define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */ | 41 | #define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */ |
42 | 42 | ||
43 | /* Base of key scan register bank */ | ||
44 | #define DM365_KEYSCAN_BASE 0x01c69400 | ||
45 | |||
46 | #define DM365_RTC_BASE 0x01c69000 | ||
47 | |||
48 | #define DAVINCI_DM365_VC_BASE 0x01d0c000 | ||
49 | #define DAVINCI_DMA_VC_TX 2 | ||
50 | #define DAVINCI_DMA_VC_RX 3 | ||
51 | |||
52 | #define DM365_EMAC_BASE 0x01d07000 | ||
53 | #define DM365_EMAC_MDIO_BASE (DM365_EMAC_BASE + 0x4000) | ||
54 | #define DM365_EMAC_CNTRL_OFFSET 0x0000 | ||
55 | #define DM365_EMAC_CNTRL_MOD_OFFSET 0x3000 | ||
56 | #define DM365_EMAC_CNTRL_RAM_OFFSET 0x1000 | ||
57 | #define DM365_EMAC_CNTRL_RAM_SIZE 0x2000 | ||
58 | |||
43 | static struct pll_data pll1_data = { | 59 | static struct pll_data pll1_data = { |
44 | .num = 1, | 60 | .num = 1, |
45 | .phys_base = DAVINCI_PLL1_BASE, | 61 | .phys_base = DAVINCI_PLL1_BASE, |
@@ -1122,6 +1138,7 @@ void __init dm365_init_rtc(void) | |||
1122 | void __init dm365_init(void) | 1138 | void __init dm365_init(void) |
1123 | { | 1139 | { |
1124 | davinci_common_init(&davinci_soc_info_dm365); | 1140 | davinci_common_init(&davinci_soc_info_dm365); |
1141 | davinci_map_sysmod(); | ||
1125 | } | 1142 | } |
1126 | 1143 | ||
1127 | static struct resource dm365_vpss_resources[] = { | 1144 | static struct resource dm365_vpss_resources[] = { |
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 43a48ee1917b..23e81cafba8d 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c | |||
@@ -15,7 +15,6 @@ | |||
15 | 15 | ||
16 | #include <asm/mach/map.h> | 16 | #include <asm/mach/map.h> |
17 | 17 | ||
18 | #include <mach/dm644x.h> | ||
19 | #include <mach/cputype.h> | 18 | #include <mach/cputype.h> |
20 | #include <mach/edma.h> | 19 | #include <mach/edma.h> |
21 | #include <mach/irqs.h> | 20 | #include <mach/irqs.h> |
@@ -27,6 +26,7 @@ | |||
27 | #include <mach/asp.h> | 26 | #include <mach/asp.h> |
28 | #include <mach/gpio-davinci.h> | 27 | #include <mach/gpio-davinci.h> |
29 | 28 | ||
29 | #include "davinci.h" | ||
30 | #include "clock.h" | 30 | #include "clock.h" |
31 | #include "mux.h" | 31 | #include "mux.h" |
32 | 32 | ||
@@ -35,6 +35,13 @@ | |||
35 | */ | 35 | */ |
36 | #define DM644X_REF_FREQ 27000000 | 36 | #define DM644X_REF_FREQ 27000000 |
37 | 37 | ||
38 | #define DM644X_EMAC_BASE 0x01c80000 | ||
39 | #define DM644X_EMAC_MDIO_BASE (DM644X_EMAC_BASE + 0x4000) | ||
40 | #define DM644X_EMAC_CNTRL_OFFSET 0x0000 | ||
41 | #define DM644X_EMAC_CNTRL_MOD_OFFSET 0x1000 | ||
42 | #define DM644X_EMAC_CNTRL_RAM_OFFSET 0x2000 | ||
43 | #define DM644X_EMAC_CNTRL_RAM_SIZE 0x2000 | ||
44 | |||
38 | static struct pll_data pll1_data = { | 45 | static struct pll_data pll1_data = { |
39 | .num = 1, | 46 | .num = 1, |
40 | .phys_base = DAVINCI_PLL1_BASE, | 47 | .phys_base = DAVINCI_PLL1_BASE, |
@@ -587,13 +594,15 @@ static struct platform_device dm644x_asp_device = { | |||
587 | .resource = dm644x_asp_resources, | 594 | .resource = dm644x_asp_resources, |
588 | }; | 595 | }; |
589 | 596 | ||
597 | #define DM644X_VPSS_BASE 0x01c73400 | ||
598 | |||
590 | static struct resource dm644x_vpss_resources[] = { | 599 | static struct resource dm644x_vpss_resources[] = { |
591 | { | 600 | { |
592 | /* VPSS Base address */ | 601 | /* VPSS Base address */ |
593 | .name = "vpss", | 602 | .name = "vpss", |
594 | .start = 0x01c73400, | 603 | .start = DM644X_VPSS_BASE, |
595 | .end = 0x01c73400 + 0xff, | 604 | .end = DM644X_VPSS_BASE + 0xff, |
596 | .flags = IORESOURCE_MEM, | 605 | .flags = IORESOURCE_MEM, |
597 | }, | 606 | }, |
598 | }; | 607 | }; |
599 | 608 | ||
@@ -605,7 +614,7 @@ static struct platform_device dm644x_vpss_device = { | |||
605 | .resource = dm644x_vpss_resources, | 614 | .resource = dm644x_vpss_resources, |
606 | }; | 615 | }; |
607 | 616 | ||
608 | static struct resource vpfe_resources[] = { | 617 | static struct resource dm644x_vpfe_resources[] = { |
609 | { | 618 | { |
610 | .start = IRQ_VDINT0, | 619 | .start = IRQ_VDINT0, |
611 | .end = IRQ_VDINT0, | 620 | .end = IRQ_VDINT0, |
@@ -639,22 +648,17 @@ static struct platform_device dm644x_ccdc_dev = { | |||
639 | }, | 648 | }, |
640 | }; | 649 | }; |
641 | 650 | ||
642 | static struct platform_device vpfe_capture_dev = { | 651 | static struct platform_device dm644x_vpfe_dev = { |
643 | .name = CAPTURE_DRV_NAME, | 652 | .name = CAPTURE_DRV_NAME, |
644 | .id = -1, | 653 | .id = -1, |
645 | .num_resources = ARRAY_SIZE(vpfe_resources), | 654 | .num_resources = ARRAY_SIZE(dm644x_vpfe_resources), |
646 | .resource = vpfe_resources, | 655 | .resource = dm644x_vpfe_resources, |
647 | .dev = { | 656 | .dev = { |
648 | .dma_mask = &vpfe_capture_dma_mask, | 657 | .dma_mask = &vpfe_capture_dma_mask, |
649 | .coherent_dma_mask = DMA_BIT_MASK(32), | 658 | .coherent_dma_mask = DMA_BIT_MASK(32), |
650 | }, | 659 | }, |
651 | }; | 660 | }; |
652 | 661 | ||
653 | void dm644x_set_vpfe_config(struct vpfe_config *cfg) | ||
654 | { | ||
655 | vpfe_capture_dev.dev.platform_data = cfg; | ||
656 | } | ||
657 | |||
658 | /*----------------------------------------------------------------------*/ | 662 | /*----------------------------------------------------------------------*/ |
659 | 663 | ||
660 | static struct map_desc dm644x_io_desc[] = { | 664 | static struct map_desc dm644x_io_desc[] = { |
@@ -779,16 +783,29 @@ void __init dm644x_init_asp(struct snd_platform_data *pdata) | |||
779 | void __init dm644x_init(void) | 783 | void __init dm644x_init(void) |
780 | { | 784 | { |
781 | davinci_common_init(&davinci_soc_info_dm644x); | 785 | davinci_common_init(&davinci_soc_info_dm644x); |
786 | davinci_map_sysmod(); | ||
782 | } | 787 | } |
783 | 788 | ||
784 | static int __init dm644x_init_devices(void) | 789 | int __init dm644x_init_video(struct vpfe_config *vpfe_cfg) |
785 | { | 790 | { |
786 | if (!cpu_is_davinci_dm644x()) | 791 | dm644x_vpfe_dev.dev.platform_data = vpfe_cfg; |
787 | return 0; | ||
788 | 792 | ||
789 | /* Add ccdc clock aliases */ | 793 | /* Add ccdc clock aliases */ |
790 | clk_add_alias("master", dm644x_ccdc_dev.name, "vpss_master", NULL); | 794 | clk_add_alias("master", dm644x_ccdc_dev.name, "vpss_master", NULL); |
791 | clk_add_alias("slave", dm644x_ccdc_dev.name, "vpss_slave", NULL); | 795 | clk_add_alias("slave", dm644x_ccdc_dev.name, "vpss_slave", NULL); |
796 | |||
797 | platform_device_register(&dm644x_vpss_device); | ||
798 | platform_device_register(&dm644x_ccdc_dev); | ||
799 | platform_device_register(&dm644x_vpfe_dev); | ||
800 | |||
801 | return 0; | ||
802 | } | ||
803 | |||
804 | static int __init dm644x_init_devices(void) | ||
805 | { | ||
806 | if (!cpu_is_davinci_dm644x()) | ||
807 | return 0; | ||
808 | |||
792 | platform_device_register(&dm644x_edma_device); | 809 | platform_device_register(&dm644x_edma_device); |
793 | 810 | ||
794 | platform_device_register(&dm644x_mdio_device); | 811 | platform_device_register(&dm644x_mdio_device); |
@@ -796,10 +813,6 @@ static int __init dm644x_init_devices(void) | |||
796 | clk_add_alias(NULL, dev_name(&dm644x_mdio_device.dev), | 813 | clk_add_alias(NULL, dev_name(&dm644x_mdio_device.dev), |
797 | NULL, &dm644x_emac_device.dev); | 814 | NULL, &dm644x_emac_device.dev); |
798 | 815 | ||
799 | platform_device_register(&dm644x_vpss_device); | ||
800 | platform_device_register(&dm644x_ccdc_dev); | ||
801 | platform_device_register(&vpfe_capture_dev); | ||
802 | |||
803 | return 0; | 816 | return 0; |
804 | } | 817 | } |
805 | postcore_initcall(dm644x_init_devices); | 818 | postcore_initcall(dm644x_init_devices); |
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 00f774394b16..9eb87c1d1edd 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c | |||
@@ -16,7 +16,6 @@ | |||
16 | 16 | ||
17 | #include <asm/mach/map.h> | 17 | #include <asm/mach/map.h> |
18 | 18 | ||
19 | #include <mach/dm646x.h> | ||
20 | #include <mach/cputype.h> | 19 | #include <mach/cputype.h> |
21 | #include <mach/edma.h> | 20 | #include <mach/edma.h> |
22 | #include <mach/irqs.h> | 21 | #include <mach/irqs.h> |
@@ -28,12 +27,11 @@ | |||
28 | #include <mach/asp.h> | 27 | #include <mach/asp.h> |
29 | #include <mach/gpio-davinci.h> | 28 | #include <mach/gpio-davinci.h> |
30 | 29 | ||
30 | #include "davinci.h" | ||
31 | #include "clock.h" | 31 | #include "clock.h" |
32 | #include "mux.h" | 32 | #include "mux.h" |
33 | 33 | ||
34 | #define DAVINCI_VPIF_BASE (0x01C12000) | 34 | #define DAVINCI_VPIF_BASE (0x01C12000) |
35 | #define VDD3P3V_PWDN_OFFSET (0x48) | ||
36 | #define VSCLKDIS_OFFSET (0x6C) | ||
37 | 35 | ||
38 | #define VDD3P3V_VID_MASK (BIT_MASK(3) | BIT_MASK(2) | BIT_MASK(1) |\ | 36 | #define VDD3P3V_VID_MASK (BIT_MASK(3) | BIT_MASK(2) | BIT_MASK(1) |\ |
39 | BIT_MASK(0)) | 37 | BIT_MASK(0)) |
@@ -46,6 +44,13 @@ | |||
46 | #define DM646X_REF_FREQ 27000000 | 44 | #define DM646X_REF_FREQ 27000000 |
47 | #define DM646X_AUX_FREQ 24000000 | 45 | #define DM646X_AUX_FREQ 24000000 |
48 | 46 | ||
47 | #define DM646X_EMAC_BASE 0x01c80000 | ||
48 | #define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000) | ||
49 | #define DM646X_EMAC_CNTRL_OFFSET 0x0000 | ||
50 | #define DM646X_EMAC_CNTRL_MOD_OFFSET 0x1000 | ||
51 | #define DM646X_EMAC_CNTRL_RAM_OFFSET 0x2000 | ||
52 | #define DM646X_EMAC_CNTRL_RAM_SIZE 0x2000 | ||
53 | |||
49 | static struct pll_data pll1_data = { | 54 | static struct pll_data pll1_data = { |
50 | .num = 1, | 55 | .num = 1, |
51 | .phys_base = DAVINCI_PLL1_BASE, | 56 | .phys_base = DAVINCI_PLL1_BASE, |
@@ -873,15 +878,14 @@ void dm646x_setup_vpif(struct vpif_display_config *display_config, | |||
873 | struct vpif_capture_config *capture_config) | 878 | struct vpif_capture_config *capture_config) |
874 | { | 879 | { |
875 | unsigned int value; | 880 | unsigned int value; |
876 | void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE); | ||
877 | 881 | ||
878 | value = __raw_readl(base + VSCLKDIS_OFFSET); | 882 | value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS)); |
879 | value &= ~VSCLKDIS_MASK; | 883 | value &= ~VSCLKDIS_MASK; |
880 | __raw_writel(value, base + VSCLKDIS_OFFSET); | 884 | __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS)); |
881 | 885 | ||
882 | value = __raw_readl(base + VDD3P3V_PWDN_OFFSET); | 886 | value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN)); |
883 | value &= ~VDD3P3V_VID_MASK; | 887 | value &= ~VDD3P3V_VID_MASK; |
884 | __raw_writel(value, base + VDD3P3V_PWDN_OFFSET); | 888 | __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN)); |
885 | 889 | ||
886 | davinci_cfg_reg(DM646X_STSOMUX_DISABLE); | 890 | davinci_cfg_reg(DM646X_STSOMUX_DISABLE); |
887 | davinci_cfg_reg(DM646X_STSIMUX_DISABLE); | 891 | davinci_cfg_reg(DM646X_STSIMUX_DISABLE); |
@@ -905,6 +909,7 @@ int __init dm646x_init_edma(struct edma_rsv_info *rsv) | |||
905 | void __init dm646x_init(void) | 909 | void __init dm646x_init(void) |
906 | { | 910 | { |
907 | davinci_common_init(&davinci_soc_info_dm646x); | 911 | davinci_common_init(&davinci_soc_info_dm646x); |
912 | davinci_map_sysmod(); | ||
908 | } | 913 | } |
909 | 914 | ||
910 | static int __init dm646x_init_devices(void) | 915 | static int __init dm646x_init_devices(void) |
diff --git a/arch/arm/mach-davinci/include/mach/dm355.h b/arch/arm/mach-davinci/include/mach/dm355.h deleted file mode 100644 index 36dff4a0ce3f..000000000000 --- a/arch/arm/mach-davinci/include/mach/dm355.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* | ||
2 | * Chip specific defines for DM355 SoC | ||
3 | * | ||
4 | * Author: Kevin Hilman, Deep Root Systems, LLC | ||
5 | * | ||
6 | * 2007 (c) Deep Root Systems, LLC. This file is licensed under | ||
7 | * the terms of the GNU General Public License version 2. This program | ||
8 | * is licensed "as is" without any warranty of any kind, whether express | ||
9 | * or implied. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_DM355_H | ||
12 | #define __ASM_ARCH_DM355_H | ||
13 | |||
14 | #include <mach/hardware.h> | ||
15 | #include <mach/asp.h> | ||
16 | #include <media/davinci/vpfe_capture.h> | ||
17 | |||
18 | #define DM355_ASYNC_EMIF_CONTROL_BASE 0x01E10000 | ||
19 | #define DM355_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
20 | |||
21 | #define ASP1_TX_EVT_EN 1 | ||
22 | #define ASP1_RX_EVT_EN 2 | ||
23 | |||
24 | struct spi_board_info; | ||
25 | |||
26 | void __init dm355_init(void); | ||
27 | void dm355_init_spi0(unsigned chipselect_mask, | ||
28 | struct spi_board_info *info, unsigned len); | ||
29 | void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata); | ||
30 | void dm355_set_vpfe_config(struct vpfe_config *cfg); | ||
31 | |||
32 | #endif /* __ASM_ARCH_DM355_H */ | ||
diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h index 2563bf4e93a1..b9bf3d6a4423 100644 --- a/arch/arm/mach-davinci/include/mach/dm365.h +++ b/arch/arm/mach-davinci/include/mach/dm365.h | |||
@@ -1,52 +1 @@ | |||
1 | /* | /* empty, remove once unused */ | |
2 | * Copyright (C) 2009 Texas Instruments Incorporated | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License as | ||
6 | * published by the Free Software Foundation version 2. | ||
7 | * | ||
8 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | ||
9 | * kind, whether express or implied; without even the implied warranty | ||
10 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | */ | ||
13 | #ifndef __ASM_ARCH_DM365_H | ||
14 | #define __ASM_ARCH_DM665_H | ||
15 | |||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/davinci_emac.h> | ||
18 | #include <mach/hardware.h> | ||
19 | #include <mach/asp.h> | ||
20 | #include <mach/keyscan.h> | ||
21 | #include <media/davinci/vpfe_capture.h> | ||
22 | |||
23 | #define DM365_EMAC_BASE (0x01D07000) | ||
24 | #define DM365_EMAC_MDIO_BASE (DM365_EMAC_BASE + 0x4000) | ||
25 | #define DM365_EMAC_CNTRL_OFFSET (0x0000) | ||
26 | #define DM365_EMAC_CNTRL_MOD_OFFSET (0x3000) | ||
27 | #define DM365_EMAC_CNTRL_RAM_OFFSET (0x1000) | ||
28 | #define DM365_EMAC_CNTRL_RAM_SIZE (0x2000) | ||
29 | |||
30 | /* Base of key scan register bank */ | ||
31 | #define DM365_KEYSCAN_BASE (0x01C69400) | ||
32 | |||
33 | #define DM365_RTC_BASE (0x01C69000) | ||
34 | |||
35 | #define DAVINCI_DM365_VC_BASE (0x01D0C000) | ||
36 | #define DAVINCI_DMA_VC_TX 2 | ||
37 | #define DAVINCI_DMA_VC_RX 3 | ||
38 | |||
39 | #define DM365_ASYNC_EMIF_CONTROL_BASE 0x01D10000 | ||
40 | #define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
41 | #define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 | ||
42 | |||
43 | void __init dm365_init(void); | ||
44 | void __init dm365_init_asp(struct snd_platform_data *pdata); | ||
45 | void __init dm365_init_vc(struct snd_platform_data *pdata); | ||
46 | void __init dm365_init_ks(struct davinci_ks_platform_data *pdata); | ||
47 | void __init dm365_init_rtc(void); | ||
48 | void dm365_init_spi0(unsigned chipselect_mask, | ||
49 | struct spi_board_info *info, unsigned len); | ||
50 | |||
51 | void dm365_set_vpfe_config(struct vpfe_config *cfg); | ||
52 | #endif /* __ASM_ARCH_DM365_H */ | ||
diff --git a/arch/arm/mach-davinci/include/mach/dm644x.h b/arch/arm/mach-davinci/include/mach/dm644x.h deleted file mode 100644 index 5a1b26d4e68b..000000000000 --- a/arch/arm/mach-davinci/include/mach/dm644x.h +++ /dev/null | |||
@@ -1,47 +0,0 @@ | |||
1 | /* | ||
2 | * This file contains the processor specific definitions | ||
3 | * of the TI DM644x. | ||
4 | * | ||
5 | * Copyright (C) 2008 Texas Instruments. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | * | ||
21 | */ | ||
22 | #ifndef __ASM_ARCH_DM644X_H | ||
23 | #define __ASM_ARCH_DM644X_H | ||
24 | |||
25 | #include <linux/davinci_emac.h> | ||
26 | #include <mach/hardware.h> | ||
27 | #include <mach/asp.h> | ||
28 | #include <media/davinci/vpfe_capture.h> | ||
29 | |||
30 | #define DM644X_EMAC_BASE (0x01C80000) | ||
31 | #define DM644X_EMAC_MDIO_BASE (DM644X_EMAC_BASE + 0x4000) | ||
32 | #define DM644X_EMAC_CNTRL_OFFSET (0x0000) | ||
33 | #define DM644X_EMAC_CNTRL_MOD_OFFSET (0x1000) | ||
34 | #define DM644X_EMAC_CNTRL_RAM_OFFSET (0x2000) | ||
35 | #define DM644X_EMAC_CNTRL_RAM_SIZE (0x2000) | ||
36 | |||
37 | #define DM644X_ASYNC_EMIF_CONTROL_BASE 0x01E00000 | ||
38 | #define DM644X_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
39 | #define DM644X_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 | ||
40 | #define DM644X_ASYNC_EMIF_DATA_CE2_BASE 0x06000000 | ||
41 | #define DM644X_ASYNC_EMIF_DATA_CE3_BASE 0x08000000 | ||
42 | |||
43 | void __init dm644x_init(void); | ||
44 | void __init dm644x_init_asp(struct snd_platform_data *pdata); | ||
45 | void dm644x_set_vpfe_config(struct vpfe_config *cfg); | ||
46 | |||
47 | #endif /* __ASM_ARCH_DM644X_H */ | ||
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h index a8ee6c9f0bb0..b9bf3d6a4423 100644 --- a/arch/arm/mach-davinci/include/mach/dm646x.h +++ b/arch/arm/mach-davinci/include/mach/dm646x.h | |||
@@ -1,41 +1 @@ | |||
1 | /* | /* empty, remove once unused */ | |
2 | * Chip specific defines for DM646x SoC | ||
3 | * | ||
4 | * Author: Kevin Hilman, Deep Root Systems, LLC | ||
5 | * | ||
6 | * 2007 (c) Deep Root Systems, LLC. This file is licensed under | ||
7 | * the terms of the GNU General Public License version 2. This program | ||
8 | * is licensed "as is" without any warranty of any kind, whether express | ||
9 | * or implied. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_DM646X_H | ||
12 | #define __ASM_ARCH_DM646X_H | ||
13 | |||
14 | #include <mach/hardware.h> | ||
15 | #include <mach/asp.h> | ||
16 | #include <linux/i2c.h> | ||
17 | #include <linux/videodev2.h> | ||
18 | #include <linux/davinci_emac.h> | ||
19 | #include <media/davinci/vpif_types.h> | ||
20 | |||
21 | #define DM646X_EMAC_BASE (0x01C80000) | ||
22 | #define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000) | ||
23 | #define DM646X_EMAC_CNTRL_OFFSET (0x0000) | ||
24 | #define DM646X_EMAC_CNTRL_MOD_OFFSET (0x1000) | ||
25 | #define DM646X_EMAC_CNTRL_RAM_OFFSET (0x2000) | ||
26 | #define DM646X_EMAC_CNTRL_RAM_SIZE (0x2000) | ||
27 | |||
28 | #define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000 | ||
29 | #define DM646X_ASYNC_EMIF_CS2_SPACE_BASE 0x42000000 | ||
30 | |||
31 | void __init dm646x_init(void); | ||
32 | void __init dm646x_init_mcasp0(struct snd_platform_data *pdata); | ||
33 | void __init dm646x_init_mcasp1(struct snd_platform_data *pdata); | ||
34 | int __init dm646x_init_edma(struct edma_rsv_info *rsv); | ||
35 | |||
36 | void dm646x_video_init(void); | ||
37 | |||
38 | void dm646x_setup_vpif(struct vpif_display_config *, | ||
39 | struct vpif_capture_config *); | ||
40 | |||
41 | #endif /* __ASM_ARCH_DM646X_H */ | ||
diff --git a/arch/arm/mach-davinci/include/mach/entry-macro.S b/arch/arm/mach-davinci/include/mach/entry-macro.S index e14c0dc0e12c..c1661d2feca9 100644 --- a/arch/arm/mach-davinci/include/mach/entry-macro.S +++ b/arch/arm/mach-davinci/include/mach/entry-macro.S | |||
@@ -11,17 +11,11 @@ | |||
11 | #include <mach/io.h> | 11 | #include <mach/io.h> |
12 | #include <mach/irqs.h> | 12 | #include <mach/irqs.h> |
13 | 13 | ||
14 | .macro disable_fiq | ||
15 | .endm | ||
16 | |||
17 | .macro get_irqnr_preamble, base, tmp | 14 | .macro get_irqnr_preamble, base, tmp |
18 | ldr \base, =davinci_intc_base | 15 | ldr \base, =davinci_intc_base |
19 | ldr \base, [\base] | 16 | ldr \base, [\base] |
20 | .endm | 17 | .endm |
21 | 18 | ||
22 | .macro arch_ret_to_user, tmp1, tmp2 | ||
23 | .endm | ||
24 | |||
25 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 19 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
26 | #if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC) | 20 | #if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC) |
27 | ldr \tmp, =davinci_intc_type | 21 | ldr \tmp, =davinci_intc_type |
diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h index 414e0b93e741..0209b1fc22a1 100644 --- a/arch/arm/mach-davinci/include/mach/hardware.h +++ b/arch/arm/mach-davinci/include/mach/hardware.h | |||
@@ -19,8 +19,6 @@ | |||
19 | * and the chip/board init code should then explicitly include | 19 | * and the chip/board init code should then explicitly include |
20 | * <chipname>.h | 20 | * <chipname>.h |
21 | */ | 21 | */ |
22 | #define DAVINCI_SYSTEM_MODULE_BASE 0x01C40000 | ||
23 | |||
24 | /* | 22 | /* |
25 | * I/O mapping | 23 | * I/O mapping |
26 | */ | 24 | */ |
diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h deleted file mode 100644 index fcb7a015aba5..000000000000 --- a/arch/arm/mach-davinci/include/mach/system.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* | ||
2 | * DaVinci system defines | ||
3 | * | ||
4 | * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> | ||
5 | * | ||
6 | * 2007 (c) MontaVista Software, Inc. This file is licensed under | ||
7 | * the terms of the GNU General Public License version 2. This program | ||
8 | * is licensed "as is" without any warranty of any kind, whether express | ||
9 | * or implied. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_SYSTEM_H | ||
12 | #define __ASM_ARCH_SYSTEM_H | ||
13 | |||
14 | #include <mach/common.h> | ||
15 | |||
16 | static inline void arch_idle(void) | ||
17 | { | ||
18 | cpu_do_idle(); | ||
19 | } | ||
20 | |||
21 | #endif /* __ASM_ARCH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-dove/include/mach/entry-macro.S b/arch/arm/mach-dove/include/mach/entry-macro.S index e84c78c2a8b7..72d622baaad3 100644 --- a/arch/arm/mach-dove/include/mach/entry-macro.S +++ b/arch/arm/mach-dove/include/mach/entry-macro.S | |||
@@ -10,12 +10,6 @@ | |||
10 | 10 | ||
11 | #include <mach/bridge-regs.h> | 11 | #include <mach/bridge-regs.h> |
12 | 12 | ||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
18 | |||
19 | .macro get_irqnr_preamble, base, tmp | 13 | .macro get_irqnr_preamble, base, tmp |
20 | ldr \base, =IRQ_VIRT_BASE | 14 | ldr \base, =IRQ_VIRT_BASE |
21 | .endm | 15 | .endm |
diff --git a/arch/arm/mach-dove/include/mach/system.h b/arch/arm/mach-dove/include/mach/system.h deleted file mode 100644 index 3027954f6162..000000000000 --- a/arch/arm/mach-dove/include/mach/system.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-dove/include/mach/system.h | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_ARCH_SYSTEM_H | ||
10 | #define __ASM_ARCH_SYSTEM_H | ||
11 | |||
12 | static inline void arch_idle(void) | ||
13 | { | ||
14 | cpu_do_idle(); | ||
15 | } | ||
16 | |||
17 | #endif | ||
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c index 294aad07f7a0..804c9122b7b3 100644 --- a/arch/arm/mach-ebsa110/core.c +++ b/arch/arm/mach-ebsa110/core.c | |||
@@ -271,8 +271,33 @@ static struct platform_device *ebsa110_devices[] = { | |||
271 | &am79c961_device, | 271 | &am79c961_device, |
272 | }; | 272 | }; |
273 | 273 | ||
274 | /* | ||
275 | * EBSA110 idling methodology: | ||
276 | * | ||
277 | * We can not execute the "wait for interrupt" instruction since that | ||
278 | * will stop our MCLK signal (which provides the clock for the glue | ||
279 | * logic, and therefore the timer interrupt). | ||
280 | * | ||
281 | * Instead, we spin, polling the IRQ_STAT register for the occurrence | ||
282 | * of any interrupt with core clock down to the memory clock. | ||
283 | */ | ||
284 | static void ebsa110_idle(void) | ||
285 | { | ||
286 | const char *irq_stat = (char *)0xff000000; | ||
287 | |||
288 | /* disable clock switching */ | ||
289 | asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc"); | ||
290 | |||
291 | /* wait for an interrupt to occur */ | ||
292 | while (!*irq_stat); | ||
293 | |||
294 | /* enable clock switching */ | ||
295 | asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); | ||
296 | } | ||
297 | |||
274 | static int __init ebsa110_init(void) | 298 | static int __init ebsa110_init(void) |
275 | { | 299 | { |
300 | arm_pm_idle = ebsa110_idle; | ||
276 | return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices)); | 301 | return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices)); |
277 | } | 302 | } |
278 | 303 | ||
diff --git a/arch/arm/mach-ebsa110/include/mach/entry-macro.S b/arch/arm/mach-ebsa110/include/mach/entry-macro.S index cc3e5992f6b3..14b110de78a9 100644 --- a/arch/arm/mach-ebsa110/include/mach/entry-macro.S +++ b/arch/arm/mach-ebsa110/include/mach/entry-macro.S | |||
@@ -12,16 +12,10 @@ | |||
12 | 12 | ||
13 | #define IRQ_STAT 0xff000000 /* read */ | 13 | #define IRQ_STAT 0xff000000 /* read */ |
14 | 14 | ||
15 | .macro disable_fiq | ||
16 | .endm | ||
17 | |||
18 | .macro get_irqnr_preamble, base, tmp | 15 | .macro get_irqnr_preamble, base, tmp |
19 | mov \base, #IRQ_STAT | 16 | mov \base, #IRQ_STAT |
20 | .endm | 17 | .endm |
21 | 18 | ||
22 | .macro arch_ret_to_user, tmp1, tmp2 | ||
23 | .endm | ||
24 | |||
25 | .macro get_irqnr_and_base, irqnr, stat, base, tmp | 19 | .macro get_irqnr_and_base, irqnr, stat, base, tmp |
26 | ldrb \stat, [\base] @ get interrupts | 20 | ldrb \stat, [\base] @ get interrupts |
27 | mov \irqnr, #0 | 21 | mov \irqnr, #0 |
diff --git a/arch/arm/mach-ebsa110/include/mach/system.h b/arch/arm/mach-ebsa110/include/mach/system.h deleted file mode 100644 index 2e4af65edb6f..000000000000 --- a/arch/arm/mach-ebsa110/include/mach/system.h +++ /dev/null | |||
@@ -1,37 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ebsa110/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 1996-2000 Russell King. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef __ASM_ARCH_SYSTEM_H | ||
11 | #define __ASM_ARCH_SYSTEM_H | ||
12 | |||
13 | /* | ||
14 | * EBSA110 idling methodology: | ||
15 | * | ||
16 | * We can not execute the "wait for interrupt" instruction since that | ||
17 | * will stop our MCLK signal (which provides the clock for the glue | ||
18 | * logic, and therefore the timer interrupt). | ||
19 | * | ||
20 | * Instead, we spin, polling the IRQ_STAT register for the occurrence | ||
21 | * of any interrupt with core clock down to the memory clock. | ||
22 | */ | ||
23 | static inline void arch_idle(void) | ||
24 | { | ||
25 | const char *irq_stat = (char *)0xff000000; | ||
26 | |||
27 | /* disable clock switching */ | ||
28 | asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc"); | ||
29 | |||
30 | /* wait for an interrupt to occur */ | ||
31 | while (!*irq_stat); | ||
32 | |||
33 | /* enable clock switching */ | ||
34 | asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); | ||
35 | } | ||
36 | |||
37 | #endif | ||
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 24203f9a6796..903edb02fe4f 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c | |||
@@ -279,48 +279,14 @@ static struct amba_pl010_data ep93xx_uart_data = { | |||
279 | .set_mctrl = ep93xx_uart_set_mctrl, | 279 | .set_mctrl = ep93xx_uart_set_mctrl, |
280 | }; | 280 | }; |
281 | 281 | ||
282 | static struct amba_device uart1_device = { | 282 | static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE, |
283 | .dev = { | 283 | { IRQ_EP93XX_UART1 }, &ep93xx_uart_data); |
284 | .init_name = "apb:uart1", | ||
285 | .platform_data = &ep93xx_uart_data, | ||
286 | }, | ||
287 | .res = { | ||
288 | .start = EP93XX_UART1_PHYS_BASE, | ||
289 | .end = EP93XX_UART1_PHYS_BASE + 0x0fff, | ||
290 | .flags = IORESOURCE_MEM, | ||
291 | }, | ||
292 | .irq = { IRQ_EP93XX_UART1, NO_IRQ }, | ||
293 | .periphid = 0x00041010, | ||
294 | }; | ||
295 | |||
296 | static struct amba_device uart2_device = { | ||
297 | .dev = { | ||
298 | .init_name = "apb:uart2", | ||
299 | .platform_data = &ep93xx_uart_data, | ||
300 | }, | ||
301 | .res = { | ||
302 | .start = EP93XX_UART2_PHYS_BASE, | ||
303 | .end = EP93XX_UART2_PHYS_BASE + 0x0fff, | ||
304 | .flags = IORESOURCE_MEM, | ||
305 | }, | ||
306 | .irq = { IRQ_EP93XX_UART2, NO_IRQ }, | ||
307 | .periphid = 0x00041010, | ||
308 | }; | ||
309 | 284 | ||
310 | static struct amba_device uart3_device = { | 285 | static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE, |
311 | .dev = { | 286 | { IRQ_EP93XX_UART2 }, &ep93xx_uart_data); |
312 | .init_name = "apb:uart3", | ||
313 | .platform_data = &ep93xx_uart_data, | ||
314 | }, | ||
315 | .res = { | ||
316 | .start = EP93XX_UART3_PHYS_BASE, | ||
317 | .end = EP93XX_UART3_PHYS_BASE + 0x0fff, | ||
318 | .flags = IORESOURCE_MEM, | ||
319 | }, | ||
320 | .irq = { IRQ_EP93XX_UART3, NO_IRQ }, | ||
321 | .periphid = 0x00041010, | ||
322 | }; | ||
323 | 287 | ||
288 | static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE, | ||
289 | { IRQ_EP93XX_UART3 }, &ep93xx_uart_data); | ||
324 | 290 | ||
325 | static struct resource ep93xx_rtc_resource[] = { | 291 | static struct resource ep93xx_rtc_resource[] = { |
326 | { | 292 | { |
diff --git a/arch/arm/mach-ep93xx/include/mach/entry-macro.S b/arch/arm/mach-ep93xx/include/mach/entry-macro.S deleted file mode 100644 index 9be6edcf9045..000000000000 --- a/arch/arm/mach-ep93xx/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ep93xx/include/mach/entry-macro.S | ||
3 | * IRQ demultiplexing for EP93xx | ||
4 | * | ||
5 | * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or (at | ||
10 | * your option) any later version. | ||
11 | */ | ||
12 | |||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
diff --git a/arch/arm/mach-ep93xx/include/mach/system.h b/arch/arm/mach-ep93xx/include/mach/system.h deleted file mode 100644 index b5bec7cb9b52..000000000000 --- a/arch/arm/mach-ep93xx/include/mach/system.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ep93xx/include/mach/system.h | ||
3 | */ | ||
4 | static inline void arch_idle(void) | ||
5 | { | ||
6 | cpu_do_idle(); | ||
7 | } | ||
diff --git a/arch/arm/mach-exynos/clock-exynos4210.c b/arch/arm/mach-exynos/clock-exynos4210.c index 13312ccb2d93..54a92efcf5b1 100644 --- a/arch/arm/mach-exynos/clock-exynos4210.c +++ b/arch/arm/mach-exynos/clock-exynos4210.c | |||
@@ -117,7 +117,7 @@ static void exynos4210_clock_resume(void) | |||
117 | #define exynos4210_clock_resume NULL | 117 | #define exynos4210_clock_resume NULL |
118 | #endif | 118 | #endif |
119 | 119 | ||
120 | struct syscore_ops exynos4210_clock_syscore_ops = { | 120 | static struct syscore_ops exynos4210_clock_syscore_ops = { |
121 | .suspend = exynos4210_clock_suspend, | 121 | .suspend = exynos4210_clock_suspend, |
122 | .resume = exynos4210_clock_resume, | 122 | .resume = exynos4210_clock_resume, |
123 | }; | 123 | }; |
diff --git a/arch/arm/mach-exynos/clock-exynos4212.c b/arch/arm/mach-exynos/clock-exynos4212.c index 48af28566fa1..8e07ab13ff19 100644 --- a/arch/arm/mach-exynos/clock-exynos4212.c +++ b/arch/arm/mach-exynos/clock-exynos4212.c | |||
@@ -89,7 +89,7 @@ static void exynos4212_clock_resume(void) | |||
89 | #define exynos4212_clock_resume NULL | 89 | #define exynos4212_clock_resume NULL |
90 | #endif | 90 | #endif |
91 | 91 | ||
92 | struct syscore_ops exynos4212_clock_syscore_ops = { | 92 | static struct syscore_ops exynos4212_clock_syscore_ops = { |
93 | .suspend = exynos4212_clock_suspend, | 93 | .suspend = exynos4212_clock_suspend, |
94 | .resume = exynos4212_clock_resume, | 94 | .resume = exynos4212_clock_resume, |
95 | }; | 95 | }; |
diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c index 187287aa57ab..200874e82dcd 100644 --- a/arch/arm/mach-exynos/clock.c +++ b/arch/arm/mach-exynos/clock.c | |||
@@ -1526,7 +1526,7 @@ static void exynos4_clock_resume(void) | |||
1526 | #define exynos4_clock_resume NULL | 1526 | #define exynos4_clock_resume NULL |
1527 | #endif | 1527 | #endif |
1528 | 1528 | ||
1529 | struct syscore_ops exynos4_clock_syscore_ops = { | 1529 | static struct syscore_ops exynos4_clock_syscore_ops = { |
1530 | .suspend = exynos4_clock_suspend, | 1530 | .suspend = exynos4_clock_suspend, |
1531 | .resume = exynos4_clock_resume, | 1531 | .resume = exynos4_clock_resume, |
1532 | }; | 1532 | }; |
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index c59e18871006..34e819068fa4 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c | |||
@@ -201,14 +201,6 @@ static struct map_desc exynos4_iodesc1[] __initdata = { | |||
201 | }, | 201 | }, |
202 | }; | 202 | }; |
203 | 203 | ||
204 | static void exynos_idle(void) | ||
205 | { | ||
206 | if (!need_resched()) | ||
207 | cpu_do_idle(); | ||
208 | |||
209 | local_irq_enable(); | ||
210 | } | ||
211 | |||
212 | void exynos4_restart(char mode, const char *cmd) | 204 | void exynos4_restart(char mode, const char *cmd) |
213 | { | 205 | { |
214 | __raw_writel(0x1, S5P_SWRESET); | 206 | __raw_writel(0x1, S5P_SWRESET); |
@@ -467,10 +459,6 @@ early_initcall(exynos4_l2x0_cache_init); | |||
467 | int __init exynos_init(void) | 459 | int __init exynos_init(void) |
468 | { | 460 | { |
469 | printk(KERN_INFO "EXYNOS: Initializing architecture\n"); | 461 | printk(KERN_INFO "EXYNOS: Initializing architecture\n"); |
470 | |||
471 | /* set idle function */ | ||
472 | pm_idle = exynos_idle; | ||
473 | |||
474 | return device_register(&exynos4_dev); | 462 | return device_register(&exynos4_dev); |
475 | } | 463 | } |
476 | 464 | ||
@@ -673,7 +661,7 @@ static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc) | |||
673 | chained_irq_exit(chip, desc); | 661 | chained_irq_exit(chip, desc); |
674 | } | 662 | } |
675 | 663 | ||
676 | int __init exynos4_init_irq_eint(void) | 664 | static int __init exynos4_init_irq_eint(void) |
677 | { | 665 | { |
678 | int irq; | 666 | int irq; |
679 | 667 | ||
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c index b10fcd270f07..25f3ef2c36e5 100644 --- a/arch/arm/mach-exynos/dma.c +++ b/arch/arm/mach-exynos/dma.c | |||
@@ -36,7 +36,7 @@ | |||
36 | 36 | ||
37 | static u64 dma_dmamask = DMA_BIT_MASK(32); | 37 | static u64 dma_dmamask = DMA_BIT_MASK(32); |
38 | 38 | ||
39 | u8 pdma0_peri[] = { | 39 | static u8 pdma0_peri[] = { |
40 | DMACH_PCM0_RX, | 40 | DMACH_PCM0_RX, |
41 | DMACH_PCM0_TX, | 41 | DMACH_PCM0_TX, |
42 | DMACH_PCM2_RX, | 42 | DMACH_PCM2_RX, |
@@ -69,28 +69,15 @@ u8 pdma0_peri[] = { | |||
69 | DMACH_AC97_PCMOUT, | 69 | DMACH_AC97_PCMOUT, |
70 | }; | 70 | }; |
71 | 71 | ||
72 | struct dma_pl330_platdata exynos4_pdma0_pdata = { | 72 | static struct dma_pl330_platdata exynos4_pdma0_pdata = { |
73 | .nr_valid_peri = ARRAY_SIZE(pdma0_peri), | 73 | .nr_valid_peri = ARRAY_SIZE(pdma0_peri), |
74 | .peri_id = pdma0_peri, | 74 | .peri_id = pdma0_peri, |
75 | }; | 75 | }; |
76 | 76 | ||
77 | struct amba_device exynos4_device_pdma0 = { | 77 | static AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330, |
78 | .dev = { | 78 | EXYNOS4_PA_PDMA0, {IRQ_PDMA0}, &exynos4_pdma0_pdata); |
79 | .init_name = "dma-pl330.0", | ||
80 | .dma_mask = &dma_dmamask, | ||
81 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
82 | .platform_data = &exynos4_pdma0_pdata, | ||
83 | }, | ||
84 | .res = { | ||
85 | .start = EXYNOS4_PA_PDMA0, | ||
86 | .end = EXYNOS4_PA_PDMA0 + SZ_4K, | ||
87 | .flags = IORESOURCE_MEM, | ||
88 | }, | ||
89 | .irq = {IRQ_PDMA0, NO_IRQ}, | ||
90 | .periphid = 0x00041330, | ||
91 | }; | ||
92 | 79 | ||
93 | u8 pdma1_peri[] = { | 80 | static u8 pdma1_peri[] = { |
94 | DMACH_PCM0_RX, | 81 | DMACH_PCM0_RX, |
95 | DMACH_PCM0_TX, | 82 | DMACH_PCM0_TX, |
96 | DMACH_PCM1_RX, | 83 | DMACH_PCM1_RX, |
@@ -118,26 +105,13 @@ u8 pdma1_peri[] = { | |||
118 | DMACH_SLIMBUS5_TX, | 105 | DMACH_SLIMBUS5_TX, |
119 | }; | 106 | }; |
120 | 107 | ||
121 | struct dma_pl330_platdata exynos4_pdma1_pdata = { | 108 | static struct dma_pl330_platdata exynos4_pdma1_pdata = { |
122 | .nr_valid_peri = ARRAY_SIZE(pdma1_peri), | 109 | .nr_valid_peri = ARRAY_SIZE(pdma1_peri), |
123 | .peri_id = pdma1_peri, | 110 | .peri_id = pdma1_peri, |
124 | }; | 111 | }; |
125 | 112 | ||
126 | struct amba_device exynos4_device_pdma1 = { | 113 | static AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330, |
127 | .dev = { | 114 | EXYNOS4_PA_PDMA1, {IRQ_PDMA1}, &exynos4_pdma1_pdata); |
128 | .init_name = "dma-pl330.1", | ||
129 | .dma_mask = &dma_dmamask, | ||
130 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
131 | .platform_data = &exynos4_pdma1_pdata, | ||
132 | }, | ||
133 | .res = { | ||
134 | .start = EXYNOS4_PA_PDMA1, | ||
135 | .end = EXYNOS4_PA_PDMA1 + SZ_4K, | ||
136 | .flags = IORESOURCE_MEM, | ||
137 | }, | ||
138 | .irq = {IRQ_PDMA1, NO_IRQ}, | ||
139 | .periphid = 0x00041330, | ||
140 | }; | ||
141 | 115 | ||
142 | static int __init exynos4_dma_init(void) | 116 | static int __init exynos4_dma_init(void) |
143 | { | 117 | { |
@@ -146,11 +120,11 @@ static int __init exynos4_dma_init(void) | |||
146 | 120 | ||
147 | dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask); | 121 | dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask); |
148 | dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask); | 122 | dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask); |
149 | amba_device_register(&exynos4_device_pdma0, &iomem_resource); | 123 | amba_device_register(&exynos4_pdma0_device, &iomem_resource); |
150 | 124 | ||
151 | dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask); | 125 | dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask); |
152 | dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask); | 126 | dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask); |
153 | amba_device_register(&exynos4_device_pdma1, &iomem_resource); | 127 | amba_device_register(&exynos4_pdma1_device, &iomem_resource); |
154 | 128 | ||
155 | return 0; | 129 | return 0; |
156 | } | 130 | } |
diff --git a/arch/arm/mach-exynos/include/mach/entry-macro.S b/arch/arm/mach-exynos/include/mach/entry-macro.S deleted file mode 100644 index 3ba4f547534b..000000000000 --- a/arch/arm/mach-exynos/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* arch/arm/mach-exynos4/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Cloned from arch/arm/mach-realview/include/mach/entry-macro.S | ||
4 | * | ||
5 | * Low-level IRQ helper macros for EXYNOS4 platforms | ||
6 | * | ||
7 | * This file is licensed under the terms of the GNU General Public | ||
8 | * License version 2. This program is licensed "as is" without any | ||
9 | * warranty of any kind, whether express or implied. | ||
10 | */ | ||
11 | |||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro arch_ret_to_user, tmp1, tmp2 | ||
16 | .endm | ||
diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h deleted file mode 100644 index 0063a6de3dc8..000000000000 --- a/arch/arm/mach-exynos/include/mach/system.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/include/mach/system.h | ||
2 | * | ||
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * EXYNOS4 - system support header | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | ||
14 | #define __ASM_ARCH_SYSTEM_H __FILE__ | ||
15 | |||
16 | static void arch_idle(void) | ||
17 | { | ||
18 | /* nothing here yet */ | ||
19 | } | ||
20 | #endif /* __ASM_ARCH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c index 0679b8ad2d1e..3ec3ccf9f35c 100644 --- a/arch/arm/mach-exynos/mach-origen.c +++ b/arch/arm/mach-exynos/mach-origen.c | |||
@@ -412,7 +412,7 @@ static struct max8997_regulator_data __initdata origen_max8997_regulators[] = { | |||
412 | { MAX8997_BUCK7, &max8997_buck7_data }, | 412 | { MAX8997_BUCK7, &max8997_buck7_data }, |
413 | }; | 413 | }; |
414 | 414 | ||
415 | struct max8997_platform_data __initdata origen_max8997_pdata = { | 415 | static struct max8997_platform_data __initdata origen_max8997_pdata = { |
416 | .num_regulators = ARRAY_SIZE(origen_max8997_regulators), | 416 | .num_regulators = ARRAY_SIZE(origen_max8997_regulators), |
417 | .regulators = origen_max8997_regulators, | 417 | .regulators = origen_max8997_regulators, |
418 | 418 | ||
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c index 0fc65ffde8ff..e00d8e26d525 100644 --- a/arch/arm/mach-exynos/mach-universal_c210.c +++ b/arch/arm/mach-exynos/mach-universal_c210.c | |||
@@ -997,7 +997,7 @@ static void __init universal_map_io(void) | |||
997 | s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); | 997 | s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); |
998 | } | 998 | } |
999 | 999 | ||
1000 | void s5p_tv_setup(void) | 1000 | static void s5p_tv_setup(void) |
1001 | { | 1001 | { |
1002 | /* direct HPD to HDMI chip */ | 1002 | /* direct HPD to HDMI chip */ |
1003 | gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"); | 1003 | gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"); |
diff --git a/arch/arm/mach-footbridge/include/mach/entry-macro.S b/arch/arm/mach-footbridge/include/mach/entry-macro.S index d3847be0c667..dabbd5c54a78 100644 --- a/arch/arm/mach-footbridge/include/mach/entry-macro.S +++ b/arch/arm/mach-footbridge/include/mach/entry-macro.S | |||
@@ -14,9 +14,6 @@ | |||
14 | .equ dc21285_high, ARMCSR_BASE & 0xff000000 | 14 | .equ dc21285_high, ARMCSR_BASE & 0xff000000 |
15 | .equ dc21285_low, ARMCSR_BASE & 0x00ffffff | 15 | .equ dc21285_low, ARMCSR_BASE & 0x00ffffff |
16 | 16 | ||
17 | .macro disable_fiq | ||
18 | .endm | ||
19 | |||
20 | .macro get_irqnr_preamble, base, tmp | 17 | .macro get_irqnr_preamble, base, tmp |
21 | mov \base, #dc21285_high | 18 | mov \base, #dc21285_high |
22 | .if dc21285_low | 19 | .if dc21285_low |
@@ -24,9 +21,6 @@ | |||
24 | .endif | 21 | .endif |
25 | .endm | 22 | .endm |
26 | 23 | ||
27 | .macro arch_ret_to_user, tmp1, tmp2 | ||
28 | .endm | ||
29 | |||
30 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 24 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
31 | ldr \irqstat, [\base, #0x180] @ get interrupts | 25 | ldr \irqstat, [\base, #0x180] @ get interrupts |
32 | 26 | ||
diff --git a/arch/arm/mach-footbridge/include/mach/system.h b/arch/arm/mach-footbridge/include/mach/system.h deleted file mode 100644 index a174a5841bc2..000000000000 --- a/arch/arm/mach-footbridge/include/mach/system.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-footbridge/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 1996-1999 Russell King. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
diff --git a/arch/arm/mach-gemini/Makefile b/arch/arm/mach-gemini/Makefile index c5b24b95a76e..7355c0bbcb5e 100644 --- a/arch/arm/mach-gemini/Makefile +++ b/arch/arm/mach-gemini/Makefile | |||
@@ -4,7 +4,7 @@ | |||
4 | 4 | ||
5 | # Object file lists. | 5 | # Object file lists. |
6 | 6 | ||
7 | obj-y := irq.o mm.o time.o devices.o gpio.o | 7 | obj-y := irq.o mm.o time.o devices.o gpio.o idle.o |
8 | 8 | ||
9 | # Board-specific support | 9 | # Board-specific support |
10 | obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o | 10 | obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o |
diff --git a/arch/arm/mach-gemini/idle.c b/arch/arm/mach-gemini/idle.c new file mode 100644 index 000000000000..92bbd6bb600a --- /dev/null +++ b/arch/arm/mach-gemini/idle.c | |||
@@ -0,0 +1,29 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-gemini/idle.c | ||
3 | */ | ||
4 | |||
5 | #include <linux/init.h> | ||
6 | #include <asm/system.h> | ||
7 | #include <asm/proc-fns.h> | ||
8 | |||
9 | static void gemini_idle(void) | ||
10 | { | ||
11 | /* | ||
12 | * Because of broken hardware we have to enable interrupts or the CPU | ||
13 | * will never wakeup... Acctualy it is not very good to enable | ||
14 | * interrupts first since scheduler can miss a tick, but there is | ||
15 | * no other way around this. Platforms that needs it for power saving | ||
16 | * should call enable_hlt() in init code, since by default it is | ||
17 | * disabled. | ||
18 | */ | ||
19 | local_irq_enable(); | ||
20 | cpu_do_idle(); | ||
21 | } | ||
22 | |||
23 | static int __init gemini_idle_init(void) | ||
24 | { | ||
25 | arm_pm_idle = gemini_idle; | ||
26 | return 0; | ||
27 | } | ||
28 | |||
29 | arch_initcall(gemini_idle_init); | ||
diff --git a/arch/arm/mach-gemini/include/mach/entry-macro.S b/arch/arm/mach-gemini/include/mach/entry-macro.S index 1624f91a2b8b..f044e430bfa4 100644 --- a/arch/arm/mach-gemini/include/mach/entry-macro.S +++ b/arch/arm/mach-gemini/include/mach/entry-macro.S | |||
@@ -12,15 +12,9 @@ | |||
12 | 12 | ||
13 | #define IRQ_STATUS 0x14 | 13 | #define IRQ_STATUS 0x14 |
14 | 14 | ||
15 | .macro disable_fiq | ||
16 | .endm | ||
17 | |||
18 | .macro get_irqnr_preamble, base, tmp | 15 | .macro get_irqnr_preamble, base, tmp |
19 | .endm | 16 | .endm |
20 | 17 | ||
21 | .macro arch_ret_to_user, tmp1, tmp2 | ||
22 | .endm | ||
23 | |||
24 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 18 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
25 | ldr \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS) | 19 | ldr \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS) |
26 | ldr \irqnr, [\irqstat] | 20 | ldr \irqnr, [\irqstat] |
diff --git a/arch/arm/mach-gemini/include/mach/system.h b/arch/arm/mach-gemini/include/mach/system.h index 4d9c1f872472..a33b5a1f8ab4 100644 --- a/arch/arm/mach-gemini/include/mach/system.h +++ b/arch/arm/mach-gemini/include/mach/system.h | |||
@@ -14,20 +14,6 @@ | |||
14 | #include <mach/hardware.h> | 14 | #include <mach/hardware.h> |
15 | #include <mach/global_reg.h> | 15 | #include <mach/global_reg.h> |
16 | 16 | ||
17 | static inline void arch_idle(void) | ||
18 | { | ||
19 | /* | ||
20 | * Because of broken hardware we have to enable interrupts or the CPU | ||
21 | * will never wakeup... Acctualy it is not very good to enable | ||
22 | * interrupts here since scheduler can miss a tick, but there is | ||
23 | * no other way around this. Platforms that needs it for power saving | ||
24 | * should call enable_hlt() in init code, since by default it is | ||
25 | * disabled. | ||
26 | */ | ||
27 | local_irq_enable(); | ||
28 | cpu_do_idle(); | ||
29 | } | ||
30 | |||
31 | static inline void arch_reset(char mode, const char *cmd) | 17 | static inline void arch_reset(char mode, const char *cmd) |
32 | { | 18 | { |
33 | __raw_writel(RESET_GLOBAL | RESET_CPU1, | 19 | __raw_writel(RESET_GLOBAL | RESET_CPU1, |
diff --git a/arch/arm/mach-gemini/irq.c b/arch/arm/mach-gemini/irq.c index 9485a8fdf851..ca70e5fcc7ac 100644 --- a/arch/arm/mach-gemini/irq.c +++ b/arch/arm/mach-gemini/irq.c | |||
@@ -73,8 +73,8 @@ void __init gemini_init_irq(void) | |||
73 | unsigned int i, mode = 0, level = 0; | 73 | unsigned int i, mode = 0, level = 0; |
74 | 74 | ||
75 | /* | 75 | /* |
76 | * Disable arch_idle() by default since it is buggy | 76 | * Disable the idle handler by default since it is buggy |
77 | * For more info see arch/arm/mach-gemini/include/mach/system.h | 77 | * For more info see arch/arm/mach-gemini/idle.c |
78 | */ | 78 | */ |
79 | disable_hlt(); | 79 | disable_hlt(); |
80 | 80 | ||
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c index f8a2f6bb5483..e756d1ac00c2 100644 --- a/arch/arm/mach-h720x/common.c +++ b/arch/arm/mach-h720x/common.c | |||
@@ -247,3 +247,21 @@ void h720x_restart(char mode, const char *cmd) | |||
247 | { | 247 | { |
248 | CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET; | 248 | CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET; |
249 | } | 249 | } |
250 | |||
251 | static void h720x__idle(void) | ||
252 | { | ||
253 | CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE; | ||
254 | nop(); | ||
255 | nop(); | ||
256 | CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN; | ||
257 | nop(); | ||
258 | nop(); | ||
259 | } | ||
260 | |||
261 | static int __init h720x_idle_init(void) | ||
262 | { | ||
263 | arm_pm_idle = h720x__idle; | ||
264 | return 0; | ||
265 | } | ||
266 | |||
267 | arch_initcall(h720x_idle_init); | ||
diff --git a/arch/arm/mach-h720x/include/mach/entry-macro.S b/arch/arm/mach-h720x/include/mach/entry-macro.S index c3948e5ba4a0..75267fad7012 100644 --- a/arch/arm/mach-h720x/include/mach/entry-macro.S +++ b/arch/arm/mach-h720x/include/mach/entry-macro.S | |||
@@ -8,15 +8,9 @@ | |||
8 | * warranty of any kind, whether express or implied. | 8 | * warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro get_irqnr_preamble, base, tmp | 11 | .macro get_irqnr_preamble, base, tmp |
15 | .endm | 12 | .endm |
16 | 13 | ||
17 | .macro arch_ret_to_user, tmp1, tmp2 | ||
18 | .endm | ||
19 | |||
20 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 14 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
21 | #if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202) | 15 | #if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202) |
22 | @ we could use the id register on H7202, but this is not | 16 | @ we could use the id register on H7202, but this is not |
diff --git a/arch/arm/mach-h720x/include/mach/system.h b/arch/arm/mach-h720x/include/mach/system.h deleted file mode 100644 index 16ac46e239aa..000000000000 --- a/arch/arm/mach-h720x/include/mach/system.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-h720x/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2001-2002 Jungjun Kim, Hynix Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * arch/arm/mach-h720x/include/mach/system.h | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | ||
14 | #define __ASM_ARCH_SYSTEM_H | ||
15 | #include <mach/hardware.h> | ||
16 | |||
17 | static void arch_idle(void) | ||
18 | { | ||
19 | CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE; | ||
20 | nop(); | ||
21 | nop(); | ||
22 | CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN; | ||
23 | nop(); | ||
24 | nop(); | ||
25 | } | ||
26 | |||
27 | #endif | ||
diff --git a/arch/arm/mach-highbank/include/mach/entry-macro.S b/arch/arm/mach-highbank/include/mach/entry-macro.S deleted file mode 100644 index a14f9e62ca92..000000000000 --- a/arch/arm/mach-highbank/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | .macro disable_fiq | ||
2 | .endm | ||
3 | |||
4 | .macro arch_ret_to_user, tmp1, tmp2 | ||
5 | .endm | ||
diff --git a/arch/arm/mach-highbank/include/mach/system.h b/arch/arm/mach-highbank/include/mach/system.h deleted file mode 100644 index b1d8b5fbe373..000000000000 --- a/arch/arm/mach-highbank/include/mach/system.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2010-2011 Calxeda, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License along with | ||
14 | * this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | #ifndef __MACH_SYSTEM_H | ||
17 | #define __MACH_SYSTEM_H | ||
18 | |||
19 | static inline void arch_idle(void) | ||
20 | { | ||
21 | cpu_do_idle(); | ||
22 | } | ||
23 | |||
24 | #endif | ||
diff --git a/arch/arm/mach-imx/clock-imx31.c b/arch/arm/mach-imx/clock-imx31.c index 988a28178d4c..3a943cd4159f 100644 --- a/arch/arm/mach-imx/clock-imx31.c +++ b/arch/arm/mach-imx/clock-imx31.c | |||
@@ -32,7 +32,7 @@ | |||
32 | #include <mach/mx31.h> | 32 | #include <mach/mx31.h> |
33 | #include <mach/common.h> | 33 | #include <mach/common.h> |
34 | 34 | ||
35 | #include "crmregs-imx31.h" | 35 | #include "crmregs-imx3.h" |
36 | 36 | ||
37 | #define PRE_DIV_MIN_FREQ 10000000 /* Minimum Frequency after Predivider */ | 37 | #define PRE_DIV_MIN_FREQ 10000000 /* Minimum Frequency after Predivider */ |
38 | 38 | ||
diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c index ac8238caecb9..1e279af656ad 100644 --- a/arch/arm/mach-imx/clock-imx35.c +++ b/arch/arm/mach-imx/clock-imx35.c | |||
@@ -27,23 +27,7 @@ | |||
27 | #include <mach/hardware.h> | 27 | #include <mach/hardware.h> |
28 | #include <mach/common.h> | 28 | #include <mach/common.h> |
29 | 29 | ||
30 | #define CCM_BASE MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR) | 30 | #include "crmregs-imx3.h" |
31 | |||
32 | #define CCM_CCMR 0x00 | ||
33 | #define CCM_PDR0 0x04 | ||
34 | #define CCM_PDR1 0x08 | ||
35 | #define CCM_PDR2 0x0C | ||
36 | #define CCM_PDR3 0x10 | ||
37 | #define CCM_PDR4 0x14 | ||
38 | #define CCM_RCSR 0x18 | ||
39 | #define CCM_MPCTL 0x1C | ||
40 | #define CCM_PPCTL 0x20 | ||
41 | #define CCM_ACMR 0x24 | ||
42 | #define CCM_COSR 0x28 | ||
43 | #define CCM_CGR0 0x2C | ||
44 | #define CCM_CGR1 0x30 | ||
45 | #define CCM_CGR2 0x34 | ||
46 | #define CCM_CGR3 0x38 | ||
47 | 31 | ||
48 | #ifdef HAVE_SET_RATE_SUPPORT | 32 | #ifdef HAVE_SET_RATE_SUPPORT |
49 | static void calc_dividers(u32 div, u32 *pre, u32 *post, u32 maxpost) | 33 | static void calc_dividers(u32 div, u32 *pre, u32 *post, u32 maxpost) |
@@ -111,14 +95,14 @@ static void calc_dividers_3_3(u32 div, u32 *pre, u32 *post) | |||
111 | 95 | ||
112 | static unsigned long get_rate_mpll(void) | 96 | static unsigned long get_rate_mpll(void) |
113 | { | 97 | { |
114 | ulong mpctl = __raw_readl(CCM_BASE + CCM_MPCTL); | 98 | ulong mpctl = __raw_readl(MX35_CCM_MPCTL); |
115 | 99 | ||
116 | return mxc_decode_pll(mpctl, 24000000); | 100 | return mxc_decode_pll(mpctl, 24000000); |
117 | } | 101 | } |
118 | 102 | ||
119 | static unsigned long get_rate_ppll(void) | 103 | static unsigned long get_rate_ppll(void) |
120 | { | 104 | { |
121 | ulong ppctl = __raw_readl(CCM_BASE + CCM_PPCTL); | 105 | ulong ppctl = __raw_readl(MX35_CCM_PPCTL); |
122 | 106 | ||
123 | return mxc_decode_pll(ppctl, 24000000); | 107 | return mxc_decode_pll(ppctl, 24000000); |
124 | } | 108 | } |
@@ -148,7 +132,7 @@ static struct arm_ahb_div clk_consumer[] = { | |||
148 | 132 | ||
149 | static unsigned long get_rate_arm(void) | 133 | static unsigned long get_rate_arm(void) |
150 | { | 134 | { |
151 | unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); | 135 | unsigned long pdr0 = __raw_readl(MXC_CCM_PDR0); |
152 | struct arm_ahb_div *aad; | 136 | struct arm_ahb_div *aad; |
153 | unsigned long fref = get_rate_mpll(); | 137 | unsigned long fref = get_rate_mpll(); |
154 | 138 | ||
@@ -161,7 +145,7 @@ static unsigned long get_rate_arm(void) | |||
161 | 145 | ||
162 | static unsigned long get_rate_ahb(struct clk *clk) | 146 | static unsigned long get_rate_ahb(struct clk *clk) |
163 | { | 147 | { |
164 | unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); | 148 | unsigned long pdr0 = __raw_readl(MXC_CCM_PDR0); |
165 | struct arm_ahb_div *aad; | 149 | struct arm_ahb_div *aad; |
166 | unsigned long fref = get_rate_arm(); | 150 | unsigned long fref = get_rate_arm(); |
167 | 151 | ||
@@ -177,8 +161,8 @@ static unsigned long get_rate_ipg(struct clk *clk) | |||
177 | 161 | ||
178 | static unsigned long get_rate_uart(struct clk *clk) | 162 | static unsigned long get_rate_uart(struct clk *clk) |
179 | { | 163 | { |
180 | unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3); | 164 | unsigned long pdr3 = __raw_readl(MX35_CCM_PDR3); |
181 | unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); | 165 | unsigned long pdr4 = __raw_readl(MX35_CCM_PDR4); |
182 | unsigned long div = ((pdr4 >> 10) & 0x3f) + 1; | 166 | unsigned long div = ((pdr4 >> 10) & 0x3f) + 1; |
183 | 167 | ||
184 | if (pdr3 & (1 << 14)) | 168 | if (pdr3 & (1 << 14)) |
@@ -189,7 +173,7 @@ static unsigned long get_rate_uart(struct clk *clk) | |||
189 | 173 | ||
190 | static unsigned long get_rate_sdhc(struct clk *clk) | 174 | static unsigned long get_rate_sdhc(struct clk *clk) |
191 | { | 175 | { |
192 | unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3); | 176 | unsigned long pdr3 = __raw_readl(MX35_CCM_PDR3); |
193 | unsigned long div, rate; | 177 | unsigned long div, rate; |
194 | 178 | ||
195 | if (pdr3 & (1 << 6)) | 179 | if (pdr3 & (1 << 6)) |
@@ -215,7 +199,7 @@ static unsigned long get_rate_sdhc(struct clk *clk) | |||
215 | 199 | ||
216 | static unsigned long get_rate_mshc(struct clk *clk) | 200 | static unsigned long get_rate_mshc(struct clk *clk) |
217 | { | 201 | { |
218 | unsigned long pdr1 = __raw_readl(CCM_BASE + CCM_PDR1); | 202 | unsigned long pdr1 = __raw_readl(MXC_CCM_PDR1); |
219 | unsigned long div1, div2, rate; | 203 | unsigned long div1, div2, rate; |
220 | 204 | ||
221 | if (pdr1 & (1 << 7)) | 205 | if (pdr1 & (1 << 7)) |
@@ -231,7 +215,7 @@ static unsigned long get_rate_mshc(struct clk *clk) | |||
231 | 215 | ||
232 | static unsigned long get_rate_ssi(struct clk *clk) | 216 | static unsigned long get_rate_ssi(struct clk *clk) |
233 | { | 217 | { |
234 | unsigned long pdr2 = __raw_readl(CCM_BASE + CCM_PDR2); | 218 | unsigned long pdr2 = __raw_readl(MX35_CCM_PDR2); |
235 | unsigned long div1, div2, rate; | 219 | unsigned long div1, div2, rate; |
236 | 220 | ||
237 | if (pdr2 & (1 << 6)) | 221 | if (pdr2 & (1 << 6)) |
@@ -256,7 +240,7 @@ static unsigned long get_rate_ssi(struct clk *clk) | |||
256 | 240 | ||
257 | static unsigned long get_rate_csi(struct clk *clk) | 241 | static unsigned long get_rate_csi(struct clk *clk) |
258 | { | 242 | { |
259 | unsigned long pdr2 = __raw_readl(CCM_BASE + CCM_PDR2); | 243 | unsigned long pdr2 = __raw_readl(MX35_CCM_PDR2); |
260 | unsigned long rate; | 244 | unsigned long rate; |
261 | 245 | ||
262 | if (pdr2 & (1 << 7)) | 246 | if (pdr2 & (1 << 7)) |
@@ -269,7 +253,7 @@ static unsigned long get_rate_csi(struct clk *clk) | |||
269 | 253 | ||
270 | static unsigned long get_rate_otg(struct clk *clk) | 254 | static unsigned long get_rate_otg(struct clk *clk) |
271 | { | 255 | { |
272 | unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); | 256 | unsigned long pdr4 = __raw_readl(MX35_CCM_PDR4); |
273 | unsigned long rate; | 257 | unsigned long rate; |
274 | 258 | ||
275 | if (pdr4 & (1 << 9)) | 259 | if (pdr4 & (1 << 9)) |
@@ -282,8 +266,8 @@ static unsigned long get_rate_otg(struct clk *clk) | |||
282 | 266 | ||
283 | static unsigned long get_rate_ipg_per(struct clk *clk) | 267 | static unsigned long get_rate_ipg_per(struct clk *clk) |
284 | { | 268 | { |
285 | unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); | 269 | unsigned long pdr0 = __raw_readl(MXC_CCM_PDR0); |
286 | unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); | 270 | unsigned long pdr4 = __raw_readl(MX35_CCM_PDR4); |
287 | unsigned long div; | 271 | unsigned long div; |
288 | 272 | ||
289 | if (pdr0 & (1 << 26)) { | 273 | if (pdr0 & (1 << 26)) { |
@@ -297,7 +281,7 @@ static unsigned long get_rate_ipg_per(struct clk *clk) | |||
297 | 281 | ||
298 | static unsigned long get_rate_hsp(struct clk *clk) | 282 | static unsigned long get_rate_hsp(struct clk *clk) |
299 | { | 283 | { |
300 | unsigned long hsp_podf = (__raw_readl(CCM_BASE + CCM_PDR0) >> 20) & 0x03; | 284 | unsigned long hsp_podf = (__raw_readl(MXC_CCM_PDR0) >> 20) & 0x03; |
301 | unsigned long fref = get_rate_mpll(); | 285 | unsigned long fref = get_rate_mpll(); |
302 | 286 | ||
303 | if (fref > 400 * 1000 * 1000) { | 287 | if (fref > 400 * 1000 * 1000) { |
@@ -345,7 +329,7 @@ static void clk_cgr_disable(struct clk *clk) | |||
345 | #define DEFINE_CLOCK(name, i, er, es, gr, sr) \ | 329 | #define DEFINE_CLOCK(name, i, er, es, gr, sr) \ |
346 | static struct clk name = { \ | 330 | static struct clk name = { \ |
347 | .id = i, \ | 331 | .id = i, \ |
348 | .enable_reg = CCM_BASE + er, \ | 332 | .enable_reg = er, \ |
349 | .enable_shift = es, \ | 333 | .enable_shift = es, \ |
350 | .get_rate = gr, \ | 334 | .get_rate = gr, \ |
351 | .set_rate = sr, \ | 335 | .set_rate = sr, \ |
@@ -353,59 +337,59 @@ static void clk_cgr_disable(struct clk *clk) | |||
353 | .disable = clk_cgr_disable, \ | 337 | .disable = clk_cgr_disable, \ |
354 | } | 338 | } |
355 | 339 | ||
356 | DEFINE_CLOCK(asrc_clk, 0, CCM_CGR0, 0, NULL, NULL); | 340 | DEFINE_CLOCK(asrc_clk, 0, MX35_CCM_CGR0, 0, NULL, NULL); |
357 | DEFINE_CLOCK(pata_clk, 0, CCM_CGR0, 2, get_rate_ipg, NULL); | 341 | DEFINE_CLOCK(pata_clk, 0, MX35_CCM_CGR0, 2, get_rate_ipg, NULL); |
358 | /* DEFINE_CLOCK(audmux_clk, 0, CCM_CGR0, 4, NULL, NULL); */ | 342 | /* DEFINE_CLOCK(audmux_clk, 0, MX35_CCM_CGR0, 4, NULL, NULL); */ |
359 | DEFINE_CLOCK(can1_clk, 0, CCM_CGR0, 6, get_rate_ipg, NULL); | 343 | DEFINE_CLOCK(can1_clk, 0, MX35_CCM_CGR0, 6, get_rate_ipg, NULL); |
360 | DEFINE_CLOCK(can2_clk, 1, CCM_CGR0, 8, get_rate_ipg, NULL); | 344 | DEFINE_CLOCK(can2_clk, 1, MX35_CCM_CGR0, 8, get_rate_ipg, NULL); |
361 | DEFINE_CLOCK(cspi1_clk, 0, CCM_CGR0, 10, get_rate_ipg, NULL); | 345 | DEFINE_CLOCK(cspi1_clk, 0, MX35_CCM_CGR0, 10, get_rate_ipg, NULL); |
362 | DEFINE_CLOCK(cspi2_clk, 1, CCM_CGR0, 12, get_rate_ipg, NULL); | 346 | DEFINE_CLOCK(cspi2_clk, 1, MX35_CCM_CGR0, 12, get_rate_ipg, NULL); |
363 | DEFINE_CLOCK(ect_clk, 0, CCM_CGR0, 14, get_rate_ipg, NULL); | 347 | DEFINE_CLOCK(ect_clk, 0, MX35_CCM_CGR0, 14, get_rate_ipg, NULL); |
364 | DEFINE_CLOCK(edio_clk, 0, CCM_CGR0, 16, NULL, NULL); | 348 | DEFINE_CLOCK(edio_clk, 0, MX35_CCM_CGR0, 16, NULL, NULL); |
365 | DEFINE_CLOCK(emi_clk, 0, CCM_CGR0, 18, get_rate_ipg, NULL); | 349 | DEFINE_CLOCK(emi_clk, 0, MX35_CCM_CGR0, 18, get_rate_ipg, NULL); |
366 | DEFINE_CLOCK(epit1_clk, 0, CCM_CGR0, 20, get_rate_ipg, NULL); | 350 | DEFINE_CLOCK(epit1_clk, 0, MX35_CCM_CGR0, 20, get_rate_ipg, NULL); |
367 | DEFINE_CLOCK(epit2_clk, 1, CCM_CGR0, 22, get_rate_ipg, NULL); | 351 | DEFINE_CLOCK(epit2_clk, 1, MX35_CCM_CGR0, 22, get_rate_ipg, NULL); |
368 | DEFINE_CLOCK(esai_clk, 0, CCM_CGR0, 24, NULL, NULL); | 352 | DEFINE_CLOCK(esai_clk, 0, MX35_CCM_CGR0, 24, NULL, NULL); |
369 | DEFINE_CLOCK(esdhc1_clk, 0, CCM_CGR0, 26, get_rate_sdhc, NULL); | 353 | DEFINE_CLOCK(esdhc1_clk, 0, MX35_CCM_CGR0, 26, get_rate_sdhc, NULL); |
370 | DEFINE_CLOCK(esdhc2_clk, 1, CCM_CGR0, 28, get_rate_sdhc, NULL); | 354 | DEFINE_CLOCK(esdhc2_clk, 1, MX35_CCM_CGR0, 28, get_rate_sdhc, NULL); |
371 | DEFINE_CLOCK(esdhc3_clk, 2, CCM_CGR0, 30, get_rate_sdhc, NULL); | 355 | DEFINE_CLOCK(esdhc3_clk, 2, MX35_CCM_CGR0, 30, get_rate_sdhc, NULL); |
372 | 356 | ||
373 | DEFINE_CLOCK(fec_clk, 0, CCM_CGR1, 0, get_rate_ipg, NULL); | 357 | DEFINE_CLOCK(fec_clk, 0, MX35_CCM_CGR1, 0, get_rate_ipg, NULL); |
374 | DEFINE_CLOCK(gpio1_clk, 0, CCM_CGR1, 2, NULL, NULL); | 358 | DEFINE_CLOCK(gpio1_clk, 0, MX35_CCM_CGR1, 2, NULL, NULL); |
375 | DEFINE_CLOCK(gpio2_clk, 1, CCM_CGR1, 4, NULL, NULL); | 359 | DEFINE_CLOCK(gpio2_clk, 1, MX35_CCM_CGR1, 4, NULL, NULL); |
376 | DEFINE_CLOCK(gpio3_clk, 2, CCM_CGR1, 6, NULL, NULL); | 360 | DEFINE_CLOCK(gpio3_clk, 2, MX35_CCM_CGR1, 6, NULL, NULL); |
377 | DEFINE_CLOCK(gpt_clk, 0, CCM_CGR1, 8, get_rate_ipg, NULL); | 361 | DEFINE_CLOCK(gpt_clk, 0, MX35_CCM_CGR1, 8, get_rate_ipg, NULL); |
378 | DEFINE_CLOCK(i2c1_clk, 0, CCM_CGR1, 10, get_rate_ipg_per, NULL); | 362 | DEFINE_CLOCK(i2c1_clk, 0, MX35_CCM_CGR1, 10, get_rate_ipg_per, NULL); |
379 | DEFINE_CLOCK(i2c2_clk, 1, CCM_CGR1, 12, get_rate_ipg_per, NULL); | 363 | DEFINE_CLOCK(i2c2_clk, 1, MX35_CCM_CGR1, 12, get_rate_ipg_per, NULL); |
380 | DEFINE_CLOCK(i2c3_clk, 2, CCM_CGR1, 14, get_rate_ipg_per, NULL); | 364 | DEFINE_CLOCK(i2c3_clk, 2, MX35_CCM_CGR1, 14, get_rate_ipg_per, NULL); |
381 | DEFINE_CLOCK(iomuxc_clk, 0, CCM_CGR1, 16, NULL, NULL); | 365 | DEFINE_CLOCK(iomuxc_clk, 0, MX35_CCM_CGR1, 16, NULL, NULL); |
382 | DEFINE_CLOCK(ipu_clk, 0, CCM_CGR1, 18, get_rate_hsp, NULL); | 366 | DEFINE_CLOCK(ipu_clk, 0, MX35_CCM_CGR1, 18, get_rate_hsp, NULL); |
383 | DEFINE_CLOCK(kpp_clk, 0, CCM_CGR1, 20, get_rate_ipg, NULL); | 367 | DEFINE_CLOCK(kpp_clk, 0, MX35_CCM_CGR1, 20, get_rate_ipg, NULL); |
384 | DEFINE_CLOCK(mlb_clk, 0, CCM_CGR1, 22, get_rate_ahb, NULL); | 368 | DEFINE_CLOCK(mlb_clk, 0, MX35_CCM_CGR1, 22, get_rate_ahb, NULL); |
385 | DEFINE_CLOCK(mshc_clk, 0, CCM_CGR1, 24, get_rate_mshc, NULL); | 369 | DEFINE_CLOCK(mshc_clk, 0, MX35_CCM_CGR1, 24, get_rate_mshc, NULL); |
386 | DEFINE_CLOCK(owire_clk, 0, CCM_CGR1, 26, get_rate_ipg_per, NULL); | 370 | DEFINE_CLOCK(owire_clk, 0, MX35_CCM_CGR1, 26, get_rate_ipg_per, NULL); |
387 | DEFINE_CLOCK(pwm_clk, 0, CCM_CGR1, 28, get_rate_ipg_per, NULL); | 371 | DEFINE_CLOCK(pwm_clk, 0, MX35_CCM_CGR1, 28, get_rate_ipg_per, NULL); |
388 | DEFINE_CLOCK(rngc_clk, 0, CCM_CGR1, 30, get_rate_ipg, NULL); | 372 | DEFINE_CLOCK(rngc_clk, 0, MX35_CCM_CGR1, 30, get_rate_ipg, NULL); |
389 | 373 | ||
390 | DEFINE_CLOCK(rtc_clk, 0, CCM_CGR2, 0, get_rate_ipg, NULL); | 374 | DEFINE_CLOCK(rtc_clk, 0, MX35_CCM_CGR2, 0, get_rate_ipg, NULL); |
391 | DEFINE_CLOCK(rtic_clk, 0, CCM_CGR2, 2, get_rate_ahb, NULL); | 375 | DEFINE_CLOCK(rtic_clk, 0, MX35_CCM_CGR2, 2, get_rate_ahb, NULL); |
392 | DEFINE_CLOCK(scc_clk, 0, CCM_CGR2, 4, get_rate_ipg, NULL); | 376 | DEFINE_CLOCK(scc_clk, 0, MX35_CCM_CGR2, 4, get_rate_ipg, NULL); |
393 | DEFINE_CLOCK(sdma_clk, 0, CCM_CGR2, 6, NULL, NULL); | 377 | DEFINE_CLOCK(sdma_clk, 0, MX35_CCM_CGR2, 6, NULL, NULL); |
394 | DEFINE_CLOCK(spba_clk, 0, CCM_CGR2, 8, get_rate_ipg, NULL); | 378 | DEFINE_CLOCK(spba_clk, 0, MX35_CCM_CGR2, 8, get_rate_ipg, NULL); |
395 | DEFINE_CLOCK(spdif_clk, 0, CCM_CGR2, 10, NULL, NULL); | 379 | DEFINE_CLOCK(spdif_clk, 0, MX35_CCM_CGR2, 10, NULL, NULL); |
396 | DEFINE_CLOCK(ssi1_clk, 0, CCM_CGR2, 12, get_rate_ssi, NULL); | 380 | DEFINE_CLOCK(ssi1_clk, 0, MX35_CCM_CGR2, 12, get_rate_ssi, NULL); |
397 | DEFINE_CLOCK(ssi2_clk, 1, CCM_CGR2, 14, get_rate_ssi, NULL); | 381 | DEFINE_CLOCK(ssi2_clk, 1, MX35_CCM_CGR2, 14, get_rate_ssi, NULL); |
398 | DEFINE_CLOCK(uart1_clk, 0, CCM_CGR2, 16, get_rate_uart, NULL); | 382 | DEFINE_CLOCK(uart1_clk, 0, MX35_CCM_CGR2, 16, get_rate_uart, NULL); |
399 | DEFINE_CLOCK(uart2_clk, 1, CCM_CGR2, 18, get_rate_uart, NULL); | 383 | DEFINE_CLOCK(uart2_clk, 1, MX35_CCM_CGR2, 18, get_rate_uart, NULL); |
400 | DEFINE_CLOCK(uart3_clk, 2, CCM_CGR2, 20, get_rate_uart, NULL); | 384 | DEFINE_CLOCK(uart3_clk, 2, MX35_CCM_CGR2, 20, get_rate_uart, NULL); |
401 | DEFINE_CLOCK(usbotg_clk, 0, CCM_CGR2, 22, get_rate_otg, NULL); | 385 | DEFINE_CLOCK(usbotg_clk, 0, MX35_CCM_CGR2, 22, get_rate_otg, NULL); |
402 | DEFINE_CLOCK(wdog_clk, 0, CCM_CGR2, 24, NULL, NULL); | 386 | DEFINE_CLOCK(wdog_clk, 0, MX35_CCM_CGR2, 24, NULL, NULL); |
403 | DEFINE_CLOCK(max_clk, 0, CCM_CGR2, 26, NULL, NULL); | 387 | DEFINE_CLOCK(max_clk, 0, MX35_CCM_CGR2, 26, NULL, NULL); |
404 | DEFINE_CLOCK(audmux_clk, 0, CCM_CGR2, 30, NULL, NULL); | 388 | DEFINE_CLOCK(audmux_clk, 0, MX35_CCM_CGR2, 30, NULL, NULL); |
405 | 389 | ||
406 | DEFINE_CLOCK(csi_clk, 0, CCM_CGR3, 0, get_rate_csi, NULL); | 390 | DEFINE_CLOCK(csi_clk, 0, MX35_CCM_CGR3, 0, get_rate_csi, NULL); |
407 | DEFINE_CLOCK(iim_clk, 0, CCM_CGR3, 2, NULL, NULL); | 391 | DEFINE_CLOCK(iim_clk, 0, MX35_CCM_CGR3, 2, NULL, NULL); |
408 | DEFINE_CLOCK(gpu2d_clk, 0, CCM_CGR3, 4, NULL, NULL); | 392 | DEFINE_CLOCK(gpu2d_clk, 0, MX35_CCM_CGR3, 4, NULL, NULL); |
409 | 393 | ||
410 | DEFINE_CLOCK(usbahb_clk, 0, 0, 0, get_rate_ahb, NULL); | 394 | DEFINE_CLOCK(usbahb_clk, 0, 0, 0, get_rate_ahb, NULL); |
411 | 395 | ||
@@ -422,7 +406,7 @@ static unsigned long get_rate_nfc(struct clk *clk) | |||
422 | { | 406 | { |
423 | unsigned long div1; | 407 | unsigned long div1; |
424 | 408 | ||
425 | div1 = (__raw_readl(CCM_BASE + CCM_PDR4) >> 28) + 1; | 409 | div1 = (__raw_readl(MX35_CCM_PDR4) >> 28) + 1; |
426 | 410 | ||
427 | return get_rate_ahb(NULL) / div1; | 411 | return get_rate_ahb(NULL) / div1; |
428 | } | 412 | } |
@@ -518,11 +502,11 @@ int __init mx35_clocks_init() | |||
518 | /* Turn off all clocks except the ones we need to survive, namely: | 502 | /* Turn off all clocks except the ones we need to survive, namely: |
519 | * EMI, GPIO1/2/3, GPT, IOMUX, MAX and eventually uart | 503 | * EMI, GPIO1/2/3, GPT, IOMUX, MAX and eventually uart |
520 | */ | 504 | */ |
521 | __raw_writel((3 << 18), CCM_BASE + CCM_CGR0); | 505 | __raw_writel((3 << 18), MX35_CCM_CGR0); |
522 | __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16), | 506 | __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16), |
523 | CCM_BASE + CCM_CGR1); | 507 | MX35_CCM_CGR1); |
524 | __raw_writel(cgr2, CCM_BASE + CCM_CGR2); | 508 | __raw_writel(cgr2, MX35_CCM_CGR2); |
525 | __raw_writel(0, CCM_BASE + CCM_CGR3); | 509 | __raw_writel(0, MX35_CCM_CGR3); |
526 | 510 | ||
527 | clk_enable(&iim_clk); | 511 | clk_enable(&iim_clk); |
528 | imx_print_silicon_rev("i.MX35", mx35_revision()); | 512 | imx_print_silicon_rev("i.MX35", mx35_revision()); |
@@ -533,7 +517,7 @@ int __init mx35_clocks_init() | |||
533 | * extra clocks turned on, otherwise the MX35 boot ROM code will | 517 | * extra clocks turned on, otherwise the MX35 boot ROM code will |
534 | * hang after a watchdog reset. | 518 | * hang after a watchdog reset. |
535 | */ | 519 | */ |
536 | if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) { | 520 | if (!(__raw_readl(MX35_CCM_RCSR) & (3 << 10))) { |
537 | /* Additionally turn on UART1, SCC, and IIM clocks */ | 521 | /* Additionally turn on UART1, SCC, and IIM clocks */ |
538 | clk_enable(&iim_clk); | 522 | clk_enable(&iim_clk); |
539 | clk_enable(&uart1_clk); | 523 | clk_enable(&uart1_clk); |
diff --git a/arch/arm/mach-imx/crmregs-imx31.h b/arch/arm/mach-imx/crmregs-imx3.h index 37a8a07beda3..d7691e2362c1 100644 --- a/arch/arm/mach-imx/crmregs-imx31.h +++ b/arch/arm/mach-imx/crmregs-imx3.h | |||
@@ -24,23 +24,36 @@ | |||
24 | #define CKIH_CLK_FREQ_27MHZ 27000000 | 24 | #define CKIH_CLK_FREQ_27MHZ 27000000 |
25 | #define CKIL_CLK_FREQ 32768 | 25 | #define CKIL_CLK_FREQ 32768 |
26 | 26 | ||
27 | #define MXC_CCM_BASE MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR) | 27 | #define MXC_CCM_BASE (cpu_is_mx31() ? \ |
28 | MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR) : MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR)) | ||
28 | 29 | ||
29 | /* Register addresses */ | 30 | /* Register addresses */ |
30 | #define MXC_CCM_CCMR (MXC_CCM_BASE + 0x00) | 31 | #define MXC_CCM_CCMR (MXC_CCM_BASE + 0x00) |
31 | #define MXC_CCM_PDR0 (MXC_CCM_BASE + 0x04) | 32 | #define MXC_CCM_PDR0 (MXC_CCM_BASE + 0x04) |
32 | #define MXC_CCM_PDR1 (MXC_CCM_BASE + 0x08) | 33 | #define MXC_CCM_PDR1 (MXC_CCM_BASE + 0x08) |
34 | #define MX35_CCM_PDR2 (MXC_CCM_BASE + 0x0C) | ||
33 | #define MXC_CCM_RCSR (MXC_CCM_BASE + 0x0C) | 35 | #define MXC_CCM_RCSR (MXC_CCM_BASE + 0x0C) |
36 | #define MX35_CCM_PDR3 (MXC_CCM_BASE + 0x10) | ||
34 | #define MXC_CCM_MPCTL (MXC_CCM_BASE + 0x10) | 37 | #define MXC_CCM_MPCTL (MXC_CCM_BASE + 0x10) |
38 | #define MX35_CCM_PDR4 (MXC_CCM_BASE + 0x14) | ||
35 | #define MXC_CCM_UPCTL (MXC_CCM_BASE + 0x14) | 39 | #define MXC_CCM_UPCTL (MXC_CCM_BASE + 0x14) |
40 | #define MX35_CCM_RCSR (MXC_CCM_BASE + 0x18) | ||
36 | #define MXC_CCM_SRPCTL (MXC_CCM_BASE + 0x18) | 41 | #define MXC_CCM_SRPCTL (MXC_CCM_BASE + 0x18) |
42 | #define MX35_CCM_MPCTL (MXC_CCM_BASE + 0x1C) | ||
37 | #define MXC_CCM_COSR (MXC_CCM_BASE + 0x1C) | 43 | #define MXC_CCM_COSR (MXC_CCM_BASE + 0x1C) |
44 | #define MX35_CCM_PPCTL (MXC_CCM_BASE + 0x20) | ||
38 | #define MXC_CCM_CGR0 (MXC_CCM_BASE + 0x20) | 45 | #define MXC_CCM_CGR0 (MXC_CCM_BASE + 0x20) |
46 | #define MX35_CCM_ACMR (MXC_CCM_BASE + 0x24) | ||
39 | #define MXC_CCM_CGR1 (MXC_CCM_BASE + 0x24) | 47 | #define MXC_CCM_CGR1 (MXC_CCM_BASE + 0x24) |
48 | #define MX35_CCM_COSR (MXC_CCM_BASE + 0x28) | ||
40 | #define MXC_CCM_CGR2 (MXC_CCM_BASE + 0x28) | 49 | #define MXC_CCM_CGR2 (MXC_CCM_BASE + 0x28) |
50 | #define MX35_CCM_CGR0 (MXC_CCM_BASE + 0x2C) | ||
41 | #define MXC_CCM_WIMR (MXC_CCM_BASE + 0x2C) | 51 | #define MXC_CCM_WIMR (MXC_CCM_BASE + 0x2C) |
52 | #define MX35_CCM_CGR1 (MXC_CCM_BASE + 0x30) | ||
42 | #define MXC_CCM_LDC (MXC_CCM_BASE + 0x30) | 53 | #define MXC_CCM_LDC (MXC_CCM_BASE + 0x30) |
54 | #define MX35_CCM_CGR2 (MXC_CCM_BASE + 0x34) | ||
43 | #define MXC_CCM_DCVR0 (MXC_CCM_BASE + 0x34) | 55 | #define MXC_CCM_DCVR0 (MXC_CCM_BASE + 0x34) |
56 | #define MX35_CCM_CGR3 (MXC_CCM_BASE + 0x38) | ||
44 | #define MXC_CCM_DCVR1 (MXC_CCM_BASE + 0x38) | 57 | #define MXC_CCM_DCVR1 (MXC_CCM_BASE + 0x38) |
45 | #define MXC_CCM_DCVR2 (MXC_CCM_BASE + 0x3C) | 58 | #define MXC_CCM_DCVR2 (MXC_CCM_BASE + 0x3C) |
46 | #define MXC_CCM_DCVR3 (MXC_CCM_BASE + 0x40) | 59 | #define MXC_CCM_DCVR3 (MXC_CCM_BASE + 0x40) |
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c index e4f426a09899..27bc27e6ea41 100644 --- a/arch/arm/mach-imx/mach-armadillo5x0.c +++ b/arch/arm/mach-imx/mach-armadillo5x0.c | |||
@@ -51,7 +51,7 @@ | |||
51 | #include <mach/ulpi.h> | 51 | #include <mach/ulpi.h> |
52 | 52 | ||
53 | #include "devices-imx31.h" | 53 | #include "devices-imx31.h" |
54 | #include "crmregs-imx31.h" | 54 | #include "crmregs-imx3.h" |
55 | 55 | ||
56 | static int armadillo5x0_pins[] = { | 56 | static int armadillo5x0_pins[] = { |
57 | /* UART1 */ | 57 | /* UART1 */ |
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index 31807d2a8b7b..8404ee72555a 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c | |||
@@ -34,31 +34,29 @@ static void imx3_idle(void) | |||
34 | { | 34 | { |
35 | unsigned long reg = 0; | 35 | unsigned long reg = 0; |
36 | 36 | ||
37 | if (!need_resched()) | 37 | __asm__ __volatile__( |
38 | __asm__ __volatile__( | 38 | /* disable I and D cache */ |
39 | /* disable I and D cache */ | 39 | "mrc p15, 0, %0, c1, c0, 0\n" |
40 | "mrc p15, 0, %0, c1, c0, 0\n" | 40 | "bic %0, %0, #0x00001000\n" |
41 | "bic %0, %0, #0x00001000\n" | 41 | "bic %0, %0, #0x00000004\n" |
42 | "bic %0, %0, #0x00000004\n" | 42 | "mcr p15, 0, %0, c1, c0, 0\n" |
43 | "mcr p15, 0, %0, c1, c0, 0\n" | 43 | /* invalidate I cache */ |
44 | /* invalidate I cache */ | 44 | "mov %0, #0\n" |
45 | "mov %0, #0\n" | 45 | "mcr p15, 0, %0, c7, c5, 0\n" |
46 | "mcr p15, 0, %0, c7, c5, 0\n" | 46 | /* clear and invalidate D cache */ |
47 | /* clear and invalidate D cache */ | 47 | "mov %0, #0\n" |
48 | "mov %0, #0\n" | 48 | "mcr p15, 0, %0, c7, c14, 0\n" |
49 | "mcr p15, 0, %0, c7, c14, 0\n" | 49 | /* WFI */ |
50 | /* WFI */ | 50 | "mov %0, #0\n" |
51 | "mov %0, #0\n" | 51 | "mcr p15, 0, %0, c7, c0, 4\n" |
52 | "mcr p15, 0, %0, c7, c0, 4\n" | 52 | "nop\n" "nop\n" "nop\n" "nop\n" |
53 | "nop\n" "nop\n" "nop\n" "nop\n" | 53 | "nop\n" "nop\n" "nop\n" |
54 | "nop\n" "nop\n" "nop\n" | 54 | /* enable I and D cache */ |
55 | /* enable I and D cache */ | 55 | "mrc p15, 0, %0, c1, c0, 0\n" |
56 | "mrc p15, 0, %0, c1, c0, 0\n" | 56 | "orr %0, %0, #0x00001000\n" |
57 | "orr %0, %0, #0x00001000\n" | 57 | "orr %0, %0, #0x00000004\n" |
58 | "orr %0, %0, #0x00000004\n" | 58 | "mcr p15, 0, %0, c1, c0, 0\n" |
59 | "mcr p15, 0, %0, c1, c0, 0\n" | 59 | : "=r" (reg)); |
60 | : "=r" (reg)); | ||
61 | local_irq_enable(); | ||
62 | } | 60 | } |
63 | 61 | ||
64 | static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, | 62 | static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, |
@@ -134,8 +132,8 @@ void __init imx31_init_early(void) | |||
134 | { | 132 | { |
135 | mxc_set_cpu_type(MXC_CPU_MX31); | 133 | mxc_set_cpu_type(MXC_CPU_MX31); |
136 | mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); | 134 | mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); |
137 | pm_idle = imx3_idle; | ||
138 | imx_ioremap = imx3_ioremap; | 135 | imx_ioremap = imx3_ioremap; |
136 | arm_pm_idle = imx3_idle; | ||
139 | } | 137 | } |
140 | 138 | ||
141 | void __init mx31_init_irq(void) | 139 | void __init mx31_init_irq(void) |
@@ -197,7 +195,7 @@ void __init imx35_init_early(void) | |||
197 | mxc_set_cpu_type(MXC_CPU_MX35); | 195 | mxc_set_cpu_type(MXC_CPU_MX35); |
198 | mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); | 196 | mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); |
199 | mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); | 197 | mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); |
200 | pm_idle = imx3_idle; | 198 | arm_pm_idle = imx3_idle; |
201 | imx_ioremap = imx3_ioremap; | 199 | imx_ioremap = imx3_ioremap; |
202 | } | 200 | } |
203 | 201 | ||
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c index bc17dfea3817..49549a72dc7d 100644 --- a/arch/arm/mach-imx/mm-imx5.c +++ b/arch/arm/mach-imx/mm-imx5.c | |||
@@ -26,23 +26,17 @@ static struct clk *gpc_dvfs_clk; | |||
26 | 26 | ||
27 | static void imx5_idle(void) | 27 | static void imx5_idle(void) |
28 | { | 28 | { |
29 | if (!need_resched()) { | 29 | /* gpc clock is needed for SRPG */ |
30 | /* gpc clock is needed for SRPG */ | 30 | if (gpc_dvfs_clk == NULL) { |
31 | if (gpc_dvfs_clk == NULL) { | 31 | gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); |
32 | gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); | 32 | if (IS_ERR(gpc_dvfs_clk)) |
33 | if (IS_ERR(gpc_dvfs_clk)) | 33 | return; |
34 | goto err0; | ||
35 | } | ||
36 | clk_enable(gpc_dvfs_clk); | ||
37 | mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); | ||
38 | if (tzic_enable_wake()) | ||
39 | goto err1; | ||
40 | cpu_do_idle(); | ||
41 | err1: | ||
42 | clk_disable(gpc_dvfs_clk); | ||
43 | } | 34 | } |
44 | err0: | 35 | clk_enable(gpc_dvfs_clk); |
45 | local_irq_enable(); | 36 | mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); |
37 | if (tzic_enable_wake() != 0) | ||
38 | cpu_do_idle(); | ||
39 | clk_disable(gpc_dvfs_clk); | ||
46 | } | 40 | } |
47 | 41 | ||
48 | /* | 42 | /* |
@@ -108,7 +102,7 @@ void __init imx51_init_early(void) | |||
108 | mxc_set_cpu_type(MXC_CPU_MX51); | 102 | mxc_set_cpu_type(MXC_CPU_MX51); |
109 | mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); | 103 | mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); |
110 | mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); | 104 | mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); |
111 | pm_idle = imx5_idle; | 105 | arm_pm_idle = imx5_idle; |
112 | } | 106 | } |
113 | 107 | ||
114 | void __init imx53_init_early(void) | 108 | void __init imx53_init_early(void) |
diff --git a/arch/arm/mach-imx/pm-imx27.c b/arch/arm/mach-imx/pm-imx27.c index e455d2f855bf..6fcffa7db978 100644 --- a/arch/arm/mach-imx/pm-imx27.c +++ b/arch/arm/mach-imx/pm-imx27.c | |||
@@ -10,7 +10,6 @@ | |||
10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
11 | #include <linux/suspend.h> | 11 | #include <linux/suspend.h> |
12 | #include <linux/io.h> | 12 | #include <linux/io.h> |
13 | #include <mach/system.h> | ||
14 | #include <mach/hardware.h> | 13 | #include <mach/hardware.h> |
15 | 14 | ||
16 | static int mx27_suspend_enter(suspend_state_t state) | 15 | static int mx27_suspend_enter(suspend_state_t state) |
@@ -23,7 +22,7 @@ static int mx27_suspend_enter(suspend_state_t state) | |||
23 | cscr &= 0xFFFFFFFC; | 22 | cscr &= 0xFFFFFFFC; |
24 | __raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR)); | 23 | __raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR)); |
25 | /* Executes WFI */ | 24 | /* Executes WFI */ |
26 | arch_idle(); | 25 | cpu_do_idle(); |
27 | break; | 26 | break; |
28 | 27 | ||
29 | default: | 28 | default: |
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c index 019f0ab08f66..15b87f26ac96 100644 --- a/arch/arm/mach-integrator/core.c +++ b/arch/arm/mach-integrator/core.c | |||
@@ -35,67 +35,23 @@ | |||
35 | 35 | ||
36 | static struct amba_pl010_data integrator_uart_data; | 36 | static struct amba_pl010_data integrator_uart_data; |
37 | 37 | ||
38 | static struct amba_device rtc_device = { | 38 | #define INTEGRATOR_RTC_IRQ { IRQ_RTCINT } |
39 | .dev = { | 39 | #define INTEGRATOR_UART0_IRQ { IRQ_UARTINT0 } |
40 | .init_name = "mb:15", | 40 | #define INTEGRATOR_UART1_IRQ { IRQ_UARTINT1 } |
41 | }, | 41 | #define KMI0_IRQ { IRQ_KMIINT0 } |
42 | .res = { | 42 | #define KMI1_IRQ { IRQ_KMIINT1 } |
43 | .start = INTEGRATOR_RTC_BASE, | ||
44 | .end = INTEGRATOR_RTC_BASE + SZ_4K - 1, | ||
45 | .flags = IORESOURCE_MEM, | ||
46 | }, | ||
47 | .irq = { IRQ_RTCINT, NO_IRQ }, | ||
48 | }; | ||
49 | 43 | ||
50 | static struct amba_device uart0_device = { | 44 | static AMBA_APB_DEVICE(rtc, "mb:15", 0, |
51 | .dev = { | 45 | INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL); |
52 | .init_name = "mb:16", | ||
53 | .platform_data = &integrator_uart_data, | ||
54 | }, | ||
55 | .res = { | ||
56 | .start = INTEGRATOR_UART0_BASE, | ||
57 | .end = INTEGRATOR_UART0_BASE + SZ_4K - 1, | ||
58 | .flags = IORESOURCE_MEM, | ||
59 | }, | ||
60 | .irq = { IRQ_UARTINT0, NO_IRQ }, | ||
61 | }; | ||
62 | 46 | ||
63 | static struct amba_device uart1_device = { | 47 | static AMBA_APB_DEVICE(uart0, "mb:16", 0, |
64 | .dev = { | 48 | INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, &integrator_uart_data); |
65 | .init_name = "mb:17", | ||
66 | .platform_data = &integrator_uart_data, | ||
67 | }, | ||
68 | .res = { | ||
69 | .start = INTEGRATOR_UART1_BASE, | ||
70 | .end = INTEGRATOR_UART1_BASE + SZ_4K - 1, | ||
71 | .flags = IORESOURCE_MEM, | ||
72 | }, | ||
73 | .irq = { IRQ_UARTINT1, NO_IRQ }, | ||
74 | }; | ||
75 | 49 | ||
76 | static struct amba_device kmi0_device = { | 50 | static AMBA_APB_DEVICE(uart1, "mb:17", 0, |
77 | .dev = { | 51 | INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, &integrator_uart_data); |
78 | .init_name = "mb:18", | ||
79 | }, | ||
80 | .res = { | ||
81 | .start = KMI0_BASE, | ||
82 | .end = KMI0_BASE + SZ_4K - 1, | ||
83 | .flags = IORESOURCE_MEM, | ||
84 | }, | ||
85 | .irq = { IRQ_KMIINT0, NO_IRQ }, | ||
86 | }; | ||
87 | 52 | ||
88 | static struct amba_device kmi1_device = { | 53 | static AMBA_APB_DEVICE(kmi0, "mb:18", 0, KMI0_BASE, KMI0_IRQ, NULL); |
89 | .dev = { | 54 | static AMBA_APB_DEVICE(kmi1, "mb:19", 0, KMI1_BASE, KMI1_IRQ, NULL); |
90 | .init_name = "mb:19", | ||
91 | }, | ||
92 | .res = { | ||
93 | .start = KMI1_BASE, | ||
94 | .end = KMI1_BASE + SZ_4K - 1, | ||
95 | .flags = IORESOURCE_MEM, | ||
96 | }, | ||
97 | .irq = { IRQ_KMIINT1, NO_IRQ }, | ||
98 | }; | ||
99 | 55 | ||
100 | static struct amba_device *amba_devs[] __initdata = { | 56 | static struct amba_device *amba_devs[] __initdata = { |
101 | &rtc_device, | 57 | &rtc_device, |
diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c index 8cbb75a96bd4..3e538da6cb1f 100644 --- a/arch/arm/mach-integrator/impd1.c +++ b/arch/arm/mach-integrator/impd1.c | |||
@@ -401,24 +401,21 @@ static int impd1_probe(struct lm_device *dev) | |||
401 | 401 | ||
402 | pc_base = dev->resource.start + idev->offset; | 402 | pc_base = dev->resource.start + idev->offset; |
403 | 403 | ||
404 | d = kzalloc(sizeof(struct amba_device), GFP_KERNEL); | 404 | d = amba_device_alloc(NULL, pc_base, SZ_4K); |
405 | if (!d) | 405 | if (!d) |
406 | continue; | 406 | continue; |
407 | 407 | ||
408 | dev_set_name(&d->dev, "lm%x:%5.5lx", dev->id, idev->offset >> 12); | 408 | dev_set_name(&d->dev, "lm%x:%5.5lx", dev->id, idev->offset >> 12); |
409 | d->dev.parent = &dev->dev; | 409 | d->dev.parent = &dev->dev; |
410 | d->res.start = dev->resource.start + idev->offset; | ||
411 | d->res.end = d->res.start + SZ_4K - 1; | ||
412 | d->res.flags = IORESOURCE_MEM; | ||
413 | d->irq[0] = dev->irq; | 410 | d->irq[0] = dev->irq; |
414 | d->irq[1] = dev->irq; | 411 | d->irq[1] = dev->irq; |
415 | d->periphid = idev->id; | 412 | d->periphid = idev->id; |
416 | d->dev.platform_data = idev->platform_data; | 413 | d->dev.platform_data = idev->platform_data; |
417 | 414 | ||
418 | ret = amba_device_register(d, &dev->resource); | 415 | ret = amba_device_add(d, &dev->resource); |
419 | if (ret) { | 416 | if (ret) { |
420 | dev_err(&d->dev, "unable to register device: %d\n", ret); | 417 | dev_err(&d->dev, "unable to register device: %d\n", ret); |
421 | kfree(d); | 418 | amba_device_put(d); |
422 | } | 419 | } |
423 | } | 420 | } |
424 | 421 | ||
diff --git a/arch/arm/mach-integrator/include/mach/entry-macro.S b/arch/arm/mach-integrator/include/mach/entry-macro.S index 3d029c9f3ef6..5cc7b85ad9df 100644 --- a/arch/arm/mach-integrator/include/mach/entry-macro.S +++ b/arch/arm/mach-integrator/include/mach/entry-macro.S | |||
@@ -11,15 +11,9 @@ | |||
11 | #include <mach/platform.h> | 11 | #include <mach/platform.h> |
12 | #include <mach/irqs.h> | 12 | #include <mach/irqs.h> |
13 | 13 | ||
14 | .macro disable_fiq | ||
15 | .endm | ||
16 | |||
17 | .macro get_irqnr_preamble, base, tmp | 14 | .macro get_irqnr_preamble, base, tmp |
18 | .endm | 15 | .endm |
19 | 16 | ||
20 | .macro arch_ret_to_user, tmp1, tmp2 | ||
21 | .endm | ||
22 | |||
23 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 17 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
24 | /* FIXME: should not be using soo many LDRs here */ | 18 | /* FIXME: should not be using soo many LDRs here */ |
25 | ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE) | 19 | ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE) |
diff --git a/arch/arm/mach-integrator/include/mach/system.h b/arch/arm/mach-integrator/include/mach/system.h deleted file mode 100644 index 901514eba4a6..000000000000 --- a/arch/arm/mach-integrator/include/mach/system.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-integrator/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 1999 ARM Limited | ||
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #ifndef __ASM_ARCH_SYSTEM_H | ||
22 | #define __ASM_ARCH_SYSTEM_H | ||
23 | |||
24 | static inline void arch_idle(void) | ||
25 | { | ||
26 | /* | ||
27 | * This should do all the clock switching | ||
28 | * and wait for interrupt tricks | ||
29 | */ | ||
30 | cpu_do_idle(); | ||
31 | } | ||
32 | |||
33 | #endif | ||
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index a8b6aa6003f3..be9ead4a3bcc 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c | |||
@@ -347,32 +347,14 @@ static struct mmci_platform_data mmc_data = { | |||
347 | .gpio_cd = -1, | 347 | .gpio_cd = -1, |
348 | }; | 348 | }; |
349 | 349 | ||
350 | static struct amba_device mmc_device = { | 350 | #define INTEGRATOR_CP_MMC_IRQS { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 } |
351 | .dev = { | 351 | #define INTEGRATOR_CP_AACI_IRQS { IRQ_CP_AACIINT } |
352 | .init_name = "mb:1c", | ||
353 | .platform_data = &mmc_data, | ||
354 | }, | ||
355 | .res = { | ||
356 | .start = INTEGRATOR_CP_MMC_BASE, | ||
357 | .end = INTEGRATOR_CP_MMC_BASE + SZ_4K - 1, | ||
358 | .flags = IORESOURCE_MEM, | ||
359 | }, | ||
360 | .irq = { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }, | ||
361 | .periphid = 0, | ||
362 | }; | ||
363 | 352 | ||
364 | static struct amba_device aaci_device = { | 353 | static AMBA_APB_DEVICE(mmc, "mb:1c", 0, INTEGRATOR_CP_MMC_BASE, |
365 | .dev = { | 354 | INTEGRATOR_CP_MMC_IRQS, &mmc_data); |
366 | .init_name = "mb:1d", | 355 | |
367 | }, | 356 | static AMBA_APB_DEVICE(aaci, "mb:1d", 0, INTEGRATOR_CP_AACI_BASE, |
368 | .res = { | 357 | INTEGRATOR_CP_AACI_IRQS, NULL); |
369 | .start = INTEGRATOR_CP_AACI_BASE, | ||
370 | .end = INTEGRATOR_CP_AACI_BASE + SZ_4K - 1, | ||
371 | .flags = IORESOURCE_MEM, | ||
372 | }, | ||
373 | .irq = { IRQ_CP_AACIINT, NO_IRQ }, | ||
374 | .periphid = 0, | ||
375 | }; | ||
376 | 358 | ||
377 | 359 | ||
378 | /* | 360 | /* |
@@ -425,21 +407,8 @@ static struct clcd_board clcd_data = { | |||
425 | .remove = versatile_clcd_remove_dma, | 407 | .remove = versatile_clcd_remove_dma, |
426 | }; | 408 | }; |
427 | 409 | ||
428 | static struct amba_device clcd_device = { | 410 | static AMBA_AHB_DEVICE(clcd, "mb:c0", 0, INTCP_PA_CLCD_BASE, |
429 | .dev = { | 411 | { IRQ_CP_CLCDCINT }, &clcd_data); |
430 | .init_name = "mb:c0", | ||
431 | .coherent_dma_mask = ~0, | ||
432 | .platform_data = &clcd_data, | ||
433 | }, | ||
434 | .res = { | ||
435 | .start = INTCP_PA_CLCD_BASE, | ||
436 | .end = INTCP_PA_CLCD_BASE + SZ_4K - 1, | ||
437 | .flags = IORESOURCE_MEM, | ||
438 | }, | ||
439 | .dma_mask = ~0, | ||
440 | .irq = { IRQ_CP_CLCDCINT, NO_IRQ }, | ||
441 | .periphid = 0, | ||
442 | }; | ||
443 | 412 | ||
444 | static struct amba_device *amba_devs[] __initdata = { | 413 | static struct amba_device *amba_devs[] __initdata = { |
445 | &mmc_device, | 414 | &mmc_device, |
diff --git a/arch/arm/mach-iop13xx/include/mach/entry-macro.S b/arch/arm/mach-iop13xx/include/mach/entry-macro.S index a624a7870c64..1a2d603488d8 100644 --- a/arch/arm/mach-iop13xx/include/mach/entry-macro.S +++ b/arch/arm/mach-iop13xx/include/mach/entry-macro.S | |||
@@ -16,9 +16,6 @@ | |||
16 | * Place - Suite 330, Boston, MA 02111-1307 USA. | 16 | * Place - Suite 330, Boston, MA 02111-1307 USA. |
17 | * | 17 | * |
18 | */ | 18 | */ |
19 | .macro disable_fiq | ||
20 | .endm | ||
21 | |||
22 | .macro get_irqnr_preamble, base, tmp | 19 | .macro get_irqnr_preamble, base, tmp |
23 | mrc p15, 0, \tmp, c15, c1, 0 | 20 | mrc p15, 0, \tmp, c15, c1, 0 |
24 | orr \tmp, \tmp, #(1 << 6) | 21 | orr \tmp, \tmp, #(1 << 6) |
diff --git a/arch/arm/mach-iop13xx/include/mach/system.h b/arch/arm/mach-iop13xx/include/mach/system.h deleted file mode 100644 index 1f31ed3f8ae2..000000000000 --- a/arch/arm/mach-iop13xx/include/mach/system.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-iop13xx/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2004 Intel Corp. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
diff --git a/arch/arm/mach-iop32x/include/mach/entry-macro.S b/arch/arm/mach-iop32x/include/mach/entry-macro.S index b02fb56bafcc..ea13ae02d9b1 100644 --- a/arch/arm/mach-iop32x/include/mach/entry-macro.S +++ b/arch/arm/mach-iop32x/include/mach/entry-macro.S | |||
@@ -9,9 +9,6 @@ | |||
9 | */ | 9 | */ |
10 | #include <mach/iop32x.h> | 10 | #include <mach/iop32x.h> |
11 | 11 | ||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro get_irqnr_preamble, base, tmp | 12 | .macro get_irqnr_preamble, base, tmp |
16 | mrc p15, 0, \tmp, c15, c1, 0 | 13 | mrc p15, 0, \tmp, c15, c1, 0 |
17 | orr \tmp, \tmp, #(1 << 6) | 14 | orr \tmp, \tmp, #(1 << 6) |
diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h deleted file mode 100644 index 4a88727bca98..000000000000 --- a/arch/arm/mach-iop32x/include/mach/system.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-iop32x/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2001 MontaVista Software, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
diff --git a/arch/arm/mach-iop33x/include/mach/entry-macro.S b/arch/arm/mach-iop33x/include/mach/entry-macro.S index 4e1f7282b354..0a398fe1fba4 100644 --- a/arch/arm/mach-iop33x/include/mach/entry-macro.S +++ b/arch/arm/mach-iop33x/include/mach/entry-macro.S | |||
@@ -9,9 +9,6 @@ | |||
9 | */ | 9 | */ |
10 | #include <mach/iop33x.h> | 10 | #include <mach/iop33x.h> |
11 | 11 | ||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro get_irqnr_preamble, base, tmp | 12 | .macro get_irqnr_preamble, base, tmp |
16 | mrc p15, 0, \tmp, c15, c1, 0 | 13 | mrc p15, 0, \tmp, c15, c1, 0 |
17 | orr \tmp, \tmp, #(1 << 6) | 14 | orr \tmp, \tmp, #(1 << 6) |
diff --git a/arch/arm/mach-iop33x/include/mach/system.h b/arch/arm/mach-iop33x/include/mach/system.h deleted file mode 100644 index 4f98e765397c..000000000000 --- a/arch/arm/mach-iop33x/include/mach/system.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-iop33x/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2001 MontaVista Software, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
diff --git a/arch/arm/mach-ixp2000/include/mach/entry-macro.S b/arch/arm/mach-ixp2000/include/mach/entry-macro.S index 5850ffc8c751..c4444dff9202 100644 --- a/arch/arm/mach-ixp2000/include/mach/entry-macro.S +++ b/arch/arm/mach-ixp2000/include/mach/entry-macro.S | |||
@@ -9,15 +9,9 @@ | |||
9 | */ | 9 | */ |
10 | #include <mach/irqs.h> | 10 | #include <mach/irqs.h> |
11 | 11 | ||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro get_irqnr_preamble, base, tmp | 12 | .macro get_irqnr_preamble, base, tmp |
16 | .endm | 13 | .endm |
17 | 14 | ||
18 | .macro arch_ret_to_user, tmp1, tmp2 | ||
19 | .endm | ||
20 | |||
21 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 15 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
22 | 16 | ||
23 | mov \irqnr, #0x0 @clear out irqnr as default | 17 | mov \irqnr, #0x0 @clear out irqnr as default |
diff --git a/arch/arm/mach-ixp2000/include/mach/system.h b/arch/arm/mach-ixp2000/include/mach/system.h deleted file mode 100644 index a7fb08b2b8e7..000000000000 --- a/arch/arm/mach-ixp2000/include/mach/system.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ixp2000/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2002 Intel Corp. | ||
5 | * Copyricht (C) 2003-2005 MontaVista Software, Inc. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | static inline void arch_idle(void) | ||
12 | { | ||
13 | cpu_do_idle(); | ||
14 | } | ||
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c index 0923bb905cc0..7c1495e4fe7a 100644 --- a/arch/arm/mach-ixp23xx/core.c +++ b/arch/arm/mach-ixp23xx/core.c | |||
@@ -441,6 +441,9 @@ static struct platform_device *ixp23xx_devices[] __initdata = { | |||
441 | 441 | ||
442 | void __init ixp23xx_sys_init(void) | 442 | void __init ixp23xx_sys_init(void) |
443 | { | 443 | { |
444 | /* by default, the idle code is disabled */ | ||
445 | disable_hlt(); | ||
446 | |||
444 | *IXP23XX_EXP_UNIT_FUSE |= 0xf; | 447 | *IXP23XX_EXP_UNIT_FUSE |= 0xf; |
445 | platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); | 448 | platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); |
446 | } | 449 | } |
diff --git a/arch/arm/mach-ixp23xx/include/mach/entry-macro.S b/arch/arm/mach-ixp23xx/include/mach/entry-macro.S index 3f5338a7bbdd..3fd2cb984e42 100644 --- a/arch/arm/mach-ixp23xx/include/mach/entry-macro.S +++ b/arch/arm/mach-ixp23xx/include/mach/entry-macro.S | |||
@@ -2,15 +2,9 @@ | |||
2 | * arch/arm/mach-ixp23xx/include/mach/entry-macro.S | 2 | * arch/arm/mach-ixp23xx/include/mach/entry-macro.S |
3 | */ | 3 | */ |
4 | 4 | ||
5 | .macro disable_fiq | ||
6 | .endm | ||
7 | |||
8 | .macro get_irqnr_preamble, base, tmp | 5 | .macro get_irqnr_preamble, base, tmp |
9 | .endm | 6 | .endm |
10 | 7 | ||
11 | .macro arch_ret_to_user, tmp1, tmp2 | ||
12 | .endm | ||
13 | |||
14 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 8 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
15 | ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET) | 9 | ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET) |
16 | ldr \irqnr, [\irqnr] @ get interrupt number | 10 | ldr \irqnr, [\irqnr] @ get interrupt number |
diff --git a/arch/arm/mach-ixp23xx/include/mach/system.h b/arch/arm/mach-ixp23xx/include/mach/system.h deleted file mode 100644 index 277dda7334b9..000000000000 --- a/arch/arm/mach-ixp23xx/include/mach/system.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ixp23xx/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2003 Intel Corporation. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | #if 0 | ||
13 | if (!hlt_counter) | ||
14 | cpu_do_idle(); | ||
15 | #endif | ||
16 | } | ||
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 3841ab4146ba..a6329a0a8ec4 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c | |||
@@ -236,6 +236,12 @@ void __init ixp4xx_init_irq(void) | |||
236 | { | 236 | { |
237 | int i = 0; | 237 | int i = 0; |
238 | 238 | ||
239 | /* | ||
240 | * ixp4xx does not implement the XScale PWRMODE register | ||
241 | * so it must not call cpu_do_idle(). | ||
242 | */ | ||
243 | disable_hlt(); | ||
244 | |||
239 | /* Route all sources to IRQ instead of FIQ */ | 245 | /* Route all sources to IRQ instead of FIQ */ |
240 | *IXP4XX_ICLR = 0x0; | 246 | *IXP4XX_ICLR = 0x0; |
241 | 247 | ||
diff --git a/arch/arm/mach-ixp4xx/include/mach/entry-macro.S b/arch/arm/mach-ixp4xx/include/mach/entry-macro.S index f2e14e94ed15..79adf83e2c3d 100644 --- a/arch/arm/mach-ixp4xx/include/mach/entry-macro.S +++ b/arch/arm/mach-ixp4xx/include/mach/entry-macro.S | |||
@@ -9,15 +9,9 @@ | |||
9 | */ | 9 | */ |
10 | #include <mach/hardware.h> | 10 | #include <mach/hardware.h> |
11 | 11 | ||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro get_irqnr_preamble, base, tmp | 12 | .macro get_irqnr_preamble, base, tmp |
16 | .endm | 13 | .endm |
17 | 14 | ||
18 | .macro arch_ret_to_user, tmp1, tmp2 | ||
19 | .endm | ||
20 | |||
21 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 15 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
22 | ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET) | 16 | ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET) |
23 | ldr \irqstat, [\irqstat] @ get interrupts | 17 | ldr \irqstat, [\irqstat] @ get interrupts |
diff --git a/arch/arm/mach-ixp4xx/include/mach/system.h b/arch/arm/mach-ixp4xx/include/mach/system.h deleted file mode 100644 index 140a9bef4466..000000000000 --- a/arch/arm/mach-ixp4xx/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ixp4xx/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2002 Intel Corporation. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | */ | ||
11 | static inline void arch_idle(void) | ||
12 | { | ||
13 | /* ixp4xx does not implement the XScale PWRMODE register, | ||
14 | * so it must not call cpu_do_idle() here. | ||
15 | */ | ||
16 | #if 0 | ||
17 | cpu_do_idle(); | ||
18 | #endif | ||
19 | } | ||
diff --git a/arch/arm/mach-kirkwood/include/mach/entry-macro.S b/arch/arm/mach-kirkwood/include/mach/entry-macro.S index 8939d36f893c..82db29f7af8f 100644 --- a/arch/arm/mach-kirkwood/include/mach/entry-macro.S +++ b/arch/arm/mach-kirkwood/include/mach/entry-macro.S | |||
@@ -10,12 +10,6 @@ | |||
10 | 10 | ||
11 | #include <mach/bridge-regs.h> | 11 | #include <mach/bridge-regs.h> |
12 | 12 | ||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
18 | |||
19 | .macro get_irqnr_preamble, base, tmp | 13 | .macro get_irqnr_preamble, base, tmp |
20 | ldr \base, =IRQ_VIRT_BASE | 14 | ldr \base, =IRQ_VIRT_BASE |
21 | .endm | 15 | .endm |
diff --git a/arch/arm/mach-kirkwood/include/mach/system.h b/arch/arm/mach-kirkwood/include/mach/system.h deleted file mode 100644 index 5fddde002b5e..000000000000 --- a/arch/arm/mach-kirkwood/include/mach/system.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/include/mach/system.h | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_ARCH_SYSTEM_H | ||
10 | #define __ASM_ARCH_SYSTEM_H | ||
11 | |||
12 | static inline void arch_idle(void) | ||
13 | { | ||
14 | cpu_do_idle(); | ||
15 | } | ||
16 | |||
17 | #endif | ||
diff --git a/arch/arm/mach-ks8695/include/mach/entry-macro.S b/arch/arm/mach-ks8695/include/mach/entry-macro.S index b4fe0c11c6ce..8315b34f32ff 100644 --- a/arch/arm/mach-ks8695/include/mach/entry-macro.S +++ b/arch/arm/mach-ks8695/include/mach/entry-macro.S | |||
@@ -14,16 +14,10 @@ | |||
14 | #include <mach/hardware.h> | 14 | #include <mach/hardware.h> |
15 | #include <mach/regs-irq.h> | 15 | #include <mach/regs-irq.h> |
16 | 16 | ||
17 | .macro disable_fiq | ||
18 | .endm | ||
19 | |||
20 | .macro get_irqnr_preamble, base, tmp | 17 | .macro get_irqnr_preamble, base, tmp |
21 | ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller | 18 | ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller |
22 | .endm | 19 | .endm |
23 | 20 | ||
24 | .macro arch_ret_to_user, tmp1, tmp2 | ||
25 | .endm | ||
26 | |||
27 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 21 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
28 | ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register | 22 | ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register |
29 | 23 | ||
diff --git a/arch/arm/mach-ks8695/include/mach/system.h b/arch/arm/mach-ks8695/include/mach/system.h deleted file mode 100644 index 59fe992395bf..000000000000 --- a/arch/arm/mach-ks8695/include/mach/system.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-s3c2410/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2006 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * | ||
7 | * KS8695 - System function defines and includes | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #ifndef __ASM_ARCH_SYSTEM_H | ||
15 | #define __ASM_ARCH_SYSTEM_H | ||
16 | |||
17 | static void arch_idle(void) | ||
18 | { | ||
19 | /* | ||
20 | * This should do all the clock switching | ||
21 | * and wait for interrupt tricks, | ||
22 | */ | ||
23 | cpu_do_idle(); | ||
24 | |||
25 | } | ||
26 | |||
27 | #endif | ||
diff --git a/arch/arm/mach-lpc32xx/include/mach/entry-macro.S b/arch/arm/mach-lpc32xx/include/mach/entry-macro.S index b725f6c93975..24ca11b377c8 100644 --- a/arch/arm/mach-lpc32xx/include/mach/entry-macro.S +++ b/arch/arm/mach-lpc32xx/include/mach/entry-macro.S | |||
@@ -21,16 +21,10 @@ | |||
21 | 21 | ||
22 | #define LPC32XX_INTC_MASKED_STATUS_OFS 0x8 | 22 | #define LPC32XX_INTC_MASKED_STATUS_OFS 0x8 |
23 | 23 | ||
24 | .macro disable_fiq | ||
25 | .endm | ||
26 | |||
27 | .macro get_irqnr_preamble, base, tmp | 24 | .macro get_irqnr_preamble, base, tmp |
28 | ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE) | 25 | ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE) |
29 | .endm | 26 | .endm |
30 | 27 | ||
31 | .macro arch_ret_to_user, tmp1, tmp2 | ||
32 | .endm | ||
33 | |||
34 | /* | 28 | /* |
35 | * Return IRQ number in irqnr. Also return processor Z flag status in CPSR | 29 | * Return IRQ number in irqnr. Also return processor Z flag status in CPSR |
36 | * as set if an interrupt is pending. | 30 | * as set if an interrupt is pending. |
diff --git a/arch/arm/mach-lpc32xx/include/mach/system.h b/arch/arm/mach-lpc32xx/include/mach/system.h deleted file mode 100644 index bf176c991520..000000000000 --- a/arch/arm/mach-lpc32xx/include/mach/system.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-lpc32xx/include/mach/system.h | ||
3 | * | ||
4 | * Author: Kevin Wells <kevin.wells@nxp.com> | ||
5 | * | ||
6 | * Copyright (C) 2010 NXP Semiconductors | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | */ | ||
18 | |||
19 | #ifndef __ASM_ARCH_SYSTEM_H | ||
20 | #define __ASM_ARCH_SYSTEM_H | ||
21 | |||
22 | static void arch_idle(void) | ||
23 | { | ||
24 | cpu_do_idle(); | ||
25 | } | ||
26 | |||
27 | #endif | ||
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index bfee5b455105..5d51c102c255 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c | |||
@@ -149,20 +149,8 @@ static struct clcd_board lpc32xx_clcd_data = { | |||
149 | .remove = lpc32xx_clcd_remove, | 149 | .remove = lpc32xx_clcd_remove, |
150 | }; | 150 | }; |
151 | 151 | ||
152 | static struct amba_device lpc32xx_clcd_device = { | 152 | static AMBA_AHB_DEVICE(lpc32xx_clcd, "dev:clcd", 0, |
153 | .dev = { | 153 | LPC32XX_LCD_BASE, { IRQ_LPC32XX_LCD }, &lpc32xx_clcd_data); |
154 | .coherent_dma_mask = ~0, | ||
155 | .init_name = "dev:clcd", | ||
156 | .platform_data = &lpc32xx_clcd_data, | ||
157 | }, | ||
158 | .res = { | ||
159 | .start = LPC32XX_LCD_BASE, | ||
160 | .end = (LPC32XX_LCD_BASE + SZ_4K - 1), | ||
161 | .flags = IORESOURCE_MEM, | ||
162 | }, | ||
163 | .dma_mask = ~0, | ||
164 | .irq = {IRQ_LPC32XX_LCD, NO_IRQ}, | ||
165 | }; | ||
166 | 154 | ||
167 | /* | 155 | /* |
168 | * AMBA SSP (SPI) | 156 | * AMBA SSP (SPI) |
@@ -191,20 +179,8 @@ static struct pl022_ssp_controller lpc32xx_ssp0_data = { | |||
191 | .enable_dma = 0, | 179 | .enable_dma = 0, |
192 | }; | 180 | }; |
193 | 181 | ||
194 | static struct amba_device lpc32xx_ssp0_device = { | 182 | static AMBA_APB_DEVICE(lpc32xx_ssp0, "dev:ssp0", 0, |
195 | .dev = { | 183 | LPC32XX_SSP0_BASE, { IRQ_LPC32XX_SSP0 }, &lpc32xx_ssp0_data); |
196 | .coherent_dma_mask = ~0, | ||
197 | .init_name = "dev:ssp0", | ||
198 | .platform_data = &lpc32xx_ssp0_data, | ||
199 | }, | ||
200 | .res = { | ||
201 | .start = LPC32XX_SSP0_BASE, | ||
202 | .end = (LPC32XX_SSP0_BASE + SZ_4K - 1), | ||
203 | .flags = IORESOURCE_MEM, | ||
204 | }, | ||
205 | .dma_mask = ~0, | ||
206 | .irq = {IRQ_LPC32XX_SSP0, NO_IRQ}, | ||
207 | }; | ||
208 | 184 | ||
209 | /* AT25 driver registration */ | 185 | /* AT25 driver registration */ |
210 | static int __init phy3250_spi_board_register(void) | 186 | static int __init phy3250_spi_board_register(void) |
diff --git a/arch/arm/mach-mmp/include/mach/entry-macro.S b/arch/arm/mach-mmp/include/mach/entry-macro.S index c42d9d4e892d..9cff9e7a2b26 100644 --- a/arch/arm/mach-mmp/include/mach/entry-macro.S +++ b/arch/arm/mach-mmp/include/mach/entry-macro.S | |||
@@ -8,12 +8,6 @@ | |||
8 | 8 | ||
9 | #include <mach/regs-icu.h> | 9 | #include <mach/regs-icu.h> |
10 | 10 | ||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro arch_ret_to_user, tmp1, tmp2 | ||
15 | .endm | ||
16 | |||
17 | .macro get_irqnr_preamble, base, tmp | 11 | .macro get_irqnr_preamble, base, tmp |
18 | mrc p15, 0, \tmp, c0, c0, 0 @ CPUID | 12 | mrc p15, 0, \tmp, c0, c0, 0 @ CPUID |
19 | and \tmp, \tmp, #0xff00 | 13 | and \tmp, \tmp, #0xff00 |
diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h deleted file mode 100644 index 1d001eab81e1..000000000000 --- a/arch/arm/mach-mmp/include/mach/system.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-mmp/include/mach/system.h | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_MACH_SYSTEM_H | ||
10 | #define __ASM_MACH_SYSTEM_H | ||
11 | |||
12 | static inline void arch_idle(void) | ||
13 | { | ||
14 | cpu_do_idle(); | ||
15 | } | ||
16 | #endif /* __ASM_MACH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-msm/idle.S b/arch/arm/mach-msm/idle.S deleted file mode 100644 index 6a94f0527137..000000000000 --- a/arch/arm/mach-msm/idle.S +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | /* arch/arm/mach-msm/include/mach/idle.S | ||
2 | * | ||
3 | * Idle processing for MSM7K - work around bugs with SWFI. | ||
4 | * | ||
5 | * Copyright (c) 2007 QUALCOMM Incorporated. | ||
6 | * Copyright (C) 2007 Google, Inc. | ||
7 | * | ||
8 | * This software is licensed under the terms of the GNU General Public | ||
9 | * License version 2, as published by the Free Software Foundation, and | ||
10 | * may be copied, distributed, and modified under those terms. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | */ | ||
18 | |||
19 | #include <linux/linkage.h> | ||
20 | #include <asm/assembler.h> | ||
21 | |||
22 | ENTRY(arch_idle) | ||
23 | #ifdef CONFIG_MSM7X00A_IDLE | ||
24 | mrc p15, 0, r1, c1, c0, 0 /* read current CR */ | ||
25 | bic r0, r1, #(1 << 2) /* clear dcache bit */ | ||
26 | bic r0, r0, #(1 << 12) /* clear icache bit */ | ||
27 | mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ | ||
28 | |||
29 | mov r0, #0 /* prepare wfi value */ | ||
30 | mcr p15, 0, r0, c7, c10, 0 /* flush the cache */ | ||
31 | mcr p15, 0, r0, c7, c10, 4 /* memory barrier */ | ||
32 | mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ | ||
33 | |||
34 | mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ | ||
35 | #endif | ||
36 | mov pc, lr | ||
diff --git a/arch/arm/mach-msm/idle.c b/arch/arm/mach-msm/idle.c new file mode 100644 index 000000000000..0c9e13c65743 --- /dev/null +++ b/arch/arm/mach-msm/idle.c | |||
@@ -0,0 +1,49 @@ | |||
1 | /* arch/arm/mach-msm/idle.c | ||
2 | * | ||
3 | * Idle processing for MSM7K - work around bugs with SWFI. | ||
4 | * | ||
5 | * Copyright (c) 2007 QUALCOMM Incorporated. | ||
6 | * Copyright (C) 2007 Google, Inc. | ||
7 | * | ||
8 | * This software is licensed under the terms of the GNU General Public | ||
9 | * License version 2, as published by the Free Software Foundation, and | ||
10 | * may be copied, distributed, and modified under those terms. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | */ | ||
18 | |||
19 | #include <linux/init.h> | ||
20 | #include <asm/system.h> | ||
21 | |||
22 | static void msm_idle(void) | ||
23 | { | ||
24 | #ifdef CONFIG_MSM7X00A_IDLE | ||
25 | asm volatile ( | ||
26 | |||
27 | "mrc p15, 0, r1, c1, c0, 0 /* read current CR */ \n\t" | ||
28 | "bic r0, r1, #(1 << 2) /* clear dcache bit */ \n\t" | ||
29 | "bic r0, r0, #(1 << 12) /* clear icache bit */ \n\t" | ||
30 | "mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ \n\t" | ||
31 | |||
32 | "mov r0, #0 /* prepare wfi value */ \n\t" | ||
33 | "mcr p15, 0, r0, c7, c10, 0 /* flush the cache */ \n\t" | ||
34 | "mcr p15, 0, r0, c7, c10, 4 /* memory barrier */ \n\t" | ||
35 | "mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ \n\t" | ||
36 | |||
37 | "mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ \n\t" | ||
38 | |||
39 | : : : "r0","r1" ); | ||
40 | #endif | ||
41 | } | ||
42 | |||
43 | static int __init msm_idle_init(void) | ||
44 | { | ||
45 | arm_pm_idle = msm_idle; | ||
46 | return 0; | ||
47 | } | ||
48 | |||
49 | arch_initcall(msm_idle_init); | ||
diff --git a/arch/arm/mach-msm/include/mach/entry-macro.S b/arch/arm/mach-msm/include/mach/entry-macro.S index 41f7003ef34f..f2ae9087f654 100644 --- a/arch/arm/mach-msm/include/mach/entry-macro.S +++ b/arch/arm/mach-msm/include/mach/entry-macro.S | |||
@@ -16,12 +16,6 @@ | |||
16 | * | 16 | * |
17 | */ | 17 | */ |
18 | 18 | ||
19 | .macro disable_fiq | ||
20 | .endm | ||
21 | |||
22 | .macro arch_ret_to_user, tmp1, tmp2 | ||
23 | .endm | ||
24 | |||
25 | #if !defined(CONFIG_ARM_GIC) | 19 | #if !defined(CONFIG_ARM_GIC) |
26 | #include <mach/msm_iomap.h> | 20 | #include <mach/msm_iomap.h> |
27 | 21 | ||
diff --git a/arch/arm/mach-msm/include/mach/system.h b/arch/arm/mach-msm/include/mach/system.h index 311db2b35da0..f5fb2ec87ffe 100644 --- a/arch/arm/mach-msm/include/mach/system.h +++ b/arch/arm/mach-msm/include/mach/system.h | |||
@@ -12,7 +12,6 @@ | |||
12 | * GNU General Public License for more details. | 12 | * GNU General Public License for more details. |
13 | * | 13 | * |
14 | */ | 14 | */ |
15 | void arch_idle(void); | ||
16 | 15 | ||
17 | /* low level hardware reset hook -- for example, hitting the | 16 | /* low level hardware reset hook -- for example, hitting the |
18 | * PSHOLD line on the PMIC to hard reset the system | 17 | * PSHOLD line on the PMIC to hard reset the system |
diff --git a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S index 66ae2d29e773..6b1f088e0597 100644 --- a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S +++ b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S | |||
@@ -10,12 +10,6 @@ | |||
10 | 10 | ||
11 | #include <mach/bridge-regs.h> | 11 | #include <mach/bridge-regs.h> |
12 | 12 | ||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
18 | |||
19 | .macro get_irqnr_preamble, base, tmp | 13 | .macro get_irqnr_preamble, base, tmp |
20 | ldr \base, =IRQ_VIRT_BASE | 14 | ldr \base, =IRQ_VIRT_BASE |
21 | .endm | 15 | .endm |
diff --git a/arch/arm/mach-mv78xx0/include/mach/system.h b/arch/arm/mach-mv78xx0/include/mach/system.h deleted file mode 100644 index 8c3a5387cec7..000000000000 --- a/arch/arm/mach-mv78xx0/include/mach/system.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-mv78xx0/include/mach/system.h | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_ARCH_SYSTEM_H | ||
10 | #define __ASM_ARCH_SYSTEM_H | ||
11 | |||
12 | static inline void arch_idle(void) | ||
13 | { | ||
14 | cpu_do_idle(); | ||
15 | } | ||
16 | |||
17 | #endif | ||
diff --git a/arch/arm/mach-mxs/devices.c b/arch/arm/mach-mxs/devices.c index fe3e847930c9..01faffec3064 100644 --- a/arch/arm/mach-mxs/devices.c +++ b/arch/arm/mach-mxs/devices.c | |||
@@ -77,16 +77,18 @@ err: | |||
77 | 77 | ||
78 | int __init mxs_add_amba_device(const struct amba_device *dev) | 78 | int __init mxs_add_amba_device(const struct amba_device *dev) |
79 | { | 79 | { |
80 | struct amba_device *adev = kmalloc(sizeof(*adev), GFP_KERNEL); | 80 | struct amba_device *adev = amba_device_alloc(dev->dev.init_name, |
81 | dev->res.start, resource_size(&dev->res)); | ||
81 | 82 | ||
82 | if (!adev) { | 83 | if (!adev) { |
83 | pr_err("%s: failed to allocate memory", __func__); | 84 | pr_err("%s: failed to allocate memory", __func__); |
84 | return -ENOMEM; | 85 | return -ENOMEM; |
85 | } | 86 | } |
86 | 87 | ||
87 | *adev = *dev; | 88 | adev->irq[0] = dev->irq[0]; |
89 | adev->irq[1] = dev->irq[1]; | ||
88 | 90 | ||
89 | return amba_device_register(adev, &iomem_resource); | 91 | return amba_device_add(adev, &iomem_resource); |
90 | } | 92 | } |
91 | 93 | ||
92 | struct device mxs_apbh_bus = { | 94 | struct device mxs_apbh_bus = { |
diff --git a/arch/arm/mach-mxs/devices/amba-duart.c b/arch/arm/mach-mxs/devices/amba-duart.c index a559db09b49c..a5479f766046 100644 --- a/arch/arm/mach-mxs/devices/amba-duart.c +++ b/arch/arm/mach-mxs/devices/amba-duart.c | |||
@@ -23,7 +23,7 @@ const struct amba_device name##_device __initconst = { \ | |||
23 | .end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1, \ | 23 | .end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1, \ |
24 | .flags = IORESOURCE_MEM, \ | 24 | .flags = IORESOURCE_MEM, \ |
25 | }, \ | 25 | }, \ |
26 | .irq = {soc ## _INT_DUART, NO_IRQ}, \ | 26 | .irq = {soc ## _INT_DUART}, \ |
27 | } | 27 | } |
28 | 28 | ||
29 | #ifdef CONFIG_SOC_IMX23 | 29 | #ifdef CONFIG_SOC_IMX23 |
diff --git a/arch/arm/mach-mxs/include/mach/entry-macro.S b/arch/arm/mach-mxs/include/mach/entry-macro.S index 9f0da12e657a..0c14259705b9 100644 --- a/arch/arm/mach-mxs/include/mach/entry-macro.S +++ b/arch/arm/mach-mxs/include/mach/entry-macro.S | |||
@@ -23,9 +23,6 @@ | |||
23 | #define MXS_ICOLL_VBASE MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR) | 23 | #define MXS_ICOLL_VBASE MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR) |
24 | #define HW_ICOLL_STAT_OFFSET 0x70 | 24 | #define HW_ICOLL_STAT_OFFSET 0x70 |
25 | 25 | ||
26 | .macro disable_fiq | ||
27 | .endm | ||
28 | |||
29 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 26 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
30 | ldr \irqnr, [\base, #HW_ICOLL_STAT_OFFSET] | 27 | ldr \irqnr, [\base, #HW_ICOLL_STAT_OFFSET] |
31 | cmp \irqnr, #0x7F | 28 | cmp \irqnr, #0x7F |
@@ -36,6 +33,3 @@ | |||
36 | .macro get_irqnr_preamble, base, tmp | 33 | .macro get_irqnr_preamble, base, tmp |
37 | ldr \base, =MXS_ICOLL_VBASE | 34 | ldr \base, =MXS_ICOLL_VBASE |
38 | .endm | 35 | .endm |
39 | |||
40 | .macro arch_ret_to_user, tmp1, tmp2 | ||
41 | .endm | ||
diff --git a/arch/arm/mach-mxs/include/mach/system.h b/arch/arm/mach-mxs/include/mach/system.h deleted file mode 100644 index e7ad1bb29423..000000000000 --- a/arch/arm/mach-mxs/include/mach/system.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1999 ARM Limited | ||
3 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
4 | * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | */ | ||
16 | |||
17 | #ifndef __MACH_MXS_SYSTEM_H__ | ||
18 | #define __MACH_MXS_SYSTEM_H__ | ||
19 | |||
20 | static inline void arch_idle(void) | ||
21 | { | ||
22 | cpu_do_idle(); | ||
23 | } | ||
24 | |||
25 | #endif /* __MACH_MXS_SYSTEM_H__ */ | ||
diff --git a/arch/arm/mach-mxs/pm.c b/arch/arm/mach-mxs/pm.c index fb042da29bda..a9b4bbcdafb4 100644 --- a/arch/arm/mach-mxs/pm.c +++ b/arch/arm/mach-mxs/pm.c | |||
@@ -15,13 +15,12 @@ | |||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/suspend.h> | 16 | #include <linux/suspend.h> |
17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
18 | #include <mach/system.h> | ||
19 | 18 | ||
20 | static int mxs_suspend_enter(suspend_state_t state) | 19 | static int mxs_suspend_enter(suspend_state_t state) |
21 | { | 20 | { |
22 | switch (state) { | 21 | switch (state) { |
23 | case PM_SUSPEND_MEM: | 22 | case PM_SUSPEND_MEM: |
24 | arch_idle(); | 23 | cpu_do_idle(); |
25 | break; | 24 | break; |
26 | 25 | ||
27 | default: | 26 | default: |
diff --git a/arch/arm/mach-netx/fb.c b/arch/arm/mach-netx/fb.c index b9913234bbf6..2cdf6ef69bee 100644 --- a/arch/arm/mach-netx/fb.c +++ b/arch/arm/mach-netx/fb.c | |||
@@ -92,18 +92,7 @@ void clk_put(struct clk *clk) | |||
92 | { | 92 | { |
93 | } | 93 | } |
94 | 94 | ||
95 | static struct amba_device fb_device = { | 95 | static AMBA_AHB_DEVICE(fb, "fb", 0, 0x00104000, { NETX_IRQ_LCD }, NULL); |
96 | .dev = { | ||
97 | .init_name = "fb", | ||
98 | .coherent_dma_mask = ~0, | ||
99 | }, | ||
100 | .res = { | ||
101 | .start = 0x00104000, | ||
102 | .end = 0x00104fff, | ||
103 | .flags = IORESOURCE_MEM, | ||
104 | }, | ||
105 | .irq = { NETX_IRQ_LCD, NO_IRQ }, | ||
106 | }; | ||
107 | 96 | ||
108 | int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel) | 97 | int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel) |
109 | { | 98 | { |
diff --git a/arch/arm/mach-netx/include/mach/entry-macro.S b/arch/arm/mach-netx/include/mach/entry-macro.S deleted file mode 100644 index 6e9f1cbe1634..000000000000 --- a/arch/arm/mach-netx/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-netx/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for Hilscher netX based platforms | ||
5 | * | ||
6 | * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 | ||
10 | * as published by the Free Software Foundation. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | |||
22 | .macro disable_fiq | ||
23 | .endm | ||
24 | |||
25 | .macro arch_ret_to_user, tmp1, tmp2 | ||
26 | .endm | ||
diff --git a/arch/arm/mach-netx/include/mach/system.h b/arch/arm/mach-netx/include/mach/system.h deleted file mode 100644 index b38fa36d58c4..000000000000 --- a/arch/arm/mach-netx/include/mach/system.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-netx/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 | ||
8 | * as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #ifndef __ASM_ARCH_SYSTEM_H | ||
20 | #define __ASM_ARCH_SYSTEM_H | ||
21 | |||
22 | static inline void arch_idle(void) | ||
23 | { | ||
24 | cpu_do_idle(); | ||
25 | } | ||
26 | |||
27 | #endif | ||
28 | |||
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c index 7c878bf00340..f6f74adbe8c4 100644 --- a/arch/arm/mach-nomadik/board-nhk8815.c +++ b/arch/arm/mach-nomadik/board-nhk8815.c | |||
@@ -185,20 +185,11 @@ static void __init nhk8815_onenand_init(void) | |||
185 | #endif | 185 | #endif |
186 | } | 186 | } |
187 | 187 | ||
188 | #define __MEM_4K_RESOURCE(x) \ | 188 | static AMBA_APB_DEVICE(uart0, "uart0", 0, NOMADIK_UART0_BASE, |
189 | .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} | 189 | { IRQ_UART0 }, NULL); |
190 | 190 | ||
191 | static struct amba_device uart0_device = { | 191 | static AMBA_APB_DEVICE(uart1, "uart1", 0, NOMADIK_UART1_BASE, |
192 | .dev = { .init_name = "uart0" }, | 192 | { IRQ_UART1 }, NULL); |
193 | __MEM_4K_RESOURCE(NOMADIK_UART0_BASE), | ||
194 | .irq = {IRQ_UART0, NO_IRQ}, | ||
195 | }; | ||
196 | |||
197 | static struct amba_device uart1_device = { | ||
198 | .dev = { .init_name = "uart1" }, | ||
199 | __MEM_4K_RESOURCE(NOMADIK_UART1_BASE), | ||
200 | .irq = {IRQ_UART1, NO_IRQ}, | ||
201 | }; | ||
202 | 193 | ||
203 | static struct amba_device *amba_devs[] __initdata = { | 194 | static struct amba_device *amba_devs[] __initdata = { |
204 | &uart0_device, | 195 | &uart0_device, |
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c index 65df7b4fdd3e..27f43a46985e 100644 --- a/arch/arm/mach-nomadik/cpu-8815.c +++ b/arch/arm/mach-nomadik/cpu-8815.c | |||
@@ -97,12 +97,7 @@ static struct platform_device cpu8815_platform_gpio[] = { | |||
97 | GPIO_DEVICE(3), | 97 | GPIO_DEVICE(3), |
98 | }; | 98 | }; |
99 | 99 | ||
100 | static struct amba_device cpu8815_amba_rng = { | 100 | static AMBA_APB_DEVICE(cpu8815_amba_rng, "rng", 0, NOMADIK_RNG_BASE, { }, NULL); |
101 | .dev = { | ||
102 | .init_name = "rng", | ||
103 | }, | ||
104 | __MEM_4K_RESOURCE(NOMADIK_RNG_BASE), | ||
105 | }; | ||
106 | 101 | ||
107 | static struct platform_device *platform_devs[] __initdata = { | 102 | static struct platform_device *platform_devs[] __initdata = { |
108 | cpu8815_platform_gpio + 0, | 103 | cpu8815_platform_gpio + 0, |
@@ -112,7 +107,7 @@ static struct platform_device *platform_devs[] __initdata = { | |||
112 | }; | 107 | }; |
113 | 108 | ||
114 | static struct amba_device *amba_devs[] __initdata = { | 109 | static struct amba_device *amba_devs[] __initdata = { |
115 | &cpu8815_amba_rng | 110 | &cpu8815_amba_rng_device |
116 | }; | 111 | }; |
117 | 112 | ||
118 | static int __init cpu8815_init(void) | 113 | static int __init cpu8815_init(void) |
diff --git a/arch/arm/mach-nomadik/include/mach/entry-macro.S b/arch/arm/mach-nomadik/include/mach/entry-macro.S deleted file mode 100644 index 98ea1c1fbbab..000000000000 --- a/arch/arm/mach-nomadik/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * Low-level IRQ helper macros for Nomadik platforms | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | |||
9 | .macro disable_fiq | ||
10 | .endm | ||
11 | |||
12 | .macro arch_ret_to_user, tmp1, tmp2 | ||
13 | .endm | ||
diff --git a/arch/arm/mach-nomadik/include/mach/system.h b/arch/arm/mach-nomadik/include/mach/system.h deleted file mode 100644 index 25e198b8976c..000000000000 --- a/arch/arm/mach-nomadik/include/mach/system.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* | ||
2 | * mach-nomadik/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2008 STMicroelectronics | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARCH_SYSTEM_H | ||
21 | #define __ASM_ARCH_SYSTEM_H | ||
22 | |||
23 | static inline void arch_idle(void) | ||
24 | { | ||
25 | /* | ||
26 | * This should do all the clock switching | ||
27 | * and wait for interrupt tricks | ||
28 | */ | ||
29 | cpu_do_idle(); | ||
30 | } | ||
31 | |||
32 | #endif | ||
diff --git a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S index c1c5fb6a5b4c..399c4c49722f 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq-handler.S +++ b/arch/arm/mach-omap1/ams-delta-fiq-handler.S | |||
@@ -15,11 +15,12 @@ | |||
15 | 15 | ||
16 | #include <linux/linkage.h> | 16 | #include <linux/linkage.h> |
17 | 17 | ||
18 | #include <plat/io.h> | ||
19 | #include <plat/board-ams-delta.h> | 18 | #include <plat/board-ams-delta.h> |
20 | 19 | ||
21 | #include <mach/ams-delta-fiq.h> | 20 | #include <mach/ams-delta-fiq.h> |
22 | 21 | ||
22 | #include "iomap.h" | ||
23 | |||
23 | /* | 24 | /* |
24 | * GPIO related definitions, copied from arch/arm/plat-omap/gpio.c. | 25 | * GPIO related definitions, copied from arch/arm/plat-omap/gpio.c. |
25 | * Unfortunately, those were not placed in a separate header file. | 26 | * Unfortunately, those were not placed in a separate header file. |
diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c index 152b32c15e28..fcce7ff37630 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq.c +++ b/arch/arm/mach-omap1/ams-delta-fiq.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <plat/board-ams-delta.h> | 22 | #include <plat/board-ams-delta.h> |
23 | 23 | ||
24 | #include <asm/fiq.h> | 24 | #include <asm/fiq.h> |
25 | |||
25 | #include <mach/ams-delta-fiq.h> | 26 | #include <mach/ams-delta-fiq.h> |
26 | 27 | ||
27 | static struct fiq_handler fh = { | 28 | static struct fiq_handler fh = { |
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 88909cc0b254..ac65d7d7c7a1 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c | |||
@@ -20,25 +20,27 @@ | |||
20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
21 | #include <linux/serial_8250.h> | 21 | #include <linux/serial_8250.h> |
22 | #include <linux/export.h> | 22 | #include <linux/export.h> |
23 | #include <linux/io.h> | ||
23 | 24 | ||
24 | #include <media/soc_camera.h> | 25 | #include <media/soc_camera.h> |
25 | 26 | ||
26 | #include <asm/serial.h> | 27 | #include <asm/serial.h> |
27 | #include <mach/hardware.h> | ||
28 | #include <asm/mach-types.h> | 28 | #include <asm/mach-types.h> |
29 | #include <asm/mach/arch.h> | 29 | #include <asm/mach/arch.h> |
30 | #include <asm/mach/map.h> | 30 | #include <asm/mach/map.h> |
31 | 31 | ||
32 | #include <plat/io.h> | ||
33 | #include <plat/board-ams-delta.h> | 32 | #include <plat/board-ams-delta.h> |
34 | #include <plat/keypad.h> | 33 | #include <plat/keypad.h> |
35 | #include <plat/mux.h> | 34 | #include <plat/mux.h> |
36 | #include <plat/usb.h> | 35 | #include <plat/usb.h> |
37 | #include <plat/board.h> | 36 | #include <plat/board.h> |
38 | #include "common.h" | ||
39 | #include <mach/camera.h> | ||
40 | 37 | ||
38 | #include <mach/hardware.h> | ||
41 | #include <mach/ams-delta-fiq.h> | 39 | #include <mach/ams-delta-fiq.h> |
40 | #include <mach/camera.h> | ||
41 | |||
42 | #include "iomap.h" | ||
43 | #include "common.h" | ||
42 | 44 | ||
43 | static u8 ams_delta_latch1_reg; | 45 | static u8 ams_delta_latch1_reg; |
44 | static u16 ams_delta_latch2_reg; | 46 | static u16 ams_delta_latch2_reg; |
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index 0b9464b41212..079292cca584 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c | |||
@@ -22,7 +22,6 @@ | |||
22 | #include <linux/input.h> | 22 | #include <linux/input.h> |
23 | #include <linux/smc91x.h> | 23 | #include <linux/smc91x.h> |
24 | 24 | ||
25 | #include <mach/hardware.h> | ||
26 | #include <asm/mach-types.h> | 25 | #include <asm/mach-types.h> |
27 | #include <asm/mach/arch.h> | 26 | #include <asm/mach/arch.h> |
28 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
@@ -32,9 +31,13 @@ | |||
32 | #include <plat/flash.h> | 31 | #include <plat/flash.h> |
33 | #include <plat/fpga.h> | 32 | #include <plat/fpga.h> |
34 | #include <plat/keypad.h> | 33 | #include <plat/keypad.h> |
35 | #include "common.h" | ||
36 | #include <plat/board.h> | 34 | #include <plat/board.h> |
37 | 35 | ||
36 | #include <mach/hardware.h> | ||
37 | |||
38 | #include "iomap.h" | ||
39 | #include "common.h" | ||
40 | |||
38 | /* fsample is pretty close to p2-sample */ | 41 | /* fsample is pretty close to p2-sample */ |
39 | 42 | ||
40 | #define fsample_cpld_read(reg) __raw_readb(reg) | 43 | #define fsample_cpld_read(reg) __raw_readb(reg) |
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index 00ad6b22d60a..03e0050a8961 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c | |||
@@ -31,8 +31,6 @@ | |||
31 | #include <linux/i2c/tps65010.h> | 31 | #include <linux/i2c/tps65010.h> |
32 | #include <linux/smc91x.h> | 32 | #include <linux/smc91x.h> |
33 | 33 | ||
34 | #include <mach/hardware.h> | ||
35 | |||
36 | #include <asm/mach-types.h> | 34 | #include <asm/mach-types.h> |
37 | #include <asm/mach/arch.h> | 35 | #include <asm/mach/arch.h> |
38 | #include <asm/mach/map.h> | 36 | #include <asm/mach/map.h> |
@@ -43,9 +41,11 @@ | |||
43 | #include <plat/irda.h> | 41 | #include <plat/irda.h> |
44 | #include <plat/usb.h> | 42 | #include <plat/usb.h> |
45 | #include <plat/keypad.h> | 43 | #include <plat/keypad.h> |
46 | #include "common.h" | ||
47 | #include <plat/flash.h> | 44 | #include <plat/flash.h> |
48 | 45 | ||
46 | #include <mach/hardware.h> | ||
47 | |||
48 | #include "common.h" | ||
49 | #include "board-h2.h" | 49 | #include "board-h2.h" |
50 | 50 | ||
51 | /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ | 51 | /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ |
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 4a7f25149703..f304fe211b1a 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c | |||
@@ -33,21 +33,21 @@ | |||
33 | 33 | ||
34 | #include <asm/setup.h> | 34 | #include <asm/setup.h> |
35 | #include <asm/page.h> | 35 | #include <asm/page.h> |
36 | #include <mach/hardware.h> | ||
37 | |||
38 | #include <asm/mach-types.h> | 36 | #include <asm/mach-types.h> |
39 | #include <asm/mach/arch.h> | 37 | #include <asm/mach/arch.h> |
40 | #include <asm/mach/map.h> | 38 | #include <asm/mach/map.h> |
41 | 39 | ||
42 | #include <mach/irqs.h> | ||
43 | #include <plat/mux.h> | 40 | #include <plat/mux.h> |
44 | #include <plat/tc.h> | 41 | #include <plat/tc.h> |
45 | #include <plat/usb.h> | 42 | #include <plat/usb.h> |
46 | #include <plat/keypad.h> | 43 | #include <plat/keypad.h> |
47 | #include <plat/dma.h> | 44 | #include <plat/dma.h> |
48 | #include "common.h" | ||
49 | #include <plat/flash.h> | 45 | #include <plat/flash.h> |
50 | 46 | ||
47 | #include <mach/hardware.h> | ||
48 | #include <mach/irqs.h> | ||
49 | |||
50 | #include "common.h" | ||
51 | #include "board-h3.h" | 51 | #include "board-h3.h" |
52 | 52 | ||
53 | /* In OMAP1710 H3 the Ethernet is directly connected to CS1 */ | 53 | /* In OMAP1710 H3 the Ethernet is directly connected to CS1 */ |
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index 731cc3db7ab3..fa52d145d7b6 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c | |||
@@ -27,7 +27,7 @@ | |||
27 | #include <linux/init.h> | 27 | #include <linux/init.h> |
28 | #include <linux/platform_device.h> | 28 | #include <linux/platform_device.h> |
29 | #include <linux/input.h> | 29 | #include <linux/input.h> |
30 | #include <linux/io.h> | 30 | #include <linux/delay.h> |
31 | #include <linux/gpio.h> | 31 | #include <linux/gpio.h> |
32 | #include <linux/gpio_keys.h> | 32 | #include <linux/gpio_keys.h> |
33 | #include <linux/i2c.h> | 33 | #include <linux/i2c.h> |
@@ -41,7 +41,6 @@ | |||
41 | #include <asm/mach/arch.h> | 41 | #include <asm/mach/arch.h> |
42 | 42 | ||
43 | #include <plat/omap7xx.h> | 43 | #include <plat/omap7xx.h> |
44 | #include "common.h" | ||
45 | #include <plat/board.h> | 44 | #include <plat/board.h> |
46 | #include <plat/keypad.h> | 45 | #include <plat/keypad.h> |
47 | #include <plat/usb.h> | 46 | #include <plat/usb.h> |
@@ -49,7 +48,7 @@ | |||
49 | 48 | ||
50 | #include <mach/irqs.h> | 49 | #include <mach/irqs.h> |
51 | 50 | ||
52 | #include <linux/delay.h> | 51 | #include "common.h" |
53 | 52 | ||
54 | /* LCD register definition */ | 53 | /* LCD register definition */ |
55 | #define OMAP_LCDC_CONTROL (0xfffec000 + 0x00) | 54 | #define OMAP_LCDC_CONTROL (0xfffec000 + 0x00) |
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 309369ea6978..289a6b82c5f7 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c | |||
@@ -26,7 +26,6 @@ | |||
26 | #include <linux/input.h> | 26 | #include <linux/input.h> |
27 | #include <linux/smc91x.h> | 27 | #include <linux/smc91x.h> |
28 | 28 | ||
29 | #include <mach/hardware.h> | ||
30 | #include <asm/mach-types.h> | 29 | #include <asm/mach-types.h> |
31 | #include <asm/mach/arch.h> | 30 | #include <asm/mach/arch.h> |
32 | #include <asm/mach/map.h> | 31 | #include <asm/mach/map.h> |
@@ -37,9 +36,13 @@ | |||
37 | #include <plat/tc.h> | 36 | #include <plat/tc.h> |
38 | #include <plat/usb.h> | 37 | #include <plat/usb.h> |
39 | #include <plat/keypad.h> | 38 | #include <plat/keypad.h> |
40 | #include "common.h" | ||
41 | #include <plat/mmc.h> | 39 | #include <plat/mmc.h> |
42 | 40 | ||
41 | #include <mach/hardware.h> | ||
42 | |||
43 | #include "iomap.h" | ||
44 | #include "common.h" | ||
45 | |||
43 | /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ | 46 | /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ |
44 | #define INNOVATOR1610_ETHR_START 0x04000300 | 47 | #define INNOVATOR1610_ETHR_START 0x04000300 |
45 | 48 | ||
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index f9efc036ba96..abdbdb08644f 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c | |||
@@ -21,7 +21,6 @@ | |||
21 | #include <linux/workqueue.h> | 21 | #include <linux/workqueue.h> |
22 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
23 | 23 | ||
24 | #include <mach/hardware.h> | ||
25 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
26 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
27 | #include <asm/mach/map.h> | 26 | #include <asm/mach/map.h> |
@@ -30,12 +29,15 @@ | |||
30 | #include <plat/usb.h> | 29 | #include <plat/usb.h> |
31 | #include <plat/board.h> | 30 | #include <plat/board.h> |
32 | #include <plat/keypad.h> | 31 | #include <plat/keypad.h> |
33 | #include "common.h" | ||
34 | #include <plat/hwa742.h> | 32 | #include <plat/hwa742.h> |
35 | #include <plat/lcd_mipid.h> | 33 | #include <plat/lcd_mipid.h> |
36 | #include <plat/mmc.h> | 34 | #include <plat/mmc.h> |
37 | #include <plat/clock.h> | 35 | #include <plat/clock.h> |
38 | 36 | ||
37 | #include <mach/hardware.h> | ||
38 | |||
39 | #include "common.h" | ||
40 | |||
39 | #define ADS7846_PENDOWN_GPIO 15 | 41 | #define ADS7846_PENDOWN_GPIO 15 |
40 | 42 | ||
41 | static const unsigned int nokia770_keymap[] = { | 43 | static const unsigned int nokia770_keymap[] = { |
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 675de06557aa..e2d7ae4418f2 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c | |||
@@ -34,15 +34,11 @@ | |||
34 | #include <linux/i2c.h> | 34 | #include <linux/i2c.h> |
35 | #include <linux/leds.h> | 35 | #include <linux/leds.h> |
36 | #include <linux/smc91x.h> | 36 | #include <linux/smc91x.h> |
37 | |||
38 | #include <linux/mtd/mtd.h> | 37 | #include <linux/mtd/mtd.h> |
39 | #include <linux/mtd/partitions.h> | 38 | #include <linux/mtd/partitions.h> |
40 | #include <linux/mtd/physmap.h> | 39 | #include <linux/mtd/physmap.h> |
41 | |||
42 | #include <linux/i2c/tps65010.h> | 40 | #include <linux/i2c/tps65010.h> |
43 | 41 | ||
44 | #include <mach/hardware.h> | ||
45 | |||
46 | #include <asm/mach-types.h> | 42 | #include <asm/mach-types.h> |
47 | #include <asm/mach/arch.h> | 43 | #include <asm/mach/arch.h> |
48 | #include <asm/mach/map.h> | 44 | #include <asm/mach/map.h> |
@@ -51,6 +47,9 @@ | |||
51 | #include <plat/usb.h> | 47 | #include <plat/usb.h> |
52 | #include <plat/mux.h> | 48 | #include <plat/mux.h> |
53 | #include <plat/tc.h> | 49 | #include <plat/tc.h> |
50 | |||
51 | #include <mach/hardware.h> | ||
52 | |||
54 | #include "common.h" | 53 | #include "common.h" |
55 | 54 | ||
56 | /* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ | 55 | /* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ |
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c index 81fa27f88369..04efa7e61149 100644 --- a/arch/arm/mach-omap1/board-palmte.c +++ b/arch/arm/mach-omap1/board-palmte.c | |||
@@ -28,7 +28,6 @@ | |||
28 | #include <linux/interrupt.h> | 28 | #include <linux/interrupt.h> |
29 | #include <linux/apm-emulation.h> | 29 | #include <linux/apm-emulation.h> |
30 | 30 | ||
31 | #include <mach/hardware.h> | ||
32 | #include <asm/mach-types.h> | 31 | #include <asm/mach-types.h> |
33 | #include <asm/mach/arch.h> | 32 | #include <asm/mach/arch.h> |
34 | #include <asm/mach/map.h> | 33 | #include <asm/mach/map.h> |
@@ -41,6 +40,9 @@ | |||
41 | #include <plat/board.h> | 40 | #include <plat/board.h> |
42 | #include <plat/irda.h> | 41 | #include <plat/irda.h> |
43 | #include <plat/keypad.h> | 42 | #include <plat/keypad.h> |
43 | |||
44 | #include <mach/hardware.h> | ||
45 | |||
44 | #include "common.h" | 46 | #include "common.h" |
45 | 47 | ||
46 | #define PALMTE_USBDETECT_GPIO 0 | 48 | #define PALMTE_USBDETECT_GPIO 0 |
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index 81cb82178388..acd1f3645ba0 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c | |||
@@ -24,8 +24,9 @@ | |||
24 | #include <linux/mtd/partitions.h> | 24 | #include <linux/mtd/partitions.h> |
25 | #include <linux/mtd/physmap.h> | 25 | #include <linux/mtd/physmap.h> |
26 | #include <linux/leds.h> | 26 | #include <linux/leds.h> |
27 | #include <linux/spi/spi.h> | ||
28 | #include <linux/spi/ads7846.h> | ||
27 | 29 | ||
28 | #include <mach/hardware.h> | ||
29 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
30 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
31 | #include <asm/mach/map.h> | 32 | #include <asm/mach/map.h> |
@@ -39,10 +40,10 @@ | |||
39 | #include <plat/board.h> | 40 | #include <plat/board.h> |
40 | #include <plat/irda.h> | 41 | #include <plat/irda.h> |
41 | #include <plat/keypad.h> | 42 | #include <plat/keypad.h> |
42 | #include "common.h" | ||
43 | 43 | ||
44 | #include <linux/spi/spi.h> | 44 | #include <mach/hardware.h> |
45 | #include <linux/spi/ads7846.h> | 45 | |
46 | #include "common.h" | ||
46 | 47 | ||
47 | #define PALMTT_USBDETECT_GPIO 0 | 48 | #define PALMTT_USBDETECT_GPIO 0 |
48 | #define PALMTT_CABLE_GPIO 1 | 49 | #define PALMTT_CABLE_GPIO 1 |
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index e881945ce8ec..c1cd0f2d6866 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c | |||
@@ -27,8 +27,9 @@ | |||
27 | #include <linux/mtd/mtd.h> | 27 | #include <linux/mtd/mtd.h> |
28 | #include <linux/mtd/partitions.h> | 28 | #include <linux/mtd/partitions.h> |
29 | #include <linux/mtd/physmap.h> | 29 | #include <linux/mtd/physmap.h> |
30 | #include <linux/spi/spi.h> | ||
31 | #include <linux/spi/ads7846.h> | ||
30 | 32 | ||
31 | #include <mach/hardware.h> | ||
32 | #include <asm/mach-types.h> | 33 | #include <asm/mach-types.h> |
33 | #include <asm/mach/arch.h> | 34 | #include <asm/mach/arch.h> |
34 | #include <asm/mach/map.h> | 35 | #include <asm/mach/map.h> |
@@ -41,10 +42,10 @@ | |||
41 | #include <plat/board.h> | 42 | #include <plat/board.h> |
42 | #include <plat/irda.h> | 43 | #include <plat/irda.h> |
43 | #include <plat/keypad.h> | 44 | #include <plat/keypad.h> |
44 | #include "common.h" | ||
45 | 45 | ||
46 | #include <linux/spi/spi.h> | 46 | #include <mach/hardware.h> |
47 | #include <linux/spi/ads7846.h> | 47 | |
48 | #include "common.h" | ||
48 | 49 | ||
49 | #define PALMZ71_USBDETECT_GPIO 0 | 50 | #define PALMZ71_USBDETECT_GPIO 0 |
50 | #define PALMZ71_PENIRQ_GPIO 6 | 51 | #define PALMZ71_PENIRQ_GPIO 6 |
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index c000bed76276..83f5b765c5b6 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c | |||
@@ -22,7 +22,6 @@ | |||
22 | #include <linux/input.h> | 22 | #include <linux/input.h> |
23 | #include <linux/smc91x.h> | 23 | #include <linux/smc91x.h> |
24 | 24 | ||
25 | #include <mach/hardware.h> | ||
26 | #include <asm/mach-types.h> | 25 | #include <asm/mach-types.h> |
27 | #include <asm/mach/arch.h> | 26 | #include <asm/mach/arch.h> |
28 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
@@ -32,9 +31,13 @@ | |||
32 | #include <plat/fpga.h> | 31 | #include <plat/fpga.h> |
33 | #include <plat/flash.h> | 32 | #include <plat/flash.h> |
34 | #include <plat/keypad.h> | 33 | #include <plat/keypad.h> |
35 | #include "common.h" | ||
36 | #include <plat/board.h> | 34 | #include <plat/board.h> |
37 | 35 | ||
36 | #include <mach/hardware.h> | ||
37 | |||
38 | #include "iomap.h" | ||
39 | #include "common.h" | ||
40 | |||
38 | static const unsigned int p2_keymap[] = { | 41 | static const unsigned int p2_keymap[] = { |
39 | KEY(0, 0, KEY_UP), | 42 | KEY(0, 0, KEY_UP), |
40 | KEY(1, 0, KEY_RIGHT), | 43 | KEY(1, 0, KEY_RIGHT), |
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c index 7bcd82ab0fd0..fed4435f5d43 100644 --- a/arch/arm/mach-omap1/board-sx1.c +++ b/arch/arm/mach-omap1/board-sx1.c | |||
@@ -28,7 +28,6 @@ | |||
28 | #include <linux/errno.h> | 28 | #include <linux/errno.h> |
29 | #include <linux/export.h> | 29 | #include <linux/export.h> |
30 | 30 | ||
31 | #include <mach/hardware.h> | ||
32 | #include <asm/mach-types.h> | 31 | #include <asm/mach-types.h> |
33 | #include <asm/mach/arch.h> | 32 | #include <asm/mach/arch.h> |
34 | #include <asm/mach/map.h> | 33 | #include <asm/mach/map.h> |
@@ -40,10 +39,13 @@ | |||
40 | #include <plat/usb.h> | 39 | #include <plat/usb.h> |
41 | #include <plat/tc.h> | 40 | #include <plat/tc.h> |
42 | #include <plat/board.h> | 41 | #include <plat/board.h> |
43 | #include "common.h" | ||
44 | #include <plat/keypad.h> | 42 | #include <plat/keypad.h> |
45 | #include <plat/board-sx1.h> | 43 | #include <plat/board-sx1.h> |
46 | 44 | ||
45 | #include <mach/hardware.h> | ||
46 | |||
47 | #include "common.h" | ||
48 | |||
47 | /* Write to I2C device */ | 49 | /* Write to I2C device */ |
48 | int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value) | 50 | int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value) |
49 | { | 51 | { |
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index f83a502dc93c..659d0f75de2c 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c | |||
@@ -27,18 +27,20 @@ | |||
27 | #include <linux/smc91x.h> | 27 | #include <linux/smc91x.h> |
28 | #include <linux/export.h> | 28 | #include <linux/export.h> |
29 | 29 | ||
30 | #include <mach/hardware.h> | ||
31 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
32 | #include <asm/mach/arch.h> | 31 | #include <asm/mach/arch.h> |
33 | #include <asm/mach/map.h> | 32 | #include <asm/mach/map.h> |
34 | 33 | ||
35 | #include <plat/board-voiceblue.h> | 34 | #include <plat/board-voiceblue.h> |
36 | #include "common.h" | ||
37 | #include <plat/flash.h> | 35 | #include <plat/flash.h> |
38 | #include <plat/mux.h> | 36 | #include <plat/mux.h> |
39 | #include <plat/tc.h> | 37 | #include <plat/tc.h> |
40 | #include <plat/usb.h> | 38 | #include <plat/usb.h> |
41 | 39 | ||
40 | #include <mach/hardware.h> | ||
41 | |||
42 | #include "common.h" | ||
43 | |||
42 | static struct plat_serial8250_port voiceblue_ports[] = { | 44 | static struct plat_serial8250_port voiceblue_ports[] = { |
43 | { | 45 | { |
44 | .mapbase = (unsigned long)(OMAP_CS1_PHYS + 0x40000), | 46 | .mapbase = (unsigned long)(OMAP_CS1_PHYS + 0x40000), |
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 0c50df05d135..67382ddd8c83 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c | |||
@@ -15,8 +15,8 @@ | |||
15 | #include <linux/list.h> | 15 | #include <linux/list.h> |
16 | #include <linux/errno.h> | 16 | #include <linux/errno.h> |
17 | #include <linux/err.h> | 17 | #include <linux/err.h> |
18 | #include <linux/clk.h> | ||
19 | #include <linux/io.h> | 18 | #include <linux/io.h> |
19 | #include <linux/clk.h> | ||
20 | #include <linux/clkdev.h> | 20 | #include <linux/clkdev.h> |
21 | 21 | ||
22 | #include <asm/mach-types.h> | 22 | #include <asm/mach-types.h> |
@@ -27,6 +27,9 @@ | |||
27 | #include <plat/sram.h> | 27 | #include <plat/sram.h> |
28 | #include <plat/clkdev_omap.h> | 28 | #include <plat/clkdev_omap.h> |
29 | 29 | ||
30 | #include <mach/hardware.h> | ||
31 | |||
32 | #include "iomap.h" | ||
30 | #include "clock.h" | 33 | #include "clock.h" |
31 | #include "opp.h" | 34 | #include "opp.h" |
32 | 35 | ||
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index 94699a82a734..c6ce93f71d08 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c | |||
@@ -15,10 +15,10 @@ | |||
15 | */ | 15 | */ |
16 | 16 | ||
17 | #include <linux/kernel.h> | 17 | #include <linux/kernel.h> |
18 | #include <linux/io.h> | ||
18 | #include <linux/clk.h> | 19 | #include <linux/clk.h> |
19 | #include <linux/cpufreq.h> | 20 | #include <linux/cpufreq.h> |
20 | #include <linux/delay.h> | 21 | #include <linux/delay.h> |
21 | #include <linux/io.h> | ||
22 | 22 | ||
23 | #include <asm/mach-types.h> /* for machine_is_* */ | 23 | #include <asm/mach-types.h> /* for machine_is_* */ |
24 | 24 | ||
@@ -28,6 +28,9 @@ | |||
28 | #include <plat/sram.h> /* for omap_sram_reprogram_clock() */ | 28 | #include <plat/sram.h> /* for omap_sram_reprogram_clock() */ |
29 | #include <plat/usb.h> /* for OTG_BASE */ | 29 | #include <plat/usb.h> /* for OTG_BASE */ |
30 | 30 | ||
31 | #include <mach/hardware.h> | ||
32 | |||
33 | #include "iomap.h" | ||
31 | #include "clock.h" | 34 | #include "clock.h" |
32 | 35 | ||
33 | /* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */ | 36 | /* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */ |
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h index a9a5146dd2d4..af658ad338ec 100644 --- a/arch/arm/mach-omap1/common.h +++ b/arch/arm/mach-omap1/common.h | |||
@@ -58,5 +58,6 @@ void omap1_restart(char, const char *); | |||
58 | 58 | ||
59 | extern struct sys_timer omap1_timer; | 59 | extern struct sys_timer omap1_timer; |
60 | extern bool omap_32k_timer_init(void); | 60 | extern bool omap_32k_timer_init(void); |
61 | extern void __init omap_init_consistent_dma_size(void); | ||
61 | 62 | ||
62 | #endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */ | 63 | #endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */ |
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 1d76a63c0983..d06c7140392c 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c | |||
@@ -15,14 +15,10 @@ | |||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
17 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
18 | #include <linux/io.h> | ||
19 | #include <linux/spi/spi.h> | 18 | #include <linux/spi/spi.h> |
20 | 19 | ||
21 | #include <mach/camera.h> | ||
22 | #include <mach/hardware.h> | ||
23 | #include <asm/mach/map.h> | 20 | #include <asm/mach/map.h> |
24 | 21 | ||
25 | #include "common.h" | ||
26 | #include <plat/tc.h> | 22 | #include <plat/tc.h> |
27 | #include <plat/board.h> | 23 | #include <plat/board.h> |
28 | #include <plat/mux.h> | 24 | #include <plat/mux.h> |
@@ -30,6 +26,10 @@ | |||
30 | #include <plat/omap7xx.h> | 26 | #include <plat/omap7xx.h> |
31 | #include <plat/mcbsp.h> | 27 | #include <plat/mcbsp.h> |
32 | 28 | ||
29 | #include <mach/camera.h> | ||
30 | #include <mach/hardware.h> | ||
31 | |||
32 | #include "common.h" | ||
33 | #include "clock.h" | 33 | #include "clock.h" |
34 | 34 | ||
35 | /*-------------------------------------------------------------------------*/ | 35 | /*-------------------------------------------------------------------------*/ |
diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c index f5a52204b89f..3ef7d52316b4 100644 --- a/arch/arm/mach-omap1/dma.c +++ b/arch/arm/mach-omap1/dma.c | |||
@@ -19,11 +19,11 @@ | |||
19 | */ | 19 | */ |
20 | 20 | ||
21 | #include <linux/err.h> | 21 | #include <linux/err.h> |
22 | #include <linux/io.h> | ||
23 | #include <linux/slab.h> | 22 | #include <linux/slab.h> |
24 | #include <linux/module.h> | 23 | #include <linux/module.h> |
25 | #include <linux/init.h> | 24 | #include <linux/init.h> |
26 | #include <linux/device.h> | 25 | #include <linux/device.h> |
26 | #include <linux/io.h> | ||
27 | 27 | ||
28 | #include <plat/dma.h> | 28 | #include <plat/dma.h> |
29 | #include <plat/tc.h> | 29 | #include <plat/tc.h> |
diff --git a/arch/arm/mach-omap1/flash.c b/arch/arm/mach-omap1/flash.c index 1749cb37dda0..f9bf78d4fdfb 100644 --- a/arch/arm/mach-omap1/flash.c +++ b/arch/arm/mach-omap1/flash.c | |||
@@ -6,13 +6,15 @@ | |||
6 | * published by the Free Software Foundation. | 6 | * published by the Free Software Foundation. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #include <linux/io.h> | ||
9 | #include <linux/mtd/mtd.h> | 10 | #include <linux/mtd/mtd.h> |
10 | #include <linux/mtd/map.h> | 11 | #include <linux/mtd/map.h> |
11 | 12 | ||
12 | #include <plat/io.h> | ||
13 | #include <plat/tc.h> | 13 | #include <plat/tc.h> |
14 | #include <plat/flash.h> | 14 | #include <plat/flash.h> |
15 | 15 | ||
16 | #include <mach/hardware.h> | ||
17 | |||
16 | void omap1_set_vpp(struct platform_device *pdev, int enable) | 18 | void omap1_set_vpp(struct platform_device *pdev, int enable) |
17 | { | 19 | { |
18 | static int count; | 20 | static int count; |
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c index 0a17a1a7e00d..76c67b3f9f61 100644 --- a/arch/arm/mach-omap1/fpga.c +++ b/arch/arm/mach-omap1/fpga.c | |||
@@ -24,12 +24,15 @@ | |||
24 | #include <linux/errno.h> | 24 | #include <linux/errno.h> |
25 | #include <linux/io.h> | 25 | #include <linux/io.h> |
26 | 26 | ||
27 | #include <mach/hardware.h> | ||
28 | #include <asm/irq.h> | 27 | #include <asm/irq.h> |
29 | #include <asm/mach/irq.h> | 28 | #include <asm/mach/irq.h> |
30 | 29 | ||
31 | #include <plat/fpga.h> | 30 | #include <plat/fpga.h> |
32 | 31 | ||
32 | #include <mach/hardware.h> | ||
33 | |||
34 | #include "iomap.h" | ||
35 | |||
33 | static void fpga_mask_irq(struct irq_data *d) | 36 | static void fpga_mask_irq(struct irq_data *d) |
34 | { | 37 | { |
35 | unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE; | 38 | unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE; |
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c index 399da4ce017b..634903ef8292 100644 --- a/arch/arm/mach-omap1/gpio15xx.c +++ b/arch/arm/mach-omap1/gpio15xx.c | |||
@@ -42,11 +42,12 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = { | |||
42 | .irqstatus = OMAP_MPUIO_GPIO_INT, | 42 | .irqstatus = OMAP_MPUIO_GPIO_INT, |
43 | .irqenable = OMAP_MPUIO_GPIO_MASKIT, | 43 | .irqenable = OMAP_MPUIO_GPIO_MASKIT, |
44 | .irqenable_inv = true, | 44 | .irqenable_inv = true, |
45 | .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE, | ||
45 | }; | 46 | }; |
46 | 47 | ||
47 | static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = { | 48 | static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = { |
48 | .virtual_irq_start = IH_MPUIO_BASE, | 49 | .virtual_irq_start = IH_MPUIO_BASE, |
49 | .bank_type = METHOD_MPUIO, | 50 | .is_mpuio = true, |
50 | .bank_width = 16, | 51 | .bank_width = 16, |
51 | .bank_stride = 1, | 52 | .bank_stride = 1, |
52 | .regs = &omap15xx_mpuio_regs, | 53 | .regs = &omap15xx_mpuio_regs, |
@@ -83,11 +84,12 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = { | |||
83 | .irqstatus = OMAP1510_GPIO_INT_STATUS, | 84 | .irqstatus = OMAP1510_GPIO_INT_STATUS, |
84 | .irqenable = OMAP1510_GPIO_INT_MASK, | 85 | .irqenable = OMAP1510_GPIO_INT_MASK, |
85 | .irqenable_inv = true, | 86 | .irqenable_inv = true, |
87 | .irqctrl = OMAP1510_GPIO_INT_CONTROL, | ||
88 | .pinctrl = OMAP1510_GPIO_PIN_CONTROL, | ||
86 | }; | 89 | }; |
87 | 90 | ||
88 | static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = { | 91 | static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = { |
89 | .virtual_irq_start = IH_GPIO_BASE, | 92 | .virtual_irq_start = IH_GPIO_BASE, |
90 | .bank_type = METHOD_GPIO_1510, | ||
91 | .bank_width = 16, | 93 | .bank_width = 16, |
92 | .regs = &omap15xx_gpio_regs, | 94 | .regs = &omap15xx_gpio_regs, |
93 | }; | 95 | }; |
@@ -115,7 +117,6 @@ static int __init omap15xx_gpio_init(void) | |||
115 | platform_device_register(&omap15xx_mpu_gpio); | 117 | platform_device_register(&omap15xx_mpu_gpio); |
116 | platform_device_register(&omap15xx_gpio); | 118 | platform_device_register(&omap15xx_gpio); |
117 | 119 | ||
118 | gpio_bank_count = 2; | ||
119 | return 0; | 120 | return 0; |
120 | } | 121 | } |
121 | postcore_initcall(omap15xx_gpio_init); | 122 | postcore_initcall(omap15xx_gpio_init); |
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c index 0f399bd0e70e..1fb3b9ad496e 100644 --- a/arch/arm/mach-omap1/gpio16xx.c +++ b/arch/arm/mach-omap1/gpio16xx.c | |||
@@ -24,6 +24,9 @@ | |||
24 | #define OMAP1610_GPIO4_BASE 0xfffbbc00 | 24 | #define OMAP1610_GPIO4_BASE 0xfffbbc00 |
25 | #define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE | 25 | #define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE |
26 | 26 | ||
27 | /* smart idle, enable wakeup */ | ||
28 | #define SYSCONFIG_WORD 0x14 | ||
29 | |||
27 | /* mpu gpio */ | 30 | /* mpu gpio */ |
28 | static struct __initdata resource omap16xx_mpu_gpio_resources[] = { | 31 | static struct __initdata resource omap16xx_mpu_gpio_resources[] = { |
29 | { | 32 | { |
@@ -45,11 +48,12 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = { | |||
45 | .irqstatus = OMAP_MPUIO_GPIO_INT, | 48 | .irqstatus = OMAP_MPUIO_GPIO_INT, |
46 | .irqenable = OMAP_MPUIO_GPIO_MASKIT, | 49 | .irqenable = OMAP_MPUIO_GPIO_MASKIT, |
47 | .irqenable_inv = true, | 50 | .irqenable_inv = true, |
51 | .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE, | ||
48 | }; | 52 | }; |
49 | 53 | ||
50 | static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = { | 54 | static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = { |
51 | .virtual_irq_start = IH_MPUIO_BASE, | 55 | .virtual_irq_start = IH_MPUIO_BASE, |
52 | .bank_type = METHOD_MPUIO, | 56 | .is_mpuio = true, |
53 | .bank_width = 16, | 57 | .bank_width = 16, |
54 | .bank_stride = 1, | 58 | .bank_stride = 1, |
55 | .regs = &omap16xx_mpuio_regs, | 59 | .regs = &omap16xx_mpuio_regs, |
@@ -89,11 +93,13 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = { | |||
89 | .irqenable = OMAP1610_GPIO_IRQENABLE1, | 93 | .irqenable = OMAP1610_GPIO_IRQENABLE1, |
90 | .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1, | 94 | .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1, |
91 | .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1, | 95 | .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1, |
96 | .wkup_en = OMAP1610_GPIO_WAKEUPENABLE, | ||
97 | .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1, | ||
98 | .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2, | ||
92 | }; | 99 | }; |
93 | 100 | ||
94 | static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = { | 101 | static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = { |
95 | .virtual_irq_start = IH_GPIO_BASE, | 102 | .virtual_irq_start = IH_GPIO_BASE, |
96 | .bank_type = METHOD_GPIO_1610, | ||
97 | .bank_width = 16, | 103 | .bank_width = 16, |
98 | .regs = &omap16xx_gpio_regs, | 104 | .regs = &omap16xx_gpio_regs, |
99 | }; | 105 | }; |
@@ -123,7 +129,6 @@ static struct __initdata resource omap16xx_gpio2_resources[] = { | |||
123 | 129 | ||
124 | static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = { | 130 | static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = { |
125 | .virtual_irq_start = IH_GPIO_BASE + 16, | 131 | .virtual_irq_start = IH_GPIO_BASE + 16, |
126 | .bank_type = METHOD_GPIO_1610, | ||
127 | .bank_width = 16, | 132 | .bank_width = 16, |
128 | .regs = &omap16xx_gpio_regs, | 133 | .regs = &omap16xx_gpio_regs, |
129 | }; | 134 | }; |
@@ -153,7 +158,6 @@ static struct __initdata resource omap16xx_gpio3_resources[] = { | |||
153 | 158 | ||
154 | static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = { | 159 | static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = { |
155 | .virtual_irq_start = IH_GPIO_BASE + 32, | 160 | .virtual_irq_start = IH_GPIO_BASE + 32, |
156 | .bank_type = METHOD_GPIO_1610, | ||
157 | .bank_width = 16, | 161 | .bank_width = 16, |
158 | .regs = &omap16xx_gpio_regs, | 162 | .regs = &omap16xx_gpio_regs, |
159 | }; | 163 | }; |
@@ -183,7 +187,6 @@ static struct __initdata resource omap16xx_gpio4_resources[] = { | |||
183 | 187 | ||
184 | static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = { | 188 | static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = { |
185 | .virtual_irq_start = IH_GPIO_BASE + 48, | 189 | .virtual_irq_start = IH_GPIO_BASE + 48, |
186 | .bank_type = METHOD_GPIO_1610, | ||
187 | .bank_width = 16, | 190 | .bank_width = 16, |
188 | .regs = &omap16xx_gpio_regs, | 191 | .regs = &omap16xx_gpio_regs, |
189 | }; | 192 | }; |
@@ -214,14 +217,42 @@ static struct __initdata platform_device * omap16xx_gpio_dev[] = { | |||
214 | static int __init omap16xx_gpio_init(void) | 217 | static int __init omap16xx_gpio_init(void) |
215 | { | 218 | { |
216 | int i; | 219 | int i; |
220 | void __iomem *base; | ||
221 | struct resource *res; | ||
222 | struct platform_device *pdev; | ||
223 | struct omap_gpio_platform_data *pdata; | ||
217 | 224 | ||
218 | if (!cpu_is_omap16xx()) | 225 | if (!cpu_is_omap16xx()) |
219 | return -EINVAL; | 226 | return -EINVAL; |
220 | 227 | ||
221 | for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) | 228 | /* |
222 | platform_device_register(omap16xx_gpio_dev[i]); | 229 | * Enable system clock for GPIO module. |
230 | * The CAM_CLK_CTRL *is* really the right place. | ||
231 | */ | ||
232 | omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04, | ||
233 | ULPD_CAM_CLK_CTRL); | ||
234 | |||
235 | for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) { | ||
236 | pdev = omap16xx_gpio_dev[i]; | ||
237 | pdata = pdev->dev.platform_data; | ||
238 | |||
239 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
240 | if (unlikely(!res)) { | ||
241 | dev_err(&pdev->dev, "Invalid mem resource.\n"); | ||
242 | return -ENODEV; | ||
243 | } | ||
223 | 244 | ||
224 | gpio_bank_count = ARRAY_SIZE(omap16xx_gpio_dev); | 245 | base = ioremap(res->start, resource_size(res)); |
246 | if (unlikely(!base)) { | ||
247 | dev_err(&pdev->dev, "ioremap failed.\n"); | ||
248 | return -ENOMEM; | ||
249 | } | ||
250 | |||
251 | __raw_writel(SYSCONFIG_WORD, base + OMAP1610_GPIO_SYSCONFIG); | ||
252 | iounmap(base); | ||
253 | |||
254 | platform_device_register(omap16xx_gpio_dev[i]); | ||
255 | } | ||
225 | 256 | ||
226 | return 0; | 257 | return 0; |
227 | } | 258 | } |
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c index 5ab63eab0ff5..4771d6b68b96 100644 --- a/arch/arm/mach-omap1/gpio7xx.c +++ b/arch/arm/mach-omap1/gpio7xx.c | |||
@@ -47,12 +47,13 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = { | |||
47 | .irqstatus = OMAP_MPUIO_GPIO_INT / 2, | 47 | .irqstatus = OMAP_MPUIO_GPIO_INT / 2, |
48 | .irqenable = OMAP_MPUIO_GPIO_MASKIT / 2, | 48 | .irqenable = OMAP_MPUIO_GPIO_MASKIT / 2, |
49 | .irqenable_inv = true, | 49 | .irqenable_inv = true, |
50 | .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE >> 1, | ||
50 | }; | 51 | }; |
51 | 52 | ||
52 | static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = { | 53 | static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = { |
53 | .virtual_irq_start = IH_MPUIO_BASE, | 54 | .virtual_irq_start = IH_MPUIO_BASE, |
54 | .bank_type = METHOD_MPUIO, | 55 | .is_mpuio = true, |
55 | .bank_width = 32, | 56 | .bank_width = 16, |
56 | .bank_stride = 2, | 57 | .bank_stride = 2, |
57 | .regs = &omap7xx_mpuio_regs, | 58 | .regs = &omap7xx_mpuio_regs, |
58 | }; | 59 | }; |
@@ -88,11 +89,11 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = { | |||
88 | .irqstatus = OMAP7XX_GPIO_INT_STATUS, | 89 | .irqstatus = OMAP7XX_GPIO_INT_STATUS, |
89 | .irqenable = OMAP7XX_GPIO_INT_MASK, | 90 | .irqenable = OMAP7XX_GPIO_INT_MASK, |
90 | .irqenable_inv = true, | 91 | .irqenable_inv = true, |
92 | .irqctrl = OMAP7XX_GPIO_INT_CONTROL, | ||
91 | }; | 93 | }; |
92 | 94 | ||
93 | static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = { | 95 | static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = { |
94 | .virtual_irq_start = IH_GPIO_BASE, | 96 | .virtual_irq_start = IH_GPIO_BASE, |
95 | .bank_type = METHOD_GPIO_7XX, | ||
96 | .bank_width = 32, | 97 | .bank_width = 32, |
97 | .regs = &omap7xx_gpio_regs, | 98 | .regs = &omap7xx_gpio_regs, |
98 | }; | 99 | }; |
@@ -122,7 +123,6 @@ static struct __initdata resource omap7xx_gpio2_resources[] = { | |||
122 | 123 | ||
123 | static struct __initdata omap_gpio_platform_data omap7xx_gpio2_config = { | 124 | static struct __initdata omap_gpio_platform_data omap7xx_gpio2_config = { |
124 | .virtual_irq_start = IH_GPIO_BASE + 32, | 125 | .virtual_irq_start = IH_GPIO_BASE + 32, |
125 | .bank_type = METHOD_GPIO_7XX, | ||
126 | .bank_width = 32, | 126 | .bank_width = 32, |
127 | .regs = &omap7xx_gpio_regs, | 127 | .regs = &omap7xx_gpio_regs, |
128 | }; | 128 | }; |
@@ -152,7 +152,6 @@ static struct __initdata resource omap7xx_gpio3_resources[] = { | |||
152 | 152 | ||
153 | static struct __initdata omap_gpio_platform_data omap7xx_gpio3_config = { | 153 | static struct __initdata omap_gpio_platform_data omap7xx_gpio3_config = { |
154 | .virtual_irq_start = IH_GPIO_BASE + 64, | 154 | .virtual_irq_start = IH_GPIO_BASE + 64, |
155 | .bank_type = METHOD_GPIO_7XX, | ||
156 | .bank_width = 32, | 155 | .bank_width = 32, |
157 | .regs = &omap7xx_gpio_regs, | 156 | .regs = &omap7xx_gpio_regs, |
158 | }; | 157 | }; |
@@ -182,7 +181,6 @@ static struct __initdata resource omap7xx_gpio4_resources[] = { | |||
182 | 181 | ||
183 | static struct __initdata omap_gpio_platform_data omap7xx_gpio4_config = { | 182 | static struct __initdata omap_gpio_platform_data omap7xx_gpio4_config = { |
184 | .virtual_irq_start = IH_GPIO_BASE + 96, | 183 | .virtual_irq_start = IH_GPIO_BASE + 96, |
185 | .bank_type = METHOD_GPIO_7XX, | ||
186 | .bank_width = 32, | 184 | .bank_width = 32, |
187 | .regs = &omap7xx_gpio_regs, | 185 | .regs = &omap7xx_gpio_regs, |
188 | }; | 186 | }; |
@@ -212,7 +210,6 @@ static struct __initdata resource omap7xx_gpio5_resources[] = { | |||
212 | 210 | ||
213 | static struct __initdata omap_gpio_platform_data omap7xx_gpio5_config = { | 211 | static struct __initdata omap_gpio_platform_data omap7xx_gpio5_config = { |
214 | .virtual_irq_start = IH_GPIO_BASE + 128, | 212 | .virtual_irq_start = IH_GPIO_BASE + 128, |
215 | .bank_type = METHOD_GPIO_7XX, | ||
216 | .bank_width = 32, | 213 | .bank_width = 32, |
217 | .regs = &omap7xx_gpio_regs, | 214 | .regs = &omap7xx_gpio_regs, |
218 | }; | 215 | }; |
@@ -242,7 +239,6 @@ static struct __initdata resource omap7xx_gpio6_resources[] = { | |||
242 | 239 | ||
243 | static struct __initdata omap_gpio_platform_data omap7xx_gpio6_config = { | 240 | static struct __initdata omap_gpio_platform_data omap7xx_gpio6_config = { |
244 | .virtual_irq_start = IH_GPIO_BASE + 160, | 241 | .virtual_irq_start = IH_GPIO_BASE + 160, |
245 | .bank_type = METHOD_GPIO_7XX, | ||
246 | .bank_width = 32, | 242 | .bank_width = 32, |
247 | .regs = &omap7xx_gpio_regs, | 243 | .regs = &omap7xx_gpio_regs, |
248 | }; | 244 | }; |
@@ -282,8 +278,6 @@ static int __init omap7xx_gpio_init(void) | |||
282 | for (i = 0; i < ARRAY_SIZE(omap7xx_gpio_dev); i++) | 278 | for (i = 0; i < ARRAY_SIZE(omap7xx_gpio_dev); i++) |
283 | platform_device_register(omap7xx_gpio_dev[i]); | 279 | platform_device_register(omap7xx_gpio_dev[i]); |
284 | 280 | ||
285 | gpio_bank_count = ARRAY_SIZE(omap7xx_gpio_dev); | ||
286 | |||
287 | return 0; | 281 | return 0; |
288 | } | 282 | } |
289 | postcore_initcall(omap7xx_gpio_init); | 283 | postcore_initcall(omap7xx_gpio_init); |
diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c index a0e3560b39db..f24c1e2c5044 100644 --- a/arch/arm/mach-omap1/id.c +++ b/arch/arm/mach-omap1/id.c | |||
@@ -15,8 +15,11 @@ | |||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
18 | |||
18 | #include <plat/cpu.h> | 19 | #include <plat/cpu.h> |
19 | 20 | ||
21 | #include <mach/hardware.h> | ||
22 | |||
20 | #define OMAP_DIE_ID_0 0xfffe1800 | 23 | #define OMAP_DIE_ID_0 0xfffe1800 |
21 | #define OMAP_DIE_ID_1 0xfffe1804 | 24 | #define OMAP_DIE_ID_1 0xfffe1804 |
22 | #define OMAP_PRODUCTION_ID_0 0xfffe2000 | 25 | #define OMAP_PRODUCTION_ID_0 0xfffe2000 |
diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S index bfb4fb1d7382..fa0f32a686aa 100644 --- a/arch/arm/mach-omap1/include/mach/entry-macro.S +++ b/arch/arm/mach-omap1/include/mach/entry-macro.S | |||
@@ -9,20 +9,16 @@ | |||
9 | * License version 2. This program is licensed "as is" without any | 9 | * License version 2. This program is licensed "as is" without any |
10 | * warranty of any kind, whether express or implied. | 10 | * warranty of any kind, whether express or implied. |
11 | */ | 11 | */ |
12 | |||
12 | #include <mach/hardware.h> | 13 | #include <mach/hardware.h> |
13 | #include <mach/io.h> | 14 | #include <mach/io.h> |
14 | #include <mach/irqs.h> | 15 | #include <mach/irqs.h> |
15 | #include <asm/hardware/gic.h> | ||
16 | 16 | ||
17 | .macro disable_fiq | 17 | #include "../../iomap.h" |
18 | .endm | ||
19 | 18 | ||
20 | .macro get_irqnr_preamble, base, tmp | 19 | .macro get_irqnr_preamble, base, tmp |
21 | .endm | 20 | .endm |
22 | 21 | ||
23 | .macro arch_ret_to_user, tmp1, tmp2 | ||
24 | .endm | ||
25 | |||
26 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 22 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
27 | ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE) | 23 | ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE) |
28 | ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] | 24 | ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] |
diff --git a/arch/arm/mach-omap1/include/mach/hardware.h b/arch/arm/mach-omap1/include/mach/hardware.h index a3f6287b2007..01e35fa106b8 100644 --- a/arch/arm/mach-omap1/include/mach/hardware.h +++ b/arch/arm/mach-omap1/include/mach/hardware.h | |||
@@ -2,4 +2,40 @@ | |||
2 | * arch/arm/mach-omap1/include/mach/hardware.h | 2 | * arch/arm/mach-omap1/include/mach/hardware.h |
3 | */ | 3 | */ |
4 | 4 | ||
5 | #ifndef __MACH_HARDWARE_H | ||
6 | #define __MACH_HARDWARE_H | ||
7 | |||
8 | #ifndef __ASSEMBLER__ | ||
9 | /* | ||
10 | * NOTE: Please use ioremap + __raw_read/write where possible instead of these | ||
11 | */ | ||
12 | extern u8 omap_readb(u32 pa); | ||
13 | extern u16 omap_readw(u32 pa); | ||
14 | extern u32 omap_readl(u32 pa); | ||
15 | extern void omap_writeb(u8 v, u32 pa); | ||
16 | extern void omap_writew(u16 v, u32 pa); | ||
17 | extern void omap_writel(u32 v, u32 pa); | ||
18 | |||
19 | #include <plat/tc.h> | ||
20 | |||
21 | /* Almost all documentation for chip and board memory maps assumes | ||
22 | * BM is clear. Most devel boards have a switch to control booting | ||
23 | * from NOR flash (using external chipselect 3) rather than mask ROM, | ||
24 | * which uses BM to interchange the physical CS0 and CS3 addresses. | ||
25 | */ | ||
26 | static inline u32 omap_cs0m_phys(void) | ||
27 | { | ||
28 | return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM) | ||
29 | ? OMAP_CS3_PHYS : 0; | ||
30 | } | ||
31 | |||
32 | static inline u32 omap_cs3_phys(void) | ||
33 | { | ||
34 | return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM) | ||
35 | ? 0 : OMAP_CS3_PHYS; | ||
36 | } | ||
37 | |||
38 | #endif | ||
39 | #endif | ||
40 | |||
5 | #include <plat/hardware.h> | 41 | #include <plat/hardware.h> |
diff --git a/arch/arm/mach-omap1/include/mach/io.h b/arch/arm/mach-omap1/include/mach/io.h index 57bdf74a3e64..37b12e1fd022 100644 --- a/arch/arm/mach-omap1/include/mach/io.h +++ b/arch/arm/mach-omap1/include/mach/io.h | |||
@@ -1,5 +1,46 @@ | |||
1 | /* | 1 | /* |
2 | * arch/arm/mach-omap1/include/mach/io.h | 2 | * arch/arm/mach-omap1/include/mach/io.h |
3 | * | ||
4 | * IO definitions for TI OMAP processors and boards | ||
5 | * | ||
6 | * Copied from arch/arm/mach-sa1100/include/mach/io.h | ||
7 | * Copyright (C) 1997-1999 Russell King | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify it | ||
10 | * under the terms of the GNU General Public License as published by the | ||
11 | * Free Software Foundation; either version 2 of the License, or (at your | ||
12 | * option) any later version. | ||
13 | * | ||
14 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
15 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
16 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
17 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
18 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
19 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
20 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
21 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
22 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
23 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
24 | * | ||
25 | * You should have received a copy of the GNU General Public License along | ||
26 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
27 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
28 | * | ||
29 | * Modifications: | ||
30 | * 06-12-1997 RMK Created. | ||
31 | * 07-04-1999 RMK Major cleanup | ||
3 | */ | 32 | */ |
4 | 33 | ||
5 | #include <plat/io.h> | 34 | #ifndef __ASM_ARM_ARCH_IO_H |
35 | #define __ASM_ARM_ARCH_IO_H | ||
36 | |||
37 | #define IO_SPACE_LIMIT 0xffffffff | ||
38 | |||
39 | /* | ||
40 | * We don't actually have real ISA nor PCI buses, but there is so many | ||
41 | * drivers out there that might just work if we fake them... | ||
42 | */ | ||
43 | #define __io(a) __typesafe_io(a) | ||
44 | #define __mem_pci(a) (a) | ||
45 | |||
46 | #endif | ||
diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h index c6337645ba8a..901082def9bd 100644 --- a/arch/arm/mach-omap1/include/mach/memory.h +++ b/arch/arm/mach-omap1/include/mach/memory.h | |||
@@ -18,7 +18,8 @@ | |||
18 | * Note that the is_lbus_device() test is not very efficient on 1510 | 18 | * Note that the is_lbus_device() test is not very efficient on 1510 |
19 | * because of the strncmp(). | 19 | * because of the strncmp(). |
20 | */ | 20 | */ |
21 | #ifdef CONFIG_ARCH_OMAP15XX | 21 | #if defined(CONFIG_ARCH_OMAP15XX) && !defined(__ASSEMBLER__) |
22 | #include <plat/cpu.h> | ||
22 | 23 | ||
23 | /* | 24 | /* |
24 | * OMAP-1510 Local Bus address offset | 25 | * OMAP-1510 Local Bus address offset |
diff --git a/arch/arm/mach-omap1/include/mach/system.h b/arch/arm/mach-omap1/include/mach/system.h deleted file mode 100644 index a6c1b3a16dfc..000000000000 --- a/arch/arm/mach-omap1/include/mach/system.h +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-omap1/include/mach/system.h | ||
3 | */ | ||
4 | |||
5 | #include <plat/system.h> | ||
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index 8e55b6fb3478..56fb444a5f11 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c | |||
@@ -15,9 +15,12 @@ | |||
15 | 15 | ||
16 | #include <asm/tlb.h> | 16 | #include <asm/tlb.h> |
17 | #include <asm/mach/map.h> | 17 | #include <asm/mach/map.h> |
18 | |||
18 | #include <plat/mux.h> | 19 | #include <plat/mux.h> |
19 | #include <plat/tc.h> | 20 | #include <plat/tc.h> |
20 | 21 | ||
22 | #include "iomap.h" | ||
23 | #include "common.h" | ||
21 | #include "clock.h" | 24 | #include "clock.h" |
22 | 25 | ||
23 | extern void omap_check_revision(void); | 26 | extern void omap_check_revision(void); |
diff --git a/arch/arm/mach-omap1/iomap.h b/arch/arm/mach-omap1/iomap.h new file mode 100644 index 000000000000..d68175761c3d --- /dev/null +++ b/arch/arm/mach-omap1/iomap.h | |||
@@ -0,0 +1,42 @@ | |||
1 | /* | ||
2 | * IO mappings for OMAP1 | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms of the GNU General Public License as published by the | ||
6 | * Free Software Foundation; either version 2 of the License, or (at your | ||
7 | * option) any later version. | ||
8 | * | ||
9 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
10 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
11 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
12 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
13 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
14 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
15 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
16 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
17 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
18 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public License along | ||
21 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
22 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
23 | */ | ||
24 | |||
25 | #ifdef __ASSEMBLER__ | ||
26 | #define IOMEM(x) (x) | ||
27 | #else | ||
28 | #define IOMEM(x) ((void __force __iomem *)(x)) | ||
29 | #endif | ||
30 | |||
31 | #define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ | ||
32 | #define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET) | ||
33 | |||
34 | /* | ||
35 | * ---------------------------------------------------------------------------- | ||
36 | * Omap1 specific IO mapping | ||
37 | * ---------------------------------------------------------------------------- | ||
38 | */ | ||
39 | |||
40 | #define OMAP1_IO_PHYS 0xFFFB0000 | ||
41 | #define OMAP1_IO_SIZE 0x40000 | ||
42 | #define OMAP1_IO_VIRT (OMAP1_IO_PHYS - OMAP1_IO_OFFSET) | ||
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index e5b104b7fce6..4448114fab72 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c | |||
@@ -42,11 +42,13 @@ | |||
42 | #include <linux/interrupt.h> | 42 | #include <linux/interrupt.h> |
43 | #include <linux/io.h> | 43 | #include <linux/io.h> |
44 | 44 | ||
45 | #include <mach/hardware.h> | ||
46 | #include <asm/irq.h> | 45 | #include <asm/irq.h> |
47 | #include <asm/mach/irq.h> | 46 | #include <asm/mach/irq.h> |
47 | |||
48 | #include <plat/cpu.h> | 48 | #include <plat/cpu.h> |
49 | 49 | ||
50 | #include <mach/hardware.h> | ||
51 | |||
50 | #define IRQ_BANK(irq) ((irq) >> 5) | 52 | #define IRQ_BANK(irq) ((irq) >> 5) |
51 | #define IRQ_BIT(irq) ((irq) & 0x1f) | 53 | #define IRQ_BIT(irq) ((irq) & 0x1f) |
52 | 54 | ||
diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c index 453809359ba6..123a0df63d48 100644 --- a/arch/arm/mach-omap1/lcd_dma.c +++ b/arch/arm/mach-omap1/lcd_dma.c | |||
@@ -27,9 +27,10 @@ | |||
27 | #include <linux/interrupt.h> | 27 | #include <linux/interrupt.h> |
28 | #include <linux/io.h> | 28 | #include <linux/io.h> |
29 | 29 | ||
30 | #include <plat/dma.h> | ||
31 | |||
30 | #include <mach/hardware.h> | 32 | #include <mach/hardware.h> |
31 | #include <mach/lcdc.h> | 33 | #include <mach/lcdc.h> |
32 | #include <plat/dma.h> | ||
33 | 34 | ||
34 | int omap_lcd_dma_running(void) | 35 | int omap_lcd_dma_running(void) |
35 | { | 36 | { |
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index 91f9abbd3250..3082d60af082 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c | |||
@@ -19,12 +19,15 @@ | |||
19 | #include <linux/platform_device.h> | 19 | #include <linux/platform_device.h> |
20 | #include <linux/slab.h> | 20 | #include <linux/slab.h> |
21 | 21 | ||
22 | #include <mach/irqs.h> | ||
23 | #include <plat/dma.h> | 22 | #include <plat/dma.h> |
24 | #include <plat/mux.h> | 23 | #include <plat/mux.h> |
25 | #include <plat/cpu.h> | 24 | #include <plat/cpu.h> |
26 | #include <plat/mcbsp.h> | 25 | #include <plat/mcbsp.h> |
27 | 26 | ||
27 | #include <mach/irqs.h> | ||
28 | |||
29 | #include "iomap.h" | ||
30 | |||
28 | #define DPS_RSTCT2_PER_EN (1 << 0) | 31 | #define DPS_RSTCT2_PER_EN (1 << 0) |
29 | #define DSP_RSTCT2_WD_PER_EN (1 << 1) | 32 | #define DSP_RSTCT2_WD_PER_EN (1 << 1) |
30 | 33 | ||
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index 89ea20ca0ccc..306beaca14c5 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c | |||
@@ -42,14 +42,13 @@ | |||
42 | #include <linux/sysfs.h> | 42 | #include <linux/sysfs.h> |
43 | #include <linux/module.h> | 43 | #include <linux/module.h> |
44 | #include <linux/io.h> | 44 | #include <linux/io.h> |
45 | #include <linux/atomic.h> | ||
45 | 46 | ||
46 | #include <asm/irq.h> | 47 | #include <asm/irq.h> |
47 | #include <linux/atomic.h> | ||
48 | #include <asm/mach/time.h> | 48 | #include <asm/mach/time.h> |
49 | #include <asm/mach/irq.h> | 49 | #include <asm/mach/irq.h> |
50 | 50 | ||
51 | #include <plat/cpu.h> | 51 | #include <plat/cpu.h> |
52 | #include <mach/irqs.h> | ||
53 | #include <plat/clock.h> | 52 | #include <plat/clock.h> |
54 | #include <plat/sram.h> | 53 | #include <plat/sram.h> |
55 | #include <plat/tc.h> | 54 | #include <plat/tc.h> |
@@ -57,6 +56,9 @@ | |||
57 | #include <plat/dma.h> | 56 | #include <plat/dma.h> |
58 | #include <plat/dmtimer.h> | 57 | #include <plat/dmtimer.h> |
59 | 58 | ||
59 | #include <mach/irqs.h> | ||
60 | |||
61 | #include "iomap.h" | ||
60 | #include "pm.h" | 62 | #include "pm.h" |
61 | 63 | ||
62 | static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE]; | 64 | static unsigned int arm_sleep_save[ARM_SLEEP_SAVE_SIZE]; |
@@ -108,13 +110,7 @@ void omap1_pm_idle(void) | |||
108 | __u32 use_idlect1 = arm_idlect1_mask; | 110 | __u32 use_idlect1 = arm_idlect1_mask; |
109 | int do_sleep = 0; | 111 | int do_sleep = 0; |
110 | 112 | ||
111 | local_irq_disable(); | ||
112 | local_fiq_disable(); | 113 | local_fiq_disable(); |
113 | if (need_resched()) { | ||
114 | local_fiq_enable(); | ||
115 | local_irq_enable(); | ||
116 | return; | ||
117 | } | ||
118 | 114 | ||
119 | #if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER) | 115 | #if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER) |
120 | #warning Enable 32kHz OS timer in order to allow sleep states in idle | 116 | #warning Enable 32kHz OS timer in order to allow sleep states in idle |
@@ -157,14 +153,12 @@ void omap1_pm_idle(void) | |||
157 | omap_writel(saved_idlect1, ARM_IDLECT1); | 153 | omap_writel(saved_idlect1, ARM_IDLECT1); |
158 | 154 | ||
159 | local_fiq_enable(); | 155 | local_fiq_enable(); |
160 | local_irq_enable(); | ||
161 | return; | 156 | return; |
162 | } | 157 | } |
163 | omap_sram_suspend(omap_readl(ARM_IDLECT1), | 158 | omap_sram_suspend(omap_readl(ARM_IDLECT1), |
164 | omap_readl(ARM_IDLECT2)); | 159 | omap_readl(ARM_IDLECT2)); |
165 | 160 | ||
166 | local_fiq_enable(); | 161 | local_fiq_enable(); |
167 | local_irq_enable(); | ||
168 | } | 162 | } |
169 | 163 | ||
170 | /* | 164 | /* |
@@ -583,8 +577,6 @@ static void omap_pm_init_proc(void) | |||
583 | 577 | ||
584 | #endif /* DEBUG && CONFIG_PROC_FS */ | 578 | #endif /* DEBUG && CONFIG_PROC_FS */ |
585 | 579 | ||
586 | static void (*saved_idle)(void) = NULL; | ||
587 | |||
588 | /* | 580 | /* |
589 | * omap_pm_prepare - Do preliminary suspend work. | 581 | * omap_pm_prepare - Do preliminary suspend work. |
590 | * | 582 | * |
@@ -592,8 +584,7 @@ static void (*saved_idle)(void) = NULL; | |||
592 | static int omap_pm_prepare(void) | 584 | static int omap_pm_prepare(void) |
593 | { | 585 | { |
594 | /* We cannot sleep in idle until we have resumed */ | 586 | /* We cannot sleep in idle until we have resumed */ |
595 | saved_idle = pm_idle; | 587 | disable_hlt(); |
596 | pm_idle = NULL; | ||
597 | 588 | ||
598 | return 0; | 589 | return 0; |
599 | } | 590 | } |
@@ -630,7 +621,7 @@ static int omap_pm_enter(suspend_state_t state) | |||
630 | 621 | ||
631 | static void omap_pm_finish(void) | 622 | static void omap_pm_finish(void) |
632 | { | 623 | { |
633 | pm_idle = saved_idle; | 624 | enable_hlt(); |
634 | } | 625 | } |
635 | 626 | ||
636 | 627 | ||
@@ -687,7 +678,7 @@ static int __init omap_pm_init(void) | |||
687 | return -ENODEV; | 678 | return -ENODEV; |
688 | } | 679 | } |
689 | 680 | ||
690 | pm_idle = omap1_pm_idle; | 681 | arm_pm_idle = omap1_pm_idle; |
691 | 682 | ||
692 | if (cpu_is_omap7xx()) | 683 | if (cpu_is_omap7xx()) |
693 | setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq); | 684 | setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq); |
diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c index 91d199b64979..f255b153b863 100644 --- a/arch/arm/mach-omap1/reset.c +++ b/arch/arm/mach-omap1/reset.c | |||
@@ -4,9 +4,10 @@ | |||
4 | #include <linux/kernel.h> | 4 | #include <linux/kernel.h> |
5 | #include <linux/io.h> | 5 | #include <linux/io.h> |
6 | 6 | ||
7 | #include <mach/hardware.h> | ||
8 | #include <plat/prcm.h> | 7 | #include <plat/prcm.h> |
9 | 8 | ||
9 | #include <mach/hardware.h> | ||
10 | |||
10 | void omap1_restart(char mode, const char *cmd) | 11 | void omap1_restart(char mode, const char *cmd) |
11 | { | 12 | { |
12 | /* | 13 | /* |
diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S index c875bdc902c5..0779db150da7 100644 --- a/arch/arm/mach-omap1/sleep.S +++ b/arch/arm/mach-omap1/sleep.S | |||
@@ -33,8 +33,12 @@ | |||
33 | */ | 33 | */ |
34 | 34 | ||
35 | #include <linux/linkage.h> | 35 | #include <linux/linkage.h> |
36 | |||
36 | #include <asm/assembler.h> | 37 | #include <asm/assembler.h> |
38 | |||
37 | #include <mach/io.h> | 39 | #include <mach/io.h> |
40 | |||
41 | #include "iomap.h" | ||
38 | #include "pm.h" | 42 | #include "pm.h" |
39 | 43 | ||
40 | .text | 44 | .text |
diff --git a/arch/arm/mach-omap1/sram.S b/arch/arm/mach-omap1/sram.S index 692587d07ea5..2ce0b9ab20e5 100644 --- a/arch/arm/mach-omap1/sram.S +++ b/arch/arm/mach-omap1/sram.S | |||
@@ -9,10 +9,14 @@ | |||
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <linux/linkage.h> | 11 | #include <linux/linkage.h> |
12 | |||
12 | #include <asm/assembler.h> | 13 | #include <asm/assembler.h> |
14 | |||
13 | #include <mach/io.h> | 15 | #include <mach/io.h> |
14 | #include <mach/hardware.h> | 16 | #include <mach/hardware.h> |
15 | 17 | ||
18 | #include "iomap.h" | ||
19 | |||
16 | .text | 20 | .text |
17 | 21 | ||
18 | /* | 22 | /* |
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c index b8faffa44f9e..2fae6a2740f1 100644 --- a/arch/arm/mach-omap1/time.c +++ b/arch/arm/mach-omap1/time.c | |||
@@ -45,14 +45,15 @@ | |||
45 | #include <linux/io.h> | 45 | #include <linux/io.h> |
46 | 46 | ||
47 | #include <asm/system.h> | 47 | #include <asm/system.h> |
48 | #include <mach/hardware.h> | ||
49 | #include <asm/leds.h> | 48 | #include <asm/leds.h> |
50 | #include <asm/irq.h> | 49 | #include <asm/irq.h> |
51 | #include <asm/sched_clock.h> | 50 | #include <asm/sched_clock.h> |
52 | 51 | ||
52 | #include <mach/hardware.h> | ||
53 | #include <asm/mach/irq.h> | 53 | #include <asm/mach/irq.h> |
54 | #include <asm/mach/time.h> | 54 | #include <asm/mach/time.h> |
55 | 55 | ||
56 | #include "iomap.h" | ||
56 | #include "common.h" | 57 | #include "common.h" |
57 | 58 | ||
58 | #ifdef CONFIG_OMAP_MPU_TIMER | 59 | #ifdef CONFIG_OMAP_MPU_TIMER |
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c index 9a54ef4dcf5e..a2e6d0709df2 100644 --- a/arch/arm/mach-omap1/timer32k.c +++ b/arch/arm/mach-omap1/timer32k.c | |||
@@ -47,14 +47,17 @@ | |||
47 | #include <linux/io.h> | 47 | #include <linux/io.h> |
48 | 48 | ||
49 | #include <asm/system.h> | 49 | #include <asm/system.h> |
50 | #include <mach/hardware.h> | ||
51 | #include <asm/leds.h> | 50 | #include <asm/leds.h> |
52 | #include <asm/irq.h> | 51 | #include <asm/irq.h> |
53 | #include <asm/mach/irq.h> | 52 | #include <asm/mach/irq.h> |
54 | #include <asm/mach/time.h> | 53 | #include <asm/mach/time.h> |
55 | #include "common.h" | 54 | |
56 | #include <plat/dmtimer.h> | 55 | #include <plat/dmtimer.h> |
57 | 56 | ||
57 | #include <mach/hardware.h> | ||
58 | |||
59 | #include "common.h" | ||
60 | |||
58 | /* | 61 | /* |
59 | * --------------------------------------------------------------------------- | 62 | * --------------------------------------------------------------------------- |
60 | * 32KHz OS timer | 63 | * 32KHz OS timer |
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 7370983f809f..c8bda62900d8 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c | |||
@@ -279,7 +279,7 @@ static void __init omap_2430sdp_init(void) | |||
279 | platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices)); | 279 | platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices)); |
280 | omap_serial_init(); | 280 | omap_serial_init(); |
281 | omap_sdrc_init(NULL, NULL); | 281 | omap_sdrc_init(NULL, NULL); |
282 | omap2_hsmmc_init(mmc); | 282 | omap_hsmmc_init(mmc); |
283 | omap2_usbfs_init(&sdp2430_usb_config); | 283 | omap2_usbfs_init(&sdp2430_usb_config); |
284 | 284 | ||
285 | omap_mux_init_signal("usb0hs_stp", OMAP_PULL_ENA | OMAP_PULL_UP); | 285 | omap_mux_init_signal("usb0hs_stp", OMAP_PULL_ENA | OMAP_PULL_UP); |
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index 383717ba63b9..da75f239873e 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c | |||
@@ -232,11 +232,13 @@ static struct omap2_hsmmc_info mmc[] = { | |||
232 | */ | 232 | */ |
233 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, | 233 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, |
234 | .gpio_wp = 4, | 234 | .gpio_wp = 4, |
235 | .deferred = true, | ||
235 | }, | 236 | }, |
236 | { | 237 | { |
237 | .mmc = 2, | 238 | .mmc = 2, |
238 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, | 239 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, |
239 | .gpio_wp = 7, | 240 | .gpio_wp = 7, |
241 | .deferred = true, | ||
240 | }, | 242 | }, |
241 | {} /* Terminator */ | 243 | {} /* Terminator */ |
242 | }; | 244 | }; |
@@ -249,7 +251,7 @@ static int sdp3430_twl_gpio_setup(struct device *dev, | |||
249 | */ | 251 | */ |
250 | mmc[0].gpio_cd = gpio + 0; | 252 | mmc[0].gpio_cd = gpio + 0; |
251 | mmc[1].gpio_cd = gpio + 1; | 253 | mmc[1].gpio_cd = gpio + 1; |
252 | omap2_hsmmc_init(mmc); | 254 | omap_hsmmc_late_init(mmc); |
253 | 255 | ||
254 | /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */ | 256 | /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */ |
255 | gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl"); | 257 | gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl"); |
@@ -606,6 +608,7 @@ static void __init omap_3430sdp_init(void) | |||
606 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); | 608 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
607 | omap_board_config = sdp3430_config; | 609 | omap_board_config = sdp3430_config; |
608 | omap_board_config_size = ARRAY_SIZE(sdp3430_config); | 610 | omap_board_config_size = ARRAY_SIZE(sdp3430_config); |
611 | omap_hsmmc_init(mmc); | ||
609 | omap3430_i2c_init(); | 612 | omap3430_i2c_init(); |
610 | omap_display_init(&sdp3430_dss_data); | 613 | omap_display_init(&sdp3430_dss_data); |
611 | if (omap_rev() > OMAP3430_REV_ES1_0) | 614 | if (omap_rev() > OMAP3430_REV_ES1_0) |
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 4e9071589bfb..09ae257e86fd 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c | |||
@@ -491,9 +491,9 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers) | |||
491 | { | 491 | { |
492 | struct omap2_hsmmc_info *c; | 492 | struct omap2_hsmmc_info *c; |
493 | 493 | ||
494 | omap2_hsmmc_init(controllers); | 494 | omap_hsmmc_init(controllers); |
495 | for (c = controllers; c->mmc; c++) | 495 | for (c = controllers; c->mmc; c++) |
496 | omap4_twl6030_hsmmc_set_late_init(c->dev); | 496 | omap4_twl6030_hsmmc_set_late_init(&c->pdev->dev); |
497 | 497 | ||
498 | return 0; | 498 | return 0; |
499 | } | 499 | } |
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index 4b1cfe32e6ba..71138a1271d8 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c | |||
@@ -504,7 +504,7 @@ static void __init am3517_evm_init(void) | |||
504 | am3517_evm_musb_init(); | 504 | am3517_evm_musb_init(); |
505 | 505 | ||
506 | /* MMC init function */ | 506 | /* MMC init function */ |
507 | omap2_hsmmc_init(mmc); | 507 | omap_hsmmc_init(mmc); |
508 | } | 508 | } |
509 | 509 | ||
510 | MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") | 510 | MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") |
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index d73316ed4207..41b0a2fe0b04 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c | |||
@@ -280,7 +280,6 @@ static struct omap_dss_board_info cm_t35_dss_data = { | |||
280 | 280 | ||
281 | static struct omap2_mcspi_device_config tdo24m_mcspi_config = { | 281 | static struct omap2_mcspi_device_config tdo24m_mcspi_config = { |
282 | .turbo_mode = 0, | 282 | .turbo_mode = 0, |
283 | .single_channel = 1, /* 0: slave, 1: master */ | ||
284 | }; | 283 | }; |
285 | 284 | ||
286 | static struct tdo24m_platform_data tdo24m_config = { | 285 | static struct tdo24m_platform_data tdo24m_config = { |
@@ -413,7 +412,7 @@ static struct omap2_hsmmc_info mmc[] = { | |||
413 | .caps = MMC_CAP_4_BIT_DATA, | 412 | .caps = MMC_CAP_4_BIT_DATA, |
414 | .gpio_cd = -EINVAL, | 413 | .gpio_cd = -EINVAL, |
415 | .gpio_wp = -EINVAL, | 414 | .gpio_wp = -EINVAL, |
416 | 415 | .deferred = true, | |
417 | }, | 416 | }, |
418 | { | 417 | { |
419 | .mmc = 2, | 418 | .mmc = 2, |
@@ -471,7 +470,7 @@ static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio, | |||
471 | 470 | ||
472 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | 471 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ |
473 | mmc[0].gpio_cd = gpio + 0; | 472 | mmc[0].gpio_cd = gpio + 0; |
474 | omap2_hsmmc_init(mmc); | 473 | omap_hsmmc_late_init(mmc); |
475 | 474 | ||
476 | return 0; | 475 | return 0; |
477 | } | 476 | } |
@@ -639,6 +638,7 @@ static void __init cm_t3x_common_init(void) | |||
639 | omap_serial_init(); | 638 | omap_serial_init(); |
640 | omap_sdrc_init(mt46h32m32lf6_sdrc_params, | 639 | omap_sdrc_init(mt46h32m32lf6_sdrc_params, |
641 | mt46h32m32lf6_sdrc_params); | 640 | mt46h32m32lf6_sdrc_params); |
641 | omap_hsmmc_init(mmc); | ||
642 | cm_t35_init_i2c(); | 642 | cm_t35_init_i2c(); |
643 | omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL); | 643 | omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL); |
644 | cm_t35_init_ethernet(); | 644 | cm_t35_init_ethernet(); |
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index e873063f4fda..11cd2a806093 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c | |||
@@ -100,6 +100,7 @@ static struct omap2_hsmmc_info mmc[] = { | |||
100 | .mmc = 1, | 100 | .mmc = 1, |
101 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, | 101 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, |
102 | .gpio_wp = 29, | 102 | .gpio_wp = 29, |
103 | .deferred = true, | ||
103 | }, | 104 | }, |
104 | {} /* Terminator */ | 105 | {} /* Terminator */ |
105 | }; | 106 | }; |
@@ -228,7 +229,7 @@ static int devkit8000_twl_gpio_setup(struct device *dev, | |||
228 | 229 | ||
229 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | 230 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ |
230 | mmc[0].gpio_cd = gpio + 0; | 231 | mmc[0].gpio_cd = gpio + 0; |
231 | omap2_hsmmc_init(mmc); | 232 | omap_hsmmc_late_init(mmc); |
232 | 233 | ||
233 | /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ | 234 | /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ |
234 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; | 235 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; |
@@ -636,6 +637,7 @@ static void __init devkit8000_init(void) | |||
636 | 637 | ||
637 | omap_dm9000_init(); | 638 | omap_dm9000_init(); |
638 | 639 | ||
640 | omap_hsmmc_init(mmc); | ||
639 | devkit8000_i2c_init(); | 641 | devkit8000_i2c_init(); |
640 | platform_add_devices(devkit8000_devices, | 642 | platform_add_devices(devkit8000_devices, |
641 | ARRAY_SIZE(devkit8000_devices)); | 643 | ARRAY_SIZE(devkit8000_devices)); |
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c index 30a6f527510c..0349fd2b68d8 100644 --- a/arch/arm/mach-omap2/board-flash.c +++ b/arch/arm/mach-omap2/board-flash.c | |||
@@ -189,7 +189,7 @@ unmap: | |||
189 | * | 189 | * |
190 | * @return - void. | 190 | * @return - void. |
191 | */ | 191 | */ |
192 | void board_flash_init(struct flash_partitions partition_info[], | 192 | void __init board_flash_init(struct flash_partitions partition_info[], |
193 | char chip_sel_board[][GPMC_CS_NUM], int nand_type) | 193 | char chip_sel_board[][GPMC_CS_NUM], int nand_type) |
194 | { | 194 | { |
195 | u8 cs = 0; | 195 | u8 cs = 0; |
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index a59ace0ed560..e558800adfdf 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c | |||
@@ -295,6 +295,7 @@ static struct omap2_hsmmc_info mmc[] = { | |||
295 | .caps = MMC_CAP_4_BIT_DATA, | 295 | .caps = MMC_CAP_4_BIT_DATA, |
296 | .gpio_cd = -EINVAL, | 296 | .gpio_cd = -EINVAL, |
297 | .gpio_wp = -EINVAL, | 297 | .gpio_wp = -EINVAL, |
298 | .deferred = true, | ||
298 | }, | 299 | }, |
299 | #if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE) | 300 | #if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE) |
300 | { | 301 | { |
@@ -402,7 +403,7 @@ static int igep_twl_gpio_setup(struct device *dev, | |||
402 | 403 | ||
403 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | 404 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ |
404 | mmc[0].gpio_cd = gpio + 0; | 405 | mmc[0].gpio_cd = gpio + 0; |
405 | omap2_hsmmc_init(mmc); | 406 | omap_hsmmc_late_init(mmc); |
406 | 407 | ||
407 | /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */ | 408 | /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */ |
408 | #if !defined(CONFIG_LEDS_GPIO) && !defined(CONFIG_LEDS_GPIO_MODULE) | 409 | #if !defined(CONFIG_LEDS_GPIO) && !defined(CONFIG_LEDS_GPIO_MODULE) |
@@ -639,6 +640,9 @@ static void __init igep_init(void) | |||
639 | 640 | ||
640 | /* Get IGEP2 hardware revision */ | 641 | /* Get IGEP2 hardware revision */ |
641 | igep2_get_revision(); | 642 | igep2_get_revision(); |
643 | |||
644 | omap_hsmmc_init(mmc); | ||
645 | |||
642 | /* Register I2C busses and drivers */ | 646 | /* Register I2C busses and drivers */ |
643 | igep_i2c_init(); | 647 | igep_i2c_init(); |
644 | platform_add_devices(igep_devices, ARRAY_SIZE(igep_devices)); | 648 | platform_add_devices(igep_devices, ARRAY_SIZE(igep_devices)); |
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index 2d2a61f7dcbf..b5bc9b2e2862 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c | |||
@@ -424,7 +424,7 @@ static void __init omap_ldp_init(void) | |||
424 | board_nand_init(ldp_nand_partitions, | 424 | board_nand_init(ldp_nand_partitions, |
425 | ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0); | 425 | ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0); |
426 | 426 | ||
427 | omap2_hsmmc_init(mmc); | 427 | omap_hsmmc_init(mmc); |
428 | ldp_display_init(); | 428 | ldp_display_init(); |
429 | } | 429 | } |
430 | 430 | ||
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index 42a4d11fad23..7ed4a7ba8bc5 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c | |||
@@ -137,7 +137,6 @@ static void __init n8x0_usb_init(void) {} | |||
137 | 137 | ||
138 | static struct omap2_mcspi_device_config p54spi_mcspi_config = { | 138 | static struct omap2_mcspi_device_config p54spi_mcspi_config = { |
139 | .turbo_mode = 0, | 139 | .turbo_mode = 0, |
140 | .single_channel = 1, | ||
141 | }; | 140 | }; |
142 | 141 | ||
143 | static struct spi_board_info n800_spi_board_info[] __initdata = { | 142 | static struct spi_board_info n800_spi_board_info[] __initdata = { |
@@ -371,7 +370,11 @@ static void n8x0_mmc_callback(void *data, u8 card_mask) | |||
371 | else | 370 | else |
372 | *openp = 0; | 371 | *openp = 0; |
373 | 372 | ||
373 | #ifdef CONFIG_MMC_OMAP | ||
374 | omap_mmc_notify_cover_event(mmc_device, index, *openp); | 374 | omap_mmc_notify_cover_event(mmc_device, index, *openp); |
375 | #else | ||
376 | pr_warn("MMC: notify cover event not available\n"); | ||
377 | #endif | ||
375 | } | 378 | } |
376 | 379 | ||
377 | static int n8x0_mmc_late_init(struct device *dev) | 380 | static int n8x0_mmc_late_init(struct device *dev) |
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 7ffcd2839e7b..7be8d659d91d 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c | |||
@@ -253,6 +253,7 @@ static struct omap2_hsmmc_info mmc[] = { | |||
253 | .mmc = 1, | 253 | .mmc = 1, |
254 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, | 254 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, |
255 | .gpio_wp = -EINVAL, | 255 | .gpio_wp = -EINVAL, |
256 | .deferred = true, | ||
256 | }, | 257 | }, |
257 | {} /* Terminator */ | 258 | {} /* Terminator */ |
258 | }; | 259 | }; |
@@ -272,12 +273,10 @@ static int beagle_twl_gpio_setup(struct device *dev, | |||
272 | { | 273 | { |
273 | int r; | 274 | int r; |
274 | 275 | ||
275 | if (beagle_config.mmc1_gpio_wp != -EINVAL) | ||
276 | omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT); | ||
277 | mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp; | 276 | mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp; |
278 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | 277 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ |
279 | mmc[0].gpio_cd = gpio + 0; | 278 | mmc[0].gpio_cd = gpio + 0; |
280 | omap2_hsmmc_init(mmc); | 279 | omap_hsmmc_late_init(mmc); |
281 | 280 | ||
282 | /* | 281 | /* |
283 | * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active | 282 | * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active |
@@ -521,6 +520,11 @@ static void __init omap3_beagle_init(void) | |||
521 | { | 520 | { |
522 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); | 521 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
523 | omap3_beagle_init_rev(); | 522 | omap3_beagle_init_rev(); |
523 | |||
524 | if (beagle_config.mmc1_gpio_wp != -EINVAL) | ||
525 | omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT); | ||
526 | omap_hsmmc_init(mmc); | ||
527 | |||
524 | omap3_beagle_i2c_init(); | 528 | omap3_beagle_i2c_init(); |
525 | 529 | ||
526 | gpio_buttons[0].gpio = beagle_config.usr_button_gpio; | 530 | gpio_buttons[0].gpio = beagle_config.usr_button_gpio; |
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index c775bead1497..6b77ad95981d 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c | |||
@@ -317,6 +317,7 @@ static struct omap2_hsmmc_info mmc[] = { | |||
317 | .caps = MMC_CAP_4_BIT_DATA, | 317 | .caps = MMC_CAP_4_BIT_DATA, |
318 | .gpio_cd = -EINVAL, | 318 | .gpio_cd = -EINVAL, |
319 | .gpio_wp = 63, | 319 | .gpio_wp = 63, |
320 | .deferred = true, | ||
320 | }, | 321 | }, |
321 | #ifdef CONFIG_WL12XX_PLATFORM_DATA | 322 | #ifdef CONFIG_WL12XX_PLATFORM_DATA |
322 | { | 323 | { |
@@ -361,9 +362,8 @@ static int omap3evm_twl_gpio_setup(struct device *dev, | |||
361 | int r, lcd_bl_en; | 362 | int r, lcd_bl_en; |
362 | 363 | ||
363 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | 364 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ |
364 | omap_mux_init_gpio(63, OMAP_PIN_INPUT); | ||
365 | mmc[0].gpio_cd = gpio + 0; | 365 | mmc[0].gpio_cd = gpio + 0; |
366 | omap2_hsmmc_init(mmc); | 366 | omap_hsmmc_late_init(mmc); |
367 | 367 | ||
368 | /* | 368 | /* |
369 | * Most GPIOs are for USB OTG. Some are mostly sent to | 369 | * Most GPIOs are for USB OTG. Some are mostly sent to |
@@ -644,6 +644,9 @@ static void __init omap3_evm_init(void) | |||
644 | omap_board_config = omap3_evm_config; | 644 | omap_board_config = omap3_evm_config; |
645 | omap_board_config_size = ARRAY_SIZE(omap3_evm_config); | 645 | omap_board_config_size = ARRAY_SIZE(omap3_evm_config); |
646 | 646 | ||
647 | omap_mux_init_gpio(63, OMAP_PIN_INPUT); | ||
648 | omap_hsmmc_init(mmc); | ||
649 | |||
647 | omap3_evm_i2c_init(); | 650 | omap3_evm_i2c_init(); |
648 | 651 | ||
649 | omap_display_init(&omap3_evm_dss_data); | 652 | omap_display_init(&omap3_evm_dss_data); |
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c index 4198dd017d8f..2304ba340e99 100644 --- a/arch/arm/mach-omap2/board-omap3logic.c +++ b/arch/arm/mach-omap2/board-omap3logic.c | |||
@@ -128,7 +128,7 @@ static void __init board_mmc_init(void) | |||
128 | return; | 128 | return; |
129 | } | 129 | } |
130 | 130 | ||
131 | omap2_hsmmc_init(board_mmc_info); | 131 | omap_hsmmc_init(board_mmc_info); |
132 | } | 132 | } |
133 | 133 | ||
134 | static struct omap_smsc911x_platform_data __initdata board_smsc911x_data = { | 134 | static struct omap_smsc911x_platform_data __initdata board_smsc911x_data = { |
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 1644b73017fc..ace466bcd76d 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c | |||
@@ -273,6 +273,7 @@ static struct omap2_hsmmc_info omap3pandora_mmc[] = { | |||
273 | .gpio_cd = -EINVAL, | 273 | .gpio_cd = -EINVAL, |
274 | .gpio_wp = 126, | 274 | .gpio_wp = 126, |
275 | .ext_clock = 0, | 275 | .ext_clock = 0, |
276 | .deferred = true, | ||
276 | }, | 277 | }, |
277 | { | 278 | { |
278 | .mmc = 2, | 279 | .mmc = 2, |
@@ -281,6 +282,7 @@ static struct omap2_hsmmc_info omap3pandora_mmc[] = { | |||
281 | .gpio_wp = 127, | 282 | .gpio_wp = 127, |
282 | .ext_clock = 1, | 283 | .ext_clock = 1, |
283 | .transceiver = true, | 284 | .transceiver = true, |
285 | .deferred = true, | ||
284 | }, | 286 | }, |
285 | { | 287 | { |
286 | .mmc = 3, | 288 | .mmc = 3, |
@@ -300,7 +302,7 @@ static int omap3pandora_twl_gpio_setup(struct device *dev, | |||
300 | /* gpio + {0,1} is "mmc{0,1}_cd" (input/IRQ) */ | 302 | /* gpio + {0,1} is "mmc{0,1}_cd" (input/IRQ) */ |
301 | omap3pandora_mmc[0].gpio_cd = gpio + 0; | 303 | omap3pandora_mmc[0].gpio_cd = gpio + 0; |
302 | omap3pandora_mmc[1].gpio_cd = gpio + 1; | 304 | omap3pandora_mmc[1].gpio_cd = gpio + 1; |
303 | omap2_hsmmc_init(omap3pandora_mmc); | 305 | omap_hsmmc_late_init(omap3pandora_mmc); |
304 | 306 | ||
305 | /* gpio + 13 drives 32kHz buffer for wifi module */ | 307 | /* gpio + 13 drives 32kHz buffer for wifi module */ |
306 | gpio_32khz = gpio + 13; | 308 | gpio_32khz = gpio + 13; |
@@ -580,6 +582,7 @@ static struct omap_board_mux board_mux[] __initdata = { | |||
580 | static void __init omap3pandora_init(void) | 582 | static void __init omap3pandora_init(void) |
581 | { | 583 | { |
582 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); | 584 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
585 | omap_hsmmc_init(omap3pandora_mmc); | ||
583 | omap3pandora_i2c_init(); | 586 | omap3pandora_i2c_init(); |
584 | pandora_wl1251_init(); | 587 | pandora_wl1251_init(); |
585 | platform_add_devices(omap3pandora_devices, | 588 | platform_add_devices(omap3pandora_devices, |
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index cb089a46f62f..641004380795 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c | |||
@@ -209,10 +209,11 @@ static struct regulator_init_data omap3stalker_vsim = { | |||
209 | 209 | ||
210 | static struct omap2_hsmmc_info mmc[] = { | 210 | static struct omap2_hsmmc_info mmc[] = { |
211 | { | 211 | { |
212 | .mmc = 1, | 212 | .mmc = 1, |
213 | .caps = MMC_CAP_4_BIT_DATA, | 213 | .caps = MMC_CAP_4_BIT_DATA, |
214 | .gpio_cd = -EINVAL, | 214 | .gpio_cd = -EINVAL, |
215 | .gpio_wp = 23, | 215 | .gpio_wp = 23, |
216 | .deferred = true, | ||
216 | }, | 217 | }, |
217 | {} /* Terminator */ | 218 | {} /* Terminator */ |
218 | }; | 219 | }; |
@@ -282,9 +283,8 @@ omap3stalker_twl_gpio_setup(struct device *dev, | |||
282 | unsigned gpio, unsigned ngpio) | 283 | unsigned gpio, unsigned ngpio) |
283 | { | 284 | { |
284 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | 285 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ |
285 | omap_mux_init_gpio(23, OMAP_PIN_INPUT); | ||
286 | mmc[0].gpio_cd = gpio + 0; | 286 | mmc[0].gpio_cd = gpio + 0; |
287 | omap2_hsmmc_init(mmc); | 287 | omap_hsmmc_late_init(mmc); |
288 | 288 | ||
289 | /* | 289 | /* |
290 | * Most GPIOs are for USB OTG. Some are mostly sent to | 290 | * Most GPIOs are for USB OTG. Some are mostly sent to |
@@ -425,6 +425,9 @@ static void __init omap3_stalker_init(void) | |||
425 | omap_board_config = omap3_stalker_config; | 425 | omap_board_config = omap3_stalker_config; |
426 | omap_board_config_size = ARRAY_SIZE(omap3_stalker_config); | 426 | omap_board_config_size = ARRAY_SIZE(omap3_stalker_config); |
427 | 427 | ||
428 | omap_mux_init_gpio(23, OMAP_PIN_INPUT); | ||
429 | omap_hsmmc_init(mmc); | ||
430 | |||
428 | omap3_stalker_i2c_init(); | 431 | omap3_stalker_i2c_init(); |
429 | 432 | ||
430 | platform_add_devices(omap3_stalker_devices, | 433 | platform_add_devices(omap3_stalker_devices, |
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index a0b851aafcca..8842e04aef01 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c | |||
@@ -100,6 +100,7 @@ static struct omap2_hsmmc_info mmc[] = { | |||
100 | .mmc = 1, | 100 | .mmc = 1, |
101 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, | 101 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, |
102 | .gpio_wp = 29, | 102 | .gpio_wp = 29, |
103 | .deferred = true, | ||
103 | }, | 104 | }, |
104 | {} /* Terminator */ | 105 | {} /* Terminator */ |
105 | }; | 106 | }; |
@@ -117,15 +118,9 @@ static struct gpio_led gpio_leds[]; | |||
117 | static int touchbook_twl_gpio_setup(struct device *dev, | 118 | static int touchbook_twl_gpio_setup(struct device *dev, |
118 | unsigned gpio, unsigned ngpio) | 119 | unsigned gpio, unsigned ngpio) |
119 | { | 120 | { |
120 | if (system_rev >= 0x20 && system_rev <= 0x34301000) { | ||
121 | omap_mux_init_gpio(23, OMAP_PIN_INPUT); | ||
122 | mmc[0].gpio_wp = 23; | ||
123 | } else { | ||
124 | omap_mux_init_gpio(29, OMAP_PIN_INPUT); | ||
125 | } | ||
126 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | 121 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ |
127 | mmc[0].gpio_cd = gpio + 0; | 122 | mmc[0].gpio_cd = gpio + 0; |
128 | omap2_hsmmc_init(mmc); | 123 | omap_hsmmc_late_init(mmc); |
129 | 124 | ||
130 | /* REVISIT: need ehci-omap hooks for external VBUS | 125 | /* REVISIT: need ehci-omap hooks for external VBUS |
131 | * power switch and overcurrent detect | 126 | * power switch and overcurrent detect |
@@ -351,6 +346,14 @@ static void __init omap3_touchbook_init(void) | |||
351 | 346 | ||
352 | pm_power_off = omap3_touchbook_poweroff; | 347 | pm_power_off = omap3_touchbook_poweroff; |
353 | 348 | ||
349 | if (system_rev >= 0x20 && system_rev <= 0x34301000) { | ||
350 | omap_mux_init_gpio(23, OMAP_PIN_INPUT); | ||
351 | mmc[0].gpio_wp = 23; | ||
352 | } else { | ||
353 | omap_mux_init_gpio(29, OMAP_PIN_INPUT); | ||
354 | } | ||
355 | omap_hsmmc_init(mmc); | ||
356 | |||
354 | omap3_touchbook_i2c_init(); | 357 | omap3_touchbook_i2c_init(); |
355 | platform_add_devices(omap3_touchbook_devices, | 358 | platform_add_devices(omap3_touchbook_devices, |
356 | ARRAY_SIZE(omap3_touchbook_devices)); | 359 | ARRAY_SIZE(omap3_touchbook_devices)); |
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index 28fc271f7031..7ca7a5c474d4 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c | |||
@@ -245,9 +245,9 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers) | |||
245 | { | 245 | { |
246 | struct omap2_hsmmc_info *c; | 246 | struct omap2_hsmmc_info *c; |
247 | 247 | ||
248 | omap2_hsmmc_init(controllers); | 248 | omap_hsmmc_init(controllers); |
249 | for (c = controllers; c->mmc; c++) | 249 | for (c = controllers; c->mmc; c++) |
250 | omap4_twl6030_hsmmc_set_late_init(c->dev); | 250 | omap4_twl6030_hsmmc_set_late_init(&c->pdev->dev); |
251 | 251 | ||
252 | return 0; | 252 | return 0; |
253 | } | 253 | } |
@@ -461,7 +461,7 @@ static struct omap_dss_board_info omap4_panda_dss_data = { | |||
461 | .default_device = &omap4_panda_dvi_device, | 461 | .default_device = &omap4_panda_dvi_device, |
462 | }; | 462 | }; |
463 | 463 | ||
464 | void omap4_panda_display_init(void) | 464 | void __init omap4_panda_display_init(void) |
465 | { | 465 | { |
466 | int r; | 466 | int r; |
467 | 467 | ||
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index 52c0cef77165..668533e2a379 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c | |||
@@ -407,8 +407,6 @@ static inline void __init overo_init_keys(void) { return; } | |||
407 | static int overo_twl_gpio_setup(struct device *dev, | 407 | static int overo_twl_gpio_setup(struct device *dev, |
408 | unsigned gpio, unsigned ngpio) | 408 | unsigned gpio, unsigned ngpio) |
409 | { | 409 | { |
410 | omap2_hsmmc_init(mmc); | ||
411 | |||
412 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | 410 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) |
413 | /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ | 411 | /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ |
414 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; | 412 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; |
@@ -505,6 +503,7 @@ static void __init overo_init(void) | |||
505 | int ret; | 503 | int ret; |
506 | 504 | ||
507 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); | 505 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
506 | omap_hsmmc_init(mmc); | ||
508 | overo_i2c_init(); | 507 | overo_i2c_init(); |
509 | omap_display_init(&overo_dss_data); | 508 | omap_display_init(&overo_dss_data); |
510 | omap_serial_init(); | 509 | omap_serial_init(); |
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c index 8678b386c6a2..2d24c98f3d45 100644 --- a/arch/arm/mach-omap2/board-rm680.c +++ b/arch/arm/mach-omap2/board-rm680.c | |||
@@ -120,7 +120,7 @@ static void __init rm680_peripherals_init(void) | |||
120 | ARRAY_SIZE(rm680_peripherals_devices)); | 120 | ARRAY_SIZE(rm680_peripherals_devices)); |
121 | rm680_i2c_init(); | 121 | rm680_i2c_init(); |
122 | gpmc_onenand_init(board_onenand_data); | 122 | gpmc_onenand_init(board_onenand_data); |
123 | omap2_hsmmc_init(mmc); | 123 | omap_hsmmc_init(mmc); |
124 | } | 124 | } |
125 | 125 | ||
126 | #ifdef CONFIG_OMAP_MUX | 126 | #ifdef CONFIG_OMAP_MUX |
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index acb4e77b39ef..0f65c3b202ac 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c | |||
@@ -138,17 +138,14 @@ static struct lp5523_platform_data rx51_lp5523_platform_data = { | |||
138 | 138 | ||
139 | static struct omap2_mcspi_device_config wl1251_mcspi_config = { | 139 | static struct omap2_mcspi_device_config wl1251_mcspi_config = { |
140 | .turbo_mode = 0, | 140 | .turbo_mode = 0, |
141 | .single_channel = 1, | ||
142 | }; | 141 | }; |
143 | 142 | ||
144 | static struct omap2_mcspi_device_config mipid_mcspi_config = { | 143 | static struct omap2_mcspi_device_config mipid_mcspi_config = { |
145 | .turbo_mode = 0, | 144 | .turbo_mode = 0, |
146 | .single_channel = 1, | ||
147 | }; | 145 | }; |
148 | 146 | ||
149 | static struct omap2_mcspi_device_config tsc2005_mcspi_config = { | 147 | static struct omap2_mcspi_device_config tsc2005_mcspi_config = { |
150 | .turbo_mode = 0, | 148 | .turbo_mode = 0, |
151 | .single_channel = 1, | ||
152 | }; | 149 | }; |
153 | 150 | ||
154 | static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { | 151 | static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { |
@@ -1145,7 +1142,7 @@ void __init rx51_peripherals_init(void) | |||
1145 | 1142 | ||
1146 | partition = omap_mux_get("core"); | 1143 | partition = omap_mux_get("core"); |
1147 | if (partition) | 1144 | if (partition) |
1148 | omap2_hsmmc_init(mmc); | 1145 | omap_hsmmc_init(mmc); |
1149 | 1146 | ||
1150 | rx51_charger_init(); | 1147 | rx51_charger_init(); |
1151 | } | 1148 | } |
diff --git a/arch/arm/mach-omap2/board-zoom-display.c b/arch/arm/mach-omap2/board-zoom-display.c index d4683ba5f721..281829036758 100644 --- a/arch/arm/mach-omap2/board-zoom-display.c +++ b/arch/arm/mach-omap2/board-zoom-display.c | |||
@@ -117,7 +117,6 @@ static struct omap_dss_board_info zoom_dss_data = { | |||
117 | 117 | ||
118 | static struct omap2_mcspi_device_config dss_lcd_mcspi_config = { | 118 | static struct omap2_mcspi_device_config dss_lcd_mcspi_config = { |
119 | .turbo_mode = 1, | 119 | .turbo_mode = 1, |
120 | .single_channel = 1, /* 0: slave, 1: master */ | ||
121 | }; | 120 | }; |
122 | 121 | ||
123 | static struct spi_board_info nec_8048_spi_board_info[] __initdata = { | 122 | static struct spi_board_info nec_8048_spi_board_info[] __initdata = { |
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c index c126461836ac..3d39cdb2e250 100644 --- a/arch/arm/mach-omap2/board-zoom-peripherals.c +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c | |||
@@ -205,6 +205,7 @@ static struct omap2_hsmmc_info mmc[] = { | |||
205 | .caps = MMC_CAP_4_BIT_DATA, | 205 | .caps = MMC_CAP_4_BIT_DATA, |
206 | .gpio_wp = -EINVAL, | 206 | .gpio_wp = -EINVAL, |
207 | .power_saving = true, | 207 | .power_saving = true, |
208 | .deferred = true, | ||
208 | }, | 209 | }, |
209 | { | 210 | { |
210 | .name = "internal", | 211 | .name = "internal", |
@@ -233,7 +234,7 @@ static int zoom_twl_gpio_setup(struct device *dev, | |||
233 | 234 | ||
234 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | 235 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ |
235 | mmc[0].gpio_cd = gpio + 0; | 236 | mmc[0].gpio_cd = gpio + 0; |
236 | omap2_hsmmc_init(mmc); | 237 | omap_hsmmc_late_init(mmc); |
237 | 238 | ||
238 | ret = gpio_request_one(LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, | 239 | ret = gpio_request_one(LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, |
239 | "lcd enable"); | 240 | "lcd enable"); |
@@ -301,6 +302,7 @@ void __init zoom_peripherals_init(void) | |||
301 | if (ret) | 302 | if (ret) |
302 | pr_err("error setting wl12xx data: %d\n", ret); | 303 | pr_err("error setting wl12xx data: %d\n", ret); |
303 | 304 | ||
305 | omap_hsmmc_init(mmc); | ||
304 | omap_i2c_init(); | 306 | omap_i2c_init(); |
305 | platform_device_register(&omap_vwlan_device); | 307 | platform_device_register(&omap_vwlan_device); |
306 | usb_musb_init(NULL); | 308 | usb_musb_init(NULL); |
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c index 39f9d5a58d0c..7072e0d651b1 100644 --- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c +++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | |||
@@ -33,6 +33,7 @@ | |||
33 | #include <linux/cpufreq.h> | 33 | #include <linux/cpufreq.h> |
34 | #include <linux/slab.h> | 34 | #include <linux/slab.h> |
35 | 35 | ||
36 | #include <plat/cpu.h> | ||
36 | #include <plat/clock.h> | 37 | #include <plat/clock.h> |
37 | #include <plat/sram.h> | 38 | #include <plat/sram.h> |
38 | #include <plat/sdrc.h> | 39 | #include <plat/sdrc.h> |
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c index e069a9be93df..cd7fd0f91149 100644 --- a/arch/arm/mach-omap2/clkt_dpll.c +++ b/arch/arm/mach-omap2/clkt_dpll.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <asm/div64.h> | 22 | #include <asm/div64.h> |
23 | 23 | ||
24 | #include <plat/clock.h> | 24 | #include <plat/clock.h> |
25 | #include <plat/cpu.h> | ||
25 | 26 | ||
26 | #include "clock.h" | 27 | #include "clock.h" |
27 | #include "cm-regbits-24xx.h" | 28 | #include "cm-regbits-24xx.h" |
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index 61ad3855f10a..bace9308a4db 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c | |||
@@ -14,11 +14,14 @@ | |||
14 | */ | 14 | */ |
15 | 15 | ||
16 | #include <linux/kernel.h> | 16 | #include <linux/kernel.h> |
17 | #include <linux/io.h> | ||
17 | #include <linux/clk.h> | 18 | #include <linux/clk.h> |
18 | #include <linux/list.h> | 19 | #include <linux/list.h> |
19 | 20 | ||
21 | #include <plat/hardware.h> | ||
20 | #include <plat/clkdev_omap.h> | 22 | #include <plat/clkdev_omap.h> |
21 | 23 | ||
24 | #include "iomap.h" | ||
22 | #include "clock.h" | 25 | #include "clock.h" |
23 | #include "clock2xxx.h" | 26 | #include "clock2xxx.h" |
24 | #include "opp2xxx.h" | 27 | #include "opp2xxx.h" |
diff --git a/arch/arm/mach-omap2/clock2430.c b/arch/arm/mach-omap2/clock2430.c index d87bc9cb2a36..dfda9a3f2cb2 100644 --- a/arch/arm/mach-omap2/clock2430.c +++ b/arch/arm/mach-omap2/clock2430.c | |||
@@ -21,8 +21,10 @@ | |||
21 | #include <linux/clk.h> | 21 | #include <linux/clk.h> |
22 | #include <linux/io.h> | 22 | #include <linux/io.h> |
23 | 23 | ||
24 | #include <plat/hardware.h> | ||
24 | #include <plat/clock.h> | 25 | #include <plat/clock.h> |
25 | 26 | ||
27 | #include "iomap.h" | ||
26 | #include "clock.h" | 28 | #include "clock.h" |
27 | #include "clock2xxx.h" | 29 | #include "clock2xxx.h" |
28 | #include "cm2xxx_3xxx.h" | 30 | #include "cm2xxx_3xxx.h" |
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c index 0cc12879e7b9..3b4d09a50399 100644 --- a/arch/arm/mach-omap2/clock2430_data.c +++ b/arch/arm/mach-omap2/clock2430_data.c | |||
@@ -17,8 +17,10 @@ | |||
17 | #include <linux/clk.h> | 17 | #include <linux/clk.h> |
18 | #include <linux/list.h> | 18 | #include <linux/list.h> |
19 | 19 | ||
20 | #include <plat/hardware.h> | ||
20 | #include <plat/clkdev_omap.h> | 21 | #include <plat/clkdev_omap.h> |
21 | 22 | ||
23 | #include "iomap.h" | ||
22 | #include "clock.h" | 24 | #include "clock.h" |
23 | #include "clock2xxx.h" | 25 | #include "clock2xxx.h" |
24 | #include "opp2xxx.h" | 26 | #include "opp2xxx.h" |
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c index 80bb0f0e92e6..12500097378d 100644 --- a/arch/arm/mach-omap2/clock2xxx.c +++ b/arch/arm/mach-omap2/clock2xxx.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/clk.h> | 22 | #include <linux/clk.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | 24 | ||
25 | #include <plat/cpu.h> | ||
25 | #include <plat/clock.h> | 26 | #include <plat/clock.h> |
26 | 27 | ||
27 | #include "clock.h" | 28 | #include "clock.h" |
diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c index 952c3e01c9eb..794d82702c85 100644 --- a/arch/arm/mach-omap2/clock3xxx.c +++ b/arch/arm/mach-omap2/clock3xxx.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/clk.h> | 21 | #include <linux/clk.h> |
22 | #include <linux/io.h> | 22 | #include <linux/io.h> |
23 | 23 | ||
24 | #include <plat/hardware.h> | ||
24 | #include <plat/clock.h> | 25 | #include <plat/clock.h> |
25 | 26 | ||
26 | #include "clock.h" | 27 | #include "clock.h" |
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index d75e5f6b8a01..981b9f9111a4 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c | |||
@@ -20,14 +20,15 @@ | |||
20 | #include <linux/clk.h> | 20 | #include <linux/clk.h> |
21 | #include <linux/list.h> | 21 | #include <linux/list.h> |
22 | 22 | ||
23 | #include <plat/hardware.h> | ||
23 | #include <plat/clkdev_omap.h> | 24 | #include <plat/clkdev_omap.h> |
24 | 25 | ||
26 | #include "iomap.h" | ||
25 | #include "clock.h" | 27 | #include "clock.h" |
26 | #include "clock3xxx.h" | 28 | #include "clock3xxx.h" |
27 | #include "clock34xx.h" | 29 | #include "clock34xx.h" |
28 | #include "clock36xx.h" | 30 | #include "clock36xx.h" |
29 | #include "clock3517.h" | 31 | #include "clock3517.h" |
30 | |||
31 | #include "cm2xxx_3xxx.h" | 32 | #include "cm2xxx_3xxx.h" |
32 | #include "cm-regbits-34xx.h" | 33 | #include "cm-regbits-34xx.h" |
33 | #include "prm2xxx_3xxx.h" | 34 | #include "prm2xxx_3xxx.h" |
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 08e86d793a1f..79b98f22f207 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c | |||
@@ -26,8 +26,11 @@ | |||
26 | #include <linux/kernel.h> | 26 | #include <linux/kernel.h> |
27 | #include <linux/list.h> | 27 | #include <linux/list.h> |
28 | #include <linux/clk.h> | 28 | #include <linux/clk.h> |
29 | |||
30 | #include <plat/hardware.h> | ||
29 | #include <plat/clkdev_omap.h> | 31 | #include <plat/clkdev_omap.h> |
30 | 32 | ||
33 | #include "iomap.h" | ||
31 | #include "clock.h" | 34 | #include "clock.h" |
32 | #include "clock44xx.h" | 35 | #include "clock44xx.h" |
33 | #include "cm1_44xx.h" | 36 | #include "cm1_44xx.h" |
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm2xxx_3xxx.c index 04d39cdd2112..389f9f8b570c 100644 --- a/arch/arm/mach-omap2/cm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/cm2xxx_3xxx.c | |||
@@ -18,8 +18,10 @@ | |||
18 | #include <linux/err.h> | 18 | #include <linux/err.h> |
19 | #include <linux/io.h> | 19 | #include <linux/io.h> |
20 | 20 | ||
21 | #include "common.h" | 21 | #include <plat/hardware.h> |
22 | 22 | ||
23 | #include "iomap.h" | ||
24 | #include "common.h" | ||
23 | #include "cm.h" | 25 | #include "cm.h" |
24 | #include "cm2xxx_3xxx.h" | 26 | #include "cm2xxx_3xxx.h" |
25 | #include "cm-regbits-24xx.h" | 27 | #include "cm-regbits-24xx.h" |
diff --git a/arch/arm/mach-omap2/cm44xx.c b/arch/arm/mach-omap2/cm44xx.c index 6a836303252c..535d66e2822c 100644 --- a/arch/arm/mach-omap2/cm44xx.c +++ b/arch/arm/mach-omap2/cm44xx.c | |||
@@ -18,8 +18,8 @@ | |||
18 | #include <linux/err.h> | 18 | #include <linux/err.h> |
19 | #include <linux/io.h> | 19 | #include <linux/io.h> |
20 | 20 | ||
21 | #include "iomap.h" | ||
21 | #include "common.h" | 22 | #include "common.h" |
22 | |||
23 | #include "cm.h" | 23 | #include "cm.h" |
24 | #include "cm1_44xx.h" | 24 | #include "cm1_44xx.h" |
25 | #include "cm2_44xx.h" | 25 | #include "cm2_44xx.h" |
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index 6204deaf85b1..bd8810c3753f 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c | |||
@@ -20,8 +20,8 @@ | |||
20 | #include <linux/err.h> | 20 | #include <linux/err.h> |
21 | #include <linux/io.h> | 21 | #include <linux/io.h> |
22 | 22 | ||
23 | #include "iomap.h" | ||
23 | #include "common.h" | 24 | #include "common.h" |
24 | |||
25 | #include "cm.h" | 25 | #include "cm.h" |
26 | #include "cm1_44xx.h" | 26 | #include "cm1_44xx.h" |
27 | #include "cm2_44xx.h" | 27 | #include "cm2_44xx.h" |
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c index bcb0c5817167..2d1d775f2c3e 100644 --- a/arch/arm/mach-omap2/common-board-devices.c +++ b/arch/arm/mach-omap2/common-board-devices.c | |||
@@ -33,7 +33,6 @@ | |||
33 | defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | 33 | defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) |
34 | static struct omap2_mcspi_device_config ads7846_mcspi_config = { | 34 | static struct omap2_mcspi_device_config ads7846_mcspi_config = { |
35 | .turbo_mode = 0, | 35 | .turbo_mode = 0, |
36 | .single_channel = 1, /* 0: slave, 1: master */ | ||
37 | }; | 36 | }; |
38 | 37 | ||
39 | static struct ads7846_platform_data ads7846_config = { | 38 | static struct ads7846_platform_data ads7846_config = { |
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c index aaf421178c91..1549c11000d3 100644 --- a/arch/arm/mach-omap2/common.c +++ b/arch/arm/mach-omap2/common.c | |||
@@ -17,12 +17,13 @@ | |||
17 | #include <linux/clk.h> | 17 | #include <linux/clk.h> |
18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
19 | 19 | ||
20 | #include "common.h" | 20 | #include <plat/hardware.h> |
21 | #include <plat/board.h> | 21 | #include <plat/board.h> |
22 | #include <plat/mux.h> | 22 | #include <plat/mux.h> |
23 | |||
24 | #include <plat/clock.h> | 23 | #include <plat/clock.h> |
25 | 24 | ||
25 | #include "iomap.h" | ||
26 | #include "common.h" | ||
26 | #include "sdrc.h" | 27 | #include "sdrc.h" |
27 | #include "control.h" | 28 | #include "control.h" |
28 | 29 | ||
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index febffde2ff10..f78ec4e6a5c7 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h | |||
@@ -133,6 +133,8 @@ void am33xx_map_io(void); | |||
133 | void omap4_map_io(void); | 133 | void omap4_map_io(void); |
134 | void ti81xx_map_io(void); | 134 | void ti81xx_map_io(void); |
135 | 135 | ||
136 | extern void __init omap_init_consistent_dma_size(void); | ||
137 | |||
136 | /** | 138 | /** |
137 | * omap_test_timeout - busy-loop, testing a condition | 139 | * omap_test_timeout - busy-loop, testing a condition |
138 | * @cond: condition to test until it evaluates to true | 140 | * @cond: condition to test until it evaluates to true |
@@ -235,5 +237,10 @@ static inline u32 omap4_mpuss_read_prev_context_state(void) | |||
235 | return 0; | 237 | return 0; |
236 | } | 238 | } |
237 | #endif | 239 | #endif |
240 | |||
241 | struct omap_sdrc_params; | ||
242 | extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, | ||
243 | struct omap_sdrc_params *sdrc_cs1); | ||
244 | |||
238 | #endif /* __ASSEMBLER__ */ | 245 | #endif /* __ASSEMBLER__ */ |
239 | #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ | 246 | #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ |
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 114c037e433c..08e674bb0417 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c | |||
@@ -15,9 +15,11 @@ | |||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/io.h> | 16 | #include <linux/io.h> |
17 | 17 | ||
18 | #include "common.h" | 18 | #include <plat/hardware.h> |
19 | #include <plat/sdrc.h> | 19 | #include <plat/sdrc.h> |
20 | 20 | ||
21 | #include "iomap.h" | ||
22 | #include "common.h" | ||
21 | #include "cm-regbits-34xx.h" | 23 | #include "cm-regbits-34xx.h" |
22 | #include "prm-regbits-34xx.h" | 24 | #include "prm-regbits-34xx.h" |
23 | #include "prm2xxx_3xxx.h" | 25 | #include "prm2xxx_3xxx.h" |
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index 0ba68d3764bc..03149de08544 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h | |||
@@ -16,7 +16,6 @@ | |||
16 | #ifndef __ARCH_ARM_MACH_OMAP2_CONTROL_H | 16 | #ifndef __ARCH_ARM_MACH_OMAP2_CONTROL_H |
17 | #define __ARCH_ARM_MACH_OMAP2_CONTROL_H | 17 | #define __ARCH_ARM_MACH_OMAP2_CONTROL_H |
18 | 18 | ||
19 | #include <mach/io.h> | ||
20 | #include <mach/ctrl_module_core_44xx.h> | 19 | #include <mach/ctrl_module_core_44xx.h> |
21 | #include <mach/ctrl_module_wkup_44xx.h> | 20 | #include <mach/ctrl_module_wkup_44xx.h> |
22 | #include <mach/ctrl_module_pad_core_44xx.h> | 21 | #include <mach/ctrl_module_pad_core_44xx.h> |
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 283d11eae693..71e7df8c413a 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
@@ -24,7 +24,7 @@ | |||
24 | #include <asm/mach/map.h> | 24 | #include <asm/mach/map.h> |
25 | #include <asm/pmu.h> | 25 | #include <asm/pmu.h> |
26 | 26 | ||
27 | #include <plat/tc.h> | 27 | #include "iomap.h" |
28 | #include <plat/board.h> | 28 | #include <plat/board.h> |
29 | #include <plat/mcbsp.h> | 29 | #include <plat/mcbsp.h> |
30 | #include <plat/mmc.h> | 30 | #include <plat/mmc.h> |
@@ -276,7 +276,7 @@ int __init omap4_keyboard_init(struct omap4_keypad_platform_data | |||
276 | } | 276 | } |
277 | 277 | ||
278 | #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE) | 278 | #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE) |
279 | static inline void omap_init_mbox(void) | 279 | static inline void __init omap_init_mbox(void) |
280 | { | 280 | { |
281 | struct omap_hwmod *oh; | 281 | struct omap_hwmod *oh; |
282 | struct platform_device *pdev; | 282 | struct platform_device *pdev; |
@@ -337,7 +337,7 @@ static inline void omap_init_audio(void) {} | |||
337 | #if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \ | 337 | #if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \ |
338 | defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE) | 338 | defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE) |
339 | 339 | ||
340 | static void omap_init_mcpdm(void) | 340 | static void __init omap_init_mcpdm(void) |
341 | { | 341 | { |
342 | struct omap_hwmod *oh; | 342 | struct omap_hwmod *oh; |
343 | struct platform_device *pdev; | 343 | struct platform_device *pdev; |
@@ -358,7 +358,7 @@ static inline void omap_init_mcpdm(void) {} | |||
358 | #if defined(CONFIG_SND_OMAP_SOC_DMIC) || \ | 358 | #if defined(CONFIG_SND_OMAP_SOC_DMIC) || \ |
359 | defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE) | 359 | defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE) |
360 | 360 | ||
361 | static void omap_init_dmic(void) | 361 | static void __init omap_init_dmic(void) |
362 | { | 362 | { |
363 | struct omap_hwmod *oh; | 363 | struct omap_hwmod *oh; |
364 | struct platform_device *pdev; | 364 | struct platform_device *pdev; |
@@ -380,7 +380,7 @@ static inline void omap_init_dmic(void) {} | |||
380 | 380 | ||
381 | #include <plat/mcspi.h> | 381 | #include <plat/mcspi.h> |
382 | 382 | ||
383 | static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) | 383 | static int __init omap_mcspi_init(struct omap_hwmod *oh, void *unused) |
384 | { | 384 | { |
385 | struct platform_device *pdev; | 385 | struct platform_device *pdev; |
386 | char *name = "omap2_mcspi"; | 386 | char *name = "omap2_mcspi"; |
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index 3677b1f58b85..9706c648bc19 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <plat/omap-pm.h> | 30 | #include <plat/omap-pm.h> |
31 | #include "common.h" | 31 | #include "common.h" |
32 | 32 | ||
33 | #include "iomap.h" | ||
33 | #include "mux.h" | 34 | #include "mux.h" |
34 | #include "control.h" | 35 | #include "control.h" |
35 | #include "display.h" | 36 | #include "display.h" |
@@ -124,7 +125,7 @@ static void omap4_hdmi_mux_pads(enum omap_hdmi_flags flags) | |||
124 | } | 125 | } |
125 | } | 126 | } |
126 | 127 | ||
127 | static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes) | 128 | static int __init omap4_dsi_mux_pads(int dsi_id, unsigned lanes) |
128 | { | 129 | { |
129 | u32 enable_mask, enable_shift; | 130 | u32 enable_mask, enable_shift; |
130 | u32 pipd_mask, pipd_shift; | 131 | u32 pipd_mask, pipd_shift; |
@@ -157,7 +158,7 @@ static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes) | |||
157 | return 0; | 158 | return 0; |
158 | } | 159 | } |
159 | 160 | ||
160 | int omap_hdmi_init(enum omap_hdmi_flags flags) | 161 | int __init omap_hdmi_init(enum omap_hdmi_flags flags) |
161 | { | 162 | { |
162 | if (cpu_is_omap44xx()) | 163 | if (cpu_is_omap44xx()) |
163 | omap4_hdmi_mux_pads(flags); | 164 | omap4_hdmi_mux_pads(flags); |
@@ -165,7 +166,7 @@ int omap_hdmi_init(enum omap_hdmi_flags flags) | |||
165 | return 0; | 166 | return 0; |
166 | } | 167 | } |
167 | 168 | ||
168 | static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask) | 169 | static int __init omap_dsi_enable_pads(int dsi_id, unsigned lane_mask) |
169 | { | 170 | { |
170 | if (cpu_is_omap44xx()) | 171 | if (cpu_is_omap44xx()) |
171 | return omap4_dsi_mux_pads(dsi_id, lane_mask); | 172 | return omap4_dsi_mux_pads(dsi_id, lane_mask); |
@@ -173,7 +174,7 @@ static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask) | |||
173 | return 0; | 174 | return 0; |
174 | } | 175 | } |
175 | 176 | ||
176 | static void omap_dsi_disable_pads(int dsi_id, unsigned lane_mask) | 177 | static void __init omap_dsi_disable_pads(int dsi_id, unsigned lane_mask) |
177 | { | 178 | { |
178 | if (cpu_is_omap44xx()) | 179 | if (cpu_is_omap44xx()) |
179 | omap4_dsi_mux_pads(dsi_id, 0); | 180 | omap4_dsi_mux_pads(dsi_id, 0); |
diff --git a/arch/arm/mach-omap2/emu.c b/arch/arm/mach-omap2/emu.c index 9c442e290ccb..e28e761b7ab9 100644 --- a/arch/arm/mach-omap2/emu.c +++ b/arch/arm/mach-omap2/emu.c | |||
@@ -21,6 +21,10 @@ | |||
21 | #include <linux/clk.h> | 21 | #include <linux/clk.h> |
22 | #include <linux/err.h> | 22 | #include <linux/err.h> |
23 | 23 | ||
24 | #include <mach/hardware.h> | ||
25 | |||
26 | #include "iomap.h" | ||
27 | |||
24 | MODULE_LICENSE("GPL"); | 28 | MODULE_LICENSE("GPL"); |
25 | MODULE_AUTHOR("Alexander Shishkin"); | 29 | MODULE_AUTHOR("Alexander Shishkin"); |
26 | 30 | ||
@@ -30,29 +34,8 @@ MODULE_AUTHOR("Alexander Shishkin"); | |||
30 | #define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000) | 34 | #define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000) |
31 | #define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000) | 35 | #define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000) |
32 | 36 | ||
33 | static struct amba_device omap3_etb_device = { | 37 | static AMBA_APB_DEVICE(omap3_etb, "etb", 0x000bb907, ETB_BASE, { }, NULL); |
34 | .dev = { | 38 | static AMBA_APB_DEVICE(omap3_etm, "etm", 0x102bb921, ETM_BASE, { }, NULL); |
35 | .init_name = "etb", | ||
36 | }, | ||
37 | .res = { | ||
38 | .start = ETB_BASE, | ||
39 | .end = ETB_BASE + SZ_4K - 1, | ||
40 | .flags = IORESOURCE_MEM, | ||
41 | }, | ||
42 | .periphid = 0x000bb907, | ||
43 | }; | ||
44 | |||
45 | static struct amba_device omap3_etm_device = { | ||
46 | .dev = { | ||
47 | .init_name = "etm", | ||
48 | }, | ||
49 | .res = { | ||
50 | .start = ETM_BASE, | ||
51 | .end = ETM_BASE + SZ_4K - 1, | ||
52 | .flags = IORESOURCE_MEM, | ||
53 | }, | ||
54 | .periphid = 0x102bb921, | ||
55 | }; | ||
56 | 39 | ||
57 | static int __init emu_init(void) | 40 | static int __init emu_init(void) |
58 | { | 41 | { |
@@ -66,4 +49,3 @@ static int __init emu_init(void) | |||
66 | } | 49 | } |
67 | 50 | ||
68 | subsys_initcall(emu_init); | 51 | subsys_initcall(emu_init); |
69 | |||
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c index 8cbfbc2918ce..2f994e5194e8 100644 --- a/arch/arm/mach-omap2/gpio.c +++ b/arch/arm/mach-omap2/gpio.c | |||
@@ -23,14 +23,18 @@ | |||
23 | 23 | ||
24 | #include <plat/omap_hwmod.h> | 24 | #include <plat/omap_hwmod.h> |
25 | #include <plat/omap_device.h> | 25 | #include <plat/omap_device.h> |
26 | #include <plat/omap-pm.h> | ||
26 | 27 | ||
27 | static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) | 28 | #include "powerdomain.h" |
29 | |||
30 | static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) | ||
28 | { | 31 | { |
29 | struct platform_device *pdev; | 32 | struct platform_device *pdev; |
30 | struct omap_gpio_platform_data *pdata; | 33 | struct omap_gpio_platform_data *pdata; |
31 | struct omap_gpio_dev_attr *dev_attr; | 34 | struct omap_gpio_dev_attr *dev_attr; |
32 | char *name = "omap_gpio"; | 35 | char *name = "omap_gpio"; |
33 | int id; | 36 | int id; |
37 | struct powerdomain *pwrdm; | ||
34 | 38 | ||
35 | /* | 39 | /* |
36 | * extract the device id from name field available in the | 40 | * extract the device id from name field available in the |
@@ -52,7 +56,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) | |||
52 | pdata->bank_width = dev_attr->bank_width; | 56 | pdata->bank_width = dev_attr->bank_width; |
53 | pdata->dbck_flag = dev_attr->dbck_flag; | 57 | pdata->dbck_flag = dev_attr->dbck_flag; |
54 | pdata->virtual_irq_start = IH_GPIO_BASE + 32 * (id - 1); | 58 | pdata->virtual_irq_start = IH_GPIO_BASE + 32 * (id - 1); |
55 | 59 | pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count; | |
56 | pdata->regs = kzalloc(sizeof(struct omap_gpio_reg_offs), GFP_KERNEL); | 60 | pdata->regs = kzalloc(sizeof(struct omap_gpio_reg_offs), GFP_KERNEL); |
57 | if (!pdata) { | 61 | if (!pdata) { |
58 | pr_err("gpio%d: Memory allocation failed\n", id); | 62 | pr_err("gpio%d: Memory allocation failed\n", id); |
@@ -61,8 +65,15 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) | |||
61 | 65 | ||
62 | switch (oh->class->rev) { | 66 | switch (oh->class->rev) { |
63 | case 0: | 67 | case 0: |
68 | if (id == 1) | ||
69 | /* non-wakeup GPIO pins for OMAP2 Bank1 */ | ||
70 | pdata->non_wakeup_gpios = 0xe203ffc0; | ||
71 | else if (id == 2) | ||
72 | /* non-wakeup GPIO pins for OMAP2 Bank2 */ | ||
73 | pdata->non_wakeup_gpios = 0x08700040; | ||
74 | /* fall through */ | ||
75 | |||
64 | case 1: | 76 | case 1: |
65 | pdata->bank_type = METHOD_GPIO_24XX; | ||
66 | pdata->regs->revision = OMAP24XX_GPIO_REVISION; | 77 | pdata->regs->revision = OMAP24XX_GPIO_REVISION; |
67 | pdata->regs->direction = OMAP24XX_GPIO_OE; | 78 | pdata->regs->direction = OMAP24XX_GPIO_OE; |
68 | pdata->regs->datain = OMAP24XX_GPIO_DATAIN; | 79 | pdata->regs->datain = OMAP24XX_GPIO_DATAIN; |
@@ -72,13 +83,19 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) | |||
72 | pdata->regs->irqstatus = OMAP24XX_GPIO_IRQSTATUS1; | 83 | pdata->regs->irqstatus = OMAP24XX_GPIO_IRQSTATUS1; |
73 | pdata->regs->irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2; | 84 | pdata->regs->irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2; |
74 | pdata->regs->irqenable = OMAP24XX_GPIO_IRQENABLE1; | 85 | pdata->regs->irqenable = OMAP24XX_GPIO_IRQENABLE1; |
86 | pdata->regs->irqenable2 = OMAP24XX_GPIO_IRQENABLE2; | ||
75 | pdata->regs->set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1; | 87 | pdata->regs->set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1; |
76 | pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1; | 88 | pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1; |
77 | pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL; | 89 | pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL; |
78 | pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN; | 90 | pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN; |
91 | pdata->regs->ctrl = OMAP24XX_GPIO_CTRL; | ||
92 | pdata->regs->wkup_en = OMAP24XX_GPIO_WAKE_EN; | ||
93 | pdata->regs->leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0; | ||
94 | pdata->regs->leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1; | ||
95 | pdata->regs->risingdetect = OMAP24XX_GPIO_RISINGDETECT; | ||
96 | pdata->regs->fallingdetect = OMAP24XX_GPIO_FALLINGDETECT; | ||
79 | break; | 97 | break; |
80 | case 2: | 98 | case 2: |
81 | pdata->bank_type = METHOD_GPIO_44XX; | ||
82 | pdata->regs->revision = OMAP4_GPIO_REVISION; | 99 | pdata->regs->revision = OMAP4_GPIO_REVISION; |
83 | pdata->regs->direction = OMAP4_GPIO_OE; | 100 | pdata->regs->direction = OMAP4_GPIO_OE; |
84 | pdata->regs->datain = OMAP4_GPIO_DATAIN; | 101 | pdata->regs->datain = OMAP4_GPIO_DATAIN; |
@@ -88,10 +105,17 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) | |||
88 | pdata->regs->irqstatus = OMAP4_GPIO_IRQSTATUS0; | 105 | pdata->regs->irqstatus = OMAP4_GPIO_IRQSTATUS0; |
89 | pdata->regs->irqstatus2 = OMAP4_GPIO_IRQSTATUS1; | 106 | pdata->regs->irqstatus2 = OMAP4_GPIO_IRQSTATUS1; |
90 | pdata->regs->irqenable = OMAP4_GPIO_IRQSTATUSSET0; | 107 | pdata->regs->irqenable = OMAP4_GPIO_IRQSTATUSSET0; |
108 | pdata->regs->irqenable2 = OMAP4_GPIO_IRQSTATUSSET1; | ||
91 | pdata->regs->set_irqenable = OMAP4_GPIO_IRQSTATUSSET0; | 109 | pdata->regs->set_irqenable = OMAP4_GPIO_IRQSTATUSSET0; |
92 | pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0; | 110 | pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0; |
93 | pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME; | 111 | pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME; |
94 | pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE; | 112 | pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE; |
113 | pdata->regs->ctrl = OMAP4_GPIO_CTRL; | ||
114 | pdata->regs->wkup_en = OMAP4_GPIO_IRQWAKEN0; | ||
115 | pdata->regs->leveldetect0 = OMAP4_GPIO_LEVELDETECT0; | ||
116 | pdata->regs->leveldetect1 = OMAP4_GPIO_LEVELDETECT1; | ||
117 | pdata->regs->risingdetect = OMAP4_GPIO_RISINGDETECT; | ||
118 | pdata->regs->fallingdetect = OMAP4_GPIO_FALLINGDETECT; | ||
95 | break; | 119 | break; |
96 | default: | 120 | default: |
97 | WARN(1, "Invalid gpio bank_type\n"); | 121 | WARN(1, "Invalid gpio bank_type\n"); |
@@ -99,6 +123,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) | |||
99 | return -EINVAL; | 123 | return -EINVAL; |
100 | } | 124 | } |
101 | 125 | ||
126 | pwrdm = omap_hwmod_get_pwrdm(oh); | ||
127 | pdata->loses_context = pwrdm_can_ever_lose_context(pwrdm); | ||
128 | |||
102 | pdev = omap_device_build(name, id - 1, oh, pdata, | 129 | pdev = omap_device_build(name, id - 1, oh, pdata, |
103 | sizeof(*pdata), NULL, 0, false); | 130 | sizeof(*pdata), NULL, 0, false); |
104 | kfree(pdata); | 131 | kfree(pdata); |
@@ -109,9 +136,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) | |||
109 | return PTR_ERR(pdev); | 136 | return PTR_ERR(pdev); |
110 | } | 137 | } |
111 | 138 | ||
112 | omap_device_disable_idle_on_suspend(pdev); | ||
113 | |||
114 | gpio_bank_count++; | ||
115 | return 0; | 139 | return 0; |
116 | } | 140 | } |
117 | 141 | ||
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c index 8ad210bda9a9..386dec8d2351 100644 --- a/arch/arm/mach-omap2/gpmc-nand.c +++ b/arch/arm/mach-omap2/gpmc-nand.c | |||
@@ -16,6 +16,7 @@ | |||
16 | 16 | ||
17 | #include <asm/mach/flash.h> | 17 | #include <asm/mach/flash.h> |
18 | 18 | ||
19 | #include <plat/cpu.h> | ||
19 | #include <plat/nand.h> | 20 | #include <plat/nand.h> |
20 | #include <plat/board.h> | 21 | #include <plat/board.h> |
21 | #include <plat/gpmc.h> | 22 | #include <plat/gpmc.h> |
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c index 5cdce10d6183..385b3e02c4a6 100644 --- a/arch/arm/mach-omap2/gpmc-onenand.c +++ b/arch/arm/mach-omap2/gpmc-onenand.c | |||
@@ -18,6 +18,7 @@ | |||
18 | 18 | ||
19 | #include <asm/mach/flash.h> | 19 | #include <asm/mach/flash.h> |
20 | 20 | ||
21 | #include <plat/cpu.h> | ||
21 | #include <plat/onenand.h> | 22 | #include <plat/onenand.h> |
22 | #include <plat/board.h> | 23 | #include <plat/board.h> |
23 | #include <plat/gpmc.h> | 24 | #include <plat/gpmc.h> |
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index b40c28895298..a97876da7fad 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c | |||
@@ -293,8 +293,8 @@ static inline void omap_hsmmc_mux(struct omap_mmc_platform_data *mmc_controller, | |||
293 | } | 293 | } |
294 | } | 294 | } |
295 | 295 | ||
296 | static int omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, | 296 | static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, |
297 | struct omap_mmc_platform_data *mmc) | 297 | struct omap_mmc_platform_data *mmc) |
298 | { | 298 | { |
299 | char *hc_name; | 299 | char *hc_name; |
300 | 300 | ||
@@ -428,69 +428,140 @@ static int omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, | |||
428 | return 0; | 428 | return 0; |
429 | } | 429 | } |
430 | 430 | ||
431 | static int omap_hsmmc_done; | ||
432 | |||
433 | void omap_hsmmc_late_init(struct omap2_hsmmc_info *c) | ||
434 | { | ||
435 | struct platform_device *pdev; | ||
436 | struct omap_mmc_platform_data *mmc_pdata; | ||
437 | int res; | ||
438 | |||
439 | if (omap_hsmmc_done != 1) | ||
440 | return; | ||
441 | |||
442 | omap_hsmmc_done++; | ||
443 | |||
444 | for (; c->mmc; c++) { | ||
445 | if (!c->deferred) | ||
446 | continue; | ||
447 | |||
448 | pdev = c->pdev; | ||
449 | if (!pdev) | ||
450 | continue; | ||
451 | |||
452 | mmc_pdata = pdev->dev.platform_data; | ||
453 | if (!mmc_pdata) | ||
454 | continue; | ||
455 | |||
456 | mmc_pdata->slots[0].switch_pin = c->gpio_cd; | ||
457 | mmc_pdata->slots[0].gpio_wp = c->gpio_wp; | ||
458 | |||
459 | res = omap_device_register(pdev); | ||
460 | if (res) | ||
461 | pr_err("Could not late init MMC %s\n", | ||
462 | c->name); | ||
463 | } | ||
464 | } | ||
465 | |||
431 | #define MAX_OMAP_MMC_HWMOD_NAME_LEN 16 | 466 | #define MAX_OMAP_MMC_HWMOD_NAME_LEN 16 |
432 | 467 | ||
433 | void omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) | 468 | static void omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo, |
469 | int ctrl_nr) | ||
434 | { | 470 | { |
435 | struct omap_hwmod *oh; | 471 | struct omap_hwmod *oh; |
472 | struct omap_hwmod *ohs[1]; | ||
473 | struct omap_device *od; | ||
436 | struct platform_device *pdev; | 474 | struct platform_device *pdev; |
437 | char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN]; | 475 | char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN]; |
438 | struct omap_mmc_platform_data *mmc_data; | 476 | struct omap_mmc_platform_data *mmc_data; |
439 | struct omap_mmc_dev_attr *mmc_dev_attr; | 477 | struct omap_mmc_dev_attr *mmc_dev_attr; |
440 | char *name; | 478 | char *name; |
441 | int l; | 479 | int res; |
442 | 480 | ||
443 | mmc_data = kzalloc(sizeof(struct omap_mmc_platform_data), GFP_KERNEL); | 481 | mmc_data = kzalloc(sizeof(struct omap_mmc_platform_data), GFP_KERNEL); |
444 | if (!mmc_data) { | 482 | if (!mmc_data) { |
445 | pr_err("Cannot allocate memory for mmc device!\n"); | 483 | pr_err("Cannot allocate memory for mmc device!\n"); |
446 | goto done; | 484 | return; |
447 | } | 485 | } |
448 | 486 | ||
449 | if (omap_hsmmc_pdata_init(hsmmcinfo, mmc_data) < 0) { | 487 | res = omap_hsmmc_pdata_init(hsmmcinfo, mmc_data); |
450 | pr_err("%s fails!\n", __func__); | 488 | if (res < 0) |
451 | goto done; | 489 | goto free_mmc; |
452 | } | 490 | |
453 | omap_hsmmc_mux(mmc_data, (ctrl_nr - 1)); | 491 | omap_hsmmc_mux(mmc_data, (ctrl_nr - 1)); |
454 | 492 | ||
455 | name = "omap_hsmmc"; | 493 | name = "omap_hsmmc"; |
456 | 494 | res = snprintf(oh_name, MAX_OMAP_MMC_HWMOD_NAME_LEN, | |
457 | l = snprintf(oh_name, MAX_OMAP_MMC_HWMOD_NAME_LEN, | ||
458 | "mmc%d", ctrl_nr); | 495 | "mmc%d", ctrl_nr); |
459 | WARN(l >= MAX_OMAP_MMC_HWMOD_NAME_LEN, | 496 | WARN(res >= MAX_OMAP_MMC_HWMOD_NAME_LEN, |
460 | "String buffer overflow in MMC%d device setup\n", ctrl_nr); | 497 | "String buffer overflow in MMC%d device setup\n", ctrl_nr); |
498 | |||
461 | oh = omap_hwmod_lookup(oh_name); | 499 | oh = omap_hwmod_lookup(oh_name); |
462 | if (!oh) { | 500 | if (!oh) { |
463 | pr_err("Could not look up %s\n", oh_name); | 501 | pr_err("Could not look up %s\n", oh_name); |
464 | kfree(mmc_data->slots[0].name); | 502 | goto free_name; |
465 | goto done; | ||
466 | } | 503 | } |
467 | 504 | ohs[0] = oh; | |
468 | if (oh->dev_attr != NULL) { | 505 | if (oh->dev_attr != NULL) { |
469 | mmc_dev_attr = oh->dev_attr; | 506 | mmc_dev_attr = oh->dev_attr; |
470 | mmc_data->controller_flags = mmc_dev_attr->flags; | 507 | mmc_data->controller_flags = mmc_dev_attr->flags; |
471 | } | 508 | } |
472 | 509 | ||
473 | pdev = omap_device_build(name, ctrl_nr - 1, oh, mmc_data, | 510 | pdev = platform_device_alloc(name, ctrl_nr - 1); |
474 | sizeof(struct omap_mmc_platform_data), NULL, 0, false); | 511 | if (!pdev) { |
475 | if (IS_ERR(pdev)) { | 512 | pr_err("Could not allocate pdev for %s\n", name); |
476 | WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name); | 513 | goto free_name; |
477 | kfree(mmc_data->slots[0].name); | ||
478 | goto done; | ||
479 | } | 514 | } |
480 | /* | 515 | dev_set_name(&pdev->dev, "%s.%d", pdev->name, pdev->id); |
481 | * return device handle to board setup code | 516 | |
482 | * required to populate for regulator framework structure | 517 | od = omap_device_alloc(pdev, ohs, 1, NULL, 0); |
483 | */ | 518 | if (!od) { |
484 | hsmmcinfo->dev = &pdev->dev; | 519 | pr_err("Could not allocate od for %s\n", name); |
520 | goto put_pdev; | ||
521 | } | ||
522 | |||
523 | res = platform_device_add_data(pdev, mmc_data, | ||
524 | sizeof(struct omap_mmc_platform_data)); | ||
525 | if (res) { | ||
526 | pr_err("Could not add pdata for %s\n", name); | ||
527 | goto put_pdev; | ||
528 | } | ||
529 | |||
530 | hsmmcinfo->pdev = pdev; | ||
531 | |||
532 | if (hsmmcinfo->deferred) | ||
533 | goto free_mmc; | ||
485 | 534 | ||
486 | done: | 535 | res = omap_device_register(pdev); |
536 | if (res) { | ||
537 | pr_err("Could not register od for %s\n", name); | ||
538 | goto free_od; | ||
539 | } | ||
540 | |||
541 | goto free_mmc; | ||
542 | |||
543 | free_od: | ||
544 | omap_device_delete(od); | ||
545 | |||
546 | put_pdev: | ||
547 | platform_device_put(pdev); | ||
548 | |||
549 | free_name: | ||
550 | kfree(mmc_data->slots[0].name); | ||
551 | |||
552 | free_mmc: | ||
487 | kfree(mmc_data); | 553 | kfree(mmc_data); |
488 | } | 554 | } |
489 | 555 | ||
490 | void omap2_hsmmc_init(struct omap2_hsmmc_info *controllers) | 556 | void __init omap_hsmmc_init(struct omap2_hsmmc_info *controllers) |
491 | { | 557 | { |
492 | u32 reg; | 558 | u32 reg; |
493 | 559 | ||
560 | if (omap_hsmmc_done) | ||
561 | return; | ||
562 | |||
563 | omap_hsmmc_done = 1; | ||
564 | |||
494 | if (!cpu_is_omap44xx()) { | 565 | if (!cpu_is_omap44xx()) { |
495 | if (cpu_is_omap2430()) { | 566 | if (cpu_is_omap2430()) { |
496 | control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE; | 567 | control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE; |
@@ -515,7 +586,7 @@ void omap2_hsmmc_init(struct omap2_hsmmc_info *controllers) | |||
515 | } | 586 | } |
516 | 587 | ||
517 | for (; controllers->mmc; controllers++) | 588 | for (; controllers->mmc; controllers++) |
518 | omap_init_hsmmc(controllers, controllers->mmc); | 589 | omap_hsmmc_init_one(controllers, controllers->mmc); |
519 | 590 | ||
520 | } | 591 | } |
521 | 592 | ||
diff --git a/arch/arm/mach-omap2/hsmmc.h b/arch/arm/mach-omap2/hsmmc.h index c4409730c4bb..07831cc3c171 100644 --- a/arch/arm/mach-omap2/hsmmc.h +++ b/arch/arm/mach-omap2/hsmmc.h | |||
@@ -21,10 +21,11 @@ struct omap2_hsmmc_info { | |||
21 | bool no_off; /* power_saving and power is not to go off */ | 21 | bool no_off; /* power_saving and power is not to go off */ |
22 | bool no_off_init; /* no power off when not in MMC sleep state */ | 22 | bool no_off_init; /* no power off when not in MMC sleep state */ |
23 | bool vcc_aux_disable_is_sleep; /* Regulator off remapped to sleep */ | 23 | bool vcc_aux_disable_is_sleep; /* Regulator off remapped to sleep */ |
24 | bool deferred; /* mmc needs a deferred probe */ | ||
24 | int gpio_cd; /* or -EINVAL */ | 25 | int gpio_cd; /* or -EINVAL */ |
25 | int gpio_wp; /* or -EINVAL */ | 26 | int gpio_wp; /* or -EINVAL */ |
26 | char *name; /* or NULL for default */ | 27 | char *name; /* or NULL for default */ |
27 | struct device *dev; /* returned: pointer to mmc adapter */ | 28 | struct platform_device *pdev; /* mmc controller instance */ |
28 | int ocr_mask; /* temporary HACK */ | 29 | int ocr_mask; /* temporary HACK */ |
29 | /* Remux (pad configuration) when powering on/off */ | 30 | /* Remux (pad configuration) when powering on/off */ |
30 | void (*remux)(struct device *dev, int slot, int power_on); | 31 | void (*remux)(struct device *dev, int slot, int power_on); |
@@ -34,11 +35,16 @@ struct omap2_hsmmc_info { | |||
34 | 35 | ||
35 | #if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) | 36 | #if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) |
36 | 37 | ||
37 | void omap2_hsmmc_init(struct omap2_hsmmc_info *); | 38 | void omap_hsmmc_init(struct omap2_hsmmc_info *); |
39 | void omap_hsmmc_late_init(struct omap2_hsmmc_info *); | ||
38 | 40 | ||
39 | #else | 41 | #else |
40 | 42 | ||
41 | static inline void omap2_hsmmc_init(struct omap2_hsmmc_info *info) | 43 | static inline void omap_hsmmc_init(struct omap2_hsmmc_info *info) |
44 | { | ||
45 | } | ||
46 | |||
47 | static inline void omap_hsmmc_late_init(struct omap2_hsmmc_info *info) | ||
42 | { | 48 | { |
43 | } | 49 | } |
44 | 50 | ||
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S deleted file mode 100644 index 56964a0c4c7e..000000000000 --- a/arch/arm/mach-omap2/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-omap/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for OMAP-based platforms | ||
5 | * | ||
6 | * Copyright (C) 2009 Texas Instruments | ||
7 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | .macro disable_fiq | ||
15 | .endm | ||
16 | |||
17 | .macro arch_ret_to_user, tmp1, tmp2 | ||
18 | .endm | ||
diff --git a/arch/arm/mach-omap2/include/mach/io.h b/arch/arm/mach-omap2/include/mach/io.h index fd78f31aa1ad..b8758c8a9394 100644 --- a/arch/arm/mach-omap2/include/mach/io.h +++ b/arch/arm/mach-omap2/include/mach/io.h | |||
@@ -1,5 +1,49 @@ | |||
1 | /* | 1 | /* |
2 | * arch/arm/mach-omap2/include/mach/io.h | 2 | * arch/arm/mach-omap2/include/mach/io.h |
3 | * | ||
4 | * IO definitions for TI OMAP processors and boards | ||
5 | * | ||
6 | * Copied from arch/arm/mach-sa1100/include/mach/io.h | ||
7 | * Copyright (C) 1997-1999 Russell King | ||
8 | * | ||
9 | * Copyright (C) 2009 Texas Instruments | ||
10 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or modify it | ||
13 | * under the terms of the GNU General Public License as published by the | ||
14 | * Free Software Foundation; either version 2 of the License, or (at your | ||
15 | * option) any later version. | ||
16 | * | ||
17 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
18 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
19 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
20 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
23 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
24 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
27 | * | ||
28 | * You should have received a copy of the GNU General Public License along | ||
29 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
30 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
31 | * | ||
32 | * Modifications: | ||
33 | * 06-12-1997 RMK Created. | ||
34 | * 07-04-1999 RMK Major cleanup | ||
3 | */ | 35 | */ |
4 | 36 | ||
5 | #include <plat/io.h> | 37 | #ifndef __ASM_ARM_ARCH_IO_H |
38 | #define __ASM_ARM_ARCH_IO_H | ||
39 | |||
40 | #define IO_SPACE_LIMIT 0xffffffff | ||
41 | |||
42 | /* | ||
43 | * We don't actually have real ISA nor PCI buses, but there is so many | ||
44 | * drivers out there that might just work if we fake them... | ||
45 | */ | ||
46 | #define __io(a) __typesafe_io(a) | ||
47 | #define __mem_pci(a) (a) | ||
48 | |||
49 | #endif | ||
diff --git a/arch/arm/mach-omap2/include/mach/system.h b/arch/arm/mach-omap2/include/mach/system.h deleted file mode 100644 index d488721ab90b..000000000000 --- a/arch/arm/mach-omap2/include/mach/system.h +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-omap2/include/mach/system.h | ||
3 | */ | ||
4 | |||
5 | #include <plat/system.h> | ||
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index eb50c29fb644..3203128eef7d 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
@@ -24,26 +24,23 @@ | |||
24 | #include <linux/omapfb.h> | 24 | #include <linux/omapfb.h> |
25 | 25 | ||
26 | #include <asm/tlb.h> | 26 | #include <asm/tlb.h> |
27 | |||
28 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
29 | 28 | ||
30 | #include <plat/sram.h> | 29 | #include <plat/sram.h> |
31 | #include <plat/sdrc.h> | 30 | #include <plat/sdrc.h> |
32 | #include <plat/serial.h> | 31 | #include <plat/serial.h> |
33 | |||
34 | #include "clock2xxx.h" | ||
35 | #include "clock3xxx.h" | ||
36 | #include "clock44xx.h" | ||
37 | |||
38 | #include "common.h" | ||
39 | #include <plat/omap-pm.h> | 32 | #include <plat/omap-pm.h> |
33 | #include <plat/omap_hwmod.h> | ||
34 | #include <plat/multi.h> | ||
35 | |||
36 | #include "iomap.h" | ||
40 | #include "voltage.h" | 37 | #include "voltage.h" |
41 | #include "powerdomain.h" | 38 | #include "powerdomain.h" |
42 | |||
43 | #include "clockdomain.h" | 39 | #include "clockdomain.h" |
44 | #include <plat/omap_hwmod.h> | ||
45 | #include <plat/multi.h> | ||
46 | #include "common.h" | 40 | #include "common.h" |
41 | #include "clock2xxx.h" | ||
42 | #include "clock3xxx.h" | ||
43 | #include "clock44xx.h" | ||
47 | 44 | ||
48 | /* | 45 | /* |
49 | * The machine specific code may provide the extra mapping besides the | 46 | * The machine specific code may provide the extra mapping besides the |
@@ -490,43 +487,3 @@ void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, | |||
490 | _omap2_init_reprogram_sdrc(); | 487 | _omap2_init_reprogram_sdrc(); |
491 | } | 488 | } |
492 | } | 489 | } |
493 | |||
494 | /* | ||
495 | * NOTE: Please use ioremap + __raw_read/write where possible instead of these | ||
496 | */ | ||
497 | |||
498 | u8 omap_readb(u32 pa) | ||
499 | { | ||
500 | return __raw_readb(OMAP2_L4_IO_ADDRESS(pa)); | ||
501 | } | ||
502 | EXPORT_SYMBOL(omap_readb); | ||
503 | |||
504 | u16 omap_readw(u32 pa) | ||
505 | { | ||
506 | return __raw_readw(OMAP2_L4_IO_ADDRESS(pa)); | ||
507 | } | ||
508 | EXPORT_SYMBOL(omap_readw); | ||
509 | |||
510 | u32 omap_readl(u32 pa) | ||
511 | { | ||
512 | return __raw_readl(OMAP2_L4_IO_ADDRESS(pa)); | ||
513 | } | ||
514 | EXPORT_SYMBOL(omap_readl); | ||
515 | |||
516 | void omap_writeb(u8 v, u32 pa) | ||
517 | { | ||
518 | __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa)); | ||
519 | } | ||
520 | EXPORT_SYMBOL(omap_writeb); | ||
521 | |||
522 | void omap_writew(u16 v, u32 pa) | ||
523 | { | ||
524 | __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa)); | ||
525 | } | ||
526 | EXPORT_SYMBOL(omap_writew); | ||
527 | |||
528 | void omap_writel(u32 v, u32 pa) | ||
529 | { | ||
530 | __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa)); | ||
531 | } | ||
532 | EXPORT_SYMBOL(omap_writel); | ||
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/mach-omap2/iomap.h index 0696bae1818b..e6f958165296 100644 --- a/arch/arm/plat-omap/include/plat/io.h +++ b/arch/arm/mach-omap2/iomap.h | |||
@@ -1,13 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * arch/arm/plat-omap/include/mach/io.h | 2 | * IO mappings for OMAP2+ |
3 | * | ||
4 | * IO definitions for TI OMAP processors and boards | ||
5 | * | ||
6 | * Copied from arch/arm/mach-sa1100/include/mach/io.h | ||
7 | * Copyright (C) 1997-1999 Russell King | ||
8 | * | ||
9 | * Copyright (C) 2009 Texas Instruments | ||
10 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
11 | * | 3 | * |
12 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
13 | * under the terms of the GNU General Public License as published by the | 5 | * under the terms of the GNU General Public License as published by the |
@@ -25,33 +17,9 @@ | |||
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | 17 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 18 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | * | 19 | * |
28 | * You should have received a copy of the GNU General Public License along | 20 | * You should have received a copy of the GNU General Public License along |
29 | * with this program; if not, write to the Free Software Foundation, Inc., | 21 | * with this program; if not, write to the Free Software Foundation, Inc., |
30 | * 675 Mass Ave, Cambridge, MA 02139, USA. | 22 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
31 | * | ||
32 | * Modifications: | ||
33 | * 06-12-1997 RMK Created. | ||
34 | * 07-04-1999 RMK Major cleanup | ||
35 | */ | ||
36 | |||
37 | #ifndef __ASM_ARM_ARCH_IO_H | ||
38 | #define __ASM_ARM_ARCH_IO_H | ||
39 | |||
40 | #include <mach/hardware.h> | ||
41 | |||
42 | #define IO_SPACE_LIMIT 0xffffffff | ||
43 | |||
44 | /* | ||
45 | * We don't actually have real ISA nor PCI buses, but there is so many | ||
46 | * drivers out there that might just work if we fake them... | ||
47 | */ | ||
48 | #define __io(a) __typesafe_io(a) | ||
49 | #define __mem_pci(a) (a) | ||
50 | |||
51 | /* | ||
52 | * ---------------------------------------------------------------------------- | ||
53 | * I/O mapping | ||
54 | * ---------------------------------------------------------------------------- | ||
55 | */ | 23 | */ |
56 | 24 | ||
57 | #ifdef __ASSEMBLER__ | 25 | #ifdef __ASSEMBLER__ |
@@ -60,13 +28,9 @@ | |||
60 | #define IOMEM(x) ((void __force __iomem *)(x)) | 28 | #define IOMEM(x) ((void __force __iomem *)(x)) |
61 | #endif | 29 | #endif |
62 | 30 | ||
63 | #define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ | ||
64 | #define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET) | ||
65 | |||
66 | #define OMAP2_L3_IO_OFFSET 0x90000000 | 31 | #define OMAP2_L3_IO_OFFSET 0x90000000 |
67 | #define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */ | 32 | #define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */ |
68 | 33 | ||
69 | |||
70 | #define OMAP2_L4_IO_OFFSET 0xb2000000 | 34 | #define OMAP2_L4_IO_OFFSET 0xb2000000 |
71 | #define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */ | 35 | #define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */ |
72 | 36 | ||
@@ -87,16 +51,6 @@ | |||
87 | 51 | ||
88 | /* | 52 | /* |
89 | * ---------------------------------------------------------------------------- | 53 | * ---------------------------------------------------------------------------- |
90 | * Omap1 specific IO mapping | ||
91 | * ---------------------------------------------------------------------------- | ||
92 | */ | ||
93 | |||
94 | #define OMAP1_IO_PHYS 0xFFFB0000 | ||
95 | #define OMAP1_IO_SIZE 0x40000 | ||
96 | #define OMAP1_IO_VIRT (OMAP1_IO_PHYS - OMAP1_IO_OFFSET) | ||
97 | |||
98 | /* | ||
99 | * ---------------------------------------------------------------------------- | ||
100 | * Omap2 specific IO mapping | 54 | * Omap2 specific IO mapping |
101 | * ---------------------------------------------------------------------------- | 55 | * ---------------------------------------------------------------------------- |
102 | */ | 56 | */ |
@@ -247,31 +201,3 @@ | |||
247 | /* 0x4e000000 --> 0xfd300000 */ | 201 | /* 0x4e000000 --> 0xfd300000 */ |
248 | #define OMAP44XX_DMM_SIZE SZ_1M | 202 | #define OMAP44XX_DMM_SIZE SZ_1M |
249 | #define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_EMIF2_SIZE) | 203 | #define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_EMIF2_SIZE) |
250 | /* | ||
251 | * ---------------------------------------------------------------------------- | ||
252 | * Omap specific register access | ||
253 | * ---------------------------------------------------------------------------- | ||
254 | */ | ||
255 | |||
256 | #ifndef __ASSEMBLER__ | ||
257 | |||
258 | /* | ||
259 | * NOTE: Please use ioremap + __raw_read/write where possible instead of these | ||
260 | */ | ||
261 | |||
262 | extern u8 omap_readb(u32 pa); | ||
263 | extern u16 omap_readw(u32 pa); | ||
264 | extern u32 omap_readl(u32 pa); | ||
265 | extern void omap_writeb(u8 v, u32 pa); | ||
266 | extern void omap_writew(u16 v, u32 pa); | ||
267 | extern void omap_writel(u32 v, u32 pa); | ||
268 | |||
269 | struct omap_sdrc_params; | ||
270 | extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, | ||
271 | struct omap_sdrc_params *sdrc_cs1); | ||
272 | |||
273 | extern void __init omap_init_consistent_dma_size(void); | ||
274 | |||
275 | #endif | ||
276 | |||
277 | #endif | ||
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 1fef061f7927..6da2d0edee11 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c | |||
@@ -14,10 +14,13 @@ | |||
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/interrupt.h> | 15 | #include <linux/interrupt.h> |
16 | #include <linux/io.h> | 16 | #include <linux/io.h> |
17 | #include <mach/hardware.h> | 17 | |
18 | #include <asm/exception.h> | 18 | #include <asm/exception.h> |
19 | #include <asm/mach/irq.h> | 19 | #include <asm/mach/irq.h> |
20 | 20 | ||
21 | #include <mach/hardware.h> | ||
22 | |||
23 | #include "iomap.h" | ||
21 | 24 | ||
22 | /* selected INTC register offsets */ | 25 | /* selected INTC register offsets */ |
23 | 26 | ||
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index fb4bcf81a183..5f8a876e4fd2 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c | |||
@@ -122,7 +122,7 @@ static int omap3_enable_st_clock(unsigned int id, bool enable) | |||
122 | return 0; | 122 | return 0; |
123 | } | 123 | } |
124 | 124 | ||
125 | static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) | 125 | static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused) |
126 | { | 126 | { |
127 | int id, count = 1; | 127 | int id, count = 1; |
128 | char *name = "omap-mcbsp"; | 128 | char *name = "omap-mcbsp"; |
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index fb8bc9fa43b1..f26b2faa1694 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c | |||
@@ -100,8 +100,8 @@ void omap_mux_write_array(struct omap_mux_partition *partition, | |||
100 | 100 | ||
101 | static char *omap_mux_options; | 101 | static char *omap_mux_options; |
102 | 102 | ||
103 | static int _omap_mux_init_gpio(struct omap_mux_partition *partition, | 103 | static int __init _omap_mux_init_gpio(struct omap_mux_partition *partition, |
104 | int gpio, int val) | 104 | int gpio, int val) |
105 | { | 105 | { |
106 | struct omap_mux_entry *e; | 106 | struct omap_mux_entry *e; |
107 | struct omap_mux *gpio_mux = NULL; | 107 | struct omap_mux *gpio_mux = NULL; |
@@ -145,7 +145,7 @@ static int _omap_mux_init_gpio(struct omap_mux_partition *partition, | |||
145 | return 0; | 145 | return 0; |
146 | } | 146 | } |
147 | 147 | ||
148 | int omap_mux_init_gpio(int gpio, int val) | 148 | int __init omap_mux_init_gpio(int gpio, int val) |
149 | { | 149 | { |
150 | struct omap_mux_partition *partition; | 150 | struct omap_mux_partition *partition; |
151 | int ret; | 151 | int ret; |
@@ -159,9 +159,9 @@ int omap_mux_init_gpio(int gpio, int val) | |||
159 | return -ENODEV; | 159 | return -ENODEV; |
160 | } | 160 | } |
161 | 161 | ||
162 | static int _omap_mux_get_by_name(struct omap_mux_partition *partition, | 162 | static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition, |
163 | const char *muxname, | 163 | const char *muxname, |
164 | struct omap_mux **found_mux) | 164 | struct omap_mux **found_mux) |
165 | { | 165 | { |
166 | struct omap_mux *mux = NULL; | 166 | struct omap_mux *mux = NULL; |
167 | struct omap_mux_entry *e; | 167 | struct omap_mux_entry *e; |
@@ -240,7 +240,7 @@ omap_mux_get_by_name(const char *muxname, | |||
240 | return -ENODEV; | 240 | return -ENODEV; |
241 | } | 241 | } |
242 | 242 | ||
243 | int omap_mux_init_signal(const char *muxname, int val) | 243 | int __init omap_mux_init_signal(const char *muxname, int val) |
244 | { | 244 | { |
245 | struct omap_mux_partition *partition = NULL; | 245 | struct omap_mux_partition *partition = NULL; |
246 | struct omap_mux *mux = NULL; | 246 | struct omap_mux *mux = NULL; |
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c index 1d5d01056558..bbabe1d83249 100644 --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c | |||
@@ -263,12 +263,10 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state) | |||
263 | * In MPUSS OSWR or device OFF, interrupt controller contest is lost. | 263 | * In MPUSS OSWR or device OFF, interrupt controller contest is lost. |
264 | */ | 264 | */ |
265 | mpuss_clear_prev_logic_pwrst(); | 265 | mpuss_clear_prev_logic_pwrst(); |
266 | pwrdm_clear_all_prev_pwrst(mpuss_pd); | ||
267 | if ((pwrdm_read_next_pwrst(mpuss_pd) == PWRDM_POWER_RET) && | 266 | if ((pwrdm_read_next_pwrst(mpuss_pd) == PWRDM_POWER_RET) && |
268 | (pwrdm_read_logic_retst(mpuss_pd) == PWRDM_POWER_OFF)) | 267 | (pwrdm_read_logic_retst(mpuss_pd) == PWRDM_POWER_OFF)) |
269 | save_state = 2; | 268 | save_state = 2; |
270 | 269 | ||
271 | clear_cpu_prev_pwrst(cpu); | ||
272 | cpu_clear_prev_logic_pwrst(cpu); | 270 | cpu_clear_prev_logic_pwrst(cpu); |
273 | set_cpu_next_pwrst(cpu, power_state); | 271 | set_cpu_next_pwrst(cpu, power_state); |
274 | set_cpu_wakeup_addr(cpu, virt_to_phys(omap4_cpu_resume)); | 272 | set_cpu_wakeup_addr(cpu, virt_to_phys(omap4_cpu_resume)); |
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index c1bf3ef0ba02..deffbf1c9627 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c | |||
@@ -23,11 +23,12 @@ | |||
23 | #include <asm/cacheflush.h> | 23 | #include <asm/cacheflush.h> |
24 | #include <asm/hardware/gic.h> | 24 | #include <asm/hardware/gic.h> |
25 | #include <asm/smp_scu.h> | 25 | #include <asm/smp_scu.h> |
26 | |||
26 | #include <mach/hardware.h> | 27 | #include <mach/hardware.h> |
27 | #include <mach/omap-secure.h> | 28 | #include <mach/omap-secure.h> |
28 | 29 | ||
30 | #include "iomap.h" | ||
29 | #include "common.h" | 31 | #include "common.h" |
30 | |||
31 | #include "clockdomain.h" | 32 | #include "clockdomain.h" |
32 | 33 | ||
33 | /* SCU base address */ | 34 | /* SCU base address */ |
diff --git a/arch/arm/mach-omap2/opp2420_data.c b/arch/arm/mach-omap2/opp2420_data.c index e6dda694fd5c..5037e76e4e23 100644 --- a/arch/arm/mach-omap2/opp2420_data.c +++ b/arch/arm/mach-omap2/opp2420_data.c | |||
@@ -28,6 +28,8 @@ | |||
28 | * http://repository.maemo.org/pool/diablo/free/k/kernel-source-diablo/ | 28 | * http://repository.maemo.org/pool/diablo/free/k/kernel-source-diablo/ |
29 | */ | 29 | */ |
30 | 30 | ||
31 | #include <plat/hardware.h> | ||
32 | |||
31 | #include "opp2xxx.h" | 33 | #include "opp2xxx.h" |
32 | #include "sdrc.h" | 34 | #include "sdrc.h" |
33 | #include "clock.h" | 35 | #include "clock.h" |
diff --git a/arch/arm/mach-omap2/opp2430_data.c b/arch/arm/mach-omap2/opp2430_data.c index 1b9596ae201e..750805c528d8 100644 --- a/arch/arm/mach-omap2/opp2430_data.c +++ b/arch/arm/mach-omap2/opp2430_data.c | |||
@@ -26,6 +26,8 @@ | |||
26 | * This is technically part of the OMAP2xxx clock code. | 26 | * This is technically part of the OMAP2xxx clock code. |
27 | */ | 27 | */ |
28 | 28 | ||
29 | #include <plat/hardware.h> | ||
30 | |||
29 | #include "opp2xxx.h" | 31 | #include "opp2xxx.h" |
30 | #include "sdrc.h" | 32 | #include "sdrc.h" |
31 | #include "clock.h" | 33 | #include "clock.h" |
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 4411163e012d..814bcd901596 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c | |||
@@ -220,8 +220,8 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *dir) | |||
220 | return 0; | 220 | return 0; |
221 | 221 | ||
222 | d = debugfs_create_dir(pwrdm->name, (struct dentry *)dir); | 222 | d = debugfs_create_dir(pwrdm->name, (struct dentry *)dir); |
223 | 223 | if (!(IS_ERR_OR_NULL(d))) | |
224 | (void) debugfs_create_file("suspend", S_IRUGO|S_IWUSR, d, | 224 | (void) debugfs_create_file("suspend", S_IRUGO|S_IWUSR, d, |
225 | (void *)pwrdm, &pwrdm_suspend_fops); | 225 | (void *)pwrdm, &pwrdm_suspend_fops); |
226 | 226 | ||
227 | return 0; | 227 | return 0; |
@@ -264,7 +264,7 @@ static int __init pm_dbg_init(void) | |||
264 | return 0; | 264 | return 0; |
265 | 265 | ||
266 | d = debugfs_create_dir("pm_debug", NULL); | 266 | d = debugfs_create_dir("pm_debug", NULL); |
267 | if (IS_ERR(d)) | 267 | if (IS_ERR_OR_NULL(d)) |
268 | return PTR_ERR(d); | 268 | return PTR_ERR(d); |
269 | 269 | ||
270 | (void) debugfs_create_file("count", S_IRUGO, | 270 | (void) debugfs_create_file("count", S_IRUGO, |
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 1881fe915149..28706696a341 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c | |||
@@ -15,11 +15,13 @@ | |||
15 | #include <linux/err.h> | 15 | #include <linux/err.h> |
16 | #include <linux/opp.h> | 16 | #include <linux/opp.h> |
17 | #include <linux/export.h> | 17 | #include <linux/export.h> |
18 | #include <linux/suspend.h> | ||
18 | 19 | ||
19 | #include <plat/omap-pm.h> | 20 | #include <plat/omap-pm.h> |
20 | #include <plat/omap_device.h> | 21 | #include <plat/omap_device.h> |
21 | #include "common.h" | 22 | #include "common.h" |
22 | 23 | ||
24 | #include "prcm-common.h" | ||
23 | #include "voltage.h" | 25 | #include "voltage.h" |
24 | #include "powerdomain.h" | 26 | #include "powerdomain.h" |
25 | #include "clockdomain.h" | 27 | #include "clockdomain.h" |
@@ -28,7 +30,13 @@ | |||
28 | 30 | ||
29 | static struct omap_device_pm_latency *pm_lats; | 31 | static struct omap_device_pm_latency *pm_lats; |
30 | 32 | ||
31 | static int _init_omap_device(char *name) | 33 | /* |
34 | * omap_pm_suspend: points to a function that does the SoC-specific | ||
35 | * suspend work | ||
36 | */ | ||
37 | int (*omap_pm_suspend)(void); | ||
38 | |||
39 | static int __init _init_omap_device(char *name) | ||
32 | { | 40 | { |
33 | struct omap_hwmod *oh; | 41 | struct omap_hwmod *oh; |
34 | struct platform_device *pdev; | 42 | struct platform_device *pdev; |
@@ -68,32 +76,41 @@ static void omap2_init_processor_devices(void) | |||
68 | #define FORCEWAKEUP_SWITCH 0 | 76 | #define FORCEWAKEUP_SWITCH 0 |
69 | #define LOWPOWERSTATE_SWITCH 1 | 77 | #define LOWPOWERSTATE_SWITCH 1 |
70 | 78 | ||
79 | int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused) | ||
80 | { | ||
81 | if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO) | ||
82 | clkdm_allow_idle(clkdm); | ||
83 | else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP && | ||
84 | atomic_read(&clkdm->usecount) == 0) | ||
85 | clkdm_sleep(clkdm); | ||
86 | return 0; | ||
87 | } | ||
88 | |||
71 | /* | 89 | /* |
72 | * This sets pwrdm state (other than mpu & core. Currently only ON & | 90 | * This sets pwrdm state (other than mpu & core. Currently only ON & |
73 | * RET are supported. | 91 | * RET are supported. |
74 | */ | 92 | */ |
75 | int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) | 93 | int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 pwrst) |
76 | { | 94 | { |
77 | u32 cur_state; | 95 | u8 curr_pwrst, next_pwrst; |
78 | int sleep_switch = -1; | 96 | int sleep_switch = -1, ret = 0, hwsup = 0; |
79 | int ret = 0; | ||
80 | int hwsup = 0; | ||
81 | 97 | ||
82 | if (pwrdm == NULL || IS_ERR(pwrdm)) | 98 | if (!pwrdm || IS_ERR(pwrdm)) |
83 | return -EINVAL; | 99 | return -EINVAL; |
84 | 100 | ||
85 | while (!(pwrdm->pwrsts & (1 << state))) { | 101 | while (!(pwrdm->pwrsts & (1 << pwrst))) { |
86 | if (state == PWRDM_POWER_OFF) | 102 | if (pwrst == PWRDM_POWER_OFF) |
87 | return ret; | 103 | return ret; |
88 | state--; | 104 | pwrst--; |
89 | } | 105 | } |
90 | 106 | ||
91 | cur_state = pwrdm_read_next_pwrst(pwrdm); | 107 | next_pwrst = pwrdm_read_next_pwrst(pwrdm); |
92 | if (cur_state == state) | 108 | if (next_pwrst == pwrst) |
93 | return ret; | 109 | return ret; |
94 | 110 | ||
95 | if (pwrdm_read_pwrst(pwrdm) < PWRDM_POWER_ON) { | 111 | curr_pwrst = pwrdm_read_pwrst(pwrdm); |
96 | if ((pwrdm_read_pwrst(pwrdm) > state) && | 112 | if (curr_pwrst < PWRDM_POWER_ON) { |
113 | if ((curr_pwrst > pwrst) && | ||
97 | (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) { | 114 | (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) { |
98 | sleep_switch = LOWPOWERSTATE_SWITCH; | 115 | sleep_switch = LOWPOWERSTATE_SWITCH; |
99 | } else { | 116 | } else { |
@@ -103,12 +120,10 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) | |||
103 | } | 120 | } |
104 | } | 121 | } |
105 | 122 | ||
106 | ret = pwrdm_set_next_pwrst(pwrdm, state); | 123 | ret = pwrdm_set_next_pwrst(pwrdm, pwrst); |
107 | if (ret) { | 124 | if (ret) |
108 | pr_err("%s: unable to set state of powerdomain: %s\n", | 125 | pr_err("%s: unable to set power state of powerdomain: %s\n", |
109 | __func__, pwrdm->name); | 126 | __func__, pwrdm->name); |
110 | goto err; | ||
111 | } | ||
112 | 127 | ||
113 | switch (sleep_switch) { | 128 | switch (sleep_switch) { |
114 | case FORCEWAKEUP_SWITCH: | 129 | case FORCEWAKEUP_SWITCH: |
@@ -119,16 +134,16 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) | |||
119 | break; | 134 | break; |
120 | case LOWPOWERSTATE_SWITCH: | 135 | case LOWPOWERSTATE_SWITCH: |
121 | pwrdm_set_lowpwrstchange(pwrdm); | 136 | pwrdm_set_lowpwrstchange(pwrdm); |
137 | pwrdm_wait_transition(pwrdm); | ||
138 | pwrdm_state_switch(pwrdm); | ||
122 | break; | 139 | break; |
123 | default: | ||
124 | return ret; | ||
125 | } | 140 | } |
126 | 141 | ||
127 | pwrdm_state_switch(pwrdm); | ||
128 | err: | ||
129 | return ret; | 142 | return ret; |
130 | } | 143 | } |
131 | 144 | ||
145 | |||
146 | |||
132 | /* | 147 | /* |
133 | * This API is to be called during init to set the various voltage | 148 | * This API is to be called during init to set the various voltage |
134 | * domains to the voltage as per the opp table. Typically we boot up | 149 | * domains to the voltage as per the opp table. Typically we boot up |
@@ -196,6 +211,56 @@ exit: | |||
196 | return -EINVAL; | 211 | return -EINVAL; |
197 | } | 212 | } |
198 | 213 | ||
214 | #ifdef CONFIG_SUSPEND | ||
215 | static int omap_pm_enter(suspend_state_t suspend_state) | ||
216 | { | ||
217 | int ret = 0; | ||
218 | |||
219 | if (!omap_pm_suspend) | ||
220 | return -ENOENT; /* XXX doublecheck */ | ||
221 | |||
222 | switch (suspend_state) { | ||
223 | case PM_SUSPEND_STANDBY: | ||
224 | case PM_SUSPEND_MEM: | ||
225 | ret = omap_pm_suspend(); | ||
226 | break; | ||
227 | default: | ||
228 | ret = -EINVAL; | ||
229 | } | ||
230 | |||
231 | return ret; | ||
232 | } | ||
233 | |||
234 | static int omap_pm_begin(suspend_state_t state) | ||
235 | { | ||
236 | disable_hlt(); | ||
237 | if (cpu_is_omap34xx()) | ||
238 | omap_prcm_irq_prepare(); | ||
239 | return 0; | ||
240 | } | ||
241 | |||
242 | static void omap_pm_end(void) | ||
243 | { | ||
244 | enable_hlt(); | ||
245 | return; | ||
246 | } | ||
247 | |||
248 | static void omap_pm_finish(void) | ||
249 | { | ||
250 | if (cpu_is_omap34xx()) | ||
251 | omap_prcm_irq_complete(); | ||
252 | } | ||
253 | |||
254 | static const struct platform_suspend_ops omap_pm_ops = { | ||
255 | .begin = omap_pm_begin, | ||
256 | .end = omap_pm_end, | ||
257 | .enter = omap_pm_enter, | ||
258 | .finish = omap_pm_finish, | ||
259 | .valid = suspend_valid_only_mem, | ||
260 | }; | ||
261 | |||
262 | #endif /* CONFIG_SUSPEND */ | ||
263 | |||
199 | static void __init omap3_init_voltages(void) | 264 | static void __init omap3_init_voltages(void) |
200 | { | 265 | { |
201 | if (!cpu_is_omap34xx()) | 266 | if (!cpu_is_omap34xx()) |
@@ -238,6 +303,10 @@ static int __init omap2_common_pm_late_init(void) | |||
238 | /* Smartreflex device init */ | 303 | /* Smartreflex device init */ |
239 | omap_devinit_smartreflex(); | 304 | omap_devinit_smartreflex(); |
240 | 305 | ||
306 | #ifdef CONFIG_SUSPEND | ||
307 | suspend_set_ops(&omap_pm_ops); | ||
308 | #endif | ||
309 | |||
241 | return 0; | 310 | return 0; |
242 | } | 311 | } |
243 | late_initcall(omap2_common_pm_late_init); | 312 | late_initcall(omap2_common_pm_late_init); |
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 6cd954dd189f..36fa90b6ece8 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h | |||
@@ -21,6 +21,8 @@ extern void omap_sram_idle(void); | |||
21 | extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state); | 21 | extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state); |
22 | extern int omap3_idle_init(void); | 22 | extern int omap3_idle_init(void); |
23 | extern int omap4_idle_init(void); | 23 | extern int omap4_idle_init(void); |
24 | extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused); | ||
25 | extern int (*omap_pm_suspend)(void); | ||
24 | 26 | ||
25 | #if defined(CONFIG_PM_OPP) | 27 | #if defined(CONFIG_PM_OPP) |
26 | extern int omap3_opp_init(void); | 28 | extern int omap3_opp_init(void); |
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index 23de98d03841..5ca45ca76946 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c | |||
@@ -26,7 +26,6 @@ | |||
26 | #include <linux/module.h> | 26 | #include <linux/module.h> |
27 | #include <linux/delay.h> | 27 | #include <linux/delay.h> |
28 | #include <linux/clk.h> | 28 | #include <linux/clk.h> |
29 | #include <linux/io.h> | ||
30 | #include <linux/irq.h> | 29 | #include <linux/irq.h> |
31 | #include <linux/time.h> | 30 | #include <linux/time.h> |
32 | #include <linux/gpio.h> | 31 | #include <linux/gpio.h> |
@@ -35,12 +34,13 @@ | |||
35 | #include <asm/mach/irq.h> | 34 | #include <asm/mach/irq.h> |
36 | #include <asm/mach-types.h> | 35 | #include <asm/mach-types.h> |
37 | 36 | ||
38 | #include <mach/irqs.h> | ||
39 | #include <plat/clock.h> | 37 | #include <plat/clock.h> |
40 | #include <plat/sram.h> | 38 | #include <plat/sram.h> |
41 | #include <plat/dma.h> | 39 | #include <plat/dma.h> |
42 | #include <plat/board.h> | 40 | #include <plat/board.h> |
43 | 41 | ||
42 | #include <mach/irqs.h> | ||
43 | |||
44 | #include "common.h" | 44 | #include "common.h" |
45 | #include "prm2xxx_3xxx.h" | 45 | #include "prm2xxx_3xxx.h" |
46 | #include "prm-regbits-24xx.h" | 46 | #include "prm-regbits-24xx.h" |
@@ -49,23 +49,9 @@ | |||
49 | #include "sdrc.h" | 49 | #include "sdrc.h" |
50 | #include "pm.h" | 50 | #include "pm.h" |
51 | #include "control.h" | 51 | #include "control.h" |
52 | |||
53 | #include "powerdomain.h" | 52 | #include "powerdomain.h" |
54 | #include "clockdomain.h" | 53 | #include "clockdomain.h" |
55 | 54 | ||
56 | #ifdef CONFIG_SUSPEND | ||
57 | static suspend_state_t suspend_state = PM_SUSPEND_ON; | ||
58 | static inline bool is_suspending(void) | ||
59 | { | ||
60 | return (suspend_state != PM_SUSPEND_ON); | ||
61 | } | ||
62 | #else | ||
63 | static inline bool is_suspending(void) | ||
64 | { | ||
65 | return false; | ||
66 | } | ||
67 | #endif | ||
68 | |||
69 | static void (*omap2_sram_idle)(void); | 55 | static void (*omap2_sram_idle)(void); |
70 | static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl, | 56 | static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl, |
71 | void __iomem *sdrc_power); | 57 | void __iomem *sdrc_power); |
@@ -85,7 +71,7 @@ static int omap2_fclks_active(void) | |||
85 | return (f1 | f2) ? 1 : 0; | 71 | return (f1 | f2) ? 1 : 0; |
86 | } | 72 | } |
87 | 73 | ||
88 | static void omap2_enter_full_retention(void) | 74 | static int omap2_enter_full_retention(void) |
89 | { | 75 | { |
90 | u32 l; | 76 | u32 l; |
91 | 77 | ||
@@ -148,6 +134,8 @@ no_sleep: | |||
148 | 134 | ||
149 | /* Mask future PRCM-to-MPU interrupts */ | 135 | /* Mask future PRCM-to-MPU interrupts */ |
150 | omap2_prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET); | 136 | omap2_prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET); |
137 | |||
138 | return 0; | ||
151 | } | 139 | } |
152 | 140 | ||
153 | static int omap2_i2c_active(void) | 141 | static int omap2_i2c_active(void) |
@@ -226,7 +214,6 @@ static int omap2_can_sleep(void) | |||
226 | 214 | ||
227 | static void omap2_pm_idle(void) | 215 | static void omap2_pm_idle(void) |
228 | { | 216 | { |
229 | local_irq_disable(); | ||
230 | local_fiq_disable(); | 217 | local_fiq_disable(); |
231 | 218 | ||
232 | if (!omap2_can_sleep()) { | 219 | if (!omap2_can_sleep()) { |
@@ -243,78 +230,6 @@ static void omap2_pm_idle(void) | |||
243 | 230 | ||
244 | out: | 231 | out: |
245 | local_fiq_enable(); | 232 | local_fiq_enable(); |
246 | local_irq_enable(); | ||
247 | } | ||
248 | |||
249 | #ifdef CONFIG_SUSPEND | ||
250 | static int omap2_pm_begin(suspend_state_t state) | ||
251 | { | ||
252 | disable_hlt(); | ||
253 | suspend_state = state; | ||
254 | return 0; | ||
255 | } | ||
256 | |||
257 | static int omap2_pm_suspend(void) | ||
258 | { | ||
259 | u32 wken_wkup, mir1; | ||
260 | |||
261 | wken_wkup = omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN); | ||
262 | wken_wkup &= ~OMAP24XX_EN_GPT1_MASK; | ||
263 | omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN); | ||
264 | |||
265 | /* Mask GPT1 */ | ||
266 | mir1 = omap_readl(0x480fe0a4); | ||
267 | omap_writel(1 << 5, 0x480fe0ac); | ||
268 | |||
269 | omap2_enter_full_retention(); | ||
270 | |||
271 | omap_writel(mir1, 0x480fe0a4); | ||
272 | omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN); | ||
273 | |||
274 | return 0; | ||
275 | } | ||
276 | |||
277 | static int omap2_pm_enter(suspend_state_t state) | ||
278 | { | ||
279 | int ret = 0; | ||
280 | |||
281 | switch (state) { | ||
282 | case PM_SUSPEND_STANDBY: | ||
283 | case PM_SUSPEND_MEM: | ||
284 | ret = omap2_pm_suspend(); | ||
285 | break; | ||
286 | default: | ||
287 | ret = -EINVAL; | ||
288 | } | ||
289 | |||
290 | return ret; | ||
291 | } | ||
292 | |||
293 | static void omap2_pm_end(void) | ||
294 | { | ||
295 | suspend_state = PM_SUSPEND_ON; | ||
296 | enable_hlt(); | ||
297 | } | ||
298 | |||
299 | static const struct platform_suspend_ops omap_pm_ops = { | ||
300 | .begin = omap2_pm_begin, | ||
301 | .enter = omap2_pm_enter, | ||
302 | .end = omap2_pm_end, | ||
303 | .valid = suspend_valid_only_mem, | ||
304 | }; | ||
305 | #else | ||
306 | static const struct platform_suspend_ops __initdata omap_pm_ops; | ||
307 | #endif /* CONFIG_SUSPEND */ | ||
308 | |||
309 | /* XXX This function should be shareable between OMAP2xxx and OMAP3 */ | ||
310 | static int __init clkdms_setup(struct clockdomain *clkdm, void *unused) | ||
311 | { | ||
312 | if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO) | ||
313 | clkdm_allow_idle(clkdm); | ||
314 | else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP && | ||
315 | atomic_read(&clkdm->usecount) == 0) | ||
316 | clkdm_sleep(clkdm); | ||
317 | return 0; | ||
318 | } | 233 | } |
319 | 234 | ||
320 | static void __init prcm_setup_regs(void) | 235 | static void __init prcm_setup_regs(void) |
@@ -358,9 +273,13 @@ static void __init prcm_setup_regs(void) | |||
358 | clkdm_sleep(gfx_clkdm); | 273 | clkdm_sleep(gfx_clkdm); |
359 | 274 | ||
360 | /* Enable hardware-supervised idle for all clkdms */ | 275 | /* Enable hardware-supervised idle for all clkdms */ |
361 | clkdm_for_each(clkdms_setup, NULL); | 276 | clkdm_for_each(omap_pm_clkdms_setup, NULL); |
362 | clkdm_add_wkdep(mpu_clkdm, wkup_clkdm); | 277 | clkdm_add_wkdep(mpu_clkdm, wkup_clkdm); |
363 | 278 | ||
279 | #ifdef CONFIG_SUSPEND | ||
280 | omap_pm_suspend = omap2_enter_full_retention; | ||
281 | #endif | ||
282 | |||
364 | /* REVISIT: Configure number of 32 kHz clock cycles for sys_clk | 283 | /* REVISIT: Configure number of 32 kHz clock cycles for sys_clk |
365 | * stabilisation */ | 284 | * stabilisation */ |
366 | omap2_prm_write_mod_reg(15 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD, | 285 | omap2_prm_write_mod_reg(15 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD, |
@@ -461,8 +380,7 @@ static int __init omap2_pm_init(void) | |||
461 | omap24xx_cpu_suspend_sz); | 380 | omap24xx_cpu_suspend_sz); |
462 | } | 381 | } |
463 | 382 | ||
464 | suspend_set_ops(&omap_pm_ops); | 383 | arm_pm_idle = omap2_pm_idle; |
465 | pm_idle = omap2_pm_idle; | ||
466 | 384 | ||
467 | return 0; | 385 | return 0; |
468 | } | 386 | } |
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index fc6987578920..027a537d72b2 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
@@ -50,10 +50,6 @@ | |||
50 | #include "sdrc.h" | 50 | #include "sdrc.h" |
51 | #include "control.h" | 51 | #include "control.h" |
52 | 52 | ||
53 | #ifdef CONFIG_SUSPEND | ||
54 | static suspend_state_t suspend_state = PM_SUSPEND_ON; | ||
55 | #endif | ||
56 | |||
57 | /* pm34xx errata defined in pm.h */ | 53 | /* pm34xx errata defined in pm.h */ |
58 | u16 pm34xx_errata; | 54 | u16 pm34xx_errata; |
59 | 55 | ||
@@ -75,16 +71,6 @@ static struct powerdomain *mpu_pwrdm, *neon_pwrdm; | |||
75 | static struct powerdomain *core_pwrdm, *per_pwrdm; | 71 | static struct powerdomain *core_pwrdm, *per_pwrdm; |
76 | static struct powerdomain *cam_pwrdm; | 72 | static struct powerdomain *cam_pwrdm; |
77 | 73 | ||
78 | static inline void omap3_per_save_context(void) | ||
79 | { | ||
80 | omap_gpio_save_context(); | ||
81 | } | ||
82 | |||
83 | static inline void omap3_per_restore_context(void) | ||
84 | { | ||
85 | omap_gpio_restore_context(); | ||
86 | } | ||
87 | |||
88 | static void omap3_enable_io_chain(void) | 74 | static void omap3_enable_io_chain(void) |
89 | { | 75 | { |
90 | int timeout = 0; | 76 | int timeout = 0; |
@@ -290,11 +276,6 @@ void omap_sram_idle(void) | |||
290 | int core_prev_state, per_prev_state; | 276 | int core_prev_state, per_prev_state; |
291 | u32 sdrc_pwr = 0; | 277 | u32 sdrc_pwr = 0; |
292 | 278 | ||
293 | pwrdm_clear_all_prev_pwrst(mpu_pwrdm); | ||
294 | pwrdm_clear_all_prev_pwrst(neon_pwrdm); | ||
295 | pwrdm_clear_all_prev_pwrst(core_pwrdm); | ||
296 | pwrdm_clear_all_prev_pwrst(per_pwrdm); | ||
297 | |||
298 | mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm); | 279 | mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm); |
299 | switch (mpu_next_state) { | 280 | switch (mpu_next_state) { |
300 | case PWRDM_POWER_ON: | 281 | case PWRDM_POWER_ON: |
@@ -332,8 +313,6 @@ void omap_sram_idle(void) | |||
332 | if (per_next_state < PWRDM_POWER_ON) { | 313 | if (per_next_state < PWRDM_POWER_ON) { |
333 | per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0; | 314 | per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0; |
334 | omap2_gpio_prepare_for_idle(per_going_off); | 315 | omap2_gpio_prepare_for_idle(per_going_off); |
335 | if (per_next_state == PWRDM_POWER_OFF) | ||
336 | omap3_per_save_context(); | ||
337 | } | 316 | } |
338 | 317 | ||
339 | /* CORE */ | 318 | /* CORE */ |
@@ -399,8 +378,6 @@ void omap_sram_idle(void) | |||
399 | if (per_next_state < PWRDM_POWER_ON) { | 378 | if (per_next_state < PWRDM_POWER_ON) { |
400 | per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm); | 379 | per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm); |
401 | omap2_gpio_resume_after_idle(); | 380 | omap2_gpio_resume_after_idle(); |
402 | if (per_prev_state == PWRDM_POWER_OFF) | ||
403 | omap3_per_restore_context(); | ||
404 | } | 381 | } |
405 | 382 | ||
406 | /* Disable IO-PAD and IO-CHAIN wakeup */ | 383 | /* Disable IO-PAD and IO-CHAIN wakeup */ |
@@ -418,10 +395,9 @@ void omap_sram_idle(void) | |||
418 | 395 | ||
419 | static void omap3_pm_idle(void) | 396 | static void omap3_pm_idle(void) |
420 | { | 397 | { |
421 | local_irq_disable(); | ||
422 | local_fiq_disable(); | 398 | local_fiq_disable(); |
423 | 399 | ||
424 | if (omap_irq_pending() || need_resched()) | 400 | if (omap_irq_pending()) |
425 | goto out; | 401 | goto out; |
426 | 402 | ||
427 | trace_power_start(POWER_CSTATE, 1, smp_processor_id()); | 403 | trace_power_start(POWER_CSTATE, 1, smp_processor_id()); |
@@ -434,7 +410,6 @@ static void omap3_pm_idle(void) | |||
434 | 410 | ||
435 | out: | 411 | out: |
436 | local_fiq_enable(); | 412 | local_fiq_enable(); |
437 | local_irq_enable(); | ||
438 | } | 413 | } |
439 | 414 | ||
440 | #ifdef CONFIG_SUSPEND | 415 | #ifdef CONFIG_SUSPEND |
@@ -479,50 +454,6 @@ restore: | |||
479 | return ret; | 454 | return ret; |
480 | } | 455 | } |
481 | 456 | ||
482 | static int omap3_pm_enter(suspend_state_t unused) | ||
483 | { | ||
484 | int ret = 0; | ||
485 | |||
486 | switch (suspend_state) { | ||
487 | case PM_SUSPEND_STANDBY: | ||
488 | case PM_SUSPEND_MEM: | ||
489 | ret = omap3_pm_suspend(); | ||
490 | break; | ||
491 | default: | ||
492 | ret = -EINVAL; | ||
493 | } | ||
494 | |||
495 | return ret; | ||
496 | } | ||
497 | |||
498 | /* Hooks to enable / disable UART interrupts during suspend */ | ||
499 | static int omap3_pm_begin(suspend_state_t state) | ||
500 | { | ||
501 | disable_hlt(); | ||
502 | suspend_state = state; | ||
503 | omap_prcm_irq_prepare(); | ||
504 | return 0; | ||
505 | } | ||
506 | |||
507 | static void omap3_pm_end(void) | ||
508 | { | ||
509 | suspend_state = PM_SUSPEND_ON; | ||
510 | enable_hlt(); | ||
511 | return; | ||
512 | } | ||
513 | |||
514 | static void omap3_pm_finish(void) | ||
515 | { | ||
516 | omap_prcm_irq_complete(); | ||
517 | } | ||
518 | |||
519 | static const struct platform_suspend_ops omap_pm_ops = { | ||
520 | .begin = omap3_pm_begin, | ||
521 | .end = omap3_pm_end, | ||
522 | .enter = omap3_pm_enter, | ||
523 | .finish = omap3_pm_finish, | ||
524 | .valid = suspend_valid_only_mem, | ||
525 | }; | ||
526 | #endif /* CONFIG_SUSPEND */ | 457 | #endif /* CONFIG_SUSPEND */ |
527 | 458 | ||
528 | 459 | ||
@@ -743,21 +674,6 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) | |||
743 | } | 674 | } |
744 | 675 | ||
745 | /* | 676 | /* |
746 | * Enable hw supervised mode for all clockdomains if it's | ||
747 | * supported. Initiate sleep transition for other clockdomains, if | ||
748 | * they are not used | ||
749 | */ | ||
750 | static int __init clkdms_setup(struct clockdomain *clkdm, void *unused) | ||
751 | { | ||
752 | if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO) | ||
753 | clkdm_allow_idle(clkdm); | ||
754 | else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP && | ||
755 | atomic_read(&clkdm->usecount) == 0) | ||
756 | clkdm_sleep(clkdm); | ||
757 | return 0; | ||
758 | } | ||
759 | |||
760 | /* | ||
761 | * Push functions to SRAM | 677 | * Push functions to SRAM |
762 | * | 678 | * |
763 | * The minimum set of functions is pushed to SRAM for execution: | 679 | * The minimum set of functions is pushed to SRAM for execution: |
@@ -826,7 +742,7 @@ static int __init omap3_pm_init(void) | |||
826 | goto err2; | 742 | goto err2; |
827 | } | 743 | } |
828 | 744 | ||
829 | (void) clkdm_for_each(clkdms_setup, NULL); | 745 | (void) clkdm_for_each(omap_pm_clkdms_setup, NULL); |
830 | 746 | ||
831 | mpu_pwrdm = pwrdm_lookup("mpu_pwrdm"); | 747 | mpu_pwrdm = pwrdm_lookup("mpu_pwrdm"); |
832 | if (mpu_pwrdm == NULL) { | 748 | if (mpu_pwrdm == NULL) { |
@@ -845,10 +761,10 @@ static int __init omap3_pm_init(void) | |||
845 | core_clkdm = clkdm_lookup("core_clkdm"); | 761 | core_clkdm = clkdm_lookup("core_clkdm"); |
846 | 762 | ||
847 | #ifdef CONFIG_SUSPEND | 763 | #ifdef CONFIG_SUSPEND |
848 | suspend_set_ops(&omap_pm_ops); | 764 | omap_pm_suspend = omap3_pm_suspend; |
849 | #endif /* CONFIG_SUSPEND */ | 765 | #endif |
850 | 766 | ||
851 | pm_idle = omap3_pm_idle; | 767 | arm_pm_idle = omap3_pm_idle; |
852 | omap3_idle_init(); | 768 | omap3_idle_init(); |
853 | 769 | ||
854 | /* | 770 | /* |
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c index c264ef7219c1..91e0b1c9b76c 100644 --- a/arch/arm/mach-omap2/pm44xx.c +++ b/arch/arm/mach-omap2/pm44xx.c | |||
@@ -83,59 +83,8 @@ static int omap4_pm_suspend(void) | |||
83 | 83 | ||
84 | return 0; | 84 | return 0; |
85 | } | 85 | } |
86 | |||
87 | static int omap4_pm_enter(suspend_state_t suspend_state) | ||
88 | { | ||
89 | int ret = 0; | ||
90 | |||
91 | switch (suspend_state) { | ||
92 | case PM_SUSPEND_STANDBY: | ||
93 | case PM_SUSPEND_MEM: | ||
94 | ret = omap4_pm_suspend(); | ||
95 | break; | ||
96 | default: | ||
97 | ret = -EINVAL; | ||
98 | } | ||
99 | |||
100 | return ret; | ||
101 | } | ||
102 | |||
103 | static int omap4_pm_begin(suspend_state_t state) | ||
104 | { | ||
105 | disable_hlt(); | ||
106 | return 0; | ||
107 | } | ||
108 | |||
109 | static void omap4_pm_end(void) | ||
110 | { | ||
111 | enable_hlt(); | ||
112 | return; | ||
113 | } | ||
114 | |||
115 | static const struct platform_suspend_ops omap_pm_ops = { | ||
116 | .begin = omap4_pm_begin, | ||
117 | .end = omap4_pm_end, | ||
118 | .enter = omap4_pm_enter, | ||
119 | .valid = suspend_valid_only_mem, | ||
120 | }; | ||
121 | #endif /* CONFIG_SUSPEND */ | 86 | #endif /* CONFIG_SUSPEND */ |
122 | 87 | ||
123 | /* | ||
124 | * Enable hardware supervised mode for all clockdomains if it's | ||
125 | * supported. Initiate sleep transition for other clockdomains, if | ||
126 | * they are not used | ||
127 | */ | ||
128 | static int __init clkdms_setup(struct clockdomain *clkdm, void *unused) | ||
129 | { | ||
130 | if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO) | ||
131 | clkdm_allow_idle(clkdm); | ||
132 | else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP && | ||
133 | atomic_read(&clkdm->usecount) == 0) | ||
134 | clkdm_sleep(clkdm); | ||
135 | return 0; | ||
136 | } | ||
137 | |||
138 | |||
139 | static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) | 88 | static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) |
140 | { | 89 | { |
141 | struct power_state *pwrst; | 90 | struct power_state *pwrst; |
@@ -173,18 +122,16 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) | |||
173 | * omap_default_idle - OMAP4 default ilde routine.' | 122 | * omap_default_idle - OMAP4 default ilde routine.' |
174 | * | 123 | * |
175 | * Implements OMAP4 memory, IO ordering requirements which can't be addressed | 124 | * Implements OMAP4 memory, IO ordering requirements which can't be addressed |
176 | * with default arch_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and | 125 | * with default cpu_do_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and |
177 | * by secondary CPU with CONFIG_CPUIDLE. | 126 | * by secondary CPU with CONFIG_CPUIDLE. |
178 | */ | 127 | */ |
179 | static void omap_default_idle(void) | 128 | static void omap_default_idle(void) |
180 | { | 129 | { |
181 | local_irq_disable(); | ||
182 | local_fiq_disable(); | 130 | local_fiq_disable(); |
183 | 131 | ||
184 | omap_do_wfi(); | 132 | omap_do_wfi(); |
185 | 133 | ||
186 | local_fiq_enable(); | 134 | local_fiq_enable(); |
187 | local_irq_enable(); | ||
188 | } | 135 | } |
189 | 136 | ||
190 | /** | 137 | /** |
@@ -249,14 +196,14 @@ static int __init omap4_pm_init(void) | |||
249 | goto err2; | 196 | goto err2; |
250 | } | 197 | } |
251 | 198 | ||
252 | (void) clkdm_for_each(clkdms_setup, NULL); | 199 | (void) clkdm_for_each(omap_pm_clkdms_setup, NULL); |
253 | 200 | ||
254 | #ifdef CONFIG_SUSPEND | 201 | #ifdef CONFIG_SUSPEND |
255 | suspend_set_ops(&omap_pm_ops); | 202 | omap_pm_suspend = omap4_pm_suspend; |
256 | #endif /* CONFIG_SUSPEND */ | 203 | #endif |
257 | 204 | ||
258 | /* Overwrite the default arch_idle() */ | 205 | /* Overwrite the default cpu_do_idle() */ |
259 | pm_idle = omap_default_idle; | 206 | arm_pm_idle = omap_default_idle; |
260 | 207 | ||
261 | omap4_idle_init(); | 208 | omap4_idle_init(); |
262 | 209 | ||
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c b/arch/arm/mach-omap2/prcm_mpu44xx.c index ca669b50f390..928dbd4f20ed 100644 --- a/arch/arm/mach-omap2/prcm_mpu44xx.c +++ b/arch/arm/mach-omap2/prcm_mpu44xx.c | |||
@@ -15,8 +15,8 @@ | |||
15 | #include <linux/err.h> | 15 | #include <linux/err.h> |
16 | #include <linux/io.h> | 16 | #include <linux/io.h> |
17 | 17 | ||
18 | #include "iomap.h" | ||
18 | #include "common.h" | 19 | #include "common.h" |
19 | |||
20 | #include "prcm_mpu44xx.h" | 20 | #include "prcm_mpu44xx.h" |
21 | #include "cm-regbits-44xx.h" | 21 | #include "cm-regbits-44xx.h" |
22 | 22 | ||
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index a1d6154dc120..eac623c7c3d8 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c | |||
@@ -17,11 +17,12 @@ | |||
17 | #include <linux/err.h> | 17 | #include <linux/err.h> |
18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
19 | 19 | ||
20 | #include "common.h" | ||
21 | #include <plat/cpu.h> | 20 | #include <plat/cpu.h> |
22 | #include <plat/irqs.h> | 21 | #include <plat/irqs.h> |
23 | #include <plat/prcm.h> | 22 | #include <plat/prcm.h> |
24 | 23 | ||
24 | #include "iomap.h" | ||
25 | #include "common.h" | ||
25 | #include "vp.h" | 26 | #include "vp.h" |
26 | #include "prm44xx.h" | 27 | #include "prm44xx.h" |
27 | #include "prm-regbits-44xx.h" | 28 | #include "prm-regbits-44xx.h" |
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 860118ab43e2..873b51d494ea 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c | |||
@@ -24,7 +24,6 @@ | |||
24 | #include <linux/interrupt.h> | 24 | #include <linux/interrupt.h> |
25 | #include <linux/slab.h> | 25 | #include <linux/slab.h> |
26 | 26 | ||
27 | #include <mach/system.h> | ||
28 | #include <plat/common.h> | 27 | #include <plat/common.h> |
29 | #include <plat/prcm.h> | 28 | #include <plat/prcm.h> |
30 | #include <plat/irqs.h> | 29 | #include <plat/irqs.h> |
diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c index f6de5bc6b12a..9b3898a3ac9b 100644 --- a/arch/arm/mach-omap2/prminst44xx.c +++ b/arch/arm/mach-omap2/prminst44xx.c | |||
@@ -16,8 +16,8 @@ | |||
16 | #include <linux/err.h> | 16 | #include <linux/err.h> |
17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
18 | 18 | ||
19 | #include "iomap.h" | ||
19 | #include "common.h" | 20 | #include "common.h" |
20 | |||
21 | #include "prm44xx.h" | 21 | #include "prm44xx.h" |
22 | #include "prminst44xx.h" | 22 | #include "prminst44xx.h" |
23 | #include "prm-regbits-44xx.h" | 23 | #include "prm-regbits-44xx.h" |
diff --git a/arch/arm/mach-omap2/sdram-nokia.c b/arch/arm/mach-omap2/sdram-nokia.c index 7479d7ea1379..845c4fd2b125 100644 --- a/arch/arm/mach-omap2/sdram-nokia.c +++ b/arch/arm/mach-omap2/sdram-nokia.c | |||
@@ -17,7 +17,6 @@ | |||
17 | #include <linux/err.h> | 17 | #include <linux/err.h> |
18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
19 | 19 | ||
20 | #include <plat/io.h> | ||
21 | #include "common.h" | 20 | #include "common.h" |
22 | #include <plat/clock.h> | 21 | #include <plat/clock.h> |
23 | #include <plat/sdrc.h> | 22 | #include <plat/sdrc.h> |
diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c index 791a63cdceb2..1133bb2f632b 100644 --- a/arch/arm/mach-omap2/sdrc2xxx.c +++ b/arch/arm/mach-omap2/sdrc2xxx.c | |||
@@ -24,13 +24,15 @@ | |||
24 | #include <linux/clk.h> | 24 | #include <linux/clk.h> |
25 | #include <linux/io.h> | 25 | #include <linux/io.h> |
26 | 26 | ||
27 | #include "common.h" | 27 | #include <plat/hardware.h> |
28 | #include <plat/clock.h> | 28 | #include <plat/clock.h> |
29 | #include <plat/sram.h> | 29 | #include <plat/sram.h> |
30 | #include <plat/sdrc.h> | ||
30 | 31 | ||
32 | #include "iomap.h" | ||
33 | #include "common.h" | ||
31 | #include "prm2xxx_3xxx.h" | 34 | #include "prm2xxx_3xxx.h" |
32 | #include "clock.h" | 35 | #include "clock.h" |
33 | #include <plat/sdrc.h> | ||
34 | #include "sdrc.h" | 36 | #include "sdrc.h" |
35 | 37 | ||
36 | /* Memory timing, DLL mode flags */ | 38 | /* Memory timing, DLL mode flags */ |
diff --git a/arch/arm/mach-omap2/sleep24xx.S b/arch/arm/mach-omap2/sleep24xx.S index b5071a47ec39..d4bf904d84ab 100644 --- a/arch/arm/mach-omap2/sleep24xx.S +++ b/arch/arm/mach-omap2/sleep24xx.S | |||
@@ -27,7 +27,6 @@ | |||
27 | 27 | ||
28 | #include <linux/linkage.h> | 28 | #include <linux/linkage.h> |
29 | #include <asm/assembler.h> | 29 | #include <asm/assembler.h> |
30 | #include <mach/io.h> | ||
31 | 30 | ||
32 | #include <plat/omap24xx.h> | 31 | #include <plat/omap24xx.h> |
33 | 32 | ||
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index f2ea1bd1c691..1f62f23673fb 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S | |||
@@ -23,10 +23,13 @@ | |||
23 | * MA 02111-1307 USA | 23 | * MA 02111-1307 USA |
24 | */ | 24 | */ |
25 | #include <linux/linkage.h> | 25 | #include <linux/linkage.h> |
26 | |||
26 | #include <asm/assembler.h> | 27 | #include <asm/assembler.h> |
28 | |||
29 | #include <plat/hardware.h> | ||
27 | #include <plat/sram.h> | 30 | #include <plat/sram.h> |
28 | #include <mach/io.h> | ||
29 | 31 | ||
32 | #include "iomap.h" | ||
30 | #include "cm2xxx_3xxx.h" | 33 | #include "cm2xxx_3xxx.h" |
31 | #include "prm2xxx_3xxx.h" | 34 | #include "prm2xxx_3xxx.h" |
32 | #include "sdrc.h" | 35 | #include "sdrc.h" |
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c index 9f43fcc05d3e..78c9437913ce 100644 --- a/arch/arm/mach-omap2/sr_device.c +++ b/arch/arm/mach-omap2/sr_device.c | |||
@@ -69,7 +69,7 @@ static void __init sr_set_nvalues(struct omap_volt_data *volt_data, | |||
69 | sr_data->nvalue_count = count; | 69 | sr_data->nvalue_count = count; |
70 | } | 70 | } |
71 | 71 | ||
72 | static int sr_dev_init(struct omap_hwmod *oh, void *user) | 72 | static int __init sr_dev_init(struct omap_hwmod *oh, void *user) |
73 | { | 73 | { |
74 | struct omap_sr_data *sr_data; | 74 | struct omap_sr_data *sr_data; |
75 | struct platform_device *pdev; | 75 | struct platform_device *pdev; |
diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S index ff9b9dbcb30e..ee0bfcc1410f 100644 --- a/arch/arm/mach-omap2/sram242x.S +++ b/arch/arm/mach-omap2/sram242x.S | |||
@@ -29,10 +29,12 @@ | |||
29 | * These crashes may be intermittent. | 29 | * These crashes may be intermittent. |
30 | */ | 30 | */ |
31 | #include <linux/linkage.h> | 31 | #include <linux/linkage.h> |
32 | |||
32 | #include <asm/assembler.h> | 33 | #include <asm/assembler.h> |
33 | #include <mach/io.h> | 34 | |
34 | #include <mach/hardware.h> | 35 | #include <mach/hardware.h> |
35 | 36 | ||
37 | #include "iomap.h" | ||
36 | #include "prm2xxx_3xxx.h" | 38 | #include "prm2xxx_3xxx.h" |
37 | #include "cm2xxx_3xxx.h" | 39 | #include "cm2xxx_3xxx.h" |
38 | #include "sdrc.h" | 40 | #include "sdrc.h" |
diff --git a/arch/arm/mach-omap2/sram243x.S b/arch/arm/mach-omap2/sram243x.S index 76730209fa0e..d4d39ef04769 100644 --- a/arch/arm/mach-omap2/sram243x.S +++ b/arch/arm/mach-omap2/sram243x.S | |||
@@ -29,10 +29,12 @@ | |||
29 | * These crashes may be intermittent. | 29 | * These crashes may be intermittent. |
30 | */ | 30 | */ |
31 | #include <linux/linkage.h> | 31 | #include <linux/linkage.h> |
32 | |||
32 | #include <asm/assembler.h> | 33 | #include <asm/assembler.h> |
33 | #include <mach/io.h> | 34 | |
34 | #include <mach/hardware.h> | 35 | #include <mach/hardware.h> |
35 | 36 | ||
37 | #include "iomap.h" | ||
36 | #include "prm2xxx_3xxx.h" | 38 | #include "prm2xxx_3xxx.h" |
37 | #include "cm2xxx_3xxx.h" | 39 | #include "cm2xxx_3xxx.h" |
38 | #include "sdrc.h" | 40 | #include "sdrc.h" |
diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S index 6f5849aaa7c0..df5a21322b0a 100644 --- a/arch/arm/mach-omap2/sram34xx.S +++ b/arch/arm/mach-omap2/sram34xx.S | |||
@@ -26,11 +26,12 @@ | |||
26 | * MA 02111-1307 USA | 26 | * MA 02111-1307 USA |
27 | */ | 27 | */ |
28 | #include <linux/linkage.h> | 28 | #include <linux/linkage.h> |
29 | |||
29 | #include <asm/assembler.h> | 30 | #include <asm/assembler.h> |
30 | #include <mach/hardware.h> | ||
31 | 31 | ||
32 | #include <mach/io.h> | 32 | #include <mach/hardware.h> |
33 | 33 | ||
34 | #include "iomap.h" | ||
34 | #include "sdrc.h" | 35 | #include "sdrc.h" |
35 | #include "cm2xxx_3xxx.h" | 36 | #include "cm2xxx_3xxx.h" |
36 | 37 | ||
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c index c005e2f5e383..57db2038b23c 100644 --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | |||
@@ -108,6 +108,7 @@ void __init omap3xxx_voltagedomains_init(void) | |||
108 | * XXX Will depend on the process, validation, and binning | 108 | * XXX Will depend on the process, validation, and binning |
109 | * for the currently-running IC | 109 | * for the currently-running IC |
110 | */ | 110 | */ |
111 | #ifdef CONFIG_PM_OPP | ||
111 | if (cpu_is_omap3630()) { | 112 | if (cpu_is_omap3630()) { |
112 | omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data; | 113 | omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data; |
113 | omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data; | 114 | omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data; |
@@ -115,6 +116,7 @@ void __init omap3xxx_voltagedomains_init(void) | |||
115 | omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data; | 116 | omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data; |
116 | omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data; | 117 | omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data; |
117 | } | 118 | } |
119 | #endif | ||
118 | 120 | ||
119 | if (cpu_is_omap3517() || cpu_is_omap3505()) | 121 | if (cpu_is_omap3517() || cpu_is_omap3505()) |
120 | voltdms = voltagedomains_am35xx; | 122 | voltdms = voltagedomains_am35xx; |
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c index 4e11d022595d..c3115f6853d4 100644 --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c | |||
@@ -100,9 +100,11 @@ void __init omap44xx_voltagedomains_init(void) | |||
100 | * XXX Will depend on the process, validation, and binning | 100 | * XXX Will depend on the process, validation, and binning |
101 | * for the currently-running IC | 101 | * for the currently-running IC |
102 | */ | 102 | */ |
103 | #ifdef CONFIG_PM_OPP | ||
103 | omap4_voltdm_mpu.volt_data = omap44xx_vdd_mpu_volt_data; | 104 | omap4_voltdm_mpu.volt_data = omap44xx_vdd_mpu_volt_data; |
104 | omap4_voltdm_iva.volt_data = omap44xx_vdd_iva_volt_data; | 105 | omap4_voltdm_iva.volt_data = omap44xx_vdd_iva_volt_data; |
105 | omap4_voltdm_core.volt_data = omap44xx_vdd_core_volt_data; | 106 | omap4_voltdm_core.volt_data = omap44xx_vdd_core_volt_data; |
107 | #endif | ||
106 | 108 | ||
107 | for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++) | 109 | for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++) |
108 | voltdm->sys_clk.name = sys_clk_name; | 110 | voltdm->sys_clk.name = sys_clk_name; |
diff --git a/arch/arm/mach-orion5x/include/mach/entry-macro.S b/arch/arm/mach-orion5x/include/mach/entry-macro.S index d658992e5401..79eb502a1e64 100644 --- a/arch/arm/mach-orion5x/include/mach/entry-macro.S +++ b/arch/arm/mach-orion5x/include/mach/entry-macro.S | |||
@@ -10,12 +10,6 @@ | |||
10 | 10 | ||
11 | #include <mach/bridge-regs.h> | 11 | #include <mach/bridge-regs.h> |
12 | 12 | ||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
18 | |||
19 | .macro get_irqnr_preamble, base, tmp | 13 | .macro get_irqnr_preamble, base, tmp |
20 | ldr \base, =MAIN_IRQ_CAUSE | 14 | ldr \base, =MAIN_IRQ_CAUSE |
21 | .endm | 15 | .endm |
diff --git a/arch/arm/mach-orion5x/include/mach/system.h b/arch/arm/mach-orion5x/include/mach/system.h deleted file mode 100644 index 825a2650cefa..000000000000 --- a/arch/arm/mach-orion5x/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-orion5x/include/mach/system.h | ||
3 | * | ||
4 | * Tzachi Perelstein <tzachi@marvell.com> | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_SYSTEM_H | ||
12 | #define __ASM_ARCH_SYSTEM_H | ||
13 | |||
14 | static inline void arch_idle(void) | ||
15 | { | ||
16 | cpu_do_idle(); | ||
17 | } | ||
18 | |||
19 | #endif | ||
diff --git a/arch/arm/mach-picoxcell/include/mach/entry-macro.S b/arch/arm/mach-picoxcell/include/mach/entry-macro.S deleted file mode 100644 index 9b505ac00be9..000000000000 --- a/arch/arm/mach-picoxcell/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * entry-macro.S | ||
3 | * | ||
4 | * Copyright (c) 2011 Picochip Ltd., Jamie Iles | ||
5 | * | ||
6 | * Low-level IRQ helper macros for picoXcell platforms | ||
7 | * | ||
8 | * This file is licensed under the terms of the GNU General Public | ||
9 | * License version 2. This program is licensed "as is" without any | ||
10 | * warranty of any kind, whether express or implied. | ||
11 | */ | ||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro arch_ret_to_user, tmp1, tmp2 | ||
16 | .endm | ||
diff --git a/arch/arm/mach-picoxcell/include/mach/system.h b/arch/arm/mach-picoxcell/include/mach/system.h deleted file mode 100644 index 1a5d8cb57df4..000000000000 --- a/arch/arm/mach-picoxcell/include/mach/system.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2011 Picochip Ltd., Jamie Iles | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | */ | ||
14 | #ifndef __ASM_ARCH_SYSTEM_H | ||
15 | #define __ASM_ARCH_SYSTEM_H | ||
16 | |||
17 | static inline void arch_idle(void) | ||
18 | { | ||
19 | /* | ||
20 | * This should do all the clock switching and wait for interrupt | ||
21 | * tricks. | ||
22 | */ | ||
23 | cpu_do_idle(); | ||
24 | } | ||
25 | |||
26 | #endif /* __ASM_ARCH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-pnx4008/include/mach/entry-macro.S b/arch/arm/mach-pnx4008/include/mach/entry-macro.S index db7eeebf30d7..77a555846719 100644 --- a/arch/arm/mach-pnx4008/include/mach/entry-macro.S +++ b/arch/arm/mach-pnx4008/include/mach/entry-macro.S | |||
@@ -25,15 +25,9 @@ | |||
25 | #define SIC1_BASE_INT 32 | 25 | #define SIC1_BASE_INT 32 |
26 | #define SIC2_BASE_INT 64 | 26 | #define SIC2_BASE_INT 64 |
27 | 27 | ||
28 | .macro disable_fiq | ||
29 | .endm | ||
30 | |||
31 | .macro get_irqnr_preamble, base, tmp | 28 | .macro get_irqnr_preamble, base, tmp |
32 | .endm | 29 | .endm |
33 | 30 | ||
34 | .macro arch_ret_to_user, tmp1, tmp2 | ||
35 | .endm | ||
36 | |||
37 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 31 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
38 | /* decode the MIC interrupt numbers */ | 32 | /* decode the MIC interrupt numbers */ |
39 | ldr \base, =IO_ADDRESS(PNX4008_INTCTRLMIC_BASE) | 33 | ldr \base, =IO_ADDRESS(PNX4008_INTCTRLMIC_BASE) |
diff --git a/arch/arm/mach-pnx4008/include/mach/system.h b/arch/arm/mach-pnx4008/include/mach/system.h deleted file mode 100644 index 60cfe7188091..000000000000 --- a/arch/arm/mach-pnx4008/include/mach/system.h +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-pnx4008/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2003 Philips Semiconductors | ||
5 | * Copyright (C) 2005 MontaVista Software, Inc. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #ifndef __ASM_ARCH_SYSTEM_H | ||
22 | #define __ASM_ARCH_SYSTEM_H | ||
23 | |||
24 | static void arch_idle(void) | ||
25 | { | ||
26 | cpu_do_idle(); | ||
27 | } | ||
28 | |||
29 | #endif | ||
diff --git a/arch/arm/mach-prima2/include/mach/entry-macro.S b/arch/arm/mach-prima2/include/mach/entry-macro.S index 1c8a50f102a7..86434e7a5be9 100644 --- a/arch/arm/mach-prima2/include/mach/entry-macro.S +++ b/arch/arm/mach-prima2/include/mach/entry-macro.S | |||
@@ -20,10 +20,3 @@ | |||
20 | cmp \irqnr, #0x40 @ the irq num can't be larger than 0x3f | 20 | cmp \irqnr, #0x40 @ the irq num can't be larger than 0x3f |
21 | movges \irqnr, #0 | 21 | movges \irqnr, #0 |
22 | .endm | 22 | .endm |
23 | |||
24 | .macro disable_fiq | ||
25 | .endm | ||
26 | |||
27 | .macro arch_ret_to_user, tmp1, tmp2 | ||
28 | .endm | ||
29 | |||
diff --git a/arch/arm/mach-prima2/include/mach/system.h b/arch/arm/mach-prima2/include/mach/system.h deleted file mode 100644 index 2c7d2a9d0c92..000000000000 --- a/arch/arm/mach-prima2/include/mach/system.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-prima2/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. | ||
5 | * | ||
6 | * Licensed under GPLv2 or later. | ||
7 | */ | ||
8 | |||
9 | #ifndef __MACH_SYSTEM_H__ | ||
10 | #define __MACH_SYSTEM_H__ | ||
11 | |||
12 | static inline void arch_idle(void) | ||
13 | { | ||
14 | cpu_do_idle(); | ||
15 | } | ||
16 | |||
17 | #endif | ||
diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S deleted file mode 100644 index 260c0c17692a..000000000000 --- a/arch/arm/mach-pxa/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-pxa/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for PXA-based platforms | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro arch_ret_to_user, tmp1, tmp2 | ||
15 | .endm | ||
diff --git a/arch/arm/mach-pxa/include/mach/system.h b/arch/arm/mach-pxa/include/mach/system.h deleted file mode 100644 index c5afacd3cc0b..000000000000 --- a/arch/arm/mach-pxa/include/mach/system.h +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-pxa/include/mach/system.h | ||
3 | * | ||
4 | * Author: Nicolas Pitre | ||
5 | * Created: Jun 15, 2001 | ||
6 | * Copyright: MontaVista Software Inc. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | static inline void arch_idle(void) | ||
13 | { | ||
14 | cpu_do_idle(); | ||
15 | } | ||
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h index 735b57aaf2d6..f8f2c0ac4c01 100644 --- a/arch/arm/mach-realview/core.h +++ b/arch/arm/mach-realview/core.h | |||
@@ -28,21 +28,11 @@ | |||
28 | #include <asm/setup.h> | 28 | #include <asm/setup.h> |
29 | #include <asm/leds.h> | 29 | #include <asm/leds.h> |
30 | 30 | ||
31 | #define AMBA_DEVICE(name,busid,base,plat) \ | 31 | #define APB_DEVICE(name, busid, base, plat) \ |
32 | static struct amba_device name##_device = { \ | 32 | static AMBA_APB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat) |
33 | .dev = { \ | 33 | |
34 | .coherent_dma_mask = ~0, \ | 34 | #define AHB_DEVICE(name, busid, base, plat) \ |
35 | .init_name = busid, \ | 35 | static AMBA_AHB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat) |
36 | .platform_data = plat, \ | ||
37 | }, \ | ||
38 | .res = { \ | ||
39 | .start = REALVIEW_##base##_BASE, \ | ||
40 | .end = (REALVIEW_##base##_BASE) + SZ_4K - 1, \ | ||
41 | .flags = IORESOURCE_MEM, \ | ||
42 | }, \ | ||
43 | .dma_mask = ~0, \ | ||
44 | .irq = base##_IRQ, \ | ||
45 | } | ||
46 | 36 | ||
47 | struct machine_desc; | 37 | struct machine_desc; |
48 | 38 | ||
diff --git a/arch/arm/mach-realview/include/mach/entry-macro.S b/arch/arm/mach-realview/include/mach/entry-macro.S deleted file mode 100644 index e8a5179c2653..000000000000 --- a/arch/arm/mach-realview/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-realview/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for RealView platforms | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro arch_ret_to_user, tmp1, tmp2 | ||
15 | .endm | ||
16 | |||
diff --git a/arch/arm/mach-realview/include/mach/irqs-pb1176.h b/arch/arm/mach-realview/include/mach/irqs-pb1176.h index 5c3c625e3e04..708f84156f2c 100644 --- a/arch/arm/mach-realview/include/mach/irqs-pb1176.h +++ b/arch/arm/mach-realview/include/mach/irqs-pb1176.h | |||
@@ -40,6 +40,7 @@ | |||
40 | #define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) | 40 | #define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) |
41 | #define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) | 41 | #define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) |
42 | #define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ | 42 | #define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ |
43 | #define IRQ_DC1176_GPIO0 (IRQ_DC1176_GIC_START + 16) | ||
43 | #define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */ | 44 | #define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */ |
44 | #define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ | 45 | #define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ |
45 | #define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ | 46 | #define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ |
@@ -73,7 +74,6 @@ | |||
73 | #define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ | 74 | #define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ |
74 | #define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ | 75 | #define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ |
75 | 76 | ||
76 | #define IRQ_PB1176_GPIO0 -1 | ||
77 | #define IRQ_PB1176_SCTL -1 | 77 | #define IRQ_PB1176_SCTL -1 |
78 | 78 | ||
79 | #define NR_GIC_PB1176 2 | 79 | #define NR_GIC_PB1176 2 |
diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h deleted file mode 100644 index 471b671159ce..000000000000 --- a/arch/arm/mach-realview/include/mach/system.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-realview/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2003 ARM Limited | ||
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #ifndef __ASM_ARCH_SYSTEM_H | ||
22 | #define __ASM_ARCH_SYSTEM_H | ||
23 | |||
24 | static inline void arch_idle(void) | ||
25 | { | ||
26 | /* | ||
27 | * This should do all the clock switching | ||
28 | * and wait for interrupt tricks | ||
29 | */ | ||
30 | cpu_do_idle(); | ||
31 | } | ||
32 | |||
33 | #endif | ||
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index 9578145f2df0..157e1bc6e83c 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c | |||
@@ -135,63 +135,63 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
135 | /* | 135 | /* |
136 | * These devices are connected via the core APB bridge | 136 | * These devices are connected via the core APB bridge |
137 | */ | 137 | */ |
138 | #define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ } | 138 | #define GPIO2_IRQ { IRQ_EB_GPIO2 } |
139 | #define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ } | 139 | #define GPIO3_IRQ { IRQ_EB_GPIO3 } |
140 | 140 | ||
141 | #define AACI_IRQ { IRQ_EB_AACI, NO_IRQ } | 141 | #define AACI_IRQ { IRQ_EB_AACI } |
142 | #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } | 142 | #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } |
143 | #define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ } | 143 | #define KMI0_IRQ { IRQ_EB_KMI0 } |
144 | #define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ } | 144 | #define KMI1_IRQ { IRQ_EB_KMI1 } |
145 | 145 | ||
146 | /* | 146 | /* |
147 | * These devices are connected directly to the multi-layer AHB switch | 147 | * These devices are connected directly to the multi-layer AHB switch |
148 | */ | 148 | */ |
149 | #define EB_SMC_IRQ { NO_IRQ, NO_IRQ } | 149 | #define EB_SMC_IRQ { } |
150 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 150 | #define MPMC_IRQ { } |
151 | #define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ } | 151 | #define EB_CLCD_IRQ { IRQ_EB_CLCD } |
152 | #define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ } | 152 | #define DMAC_IRQ { IRQ_EB_DMA } |
153 | 153 | ||
154 | /* | 154 | /* |
155 | * These devices are connected via the core APB bridge | 155 | * These devices are connected via the core APB bridge |
156 | */ | 156 | */ |
157 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 157 | #define SCTL_IRQ { } |
158 | #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ } | 158 | #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG } |
159 | #define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ } | 159 | #define EB_GPIO0_IRQ { IRQ_EB_GPIO0 } |
160 | #define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ } | 160 | #define GPIO1_IRQ { IRQ_EB_GPIO1 } |
161 | #define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ } | 161 | #define EB_RTC_IRQ { IRQ_EB_RTC } |
162 | 162 | ||
163 | /* | 163 | /* |
164 | * These devices are connected via the DMA APB bridge | 164 | * These devices are connected via the DMA APB bridge |
165 | */ | 165 | */ |
166 | #define SCI_IRQ { IRQ_EB_SCI, NO_IRQ } | 166 | #define SCI_IRQ { IRQ_EB_SCI } |
167 | #define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ } | 167 | #define EB_UART0_IRQ { IRQ_EB_UART0 } |
168 | #define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ } | 168 | #define EB_UART1_IRQ { IRQ_EB_UART1 } |
169 | #define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ } | 169 | #define EB_UART2_IRQ { IRQ_EB_UART2 } |
170 | #define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ } | 170 | #define EB_UART3_IRQ { IRQ_EB_UART3 } |
171 | #define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ } | 171 | #define EB_SSP_IRQ { IRQ_EB_SSP } |
172 | 172 | ||
173 | /* FPGA Primecells */ | 173 | /* FPGA Primecells */ |
174 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 174 | APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
175 | AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); | 175 | APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); |
176 | AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); | 176 | APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); |
177 | AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); | 177 | APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); |
178 | AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL); | 178 | APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL); |
179 | 179 | ||
180 | /* DevChip Primecells */ | 180 | /* DevChip Primecells */ |
181 | AMBA_DEVICE(smc, "dev:smc", EB_SMC, NULL); | 181 | AHB_DEVICE(smc, "dev:smc", EB_SMC, NULL); |
182 | AMBA_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data); | 182 | AHB_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data); |
183 | AMBA_DEVICE(dmac, "dev:dmac", DMAC, NULL); | 183 | AHB_DEVICE(dmac, "dev:dmac", DMAC, NULL); |
184 | AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); | 184 | AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); |
185 | AMBA_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL); | 185 | APB_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL); |
186 | AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data); | 186 | APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data); |
187 | AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); | 187 | APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); |
188 | AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); | 188 | APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); |
189 | AMBA_DEVICE(rtc, "dev:rtc", EB_RTC, NULL); | 189 | APB_DEVICE(rtc, "dev:rtc", EB_RTC, NULL); |
190 | AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); | 190 | APB_DEVICE(sci0, "dev:sci0", SCI, NULL); |
191 | AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL); | 191 | APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL); |
192 | AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL); | 192 | APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL); |
193 | AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL); | 193 | APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL); |
194 | AMBA_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data); | 194 | APB_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data); |
195 | 195 | ||
196 | static struct amba_device *amba_devs[] __initdata = { | 196 | static struct amba_device *amba_devs[] __initdata = { |
197 | &dmac_device, | 197 | &dmac_device, |
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index e4abe94fb11a..b1d7cafa1a6d 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c | |||
@@ -132,50 +132,50 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
132 | /* | 132 | /* |
133 | * RealView PB1176 AMBA devices | 133 | * RealView PB1176 AMBA devices |
134 | */ | 134 | */ |
135 | #define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ } | 135 | #define GPIO2_IRQ { IRQ_PB1176_GPIO2 } |
136 | #define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ } | 136 | #define GPIO3_IRQ { IRQ_PB1176_GPIO3 } |
137 | #define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ } | 137 | #define AACI_IRQ { IRQ_PB1176_AACI } |
138 | #define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } | 138 | #define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } |
139 | #define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ } | 139 | #define KMI0_IRQ { IRQ_PB1176_KMI0 } |
140 | #define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ } | 140 | #define KMI1_IRQ { IRQ_PB1176_KMI1 } |
141 | #define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ } | 141 | #define PB1176_SMC_IRQ { } |
142 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 142 | #define MPMC_IRQ { } |
143 | #define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ } | 143 | #define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD } |
144 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 144 | #define SCTL_IRQ { } |
145 | #define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ } | 145 | #define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG } |
146 | #define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ } | 146 | #define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0 } |
147 | #define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ } | 147 | #define GPIO1_IRQ { IRQ_PB1176_GPIO1 } |
148 | #define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ } | 148 | #define PB1176_RTC_IRQ { IRQ_DC1176_RTC } |
149 | #define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ } | 149 | #define SCI_IRQ { IRQ_PB1176_SCI } |
150 | #define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ } | 150 | #define PB1176_UART0_IRQ { IRQ_DC1176_UART0 } |
151 | #define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ } | 151 | #define PB1176_UART1_IRQ { IRQ_DC1176_UART1 } |
152 | #define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ } | 152 | #define PB1176_UART2_IRQ { IRQ_DC1176_UART2 } |
153 | #define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ } | 153 | #define PB1176_UART3_IRQ { IRQ_DC1176_UART3 } |
154 | #define PB1176_UART4_IRQ { IRQ_PB1176_UART4, NO_IRQ } | 154 | #define PB1176_UART4_IRQ { IRQ_PB1176_UART4 } |
155 | #define PB1176_SSP_IRQ { IRQ_DC1176_SSP, NO_IRQ } | 155 | #define PB1176_SSP_IRQ { IRQ_DC1176_SSP } |
156 | 156 | ||
157 | /* FPGA Primecells */ | 157 | /* FPGA Primecells */ |
158 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 158 | APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
159 | AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); | 159 | APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); |
160 | AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); | 160 | APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); |
161 | AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); | 161 | APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); |
162 | AMBA_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL); | 162 | APB_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL); |
163 | 163 | ||
164 | /* DevChip Primecells */ | 164 | /* DevChip Primecells */ |
165 | AMBA_DEVICE(smc, "dev:smc", PB1176_SMC, NULL); | 165 | AHB_DEVICE(smc, "dev:smc", PB1176_SMC, NULL); |
166 | AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); | 166 | AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); |
167 | AMBA_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL); | 167 | APB_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL); |
168 | AMBA_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data); | 168 | APB_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data); |
169 | AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); | 169 | APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); |
170 | AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); | 170 | APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); |
171 | AMBA_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL); | 171 | APB_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL); |
172 | AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); | 172 | APB_DEVICE(sci0, "dev:sci0", SCI, NULL); |
173 | AMBA_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL); | 173 | APB_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL); |
174 | AMBA_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL); | 174 | APB_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL); |
175 | AMBA_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL); | 175 | APB_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL); |
176 | AMBA_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL); | 176 | APB_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL); |
177 | AMBA_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data); | 177 | APB_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data); |
178 | AMBA_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data); | 178 | AHB_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data); |
179 | 179 | ||
180 | static struct amba_device *amba_devs[] __initdata = { | 180 | static struct amba_device *amba_devs[] __initdata = { |
181 | &uart0_device, | 181 | &uart0_device, |
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c index 2147335f66f5..ae7fe54f6eb6 100644 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ b/arch/arm/mach-realview/realview_pb11mp.c | |||
@@ -127,52 +127,52 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
127 | * RealView PB11MPCore AMBA devices | 127 | * RealView PB11MPCore AMBA devices |
128 | */ | 128 | */ |
129 | 129 | ||
130 | #define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ } | 130 | #define GPIO2_IRQ { IRQ_PB11MP_GPIO2 } |
131 | #define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ } | 131 | #define GPIO3_IRQ { IRQ_PB11MP_GPIO3 } |
132 | #define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ } | 132 | #define AACI_IRQ { IRQ_TC11MP_AACI } |
133 | #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } | 133 | #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } |
134 | #define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ } | 134 | #define KMI0_IRQ { IRQ_TC11MP_KMI0 } |
135 | #define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ } | 135 | #define KMI1_IRQ { IRQ_TC11MP_KMI1 } |
136 | #define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ } | 136 | #define PB11MP_SMC_IRQ { } |
137 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 137 | #define MPMC_IRQ { } |
138 | #define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ } | 138 | #define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD } |
139 | #define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ } | 139 | #define DMAC_IRQ { IRQ_PB11MP_DMAC } |
140 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 140 | #define SCTL_IRQ { } |
141 | #define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ } | 141 | #define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG } |
142 | #define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ } | 142 | #define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0 } |
143 | #define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ } | 143 | #define GPIO1_IRQ { IRQ_PB11MP_GPIO1 } |
144 | #define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ } | 144 | #define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC } |
145 | #define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ } | 145 | #define SCI_IRQ { IRQ_PB11MP_SCI } |
146 | #define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ } | 146 | #define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0 } |
147 | #define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ } | 147 | #define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1 } |
148 | #define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ } | 148 | #define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2 } |
149 | #define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ } | 149 | #define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3 } |
150 | #define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ } | 150 | #define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP } |
151 | 151 | ||
152 | /* FPGA Primecells */ | 152 | /* FPGA Primecells */ |
153 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 153 | APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
154 | AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); | 154 | APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); |
155 | AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); | 155 | APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); |
156 | AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); | 156 | APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); |
157 | AMBA_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL); | 157 | APB_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL); |
158 | 158 | ||
159 | /* DevChip Primecells */ | 159 | /* DevChip Primecells */ |
160 | AMBA_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL); | 160 | AHB_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL); |
161 | AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); | 161 | AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); |
162 | AMBA_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL); | 162 | APB_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL); |
163 | AMBA_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data); | 163 | APB_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data); |
164 | AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); | 164 | APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); |
165 | AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); | 165 | APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); |
166 | AMBA_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL); | 166 | APB_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL); |
167 | AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); | 167 | APB_DEVICE(sci0, "dev:sci0", SCI, NULL); |
168 | AMBA_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL); | 168 | APB_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL); |
169 | AMBA_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL); | 169 | APB_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL); |
170 | AMBA_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL); | 170 | APB_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL); |
171 | AMBA_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data); | 171 | APB_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data); |
172 | 172 | ||
173 | /* Primecells on the NEC ISSP chip */ | 173 | /* Primecells on the NEC ISSP chip */ |
174 | AMBA_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data); | 174 | AHB_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data); |
175 | AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); | 175 | AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); |
176 | 176 | ||
177 | static struct amba_device *amba_devs[] __initdata = { | 177 | static struct amba_device *amba_devs[] __initdata = { |
178 | &dmac_device, | 178 | &dmac_device, |
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c index 25b2e59296f8..59650174e6ed 100644 --- a/arch/arm/mach-realview/realview_pba8.c +++ b/arch/arm/mach-realview/realview_pba8.c | |||
@@ -122,52 +122,52 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
122 | * RealView PBA8Core AMBA devices | 122 | * RealView PBA8Core AMBA devices |
123 | */ | 123 | */ |
124 | 124 | ||
125 | #define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ } | 125 | #define GPIO2_IRQ { IRQ_PBA8_GPIO2 } |
126 | #define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ } | 126 | #define GPIO3_IRQ { IRQ_PBA8_GPIO3 } |
127 | #define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ } | 127 | #define AACI_IRQ { IRQ_PBA8_AACI } |
128 | #define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } | 128 | #define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } |
129 | #define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ } | 129 | #define KMI0_IRQ { IRQ_PBA8_KMI0 } |
130 | #define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ } | 130 | #define KMI1_IRQ { IRQ_PBA8_KMI1 } |
131 | #define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ } | 131 | #define PBA8_SMC_IRQ { } |
132 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 132 | #define MPMC_IRQ { } |
133 | #define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ } | 133 | #define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD } |
134 | #define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ } | 134 | #define DMAC_IRQ { IRQ_PBA8_DMAC } |
135 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 135 | #define SCTL_IRQ { } |
136 | #define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ } | 136 | #define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG } |
137 | #define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ } | 137 | #define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0 } |
138 | #define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ } | 138 | #define GPIO1_IRQ { IRQ_PBA8_GPIO1 } |
139 | #define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ } | 139 | #define PBA8_RTC_IRQ { IRQ_PBA8_RTC } |
140 | #define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ } | 140 | #define SCI_IRQ { IRQ_PBA8_SCI } |
141 | #define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ } | 141 | #define PBA8_UART0_IRQ { IRQ_PBA8_UART0 } |
142 | #define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ } | 142 | #define PBA8_UART1_IRQ { IRQ_PBA8_UART1 } |
143 | #define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ } | 143 | #define PBA8_UART2_IRQ { IRQ_PBA8_UART2 } |
144 | #define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ } | 144 | #define PBA8_UART3_IRQ { IRQ_PBA8_UART3 } |
145 | #define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ } | 145 | #define PBA8_SSP_IRQ { IRQ_PBA8_SSP } |
146 | 146 | ||
147 | /* FPGA Primecells */ | 147 | /* FPGA Primecells */ |
148 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 148 | APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
149 | AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); | 149 | APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); |
150 | AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); | 150 | APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); |
151 | AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); | 151 | APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); |
152 | AMBA_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL); | 152 | APB_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL); |
153 | 153 | ||
154 | /* DevChip Primecells */ | 154 | /* DevChip Primecells */ |
155 | AMBA_DEVICE(smc, "dev:smc", PBA8_SMC, NULL); | 155 | AHB_DEVICE(smc, "dev:smc", PBA8_SMC, NULL); |
156 | AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); | 156 | AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); |
157 | AMBA_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL); | 157 | APB_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL); |
158 | AMBA_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data); | 158 | APB_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data); |
159 | AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); | 159 | APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); |
160 | AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); | 160 | APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); |
161 | AMBA_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL); | 161 | APB_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL); |
162 | AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); | 162 | APB_DEVICE(sci0, "dev:sci0", SCI, NULL); |
163 | AMBA_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL); | 163 | APB_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL); |
164 | AMBA_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL); | 164 | APB_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL); |
165 | AMBA_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL); | 165 | APB_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL); |
166 | AMBA_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data); | 166 | APB_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data); |
167 | 167 | ||
168 | /* Primecells on the NEC ISSP chip */ | 168 | /* Primecells on the NEC ISSP chip */ |
169 | AMBA_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data); | 169 | AHB_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data); |
170 | AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); | 170 | AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); |
171 | 171 | ||
172 | static struct amba_device *amba_devs[] __initdata = { | 172 | static struct amba_device *amba_devs[] __initdata = { |
173 | &dmac_device, | 173 | &dmac_device, |
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c index ac715645b860..1cd9956f5875 100644 --- a/arch/arm/mach-realview/realview_pbx.c +++ b/arch/arm/mach-realview/realview_pbx.c | |||
@@ -144,52 +144,52 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
144 | * RealView PBXCore AMBA devices | 144 | * RealView PBXCore AMBA devices |
145 | */ | 145 | */ |
146 | 146 | ||
147 | #define GPIO2_IRQ { IRQ_PBX_GPIO2, NO_IRQ } | 147 | #define GPIO2_IRQ { IRQ_PBX_GPIO2 } |
148 | #define GPIO3_IRQ { IRQ_PBX_GPIO3, NO_IRQ } | 148 | #define GPIO3_IRQ { IRQ_PBX_GPIO3 } |
149 | #define AACI_IRQ { IRQ_PBX_AACI, NO_IRQ } | 149 | #define AACI_IRQ { IRQ_PBX_AACI } |
150 | #define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B } | 150 | #define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B } |
151 | #define KMI0_IRQ { IRQ_PBX_KMI0, NO_IRQ } | 151 | #define KMI0_IRQ { IRQ_PBX_KMI0 } |
152 | #define KMI1_IRQ { IRQ_PBX_KMI1, NO_IRQ } | 152 | #define KMI1_IRQ { IRQ_PBX_KMI1 } |
153 | #define PBX_SMC_IRQ { NO_IRQ, NO_IRQ } | 153 | #define PBX_SMC_IRQ { } |
154 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 154 | #define MPMC_IRQ { } |
155 | #define PBX_CLCD_IRQ { IRQ_PBX_CLCD, NO_IRQ } | 155 | #define PBX_CLCD_IRQ { IRQ_PBX_CLCD } |
156 | #define DMAC_IRQ { IRQ_PBX_DMAC, NO_IRQ } | 156 | #define DMAC_IRQ { IRQ_PBX_DMAC } |
157 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 157 | #define SCTL_IRQ { } |
158 | #define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG, NO_IRQ } | 158 | #define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG } |
159 | #define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0, NO_IRQ } | 159 | #define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0 } |
160 | #define GPIO1_IRQ { IRQ_PBX_GPIO1, NO_IRQ } | 160 | #define GPIO1_IRQ { IRQ_PBX_GPIO1 } |
161 | #define PBX_RTC_IRQ { IRQ_PBX_RTC, NO_IRQ } | 161 | #define PBX_RTC_IRQ { IRQ_PBX_RTC } |
162 | #define SCI_IRQ { IRQ_PBX_SCI, NO_IRQ } | 162 | #define SCI_IRQ { IRQ_PBX_SCI } |
163 | #define PBX_UART0_IRQ { IRQ_PBX_UART0, NO_IRQ } | 163 | #define PBX_UART0_IRQ { IRQ_PBX_UART0 } |
164 | #define PBX_UART1_IRQ { IRQ_PBX_UART1, NO_IRQ } | 164 | #define PBX_UART1_IRQ { IRQ_PBX_UART1 } |
165 | #define PBX_UART2_IRQ { IRQ_PBX_UART2, NO_IRQ } | 165 | #define PBX_UART2_IRQ { IRQ_PBX_UART2 } |
166 | #define PBX_UART3_IRQ { IRQ_PBX_UART3, NO_IRQ } | 166 | #define PBX_UART3_IRQ { IRQ_PBX_UART3 } |
167 | #define PBX_SSP_IRQ { IRQ_PBX_SSP, NO_IRQ } | 167 | #define PBX_SSP_IRQ { IRQ_PBX_SSP } |
168 | 168 | ||
169 | /* FPGA Primecells */ | 169 | /* FPGA Primecells */ |
170 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 170 | APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
171 | AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); | 171 | APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); |
172 | AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); | 172 | APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); |
173 | AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); | 173 | APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); |
174 | AMBA_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL); | 174 | APB_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL); |
175 | 175 | ||
176 | /* DevChip Primecells */ | 176 | /* DevChip Primecells */ |
177 | AMBA_DEVICE(smc, "dev:smc", PBX_SMC, NULL); | 177 | AHB_DEVICE(smc, "dev:smc", PBX_SMC, NULL); |
178 | AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); | 178 | AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); |
179 | AMBA_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL); | 179 | APB_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL); |
180 | AMBA_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data); | 180 | APB_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data); |
181 | AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); | 181 | APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); |
182 | AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); | 182 | APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); |
183 | AMBA_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL); | 183 | APB_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL); |
184 | AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); | 184 | APB_DEVICE(sci0, "dev:sci0", SCI, NULL); |
185 | AMBA_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL); | 185 | APB_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL); |
186 | AMBA_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL); | 186 | APB_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL); |
187 | AMBA_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL); | 187 | APB_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL); |
188 | AMBA_DEVICE(ssp0, "dev:ssp0", PBX_SSP, &ssp0_plat_data); | 188 | APB_DEVICE(ssp0, "dev:ssp0", PBX_SSP, &ssp0_plat_data); |
189 | 189 | ||
190 | /* Primecells on the NEC ISSP chip */ | 190 | /* Primecells on the NEC ISSP chip */ |
191 | AMBA_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data); | 191 | AHB_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data); |
192 | AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); | 192 | AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); |
193 | 193 | ||
194 | static struct amba_device *amba_devs[] __initdata = { | 194 | static struct amba_device *amba_devs[] __initdata = { |
195 | &dmac_device, | 195 | &dmac_device, |
diff --git a/arch/arm/mach-rpc/Makefile b/arch/arm/mach-rpc/Makefile index aa77bc9efbbb..dfa405c0cfde 100644 --- a/arch/arm/mach-rpc/Makefile +++ b/arch/arm/mach-rpc/Makefile | |||
@@ -4,7 +4,7 @@ | |||
4 | 4 | ||
5 | # Object file lists. | 5 | # Object file lists. |
6 | 6 | ||
7 | obj-y := dma.o irq.o riscpc.o | 7 | obj-y := dma.o fiq.o irq.o riscpc.o |
8 | obj-m := | 8 | obj-m := |
9 | obj-n := | 9 | obj-n := |
10 | obj- := | 10 | obj- := |
diff --git a/arch/arm/mach-rpc/fiq.S b/arch/arm/mach-rpc/fiq.S new file mode 100644 index 000000000000..48ddd57db16e --- /dev/null +++ b/arch/arm/mach-rpc/fiq.S | |||
@@ -0,0 +1,16 @@ | |||
1 | #include <linux/linkage.h> | ||
2 | #include <asm/assembler.h> | ||
3 | #include <mach/hardware.h> | ||
4 | #include <mach/entry-macro.S> | ||
5 | |||
6 | .text | ||
7 | |||
8 | .global rpc_default_fiq_end | ||
9 | ENTRY(rpc_default_fiq_start) | ||
10 | mov r12, #ioc_base_high | ||
11 | .if ioc_base_low | ||
12 | orr r12, r12, #ioc_base_low | ||
13 | .endif | ||
14 | strb r12, [r12, #0x38] @ Disable FIQ register | ||
15 | subs pc, lr, #4 | ||
16 | rpc_default_fiq_end: | ||
diff --git a/arch/arm/mach-rpc/include/mach/entry-macro.S b/arch/arm/mach-rpc/include/mach/entry-macro.S index 4e7e54144093..7178368d7062 100644 --- a/arch/arm/mach-rpc/include/mach/entry-macro.S +++ b/arch/arm/mach-rpc/include/mach/entry-macro.S | |||
@@ -10,7 +10,3 @@ | |||
10 | orr \base, \base, #ioc_base_low | 10 | orr \base, \base, #ioc_base_low |
11 | .endif | 11 | .endif |
12 | .endm | 12 | .endm |
13 | |||
14 | .macro arch_ret_to_user, tmp1, tmp2 | ||
15 | .endm | ||
16 | |||
diff --git a/arch/arm/mach-rpc/include/mach/system.h b/arch/arm/mach-rpc/include/mach/system.h deleted file mode 100644 index 359bab94b6af..000000000000 --- a/arch/arm/mach-rpc/include/mach/system.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-rpc/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 1996-1999 Russell King. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c index 2e1b5309fbab..cf0e669eaf1a 100644 --- a/arch/arm/mach-rpc/irq.c +++ b/arch/arm/mach-rpc/irq.c | |||
@@ -5,6 +5,7 @@ | |||
5 | #include <asm/mach/irq.h> | 5 | #include <asm/mach/irq.h> |
6 | #include <asm/hardware/iomd.h> | 6 | #include <asm/hardware/iomd.h> |
7 | #include <asm/irq.h> | 7 | #include <asm/irq.h> |
8 | #include <asm/fiq.h> | ||
8 | 9 | ||
9 | static void iomd_ack_irq_a(struct irq_data *d) | 10 | static void iomd_ack_irq_a(struct irq_data *d) |
10 | { | 11 | { |
@@ -112,6 +113,8 @@ static struct irq_chip iomd_fiq_chip = { | |||
112 | .irq_unmask = iomd_unmask_irq_fiq, | 113 | .irq_unmask = iomd_unmask_irq_fiq, |
113 | }; | 114 | }; |
114 | 115 | ||
116 | extern unsigned char rpc_default_fiq_start, rpc_default_fiq_end; | ||
117 | |||
115 | void __init rpc_init_irq(void) | 118 | void __init rpc_init_irq(void) |
116 | { | 119 | { |
117 | unsigned int irq, flags; | 120 | unsigned int irq, flags; |
@@ -121,6 +124,9 @@ void __init rpc_init_irq(void) | |||
121 | iomd_writeb(0, IOMD_FIQMASK); | 124 | iomd_writeb(0, IOMD_FIQMASK); |
122 | iomd_writeb(0, IOMD_DMAMASK); | 125 | iomd_writeb(0, IOMD_DMAMASK); |
123 | 126 | ||
127 | set_fiq_handler(&rpc_default_fiq_start, | ||
128 | &rpc_default_fiq_end - &rpc_default_fiq_start); | ||
129 | |||
124 | for (irq = 0; irq < NR_IRQS; irq++) { | 130 | for (irq = 0; irq < NR_IRQS; irq++) { |
125 | flags = IRQF_VALID; | 131 | flags = IRQF_VALID; |
126 | 132 | ||
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig index 5261a7ed0999..68d89cb96af0 100644 --- a/arch/arm/mach-s3c2410/Kconfig +++ b/arch/arm/mach-s3c2410/Kconfig | |||
@@ -2,42 +2,6 @@ | |||
2 | # | 2 | # |
3 | # Licensed under GPLv2 | 3 | # Licensed under GPLv2 |
4 | 4 | ||
5 | config CPU_S3C2410 | ||
6 | bool | ||
7 | depends on ARCH_S3C2410 | ||
8 | select CPU_ARM920T | ||
9 | select S3C2410_CLOCK | ||
10 | select CPU_LLSERIAL_S3C2410 | ||
11 | select S3C2410_PM if PM | ||
12 | select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX | ||
13 | help | ||
14 | Support for S3C2410 and S3C2410A family from the S3C24XX line | ||
15 | of Samsung Mobile CPUs. | ||
16 | |||
17 | config CPU_S3C2410_DMA | ||
18 | bool | ||
19 | depends on S3C2410_DMA && (CPU_S3C2410 || CPU_S3C2442) | ||
20 | default y if CPU_S3C2410 || CPU_S3C2442 | ||
21 | help | ||
22 | DMA device selection for S3C2410 and compatible CPUs | ||
23 | |||
24 | config S3C2410_PM | ||
25 | bool | ||
26 | help | ||
27 | Power Management code common to S3C2410 and better | ||
28 | |||
29 | config SIMTEC_NOR | ||
30 | bool | ||
31 | help | ||
32 | Internal node to specify machine has simtec NOR mapping | ||
33 | |||
34 | config MACH_BAST_IDE | ||
35 | bool | ||
36 | select HAVE_PATA_PLATFORM | ||
37 | help | ||
38 | Internal node for machines with an BAST style IDE | ||
39 | interface | ||
40 | |||
41 | # cpu frequency scaling support | 5 | # cpu frequency scaling support |
42 | 6 | ||
43 | config S3C2410_CPUFREQ | 7 | config S3C2410_CPUFREQ |
@@ -54,121 +18,3 @@ config S3C2410_PLLTABLE | |||
54 | help | 18 | help |
55 | Select the PLL table for the S3C2410 | 19 | Select the PLL table for the S3C2410 |
56 | 20 | ||
57 | menu "S3C2410 Machines" | ||
58 | |||
59 | config ARCH_SMDK2410 | ||
60 | bool "SMDK2410/A9M2410" | ||
61 | select CPU_S3C2410 | ||
62 | select MACH_SMDK | ||
63 | help | ||
64 | Say Y here if you are using the SMDK2410 or the derived module A9M2410 | ||
65 | <http://www.fsforth.de> | ||
66 | |||
67 | config ARCH_H1940 | ||
68 | bool "IPAQ H1940" | ||
69 | select CPU_S3C2410 | ||
70 | select PM_H1940 if PM | ||
71 | select S3C_DEV_USB_HOST | ||
72 | select S3C_DEV_NAND | ||
73 | select S3C2410_SETUP_TS | ||
74 | help | ||
75 | Say Y here if you are using the HP IPAQ H1940 | ||
76 | |||
77 | config H1940BT | ||
78 | tristate "Control the state of H1940 bluetooth chip" | ||
79 | depends on ARCH_H1940 | ||
80 | select RFKILL | ||
81 | help | ||
82 | This is a simple driver that is able to control | ||
83 | the state of built in bluetooth chip on h1940. | ||
84 | |||
85 | config PM_H1940 | ||
86 | bool | ||
87 | help | ||
88 | Internal node for H1940 and related PM | ||
89 | |||
90 | config MACH_N30 | ||
91 | bool "Acer N30 family" | ||
92 | select CPU_S3C2410 | ||
93 | select MACH_N35 | ||
94 | select S3C_DEV_USB_HOST | ||
95 | select S3C_DEV_NAND | ||
96 | help | ||
97 | Say Y here if you want suppt for the Acer N30, Acer N35, | ||
98 | Navman PiN570, Yakumo AlphaX or Airis NC05 PDAs. | ||
99 | |||
100 | config MACH_N35 | ||
101 | bool | ||
102 | help | ||
103 | Internal node in order to enable support for Acer N35 if Acer N30 is | ||
104 | selected. | ||
105 | |||
106 | config ARCH_BAST | ||
107 | bool "Simtec Electronics BAST (EB2410ITX)" | ||
108 | select CPU_S3C2410 | ||
109 | select S3C2410_IOTIMING if S3C2410_CPUFREQ | ||
110 | select PM_SIMTEC if PM | ||
111 | select SIMTEC_NOR | ||
112 | select MACH_BAST_IDE | ||
113 | select S3C24XX_DCLK | ||
114 | select ISA | ||
115 | select S3C_DEV_HWMON | ||
116 | select S3C_DEV_USB_HOST | ||
117 | select S3C_DEV_NAND | ||
118 | help | ||
119 | Say Y here if you are using the Simtec Electronics EB2410ITX | ||
120 | development board (also known as BAST) | ||
121 | |||
122 | config MACH_OTOM | ||
123 | bool "NexVision OTOM Board" | ||
124 | select CPU_S3C2410 | ||
125 | select S3C_DEV_USB_HOST | ||
126 | select S3C_DEV_NAND | ||
127 | help | ||
128 | Say Y here if you are using the Nex Vision OTOM board | ||
129 | |||
130 | config MACH_AML_M5900 | ||
131 | bool "AML M5900 Series" | ||
132 | select CPU_S3C2410 | ||
133 | select PM_SIMTEC if PM | ||
134 | select S3C_DEV_USB_HOST | ||
135 | help | ||
136 | Say Y here if you are using the American Microsystems M5900 Series | ||
137 | <http://www.amltd.com> | ||
138 | |||
139 | config BAST_PC104_IRQ | ||
140 | bool "BAST PC104 IRQ support" | ||
141 | depends on ARCH_BAST | ||
142 | default y | ||
143 | help | ||
144 | Say Y here to enable the PC104 IRQ routing on the | ||
145 | Simtec BAST (EB2410ITX) | ||
146 | |||
147 | config MACH_TCT_HAMMER | ||
148 | bool "TCT Hammer Board" | ||
149 | select CPU_S3C2410 | ||
150 | select S3C_DEV_USB_HOST | ||
151 | help | ||
152 | Say Y here if you are using the TinCanTools Hammer Board | ||
153 | <http://www.tincantools.com> | ||
154 | |||
155 | config MACH_VR1000 | ||
156 | bool "Thorcom VR1000" | ||
157 | select PM_SIMTEC if PM | ||
158 | select S3C24XX_DCLK | ||
159 | select SIMTEC_NOR | ||
160 | select MACH_BAST_IDE | ||
161 | select CPU_S3C2410 | ||
162 | select S3C_DEV_USB_HOST | ||
163 | help | ||
164 | Say Y here if you are using the Thorcom VR1000 board. | ||
165 | |||
166 | config MACH_QT2410 | ||
167 | bool "QT2410" | ||
168 | select CPU_S3C2410 | ||
169 | select S3C_DEV_USB_HOST | ||
170 | select S3C_DEV_NAND | ||
171 | help | ||
172 | Say Y here if you are using the Armzone QT2410 | ||
173 | |||
174 | endmenu | ||
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile index 782fd81144e9..6b9a316e0041 100644 --- a/arch/arm/mach-s3c2410/Makefile +++ b/arch/arm/mach-s3c2410/Makefile | |||
@@ -9,32 +9,6 @@ obj-m := | |||
9 | obj-n := | 9 | obj-n := |
10 | obj- := | 10 | obj- := |
11 | 11 | ||
12 | obj-$(CONFIG_CPU_S3C2410) += s3c2410.o | ||
13 | obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o | ||
14 | obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o | ||
15 | obj-$(CONFIG_S3C2410_PM) += pm.o sleep.o | ||
16 | obj-$(CONFIG_S3C2410_CPUFREQ) += cpu-freq.o | 12 | obj-$(CONFIG_S3C2410_CPUFREQ) += cpu-freq.o |
17 | obj-$(CONFIG_S3C2410_PLLTABLE) += pll.o | 13 | obj-$(CONFIG_S3C2410_PLLTABLE) += pll.o |
18 | 14 | ||
19 | # Machine support | ||
20 | |||
21 | obj-$(CONFIG_ARCH_SMDK2410) += mach-smdk2410.o | ||
22 | obj-$(CONFIG_ARCH_H1940) += mach-h1940.o | ||
23 | obj-$(CONFIG_H1940BT) += h1940-bluetooth.o | ||
24 | obj-$(CONFIG_PM_H1940) += pm-h1940.o | ||
25 | obj-$(CONFIG_MACH_N30) += mach-n30.o | ||
26 | obj-$(CONFIG_ARCH_BAST) += mach-bast.o usb-simtec.o | ||
27 | obj-$(CONFIG_MACH_OTOM) += mach-otom.o | ||
28 | obj-$(CONFIG_MACH_AML_M5900) += mach-amlm5900.o | ||
29 | obj-$(CONFIG_BAST_PC104_IRQ) += bast-irq.o | ||
30 | obj-$(CONFIG_MACH_TCT_HAMMER) += mach-tct_hammer.o | ||
31 | obj-$(CONFIG_MACH_VR1000) += mach-vr1000.o usb-simtec.o | ||
32 | obj-$(CONFIG_MACH_QT2410) += mach-qt2410.o | ||
33 | |||
34 | # Common bits of machine support | ||
35 | |||
36 | obj-$(CONFIG_SIMTEC_NOR) += nor-simtec.o | ||
37 | |||
38 | # machine additions | ||
39 | |||
40 | obj-$(CONFIG_MACH_BAST_IDE) += bast-ide.o | ||
diff --git a/arch/arm/mach-s3c2410/include/mach/spi.h b/arch/arm/mach-s3c2410/include/mach/spi.h deleted file mode 100644 index 4d9588373aa5..000000000000 --- a/arch/arm/mach-s3c2410/include/mach/spi.h +++ /dev/null | |||
@@ -1,38 +0,0 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/spi.h | ||
2 | * | ||
3 | * Copyright (c) 2006 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * S3C2410 - SPI Controller platform_device info | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_SPI_H | ||
14 | #define __ASM_ARCH_SPI_H __FILE__ | ||
15 | |||
16 | struct s3c2410_spi_info { | ||
17 | int pin_cs; /* simple gpio cs */ | ||
18 | unsigned int num_cs; /* total chipselects */ | ||
19 | int bus_num; /* bus number to use. */ | ||
20 | |||
21 | unsigned int use_fiq:1; /* use fiq */ | ||
22 | |||
23 | void (*gpio_setup)(struct s3c2410_spi_info *spi, int enable); | ||
24 | void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol); | ||
25 | }; | ||
26 | |||
27 | /* Standard setup / suspend routines for SPI GPIO pins. */ | ||
28 | |||
29 | extern void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi, | ||
30 | int enable); | ||
31 | |||
32 | extern void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi, | ||
33 | int enable); | ||
34 | |||
35 | extern void s3c24xx_spi_gpiocfg_bus1_gpd8_9_10(struct s3c2410_spi_info *spi, | ||
36 | int enable); | ||
37 | |||
38 | #endif /* __ASM_ARCH_SPI_H */ | ||
diff --git a/arch/arm/mach-s3c2410/include/mach/system.h b/arch/arm/mach-s3c2410/include/mach/system.h deleted file mode 100644 index 5e215c1a5c8f..000000000000 --- a/arch/arm/mach-s3c2410/include/mach/system.h +++ /dev/null | |||
@@ -1,54 +0,0 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/system.h | ||
2 | * | ||
3 | * Copyright (c) 2003 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * S3C2410 - System function defines and includes | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/io.h> | ||
14 | #include <mach/hardware.h> | ||
15 | |||
16 | #include <mach/map.h> | ||
17 | #include <mach/idle.h> | ||
18 | |||
19 | #include <mach/regs-clock.h> | ||
20 | |||
21 | void (*s3c24xx_idle)(void); | ||
22 | |||
23 | void s3c24xx_default_idle(void) | ||
24 | { | ||
25 | unsigned long tmp; | ||
26 | int i; | ||
27 | |||
28 | /* idle the system by using the idle mode which will wait for an | ||
29 | * interrupt to happen before restarting the system. | ||
30 | */ | ||
31 | |||
32 | /* Warning: going into idle state upsets jtag scanning */ | ||
33 | |||
34 | __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE, | ||
35 | S3C2410_CLKCON); | ||
36 | |||
37 | /* the samsung port seems to do a loop and then unset idle.. */ | ||
38 | for (i = 0; i < 50; i++) { | ||
39 | tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */ | ||
40 | } | ||
41 | |||
42 | /* this bit is not cleared on re-start... */ | ||
43 | |||
44 | __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE, | ||
45 | S3C2410_CLKCON); | ||
46 | } | ||
47 | |||
48 | static void arch_idle(void) | ||
49 | { | ||
50 | if (s3c24xx_idle != NULL) | ||
51 | (s3c24xx_idle)(); | ||
52 | else | ||
53 | s3c24xx_default_idle(); | ||
54 | } | ||
diff --git a/arch/arm/mach-s3c2410/usb-simtec.h b/arch/arm/mach-s3c2410/usb-simtec.h deleted file mode 100644 index 03842ede9e71..000000000000 --- a/arch/arm/mach-s3c2410/usb-simtec.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c2410/usb-simtec.h | ||
2 | * | ||
3 | * Copyright (c) 2004 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * http://www.simtec.co.uk/products/EB2410ITX/ | ||
7 | * | ||
8 | * Simtec BAST and Thorcom VR1000 USB port support functions | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | extern int usb_simtec_init(void); | ||
16 | |||
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig index b8b9029e9f2d..c5256f4e90bb 100644 --- a/arch/arm/mach-s3c2412/Kconfig +++ b/arch/arm/mach-s3c2412/Kconfig | |||
@@ -2,41 +2,6 @@ | |||
2 | # | 2 | # |
3 | # Licensed under GPLv2 | 3 | # Licensed under GPLv2 |
4 | 4 | ||
5 | config CPU_S3C2412 | ||
6 | bool | ||
7 | depends on ARCH_S3C2410 | ||
8 | select CPU_ARM926T | ||
9 | select CPU_LLSERIAL_S3C2440 | ||
10 | select S3C2412_PM if PM | ||
11 | select S3C2412_DMA if S3C2410_DMA | ||
12 | help | ||
13 | Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line | ||
14 | |||
15 | config CPU_S3C2412_ONLY | ||
16 | bool | ||
17 | depends on ARCH_S3C2410 && !CPU_S3C2410 && \ | ||
18 | !CPU_S3C2416 && !CPU_S3C2440 && !CPU_S3C2442 && \ | ||
19 | !CPU_S3C2443 && CPU_S3C2412 | ||
20 | default y if CPU_S3C2412 | ||
21 | |||
22 | config S3C2412_DMA | ||
23 | bool | ||
24 | depends on CPU_S3C2412 | ||
25 | help | ||
26 | Internal config node for S3C2412 DMA support | ||
27 | |||
28 | config S3C2412_PM | ||
29 | bool | ||
30 | select S3C2412_PM_SLEEP | ||
31 | help | ||
32 | Internal config node to apply S3C2412 power management | ||
33 | |||
34 | config S3C2412_PM_SLEEP | ||
35 | bool | ||
36 | help | ||
37 | Internal config node to apply sleep for S3C2412 power management. | ||
38 | Can be selected by another SoCs with similar sleep procedure. | ||
39 | |||
40 | # Note, the S3C2412 IOtiming support is in plat-s3c24xx | 5 | # Note, the S3C2412 IOtiming support is in plat-s3c24xx |
41 | 6 | ||
42 | config S3C2412_CPUFREQ | 7 | config S3C2412_CPUFREQ |
@@ -46,53 +11,3 @@ config S3C2412_CPUFREQ | |||
46 | default y | 11 | default y |
47 | help | 12 | help |
48 | CPU Frequency scaling support for S3C2412 and S3C2413 SoC CPUs. | 13 | CPU Frequency scaling support for S3C2412 and S3C2413 SoC CPUs. |
49 | |||
50 | menu "S3C2412 Machines" | ||
51 | |||
52 | config MACH_JIVE | ||
53 | bool "Logitech Jive" | ||
54 | select CPU_S3C2412 | ||
55 | select S3C_DEV_USB_HOST | ||
56 | select S3C_DEV_NAND | ||
57 | help | ||
58 | Say Y here if you are using the Logitech Jive. | ||
59 | |||
60 | config MACH_JIVE_SHOW_BOOTLOADER | ||
61 | bool "Allow access to bootloader partitions in MTD (EXPERIMENTAL)" | ||
62 | depends on MACH_JIVE && EXPERIMENTAL | ||
63 | |||
64 | config MACH_SMDK2413 | ||
65 | bool "SMDK2413" | ||
66 | select CPU_S3C2412 | ||
67 | select MACH_S3C2413 | ||
68 | select MACH_SMDK | ||
69 | select S3C_DEV_USB_HOST | ||
70 | select S3C_DEV_NAND | ||
71 | help | ||
72 | Say Y here if you are using an SMDK2413 | ||
73 | |||
74 | config MACH_S3C2413 | ||
75 | bool | ||
76 | help | ||
77 | Internal node for S3C2413 version of SMDK2413, so that | ||
78 | machine_is_s3c2413() will work when MACH_SMDK2413 is | ||
79 | selected | ||
80 | |||
81 | config MACH_SMDK2412 | ||
82 | bool "SMDK2412" | ||
83 | select MACH_SMDK2413 | ||
84 | help | ||
85 | Say Y here if you are using an SMDK2412 | ||
86 | |||
87 | Note, this shares support with SMDK2413, so will automatically | ||
88 | select MACH_SMDK2413. | ||
89 | |||
90 | config MACH_VSTMS | ||
91 | bool "VMSTMS" | ||
92 | select CPU_S3C2412 | ||
93 | select S3C_DEV_USB_HOST | ||
94 | select S3C_DEV_NAND | ||
95 | help | ||
96 | Say Y here if you are using an VSTMS board | ||
97 | |||
98 | endmenu | ||
diff --git a/arch/arm/mach-s3c2412/Makefile b/arch/arm/mach-s3c2412/Makefile index 7e4d95fa8a97..41a6c279fb2f 100644 --- a/arch/arm/mach-s3c2412/Makefile +++ b/arch/arm/mach-s3c2412/Makefile | |||
@@ -9,16 +9,4 @@ obj-m := | |||
9 | obj-n := | 9 | obj-n := |
10 | obj- := | 10 | obj- := |
11 | 11 | ||
12 | obj-$(CONFIG_CPU_S3C2412) += s3c2412.o | ||
13 | obj-$(CONFIG_CPU_S3C2412) += irq.o | ||
14 | obj-$(CONFIG_CPU_S3C2412) += clock.o | ||
15 | obj-$(CONFIG_S3C2412_DMA) += dma.o | ||
16 | obj-$(CONFIG_S3C2412_PM) += pm.o | ||
17 | obj-$(CONFIG_S3C2412_PM_SLEEP) += sleep.o | ||
18 | obj-$(CONFIG_S3C2412_CPUFREQ) += cpu-freq.o | 12 | obj-$(CONFIG_S3C2412_CPUFREQ) += cpu-freq.o |
19 | |||
20 | # Machine support | ||
21 | |||
22 | obj-$(CONFIG_MACH_JIVE) += mach-jive.o | ||
23 | obj-$(CONFIG_MACH_SMDK2413) += mach-smdk2413.o | ||
24 | obj-$(CONFIG_MACH_VSTMS) += mach-vstms.o | ||
diff --git a/arch/arm/mach-s3c2416/Kconfig b/arch/arm/mach-s3c2416/Kconfig deleted file mode 100644 index 84c7b03e5a30..000000000000 --- a/arch/arm/mach-s3c2416/Kconfig +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | # arch/arm/mach-s3c2416/Kconfig | ||
2 | # | ||
3 | # Copyright 2009 Yauhen Kharuzhy <jekhor@gmail.com> | ||
4 | # | ||
5 | # Licensed under GPLv2 | ||
6 | |||
7 | # note, this also supports the S3C2450 which is so similar it has the same | ||
8 | # ID code as the S3C2416. | ||
9 | |||
10 | config CPU_S3C2416 | ||
11 | bool | ||
12 | depends on ARCH_S3C2410 | ||
13 | select CPU_ARM926T | ||
14 | select S3C2416_DMA if S3C2410_DMA | ||
15 | select CPU_LLSERIAL_S3C2440 | ||
16 | select SAMSUNG_CLKSRC | ||
17 | select S3C2443_CLOCK | ||
18 | help | ||
19 | Support for the S3C2416 SoC from the S3C24XX line | ||
20 | |||
21 | config S3C2416_DMA | ||
22 | bool | ||
23 | depends on CPU_S3C2416 | ||
24 | help | ||
25 | Internal config node for S3C2416 DMA support | ||
26 | |||
27 | config S3C2416_PM | ||
28 | bool | ||
29 | select S3C2412_PM_SLEEP | ||
30 | help | ||
31 | Internal config node to apply S3C2416 power management | ||
32 | |||
33 | config S3C2416_SETUP_SDHCI | ||
34 | bool | ||
35 | select S3C2416_SETUP_SDHCI_GPIO | ||
36 | help | ||
37 | Internal helper functions for S3C2416 based SDHCI systems | ||
38 | |||
39 | config S3C2416_SETUP_SDHCI_GPIO | ||
40 | bool | ||
41 | help | ||
42 | Common setup code for SDHCI gpio. | ||
43 | |||
44 | menu "S3C2416 Machines" | ||
45 | |||
46 | config MACH_SMDK2416 | ||
47 | bool "SMDK2416" | ||
48 | select CPU_S3C2416 | ||
49 | select MACH_SMDK | ||
50 | select S3C_DEV_FB | ||
51 | select S3C_DEV_HSMMC | ||
52 | select S3C_DEV_HSMMC1 | ||
53 | select S3C_DEV_NAND | ||
54 | select S3C_DEV_USB_HOST | ||
55 | select S3C2416_SETUP_SDHCI | ||
56 | select S3C2416_PM if PM | ||
57 | help | ||
58 | Say Y here if you are using an SMDK2416 | ||
59 | |||
60 | endmenu | ||
diff --git a/arch/arm/mach-s3c2416/Makefile b/arch/arm/mach-s3c2416/Makefile deleted file mode 100644 index ca0cd227f873..000000000000 --- a/arch/arm/mach-s3c2416/Makefile +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | # arch/arm/mach-s3c2416/Makefile | ||
2 | # | ||
3 | # Copyright 2009 Yauhen Kharuzhy <jekhor@gmail.com> | ||
4 | # | ||
5 | # Licensed under GPLv2 | ||
6 | |||
7 | obj-y := | ||
8 | obj-m := | ||
9 | obj-n := | ||
10 | obj- := | ||
11 | |||
12 | obj-$(CONFIG_CPU_S3C2416) += s3c2416.o clock.o | ||
13 | obj-$(CONFIG_CPU_S3C2416) += irq.o | ||
14 | obj-$(CONFIG_S3C2416_PM) += pm.o | ||
15 | #obj-$(CONFIG_S3C2416_DMA) += dma.o | ||
16 | |||
17 | # Device setup | ||
18 | obj-$(CONFIG_S3C2416_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | ||
19 | |||
20 | # Machine support | ||
21 | |||
22 | obj-$(CONFIG_MACH_SMDK2416) += mach-smdk2416.o | ||
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig index 914e620f1257..ece7a10fe3c6 100644 --- a/arch/arm/mach-s3c2440/Kconfig +++ b/arch/arm/mach-s3c2440/Kconfig | |||
@@ -2,35 +2,6 @@ | |||
2 | # | 2 | # |
3 | # Licensed under GPLv2 | 3 | # Licensed under GPLv2 |
4 | 4 | ||
5 | config CPU_S3C2440 | ||
6 | bool | ||
7 | select CPU_ARM920T | ||
8 | select S3C2410_CLOCK | ||
9 | select S3C2410_PM if PM | ||
10 | select S3C2440_DMA if S3C2410_DMA | ||
11 | select CPU_S3C244X | ||
12 | select CPU_LLSERIAL_S3C2440 | ||
13 | help | ||
14 | Support for S3C2440 Samsung Mobile CPU based systems. | ||
15 | |||
16 | config CPU_S3C2442 | ||
17 | bool | ||
18 | select CPU_ARM920T | ||
19 | select S3C2410_CLOCK | ||
20 | select S3C2410_PM if PM | ||
21 | select CPU_S3C244X | ||
22 | select CPU_LLSERIAL_S3C2440 | ||
23 | help | ||
24 | Support for S3C2442 Samsung Mobile CPU based systems. | ||
25 | |||
26 | config CPU_S3C244X | ||
27 | bool | ||
28 | depends on CPU_S3C2440 || CPU_S3C2442 | ||
29 | help | ||
30 | Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems. | ||
31 | |||
32 | |||
33 | |||
34 | config S3C2440_CPUFREQ | 5 | config S3C2440_CPUFREQ |
35 | bool "S3C2440/S3C2442 CPU Frequency scaling support" | 6 | bool "S3C2440/S3C2442 CPU Frequency scaling support" |
36 | depends on CPU_FREQ_S3C24XX && (CPU_S3C2440 || CPU_S3C2442) | 7 | depends on CPU_FREQ_S3C24XX && (CPU_S3C2440 || CPU_S3C2442) |
@@ -64,139 +35,3 @@ config S3C2440_PLL_16934400 | |||
64 | default y if CPU_FREQ_S3C24XX_PLL | 35 | default y if CPU_FREQ_S3C24XX_PLL |
65 | help | 36 | help |
66 | PLL tables for S3C2440 or S3C2442 CPUs with 16.934MHz crystals. | 37 | PLL tables for S3C2440 or S3C2442 CPUs with 16.934MHz crystals. |
67 | |||
68 | config S3C2440_DMA | ||
69 | bool | ||
70 | depends on CPU_S3C2440 | ||
71 | help | ||
72 | Support for S3C2440 specific DMA code5A | ||
73 | |||
74 | menu "S3C2440 and S3C2442 Machines" | ||
75 | |||
76 | config MACH_ANUBIS | ||
77 | bool "Simtec Electronics ANUBIS" | ||
78 | select CPU_S3C2440 | ||
79 | select S3C24XX_DCLK | ||
80 | select PM_SIMTEC if PM | ||
81 | select HAVE_PATA_PLATFORM | ||
82 | select S3C24XX_GPIO_EXTRA64 | ||
83 | select S3C2440_XTAL_12000000 | ||
84 | select S3C_DEV_USB_HOST | ||
85 | help | ||
86 | Say Y here if you are using the Simtec Electronics ANUBIS | ||
87 | development system | ||
88 | |||
89 | config MACH_NEO1973_GTA02 | ||
90 | bool "Openmoko GTA02 / Freerunner phone" | ||
91 | select CPU_S3C2442 | ||
92 | select MFD_PCF50633 | ||
93 | select PCF50633_GPIO | ||
94 | select I2C | ||
95 | select POWER_SUPPLY | ||
96 | select MACH_NEO1973 | ||
97 | select S3C2410_PWM | ||
98 | select S3C_DEV_USB_HOST | ||
99 | help | ||
100 | Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone | ||
101 | |||
102 | config MACH_OSIRIS | ||
103 | bool "Simtec IM2440D20 (OSIRIS) module" | ||
104 | select CPU_S3C2440 | ||
105 | select S3C24XX_DCLK | ||
106 | select PM_SIMTEC if PM | ||
107 | select S3C24XX_GPIO_EXTRA128 | ||
108 | select S3C2440_XTAL_12000000 | ||
109 | select S3C2410_IOTIMING if S3C2440_CPUFREQ | ||
110 | select S3C_DEV_USB_HOST | ||
111 | select S3C_DEV_NAND | ||
112 | help | ||
113 | Say Y here if you are using the Simtec IM2440D20 module, also | ||
114 | known as the Osiris. | ||
115 | |||
116 | config MACH_OSIRIS_DVS | ||
117 | tristate "Simtec IM2440D20 (OSIRIS) Dynamic Voltage Scaling driver" | ||
118 | depends on MACH_OSIRIS | ||
119 | select TPS65010 | ||
120 | help | ||
121 | Say Y/M here if you want to have dynamic voltage scaling support | ||
122 | on the Simtec IM2440D20 (OSIRIS) module via the TPS65011. | ||
123 | |||
124 | The DVS driver alters the voltage supplied to the ARM core | ||
125 | depending on the frequency it is running at. The driver itself | ||
126 | does not do any of the frequency alteration, which is left up | ||
127 | to the cpufreq driver. | ||
128 | |||
129 | config MACH_RX3715 | ||
130 | bool "HP iPAQ rx3715" | ||
131 | select CPU_S3C2440 | ||
132 | select S3C2440_XTAL_16934400 | ||
133 | select PM_H1940 if PM | ||
134 | select S3C_DEV_NAND | ||
135 | help | ||
136 | Say Y here if you are using the HP iPAQ rx3715. | ||
137 | |||
138 | config ARCH_S3C2440 | ||
139 | bool "SMDK2440" | ||
140 | select CPU_S3C2440 | ||
141 | select S3C2440_XTAL_16934400 | ||
142 | select MACH_SMDK | ||
143 | select S3C_DEV_USB_HOST | ||
144 | select S3C_DEV_NAND | ||
145 | help | ||
146 | Say Y here if you are using the SMDK2440. | ||
147 | |||
148 | config MACH_NEXCODER_2440 | ||
149 | bool "NexVision NEXCODER 2440 Light Board" | ||
150 | select CPU_S3C2440 | ||
151 | select S3C2440_XTAL_12000000 | ||
152 | select S3C_DEV_USB_HOST | ||
153 | select S3C_DEV_NAND | ||
154 | help | ||
155 | Say Y here if you are using the Nex Vision NEXCODER 2440 Light Board | ||
156 | |||
157 | config SMDK2440_CPU2440 | ||
158 | bool "SMDK2440 with S3C2440 CPU module" | ||
159 | default y if ARCH_S3C2440 | ||
160 | select S3C2440_XTAL_16934400 | ||
161 | select CPU_S3C2440 | ||
162 | |||
163 | config SMDK2440_CPU2442 | ||
164 | bool "SMDM2440 with S3C2442 CPU module" | ||
165 | select CPU_S3C2442 | ||
166 | |||
167 | config MACH_AT2440EVB | ||
168 | bool "Avantech AT2440EVB development board" | ||
169 | select CPU_S3C2440 | ||
170 | select S3C_DEV_USB_HOST | ||
171 | select S3C_DEV_NAND | ||
172 | help | ||
173 | Say Y here if you are using the AT2440EVB development board | ||
174 | |||
175 | config MACH_MINI2440 | ||
176 | bool "MINI2440 development board" | ||
177 | select CPU_S3C2440 | ||
178 | select EEPROM_AT24 | ||
179 | select NEW_LEDS | ||
180 | select LEDS_CLASS | ||
181 | select LEDS_TRIGGER | ||
182 | select LEDS_TRIGGER_BACKLIGHT | ||
183 | select S3C_DEV_NAND | ||
184 | select S3C_DEV_USB_HOST | ||
185 | help | ||
186 | Say Y here to select support for the MINI2440. Is a 10cm x 10cm board | ||
187 | available via various sources. It can come with a 3.5" or 7" touch LCD. | ||
188 | |||
189 | config MACH_RX1950 | ||
190 | bool "HP iPAQ rx1950" | ||
191 | select CPU_S3C2442 | ||
192 | select S3C24XX_DCLK | ||
193 | select PM_H1940 if PM | ||
194 | select I2C | ||
195 | select S3C2410_PWM | ||
196 | select S3C_DEV_NAND | ||
197 | select S3C2410_IOTIMING if S3C2440_CPUFREQ | ||
198 | select S3C2440_XTAL_16934400 | ||
199 | help | ||
200 | Say Y here if you're using HP iPAQ rx1950 | ||
201 | |||
202 | endmenu | ||
diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile index d5440fa34b04..c46092439814 100644 --- a/arch/arm/mach-s3c2440/Makefile +++ b/arch/arm/mach-s3c2440/Makefile | |||
@@ -9,33 +9,9 @@ obj-m := | |||
9 | obj-n := | 9 | obj-n := |
10 | obj- := | 10 | obj- := |
11 | 11 | ||
12 | obj-$(CONFIG_CPU_S3C2440) += s3c2440.o dsc.o | 12 | obj-$(CONFIG_CPU_S3C2440) += dsc.o |
13 | obj-$(CONFIG_CPU_S3C2442) += s3c2442.o | ||
14 | 13 | ||
15 | obj-$(CONFIG_CPU_S3C2440) += irq.o | ||
16 | obj-$(CONFIG_CPU_S3C2440) += clock.o | ||
17 | obj-$(CONFIG_S3C2440_DMA) += dma.o | ||
18 | |||
19 | obj-$(CONFIG_CPU_S3C244X) += s3c244x.o | ||
20 | obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o | ||
21 | obj-$(CONFIG_CPU_S3C244X) += s3c244x-clock.o | ||
22 | obj-$(CONFIG_S3C2440_CPUFREQ) += s3c2440-cpufreq.o | 14 | obj-$(CONFIG_S3C2440_CPUFREQ) += s3c2440-cpufreq.o |
23 | 15 | ||
24 | obj-$(CONFIG_S3C2440_PLL_12000000) += s3c2440-pll-12000000.o | 16 | obj-$(CONFIG_S3C2440_PLL_12000000) += s3c2440-pll-12000000.o |
25 | obj-$(CONFIG_S3C2440_PLL_16934400) += s3c2440-pll-16934400.o | 17 | obj-$(CONFIG_S3C2440_PLL_16934400) += s3c2440-pll-16934400.o |
26 | |||
27 | # Machine support | ||
28 | |||
29 | obj-$(CONFIG_MACH_ANUBIS) += mach-anubis.o | ||
30 | obj-$(CONFIG_MACH_OSIRIS) += mach-osiris.o | ||
31 | obj-$(CONFIG_MACH_RX3715) += mach-rx3715.o | ||
32 | obj-$(CONFIG_ARCH_S3C2440) += mach-smdk2440.o | ||
33 | obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o | ||
34 | obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o | ||
35 | obj-$(CONFIG_MACH_MINI2440) += mach-mini2440.o | ||
36 | obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o | ||
37 | obj-$(CONFIG_MACH_RX1950) += mach-rx1950.o | ||
38 | |||
39 | # extra machine support | ||
40 | |||
41 | obj-$(CONFIG_MACH_OSIRIS_DVS) += mach-osiris-dvs.o | ||
diff --git a/arch/arm/mach-s3c2440/common.h b/arch/arm/mach-s3c2440/common.h deleted file mode 100644 index db8a98ac68c5..000000000000 --- a/arch/arm/mach-s3c2440/common.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
3 | * http://www.samsung.com | ||
4 | * | ||
5 | * Common Header for S3C2440 machines | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H | ||
13 | #define __ARCH_ARM_MACH_S3C2440_COMMON_H | ||
14 | |||
15 | void s3c2440_restart(char mode, const char *cmd); | ||
16 | |||
17 | #endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */ | ||
diff --git a/arch/arm/mach-s3c2443/Kconfig b/arch/arm/mach-s3c2443/Kconfig deleted file mode 100644 index 8814031516ce..000000000000 --- a/arch/arm/mach-s3c2443/Kconfig +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | # Copyright 2007 Simtec Electronics | ||
2 | # | ||
3 | # Licensed under GPLv2 | ||
4 | |||
5 | config CPU_S3C2443 | ||
6 | bool | ||
7 | depends on ARCH_S3C2410 | ||
8 | select CPU_ARM920T | ||
9 | select S3C2443_DMA if S3C2410_DMA | ||
10 | select CPU_LLSERIAL_S3C2440 | ||
11 | select SAMSUNG_CLKSRC | ||
12 | select S3C2443_CLOCK | ||
13 | help | ||
14 | Support for the S3C2443 SoC from the S3C24XX line | ||
15 | |||
16 | config S3C2443_DMA | ||
17 | bool | ||
18 | depends on CPU_S3C2443 | ||
19 | help | ||
20 | Internal config node for S3C2443 DMA support | ||
21 | |||
22 | menu "S3C2443 Machines" | ||
23 | |||
24 | config MACH_SMDK2443 | ||
25 | bool "SMDK2443" | ||
26 | select CPU_S3C2443 | ||
27 | select MACH_SMDK | ||
28 | select S3C_DEV_HSMMC1 | ||
29 | help | ||
30 | Say Y here if you are using an SMDK2443 | ||
31 | |||
32 | endmenu | ||
diff --git a/arch/arm/mach-s3c2443/Makefile b/arch/arm/mach-s3c2443/Makefile deleted file mode 100644 index d1843c9eb8bd..000000000000 --- a/arch/arm/mach-s3c2443/Makefile +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | # arch/arm/mach-s3c2443/Makefile | ||
2 | # | ||
3 | # Copyright 2007 Simtec Electronics | ||
4 | # | ||
5 | # Licensed under GPLv2 | ||
6 | |||
7 | obj-y := | ||
8 | obj-m := | ||
9 | obj-n := | ||
10 | obj- := | ||
11 | |||
12 | obj-$(CONFIG_CPU_S3C2443) += s3c2443.o | ||
13 | obj-$(CONFIG_CPU_S3C2443) += irq.o | ||
14 | obj-$(CONFIG_CPU_S3C2443) += clock.o | ||
15 | |||
16 | obj-$(CONFIG_S3C2443_DMA) += dma.o | ||
17 | |||
18 | # Machine support | ||
19 | |||
20 | obj-$(CONFIG_MACH_SMDK2443) += mach-smdk2443.o | ||
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig new file mode 100644 index 000000000000..0f3a327ebcaa --- /dev/null +++ b/arch/arm/mach-s3c24xx/Kconfig | |||
@@ -0,0 +1,538 @@ | |||
1 | # arch/arm/mach-s3c24xx/Kconfig | ||
2 | # | ||
3 | # Copyright (c) 2012 Samsung Electronics Co., Ltd. | ||
4 | # http://www.samsung.com/ | ||
5 | # | ||
6 | # Copyright 2007 Simtec Electronics | ||
7 | # | ||
8 | # Licensed under GPLv2 | ||
9 | |||
10 | if ARCH_S3C24XX | ||
11 | |||
12 | menu "SAMSUNG S3C24XX SoCs Support" | ||
13 | |||
14 | comment "S3C24XX SoCs" | ||
15 | |||
16 | config CPU_S3C2410 | ||
17 | bool "SAMSUNG S3C2410" | ||
18 | default y | ||
19 | select CPU_ARM920T | ||
20 | select S3C2410_CLOCK | ||
21 | select CPU_LLSERIAL_S3C2410 | ||
22 | select S3C2410_PM if PM | ||
23 | select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX | ||
24 | help | ||
25 | Support for S3C2410 and S3C2410A family from the S3C24XX line | ||
26 | of Samsung Mobile CPUs. | ||
27 | |||
28 | config CPU_S3C2412 | ||
29 | bool "SAMSUNG S3C2412" | ||
30 | depends on ARCH_S3C24XX | ||
31 | select CPU_ARM926T | ||
32 | select CPU_LLSERIAL_S3C2440 | ||
33 | select S3C2412_PM if PM | ||
34 | select S3C2412_DMA if S3C24XX_DMA | ||
35 | help | ||
36 | Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line | ||
37 | |||
38 | config CPU_S3C2416 | ||
39 | bool "SAMSUNG S3C2416/S3C2450" | ||
40 | depends on ARCH_S3C24XX | ||
41 | select CPU_ARM926T | ||
42 | select CPU_LLSERIAL_S3C2440 | ||
43 | select SAMSUNG_CLKSRC | ||
44 | select S3C2443_COMMON | ||
45 | select S3C2443_DMA if S3C24XX_DMA | ||
46 | select S3C2416_PM if PM | ||
47 | help | ||
48 | Support for the S3C2416 SoC from the S3C24XX line | ||
49 | |||
50 | config CPU_S3C2440 | ||
51 | bool "SAMSUNG S3C2440" | ||
52 | select CPU_ARM920T | ||
53 | select CPU_LLSERIAL_S3C2440 | ||
54 | select S3C2410_CLOCK | ||
55 | select S3C2410_PM if PM | ||
56 | select S3C2440_DMA if S3C24XX_DMA | ||
57 | help | ||
58 | Support for S3C2440 Samsung Mobile CPU based systems. | ||
59 | |||
60 | config CPU_S3C2442 | ||
61 | bool "SAMSUNG S3C2442" | ||
62 | select CPU_ARM920T | ||
63 | select CPU_LLSERIAL_S3C2440 | ||
64 | select S3C2410_CLOCK | ||
65 | select S3C2410_PM if PM | ||
66 | help | ||
67 | Support for S3C2442 Samsung Mobile CPU based systems. | ||
68 | |||
69 | config CPU_S3C244X | ||
70 | def_bool y | ||
71 | depends on CPU_S3C2440 || CPU_S3C2442 | ||
72 | |||
73 | config CPU_S3C2443 | ||
74 | bool "SAMSUNG S3C2443" | ||
75 | depends on ARCH_S3C24XX | ||
76 | select CPU_ARM920T | ||
77 | select CPU_LLSERIAL_S3C2440 | ||
78 | select SAMSUNG_CLKSRC | ||
79 | select S3C2443_COMMON | ||
80 | select S3C2443_DMA if S3C24XX_DMA | ||
81 | help | ||
82 | Support for the S3C2443 SoC from the S3C24XX line | ||
83 | |||
84 | # common code | ||
85 | |||
86 | config S3C24XX_SMDK | ||
87 | bool | ||
88 | help | ||
89 | Common machine code for SMDK2410 and SMDK2440 | ||
90 | |||
91 | config S3C24XX_SIMTEC_AUDIO | ||
92 | bool | ||
93 | depends on (ARCH_BAST || MACH_VR1000 || MACH_OSIRIS || MACH_ANUBIS) | ||
94 | default y | ||
95 | help | ||
96 | Add audio devices for common Simtec S3C24XX boards | ||
97 | |||
98 | config S3C24XX_SIMTEC_PM | ||
99 | bool | ||
100 | help | ||
101 | Common power management code for systems that are | ||
102 | compatible with the Simtec style of power management | ||
103 | |||
104 | config S3C24XX_SIMTEC_USB | ||
105 | bool | ||
106 | help | ||
107 | USB management code for common Simtec S3C24XX boards | ||
108 | |||
109 | config S3C24XX_SETUP_TS | ||
110 | bool | ||
111 | help | ||
112 | Compile in platform device definition for Samsung TouchScreen. | ||
113 | |||
114 | # cpu-specific sections | ||
115 | |||
116 | if CPU_S3C2410 | ||
117 | |||
118 | config S3C2410_DMA | ||
119 | bool | ||
120 | depends on S3C24XX_DMA && (CPU_S3C2410 || CPU_S3C2442) | ||
121 | default y if CPU_S3C2410 || CPU_S3C2442 | ||
122 | help | ||
123 | DMA device selection for S3C2410 and compatible CPUs | ||
124 | |||
125 | config S3C2410_PM | ||
126 | bool | ||
127 | help | ||
128 | Power Management code common to S3C2410 and better | ||
129 | |||
130 | config S3C24XX_SIMTEC_NOR | ||
131 | bool | ||
132 | help | ||
133 | Internal node to specify machine has simtec NOR mapping | ||
134 | |||
135 | config MACH_BAST_IDE | ||
136 | bool | ||
137 | select HAVE_PATA_PLATFORM | ||
138 | help | ||
139 | Internal node for machines with an BAST style IDE | ||
140 | interface | ||
141 | |||
142 | comment "S3C2410 Boards" | ||
143 | |||
144 | # | ||
145 | # The "S3C2410 Boards" list is ordered alphabetically by option text. | ||
146 | # (without ARCH_ or MACH_) | ||
147 | # | ||
148 | |||
149 | config MACH_AML_M5900 | ||
150 | bool "AML M5900 Series" | ||
151 | select S3C24XX_SIMTEC_PM if PM | ||
152 | select S3C_DEV_USB_HOST | ||
153 | help | ||
154 | Say Y here if you are using the American Microsystems M5900 Series | ||
155 | <http://www.amltd.com> | ||
156 | |||
157 | config ARCH_BAST | ||
158 | bool "Simtec Electronics BAST (EB2410ITX)" | ||
159 | select S3C2410_IOTIMING if S3C2410_CPUFREQ | ||
160 | select S3C24XX_SIMTEC_PM if PM | ||
161 | select S3C24XX_SIMTEC_NOR | ||
162 | select S3C24XX_SIMTEC_USB | ||
163 | select MACH_BAST_IDE | ||
164 | select S3C24XX_DCLK | ||
165 | select ISA | ||
166 | select S3C_DEV_HWMON | ||
167 | select S3C_DEV_USB_HOST | ||
168 | select S3C_DEV_NAND | ||
169 | help | ||
170 | Say Y here if you are using the Simtec Electronics EB2410ITX | ||
171 | development board (also known as BAST) | ||
172 | |||
173 | config BAST_PC104_IRQ | ||
174 | bool "BAST PC104 IRQ support" | ||
175 | depends on ARCH_BAST | ||
176 | default y | ||
177 | help | ||
178 | Say Y here to enable the PC104 IRQ routing on the | ||
179 | Simtec BAST (EB2410ITX) | ||
180 | |||
181 | config ARCH_H1940 | ||
182 | bool "IPAQ H1940" | ||
183 | select PM_H1940 if PM | ||
184 | select S3C_DEV_USB_HOST | ||
185 | select S3C_DEV_NAND | ||
186 | select S3C24XX_SETUP_TS | ||
187 | help | ||
188 | Say Y here if you are using the HP IPAQ H1940 | ||
189 | |||
190 | config H1940BT | ||
191 | tristate "Control the state of H1940 bluetooth chip" | ||
192 | depends on ARCH_H1940 | ||
193 | select RFKILL | ||
194 | help | ||
195 | This is a simple driver that is able to control | ||
196 | the state of built in bluetooth chip on h1940. | ||
197 | |||
198 | config PM_H1940 | ||
199 | bool | ||
200 | help | ||
201 | Internal node for H1940 and related PM | ||
202 | |||
203 | config MACH_N30 | ||
204 | bool "Acer N30 family" | ||
205 | select MACH_N35 | ||
206 | select S3C_DEV_USB_HOST | ||
207 | select S3C_DEV_NAND | ||
208 | help | ||
209 | Say Y here if you want suppt for the Acer N30, Acer N35, | ||
210 | Navman PiN570, Yakumo AlphaX or Airis NC05 PDAs. | ||
211 | |||
212 | config MACH_OTOM | ||
213 | bool "NexVision OTOM Board" | ||
214 | select S3C_DEV_USB_HOST | ||
215 | select S3C_DEV_NAND | ||
216 | help | ||
217 | Say Y here if you are using the Nex Vision OTOM board | ||
218 | |||
219 | config MACH_QT2410 | ||
220 | bool "QT2410" | ||
221 | select S3C_DEV_USB_HOST | ||
222 | select S3C_DEV_NAND | ||
223 | help | ||
224 | Say Y here if you are using the Armzone QT2410 | ||
225 | |||
226 | config ARCH_SMDK2410 | ||
227 | bool "SMDK2410/A9M2410" | ||
228 | select S3C24XX_SMDK | ||
229 | help | ||
230 | Say Y here if you are using the SMDK2410 or the derived module A9M2410 | ||
231 | <http://www.fsforth.de> | ||
232 | |||
233 | config MACH_TCT_HAMMER | ||
234 | bool "TCT Hammer Board" | ||
235 | select S3C_DEV_USB_HOST | ||
236 | help | ||
237 | Say Y here if you are using the TinCanTools Hammer Board | ||
238 | <http://www.tincantools.com> | ||
239 | |||
240 | config MACH_VR1000 | ||
241 | bool "Thorcom VR1000" | ||
242 | select S3C24XX_SIMTEC_PM if PM | ||
243 | select S3C24XX_DCLK | ||
244 | select S3C24XX_SIMTEC_NOR | ||
245 | select MACH_BAST_IDE | ||
246 | select S3C_DEV_USB_HOST | ||
247 | select S3C24XX_SIMTEC_USB | ||
248 | help | ||
249 | Say Y here if you are using the Thorcom VR1000 board. | ||
250 | |||
251 | endif # CPU_S3C2410 | ||
252 | |||
253 | config S3C2412_PM_SLEEP | ||
254 | bool | ||
255 | help | ||
256 | Internal config node to apply sleep for S3C2412 power management. | ||
257 | Can be selected by another SoCs such as S3C2416 with similar | ||
258 | sleep procedure. | ||
259 | |||
260 | if CPU_S3C2412 | ||
261 | |||
262 | config CPU_S3C2412_ONLY | ||
263 | bool | ||
264 | depends on ARCH_S3C24XX && !CPU_S3C2410 && \ | ||
265 | !CPU_S3C2416 && !CPU_S3C2440 && !CPU_S3C2442 && \ | ||
266 | !CPU_S3C2443 && CPU_S3C2412 | ||
267 | default y | ||
268 | |||
269 | config S3C2412_DMA | ||
270 | bool | ||
271 | help | ||
272 | Internal config node for S3C2412 DMA support | ||
273 | |||
274 | config S3C2412_PM | ||
275 | bool | ||
276 | help | ||
277 | Internal config node to apply S3C2412 power management | ||
278 | |||
279 | comment "S3C2412 Boards" | ||
280 | |||
281 | # | ||
282 | # The "S3C2412 Boards" list is ordered alphabetically by option text. | ||
283 | # (without ARCH_ or MACH_) | ||
284 | # | ||
285 | |||
286 | config MACH_JIVE | ||
287 | bool "Logitech Jive" | ||
288 | select S3C_DEV_USB_HOST | ||
289 | select S3C_DEV_NAND | ||
290 | help | ||
291 | Say Y here if you are using the Logitech Jive. | ||
292 | |||
293 | config MACH_JIVE_SHOW_BOOTLOADER | ||
294 | bool "Allow access to bootloader partitions in MTD (EXPERIMENTAL)" | ||
295 | depends on MACH_JIVE && EXPERIMENTAL | ||
296 | |||
297 | config MACH_S3C2413 | ||
298 | bool | ||
299 | help | ||
300 | Internal node for S3C2413 version of SMDK2413, so that | ||
301 | machine_is_s3c2413() will work when MACH_SMDK2413 is | ||
302 | selected | ||
303 | |||
304 | config MACH_SMDK2412 | ||
305 | bool "SMDK2412" | ||
306 | select MACH_SMDK2413 | ||
307 | help | ||
308 | Say Y here if you are using an SMDK2412 | ||
309 | |||
310 | Note, this shares support with SMDK2413, so will automatically | ||
311 | select MACH_SMDK2413. | ||
312 | |||
313 | config MACH_SMDK2413 | ||
314 | bool "SMDK2413" | ||
315 | select MACH_S3C2413 | ||
316 | select S3C24XX_SMDK | ||
317 | select S3C_DEV_USB_HOST | ||
318 | select S3C_DEV_NAND | ||
319 | help | ||
320 | Say Y here if you are using an SMDK2413 | ||
321 | |||
322 | config MACH_VSTMS | ||
323 | bool "VMSTMS" | ||
324 | select S3C_DEV_USB_HOST | ||
325 | select S3C_DEV_NAND | ||
326 | help | ||
327 | Say Y here if you are using an VSTMS board | ||
328 | |||
329 | endif # CPU_S3C2412 | ||
330 | |||
331 | if CPU_S3C2416 | ||
332 | |||
333 | config S3C2416_PM | ||
334 | bool | ||
335 | select S3C2412_PM_SLEEP | ||
336 | help | ||
337 | Internal config node to apply S3C2416 power management | ||
338 | |||
339 | config S3C2416_SETUP_SDHCI | ||
340 | bool | ||
341 | select S3C2416_SETUP_SDHCI_GPIO | ||
342 | help | ||
343 | Internal helper functions for S3C2416 based SDHCI systems | ||
344 | |||
345 | config S3C2416_SETUP_SDHCI_GPIO | ||
346 | bool | ||
347 | help | ||
348 | Common setup code for SDHCI gpio. | ||
349 | |||
350 | comment "S3C2416 Boards" | ||
351 | |||
352 | config MACH_SMDK2416 | ||
353 | bool "SMDK2416" | ||
354 | select S3C24XX_SMDK | ||
355 | select S3C_DEV_FB | ||
356 | select S3C_DEV_HSMMC | ||
357 | select S3C_DEV_HSMMC1 | ||
358 | select S3C_DEV_NAND | ||
359 | select S3C_DEV_USB_HOST | ||
360 | select S3C2416_SETUP_SDHCI | ||
361 | help | ||
362 | Say Y here if you are using an SMDK2416 | ||
363 | |||
364 | endif # CPU_S3C2416 | ||
365 | |||
366 | if CPU_S3C2440 | ||
367 | |||
368 | config S3C2440_DMA | ||
369 | bool | ||
370 | help | ||
371 | Support for S3C2440 specific DMA code5A | ||
372 | |||
373 | comment "S3C2440 Boards" | ||
374 | |||
375 | # | ||
376 | # The "S3C2440 Boards" list is ordered alphabetically by option text. | ||
377 | # (without ARCH_ or MACH_) | ||
378 | # | ||
379 | |||
380 | config MACH_ANUBIS | ||
381 | bool "Simtec Electronics ANUBIS" | ||
382 | select S3C24XX_DCLK | ||
383 | select S3C24XX_SIMTEC_PM if PM | ||
384 | select HAVE_PATA_PLATFORM | ||
385 | select S3C24XX_GPIO_EXTRA64 | ||
386 | select S3C2440_XTAL_12000000 | ||
387 | select S3C_DEV_USB_HOST | ||
388 | help | ||
389 | Say Y here if you are using the Simtec Electronics ANUBIS | ||
390 | development system | ||
391 | |||
392 | config MACH_AT2440EVB | ||
393 | bool "Avantech AT2440EVB development board" | ||
394 | select S3C_DEV_USB_HOST | ||
395 | select S3C_DEV_NAND | ||
396 | help | ||
397 | Say Y here if you are using the AT2440EVB development board | ||
398 | |||
399 | config MACH_MINI2440 | ||
400 | bool "MINI2440 development board" | ||
401 | select EEPROM_AT24 | ||
402 | select NEW_LEDS | ||
403 | select LEDS_CLASS | ||
404 | select LEDS_TRIGGER | ||
405 | select LEDS_TRIGGER_BACKLIGHT | ||
406 | select S3C_DEV_NAND | ||
407 | select S3C_DEV_USB_HOST | ||
408 | help | ||
409 | Say Y here to select support for the MINI2440. Is a 10cm x 10cm board | ||
410 | available via various sources. It can come with a 3.5" or 7" touch LCD. | ||
411 | |||
412 | config MACH_NEXCODER_2440 | ||
413 | bool "NexVision NEXCODER 2440 Light Board" | ||
414 | select S3C2440_XTAL_12000000 | ||
415 | select S3C_DEV_USB_HOST | ||
416 | select S3C_DEV_NAND | ||
417 | help | ||
418 | Say Y here if you are using the Nex Vision NEXCODER 2440 Light Board | ||
419 | |||
420 | config MACH_OSIRIS | ||
421 | bool "Simtec IM2440D20 (OSIRIS) module" | ||
422 | select S3C24XX_DCLK | ||
423 | select S3C24XX_SIMTEC_PM if PM | ||
424 | select S3C24XX_GPIO_EXTRA128 | ||
425 | select S3C2440_XTAL_12000000 | ||
426 | select S3C2410_IOTIMING if S3C2440_CPUFREQ | ||
427 | select S3C_DEV_USB_HOST | ||
428 | select S3C_DEV_NAND | ||
429 | help | ||
430 | Say Y here if you are using the Simtec IM2440D20 module, also | ||
431 | known as the Osiris. | ||
432 | |||
433 | config MACH_OSIRIS_DVS | ||
434 | tristate "Simtec IM2440D20 (OSIRIS) Dynamic Voltage Scaling driver" | ||
435 | depends on MACH_OSIRIS | ||
436 | select TPS65010 | ||
437 | help | ||
438 | Say Y/M here if you want to have dynamic voltage scaling support | ||
439 | on the Simtec IM2440D20 (OSIRIS) module via the TPS65011. | ||
440 | |||
441 | The DVS driver alters the voltage supplied to the ARM core | ||
442 | depending on the frequency it is running at. The driver itself | ||
443 | does not do any of the frequency alteration, which is left up | ||
444 | to the cpufreq driver. | ||
445 | |||
446 | config MACH_RX3715 | ||
447 | bool "HP iPAQ rx3715" | ||
448 | select S3C2440_XTAL_16934400 | ||
449 | select PM_H1940 if PM | ||
450 | select S3C_DEV_NAND | ||
451 | help | ||
452 | Say Y here if you are using the HP iPAQ rx3715. | ||
453 | |||
454 | config ARCH_S3C2440 | ||
455 | bool "SMDK2440" | ||
456 | select S3C2440_XTAL_16934400 | ||
457 | select S3C24XX_SMDK | ||
458 | select S3C_DEV_USB_HOST | ||
459 | select S3C_DEV_NAND | ||
460 | help | ||
461 | Say Y here if you are using the SMDK2440. | ||
462 | |||
463 | config SMDK2440_CPU2440 | ||
464 | bool "SMDK2440 with S3C2440 CPU module" | ||
465 | default y if ARCH_S3C2440 | ||
466 | select S3C2440_XTAL_16934400 | ||
467 | |||
468 | endif # CPU_S3C2440 | ||
469 | |||
470 | if CPU_S3C2442 | ||
471 | |||
472 | comment "S3C2442 Boards" | ||
473 | |||
474 | # | ||
475 | # The "S3C2442 Boards" list is ordered alphabetically by option text. | ||
476 | # (without ARCH_ or MACH_) | ||
477 | # | ||
478 | |||
479 | config MACH_NEO1973_GTA02 | ||
480 | bool "Openmoko GTA02 / Freerunner phone" | ||
481 | select MFD_PCF50633 | ||
482 | select PCF50633_GPIO | ||
483 | select I2C | ||
484 | select POWER_SUPPLY | ||
485 | select MACH_NEO1973 | ||
486 | select S3C2410_PWM | ||
487 | select S3C_DEV_USB_HOST | ||
488 | help | ||
489 | Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone | ||
490 | |||
491 | config MACH_RX1950 | ||
492 | bool "HP iPAQ rx1950" | ||
493 | select S3C24XX_DCLK | ||
494 | select PM_H1940 if PM | ||
495 | select I2C | ||
496 | select S3C2410_PWM | ||
497 | select S3C_DEV_NAND | ||
498 | select S3C2410_IOTIMING if S3C2440_CPUFREQ | ||
499 | select S3C2440_XTAL_16934400 | ||
500 | help | ||
501 | Say Y here if you're using HP iPAQ rx1950 | ||
502 | |||
503 | config SMDK2440_CPU2442 | ||
504 | bool "SMDM2440 with S3C2442 CPU module" | ||
505 | |||
506 | endif # CPU_S3C2440 | ||
507 | |||
508 | if CPU_S3C2443 || CPU_S3C2416 | ||
509 | |||
510 | config S3C2443_COMMON | ||
511 | bool | ||
512 | help | ||
513 | Common code for the S3C2443 and similar processors, which includes | ||
514 | the S3C2416 and S3C2450. | ||
515 | |||
516 | config S3C2443_DMA | ||
517 | bool | ||
518 | help | ||
519 | Internal config node for S3C2443 DMA support | ||
520 | |||
521 | endif # CPU_S3C2443 || CPU_S3C2416 | ||
522 | |||
523 | if CPU_S3C2443 | ||
524 | |||
525 | comment "S3C2443 Boards" | ||
526 | |||
527 | config MACH_SMDK2443 | ||
528 | bool "SMDK2443" | ||
529 | select S3C24XX_SMDK | ||
530 | select S3C_DEV_HSMMC1 | ||
531 | help | ||
532 | Say Y here if you are using an SMDK2443 | ||
533 | |||
534 | endif # CPU_S3C2443 | ||
535 | |||
536 | endmenu # SAMSUNG S3C24XX SoCs Support | ||
537 | |||
538 | endif # ARCH_S3C24XX | ||
diff --git a/arch/arm/mach-s3c24xx/Makefile b/arch/arm/mach-s3c24xx/Makefile new file mode 100644 index 000000000000..3518fe812d5f --- /dev/null +++ b/arch/arm/mach-s3c24xx/Makefile | |||
@@ -0,0 +1,95 @@ | |||
1 | # arch/arm/mach-s3c24xx/Makefile | ||
2 | # | ||
3 | # Copyright (c) 2012 Samsung Electronics Co., Ltd. | ||
4 | # http://www.samsung.com/ | ||
5 | # | ||
6 | # Copyright 2007 Simtec Electronics | ||
7 | # | ||
8 | # Licensed under GPLv2 | ||
9 | |||
10 | obj-y := | ||
11 | obj-m := | ||
12 | obj-n := | ||
13 | obj- := | ||
14 | |||
15 | # core | ||
16 | |||
17 | obj-$(CONFIG_CPU_S3C2410) += s3c2410.o | ||
18 | obj-$(CONFIG_S3C2410_DMA) += dma-s3c2410.o | ||
19 | obj-$(CONFIG_S3C2410_PM) += pm-s3c2410.o sleep-s3c2410.o | ||
20 | |||
21 | obj-$(CONFIG_CPU_S3C2412) += s3c2412.o irq-s3c2412.o clock-s3c2412.o | ||
22 | obj-$(CONFIG_S3C2412_DMA) += dma-s3c2412.o | ||
23 | obj-$(CONFIG_S3C2412_PM) += pm-s3c2412.o | ||
24 | obj-$(CONFIG_S3C2412_PM_SLEEP) += sleep-s3c2412.o | ||
25 | |||
26 | obj-$(CONFIG_CPU_S3C2416) += s3c2416.o irq-s3c2416.o clock-s3c2416.o | ||
27 | obj-$(CONFIG_S3C2416_PM) += pm-s3c2416.o | ||
28 | |||
29 | obj-$(CONFIG_CPU_S3C2440) += s3c2440.o irq-s3c2440.o clock-s3c2440.o | ||
30 | obj-$(CONFIG_CPU_S3C2442) += s3c2442.o | ||
31 | obj-$(CONFIG_CPU_S3C244X) += s3c244x.o irq-s3c244x.o clock-s3c244x.o | ||
32 | obj-$(CONFIG_S3C2440_DMA) += dma-s3c2440.o | ||
33 | |||
34 | obj-$(CONFIG_CPU_S3C2443) += s3c2443.o irq-s3c2443.o clock-s3c2443.o | ||
35 | |||
36 | # common code | ||
37 | |||
38 | obj-$(CONFIG_S3C2443_COMMON) += common-s3c2443.o | ||
39 | obj-$(CONFIG_S3C2443_DMA) += dma-s3c2443.o | ||
40 | |||
41 | # | ||
42 | # machine support | ||
43 | # following is ordered alphabetically by option text. | ||
44 | # | ||
45 | |||
46 | obj-$(CONFIG_MACH_AML_M5900) += mach-amlm5900.o | ||
47 | obj-$(CONFIG_ARCH_BAST) += mach-bast.o | ||
48 | obj-$(CONFIG_BAST_PC104_IRQ) += bast-irq.o | ||
49 | obj-$(CONFIG_ARCH_H1940) += mach-h1940.o | ||
50 | obj-$(CONFIG_H1940BT) += h1940-bluetooth.o | ||
51 | obj-$(CONFIG_PM_H1940) += pm-h1940.o | ||
52 | obj-$(CONFIG_MACH_N30) += mach-n30.o | ||
53 | obj-$(CONFIG_MACH_OTOM) += mach-otom.o | ||
54 | obj-$(CONFIG_MACH_QT2410) += mach-qt2410.o | ||
55 | obj-$(CONFIG_ARCH_SMDK2410) += mach-smdk2410.o | ||
56 | obj-$(CONFIG_MACH_TCT_HAMMER) += mach-tct_hammer.o | ||
57 | obj-$(CONFIG_MACH_VR1000) += mach-vr1000.o | ||
58 | |||
59 | obj-$(CONFIG_MACH_JIVE) += mach-jive.o | ||
60 | obj-$(CONFIG_MACH_SMDK2413) += mach-smdk2413.o | ||
61 | obj-$(CONFIG_MACH_VSTMS) += mach-vstms.o | ||
62 | |||
63 | obj-$(CONFIG_MACH_SMDK2416) += mach-smdk2416.o | ||
64 | |||
65 | obj-$(CONFIG_MACH_ANUBIS) += mach-anubis.o | ||
66 | obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o | ||
67 | obj-$(CONFIG_MACH_MINI2440) += mach-mini2440.o | ||
68 | obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o | ||
69 | obj-$(CONFIG_MACH_OSIRIS) += mach-osiris.o | ||
70 | obj-$(CONFIG_MACH_RX3715) += mach-rx3715.o | ||
71 | obj-$(CONFIG_ARCH_S3C2440) += mach-smdk2440.o | ||
72 | |||
73 | obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o | ||
74 | obj-$(CONFIG_MACH_RX1950) += mach-rx1950.o | ||
75 | |||
76 | obj-$(CONFIG_MACH_SMDK2443) += mach-smdk2443.o | ||
77 | |||
78 | # common bits of machine support | ||
79 | |||
80 | obj-$(CONFIG_S3C24XX_SMDK) += common-smdk.o | ||
81 | obj-$(CONFIG_S3C24XX_SIMTEC_AUDIO) += simtec-audio.o | ||
82 | obj-$(CONFIG_S3C24XX_SIMTEC_NOR) += simtec-nor.o | ||
83 | obj-$(CONFIG_S3C24XX_SIMTEC_PM) += simtec-pm.o | ||
84 | obj-$(CONFIG_S3C24XX_SIMTEC_USB) += simtec-usb.o | ||
85 | |||
86 | # machine additions | ||
87 | |||
88 | obj-$(CONFIG_MACH_BAST_IDE) += bast-ide.o | ||
89 | obj-$(CONFIG_MACH_OSIRIS_DVS) += mach-osiris-dvs.o | ||
90 | |||
91 | # device setup | ||
92 | |||
93 | obj-$(CONFIG_S3C2416_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | ||
94 | obj-$(CONFIG_ARCH_S3C24XX) += setup-i2c.o | ||
95 | obj-$(CONFIG_S3C24XX_SETUP_TS) += setup-ts.o | ||
diff --git a/arch/arm/mach-s3c2410/Makefile.boot b/arch/arm/mach-s3c24xx/Makefile.boot index 4457605ba04a..4457605ba04a 100644 --- a/arch/arm/mach-s3c2410/Makefile.boot +++ b/arch/arm/mach-s3c24xx/Makefile.boot | |||
diff --git a/arch/arm/mach-s3c2410/bast-ide.c b/arch/arm/mach-s3c24xx/bast-ide.c index 298ececfa366..298ececfa366 100644 --- a/arch/arm/mach-s3c2410/bast-ide.c +++ b/arch/arm/mach-s3c24xx/bast-ide.c | |||
diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c24xx/bast-irq.c index ac7b2ad5c405..ac7b2ad5c405 100644 --- a/arch/arm/mach-s3c2410/bast-irq.c +++ b/arch/arm/mach-s3c24xx/bast-irq.c | |||
diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c24xx/clock-s3c2412.c index d10b695a9066..d10b695a9066 100644 --- a/arch/arm/mach-s3c2412/clock.c +++ b/arch/arm/mach-s3c24xx/clock-s3c2412.c | |||
diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c24xx/clock-s3c2416.c index 59f54d1d7f8b..dbc9ab4aaca2 100644 --- a/arch/arm/mach-s3c2416/clock.c +++ b/arch/arm/mach-s3c24xx/clock-s3c2416.c | |||
@@ -15,7 +15,6 @@ | |||
15 | #include <linux/clk.h> | 15 | #include <linux/clk.h> |
16 | 16 | ||
17 | #include <plat/s3c2416.h> | 17 | #include <plat/s3c2416.h> |
18 | #include <plat/s3c2443.h> | ||
19 | #include <plat/clock.h> | 18 | #include <plat/clock.h> |
20 | #include <plat/clock-clksrc.h> | 19 | #include <plat/clock-clksrc.h> |
21 | #include <plat/cpu.h> | 20 | #include <plat/cpu.h> |
@@ -132,12 +131,6 @@ static struct clk hsmmc0_clk = { | |||
132 | .ctrlbit = S3C2416_HCLKCON_HSMMC0, | 131 | .ctrlbit = S3C2416_HCLKCON_HSMMC0, |
133 | }; | 132 | }; |
134 | 133 | ||
135 | void __init_or_cpufreq s3c2416_setup_clocks(void) | ||
136 | { | ||
137 | s3c2443_common_setup_clocks(s3c2416_get_pll); | ||
138 | } | ||
139 | |||
140 | |||
141 | static struct clksrc_clk *clksrcs[] __initdata = { | 134 | static struct clksrc_clk *clksrcs[] __initdata = { |
142 | &hsspi_eplldiv, | 135 | &hsspi_eplldiv, |
143 | &hsspi_mux, | 136 | &hsspi_mux, |
diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c24xx/clock-s3c2440.c index 414364eb426c..414364eb426c 100644 --- a/arch/arm/mach-s3c2440/clock.c +++ b/arch/arm/mach-s3c24xx/clock-s3c2440.c | |||
diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c24xx/clock-s3c2443.c index 6dde2696f8f0..efb3ac359566 100644 --- a/arch/arm/mach-s3c2443/clock.c +++ b/arch/arm/mach-s3c24xx/clock-s3c2443.c | |||
@@ -179,11 +179,6 @@ static struct clk *clks[] __initdata = { | |||
179 | &clk_hsmmc, | 179 | &clk_hsmmc, |
180 | }; | 180 | }; |
181 | 181 | ||
182 | void __init_or_cpufreq s3c2443_setup_clocks(void) | ||
183 | { | ||
184 | s3c2443_common_setup_clocks(s3c2443_get_mpll); | ||
185 | } | ||
186 | |||
187 | void __init s3c2443_init_clocks(int xtal) | 182 | void __init s3c2443_init_clocks(int xtal) |
188 | { | 183 | { |
189 | unsigned long epllcon = __raw_readl(S3C2443_EPLLCON); | 184 | unsigned long epllcon = __raw_readl(S3C2443_EPLLCON); |
@@ -196,8 +191,6 @@ void __init s3c2443_init_clocks(int xtal) | |||
196 | armdiv, ARRAY_SIZE(armdiv), | 191 | armdiv, ARRAY_SIZE(armdiv), |
197 | S3C2443_CLKDIV0_ARMDIV_MASK); | 192 | S3C2443_CLKDIV0_ARMDIV_MASK); |
198 | 193 | ||
199 | s3c2443_setup_clocks(); | ||
200 | |||
201 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); | 194 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); |
202 | 195 | ||
203 | for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) | 196 | for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) |
diff --git a/arch/arm/mach-s3c2440/s3c244x-clock.c b/arch/arm/mach-s3c24xx/clock-s3c244x.c index 6d9b688c442b..6d9b688c442b 100644 --- a/arch/arm/mach-s3c2440/s3c244x-clock.c +++ b/arch/arm/mach-s3c24xx/clock-s3c244x.c | |||
diff --git a/arch/arm/plat-s3c24xx/s3c2443-clock.c b/arch/arm/mach-s3c24xx/common-s3c2443.c index 95e68190d593..460431589f39 100644 --- a/arch/arm/plat-s3c24xx/s3c2443-clock.c +++ b/arch/arm/mach-s3c24xx/common-s3c2443.c | |||
@@ -1,9 +1,18 @@ | |||
1 | /* linux/arch/arm/plat-s3c24xx/s3c2443-clock.c | 1 | /* |
2 | * Common code for SoCs starting with the S3C2443 | ||
2 | * | 3 | * |
3 | * Copyright (c) 2007, 2010 Simtec Electronics | 4 | * Copyright (c) 2007, 2010 Simtec Electronics |
4 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
5 | * | 6 | * |
6 | * S3C2443 Clock control suport - common code | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
7 | */ | 16 | */ |
8 | 17 | ||
9 | #include <linux/init.h> | 18 | #include <linux/init.h> |
@@ -12,7 +21,6 @@ | |||
12 | 21 | ||
13 | #include <mach/regs-s3c2443-clock.h> | 22 | #include <mach/regs-s3c2443-clock.h> |
14 | 23 | ||
15 | #include <plat/s3c2443.h> | ||
16 | #include <plat/clock.h> | 24 | #include <plat/clock.h> |
17 | #include <plat/clock-clksrc.h> | 25 | #include <plat/clock-clksrc.h> |
18 | #include <plat/cpu.h> | 26 | #include <plat/cpu.h> |
@@ -53,7 +61,7 @@ int s3c2443_clkcon_enable_s(struct clk *clk, int enable) | |||
53 | * elided as the EPLL can be either sourced by the XTAL or EXTCLK and as | 61 | * elided as the EPLL can be either sourced by the XTAL or EXTCLK and as |
54 | * such directly equating the two source clocks is impossible. | 62 | * such directly equating the two source clocks is impossible. |
55 | */ | 63 | */ |
56 | struct clk clk_mpllref = { | 64 | static struct clk clk_mpllref = { |
57 | .name = "mpllref", | 65 | .name = "mpllref", |
58 | .parent = &clk_xtal, | 66 | .parent = &clk_xtal, |
59 | }; | 67 | }; |
@@ -160,6 +168,44 @@ static struct clk clk_prediv = { | |||
160 | }, | 168 | }, |
161 | }; | 169 | }; |
162 | 170 | ||
171 | /* hclk divider | ||
172 | * | ||
173 | * divides the prediv and provides the hclk. | ||
174 | */ | ||
175 | |||
176 | static unsigned long s3c2443_hclkdiv_getrate(struct clk *clk) | ||
177 | { | ||
178 | unsigned long rate = clk_get_rate(clk->parent); | ||
179 | unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0); | ||
180 | |||
181 | clkdiv0 &= S3C2443_CLKDIV0_HCLKDIV_MASK; | ||
182 | |||
183 | return rate / (clkdiv0 + 1); | ||
184 | } | ||
185 | |||
186 | static struct clk_ops clk_h_ops = { | ||
187 | .get_rate = s3c2443_hclkdiv_getrate, | ||
188 | }; | ||
189 | |||
190 | /* pclk divider | ||
191 | * | ||
192 | * divides the hclk and provides the pclk. | ||
193 | */ | ||
194 | |||
195 | static unsigned long s3c2443_pclkdiv_getrate(struct clk *clk) | ||
196 | { | ||
197 | unsigned long rate = clk_get_rate(clk->parent); | ||
198 | unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0); | ||
199 | |||
200 | clkdiv0 = ((clkdiv0 & S3C2443_CLKDIV0_HALF_PCLK) ? 1 : 0); | ||
201 | |||
202 | return rate / (clkdiv0 + 1); | ||
203 | } | ||
204 | |||
205 | static struct clk_ops clk_p_ops = { | ||
206 | .get_rate = s3c2443_pclkdiv_getrate, | ||
207 | }; | ||
208 | |||
163 | /* armdiv | 209 | /* armdiv |
164 | * | 210 | * |
165 | * this clock is sourced from msysclk and can have a number of | 211 | * this clock is sourced from msysclk and can have a number of |
@@ -516,26 +562,15 @@ static struct clk hsmmc1_clk = { | |||
516 | .ctrlbit = S3C2443_HCLKCON_HSMMC, | 562 | .ctrlbit = S3C2443_HCLKCON_HSMMC, |
517 | }; | 563 | }; |
518 | 564 | ||
519 | static inline unsigned long s3c2443_get_hdiv(unsigned long clkcon0) | ||
520 | { | ||
521 | clkcon0 &= S3C2443_CLKDIV0_HCLKDIV_MASK; | ||
522 | |||
523 | return clkcon0 + 1; | ||
524 | } | ||
525 | |||
526 | /* EPLLCON compatible enough to get on/off information */ | 565 | /* EPLLCON compatible enough to get on/off information */ |
527 | 566 | ||
528 | void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll) | 567 | void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll) |
529 | { | 568 | { |
530 | unsigned long epllcon = __raw_readl(S3C2443_EPLLCON); | 569 | unsigned long epllcon = __raw_readl(S3C2443_EPLLCON); |
531 | unsigned long mpllcon = __raw_readl(S3C2443_MPLLCON); | 570 | unsigned long mpllcon = __raw_readl(S3C2443_MPLLCON); |
532 | unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0); | ||
533 | struct clk *xtal_clk; | 571 | struct clk *xtal_clk; |
534 | unsigned long xtal; | 572 | unsigned long xtal; |
535 | unsigned long pll; | 573 | unsigned long pll; |
536 | unsigned long fclk; | ||
537 | unsigned long hclk; | ||
538 | unsigned long pclk; | ||
539 | int ptr; | 574 | int ptr; |
540 | 575 | ||
541 | xtal_clk = clk_get(NULL, "xtal"); | 576 | xtal_clk = clk_get(NULL, "xtal"); |
@@ -544,18 +579,13 @@ void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll) | |||
544 | 579 | ||
545 | pll = get_mpll(mpllcon, xtal); | 580 | pll = get_mpll(mpllcon, xtal); |
546 | clk_msysclk.clk.rate = pll; | 581 | clk_msysclk.clk.rate = pll; |
547 | 582 | clk_mpll.rate = pll; | |
548 | fclk = clk_get_rate(&clk_armdiv); | ||
549 | hclk = s3c2443_prediv_getrate(&clk_prediv); | ||
550 | hclk /= s3c2443_get_hdiv(clkdiv0); | ||
551 | pclk = hclk / ((clkdiv0 & S3C2443_CLKDIV0_HALF_PCLK) ? 2 : 1); | ||
552 | |||
553 | s3c24xx_setup_clocks(fclk, hclk, pclk); | ||
554 | 583 | ||
555 | printk("CPU: MPLL %s %ld.%03ld MHz, cpu %ld.%03ld MHz, mem %ld.%03ld MHz, pclk %ld.%03ld MHz\n", | 584 | printk("CPU: MPLL %s %ld.%03ld MHz, cpu %ld.%03ld MHz, mem %ld.%03ld MHz, pclk %ld.%03ld MHz\n", |
556 | (mpllcon & S3C2443_PLLCON_OFF) ? "off":"on", | 585 | (mpllcon & S3C2443_PLLCON_OFF) ? "off" : "on", |
557 | print_mhz(pll), print_mhz(fclk), | 586 | print_mhz(pll), print_mhz(clk_get_rate(&clk_armdiv)), |
558 | print_mhz(hclk), print_mhz(pclk)); | 587 | print_mhz(clk_get_rate(&clk_h)), |
588 | print_mhz(clk_get_rate(&clk_p))); | ||
559 | 589 | ||
560 | for (ptr = 0; ptr < ARRAY_SIZE(clksrc_clks); ptr++) | 590 | for (ptr = 0; ptr < ARRAY_SIZE(clksrc_clks); ptr++) |
561 | s3c_set_clksrc(&clksrc_clks[ptr], true); | 591 | s3c_set_clksrc(&clksrc_clks[ptr], true); |
@@ -568,7 +598,7 @@ void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll) | |||
568 | } | 598 | } |
569 | 599 | ||
570 | printk("CPU: EPLL %s %ld.%03ld MHz, usb-bus %ld.%03ld MHz\n", | 600 | printk("CPU: EPLL %s %ld.%03ld MHz, usb-bus %ld.%03ld MHz\n", |
571 | (epllcon & S3C2443_PLLCON_OFF) ? "off":"on", | 601 | (epllcon & S3C2443_PLLCON_OFF) ? "off" : "on", |
572 | print_mhz(clk_get_rate(&clk_epll)), | 602 | print_mhz(clk_get_rate(&clk_epll)), |
573 | print_mhz(clk_get_rate(&clk_usb_bus))); | 603 | print_mhz(clk_get_rate(&clk_usb_bus))); |
574 | } | 604 | } |
@@ -611,9 +641,13 @@ void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, | |||
611 | nr_armdiv = nr_divs; | 641 | nr_armdiv = nr_divs; |
612 | armdivmask = divmask; | 642 | armdivmask = divmask; |
613 | 643 | ||
614 | /* s3c2443 parents h and p clocks from prediv */ | 644 | /* s3c2443 parents h clock from prediv */ |
615 | clk_h.parent = &clk_prediv; | 645 | clk_h.parent = &clk_prediv; |
616 | clk_p.parent = &clk_prediv; | 646 | clk_h.ops = &clk_h_ops; |
647 | |||
648 | /* and p clock from h clock */ | ||
649 | clk_p.parent = &clk_h; | ||
650 | clk_p.ops = &clk_p_ops; | ||
617 | 651 | ||
618 | clk_usb_bus.parent = &clk_usb_bus_host.clk; | 652 | clk_usb_bus.parent = &clk_usb_bus_host.clk; |
619 | clk_epll.parent = &clk_epllref.clk; | 653 | clk_epll.parent = &clk_epllref.clk; |
diff --git a/arch/arm/plat-s3c24xx/common-smdk.c b/arch/arm/mach-s3c24xx/common-smdk.c index 084604be6ad1..084604be6ad1 100644 --- a/arch/arm/plat-s3c24xx/common-smdk.c +++ b/arch/arm/mach-s3c24xx/common-smdk.c | |||
diff --git a/arch/arm/mach-s3c2410/common.h b/arch/arm/mach-s3c24xx/common.h index f65dc8062961..62a2e196a68e 100644 --- a/arch/arm/mach-s3c2410/common.h +++ b/arch/arm/mach-s3c24xx/common.h | |||
@@ -12,6 +12,12 @@ | |||
12 | #ifndef __ARCH_ARM_MACH_S3C2410_COMMON_H | 12 | #ifndef __ARCH_ARM_MACH_S3C2410_COMMON_H |
13 | #define __ARCH_ARM_MACH_S3C2410_COMMON_H | 13 | #define __ARCH_ARM_MACH_S3C2410_COMMON_H |
14 | 14 | ||
15 | #ifdef CONFIG_CPU_S3C2410 | ||
15 | void s3c2410_restart(char mode, const char *cmd); | 16 | void s3c2410_restart(char mode, const char *cmd); |
17 | #endif | ||
18 | |||
19 | #ifdef CONFIG_CPU_S3C2440 | ||
20 | void s3c2440_restart(char mode, const char *cmd); | ||
21 | #endif | ||
16 | 22 | ||
17 | #endif /* __ARCH_ARM_MACH_S3C2410_COMMON_H */ | 23 | #endif /* __ARCH_ARM_MACH_S3C2410_COMMON_H */ |
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c24xx/dma-s3c2410.c index 4803338cf56e..4803338cf56e 100644 --- a/arch/arm/mach-s3c2410/dma.c +++ b/arch/arm/mach-s3c24xx/dma-s3c2410.c | |||
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c24xx/dma-s3c2412.c index 38472ac920ff..38472ac920ff 100644 --- a/arch/arm/mach-s3c2412/dma.c +++ b/arch/arm/mach-s3c24xx/dma-s3c2412.c | |||
diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c24xx/dma-s3c2440.c index 5f0a0c8ef84f..5f0a0c8ef84f 100644 --- a/arch/arm/mach-s3c2440/dma.c +++ b/arch/arm/mach-s3c24xx/dma-s3c2440.c | |||
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c24xx/dma-s3c2443.c index 14224517e621..e227c472a40a 100644 --- a/arch/arm/mach-s3c2443/dma.c +++ b/arch/arm/mach-s3c24xx/dma-s3c2443.c | |||
@@ -51,7 +51,7 @@ static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings[] = { | |||
51 | .name = "xdreq1", | 51 | .name = "xdreq1", |
52 | .channels = MAP(S3C2443_DMAREQSEL_XDREQ1), | 52 | .channels = MAP(S3C2443_DMAREQSEL_XDREQ1), |
53 | }, | 53 | }, |
54 | [DMACH_SDI] = { | 54 | [DMACH_SDI] = { /* only on S3C2443 */ |
55 | .name = "sdi", | 55 | .name = "sdi", |
56 | .channels = MAP(S3C2443_DMAREQSEL_SDI), | 56 | .channels = MAP(S3C2443_DMAREQSEL_SDI), |
57 | }, | 57 | }, |
@@ -59,7 +59,7 @@ static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings[] = { | |||
59 | .name = "spi0", | 59 | .name = "spi0", |
60 | .channels = MAP(S3C2443_DMAREQSEL_SPI0TX), | 60 | .channels = MAP(S3C2443_DMAREQSEL_SPI0TX), |
61 | }, | 61 | }, |
62 | [DMACH_SPI1] = { | 62 | [DMACH_SPI1] = { /* only on S3C2443/S3C2450 */ |
63 | .name = "spi1", | 63 | .name = "spi1", |
64 | .channels = MAP(S3C2443_DMAREQSEL_SPI1TX), | 64 | .channels = MAP(S3C2443_DMAREQSEL_SPI1TX), |
65 | }, | 65 | }, |
@@ -71,11 +71,11 @@ static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings[] = { | |||
71 | .name = "uart1", | 71 | .name = "uart1", |
72 | .channels = MAP(S3C2443_DMAREQSEL_UART1_0), | 72 | .channels = MAP(S3C2443_DMAREQSEL_UART1_0), |
73 | }, | 73 | }, |
74 | [DMACH_UART2] = { | 74 | [DMACH_UART2] = { |
75 | .name = "uart2", | 75 | .name = "uart2", |
76 | .channels = MAP(S3C2443_DMAREQSEL_UART2_0), | 76 | .channels = MAP(S3C2443_DMAREQSEL_UART2_0), |
77 | }, | 77 | }, |
78 | [DMACH_UART3] = { | 78 | [DMACH_UART3] = { |
79 | .name = "uart3", | 79 | .name = "uart3", |
80 | .channels = MAP(S3C2443_DMAREQSEL_UART3_0), | 80 | .channels = MAP(S3C2443_DMAREQSEL_UART3_0), |
81 | }, | 81 | }, |
@@ -87,11 +87,11 @@ static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings[] = { | |||
87 | .name = "uart1", | 87 | .name = "uart1", |
88 | .channels = MAP(S3C2443_DMAREQSEL_UART1_1), | 88 | .channels = MAP(S3C2443_DMAREQSEL_UART1_1), |
89 | }, | 89 | }, |
90 | [DMACH_UART2_SRC2] = { | 90 | [DMACH_UART2_SRC2] = { |
91 | .name = "uart2", | 91 | .name = "uart2", |
92 | .channels = MAP(S3C2443_DMAREQSEL_UART2_1), | 92 | .channels = MAP(S3C2443_DMAREQSEL_UART2_1), |
93 | }, | 93 | }, |
94 | [DMACH_UART3_SRC2] = { | 94 | [DMACH_UART3_SRC2] = { |
95 | .name = "uart3", | 95 | .name = "uart3", |
96 | .channels = MAP(S3C2443_DMAREQSEL_UART3_1), | 96 | .channels = MAP(S3C2443_DMAREQSEL_UART3_1), |
97 | }, | 97 | }, |
@@ -142,6 +142,23 @@ static int __init s3c2443_dma_add(struct device *dev, | |||
142 | return s3c24xx_dma_init_map(&s3c2443_dma_sel); | 142 | return s3c24xx_dma_init_map(&s3c2443_dma_sel); |
143 | } | 143 | } |
144 | 144 | ||
145 | #ifdef CONFIG_CPU_S3C2416 | ||
146 | /* S3C2416 DMA contains the same selection table as the S3C2443 */ | ||
147 | static struct subsys_interface s3c2416_dma_interface = { | ||
148 | .name = "s3c2416_dma", | ||
149 | .subsys = &s3c2416_subsys, | ||
150 | .add_dev = s3c2443_dma_add, | ||
151 | }; | ||
152 | |||
153 | static int __init s3c2416_dma_init(void) | ||
154 | { | ||
155 | return subsys_interface_register(&s3c2416_dma_interface); | ||
156 | } | ||
157 | |||
158 | arch_initcall(s3c2416_dma_init); | ||
159 | #endif | ||
160 | |||
161 | #ifdef CONFIG_CPU_S3C2443 | ||
145 | static struct subsys_interface s3c2443_dma_interface = { | 162 | static struct subsys_interface s3c2443_dma_interface = { |
146 | .name = "s3c2443_dma", | 163 | .name = "s3c2443_dma", |
147 | .subsys = &s3c2443_subsys, | 164 | .subsys = &s3c2443_subsys, |
@@ -154,3 +171,4 @@ static int __init s3c2443_dma_init(void) | |||
154 | } | 171 | } |
155 | 172 | ||
156 | arch_initcall(s3c2443_dma_init); | 173 | arch_initcall(s3c2443_dma_init); |
174 | #endif | ||
diff --git a/arch/arm/mach-s3c2410/h1940-bluetooth.c b/arch/arm/mach-s3c24xx/h1940-bluetooth.c index a5eeb62ce1c2..a5eeb62ce1c2 100644 --- a/arch/arm/mach-s3c2410/h1940-bluetooth.c +++ b/arch/arm/mach-s3c24xx/h1940-bluetooth.c | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/anubis-cpld.h b/arch/arm/mach-s3c24xx/include/mach/anubis-cpld.h index 1b614d5a81f3..1b614d5a81f3 100644 --- a/arch/arm/mach-s3c2410/include/mach/anubis-cpld.h +++ b/arch/arm/mach-s3c24xx/include/mach/anubis-cpld.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/anubis-irq.h b/arch/arm/mach-s3c24xx/include/mach/anubis-irq.h index a2a328134e34..a2a328134e34 100644 --- a/arch/arm/mach-s3c2410/include/mach/anubis-irq.h +++ b/arch/arm/mach-s3c24xx/include/mach/anubis-irq.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/anubis-map.h b/arch/arm/mach-s3c24xx/include/mach/anubis-map.h index c9deb3a5b2c3..c9deb3a5b2c3 100644 --- a/arch/arm/mach-s3c2410/include/mach/anubis-map.h +++ b/arch/arm/mach-s3c24xx/include/mach/anubis-map.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/bast-cpld.h b/arch/arm/mach-s3c24xx/include/mach/bast-cpld.h index bee2a7a932a0..bee2a7a932a0 100644 --- a/arch/arm/mach-s3c2410/include/mach/bast-cpld.h +++ b/arch/arm/mach-s3c24xx/include/mach/bast-cpld.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/bast-irq.h b/arch/arm/mach-s3c24xx/include/mach/bast-irq.h index cac428c42e7f..cac428c42e7f 100644 --- a/arch/arm/mach-s3c2410/include/mach/bast-irq.h +++ b/arch/arm/mach-s3c24xx/include/mach/bast-irq.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/bast-map.h b/arch/arm/mach-s3c24xx/include/mach/bast-map.h index 6e7dc9d0cf0e..6e7dc9d0cf0e 100644 --- a/arch/arm/mach-s3c2410/include/mach/bast-map.h +++ b/arch/arm/mach-s3c24xx/include/mach/bast-map.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/bast-pmu.h b/arch/arm/mach-s3c24xx/include/mach/bast-pmu.h index 4c38b39b741d..4c38b39b741d 100644 --- a/arch/arm/mach-s3c2410/include/mach/bast-pmu.h +++ b/arch/arm/mach-s3c24xx/include/mach/bast-pmu.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/debug-macro.S b/arch/arm/mach-s3c24xx/include/mach/debug-macro.S index 4135de87d1f7..4135de87d1f7 100644 --- a/arch/arm/mach-s3c2410/include/mach/debug-macro.S +++ b/arch/arm/mach-s3c24xx/include/mach/debug-macro.S | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/dma.h b/arch/arm/mach-s3c24xx/include/mach/dma.h index acbdfecd4186..acbdfecd4186 100644 --- a/arch/arm/mach-s3c2410/include/mach/dma.h +++ b/arch/arm/mach-s3c24xx/include/mach/dma.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/entry-macro.S b/arch/arm/mach-s3c24xx/include/mach/entry-macro.S index 473b3cd37d9b..7615a14773fa 100644 --- a/arch/arm/mach-s3c2410/include/mach/entry-macro.S +++ b/arch/arm/mach-s3c24xx/include/mach/entry-macro.S | |||
@@ -25,9 +25,6 @@ | |||
25 | .macro get_irqnr_preamble, base, tmp | 25 | .macro get_irqnr_preamble, base, tmp |
26 | .endm | 26 | .endm |
27 | 27 | ||
28 | .macro arch_ret_to_user, tmp1, tmp2 | ||
29 | .endm | ||
30 | |||
31 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 28 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
32 | 29 | ||
33 | mov \base, #S3C24XX_VA_IRQ | 30 | mov \base, #S3C24XX_VA_IRQ |
@@ -71,8 +68,3 @@ | |||
71 | @@ exit here, Z flag unset if IRQ | 68 | @@ exit here, Z flag unset if IRQ |
72 | 69 | ||
73 | .endm | 70 | .endm |
74 | |||
75 | /* currently don't need an disable_fiq macro */ | ||
76 | |||
77 | .macro disable_fiq | ||
78 | .endm | ||
diff --git a/arch/arm/mach-s3c2410/include/mach/fb.h b/arch/arm/mach-s3c24xx/include/mach/fb.h index a957bc8ed44f..a957bc8ed44f 100644 --- a/arch/arm/mach-s3c2410/include/mach/fb.h +++ b/arch/arm/mach-s3c24xx/include/mach/fb.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-fns.h b/arch/arm/mach-s3c24xx/include/mach/gpio-fns.h index c53ad34c6579..c53ad34c6579 100644 --- a/arch/arm/mach-s3c2410/include/mach/gpio-fns.h +++ b/arch/arm/mach-s3c24xx/include/mach/gpio-fns.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h b/arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h index 019ea86057f6..019ea86057f6 100644 --- a/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h +++ b/arch/arm/mach-s3c24xx/include/mach/gpio-nrs.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-track.h b/arch/arm/mach-s3c24xx/include/mach/gpio-track.h index c410a078622c..c410a078622c 100644 --- a/arch/arm/mach-s3c2410/include/mach/gpio-track.h +++ b/arch/arm/mach-s3c24xx/include/mach/gpio-track.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio.h b/arch/arm/mach-s3c24xx/include/mach/gpio.h index 6fac70f3484e..6fac70f3484e 100644 --- a/arch/arm/mach-s3c2410/include/mach/gpio.h +++ b/arch/arm/mach-s3c24xx/include/mach/gpio.h | |||
diff --git a/arch/arm/mach-s3c2440/include/mach/gta02.h b/arch/arm/mach-s3c24xx/include/mach/gta02.h index 3a56a229cac6..3a56a229cac6 100644 --- a/arch/arm/mach-s3c2440/include/mach/gta02.h +++ b/arch/arm/mach-s3c24xx/include/mach/gta02.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/h1940-latch.h b/arch/arm/mach-s3c24xx/include/mach/h1940-latch.h index fc897d3a056c..fc897d3a056c 100644 --- a/arch/arm/mach-s3c2410/include/mach/h1940-latch.h +++ b/arch/arm/mach-s3c24xx/include/mach/h1940-latch.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/h1940.h b/arch/arm/mach-s3c24xx/include/mach/h1940.h index 2aa683c8d3d6..2aa683c8d3d6 100644 --- a/arch/arm/mach-s3c2410/include/mach/h1940.h +++ b/arch/arm/mach-s3c24xx/include/mach/h1940.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/hardware.h b/arch/arm/mach-s3c24xx/include/mach/hardware.h index aef5631eac58..aef5631eac58 100644 --- a/arch/arm/mach-s3c2410/include/mach/hardware.h +++ b/arch/arm/mach-s3c24xx/include/mach/hardware.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/idle.h b/arch/arm/mach-s3c24xx/include/mach/idle.h index e9ddd706b16e..e9ddd706b16e 100644 --- a/arch/arm/mach-s3c2410/include/mach/idle.h +++ b/arch/arm/mach-s3c24xx/include/mach/idle.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/io.h b/arch/arm/mach-s3c24xx/include/mach/io.h index 118749f37c4c..118749f37c4c 100644 --- a/arch/arm/mach-s3c2410/include/mach/io.h +++ b/arch/arm/mach-s3c24xx/include/mach/io.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/irqs.h b/arch/arm/mach-s3c24xx/include/mach/irqs.h index e53b2177319e..e53b2177319e 100644 --- a/arch/arm/mach-s3c2410/include/mach/irqs.h +++ b/arch/arm/mach-s3c24xx/include/mach/irqs.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/leds-gpio.h b/arch/arm/mach-s3c24xx/include/mach/leds-gpio.h index d8a7672519b6..d8a7672519b6 100644 --- a/arch/arm/mach-s3c2410/include/mach/leds-gpio.h +++ b/arch/arm/mach-s3c24xx/include/mach/leds-gpio.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c24xx/include/mach/map.h index 78ae807f1281..78ae807f1281 100644 --- a/arch/arm/mach-s3c2410/include/mach/map.h +++ b/arch/arm/mach-s3c24xx/include/mach/map.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/osiris-cpld.h b/arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h index e9e36b0abbac..e9e36b0abbac 100644 --- a/arch/arm/mach-s3c2410/include/mach/osiris-cpld.h +++ b/arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/osiris-map.h b/arch/arm/mach-s3c24xx/include/mach/osiris-map.h index 17380f848428..17380f848428 100644 --- a/arch/arm/mach-s3c2410/include/mach/osiris-map.h +++ b/arch/arm/mach-s3c24xx/include/mach/osiris-map.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/otom-map.h b/arch/arm/mach-s3c24xx/include/mach/otom-map.h index f9277a52c145..f9277a52c145 100644 --- a/arch/arm/mach-s3c2410/include/mach/otom-map.h +++ b/arch/arm/mach-s3c24xx/include/mach/otom-map.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/pm-core.h b/arch/arm/mach-s3c24xx/include/mach/pm-core.h index 2eef7e6f7675..2eef7e6f7675 100644 --- a/arch/arm/mach-s3c2410/include/mach/pm-core.h +++ b/arch/arm/mach-s3c24xx/include/mach/pm-core.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-clock.h b/arch/arm/mach-s3c24xx/include/mach/regs-clock.h index 3415b60082d7..3415b60082d7 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-clock.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-clock.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-dsc.h b/arch/arm/mach-s3c24xx/include/mach/regs-dsc.h index 98fd4a05587c..98fd4a05587c 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-dsc.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-dsc.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h b/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h index cac1ad6b582c..cac1ad6b582c 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h b/arch/arm/mach-s3c24xx/include/mach/regs-gpioj.h index 19575e061114..19575e061114 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-gpioj.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-irq.h b/arch/arm/mach-s3c24xx/include/mach/regs-irq.h index 0f07ba30b1fb..0f07ba30b1fb 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-irq.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-irq.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-lcd.h b/arch/arm/mach-s3c24xx/include/mach/regs-lcd.h index ee8f040aff5f..ee8f040aff5f 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-lcd.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-lcd.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-mem.h b/arch/arm/mach-s3c24xx/include/mach/regs-mem.h index e0c67b0163d8..e0c67b0163d8 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-mem.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-mem.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-power.h b/arch/arm/mach-s3c24xx/include/mach/regs-power.h index 4932b87bdf3d..4932b87bdf3d 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-power.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-power.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2412-mem.h b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2412-mem.h index fb6352515090..fb6352515090 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2412-mem.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2412-mem.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2412.h b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2412.h index aa69dc79bc38..aa69dc79bc38 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2412.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2412.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2416-mem.h b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416-mem.h index 2f31b74974af..2f31b74974af 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2416-mem.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416-mem.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2416.h b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416.h index e443167efb87..e443167efb87 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2416.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2416.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h index c3feff3c0488..c3feff3c0488 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-sdi.h b/arch/arm/mach-s3c24xx/include/mach/regs-sdi.h index cbf2d8884e30..cbf2d8884e30 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-sdi.h +++ b/arch/arm/mach-s3c24xx/include/mach/regs-sdi.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/tick.h b/arch/arm/mach-s3c24xx/include/mach/tick.h index 544da41979db..544da41979db 100644 --- a/arch/arm/mach-s3c2410/include/mach/tick.h +++ b/arch/arm/mach-s3c24xx/include/mach/tick.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/timex.h b/arch/arm/mach-s3c24xx/include/mach/timex.h index fe9ca1ffd51b..fe9ca1ffd51b 100644 --- a/arch/arm/mach-s3c2410/include/mach/timex.h +++ b/arch/arm/mach-s3c24xx/include/mach/timex.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/uncompress.h b/arch/arm/mach-s3c24xx/include/mach/uncompress.h index 8b283f847daa..8b283f847daa 100644 --- a/arch/arm/mach-s3c2410/include/mach/uncompress.h +++ b/arch/arm/mach-s3c24xx/include/mach/uncompress.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/vr1000-cpld.h b/arch/arm/mach-s3c24xx/include/mach/vr1000-cpld.h index e4119913d7c5..e4119913d7c5 100644 --- a/arch/arm/mach-s3c2410/include/mach/vr1000-cpld.h +++ b/arch/arm/mach-s3c24xx/include/mach/vr1000-cpld.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/vr1000-irq.h b/arch/arm/mach-s3c24xx/include/mach/vr1000-irq.h index 47add133b8ee..47add133b8ee 100644 --- a/arch/arm/mach-s3c2410/include/mach/vr1000-irq.h +++ b/arch/arm/mach-s3c24xx/include/mach/vr1000-irq.h | |||
diff --git a/arch/arm/mach-s3c2410/include/mach/vr1000-map.h b/arch/arm/mach-s3c24xx/include/mach/vr1000-map.h index 99612fcc4eb2..99612fcc4eb2 100644 --- a/arch/arm/mach-s3c2410/include/mach/vr1000-map.h +++ b/arch/arm/mach-s3c24xx/include/mach/vr1000-map.h | |||
diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c24xx/irq-s3c2412.c index e65619ddbccc..e65619ddbccc 100644 --- a/arch/arm/mach-s3c2412/irq.c +++ b/arch/arm/mach-s3c24xx/irq-s3c2412.c | |||
diff --git a/arch/arm/mach-s3c2416/irq.c b/arch/arm/mach-s3c24xx/irq-s3c2416.c index fd49f35e448e..fd49f35e448e 100644 --- a/arch/arm/mach-s3c2416/irq.c +++ b/arch/arm/mach-s3c24xx/irq-s3c2416.c | |||
diff --git a/arch/arm/mach-s3c2440/irq.c b/arch/arm/mach-s3c24xx/irq-s3c2440.c index 4a18cde439cc..4a18cde439cc 100644 --- a/arch/arm/mach-s3c2440/irq.c +++ b/arch/arm/mach-s3c24xx/irq-s3c2440.c | |||
diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c24xx/irq-s3c2443.c index ac2829f56d12..ac2829f56d12 100644 --- a/arch/arm/mach-s3c2443/irq.c +++ b/arch/arm/mach-s3c24xx/irq-s3c2443.c | |||
diff --git a/arch/arm/mach-s3c2440/s3c244x-irq.c b/arch/arm/mach-s3c24xx/irq-s3c244x.c index 5fe8e58d3afd..5fe8e58d3afd 100644 --- a/arch/arm/mach-s3c2440/s3c244x-irq.c +++ b/arch/arm/mach-s3c24xx/irq-s3c244x.c | |||
diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c24xx/mach-amlm5900.c index 4220cc60de3c..4220cc60de3c 100644 --- a/arch/arm/mach-s3c2410/mach-amlm5900.c +++ b/arch/arm/mach-s3c24xx/mach-amlm5900.c | |||
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c24xx/mach-anubis.c index 24569550de1a..9e0f74515bb1 100644 --- a/arch/arm/mach-s3c2440/mach-anubis.c +++ b/arch/arm/mach-s3c24xx/mach-anubis.c | |||
@@ -55,6 +55,7 @@ | |||
55 | #include <plat/cpu.h> | 55 | #include <plat/cpu.h> |
56 | #include <plat/audio-simtec.h> | 56 | #include <plat/audio-simtec.h> |
57 | 57 | ||
58 | #include "simtec.h" | ||
58 | #include "common.h" | 59 | #include "common.h" |
59 | 60 | ||
60 | #define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics" | 61 | #define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics" |
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c24xx/mach-at2440evb.c index d6a9763110cd..d6a9763110cd 100644 --- a/arch/arm/mach-s3c2440/mach-at2440evb.c +++ b/arch/arm/mach-s3c24xx/mach-at2440evb.c | |||
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c24xx/mach-bast.c index feeaf73933dc..53219c02eca0 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c24xx/mach-bast.c | |||
@@ -64,8 +64,7 @@ | |||
64 | #include <plat/gpio-cfg.h> | 64 | #include <plat/gpio-cfg.h> |
65 | #include <plat/audio-simtec.h> | 65 | #include <plat/audio-simtec.h> |
66 | 66 | ||
67 | #include "usb-simtec.h" | 67 | #include "simtec.h" |
68 | #include "nor-simtec.h" | ||
69 | #include "common.h" | 68 | #include "common.h" |
70 | 69 | ||
71 | #define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics" | 70 | #define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics" |
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c index 5859e609d28c..d0e0ad4e6598 100644 --- a/arch/arm/mach-s3c2440/mach-gta02.c +++ b/arch/arm/mach-s3c24xx/mach-gta02.c | |||
@@ -38,6 +38,7 @@ | |||
38 | #include <linux/platform_device.h> | 38 | #include <linux/platform_device.h> |
39 | #include <linux/serial_core.h> | 39 | #include <linux/serial_core.h> |
40 | #include <linux/spi/spi.h> | 40 | #include <linux/spi/spi.h> |
41 | #include <linux/spi/s3c24xx.h> | ||
41 | 42 | ||
42 | #include <linux/mmc/host.h> | 43 | #include <linux/mmc/host.h> |
43 | 44 | ||
@@ -73,7 +74,6 @@ | |||
73 | #include <mach/regs-gpioj.h> | 74 | #include <mach/regs-gpioj.h> |
74 | #include <mach/fb.h> | 75 | #include <mach/fb.h> |
75 | 76 | ||
76 | #include <mach/spi.h> | ||
77 | #include <plat/usb-control.h> | 77 | #include <plat/usb-control.h> |
78 | #include <mach/regs-mem.h> | 78 | #include <mach/regs-mem.h> |
79 | #include <mach/hardware.h> | 79 | #include <mach/hardware.h> |
@@ -258,7 +258,7 @@ static struct pcf50633_bl_platform_data gta02_backlight_data = { | |||
258 | .ramp_time = 5, | 258 | .ramp_time = 5, |
259 | }; | 259 | }; |
260 | 260 | ||
261 | struct pcf50633_platform_data gta02_pcf_pdata = { | 261 | static struct pcf50633_platform_data gta02_pcf_pdata = { |
262 | .resumers = { | 262 | .resumers = { |
263 | [0] = PCF50633_INT1_USBINS | | 263 | [0] = PCF50633_INT1_USBINS | |
264 | PCF50633_INT1_USBREM | | 264 | PCF50633_INT1_USBREM | |
@@ -404,7 +404,7 @@ static struct platform_device gta02_nor_flash = { | |||
404 | }; | 404 | }; |
405 | 405 | ||
406 | 406 | ||
407 | struct platform_device s3c24xx_pwm_device = { | 407 | static struct platform_device s3c24xx_pwm_device = { |
408 | .name = "s3c24xx_pwm", | 408 | .name = "s3c24xx_pwm", |
409 | .num_resources = 0, | 409 | .num_resources = 0, |
410 | }; | 410 | }; |
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c24xx/mach-h1940.c index 41245a603981..6b21ba107eab 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c24xx/mach-h1940.c | |||
@@ -162,7 +162,7 @@ static int h1940_gpiolib_latch_get(struct gpio_chip *chip, | |||
162 | return (latch_state >> (offset + 16)) & 1; | 162 | return (latch_state >> (offset + 16)) & 1; |
163 | } | 163 | } |
164 | 164 | ||
165 | struct gpio_chip h1940_latch_gpiochip = { | 165 | static struct gpio_chip h1940_latch_gpiochip = { |
166 | .base = H1940_LATCH_GPIO(0), | 166 | .base = H1940_LATCH_GPIO(0), |
167 | .owner = THIS_MODULE, | 167 | .owner = THIS_MODULE, |
168 | .label = "H1940_LATCH", | 168 | .label = "H1940_LATCH", |
@@ -304,7 +304,7 @@ static const struct s3c_adc_bat_thresh bat_lut_acin[] = { | |||
304 | { .volt = 3841, .cur = 0, .level = 0}, | 304 | { .volt = 3841, .cur = 0, .level = 0}, |
305 | }; | 305 | }; |
306 | 306 | ||
307 | int h1940_bat_init(void) | 307 | static int h1940_bat_init(void) |
308 | { | 308 | { |
309 | int ret; | 309 | int ret; |
310 | 310 | ||
@@ -317,17 +317,17 @@ int h1940_bat_init(void) | |||
317 | 317 | ||
318 | } | 318 | } |
319 | 319 | ||
320 | void h1940_bat_exit(void) | 320 | static void h1940_bat_exit(void) |
321 | { | 321 | { |
322 | gpio_free(H1940_LATCH_SM803_ENABLE); | 322 | gpio_free(H1940_LATCH_SM803_ENABLE); |
323 | } | 323 | } |
324 | 324 | ||
325 | void h1940_enable_charger(void) | 325 | static void h1940_enable_charger(void) |
326 | { | 326 | { |
327 | gpio_set_value(H1940_LATCH_SM803_ENABLE, 1); | 327 | gpio_set_value(H1940_LATCH_SM803_ENABLE, 1); |
328 | } | 328 | } |
329 | 329 | ||
330 | void h1940_disable_charger(void) | 330 | static void h1940_disable_charger(void) |
331 | { | 331 | { |
332 | gpio_set_value(H1940_LATCH_SM803_ENABLE, 0); | 332 | gpio_set_value(H1940_LATCH_SM803_ENABLE, 0); |
333 | } | 333 | } |
@@ -364,7 +364,7 @@ static struct platform_device h1940_battery = { | |||
364 | }, | 364 | }, |
365 | }; | 365 | }; |
366 | 366 | ||
367 | DEFINE_SPINLOCK(h1940_blink_spin); | 367 | static DEFINE_SPINLOCK(h1940_blink_spin); |
368 | 368 | ||
369 | int h1940_led_blink_set(unsigned gpio, int state, | 369 | int h1940_led_blink_set(unsigned gpio, int state, |
370 | unsigned long *delay_on, unsigned long *delay_off) | 370 | unsigned long *delay_on, unsigned long *delay_off) |
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c24xx/mach-jive.c index ae73ba34ecc6..ae73ba34ecc6 100644 --- a/arch/arm/mach-s3c2412/mach-jive.c +++ b/arch/arm/mach-s3c24xx/mach-jive.c | |||
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c24xx/mach-mini2440.c index adbbb85bc4cd..adbbb85bc4cd 100644 --- a/arch/arm/mach-s3c2440/mach-mini2440.c +++ b/arch/arm/mach-s3c24xx/mach-mini2440.c | |||
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c24xx/mach-n30.c index 383d00ca8f60..383d00ca8f60 100644 --- a/arch/arm/mach-s3c2410/mach-n30.c +++ b/arch/arm/mach-s3c24xx/mach-n30.c | |||
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c24xx/mach-nexcoder.c index 40eaf844bc1f..40eaf844bc1f 100644 --- a/arch/arm/mach-s3c2440/mach-nexcoder.c +++ b/arch/arm/mach-s3c24xx/mach-nexcoder.c | |||
diff --git a/arch/arm/mach-s3c2440/mach-osiris-dvs.c b/arch/arm/mach-s3c24xx/mach-osiris-dvs.c index ad2792dfbee1..ad2792dfbee1 100644 --- a/arch/arm/mach-s3c2440/mach-osiris-dvs.c +++ b/arch/arm/mach-s3c24xx/mach-osiris-dvs.c | |||
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c24xx/mach-osiris.c index 4c480ef734f6..4c480ef734f6 100644 --- a/arch/arm/mach-s3c2440/mach-osiris.c +++ b/arch/arm/mach-s3c24xx/mach-osiris.c | |||
diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c24xx/mach-otom.c index 5f1e0eeb38a9..5f1e0eeb38a9 100644 --- a/arch/arm/mach-s3c2410/mach-otom.c +++ b/arch/arm/mach-s3c24xx/mach-otom.c | |||
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c24xx/mach-qt2410.c index 91c16d9d2459..91c16d9d2459 100644 --- a/arch/arm/mach-s3c2410/mach-qt2410.c +++ b/arch/arm/mach-s3c24xx/mach-qt2410.c | |||
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c index 80077f6472ee..4a8e2d34994c 100644 --- a/arch/arm/mach-s3c2440/mach-rx1950.c +++ b/arch/arm/mach-s3c24xx/mach-rx1950.c | |||
@@ -217,7 +217,7 @@ static const struct s3c_adc_bat_thresh bat_lut_acin[] = { | |||
217 | { .volt = 3820, .cur = 0, .level = 0}, | 217 | { .volt = 3820, .cur = 0, .level = 0}, |
218 | }; | 218 | }; |
219 | 219 | ||
220 | int rx1950_bat_init(void) | 220 | static int rx1950_bat_init(void) |
221 | { | 221 | { |
222 | int ret; | 222 | int ret; |
223 | 223 | ||
@@ -236,25 +236,25 @@ err_gpio1: | |||
236 | return ret; | 236 | return ret; |
237 | } | 237 | } |
238 | 238 | ||
239 | void rx1950_bat_exit(void) | 239 | static void rx1950_bat_exit(void) |
240 | { | 240 | { |
241 | gpio_free(S3C2410_GPJ(2)); | 241 | gpio_free(S3C2410_GPJ(2)); |
242 | gpio_free(S3C2410_GPJ(3)); | 242 | gpio_free(S3C2410_GPJ(3)); |
243 | } | 243 | } |
244 | 244 | ||
245 | void rx1950_enable_charger(void) | 245 | static void rx1950_enable_charger(void) |
246 | { | 246 | { |
247 | gpio_direction_output(S3C2410_GPJ(2), 1); | 247 | gpio_direction_output(S3C2410_GPJ(2), 1); |
248 | gpio_direction_output(S3C2410_GPJ(3), 1); | 248 | gpio_direction_output(S3C2410_GPJ(3), 1); |
249 | } | 249 | } |
250 | 250 | ||
251 | void rx1950_disable_charger(void) | 251 | static void rx1950_disable_charger(void) |
252 | { | 252 | { |
253 | gpio_direction_output(S3C2410_GPJ(2), 0); | 253 | gpio_direction_output(S3C2410_GPJ(2), 0); |
254 | gpio_direction_output(S3C2410_GPJ(3), 0); | 254 | gpio_direction_output(S3C2410_GPJ(3), 0); |
255 | } | 255 | } |
256 | 256 | ||
257 | DEFINE_SPINLOCK(rx1950_blink_spin); | 257 | static DEFINE_SPINLOCK(rx1950_blink_spin); |
258 | 258 | ||
259 | static int rx1950_led_blink_set(unsigned gpio, int state, | 259 | static int rx1950_led_blink_set(unsigned gpio, int state, |
260 | unsigned long *delay_on, unsigned long *delay_off) | 260 | unsigned long *delay_on, unsigned long *delay_off) |
@@ -382,7 +382,7 @@ static struct s3c2410fb_mach_info rx1950_lcd_cfg = { | |||
382 | 382 | ||
383 | static struct pwm_device *lcd_pwm; | 383 | static struct pwm_device *lcd_pwm; |
384 | 384 | ||
385 | void rx1950_lcd_power(int enable) | 385 | static void rx1950_lcd_power(int enable) |
386 | { | 386 | { |
387 | int i; | 387 | int i; |
388 | static int enabled; | 388 | static int enabled; |
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c24xx/mach-rx3715.c index 20103bafbd4b..20103bafbd4b 100644 --- a/arch/arm/mach-s3c2440/mach-rx3715.c +++ b/arch/arm/mach-s3c24xx/mach-rx3715.c | |||
diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c24xx/mach-smdk2410.c index bdc27e772876..bdc27e772876 100644 --- a/arch/arm/mach-s3c2410/mach-smdk2410.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2410.c | |||
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c24xx/mach-smdk2413.c index b11451b853d8..b11451b853d8 100644 --- a/arch/arm/mach-s3c2412/mach-smdk2413.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2413.c | |||
diff --git a/arch/arm/mach-s3c2416/mach-smdk2416.c b/arch/arm/mach-s3c24xx/mach-smdk2416.c index eebe1e72b93e..30a44f806e01 100644 --- a/arch/arm/mach-s3c2416/mach-smdk2416.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2416.c | |||
@@ -125,7 +125,7 @@ static struct s3c2410_uartcfg smdk2416_uartcfgs[] __initdata = { | |||
125 | } | 125 | } |
126 | }; | 126 | }; |
127 | 127 | ||
128 | void smdk2416_hsudc_gpio_init(void) | 128 | static void smdk2416_hsudc_gpio_init(void) |
129 | { | 129 | { |
130 | s3c_gpio_setpull(S3C2410_GPH(14), S3C_GPIO_PULL_UP); | 130 | s3c_gpio_setpull(S3C2410_GPH(14), S3C_GPIO_PULL_UP); |
131 | s3c_gpio_setpull(S3C2410_GPF(2), S3C_GPIO_PULL_NONE); | 131 | s3c_gpio_setpull(S3C2410_GPF(2), S3C_GPIO_PULL_NONE); |
@@ -133,20 +133,20 @@ void smdk2416_hsudc_gpio_init(void) | |||
133 | s3c2410_modify_misccr(S3C2416_MISCCR_SEL_SUSPND, 0); | 133 | s3c2410_modify_misccr(S3C2416_MISCCR_SEL_SUSPND, 0); |
134 | } | 134 | } |
135 | 135 | ||
136 | void smdk2416_hsudc_gpio_uninit(void) | 136 | static void smdk2416_hsudc_gpio_uninit(void) |
137 | { | 137 | { |
138 | s3c2410_modify_misccr(S3C2416_MISCCR_SEL_SUSPND, 1); | 138 | s3c2410_modify_misccr(S3C2416_MISCCR_SEL_SUSPND, 1); |
139 | s3c_gpio_setpull(S3C2410_GPH(14), S3C_GPIO_PULL_NONE); | 139 | s3c_gpio_setpull(S3C2410_GPH(14), S3C_GPIO_PULL_NONE); |
140 | s3c_gpio_cfgpin(S3C2410_GPH(14), S3C_GPIO_SFN(0)); | 140 | s3c_gpio_cfgpin(S3C2410_GPH(14), S3C_GPIO_SFN(0)); |
141 | } | 141 | } |
142 | 142 | ||
143 | struct s3c24xx_hsudc_platdata smdk2416_hsudc_platdata = { | 143 | static struct s3c24xx_hsudc_platdata smdk2416_hsudc_platdata = { |
144 | .epnum = 9, | 144 | .epnum = 9, |
145 | .gpio_init = smdk2416_hsudc_gpio_init, | 145 | .gpio_init = smdk2416_hsudc_gpio_init, |
146 | .gpio_uninit = smdk2416_hsudc_gpio_uninit, | 146 | .gpio_uninit = smdk2416_hsudc_gpio_uninit, |
147 | }; | 147 | }; |
148 | 148 | ||
149 | struct s3c_fb_pd_win smdk2416_fb_win[] = { | 149 | static struct s3c_fb_pd_win smdk2416_fb_win[] = { |
150 | [0] = { | 150 | [0] = { |
151 | /* think this is the same as the smdk6410 */ | 151 | /* think this is the same as the smdk6410 */ |
152 | .win_mode = { | 152 | .win_mode = { |
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c24xx/mach-smdk2440.c index 1deb60d12a60..1deb60d12a60 100644 --- a/arch/arm/mach-s3c2440/mach-smdk2440.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2440.c | |||
diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c24xx/mach-smdk2443.c index 209236956222..209236956222 100644 --- a/arch/arm/mach-s3c2443/mach-smdk2443.c +++ b/arch/arm/mach-s3c24xx/mach-smdk2443.c | |||
diff --git a/arch/arm/mach-s3c2410/mach-tct_hammer.c b/arch/arm/mach-s3c24xx/mach-tct_hammer.c index 1114666f0efb..1114666f0efb 100644 --- a/arch/arm/mach-s3c2410/mach-tct_hammer.c +++ b/arch/arm/mach-s3c24xx/mach-tct_hammer.c | |||
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c24xx/mach-vr1000.c index dbe668a803ef..87608d45dac4 100644 --- a/arch/arm/mach-s3c2410/mach-vr1000.c +++ b/arch/arm/mach-s3c24xx/mach-vr1000.c | |||
@@ -51,8 +51,7 @@ | |||
51 | #include <plat/iic.h> | 51 | #include <plat/iic.h> |
52 | #include <plat/audio-simtec.h> | 52 | #include <plat/audio-simtec.h> |
53 | 53 | ||
54 | #include "usb-simtec.h" | 54 | #include "simtec.h" |
55 | #include "nor-simtec.h" | ||
56 | #include "common.h" | 55 | #include "common.h" |
57 | 56 | ||
58 | /* macros for virtual address mods for the io space entries */ | 57 | /* macros for virtual address mods for the io space entries */ |
diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c24xx/mach-vstms.c index 94bfaa1fb148..94bfaa1fb148 100644 --- a/arch/arm/mach-s3c2412/mach-vstms.c +++ b/arch/arm/mach-s3c24xx/mach-vstms.c | |||
diff --git a/arch/arm/mach-s3c2410/pm-h1940.S b/arch/arm/mach-s3c24xx/pm-h1940.S index c93bf2db9f4d..c93bf2db9f4d 100644 --- a/arch/arm/mach-s3c2410/pm-h1940.S +++ b/arch/arm/mach-s3c24xx/pm-h1940.S | |||
diff --git a/arch/arm/mach-s3c2410/pm.c b/arch/arm/mach-s3c24xx/pm-s3c2410.c index 03f706dd6009..03f706dd6009 100644 --- a/arch/arm/mach-s3c2410/pm.c +++ b/arch/arm/mach-s3c24xx/pm-s3c2410.c | |||
diff --git a/arch/arm/mach-s3c2412/pm.c b/arch/arm/mach-s3c24xx/pm-s3c2412.c index d04588506ec4..d04588506ec4 100644 --- a/arch/arm/mach-s3c2412/pm.c +++ b/arch/arm/mach-s3c24xx/pm-s3c2412.c | |||
diff --git a/arch/arm/mach-s3c2416/pm.c b/arch/arm/mach-s3c24xx/pm-s3c2416.c index 1bd4817b8eb8..1bd4817b8eb8 100644 --- a/arch/arm/mach-s3c2416/pm.c +++ b/arch/arm/mach-s3c24xx/pm-s3c2416.c | |||
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c24xx/s3c2410.c index 061b6bb1a557..061b6bb1a557 100644 --- a/arch/arm/mach-s3c2410/s3c2410.c +++ b/arch/arm/mach-s3c24xx/s3c2410.c | |||
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c24xx/s3c2412.c index aff6e85a97c6..c6eac9871093 100644 --- a/arch/arm/mach-s3c2412/s3c2412.c +++ b/arch/arm/mach-s3c24xx/s3c2412.c | |||
@@ -32,8 +32,6 @@ | |||
32 | #include <asm/proc-fns.h> | 32 | #include <asm/proc-fns.h> |
33 | #include <asm/irq.h> | 33 | #include <asm/irq.h> |
34 | 34 | ||
35 | #include <mach/idle.h> | ||
36 | |||
37 | #include <plat/cpu-freq.h> | 35 | #include <plat/cpu-freq.h> |
38 | 36 | ||
39 | #include <mach/regs-clock.h> | 37 | #include <mach/regs-clock.h> |
@@ -164,7 +162,7 @@ void __init s3c2412_map_io(void) | |||
164 | 162 | ||
165 | /* set our idle function */ | 163 | /* set our idle function */ |
166 | 164 | ||
167 | s3c24xx_idle = s3c2412_idle; | 165 | arm_pm_idle = s3c2412_idle; |
168 | 166 | ||
169 | /* register our io-tables */ | 167 | /* register our io-tables */ |
170 | 168 | ||
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c24xx/s3c2416.c index 5287d2808d3e..08bb0355159d 100644 --- a/arch/arm/mach-s3c2416/s3c2416.c +++ b/arch/arm/mach-s3c24xx/s3c2416.c | |||
@@ -44,7 +44,6 @@ | |||
44 | #include <asm/proc-fns.h> | 44 | #include <asm/proc-fns.h> |
45 | #include <asm/irq.h> | 45 | #include <asm/irq.h> |
46 | 46 | ||
47 | #include <mach/idle.h> | ||
48 | #include <mach/regs-s3c2443-clock.h> | 47 | #include <mach/regs-s3c2443-clock.h> |
49 | 48 | ||
50 | #include <plat/gpio-core.h> | 49 | #include <plat/gpio-core.h> |
@@ -88,8 +87,6 @@ int __init s3c2416_init(void) | |||
88 | { | 87 | { |
89 | printk(KERN_INFO "S3C2416: Initializing architecture\n"); | 88 | printk(KERN_INFO "S3C2416: Initializing architecture\n"); |
90 | 89 | ||
91 | /* s3c24xx_idle = s3c2416_idle; */ | ||
92 | |||
93 | /* change WDT IRQ number */ | 90 | /* change WDT IRQ number */ |
94 | s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; | 91 | s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; |
95 | s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT; | 92 | s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT; |
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c24xx/s3c2440.c index 517623a09fc5..517623a09fc5 100644 --- a/arch/arm/mach-s3c2440/s3c2440.c +++ b/arch/arm/mach-s3c24xx/s3c2440.c | |||
diff --git a/arch/arm/mach-s3c2440/s3c2442.c b/arch/arm/mach-s3c24xx/s3c2442.c index 22cb7c94a8c8..22cb7c94a8c8 100644 --- a/arch/arm/mach-s3c2440/s3c2442.c +++ b/arch/arm/mach-s3c24xx/s3c2442.c | |||
diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c24xx/s3c2443.c index b9deaeb0dfff..b9deaeb0dfff 100644 --- a/arch/arm/mach-s3c2443/s3c2443.c +++ b/arch/arm/mach-s3c24xx/s3c2443.c | |||
diff --git a/arch/arm/mach-s3c2440/s3c244x.c b/arch/arm/mach-s3c24xx/s3c244x.c index 36bc60f61d0a..36bc60f61d0a 100644 --- a/arch/arm/mach-s3c2440/s3c244x.c +++ b/arch/arm/mach-s3c24xx/s3c244x.c | |||
diff --git a/arch/arm/plat-s3c24xx/setup-i2c.c b/arch/arm/mach-s3c24xx/setup-i2c.c index 9e90a7cbd1d6..9e90a7cbd1d6 100644 --- a/arch/arm/plat-s3c24xx/setup-i2c.c +++ b/arch/arm/mach-s3c24xx/setup-i2c.c | |||
diff --git a/arch/arm/mach-s3c2416/setup-sdhci-gpio.c b/arch/arm/mach-s3c24xx/setup-sdhci-gpio.c index f65cb3ef16ce..f65cb3ef16ce 100644 --- a/arch/arm/mach-s3c2416/setup-sdhci-gpio.c +++ b/arch/arm/mach-s3c24xx/setup-sdhci-gpio.c | |||
diff --git a/arch/arm/plat-s3c24xx/setup-ts.c b/arch/arm/mach-s3c24xx/setup-ts.c index ed2638663675..ed2638663675 100644 --- a/arch/arm/plat-s3c24xx/setup-ts.c +++ b/arch/arm/mach-s3c24xx/setup-ts.c | |||
diff --git a/arch/arm/plat-s3c24xx/simtec-audio.c b/arch/arm/mach-s3c24xx/simtec-audio.c index 6bc832e0d8ea..11881c9a38c0 100644 --- a/arch/arm/plat-s3c24xx/simtec-audio.c +++ b/arch/arm/mach-s3c24xx/simtec-audio.c | |||
@@ -27,6 +27,8 @@ | |||
27 | #include <plat/audio-simtec.h> | 27 | #include <plat/audio-simtec.h> |
28 | #include <plat/devs.h> | 28 | #include <plat/devs.h> |
29 | 29 | ||
30 | #include "simtec.h" | ||
31 | |||
30 | /* platform ops for audio */ | 32 | /* platform ops for audio */ |
31 | 33 | ||
32 | static void simtec_audio_startup_lrroute(void) | 34 | static void simtec_audio_startup_lrroute(void) |
diff --git a/arch/arm/mach-s3c2410/nor-simtec.c b/arch/arm/mach-s3c24xx/simtec-nor.c index ad9f750f1e55..2119ca6a73bc 100644 --- a/arch/arm/mach-s3c2410/nor-simtec.c +++ b/arch/arm/mach-s3c24xx/simtec-nor.c | |||
@@ -30,7 +30,7 @@ | |||
30 | #include <mach/bast-map.h> | 30 | #include <mach/bast-map.h> |
31 | #include <mach/bast-cpld.h> | 31 | #include <mach/bast-cpld.h> |
32 | 32 | ||
33 | #include "nor-simtec.h" | 33 | #include "simtec.h" |
34 | 34 | ||
35 | static void simtec_nor_vpp(struct platform_device *pdev, int vpp) | 35 | static void simtec_nor_vpp(struct platform_device *pdev, int vpp) |
36 | { | 36 | { |
diff --git a/arch/arm/plat-s3c24xx/pm-simtec.c b/arch/arm/mach-s3c24xx/simtec-pm.c index 68296b1fe7e5..68296b1fe7e5 100644 --- a/arch/arm/plat-s3c24xx/pm-simtec.c +++ b/arch/arm/mach-s3c24xx/simtec-pm.c | |||
diff --git a/arch/arm/mach-s3c2410/usb-simtec.c b/arch/arm/mach-s3c24xx/simtec-usb.c index 29bd3d987bec..d91c1a725139 100644 --- a/arch/arm/mach-s3c2410/usb-simtec.c +++ b/arch/arm/mach-s3c24xx/simtec-usb.c | |||
@@ -37,7 +37,7 @@ | |||
37 | #include <plat/usb-control.h> | 37 | #include <plat/usb-control.h> |
38 | #include <plat/devs.h> | 38 | #include <plat/devs.h> |
39 | 39 | ||
40 | #include "usb-simtec.h" | 40 | #include "simtec.h" |
41 | 41 | ||
42 | /* control power and monitor over-current events on various Simtec | 42 | /* control power and monitor over-current events on various Simtec |
43 | * designed boards. | 43 | * designed boards. |
diff --git a/arch/arm/mach-s3c2410/nor-simtec.h b/arch/arm/mach-s3c24xx/simtec.h index f619c1e0d0c8..ae8f4f9ad2ee 100644 --- a/arch/arm/mach-s3c2410/nor-simtec.h +++ b/arch/arm/mach-s3c24xx/simtec.h | |||
@@ -4,11 +4,18 @@ | |||
4 | * http://armlinux.simtec.co.uk/ | 4 | * http://armlinux.simtec.co.uk/ |
5 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
6 | * | 6 | * |
7 | * Simtec NOR mapping | 7 | * Simtec common functions |
8 | * | 8 | * |
9 | * This program is free software; you can redistribute it and/or modify | 9 | * This program is free software; you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License version 2 as | 10 | * it under the terms of the GNU General Public License version 2 as |
11 | * published by the Free Software Foundation. | 11 | * published by the Free Software Foundation. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | struct s3c24xx_audio_simtec_pdata; | ||
15 | |||
14 | extern void nor_simtec_init(void); | 16 | extern void nor_simtec_init(void); |
17 | |||
18 | extern int usb_simtec_init(void); | ||
19 | |||
20 | extern int simtec_audio_add(const char *codec_name, bool has_lr_routing, | ||
21 | struct s3c24xx_audio_simtec_pdata *pdata); | ||
diff --git a/arch/arm/mach-s3c2410/sleep.S b/arch/arm/mach-s3c24xx/sleep-s3c2410.S index dd5b6388a5a5..dd5b6388a5a5 100644 --- a/arch/arm/mach-s3c2410/sleep.S +++ b/arch/arm/mach-s3c24xx/sleep-s3c2410.S | |||
diff --git a/arch/arm/mach-s3c2412/sleep.S b/arch/arm/mach-s3c24xx/sleep-s3c2412.S index c82418ed714d..c82418ed714d 100644 --- a/arch/arm/mach-s3c2412/sleep.S +++ b/arch/arm/mach-s3c24xx/sleep-s3c2412.S | |||
diff --git a/arch/arm/mach-s3c64xx/common.h b/arch/arm/mach-s3c64xx/common.h index 5eb9c9a7d73b..7a10be629aba 100644 --- a/arch/arm/mach-s3c64xx/common.h +++ b/arch/arm/mach-s3c64xx/common.h | |||
@@ -25,8 +25,6 @@ void s3c64xx_setup_clocks(void); | |||
25 | 25 | ||
26 | void s3c64xx_restart(char mode, const char *cmd); | 26 | void s3c64xx_restart(char mode, const char *cmd); |
27 | 27 | ||
28 | extern struct syscore_ops s3c64xx_irq_syscore_ops; | ||
29 | |||
30 | #ifdef CONFIG_CPU_S3C6400 | 28 | #ifdef CONFIG_CPU_S3C6400 |
31 | 29 | ||
32 | extern int s3c6400_init(void); | 30 | extern int s3c6400_init(void); |
diff --git a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S deleted file mode 100644 index dc2bc15142ce..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* arch/arm/mach-s3c6400/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * Ben Dooks <ben@simtec.co.uk> | ||
7 | * | ||
8 | * Low-level IRQ helper macros for the Samsung S3C64XX series | ||
9 | * | ||
10 | * This file is licensed under the terms of the GNU General Public | ||
11 | * License version 2. This program is licensed "as is" without any | ||
12 | * warranty of any kind, whether express or implied. | ||
13 | */ | ||
14 | |||
15 | .macro disable_fiq | ||
16 | .endm | ||
17 | |||
18 | .macro arch_ret_to_user, tmp1, tmp2 | ||
19 | .endm | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h deleted file mode 100644 index 353ed4389ae7..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c6400/include/mach/system.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C6400 - system implementation | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_SYSTEM_H | ||
12 | #define __ASM_ARCH_SYSTEM_H __FILE__ | ||
13 | |||
14 | static void arch_idle(void) | ||
15 | { | ||
16 | /* nothing here yet */ | ||
17 | } | ||
18 | |||
19 | #endif /* __ASM_ARCH_IRQ_H */ | ||
diff --git a/arch/arm/mach-s3c64xx/irq-pm.c b/arch/arm/mach-s3c64xx/irq-pm.c index 8bec61e242c7..0c7e1d960ca4 100644 --- a/arch/arm/mach-s3c64xx/irq-pm.c +++ b/arch/arm/mach-s3c64xx/irq-pm.c | |||
@@ -96,7 +96,7 @@ static void s3c64xx_irq_pm_resume(void) | |||
96 | S3C_PMDBG("%s: IRQ configuration restored\n", __func__); | 96 | S3C_PMDBG("%s: IRQ configuration restored\n", __func__); |
97 | } | 97 | } |
98 | 98 | ||
99 | struct syscore_ops s3c64xx_irq_syscore_ops = { | 99 | static struct syscore_ops s3c64xx_irq_syscore_ops = { |
100 | .suspend = s3c64xx_irq_pm_suspend, | 100 | .suspend = s3c64xx_irq_pm_suspend, |
101 | .resume = s3c64xx_irq_pm_resume, | 101 | .resume = s3c64xx_irq_pm_resume, |
102 | }; | 102 | }; |
diff --git a/arch/arm/mach-s5p64x0/clock.c b/arch/arm/mach-s5p64x0/clock.c index 241d0e645c85..57e718957ef3 100644 --- a/arch/arm/mach-s5p64x0/clock.c +++ b/arch/arm/mach-s5p64x0/clock.c | |||
@@ -73,7 +73,7 @@ static const u32 clock_table[][3] = { | |||
73 | {L2 * 1000, (3 << ARM_DIV_RATIO_SHIFT), (0 << S5P64X0_CLKDIV0_HCLK_SHIFT)}, | 73 | {L2 * 1000, (3 << ARM_DIV_RATIO_SHIFT), (0 << S5P64X0_CLKDIV0_HCLK_SHIFT)}, |
74 | }; | 74 | }; |
75 | 75 | ||
76 | unsigned long s5p64x0_armclk_get_rate(struct clk *clk) | 76 | static unsigned long s5p64x0_armclk_get_rate(struct clk *clk) |
77 | { | 77 | { |
78 | unsigned long rate = clk_get_rate(clk->parent); | 78 | unsigned long rate = clk_get_rate(clk->parent); |
79 | u32 clkdiv; | 79 | u32 clkdiv; |
@@ -84,7 +84,8 @@ unsigned long s5p64x0_armclk_get_rate(struct clk *clk) | |||
84 | return rate / (clkdiv + 1); | 84 | return rate / (clkdiv + 1); |
85 | } | 85 | } |
86 | 86 | ||
87 | unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate) | 87 | static unsigned long s5p64x0_armclk_round_rate(struct clk *clk, |
88 | unsigned long rate) | ||
88 | { | 89 | { |
89 | u32 iter; | 90 | u32 iter; |
90 | 91 | ||
@@ -96,7 +97,7 @@ unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate) | |||
96 | return clock_table[ARRAY_SIZE(clock_table) - 1][0]; | 97 | return clock_table[ARRAY_SIZE(clock_table) - 1][0]; |
97 | } | 98 | } |
98 | 99 | ||
99 | int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate) | 100 | static int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate) |
100 | { | 101 | { |
101 | u32 round_tmp; | 102 | u32 round_tmp; |
102 | u32 iter; | 103 | u32 iter; |
@@ -148,7 +149,7 @@ int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate) | |||
148 | return 0; | 149 | return 0; |
149 | } | 150 | } |
150 | 151 | ||
151 | struct clk_ops s5p64x0_clkarm_ops = { | 152 | static struct clk_ops s5p64x0_clkarm_ops = { |
152 | .get_rate = s5p64x0_armclk_get_rate, | 153 | .get_rate = s5p64x0_armclk_get_rate, |
153 | .set_rate = s5p64x0_armclk_set_rate, | 154 | .set_rate = s5p64x0_armclk_set_rate, |
154 | .round_rate = s5p64x0_armclk_round_rate, | 155 | .round_rate = s5p64x0_armclk_round_rate, |
@@ -173,7 +174,7 @@ struct clksrc_clk clk_dout_mpll = { | |||
173 | .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 4, .size = 1 }, | 174 | .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 4, .size = 1 }, |
174 | }; | 175 | }; |
175 | 176 | ||
176 | struct clk *clkset_hclk_low_list[] = { | 177 | static struct clk *clkset_hclk_low_list[] = { |
177 | &clk_mout_apll.clk, | 178 | &clk_mout_apll.clk, |
178 | &clk_mout_mpll.clk, | 179 | &clk_mout_mpll.clk, |
179 | }; | 180 | }; |
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c index 52b89a376447..9143f8b19962 100644 --- a/arch/arm/mach-s5p64x0/common.c +++ b/arch/arm/mach-s5p64x0/common.c | |||
@@ -146,15 +146,12 @@ static void s5p64x0_idle(void) | |||
146 | { | 146 | { |
147 | unsigned long val; | 147 | unsigned long val; |
148 | 148 | ||
149 | if (!need_resched()) { | 149 | val = __raw_readl(S5P64X0_PWR_CFG); |
150 | val = __raw_readl(S5P64X0_PWR_CFG); | 150 | val &= ~(0x3 << 5); |
151 | val &= ~(0x3 << 5); | 151 | val |= (0x1 << 5); |
152 | val |= (0x1 << 5); | 152 | __raw_writel(val, S5P64X0_PWR_CFG); |
153 | __raw_writel(val, S5P64X0_PWR_CFG); | ||
154 | 153 | ||
155 | cpu_do_idle(); | 154 | cpu_do_idle(); |
156 | } | ||
157 | local_irq_enable(); | ||
158 | } | 155 | } |
159 | 156 | ||
160 | /* | 157 | /* |
@@ -286,7 +283,7 @@ int __init s5p64x0_init(void) | |||
286 | printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n"); | 283 | printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n"); |
287 | 284 | ||
288 | /* set idle function */ | 285 | /* set idle function */ |
289 | pm_idle = s5p64x0_idle; | 286 | arm_pm_idle = s5p64x0_idle; |
290 | 287 | ||
291 | return device_register(&s5p64x0_dev); | 288 | return device_register(&s5p64x0_dev); |
292 | } | 289 | } |
diff --git a/arch/arm/mach-s5p64x0/dma.c b/arch/arm/mach-s5p64x0/dma.c index f820c0744405..2ee5dc069b37 100644 --- a/arch/arm/mach-s5p64x0/dma.c +++ b/arch/arm/mach-s5p64x0/dma.c | |||
@@ -38,7 +38,7 @@ | |||
38 | 38 | ||
39 | static u64 dma_dmamask = DMA_BIT_MASK(32); | 39 | static u64 dma_dmamask = DMA_BIT_MASK(32); |
40 | 40 | ||
41 | u8 s5p6440_pdma_peri[] = { | 41 | static u8 s5p6440_pdma_peri[] = { |
42 | DMACH_UART0_RX, | 42 | DMACH_UART0_RX, |
43 | DMACH_UART0_TX, | 43 | DMACH_UART0_TX, |
44 | DMACH_UART1_RX, | 44 | DMACH_UART1_RX, |
@@ -63,12 +63,12 @@ u8 s5p6440_pdma_peri[] = { | |||
63 | DMACH_SPI1_RX, | 63 | DMACH_SPI1_RX, |
64 | }; | 64 | }; |
65 | 65 | ||
66 | struct dma_pl330_platdata s5p6440_pdma_pdata = { | 66 | static struct dma_pl330_platdata s5p6440_pdma_pdata = { |
67 | .nr_valid_peri = ARRAY_SIZE(s5p6440_pdma_peri), | 67 | .nr_valid_peri = ARRAY_SIZE(s5p6440_pdma_peri), |
68 | .peri_id = s5p6440_pdma_peri, | 68 | .peri_id = s5p6440_pdma_peri, |
69 | }; | 69 | }; |
70 | 70 | ||
71 | u8 s5p6450_pdma_peri[] = { | 71 | static u8 s5p6450_pdma_peri[] = { |
72 | DMACH_UART0_RX, | 72 | DMACH_UART0_RX, |
73 | DMACH_UART0_TX, | 73 | DMACH_UART0_TX, |
74 | DMACH_UART1_RX, | 74 | DMACH_UART1_RX, |
@@ -103,39 +103,27 @@ u8 s5p6450_pdma_peri[] = { | |||
103 | DMACH_UART5_TX, | 103 | DMACH_UART5_TX, |
104 | }; | 104 | }; |
105 | 105 | ||
106 | struct dma_pl330_platdata s5p6450_pdma_pdata = { | 106 | static struct dma_pl330_platdata s5p6450_pdma_pdata = { |
107 | .nr_valid_peri = ARRAY_SIZE(s5p6450_pdma_peri), | 107 | .nr_valid_peri = ARRAY_SIZE(s5p6450_pdma_peri), |
108 | .peri_id = s5p6450_pdma_peri, | 108 | .peri_id = s5p6450_pdma_peri, |
109 | }; | 109 | }; |
110 | 110 | ||
111 | struct amba_device s5p64x0_device_pdma = { | 111 | static AMBA_AHB_DEVICE(s5p64x0_pdma, "dma-pl330", 0x00041330, |
112 | .dev = { | 112 | S5P64X0_PA_PDMA, {IRQ_DMA0}, NULL); |
113 | .init_name = "dma-pl330", | ||
114 | .dma_mask = &dma_dmamask, | ||
115 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
116 | }, | ||
117 | .res = { | ||
118 | .start = S5P64X0_PA_PDMA, | ||
119 | .end = S5P64X0_PA_PDMA + SZ_4K, | ||
120 | .flags = IORESOURCE_MEM, | ||
121 | }, | ||
122 | .irq = {IRQ_DMA0, NO_IRQ}, | ||
123 | .periphid = 0x00041330, | ||
124 | }; | ||
125 | 113 | ||
126 | static int __init s5p64x0_dma_init(void) | 114 | static int __init s5p64x0_dma_init(void) |
127 | { | 115 | { |
128 | if (soc_is_s5p6450()) { | 116 | if (soc_is_s5p6450()) { |
129 | dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask); | 117 | dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask); |
130 | dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask); | 118 | dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask); |
131 | s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata; | 119 | s5p64x0_pdma_device.dev.platform_data = &s5p6450_pdma_pdata; |
132 | } else { | 120 | } else { |
133 | dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask); | 121 | dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask); |
134 | dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask); | 122 | dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask); |
135 | s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata; | 123 | s5p64x0_pdma_device.dev.platform_data = &s5p6440_pdma_pdata; |
136 | } | 124 | } |
137 | 125 | ||
138 | amba_device_register(&s5p64x0_device_pdma, &iomem_resource); | 126 | amba_device_register(&s5p64x0_pdma_device, &iomem_resource); |
139 | 127 | ||
140 | return 0; | 128 | return 0; |
141 | } | 129 | } |
diff --git a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S deleted file mode 100644 index fbb246d0a3df..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Low-level IRQ helper macros for the Samsung S5P64X0 | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
diff --git a/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h b/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h index ff85b4b6e8d9..0ef47d1b7670 100644 --- a/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h +++ b/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h | |||
@@ -22,16 +22,9 @@ extern struct clksrc_clk clk_mout_epll; | |||
22 | extern int s5p64x0_epll_enable(struct clk *clk, int enable); | 22 | extern int s5p64x0_epll_enable(struct clk *clk, int enable); |
23 | extern unsigned long s5p64x0_epll_get_rate(struct clk *clk); | 23 | extern unsigned long s5p64x0_epll_get_rate(struct clk *clk); |
24 | 24 | ||
25 | extern unsigned long s5p64x0_armclk_get_rate(struct clk *clk); | ||
26 | extern unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate); | ||
27 | extern int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate); | ||
28 | |||
29 | extern struct clk_ops s5p64x0_clkarm_ops; | ||
30 | |||
31 | extern struct clksrc_clk clk_armclk; | 25 | extern struct clksrc_clk clk_armclk; |
32 | extern struct clksrc_clk clk_dout_mpll; | 26 | extern struct clksrc_clk clk_dout_mpll; |
33 | 27 | ||
34 | extern struct clk *clkset_hclk_low_list[]; | ||
35 | extern struct clksrc_sources clkset_hclk_low; | 28 | extern struct clksrc_sources clkset_hclk_low; |
36 | 29 | ||
37 | extern int s5p64x0_pclk_ctrl(struct clk *clk, int enable); | 30 | extern int s5p64x0_pclk_ctrl(struct clk *clk, int enable); |
diff --git a/arch/arm/mach-s5p64x0/include/mach/system.h b/arch/arm/mach-s5p64x0/include/mach/system.h deleted file mode 100644 index cf26e0954a2f..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/system.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/system.h | ||
2 | * | ||
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5P64X0 - system support header | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | ||
14 | #define __ASM_ARCH_SYSTEM_H __FILE__ | ||
15 | |||
16 | static void arch_idle(void) | ||
17 | { | ||
18 | /* nothing here yet */ | ||
19 | } | ||
20 | |||
21 | #endif /* __ASM_ARCH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c index 247194dd366c..16eca4ea2010 100644 --- a/arch/arm/mach-s5pc100/clock.c +++ b/arch/arm/mach-s5pc100/clock.c | |||
@@ -170,7 +170,7 @@ static struct clk *clk_src_mout_am_list[] = { | |||
170 | [1] = &clk_div_apll2.clk, | 170 | [1] = &clk_div_apll2.clk, |
171 | }; | 171 | }; |
172 | 172 | ||
173 | struct clksrc_sources clk_src_mout_am = { | 173 | static struct clksrc_sources clk_src_mout_am = { |
174 | .sources = clk_src_mout_am_list, | 174 | .sources = clk_src_mout_am_list, |
175 | .nr_sources = ARRAY_SIZE(clk_src_mout_am_list), | 175 | .nr_sources = ARRAY_SIZE(clk_src_mout_am_list), |
176 | }; | 176 | }; |
@@ -212,7 +212,7 @@ static struct clk *clk_src_mout_onenand_list[] = { | |||
212 | [1] = &clk_div_d1_bus.clk, | 212 | [1] = &clk_div_d1_bus.clk, |
213 | }; | 213 | }; |
214 | 214 | ||
215 | struct clksrc_sources clk_src_mout_onenand = { | 215 | static struct clksrc_sources clk_src_mout_onenand = { |
216 | .sources = clk_src_mout_onenand_list, | 216 | .sources = clk_src_mout_onenand_list, |
217 | .nr_sources = ARRAY_SIZE(clk_src_mout_onenand_list), | 217 | .nr_sources = ARRAY_SIZE(clk_src_mout_onenand_list), |
218 | }; | 218 | }; |
@@ -756,7 +756,7 @@ static struct clk *clk_src_group1_list[] = { | |||
756 | [3] = &clk_mout_hpll.clk, | 756 | [3] = &clk_mout_hpll.clk, |
757 | }; | 757 | }; |
758 | 758 | ||
759 | struct clksrc_sources clk_src_group1 = { | 759 | static struct clksrc_sources clk_src_group1 = { |
760 | .sources = clk_src_group1_list, | 760 | .sources = clk_src_group1_list, |
761 | .nr_sources = ARRAY_SIZE(clk_src_group1_list), | 761 | .nr_sources = ARRAY_SIZE(clk_src_group1_list), |
762 | }; | 762 | }; |
@@ -766,7 +766,7 @@ static struct clk *clk_src_group2_list[] = { | |||
766 | [1] = &clk_div_mpll.clk, | 766 | [1] = &clk_div_mpll.clk, |
767 | }; | 767 | }; |
768 | 768 | ||
769 | struct clksrc_sources clk_src_group2 = { | 769 | static struct clksrc_sources clk_src_group2 = { |
770 | .sources = clk_src_group2_list, | 770 | .sources = clk_src_group2_list, |
771 | .nr_sources = ARRAY_SIZE(clk_src_group2_list), | 771 | .nr_sources = ARRAY_SIZE(clk_src_group2_list), |
772 | }; | 772 | }; |
@@ -780,7 +780,7 @@ static struct clk *clk_src_group3_list[] = { | |||
780 | [5] = &clk_mout_hpll.clk, | 780 | [5] = &clk_mout_hpll.clk, |
781 | }; | 781 | }; |
782 | 782 | ||
783 | struct clksrc_sources clk_src_group3 = { | 783 | static struct clksrc_sources clk_src_group3 = { |
784 | .sources = clk_src_group3_list, | 784 | .sources = clk_src_group3_list, |
785 | .nr_sources = ARRAY_SIZE(clk_src_group3_list), | 785 | .nr_sources = ARRAY_SIZE(clk_src_group3_list), |
786 | }; | 786 | }; |
@@ -806,7 +806,7 @@ static struct clk *clk_src_group4_list[] = { | |||
806 | [5] = &clk_mout_hpll.clk, | 806 | [5] = &clk_mout_hpll.clk, |
807 | }; | 807 | }; |
808 | 808 | ||
809 | struct clksrc_sources clk_src_group4 = { | 809 | static struct clksrc_sources clk_src_group4 = { |
810 | .sources = clk_src_group4_list, | 810 | .sources = clk_src_group4_list, |
811 | .nr_sources = ARRAY_SIZE(clk_src_group4_list), | 811 | .nr_sources = ARRAY_SIZE(clk_src_group4_list), |
812 | }; | 812 | }; |
@@ -831,7 +831,7 @@ static struct clk *clk_src_group5_list[] = { | |||
831 | [4] = &clk_mout_hpll.clk, | 831 | [4] = &clk_mout_hpll.clk, |
832 | }; | 832 | }; |
833 | 833 | ||
834 | struct clksrc_sources clk_src_group5 = { | 834 | static struct clksrc_sources clk_src_group5 = { |
835 | .sources = clk_src_group5_list, | 835 | .sources = clk_src_group5_list, |
836 | .nr_sources = ARRAY_SIZE(clk_src_group5_list), | 836 | .nr_sources = ARRAY_SIZE(clk_src_group5_list), |
837 | }; | 837 | }; |
@@ -854,7 +854,7 @@ static struct clk *clk_src_group6_list[] = { | |||
854 | [2] = &clk_div_hdmi.clk, | 854 | [2] = &clk_div_hdmi.clk, |
855 | }; | 855 | }; |
856 | 856 | ||
857 | struct clksrc_sources clk_src_group6 = { | 857 | static struct clksrc_sources clk_src_group6 = { |
858 | .sources = clk_src_group6_list, | 858 | .sources = clk_src_group6_list, |
859 | .nr_sources = ARRAY_SIZE(clk_src_group6_list), | 859 | .nr_sources = ARRAY_SIZE(clk_src_group6_list), |
860 | }; | 860 | }; |
@@ -866,7 +866,7 @@ static struct clk *clk_src_group7_list[] = { | |||
866 | [3] = &clk_vclk54m, | 866 | [3] = &clk_vclk54m, |
867 | }; | 867 | }; |
868 | 868 | ||
869 | struct clksrc_sources clk_src_group7 = { | 869 | static struct clksrc_sources clk_src_group7 = { |
870 | .sources = clk_src_group7_list, | 870 | .sources = clk_src_group7_list, |
871 | .nr_sources = ARRAY_SIZE(clk_src_group7_list), | 871 | .nr_sources = ARRAY_SIZE(clk_src_group7_list), |
872 | }; | 872 | }; |
@@ -877,7 +877,7 @@ static struct clk *clk_src_mmc0_list[] = { | |||
877 | [2] = &clk_fin_epll, | 877 | [2] = &clk_fin_epll, |
878 | }; | 878 | }; |
879 | 879 | ||
880 | struct clksrc_sources clk_src_mmc0 = { | 880 | static struct clksrc_sources clk_src_mmc0 = { |
881 | .sources = clk_src_mmc0_list, | 881 | .sources = clk_src_mmc0_list, |
882 | .nr_sources = ARRAY_SIZE(clk_src_mmc0_list), | 882 | .nr_sources = ARRAY_SIZE(clk_src_mmc0_list), |
883 | }; | 883 | }; |
@@ -889,7 +889,7 @@ static struct clk *clk_src_mmc12_list[] = { | |||
889 | [3] = &clk_mout_hpll.clk, | 889 | [3] = &clk_mout_hpll.clk, |
890 | }; | 890 | }; |
891 | 891 | ||
892 | struct clksrc_sources clk_src_mmc12 = { | 892 | static struct clksrc_sources clk_src_mmc12 = { |
893 | .sources = clk_src_mmc12_list, | 893 | .sources = clk_src_mmc12_list, |
894 | .nr_sources = ARRAY_SIZE(clk_src_mmc12_list), | 894 | .nr_sources = ARRAY_SIZE(clk_src_mmc12_list), |
895 | }; | 895 | }; |
@@ -901,7 +901,7 @@ static struct clk *clk_src_irda_usb_list[] = { | |||
901 | [3] = &clk_mout_hpll.clk, | 901 | [3] = &clk_mout_hpll.clk, |
902 | }; | 902 | }; |
903 | 903 | ||
904 | struct clksrc_sources clk_src_irda_usb = { | 904 | static struct clksrc_sources clk_src_irda_usb = { |
905 | .sources = clk_src_irda_usb_list, | 905 | .sources = clk_src_irda_usb_list, |
906 | .nr_sources = ARRAY_SIZE(clk_src_irda_usb_list), | 906 | .nr_sources = ARRAY_SIZE(clk_src_irda_usb_list), |
907 | }; | 907 | }; |
@@ -912,7 +912,7 @@ static struct clk *clk_src_pwi_list[] = { | |||
912 | [2] = &clk_div_mpll.clk, | 912 | [2] = &clk_div_mpll.clk, |
913 | }; | 913 | }; |
914 | 914 | ||
915 | struct clksrc_sources clk_src_pwi = { | 915 | static struct clksrc_sources clk_src_pwi = { |
916 | .sources = clk_src_pwi_list, | 916 | .sources = clk_src_pwi_list, |
917 | .nr_sources = ARRAY_SIZE(clk_src_pwi_list), | 917 | .nr_sources = ARRAY_SIZE(clk_src_pwi_list), |
918 | }; | 918 | }; |
@@ -923,7 +923,7 @@ static struct clk *clk_sclk_spdif_list[] = { | |||
923 | [2] = &clk_sclk_audio2.clk, | 923 | [2] = &clk_sclk_audio2.clk, |
924 | }; | 924 | }; |
925 | 925 | ||
926 | struct clksrc_sources clk_src_sclk_spdif = { | 926 | static struct clksrc_sources clk_src_sclk_spdif = { |
927 | .sources = clk_sclk_spdif_list, | 927 | .sources = clk_sclk_spdif_list, |
928 | .nr_sources = ARRAY_SIZE(clk_sclk_spdif_list), | 928 | .nr_sources = ARRAY_SIZE(clk_sclk_spdif_list), |
929 | }; | 929 | }; |
diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c index c9095730a7f5..ff71e2d467c6 100644 --- a/arch/arm/mach-s5pc100/common.c +++ b/arch/arm/mach-s5pc100/common.c | |||
@@ -129,14 +129,6 @@ static struct map_desc s5pc100_iodesc[] __initdata = { | |||
129 | } | 129 | } |
130 | }; | 130 | }; |
131 | 131 | ||
132 | static void s5pc100_idle(void) | ||
133 | { | ||
134 | if (!need_resched()) | ||
135 | cpu_do_idle(); | ||
136 | |||
137 | local_irq_enable(); | ||
138 | } | ||
139 | |||
140 | /* | 132 | /* |
141 | * s5pc100_map_io | 133 | * s5pc100_map_io |
142 | * | 134 | * |
@@ -210,10 +202,6 @@ core_initcall(s5pc100_core_init); | |||
210 | int __init s5pc100_init(void) | 202 | int __init s5pc100_init(void) |
211 | { | 203 | { |
212 | printk(KERN_INFO "S5PC100: Initializing architecture\n"); | 204 | printk(KERN_INFO "S5PC100: Initializing architecture\n"); |
213 | |||
214 | /* set idle function */ | ||
215 | pm_idle = s5pc100_idle; | ||
216 | |||
217 | return device_register(&s5pc100_dev); | 205 | return device_register(&s5pc100_dev); |
218 | } | 206 | } |
219 | 207 | ||
diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c index c841f4d313f2..afd8db2d5991 100644 --- a/arch/arm/mach-s5pc100/dma.c +++ b/arch/arm/mach-s5pc100/dma.c | |||
@@ -35,7 +35,7 @@ | |||
35 | 35 | ||
36 | static u64 dma_dmamask = DMA_BIT_MASK(32); | 36 | static u64 dma_dmamask = DMA_BIT_MASK(32); |
37 | 37 | ||
38 | u8 pdma0_peri[] = { | 38 | static u8 pdma0_peri[] = { |
39 | DMACH_UART0_RX, | 39 | DMACH_UART0_RX, |
40 | DMACH_UART0_TX, | 40 | DMACH_UART0_TX, |
41 | DMACH_UART1_RX, | 41 | DMACH_UART1_RX, |
@@ -68,28 +68,15 @@ u8 pdma0_peri[] = { | |||
68 | DMACH_HSI_TX, | 68 | DMACH_HSI_TX, |
69 | }; | 69 | }; |
70 | 70 | ||
71 | struct dma_pl330_platdata s5pc100_pdma0_pdata = { | 71 | static struct dma_pl330_platdata s5pc100_pdma0_pdata = { |
72 | .nr_valid_peri = ARRAY_SIZE(pdma0_peri), | 72 | .nr_valid_peri = ARRAY_SIZE(pdma0_peri), |
73 | .peri_id = pdma0_peri, | 73 | .peri_id = pdma0_peri, |
74 | }; | 74 | }; |
75 | 75 | ||
76 | struct amba_device s5pc100_device_pdma0 = { | 76 | static AMBA_AHB_DEVICE(s5pc100_pdma0, "dma-pl330.0", 0x00041330, |
77 | .dev = { | 77 | S5PC100_PA_PDMA0, {IRQ_PDMA0}, &s5pc100_pdma0_pdata); |
78 | .init_name = "dma-pl330.0", | ||
79 | .dma_mask = &dma_dmamask, | ||
80 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
81 | .platform_data = &s5pc100_pdma0_pdata, | ||
82 | }, | ||
83 | .res = { | ||
84 | .start = S5PC100_PA_PDMA0, | ||
85 | .end = S5PC100_PA_PDMA0 + SZ_4K, | ||
86 | .flags = IORESOURCE_MEM, | ||
87 | }, | ||
88 | .irq = {IRQ_PDMA0, NO_IRQ}, | ||
89 | .periphid = 0x00041330, | ||
90 | }; | ||
91 | 78 | ||
92 | u8 pdma1_peri[] = { | 79 | static u8 pdma1_peri[] = { |
93 | DMACH_UART0_RX, | 80 | DMACH_UART0_RX, |
94 | DMACH_UART0_TX, | 81 | DMACH_UART0_TX, |
95 | DMACH_UART1_RX, | 82 | DMACH_UART1_RX, |
@@ -122,36 +109,23 @@ u8 pdma1_peri[] = { | |||
122 | DMACH_MSM_REQ3, | 109 | DMACH_MSM_REQ3, |
123 | }; | 110 | }; |
124 | 111 | ||
125 | struct dma_pl330_platdata s5pc100_pdma1_pdata = { | 112 | static struct dma_pl330_platdata s5pc100_pdma1_pdata = { |
126 | .nr_valid_peri = ARRAY_SIZE(pdma1_peri), | 113 | .nr_valid_peri = ARRAY_SIZE(pdma1_peri), |
127 | .peri_id = pdma1_peri, | 114 | .peri_id = pdma1_peri, |
128 | }; | 115 | }; |
129 | 116 | ||
130 | struct amba_device s5pc100_device_pdma1 = { | 117 | static AMBA_AHB_DEVICE(s5pc100_pdma1, "dma-pl330.1", 0x00041330, |
131 | .dev = { | 118 | S5PC100_PA_PDMA1, {IRQ_PDMA1}, &s5pc100_pdma1_pdata); |
132 | .init_name = "dma-pl330.1", | ||
133 | .dma_mask = &dma_dmamask, | ||
134 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
135 | .platform_data = &s5pc100_pdma1_pdata, | ||
136 | }, | ||
137 | .res = { | ||
138 | .start = S5PC100_PA_PDMA1, | ||
139 | .end = S5PC100_PA_PDMA1 + SZ_4K, | ||
140 | .flags = IORESOURCE_MEM, | ||
141 | }, | ||
142 | .irq = {IRQ_PDMA1, NO_IRQ}, | ||
143 | .periphid = 0x00041330, | ||
144 | }; | ||
145 | 119 | ||
146 | static int __init s5pc100_dma_init(void) | 120 | static int __init s5pc100_dma_init(void) |
147 | { | 121 | { |
148 | dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask); | 122 | dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask); |
149 | dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask); | 123 | dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask); |
150 | amba_device_register(&s5pc100_device_pdma0, &iomem_resource); | 124 | amba_device_register(&s5pc100_pdma0_device, &iomem_resource); |
151 | 125 | ||
152 | dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask); | 126 | dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask); |
153 | dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask); | 127 | dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask); |
154 | amba_device_register(&s5pc100_device_pdma1, &iomem_resource); | 128 | amba_device_register(&s5pc100_pdma1_device, &iomem_resource); |
155 | 129 | ||
156 | return 0; | 130 | return 0; |
157 | } | 131 | } |
diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S index b8c242edfa22..bad0700457db 100644 --- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S +++ b/arch/arm/mach-s5pc100/include/mach/entry-macro.S | |||
@@ -12,14 +12,8 @@ | |||
12 | * warranty of any kind, whether express or implied. | 12 | * warranty of any kind, whether express or implied. |
13 | */ | 13 | */ |
14 | 14 | ||
15 | .macro disable_fiq | ||
16 | .endm | ||
17 | |||
18 | .macro get_irqnr_preamble, base, tmp | 15 | .macro get_irqnr_preamble, base, tmp |
19 | .endm | 16 | .endm |
20 | 17 | ||
21 | .macro arch_ret_to_user, tmp1, tmp2 | ||
22 | .endm | ||
23 | |||
24 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 18 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
25 | .endm | 19 | .endm |
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h deleted file mode 100644 index afc96c298518..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5pc100/include/mach/system.h | ||
2 | * | ||
3 | * Copyright 2009 Samsung Electronics Co. | ||
4 | * Byungho Min <bhmin@samsung.com> | ||
5 | * | ||
6 | * S5PC100 - system implementation | ||
7 | * | ||
8 | * Based on mach-s3c6400/include/mach/system.h | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_SYSTEM_H | ||
12 | #define __ASM_ARCH_SYSTEM_H __FILE__ | ||
13 | |||
14 | static void arch_idle(void) | ||
15 | { | ||
16 | /* nothing here yet */ | ||
17 | } | ||
18 | |||
19 | #endif /* __ASM_ARCH_IRQ_H */ | ||
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c index 9c1bcdcc12c3..4c9e9027df9a 100644 --- a/arch/arm/mach-s5pv210/common.c +++ b/arch/arm/mach-s5pv210/common.c | |||
@@ -142,14 +142,6 @@ static struct map_desc s5pv210_iodesc[] __initdata = { | |||
142 | } | 142 | } |
143 | }; | 143 | }; |
144 | 144 | ||
145 | static void s5pv210_idle(void) | ||
146 | { | ||
147 | if (!need_resched()) | ||
148 | cpu_do_idle(); | ||
149 | |||
150 | local_irq_enable(); | ||
151 | } | ||
152 | |||
153 | void s5pv210_restart(char mode, const char *cmd) | 145 | void s5pv210_restart(char mode, const char *cmd) |
154 | { | 146 | { |
155 | __raw_writel(0x1, S5P_SWRESET); | 147 | __raw_writel(0x1, S5P_SWRESET); |
@@ -247,10 +239,6 @@ core_initcall(s5pv210_core_init); | |||
247 | int __init s5pv210_init(void) | 239 | int __init s5pv210_init(void) |
248 | { | 240 | { |
249 | printk(KERN_INFO "S5PV210: Initializing architecture\n"); | 241 | printk(KERN_INFO "S5PV210: Initializing architecture\n"); |
250 | |||
251 | /* set idle function */ | ||
252 | pm_idle = s5pv210_idle; | ||
253 | |||
254 | return device_register(&s5pv210_dev); | 242 | return device_register(&s5pv210_dev); |
255 | } | 243 | } |
256 | 244 | ||
diff --git a/arch/arm/mach-s5pv210/dma.c b/arch/arm/mach-s5pv210/dma.c index a6113e0267f2..86ce62f66190 100644 --- a/arch/arm/mach-s5pv210/dma.c +++ b/arch/arm/mach-s5pv210/dma.c | |||
@@ -35,7 +35,7 @@ | |||
35 | 35 | ||
36 | static u64 dma_dmamask = DMA_BIT_MASK(32); | 36 | static u64 dma_dmamask = DMA_BIT_MASK(32); |
37 | 37 | ||
38 | u8 pdma0_peri[] = { | 38 | static u8 pdma0_peri[] = { |
39 | DMACH_UART0_RX, | 39 | DMACH_UART0_RX, |
40 | DMACH_UART0_TX, | 40 | DMACH_UART0_TX, |
41 | DMACH_UART1_RX, | 41 | DMACH_UART1_RX, |
@@ -66,28 +66,15 @@ u8 pdma0_peri[] = { | |||
66 | DMACH_SPDIF, | 66 | DMACH_SPDIF, |
67 | }; | 67 | }; |
68 | 68 | ||
69 | struct dma_pl330_platdata s5pv210_pdma0_pdata = { | 69 | static struct dma_pl330_platdata s5pv210_pdma0_pdata = { |
70 | .nr_valid_peri = ARRAY_SIZE(pdma0_peri), | 70 | .nr_valid_peri = ARRAY_SIZE(pdma0_peri), |
71 | .peri_id = pdma0_peri, | 71 | .peri_id = pdma0_peri, |
72 | }; | 72 | }; |
73 | 73 | ||
74 | struct amba_device s5pv210_device_pdma0 = { | 74 | static AMBA_AHB_DEVICE(s5pv210_pdma0, "dma-pl330.0", 0x00041330, |
75 | .dev = { | 75 | S5PV210_PA_PDMA0, {IRQ_PDMA0}, &s5pv210_pdma0_pdata); |
76 | .init_name = "dma-pl330.0", | ||
77 | .dma_mask = &dma_dmamask, | ||
78 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
79 | .platform_data = &s5pv210_pdma0_pdata, | ||
80 | }, | ||
81 | .res = { | ||
82 | .start = S5PV210_PA_PDMA0, | ||
83 | .end = S5PV210_PA_PDMA0 + SZ_4K, | ||
84 | .flags = IORESOURCE_MEM, | ||
85 | }, | ||
86 | .irq = {IRQ_PDMA0, NO_IRQ}, | ||
87 | .periphid = 0x00041330, | ||
88 | }; | ||
89 | 76 | ||
90 | u8 pdma1_peri[] = { | 77 | static u8 pdma1_peri[] = { |
91 | DMACH_UART0_RX, | 78 | DMACH_UART0_RX, |
92 | DMACH_UART0_TX, | 79 | DMACH_UART0_TX, |
93 | DMACH_UART1_RX, | 80 | DMACH_UART1_RX, |
@@ -122,36 +109,23 @@ u8 pdma1_peri[] = { | |||
122 | DMACH_PCM2_TX, | 109 | DMACH_PCM2_TX, |
123 | }; | 110 | }; |
124 | 111 | ||
125 | struct dma_pl330_platdata s5pv210_pdma1_pdata = { | 112 | static struct dma_pl330_platdata s5pv210_pdma1_pdata = { |
126 | .nr_valid_peri = ARRAY_SIZE(pdma1_peri), | 113 | .nr_valid_peri = ARRAY_SIZE(pdma1_peri), |
127 | .peri_id = pdma1_peri, | 114 | .peri_id = pdma1_peri, |
128 | }; | 115 | }; |
129 | 116 | ||
130 | struct amba_device s5pv210_device_pdma1 = { | 117 | static AMBA_AHB_DEVICE(s5pv210_pdma1, "dma-pl330.1", 0x00041330, |
131 | .dev = { | 118 | S5PV210_PA_PDMA1, {IRQ_PDMA1}, &s5pv210_pdma1_pdata); |
132 | .init_name = "dma-pl330.1", | ||
133 | .dma_mask = &dma_dmamask, | ||
134 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
135 | .platform_data = &s5pv210_pdma1_pdata, | ||
136 | }, | ||
137 | .res = { | ||
138 | .start = S5PV210_PA_PDMA1, | ||
139 | .end = S5PV210_PA_PDMA1 + SZ_4K, | ||
140 | .flags = IORESOURCE_MEM, | ||
141 | }, | ||
142 | .irq = {IRQ_PDMA1, NO_IRQ}, | ||
143 | .periphid = 0x00041330, | ||
144 | }; | ||
145 | 119 | ||
146 | static int __init s5pv210_dma_init(void) | 120 | static int __init s5pv210_dma_init(void) |
147 | { | 121 | { |
148 | dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask); | 122 | dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask); |
149 | dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask); | 123 | dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask); |
150 | amba_device_register(&s5pv210_device_pdma0, &iomem_resource); | 124 | amba_device_register(&s5pv210_pdma0_device, &iomem_resource); |
151 | 125 | ||
152 | dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask); | 126 | dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask); |
153 | dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask); | 127 | dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask); |
154 | amba_device_register(&s5pv210_device_pdma1, &iomem_resource); | 128 | amba_device_register(&s5pv210_pdma1_device, &iomem_resource); |
155 | 129 | ||
156 | return 0; | 130 | return 0; |
157 | } | 131 | } |
diff --git a/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/arch/arm/mach-s5pv210/include/mach/entry-macro.S deleted file mode 100644 index bebca1b5d0b1..000000000000 --- a/arch/arm/mach-s5pv210/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Low-level IRQ helper macros for the Samsung S5PV210 | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h deleted file mode 100644 index bf288ced860a..000000000000 --- a/arch/arm/mach-s5pv210/include/mach/system.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/include/mach/system.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5PV210 - system support header | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | ||
14 | #define __ASM_ARCH_SYSTEM_H __FILE__ | ||
15 | |||
16 | static void arch_idle(void) | ||
17 | { | ||
18 | /* nothing here yet */ | ||
19 | } | ||
20 | |||
21 | #endif /* __ASM_ARCH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c index ff9152610439..2cf5ed75f390 100644 --- a/arch/arm/mach-s5pv210/mach-goni.c +++ b/arch/arm/mach-s5pv210/mach-goni.c | |||
@@ -844,7 +844,7 @@ static struct s5p_fimc_isp_info goni_camera_sensors[] = { | |||
844 | }, | 844 | }, |
845 | }; | 845 | }; |
846 | 846 | ||
847 | struct s5p_platform_fimc goni_fimc_md_platdata __initdata = { | 847 | static struct s5p_platform_fimc goni_fimc_md_platdata __initdata = { |
848 | .isp_info = goni_camera_sensors, | 848 | .isp_info = goni_camera_sensors, |
849 | .num_clients = ARRAY_SIZE(goni_camera_sensors), | 849 | .num_clients = ARRAY_SIZE(goni_camera_sensors), |
850 | }; | 850 | }; |
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c index dff9ea7b5bba..0933c8e1eb7b 100644 --- a/arch/arm/mach-s5pv210/mach-smdkv210.c +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c | |||
@@ -140,7 +140,7 @@ static struct dm9000_plat_data smdkv210_dm9000_platdata = { | |||
140 | .dev_addr = { 0x00, 0x09, 0xc0, 0xff, 0xec, 0x48 }, | 140 | .dev_addr = { 0x00, 0x09, 0xc0, 0xff, 0xec, 0x48 }, |
141 | }; | 141 | }; |
142 | 142 | ||
143 | struct platform_device smdkv210_dm9000 = { | 143 | static struct platform_device smdkv210_dm9000 = { |
144 | .name = "dm9000", | 144 | .name = "dm9000", |
145 | .id = -1, | 145 | .id = -1, |
146 | .num_resources = ARRAY_SIZE(smdkv210_dm9000_resources), | 146 | .num_resources = ARRAY_SIZE(smdkv210_dm9000_resources), |
diff --git a/arch/arm/mach-sa1100/include/mach/entry-macro.S b/arch/arm/mach-sa1100/include/mach/entry-macro.S index 6aa13c46c5d3..8cf7630bf024 100644 --- a/arch/arm/mach-sa1100/include/mach/entry-macro.S +++ b/arch/arm/mach-sa1100/include/mach/entry-macro.S | |||
@@ -8,17 +8,11 @@ | |||
8 | * warranty of any kind, whether express or implied. | 8 | * warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro get_irqnr_preamble, base, tmp | 11 | .macro get_irqnr_preamble, base, tmp |
15 | mov \base, #0xfa000000 @ ICIP = 0xfa050000 | 12 | mov \base, #0xfa000000 @ ICIP = 0xfa050000 |
16 | add \base, \base, #0x00050000 | 13 | add \base, \base, #0x00050000 |
17 | .endm | 14 | .endm |
18 | 15 | ||
19 | .macro arch_ret_to_user, tmp1, tmp2 | ||
20 | .endm | ||
21 | |||
22 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 16 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
23 | ldr \irqstat, [\base] @ get irqs | 17 | ldr \irqstat, [\base] @ get irqs |
24 | ldr \irqnr, [\base, #4] @ ICMR = 0xfa050004 | 18 | ldr \irqnr, [\base, #4] @ ICMR = 0xfa050004 |
diff --git a/arch/arm/mach-sa1100/include/mach/system.h b/arch/arm/mach-sa1100/include/mach/system.h deleted file mode 100644 index e17b208f76d4..000000000000 --- a/arch/arm/mach-sa1100/include/mach/system.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-sa1100/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net> | ||
5 | */ | ||
6 | static inline void arch_idle(void) | ||
7 | { | ||
8 | cpu_do_idle(); | ||
9 | } | ||
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c index a851c254ad6c..6a2a7f2c2557 100644 --- a/arch/arm/mach-shark/core.c +++ b/arch/arm/mach-shark/core.c | |||
@@ -149,10 +149,16 @@ static struct sys_timer shark_timer = { | |||
149 | .init = shark_timer_init, | 149 | .init = shark_timer_init, |
150 | }; | 150 | }; |
151 | 151 | ||
152 | static void shark_init_early(void) | ||
153 | { | ||
154 | disable_hlt(); | ||
155 | } | ||
156 | |||
152 | MACHINE_START(SHARK, "Shark") | 157 | MACHINE_START(SHARK, "Shark") |
153 | /* Maintainer: Alexander Schulz */ | 158 | /* Maintainer: Alexander Schulz */ |
154 | .atag_offset = 0x3000, | 159 | .atag_offset = 0x3000, |
155 | .map_io = shark_map_io, | 160 | .map_io = shark_map_io, |
161 | .init_early = shark_init_early, | ||
156 | .init_irq = shark_init_irq, | 162 | .init_irq = shark_init_irq, |
157 | .timer = &shark_timer, | 163 | .timer = &shark_timer, |
158 | .dma_zone_size = SZ_4M, | 164 | .dma_zone_size = SZ_4M, |
diff --git a/arch/arm/mach-shark/include/mach/entry-macro.S b/arch/arm/mach-shark/include/mach/entry-macro.S index 0bb6cc626eb7..5901b09fc96a 100644 --- a/arch/arm/mach-shark/include/mach/entry-macro.S +++ b/arch/arm/mach-shark/include/mach/entry-macro.S | |||
@@ -7,16 +7,10 @@ | |||
7 | * License version 2. This program is licensed "as is" without any | 7 | * License version 2. This program is licensed "as is" without any |
8 | * warranty of any kind, whether express or implied. | 8 | * warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | .macro disable_fiq | ||
11 | .endm | ||
12 | |||
13 | .macro get_irqnr_preamble, base, tmp | 10 | .macro get_irqnr_preamble, base, tmp |
14 | mov \base, #0xe0000000 | 11 | mov \base, #0xe0000000 |
15 | .endm | 12 | .endm |
16 | 13 | ||
17 | .macro arch_ret_to_user, tmp1, tmp2 | ||
18 | .endm | ||
19 | |||
20 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 14 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
21 | 15 | ||
22 | mov \irqstat, #0x0C | 16 | mov \irqstat, #0x0C |
diff --git a/arch/arm/mach-shark/include/mach/system.h b/arch/arm/mach-shark/include/mach/system.h deleted file mode 100644 index 1b2f2c5050a8..000000000000 --- a/arch/arm/mach-shark/include/mach/system.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-shark/include/mach/system.h | ||
3 | * | ||
4 | * by Alexander Schulz | ||
5 | */ | ||
6 | #ifndef __ASM_ARCH_SYSTEM_H | ||
7 | #define __ASM_ARCH_SYSTEM_H | ||
8 | |||
9 | static inline void arch_idle(void) | ||
10 | { | ||
11 | } | ||
12 | |||
13 | #endif | ||
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c index eff8a96c75ee..068b754bc348 100644 --- a/arch/arm/mach-shmobile/board-ag5evm.c +++ b/arch/arm/mach-shmobile/board-ag5evm.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <linux/serial_sci.h> | 30 | #include <linux/serial_sci.h> |
31 | #include <linux/smsc911x.h> | 31 | #include <linux/smsc911x.h> |
32 | #include <linux/gpio.h> | 32 | #include <linux/gpio.h> |
33 | #include <linux/videodev2.h> | ||
33 | #include <linux/input.h> | 34 | #include <linux/input.h> |
34 | #include <linux/input/sh_keysc.h> | 35 | #include <linux/input/sh_keysc.h> |
35 | #include <linux/mmc/host.h> | 36 | #include <linux/mmc/host.h> |
@@ -37,7 +38,6 @@ | |||
37 | #include <linux/mmc/sh_mobile_sdhi.h> | 38 | #include <linux/mmc/sh_mobile_sdhi.h> |
38 | #include <linux/mfd/tmio.h> | 39 | #include <linux/mfd/tmio.h> |
39 | #include <linux/sh_clk.h> | 40 | #include <linux/sh_clk.h> |
40 | #include <linux/dma-mapping.h> | ||
41 | #include <video/sh_mobile_lcdc.h> | 41 | #include <video/sh_mobile_lcdc.h> |
42 | #include <video/sh_mipi_dsi.h> | 42 | #include <video/sh_mipi_dsi.h> |
43 | #include <sound/sh_fsi.h> | 43 | #include <sound/sh_fsi.h> |
@@ -159,19 +159,12 @@ static struct resource sh_mmcif_resources[] = { | |||
159 | }, | 159 | }, |
160 | }; | 160 | }; |
161 | 161 | ||
162 | static struct sh_mmcif_dma sh_mmcif_dma = { | ||
163 | .chan_priv_rx = { | ||
164 | .slave_id = SHDMA_SLAVE_MMCIF_RX, | ||
165 | }, | ||
166 | .chan_priv_tx = { | ||
167 | .slave_id = SHDMA_SLAVE_MMCIF_TX, | ||
168 | }, | ||
169 | }; | ||
170 | static struct sh_mmcif_plat_data sh_mmcif_platdata = { | 162 | static struct sh_mmcif_plat_data sh_mmcif_platdata = { |
171 | .sup_pclk = 0, | 163 | .sup_pclk = 0, |
172 | .ocr = MMC_VDD_165_195, | 164 | .ocr = MMC_VDD_165_195, |
173 | .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, | 165 | .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, |
174 | .dma = &sh_mmcif_dma, | 166 | .slave_id_tx = SHDMA_SLAVE_MMCIF_TX, |
167 | .slave_id_rx = SHDMA_SLAVE_MMCIF_RX, | ||
175 | }; | 168 | }; |
176 | 169 | ||
177 | static struct platform_device mmc_device = { | 170 | static struct platform_device mmc_device = { |
@@ -321,12 +314,11 @@ static struct resource mipidsi0_resources[] = { | |||
321 | }, | 314 | }, |
322 | }; | 315 | }; |
323 | 316 | ||
324 | #define DSI0PHYCR 0xe615006c | ||
325 | static int sh_mipi_set_dot_clock(struct platform_device *pdev, | 317 | static int sh_mipi_set_dot_clock(struct platform_device *pdev, |
326 | void __iomem *base, | 318 | void __iomem *base, |
327 | int enable) | 319 | int enable) |
328 | { | 320 | { |
329 | struct clk *pck; | 321 | struct clk *pck, *phy; |
330 | int ret; | 322 | int ret; |
331 | 323 | ||
332 | pck = clk_get(&pdev->dev, "dsip_clk"); | 324 | pck = clk_get(&pdev->dev, "dsip_clk"); |
@@ -335,18 +327,27 @@ static int sh_mipi_set_dot_clock(struct platform_device *pdev, | |||
335 | goto sh_mipi_set_dot_clock_pck_err; | 327 | goto sh_mipi_set_dot_clock_pck_err; |
336 | } | 328 | } |
337 | 329 | ||
330 | phy = clk_get(&pdev->dev, "dsiphy_clk"); | ||
331 | if (IS_ERR(phy)) { | ||
332 | ret = PTR_ERR(phy); | ||
333 | goto sh_mipi_set_dot_clock_phy_err; | ||
334 | } | ||
335 | |||
338 | if (enable) { | 336 | if (enable) { |
339 | clk_set_rate(pck, clk_round_rate(pck, 24000000)); | 337 | clk_set_rate(pck, clk_round_rate(pck, 24000000)); |
340 | __raw_writel(0x2a809010, DSI0PHYCR); | 338 | clk_set_rate(phy, clk_round_rate(pck, 510000000)); |
341 | clk_enable(pck); | 339 | clk_enable(pck); |
340 | clk_enable(phy); | ||
342 | } else { | 341 | } else { |
343 | clk_disable(pck); | 342 | clk_disable(pck); |
343 | clk_disable(phy); | ||
344 | } | 344 | } |
345 | 345 | ||
346 | ret = 0; | 346 | ret = 0; |
347 | 347 | ||
348 | clk_put(phy); | ||
349 | sh_mipi_set_dot_clock_phy_err: | ||
348 | clk_put(pck); | 350 | clk_put(pck); |
349 | |||
350 | sh_mipi_set_dot_clock_pck_err: | 351 | sh_mipi_set_dot_clock_pck_err: |
351 | return ret; | 352 | return ret; |
352 | } | 353 | } |
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index aab0a349f759..eeb4d9664584 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c | |||
@@ -295,15 +295,6 @@ static struct resource sh_mmcif_resources[] = { | |||
295 | }, | 295 | }, |
296 | }; | 296 | }; |
297 | 297 | ||
298 | static struct sh_mmcif_dma sh_mmcif_dma = { | ||
299 | .chan_priv_rx = { | ||
300 | .slave_id = SHDMA_SLAVE_MMCIF_RX, | ||
301 | }, | ||
302 | .chan_priv_tx = { | ||
303 | .slave_id = SHDMA_SLAVE_MMCIF_TX, | ||
304 | }, | ||
305 | }; | ||
306 | |||
307 | static struct sh_mmcif_plat_data sh_mmcif_plat = { | 298 | static struct sh_mmcif_plat_data sh_mmcif_plat = { |
308 | .sup_pclk = 0, | 299 | .sup_pclk = 0, |
309 | .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, | 300 | .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, |
@@ -311,7 +302,8 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = { | |||
311 | MMC_CAP_8_BIT_DATA | | 302 | MMC_CAP_8_BIT_DATA | |
312 | MMC_CAP_NEEDS_POLL, | 303 | MMC_CAP_NEEDS_POLL, |
313 | .get_cd = slot_cn7_get_cd, | 304 | .get_cd = slot_cn7_get_cd, |
314 | .dma = &sh_mmcif_dma, | 305 | .slave_id_tx = SHDMA_SLAVE_MMCIF_TX, |
306 | .slave_id_rx = SHDMA_SLAVE_MMCIF_RX, | ||
315 | }; | 307 | }; |
316 | 308 | ||
317 | static struct platform_device sh_mmcif_device = { | 309 | static struct platform_device sh_mmcif_device = { |
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c index 857ceeec1bb0..c8e7ca23fc06 100644 --- a/arch/arm/mach-shmobile/board-kota2.c +++ b/arch/arm/mach-shmobile/board-kota2.c | |||
@@ -143,11 +143,10 @@ static struct gpio_keys_button gpio_buttons[] = { | |||
143 | static struct gpio_keys_platform_data gpio_key_info = { | 143 | static struct gpio_keys_platform_data gpio_key_info = { |
144 | .buttons = gpio_buttons, | 144 | .buttons = gpio_buttons, |
145 | .nbuttons = ARRAY_SIZE(gpio_buttons), | 145 | .nbuttons = ARRAY_SIZE(gpio_buttons), |
146 | .poll_interval = 250, /* polled for now */ | ||
147 | }; | 146 | }; |
148 | 147 | ||
149 | static struct platform_device gpio_keys_device = { | 148 | static struct platform_device gpio_keys_device = { |
150 | .name = "gpio-keys-polled", /* polled for now */ | 149 | .name = "gpio-keys", |
151 | .id = -1, | 150 | .id = -1, |
152 | .dev = { | 151 | .dev = { |
153 | .platform_data = &gpio_key_info, | 152 | .platform_data = &gpio_key_info, |
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index 9b42fbd10f8e..a2813247b455 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c | |||
@@ -43,7 +43,6 @@ | |||
43 | #include <linux/smsc911x.h> | 43 | #include <linux/smsc911x.h> |
44 | #include <linux/sh_intc.h> | 44 | #include <linux/sh_intc.h> |
45 | #include <linux/tca6416_keypad.h> | 45 | #include <linux/tca6416_keypad.h> |
46 | #include <linux/usb/r8a66597.h> | ||
47 | #include <linux/usb/renesas_usbhs.h> | 46 | #include <linux/usb/renesas_usbhs.h> |
48 | #include <linux/dma-mapping.h> | 47 | #include <linux/dma-mapping.h> |
49 | 48 | ||
@@ -145,11 +144,6 @@ | |||
145 | * 1-2 short | VBUS 5V | Host | 144 | * 1-2 short | VBUS 5V | Host |
146 | * open | external VBUS | Function | 145 | * open | external VBUS | Function |
147 | * | 146 | * |
148 | * *1 | ||
149 | * CN31 is used as | ||
150 | * CONFIG_USB_R8A66597_HCD Host | ||
151 | * CONFIG_USB_RENESAS_USBHS Function | ||
152 | * | ||
153 | * CAUTION | 147 | * CAUTION |
154 | * | 148 | * |
155 | * renesas_usbhs driver can use external interrupt mode | 149 | * renesas_usbhs driver can use external interrupt mode |
@@ -161,15 +155,6 @@ | |||
161 | * mackerel can not use external interrupt (IRQ7-PORT167) mode on "USB0", | 155 | * mackerel can not use external interrupt (IRQ7-PORT167) mode on "USB0", |
162 | * because Touchscreen is using IRQ7-PORT40. | 156 | * because Touchscreen is using IRQ7-PORT40. |
163 | * It is impossible to use IRQ7 demux on this board. | 157 | * It is impossible to use IRQ7 demux on this board. |
164 | * | ||
165 | * We can use external interrupt mode USB-Function on "USB1". | ||
166 | * USB1 can become Host by r8a66597, and become Function by renesas_usbhs. | ||
167 | * But don't select both drivers in same time. | ||
168 | * These uses same IRQ number for request_irq(), and aren't supporting | ||
169 | * IRQF_SHARED / IORESOURCE_IRQ_SHAREABLE. | ||
170 | * | ||
171 | * Actually these are old/new version of USB driver. | ||
172 | * This mean its register will be broken if it supports shared IRQ, | ||
173 | */ | 158 | */ |
174 | 159 | ||
175 | /* | 160 | /* |
@@ -208,6 +193,16 @@ | |||
208 | */ | 193 | */ |
209 | 194 | ||
210 | /* | 195 | /* |
196 | * FSI - AK4642 | ||
197 | * | ||
198 | * it needs amixer settings for playing | ||
199 | * | ||
200 | * amixer set "Headphone" on | ||
201 | * amixer set "HPOUTL Mixer DACH" on | ||
202 | * amixer set "HPOUTR Mixer DACH" on | ||
203 | */ | ||
204 | |||
205 | /* | ||
211 | * FIXME !! | 206 | * FIXME !! |
212 | * | 207 | * |
213 | * gpio_no_direction | 208 | * gpio_no_direction |
@@ -676,51 +671,16 @@ static struct platform_device usbhs0_device = { | |||
676 | * Use J30 to select between Host and Function. This setting | 671 | * Use J30 to select between Host and Function. This setting |
677 | * can however not be detected by software. Hotplug of USBHS1 | 672 | * can however not be detected by software. Hotplug of USBHS1 |
678 | * is provided via IRQ8. | 673 | * is provided via IRQ8. |
674 | * | ||
675 | * Current USB1 works as "USB Host". | ||
676 | * - set J30 "short" | ||
677 | * | ||
678 | * If you want to use it as "USB gadget", | ||
679 | * - J30 "open" | ||
680 | * - modify usbhs1_get_id() USBHS_HOST -> USBHS_GADGET | ||
681 | * - add .get_vbus = usbhs_get_vbus in usbhs1_private | ||
679 | */ | 682 | */ |
680 | #define IRQ8 evt2irq(0x0300) | 683 | #define IRQ8 evt2irq(0x0300) |
681 | |||
682 | /* USBHS1 USB Host support via r8a66597_hcd */ | ||
683 | static void usb1_host_port_power(int port, int power) | ||
684 | { | ||
685 | if (!power) /* only power-on is supported for now */ | ||
686 | return; | ||
687 | |||
688 | /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */ | ||
689 | __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008); | ||
690 | } | ||
691 | |||
692 | static struct r8a66597_platdata usb1_host_data = { | ||
693 | .on_chip = 1, | ||
694 | .port_power = usb1_host_port_power, | ||
695 | }; | ||
696 | |||
697 | static struct resource usb1_host_resources[] = { | ||
698 | [0] = { | ||
699 | .name = "USBHS1", | ||
700 | .start = 0xe68b0000, | ||
701 | .end = 0xe68b00e6 - 1, | ||
702 | .flags = IORESOURCE_MEM, | ||
703 | }, | ||
704 | [1] = { | ||
705 | .start = evt2irq(0x1ce0) /* USB1_USB1I0 */, | ||
706 | .flags = IORESOURCE_IRQ, | ||
707 | }, | ||
708 | }; | ||
709 | |||
710 | static struct platform_device usb1_host_device = { | ||
711 | .name = "r8a66597_hcd", | ||
712 | .id = 1, | ||
713 | .dev = { | ||
714 | .dma_mask = NULL, /* not use dma */ | ||
715 | .coherent_dma_mask = 0xffffffff, | ||
716 | .platform_data = &usb1_host_data, | ||
717 | }, | ||
718 | .num_resources = ARRAY_SIZE(usb1_host_resources), | ||
719 | .resource = usb1_host_resources, | ||
720 | }; | ||
721 | |||
722 | /* USBHS1 USB Function support via renesas_usbhs */ | ||
723 | |||
724 | #define USB_PHY_MODE (1 << 4) | 684 | #define USB_PHY_MODE (1 << 4) |
725 | #define USB_PHY_INT_EN ((1 << 3) | (1 << 2)) | 685 | #define USB_PHY_INT_EN ((1 << 3) | (1 << 2)) |
726 | #define USB_PHY_ON (1 << 1) | 686 | #define USB_PHY_ON (1 << 1) |
@@ -776,7 +736,7 @@ static void usbhs1_hardware_exit(struct platform_device *pdev) | |||
776 | 736 | ||
777 | static int usbhs1_get_id(struct platform_device *pdev) | 737 | static int usbhs1_get_id(struct platform_device *pdev) |
778 | { | 738 | { |
779 | return USBHS_GADGET; | 739 | return USBHS_HOST; |
780 | } | 740 | } |
781 | 741 | ||
782 | static u32 usbhs1_pipe_cfg[] = { | 742 | static u32 usbhs1_pipe_cfg[] = { |
@@ -807,7 +767,6 @@ static struct usbhs_private usbhs1_private = { | |||
807 | .hardware_exit = usbhs1_hardware_exit, | 767 | .hardware_exit = usbhs1_hardware_exit, |
808 | .get_id = usbhs1_get_id, | 768 | .get_id = usbhs1_get_id, |
809 | .phy_reset = usbhs_phy_reset, | 769 | .phy_reset = usbhs_phy_reset, |
810 | .get_vbus = usbhs_get_vbus, | ||
811 | }, | 770 | }, |
812 | .driver_param = { | 771 | .driver_param = { |
813 | .buswait_bwait = 4, | 772 | .buswait_bwait = 4, |
@@ -1184,15 +1143,6 @@ static struct resource sh_mmcif_resources[] = { | |||
1184 | }, | 1143 | }, |
1185 | }; | 1144 | }; |
1186 | 1145 | ||
1187 | static struct sh_mmcif_dma sh_mmcif_dma = { | ||
1188 | .chan_priv_rx = { | ||
1189 | .slave_id = SHDMA_SLAVE_MMCIF_RX, | ||
1190 | }, | ||
1191 | .chan_priv_tx = { | ||
1192 | .slave_id = SHDMA_SLAVE_MMCIF_TX, | ||
1193 | }, | ||
1194 | }; | ||
1195 | |||
1196 | static struct sh_mmcif_plat_data sh_mmcif_plat = { | 1146 | static struct sh_mmcif_plat_data sh_mmcif_plat = { |
1197 | .sup_pclk = 0, | 1147 | .sup_pclk = 0, |
1198 | .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, | 1148 | .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, |
@@ -1200,7 +1150,8 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = { | |||
1200 | MMC_CAP_8_BIT_DATA | | 1150 | MMC_CAP_8_BIT_DATA | |
1201 | MMC_CAP_NEEDS_POLL, | 1151 | MMC_CAP_NEEDS_POLL, |
1202 | .get_cd = slot_cn7_get_cd, | 1152 | .get_cd = slot_cn7_get_cd, |
1203 | .dma = &sh_mmcif_dma, | 1153 | .slave_id_tx = SHDMA_SLAVE_MMCIF_TX, |
1154 | .slave_id_rx = SHDMA_SLAVE_MMCIF_RX, | ||
1204 | }; | 1155 | }; |
1205 | 1156 | ||
1206 | static struct platform_device sh_mmcif_device = { | 1157 | static struct platform_device sh_mmcif_device = { |
@@ -1311,7 +1262,6 @@ static struct platform_device *mackerel_devices[] __initdata = { | |||
1311 | &nor_flash_device, | 1262 | &nor_flash_device, |
1312 | &smc911x_device, | 1263 | &smc911x_device, |
1313 | &lcdc_device, | 1264 | &lcdc_device, |
1314 | &usb1_host_device, | ||
1315 | &usbhs1_device, | 1265 | &usbhs1_device, |
1316 | &usbhs0_device, | 1266 | &usbhs0_device, |
1317 | &leds_device, | 1267 | &leds_device, |
@@ -1473,9 +1423,6 @@ static void __init mackerel_init(void) | |||
1473 | gpio_pull_down(GPIO_PORT167CR); /* VBUS0_1 pull down */ | 1423 | gpio_pull_down(GPIO_PORT167CR); /* VBUS0_1 pull down */ |
1474 | gpio_request(GPIO_FN_IDIN_1_113, NULL); | 1424 | gpio_request(GPIO_FN_IDIN_1_113, NULL); |
1475 | 1425 | ||
1476 | /* USB phy tweak to make the r8a66597_hcd host driver work */ | ||
1477 | __raw_writew(0x8a0a, 0xe6058130); /* USBCR4 */ | ||
1478 | |||
1479 | /* enable FSI2 port A (ak4643) */ | 1426 | /* enable FSI2 port A (ak4643) */ |
1480 | gpio_request(GPIO_FN_FSIAIBT, NULL); | 1427 | gpio_request(GPIO_FN_FSIAIBT, NULL); |
1481 | gpio_request(GPIO_FN_FSIAILR, NULL); | 1428 | gpio_request(GPIO_FN_FSIAILR, NULL); |
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c index afbead6a6e17..7727cca6136c 100644 --- a/arch/arm/mach-shmobile/clock-sh73a0.c +++ b/arch/arm/mach-shmobile/clock-sh73a0.c | |||
@@ -365,6 +365,114 @@ static struct clk div6_clks[DIV6_NR] = { | |||
365 | dsi_parent, ARRAY_SIZE(dsi_parent), 12, 3), | 365 | dsi_parent, ARRAY_SIZE(dsi_parent), 12, 3), |
366 | }; | 366 | }; |
367 | 367 | ||
368 | /* DSI DIV */ | ||
369 | static unsigned long dsiphy_recalc(struct clk *clk) | ||
370 | { | ||
371 | u32 value; | ||
372 | |||
373 | value = __raw_readl(clk->mapping->base); | ||
374 | |||
375 | /* FIXME */ | ||
376 | if (!(value & 0x000B8000)) | ||
377 | return clk->parent->rate; | ||
378 | |||
379 | value &= 0x3f; | ||
380 | value += 1; | ||
381 | |||
382 | if ((value < 12) || | ||
383 | (value > 33)) { | ||
384 | pr_err("DSIPHY has wrong value (%d)", value); | ||
385 | return 0; | ||
386 | } | ||
387 | |||
388 | return clk->parent->rate / value; | ||
389 | } | ||
390 | |||
391 | static long dsiphy_round_rate(struct clk *clk, unsigned long rate) | ||
392 | { | ||
393 | return clk_rate_mult_range_round(clk, 12, 33, rate); | ||
394 | } | ||
395 | |||
396 | static void dsiphy_disable(struct clk *clk) | ||
397 | { | ||
398 | u32 value; | ||
399 | |||
400 | value = __raw_readl(clk->mapping->base); | ||
401 | value &= ~0x000B8000; | ||
402 | |||
403 | __raw_writel(value , clk->mapping->base); | ||
404 | } | ||
405 | |||
406 | static int dsiphy_enable(struct clk *clk) | ||
407 | { | ||
408 | u32 value; | ||
409 | int multi; | ||
410 | |||
411 | value = __raw_readl(clk->mapping->base); | ||
412 | multi = (value & 0x3f) + 1; | ||
413 | |||
414 | if ((multi < 12) || (multi > 33)) | ||
415 | return -EIO; | ||
416 | |||
417 | __raw_writel(value | 0x000B8000, clk->mapping->base); | ||
418 | |||
419 | return 0; | ||
420 | } | ||
421 | |||
422 | static int dsiphy_set_rate(struct clk *clk, unsigned long rate) | ||
423 | { | ||
424 | u32 value; | ||
425 | int idx; | ||
426 | |||
427 | idx = rate / clk->parent->rate; | ||
428 | if ((idx < 12) || (idx > 33)) | ||
429 | return -EINVAL; | ||
430 | |||
431 | idx += -1; | ||
432 | |||
433 | value = __raw_readl(clk->mapping->base); | ||
434 | value = (value & ~0x3f) + idx; | ||
435 | |||
436 | __raw_writel(value, clk->mapping->base); | ||
437 | |||
438 | return 0; | ||
439 | } | ||
440 | |||
441 | static struct clk_ops dsiphy_clk_ops = { | ||
442 | .recalc = dsiphy_recalc, | ||
443 | .round_rate = dsiphy_round_rate, | ||
444 | .set_rate = dsiphy_set_rate, | ||
445 | .enable = dsiphy_enable, | ||
446 | .disable = dsiphy_disable, | ||
447 | }; | ||
448 | |||
449 | static struct clk_mapping dsi0phy_clk_mapping = { | ||
450 | .phys = DSI0PHYCR, | ||
451 | .len = 4, | ||
452 | }; | ||
453 | |||
454 | static struct clk_mapping dsi1phy_clk_mapping = { | ||
455 | .phys = DSI1PHYCR, | ||
456 | .len = 4, | ||
457 | }; | ||
458 | |||
459 | static struct clk dsi0phy_clk = { | ||
460 | .ops = &dsiphy_clk_ops, | ||
461 | .parent = &div6_clks[DIV6_DSI0P], /* late install */ | ||
462 | .mapping = &dsi0phy_clk_mapping, | ||
463 | }; | ||
464 | |||
465 | static struct clk dsi1phy_clk = { | ||
466 | .ops = &dsiphy_clk_ops, | ||
467 | .parent = &div6_clks[DIV6_DSI1P], /* late install */ | ||
468 | .mapping = &dsi1phy_clk_mapping, | ||
469 | }; | ||
470 | |||
471 | static struct clk *late_main_clks[] = { | ||
472 | &dsi0phy_clk, | ||
473 | &dsi1phy_clk, | ||
474 | }; | ||
475 | |||
368 | enum { MSTP001, | 476 | enum { MSTP001, |
369 | MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100, | 477 | MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100, |
370 | MSTP219, | 478 | MSTP219, |
@@ -429,6 +537,8 @@ static struct clk_lookup lookups[] = { | |||
429 | CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]), | 537 | CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]), |
430 | CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]), | 538 | CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]), |
431 | CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]), | 539 | CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]), |
540 | CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.0", &dsi0phy_clk), | ||
541 | CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.1", &dsi1phy_clk), | ||
432 | 542 | ||
433 | /* MSTP32 clocks */ | 543 | /* MSTP32 clocks */ |
434 | CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */ | 544 | CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */ |
@@ -504,6 +614,9 @@ void __init sh73a0_clock_init(void) | |||
504 | if (!ret) | 614 | if (!ret) |
505 | ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); | 615 | ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); |
506 | 616 | ||
617 | for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) | ||
618 | ret = clk_register(late_main_clks[k]); | ||
619 | |||
507 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | 620 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); |
508 | 621 | ||
509 | if (!ret) | 622 | if (!ret) |
diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S deleted file mode 100644 index 2a57b2964ee9..000000000000 --- a/arch/arm/mach-shmobile/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2010 Paul Mundt | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; version 2 of the License. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, | ||
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program; if not, write to the Free Software | ||
15 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
16 | */ | ||
17 | |||
18 | .macro disable_fiq | ||
19 | .endm | ||
20 | |||
21 | .macro arch_ret_to_user, tmp1, tmp2 | ||
22 | .endm | ||
diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobile/include/mach/sh73a0.h index 881d515a9686..cad57578ceed 100644 --- a/arch/arm/mach-shmobile/include/mach/sh73a0.h +++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h | |||
@@ -515,8 +515,8 @@ enum { | |||
515 | SHDMA_SLAVE_MMCIF_RX, | 515 | SHDMA_SLAVE_MMCIF_RX, |
516 | }; | 516 | }; |
517 | 517 | ||
518 | /* PINT interrupts are located at Linux IRQ 768 and up */ | 518 | /* PINT interrupts are located at Linux IRQ 800 and up */ |
519 | #define SH73A0_PINT0_IRQ(irq) ((irq) + 768) | 519 | #define SH73A0_PINT0_IRQ(irq) ((irq) + 800) |
520 | #define SH73A0_PINT1_IRQ(irq) ((irq) + 800) | 520 | #define SH73A0_PINT1_IRQ(irq) ((irq) + 832) |
521 | 521 | ||
522 | #endif /* __ASM_SH73A0_H__ */ | 522 | #endif /* __ASM_SH73A0_H__ */ |
diff --git a/arch/arm/mach-shmobile/include/mach/system.h b/arch/arm/mach-shmobile/include/mach/system.h index 956ac18ddbf9..3bbcb3fa0775 100644 --- a/arch/arm/mach-shmobile/include/mach/system.h +++ b/arch/arm/mach-shmobile/include/mach/system.h | |||
@@ -1,11 +1,6 @@ | |||
1 | #ifndef __ASM_ARCH_SYSTEM_H | 1 | #ifndef __ASM_ARCH_SYSTEM_H |
2 | #define __ASM_ARCH_SYSTEM_H | 2 | #define __ASM_ARCH_SYSTEM_H |
3 | 3 | ||
4 | static inline void arch_idle(void) | ||
5 | { | ||
6 | cpu_do_idle(); | ||
7 | } | ||
8 | |||
9 | static inline void arch_reset(char mode, const char *cmd) | 4 | static inline void arch_reset(char mode, const char *cmd) |
10 | { | 5 | { |
11 | soft_restart(0); | 6 | soft_restart(0); |
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c index 1eda6b0b69e3..9857595eaa79 100644 --- a/arch/arm/mach-shmobile/intc-sh73a0.c +++ b/arch/arm/mach-shmobile/intc-sh73a0.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
21 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
22 | #include <linux/module.h> | ||
22 | #include <linux/irq.h> | 23 | #include <linux/irq.h> |
23 | #include <linux/io.h> | 24 | #include <linux/io.h> |
24 | #include <linux/sh_intc.h> | 25 | #include <linux/sh_intc.h> |
@@ -445,6 +446,7 @@ void __init sh73a0_init_irq(void) | |||
445 | setup_irq(gic_spi(1 + k), &sh73a0_irq_pin_cascade[k]); | 446 | setup_irq(gic_spi(1 + k), &sh73a0_irq_pin_cascade[k]); |
446 | 447 | ||
447 | n = intcs_evt2irq(to_intc_vect(gic_spi(1 + k))); | 448 | n = intcs_evt2irq(to_intc_vect(gic_spi(1 + k))); |
449 | WARN_ON(irq_alloc_desc_at(n, numa_node_id()) != n); | ||
448 | irq_set_chip_and_handler_name(n, &intca_gic_irq_chip, | 450 | irq_set_chip_and_handler_name(n, &intca_gic_irq_chip, |
449 | handle_level_irq, "level"); | 451 | handle_level_irq, "level"); |
450 | set_irq_flags(n, IRQF_VALID); /* yuck */ | 452 | set_irq_flags(n, IRQF_VALID); /* yuck */ |
diff --git a/arch/arm/mach-shmobile/pfc-r8a7779.c b/arch/arm/mach-shmobile/pfc-r8a7779.c index 963532f2b2c4..d14c9b048077 100644 --- a/arch/arm/mach-shmobile/pfc-r8a7779.c +++ b/arch/arm/mach-shmobile/pfc-r8a7779.c | |||
@@ -2120,7 +2120,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { | |||
2120 | FN_AUDATA3, 0, 0, 0 } | 2120 | FN_AUDATA3, 0, 0, 0 } |
2121 | }, | 2121 | }, |
2122 | { PINMUX_CFG_REG_VAR("IPSR4", 0xfffc0030, 32, | 2122 | { PINMUX_CFG_REG_VAR("IPSR4", 0xfffc0030, 32, |
2123 | 3, 1, 1, 1, 1, 1, 1, 3, 3, 1, | 2123 | 3, 1, 1, 1, 1, 1, 1, 3, 3, |
2124 | 1, 1, 1, 1, 1, 1, 3, 3, 3, 2) { | 2124 | 1, 1, 1, 1, 1, 1, 3, 3, 3, 2) { |
2125 | /* IP4_31_29 [3] */ | 2125 | /* IP4_31_29 [3] */ |
2126 | FN_DU1_DB0, FN_VI2_DATA4_VI2_B4, FN_SCL2_B, FN_SD3_DAT0, | 2126 | FN_DU1_DB0, FN_VI2_DATA4_VI2_B4, FN_SCL2_B, FN_SD3_DAT0, |
diff --git a/arch/arm/mach-shmobile/pfc-sh7372.c b/arch/arm/mach-shmobile/pfc-sh7372.c index 1bd6585a6acf..336093f9210a 100644 --- a/arch/arm/mach-shmobile/pfc-sh7372.c +++ b/arch/arm/mach-shmobile/pfc-sh7372.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/init.h> | 23 | #include <linux/init.h> |
24 | #include <linux/kernel.h> | 24 | #include <linux/kernel.h> |
25 | #include <linux/gpio.h> | 25 | #include <linux/gpio.h> |
26 | #include <mach/irqs.h> | ||
26 | #include <mach/sh7372.h> | 27 | #include <mach/sh7372.h> |
27 | 28 | ||
28 | #define CPU_ALL_PORT(fn, pfx, sfx) \ | 29 | #define CPU_ALL_PORT(fn, pfx, sfx) \ |
@@ -1594,6 +1595,43 @@ static struct pinmux_data_reg pinmux_data_regs[] = { | |||
1594 | { }, | 1595 | { }, |
1595 | }; | 1596 | }; |
1596 | 1597 | ||
1598 | #define EXT_IRQ16L(n) evt2irq(0x200 + ((n) << 5)) | ||
1599 | #define EXT_IRQ16H(n) evt2irq(0x3200 + (((n) - 16) << 5)) | ||
1600 | static struct pinmux_irq pinmux_irqs[] = { | ||
1601 | PINMUX_IRQ(EXT_IRQ16L(0), PORT6_FN0, PORT162_FN0), | ||
1602 | PINMUX_IRQ(EXT_IRQ16L(1), PORT12_FN0), | ||
1603 | PINMUX_IRQ(EXT_IRQ16L(2), PORT4_FN0, PORT5_FN0), | ||
1604 | PINMUX_IRQ(EXT_IRQ16L(3), PORT8_FN0, PORT16_FN0), | ||
1605 | PINMUX_IRQ(EXT_IRQ16L(4), PORT17_FN0, PORT163_FN0), | ||
1606 | PINMUX_IRQ(EXT_IRQ16L(5), PORT18_FN0), | ||
1607 | PINMUX_IRQ(EXT_IRQ16L(6), PORT39_FN0, PORT164_FN0), | ||
1608 | PINMUX_IRQ(EXT_IRQ16L(7), PORT40_FN0, PORT167_FN0), | ||
1609 | PINMUX_IRQ(EXT_IRQ16L(8), PORT41_FN0, PORT168_FN0), | ||
1610 | PINMUX_IRQ(EXT_IRQ16L(9), PORT42_FN0, PORT169_FN0), | ||
1611 | PINMUX_IRQ(EXT_IRQ16L(10), PORT65_FN0), | ||
1612 | PINMUX_IRQ(EXT_IRQ16L(11), PORT67_FN0), | ||
1613 | PINMUX_IRQ(EXT_IRQ16L(12), PORT80_FN0, PORT137_FN0), | ||
1614 | PINMUX_IRQ(EXT_IRQ16L(13), PORT81_FN0, PORT145_FN0), | ||
1615 | PINMUX_IRQ(EXT_IRQ16L(14), PORT82_FN0, PORT146_FN0), | ||
1616 | PINMUX_IRQ(EXT_IRQ16L(15), PORT83_FN0, PORT147_FN0), | ||
1617 | PINMUX_IRQ(EXT_IRQ16H(16), PORT84_FN0, PORT170_FN0), | ||
1618 | PINMUX_IRQ(EXT_IRQ16H(17), PORT85_FN0), | ||
1619 | PINMUX_IRQ(EXT_IRQ16H(18), PORT86_FN0), | ||
1620 | PINMUX_IRQ(EXT_IRQ16H(19), PORT87_FN0), | ||
1621 | PINMUX_IRQ(EXT_IRQ16H(20), PORT92_FN0), | ||
1622 | PINMUX_IRQ(EXT_IRQ16H(21), PORT93_FN0), | ||
1623 | PINMUX_IRQ(EXT_IRQ16H(22), PORT94_FN0), | ||
1624 | PINMUX_IRQ(EXT_IRQ16H(23), PORT95_FN0), | ||
1625 | PINMUX_IRQ(EXT_IRQ16H(24), PORT112_FN0), | ||
1626 | PINMUX_IRQ(EXT_IRQ16H(25), PORT119_FN0), | ||
1627 | PINMUX_IRQ(EXT_IRQ16H(26), PORT121_FN0, PORT172_FN0), | ||
1628 | PINMUX_IRQ(EXT_IRQ16H(27), PORT122_FN0, PORT180_FN0), | ||
1629 | PINMUX_IRQ(EXT_IRQ16H(28), PORT123_FN0, PORT181_FN0), | ||
1630 | PINMUX_IRQ(EXT_IRQ16H(29), PORT129_FN0, PORT182_FN0), | ||
1631 | PINMUX_IRQ(EXT_IRQ16H(30), PORT130_FN0, PORT183_FN0), | ||
1632 | PINMUX_IRQ(EXT_IRQ16H(31), PORT138_FN0, PORT184_FN0), | ||
1633 | }; | ||
1634 | |||
1597 | static struct pinmux_info sh7372_pinmux_info = { | 1635 | static struct pinmux_info sh7372_pinmux_info = { |
1598 | .name = "sh7372_pfc", | 1636 | .name = "sh7372_pfc", |
1599 | .reserved_id = PINMUX_RESERVED, | 1637 | .reserved_id = PINMUX_RESERVED, |
@@ -1614,6 +1652,9 @@ static struct pinmux_info sh7372_pinmux_info = { | |||
1614 | 1652 | ||
1615 | .gpio_data = pinmux_data, | 1653 | .gpio_data = pinmux_data, |
1616 | .gpio_data_size = ARRAY_SIZE(pinmux_data), | 1654 | .gpio_data_size = ARRAY_SIZE(pinmux_data), |
1655 | |||
1656 | .gpio_irq = pinmux_irqs, | ||
1657 | .gpio_irq_size = ARRAY_SIZE(pinmux_irqs), | ||
1617 | }; | 1658 | }; |
1618 | 1659 | ||
1619 | void sh7372_pinmux_init(void) | 1660 | void sh7372_pinmux_init(void) |
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c index 0d159d64a345..2d0d4212be41 100644 --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c | |||
@@ -80,7 +80,7 @@ int __cpuinit sh73a0_boot_secondary(unsigned int cpu) | |||
80 | /* enable cache coherency */ | 80 | /* enable cache coherency */ |
81 | modify_scu_cpu_psr(0, 3 << (cpu * 8)); | 81 | modify_scu_cpu_psr(0, 3 << (cpu * 8)); |
82 | 82 | ||
83 | if (((__raw_readw(__io(PSTR)) >> (4 * cpu)) & 3) == 3) | 83 | if (((__raw_readl(__io(PSTR)) >> (4 * cpu)) & 3) == 3) |
84 | __raw_writel(1 << cpu, __io(WUPCR)); /* wake up */ | 84 | __raw_writel(1 << cpu, __io(WUPCR)); /* wake up */ |
85 | else | 85 | else |
86 | __raw_writel(1 << cpu, __io(SRESCR)); /* reset */ | 86 | __raw_writel(1 << cpu, __io(SRESCR)); /* reset */ |
diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S deleted file mode 100644 index de3bb41c8e9e..000000000000 --- a/arch/arm/mach-spear3xx/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-spear3xx/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for SPEAr3xx machine family | ||
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Viresh Kumar<viresh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | .macro disable_fiq | ||
15 | .endm | ||
16 | |||
17 | .macro arch_ret_to_user, tmp1, tmp2 | ||
18 | .endm | ||
diff --git a/arch/arm/mach-spear3xx/include/mach/system.h b/arch/arm/mach-spear3xx/include/mach/system.h deleted file mode 100644 index 92cee6335c90..000000000000 --- a/arch/arm/mach-spear3xx/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-spear3xx/include/mach/system.h | ||
3 | * | ||
4 | * SPEAr3xx Machine family specific architecture functions | ||
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Viresh Kumar<viresh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | #ifndef __MACH_SYSTEM_H | ||
15 | #define __MACH_SYSTEM_H | ||
16 | |||
17 | #include <plat/system.h> | ||
18 | |||
19 | #endif /* __MACH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c index a5e46b4ade20..9da50e281e98 100644 --- a/arch/arm/mach-spear3xx/spear300.c +++ b/arch/arm/mach-spear3xx/spear300.c | |||
@@ -430,18 +430,8 @@ static struct pl061_platform_data gpio1_plat_data = { | |||
430 | .irq_base = SPEAR300_GPIO1_INT_BASE, | 430 | .irq_base = SPEAR300_GPIO1_INT_BASE, |
431 | }; | 431 | }; |
432 | 432 | ||
433 | struct amba_device spear300_gpio1_device = { | 433 | AMBA_APB_DEVICE(spear300_gpio1, "gpio1", 0, SPEAR300_GPIO_BASE, |
434 | .dev = { | 434 | {SPEAR300_VIRQ_GPIO1}, &gpio1_plat_data); |
435 | .init_name = "gpio1", | ||
436 | .platform_data = &gpio1_plat_data, | ||
437 | }, | ||
438 | .res = { | ||
439 | .start = SPEAR300_GPIO_BASE, | ||
440 | .end = SPEAR300_GPIO_BASE + SZ_4K - 1, | ||
441 | .flags = IORESOURCE_MEM, | ||
442 | }, | ||
443 | .irq = {SPEAR300_VIRQ_GPIO1, NO_IRQ}, | ||
444 | }; | ||
445 | 435 | ||
446 | /* spear300 routines */ | 436 | /* spear300 routines */ |
447 | void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, | 437 | void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, |
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c index 10af45da86a0..b1733c37f209 100644 --- a/arch/arm/mach-spear3xx/spear3xx.c +++ b/arch/arm/mach-spear3xx/spear3xx.c | |||
@@ -28,31 +28,12 @@ static struct pl061_platform_data gpio_plat_data = { | |||
28 | .irq_base = SPEAR3XX_GPIO_INT_BASE, | 28 | .irq_base = SPEAR3XX_GPIO_INT_BASE, |
29 | }; | 29 | }; |
30 | 30 | ||
31 | struct amba_device spear3xx_gpio_device = { | 31 | AMBA_APB_DEVICE(spear3xx_gpio, "gpio", 0, SPEAR3XX_ICM3_GPIO_BASE, |
32 | .dev = { | 32 | {SPEAR3XX_IRQ_BASIC_GPIO}, &gpio_plat_data); |
33 | .init_name = "gpio", | ||
34 | .platform_data = &gpio_plat_data, | ||
35 | }, | ||
36 | .res = { | ||
37 | .start = SPEAR3XX_ICM3_GPIO_BASE, | ||
38 | .end = SPEAR3XX_ICM3_GPIO_BASE + SZ_4K - 1, | ||
39 | .flags = IORESOURCE_MEM, | ||
40 | }, | ||
41 | .irq = {SPEAR3XX_IRQ_BASIC_GPIO, NO_IRQ}, | ||
42 | }; | ||
43 | 33 | ||
44 | /* uart device registration */ | 34 | /* uart device registration */ |
45 | struct amba_device spear3xx_uart_device = { | 35 | AMBA_APB_DEVICE(spear3xx_uart, "uart", 0, SPEAR3XX_ICM1_UART_BASE, |
46 | .dev = { | 36 | {SPEAR3XX_IRQ_UART}, NULL); |
47 | .init_name = "uart", | ||
48 | }, | ||
49 | .res = { | ||
50 | .start = SPEAR3XX_ICM1_UART_BASE, | ||
51 | .end = SPEAR3XX_ICM1_UART_BASE + SZ_4K - 1, | ||
52 | .flags = IORESOURCE_MEM, | ||
53 | }, | ||
54 | .irq = {SPEAR3XX_IRQ_UART, NO_IRQ}, | ||
55 | }; | ||
56 | 37 | ||
57 | /* Do spear3xx familiy common initialization part here */ | 38 | /* Do spear3xx familiy common initialization part here */ |
58 | void __init spear3xx_init(void) | 39 | void __init spear3xx_init(void) |
diff --git a/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/arch/arm/mach-spear6xx/include/mach/entry-macro.S deleted file mode 100644 index d490a910d925..000000000000 --- a/arch/arm/mach-spear6xx/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-spear6xx/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for SPEAr6xx machine family | ||
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Rajeev Kumar<rajeev-dlh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | .macro disable_fiq | ||
15 | .endm | ||
16 | |||
17 | .macro arch_ret_to_user, tmp1, tmp2 | ||
18 | .endm | ||
diff --git a/arch/arm/mach-spear6xx/include/mach/system.h b/arch/arm/mach-spear6xx/include/mach/system.h deleted file mode 100644 index 0b1d2be81cfb..000000000000 --- a/arch/arm/mach-spear6xx/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-spear6xx/include/mach/system.h | ||
3 | * | ||
4 | * SPEAr6xx Machine family specific architecture functions | ||
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Rajeev Kumar<rajeev-dlh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | #ifndef __MACH_SYSTEM_H | ||
15 | #define __MACH_SYSTEM_H | ||
16 | |||
17 | #include <plat/system.h> | ||
18 | |||
19 | #endif /* __MACH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c index e0f6628c8b2c..b997b1b10ba0 100644 --- a/arch/arm/mach-spear6xx/spear6xx.c +++ b/arch/arm/mach-spear6xx/spear6xx.c | |||
@@ -34,7 +34,7 @@ struct amba_device uart_device[] = { | |||
34 | .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1, | 34 | .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1, |
35 | .flags = IORESOURCE_MEM, | 35 | .flags = IORESOURCE_MEM, |
36 | }, | 36 | }, |
37 | .irq = {IRQ_UART_0, NO_IRQ}, | 37 | .irq = {IRQ_UART_0}, |
38 | }, { | 38 | }, { |
39 | .dev = { | 39 | .dev = { |
40 | .init_name = "uart1", | 40 | .init_name = "uart1", |
@@ -44,7 +44,7 @@ struct amba_device uart_device[] = { | |||
44 | .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1, | 44 | .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1, |
45 | .flags = IORESOURCE_MEM, | 45 | .flags = IORESOURCE_MEM, |
46 | }, | 46 | }, |
47 | .irq = {IRQ_UART_1, NO_IRQ}, | 47 | .irq = {IRQ_UART_1}, |
48 | } | 48 | } |
49 | }; | 49 | }; |
50 | 50 | ||
@@ -73,7 +73,7 @@ struct amba_device gpio_device[] = { | |||
73 | .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1, | 73 | .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1, |
74 | .flags = IORESOURCE_MEM, | 74 | .flags = IORESOURCE_MEM, |
75 | }, | 75 | }, |
76 | .irq = {IRQ_LOCAL_GPIO, NO_IRQ}, | 76 | .irq = {IRQ_LOCAL_GPIO}, |
77 | }, { | 77 | }, { |
78 | .dev = { | 78 | .dev = { |
79 | .init_name = "gpio1", | 79 | .init_name = "gpio1", |
@@ -84,7 +84,7 @@ struct amba_device gpio_device[] = { | |||
84 | .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1, | 84 | .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1, |
85 | .flags = IORESOURCE_MEM, | 85 | .flags = IORESOURCE_MEM, |
86 | }, | 86 | }, |
87 | .irq = {IRQ_BASIC_GPIO, NO_IRQ}, | 87 | .irq = {IRQ_BASIC_GPIO}, |
88 | }, { | 88 | }, { |
89 | .dev = { | 89 | .dev = { |
90 | .init_name = "gpio2", | 90 | .init_name = "gpio2", |
@@ -95,7 +95,7 @@ struct amba_device gpio_device[] = { | |||
95 | .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1, | 95 | .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1, |
96 | .flags = IORESOURCE_MEM, | 96 | .flags = IORESOURCE_MEM, |
97 | }, | 97 | }, |
98 | .irq = {IRQ_APPL_GPIO, NO_IRQ}, | 98 | .irq = {IRQ_APPL_GPIO}, |
99 | } | 99 | } |
100 | }; | 100 | }; |
101 | 101 | ||
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 373652d76b90..d2cb4b037f7f 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig | |||
@@ -10,6 +10,14 @@ config ARCH_TEGRA_2x_SOC | |||
10 | select USB_ARCH_HAS_EHCI if USB_SUPPORT | 10 | select USB_ARCH_HAS_EHCI if USB_SUPPORT |
11 | select USB_ULPI if USB_SUPPORT | 11 | select USB_ULPI if USB_SUPPORT |
12 | select USB_ULPI_VIEWPORT if USB_SUPPORT | 12 | select USB_ULPI_VIEWPORT if USB_SUPPORT |
13 | select ARM_ERRATA_720789 | ||
14 | select ARM_ERRATA_742230 | ||
15 | select ARM_ERRATA_751472 | ||
16 | select ARM_ERRATA_754327 | ||
17 | select ARM_ERRATA_764369 | ||
18 | select PL310_ERRATA_727915 if CACHE_L2X0 | ||
19 | select PL310_ERRATA_769419 if CACHE_L2X0 | ||
20 | select CPU_FREQ_TABLE if CPU_FREQ | ||
13 | help | 21 | help |
14 | Support for NVIDIA Tegra AP20 and T20 processors, based on the | 22 | Support for NVIDIA Tegra AP20 and T20 processors, based on the |
15 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller | 23 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller |
@@ -23,6 +31,12 @@ config ARCH_TEGRA_3x_SOC | |||
23 | select USB_ULPI if USB_SUPPORT | 31 | select USB_ULPI if USB_SUPPORT |
24 | select USB_ULPI_VIEWPORT if USB_SUPPORT | 32 | select USB_ULPI_VIEWPORT if USB_SUPPORT |
25 | select USE_OF | 33 | select USE_OF |
34 | select ARM_ERRATA_743622 | ||
35 | select ARM_ERRATA_751472 | ||
36 | select ARM_ERRATA_754322 | ||
37 | select ARM_ERRATA_764369 | ||
38 | select PL310_ERRATA_769419 if CACHE_L2X0 | ||
39 | select CPU_FREQ_TABLE if CPU_FREQ | ||
26 | help | 40 | help |
27 | Support for NVIDIA Tegra T30 processor family, based on the | 41 | Support for NVIDIA Tegra T30 processor family, based on the |
28 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller | 42 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller |
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index e120ff54f663..829066fdc2ad 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile | |||
@@ -13,7 +13,8 @@ obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o | |||
13 | obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pinmux-tegra20-tables.o | 13 | obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pinmux-tegra20-tables.o |
14 | obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pinmux-tegra30-tables.o | 14 | obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pinmux-tegra30-tables.o |
15 | obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o | 15 | obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o |
16 | obj-$(CONFIG_SMP) += platsmp.o localtimer.o headsmp.o | 16 | obj-$(CONFIG_SMP) += platsmp.o headsmp.o |
17 | obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o | ||
17 | obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o | 18 | obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o |
18 | obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o | 19 | obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o |
19 | obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o | 20 | obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o |
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index a2eb90169aed..fac449e84d80 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c | |||
@@ -27,7 +27,6 @@ | |||
27 | #include <asm/hardware/gic.h> | 27 | #include <asm/hardware/gic.h> |
28 | 28 | ||
29 | #include <mach/iomap.h> | 29 | #include <mach/iomap.h> |
30 | #include <mach/system.h> | ||
31 | 30 | ||
32 | #include "board.h" | 31 | #include "board.h" |
33 | #include "clock.h" | 32 | #include "clock.h" |
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S deleted file mode 100644 index e577cfe27e72..000000000000 --- a/arch/arm/mach-tegra/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* arch/arm/mach-tegra/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Copyright (C) 2009 Palm, Inc. | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | .macro disable_fiq | ||
17 | .endm | ||
18 | |||
19 | .macro arch_ret_to_user, tmp1, tmp2 | ||
20 | .endm | ||
diff --git a/arch/arm/mach-tegra/include/mach/system.h b/arch/arm/mach-tegra/include/mach/system.h deleted file mode 100644 index a312988bf6f8..000000000000 --- a/arch/arm/mach-tegra/include/mach/system.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-tegra/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2010 Google, Inc. | ||
5 | * | ||
6 | * Author: | ||
7 | * Colin Cross <ccross@google.com> | ||
8 | * Erik Gilling <konkers@google.com> | ||
9 | * | ||
10 | * This software is licensed under the terms of the GNU General Public | ||
11 | * License version 2, as published by the Free Software Foundation, and | ||
12 | * may be copied, distributed, and modified under those terms. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | */ | ||
20 | |||
21 | #ifndef __MACH_TEGRA_SYSTEM_H | ||
22 | #define __MACH_TEGRA_SYSTEM_H | ||
23 | |||
24 | static inline void arch_idle(void) | ||
25 | { | ||
26 | } | ||
27 | |||
28 | #endif | ||
diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c index 37576a721aeb..6091cf3d8e8b 100644 --- a/arch/arm/mach-tegra/usb_phy.c +++ b/arch/arm/mach-tegra/usb_phy.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
23 | #include <linux/slab.h> | 23 | #include <linux/slab.h> |
24 | #include <linux/err.h> | 24 | #include <linux/err.h> |
25 | #include <linux/export.h> | ||
25 | #include <linux/platform_device.h> | 26 | #include <linux/platform_device.h> |
26 | #include <linux/io.h> | 27 | #include <linux/io.h> |
27 | #include <linux/gpio.h> | 28 | #include <linux/gpio.h> |
@@ -730,6 +731,7 @@ err0: | |||
730 | kfree(phy); | 731 | kfree(phy); |
731 | return ERR_PTR(err); | 732 | return ERR_PTR(err); |
732 | } | 733 | } |
734 | EXPORT_SYMBOL_GPL(tegra_usb_phy_open); | ||
733 | 735 | ||
734 | int tegra_usb_phy_power_on(struct tegra_usb_phy *phy) | 736 | int tegra_usb_phy_power_on(struct tegra_usb_phy *phy) |
735 | { | 737 | { |
@@ -738,6 +740,7 @@ int tegra_usb_phy_power_on(struct tegra_usb_phy *phy) | |||
738 | else | 740 | else |
739 | return utmi_phy_power_on(phy); | 741 | return utmi_phy_power_on(phy); |
740 | } | 742 | } |
743 | EXPORT_SYMBOL_GPL(tegra_usb_phy_power_on); | ||
741 | 744 | ||
742 | void tegra_usb_phy_power_off(struct tegra_usb_phy *phy) | 745 | void tegra_usb_phy_power_off(struct tegra_usb_phy *phy) |
743 | { | 746 | { |
@@ -746,18 +749,21 @@ void tegra_usb_phy_power_off(struct tegra_usb_phy *phy) | |||
746 | else | 749 | else |
747 | utmi_phy_power_off(phy); | 750 | utmi_phy_power_off(phy); |
748 | } | 751 | } |
752 | EXPORT_SYMBOL_GPL(tegra_usb_phy_power_off); | ||
749 | 753 | ||
750 | void tegra_usb_phy_preresume(struct tegra_usb_phy *phy) | 754 | void tegra_usb_phy_preresume(struct tegra_usb_phy *phy) |
751 | { | 755 | { |
752 | if (!phy_is_ulpi(phy)) | 756 | if (!phy_is_ulpi(phy)) |
753 | utmi_phy_preresume(phy); | 757 | utmi_phy_preresume(phy); |
754 | } | 758 | } |
759 | EXPORT_SYMBOL_GPL(tegra_usb_phy_preresume); | ||
755 | 760 | ||
756 | void tegra_usb_phy_postresume(struct tegra_usb_phy *phy) | 761 | void tegra_usb_phy_postresume(struct tegra_usb_phy *phy) |
757 | { | 762 | { |
758 | if (!phy_is_ulpi(phy)) | 763 | if (!phy_is_ulpi(phy)) |
759 | utmi_phy_postresume(phy); | 764 | utmi_phy_postresume(phy); |
760 | } | 765 | } |
766 | EXPORT_SYMBOL_GPL(tegra_usb_phy_postresume); | ||
761 | 767 | ||
762 | void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy, | 768 | void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy, |
763 | enum tegra_usb_phy_port_speed port_speed) | 769 | enum tegra_usb_phy_port_speed port_speed) |
@@ -765,24 +771,28 @@ void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy, | |||
765 | if (!phy_is_ulpi(phy)) | 771 | if (!phy_is_ulpi(phy)) |
766 | utmi_phy_restore_start(phy, port_speed); | 772 | utmi_phy_restore_start(phy, port_speed); |
767 | } | 773 | } |
774 | EXPORT_SYMBOL_GPL(tegra_ehci_phy_restore_start); | ||
768 | 775 | ||
769 | void tegra_ehci_phy_restore_end(struct tegra_usb_phy *phy) | 776 | void tegra_ehci_phy_restore_end(struct tegra_usb_phy *phy) |
770 | { | 777 | { |
771 | if (!phy_is_ulpi(phy)) | 778 | if (!phy_is_ulpi(phy)) |
772 | utmi_phy_restore_end(phy); | 779 | utmi_phy_restore_end(phy); |
773 | } | 780 | } |
781 | EXPORT_SYMBOL_GPL(tegra_ehci_phy_restore_end); | ||
774 | 782 | ||
775 | void tegra_usb_phy_clk_disable(struct tegra_usb_phy *phy) | 783 | void tegra_usb_phy_clk_disable(struct tegra_usb_phy *phy) |
776 | { | 784 | { |
777 | if (!phy_is_ulpi(phy)) | 785 | if (!phy_is_ulpi(phy)) |
778 | utmi_phy_clk_disable(phy); | 786 | utmi_phy_clk_disable(phy); |
779 | } | 787 | } |
788 | EXPORT_SYMBOL_GPL(tegra_usb_phy_clk_disable); | ||
780 | 789 | ||
781 | void tegra_usb_phy_clk_enable(struct tegra_usb_phy *phy) | 790 | void tegra_usb_phy_clk_enable(struct tegra_usb_phy *phy) |
782 | { | 791 | { |
783 | if (!phy_is_ulpi(phy)) | 792 | if (!phy_is_ulpi(phy)) |
784 | utmi_phy_clk_enable(phy); | 793 | utmi_phy_clk_enable(phy); |
785 | } | 794 | } |
795 | EXPORT_SYMBOL_GPL(tegra_usb_phy_clk_enable); | ||
786 | 796 | ||
787 | void tegra_usb_phy_close(struct tegra_usb_phy *phy) | 797 | void tegra_usb_phy_close(struct tegra_usb_phy *phy) |
788 | { | 798 | { |
@@ -794,3 +804,4 @@ void tegra_usb_phy_close(struct tegra_usb_phy *phy) | |||
794 | clk_put(phy->pll_u); | 804 | clk_put(phy->pll_u); |
795 | kfree(phy); | 805 | kfree(phy); |
796 | } | 806 | } |
807 | EXPORT_SYMBOL_GPL(tegra_usb_phy_close); | ||
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index b4c6926a700c..b9865605da09 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c | |||
@@ -94,19 +94,9 @@ static struct amba_pl011_data uart0_plat_data = { | |||
94 | #endif | 94 | #endif |
95 | }; | 95 | }; |
96 | 96 | ||
97 | static struct amba_device uart0_device = { | 97 | /* Slow device at 0x3000 offset */ |
98 | .dev = { | 98 | static AMBA_APB_DEVICE(uart0, "uart0", 0, U300_UART0_BASE, |
99 | .coherent_dma_mask = ~0, | 99 | { IRQ_U300_UART0 }, &uart0_plat_data); |
100 | .init_name = "uart0", /* Slow device at 0x3000 offset */ | ||
101 | .platform_data = &uart0_plat_data, | ||
102 | }, | ||
103 | .res = { | ||
104 | .start = U300_UART0_BASE, | ||
105 | .end = U300_UART0_BASE + SZ_4K - 1, | ||
106 | .flags = IORESOURCE_MEM, | ||
107 | }, | ||
108 | .irq = { IRQ_U300_UART0, NO_IRQ }, | ||
109 | }; | ||
110 | 100 | ||
111 | /* The U335 have an additional UART1 on the APP CPU */ | 101 | /* The U335 have an additional UART1 on the APP CPU */ |
112 | #ifdef CONFIG_MACH_U300_BS335 | 102 | #ifdef CONFIG_MACH_U300_BS335 |
@@ -118,71 +108,28 @@ static struct amba_pl011_data uart1_plat_data = { | |||
118 | #endif | 108 | #endif |
119 | }; | 109 | }; |
120 | 110 | ||
121 | static struct amba_device uart1_device = { | 111 | /* Fast device at 0x7000 offset */ |
122 | .dev = { | 112 | static AMBA_APB_DEVICE(uart1, "uart1", 0, U300_UART1_BASE, |
123 | .coherent_dma_mask = ~0, | 113 | { IRQ_U300_UART1 }, &uart1_plat_data); |
124 | .init_name = "uart1", /* Fast device at 0x7000 offset */ | ||
125 | .platform_data = &uart1_plat_data, | ||
126 | }, | ||
127 | .res = { | ||
128 | .start = U300_UART1_BASE, | ||
129 | .end = U300_UART1_BASE + SZ_4K - 1, | ||
130 | .flags = IORESOURCE_MEM, | ||
131 | }, | ||
132 | .irq = { IRQ_U300_UART1, NO_IRQ }, | ||
133 | }; | ||
134 | #endif | 114 | #endif |
135 | 115 | ||
136 | static struct amba_device pl172_device = { | 116 | /* AHB device at 0x4000 offset */ |
137 | .dev = { | 117 | static AMBA_APB_DEVICE(pl172, "pl172", 0, U300_EMIF_CFG_BASE, { }, NULL); |
138 | .init_name = "pl172", /* AHB device at 0x4000 offset */ | ||
139 | .platform_data = NULL, | ||
140 | }, | ||
141 | .res = { | ||
142 | .start = U300_EMIF_CFG_BASE, | ||
143 | .end = U300_EMIF_CFG_BASE + SZ_4K - 1, | ||
144 | .flags = IORESOURCE_MEM, | ||
145 | }, | ||
146 | }; | ||
147 | 118 | ||
148 | 119 | ||
149 | /* | 120 | /* |
150 | * Everything within this next ifdef deals with external devices connected to | 121 | * Everything within this next ifdef deals with external devices connected to |
151 | * the APP SPI bus. | 122 | * the APP SPI bus. |
152 | */ | 123 | */ |
153 | static struct amba_device pl022_device = { | 124 | /* Fast device at 0x6000 offset */ |
154 | .dev = { | 125 | static AMBA_APB_DEVICE(pl022, "pl022", 0, U300_SPI_BASE, |
155 | .coherent_dma_mask = ~0, | 126 | { IRQ_U300_SPI }, NULL); |
156 | .init_name = "pl022", /* Fast device at 0x6000 offset */ | ||
157 | }, | ||
158 | .res = { | ||
159 | .start = U300_SPI_BASE, | ||
160 | .end = U300_SPI_BASE + SZ_4K - 1, | ||
161 | .flags = IORESOURCE_MEM, | ||
162 | }, | ||
163 | .irq = {IRQ_U300_SPI, NO_IRQ }, | ||
164 | /* | ||
165 | * This device has a DMA channel but the Linux driver does not use | ||
166 | * it currently. | ||
167 | */ | ||
168 | }; | ||
169 | 127 | ||
170 | static struct amba_device mmcsd_device = { | 128 | /* Fast device at 0x1000 offset */ |
171 | .dev = { | 129 | #define U300_MMCSD_IRQS { IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 } |
172 | .init_name = "mmci", /* Fast device at 0x1000 offset */ | 130 | |
173 | .platform_data = NULL, /* Added later */ | 131 | static AMBA_APB_DEVICE(mmcsd, "mmci", 0, U300_MMCSD_BASE, |
174 | }, | 132 | U300_MMCSD_IRQS, NULL); |
175 | .res = { | ||
176 | .start = U300_MMCSD_BASE, | ||
177 | .end = U300_MMCSD_BASE + SZ_4K - 1, | ||
178 | .flags = IORESOURCE_MEM, | ||
179 | }, | ||
180 | .irq = {IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 }, | ||
181 | /* | ||
182 | * This device has a DMA channel but the Linux driver does not use | ||
183 | * it currently. | ||
184 | */ | ||
185 | }; | ||
186 | 133 | ||
187 | /* | 134 | /* |
188 | * The order of device declaration may be important, since some devices | 135 | * The order of device declaration may be important, since some devices |
diff --git a/arch/arm/mach-u300/include/mach/entry-macro.S b/arch/arm/mach-u300/include/mach/entry-macro.S deleted file mode 100644 index 7181d6ac6651..000000000000 --- a/arch/arm/mach-u300/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * arch-arm/mach-u300/include/mach/entry-macro.S | ||
4 | * | ||
5 | * | ||
6 | * Copyright (C) 2006-2009 ST-Ericsson AB | ||
7 | * License terms: GNU General Public License (GPL) version 2 | ||
8 | * Low-level IRQ helper macros for ST-Ericsson U300 | ||
9 | * Author: Linus Walleij <linus.walleij@stericsson.com> | ||
10 | */ | ||
11 | |||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro arch_ret_to_user, tmp1, tmp2 | ||
16 | .endm | ||
diff --git a/arch/arm/mach-u300/include/mach/system.h b/arch/arm/mach-u300/include/mach/system.h deleted file mode 100644 index 574d46e38290..000000000000 --- a/arch/arm/mach-u300/include/mach/system.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * arch/arm/mach-u300/include/mach/system.h | ||
4 | * | ||
5 | * | ||
6 | * Copyright (C) 2007-2009 ST-Ericsson AB | ||
7 | * License terms: GNU General Public License (GPL) version 2 | ||
8 | * System shutdown and reset functions. | ||
9 | * Author: Linus Walleij <linus.walleij@stericsson.com> | ||
10 | */ | ||
11 | static inline void arch_idle(void) | ||
12 | { | ||
13 | cpu_do_idle(); | ||
14 | } | ||
diff --git a/arch/arm/mach-ux500/devices-common.c b/arch/arm/mach-ux500/devices-common.c index c563e5418d80..898a64517b09 100644 --- a/arch/arm/mach-ux500/devices-common.c +++ b/arch/arm/mach-ux500/devices-common.c | |||
@@ -26,29 +26,22 @@ dbx500_add_amba_device(const char *name, resource_size_t base, | |||
26 | struct amba_device *dev; | 26 | struct amba_device *dev; |
27 | int ret; | 27 | int ret; |
28 | 28 | ||
29 | dev = kzalloc(sizeof *dev, GFP_KERNEL); | 29 | dev = amba_device_alloc(name, base, SZ_4K); |
30 | if (!dev) | 30 | if (!dev) |
31 | return ERR_PTR(-ENOMEM); | 31 | return ERR_PTR(-ENOMEM); |
32 | 32 | ||
33 | dev->dev.init_name = name; | ||
34 | |||
35 | dev->res.start = base; | ||
36 | dev->res.end = base + SZ_4K - 1; | ||
37 | dev->res.flags = IORESOURCE_MEM; | ||
38 | |||
39 | dev->dma_mask = DMA_BIT_MASK(32); | 33 | dev->dma_mask = DMA_BIT_MASK(32); |
40 | dev->dev.coherent_dma_mask = DMA_BIT_MASK(32); | 34 | dev->dev.coherent_dma_mask = DMA_BIT_MASK(32); |
41 | 35 | ||
42 | dev->irq[0] = irq; | 36 | dev->irq[0] = irq; |
43 | dev->irq[1] = NO_IRQ; | ||
44 | 37 | ||
45 | dev->periphid = periphid; | 38 | dev->periphid = periphid; |
46 | 39 | ||
47 | dev->dev.platform_data = pdata; | 40 | dev->dev.platform_data = pdata; |
48 | 41 | ||
49 | ret = amba_device_register(dev, &iomem_resource); | 42 | ret = amba_device_add(dev, &iomem_resource); |
50 | if (ret) { | 43 | if (ret) { |
51 | kfree(dev); | 44 | amba_device_put(dev); |
52 | return ERR_PTR(ret); | 45 | return ERR_PTR(ret); |
53 | } | 46 | } |
54 | 47 | ||
diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S deleted file mode 100644 index e16299e1020a..000000000000 --- a/arch/arm/mach-ux500/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * Low-level IRQ helper macros for U8500 platforms | ||
3 | * | ||
4 | * Copyright (C) 2009 ST-Ericsson. | ||
5 | * | ||
6 | * This file is a copy of ARM Realview platform. | ||
7 | * -just satisfied checkpatch script. | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | .macro disable_fiq | ||
15 | .endm | ||
16 | |||
17 | .macro arch_ret_to_user, tmp1, tmp2 | ||
18 | .endm | ||
diff --git a/arch/arm/mach-ux500/include/mach/system.h b/arch/arm/mach-ux500/include/mach/system.h deleted file mode 100644 index 258e5c919c24..000000000000 --- a/arch/arm/mach-ux500/include/mach/system.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 ST-Ericsson. | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | #ifndef __ASM_ARCH_SYSTEM_H | ||
9 | #define __ASM_ARCH_SYSTEM_H | ||
10 | |||
11 | static inline void arch_idle(void) | ||
12 | { | ||
13 | /* | ||
14 | * This should do all the clock switching | ||
15 | * and wait for interrupt tricks | ||
16 | */ | ||
17 | cpu_do_idle(); | ||
18 | } | ||
19 | |||
20 | #endif | ||
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 02b7b9303f3b..4f352e45be0a 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c | |||
@@ -582,58 +582,58 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
582 | .num_chipselect = 1, | 582 | .num_chipselect = 1, |
583 | }; | 583 | }; |
584 | 584 | ||
585 | #define AACI_IRQ { IRQ_AACI, NO_IRQ } | 585 | #define AACI_IRQ { IRQ_AACI } |
586 | #define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } | 586 | #define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } |
587 | #define KMI0_IRQ { IRQ_SIC_KMI0, NO_IRQ } | 587 | #define KMI0_IRQ { IRQ_SIC_KMI0 } |
588 | #define KMI1_IRQ { IRQ_SIC_KMI1, NO_IRQ } | 588 | #define KMI1_IRQ { IRQ_SIC_KMI1 } |
589 | 589 | ||
590 | /* | 590 | /* |
591 | * These devices are connected directly to the multi-layer AHB switch | 591 | * These devices are connected directly to the multi-layer AHB switch |
592 | */ | 592 | */ |
593 | #define SMC_IRQ { NO_IRQ, NO_IRQ } | 593 | #define SMC_IRQ { } |
594 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 594 | #define MPMC_IRQ { } |
595 | #define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ } | 595 | #define CLCD_IRQ { IRQ_CLCDINT } |
596 | #define DMAC_IRQ { IRQ_DMAINT, NO_IRQ } | 596 | #define DMAC_IRQ { IRQ_DMAINT } |
597 | 597 | ||
598 | /* | 598 | /* |
599 | * These devices are connected via the core APB bridge | 599 | * These devices are connected via the core APB bridge |
600 | */ | 600 | */ |
601 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 601 | #define SCTL_IRQ { } |
602 | #define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ } | 602 | #define WATCHDOG_IRQ { IRQ_WDOGINT } |
603 | #define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ } | 603 | #define GPIO0_IRQ { IRQ_GPIOINT0 } |
604 | #define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ } | 604 | #define GPIO1_IRQ { IRQ_GPIOINT1 } |
605 | #define RTC_IRQ { IRQ_RTCINT, NO_IRQ } | 605 | #define RTC_IRQ { IRQ_RTCINT } |
606 | 606 | ||
607 | /* | 607 | /* |
608 | * These devices are connected via the DMA APB bridge | 608 | * These devices are connected via the DMA APB bridge |
609 | */ | 609 | */ |
610 | #define SCI_IRQ { IRQ_SCIINT, NO_IRQ } | 610 | #define SCI_IRQ { IRQ_SCIINT } |
611 | #define UART0_IRQ { IRQ_UARTINT0, NO_IRQ } | 611 | #define UART0_IRQ { IRQ_UARTINT0 } |
612 | #define UART1_IRQ { IRQ_UARTINT1, NO_IRQ } | 612 | #define UART1_IRQ { IRQ_UARTINT1 } |
613 | #define UART2_IRQ { IRQ_UARTINT2, NO_IRQ } | 613 | #define UART2_IRQ { IRQ_UARTINT2 } |
614 | #define SSP_IRQ { IRQ_SSPINT, NO_IRQ } | 614 | #define SSP_IRQ { IRQ_SSPINT } |
615 | 615 | ||
616 | /* FPGA Primecells */ | 616 | /* FPGA Primecells */ |
617 | AMBA_DEVICE(aaci, "fpga:04", AACI, NULL); | 617 | APB_DEVICE(aaci, "fpga:04", AACI, NULL); |
618 | AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &mmc0_plat_data); | 618 | APB_DEVICE(mmc0, "fpga:05", MMCI0, &mmc0_plat_data); |
619 | AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL); | 619 | APB_DEVICE(kmi0, "fpga:06", KMI0, NULL); |
620 | AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL); | 620 | APB_DEVICE(kmi1, "fpga:07", KMI1, NULL); |
621 | 621 | ||
622 | /* DevChip Primecells */ | 622 | /* DevChip Primecells */ |
623 | AMBA_DEVICE(smc, "dev:00", SMC, NULL); | 623 | AHB_DEVICE(smc, "dev:00", SMC, NULL); |
624 | AMBA_DEVICE(mpmc, "dev:10", MPMC, NULL); | 624 | AHB_DEVICE(mpmc, "dev:10", MPMC, NULL); |
625 | AMBA_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data); | 625 | AHB_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data); |
626 | AMBA_DEVICE(dmac, "dev:30", DMAC, NULL); | 626 | AHB_DEVICE(dmac, "dev:30", DMAC, NULL); |
627 | AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL); | 627 | APB_DEVICE(sctl, "dev:e0", SCTL, NULL); |
628 | AMBA_DEVICE(wdog, "dev:e1", WATCHDOG, NULL); | 628 | APB_DEVICE(wdog, "dev:e1", WATCHDOG, NULL); |
629 | AMBA_DEVICE(gpio0, "dev:e4", GPIO0, &gpio0_plat_data); | 629 | APB_DEVICE(gpio0, "dev:e4", GPIO0, &gpio0_plat_data); |
630 | AMBA_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data); | 630 | APB_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data); |
631 | AMBA_DEVICE(rtc, "dev:e8", RTC, NULL); | 631 | APB_DEVICE(rtc, "dev:e8", RTC, NULL); |
632 | AMBA_DEVICE(sci0, "dev:f0", SCI, NULL); | 632 | APB_DEVICE(sci0, "dev:f0", SCI, NULL); |
633 | AMBA_DEVICE(uart0, "dev:f1", UART0, NULL); | 633 | APB_DEVICE(uart0, "dev:f1", UART0, NULL); |
634 | AMBA_DEVICE(uart1, "dev:f2", UART1, NULL); | 634 | APB_DEVICE(uart1, "dev:f2", UART1, NULL); |
635 | AMBA_DEVICE(uart2, "dev:f3", UART2, NULL); | 635 | APB_DEVICE(uart2, "dev:f3", UART2, NULL); |
636 | AMBA_DEVICE(ssp0, "dev:f4", SSP, &ssp0_plat_data); | 636 | APB_DEVICE(ssp0, "dev:f4", SSP, &ssp0_plat_data); |
637 | 637 | ||
638 | static struct amba_device *amba_devs[] __initdata = { | 638 | static struct amba_device *amba_devs[] __initdata = { |
639 | &dmac_device, | 639 | &dmac_device, |
diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h index 2ef2f555f315..683e60776a85 100644 --- a/arch/arm/mach-versatile/core.h +++ b/arch/arm/mach-versatile/core.h | |||
@@ -36,20 +36,10 @@ extern unsigned int mmc_status(struct device *dev); | |||
36 | extern struct of_dev_auxdata versatile_auxdata_lookup[]; | 36 | extern struct of_dev_auxdata versatile_auxdata_lookup[]; |
37 | #endif | 37 | #endif |
38 | 38 | ||
39 | #define AMBA_DEVICE(name,busid,base,plat) \ | 39 | #define APB_DEVICE(name, busid, base, plat) \ |
40 | static struct amba_device name##_device = { \ | 40 | static AMBA_APB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat) |
41 | .dev = { \ | 41 | |
42 | .coherent_dma_mask = ~0, \ | 42 | #define AHB_DEVICE(name, busid, base, plat) \ |
43 | .init_name = busid, \ | 43 | static AMBA_AHB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat) |
44 | .platform_data = plat, \ | ||
45 | }, \ | ||
46 | .res = { \ | ||
47 | .start = VERSATILE_##base##_BASE, \ | ||
48 | .end = (VERSATILE_##base##_BASE) + SZ_4K - 1,\ | ||
49 | .flags = IORESOURCE_MEM, \ | ||
50 | }, \ | ||
51 | .dma_mask = ~0, \ | ||
52 | .irq = base##_IRQ, \ | ||
53 | } | ||
54 | 44 | ||
55 | #endif | 45 | #endif |
diff --git a/arch/arm/mach-versatile/include/mach/entry-macro.S b/arch/arm/mach-versatile/include/mach/entry-macro.S deleted file mode 100644 index b6f0dbf122ee..000000000000 --- a/arch/arm/mach-versatile/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-versatile/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for Versatile platforms | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro arch_ret_to_user, tmp1, tmp2 | ||
15 | .endm | ||
diff --git a/arch/arm/mach-versatile/include/mach/system.h b/arch/arm/mach-versatile/include/mach/system.h deleted file mode 100644 index f3fa347895f0..000000000000 --- a/arch/arm/mach-versatile/include/mach/system.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-versatile/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2003 ARM Limited | ||
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #ifndef __ASM_ARCH_SYSTEM_H | ||
22 | #define __ASM_ARCH_SYSTEM_H | ||
23 | |||
24 | static inline void arch_idle(void) | ||
25 | { | ||
26 | /* | ||
27 | * This should do all the clock switching | ||
28 | * and wait for interrupt tricks | ||
29 | */ | ||
30 | cpu_do_idle(); | ||
31 | } | ||
32 | |||
33 | #endif | ||
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c index 9581c197500c..19738331bd3d 100644 --- a/arch/arm/mach-versatile/versatile_pb.c +++ b/arch/arm/mach-versatile/versatile_pb.c | |||
@@ -58,28 +58,28 @@ static struct pl061_platform_data gpio3_plat_data = { | |||
58 | .irq_base = IRQ_GPIO3_START, | 58 | .irq_base = IRQ_GPIO3_START, |
59 | }; | 59 | }; |
60 | 60 | ||
61 | #define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ } | 61 | #define UART3_IRQ { IRQ_SIC_UART3 } |
62 | #define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ } | 62 | #define SCI1_IRQ { IRQ_SIC_SCI3 } |
63 | #define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } | 63 | #define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } |
64 | 64 | ||
65 | /* | 65 | /* |
66 | * These devices are connected via the core APB bridge | 66 | * These devices are connected via the core APB bridge |
67 | */ | 67 | */ |
68 | #define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ } | 68 | #define GPIO2_IRQ { IRQ_GPIOINT2 } |
69 | #define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ } | 69 | #define GPIO3_IRQ { IRQ_GPIOINT3 } |
70 | 70 | ||
71 | /* | 71 | /* |
72 | * These devices are connected via the DMA APB bridge | 72 | * These devices are connected via the DMA APB bridge |
73 | */ | 73 | */ |
74 | 74 | ||
75 | /* FPGA Primecells */ | 75 | /* FPGA Primecells */ |
76 | AMBA_DEVICE(uart3, "fpga:09", UART3, NULL); | 76 | APB_DEVICE(uart3, "fpga:09", UART3, NULL); |
77 | AMBA_DEVICE(sci1, "fpga:0a", SCI1, NULL); | 77 | APB_DEVICE(sci1, "fpga:0a", SCI1, NULL); |
78 | AMBA_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data); | 78 | APB_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data); |
79 | 79 | ||
80 | /* DevChip Primecells */ | 80 | /* DevChip Primecells */ |
81 | AMBA_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data); | 81 | APB_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data); |
82 | AMBA_DEVICE(gpio3, "dev:e7", GPIO3, &gpio3_plat_data); | 82 | APB_DEVICE(gpio3, "dev:e7", GPIO3, &gpio3_plat_data); |
83 | 83 | ||
84 | static struct amba_device *amba_devs[] __initdata = { | 84 | static struct amba_device *amba_devs[] __initdata = { |
85 | &uart3_device, | 85 | &uart3_device, |
diff --git a/arch/arm/mach-vexpress/core.h b/arch/arm/mach-vexpress/core.h index f4397159c173..9f0f2827c711 100644 --- a/arch/arm/mach-vexpress/core.h +++ b/arch/arm/mach-vexpress/core.h | |||
@@ -1,19 +1,2 @@ | |||
1 | #define __MMIO_P2V(x) (((x) & 0xfffff) | (((x) & 0x0f000000) >> 4) | 0xf8000000) | 1 | #define __MMIO_P2V(x) (((x) & 0xfffff) | (((x) & 0x0f000000) >> 4) | 0xf8000000) |
2 | #define MMIO_P2V(x) ((void __iomem *)__MMIO_P2V(x)) | 2 | #define MMIO_P2V(x) ((void __iomem *)__MMIO_P2V(x)) |
3 | |||
4 | #define AMBA_DEVICE(name,busid,base,plat) \ | ||
5 | struct amba_device name##_device = { \ | ||
6 | .dev = { \ | ||
7 | .coherent_dma_mask = ~0UL, \ | ||
8 | .init_name = busid, \ | ||
9 | .platform_data = plat, \ | ||
10 | }, \ | ||
11 | .res = { \ | ||
12 | .start = base, \ | ||
13 | .end = base + SZ_4K - 1, \ | ||
14 | .flags = IORESOURCE_MEM, \ | ||
15 | }, \ | ||
16 | .dma_mask = ~0UL, \ | ||
17 | .irq = IRQ_##base, \ | ||
18 | /* .dma = DMA_##base,*/ \ | ||
19 | } | ||
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index b1e87c184e54..1b1d2e4892b9 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c | |||
@@ -109,10 +109,10 @@ static struct clcd_board ct_ca9x4_clcd_data = { | |||
109 | .remove = versatile_clcd_remove_dma, | 109 | .remove = versatile_clcd_remove_dma, |
110 | }; | 110 | }; |
111 | 111 | ||
112 | static AMBA_DEVICE(clcd, "ct:clcd", CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data); | 112 | static AMBA_AHB_DEVICE(clcd, "ct:clcd", 0, CT_CA9X4_CLCDC, IRQ_CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data); |
113 | static AMBA_DEVICE(dmc, "ct:dmc", CT_CA9X4_DMC, NULL); | 113 | static AMBA_APB_DEVICE(dmc, "ct:dmc", 0, CT_CA9X4_DMC, IRQ_CT_CA9X4_DMC, NULL); |
114 | static AMBA_DEVICE(smc, "ct:smc", CT_CA9X4_SMC, NULL); | 114 | static AMBA_APB_DEVICE(smc, "ct:smc", 0, CT_CA9X4_SMC, IRQ_CT_CA9X4_SMC, NULL); |
115 | static AMBA_DEVICE(gpio, "ct:gpio", CT_CA9X4_GPIO, NULL); | 115 | static AMBA_APB_DEVICE(gpio, "ct:gpio", 0, CT_CA9X4_GPIO, IRQ_CT_CA9X4_GPIO, NULL); |
116 | 116 | ||
117 | static struct amba_device *ct_ca9x4_amba_devs[] __initdata = { | 117 | static struct amba_device *ct_ca9x4_amba_devs[] __initdata = { |
118 | &clcd_device, | 118 | &clcd_device, |
diff --git a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h index a34d3d4faae1..a40468f3b938 100644 --- a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h +++ b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h | |||
@@ -35,7 +35,7 @@ | |||
35 | * Interrupts. Those in {} are for AMBA devices | 35 | * Interrupts. Those in {} are for AMBA devices |
36 | */ | 36 | */ |
37 | #define IRQ_CT_CA9X4_CLCDC { 76 } | 37 | #define IRQ_CT_CA9X4_CLCDC { 76 } |
38 | #define IRQ_CT_CA9X4_DMC { -1 } | 38 | #define IRQ_CT_CA9X4_DMC { 0 } |
39 | #define IRQ_CT_CA9X4_SMC { 77, 78 } | 39 | #define IRQ_CT_CA9X4_SMC { 77, 78 } |
40 | #define IRQ_CT_CA9X4_TIMER0 80 | 40 | #define IRQ_CT_CA9X4_TIMER0 80 |
41 | #define IRQ_CT_CA9X4_TIMER1 81 | 41 | #define IRQ_CT_CA9X4_TIMER1 81 |
diff --git a/arch/arm/mach-vexpress/include/mach/entry-macro.S b/arch/arm/mach-vexpress/include/mach/entry-macro.S deleted file mode 100644 index a14f9e62ca92..000000000000 --- a/arch/arm/mach-vexpress/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | .macro disable_fiq | ||
2 | .endm | ||
3 | |||
4 | .macro arch_ret_to_user, tmp1, tmp2 | ||
5 | .endm | ||
diff --git a/arch/arm/mach-vexpress/include/mach/system.h b/arch/arm/mach-vexpress/include/mach/system.h deleted file mode 100644 index f653a8e265bd..000000000000 --- a/arch/arm/mach-vexpress/include/mach/system.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vexpress/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2003 ARM Limited | ||
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #ifndef __ASM_ARCH_SYSTEM_H | ||
22 | #define __ASM_ARCH_SYSTEM_H | ||
23 | |||
24 | static inline void arch_idle(void) | ||
25 | { | ||
26 | /* | ||
27 | * This should do all the clock switching | ||
28 | * and wait for interrupt tricks | ||
29 | */ | ||
30 | cpu_do_idle(); | ||
31 | } | ||
32 | |||
33 | #endif | ||
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c index b4a28ca0e50a..ad64f97a2003 100644 --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c | |||
@@ -266,16 +266,16 @@ static struct mmci_platform_data v2m_mmci_data = { | |||
266 | .status = v2m_mmci_status, | 266 | .status = v2m_mmci_status, |
267 | }; | 267 | }; |
268 | 268 | ||
269 | static AMBA_DEVICE(aaci, "mb:aaci", V2M_AACI, NULL); | 269 | static AMBA_APB_DEVICE(aaci, "mb:aaci", 0, V2M_AACI, IRQ_V2M_AACI, NULL); |
270 | static AMBA_DEVICE(mmci, "mb:mmci", V2M_MMCI, &v2m_mmci_data); | 270 | static AMBA_APB_DEVICE(mmci, "mb:mmci", 0, V2M_MMCI, IRQ_V2M_MMCI, &v2m_mmci_data); |
271 | static AMBA_DEVICE(kmi0, "mb:kmi0", V2M_KMI0, NULL); | 271 | static AMBA_APB_DEVICE(kmi0, "mb:kmi0", 0, V2M_KMI0, IRQ_V2M_KMI0, NULL); |
272 | static AMBA_DEVICE(kmi1, "mb:kmi1", V2M_KMI1, NULL); | 272 | static AMBA_APB_DEVICE(kmi1, "mb:kmi1", 0, V2M_KMI1, IRQ_V2M_KMI1, NULL); |
273 | static AMBA_DEVICE(uart0, "mb:uart0", V2M_UART0, NULL); | 273 | static AMBA_APB_DEVICE(uart0, "mb:uart0", 0, V2M_UART0, IRQ_V2M_UART0, NULL); |
274 | static AMBA_DEVICE(uart1, "mb:uart1", V2M_UART1, NULL); | 274 | static AMBA_APB_DEVICE(uart1, "mb:uart1", 0, V2M_UART1, IRQ_V2M_UART1, NULL); |
275 | static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL); | 275 | static AMBA_APB_DEVICE(uart2, "mb:uart2", 0, V2M_UART2, IRQ_V2M_UART2, NULL); |
276 | static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL); | 276 | static AMBA_APB_DEVICE(uart3, "mb:uart3", 0, V2M_UART3, IRQ_V2M_UART3, NULL); |
277 | static AMBA_DEVICE(wdt, "mb:wdt", V2M_WDT, NULL); | 277 | static AMBA_APB_DEVICE(wdt, "mb:wdt", 0, V2M_WDT, IRQ_V2M_WDT, NULL); |
278 | static AMBA_DEVICE(rtc, "mb:rtc", V2M_RTC, NULL); | 278 | static AMBA_APB_DEVICE(rtc, "mb:rtc", 0, V2M_RTC, IRQ_V2M_RTC, NULL); |
279 | 279 | ||
280 | static struct amba_device *v2m_amba_devs[] __initdata = { | 280 | static struct amba_device *v2m_amba_devs[] __initdata = { |
281 | &aaci_device, | 281 | &aaci_device, |
diff --git a/arch/arm/mach-vt8500/include/mach/entry-macro.S b/arch/arm/mach-vt8500/include/mach/entry-macro.S index 92684c7eaed3..367d1b55fb9a 100644 --- a/arch/arm/mach-vt8500/include/mach/entry-macro.S +++ b/arch/arm/mach-vt8500/include/mach/entry-macro.S | |||
@@ -8,18 +8,12 @@ | |||
8 | * warranty of any kind, whether express or implied. | 8 | * warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro get_irqnr_preamble, base, tmp | 11 | .macro get_irqnr_preamble, base, tmp |
15 | @ physical 0xd8140000 is virtual 0xf8140000 | 12 | @ physical 0xd8140000 is virtual 0xf8140000 |
16 | mov \base, #0xf8000000 | 13 | mov \base, #0xf8000000 |
17 | orr \base, \base, #0x00140000 | 14 | orr \base, \base, #0x00140000 |
18 | .endm | 15 | .endm |
19 | 16 | ||
20 | .macro arch_ret_to_user, tmp1, tmp2 | ||
21 | .endm | ||
22 | |||
23 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 17 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
24 | ldr \irqnr, [\base] | 18 | ldr \irqnr, [\base] |
25 | cmp \irqnr, #63 @ may be false positive, check interrupt status | 19 | cmp \irqnr, #63 @ may be false positive, check interrupt status |
diff --git a/arch/arm/mach-vt8500/include/mach/system.h b/arch/arm/mach-vt8500/include/mach/system.h index d6c757eaf26b..58fa8010ee61 100644 --- a/arch/arm/mach-vt8500/include/mach/system.h +++ b/arch/arm/mach-vt8500/include/mach/system.h | |||
@@ -7,11 +7,6 @@ | |||
7 | /* PM Software Reset request register */ | 7 | /* PM Software Reset request register */ |
8 | #define VT8500_PMSR_VIRT 0xf8130060 | 8 | #define VT8500_PMSR_VIRT 0xf8130060 |
9 | 9 | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
14 | |||
15 | static inline void arch_reset(char mode, const char *cmd) | 10 | static inline void arch_reset(char mode, const char *cmd) |
16 | { | 11 | { |
17 | writel(1, VT8500_PMSR_VIRT); | 12 | writel(1, VT8500_PMSR_VIRT); |
diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c index 78110befb7a9..db82568a998a 100644 --- a/arch/arm/mach-w90x900/dev.c +++ b/arch/arm/mach-w90x900/dev.c | |||
@@ -530,6 +530,7 @@ static struct platform_device *nuc900_public_dev[] __initdata = { | |||
530 | 530 | ||
531 | void __init nuc900_board_init(struct platform_device **device, int size) | 531 | void __init nuc900_board_init(struct platform_device **device, int size) |
532 | { | 532 | { |
533 | disable_hlt(); | ||
533 | platform_add_devices(device, size); | 534 | platform_add_devices(device, size); |
534 | platform_add_devices(nuc900_public_dev, ARRAY_SIZE(nuc900_public_dev)); | 535 | platform_add_devices(nuc900_public_dev, ARRAY_SIZE(nuc900_public_dev)); |
535 | spi_register_board_info(nuc900_spi_board_info, | 536 | spi_register_board_info(nuc900_spi_board_info, |
diff --git a/arch/arm/mach-w90x900/include/mach/entry-macro.S b/arch/arm/mach-w90x900/include/mach/entry-macro.S index d39aca5be9ee..e286daca6827 100644 --- a/arch/arm/mach-w90x900/include/mach/entry-macro.S +++ b/arch/arm/mach-w90x900/include/mach/entry-macro.S | |||
@@ -15,9 +15,6 @@ | |||
15 | .macro get_irqnr_preamble, base, tmp | 15 | .macro get_irqnr_preamble, base, tmp |
16 | .endm | 16 | .endm |
17 | 17 | ||
18 | .macro arch_ret_to_user, tmp1, tmp2 | ||
19 | .endm | ||
20 | |||
21 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 18 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
22 | 19 | ||
23 | mov \base, #AIC_BA | 20 | mov \base, #AIC_BA |
@@ -27,8 +24,3 @@ | |||
27 | cmp \irqnr, #0 | 24 | cmp \irqnr, #0 |
28 | 25 | ||
29 | .endm | 26 | .endm |
30 | |||
31 | /* currently don't need an disable_fiq macro */ | ||
32 | |||
33 | .macro disable_fiq | ||
34 | .endm | ||
diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h deleted file mode 100644 index 2aaeb9311619..000000000000 --- a/arch/arm/mach-w90x900/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-w90x900/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (c) 2008 Nuvoton technology corporation | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * Wan ZongShun <mcuos.com@gmail.com> | ||
8 | * | ||
9 | * Based on arch/arm/mach-s3c2410/include/mach/system.h | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License as published by | ||
13 | * the Free Software Foundation; either version 2 of the License, or | ||
14 | * (at your option) any later version. | ||
15 | * | ||
16 | */ | ||
17 | static void arch_idle(void) | ||
18 | { | ||
19 | } | ||
diff --git a/arch/arm/mach-zynq/include/mach/entry-macro.S b/arch/arm/mach-zynq/include/mach/entry-macro.S deleted file mode 100644 index d621fb732569..000000000000 --- a/arch/arm/mach-zynq/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-zynq/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros | ||
5 | * | ||
6 | * Copyright (C) 2011 Xilinx | ||
7 | * | ||
8 | * based on arch/plat-mxc/include/mach/entry-macro.S | ||
9 | * | ||
10 | * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org> | ||
11 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
12 | * | ||
13 | * This software is licensed under the terms of the GNU General Public | ||
14 | * License version 2, as published by the Free Software Foundation, and | ||
15 | * may be copied, distributed, and modified under those terms. | ||
16 | * | ||
17 | * This program is distributed in the hope that it will be useful, | ||
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
20 | * GNU General Public License for more details. | ||
21 | */ | ||
22 | |||
23 | .macro disable_fiq | ||
24 | .endm | ||
25 | |||
26 | .macro arch_ret_to_user, tmp1, tmp2 | ||
27 | .endm | ||
diff --git a/arch/arm/mach-zynq/include/mach/system.h b/arch/arm/mach-zynq/include/mach/system.h deleted file mode 100644 index 8e88e0b8d2ba..000000000000 --- a/arch/arm/mach-zynq/include/mach/system.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* arch/arm/mach-zynq/include/mach/system.h | ||
2 | * | ||
3 | * Copyright (C) 2011 Xilinx | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | */ | ||
14 | |||
15 | #ifndef __MACH_SYSTEM_H__ | ||
16 | #define __MACH_SYSTEM_H__ | ||
17 | |||
18 | static inline void arch_idle(void) | ||
19 | { | ||
20 | cpu_do_idle(); | ||
21 | } | ||
22 | |||
23 | #endif | ||
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 1a3ca2488164..7edef9121632 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig | |||
@@ -631,7 +631,8 @@ comment "Processor Features" | |||
631 | 631 | ||
632 | config ARM_LPAE | 632 | config ARM_LPAE |
633 | bool "Support for the Large Physical Address Extension" | 633 | bool "Support for the Large Physical Address Extension" |
634 | depends on MMU && CPU_V7 | 634 | depends on MMU && CPU_32v7 && !CPU_32v6 && !CPU_32v5 && \ |
635 | !CPU_32v4 && !CPU_32v3 | ||
635 | help | 636 | help |
636 | Say Y if you have an ARMv7 processor supporting the LPAE page | 637 | Say Y if you have an ARMv7 processor supporting the LPAE page |
637 | table format and you would like to access memory beyond the | 638 | table format and you would like to access memory beyond the |
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index 7a24d39661f0..a655d3da386d 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S | |||
@@ -55,7 +55,7 @@ loop1: | |||
55 | cmp r1, #2 @ see what cache we have at this level | 55 | cmp r1, #2 @ see what cache we have at this level |
56 | blt skip @ skip if no cache, or just i-cache | 56 | blt skip @ skip if no cache, or just i-cache |
57 | #ifdef CONFIG_PREEMPT | 57 | #ifdef CONFIG_PREEMPT |
58 | save_and_disable_irqs r9 @ make cssr&csidr read atomic | 58 | save_and_disable_irqs_notrace r9 @ make cssr&csidr read atomic |
59 | #endif | 59 | #endif |
60 | mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr | 60 | mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr |
61 | isb @ isb to sych the new cssr&csidr | 61 | isb @ isb to sych the new cssr&csidr |
diff --git a/arch/arm/plat-mxc/audmux-v1.c b/arch/arm/plat-mxc/audmux-v1.c index 1180bef7664b..14a3c0486750 100644 --- a/arch/arm/plat-mxc/audmux-v1.c +++ b/arch/arm/plat-mxc/audmux-v1.c | |||
@@ -46,16 +46,13 @@ EXPORT_SYMBOL_GPL(mxc_audmux_v1_configure_port); | |||
46 | 46 | ||
47 | static int mxc_audmux_v1_init(void) | 47 | static int mxc_audmux_v1_init(void) |
48 | { | 48 | { |
49 | #ifdef CONFIG_MACH_MX21 | ||
50 | if (cpu_is_mx21()) | 49 | if (cpu_is_mx21()) |
51 | audmux_base = MX21_IO_ADDRESS(MX21_AUDMUX_BASE_ADDR); | 50 | audmux_base = MX21_IO_ADDRESS(MX21_AUDMUX_BASE_ADDR); |
52 | else | 51 | else |
53 | #endif | 52 | |
54 | #ifdef CONFIG_MACH_MX27 | ||
55 | if (cpu_is_mx27()) | 53 | if (cpu_is_mx27()) |
56 | audmux_base = MX27_IO_ADDRESS(MX27_AUDMUX_BASE_ADDR); | 54 | audmux_base = MX27_IO_ADDRESS(MX27_AUDMUX_BASE_ADDR); |
57 | else | 55 | else |
58 | #endif | ||
59 | (void)0; | 56 | (void)0; |
60 | 57 | ||
61 | return 0; | 58 | return 0; |
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c index 55f15699a383..689f81f9593b 100644 --- a/arch/arm/plat-mxc/avic.c +++ b/arch/arm/plat-mxc/avic.c | |||
@@ -60,7 +60,7 @@ static int avic_irq_set_priority(unsigned char irq, unsigned char prio) | |||
60 | unsigned int mask = 0x0F << irq % 8 * 4; | 60 | unsigned int mask = 0x0F << irq % 8 * 4; |
61 | 61 | ||
62 | if (irq >= AVIC_NUM_IRQS) | 62 | if (irq >= AVIC_NUM_IRQS) |
63 | return -EINVAL;; | 63 | return -EINVAL; |
64 | 64 | ||
65 | temp = __raw_readl(avic_base + AVIC_NIPRIORITY(irq / 8)); | 65 | temp = __raw_readl(avic_base + AVIC_NIPRIORITY(irq / 8)); |
66 | temp &= ~mask; | 66 | temp &= ~mask; |
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S deleted file mode 100644 index def5d30cb67e..000000000000 --- a/arch/arm/plat-mxc/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org> | ||
3 | * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. | ||
4 | */ | ||
5 | |||
6 | /* | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro arch_ret_to_user, tmp1, tmp2 | ||
16 | .endm | ||
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h deleted file mode 100644 index 13ad0df2e860..000000000000 --- a/arch/arm/plat-mxc/include/mach/system.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1999 ARM Limited | ||
3 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
4 | * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | */ | ||
16 | |||
17 | #ifndef __ASM_ARCH_MXC_SYSTEM_H__ | ||
18 | #define __ASM_ARCH_MXC_SYSTEM_H__ | ||
19 | |||
20 | static inline void arch_idle(void) | ||
21 | { | ||
22 | cpu_do_idle(); | ||
23 | } | ||
24 | |||
25 | #endif /* __ASM_ARCH_MXC_SYSTEM_H__ */ | ||
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c index 5f0f2292b7fb..5068fe5a6910 100644 --- a/arch/arm/plat-omap/counter_32k.c +++ b/arch/arm/plat-omap/counter_32k.c | |||
@@ -21,6 +21,7 @@ | |||
21 | 21 | ||
22 | #include <asm/sched_clock.h> | 22 | #include <asm/sched_clock.h> |
23 | 23 | ||
24 | #include <plat/hardware.h> | ||
24 | #include <plat/common.h> | 25 | #include <plat/common.h> |
25 | #include <plat/board.h> | 26 | #include <plat/board.h> |
26 | 27 | ||
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 002fb4d96bbc..95c3ed693f65 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
@@ -164,6 +164,8 @@ static inline void set_gdma_dev(int req, int dev) | |||
164 | } | 164 | } |
165 | #else | 165 | #else |
166 | #define set_gdma_dev(req, dev) do {} while (0) | 166 | #define set_gdma_dev(req, dev) do {} while (0) |
167 | #define omap_readl(reg) 0 | ||
168 | #define omap_writel(val, reg) do {} while (0) | ||
167 | #endif | 169 | #endif |
168 | 170 | ||
169 | void omap_set_dma_priority(int lch, int dst_port, int priority) | 171 | void omap_set_dma_priority(int lch, int dst_port, int priority) |
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index af3b92be8459..2678260d9feb 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c | |||
@@ -43,6 +43,8 @@ | |||
43 | 43 | ||
44 | #include <plat/dmtimer.h> | 44 | #include <plat/dmtimer.h> |
45 | 45 | ||
46 | #include <mach/hardware.h> | ||
47 | |||
46 | static LIST_HEAD(omap_timer_list); | 48 | static LIST_HEAD(omap_timer_list); |
47 | static DEFINE_SPINLOCK(dm_timer_lock); | 49 | static DEFINE_SPINLOCK(dm_timer_lock); |
48 | 50 | ||
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h index 9e86ee0aed0a..cb75b657b04b 100644 --- a/arch/arm/plat-omap/include/plat/gpio.h +++ b/arch/arm/plat-omap/include/plat/gpio.h | |||
@@ -162,13 +162,6 @@ | |||
162 | IH_MPUIO_BASE + ((nr) & 0x0f) : \ | 162 | IH_MPUIO_BASE + ((nr) & 0x0f) : \ |
163 | IH_GPIO_BASE + (nr)) | 163 | IH_GPIO_BASE + (nr)) |
164 | 164 | ||
165 | #define METHOD_MPUIO 0 | ||
166 | #define METHOD_GPIO_1510 1 | ||
167 | #define METHOD_GPIO_1610 2 | ||
168 | #define METHOD_GPIO_7XX 3 | ||
169 | #define METHOD_GPIO_24XX 5 | ||
170 | #define METHOD_GPIO_44XX 6 | ||
171 | |||
172 | struct omap_gpio_dev_attr { | 165 | struct omap_gpio_dev_attr { |
173 | int bank_width; /* GPIO bank width */ | 166 | int bank_width; /* GPIO bank width */ |
174 | bool dbck_flag; /* dbck required or not - True for OMAP3&4 */ | 167 | bool dbck_flag; /* dbck required or not - True for OMAP3&4 */ |
@@ -184,10 +177,21 @@ struct omap_gpio_reg_offs { | |||
184 | u16 irqstatus; | 177 | u16 irqstatus; |
185 | u16 irqstatus2; | 178 | u16 irqstatus2; |
186 | u16 irqenable; | 179 | u16 irqenable; |
180 | u16 irqenable2; | ||
187 | u16 set_irqenable; | 181 | u16 set_irqenable; |
188 | u16 clr_irqenable; | 182 | u16 clr_irqenable; |
189 | u16 debounce; | 183 | u16 debounce; |
190 | u16 debounce_en; | 184 | u16 debounce_en; |
185 | u16 ctrl; | ||
186 | u16 wkup_en; | ||
187 | u16 leveldetect0; | ||
188 | u16 leveldetect1; | ||
189 | u16 risingdetect; | ||
190 | u16 fallingdetect; | ||
191 | u16 irqctrl; | ||
192 | u16 edgectrl1; | ||
193 | u16 edgectrl2; | ||
194 | u16 pinctrl; | ||
191 | 195 | ||
192 | bool irqenable_inv; | 196 | bool irqenable_inv; |
193 | }; | 197 | }; |
@@ -198,19 +202,20 @@ struct omap_gpio_platform_data { | |||
198 | int bank_width; /* GPIO bank width */ | 202 | int bank_width; /* GPIO bank width */ |
199 | int bank_stride; /* Only needed for omap1 MPUIO */ | 203 | int bank_stride; /* Only needed for omap1 MPUIO */ |
200 | bool dbck_flag; /* dbck required or not - True for OMAP3&4 */ | 204 | bool dbck_flag; /* dbck required or not - True for OMAP3&4 */ |
205 | bool loses_context; /* whether the bank would ever lose context */ | ||
206 | bool is_mpuio; /* whether the bank is of type MPUIO */ | ||
207 | u32 non_wakeup_gpios; | ||
201 | 208 | ||
202 | struct omap_gpio_reg_offs *regs; | 209 | struct omap_gpio_reg_offs *regs; |
203 | }; | ||
204 | 210 | ||
205 | /* TODO: Analyze removing gpio_bank_count usage from driver code */ | 211 | /* Return context loss count due to PM states changing */ |
206 | extern int gpio_bank_count; | 212 | int (*get_context_loss_count)(struct device *dev); |
213 | }; | ||
207 | 214 | ||
208 | extern void omap2_gpio_prepare_for_idle(int off_mode); | 215 | extern void omap2_gpio_prepare_for_idle(int off_mode); |
209 | extern void omap2_gpio_resume_after_idle(void); | 216 | extern void omap2_gpio_resume_after_idle(void); |
210 | extern void omap_set_gpio_debounce(int gpio, int enable); | 217 | extern void omap_set_gpio_debounce(int gpio, int enable); |
211 | extern void omap_set_gpio_debounce_time(int gpio, int enable); | 218 | extern void omap_set_gpio_debounce_time(int gpio, int enable); |
212 | extern void omap_gpio_save_context(void); | ||
213 | extern void omap_gpio_restore_context(void); | ||
214 | /*-------------------------------------------------------------------------*/ | 219 | /*-------------------------------------------------------------------------*/ |
215 | 220 | ||
216 | /* Wrappers for "new style" GPIO calls, using the new infrastructure | 221 | /* Wrappers for "new style" GPIO calls, using the new infrastructure |
diff --git a/arch/arm/plat-omap/include/plat/hardware.h b/arch/arm/plat-omap/include/plat/hardware.h index e897978371c2..537b05ae1f51 100644 --- a/arch/arm/plat-omap/include/plat/hardware.h +++ b/arch/arm/plat-omap/include/plat/hardware.h | |||
@@ -43,6 +43,12 @@ | |||
43 | #endif | 43 | #endif |
44 | #include <plat/serial.h> | 44 | #include <plat/serial.h> |
45 | 45 | ||
46 | #ifdef __ASSEMBLER__ | ||
47 | #define IOMEM(x) (x) | ||
48 | #else | ||
49 | #define IOMEM(x) ((void __force __iomem *)(x)) | ||
50 | #endif | ||
51 | |||
46 | /* | 52 | /* |
47 | * --------------------------------------------------------------------------- | 53 | * --------------------------------------------------------------------------- |
48 | * Common definitions for all OMAP processors | 54 | * Common definitions for all OMAP processors |
diff --git a/arch/arm/plat-omap/include/plat/keypad.h b/arch/arm/plat-omap/include/plat/keypad.h index 793ce9d53294..a6b21eddb212 100644 --- a/arch/arm/plat-omap/include/plat/keypad.h +++ b/arch/arm/plat-omap/include/plat/keypad.h | |||
@@ -12,6 +12,8 @@ | |||
12 | 12 | ||
13 | #ifndef CONFIG_ARCH_OMAP1 | 13 | #ifndef CONFIG_ARCH_OMAP1 |
14 | #warning Please update the board to use matrix-keypad driver | 14 | #warning Please update the board to use matrix-keypad driver |
15 | #define omap_readw(reg) 0 | ||
16 | #define omap_writew(val, reg) do {} while (0) | ||
15 | #endif | 17 | #endif |
16 | #include <linux/input/matrix_keypad.h> | 18 | #include <linux/input/matrix_keypad.h> |
17 | 19 | ||
diff --git a/arch/arm/plat-omap/include/plat/mcspi.h b/arch/arm/plat-omap/include/plat/mcspi.h index 3d51b18131cc..a357eb26bd25 100644 --- a/arch/arm/plat-omap/include/plat/mcspi.h +++ b/arch/arm/plat-omap/include/plat/mcspi.h | |||
@@ -18,9 +18,6 @@ struct omap2_mcspi_dev_attr { | |||
18 | 18 | ||
19 | struct omap2_mcspi_device_config { | 19 | struct omap2_mcspi_device_config { |
20 | unsigned turbo_mode:1; | 20 | unsigned turbo_mode:1; |
21 | |||
22 | /* Do we want one channel enabled at the same time? */ | ||
23 | unsigned single_channel:1; | ||
24 | }; | 21 | }; |
25 | 22 | ||
26 | #endif | 23 | #endif |
diff --git a/arch/arm/plat-omap/include/plat/omap_device.h b/arch/arm/plat-omap/include/plat/omap_device.h index 51423d2727a5..4327b2c90c3d 100644 --- a/arch/arm/plat-omap/include/plat/omap_device.h +++ b/arch/arm/plat-omap/include/plat/omap_device.h | |||
@@ -36,7 +36,7 @@ | |||
36 | 36 | ||
37 | #include <plat/omap_hwmod.h> | 37 | #include <plat/omap_hwmod.h> |
38 | 38 | ||
39 | extern struct device omap_device_parent; | 39 | extern struct dev_pm_domain omap_device_pm_domain; |
40 | 40 | ||
41 | /* omap_device._state values */ | 41 | /* omap_device._state values */ |
42 | #define OMAP_DEVICE_STATE_UNKNOWN 0 | 42 | #define OMAP_DEVICE_STATE_UNKNOWN 0 |
@@ -100,6 +100,13 @@ struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id, | |||
100 | struct omap_device_pm_latency *pm_lats, | 100 | struct omap_device_pm_latency *pm_lats, |
101 | int pm_lats_cnt, int is_early_device); | 101 | int pm_lats_cnt, int is_early_device); |
102 | 102 | ||
103 | struct omap_device *omap_device_alloc(struct platform_device *pdev, | ||
104 | struct omap_hwmod **ohs, int oh_cnt, | ||
105 | struct omap_device_pm_latency *pm_lats, | ||
106 | int pm_lats_cnt); | ||
107 | void omap_device_delete(struct omap_device *od); | ||
108 | int omap_device_register(struct platform_device *pdev); | ||
109 | |||
103 | void __iomem *omap_device_get_rt_va(struct omap_device *od); | 110 | void __iomem *omap_device_get_rt_va(struct omap_device *od); |
104 | struct device *omap_device_get_by_hwmod_name(const char *oh_name); | 111 | struct device *omap_device_get_by_hwmod_name(const char *oh_name); |
105 | 112 | ||
diff --git a/arch/arm/plat-omap/include/plat/system.h b/arch/arm/plat-omap/include/plat/system.h deleted file mode 100644 index 8e5ebd74b129..000000000000 --- a/arch/arm/plat-omap/include/plat/system.h +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* | ||
2 | * Copied from arch/arm/mach-sa1100/include/mach/system.h | ||
3 | * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net> | ||
4 | */ | ||
5 | #ifndef __ASM_ARCH_SYSTEM_H | ||
6 | #define __ASM_ARCH_SYSTEM_H | ||
7 | |||
8 | #include <asm/proc-fns.h> | ||
9 | |||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
14 | |||
15 | #endif | ||
diff --git a/arch/arm/plat-omap/include/plat/tc.h b/arch/arm/plat-omap/include/plat/tc.h index d2fcd789bb9a..1b4b2da86203 100644 --- a/arch/arm/plat-omap/include/plat/tc.h +++ b/arch/arm/plat-omap/include/plat/tc.h | |||
@@ -84,23 +84,6 @@ | |||
84 | #define EMIFS_CCS(n) (EMIFS_CS0_CONFIG + (4 * (n))) | 84 | #define EMIFS_CCS(n) (EMIFS_CS0_CONFIG + (4 * (n))) |
85 | #define EMIFS_ACS(n) (EMIFS_ACS0 + (4 * (n))) | 85 | #define EMIFS_ACS(n) (EMIFS_ACS0 + (4 * (n))) |
86 | 86 | ||
87 | /* Almost all documentation for chip and board memory maps assumes | ||
88 | * BM is clear. Most devel boards have a switch to control booting | ||
89 | * from NOR flash (using external chipselect 3) rather than mask ROM, | ||
90 | * which uses BM to interchange the physical CS0 and CS3 addresses. | ||
91 | */ | ||
92 | static inline u32 omap_cs0_phys(void) | ||
93 | { | ||
94 | return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM) | ||
95 | ? OMAP_CS3_PHYS : 0; | ||
96 | } | ||
97 | |||
98 | static inline u32 omap_cs3_phys(void) | ||
99 | { | ||
100 | return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM) | ||
101 | ? 0 : OMAP_CS3_PHYS; | ||
102 | } | ||
103 | |||
104 | #endif /* __ASSEMBLER__ */ | 87 | #endif /* __ASSEMBLER__ */ |
105 | 88 | ||
106 | #endif /* __ASM_ARCH_TC_H */ | 89 | #endif /* __ASM_ARCH_TC_H */ |
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h index dc864b580da0..d0fc9f4dc155 100644 --- a/arch/arm/plat-omap/include/plat/usb.h +++ b/arch/arm/plat-omap/include/plat/usb.h | |||
@@ -3,6 +3,7 @@ | |||
3 | #ifndef __ASM_ARCH_OMAP_USB_H | 3 | #ifndef __ASM_ARCH_OMAP_USB_H |
4 | #define __ASM_ARCH_OMAP_USB_H | 4 | #define __ASM_ARCH_OMAP_USB_H |
5 | 5 | ||
6 | #include <linux/io.h> | ||
6 | #include <linux/usb/musb.h> | 7 | #include <linux/usb/musb.h> |
7 | #include <plat/board.h> | 8 | #include <plat/board.h> |
8 | 9 | ||
@@ -105,6 +106,46 @@ extern int omap4430_phy_set_clk(struct device *dev, int on); | |||
105 | extern int omap4430_phy_init(struct device *dev); | 106 | extern int omap4430_phy_init(struct device *dev); |
106 | extern int omap4430_phy_exit(struct device *dev); | 107 | extern int omap4430_phy_exit(struct device *dev); |
107 | extern int omap4430_phy_suspend(struct device *dev, int suspend); | 108 | extern int omap4430_phy_suspend(struct device *dev, int suspend); |
109 | |||
110 | /* | ||
111 | * NOTE: Please update omap USB drivers to use ioremap + read/write | ||
112 | */ | ||
113 | |||
114 | #define OMAP2_L4_IO_OFFSET 0xb2000000 | ||
115 | #define IOMEM(x) ((void __force __iomem *)(x)) | ||
116 | #define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) | ||
117 | |||
118 | static inline u8 omap_readb(u32 pa) | ||
119 | { | ||
120 | return __raw_readb(OMAP2_L4_IO_ADDRESS(pa)); | ||
121 | } | ||
122 | |||
123 | static inline u16 omap_readw(u32 pa) | ||
124 | { | ||
125 | return __raw_readw(OMAP2_L4_IO_ADDRESS(pa)); | ||
126 | } | ||
127 | |||
128 | static inline u32 omap_readl(u32 pa) | ||
129 | { | ||
130 | return __raw_readl(OMAP2_L4_IO_ADDRESS(pa)); | ||
131 | } | ||
132 | |||
133 | static inline void omap_writeb(u8 v, u32 pa) | ||
134 | { | ||
135 | __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa)); | ||
136 | } | ||
137 | |||
138 | |||
139 | static inline void omap_writew(u16 v, u32 pa) | ||
140 | { | ||
141 | __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa)); | ||
142 | } | ||
143 | |||
144 | static inline void omap_writel(u32 v, u32 pa) | ||
145 | { | ||
146 | __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa)); | ||
147 | } | ||
148 | |||
108 | #endif | 149 | #endif |
109 | 150 | ||
110 | extern void am35x_musb_reset(void); | 151 | extern void am35x_musb_reset(void); |
diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c index 0d4aa0d5876c..cff8712122bb 100644 --- a/arch/arm/plat-omap/mux.c +++ b/arch/arm/plat-omap/mux.c | |||
@@ -26,8 +26,11 @@ | |||
26 | #include <linux/init.h> | 26 | #include <linux/init.h> |
27 | #include <linux/kernel.h> | 27 | #include <linux/kernel.h> |
28 | #include <linux/io.h> | 28 | #include <linux/io.h> |
29 | #include <asm/system.h> | ||
30 | #include <linux/spinlock.h> | 29 | #include <linux/spinlock.h> |
30 | |||
31 | #include <asm/system.h> | ||
32 | |||
33 | #include <plat/cpu.h> | ||
31 | #include <plat/mux.h> | 34 | #include <plat/mux.h> |
32 | 35 | ||
33 | #ifdef CONFIG_OMAP_MUX | 36 | #ifdef CONFIG_OMAP_MUX |
diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/plat-omap/omap-pm-noop.c index 3dc3801aace4..5a97b4d98d41 100644 --- a/arch/arm/plat-omap/omap-pm-noop.c +++ b/arch/arm/plat-omap/omap-pm-noop.c | |||
@@ -319,7 +319,7 @@ int omap_pm_get_dev_context_loss_count(struct device *dev) | |||
319 | if (WARN_ON(!dev)) | 319 | if (WARN_ON(!dev)) |
320 | return -ENODEV; | 320 | return -ENODEV; |
321 | 321 | ||
322 | if (dev->parent == &omap_device_parent) { | 322 | if (dev->pm_domain == &omap_device_pm_domain) { |
323 | count = omap_device_get_context_loss_count(pdev); | 323 | count = omap_device_get_context_loss_count(pdev); |
324 | } else { | 324 | } else { |
325 | WARN_ONCE(off_mode_enabled, "omap_pm: using dummy context loss counter; device %s should be converted to omap_device", | 325 | WARN_ONCE(off_mode_enabled, "omap_pm: using dummy context loss counter; device %s should be converted to omap_device", |
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index e8d98693d2dd..6de28ea3cd65 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c | |||
@@ -1,3 +1,4 @@ | |||
1 | |||
1 | /* | 2 | /* |
2 | * omap_device implementation | 3 | * omap_device implementation |
3 | * | 4 | * |
@@ -97,14 +98,7 @@ | |||
97 | #define USE_WAKEUP_LAT 0 | 98 | #define USE_WAKEUP_LAT 0 |
98 | #define IGNORE_WAKEUP_LAT 1 | 99 | #define IGNORE_WAKEUP_LAT 1 |
99 | 100 | ||
100 | static int omap_device_register(struct platform_device *pdev); | ||
101 | static int omap_early_device_register(struct platform_device *pdev); | 101 | static int omap_early_device_register(struct platform_device *pdev); |
102 | static struct omap_device *omap_device_alloc(struct platform_device *pdev, | ||
103 | struct omap_hwmod **ohs, int oh_cnt, | ||
104 | struct omap_device_pm_latency *pm_lats, | ||
105 | int pm_lats_cnt); | ||
106 | static void omap_device_delete(struct omap_device *od); | ||
107 | |||
108 | 102 | ||
109 | static struct omap_device_pm_latency omap_default_latency[] = { | 103 | static struct omap_device_pm_latency omap_default_latency[] = { |
110 | { | 104 | { |
@@ -320,8 +314,6 @@ static void _add_hwmod_clocks_clkdev(struct omap_device *od, | |||
320 | } | 314 | } |
321 | 315 | ||
322 | 316 | ||
323 | static struct dev_pm_domain omap_device_pm_domain; | ||
324 | |||
325 | /** | 317 | /** |
326 | * omap_device_build_from_dt - build an omap_device with multiple hwmods | 318 | * omap_device_build_from_dt - build an omap_device with multiple hwmods |
327 | * @pdev_name: name of the platform_device driver to use | 319 | * @pdev_name: name of the platform_device driver to use |
@@ -509,7 +501,7 @@ static int omap_device_fill_resources(struct omap_device *od, | |||
509 | * | 501 | * |
510 | * Returns an struct omap_device pointer or ERR_PTR() on error; | 502 | * Returns an struct omap_device pointer or ERR_PTR() on error; |
511 | */ | 503 | */ |
512 | static struct omap_device *omap_device_alloc(struct platform_device *pdev, | 504 | struct omap_device *omap_device_alloc(struct platform_device *pdev, |
513 | struct omap_hwmod **ohs, int oh_cnt, | 505 | struct omap_hwmod **ohs, int oh_cnt, |
514 | struct omap_device_pm_latency *pm_lats, | 506 | struct omap_device_pm_latency *pm_lats, |
515 | int pm_lats_cnt) | 507 | int pm_lats_cnt) |
@@ -591,7 +583,7 @@ oda_exit1: | |||
591 | return ERR_PTR(ret); | 583 | return ERR_PTR(ret); |
592 | } | 584 | } |
593 | 585 | ||
594 | static void omap_device_delete(struct omap_device *od) | 586 | void omap_device_delete(struct omap_device *od) |
595 | { | 587 | { |
596 | if (!od) | 588 | if (!od) |
597 | return; | 589 | return; |
@@ -619,7 +611,7 @@ static void omap_device_delete(struct omap_device *od) | |||
619 | * information. Returns ERR_PTR(-EINVAL) if @oh is NULL; otherwise, | 611 | * information. Returns ERR_PTR(-EINVAL) if @oh is NULL; otherwise, |
620 | * passes along the return value of omap_device_build_ss(). | 612 | * passes along the return value of omap_device_build_ss(). |
621 | */ | 613 | */ |
622 | struct platform_device *omap_device_build(const char *pdev_name, int pdev_id, | 614 | struct platform_device __init *omap_device_build(const char *pdev_name, int pdev_id, |
623 | struct omap_hwmod *oh, void *pdata, | 615 | struct omap_hwmod *oh, void *pdata, |
624 | int pdata_len, | 616 | int pdata_len, |
625 | struct omap_device_pm_latency *pm_lats, | 617 | struct omap_device_pm_latency *pm_lats, |
@@ -652,7 +644,7 @@ struct platform_device *omap_device_build(const char *pdev_name, int pdev_id, | |||
652 | * platform_device record. Returns an ERR_PTR() on error, or passes | 644 | * platform_device record. Returns an ERR_PTR() on error, or passes |
653 | * along the return value of omap_device_register(). | 645 | * along the return value of omap_device_register(). |
654 | */ | 646 | */ |
655 | struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id, | 647 | struct platform_device __init *omap_device_build_ss(const char *pdev_name, int pdev_id, |
656 | struct omap_hwmod **ohs, int oh_cnt, | 648 | struct omap_hwmod **ohs, int oh_cnt, |
657 | void *pdata, int pdata_len, | 649 | void *pdata, int pdata_len, |
658 | struct omap_device_pm_latency *pm_lats, | 650 | struct omap_device_pm_latency *pm_lats, |
@@ -717,7 +709,7 @@ odbs_exit: | |||
717 | * platform_early_add_device() on the underlying platform_device. | 709 | * platform_early_add_device() on the underlying platform_device. |
718 | * Returns 0 by default. | 710 | * Returns 0 by default. |
719 | */ | 711 | */ |
720 | static int omap_early_device_register(struct platform_device *pdev) | 712 | static int __init omap_early_device_register(struct platform_device *pdev) |
721 | { | 713 | { |
722 | struct platform_device *devices[1]; | 714 | struct platform_device *devices[1]; |
723 | 715 | ||
@@ -762,14 +754,12 @@ static int _od_suspend_noirq(struct device *dev) | |||
762 | struct omap_device *od = to_omap_device(pdev); | 754 | struct omap_device *od = to_omap_device(pdev); |
763 | int ret; | 755 | int ret; |
764 | 756 | ||
765 | if (od->flags & OMAP_DEVICE_NO_IDLE_ON_SUSPEND) | ||
766 | return pm_generic_suspend_noirq(dev); | ||
767 | |||
768 | ret = pm_generic_suspend_noirq(dev); | 757 | ret = pm_generic_suspend_noirq(dev); |
769 | 758 | ||
770 | if (!ret && !pm_runtime_status_suspended(dev)) { | 759 | if (!ret && !pm_runtime_status_suspended(dev)) { |
771 | if (pm_generic_runtime_suspend(dev) == 0) { | 760 | if (pm_generic_runtime_suspend(dev) == 0) { |
772 | omap_device_idle(pdev); | 761 | if (!(od->flags & OMAP_DEVICE_NO_IDLE_ON_SUSPEND)) |
762 | omap_device_idle(pdev); | ||
773 | od->flags |= OMAP_DEVICE_SUSPENDED; | 763 | od->flags |= OMAP_DEVICE_SUSPENDED; |
774 | } | 764 | } |
775 | } | 765 | } |
@@ -782,13 +772,11 @@ static int _od_resume_noirq(struct device *dev) | |||
782 | struct platform_device *pdev = to_platform_device(dev); | 772 | struct platform_device *pdev = to_platform_device(dev); |
783 | struct omap_device *od = to_omap_device(pdev); | 773 | struct omap_device *od = to_omap_device(pdev); |
784 | 774 | ||
785 | if (od->flags & OMAP_DEVICE_NO_IDLE_ON_SUSPEND) | ||
786 | return pm_generic_resume_noirq(dev); | ||
787 | |||
788 | if ((od->flags & OMAP_DEVICE_SUSPENDED) && | 775 | if ((od->flags & OMAP_DEVICE_SUSPENDED) && |
789 | !pm_runtime_status_suspended(dev)) { | 776 | !pm_runtime_status_suspended(dev)) { |
790 | od->flags &= ~OMAP_DEVICE_SUSPENDED; | 777 | od->flags &= ~OMAP_DEVICE_SUSPENDED; |
791 | omap_device_enable(pdev); | 778 | if (!(od->flags & OMAP_DEVICE_NO_IDLE_ON_SUSPEND)) |
779 | omap_device_enable(pdev); | ||
792 | pm_generic_runtime_resume(dev); | 780 | pm_generic_runtime_resume(dev); |
793 | } | 781 | } |
794 | 782 | ||
@@ -799,7 +787,7 @@ static int _od_resume_noirq(struct device *dev) | |||
799 | #define _od_resume_noirq NULL | 787 | #define _od_resume_noirq NULL |
800 | #endif | 788 | #endif |
801 | 789 | ||
802 | static struct dev_pm_domain omap_device_pm_domain = { | 790 | struct dev_pm_domain omap_device_pm_domain = { |
803 | .ops = { | 791 | .ops = { |
804 | SET_RUNTIME_PM_OPS(_od_runtime_suspend, _od_runtime_resume, | 792 | SET_RUNTIME_PM_OPS(_od_runtime_suspend, _od_runtime_resume, |
805 | _od_runtime_idle) | 793 | _od_runtime_idle) |
@@ -817,11 +805,10 @@ static struct dev_pm_domain omap_device_pm_domain = { | |||
817 | * platform_device_register() on the underlying platform_device. | 805 | * platform_device_register() on the underlying platform_device. |
818 | * Returns the return value of platform_device_register(). | 806 | * Returns the return value of platform_device_register(). |
819 | */ | 807 | */ |
820 | static int omap_device_register(struct platform_device *pdev) | 808 | int omap_device_register(struct platform_device *pdev) |
821 | { | 809 | { |
822 | pr_debug("omap_device: %s: registering\n", pdev->name); | 810 | pr_debug("omap_device: %s: registering\n", pdev->name); |
823 | 811 | ||
824 | pdev->dev.parent = &omap_device_parent; | ||
825 | pdev->dev.pm_domain = &omap_device_pm_domain; | 812 | pdev->dev.pm_domain = &omap_device_pm_domain; |
826 | return platform_device_add(pdev); | 813 | return platform_device_add(pdev); |
827 | } | 814 | } |
@@ -1130,11 +1117,6 @@ int omap_device_enable_clocks(struct omap_device *od) | |||
1130 | return 0; | 1117 | return 0; |
1131 | } | 1118 | } |
1132 | 1119 | ||
1133 | struct device omap_device_parent = { | ||
1134 | .init_name = "omap", | ||
1135 | .parent = &platform_bus, | ||
1136 | }; | ||
1137 | |||
1138 | static struct notifier_block platform_nb = { | 1120 | static struct notifier_block platform_nb = { |
1139 | .notifier_call = _omap_device_notifier_call, | 1121 | .notifier_call = _omap_device_notifier_call, |
1140 | }; | 1122 | }; |
@@ -1142,6 +1124,6 @@ static struct notifier_block platform_nb = { | |||
1142 | static int __init omap_device_init(void) | 1124 | static int __init omap_device_init(void) |
1143 | { | 1125 | { |
1144 | bus_register_notifier(&platform_bus_type, &platform_nb); | 1126 | bus_register_notifier(&platform_bus_type, &platform_nb); |
1145 | return device_register(&omap_device_parent); | 1127 | return 0; |
1146 | } | 1128 | } |
1147 | core_initcall(omap_device_init); | 1129 | core_initcall(omap_device_init); |
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index 4243bdcc87bc..3022fc267d23 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c | |||
@@ -31,11 +31,10 @@ | |||
31 | 31 | ||
32 | #include "sram.h" | 32 | #include "sram.h" |
33 | 33 | ||
34 | /* XXX These "sideways" includes are a sign that something is wrong */ | 34 | /* XXX These "sideways" includes will disappear when sram.c becomes a driver */ |
35 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) | 35 | #include "../mach-omap2/iomap.h" |
36 | # include "../mach-omap2/prm2xxx_3xxx.h" | 36 | #include "../mach-omap2/prm2xxx_3xxx.h" |
37 | # include "../mach-omap2/sdrc.h" | 37 | #include "../mach-omap2/sdrc.h" |
38 | #endif | ||
39 | 38 | ||
40 | #define OMAP1_SRAM_PA 0x20000000 | 39 | #define OMAP1_SRAM_PA 0x20000000 |
41 | #define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800) | 40 | #define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800) |
diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c index f3570884883e..d2bbfd1cb0b5 100644 --- a/arch/arm/plat-omap/usb.c +++ b/arch/arm/plat-omap/usb.c | |||
@@ -29,6 +29,10 @@ | |||
29 | #include <plat/usb.h> | 29 | #include <plat/usb.h> |
30 | #include <plat/board.h> | 30 | #include <plat/board.h> |
31 | 31 | ||
32 | #include <mach/hardware.h> | ||
33 | |||
34 | #include "../mach-omap2/common.h" | ||
35 | |||
32 | #ifdef CONFIG_ARCH_OMAP_OTG | 36 | #ifdef CONFIG_ARCH_OMAP_OTG |
33 | 37 | ||
34 | void __init | 38 | void __init |
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig index d8973ac46bc4..21bf6adb9198 100644 --- a/arch/arm/plat-s3c24xx/Kconfig +++ b/arch/arm/plat-s3c24xx/Kconfig | |||
@@ -4,7 +4,7 @@ | |||
4 | 4 | ||
5 | config PLAT_S3C24XX | 5 | config PLAT_S3C24XX |
6 | bool | 6 | bool |
7 | depends on ARCH_S3C2410 | 7 | depends on ARCH_S3C24XX |
8 | default y | 8 | default y |
9 | select NO_IOPORT | 9 | select NO_IOPORT |
10 | select ARCH_REQUIRE_GPIOLIB | 10 | select ARCH_REQUIRE_GPIOLIB |
@@ -44,12 +44,6 @@ config S3C2410_CLOCK | |||
44 | Clock code for the S3C2410, and similar processors which | 44 | Clock code for the S3C2410, and similar processors which |
45 | is currently includes the S3C2410, S3C2440, S3C2442. | 45 | is currently includes the S3C2410, S3C2440, S3C2442. |
46 | 46 | ||
47 | config S3C2443_CLOCK | ||
48 | bool | ||
49 | help | ||
50 | Clock code for the S3C2443 and similar processors, which includes | ||
51 | the S3C2416 and S3C2450. | ||
52 | |||
53 | config S3C24XX_DCLK | 47 | config S3C24XX_DCLK |
54 | bool | 48 | bool |
55 | help | 49 | help |
@@ -76,15 +70,9 @@ config S3C24XX_GPIO_EXTRA128 | |||
76 | Add an extra 128 gpio numbers to the available GPIO pool. This is | 70 | Add an extra 128 gpio numbers to the available GPIO pool. This is |
77 | available for boards that need extra gpios for external devices. | 71 | available for boards that need extra gpios for external devices. |
78 | 72 | ||
79 | config PM_SIMTEC | 73 | config S3C24XX_DMA |
80 | bool | ||
81 | help | ||
82 | Common power management code for systems that are | ||
83 | compatible with the Simtec style of power management | ||
84 | |||
85 | config S3C2410_DMA | ||
86 | bool "S3C2410 DMA support" | 74 | bool "S3C2410 DMA support" |
87 | depends on ARCH_S3C2410 | 75 | depends on ARCH_S3C24XX |
88 | select S3C_DMA | 76 | select S3C_DMA |
89 | help | 77 | help |
90 | S3C2410 DMA support. This is needed for drivers like sound which | 78 | S3C2410 DMA support. This is needed for drivers like sound which |
@@ -93,31 +81,11 @@ config S3C2410_DMA | |||
93 | 81 | ||
94 | config S3C2410_DMA_DEBUG | 82 | config S3C2410_DMA_DEBUG |
95 | bool "S3C2410 DMA support debug" | 83 | bool "S3C2410 DMA support debug" |
96 | depends on ARCH_S3C2410 && S3C2410_DMA | 84 | depends on ARCH_S3C24XX && S3C2410_DMA |
97 | help | 85 | help |
98 | Enable debugging output for the DMA code. This option sends info | 86 | Enable debugging output for the DMA code. This option sends info |
99 | to the kernel log, at priority KERN_DEBUG. | 87 | to the kernel log, at priority KERN_DEBUG. |
100 | 88 | ||
101 | # SPI default pin configuration code | ||
102 | |||
103 | config S3C24XX_SPI_BUS0_GPE11_GPE12_GPE13 | ||
104 | bool | ||
105 | help | ||
106 | SPI GPIO configuration code for BUS0 when connected to | ||
107 | GPE11, GPE12 and GPE13. | ||
108 | |||
109 | config S3C24XX_SPI_BUS1_GPG5_GPG6_GPG7 | ||
110 | bool | ||
111 | help | ||
112 | SPI GPIO configuration code for BUS 1 when connected to | ||
113 | GPG5, GPG6 and GPG7. | ||
114 | |||
115 | config S3C24XX_SPI_BUS1_GPD8_GPD9_GPD10 | ||
116 | bool | ||
117 | help | ||
118 | SPI GPIO configuration code for BUS 1 when connected to | ||
119 | GPD8, GPD9 and GPD10. | ||
120 | |||
121 | # common code for s3c24xx based machines, such as the SMDKs. | 89 | # common code for s3c24xx based machines, such as the SMDKs. |
122 | 90 | ||
123 | # cpu frequency items common between s3c2410 and s3c2440/s3c2442 | 91 | # cpu frequency items common between s3c2410 and s3c2440/s3c2442 |
@@ -145,21 +113,4 @@ config S3C2412_IOTIMING | |||
145 | Intel node to select io timing code that is common to the s3c2412 | 113 | Intel node to select io timing code that is common to the s3c2412 |
146 | and the s3c2443. | 114 | and the s3c2443. |
147 | 115 | ||
148 | config MACH_SMDK | ||
149 | bool | ||
150 | help | ||
151 | Common machine code for SMDK2410 and SMDK2440 | ||
152 | |||
153 | config S3C24XX_SIMTEC_AUDIO | ||
154 | bool | ||
155 | depends on (ARCH_BAST || MACH_VR1000 || MACH_OSIRIS || MACH_ANUBIS) | ||
156 | default y | ||
157 | help | ||
158 | Add audio devices for common Simtec S3C24XX boards | ||
159 | |||
160 | config S3C2410_SETUP_TS | ||
161 | bool | ||
162 | help | ||
163 | Compile in platform device definition for Samsung TouchScreen. | ||
164 | |||
165 | endif | 116 | endif |
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile index b2b01125de66..2467b800cc76 100644 --- a/arch/arm/plat-s3c24xx/Makefile +++ b/arch/arm/plat-s3c24xx/Makefile | |||
@@ -23,28 +23,11 @@ obj-$(CONFIG_CPU_FREQ_S3C24XX_DEBUGFS) += cpu-freq-debugfs.o | |||
23 | 23 | ||
24 | # Architecture dependent builds | 24 | # Architecture dependent builds |
25 | 25 | ||
26 | obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o | ||
27 | obj-$(CONFIG_PM) += pm.o | 26 | obj-$(CONFIG_PM) += pm.o |
28 | obj-$(CONFIG_PM) += irq-pm.o | 27 | obj-$(CONFIG_PM) += irq-pm.o |
29 | obj-$(CONFIG_PM) += sleep.o | 28 | obj-$(CONFIG_PM) += sleep.o |
30 | obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o | 29 | obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o |
31 | obj-$(CONFIG_S3C2443_CLOCK) += s3c2443-clock.o | 30 | obj-$(CONFIG_S3C24XX_DMA) += dma.o |
32 | obj-$(CONFIG_S3C2410_DMA) += dma.o | ||
33 | obj-$(CONFIG_S3C2410_IOTIMING) += s3c2410-iotiming.o | 31 | obj-$(CONFIG_S3C2410_IOTIMING) += s3c2410-iotiming.o |
34 | obj-$(CONFIG_S3C2412_IOTIMING) += s3c2412-iotiming.o | 32 | obj-$(CONFIG_S3C2412_IOTIMING) += s3c2412-iotiming.o |
35 | obj-$(CONFIG_S3C2410_CPUFREQ_UTILS) += s3c2410-cpufreq-utils.o | 33 | obj-$(CONFIG_S3C2410_CPUFREQ_UTILS) += s3c2410-cpufreq-utils.o |
36 | |||
37 | # device specific setup and/or initialisation | ||
38 | obj-$(CONFIG_ARCH_S3C2410) += setup-i2c.o | ||
39 | obj-$(CONFIG_S3C2410_SETUP_TS) += setup-ts.o | ||
40 | |||
41 | # SPI gpio central GPIO functions | ||
42 | |||
43 | obj-$(CONFIG_S3C24XX_SPI_BUS0_GPE11_GPE12_GPE13) += spi-bus0-gpe11_12_13.o | ||
44 | obj-$(CONFIG_S3C24XX_SPI_BUS1_GPG5_GPG6_GPG7) += spi-bus1-gpg5_6_7.o | ||
45 | obj-$(CONFIG_S3C24XX_SPI_BUS1_GPD8_GPD9_GPD10) += spi-bus1-gpd8_9_10.o | ||
46 | |||
47 | # machine common support | ||
48 | |||
49 | obj-$(CONFIG_MACH_SMDK) += common-smdk.o | ||
50 | obj-$(CONFIG_S3C24XX_SIMTEC_AUDIO) += simtec-audio.o | ||
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c index 21f1fda8b661..32a09931350c 100644 --- a/arch/arm/plat-s3c24xx/cpu.c +++ b/arch/arm/plat-s3c24xx/cpu.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <linux/io.h> | 32 | #include <linux/io.h> |
33 | 33 | ||
34 | #include <mach/hardware.h> | 34 | #include <mach/hardware.h> |
35 | #include <mach/regs-clock.h> | ||
35 | #include <asm/irq.h> | 36 | #include <asm/irq.h> |
36 | #include <asm/cacheflush.h> | 37 | #include <asm/cacheflush.h> |
37 | 38 | ||
@@ -190,8 +191,34 @@ static unsigned long s3c24xx_read_idcode_v4(void) | |||
190 | return __raw_readl(S3C2410_GSTATUS1); | 191 | return __raw_readl(S3C2410_GSTATUS1); |
191 | } | 192 | } |
192 | 193 | ||
194 | static void s3c24xx_default_idle(void) | ||
195 | { | ||
196 | unsigned long tmp; | ||
197 | int i; | ||
198 | |||
199 | /* idle the system by using the idle mode which will wait for an | ||
200 | * interrupt to happen before restarting the system. | ||
201 | */ | ||
202 | |||
203 | /* Warning: going into idle state upsets jtag scanning */ | ||
204 | |||
205 | __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE, | ||
206 | S3C2410_CLKCON); | ||
207 | |||
208 | /* the samsung port seems to do a loop and then unset idle.. */ | ||
209 | for (i = 0; i < 50; i++) | ||
210 | tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */ | ||
211 | |||
212 | /* this bit is not cleared on re-start... */ | ||
213 | |||
214 | __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE, | ||
215 | S3C2410_CLKCON); | ||
216 | } | ||
217 | |||
193 | void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) | 218 | void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) |
194 | { | 219 | { |
220 | arm_pm_idle = s3c24xx_default_idle; | ||
221 | |||
195 | /* initialise the io descriptors we need for initialisation */ | 222 | /* initialise the io descriptors we need for initialisation */ |
196 | iotable_init(mach_desc, size); | 223 | iotable_init(mach_desc, size); |
197 | iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); | 224 | iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); |
diff --git a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c deleted file mode 100644 index 704175b0573f..000000000000 --- a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c | ||
2 | * | ||
3 | * Copyright (c) 2008 Simtec Electronics | ||
4 | * http://armlinux.simtec.co.uk/ | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * | ||
7 | * S3C24XX SPI - gpio configuration for bus 0 on gpe11,12,13 | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/gpio.h> | ||
16 | |||
17 | #include <mach/spi.h> | ||
18 | #include <mach/regs-gpio.h> | ||
19 | |||
20 | void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi, | ||
21 | int enable) | ||
22 | { | ||
23 | if (enable) { | ||
24 | s3c_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPE13_SPICLK0); | ||
25 | s3c_gpio_cfgpin(S3C2410_GPE(12), S3C2410_GPE12_SPIMOSI0); | ||
26 | s3c_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPE11_SPIMISO0); | ||
27 | s3c2410_gpio_pullup(S3C2410_GPE(11), 0); | ||
28 | s3c2410_gpio_pullup(S3C2410_GPE(13), 0); | ||
29 | } else { | ||
30 | s3c_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPIO_INPUT); | ||
31 | s3c_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPIO_INPUT); | ||
32 | s3c_gpio_setpull(S3C2410_GPE(11), S3C_GPIO_PULL_NONE); | ||
33 | s3c_gpio_setpull(S3C2410_GPE(12), S3C_GPIO_PULL_NONE); | ||
34 | s3c_gpio_setpull(S3C2410_GPE(13), S3C_GPIO_PULL_NONE); | ||
35 | } | ||
36 | } | ||
diff --git a/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c b/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c deleted file mode 100644 index 72457afd6255..000000000000 --- a/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c +++ /dev/null | |||
@@ -1,38 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c24xx/spi-bus0-gpd8_9_10.c | ||
2 | * | ||
3 | * Copyright (c) 2008 Simtec Electronics | ||
4 | * http://armlinux.simtec.co.uk/ | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * | ||
7 | * S3C24XX SPI - gpio configuration for bus 1 on gpd8,9,10 | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/gpio.h> | ||
16 | |||
17 | #include <mach/spi.h> | ||
18 | #include <mach/regs-gpio.h> | ||
19 | |||
20 | void s3c24xx_spi_gpiocfg_bus1_gpd8_9_10(struct s3c2410_spi_info *spi, | ||
21 | int enable) | ||
22 | { | ||
23 | |||
24 | printk(KERN_INFO "%s(%d)\n", __func__, enable); | ||
25 | if (enable) { | ||
26 | s3c_gpio_cfgpin(S3C2410_GPD(10), S3C2440_GPD10_SPICLK1); | ||
27 | s3c_gpio_cfgpin(S3C2410_GPD(9), S3C2440_GPD9_SPIMOSI1); | ||
28 | s3c_gpio_cfgpin(S3C2410_GPD(8), S3C2440_GPD8_SPIMISO1); | ||
29 | s3c2410_gpio_pullup(S3C2410_GPD(10), 0); | ||
30 | s3c2410_gpio_pullup(S3C2410_GPD(9), 0); | ||
31 | } else { | ||
32 | s3c_gpio_cfgpin(S3C2410_GPD(8), S3C2410_GPIO_INPUT); | ||
33 | s3c_gpio_cfgpin(S3C2410_GPD(9), S3C2410_GPIO_INPUT); | ||
34 | s3c_gpio_setpull(S3C2410_GPD(10), S3C_GPIO_PULL_NONE); | ||
35 | s3c_gpio_setpull(S3C2410_GPD(9), S3C_GPIO_PULL_NONE); | ||
36 | s3c_gpio_setpull(S3C2410_GPD(8), S3C_GPIO_PULL_NONE); | ||
37 | } | ||
38 | } | ||
diff --git a/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c b/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c deleted file mode 100644 index c3972b645d13..000000000000 --- a/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c24xx/spi-bus0-gpg5_6_7.c | ||
2 | * | ||
3 | * Copyright (c) 2008 Simtec Electronics | ||
4 | * http://armlinux.simtec.co.uk/ | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * | ||
7 | * S3C24XX SPI - gpio configuration for bus 1 on gpg5,6,7 | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/gpio.h> | ||
16 | |||
17 | #include <mach/spi.h> | ||
18 | #include <mach/regs-gpio.h> | ||
19 | |||
20 | void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi, | ||
21 | int enable) | ||
22 | { | ||
23 | if (enable) { | ||
24 | s3c_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPG7_SPICLK1); | ||
25 | s3c_gpio_cfgpin(S3C2410_GPG(6), S3C2410_GPG6_SPIMOSI1); | ||
26 | s3c_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPG5_SPIMISO1); | ||
27 | s3c2410_gpio_pullup(S3C2410_GPG(5), 0); | ||
28 | s3c2410_gpio_pullup(S3C2410_GPG(6), 0); | ||
29 | } else { | ||
30 | s3c_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPIO_INPUT); | ||
31 | s3c_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPIO_INPUT); | ||
32 | s3c_gpio_setpull(S3C2410_GPG(5), S3C_GPIO_PULL_NONE); | ||
33 | s3c_gpio_setpull(S3C2410_GPG(6), S3C_GPIO_PULL_NONE); | ||
34 | s3c_gpio_setpull(S3C2410_GPG(7), S3C_GPIO_PULL_NONE); | ||
35 | } | ||
36 | } | ||
diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-s5p/irq-eint.c index c496b359c371..139c050918c5 100644 --- a/arch/arm/plat-s5p/irq-eint.c +++ b/arch/arm/plat-s5p/irq-eint.c | |||
@@ -200,7 +200,7 @@ static struct irq_chip s5p_irq_vic_eint = { | |||
200 | #endif | 200 | #endif |
201 | }; | 201 | }; |
202 | 202 | ||
203 | int __init s5p_init_irq_eint(void) | 203 | static int __init s5p_init_irq_eint(void) |
204 | { | 204 | { |
205 | int irq; | 205 | int irq; |
206 | 206 | ||
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c index 1fdfaa4599ce..82c7311017a2 100644 --- a/arch/arm/plat-s5p/irq-gpioint.c +++ b/arch/arm/plat-s5p/irq-gpioint.c | |||
@@ -41,7 +41,7 @@ struct s5p_gpioint_bank { | |||
41 | void (*handler)(unsigned int, struct irq_desc *); | 41 | void (*handler)(unsigned int, struct irq_desc *); |
42 | }; | 42 | }; |
43 | 43 | ||
44 | LIST_HEAD(banks); | 44 | static LIST_HEAD(banks); |
45 | 45 | ||
46 | static int s5p_gpioint_set_type(struct irq_data *d, unsigned int type) | 46 | static int s5p_gpioint_set_type(struct irq_data *d, unsigned int type) |
47 | { | 47 | { |
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 6a2abe67c8b2..71553f410016 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig | |||
@@ -205,7 +205,7 @@ config S3C_DEV_USB_HSOTG | |||
205 | 205 | ||
206 | config S3C_DEV_WDT | 206 | config S3C_DEV_WDT |
207 | bool | 207 | bool |
208 | default y if ARCH_S3C2410 | 208 | default y if ARCH_S3C24XX |
209 | help | 209 | help |
210 | Complie in platform device definition for Watchdog Timer | 210 | Complie in platform device definition for Watchdog Timer |
211 | 211 | ||
@@ -264,7 +264,7 @@ config SAMSUNG_DEV_KEYPAD | |||
264 | 264 | ||
265 | config SAMSUNG_DEV_PWM | 265 | config SAMSUNG_DEV_PWM |
266 | bool | 266 | bool |
267 | default y if ARCH_S3C2410 | 267 | default y if ARCH_S3C24XX |
268 | help | 268 | help |
269 | Compile in platform device definition for PWM Timer | 269 | Compile in platform device definition for PWM Timer |
270 | 270 | ||
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c index f10768e988d4..98b864777a31 100644 --- a/arch/arm/plat-samsung/devs.c +++ b/arch/arm/plat-samsung/devs.c | |||
@@ -744,17 +744,6 @@ struct platform_device s3c_device_iis = { | |||
744 | }; | 744 | }; |
745 | #endif /* CONFIG_PLAT_S3C24XX */ | 745 | #endif /* CONFIG_PLAT_S3C24XX */ |
746 | 746 | ||
747 | #ifdef CONFIG_CPU_S3C2440 | ||
748 | struct platform_device s3c2412_device_iis = { | ||
749 | .name = "s3c2412-iis", | ||
750 | .id = -1, | ||
751 | .dev = { | ||
752 | .dma_mask = &samsung_device_dma_mask, | ||
753 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
754 | } | ||
755 | }; | ||
756 | #endif /* CONFIG_CPU_S3C2440 */ | ||
757 | |||
758 | /* IDE CFCON */ | 747 | /* IDE CFCON */ |
759 | 748 | ||
760 | #ifdef CONFIG_SAMSUNG_DEV_IDE | 749 | #ifdef CONFIG_SAMSUNG_DEV_IDE |
@@ -1078,7 +1067,7 @@ static struct resource s5p_pmu_resource[] = { | |||
1078 | DEFINE_RES_IRQ(IRQ_PMU) | 1067 | DEFINE_RES_IRQ(IRQ_PMU) |
1079 | }; | 1068 | }; |
1080 | 1069 | ||
1081 | struct platform_device s5p_device_pmu = { | 1070 | static struct platform_device s5p_device_pmu = { |
1082 | .name = "arm-pmu", | 1071 | .name = "arm-pmu", |
1083 | .id = ARM_PMU_DEVICE_CPU, | 1072 | .id = ARM_PMU_DEVICE_CPU, |
1084 | .num_resources = ARRAY_SIZE(s5p_pmu_resource), | 1073 | .num_resources = ARRAY_SIZE(s5p_pmu_resource), |
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c index 0747c77a2fd5..301d9c319d0b 100644 --- a/arch/arm/plat-samsung/dma-ops.c +++ b/arch/arm/plat-samsung/dma-ops.c | |||
@@ -116,7 +116,7 @@ static inline int samsung_dmadev_flush(unsigned ch) | |||
116 | return dmaengine_terminate_all((struct dma_chan *)ch); | 116 | return dmaengine_terminate_all((struct dma_chan *)ch); |
117 | } | 117 | } |
118 | 118 | ||
119 | struct samsung_dma_ops dmadev_ops = { | 119 | static struct samsung_dma_ops dmadev_ops = { |
120 | .request = samsung_dmadev_request, | 120 | .request = samsung_dmadev_request, |
121 | .release = samsung_dmadev_release, | 121 | .release = samsung_dmadev_release, |
122 | .prepare = samsung_dmadev_prepare, | 122 | .prepare = samsung_dmadev_prepare, |
diff --git a/arch/arm/plat-samsung/include/plat/audio-simtec.h b/arch/arm/plat-samsung/include/plat/audio-simtec.h index 5345364e7420..376af5286a3e 100644 --- a/arch/arm/plat-samsung/include/plat/audio-simtec.h +++ b/arch/arm/plat-samsung/include/plat/audio-simtec.h | |||
@@ -32,6 +32,3 @@ struct s3c24xx_audio_simtec_pdata { | |||
32 | 32 | ||
33 | void (*startup)(void); | 33 | void (*startup)(void); |
34 | }; | 34 | }; |
35 | |||
36 | extern int simtec_audio_add(const char *codec_name, bool has_lr_routing, | ||
37 | struct s3c24xx_audio_simtec_pdata *pdata); | ||
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h index 73c66d4d10fa..a62753dc15ba 100644 --- a/arch/arm/plat-samsung/include/plat/clock.h +++ b/arch/arm/plat-samsung/include/plat/clock.h | |||
@@ -79,6 +79,10 @@ extern struct clk clk_epll; | |||
79 | extern struct clk clk_xtal; | 79 | extern struct clk clk_xtal; |
80 | extern struct clk clk_ext; | 80 | extern struct clk clk_ext; |
81 | 81 | ||
82 | /* S3C2443/S3C2416 specific clocks */ | ||
83 | extern struct clksrc_clk clk_epllref; | ||
84 | extern struct clksrc_clk clk_esysclk; | ||
85 | |||
82 | /* S3C64XX specific clocks */ | 86 | /* S3C64XX specific clocks */ |
83 | extern struct clk clk_h2; | 87 | extern struct clk clk_h2; |
84 | extern struct clk clk_27m; | 88 | extern struct clk clk_27m; |
@@ -114,7 +118,23 @@ extern void s3c24xx_setup_clocks(unsigned long fclk, | |||
114 | extern void s3c2410_setup_clocks(void); | 118 | extern void s3c2410_setup_clocks(void); |
115 | extern void s3c2412_setup_clocks(void); | 119 | extern void s3c2412_setup_clocks(void); |
116 | extern void s3c244x_setup_clocks(void); | 120 | extern void s3c244x_setup_clocks(void); |
117 | extern void s3c2443_setup_clocks(void); | 121 | |
122 | /* S3C2410 specific clock functions */ | ||
123 | |||
124 | extern int s3c2410_baseclk_add(void); | ||
125 | |||
126 | /* S3C2443/S3C2416 specific clock functions */ | ||
127 | |||
128 | typedef unsigned int (*pll_fn)(unsigned int reg, unsigned int base); | ||
129 | |||
130 | extern void s3c2443_common_setup_clocks(pll_fn get_mpll); | ||
131 | extern void s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, | ||
132 | unsigned int *divs, int nr_divs, | ||
133 | int divmask); | ||
134 | |||
135 | extern int s3c2443_clkcon_enable_h(struct clk *clk, int enable); | ||
136 | extern int s3c2443_clkcon_enable_p(struct clk *clk, int enable); | ||
137 | extern int s3c2443_clkcon_enable_s(struct clk *clk, int enable); | ||
118 | 138 | ||
119 | /* S3C64XX specific functions and clocks */ | 139 | /* S3C64XX specific functions and clocks */ |
120 | 140 | ||
diff --git a/arch/arm/plat-samsung/include/plat/regs-dma.h b/arch/arm/plat-samsung/include/plat/regs-dma.h index 178bccbe4804..a7d622ef16af 100644 --- a/arch/arm/plat-samsung/include/plat/regs-dma.h +++ b/arch/arm/plat-samsung/include/plat/regs-dma.h | |||
@@ -119,7 +119,7 @@ | |||
119 | #define S3C2412_DMAREQSEL_UART2_1 S3C2412_DMAREQSEL_SRC(24) | 119 | #define S3C2412_DMAREQSEL_UART2_1 S3C2412_DMAREQSEL_SRC(24) |
120 | #endif /* CONFIG_CPU_S3C2412 */ | 120 | #endif /* CONFIG_CPU_S3C2412 */ |
121 | 121 | ||
122 | #ifdef CONFIG_CPU_S3C2443 | 122 | #if defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2443) |
123 | 123 | ||
124 | #define S3C2443_DMAREQSEL_SRC(x) ((x) << 1) | 124 | #define S3C2443_DMAREQSEL_SRC(x) ((x) << 1) |
125 | 125 | ||
diff --git a/arch/arm/plat-samsung/include/plat/s3c2410.h b/arch/arm/plat-samsung/include/plat/s3c2410.h index 3986497dd3f7..55b0e5f51e97 100644 --- a/arch/arm/plat-samsung/include/plat/s3c2410.h +++ b/arch/arm/plat-samsung/include/plat/s3c2410.h | |||
@@ -29,5 +29,3 @@ extern void s3c2410_init_clocks(int xtal); | |||
29 | #define s3c2410_init NULL | 29 | #define s3c2410_init NULL |
30 | #define s3c2410a_init NULL | 30 | #define s3c2410a_init NULL |
31 | #endif | 31 | #endif |
32 | |||
33 | extern int s3c2410_baseclk_add(void); | ||
diff --git a/arch/arm/plat-samsung/include/plat/s3c2443.h b/arch/arm/plat-samsung/include/plat/s3c2443.h index dce05b43d51c..a5b794ff838b 100644 --- a/arch/arm/plat-samsung/include/plat/s3c2443.h +++ b/arch/arm/plat-samsung/include/plat/s3c2443.h | |||
@@ -32,23 +32,3 @@ extern void s3c2443_restart(char mode, const char *cmd); | |||
32 | #define s3c2443_init NULL | 32 | #define s3c2443_init NULL |
33 | #define s3c2443_restart NULL | 33 | #define s3c2443_restart NULL |
34 | #endif | 34 | #endif |
35 | |||
36 | /* common code used by s3c2443 and others. | ||
37 | * note, not to be used outside of arch/arm/mach-s3c* */ | ||
38 | |||
39 | struct clk; /* some files don't need clk.h otherwise */ | ||
40 | |||
41 | typedef unsigned int (*pll_fn)(unsigned int reg, unsigned int base); | ||
42 | |||
43 | extern void s3c2443_common_setup_clocks(pll_fn get_mpll); | ||
44 | extern void s3c2443_common_init_clocks(int xtal, pll_fn get_mpll, | ||
45 | unsigned int *divs, int nr_divs, | ||
46 | int divmask); | ||
47 | |||
48 | extern int s3c2443_clkcon_enable_h(struct clk *clk, int enable); | ||
49 | extern int s3c2443_clkcon_enable_p(struct clk *clk, int enable); | ||
50 | extern int s3c2443_clkcon_enable_s(struct clk *clk, int enable); | ||
51 | |||
52 | extern struct clksrc_clk clk_epllref; | ||
53 | extern struct clksrc_clk clk_esysclk; | ||
54 | extern struct clksrc_clk clk_msysclk; | ||
diff --git a/arch/arm/plat-spear/include/plat/system.h b/arch/arm/plat-spear/include/plat/system.h deleted file mode 100644 index 86c6f83b44cc..000000000000 --- a/arch/arm/plat-spear/include/plat/system.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-spear/include/plat/system.h | ||
3 | * | ||
4 | * SPEAr platform specific architecture functions | ||
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Viresh Kumar<viresh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | #ifndef __PLAT_SYSTEM_H | ||
15 | #define __PLAT_SYSTEM_H | ||
16 | |||
17 | static inline void arch_idle(void) | ||
18 | { | ||
19 | /* | ||
20 | * This should do all the clock switching | ||
21 | * and wait for interrupt tricks | ||
22 | */ | ||
23 | cpu_do_idle(); | ||
24 | } | ||
25 | |||
26 | #endif /* __PLAT_SYSTEM_H */ | ||