diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-ux500/board-mop500-sdi.c | 77 | ||||
-rw-r--r-- | arch/arm/mach-ux500/board-mop500.c | 135 | ||||
-rw-r--r-- | arch/arm/mach-ux500/board-u5500-sdi.c | 25 | ||||
-rw-r--r-- | arch/arm/mach-ux500/board-u5500.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-ux500/devices-common.h | 7 | ||||
-rw-r--r-- | arch/arm/mach-ux500/devices-db5500.h | 16 | ||||
-rw-r--r-- | arch/arm/mach-ux500/devices-db8500.c | 43 | ||||
-rw-r--r-- | arch/arm/mach-ux500/devices-db8500.h | 12 |
8 files changed, 288 insertions, 33 deletions
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c index 4ba3d930a06e..d1ae6a09979d 100644 --- a/arch/arm/mach-ux500/board-mop500-sdi.c +++ b/arch/arm/mach-ux500/board-mop500-sdi.c | |||
@@ -13,12 +13,14 @@ | |||
13 | #include <linux/platform_device.h> | 13 | #include <linux/platform_device.h> |
14 | 14 | ||
15 | #include <plat/pincfg.h> | 15 | #include <plat/pincfg.h> |
16 | #include <plat/ste_dma40.h> | ||
16 | #include <mach/devices.h> | 17 | #include <mach/devices.h> |
17 | #include <mach/hardware.h> | 18 | #include <mach/hardware.h> |
18 | 19 | ||
19 | #include "devices-db8500.h" | 20 | #include "devices-db8500.h" |
20 | #include "pins-db8500.h" | 21 | #include "pins-db8500.h" |
21 | #include "board-mop500.h" | 22 | #include "board-mop500.h" |
23 | #include "ste-dma40-db8500.h" | ||
22 | 24 | ||
23 | static pin_cfg_t mop500_sdi_pins[] = { | 25 | static pin_cfg_t mop500_sdi_pins[] = { |
24 | /* SDI0 (MicroSD slot) */ | 26 | /* SDI0 (MicroSD slot) */ |
@@ -86,6 +88,26 @@ static u32 mop500_sdi0_vdd_handler(struct device *dev, unsigned int vdd, | |||
86 | MCI_DATA2DIREN | MCI_DATA31DIREN; | 88 | MCI_DATA2DIREN | MCI_DATA31DIREN; |
87 | } | 89 | } |
88 | 90 | ||
91 | #ifdef CONFIG_STE_DMA40 | ||
92 | struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx = { | ||
93 | .mode = STEDMA40_MODE_LOGICAL, | ||
94 | .dir = STEDMA40_PERIPH_TO_MEM, | ||
95 | .src_dev_type = DB8500_DMA_DEV29_SD_MM0_RX, | ||
96 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | ||
97 | .src_info.data_width = STEDMA40_WORD_WIDTH, | ||
98 | .dst_info.data_width = STEDMA40_WORD_WIDTH, | ||
99 | }; | ||
100 | |||
101 | static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = { | ||
102 | .mode = STEDMA40_MODE_LOGICAL, | ||
103 | .dir = STEDMA40_MEM_TO_PERIPH, | ||
104 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | ||
105 | .dst_dev_type = DB8500_DMA_DEV29_SD_MM0_TX, | ||
106 | .src_info.data_width = STEDMA40_WORD_WIDTH, | ||
107 | .dst_info.data_width = STEDMA40_WORD_WIDTH, | ||
108 | }; | ||
109 | #endif | ||
110 | |||
89 | static struct mmci_platform_data mop500_sdi0_data = { | 111 | static struct mmci_platform_data mop500_sdi0_data = { |
90 | .vdd_handler = mop500_sdi0_vdd_handler, | 112 | .vdd_handler = mop500_sdi0_vdd_handler, |
91 | .ocr_mask = MMC_VDD_29_30, | 113 | .ocr_mask = MMC_VDD_29_30, |
@@ -93,6 +115,11 @@ static struct mmci_platform_data mop500_sdi0_data = { | |||
93 | .capabilities = MMC_CAP_4_BIT_DATA, | 115 | .capabilities = MMC_CAP_4_BIT_DATA, |
94 | .gpio_cd = GPIO_SDMMC_CD, | 116 | .gpio_cd = GPIO_SDMMC_CD, |
95 | .gpio_wp = -1, | 117 | .gpio_wp = -1, |
118 | #ifdef CONFIG_STE_DMA40 | ||
119 | .dma_filter = stedma40_filter, | ||
120 | .dma_rx_param = &mop500_sdi0_dma_cfg_rx, | ||
121 | .dma_tx_param = &mop500_sdi0_dma_cfg_tx, | ||
122 | #endif | ||
96 | }; | 123 | }; |
97 | 124 | ||
98 | void mop500_sdi_tc35892_init(void) | 125 | void mop500_sdi_tc35892_init(void) |
@@ -116,18 +143,63 @@ void mop500_sdi_tc35892_init(void) | |||
116 | * SDI 2 (POP eMMC, not on DB8500ed) | 143 | * SDI 2 (POP eMMC, not on DB8500ed) |
117 | */ | 144 | */ |
118 | 145 | ||
146 | #ifdef CONFIG_STE_DMA40 | ||
147 | struct stedma40_chan_cfg mop500_sdi2_dma_cfg_rx = { | ||
148 | .mode = STEDMA40_MODE_LOGICAL, | ||
149 | .dir = STEDMA40_PERIPH_TO_MEM, | ||
150 | .src_dev_type = DB8500_DMA_DEV28_SD_MM2_RX, | ||
151 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | ||
152 | .src_info.data_width = STEDMA40_WORD_WIDTH, | ||
153 | .dst_info.data_width = STEDMA40_WORD_WIDTH, | ||
154 | }; | ||
155 | |||
156 | static struct stedma40_chan_cfg mop500_sdi2_dma_cfg_tx = { | ||
157 | .mode = STEDMA40_MODE_LOGICAL, | ||
158 | .dir = STEDMA40_MEM_TO_PERIPH, | ||
159 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | ||
160 | .dst_dev_type = DB8500_DMA_DEV28_SD_MM2_TX, | ||
161 | .src_info.data_width = STEDMA40_WORD_WIDTH, | ||
162 | .dst_info.data_width = STEDMA40_WORD_WIDTH, | ||
163 | }; | ||
164 | #endif | ||
165 | |||
119 | static struct mmci_platform_data mop500_sdi2_data = { | 166 | static struct mmci_platform_data mop500_sdi2_data = { |
120 | .ocr_mask = MMC_VDD_165_195, | 167 | .ocr_mask = MMC_VDD_165_195, |
121 | .f_max = 100000000, | 168 | .f_max = 100000000, |
122 | .capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, | 169 | .capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, |
123 | .gpio_cd = -1, | 170 | .gpio_cd = -1, |
124 | .gpio_wp = -1, | 171 | .gpio_wp = -1, |
172 | #ifdef CONFIG_STE_DMA40 | ||
173 | .dma_filter = stedma40_filter, | ||
174 | .dma_rx_param = &mop500_sdi2_dma_cfg_rx, | ||
175 | .dma_tx_param = &mop500_sdi2_dma_cfg_tx, | ||
176 | #endif | ||
125 | }; | 177 | }; |
126 | 178 | ||
127 | /* | 179 | /* |
128 | * SDI 4 (on-board eMMC) | 180 | * SDI 4 (on-board eMMC) |
129 | */ | 181 | */ |
130 | 182 | ||
183 | #ifdef CONFIG_STE_DMA40 | ||
184 | struct stedma40_chan_cfg mop500_sdi4_dma_cfg_rx = { | ||
185 | .mode = STEDMA40_MODE_LOGICAL, | ||
186 | .dir = STEDMA40_PERIPH_TO_MEM, | ||
187 | .src_dev_type = DB8500_DMA_DEV42_SD_MM4_RX, | ||
188 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | ||
189 | .src_info.data_width = STEDMA40_WORD_WIDTH, | ||
190 | .dst_info.data_width = STEDMA40_WORD_WIDTH, | ||
191 | }; | ||
192 | |||
193 | static struct stedma40_chan_cfg mop500_sdi4_dma_cfg_tx = { | ||
194 | .mode = STEDMA40_MODE_LOGICAL, | ||
195 | .dir = STEDMA40_MEM_TO_PERIPH, | ||
196 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | ||
197 | .dst_dev_type = DB8500_DMA_DEV42_SD_MM4_TX, | ||
198 | .src_info.data_width = STEDMA40_WORD_WIDTH, | ||
199 | .dst_info.data_width = STEDMA40_WORD_WIDTH, | ||
200 | }; | ||
201 | #endif | ||
202 | |||
131 | static struct mmci_platform_data mop500_sdi4_data = { | 203 | static struct mmci_platform_data mop500_sdi4_data = { |
132 | .ocr_mask = MMC_VDD_29_30, | 204 | .ocr_mask = MMC_VDD_29_30, |
133 | .f_max = 100000000, | 205 | .f_max = 100000000, |
@@ -135,6 +207,11 @@ static struct mmci_platform_data mop500_sdi4_data = { | |||
135 | MMC_CAP_MMC_HIGHSPEED, | 207 | MMC_CAP_MMC_HIGHSPEED, |
136 | .gpio_cd = -1, | 208 | .gpio_cd = -1, |
137 | .gpio_wp = -1, | 209 | .gpio_wp = -1, |
210 | #ifdef CONFIG_STE_DMA40 | ||
211 | .dma_filter = stedma40_filter, | ||
212 | .dma_rx_param = &mop500_sdi4_dma_cfg_rx, | ||
213 | .dma_tx_param = &mop500_sdi4_dma_cfg_tx, | ||
214 | #endif | ||
138 | }; | 215 | }; |
139 | 216 | ||
140 | void __init mop500_sdi_init(void) | 217 | void __init mop500_sdi_init(void) |
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index 5babce497415..67d9c634c05d 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/gpio.h> | 17 | #include <linux/gpio.h> |
18 | #include <linux/amba/bus.h> | 18 | #include <linux/amba/bus.h> |
19 | #include <linux/amba/pl022.h> | 19 | #include <linux/amba/pl022.h> |
20 | #include <linux/amba/serial.h> | ||
20 | #include <linux/spi/spi.h> | 21 | #include <linux/spi/spi.h> |
21 | #include <linux/mfd/ab8500.h> | 22 | #include <linux/mfd/ab8500.h> |
22 | #include <linux/mfd/tc3589x.h> | 23 | #include <linux/mfd/tc3589x.h> |
@@ -29,12 +30,14 @@ | |||
29 | 30 | ||
30 | #include <plat/pincfg.h> | 31 | #include <plat/pincfg.h> |
31 | #include <plat/i2c.h> | 32 | #include <plat/i2c.h> |
33 | #include <plat/ste_dma40.h> | ||
32 | 34 | ||
33 | #include <mach/hardware.h> | 35 | #include <mach/hardware.h> |
34 | #include <mach/setup.h> | 36 | #include <mach/setup.h> |
35 | #include <mach/devices.h> | 37 | #include <mach/devices.h> |
36 | #include <mach/irqs.h> | 38 | #include <mach/irqs.h> |
37 | 39 | ||
40 | #include "ste-dma40-db8500.h" | ||
38 | #include "devices-db8500.h" | 41 | #include "devices-db8500.h" |
39 | #include "pins-db8500.h" | 42 | #include "pins-db8500.h" |
40 | #include "board-mop500.h" | 43 | #include "board-mop500.h" |
@@ -123,16 +126,6 @@ struct platform_device ab8500_device = { | |||
123 | .resource = ab8500_resources, | 126 | .resource = ab8500_resources, |
124 | }; | 127 | }; |
125 | 128 | ||
126 | static struct pl022_ssp_controller ssp0_platform_data = { | ||
127 | .bus_id = 0, | ||
128 | /* pl022 not yet supports dma */ | ||
129 | .enable_dma = 0, | ||
130 | /* on this platform, gpio 31,142,144,214 & | ||
131 | * 224 are connected as chip selects | ||
132 | */ | ||
133 | .num_chipselect = 5, | ||
134 | }; | ||
135 | |||
136 | /* | 129 | /* |
137 | * TC35892 | 130 | * TC35892 |
138 | */ | 131 | */ |
@@ -319,16 +312,132 @@ static struct platform_device *platform_devs[] __initdata = { | |||
319 | &mop500_gpio_keys_device, | 312 | &mop500_gpio_keys_device, |
320 | }; | 313 | }; |
321 | 314 | ||
315 | #ifdef CONFIG_STE_DMA40 | ||
316 | static struct stedma40_chan_cfg ssp0_dma_cfg_rx = { | ||
317 | .mode = STEDMA40_MODE_LOGICAL, | ||
318 | .dir = STEDMA40_PERIPH_TO_MEM, | ||
319 | .src_dev_type = DB8500_DMA_DEV8_SSP0_RX, | ||
320 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | ||
321 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | ||
322 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | ||
323 | }; | ||
324 | |||
325 | static struct stedma40_chan_cfg ssp0_dma_cfg_tx = { | ||
326 | .mode = STEDMA40_MODE_LOGICAL, | ||
327 | .dir = STEDMA40_MEM_TO_PERIPH, | ||
328 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | ||
329 | .dst_dev_type = DB8500_DMA_DEV8_SSP0_TX, | ||
330 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | ||
331 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | ||
332 | }; | ||
333 | #endif | ||
334 | |||
335 | static struct pl022_ssp_controller ssp0_platform_data = { | ||
336 | .bus_id = 0, | ||
337 | #ifdef CONFIG_STE_DMA40 | ||
338 | .enable_dma = 1, | ||
339 | .dma_filter = stedma40_filter, | ||
340 | .dma_rx_param = &ssp0_dma_cfg_rx, | ||
341 | .dma_tx_param = &ssp0_dma_cfg_tx, | ||
342 | #else | ||
343 | .enable_dma = 0, | ||
344 | #endif | ||
345 | /* on this platform, gpio 31,142,144,214 & | ||
346 | * 224 are connected as chip selects | ||
347 | */ | ||
348 | .num_chipselect = 5, | ||
349 | }; | ||
350 | |||
322 | static void __init mop500_spi_init(void) | 351 | static void __init mop500_spi_init(void) |
323 | { | 352 | { |
324 | db8500_add_ssp0(&ssp0_platform_data); | 353 | db8500_add_ssp0(&ssp0_platform_data); |
325 | } | 354 | } |
326 | 355 | ||
356 | #ifdef CONFIG_STE_DMA40 | ||
357 | static struct stedma40_chan_cfg uart0_dma_cfg_rx = { | ||
358 | .mode = STEDMA40_MODE_LOGICAL, | ||
359 | .dir = STEDMA40_PERIPH_TO_MEM, | ||
360 | .src_dev_type = DB8500_DMA_DEV13_UART0_RX, | ||
361 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | ||
362 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | ||
363 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | ||
364 | }; | ||
365 | |||
366 | static struct stedma40_chan_cfg uart0_dma_cfg_tx = { | ||
367 | .mode = STEDMA40_MODE_LOGICAL, | ||
368 | .dir = STEDMA40_MEM_TO_PERIPH, | ||
369 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | ||
370 | .dst_dev_type = DB8500_DMA_DEV13_UART0_TX, | ||
371 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | ||
372 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | ||
373 | }; | ||
374 | |||
375 | static struct stedma40_chan_cfg uart1_dma_cfg_rx = { | ||
376 | .mode = STEDMA40_MODE_LOGICAL, | ||
377 | .dir = STEDMA40_PERIPH_TO_MEM, | ||
378 | .src_dev_type = DB8500_DMA_DEV12_UART1_RX, | ||
379 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | ||
380 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | ||
381 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | ||
382 | }; | ||
383 | |||
384 | static struct stedma40_chan_cfg uart1_dma_cfg_tx = { | ||
385 | .mode = STEDMA40_MODE_LOGICAL, | ||
386 | .dir = STEDMA40_MEM_TO_PERIPH, | ||
387 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | ||
388 | .dst_dev_type = DB8500_DMA_DEV12_UART1_TX, | ||
389 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | ||
390 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | ||
391 | }; | ||
392 | |||
393 | static struct stedma40_chan_cfg uart2_dma_cfg_rx = { | ||
394 | .mode = STEDMA40_MODE_LOGICAL, | ||
395 | .dir = STEDMA40_PERIPH_TO_MEM, | ||
396 | .src_dev_type = DB8500_DMA_DEV11_UART2_RX, | ||
397 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | ||
398 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | ||
399 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | ||
400 | }; | ||
401 | |||
402 | static struct stedma40_chan_cfg uart2_dma_cfg_tx = { | ||
403 | .mode = STEDMA40_MODE_LOGICAL, | ||
404 | .dir = STEDMA40_MEM_TO_PERIPH, | ||
405 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | ||
406 | .dst_dev_type = DB8500_DMA_DEV11_UART2_TX, | ||
407 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | ||
408 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | ||
409 | }; | ||
410 | #endif | ||
411 | |||
412 | static struct amba_pl011_data uart0_plat = { | ||
413 | #ifdef CONFIG_STE_DMA40 | ||
414 | .dma_filter = stedma40_filter, | ||
415 | .dma_rx_param = &uart0_dma_cfg_rx, | ||
416 | .dma_tx_param = &uart0_dma_cfg_tx, | ||
417 | #endif | ||
418 | }; | ||
419 | |||
420 | static struct amba_pl011_data uart1_plat = { | ||
421 | #ifdef CONFIG_STE_DMA40 | ||
422 | .dma_filter = stedma40_filter, | ||
423 | .dma_rx_param = &uart1_dma_cfg_rx, | ||
424 | .dma_tx_param = &uart1_dma_cfg_tx, | ||
425 | #endif | ||
426 | }; | ||
427 | |||
428 | static struct amba_pl011_data uart2_plat = { | ||
429 | #ifdef CONFIG_STE_DMA40 | ||
430 | .dma_filter = stedma40_filter, | ||
431 | .dma_rx_param = &uart2_dma_cfg_rx, | ||
432 | .dma_tx_param = &uart2_dma_cfg_tx, | ||
433 | #endif | ||
434 | }; | ||
435 | |||
327 | static void __init mop500_uart_init(void) | 436 | static void __init mop500_uart_init(void) |
328 | { | 437 | { |
329 | db8500_add_uart0(); | 438 | db8500_add_uart0(&uart0_plat); |
330 | db8500_add_uart1(); | 439 | db8500_add_uart1(&uart1_plat); |
331 | db8500_add_uart2(); | 440 | db8500_add_uart2(&uart2_plat); |
332 | } | 441 | } |
333 | 442 | ||
334 | static void __init u8500_init_machine(void) | 443 | static void __init u8500_init_machine(void) |
diff --git a/arch/arm/mach-ux500/board-u5500-sdi.c b/arch/arm/mach-ux500/board-u5500-sdi.c index 54712acc0394..739fb4c5b160 100644 --- a/arch/arm/mach-ux500/board-u5500-sdi.c +++ b/arch/arm/mach-ux500/board-u5500-sdi.c | |||
@@ -31,6 +31,26 @@ static pin_cfg_t u5500_sdi_pins[] = { | |||
31 | GPIO14_MC0_CLK | PIN_DIR_OUTPUT | PIN_VAL_LOW, | 31 | GPIO14_MC0_CLK | PIN_DIR_OUTPUT | PIN_VAL_LOW, |
32 | }; | 32 | }; |
33 | 33 | ||
34 | #ifdef CONFIG_STE_DMA40 | ||
35 | struct stedma40_chan_cfg u5500_sdi0_dma_cfg_rx = { | ||
36 | .mode = STEDMA40_MODE_LOGICAL, | ||
37 | .dir = STEDMA40_PERIPH_TO_MEM, | ||
38 | .src_dev_type = DB5500_DMA_DEV24_SDMMC0_RX, | ||
39 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, | ||
40 | .src_info.data_width = STEDMA40_WORD_WIDTH, | ||
41 | .dst_info.data_width = STEDMA40_WORD_WIDTH, | ||
42 | }; | ||
43 | |||
44 | static struct stedma40_chan_cfg u5500_sdi0_dma_cfg_tx = { | ||
45 | .mode = STEDMA40_MODE_LOGICAL, | ||
46 | .dir = STEDMA40_MEM_TO_PERIPH, | ||
47 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, | ||
48 | .dst_dev_type = DB5500_DMA_DEV24_SDMMC0_TX, | ||
49 | .src_info.data_width = STEDMA40_WORD_WIDTH, | ||
50 | .dst_info.data_width = STEDMA40_WORD_WIDTH, | ||
51 | }; | ||
52 | #endif | ||
53 | |||
34 | static struct mmci_platform_data u5500_sdi0_data = { | 54 | static struct mmci_platform_data u5500_sdi0_data = { |
35 | .ocr_mask = MMC_VDD_165_195, | 55 | .ocr_mask = MMC_VDD_165_195, |
36 | .f_max = 50000000, | 56 | .f_max = 50000000, |
@@ -39,6 +59,11 @@ static struct mmci_platform_data u5500_sdi0_data = { | |||
39 | MMC_CAP_MMC_HIGHSPEED, | 59 | MMC_CAP_MMC_HIGHSPEED, |
40 | .gpio_cd = -1, | 60 | .gpio_cd = -1, |
41 | .gpio_wp = -1, | 61 | .gpio_wp = -1, |
62 | #ifdef CONFIG_STE_DMA40 | ||
63 | .dma_filter = stedma40_filter, | ||
64 | .dma_rx_param = &u5500_sdi0_dma_cfg_rx, | ||
65 | .dma_tx_param = &u5500_sdi0_dma_cfg_tx, | ||
66 | #endif | ||
42 | }; | 67 | }; |
43 | 68 | ||
44 | void __init u5500_sdi_init(void) | 69 | void __init u5500_sdi_init(void) |
diff --git a/arch/arm/mach-ux500/board-u5500.c b/arch/arm/mach-ux500/board-u5500.c index 39d370c1f3b4..44fd3b5c33ec 100644 --- a/arch/arm/mach-ux500/board-u5500.c +++ b/arch/arm/mach-ux500/board-u5500.c | |||
@@ -22,9 +22,9 @@ | |||
22 | 22 | ||
23 | static void __init u5500_uart_init(void) | 23 | static void __init u5500_uart_init(void) |
24 | { | 24 | { |
25 | db5500_add_uart0(); | 25 | db5500_add_uart0(NULL); |
26 | db5500_add_uart1(); | 26 | db5500_add_uart1(NULL); |
27 | db5500_add_uart2(); | 27 | db5500_add_uart2(NULL); |
28 | } | 28 | } |
29 | 29 | ||
30 | static void __init u5500_init_machine(void) | 30 | static void __init u5500_init_machine(void) |
diff --git a/arch/arm/mach-ux500/devices-common.h b/arch/arm/mach-ux500/devices-common.h index cbadc117d2db..c719b5a1d913 100644 --- a/arch/arm/mach-ux500/devices-common.h +++ b/arch/arm/mach-ux500/devices-common.h | |||
@@ -42,10 +42,13 @@ dbx500_add_sdi(const char *name, resource_size_t base, int irq, | |||
42 | return dbx500_add_amba_device(name, base, irq, pdata, 0); | 42 | return dbx500_add_amba_device(name, base, irq, pdata, 0); |
43 | } | 43 | } |
44 | 44 | ||
45 | struct amba_pl011_data; | ||
46 | |||
45 | static inline struct amba_device * | 47 | static inline struct amba_device * |
46 | dbx500_add_uart(const char *name, resource_size_t base, int irq) | 48 | dbx500_add_uart(const char *name, resource_size_t base, int irq, |
49 | struct amba_pl011_data *pdata) | ||
47 | { | 50 | { |
48 | return dbx500_add_amba_device(name, base, irq, NULL, 0); | 51 | return dbx500_add_amba_device(name, base, irq, pdata, 0); |
49 | } | 52 | } |
50 | 53 | ||
51 | struct nmk_i2c_controller; | 54 | struct nmk_i2c_controller; |
diff --git a/arch/arm/mach-ux500/devices-db5500.h b/arch/arm/mach-ux500/devices-db5500.h index 481ae5c51206..94627f7783b0 100644 --- a/arch/arm/mach-ux500/devices-db5500.h +++ b/arch/arm/mach-ux500/devices-db5500.h | |||
@@ -57,13 +57,13 @@ | |||
57 | #define db5500_add_spi3(pdata) \ | 57 | #define db5500_add_spi3(pdata) \ |
58 | dbx500_add_spi("spi3", U5500_SPI3_BASE, IRQ_DB5500_SPI3, pdata) | 58 | dbx500_add_spi("spi3", U5500_SPI3_BASE, IRQ_DB5500_SPI3, pdata) |
59 | 59 | ||
60 | #define db5500_add_uart0() \ | 60 | #define db5500_add_uart0(plat) \ |
61 | dbx500_add_uart("uart0", U5500_UART0_BASE, IRQ_DB5500_UART0) | 61 | dbx500_add_uart("uart0", U5500_UART0_BASE, IRQ_DB5500_UART0, plat) |
62 | #define db5500_add_uart1() \ | 62 | #define db5500_add_uart1(plat) \ |
63 | dbx500_add_uart("uart1", U5500_UART1_BASE, IRQ_DB5500_UART1) | 63 | dbx500_add_uart("uart1", U5500_UART1_BASE, IRQ_DB5500_UART1, plat) |
64 | #define db5500_add_uart2() \ | 64 | #define db5500_add_uart2(plat) \ |
65 | dbx500_add_uart("uart2", U5500_UART2_BASE, IRQ_DB5500_UART2) | 65 | dbx500_add_uart("uart2", U5500_UART2_BASE, IRQ_DB5500_UART2, plat) |
66 | #define db5500_add_uart3() \ | 66 | #define db5500_add_uart3(plat) \ |
67 | dbx500_add_uart("uart3", U5500_UART3_BASE, IRQ_DB5500_UART3) | 67 | dbx500_add_uart("uart3", U5500_UART3_BASE, IRQ_DB5500_UART3, plat) |
68 | 68 | ||
69 | #endif | 69 | #endif |
diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c index f122d4ee3b2d..73b17404b194 100644 --- a/arch/arm/mach-ux500/devices-db8500.c +++ b/arch/arm/mach-ux500/devices-db8500.c | |||
@@ -11,6 +11,7 @@ | |||
11 | #include <linux/io.h> | 11 | #include <linux/io.h> |
12 | #include <linux/gpio.h> | 12 | #include <linux/gpio.h> |
13 | #include <linux/amba/bus.h> | 13 | #include <linux/amba/bus.h> |
14 | #include <linux/amba/pl022.h> | ||
14 | 15 | ||
15 | #include <plat/ste_dma40.h> | 16 | #include <plat/ste_dma40.h> |
16 | 17 | ||
@@ -67,7 +68,9 @@ struct stedma40_chan_cfg dma40_memcpy_conf_log = { | |||
67 | 68 | ||
68 | /* | 69 | /* |
69 | * Mapping between destination event lines and physical device address. | 70 | * Mapping between destination event lines and physical device address. |
70 | * The event line is tied to a device and therefor the address is constant. | 71 | * The event line is tied to a device and therefore the address is constant. |
72 | * When the address comes from a primecell it will be configured in runtime | ||
73 | * and we set the address to -1 as a placeholder. | ||
71 | */ | 74 | */ |
72 | static const dma_addr_t dma40_tx_map[DB8500_DMA_NR_DEV] = { | 75 | static const dma_addr_t dma40_tx_map[DB8500_DMA_NR_DEV] = { |
73 | /* MUSB - these will be runtime-reconfigured */ | 76 | /* MUSB - these will be runtime-reconfigured */ |
@@ -79,6 +82,25 @@ static const dma_addr_t dma40_tx_map[DB8500_DMA_NR_DEV] = { | |||
79 | [DB8500_DMA_DEV36_USB_OTG_OEP_3_11] = -1, | 82 | [DB8500_DMA_DEV36_USB_OTG_OEP_3_11] = -1, |
80 | [DB8500_DMA_DEV37_USB_OTG_OEP_2_10] = -1, | 83 | [DB8500_DMA_DEV37_USB_OTG_OEP_2_10] = -1, |
81 | [DB8500_DMA_DEV38_USB_OTG_OEP_1_9] = -1, | 84 | [DB8500_DMA_DEV38_USB_OTG_OEP_1_9] = -1, |
85 | /* PrimeCells - run-time configured */ | ||
86 | [DB8500_DMA_DEV0_SPI0_TX] = -1, | ||
87 | [DB8500_DMA_DEV1_SD_MMC0_TX] = -1, | ||
88 | [DB8500_DMA_DEV2_SD_MMC1_TX] = -1, | ||
89 | [DB8500_DMA_DEV3_SD_MMC2_TX] = -1, | ||
90 | [DB8500_DMA_DEV8_SSP0_TX] = -1, | ||
91 | [DB8500_DMA_DEV9_SSP1_TX] = -1, | ||
92 | [DB8500_DMA_DEV11_UART2_TX] = -1, | ||
93 | [DB8500_DMA_DEV12_UART1_TX] = -1, | ||
94 | [DB8500_DMA_DEV13_UART0_TX] = -1, | ||
95 | [DB8500_DMA_DEV28_SD_MM2_TX] = -1, | ||
96 | [DB8500_DMA_DEV29_SD_MM0_TX] = -1, | ||
97 | [DB8500_DMA_DEV32_SD_MM1_TX] = -1, | ||
98 | [DB8500_DMA_DEV33_SPI2_TX] = -1, | ||
99 | [DB8500_DMA_DEV35_SPI1_TX] = -1, | ||
100 | [DB8500_DMA_DEV40_SPI3_TX] = -1, | ||
101 | [DB8500_DMA_DEV41_SD_MM3_TX] = -1, | ||
102 | [DB8500_DMA_DEV42_SD_MM4_TX] = -1, | ||
103 | [DB8500_DMA_DEV43_SD_MM5_TX] = -1, | ||
82 | }; | 104 | }; |
83 | 105 | ||
84 | /* Mapping between source event lines and physical device address */ | 106 | /* Mapping between source event lines and physical device address */ |
@@ -92,6 +114,25 @@ static const dma_addr_t dma40_rx_map[DB8500_DMA_NR_DEV] = { | |||
92 | [DB8500_DMA_DEV36_USB_OTG_IEP_3_11] = -1, | 114 | [DB8500_DMA_DEV36_USB_OTG_IEP_3_11] = -1, |
93 | [DB8500_DMA_DEV37_USB_OTG_IEP_2_10] = -1, | 115 | [DB8500_DMA_DEV37_USB_OTG_IEP_2_10] = -1, |
94 | [DB8500_DMA_DEV38_USB_OTG_IEP_1_9] = -1, | 116 | [DB8500_DMA_DEV38_USB_OTG_IEP_1_9] = -1, |
117 | /* PrimeCells */ | ||
118 | [DB8500_DMA_DEV0_SPI0_RX] = -1, | ||
119 | [DB8500_DMA_DEV1_SD_MMC0_RX] = -1, | ||
120 | [DB8500_DMA_DEV2_SD_MMC1_RX] = -1, | ||
121 | [DB8500_DMA_DEV3_SD_MMC2_RX] = -1, | ||
122 | [DB8500_DMA_DEV8_SSP0_RX] = -1, | ||
123 | [DB8500_DMA_DEV9_SSP1_RX] = -1, | ||
124 | [DB8500_DMA_DEV11_UART2_RX] = -1, | ||
125 | [DB8500_DMA_DEV12_UART1_RX] = -1, | ||
126 | [DB8500_DMA_DEV13_UART0_RX] = -1, | ||
127 | [DB8500_DMA_DEV28_SD_MM2_RX] = -1, | ||
128 | [DB8500_DMA_DEV29_SD_MM0_RX] = -1, | ||
129 | [DB8500_DMA_DEV32_SD_MM1_RX] = -1, | ||
130 | [DB8500_DMA_DEV33_SPI2_RX] = -1, | ||
131 | [DB8500_DMA_DEV35_SPI1_RX] = -1, | ||
132 | [DB8500_DMA_DEV40_SPI3_RX] = -1, | ||
133 | [DB8500_DMA_DEV41_SD_MM3_RX] = -1, | ||
134 | [DB8500_DMA_DEV42_SD_MM4_RX] = -1, | ||
135 | [DB8500_DMA_DEV43_SD_MM5_RX] = -1, | ||
95 | }; | 136 | }; |
96 | 137 | ||
97 | /* Reserved event lines for memcpy only */ | 138 | /* Reserved event lines for memcpy only */ |
diff --git a/arch/arm/mach-ux500/devices-db8500.h b/arch/arm/mach-ux500/devices-db8500.h index d1ea4bd03291..9cc6f8f5d3e6 100644 --- a/arch/arm/mach-ux500/devices-db8500.h +++ b/arch/arm/mach-ux500/devices-db8500.h | |||
@@ -91,11 +91,11 @@ db8500_add_ssp(const char *name, resource_size_t base, int irq, | |||
91 | #define db8500_add_spi3(pdata) \ | 91 | #define db8500_add_spi3(pdata) \ |
92 | dbx500_add_spi("spi3", U8500_SPI3_BASE, IRQ_DB8500_SPI3, pdata) | 92 | dbx500_add_spi("spi3", U8500_SPI3_BASE, IRQ_DB8500_SPI3, pdata) |
93 | 93 | ||
94 | #define db8500_add_uart0() \ | 94 | #define db8500_add_uart0(pdata) \ |
95 | dbx500_add_uart("uart0", U8500_UART0_BASE, IRQ_DB8500_UART0) | 95 | dbx500_add_uart("uart0", U8500_UART0_BASE, IRQ_DB8500_UART0, pdata) |
96 | #define db8500_add_uart1() \ | 96 | #define db8500_add_uart1(pdata) \ |
97 | dbx500_add_uart("uart1", U8500_UART1_BASE, IRQ_DB8500_UART1) | 97 | dbx500_add_uart("uart1", U8500_UART1_BASE, IRQ_DB8500_UART1, pdata) |
98 | #define db8500_add_uart2() \ | 98 | #define db8500_add_uart2(pdata) \ |
99 | dbx500_add_uart("uart2", U8500_UART2_BASE, IRQ_DB8500_UART2) | 99 | dbx500_add_uart("uart2", U8500_UART2_BASE, IRQ_DB8500_UART2, pdata) |
100 | 100 | ||
101 | #endif | 101 | #endif |