812 files changed, 8234 insertions, 10303 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a02385b2444c..ff7416f8eb83 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -258,6 +258,7 @@ config ARCH_INTEGRATOR
         select ARCH_HAS_CPUFREQ
         select CLKDEV_LOOKUP
         select HAVE_MACH_CLKDEV
+        select HAVE_TCM
         select ICST
         select GENERIC_CLOCKEVENTS
         select PLAT_VERSATILE
@@ -341,10 +342,12 @@ config ARCH_HIGHBANK
         select ARM_AMBA
         select ARM_GIC
         select ARM_TIMER_SP804
+        select CACHE_L2X0
         select CLKDEV_LOOKUP
         select CPU_V7
         select GENERIC_CLOCKEVENTS
         select HAVE_ARM_SCU
+        select HAVE_SMP
         select USE_OF
         help
           Support for the Calxeda Highbank SoC based boards.
@@ -362,6 +365,7 @@ config ARCH_CNS3XXX
         select CPU_V6K
         select GENERIC_CLOCKEVENTS
         select ARM_GIC
+        select MIGHT_HAVE_CACHE_L2X0
         select MIGHT_HAVE_PCI
         select PCI_DOMAINS if PCI
         help
@@ -382,6 +386,7 @@ config ARCH_PRIMA2
         select GENERIC_CLOCKEVENTS
         select CLKDEV_LOOKUP
         select GENERIC_IRQ_CHIP
+        select MIGHT_HAVE_CACHE_L2X0
         select USE_OF
         select ZONE_DMA
         help
@@ -634,6 +639,8 @@ config ARCH_TEGRA
         select GENERIC_GPIO
         select HAVE_CLK
         select HAVE_SCHED_CLOCK
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
         select ARCH_HAS_CPUFREQ
         help
           This enables support for NVIDIA Tegra based systems (Tegra APX,
@@ -651,6 +658,7 @@ config ARCH_PICOXCELL
         select HAVE_SCHED_CLOCK
         select HAVE_TCM
         select NO_IOPORT
+        select SPARSE_IRQ
         select USE_OF
         help
           This enables support for systems based on the Picochip picoXcell
@@ -703,7 +711,9 @@ config ARCH_SHMOBILE
         select HAVE_CLK
         select CLKDEV_LOOKUP
         select HAVE_MACH_CLKDEV
+        select HAVE_SMP
         select GENERIC_CLOCKEVENTS
+        select MIGHT_HAVE_CACHE_L2X0
         select NO_IOPORT
         select SPARSE_IRQ
         select MULTI_IRQ_HANDLER
@@ -868,16 +878,6 @@ config ARCH_SHARK
           Support for the StrongARM based Digital DNARD machine, also known
           as "Shark" (<http://www.shark-linux.de/shark.html>).
 
-config ARCH_TCC_926
-        bool "Telechips TCC ARM926-based systems"
-        select CLKSRC_MMIO
-        select CPU_ARM926T
-        select HAVE_CLK
-        select CLKDEV_LOOKUP
-        select GENERIC_CLOCKEVENTS
-        help
-          Support for Telechips TCC ARM926-based systems.
-
 config ARCH_U300
         bool "ST-Ericsson U300 Series"
         depends on MMU
@@ -893,7 +893,6 @@ config ARCH_U300
         select HAVE_MACH_CLKDEV
         select GENERIC_GPIO
         select ARCH_REQUIRE_GPIOLIB
-        select NEED_MACH_MEMORY_H
         help
           Support for ST-Ericsson U300 series mobile platforms.
 
@@ -905,6 +904,8 @@ config ARCH_U8500
         select CLKDEV_LOOKUP
         select ARCH_REQUIRE_GPIOLIB
         select ARCH_HAS_CPUFREQ
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
         help
           Support for ST-Ericsson's Ux500 architecture
 
@@ -915,6 +916,7 @@ config ARCH_NOMADIK
         select CPU_ARM926T
         select CLKDEV_LOOKUP
         select GENERIC_CLOCKEVENTS
+        select MIGHT_HAVE_CACHE_L2X0
         select ARCH_REQUIRE_GPIOLIB
         help
           Support for the Nomadik platform by ST-Ericsson
@@ -974,6 +976,7 @@ config ARCH_ZYNQ
         select ARM_GIC
         select ARM_AMBA
         select ICST
+        select MIGHT_HAVE_CACHE_L2X0
         select USE_OF
         help
           Support for Xilinx Zynq ARM Cortex A9 Platform
@@ -1060,8 +1063,6 @@ source "arch/arm/plat-s5p/Kconfig"
 
 source "arch/arm/plat-spear/Kconfig"
 
-source "arch/arm/plat-tcc/Kconfig"
-
 if ARCH_S3C2410
 source "arch/arm/mach-s3c2410/Kconfig"
 source "arch/arm/mach-s3c2412/Kconfig"
@@ -1126,6 +1127,11 @@ config ARM_TIMER_SP804
 
 source arch/arm/mm/Kconfig
 
+config ARM_NR_BANKS
+        int
+        default 16 if ARCH_EP93XX
+        default 8
+
 config IWMMXT
         bool "Enable iWMMXt support"
         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
@@ -1246,7 +1252,7 @@ config PL310_ERRATA_588369
 
 config ARM_ERRATA_720789
         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
-        depends on CPU_V7 && SMP
+        depends on CPU_V7
         help
           This option enables the workaround for the 720789 Cortex-A9 (prior to
           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
@@ -1282,7 +1288,7 @@ config ARM_ERRATA_743622
 
 config ARM_ERRATA_751472
         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
-        depends on CPU_V7 && SMP
+        depends on CPU_V7
         help
           This option enables the workaround for the 751472 Cortex-A9 (prior
           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
@@ -1435,14 +1441,20 @@ menu "Kernel Features"
 
 source "kernel/time/Kconfig"
 
+config HAVE_SMP
+        bool
+        help
+          This option should be selected by machines which have an SMP-
+          capable CPU.
+
+          The only effect of this option is to make the SMP-related
+          options available to the user for configuration.
+
 config SMP
         bool "Symmetric Multi-Processing"
         depends on CPU_V6K || CPU_V7
         depends on GENERIC_CLOCKEVENTS
-        depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
-                 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
-                 ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
-                 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || ARCH_HIGHBANK || SOC_IMX6Q
+        depends on HAVE_SMP
         depends on MMU
         select USE_GENERIC_SMP_HELPERS
         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
@@ -1560,6 +1572,16 @@ config LOCAL_TIMERS
           accounting to be spread across the timer interval, preventing a
           "thundering herd" at every timer tick.
 
+config ARCH_NR_GPIO
+        int
+        default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
+        default 350 if ARCH_U8500
+        default 0
+        help
+          Maximum number of GPIOs in the system.
+
+          If unsure, leave the default value.
+
 source kernel/Kconfig.preempt
 
 config HZ
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index c5213e78606b..e0d236d7ff73 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -100,6 +100,14 @@ choice
                   Note that the system will appear to hang during boot if there
                   is nothing connected to read from the DCC.
 
+        config AT91_DEBUG_LL_DBGU0
+                bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl"
+                depends on HAVE_AT91_DBGU0
+
+        config AT91_DEBUG_LL_DBGU1
+                bool "Kernel low-level debugging on 9263, 9g45 and cap9"
+                depends on HAVE_AT91_DBGU1
+
         config DEBUG_FOOTBRIDGE_COM1
                 bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
                 depends on FOOTBRIDGE
@@ -247,6 +255,43 @@ choice
                   their output to the standard serial port on the RealView
                   PB1176 platform.
 
+        config DEBUG_MSM_UART1
+                bool "Kernel low-level debugging messages via MSM UART1"
+                depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to the first serial port on MSM devices.
+
+        config DEBUG_MSM_UART2
+                bool "Kernel low-level debugging messages via MSM UART2"
+                depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to the second serial port on MSM devices.
+
+        config DEBUG_MSM_UART3
+                bool "Kernel low-level debugging messages via MSM UART3"
+                depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to the third serial port on MSM devices.
+
+        config DEBUG_MSM8660_UART
+                bool "Kernel low-level debugging messages via MSM 8660 UART"
+                depends on ARCH_MSM8X60
+                select MSM_HAS_DEBUG_UART_HS
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to the serial port on MSM 8660 devices.
+
+        config DEBUG_MSM8960_UART
+                bool "Kernel low-level debugging messages via MSM 8960 UART"
+                depends on ARCH_MSM8960
+                select MSM_HAS_DEBUG_UART_HS
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to the serial port on MSM 8960 devices.
+
 endchoice
 
 config EARLY_PRINTK
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index dfcf3b033e10..40319d91bb7f 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -184,7 +184,6 @@ machine-$(CONFIG_ARCH_EXYNOS4)		:= exynos
 machine-$(CONFIG_ARCH_SA1100)           := sa1100
 machine-$(CONFIG_ARCH_SHARK)            := shark
 machine-$(CONFIG_ARCH_SHMOBILE)         := shmobile
-machine-$(CONFIG_ARCH_TCC8K)            := tcc8k
 machine-$(CONFIG_ARCH_TEGRA)            := tegra
 machine-$(CONFIG_ARCH_U300)             := u300
 machine-$(CONFIG_ARCH_U8500)            := ux500
@@ -204,7 +203,6 @@ machine-$(CONFIG_ARCH_ZYNQ)		:= zynq
 plat-$(CONFIG_ARCH_MXC)         := mxc
 plat-$(CONFIG_ARCH_OMAP)        := omap
 plat-$(CONFIG_ARCH_S3C64XX)     := samsung
-plat-$(CONFIG_ARCH_TCC_926)     := tcc
 plat-$(CONFIG_ARCH_ZYNQ)        := versatile
 plat-$(CONFIG_PLAT_IOP)         := iop
 plat-$(CONFIG_PLAT_NOMADIK)     := nomadik
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 21f56ff32797..cf0a64ce4b83 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -126,7 +126,8 @@ ccflags-y := -fpic -fno-builtin -I$(obj)
 asflags-y := -Wa,-march=all
 
 # Supply kernel BSS size to the decompressor via a linker symbol.
-KBSS_SZ = $(shell size $(obj)/../../../../vmlinux | awk 'END{print $$3}')
+KBSS_SZ = $(shell $(CROSS_COMPILE)size $(obj)/../../../../vmlinux | \
+                awk 'END{print $$3}')
 LDFLAGS_vmlinux = --defsym _kernel_bss_size=$(KBSS_SZ)
 # Supply ZRELADDR to the decompressor via a linker symbol.
 ifneq ($(CONFIG_AUTO_ZRELADDR),y)
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
new file mode 100644
index 000000000000..b8c476384eef
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -0,0 +1,137 @@
+/*
+ * Samsung's Exynos4210 based Origen board device tree source
+ *
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ * Copyright (c) 2010-2011 Linaro Ltd.
+ *              www.linaro.org
+ *
+ * Device tree source file for Insignal's Origen board which is based on
+ * Samsung's Exynos4210 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ "exynos4210.dtsi"
+
+/ {
+        model = "Insignal Origen evaluation board based on Exynos4210";
+        compatible = "insignal,origen", "samsung,exynos4210";
+
+        memory {
+                reg = <0x40000000 0x40000000>;
+        };
+
+        chosen {
+                bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc";
+        };
+
+        sdhci@12530000 {
+                samsung,sdhci-bus-width = <4>;
+                linux,mmc_cap_4_bit_data;
+                samsung,sdhci-cd-internal;
+                gpio-cd = <&gpk2 2 2 3 3>;
+                gpios = <&gpk2 0 2 0 3>,
+                        <&gpk2 1 2 0 3>,
+                        <&gpk2 3 2 3 3>,
+                        <&gpk2 4 2 3 3>,
+                        <&gpk2 5 2 3 3>,
+                        <&gpk2 6 2 3 3>;
+        };
+
+        sdhci@12510000 {
+                samsung,sdhci-bus-width = <4>;
+                linux,mmc_cap_4_bit_data;
+                samsung,sdhci-cd-internal;
+                gpio-cd = <&gpk0 2 2 3 3>;
+                gpios = <&gpk0 0 2 0 3>,
+                        <&gpk0 1 2 0 3>,
+                        <&gpk0 3 2 3 3>,
+                        <&gpk0 4 2 3 3>,
+                        <&gpk0 5 2 3 3>,
+                        <&gpk0 6 2 3 3>;
+        };
+
+        gpio_keys {
+                compatible = "gpio-keys";
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                up {
+                        label = "Up";
+                        gpios = <&gpx2 0 0 0 2>;
+                        linux,code = <103>;
+                };
+
+                down {
+                        label = "Down";
+                        gpios = <&gpx2 1 0 0 2>;
+                        linux,code = <108>;
+                };
+
+                back {
+                        label = "Back";
+                        gpios = <&gpx1 7 0 0 2>;
+                        linux,code = <158>;
+                };
+
+                home {
+                        label = "Home";
+                        gpios = <&gpx1 6 0 0 2>;
+                        linux,code = <102>;
+                };
+
+                menu {
+                        label = "Menu";
+                        gpios = <&gpx1 5 0 0 2>;
+                        linux,code = <139>;
+                };
+        };
+
+        keypad@100A0000 {
+                status = "disabled";
+        };
+
+        sdhci@12520000 {
+                status = "disabled";
+        };
+
+        sdhci@12540000 {
+                status = "disabled";
+        };
+
+        i2c@13860000 {
+                status = "disabled";
+        };
+
+        i2c@13870000 {
+                status = "disabled";
+        };
+
+        i2c@13880000 {
+                status = "disabled";
+        };
+
+        i2c@13890000 {
+                status = "disabled";
+        };
+
+        i2c@138A0000 {
+                status = "disabled";
+        };
+
+        i2c@138B0000 {
+                status = "disabled";
+        };
+
+        i2c@138C0000 {
+                status = "disabled";
+        };
+
+        i2c@138D0000 {
+                status = "disabled";
+        };
+};
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts
new file mode 100644
index 000000000000..27afc8e535ca
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -0,0 +1,182 @@
+/*
+ * Samsung's Exynos4210 based SMDKV310 board device tree source
+ *
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ * Copyright (c) 2010-2011 Linaro Ltd.
+ *              www.linaro.org
+ *
+ * Device tree source file for Samsung's SMDKV310 board which is based on
+ * Samsung's Exynos4210 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ "exynos4210.dtsi"
+
+/ {
+        model = "Samsung smdkv310 evaluation board based on Exynos4210";
+        compatible = "samsung,smdkv310", "samsung,exynos4210";
+
+        memory {
+                reg = <0x40000000 0x80000000>;
+        };
+
+        chosen {
+                bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc";
+        };
+
+        sdhci@12530000 {
+                samsung,sdhci-bus-width = <4>;
+                linux,mmc_cap_4_bit_data;
+                samsung,sdhci-cd-internal;
+                gpio-cd = <&gpk2 2 2 3 3>;
+                gpios = <&gpk2 0 2 0 3>,
+                        <&gpk2 1 2 0 3>,
+                        <&gpk2 3 2 3 3>,
+                        <&gpk2 4 2 3 3>,
+                        <&gpk2 5 2 3 3>,
+                        <&gpk2 6 2 3 3>;
+        };
+
+        keypad@100A0000 {
+                samsung,keypad-num-rows = <2>;
+                samsung,keypad-num-columns = <8>;
+                linux,keypad-no-autorepeat;
+                linux,keypad-wakeup;
+
+                row-gpios = <&gpx2 0 3 3 0>,
+                            <&gpx2 1 3 3 0>;
+
+                col-gpios = <&gpx1 0 3 0 0>,
+                            <&gpx1 1 3 0 0>,
+                            <&gpx1 2 3 0 0>,
+                            <&gpx1 3 3 0 0>,
+                            <&gpx1 4 3 0 0>,
+                            <&gpx1 5 3 0 0>,
+                            <&gpx1 6 3 0 0>,
+                            <&gpx1 7 3 0 0>;
+
+                key_1 {
+                        keypad,row = <0>;
+                        keypad,column = <3>;
+                        linux,code = <2>;
+                };
+
+                key_2 {
+                        keypad,row = <0>;
+                        keypad,column = <4>;
+                        linux,code = <3>;
+                };
+
+                key_3 {
+                        keypad,row = <0>;
+                        keypad,column = <5>;
+                        linux,code = <4>;
+                };
+
+                key_4 {
+                        keypad,row = <0>;
+                        keypad,column = <6>;
+                        linux,code = <5>;
+                };
+
+                key_5 {
+                        keypad,row = <0>;
+                        keypad,column = <7>;
+                        linux,code = <6>;
+                };
+
+                key_a {
+                        keypad,row = <1>;
+                        keypad,column = <3>;
+                        linux,code = <30>;
+                };
+
+                key_b {
+                        keypad,row = <1>;
+                        keypad,column = <4>;
+                        linux,code = <48>;
+                };
+
+                key_c {
+                        keypad,row = <1>;
+                        keypad,column = <5>;
+                        linux,code = <46>;
+                };
+
+                key_d {
+                        keypad,row = <1>;
+                        keypad,column = <6>;
+                        linux,code = <32>;
+                };
+
+                key_e {
+                        keypad,row = <1>;
+                        keypad,column = <7>;
+                        linux,code = <18>;
+                };
+        };
+
+        i2c@13860000 {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <20000>;
+                gpios = <&gpd1 0 2 3 0>,
+                        <&gpd1 1 2 3 0>;
+
+                eeprom@50 {
+                        compatible = "samsung,24ad0xd1";
+                        reg = <0x50>;
+                };
+
+                eeprom@52 {
+                        compatible = "samsung,24ad0xd1";
+                        reg = <0x52>;
+                };
+        };
+
+        sdhci@12510000 {
+                status = "disabled";
+        };
+
+        sdhci@12520000 {
+                status = "disabled";
+        };
+
+        sdhci@12540000 {
+                status = "disabled";
+        };
+
+        i2c@13870000 {
+                status = "disabled";
+        };
+
+        i2c@13880000 {
+                status = "disabled";
+        };
+
+        i2c@13890000 {
+                status = "disabled";
+        };
+
+        i2c@138A0000 {
+                status = "disabled";
+        };
+
+        i2c@138B0000 {
+                status = "disabled";
+        };
+
+        i2c@138C0000 {
+                status = "disabled";
+        };
+
+        i2c@138D0000 {
+                status = "disabled";
+        };
+};
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
new file mode 100644
index 000000000000..63d7578856c1
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -0,0 +1,397 @@
+/*
+ * Samsung's Exynos4210 SoC device tree source
+ *
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ * Copyright (c) 2010-2011 Linaro Ltd.
+ *              www.linaro.org
+ *
+ * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
+ * based board files can include this file and provide values for board specfic
+ * bindings.
+ *
+ * Note: This file does not include device nodes for all the controllers in
+ * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
+ * nodes can be added to this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/include/ "skeleton.dtsi"
+
+/ {
+        compatible = "samsung,exynos4210";
+        interrupt-parent = <&gic>;
+
+        gic:interrupt-controller@10490000 {
+                compatible = "arm,cortex-a9-gic";
+                #interrupt-cells = <3>;
+                interrupt-controller;
+                reg = <0x10490000 0x1000>, <0x10480000 0x100>;
+        };
+
+        watchdog@10060000 {
+                compatible = "samsung,s3c2410-wdt";
+                reg = <0x10060000 0x100>;
+                interrupts = <0 43 0>;
+        };
+
+        rtc@10070000 {
+                compatible = "samsung,s3c6410-rtc";
+                reg = <0x10070000 0x100>;
+                interrupts = <0 44 0>, <0 45 0>;
+        };
+
+        keypad@100A0000 {
+                compatible = "samsung,s5pv210-keypad";
+                reg = <0x100A0000 0x100>;
+                interrupts = <0 109 0>;
+        };
+
+        sdhci@12510000 {
+                compatible = "samsung,exynos4210-sdhci";
+                reg = <0x12510000 0x100>;
+                interrupts = <0 73 0>;
+        };
+
+        sdhci@12520000 {
+                compatible = "samsung,exynos4210-sdhci";
+                reg = <0x12520000 0x100>;
+                interrupts = <0 74 0>;
+        };
+
+        sdhci@12530000 {
+                compatible = "samsung,exynos4210-sdhci";
+                reg = <0x12530000 0x100>;
+                interrupts = <0 75 0>;
+        };
+
+        sdhci@12540000 {
+                compatible = "samsung,exynos4210-sdhci";
+                reg = <0x12540000 0x100>;
+                interrupts = <0 76 0>;
+        };
+
+        serial@13800000 {
+                compatible = "samsung,exynos4210-uart";
+                reg = <0x13800000 0x100>;
+                interrupts = <0 52 0>;
+        };
+
+        serial@13810000 {
+                compatible = "samsung,exynos4210-uart";
+                reg = <0x13810000 0x100>;
+                interrupts = <0 53 0>;
+        };
+
+        serial@13820000 {
+                compatible = "samsung,exynos4210-uart";
+                reg = <0x13820000 0x100>;
+                interrupts = <0 54 0>;
+        };
+
+        serial@13830000 {
+                compatible = "samsung,exynos4210-uart";
+                reg = <0x13830000 0x100>;
+                interrupts = <0 55 0>;
+        };
+
+        i2c@13860000 {
+                compatible = "samsung,s3c2440-i2c";
+                reg = <0x13860000 0x100>;
+                interrupts = <0 58 0>;
+        };
+
+        i2c@13870000 {
+                compatible = "samsung,s3c2440-i2c";
+                reg = <0x13870000 0x100>;
+                interrupts = <0 59 0>;
+        };
+
+        i2c@13880000 {
+                compatible = "samsung,s3c2440-i2c";
+                reg = <0x13880000 0x100>;
+                interrupts = <0 60 0>;
+        };
+
+        i2c@13890000 {
+                compatible = "samsung,s3c2440-i2c";
+                reg = <0x13890000 0x100>;
+                interrupts = <0 61 0>;
+        };
+
+        i2c@138A0000 {
+                compatible = "samsung,s3c2440-i2c";
+                reg = <0x138A0000 0x100>;
+                interrupts = <0 62 0>;
+        };
+
+        i2c@138B0000 {
+                compatible = "samsung,s3c2440-i2c";
+                reg = <0x138B0000 0x100>;
+                interrupts = <0 63 0>;
+        };
+
+        i2c@138C0000 {
+                compatible = "samsung,s3c2440-i2c";
+                reg = <0x138C0000 0x100>;
+                interrupts = <0 64 0>;
+        };
+
+        i2c@138D0000 {
+                compatible = "samsung,s3c2440-i2c";
+                reg = <0x138D0000 0x100>;
+                interrupts = <0 65 0>;
+        };
+
+        amba {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "arm,amba-bus";
+                interrupt-parent = <&gic>;
+                ranges;
+
+                pdma0: pdma@12680000 {
+                        compatible = "arm,pl330", "arm,primecell";
+                        reg = <0x12680000 0x1000>;
+                        interrupts = <0 35 0>;
+                };
+
+                pdma1: pdma@12690000 {
+                        compatible = "arm,pl330", "arm,primecell";
+                        reg = <0x12690000 0x1000>;
+                        interrupts = <0 36 0>;
+                };
+        };
+
+        gpio-controllers {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                gpio-controller;
+                ranges;
+
+                gpa0: gpio-controller@11400000 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400000 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpa1: gpio-controller@11400020 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400020 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpb: gpio-controller@11400040 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400040 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpc0: gpio-controller@11400060 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400060 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpc1: gpio-controller@11400080 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400080 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpd0: gpio-controller@114000A0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x114000A0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpd1: gpio-controller@114000C0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x114000C0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpe0: gpio-controller@114000E0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x114000E0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpe1: gpio-controller@11400100 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400100 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpe2: gpio-controller@11400120 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400120 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpe3: gpio-controller@11400140 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400140 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpe4: gpio-controller@11400160 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400160 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpf0: gpio-controller@11400180 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11400180 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpf1: gpio-controller@114001A0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x114001A0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpf2: gpio-controller@114001C0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x114001C0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpf3: gpio-controller@114001E0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x114001E0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpj0: gpio-controller@11000000 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11000000 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpj1: gpio-controller@11000020 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11000020 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpk0: gpio-controller@11000040 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11000040 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpk1: gpio-controller@11000060 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11000060 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpk2: gpio-controller@11000080 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11000080 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpk3: gpio-controller@110000A0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x110000A0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpl0: gpio-controller@110000C0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x110000C0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpl1: gpio-controller@110000E0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x110000E0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpl2: gpio-controller@11000100 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11000100 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpy0: gpio-controller@11000120 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11000120 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpy1: gpio-controller@11000140 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11000140 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpy2: gpio-controller@11000160 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11000160 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpy3: gpio-controller@11000180 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11000180 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpy4: gpio-controller@110001A0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x110001A0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpy5: gpio-controller@110001C0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x110001C0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpy6: gpio-controller@110001E0 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x110001E0 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpx0: gpio-controller@11000C00 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11000C00 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpx1: gpio-controller@11000C20 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11000C20 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpx2: gpio-controller@11000C40 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11000C40 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpx3: gpio-controller@11000C60 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x11000C60 0x20>;
+                        #gpio-cells = <4>;
+                };
+
+                gpz: gpio-controller@03860000 {
+                        compatible = "samsung,exynos4-gpio";
+                        reg = <0x03860000 0x20>;
+                        #gpio-cells = <4>;
+                };
+        };
+};
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c
index f407a6b35d3d..d8e44a43047c 100644
--- a/arch/arm/common/pl330.c
+++ b/arch/arm/common/pl330.c
@@ -221,17 +221,6 @@
  */
 #define MCODE_BUFF_PER_REQ      256
 
-/*
- * Mark a _pl330_req as free.
- * We do it by writing DMAEND as the first instruction
- * because no valid request is going to have DMAEND as
- * its first instruction to execute.
- */
-#define MARK_FREE(req)  do { \
-                                _emit_END(0, (req)->mc_cpu); \
-                                (req)->mc_len = 0; \
-                        } while (0)
-
 /* If the _pl330_req is available to the client */
 #define IS_FREE(req)    (*((u8 *)((req)->mc_cpu)) == CMD_DMAEND)
 
@@ -301,8 +290,10 @@ struct pl330_thread {
         struct pl330_dmac *dmac;
         /* Only two at a time */
         struct _pl330_req req[2];
-        /* Index of the last submitted request */
+        /* Index of the last enqueued request */
         unsigned lstenq;
+        /* Index of the last submitted request or -1 if the DMA is stopped */
+        int req_running;
 };
 
 enum pl330_dmac_state {
@@ -778,6 +769,22 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd,
         writel(0, regs + DBGCMD);
 }
 
+/*
+ * Mark a _pl330_req as free.
+ * We do it by writing DMAEND as the first instruction
+ * because no valid request is going to have DMAEND as
+ * its first instruction to execute.
+ */
+static void mark_free(struct pl330_thread *thrd, int idx)
+{
+        struct _pl330_req *req = &thrd->req[idx];
+
+        _emit_END(0, req->mc_cpu);
+        req->mc_len = 0;
+
+        thrd->req_running = -1;
+}
+
 static inline u32 _state(struct pl330_thread *thrd)
 {
         void __iomem *regs = thrd->dmac->pinfo->base;
@@ -836,31 +843,6 @@ static inline u32 _state(struct pl330_thread *thrd)
         }
 }
 
-/* If the request 'req' of thread 'thrd' is currently active */
-static inline bool _req_active(struct pl330_thread *thrd,
-                struct _pl330_req *req)
-{
-        void __iomem *regs = thrd->dmac->pinfo->base;
-        u32 buf = req->mc_bus, pc = readl(regs + CPC(thrd->id));
-
-        if (IS_FREE(req))
-                return false;
-
-        return (pc >= buf && pc <= buf + req->mc_len) ? true : false;
-}
-
-/* Returns 0 if the thread is inactive, ID of active req + 1 otherwise */
-static inline unsigned _thrd_active(struct pl330_thread *thrd)
-{
-        if (_req_active(thrd, &thrd->req[0]))
-                return 1; /* First req active */
-
-        if (_req_active(thrd, &thrd->req[1]))
-                return 2; /* Second req active */
-
-        return 0;
-}
-
 static void _stop(struct pl330_thread *thrd)
 {
         void __iomem *regs = thrd->dmac->pinfo->base;
@@ -892,17 +874,22 @@ static bool _trigger(struct pl330_thread *thrd)
         struct _arg_GO go;
         unsigned ns;
         u8 insn[6] = {0, 0, 0, 0, 0, 0};
+        int idx;
 
         /* Return if already ACTIVE */
         if (_state(thrd) != PL330_STATE_STOPPED)
                 return true;
 
-        if (!IS_FREE(&thrd->req[1 - thrd->lstenq]))
-                req = &thrd->req[1 - thrd->lstenq];
-        else if (!IS_FREE(&thrd->req[thrd->lstenq]))
-                req = &thrd->req[thrd->lstenq];
-        else
-                req = NULL;
+        idx = 1 - thrd->lstenq;
+        if (!IS_FREE(&thrd->req[idx]))
+                req = &thrd->req[idx];
+        else {
+                idx = thrd->lstenq;
+                if (!IS_FREE(&thrd->req[idx]))
+                        req = &thrd->req[idx];
+                else
+                        req = NULL;
+        }
 
         /* Return if no request */
         if (!req || !req->r)
@@ -933,6 +920,8 @@ static bool _trigger(struct pl330_thread *thrd)
         /* Only manager can execute GO */
         _execute_DBGINSN(thrd, insn, true);
 
+        thrd->req_running = idx;
+
         return true;
 }
 
@@ -1382,8 +1371,8 @@ static void pl330_dotask(unsigned long data)
 
                         thrd->req[0].r = NULL;
                         thrd->req[1].r = NULL;
-                        MARK_FREE(&thrd->req[0]);
-                        MARK_FREE(&thrd->req[1]);
+                        mark_free(thrd, 0);
+                        mark_free(thrd, 1);
 
                         /* Clear the reset flag */
                         pl330->dmac_tbd.reset_chan &= ~(1 << i);
@@ -1461,14 +1450,12 @@ int pl330_update(const struct pl330_info *pi)
 
                         thrd = &pl330->channels[id];
 
-                        active = _thrd_active(thrd);
-                        if (!active) /* Aborted */
+                        active = thrd->req_running;
+                        if (active == -1) /* Aborted */
                                 continue;
 
-                        active -= 1;
-
                         rqdone = &thrd->req[active];
-                        MARK_FREE(rqdone);
+                        mark_free(thrd, active);
 
                         /* Get going again ASAP */
                         _start(thrd);
@@ -1480,13 +1467,19 @@ int pl330_update(const struct pl330_info *pi)
 
         /* Now that we are in no hurry, do the callbacks */
         while (!list_empty(&pl330->req_done)) {
+                struct pl330_req *r;
+
                 rqdone = container_of(pl330->req_done.next,
                                         struct _pl330_req, rqd);
 
                 list_del_init(&rqdone->rqd);
 
+                /* Detach the req */
+                r = rqdone->r;
+                rqdone->r = NULL;
+
                 spin_unlock_irqrestore(&pl330->lock, flags);
-                _callback(rqdone->r, PL330_ERR_NONE);
+                _callback(r, PL330_ERR_NONE);
                 spin_lock_irqsave(&pl330->lock, flags);
         }
 
@@ -1509,7 +1502,7 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
         struct pl330_thread *thrd = ch_id;
         struct pl330_dmac *pl330;
         unsigned long flags;
-        int ret = 0, active;
+        int ret = 0, active = thrd->req_running;
 
         if (!thrd || thrd->free || thrd->dmac->state == DYING)
                 return -EINVAL;
@@ -1525,28 +1518,24 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
 
                 thrd->req[0].r = NULL;
                 thrd->req[1].r = NULL;
-                MARK_FREE(&thrd->req[0]);
-                MARK_FREE(&thrd->req[1]);
+                mark_free(thrd, 0);
+                mark_free(thrd, 1);
                 break;
 
         case PL330_OP_ABORT:
-                active = _thrd_active(thrd);
-
                 /* Make sure the channel is stopped */
                 _stop(thrd);
 
                 /* ABORT is only for the active req */
-                if (!active)
+                if (active == -1)
                         break;
 
-                active--;
-
                 thrd->req[active].r = NULL;
-                MARK_FREE(&thrd->req[active]);
+                mark_free(thrd, active);
 
                 /* Start the next */
         case PL330_OP_START:
-                if (!_thrd_active(thrd) && !_start(thrd))
+                if ((active == -1) && !_start(thrd))
                         ret = -EIO;
                 break;
 
@@ -1587,14 +1576,13 @@ int pl330_chan_status(void *ch_id, struct pl330_chanstatus *pstatus)
         else
                 pstatus->faulting = false;
 
-        active = _thrd_active(thrd);
+        active = thrd->req_running;
 
-        if (!active) {
+        if (active == -1) {
                 /* Indicate that the thread is not running */
                 pstatus->top_req = NULL;
                 pstatus->wait_req = NULL;
         } else {
-                active--;
                 pstatus->top_req = thrd->req[active].r;
                 pstatus->wait_req = !IS_FREE(&thrd->req[1 - active])
                                         ? thrd->req[1 - active].r : NULL;
@@ -1659,9 +1647,9 @@ void *pl330_request_channel(const struct pl330_info *pi)
                                 thrd->free = false;
                                 thrd->lstenq = 1;
                                 thrd->req[0].r = NULL;
-                                MARK_FREE(&thrd->req[0]);
+                                mark_free(thrd, 0);
                                 thrd->req[1].r = NULL;
-                                MARK_FREE(&thrd->req[1]);
+                                mark_free(thrd, 1);
                                 break;
                         }
                 }
@@ -1767,14 +1755,14 @@ static inline void _reset_thread(struct pl330_thread *thrd)
         thrd->req[0].mc_bus = pl330->mcode_bus
                                 + (thrd->id * pi->mcbufsz);
         thrd->req[0].r = NULL;
-        MARK_FREE(&thrd->req[0]);
+        mark_free(thrd, 0);
 
         thrd->req[1].mc_cpu = thrd->req[0].mc_cpu
                                 + pi->mcbufsz / 2;
         thrd->req[1].mc_bus = thrd->req[0].mc_bus
                                 + pi->mcbufsz / 2;
         thrd->req[1].r = NULL;
-        MARK_FREE(&thrd->req[1]);
+        mark_free(thrd, 1);
 }
 
 static int dmac_alloc_threads(struct pl330_dmac *pl330)
diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c
index 2393b5bc96fa..8794a34eae61 100644
--- a/arch/arm/common/timer-sp.c
+++ b/arch/arm/common/timer-sp.c
@@ -143,7 +143,6 @@ static int sp804_set_next_event(unsigned long next,
 }
 
 static struct clock_event_device sp804_clockevent = {
-        .shift          = 32,
         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
         .set_mode       = sp804_set_mode,
         .set_next_event = sp804_set_next_event,
@@ -169,13 +168,9 @@ void __init sp804_clockevents_init(void __iomem *base, unsigned int irq,
 
         clkevt_base = base;
         clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ);
-
         evt->name = name;
         evt->irq = irq;
-        evt->mult = div_sc(rate, NSEC_PER_SEC, evt->shift);
-        evt->max_delta_ns = clockevent_delta2ns(0xffffffff, evt);
-        evt->min_delta_ns = clockevent_delta2ns(0xf, evt);
 
         setup_irq(irq, &sp804_timer_irq);
-        clockevents_register_device(evt);
+        clockevents_config_and_register(evt, rate, 0xf, 0xffffffff);
 }
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 77287504c8b4..dcb004a804c7 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -197,8 +197,8 @@ static void __init vic_register(void __iomem *base, unsigned int irq,
         v->domain.nr_irq = 32;
 #ifdef CONFIG_OF_IRQ
         v->domain.of_node = of_node_get(node);
-        v->domain.ops = &irq_domain_simple_ops;
 #endif /* CONFIG_OF */
+        v->domain.ops = &irq_domain_simple_ops;
         irq_domain_add(&v->domain);
 }
 
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index fccb4703bacb..a22e93079063 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -18,9 +18,10 @@ CONFIG_ARCH_MXC=y
 CONFIG_ARCH_IMX_V4_V5=y
 CONFIG_ARCH_MX1ADS=y
 CONFIG_MACH_SCB9328=y
+CONFIG_MACH_APF9328=y
 CONFIG_MACH_MX21ADS=y
 CONFIG_MACH_MX25_3DS=y
-CONFIG_MACH_EUKREA_CPUIMX25=y
+CONFIG_MACH_EUKREA_CPUIMX25SD=y
 CONFIG_MACH_MX27ADS=y
 CONFIG_MACH_PCM038=y
 CONFIG_MACH_CPUIMX27=y
@@ -71,17 +72,16 @@ CONFIG_MTD_CFI_GEOMETRY=y
 CONFIG_MTD_CFI_INTELEXT=y
 CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_MXC=y
 CONFIG_MTD_UBI=y
 CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_AT24=y
 CONFIG_EEPROM_AT25=y
 CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
 CONFIG_DM9000=y
+CONFIG_SMC91X=y
 CONFIG_SMC911X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
+CONFIG_SMSC_PHY=y
 # CONFIG_INPUT_MOUSEDEV is not set
 CONFIG_INPUT_EVDEV=y
 # CONFIG_INPUT_KEYBOARD is not set
@@ -99,6 +99,7 @@ CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_IMX=y
 CONFIG_SPI=y
 CONFIG_SPI_IMX=y
+CONFIG_SPI_SPIDEV=y
 CONFIG_W1=y
 CONFIG_W1_MASTER_MXC=y
 CONFIG_W1_SLAVE_THERM=y
@@ -138,6 +139,7 @@ CONFIG_MMC=y
 CONFIG_MMC_MXC=y
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
 CONFIG_LEDS_MC13783=y
 CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_TIMER=y
diff --git a/arch/arm/configs/pcontrol_g20_defconfig b/arch/arm/configs/pcontrol_g20_defconfig
deleted file mode 100644
index c75c9fcede58..000000000000
--- a/arch/arm/configs/pcontrol_g20_defconfig
+++ /dev/null
@@ -1,175 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_CROSS_COMPILE="/opt/arm-2010q1/bin/arm-none-linux-gnueabi-"
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_TREE_PREEMPT_RCU=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_NAMESPACES=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EXPERT=y
-# CONFIG_SYSCTL_SYSCALL is not set
-# CONFIG_KALLSYMS is not set
-# CONFIG_VM_EVENT_COUNTERS is not set
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_DEFAULT_DEADLINE=y
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9G20=y
-CONFIG_MACH_PCONTROL_G20=y
-CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-# CONFIG_OABI_COMPAT is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttyS0,115200 mem=128M mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) root=/dev/mmcblk0p1 rootwait rw"
-CONFIG_VFP=y
-CONFIG_BINFMT_MISC=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_VLAN_8021Q=y
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_FW_LOADER is not set
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-CONFIG_MTD_PHRAM=m
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ATMEL=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_ATMEL_TCLIB=y
-CONFIG_EEPROM_AT24=m
-CONFIG_SCSI=m
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_BLK_DEV_SD=m
-CONFIG_SCSI_MULTI_LUN=y
-# CONFIG_SCSI_LOWLEVEL is not set
-CONFIG_NETDEVICES=y
-CONFIG_MACVLAN=m
-CONFIG_TUN=m
-CONFIG_SMSC_PHY=m
-CONFIG_BROADCOM_PHY=m
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-CONFIG_MACB=y
-CONFIG_SMSC911X=m
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_WLAN is not set
-CONFIG_PPP=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_MPPE=m
-CONFIG_INPUT_POLLDEV=y
-CONFIG_INPUT_SPARSEKMAP=y
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=m
-CONFIG_INPUT_EVBUG=m
-# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_GPIO=m
-CONFIG_KEYBOARD_MATRIX=m
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=m
-CONFIG_INPUT_GPIO_ROTARY_ENCODER=m
-# CONFIG_SERIO is not set
-# CONFIG_DEVKMEM is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-CONFIG_SERIAL_MAX3100=m
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_R3964=m
-CONFIG_I2C=m
-CONFIG_I2C_CHARDEV=m
-# CONFIG_I2C_HELPER_AUTO is not set
-CONFIG_I2C_GPIO=m
-CONFIG_SPI=y
-CONFIG_SPI_ATMEL=m
-CONFIG_SPI_SPIDEV=m
-CONFIG_GPIO_SYSFS=y
-CONFIG_W1=m
-CONFIG_W1_MASTER_GPIO=m
-CONFIG_W1_SLAVE_DS2431=m
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_AT91SAM9X_WATCHDOG=y
-# CONFIG_MFD_SUPPORT is not set
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=m
-CONFIG_USB_LIBUSUAL=y
-CONFIG_USB_SERIAL=m
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_FTDI_SIO=m
-CONFIG_USB_SERIAL_PL2303=m
-CONFIG_USB_GADGET=y
-CONFIG_USB_ZERO=m
-CONFIG_USB_ETH=m
-CONFIG_USB_FILE_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_USB_G_HID=m
-CONFIG_MMC=y
-CONFIG_MMC_UNSAFE_RESUME=y
-CONFIG_MMC_ATMELMCI=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_LEDS_TRIGGER_TIMER=y
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AT91SAM9=y
-CONFIG_AUXDISPLAY=y
-CONFIG_UIO=y
-CONFIG_UIO_PDRV=y
-CONFIG_STAGING=y
-# CONFIG_STAGING_EXCLUDE_BUILD is not set
-CONFIG_IIO=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_NLS_UTF8=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_ANSI_CPRNG=y
-# CONFIG_CRYPTO_HW is not set
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/include/asm/bug.h b/arch/arm/include/asm/bug.h
index 9abe7a07d5ac..fac79dceb736 100644
--- a/arch/arm/include/asm/bug.h
+++ b/arch/arm/include/asm/bug.h
@@ -32,7 +32,6 @@
 
 #define __BUG(__file, __line, __value)                          \
 do {                                                            \
-        BUILD_BUG_ON(sizeof(struct bug_entry) != 12);           \
         asm volatile("1:\t" BUG_INSTR_TYPE #__value "\n"        \
                 ".pushsection .rodata.str, \"aMS\", %progbits, 1\n" \
                 "2:\t.asciz " #__file "\n"                      \
diff --git a/arch/arm/include/asm/edac.h b/arch/arm/include/asm/edac.h
new file mode 100644
index 000000000000..0df7a2c1fc3d
--- /dev/null
+++ b/arch/arm/include/asm/edac.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright 2011 Calxeda, Inc.
+ * Based on PPC version Copyright 2007 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef ASM_EDAC_H
+#define ASM_EDAC_H
+/*
+ * ECC atomic, DMA, SMP and interrupt safe scrub function.
+ * Implements the per arch atomic_scrub() that EDAC use for software
+ * ECC scrubbing.  It reads memory and then writes back the original
+ * value, allowing the hardware to detect and correct memory errors.
+ */
+static inline void atomic_scrub(void *va, u32 size)
+{
+#if __LINUX_ARM_ARCH__ >= 6
+        unsigned int *virt_addr = va;
+        unsigned int temp, temp2;
+        unsigned int i;
+
+        for (i = 0; i < size / sizeof(*virt_addr); i++, virt_addr++) {
+                /* Very carefully read and write to memory atomically
+                 * so we are interrupt, DMA and SMP safe.
+                 */
+                __asm__ __volatile__("\n"
+                        "1:     ldrex   %0, [%2]\n"
+                        "       strex   %1, %0, [%2]\n"
+                        "       teq     %1, #0\n"
+                        "       bne     1b\n"
+                        : "=&r"(temp), "=&r"(temp2)
+                        : "r"(virt_addr)
+                        : "cc");
+        }
+#endif
+}
+
+#endif
diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
index 11ad0bfbb0ad..7151753b0989 100644
--- a/arch/arm/include/asm/gpio.h
+++ b/arch/arm/include/asm/gpio.h
@@ -1,6 +1,10 @@
 #ifndef _ARCH_ARM_GPIO_H
 #define _ARCH_ARM_GPIO_H
 
+#if CONFIG_ARCH_NR_GPIO > 0
+#define ARCH_NR_GPIO CONFIG_ARCH_NR_GPIO
+#endif
+
 /* not all ARM platforms necessarily support this API ... */
 #include <mach/gpio.h>
 
diff --git a/arch/arm/include/asm/hardirq.h b/arch/arm/include/asm/hardirq.h
index ddf07a92a6c8..436e60b2cf7a 100644
--- a/arch/arm/include/asm/hardirq.h
+++ b/arch/arm/include/asm/hardirq.h
@@ -27,23 +27,6 @@ u64 smp_irq_stat_cpu(unsigned int cpu);
 
 #define arch_irq_stat_cpu       smp_irq_stat_cpu
 
-#if NR_IRQS > 512
-#define HARDIRQ_BITS    10
-#elif NR_IRQS > 256
-#define HARDIRQ_BITS    9
-#else
-#define HARDIRQ_BITS    8
-#endif
-
-/*
- * The hardirq mask has to be large enough to have space
- * for potentially all IRQ sources in the system nesting
- * on a single CPU:
- */
-#if (1 << HARDIRQ_BITS) < NR_IRQS
-# error HARDIRQ_BITS is too low!
-#endif
-
 #define __ARCH_IRQ_EXIT_IRQS_DISABLED   1
 
 #endif /* __ASM_HARDIRQ_H */
diff --git a/arch/arm/include/asm/hardware/iop3xx.h b/arch/arm/include/asm/hardware/iop3xx.h
index 5daea2961d48..077c32326c63 100644
--- a/arch/arm/include/asm/hardware/iop3xx.h
+++ b/arch/arm/include/asm/hardware/iop3xx.h
@@ -234,6 +234,7 @@ extern int iop3xx_get_init_atu(void);
 void iop3xx_map_io(void);
 void iop_init_cp6_handler(void);
 void iop_init_time(unsigned long tickrate);
+void iop3xx_restart(char, const char *);
 
 static inline u32 read_tmr0(void)
 {
diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h
new file mode 100644
index 000000000000..c0efdd60966f
--- /dev/null
+++ b/arch/arm/include/asm/opcodes.h
@@ -0,0 +1,20 @@
+/*
+ *  arch/arm/include/asm/opcodes.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARM_OPCODES_H
+#define __ASM_ARM_OPCODES_H
+
+#ifndef __ASSEMBLY__
+extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
+#endif
+
+#define ARM_OPCODE_CONDTEST_FAIL   0
+#define ARM_OPCODE_CONDTEST_PASS   1
+#define ARM_OPCODE_CONDTEST_UNCOND 2
+
+#endif /* __ASM_ARM_OPCODES_H */
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index 3f2f0eb76211..f66626d71e7d 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -42,13 +42,6 @@
 #define VMALLOC_START           (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
 #define VMALLOC_END             0xff000000UL
 
-/* This is a temporary hack until shmobile's DMA area size is sorted out */
-#ifdef CONFIG_ARCH_SHMOBILE
-#warning "SH-Mobile's consistent DMA size conflicts with VMALLOC_END by 144MB"
-#undef VMALLOC_END
-#define VMALLOC_END             0xF6000000UL
-#endif
-
 #define LIBRARY_TEXT_START      0x0c000000
 
 #ifndef __ASSEMBLY__
@@ -306,6 +299,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
  * We provide our own arch_get_unmapped_area to cope with VIPT caches.
  */
 #define HAVE_ARCH_UNMAPPED_AREA
+#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
 
 /*
  * remap a physical page `pfn' of size `size' with page protection `prot'
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index b2d9df5667af..ce280b8d613c 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -123,6 +123,8 @@ static inline void prefetch(const void *ptr)
 
 #endif
 
+#define HAVE_ARCH_PICK_MMAP_LAYOUT
+
 #endif
 
 #endif /* __ASM_ARM_PROCESSOR_H */
diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h
index c8e6ddf3e860..e3f757263438 100644
--- a/arch/arm/include/asm/sched_clock.h
+++ b/arch/arm/include/asm/sched_clock.h
@@ -8,113 +8,7 @@
 #ifndef ASM_SCHED_CLOCK
 #define ASM_SCHED_CLOCK
 
-#include <linux/kernel.h>
-#include <linux/types.h>
-
-struct clock_data {
-        u64 epoch_ns;
-        u32 epoch_cyc;
-        u32 epoch_cyc_copy;
-        u32 mult;
-        u32 shift;
-};
-
-#define DEFINE_CLOCK_DATA(name) struct clock_data name
-
-static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)
-{
-        return (cyc * mult) >> shift;
-}
-
-/*
- * Atomically update the sched_clock epoch.  Your update callback will
- * be called from a timer before the counter wraps - read the current
- * counter value, and call this function to safely move the epochs
- * forward.  Only use this from the update callback.
- */
-static inline void update_sched_clock(struct clock_data *cd, u32 cyc, u32 mask)
-{
-        unsigned long flags;
-        u64 ns = cd->epoch_ns +
-                cyc_to_ns((cyc - cd->epoch_cyc) & mask, cd->mult, cd->shift);
-
-        /*
-         * Write epoch_cyc and epoch_ns in a way that the update is
-         * detectable in cyc_to_fixed_sched_clock().
-         */
-        raw_local_irq_save(flags);
-        cd->epoch_cyc = cyc;
-        smp_wmb();
-        cd->epoch_ns = ns;
-        smp_wmb();
-        cd->epoch_cyc_copy = cyc;
-        raw_local_irq_restore(flags);
-}
-
-/*
- * If your clock rate is known at compile time, using this will allow
- * you to optimize the mult/shift loads away.  This is paired with
- * init_fixed_sched_clock() to ensure that your mult/shift are correct.
- */
-static inline unsigned long long cyc_to_fixed_sched_clock(struct clock_data *cd,
-        u32 cyc, u32 mask, u32 mult, u32 shift)
-{
-        u64 epoch_ns;
-        u32 epoch_cyc;
-
-        /*
-         * Load the epoch_cyc and epoch_ns atomically.  We do this by
-         * ensuring that we always write epoch_cyc, epoch_ns and
-         * epoch_cyc_copy in strict order, and read them in strict order.
-         * If epoch_cyc and epoch_cyc_copy are not equal, then we're in
-         * the middle of an update, and we should repeat the load.
-         */
-        do {
-                epoch_cyc = cd->epoch_cyc;
-                smp_rmb();
-                epoch_ns = cd->epoch_ns;
-                smp_rmb();
-        } while (epoch_cyc != cd->epoch_cyc_copy);
-
-        return epoch_ns + cyc_to_ns((cyc - epoch_cyc) & mask, mult, shift);
-}
-
-/*
- * Otherwise, you need to use this, which will obtain the mult/shift
- * from the clock_data structure.  Use init_sched_clock() with this.
- */
-static inline unsigned long long cyc_to_sched_clock(struct clock_data *cd,
-        u32 cyc, u32 mask)
-{
-        return cyc_to_fixed_sched_clock(cd, cyc, mask, cd->mult, cd->shift);
-}
-
-/*
- * Initialize the clock data - calculate the appropriate multiplier
- * and shift.  Also setup a timer to ensure that the epoch is refreshed
- * at the appropriate time interval, which will call your update
- * handler.
- */
-void init_sched_clock(struct clock_data *, void (*)(void),
-        unsigned int, unsigned long);
-
-/*
- * Use this initialization function rather than init_sched_clock() if
- * you're using cyc_to_fixed_sched_clock, which will warn if your
- * constants are incorrect.
- */
-static inline void init_fixed_sched_clock(struct clock_data *cd,
-        void (*update)(void), unsigned int bits, unsigned long rate,
-        u32 mult, u32 shift)
-{
-        init_sched_clock(cd, update, bits, rate);
-        if (cd->mult != mult || cd->shift != shift) {
-                pr_crit("sched_clock: wrong multiply/shift: %u>>%u vs calculated %u>>%u\n"
-                        "sched_clock: fix multiply/shift to avoid scheduler hiccups\n",
-                        mult, shift, cd->mult, cd->shift);
-        }
-}
-
 extern void sched_clock_postinit(void);
+extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
 
 #endif
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index 915696dd9c7c..23ebc0c82a39 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -192,11 +192,7 @@ static const struct tagtable __tagtable_##fn __tag = { tag, fn }
 /*
  * Memory map description
  */
-#ifdef CONFIG_ARCH_EP93XX
-# define NR_BANKS 16
-#else
-# define NR_BANKS 8
-#endif
+#define NR_BANKS        CONFIG_ARM_NR_BANKS
 
 struct membank {
         phys_addr_t start;
diff --git a/arch/arm/include/asm/swab.h b/arch/arm/include/asm/swab.h
index 9997ad20eff1..32ee164a2f6b 100644
--- a/arch/arm/include/asm/swab.h
+++ b/arch/arm/include/asm/swab.h
@@ -24,12 +24,13 @@
 
 #if defined(__KERNEL__) && __LINUX_ARM_ARCH__ >= 6
 
-static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
+static inline __attribute_const__ __u32 __arch_swahb32(__u32 x)
 {
         __asm__ ("rev16 %0, %1" : "=r" (x) : "r" (x));
         return x;
 }
-#define __arch_swab16 __arch_swab16
+#define __arch_swahb32 __arch_swahb32
+#define __arch_swab16(x) ((__u16)__arch_swahb32(x))
 
 static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
 {
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 53785828744c..e4c96cc6ec0c 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -108,7 +108,6 @@ extern void __show_regs(struct pt_regs *);
 extern int __pure cpu_architecture(void);
 extern void cpu_init(void);
 
-void arm_machine_restart(char mode, const char *cmd);
 void soft_restart(unsigned long);
 extern void (*arm_pm_restart)(char str, const char *cmd);
 
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 16eed6aebfa4..43b740d0e374 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -13,7 +13,7 @@ CFLAGS_REMOVE_return_address.o = -pg
 
 # Object file lists.
 
-obj-y           := elf.o entry-armv.o entry-common.o irq.o \
+obj-y           := elf.o entry-armv.o entry-common.o irq.o opcodes.o \
                    process.o ptrace.o return_address.o setup.o signal.o \
                    sys_arm.o stacktrace.o time.o traps.o
 
diff --git a/arch/arm/kernel/kprobes-test.c b/arch/arm/kernel/kprobes-test.c
index e17cdd6d90d8..1862d8f2fd44 100644
--- a/arch/arm/kernel/kprobes-test.c
+++ b/arch/arm/kernel/kprobes-test.c
@@ -202,6 +202,8 @@
 #include <linux/slab.h>
 #include <linux/kprobes.h>
 
+#include <asm/opcodes.h>
+
 #include "kprobes.h"
 #include "kprobes-test.h"
 
@@ -1050,65 +1052,9 @@ static int test_instance;
 
 static unsigned long test_check_cc(int cc, unsigned long cpsr)
 {
-        unsigned long temp;
-
-        switch (cc) {
-        case 0x0: /* eq */
-                return cpsr & PSR_Z_BIT;
-
-        case 0x1: /* ne */
-                return (~cpsr) & PSR_Z_BIT;
-
-        case 0x2: /* cs */
-                return cpsr & PSR_C_BIT;
-
-        case 0x3: /* cc */
-                return (~cpsr) & PSR_C_BIT;
-
-        case 0x4: /* mi */
-                return cpsr & PSR_N_BIT;
-
-        case 0x5: /* pl */
-                return (~cpsr) & PSR_N_BIT;
-
-        case 0x6: /* vs */
-                return cpsr & PSR_V_BIT;
-
-        case 0x7: /* vc */
-                return (~cpsr) & PSR_V_BIT;
+        int ret = arm_check_condition(cc << 28, cpsr);
 
-        case 0x8: /* hi */
-                cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
-                return cpsr & PSR_C_BIT;
-
-        case 0x9: /* ls */
-                cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
-                return (~cpsr) & PSR_C_BIT;
-
-        case 0xa: /* ge */
-                cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
-                return (~cpsr) & PSR_N_BIT;
-
-        case 0xb: /* lt */
-                cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
-                return cpsr & PSR_N_BIT;
-
-        case 0xc: /* gt */
-                temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
-                temp |= (cpsr << 1);       /* PSR_N_BIT |= PSR_Z_BIT */
-                return (~temp) & PSR_N_BIT;
-
-        case 0xd: /* le */
-                temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
-                temp |= (cpsr << 1);       /* PSR_N_BIT |= PSR_Z_BIT */
-                return temp & PSR_N_BIT;
-
-        case 0xe: /* al */
-        case 0xf: /* unconditional */
-                return true;
-        }
-        BUG();
-        return false;
+        return (ret != ARM_OPCODE_CONDTEST_FAIL);
 }
 
 static int is_last_scenario;
@@ -1128,7 +1074,9 @@ static unsigned long test_context_cpsr(int scenario)
 
         if (!test_case_is_thumb) {
                 /* Testing ARM code */
-                probe_should_run = test_check_cc(current_instruction >> 28, cpsr) != 0;
+                int cc = current_instruction >> 28;
+
+                probe_should_run = test_check_cc(cc, cpsr) != 0;
                 if (scenario == 15)
                         is_last_scenario = true;
 
diff --git a/arch/arm/kernel/opcodes.c b/arch/arm/kernel/opcodes.c
new file mode 100644
index 000000000000..f8179c6a817f
--- /dev/null
+++ b/arch/arm/kernel/opcodes.c
@@ -0,0 +1,72 @@
+/*
+ *  linux/arch/arm/kernel/opcodes.c
+ *
+ *  A32 condition code lookup feature moved from nwfpe/fpopcode.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <asm/opcodes.h>
+
+#define ARM_OPCODE_CONDITION_UNCOND 0xf
+
+/*
+ * condition code lookup table
+ * index into the table is test code: EQ, NE, ... LT, GT, AL, NV
+ *
+ * bit position in short is condition code: NZCV
+ */
+static const unsigned short cc_map[16] = {
+        0xF0F0,                 /* EQ == Z set            */
+        0x0F0F,                 /* NE                     */
+        0xCCCC,                 /* CS == C set            */
+        0x3333,                 /* CC                     */
+        0xFF00,                 /* MI == N set            */
+        0x00FF,                 /* PL                     */
+        0xAAAA,                 /* VS == V set            */
+        0x5555,                 /* VC                     */
+        0x0C0C,                 /* HI == C set && Z clear */
+        0xF3F3,                 /* LS == C clear || Z set */
+        0xAA55,                 /* GE == (N==V)           */
+        0x55AA,                 /* LT == (N!=V)           */
+        0x0A05,                 /* GT == (!Z && (N==V))   */
+        0xF5FA,                 /* LE == (Z || (N!=V))    */
+        0xFFFF,                 /* AL always              */
+        0                       /* NV                     */
+};
+
+/*
+ * Returns:
+ * ARM_OPCODE_CONDTEST_FAIL   - if condition fails
+ * ARM_OPCODE_CONDTEST_PASS   - if condition passes (including AL)
+ * ARM_OPCODE_CONDTEST_UNCOND - if NV condition, or separate unconditional
+ *                              opcode space from v5 onwards
+ *
+ * Code that tests whether a conditional instruction would pass its condition
+ * check should check that return value == ARM_OPCODE_CONDTEST_PASS.
+ *
+ * Code that tests if a condition means that the instruction would be executed
+ * (regardless of conditional or unconditional) should instead check that the
+ * return value != ARM_OPCODE_CONDTEST_FAIL.
+ */
+asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr)
+{
+        u32 cc_bits  = opcode >> 28;
+        u32 psr_cond = psr >> 28;
+        unsigned int ret;
+
+        if (cc_bits != ARM_OPCODE_CONDITION_UNCOND) {
+                if ((cc_map[cc_bits] >> (psr_cond)) & 1)
+                        ret = ARM_OPCODE_CONDTEST_PASS;
+                else
+                        ret = ARM_OPCODE_CONDTEST_FAIL;
+        } else {
+                ret = ARM_OPCODE_CONDTEST_UNCOND;
+        }
+
+        return ret;
+}
+EXPORT_SYMBOL_GPL(arm_check_condition);
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 423bb2019451..b29776aa6586 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -147,14 +147,8 @@ void soft_restart(unsigned long addr)
         BUG();
 }
 
-void arm_machine_restart(char mode, const char *cmd)
+static void null_restart(char mode, const char *cmd)
 {
-        /* Disable interrupts first */
-        local_irq_disable();
-        local_fiq_disable();
-
-        /* Call the architecture specific reboot code. */
-        arch_reset(mode, cmd);
 }
 
 /*
@@ -163,7 +157,7 @@ void arm_machine_restart(char mode, const char *cmd)
 void (*pm_power_off)(void);
 EXPORT_SYMBOL(pm_power_off);
 
-void (*arm_pm_restart)(char str, const char *cmd) = arm_machine_restart;
+void (*arm_pm_restart)(char str, const char *cmd) = null_restart;
 EXPORT_SYMBOL_GPL(arm_pm_restart);
 
 static void do_nothing(void *unused)
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index 9a46370fe9da..5416c7c12528 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -14,61 +14,153 @@
 
 #include <asm/sched_clock.h>
 
+struct clock_data {
+        u64 epoch_ns;
+        u32 epoch_cyc;
+        u32 epoch_cyc_copy;
+        u32 mult;
+        u32 shift;
+};
+
 static void sched_clock_poll(unsigned long wrap_ticks);
 static DEFINE_TIMER(sched_clock_timer, sched_clock_poll, 0, 0);
-static void (*sched_clock_update_fn)(void);
+
+static struct clock_data cd = {
+        .mult   = NSEC_PER_SEC / HZ,
+};
+
+static u32 __read_mostly sched_clock_mask = 0xffffffff;
+
+static u32 notrace jiffy_sched_clock_read(void)
+{
+        return (u32)(jiffies - INITIAL_JIFFIES);
+}
+
+static u32 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read;
+
+static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)
+{
+        return (cyc * mult) >> shift;
+}
+
+static unsigned long long cyc_to_sched_clock(u32 cyc, u32 mask)
+{
+        u64 epoch_ns;
+        u32 epoch_cyc;
+
+        /*
+         * Load the epoch_cyc and epoch_ns atomically.  We do this by
+         * ensuring that we always write epoch_cyc, epoch_ns and
+         * epoch_cyc_copy in strict order, and read them in strict order.
+         * If epoch_cyc and epoch_cyc_copy are not equal, then we're in
+         * the middle of an update, and we should repeat the load.
+         */
+        do {
+                epoch_cyc = cd.epoch_cyc;
+                smp_rmb();
+                epoch_ns = cd.epoch_ns;
+                smp_rmb();
+        } while (epoch_cyc != cd.epoch_cyc_copy);
+
+        return epoch_ns + cyc_to_ns((cyc - epoch_cyc) & mask, cd.mult, cd.shift);
+}
+
+/*
+ * Atomically update the sched_clock epoch.
+ */
+static void notrace update_sched_clock(void)
+{
+        unsigned long flags;
+        u32 cyc;
+        u64 ns;
+
+        cyc = read_sched_clock();
+        ns = cd.epoch_ns +
+                cyc_to_ns((cyc - cd.epoch_cyc) & sched_clock_mask,
+                          cd.mult, cd.shift);
+        /*
+         * Write epoch_cyc and epoch_ns in a way that the update is
+         * detectable in cyc_to_fixed_sched_clock().
+         */
+        raw_local_irq_save(flags);
+        cd.epoch_cyc = cyc;
+        smp_wmb();
+        cd.epoch_ns = ns;
+        smp_wmb();
+        cd.epoch_cyc_copy = cyc;
+        raw_local_irq_restore(flags);
+}
 
 static void sched_clock_poll(unsigned long wrap_ticks)
 {
         mod_timer(&sched_clock_timer, round_jiffies(jiffies + wrap_ticks));
-        sched_clock_update_fn();
+        update_sched_clock();
 }
 
-void __init init_sched_clock(struct clock_data *cd, void (*update)(void),
-        unsigned int clock_bits, unsigned long rate)
+void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
 {
         unsigned long r, w;
         u64 res, wrap;
         char r_unit;
 
-        sched_clock_update_fn = update;
+        BUG_ON(bits > 32);
+        WARN_ON(!irqs_disabled());
+        WARN_ON(read_sched_clock != jiffy_sched_clock_read);
+        read_sched_clock = read;
+        sched_clock_mask = (1 << bits) - 1;
 
         /* calculate the mult/shift to convert counter ticks to ns. */
-        clocks_calc_mult_shift(&cd->mult, &cd->shift, rate, NSEC_PER_SEC, 0);
+        clocks_calc_mult_shift(&cd.mult, &cd.shift, rate, NSEC_PER_SEC, 0);
 
         r = rate;
         if (r >= 4000000) {
                 r /= 1000000;
                 r_unit = 'M';
-        } else {
+        } else if (r >= 1000) {
                 r /= 1000;
                 r_unit = 'k';
-        }
+        } else
+                r_unit = ' ';
 
         /* calculate how many ns until we wrap */
-        wrap = cyc_to_ns((1ULL << clock_bits) - 1, cd->mult, cd->shift);
+        wrap = cyc_to_ns((1ULL << bits) - 1, cd.mult, cd.shift);
         do_div(wrap, NSEC_PER_MSEC);
         w = wrap;
 
         /* calculate the ns resolution of this counter */
-        res = cyc_to_ns(1ULL, cd->mult, cd->shift);
+        res = cyc_to_ns(1ULL, cd.mult, cd.shift);
         pr_info("sched_clock: %u bits at %lu%cHz, resolution %lluns, wraps every %lums\n",
-                clock_bits, r, r_unit, res, w);
+                bits, r, r_unit, res, w);
 
         /*
          * Start the timer to keep sched_clock() properly updated and
          * sets the initial epoch.
          */
         sched_clock_timer.data = msecs_to_jiffies(w - (w / 10));
-        update();
+        update_sched_clock();
 
         /*
          * Ensure that sched_clock() starts off at 0ns
          */
-        cd->epoch_ns = 0;
+        cd.epoch_ns = 0;
+
+        pr_debug("Registered %pF as sched_clock source\n", read);
+}
+
+unsigned long long notrace sched_clock(void)
+{
+        u32 cyc = read_sched_clock();
+        return cyc_to_sched_clock(cyc, sched_clock_mask);
 }
 
 void __init sched_clock_postinit(void)
 {
+        /*
+         * If no sched_clock function has been provided at that point,
+         * make it the final one one.
+         */
+        if (read_sched_clock == jiffy_sched_clock_read)
+                setup_sched_clock(jiffy_sched_clock_read, 32, HZ);
+
         sched_clock_poll(sched_clock_timer.data);
 }
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index a8a6682d6b52..c8e938553d47 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -10,8 +10,11 @@
  */
 #include <linux/init.h>
 #include <linux/kernel.h>
+#include <linux/clk.h>
+#include <linux/cpufreq.h>
 #include <linux/delay.h>
 #include <linux/device.h>
+#include <linux/err.h>
 #include <linux/smp.h>
 #include <linux/jiffies.h>
 #include <linux/clockchips.h>
@@ -25,6 +28,7 @@
 /* set up by the platform code */
 void __iomem *twd_base;
 
+static struct clk *twd_clk;
 static unsigned long twd_timer_rate;
 
 static struct clock_event_device __percpu **twd_evt;
@@ -89,6 +93,52 @@ void twd_timer_stop(struct clock_event_device *clk)
         disable_percpu_irq(clk->irq);
 }
 
+#ifdef CONFIG_CPU_FREQ
+
+/*
+ * Updates clockevent frequency when the cpu frequency changes.
+ * Called on the cpu that is changing frequency with interrupts disabled.
+ */
+static void twd_update_frequency(void *data)
+{
+        twd_timer_rate = clk_get_rate(twd_clk);
+
+        clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate);
+}
+
+static int twd_cpufreq_transition(struct notifier_block *nb,
+        unsigned long state, void *data)
+{
+        struct cpufreq_freqs *freqs = data;
+
+        /*
+         * The twd clock events must be reprogrammed to account for the new
+         * frequency.  The timer is local to a cpu, so cross-call to the
+         * changing cpu.
+         */
+        if (state == CPUFREQ_POSTCHANGE || state == CPUFREQ_RESUMECHANGE)
+                smp_call_function_single(freqs->cpu, twd_update_frequency,
+                        NULL, 1);
+
+        return NOTIFY_OK;
+}
+
+static struct notifier_block twd_cpufreq_nb = {
+        .notifier_call = twd_cpufreq_transition,
+};
+
+static int twd_cpufreq_init(void)
+{
+        if (!IS_ERR(twd_clk))
+                return cpufreq_register_notifier(&twd_cpufreq_nb,
+                        CPUFREQ_TRANSITION_NOTIFIER);
+
+        return 0;
+}
+core_initcall(twd_cpufreq_init);
+
+#endif
+
 static void __cpuinit twd_calibrate_rate(void)
 {
         unsigned long count;
@@ -140,6 +190,35 @@ static irqreturn_t twd_handler(int irq, void *dev_id)
         return IRQ_NONE;
 }
 
+static struct clk *twd_get_clock(void)
+{
+        struct clk *clk;
+        int err;
+
+        clk = clk_get_sys("smp_twd", NULL);
+        if (IS_ERR(clk)) {
+                pr_err("smp_twd: clock not found: %d\n", (int)PTR_ERR(clk));
+                return clk;
+        }
+
+        err = clk_prepare(clk);
+        if (err) {
+                pr_err("smp_twd: clock failed to prepare: %d\n", err);
+                clk_put(clk);
+                return ERR_PTR(err);
+        }
+
+        err = clk_enable(clk);
+        if (err) {
+                pr_err("smp_twd: clock failed to enable: %d\n", err);
+                clk_unprepare(clk);
+                clk_put(clk);
+                return ERR_PTR(err);
+        }
+
+        return clk;
+}
+
 /*
  * Setup the local clock events for a CPU.
  */
@@ -165,7 +244,13 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
                 }
         }
 
-        twd_calibrate_rate();
+        if (!twd_clk)
+                twd_clk = twd_get_clock();
+
+        if (!IS_ERR_OR_NULL(twd_clk))
+                twd_timer_rate = clk_get_rate(twd_clk);
+        else
+                twd_calibrate_rate();
 
         clk->name = "local_timer";
         clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
@@ -173,15 +258,11 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
         clk->rating = 350;
         clk->set_mode = twd_set_mode;
         clk->set_next_event = twd_set_next_event;
-        clk->shift = 20;
-        clk->mult = div_sc(twd_timer_rate, NSEC_PER_SEC, clk->shift);
-        clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk);
-        clk->min_delta_ns = clockevent_delta2ns(0xf, clk);
 
         this_cpu_clk = __this_cpu_ptr(twd_evt);
         *this_cpu_clk = clk;
 
-        clockevents_register_device(clk);
-
+        clockevents_config_and_register(clk, twd_timer_rate,
+                                        0xf, 0xffffffff);
         enable_percpu_irq(clk->irq, 0);
 }
diff --git a/arch/arm/kernel/swp_emulate.c b/arch/arm/kernel/swp_emulate.c
index 5f452f8fde05..df745188f5de 100644
--- a/arch/arm/kernel/swp_emulate.c
+++ b/arch/arm/kernel/swp_emulate.c
@@ -25,6 +25,7 @@
 #include <linux/syscalls.h>
 #include <linux/perf_event.h>
 
+#include <asm/opcodes.h>
 #include <asm/traps.h>
 #include <asm/uaccess.h>
 
@@ -185,6 +186,21 @@ static int swp_handler(struct pt_regs *regs, unsigned int instr)
 
         perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc);
 
+        res = arm_check_condition(instr, regs->ARM_cpsr);
+        switch (res) {
+        case ARM_OPCODE_CONDTEST_PASS:
+                break;
+        case ARM_OPCODE_CONDTEST_FAIL:
+                /* Condition failed - return to next instruction */
+                regs->ARM_pc += 4;
+                return 0;
+        case ARM_OPCODE_CONDTEST_UNCOND:
+                /* If unconditional encoding - not a SWP, undef */
+                return -EFAULT;
+        default:
+                return -EINVAL;
+        }
+
         if (current->pid != previous_pid) {
                 pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n",
                          current->comm, (unsigned long)current->pid);
diff --git a/arch/arm/kernel/tcm.c b/arch/arm/kernel/tcm.c
index 30e302d33e0a..01ec453bb924 100644
--- a/arch/arm/kernel/tcm.c
+++ b/arch/arm/kernel/tcm.c
@@ -180,9 +180,9 @@ static int __init setup_tcm_bank(u8 type, u8 bank, u8 banks,
  */
 void __init tcm_init(void)
 {
-        u32 tcm_status = read_cpuid_tcmstatus();
-        u8 dtcm_banks = (tcm_status >> 16) & 0x03;
-        u8 itcm_banks = (tcm_status & 0x03);
+        u32 tcm_status;
+        u8 dtcm_banks;
+        u8 itcm_banks;
         size_t dtcm_code_sz = &__edtcm_data - &__sdtcm_data;
         size_t itcm_code_sz = &__eitcm_text - &__sitcm_text;
         char *start;
@@ -191,6 +191,22 @@ void __init tcm_init(void)
         int ret;
         int i;
 
+        /*
+         * Prior to ARMv5 there is no TCM, and trying to read the status
+         * register will hang the processor.
+         */
+        if (cpu_architecture() < CPU_ARCH_ARMv5) {
+                if (dtcm_code_sz || itcm_code_sz)
+                        pr_info("CPU TCM: %u bytes of DTCM and %u bytes of "
+                                "ITCM code compiled in, but no TCM present "
+                                "in pre-v5 CPU\n", dtcm_code_sz, itcm_code_sz);
+                return;
+        }
+
+        tcm_status = read_cpuid_tcmstatus();
+        dtcm_banks = (tcm_status >> 16) & 0x03;
+        itcm_banks = (tcm_status & 0x03);
+
         /* Values greater than 2 for D/ITCM banks are "reserved" */
         if (dtcm_banks > 2)
                 dtcm_banks = 0;
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index d111c3e99249..4f991f295284 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -3,6 +3,12 @@ if ARCH_AT91
 config HAVE_AT91_DATAFLASH_CARD
         bool
 
+config HAVE_AT91_DBGU0
+        bool
+
+config HAVE_AT91_DBGU1
+        bool
+
 config HAVE_AT91_USART3
         bool
 
@@ -21,12 +27,14 @@ config ARCH_AT91RM9200
         bool "AT91RM9200"
         select CPU_ARM920T
         select GENERIC_CLOCKEVENTS
+        select HAVE_AT91_DBGU0
         select HAVE_AT91_USART3
 
 config ARCH_AT91SAM9260
         bool "AT91SAM9260 or AT91SAM9XE"
         select CPU_ARM926T
         select GENERIC_CLOCKEVENTS
+        select HAVE_AT91_DBGU0
         select HAVE_AT91_USART3
         select HAVE_AT91_USART4
         select HAVE_AT91_USART5
@@ -37,11 +45,13 @@ config ARCH_AT91SAM9261
         select CPU_ARM926T
         select GENERIC_CLOCKEVENTS
         select HAVE_FB_ATMEL
+        select HAVE_AT91_DBGU0
 
 config ARCH_AT91SAM9G10
         bool "AT91SAM9G10"
         select CPU_ARM926T
         select GENERIC_CLOCKEVENTS
+        select HAVE_AT91_DBGU0
         select HAVE_FB_ATMEL
 
 config ARCH_AT91SAM9263
@@ -50,6 +60,7 @@ config ARCH_AT91SAM9263
         select GENERIC_CLOCKEVENTS
         select HAVE_FB_ATMEL
         select HAVE_NET_MACB
+        select HAVE_AT91_DBGU1
 
 config ARCH_AT91SAM9RL
         bool "AT91SAM9RL"
@@ -57,11 +68,13 @@ config ARCH_AT91SAM9RL
         select GENERIC_CLOCKEVENTS
         select HAVE_AT91_USART3
         select HAVE_FB_ATMEL
+        select HAVE_AT91_DBGU0
 
 config ARCH_AT91SAM9G20
         bool "AT91SAM9G20"
         select CPU_ARM926T
         select GENERIC_CLOCKEVENTS
+        select HAVE_AT91_DBGU0
         select HAVE_AT91_USART3
         select HAVE_AT91_USART4
         select HAVE_AT91_USART5
@@ -74,6 +87,7 @@ config ARCH_AT91SAM9G45
         select HAVE_AT91_USART3
         select HAVE_FB_ATMEL
         select HAVE_NET_MACB
+        select HAVE_AT91_DBGU1
 
 config ARCH_AT91CAP9
         bool "AT91CAP9"
@@ -81,6 +95,7 @@ config ARCH_AT91CAP9
         select GENERIC_CLOCKEVENTS
         select HAVE_FB_ATMEL
         select HAVE_NET_MACB
+        select HAVE_AT91_DBGU1
 
 config ARCH_AT91X40
         bool "AT91x40"
@@ -510,8 +525,13 @@ config AT91_TIMER_HZ
 choice
         prompt "Select a UART for early kernel messages"
 
-config AT91_EARLY_DBGU
-        bool "DBGU"
+config AT91_EARLY_DBGU0
+        bool "DBGU on rm9200, 9260/9g20, 9261/9g10 and 9rl"
+        depends on HAVE_AT91_DBGU0
+
+config AT91_EARLY_DBGU1
+        bool "DBGU on 9263, 9g45 and cap9"
+        depends on HAVE_AT91_DBGU1
 
 config AT91_EARLY_USART0
         bool "USART0"
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index ecdd54dd68c6..edb879ac04c8 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -13,7 +13,6 @@
  */
 
 #include <linux/module.h>
-#include <linux/pm.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
@@ -23,11 +22,11 @@
 #include <mach/at91cap9.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
-#include <mach/at91_shdwc.h>
 
 #include "soc.h"
 #include "generic.h"
 #include "clock.h"
+#include "sam9_smc.h"
 
 /* --------------------------------------------------------------------
  *  Clocks
@@ -137,7 +136,7 @@ static struct clk pwm_clk = {
         .type           = CLK_TYPE_PERIPHERAL,
 };
 static struct clk macb_clk = {
-        .name           = "macb_clk",
+        .name           = "pclk",
         .pmc_mask       = 1 << AT91CAP9_ID_EMAC,
         .type           = CLK_TYPE_PERIPHERAL,
 };
@@ -210,6 +209,8 @@ static struct clk *periph_clocks[] __initdata = {
 };
 
 static struct clk_lookup periph_clocks_lookups[] = {
+        /* One additional fake clock for macb_hclk */
+        CLKDEV_CON_ID("hclk", &macb_clk),
         CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk),
         CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk),
         CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
@@ -221,6 +222,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
         /* fake hclk clock */
         CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
+        CLKDEV_CON_ID("pioA", &pioABCD_clk),
+        CLKDEV_CON_ID("pioB", &pioABCD_clk),
+        CLKDEV_CON_ID("pioC", &pioABCD_clk),
+        CLKDEV_CON_ID("pioD", &pioABCD_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
@@ -293,37 +298,27 @@ void __init at91cap9_set_console_clock(int id)
  *  GPIO
  * -------------------------------------------------------------------- */
 
-static struct at91_gpio_bank at91cap9_gpio[] = {
+static struct at91_gpio_bank at91cap9_gpio[] __initdata = {
         {
                 .id             = AT91CAP9_ID_PIOABCD,
-                .offset         = AT91_PIOA,
-                .clock          = &pioABCD_clk,
+                .regbase        = AT91CAP9_BASE_PIOA,
         }, {
                 .id             = AT91CAP9_ID_PIOABCD,
-                .offset         = AT91_PIOB,
-                .clock          = &pioABCD_clk,
+                .regbase        = AT91CAP9_BASE_PIOB,
         }, {
                 .id             = AT91CAP9_ID_PIOABCD,
-                .offset         = AT91_PIOC,
-                .clock          = &pioABCD_clk,
+                .regbase        = AT91CAP9_BASE_PIOC,
         }, {
                 .id             = AT91CAP9_ID_PIOABCD,
-                .offset         = AT91_PIOD,
-                .clock          = &pioABCD_clk,
+                .regbase        = AT91CAP9_BASE_PIOD,
         }
 };
 
-static void at91cap9_reset(void)
+static void at91cap9_restart(char mode, const char *cmd)
 {
         at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
 }
 
-static void at91cap9_poweroff(void)
-{
-        at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
-}
-
-
 /* --------------------------------------------------------------------
  *  AT91CAP9 processor initialization
  * -------------------------------------------------------------------- */
@@ -333,10 +328,16 @@ static void __init at91cap9_map_io(void)
         at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE);
 }
 
+static void __init at91cap9_ioremap_registers(void)
+{
+        at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC);
+        at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT);
+        at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC);
+}
+
 static void __init at91cap9_initialize(void)
 {
-        at91_arch_reset = at91cap9_reset;
-        pm_power_off = at91cap9_poweroff;
+        arm_pm_restart = at91cap9_restart;
         at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
 
         /* Register GPIO subsystem */
@@ -394,6 +395,7 @@ static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = {
 struct at91_init_soc __initdata at91cap9_soc = {
         .map_io = at91cap9_map_io,
         .default_irq_priority = at91cap9_default_irq_priority,
+        .ioremap_registers = at91cap9_ioremap_registers,
         .register_clocks = at91cap9_register_clocks,
         .init = at91cap9_initialize,
 };
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index adad70db70eb..d298fb7cb210 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -76,7 +76,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
 
         /* Enable VBus control for UHP ports */
         for (i = 0; i < data->ports; i++) {
-                if (data->vbus_pin[i])
+                if (gpio_is_valid(data->vbus_pin[i]))
                         at91_set_gpio_output(data->vbus_pin[i], 0);
         }
 
@@ -179,7 +179,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
         usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
         memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
 
-        if (data && data->vbus_pin > 0) {
+        if (data && gpio_is_valid(data->vbus_pin)) {
                 at91_set_gpio_input(data->vbus_pin, 0);
                 at91_set_deglitch(data->vbus_pin, 1);
                 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
@@ -200,7 +200,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) {}
 
 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
 static u64 eth_dmamask = DMA_BIT_MASK(32);
-static struct at91_eth_data eth_data;
+static struct macb_platform_data eth_data;
 
 static struct resource eth_resources[] = {
         [0] = {
@@ -227,12 +227,12 @@ static struct platform_device at91cap9_eth_device = {
         .num_resources  = ARRAY_SIZE(eth_resources),
 };
 
-void __init at91_add_device_eth(struct at91_eth_data *data)
+void __init at91_add_device_eth(struct macb_platform_data *data)
 {
         if (!data)
                 return;
 
-        if (data->phy_irq_pin) {
+        if (gpio_is_valid(data->phy_irq_pin)) {
                 at91_set_gpio_input(data->phy_irq_pin, 0);
                 at91_set_deglitch(data->phy_irq_pin, 1);
         }
@@ -264,7 +264,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data)
         platform_device_register(&at91cap9_eth_device);
 }
 #else
-void __init at91_add_device_eth(struct at91_eth_data *data) {}
+void __init at91_add_device_eth(struct macb_platform_data *data) {}
 #endif
 
 
@@ -332,13 +332,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
                 return;
 
         /* input/irq */
-        if (data->det_pin) {
+        if (gpio_is_valid(data->det_pin)) {
                 at91_set_gpio_input(data->det_pin, 1);
                 at91_set_deglitch(data->det_pin, 1);
         }
-        if (data->wp_pin)
+        if (gpio_is_valid(data->wp_pin))
                 at91_set_gpio_input(data->wp_pin, 1);
-        if (data->vcc_pin)
+        if (gpio_is_valid(data->vcc_pin))
                 at91_set_gpio_output(data->vcc_pin, 0);
 
         if (mmc_id == 0) {              /* MCI0 */
@@ -398,8 +398,8 @@ static struct resource nand_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = AT91_BASE_SYS + AT91_ECC,
-                .end    = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
+                .start  = AT91CAP9_BASE_ECC,
+                .end    = AT91CAP9_BASE_ECC + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         }
 };
@@ -425,15 +425,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
 
         /* enable pin */
-        if (data->enable_pin)
+        if (gpio_is_valid(data->enable_pin))
                 at91_set_gpio_output(data->enable_pin, 1);
 
         /* ready/busy pin */
-        if (data->rdy_pin)
+        if (gpio_is_valid(data->rdy_pin))
                 at91_set_gpio_input(data->rdy_pin, 1);
 
         /* card detect pin */
-        if (data->det_pin)
+        if (gpio_is_valid(data->det_pin))
                 at91_set_gpio_input(data->det_pin, 1);
 
         nand_data = *data;
@@ -670,8 +670,8 @@ static void __init at91_add_device_tc(void) { }
 
 static struct resource rtt_resources[] = {
         {
-                .start  = AT91_BASE_SYS + AT91_RTT,
-                .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
+                .start  = AT91CAP9_BASE_RTT,
+                .end    = AT91CAP9_BASE_RTT + SZ_16 - 1,
                 .flags  = IORESOURCE_MEM,
         }
 };
@@ -694,10 +694,19 @@ static void __init at91_add_device_rtt(void)
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
+static struct resource wdt_resources[] = {
+        {
+                .start  = AT91CAP9_BASE_WDT,
+                .end    = AT91CAP9_BASE_WDT + SZ_16 - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
 static struct platform_device at91cap9_wdt_device = {
         .name           = "at91_wdt",
         .id             = -1,
-        .num_resources  = 0,
+        .resource       = wdt_resources,
+        .num_resources  = ARRAY_SIZE(wdt_resources),
 };
 
 static void __init at91_add_device_watchdog(void)
@@ -807,7 +816,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
         at91_set_A_periph(AT91_PIN_PA9, 0);     /* AC97RX */
 
         /* reset */
-        if (data->reset_pin)
+        if (gpio_is_valid(data->reset_pin))
                 at91_set_gpio_output(data->reset_pin, 0);
 
         ac97_data = *data;
@@ -1021,8 +1030,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91_BASE_SYS + AT91_DBGU,
-                .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+                .start  = AT91CAP9_BASE_DBGU,
+                .end    = AT91CAP9_BASE_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 713d3bdbd284..99c3174e24a2 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -23,6 +23,7 @@
 #include "soc.h"
 #include "generic.h"
 #include "clock.h"
+#include "sam9_smc.h"
 
 static struct map_desc at91rm9200_io_desc[] __initdata = {
         {
@@ -195,6 +196,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
         /* fake hclk clock */
         CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
+        CLKDEV_CON_ID("pioA", &pioA_clk),
+        CLKDEV_CON_ID("pioB", &pioB_clk),
+        CLKDEV_CON_ID("pioC", &pioC_clk),
+        CLKDEV_CON_ID("pioD", &pioD_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
@@ -268,27 +273,23 @@ void __init at91rm9200_set_console_clock(int id)
  *  GPIO
  * -------------------------------------------------------------------- */
 
-static struct at91_gpio_bank at91rm9200_gpio[] = {
+static struct at91_gpio_bank at91rm9200_gpio[] __initdata = {
         {
                 .id             = AT91RM9200_ID_PIOA,
-                .offset         = AT91_PIOA,
-                .clock          = &pioA_clk,
+                .regbase        = AT91RM9200_BASE_PIOA,
         }, {
                 .id             = AT91RM9200_ID_PIOB,
-                .offset         = AT91_PIOB,
-                .clock          = &pioB_clk,
+                .regbase        = AT91RM9200_BASE_PIOB,
         }, {
                 .id             = AT91RM9200_ID_PIOC,
-                .offset         = AT91_PIOC,
-                .clock          = &pioC_clk,
+                .regbase        = AT91RM9200_BASE_PIOC,
         }, {
                 .id             = AT91RM9200_ID_PIOD,
-                .offset         = AT91_PIOD,
-                .clock          = &pioD_clk,
+                .regbase        = AT91RM9200_BASE_PIOD,
         }
 };
 
-static void at91rm9200_reset(void)
+static void at91rm9200_restart(char mode, const char *cmd)
 {
         /*
          * Perform a hardware reset with the use of the Watchdog timer.
@@ -307,9 +308,13 @@ static void __init at91rm9200_map_io(void)
         iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
 }
 
+static void __init at91rm9200_ioremap_registers(void)
+{
+}
+
 static void __init at91rm9200_initialize(void)
 {
-        at91_arch_reset = at91rm9200_reset;
+        arm_pm_restart = at91rm9200_restart;
         at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
                         | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
                         | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
@@ -366,6 +371,7 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
 struct at91_init_soc __initdata at91rm9200_soc = {
         .map_io = at91rm9200_map_io,
         .default_irq_priority = at91rm9200_default_irq_priority,
+        .ioremap_registers = at91rm9200_ioremap_registers,
         .register_clocks = at91rm9200_register_clocks,
         .init = at91rm9200_initialize,
 };
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index ad930688358c..18bacec2b094 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -114,11 +114,11 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
         if (!data)
                 return;
 
-        if (data->vbus_pin) {
+        if (gpio_is_valid(data->vbus_pin)) {
                 at91_set_gpio_input(data->vbus_pin, 0);
                 at91_set_deglitch(data->vbus_pin, 1);
         }
-        if (data->pullup_pin)
+        if (gpio_is_valid(data->pullup_pin))
                 at91_set_gpio_output(data->pullup_pin, 0);
 
         udc_data = *data;
@@ -135,7 +135,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
 
 #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE)
 static u64 eth_dmamask = DMA_BIT_MASK(32);
-static struct at91_eth_data eth_data;
+static struct macb_platform_data eth_data;
 
 static struct resource eth_resources[] = {
         [0] = {
@@ -162,12 +162,12 @@ static struct platform_device at91rm9200_eth_device = {
         .num_resources  = ARRAY_SIZE(eth_resources),
 };
 
-void __init at91_add_device_eth(struct at91_eth_data *data)
+void __init at91_add_device_eth(struct macb_platform_data *data)
 {
         if (!data)
                 return;
 
-        if (data->phy_irq_pin) {
+        if (gpio_is_valid(data->phy_irq_pin)) {
                 at91_set_gpio_input(data->phy_irq_pin, 0);
                 at91_set_deglitch(data->phy_irq_pin, 1);
         }
@@ -199,7 +199,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data)
         platform_device_register(&at91rm9200_eth_device);
 }
 #else
-void __init at91_add_device_eth(struct at91_eth_data *data) {}
+void __init at91_add_device_eth(struct macb_platform_data *data) {}
 #endif
 
 
@@ -260,7 +260,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
         );
 
         /* input/irq */
-        if (data->irq_pin) {
+        if (gpio_is_valid(data->irq_pin)) {
                 at91_set_gpio_input(data->irq_pin, 1);
                 at91_set_deglitch(data->irq_pin, 1);
         }
@@ -268,7 +268,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
         at91_set_deglitch(data->det_pin, 1);
 
         /* outputs, initially off */
-        if (data->vcc_pin)
+        if (gpio_is_valid(data->vcc_pin))
                 at91_set_gpio_output(data->vcc_pin, 0);
         at91_set_gpio_output(data->rst_pin, 0);
 
@@ -328,13 +328,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
                 return;
 
         /* input/irq */
-        if (data->det_pin) {
+        if (gpio_is_valid(data->det_pin)) {
                 at91_set_gpio_input(data->det_pin, 1);
                 at91_set_deglitch(data->det_pin, 1);
         }
-        if (data->wp_pin)
+        if (gpio_is_valid(data->wp_pin))
                 at91_set_gpio_input(data->wp_pin, 1);
-        if (data->vcc_pin)
+        if (gpio_is_valid(data->vcc_pin))
                 at91_set_gpio_output(data->vcc_pin, 0);
 
         /* CLK */
@@ -419,15 +419,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         );
 
         /* enable pin */
-        if (data->enable_pin)
+        if (gpio_is_valid(data->enable_pin))
                 at91_set_gpio_output(data->enable_pin, 1);
 
         /* ready/busy pin */
-        if (data->rdy_pin)
+        if (gpio_is_valid(data->rdy_pin))
                 at91_set_gpio_input(data->rdy_pin, 1);
 
         /* card detect pin */
-        if (data->det_pin)
+        if (gpio_is_valid(data->det_pin))
                 at91_set_gpio_input(data->det_pin, 1);
 
         at91_set_A_periph(AT91_PIN_PC1, 0);             /* SMOE */
@@ -665,10 +665,24 @@ static void __init at91_add_device_tc(void) { }
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
+static struct resource rtc_resources[] = {
+        [0] = {
+                .start  = AT91RM9200_BASE_RTC,
+                .end    = AT91RM9200_BASE_RTC + SZ_256 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91_ID_SYS,
+                .end    = AT91_ID_SYS,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
 static struct platform_device at91rm9200_rtc_device = {
         .name           = "at91_rtc",
         .id             = -1,
-        .num_resources  = 0,
+        .resource       = rtc_resources,
+        .num_resources  = ARRAY_SIZE(rtc_resources),
 };
 
 static void __init at91_add_device_rtc(void)
@@ -877,8 +891,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91_BASE_SYS + AT91_DBGU,
-                .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+                .start  = AT91RM9200_BASE_DBGU,
+                .end    = AT91RM9200_BASE_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index 1dd69c85dfec..a028cdf8f974 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -32,6 +32,8 @@ static unsigned long last_crtr;
 static u32 irqmask;
 static struct clock_event_device clkevt;
 
+#define RM9200_TIMER_LATCH      ((AT91_SLOW_CLOCK + HZ/2) / HZ)
+
 /*
  * The ST_CRTR is updated asynchronously to the master clock ... but
  * the updates as seen by the CPU don't seem to be strictly monotonic.
@@ -74,8 +76,8 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
         if (sr & AT91_ST_PITS) {
                 u32     crtr = read_CRTR();
 
-                while (((crtr - last_crtr) & AT91_ST_CRTV) >= LATCH) {
-                        last_crtr += LATCH;
+                while (((crtr - last_crtr) & AT91_ST_CRTV) >= RM9200_TIMER_LATCH) {
+                        last_crtr += RM9200_TIMER_LATCH;
                         clkevt.event_handler(&clkevt);
                 }
                 return IRQ_HANDLED;
@@ -116,7 +118,7 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
         case CLOCK_EVT_MODE_PERIODIC:
                 /* PIT for periodic irqs; fixed rate of 1/HZ */
                 irqmask = AT91_ST_PITS;
-                at91_sys_write(AT91_ST_PIMR, LATCH);
+                at91_sys_write(AT91_ST_PIMR, RM9200_TIMER_LATCH);
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
                 /* ALM for oneshot irqs, set by next_event()
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 0d20677fbef0..5e46e4a96430 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -11,7 +11,6 @@
  */
 
 #include <linux/module.h>
-#include <linux/pm.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
@@ -21,11 +20,11 @@
 #include <mach/at91sam9260.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
-#include <mach/at91_shdwc.h>
 
 #include "soc.h"
 #include "generic.h"
 #include "clock.h"
+#include "sam9_smc.h"
 
 /* --------------------------------------------------------------------
  *  Clocks
@@ -120,7 +119,7 @@ static struct clk ohci_clk = {
         .type           = CLK_TYPE_PERIPHERAL,
 };
 static struct clk macb_clk = {
-        .name           = "macb_clk",
+        .name           = "pclk",
         .pmc_mask       = 1 << AT91SAM9260_ID_EMAC,
         .type           = CLK_TYPE_PERIPHERAL,
 };
@@ -190,6 +189,8 @@ static struct clk *periph_clocks[] __initdata = {
 };
 
 static struct clk_lookup periph_clocks_lookups[] = {
+        /* One additional fake clock for macb_hclk */
+        CLKDEV_CON_ID("hclk", &macb_clk),
         CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
         CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
         CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
@@ -209,6 +210,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk),
         /* fake hclk clock */
         CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
+        CLKDEV_CON_ID("pioA", &pioA_clk),
+        CLKDEV_CON_ID("pioB", &pioB_clk),
+        CLKDEV_CON_ID("pioC", &pioC_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
@@ -270,28 +274,19 @@ void __init at91sam9260_set_console_clock(int id)
  *  GPIO
  * -------------------------------------------------------------------- */
 
-static struct at91_gpio_bank at91sam9260_gpio[] = {
+static struct at91_gpio_bank at91sam9260_gpio[] __initdata = {
         {
                 .id             = AT91SAM9260_ID_PIOA,
-                .offset         = AT91_PIOA,
-                .clock          = &pioA_clk,
+                .regbase        = AT91SAM9260_BASE_PIOA,
         }, {
                 .id             = AT91SAM9260_ID_PIOB,
-                .offset         = AT91_PIOB,
-                .clock          = &pioB_clk,
+                .regbase        = AT91SAM9260_BASE_PIOB,
         }, {
                 .id             = AT91SAM9260_ID_PIOC,
-                .offset         = AT91_PIOC,
-                .clock          = &pioC_clk,
+                .regbase        = AT91SAM9260_BASE_PIOC,
         }
 };
 
-static void at91sam9260_poweroff(void)
-{
-        at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
-}
-
-
 /* --------------------------------------------------------------------
  *  AT91SAM9260 processor initialization
  * -------------------------------------------------------------------- */
@@ -325,10 +320,16 @@ static void __init at91sam9260_map_io(void)
         }
 }
 
+static void __init at91sam9260_ioremap_registers(void)
+{
+        at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC);
+        at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT);
+        at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
+}
+
 static void __init at91sam9260_initialize(void)
 {
-        at91_arch_reset = at91sam9_alt_reset;
-        pm_power_off = at91sam9260_poweroff;
+        arm_pm_restart = at91sam9_alt_restart;
         at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
                         | (1 << AT91SAM9260_ID_IRQ2);
 
@@ -381,6 +382,7 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
 struct at91_init_soc __initdata at91sam9260_soc = {
         .map_io = at91sam9260_map_io,
         .default_irq_priority = at91sam9260_default_irq_priority,
+        .ioremap_registers = at91sam9260_ioremap_registers,
         .register_clocks = at91sam9260_register_clocks,
         .init = at91sam9260_initialize,
 };
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 629fa9774972..642ccb6d26b2 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -115,7 +115,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
         if (!data)
                 return;
 
-        if (data->vbus_pin) {
+        if (gpio_is_valid(data->vbus_pin)) {
                 at91_set_gpio_input(data->vbus_pin, 0);
                 at91_set_deglitch(data->vbus_pin, 1);
         }
@@ -136,7 +136,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
 
 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
 static u64 eth_dmamask = DMA_BIT_MASK(32);
-static struct at91_eth_data eth_data;
+static struct macb_platform_data eth_data;
 
 static struct resource eth_resources[] = {
         [0] = {
@@ -163,12 +163,12 @@ static struct platform_device at91sam9260_eth_device = {
         .num_resources  = ARRAY_SIZE(eth_resources),
 };
 
-void __init at91_add_device_eth(struct at91_eth_data *data)
+void __init at91_add_device_eth(struct macb_platform_data *data)
 {
         if (!data)
                 return;
 
-        if (data->phy_irq_pin) {
+        if (gpio_is_valid(data->phy_irq_pin)) {
                 at91_set_gpio_input(data->phy_irq_pin, 0);
                 at91_set_deglitch(data->phy_irq_pin, 1);
         }
@@ -200,7 +200,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data)
         platform_device_register(&at91sam9260_eth_device);
 }
 #else
-void __init at91_add_device_eth(struct at91_eth_data *data) {}
+void __init at91_add_device_eth(struct macb_platform_data *data) {}
 #endif
 
 
@@ -243,13 +243,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
                 return;
 
         /* input/irq */
-        if (data->det_pin) {
+        if (gpio_is_valid(data->det_pin)) {
                 at91_set_gpio_input(data->det_pin, 1);
                 at91_set_deglitch(data->det_pin, 1);
         }
-        if (data->wp_pin)
+        if (gpio_is_valid(data->wp_pin))
                 at91_set_gpio_input(data->wp_pin, 1);
-        if (data->vcc_pin)
+        if (gpio_is_valid(data->vcc_pin))
                 at91_set_gpio_output(data->vcc_pin, 0);
 
         /* CLK */
@@ -330,11 +330,11 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
         for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
                 if (data->slot[i].bus_width) {
                         /* input/irq */
-                        if (data->slot[i].detect_pin) {
+                        if (gpio_is_valid(data->slot[i].detect_pin)) {
                                 at91_set_gpio_input(data->slot[i].detect_pin, 1);
                                 at91_set_deglitch(data->slot[i].detect_pin, 1);
                         }
-                        if (data->slot[i].wp_pin)
+                        if (gpio_is_valid(data->slot[i].wp_pin))
                                 at91_set_gpio_input(data->slot[i].wp_pin, 1);
 
                         switch (i) {
@@ -399,8 +399,8 @@ static struct resource nand_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = AT91_BASE_SYS + AT91_ECC,
-                .end    = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
+                .start  = AT91SAM9260_BASE_ECC,
+                .end    = AT91SAM9260_BASE_ECC + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         }
 };
@@ -426,15 +426,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 
         /* enable pin */
-        if (data->enable_pin)
+        if (gpio_is_valid(data->enable_pin))
                 at91_set_gpio_output(data->enable_pin, 1);
 
         /* ready/busy pin */
-        if (data->rdy_pin)
+        if (gpio_is_valid(data->rdy_pin))
                 at91_set_gpio_input(data->rdy_pin, 1);
 
         /* card detect pin */
-        if (data->det_pin)
+        if (gpio_is_valid(data->det_pin))
                 at91_set_gpio_input(data->det_pin, 1);
 
         nand_data = *data;
@@ -714,8 +714,8 @@ static void __init at91_add_device_tc(void) { }
 
 static struct resource rtt_resources[] = {
         {
-                .start  = AT91_BASE_SYS + AT91_RTT,
-                .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
+                .start  = AT91SAM9260_BASE_RTT,
+                .end    = AT91SAM9260_BASE_RTT + SZ_16 - 1,
                 .flags  = IORESOURCE_MEM,
         }
 };
@@ -738,10 +738,19 @@ static void __init at91_add_device_rtt(void)
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
+static struct resource wdt_resources[] = {
+        {
+                .start  = AT91SAM9260_BASE_WDT,
+                .end    = AT91SAM9260_BASE_WDT + SZ_16 - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
 static struct platform_device at91sam9260_wdt_device = {
         .name           = "at91_wdt",
         .id             = -1,
-        .num_resources  = 0,
+        .resource       = wdt_resources,
+        .num_resources  = ARRAY_SIZE(wdt_resources),
 };
 
 static void __init at91_add_device_watchdog(void)
@@ -837,8 +846,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91_BASE_SYS + AT91_DBGU,
-                .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+                .start  = AT91SAM9260_BASE_DBGU,
+                .end    = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -1281,17 +1290,17 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
 
         at91_sys_write(AT91_MATRIX_EBICSA, csa);
 
-        if (data->rst_pin) {
+        if (gpio_is_valid(data->rst_pin)) {
                 at91_set_multi_drive(data->rst_pin, 0);
                 at91_set_gpio_output(data->rst_pin, 1);
         }
 
-        if (data->irq_pin) {
+        if (gpio_is_valid(data->irq_pin)) {
                 at91_set_gpio_input(data->irq_pin, 0);
                 at91_set_deglitch(data->irq_pin, 1);
         }
 
-        if (data->det_pin) {
+        if (gpio_is_valid(data->det_pin)) {
                 at91_set_gpio_input(data->det_pin, 0);
                 at91_set_deglitch(data->det_pin, 1);
         }
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 658a5185abfd..b85b9ea60170 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -11,7 +11,6 @@
  */
 
 #include <linux/module.h>
-#include <linux/pm.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
@@ -20,11 +19,11 @@
 #include <mach/at91sam9261.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
-#include <mach/at91_shdwc.h>
 
 #include "soc.h"
 #include "generic.h"
 #include "clock.h"
+#include "sam9_smc.h"
 
 /* --------------------------------------------------------------------
  *  Clocks
@@ -176,6 +175,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
         CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
         CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0),
+        CLKDEV_CON_ID("pioA", &pioA_clk),
+        CLKDEV_CON_ID("pioB", &pioB_clk),
+        CLKDEV_CON_ID("pioC", &pioC_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
@@ -251,28 +253,19 @@ void __init at91sam9261_set_console_clock(int id)
  *  GPIO
  * -------------------------------------------------------------------- */
 
-static struct at91_gpio_bank at91sam9261_gpio[] = {
+static struct at91_gpio_bank at91sam9261_gpio[] __initdata = {
         {
                 .id             = AT91SAM9261_ID_PIOA,
-                .offset         = AT91_PIOA,
-                .clock          = &pioA_clk,
+                .regbase        = AT91SAM9261_BASE_PIOA,
         }, {
                 .id             = AT91SAM9261_ID_PIOB,
-                .offset         = AT91_PIOB,
-                .clock          = &pioB_clk,
+                .regbase        = AT91SAM9261_BASE_PIOB,
         }, {
                 .id             = AT91SAM9261_ID_PIOC,
-                .offset         = AT91_PIOC,
-                .clock          = &pioC_clk,
+                .regbase        = AT91SAM9261_BASE_PIOC,
         }
 };
 
-static void at91sam9261_poweroff(void)
-{
-        at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
-}
-
-
 /* --------------------------------------------------------------------
  *  AT91SAM9261 processor initialization
  * -------------------------------------------------------------------- */
@@ -285,10 +278,16 @@ static void __init at91sam9261_map_io(void)
                 at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE);
 }
 
+static void __init at91sam9261_ioremap_registers(void)
+{
+        at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC);
+        at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
+        at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
+}
+
 static void __init at91sam9261_initialize(void)
 {
-        at91_arch_reset = at91sam9_alt_reset;
-        pm_power_off = at91sam9261_poweroff;
+        arm_pm_restart = at91sam9_alt_restart;
         at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
                         | (1 << AT91SAM9261_ID_IRQ2);
 
@@ -341,6 +340,7 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
 struct at91_init_soc __initdata at91sam9261_soc = {
         .map_io = at91sam9261_map_io,
         .default_irq_priority = at91sam9261_default_irq_priority,
+        .ioremap_registers = at91sam9261_ioremap_registers,
         .register_clocks = at91sam9261_register_clocks,
         .init = at91sam9261_initialize,
 };
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index a178b58b0b9c..fc59cbdb0e3c 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -118,7 +118,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
         if (!data)
                 return;
 
-        if (data->vbus_pin) {
+        if (gpio_is_valid(data->vbus_pin)) {
                 at91_set_gpio_input(data->vbus_pin, 0);
                 at91_set_deglitch(data->vbus_pin, 1);
         }
@@ -171,13 +171,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
                 return;
 
         /* input/irq */
-        if (data->det_pin) {
+        if (gpio_is_valid(data->det_pin)) {
                 at91_set_gpio_input(data->det_pin, 1);
                 at91_set_deglitch(data->det_pin, 1);
         }
-        if (data->wp_pin)
+        if (gpio_is_valid(data->wp_pin))
                 at91_set_gpio_input(data->wp_pin, 1);
-        if (data->vcc_pin)
+        if (gpio_is_valid(data->vcc_pin))
                 at91_set_gpio_output(data->vcc_pin, 0);
 
         /* CLK */
@@ -240,15 +240,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 
         /* enable pin */
-        if (data->enable_pin)
+        if (gpio_is_valid(data->enable_pin))
                 at91_set_gpio_output(data->enable_pin, 1);
 
         /* ready/busy pin */
-        if (data->rdy_pin)
+        if (gpio_is_valid(data->rdy_pin))
                 at91_set_gpio_input(data->rdy_pin, 1);
 
         /* card detect pin */
-        if (data->det_pin)
+        if (gpio_is_valid(data->det_pin))
                 at91_set_gpio_input(data->det_pin, 1);
 
         at91_set_A_periph(AT91_PIN_PC0, 0);             /* NANDOE */
@@ -600,8 +600,8 @@ static void __init at91_add_device_tc(void) { }
 
 static struct resource rtt_resources[] = {
         {
-                .start  = AT91_BASE_SYS + AT91_RTT,
-                .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
+                .start  = AT91SAM9261_BASE_RTT,
+                .end    = AT91SAM9261_BASE_RTT + SZ_16 - 1,
                 .flags  = IORESOURCE_MEM,
         }
 };
@@ -624,10 +624,19 @@ static void __init at91_add_device_rtt(void)
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
+static struct resource wdt_resources[] = {
+        {
+                .start  = AT91SAM9261_BASE_WDT,
+                .end    = AT91SAM9261_BASE_WDT + SZ_16 - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
 static struct platform_device at91sam9261_wdt_device = {
         .name           = "at91_wdt",
         .id             = -1,
-        .num_resources  = 0,
+        .resource       = wdt_resources,
+        .num_resources  = ARRAY_SIZE(wdt_resources),
 };
 
 static void __init at91_add_device_watchdog(void)
@@ -816,8 +825,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91_BASE_SYS + AT91_DBGU,
-                .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+                .start  = AT91SAM9261_BASE_DBGU,
+                .end    = AT91SAM9261_BASE_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index f83fbb0ee0c5..79e3669b1117 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -11,7 +11,6 @@
  */
 
 #include <linux/module.h>
-#include <linux/pm.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
@@ -19,11 +18,11 @@
 #include <mach/at91sam9263.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
-#include <mach/at91_shdwc.h>
 
 #include "soc.h"
 #include "generic.h"
 #include "clock.h"
+#include "sam9_smc.h"
 
 /* --------------------------------------------------------------------
  *  Clocks
@@ -118,7 +117,7 @@ static struct clk pwm_clk = {
         .type           = CLK_TYPE_PERIPHERAL,
 };
 static struct clk macb_clk = {
-        .name           = "macb_clk",
+        .name           = "pclk",
         .pmc_mask       = 1 << AT91SAM9263_ID_EMAC,
         .type           = CLK_TYPE_PERIPHERAL,
 };
@@ -182,6 +181,8 @@ static struct clk *periph_clocks[] __initdata = {
 };
 
 static struct clk_lookup periph_clocks_lookups[] = {
+        /* One additional fake clock for macb_hclk */
+        CLKDEV_CON_ID("hclk", &macb_clk),
         CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
         CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
         CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
@@ -191,6 +192,11 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
         /* fake hclk clock */
         CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
+        CLKDEV_CON_ID("pioA", &pioA_clk),
+        CLKDEV_CON_ID("pioB", &pioB_clk),
+        CLKDEV_CON_ID("pioC", &pioCDE_clk),
+        CLKDEV_CON_ID("pioD", &pioCDE_clk),
+        CLKDEV_CON_ID("pioE", &pioCDE_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
@@ -263,36 +269,25 @@ void __init at91sam9263_set_console_clock(int id)
  *  GPIO
  * -------------------------------------------------------------------- */
 
-static struct at91_gpio_bank at91sam9263_gpio[] = {
+static struct at91_gpio_bank at91sam9263_gpio[] __initdata = {
         {
                 .id             = AT91SAM9263_ID_PIOA,
-                .offset         = AT91_PIOA,
-                .clock          = &pioA_clk,
+                .regbase        = AT91SAM9263_BASE_PIOA,
         }, {
                 .id             = AT91SAM9263_ID_PIOB,
-                .offset         = AT91_PIOB,
-                .clock          = &pioB_clk,
+                .regbase        = AT91SAM9263_BASE_PIOB,
         }, {
                 .id             = AT91SAM9263_ID_PIOCDE,
-                .offset         = AT91_PIOC,
-                .clock          = &pioCDE_clk,
+                .regbase        = AT91SAM9263_BASE_PIOC,
         }, {
                 .id             = AT91SAM9263_ID_PIOCDE,
-                .offset         = AT91_PIOD,
-                .clock          = &pioCDE_clk,
+                .regbase        = AT91SAM9263_BASE_PIOD,
         }, {
                 .id             = AT91SAM9263_ID_PIOCDE,
-                .offset         = AT91_PIOE,
-                .clock          = &pioCDE_clk,
+                .regbase        = AT91SAM9263_BASE_PIOE,
         }
 };
 
-static void at91sam9263_poweroff(void)
-{
-        at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
-}
-
-
 /* --------------------------------------------------------------------
  *  AT91SAM9263 processor initialization
  * -------------------------------------------------------------------- */
@@ -303,10 +298,17 @@ static void __init at91sam9263_map_io(void)
         at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE);
 }
 
+static void __init at91sam9263_ioremap_registers(void)
+{
+        at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC);
+        at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
+        at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
+        at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
+}
+
 static void __init at91sam9263_initialize(void)
 {
-        at91_arch_reset = at91sam9_alt_reset;
-        pm_power_off = at91sam9263_poweroff;
+        arm_pm_restart = at91sam9_alt_restart;
         at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
 
         /* Register GPIO subsystem */
@@ -358,6 +360,7 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
 struct at91_init_soc __initdata at91sam9263_soc = {
         .map_io = at91sam9263_map_io,
         .default_irq_priority = at91sam9263_default_irq_priority,
+        .ioremap_registers = at91sam9263_ioremap_registers,
         .register_clocks = at91sam9263_register_clocks,
         .init = at91sam9263_initialize,
 };
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index d5fbac9ff4fa..7b46b2787022 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -70,7 +70,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
 
         /* Enable VBus control for UHP ports */
         for (i = 0; i < data->ports; i++) {
-                if (data->vbus_pin[i])
+                if (gpio_is_valid(data->vbus_pin[i]))
                         at91_set_gpio_output(data->vbus_pin[i], 0);
         }
 
@@ -123,7 +123,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
         if (!data)
                 return;
 
-        if (data->vbus_pin) {
+        if (gpio_is_valid(data->vbus_pin)) {
                 at91_set_gpio_input(data->vbus_pin, 0);
                 at91_set_deglitch(data->vbus_pin, 1);
         }
@@ -144,7 +144,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
 
 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
 static u64 eth_dmamask = DMA_BIT_MASK(32);
-static struct at91_eth_data eth_data;
+static struct macb_platform_data eth_data;
 
 static struct resource eth_resources[] = {
         [0] = {
@@ -171,12 +171,12 @@ static struct platform_device at91sam9263_eth_device = {
         .num_resources  = ARRAY_SIZE(eth_resources),
 };
 
-void __init at91_add_device_eth(struct at91_eth_data *data)
+void __init at91_add_device_eth(struct macb_platform_data *data)
 {
         if (!data)
                 return;
 
-        if (data->phy_irq_pin) {
+        if (gpio_is_valid(data->phy_irq_pin)) {
                 at91_set_gpio_input(data->phy_irq_pin, 0);
                 at91_set_deglitch(data->phy_irq_pin, 1);
         }
@@ -208,7 +208,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data)
         platform_device_register(&at91sam9263_eth_device);
 }
 #else
-void __init at91_add_device_eth(struct at91_eth_data *data) {}
+void __init at91_add_device_eth(struct macb_platform_data *data) {}
 #endif
 
 
@@ -276,13 +276,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
                 return;
 
         /* input/irq */
-        if (data->det_pin) {
+        if (gpio_is_valid(data->det_pin)) {
                 at91_set_gpio_input(data->det_pin, 1);
                 at91_set_deglitch(data->det_pin, 1);
         }
-        if (data->wp_pin)
+        if (gpio_is_valid(data->wp_pin))
                 at91_set_gpio_input(data->wp_pin, 1);
-        if (data->vcc_pin)
+        if (gpio_is_valid(data->vcc_pin))
                 at91_set_gpio_output(data->vcc_pin, 0);
 
         if (mmc_id == 0) {              /* MCI0 */
@@ -430,17 +430,17 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
         }
         at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa);
 
-        if (data->det_pin) {
+        if (gpio_is_valid(data->det_pin)) {
                 at91_set_gpio_input(data->det_pin, 1);
                 at91_set_deglitch(data->det_pin, 1);
         }
 
-        if (data->irq_pin) {
+        if (gpio_is_valid(data->irq_pin)) {
                 at91_set_gpio_input(data->irq_pin, 1);
                 at91_set_deglitch(data->irq_pin, 1);
         }
 
-        if (data->vcc_pin)
+        if (gpio_is_valid(data->vcc_pin))
                 /* initially off */
                 at91_set_gpio_output(data->vcc_pin, 0);
 
@@ -473,8 +473,8 @@ static struct resource nand_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = AT91_BASE_SYS + AT91_ECC0,
-                .end    = AT91_BASE_SYS + AT91_ECC0 + SZ_512 - 1,
+                .start  = AT91SAM9263_BASE_ECC0,
+                .end    = AT91SAM9263_BASE_ECC0 + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         }
 };
@@ -500,15 +500,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
 
         /* enable pin */
-        if (data->enable_pin)
+        if (gpio_is_valid(data->enable_pin))
                 at91_set_gpio_output(data->enable_pin, 1);
 
         /* ready/busy pin */
-        if (data->rdy_pin)
+        if (gpio_is_valid(data->rdy_pin))
                 at91_set_gpio_input(data->rdy_pin, 1);
 
         /* card detect pin */
-        if (data->det_pin)
+        if (gpio_is_valid(data->det_pin))
                 at91_set_gpio_input(data->det_pin, 1);
 
         nand_data = *data;
@@ -749,7 +749,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
         at91_set_A_periph(AT91_PIN_PB3, 0);     /* AC97RX */
 
         /* reset */
-        if (data->reset_pin)
+        if (gpio_is_valid(data->reset_pin))
                 at91_set_gpio_output(data->reset_pin, 0);
 
         ac97_data = *data;
@@ -956,8 +956,8 @@ static void __init at91_add_device_tc(void) { }
 
 static struct resource rtt0_resources[] = {
         {
-                .start  = AT91_BASE_SYS + AT91_RTT0,
-                .end    = AT91_BASE_SYS + AT91_RTT0 + SZ_16 - 1,
+                .start  = AT91SAM9263_BASE_RTT0,
+                .end    = AT91SAM9263_BASE_RTT0 + SZ_16 - 1,
                 .flags  = IORESOURCE_MEM,
         }
 };
@@ -971,8 +971,8 @@ static struct platform_device at91sam9263_rtt0_device = {
 
 static struct resource rtt1_resources[] = {
         {
-                .start  = AT91_BASE_SYS + AT91_RTT1,
-                .end    = AT91_BASE_SYS + AT91_RTT1 + SZ_16 - 1,
+                .start  = AT91SAM9263_BASE_RTT1,
+                .end    = AT91SAM9263_BASE_RTT1 + SZ_16 - 1,
                 .flags  = IORESOURCE_MEM,
         }
 };
@@ -996,10 +996,19 @@ static void __init at91_add_device_rtt(void)
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
+static struct resource wdt_resources[] = {
+        {
+                .start  = AT91SAM9263_BASE_WDT,
+                .end    = AT91SAM9263_BASE_WDT + SZ_16 - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
 static struct platform_device at91sam9263_wdt_device = {
         .name           = "at91_wdt",
         .id             = -1,
-        .num_resources  = 0,
+        .resource       = wdt_resources,
+        .num_resources  = ARRAY_SIZE(wdt_resources),
 };
 
 static void __init at91_add_device_watchdog(void)
@@ -1196,8 +1205,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91_BASE_SYS + AT91_DBGU,
-                .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+                .start  = AT91SAM9263_BASE_DBGU,
+                .end    = AT91SAM9263_BASE_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index 4ba85499fa97..d89ead740a99 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -25,7 +25,17 @@
 
 static u32 pit_cycle;           /* write-once */
 static u32 pit_cnt;             /* access only w/system irq blocked */
+static void __iomem *pit_base_addr __read_mostly;
 
+static inline unsigned int pit_read(unsigned int reg_offset)
+{
+        return __raw_readl(pit_base_addr + reg_offset);
+}
+
+static inline void pit_write(unsigned int reg_offset, unsigned long value)
+{
+        __raw_writel(value, pit_base_addr + reg_offset);
+}
 
 /*
  * Clocksource:  just a monotonic counter of MCK/16 cycles.
@@ -39,7 +49,7 @@ static cycle_t read_pit_clk(struct clocksource *cs)
 
         raw_local_irq_save(flags);
         elapsed = pit_cnt;
-        t = at91_sys_read(AT91_PIT_PIIR);
+        t = pit_read(AT91_PIT_PIIR);
         raw_local_irq_restore(flags);
 
         elapsed += PIT_PICNT(t) * pit_cycle;
@@ -64,8 +74,8 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
                 /* update clocksource counter */
-                pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
-                at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
+                pit_cnt += pit_cycle * PIT_PICNT(pit_read(AT91_PIT_PIVR));
+                pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
                                 | AT91_PIT_PITIEN);
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
@@ -74,7 +84,7 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
         case CLOCK_EVT_MODE_SHUTDOWN:
         case CLOCK_EVT_MODE_UNUSED:
                 /* disable irq, leaving the clocksource active */
-                at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
+                pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
                 break;
         case CLOCK_EVT_MODE_RESUME:
                 break;
@@ -103,11 +113,11 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
 
         /* The PIT interrupt may be disabled, and is shared */
         if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC)
-                        && (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS)) {
+                        && (pit_read(AT91_PIT_SR) & AT91_PIT_PITS)) {
                 unsigned nr_ticks;
 
                 /* Get number of ticks performed before irq, and ack it */
-                nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
+                nr_ticks = PIT_PICNT(pit_read(AT91_PIT_PIVR));
                 do {
                         pit_cnt += pit_cycle;
                         pit_clkevt.event_handler(&pit_clkevt);
@@ -129,14 +139,14 @@ static struct irqaction at91sam926x_pit_irq = {
 static void at91sam926x_pit_reset(void)
 {
         /* Disable timer and irqs */
-        at91_sys_write(AT91_PIT_MR, 0);
+        pit_write(AT91_PIT_MR, 0);
 
         /* Clear any pending interrupts, wait for PIT to stop counting */
-        while (PIT_CPIV(at91_sys_read(AT91_PIT_PIVR)) != 0)
+        while (PIT_CPIV(pit_read(AT91_PIT_PIVR)) != 0)
                 cpu_relax();
 
         /* Start PIT but don't enable IRQ */
-        at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
+        pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
 }
 
 /*
@@ -178,7 +188,15 @@ static void __init at91sam926x_pit_init(void)
 static void at91sam926x_pit_suspend(void)
 {
         /* Disable timer */
-        at91_sys_write(AT91_PIT_MR, 0);
+        pit_write(AT91_PIT_MR, 0);
+}
+
+void __init at91sam926x_ioremap_pit(u32 addr)
+{
+        pit_base_addr = ioremap(addr, 16);
+
+        if (!pit_base_addr)
+                panic("Impossible to ioremap PIT\n");
 }
 
 struct sys_timer at91sam926x_timer = {
diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S
index e0256deb91fb..d3f931c5942e 100644
--- a/arch/arm/mach-at91/at91sam9_alt_reset.S
+++ b/arch/arm/mach-at91/at91sam9_alt_reset.S
@@ -14,20 +14,15 @@
  */
 
 #include <linux/linkage.h>
-#include <asm/system.h>
 #include <mach/hardware.h>
 #include <mach/at91sam9_sdramc.h>
 #include <mach/at91_rstc.h>
 
                         .arm
 
-                        .globl  at91sam9_alt_reset
+                        .globl  at91sam9_alt_restart
 
-at91sam9_alt_reset:     mrc     p15, 0, r0, c1, c0, 0
-                        orr     r0, r0, #CR_I
-                        mcr     p15, 0, r0, c1, c0, 0           @ enable I-cache
-
-                        ldr     r0, .at91_va_base_sdramc        @ preload constants
+at91sam9_alt_restart:   ldr     r0, .at91_va_base_sdramc        @ preload constants
                         ldr     r1, .at91_va_base_rstc_cr
 
                         mov     r2, #1
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 318b0407ea04..7032dd32cdf0 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -11,7 +11,6 @@
  */
 
 #include <linux/module.h>
-#include <linux/pm.h>
 #include <linux/dma-mapping.h>
 
 #include <asm/irq.h>
@@ -20,12 +19,12 @@
 #include <mach/at91sam9g45.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
-#include <mach/at91_shdwc.h>
 #include <mach/cpu.h>
 
 #include "soc.h"
 #include "generic.h"
 #include "clock.h"
+#include "sam9_smc.h"
 
 /* --------------------------------------------------------------------
  *  Clocks
@@ -150,7 +149,7 @@ static struct clk ac97_clk = {
         .type           = CLK_TYPE_PERIPHERAL,
 };
 static struct clk macb_clk = {
-        .name           = "macb_clk",
+        .name           = "pclk",
         .pmc_mask       = 1 << AT91SAM9G45_ID_EMAC,
         .type           = CLK_TYPE_PERIPHERAL,
 };
@@ -209,6 +208,8 @@ static struct clk *periph_clocks[] __initdata = {
 };
 
 static struct clk_lookup periph_clocks_lookups[] = {
+        /* One additional fake clock for macb_hclk */
+        CLKDEV_CON_ID("hclk", &macb_clk),
         /* One additional fake clock for ohci */
         CLKDEV_CON_ID("ohci_clk", &uhphs_clk),
         CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci", &uhphs_clk),
@@ -231,6 +232,11 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("usart", "fff98000.serial", &usart3_clk),
         /* fake hclk clock */
         CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
+        CLKDEV_CON_ID("pioA", &pioA_clk),
+        CLKDEV_CON_ID("pioB", &pioB_clk),
+        CLKDEV_CON_ID("pioC", &pioC_clk),
+        CLKDEV_CON_ID("pioD", &pioDE_clk),
+        CLKDEV_CON_ID("pioE", &pioDE_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
@@ -293,41 +299,30 @@ void __init at91sam9g45_set_console_clock(int id)
  *  GPIO
  * -------------------------------------------------------------------- */
 
-static struct at91_gpio_bank at91sam9g45_gpio[] = {
+static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
         {
                 .id             = AT91SAM9G45_ID_PIOA,
-                .offset         = AT91_PIOA,
-                .clock          = &pioA_clk,
+                .regbase        = AT91SAM9G45_BASE_PIOA,
         }, {
                 .id             = AT91SAM9G45_ID_PIOB,
-                .offset         = AT91_PIOB,
-                .clock          = &pioB_clk,
+                .regbase        = AT91SAM9G45_BASE_PIOB,
         }, {
                 .id             = AT91SAM9G45_ID_PIOC,
-                .offset         = AT91_PIOC,
-                .clock          = &pioC_clk,
+                .regbase        = AT91SAM9G45_BASE_PIOC,
         }, {
                 .id             = AT91SAM9G45_ID_PIODE,
-                .offset         = AT91_PIOD,
-                .clock          = &pioDE_clk,
+                .regbase        = AT91SAM9G45_BASE_PIOD,
         }, {
                 .id             = AT91SAM9G45_ID_PIODE,
-                .offset         = AT91_PIOE,
-                .clock          = &pioDE_clk,
+                .regbase        = AT91SAM9G45_BASE_PIOE,
         }
 };
 
-static void at91sam9g45_reset(void)
+static void at91sam9g45_restart(char mode, const char *cmd)
 {
         at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
 }
 
-static void at91sam9g45_poweroff(void)
-{
-        at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
-}
-
-
 /* --------------------------------------------------------------------
  *  AT91SAM9G45 processor initialization
  * -------------------------------------------------------------------- */
@@ -338,10 +333,16 @@ static void __init at91sam9g45_map_io(void)
         init_consistent_dma_size(SZ_4M);
 }
 
+static void __init at91sam9g45_ioremap_registers(void)
+{
+        at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC);
+        at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
+        at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC);
+}
+
 static void __init at91sam9g45_initialize(void)
 {
-        at91_arch_reset = at91sam9g45_reset;
-        pm_power_off = at91sam9g45_poweroff;
+        arm_pm_restart = at91sam9g45_restart;
         at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
 
         /* Register GPIO subsystem */
@@ -393,6 +394,7 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
 struct at91_init_soc __initdata at91sam9g45_soc = {
         .map_io = at91sam9g45_map_io,
         .default_irq_priority = at91sam9g45_default_irq_priority,
+        .ioremap_registers = at91sam9g45_ioremap_registers,
         .register_clocks = at91sam9g45_register_clocks,
         .init = at91sam9g45_initialize,
 };
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 09a16d6bd5cd..b7582dd10dc3 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -44,8 +44,8 @@ static struct at_dma_platform_data atdma_pdata = {
 
 static struct resource hdmac_resources[] = {
         [0] = {
-                .start  = AT91_BASE_SYS + AT91_DMA,
-                .end    = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1,
+                .start  = AT91SAM9G45_BASE_DMA,
+                .end    = AT91SAM9G45_BASE_DMA + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
@@ -120,7 +120,7 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data)
 
         /* Enable VBus control for UHP ports */
         for (i = 0; i < data->ports; i++) {
-                if (data->vbus_pin[i])
+                if (gpio_is_valid(data->vbus_pin[i]))
                         at91_set_gpio_output(data->vbus_pin[i], 0);
         }
 
@@ -181,7 +181,7 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data)
 
         /* Enable VBus control for UHP ports */
         for (i = 0; i < data->ports; i++) {
-                if (data->vbus_pin[i])
+                if (gpio_is_valid(data->vbus_pin[i]))
                         at91_set_gpio_output(data->vbus_pin[i], 0);
         }
 
@@ -263,7 +263,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
         usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
         memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
 
-        if (data && data->vbus_pin > 0) {
+        if (data && gpio_is_valid(data->vbus_pin)) {
                 at91_set_gpio_input(data->vbus_pin, 0);
                 at91_set_deglitch(data->vbus_pin, 1);
                 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
@@ -284,7 +284,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) {}
 
 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
 static u64 eth_dmamask = DMA_BIT_MASK(32);
-static struct at91_eth_data eth_data;
+static struct macb_platform_data eth_data;
 
 static struct resource eth_resources[] = {
         [0] = {
@@ -311,12 +311,12 @@ static struct platform_device at91sam9g45_eth_device = {
         .num_resources  = ARRAY_SIZE(eth_resources),
 };
 
-void __init at91_add_device_eth(struct at91_eth_data *data)
+void __init at91_add_device_eth(struct macb_platform_data *data)
 {
         if (!data)
                 return;
 
-        if (data->phy_irq_pin) {
+        if (gpio_is_valid(data->phy_irq_pin)) {
                 at91_set_gpio_input(data->phy_irq_pin, 0);
                 at91_set_deglitch(data->phy_irq_pin, 1);
         }
@@ -348,7 +348,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data)
         platform_device_register(&at91sam9g45_eth_device);
 }
 #else
-void __init at91_add_device_eth(struct at91_eth_data *data) {}
+void __init at91_add_device_eth(struct macb_platform_data *data) {}
 #endif
 
 
@@ -449,11 +449,11 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
 
 
         /* input/irq */
-        if (data->slot[0].detect_pin) {
+        if (gpio_is_valid(data->slot[0].detect_pin)) {
                 at91_set_gpio_input(data->slot[0].detect_pin, 1);
                 at91_set_deglitch(data->slot[0].detect_pin, 1);
         }
-        if (data->slot[0].wp_pin)
+        if (gpio_is_valid(data->slot[0].wp_pin))
                 at91_set_gpio_input(data->slot[0].wp_pin, 1);
 
         if (mmc_id == 0) {              /* MCI0 */
@@ -529,8 +529,8 @@ static struct resource nand_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = AT91_BASE_SYS + AT91_ECC,
-                .end    = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
+                .start  = AT91SAM9G45_BASE_ECC,
+                .end    = AT91SAM9G45_BASE_ECC + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         }
 };
@@ -556,15 +556,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
 
         /* enable pin */
-        if (data->enable_pin)
+        if (gpio_is_valid(data->enable_pin))
                 at91_set_gpio_output(data->enable_pin, 1);
 
         /* ready/busy pin */
-        if (data->rdy_pin)
+        if (gpio_is_valid(data->rdy_pin))
                 at91_set_gpio_input(data->rdy_pin, 1);
 
         /* card detect pin */
-        if (data->det_pin)
+        if (gpio_is_valid(data->det_pin))
                 at91_set_gpio_input(data->det_pin, 1);
 
         nand_data = *data;
@@ -859,7 +859,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
         at91_set_A_periph(AT91_PIN_PD6, 0);     /* AC97RX */
 
         /* reset */
-        if (data->reset_pin)
+        if (gpio_is_valid(data->reset_pin))
                 at91_set_gpio_output(data->reset_pin, 0);
 
         ac97_data = *data;
@@ -1009,10 +1009,24 @@ static void __init at91_add_device_tc(void) { }
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
+static struct resource rtc_resources[] = {
+        [0] = {
+                .start  = AT91SAM9G45_BASE_RTC,
+                .end    = AT91SAM9G45_BASE_RTC + SZ_256 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91_ID_SYS,
+                .end    = AT91_ID_SYS,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
 static struct platform_device at91sam9g45_rtc_device = {
         .name           = "at91_rtc",
         .id             = -1,
-        .num_resources  = 0,
+        .resource       = rtc_resources,
+        .num_resources  = ARRAY_SIZE(rtc_resources),
 };
 
 static void __init at91_add_device_rtc(void)
@@ -1081,8 +1095,8 @@ void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {}
 
 static struct resource rtt_resources[] = {
         {
-                .start  = AT91_BASE_SYS + AT91_RTT,
-                .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
+                .start  = AT91SAM9G45_BASE_RTT,
+                .end    = AT91SAM9G45_BASE_RTT + SZ_16 - 1,
                 .flags  = IORESOURCE_MEM,
         }
 };
@@ -1133,10 +1147,19 @@ static void __init at91_add_device_trng(void) {}
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
+static struct resource wdt_resources[] = {
+        {
+                .start  = AT91SAM9G45_BASE_WDT,
+                .end    = AT91SAM9G45_BASE_WDT + SZ_16 - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
 static struct platform_device at91sam9g45_wdt_device = {
         .name           = "at91_wdt",
         .id             = -1,
-        .num_resources  = 0,
+        .resource       = wdt_resources,
+        .num_resources  = ARRAY_SIZE(wdt_resources),
 };
 
 static void __init at91_add_device_watchdog(void)
@@ -1332,8 +1355,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91_BASE_SYS + AT91_DBGU,
-                .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+                .start  = AT91SAM9G45_BASE_DBGU,
+                .end    = AT91SAM9G45_BASE_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index a238105d2c11..d6bcb1da11df 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -10,7 +10,6 @@
  */
 
 #include <linux/module.h>
-#include <linux/pm.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
@@ -20,11 +19,11 @@
 #include <mach/at91sam9rl.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
-#include <mach/at91_shdwc.h>
 
 #include "soc.h"
 #include "generic.h"
 #include "clock.h"
+#include "sam9_smc.h"
 
 /* --------------------------------------------------------------------
  *  Clocks
@@ -184,6 +183,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
         CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
         CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
+        CLKDEV_CON_ID("pioA", &pioA_clk),
+        CLKDEV_CON_ID("pioB", &pioB_clk),
+        CLKDEV_CON_ID("pioC", &pioC_clk),
+        CLKDEV_CON_ID("pioD", &pioD_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
@@ -243,32 +246,22 @@ void __init at91sam9rl_set_console_clock(int id)
  *  GPIO
  * -------------------------------------------------------------------- */
 
-static struct at91_gpio_bank at91sam9rl_gpio[] = {
+static struct at91_gpio_bank at91sam9rl_gpio[] __initdata = {
         {
                 .id             = AT91SAM9RL_ID_PIOA,
-                .offset         = AT91_PIOA,
-                .clock          = &pioA_clk,
+                .regbase        = AT91SAM9RL_BASE_PIOA,
         }, {
                 .id             = AT91SAM9RL_ID_PIOB,
-                .offset         = AT91_PIOB,
-                .clock          = &pioB_clk,
+                .regbase        = AT91SAM9RL_BASE_PIOB,
         }, {
                 .id             = AT91SAM9RL_ID_PIOC,
-                .offset         = AT91_PIOC,
-                .clock          = &pioC_clk,
+                .regbase        = AT91SAM9RL_BASE_PIOC,
         }, {
                 .id             = AT91SAM9RL_ID_PIOD,
-                .offset         = AT91_PIOD,
-                .clock          = &pioD_clk,
+                .regbase        = AT91SAM9RL_BASE_PIOD,
         }
 };
 
-static void at91sam9rl_poweroff(void)
-{
-        at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
-}
-
-
 /* --------------------------------------------------------------------
  *  AT91SAM9RL processor initialization
  * -------------------------------------------------------------------- */
@@ -290,10 +283,16 @@ static void __init at91sam9rl_map_io(void)
         at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size);
 }
 
+static void __init at91sam9rl_ioremap_registers(void)
+{
+        at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC);
+        at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT);
+        at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
+}
+
 static void __init at91sam9rl_initialize(void)
 {
-        at91_arch_reset = at91sam9_alt_reset;
-        pm_power_off = at91sam9rl_poweroff;
+        arm_pm_restart = at91sam9_alt_restart;
         at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
 
         /* Register GPIO subsystem */
@@ -345,6 +344,7 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
 struct at91_init_soc __initdata at91sam9rl_soc = {
         .map_io = at91sam9rl_map_io,
         .default_irq_priority = at91sam9rl_default_irq_priority,
+        .ioremap_registers = at91sam9rl_ioremap_registers,
         .register_clocks = at91sam9rl_register_clocks,
         .init = at91sam9rl_initialize,
 };
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 628eb566d60c..61908dce9784 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -39,8 +39,8 @@ static struct at_dma_platform_data atdma_pdata = {
 
 static struct resource hdmac_resources[] = {
         [0] = {
-                .start  = AT91_BASE_SYS + AT91_DMA,
-                .end    = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1,
+                .start  = AT91SAM9RL_BASE_DMA,
+                .end    = AT91SAM9RL_BASE_DMA + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [2] = {
@@ -147,7 +147,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data)
         usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
         memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
 
-        if (data && data->vbus_pin > 0) {
+        if (data && gpio_is_valid(data->vbus_pin)) {
                 at91_set_gpio_input(data->vbus_pin, 0);
                 at91_set_deglitch(data->vbus_pin, 1);
                 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
@@ -201,13 +201,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
                 return;
 
         /* input/irq */
-        if (data->det_pin) {
+        if (gpio_is_valid(data->det_pin)) {
                 at91_set_gpio_input(data->det_pin, 1);
                 at91_set_deglitch(data->det_pin, 1);
         }
-        if (data->wp_pin)
+        if (gpio_is_valid(data->wp_pin))
                 at91_set_gpio_input(data->wp_pin, 1);
-        if (data->vcc_pin)
+        if (gpio_is_valid(data->vcc_pin))
                 at91_set_gpio_output(data->vcc_pin, 0);
 
         /* CLK */
@@ -248,8 +248,8 @@ static struct resource nand_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = AT91_BASE_SYS + AT91_ECC,
-                .end    = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
+                .start  = AT91SAM9RL_BASE_ECC,
+                .end    = AT91SAM9RL_BASE_ECC + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         }
 };
@@ -275,15 +275,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 
         /* enable pin */
-        if (data->enable_pin)
+        if (gpio_is_valid(data->enable_pin))
                 at91_set_gpio_output(data->enable_pin, 1);
 
         /* ready/busy pin */
-        if (data->rdy_pin)
+        if (gpio_is_valid(data->rdy_pin))
                 at91_set_gpio_input(data->rdy_pin, 1);
 
         /* card detect pin */
-        if (data->det_pin)
+        if (gpio_is_valid(data->det_pin))
                 at91_set_gpio_input(data->det_pin, 1);
 
         at91_set_A_periph(AT91_PIN_PB4, 0);             /* NANDOE */
@@ -483,7 +483,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data)
         at91_set_A_periph(AT91_PIN_PD4, 0);     /* AC97RX */
 
         /* reset */
-        if (data->reset_pin)
+        if (gpio_is_valid(data->reset_pin))
                 at91_set_gpio_output(data->reset_pin, 0);
 
         ac97_data = *data;
@@ -685,8 +685,8 @@ static void __init at91_add_device_rtc(void) {}
 
 static struct resource rtt_resources[] = {
         {
-                .start  = AT91_BASE_SYS + AT91_RTT,
-                .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
+                .start  = AT91SAM9RL_BASE_RTT,
+                .end    = AT91SAM9RL_BASE_RTT + SZ_16 - 1,
                 .flags  = IORESOURCE_MEM,
         }
 };
@@ -709,10 +709,19 @@ static void __init at91_add_device_rtt(void)
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
+static struct resource wdt_resources[] = {
+        {
+                .start  = AT91SAM9RL_BASE_WDT,
+                .end    = AT91SAM9RL_BASE_WDT + SZ_16 - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
 static struct platform_device at91sam9rl_wdt_device = {
         .name           = "at91_wdt",
         .id             = -1,
-        .num_resources  = 0,
+        .resource       = wdt_resources,
+        .num_resources  = ARRAY_SIZE(wdt_resources),
 };
 
 static void __init at91_add_device_watchdog(void)
@@ -908,8 +917,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #if defined(CONFIG_SERIAL_ATMEL)
 static struct resource dbgu_resources[] = {
         [0] = {
-                .start  = AT91_BASE_SYS + AT91_DBGU,
-                .end    = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+                .start  = AT91SAM9RL_BASE_DBGU,
+                .end    = AT91SAM9RL_BASE_DBGU + SZ_512 - 1,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c
index 367d5cd5e362..2628384aaae1 100644
--- a/arch/arm/mach-at91/board-1arm.c
+++ b/arch/arm/mach-at91/board-1arm.c
@@ -63,13 +63,15 @@ static void __init onearm_init_early(void)
         at91_set_serial_console(0);
 }
 
-static struct at91_eth_data __initdata onearm_eth_data = {
+static struct macb_platform_data __initdata onearm_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC4,
         .is_rmii        = 1,
 };
 
 static struct at91_usbh_data __initdata onearm_usbh_data = {
         .ports          = 1,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata onearm_udc_data = {
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
index 4282d96dffa8..3bb40694b02d 100644
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -75,6 +75,8 @@ static void __init afeb9260_init_early(void)
  */
 static struct at91_usbh_data __initdata afeb9260_usbh_data = {
         .ports          = 1,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -82,7 +84,7 @@ static struct at91_usbh_data __initdata afeb9260_usbh_data = {
  */
 static struct at91_udc_data __initdata afeb9260_udc_data = {
         .vbus_pin       = AT91_PIN_PC5,
-        .pullup_pin     = 0,            /* pull-up driven by UDC */
+        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
 };
 
 
@@ -103,7 +105,7 @@ static struct spi_board_info afeb9260_spi_devices[] = {
 /*
  * MACB Ethernet device
  */
-static struct at91_eth_data __initdata afeb9260_macb_data = {
+static struct macb_platform_data __initdata afeb9260_macb_data = {
         .phy_irq_pin    = AT91_PIN_PA9,
         .is_rmii        = 0,
 };
@@ -138,6 +140,7 @@ static struct atmel_nand_data __initdata afeb9260_nand_data = {
         .bus_width_16   = 0,
         .parts          = afeb9260_nand_partition,
         .num_parts      = ARRAY_SIZE(afeb9260_nand_partition),
+        .det_pin        = -EINVAL,
 };
 
 
@@ -149,6 +152,7 @@ static struct at91_mmc_data __initdata afeb9260_mmc_data = {
         .wp_pin         = AT91_PIN_PC4,
         .slot_b         = 1,
         .wire4          = 1,
+        .vcc_pin        = -EINVAL,
 };
 
 
@@ -169,6 +173,8 @@ static struct i2c_board_info __initdata afeb9260_i2c_devices[] = {
 static struct at91_cf_data afeb9260_cf_data = {
         .chipselect = 4,
         .irq_pin    = AT91_PIN_PA6,
+        .det_pin        = -EINVAL,
+        .vcc_pin        = -EINVAL,
         .rst_pin    = AT91_PIN_PA7,
         .flags      = AT91_CF_TRUE_IDE,
 };
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index f90cfb32bad2..8510e9e54988 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -62,6 +62,8 @@ static void __init cam60_init_early(void)
  */
 static struct at91_usbh_data __initdata cam60_usbh_data = {
         .ports          = 1,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 
@@ -115,7 +117,7 @@ static struct spi_board_info cam60_spi_devices[] __initdata = {
 /*
  * MACB Ethernet device
  */
-static struct __initdata at91_eth_data cam60_macb_data = {
+static struct __initdata macb_platform_data cam60_macb_data = {
         .phy_irq_pin    = AT91_PIN_PB5,
         .is_rmii        = 0,
 };
@@ -135,7 +137,7 @@ static struct mtd_partition __initdata cam60_nand_partition[] = {
 static struct atmel_nand_data __initdata cam60_nand_data = {
         .ale            = 21,
         .cle            = 22,
-        // .det_pin     = ... not there
+        .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PA9,
         .enable_pin     = AT91_PIN_PA7,
         .parts          = cam60_nand_partition,
@@ -163,7 +165,7 @@ static struct sam9_smc_config __initdata cam60_nand_smc_config = {
 static void __init cam60_add_device_nand(void)
 {
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(3, &cam60_nand_smc_config);
+        sam9_smc_configure(0, 3, &cam60_nand_smc_config);
 
         at91_add_device_nand(&cam60_nand_data);
 }
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index 5dffd3be62d2..ac3de4f7c31d 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -70,6 +70,8 @@ static void __init cap9adk_init_early(void)
  */
 static struct at91_usbh_data __initdata cap9adk_usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -144,16 +146,17 @@ static struct spi_board_info cap9adk_spi_devices[] = {
  */
 static struct at91_mmc_data __initdata cap9adk_mmc_data = {
         .wire4          = 1,
-//      .det_pin        = ... not connected
-//      .wp_pin         = ... not connected
-//      .vcc_pin        = ... not connected
+        .det_pin        = -EINVAL,
+        .wp_pin         = -EINVAL,
+        .vcc_pin        = -EINVAL,
 };
 
 
 /*
  * MACB Ethernet device
  */
-static struct at91_eth_data __initdata cap9adk_macb_data = {
+static struct macb_platform_data __initdata cap9adk_macb_data = {
+        .phy_irq_pin    = -EINVAL,
         .is_rmii        = 1,
 };
 
@@ -172,8 +175,8 @@ static struct mtd_partition __initdata cap9adk_nand_partitions[] = {
 static struct atmel_nand_data __initdata cap9adk_nand_data = {
         .ale            = 21,
         .cle            = 22,
-//      .det_pin        = ... not connected
-//      .rdy_pin        = ... not connected
+        .det_pin        = -EINVAL,
+        .rdy_pin        = -EINVAL,
         .enable_pin     = AT91_PIN_PD15,
         .parts          = cap9adk_nand_partitions,
         .num_parts      = ARRAY_SIZE(cap9adk_nand_partitions),
@@ -212,7 +215,7 @@ static void __init cap9adk_add_device_nand(void)
                 cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8;
 
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(3, &cap9adk_nand_smc_config);
+        sam9_smc_configure(0, 3, &cap9adk_nand_smc_config);
 
         at91_add_device_nand(&cap9adk_nand_data);
 }
@@ -282,7 +285,7 @@ static __init void cap9adk_add_device_nor(void)
         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
 
         /* configure chip-select 0 (NOR) */
-        sam9_smc_configure(0, &cap9adk_nor_smc_config);
+        sam9_smc_configure(0, 0, &cap9adk_nor_smc_config);
 
         platform_device_register(&cap9adk_nor_flash);
 }
@@ -351,7 +354,7 @@ static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data;
  * AC97
  */
 static struct ac97c_platform_data cap9adk_ac97_data = {
-//      .reset_pin      = ... not connected
+        .reset_pin      = -EINVAL,
 };
 
 
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
index 774c87fcbd5b..59d9cf997537 100644
--- a/arch/arm/mach-at91/board-carmeva.c
+++ b/arch/arm/mach-at91/board-carmeva.c
@@ -57,13 +57,15 @@ static void __init carmeva_init_early(void)
         at91_set_serial_console(0);
 }
 
-static struct at91_eth_data __initdata carmeva_eth_data = {
+static struct macb_platform_data __initdata carmeva_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC4,
         .is_rmii        = 1,
 };
 
 static struct at91_usbh_data __initdata carmeva_usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata carmeva_udc_data = {
@@ -75,8 +77,8 @@ static struct at91_udc_data __initdata carmeva_udc_data = {
 // static struct at91_cf_data __initdata carmeva_cf_data = {
 //      .det_pin        = AT91_PIN_PB0,
 //      .rst_pin        = AT91_PIN_PC5,
-        // .irq_pin     = ... not connected
-        // .vcc_pin     = ... always powered
+        // .irq_pin     = -EINVAL,
+        // .vcc_pin     = -EINVAL,
 // };
 
 static struct at91_mmc_data __initdata carmeva_mmc_data = {
@@ -84,6 +86,7 @@ static struct at91_mmc_data __initdata carmeva_mmc_data = {
         .wire4          = 1,
         .det_pin        = AT91_PIN_PB10,
         .wp_pin         = AT91_PIN_PC14,
+        .vcc_pin        = -EINVAL,
 };
 
 static struct spi_board_info carmeva_spi_devices[] = {
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c
index fc885a4ce243..9ab3d1ea326d 100644
--- a/arch/arm/mach-at91/board-cpu9krea.c
+++ b/arch/arm/mach-at91/board-cpu9krea.c
@@ -86,6 +86,8 @@ static void __init cpu9krea_init_early(void)
  */
 static struct at91_usbh_data __initdata cpu9krea_usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -93,13 +95,14 @@ static struct at91_usbh_data __initdata cpu9krea_usbh_data = {
  */
 static struct at91_udc_data __initdata cpu9krea_udc_data = {
         .vbus_pin       = AT91_PIN_PC8,
-        .pullup_pin     = 0,            /* pull-up driven by UDC */
+        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
 };
 
 /*
  * MACB Ethernet device
  */
-static struct at91_eth_data __initdata cpu9krea_macb_data = {
+static struct macb_platform_data __initdata cpu9krea_macb_data = {
+        .phy_irq_pin    = -EINVAL,
         .is_rmii        = 1,
 };
 
@@ -112,6 +115,7 @@ static struct atmel_nand_data __initdata cpu9krea_nand_data = {
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
         .bus_width_16   = 0,
+        .det_pin        = -EINVAL,
 };
 
 #ifdef CONFIG_MACH_CPU9260
@@ -156,7 +160,7 @@ static struct sam9_smc_config __initdata cpu9krea_nand_smc_config = {
 
 static void __init cpu9krea_add_device_nand(void)
 {
-        sam9_smc_configure(3, &cpu9krea_nand_smc_config);
+        sam9_smc_configure(0, 3, &cpu9krea_nand_smc_config);
         at91_add_device_nand(&cpu9krea_nand_data);
 }
 
@@ -238,7 +242,7 @@ static __init void cpu9krea_add_device_nor(void)
         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V);
 
         /* configure chip-select 0 (NOR) */
-        sam9_smc_configure(0, &cpu9krea_nor_smc_config);
+        sam9_smc_configure(0, 0, &cpu9krea_nor_smc_config);
 
         platform_device_register(&cpu9krea_nor_flash);
 }
@@ -337,6 +341,8 @@ static struct at91_mmc_data __initdata cpu9krea_mmc_data = {
         .slot_b         = 0,
         .wire4          = 1,
         .det_pin        = AT91_PIN_PA29,
+        .wp_pin         = -EINVAL,
+        .vcc_pin        = -EINVAL,
 };
 
 static void __init cpu9krea_board_init(void)
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c
index d35e65b08ccd..368e1427ad99 100644
--- a/arch/arm/mach-at91/board-cpuat91.c
+++ b/arch/arm/mach-at91/board-cpuat91.c
@@ -82,12 +82,15 @@ static void __init cpuat91_init_early(void)
         at91_set_serial_console(0);
 }
 
-static struct at91_eth_data __initdata cpuat91_eth_data = {
+static struct macb_platform_data __initdata cpuat91_eth_data = {
+        .phy_irq_pin    = -EINVAL,
         .is_rmii        = 1,
 };
 
 static struct at91_usbh_data __initdata cpuat91_usbh_data = {
         .ports          = 1,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata cpuat91_udc_data = {
@@ -98,6 +101,8 @@ static struct at91_udc_data __initdata cpuat91_udc_data = {
 static struct at91_mmc_data __initdata cpuat91_mmc_data = {
         .det_pin        = AT91_PIN_PC2,
         .wire4          = 1,
+        .wp_pin         = -EINVAL,
+        .vcc_pin        = -EINVAL,
 };
 
 static struct physmap_flash_data cpuat91_flash_data = {
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c
index c3936665e645..1a1547b1ce4e 100644
--- a/arch/arm/mach-at91/board-csb337.c
+++ b/arch/arm/mach-at91/board-csb337.c
@@ -58,18 +58,20 @@ static void __init csb337_init_early(void)
         at91_set_serial_console(0);
 }
 
-static struct at91_eth_data __initdata csb337_eth_data = {
+static struct macb_platform_data __initdata csb337_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC2,
         .is_rmii        = 0,
 };
 
 static struct at91_usbh_data __initdata csb337_usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata csb337_udc_data = {
-        // this has no VBUS sensing pin
         .pullup_pin     = AT91_PIN_PA24,
+        .vbus_pin       = -EINVAL,
 };
 
 static struct i2c_board_info __initdata csb337_i2c_devices[] = {
@@ -98,6 +100,7 @@ static struct at91_mmc_data __initdata csb337_mmc_data = {
         .slot_b         = 0,
         .wire4          = 1,
         .wp_pin         = AT91_PIN_PD6,
+        .vcc_pin        = -EINVAL,
 };
 
 static struct spi_board_info csb337_spi_devices[] = {
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c
index 586100e2acbb..f650bf39455d 100644
--- a/arch/arm/mach-at91/board-csb637.c
+++ b/arch/arm/mach-at91/board-csb637.c
@@ -52,13 +52,15 @@ static void __init csb637_init_early(void)
         at91_set_serial_console(0);
 }
 
-static struct at91_eth_data __initdata csb637_eth_data = {
+static struct macb_platform_data __initdata csb637_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC0,
         .is_rmii        = 0,
 };
 
 static struct at91_usbh_data __initdata csb637_usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata csb637_udc_data = {
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c
index 0b7d32778210..bb6b434ec0c1 100644
--- a/arch/arm/mach-at91/board-dt.c
+++ b/arch/arm/mach-at91/board-dt.c
@@ -50,6 +50,7 @@ static void __init ek_init_early(void)
 static struct atmel_nand_data __initdata ek_nand_data = {
         .ale            = 21,
         .cle            = 22,
+        .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PC8,
         .enable_pin     = AT91_PIN_PC14,
 };
@@ -82,7 +83,7 @@ static void __init ek_add_device_nand(void)
                 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
 
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(3, &ek_nand_smc_config);
+        sam9_smc_configure(0, 3, &ek_nand_smc_config);
 
         at91_add_device_nand(&ek_nand_data);
 }
diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c
index 45db7a3dbef0..d302ca3eeb64 100644
--- a/arch/arm/mach-at91/board-eb9200.c
+++ b/arch/arm/mach-at91/board-eb9200.c
@@ -60,13 +60,15 @@ static void __init eb9200_init_early(void)
         at91_set_serial_console(0);
 }
 
-static struct at91_eth_data __initdata eb9200_eth_data = {
+static struct macb_platform_data __initdata eb9200_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC4,
         .is_rmii        = 1,
 };
 
 static struct at91_usbh_data __initdata eb9200_usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata eb9200_udc_data = {
@@ -75,15 +77,18 @@ static struct at91_udc_data __initdata eb9200_udc_data = {
 };
 
 static struct at91_cf_data __initdata eb9200_cf_data = {
+        .irq_pin        = -EINVAL,
         .det_pin        = AT91_PIN_PB0,
+        .vcc_pin        = -EINVAL,
         .rst_pin        = AT91_PIN_PC5,
-        // .irq_pin     = ... not connected
-        // .vcc_pin     = ... always powered
 };
 
 static struct at91_mmc_data __initdata eb9200_mmc_data = {
         .slot_b         = 0,
         .wire4          = 1,
+        .det_pin        = -EINVAL,
+        .wp_pin         = -EINVAL,
+        .vcc_pin        = -EINVAL,
 };
 
 static struct i2c_board_info __initdata eb9200_i2c_devices[] = {
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c
index 2f9c16d29212..69966ce4d776 100644
--- a/arch/arm/mach-at91/board-ecbat91.c
+++ b/arch/arm/mach-at91/board-ecbat91.c
@@ -64,18 +64,23 @@ static void __init ecb_at91init_early(void)
         at91_set_serial_console(0);
 }
 
-static struct at91_eth_data __initdata ecb_at91eth_data = {
+static struct macb_platform_data __initdata ecb_at91eth_data = {
         .phy_irq_pin    = AT91_PIN_PC4,
         .is_rmii        = 0,
 };
 
 static struct at91_usbh_data __initdata ecb_at91usbh_data = {
         .ports          = 1,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_mmc_data __initdata ecb_at91mmc_data = {
         .slot_b         = 0,
         .wire4          = 1,
+        .det_pin        = -EINVAL,
+        .wp_pin         = -EINVAL,
+        .vcc_pin        = -EINVAL,
 };
 
 
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c
index 8252c722607b..07ef35b0ec2c 100644
--- a/arch/arm/mach-at91/board-eco920.c
+++ b/arch/arm/mach-at91/board-eco920.c
@@ -47,13 +47,15 @@ static void __init eco920_init_early(void)
         at91_set_serial_console(0);
 }
 
-static struct at91_eth_data __initdata eco920_eth_data = {
+static struct macb_platform_data __initdata eco920_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC2,
         .is_rmii        = 1,
 };
 
 static struct at91_usbh_data __initdata eco920_usbh_data = {
         .ports          = 1,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata eco920_udc_data = {
@@ -64,6 +66,9 @@ static struct at91_udc_data __initdata eco920_udc_data = {
 static struct at91_mmc_data __initdata eco920_mmc_data = {
         .slot_b         = 0,
         .wire4          = 0,
+        .det_pin        = -EINVAL,
+        .wp_pin         = -EINVAL,
+        .vcc_pin        = -EINVAL,
 };
 
 static struct physmap_flash_data eco920_flash_data = {
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c
index 4c3f65d9c59b..eec02cd57ced 100644
--- a/arch/arm/mach-at91/board-flexibity.c
+++ b/arch/arm/mach-at91/board-flexibity.c
@@ -52,12 +52,14 @@ static void __init flexibity_init_early(void)
 /* USB Host port */
 static struct at91_usbh_data __initdata flexibity_usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /* USB Device port */
 static struct at91_udc_data __initdata flexibity_udc_data = {
         .vbus_pin       = AT91_PIN_PC5,
-        .pullup_pin     = 0,            /* pull-up driven by UDC */
+        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
 };
 
 /* SPI devices */
@@ -76,6 +78,7 @@ static struct at91_mmc_data __initdata flexibity_mmc_data = {
         .wire4          = 1,
         .det_pin        = AT91_PIN_PC9,
         .wp_pin         = AT91_PIN_PC4,
+        .vcc_pin        = -EINVAL,
 };
 
 /* LEDs */
diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c
index f27d1a780cfa..caf017f0f4ee 100644
--- a/arch/arm/mach-at91/board-foxg20.c
+++ b/arch/arm/mach-at91/board-foxg20.c
@@ -106,6 +106,8 @@ static void __init foxg20_init_early(void)
  */
 static struct at91_usbh_data __initdata foxg20_usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -113,7 +115,7 @@ static struct at91_usbh_data __initdata foxg20_usbh_data = {
  */
 static struct at91_udc_data __initdata foxg20_udc_data = {
         .vbus_pin       = AT91_PIN_PC6,
-        .pullup_pin     = 0,            /* pull-up driven by UDC */
+        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
 };
 
 
@@ -135,7 +137,7 @@ static struct spi_board_info foxg20_spi_devices[] = {
 /*
  * MACB Ethernet device
  */
-static struct at91_eth_data __initdata foxg20_macb_data = {
+static struct macb_platform_data __initdata foxg20_macb_data = {
         .phy_irq_pin    = AT91_PIN_PA7,
         .is_rmii        = 1,
 };
@@ -147,6 +149,9 @@ static struct at91_eth_data __initdata foxg20_macb_data = {
 static struct at91_mmc_data __initdata foxg20_mmc_data = {
         .slot_b         = 1,
         .wire4          = 1,
+        .det_pin        = -EINVAL,
+        .wp_pin         = -EINVAL,
+        .vcc_pin        = -EINVAL,
 };
 
 
diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c
index 2e95949737e6..230e71969fb7 100644
--- a/arch/arm/mach-at91/board-gsia18s.c
+++ b/arch/arm/mach-at91/board-gsia18s.c
@@ -80,6 +80,8 @@ static void __init gsia18s_init_early(void)
  */
 static struct at91_usbh_data __initdata usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -87,13 +89,13 @@ static struct at91_usbh_data __initdata usbh_data = {
  */
 static struct at91_udc_data __initdata udc_data = {
         .vbus_pin       = AT91_PIN_PA22,
-        .pullup_pin     = 0,            /* pull-up driven by UDC */
+        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
 };
 
 /*
  * MACB Ethernet device
  */
-static struct at91_eth_data __initdata macb_data = {
+static struct macb_platform_data __initdata macb_data = {
         .phy_irq_pin    = AT91_PIN_PA28,
         .is_rmii        = 1,
 };
@@ -530,6 +532,7 @@ static struct i2c_board_info __initdata gsia18s_i2c_devices[] = {
 static struct at91_cf_data __initdata gsia18s_cf1_data = {
         .irq_pin        = AT91_PIN_PA27,
         .det_pin        = AT91_PIN_PB30,
+        .vcc_pin        = -EINVAL,
         .rst_pin        = AT91_PIN_PB31,
         .chipselect     = 5,
         .flags          = AT91_CF_TRUE_IDE,
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c
index 3bae73e63633..efde1b2327c8 100644
--- a/arch/arm/mach-at91/board-kafa.c
+++ b/arch/arm/mach-at91/board-kafa.c
@@ -61,13 +61,15 @@ static void __init kafa_init_early(void)
         at91_set_serial_console(0);
 }
 
-static struct at91_eth_data __initdata kafa_eth_data = {
+static struct macb_platform_data __initdata kafa_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC4,
         .is_rmii        = 0,
 };
 
 static struct at91_usbh_data __initdata kafa_usbh_data = {
         .ports          = 1,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata kafa_udc_data = {
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
index e61351ffad50..d75a4a2ad9c2 100644
--- a/arch/arm/mach-at91/board-kb9202.c
+++ b/arch/arm/mach-at91/board-kb9202.c
@@ -69,13 +69,15 @@ static void __init kb9202_init_early(void)
         at91_set_serial_console(0);
 }
 
-static struct at91_eth_data __initdata kb9202_eth_data = {
+static struct macb_platform_data __initdata kb9202_eth_data = {
         .phy_irq_pin    = AT91_PIN_PB29,
         .is_rmii        = 0,
 };
 
 static struct at91_usbh_data __initdata kb9202_usbh_data = {
         .ports          = 1,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata kb9202_udc_data = {
@@ -87,6 +89,8 @@ static struct at91_mmc_data __initdata kb9202_mmc_data = {
         .det_pin        = AT91_PIN_PB2,
         .slot_b         = 0,
         .wire4          = 1,
+        .wp_pin         = -EINVAL,
+        .vcc_pin        = -EINVAL,
 };
 
 static struct mtd_partition __initdata kb9202_nand_partition[] = {
@@ -100,7 +104,7 @@ static struct mtd_partition __initdata kb9202_nand_partition[] = {
 static struct atmel_nand_data __initdata kb9202_nand_data = {
         .ale            = 22,
         .cle            = 21,
-        // .det_pin     = ... not there
+        .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PC29,
         .enable_pin     = AT91_PIN_PC28,
         .parts          = kb9202_nand_partition,
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
index ef816c17dc61..3f8617c0e04e 100644
--- a/arch/arm/mach-at91/board-neocore926.c
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -72,6 +72,7 @@ static void __init neocore926_init_early(void)
 static struct at91_usbh_data __initdata neocore926_usbh_data = {
         .ports          = 2,
         .vbus_pin       = { AT91_PIN_PA24, AT91_PIN_PA21 },
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -79,7 +80,7 @@ static struct at91_usbh_data __initdata neocore926_usbh_data = {
  */
 static struct at91_udc_data __initdata neocore926_udc_data = {
         .vbus_pin       = AT91_PIN_PA25,
-        .pullup_pin     = 0,            /* pull-up driven by UDC */
+        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
 };
 
 
@@ -149,13 +150,14 @@ static struct at91_mmc_data __initdata neocore926_mmc_data = {
         .wire4          = 1,
         .det_pin        = AT91_PIN_PE18,
         .wp_pin         = AT91_PIN_PE19,
+        .vcc_pin        = -EINVAL,
 };
 
 
 /*
  * MACB Ethernet device
  */
-static struct at91_eth_data __initdata neocore926_macb_data = {
+static struct macb_platform_data __initdata neocore926_macb_data = {
         .phy_irq_pin    = AT91_PIN_PE31,
         .is_rmii        = 1,
 };
@@ -190,6 +192,7 @@ static struct atmel_nand_data __initdata neocore926_nand_data = {
         .enable_pin             = AT91_PIN_PD15,
         .parts                  = neocore926_nand_partition,
         .num_parts              = ARRAY_SIZE(neocore926_nand_partition),
+        .det_pin                = -EINVAL,
 };
 
 static struct sam9_smc_config __initdata neocore926_nand_smc_config = {
@@ -213,7 +216,7 @@ static struct sam9_smc_config __initdata neocore926_nand_smc_config = {
 static void __init neocore926_add_device_nand(void)
 {
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(3, &neocore926_nand_smc_config);
+        sam9_smc_configure(0, 3, &neocore926_nand_smc_config);
 
         at91_add_device_nand(&neocore926_nand_data);
 }
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c
index 49e3f699b48e..b4a12fc184c8 100644
--- a/arch/arm/mach-at91/board-pcontrol-g20.c
+++ b/arch/arm/mach-at91/board-pcontrol-g20.c
@@ -96,9 +96,9 @@ static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { {
 static void __init add_device_pcontrol(void)
 {
         /* configure chip-select 4 (IO compatible to 8051  X4 ) */
-        sam9_smc_configure(4, &pcontrol_smc_config[0]);
+        sam9_smc_configure(0, 4, &pcontrol_smc_config[0]);
         /* configure chip-select 7 (FerroRAM 256KiBx16bit MR2A16A  D4 ) */
-        sam9_smc_configure(7, &pcontrol_smc_config[1]);
+        sam9_smc_configure(0, 7, &pcontrol_smc_config[1]);
 }
 
 
@@ -107,6 +107,8 @@ static void __init add_device_pcontrol(void)
  */
 static struct at91_usbh_data __initdata usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 
@@ -122,7 +124,7 @@ static struct at91_udc_data __initdata pcontrol_g20_udc_data = {
 /*
  * MACB Ethernet device
  */
-static struct at91_eth_data __initdata macb_data = {
+static struct macb_platform_data __initdata macb_data = {
         .phy_irq_pin    = AT91_PIN_PA28,
         .is_rmii        = 1,
 };
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c
index 0a8fe6a1b7c8..ab024fa11d5c 100644
--- a/arch/arm/mach-at91/board-picotux200.c
+++ b/arch/arm/mach-at91/board-picotux200.c
@@ -60,13 +60,15 @@ static void __init picotux200_init_early(void)
         at91_set_serial_console(0);
 }
 
-static struct at91_eth_data __initdata picotux200_eth_data = {
+static struct macb_platform_data __initdata picotux200_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC4,
         .is_rmii        = 1,
 };
 
 static struct at91_usbh_data __initdata picotux200_usbh_data = {
         .ports          = 1,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_mmc_data __initdata picotux200_mmc_data = {
@@ -74,6 +76,7 @@ static struct at91_mmc_data __initdata picotux200_mmc_data = {
         .slot_b         = 0,
         .wire4          = 1,
         .wp_pin         = AT91_PIN_PA17,
+        .vcc_pin        = -EINVAL,
 };
 
 #define PICOTUX200_FLASH_BASE   AT91_CHIPSELECT_0
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index 07421bdb88ea..e029d220cb84 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -77,6 +77,8 @@ static void __init ek_init_early(void)
  */
 static struct at91_usbh_data __initdata ek_usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -84,7 +86,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
  */
 static struct at91_udc_data __initdata ek_udc_data = {
         .vbus_pin       = AT91_PIN_PC5,
-        .pullup_pin     = 0,            /* pull-up driven by UDC */
+        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
 };
 
 /*
@@ -104,7 +106,7 @@ static struct spi_board_info ek_spi_devices[] = {
 /*
  * MACB Ethernet device
  */
-static struct at91_eth_data __initdata ek_macb_data = {
+static struct macb_platform_data __initdata ek_macb_data = {
         .phy_irq_pin    = AT91_PIN_PA31,
         .is_rmii        = 1,
 };
@@ -133,7 +135,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
 static struct atmel_nand_data __initdata ek_nand_data = {
         .ale            = 21,
         .cle            = 22,
-//      .det_pin        = ... not connected
+        .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
         .parts          = ek_nand_partition,
@@ -161,7 +163,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
 static void __init ek_add_device_nand(void)
 {
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(3, &ek_nand_smc_config);
+        sam9_smc_configure(0, 3, &ek_nand_smc_config);
 
         at91_add_device_nand(&ek_nand_data);
 }
@@ -172,9 +174,9 @@ static void __init ek_add_device_nand(void)
 static struct at91_mmc_data __initdata ek_mmc_data = {
         .slot_b         = 0,
         .wire4          = 1,
-//      .det_pin        = ... not connected
-//      .wp_pin         = ... not connected
-//      .vcc_pin        = ... not connected
+        .det_pin        = -EINVAL,
+        .wp_pin         = -EINVAL,
+        .vcc_pin        = -EINVAL,
 };
 
 /*
@@ -251,7 +253,7 @@ static void __init ek_board_init(void)
         /* LEDs */
         at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
         /* shutdown controller, wakeup button (5 msec low) */
-        at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
+        at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
                                 | AT91_SHDW_RTTWKEN);
 }
 
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c
index 80a8c9c6e922..782f37946af5 100644
--- a/arch/arm/mach-at91/board-rm9200dk.c
+++ b/arch/arm/mach-at91/board-rm9200dk.c
@@ -65,13 +65,15 @@ static void __init dk_init_early(void)
         at91_set_serial_console(0);
 }
 
-static struct at91_eth_data __initdata dk_eth_data = {
+static struct macb_platform_data __initdata dk_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC4,
         .is_rmii        = 1,
 };
 
 static struct at91_usbh_data __initdata dk_usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata dk_udc_data = {
@@ -80,16 +82,19 @@ static struct at91_udc_data __initdata dk_udc_data = {
 };
 
 static struct at91_cf_data __initdata dk_cf_data = {
+        .irq_pin        = -EINVAL,
         .det_pin        = AT91_PIN_PB0,
+        .vcc_pin        = -EINVAL,
         .rst_pin        = AT91_PIN_PC5,
-        // .irq_pin     = ... not connected
-        // .vcc_pin     = ... always powered
 };
 
 #ifndef CONFIG_MTD_AT91_DATAFLASH_CARD
 static struct at91_mmc_data __initdata dk_mmc_data = {
         .slot_b         = 0,
         .wire4          = 1,
+        .det_pin        = -EINVAL,
+        .wp_pin         = -EINVAL,
+        .vcc_pin        = -EINVAL,
 };
 #endif
 
@@ -143,7 +148,7 @@ static struct atmel_nand_data __initdata dk_nand_data = {
         .cle            = 21,
         .det_pin        = AT91_PIN_PB1,
         .rdy_pin        = AT91_PIN_PC2,
-        // .enable_pin  = ... not there
+        .enable_pin     = -EINVAL,
         .parts          = dk_nand_partition,
         .num_parts      = ARRAY_SIZE(dk_nand_partition),
 };
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c
index 99fd7f8aee0e..ef7c12a92246 100644
--- a/arch/arm/mach-at91/board-rm9200ek.c
+++ b/arch/arm/mach-at91/board-rm9200ek.c
@@ -65,13 +65,15 @@ static void __init ek_init_early(void)
         at91_set_serial_console(0);
 }
 
-static struct at91_eth_data __initdata ek_eth_data = {
+static struct macb_platform_data __initdata ek_eth_data = {
         .phy_irq_pin    = AT91_PIN_PC4,
         .is_rmii        = 1,
 };
 
 static struct at91_usbh_data __initdata ek_usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata ek_udc_data = {
@@ -85,6 +87,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
         .slot_b         = 0,
         .wire4          = 1,
         .wp_pin         = AT91_PIN_PA17,
+        .vcc_pin        = -EINVAL,
 };
 #endif
 
diff --git a/arch/arm/mach-at91/board-rsi-ews.c b/arch/arm/mach-at91/board-rsi-ews.c
index e927df0175df..af0750fafa29 100644
--- a/arch/arm/mach-at91/board-rsi-ews.c
+++ b/arch/arm/mach-at91/board-rsi-ews.c
@@ -60,7 +60,7 @@ static void __init rsi_ews_init_early(void)
 /*
  * Ethernet
  */
-static struct at91_eth_data rsi_ews_eth_data __initdata = {
+static struct macb_platform_data rsi_ews_eth_data __initdata = {
         .phy_irq_pin    = AT91_PIN_PC4,
         .is_rmii        = 1,
 };
@@ -70,6 +70,8 @@ static struct at91_eth_data rsi_ews_eth_data __initdata = {
  */
 static struct at91_usbh_data rsi_ews_usbh_data __initdata = {
         .ports          = 1,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index 072d53af98d9..84bce587735f 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -72,6 +72,8 @@ static void __init ek_init_early(void)
  */
 static struct at91_usbh_data __initdata ek_usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -79,7 +81,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
  */
 static struct at91_udc_data __initdata ek_udc_data = {
         .vbus_pin       = AT91_PIN_PC5,
-        .pullup_pin     = 0,            /* pull-up driven by UDC */
+        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
 };
 
 
@@ -109,7 +111,7 @@ static struct spi_board_info ek_spi_devices[] = {
 /*
  * MACB Ethernet device
  */
-static struct at91_eth_data __initdata ek_macb_data = {
+static struct macb_platform_data __initdata ek_macb_data = {
         .phy_irq_pin    = AT91_PIN_PA7,
         .is_rmii        = 0,
 };
@@ -134,7 +136,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
 static struct atmel_nand_data __initdata ek_nand_data = {
         .ale            = 21,
         .cle            = 22,
-//      .det_pin        = ... not connected
+        .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
         .parts          = ek_nand_partition,
@@ -162,7 +164,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
 static void __init ek_add_device_nand(void)
 {
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(3, &ek_nand_smc_config);
+        sam9_smc_configure(0, 3, &ek_nand_smc_config);
 
         at91_add_device_nand(&ek_nand_data);
 }
@@ -176,7 +178,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
         .wire4          = 1,
         .det_pin        = AT91_PIN_PC8,
         .wp_pin         = AT91_PIN_PC4,
-//      .vcc_pin        = ... not connected
+        .vcc_pin        = -EINVAL,
 };
 
 static void __init ek_board_init(void)
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index 4f10181a0782..be8233bcabdc 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -75,6 +75,8 @@ static void __init ek_init_early(void)
  */
 static struct at91_usbh_data __initdata ek_usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -82,7 +84,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
  */
 static struct at91_udc_data __initdata ek_udc_data = {
         .vbus_pin       = AT91_PIN_PC5,
-        .pullup_pin     = 0,            /* pull-up driven by UDC */
+        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
 };
 
 
@@ -151,7 +153,7 @@ static struct spi_board_info ek_spi_devices[] = {
 /*
  * MACB Ethernet device
  */
-static struct at91_eth_data __initdata ek_macb_data = {
+static struct macb_platform_data __initdata ek_macb_data = {
         .phy_irq_pin    = AT91_PIN_PA7,
         .is_rmii        = 1,
 };
@@ -176,7 +178,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
 static struct atmel_nand_data __initdata ek_nand_data = {
         .ale            = 21,
         .cle            = 22,
-//      .det_pin        = ... not connected
+        .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
         .parts          = ek_nand_partition,
@@ -211,7 +213,7 @@ static void __init ek_add_device_nand(void)
                 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
 
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(3, &ek_nand_smc_config);
+        sam9_smc_configure(0, 3, &ek_nand_smc_config);
 
         at91_add_device_nand(&ek_nand_data);
 }
@@ -223,9 +225,9 @@ static void __init ek_add_device_nand(void)
 static struct at91_mmc_data __initdata ek_mmc_data = {
         .slot_b         = 1,
         .wire4          = 1,
-//      .det_pin        = ... not connected
-//      .wp_pin         = ... not connected
-//      .vcc_pin        = ... not connected
+        .det_pin        = -EINVAL,
+        .wp_pin         = -EINVAL,
+        .vcc_pin        = -EINVAL,
 };
 
 
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index b005b738e8ff..40895072a1a7 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -131,7 +131,7 @@ static struct sam9_smc_config __initdata dm9000_smc_config = {
 static void __init ek_add_device_dm9000(void)
 {
         /* Configure chip-select 2 (DM9000) */
-        sam9_smc_configure(2, &dm9000_smc_config);
+        sam9_smc_configure(0, 2, &dm9000_smc_config);
 
         /* Configure Reset signal as output */
         at91_set_gpio_output(AT91_PIN_PC10, 0);
@@ -151,6 +151,8 @@ static void __init ek_add_device_dm9000(void) {}
  */
 static struct at91_usbh_data __initdata ek_usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 
@@ -159,7 +161,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
  */
 static struct at91_udc_data __initdata ek_udc_data = {
         .vbus_pin       = AT91_PIN_PB29,
-        .pullup_pin     = 0,            /* pull-up driven by UDC */
+        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
 };
 
 
@@ -182,7 +184,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
 static struct atmel_nand_data __initdata ek_nand_data = {
         .ale            = 22,
         .cle            = 21,
-//      .det_pin        = ... not connected
+        .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PC15,
         .enable_pin     = AT91_PIN_PC14,
         .parts          = ek_nand_partition,
@@ -217,7 +219,7 @@ static void __init ek_add_device_nand(void)
                 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
 
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(3, &ek_nand_smc_config);
+        sam9_smc_configure(0, 3, &ek_nand_smc_config);
 
         at91_add_device_nand(&ek_nand_data);
 }
@@ -345,6 +347,9 @@ static struct spi_board_info ek_spi_devices[] = {
  */
 static struct at91_mmc_data __initdata ek_mmc_data = {
         .wire4          = 1,
+        .det_pin        = -EINVAL,
+        .wp_pin         = -EINVAL,
+        .vcc_pin        = -EINVAL,
 };
 
 #endif /* CONFIG_SPI_ATMEL_* */
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index bccdcf23caa1..29f66052fe63 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -74,6 +74,7 @@ static void __init ek_init_early(void)
 static struct at91_usbh_data __initdata ek_usbh_data = {
         .ports          = 2,
         .vbus_pin       = { AT91_PIN_PA24, AT91_PIN_PA21 },
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -81,7 +82,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
  */
 static struct at91_udc_data __initdata ek_udc_data = {
         .vbus_pin       = AT91_PIN_PA25,
-        .pullup_pin     = 0,            /* pull-up driven by UDC */
+        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
 };
 
 
@@ -151,14 +152,14 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
         .wire4          = 1,
         .det_pin        = AT91_PIN_PE18,
         .wp_pin         = AT91_PIN_PE19,
-//      .vcc_pin        = ... not connected
+        .vcc_pin        = -EINVAL,
 };
 
 
 /*
  * MACB Ethernet device
  */
-static struct at91_eth_data __initdata ek_macb_data = {
+static struct macb_platform_data __initdata ek_macb_data = {
         .phy_irq_pin    = AT91_PIN_PE31,
         .is_rmii        = 1,
 };
@@ -183,7 +184,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
 static struct atmel_nand_data __initdata ek_nand_data = {
         .ale            = 21,
         .cle            = 22,
-//      .det_pin        = ... not connected
+        .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PA22,
         .enable_pin     = AT91_PIN_PD15,
         .parts          = ek_nand_partition,
@@ -218,7 +219,7 @@ static void __init ek_add_device_nand(void)
                 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
 
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(3, &ek_nand_smc_config);
+        sam9_smc_configure(0, 3, &ek_nand_smc_config);
 
         at91_add_device_nand(&ek_nand_data);
 }
@@ -353,6 +354,7 @@ static void __init ek_add_device_buttons(void) {}
  * reset_pin is not connected: NRST
  */
 static struct ac97c_platform_data ek_ac97_data = {
+        .reset_pin      = -EINVAL,
 };
 
 
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index 64fc75c9d0ac..843d6286c6f4 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -86,6 +86,8 @@ static void __init ek_init_early(void)
  */
 static struct at91_usbh_data __initdata ek_usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -93,7 +95,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
  */
 static struct at91_udc_data __initdata ek_udc_data = {
         .vbus_pin       = AT91_PIN_PC5,
-        .pullup_pin     = 0,            /* pull-up driven by UDC */
+        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
 };
 
 
@@ -123,7 +125,7 @@ static struct spi_board_info ek_spi_devices[] = {
 /*
  * MACB Ethernet device
  */
-static struct at91_eth_data __initdata ek_macb_data = {
+static struct macb_platform_data __initdata ek_macb_data = {
         .phy_irq_pin    = AT91_PIN_PA7,
         .is_rmii        = 1,
 };
@@ -163,6 +165,7 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .cle            = 22,
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
+        .det_pin        = -EINVAL,
         .parts          = ek_nand_partition,
         .num_parts      = ARRAY_SIZE(ek_nand_partition),
 };
@@ -195,7 +198,7 @@ static void __init ek_add_device_nand(void)
                 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
 
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(3, &ek_nand_smc_config);
+        sam9_smc_configure(0, 3, &ek_nand_smc_config);
 
         at91_add_device_nand(&ek_nand_data);
 }
@@ -210,6 +213,7 @@ static struct mci_platform_data __initdata ek_mmc_data = {
         .slot[1] = {
                 .bus_width      = 4,
                 .detect_pin     = AT91_PIN_PC9,
+                .wp_pin         = -EINVAL,
         },
 
 };
@@ -218,6 +222,8 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
         .slot_b         = 1,    /* Only one slot so use slot B */
         .wire4          = 1,
         .det_pin        = AT91_PIN_PC9,
+        .wp_pin         = -EINVAL,
+        .vcc_pin        = -EINVAL,
 };
 #endif
 
@@ -227,6 +233,7 @@ static void __init ek_add_device_mmc(void)
         if (ek_have_2mmc()) {
                 ek_mmc_data.slot[0].bus_width = 4;
                 ek_mmc_data.slot[0].detect_pin = AT91_PIN_PC2;
+                ek_mmc_data.slot[0].wp_pin = -1;
         }
         at91_add_device_mci(0, &ek_mmc_data);
 #else
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
index 92de9127923a..ea0d1b9c2b7b 100644
--- a/arch/arm/mach-at91/board-sam9m10g45ek.c
+++ b/arch/arm/mach-at91/board-sam9m10g45ek.c
@@ -69,6 +69,7 @@ static void __init ek_init_early(void)
 static struct at91_usbh_data __initdata ek_usbh_hs_data = {
         .ports          = 2,
         .vbus_pin       = {AT91_PIN_PD1, AT91_PIN_PD3},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 
@@ -100,6 +101,7 @@ static struct mci_platform_data __initdata mci0_data = {
         .slot[0] = {
                 .bus_width      = 4,
                 .detect_pin     = AT91_PIN_PD10,
+                .wp_pin         = -EINVAL,
         },
 };
 
@@ -115,7 +117,7 @@ static struct mci_platform_data __initdata mci1_data = {
 /*
  * MACB Ethernet device
  */
-static struct at91_eth_data __initdata ek_macb_data = {
+static struct macb_platform_data __initdata ek_macb_data = {
         .phy_irq_pin    = AT91_PIN_PD5,
         .is_rmii        = 1,
 };
@@ -143,6 +145,7 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .cle            = 22,
         .rdy_pin        = AT91_PIN_PC8,
         .enable_pin     = AT91_PIN_PC14,
+        .det_pin        = -EINVAL,
         .parts          = ek_nand_partition,
         .num_parts      = ARRAY_SIZE(ek_nand_partition),
 };
@@ -175,7 +178,7 @@ static void __init ek_add_device_nand(void)
                 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
 
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(3, &ek_nand_smc_config);
+        sam9_smc_configure(0, 3, &ek_nand_smc_config);
 
         at91_add_device_nand(&ek_nand_data);
 }
@@ -330,6 +333,7 @@ static void __init ek_add_device_buttons(void) {}
  * reset_pin is not connected: NRST
  */
 static struct ac97c_platform_data ek_ac97_data = {
+        .reset_pin      = -EINVAL,
 };
 
 
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index b2b748239f36..c1366d0032bf 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -67,8 +67,8 @@ static struct usba_platform_data __initdata ek_usba_udc_data = {
 static struct at91_mmc_data __initdata ek_mmc_data = {
         .wire4          = 1,
         .det_pin        = AT91_PIN_PA15,
-//      .wp_pin         = ... not connected
-//      .vcc_pin        = ... not connected
+        .wp_pin         = -EINVAL,
+        .vcc_pin        = -EINVAL,
 };
 
 
@@ -91,7 +91,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
 static struct atmel_nand_data __initdata ek_nand_data = {
         .ale            = 21,
         .cle            = 22,
-//      .det_pin        = ... not connected
+        .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PD17,
         .enable_pin     = AT91_PIN_PB6,
         .parts          = ek_nand_partition,
@@ -119,7 +119,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = {
 static void __init ek_add_device_nand(void)
 {
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(3, &ek_nand_smc_config);
+        sam9_smc_configure(0, 3, &ek_nand_smc_config);
 
         at91_add_device_nand(&ek_nand_data);
 }
@@ -204,6 +204,7 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data;
  * reset_pin is not connected: NRST
  */
 static struct ac97c_platform_data ek_ac97_data = {
+        .reset_pin      = -EINVAL,
 };
 
 
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c
index 0df01c6e2d0c..4770db08e5a6 100644
--- a/arch/arm/mach-at91/board-snapper9260.c
+++ b/arch/arm/mach-at91/board-snapper9260.c
@@ -57,15 +57,19 @@ static void __init snapper9260_init_early(void)
 
 static struct at91_usbh_data __initdata snapper9260_usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 static struct at91_udc_data __initdata snapper9260_udc_data = {
         .vbus_pin               = SNAPPER9260_IO_EXP_GPIO(5),
         .vbus_active_low        = 1,
         .vbus_polled            = 1,
+        .pullup_pin             = -EINVAL,
 };
 
-static struct at91_eth_data snapper9260_macb_data = {
+static struct macb_platform_data snapper9260_macb_data = {
+        .phy_irq_pin    = -EINVAL,
         .is_rmii        = 1,
 };
 
@@ -104,6 +108,8 @@ static struct atmel_nand_data __initdata snapper9260_nand_data = {
         .parts          = snapper9260_nand_partitions,
         .num_parts      = ARRAY_SIZE(snapper9260_nand_partitions),
         .bus_width_16   = 0,
+        .enable_pin     = -EINVAL,
+        .det_pin        = -EINVAL,
 };
 
 static struct sam9_smc_config __initdata snapper9260_nand_smc_config = {
@@ -149,7 +155,7 @@ static struct i2c_board_info __initdata snapper9260_i2c_devices[] = {
 static void __init snapper9260_add_device_nand(void)
 {
         at91_set_A_periph(AT91_PIN_PC14, 0);
-        sam9_smc_configure(3, &snapper9260_nand_smc_config);
+        sam9_smc_configure(0, 3, &snapper9260_nand_smc_config);
         at91_add_device_nand(&snapper9260_nand_data);
 }
 
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
index 936e5fd7f406..72eb3b4d9ab6 100644
--- a/arch/arm/mach-at91/board-stamp9g20.c
+++ b/arch/arm/mach-at91/board-stamp9g20.c
@@ -85,6 +85,7 @@ static struct atmel_nand_data __initdata nand_data = {
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
         .bus_width_16   = 0,
+        .det_pin        = -EINVAL,
 };
 
 static struct sam9_smc_config __initdata nand_smc_config = {
@@ -108,7 +109,7 @@ static struct sam9_smc_config __initdata nand_smc_config = {
 static void __init add_device_nand(void)
 {
         /* configure chip-select 3 (NAND) */
-        sam9_smc_configure(3, &nand_smc_config);
+        sam9_smc_configure(0, 3, &nand_smc_config);
 
         at91_add_device_nand(&nand_data);
 }
@@ -122,12 +123,17 @@ static void __init add_device_nand(void)
 static struct mci_platform_data __initdata mmc_data = {
         .slot[0] = {
                 .bus_width      = 4,
+                .detect_pin     = -1,
+                .wp_pin         = -1,
         },
 };
 #else
 static struct at91_mmc_data __initdata mmc_data = {
         .slot_b         = 0,
         .wire4          = 1,
+        .det_pin        = -EINVAL,
+        .wp_pin         = -EINVAL,
+        .vcc_pin        = -EINVAL,
 };
 #endif
 
@@ -137,6 +143,8 @@ static struct at91_mmc_data __initdata mmc_data = {
  */
 static struct at91_usbh_data __initdata usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 
@@ -145,19 +153,19 @@ static struct at91_usbh_data __initdata usbh_data = {
  */
 static struct at91_udc_data __initdata portuxg20_udc_data = {
         .vbus_pin       = AT91_PIN_PC7,
-        .pullup_pin     = 0,            /* pull-up driven by UDC */
+        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
 };
 
 static struct at91_udc_data __initdata stamp9g20evb_udc_data = {
         .vbus_pin       = AT91_PIN_PA22,
-        .pullup_pin     = 0,            /* pull-up driven by UDC */
+        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
 };
 
 
 /*
  * MACB Ethernet device
  */
-static struct at91_eth_data __initdata macb_data = {
+static struct macb_platform_data __initdata macb_data = {
         .phy_irq_pin    = AT91_PIN_PA28,
         .is_rmii        = 1,
 };
diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c
index 0a20bab21f99..26c36fc2d1e5 100644
--- a/arch/arm/mach-at91/board-usb-a926x.c
+++ b/arch/arm/mach-at91/board-usb-a926x.c
@@ -66,6 +66,8 @@ static void __init ek_init_early(void)
  */
 static struct at91_usbh_data __initdata ek_usbh_data = {
         .ports          = 2,
+        .vbus_pin       = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -73,7 +75,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = {
  */
 static struct at91_udc_data __initdata ek_udc_data = {
         .vbus_pin       = AT91_PIN_PB11,
-        .pullup_pin     = 0,            /* pull-up driven by UDC */
+        .pullup_pin     = -EINVAL,              /* pull-up driven by UDC */
 };
 
 static void __init ek_add_device_udc(void)
@@ -146,7 +148,7 @@ static void __init ek_add_device_spi(void)
 /*
  * MACB Ethernet device
  */
-static struct at91_eth_data __initdata ek_macb_data = {
+static struct macb_platform_data __initdata ek_macb_data = {
         .phy_irq_pin    = AT91_PIN_PE31,
         .is_rmii        = 1,
 };
@@ -193,7 +195,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
 static struct atmel_nand_data __initdata ek_nand_data = {
         .ale            = 21,
         .cle            = 22,
-//      .det_pin        = ... not connected
+        .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PA22,
         .enable_pin     = AT91_PIN_PD15,
         .parts          = ek_nand_partition,
@@ -245,9 +247,9 @@ static void __init ek_add_device_nand(void)
 
         /* configure chip-select 3 (NAND) */
         if (machine_is_usb_a9g20())
-                sam9_smc_configure(3, &usb_a9g20_nand_smc_config);
+                sam9_smc_configure(0, 3, &usb_a9g20_nand_smc_config);
         else
-                sam9_smc_configure(3, &usb_a9260_nand_smc_config);
+                sam9_smc_configure(0, 3, &usb_a9260_nand_smc_config);
 
         at91_add_device_nand(&ek_nand_data);
 }
@@ -344,7 +346,7 @@ static void __init ek_board_init(void)
                 /* I2C */
                 at91_add_device_i2c(NULL, 0);
                 /* shutdown controller, wakeup button (5 msec low) */
-                at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10)
+                at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10)
                                 | AT91_SHDW_WKMODE0_LOW
                                 | AT91_SHDW_RTTWKEN);
         }
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c
index 12a3f955162b..bbd553e1cd93 100644
--- a/arch/arm/mach-at91/board-yl-9200.c
+++ b/arch/arm/mach-at91/board-yl-9200.c
@@ -110,7 +110,7 @@ static struct gpio_led yl9200_leds[] = {
 /*
  * Ethernet
  */
-static struct at91_eth_data __initdata yl9200_eth_data = {
+static struct macb_platform_data __initdata yl9200_eth_data = {
         .phy_irq_pin            = AT91_PIN_PB28,
         .is_rmii                = 1,
 };
@@ -120,6 +120,8 @@ static struct at91_eth_data __initdata yl9200_eth_data = {
  */
 static struct at91_usbh_data __initdata yl9200_usbh_data = {
         .ports                  = 1,    /* PQFP version of AT91RM9200 */
+        .vbus_pin               = {-EINVAL, -EINVAL},
+        .overcurrent_pin= {-EINVAL, -EINVAL},
 };
 
 /*
@@ -137,8 +139,9 @@ static struct at91_udc_data __initdata yl9200_udc_data = {
  */
 static struct at91_mmc_data __initdata yl9200_mmc_data = {
         .det_pin        = AT91_PIN_PB9,
-        // .wp_pin      = ... not connected
         .wire4          = 1,
+        .wp_pin         = -EINVAL,
+        .vcc_pin        = -EINVAL,
 };
 
 /*
@@ -175,7 +178,7 @@ static struct mtd_partition __initdata yl9200_nand_partition[] = {
 static struct atmel_nand_data __initdata yl9200_nand_data = {
         .ale            = 6,
         .cle            = 7,
-        // .det_pin     = ... not connected
+        .det_pin        = -EINVAL,
         .rdy_pin        = AT91_PIN_PC14,        /* R/!B (Sheet10) */
         .enable_pin     = AT91_PIN_PC15,        /* !CE  (Sheet10) */
         .parts          = yl9200_nand_partition,
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 938b34f57741..4866b8180d66 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -29,6 +29,7 @@ extern void __init at91_aic_init(unsigned int priority[]);
  /* Timer */
 struct sys_timer;
 extern struct sys_timer at91rm9200_timer;
+extern void at91sam926x_ioremap_pit(u32 addr);
 extern struct sys_timer at91sam926x_timer;
 extern struct sys_timer at91x40_timer;
 
@@ -57,7 +58,10 @@ extern void at91_irq_suspend(void);
 extern void at91_irq_resume(void);
 
 /* reset */
-extern void at91sam9_alt_reset(void);
+extern void at91sam9_alt_restart(char, const char *);
+
+/* shutdown */
+extern void at91_ioremap_shdwc(u32 base_addr);
 
  /* GPIO */
 #define AT91RM9200_PQFP         3       /* AT91RM9200 PQFP package has 3 banks */
@@ -65,11 +69,9 @@ extern void at91sam9_alt_reset(void);
 
 struct at91_gpio_bank {
         unsigned short id;              /* peripheral ID */
-        unsigned long offset;           /* offset from system peripheral base */
-        struct clk *clock;              /* associated clock */
+        unsigned long regbase;          /* offset from system peripheral base */
 };
 extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
 extern void __init at91_gpio_irq_setup(void);
 
-extern void (*at91_arch_reset)(void);
 extern int at91_extern_irq;
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index 224e9e2f8674..74d6783eeabb 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -29,8 +29,9 @@
 struct at91_gpio_chip {
         struct gpio_chip        chip;
         struct at91_gpio_chip   *next;          /* Bank sharing same clock */
-        struct at91_gpio_bank   *bank;          /* Bank definition */
+        int                     id;             /* ID of register bank */
         void __iomem            *regbase;       /* Base of register bank */
+        struct clk              *clock;         /* associated clock */
 };
 
 #define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip)
@@ -58,18 +59,17 @@ static int at91_gpiolib_direction_input(struct gpio_chip *chip,
         }
 
 static struct at91_gpio_chip gpio_chip[] = {
-        AT91_GPIO_CHIP("A", 0x00 + PIN_BASE, 32),
-        AT91_GPIO_CHIP("B", 0x20 + PIN_BASE, 32),
-        AT91_GPIO_CHIP("C", 0x40 + PIN_BASE, 32),
-        AT91_GPIO_CHIP("D", 0x60 + PIN_BASE, 32),
-        AT91_GPIO_CHIP("E", 0x80 + PIN_BASE, 32),
+        AT91_GPIO_CHIP("pioA", 0x00, 32),
+        AT91_GPIO_CHIP("pioB", 0x20, 32),
+        AT91_GPIO_CHIP("pioC", 0x40, 32),
+        AT91_GPIO_CHIP("pioD", 0x60, 32),
+        AT91_GPIO_CHIP("pioE", 0x80, 32),
 };
 
 static int gpio_banks;
 
 static inline void __iomem *pin_to_controller(unsigned pin)
 {
-        pin -= PIN_BASE;
         pin /= 32;
         if (likely(pin < gpio_banks))
                 return gpio_chip[pin].regbase;
@@ -79,7 +79,6 @@ static inline void __iomem *pin_to_controller(unsigned pin)
 
 static inline unsigned pin_to_mask(unsigned pin)
 {
-        pin -= PIN_BASE;
         return 1 << (pin % 32);
 }
 
@@ -274,8 +273,9 @@ static u32 backups[MAX_GPIO_BANKS];
 
 static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
 {
-        unsigned        mask = pin_to_mask(d->irq);
-        unsigned        bank = (d->irq - PIN_BASE) / 32;
+        unsigned        pin = irq_to_gpio(d->irq);
+        unsigned        mask = pin_to_mask(pin);
+        unsigned        bank = pin / 32;
 
         if (unlikely(bank >= MAX_GPIO_BANKS))
                 return -EINVAL;
@@ -285,7 +285,7 @@ static int gpio_irq_set_wake(struct irq_data *d, unsigned state)
         else
                 wakeups[bank] &= ~mask;
 
-        irq_set_irq_wake(gpio_chip[bank].bank->id, state);
+        irq_set_irq_wake(gpio_chip[bank].id, state);
 
         return 0;
 }
@@ -302,7 +302,7 @@ void at91_gpio_suspend(void)
                 __raw_writel(wakeups[i], pio + PIO_IER);
 
                 if (!wakeups[i])
-                        clk_disable(gpio_chip[i].bank->clock);
+                        clk_disable(gpio_chip[i].clock);
                 else {
 #ifdef CONFIG_PM_DEBUG
                         printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]);
@@ -319,7 +319,7 @@ void at91_gpio_resume(void)
                 void __iomem    *pio = gpio_chip[i].regbase;
 
                 if (!wakeups[i])
-                        clk_enable(gpio_chip[i].bank->clock);
+                        clk_enable(gpio_chip[i].clock);
 
                 __raw_writel(wakeups[i], pio + PIO_IDR);
                 __raw_writel(backups[i], pio + PIO_IER);
@@ -344,8 +344,9 @@ void at91_gpio_resume(void)
 
 static void gpio_irq_mask(struct irq_data *d)
 {
-        void __iomem    *pio = pin_to_controller(d->irq);
-        unsigned        mask = pin_to_mask(d->irq);
+        unsigned        pin = irq_to_gpio(d->irq);
+        void __iomem    *pio = pin_to_controller(pin);
+        unsigned        mask = pin_to_mask(pin);
 
         if (pio)
                 __raw_writel(mask, pio + PIO_IDR);
@@ -353,8 +354,9 @@ static void gpio_irq_mask(struct irq_data *d)
 
 static void gpio_irq_unmask(struct irq_data *d)
 {
-        void __iomem    *pio = pin_to_controller(d->irq);
-        unsigned        mask = pin_to_mask(d->irq);
+        unsigned        pin = irq_to_gpio(d->irq);
+        void __iomem    *pio = pin_to_controller(pin);
+        unsigned        mask = pin_to_mask(pin);
 
         if (pio)
                 __raw_writel(mask, pio + PIO_IER);
@@ -382,7 +384,7 @@ static struct irq_chip gpio_irqchip = {
 
 static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 {
-        unsigned        pin;
+        unsigned        irq_pin;
         struct irq_data *idata = irq_desc_get_irq_data(desc);
         struct irq_chip *chip = irq_data_get_irq_chip(idata);
         struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata);
@@ -405,12 +407,12 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
                         continue;
                 }
 
-                pin = at91_gpio->chip.base;
+                irq_pin = gpio_to_irq(at91_gpio->chip.base);
 
                 while (isr) {
                         if (isr & 1)
-                                generic_handle_irq(pin);
-                        pin++;
+                                generic_handle_irq(irq_pin);
+                        irq_pin++;
                         isr >>= 1;
                 }
         }
@@ -438,7 +440,7 @@ static int at91_gpio_show(struct seq_file *s, void *unused)
                 seq_printf(s, "%i:\t", j);
 
                 for (bank = 0; bank < gpio_banks; bank++) {
-                        unsigned        pin  = PIN_BASE + (32 * bank) + j;
+                        unsigned        pin  = (32 * bank) + j;
                         void __iomem    *pio = pin_to_controller(pin);
                         unsigned        mask = pin_to_mask(pin);
 
@@ -491,27 +493,28 @@ static struct lock_class_key gpio_lock_class;
  */
 void __init at91_gpio_irq_setup(void)
 {
-        unsigned                pioc, pin;
+        unsigned                pioc, irq = gpio_to_irq(0);
         struct at91_gpio_chip   *this, *prev;
 
-        for (pioc = 0, pin = PIN_BASE, this = gpio_chip, prev = NULL;
+        for (pioc = 0, this = gpio_chip, prev = NULL;
                         pioc++ < gpio_banks;
                         prev = this, this++) {
-                unsigned        id = this->bank->id;
+                unsigned        id = this->id;
                 unsigned        i;
 
                 __raw_writel(~0, this->regbase + PIO_IDR);
 
-                for (i = 0, pin = this->chip.base; i < 32; i++, pin++) {
-                        irq_set_lockdep_class(pin, &gpio_lock_class);
+                for (i = 0, irq = gpio_to_irq(this->chip.base); i < 32;
+                     i++, irq++) {
+                        irq_set_lockdep_class(irq, &gpio_lock_class);
 
                         /*
                          * Can use the "simple" and not "edge" handler since it's
                          * shorter, and the AIC handles interrupts sanely.
                          */
-                        irq_set_chip_and_handler(pin, &gpio_irqchip,
+                        irq_set_chip_and_handler(irq, &gpio_irqchip,
                                                  handle_simple_irq);
-                        set_irq_flags(pin, IRQF_VALID);
+                        set_irq_flags(irq, IRQF_VALID);
                 }
 
                 /* The toplevel handler handles one bank of GPIOs, except
@@ -524,7 +527,7 @@ void __init at91_gpio_irq_setup(void)
                 irq_set_chip_data(id, this);
                 irq_set_chained_handler(id, gpio_irq_handler);
         }
-        pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks);
+        pr_info("AT91: %d gpio irqs in %d banks\n", irq - gpio_to_irq(0), gpio_banks);
 }
 
 /* gpiolib support */
@@ -612,16 +615,26 @@ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
         for (i = 0; i < nr_banks; i++) {
                 at91_gpio = &gpio_chip[i];
 
-                at91_gpio->bank = &data[i];
-                at91_gpio->chip.base = PIN_BASE + i * 32;
-                at91_gpio->regbase = at91_gpio->bank->offset +
-                        (void __iomem *)AT91_VA_BASE_SYS;
+                at91_gpio->id = data[i].id;
+                at91_gpio->chip.base = i * 32;
+
+                at91_gpio->regbase = ioremap(data[i].regbase, 512);
+                if (!at91_gpio->regbase) {
+                        pr_err("at91_gpio.%d, failed to map registers, ignoring.\n", i);
+                        continue;
+                }
+
+                at91_gpio->clock = clk_get_sys(NULL, at91_gpio->chip.label);
+                if (!at91_gpio->clock) {
+                        pr_err("at91_gpio.%d, failed to get clock, ignoring.\n", i);
+                        continue;
+                }
 
                 /* enable PIO controller's clock */
-                clk_enable(at91_gpio->bank->clock);
+                clk_enable(at91_gpio->clock);
 
                 /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */
-                if (last && last->bank->id == at91_gpio->bank->id)
+                if (last && last->id == at91_gpio->id)
                         last->next = at91_gpio;
                 last = at91_gpio;
 
diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h
index 03566799d3be..3045781c473f 100644
--- a/arch/arm/mach-at91/include/mach/at91_aic.h
+++ b/arch/arm/mach-at91/include/mach/at91_aic.h
@@ -16,7 +16,19 @@
 #ifndef AT91_AIC_H
 #define AT91_AIC_H
 
-#define AT91_AIC_SMR(n)         (AT91_AIC + ((n) * 4))  /* Source Mode Registers 0-31 */
+#ifndef __ASSEMBLY__
+extern void __iomem *at91_aic_base;
+
+#define at91_aic_read(field) \
+        __raw_readl(at91_aic_base + field)
+
+#define at91_aic_write(field, value) \
+        __raw_writel(value, at91_aic_base + field);
+#else
+.extern at91_aic_base
+#endif
+
+#define AT91_AIC_SMR(n)         ((n) * 4)               /* Source Mode Registers 0-31 */
 #define         AT91_AIC_PRIOR          (7 << 0)                /* Priority Level */
 #define         AT91_AIC_SRCTYPE        (3 << 5)                /* Interrupt Source Type */
 #define                 AT91_AIC_SRCTYPE_LOW            (0 << 5)
@@ -24,30 +36,30 @@
 #define                 AT91_AIC_SRCTYPE_HIGH           (2 << 5)
 #define                 AT91_AIC_SRCTYPE_RISING         (3 << 5)
 
-#define AT91_AIC_SVR(n)         (AT91_AIC + 0x80 + ((n) * 4))   /* Source Vector Registers 0-31 */
-#define AT91_AIC_IVR            (AT91_AIC + 0x100)      /* Interrupt Vector Register */
-#define AT91_AIC_FVR            (AT91_AIC + 0x104)      /* Fast Interrupt Vector Register */
-#define AT91_AIC_ISR            (AT91_AIC + 0x108)      /* Interrupt Status Register */
+#define AT91_AIC_SVR(n)         (0x80 + ((n) * 4))      /* Source Vector Registers 0-31 */
+#define AT91_AIC_IVR            0x100                   /* Interrupt Vector Register */
+#define AT91_AIC_FVR            0x104                   /* Fast Interrupt Vector Register */
+#define AT91_AIC_ISR            0x108                   /* Interrupt Status Register */
 #define         AT91_AIC_IRQID          (0x1f << 0)             /* Current Interrupt Identifier */
 
-#define AT91_AIC_IPR            (AT91_AIC + 0x10c)      /* Interrupt Pending Register */
-#define AT91_AIC_IMR            (AT91_AIC + 0x110)      /* Interrupt Mask Register */
-#define AT91_AIC_CISR           (AT91_AIC + 0x114)      /* Core Interrupt Status Register */
+#define AT91_AIC_IPR            0x10c                   /* Interrupt Pending Register */
+#define AT91_AIC_IMR            0x110                   /* Interrupt Mask Register */
+#define AT91_AIC_CISR           0x114                   /* Core Interrupt Status Register */
 #define         AT91_AIC_NFIQ           (1 << 0)                /* nFIQ Status */
 #define         AT91_AIC_NIRQ           (1 << 1)                /* nIRQ Status */
 
-#define AT91_AIC_IECR           (AT91_AIC + 0x120)      /* Interrupt Enable Command Register */
-#define AT91_AIC_IDCR           (AT91_AIC + 0x124)      /* Interrupt Disable Command Register */
-#define AT91_AIC_ICCR           (AT91_AIC + 0x128)      /* Interrupt Clear Command Register */
-#define AT91_AIC_ISCR           (AT91_AIC + 0x12c)      /* Interrupt Set Command Register */
-#define AT91_AIC_EOICR          (AT91_AIC + 0x130)      /* End of Interrupt Command Register */
-#define AT91_AIC_SPU            (AT91_AIC + 0x134)      /* Spurious Interrupt Vector Register */
-#define AT91_AIC_DCR            (AT91_AIC + 0x138)      /* Debug Control Register */
+#define AT91_AIC_IECR           0x120                   /* Interrupt Enable Command Register */
+#define AT91_AIC_IDCR           0x124                   /* Interrupt Disable Command Register */
+#define AT91_AIC_ICCR           0x128                   /* Interrupt Clear Command Register */
+#define AT91_AIC_ISCR           0x12c                   /* Interrupt Set Command Register */
+#define AT91_AIC_EOICR          0x130                   /* End of Interrupt Command Register */
+#define AT91_AIC_SPU            0x134                   /* Spurious Interrupt Vector Register */
+#define AT91_AIC_DCR            0x138                   /* Debug Control Register */
 #define         AT91_AIC_DCR_PROT       (1 << 0)                /* Protection Mode */
 #define         AT91_AIC_DCR_GMSK       (1 << 1)                /* General Mask */
 
-#define AT91_AIC_FFER           (AT91_AIC + 0x140)      /* Fast Forcing Enable Register [SAM9 only] */
-#define AT91_AIC_FFDR           (AT91_AIC + 0x144)      /* Fast Forcing Disable Register [SAM9 only] */
-#define AT91_AIC_FFSR           (AT91_AIC + 0x148)      /* Fast Forcing Status Register [SAM9 only] */
+#define AT91_AIC_FFER           0x140                   /* Fast Forcing Enable Register [SAM9 only] */
+#define AT91_AIC_FFDR           0x144                   /* Fast Forcing Disable Register [SAM9 only] */
+#define AT91_AIC_FFSR           0x148                   /* Fast Forcing Status Register [SAM9 only] */
 
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91_dbgu.h b/arch/arm/mach-at91/include/mach/at91_dbgu.h
index dbfe455a4c41..2aa0c5e13495 100644
--- a/arch/arm/mach-at91/include/mach/at91_dbgu.h
+++ b/arch/arm/mach-at91/include/mach/at91_dbgu.h
@@ -19,7 +19,7 @@
 #define dbgu_readl(dbgu, field) \
         __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field)
 
-#ifdef AT91_DBGU
+#if !defined(CONFIG_ARCH_AT91X40)
 #define AT91_DBGU_CR            (0x00)  /* Control Register */
 #define AT91_DBGU_MR            (0x04)  /* Mode Register */
 #define AT91_DBGU_IER           (0x08)  /* Interrupt Enable Register */
diff --git a/arch/arm/mach-at91/include/mach/at91_pit.h b/arch/arm/mach-at91/include/mach/at91_pit.h
index 974d0bd05b5b..d1f80ad7f4d4 100644
--- a/arch/arm/mach-at91/include/mach/at91_pit.h
+++ b/arch/arm/mach-at91/include/mach/at91_pit.h
@@ -16,16 +16,16 @@
 #ifndef AT91_PIT_H
 #define AT91_PIT_H
 
-#define AT91_PIT_MR             (AT91_PIT + 0x00)       /* Mode Register */
+#define AT91_PIT_MR             0x00                    /* Mode Register */
 #define         AT91_PIT_PITIEN         (1 << 25)               /* Timer Interrupt Enable */
 #define         AT91_PIT_PITEN          (1 << 24)               /* Timer Enabled */
 #define         AT91_PIT_PIV            (0xfffff)               /* Periodic Interval Value */
 
-#define AT91_PIT_SR             (AT91_PIT + 0x04)       /* Status Register */
+#define AT91_PIT_SR             0x04                    /* Status Register */
 #define         AT91_PIT_PITS           (1 << 0)                /* Timer Status */
 
-#define AT91_PIT_PIVR           (AT91_PIT + 0x08)       /* Periodic Interval Value Register */
-#define AT91_PIT_PIIR           (AT91_PIT + 0x0c)       /* Periodic Interval Image Register */
+#define AT91_PIT_PIVR           0x08                    /* Periodic Interval Value Register */
+#define AT91_PIT_PIIR           0x0c                    /* Periodic Interval Image Register */
 #define         AT91_PIT_PICNT          (0xfff << 20)           /* Interval Counter */
 #define         AT91_PIT_CPIV           (0xfffff)               /* Inverval Value */
 
diff --git a/arch/arm/mach-at91/include/mach/at91_rtc.h b/arch/arm/mach-at91/include/mach/at91_rtc.h
index e56f4701a3e5..da1945e5f714 100644
--- a/arch/arm/mach-at91/include/mach/at91_rtc.h
+++ b/arch/arm/mach-at91/include/mach/at91_rtc.h
@@ -16,7 +16,7 @@
 #ifndef AT91_RTC_H
 #define AT91_RTC_H
 
-#define AT91_RTC_CR             (AT91_RTC + 0x00)       /* Control Register */
+#define AT91_RTC_CR             0x00                    /* Control Register */
 #define         AT91_RTC_UPDTIM         (1 <<  0)               /* Update Request Time Register */
 #define         AT91_RTC_UPDCAL         (1 <<  1)               /* Update Request Calendar Register */
 #define         AT91_RTC_TIMEVSEL       (3 <<  8)               /* Time Event Selection */
@@ -29,44 +29,44 @@
 #define                 AT91_RTC_CALEVSEL_MONTH         (1 << 16)
 #define                 AT91_RTC_CALEVSEL_YEAR          (2 << 16)
 
-#define AT91_RTC_MR             (AT91_RTC + 0x04)       /* Mode Register */
+#define AT91_RTC_MR             0x04                    /* Mode Register */
 #define                 AT91_RTC_HRMOD          (1 <<  0)               /* 12/24 Hour Mode */
 
-#define AT91_RTC_TIMR           (AT91_RTC + 0x08)       /* Time Register */
+#define AT91_RTC_TIMR           0x08                    /* Time Register */
 #define         AT91_RTC_SEC            (0x7f <<  0)            /* Current Second */
 #define         AT91_RTC_MIN            (0x7f <<  8)            /* Current Minute */
 #define         AT91_RTC_HOUR           (0x3f << 16)            /* Current Hour */
 #define         AT91_RTC_AMPM           (1    << 22)            /* Ante Meridiem Post Meridiem Indicator */
 
-#define AT91_RTC_CALR           (AT91_RTC + 0x0c)       /* Calendar Register */
+#define AT91_RTC_CALR           0x0c                    /* Calendar Register */
 #define         AT91_RTC_CENT           (0x7f <<  0)            /* Current Century */
 #define         AT91_RTC_YEAR           (0xff <<  8)            /* Current Year */
 #define         AT91_RTC_MONTH          (0x1f << 16)            /* Current Month */
 #define         AT91_RTC_DAY            (7    << 21)            /* Current Day */
 #define         AT91_RTC_DATE           (0x3f << 24)            /* Current Date */
 
-#define AT91_RTC_TIMALR         (AT91_RTC + 0x10)       /* Time Alarm Register */
+#define AT91_RTC_TIMALR         0x10                    /* Time Alarm Register */
 #define         AT91_RTC_SECEN          (1 <<  7)               /* Second Alarm Enable */
 #define         AT91_RTC_MINEN          (1 << 15)               /* Minute Alarm Enable */
 #define         AT91_RTC_HOUREN         (1 << 23)               /* Hour Alarm Enable */
 
-#define AT91_RTC_CALALR         (AT91_RTC + 0x14)       /* Calendar Alarm Register */
+#define AT91_RTC_CALALR         0x14                    /* Calendar Alarm Register */
 #define         AT91_RTC_MTHEN          (1 << 23)               /* Month Alarm Enable */
 #define         AT91_RTC_DATEEN         (1 << 31)               /* Date Alarm Enable */
 
-#define AT91_RTC_SR             (AT91_RTC + 0x18)       /* Status Register */
+#define AT91_RTC_SR             0x18                    /* Status Register */
 #define         AT91_RTC_ACKUPD         (1 <<  0)               /* Acknowledge for Update */
 #define         AT91_RTC_ALARM          (1 <<  1)               /* Alarm Flag */
 #define         AT91_RTC_SECEV          (1 <<  2)               /* Second Event */
 #define         AT91_RTC_TIMEV          (1 <<  3)               /* Time Event */
 #define         AT91_RTC_CALEV          (1 <<  4)               /* Calendar Event */
 
-#define AT91_RTC_SCCR           (AT91_RTC + 0x1c)       /* Status Clear Command Register */
-#define AT91_RTC_IER            (AT91_RTC + 0x20)       /* Interrupt Enable Register */
-#define AT91_RTC_IDR            (AT91_RTC + 0x24)       /* Interrupt Disable Register */
-#define AT91_RTC_IMR            (AT91_RTC + 0x28)       /* Interrupt Mask Register */
+#define AT91_RTC_SCCR           0x1c                    /* Status Clear Command Register */
+#define AT91_RTC_IER            0x20                    /* Interrupt Enable Register */
+#define AT91_RTC_IDR            0x24                    /* Interrupt Disable Register */
+#define AT91_RTC_IMR            0x28                    /* Interrupt Mask Register */
 
-#define AT91_RTC_VER            (AT91_RTC + 0x2c)       /* Valid Entry Register */
+#define AT91_RTC_VER            0x2c                    /* Valid Entry Register */
 #define         AT91_RTC_NVTIM          (1 <<  0)               /* Non valid Time */
 #define         AT91_RTC_NVCAL          (1 <<  1)               /* Non valid Calendar */
 #define         AT91_RTC_NVTIMALR       (1 <<  2)               /* Non valid Time Alarm */
diff --git a/arch/arm/mach-at91/include/mach/at91_shdwc.h b/arch/arm/mach-at91/include/mach/at91_shdwc.h
index c4ce07e8a8fa..1d4fe822c77a 100644
--- a/arch/arm/mach-at91/include/mach/at91_shdwc.h
+++ b/arch/arm/mach-at91/include/mach/at91_shdwc.h
@@ -16,11 +16,21 @@
 #ifndef AT91_SHDWC_H
 #define AT91_SHDWC_H
 
-#define AT91_SHDW_CR            (AT91_SHDWC + 0x00)     /* Shut Down Control Register */
+#ifndef __ASSEMBLY__
+extern void __iomem *at91_shdwc_base;
+
+#define at91_shdwc_read(field) \
+        __raw_readl(at91_shdwc_base + field)
+
+#define at91_shdwc_write(field, value) \
+        __raw_writel(value, at91_shdwc_base + field);
+#endif
+
+#define AT91_SHDW_CR            0x00                    /* Shut Down Control Register */
 #define         AT91_SHDW_SHDW          (1    << 0)             /* Shut Down command */
 #define         AT91_SHDW_KEY           (0xa5 << 24)            /* KEY Password */
 
-#define AT91_SHDW_MR            (AT91_SHDWC + 0x04)     /* Shut Down Mode Register */
+#define AT91_SHDW_MR            0x04                    /* Shut Down Mode Register */
 #define         AT91_SHDW_WKMODE0       (3 << 0)                /* Wake-up 0 Mode Selection */
 #define                 AT91_SHDW_WKMODE0_NONE          0
 #define                 AT91_SHDW_WKMODE0_HIGH          1
@@ -30,7 +40,7 @@
 #define                 AT91_SHDW_CPTWK0_(x)    ((x) << 4)
 #define         AT91_SHDW_RTTWKEN       (1   << 16)             /* Real Time Timer Wake-up Enable */
 
-#define AT91_SHDW_SR            (AT91_SHDWC + 0x08)     /* Shut Down Status Register */
+#define AT91_SHDW_SR            0x08                    /* Shut Down Status Register */
 #define         AT91_SHDW_WAKEUP0       (1 <<  0)               /* Wake-up 0 Status */
 #define         AT91_SHDW_RTTWK         (1 << 16)               /* Real-time Timer Wake-up */
 #define         AT91_SHDW_RTCWK         (1 << 17)               /* Real-time Clock Wake-up [SAM9RL] */
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
index c5df1e8f1955..4c0e2f6011d7 100644
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ b/arch/arm/mach-at91/include/mach/at91cap9.h
@@ -79,29 +79,28 @@
 /*
  * System Peripherals (offset from AT91_BASE_SYS)
  */
-#define AT91_ECC        (0xffffe200 - AT91_BASE_SYS)
 #define AT91_BCRAMC     (0xffffe400 - AT91_BASE_SYS)
 #define AT91_DDRSDRC0   (0xffffe600 - AT91_BASE_SYS)
-#define AT91_SMC        (0xffffe800 - AT91_BASE_SYS)
 #define AT91_MATRIX     (0xffffea00 - AT91_BASE_SYS)
-#define AT91_CCFG       (0xffffeb10 - AT91_BASE_SYS)
-#define AT91_DMA        (0xffffec00 - AT91_BASE_SYS)
-#define AT91_DBGU       (0xffffee00 - AT91_BASE_SYS)
-#define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
-#define AT91_PIOA       (0xfffff200 - AT91_BASE_SYS)
-#define AT91_PIOB       (0xfffff400 - AT91_BASE_SYS)
-#define AT91_PIOC       (0xfffff600 - AT91_BASE_SYS)
-#define AT91_PIOD       (0xfffff800 - AT91_BASE_SYS)
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
-#define AT91_SHDWC      (0xfffffd10 - AT91_BASE_SYS)
-#define AT91_RTT        (0xfffffd20 - AT91_BASE_SYS)
-#define AT91_PIT        (0xfffffd30 - AT91_BASE_SYS)
-#define AT91_WDT        (0xfffffd40 - AT91_BASE_SYS)
 #define AT91_GPBR       (cpu_is_at91cap9_revB() ?       \
                         (0xfffffd50 - AT91_BASE_SYS) :  \
                         (0xfffffd60 - AT91_BASE_SYS))
 
+#define AT91CAP9_BASE_ECC       0xffffe200
+#define AT91CAP9_BASE_DMA       0xffffec00
+#define AT91CAP9_BASE_SMC       0xffffe800
+#define AT91CAP9_BASE_DBGU      AT91_BASE_DBGU1
+#define AT91CAP9_BASE_PIOA      0xfffff200
+#define AT91CAP9_BASE_PIOB      0xfffff400
+#define AT91CAP9_BASE_PIOC      0xfffff600
+#define AT91CAP9_BASE_PIOD      0xfffff800
+#define AT91CAP9_BASE_SHDWC     0xfffffd10
+#define AT91CAP9_BASE_RTT       0xfffffd20
+#define AT91CAP9_BASE_PIT       0xfffffd30
+#define AT91CAP9_BASE_WDT       0xfffffd40
+
 #define AT91_USART0     AT91CAP9_BASE_US0
 #define AT91_USART1     AT91CAP9_BASE_US1
 #define AT91_USART2     AT91CAP9_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h
index e4037b500302..bacb51141819 100644
--- a/arch/arm/mach-at91/include/mach/at91rm9200.h
+++ b/arch/arm/mach-at91/include/mach/at91rm9200.h
@@ -79,17 +79,17 @@
 /*
  * System Peripherals (offset from AT91_BASE_SYS)
  */
-#define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)    /* Advanced Interrupt Controller */
-#define AT91_DBGU       (0xfffff200 - AT91_BASE_SYS)    /* Debug Unit */
-#define AT91_PIOA       (0xfffff400 - AT91_BASE_SYS)    /* PIO Controller A */
-#define AT91_PIOB       (0xfffff600 - AT91_BASE_SYS)    /* PIO Controller B */
-#define AT91_PIOC       (0xfffff800 - AT91_BASE_SYS)    /* PIO Controller C */
-#define AT91_PIOD       (0xfffffa00 - AT91_BASE_SYS)    /* PIO Controller D */
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)    /* Power Management Controller */
 #define AT91_ST         (0xfffffd00 - AT91_BASE_SYS)    /* System Timer */
-#define AT91_RTC        (0xfffffe00 - AT91_BASE_SYS)    /* Real-Time Clock */
 #define AT91_MC         (0xffffff00 - AT91_BASE_SYS)    /* Memory Controllers */
 
+#define AT91RM9200_BASE_DBGU    AT91_BASE_DBGU0 /* Debug Unit */
+#define AT91RM9200_BASE_PIOA    0xfffff400      /* PIO Controller A */
+#define AT91RM9200_BASE_PIOB    0xfffff600      /* PIO Controller B */
+#define AT91RM9200_BASE_PIOC    0xfffff800      /* PIO Controller C */
+#define AT91RM9200_BASE_PIOD    0xfffffa00      /* PIO Controller D */
+#define AT91RM9200_BASE_RTC     0xfffffe00      /* Real-Time Clock */
+
 #define AT91_USART0     AT91RM9200_BASE_US0
 #define AT91_USART1     AT91RM9200_BASE_US1
 #define AT91_USART2     AT91RM9200_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h
index 9a791165913f..f937c476bb67 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9260.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9260.h
@@ -80,24 +80,23 @@
 /*
  * System Peripherals (offset from AT91_BASE_SYS)
  */
-#define AT91_ECC        (0xffffe800 - AT91_BASE_SYS)
 #define AT91_SDRAMC0    (0xffffea00 - AT91_BASE_SYS)
-#define AT91_SMC        (0xffffec00 - AT91_BASE_SYS)
 #define AT91_MATRIX     (0xffffee00 - AT91_BASE_SYS)
-#define AT91_CCFG       (0xffffef10 - AT91_BASE_SYS)
-#define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
-#define AT91_DBGU       (0xfffff200 - AT91_BASE_SYS)
-#define AT91_PIOA       (0xfffff400 - AT91_BASE_SYS)
-#define AT91_PIOB       (0xfffff600 - AT91_BASE_SYS)
-#define AT91_PIOC       (0xfffff800 - AT91_BASE_SYS)
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
-#define AT91_SHDWC      (0xfffffd10 - AT91_BASE_SYS)
-#define AT91_RTT        (0xfffffd20 - AT91_BASE_SYS)
-#define AT91_PIT        (0xfffffd30 - AT91_BASE_SYS)
-#define AT91_WDT        (0xfffffd40 - AT91_BASE_SYS)
 #define AT91_GPBR       (0xfffffd50 - AT91_BASE_SYS)
 
+#define AT91SAM9260_BASE_ECC    0xffffe800
+#define AT91SAM9260_BASE_SMC    0xffffec00
+#define AT91SAM9260_BASE_DBGU   AT91_BASE_DBGU0
+#define AT91SAM9260_BASE_PIOA   0xfffff400
+#define AT91SAM9260_BASE_PIOB   0xfffff600
+#define AT91SAM9260_BASE_PIOC   0xfffff800
+#define AT91SAM9260_BASE_SHDWC  0xfffffd10
+#define AT91SAM9260_BASE_RTT    0xfffffd20
+#define AT91SAM9260_BASE_PIT    0xfffffd30
+#define AT91SAM9260_BASE_WDT    0xfffffd40
+
 #define AT91_USART0     AT91SAM9260_BASE_US0
 #define AT91_USART1     AT91SAM9260_BASE_US1
 #define AT91_USART2     AT91SAM9260_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h
index ce596204cefa..175604e261be 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9261.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9261.h
@@ -66,21 +66,21 @@
  * System Peripherals (offset from AT91_BASE_SYS)
  */
 #define AT91_SDRAMC0    (0xffffea00 - AT91_BASE_SYS)
-#define AT91_SMC        (0xffffec00 - AT91_BASE_SYS)
 #define AT91_MATRIX     (0xffffee00 - AT91_BASE_SYS)
-#define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
-#define AT91_DBGU       (0xfffff200 - AT91_BASE_SYS)
-#define AT91_PIOA       (0xfffff400 - AT91_BASE_SYS)
-#define AT91_PIOB       (0xfffff600 - AT91_BASE_SYS)
-#define AT91_PIOC       (0xfffff800 - AT91_BASE_SYS)
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
-#define AT91_SHDWC      (0xfffffd10 - AT91_BASE_SYS)
-#define AT91_RTT        (0xfffffd20 - AT91_BASE_SYS)
-#define AT91_PIT        (0xfffffd30 - AT91_BASE_SYS)
-#define AT91_WDT        (0xfffffd40 - AT91_BASE_SYS)
 #define AT91_GPBR       (0xfffffd50 - AT91_BASE_SYS)
 
+#define AT91SAM9261_BASE_SMC    0xffffec00
+#define AT91SAM9261_BASE_DBGU   AT91_BASE_DBGU0
+#define AT91SAM9261_BASE_PIOA   0xfffff400
+#define AT91SAM9261_BASE_PIOB   0xfffff600
+#define AT91SAM9261_BASE_PIOC   0xfffff800
+#define AT91SAM9261_BASE_SHDWC  0xfffffd10
+#define AT91SAM9261_BASE_RTT    0xfffffd20
+#define AT91SAM9261_BASE_PIT    0xfffffd30
+#define AT91SAM9261_BASE_WDT    0xfffffd40
+
 #define AT91_USART0     AT91SAM9261_BASE_US0
 #define AT91_USART1     AT91SAM9261_BASE_US1
 #define AT91_USART2     AT91SAM9261_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h
index f1b92961a2b1..80c915002d83 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9263.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9263.h
@@ -74,30 +74,29 @@
 /*
  * System Peripherals (offset from AT91_BASE_SYS)
  */
-#define AT91_ECC0       (0xffffe000 - AT91_BASE_SYS)
 #define AT91_SDRAMC0    (0xffffe200 - AT91_BASE_SYS)
-#define AT91_SMC0       (0xffffe400 - AT91_BASE_SYS)
-#define AT91_ECC1       (0xffffe600 - AT91_BASE_SYS)
 #define AT91_SDRAMC1    (0xffffe800 - AT91_BASE_SYS)
-#define AT91_SMC1       (0xffffea00 - AT91_BASE_SYS)
 #define AT91_MATRIX     (0xffffec00 - AT91_BASE_SYS)
-#define AT91_CCFG       (0xffffed10 - AT91_BASE_SYS)
-#define AT91_DBGU       (0xffffee00 - AT91_BASE_SYS)
-#define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
-#define AT91_PIOA       (0xfffff200 - AT91_BASE_SYS)
-#define AT91_PIOB       (0xfffff400 - AT91_BASE_SYS)
-#define AT91_PIOC       (0xfffff600 - AT91_BASE_SYS)
-#define AT91_PIOD       (0xfffff800 - AT91_BASE_SYS)
-#define AT91_PIOE       (0xfffffa00 - AT91_BASE_SYS)
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
-#define AT91_SHDWC      (0xfffffd10 - AT91_BASE_SYS)
-#define AT91_RTT0       (0xfffffd20 - AT91_BASE_SYS)
-#define AT91_PIT        (0xfffffd30 - AT91_BASE_SYS)
-#define AT91_WDT        (0xfffffd40 - AT91_BASE_SYS)
-#define AT91_RTT1       (0xfffffd50 - AT91_BASE_SYS)
 #define AT91_GPBR       (0xfffffd60 - AT91_BASE_SYS)
 
+#define AT91SAM9263_BASE_ECC0   0xffffe000
+#define AT91SAM9263_BASE_SMC0   0xffffe400
+#define AT91SAM9263_BASE_ECC1   0xffffe600
+#define AT91SAM9263_BASE_SMC1   0xffffea00
+#define AT91SAM9263_BASE_DBGU   AT91_BASE_DBGU1
+#define AT91SAM9263_BASE_PIOA   0xfffff200
+#define AT91SAM9263_BASE_PIOB   0xfffff400
+#define AT91SAM9263_BASE_PIOC   0xfffff600
+#define AT91SAM9263_BASE_PIOD   0xfffff800
+#define AT91SAM9263_BASE_PIOE   0xfffffa00
+#define AT91SAM9263_BASE_SHDWC  0xfffffd10
+#define AT91SAM9263_BASE_RTT0   0xfffffd20
+#define AT91SAM9263_BASE_PIT    0xfffffd30
+#define AT91SAM9263_BASE_WDT    0xfffffd40
+#define AT91SAM9263_BASE_RTT1   0xfffffd50
+
 #define AT91_USART0     AT91SAM9263_BASE_US0
 #define AT91_USART1     AT91SAM9263_BASE_US1
 #define AT91_USART2     AT91SAM9263_BASE_US2
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_smc.h b/arch/arm/mach-at91/include/mach/at91sam9_smc.h
index 57de6207e57e..eb18a70fa647 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9_smc.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9_smc.h
@@ -16,7 +16,9 @@
 #ifndef AT91SAM9_SMC_H
 #define AT91SAM9_SMC_H
 
-#define AT91_SMC_SETUP(n)       (AT91_SMC + 0x00 + ((n)*0x10))  /* Setup Register for CS n */
+#include <mach/cpu.h>
+
+#define AT91_SMC_SETUP          0x00                            /* Setup Register for CS n */
 #define         AT91_SMC_NWESETUP       (0x3f << 0)                     /* NWE Setup Length */
 #define                 AT91_SMC_NWESETUP_(x)   ((x) << 0)
 #define         AT91_SMC_NCS_WRSETUP    (0x3f << 8)                     /* NCS Setup Length in Write Access */
@@ -26,7 +28,7 @@
 #define         AT91_SMC_NCS_RDSETUP    (0x3f << 24)                    /* NCS Setup Length in Read Access */
 #define                 AT91_SMC_NCS_RDSETUP_(x)        ((x) << 24)
 
-#define AT91_SMC_PULSE(n)       (AT91_SMC + 0x04 + ((n)*0x10))  /* Pulse Register for CS n */
+#define AT91_SMC_PULSE          0x04                            /* Pulse Register for CS n */
 #define         AT91_SMC_NWEPULSE       (0x7f <<  0)                    /* NWE Pulse Length */
 #define                 AT91_SMC_NWEPULSE_(x)   ((x) << 0)
 #define         AT91_SMC_NCS_WRPULSE    (0x7f <<  8)                    /* NCS Pulse Length in Write Access */
@@ -36,13 +38,13 @@
 #define         AT91_SMC_NCS_RDPULSE    (0x7f << 24)                    /* NCS Pulse Length in Read Access */
 #define                 AT91_SMC_NCS_RDPULSE_(x)((x) << 24)
 
-#define AT91_SMC_CYCLE(n)       (AT91_SMC + 0x08 + ((n)*0x10))  /* Cycle Register for CS n */
+#define AT91_SMC_CYCLE          0x08                            /* Cycle Register for CS n */
 #define         AT91_SMC_NWECYCLE       (0x1ff << 0 )                   /* Total Write Cycle Length */
 #define                 AT91_SMC_NWECYCLE_(x)   ((x) << 0)
 #define         AT91_SMC_NRDCYCLE       (0x1ff << 16)                   /* Total Read Cycle Length */
 #define                 AT91_SMC_NRDCYCLE_(x)   ((x) << 16)
 
-#define AT91_SMC_MODE(n)        (AT91_SMC + 0x0c + ((n)*0x10))  /* Mode Register for CS n */
+#define AT91_SMC_MODE           0x0c                            /* Mode Register for CS n */
 #define         AT91_SMC_READMODE       (1 <<  0)                       /* Read Mode */
 #define         AT91_SMC_WRITEMODE      (1 <<  1)                       /* Write Mode */
 #define         AT91_SMC_EXNWMODE       (3 <<  4)                       /* NWAIT Mode */
@@ -66,11 +68,4 @@
 #define                 AT91_SMC_PS_16                  (2 << 28)
 #define                 AT91_SMC_PS_32                  (3 << 28)
 
-#if defined(AT91_SMC1)          /* The AT91SAM9263 has 2 Static Memory contollers */
-#define AT91_SMC1_SETUP(n)      (AT91_SMC1 + 0x00 + ((n)*0x10)) /* Setup Register for CS n */
-#define AT91_SMC1_PULSE(n)      (AT91_SMC1 + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */
-#define AT91_SMC1_CYCLE(n)      (AT91_SMC1 + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */
-#define AT91_SMC1_MODE(n)       (AT91_SMC1 + 0x0c + ((n)*0x10)) /* Mode Register for CS n */
-#endif
-
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index 406bb6496805..f0c23c960dec 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -86,27 +86,27 @@
 /*
  * System Peripherals (offset from AT91_BASE_SYS)
  */
-#define AT91_ECC        (0xffffe200 - AT91_BASE_SYS)
 #define AT91_DDRSDRC1   (0xffffe400 - AT91_BASE_SYS)
 #define AT91_DDRSDRC0   (0xffffe600 - AT91_BASE_SYS)
-#define AT91_SMC        (0xffffe800 - AT91_BASE_SYS)
 #define AT91_MATRIX     (0xffffea00 - AT91_BASE_SYS)
-#define AT91_DMA        (0xffffec00 - AT91_BASE_SYS)
-#define AT91_DBGU       (0xffffee00 - AT91_BASE_SYS)
-#define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
-#define AT91_PIOA       (0xfffff200 - AT91_BASE_SYS)
-#define AT91_PIOB       (0xfffff400 - AT91_BASE_SYS)
-#define AT91_PIOC       (0xfffff600 - AT91_BASE_SYS)
-#define AT91_PIOD       (0xfffff800 - AT91_BASE_SYS)
-#define AT91_PIOE       (0xfffffa00 - AT91_BASE_SYS)
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
-#define AT91_SHDWC      (0xfffffd10 - AT91_BASE_SYS)
-#define AT91_RTT        (0xfffffd20 - AT91_BASE_SYS)
-#define AT91_PIT        (0xfffffd30 - AT91_BASE_SYS)
-#define AT91_WDT        (0xfffffd40 - AT91_BASE_SYS)
 #define AT91_GPBR       (0xfffffd60 - AT91_BASE_SYS)
-#define AT91_RTC        (0xfffffdb0 - AT91_BASE_SYS)
+
+#define AT91SAM9G45_BASE_ECC    0xffffe200
+#define AT91SAM9G45_BASE_DMA    0xffffec00
+#define AT91SAM9G45_BASE_SMC    0xffffe800
+#define AT91SAM9G45_BASE_DBGU   AT91_BASE_DBGU1
+#define AT91SAM9G45_BASE_PIOA   0xfffff200
+#define AT91SAM9G45_BASE_PIOB   0xfffff400
+#define AT91SAM9G45_BASE_PIOC   0xfffff600
+#define AT91SAM9G45_BASE_PIOD   0xfffff800
+#define AT91SAM9G45_BASE_PIOE   0xfffffa00
+#define AT91SAM9G45_BASE_SHDWC  0xfffffd10
+#define AT91SAM9G45_BASE_RTT    0xfffffd20
+#define AT91SAM9G45_BASE_PIT    0xfffffd30
+#define AT91SAM9G45_BASE_WDT    0xfffffd40
+#define AT91SAM9G45_BASE_RTC    0xfffffdb0
 
 #define AT91_USART0     AT91SAM9G45_BASE_US0
 #define AT91_USART1     AT91SAM9G45_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h
index 1aabacd315d4..2bb359e60b97 100644
--- a/arch/arm/mach-at91/include/mach/at91sam9rl.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h
@@ -69,27 +69,26 @@
 /*
  * System Peripherals (offset from AT91_BASE_SYS)
  */
-#define AT91_DMA        (0xffffe600 - AT91_BASE_SYS)
-#define AT91_ECC        (0xffffe800 - AT91_BASE_SYS)
 #define AT91_SDRAMC0    (0xffffea00 - AT91_BASE_SYS)
-#define AT91_SMC        (0xffffec00 - AT91_BASE_SYS)
 #define AT91_MATRIX     (0xffffee00 - AT91_BASE_SYS)
-#define AT91_CCFG       (0xffffef10 - AT91_BASE_SYS)
-#define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)
-#define AT91_DBGU       (0xfffff200 - AT91_BASE_SYS)
-#define AT91_PIOA       (0xfffff400 - AT91_BASE_SYS)
-#define AT91_PIOB       (0xfffff600 - AT91_BASE_SYS)
-#define AT91_PIOC       (0xfffff800 - AT91_BASE_SYS)
-#define AT91_PIOD       (0xfffffa00 - AT91_BASE_SYS)
 #define AT91_PMC        (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC       (0xfffffd00 - AT91_BASE_SYS)
-#define AT91_SHDWC      (0xfffffd10 - AT91_BASE_SYS)
-#define AT91_RTT        (0xfffffd20 - AT91_BASE_SYS)
-#define AT91_PIT        (0xfffffd30 - AT91_BASE_SYS)
-#define AT91_WDT        (0xfffffd40 - AT91_BASE_SYS)
 #define AT91_SCKCR      (0xfffffd50 - AT91_BASE_SYS)
 #define AT91_GPBR       (0xfffffd60 - AT91_BASE_SYS)
-#define AT91_RTC        (0xfffffe00 - AT91_BASE_SYS)
+
+#define AT91SAM9RL_BASE_DMA     0xffffe600
+#define AT91SAM9RL_BASE_ECC     0xffffe800
+#define AT91SAM9RL_BASE_SMC     0xffffec00
+#define AT91SAM9RL_BASE_DBGU    AT91_BASE_DBGU0
+#define AT91SAM9RL_BASE_PIOA    0xfffff400
+#define AT91SAM9RL_BASE_PIOB    0xfffff600
+#define AT91SAM9RL_BASE_PIOC    0xfffff800
+#define AT91SAM9RL_BASE_PIOD    0xfffffa00
+#define AT91SAM9RL_BASE_SHDWC   0xfffffd10
+#define AT91SAM9RL_BASE_RTT     0xfffffd20
+#define AT91SAM9RL_BASE_PIT     0xfffffd30
+#define AT91SAM9RL_BASE_WDT     0xfffffd40
+#define AT91SAM9RL_BASE_RTC     0xfffffe00
 
 #define AT91_USART0     AT91SAM9RL_BASE_US0
 #define AT91_USART1     AT91SAM9RL_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/at91x40.h b/arch/arm/mach-at91/include/mach/at91x40.h
index a152ff87e688..a57829f4fd18 100644
--- a/arch/arm/mach-at91/include/mach/at91x40.h
+++ b/arch/arm/mach-at91/include/mach/at91x40.h
@@ -40,7 +40,6 @@
 #define AT91_PIOA       (0xffff0000 - AT91_BASE_SYS)    /* PIO Controller A */
 #define AT91_PS         (0xffff4000 - AT91_BASE_SYS)    /* Power Save */
 #define AT91_WD         (0xffff8000 - AT91_BASE_SYS)    /* Watchdog Timer */
-#define AT91_AIC        (0xfffff000 - AT91_BASE_SYS)    /* Advanced Interrupt Controller */
 
 /*
  * The AT91x40 series doesn't have a debug unit like the other AT91 parts.
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index eac92e995bb5..d0b377b21bd7 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -40,13 +40,14 @@
 #include <linux/atmel-mci.h>
 #include <sound/atmel-ac97c.h>
 #include <linux/serial.h>
+#include <linux/platform_data/macb.h>
 
  /* USB Device */
 struct at91_udc_data {
-        u8      vbus_pin;               /* high == host powering us */
+        int     vbus_pin;               /* high == host powering us */
         u8      vbus_active_low;        /* vbus polarity */
         u8      vbus_polled;            /* Use polling, not interrupt */
-        u8      pullup_pin;             /* active == D+ pulled up */
+        int     pullup_pin;             /* active == D+ pulled up */
         u8      pullup_active_low;      /* true == pullup_pin is active low */
 };
 extern void __init at91_add_device_udc(struct at91_udc_data *data);
@@ -56,10 +57,10 @@ extern void __init at91_add_device_usba(struct usba_platform_data *data);
 
  /* Compact Flash */
 struct at91_cf_data {
-        u8      irq_pin;                /* I/O IRQ */
-        u8      det_pin;                /* Card detect */
-        u8      vcc_pin;                /* power switching */
-        u8      rst_pin;                /* card reset */
+        int     irq_pin;                /* I/O IRQ */
+        int     det_pin;                /* Card detect */
+        int     vcc_pin;                /* power switching */
+        int     rst_pin;                /* card reset */
         u8      chipselect;             /* EBI Chip Select number */
         u8      flags;
 #define AT91_CF_TRUE_IDE        0x01
@@ -70,37 +71,26 @@ extern void __init at91_add_device_cf(struct at91_cf_data *data);
  /* MMC / SD */
   /* at91_mci platform config */
 struct at91_mmc_data {
-        u8              det_pin;        /* card detect IRQ */
+        int             det_pin;        /* card detect IRQ */
         unsigned        slot_b:1;       /* uses Slot B */
         unsigned        wire4:1;        /* (SD) supports DAT0..DAT3 */
-        u8              wp_pin;         /* (SD) writeprotect detect */
-        u8              vcc_pin;        /* power switching (high == on) */
+        int             wp_pin;         /* (SD) writeprotect detect */
+        int             vcc_pin;        /* power switching (high == on) */
 };
 extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data);
 
   /* atmel-mci platform config */
 extern void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data);
 
- /* Ethernet (EMAC & MACB) */
-struct at91_eth_data {
-        u32             phy_mask;
-        u8              phy_irq_pin;    /* PHY IRQ */
-        u8              is_rmii;        /* using RMII interface? */
-};
-extern void __init at91_add_device_eth(struct at91_eth_data *data);
-
-#if defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91SAM9G20) || defined(CONFIG_ARCH_AT91CAP9) \
-        || defined(CONFIG_ARCH_AT91SAM9G45)
-#define eth_platform_data       at91_eth_data
-#endif
+extern void __init at91_add_device_eth(struct macb_platform_data *data);
 
  /* USB Host */
 struct at91_usbh_data {
         u8              ports;          /* number of ports on root hub */
-        u8              vbus_pin[2];    /* port power-control pin */
+        int             vbus_pin[2];    /* port power-control pin */
         u8              vbus_pin_inverted;
         u8              overcurrent_supported;
-        u8              overcurrent_pin[2];
+        int             overcurrent_pin[2];
         u8              overcurrent_status[2];
         u8              overcurrent_changed[2];
 };
@@ -110,9 +100,9 @@ extern void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data);
 
  /* NAND / SmartMedia */
 struct atmel_nand_data {
-        u8              enable_pin;     /* chip enable */
-        u8              det_pin;        /* card detect */
-        u8              rdy_pin;        /* ready/busy */
+        int             enable_pin;     /* chip enable */
+        int             det_pin;        /* card detect */
+        int             rdy_pin;        /* ready/busy */
         u8              rdy_pin_active_low;     /* rdy_pin value is inverted */
         u8              ale;            /* address line number connected to ALE */
         u8              cle;            /* address line number connected to CLE */
diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S
index 0ed8648c6452..c6bb9e2d9baa 100644
--- a/arch/arm/mach-at91/include/mach/debug-macro.S
+++ b/arch/arm/mach-at91/include/mach/debug-macro.S
@@ -14,9 +14,15 @@
 #include <mach/hardware.h>
 #include <mach/at91_dbgu.h>
 
+#if defined(CONFIG_AT91_DEBUG_LL_DBGU0)
+#define AT91_DBGU AT91_BASE_DBGU0
+#else
+#define AT91_DBGU AT91_BASE_DBGU1
+#endif
+
         .macro  addruart, rp, rv, tmp
-        ldr     \rp, =(AT91_BASE_SYS + AT91_DBGU)       @ System peripherals (phys address)
-        ldr     \rv, =(AT91_VA_BASE_SYS + AT91_DBGU)    @ System peripherals (virt address)
+        ldr     \rp, =AT91_DBGU                         @ System peripherals (phys address)
+        ldr     \rv, =AT91_IO_P2V(AT91_DBGU)            @ System peripherals (virt address)
         .endm
 
         .macro  senduart,rd,rx
diff --git a/arch/arm/mach-at91/include/mach/entry-macro.S b/arch/arm/mach-at91/include/mach/entry-macro.S
index 7ab68f972227..423eea0ed74c 100644
--- a/arch/arm/mach-at91/include/mach/entry-macro.S
+++ b/arch/arm/mach-at91/include/mach/entry-macro.S
@@ -17,16 +17,17 @@
         .endm
 
         .macro  get_irqnr_preamble, base, tmp
-        ldr     \base, =(AT91_VA_BASE_SYS + AT91_AIC)           @ base virtual address of AIC peripheral
+        ldr     \base, =at91_aic_base           @ base virtual address of AIC peripheral
+        ldr     \base, [\base]
         .endm
 
         .macro  arch_ret_to_user, tmp1, tmp2
         .endm
 
         .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        ldr     \irqnr, [\base, #(AT91_AIC_IVR - AT91_AIC)]     @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
-        ldr     \irqstat, [\base, #(AT91_AIC_ISR - AT91_AIC)]   @ read interrupt source number
-        teq     \irqstat, #0                                    @ ISR is 0 when no current interrupt, or spurious interrupt
-        streq   \tmp, [\base, #(AT91_AIC_EOICR - AT91_AIC)]     @ not going to be handled further, then ACK it now.
+        ldr     \irqnr, [\base, #AT91_AIC_IVR]          @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
+        ldr     \irqstat, [\base, #AT91_AIC_ISR]        @ read interrupt source number
+        teq     \irqstat, #0                            @ ISR is 0 when no current interrupt, or spurious interrupt
+        streq   \tmp, [\base, #AT91_AIC_EOICR]          @ not going to be handled further, then ACK it now.
         .endm
 
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index 2b9a1f51210f..e3fd225121c7 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -16,177 +16,175 @@
 #include <linux/kernel.h>
 #include <asm/irq.h>
 
-#define PIN_BASE                NR_AIC_IRQS
-
 #define MAX_GPIO_BANKS          5
-#define NR_BUILTIN_GPIO         (PIN_BASE + (MAX_GPIO_BANKS * 32))
+#define NR_BUILTIN_GPIO         (MAX_GPIO_BANKS * 32)
 
 /* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */
 
-#define AT91_PIN_PA0    (PIN_BASE + 0x00 + 0)
-#define AT91_PIN_PA1    (PIN_BASE + 0x00 + 1)
-#define AT91_PIN_PA2    (PIN_BASE + 0x00 + 2)
-#define AT91_PIN_PA3    (PIN_BASE + 0x00 + 3)
-#define AT91_PIN_PA4    (PIN_BASE + 0x00 + 4)
-#define AT91_PIN_PA5    (PIN_BASE + 0x00 + 5)
-#define AT91_PIN_PA6    (PIN_BASE + 0x00 + 6)
-#define AT91_PIN_PA7    (PIN_BASE + 0x00 + 7)
-#define AT91_PIN_PA8    (PIN_BASE + 0x00 + 8)
-#define AT91_PIN_PA9    (PIN_BASE + 0x00 + 9)
-#define AT91_PIN_PA10   (PIN_BASE + 0x00 + 10)
-#define AT91_PIN_PA11   (PIN_BASE + 0x00 + 11)
-#define AT91_PIN_PA12   (PIN_BASE + 0x00 + 12)
-#define AT91_PIN_PA13   (PIN_BASE + 0x00 + 13)
-#define AT91_PIN_PA14   (PIN_BASE + 0x00 + 14)
-#define AT91_PIN_PA15   (PIN_BASE + 0x00 + 15)
-#define AT91_PIN_PA16   (PIN_BASE + 0x00 + 16)
-#define AT91_PIN_PA17   (PIN_BASE + 0x00 + 17)
-#define AT91_PIN_PA18   (PIN_BASE + 0x00 + 18)
-#define AT91_PIN_PA19   (PIN_BASE + 0x00 + 19)
-#define AT91_PIN_PA20   (PIN_BASE + 0x00 + 20)
-#define AT91_PIN_PA21   (PIN_BASE + 0x00 + 21)
-#define AT91_PIN_PA22   (PIN_BASE + 0x00 + 22)
-#define AT91_PIN_PA23   (PIN_BASE + 0x00 + 23)
-#define AT91_PIN_PA24   (PIN_BASE + 0x00 + 24)
-#define AT91_PIN_PA25   (PIN_BASE + 0x00 + 25)
-#define AT91_PIN_PA26   (PIN_BASE + 0x00 + 26)
-#define AT91_PIN_PA27   (PIN_BASE + 0x00 + 27)
-#define AT91_PIN_PA28   (PIN_BASE + 0x00 + 28)
-#define AT91_PIN_PA29   (PIN_BASE + 0x00 + 29)
-#define AT91_PIN_PA30   (PIN_BASE + 0x00 + 30)
-#define AT91_PIN_PA31   (PIN_BASE + 0x00 + 31)
-
-#define AT91_PIN_PB0    (PIN_BASE + 0x20 + 0)
-#define AT91_PIN_PB1    (PIN_BASE + 0x20 + 1)
-#define AT91_PIN_PB2    (PIN_BASE + 0x20 + 2)
-#define AT91_PIN_PB3    (PIN_BASE + 0x20 + 3)
-#define AT91_PIN_PB4    (PIN_BASE + 0x20 + 4)
-#define AT91_PIN_PB5    (PIN_BASE + 0x20 + 5)
-#define AT91_PIN_PB6    (PIN_BASE + 0x20 + 6)
-#define AT91_PIN_PB7    (PIN_BASE + 0x20 + 7)
-#define AT91_PIN_PB8    (PIN_BASE + 0x20 + 8)
-#define AT91_PIN_PB9    (PIN_BASE + 0x20 + 9)
-#define AT91_PIN_PB10   (PIN_BASE + 0x20 + 10)
-#define AT91_PIN_PB11   (PIN_BASE + 0x20 + 11)
-#define AT91_PIN_PB12   (PIN_BASE + 0x20 + 12)
-#define AT91_PIN_PB13   (PIN_BASE + 0x20 + 13)
-#define AT91_PIN_PB14   (PIN_BASE + 0x20 + 14)
-#define AT91_PIN_PB15   (PIN_BASE + 0x20 + 15)
-#define AT91_PIN_PB16   (PIN_BASE + 0x20 + 16)
-#define AT91_PIN_PB17   (PIN_BASE + 0x20 + 17)
-#define AT91_PIN_PB18   (PIN_BASE + 0x20 + 18)
-#define AT91_PIN_PB19   (PIN_BASE + 0x20 + 19)
-#define AT91_PIN_PB20   (PIN_BASE + 0x20 + 20)
-#define AT91_PIN_PB21   (PIN_BASE + 0x20 + 21)
-#define AT91_PIN_PB22   (PIN_BASE + 0x20 + 22)
-#define AT91_PIN_PB23   (PIN_BASE + 0x20 + 23)
-#define AT91_PIN_PB24   (PIN_BASE + 0x20 + 24)
-#define AT91_PIN_PB25   (PIN_BASE + 0x20 + 25)
-#define AT91_PIN_PB26   (PIN_BASE + 0x20 + 26)
-#define AT91_PIN_PB27   (PIN_BASE + 0x20 + 27)
-#define AT91_PIN_PB28   (PIN_BASE + 0x20 + 28)
-#define AT91_PIN_PB29   (PIN_BASE + 0x20 + 29)
-#define AT91_PIN_PB30   (PIN_BASE + 0x20 + 30)
-#define AT91_PIN_PB31   (PIN_BASE + 0x20 + 31)
-
-#define AT91_PIN_PC0    (PIN_BASE + 0x40 + 0)
-#define AT91_PIN_PC1    (PIN_BASE + 0x40 + 1)
-#define AT91_PIN_PC2    (PIN_BASE + 0x40 + 2)
-#define AT91_PIN_PC3    (PIN_BASE + 0x40 + 3)
-#define AT91_PIN_PC4    (PIN_BASE + 0x40 + 4)
-#define AT91_PIN_PC5    (PIN_BASE + 0x40 + 5)
-#define AT91_PIN_PC6    (PIN_BASE + 0x40 + 6)
-#define AT91_PIN_PC7    (PIN_BASE + 0x40 + 7)
-#define AT91_PIN_PC8    (PIN_BASE + 0x40 + 8)
-#define AT91_PIN_PC9    (PIN_BASE + 0x40 + 9)
-#define AT91_PIN_PC10   (PIN_BASE + 0x40 + 10)
-#define AT91_PIN_PC11   (PIN_BASE + 0x40 + 11)
-#define AT91_PIN_PC12   (PIN_BASE + 0x40 + 12)
-#define AT91_PIN_PC13   (PIN_BASE + 0x40 + 13)
-#define AT91_PIN_PC14   (PIN_BASE + 0x40 + 14)
-#define AT91_PIN_PC15   (PIN_BASE + 0x40 + 15)
-#define AT91_PIN_PC16   (PIN_BASE + 0x40 + 16)
-#define AT91_PIN_PC17   (PIN_BASE + 0x40 + 17)
-#define AT91_PIN_PC18   (PIN_BASE + 0x40 + 18)
-#define AT91_PIN_PC19   (PIN_BASE + 0x40 + 19)
-#define AT91_PIN_PC20   (PIN_BASE + 0x40 + 20)
-#define AT91_PIN_PC21   (PIN_BASE + 0x40 + 21)
-#define AT91_PIN_PC22   (PIN_BASE + 0x40 + 22)
-#define AT91_PIN_PC23   (PIN_BASE + 0x40 + 23)
-#define AT91_PIN_PC24   (PIN_BASE + 0x40 + 24)
-#define AT91_PIN_PC25   (PIN_BASE + 0x40 + 25)
-#define AT91_PIN_PC26   (PIN_BASE + 0x40 + 26)
-#define AT91_PIN_PC27   (PIN_BASE + 0x40 + 27)
-#define AT91_PIN_PC28   (PIN_BASE + 0x40 + 28)
-#define AT91_PIN_PC29   (PIN_BASE + 0x40 + 29)
-#define AT91_PIN_PC30   (PIN_BASE + 0x40 + 30)
-#define AT91_PIN_PC31   (PIN_BASE + 0x40 + 31)
-
-#define AT91_PIN_PD0    (PIN_BASE + 0x60 + 0)
-#define AT91_PIN_PD1    (PIN_BASE + 0x60 + 1)
-#define AT91_PIN_PD2    (PIN_BASE + 0x60 + 2)
-#define AT91_PIN_PD3    (PIN_BASE + 0x60 + 3)
-#define AT91_PIN_PD4    (PIN_BASE + 0x60 + 4)
-#define AT91_PIN_PD5    (PIN_BASE + 0x60 + 5)
-#define AT91_PIN_PD6    (PIN_BASE + 0x60 + 6)
-#define AT91_PIN_PD7    (PIN_BASE + 0x60 + 7)
-#define AT91_PIN_PD8    (PIN_BASE + 0x60 + 8)
-#define AT91_PIN_PD9    (PIN_BASE + 0x60 + 9)
-#define AT91_PIN_PD10   (PIN_BASE + 0x60 + 10)
-#define AT91_PIN_PD11   (PIN_BASE + 0x60 + 11)
-#define AT91_PIN_PD12   (PIN_BASE + 0x60 + 12)
-#define AT91_PIN_PD13   (PIN_BASE + 0x60 + 13)
-#define AT91_PIN_PD14   (PIN_BASE + 0x60 + 14)
-#define AT91_PIN_PD15   (PIN_BASE + 0x60 + 15)
-#define AT91_PIN_PD16   (PIN_BASE + 0x60 + 16)
-#define AT91_PIN_PD17   (PIN_BASE + 0x60 + 17)
-#define AT91_PIN_PD18   (PIN_BASE + 0x60 + 18)
-#define AT91_PIN_PD19   (PIN_BASE + 0x60 + 19)
-#define AT91_PIN_PD20   (PIN_BASE + 0x60 + 20)
-#define AT91_PIN_PD21   (PIN_BASE + 0x60 + 21)
-#define AT91_PIN_PD22   (PIN_BASE + 0x60 + 22)
-#define AT91_PIN_PD23   (PIN_BASE + 0x60 + 23)
-#define AT91_PIN_PD24   (PIN_BASE + 0x60 + 24)
-#define AT91_PIN_PD25   (PIN_BASE + 0x60 + 25)
-#define AT91_PIN_PD26   (PIN_BASE + 0x60 + 26)
-#define AT91_PIN_PD27   (PIN_BASE + 0x60 + 27)
-#define AT91_PIN_PD28   (PIN_BASE + 0x60 + 28)
-#define AT91_PIN_PD29   (PIN_BASE + 0x60 + 29)
-#define AT91_PIN_PD30   (PIN_BASE + 0x60 + 30)
-#define AT91_PIN_PD31   (PIN_BASE + 0x60 + 31)
-
-#define AT91_PIN_PE0    (PIN_BASE + 0x80 + 0)
-#define AT91_PIN_PE1    (PIN_BASE + 0x80 + 1)
-#define AT91_PIN_PE2    (PIN_BASE + 0x80 + 2)
-#define AT91_PIN_PE3    (PIN_BASE + 0x80 + 3)
-#define AT91_PIN_PE4    (PIN_BASE + 0x80 + 4)
-#define AT91_PIN_PE5    (PIN_BASE + 0x80 + 5)
-#define AT91_PIN_PE6    (PIN_BASE + 0x80 + 6)
-#define AT91_PIN_PE7    (PIN_BASE + 0x80 + 7)
-#define AT91_PIN_PE8    (PIN_BASE + 0x80 + 8)
-#define AT91_PIN_PE9    (PIN_BASE + 0x80 + 9)
-#define AT91_PIN_PE10   (PIN_BASE + 0x80 + 10)
-#define AT91_PIN_PE11   (PIN_BASE + 0x80 + 11)
-#define AT91_PIN_PE12   (PIN_BASE + 0x80 + 12)
-#define AT91_PIN_PE13   (PIN_BASE + 0x80 + 13)
-#define AT91_PIN_PE14   (PIN_BASE + 0x80 + 14)
-#define AT91_PIN_PE15   (PIN_BASE + 0x80 + 15)
-#define AT91_PIN_PE16   (PIN_BASE + 0x80 + 16)
-#define AT91_PIN_PE17   (PIN_BASE + 0x80 + 17)
-#define AT91_PIN_PE18   (PIN_BASE + 0x80 + 18)
-#define AT91_PIN_PE19   (PIN_BASE + 0x80 + 19)
-#define AT91_PIN_PE20   (PIN_BASE + 0x80 + 20)
-#define AT91_PIN_PE21   (PIN_BASE + 0x80 + 21)
-#define AT91_PIN_PE22   (PIN_BASE + 0x80 + 22)
-#define AT91_PIN_PE23   (PIN_BASE + 0x80 + 23)
-#define AT91_PIN_PE24   (PIN_BASE + 0x80 + 24)
-#define AT91_PIN_PE25   (PIN_BASE + 0x80 + 25)
-#define AT91_PIN_PE26   (PIN_BASE + 0x80 + 26)
-#define AT91_PIN_PE27   (PIN_BASE + 0x80 + 27)
-#define AT91_PIN_PE28   (PIN_BASE + 0x80 + 28)
-#define AT91_PIN_PE29   (PIN_BASE + 0x80 + 29)
-#define AT91_PIN_PE30   (PIN_BASE + 0x80 + 30)
-#define AT91_PIN_PE31   (PIN_BASE + 0x80 + 31)
+#define AT91_PIN_PA0    (0x00 + 0)
+#define AT91_PIN_PA1    (0x00 + 1)
+#define AT91_PIN_PA2    (0x00 + 2)
+#define AT91_PIN_PA3    (0x00 + 3)
+#define AT91_PIN_PA4    (0x00 + 4)
+#define AT91_PIN_PA5    (0x00 + 5)
+#define AT91_PIN_PA6    (0x00 + 6)
+#define AT91_PIN_PA7    (0x00 + 7)
+#define AT91_PIN_PA8    (0x00 + 8)
+#define AT91_PIN_PA9    (0x00 + 9)
+#define AT91_PIN_PA10   (0x00 + 10)
+#define AT91_PIN_PA11   (0x00 + 11)
+#define AT91_PIN_PA12   (0x00 + 12)
+#define AT91_PIN_PA13   (0x00 + 13)
+#define AT91_PIN_PA14   (0x00 + 14)
+#define AT91_PIN_PA15   (0x00 + 15)
+#define AT91_PIN_PA16   (0x00 + 16)
+#define AT91_PIN_PA17   (0x00 + 17)
+#define AT91_PIN_PA18   (0x00 + 18)
+#define AT91_PIN_PA19   (0x00 + 19)
+#define AT91_PIN_PA20   (0x00 + 20)
+#define AT91_PIN_PA21   (0x00 + 21)
+#define AT91_PIN_PA22   (0x00 + 22)
+#define AT91_PIN_PA23   (0x00 + 23)
+#define AT91_PIN_PA24   (0x00 + 24)
+#define AT91_PIN_PA25   (0x00 + 25)
+#define AT91_PIN_PA26   (0x00 + 26)
+#define AT91_PIN_PA27   (0x00 + 27)
+#define AT91_PIN_PA28   (0x00 + 28)
+#define AT91_PIN_PA29   (0x00 + 29)
+#define AT91_PIN_PA30   (0x00 + 30)
+#define AT91_PIN_PA31   (0x00 + 31)
+
+#define AT91_PIN_PB0    (0x20 + 0)
+#define AT91_PIN_PB1    (0x20 + 1)
+#define AT91_PIN_PB2    (0x20 + 2)
+#define AT91_PIN_PB3    (0x20 + 3)
+#define AT91_PIN_PB4    (0x20 + 4)
+#define AT91_PIN_PB5    (0x20 + 5)
+#define AT91_PIN_PB6    (0x20 + 6)
+#define AT91_PIN_PB7    (0x20 + 7)
+#define AT91_PIN_PB8    (0x20 + 8)
+#define AT91_PIN_PB9    (0x20 + 9)
+#define AT91_PIN_PB10   (0x20 + 10)
+#define AT91_PIN_PB11   (0x20 + 11)
+#define AT91_PIN_PB12   (0x20 + 12)
+#define AT91_PIN_PB13   (0x20 + 13)
+#define AT91_PIN_PB14   (0x20 + 14)
+#define AT91_PIN_PB15   (0x20 + 15)
+#define AT91_PIN_PB16   (0x20 + 16)
+#define AT91_PIN_PB17   (0x20 + 17)
+#define AT91_PIN_PB18   (0x20 + 18)
+#define AT91_PIN_PB19   (0x20 + 19)
+#define AT91_PIN_PB20   (0x20 + 20)
+#define AT91_PIN_PB21   (0x20 + 21)
+#define AT91_PIN_PB22   (0x20 + 22)
+#define AT91_PIN_PB23   (0x20 + 23)
+#define AT91_PIN_PB24   (0x20 + 24)
+#define AT91_PIN_PB25   (0x20 + 25)
+#define AT91_PIN_PB26   (0x20 + 26)
+#define AT91_PIN_PB27   (0x20 + 27)
+#define AT91_PIN_PB28   (0x20 + 28)
+#define AT91_PIN_PB29   (0x20 + 29)
+#define AT91_PIN_PB30   (0x20 + 30)
+#define AT91_PIN_PB31   (0x20 + 31)
+
+#define AT91_PIN_PC0    (0x40 + 0)
+#define AT91_PIN_PC1    (0x40 + 1)
+#define AT91_PIN_PC2    (0x40 + 2)
+#define AT91_PIN_PC3    (0x40 + 3)
+#define AT91_PIN_PC4    (0x40 + 4)
+#define AT91_PIN_PC5    (0x40 + 5)
+#define AT91_PIN_PC6    (0x40 + 6)
+#define AT91_PIN_PC7    (0x40 + 7)
+#define AT91_PIN_PC8    (0x40 + 8)
+#define AT91_PIN_PC9    (0x40 + 9)
+#define AT91_PIN_PC10   (0x40 + 10)
+#define AT91_PIN_PC11   (0x40 + 11)
+#define AT91_PIN_PC12   (0x40 + 12)
+#define AT91_PIN_PC13   (0x40 + 13)
+#define AT91_PIN_PC14   (0x40 + 14)
+#define AT91_PIN_PC15   (0x40 + 15)
+#define AT91_PIN_PC16   (0x40 + 16)
+#define AT91_PIN_PC17   (0x40 + 17)
+#define AT91_PIN_PC18   (0x40 + 18)
+#define AT91_PIN_PC19   (0x40 + 19)
+#define AT91_PIN_PC20   (0x40 + 20)
+#define AT91_PIN_PC21   (0x40 + 21)
+#define AT91_PIN_PC22   (0x40 + 22)
+#define AT91_PIN_PC23   (0x40 + 23)
+#define AT91_PIN_PC24   (0x40 + 24)
+#define AT91_PIN_PC25   (0x40 + 25)
+#define AT91_PIN_PC26   (0x40 + 26)
+#define AT91_PIN_PC27   (0x40 + 27)
+#define AT91_PIN_PC28   (0x40 + 28)
+#define AT91_PIN_PC29   (0x40 + 29)
+#define AT91_PIN_PC30   (0x40 + 30)
+#define AT91_PIN_PC31   (0x40 + 31)
+
+#define AT91_PIN_PD0    (0x60 + 0)
+#define AT91_PIN_PD1    (0x60 + 1)
+#define AT91_PIN_PD2    (0x60 + 2)
+#define AT91_PIN_PD3    (0x60 + 3)
+#define AT91_PIN_PD4    (0x60 + 4)
+#define AT91_PIN_PD5    (0x60 + 5)
+#define AT91_PIN_PD6    (0x60 + 6)
+#define AT91_PIN_PD7    (0x60 + 7)
+#define AT91_PIN_PD8    (0x60 + 8)
+#define AT91_PIN_PD9    (0x60 + 9)
+#define AT91_PIN_PD10   (0x60 + 10)
+#define AT91_PIN_PD11   (0x60 + 11)
+#define AT91_PIN_PD12   (0x60 + 12)
+#define AT91_PIN_PD13   (0x60 + 13)
+#define AT91_PIN_PD14   (0x60 + 14)
+#define AT91_PIN_PD15   (0x60 + 15)
+#define AT91_PIN_PD16   (0x60 + 16)
+#define AT91_PIN_PD17   (0x60 + 17)
+#define AT91_PIN_PD18   (0x60 + 18)
+#define AT91_PIN_PD19   (0x60 + 19)
+#define AT91_PIN_PD20   (0x60 + 20)
+#define AT91_PIN_PD21   (0x60 + 21)
+#define AT91_PIN_PD22   (0x60 + 22)
+#define AT91_PIN_PD23   (0x60 + 23)
+#define AT91_PIN_PD24   (0x60 + 24)
+#define AT91_PIN_PD25   (0x60 + 25)
+#define AT91_PIN_PD26   (0x60 + 26)
+#define AT91_PIN_PD27   (0x60 + 27)
+#define AT91_PIN_PD28   (0x60 + 28)
+#define AT91_PIN_PD29   (0x60 + 29)
+#define AT91_PIN_PD30   (0x60 + 30)
+#define AT91_PIN_PD31   (0x60 + 31)
+
+#define AT91_PIN_PE0    (0x80 + 0)
+#define AT91_PIN_PE1    (0x80 + 1)
+#define AT91_PIN_PE2    (0x80 + 2)
+#define AT91_PIN_PE3    (0x80 + 3)
+#define AT91_PIN_PE4    (0x80 + 4)
+#define AT91_PIN_PE5    (0x80 + 5)
+#define AT91_PIN_PE6    (0x80 + 6)
+#define AT91_PIN_PE7    (0x80 + 7)
+#define AT91_PIN_PE8    (0x80 + 8)
+#define AT91_PIN_PE9    (0x80 + 9)
+#define AT91_PIN_PE10   (0x80 + 10)
+#define AT91_PIN_PE11   (0x80 + 11)
+#define AT91_PIN_PE12   (0x80 + 12)
+#define AT91_PIN_PE13   (0x80 + 13)
+#define AT91_PIN_PE14   (0x80 + 14)
+#define AT91_PIN_PE15   (0x80 + 15)
+#define AT91_PIN_PE16   (0x80 + 16)
+#define AT91_PIN_PE17   (0x80 + 17)
+#define AT91_PIN_PE18   (0x80 + 18)
+#define AT91_PIN_PE19   (0x80 + 19)
+#define AT91_PIN_PE20   (0x80 + 20)
+#define AT91_PIN_PE21   (0x80 + 21)
+#define AT91_PIN_PE22   (0x80 + 22)
+#define AT91_PIN_PE23   (0x80 + 23)
+#define AT91_PIN_PE24   (0x80 + 24)
+#define AT91_PIN_PE25   (0x80 + 25)
+#define AT91_PIN_PE26   (0x80 + 26)
+#define AT91_PIN_PE27   (0x80 + 27)
+#define AT91_PIN_PE28   (0x80 + 28)
+#define AT91_PIN_PE29   (0x80 + 29)
+#define AT91_PIN_PE30   (0x80 + 30)
+#define AT91_PIN_PE31   (0x80 + 31)
 
 #ifndef __ASSEMBLY__
 /* setup setup routines, called from board init or driver probe() */
@@ -215,8 +213,8 @@ extern void at91_gpio_resume(void);
 
 #include <asm/errno.h>
 
-#define gpio_to_irq(gpio) (gpio)
-#define irq_to_gpio(irq)  (irq)
+#define gpio_to_irq(gpio) (gpio + NR_AIC_IRQS)
+#define irq_to_gpio(irq)  (irq - NR_AIC_IRQS)
 
 #endif  /* __ASSEMBLY__ */
 
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index 483478d8be6b..2d0e4e998566 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -16,6 +16,12 @@
 
 #include <asm/sizes.h>
 
+/* DBGU base */
+/* rm9200, 9260/9g20, 9261/9g10, 9rl */
+#define AT91_BASE_DBGU0 0xfffff200
+/* 9263, 9g45, cap9 */
+#define AT91_BASE_DBGU1 0xffffee00
+
 #if defined(CONFIG_ARCH_AT91RM9200)
 #include <mach/at91rm9200.h>
 #elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20)
@@ -52,6 +58,12 @@
 #endif
 
 /*
+ * On all at91 have the Advanced Interrupt Controller starts at address
+ * 0xfffff000
+ */
+#define AT91_AIC        0xfffff000
+
+/*
  * Peripheral identifiers/interrupts.
  */
 #define AT91_ID_FIQ             0       /* Advanced Interrupt Controller (FIQ) */
diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h
index 36bd55f3fc6e..ac8b7dfc85ef 100644
--- a/arch/arm/mach-at91/include/mach/irqs.h
+++ b/arch/arm/mach-at91/include/mach/irqs.h
@@ -31,7 +31,7 @@
  * Acknowledge interrupt with AIC after interrupt has been handled.
  *   (by kernel/irq.c)
  */
-#define irq_finish(irq) do { at91_sys_write(AT91_AIC_EOICR, 0); } while (0)
+#define irq_finish(irq) do { at91_aic_write(AT91_AIC_EOICR, 0); } while (0)
 
 
 /*
diff --git a/arch/arm/mach-at91/include/mach/system.h b/arch/arm/mach-at91/include/mach/system.h
index 36af14bc13bb..cbd64f3bcecd 100644
--- a/arch/arm/mach-at91/include/mach/system.h
+++ b/arch/arm/mach-at91/include/mach/system.h
@@ -47,13 +47,4 @@ static inline void arch_idle(void)
 #endif
 }
 
-void (*at91_arch_reset)(void);
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /* call the CPU-specific reset function */
-        if (at91_arch_reset)
-                (at91_arch_reset)();
-}
-
 #endif
diff --git a/arch/arm/mach-at91/include/mach/timex.h b/arch/arm/mach-at91/include/mach/timex.h
index 85820ad801cc..5e917a66edd7 100644
--- a/arch/arm/mach-at91/include/mach/timex.h
+++ b/arch/arm/mach-at91/include/mach/timex.h
@@ -23,70 +23,15 @@
 
 #include <mach/hardware.h>
 
-#if defined(CONFIG_ARCH_AT91RM9200)
+#ifdef CONFIG_ARCH_AT91X40
 
-#define CLOCK_TICK_RATE         (AT91_SLOW_CLOCK)
-
-#elif defined(CONFIG_ARCH_AT91SAM9260)
-
-#if defined(CONFIG_MACH_USB_A9260) || defined(CONFIG_MACH_QIL_A9260)
-#define AT91SAM9_MASTER_CLOCK   90000000
-#else
-#define AT91SAM9_MASTER_CLOCK   99300000
-#endif
-
-#define CLOCK_TICK_RATE         (AT91SAM9_MASTER_CLOCK/16)
-
-#elif defined(CONFIG_ARCH_AT91SAM9261)
-
-#define AT91SAM9_MASTER_CLOCK   99300000
-#define CLOCK_TICK_RATE         (AT91SAM9_MASTER_CLOCK/16)
-
-#elif defined(CONFIG_ARCH_AT91SAM9G10)
-
-#define AT91SAM9_MASTER_CLOCK   133000000
-#define CLOCK_TICK_RATE         (AT91SAM9_MASTER_CLOCK/16)
-
-#elif defined(CONFIG_ARCH_AT91SAM9263)
-
-#if defined(CONFIG_MACH_USB_A9263)
-#define AT91SAM9_MASTER_CLOCK   90000000
-#else
-#define AT91SAM9_MASTER_CLOCK   99959500
-#endif
-
-#define CLOCK_TICK_RATE         (AT91SAM9_MASTER_CLOCK/16)
-
-#elif defined(CONFIG_ARCH_AT91SAM9RL)
-
-#define AT91SAM9_MASTER_CLOCK   100000000
-#define CLOCK_TICK_RATE         (AT91SAM9_MASTER_CLOCK/16)
-
-#elif defined(CONFIG_ARCH_AT91SAM9G20)
+#define AT91X40_MASTER_CLOCK    40000000
+#define CLOCK_TICK_RATE         (AT91X40_MASTER_CLOCK)
 
-#if defined(CONFIG_MACH_USB_A9G20)
-#define AT91SAM9_MASTER_CLOCK   133000000
 #else
-#define AT91SAM9_MASTER_CLOCK   132096000
-#endif
-
-#define CLOCK_TICK_RATE         (AT91SAM9_MASTER_CLOCK/16)
-
-#elif defined(CONFIG_ARCH_AT91SAM9G45)
 
-#define AT91SAM9_MASTER_CLOCK   133333333
-#define CLOCK_TICK_RATE         (AT91SAM9_MASTER_CLOCK/16)
-
-#elif defined(CONFIG_ARCH_AT91CAP9)
-
-#define AT91CAP9_MASTER_CLOCK   100000000
-#define CLOCK_TICK_RATE         (AT91CAP9_MASTER_CLOCK/16)
-
-#elif defined(CONFIG_ARCH_AT91X40)
-
-#define AT91X40_MASTER_CLOCK    40000000
-#define CLOCK_TICK_RATE         (AT91X40_MASTER_CLOCK)
+#define CLOCK_TICK_RATE         12345678
 
 #endif
 
-#endif
+#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
index 18bdcdeb474f..0234fd9d20d6 100644
--- a/arch/arm/mach-at91/include/mach/uncompress.h
+++ b/arch/arm/mach-at91/include/mach/uncompress.h
@@ -24,8 +24,10 @@
 #include <linux/io.h>
 #include <linux/atmel_serial.h>
 
-#if defined(CONFIG_AT91_EARLY_DBGU)
-#define UART_OFFSET (AT91_DBGU + AT91_BASE_SYS)
+#if defined(CONFIG_AT91_EARLY_DBGU0)
+#define UART_OFFSET AT91_BASE_DBGU0
+#elif defined(CONFIG_AT91_EARLY_DBGU1)
+#define UART_OFFSET AT91_BASE_DBGU1
 #elif defined(CONFIG_AT91_EARLY_USART0)
 #define UART_OFFSET AT91_USART0
 #elif defined(CONFIG_AT91_EARLY_USART1)
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index 9665265ec757..be6b639ecd7b 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -33,17 +33,18 @@
 #include <asm/mach/irq.h>
 #include <asm/mach/map.h>
 
+void __iomem *at91_aic_base;
 
 static void at91_aic_mask_irq(struct irq_data *d)
 {
         /* Disable interrupt on AIC */
-        at91_sys_write(AT91_AIC_IDCR, 1 << d->irq);
+        at91_aic_write(AT91_AIC_IDCR, 1 << d->irq);
 }
 
 static void at91_aic_unmask_irq(struct irq_data *d)
 {
         /* Enable interrupt on AIC */
-        at91_sys_write(AT91_AIC_IECR, 1 << d->irq);
+        at91_aic_write(AT91_AIC_IECR, 1 << d->irq);
 }
 
 unsigned int at91_extern_irq;
@@ -77,8 +78,8 @@ static int at91_aic_set_type(struct irq_data *d, unsigned type)
                 return -EINVAL;
         }
 
-        smr = at91_sys_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE;
-        at91_sys_write(AT91_AIC_SMR(d->irq), smr | srctype);
+        smr = at91_aic_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE;
+        at91_aic_write(AT91_AIC_SMR(d->irq), smr | srctype);
         return 0;
 }
 
@@ -102,15 +103,15 @@ static int at91_aic_set_wake(struct irq_data *d, unsigned value)
 
 void at91_irq_suspend(void)
 {
-        backups = at91_sys_read(AT91_AIC_IMR);
-        at91_sys_write(AT91_AIC_IDCR, backups);
-        at91_sys_write(AT91_AIC_IECR, wakeups);
+        backups = at91_aic_read(AT91_AIC_IMR);
+        at91_aic_write(AT91_AIC_IDCR, backups);
+        at91_aic_write(AT91_AIC_IECR, wakeups);
 }
 
 void at91_irq_resume(void)
 {
-        at91_sys_write(AT91_AIC_IDCR, wakeups);
-        at91_sys_write(AT91_AIC_IECR, backups);
+        at91_aic_write(AT91_AIC_IDCR, wakeups);
+        at91_aic_write(AT91_AIC_IECR, backups);
 }
 
 #else
@@ -133,34 +134,39 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
 {
         unsigned int i;
 
+        at91_aic_base = ioremap(AT91_AIC, 512);
+
+        if (!at91_aic_base)
+                panic("Impossible to ioremap AT91_AIC\n");
+
         /*
          * The IVR is used by macro get_irqnr_and_base to read and verify.
          * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred.
          */
         for (i = 0; i < NR_AIC_IRQS; i++) {
                 /* Put irq number in Source Vector Register: */
-                at91_sys_write(AT91_AIC_SVR(i), i);
+                at91_aic_write(AT91_AIC_SVR(i), i);
                 /* Active Low interrupt, with the specified priority */
-                at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
+                at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
 
                 irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq);
                 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
 
                 /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
                 if (i < 8)
-                        at91_sys_write(AT91_AIC_EOICR, 0);
+                        at91_aic_write(AT91_AIC_EOICR, 0);
         }
 
         /*
          * Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS
          * When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU
          */
-        at91_sys_write(AT91_AIC_SPU, NR_AIC_IRQS);
+        at91_aic_write(AT91_AIC_SPU, NR_AIC_IRQS);
 
         /* No debugging in AIC: Debug (Protect) Control Register */
-        at91_sys_write(AT91_AIC_DCR, 0);
+        at91_aic_write(AT91_AIC_DCR, 0);
 
         /* Disable and clear all interrupts initially */
-        at91_sys_write(AT91_AIC_IDCR, 0xFFFFFFFF);
-        at91_sys_write(AT91_AIC_ICCR, 0xFFFFFFFF);
+        at91_aic_write(AT91_AIC_IDCR, 0xFFFFFFFF);
+        at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF);
 }
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 7046158109d7..62ad95556c36 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -34,7 +34,7 @@
 /*
  * Show the reason for the previous system reset.
  */
-#if defined(AT91_SHDWC)
+#if defined(AT91_RSTC)
 
 #include <mach/at91_rstc.h>
 #include <mach/at91_shdwc.h>
@@ -58,8 +58,11 @@ static void __init show_reset_status(void)
         char *reason, *r2 = reset;
         u32 reset_type, wake_type;
 
+        if (!at91_shdwc_base)
+                return;
+
         reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
-        wake_type = at91_sys_read(AT91_SHDW_SR);
+        wake_type = at91_shdwc_read(AT91_SHDW_SR);
 
         switch (reset_type) {
         case AT91_RSTC_RSTTYP_GENERAL:
@@ -215,7 +218,7 @@ static int at91_pm_enter(suspend_state_t state)
                                         | (1 << AT91_ID_FIQ)
                                         | (1 << AT91_ID_SYS)
                                         | (at91_extern_irq))
-                                & at91_sys_read(AT91_AIC_IMR),
+                                & at91_aic_read(AT91_AIC_IMR),
                         state);
 
         switch (state) {
@@ -283,7 +286,7 @@ static int at91_pm_enter(suspend_state_t state)
         }
 
         pr_debug("AT91: PM - wakeup %08x\n",
-                        at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR));
+                        at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR));
 
 error:
         target_state = PM_SUSPEND_ON;
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c
index 5eab6aa621d0..8294783b679d 100644
--- a/arch/arm/mach-at91/sam9_smc.c
+++ b/arch/arm/mach-at91/sam9_smc.c
@@ -10,38 +10,58 @@
 
 #include <linux/module.h>
 #include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
 
 #include <mach/at91sam9_smc.h>
 
 #include "sam9_smc.h"
 
-void __init sam9_smc_configure(int cs, struct sam9_smc_config* config)
+
+#define AT91_SMC_CS(id, n)      (smc_base_addr[id] + ((n) * 0x10))
+
+static void __iomem *smc_base_addr[2];
+
+static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_config* config)
 {
+
         /* Setup register */
-        at91_sys_write(AT91_SMC_SETUP(cs),
-                  AT91_SMC_NWESETUP_(config->nwe_setup)
-                | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup)
-                | AT91_SMC_NRDSETUP_(config->nrd_setup)
-                | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup)
-        );
+        __raw_writel(AT91_SMC_NWESETUP_(config->nwe_setup)
+                   | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup)
+                   | AT91_SMC_NRDSETUP_(config->nrd_setup)
+                   | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup),
+                   base + AT91_SMC_SETUP);
 
         /* Pulse register */
-        at91_sys_write(AT91_SMC_PULSE(cs),
-                  AT91_SMC_NWEPULSE_(config->nwe_pulse)
-                | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse)
-                | AT91_SMC_NRDPULSE_(config->nrd_pulse)
-                | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse)
-        );
+        __raw_writel(AT91_SMC_NWEPULSE_(config->nwe_pulse)
+                   | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse)
+                   | AT91_SMC_NRDPULSE_(config->nrd_pulse)
+                   | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse),
+                   base + AT91_SMC_PULSE);
 
         /* Cycle register */
-        at91_sys_write(AT91_SMC_CYCLE(cs),
-                  AT91_SMC_NWECYCLE_(config->write_cycle)
-                | AT91_SMC_NRDCYCLE_(config->read_cycle)
-        );
+        __raw_writel(AT91_SMC_NWECYCLE_(config->write_cycle)
+                   | AT91_SMC_NRDCYCLE_(config->read_cycle),
+                   base + AT91_SMC_CYCLE);
 
         /* Mode register */
-        at91_sys_write(AT91_SMC_MODE(cs),
-                  config->mode
-                | AT91_SMC_TDF_(config->tdf_cycles)
-        );
+        __raw_writel(config->mode
+                   | AT91_SMC_TDF_(config->tdf_cycles),
+                   base + AT91_SMC_MODE);
+}
+
+void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config)
+{
+        sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config);
+}
+
+void __init at91sam9_ioremap_smc(int id, u32 addr)
+{
+        if (id > 1) {
+                pr_warn("%s: id > 2\n", __func__);
+                return;
+        }
+        smc_base_addr[id] = ioremap(addr, 512);
+        if (!smc_base_addr[id])
+                pr_warn("Impossible to ioremap smc.%d 0x%x\n", id, addr);
 }
diff --git a/arch/arm/mach-at91/sam9_smc.h b/arch/arm/mach-at91/sam9_smc.h
index bf72cfb3455b..039c5ce17aec 100644
--- a/arch/arm/mach-at91/sam9_smc.h
+++ b/arch/arm/mach-at91/sam9_smc.h
@@ -30,4 +30,5 @@ struct sam9_smc_config {
         u8 tdf_cycles:4;
 };
 
-extern void __init sam9_smc_configure(int cs, struct sam9_smc_config* config);
+extern void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config);
+extern void __init at91sam9_ioremap_smc(int id, u32 addr);
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index cf98a8f94dc5..8bdcc3cb6012 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -8,6 +8,7 @@
 #include <linux/module.h>
 #include <linux/io.h>
 #include <linux/mm.h>
+#include <linux/pm.h>
 
 #include <asm/mach/map.h>
 
@@ -15,6 +16,7 @@
 #include <mach/cpu.h>
 #include <mach/at91_dbgu.h>
 #include <mach/at91_pmc.h>
+#include <mach/at91_shdwc.h>
 
 #include "soc.h"
 #include "generic.h"
@@ -73,9 +75,6 @@ static struct map_desc at91_io_desc __initdata = {
         .type           = MT_DEVICE,
 };
 
-#define AT91_DBGU0      0xfffff200
-#define AT91_DBGU1      0xffffee00
-
 static void __init soc_detect(u32 dbgu_base)
 {
         u32 cidr, socid;
@@ -248,9 +247,9 @@ void __init at91_map_io(void)
         at91_soc_initdata.type = AT91_SOC_NONE;
         at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
 
-        soc_detect(AT91_DBGU0);
+        soc_detect(AT91_BASE_DBGU0);
         if (!at91_soc_is_detected())
-                soc_detect(AT91_DBGU1);
+                soc_detect(AT91_BASE_DBGU1);
 
         if (!at91_soc_is_detected())
                 panic("AT91: Impossible to detect the SOC type");
@@ -267,8 +266,25 @@ void __init at91_map_io(void)
                 at91_boot_soc.map_io();
 }
 
+void __iomem *at91_shdwc_base = NULL;
+
+static void at91sam9_poweroff(void)
+{
+        at91_shdwc_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
+}
+
+void __init at91_ioremap_shdwc(u32 base_addr)
+{
+        at91_shdwc_base = ioremap(base_addr, 16);
+        if (!at91_shdwc_base)
+                panic("Impossible to ioremap at91_shdwc_base\n");
+        pm_power_off = at91sam9_poweroff;
+}
+
 void __init at91_initialize(unsigned long main_clock)
 {
+        at91_boot_soc.ioremap_registers();
+
         /* Init clock subsystem */
         at91_clock_init(main_clock);
 
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index 21ed8816e6f7..4588ae6f7acd 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -7,6 +7,7 @@
 struct at91_init_soc {
         unsigned int *default_irq_priority;
         void (*map_io)(void);
+        void (*ioremap_registers)(void);
         void (*register_clocks)(void);
         void (*init)(void);
 };
diff --git a/arch/arm/mach-bcmring/arch.c b/arch/arm/mach-bcmring/arch.c
index 31a143592c81..9e5e7552498c 100644
--- a/arch/arm/mach-bcmring/arch.c
+++ b/arch/arm/mach-bcmring/arch.c
@@ -49,7 +49,29 @@ HW_DECLARE_SPINLOCK(gpio)
 #endif
 
 /* sysctl */
-int bcmring_arch_warm_reboot;   /* do a warm reboot on hard reset */
+static int bcmring_arch_warm_reboot;    /* do a warm reboot on hard reset */
+
+static void bcmring_restart(char mode, const char *cmd)
+{
+        printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot);
+
+        if (mode == 'h') {
+                /* Reboot configured in proc entry */
+                if (bcmring_arch_warm_reboot) {
+                        printk("warm reset\n");
+                        /* Issue Warm reset (do not reset ethernet switch, keep alive) */
+                        chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_WARM);
+                } else {
+                        /* Force reset of everything */
+                        printk("force reset\n");
+                        chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
+                }
+        } else {
+                /* Force reset of everything */
+                printk("force reset\n");
+                chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
+        }
+}
 
 static struct ctl_table_header *bcmring_sysctl_header;
 
@@ -173,4 +195,5 @@ MACHINE_START(BCMRING, "BCMRING")
         .init_irq = bcmring_init_irq,
         .timer = &bcmring_timer,
         .init_machine = bcmring_init_machine
+        .restart = bcmring_restart,
 MACHINE_END
diff --git a/arch/arm/mach-bcmring/include/mach/system.h b/arch/arm/mach-bcmring/include/mach/system.h
index 38b37060d426..cb78250db649 100644
--- a/arch/arm/mach-bcmring/include/mach/system.h
+++ b/arch/arm/mach-bcmring/include/mach/system.h
@@ -20,35 +20,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <mach/csp/chipcHw_inline.h>
-
-extern int bcmring_arch_warm_reboot;
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot);
-
-        if (mode == 'h') {
-                /* Reboot configured in proc entry */
-                if (bcmring_arch_warm_reboot) {
-                        printk("warm reset\n");
-                        /* Issue Warm reset (do not reset ethernet switch, keep alive) */
-                        chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_WARM);
-                } else {
-                        /* Force reset of everything */
-                        printk("force reset\n");
-                        chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
-                }
-        } else {
-                /* Force reset of everything */
-                printk("force reset\n");
-                chipcHw_reset(chipcHw_REG_SOFT_RESET_CHIP_SOFT);
-        }
-}
-
 #endif
diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c
index 0276091b7f86..3fb79a1d0bde 100644
--- a/arch/arm/mach-clps711x/autcpu12.c
+++ b/arch/arm/mach-clps711x/autcpu12.c
@@ -68,5 +68,6 @@ MACHINE_START(AUTCPU12, "autronix autcpu12")
         .map_io         = autcpu12_map_io,
         .init_irq       = clps711x_init_irq,
         .timer          = &clps711x_timer,
+        .restart        = clps711x_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-clps711x/cdb89712.c b/arch/arm/mach-clps711x/cdb89712.c
index 25b3bfd0e85a..c314f49d6ef6 100644
--- a/arch/arm/mach-clps711x/cdb89712.c
+++ b/arch/arm/mach-clps711x/cdb89712.c
@@ -59,4 +59,5 @@ MACHINE_START(CDB89712, "Cirrus-CDB89712")
         .map_io         = cdb89712_map_io,
         .init_irq       = clps711x_init_irq,
         .timer          = &clps711x_timer,
+        .restart        = clps711x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-clps711x/ceiva.c b/arch/arm/mach-clps711x/ceiva.c
index 1df9ec67aa92..a70147e347ac 100644
--- a/arch/arm/mach-clps711x/ceiva.c
+++ b/arch/arm/mach-clps711x/ceiva.c
@@ -60,4 +60,5 @@ MACHINE_START(CEIVA, "CEIVA/Polaroid Photo MAX Digital Picture Frame")
         .map_io         = ceiva_map_io,
         .init_irq       = clps711x_init_irq,
         .timer          = &clps711x_timer,
+        .restart        = clps711x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-clps711x/clep7312.c b/arch/arm/mach-clps711x/clep7312.c
index 80496c09ac59..dbc7842639dc 100644
--- a/arch/arm/mach-clps711x/clep7312.c
+++ b/arch/arm/mach-clps711x/clep7312.c
@@ -41,5 +41,6 @@ MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312")
         .map_io         = clps711x_map_io,
         .init_irq       = clps711x_init_irq,
         .timer          = &clps711x_timer,
+        .restart        = clps711x_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c
index ced2a4e406f4..ab1711b9b4d6 100644
--- a/arch/arm/mach-clps711x/common.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -220,3 +220,8 @@ struct sys_timer clps711x_timer = {
         .init           = clps711x_timer_init,
         .offset         = clps711x_gettimeoffset,
 };
+
+void clps711x_restart(char mode, const char *cmd)
+{
+        soft_restart(0);
+}
diff --git a/arch/arm/mach-clps711x/common.h b/arch/arm/mach-clps711x/common.h
index 2b8b801f1dc3..fc0f0650dcb5 100644
--- a/arch/arm/mach-clps711x/common.h
+++ b/arch/arm/mach-clps711x/common.h
@@ -9,3 +9,4 @@ struct sys_timer;
 extern void clps711x_map_io(void);
 extern void clps711x_init_irq(void);
 extern struct sys_timer clps711x_timer;
+extern void clps711x_restart(char mode, const char *cmd);
diff --git a/arch/arm/mach-clps711x/edb7211-arch.c b/arch/arm/mach-clps711x/edb7211-arch.c
index 9721f6111dc0..5fad0b4f40ad 100644
--- a/arch/arm/mach-clps711x/edb7211-arch.c
+++ b/arch/arm/mach-clps711x/edb7211-arch.c
@@ -62,4 +62,5 @@ MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
         .reserve        = edb7211_reserve,
         .init_irq       = clps711x_init_irq,
         .timer          = &clps711x_timer,
+        .restart        = clps711x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-clps711x/fortunet.c b/arch/arm/mach-clps711x/fortunet.c
index d99256687298..3a3f0b702cb4 100644
--- a/arch/arm/mach-clps711x/fortunet.c
+++ b/arch/arm/mach-clps711x/fortunet.c
@@ -78,4 +78,5 @@ MACHINE_START(FORTUNET, "ARM-FortuNet")
         .map_io         = clps711x_map_io,
         .init_irq       = clps711x_init_irq,
         .timer          = &clps711x_timer,
+        .restart        = clps711x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-clps711x/include/mach/system.h b/arch/arm/mach-clps711x/include/mach/system.h
index 6c119937d398..23d6ef8c84da 100644
--- a/arch/arm/mach-clps711x/include/mach/system.h
+++ b/arch/arm/mach-clps711x/include/mach/system.h
@@ -32,9 +32,4 @@ static inline void arch_idle(void)
         mov     r0, r0");
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        soft_restart(0);
-}
-
 #endif
diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c
index 6ecea95f38b2..42ee8f33eafb 100644
--- a/arch/arm/mach-clps711x/p720t.c
+++ b/arch/arm/mach-clps711x/p720t.c
@@ -93,6 +93,7 @@ MACHINE_START(P720T, "ARM-Prospector720T")
         .map_io         = p720t_map_io,
         .init_irq       = clps711x_init_irq,
         .timer          = &clps711x_timer,
+        .restart        = clps711x_restart,
 MACHINE_END
 
 static int p720t_hw_init(void)
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c
index 594852fe24cc..2c5fb4c7e509 100644
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
@@ -204,4 +204,5 @@ MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")
         .timer          = &cns3xxx_timer,
         .handle_irq     = gic_handle_irq,
         .init_machine   = cns3420_init,
+        .restart        = cns3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-cns3xxx/core.h b/arch/arm/mach-cns3xxx/core.h
index fcd225343c61..4894b8c17151 100644
--- a/arch/arm/mach-cns3xxx/core.h
+++ b/arch/arm/mach-cns3xxx/core.h
@@ -22,5 +22,6 @@ static inline void cns3xxx_l2x0_init(void) {}
 void __init cns3xxx_map_io(void);
 void __init cns3xxx_init_irq(void);
 void cns3xxx_power_off(void);
+void cns3xxx_restart(char, const char *);
 
 #endif /* __CNS3XXX_CORE_H */
diff --git a/arch/arm/mach-cns3xxx/include/mach/system.h b/arch/arm/mach-cns3xxx/include/mach/system.h
index 4f16c9b79f78..9e56b7dc133a 100644
--- a/arch/arm/mach-cns3xxx/include/mach/system.h
+++ b/arch/arm/mach-cns3xxx/include/mach/system.h
@@ -11,7 +11,6 @@
 #ifndef __MACH_SYSTEM_H
 #define __MACH_SYSTEM_H
 
-#include <linux/io.h>
 #include <asm/proc-fns.h>
 
 static inline void arch_idle(void)
@@ -23,6 +22,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-void arch_reset(char mode, const char *cmd);
-
 #endif
diff --git a/arch/arm/mach-cns3xxx/pm.c b/arch/arm/mach-cns3xxx/pm.c
index 0c04678615ce..36458080332a 100644
--- a/arch/arm/mach-cns3xxx/pm.c
+++ b/arch/arm/mach-cns3xxx/pm.c
@@ -11,9 +11,9 @@
 #include <linux/io.h>
 #include <linux/delay.h>
 #include <linux/atomic.h>
-#include <mach/system.h>
 #include <mach/cns3xxx.h>
 #include <mach/pm.h>
+#include "core.h"
 
 void cns3xxx_pwr_clk_en(unsigned int block)
 {
@@ -89,7 +89,7 @@ void cns3xxx_pwr_soft_rst(unsigned int block)
 }
 EXPORT_SYMBOL(cns3xxx_pwr_soft_rst);
 
-void arch_reset(char mode, const char *cmd)
+void cns3xxx_restart(char mode, const char *cmd)
 {
         /*
          * To reset, we hit the on-board reset register
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 11c3db985285..dc1afe5be20c 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -682,4 +682,5 @@ MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
         .timer          = &davinci_timer,
         .init_machine   = da830_evm_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = da8xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 6659a90dbcad..f8a682f60a42 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1411,4 +1411,5 @@ MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
         .timer          = &davinci_timer,
         .init_machine   = da850_evm_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = da8xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index 4e0e707c313d..275341f159fb 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -357,4 +357,5 @@ MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
         .timer        = &davinci_timer,
         .init_machine = dm355_evm_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = davinci_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index ff2d2413279a..e99db28181ae 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -276,4 +276,5 @@ MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard")
         .timer        = &davinci_timer,
         .init_machine = dm355_leopard_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = davinci_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 46e1f4173b97..346e1de2f5a8 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -618,5 +618,6 @@ MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")
         .timer          = &davinci_timer,
         .init_machine   = dm365_evm_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = davinci_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 0cf8abf78d33..a64b49cfedca 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -719,4 +719,5 @@ MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
         .timer        = &davinci_timer,
         .init_machine = davinci_evm_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = davinci_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 635bf7740157..64017558860b 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -799,6 +799,7 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
         .timer        = &davinci_timer,
         .init_machine = evm_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = davinci_restart,
 MACHINE_END
 
 MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
@@ -808,5 +809,6 @@ MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
         .timer        = &davinci_timer,
         .init_machine = evm_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = davinci_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index 3cfff555e8f2..672d820e2aa4 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -573,4 +573,5 @@ MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808")
         .timer          = &davinci_timer,
         .init_machine   = mityomapl138_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = da8xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index e5f231aefee4..6c4a16415d47 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -278,4 +278,5 @@ MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
         .timer          = &davinci_timer,
         .init_machine = davinci_ntosd2_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = davinci_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index c6701e4a795c..e7c0c7c53493 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -344,4 +344,5 @@ MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
         .timer          = &davinci_timer,
         .init_machine   = omapl138_hawk_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = da8xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index 5dd4da9d2308..0b136a831c59 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -157,4 +157,5 @@ MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
         .timer        = &davinci_timer,
         .init_machine = davinci_sffsdr_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = davinci_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/board-tnetv107x-evm.c b/arch/arm/mach-davinci/board-tnetv107x-evm.c
index f69e40a29e02..5f14e30b00d8 100644
--- a/arch/arm/mach-davinci/board-tnetv107x-evm.c
+++ b/arch/arm/mach-davinci/board-tnetv107x-evm.c
@@ -283,4 +283,5 @@ MACHINE_START(TNETV107X, "TNETV107X EVM")
         .timer          = &davinci_timer,
         .init_machine   = tnetv107x_evm_board_init,
         .dma_zone_size  = SZ_128M,
+        .restart        = tnetv107x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c
index 865ffe5899ac..cb9b2e47510c 100644
--- a/arch/arm/mach-davinci/common.c
+++ b/arch/arm/mach-davinci/common.c
@@ -97,9 +97,6 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info)
         local_flush_tlb_all();
         flush_cache_all();
 
-        if (!davinci_soc_info.reset)
-                davinci_soc_info.reset = davinci_watchdog_reset;
-
         /*
          * We want to check CPU revision early for cpu_is_xxxx() macros.
          * IO space mapping must be initialized before we can do that.
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index a6bf5dcaef13..deee5c2da754 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -1201,7 +1201,6 @@ static struct davinci_soc_info davinci_soc_info_da830 = {
         .gpio_irq               = IRQ_DA8XX_GPIO0,
         .serial_dev             = &da8xx_serial_device,
         .emac_pdata             = &da8xx_emac_pdata,
-        .reset_device           = &da8xx_wdt_device,
 };
 
 void __init da830_init(void)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index b047f8702278..0ed7fdb64efb 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -1121,7 +1121,6 @@ static struct davinci_soc_info davinci_soc_info_da850 = {
         .emac_pdata             = &da8xx_emac_pdata,
         .sram_dma               = DA8XX_ARM_RAM_BASE,
         .sram_len               = SZ_8K,
-        .reset_device           = &da8xx_wdt_device,
 };
 
 void __init da850_init(void)
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 68def7188868..42dbf3dc11ab 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -363,6 +363,11 @@ struct platform_device da8xx_wdt_device = {
         .resource       = da8xx_watchdog_resources,
 };
 
+void da8xx_restart(char mode, const char *cmd)
+{
+        davinci_watchdog_reset(&da8xx_wdt_device);
+}
+
 int __init da8xx_register_watchdog(void)
 {
         return platform_device_register(&da8xx_wdt_device);
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 806a2f02b980..50c0156b4262 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -291,6 +291,11 @@ struct platform_device davinci_wdt_device = {
         .resource       = wdt_resources,
 };
 
+void davinci_restart(char mode, const char *cmd)
+{
+        davinci_watchdog_reset(&davinci_wdt_device);
+}
+
 static void davinci_init_wdt(void)
 {
         platform_device_register(&davinci_wdt_device);
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index fe520d4167a2..19667cfc5de0 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -853,7 +853,6 @@ static struct davinci_soc_info davinci_soc_info_dm355 = {
         .serial_dev             = &dm355_serial_device,
         .sram_dma               = 0x00010000,
         .sram_len               = SZ_32K,
-        .reset_device           = &davinci_wdt_device,
 };
 
 void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata)
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 679e168dce34..f15b435cc655 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1083,7 +1083,6 @@ static struct davinci_soc_info davinci_soc_info_dm365 = {
         .emac_pdata             = &dm365_emac_pdata,
         .sram_dma               = 0x00010000,
         .sram_len               = SZ_32K,
-        .reset_device           = &davinci_wdt_device,
 };
 
 void __init dm365_init_asp(struct snd_platform_data *pdata)
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 3470983aa343..0800f9cf33bb 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -767,7 +767,6 @@ static struct davinci_soc_info davinci_soc_info_dm644x = {
         .emac_pdata             = &dm644x_emac_pdata,
         .sram_dma               = 0x00008000,
         .sram_len               = SZ_16K,
-        .reset_device           = &davinci_wdt_device,
 };
 
 void __init dm644x_init_asp(struct snd_platform_data *pdata)
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index af27c130595f..00f774394b16 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -854,7 +854,6 @@ static struct davinci_soc_info davinci_soc_info_dm646x = {
         .emac_pdata             = &dm646x_emac_pdata,
         .sram_dma               = 0x10010000,
         .sram_len               = SZ_32K,
-        .reset_device           = &davinci_wdt_device,
 };
 
 void __init dm646x_init_mcasp0(struct snd_platform_data *pdata)
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index a57cba21e21e..5cd39a4e0c96 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -77,14 +77,13 @@ struct davinci_soc_info {
         struct emac_platform_data       *emac_pdata;
         dma_addr_t                      sram_dma;
         unsigned                        sram_len;
-        struct platform_device          *reset_device;
-        void                            (*reset)(struct platform_device *);
 };
 
 extern struct davinci_soc_info davinci_soc_info;
 
 extern void davinci_common_init(struct davinci_soc_info *soc_info);
 extern void davinci_init_ide(void);
+void davinci_restart(char mode, const char *cmd);
 
 /* standard place to map on-chip SRAMs; they *may* support DMA */
 #define SRAM_VIRT       0xfffe0000
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index eaca7d8b9d68..ee3461d7ec1b 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -91,6 +91,7 @@ int da8xx_register_cpuidle(void);
 void __iomem * __init da8xx_get_mem_ctlr(void);
 int da850_register_pm(struct platform_device *pdev);
 int __init da850_register_sata(unsigned long refclkpn);
+void da8xx_restart(char mode, const char *cmd);
 
 extern struct platform_device da8xx_serial_device;
 extern struct emac_platform_data da8xx_emac_pdata;
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h
index 2a00fe5ac253..a8ee6c9f0bb0 100644
--- a/arch/arm/mach-davinci/include/mach/dm646x.h
+++ b/arch/arm/mach-davinci/include/mach/dm646x.h
@@ -16,6 +16,7 @@
 #include <linux/i2c.h>
 #include <linux/videodev2.h>
 #include <linux/davinci_emac.h>
+#include <media/davinci/vpif_types.h>
 
 #define DM646X_EMAC_BASE                (0x01C80000)
 #define DM646X_EMAC_MDIO_BASE           (DM646X_EMAC_BASE + 0x4000)
@@ -34,58 +35,6 @@ int __init dm646x_init_edma(struct edma_rsv_info *rsv);
 
 void dm646x_video_init(void);
 
-enum vpif_if_type {
-        VPIF_IF_BT656,
-        VPIF_IF_BT1120,
-        VPIF_IF_RAW_BAYER
-};
-
-struct vpif_interface {
-        enum vpif_if_type if_type;
-        unsigned hd_pol:1;
-        unsigned vd_pol:1;
-        unsigned fid_pol:1;
-};
-
-struct vpif_subdev_info {
-        const char *name;
-        struct i2c_board_info board_info;
-        u32 input;
-        u32 output;
-        unsigned can_route:1;
-        struct vpif_interface vpif_if;
-};
-
-struct vpif_display_config {
-        int (*set_clock)(int, int);
-        struct vpif_subdev_info *subdevinfo;
-        int subdev_count;
-        const char **output;
-        int output_count;
-        const char *card_name;
-};
-
-struct vpif_input {
-        struct v4l2_input input;
-        const char *subdev_name;
-};
-
-#define VPIF_CAPTURE_MAX_CHANNELS       2
-
-struct vpif_capture_chan_config {
-        const struct vpif_input *inputs;
-        int input_count;
-};
-
-struct vpif_capture_config {
-        int (*setup_input_channel_mode)(int);
-        int (*setup_input_path)(int, const char *);
-        struct vpif_capture_chan_config chan_config[VPIF_CAPTURE_MAX_CHANNELS];
-        struct vpif_subdev_info *subdev_info;
-        int subdev_count;
-        const char *card_name;
-};
-
 void dm646x_setup_vpif(struct vpif_display_config *,
                        struct vpif_capture_config *);
 
diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h
index e65629c20769..fcb7a015aba5 100644
--- a/arch/arm/mach-davinci/include/mach/system.h
+++ b/arch/arm/mach-davinci/include/mach/system.h
@@ -18,10 +18,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        if (davinci_soc_info.reset)
-                davinci_soc_info.reset(davinci_soc_info.reset_device);
-}
-
 #endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-davinci/include/mach/tnetv107x.h b/arch/arm/mach-davinci/include/mach/tnetv107x.h
index 89c1fdc63c0b..83e5926f3c46 100644
--- a/arch/arm/mach-davinci/include/mach/tnetv107x.h
+++ b/arch/arm/mach-davinci/include/mach/tnetv107x.h
@@ -54,6 +54,7 @@ extern struct platform_device tnetv107x_serial_device;
 extern void __init tnetv107x_init(void);
 extern void __init tnetv107x_devices_init(struct tnetv107x_device_info *);
 extern void __init tnetv107x_irq_init(void);
+void tnetv107x_restart(char mode, const char *cmd);
 
 #endif
 
diff --git a/arch/arm/mach-davinci/tnetv107x.c b/arch/arm/mach-davinci/tnetv107x.c
index 409bb869c7c7..dc1a209b9b66 100644
--- a/arch/arm/mach-davinci/tnetv107x.c
+++ b/arch/arm/mach-davinci/tnetv107x.c
@@ -730,6 +730,11 @@ static void tnetv107x_watchdog_reset(struct platform_device *pdev)
         __raw_writel(1, &regs->kick);
 }
 
+void tnetv107x_restart(char mode, const char *cmd)
+{
+        tnetv107x_watchdog_reset(&tnetv107x_wdt_device);
+}
+
 static struct davinci_soc_info tnetv107x_soc_info = {
         .io_desc                = io_desc,
         .io_desc_num            = ARRAY_SIZE(io_desc),
@@ -752,8 +757,6 @@ static struct davinci_soc_info tnetv107x_soc_info = {
         .gpio_num               = TNETV107X_N_GPIO,
         .timer_info             = &timer_info,
         .serial_dev             = &tnetv107x_serial_device,
-        .reset                  = tnetv107x_watchdog_reset,
-        .reset_device           = &tnetv107x_wdt_device,
 };
 
 void __init tnetv107x_init(void)
diff --git a/arch/arm/mach-dove/cm-a510.c b/arch/arm/mach-dove/cm-a510.c
index c8a406f7e946..792b4e2e24f1 100644
--- a/arch/arm/mach-dove/cm-a510.c
+++ b/arch/arm/mach-dove/cm-a510.c
@@ -93,4 +93,5 @@ MACHINE_START(CM_A510, "Compulab CM-A510 Board")
         .init_early     = dove_init_early,
         .init_irq       = dove_init_irq,
         .timer          = &dove_timer,
+        .restart        = dove_restart,
 MACHINE_END
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index a9e0dae86a26..13bb236cd0cd 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -292,3 +292,19 @@ void __init dove_init(void)
         dove_xor0_init();
         dove_xor1_init();
 }
+
+void dove_restart(char mode, const char *cmd)
+{
+        /*
+         * Enable soft reset to assert RSTOUTn.
+         */
+        writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
+
+        /*
+         * Assert soft reset.
+         */
+        writel(SOFT_RESET, SYSTEM_SOFT_RESET);
+
+        while (1)
+                ;
+}
diff --git a/arch/arm/mach-dove/common.h b/arch/arm/mach-dove/common.h
index 6a2046e44706..42027305c107 100644
--- a/arch/arm/mach-dove/common.h
+++ b/arch/arm/mach-dove/common.h
@@ -39,5 +39,6 @@ void dove_spi1_init(void);
 void dove_i2c_init(void);
 void dove_sdio0_init(void);
 void dove_sdio1_init(void);
+void dove_restart(char, const char *);
 
 #endif
diff --git a/arch/arm/mach-dove/dove-db-setup.c b/arch/arm/mach-dove/dove-db-setup.c
index 11ea34e4fc76..ea77ae430b2d 100644
--- a/arch/arm/mach-dove/dove-db-setup.c
+++ b/arch/arm/mach-dove/dove-db-setup.c
@@ -100,4 +100,5 @@ MACHINE_START(DOVE_DB, "Marvell DB-MV88AP510-BP Development Board")
         .init_early     = dove_init_early,
         .init_irq       = dove_init_irq,
         .timer          = &dove_timer,
+        .restart        = dove_restart,
 MACHINE_END
diff --git a/arch/arm/mach-dove/include/mach/system.h b/arch/arm/mach-dove/include/mach/system.h
index 356afda56853..3027954f6162 100644
--- a/arch/arm/mach-dove/include/mach/system.h
+++ b/arch/arm/mach-dove/include/mach/system.h
@@ -9,28 +9,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <mach/bridge-regs.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /*
-         * Enable soft reset to assert RSTOUTn.
-         */
-        writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
-
-        /*
-         * Assert soft reset.
-         */
-        writel(SOFT_RESET, SYSTEM_SOFT_RESET);
-
-        while (1)
-                ;
-}
-
-
 #endif
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index ce3ed244c4b0..294aad07f7a0 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -278,6 +278,11 @@ static int __init ebsa110_init(void)
 
 arch_initcall(ebsa110_init);
 
+static void ebsa110_restart(char mode, const char *cmd)
+{
+        soft_restart(0x80000000);
+}
+
 MACHINE_START(EBSA110, "EBSA110")
         /* Maintainer: Russell King */
         .atag_offset    = 0x400,
@@ -287,4 +292,5 @@ MACHINE_START(EBSA110, "EBSA110")
         .map_io         = ebsa110_map_io,
         .init_irq       = ebsa110_init_irq,
         .timer          = &ebsa110_timer,
+        .restart        = ebsa110_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ebsa110/include/mach/system.h b/arch/arm/mach-ebsa110/include/mach/system.h
index 0d5df72a03f6..2e4af65edb6f 100644
--- a/arch/arm/mach-ebsa110/include/mach/system.h
+++ b/arch/arm/mach-ebsa110/include/mach/system.h
@@ -34,6 +34,4 @@ static inline void arch_idle(void)
         asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
 }
 
-#define arch_reset(mode, cmd)   soft_restart(0x80000000)
-
 #endif
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
index d9b0ea2ba4d8..681e939407d4 100644
--- a/arch/arm/mach-ep93xx/adssphere.c
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -40,4 +40,5 @@ MACHINE_START(ADSSPHERE, "ADS Sphere board")
         .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = adssphere_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 2432a6b7dcac..24203f9a6796 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -906,3 +906,15 @@ void __init ep93xx_init_devices(void)
         platform_device_register(&ep93xx_ohci_device);
         platform_device_register(&ep93xx_leds);
 }
+
+void ep93xx_restart(char mode, const char *cmd)
+{
+        /*
+         * Set then clear the SWRST bit to initiate a software reset
+         */
+        ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
+        ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
+
+        while (1)
+                ;
+}
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c
index 9bbae0835f27..d115653edca3 100644
--- a/arch/arm/mach-ep93xx/edb93xx.c
+++ b/arch/arm/mach-ep93xx/edb93xx.c
@@ -254,6 +254,7 @@ MACHINE_START(EDB9301, "Cirrus Logic EDB9301 Evaluation Board")
         .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = edb93xx_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -266,6 +267,7 @@ MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
         .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = edb93xx_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -278,6 +280,7 @@ MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
         .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = edb93xx_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -290,6 +293,7 @@ MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")
         .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = edb93xx_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -302,6 +306,7 @@ MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board")
         .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = edb93xx_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -314,6 +319,7 @@ MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
         .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = edb93xx_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -326,6 +332,7 @@ MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
         .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = edb93xx_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -338,5 +345,6 @@ MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
         .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = edb93xx_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index 1dd32a7c5f15..af46970dc58e 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -40,4 +40,5 @@ MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
         .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = gesbc9312_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index 50660455b1d8..d4c934931f9d 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -66,4 +66,6 @@ void ep93xx_register_ac97(void);
 void ep93xx_init_devices(void);
 extern struct sys_timer ep93xx_timer;
 
+void ep93xx_restart(char, const char *);
+
 #endif
diff --git a/arch/arm/mach-ep93xx/include/mach/system.h b/arch/arm/mach-ep93xx/include/mach/system.h
index bdf6c4f1feef..b5bec7cb9b52 100644
--- a/arch/arm/mach-ep93xx/include/mach/system.h
+++ b/arch/arm/mach-ep93xx/include/mach/system.h
@@ -1,22 +1,7 @@
 /*
  * arch/arm/mach-ep93xx/include/mach/system.h
  */
-
-#include <mach/hardware.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /*
-         * Set then clear the SWRST bit to initiate a software reset
-         */
-        ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
-        ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
-
-        while (1)
-                ;
-}
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index a6dae6c2e3c1..7b98084f0c97 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -84,6 +84,7 @@ MACHINE_START(MICRO9, "Contec Micro9-High")
         .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = micro9_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -96,6 +97,7 @@ MACHINE_START(MICRO9M, "Contec Micro9-Mid")
         .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = micro9_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -108,6 +110,7 @@ MACHINE_START(MICRO9L, "Contec Micro9-Lite")
         .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = micro9_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
 
@@ -120,5 +123,6 @@ MACHINE_START(MICRO9S, "Contec Micro9-Slim")
         .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = micro9_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c
index 40121ba8e711..f4e553eca21c 100644
--- a/arch/arm/mach-ep93xx/simone.c
+++ b/arch/arm/mach-ep93xx/simone.c
@@ -84,4 +84,5 @@ MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board")
         .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = simone_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
index ec7c63ff01e2..fd846331ddff 100644
--- a/arch/arm/mach-ep93xx/snappercl15.c
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -181,4 +181,5 @@ MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
         .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = snappercl15_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index 760384e6407d..79f8ecf07a19 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -251,4 +251,5 @@ MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
         .handle_irq     = vic_handle_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = ts72xx_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ep93xx/vision_ep9307.c b/arch/arm/mach-ep93xx/vision_ep9307.c
index d96e4dbec6a8..03dd4012043e 100644
--- a/arch/arm/mach-ep93xx/vision_ep9307.c
+++ b/arch/arm/mach-ep93xx/vision_ep9307.c
@@ -361,4 +361,5 @@ MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
         .init_machine   = vision_init_machine,
+        .restart        = ep93xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 724ec0f3560d..b4bdf297e9fa 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -17,6 +17,8 @@ choice
 
 config ARCH_EXYNOS4
         bool "SAMSUNG EXYNOS4"
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
         help
           Samsung EXYNOS4 SoCs based systems
 
@@ -57,6 +59,11 @@ config EXYNOS4_MCT
         help
           Use MCT (Multi Core Timer) as kernel timers
 
+config EXYNOS4_DEV_DMA
+        bool
+        help
+          Compile in amba device definitions for DMA controller
+
 config EXYNOS4_DEV_AHCI
         bool
         help
@@ -177,6 +184,7 @@ config MACH_SMDKV310
         select SAMSUNG_DEV_BACKLIGHT
         select EXYNOS4_DEV_AHCI
         select SAMSUNG_DEV_KEYPAD
+        select EXYNOS4_DEV_DMA
         select EXYNOS4_DEV_PD
         select SAMSUNG_DEV_PWM
         select EXYNOS4_DEV_SYSMMU
@@ -197,6 +205,7 @@ config MACH_ARMLEX4210
         select S3C_DEV_HSMMC2
         select S3C_DEV_HSMMC3
         select EXYNOS4_DEV_AHCI
+        select EXYNOS4_DEV_DMA
         select EXYNOS4_DEV_SYSMMU
         select EXYNOS4_SETUP_SDHCI
         help
@@ -222,6 +231,7 @@ config MACH_UNIVERSAL_C210
         select S5P_DEV_MFC
         select S5P_DEV_ONENAND
         select S5P_DEV_TV
+        select EXYNOS4_DEV_DMA
         select EXYNOS4_DEV_PD
         select EXYNOS4_SETUP_FIMD0
         select EXYNOS4_SETUP_I2C1
@@ -255,6 +265,7 @@ config MACH_NURI
         select S5P_DEV_MFC
         select S5P_DEV_USB_EHCI
         select S5P_SETUP_MIPIPHY
+        select EXYNOS4_DEV_DMA
         select EXYNOS4_DEV_PD
         select EXYNOS4_SETUP_FIMC
         select EXYNOS4_SETUP_FIMD0
@@ -287,6 +298,7 @@ config MACH_ORIGEN
         select S5P_DEV_USB_EHCI
         select SAMSUNG_DEV_BACKLIGHT
         select SAMSUNG_DEV_PWM
+        select EXYNOS4_DEV_DMA
         select EXYNOS4_DEV_PD
         select EXYNOS4_SETUP_FIMD0
         select EXYNOS4_SETUP_SDHCI
@@ -327,6 +339,20 @@ config MACH_SMDK4412
           Machine support for Samsung SMDK4412
 endif
 
+comment "Flattened Device Tree based board for Exynos4 based SoC"
+
+config MACH_EXYNOS4_DT
+        bool "Samsung Exynos4 Machine using device tree"
+        select CPU_EXYNOS4210
+        select USE_OF
+        select ARM_AMBA
+        select HAVE_SAMSUNG_KEYPAD if INPUT_KEYBOARD
+        help
+          Machine support for Samsung Exynos4 machine with device tree enabled.
+          Select this if a fdt blob is available for the Exynos4 SoC based board.
+          Note: This is under development and not all peripherals can be supported
+          with this machine file.
+
 if ARCH_EXYNOS4
 
 comment "Configuration for HSMMC 8-bit bus width"
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 59069a35e40b..ca85a99c159d 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -10,15 +10,17 @@ obj-m				:=
 obj-n                           :=
 obj-                            :=
 
-# Core support for EXYNOS4 system
+# Core
 
-obj-$(CONFIG_ARCH_EXYNOS4)      += cpu.o init.o clock.o irq-combiner.o setup-i2c0.o
-obj-$(CONFIG_ARCH_EXYNOS4)      += irq-eint.o dma.o pmu.o
+obj-$(CONFIG_ARCH_EXYNOS4)      += common.o clock.o
 obj-$(CONFIG_CPU_EXYNOS4210)    += clock-exynos4210.o
 obj-$(CONFIG_SOC_EXYNOS4212)    += clock-exynos4212.o
+
 obj-$(CONFIG_PM)                += pm.o
 obj-$(CONFIG_CPU_IDLE)          += cpuidle.o
 
+obj-$(CONFIG_ARCH_EXYNOS4)      += pmu.o
+
 obj-$(CONFIG_SMP)               += platsmp.o headsmp.o
 
 obj-$(CONFIG_EXYNOS4_MCT)       += mct.o
@@ -37,6 +39,8 @@ obj-$(CONFIG_MACH_ORIGEN)		+= mach-origen.o
 obj-$(CONFIG_MACH_SMDK4212)             += mach-smdk4x12.o
 obj-$(CONFIG_MACH_SMDK4412)             += mach-smdk4x12.o
 
+obj-$(CONFIG_MACH_EXYNOS4_DT)           += mach-exynos4-dt.o
+
 # device support
 
 obj-$(CONFIG_ARCH_EXYNOS4)              += dev-audio.o
@@ -44,7 +48,9 @@ obj-$(CONFIG_EXYNOS4_DEV_AHCI)		+= dev-ahci.o
 obj-$(CONFIG_EXYNOS4_DEV_PD)            += dev-pd.o
 obj-$(CONFIG_EXYNOS4_DEV_SYSMMU)        += dev-sysmmu.o
 obj-$(CONFIG_EXYNOS4_DEV_DWMCI)         += dev-dwmci.o
+obj-$(CONFIG_EXYNOS4_DEV_DMA)           += dma.o
 
+obj-$(CONFIG_ARCH_EXYNOS4)              += setup-i2c0.o
 obj-$(CONFIG_EXYNOS4_SETUP_FIMC)        += setup-fimc.o
 obj-$(CONFIG_EXYNOS4_SETUP_FIMD0)       += setup-fimd0.o
 obj-$(CONFIG_EXYNOS4_SETUP_I2C1)        += setup-i2c1.o
@@ -55,6 +61,5 @@ obj-$(CONFIG_EXYNOS4_SETUP_I2C5)	+= setup-i2c5.o
 obj-$(CONFIG_EXYNOS4_SETUP_I2C6)        += setup-i2c6.o
 obj-$(CONFIG_EXYNOS4_SETUP_I2C7)        += setup-i2c7.o
 obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD)      += setup-keypad.o
-obj-$(CONFIG_EXYNOS4_SETUP_SDHCI)       += setup-sdhci.o
 obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO)  += setup-sdhci-gpio.o
 obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY)     += setup-usb-phy.o
diff --git a/arch/arm/mach-exynos/clock-exynos4210.c b/arch/arm/mach-exynos/clock-exynos4210.c
index b9d5ef670eb4..a5823a7f249e 100644
--- a/arch/arm/mach-exynos/clock-exynos4210.c
+++ b/arch/arm/mach-exynos/clock-exynos4210.c
@@ -23,7 +23,6 @@
 #include <plat/pll.h>
 #include <plat/s5p-clock.h>
 #include <plat/clock-clksrc.h>
-#include <plat/exynos4.h>
 #include <plat/pm.h>
 
 #include <mach/hardware.h>
@@ -31,6 +30,8 @@
 #include <mach/regs-clock.h>
 #include <mach/exynos4-clock.h>
 
+#include "common.h"
+
 static struct sleep_save exynos4210_clock_save[] = {
         SAVE_ITEM(S5P_CLKSRC_IMAGE),
         SAVE_ITEM(S5P_CLKSRC_LCD1),
diff --git a/arch/arm/mach-exynos/clock-exynos4212.c b/arch/arm/mach-exynos/clock-exynos4212.c
index 77d5decb34fd..26a668b0d101 100644
--- a/arch/arm/mach-exynos/clock-exynos4212.c
+++ b/arch/arm/mach-exynos/clock-exynos4212.c
@@ -23,7 +23,6 @@
 #include <plat/pll.h>
 #include <plat/s5p-clock.h>
 #include <plat/clock-clksrc.h>
-#include <plat/exynos4.h>
 #include <plat/pm.h>
 
 #include <mach/hardware.h>
@@ -31,6 +30,8 @@
 #include <mach/regs-clock.h>
 #include <mach/exynos4-clock.h>
 
+#include "common.h"
+
 static struct sleep_save exynos4212_clock_save[] = {
         SAVE_ITEM(S5P_CLKSRC_IMAGE),
         SAVE_ITEM(S5P_CLKDIV_IMAGE),
diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
index 2894f0adef5c..5d5250df33fd 100644
--- a/arch/arm/mach-exynos/clock.c
+++ b/arch/arm/mach-exynos/clock.c
@@ -21,7 +21,6 @@
 #include <plat/pll.h>
 #include <plat/s5p-clock.h>
 #include <plat/clock-clksrc.h>
-#include <plat/exynos4.h>
 #include <plat/pm.h>
 
 #include <mach/map.h>
@@ -29,6 +28,8 @@
 #include <mach/sysmmu.h>
 #include <mach/exynos4-clock.h>
 
+#include "common.h"
+
 static struct sleep_save exynos4_clock_save[] = {
         SAVE_ITEM(S5P_CLKDIV_LEFTBUS),
         SAVE_ITEM(S5P_CLKGATE_IP_LEFTBUS),
@@ -553,16 +554,6 @@ static struct clk init_clocks_off[] = {
                 .enable         = exynos4_clk_dac_ctrl,
                 .ctrlbit        = (1 << 0),
         }, {
-                .name           = "dma",
-                .devname        = "dma-pl330.0",
-                .enable         = exynos4_clk_ip_fsys_ctrl,
-                .ctrlbit        = (1 << 0),
-        }, {
-                .name           = "dma",
-                .devname        = "dma-pl330.1",
-                .enable         = exynos4_clk_ip_fsys_ctrl,
-                .ctrlbit        = (1 << 1),
-        }, {
                 .name           = "adc",
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 15),
@@ -778,6 +769,20 @@ static struct clk init_clocks[] = {
         }
 };
 
+static struct clk clk_pdma0 = {
+        .name           = "dma",
+        .devname        = "dma-pl330.0",
+        .enable         = exynos4_clk_ip_fsys_ctrl,
+        .ctrlbit        = (1 << 0),
+};
+
+static struct clk clk_pdma1 = {
+        .name           = "dma",
+        .devname        = "dma-pl330.1",
+        .enable         = exynos4_clk_ip_fsys_ctrl,
+        .ctrlbit        = (1 << 1),
+};
+
 struct clk *clkset_group_list[] = {
         [0] = &clk_ext_xtal_mux,
         [1] = &clk_xusbxti,
@@ -1009,46 +1014,6 @@ static struct clksrc_clk clk_dout_mmc4 = {
 
 static struct clksrc_clk clksrcs[] = {
         {
-                .clk    = {
-                        .name           = "uclk1",
-                        .devname        = "s5pv210-uart.0",
-                        .enable         = exynos4_clksrc_mask_peril0_ctrl,
-                        .ctrlbit        = (1 << 0),
-                },
-                .sources = &clkset_group,
-                .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 0, .size = 4 },
-                .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 0, .size = 4 },
-        }, {
-                .clk            = {
-                        .name           = "uclk1",
-                        .devname        = "s5pv210-uart.1",
-                        .enable         = exynos4_clksrc_mask_peril0_ctrl,
-                        .ctrlbit        = (1 << 4),
-                },
-                .sources = &clkset_group,
-                .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 4, .size = 4 },
-                .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 4, .size = 4 },
-        }, {
-                .clk            = {
-                        .name           = "uclk1",
-                        .devname        = "s5pv210-uart.2",
-                        .enable         = exynos4_clksrc_mask_peril0_ctrl,
-                        .ctrlbit        = (1 << 8),
-                },
-                .sources = &clkset_group,
-                .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 8, .size = 4 },
-                .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 8, .size = 4 },
-        }, {
-                .clk            = {
-                        .name           = "uclk1",
-                        .devname        = "s5pv210-uart.3",
-                        .enable         = exynos4_clksrc_mask_peril0_ctrl,
-                        .ctrlbit        = (1 << 12),
-                },
-                .sources = &clkset_group,
-                .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 12, .size = 4 },
-                .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 12, .size = 4 },
-        }, {
                 .clk            = {
                         .name           = "sclk_pwm",
                         .enable         = exynos4_clksrc_mask_peril0_ctrl,
@@ -1192,42 +1157,6 @@ static struct clksrc_clk clksrcs[] = {
                 .reg_div = { .reg = S5P_CLKDIV_MFC, .shift = 0, .size = 4 },
         }, {
                 .clk            = {
-                        .name           = "sclk_mmc",
-                        .devname        = "s3c-sdhci.0",
-                        .parent         = &clk_dout_mmc0.clk,
-                        .enable         = exynos4_clksrc_mask_fsys_ctrl,
-                        .ctrlbit        = (1 << 0),
-                },
-                .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 8, .size = 8 },
-        }, {
-                .clk            = {
-                        .name           = "sclk_mmc",
-                        .devname        = "s3c-sdhci.1",
-                        .parent         = &clk_dout_mmc1.clk,
-                        .enable         = exynos4_clksrc_mask_fsys_ctrl,
-                        .ctrlbit        = (1 << 4),
-                },
-                .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 24, .size = 8 },
-        }, {
-                .clk            = {
-                        .name           = "sclk_mmc",
-                        .devname        = "s3c-sdhci.2",
-                        .parent         = &clk_dout_mmc2.clk,
-                        .enable         = exynos4_clksrc_mask_fsys_ctrl,
-                        .ctrlbit        = (1 << 8),
-                },
-                .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 8, .size = 8 },
-        }, {
-                .clk            = {
-                        .name           = "sclk_mmc",
-                        .devname        = "s3c-sdhci.3",
-                        .parent         = &clk_dout_mmc3.clk,
-                        .enable         = exynos4_clksrc_mask_fsys_ctrl,
-                        .ctrlbit        = (1 << 12),
-                },
-                .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 24, .size = 8 },
-        }, {
-                .clk            = {
                         .name           = "sclk_dwmmc",
                         .parent         = &clk_dout_mmc4.clk,
                         .enable         = exynos4_clksrc_mask_fsys_ctrl,
@@ -1237,6 +1166,98 @@ static struct clksrc_clk clksrcs[] = {
         }
 };
 
+static struct clksrc_clk clk_sclk_uart0 = {
+        .clk    = {
+                .name           = "uclk1",
+                .devname        = "exynos4210-uart.0",
+                .enable         = exynos4_clksrc_mask_peril0_ctrl,
+                .ctrlbit        = (1 << 0),
+        },
+        .sources = &clkset_group,
+        .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 0, .size = 4 },
+        .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_uart1 = {
+        .clk            = {
+                .name           = "uclk1",
+                .devname        = "exynos4210-uart.1",
+                .enable         = exynos4_clksrc_mask_peril0_ctrl,
+                .ctrlbit        = (1 << 4),
+        },
+        .sources = &clkset_group,
+        .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 4, .size = 4 },
+        .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 4, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_uart2 = {
+        .clk            = {
+                .name           = "uclk1",
+                .devname        = "exynos4210-uart.2",
+                .enable         = exynos4_clksrc_mask_peril0_ctrl,
+                .ctrlbit        = (1 << 8),
+        },
+        .sources = &clkset_group,
+        .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 8, .size = 4 },
+        .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 8, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_uart3 = {
+        .clk            = {
+                .name           = "uclk1",
+                .devname        = "exynos4210-uart.3",
+                .enable         = exynos4_clksrc_mask_peril0_ctrl,
+                .ctrlbit        = (1 << 12),
+        },
+        .sources = &clkset_group,
+        .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 12, .size = 4 },
+        .reg_div = { .reg = S5P_CLKDIV_PERIL0, .shift = 12, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_mmc0 = {
+        .clk            = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.0",
+                .parent         = &clk_dout_mmc0.clk,
+                .enable         = exynos4_clksrc_mask_fsys_ctrl,
+                .ctrlbit        = (1 << 0),
+        },
+        .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 8, .size = 8 },
+};
+
+static struct clksrc_clk clk_sclk_mmc1 = {
+        .clk            = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.1",
+                .parent         = &clk_dout_mmc1.clk,
+                .enable         = exynos4_clksrc_mask_fsys_ctrl,
+                .ctrlbit        = (1 << 4),
+        },
+        .reg_div = { .reg = S5P_CLKDIV_FSYS1, .shift = 24, .size = 8 },
+};
+
+static struct clksrc_clk clk_sclk_mmc2 = {
+        .clk            = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.2",
+                .parent         = &clk_dout_mmc2.clk,
+                .enable         = exynos4_clksrc_mask_fsys_ctrl,
+                .ctrlbit        = (1 << 8),
+        },
+        .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 8, .size = 8 },
+};
+
+static struct clksrc_clk clk_sclk_mmc3 = {
+        .clk            = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.3",
+                .parent         = &clk_dout_mmc3.clk,
+                .enable         = exynos4_clksrc_mask_fsys_ctrl,
+                .ctrlbit        = (1 << 12),
+        },
+        .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 24, .size = 8 },
+};
+
 /* Clock initialization code */
 static struct clksrc_clk *sysclks[] = {
         &clk_mout_apll,
@@ -1271,6 +1292,35 @@ static struct clksrc_clk *sysclks[] = {
         &clk_mout_mfc1,
 };
 
+static struct clk *clk_cdev[] = {
+        &clk_pdma0,
+        &clk_pdma1,
+};
+
+static struct clksrc_clk *clksrc_cdev[] = {
+        &clk_sclk_uart0,
+        &clk_sclk_uart1,
+        &clk_sclk_uart2,
+        &clk_sclk_uart3,
+        &clk_sclk_mmc0,
+        &clk_sclk_mmc1,
+        &clk_sclk_mmc2,
+        &clk_sclk_mmc3,
+};
+
+static struct clk_lookup exynos4_clk_lookup[] = {
+        CLKDEV_INIT("exynos4210-uart.0", "clk_uart_baud0", &clk_sclk_uart0.clk),
+        CLKDEV_INIT("exynos4210-uart.1", "clk_uart_baud0", &clk_sclk_uart1.clk),
+        CLKDEV_INIT("exynos4210-uart.2", "clk_uart_baud0", &clk_sclk_uart2.clk),
+        CLKDEV_INIT("exynos4210-uart.3", "clk_uart_baud0", &clk_sclk_uart3.clk),
+        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
+        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
+        CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
+        CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk),
+        CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
+        CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
+};
+
 static int xtal_rate;
 
 static unsigned long exynos4_fout_apll_get_rate(struct clk *clk)
@@ -1478,11 +1528,19 @@ void __init exynos4_register_clocks(void)
         for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++)
                 s3c_register_clksrc(sclk_tv[ptr], 1);
 
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
+                s3c_register_clksrc(clksrc_cdev[ptr], 1);
+
         s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
         s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
 
+        s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
+        for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
+                s3c_disable_clocks(clk_cdev[ptr], 1);
+
         s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
         s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
+        clkdev_add_table(exynos4_clk_lookup, ARRAY_SIZE(exynos4_clk_lookup));
 
         register_syscore_ops(&exynos4_clock_syscore_ops);
         s3c24xx_register_clock(&dummy_apb_pclk);
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
new file mode 100644
index 000000000000..b4beb7e2b5b8
--- /dev/null
+++ b/arch/arm/mach-exynos/common.c
@@ -0,0 +1,698 @@
+/*
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Common Codes for EXYNOS
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/sysdev.h>
+#include <linux/gpio.h>
+#include <linux/sched.h>
+#include <linux/serial_core.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+
+#include <asm/proc-fns.h>
+#include <asm/exception.h>
+#include <asm/hardware/cache-l2x0.h>
+#include <asm/hardware/gic.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <mach/regs-irq.h>
+#include <mach/regs-pmu.h>
+#include <mach/regs-gpio.h>
+
+#include <plat/cpu.h>
+#include <plat/clock.h>
+#include <plat/devs.h>
+#include <plat/pm.h>
+#include <plat/sdhci.h>
+#include <plat/gpio-cfg.h>
+#include <plat/adc-core.h>
+#include <plat/fb-core.h>
+#include <plat/fimc-core.h>
+#include <plat/iic-core.h>
+#include <plat/tv-core.h>
+#include <plat/regs-serial.h>
+
+#include "common.h"
+
+static const char name_exynos4210[] = "EXYNOS4210";
+static const char name_exynos4212[] = "EXYNOS4212";
+static const char name_exynos4412[] = "EXYNOS4412";
+
+static struct cpu_table cpu_ids[] __initdata = {
+        {
+                .idcode         = EXYNOS4210_CPU_ID,
+                .idmask         = EXYNOS4_CPU_MASK,
+                .map_io         = exynos4_map_io,
+                .init_clocks    = exynos4_init_clocks,
+                .init_uarts     = exynos4_init_uarts,
+                .init           = exynos_init,
+                .name           = name_exynos4210,
+        }, {
+                .idcode         = EXYNOS4212_CPU_ID,
+                .idmask         = EXYNOS4_CPU_MASK,
+                .map_io         = exynos4_map_io,
+                .init_clocks    = exynos4_init_clocks,
+                .init_uarts     = exynos4_init_uarts,
+                .init           = exynos_init,
+                .name           = name_exynos4212,
+        }, {
+                .idcode         = EXYNOS4412_CPU_ID,
+                .idmask         = EXYNOS4_CPU_MASK,
+                .map_io         = exynos4_map_io,
+                .init_clocks    = exynos4_init_clocks,
+                .init_uarts     = exynos4_init_uarts,
+                .init           = exynos_init,
+                .name           = name_exynos4412,
+        },
+};
+
+/* Initial IO mappings */
+
+static struct map_desc exynos_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_CHIPID,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_CHIPID),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_SYS,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSCON),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_TIMER,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_TIMER),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_WATCHDOG,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_WATCHDOG),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_SROMC,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_SROMC),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_SYSTIMER,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSTIMER),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_PMU,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_PMU),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_COMBINER_BASE,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_COMBINER),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_GIC_CPU,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_GIC_CPU),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_GIC_DIST,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_GIC_DIST),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_UART,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_UART),
+                .length         = SZ_512K,
+                .type           = MT_DEVICE,
+        },
+};
+
+static struct map_desc exynos4_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_CMU,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_CMU),
+                .length         = SZ_128K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_COREPERI_BASE,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_COREPERI),
+                .length         = SZ_8K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_L2CC,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_L2CC),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_GPIO1,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_GPIO1),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_GPIO2,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_GPIO2),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_GPIO3,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_GPIO3),
+                .length         = SZ_256,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_DMC0,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_DMC0),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_USB_HSPHY,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_HSPHY),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+};
+
+static struct map_desc exynos4_iodesc0[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_SYSRAM,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSRAM0),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+};
+
+static struct map_desc exynos4_iodesc1[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_SYSRAM,
+                .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSRAM1),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+};
+
+static void exynos_idle(void)
+{
+        if (!need_resched())
+                cpu_do_idle();
+
+        local_irq_enable();
+}
+
+void exynos4_restart(char mode, const char *cmd)
+{
+        __raw_writel(0x1, S5P_SWRESET);
+}
+
+/*
+ * exynos_map_io
+ *
+ * register the standard cpu IO areas
+ */
+
+void __init exynos_init_io(struct map_desc *mach_desc, int size)
+{
+        /* initialize the io descriptors we need for initialization */
+        iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc));
+        if (mach_desc)
+                iotable_init(mach_desc, size);
+
+        /* detect cpu id and rev. */
+        s5p_init_cpu(S5P_VA_CHIPID);
+
+        s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+}
+
+void __init exynos4_map_io(void)
+{
+        iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
+
+        if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
+                iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0));
+        else
+                iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));
+
+        /* initialize device information early */
+        exynos4_default_sdhci0();
+        exynos4_default_sdhci1();
+        exynos4_default_sdhci2();
+        exynos4_default_sdhci3();
+
+        s3c_adc_setname("samsung-adc-v3");
+
+        s3c_fimc_setname(0, "exynos4-fimc");
+        s3c_fimc_setname(1, "exynos4-fimc");
+        s3c_fimc_setname(2, "exynos4-fimc");
+        s3c_fimc_setname(3, "exynos4-fimc");
+
+        /* The I2C bus controllers are directly compatible with s3c2440 */
+        s3c_i2c0_setname("s3c2440-i2c");
+        s3c_i2c1_setname("s3c2440-i2c");
+        s3c_i2c2_setname("s3c2440-i2c");
+
+        s5p_fb_setname(0, "exynos4-fb");
+        s5p_hdmi_setname("exynos4-hdmi");
+}
+
+void __init exynos4_init_clocks(int xtal)
+{
+        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
+        s3c24xx_register_baseclocks(xtal);
+        s5p_register_clocks(xtal);
+
+        if (soc_is_exynos4210())
+                exynos4210_register_clocks();
+        else if (soc_is_exynos4212() || soc_is_exynos4412())
+                exynos4212_register_clocks();
+
+        exynos4_register_clocks();
+        exynos4_setup_clocks();
+}
+
+#define COMBINER_ENABLE_SET     0x0
+#define COMBINER_ENABLE_CLEAR   0x4
+#define COMBINER_INT_STATUS     0xC
+
+static DEFINE_SPINLOCK(irq_controller_lock);
+
+struct combiner_chip_data {
+        unsigned int irq_offset;
+        unsigned int irq_mask;
+        void __iomem *base;
+};
+
+static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];
+
+static inline void __iomem *combiner_base(struct irq_data *data)
+{
+        struct combiner_chip_data *combiner_data =
+                irq_data_get_irq_chip_data(data);
+
+        return combiner_data->base;
+}
+
+static void combiner_mask_irq(struct irq_data *data)
+{
+        u32 mask = 1 << (data->irq % 32);
+
+        __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
+}
+
+static void combiner_unmask_irq(struct irq_data *data)
+{
+        u32 mask = 1 << (data->irq % 32);
+
+        __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET);
+}
+
+static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
+{
+        struct combiner_chip_data *chip_data = irq_get_handler_data(irq);
+        struct irq_chip *chip = irq_get_chip(irq);
+        unsigned int cascade_irq, combiner_irq;
+        unsigned long status;
+
+        chained_irq_enter(chip, desc);
+
+        spin_lock(&irq_controller_lock);
+        status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
+        spin_unlock(&irq_controller_lock);
+        status &= chip_data->irq_mask;
+
+        if (status == 0)
+                goto out;
+
+        combiner_irq = __ffs(status);
+
+        cascade_irq = combiner_irq + (chip_data->irq_offset & ~31);
+        if (unlikely(cascade_irq >= NR_IRQS))
+                do_bad_IRQ(cascade_irq, desc);
+        else
+                generic_handle_irq(cascade_irq);
+
+ out:
+        chained_irq_exit(chip, desc);
+}
+
+static struct irq_chip combiner_chip = {
+        .name           = "COMBINER",
+        .irq_mask       = combiner_mask_irq,
+        .irq_unmask     = combiner_unmask_irq,
+};
+
+static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
+{
+        if (combiner_nr >= MAX_COMBINER_NR)
+                BUG();
+        if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0)
+                BUG();
+        irq_set_chained_handler(irq, combiner_handle_cascade_irq);
+}
+
+static void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
+                          unsigned int irq_start)
+{
+        unsigned int i;
+
+        if (combiner_nr >= MAX_COMBINER_NR)
+                BUG();
+
+        combiner_data[combiner_nr].base = base;
+        combiner_data[combiner_nr].irq_offset = irq_start;
+        combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3);
+
+        /* Disable all interrupts */
+
+        __raw_writel(combiner_data[combiner_nr].irq_mask,
+                     base + COMBINER_ENABLE_CLEAR);
+
+        /* Setup the Linux IRQ subsystem */
+
+        for (i = irq_start; i < combiner_data[combiner_nr].irq_offset
+                                + MAX_IRQ_IN_COMBINER; i++) {
+                irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq);
+                irq_set_chip_data(i, &combiner_data[combiner_nr]);
+                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
+        }
+}
+
+#ifdef CONFIG_OF
+static const struct of_device_id exynos4_dt_irq_match[] = {
+        { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
+        {},
+};
+#endif
+
+void __init exynos4_init_irq(void)
+{
+        int irq;
+        unsigned int gic_bank_offset;
+
+        gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
+
+        if (!of_have_populated_dt())
+                gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset);
+#ifdef CONFIG_OF
+        else
+                of_irq_init(exynos4_dt_irq_match);
+#endif
+
+        for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
+
+                combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
+                                COMBINER_IRQ(irq, 0));
+                combiner_cascade_irq(irq, IRQ_SPI(irq));
+        }
+
+        /*
+         * The parameters of s5p_init_irq() are for VIC init.
+         * Theses parameters should be NULL and 0 because EXYNOS4
+         * uses GIC instead of VIC.
+         */
+        s5p_init_irq(NULL, 0);
+}
+
+struct sysdev_class exynos4_sysclass = {
+        .name   = "exynos4-core",
+};
+
+static struct sys_device exynos4_sysdev = {
+        .cls    = &exynos4_sysclass,
+};
+
+static int __init exynos4_core_init(void)
+{
+        return sysdev_class_register(&exynos4_sysclass);
+}
+core_initcall(exynos4_core_init);
+
+#ifdef CONFIG_CACHE_L2X0
+static int __init exynos4_l2x0_cache_init(void)
+{
+        /* TAG, Data Latency Control: 2cycle */
+        __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
+
+        if (soc_is_exynos4210())
+                __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
+        else if (soc_is_exynos4212() || soc_is_exynos4412())
+                __raw_writel(0x120, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
+
+        /* L2X0 Prefetch Control */
+        __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL);
+
+        /* L2X0 Power Control */
+        __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN,
+                     S5P_VA_L2CC + L2X0_POWER_CTRL);
+
+        l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff);
+
+        return 0;
+}
+
+early_initcall(exynos4_l2x0_cache_init);
+#endif
+
+int __init exynos_init(void)
+{
+        printk(KERN_INFO "EXYNOS: Initializing architecture\n");
+
+        /* set idle function */
+        pm_idle = exynos_idle;
+
+        return sysdev_register(&exynos4_sysdev);
+}
+
+/* uart registration process */
+
+void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        struct s3c2410_uartcfg *tcfg = cfg;
+        u32 ucnt;
+
+        for (ucnt = 0; ucnt < no; ucnt++, tcfg++)
+                tcfg->has_fracval = 1;
+
+        s3c24xx_init_uartdevs("exynos4210-uart", s5p_uart_resources, cfg, no);
+}
+
+static DEFINE_SPINLOCK(eint_lock);
+
+static unsigned int eint0_15_data[16];
+
+static unsigned int exynos4_get_irq_nr(unsigned int number)
+{
+        u32 ret = 0;
+
+        switch (number) {
+        case 0 ... 3:
+                ret = (number + IRQ_EINT0);
+                break;
+        case 4 ... 7:
+                ret = (number + (IRQ_EINT4 - 4));
+                break;
+        case 8 ... 15:
+                ret = (number + (IRQ_EINT8 - 8));
+                break;
+        default:
+                printk(KERN_ERR "number available : %d\n", number);
+        }
+
+        return ret;
+}
+
+static inline void exynos4_irq_eint_mask(struct irq_data *data)
+{
+        u32 mask;
+
+        spin_lock(&eint_lock);
+        mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
+        mask |= eint_irq_to_bit(data->irq);
+        __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
+        spin_unlock(&eint_lock);
+}
+
+static void exynos4_irq_eint_unmask(struct irq_data *data)
+{
+        u32 mask;
+
+        spin_lock(&eint_lock);
+        mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
+        mask &= ~(eint_irq_to_bit(data->irq));
+        __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
+        spin_unlock(&eint_lock);
+}
+
+static inline void exynos4_irq_eint_ack(struct irq_data *data)
+{
+        __raw_writel(eint_irq_to_bit(data->irq),
+                     S5P_EINT_PEND(EINT_REG_NR(data->irq)));
+}
+
+static void exynos4_irq_eint_maskack(struct irq_data *data)
+{
+        exynos4_irq_eint_mask(data);
+        exynos4_irq_eint_ack(data);
+}
+
+static int exynos4_irq_eint_set_type(struct irq_data *data, unsigned int type)
+{
+        int offs = EINT_OFFSET(data->irq);
+        int shift;
+        u32 ctrl, mask;
+        u32 newvalue = 0;
+
+        switch (type) {
+        case IRQ_TYPE_EDGE_RISING:
+                newvalue = S5P_IRQ_TYPE_EDGE_RISING;
+                break;
+
+        case IRQ_TYPE_EDGE_FALLING:
+                newvalue = S5P_IRQ_TYPE_EDGE_FALLING;
+                break;
+
+        case IRQ_TYPE_EDGE_BOTH:
+                newvalue = S5P_IRQ_TYPE_EDGE_BOTH;
+                break;
+
+        case IRQ_TYPE_LEVEL_LOW:
+                newvalue = S5P_IRQ_TYPE_LEVEL_LOW;
+                break;
+
+        case IRQ_TYPE_LEVEL_HIGH:
+                newvalue = S5P_IRQ_TYPE_LEVEL_HIGH;
+                break;
+
+        default:
+                printk(KERN_ERR "No such irq type %d", type);
+                return -EINVAL;
+        }
+
+        shift = (offs & 0x7) * 4;
+        mask = 0x7 << shift;
+
+        spin_lock(&eint_lock);
+        ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq)));
+        ctrl &= ~mask;
+        ctrl |= newvalue << shift;
+        __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq)));
+        spin_unlock(&eint_lock);
+
+        switch (offs) {
+        case 0 ... 7:
+                s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE);
+                break;
+        case 8 ... 15:
+                s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE);
+                break;
+        case 16 ... 23:
+                s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE);
+                break;
+        case 24 ... 31:
+                s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE);
+                break;
+        default:
+                printk(KERN_ERR "No such irq number %d", offs);
+        }
+
+        return 0;
+}
+
+static struct irq_chip exynos4_irq_eint = {
+        .name           = "exynos4-eint",
+        .irq_mask       = exynos4_irq_eint_mask,
+        .irq_unmask     = exynos4_irq_eint_unmask,
+        .irq_mask_ack   = exynos4_irq_eint_maskack,
+        .irq_ack        = exynos4_irq_eint_ack,
+        .irq_set_type   = exynos4_irq_eint_set_type,
+#ifdef CONFIG_PM
+        .irq_set_wake   = s3c_irqext_wake,
+#endif
+};
+
+/*
+ * exynos4_irq_demux_eint
+ *
+ * This function demuxes the IRQ from from EINTs 16 to 31.
+ * It is designed to be inlined into the specific handler
+ * s5p_irq_demux_eintX_Y.
+ *
+ * Each EINT pend/mask registers handle eight of them.
+ */
+static inline void exynos4_irq_demux_eint(unsigned int start)
+{
+        unsigned int irq;
+
+        u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start)));
+        u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start)));
+
+        status &= ~mask;
+        status &= 0xff;
+
+        while (status) {
+                irq = fls(status) - 1;
+                generic_handle_irq(irq + start);
+                status &= ~(1 << irq);
+        }
+}
+
+static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
+{
+        struct irq_chip *chip = irq_get_chip(irq);
+        chained_irq_enter(chip, desc);
+        exynos4_irq_demux_eint(IRQ_EINT(16));
+        exynos4_irq_demux_eint(IRQ_EINT(24));
+        chained_irq_exit(chip, desc);
+}
+
+static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
+{
+        u32 *irq_data = irq_get_handler_data(irq);
+        struct irq_chip *chip = irq_get_chip(irq);
+
+        chained_irq_enter(chip, desc);
+        chip->irq_mask(&desc->irq_data);
+
+        if (chip->irq_ack)
+                chip->irq_ack(&desc->irq_data);
+
+        generic_handle_irq(*irq_data);
+
+        chip->irq_unmask(&desc->irq_data);
+        chained_irq_exit(chip, desc);
+}
+
+int __init exynos4_init_irq_eint(void)
+{
+        int irq;
+
+        for (irq = 0 ; irq <= 31 ; irq++) {
+                irq_set_chip_and_handler(IRQ_EINT(irq), &exynos4_irq_eint,
+                                         handle_level_irq);
+                set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
+        }
+
+        irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31);
+
+        for (irq = 0 ; irq <= 15 ; irq++) {
+                eint0_15_data[irq] = IRQ_EINT(irq);
+
+                irq_set_handler_data(exynos4_get_irq_nr(irq),
+                                     &eint0_15_data[irq]);
+                irq_set_chained_handler(exynos4_get_irq_nr(irq),
+                                        exynos4_irq_eint0_15);
+        }
+
+        return 0;
+}
+arch_initcall(exynos4_init_irq_eint);
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
new file mode 100644
index 000000000000..1ac49de0f398
--- /dev/null
+++ b/arch/arm/mach-exynos/common.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Common Header for EXYNOS machines
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H
+#define __ARCH_ARM_MACH_EXYNOS_COMMON_H
+
+void exynos_init_io(struct map_desc *mach_desc, int size);
+void exynos4_init_irq(void);
+
+void exynos4_register_clocks(void);
+void exynos4_setup_clocks(void);
+
+void exynos4210_register_clocks(void);
+void exynos4212_register_clocks(void);
+
+void exynos4_restart(char mode, const char *cmd);
+
+extern struct sys_timer exynos4_timer;
+
+#ifdef CONFIG_ARCH_EXYNOS
+extern  int exynos_init(void);
+extern void exynos4_map_io(void);
+extern void exynos4_init_clocks(int xtal);
+extern void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+
+#else
+#define exynos4_init_clocks NULL
+#define exynos4_init_uarts NULL
+#define exynos4_map_io NULL
+#define exynos_init NULL
+#endif
+
+#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
diff --git a/arch/arm/mach-exynos/cpu.c b/arch/arm/mach-exynos/cpu.c
deleted file mode 100644
index 22316cb31a8c..000000000000
--- a/arch/arm/mach-exynos/cpu.c
+++ /dev/null
@@ -1,284 +0,0 @@
-/* linux/arch/arm/mach-exynos/cpu.c
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/sched.h>
-#include <linux/sysdev.h>
-
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include <asm/proc-fns.h>
-#include <asm/exception.h>
-#include <asm/hardware/cache-l2x0.h>
-#include <asm/hardware/gic.h>
-
-#include <plat/cpu.h>
-#include <plat/clock.h>
-#include <plat/devs.h>
-#include <plat/exynos4.h>
-#include <plat/adc-core.h>
-#include <plat/sdhci.h>
-#include <plat/fb-core.h>
-#include <plat/fimc-core.h>
-#include <plat/iic-core.h>
-#include <plat/reset.h>
-#include <plat/tv-core.h>
-
-#include <mach/regs-irq.h>
-#include <mach/regs-pmu.h>
-
-extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
-                         unsigned int irq_start);
-extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
-
-/* Initial IO mappings */
-static struct map_desc exynos_iodesc[] __initdata = {
-        {
-                .virtual        = (unsigned long)S5P_VA_SYSTIMER,
-                .pfn            = __phys_to_pfn(EXYNOS_PA_SYSTIMER),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_PMU,
-                .pfn            = __phys_to_pfn(EXYNOS_PA_PMU),
-                .length         = SZ_64K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_COMBINER_BASE,
-                .pfn            = __phys_to_pfn(EXYNOS_PA_COMBINER),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GIC_CPU,
-                .pfn            = __phys_to_pfn(EXYNOS_PA_GIC_CPU),
-                .length         = SZ_64K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GIC_DIST,
-                .pfn            = __phys_to_pfn(EXYNOS_PA_GIC_DIST),
-                .length         = SZ_64K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_UART,
-                .pfn            = __phys_to_pfn(S3C_PA_UART),
-                .length         = SZ_512K,
-                .type           = MT_DEVICE,
-        },
-};
-
-static struct map_desc exynos4_iodesc[] __initdata = {
-        {
-                .virtual        = (unsigned long)S5P_VA_CMU,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_CMU),
-                .length         = SZ_128K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_COREPERI_BASE,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_COREPERI),
-                .length         = SZ_8K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_L2CC,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_L2CC),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GPIO1,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_GPIO1),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GPIO2,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_GPIO2),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_GPIO3,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_GPIO3),
-                .length         = SZ_256,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_DMC0,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_DMC0),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_SROMC,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_SROMC),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_USB_HSPHY,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_HSPHY),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        },
-};
-
-static struct map_desc exynos4_iodesc0[] __initdata = {
-        {
-                .virtual        = (unsigned long)S5P_VA_SYSRAM,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSRAM0),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        },
-};
-
-static struct map_desc exynos4_iodesc1[] __initdata = {
-        {
-                .virtual        = (unsigned long)S5P_VA_SYSRAM,
-                .pfn            = __phys_to_pfn(EXYNOS4_PA_SYSRAM1),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        },
-};
-
-static void exynos_idle(void)
-{
-        if (!need_resched())
-                cpu_do_idle();
-
-        local_irq_enable();
-}
-
-static void exynos4_sw_reset(void)
-{
-        __raw_writel(0x1, S5P_SWRESET);
-}
-
-/*
- * exynos_map_io
- *
- * register the standard cpu IO areas
- */
-void __init exynos4_map_io(void)
-{
-        iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc));
-        iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
-
-        if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
-                iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0));
-        else
-                iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));
-
-        /* initialize device information early */
-        exynos4_default_sdhci0();
-        exynos4_default_sdhci1();
-        exynos4_default_sdhci2();
-        exynos4_default_sdhci3();
-
-        s3c_adc_setname("samsung-adc-v3");
-
-        s3c_fimc_setname(0, "exynos4-fimc");
-        s3c_fimc_setname(1, "exynos4-fimc");
-        s3c_fimc_setname(2, "exynos4-fimc");
-        s3c_fimc_setname(3, "exynos4-fimc");
-
-        /* The I2C bus controllers are directly compatible with s3c2440 */
-        s3c_i2c0_setname("s3c2440-i2c");
-        s3c_i2c1_setname("s3c2440-i2c");
-        s3c_i2c2_setname("s3c2440-i2c");
-
-        s5p_fb_setname(0, "exynos4-fb");
-        s5p_hdmi_setname("exynos4-hdmi");
-}
-
-void __init exynos4_init_clocks(int xtal)
-{
-        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
-
-        s3c24xx_register_baseclocks(xtal);
-        s5p_register_clocks(xtal);
-
-        if (soc_is_exynos4210())
-                exynos4210_register_clocks();
-        else if (soc_is_exynos4212() || soc_is_exynos4412())
-                exynos4212_register_clocks();
-
-        exynos4_register_clocks();
-        exynos4_setup_clocks();
-}
-
-void __init exynos4_init_irq(void)
-{
-        int irq;
-        unsigned int gic_bank_offset;
-
-        gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
-
-        gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset);
-
-        for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
-
-                combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
-                                COMBINER_IRQ(irq, 0));
-                combiner_cascade_irq(irq, IRQ_SPI(irq));
-        }
-
-        /* The parameters of s5p_init_irq() are for VIC init.
-         * Theses parameters should be NULL and 0 because EXYNOS4
-         * uses GIC instead of VIC.
-         */
-        s5p_init_irq(NULL, 0);
-}
-
-struct sysdev_class exynos4_sysclass = {
-        .name   = "exynos4-core",
-};
-
-static struct sys_device exynos4_sysdev = {
-        .cls    = &exynos4_sysclass,
-};
-
-static int __init exynos4_core_init(void)
-{
-        return sysdev_class_register(&exynos4_sysclass);
-}
-core_initcall(exynos4_core_init);
-
-#ifdef CONFIG_CACHE_L2X0
-static int __init exynos4_l2x0_cache_init(void)
-{
-        /* TAG, Data Latency Control: 2cycle */
-        __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
-
-        if (soc_is_exynos4210())
-                __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
-        else if (soc_is_exynos4212() || soc_is_exynos4412())
-                __raw_writel(0x120, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
-
-        /* L2X0 Prefetch Control */
-        __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL);
-
-        /* L2X0 Power Control */
-        __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN,
-                     S5P_VA_L2CC + L2X0_POWER_CTRL);
-
-        l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff);
-
-        return 0;
-}
-
-early_initcall(exynos4_l2x0_cache_init);
-#endif
-
-int __init exynos_init(void)
-{
-        printk(KERN_INFO "EXYNOS: Initializing architecture\n");
-
-        /* set idle function */
-        pm_idle = exynos_idle;
-
-        /* set sw_reset function */
-        if (soc_is_exynos4210() || soc_is_exynos4212() || soc_is_exynos4412())
-                s5p_reset_hook = exynos4_sw_reset;
-
-        return sysdev_register(&exynos4_sysdev);
-}
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index 9667c61e64fb..b10fcd270f07 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -24,6 +24,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/pl330.h>
+#include <linux/of.h>
 
 #include <asm/irq.h>
 #include <plat/devs.h>
@@ -35,95 +36,42 @@
 
 static u64 dma_dmamask = DMA_BIT_MASK(32);
 
-struct dma_pl330_peri pdma0_peri[28] = {
-        {
-                .peri_id = (u8)DMACH_PCM0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_PCM0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_PCM2_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_PCM2_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_MSM_REQ0,
-        }, {
-                .peri_id = (u8)DMACH_MSM_REQ2,
-        }, {
-                .peri_id = (u8)DMACH_SPI0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SPI0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SPI2_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SPI2_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S0S_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_I2S0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART2_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART2_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART4_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART4_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SLIMBUS0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SLIMBUS0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SLIMBUS2_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SLIMBUS2_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SLIMBUS4_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SLIMBUS4_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_AC97_MICIN,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_AC97_PCMIN,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_AC97_PCMOUT,
-                .rqtype = MEMTODEV,
-        },
+u8 pdma0_peri[] = {
+        DMACH_PCM0_RX,
+        DMACH_PCM0_TX,
+        DMACH_PCM2_RX,
+        DMACH_PCM2_TX,
+        DMACH_MSM_REQ0,
+        DMACH_MSM_REQ2,
+        DMACH_SPI0_RX,
+        DMACH_SPI0_TX,
+        DMACH_SPI2_RX,
+        DMACH_SPI2_TX,
+        DMACH_I2S0S_TX,
+        DMACH_I2S0_RX,
+        DMACH_I2S0_TX,
+        DMACH_I2S2_RX,
+        DMACH_I2S2_TX,
+        DMACH_UART0_RX,
+        DMACH_UART0_TX,
+        DMACH_UART2_RX,
+        DMACH_UART2_TX,
+        DMACH_UART4_RX,
+        DMACH_UART4_TX,
+        DMACH_SLIMBUS0_RX,
+        DMACH_SLIMBUS0_TX,
+        DMACH_SLIMBUS2_RX,
+        DMACH_SLIMBUS2_TX,
+        DMACH_SLIMBUS4_RX,
+        DMACH_SLIMBUS4_TX,
+        DMACH_AC97_MICIN,
+        DMACH_AC97_PCMIN,
+        DMACH_AC97_PCMOUT,
 };
 
 struct dma_pl330_platdata exynos4_pdma0_pdata = {
         .nr_valid_peri = ARRAY_SIZE(pdma0_peri),
-        .peri = pdma0_peri,
+        .peri_id = pdma0_peri,
 };
 
 struct amba_device exynos4_device_pdma0 = {
@@ -142,86 +90,37 @@ struct amba_device exynos4_device_pdma0 = {
         .periphid = 0x00041330,
 };
 
-struct dma_pl330_peri pdma1_peri[25] = {
-        {
-                .peri_id = (u8)DMACH_PCM0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_PCM0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_PCM1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_PCM1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_MSM_REQ1,
-        }, {
-                .peri_id = (u8)DMACH_MSM_REQ3,
-        }, {
-                .peri_id = (u8)DMACH_SPI1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SPI1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S0S_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_I2S0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_I2S1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART3_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART3_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SLIMBUS1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SLIMBUS1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SLIMBUS3_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SLIMBUS3_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SLIMBUS5_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SLIMBUS5_TX,
-                .rqtype = MEMTODEV,
-        },
+u8 pdma1_peri[] = {
+        DMACH_PCM0_RX,
+        DMACH_PCM0_TX,
+        DMACH_PCM1_RX,
+        DMACH_PCM1_TX,
+        DMACH_MSM_REQ1,
+        DMACH_MSM_REQ3,
+        DMACH_SPI1_RX,
+        DMACH_SPI1_TX,
+        DMACH_I2S0S_TX,
+        DMACH_I2S0_RX,
+        DMACH_I2S0_TX,
+        DMACH_I2S1_RX,
+        DMACH_I2S1_TX,
+        DMACH_UART0_RX,
+        DMACH_UART0_TX,
+        DMACH_UART1_RX,
+        DMACH_UART1_TX,
+        DMACH_UART3_RX,
+        DMACH_UART3_TX,
+        DMACH_SLIMBUS1_RX,
+        DMACH_SLIMBUS1_TX,
+        DMACH_SLIMBUS3_RX,
+        DMACH_SLIMBUS3_TX,
+        DMACH_SLIMBUS5_RX,
+        DMACH_SLIMBUS5_TX,
 };
 
 struct dma_pl330_platdata exynos4_pdma1_pdata = {
         .nr_valid_peri = ARRAY_SIZE(pdma1_peri),
-        .peri = pdma1_peri,
+        .peri_id = pdma1_peri,
 };
 
 struct amba_device exynos4_device_pdma1 = {
@@ -242,7 +141,15 @@ struct amba_device exynos4_device_pdma1 = {
 
 static int __init exynos4_dma_init(void)
 {
+        if (of_have_populated_dt())
+                return 0;
+
+        dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask);
+        dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask);
         amba_device_register(&exynos4_device_pdma0, &iomem_resource);
+
+        dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask);
+        dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask);
         amba_device_register(&exynos4_device_pdma1, &iomem_resource);
 
         return 0;
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index dfd4b7eecb90..713dd5251c64 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -17,13 +17,13 @@
 
 /* PPI: Private Peripheral Interrupt */
 
-#define IRQ_PPI(x)              S5P_IRQ(x+16)
+#define IRQ_PPI(x)              (x+16)
 
 #define IRQ_MCT_LOCALTIMER      IRQ_PPI(12)
 
 /* SPI: Shared Peripheral Interrupt */
 
-#define IRQ_SPI(x)              S5P_IRQ(x+32)
+#define IRQ_SPI(x)              (x+32)
 
 #define IRQ_EINT0               IRQ_SPI(16)
 #define IRQ_EINT1               IRQ_SPI(17)
@@ -163,7 +163,9 @@
 #define IRQ_GPIO2_NR_GROUPS     9
 #define IRQ_GPIO_END            (S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT)
 
+#define IRQ_TIMER_BASE          (IRQ_GPIO_END + 64)
+
 /* Set the default NR_IRQS */
-#define NR_IRQS                 (IRQ_GPIO_END + 64)
+#define NR_IRQS                 (IRQ_TIMER_BASE + IRQ_TIMER_COUNT)
 
 #endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 058541d45af0..d1829860a0ec 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -149,7 +149,6 @@
 #define S3C_PA_WDT                      EXYNOS4_PA_WATCHDOG
 #define S3C_PA_UART                     EXYNOS4_PA_UART
 
-#define S5P_PA_CHIPID                   EXYNOS4_PA_CHIPID
 #define S5P_PA_EHCI                     EXYNOS4_PA_EHCI
 #define S5P_PA_FIMC0                    EXYNOS4_PA_FIMC0
 #define S5P_PA_FIMC1                    EXYNOS4_PA_FIMC1
@@ -166,26 +165,17 @@
 #define S5P_PA_ONENAND_DMA              EXYNOS4_PA_ONENAND_DMA
 #define S5P_PA_SDO                      EXYNOS4_PA_SDO
 #define S5P_PA_SDRAM                    EXYNOS4_PA_SDRAM
-#define S5P_PA_SROMC                    EXYNOS4_PA_SROMC
-#define S5P_PA_SYSCON                   EXYNOS4_PA_SYSCON
-#define S5P_PA_TIMER                    EXYNOS4_PA_TIMER
 #define S5P_PA_VP                       EXYNOS4_PA_VP
 
 #define SAMSUNG_PA_ADC                  EXYNOS4_PA_ADC
 #define SAMSUNG_PA_ADC1                 EXYNOS4_PA_ADC1
 #define SAMSUNG_PA_KEYPAD               EXYNOS4_PA_KEYPAD
 
-#define EXYNOS_PA_COMBINER              EXYNOS4_PA_COMBINER
-#define EXYNOS_PA_GIC_CPU               EXYNOS4_PA_GIC_CPU
-#define EXYNOS_PA_GIC_DIST              EXYNOS4_PA_GIC_DIST
-#define EXYNOS_PA_PMU                   EXYNOS4_PA_PMU
-#define EXYNOS_PA_SYSTIMER              EXYNOS4_PA_SYSTIMER
-
 /* Compatibility UART */
 
 #define S3C_VA_UARTx(x)                 (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
 
-#define S5P_PA_UART(x)                  (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
+#define S5P_PA_UART(x)                  (EXYNOS4_PA_UART + ((x) * S3C_UART_OFFSET))
 #define S5P_PA_UART0                    S5P_PA_UART(0)
 #define S5P_PA_UART1                    S5P_PA_UART(1)
 #define S5P_PA_UART2                    S5P_PA_UART(2)
diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h
index 5e3220c18fc7..0063a6de3dc8 100644
--- a/arch/arm/mach-exynos/include/mach/system.h
+++ b/arch/arm/mach-exynos/include/mach/system.h
@@ -13,8 +13,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H __FILE__
 
-#include <plat/system-reset.h>
-
 static void arch_idle(void)
 {
         /* nothing here yet */
diff --git a/arch/arm/mach-exynos/init.c b/arch/arm/mach-exynos/init.c
deleted file mode 100644
index a8a83e3881a4..000000000000
--- a/arch/arm/mach-exynos/init.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/* linux/arch/arm/mach-exynos4/init.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/serial_core.h>
-
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/regs-serial.h>
-
-static struct s3c24xx_uart_clksrc exynos4_serial_clocks[] = {
-        [0] = {
-                .name           = "uclk1",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        },
-};
-
-/* uart registration process */
-void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        struct s3c2410_uartcfg *tcfg = cfg;
-        u32 ucnt;
-
-        for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
-                if (!tcfg->clocks) {
-                        tcfg->has_fracval = 1;
-                        tcfg->clocks = exynos4_serial_clocks;
-                        tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks);
-                }
-                tcfg->flags |= NO_NEED_CHECK_CLKSRC;
-        }
-
-        s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
-}
diff --git a/arch/arm/mach-exynos/irq-combiner.c b/arch/arm/mach-exynos/irq-combiner.c
deleted file mode 100644
index 5a2758ab055e..000000000000
--- a/arch/arm/mach-exynos/irq-combiner.c
+++ /dev/null
@@ -1,124 +0,0 @@
-/* linux/arch/arm/mach-exynos4/irq-combiner.c
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Based on arch/arm/common/gic.c
- *
- * IRQ COMBINER support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/io.h>
-
-#include <asm/mach/irq.h>
-
-#define COMBINER_ENABLE_SET     0x0
-#define COMBINER_ENABLE_CLEAR   0x4
-#define COMBINER_INT_STATUS     0xC
-
-static DEFINE_SPINLOCK(irq_controller_lock);
-
-struct combiner_chip_data {
-        unsigned int irq_offset;
-        unsigned int irq_mask;
-        void __iomem *base;
-};
-
-static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];
-
-static inline void __iomem *combiner_base(struct irq_data *data)
-{
-        struct combiner_chip_data *combiner_data =
-                irq_data_get_irq_chip_data(data);
-
-        return combiner_data->base;
-}
-
-static void combiner_mask_irq(struct irq_data *data)
-{
-        u32 mask = 1 << (data->irq % 32);
-
-        __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
-}
-
-static void combiner_unmask_irq(struct irq_data *data)
-{
-        u32 mask = 1 << (data->irq % 32);
-
-        __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET);
-}
-
-static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
-{
-        struct combiner_chip_data *chip_data = irq_get_handler_data(irq);
-        struct irq_chip *chip = irq_get_chip(irq);
-        unsigned int cascade_irq, combiner_irq;
-        unsigned long status;
-
-        chained_irq_enter(chip, desc);
-
-        spin_lock(&irq_controller_lock);
-        status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
-        spin_unlock(&irq_controller_lock);
-        status &= chip_data->irq_mask;
-
-        if (status == 0)
-                goto out;
-
-        combiner_irq = __ffs(status);
-
-        cascade_irq = combiner_irq + (chip_data->irq_offset & ~31);
-        if (unlikely(cascade_irq >= NR_IRQS))
-                do_bad_IRQ(cascade_irq, desc);
-        else
-                generic_handle_irq(cascade_irq);
-
- out:
-        chained_irq_exit(chip, desc);
-}
-
-static struct irq_chip combiner_chip = {
-        .name           = "COMBINER",
-        .irq_mask       = combiner_mask_irq,
-        .irq_unmask     = combiner_unmask_irq,
-};
-
-void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
-{
-        if (combiner_nr >= MAX_COMBINER_NR)
-                BUG();
-        if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0)
-                BUG();
-        irq_set_chained_handler(irq, combiner_handle_cascade_irq);
-}
-
-void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
-                          unsigned int irq_start)
-{
-        unsigned int i;
-
-        if (combiner_nr >= MAX_COMBINER_NR)
-                BUG();
-
-        combiner_data[combiner_nr].base = base;
-        combiner_data[combiner_nr].irq_offset = irq_start;
-        combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3);
-
-        /* Disable all interrupts */
-
-        __raw_writel(combiner_data[combiner_nr].irq_mask,
-                     base + COMBINER_ENABLE_CLEAR);
-
-        /* Setup the Linux IRQ subsystem */
-
-        for (i = irq_start; i < combiner_data[combiner_nr].irq_offset
-                                + MAX_IRQ_IN_COMBINER; i++) {
-                irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq);
-                irq_set_chip_data(i, &combiner_data[combiner_nr]);
-                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
-        }
-}
diff --git a/arch/arm/mach-exynos/irq-eint.c b/arch/arm/mach-exynos/irq-eint.c
deleted file mode 100644
index badb8c66fc9b..000000000000
--- a/arch/arm/mach-exynos/irq-eint.c
+++ /dev/null
@@ -1,237 +0,0 @@
-/* linux/arch/arm/mach-exynos4/irq-eint.c
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * EXYNOS4 - IRQ EINT support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/sysdev.h>
-#include <linux/gpio.h>
-
-#include <plat/pm.h>
-#include <plat/cpu.h>
-#include <plat/gpio-cfg.h>
-
-#include <mach/regs-gpio.h>
-
-#include <asm/mach/irq.h>
-
-static DEFINE_SPINLOCK(eint_lock);
-
-static unsigned int eint0_15_data[16];
-
-static unsigned int exynos4_get_irq_nr(unsigned int number)
-{
-        u32 ret = 0;
-
-        switch (number) {
-        case 0 ... 3:
-                ret = (number + IRQ_EINT0);
-                break;
-        case 4 ... 7:
-                ret = (number + (IRQ_EINT4 - 4));
-                break;
-        case 8 ... 15:
-                ret = (number + (IRQ_EINT8 - 8));
-                break;
-        default:
-                printk(KERN_ERR "number available : %d\n", number);
-        }
-
-        return ret;
-}
-
-static inline void exynos4_irq_eint_mask(struct irq_data *data)
-{
-        u32 mask;
-
-        spin_lock(&eint_lock);
-        mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
-        mask |= eint_irq_to_bit(data->irq);
-        __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
-        spin_unlock(&eint_lock);
-}
-
-static void exynos4_irq_eint_unmask(struct irq_data *data)
-{
-        u32 mask;
-
-        spin_lock(&eint_lock);
-        mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
-        mask &= ~(eint_irq_to_bit(data->irq));
-        __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
-        spin_unlock(&eint_lock);
-}
-
-static inline void exynos4_irq_eint_ack(struct irq_data *data)
-{
-        __raw_writel(eint_irq_to_bit(data->irq),
-                     S5P_EINT_PEND(EINT_REG_NR(data->irq)));
-}
-
-static void exynos4_irq_eint_maskack(struct irq_data *data)
-{
-        exynos4_irq_eint_mask(data);
-        exynos4_irq_eint_ack(data);
-}
-
-static int exynos4_irq_eint_set_type(struct irq_data *data, unsigned int type)
-{
-        int offs = EINT_OFFSET(data->irq);
-        int shift;
-        u32 ctrl, mask;
-        u32 newvalue = 0;
-
-        switch (type) {
-        case IRQ_TYPE_EDGE_RISING:
-                newvalue = S5P_IRQ_TYPE_EDGE_RISING;
-                break;
-
-        case IRQ_TYPE_EDGE_FALLING:
-                newvalue = S5P_IRQ_TYPE_EDGE_FALLING;
-                break;
-
-        case IRQ_TYPE_EDGE_BOTH:
-                newvalue = S5P_IRQ_TYPE_EDGE_BOTH;
-                break;
-
-        case IRQ_TYPE_LEVEL_LOW:
-                newvalue = S5P_IRQ_TYPE_LEVEL_LOW;
-                break;
-
-        case IRQ_TYPE_LEVEL_HIGH:
-                newvalue = S5P_IRQ_TYPE_LEVEL_HIGH;
-                break;
-
-        default:
-                printk(KERN_ERR "No such irq type %d", type);
-                return -EINVAL;
-        }
-
-        shift = (offs & 0x7) * 4;
-        mask = 0x7 << shift;
-
-        spin_lock(&eint_lock);
-        ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq)));
-        ctrl &= ~mask;
-        ctrl |= newvalue << shift;
-        __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq)));
-        spin_unlock(&eint_lock);
-
-        switch (offs) {
-        case 0 ... 7:
-                s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE);
-                break;
-        case 8 ... 15:
-                s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE);
-                break;
-        case 16 ... 23:
-                s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE);
-                break;
-        case 24 ... 31:
-                s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE);
-                break;
-        default:
-                printk(KERN_ERR "No such irq number %d", offs);
-        }
-
-        return 0;
-}
-
-static struct irq_chip exynos4_irq_eint = {
-        .name           = "exynos4-eint",
-        .irq_mask       = exynos4_irq_eint_mask,
-        .irq_unmask     = exynos4_irq_eint_unmask,
-        .irq_mask_ack   = exynos4_irq_eint_maskack,
-        .irq_ack        = exynos4_irq_eint_ack,
-        .irq_set_type   = exynos4_irq_eint_set_type,
-#ifdef CONFIG_PM
-        .irq_set_wake   = s3c_irqext_wake,
-#endif
-};
-
-/* exynos4_irq_demux_eint
- *
- * This function demuxes the IRQ from from EINTs 16 to 31.
- * It is designed to be inlined into the specific handler
- * s5p_irq_demux_eintX_Y.
- *
- * Each EINT pend/mask registers handle eight of them.
- */
-static inline void exynos4_irq_demux_eint(unsigned int start)
-{
-        unsigned int irq;
-
-        u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start)));
-        u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start)));
-
-        status &= ~mask;
-        status &= 0xff;
-
-        while (status) {
-                irq = fls(status) - 1;
-                generic_handle_irq(irq + start);
-                status &= ~(1 << irq);
-        }
-}
-
-static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
-{
-        struct irq_chip *chip = irq_get_chip(irq);
-        chained_irq_enter(chip, desc);
-        exynos4_irq_demux_eint(IRQ_EINT(16));
-        exynos4_irq_demux_eint(IRQ_EINT(24));
-        chained_irq_exit(chip, desc);
-}
-
-static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
-{
-        u32 *irq_data = irq_get_handler_data(irq);
-        struct irq_chip *chip = irq_get_chip(irq);
-
-        chained_irq_enter(chip, desc);
-        chip->irq_mask(&desc->irq_data);
-
-        if (chip->irq_ack)
-                chip->irq_ack(&desc->irq_data);
-
-        generic_handle_irq(*irq_data);
-
-        chip->irq_unmask(&desc->irq_data);
-        chained_irq_exit(chip, desc);
-}
-
-int __init exynos4_init_irq_eint(void)
-{
-        int irq;
-
-        for (irq = 0 ; irq <= 31 ; irq++) {
-                irq_set_chip_and_handler(IRQ_EINT(irq), &exynos4_irq_eint,
-                                         handle_level_irq);
-                set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
-        }
-
-        irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31);
-
-        for (irq = 0 ; irq <= 15 ; irq++) {
-                eint0_15_data[irq] = IRQ_EINT(irq);
-
-                irq_set_handler_data(exynos4_get_irq_nr(irq),
-                                     &eint0_15_data[irq]);
-                irq_set_chained_handler(exynos4_get_irq_nr(irq),
-                                        exynos4_irq_eint0_15);
-        }
-
-        return 0;
-}
-
-arch_initcall(exynos4_init_irq_eint);
diff --git a/arch/arm/mach-exynos/mach-armlex4210.c b/arch/arm/mach-exynos/mach-armlex4210.c
index 49da3089249a..d726fcd3acf9 100644
--- a/arch/arm/mach-exynos/mach-armlex4210.c
+++ b/arch/arm/mach-exynos/mach-armlex4210.c
@@ -21,7 +21,6 @@
 
 #include <plat/cpu.h>
 #include <plat/devs.h>
-#include <plat/exynos4.h>
 #include <plat/gpio-cfg.h>
 #include <plat/regs-serial.h>
 #include <plat/regs-srom.h>
@@ -29,6 +28,8 @@
 
 #include <mach/map.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define ARMLEX4210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -188,7 +189,7 @@ static void __init armlex4210_smsc911x_init(void)
 
 static void __init armlex4210_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        exynos_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(armlex4210_uartcfgs,
                            ARRAY_SIZE(armlex4210_uartcfgs));
@@ -214,4 +215,5 @@ MACHINE_START(ARMLEX4210, "ARMLEX4210")
         .handle_irq     = gic_handle_irq,
         .init_machine   = armlex4210_machine_init,
         .timer          = &exynos4_timer,
+        .restart        = exynos4_restart,
 MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c
new file mode 100644
index 000000000000..85fa02767d67
--- /dev/null
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -0,0 +1,85 @@
+/*
+ * Samsung's Exynos4210 flattened device tree enabled machine
+ *
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ * Copyright (c) 2010-2011 Linaro Ltd.
+ *              www.linaro.org
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/of_platform.h>
+#include <linux/serial_core.h>
+
+#include <asm/mach/arch.h>
+#include <mach/map.h>
+
+#include <plat/cpu.h>
+#include <plat/regs-serial.h>
+#include <plat/exynos4.h>
+
+/*
+ * The following lookup table is used to override device names when devices
+ * are registered from device tree. This is temporarily added to enable
+ * device tree support addition for the Exynos4 architecture.
+ *
+ * For drivers that require platform data to be provided from the machine
+ * file, a platform data pointer can also be supplied along with the
+ * devices names. Usually, the platform data elements that cannot be parsed
+ * from the device tree by the drivers (example: function pointers) are
+ * supplied. But it should be noted that this is a temporary mechanism and
+ * at some point, the drivers should be capable of parsing all the platform
+ * data from the device tree.
+ */
+static const struct of_dev_auxdata exynos4210_auxdata_lookup[] __initconst = {
+        OF_DEV_AUXDATA("samsung,exynos4210-uart", S5P_PA_UART0,
+                                "exynos4210-uart.0", NULL),
+        OF_DEV_AUXDATA("samsung,exynos4210-uart", S5P_PA_UART1,
+                                "exynos4210-uart.1", NULL),
+        OF_DEV_AUXDATA("samsung,exynos4210-uart", S5P_PA_UART2,
+                                "exynos4210-uart.2", NULL),
+        OF_DEV_AUXDATA("samsung,exynos4210-uart", S5P_PA_UART3,
+                                "exynos4210-uart.3", NULL),
+        OF_DEV_AUXDATA("samsung,exynos4210-sdhci", EXYNOS4_PA_HSMMC(0),
+                                "exynos4-sdhci.0", NULL),
+        OF_DEV_AUXDATA("samsung,exynos4210-sdhci", EXYNOS4_PA_HSMMC(1),
+                                "exynos4-sdhci.1", NULL),
+        OF_DEV_AUXDATA("samsung,exynos4210-sdhci", EXYNOS4_PA_HSMMC(2),
+                                "exynos4-sdhci.2", NULL),
+        OF_DEV_AUXDATA("samsung,exynos4210-sdhci", EXYNOS4_PA_HSMMC(3),
+                                "exynos4-sdhci.3", NULL),
+        OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS4_PA_IIC(0),
+                                "s3c2440-i2c.0", NULL),
+        OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA0, "dma-pl330.0", NULL),
+        OF_DEV_AUXDATA("arm,pl330", EXYNOS4_PA_PDMA1, "dma-pl330.1", NULL),
+        {},
+};
+
+static void __init exynos4210_dt_map_io(void)
+{
+        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s3c24xx_init_clocks(24000000);
+}
+
+static void __init exynos4210_dt_machine_init(void)
+{
+        of_platform_populate(NULL, of_default_bus_match_table,
+                                exynos4210_auxdata_lookup, NULL);
+}
+
+static char const *exynos4210_dt_compat[] __initdata = {
+        "samsung,exynos4210",
+        NULL
+};
+
+DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)")
+        /* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */
+        .init_irq       = exynos4_init_irq,
+        .map_io         = exynos4210_dt_map_io,
+        .init_machine   = exynos4210_dt_machine_init,
+        .timer          = &exynos4_timer,
+        .dt_compat      = exynos4210_dt_compat,
+MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 5acec11821a4..b895ec031105 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -38,7 +38,6 @@
 #include <plat/adc.h>
 #include <plat/regs-fb-v4.h>
 #include <plat/regs-serial.h>
-#include <plat/exynos4.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/fb.h>
@@ -55,6 +54,8 @@
 
 #include <mach/map.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define NURI_UCON_DEFAULT       (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -248,13 +249,8 @@ static void nuri_lcd_power_on(struct plat_lcd_data *pd, unsigned int power)
 
 static int nuri_bl_init(struct device *dev)
 {
-        int ret, gpio = EXYNOS4_GPE2(3);
-
-        ret = gpio_request(gpio, "LCD_LDO_EN");
-        if (!ret)
-                gpio_direction_output(gpio, 0);
-
-        return ret;
+        return gpio_request_one(EXYNOS4_GPE2(3), GPIOF_OUT_INIT_LOW,
+                                "LCD_LD0_EN");
 }
 
 static int nuri_bl_notify(struct device *dev, int brightness)
@@ -1284,7 +1280,7 @@ static struct platform_device *nuri_devices[] __initdata = {
 
 static void __init nuri_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        exynos_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs));
 }
@@ -1338,4 +1334,5 @@ MACHINE_START(NURI, "NURI")
         .init_machine   = nuri_machine_init,
         .timer          = &exynos4_timer,
         .reserve        = &nuri_reserve,
+        .restart        = exynos4_restart,
 MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index 5561b06c38ec..586eb995aa96 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -29,7 +29,6 @@
 
 #include <plat/regs-serial.h>
 #include <plat/regs-fb-v4.h>
-#include <plat/exynos4.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/sdhci.h>
@@ -44,6 +43,8 @@
 
 #include <mach/map.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define ORIGEN_UCON_DEFAULT     (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -639,7 +640,7 @@ static void s5p_tv_setup(void)
 
 static void __init origen_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        exynos_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
 }
@@ -699,4 +700,5 @@ MACHINE_START(ORIGEN, "ORIGEN")
         .init_machine   = origen_machine_init,
         .timer          = &exynos4_timer,
         .reserve        = &origen_reserve,
+        .restart        = exynos4_restart,
 MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
index 722d82d7f217..d00e4f016a68 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -28,7 +28,6 @@
 #include <plat/clock.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
-#include <plat/exynos4.h>
 #include <plat/gpio-cfg.h>
 #include <plat/iic.h>
 #include <plat/keypad.h>
@@ -37,6 +36,8 @@
 
 #include <mach/map.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define SMDK4X12_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -250,7 +251,7 @@ static void __init smdk4x12_map_io(void)
 {
         clk_xusbxti.rate = 24000000;
 
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        exynos_init_io(NULL, 0);
         s3c24xx_init_clocks(clk_xusbxti.rate);
         s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs));
 }
@@ -291,6 +292,7 @@ MACHINE_START(SMDK4212, "SMDK4212")
         .handle_irq     = gic_handle_irq,
         .init_machine   = smdk4x12_machine_init,
         .timer          = &exynos4_timer,
+        .restart        = exynos4_restart,
 MACHINE_END
 
 MACHINE_START(SMDK4412, "SMDK4412")
@@ -302,4 +304,5 @@ MACHINE_START(SMDK4412, "SMDK4412")
         .handle_irq     = gic_handle_irq,
         .init_machine   = smdk4x12_machine_init,
         .timer          = &exynos4_timer,
+        .restart        = exynos4_restart,
 MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index edc60b6108ed..a27b23eee9fa 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -28,7 +28,6 @@
 #include <plat/regs-serial.h>
 #include <plat/regs-srom.h>
 #include <plat/regs-fb-v4.h>
-#include <plat/exynos4.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/fb.h>
@@ -44,6 +43,8 @@
 
 #include <mach/map.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define SMDKV310_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -130,9 +131,7 @@ static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
                 gpio_free(EXYNOS4_GPD0(1));
 #endif
                 /* fire nRESET on power up */
-                gpio_request(EXYNOS4_GPX0(6), "GPX0");
-
-                gpio_direction_output(EXYNOS4_GPX0(6), 1);
+                gpio_request_one(EXYNOS4_GPX0(6), GPIOF_OUT_INIT_HIGH, "GPX0");
                 mdelay(100);
 
                 gpio_set_value(EXYNOS4_GPX0(6), 0);
@@ -333,7 +332,7 @@ static void s5p_tv_setup(void)
 
 static void __init smdkv310_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        exynos_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
 }
@@ -380,6 +379,7 @@ MACHINE_START(SMDKV310, "SMDKV310")
         .init_machine   = smdkv310_machine_init,
         .timer          = &exynos4_timer,
         .reserve        = &smdkv310_reserve,
+        .restart        = exynos4_restart,
 MACHINE_END
 
 MACHINE_START(SMDKC210, "SMDKC210")
@@ -390,4 +390,5 @@ MACHINE_START(SMDKC210, "SMDKC210")
         .handle_irq     = gic_handle_irq,
         .init_machine   = smdkv310_machine_init,
         .timer          = &exynos4_timer,
+        .restart        = exynos4_restart,
 MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index cfc7d5076f5a..37ac93e8d6d9 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -28,7 +28,6 @@
 #include <asm/mach-types.h>
 
 #include <plat/regs-serial.h>
-#include <plat/exynos4.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/iic.h>
@@ -48,6 +47,8 @@
 #include <media/s5p_fimc.h>
 #include <media/m5mols.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define UNIVERSAL_UCON_DEFAULT  (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -609,8 +610,7 @@ static void __init universal_tsp_init(void)
 
         /* TSP_LDO_ON: XMDMADDR_11 */
         gpio = EXYNOS4_GPE2(3);
-        gpio_request(gpio, "TSP_LDO_ON");
-        gpio_direction_output(gpio, 1);
+        gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
         gpio_export(gpio, 0);
 
         /* TSP_INT: XMDMADDR_7 */
@@ -670,8 +670,7 @@ static void __init universal_touchkey_init(void)
         i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
 
         gpio = EXYNOS4_GPE3(3);                 /* XMDMDATA_3 */
-        gpio_request(gpio, "3_TOUCH_EN");
-        gpio_direction_output(gpio, 1);
+        gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
 }
 
 static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
@@ -993,7 +992,7 @@ static struct platform_device *universal_devices[] __initdata = {
 
 static void __init universal_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        exynos_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
 }
@@ -1001,9 +1000,7 @@ static void __init universal_map_io(void)
 void s5p_tv_setup(void)
 {
         /* direct HPD to HDMI chip */
-        gpio_request(EXYNOS4_GPX3(7), "hpd-plug");
-
-        gpio_direction_input(EXYNOS4_GPX3(7));
+        gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
         s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
         s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
 
@@ -1063,4 +1060,5 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
         .init_machine   = universal_machine_init,
         .timer          = &exynos4_timer,
         .reserve        = &universal_reserve,
+        .restart        = exynos4_restart,
 MACHINE_END
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 509a435afd4b..4093fea849c3 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -23,6 +23,7 @@
 
 #include <asm/cacheflush.h>
 #include <asm/hardware/cache-l2x0.h>
+#include <asm/smp_scu.h>
 
 #include <plat/cpu.h>
 #include <plat/pm.h>
@@ -213,27 +214,6 @@ static int exynos4_pm_add(struct sys_device *sysdev)
         return 0;
 }
 
-/* This function copy from linux/arch/arm/kernel/smp_scu.c */
-
-void exynos4_scu_enable(void __iomem *scu_base)
-{
-        u32 scu_ctrl;
-
-        scu_ctrl = __raw_readl(scu_base);
-        /* already enabled? */
-        if (scu_ctrl & 1)
-                return;
-
-        scu_ctrl |= 1;
-        __raw_writel(scu_ctrl, scu_base);
-
-        /*
-         * Ensure that the data accessed by CPU0 before the SCU was
-         * initialised is visible to the other CPUs.
-         */
-        flush_cache_all();
-}
-
 static unsigned long pll_base_rate;
 
 static void exynos4_restore_pll(void)
@@ -402,7 +382,7 @@ static void exynos4_pm_resume(void)
 
         exynos4_restore_pll();
 
-        exynos4_scu_enable(S5P_VA_SCU);
+        scu_enable(S5P_VA_SCU);
 
 #ifdef CONFIG_CACHE_L2X0
         s3c_pm_do_restore_core(exynos4_l2cc_save, ARRAY_SIZE(exynos4_l2cc_save));
diff --git a/arch/arm/mach-exynos/setup-sdhci.c b/arch/arm/mach-exynos/setup-sdhci.c
deleted file mode 100644
index 92937b410906..000000000000
--- a/arch/arm/mach-exynos/setup-sdhci.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/* linux/arch/arm/mach-exynos4/setup-sdhci.c
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * EXYNOS4 - Helper functions for settign up SDHCI device(s) (HSMMC)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/types.h>
-
-/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
-
-char *exynos4_hsmmc_clksrcs[4] = {
-        [0] = NULL,
-        [1] = NULL,
-        [2] = "sclk_mmc",       /* mmc_bus */
-        [3] = NULL,
-};
diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c
index 60b6774e1eaa..25b453601acc 100644
--- a/arch/arm/mach-footbridge/cats-hw.c
+++ b/arch/arm/mach-footbridge/cats-hw.c
@@ -91,4 +91,5 @@ MACHINE_START(CATS, "Chalice-CATS")
         .map_io         = footbridge_map_io,
         .init_irq       = footbridge_init_irq,
         .timer          = &isa_timer,
+        .restart        = footbridge_restart,
 MACHINE_END
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index 38a44f9b9da2..41978ee4f9d0 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -199,6 +199,33 @@ void __init footbridge_map_io(void)
                 iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
 }
 
+void footbridge_restart(char mode, const char *cmd)
+{
+        if (mode == 's') {
+                /* Jump into the ROM */
+                soft_restart(0x41000000);
+        } else {
+                /*
+                 * Force the watchdog to do a CPU reset.
+                 *
+                 * After making sure that the watchdog is disabled
+                 * (so we can change the timer registers) we first
+                 * enable the timer to autoreload itself.  Next, the
+                 * timer interval is set really short and any
+                 * current interrupt request is cleared (so we can
+                 * see an edge transition).  Finally, TIMER4 is
+                 * enabled as the watchdog.
+                 */
+                *CSR_SA110_CNTL &= ~(1 << 13);
+                *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE |
+                                   TIMER_CNTL_AUTORELOAD |
+                                   TIMER_CNTL_DIV16;
+                *CSR_TIMER4_LOAD = 0x2;
+                *CSR_TIMER4_CLR  = 0;
+                *CSR_SA110_CNTL |= (1 << 13);
+        }
+}
+
 #ifdef CONFIG_FOOTBRIDGE_ADDIN
 
 static inline unsigned long fb_bus_sdram_offset(void)
diff --git a/arch/arm/mach-footbridge/common.h b/arch/arm/mach-footbridge/common.h
index b05e662d21ad..c9767b892cb2 100644
--- a/arch/arm/mach-footbridge/common.h
+++ b/arch/arm/mach-footbridge/common.h
@@ -8,3 +8,4 @@ extern void footbridge_map_io(void);
 extern void footbridge_init_irq(void);
 
 extern void isa_init_irq(unsigned int irq);
+extern void footbridge_restart(char, const char *);
diff --git a/arch/arm/mach-footbridge/ebsa285.c b/arch/arm/mach-footbridge/ebsa285.c
index 012210cf7d16..27716a7e5fc1 100644
--- a/arch/arm/mach-footbridge/ebsa285.c
+++ b/arch/arm/mach-footbridge/ebsa285.c
@@ -21,5 +21,6 @@ MACHINE_START(EBSA285, "EBSA285")
         .map_io         = footbridge_map_io,
         .init_irq       = footbridge_init_irq,
         .timer          = &footbridge_timer,
+        .restart        = footbridge_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-footbridge/include/mach/system.h b/arch/arm/mach-footbridge/include/mach/system.h
index 249f895910fb..a174a5841bc2 100644
--- a/arch/arm/mach-footbridge/include/mach/system.h
+++ b/arch/arm/mach-footbridge/include/mach/system.h
@@ -7,63 +7,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-#include <linux/io.h>
-#include <asm/hardware/dec21285.h>
-#include <mach/hardware.h>
-#include <asm/leds.h>
-#include <asm/mach-types.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        if (mode == 's') {
-                /*
-                 * Jump into the ROM
-                 */
-                soft_restart(0x41000000);
-        } else {
-                if (machine_is_netwinder()) {
-                        /* open up the SuperIO chip
-                         */
-                        outb(0x87, 0x370);
-                        outb(0x87, 0x370);
-
-                        /* aux function group 1 (logical device 7)
-                         */
-                        outb(0x07, 0x370);
-                        outb(0x07, 0x371);
-
-                        /* set GP16 for WD-TIMER output
-                         */
-                        outb(0xe6, 0x370);
-                        outb(0x00, 0x371);
-
-                        /* set a RED LED and toggle WD_TIMER for rebooting
-                         */
-                        outb(0xc4, 0x338);
-                } else {
-                        /* 
-                         * Force the watchdog to do a CPU reset.
-                         *
-                         * After making sure that the watchdog is disabled
-                         * (so we can change the timer registers) we first
-                         * enable the timer to autoreload itself.  Next, the
-                         * timer interval is set really short and any
-                         * current interrupt request is cleared (so we can
-                         * see an edge transition).  Finally, TIMER4 is
-                         * enabled as the watchdog.
-                         */
-                        *CSR_SA110_CNTL &= ~(1 << 13);
-                        *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE |
-                                           TIMER_CNTL_AUTORELOAD |
-                                           TIMER_CNTL_DIV16;
-                        *CSR_TIMER4_LOAD = 0x2;
-                        *CSR_TIMER4_CLR  = 0;
-                        *CSR_SA110_CNTL |= (1 << 13);
-                }
-        }
-}
diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c
index 0d3846f3b60d..80a1c5cc9071 100644
--- a/arch/arm/mach-footbridge/netwinder-hw.c
+++ b/arch/arm/mach-footbridge/netwinder-hw.c
@@ -645,6 +645,32 @@ fixup_netwinder(struct tag *tags, char **cmdline, struct meminfo *mi)
 #endif
 }
 
+static void netwinder_restart(char mode, const char *cmd)
+{
+        if (mode == 's') {
+                /* Jump into the ROM */
+                soft_restart(0x41000000);
+        } else {
+                local_irq_disable();
+                local_fiq_disable();
+
+                /* open up the SuperIO chip */
+                outb(0x87, 0x370);
+                outb(0x87, 0x370);
+
+                /* aux function group 1 (logical device 7) */
+                outb(0x07, 0x370);
+                outb(0x07, 0x371);
+
+                /* set GP16 for WD-TIMER output */
+                outb(0xe6, 0x370);
+                outb(0x00, 0x371);
+
+                /* set a RED LED and toggle WD_TIMER for rebooting */
+                outb(0xc4, 0x338);
+        }
+}
+
 MACHINE_START(NETWINDER, "Rebel-NetWinder")
         /* Maintainer: Russell King/Rebel.com */
         .atag_offset    = 0x100,
@@ -656,4 +682,5 @@ MACHINE_START(NETWINDER, "Rebel-NetWinder")
         .map_io         = footbridge_map_io,
         .init_irq       = footbridge_init_irq,
         .timer          = &isa_timer,
+        .restart        = netwinder_restart,
 MACHINE_END
diff --git a/arch/arm/mach-footbridge/personal.c b/arch/arm/mach-footbridge/personal.c
index f41dba39b327..e1e9990fa957 100644
--- a/arch/arm/mach-footbridge/personal.c
+++ b/arch/arm/mach-footbridge/personal.c
@@ -19,5 +19,6 @@ MACHINE_START(PERSONAL_SERVER, "Compaq-PersonalServer")
         .map_io         = footbridge_map_io,
         .init_irq       = footbridge_init_irq,
         .timer          = &footbridge_timer,
+        .restart        = footbridge_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c
index 51d4e44ab973..f8a2f6bb5483 100644
--- a/arch/arm/mach-h720x/common.c
+++ b/arch/arm/mach-h720x/common.c
@@ -242,3 +242,8 @@ void __init h720x_map_io(void)
 {
         iotable_init(h720x_io_desc,ARRAY_SIZE(h720x_io_desc));
 }
+
+void h720x_restart(char mode, const char *cmd)
+{
+        CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET;
+}
diff --git a/arch/arm/mach-h720x/common.h b/arch/arm/mach-h720x/common.h
index 7dd5fa604efc..2489537d33dd 100644
--- a/arch/arm/mach-h720x/common.h
+++ b/arch/arm/mach-h720x/common.h
@@ -16,6 +16,7 @@
 extern unsigned long h720x_gettimeoffset(void);
 extern void __init h720x_init_irq(void);
 extern void __init h720x_map_io(void);
+extern void h720x_restart(char, const char *);
 
 #ifdef CONFIG_ARCH_H7202
 extern struct sys_timer h7202_timer;
diff --git a/arch/arm/mach-h720x/h7201-eval.c b/arch/arm/mach-h720x/h7201-eval.c
index 9886f19805f4..5fdb20c855e2 100644
--- a/arch/arm/mach-h720x/h7201-eval.c
+++ b/arch/arm/mach-h720x/h7201-eval.c
@@ -34,4 +34,5 @@ MACHINE_START(H7201, "Hynix GMS30C7201")
         .init_irq       = h720x_init_irq,
         .timer          = &h7201_timer,
         .dma_zone_size  = SZ_256M,
+        .restart        = h720x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-h720x/h7202-eval.c b/arch/arm/mach-h720x/h7202-eval.c
index 284a134819e1..169673036c59 100644
--- a/arch/arm/mach-h720x/h7202-eval.c
+++ b/arch/arm/mach-h720x/h7202-eval.c
@@ -77,4 +77,5 @@ MACHINE_START(H7202, "Hynix HMS30C7202")
         .timer          = &h7202_timer,
         .init_machine   = init_eval_h7202,
         .dma_zone_size  = SZ_256M,
+        .restart        = h720x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-h720x/include/mach/system.h b/arch/arm/mach-h720x/include/mach/system.h
index a708d24ee46d..16ac46e239aa 100644
--- a/arch/arm/mach-h720x/include/mach/system.h
+++ b/arch/arm/mach-h720x/include/mach/system.h
@@ -24,10 +24,4 @@ static void arch_idle(void)
         nop();
 }
 
-
-static __inline__ void arch_reset(char mode, const char *cmd)
-{
-        CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET;
-}
-
 #endif
diff --git a/arch/arm/mach-highbank/core.h b/arch/arm/mach-highbank/core.h
index 7e33fc94cd1e..d8e2d0be64ac 100644
--- a/arch/arm/mach-highbank/core.h
+++ b/arch/arm/mach-highbank/core.h
@@ -1,5 +1,6 @@
 extern void highbank_set_cpu_jump(int cpu, void *jump_addr);
 extern void highbank_clocks_init(void);
+extern void highbank_restart(char, const char *);
 extern void __iomem *scu_base_addr;
 #ifdef CONFIG_DEBUG_HIGHBANK_UART
 extern void highbank_lluart_map_io(void);
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index 7266dd510f1a..804c4a55f803 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -147,4 +147,5 @@ DT_MACHINE_START(HIGHBANK, "Highbank")
         .handle_irq     = gic_handle_irq,
         .init_machine   = highbank_init,
         .dt_compat      = highbank_match,
+        .restart        = highbank_restart,
 MACHINE_END
diff --git a/arch/arm/mach-highbank/include/mach/system.h b/arch/arm/mach-highbank/include/mach/system.h
index 7e8192296cae..b1d8b5fbe373 100644
--- a/arch/arm/mach-highbank/include/mach/system.h
+++ b/arch/arm/mach-highbank/include/mach/system.h
@@ -21,6 +21,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-extern void arch_reset(char mode, const char *cmd);
-
 #endif
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c
index 53f0c4c5ef1c..82c27230d4a9 100644
--- a/arch/arm/mach-highbank/system.c
+++ b/arch/arm/mach-highbank/system.c
@@ -20,7 +20,7 @@
 #include "core.h"
 #include "sysregs.h"
 
-void arch_reset(char mode, const char *cmd)
+void highbank_restart(char mode, const char *cmd)
 {
         if (mode == 'h')
                 hignbank_set_pwr_hard_reset();
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index d0a27303edb8..9d8598f29fda 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -133,7 +133,7 @@ config MACH_MX25_3DS
         select IMX_HAVE_PLATFORM_MXC_NAND
         select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
 
-config MACH_EUKREA_CPUIMX25
+config MACH_EUKREA_CPUIMX25SD
         bool "Support Eukrea CPUIMX25 Platform"
         select SOC_IMX25
         select IMX_HAVE_PLATFORM_FLEXCAN
@@ -149,7 +149,7 @@ config MACH_EUKREA_CPUIMX25
 
 choice
         prompt "Baseboard"
-        depends on MACH_EUKREA_CPUIMX25
+        depends on MACH_EUKREA_CPUIMX25SD
         default MACH_EUKREA_MBIMXSD25_BASEBOARD
 
 config MACH_EUKREA_MBIMXSD25_BASEBOARD
@@ -543,7 +543,7 @@ config MACH_MX35_3DS
           Include support for MX35PDK platform. This includes specific
           configurations for the board and its peripherals.
 
-config MACH_EUKREA_CPUIMX35
+config MACH_EUKREA_CPUIMX35SD
         bool "Support Eukrea CPUIMX35 Platform"
         select SOC_IMX35
         select IMX_HAVE_PLATFORM_FLEXCAN
@@ -561,7 +561,7 @@ config MACH_EUKREA_CPUIMX35
 
 choice
         prompt "Baseboard"
-        depends on MACH_EUKREA_CPUIMX35
+        depends on MACH_EUKREA_CPUIMX35SD
         default MACH_EUKREA_MBIMXSD35_BASEBOARD
 
 config MACH_EUKREA_MBIMXSD35_BASEBOARD
@@ -597,12 +597,12 @@ comment "i.MX6 family:"
 config SOC_IMX6Q
         bool "i.MX6 Quad support"
         select ARM_GIC
-        select CACHE_L2X0
         select CPU_V7
         select HAVE_ARM_SCU
         select HAVE_IMX_GPC
         select HAVE_IMX_MMDC
         select HAVE_IMX_SRC
+        select HAVE_SMP
         select USE_OF
 
         help
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index aba73214c2a8..d97f409ce98b 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -24,7 +24,7 @@ obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
 
 # i.MX25 based machines
 obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o
-obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += mach-eukrea_cpuimx25.o
+obj-$(CONFIG_MACH_EUKREA_CPUIMX25SD) += mach-eukrea_cpuimx25.o
 obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o
 
 # i.MX27 based machines
@@ -57,7 +57,7 @@ obj-$(CONFIG_MACH_BUG) += mach-bug.o
 # i.MX35 based machines
 obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
 obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o
-obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o
+obj-$(CONFIG_MACH_EUKREA_CPUIMX35SD) += mach-cpuimx35.o
 obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd35-baseboard.o
 obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o
 
diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c
index 8116f119517d..ac8238caecb9 100644
--- a/arch/arm/mach-imx/clock-imx35.c
+++ b/arch/arm/mach-imx/clock-imx35.c
@@ -507,7 +507,7 @@ static struct clk_lookup lookups[] = {
 
 int __init mx35_clocks_init()
 {
-        unsigned int cgr2 = 3 << 26, cgr3 = 0;
+        unsigned int cgr2 = 3 << 26;
 
 #if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
         cgr2 |= 3 << 16;
@@ -521,6 +521,12 @@ int __init mx35_clocks_init()
         __raw_writel((3 << 18), CCM_BASE + CCM_CGR0);
         __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16),
                         CCM_BASE + CCM_CGR1);
+        __raw_writel(cgr2, CCM_BASE + CCM_CGR2);
+        __raw_writel(0, CCM_BASE + CCM_CGR3);
+
+        clk_enable(&iim_clk);
+        imx_print_silicon_rev("i.MX35", mx35_revision());
+        clk_disable(&iim_clk);
 
         /*
          * Check if we came up in internal boot mode. If yes, we need some
@@ -529,17 +535,11 @@ int __init mx35_clocks_init()
          */
         if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) {
                 /* Additionally turn on UART1, SCC, and IIM clocks */
-                cgr2 |= 3 << 16 | 3 << 4;
-                cgr3 |= 3 << 2;
+                clk_enable(&iim_clk);
+                clk_enable(&uart1_clk);
+                clk_enable(&scc_clk);
         }
 
-        __raw_writel(cgr2, CCM_BASE + CCM_CGR2);
-        __raw_writel(cgr3, CCM_BASE + CCM_CGR3);
-
-        clk_enable(&iim_clk);
-        imx_print_silicon_rev("i.MX35", mx35_revision());
-        clk_disable(&iim_clk);
-
 #ifdef CONFIG_MXC_USE_EPIT
         epit_timer_init(&epit1_clk,
                         MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);
diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c
index 039a7abb165a..9273c2a24b54 100644
--- a/arch/arm/mach-imx/clock-imx6q.c
+++ b/arch/arm/mach-imx/clock-imx6q.c
@@ -1931,14 +1931,12 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
                 val |= 0x1 << BP_CLPCR_LPM;
                 val &= ~BM_CLPCR_VSTBY;
                 val &= ~BM_CLPCR_SBYOS;
-                val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
                 break;
         case STOP_POWER_OFF:
                 val |= 0x2 << BP_CLPCR_LPM;
                 val |= 0x3 << BP_CLPCR_STBY_COUNT;
                 val |= BM_CLPCR_VSTBY;
                 val |= BM_CLPCR_SBYOS;
-                val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
                 break;
         default:
                 return -EINVAL;
diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c
index c71dbcc37b11..f4a63ee9e217 100644
--- a/arch/arm/mach-imx/mach-apf9328.c
+++ b/arch/arm/mach-imx/mach-apf9328.c
@@ -149,4 +149,5 @@ MACHINE_START(APF9328, "Armadeus APF9328")
         .handle_irq   = imx1_handle_irq,
         .timer        = &apf9328_timer,
         .init_machine = apf9328_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index c9a9cf67755e..e4f426a09899 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -561,4 +561,5 @@ MACHINE_START(ARMADILLO5X0, "Armadillo-500")
         .handle_irq = imx31_handle_irq,
         .timer = &armadillo5x0_timer,
         .init_machine = armadillo5x0_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-bug.c b/arch/arm/mach-imx/mach-bug.c
index 313f62ddc1ef..9a9897749dd6 100644
--- a/arch/arm/mach-imx/mach-bug.c
+++ b/arch/arm/mach-imx/mach-bug.c
@@ -65,4 +65,5 @@ MACHINE_START(BUG, "BugLabs BUGBase")
         .handle_irq = imx31_handle_irq,
         .timer = &bug_timer,
         .init_machine = bug_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
index edb373052576..d085aea08709 100644
--- a/arch/arm/mach-imx/mach-cpuimx27.c
+++ b/arch/arm/mach-imx/mach-cpuimx27.c
@@ -318,4 +318,5 @@ MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
         .handle_irq = imx27_handle_irq,
         .timer = &eukrea_cpuimx27_timer,
         .init_machine = eukrea_cpuimx27_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c
index 66af2e8f7e57..8ecc872b2547 100644
--- a/arch/arm/mach-imx/mach-cpuimx35.c
+++ b/arch/arm/mach-imx/mach-cpuimx35.c
@@ -53,12 +53,18 @@ static const struct imxi2c_platform_data
         .bitrate =              100000,
 };
 
+#define TSC2007_IRQGPIO         IMX_GPIO_NR(3, 2)
+static int tsc2007_get_pendown_state(void)
+{
+        return !gpio_get_value(TSC2007_IRQGPIO);
+}
+
 static struct tsc2007_platform_data tsc2007_info = {
         .model                  = 2007,
         .x_plate_ohms           = 180,
+        .get_pendown_state = tsc2007_get_pendown_state,
 };
 
-#define TSC2007_IRQGPIO         IMX_GPIO_NR(3, 2)
 static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = {
         {
                 I2C_BOARD_INFO("pcf8563", 0x51),
@@ -201,4 +207,5 @@ MACHINE_START(EUKREA_CPUIMX35SD, "Eukrea CPUIMX35")
         .handle_irq = imx35_handle_irq,
         .timer = &eukrea_cpuimx35_timer,
         .init_machine = eukrea_cpuimx35_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
index ab8fbcc472b5..76a97a598b9e 100644
--- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
+++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
@@ -170,4 +170,5 @@ MACHINE_START(EUKREA_CPUIMX25SD, "Eukrea CPUIMX25")
         .handle_irq = imx25_handle_irq,
         .timer = &eukrea_cpuimx25_timer,
         .init_machine = eukrea_cpuimx25_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index 38eb9e45110b..c2766ae02b4f 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -282,4 +282,5 @@ MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
         .handle_irq = imx27_handle_irq,
         .timer = &visstrim_m10_timer,
         .init_machine = visstrim_m10_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27ipcam.c b/arch/arm/mach-imx/mach-imx27ipcam.c
index 7052155d0557..c9d350c5dcc8 100644
--- a/arch/arm/mach-imx/mach-imx27ipcam.c
+++ b/arch/arm/mach-imx/mach-imx27ipcam.c
@@ -78,4 +78,5 @@ MACHINE_START(IMX27IPCAM, "Freescale IMX27IPCAM")
         .handle_irq = imx27_handle_irq,
         .timer = &mx27ipcam_timer,
         .init_machine = mx27ipcam_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c
index 8d6a63521f17..1f45b9189229 100644
--- a/arch/arm/mach-imx/mach-imx27lite.c
+++ b/arch/arm/mach-imx/mach-imx27lite.c
@@ -84,4 +84,5 @@ MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE")
         .handle_irq = imx27_handle_irq,
         .timer = &mx27lite_timer,
         .init_machine = mx27lite_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index bee633496f7b..c25728106917 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -10,10 +10,13 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
+#include <linux/delay.h>
 #include <linux/init.h>
+#include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/irqdomain.h>
 #include <linux/of.h>
+#include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/phy.h>
@@ -25,6 +28,36 @@
 #include <mach/common.h>
 #include <mach/hardware.h>
 
+void imx6q_restart(char mode, const char *cmd)
+{
+        struct device_node *np;
+        void __iomem *wdog_base;
+
+        np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
+        wdog_base = of_iomap(np, 0);
+        if (!wdog_base)
+                goto soft;
+
+        imx_src_prepare_restart();
+
+        /* enable wdog */
+        writew_relaxed(1 << 2, wdog_base);
+        /* write twice to ensure the request will not get ignored */
+        writew_relaxed(1 << 2, wdog_base);
+
+        /* wait for reset to assert ... */
+        mdelay(500);
+
+        pr_err("Watchdog reset failed to assert reset\n");
+
+        /* delay to allow the serial port to show the message */
+        mdelay(50);
+
+soft:
+        /* we'll take a jump through zero as a poor second */
+        soft_restart(0);
+}
+
 /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
 static int ksz9021rn_phy_fixup(struct phy_device *phydev)
 {
@@ -105,4 +138,5 @@ DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
         .timer          = &imx6q_timer,
         .init_machine   = imx6q_init_machine,
         .dt_compat      = imx6q_dt_compat,
+        .restart        = imx6q_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c
index 5f37f89e40fa..fc78e8071cd1 100644
--- a/arch/arm/mach-imx/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c
@@ -279,4 +279,5 @@ MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
         .handle_irq = imx31_handle_irq,
         .timer = &kzm_timer,
         .init_machine = kzm_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c
index fc49785e7340..97046088ff1a 100644
--- a/arch/arm/mach-imx/mach-mx1ads.c
+++ b/arch/arm/mach-imx/mach-mx1ads.c
@@ -147,6 +147,7 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS")
         .handle_irq = imx1_handle_irq,
         .timer = &mx1ads_timer,
         .init_machine = mx1ads_init,
+        .restart        = mxc_restart,
 MACHINE_END
 
 MACHINE_START(MXLADS, "Freescale MXLADS")
@@ -157,4 +158,5 @@ MACHINE_START(MXLADS, "Freescale MXLADS")
         .handle_irq = imx1_handle_irq,
         .timer = &mx1ads_timer,
         .init_machine = mx1ads_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c
index 25f84028d055..8d9f95514b1f 100644
--- a/arch/arm/mach-imx/mach-mx21ads.c
+++ b/arch/arm/mach-imx/mach-mx21ads.c
@@ -312,4 +312,5 @@ MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
         .handle_irq = imx21_handle_irq,
         .timer = &mx21ads_timer,
         .init_machine = mx21ads_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c
index 88dccf122243..f26734298aa6 100644
--- a/arch/arm/mach-imx/mach-mx25_3ds.c
+++ b/arch/arm/mach-imx/mach-mx25_3ds.c
@@ -270,4 +270,5 @@ MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)")
         .handle_irq = imx25_handle_irq,
         .timer = &mx25pdk_timer,
         .init_machine = mx25pdk_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c
index ba232d79fa81..18f35816706a 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -425,4 +425,5 @@ MACHINE_START(MX27_3DS, "Freescale MX27PDK")
         .handle_irq = imx27_handle_irq,
         .timer = &mx27pdk_timer,
         .init_machine = mx27pdk_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c
index 74dd5731eb61..0228d2e07fe0 100644
--- a/arch/arm/mach-imx/mach-mx27ads.c
+++ b/arch/arm/mach-imx/mach-mx27ads.c
@@ -351,4 +351,5 @@ MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
         .handle_irq = imx27_handle_irq,
         .timer = &mx27ads_timer,
         .init_machine = mx27ads_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c
index 00bb308ce1cd..89c33258639f 100644
--- a/arch/arm/mach-imx/mach-mx31_3ds.c
+++ b/arch/arm/mach-imx/mach-mx31_3ds.c
@@ -770,4 +770,5 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
         .timer = &mx31_3ds_timer,
         .init_machine = mx31_3ds_init,
         .reserve = mx31_3ds_reserve,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c
index 9cc1a49053bb..4917aab0e253 100644
--- a/arch/arm/mach-imx/mach-mx31ads.c
+++ b/arch/arm/mach-imx/mach-mx31ads.c
@@ -542,4 +542,5 @@ MACHINE_START(MX31ADS, "Freescale MX31ADS")
         .handle_irq = imx31_handle_irq,
         .timer = &mx31ads_timer,
         .init_machine = mx31ads_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c
index 102ec99357cc..02401bbd6d53 100644
--- a/arch/arm/mach-imx/mach-mx31lilly.c
+++ b/arch/arm/mach-imx/mach-mx31lilly.c
@@ -303,4 +303,5 @@ MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
         .handle_irq = imx31_handle_irq,
         .timer = &mx31lilly_timer,
         .init_machine = mx31lilly_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c
index 5366d2de18fd..ef80751712e7 100644
--- a/arch/arm/mach-imx/mach-mx31lite.c
+++ b/arch/arm/mach-imx/mach-mx31lite.c
@@ -287,4 +287,5 @@ MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
         .handle_irq = imx31_handle_irq,
         .timer = &mx31lite_timer,
         .init_machine = mx31lite_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c
index 93269150309c..b95981dacb2b 100644
--- a/arch/arm/mach-imx/mach-mx31moboard.c
+++ b/arch/arm/mach-imx/mach-mx31moboard.c
@@ -600,4 +600,5 @@ MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
         .handle_irq = imx31_handle_irq,
         .timer = &mx31moboard_timer,
         .init_machine = mx31moboard_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c
index 7a462025a0f7..0af6c9c5b3fd 100644
--- a/arch/arm/mach-imx/mach-mx35_3ds.c
+++ b/arch/arm/mach-imx/mach-mx35_3ds.c
@@ -224,4 +224,5 @@ MACHINE_START(MX35_3DS, "Freescale MX35PDK")
         .handle_irq = imx35_handle_irq,
         .timer = &mx35pdk_timer,
         .init_machine = mx35_3ds_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c
index 125c19643b0f..8b3d3f07d894 100644
--- a/arch/arm/mach-imx/mach-mxt_td60.c
+++ b/arch/arm/mach-imx/mach-mxt_td60.c
@@ -274,4 +274,5 @@ MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
         .handle_irq = imx27_handle_irq,
         .timer = &mxt_td60_timer,
         .init_machine = mxt_td60_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c
index 26072f4b02e3..d3b9c6b5edde 100644
--- a/arch/arm/mach-imx/mach-pca100.c
+++ b/arch/arm/mach-imx/mach-pca100.c
@@ -442,4 +442,5 @@ MACHINE_START(PCA100, "phyCARD-i.MX27")
         .handle_irq = imx27_handle_irq,
         .init_machine = pca100_init,
         .timer = &pca100_timer,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c
index efd6b536ef6a..d7e151669ed3 100644
--- a/arch/arm/mach-imx/mach-pcm037.c
+++ b/arch/arm/mach-imx/mach-pcm037.c
@@ -696,4 +696,5 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037")
         .handle_irq = imx31_handle_irq,
         .timer = &pcm037_timer,
         .init_machine = pcm037_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
index a17e9c7dfca0..16f126da9f8f 100644
--- a/arch/arm/mach-imx/mach-pcm038.c
+++ b/arch/arm/mach-imx/mach-pcm038.c
@@ -357,4 +357,5 @@ MACHINE_START(PCM038, "phyCORE-i.MX27")
         .handle_irq = imx27_handle_irq,
         .timer = &pcm038_timer,
         .init_machine = pcm038_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c
index 7366c2ae3ea5..06dc106519ae 100644
--- a/arch/arm/mach-imx/mach-pcm043.c
+++ b/arch/arm/mach-imx/mach-pcm043.c
@@ -425,4 +425,5 @@ MACHINE_START(PCM043, "Phytec Phycore pcm043")
         .handle_irq = imx35_handle_irq,
         .timer = &pcm043_timer,
         .init_machine = pcm043_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c
index 4ff5faf102a8..260621055b6b 100644
--- a/arch/arm/mach-imx/mach-qong.c
+++ b/arch/arm/mach-imx/mach-qong.c
@@ -273,4 +273,5 @@ MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
         .handle_irq = imx31_handle_irq,
         .timer = &qong_timer,
         .init_machine = qong_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c
index bb6e5b25d8d0..cb9ceae2f648 100644
--- a/arch/arm/mach-imx/mach-scb9328.c
+++ b/arch/arm/mach-imx/mach-scb9328.c
@@ -144,4 +144,5 @@ MACHINE_START(SCB9328, "Synertronixx scb9328")
         .handle_irq = imx1_handle_irq,
         .timer = &scb9328_timer,
         .init_machine = scb9328_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c
index 69092458f2d9..033257e553ef 100644
--- a/arch/arm/mach-imx/mach-vpr200.c
+++ b/arch/arm/mach-imx/mach-vpr200.c
@@ -322,4 +322,5 @@ MACHINE_START(VPR200, "VPR200")
         .handle_irq = imx35_handle_irq,
         .timer = &vpr200_timer,
         .init_machine = vpr200_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c
index a8e33681b732..4bde04f99e38 100644
--- a/arch/arm/mach-imx/src.c
+++ b/arch/arm/mach-imx/src.c
@@ -19,6 +19,7 @@
 
 #define SRC_SCR                         0x000
 #define SRC_GPR1                        0x020
+#define BP_SRC_SCR_WARM_RESET_ENABLE    0
 #define BP_SRC_SCR_CORE1_RST            14
 #define BP_SRC_SCR_CORE1_ENABLE         22
 
@@ -46,11 +47,33 @@ void imx_set_cpu_jump(int cpu, void *jump_addr)
                        src_base + SRC_GPR1 + cpu * 8);
 }
 
+void imx_src_prepare_restart(void)
+{
+        u32 val;
+
+        /* clear enable bits of secondary cores */
+        val = readl_relaxed(src_base + SRC_SCR);
+        val &= ~(0x7 << BP_SRC_SCR_CORE1_ENABLE);
+        writel_relaxed(val, src_base + SRC_SCR);
+
+        /* clear persistent entry register of primary core */
+        writel_relaxed(0, src_base + SRC_GPR1);
+}
+
 void __init imx_src_init(void)
 {
         struct device_node *np;
+        u32 val;
 
         np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-src");
         src_base = of_iomap(np, 0);
         WARN_ON(!src_base);
+
+        /*
+         * force warm reset sources to generate cold reset
+         * for a more reliable restart
+         */
+        val = readl_relaxed(src_base + SRC_SCR);
+        val &= ~(1 << BP_SRC_SCR_WARM_RESET_ENABLE);
+        writel_relaxed(val, src_base + SRC_SCR);
 }
diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig
index dfd18f3b50e8..350e26636a06 100644
--- a/arch/arm/mach-integrator/Kconfig
+++ b/arch/arm/mach-integrator/Kconfig
@@ -6,6 +6,8 @@ config ARCH_INTEGRATOR_AP
         bool "Support Integrator/AP and Integrator/PP2 platforms"
         select CLKSRC_MMIO
         select MIGHT_HAVE_PCI
+        select SERIAL_AMBA_PL010
+        select SERIAL_AMBA_PL010_CONSOLE
         help
           Include support for the ARM(R) Integrator/AP and
           Integrator/PP2 platforms.
@@ -15,6 +17,8 @@ config ARCH_INTEGRATOR_CP
         select ARCH_CINTEGRATOR
         select ARM_TIMER_SP804
         select PLAT_VERSATILE_CLCD
+        select SERIAL_AMBA_PL011
+        select SERIAL_AMBA_PL011_CONSOLE
         help
           Include support for the ARM(R) Integrator CP platform.
 
diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h
index a08f9b0299df..899561d8db28 100644
--- a/arch/arm/mach-integrator/common.h
+++ b/arch/arm/mach-integrator/common.h
@@ -1,2 +1,3 @@
 void integrator_init_early(void);
 void integrator_reserve(void);
+void integrator_restart(char, const char *);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 4b38e13667ac..019f0ab08f66 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -29,6 +29,7 @@
 #include <mach/cm.h>
 #include <asm/system.h>
 #include <asm/leds.h>
+#include <asm/mach-types.h>
 #include <asm/mach/time.h>
 #include <asm/pgtable.h>
 
@@ -44,7 +45,6 @@ static struct amba_device rtc_device = {
                 .flags  = IORESOURCE_MEM,
         },
         .irq            = { IRQ_RTCINT, NO_IRQ },
-        .periphid       = 0x00041030,
 };
 
 static struct amba_device uart0_device = {
@@ -58,7 +58,6 @@ static struct amba_device uart0_device = {
                 .flags  = IORESOURCE_MEM,
         },
         .irq            = { IRQ_UARTINT0, NO_IRQ },
-        .periphid       = 0x0041010,
 };
 
 static struct amba_device uart1_device = {
@@ -72,7 +71,6 @@ static struct amba_device uart1_device = {
                 .flags  = IORESOURCE_MEM,
         },
         .irq            = { IRQ_UARTINT1, NO_IRQ },
-        .periphid       = 0x0041010,
 };
 
 static struct amba_device kmi0_device = {
@@ -85,7 +83,6 @@ static struct amba_device kmi0_device = {
                 .flags  = IORESOURCE_MEM,
         },
         .irq            = { IRQ_KMIINT0, NO_IRQ },
-        .periphid       = 0x00041050,
 };
 
 static struct amba_device kmi1_device = {
@@ -98,7 +95,6 @@ static struct amba_device kmi1_device = {
                 .flags  = IORESOURCE_MEM,
         },
         .irq            = { IRQ_KMIINT1, NO_IRQ },
-        .periphid       = 0x00041050,
 };
 
 static struct amba_device *amba_devs[] __initdata = {
@@ -157,6 +153,19 @@ static int __init integrator_init(void)
 {
         int i;
 
+        /*
+         * The Integrator/AP lacks necessary AMBA PrimeCell IDs, so we need to
+         * hard-code them. The Integator/CP and forward have proper cell IDs.
+         * Else we leave them undefined to the bus driver can autoprobe them.
+         */
+        if (machine_is_integrator()) {
+                rtc_device.periphid     = 0x00041030;
+                uart0_device.periphid   = 0x00041010;
+                uart1_device.periphid   = 0x00041010;
+                kmi0_device.periphid    = 0x00041050;
+                kmi1_device.periphid    = 0x00041050;
+        }
+
         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
                 struct amba_device *d = amba_devs[i];
                 amba_device_register(d, &iomem_resource);
@@ -238,3 +247,11 @@ void __init integrator_reserve(void)
 {
         memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET);
 }
+
+/*
+ * To reset, we hit the on-board reset register in the system FPGA
+ */
+void integrator_restart(char mode, const char *cmd)
+{
+        cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
+}
diff --git a/arch/arm/mach-integrator/include/mach/system.h b/arch/arm/mach-integrator/include/mach/system.h
index e1551b8dab77..901514eba4a6 100644
--- a/arch/arm/mach-integrator/include/mach/system.h
+++ b/arch/arm/mach-integrator/include/mach/system.h
@@ -21,8 +21,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <mach/cm.h>
-
 static inline void arch_idle(void)
 {
         /*
@@ -32,13 +30,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /*
-         * To reset, we hit the on-board reset register
-         * in the system FPGA
-         */
-        cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
-}
-
 #endif
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index a1769f35a86e..21a1d6cbef40 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -472,4 +472,5 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
         .init_irq       = ap_init_irq,
         .timer          = &ap_timer,
         .init_machine   = ap_init,
+        .restart        = integrator_restart,
 MACHINE_END
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 5de49c33e4d4..3a730d447c9a 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -499,4 +499,5 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
         .init_irq       = intcp_init_irq,
         .timer          = &cp_timer,
         .init_machine   = intcp_init,
+        .restart        = integrator_restart,
 MACHINE_END
diff --git a/arch/arm/mach-iop13xx/include/mach/iop13xx.h b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
index 52b7fab7ef60..07e9ff7adafb 100644
--- a/arch/arm/mach-iop13xx/include/mach/iop13xx.h
+++ b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
@@ -10,6 +10,7 @@ void iop13xx_map_io(void);
 void iop13xx_platform_init(void);
 void iop13xx_add_tpmi_devices(void);
 void iop13xx_init_irq(void);
+void iop13xx_restart(char, const char *);
 
 /* CPUID CP6 R0 Page 0 */
 static inline int iop13xx_cpu_id(void)
diff --git a/arch/arm/mach-iop13xx/include/mach/system.h b/arch/arm/mach-iop13xx/include/mach/system.h
index d0c66ef450a7..1f31ed3f8ae2 100644
--- a/arch/arm/mach-iop13xx/include/mach/system.h
+++ b/arch/arm/mach-iop13xx/include/mach/system.h
@@ -7,21 +7,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-#include <mach/iop13xx.h>
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /*
-         * Reset the internal bus (warning both cores are reset)
-         */
-        write_wdtcr(IOP_WDTCR_EN_ARM);
-        write_wdtcr(IOP_WDTCR_EN);
-        write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET);
-        write_wdtcr(0x1000);
-
-        for(;;);
-}
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
index 4cf2cc477eae..abaee8833588 100644
--- a/arch/arm/mach-iop13xx/iq81340mc.c
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -96,4 +96,5 @@ MACHINE_START(IQ81340MC, "Intel IQ81340MC")
         .init_irq       = iop13xx_init_irq,
         .timer          = &iq81340mc_timer,
         .init_machine   = iq81340mc_init,
+        .restart        = iop13xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
index cd9e27499a1e..690916a09dc6 100644
--- a/arch/arm/mach-iop13xx/iq81340sc.c
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -98,4 +98,5 @@ MACHINE_START(IQ81340SC, "Intel IQ81340SC")
         .init_irq       = iop13xx_init_irq,
         .timer          = &iq81340sc_timer,
         .init_machine   = iq81340sc_init,
+        .restart        = iop13xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c
index a5b989728b9e..daabb1fa6c2c 100644
--- a/arch/arm/mach-iop13xx/setup.c
+++ b/arch/arm/mach-iop13xx/setup.c
@@ -606,3 +606,14 @@ static int __init iop13xx_init_adma_setup(char *str)
 __setup("iop13xx_init_adma", iop13xx_init_adma_setup);
 __setup("iop13xx_init_uart", iop13xx_init_uart_setup);
 __setup("iop13xx_init_i2c", iop13xx_init_i2c_setup);
+
+void iop13xx_restart(char mode, const char *cmd)
+{
+        /*
+         * Reset the internal bus (warning both cores are reset)
+         */
+        write_wdtcr(IOP_WDTCR_EN_ARM);
+        write_wdtcr(IOP_WDTCR_EN);
+        write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET);
+        write_wdtcr(0x1000);
+}
diff --git a/arch/arm/mach-iop32x/em7210.c b/arch/arm/mach-iop32x/em7210.c
index 4325055d4e19..24069e03fdc1 100644
--- a/arch/arm/mach-iop32x/em7210.c
+++ b/arch/arm/mach-iop32x/em7210.c
@@ -208,4 +208,5 @@ MACHINE_START(EM7210, "Lanner EM7210")
         .init_irq       = iop32x_init_irq,
         .timer          = &em7210_timer,
         .init_machine   = em7210_init_machine,
+        .restart        = iop3xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c
index 0edc88020577..204e1d1cd766 100644
--- a/arch/arm/mach-iop32x/glantank.c
+++ b/arch/arm/mach-iop32x/glantank.c
@@ -212,4 +212,5 @@ MACHINE_START(GLANTANK, "GLAN Tank")
         .init_irq       = iop32x_init_irq,
         .timer          = &glantank_timer,
         .init_machine   = glantank_init_machine,
+        .restart        = iop3xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h
index b4f83e5973b2..4a88727bca98 100644
--- a/arch/arm/mach-iop32x/include/mach/system.h
+++ b/arch/arm/mach-iop32x/include/mach/system.h
@@ -7,26 +7,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-#include <asm/mach-types.h>
-#include <asm/hardware/iop3xx.h>
-#include <mach/n2100.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        if (machine_is_n2100()) {
-                gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW);
-                gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT);
-                while (1)
-                        ;
-        }
-
-        *IOP3XX_PCSR = 0x30;
-
-        /* Jump into ROM at address 0 */
-        soft_restart(0);
-}
diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c
index 9e7aaccfeba0..3eb642af1cdc 100644
--- a/arch/arm/mach-iop32x/iq31244.c
+++ b/arch/arm/mach-iop32x/iq31244.c
@@ -318,6 +318,7 @@ MACHINE_START(IQ31244, "Intel IQ31244")
         .init_irq       = iop32x_init_irq,
         .timer          = &iq31244_timer,
         .init_machine   = iq31244_init_machine,
+        .restart        = iop3xx_restart,
 MACHINE_END
 
 /* There should have been an ep80219 machine identifier from the beginning.
@@ -332,4 +333,5 @@ MACHINE_START(EP80219, "Intel EP80219")
         .init_irq       = iop32x_init_irq,
         .timer          = &iq31244_timer,
         .init_machine   = iq31244_init_machine,
+        .restart        = iop3xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c
index 53ea86f649dd..2ec724b58a2c 100644
--- a/arch/arm/mach-iop32x/iq80321.c
+++ b/arch/arm/mach-iop32x/iq80321.c
@@ -191,4 +191,5 @@ MACHINE_START(IQ80321, "Intel IQ80321")
         .init_irq       = iop32x_init_irq,
         .timer          = &iq80321_timer,
         .init_machine   = iq80321_init_machine,
+        .restart        = iop3xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c
index d7269279968c..6b6d55912444 100644
--- a/arch/arm/mach-iop32x/n2100.c
+++ b/arch/arm/mach-iop32x/n2100.c
@@ -291,6 +291,14 @@ static void n2100_power_off(void)
                 ;
 }
 
+static void n2100_restart(char mode, const char *cmd)
+{
+        gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW);
+        gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT);
+        while (1)
+                ;
+}
+
 
 static struct timer_list power_button_poll_timer;
 
@@ -332,4 +340,5 @@ MACHINE_START(N2100, "Thecus N2100")
         .init_irq       = iop32x_init_irq,
         .timer          = &n2100_timer,
         .init_machine   = n2100_init_machine,
+        .restart        = n2100_restart,
 MACHINE_END
diff --git a/arch/arm/mach-iop33x/include/mach/system.h b/arch/arm/mach-iop33x/include/mach/system.h
index 86d1b20dd692..4f98e765397c 100644
--- a/arch/arm/mach-iop33x/include/mach/system.h
+++ b/arch/arm/mach-iop33x/include/mach/system.h
@@ -7,17 +7,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-#include <asm/hardware/iop3xx.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        *IOP3XX_PCSR = 0x30;
-
-        /* Jump into ROM at address 0 */
-        soft_restart(0);
-}
diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c
index 9e14ccc56f8e..abce934f3816 100644
--- a/arch/arm/mach-iop33x/iq80331.c
+++ b/arch/arm/mach-iop33x/iq80331.c
@@ -146,4 +146,5 @@ MACHINE_START(IQ80331, "Intel IQ80331")
         .init_irq       = iop33x_init_irq,
         .timer          = &iq80331_timer,
         .init_machine   = iq80331_init_machine,
+        .restart        = iop3xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c
index 09c899a2523f..7513559e25bb 100644
--- a/arch/arm/mach-iop33x/iq80332.c
+++ b/arch/arm/mach-iop33x/iq80332.c
@@ -146,4 +146,5 @@ MACHINE_START(IQ80332, "Intel IQ80332")
         .init_irq       = iop33x_init_irq,
         .timer          = &iq80332_timer,
         .init_machine   = iq80332_init_machine,
+        .restart        = iop3xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index 24f0fe35f4ad..81c45370a4e6 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -515,3 +515,7 @@ void __init ixp2000_init_irq(void)
         }
 }
 
+void ixp2000_restart(char mode, const char *cmd)
+{
+        ixp2000_reg_wrb(IXP2000_RESET0, RSTALL);
+}
diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c
index af9994537e01..ee525416f0d2 100644
--- a/arch/arm/mach-ixp2000/enp2611.c
+++ b/arch/arm/mach-ixp2000/enp2611.c
@@ -259,6 +259,7 @@ MACHINE_START(ENP2611, "Radisys ENP-2611 PCI network processor board")
         .init_irq       = ixp2000_init_irq,
         .timer          = &enp2611_timer,
         .init_machine   = enp2611_init_machine,
+        .restart        = ixp2000_restart,
 MACHINE_END
 
 
diff --git a/arch/arm/mach-ixp2000/include/mach/platform.h b/arch/arm/mach-ixp2000/include/mach/platform.h
index 42182c79ed90..bb0f8dcf9ee1 100644
--- a/arch/arm/mach-ixp2000/include/mach/platform.h
+++ b/arch/arm/mach-ixp2000/include/mach/platform.h
@@ -122,6 +122,7 @@ void ixp2000_map_io(void);
 void ixp2000_uart_init(void);
 void ixp2000_init_irq(void);
 void ixp2000_init_time(unsigned long);
+void ixp2000_restart(char, const char *);
 unsigned long ixp2000_gettimeoffset(void);
 
 struct pci_sys_data;
diff --git a/arch/arm/mach-ixp2000/include/mach/system.h b/arch/arm/mach-ixp2000/include/mach/system.h
index 810df7b93982..a7fb08b2b8e7 100644
--- a/arch/arm/mach-ixp2000/include/mach/system.h
+++ b/arch/arm/mach-ixp2000/include/mach/system.h
@@ -8,40 +8,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-
-#include <mach/hardware.h>
-#include <asm/mach-types.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /*
-         * Reset flash banking register so that we are pointing at
-         * RedBoot bank.
-         */
-        if (machine_is_ixdp2401()) {
-                ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
-                                        ((0 >> IXDP2X01_FLASH_WINDOW_BITS)
-                                                | IXDP2X01_CPLD_FLASH_INTERN));
-                ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff);
-        }
-
-        /*
-         * On IXDP2801 we need to write this magic sequence to the CPLD
-         * to cause a complete reset of the CPU and all external devices
-         * and move the flash bank register back to 0.
-         */
-        if (machine_is_ixdp2801() || machine_is_ixdp28x5()) {
-                unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG;
-
-                reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF);
-                ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg);
-                ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000);
-        }
-
-        ixp2000_reg_wrb(IXP2000_RESET0, RSTALL);
-}
diff --git a/arch/arm/mach-ixp2000/ixdp2400.c b/arch/arm/mach-ixp2000/ixdp2400.c
index f7dfd9700141..f53e911ec94a 100644
--- a/arch/arm/mach-ixp2000/ixdp2400.c
+++ b/arch/arm/mach-ixp2000/ixdp2400.c
@@ -176,5 +176,6 @@ MACHINE_START(IXDP2400, "Intel IXDP2400 Development Platform")
         .init_irq       = ixdp2400_init_irq,
         .timer          = &ixdp2400_timer,
         .init_machine   = ixdp2x00_init_machine,
+        .restart        = ixp2000_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-ixp2000/ixdp2800.c b/arch/arm/mach-ixp2000/ixdp2800.c
index d33bcac1ec92..a2e7c393e74f 100644
--- a/arch/arm/mach-ixp2000/ixdp2800.c
+++ b/arch/arm/mach-ixp2000/ixdp2800.c
@@ -291,5 +291,6 @@ MACHINE_START(IXDP2800, "Intel IXDP2800 Development Platform")
         .init_irq       = ixdp2800_init_irq,
         .timer          = &ixdp2800_timer,
         .init_machine   = ixdp2x00_init_machine,
+        .restart        = ixp2000_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c
index 61a28676b5be..7632beadabf6 100644
--- a/arch/arm/mach-ixp2000/ixdp2x01.c
+++ b/arch/arm/mach-ixp2000/ixdp2x01.c
@@ -413,6 +413,35 @@ static void __init ixdp2x01_init_machine(void)
         ixdp2x01_uart_init();
 }
 
+static void ixdp2401_restart(char mode, const char *cmd)
+{
+        /*
+         * Reset flash banking register so that we are pointing at
+         * RedBoot bank.
+         */
+        ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
+                                ((0 >> IXDP2X01_FLASH_WINDOW_BITS)
+                                        | IXDP2X01_CPLD_FLASH_INTERN));
+        ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff);
+
+        ixp2000_restart(mode, cmd);
+}
+
+static void ixdp280x_restart(char mode, const char *cmd)
+{
+        /*
+         * On IXDP2801 we need to write this magic sequence to the CPLD
+         * to cause a complete reset of the CPU and all external devices
+         * and move the flash bank register back to 0.
+         */
+        unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG;
+
+        reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF);
+        ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg);
+        ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000);
+
+        ixp2000_restart(mode, cmd);
+}
 
 #ifdef CONFIG_ARCH_IXDP2401
 MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform")
@@ -422,6 +451,7 @@ MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform")
         .init_irq       = ixdp2x01_init_irq,
         .timer          = &ixdp2x01_timer,
         .init_machine   = ixdp2x01_init_machine,
+        .restart        = ixdp2401_restart,
 MACHINE_END
 #endif
 
@@ -433,6 +463,7 @@ MACHINE_START(IXDP2801, "Intel IXDP2801 Development Platform")
         .init_irq       = ixdp2x01_init_irq,
         .timer          = &ixdp2x01_timer,
         .init_machine   = ixdp2x01_init_machine,
+        .restart        = ixdp280x_restart,
 MACHINE_END
 
 /*
@@ -446,6 +477,7 @@ MACHINE_START(IXDP28X5, "Intel IXDP2805/2855 Development Platform")
         .init_irq       = ixdp2x01_init_irq,
         .timer          = &ixdp2x01_timer,
         .init_machine   = ixdp2x01_init_machine,
+        .restart        = ixdp280x_restart,
 MACHINE_END
 #endif
 
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index a1bee33d183e..0923bb905cc0 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -444,3 +444,9 @@ void __init ixp23xx_sys_init(void)
         *IXP23XX_EXP_UNIT_FUSE |= 0xf;
         platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices));
 }
+
+void ixp23xx_restart(char mode, const char *cmd)
+{
+        /* Use on-chip reset capability */
+        *IXP23XX_RESET0 |= IXP23XX_RST_ALL;
+}
diff --git a/arch/arm/mach-ixp23xx/espresso.c b/arch/arm/mach-ixp23xx/espresso.c
index 30dd31652e9d..8f2487e1fc4e 100644
--- a/arch/arm/mach-ixp23xx/espresso.c
+++ b/arch/arm/mach-ixp23xx/espresso.c
@@ -90,4 +90,5 @@ MACHINE_START(ESPRESSO, "IP Fabrics Double Espresso")
         .timer          = &ixp23xx_timer,
         .atag_offset    = 0x100,
         .init_machine   = espresso_init,
+        .restart        = ixp23xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ixp23xx/include/mach/platform.h b/arch/arm/mach-ixp23xx/include/mach/platform.h
index db9d9416e5e4..50de558e722e 100644
--- a/arch/arm/mach-ixp23xx/include/mach/platform.h
+++ b/arch/arm/mach-ixp23xx/include/mach/platform.h
@@ -34,6 +34,7 @@ struct pci_sys_data;
 void ixp23xx_map_io(void);
 void ixp23xx_init_irq(void);
 void ixp23xx_sys_init(void);
+void ixp23xx_restart(char, const char *);
 int ixp23xx_pci_setup(int, struct pci_sys_data *);
 void ixp23xx_pci_preinit(void);
 struct pci_bus *ixp23xx_pci_scan_bus(int, struct pci_sys_data*);
diff --git a/arch/arm/mach-ixp23xx/include/mach/system.h b/arch/arm/mach-ixp23xx/include/mach/system.h
index 8920ff2dff1f..277dda7334b9 100644
--- a/arch/arm/mach-ixp23xx/include/mach/system.h
+++ b/arch/arm/mach-ixp23xx/include/mach/system.h
@@ -7,10 +7,6 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-
-#include <mach/hardware.h>
-#include <asm/mach-types.h>
-
 static inline void arch_idle(void)
 {
 #if 0
@@ -18,16 +14,3 @@ static inline void arch_idle(void)
                 cpu_do_idle();
 #endif
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /* First try machine specific support */
-        if (machine_is_ixdp2351()) {
-                *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_MAGIC;
-                (void) *IXDP2351_CPLD_RESET1_REG;
-                *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_ENABLE;
-        }
-
-        /* Use on-chip reset capability */
-        *IXP23XX_RESET0 |= IXP23XX_RST_ALL;
-}
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
index b3a57e0f3419..5d5dd3e8d069 100644
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -326,6 +326,17 @@ static void __init ixdp2351_init(void)
         ixp23xx_sys_init();
 }
 
+static void ixdp2351_restart(char mode, const char *cmd)
+{
+        /* First try machine specific support */
+
+        *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_MAGIC;
+        (void) *IXDP2351_CPLD_RESET1_REG;
+        *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_ENABLE;
+
+        ixp23xx_restart(mode, cmd);
+}
+
 MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform")
         /* Maintainer: MontaVista Software, Inc. */
         .map_io         = ixdp2351_map_io,
@@ -333,4 +344,5 @@ MACHINE_START(IXDP2351, "Intel IXDP2351 Development Platform")
         .timer          = &ixp23xx_timer,
         .atag_offset    = 0x100,
         .init_machine   = ixdp2351_init,
+        .restart        = ixdp2351_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c
index 8f4dcbba9025..377283fc658c 100644
--- a/arch/arm/mach-ixp23xx/roadrunner.c
+++ b/arch/arm/mach-ixp23xx/roadrunner.c
@@ -177,4 +177,5 @@ MACHINE_START(ROADRUNNER, "ADI Engineering RoadRunner Development Platform")
         .timer          = &ixp23xx_timer,
         .atag_offset    = 0x100,
         .init_machine   = roadrunner_init,
+        .restart        = ixp23xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/avila-setup.c b/arch/arm/mach-ixp4xx/avila-setup.c
index 37609a22c450..a7277ad470a5 100644
--- a/arch/arm/mach-ixp4xx/avila-setup.c
+++ b/arch/arm/mach-ixp4xx/avila-setup.c
@@ -172,6 +172,7 @@ MACHINE_START(AVILA, "Gateworks Avila Network Platform")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
 
  /*
@@ -190,6 +191,7 @@ MACHINE_START(LOFT, "Giant Shoulder Inc Loft board")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
 #endif
 
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index b86a0055ab96..3841ab4146ba 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -17,7 +17,6 @@
 #include <linux/mm.h>
 #include <linux/init.h>
 #include <linux/serial.h>
-#include <linux/sched.h>
 #include <linux/tty.h>
 #include <linux/platform_device.h>
 #include <linux/serial_core.h>
@@ -403,18 +402,9 @@ void __init ixp4xx_sys_init(void)
 /*
  * sched_clock()
  */
-static DEFINE_CLOCK_DATA(cd);
-
-unsigned long long notrace sched_clock(void)
-{
-        u32 cyc = *IXP4XX_OSTS;
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace ixp4xx_update_sched_clock(void)
+static u32 notrace ixp4xx_read_sched_clock(void)
 {
-        u32 cyc = *IXP4XX_OSTS;
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return *IXP4XX_OSTS;
 }
 
 /*
@@ -430,7 +420,7 @@ unsigned long ixp4xx_timer_freq = IXP4XX_TIMER_FREQ;
 EXPORT_SYMBOL(ixp4xx_timer_freq);
 static void __init ixp4xx_clocksource_init(void)
 {
-        init_sched_clock(&cd, ixp4xx_update_sched_clock, 32, ixp4xx_timer_freq);
+        setup_sched_clock(ixp4xx_read_sched_clock, 32, ixp4xx_timer_freq);
 
         clocksource_mmio_init(NULL, "OSTS", ixp4xx_timer_freq, 200, 32,
                         ixp4xx_clocksource_read);
@@ -501,3 +491,23 @@ static void __init ixp4xx_clockevent_init(void)
 
         clockevents_register_device(&clockevent_ixp4xx);
 }
+
+void ixp4xx_restart(char mode, const char *cmd)
+{
+        if ( 1 && mode == 's') {
+                /* Jump into ROM at address 0 */
+                soft_restart(0);
+        } else {
+                /* Use on-chip reset capability */
+
+                /* set the "key" register to enable access to
+                 * "timer" and "enable" registers
+                 */
+                *IXP4XX_OSWK = IXP4XX_WDT_KEY;
+
+                /* write 0 to the timer register for an immediate reset */
+                *IXP4XX_OSWT = 0;
+
+                *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE;
+        }
+}
diff --git a/arch/arm/mach-ixp4xx/coyote-setup.c b/arch/arm/mach-ixp4xx/coyote-setup.c
index 81dfec31842b..a74f86ce8bcc 100644
--- a/arch/arm/mach-ixp4xx/coyote-setup.c
+++ b/arch/arm/mach-ixp4xx/coyote-setup.c
@@ -117,6 +117,7 @@ MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
 #endif
 
@@ -132,6 +133,7 @@ MACHINE_START(IXDPG425, "Intel IXDPG425")
         .timer          = &ixp4xx_timer,
         .atag_offset    = 0x100,
         .init_machine   = coyote_init,
+        .restart        = ixp4xx_restart,
 MACHINE_END
 #endif
 
diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c
index 8837fbca27ce..67be177b336a 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-setup.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c
@@ -286,4 +286,5 @@ MACHINE_START(DSMG600, "D-Link DSM-G600 RevA")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/fsg-setup.c b/arch/arm/mach-ixp4xx/fsg-setup.c
index 2887c3578c17..6d5818285af8 100644
--- a/arch/arm/mach-ixp4xx/fsg-setup.c
+++ b/arch/arm/mach-ixp4xx/fsg-setup.c
@@ -277,5 +277,6 @@ MACHINE_START(FSG, "Freecom FSG-3")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-ixp4xx/gateway7001-setup.c b/arch/arm/mach-ixp4xx/gateway7001-setup.c
index d69d1b053bb7..7ecf9b28f1c0 100644
--- a/arch/arm/mach-ixp4xx/gateway7001-setup.c
+++ b/arch/arm/mach-ixp4xx/gateway7001-setup.c
@@ -104,5 +104,6 @@ MACHINE_START(GATEWAY7001, "Gateway 7001 AP")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index bf6678d1a929..c0e3d69a8aec 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -504,4 +504,5 @@ MACHINE_START(GORAMO_MLR, "MultiLink")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
index aa029fc19140..a23f89391458 100644
--- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c
+++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
@@ -172,6 +172,7 @@ MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
 
 
diff --git a/arch/arm/mach-ixp4xx/include/mach/platform.h b/arch/arm/mach-ixp4xx/include/mach/platform.h
index e824c02c825a..df9250bbf13d 100644
--- a/arch/arm/mach-ixp4xx/include/mach/platform.h
+++ b/arch/arm/mach-ixp4xx/include/mach/platform.h
@@ -125,6 +125,7 @@ extern void ixp4xx_init_irq(void);
 extern void ixp4xx_sys_init(void);
 extern void ixp4xx_timer_init(void);
 extern struct sys_timer ixp4xx_timer;
+extern void ixp4xx_restart(char, const char *);
 extern void ixp4xx_pci_preinit(void);
 struct pci_sys_data;
 extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
diff --git a/arch/arm/mach-ixp4xx/include/mach/system.h b/arch/arm/mach-ixp4xx/include/mach/system.h
index 24337d9d275b..140a9bef4466 100644
--- a/arch/arm/mach-ixp4xx/include/mach/system.h
+++ b/arch/arm/mach-ixp4xx/include/mach/system.h
@@ -8,9 +8,6 @@
  * published by the Free Software Foundation.
  *
  */
-
-#include <mach/hardware.h>
-
 static inline void arch_idle(void)
 {
         /* ixp4xx does not implement the XScale PWRMODE register,
@@ -20,25 +17,3 @@ static inline void arch_idle(void)
         cpu_do_idle();
 #endif
 }
-
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        if ( 1 && mode == 's') {
-                /* Jump into ROM at address 0 */
-                soft_restart(0);
-        } else {
-                /* Use on-chip reset capability */
-
-                /* set the "key" register to enable access to
-                 * "timer" and "enable" registers
-                 */
-                *IXP4XX_OSWK = IXP4XX_WDT_KEY;
-
-                /* write 0 to the timer register for an immediate reset */
-                *IXP4XX_OSWT = 0;
-
-                *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE;
-        }
-}
-
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c
index f235f829dfa6..8a38b39999f8 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-setup.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c
@@ -261,6 +261,7 @@ MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
 #endif
 
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
index de716fa1aab6..1010eb7b0083 100644
--- a/arch/arm/mach-ixp4xx/nas100d-setup.c
+++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
@@ -321,4 +321,5 @@ MACHINE_START(NAS100D, "Iomega NAS 100d")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
index ac81ccb26bfe..aa355c360d57 100644
--- a/arch/arm/mach-ixp4xx/nslu2-setup.c
+++ b/arch/arm/mach-ixp4xx/nslu2-setup.c
@@ -307,4 +307,5 @@ MACHINE_START(NSLU2, "Linksys NSLU2")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/omixp-setup.c b/arch/arm/mach-ixp4xx/omixp-setup.c
index 3b6a81a696fc..0940869fcfdd 100644
--- a/arch/arm/mach-ixp4xx/omixp-setup.c
+++ b/arch/arm/mach-ixp4xx/omixp-setup.c
@@ -246,6 +246,7 @@ MACHINE_START(DEVIXP, "Omicron DEVIXP")
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .init_machine   = omixp_init,
+        .restart        = ixp4xx_restart,
 MACHINE_END
 #endif
 
@@ -259,6 +260,7 @@ MACHINE_START(MICCPT, "Omicron MICCPT")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
 #endif
 
@@ -269,5 +271,6 @@ MACHINE_START(MIC256, "Omicron MIC256")
         .init_irq       = ixp4xx_init_irq,
         .timer          = &ixp4xx_timer,
         .init_machine   = omixp_init,
+        .restart        = ixp4xx_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-ixp4xx/vulcan-setup.c b/arch/arm/mach-ixp4xx/vulcan-setup.c
index 27e469ef4523..9dec20683291 100644
--- a/arch/arm/mach-ixp4xx/vulcan-setup.c
+++ b/arch/arm/mach-ixp4xx/vulcan-setup.c
@@ -244,4 +244,5 @@ MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/wg302v2-setup.c b/arch/arm/mach-ixp4xx/wg302v2-setup.c
index b14144b967a7..5ac0f0a0fd8c 100644
--- a/arch/arm/mach-ixp4xx/wg302v2-setup.c
+++ b/arch/arm/mach-ixp4xx/wg302v2-setup.c
@@ -105,5 +105,6 @@ MACHINE_START(WG302V2, "Netgear WG302 v2 / WAG302 v2")
 #if defined(CONFIG_PCI)
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = ixp4xx_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index f3248cfbe51d..0bff4a916231 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -534,3 +534,19 @@ static int __init kirkwood_clock_gate(void)
         return 0;
 }
 late_initcall(kirkwood_clock_gate);
+
+void kirkwood_restart(char mode, const char *cmd)
+{
+        /*
+         * Enable soft reset to assert RSTOUTn.
+         */
+        writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
+
+        /*
+         * Assert soft reset.
+         */
+        writel(SOFT_RESET, SYSTEM_SOFT_RESET);
+
+        while (1)
+                ;
+}
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index b9b0f0968a36..1529280246d6 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -50,6 +50,7 @@ void kirkwood_uart1_init(void);
 void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay);
 void kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, int (*dev_ready)(struct mtd_info *));
 void kirkwood_audio_init(void);
+void kirkwood_restart(char, const char *);
 
 extern int kirkwood_tclk;
 extern struct sys_timer kirkwood_timer;
diff --git a/arch/arm/mach-kirkwood/d2net_v2-setup.c b/arch/arm/mach-kirkwood/d2net_v2-setup.c
index f457e07a65f0..6e1bac929ab5 100644
--- a/arch/arm/mach-kirkwood/d2net_v2-setup.c
+++ b/arch/arm/mach-kirkwood/d2net_v2-setup.c
@@ -227,4 +227,5 @@ MACHINE_START(D2NET_V2, "LaCie d2 Network v2")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
index ff4c21c1f923..d93359379598 100644
--- a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
+++ b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
@@ -103,4 +103,5 @@ MACHINE_START(DB88F6281_BP, "Marvell DB-88F6281-BP Development Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-kirkwood/dockstar-setup.c b/arch/arm/mach-kirkwood/dockstar-setup.c
index e4d199b2b1e8..61d9a552a054 100644
--- a/arch/arm/mach-kirkwood/dockstar-setup.c
+++ b/arch/arm/mach-kirkwood/dockstar-setup.c
@@ -108,4 +108,5 @@ MACHINE_START(DOCKSTAR, "Seagate FreeAgent DockStar")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-kirkwood/guruplug-setup.c b/arch/arm/mach-kirkwood/guruplug-setup.c
index 6c40f784b516..bdaed3867d13 100644
--- a/arch/arm/mach-kirkwood/guruplug-setup.c
+++ b/arch/arm/mach-kirkwood/guruplug-setup.c
@@ -127,4 +127,5 @@ MACHINE_START(GURUPLUG, "Marvell GuruPlug Reference Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-kirkwood/include/mach/system.h b/arch/arm/mach-kirkwood/include/mach/system.h
index 7568e95d279b..5fddde002b5e 100644
--- a/arch/arm/mach-kirkwood/include/mach/system.h
+++ b/arch/arm/mach-kirkwood/include/mach/system.h
@@ -9,28 +9,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <mach/bridge-regs.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /*
-         * Enable soft reset to assert RSTOUTn.
-         */
-        writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
-
-        /*
-         * Assert soft reset.
-         */
-        writel(SOFT_RESET, SYSTEM_SOFT_RESET);
-
-        while (1)
-                ;
-}
-
-
 #endif
diff --git a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
index 9a1e917352f7..85f6169c2484 100644
--- a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
+++ b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
@@ -169,4 +169,5 @@ MACHINE_START(MV88F6281GTW_GE, "Marvell 88F6281 GTW GE Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c
index 8849bcc7328e..e6bba01bae38 100644
--- a/arch/arm/mach-kirkwood/netspace_v2-setup.c
+++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c
@@ -264,6 +264,7 @@ MACHINE_START(NETSPACE_V2, "LaCie Network Space v2")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
 
@@ -275,6 +276,7 @@ MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
 
@@ -286,5 +288,6 @@ MACHINE_START(NETSPACE_MAX_V2, "LaCie Network Space Max v2")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-kirkwood/netxbig_v2-setup.c b/arch/arm/mach-kirkwood/netxbig_v2-setup.c
index 1ba12c4dff8f..31ae8de34e93 100644
--- a/arch/arm/mach-kirkwood/netxbig_v2-setup.c
+++ b/arch/arm/mach-kirkwood/netxbig_v2-setup.c
@@ -405,6 +405,7 @@ MACHINE_START(NET2BIG_V2, "LaCie 2Big Network v2")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
 
@@ -416,5 +417,6 @@ MACHINE_START(NET5BIG_V2, "LaCie 5Big Network v2")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-kirkwood/openrd-setup.c b/arch/arm/mach-kirkwood/openrd-setup.c
index 5660ca6c3d88..01f8c8992880 100644
--- a/arch/arm/mach-kirkwood/openrd-setup.c
+++ b/arch/arm/mach-kirkwood/openrd-setup.c
@@ -220,6 +220,7 @@ MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
 
@@ -232,6 +233,7 @@ MACHINE_START(OPENRD_CLIENT, "Marvell OpenRD Client Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
 
@@ -244,5 +246,6 @@ MACHINE_START(OPENRD_ULTIMATE, "Marvell OpenRD Ultimate Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
index 6663869773ab..fd2c9c8b6831 100644
--- a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
@@ -85,4 +85,5 @@ MACHINE_START(RD88F6192_NAS, "Marvell RD-88F6192-NAS Development Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c
index 66b3c05e37a6..ef922079348b 100644
--- a/arch/arm/mach-kirkwood/rd88f6281-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c
@@ -121,4 +121,5 @@ MACHINE_START(RD88F6281, "Marvell RD-88F6281 Reference Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c
index 8b102d62e82c..4ea70e5f7137 100644
--- a/arch/arm/mach-kirkwood/sheevaplug-setup.c
+++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c
@@ -107,7 +107,7 @@ static void __init sheevaplug_init(void)
         kirkwood_init();
 
         /* setup gpio pin select */
-        if (machine_is_sheeva_esata())
+        if (machine_is_esata_sheevaplug())
                 kirkwood_mpp_conf(sheeva_esata_mpp_config);
         else
                 kirkwood_mpp_conf(sheevaplug_mpp_config);
@@ -123,11 +123,11 @@ static void __init sheevaplug_init(void)
         kirkwood_ge00_init(&sheevaplug_ge00_data);
 
         /* honor lower power consumption for plugs with out eSATA */
-        if (machine_is_sheeva_esata())
+        if (machine_is_esata_sheevaplug())
                 kirkwood_sata_init(&sheeva_esata_sata_data);
 
         /* enable sd wp and sd cd on plugs with esata */
-        if (machine_is_sheeva_esata())
+        if (machine_is_esata_sheevaplug())
                 kirkwood_sdio_init(&sheeva_esata_mvsdio_data);
         else
                 kirkwood_sdio_init(&sheevaplug_mvsdio_data);
@@ -144,6 +144,7 @@ MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
 
@@ -155,5 +156,6 @@ MACHINE_START(ESATA_SHEEVAPLUG, "Marvell eSATA SheevaPlug Reference Board")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-kirkwood/t5325-setup.c b/arch/arm/mach-kirkwood/t5325-setup.c
index ea104fb5ec3d..966b2b3bb813 100644
--- a/arch/arm/mach-kirkwood/t5325-setup.c
+++ b/arch/arm/mach-kirkwood/t5325-setup.c
@@ -207,4 +207,5 @@ MACHINE_START(T5325, "HP t5325 Thin Client")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-kirkwood/ts219-setup.c b/arch/arm/mach-kirkwood/ts219-setup.c
index 262c034836d4..73e2b6ca9564 100644
--- a/arch/arm/mach-kirkwood/ts219-setup.c
+++ b/arch/arm/mach-kirkwood/ts219-setup.c
@@ -138,4 +138,5 @@ MACHINE_START(TS219, "QNAP TS-119/TS-219")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c
index b68f5b4a9ec8..5bbca2680442 100644
--- a/arch/arm/mach-kirkwood/ts41x-setup.c
+++ b/arch/arm/mach-kirkwood/ts41x-setup.c
@@ -182,4 +182,5 @@ MACHINE_START(TS41X, "QNAP TS-41x")
         .init_early     = kirkwood_init_early,
         .init_irq       = kirkwood_init_irq,
         .timer          = &kirkwood_timer,
+        .restart        = kirkwood_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ks8695/board-acs5k.c b/arch/arm/mach-ks8695/board-acs5k.c
index a91f99d265aa..255502ddd879 100644
--- a/arch/arm/mach-ks8695/board-acs5k.c
+++ b/arch/arm/mach-ks8695/board-acs5k.c
@@ -228,4 +228,5 @@ MACHINE_START(ACS5K, "Brivo Systems LLC ACS-5000 Master board")
         .init_irq       = ks8695_init_irq,
         .init_machine   = acs5k_init,
         .timer          = &ks8695_timer,
+        .restart        = ks8695_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ks8695/board-dsm320.c b/arch/arm/mach-ks8695/board-dsm320.c
index d24bcef2e2dd..e0d36cef2c56 100644
--- a/arch/arm/mach-ks8695/board-dsm320.c
+++ b/arch/arm/mach-ks8695/board-dsm320.c
@@ -126,4 +126,5 @@ MACHINE_START(DSM320, "D-Link DSM-320 Wireless Media Player")
         .init_irq       = ks8695_init_irq,
         .init_machine   = dsm320_init,
         .timer          = &ks8695_timer,
+        .restart        = ks8695_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ks8695/board-micrel.c b/arch/arm/mach-ks8695/board-micrel.c
index 16c95657f8fd..a8270725b76d 100644
--- a/arch/arm/mach-ks8695/board-micrel.c
+++ b/arch/arm/mach-ks8695/board-micrel.c
@@ -58,4 +58,5 @@ MACHINE_START(KS8695, "KS8695 Centaur Development Board")
         .init_irq       = ks8695_init_irq,
         .init_machine   = micrel_init,
         .timer          = &ks8695_timer,
+        .restart        = ks8695_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ks8695/generic.h b/arch/arm/mach-ks8695/generic.h
index 2fbfab8d5fae..f8bdb11a9c33 100644
--- a/arch/arm/mach-ks8695/generic.h
+++ b/arch/arm/mach-ks8695/generic.h
@@ -12,4 +12,5 @@
 
 extern __init void ks8695_map_io(void);
 extern __init void ks8695_init_irq(void);
+extern void ks8695_restart(char, const char *);
 extern struct sys_timer ks8695_timer;
diff --git a/arch/arm/mach-ks8695/include/mach/system.h b/arch/arm/mach-ks8695/include/mach/system.h
index ceb19c90aa52..59fe992395bf 100644
--- a/arch/arm/mach-ks8695/include/mach/system.h
+++ b/arch/arm/mach-ks8695/include/mach/system.h
@@ -14,9 +14,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <linux/io.h>
-#include <mach/regs-timer.h>
-
 static void arch_idle(void)
 {
         /*
@@ -27,22 +24,4 @@ static void arch_idle(void)
 
 }
 
-static void arch_reset(char mode, const char *cmd)
-{
-        unsigned int reg;
-
-        if (mode == 's')
-                soft_restart(0);
-
-        /* disable timer0 */
-        reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
-        __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
-
-        /* enable watchdog mode */
-        __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC);
-
-        /* re-enable timer0 */
-        __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
-}
-
 #endif
diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c
index 69c072c2c0f9..37dfcd5bd2ad 100644
--- a/arch/arm/mach-ks8695/time.c
+++ b/arch/arm/mach-ks8695/time.c
@@ -109,3 +109,21 @@ struct sys_timer ks8695_timer = {
         .offset         = ks8695_gettimeoffset,
         .resume         = ks8695_timer_setup,
 };
+
+void ks8695_restart(char mode, const char *cmd)
+{
+        unsigned int reg;
+
+        if (mode == 's')
+                soft_restart(0);
+
+        /* disable timer0 */
+        reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
+        __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
+
+        /* enable watchdog mode */
+        __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC);
+
+        /* re-enable timer0 */
+        __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
+}
diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c
index 205b2dbb565b..369b152896cd 100644
--- a/arch/arm/mach-lpc32xx/common.c
+++ b/arch/arm/mach-lpc32xx/common.c
@@ -164,7 +164,7 @@ int clk_is_sysclk_mainosc(void)
 /*
  * System reset via the watchdog timer
  */
-void lpc32xx_watchdog_reset(void)
+static void lpc32xx_watchdog_reset(void)
 {
         /* Make sure WDT clocks are enabled */
         __raw_writel(LPC32XX_CLKPWR_PWMCLK_WDOG_EN,
@@ -311,3 +311,21 @@ void __init lpc32xx_map_io(void)
 {
         iotable_init(lpc32xx_io_desc, ARRAY_SIZE(lpc32xx_io_desc));
 }
+
+void lpc23xx_restart(char mode, const char *cmd)
+{
+        switch (mode) {
+        case 's':
+        case 'h':
+                lpc32xx_watchdog_reset();
+                break;
+
+        default:
+                /* Do nothing */
+                break;
+        }
+
+        /* Wait for watchdog to reset system */
+        while (1)
+                ;
+}
diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h
index 5583f52662bd..4b4e700343c1 100644
--- a/arch/arm/mach-lpc32xx/common.h
+++ b/arch/arm/mach-lpc32xx/common.h
@@ -39,6 +39,8 @@ extern void __init lpc32xx_init_irq(void);
 extern void __init lpc32xx_map_io(void);
 extern void __init lpc32xx_serial_init(void);
 extern void __init lpc32xx_gpio_init(void);
+extern void lpc23xx_restart(char, const char *);
+
 
 /*
  * Structure used for setting up and querying the PLLS
diff --git a/arch/arm/mach-lpc32xx/include/mach/system.h b/arch/arm/mach-lpc32xx/include/mach/system.h
index d47f3b1c24b8..bf176c991520 100644
--- a/arch/arm/mach-lpc32xx/include/mach/system.h
+++ b/arch/arm/mach-lpc32xx/include/mach/system.h
@@ -24,26 +24,4 @@ static void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        extern void lpc32xx_watchdog_reset(void);
-
-        switch (mode) {
-        case 's':
-        case 'h':
-                printk(KERN_CRIT "RESET: Rebooting system\n");
-
-                lpc32xx_watchdog_reset();
-                break;
-
-        default:
-                /* Do nothing */
-                break;
-        }
-
-        /* Wait for watchdog to reset system */
-        while (1)
-                ;
-}
-
 #endif
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index 6d2f0d1b9373..ecb94114c81b 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -388,4 +388,5 @@ MACHINE_START(PHY3250, "Phytec 3250 board with the LPC3250 Microcontroller")
         .init_irq       = lpc32xx_init_irq,
         .timer          = &lpc32xx_timer,
         .init_machine   = phy3250_board_init,
+        .restart        = lpc23xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 7a60bbbce7a4..3e6dfab59ef6 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -243,6 +243,7 @@ MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = common_init,
+        .restart        = pxa168_restart,
 MACHINE_END
 
 MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
@@ -251,4 +252,5 @@ MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = common_init,
+        .restart        = pxa168_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
index 39f0878d64a0..8de3dc6131a4 100644
--- a/arch/arm/mach-mmp/avengers_lite.c
+++ b/arch/arm/mach-mmp/avengers_lite.c
@@ -45,4 +45,5 @@ MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = avengers_lite_init,
+        .restart        = pxa168_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
index 983cfb15fbde..e16f04b39b15 100644
--- a/arch/arm/mach-mmp/brownstone.c
+++ b/arch/arm/mach-mmp/brownstone.c
@@ -219,4 +219,5 @@ MACHINE_START(BROWNSTONE, "Brownstone Development Platform")
         .init_irq       = mmp2_init_irq,
         .timer          = &mmp2_timer,
         .init_machine   = brownstone_init,
+        .restart        = mmp_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c
index 5720674739f0..062b5b93c50e 100644
--- a/arch/arm/mach-mmp/common.c
+++ b/arch/arm/mach-mmp/common.c
@@ -45,3 +45,8 @@ void __init mmp_map_io(void)
         /* this is early, initialize mmp_chip_id here */
         mmp_chip_id = __raw_readl(MMP_CHIPID);
 }
+
+void mmp_restart(char mode, const char *cmd)
+{
+        soft_restart(0);
+}
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h
index ec8d65ded25c..1c9d6c1ea97a 100644
--- a/arch/arm/mach-mmp/common.h
+++ b/arch/arm/mach-mmp/common.h
@@ -6,3 +6,4 @@ extern void timer_init(int irq);
 
 extern void __init icu_init_irq(void);
 extern void __init mmp_map_io(void);
+extern void mmp_restart(char, const char *);
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index c4fd806b15b4..5a6a27a6cfd0 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -121,4 +121,5 @@ MACHINE_START(FLINT, "Flint Development Platform")
         .init_irq       = mmp2_init_irq,
         .timer          = &mmp2_timer,
         .init_machine   = flint_init,
+        .restart        = mmp_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 4665767a4f79..1e3abbe37cac 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -194,4 +194,5 @@ MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = gplugd_init,
+        .restart        = pxa168_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index 7fb568d2845b..a677aa732c26 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -5,6 +5,7 @@ struct sys_timer;
 
 extern struct sys_timer pxa168_timer;
 extern void __init pxa168_init_irq(void);
+extern void pxa168_restart(char, const char *);
 extern void pxa168_clear_keypad_wakeup(void);
 
 #include <linux/i2c.h>
diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h
index cb0637933a85..1d001eab81e1 100644
--- a/arch/arm/mach-mmp/include/mach/system.h
+++ b/arch/arm/mach-mmp/include/mach/system.h
@@ -9,18 +9,8 @@
 #ifndef __ASM_MACH_SYSTEM_H
 #define __ASM_MACH_SYSTEM_H
 
-#include <mach/cputype.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        if (cpu_is_pxa168())
-                soft_restart(0xffff0000);
-        else
-                soft_restart(0);
-}
 #endif /* __ASM_MACH_SYSTEM_H */
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
index 8bfac6612623..96cf5c8fe47d 100644
--- a/arch/arm/mach-mmp/jasper.c
+++ b/arch/arm/mach-mmp/jasper.c
@@ -175,4 +175,5 @@ MACHINE_START(MARVELL_JASPER, "Jasper Development Platform")
         .init_irq       = mmp2_init_irq,
         .timer          = &mmp2_timer,
         .init_machine   = jasper_init,
+        .restart        = mmp_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 76ca15c00e45..13f23867a86a 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -214,3 +214,8 @@ int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata)
         pxa168_device_usb_host.dev.platform_data = pdata;
         return platform_device_register(&pxa168_device_usb_host);
 }
+
+void pxa168_restart(char mode, const char *cmd)
+{
+        soft_restart(0xffff0000);
+}
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index eb5be879fd8c..257a21283ec1 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -103,4 +103,5 @@ MACHINE_START(TAVOREVB, "PXA910 Evaluation Board (aka TavorEVB)")
         .init_irq       = pxa910_init_irq,
         .timer          = &pxa910_timer,
         .init_machine   = tavorevb_init,
+        .restart        = mmp_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c
index bbe4727b96cc..8ac22a62bf1a 100644
--- a/arch/arm/mach-mmp/teton_bga.c
+++ b/arch/arm/mach-mmp/teton_bga.c
@@ -86,4 +86,5 @@ MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform")
         .init_irq       = pxa168_init_irq,
         .timer          = &pxa168_timer,
         .init_machine   = teton_bga_init,
+        .restart        = pxa168_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index 4e91ee6e27c8..71fc4ee4602c 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -25,7 +25,6 @@
 
 #include <linux/io.h>
 #include <linux/irq.h>
-#include <linux/sched.h>
 
 #include <asm/sched_clock.h>
 #include <mach/addr-map.h>
@@ -42,8 +41,6 @@
 #define MAX_DELTA               (0xfffffffe)
 #define MIN_DELTA               (16)
 
-static DEFINE_CLOCK_DATA(cd);
-
 /*
  * FIXME: the timer needs some delay to stablize the counter capture
  */
@@ -59,16 +56,9 @@ static inline uint32_t timer_read(void)
         return __raw_readl(TIMERS_VIRT_BASE + TMR_CVWR(1));
 }
 
-unsigned long long notrace sched_clock(void)
+static u32 notrace mmp_read_sched_clock(void)
 {
-        u32 cyc = timer_read();
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace mmp_update_sched_clock(void)
-{
-        u32 cyc = timer_read();
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return timer_read();
 }
 
 static irqreturn_t timer_interrupt(int irq, void *dev_id)
@@ -201,7 +191,7 @@ void __init timer_init(int irq)
 {
         timer_config();
 
-        init_sched_clock(&cd, mmp_update_sched_clock, 32, CLOCK_TICK_RATE);
+        setup_sched_clock(mmp_read_sched_clock, 32, CLOCK_TICK_RATE);
 
         ckevt.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt.shift);
         ckevt.max_delta_ns = clockevent_delta2ns(MAX_DELTA, &ckevt);
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index 176515a76989..f02658825576 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -159,4 +159,5 @@ MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform")
         .init_irq       = pxa910_init_irq,
         .timer          = &pxa910_timer,
         .init_machine   = ttc_dkb_init,
+        .restart        = mmp_restart,
 MACHINE_END
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index ebde97f5d5f0..1cd40ad301d3 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -13,7 +13,6 @@ config ARCH_MSM7X00A
         select CPU_V6
         select GPIO_MSM_V1
         select MSM_PROC_COMM
-        select HAS_MSM_DEBUG_UART_PHYS
 
 config ARCH_MSM7X30
         bool "MSM7x30"
@@ -25,7 +24,6 @@ config ARCH_MSM7X30
         select MSM_GPIOMUX
         select GPIO_MSM_V1
         select MSM_PROC_COMM
-        select HAS_MSM_DEBUG_UART_PHYS
 
 config ARCH_QSD8X50
         bool "QSD8X50"
@@ -37,7 +35,6 @@ config ARCH_QSD8X50
         select MSM_GPIOMUX
         select GPIO_MSM_V1
         select MSM_PROC_COMM
-        select HAS_MSM_DEBUG_UART_PHYS
 
 config ARCH_MSM8X60
         bool "MSM8X60"
@@ -63,19 +60,20 @@ config ARCH_MSM8960
 
 endchoice
 
+config MSM_HAS_DEBUG_UART_HS
+        bool
+
 config MSM_SOC_REV_A
         bool
 config  ARCH_MSM_SCORPIONMP
         bool
+        select HAVE_SMP
 
 config  ARCH_MSM_ARM11
         bool
 config  ARCH_MSM_SCORPION
         bool
 
-config HAS_MSM_DEBUG_UART_PHYS
-        bool
-
 config  MSM_VIC
         bool
 
@@ -152,32 +150,6 @@ config MACH_MSM8960_RUMI3
 
 endmenu
 
-config MSM_DEBUG_UART
-        int
-        default 1 if MSM_DEBUG_UART1
-        default 2 if MSM_DEBUG_UART2
-        default 3 if MSM_DEBUG_UART3
-
-if HAS_MSM_DEBUG_UART_PHYS
-choice
-        prompt "Debug UART"
-
-        default MSM_DEBUG_UART_NONE
-
-        config MSM_DEBUG_UART_NONE
-                bool "None"
-
-        config MSM_DEBUG_UART1
-                bool "UART1"
-
-        config MSM_DEBUG_UART2
-                bool "UART2"
-
-        config MSM_DEBUG_UART3
-                bool "UART3"
-endchoice
-endif
-
 config MSM_SMD_PKG3
         bool
 
diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S
index 2dc73ccddb11..3ffd8668c9a5 100644
--- a/arch/arm/mach-msm/include/mach/debug-macro.S
+++ b/arch/arm/mach-msm/include/mach/debug-macro.S
@@ -1,6 +1,7 @@
-/* arch/arm/mach-msm7200/include/mach/debug-macro.S
+/*
  *
  * Copyright (C) 2007 Google, Inc.
+ * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
  * Author: Brian Swetland <swetland@google.com>
  *
  * This software is licensed under the terms of the GNU General Public
@@ -14,40 +15,52 @@
  *
  */
 
-
-
 #include <mach/hardware.h>
 #include <mach/msm_iomap.h>
 
-#if defined(CONFIG_HAS_MSM_DEBUG_UART_PHYS) && !defined(CONFIG_MSM_DEBUG_UART_NONE)
         .macro  addruart, rp, rv, tmp
+#ifdef MSM_DEBUG_UART_PHYS
         ldr     \rp, =MSM_DEBUG_UART_PHYS
         ldr     \rv, =MSM_DEBUG_UART_BASE
+#endif
         .endm
 
-        .macro  senduart,rd,rx
+        .macro  senduart, rd, rx
+#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
+        @ Write the 1 character to UARTDM_TF
+        str     \rd, [\rx, #0x70]
+#else
         teq     \rx, #0
         strne   \rd, [\rx, #0x0C]
+#endif
         .endm
 
-        .macro  waituart,rd,rx
+        .macro  waituart, rd, rx
+#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
+        @ check for TX_EMT in UARTDM_SR
+        ldr     \rd, [\rx, #0x08]
+        tst     \rd, #0x08
+        bne     1002f
+        @ wait for TXREADY in UARTDM_ISR
+1001:   ldr     \rd, [\rx, #0x14]
+        tst     \rd, #0x80
+        beq     1001b
+1002:
+        @ Clear TX_READY by writing to the UARTDM_CR register
+        mov     \rd, #0x300
+        str     \rd, [\rx, #0x10]
+        @ Write 0x1 to NCF register
+        mov     \rd, #0x1
+        str     \rd, [\rx, #0x40]
+        @ UARTDM reg. Read to induce delay
+        ldr     \rd, [\rx, #0x08]
+#else
         @ wait for TX_READY
 1001:   ldr     \rd, [\rx, #0x08]
         tst     \rd, #0x04
         beq     1001b
-        .endm
-#else
-        .macro  addruart, rp, rv, tmp
-        mov     \rv, #0xff000000
-        orr     \rv, \rv, #0x00f00000
-        .endm
-
-        .macro  senduart,rd,rx
-        .endm
-
-        .macro  waituart,rd,rx
-        .endm
 #endif
+        .endm
 
-        .macro  busyuart,rd,rx
+        .macro  busyuart, rd, rx
         .endm
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
index 94fe9fe6feb3..8af46123dab6 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
@@ -78,18 +78,6 @@
 #define MSM_UART3_PHYS        0xA9C00000
 #define MSM_UART3_SIZE        SZ_4K
 
-#ifdef CONFIG_MSM_DEBUG_UART
-#define MSM_DEBUG_UART_BASE   0xE1000000
-#if CONFIG_MSM_DEBUG_UART == 1
-#define MSM_DEBUG_UART_PHYS   MSM_UART1_PHYS
-#elif CONFIG_MSM_DEBUG_UART == 2
-#define MSM_DEBUG_UART_PHYS   MSM_UART2_PHYS
-#elif CONFIG_MSM_DEBUG_UART == 3
-#define MSM_DEBUG_UART_PHYS   MSM_UART3_PHYS
-#endif
-#define MSM_DEBUG_UART_SIZE   SZ_4K
-#endif
-
 #define MSM_SDC1_PHYS         0xA0400000
 #define MSM_SDC1_SIZE         SZ_4K
 
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
index 37694442d1bd..198202c267c8 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
@@ -89,18 +89,6 @@
 #define MSM_UART3_PHYS        0xACC00000
 #define MSM_UART3_SIZE        SZ_4K
 
-#ifdef CONFIG_MSM_DEBUG_UART
-#define MSM_DEBUG_UART_BASE   0xE1000000
-#if CONFIG_MSM_DEBUG_UART == 1
-#define MSM_DEBUG_UART_PHYS   MSM_UART1_PHYS
-#elif CONFIG_MSM_DEBUG_UART == 2
-#define MSM_DEBUG_UART_PHYS   MSM_UART2_PHYS
-#elif CONFIG_MSM_DEBUG_UART == 3
-#define MSM_DEBUG_UART_PHYS   MSM_UART3_PHYS
-#endif
-#define MSM_DEBUG_UART_SIZE   SZ_4K
-#endif
-
 #define MSM_MDC_BASE          IOMEM(0xE0200000)
 #define MSM_MDC_PHYS          0xAA500000
 #define MSM_MDC_SIZE          SZ_1M
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
index 3c9d9602a318..800b55767e6b 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
@@ -45,4 +45,9 @@
 #define MSM8960_TMR0_PHYS       0x0208A000
 #define MSM8960_TMR0_SIZE       SZ_4K
 
+#ifdef CONFIG_DEBUG_MSM8960_UART
+#define MSM_DEBUG_UART_BASE     0xE1040000
+#define MSM_DEBUG_UART_PHYS     0x16440000
+#endif
+
 #endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
index d67cd73316f4..0faa894729b7 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
@@ -83,18 +83,6 @@
 #define MSM_UART3_PHYS        0xA9C00000
 #define MSM_UART3_SIZE        SZ_4K
 
-#ifdef CONFIG_MSM_DEBUG_UART
-#define MSM_DEBUG_UART_BASE   0xE1000000
-#if CONFIG_MSM_DEBUG_UART == 1
-#define MSM_DEBUG_UART_PHYS   MSM_UART1_PHYS
-#elif CONFIG_MSM_DEBUG_UART == 2
-#define MSM_DEBUG_UART_PHYS   MSM_UART2_PHYS
-#elif CONFIG_MSM_DEBUG_UART == 3
-#define MSM_DEBUG_UART_PHYS   MSM_UART3_PHYS
-#endif
-#define MSM_DEBUG_UART_SIZE   SZ_4K
-#endif
-
 #define MSM_MDC_BASE          IOMEM(0xE0200000)
 #define MSM_MDC_PHYS          0xAA500000
 #define MSM_MDC_SIZE          SZ_1M
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
index 3b19b8f244b8..54e12caa8d86 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
@@ -62,4 +62,9 @@
 #define MSM8X60_TMR0_PHYS       0x02040000
 #define MSM8X60_TMR0_SIZE       SZ_4K
 
+#ifdef CONFIG_DEBUG_MSM8660_UART
+#define MSM_DEBUG_UART_BASE     0xE1040000
+#define MSM_DEBUG_UART_PHYS     0x19C40000
+#endif
+
 #endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index 4ded15238b60..90682f4599d3 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -55,6 +55,18 @@
 
 #include "msm_iomap-8960.h"
 
+#define MSM_DEBUG_UART_SIZE     SZ_4K
+#if defined(CONFIG_DEBUG_MSM_UART1)
+#define MSM_DEBUG_UART_BASE     0xE1000000
+#define MSM_DEBUG_UART_PHYS     MSM_UART1_PHYS
+#elif defined(CONFIG_DEBUG_MSM_UART2)
+#define MSM_DEBUG_UART_BASE     0xE1000000
+#define MSM_DEBUG_UART_PHYS     MSM_UART2_PHYS
+#elif defined(CONFIG_DEBUG_MSM_UART3)
+#define MSM_DEBUG_UART_BASE     0xE1000000
+#define MSM_DEBUG_UART_PHYS     MSM_UART3_PHYS
+#endif
+
 /* Virtual addresses shared across all MSM targets. */
 #define MSM_CSR_BASE            IOMEM(0xE0001000)
 #define MSM_QGIC_DIST_BASE      IOMEM(0xF0000000)
diff --git a/arch/arm/mach-msm/include/mach/system.h b/arch/arm/mach-msm/include/mach/system.h
index d2e83f42ba16..311db2b35da0 100644
--- a/arch/arm/mach-msm/include/mach/system.h
+++ b/arch/arm/mach-msm/include/mach/system.h
@@ -12,16 +12,8 @@
  * GNU General Public License for more details.
  *
  */
-
-#include <mach/hardware.h>
-
 void arch_idle(void);
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        for (;;) ;  /* depends on IPC w/ other core */
-}
-
 /* low level hardware reset hook -- for example, hitting the
  * PSHOLD line on the PMIC to hard reset the system
  */
diff --git a/arch/arm/mach-msm/include/mach/uncompress.h b/arch/arm/mach-msm/include/mach/uncompress.h
index d94292c29d8e..169a84007456 100644
--- a/arch/arm/mach-msm/include/mach/uncompress.h
+++ b/arch/arm/mach-msm/include/mach/uncompress.h
@@ -1,6 +1,6 @@
-/* arch/arm/mach-msm/include/mach/uncompress.h
- *
+/*
  * Copyright (C) 2007 Google, Inc.
+ * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
  *
  * This software is licensed under the terms of the GNU General Public
  * License version 2, as published by the Free Software Foundation, and
@@ -14,17 +14,40 @@
  */
 
 #ifndef __ASM_ARCH_MSM_UNCOMPRESS_H
+#define __ASM_ARCH_MSM_UNCOMPRESS_H
+
+#include <asm/processor.h>
+#include <mach/msm_iomap.h>
+
+#define UART_CSR      (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08))
+#define UART_TF       (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x0c))
 
-#include "hardware.h"
-#include "linux/io.h"
-#include "mach/msm_iomap.h"
+#define UART_DM_SR    (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08)))
+#define UART_DM_CR    (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x10)))
+#define UART_DM_ISR   (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x14)))
+#define UART_DM_NCHAR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x40)))
+#define UART_DM_TF    (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x70)))
 
 static void putc(int c)
 {
 #if defined(MSM_DEBUG_UART_PHYS)
-        unsigned base = MSM_DEBUG_UART_PHYS;
-        while (!(readl(base + 0x08) & 0x04)) ;
-        writel(c, base + 0x0c);
+#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
+        /*
+         * Wait for TX_READY to be set; but skip it if we have a
+         * TX underrun.
+         */
+        if (UART_DM_SR & 0x08)
+                while (!(UART_DM_ISR & 0x80))
+                        cpu_relax();
+
+        UART_DM_CR = 0x300;
+        UART_DM_NCHAR = 0x1;
+        UART_DM_TF = c;
+#else
+        while (!(UART_CSR & 0x04))
+                cpu_relax();
+        UART_TF = c;
+#endif
 #endif
 }
 
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 8759ecf7454f..578b04e42deb 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -47,7 +47,8 @@ static struct map_desc msm_io_desc[] __initdata = {
         MSM_CHIP_DEVICE(GPIO1, MSM7X00),
         MSM_CHIP_DEVICE(GPIO2, MSM7X00),
         MSM_DEVICE(CLK_CTL),
-#ifdef CONFIG_MSM_DEBUG_UART
+#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
+        defined(CONFIG_DEBUG_MSM_UART3)
         MSM_DEVICE(DEBUG_UART),
 #endif
 #ifdef CONFIG_ARCH_MSM7X30
@@ -84,7 +85,8 @@ static struct map_desc qsd8x50_io_desc[] __initdata = {
         MSM_DEVICE(SCPLL),
         MSM_DEVICE(AD5),
         MSM_DEVICE(MDC),
-#ifdef CONFIG_MSM_DEBUG_UART
+#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
+        defined(CONFIG_DEBUG_MSM_UART3)
         MSM_DEVICE(DEBUG_UART),
 #endif
         {
@@ -109,6 +111,9 @@ static struct map_desc msm8x60_io_desc[] __initdata = {
         MSM_CHIP_DEVICE(TMR0, MSM8X60),
         MSM_DEVICE(ACC),
         MSM_DEVICE(GCC),
+#ifdef CONFIG_DEBUG_MSM8660_UART
+        MSM_DEVICE(DEBUG_UART),
+#endif
 };
 
 void __init msm_map_msm8x60_io(void)
@@ -123,6 +128,9 @@ static struct map_desc msm8960_io_desc[] __initdata = {
         MSM_CHIP_DEVICE(QGIC_CPU, MSM8960),
         MSM_CHIP_DEVICE(TMR, MSM8960),
         MSM_CHIP_DEVICE(TMR0, MSM8960),
+#ifdef CONFIG_DEBUG_MSM8960_UART
+        MSM_DEVICE(DEBUG_UART),
+#endif
 };
 
 void __init msm_map_msm8960_io(void)
@@ -146,7 +154,8 @@ static struct map_desc msm7x30_io_desc[] __initdata = {
         MSM_DEVICE(SAW),
         MSM_DEVICE(GCC),
         MSM_DEVICE(TCSR),
-#ifdef CONFIG_MSM_DEBUG_UART
+#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
+        defined(CONFIG_DEBUG_MSM_UART3)
         MSM_DEVICE(DEBUG_UART),
 #endif
         {
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index fdec58aaa35c..0b3e357c4c8c 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -79,7 +79,7 @@ static __cpuinit void prepare_cold_cpu(unsigned int cpu)
         ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup),
                                 SCM_FLAG_COLDBOOT_CPU1);
         if (ret == 0) {
-                void *sc1_base_ptr;
+                void __iomem *sc1_base_ptr;
                 sc1_base_ptr = ioremap_nocache(0x00902000, SZ_4K*2);
                 if (sc1_base_ptr) {
                         writel(0, sc1_base_ptr + VDD_SC1_ARRAY_CLAMP_GFS_CTL);
diff --git a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
index 0e94268d6e6f..ee74ec97c141 100644
--- a/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
+++ b/arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
@@ -151,4 +151,5 @@ MACHINE_START(TERASTATION_WXL, "Buffalo Nas WXL")
         .init_early     = mv78xx0_init_early,
         .init_irq       = mv78xx0_init_irq,
         .timer          = &mv78xx0_timer,
+        .restart        = mv78xx0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 23d3980ef59d..5b9632b01169 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -401,3 +401,19 @@ void __init mv78xx0_init(void)
         feroceon_l2_init(is_l2_writethrough());
 #endif
 }
+
+void mv78xx0_restart(char mode, const char *cmd)
+{
+        /*
+         * Enable soft reset to assert RSTOUTn.
+         */
+        writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
+
+        /*
+         * Assert soft reset.
+         */
+        writel(SOFT_RESET, SYSTEM_SOFT_RESET);
+
+        while (1)
+                ;
+}
diff --git a/arch/arm/mach-mv78xx0/common.h b/arch/arm/mach-mv78xx0/common.h
index 632e63d65e7a..07d5f8f6be7d 100644
--- a/arch/arm/mach-mv78xx0/common.h
+++ b/arch/arm/mach-mv78xx0/common.h
@@ -46,6 +46,7 @@ void mv78xx0_uart1_init(void);
 void mv78xx0_uart2_init(void);
 void mv78xx0_uart3_init(void);
 void mv78xx0_i2c_init(void);
+void mv78xx0_restart(char, const char *);
 
 extern struct sys_timer mv78xx0_timer;
 
diff --git a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
index 50b85ae2da52..4d6d48bf51ef 100644
--- a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
+++ b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
@@ -99,4 +99,5 @@ MACHINE_START(DB78X00_BP, "Marvell DB-78x00-BP Development Board")
         .init_early     = mv78xx0_init_early,
         .init_irq       = mv78xx0_init_irq,
         .timer          = &mv78xx0_timer,
+        .restart        = mv78xx0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mv78xx0/include/mach/system.h b/arch/arm/mach-mv78xx0/include/mach/system.h
index 66e7ce4e90bd..8c3a5387cec7 100644
--- a/arch/arm/mach-mv78xx0/include/mach/system.h
+++ b/arch/arm/mach-mv78xx0/include/mach/system.h
@@ -9,28 +9,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <mach/bridge-regs.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /*
-         * Enable soft reset to assert RSTOUTn.
-         */
-        writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
-
-        /*
-         * Assert soft reset.
-         */
-        writel(SOFT_RESET, SYSTEM_SOFT_RESET);
-
-        while (1)
-                ;
-}
-
-
 #endif
diff --git a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
index e85222e53578..9a882706e138 100644
--- a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
+++ b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
@@ -84,4 +84,5 @@ MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board")
         .init_early     = mv78xx0_init_early,
         .init_irq       = mv78xx0_init_irq,
         .timer          = &mv78xx0_timer,
+        .restart        = mv78xx0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c
index 1fc110348040..944025da8333 100644
--- a/arch/arm/mach-mx5/board-cpuimx51.c
+++ b/arch/arm/mach-mx5/board-cpuimx51.c
@@ -297,4 +297,5 @@ MACHINE_START(EUKREA_CPUIMX51, "Eukrea CPUIMX51 Module")
         .handle_irq = imx51_handle_irq,
         .timer = &mxc_timer,
         .init_machine = eukrea_cpuimx51_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-cpuimx51sd.c b/arch/arm/mach-mx5/board-cpuimx51sd.c
index 52a11c1898e6..9fbe923c8b08 100644
--- a/arch/arm/mach-mx5/board-cpuimx51sd.c
+++ b/arch/arm/mach-mx5/board-cpuimx51sd.c
@@ -335,4 +335,5 @@ MACHINE_START(EUKREA_CPUIMX51SD, "Eukrea CPUIMX51SD")
         .handle_irq = imx51_handle_irq,
         .timer = &mxc_timer,
         .init_machine = eukrea_cpuimx51sd_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx50_rdp.c b/arch/arm/mach-mx5/board-mx50_rdp.c
index fc3621d90bde..42b66e8d9615 100644
--- a/arch/arm/mach-mx5/board-mx50_rdp.c
+++ b/arch/arm/mach-mx5/board-mx50_rdp.c
@@ -222,4 +222,5 @@ MACHINE_START(MX50_RDP, "Freescale MX50 Reference Design Platform")
         .handle_irq = imx50_handle_irq,
         .timer = &mx50_rdp_timer,
         .init_machine = mx50_rdp_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c
index 05783906db2b..83eab4176ca4 100644
--- a/arch/arm/mach-mx5/board-mx51_3ds.c
+++ b/arch/arm/mach-mx5/board-mx51_3ds.c
@@ -175,4 +175,5 @@ MACHINE_START(MX51_3DS, "Freescale MX51 3-Stack Board")
         .handle_irq = imx51_handle_irq,
         .timer = &mx51_3ds_timer,
         .init_machine = mx51_3ds_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index 24994bb52147..e4b822e9f719 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -426,4 +426,5 @@ MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board")
         .handle_irq = imx51_handle_irq,
         .timer = &mx51_babbage_timer,
         .init_machine = mx51_babbage_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c
index a9e48662cf75..3a5ed2dd885a 100644
--- a/arch/arm/mach-mx5/board-mx51_efikamx.c
+++ b/arch/arm/mach-mx5/board-mx51_efikamx.c
@@ -182,7 +182,7 @@ static const struct gpio_keys_platform_data mx51_efikamx_powerkey_data __initcon
         .nbuttons = ARRAY_SIZE(mx51_efikamx_powerkey),
 };
 
-void mx51_efikamx_reset(void)
+static void mx51_efikamx_restart(char mode, const char *cmd)
 {
         if (system_rev == 0x11)
                 gpio_direction_output(EFIKAMX_RESET1_1, 0);
@@ -292,4 +292,5 @@ MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop")
         .handle_irq = imx51_handle_irq,
         .timer = &mx51_efikamx_timer,
         .init_machine = mx51_efikamx_init,
+        .restart = mx51_efikamx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-mx5/board-mx51_efikasb.c
index 38c4a3e28d3c..ea5f65b0381a 100644
--- a/arch/arm/mach-mx5/board-mx51_efikasb.c
+++ b/arch/arm/mach-mx5/board-mx51_efikasb.c
@@ -287,4 +287,5 @@ MACHINE_START(MX51_EFIKASB, "Genesi Efika Smartbook")
         .handle_irq = imx51_handle_irq,
         .init_machine =  efikasb_board_init,
         .timer = &mx51_efikasb_timer,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c
index 0d7f0fffb23a..5f224f1c3eb6 100644
--- a/arch/arm/mach-mx5/board-mx53_ard.c
+++ b/arch/arm/mach-mx5/board-mx53_ard.c
@@ -257,4 +257,5 @@ MACHINE_START(MX53_ARD, "Freescale MX53 ARD Board")
         .handle_irq = imx53_handle_irq,
         .timer = &mx53_ard_timer,
         .init_machine = mx53_ard_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c
index 64bbfcea6f35..d6ce137896d6 100644
--- a/arch/arm/mach-mx5/board-mx53_evk.c
+++ b/arch/arm/mach-mx5/board-mx53_evk.c
@@ -175,4 +175,5 @@ MACHINE_START(MX53_EVK, "Freescale MX53 EVK Board")
         .handle_irq = imx53_handle_irq,
         .timer = &mx53_evk_timer,
         .init_machine = mx53_evk_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c
index 237bdecd9331..fd8b524e1c58 100644
--- a/arch/arm/mach-mx5/board-mx53_loco.c
+++ b/arch/arm/mach-mx5/board-mx53_loco.c
@@ -317,4 +317,5 @@ MACHINE_START(MX53_LOCO, "Freescale MX53 LOCO Board")
         .handle_irq = imx53_handle_irq,
         .timer = &mx53_loco_timer,
         .init_machine = mx53_loco_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c
index d42132a80e8f..22c53c9b18aa 100644
--- a/arch/arm/mach-mx5/board-mx53_smd.c
+++ b/arch/arm/mach-mx5/board-mx53_smd.c
@@ -164,4 +164,5 @@ MACHINE_START(MX53_SMD, "Freescale MX53 SMD Board")
         .handle_irq = imx53_handle_irq,
         .timer = &mx53_smd_timer,
         .init_machine = mx53_smd_board_init,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/imx51-dt.c b/arch/arm/mach-mx5/imx51-dt.c
index 596edd967dbf..e6bad17b908c 100644
--- a/arch/arm/mach-mx5/imx51-dt.c
+++ b/arch/arm/mach-mx5/imx51-dt.c
@@ -115,4 +115,5 @@ DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
         .timer          = &imx51_timer,
         .init_machine   = imx51_dt_init,
         .dt_compat      = imx51_dt_board_compat,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mx5/imx53-dt.c b/arch/arm/mach-mx5/imx53-dt.c
index 85bfd5ff21b0..05ebb3e68679 100644
--- a/arch/arm/mach-mx5/imx53-dt.c
+++ b/arch/arm/mach-mx5/imx53-dt.c
@@ -125,4 +125,5 @@ DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)")
         .timer          = &imx53_timer,
         .init_machine   = imx53_dt_init,
         .dt_compat      = imx53_dt_board_compat,
+        .restart        = mxc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h
index 635bb5d9a20a..1388485414c9 100644
--- a/arch/arm/mach-mxs/include/mach/common.h
+++ b/arch/arm/mach-mxs/include/mach/common.h
@@ -16,6 +16,7 @@ struct clk;
 extern const u32 *mxs_get_ocotp(void);
 extern int mxs_reset_block(void __iomem *);
 extern void mxs_timer_init(struct clk *, int);
+extern void mxs_restart(char, const char *);
 
 extern int mx23_register_gpios(void);
 extern int mx23_clocks_init(void);
diff --git a/arch/arm/mach-mxs/include/mach/system.h b/arch/arm/mach-mxs/include/mach/system.h
index 0e428239b433..e7ad1bb29423 100644
--- a/arch/arm/mach-mxs/include/mach/system.h
+++ b/arch/arm/mach-mxs/include/mach/system.h
@@ -22,6 +22,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-void arch_reset(char mode, const char *cmd);
-
 #endif /* __MACH_MXS_SYSTEM_H__ */
diff --git a/arch/arm/mach-mxs/mach-m28evk.c b/arch/arm/mach-mxs/mach-m28evk.c
index 6b00577b7025..2f2758230edf 100644
--- a/arch/arm/mach-mxs/mach-m28evk.c
+++ b/arch/arm/mach-mxs/mach-m28evk.c
@@ -363,4 +363,5 @@ MACHINE_START(M28EVK, "DENX M28 EVK")
         .init_irq       = mx28_init_irq,
         .timer          = &m28evk_timer,
         .init_machine   = m28evk_init,
+        .restart        = mxs_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-mx23evk.c b/arch/arm/mach-mxs/mach-mx23evk.c
index c325fbe4e4c6..5ea1c57d2606 100644
--- a/arch/arm/mach-mxs/mach-mx23evk.c
+++ b/arch/arm/mach-mxs/mach-mx23evk.c
@@ -184,4 +184,5 @@ MACHINE_START(MX23EVK, "Freescale MX23 EVK")
         .init_irq       = mx23_init_irq,
         .timer          = &mx23evk_timer,
         .init_machine   = mx23evk_init,
+        .restart        = mxs_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
index 064ec5abaa55..d0cc37fd23a4 100644
--- a/arch/arm/mach-mxs/mach-mx28evk.c
+++ b/arch/arm/mach-mxs/mach-mx28evk.c
@@ -501,4 +501,5 @@ MACHINE_START(MX28EVK, "Freescale MX28 EVK")
         .init_irq       = mx28_init_irq,
         .timer          = &mx28evk_timer,
         .init_machine   = mx28evk_init,
+        .restart        = mxs_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-stmp378x_devb.c b/arch/arm/mach-mxs/mach-stmp378x_devb.c
index 6834dea38c04..a626c07b8713 100644
--- a/arch/arm/mach-mxs/mach-stmp378x_devb.c
+++ b/arch/arm/mach-mxs/mach-stmp378x_devb.c
@@ -117,4 +117,5 @@ MACHINE_START(STMP378X, "STMP378X")
         .init_irq       = mx23_init_irq,
         .timer          = &stmp378x_dvb_timer,
         .init_machine   = stmp378x_dvb_init,
+        .restart        = mxs_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mxs/mach-tx28.c b/arch/arm/mach-mxs/mach-tx28.c
index 9a1f0e7a338e..2c0862e655ee 100644
--- a/arch/arm/mach-mxs/mach-tx28.c
+++ b/arch/arm/mach-mxs/mach-tx28.c
@@ -178,4 +178,5 @@ MACHINE_START(TX28, "Ka-Ro electronics TX28 module")
         .init_irq = mx28_init_irq,
         .timer = &tx28_timer,
         .init_machine = tx28_stk5v3_init,
+        .restart        = mxs_restart,
 MACHINE_END
diff --git a/arch/arm/mach-mxs/system.c b/arch/arm/mach-mxs/system.c
index cab88364e7c1..b936633b7682 100644
--- a/arch/arm/mach-mxs/system.c
+++ b/arch/arm/mach-mxs/system.c
@@ -42,7 +42,7 @@ static void __iomem *mxs_clkctrl_reset_addr;
 /*
  * Reset the system. It is called by machine_restart().
  */
-void arch_reset(char mode, const char *cmd)
+void mxs_restart(char mode, const char *cmd)
 {
         /* reset the chip */
         __mxs_setl(MXS_CLKCTRL_RESET_CHIP, mxs_clkctrl_reset_addr);
diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c
index 00023b5cf12b..59e67979f197 100644
--- a/arch/arm/mach-netx/generic.c
+++ b/arch/arm/mach-netx/generic.c
@@ -187,3 +187,8 @@ static int __init netx_init(void)
 
 subsys_initcall(netx_init);
 
+void netx_restart(char mode, const char *cmd)
+{
+        writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES,
+               NETX_SYSTEM_RES_CR);
+}
diff --git a/arch/arm/mach-netx/generic.h b/arch/arm/mach-netx/generic.h
index ede2d35341c3..9b915119b8d6 100644
--- a/arch/arm/mach-netx/generic.h
+++ b/arch/arm/mach-netx/generic.h
@@ -19,6 +19,7 @@
 
 extern void __init netx_map_io(void);
 extern void __init netx_init_irq(void);
+extern void netx_restart(char, const char *);
 
 struct sys_timer;
 extern struct sys_timer netx_timer;
diff --git a/arch/arm/mach-netx/include/mach/system.h b/arch/arm/mach-netx/include/mach/system.h
index dc7b4bc003c5..b38fa36d58c4 100644
--- a/arch/arm/mach-netx/include/mach/system.h
+++ b/arch/arm/mach-netx/include/mach/system.h
@@ -19,20 +19,10 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include "netx-regs.h"
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES,
-               NETX_SYSTEM_RES_CR);
-}
-
 #endif
 
diff --git a/arch/arm/mach-netx/nxdb500.c b/arch/arm/mach-netx/nxdb500.c
index ef8cf3574a02..180ea899a48a 100644
--- a/arch/arm/mach-netx/nxdb500.c
+++ b/arch/arm/mach-netx/nxdb500.c
@@ -207,4 +207,5 @@ MACHINE_START(NXDB500, "Hilscher nxdb500")
         .handle_irq     = vic_handle_irq,
         .timer          = &netx_timer,
         .init_machine   = nxdb500_init,
+        .restart        = netx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-netx/nxdkn.c b/arch/arm/mach-netx/nxdkn.c
index 588558bdd800..58009e29b20e 100644
--- a/arch/arm/mach-netx/nxdkn.c
+++ b/arch/arm/mach-netx/nxdkn.c
@@ -100,4 +100,5 @@ MACHINE_START(NXDKN, "Hilscher nxdkn")
         .handle_irq     = vic_handle_irq,
         .timer          = &netx_timer,
         .init_machine   = nxdkn_init,
+        .restart        = netx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-netx/nxeb500hmi.c b/arch/arm/mach-netx/nxeb500hmi.c
index cfcbb5038648..122e99826ef6 100644
--- a/arch/arm/mach-netx/nxeb500hmi.c
+++ b/arch/arm/mach-netx/nxeb500hmi.c
@@ -184,4 +184,5 @@ MACHINE_START(NXEB500HMI, "Hilscher nxeb500hmi")
         .handle_irq     = vic_handle_irq,
         .timer          = &netx_timer,
         .init_machine   = nxeb500hmi_init,
+        .restart        = netx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index f98259c050ee..7c878bf00340 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -35,6 +35,8 @@
 #include <mach/nand.h>
 #include <mach/fsmc.h>
 
+#include "cpu-8815.h"
+
 /* Initial value for SRC control register: all timers use MXTAL/8 source */
 #define SRC_CR_INIT_MASK        0x00007fff
 #define SRC_CR_INIT_VAL         0x2aaa8000
@@ -284,4 +286,5 @@ MACHINE_START(NOMADIK, "NHK8815")
         .handle_irq     = vic_handle_irq,
         .timer          = &nomadik_timer,
         .init_machine   = nhk8815_platform_init,
+        .restart        = cpu8815_restart,
 MACHINE_END
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index dc67717db6f0..65df7b4fdd3e 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -21,6 +21,7 @@
 #include <linux/device.h>
 #include <linux/amba/bus.h>
 #include <linux/platform_device.h>
+#include <linux/io.h>
 
 #include <plat/gpio-nomadik.h>
 #include <mach/hardware.h>
@@ -32,6 +33,7 @@
 #include <asm/hardware/cache-l2x0.h>
 
 #include "clock.h"
+#include "cpu-8815.h"
 
 #define __MEM_4K_RESOURCE(x) \
         .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM}
@@ -164,3 +166,13 @@ void __init cpu8815_init_irq(void)
 #endif
          return;
 }
+
+void cpu8815_restart(char mode, const char *cmd)
+{
+        void __iomem *src_rstsr = io_p2v(NOMADIK_SRC_BASE + 0x18);
+
+        /* FIXME: use egpio when implemented */
+
+        /* Write anything to Reset status register */
+        writel(1, src_rstsr);
+}
diff --git a/arch/arm/mach-nomadik/cpu-8815.h b/arch/arm/mach-nomadik/cpu-8815.h
new file mode 100644
index 000000000000..71c21e8a11dc
--- /dev/null
+++ b/arch/arm/mach-nomadik/cpu-8815.h
@@ -0,0 +1,4 @@
+extern void cpu8815_map_io(void);
+extern void cpu8815_platform_init(void);
+extern void cpu8815_init_irq(void);
+extern void cpu8815_restart(char, const char *);
diff --git a/arch/arm/mach-nomadik/include/mach/setup.h b/arch/arm/mach-nomadik/include/mach/setup.h
index b7897edf1f35..bcaeaf41c053 100644
--- a/arch/arm/mach-nomadik/include/mach/setup.h
+++ b/arch/arm/mach-nomadik/include/mach/setup.h
@@ -12,9 +12,6 @@
 
 #ifdef CONFIG_NOMADIK_8815
 
-extern void cpu8815_map_io(void);
-extern void cpu8815_platform_init(void);
-extern void cpu8815_init_irq(void);
 extern void nmdk_timer_init(void);
 
 #endif /* NOMADIK_8815 */
diff --git a/arch/arm/mach-nomadik/include/mach/system.h b/arch/arm/mach-nomadik/include/mach/system.h
index 7119f688116e..25e198b8976c 100644
--- a/arch/arm/mach-nomadik/include/mach/system.h
+++ b/arch/arm/mach-nomadik/include/mach/system.h
@@ -20,9 +20,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <linux/io.h>
-#include <mach/hardware.h>
-
 static inline void arch_idle(void)
 {
         /*
@@ -32,14 +29,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        void __iomem *src_rstsr = io_p2v(NOMADIK_SRC_BASE + 0x18);
-
-        /* FIXME: use egpio when implemented */
-
-        /* Write anything to Reset status register */
-        writel(1, src_rstsr);
-}
-
 #endif
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index af7911963c0d..88909cc0b254 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -386,6 +386,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
         .init_irq       = omap1_init_irq,
         .init_machine   = ams_delta_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
 
 EXPORT_SYMBOL(ams_delta_latch1_write);
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index b9c4c0f933ee..0b9464b41212 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -390,4 +390,5 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_fsample_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index 7f41d7a504a5..9a5fe581bc1c 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -89,4 +89,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710")
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_generic_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 7933b97698f8..00ad6b22d60a 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -456,4 +456,5 @@ MACHINE_START(OMAP_H2, "TI-H2")
         .init_irq       = omap1_init_irq,
         .init_machine   = h2_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index 04be2f83ca09..4a7f25149703 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -444,4 +444,5 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
         .init_irq       = omap1_init_irq,
         .init_machine   = h3_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index 46fcfeb1f11e..731cc3db7ab3 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -610,4 +610,5 @@ MACHINE_START(HERALD, "HTC Herald")
         .init_irq       = omap1_init_irq,
         .init_machine   = htcherald_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index f99d11de1531..309369ea6978 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -460,4 +460,5 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
         .init_irq       = omap1_init_irq,
         .init_machine   = innovator_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index c64342388ec3..f9efc036ba96 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -259,4 +259,5 @@ MACHINE_START(NOKIA770, "Nokia 770")
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_nokia770_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index a409dfcc5b18..675de06557aa 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -578,4 +578,5 @@ MACHINE_START(OMAP_OSK, "TI-OSK")
         .init_irq       = omap1_init_irq,
         .init_machine   = osk_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 105292d39484..81fa27f88369 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -270,4 +270,5 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_palmte_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 387a9006358d..81cb82178388 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -317,4 +317,5 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T")
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_palmtt_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index df6d15e68aad..e881945ce8ec 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -334,4 +334,5 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71")
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_palmz71_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 57ecd7e09831..c000bed76276 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -352,4 +352,5 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_perseus2_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 774ae39fd636..7bcd82ab0fd0 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -416,4 +416,5 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1")
         .init_irq       = omap1_init_irq,
         .init_machine   = omap_sx1_init,
         .timer          = &omap1_timer,
+        .restart        = omap1_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 7721c146d8d6..f83a502dc93c 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -28,7 +28,6 @@
 #include <linux/export.h>
 
 #include <mach/hardware.h>
-#include <mach/system.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -221,7 +220,7 @@ void voiceblue_wdt_ping(void)
         gpio_set_value(0, wdt_gpio_state);
 }
 
-static void voiceblue_reset(char mode, const char *cmd)
+static void voiceblue_restart(char mode, const char *cmd)
 {
         /*
          * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
@@ -285,8 +284,6 @@ static void __init voiceblue_init(void)
          * (it is connected through invertor) */
         omap_writeb(0x00, OMAP_LPG1_LCR);
         omap_writeb(0x00, OMAP_LPG1_PMR);       /* Disable clock */
-
-        arch_reset = voiceblue_reset;
 }
 
 MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")
@@ -298,4 +295,5 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")
         .init_irq       = omap1_init_irq,
         .init_machine   = voiceblue_init,
         .timer          = &omap1_timer,
+        .restart        = voiceblue_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h
index 52c4eda97fa8..a9a5146dd2d4 100644
--- a/arch/arm/mach-omap1/common.h
+++ b/arch/arm/mach-omap1/common.h
@@ -54,6 +54,7 @@ static inline void omap16xx_map_io(void)
 
 void omap1_init_early(void);
 void omap1_init_irq(void);
+void omap1_restart(char, const char *);
 
 extern struct sys_timer omap1_timer;
 extern bool omap_32k_timer_init(void);
diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c
index ad951ee69205..91d199b64979 100644
--- a/arch/arm/mach-omap1/reset.c
+++ b/arch/arm/mach-omap1/reset.c
@@ -5,10 +5,9 @@
 #include <linux/io.h>
 
 #include <mach/hardware.h>
-#include <mach/system.h>
 #include <plat/prcm.h>
 
-void omap1_arch_reset(char mode, const char *cmd)
+void omap1_restart(char mode, const char *cmd)
 {
         /*
          * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
@@ -21,5 +20,3 @@ void omap1_arch_reset(char mode, const char *cmd)
 
         omap_writew(1, ARM_RSTCT1);
 }
-
-void (*arch_reset)(char, const char *) = omap1_arch_reset;
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 485a21d31004..b8faffa44f9e 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -37,7 +37,6 @@
 #include <linux/init.h>
 #include <linux/delay.h>
 #include <linux/interrupt.h>
-#include <linux/sched.h>
 #include <linux/spinlock.h>
 #include <linux/clk.h>
 #include <linux/err.h>
@@ -190,30 +189,9 @@ static __init void omap_init_mpu_timer(unsigned long rate)
  * ---------------------------------------------------------------------------
  */
 
-static DEFINE_CLOCK_DATA(cd);
-
-static inline unsigned long long notrace _omap_mpu_sched_clock(void)
-{
-        u32 cyc = ~omap_mpu_timer_read(1);
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-#ifndef CONFIG_OMAP_32K_TIMER
-unsigned long long notrace sched_clock(void)
-{
-        return _omap_mpu_sched_clock();
-}
-#else
-static unsigned long long notrace omap_mpu_sched_clock(void)
-{
-        return _omap_mpu_sched_clock();
-}
-#endif
-
-static void notrace mpu_update_sched_clock(void)
+static u32 notrace omap_mpu_read_sched_clock(void)
 {
-        u32 cyc = ~omap_mpu_timer_read(1);
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return ~omap_mpu_timer_read(1);
 }
 
 static void __init omap_init_clocksource(unsigned long rate)
@@ -223,7 +201,7 @@ static void __init omap_init_clocksource(unsigned long rate)
                         "%s: can't register clocksource!\n";
 
         omap_mpu_timer_start(1, ~0, 1);
-        init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
+        setup_sched_clock(omap_mpu_read_sched_clock, 32, rate);
 
         if (clocksource_mmio_init(&timer->read_tim, "mpu_timer2", rate,
                         300, 32, clocksource_mmio_readl_down))
@@ -254,30 +232,6 @@ static inline void omap_mpu_timer_init(void)
 }
 #endif  /* CONFIG_OMAP_MPU_TIMER */
 
-#if defined(CONFIG_OMAP_MPU_TIMER) && defined(CONFIG_OMAP_32K_TIMER)
-static unsigned long long (*preferred_sched_clock)(void);
-
-unsigned long long notrace sched_clock(void)
-{
-        if (!preferred_sched_clock)
-                return 0;
-
-        return preferred_sched_clock();
-}
-
-static inline void preferred_sched_clock_init(bool use_32k_sched_clock)
-{
-        if (use_32k_sched_clock)
-                preferred_sched_clock = omap_32k_sched_clock;
-        else
-                preferred_sched_clock = omap_mpu_sched_clock;
-}
-#else
-static inline void preferred_sched_clock_init(bool use_32k_sched_clcok)
-{
-}
-#endif
-
 static inline int omap_32k_timer_usable(void)
 {
         int res = false;
@@ -299,12 +253,8 @@ static inline int omap_32k_timer_usable(void)
  */
 static void __init omap1_timer_init(void)
 {
-        if (omap_32k_timer_usable()) {
-                preferred_sched_clock_init(1);
-        } else {
+        if (!omap_32k_timer_usable())
                 omap_mpu_timer_init();
-                preferred_sched_clock_init(0);
-        }
 }
 
 struct sys_timer omap1_timer = {
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 5ca19d717b3f..b7407154c881 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -43,8 +43,10 @@ config ARCH_OMAP4
         bool "TI OMAP4"
         default y
         depends on ARCH_OMAP2PLUS
+        select CACHE_L2X0
         select CPU_V7
         select ARM_GIC
+        select HAVE_SMP
         select LOCAL_TIMERS if SMP
         select PL310_ERRATA_588369
         select PL310_ERRATA_727915
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index d88143faca59..7370983f809f 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -304,4 +304,5 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
         .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = omap_2430sdp_init,
         .timer          = &omap2_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 83126368ed99..9996334cb687 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -731,4 +731,5 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap_3430sdp_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index 7969dd904bd3..6ef350d1ae4f 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -218,4 +218,5 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap_sdp_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index b5d9c6fe012f..5598e00ccf52 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -993,4 +993,5 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
         .handle_irq     = gic_handle_irq,
         .init_machine   = omap_4430sdp_init,
         .timer          = &omap4_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 7e90f93263db..c3851e8de28b 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -101,4 +101,5 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = am3517_crane_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 551cae8d9b8a..f5a3a3f11739 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -494,4 +494,5 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = am3517_evm_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 5a66480feed0..ac773829941f 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -357,4 +357,5 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
         .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = omap_apollon_init,
         .timer          = &omap2_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index b38cd7b240e8..e921e3be24a4 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -671,6 +671,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = cm_t35_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 
 MACHINE_START(CM_T3730, "Compulab CM-T3730")
@@ -682,4 +683,5 @@ MACHINE_START(CM_T3730, "Compulab CM-T3730")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = cm_t3730_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index efc5cedb1fbb..f36d694d2159 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -302,4 +302,5 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = cm_t3517_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index d81ea7fa75ef..e873063f4fda 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -663,4 +663,5 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = devkit8000_init,
         .timer          = &omap3_secure_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 63b54163b993..f8c5b2cc7c9c 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -106,6 +106,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
         .init_machine   = omap_generic_init,
         .timer          = &omap2_timer,
         .dt_compat      = omap242x_boards_compat,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 #endif
 
@@ -125,6 +126,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
         .init_machine   = omap_generic_init,
         .timer          = &omap2_timer,
         .dt_compat      = omap243x_boards_compat,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 #endif
 
@@ -143,6 +145,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
         .init_machine   = omap3_init,
         .timer          = &omap3_timer,
         .dt_compat      = omap3_boards_compat,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 #endif
 
@@ -161,5 +164,6 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
         .init_machine   = omap4_init,
         .timer          = &omap4_timer,
         .dt_compat      = omap4_boards_compat,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index ec4018362e8e..54af800d143c 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -399,4 +399,5 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
         .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = omap_h4_init,
         .timer          = &omap2_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 5949f6ae3edf..a59ace0ed560 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -675,6 +675,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = igep_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 
 MACHINE_START(IGEP0030, "IGEP OMAP3 module")
@@ -686,4 +687,5 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = igep_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 13bde0e66934..2d2a61f7dcbf 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -437,4 +437,5 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap_ldp_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index bebd3d84365e..cef2cf1c0b8d 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -692,6 +692,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800")
         .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = n8x0_init_machine,
         .timer          = &omap2_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 
 MACHINE_START(NOKIA_N810, "Nokia N810")
@@ -703,6 +704,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810")
         .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = n8x0_init_machine,
         .timer          = &omap2_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 
 MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
@@ -714,4 +716,5 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
         .handle_irq     = omap2_intc_handle_irq,
         .init_machine   = n8x0_init_machine,
         .timer          = &omap2_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index c34f56588284..7ffcd2839e7b 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -562,4 +562,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap3_beagle_init,
         .timer          = &omap3_secure_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index f11bc444e7be..003fe34c9343 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -684,4 +684,5 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap3_evm_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 5fa6bad9574e..4198dd017d8f 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -211,6 +211,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap3logic_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 
 MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
@@ -221,4 +222,5 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap3logic_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index ef315c585b75..1644b73017fc 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -609,4 +609,5 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap3pandora_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index b21d70a2e4a7..cb089a46f62f 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -457,4 +457,5 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
         .handle_irq             = omap3_intc_handle_irq,
         .init_machine           = omap3_stalker_init,
         .timer                  = &omap3_secure_timer,
+        .restart                = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 18cd340f9b7b..a0b851aafcca 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -384,4 +384,5 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap3_touchbook_init,
         .timer          = &omap3_secure_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index b6f114436dbc..8b06c6a60d02 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -580,4 +580,5 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
         .handle_irq     = gic_handle_irq,
         .init_machine   = omap4_panda_init,
         .timer          = &omap4_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 60a61ea759bf..52c0cef77165 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -565,4 +565,5 @@ MACHINE_START(OVERO, "Gumstix Overo")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = overo_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index a79d49e3fe09..8678b386c6a2 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -152,4 +152,5 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = rm680_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 4e3c0965edf3..27f01f051dff 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -130,4 +130,5 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = rx51_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index 5b6ad6e3ccb4..ab9a7a9e9d64 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -52,6 +52,7 @@ MACHINE_START(TI8168EVM, "ti8168evm")
         .init_irq       = ti81xx_init_irq,
         .timer          = &omap3_timer,
         .init_machine   = ti81xx_evm_init,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 
 MACHINE_START(TI8148EVM, "ti8148evm")
@@ -62,4 +63,5 @@ MACHINE_START(TI8148EVM, "ti8148evm")
         .init_irq       = ti81xx_init_irq,
         .timer          = &omap3_timer,
         .init_machine   = ti81xx_evm_init,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index 70e5b54a2115..5c20bcc57f2b 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -138,6 +138,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap_zoom_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
 
 MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
@@ -149,4 +150,5 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
         .handle_irq     = omap3_intc_handle_irq,
         .init_machine   = omap_zoom_init,
         .timer          = &omap3_timer,
+        .restart        = omap_prcm_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 4b2b416fafe1..9403b2ce6c85 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -92,6 +92,7 @@ void omap3_init_early(void);	/* Do not use this one */
 void am35xx_init_early(void);
 void ti81xx_init_early(void);
 void omap4430_init_early(void);
+void omap_prcm_restart(char, const char *);
 
 /*
  * IO bases for various OMAP processors
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 7f8915ad5099..eef43e2e163e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -3247,18 +3247,14 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
 
 /* 3430ES1-only hwmods */
 static __initdata struct omap_hwmod *omap3430es1_hwmods[] = {
-        &omap3xxx_iva_hwmod,
         &omap3430es1_dss_core_hwmod,
-        &omap3xxx_mailbox_hwmod,
         NULL
 };
 
 /* 3430ES2+-only hwmods */
 static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = {
-        &omap3xxx_iva_hwmod,
         &omap3xxx_dss_core_hwmod,
         &omap3xxx_usbhsotg_hwmod,
-        &omap3xxx_mailbox_hwmod,
         NULL
 };
 
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index c35e5cea9f8f..626acfad7190 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -25,7 +25,6 @@
 #include <linux/delay.h>
 #include <linux/export.h>
 
-#include <mach/system.h>
 #include "common.h"
 #include <plat/prcm.h>
 #include <plat/irqs.h>
@@ -59,7 +58,7 @@ u32 omap_prcm_get_reset_sources(void)
 EXPORT_SYMBOL(omap_prcm_get_reset_sources);
 
 /* Resets clock rates and reboots the system. Only called from system.h */
-static void omap_prcm_arch_reset(char mode, const char *cmd)
+void omap_prcm_restart(char mode, const char *cmd)
 {
         s16 prcm_offs = 0;
 
@@ -110,8 +109,6 @@ static void omap_prcm_arch_reset(char mode, const char *cmd)
         omap2_prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */
 }
 
-void (*arch_reset)(char, const char *) = omap_prcm_arch_reset;
-
 /**
  * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness
  * @reg: physical address of module IDLEST register
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 9edcd520510f..6eeff0e0ae01 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -254,7 +254,6 @@ static struct omap_dm_timer clksrc;
 /*
  * clocksource
  */
-static DEFINE_CLOCK_DATA(cd);
 static cycle_t clocksource_read_cycles(struct clocksource *cs)
 {
         return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1);
@@ -268,23 +267,12 @@ static struct clocksource clocksource_gpt = {
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-static void notrace dmtimer_update_sched_clock(void)
+static u32 notrace dmtimer_read_sched_clock(void)
 {
-        u32 cyc;
-
-        cyc = __omap_dm_timer_read_counter(&clksrc, 1);
-
-        update_sched_clock(&cd, cyc, (u32)~0);
-}
-
-unsigned long long notrace sched_clock(void)
-{
-        u32 cyc = 0;
-
         if (clksrc.reserved)
-                cyc = __omap_dm_timer_read_counter(&clksrc, 1);
+                return __omap_dm_timer_read_counter(clksrc.io_base, 1);
 
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
+        return 0;
 }
 
 /* Setup free-running counter for clocksource */
@@ -301,7 +289,7 @@ static void __init omap2_gp_clocksource_init(int gptimer_id,
 
         __omap_dm_timer_load_start(&clksrc,
                         OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1);
-        init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate);
+        setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
 
         if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
                 pr_err("Could not register clocksource %s\n",
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 22ace0bf2f92..41127e80cc1e 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -18,6 +18,7 @@
 #include <linux/mbus.h>
 #include <linux/mv643xx_i2c.h>
 #include <linux/ata_platform.h>
+#include <linux/delay.h>
 #include <net/dsa.h>
 #include <asm/page.h>
 #include <asm/setup.h>
@@ -304,6 +305,17 @@ void __init orion5x_init(void)
         orion5x_wdt_init();
 }
 
+void orion5x_restart(char mode, const char *cmd)
+{
+        /*
+         * Enable and issue soft reset
+         */
+        orion5x_setbits(RSTOUTn_MASK, (1 << 2));
+        orion5x_setbits(CPU_SOFT_RESET, 1);
+        mdelay(200);
+        orion5x_clrbits(CPU_SOFT_RESET, 1);
+}
+
 /*
  * Many orion-based systems have buggy bootloader implementations.
  * This is a common fixup for bogus memory tags.
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 909489f4d23e..37ef18de61b7 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -39,6 +39,7 @@ void orion5x_spi_init(void);
 void orion5x_uart0_init(void);
 void orion5x_uart1_init(void);
 void orion5x_xor_init(void);
+void orion5x_restart(char, const char *);
 
 /*
  * PCIe/PCI functions.
diff --git a/arch/arm/mach-orion5x/d2net-setup.c b/arch/arm/mach-orion5x/d2net-setup.c
index 8c8300951f46..d75dcfa0f01c 100644
--- a/arch/arm/mach-orion5x/d2net-setup.c
+++ b/arch/arm/mach-orion5x/d2net-setup.c
@@ -343,6 +343,7 @@ MACHINE_START(D2NET, "LaCie d2 Network")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
 #endif
 
@@ -355,6 +356,7 @@ MACHINE_START(BIGDISK, "LaCie Big Disk Network")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
 #endif
 
diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c
index 4b79a80d5e1f..a104d5a80e11 100644
--- a/arch/arm/mach-orion5x/db88f5281-setup.c
+++ b/arch/arm/mach-orion5x/db88f5281-setup.c
@@ -364,4 +364,5 @@ MACHINE_START(DB88F5281, "Marvell Orion-2 Development Board")
         .init_early     = orion5x_init_early,
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 343f60e9639f..91b0f4788597 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -736,4 +736,5 @@ MACHINE_START(DNS323, "D-Link DNS-323")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c
index 70a4e9265f06..355e962137c7 100644
--- a/arch/arm/mach-orion5x/edmini_v2-setup.c
+++ b/arch/arm/mach-orion5x/edmini_v2-setup.c
@@ -258,4 +258,5 @@ MACHINE_START(EDMINI_V2, "LaCie Ethernet Disk mini V2")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/include/mach/system.h b/arch/arm/mach-orion5x/include/mach/system.h
index a1d6e46ab035..825a2650cefa 100644
--- a/arch/arm/mach-orion5x/include/mach/system.h
+++ b/arch/arm/mach-orion5x/include/mach/system.h
@@ -11,23 +11,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <mach/bridge-regs.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /*
-         * Enable and issue soft reset
-         */
-        orion5x_setbits(RSTOUTn_MASK, (1 << 2));
-        orion5x_setbits(CPU_SOFT_RESET, 1);
-        mdelay(200);
-        orion5x_clrbits(CPU_SOFT_RESET, 1);
-}
-
-
 #endif
diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c
index d3cd3f63258a..47587b832842 100644
--- a/arch/arm/mach-orion5x/kurobox_pro-setup.c
+++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c
@@ -386,6 +386,7 @@ MACHINE_START(KUROBOX_PRO, "Buffalo/Revogear Kurobox Pro")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
 #endif
 
@@ -399,5 +400,6 @@ MACHINE_START(LINKSTATION_PRO, "Buffalo Linkstation Pro/Live")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-orion5x/ls-chl-setup.c b/arch/arm/mach-orion5x/ls-chl-setup.c
index 9503fff404e3..527213169db0 100644
--- a/arch/arm/mach-orion5x/ls-chl-setup.c
+++ b/arch/arm/mach-orion5x/ls-chl-setup.c
@@ -140,7 +140,7 @@ static struct mv_sata_platform_data lschl_sata_data = {
 
 static void lschl_power_off(void)
 {
-        arm_machine_restart('h', NULL);
+        orion5x_restart('h', NULL);
 }
 
 /*****************************************************************************
@@ -325,4 +325,5 @@ MACHINE_START(LINKSTATION_LSCHL, "Buffalo Linkstation LiveV3 (LS-CHL)")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/ls_hgl-setup.c b/arch/arm/mach-orion5x/ls_hgl-setup.c
index ed6d772f4a24..9a8697b97dd7 100644
--- a/arch/arm/mach-orion5x/ls_hgl-setup.c
+++ b/arch/arm/mach-orion5x/ls_hgl-setup.c
@@ -186,7 +186,7 @@ static struct mv_sata_platform_data ls_hgl_sata_data = {
 
 static void ls_hgl_power_off(void)
 {
-        arm_machine_restart('h', NULL);
+        orion5x_restart('h', NULL);
 }
 
 
@@ -272,4 +272,5 @@ MACHINE_START(LINKSTATION_LS_HGL, "Buffalo Linkstation LS-HGL")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/lsmini-setup.c b/arch/arm/mach-orion5x/lsmini-setup.c
index 743f7f1db181..09c73659f467 100644
--- a/arch/arm/mach-orion5x/lsmini-setup.c
+++ b/arch/arm/mach-orion5x/lsmini-setup.c
@@ -186,7 +186,7 @@ static struct mv_sata_platform_data lsmini_sata_data = {
 
 static void lsmini_power_off(void)
 {
-        arm_machine_restart('h', NULL);
+        orion5x_restart('h', NULL);
 }
 
 
@@ -274,5 +274,6 @@ MACHINE_START(LINKSTATION_MINI, "Buffalo Linkstation Mini")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c
index 6020e26b1c71..65faaa34de61 100644
--- a/arch/arm/mach-orion5x/mss2-setup.c
+++ b/arch/arm/mach-orion5x/mss2-setup.c
@@ -267,5 +267,6 @@ MACHINE_START(MSS2, "Maxtor Shared Storage II")
         .init_early     = orion5x_init_early,
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
-        .fixup          = tag_fixup_mem32
+        .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/mv2120-setup.c b/arch/arm/mach-orion5x/mv2120-setup.c
index 201ae3676289..c87fde4deeca 100644
--- a/arch/arm/mach-orion5x/mv2120-setup.c
+++ b/arch/arm/mach-orion5x/mv2120-setup.c
@@ -234,5 +234,6 @@ MACHINE_START(MV2120, "HP Media Vault mv2120")
         .init_early     = orion5x_init_early,
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
-        .fixup          = tag_fixup_mem32
+        .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/net2big-setup.c b/arch/arm/mach-orion5x/net2big-setup.c
index 6197c79a2ecb..0180c393c711 100644
--- a/arch/arm/mach-orion5x/net2big-setup.c
+++ b/arch/arm/mach-orion5x/net2big-setup.c
@@ -426,5 +426,6 @@ MACHINE_START(NET2BIG, "LaCie 2Big Network")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
index ebd6767d8e88..292038fc59fd 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
@@ -175,4 +175,5 @@ MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
index 05db2d336b08..c44eabaabc16 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
@@ -187,4 +187,5 @@ MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c
index e47fa0578ae3..96438b6b2022 100644
--- a/arch/arm/mach-orion5x/rd88f5182-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
@@ -311,4 +311,5 @@ MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design")
         .init_early     = orion5x_init_early,
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
index 64317251ec00..2c5fab00d205 100644
--- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
@@ -128,4 +128,5 @@ MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c
index 29f1526f7b70..632a861ef82b 100644
--- a/arch/arm/mach-orion5x/terastation_pro2-setup.c
+++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c
@@ -364,4 +364,5 @@ MACHINE_START(TERASTATION_PRO2, "Buffalo Terastation Pro II/Live")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c
index 31e51f9b4b64..5d6408745582 100644
--- a/arch/arm/mach-orion5x/ts209-setup.c
+++ b/arch/arm/mach-orion5x/ts209-setup.c
@@ -178,7 +178,7 @@ static struct hw_pci qnap_ts209_pci __initdata = {
 
 static int __init qnap_ts209_pci_init(void)
 {
-        if (machine_is_ts_x09())
+        if (machine_is_ts209())
                 pci_common_init(&qnap_ts209_pci);
 
         return 0;
@@ -329,4 +329,5 @@ MACHINE_START(TS209, "QNAP TS-109/TS-209")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c
index 0fbcc14e09d7..4e6ff759cd32 100644
--- a/arch/arm/mach-orion5x/ts409-setup.c
+++ b/arch/arm/mach-orion5x/ts409-setup.c
@@ -318,4 +318,5 @@ MACHINE_START(TS409, "QNAP TS-409")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c
index b35e2005a348..c96f37472eda 100644
--- a/arch/arm/mach-orion5x/ts78xx-setup.c
+++ b/arch/arm/mach-orion5x/ts78xx-setup.c
@@ -627,4 +627,5 @@ MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC")
         .init_early     = orion5x_init_early,
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c
index b8be7d8d0cf4..078c03f7cd52 100644
--- a/arch/arm/mach-orion5x/wnr854t-setup.c
+++ b/arch/arm/mach-orion5x/wnr854t-setup.c
@@ -179,4 +179,5 @@ MACHINE_START(WNR854T, "Netgear WNR854T")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
index faf81a039360..46a9778171ce 100644
--- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c
+++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
@@ -267,4 +267,5 @@ MACHINE_START(WRT350N_V2, "Linksys WRT350N v2")
         .init_irq       = orion5x_init_irq,
         .timer          = &orion5x_timer,
         .fixup          = tag_fixup_mem32,
+        .restart        = orion5x_restart,
 MACHINE_END
diff --git a/arch/arm/mach-picoxcell/Makefile b/arch/arm/mach-picoxcell/Makefile
index c550b6363488..e5ec4a8d9bcb 100644
--- a/arch/arm/mach-picoxcell/Makefile
+++ b/arch/arm/mach-picoxcell/Makefile
@@ -1,3 +1,2 @@
 obj-y   := common.o
 obj-y   += time.o
-obj-y   += io.o
diff --git a/arch/arm/mach-picoxcell/common.c b/arch/arm/mach-picoxcell/common.c
index ad871bd7b1ab..febee47bc116 100644
--- a/arch/arm/mach-picoxcell/common.c
+++ b/arch/arm/mach-picoxcell/common.c
@@ -16,12 +16,25 @@
 
 #include <asm/mach/arch.h>
 #include <asm/hardware/vic.h>
+#include <asm/mach/map.h>
 
 #include <mach/map.h>
 #include <mach/picoxcell_soc.h>
 
 #include "common.h"
 
+static struct map_desc io_map __initdata = {
+        .virtual        = PHYS_TO_IO(PICOXCELL_PERIPH_BASE),
+        .pfn            = __phys_to_pfn(PICOXCELL_PERIPH_BASE),
+        .length         = PICOXCELL_PERIPH_LENGTH,
+        .type           = MT_DEVICE,
+};
+
+static void __init picoxcell_map_io(void)
+{
+        iotable_init(&io_map, 1);
+}
+
 static void __init picoxcell_init_machine(void)
 {
         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
@@ -45,7 +58,7 @@ static void __init picoxcell_init_irq(void)
 
 DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
         .map_io         = picoxcell_map_io,
-        .nr_irqs        = ARCH_NR_IRQS,
+        .nr_irqs        = NR_IRQS_LEGACY,
         .init_irq       = picoxcell_init_irq,
         .handle_irq     = vic_handle_irq,
         .timer          = &picoxcell_timer,
diff --git a/arch/arm/mach-picoxcell/common.h b/arch/arm/mach-picoxcell/common.h
index 5263f0fa095c..83d55ab956a4 100644
--- a/arch/arm/mach-picoxcell/common.h
+++ b/arch/arm/mach-picoxcell/common.h
@@ -13,6 +13,5 @@
 #include <asm/mach/time.h>
 
 extern struct sys_timer picoxcell_timer;
-extern void picoxcell_map_io(void);
 
 #endif /* __PICOXCELL_COMMON_H__ */
diff --git a/arch/arm/mach-picoxcell/include/mach/irqs.h b/arch/arm/mach-picoxcell/include/mach/irqs.h
index 4d13ed970919..59eac1ee2820 100644
--- a/arch/arm/mach-picoxcell/include/mach/irqs.h
+++ b/arch/arm/mach-picoxcell/include/mach/irqs.h
@@ -1,8 +1,6 @@
 /*
  * Copyright (c) 2011 Picochip Ltd., Jamie Iles
  *
- * This file contains the hardware definitions of the picoXcell SoC devices.
- *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
@@ -16,10 +14,7 @@
 #ifndef __MACH_IRQS_H
 #define __MACH_IRQS_H
 
-#define ARCH_NR_IRQS                    64
-#define NR_IRQS                         (128 + ARCH_NR_IRQS)
-
-#define IRQ_VIC0_BASE                   0
-#define IRQ_VIC1_BASE                   32
+/* We dynamically allocate our irq_desc's. */
+#define NR_IRQS                         0
 
 #endif /* __MACH_IRQS_H */
diff --git a/arch/arm/mach-picoxcell/include/mach/memory.h b/arch/arm/mach-picoxcell/include/mach/memory.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/arm/mach-picoxcell/include/mach/memory.h
+++ /dev/null
@@ -1 +0,0 @@
-/* empty */
diff --git a/arch/arm/mach-picoxcell/include/mach/system.h b/arch/arm/mach-picoxcell/include/mach/system.h
index 67c589b0c1bc..1a5d8cb57df4 100644
--- a/arch/arm/mach-picoxcell/include/mach/system.h
+++ b/arch/arm/mach-picoxcell/include/mach/system.h
@@ -23,9 +23,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(int mode, const char *cmd)
-{
-        /* Watchdog reset to go here. */
-}
-
 #endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/arch/arm/mach-picoxcell/io.c b/arch/arm/mach-picoxcell/io.c
deleted file mode 100644
index 39e9b9e8cc37..000000000000
--- a/arch/arm/mach-picoxcell/io.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Copyright (c) 2011 Picochip Ltd., Jamie Iles
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * All enquiries to support@picochip.com
- */
-#include <linux/io.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/of.h>
-
-#include <asm/mach/map.h>
-
-#include <mach/map.h>
-#include <mach/picoxcell_soc.h>
-
-#include "common.h"
-
-void __init picoxcell_map_io(void)
-{
-        struct map_desc io_map = {
-                .virtual        = PHYS_TO_IO(PICOXCELL_PERIPH_BASE),
-                .pfn            = __phys_to_pfn(PICOXCELL_PERIPH_BASE),
-                .length         = PICOXCELL_PERIPH_LENGTH,
-                .type           = MT_DEVICE,
-        };
-
-        iotable_init(&io_map, 1);
-}
diff --git a/arch/arm/mach-picoxcell/time.c b/arch/arm/mach-picoxcell/time.c
index 90a554ff4499..6c89cf8ab22e 100644
--- a/arch/arm/mach-picoxcell/time.c
+++ b/arch/arm/mach-picoxcell/time.c
@@ -11,7 +11,6 @@
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
-#include <linux/sched.h>
 
 #include <asm/mach/time.h>
 #include <asm/sched_clock.h>
@@ -66,21 +65,11 @@ static void picoxcell_add_clocksource(struct device_node *source_timer)
         dw_apb_clocksource_register(cs);
 }
 
-static DEFINE_CLOCK_DATA(cd);
 static void __iomem *sched_io_base;
 
-unsigned long long notrace sched_clock(void)
+unsigned u32 notrace picoxcell_read_sched_clock(void)
 {
-        cycle_t cyc = sched_io_base ? __raw_readl(sched_io_base) : 0;
-
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace picoxcell_update_sched_clock(void)
-{
-        cycle_t cyc = sched_io_base ? __raw_readl(sched_io_base) : 0;
-
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return __raw_readl(sched_io_base);
 }
 
 static const struct of_device_id picoxcell_rtc_ids[] __initconst = {
@@ -100,7 +89,7 @@ static void picoxcell_init_sched_clock(void)
         timer_get_base_and_rate(sched_timer, &sched_io_base, &rate);
         of_node_put(sched_timer);
 
-        init_sched_clock(&cd, picoxcell_update_sched_clock, 32, rate);
+        setup_sched_clock(picoxcell_read_sched_clock, 32, rate);
 }
 
 static const struct of_device_id picoxcell_timer_ids[] __initconst = {
diff --git a/arch/arm/mach-pnx4008/core.c b/arch/arm/mach-pnx4008/core.c
index cdb95e726f5c..4cfb40b2ec19 100644
--- a/arch/arm/mach-pnx4008/core.c
+++ b/arch/arm/mach-pnx4008/core.c
@@ -260,6 +260,11 @@ void __init pnx4008_map_io(void)
         iotable_init(pnx4008_io_desc, ARRAY_SIZE(pnx4008_io_desc));
 }
 
+static void pnx4008_restart(char mode, const char *cmd)
+{
+        soft_restart(0);
+}
+
 extern struct sys_timer pnx4008_timer;
 
 MACHINE_START(PNX4008, "Philips PNX4008")
@@ -269,4 +274,5 @@ MACHINE_START(PNX4008, "Philips PNX4008")
         .init_irq               = pnx4008_init_irq,
         .init_machine           = pnx4008_init,
         .timer                  = &pnx4008_timer,
+        .restart                = pnx4008_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pnx4008/include/mach/system.h b/arch/arm/mach-pnx4008/include/mach/system.h
index 5d6384a6128c..60cfe7188091 100644
--- a/arch/arm/mach-pnx4008/include/mach/system.h
+++ b/arch/arm/mach-pnx4008/include/mach/system.h
@@ -21,18 +21,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include <mach/platform.h>
-
 static void arch_idle(void)
 {
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        soft_restart(0);
-}
-
 #endif
diff --git a/arch/arm/mach-prima2/common.h b/arch/arm/mach-prima2/common.h
index 83e5d2128118..b28a930d4f8a 100644
--- a/arch/arm/mach-prima2/common.h
+++ b/arch/arm/mach-prima2/common.h
@@ -16,6 +16,7 @@ extern struct sys_timer sirfsoc_timer;
 
 extern void __init sirfsoc_of_irq_init(void);
 extern void __init sirfsoc_of_clk_init(void);
+extern void sirfsoc_restart(char, const char *);
 
 #ifndef CONFIG_DEBUG_LL
 static inline void sirfsoc_map_lluart(void)  {}
diff --git a/arch/arm/mach-prima2/include/mach/system.h b/arch/arm/mach-prima2/include/mach/system.h
index 0dbd257ad16d..2c7d2a9d0c92 100644
--- a/arch/arm/mach-prima2/include/mach/system.h
+++ b/arch/arm/mach-prima2/include/mach/system.h
@@ -9,21 +9,9 @@
 #ifndef __MACH_SYSTEM_H__
 #define __MACH_SYSTEM_H__
 
-#include <linux/bitops.h>
-#include <mach/hardware.h>
-
-#define SIRFSOC_SYS_RST_BIT  BIT(31)
-
-extern void __iomem *sirfsoc_rstc_base;
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);
-}
-
 #endif
diff --git a/arch/arm/mach-prima2/prima2.c b/arch/arm/mach-prima2/prima2.c
index a12b689a8702..02b9c05ff990 100644
--- a/arch/arm/mach-prima2/prima2.c
+++ b/arch/arm/mach-prima2/prima2.c
@@ -40,4 +40,5 @@ MACHINE_START(PRIMA2_EVB, "prima2cb")
         .dma_zone_size  = SZ_256M,
         .init_machine   = sirfsoc_mach_init,
         .dt_compat      = prima2cb_dt_match,
+        .restart        = sirfsoc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c
index 492cfa8d2610..762adb73ab7c 100644
--- a/arch/arm/mach-prima2/rstc.c
+++ b/arch/arm/mach-prima2/rstc.c
@@ -68,3 +68,10 @@ int sirfsoc_reset_device(struct device *dev)
 
         return 0;
 }
+
+#define SIRFSOC_SYS_RST_BIT  BIT(31)
+
+void sirfsoc_restart(char mode, const char *cmd)
+{
+        writel(SIRFSOC_SYS_RST_BIT, sirfsoc_rstc_base);
+}
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index 4b81f59a4cba..82514f5c38f1 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -829,4 +829,5 @@ MACHINE_START(BALLOON3, "Balloon3")
         .timer          = &pxa_timer,
         .init_machine   = balloon3_init,
         .atag_offset    = 0x100,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c
index 4efc16d39c79..c2f0be040d27 100644
--- a/arch/arm/mach-pxa/capc7117.c
+++ b/arch/arm/mach-pxa/capc7117.c
@@ -153,5 +153,6 @@ MACHINE_START(CAPC7117,
         .init_irq = pxa3xx_init_irq,
         .handle_irq = pxa3xx_handle_irq,
         .timer = &pxa_timer,
-        .init_machine = capc7117_init
+        .init_machine = capc7117_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index f2e4190080cb..ec170a552c23 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -524,4 +524,5 @@ MACHINE_START(ARMCORE, "Compulab CM-X2XX")
 #ifdef CONFIG_PCI
         .dma_zone_size  = SZ_64M,
 #endif
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index e096bba8fd57..7236974da0b7 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -858,4 +858,5 @@ MACHINE_START(CM_X300, "CM-X300 module")
         .timer          = &pxa_timer,
         .init_machine   = cm_x300_init,
         .fixup          = cm_x300_fixup,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c
index 05bfa1b1c001..6a685165c9f2 100644
--- a/arch/arm/mach-pxa/colibri-pxa270.c
+++ b/arch/arm/mach-pxa/colibri-pxa270.c
@@ -313,6 +313,7 @@ MACHINE_START(COLIBRI, "Toradex Colibri PXA270")
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 
 MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC")
@@ -322,5 +323,6 @@ MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC")
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index c825e8bf2db1..c01059a61f33 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -189,5 +189,6 @@ MACHINE_START(COLIBRI300, "Toradex Colibri PXA300")
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index d23b92b80488..5028f2300d50 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -259,5 +259,6 @@ MACHINE_START(COLIBRI320, "Toradex Colibri PXA320")
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 549468d088b9..9d4dc5970b9c 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -655,7 +655,7 @@ static void corgi_poweroff(void)
                 /* Green LED off tells the bootloader to halt */
                 gpio_set_value(CORGI_GPIO_LED_GREEN, 0);
 
-        arm_machine_restart('h', NULL);
+        pxa_restart('h', NULL);
 }
 
 static void corgi_restart(char mode, const char *cmd)
@@ -664,13 +664,12 @@ static void corgi_restart(char mode, const char *cmd)
                 /* Green LED on tells the bootloader to reboot */
                 gpio_set_value(CORGI_GPIO_LED_GREEN, 1);
 
-        arm_machine_restart('h', cmd);
+        pxa_restart('h', cmd);
 }
 
 static void __init corgi_init(void)
 {
         pm_power_off = corgi_poweroff;
-        arm_pm_restart = corgi_restart;
 
         /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
         PCFR |= PCFR_OPDE;
@@ -726,6 +725,7 @@ MACHINE_START(CORGI, "SHARP Corgi")
         .handle_irq     = pxa25x_handle_irq,
         .init_machine   = corgi_init,
         .timer          = &pxa_timer,
+        .restart        = corgi_restart,
 MACHINE_END
 #endif
 
@@ -737,6 +737,7 @@ MACHINE_START(SHEPHERD, "SHARP Shepherd")
         .handle_irq     = pxa25x_handle_irq,
         .init_machine   = corgi_init,
         .timer          = &pxa_timer,
+        .restart        = corgi_restart,
 MACHINE_END
 #endif
 
@@ -748,6 +749,7 @@ MACHINE_START(HUSKY, "SHARP Husky")
         .handle_irq     = pxa25x_handle_irq,
         .init_machine   = corgi_init,
         .timer          = &pxa_timer,
+        .restart        = corgi_restart,
 MACHINE_END
 #endif
 
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c
index 5e2cf39e9e4c..fb5a51d834e5 100644
--- a/arch/arm/mach-pxa/csb726.c
+++ b/arch/arm/mach-pxa/csb726.c
@@ -278,4 +278,5 @@ MACHINE_START(CSB726, "Cogent CSB726")
         .handle_irq       = pxa27x_handle_irq,
         .init_machine   = csb726_init,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index 94acc0b01dd6..bd396ba67af7 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -1305,6 +1305,7 @@ MACHINE_START(EM_X270, "Compulab EM-X270")
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = em_x270_init,
+        .restart        = pxa_restart,
 MACHINE_END
 
 MACHINE_START(EXEDA, "Compulab eXeda")
@@ -1314,4 +1315,5 @@ MACHINE_START(EXEDA, "Compulab eXeda")
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = em_x270_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index d82b7aa3c096..69473db97758 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -196,6 +196,7 @@ MACHINE_START(E330, "Toshiba e330")
         .fixup          = eseries_fixup,
         .init_machine   = e330_init,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -246,6 +247,7 @@ MACHINE_START(E350, "Toshiba e350")
         .fixup          = eseries_fixup,
         .init_machine   = e350_init,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -369,6 +371,7 @@ MACHINE_START(E400, "Toshiba e400")
         .fixup          = eseries_fixup,
         .init_machine   = e400_init,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -558,6 +561,7 @@ MACHINE_START(E740, "Toshiba e740")
         .fixup          = eseries_fixup,
         .init_machine   = e740_init,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -750,6 +754,7 @@ MACHINE_START(E750, "Toshiba e750")
         .fixup          = eseries_fixup,
         .init_machine   = e750_init,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -955,5 +960,6 @@ MACHINE_START(E800, "Toshiba e800")
         .fixup          = eseries_fixup,
         .init_machine   = e800_init,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
index 8308eee5a924..15ab2533667d 100644
--- a/arch/arm/mach-pxa/ezx.c
+++ b/arch/arm/mach-pxa/ezx.c
@@ -804,6 +804,7 @@ MACHINE_START(EZX_A780, "Motorola EZX A780")
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = a780_init,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -870,6 +871,7 @@ MACHINE_START(EZX_E680, "Motorola EZX E680")
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = e680_init,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -936,6 +938,7 @@ MACHINE_START(EZX_A1200, "Motorola EZX A1200")
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = a1200_init,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -1127,6 +1130,7 @@ MACHINE_START(EZX_A910, "Motorola EZX A910")
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = a910_init,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -1193,6 +1197,7 @@ MACHINE_START(EZX_E6, "Motorola EZX E6")
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = e6_init,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -1233,5 +1238,6 @@ MACHINE_START(EZX_E2, "Motorola EZX E2")
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = e2_init,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 92a2e85ab02c..0d729e6619df 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -57,3 +57,5 @@ void __init pxa_set_ffuart_info(void *info);
 void __init pxa_set_btuart_info(void *info);
 void __init pxa_set_stuart_info(void *info);
 void __init pxa_set_hwuart_info(void *info);
+
+void pxa_restart(char, const char *);
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index ffdd70dad327..ac3b1cef4751 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -239,4 +239,5 @@ MACHINE_START(GUMSTIX, "Gumstix")
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = gumstix_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c
index 4b5e110640b1..fde6b4c873c4 100644
--- a/arch/arm/mach-pxa/h5000.c
+++ b/arch/arm/mach-pxa/h5000.c
@@ -209,4 +209,5 @@ MACHINE_START(H5400, "HP iPAQ H5000")
         .handle_irq = pxa25x_handle_irq,
         .timer = &pxa_timer,
         .init_machine = h5000_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/himalaya.c b/arch/arm/mach-pxa/himalaya.c
index f2c324570844..26d069a9f900 100644
--- a/arch/arm/mach-pxa/himalaya.c
+++ b/arch/arm/mach-pxa/himalaya.c
@@ -164,4 +164,5 @@ MACHINE_START(HIMALAYA, "HTC Himalaya")
         .handle_irq = pxa25x_handle_irq,
         .init_machine = himalaya_init,
         .timer = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 6f6368ece9bd..ce16bdae96de 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -845,4 +845,5 @@ MACHINE_START(H4700, "HP iPAQ HX4700")
         .handle_irq     = pxa27x_handle_irq,
         .init_machine = hx4700_init,
         .timer        = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
index f78d5db758da..e239b82c99d7 100644
--- a/arch/arm/mach-pxa/icontrol.c
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -196,5 +196,6 @@ MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM")
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
-        .init_machine   = icontrol_init
+        .init_machine   = icontrol_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index ddf20e5c376e..fbabd84e110c 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -199,4 +199,5 @@ MACHINE_START(PXA_IDP, "Vibren PXA255 IDP")
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = idp_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/include/mach/system.h b/arch/arm/mach-pxa/include/mach/system.h
index d1fce8b6d105..c5afacd3cc0b 100644
--- a/arch/arm/mach-pxa/include/mach/system.h
+++ b/arch/arm/mach-pxa/include/mach/system.h
@@ -9,15 +9,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-
-#include <asm/proc-fns.h>
-#include "hardware.h"
-#include "pxa2xx-regs.h"
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-
-void arch_reset(char mode, const char *cmd);
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 7b324ec6449f..c337c7eed514 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -445,4 +445,5 @@ MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleto
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = littleton_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 1dd530279e0b..6119c015f393 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -505,4 +505,5 @@ MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = lpd270_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index c48ce6da9184..4b7a52871652 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -556,4 +556,5 @@ MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)")
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = lubbock_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 4b796c37af3e..4e6774fff422 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -760,4 +760,5 @@ MACHINE_START(MAGICIAN, "HTC Magician")
         .handle_irq = pxa27x_handle_irq,
         .init_machine = magician_init,
         .timer = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 0567d3965fda..ca14555d5e15 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -622,4 +622,5 @@ MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = mainstone_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index f2d75217eb60..dce71b4a3a55 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -692,13 +692,13 @@ static void mioa701_machine_exit(void);
 static void mioa701_poweroff(void)
 {
         mioa701_machine_exit();
-        arm_machine_restart('s', NULL);
+        pxa_restart('s', NULL);
 }
 
 static void mioa701_restart(char c, const char *cmd)
 {
         mioa701_machine_exit();
-        arm_machine_restart('s', cmd);
+        pxa_restart('s', cmd);
 }
 
 static struct gpio global_gpios[] = {
@@ -739,7 +739,6 @@ static void __init mioa701_machine_init(void)
         pxa_set_udc_info(&mioa701_udc_info);
         pxa_set_ac97_info(&mioa701_ac97_info);
         pm_power_off = mioa701_poweroff;
-        arm_pm_restart = mioa701_restart;
         platform_add_devices(devices, ARRAY_SIZE(devices));
         gsm_init();
 
@@ -763,4 +762,5 @@ MACHINE_START(MIOA701, "MIO A701")
         .handle_irq     = &pxa27x_handle_irq,
         .init_machine   = mioa701_machine_init,
         .timer          = &pxa_timer,
+        .restart        = mioa701_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/mp900.c b/arch/arm/mach-pxa/mp900.c
index 4af5d513c380..169bf8f97af0 100644
--- a/arch/arm/mach-pxa/mp900.c
+++ b/arch/arm/mach-pxa/mp900.c
@@ -98,5 +98,6 @@ MACHINE_START(NEC_MP900, "MobilePro900/C")
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .init_machine   = mp900c_init,
+        .restart        = pxa_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c
index 3d4a2819cae1..1fa80f4f80c8 100644
--- a/arch/arm/mach-pxa/palmld.c
+++ b/arch/arm/mach-pxa/palmld.c
@@ -347,5 +347,6 @@ MACHINE_START(PALMLD, "Palm LifeDrive")
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
-        .init_machine   = palmld_init
+        .init_machine   = palmld_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c
index 99d6bcf1f974..5ba14316bd9c 100644
--- a/arch/arm/mach-pxa/palmt5.c
+++ b/arch/arm/mach-pxa/palmt5.c
@@ -208,5 +208,6 @@ MACHINE_START(PALMT5, "Palm Tungsten|T5")
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
-        .init_machine   = palmt5_init
+        .init_machine   = palmt5_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c
index 2c24c67fd92b..29b51b40f09d 100644
--- a/arch/arm/mach-pxa/palmtc.c
+++ b/arch/arm/mach-pxa/palmtc.c
@@ -542,5 +542,6 @@ MACHINE_START(PALMTC, "Palm Tungsten|C")
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
-        .init_machine   = palmtc_init
+        .init_machine   = palmtc_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index 9376da06404c..5ebf49acb827 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -361,5 +361,6 @@ MACHINE_START(PALMTE2, "Palm Tungsten|E2")
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
-        .init_machine   = palmte2_init
+        .init_machine   = palmte2_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c
index 94e9708b349d..ec8249156c08 100644
--- a/arch/arm/mach-pxa/palmtreo.c
+++ b/arch/arm/mach-pxa/palmtreo.c
@@ -452,6 +452,7 @@ MACHINE_START(TREO680, "Palm Treo 680")
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = treo680_init,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -464,5 +465,6 @@ MACHINE_START(CENTRO, "Palm Centro 685")
         .handle_irq       = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = centro_init,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index 4e3e45927e95..6170d76dfba8 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -369,5 +369,6 @@ MACHINE_START(PALMTX, "Palm T|X")
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
-        .init_machine   = palmtx_init
+        .init_machine   = palmtx_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index 68e18baf8e07..b2dff9d415eb 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -404,5 +404,6 @@ MACHINE_START(PALMZ72, "Palm Zire72")
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
-        .init_machine   = palmz72_init
+        .init_machine   = palmz72_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c
index 0b825a353537..fe9054435b6f 100644
--- a/arch/arm/mach-pxa/pcm027.c
+++ b/arch/arm/mach-pxa/pcm027.c
@@ -265,4 +265,5 @@ MACHINE_START(PCM027, "Phytec Messtechnik GmbH phyCORE-PXA270")
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = pcm027_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index afcb48a5792c..b260ce872d2d 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -417,7 +417,7 @@ static struct i2c_board_info __initdata poodle_i2c_devices[] = {
 
 static void poodle_poweroff(void)
 {
-        arm_machine_restart('h', NULL);
+        pxa_restart('h', NULL);
 }
 
 static void __init poodle_init(void)
@@ -466,4 +466,5 @@ MACHINE_START(POODLE, "SHARP Poodle")
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = poodle_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index f0c05f4d12ed..4962b1676629 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -1093,6 +1093,7 @@ MACHINE_START(RAUMFELD_RC, "Raumfeld Controller")
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -1104,6 +1105,7 @@ MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector")
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -1115,5 +1117,6 @@ MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker")
         .init_irq       = pxa3xx_init_irq,
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index b8bcda15da81..c8497b00cdfe 100644
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -81,8 +81,11 @@ static void do_hw_reset(void)
         OSMR3 = OSCR + 368640;  /* ... in 100 ms */
 }
 
-void arch_reset(char mode, const char *cmd)
+void pxa_restart(char mode, const char *cmd)
 {
+        local_irq_disable();
+        local_fiq_disable();
+
         clear_reset_status(RESET_STATUS_ALL);
 
         switch (mode) {
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index fc2c1e05af9c..878707056e65 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -602,4 +602,5 @@ MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)")
         .handle_irq       = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = saar_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
index 3e999e308a2d..b6dbaca460c7 100644
--- a/arch/arm/mach-pxa/saarb.c
+++ b/arch/arm/mach-pxa/saarb.c
@@ -111,5 +111,6 @@ MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)")
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = saarb_init,
+        .restart        = pxa_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 2f57d94de727..a7f81a3fd132 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -926,7 +926,7 @@ static inline void spitz_i2c_init(void) {}
  ******************************************************************************/
 static void spitz_poweroff(void)
 {
-        arm_machine_restart('g', NULL);
+        pxa_restart('g', NULL);
 }
 
 static void spitz_restart(char mode, const char *cmd)
@@ -943,7 +943,6 @@ static void __init spitz_init(void)
 {
         init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0);
         pm_power_off = spitz_poweroff;
-        arm_pm_restart = spitz_restart;
 
         PMCR = 0x00;
 
@@ -989,6 +988,7 @@ MACHINE_START(SPITZ, "SHARP Spitz")
         .handle_irq     = pxa27x_handle_irq,
         .init_machine   = spitz_init,
         .timer          = &pxa_timer,
+        .restart        = spitz_restart,
 MACHINE_END
 #endif
 
@@ -1001,6 +1001,7 @@ MACHINE_START(BORZOI, "SHARP Borzoi")
         .handle_irq     = pxa27x_handle_irq,
         .init_machine   = spitz_init,
         .timer          = &pxa_timer,
+        .restart        = spitz_restart,
 MACHINE_END
 #endif
 
@@ -1013,5 +1014,6 @@ MACHINE_START(AKITA, "SHARP Akita")
         .handle_irq     = pxa27x_handle_irq,
         .init_machine   = spitz_init,
         .timer          = &pxa_timer,
+        .restart        = spitz_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 4c9a48bef569..80d7f23ad0fd 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -1005,6 +1005,7 @@ MACHINE_START(INTELMOTE2, "IMOTE 2")
         .timer          = &pxa_timer,
         .init_machine   = imote2_init,
         .atag_offset    = 0x100,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
 
@@ -1017,5 +1018,6 @@ MACHINE_START(STARGATE2, "Stargate 2")
         .timer = &pxa_timer,
         .init_machine = stargate2_init,
         .atag_offset = 0x100,
+        .restart        = pxa_restart,
 MACHINE_END
 #endif
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index ad47bb98f30d..4fa36a3e383c 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -495,4 +495,5 @@ MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)")
         .handle_irq       = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = tavorevb_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c
index fd569167302a..8a22879f0bb0 100644
--- a/arch/arm/mach-pxa/tavorevb3.c
+++ b/arch/arm/mach-pxa/tavorevb3.c
@@ -132,4 +132,5 @@ MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)")
         .handle_irq       = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = evb3_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index de684701449c..b503049d6d26 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -16,7 +16,6 @@
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/clockchips.h>
-#include <linux/sched.h>
 
 #include <asm/div64.h>
 #include <asm/mach/irq.h>
@@ -32,18 +31,10 @@
  * long as there is always less than 582 seconds between successive
  * calls to sched_clock() which should always be the case in practice.
  */
-static DEFINE_CLOCK_DATA(cd);
 
-unsigned long long notrace sched_clock(void)
+static u32 notrace pxa_read_sched_clock(void)
 {
-        u32 cyc = OSCR;
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace pxa_update_sched_clock(void)
-{
-        u32 cyc = OSCR;
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return OSCR;
 }
 
 
@@ -119,7 +110,7 @@ static void __init pxa_timer_init(void)
         OIER = 0;
         OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
 
-        init_sched_clock(&cd, pxa_update_sched_clock, 32, clock_tick_rate);
+        setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate);
 
         clockevents_calc_mult_shift(&ckevt_pxa_osmr0, clock_tick_rate, 4);
         ckevt_pxa_osmr0.max_delta_ns =
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index ef6453041cf1..dfe40f8705aa 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -905,7 +905,7 @@ static struct platform_device *devices[] __initdata = {
 
 static void tosa_poweroff(void)
 {
-        arm_machine_restart('g', NULL);
+        pxa_restart('g', NULL);
 }
 
 static void tosa_restart(char mode, const char *cmd)
@@ -935,7 +935,6 @@ static void __init tosa_init(void)
         init_gpio_reset(TOSA_GPIO_ON_RESET, 0, 0);
 
         pm_power_off = tosa_poweroff;
-        arm_pm_restart = tosa_restart;
 
         PCFR |= PCFR_OPDE;
 
@@ -978,4 +977,5 @@ MACHINE_START(TOSA, "SHARP Tosa")
         .handle_irq       = pxa25x_handle_irq,
         .init_machine   = tosa_init,
         .timer          = &pxa_timer,
+        .restart        = tosa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 1aaed2b17e10..0f30af617d8f 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -561,6 +561,7 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 
 MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
@@ -571,4 +572,5 @@ MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 242ddae332d3..afe2b7495523 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -998,4 +998,5 @@ MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = viper_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index ca0c6615028c..fed5fb088714 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -721,5 +721,6 @@ MACHINE_START(VPAC270, "Voipac PXA270")
         .init_irq       = pxa27x_init_irq,
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
-        .init_machine   = vpac270_init
+        .init_machine   = vpac270_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c
index 70e1730ef282..4bbe9a36fe74 100644
--- a/arch/arm/mach-pxa/xcep.c
+++ b/arch/arm/mach-pxa/xcep.c
@@ -185,5 +185,6 @@ MACHINE_START(XCEP, "Iskratel XCEP")
         .init_irq       = pxa25x_init_irq,
         .handle_irq     = pxa25x_handle_irq,
         .timer          = &pxa_timer,
+        .restart        = pxa_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index ead32c90fec1..d75f66ab8c34 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -725,4 +725,5 @@ MACHINE_START(ZIPIT2, "Zipit Z2")
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = z2_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 498b83b089f3..9db35a7fcfc0 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -911,5 +911,6 @@ MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS")
         .handle_irq     = pxa27x_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = zeus_init,
+        .restart        = pxa_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 6c39c3328418..7678b1bf7903 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -430,4 +430,5 @@ MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)")
         .handle_irq     = pxa3xx_handle_irq,
         .timer          = &pxa_timer,
         .init_machine   = zylonite_init,
+        .restart        = pxa_restart,
 MACHINE_END
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index dba6d0c1fc17..c593be428b8f 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -12,6 +12,8 @@ config REALVIEW_EB_A9MP
         bool "Support Multicore Cortex-A9 Tile"
         depends on MACH_REALVIEW_EB
         select CPU_V7
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
         help
           Enable support for the Cortex-A9MPCore tile fitted to the
           Realview(R) Emulation Baseboard platform.
@@ -21,6 +23,8 @@ config REALVIEW_EB_ARM11MP
         depends on MACH_REALVIEW_EB
         select CPU_V6K
         select ARCH_HAS_BARRIERS if SMP
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
         help
           Enable support for the ARM11MPCore tile fitted to the Realview(R)
           Emulation Baseboard platform.
@@ -39,6 +43,8 @@ config MACH_REALVIEW_PB11MP
         select CPU_V6K
         select ARM_GIC
         select HAVE_PATA_PLATFORM
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
         select ARCH_HAS_BARRIERS if SMP
         help
           Include support for the ARM(R) RealView(R) Platform Baseboard for
@@ -51,6 +57,7 @@ config MACH_REALVIEW_PB1176
         select CPU_V6
         select ARM_GIC
         select HAVE_TCM
+        select MIGHT_HAVE_CACHE_L2X0
         help
           Include support for the ARM(R) RealView(R) Platform Baseboard for
           ARM1176JZF-S.
@@ -78,6 +85,8 @@ config MACH_REALVIEW_PBX
         bool "Support RealView(R) Platform Baseboard Explore"
         select ARM_GIC
         select HAVE_PATA_PLATFORM
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
         select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET
         select ZONE_DMA if SPARSEMEM
         help
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 47259c89a75e..735b57aaf2d6 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -65,6 +65,5 @@ extern int realview_usb_register(struct resource *res);
 extern void realview_init_early(void);
 extern void realview_fixup(struct tag *tags, char **from,
                            struct meminfo *meminfo);
-extern void (*realview_reset)(char);
 
 #endif
diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h
index 6657ff231161..471b671159ce 100644
--- a/arch/arm/mach-realview/include/mach/system.h
+++ b/arch/arm/mach-realview/include/mach/system.h
@@ -21,12 +21,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include <mach/platform.h>
-
-void (*realview_reset)(char mode);
-
 static inline void arch_idle(void)
 {
         /*
@@ -36,15 +30,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /*
-         * To reset, we hit the on-board reset register
-         * in the system FPGA
-         */
-        if (realview_reset)
-                realview_reset(mode);
-        dsb();
-}
-
 #endif
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 1ca944aea7f8..f92a920cf507 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -415,7 +415,7 @@ static struct sys_timer realview_eb_timer = {
         .init           = realview_eb_timer_init,
 };
 
-static void realview_eb_reset(char mode)
+static void realview_eb_restart(char mode, const char *cmd)
 {
         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
@@ -427,6 +427,7 @@ static void realview_eb_reset(char mode)
         __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
         if (core_tile_eb11mp())
                 __raw_writel(0x0008, reset_ctrl);
+        dsb();
 }
 
 static void __init realview_eb_init(void)
@@ -458,7 +459,6 @@ static void __init realview_eb_init(void)
 #ifdef CONFIG_LEDS
         leds_event = realview_leds_event;
 #endif
-        realview_reset = realview_eb_reset;
 }
 
 MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
@@ -474,4 +474,5 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
 #ifdef CONFIG_ZONE_DMA
         .dma_zone_size  = SZ_256M,
 #endif
+        .restart        = realview_eb_restart,
 MACHINE_END
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index bd8fec8b20d9..8ec37b29e0fa 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -336,12 +336,13 @@ static struct sys_timer realview_pb1176_timer = {
         .init           = realview_pb1176_timer_init,
 };
 
-static void realview_pb1176_reset(char mode)
+static void realview_pb1176_restart(char mode, const char *cmd)
 {
         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
         __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
         __raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl);
+        dsb();
 }
 
 static void realview_pb1176_fixup(struct tag *tags, char **from,
@@ -381,7 +382,6 @@ static void __init realview_pb1176_init(void)
 #ifdef CONFIG_LEDS
         leds_event = realview_leds_event;
 #endif
-        realview_reset = realview_pb1176_reset;
 }
 
 MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
@@ -397,4 +397,5 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
 #ifdef CONFIG_ZONE_DMA
         .dma_zone_size  = SZ_256M,
 #endif
+        .restart        = realview_pb1176_restart,
 MACHINE_END
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index fa73ba81a449..f035fda8b619 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -315,7 +315,7 @@ static struct sys_timer realview_pb11mp_timer = {
         .init           = realview_pb11mp_timer_init,
 };
 
-static void realview_pb11mp_reset(char mode)
+static void realview_pb11mp_restart(char mode, const char *cmd)
 {
         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
@@ -327,6 +327,7 @@ static void realview_pb11mp_reset(char mode)
         __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
         __raw_writel(0x0000, reset_ctrl);
         __raw_writel(0x0004, reset_ctrl);
+        dsb();
 }
 
 static void __init realview_pb11mp_init(void)
@@ -355,7 +356,6 @@ static void __init realview_pb11mp_init(void)
 #ifdef CONFIG_LEDS
         leds_event = realview_leds_event;
 #endif
-        realview_reset = realview_pb11mp_reset;
 }
 
 MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
@@ -371,4 +371,5 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
 #ifdef CONFIG_ZONE_DMA
         .dma_zone_size  = SZ_256M,
 #endif
+        .restart        = realview_pb11mp_restart,
 MACHINE_END
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index 6e5f2b9ddb7e..0109c8b440cc 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -271,7 +271,7 @@ static struct sys_timer realview_pba8_timer = {
         .init           = realview_pba8_timer_init,
 };
 
-static void realview_pba8_reset(char mode)
+static void realview_pba8_restart(char mode, const char *cmd)
 {
         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
@@ -283,6 +283,7 @@ static void realview_pba8_reset(char mode)
         __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
         __raw_writel(0x0000, reset_ctrl);
         __raw_writel(0x0004, reset_ctrl);
+        dsb();
 }
 
 static void __init realview_pba8_init(void)
@@ -305,7 +306,6 @@ static void __init realview_pba8_init(void)
 #ifdef CONFIG_LEDS
         leds_event = realview_leds_event;
 #endif
-        realview_reset = realview_pba8_reset;
 }
 
 MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
@@ -321,4 +321,5 @@ MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
 #ifdef CONFIG_ZONE_DMA
         .dma_zone_size  = SZ_256M,
 #endif
+        .restart        = realview_pba8_restart,
 MACHINE_END
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index 7aabc21af01c..0194b3e26dc1 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -339,7 +339,7 @@ static void realview_pbx_fixup(struct tag *tags, char **from,
 #endif
 }
 
-static void realview_pbx_reset(char mode)
+static void realview_pbx_restart(char mode, const char *cmd)
 {
         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
@@ -351,6 +351,7 @@ static void realview_pbx_reset(char mode)
         __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
         __raw_writel(0x00F0, reset_ctrl);
         __raw_writel(0x00F4, reset_ctrl);
+        dsb();
 }
 
 static void __init realview_pbx_init(void)
@@ -388,7 +389,6 @@ static void __init realview_pbx_init(void)
 #ifdef CONFIG_LEDS
         leds_event = realview_leds_event;
 #endif
-        realview_reset = realview_pbx_reset;
 }
 
 MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
@@ -404,4 +404,5 @@ MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
 #ifdef CONFIG_ZONE_DMA
         .dma_zone_size  = SZ_256M,
 #endif
+        .restart        = realview_pbx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-rpc/include/mach/system.h b/arch/arm/mach-rpc/include/mach/system.h
index a354f4d092c8..359bab94b6af 100644
--- a/arch/arm/mach-rpc/include/mach/system.h
+++ b/arch/arm/mach-rpc/include/mach/system.h
@@ -7,21 +7,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include <asm/hardware/iomd.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        iomd_writeb(0, IOMD_ROMCR0);
-
-        /*
-         * Jump into the ROM
-         */
-        soft_restart(0);
-}
diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c
index 8559598ab767..3d44a59fc0df 100644
--- a/arch/arm/mach-rpc/riscpc.c
+++ b/arch/arm/mach-rpc/riscpc.c
@@ -24,6 +24,7 @@
 #include <asm/elf.h>
 #include <asm/mach-types.h>
 #include <mach/hardware.h>
+#include <asm/hardware/iomd.h>
 #include <asm/page.h>
 #include <asm/domain.h>
 #include <asm/setup.h>
@@ -214,6 +215,16 @@ static int __init rpc_init(void)
 
 arch_initcall(rpc_init);
 
+static void rpc_restart(char mode, const char *cmd)
+{
+        iomd_writeb(0, IOMD_ROMCR0);
+
+        /*
+         * Jump into the ROM
+         */
+        soft_restart(0);
+}
+
 extern struct sys_timer ioc_timer;
 
 MACHINE_START(RISCPC, "Acorn-RiscPC")
@@ -224,4 +235,5 @@ MACHINE_START(RISCPC, "Acorn-RiscPC")
         .map_io         = rpc_map_io,
         .init_irq       = rpc_init_irq,
         .timer          = &ioc_timer,
+        .restart        = rpc_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2410/common.h b/arch/arm/mach-s3c2410/common.h
new file mode 100644
index 000000000000..f65dc8062961
--- /dev/null
+++ b/arch/arm/mach-s3c2410/common.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Common Header for S3C2410 machines
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_S3C2410_COMMON_H
+#define __ARCH_ARM_MACH_S3C2410_COMMON_H
+
+void s3c2410_restart(char mode, const char *cmd);
+
+#endif /* __ARCH_ARM_MACH_S3C2410_COMMON_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/reset.h b/arch/arm/mach-s3c2410/include/mach/reset.h
deleted file mode 100644
index f8c9387b049d..000000000000
--- a/arch/arm/mach-s3c2410/include/mach/reset.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/reset.h
- *
- * Copyright (c) 2007 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C2410 CPU reset controls
-*/
-
-#ifndef __ASM_ARCH_RESET_H
-#define __ASM_ARCH_RESET_H __FILE__
-
-/* This allows the over-ride of the default reset code
-*/
-
-extern void (*s3c24xx_reset_hook)(void);
-
-#endif /* __ASM_ARCH_RESET_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/system-reset.h b/arch/arm/mach-s3c2410/include/mach/system-reset.h
deleted file mode 100644
index 913893d44650..000000000000
--- a/arch/arm/mach-s3c2410/include/mach/system-reset.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/system-reset.h
- *
- * Copyright (c) 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * S3C2410 - System define for arch_reset() function
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <mach/hardware.h>
-#include <plat/watchdog-reset.h>
-
-extern void (*s3c24xx_reset_hook)(void);
-
-static void
-arch_reset(char mode, const char *cmd)
-{
-        if (mode == 's') {
-                soft_restart(0);
-        }
-
-        if (s3c24xx_reset_hook)
-                s3c24xx_reset_hook();
-
-        arch_wdt_reset();
-
-        /* we'll take a jump through zero as a poor second */
-        soft_restart(0);
-}
diff --git a/arch/arm/mach-s3c2410/include/mach/system.h b/arch/arm/mach-s3c2410/include/mach/system.h
index a8cbca6701e5..5e215c1a5c8f 100644
--- a/arch/arm/mach-s3c2410/include/mach/system.h
+++ b/arch/arm/mach-s3c2410/include/mach/system.h
@@ -15,12 +15,10 @@
 
 #include <mach/map.h>
 #include <mach/idle.h>
-#include <mach/reset.h>
 
 #include <mach/regs-clock.h>
 
 void (*s3c24xx_idle)(void);
-void (*s3c24xx_reset_hook)(void);
 
 void s3c24xx_default_idle(void)
 {
@@ -54,5 +52,3 @@ static void arch_idle(void)
         else
                 s3c24xx_default_idle();
 }
-
-#include <mach/system-reset.h>
diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c
index 79838942b0ac..4220cc60de3c 100644
--- a/arch/arm/mach-s3c2410/mach-amlm5900.c
+++ b/arch/arm/mach-s3c2410/mach-amlm5900.c
@@ -63,6 +63,8 @@
 #include <linux/mtd/map.h>
 #include <linux/mtd/physmap.h>
 
+#include "common.h"
+
 static struct resource amlm5900_nor_resource = {
                 .start = 0x00000000,
                 .end   = 0x01000000 - 1,
@@ -241,4 +243,5 @@ MACHINE_START(AML_M5900, "AML_M5900")
         .init_irq       = s3c24xx_init_irq,
         .init_machine   = amlm5900_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index a20ae1ad4062..feeaf73933dc 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -66,6 +66,7 @@
 
 #include "usb-simtec.h"
 #include "nor-simtec.h"
+#include "common.h"
 
 #define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics"
 
@@ -164,22 +165,6 @@ static struct map_desc bast_iodesc[] __initdata = {
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
 
-static struct s3c24xx_uart_clksrc bast_serial_clocks[] = {
-        [0] = {
-                .name           = "uclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        },
-        [1] = {
-                .name           = "pclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        }
-};
-
-
 static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
         [0] = {
                 .hwport      = 0,
@@ -187,8 +172,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = bast_serial_clocks,
-                .clocks_size = ARRAY_SIZE(bast_serial_clocks),
         },
         [1] = {
                 .hwport      = 1,
@@ -196,8 +179,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = bast_serial_clocks,
-                .clocks_size = ARRAY_SIZE(bast_serial_clocks),
         },
         /* port 2 is not actually used */
         [2] = {
@@ -206,8 +187,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = bast_serial_clocks,
-                .clocks_size = ARRAY_SIZE(bast_serial_clocks),
         }
 };
 
@@ -662,4 +641,5 @@ MACHINE_START(BAST, "Simtec-BAST")
         .init_irq       = s3c24xx_init_irq,
         .init_machine   = bast_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 05a7d16e59f5..ad9d865651d7 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -70,6 +70,8 @@
 
 #include <sound/uda1380.h>
 
+#include "common.h"
+
 #define H1940_LATCH             ((void __force __iomem *)0xF8000000)
 
 #define H1940_PA_LATCH          S3C2410_CS2
@@ -751,4 +753,5 @@ MACHINE_START(H1940, "IPAQ-H1940")
         .init_irq       = h1940_init_irq,
         .init_machine   = h1940_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 1dc3e3234417..383d00ca8f60 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -51,6 +51,8 @@
 #include <plat/s3c2410.h>
 #include <plat/udc.h>
 
+#include "common.h"
+
 static struct map_desc n30_iodesc[] __initdata = {
         /* nothing here yet */
 };
@@ -591,6 +593,7 @@ MACHINE_START(N30, "Acer-N30")
         .init_machine   = n30_init,
         .init_irq       = s3c24xx_init_irq,
         .map_io         = n30_map_io,
+        .restart        = s3c2410_restart,
 MACHINE_END
 
 MACHINE_START(N35, "Acer-N35")
@@ -601,4 +604,5 @@ MACHINE_START(N35, "Acer-N35")
         .init_machine   = n30_init,
         .init_irq       = s3c24xx_init_irq,
         .map_io         = n30_map_io,
+        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c
index f03f3fd9cec9..5f1e0eeb38a9 100644
--- a/arch/arm/mach-s3c2410/mach-otom.c
+++ b/arch/arm/mach-s3c2410/mach-otom.c
@@ -38,6 +38,8 @@
 #include <plat/iic.h>
 #include <plat/cpu.h>
 
+#include "common.h"
+
 static struct map_desc otom11_iodesc[] __initdata = {
   /* Device area */
         { (u32)OTOM_VA_CS8900A_BASE, OTOM_PA_CS8900A_BASE, SZ_16M, MT_DEVICE },
@@ -121,4 +123,5 @@ MACHINE_START(OTOM, "Nex Vision - Otom 1.1")
         .init_machine   = otom11_init,
         .init_irq       = s3c24xx_init_irq,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c
index 451852156254..58f2c17b9f0d 100644
--- a/arch/arm/mach-s3c2410/mach-qt2410.c
+++ b/arch/arm/mach-s3c2410/mach-qt2410.c
@@ -62,6 +62,8 @@
 #include <plat/cpu.h>
 #include <plat/pm.h>
 
+#include "common.h"
+
 static struct map_desc qt2410_iodesc[] __initdata = {
         { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE }
 };
@@ -350,6 +352,5 @@ MACHINE_START(QT2410, "QT2410")
         .init_irq       = s3c24xx_init_irq,
         .init_machine   = qt2410_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2410_restart,
 MACHINE_END
-
-
diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c
index 99c9dfdb71c7..bdc27e772876 100644
--- a/arch/arm/mach-s3c2410/mach-smdk2410.c
+++ b/arch/arm/mach-s3c2410/mach-smdk2410.c
@@ -54,6 +54,8 @@
 
 #include <plat/common-smdk.h>
 
+#include "common.h"
+
 static struct map_desc smdk2410_iodesc[] __initdata = {
   /* nothing here yet */
 };
@@ -116,6 +118,5 @@ MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switc
         .init_irq       = s3c24xx_init_irq,
         .init_machine   = smdk2410_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2410_restart,
 MACHINE_END
-
-
diff --git a/arch/arm/mach-s3c2410/mach-tct_hammer.c b/arch/arm/mach-s3c2410/mach-tct_hammer.c
index e0d0b6fb2800..1114666f0efb 100644
--- a/arch/arm/mach-s3c2410/mach-tct_hammer.c
+++ b/arch/arm/mach-s3c2410/mach-tct_hammer.c
@@ -54,6 +54,8 @@
 #include <linux/mtd/map.h>
 #include <linux/mtd/physmap.h>
 
+#include "common.h"
+
 static struct resource tct_hammer_nor_resource = {
                 .start = 0x00000000,
                 .end   = 0x01000000 - 1,
@@ -151,4 +153,5 @@ MACHINE_START(TCT_HAMMER, "TCT_HAMMER")
         .init_irq       = s3c24xx_init_irq,
         .init_machine   = tct_hammer_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index df47e8e90065..dbe668a803ef 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -53,6 +53,7 @@
 
 #include "usb-simtec.h"
 #include "nor-simtec.h"
+#include "common.h"
 
 /* macros for virtual address mods for the io space entries */
 #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
@@ -109,23 +110,6 @@ static struct map_desc vr1000_iodesc[] __initdata = {
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
 
-/* uart clock source(s) */
-
-static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
-        [0] = {
-                .name           = "uclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        },
-        [1] = {
-                .name           = "pclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0.
-        }
-};
-
 static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
         [0] = {
                 .hwport      = 0,
@@ -133,8 +117,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = vr1000_serial_clocks,
-                .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
         },
         [1] = {
                 .hwport      = 1,
@@ -142,8 +124,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = vr1000_serial_clocks,
-                .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
         },
         /* port 2 is not actually used */
         [2] = {
@@ -152,9 +132,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = vr1000_serial_clocks,
-                .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
-
         }
 };
 
@@ -405,4 +382,5 @@ MACHINE_START(VR1000, "Thorcom-VR1000")
         .init_machine   = vr1000_init,
         .init_irq       = s3c24xx_init_irq,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2410_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index 3d7ebc557a72..dad596332c5e 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -42,6 +42,7 @@
 #include <plat/clock.h>
 #include <plat/pll.h>
 #include <plat/pm.h>
+#include <plat/watchdog-reset.h>
 
 #include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
@@ -123,12 +124,18 @@ static struct clk s3c2410_armclk = {
         .id     = -1,
 };
 
+static struct clk_lookup s3c2410_clk_lookup[] = {
+        CLKDEV_INIT(NULL, "clk_uart_baud0", &clk_p),
+        CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
+};
+
 void __init s3c2410_init_clocks(int xtal)
 {
         s3c24xx_register_baseclocks(xtal);
         s3c2410_setup_clocks();
         s3c2410_baseclk_add();
         s3c24xx_register_clock(&s3c2410_armclk);
+        clkdev_add_table(s3c2410_clk_lookup, ARRAY_SIZE(s3c2410_clk_lookup));
 }
 
 struct sysdev_class s3c2410_sysclass = {
@@ -183,3 +190,15 @@ int __init s3c2410a_init(void)
         s3c2410_sysdev.cls = &s3c2410a_sysclass;
         return s3c2410_init();
 }
+
+void s3c2410_restart(char mode, const char *cmd)
+{
+        if (mode == 's') {
+                soft_restart(0);
+        }
+
+        arch_wdt_reset();
+
+        /* we'll take a jump through zero as a poor second */
+        soft_restart(0);
+}
diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c
index 140711db6c89..cd50291931f7 100644
--- a/arch/arm/mach-s3c2412/clock.c
+++ b/arch/arm/mach-s3c2412/clock.c
@@ -659,6 +659,12 @@ static struct clk *clks[] __initdata = {
         &clk_armclk,
 };
 
+static struct clk_lookup s3c2412_clk_lookup[] = {
+        CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
+        CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
+        CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_usysclk),
+};
+
 int __init s3c2412_baseclk_add(void)
 {
         unsigned long clkcon  = __raw_readl(S3C2410_CLKCON);
@@ -751,6 +757,7 @@ int __init s3c2412_baseclk_add(void)
                 s3c2412_clkcon_enable(clkp, 0);
         }
 
+        clkdev_add_table(s3c2412_clk_lookup, ARRAY_SIZE(s3c2412_clk_lookup));
         s3c_pwmclk_init();
         return 0;
 }
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c
index 286ef1738c61..ae73ba34ecc6 100644
--- a/arch/arm/mach-s3c2412/mach-jive.c
+++ b/arch/arm/mach-s3c2412/mach-jive.c
@@ -48,6 +48,7 @@
 #include <linux/mtd/nand_ecc.h>
 #include <linux/mtd/partitions.h>
 
+#include <plat/s3c2412.h>
 #include <plat/gpio-cfg.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
@@ -661,4 +662,5 @@ MACHINE_START(JIVE, "JIVE")
         .map_io         = jive_map_io,
         .init_machine   = jive_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2412_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c
index f1eec1b54932..b11451b853d8 100644
--- a/arch/arm/mach-s3c2412/mach-smdk2413.c
+++ b/arch/arm/mach-s3c2412/mach-smdk2413.c
@@ -134,6 +134,7 @@ MACHINE_START(S3C2413, "S3C2413")
         .map_io         = smdk2413_map_io,
         .init_machine   = smdk2413_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2412_restart,
 MACHINE_END
 
 MACHINE_START(SMDK2412, "SMDK2412")
@@ -145,6 +146,7 @@ MACHINE_START(SMDK2412, "SMDK2412")
         .map_io         = smdk2413_map_io,
         .init_machine   = smdk2413_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2412_restart,
 MACHINE_END
 
 MACHINE_START(SMDK2413, "SMDK2413")
@@ -156,4 +158,5 @@ MACHINE_START(SMDK2413, "SMDK2413")
         .map_io         = smdk2413_map_io,
         .init_machine   = smdk2413_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2412_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c
index 1bbb1ef5f4ff..94bfaa1fb148 100644
--- a/arch/arm/mach-s3c2412/mach-vstms.c
+++ b/arch/arm/mach-s3c2412/mach-vstms.c
@@ -162,4 +162,5 @@ MACHINE_START(VSTMS, "VSTMS")
         .init_machine   = vstms_init,
         .map_io         = vstms_map_io,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2412_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index 57a1e01e4e50..867ce2e269f6 100644
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -32,7 +32,6 @@
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
 
-#include <mach/reset.h>
 #include <mach/idle.h>
 
 #include <plat/cpu-freq.h>
@@ -131,8 +130,11 @@ static void s3c2412_idle(void)
         cpu_do_idle();
 }
 
-static void s3c2412_hard_reset(void)
+void s3c2412_restart(char mode, const char *cmd)
 {
+        if (mode == 's')
+                soft_restart(0);
+
         /* errata "Watch-dog/Software Reset Problem" specifies that
          * this reset must be done with the SYSCLK sourced from
          * EXTCLK instead of FOUT to avoid a glitch in the reset
@@ -164,10 +166,6 @@ void __init s3c2412_map_io(void)
 
         s3c24xx_idle = s3c2412_idle;
 
-        /* set custom reset hook */
-
-        s3c24xx_reset_hook = s3c2412_hard_reset;
-
         /* register our io-tables */
 
         iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc));
diff --git a/arch/arm/mach-s3c2416/Makefile b/arch/arm/mach-s3c2416/Makefile
index 7b805b279caf..ca0cd227f873 100644
--- a/arch/arm/mach-s3c2416/Makefile
+++ b/arch/arm/mach-s3c2416/Makefile
@@ -15,7 +15,6 @@ obj-$(CONFIG_S3C2416_PM)	+= pm.o
 #obj-$(CONFIG_S3C2416_DMA)      += dma.o
 
 # Device setup
-obj-$(CONFIG_S3C2416_SETUP_SDHCI) += setup-sdhci.o
 obj-$(CONFIG_S3C2416_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
 
 # Machine support
diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c
index afbbe8bc21d1..59f54d1d7f8b 100644
--- a/arch/arm/mach-s3c2416/clock.c
+++ b/arch/arm/mach-s3c2416/clock.c
@@ -90,39 +90,38 @@ static struct clksrc_clk hsmmc_div[] = {
         },
 };
 
-static struct clksrc_clk hsmmc_mux[] = {
-        [0] = {
-                .clk    = {
-                        .name   = "hsmmc-if",
-                        .devname        = "s3c-sdhci.0",
-                        .ctrlbit = (1 << 6),
-                        .enable = s3c2443_clkcon_enable_s,
-                },
-                .sources = &(struct clksrc_sources) {
-                        .nr_sources = 2,
-                        .sources = (struct clk *[]) {
-                                [0] = &hsmmc_div[0].clk,
-                                [1] = NULL, /* to fix */
-                        },
-                },
-                .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 16 },
+static struct clksrc_clk hsmmc_mux0 = {
+        .clk    = {
+                .name           = "hsmmc-if",
+                .devname        = "s3c-sdhci.0",
+                .ctrlbit        = (1 << 6),
+                .enable         = s3c2443_clkcon_enable_s,
         },
-        [1] = {
-                .clk    = {
-                        .name   = "hsmmc-if",
-                        .devname        = "s3c-sdhci.1",
-                        .ctrlbit = (1 << 12),
-                        .enable = s3c2443_clkcon_enable_s,
+        .sources        = &(struct clksrc_sources) {
+                .nr_sources     = 2,
+                .sources        = (struct clk * []) {
+                        [0]     = &hsmmc_div[0].clk,
+                        [1]     = NULL, /* to fix */
                 },
-                .sources = &(struct clksrc_sources) {
-                        .nr_sources = 2,
-                        .sources = (struct clk *[]) {
-                                [0] = &hsmmc_div[1].clk,
-                                [1] = NULL, /* to fix */
-                        },
+        },
+        .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 16 },
+};
+
+static struct clksrc_clk hsmmc_mux1 = {
+        .clk    = {
+                .name           = "hsmmc-if",
+                .devname        = "s3c-sdhci.1",
+                .ctrlbit        = (1 << 12),
+                .enable         = s3c2443_clkcon_enable_s,
+        },
+        .sources        = &(struct clksrc_sources) {
+                .nr_sources     = 2,
+                .sources        = (struct clk * []) {
+                        [0]     = &hsmmc_div[1].clk,
+                        [1]     = NULL, /* to fix */
                 },
-                .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 17 },
         },
+        .reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 17 },
 };
 
 static struct clk hsmmc0_clk = {
@@ -144,8 +143,14 @@ static struct clksrc_clk *clksrcs[] __initdata = {
         &hsspi_mux,
         &hsmmc_div[0],
         &hsmmc_div[1],
-        &hsmmc_mux[0],
-        &hsmmc_mux[1],
+        &hsmmc_mux0,
+        &hsmmc_mux1,
+};
+
+static struct clk_lookup s3c2416_clk_lookup[] = {
+        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &hsmmc0_clk),
+        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &hsmmc_mux0.clk),
+        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &hsmmc_mux1.clk),
 };
 
 void __init s3c2416_init_clocks(int xtal)
@@ -167,6 +172,7 @@ void __init s3c2416_init_clocks(int xtal)
                 s3c_register_clksrc(clksrcs[ptr], 1);
 
         s3c24xx_register_clock(&hsmmc0_clk);
+        clkdev_add_table(s3c2416_clk_lookup, ARRAY_SIZE(s3c2416_clk_lookup));
 
         s3c_pwmclk_init();
 
diff --git a/arch/arm/mach-s3c2416/mach-smdk2416.c b/arch/arm/mach-s3c2416/mach-smdk2416.c
index a9eee531ca76..66b71736609c 100644
--- a/arch/arm/mach-s3c2416/mach-smdk2416.c
+++ b/arch/arm/mach-s3c2416/mach-smdk2416.c
@@ -251,4 +251,5 @@ MACHINE_START(SMDK2416, "SMDK2416")
         .map_io         = smdk2416_map_io,
         .init_machine   = smdk2416_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2416_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c
index ee214bc83c83..46062232bbc7 100644
--- a/arch/arm/mach-s3c2416/s3c2416.c
+++ b/arch/arm/mach-s3c2416/s3c2416.c
@@ -44,7 +44,6 @@
 #include <asm/proc-fns.h>
 #include <asm/irq.h>
 
-#include <mach/reset.h>
 #include <mach/idle.h>
 #include <mach/regs-s3c2443-clock.h>
 
@@ -76,8 +75,11 @@ static struct sys_device s3c2416_sysdev = {
         .cls            = &s3c2416_sysclass,
 };
 
-static void s3c2416_hard_reset(void)
+void s3c2416_restart(char mode, const char *cmd)
 {
+        if (mode == 's')
+                soft_restart(0);
+
         __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST);
 }
 
@@ -85,7 +87,6 @@ int __init s3c2416_init(void)
 {
         printk(KERN_INFO "S3C2416: Initializing architecture\n");
 
-        s3c24xx_reset_hook = s3c2416_hard_reset;
         /* s3c24xx_idle = s3c2416_idle; */
 
         /* change WDT IRQ number */
diff --git a/arch/arm/mach-s3c2416/setup-sdhci.c b/arch/arm/mach-s3c2416/setup-sdhci.c
deleted file mode 100644
index cee53955eb02..000000000000
--- a/arch/arm/mach-s3c2416/setup-sdhci.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/* linux/arch/arm/mach-s3c2416/setup-sdhci.c
- *
- * Copyright 2010 Promwad Innovation Company
- *      Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
- *
- * S3C2416 - Helper functions for settign up SDHCI device(s) (HSMMC)
- *
- * Based on mach-s3c64xx/setup-sdhci.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/types.h>
-
-/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
-
-char *s3c2416_hsmmc_clksrcs[4] = {
-        [0] = "hsmmc",
-        [1] = "hsmmc",
-        [2] = "hsmmc-if",
-        /* [3] = "48m", - note not successfully used yet */
-};
diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c2440/clock.c
index f9e6bdaf41d2..c9879af42b08 100644
--- a/arch/arm/mach-s3c2440/clock.c
+++ b/arch/arm/mach-s3c2440/clock.c
@@ -34,6 +34,7 @@
 #include <linux/mutex.h>
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/serial_core.h>
 
 #include <mach/hardware.h>
 #include <linux/atomic.h>
@@ -43,6 +44,7 @@
 
 #include <plat/clock.h>
 #include <plat/cpu.h>
+#include <plat/regs-serial.h>
 
 /* S3C2440 extended clock support */
 
@@ -108,6 +110,46 @@ static struct clk s3c2440_clk_ac97 = {
         .ctrlbit        = S3C2440_CLKCON_CAMERA,
 };
 
+static unsigned long  s3c2440_fclk_n_getrate(struct clk *clk)
+{
+        unsigned long ucon0, ucon1, ucon2, divisor;
+
+        /* the fun of calculating the uart divisors on the s3c2440 */
+        ucon0 = __raw_readl(S3C24XX_VA_UART0 + S3C2410_UCON);
+        ucon1 = __raw_readl(S3C24XX_VA_UART1 + S3C2410_UCON);
+        ucon2 = __raw_readl(S3C24XX_VA_UART2 + S3C2410_UCON);
+
+        ucon0 &= S3C2440_UCON0_DIVMASK;
+        ucon1 &= S3C2440_UCON1_DIVMASK;
+        ucon2 &= S3C2440_UCON2_DIVMASK;
+
+        if (ucon0 != 0)
+                divisor = (ucon0 >> S3C2440_UCON_DIVSHIFT) + 6;
+        else if (ucon1 != 0)
+                divisor = (ucon1 >> S3C2440_UCON_DIVSHIFT) + 21;
+        else if (ucon2 != 0)
+                divisor = (ucon2 >> S3C2440_UCON_DIVSHIFT) + 36;
+        else
+                /* manual calims 44, seems to be 9 */
+                divisor = 9;
+
+        return clk_get_rate(clk->parent) / divisor;
+}
+
+static struct clk s3c2440_clk_fclk_n = {
+        .name           = "fclk_n",
+        .parent         = &clk_f,
+        .ops            = &(struct clk_ops) {
+                .get_rate       = s3c2440_fclk_n_getrate,
+        },
+};
+
+static struct clk_lookup s3c2440_clk_lookup[] = {
+        CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
+        CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
+        CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n),
+};
+
 static int s3c2440_clk_add(struct sys_device *sysdev)
 {
         struct clk *clock_upll;
@@ -126,10 +168,12 @@ static int s3c2440_clk_add(struct sys_device *sysdev)
         s3c2440_clk_cam.parent = clock_h;
         s3c2440_clk_ac97.parent = clock_p;
         s3c2440_clk_cam_upll.parent = clock_upll;
+        s3c24xx_register_clock(&s3c2440_clk_fclk_n);
 
         s3c24xx_register_clock(&s3c2440_clk_ac97);
         s3c24xx_register_clock(&s3c2440_clk_cam);
         s3c24xx_register_clock(&s3c2440_clk_cam_upll);
+        clkdev_add_table(s3c2440_clk_lookup, ARRAY_SIZE(s3c2440_clk_lookup));
 
         clk_disable(&s3c2440_clk_ac97);
         clk_disable(&s3c2440_clk_cam);
diff --git a/arch/arm/mach-s3c2440/common.h b/arch/arm/mach-s3c2440/common.h
new file mode 100644
index 000000000000..db8a98ac68c5
--- /dev/null
+++ b/arch/arm/mach-s3c2440/common.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Common Header for S3C2440 machines
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H
+#define __ARCH_ARM_MACH_S3C2440_COMMON_H
+
+void s3c2440_restart(char mode, const char *cmd);
+
+#endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index 74f92fc3fd04..24569550de1a 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -55,6 +55,8 @@
 #include <plat/cpu.h>
 #include <plat/audio-simtec.h>
 
+#include "common.h"
+
 #define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics"
 
 static struct map_desc anubis_iodesc[] __initdata = {
@@ -96,22 +98,6 @@ static struct map_desc anubis_iodesc[] __initdata = {
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
 
-static struct s3c24xx_uart_clksrc anubis_serial_clocks[] = {
-        [0] = {
-                .name           = "uclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        },
-        [1] = {
-                .name           = "pclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        }
-};
-
-
 static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
         [0] = {
                 .hwport      = 0,
@@ -119,8 +105,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = anubis_serial_clocks,
-                .clocks_size = ARRAY_SIZE(anubis_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
         },
         [1] = {
                 .hwport      = 2,
@@ -128,8 +113,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = anubis_serial_clocks,
-                .clocks_size = ARRAY_SIZE(anubis_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
         },
 };
 
@@ -503,4 +487,5 @@ MACHINE_START(ANUBIS, "Simtec-Anubis")
         .init_machine   = anubis_init,
         .init_irq       = s3c24xx_init_irq,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2440_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c
index 38887ee0c784..d6a9763110cd 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -49,6 +49,8 @@
 #include <plat/cpu.h>
 #include <plat/mci.h>
 
+#include "common.h"
+
 static struct map_desc at2440evb_iodesc[] __initdata = {
         /* Nothing here */
 };
@@ -57,22 +59,6 @@ static struct map_desc at2440evb_iodesc[] __initdata = {
 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
 
-static struct s3c24xx_uart_clksrc at2440evb_serial_clocks[] = {
-        [0] = {
-                .name           = "uclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        },
-        [1] = {
-                .name           = "pclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        }
-};
-
-
 static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
         [0] = {
                 .hwport      = 0,
@@ -80,8 +66,7 @@ static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = at2440evb_serial_clocks,
-                .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
         },
         [1] = {
                 .hwport      = 1,
@@ -89,8 +74,7 @@ static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = at2440evb_serial_clocks,
-                .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
         },
 };
 
@@ -238,4 +222,5 @@ MACHINE_START(AT2440EVB, "AT2440EVB")
         .init_machine   = at2440evb_init,
         .init_irq       = s3c24xx_init_irq,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2440_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c
index de1e0ff46cec..5859e609d28c 100644
--- a/arch/arm/mach-s3c2440/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -90,6 +90,7 @@
 #include <plat/iic.h>
 #include <plat/ts.h>
 
+#include "common.h"
 
 static struct pcf50633 *gta02_pcf;
 
@@ -600,4 +601,5 @@ MACHINE_START(NEO1973_GTA02, "GTA02")
         .init_irq       = s3c24xx_init_irq,
         .init_machine   = gta02_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2440_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index 937eb7818c1a..adbbb85bc4cd 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -60,6 +60,8 @@
 
 #include <sound/s3c24xx_uda134x.h>
 
+#include "common.h"
+
 #define MACH_MINI2440_DM9K_BASE (S3C2410_CS4 + 0x300)
 
 static struct map_desc mini2440_iodesc[] __initdata = {
@@ -699,4 +701,5 @@ MACHINE_START(MINI2440, "MINI2440")
         .init_machine   = mini2440_init,
         .init_irq       = s3c24xx_init_irq,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2440_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c
index 61c0bf148165..40eaf844bc1f 100644
--- a/arch/arm/mach-s3c2440/mach-nexcoder.c
+++ b/arch/arm/mach-s3c2440/mach-nexcoder.c
@@ -47,6 +47,8 @@
 #include <plat/devs.h>
 #include <plat/cpu.h>
 
+#include "common.h"
+
 static struct map_desc nexcoder_iodesc[] __initdata = {
         /* nothing here yet */
 };
@@ -156,4 +158,5 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440")
         .init_machine   = nexcoder_init,
         .init_irq       = s3c24xx_init_irq,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2440_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index dc142ebf8cba..4c480ef734f6 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -54,6 +54,8 @@
 #include <plat/devs.h>
 #include <plat/cpu.h>
 
+#include "common.h"
+
 /* onboard perihperal map */
 
 static struct map_desc osiris_iodesc[] __initdata = {
@@ -100,21 +102,6 @@ static struct map_desc osiris_iodesc[] __initdata = {
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
 
-static struct s3c24xx_uart_clksrc osiris_serial_clocks[] = {
-        [0] = {
-                .name           = "uclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        },
-        [1] = {
-                .name           = "pclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        }
-};
-
 static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
         [0] = {
                 .hwport      = 0,
@@ -122,8 +109,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = osiris_serial_clocks,
-                .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
         },
         [1] = {
                 .hwport      = 1,
@@ -131,8 +117,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = osiris_serial_clocks,
-                .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
         },
         [2] = {
                 .hwport      = 2,
@@ -140,8 +125,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
                 .ucon        = UCON,
                 .ulcon       = ULCON,
                 .ufcon       = UFCON,
-                .clocks      = osiris_serial_clocks,
-                .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
         }
 };
 
@@ -452,4 +436,5 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS")
         .init_irq       = s3c24xx_init_irq,
         .init_machine   = osiris_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2440_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c
index 0d3453bf567c..f892e8befca8 100644
--- a/arch/arm/mach-s3c2440/mach-rx1950.c
+++ b/arch/arm/mach-s3c2440/mach-rx1950.c
@@ -62,21 +62,14 @@
 
 #include <sound/uda1380.h>
 
+#include "common.h"
+
 #define LCD_PWM_PERIOD 192960
 #define LCD_PWM_DUTY 127353
 
 static struct map_desc rx1950_iodesc[] __initdata = {
 };
 
-static struct s3c24xx_uart_clksrc rx1950_serial_clocks[] = {
-        [0] = {
-               .name = "fclk",
-               .divisor = 0x0a,
-               .min_baud = 0,
-               .max_baud = 0,
-        },
-};
-
 static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
         [0] = {
                .hwport = 0,
@@ -84,8 +77,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
                .ucon = 0x3c5,
                .ulcon = 0x03,
                .ufcon = 0x51,
-               .clocks = rx1950_serial_clocks,
-               .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
+                .clk_sel = S3C2410_UCON_CLKSEL3,
         },
         [1] = {
                .hwport = 1,
@@ -93,8 +85,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
                .ucon = 0x3c5,
                .ulcon = 0x03,
                .ufcon = 0x51,
-               .clocks = rx1950_serial_clocks,
-               .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
+                .clk_sel = S3C2410_UCON_CLKSEL3,
         },
         /* IR port */
         [2] = {
@@ -103,8 +94,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
                .ucon = 0x3c5,
                .ulcon = 0x43,
                .ufcon = 0xf1,
-               .clocks = rx1950_serial_clocks,
-               .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
+                .clk_sel = S3C2410_UCON_CLKSEL3,
         },
 };
 
@@ -832,4 +822,5 @@ MACHINE_START(RX1950, "HP iPAQ RX1950")
         .init_irq = s3c24xx_init_irq,
         .init_machine = rx1950_init_machine,
         .timer = &s3c24xx_timer,
+        .restart        = s3c2440_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index e19499c2f909..88d648a874d4 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -51,6 +51,8 @@
 #include <plat/cpu.h>
 #include <plat/pm.h>
 
+#include "common.h"
+
 static struct map_desc rx3715_iodesc[] __initdata = {
         /* dump ISA space somewhere unused */
 
@@ -67,16 +69,6 @@ static struct map_desc rx3715_iodesc[] __initdata = {
         },
 };
 
-
-static struct s3c24xx_uart_clksrc rx3715_serial_clocks[] = {
-        [0] = {
-                .name           = "fclk",
-                .divisor        = 0,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        }
-};
-
 static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
         [0] = {
                 .hwport      = 0,
@@ -84,8 +76,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
                 .ucon        = 0x3c5,
                 .ulcon       = 0x03,
                 .ufcon       = 0x51,
-                .clocks      = rx3715_serial_clocks,
-                .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL3,
         },
         [1] = {
                 .hwport      = 1,
@@ -93,8 +84,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
                 .ucon        = 0x3c5,
                 .ulcon       = 0x03,
                 .ufcon       = 0x00,
-                .clocks      = rx3715_serial_clocks,
-                .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL3,
         },
         /* IR port */
         [2] = {
@@ -103,8 +93,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
                 .ucon        = 0x3c5,
                 .ulcon       = 0x43,
                 .ufcon       = 0x51,
-                .clocks      = rx3715_serial_clocks,
-                .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
+                .clk_sel        = S3C2410_UCON_CLKSEL3,
         }
 };
 
@@ -224,4 +213,5 @@ MACHINE_START(RX3715, "IPAQ-RX3715")
         .init_irq       = rx3715_init_irq,
         .init_machine   = rx3715_init_machine,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2440_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c
index 36eeb4197a84..1deb60d12a60 100644
--- a/arch/arm/mach-s3c2440/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2440/mach-smdk2440.c
@@ -47,6 +47,8 @@
 
 #include <plat/common-smdk.h>
 
+#include "common.h"
+
 static struct map_desc smdk2440_iodesc[] __initdata = {
         /* ISA IO Space map (memory space selected by A24) */
 
@@ -181,4 +183,5 @@ MACHINE_START(S3C2440, "SMDK2440")
         .map_io         = smdk2440_map_io,
         .init_machine   = smdk2440_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2440_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index 37f8cc6aabd4..42d73f1e0cef 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -35,6 +35,7 @@
 #include <plat/cpu.h>
 #include <plat/s3c244x.h>
 #include <plat/pm.h>
+#include <plat/watchdog-reset.h>
 
 #include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
@@ -73,3 +74,15 @@ void __init s3c2440_map_io(void)
         s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
         s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
 }
+
+void s3c2440_restart(char mode, const char *cmd)
+{
+        if (mode == 's') {
+                soft_restart(0);
+        }
+
+        arch_wdt_reset();
+
+        /* we'll take a jump through zero as a poor second */
+        soft_restart(0);
+}
diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c
index bec107e00441..209236956222 100644
--- a/arch/arm/mach-s3c2443/mach-smdk2443.c
+++ b/arch/arm/mach-s3c2443/mach-smdk2443.c
@@ -145,4 +145,5 @@ MACHINE_START(SMDK2443, "SMDK2443")
         .map_io         = smdk2443_map_io,
         .init_machine   = smdk2443_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c2443_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c
index a22b771b0f36..4568ded338d0 100644
--- a/arch/arm/mach-s3c2443/s3c2443.c
+++ b/arch/arm/mach-s3c2443/s3c2443.c
@@ -31,7 +31,6 @@
 #include <asm/irq.h>
 
 #include <mach/regs-s3c2443-clock.h>
-#include <mach/reset.h>
 
 #include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
@@ -57,8 +56,11 @@ static struct sys_device s3c2443_sysdev = {
         .cls            = &s3c2443_sysclass,
 };
 
-static void s3c2443_hard_reset(void)
+void s3c2443_restart(char mode, const char *cmd)
 {
+        if (mode == 's')
+                soft_restart(0);
+
         __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST);
 }
 
@@ -66,8 +68,6 @@ int __init s3c2443_init(void)
 {
         printk("S3C2443: Initialising architecture\n");
 
-        s3c24xx_reset_hook = s3c2443_hard_reset;
-
         s3c_nand_setname("s3c2412-nand");
         s3c_fb_setname("s3c2443-fb");
 
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 4d8c489edc04..e9dae9105df6 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -77,6 +77,11 @@ config S3C64XX_SETUP_SDHCI_GPIO
         help
           Common setup code for S3C64XX SDHCI GPIO configurations
 
+config S3C64XX_SETUP_SPI
+        bool
+        help
+         Common setup code for SPI GPIO configurations
+
 # S36400 Macchine support
 
 config MACH_SMDK6400
@@ -276,6 +281,7 @@ config MACH_WLF_CRAGG_6410
         select S3C64XX_SETUP_IDE
         select S3C64XX_SETUP_FB_24BPP
         select S3C64XX_SETUP_KEYPAD
+        select S3C64XX_SETUP_SPI
         select SAMSUNG_DEV_ADC
         select SAMSUNG_DEV_KEYPAD
         select S3C_DEV_USB_HOST
@@ -286,7 +292,7 @@ config MACH_WLF_CRAGG_6410
         select S3C_DEV_I2C1
         select S3C_DEV_WDT
         select S3C_DEV_RTC
-        select S3C64XX_DEV_SPI
+        select S3C64XX_DEV_SPI0
         select SAMSUNG_GPIO_EXTRA128
         select I2C
         help
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index cfc0b9941808..1822ac2eba31 100644
--- a/arch/arm/mach-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -10,54 +10,49 @@ obj-m				:=
 obj-n                           :=
 obj-                            :=
 
-# Core files
-obj-y                           += cpu.o
-obj-y                           += clock.o
+# Core
 
-# Core support for S3C6400 system
+obj-y                           += common.o clock.o
+
+# Core support
 
 obj-$(CONFIG_CPU_S3C6400)       += s3c6400.o
 obj-$(CONFIG_CPU_S3C6410)       += s3c6410.o
 
-obj-y                           += irq.o
-obj-y                           += irq-eint.o
+# PM
+
+obj-$(CONFIG_PM)                += pm.o irq-pm.o sleep.o
 
 # DMA support
 
 obj-$(CONFIG_S3C64XX_DMA)       += dma.o
 
-# Device setup
+# Device support
 
-obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o
-obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o
-obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o
-obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o
-obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o
-obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
-obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
+obj-y                           += dev-uart.o
+obj-y                           += dev-audio.o
+obj-$(CONFIG_S3C64XX_DEV_SPI)   += dev-spi.o
 
-# PM
+# Device setup
 
-obj-$(CONFIG_PM)                += pm.o
-obj-$(CONFIG_PM)                += sleep.o
-obj-$(CONFIG_PM)                += irq-pm.o
+obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP)    += setup-fb-24bpp.o
+obj-$(CONFIG_S3C64XX_SETUP_I2C0)        += setup-i2c0.o
+obj-$(CONFIG_S3C64XX_SETUP_I2C1)        += setup-i2c1.o
+obj-$(CONFIG_S3C64XX_SETUP_IDE)         += setup-ide.o
+obj-$(CONFIG_S3C64XX_SETUP_KEYPAD)      += setup-keypad.o
+obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO)  += setup-sdhci-gpio.o
+obj-$(CONFIG_S3C64XX_SETUP_SPI)         += setup-spi.o
 
 # Machine support
 
-obj-$(CONFIG_MACH_ANW6410)      += mach-anw6410.o
-obj-$(CONFIG_MACH_SMDK6400)     += mach-smdk6400.o
-obj-$(CONFIG_MACH_SMDK6410)     += mach-smdk6410.o
-obj-$(CONFIG_MACH_REAL6410)     += mach-real6410.o
-obj-$(CONFIG_MACH_MINI6410)     += mach-mini6410.o
-obj-$(CONFIG_MACH_NCP)          += mach-ncp.o
-obj-$(CONFIG_MACH_HMT)          += mach-hmt.o
-obj-$(CONFIG_MACH_SMARTQ)       += mach-smartq.o
-obj-$(CONFIG_MACH_SMARTQ5)      += mach-smartq5.o
-obj-$(CONFIG_MACH_SMARTQ7)      += mach-smartq7.o
-obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o mach-crag6410-module.o
-
-# device support
-
-obj-y                           += dev-uart.o
-obj-y                           += dev-audio.o
-obj-$(CONFIG_S3C64XX_DEV_SPI)   += dev-spi.o
+obj-$(CONFIG_MACH_ANW6410)              += mach-anw6410.o
+obj-$(CONFIG_MACH_HMT)                  += mach-hmt.o
+obj-$(CONFIG_MACH_MINI6410)             += mach-mini6410.o
+obj-$(CONFIG_MACH_NCP)                  += mach-ncp.o
+obj-$(CONFIG_MACH_REAL6410)             += mach-real6410.o
+obj-$(CONFIG_MACH_SMARTQ)               += mach-smartq.o
+obj-$(CONFIG_MACH_SMARTQ5)              += mach-smartq5.o
+obj-$(CONFIG_MACH_SMARTQ7)              += mach-smartq7.o
+obj-$(CONFIG_MACH_SMDK6400)             += mach-smdk6400.o
+obj-$(CONFIG_MACH_SMDK6410)             += mach-smdk6410.o
+obj-$(CONFIG_MACH_WLF_CRAGG_6410)       += mach-crag6410.o mach-crag6410-module.o
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 39c238d7a3dc..31bb27dc4aeb 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -184,18 +184,6 @@ static struct clk init_clocks_off[] = {
                 .enable         = s3c64xx_pclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_PCLK_SPI1,
         }, {
-                .name           = "spi_48m",
-                .devname        = "s3c64xx-spi.0",
-                .parent         = &clk_48m,
-                .enable         = s3c64xx_sclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_SCLK_SPI0_48,
-        }, {
-                .name           = "spi_48m",
-                .devname        = "s3c64xx-spi.1",
-                .parent         = &clk_48m,
-                .enable         = s3c64xx_sclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_SCLK_SPI1_48,
-        }, {
                 .name           = "48m",
                 .devname        = "s3c-sdhci.0",
                 .parent         = &clk_48m,
@@ -226,6 +214,22 @@ static struct clk init_clocks_off[] = {
         },
 };
 
+static struct clk clk_48m_spi0 = {
+        .name           = "spi_48m",
+        .devname        = "s3c64xx-spi.0",
+        .parent         = &clk_48m,
+        .enable         = s3c64xx_sclk_ctrl,
+        .ctrlbit        = S3C_CLKCON_SCLK_SPI0_48,
+};
+
+static struct clk clk_48m_spi1 = {
+        .name           = "spi_48m",
+        .devname        = "s3c64xx-spi.1",
+        .parent         = &clk_48m,
+        .enable         = s3c64xx_sclk_ctrl,
+        .ctrlbit        = S3C_CLKCON_SCLK_SPI1_48,
+};
+
 static struct clk init_clocks[] = {
         {
                 .name           = "lcd",
@@ -243,24 +247,6 @@ static struct clk init_clocks[] = {
                 .enable         = s3c64xx_hclk_ctrl,
                 .ctrlbit        = S3C_CLKCON_HCLK_UHOST,
         }, {
-                .name           = "hsmmc",
-                .devname        = "s3c-sdhci.0",
-                .parent         = &clk_h,
-                .enable         = s3c64xx_hclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_HCLK_HSMMC0,
-        }, {
-                .name           = "hsmmc",
-                .devname        = "s3c-sdhci.1",
-                .parent         = &clk_h,
-                .enable         = s3c64xx_hclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_HCLK_HSMMC1,
-        }, {
-                .name           = "hsmmc",
-                .devname        = "s3c-sdhci.2",
-                .parent         = &clk_h,
-                .enable         = s3c64xx_hclk_ctrl,
-                .ctrlbit        = S3C_CLKCON_HCLK_HSMMC2,
-        }, {
                 .name           = "otg",
                 .parent         = &clk_h,
                 .enable         = s3c64xx_hclk_ctrl,
@@ -310,6 +296,29 @@ static struct clk init_clocks[] = {
         }
 };
 
+static struct clk clk_hsmmc0 = {
+        .name           = "hsmmc",
+        .devname        = "s3c-sdhci.0",
+        .parent         = &clk_h,
+        .enable         = s3c64xx_hclk_ctrl,
+        .ctrlbit        = S3C_CLKCON_HCLK_HSMMC0,
+};
+
+static struct clk clk_hsmmc1 = {
+        .name           = "hsmmc",
+        .devname        = "s3c-sdhci.1",
+        .parent         = &clk_h,
+        .enable         = s3c64xx_hclk_ctrl,
+        .ctrlbit        = S3C_CLKCON_HCLK_HSMMC1,
+};
+
+static struct clk clk_hsmmc2 = {
+        .name           = "hsmmc",
+        .devname        = "s3c-sdhci.2",
+        .parent         = &clk_h,
+        .enable         = s3c64xx_hclk_ctrl,
+        .ctrlbit        = S3C_CLKCON_HCLK_HSMMC2,
+};
 
 static struct clk clk_fout_apll = {
         .name           = "fout_apll",
@@ -578,36 +587,6 @@ static struct clksrc_sources clkset_camif = {
 static struct clksrc_clk clksrcs[] = {
         {
                 .clk    = {
-                        .name           = "mmc_bus",
-                        .devname        = "s3c-sdhci.0",
-                        .ctrlbit        = S3C_CLKCON_SCLK_MMC0,
-                        .enable         = s3c64xx_sclk_ctrl,
-                },
-                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 18, .size = 2  },
-                .reg_div        = { .reg = S3C_CLK_DIV1, .shift = 0, .size = 4  },
-                .sources        = &clkset_spi_mmc,
-        }, {
-                .clk    = {
-                        .name           = "mmc_bus",
-                        .devname        = "s3c-sdhci.1",
-                        .ctrlbit        = S3C_CLKCON_SCLK_MMC1,
-                        .enable         = s3c64xx_sclk_ctrl,
-                },
-                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 20, .size = 2  },
-                .reg_div        = { .reg = S3C_CLK_DIV1, .shift = 4, .size = 4  },
-                .sources        = &clkset_spi_mmc,
-        }, {
-                .clk    = {
-                        .name           = "mmc_bus",
-                        .devname        = "s3c-sdhci.2",
-                        .ctrlbit        = S3C_CLKCON_SCLK_MMC2,
-                        .enable         = s3c64xx_sclk_ctrl,
-                },
-                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 22, .size = 2  },
-                .reg_div        = { .reg = S3C_CLK_DIV1, .shift = 8, .size = 4  },
-                .sources        = &clkset_spi_mmc,
-        }, {
-                .clk    = {
                         .name           = "usb-bus-host",
                         .ctrlbit        = S3C_CLKCON_SCLK_UHOST,
                         .enable         = s3c64xx_sclk_ctrl,
@@ -617,35 +596,6 @@ static struct clksrc_clk clksrcs[] = {
                 .sources        = &clkset_uhost,
         }, {
                 .clk    = {
-                        .name           = "uclk1",
-                        .ctrlbit        = S3C_CLKCON_SCLK_UART,
-                        .enable         = s3c64xx_sclk_ctrl,
-                },
-                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 13, .size = 1  },
-                .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 16, .size = 4  },
-                .sources        = &clkset_uart,
-        }, {
-/* Where does UCLK0 come from? */
-                .clk    = {
-                        .name           = "spi-bus",
-                        .devname        = "s3c64xx-spi.0",
-                        .ctrlbit        = S3C_CLKCON_SCLK_SPI0,
-                        .enable         = s3c64xx_sclk_ctrl,
-                },
-                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 14, .size = 2  },
-                .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 0, .size = 4  },
-                .sources        = &clkset_spi_mmc,
-        }, {
-                .clk    = {
-                        .name           = "spi-bus",
-                        .devname        = "s3c64xx-spi.1",
-                        .enable         = s3c64xx_sclk_ctrl,
-                },
-                .reg_src        = { .reg = S3C_CLK_SRC, .shift = 16, .size = 2  },
-                .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 4, .size = 4  },
-                .sources        = &clkset_spi_mmc,
-        }, {
-                .clk    = {
                         .name           = "audio-bus",
                         .devname        = "samsung-i2s.0",
                         .ctrlbit        = S3C_CLKCON_SCLK_AUDIO0,
@@ -695,6 +645,78 @@ static struct clksrc_clk clksrcs[] = {
         },
 };
 
+/* Where does UCLK0 come from? */
+static struct clksrc_clk clk_sclk_uclk = {
+        .clk    = {
+                .name           = "uclk1",
+                .ctrlbit        = S3C_CLKCON_SCLK_UART,
+                .enable         = s3c64xx_sclk_ctrl,
+        },
+        .reg_src        = { .reg = S3C_CLK_SRC, .shift = 13, .size = 1  },
+        .reg_div        = { .reg = S3C_CLK_DIV2, .shift = 16, .size = 4  },
+        .sources        = &clkset_uart,
+};
+
+static struct clksrc_clk clk_sclk_mmc0 = {
+        .clk    = {
+                .name           = "mmc_bus",
+                .devname        = "s3c-sdhci.0",
+                .ctrlbit        = S3C_CLKCON_SCLK_MMC0,
+                .enable         = s3c64xx_sclk_ctrl,
+        },
+        .reg_src        = { .reg = S3C_CLK_SRC, .shift = 18, .size = 2  },
+        .reg_div        = { .reg = S3C_CLK_DIV1, .shift = 0, .size = 4  },
+        .sources        = &clkset_spi_mmc,
+};
+
+static struct clksrc_clk clk_sclk_mmc1 = {
+        .clk    = {
+                .name           = "mmc_bus",
+                .devname        = "s3c-sdhci.1",
+                .ctrlbit        = S3C_CLKCON_SCLK_MMC1,
+                .enable         = s3c64xx_sclk_ctrl,
+        },
+        .reg_src        = { .reg = S3C_CLK_SRC, .shift = 20, .size = 2  },
+        .reg_div        = { .reg = S3C_CLK_DIV1, .shift = 4, .size = 4  },
+        .sources        = &clkset_spi_mmc,
+};
+
+static struct clksrc_clk clk_sclk_mmc2 = {
+        .clk    = {
+                .name           = "mmc_bus",
+                .devname        = "s3c-sdhci.2",
+                .ctrlbit        = S3C_CLKCON_SCLK_MMC2,
+                .enable         = s3c64xx_sclk_ctrl,
+        },
+        .reg_src        = { .reg = S3C_CLK_SRC, .shift = 22, .size = 2  },
+        .reg_div        = { .reg = S3C_CLK_DIV1, .shift = 8, .size = 4  },
+        .sources        = &clkset_spi_mmc,
+};
+
+static struct clksrc_clk clk_sclk_spi0 = {
+        .clk    = {
+                .name           = "spi-bus",
+                .devname        = "s3c64xx-spi.0",
+                .ctrlbit        = S3C_CLKCON_SCLK_SPI0,
+                .enable         = s3c64xx_sclk_ctrl,
+        },
+        .reg_src = { .reg = S3C_CLK_SRC, .shift = 14, .size = 2 },
+        .reg_div = { .reg = S3C_CLK_DIV2, .shift = 0, .size = 4 },
+        .sources = &clkset_spi_mmc,
+};
+
+static struct clksrc_clk clk_sclk_spi1 = {
+        .clk    = {
+                .name           = "spi-bus",
+                .devname        = "s3c64xx-spi.1",
+                .ctrlbit        = S3C_CLKCON_SCLK_SPI1,
+                .enable         = s3c64xx_sclk_ctrl,
+        },
+        .reg_src = { .reg = S3C_CLK_SRC, .shift = 16, .size = 2 },
+        .reg_div = { .reg = S3C_CLK_DIV2, .shift = 4, .size = 4 },
+        .sources = &clkset_spi_mmc,
+};
+
 /* Clock initialisation code */
 
 static struct clksrc_clk *init_parents[] = {
@@ -703,9 +725,42 @@ static struct clksrc_clk *init_parents[] = {
         &clk_mout_mpll,
 };
 
+static struct clksrc_clk *clksrc_cdev[] = {
+        &clk_sclk_uclk,
+        &clk_sclk_mmc0,
+        &clk_sclk_mmc1,
+        &clk_sclk_mmc2,
+        &clk_sclk_spi0,
+        &clk_sclk_spi1,
+};
+
+static struct clk *clk_cdev[] = {
+        &clk_hsmmc0,
+        &clk_hsmmc1,
+        &clk_hsmmc2,
+        &clk_48m_spi0,
+        &clk_48m_spi1,
+};
+
+static struct clk_lookup s3c64xx_clk_lookup[] = {
+        CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
+        CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uclk.clk),
+        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &clk_hsmmc0),
+        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &clk_hsmmc1),
+        CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.0", &clk_hsmmc2),
+        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
+        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
+        CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
+        CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
+        CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
+        CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk2", &clk_48m_spi0),
+        CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
+        CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk2", &clk_48m_spi1),
+};
+
 #define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
 
-void __init_or_cpufreq s3c6400_setup_clocks(void)
+void __init_or_cpufreq s3c64xx_setup_clocks(void)
 {
         struct clk *xtal_clk;
         unsigned long xtal;
@@ -804,13 +859,15 @@ static struct clk *clks[] __initdata = {
  * as ARMCLK as well as the necessary parent clocks.
  *
  * This call does not setup the clocks, which is left to the
- * s3c6400_setup_clocks() call which may be needed by the cpufreq
+ * s3c64xx_setup_clocks() call which may be needed by the cpufreq
  * or resume code to re-set the clocks if the bootloader has changed
  * them.
  */
 void __init s3c64xx_register_clocks(unsigned long xtal, 
                                     unsigned armclk_divlimit)
 {
+        unsigned int cnt;
+
         armclk_mask = armclk_divlimit;
 
         s3c24xx_register_baseclocks(xtal);
@@ -821,7 +878,15 @@ void __init s3c64xx_register_clocks(unsigned long xtal,
         s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
         s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
 
+        s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
+        for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++)
+                s3c_disable_clocks(clk_cdev[cnt], 1);
+
         s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1));
         s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
+        for (cnt = 0; cnt < ARRAY_SIZE(clksrc_cdev); cnt++)
+                s3c_register_clksrc(clksrc_cdev[cnt], 1);
+        clkdev_add_table(s3c64xx_clk_lookup, ARRAY_SIZE(s3c64xx_clk_lookup));
+
         s3c_pwmclk_init();
 }
diff --git a/arch/arm/mach-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/common.c
index 4d203be1f4c3..35182ba049da 100644
--- a/arch/arm/mach-s3c64xx/irq-eint.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -1,11 +1,13 @@
-/* arch/arm/plat-s3c64xx/irq-eint.c
+/*
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
  *
  * Copyright 2008 Openmoko, Inc.
  * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
  *
- * S3C64XX - Interrupt handling for IRQ_EINT(x)
+ * Common Codes for S3C64XX machines
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -13,21 +15,183 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
 #include <linux/interrupt.h>
+#include <linux/ioport.h>
 #include <linux/sysdev.h>
-#include <linux/gpio.h>
-#include <linux/irq.h>
+#include <linux/serial_core.h>
+#include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/dma-mapping.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
 
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
 #include <asm/hardware/vic.h>
 
-#include <plat/regs-irqtype.h>
+#include <mach/map.h>
+#include <mach/hardware.h>
 #include <mach/regs-gpio.h>
-#include <plat/gpio-cfg.h>
 
-#include <mach/map.h>
 #include <plat/cpu.h>
+#include <plat/clock.h>
+#include <plat/devs.h>
 #include <plat/pm.h>
+#include <plat/gpio-cfg.h>
+#include <plat/irq-uart.h>
+#include <plat/irq-vic-timer.h>
+#include <plat/regs-irqtype.h>
+#include <plat/regs-serial.h>
+#include <plat/watchdog-reset.h>
+
+#include "common.h"
+
+/* uart registration process */
+
+void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
+}
+
+/* table of supported CPUs */
+
+static const char name_s3c6400[] = "S3C6400";
+static const char name_s3c6410[] = "S3C6410";
+
+static struct cpu_table cpu_ids[] __initdata = {
+        {
+                .idcode         = S3C6400_CPU_ID,
+                .idmask         = S3C64XX_CPU_MASK,
+                .map_io         = s3c6400_map_io,
+                .init_clocks    = s3c6400_init_clocks,
+                .init_uarts     = s3c64xx_init_uarts,
+                .init           = s3c6400_init,
+                .name           = name_s3c6400,
+        }, {
+                .idcode         = S3C6410_CPU_ID,
+                .idmask         = S3C64XX_CPU_MASK,
+                .map_io         = s3c6410_map_io,
+                .init_clocks    = s3c6410_init_clocks,
+                .init_uarts     = s3c64xx_init_uarts,
+                .init           = s3c6410_init,
+                .name           = name_s3c6410,
+        },
+};
+
+/* minimal IO mapping */
+
+/* see notes on uart map in arch/arm/mach-s3c64xx/include/mach/debug-macro.S */
+#define UART_OFFS (S3C_PA_UART & 0xfffff)
+
+static struct map_desc s3c_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S3C_VA_SYS,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_SYSCON),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_MEM,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_SROM),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)(S3C_VA_UART + UART_OFFS),
+                .pfn            = __phys_to_pfn(S3C_PA_UART),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)VA_VIC0,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_VIC0),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)VA_VIC1,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_VIC1),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_TIMER,
+                .pfn            = __phys_to_pfn(S3C_PA_TIMER),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C64XX_VA_GPIO,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_GPIO),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C64XX_VA_MODEM,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_MODEM),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_WATCHDOG,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_WATCHDOG),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_USB_HSPHY,
+                .pfn            = __phys_to_pfn(S3C64XX_PA_USB_HSPHY),
+                .length         = SZ_1K,
+                .type           = MT_DEVICE,
+        },
+};
+
+struct sysdev_class s3c64xx_sysclass = {
+        .name   = "s3c64xx-core",
+};
+
+static struct sys_device s3c64xx_sysdev = {
+        .cls    = &s3c64xx_sysclass,
+};
+
+/* read cpu identification code */
+
+void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
+{
+        /* initialise the io descriptors we need for initialisation */
+        iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
+        iotable_init(mach_desc, size);
+        init_consistent_dma_size(SZ_8M);
+
+        /* detect cpu id */
+        s3c64xx_init_cpu();
+
+        s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+}
+
+static __init int s3c64xx_sysdev_init(void)
+{
+        sysdev_class_register(&s3c64xx_sysclass);
+        return sysdev_register(&s3c64xx_sysdev);
+}
+core_initcall(s3c64xx_sysdev_init);
+
+/*
+ * setup the sources the vic should advertise resume
+ * for, even though it is not doing the wake
+ * (set_irq_wake needs to be valid)
+ */
+#define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE))
+#define IRQ_VIC1_RESUME (1 << (IRQ_RTC_ALARM - IRQ_VIC1_BASE) | \
+                         1 << (IRQ_PENDN - IRQ_VIC1_BASE) |     \
+                         1 << (IRQ_HSMMC0 - IRQ_VIC1_BASE) |    \
+                         1 << (IRQ_HSMMC1 - IRQ_VIC1_BASE) |    \
+                         1 << (IRQ_HSMMC2 - IRQ_VIC1_BASE))
+
+void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
+{
+        printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
+
+        /* initialise the pair of VICs */
+        vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
+        vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
+
+        /* add the timer sub-irqs */
+        s3c_init_vic_timer_irq(5, IRQ_TIMER0);
+}
 
 #define eint_offset(irq)        ((irq) - IRQ_EINT(0))
 #define eint_irq_to_bit(irq)    ((u32)(1 << eint_offset(irq)))
@@ -209,5 +373,13 @@ static int __init s3c64xx_init_irq_eint(void)
 
         return 0;
 }
-
 arch_initcall(s3c64xx_init_irq_eint);
+
+void s3c64xx_restart(char mode, const char *cmd)
+{
+        if (mode != 's')
+                arch_wdt_reset();
+
+        /* if all else fails, or mode was for soft, jump to 0 */
+        soft_restart(0);
+}
diff --git a/arch/arm/mach-s3c64xx/common.h b/arch/arm/mach-s3c64xx/common.h
new file mode 100644
index 000000000000..8dc8ab6d8d6d
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/common.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * Common Header for S3C64XX machines
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_S3C64XX_COMMON_H
+#define __ARCH_ARM_MACH_S3C64XX_COMMON_H
+
+void s3c64xx_init_irq(u32 vic0, u32 vic1);
+void s3c64xx_init_io(struct map_desc *mach_desc, int size);
+
+void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit);
+void s3c64xx_setup_clocks(void);
+
+void s3c64xx_restart(char mode, const char *cmd);
+
+extern struct syscore_ops s3c64xx_irq_syscore_ops;
+extern struct sysdev_class s3c64xx_sysclass;
+
+#ifdef CONFIG_CPU_S3C6400
+
+extern  int s3c6400_init(void);
+extern void s3c6400_init_irq(void);
+extern void s3c6400_map_io(void);
+extern void s3c6400_init_clocks(int xtal);
+
+#else
+#define s3c6400_init_clocks NULL
+#define s3c6400_map_io NULL
+#define s3c6400_init NULL
+#endif
+
+#ifdef CONFIG_CPU_S3C6410
+
+extern  int s3c6410_init(void);
+extern void s3c6410_init_irq(void);
+extern void s3c6410_map_io(void);
+extern void s3c6410_init_clocks(int xtal);
+
+#else
+#define s3c6410_init_clocks NULL
+#define s3c6410_map_io NULL
+#define s3c6410_init NULL
+#endif
+
+#endif /* __ARCH_ARM_MACH_S3C64XX_COMMON_H */
diff --git a/arch/arm/mach-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c
deleted file mode 100644
index de085b798aa4..000000000000
--- a/arch/arm/mach-s3c64xx/cpu.c
+++ /dev/null
@@ -1,161 +0,0 @@
-/* linux/arch/arm/plat-s3c64xx/cpu.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C64XX CPU Support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/sysdev.h>
-#include <linux/serial_core.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/dma-mapping.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include <plat/regs-serial.h>
-
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/clock.h>
-
-#include <plat/s3c6400.h>
-#include <plat/s3c6410.h>
-
-/* table of supported CPUs */
-
-static const char name_s3c6400[] = "S3C6400";
-static const char name_s3c6410[] = "S3C6410";
-
-static struct cpu_table cpu_ids[] __initdata = {
-        {
-                .idcode         = S3C6400_CPU_ID,
-                .idmask         = S3C64XX_CPU_MASK,
-                .map_io         = s3c6400_map_io,
-                .init_clocks    = s3c6400_init_clocks,
-                .init_uarts     = s3c6400_init_uarts,
-                .init           = s3c6400_init,
-                .name           = name_s3c6400,
-        }, {
-                .idcode         = S3C6410_CPU_ID,
-                .idmask         = S3C64XX_CPU_MASK,
-                .map_io         = s3c6410_map_io,
-                .init_clocks    = s3c6410_init_clocks,
-                .init_uarts     = s3c6410_init_uarts,
-                .init           = s3c6410_init,
-                .name           = name_s3c6410,
-        },
-};
-
-/* minimal IO mapping */
-
-/* see notes on uart map in arch/arm/mach-s3c6400/include/mach/debug-macro.S */
-#define UART_OFFS (S3C_PA_UART & 0xfffff)
-
-static struct map_desc s3c_iodesc[] __initdata = {
-        {
-                .virtual        = (unsigned long)S3C_VA_SYS,
-                .pfn            = __phys_to_pfn(S3C64XX_PA_SYSCON),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_MEM,
-                .pfn            = __phys_to_pfn(S3C64XX_PA_SROM),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)(S3C_VA_UART + UART_OFFS),
-                .pfn            = __phys_to_pfn(S3C_PA_UART),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)VA_VIC0,
-                .pfn            = __phys_to_pfn(S3C64XX_PA_VIC0),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)VA_VIC1,
-                .pfn            = __phys_to_pfn(S3C64XX_PA_VIC1),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_TIMER,
-                .pfn            = __phys_to_pfn(S3C_PA_TIMER),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C64XX_VA_GPIO,
-                .pfn            = __phys_to_pfn(S3C64XX_PA_GPIO),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C64XX_VA_MODEM,
-                .pfn            = __phys_to_pfn(S3C64XX_PA_MODEM),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_WATCHDOG,
-                .pfn            = __phys_to_pfn(S3C64XX_PA_WATCHDOG),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_USB_HSPHY,
-                .pfn            = __phys_to_pfn(S3C64XX_PA_USB_HSPHY),
-                .length         = SZ_1K,
-                .type           = MT_DEVICE,
-        },
-};
-
-
-struct sysdev_class s3c64xx_sysclass = {
-        .name   = "s3c64xx-core",
-};
-
-static struct sys_device s3c64xx_sysdev = {
-        .cls    = &s3c64xx_sysclass,
-};
-
-/* uart registration process */
-
-void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
-}
-
-/* read cpu identification code */
-
-void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
-{
-        /* initialise the io descriptors we need for initialisation */
-        iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
-        iotable_init(mach_desc, size);
-        init_consistent_dma_size(SZ_8M);
-
-        /* detect cpu id */
-        s3c64xx_init_cpu();
-
-        s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
-}
-
-static __init int s3c64xx_sysdev_init(void)
-{
-        sysdev_class_register(&s3c64xx_sysclass);
-        return sysdev_register(&s3c64xx_sysdev);
-}
-
-core_initcall(s3c64xx_sysdev_init);
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
deleted file mode 100644
index 3341fd118723..000000000000
--- a/arch/arm/mach-s3c64xx/dev-spi.c
+++ /dev/null
@@ -1,180 +0,0 @@
-/* linux/arch/arm/plat-s3c64xx/dev-spi.c
- *
- * Copyright (C) 2009 Samsung Electronics Ltd.
- *      Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/export.h>
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/gpio.h>
-
-#include <mach/dma.h>
-#include <mach/map.h>
-#include <mach/spi-clocks.h>
-#include <mach/irqs.h>
-
-#include <plat/s3c64xx-spi.h>
-#include <plat/gpio-cfg.h>
-#include <plat/devs.h>
-
-static char *spi_src_clks[] = {
-        [S3C64XX_SPI_SRCCLK_PCLK] = "pclk",
-        [S3C64XX_SPI_SRCCLK_SPIBUS] = "spi-bus",
-        [S3C64XX_SPI_SRCCLK_48M] = "spi_48m",
-};
-
-/* SPI Controller platform_devices */
-
-/* Since we emulate multi-cs capability, we do not touch the GPC-3,7.
- * The emulated CS is toggled by board specific mechanism, as it can
- * be either some immediate GPIO or some signal out of some other
- * chip in between ... or some yet another way.
- * We simply do not assume anything about CS.
- */
-static int s3c64xx_spi_cfg_gpio(struct platform_device *pdev)
-{
-        unsigned int base;
-
-        switch (pdev->id) {
-        case 0:
-                base = S3C64XX_GPC(0);
-                break;
-
-        case 1:
-                base = S3C64XX_GPC(4);
-                break;
-
-        default:
-                dev_err(&pdev->dev, "Invalid SPI Controller number!");
-                return -EINVAL;
-        }
-
-        s3c_gpio_cfgall_range(base, 3,
-                              S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
-
-        return 0;
-}
-
-static struct resource s3c64xx_spi0_resource[] = {
-        [0] = {
-                .start = S3C64XX_PA_SPI0,
-                .end   = S3C64XX_PA_SPI0 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_SPI0_TX,
-                .end   = DMACH_SPI0_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_SPI0_RX,
-                .end   = DMACH_SPI0_RX,
-                .flags = IORESOURCE_DMA,
-        },
-        [3] = {
-                .start = IRQ_SPI0,
-                .end   = IRQ_SPI0,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-
-static struct s3c64xx_spi_info s3c64xx_spi0_pdata = {
-        .cfg_gpio = s3c64xx_spi_cfg_gpio,
-        .fifo_lvl_mask = 0x7f,
-        .rx_lvl_offset = 13,
-        .tx_st_done = 21,
-};
-
-static u64 spi_dmamask = DMA_BIT_MASK(32);
-
-struct platform_device s3c64xx_device_spi0 = {
-        .name             = "s3c64xx-spi",
-        .id               = 0,
-        .num_resources    = ARRAY_SIZE(s3c64xx_spi0_resource),
-        .resource         = s3c64xx_spi0_resource,
-        .dev = {
-                .dma_mask               = &spi_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                .platform_data = &s3c64xx_spi0_pdata,
-        },
-};
-EXPORT_SYMBOL(s3c64xx_device_spi0);
-
-static struct resource s3c64xx_spi1_resource[] = {
-        [0] = {
-                .start = S3C64XX_PA_SPI1,
-                .end   = S3C64XX_PA_SPI1 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_SPI1_TX,
-                .end   = DMACH_SPI1_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_SPI1_RX,
-                .end   = DMACH_SPI1_RX,
-                .flags = IORESOURCE_DMA,
-        },
-        [3] = {
-                .start = IRQ_SPI1,
-                .end   = IRQ_SPI1,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-
-static struct s3c64xx_spi_info s3c64xx_spi1_pdata = {
-        .cfg_gpio = s3c64xx_spi_cfg_gpio,
-        .fifo_lvl_mask = 0x7f,
-        .rx_lvl_offset = 13,
-        .tx_st_done = 21,
-};
-
-struct platform_device s3c64xx_device_spi1 = {
-        .name             = "s3c64xx-spi",
-        .id               = 1,
-        .num_resources    = ARRAY_SIZE(s3c64xx_spi1_resource),
-        .resource         = s3c64xx_spi1_resource,
-        .dev = {
-                .dma_mask               = &spi_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                .platform_data = &s3c64xx_spi1_pdata,
-        },
-};
-EXPORT_SYMBOL(s3c64xx_device_spi1);
-
-void __init s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
-{
-        struct s3c64xx_spi_info *pd;
-
-        /* Reject invalid configuration */
-        if (!num_cs || src_clk_nr < 0
-                        || src_clk_nr > S3C64XX_SPI_SRCCLK_48M) {
-                printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
-                return;
-        }
-
-        switch (cntrlr) {
-        case 0:
-                pd = &s3c64xx_spi0_pdata;
-                break;
-        case 1:
-                pd = &s3c64xx_spi1_pdata;
-                break;
-        default:
-                printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
-                                                        __func__, cntrlr);
-                return;
-        }
-
-        pd->num_cs = num_cs;
-        pd->src_clk_nr = src_clk_nr;
-        pd->src_clk_name = spi_src_clks[src_clk_nr];
-}
diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h
index 23a1d71e4d53..8e2097bb208a 100644
--- a/arch/arm/mach-s3c64xx/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
@@ -115,6 +115,8 @@
 #define S3C_PA_USB_HSOTG        S3C64XX_PA_USB_HSOTG
 #define S3C_PA_RTC              S3C64XX_PA_RTC
 #define S3C_PA_WDT              S3C64XX_PA_WATCHDOG
+#define S3C_PA_SPI0             S3C64XX_PA_SPI0
+#define S3C_PA_SPI1             S3C64XX_PA_SPI1
 
 #define SAMSUNG_PA_ADC          S3C64XX_PA_ADC
 #define SAMSUNG_PA_CFCON        S3C64XX_PA_CFCON
diff --git a/arch/arm/mach-s3c64xx/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h
index d8ca5786ba25..353ed4389ae7 100644
--- a/arch/arm/mach-s3c64xx/include/mach/system.h
+++ b/arch/arm/mach-s3c64xx/include/mach/system.h
@@ -11,20 +11,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H __FILE__
 
-#include <plat/watchdog-reset.h>
-
 static void arch_idle(void)
 {
         /* nothing here yet */
 }
 
-static void arch_reset(char mode, const char *cmd)
-{
-        if (mode != 's')
-                arch_wdt_reset();
-
-        /* if all else fails, or mode was for soft, jump to 0 */
-        soft_restart(0);
-}
-
 #endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s3c64xx/irq.c b/arch/arm/mach-s3c64xx/irq.c
deleted file mode 100644
index b07357e94958..000000000000
--- a/arch/arm/mach-s3c64xx/irq.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/* arch/arm/plat-s3c64xx/irq.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C64XX - Interrupt handling
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/serial_core.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-
-#include <asm/hardware/vic.h>
-
-#include <mach/map.h>
-#include <plat/irq-vic-timer.h>
-#include <plat/irq-uart.h>
-#include <plat/cpu.h>
-
-/* setup the sources the vic should advertise resume for, even though it
- * is not doing the wake (set_irq_wake needs to be valid) */
-#define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE))
-#define IRQ_VIC1_RESUME (1 << (IRQ_RTC_ALARM - IRQ_VIC1_BASE) | \
-                         1 << (IRQ_PENDN - IRQ_VIC1_BASE) |     \
-                         1 << (IRQ_HSMMC0 - IRQ_VIC1_BASE) |    \
-                         1 << (IRQ_HSMMC1 - IRQ_VIC1_BASE) |    \
-                         1 << (IRQ_HSMMC2 - IRQ_VIC1_BASE))
-
-void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
-{
-        printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
-
-        /* initialise the pair of VICs */
-        vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
-        vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
-
-        /* add the timer sub-irqs */
-        s3c_init_vic_timer_irq(5, IRQ_TIMER0);
-}
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index 2bbc14d93428..b86f2779e4e6 100644
--- a/arch/arm/mach-s3c64xx/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -46,13 +46,14 @@
 #include <plat/fb.h>
 #include <plat/regs-fb-v4.h>
 
-#include <plat/s3c6410.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <mach/regs-gpio.h>
 #include <mach/regs-modem.h>
 
+#include "common.h"
+
 /* DM9000 */
 #define ANW6410_PA_DM9000       (0x18000000)
 
@@ -241,4 +242,5 @@ MACHINE_START(ANW6410, "A&W6410")
         .map_io         = anw6410_map_io,
         .init_machine   = anw6410_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index 799558c15b4e..25d9f0cf9451 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -53,7 +53,6 @@
 
 #include <mach/regs-gpio-memport.h>
 
-#include <plat/s3c6410.h>
 #include <plat/regs-serial.h>
 #include <plat/regs-fb-v4.h>
 #include <plat/fb.h>
@@ -69,6 +68,8 @@
 #include <plat/iic.h>
 #include <plat/pm.h>
 
+#include "common.h"
+
 /* serial port setup */
 
 #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
@@ -749,4 +750,5 @@ MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
         .map_io         = crag6410_map_io,
         .init_machine   = crag6410_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index c5955f301709..521e07b8501b 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -38,12 +38,13 @@
 #include <plat/fb.h>
 #include <plat/nand.h>
 
-#include <plat/s3c6410.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/regs-fb-v4.h>
 
+#include "common.h"
+
 #define UCON S3C2410_UCON_DEFAULT
 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
@@ -272,4 +273,5 @@ MACHINE_START(HMT, "Airgoo-HMT")
         .map_io         = hmt_map_io,
         .init_machine   = hmt_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 4415c85e3f6f..c34c2ab22ead 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -34,7 +34,6 @@
 #include <mach/regs-modem.h>
 #include <mach/regs-srom.h>
 
-#include <plat/s3c6410.h>
 #include <plat/adc.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
@@ -46,6 +45,8 @@
 
 #include <video/platform_lcd.h>
 
+#include "common.h"
+
 #define UCON S3C2410_UCON_DEFAULT
 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
@@ -350,4 +351,5 @@ MACHINE_START(MINI6410, "MINI6410")
         .map_io         = mini6410_map_io,
         .init_machine   = mini6410_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c
index 9b2c610eac2a..0efa2ba783b2 100644
--- a/arch/arm/mach-s3c64xx/mach-ncp.c
+++ b/arch/arm/mach-s3c64xx/mach-ncp.c
@@ -40,12 +40,13 @@
 #include <plat/iic.h>
 #include <plat/fb.h>
 
-#include <plat/s3c6410.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/regs-fb-v4.h>
 
+#include "common.h"
+
 #define UCON S3C2410_UCON_DEFAULT
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE
 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
@@ -104,4 +105,5 @@ MACHINE_START(NCP, "NCP")
         .map_io         = ncp_map_io,
         .init_machine   = ncp_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index dbab49f2713e..be2a9a22ab74 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -35,7 +35,6 @@
 #include <mach/regs-modem.h>
 #include <mach/regs-srom.h>
 
-#include <plat/s3c6410.h>
 #include <plat/adc.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
@@ -47,6 +46,8 @@
 
 #include <video/platform_lcd.h>
 
+#include "common.h"
+
 #define UCON S3C2410_UCON_DEFAULT
 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
@@ -331,4 +332,5 @@ MACHINE_START(REAL6410, "REAL6410")
         .map_io         = real6410_map_io,
         .init_machine   = real6410_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c
index cb1ebeb08763..ce31db136231 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq.c
@@ -40,6 +40,8 @@
 
 #include <video/platform_lcd.h>
 
+#include "common.h"
+
 #define UCON S3C2410_UCON_DEFAULT
 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c
index 053945282652..3f42431d4dda 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq5.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq5.c
@@ -24,13 +24,13 @@
 #include <mach/map.h>
 #include <mach/regs-gpio.h>
 
-#include <plat/s3c6410.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
 #include <plat/regs-fb-v4.h>
 
+#include "common.h"
 #include "mach-smartq.h"
 
 static struct gpio_led smartq5_leds[] = {
@@ -153,4 +153,5 @@ MACHINE_START(SMARTQ5, "SmartQ 5")
         .map_io         = smartq_map_io,
         .init_machine   = smartq5_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c
index a58d1ba5cba2..e5c09b6db967 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq7.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq7.c
@@ -24,13 +24,13 @@
 #include <mach/map.h>
 #include <mach/regs-gpio.h>
 
-#include <plat/s3c6410.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
 #include <plat/regs-fb-v4.h>
 
+#include "common.h"
 #include "mach-smartq.h"
 
 static struct gpio_led smartq7_leds[] = {
@@ -169,4 +169,5 @@ MACHINE_START(SMARTQ7, "SmartQ 7")
         .map_io         = smartq_map_io,
         .init_machine   = smartq7_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c
index be28a59e3f57..5f096534f4c4 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6400.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c
@@ -32,12 +32,13 @@
 
 #include <plat/regs-serial.h>
 
-#include <plat/s3c6400.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/iic.h>
 
+#include "common.h"
+
 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
@@ -93,4 +94,5 @@ MACHINE_START(SMDK6400, "SMDK6400")
         .map_io         = smdk6400_map_io,
         .init_machine   = smdk6400_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 08309155d087..ca6fc204f0ea 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -64,7 +64,6 @@
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
 
-#include <plat/s3c6410.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
@@ -74,6 +73,8 @@
 #include <plat/backlight.h>
 #include <plat/regs-fb-v4.h>
 
+#include "common.h"
+
 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
@@ -705,4 +706,5 @@ MACHINE_START(SMDK6410, "SMDK6410")
         .map_io         = smdk6410_map_io,
         .init_machine   = smdk6410_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s3c64xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c
index 51c00f2453c6..b1e1571f2f6b 100644
--- a/arch/arm/mach-s3c64xx/s3c6400.c
+++ b/arch/arm/mach-s3c64xx/s3c6400.c
@@ -38,7 +38,8 @@
 #include <plat/sdhci.h>
 #include <plat/iic-core.h>
 #include <plat/onenand-core.h>
-#include <plat/s3c6400.h>
+
+#include "common.h"
 
 void __init s3c6400_map_io(void)
 {
@@ -60,7 +61,7 @@ void __init s3c6400_map_io(void)
 void __init s3c6400_init_clocks(int xtal)
 {
         s3c64xx_register_clocks(xtal, S3C6400_CLKDIV0_ARM_MASK);
-        s3c6400_setup_clocks();
+        s3c64xx_setup_clocks();
 }
 
 void __init s3c6400_init_irq(void)
diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c
index 4117003464ad..fba71bd991c7 100644
--- a/arch/arm/mach-s3c64xx/s3c6410.c
+++ b/arch/arm/mach-s3c64xx/s3c6410.c
@@ -41,8 +41,8 @@
 #include <plat/adc-core.h>
 #include <plat/iic-core.h>
 #include <plat/onenand-core.h>
-#include <plat/s3c6400.h>
-#include <plat/s3c6410.h>
+
+#include "common.h"
 
 void __init s3c6410_map_io(void)
 {
@@ -66,7 +66,7 @@ void __init s3c6410_init_clocks(int xtal)
 {
         printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
         s3c64xx_register_clocks(xtal, S3C6410_CLKDIV0_ARM_MASK);
-        s3c6400_setup_clocks();
+        s3c64xx_setup_clocks();
 }
 
 void __init s3c6410_init_irq(void)
diff --git a/arch/arm/mach-s3c64xx/setup-sdhci.c b/arch/arm/mach-s3c64xx/setup-sdhci.c
deleted file mode 100644
index c75a71b21165..000000000000
--- a/arch/arm/mach-s3c64xx/setup-sdhci.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/* linux/arch/arm/mach-s3c64xx/setup-sdhci.c
- *
- * Copyright 2008 Simtec Electronics
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * S3C6400/S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/types.h>
-
-/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
-
-char *s3c64xx_hsmmc_clksrcs[4] = {
-        [0] = "hsmmc",
-        [1] = "hsmmc",
-        [2] = "mmc_bus",
-        /* [3] = "48m", - note not successfully used yet */
-};
diff --git a/arch/arm/mach-s3c64xx/setup-spi.c b/arch/arm/mach-s3c64xx/setup-spi.c
new file mode 100644
index 000000000000..d9592ad7a825
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/setup-spi.c
@@ -0,0 +1,45 @@
+/* linux/arch/arm/mach-s3c64xx/setup-spi.c
+ *
+ * Copyright (C) 2011 Samsung Electronics Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+
+#include <plat/gpio-cfg.h>
+#include <plat/s3c64xx-spi.h>
+
+#ifdef CONFIG_S3C64XX_DEV_SPI0
+struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = {
+        .fifo_lvl_mask  = 0x7f,
+        .rx_lvl_offset  = 13,
+        .tx_st_done     = 21,
+};
+
+int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
+{
+        s3c_gpio_cfgall_range(S3C64XX_GPC(0), 3,
+                                S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
+        return 0;
+}
+#endif
+
+#ifdef CONFIG_S3C64XX_DEV_SPI1
+struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = {
+        .fifo_lvl_mask  = 0x7f,
+        .rx_lvl_offset  = 13,
+        .tx_st_done     = 21,
+};
+
+int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
+{
+        s3c_gpio_cfgall_range(S3C64XX_GPC(4), 3,
+                                S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
+        return 0;
+}
+#endif
diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
index 18690c5f99e6..dd8c85ef6dab 100644
--- a/arch/arm/mach-s5p64x0/Kconfig
+++ b/arch/arm/mach-s5p64x0/Kconfig
@@ -36,6 +36,11 @@ config S5P64X0_SETUP_I2C1
         help
           Common setup code for i2c bus 1.
 
+config S5P64X0_SETUP_SPI
+        bool
+        help
+          Common setup code for SPI GPIO configurations
+
 # machine support
 
 config MACH_SMDK6440
@@ -45,7 +50,6 @@ config MACH_SMDK6440
         select S3C_DEV_I2C1
         select S3C_DEV_RTC
         select S3C_DEV_WDT
-        select S3C64XX_DEV_SPI
         select SAMSUNG_DEV_ADC
         select SAMSUNG_DEV_BACKLIGHT
         select SAMSUNG_DEV_PWM
@@ -62,7 +66,6 @@ config MACH_SMDK6450
         select S3C_DEV_I2C1
         select S3C_DEV_RTC
         select S3C_DEV_WDT
-        select S3C64XX_DEV_SPI
         select SAMSUNG_DEV_ADC
         select SAMSUNG_DEV_BACKLIGHT
         select SAMSUNG_DEV_PWM
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
index a1324d8dc4e0..e167ca136f5d 100644
--- a/arch/arm/mach-s5p64x0/Makefile
+++ b/arch/arm/mach-s5p64x0/Makefile
@@ -10,14 +10,16 @@ obj-m				:=
 obj-n                           :=
 obj-                            :=
 
-# Core support for S5P64X0 system
+# Core
 
-obj-$(CONFIG_ARCH_S5P64X0)      += cpu.o init.o clock.o dma.o
-obj-$(CONFIG_ARCH_S5P64X0)      += setup-i2c0.o irq-eint.o
+obj-y                           += common.o clock.o
 obj-$(CONFIG_CPU_S5P6440)       += clock-s5p6440.o
 obj-$(CONFIG_CPU_S5P6450)       += clock-s5p6450.o
+
 obj-$(CONFIG_PM)                += pm.o irq-pm.o
 
+obj-y                           += dma.o
+
 # machine support
 
 obj-$(CONFIG_MACH_SMDK6440)     += mach-smdk6440.o
@@ -26,7 +28,8 @@ obj-$(CONFIG_MACH_SMDK6450)	+= mach-smdk6450.o
 # device support
 
 obj-y                           += dev-audio.o
-obj-$(CONFIG_S3C64XX_DEV_SPI)   += dev-spi.o
 
+obj-y                                   += setup-i2c0.o
 obj-$(CONFIG_S5P64X0_SETUP_I2C1)        += setup-i2c1.o
 obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP)    += setup-fb-24bpp.o
+obj-$(CONFIG_S5P64X0_SETUP_SPI)         += setup-spi.o
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
index c54c65d511f0..58811ba89eef 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6440.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c
@@ -31,7 +31,8 @@
 #include <plat/pll.h>
 #include <plat/s5p-clock.h>
 #include <plat/clock-clksrc.h>
-#include <plat/s5p6440.h>
+
+#include "common.h"
 
 static u32 epll_div[][5] = {
         { 36000000,     0,      48, 1, 4 },
@@ -268,18 +269,6 @@ static struct clk init_clocks_off[] = {
                 .enable         = s5p64x0_pclk_ctrl,
                 .ctrlbit        = (1 << 31),
         }, {
-                .name           = "sclk_spi_48",
-                .devname        = "s3c64xx-spi.0",
-                .parent         = &clk_48m,
-                .enable         = s5p64x0_sclk_ctrl,
-                .ctrlbit        = (1 << 22),
-        }, {
-                .name           = "sclk_spi_48",
-                .devname        = "s3c64xx-spi.1",
-                .parent         = &clk_48m,
-                .enable         = s5p64x0_sclk_ctrl,
-                .ctrlbit        = (1 << 23),
-        }, {
                 .name           = "mmc_48m",
                 .devname        = "s3c-sdhci.0",
                 .parent         = &clk_48m,
@@ -421,35 +410,6 @@ static struct clksrc_clk clksrcs[] = {
                 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
         }, {
                 .clk    = {
-                        .name           = "uclk1",
-                        .ctrlbit        = (1 << 5),
-                        .enable         = s5p64x0_sclk_ctrl,
-                },
-                .sources = &clkset_uart,
-                .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 },
-                .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
-        }, {
-                .clk    = {
-                        .name           = "sclk_spi",
-                        .devname        = "s3c64xx-spi.0",
-                        .ctrlbit        = (1 << 20),
-                        .enable         = s5p64x0_sclk_ctrl,
-                },
-                .sources = &clkset_group1,
-                .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
-                .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
-        }, {
-                .clk    = {
-                        .name           = "sclk_spi",
-                        .devname        = "s3c64xx-spi.1",
-                        .ctrlbit        = (1 << 21),
-                        .enable         = s5p64x0_sclk_ctrl,
-                },
-                .sources = &clkset_group1,
-                .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
-                .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
-        }, {
-                .clk    = {
                         .name           = "sclk_post",
                         .ctrlbit        = (1 << 10),
                         .enable         = s5p64x0_sclk_ctrl,
@@ -487,6 +447,41 @@ static struct clksrc_clk clksrcs[] = {
         },
 };
 
+static struct clksrc_clk clk_sclk_uclk = {
+        .clk    = {
+                .name           = "uclk1",
+                .ctrlbit        = (1 << 5),
+                .enable         = s5p64x0_sclk_ctrl,
+        },
+        .sources = &clkset_uart,
+        .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 },
+        .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_spi0 = {
+        .clk    = {
+                .name           = "sclk_spi",
+                .devname        = "s3c64xx-spi.0",
+                .ctrlbit        = (1 << 20),
+                .enable         = s5p64x0_sclk_ctrl,
+        },
+        .sources = &clkset_group1,
+        .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
+        .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_spi1 = {
+        .clk    = {
+                .name           = "sclk_spi",
+                .devname        = "s3c64xx-spi.1",
+                .ctrlbit        = (1 << 21),
+                .enable         = s5p64x0_sclk_ctrl,
+        },
+        .sources = &clkset_group1,
+        .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
+        .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
+};
+
 /* Clock initialization code */
 static struct clksrc_clk *sysclks[] = {
         &clk_mout_apll,
@@ -505,6 +500,20 @@ static struct clk dummy_apb_pclk = {
         .id             = -1,
 };
 
+static struct clksrc_clk *clksrc_cdev[] = {
+        &clk_sclk_uclk,
+        &clk_sclk_spi0,
+        &clk_sclk_spi1,
+};
+
+static struct clk_lookup s5p6440_clk_lookup[] = {
+        CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_pclk_low.clk),
+        CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uclk.clk),
+        CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
+        CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
+        CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
+};
+
 void __init_or_cpufreq s5p6440_setup_clocks(void)
 {
         struct clk *xtal_clk;
@@ -583,9 +592,12 @@ void __init s5p6440_register_clocks(void)
 
         s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
         s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
+                s3c_register_clksrc(clksrc_cdev[ptr], 1);
 
         s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
         s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
+        clkdev_add_table(s5p6440_clk_lookup, ARRAY_SIZE(s5p6440_clk_lookup));
 
         s3c24xx_register_clock(&dummy_apb_pclk);
 
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
index 2d04abfba12e..bd9d1e6fc5e2 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -31,7 +31,8 @@
 #include <plat/pll.h>
 #include <plat/s5p-clock.h>
 #include <plat/clock-clksrc.h>
-#include <plat/s5p6450.h>
+
+#include "common.h"
 
 static struct clksrc_clk clk_mout_dpll = {
         .clk    = {
@@ -443,35 +444,6 @@ static struct clksrc_clk clksrcs[] = {
                 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
         }, {
                 .clk    = {
-                        .name           = "uclk1",
-                        .ctrlbit        = (1 << 5),
-                        .enable         = s5p64x0_sclk_ctrl,
-                },
-                .sources = &clkset_uart,
-                .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 },
-                .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
-        }, {
-                .clk    = {
-                        .name           = "sclk_spi",
-                        .devname        = "s3c64xx-spi.0",
-                        .ctrlbit        = (1 << 20),
-                        .enable         = s5p64x0_sclk_ctrl,
-                },
-                .sources = &clkset_group2,
-                .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
-                .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
-        }, {
-                .clk    = {
-                        .name           = "sclk_spi",
-                        .devname        = "s3c64xx-spi.1",
-                        .ctrlbit        = (1 << 21),
-                        .enable         = s5p64x0_sclk_ctrl,
-                },
-                .sources = &clkset_group2,
-                .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
-                .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
-        }, {
-                .clk    = {
                         .name           = "sclk_fimc",
                         .ctrlbit        = (1 << 10),
                         .enable         = s5p64x0_sclk_ctrl,
@@ -536,6 +508,55 @@ static struct clksrc_clk clksrcs[] = {
         },
 };
 
+static struct clksrc_clk clk_sclk_uclk = {
+        .clk    = {
+                .name           = "uclk1",
+                .ctrlbit        = (1 << 5),
+                .enable         = s5p64x0_sclk_ctrl,
+        },
+        .sources = &clkset_uart,
+        .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 },
+        .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_spi0 = {
+        .clk    = {
+                .name           = "sclk_spi",
+                .devname        = "s3c64xx-spi.0",
+                .ctrlbit        = (1 << 20),
+                .enable         = s5p64x0_sclk_ctrl,
+        },
+        .sources = &clkset_group2,
+        .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
+        .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_spi1 = {
+        .clk    = {
+                .name           = "sclk_spi",
+                .devname        = "s3c64xx-spi.1",
+                .ctrlbit        = (1 << 21),
+                .enable         = s5p64x0_sclk_ctrl,
+        },
+        .sources = &clkset_group2,
+        .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
+        .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
+};
+
+static struct clksrc_clk *clksrc_cdev[] = {
+        &clk_sclk_uclk,
+        &clk_sclk_spi0,
+        &clk_sclk_spi1,
+};
+
+static struct clk_lookup s5p6450_clk_lookup[] = {
+        CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_pclk_low.clk),
+        CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uclk.clk),
+        CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
+        CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
+        CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
+};
+
 /* Clock initialization code */
 static struct clksrc_clk *sysclks[] = {
         &clk_mout_apll,
@@ -634,9 +655,12 @@ void __init s5p6450_register_clocks(void)
 
         s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
         s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
+                s3c_register_clksrc(clksrc_cdev[ptr], 1);
 
         s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
         s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
+        clkdev_add_table(s5p6450_clk_lookup, ARRAY_SIZE(s5p6450_clk_lookup));
 
         s3c24xx_register_clock(&dummy_apb_pclk);
 
diff --git a/arch/arm/mach-s5p64x0/clock.c b/arch/arm/mach-s5p64x0/clock.c
index b52c6e2f37a6..b289b726a7d6 100644
--- a/arch/arm/mach-s5p64x0/clock.c
+++ b/arch/arm/mach-s5p64x0/clock.c
@@ -30,8 +30,8 @@
 #include <plat/pll.h>
 #include <plat/s5p-clock.h>
 #include <plat/clock-clksrc.h>
-#include <plat/s5p6440.h>
-#include <plat/s5p6450.h>
+
+#include "common.h"
 
 struct clksrc_clk clk_mout_apll = {
         .clk    = {
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
new file mode 100644
index 000000000000..fcf0778ae5c4
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -0,0 +1,437 @@
+/*
+ * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Common Codes for S5P64X0 machines
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/sysdev.h>
+#include <linux/serial_core.h>
+#include <linux/platform_device.h>
+#include <linux/sched.h>
+#include <linux/dma-mapping.h>
+#include <linux/gpio.h>
+#include <linux/irq.h>
+
+#include <asm/irq.h>
+#include <asm/proc-fns.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <mach/map.h>
+#include <mach/hardware.h>
+#include <mach/regs-clock.h>
+#include <mach/regs-gpio.h>
+
+#include <plat/cpu.h>
+#include <plat/clock.h>
+#include <plat/devs.h>
+#include <plat/pm.h>
+#include <plat/adc-core.h>
+#include <plat/fb-core.h>
+#include <plat/gpio-cfg.h>
+#include <plat/regs-irqtype.h>
+#include <plat/regs-serial.h>
+#include <plat/watchdog-reset.h>
+
+#include "common.h"
+
+static const char name_s5p6440[] = "S5P6440";
+static const char name_s5p6450[] = "S5P6450";
+
+static struct cpu_table cpu_ids[] __initdata = {
+        {
+                .idcode         = S5P6440_CPU_ID,
+                .idmask         = S5P64XX_CPU_MASK,
+                .map_io         = s5p6440_map_io,
+                .init_clocks    = s5p6440_init_clocks,
+                .init_uarts     = s5p6440_init_uarts,
+                .init           = s5p64x0_init,
+                .name           = name_s5p6440,
+        }, {
+                .idcode         = S5P6450_CPU_ID,
+                .idmask         = S5P64XX_CPU_MASK,
+                .map_io         = s5p6450_map_io,
+                .init_clocks    = s5p6450_init_clocks,
+                .init_uarts     = s5p6450_init_uarts,
+                .init           = s5p64x0_init,
+                .name           = name_s5p6450,
+        },
+};
+
+/* Initial IO mappings */
+
+static struct map_desc s5p64x0_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S5P_VA_CHIPID,
+                .pfn            = __phys_to_pfn(S5P64X0_PA_CHIPID),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_SYS,
+                .pfn            = __phys_to_pfn(S5P64X0_PA_SYSCON),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_TIMER,
+                .pfn            = __phys_to_pfn(S5P64X0_PA_TIMER),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_WATCHDOG,
+                .pfn            = __phys_to_pfn(S5P64X0_PA_WDT),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_SROMC,
+                .pfn            = __phys_to_pfn(S5P64X0_PA_SROMC),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_GPIO,
+                .pfn            = __phys_to_pfn(S5P64X0_PA_GPIO),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)VA_VIC0,
+                .pfn            = __phys_to_pfn(S5P64X0_PA_VIC0),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)VA_VIC1,
+                .pfn            = __phys_to_pfn(S5P64X0_PA_VIC1),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        },
+};
+
+static struct map_desc s5p6440_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S3C_VA_UART,
+                .pfn            = __phys_to_pfn(S5P6440_PA_UART(0)),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+};
+
+static struct map_desc s5p6450_iodesc[] __initdata = {
+        {
+                .virtual        = (unsigned long)S3C_VA_UART,
+                .pfn            = __phys_to_pfn(S5P6450_PA_UART(0)),
+                .length         = SZ_512K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_UART + SZ_512K,
+                .pfn            = __phys_to_pfn(S5P6450_PA_UART(5)),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+};
+
+static void s5p64x0_idle(void)
+{
+        unsigned long val;
+
+        if (!need_resched()) {
+                val = __raw_readl(S5P64X0_PWR_CFG);
+                val &= ~(0x3 << 5);
+                val |= (0x1 << 5);
+                __raw_writel(val, S5P64X0_PWR_CFG);
+
+                cpu_do_idle();
+        }
+        local_irq_enable();
+}
+
+/*
+ * s5p64x0_map_io
+ *
+ * register the standard CPU IO areas
+ */
+
+void __init s5p64x0_init_io(struct map_desc *mach_desc, int size)
+{
+        /* initialize the io descriptors we need for initialization */
+        iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
+        if (mach_desc)
+                iotable_init(mach_desc, size);
+
+        /* detect cpu id and rev. */
+        s5p_init_cpu(S5P64X0_SYS_ID);
+
+        s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+}
+
+void __init s5p6440_map_io(void)
+{
+        /* initialize any device information early */
+        s3c_adc_setname("s3c64xx-adc");
+        s3c_fb_setname("s5p64x0-fb");
+
+        iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
+        init_consistent_dma_size(SZ_8M);
+}
+
+void __init s5p6450_map_io(void)
+{
+        /* initialize any device information early */
+        s3c_adc_setname("s3c64xx-adc");
+        s3c_fb_setname("s5p64x0-fb");
+
+        iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
+        init_consistent_dma_size(SZ_8M);
+}
+
+/*
+ * s5p64x0_init_clocks
+ *
+ * register and setup the CPU clocks
+ */
+
+void __init s5p6440_init_clocks(int xtal)
+{
+        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
+        s3c24xx_register_baseclocks(xtal);
+        s5p_register_clocks(xtal);
+        s5p6440_register_clocks();
+        s5p6440_setup_clocks();
+}
+
+void __init s5p6450_init_clocks(int xtal)
+{
+        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
+        s3c24xx_register_baseclocks(xtal);
+        s5p_register_clocks(xtal);
+        s5p6450_register_clocks();
+        s5p6450_setup_clocks();
+}
+
+/*
+ * s5p64x0_init_irq
+ *
+ * register the CPU interrupts
+ */
+
+void __init s5p6440_init_irq(void)
+{
+        /* S5P6440 supports 2 VIC */
+        u32 vic[2];
+
+        /*
+         * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
+         * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
+         */
+        vic[0] = 0xff800ae7;
+        vic[1] = 0xffbf23e5;
+
+        s5p_init_irq(vic, ARRAY_SIZE(vic));
+}
+
+void __init s5p6450_init_irq(void)
+{
+        /* S5P6450 supports only 2 VIC */
+        u32 vic[2];
+
+        /*
+         * VIC0 is missing IRQ_VIC0[(13-15), (21-22)]
+         * VIC1 is missing IRQ VIC1[12, 14, 23]
+         */
+        vic[0] = 0xff9f1fff;
+        vic[1] = 0xff7fafff;
+
+        s5p_init_irq(vic, ARRAY_SIZE(vic));
+}
+
+struct sysdev_class s5p64x0_sysclass = {
+        .name   = "s5p64x0-core",
+};
+
+static struct sys_device s5p64x0_sysdev = {
+        .cls    = &s5p64x0_sysclass,
+};
+
+static int __init s5p64x0_core_init(void)
+{
+        return sysdev_class_register(&s5p64x0_sysclass);
+}
+core_initcall(s5p64x0_core_init);
+
+int __init s5p64x0_init(void)
+{
+        printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
+
+        /* set idle function */
+        pm_idle = s5p64x0_idle;
+
+        return sysdev_register(&s5p64x0_sysdev);
+}
+
+/* uart registration process */
+void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        int uart;
+
+        for (uart = 0; uart < no; uart++) {
+                s5p_uart_resources[uart].resources->start = S5P6440_PA_UART(uart);
+                s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART;
+        }
+
+        s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
+}
+
+void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
+}
+
+#define eint_offset(irq)        ((irq) - IRQ_EINT(0))
+
+static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type)
+{
+        int offs = eint_offset(data->irq);
+        int shift;
+        u32 ctrl, mask;
+        u32 newvalue = 0;
+
+        if (offs > 15)
+                return -EINVAL;
+
+        switch (type) {
+        case IRQ_TYPE_NONE:
+                printk(KERN_WARNING "No edge setting!\n");
+                break;
+        case IRQ_TYPE_EDGE_RISING:
+                newvalue = S3C2410_EXTINT_RISEEDGE;
+                break;
+        case IRQ_TYPE_EDGE_FALLING:
+                newvalue = S3C2410_EXTINT_FALLEDGE;
+                break;
+        case IRQ_TYPE_EDGE_BOTH:
+                newvalue = S3C2410_EXTINT_BOTHEDGE;
+                break;
+        case IRQ_TYPE_LEVEL_LOW:
+                newvalue = S3C2410_EXTINT_LOWLEV;
+                break;
+        case IRQ_TYPE_LEVEL_HIGH:
+                newvalue = S3C2410_EXTINT_HILEV;
+                break;
+        default:
+                printk(KERN_ERR "No such irq type %d", type);
+                return -EINVAL;
+        }
+
+        shift = (offs / 2) * 4;
+        mask = 0x7 << shift;
+
+        ctrl = __raw_readl(S5P64X0_EINT0CON0) & ~mask;
+        ctrl |= newvalue << shift;
+        __raw_writel(ctrl, S5P64X0_EINT0CON0);
+
+        /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
+        if (soc_is_s5p6450())
+                s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2));
+        else
+                s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2));
+
+        return 0;
+}
+
+/*
+ * s5p64x0_irq_demux_eint
+ *
+ * This function demuxes the IRQ from the group0 external interrupts,
+ * from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into
+ * the specific handlers s5p64x0_irq_demux_eintX_Y.
+ */
+static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end)
+{
+        u32 status = __raw_readl(S5P64X0_EINT0PEND);
+        u32 mask = __raw_readl(S5P64X0_EINT0MASK);
+        unsigned int irq;
+
+        status &= ~mask;
+        status >>= start;
+        status &= (1 << (end - start + 1)) - 1;
+
+        for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) {
+                if (status & 1)
+                        generic_handle_irq(irq);
+                status >>= 1;
+        }
+}
+
+static void s5p64x0_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc)
+{
+        s5p64x0_irq_demux_eint(0, 3);
+}
+
+static void s5p64x0_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc)
+{
+        s5p64x0_irq_demux_eint(4, 11);
+}
+
+static void s5p64x0_irq_demux_eint12_15(unsigned int irq,
+                                        struct irq_desc *desc)
+{
+        s5p64x0_irq_demux_eint(12, 15);
+}
+
+static int s5p64x0_alloc_gc(void)
+{
+        struct irq_chip_generic *gc;
+        struct irq_chip_type *ct;
+
+        gc = irq_alloc_generic_chip("s5p64x0-eint", 1, S5P_IRQ_EINT_BASE,
+                                    S5P_VA_GPIO, handle_level_irq);
+        if (!gc) {
+                printk(KERN_ERR "%s: irq_alloc_generic_chip for group 0"
+                        "external interrupts failed\n", __func__);
+                return -EINVAL;
+        }
+
+        ct = gc->chip_types;
+        ct->chip.irq_ack = irq_gc_ack_set_bit;
+        ct->chip.irq_mask = irq_gc_mask_set_bit;
+        ct->chip.irq_unmask = irq_gc_mask_clr_bit;
+        ct->chip.irq_set_type = s5p64x0_irq_eint_set_type;
+        ct->chip.irq_set_wake = s3c_irqext_wake;
+        ct->regs.ack = EINT0PEND_OFFSET;
+        ct->regs.mask = EINT0MASK_OFFSET;
+        irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE,
+                               IRQ_NOREQUEST | IRQ_NOPROBE, 0);
+        return 0;
+}
+
+static int __init s5p64x0_init_irq_eint(void)
+{
+        int ret = s5p64x0_alloc_gc();
+        irq_set_chained_handler(IRQ_EINT0_3, s5p64x0_irq_demux_eint0_3);
+        irq_set_chained_handler(IRQ_EINT4_11, s5p64x0_irq_demux_eint4_11);
+        irq_set_chained_handler(IRQ_EINT12_15, s5p64x0_irq_demux_eint12_15);
+
+        return ret;
+}
+arch_initcall(s5p64x0_init_irq_eint);
+
+void s5p64x0_restart(char mode, const char *cmd)
+{
+        if (mode != 's')
+                arch_wdt_reset();
+
+        soft_restart(0);
+}
diff --git a/arch/arm/mach-s5p64x0/common.h b/arch/arm/mach-s5p64x0/common.h
new file mode 100644
index 000000000000..f8a60fdc5884
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/common.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Common Header for S5P64X0 machines
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_S5P64X0_COMMON_H
+#define __ARCH_ARM_MACH_S5P64X0_COMMON_H
+
+void s5p6440_init_irq(void);
+void s5p6450_init_irq(void);
+void s5p64x0_init_io(struct map_desc *mach_desc, int size);
+
+void s5p6440_register_clocks(void);
+void s5p6440_setup_clocks(void);
+
+void s5p6450_register_clocks(void);
+void s5p6450_setup_clocks(void);
+
+void s5p64x0_restart(char mode, const char *cmd);
+
+#ifdef CONFIG_CPU_S5P6440
+
+extern  int s5p64x0_init(void);
+extern void s5p6440_map_io(void);
+extern void s5p6440_init_clocks(int xtal);
+
+extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+
+#else
+#define s5p6440_init_clocks NULL
+#define s5p6440_init_uarts NULL
+#define s5p6440_map_io NULL
+#define s5p64x0_init NULL
+#endif
+
+#ifdef CONFIG_CPU_S5P6450
+
+extern  int s5p64x0_init(void);
+extern void s5p6450_map_io(void);
+extern void s5p6450_init_clocks(int xtal);
+
+extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+
+#else
+#define s5p6450_init_clocks NULL
+#define s5p6450_init_uarts NULL
+#define s5p6450_map_io NULL
+#define s5p64x0_init NULL
+#endif
+
+#endif /* __ARCH_ARM_MACH_S5P64X0_COMMON_H */
diff --git a/arch/arm/mach-s5p64x0/cpu.c b/arch/arm/mach-s5p64x0/cpu.c
deleted file mode 100644
index ecab40cf19ab..000000000000
--- a/arch/arm/mach-s5p64x0/cpu.c
+++ /dev/null
@@ -1,215 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/cpu.c
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/list.h>
-#include <linux/timer.h>
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/sysdev.h>
-#include <linux/serial_core.h>
-#include <linux/platform_device.h>
-#include <linux/sched.h>
-#include <linux/dma-mapping.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-#include <asm/proc-fns.h>
-#include <asm/irq.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-#include <mach/regs-clock.h>
-
-#include <plat/regs-serial.h>
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/clock.h>
-#include <plat/s5p6440.h>
-#include <plat/s5p6450.h>
-#include <plat/adc-core.h>
-#include <plat/fb-core.h>
-
-/* Initial IO mappings */
-
-static struct map_desc s5p64x0_iodesc[] __initdata = {
-        {
-                .virtual        = (unsigned long)S5P_VA_GPIO,
-                .pfn            = __phys_to_pfn(S5P64X0_PA_GPIO),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)VA_VIC0,
-                .pfn            = __phys_to_pfn(S5P64X0_PA_VIC0),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)VA_VIC1,
-                .pfn            = __phys_to_pfn(S5P64X0_PA_VIC1),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        },
-};
-
-static struct map_desc s5p6440_iodesc[] __initdata = {
-        {
-                .virtual        = (unsigned long)S3C_VA_UART,
-                .pfn            = __phys_to_pfn(S5P6440_PA_UART(0)),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        },
-};
-
-static struct map_desc s5p6450_iodesc[] __initdata = {
-        {
-                .virtual        = (unsigned long)S3C_VA_UART,
-                .pfn            = __phys_to_pfn(S5P6450_PA_UART(0)),
-                .length         = SZ_512K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_UART + SZ_512K,
-                .pfn            = __phys_to_pfn(S5P6450_PA_UART(5)),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        },
-};
-
-static void s5p64x0_idle(void)
-{
-        unsigned long val;
-
-        if (!need_resched()) {
-                val = __raw_readl(S5P64X0_PWR_CFG);
-                val &= ~(0x3 << 5);
-                val |= (0x1 << 5);
-                __raw_writel(val, S5P64X0_PWR_CFG);
-
-                cpu_do_idle();
-        }
-        local_irq_enable();
-}
-
-/*
- * s5p64x0_map_io
- *
- * register the standard CPU IO areas
- */
-
-void __init s5p6440_map_io(void)
-{
-        /* initialize any device information early */
-        s3c_adc_setname("s3c64xx-adc");
-        s3c_fb_setname("s5p64x0-fb");
-
-        iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
-        iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
-        init_consistent_dma_size(SZ_8M);
-}
-
-void __init s5p6450_map_io(void)
-{
-        /* initialize any device information early */
-        s3c_adc_setname("s3c64xx-adc");
-        s3c_fb_setname("s5p64x0-fb");
-
-        iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
-        iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
-        init_consistent_dma_size(SZ_8M);
-}
-
-/*
- * s5p64x0_init_clocks
- *
- * register and setup the CPU clocks
- */
-
-void __init s5p6440_init_clocks(int xtal)
-{
-        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
-
-        s3c24xx_register_baseclocks(xtal);
-        s5p_register_clocks(xtal);
-        s5p6440_register_clocks();
-        s5p6440_setup_clocks();
-}
-
-void __init s5p6450_init_clocks(int xtal)
-{
-        printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
-
-        s3c24xx_register_baseclocks(xtal);
-        s5p_register_clocks(xtal);
-        s5p6450_register_clocks();
-        s5p6450_setup_clocks();
-}
-
-/*
- * s5p64x0_init_irq
- *
- * register the CPU interrupts
- */
-
-void __init s5p6440_init_irq(void)
-{
-        /* S5P6440 supports 2 VIC */
-        u32 vic[2];
-
-        /*
-         * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
-         * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
-         */
-        vic[0] = 0xff800ae7;
-        vic[1] = 0xffbf23e5;
-
-        s5p_init_irq(vic, ARRAY_SIZE(vic));
-}
-
-void __init s5p6450_init_irq(void)
-{
-        /* S5P6450 supports only 2 VIC */
-        u32 vic[2];
-
-        /*
-         * VIC0 is missing IRQ_VIC0[(13-15), (21-22)]
-         * VIC1 is missing IRQ VIC1[12, 14, 23]
-         */
-        vic[0] = 0xff9f1fff;
-        vic[1] = 0xff7fafff;
-
-        s5p_init_irq(vic, ARRAY_SIZE(vic));
-}
-
-struct sysdev_class s5p64x0_sysclass = {
-        .name   = "s5p64x0-core",
-};
-
-static struct sys_device s5p64x0_sysdev = {
-        .cls    = &s5p64x0_sysclass,
-};
-
-static int __init s5p64x0_core_init(void)
-{
-        return sysdev_class_register(&s5p64x0_sysclass);
-}
-core_initcall(s5p64x0_core_init);
-
-int __init s5p64x0_init(void)
-{
-        printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
-
-        /* set idle function */
-        pm_idle = s5p64x0_idle;
-
-        return sysdev_register(&s5p64x0_sysdev);
-}
diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c
deleted file mode 100644
index 1fd9c79c7dbc..000000000000
--- a/arch/arm/mach-s5p64x0/dev-spi.c
+++ /dev/null
@@ -1,224 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/dev-spi.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Copyright (C) 2010 Samsung Electronics Co. Ltd.
- *      Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/gpio.h>
-
-#include <mach/dma.h>
-#include <mach/map.h>
-#include <mach/irqs.h>
-#include <mach/regs-clock.h>
-#include <mach/spi-clocks.h>
-
-#include <plat/cpu.h>
-#include <plat/s3c64xx-spi.h>
-#include <plat/gpio-cfg.h>
-
-static char *s5p64x0_spi_src_clks[] = {
-        [S5P64X0_SPI_SRCCLK_PCLK] = "pclk",
-        [S5P64X0_SPI_SRCCLK_SCLK] = "sclk_spi",
-};
-
-/* SPI Controller platform_devices */
-
-/* Since we emulate multi-cs capability, we do not touch the CS.
- * The emulated CS is toggled by board specific mechanism, as it can
- * be either some immediate GPIO or some signal out of some other
- * chip in between ... or some yet another way.
- * We simply do not assume anything about CS.
- */
-static int s5p6440_spi_cfg_gpio(struct platform_device *pdev)
-{
-        unsigned int base;
-
-        switch (pdev->id) {
-        case 0:
-                base = S5P6440_GPC(0);
-                break;
-
-        case 1:
-                base = S5P6440_GPC(4);
-                break;
-
-        default:
-                dev_err(&pdev->dev, "Invalid SPI Controller number!");
-                return -EINVAL;
-        }
-
-        s3c_gpio_cfgall_range(base, 3,
-                              S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
-
-        return 0;
-}
-
-static int s5p6450_spi_cfg_gpio(struct platform_device *pdev)
-{
-        unsigned int base;
-
-        switch (pdev->id) {
-        case 0:
-                base = S5P6450_GPC(0);
-                break;
-
-        case 1:
-                base = S5P6450_GPC(4);
-                break;
-
-        default:
-                dev_err(&pdev->dev, "Invalid SPI Controller number!");
-                return -EINVAL;
-        }
-
-        s3c_gpio_cfgall_range(base, 3,
-                              S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
-
-        return 0;
-}
-
-static struct resource s5p64x0_spi0_resource[] = {
-        [0] = {
-                .start  = S5P64X0_PA_SPI0,
-                .end    = S5P64X0_PA_SPI0 + 0x100 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = DMACH_SPI0_TX,
-                .end    = DMACH_SPI0_TX,
-                .flags  = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start  = DMACH_SPI0_RX,
-                .end    = DMACH_SPI0_RX,
-                .flags  = IORESOURCE_DMA,
-        },
-        [3] = {
-                .start  = IRQ_SPI0,
-                .end    = IRQ_SPI0,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct s3c64xx_spi_info s5p6440_spi0_pdata = {
-        .cfg_gpio       = s5p6440_spi_cfg_gpio,
-        .fifo_lvl_mask  = 0x1ff,
-        .rx_lvl_offset  = 15,
-        .tx_st_done     = 25,
-};
-
-static struct s3c64xx_spi_info s5p6450_spi0_pdata = {
-        .cfg_gpio       = s5p6450_spi_cfg_gpio,
-        .fifo_lvl_mask  = 0x1ff,
-        .rx_lvl_offset  = 15,
-        .tx_st_done     = 25,
-};
-
-static u64 spi_dmamask = DMA_BIT_MASK(32);
-
-struct platform_device s5p64x0_device_spi0 = {
-        .name           = "s3c64xx-spi",
-        .id             = 0,
-        .num_resources  = ARRAY_SIZE(s5p64x0_spi0_resource),
-        .resource       = s5p64x0_spi0_resource,
-        .dev = {
-                .dma_mask               = &spi_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        },
-};
-
-static struct resource s5p64x0_spi1_resource[] = {
-        [0] = {
-                .start  = S5P64X0_PA_SPI1,
-                .end    = S5P64X0_PA_SPI1 + 0x100 - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = DMACH_SPI1_TX,
-                .end    = DMACH_SPI1_TX,
-                .flags  = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start  = DMACH_SPI1_RX,
-                .end    = DMACH_SPI1_RX,
-                .flags  = IORESOURCE_DMA,
-        },
-        [3] = {
-                .start  = IRQ_SPI1,
-                .end    = IRQ_SPI1,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct s3c64xx_spi_info s5p6440_spi1_pdata = {
-        .cfg_gpio       = s5p6440_spi_cfg_gpio,
-        .fifo_lvl_mask  = 0x7f,
-        .rx_lvl_offset  = 15,
-        .tx_st_done     = 25,
-};
-
-static struct s3c64xx_spi_info s5p6450_spi1_pdata = {
-        .cfg_gpio       = s5p6450_spi_cfg_gpio,
-        .fifo_lvl_mask  = 0x7f,
-        .rx_lvl_offset  = 15,
-        .tx_st_done     = 25,
-};
-
-struct platform_device s5p64x0_device_spi1 = {
-        .name           = "s3c64xx-spi",
-        .id             = 1,
-        .num_resources  = ARRAY_SIZE(s5p64x0_spi1_resource),
-        .resource       = s5p64x0_spi1_resource,
-        .dev = {
-                .dma_mask               = &spi_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        },
-};
-
-void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
-{
-        struct s3c64xx_spi_info *pd;
-
-        /* Reject invalid configuration */
-        if (!num_cs || src_clk_nr < 0
-                        || src_clk_nr > S5P64X0_SPI_SRCCLK_SCLK) {
-                printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
-                return;
-        }
-
-        switch (cntrlr) {
-        case 0:
-                if (soc_is_s5p6450())
-                        pd = &s5p6450_spi0_pdata;
-                else
-                        pd = &s5p6440_spi0_pdata;
-
-                s5p64x0_device_spi0.dev.platform_data = pd;
-                break;
-        case 1:
-                if (soc_is_s5p6450())
-                        pd = &s5p6450_spi1_pdata;
-                else
-                        pd = &s5p6440_spi1_pdata;
-
-                s5p64x0_device_spi1.dev.platform_data = pd;
-                break;
-        default:
-                printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
-                                                        __func__, cntrlr);
-                return;
-        }
-
-        pd->num_cs = num_cs;
-        pd->src_clk_nr = src_clk_nr;
-        pd->src_clk_name = s5p64x0_spi_src_clks[src_clk_nr];
-}
diff --git a/arch/arm/mach-s5p64x0/dma.c b/arch/arm/mach-s5p64x0/dma.c
index 442dd4ad12da..f820c0744405 100644
--- a/arch/arm/mach-s5p64x0/dma.c
+++ b/arch/arm/mach-s5p64x0/dma.c
@@ -38,176 +38,74 @@
 
 static u64 dma_dmamask = DMA_BIT_MASK(32);
 
-struct dma_pl330_peri s5p6440_pdma_peri[22] = {
-        {
-                .peri_id = (u8)DMACH_UART0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART2_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART2_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART3_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART3_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = DMACH_MAX,
-        }, {
-                .peri_id = DMACH_MAX,
-        }, {
-                .peri_id = (u8)DMACH_PCM0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_PCM0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_I2S0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SPI0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SPI0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_MAX,
-        }, {
-                .peri_id = (u8)DMACH_MAX,
-        }, {
-                .peri_id = (u8)DMACH_MAX,
-        }, {
-                .peri_id = (u8)DMACH_MAX,
-        }, {
-                .peri_id = (u8)DMACH_SPI1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SPI1_RX,
-                .rqtype = DEVTOMEM,
-        },
+u8 s5p6440_pdma_peri[] = {
+        DMACH_UART0_RX,
+        DMACH_UART0_TX,
+        DMACH_UART1_RX,
+        DMACH_UART1_TX,
+        DMACH_UART2_RX,
+        DMACH_UART2_TX,
+        DMACH_UART3_RX,
+        DMACH_UART3_TX,
+        DMACH_MAX,
+        DMACH_MAX,
+        DMACH_PCM0_TX,
+        DMACH_PCM0_RX,
+        DMACH_I2S0_TX,
+        DMACH_I2S0_RX,
+        DMACH_SPI0_TX,
+        DMACH_SPI0_RX,
+        DMACH_MAX,
+        DMACH_MAX,
+        DMACH_MAX,
+        DMACH_MAX,
+        DMACH_SPI1_TX,
+        DMACH_SPI1_RX,
 };
 
 struct dma_pl330_platdata s5p6440_pdma_pdata = {
         .nr_valid_peri = ARRAY_SIZE(s5p6440_pdma_peri),
-        .peri = s5p6440_pdma_peri,
+        .peri_id = s5p6440_pdma_peri,
 };
 
-struct dma_pl330_peri s5p6450_pdma_peri[32] = {
-        {
-                .peri_id = (u8)DMACH_UART0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART2_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART2_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART3_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART3_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART4_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART4_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_PCM0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_PCM0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_I2S0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SPI0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SPI0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_PCM1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_PCM1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_PCM2_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_PCM2_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SPI1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SPI1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_USI_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_USI_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_MAX,
-        }, {
-                .peri_id = (u8)DMACH_I2S1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_I2S2_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S2_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_PWM,
-        }, {
-                .peri_id = (u8)DMACH_UART5_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART5_TX,
-                .rqtype = MEMTODEV,
-        },
+u8 s5p6450_pdma_peri[] = {
+        DMACH_UART0_RX,
+        DMACH_UART0_TX,
+        DMACH_UART1_RX,
+        DMACH_UART1_TX,
+        DMACH_UART2_RX,
+        DMACH_UART2_TX,
+        DMACH_UART3_RX,
+        DMACH_UART3_TX,
+        DMACH_UART4_RX,
+        DMACH_UART4_TX,
+        DMACH_PCM0_TX,
+        DMACH_PCM0_RX,
+        DMACH_I2S0_TX,
+        DMACH_I2S0_RX,
+        DMACH_SPI0_TX,
+        DMACH_SPI0_RX,
+        DMACH_PCM1_TX,
+        DMACH_PCM1_RX,
+        DMACH_PCM2_TX,
+        DMACH_PCM2_RX,
+        DMACH_SPI1_TX,
+        DMACH_SPI1_RX,
+        DMACH_USI_TX,
+        DMACH_USI_RX,
+        DMACH_MAX,
+        DMACH_I2S1_TX,
+        DMACH_I2S1_RX,
+        DMACH_I2S2_TX,
+        DMACH_I2S2_RX,
+        DMACH_PWM,
+        DMACH_UART5_RX,
+        DMACH_UART5_TX,
 };
 
 struct dma_pl330_platdata s5p6450_pdma_pdata = {
         .nr_valid_peri = ARRAY_SIZE(s5p6450_pdma_peri),
-        .peri = s5p6450_pdma_peri,
+        .peri_id = s5p6450_pdma_peri,
 };
 
 struct amba_device s5p64x0_device_pdma = {
@@ -227,10 +125,15 @@ struct amba_device s5p64x0_device_pdma = {
 
 static int __init s5p64x0_dma_init(void)
 {
-        if (soc_is_s5p6450())
+        if (soc_is_s5p6450()) {
+                dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask);
+                dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask);
                 s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata;
-        else
+        } else {
+                dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask);
+                dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask);
                 s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata;
+        }
 
         amba_device_register(&s5p64x0_device_pdma, &iomem_resource);
 
diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h
index 53982db9d259..5b845e849b30 100644
--- a/arch/arm/mach-s5p64x0/include/mach/irqs.h
+++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h
@@ -141,6 +141,8 @@
 
 #define IRQ_EINT_GROUP(grp, x)  (IRQ_EINT_GROUP##grp##_BASE + (x))
 
+#define IRQ_TIMER_BASE          (11)
+
 /* Set the default NR_IRQS */
 
 #define NR_IRQS                 (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h
index 4d3ac8a3709d..0c0175dbfa34 100644
--- a/arch/arm/mach-s5p64x0/include/mach/map.h
+++ b/arch/arm/mach-s5p64x0/include/mach/map.h
@@ -67,6 +67,8 @@
 #define S3C_PA_RTC              S5P64X0_PA_RTC
 #define S3C_PA_WDT              S5P64X0_PA_WDT
 #define S3C_PA_FB               S5P64X0_PA_FB
+#define S3C_PA_SPI0             S5P64X0_PA_SPI0
+#define S3C_PA_SPI1             S5P64X0_PA_SPI1
 
 #define S5P_PA_CHIPID           S5P64X0_PA_CHIPID
 #define S5P_PA_SROMC            S5P64X0_PA_SROMC
diff --git a/arch/arm/mach-s5p64x0/include/mach/system.h b/arch/arm/mach-s5p64x0/include/mach/system.h
index 60f57532c970..cf26e0954a2f 100644
--- a/arch/arm/mach-s5p64x0/include/mach/system.h
+++ b/arch/arm/mach-s5p64x0/include/mach/system.h
@@ -13,8 +13,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H __FILE__
 
-#include <plat/system-reset.h>
-
 static void arch_idle(void)
 {
         /* nothing here yet */
diff --git a/arch/arm/mach-s5p64x0/init.c b/arch/arm/mach-s5p64x0/init.c
deleted file mode 100644
index 79833caf8165..000000000000
--- a/arch/arm/mach-s5p64x0/init.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/init.c
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * S5P64X0 - Init support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/serial_core.h>
-
-#include <mach/map.h>
-
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/s5p6440.h>
-#include <plat/s5p6450.h>
-#include <plat/regs-serial.h>
-
-static struct s3c24xx_uart_clksrc s5p64x0_serial_clocks[] = {
-        [0] = {
-                .name           = "pclk_low",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        },
-        [1] = {
-                .name           = "uclk1",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        },
-};
-
-/* uart registration process */
-
-void __init s5p64x0_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        struct s3c2410_uartcfg *tcfg = cfg;
-        u32 ucnt;
-
-        for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
-                if (!tcfg->clocks) {
-                        tcfg->clocks = s5p64x0_serial_clocks;
-                        tcfg->clocks_size = ARRAY_SIZE(s5p64x0_serial_clocks);
-                }
-        }
-}
-
-void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        int uart;
-
-        for (uart = 0; uart < no; uart++) {
-                s5p_uart_resources[uart].resources->start = S5P6440_PA_UART(uart);
-                s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART;
-        }
-
-        s5p64x0_common_init_uarts(cfg, no);
-        s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
-}
-
-void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        s5p64x0_common_init_uarts(cfg, no);
-        s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
-}
diff --git a/arch/arm/mach-s5p64x0/irq-eint.c b/arch/arm/mach-s5p64x0/irq-eint.c
deleted file mode 100644
index 275dc74f4a7b..000000000000
--- a/arch/arm/mach-s5p64x0/irq-eint.c
+++ /dev/null
@@ -1,155 +0,0 @@
-/* arch/arm/mach-s5p64x0/irq-eint.c
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd
- *              http://www.samsung.com/
- *
- * Based on linux/arch/arm/mach-s3c64xx/irq-eint.c
- *
- * S5P64X0 - Interrupt handling for External Interrupts.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/gpio.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-
-#include <plat/cpu.h>
-#include <plat/regs-irqtype.h>
-#include <plat/gpio-cfg.h>
-#include <plat/pm.h>
-
-#include <mach/regs-gpio.h>
-#include <mach/regs-clock.h>
-
-#define eint_offset(irq)        ((irq) - IRQ_EINT(0))
-
-static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type)
-{
-        int offs = eint_offset(data->irq);
-        int shift;
-        u32 ctrl, mask;
-        u32 newvalue = 0;
-
-        if (offs > 15)
-                return -EINVAL;
-
-        switch (type) {
-        case IRQ_TYPE_NONE:
-                printk(KERN_WARNING "No edge setting!\n");
-                break;
-        case IRQ_TYPE_EDGE_RISING:
-                newvalue = S3C2410_EXTINT_RISEEDGE;
-                break;
-        case IRQ_TYPE_EDGE_FALLING:
-                newvalue = S3C2410_EXTINT_FALLEDGE;
-                break;
-        case IRQ_TYPE_EDGE_BOTH:
-                newvalue = S3C2410_EXTINT_BOTHEDGE;
-                break;
-        case IRQ_TYPE_LEVEL_LOW:
-                newvalue = S3C2410_EXTINT_LOWLEV;
-                break;
-        case IRQ_TYPE_LEVEL_HIGH:
-                newvalue = S3C2410_EXTINT_HILEV;
-                break;
-        default:
-                printk(KERN_ERR "No such irq type %d", type);
-                return -EINVAL;
-        }
-
-        shift = (offs / 2) * 4;
-        mask = 0x7 << shift;
-
-        ctrl = __raw_readl(S5P64X0_EINT0CON0) & ~mask;
-        ctrl |= newvalue << shift;
-        __raw_writel(ctrl, S5P64X0_EINT0CON0);
-
-        /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
-        if (soc_is_s5p6450())
-                s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2));
-        else
-                s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2));
-
-        return 0;
-}
-
-/*
- * s5p64x0_irq_demux_eint
- *
- * This function demuxes the IRQ from the group0 external interrupts,
- * from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into
- * the specific handlers s5p64x0_irq_demux_eintX_Y.
- */
-static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end)
-{
-        u32 status = __raw_readl(S5P64X0_EINT0PEND);
-        u32 mask = __raw_readl(S5P64X0_EINT0MASK);
-        unsigned int irq;
-
-        status &= ~mask;
-        status >>= start;
-        status &= (1 << (end - start + 1)) - 1;
-
-        for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) {
-                if (status & 1)
-                        generic_handle_irq(irq);
-                status >>= 1;
-        }
-}
-
-static void s5p64x0_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc)
-{
-        s5p64x0_irq_demux_eint(0, 3);
-}
-
-static void s5p64x0_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc)
-{
-        s5p64x0_irq_demux_eint(4, 11);
-}
-
-static void s5p64x0_irq_demux_eint12_15(unsigned int irq,
-                                        struct irq_desc *desc)
-{
-        s5p64x0_irq_demux_eint(12, 15);
-}
-
-static int s5p64x0_alloc_gc(void)
-{
-        struct irq_chip_generic *gc;
-        struct irq_chip_type *ct;
-
-        gc = irq_alloc_generic_chip("s5p64x0-eint", 1, S5P_IRQ_EINT_BASE,
-                                    S5P_VA_GPIO, handle_level_irq);
-        if (!gc) {
-                printk(KERN_ERR "%s: irq_alloc_generic_chip for group 0"
-                        "external interrupts failed\n", __func__);
-                return -EINVAL;
-        }
-
-        ct = gc->chip_types;
-        ct->chip.irq_ack = irq_gc_ack_set_bit;
-        ct->chip.irq_mask = irq_gc_mask_set_bit;
-        ct->chip.irq_unmask = irq_gc_mask_clr_bit;
-        ct->chip.irq_set_type = s5p64x0_irq_eint_set_type;
-        ct->chip.irq_set_wake = s3c_irqext_wake;
-        ct->regs.ack = EINT0PEND_OFFSET;
-        ct->regs.mask = EINT0MASK_OFFSET;
-        irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE,
-                               IRQ_NOREQUEST | IRQ_NOPROBE, 0);
-        return 0;
-}
-
-static int __init s5p64x0_init_irq_eint(void)
-{
-        int ret = s5p64x0_alloc_gc();
-        irq_set_chained_handler(IRQ_EINT0_3, s5p64x0_irq_demux_eint0_3);
-        irq_set_chained_handler(IRQ_EINT4_11, s5p64x0_irq_demux_eint4_11);
-        irq_set_chained_handler(IRQ_EINT12_15, s5p64x0_irq_demux_eint12_15);
-
-        return ret;
-}
-arch_initcall(s5p64x0_init_irq_eint);
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index c272c3f7d6de..34d98a1dae57 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -41,7 +41,6 @@
 
 #include <plat/regs-serial.h>
 #include <plat/gpio-cfg.h>
-#include <plat/s5p6440.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
@@ -54,6 +53,8 @@
 #include <plat/fb.h>
 #include <plat/regs-fb.h>
 
+#include "common.h"
+
 #define SMDK6440_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                 S3C2410_UCON_RXILEVEL |         \
                                 S3C2410_UCON_TXIRQMODE |        \
@@ -202,7 +203,7 @@ static struct platform_pwm_backlight_data smdk6440_bl_data = {
 
 static void __init smdk6440_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
+        s5p64x0_init_io(NULL, 0);
         s3c24xx_init_clocks(12000000);
         s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs));
         s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -247,4 +248,5 @@ MACHINE_START(SMDK6440, "SMDK6440")
         .map_io         = smdk6440_map_io,
         .init_machine   = smdk6440_machine_init,
         .timer          = &s5p_timer,
+        .restart        = s5p64x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 7a4700959616..135cf5d84737 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -41,7 +41,6 @@
 
 #include <plat/regs-serial.h>
 #include <plat/gpio-cfg.h>
-#include <plat/s5p6450.h>
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
@@ -54,6 +53,8 @@
 #include <plat/fb.h>
 #include <plat/regs-fb.h>
 
+#include "common.h"
+
 #define SMDK6450_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                 S3C2410_UCON_RXILEVEL |         \
                                 S3C2410_UCON_TXIRQMODE |        \
@@ -222,7 +223,7 @@ static struct platform_pwm_backlight_data smdk6450_bl_data = {
 
 static void __init smdk6450_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
+        s5p64x0_init_io(NULL, 0);
         s3c24xx_init_clocks(19200000);
         s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs));
         s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -267,4 +268,5 @@ MACHINE_START(SMDK6450, "SMDK6450")
         .map_io         = smdk6450_map_io,
         .init_machine   = smdk6450_machine_init,
         .timer          = &s5p_timer,
+        .restart        = s5p64x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s5p64x0/setup-spi.c b/arch/arm/mach-s5p64x0/setup-spi.c
new file mode 100644
index 000000000000..e9b841240352
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/setup-spi.c
@@ -0,0 +1,55 @@
+/* linux/arch/arm/mach-s5p64x0/setup-spi.c
+ *
+ * Copyright (C) 2011 Samsung Electronics Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+
+#include <plat/gpio-cfg.h>
+#include <plat/cpu.h>
+#include <plat/s3c64xx-spi.h>
+
+#ifdef CONFIG_S3C64XX_DEV_SPI0
+struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = {
+        .fifo_lvl_mask  = 0x1ff,
+        .rx_lvl_offset  = 15,
+        .tx_st_done     = 25,
+};
+
+int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
+{
+        if (soc_is_s5p6450())
+                s3c_gpio_cfgall_range(S5P6450_GPC(0), 3,
+                                        S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
+        else
+                s3c_gpio_cfgall_range(S5P6440_GPC(0), 3,
+                                        S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
+        return 0;
+}
+#endif
+
+#ifdef CONFIG_S3C64XX_DEV_SPI1
+struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = {
+        .fifo_lvl_mask  = 0x7f,
+        .rx_lvl_offset  = 15,
+        .tx_st_done     = 25,
+};
+
+int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
+{
+        if (soc_is_s5p6450())
+                s3c_gpio_cfgall_range(S5P6450_GPC(4), 3,
+                                        S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
+        else
+                s3c_gpio_cfgall_range(S5P6440_GPC(4), 3,
+                                        S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
+        return 0;
+}
+#endif
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
index e538a4c67e9c..75a26eaf2633 100644
--- a/arch/arm/mach-s5pc100/Kconfig
+++ b/arch/arm/mach-s5pc100/Kconfig
@@ -45,6 +45,11 @@ config S5PC100_SETUP_SDHCI_GPIO
         help
           Common setup code for SDHCI gpio.
 
+config S5PC100_SETUP_SPI
+        bool
+        help
+          Common setup code for SPI GPIO configurations.
+
 config MACH_SMDKC100
         bool "SMDKC100"
         select CPU_S5PC100
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile
index a5e6e608b498..118c711f74e8 100644
--- a/arch/arm/mach-s5pc100/Makefile
+++ b/arch/arm/mach-s5pc100/Makefile
@@ -9,28 +9,24 @@ obj-m				:=
 obj-n                           :=
 obj-                            :=
 
-# Core support for S5PC100 system
+# Core
 
-obj-$(CONFIG_CPU_S5PC100)       += cpu.o init.o clock.o
-obj-$(CONFIG_CPU_S5PC100)       += setup-i2c0.o
-obj-$(CONFIG_CPU_S5PC100)       += dma.o
+obj-y                           += common.o clock.o
 
-# Helper and device support
-
-obj-$(CONFIG_S5PC100_SETUP_FB_24BPP)    += setup-fb-24bpp.o
-obj-$(CONFIG_S5PC100_SETUP_I2C1)        += setup-i2c1.o
-obj-$(CONFIG_S5PC100_SETUP_IDE)         += setup-ide.o
-obj-$(CONFIG_S5PC100_SETUP_KEYPAD)      += setup-keypad.o
-obj-$(CONFIG_S5PC100_SETUP_SDHCI)       += setup-sdhci.o
-obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO)  += setup-sdhci-gpio.o
-
-# device support
-obj-y                           += dev-audio.o
-obj-$(CONFIG_S3C64XX_DEV_SPI)   += dev-spi.o
+obj-y                           += dma.o
 
 # machine support
 
 obj-$(CONFIG_MACH_SMDKC100)     += mach-smdkc100.o
 
 # device support
+
 obj-y                           += dev-audio.o
+
+obj-y                                   += setup-i2c0.o
+obj-$(CONFIG_S5PC100_SETUP_FB_24BPP)    += setup-fb-24bpp.o
+obj-$(CONFIG_S5PC100_SETUP_I2C1)        += setup-i2c1.o
+obj-$(CONFIG_S5PC100_SETUP_IDE)         += setup-ide.o
+obj-$(CONFIG_S5PC100_SETUP_KEYPAD)      += setup-keypad.o
+obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO)  += setup-sdhci-gpio.o
+obj-$(CONFIG_S5PC100_SETUP_SPI)         += setup-spi.o
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c
index 8d47709da713..247194dd366c 100644
--- a/arch/arm/mach-s5pc100/clock.c
+++ b/arch/arm/mach-s5pc100/clock.c
@@ -27,7 +27,8 @@
 #include <plat/pll.h>
 #include <plat/s5p-clock.h>
 #include <plat/clock-clksrc.h>
-#include <plat/s5pc100.h>
+
+#include "common.h"
 
 static struct clk s5p_clk_otgphy = {
         .name           = "otg_phy",
@@ -426,24 +427,6 @@ static struct clk init_clocks_off[] = {
                 .enable         = s5pc100_d0_2_ctrl,
                 .ctrlbit        = (1 << 1),
         }, {
-                .name           = "hsmmc",
-                .devname        = "s3c-sdhci.2",
-                .parent         = &clk_div_d1_bus.clk,
-                .enable         = s5pc100_d1_0_ctrl,
-                .ctrlbit        = (1 << 7),
-        }, {
-                .name           = "hsmmc",
-                .devname        = "s3c-sdhci.1",
-                .parent         = &clk_div_d1_bus.clk,
-                .enable         = s5pc100_d1_0_ctrl,
-                .ctrlbit        = (1 << 6),
-        }, {
-                .name           = "hsmmc",
-                .devname        = "s3c-sdhci.0",
-                .parent         = &clk_div_d1_bus.clk,
-                .enable         = s5pc100_d1_0_ctrl,
-                .ctrlbit        = (1 << 5),
-        }, {
                 .name           = "modemif",
                 .parent         = &clk_div_d1_bus.clk,
                 .enable         = s5pc100_d1_0_ctrl,
@@ -673,24 +656,6 @@ static struct clk init_clocks_off[] = {
                 .enable         = s5pc100_d1_5_ctrl,
                 .ctrlbit        = (1 << 8),
         }, {
-                .name           = "spi_48m",
-                .devname        = "s3c64xx-spi.0",
-                .parent         = &clk_mout_48m.clk,
-                .enable         = s5pc100_sclk0_ctrl,
-                .ctrlbit        = (1 << 7),
-        }, {
-                .name           = "spi_48m",
-                .devname        = "s3c64xx-spi.1",
-                .parent         = &clk_mout_48m.clk,
-                .enable         = s5pc100_sclk0_ctrl,
-                .ctrlbit        = (1 << 8),
-        }, {
-                .name           = "spi_48m",
-                .devname        = "s3c64xx-spi.2",
-                .parent         = &clk_mout_48m.clk,
-                .enable         = s5pc100_sclk0_ctrl,
-                .ctrlbit        = (1 << 9),
-        }, {
                 .name           = "mmc_48m",
                 .devname        = "s3c-sdhci.0",
                 .parent         = &clk_mout_48m.clk,
@@ -711,6 +676,54 @@ static struct clk init_clocks_off[] = {
         },
 };
 
+static struct clk clk_hsmmc2 = {
+        .name           = "hsmmc",
+        .devname        = "s3c-sdhci.2",
+        .parent         = &clk_div_d1_bus.clk,
+        .enable         = s5pc100_d1_0_ctrl,
+        .ctrlbit        = (1 << 7),
+};
+
+static struct clk clk_hsmmc1 = {
+        .name           = "hsmmc",
+        .devname        = "s3c-sdhci.1",
+        .parent         = &clk_div_d1_bus.clk,
+        .enable         = s5pc100_d1_0_ctrl,
+        .ctrlbit        = (1 << 6),
+};
+
+static struct clk clk_hsmmc0 = {
+        .name           = "hsmmc",
+        .devname        = "s3c-sdhci.0",
+        .parent         = &clk_div_d1_bus.clk,
+        .enable         = s5pc100_d1_0_ctrl,
+        .ctrlbit        = (1 << 5),
+};
+
+static struct clk clk_48m_spi0 = {
+        .name           = "spi_48m",
+        .devname        = "s3c64xx-spi.0",
+        .parent         = &clk_mout_48m.clk,
+        .enable         = s5pc100_sclk0_ctrl,
+        .ctrlbit        = (1 << 7),
+};
+
+static struct clk clk_48m_spi1 = {
+        .name           = "spi_48m",
+        .devname        = "s3c64xx-spi.1",
+        .parent         = &clk_mout_48m.clk,
+        .enable         = s5pc100_sclk0_ctrl,
+        .ctrlbit        = (1 << 8),
+};
+
+static struct clk clk_48m_spi2 = {
+        .name           = "spi_48m",
+        .devname        = "s3c64xx-spi.2",
+        .parent         = &clk_mout_48m.clk,
+        .enable         = s5pc100_sclk0_ctrl,
+        .ctrlbit        = (1 << 9),
+};
+
 static struct clk clk_vclk54m = {
         .name           = "vclk_54m",
         .rate           = 54000000,
@@ -929,49 +942,6 @@ static struct clksrc_clk clk_sclk_spdif = {
 static struct clksrc_clk clksrcs[] = {
         {
                 .clk    = {
-                        .name           = "sclk_spi",
-                        .devname        = "s3c64xx-spi.0",
-                        .ctrlbit        = (1 << 4),
-                        .enable         = s5pc100_sclk0_ctrl,
-
-                },
-                .sources = &clk_src_group1,
-                .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 },
-                .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 },
-        }, {
-                .clk    = {
-                        .name           = "sclk_spi",
-                        .devname        = "s3c64xx-spi.1",
-                        .ctrlbit        = (1 << 5),
-                        .enable         = s5pc100_sclk0_ctrl,
-
-                },
-                .sources = &clk_src_group1,
-                .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 },
-                .reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 },
-        }, {
-                .clk    = {
-                        .name           = "sclk_spi",
-                        .devname        = "s3c64xx-spi.2",
-                        .ctrlbit        = (1 << 6),
-                        .enable         = s5pc100_sclk0_ctrl,
-
-                },
-                .sources = &clk_src_group1,
-                .reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 2 },
-                .reg_div = { .reg = S5P_CLK_DIV2, .shift = 12, .size = 4 },
-        }, {
-                .clk    = {
-                        .name           = "uclk1",
-                        .ctrlbit        = (1 << 3),
-                        .enable         = s5pc100_sclk0_ctrl,
-
-                },
-                .sources = &clk_src_group2,
-                .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 },
-                .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 },
-        }, {
-                .clk    = {
                         .name           = "sclk_mixer",
                         .ctrlbit        = (1 << 6),
                         .enable         = s5pc100_sclk0_ctrl,
@@ -1024,39 +994,6 @@ static struct clksrc_clk clksrcs[] = {
                 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 24, .size = 4 },
         }, {
                 .clk    = {
-                        .name           = "sclk_mmc",
-                        .devname        = "s3c-sdhci.0",
-                        .ctrlbit        = (1 << 12),
-                        .enable         = s5pc100_sclk1_ctrl,
-
-                },
-                .sources = &clk_src_mmc0,
-                .reg_src = { .reg = S5P_CLK_SRC2, .shift = 0, .size = 2 },
-                .reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 },
-        }, {
-                .clk    = {
-                        .name           = "sclk_mmc",
-                        .devname        = "s3c-sdhci.1",
-                        .ctrlbit        = (1 << 13),
-                        .enable         = s5pc100_sclk1_ctrl,
-
-                },
-                .sources = &clk_src_mmc12,
-                .reg_src = { .reg = S5P_CLK_SRC2, .shift = 4, .size = 2 },
-                .reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 },
-        }, {
-                .clk    = {
-                        .name           = "sclk_mmc",
-                        .devname        = "s3c-sdhci.2",
-                        .ctrlbit        = (1 << 14),
-                        .enable         = s5pc100_sclk1_ctrl,
-
-                },
-                .sources = &clk_src_mmc12,
-                .reg_src = { .reg = S5P_CLK_SRC2, .shift = 8, .size = 2 },
-                .reg_div = { .reg = S5P_CLK_DIV3, .shift = 8, .size = 4 },
-        }, {
-                .clk    = {
                         .name           = "sclk_irda",
                         .ctrlbit        = (1 << 10),
                         .enable         = s5pc100_sclk0_ctrl,
@@ -1098,6 +1035,89 @@ static struct clksrc_clk clksrcs[] = {
         },
 };
 
+static struct clksrc_clk clk_sclk_uart = {
+        .clk    = {
+                .name           = "uclk1",
+                .ctrlbit        = (1 << 3),
+                .enable         = s5pc100_sclk0_ctrl,
+        },
+        .sources = &clk_src_group2,
+        .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 },
+        .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_mmc0 = {
+        .clk    = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.0",
+                .ctrlbit        = (1 << 12),
+                .enable         = s5pc100_sclk1_ctrl,
+        },
+        .sources = &clk_src_mmc0,
+        .reg_src = { .reg = S5P_CLK_SRC2, .shift = 0, .size = 2 },
+        .reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_mmc1 = {
+        .clk    = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.1",
+                .ctrlbit        = (1 << 13),
+                .enable         = s5pc100_sclk1_ctrl,
+        },
+        .sources = &clk_src_mmc12,
+        .reg_src = { .reg = S5P_CLK_SRC2, .shift = 4, .size = 2 },
+        .reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_mmc2 = {
+        .clk    = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.2",
+                .ctrlbit        = (1 << 14),
+                .enable         = s5pc100_sclk1_ctrl,
+        },
+        .sources = &clk_src_mmc12,
+        .reg_src = { .reg = S5P_CLK_SRC2, .shift = 8, .size = 2 },
+        .reg_div = { .reg = S5P_CLK_DIV3, .shift = 8, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_spi0 = {
+        .clk    = {
+                .name           = "sclk_spi",
+                .devname        = "s3c64xx-spi.0",
+                .ctrlbit        = (1 << 4),
+                .enable         = s5pc100_sclk0_ctrl,
+        },
+        .sources = &clk_src_group1,
+        .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 },
+        .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_spi1 = {
+        .clk    = {
+                .name           = "sclk_spi",
+                .devname        = "s3c64xx-spi.1",
+                .ctrlbit        = (1 << 5),
+                .enable         = s5pc100_sclk0_ctrl,
+        },
+        .sources = &clk_src_group1,
+        .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 },
+        .reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_spi2 = {
+        .clk    = {
+                .name           = "sclk_spi",
+                .devname        = "s3c64xx-spi.2",
+                .ctrlbit        = (1 << 6),
+                .enable         = s5pc100_sclk0_ctrl,
+        },
+        .sources = &clk_src_group1,
+        .reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 2 },
+        .reg_div = { .reg = S5P_CLK_DIV2, .shift = 12, .size = 4 },
+};
+
 /* Clock initialisation code */
 static struct clksrc_clk *sysclks[] = {
         &clk_mout_apll,
@@ -1127,6 +1147,25 @@ static struct clksrc_clk *sysclks[] = {
         &clk_sclk_spdif,
 };
 
+static struct clk *clk_cdev[] = {
+        &clk_hsmmc0,
+        &clk_hsmmc1,
+        &clk_hsmmc2,
+        &clk_48m_spi0,
+        &clk_48m_spi1,
+        &clk_48m_spi2,
+};
+
+static struct clksrc_clk *clksrc_cdev[] = {
+        &clk_sclk_uart,
+        &clk_sclk_mmc0,
+        &clk_sclk_mmc1,
+        &clk_sclk_mmc2,
+        &clk_sclk_spi0,
+        &clk_sclk_spi1,
+        &clk_sclk_spi2,
+};
+
 void __init_or_cpufreq s5pc100_setup_clocks(void)
 {
         unsigned long xtal;
@@ -1266,6 +1305,24 @@ static struct clk *clks[] __initdata = {
         &clk_pcmcdclk1,
 };
 
+static struct clk_lookup s5pc100_clk_lookup[] = {
+        CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
+        CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uart.clk),
+        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &clk_hsmmc0),
+        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &clk_hsmmc1),
+        CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.0", &clk_hsmmc2),
+        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
+        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
+        CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
+        CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
+        CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_48m_spi0),
+        CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk2", &clk_sclk_spi0.clk),
+        CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_48m_spi1),
+        CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk2", &clk_sclk_spi1.clk),
+        CLKDEV_INIT("s3c64xx-spi.2", "spi_busclk1", &clk_48m_spi2),
+        CLKDEV_INIT("s3c64xx-spi.2", "spi_busclk2", &clk_sclk_spi2.clk),
+};
+
 void __init s5pc100_register_clocks(void)
 {
         int ptr;
@@ -1277,9 +1334,16 @@ void __init s5pc100_register_clocks(void)
 
         s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
         s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
+                s3c_register_clksrc(clksrc_cdev[ptr], 1);
 
         s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
         s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
+        clkdev_add_table(s5pc100_clk_lookup, ARRAY_SIZE(s5pc100_clk_lookup));
+
+        s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
+        for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
+                s3c_disable_clocks(clk_cdev[ptr], 1);
 
         s3c24xx_register_clock(&dummy_apb_pclk);
 
diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/common.c
index fd2708e7d8a9..73594a2fcf26 100644
--- a/arch/arm/mach-s5pc100/cpu.c
+++ b/arch/arm/mach-s5pc100/common.c
@@ -1,17 +1,16 @@
-/* linux/arch/arm/mach-s5pc100/cpu.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+/*
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  *              http://www.samsung.com
  *
  * Copyright 2009 Samsung Electronics Co.
  *      Byungho Min <bhmin@samsung.com>
  *
- * Based on mach-s3c6410/cpu.c
+ * Common Codes for S5PC100
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
-*/
+ */
 
 #include <linux/kernel.h>
 #include <linux/types.h>
@@ -26,35 +25,73 @@
 #include <linux/platform_device.h>
 #include <linux/sched.h>
 
+#include <asm/irq.h>
+#include <asm/proc-fns.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
-#include <asm/proc-fns.h>
-
-#include <mach/hardware.h>
 #include <mach/map.h>
-#include <asm/irq.h>
-
-#include <plat/regs-serial.h>
+#include <mach/hardware.h>
 #include <mach/regs-clock.h>
 
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/clock.h>
-#include <plat/ata-core.h>
-#include <plat/iic-core.h>
 #include <plat/sdhci.h>
 #include <plat/adc-core.h>
-#include <plat/onenand-core.h>
+#include <plat/ata-core.h>
 #include <plat/fb-core.h>
+#include <plat/iic-core.h>
+#include <plat/onenand-core.h>
+#include <plat/regs-serial.h>
+#include <plat/watchdog-reset.h>
+
+#include "common.h"
+
+static const char name_s5pc100[] = "S5PC100";
 
-#include <plat/s5pc100.h>
+static struct cpu_table cpu_ids[] __initdata = {
+        {
+                .idcode         = S5PC100_CPU_ID,
+                .idmask         = S5PC100_CPU_MASK,
+                .map_io         = s5pc100_map_io,
+                .init_clocks    = s5pc100_init_clocks,
+                .init_uarts     = s5pc100_init_uarts,
+                .init           = s5pc100_init,
+                .name           = name_s5pc100,
+        },
+};
 
 /* Initial IO mappings */
 
 static struct map_desc s5pc100_iodesc[] __initdata = {
         {
+                .virtual        = (unsigned long)S5P_VA_CHIPID,
+                .pfn            = __phys_to_pfn(S5PC100_PA_CHIPID),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_SYS,
+                .pfn            = __phys_to_pfn(S5PC100_PA_SYSCON),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_TIMER,
+                .pfn            = __phys_to_pfn(S5PC100_PA_TIMER),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_WATCHDOG,
+                .pfn            = __phys_to_pfn(S5PC100_PA_WATCHDOG),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_SROMC,
+                .pfn            = __phys_to_pfn(S5PC100_PA_SROMC),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
                 .virtual        = (unsigned long)S5P_VA_SYSTIMER,
                 .pfn            = __phys_to_pfn(S5PC100_PA_SYSTIMER),
                 .length         = SZ_16K,
@@ -100,15 +137,27 @@ static void s5pc100_idle(void)
         local_irq_enable();
 }
 
-/* s5pc100_map_io
+/*
+ * s5pc100_map_io
  *
- * register the standard cpu IO areas
-*/
+ * register the standard CPU IO areas
+ */
 
-void __init s5pc100_map_io(void)
+void __init s5pc100_init_io(struct map_desc *mach_desc, int size)
 {
+        /* initialize the io descriptors we need for initialization */
         iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc));
+        if (mach_desc)
+                iotable_init(mach_desc, size);
+
+        /* detect cpu id and rev. */
+        s5p_init_cpu(S5P_VA_CHIPID);
 
+        s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+}
+
+void __init s5pc100_map_io(void)
+{
         /* initialise device information early */
         s5pc100_default_sdhci0();
         s5pc100_default_sdhci1();
@@ -155,7 +204,6 @@ static int __init s5pc100_core_init(void)
 {
         return sysdev_class_register(&s5pc100_sysclass);
 }
-
 core_initcall(s5pc100_core_init);
 
 int __init s5pc100_init(void)
@@ -167,3 +215,18 @@ int __init s5pc100_init(void)
 
         return sysdev_register(&s5pc100_sysdev);
 }
+
+/* uart registration process */
+
+void __init s5pc100_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
+}
+
+void s5pc100_restart(char mode, const char *cmd)
+{
+        if (mode != 's')
+                arch_wdt_reset();
+
+        soft_restart(0);
+}
diff --git a/arch/arm/mach-s5pc100/common.h b/arch/arm/mach-s5pc100/common.h
new file mode 100644
index 000000000000..9fbd3ae2b401
--- /dev/null
+++ b/arch/arm/mach-s5pc100/common.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Common Header for S5PC100 machines
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_S5PC100_COMMON_H
+#define __ARCH_ARM_MACH_S5PC100_COMMON_H
+
+void s5pc100_init_io(struct map_desc *mach_desc, int size);
+void s5pc100_init_irq(void);
+
+void s5pc100_register_clocks(void);
+void s5pc100_setup_clocks(void);
+
+void s5pc100_restart(char mode, const char *cmd);
+
+#ifdef CONFIG_CPU_S5PC100
+
+extern  int s5pc100_init(void);
+extern void s5pc100_map_io(void);
+extern void s5pc100_init_clocks(int xtal);
+extern void s5pc100_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+
+#else
+#define s5pc100_init_clocks NULL
+#define s5pc100_init_uarts NULL
+#define s5pc100_map_io NULL
+#define s5pc100_init NULL
+#endif
+
+#endif /* __ARCH_ARM_MACH_S5PC100_COMMON_H */
diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c
deleted file mode 100644
index e5d6c4dceb56..000000000000
--- a/arch/arm/mach-s5pc100/dev-spi.c
+++ /dev/null
@@ -1,227 +0,0 @@
-/* linux/arch/arm/mach-s5pc100/dev-spi.c
- *
- * Copyright (C) 2010 Samsung Electronics Co. Ltd.
- *      Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/gpio.h>
-
-#include <mach/dma.h>
-#include <mach/map.h>
-#include <mach/spi-clocks.h>
-#include <mach/irqs.h>
-
-#include <plat/s3c64xx-spi.h>
-#include <plat/gpio-cfg.h>
-#include <plat/irqs.h>
-
-static char *spi_src_clks[] = {
-        [S5PC100_SPI_SRCCLK_PCLK] = "pclk",
-        [S5PC100_SPI_SRCCLK_48M] = "spi_48m",
-        [S5PC100_SPI_SRCCLK_SPIBUS] = "spi_bus",
-};
-
-/* SPI Controller platform_devices */
-
-/* Since we emulate multi-cs capability, we do not touch the CS.
- * The emulated CS is toggled by board specific mechanism, as it can
- * be either some immediate GPIO or some signal out of some other
- * chip in between ... or some yet another way.
- * We simply do not assume anything about CS.
- */
-static int s5pc100_spi_cfg_gpio(struct platform_device *pdev)
-{
-        switch (pdev->id) {
-        case 0:
-                s3c_gpio_cfgall_range(S5PC100_GPB(0), 3,
-                                      S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
-                break;
-
-        case 1:
-                s3c_gpio_cfgall_range(S5PC100_GPB(4), 3,
-                                      S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
-                break;
-
-        case 2:
-                s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3));
-                s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP);
-                s3c_gpio_cfgall_range(S5PC100_GPB(2), 2,
-                                      S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
-                break;
-
-        default:
-                dev_err(&pdev->dev, "Invalid SPI Controller number!");
-                return -EINVAL;
-        }
-
-        return 0;
-}
-
-static struct resource s5pc100_spi0_resource[] = {
-        [0] = {
-                .start = S5PC100_PA_SPI0,
-                .end   = S5PC100_PA_SPI0 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_SPI0_TX,
-                .end   = DMACH_SPI0_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_SPI0_RX,
-                .end   = DMACH_SPI0_RX,
-                .flags = IORESOURCE_DMA,
-        },
-        [3] = {
-                .start = IRQ_SPI0,
-                .end   = IRQ_SPI0,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-
-static struct s3c64xx_spi_info s5pc100_spi0_pdata = {
-        .cfg_gpio = s5pc100_spi_cfg_gpio,
-        .fifo_lvl_mask = 0x7f,
-        .rx_lvl_offset = 13,
-        .high_speed = 1,
-        .tx_st_done = 21,
-};
-
-static u64 spi_dmamask = DMA_BIT_MASK(32);
-
-struct platform_device s5pc100_device_spi0 = {
-        .name             = "s3c64xx-spi",
-        .id               = 0,
-        .num_resources    = ARRAY_SIZE(s5pc100_spi0_resource),
-        .resource         = s5pc100_spi0_resource,
-        .dev = {
-                .dma_mask               = &spi_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                .platform_data = &s5pc100_spi0_pdata,
-        },
-};
-
-static struct resource s5pc100_spi1_resource[] = {
-        [0] = {
-                .start = S5PC100_PA_SPI1,
-                .end   = S5PC100_PA_SPI1 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_SPI1_TX,
-                .end   = DMACH_SPI1_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_SPI1_RX,
-                .end   = DMACH_SPI1_RX,
-                .flags = IORESOURCE_DMA,
-        },
-        [3] = {
-                .start = IRQ_SPI1,
-                .end   = IRQ_SPI1,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-
-static struct s3c64xx_spi_info s5pc100_spi1_pdata = {
-        .cfg_gpio = s5pc100_spi_cfg_gpio,
-        .fifo_lvl_mask = 0x7f,
-        .rx_lvl_offset = 13,
-        .high_speed = 1,
-        .tx_st_done = 21,
-};
-
-struct platform_device s5pc100_device_spi1 = {
-        .name             = "s3c64xx-spi",
-        .id               = 1,
-        .num_resources    = ARRAY_SIZE(s5pc100_spi1_resource),
-        .resource         = s5pc100_spi1_resource,
-        .dev = {
-                .dma_mask               = &spi_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                .platform_data = &s5pc100_spi1_pdata,
-        },
-};
-
-static struct resource s5pc100_spi2_resource[] = {
-        [0] = {
-                .start = S5PC100_PA_SPI2,
-                .end   = S5PC100_PA_SPI2 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_SPI2_TX,
-                .end   = DMACH_SPI2_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_SPI2_RX,
-                .end   = DMACH_SPI2_RX,
-                .flags = IORESOURCE_DMA,
-        },
-        [3] = {
-                .start = IRQ_SPI2,
-                .end   = IRQ_SPI2,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-
-static struct s3c64xx_spi_info s5pc100_spi2_pdata = {
-        .cfg_gpio = s5pc100_spi_cfg_gpio,
-        .fifo_lvl_mask = 0x7f,
-        .rx_lvl_offset = 13,
-        .high_speed = 1,
-        .tx_st_done = 21,
-};
-
-struct platform_device s5pc100_device_spi2 = {
-        .name             = "s3c64xx-spi",
-        .id               = 2,
-        .num_resources    = ARRAY_SIZE(s5pc100_spi2_resource),
-        .resource         = s5pc100_spi2_resource,
-        .dev = {
-                .dma_mask               = &spi_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                .platform_data = &s5pc100_spi2_pdata,
-        },
-};
-
-void __init s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
-{
-        struct s3c64xx_spi_info *pd;
-
-        /* Reject invalid configuration */
-        if (!num_cs || src_clk_nr < 0
-                        || src_clk_nr > S5PC100_SPI_SRCCLK_SPIBUS) {
-                printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
-                return;
-        }
-
-        switch (cntrlr) {
-        case 0:
-                pd = &s5pc100_spi0_pdata;
-                break;
-        case 1:
-                pd = &s5pc100_spi1_pdata;
-                break;
-        case 2:
-                pd = &s5pc100_spi2_pdata;
-                break;
-        default:
-                printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
-                                                        __func__, cntrlr);
-                return;
-        }
-
-        pd->num_cs = num_cs;
-        pd->src_clk_nr = src_clk_nr;
-        pd->src_clk_name = spi_src_clks[src_clk_nr];
-}
diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c
index 065a087f5a8b..c841f4d313f2 100644
--- a/arch/arm/mach-s5pc100/dma.c
+++ b/arch/arm/mach-s5pc100/dma.c
@@ -35,100 +35,42 @@
 
 static u64 dma_dmamask = DMA_BIT_MASK(32);
 
-struct dma_pl330_peri pdma0_peri[30] = {
-        {
-                .peri_id = (u8)DMACH_UART0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART2_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART2_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART3_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART3_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = DMACH_IRDA,
-        }, {
-                .peri_id = (u8)DMACH_I2S0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_I2S0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S0S_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_I2S1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S2_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_I2S2_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SPI0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SPI0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SPI1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SPI1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SPI2_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SPI2_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_AC97_MICIN,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_AC97_PCMIN,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_AC97_PCMOUT,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_EXTERNAL,
-        }, {
-                .peri_id = (u8)DMACH_PWM,
-        }, {
-                .peri_id = (u8)DMACH_SPDIF,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_HSI_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_HSI_TX,
-                .rqtype = MEMTODEV,
-        },
+u8 pdma0_peri[] = {
+        DMACH_UART0_RX,
+        DMACH_UART0_TX,
+        DMACH_UART1_RX,
+        DMACH_UART1_TX,
+        DMACH_UART2_RX,
+        DMACH_UART2_TX,
+        DMACH_UART3_RX,
+        DMACH_UART3_TX,
+        DMACH_IRDA,
+        DMACH_I2S0_RX,
+        DMACH_I2S0_TX,
+        DMACH_I2S0S_TX,
+        DMACH_I2S1_RX,
+        DMACH_I2S1_TX,
+        DMACH_I2S2_RX,
+        DMACH_I2S2_TX,
+        DMACH_SPI0_RX,
+        DMACH_SPI0_TX,
+        DMACH_SPI1_RX,
+        DMACH_SPI1_TX,
+        DMACH_SPI2_RX,
+        DMACH_SPI2_TX,
+        DMACH_AC97_MICIN,
+        DMACH_AC97_PCMIN,
+        DMACH_AC97_PCMOUT,
+        DMACH_EXTERNAL,
+        DMACH_PWM,
+        DMACH_SPDIF,
+        DMACH_HSI_RX,
+        DMACH_HSI_TX,
 };
 
 struct dma_pl330_platdata s5pc100_pdma0_pdata = {
         .nr_valid_peri = ARRAY_SIZE(pdma0_peri),
-        .peri = pdma0_peri,
+        .peri_id = pdma0_peri,
 };
 
 struct amba_device s5pc100_device_pdma0 = {
@@ -147,98 +89,42 @@ struct amba_device s5pc100_device_pdma0 = {
         .periphid = 0x00041330,
 };
 
-struct dma_pl330_peri pdma1_peri[30] = {
-        {
-                .peri_id = (u8)DMACH_UART0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART2_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART2_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART3_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART3_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = DMACH_IRDA,
-        }, {
-                .peri_id = (u8)DMACH_I2S0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_I2S0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S0S_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_I2S1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S2_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_I2S2_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SPI0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SPI0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SPI1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SPI1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SPI2_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SPI2_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_PCM0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_PCM1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_PCM1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_PCM1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_MSM_REQ0,
-        }, {
-                .peri_id = (u8)DMACH_MSM_REQ1,
-        }, {
-                .peri_id = (u8)DMACH_MSM_REQ2,
-        }, {
-                .peri_id = (u8)DMACH_MSM_REQ3,
-        },
+u8 pdma1_peri[] = {
+        DMACH_UART0_RX,
+        DMACH_UART0_TX,
+        DMACH_UART1_RX,
+        DMACH_UART1_TX,
+        DMACH_UART2_RX,
+        DMACH_UART2_TX,
+        DMACH_UART3_RX,
+        DMACH_UART3_TX,
+        DMACH_IRDA,
+        DMACH_I2S0_RX,
+        DMACH_I2S0_TX,
+        DMACH_I2S0S_TX,
+        DMACH_I2S1_RX,
+        DMACH_I2S1_TX,
+        DMACH_I2S2_RX,
+        DMACH_I2S2_TX,
+        DMACH_SPI0_RX,
+        DMACH_SPI0_TX,
+        DMACH_SPI1_RX,
+        DMACH_SPI1_TX,
+        DMACH_SPI2_RX,
+        DMACH_SPI2_TX,
+        DMACH_PCM0_RX,
+        DMACH_PCM0_TX,
+        DMACH_PCM1_RX,
+        DMACH_PCM1_TX,
+        DMACH_MSM_REQ0,
+        DMACH_MSM_REQ1,
+        DMACH_MSM_REQ2,
+        DMACH_MSM_REQ3,
 };
 
 struct dma_pl330_platdata s5pc100_pdma1_pdata = {
         .nr_valid_peri = ARRAY_SIZE(pdma1_peri),
-        .peri = pdma1_peri,
+        .peri_id = pdma1_peri,
 };
 
 struct amba_device s5pc100_device_pdma1 = {
@@ -259,7 +145,12 @@ struct amba_device s5pc100_device_pdma1 = {
 
 static int __init s5pc100_dma_init(void)
 {
+        dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask);
+        dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask);
         amba_device_register(&s5pc100_device_pdma0, &iomem_resource);
+
+        dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask);
+        dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask);
         amba_device_register(&s5pc100_device_pdma1, &iomem_resource);
 
         return 0;
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
index d2eb4757381f..2870f12c7926 100644
--- a/arch/arm/mach-s5pc100/include/mach/irqs.h
+++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
@@ -97,6 +97,8 @@
 #define IRQ_SDMFIQ              S5P_IRQ_VIC2(31)
 #define IRQ_VIC_END             S5P_IRQ_VIC2(31)
 
+#define IRQ_TIMER_BASE          (11)
+
 #define S5P_EINT_BASE1          (S5P_IRQ_VIC0(0))
 #define S5P_EINT_BASE2          (IRQ_VIC_END + 1)
 
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h
index ccbe6b767f7d..54bc4f82e17a 100644
--- a/arch/arm/mach-s5pc100/include/mach/map.h
+++ b/arch/arm/mach-s5pc100/include/mach/map.h
@@ -100,6 +100,9 @@
 #define S3C_PA_USB_HSOTG                S5PC100_PA_USB_HSOTG
 #define S3C_PA_USB_HSPHY                S5PC100_PA_USB_HSPHY
 #define S3C_PA_WDT                      S5PC100_PA_WATCHDOG
+#define S3C_PA_SPI0                     S5PC100_PA_SPI0
+#define S3C_PA_SPI1                     S5PC100_PA_SPI1
+#define S3C_PA_SPI2                     S5PC100_PA_SPI2
 
 #define S5P_PA_CHIPID                   S5PC100_PA_CHIPID
 #define S5P_PA_FIMC0                    S5PC100_PA_FIMC0
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h
index a9ea57c06600..afc96c298518 100644
--- a/arch/arm/mach-s5pc100/include/mach/system.h
+++ b/arch/arm/mach-s5pc100/include/mach/system.h
@@ -11,8 +11,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H __FILE__
 
-#include <plat/system-reset.h>
-
 static void arch_idle(void)
 {
         /* nothing here yet */
diff --git a/arch/arm/mach-s5pc100/init.c b/arch/arm/mach-s5pc100/init.c
deleted file mode 100644
index 19d7b523c137..000000000000
--- a/arch/arm/mach-s5pc100/init.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/* linux/arch/arm/plat-s5pc100/s5pc100-init.c
- *
- * Copyright 2009 Samsung Electronics Co.
- *      Byungho Min <bhmin@samsung.com>
- *
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/s5pc100.h>
-
-/* uart registration process */
-void __init s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
-}
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index 93ebe3a92d10..674d22992f3c 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -43,7 +43,6 @@
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
-#include <plat/s5pc100.h>
 #include <plat/fb.h>
 #include <plat/iic.h>
 #include <plat/ata.h>
@@ -54,6 +53,8 @@
 #include <plat/backlight.h>
 #include <plat/regs-fb-v4.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define SMDKC100_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -216,7 +217,7 @@ static struct platform_pwm_backlight_data smdkc100_bl_data = {
 
 static void __init smdkc100_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s5pc100_init_io(NULL, 0);
         s3c24xx_init_clocks(12000000);
         s3c24xx_init_uarts(smdkc100_uartcfgs, ARRAY_SIZE(smdkc100_uartcfgs));
 }
@@ -255,4 +256,5 @@ MACHINE_START(SMDKC100, "SMDKC100")
         .map_io         = smdkc100_map_io,
         .init_machine   = smdkc100_machine_init,
         .timer          = &s3c24xx_timer,
+        .restart        = s5pc100_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s5pc100/setup-sdhci.c b/arch/arm/mach-s5pc100/setup-sdhci.c
deleted file mode 100644
index 6418c6e8a7b7..000000000000
--- a/arch/arm/mach-s5pc100/setup-sdhci.c
+++ /dev/null
@@ -1,23 +0,0 @@
-/* linux/arch/arm/mach-s5pc100/setup-sdhci.c
- *
- * Copyright 2008 Samsung Electronics
- *
- * S5PC100 - Helper functions for settign up SDHCI device(s) (HSMMC)
- *
- * Based on mach-s3c6410/setup-sdhci.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/types.h>
-
-/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
-
-char *s5pc100_hsmmc_clksrcs[4] = {
-        [0] = "hsmmc",          /* HCLK */
-        /* [1] = "hsmmc",       - duplicate HCLK entry */
-        [2] = "sclk_mmc",       /* mmc_bus */
-        /* [3] = "48m",         - note not successfully used yet */
-};
diff --git a/arch/arm/mach-s5pc100/setup-spi.c b/arch/arm/mach-s5pc100/setup-spi.c
new file mode 100644
index 000000000000..431a6f747caa
--- /dev/null
+++ b/arch/arm/mach-s5pc100/setup-spi.c
@@ -0,0 +1,65 @@
+/* linux/arch/arm/mach-s5pc100/setup-spi.c
+ *
+ * Copyright (C) 2011 Samsung Electronics Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+
+#include <plat/gpio-cfg.h>
+#include <plat/s3c64xx-spi.h>
+
+#ifdef CONFIG_S3C64XX_DEV_SPI0
+struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = {
+        .fifo_lvl_mask  = 0x7f,
+        .rx_lvl_offset  = 13,
+        .high_speed     = 1,
+        .tx_st_done     = 21,
+};
+
+int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
+{
+        s3c_gpio_cfgall_range(S5PC100_GPB(0), 3,
+                                S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
+        return 0;
+}
+#endif
+
+#ifdef CONFIG_S3C64XX_DEV_SPI1
+struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = {
+        .fifo_lvl_mask  = 0x7f,
+        .rx_lvl_offset  = 13,
+        .high_speed     = 1,
+        .tx_st_done     = 21,
+};
+
+int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
+{
+        s3c_gpio_cfgall_range(S5PC100_GPB(4), 3,
+                                S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
+        return 0;
+}
+#endif
+
+#ifdef CONFIG_S3C64XX_DEV_SPI2
+struct s3c64xx_spi_info s3c64xx_spi2_pdata __initdata = {
+        .fifo_lvl_mask  = 0x7f,
+        .rx_lvl_offset  = 13,
+        .high_speed     = 1,
+        .tx_st_done     = 21,
+};
+
+int s3c64xx_spi2_cfg_gpio(struct platform_device *dev)
+{
+        s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3));
+        s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP);
+        s3c_gpio_cfgall_range(S5PC100_GPB(2), 2,
+                                S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
+        return 0;
+}
+#endif
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 646057ab2e4c..2cdc42e838b8 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -60,6 +60,11 @@ config S5PV210_SETUP_FIMC
         help
           Common setup code for the camera interfaces.
 
+config S5PV210_SETUP_SPI
+        bool
+        help
+          Common setup code for SPI GPIO configurations.
+
 menu "S5PC110 Machines"
 
 config MACH_AQUILA
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 009fbe53df96..76a121dd52b4 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -10,30 +10,32 @@ obj-m				:=
 obj-n                           :=
 obj-                            :=
 
-# Core support for S5PV210 system
+# Core
+
+obj-y                           += common.o clock.o
 
-obj-$(CONFIG_CPU_S5PV210)       += cpu.o init.o clock.o dma.o
-obj-$(CONFIG_CPU_S5PV210)       += setup-i2c0.o
 obj-$(CONFIG_PM)                += pm.o
 
+obj-y                           += dma.o
+
 # machine support
 
 obj-$(CONFIG_MACH_AQUILA)       += mach-aquila.o
-obj-$(CONFIG_MACH_SMDKV210)     += mach-smdkv210.o
-obj-$(CONFIG_MACH_SMDKC110)     += mach-smdkc110.o
 obj-$(CONFIG_MACH_GONI)         += mach-goni.o
+obj-$(CONFIG_MACH_SMDKC110)     += mach-smdkc110.o
+obj-$(CONFIG_MACH_SMDKV210)     += mach-smdkv210.o
 obj-$(CONFIG_MACH_TORBRECK)     += mach-torbreck.o
 
 # device support
 
 obj-y                           += dev-audio.o
-obj-$(CONFIG_S3C64XX_DEV_SPI)   += dev-spi.o
 
+obj-y                                   += setup-i2c0.o
 obj-$(CONFIG_S5PV210_SETUP_FB_24BPP)    += setup-fb-24bpp.o
 obj-$(CONFIG_S5PV210_SETUP_FIMC)        += setup-fimc.o
-obj-$(CONFIG_S5PV210_SETUP_I2C1)        += setup-i2c1.o
-obj-$(CONFIG_S5PV210_SETUP_I2C2)        += setup-i2c2.o
+obj-$(CONFIG_S5PV210_SETUP_I2C1)        += setup-i2c1.o
+obj-$(CONFIG_S5PV210_SETUP_I2C2)        += setup-i2c2.o
 obj-$(CONFIG_S5PV210_SETUP_IDE)         += setup-ide.o
 obj-$(CONFIG_S5PV210_SETUP_KEYPAD)      += setup-keypad.o
-obj-$(CONFIG_S5PV210_SETUP_SDHCI)       += setup-sdhci.o
 obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO)  += setup-sdhci-gpio.o
+obj-$(CONFIG_S5PV210_SETUP_SPI)         += setup-spi.o
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index 4c5ac7a69e9e..11db6c0fb666 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -29,7 +29,8 @@
 #include <plat/pll.h>
 #include <plat/s5p-clock.h>
 #include <plat/clock-clksrc.h>
-#include <plat/s5pv210.h>
+
+#include "common.h"
 
 static unsigned long xtal;
 
@@ -399,30 +400,6 @@ static struct clk init_clocks_off[] = {
                 .enable         = s5pv210_clk_ip1_ctrl,
                 .ctrlbit        = (1<<25),
         }, {
-                .name           = "hsmmc",
-                .devname        = "s3c-sdhci.0",
-                .parent         = &clk_hclk_psys.clk,
-                .enable         = s5pv210_clk_ip2_ctrl,
-                .ctrlbit        = (1<<16),
-        }, {
-                .name           = "hsmmc",
-                .devname        = "s3c-sdhci.1",
-                .parent         = &clk_hclk_psys.clk,
-                .enable         = s5pv210_clk_ip2_ctrl,
-                .ctrlbit        = (1<<17),
-        }, {
-                .name           = "hsmmc",
-                .devname        = "s3c-sdhci.2",
-                .parent         = &clk_hclk_psys.clk,
-                .enable         = s5pv210_clk_ip2_ctrl,
-                .ctrlbit        = (1<<18),
-        }, {
-                .name           = "hsmmc",
-                .devname        = "s3c-sdhci.3",
-                .parent         = &clk_hclk_psys.clk,
-                .enable         = s5pv210_clk_ip2_ctrl,
-                .ctrlbit        = (1<<19),
-        }, {
                 .name           = "systimer",
                 .parent         = &clk_pclk_psys.clk,
                 .enable         = s5pv210_clk_ip3_ctrl,
@@ -559,6 +536,38 @@ static struct clk init_clocks[] = {
         },
 };
 
+static struct clk clk_hsmmc0 = {
+        .name           = "hsmmc",
+        .devname        = "s3c-sdhci.0",
+        .parent         = &clk_hclk_psys.clk,
+        .enable         = s5pv210_clk_ip2_ctrl,
+        .ctrlbit        = (1<<16),
+};
+
+static struct clk clk_hsmmc1 = {
+        .name           = "hsmmc",
+        .devname        = "s3c-sdhci.1",
+        .parent         = &clk_hclk_psys.clk,
+        .enable         = s5pv210_clk_ip2_ctrl,
+        .ctrlbit        = (1<<17),
+};
+
+static struct clk clk_hsmmc2 = {
+        .name           = "hsmmc",
+        .devname        = "s3c-sdhci.2",
+        .parent         = &clk_hclk_psys.clk,
+        .enable         = s5pv210_clk_ip2_ctrl,
+        .ctrlbit        = (1<<18),
+};
+
+static struct clk clk_hsmmc3 = {
+        .name           = "hsmmc",
+        .devname        = "s3c-sdhci.3",
+        .parent         = &clk_hclk_psys.clk,
+        .enable         = s5pv210_clk_ip2_ctrl,
+        .ctrlbit        = (1<<19),
+};
+
 static struct clk *clkset_uart_list[] = {
         [6] = &clk_mout_mpll.clk,
         [7] = &clk_mout_epll.clk,
@@ -809,46 +818,6 @@ static struct clksrc_clk clksrcs[] = {
                 .reg_div = { .reg = S5P_CLK_DIV6, .shift = 12, .size = 3 },
         }, {
                 .clk    = {
-                        .name           = "uclk1",
-                        .devname        = "s5pv210-uart.0",
-                        .enable         = s5pv210_clk_mask0_ctrl,
-                        .ctrlbit        = (1 << 12),
-                },
-                .sources = &clkset_uart,
-                .reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 },
-                .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 },
-        }, {
-                .clk            = {
-                        .name           = "uclk1",
-                        .devname        = "s5pv210-uart.1",
-                        .enable         = s5pv210_clk_mask0_ctrl,
-                        .ctrlbit        = (1 << 13),
-                },
-                .sources = &clkset_uart,
-                .reg_src = { .reg = S5P_CLK_SRC4, .shift = 20, .size = 4 },
-                .reg_div = { .reg = S5P_CLK_DIV4, .shift = 20, .size = 4 },
-        }, {
-                .clk            = {
-                        .name           = "uclk1",
-                        .devname        = "s5pv210-uart.2",
-                        .enable         = s5pv210_clk_mask0_ctrl,
-                        .ctrlbit        = (1 << 14),
-                },
-                .sources = &clkset_uart,
-                .reg_src = { .reg = S5P_CLK_SRC4, .shift = 24, .size = 4 },
-                .reg_div = { .reg = S5P_CLK_DIV4, .shift = 24, .size = 4 },
-        }, {
-                .clk            = {
-                        .name           = "uclk1",
-                        .devname        = "s5pv210-uart.3",
-                        .enable         = s5pv210_clk_mask0_ctrl,
-                        .ctrlbit        = (1 << 15),
-                },
-                .sources = &clkset_uart,
-                .reg_src = { .reg = S5P_CLK_SRC4, .shift = 28, .size = 4 },
-                .reg_div = { .reg = S5P_CLK_DIV4, .shift = 28, .size = 4 },
-        }, {
-                .clk    = {
                         .name           = "sclk_fimc",
                         .devname        = "s5pv210-fimc.0",
                         .enable         = s5pv210_clk_mask1_ctrl,
@@ -906,46 +875,6 @@ static struct clksrc_clk clksrcs[] = {
                 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 20, .size = 4 },
         }, {
                 .clk            = {
-                        .name           = "sclk_mmc",
-                        .devname        = "s3c-sdhci.0",
-                        .enable         = s5pv210_clk_mask0_ctrl,
-                        .ctrlbit        = (1 << 8),
-                },
-                .sources = &clkset_group2,
-                .reg_src = { .reg = S5P_CLK_SRC4, .shift = 0, .size = 4 },
-                .reg_div = { .reg = S5P_CLK_DIV4, .shift = 0, .size = 4 },
-        }, {
-                .clk            = {
-                        .name           = "sclk_mmc",
-                        .devname        = "s3c-sdhci.1",
-                        .enable         = s5pv210_clk_mask0_ctrl,
-                        .ctrlbit        = (1 << 9),
-                },
-                .sources = &clkset_group2,
-                .reg_src = { .reg = S5P_CLK_SRC4, .shift = 4, .size = 4 },
-                .reg_div = { .reg = S5P_CLK_DIV4, .shift = 4, .size = 4 },
-        }, {
-                .clk            = {
-                        .name           = "sclk_mmc",
-                        .devname        = "s3c-sdhci.2",
-                        .enable         = s5pv210_clk_mask0_ctrl,
-                        .ctrlbit        = (1 << 10),
-                },
-                .sources = &clkset_group2,
-                .reg_src = { .reg = S5P_CLK_SRC4, .shift = 8, .size = 4 },
-                .reg_div = { .reg = S5P_CLK_DIV4, .shift = 8, .size = 4 },
-        }, {
-                .clk            = {
-                        .name           = "sclk_mmc",
-                        .devname        = "s3c-sdhci.3",
-                        .enable         = s5pv210_clk_mask0_ctrl,
-                        .ctrlbit        = (1 << 11),
-                },
-                .sources = &clkset_group2,
-                .reg_src = { .reg = S5P_CLK_SRC4, .shift = 12, .size = 4 },
-                .reg_div = { .reg = S5P_CLK_DIV4, .shift = 12, .size = 4 },
-        }, {
-                .clk            = {
                         .name           = "sclk_mfc",
                         .devname        = "s5p-mfc",
                         .enable         = s5pv210_clk_ip0_ctrl,
@@ -983,26 +912,6 @@ static struct clksrc_clk clksrcs[] = {
                 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 28, .size = 4 },
         }, {
                 .clk            = {
-                        .name           = "sclk_spi",
-                        .devname        = "s3c64xx-spi.0",
-                        .enable         = s5pv210_clk_mask0_ctrl,
-                        .ctrlbit        = (1 << 16),
-                },
-                .sources = &clkset_group2,
-                .reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 },
-                .reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 },
-        }, {
-                .clk            = {
-                        .name           = "sclk_spi",
-                        .devname        = "s3c64xx-spi.1",
-                        .enable         = s5pv210_clk_mask0_ctrl,
-                        .ctrlbit        = (1 << 17),
-                },
-                .sources = &clkset_group2,
-                .reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 },
-                .reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 },
-        }, {
-                .clk            = {
                         .name           = "sclk_pwi",
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 29),
@@ -1022,6 +931,147 @@ static struct clksrc_clk clksrcs[] = {
         },
 };
 
+static struct clksrc_clk clk_sclk_uart0 = {
+        .clk    = {
+                .name           = "uclk1",
+                .devname        = "s5pv210-uart.0",
+                .enable         = s5pv210_clk_mask0_ctrl,
+                .ctrlbit        = (1 << 12),
+        },
+        .sources = &clkset_uart,
+        .reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 },
+        .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_uart1 = {
+        .clk            = {
+                .name           = "uclk1",
+                .devname        = "s5pv210-uart.1",
+                .enable         = s5pv210_clk_mask0_ctrl,
+                .ctrlbit        = (1 << 13),
+        },
+        .sources = &clkset_uart,
+        .reg_src = { .reg = S5P_CLK_SRC4, .shift = 20, .size = 4 },
+        .reg_div = { .reg = S5P_CLK_DIV4, .shift = 20, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_uart2 = {
+        .clk            = {
+                .name           = "uclk1",
+                .devname        = "s5pv210-uart.2",
+                .enable         = s5pv210_clk_mask0_ctrl,
+                .ctrlbit        = (1 << 14),
+        },
+        .sources = &clkset_uart,
+        .reg_src = { .reg = S5P_CLK_SRC4, .shift = 24, .size = 4 },
+        .reg_div = { .reg = S5P_CLK_DIV4, .shift = 24, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_uart3 = {
+        .clk            = {
+                .name           = "uclk1",
+                .devname        = "s5pv210-uart.3",
+                .enable         = s5pv210_clk_mask0_ctrl,
+                .ctrlbit        = (1 << 15),
+        },
+        .sources = &clkset_uart,
+        .reg_src = { .reg = S5P_CLK_SRC4, .shift = 28, .size = 4 },
+        .reg_div = { .reg = S5P_CLK_DIV4, .shift = 28, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_mmc0 = {
+        .clk            = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.0",
+                .enable         = s5pv210_clk_mask0_ctrl,
+                .ctrlbit        = (1 << 8),
+        },
+        .sources = &clkset_group2,
+        .reg_src = { .reg = S5P_CLK_SRC4, .shift = 0, .size = 4 },
+        .reg_div = { .reg = S5P_CLK_DIV4, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_mmc1 = {
+        .clk            = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.1",
+                .enable         = s5pv210_clk_mask0_ctrl,
+                .ctrlbit        = (1 << 9),
+        },
+        .sources = &clkset_group2,
+        .reg_src = { .reg = S5P_CLK_SRC4, .shift = 4, .size = 4 },
+        .reg_div = { .reg = S5P_CLK_DIV4, .shift = 4, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_mmc2 = {
+        .clk            = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.2",
+                .enable         = s5pv210_clk_mask0_ctrl,
+                .ctrlbit        = (1 << 10),
+        },
+        .sources = &clkset_group2,
+        .reg_src = { .reg = S5P_CLK_SRC4, .shift = 8, .size = 4 },
+        .reg_div = { .reg = S5P_CLK_DIV4, .shift = 8, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_mmc3 = {
+        .clk            = {
+                .name           = "sclk_mmc",
+                .devname        = "s3c-sdhci.3",
+                .enable         = s5pv210_clk_mask0_ctrl,
+                .ctrlbit        = (1 << 11),
+        },
+        .sources = &clkset_group2,
+        .reg_src = { .reg = S5P_CLK_SRC4, .shift = 12, .size = 4 },
+        .reg_div = { .reg = S5P_CLK_DIV4, .shift = 12, .size = 4 },
+};
+
+static struct clksrc_clk clk_sclk_spi0 = {
+        .clk            = {
+                .name           = "sclk_spi",
+                .devname        = "s3c64xx-spi.0",
+                .enable         = s5pv210_clk_mask0_ctrl,
+                .ctrlbit        = (1 << 16),
+        },
+        .sources = &clkset_group2,
+        .reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 },
+        .reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 },
+        };
+
+static struct clksrc_clk clk_sclk_spi1 = {
+        .clk            = {
+                .name           = "sclk_spi",
+                .devname        = "s3c64xx-spi.1",
+                .enable         = s5pv210_clk_mask0_ctrl,
+                .ctrlbit        = (1 << 17),
+        },
+        .sources = &clkset_group2,
+        .reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 },
+        .reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 },
+        };
+
+
+static struct clksrc_clk *clksrc_cdev[] = {
+        &clk_sclk_uart0,
+        &clk_sclk_uart1,
+        &clk_sclk_uart2,
+        &clk_sclk_uart3,
+        &clk_sclk_mmc0,
+        &clk_sclk_mmc1,
+        &clk_sclk_mmc2,
+        &clk_sclk_mmc3,
+        &clk_sclk_spi0,
+        &clk_sclk_spi1,
+};
+
+static struct clk *clk_cdev[] = {
+        &clk_hsmmc0,
+        &clk_hsmmc1,
+        &clk_hsmmc2,
+        &clk_hsmmc3,
+};
+
 /* Clock initialisation code */
 static struct clksrc_clk *sysclks[] = {
         &clk_mout_apll,
@@ -1261,6 +1311,25 @@ static struct clk *clks[] __initdata = {
         &clk_pcmcdclk2,
 };
 
+static struct clk_lookup s5pv210_clk_lookup[] = {
+        CLKDEV_INIT(NULL, "clk_uart_baud0", &clk_p),
+        CLKDEV_INIT("s5pv210-uart.0", "clk_uart_baud1", &clk_sclk_uart0.clk),
+        CLKDEV_INIT("s5pv210-uart.1", "clk_uart_baud1", &clk_sclk_uart1.clk),
+        CLKDEV_INIT("s5pv210-uart.2", "clk_uart_baud1", &clk_sclk_uart2.clk),
+        CLKDEV_INIT("s5pv210-uart.3", "clk_uart_baud1", &clk_sclk_uart3.clk),
+        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &clk_hsmmc0),
+        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &clk_hsmmc1),
+        CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.0", &clk_hsmmc2),
+        CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.0", &clk_hsmmc3),
+        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
+        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
+        CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
+        CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk),
+        CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
+        CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
+        CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
+};
+
 void __init s5pv210_register_clocks(void)
 {
         int ptr;
@@ -1273,11 +1342,19 @@ void __init s5pv210_register_clocks(void)
         for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++)
                 s3c_register_clksrc(sclk_tv[ptr], 1);
 
+        for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
+                s3c_register_clksrc(clksrc_cdev[ptr], 1);
+
         s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
         s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
 
         s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
         s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
+        clkdev_add_table(s5pv210_clk_lookup, ARRAY_SIZE(s5pv210_clk_lookup));
+
+        s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
+        for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
+                s3c_disable_clocks(clk_cdev[ptr], 1);
 
         s3c24xx_register_clock(&dummy_apb_pclk);
         s3c_pwmclk_init();
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/common.c
index 84ec74633232..b9adefd9838e 100644
--- a/arch/arm/mach-s5pv210/cpu.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -1,12 +1,13 @@
-/* linux/arch/arm/mach-s5pv210/cpu.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+/*
+ * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
  *              http://www.samsung.com
  *
+ * Common Codes for S5PV210
+ *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
-*/
+ */
 
 #include <linux/kernel.h>
 #include <linux/types.h>
@@ -21,33 +22,74 @@
 #include <linux/platform_device.h>
 #include <linux/sched.h>
 #include <linux/dma-mapping.h>
+#include <linux/serial_core.h>
 
+#include <asm/proc-fns.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
-#include <asm/proc-fns.h>
 #include <mach/map.h>
 #include <mach/regs-clock.h>
 
 #include <plat/cpu.h>
-#include <plat/devs.h>
 #include <plat/clock.h>
-#include <plat/fb-core.h>
-#include <plat/s5pv210.h>
+#include <plat/devs.h>
+#include <plat/sdhci.h>
 #include <plat/adc-core.h>
 #include <plat/ata-core.h>
+#include <plat/fb-core.h>
 #include <plat/fimc-core.h>
 #include <plat/iic-core.h>
 #include <plat/keypad-core.h>
-#include <plat/sdhci.h>
-#include <plat/reset.h>
 #include <plat/tv-core.h>
+#include <plat/regs-serial.h>
+
+#include "common.h"
+
+static const char name_s5pv210[] = "S5PV210/S5PC110";
+
+static struct cpu_table cpu_ids[] __initdata = {
+        {
+                .idcode         = S5PV210_CPU_ID,
+                .idmask         = S5PV210_CPU_MASK,
+                .map_io         = s5pv210_map_io,
+                .init_clocks    = s5pv210_init_clocks,
+                .init_uarts     = s5pv210_init_uarts,
+                .init           = s5pv210_init,
+                .name           = name_s5pv210,
+        },
+};
 
 /* Initial IO mappings */
 
 static struct map_desc s5pv210_iodesc[] __initdata = {
         {
+                .virtual        = (unsigned long)S5P_VA_CHIPID,
+                .pfn            = __phys_to_pfn(S5PV210_PA_CHIPID),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_SYS,
+                .pfn            = __phys_to_pfn(S5PV210_PA_SYSCON),
+                .length         = SZ_64K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_TIMER,
+                .pfn            = __phys_to_pfn(S5PV210_PA_TIMER),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S3C_VA_WATCHDOG,
+                .pfn            = __phys_to_pfn(S5PV210_PA_WATCHDOG),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = (unsigned long)S5P_VA_SROMC,
+                .pfn            = __phys_to_pfn(S5PV210_PA_SROMC),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
                 .virtual        = (unsigned long)S5P_VA_SYSTIMER,
                 .pfn            = __phys_to_pfn(S5PV210_PA_SYSTIMER),
                 .length         = SZ_4K,
@@ -108,19 +150,32 @@ static void s5pv210_idle(void)
         local_irq_enable();
 }
 
-static void s5pv210_sw_reset(void)
+void s5pv210_restart(char mode, const char *cmd)
 {
         __raw_writel(0x1, S5P_SWRESET);
 }
 
-/* s5pv210_map_io
+/*
+ * s5pv210_map_io
  *
  * register the standard cpu IO areas
-*/
+ */
 
-void __init s5pv210_map_io(void)
+void __init s5pv210_init_io(struct map_desc *mach_desc, int size)
 {
+        /* initialize the io descriptors we need for initialization */
         iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc));
+        if (mach_desc)
+                iotable_init(mach_desc, size);
+
+        /* detect cpu id and rev. */
+        s5p_init_cpu(S5P_VA_CHIPID);
+
+        s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+}
+
+void __init s5pv210_map_io(void)
+{
         init_consistent_dma_size(14 << 20);
 
         /* initialise device information early */
@@ -186,7 +241,6 @@ static int __init s5pv210_core_init(void)
 {
         return sysdev_class_register(&s5pv210_sysclass);
 }
-
 core_initcall(s5pv210_core_init);
 
 int __init s5pv210_init(void)
@@ -196,8 +250,12 @@ int __init s5pv210_init(void)
         /* set idle function */
         pm_idle = s5pv210_idle;
 
-        /* set sw_reset function */
-        s5p_reset_hook = s5pv210_sw_reset;
-
         return sysdev_register(&s5pv210_sysdev);
 }
+
+/* uart registration process */
+
+void __init s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+        s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
+}
diff --git a/arch/arm/mach-s5pv210/common.h b/arch/arm/mach-s5pv210/common.h
new file mode 100644
index 000000000000..6ed2af5c7518
--- /dev/null
+++ b/arch/arm/mach-s5pv210/common.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com
+ *
+ * Common Header for S5PV210 machines
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_S5PV210_COMMON_H
+#define __ARCH_ARM_MACH_S5PV210_COMMON_H
+
+void s5pv210_init_io(struct map_desc *mach_desc, int size);
+void s5pv210_init_irq(void);
+
+void s5pv210_register_clocks(void);
+void s5pv210_setup_clocks(void);
+
+void s5pv210_restart(char mode, const char *cmd);
+
+#ifdef CONFIG_CPU_S5PV210
+
+extern  int s5pv210_init(void);
+extern void s5pv210_map_io(void);
+extern void s5pv210_init_clocks(int xtal);
+extern void s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+
+#else
+#define s5pv210_init_clocks NULL
+#define s5pv210_init_uarts NULL
+#define s5pv210_map_io NULL
+#define s5pv210_init NULL
+#endif
+
+#endif /* __ARCH_ARM_MACH_S5PV210_COMMON_H */
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c
deleted file mode 100644
index eaf9a7bff7a0..000000000000
--- a/arch/arm/mach-s5pv210/dev-spi.c
+++ /dev/null
@@ -1,175 +0,0 @@
-/* linux/arch/arm/mach-s5pv210/dev-spi.c
- *
- * Copyright (C) 2010 Samsung Electronics Co. Ltd.
- *      Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/gpio.h>
-
-#include <mach/dma.h>
-#include <mach/map.h>
-#include <mach/irqs.h>
-#include <mach/spi-clocks.h>
-
-#include <plat/s3c64xx-spi.h>
-#include <plat/gpio-cfg.h>
-
-static char *spi_src_clks[] = {
-        [S5PV210_SPI_SRCCLK_PCLK] = "pclk",
-        [S5PV210_SPI_SRCCLK_SCLK] = "sclk_spi",
-};
-
-/* SPI Controller platform_devices */
-
-/* Since we emulate multi-cs capability, we do not touch the CS.
- * The emulated CS is toggled by board specific mechanism, as it can
- * be either some immediate GPIO or some signal out of some other
- * chip in between ... or some yet another way.
- * We simply do not assume anything about CS.
- */
-static int s5pv210_spi_cfg_gpio(struct platform_device *pdev)
-{
-        unsigned int base;
-
-        switch (pdev->id) {
-        case 0:
-                base = S5PV210_GPB(0);
-                break;
-
-        case 1:
-                base = S5PV210_GPB(4);
-                break;
-
-        default:
-                dev_err(&pdev->dev, "Invalid SPI Controller number!");
-                return -EINVAL;
-        }
-
-        s3c_gpio_cfgall_range(base, 3,
-                              S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
-
-        return 0;
-}
-
-static struct resource s5pv210_spi0_resource[] = {
-        [0] = {
-                .start = S5PV210_PA_SPI0,
-                .end   = S5PV210_PA_SPI0 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_SPI0_TX,
-                .end   = DMACH_SPI0_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_SPI0_RX,
-                .end   = DMACH_SPI0_RX,
-                .flags = IORESOURCE_DMA,
-        },
-        [3] = {
-                .start = IRQ_SPI0,
-                .end   = IRQ_SPI0,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-
-static struct s3c64xx_spi_info s5pv210_spi0_pdata = {
-        .cfg_gpio = s5pv210_spi_cfg_gpio,
-        .fifo_lvl_mask = 0x1ff,
-        .rx_lvl_offset = 15,
-        .high_speed = 1,
-        .tx_st_done = 25,
-};
-
-static u64 spi_dmamask = DMA_BIT_MASK(32);
-
-struct platform_device s5pv210_device_spi0 = {
-        .name             = "s3c64xx-spi",
-        .id               = 0,
-        .num_resources    = ARRAY_SIZE(s5pv210_spi0_resource),
-        .resource         = s5pv210_spi0_resource,
-        .dev = {
-                .dma_mask               = &spi_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                .platform_data = &s5pv210_spi0_pdata,
-        },
-};
-
-static struct resource s5pv210_spi1_resource[] = {
-        [0] = {
-                .start = S5PV210_PA_SPI1,
-                .end   = S5PV210_PA_SPI1 + 0x100 - 1,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = DMACH_SPI1_TX,
-                .end   = DMACH_SPI1_TX,
-                .flags = IORESOURCE_DMA,
-        },
-        [2] = {
-                .start = DMACH_SPI1_RX,
-                .end   = DMACH_SPI1_RX,
-                .flags = IORESOURCE_DMA,
-        },
-        [3] = {
-                .start = IRQ_SPI1,
-                .end   = IRQ_SPI1,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-
-static struct s3c64xx_spi_info s5pv210_spi1_pdata = {
-        .cfg_gpio = s5pv210_spi_cfg_gpio,
-        .fifo_lvl_mask = 0x7f,
-        .rx_lvl_offset = 15,
-        .high_speed = 1,
-        .tx_st_done = 25,
-};
-
-struct platform_device s5pv210_device_spi1 = {
-        .name             = "s3c64xx-spi",
-        .id               = 1,
-        .num_resources    = ARRAY_SIZE(s5pv210_spi1_resource),
-        .resource         = s5pv210_spi1_resource,
-        .dev = {
-                .dma_mask               = &spi_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-                .platform_data = &s5pv210_spi1_pdata,
-        },
-};
-
-void __init s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
-{
-        struct s3c64xx_spi_info *pd;
-
-        /* Reject invalid configuration */
-        if (!num_cs || src_clk_nr < 0
-                        || src_clk_nr > S5PV210_SPI_SRCCLK_SCLK) {
-                printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
-                return;
-        }
-
-        switch (cntrlr) {
-        case 0:
-                pd = &s5pv210_spi0_pdata;
-                break;
-        case 1:
-                pd = &s5pv210_spi1_pdata;
-                break;
-        default:
-                printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
-                                                        __func__, cntrlr);
-                return;
-        }
-
-        pd->num_cs = num_cs;
-        pd->src_clk_nr = src_clk_nr;
-        pd->src_clk_name = spi_src_clks[src_clk_nr];
-}
diff --git a/arch/arm/mach-s5pv210/dma.c b/arch/arm/mach-s5pv210/dma.c
index 86b749c18b77..a6113e0267f2 100644
--- a/arch/arm/mach-s5pv210/dma.c
+++ b/arch/arm/mach-s5pv210/dma.c
@@ -35,90 +35,40 @@
 
 static u64 dma_dmamask = DMA_BIT_MASK(32);
 
-struct dma_pl330_peri pdma0_peri[28] = {
-        {
-                .peri_id = (u8)DMACH_UART0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART2_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART2_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART3_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART3_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = DMACH_MAX,
-        }, {
-                .peri_id = (u8)DMACH_I2S0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_I2S0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S0S_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_I2S1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_MAX,
-        }, {
-                .peri_id = (u8)DMACH_MAX,
-        }, {
-                .peri_id = (u8)DMACH_SPI0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SPI0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SPI1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SPI1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_MAX,
-        }, {
-                .peri_id = (u8)DMACH_MAX,
-        }, {
-                .peri_id = (u8)DMACH_AC97_MICIN,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_AC97_PCMIN,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_AC97_PCMOUT,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_MAX,
-        }, {
-                .peri_id = (u8)DMACH_PWM,
-        }, {
-                .peri_id = (u8)DMACH_SPDIF,
-                .rqtype = MEMTODEV,
-        },
+u8 pdma0_peri[] = {
+        DMACH_UART0_RX,
+        DMACH_UART0_TX,
+        DMACH_UART1_RX,
+        DMACH_UART1_TX,
+        DMACH_UART2_RX,
+        DMACH_UART2_TX,
+        DMACH_UART3_RX,
+        DMACH_UART3_TX,
+        DMACH_MAX,
+        DMACH_I2S0_RX,
+        DMACH_I2S0_TX,
+        DMACH_I2S0S_TX,
+        DMACH_I2S1_RX,
+        DMACH_I2S1_TX,
+        DMACH_MAX,
+        DMACH_MAX,
+        DMACH_SPI0_RX,
+        DMACH_SPI0_TX,
+        DMACH_SPI1_RX,
+        DMACH_SPI1_TX,
+        DMACH_MAX,
+        DMACH_MAX,
+        DMACH_AC97_MICIN,
+        DMACH_AC97_PCMIN,
+        DMACH_AC97_PCMOUT,
+        DMACH_MAX,
+        DMACH_PWM,
+        DMACH_SPDIF,
 };
 
 struct dma_pl330_platdata s5pv210_pdma0_pdata = {
         .nr_valid_peri = ARRAY_SIZE(pdma0_peri),
-        .peri = pdma0_peri,
+        .peri_id = pdma0_peri,
 };
 
 struct amba_device s5pv210_device_pdma0 = {
@@ -137,102 +87,44 @@ struct amba_device s5pv210_device_pdma0 = {
         .periphid = 0x00041330,
 };
 
-struct dma_pl330_peri pdma1_peri[32] = {
-        {
-                .peri_id = (u8)DMACH_UART0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART2_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART2_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_UART3_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_UART3_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = DMACH_MAX,
-        }, {
-                .peri_id = (u8)DMACH_I2S0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_I2S0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S0S_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_I2S1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_I2S2_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_I2S2_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SPI0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SPI0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_SPI1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_SPI1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_MAX,
-        }, {
-                .peri_id = (u8)DMACH_MAX,
-        }, {
-                .peri_id = (u8)DMACH_PCM0_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_PCM0_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_PCM1_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_PCM1_TX,
-                .rqtype = MEMTODEV,
-        }, {
-                .peri_id = (u8)DMACH_MSM_REQ0,
-        }, {
-                .peri_id = (u8)DMACH_MSM_REQ1,
-        }, {
-                .peri_id = (u8)DMACH_MSM_REQ2,
-        }, {
-                .peri_id = (u8)DMACH_MSM_REQ3,
-        }, {
-                .peri_id = (u8)DMACH_PCM2_RX,
-                .rqtype = DEVTOMEM,
-        }, {
-                .peri_id = (u8)DMACH_PCM2_TX,
-                .rqtype = MEMTODEV,
-        },
+u8 pdma1_peri[] = {
+        DMACH_UART0_RX,
+        DMACH_UART0_TX,
+        DMACH_UART1_RX,
+        DMACH_UART1_TX,
+        DMACH_UART2_RX,
+        DMACH_UART2_TX,
+        DMACH_UART3_RX,
+        DMACH_UART3_TX,
+        DMACH_MAX,
+        DMACH_I2S0_RX,
+        DMACH_I2S0_TX,
+        DMACH_I2S0S_TX,
+        DMACH_I2S1_RX,
+        DMACH_I2S1_TX,
+        DMACH_I2S2_RX,
+        DMACH_I2S2_TX,
+        DMACH_SPI0_RX,
+        DMACH_SPI0_TX,
+        DMACH_SPI1_RX,
+        DMACH_SPI1_TX,
+        DMACH_MAX,
+        DMACH_MAX,
+        DMACH_PCM0_RX,
+        DMACH_PCM0_TX,
+        DMACH_PCM1_RX,
+        DMACH_PCM1_TX,
+        DMACH_MSM_REQ0,
+        DMACH_MSM_REQ1,
+        DMACH_MSM_REQ2,
+        DMACH_MSM_REQ3,
+        DMACH_PCM2_RX,
+        DMACH_PCM2_TX,
 };
 
 struct dma_pl330_platdata s5pv210_pdma1_pdata = {
         .nr_valid_peri = ARRAY_SIZE(pdma1_peri),
-        .peri = pdma1_peri,
+        .peri_id = pdma1_peri,
 };
 
 struct amba_device s5pv210_device_pdma1 = {
@@ -253,7 +145,12 @@ struct amba_device s5pv210_device_pdma1 = {
 
 static int __init s5pv210_dma_init(void)
 {
+        dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask);
+        dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask);
         amba_device_register(&s5pv210_device_pdma0, &iomem_resource);
+
+        dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask);
+        dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask);
         amba_device_register(&s5pv210_device_pdma1, &iomem_resource);
 
         return 0;
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index 5e0de3a31f3d..e777e010ed2e 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -118,6 +118,8 @@
 #define IRQ_MDNIE3              S5P_IRQ_VIC3(8)
 #define IRQ_VIC_END             S5P_IRQ_VIC3(31)
 
+#define IRQ_TIMER_BASE          (11)
+
 #define S5P_EINT_BASE1          (S5P_IRQ_VIC0(0))
 #define S5P_EINT_BASE2          (IRQ_VIC_END + 1)
 
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index 7ff609f1568b..89c34b8f73bf 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -109,6 +109,8 @@
 #define S3C_PA_RTC                      S5PV210_PA_RTC
 #define S3C_PA_USB_HSOTG                S5PV210_PA_HSOTG
 #define S3C_PA_WDT                      S5PV210_PA_WATCHDOG
+#define S3C_PA_SPI0                     S5PV210_PA_SPI0
+#define S3C_PA_SPI1                     S5PV210_PA_SPI1
 
 #define S5P_PA_CHIPID                   S5PV210_PA_CHIPID
 #define S5P_PA_FIMC0                    S5PV210_PA_FIMC0
diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h
index af8a200b2135..bf288ced860a 100644
--- a/arch/arm/mach-s5pv210/include/mach/system.h
+++ b/arch/arm/mach-s5pv210/include/mach/system.h
@@ -13,8 +13,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H __FILE__
 
-#include <plat/system-reset.h>
-
 static void arch_idle(void)
 {
         /* nothing here yet */
diff --git a/arch/arm/mach-s5pv210/init.c b/arch/arm/mach-s5pv210/init.c
deleted file mode 100644
index 4865ae2c475a..000000000000
--- a/arch/arm/mach-s5pv210/init.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/* linux/arch/arm/mach-s5pv210/init.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/serial_core.h>
-
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/s5pv210.h>
-#include <plat/regs-serial.h>
-
-static struct s3c24xx_uart_clksrc s5pv210_serial_clocks[] = {
-        [0] = {
-                .name           = "pclk",
-                .divisor        = 1,
-                .min_baud       = 0,
-                .max_baud       = 0,
-        },
-};
-
-/* uart registration process */
-void __init s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-        struct s3c2410_uartcfg *tcfg = cfg;
-        u32 ucnt;
-
-        for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
-                if (!tcfg->clocks) {
-                        tcfg->clocks = s5pv210_serial_clocks;
-                        tcfg->clocks_size = ARRAY_SIZE(s5pv210_serial_clocks);
-                }
-        }
-
-        s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
-}
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 71ca95604d63..5e734d025a6a 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -33,7 +33,6 @@
 
 #include <plat/gpio-cfg.h>
 #include <plat/regs-serial.h>
-#include <plat/s5pv210.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/fb.h>
@@ -42,6 +41,8 @@
 #include <plat/s5p-time.h>
 #include <plat/regs-fb-v4.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define AQUILA_UCON_DEFAULT     (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -596,8 +597,7 @@ static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = {
 
 static void aquila_setup_sdhci(void)
 {
-        gpio_request(AQUILA_EXT_FLASH_EN, "FLASH_EN");
-        gpio_direction_output(AQUILA_EXT_FLASH_EN, 1);
+        gpio_request_one(AQUILA_EXT_FLASH_EN, GPIOF_OUT_INIT_HIGH, "FLASH_EN");
 
         s3c_sdhci0_set_platdata(&aquila_hsmmc0_data);
         s3c_sdhci1_set_platdata(&aquila_hsmmc1_data);
@@ -645,7 +645,7 @@ static void __init aquila_sound_init(void)
 
 static void __init aquila_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s5pv210_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs));
         s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -685,4 +685,5 @@ MACHINE_START(AQUILA, "Aquila")
         .map_io         = aquila_map_io,
         .init_machine   = aquila_machine_init,
         .timer          = &s5p_timer,
+        .restart        = s5pv210_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 448fd9ea96f2..ff9152610439 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -38,7 +38,6 @@
 
 #include <plat/gpio-cfg.h>
 #include <plat/regs-serial.h>
-#include <plat/s5pv210.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/fb.h>
@@ -55,6 +54,8 @@
 #include <media/s5p_fimc.h>
 #include <media/noon010pc30.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define GONI_UCON_DEFAULT       (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -228,8 +229,7 @@ static void __init goni_radio_init(void)
         i2c1_devs[0].irq = gpio_to_irq(gpio);
 
         gpio = S5PV210_GPJ2(5);                 /* XMSMDATA_5 */
-        gpio_request(gpio, "FM_RST");
-        gpio_direction_output(gpio, 1);
+        gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "FM_RST");
 }
 
 /* TSP */
@@ -265,8 +265,7 @@ static void __init goni_tsp_init(void)
         int gpio;
 
         gpio = S5PV210_GPJ1(3);         /* XMSMADDR_11 */
-        gpio_request(gpio, "TSP_LDO_ON");
-        gpio_direction_output(gpio, 1);
+        gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
         gpio_export(gpio, 0);
 
         gpio = S5PV210_GPJ0(5);         /* XMSMADDR_5 */
@@ -891,7 +890,7 @@ static void __init goni_sound_init(void)
 
 static void __init goni_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s5pv210_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs));
         s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -962,4 +961,5 @@ MACHINE_START(GONI, "GONI")
         .init_machine   = goni_machine_init,
         .timer          = &s5p_timer,
         .reserve        = &goni_reserve,
+        .restart        = s5pv210_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index c2531ffc720b..9405da4ae3a3 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -25,7 +25,6 @@
 #include <mach/regs-clock.h>
 
 #include <plat/regs-serial.h>
-#include <plat/s5pv210.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/ata.h>
@@ -33,6 +32,8 @@
 #include <plat/pm.h>
 #include <plat/s5p-time.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define SMDKC110_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -110,7 +111,7 @@ static struct i2c_board_info smdkc110_i2c_devs2[] __initdata = {
 
 static void __init smdkc110_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s5pv210_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
         s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -143,4 +144,5 @@ MACHINE_START(SMDKC110, "SMDKC110")
         .map_io         = smdkc110_map_io,
         .init_machine   = smdkc110_machine_init,
         .timer          = &s5p_timer,
+        .restart        = s5pv210_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 3ac9e57d9705..f6feef4dce65 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -34,7 +34,6 @@
 #include <plat/regs-serial.h>
 #include <plat/regs-srom.h>
 #include <plat/gpio-cfg.h>
-#include <plat/s5pv210.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/adc.h>
@@ -48,6 +47,8 @@
 #include <plat/backlight.h>
 #include <plat/regs-fb-v4.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define SMDKV210_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -154,15 +155,12 @@ static void smdkv210_lte480wv_set_power(struct plat_lcd_data *pd,
 {
         if (power) {
 #if !defined(CONFIG_BACKLIGHT_PWM)
-                gpio_request(S5PV210_GPD0(3), "GPD0");
-                gpio_direction_output(S5PV210_GPD0(3), 1);
+                gpio_request_one(S5PV210_GPD0(3), GPIOF_OUT_INIT_HIGH, "GPD0");
                 gpio_free(S5PV210_GPD0(3));
 #endif
 
                 /* fire nRESET on power up */
-                gpio_request(S5PV210_GPH0(6), "GPH0");
-
-                gpio_direction_output(S5PV210_GPH0(6), 1);
+                gpio_request_one(S5PV210_GPH0(6), GPIOF_OUT_INIT_HIGH, "GPH0");
 
                 gpio_set_value(S5PV210_GPH0(6), 0);
                 mdelay(10);
@@ -173,8 +171,7 @@ static void smdkv210_lte480wv_set_power(struct plat_lcd_data *pd,
                 gpio_free(S5PV210_GPH0(6));
         } else {
 #if !defined(CONFIG_BACKLIGHT_PWM)
-                gpio_request(S5PV210_GPD0(3), "GPD0");
-                gpio_direction_output(S5PV210_GPD0(3), 0);
+                gpio_request_one(S5PV210_GPD0(3), GPIOF_OUT_INIT_LOW, "GPD0");
                 gpio_free(S5PV210_GPD0(3));
 #endif
         }
@@ -279,7 +276,7 @@ static struct platform_pwm_backlight_data smdkv210_bl_data = {
 
 static void __init smdkv210_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s5pv210_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
         s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
@@ -321,4 +318,5 @@ MACHINE_START(SMDKV210, "SMDKV210")
         .map_io         = smdkv210_map_io,
         .init_machine   = smdkv210_machine_init,
         .timer          = &s5p_timer,
+        .restart        = s5pv210_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s5pv210/mach-torbreck.c b/arch/arm/mach-s5pv210/mach-torbreck.c
index df70fcb34516..74e99bc0dc9b 100644
--- a/arch/arm/mach-s5pv210/mach-torbreck.c
+++ b/arch/arm/mach-s5pv210/mach-torbreck.c
@@ -24,12 +24,13 @@
 #include <mach/regs-clock.h>
 
 #include <plat/regs-serial.h>
-#include <plat/s5pv210.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/iic.h>
 #include <plat/s5p-time.h>
 
+#include "common.h"
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define TORBRECK_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                  S3C2410_UCON_RXILEVEL |        \
@@ -103,7 +104,7 @@ static struct i2c_board_info torbreck_i2c_devs2[] __initdata = {
 
 static void __init torbreck_map_io(void)
 {
-        s5p_init_io(NULL, 0, S5P_VA_CHIPID);
+        s5pv210_init_io(NULL, 0);
         s3c24xx_init_clocks(24000000);
         s3c24xx_init_uarts(torbreck_uartcfgs, ARRAY_SIZE(torbreck_uartcfgs));
         s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
@@ -132,4 +133,5 @@ MACHINE_START(TORBRECK, "TORBRECK")
         .map_io         = torbreck_map_io,
         .init_machine   = torbreck_machine_init,
         .timer          = &s5p_timer,
+        .restart        = s5pv210_restart,
 MACHINE_END
diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c
deleted file mode 100644
index 6b8ccc4d35fd..000000000000
--- a/arch/arm/mach-s5pv210/setup-sdhci.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/* linux/arch/arm/mach-s5pv210/setup-sdhci.c
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * S5PV210 - Helper functions for settign up SDHCI device(s) (HSMMC)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/types.h>
-
-/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
-
-char *s5pv210_hsmmc_clksrcs[4] = {
-        [0] = "hsmmc",          /* HCLK */
-        /* [1] = "hsmmc",       - duplicate HCLK entry */
-        [2] = "sclk_mmc",       /* mmc_bus */
-        /* [3] = NULL,          - reserved */
-};
diff --git a/arch/arm/mach-s5pv210/setup-spi.c b/arch/arm/mach-s5pv210/setup-spi.c
new file mode 100644
index 000000000000..f43c5048a37d
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-spi.c
@@ -0,0 +1,51 @@
+/* linux/arch/arm/mach-s5pv210/setup-spi.c
+ *
+ * Copyright (C) 2011 Samsung Electronics Ltd.
+ *              http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+
+#include <plat/gpio-cfg.h>
+#include <plat/s3c64xx-spi.h>
+
+#ifdef CONFIG_S3C64XX_DEV_SPI0
+struct s3c64xx_spi_info s3c64xx_spi0_pdata = {
+        .fifo_lvl_mask  = 0x1ff,
+        .rx_lvl_offset  = 15,
+        .high_speed     = 1,
+        .tx_st_done     = 25,
+};
+
+int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
+{
+        s3c_gpio_cfgpin(S5PV210_GPB(0), S3C_GPIO_SFN(2));
+        s3c_gpio_setpull(S5PV210_GPB(0), S3C_GPIO_PULL_UP);
+        s3c_gpio_cfgall_range(S5PV210_GPB(2), 2,
+                                S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
+        return 0;
+}
+#endif
+
+#ifdef CONFIG_S3C64XX_DEV_SPI1
+struct s3c64xx_spi_info s3c64xx_spi1_pdata = {
+        .fifo_lvl_mask  = 0x7f,
+        .rx_lvl_offset  = 15,
+        .high_speed     = 1,
+        .tx_st_done     = 25,
+};
+
+int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
+{
+        s3c_gpio_cfgpin(S5PV210_GPB(4), S3C_GPIO_SFN(2));
+        s3c_gpio_setpull(S5PV210_GPB(4), S3C_GPIO_PULL_UP);
+        s3c_gpio_cfgall_range(S5PV210_GPB(6), 2,
+                                S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
+        return 0;
+}
+#endif
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
index 3dd133f18415..6b93e200bcac 100644
--- a/arch/arm/mach-sa1100/assabet.c
+++ b/arch/arm/mach-sa1100/assabet.c
@@ -455,4 +455,5 @@ MACHINE_START(ASSABET, "Intel-Assabet")
 #ifdef CONFIG_SA1111
         .dma_zone_size  = SZ_1M,
 #endif
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c
index bda83e1ab078..b07a2c024cb7 100644
--- a/arch/arm/mach-sa1100/badge4.c
+++ b/arch/arm/mach-sa1100/badge4.c
@@ -309,4 +309,5 @@ MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4")
 #ifdef CONFIG_SA1111
         .dma_zone_size  = SZ_1M,
 #endif
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c
index 7f3da4b11ec9..11bb6d0b9be3 100644
--- a/arch/arm/mach-sa1100/cerf.c
+++ b/arch/arm/mach-sa1100/cerf.c
@@ -139,4 +139,5 @@ MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube")
         .init_irq       = cerf_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = cerf_init,
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index 2965cc9d424e..b9060e236def 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -387,4 +387,5 @@ MACHINE_START(COLLIE, "Sharp-Collie")
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = collie_init,
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 5fa5ae1f39e1..bb10ee2cb89f 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -126,6 +126,17 @@ static void sa1100_power_off(void)
         PMCR = PMCR_SF;
 }
 
+void sa11x0_restart(char mode, const char *cmd)
+{
+        if (mode == 's') {
+                /* Jump into ROM at address 0 */
+                soft_restart(0);
+        } else {
+                /* Use on-chip reset capability */
+                RSRR = RSRR_SWR;
+        }
+}
+
 static void sa11x0_register_device(struct platform_device *dev, void *data)
 {
         int err;
diff --git a/arch/arm/mach-sa1100/generic.h b/arch/arm/mach-sa1100/generic.h
index b7a9a601c2d1..33268cf6be36 100644
--- a/arch/arm/mach-sa1100/generic.h
+++ b/arch/arm/mach-sa1100/generic.h
@@ -10,6 +10,7 @@ extern struct sys_timer sa1100_timer;
 extern void __init sa1100_map_io(void);
 extern void __init sa1100_init_irq(void);
 extern void __init sa1100_init_gpio(void);
+extern void sa11x0_restart(char, const char *);
 
 #define SET_BANK(__nr,__start,__size) \
         mi->bank[__nr].start = (__start), \
diff --git a/arch/arm/mach-sa1100/h3100.c b/arch/arm/mach-sa1100/h3100.c
index b30733a2b82e..1e6b3c105ba6 100644
--- a/arch/arm/mach-sa1100/h3100.c
+++ b/arch/arm/mach-sa1100/h3100.c
@@ -89,5 +89,6 @@ MACHINE_START(H3100, "Compaq iPAQ H3100")
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = h3100_mach_init,
+        .restart        = sa11x0_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c
index 6fd324d92389..6b58e7460ecf 100644
--- a/arch/arm/mach-sa1100/h3600.c
+++ b/arch/arm/mach-sa1100/h3600.c
@@ -130,5 +130,6 @@ MACHINE_START(H3600, "Compaq iPAQ H3600")
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = h3600_mach_init,
+        .restart        = sa11x0_restart,
 MACHINE_END
 
diff --git a/arch/arm/mach-sa1100/hackkit.c b/arch/arm/mach-sa1100/hackkit.c
index 30f4a551b8e5..c01bb36db940 100644
--- a/arch/arm/mach-sa1100/hackkit.c
+++ b/arch/arm/mach-sa1100/hackkit.c
@@ -200,4 +200,5 @@ MACHINE_START(HACKKIT, "HackKit Cpu Board")
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = hackkit_init,
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/include/mach/system.h b/arch/arm/mach-sa1100/include/mach/system.h
index 345d35b7450c..e17b208f76d4 100644
--- a/arch/arm/mach-sa1100/include/mach/system.h
+++ b/arch/arm/mach-sa1100/include/mach/system.h
@@ -3,20 +3,7 @@
  *
  * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net>
  */
-#include <mach/hardware.h>
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        if (mode == 's') {
-                /* Jump into ROM at address 0 */
-                soft_restart(0);
-        } else {
-                /* Use on-chip reset capability */
-                RSRR = RSRR_SWR;
-        }
-}
diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c
index 77198fe02bc5..ee121d6f0480 100644
--- a/arch/arm/mach-sa1100/jornada720.c
+++ b/arch/arm/mach-sa1100/jornada720.c
@@ -373,4 +373,5 @@ MACHINE_START(JORNADA720, "HP Jornada 720")
 #ifdef CONFIG_SA1111
         .dma_zone_size  = SZ_1M,
 #endif
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c
index 5bc59d0947ba..af4e2761f3db 100644
--- a/arch/arm/mach-sa1100/lart.c
+++ b/arch/arm/mach-sa1100/lart.c
@@ -66,4 +66,5 @@ MACHINE_START(LART, "LART")
         .init_irq       = sa1100_init_irq,
         .init_machine   = lart_init,
         .timer          = &sa1100_timer,
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/nanoengine.c b/arch/arm/mach-sa1100/nanoengine.c
index 032f3881d145..85f6ee672225 100644
--- a/arch/arm/mach-sa1100/nanoengine.c
+++ b/arch/arm/mach-sa1100/nanoengine.c
@@ -19,6 +19,7 @@
 
 #include <asm/mach-types.h>
 #include <asm/setup.h>
+#include <asm/page.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
@@ -116,4 +117,5 @@ MACHINE_START(NANOENGINE, "BSE nanoEngine")
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = nanoengine_init,
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
index 65161f2bea29..9307df053533 100644
--- a/arch/arm/mach-sa1100/pleb.c
+++ b/arch/arm/mach-sa1100/pleb.c
@@ -150,4 +150,5 @@ MACHINE_START(PLEB, "PLEB")
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = pleb_init,
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c
index 1cccbf5b9e9a..318b2b766a0b 100644
--- a/arch/arm/mach-sa1100/shannon.c
+++ b/arch/arm/mach-sa1100/shannon.c
@@ -87,4 +87,5 @@ MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)")
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
         .init_machine   = shannon_init,
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
index 4790f3f3d008..e17c04d6e324 100644
--- a/arch/arm/mach-sa1100/simpad.c
+++ b/arch/arm/mach-sa1100/simpad.c
@@ -396,4 +396,5 @@ MACHINE_START(SIMPAD, "Simpad")
         .map_io         = simpad_map_io,
         .init_irq       = sa1100_init_irq,
         .timer          = &sa1100_timer,
+        .restart        = sa11x0_restart,
 MACHINE_END
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index fa6602491d54..69e33535dee6 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -12,7 +12,6 @@
 #include <linux/errno.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
-#include <linux/sched.h>        /* just for sched_clock() - funny that */
 #include <linux/timex.h>
 #include <linux/clockchips.h>
 
@@ -20,29 +19,9 @@
 #include <asm/sched_clock.h>
 #include <mach/hardware.h>
 
-/*
- * This is the SA11x0 sched_clock implementation.
- */
-static DEFINE_CLOCK_DATA(cd);
-
-/*
- * Constants generated by clocks_calc_mult_shift(m, s, 3.6864MHz,
- * NSEC_PER_SEC, 60).
- * This gives a resolution of about 271ns and a wrap period of about 19min.
- */
-#define SC_MULT         2275555556u
-#define SC_SHIFT        23
-
-unsigned long long notrace sched_clock(void)
-{
-        u32 cyc = OSCR;
-        return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
-}
-
-static void notrace sa1100_update_sched_clock(void)
+static u32 notrace sa1100_read_sched_clock(void)
 {
-        u32 cyc = OSCR;
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return OSCR;
 }
 
 #define MIN_OSCR_DELTA 2
@@ -109,8 +88,7 @@ static void __init sa1100_timer_init(void)
         OIER = 0;
         OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
 
-        init_fixed_sched_clock(&cd, sa1100_update_sched_clock, 32,
-                               3686400, SC_MULT, SC_SHIFT);
+        setup_sched_clock(sa1100_read_sched_clock, 32, 3686400);
 
         clockevents_calc_mult_shift(&ckevt_sa1100_osmr0, 3686400, 4);
         ckevt_sa1100_osmr0.max_delta_ns =
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index f4b25d875f3d..a851c254ad6c 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -26,7 +26,7 @@
 #define ROMCARD_SIZE            0x08000000
 #define ROMCARD_START           0x10000000
 
-void arch_reset(char mode, const char *cmd)
+static void shark_restart(char mode, const char *cmd)
 {
         short temp;
         /* Reset the Machine via pc[3] of the sequoia chipset */
@@ -156,4 +156,5 @@ MACHINE_START(SHARK, "Shark")
         .init_irq       = shark_init_irq,
         .timer          = &shark_timer,
         .dma_zone_size  = SZ_4M,
+        .restart        = shark_restart,
 MACHINE_END
diff --git a/arch/arm/mach-shark/include/mach/system.h b/arch/arm/mach-shark/include/mach/system.h
index 21c373b30bbc..1b2f2c5050a8 100644
--- a/arch/arm/mach-shark/include/mach/system.h
+++ b/arch/arm/mach-shark/include/mach/system.h
@@ -6,9 +6,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-/* Found in arch/mach-shark/core.c */
-extern void arch_reset(char mode, const char *cmd);
-
 static inline void arch_idle(void)
 {
 }
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index 202c3c6ec9d8..a4e6ca04e319 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -466,8 +466,6 @@ static struct map_desc ag5evm_io_desc[] __initdata = {
 static void __init ag5evm_map_io(void)
 {
         iotable_init(ag5evm_io_desc, ARRAY_SIZE(ag5evm_io_desc));
-        /* DMA memory at 0xf6000000 - 0xffdfffff */
-        init_consistent_dma_size(158 << 20);
 
         /* setup early devices and console here as well */
         sh73a0_add_early_devices();
@@ -607,6 +605,7 @@ struct sys_timer ag5evm_timer = {
 
 MACHINE_START(AG5EVM, "ag5evm")
         .map_io         = ag5evm_map_io,
+        .nr_irqs        = NR_IRQS_LEGACY,
         .init_irq       = sh73a0_init_irq,
         .handle_irq     = gic_handle_irq,
         .init_machine   = ag5evm_init,
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 4c865ece9ac4..6a6f9f7568c2 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -1172,8 +1172,6 @@ static struct map_desc ap4evb_io_desc[] __initdata = {
 static void __init ap4evb_map_io(void)
 {
         iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
-        /* DMA memory at 0xf6000000 - 0xffdfffff */
-        init_consistent_dma_size(158 << 20);
 
         /* setup early devices and console here as well */
         sh7372_add_early_devices();
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c
index 8b620bf06221..72d557281b1f 100644
--- a/arch/arm/mach-shmobile/board-g3evm.c
+++ b/arch/arm/mach-shmobile/board-g3evm.c
@@ -261,8 +261,6 @@ static struct map_desc g3evm_io_desc[] __initdata = {
 static void __init g3evm_map_io(void)
 {
         iotable_init(g3evm_io_desc, ARRAY_SIZE(g3evm_io_desc));
-        /* DMA memory at 0xf6000000 - 0xffdfffff */
-        init_consistent_dma_size(158 << 20);
 
         /* setup early devices and console here as well */
         sh7367_add_early_devices();
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c
index 7719ddc5f591..2220b885cff5 100644
--- a/arch/arm/mach-shmobile/board-g4evm.c
+++ b/arch/arm/mach-shmobile/board-g4evm.c
@@ -275,8 +275,6 @@ static struct map_desc g4evm_io_desc[] __initdata = {
 static void __init g4evm_map_io(void)
 {
         iotable_init(g4evm_io_desc, ARRAY_SIZE(g4evm_io_desc));
-        /* DMA memory at 0xf6000000 - 0xffdfffff */
-        init_consistent_dma_size(158 << 20);
 
         /* setup early devices and console here as well */
         sh7377_add_early_devices();
diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
index 1b4439d3f9d5..857ceeec1bb0 100644
--- a/arch/arm/mach-shmobile/board-kota2.c
+++ b/arch/arm/mach-shmobile/board-kota2.c
@@ -33,6 +33,7 @@
 #include <linux/input/sh_keysc.h>
 #include <linux/gpio_keys.h>
 #include <linux/leds.h>
+#include <linux/platform_data/leds-renesas-tpu.h>
 #include <linux/mmc/host.h>
 #include <linux/mmc/sh_mmcif.h>
 #include <linux/mfd/tmio.h>
@@ -56,7 +57,7 @@ static struct resource smsc9220_resources[] = {
                 .flags          = IORESOURCE_MEM,
         },
         [1] = {
-                .start          = gic_spi(33), /* PINTA2 @ PORT144 */
+                .start          = SH73A0_PINT0_IRQ(2), /* PINTA2 */
                 .flags          = IORESOURCE_IRQ,
         },
 };
@@ -157,10 +158,6 @@ static struct platform_device gpio_keys_device = {
 #define GPIO_LED(n, g) { .name = n, .gpio = g }
 
 static struct gpio_led gpio_leds[] = {
-        GPIO_LED("V2513", GPIO_PORT153), /* PORT153 [TPU1T02] -> V2513 */
-        GPIO_LED("V2514", GPIO_PORT199), /* PORT199 [TPU4TO1] -> V2514 */
-        GPIO_LED("V2515", GPIO_PORT197), /* PORT197 [TPU2TO1] -> V2515 */
-        GPIO_LED("KEYLED", GPIO_PORT163), /* PORT163 [TPU3TO0] -> KEYLED */
         GPIO_LED("G", GPIO_PORT20), /* PORT20 [GPO0] -> LED7 -> "G" */
         GPIO_LED("H", GPIO_PORT21), /* PORT21 [GPO1] -> LED8 -> "H" */
         GPIO_LED("J", GPIO_PORT22), /* PORT22 [GPO2] -> LED9 -> "J" */
@@ -179,6 +176,119 @@ static struct platform_device gpio_leds_device = {
         },
 };
 
+/* TPU LED */
+static struct led_renesas_tpu_config led_renesas_tpu12_pdata = {
+        .name           = "V2513",
+        .pin_gpio_fn    = GPIO_FN_TPU1TO2,
+        .pin_gpio       = GPIO_PORT153,
+        .channel_offset = 0x90,
+        .timer_bit = 2,
+        .max_brightness = 1000,
+};
+
+static struct resource tpu12_resources[] = {
+        [0] = {
+                .name   = "TPU12",
+                .start  = 0xe6610090,
+                .end    = 0xe66100b5,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device leds_tpu12_device = {
+        .name = "leds-renesas-tpu",
+        .id = 12,
+        .dev = {
+                .platform_data  = &led_renesas_tpu12_pdata,
+        },
+        .num_resources  = ARRAY_SIZE(tpu12_resources),
+        .resource       = tpu12_resources,
+};
+
+static struct led_renesas_tpu_config led_renesas_tpu41_pdata = {
+        .name           = "V2514",
+        .pin_gpio_fn    = GPIO_FN_TPU4TO1,
+        .pin_gpio       = GPIO_PORT199,
+        .channel_offset = 0x50,
+        .timer_bit = 1,
+        .max_brightness = 1000,
+};
+
+static struct resource tpu41_resources[] = {
+        [0] = {
+                .name   = "TPU41",
+                .start  = 0xe6640050,
+                .end    = 0xe6640075,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device leds_tpu41_device = {
+        .name = "leds-renesas-tpu",
+        .id = 41,
+        .dev = {
+                .platform_data  = &led_renesas_tpu41_pdata,
+        },
+        .num_resources  = ARRAY_SIZE(tpu41_resources),
+        .resource       = tpu41_resources,
+};
+
+static struct led_renesas_tpu_config led_renesas_tpu21_pdata = {
+        .name           = "V2515",
+        .pin_gpio_fn    = GPIO_FN_TPU2TO1,
+        .pin_gpio       = GPIO_PORT197,
+        .channel_offset = 0x50,
+        .timer_bit = 1,
+        .max_brightness = 1000,
+};
+
+static struct resource tpu21_resources[] = {
+        [0] = {
+                .name   = "TPU21",
+                .start  = 0xe6620050,
+                .end    = 0xe6620075,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device leds_tpu21_device = {
+        .name = "leds-renesas-tpu",
+        .id = 21,
+        .dev = {
+                .platform_data  = &led_renesas_tpu21_pdata,
+        },
+        .num_resources  = ARRAY_SIZE(tpu21_resources),
+        .resource       = tpu21_resources,
+};
+
+static struct led_renesas_tpu_config led_renesas_tpu30_pdata = {
+        .name           = "KEYLED",
+        .pin_gpio_fn    = GPIO_FN_TPU3TO0,
+        .pin_gpio       = GPIO_PORT163,
+        .channel_offset = 0x10,
+        .timer_bit = 0,
+        .max_brightness = 1000,
+};
+
+static struct resource tpu30_resources[] = {
+        [0] = {
+                .name   = "TPU30",
+                .start  = 0xe6630010,
+                .end    = 0xe6630035,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device leds_tpu30_device = {
+        .name = "leds-renesas-tpu",
+        .id = 30,
+        .dev = {
+                .platform_data  = &led_renesas_tpu30_pdata,
+        },
+        .num_resources  = ARRAY_SIZE(tpu30_resources),
+        .resource       = tpu30_resources,
+};
+
 /* MMCIF */
 static struct resource mmcif_resources[] = {
         [0] = {
@@ -291,6 +401,10 @@ static struct platform_device *kota2_devices[] __initdata = {
         &keysc_device,
         &gpio_keys_device,
         &gpio_leds_device,
+        &leds_tpu12_device,
+        &leds_tpu41_device,
+        &leds_tpu21_device,
+        &leds_tpu30_device,
         &mmcif_device,
         &sdhi0_device,
         &sdhi1_device,
@@ -317,18 +431,6 @@ static void __init kota2_map_io(void)
         shmobile_setup_console();
 }
 
-#define PINTER0A        0xe69000a0
-#define PINTCR0A        0xe69000b0
-
-void __init kota2_init_irq(void)
-{
-        sh73a0_init_irq();
-
-        /* setup PINT: enable PINTA2 as active low */
-        __raw_writel(1 << 29, PINTER0A);
-        __raw_writew(2 << 10, PINTCR0A);
-}
-
 static void __init kota2_init(void)
 {
         sh73a0_pinmux_init();
@@ -447,7 +549,8 @@ struct sys_timer kota2_timer = {
 
 MACHINE_START(KOTA2, "kota2")
         .map_io         = kota2_map_io,
-        .init_irq       = kota2_init_irq,
+        .nr_irqs        = NR_IRQS_LEGACY,
+        .init_irq       = sh73a0_init_irq,
         .handle_irq     = gic_handle_irq,
         .init_machine   = kota2_init,
         .timer          = &kota2_timer,
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 9c5e598e0e3d..ed5256687397 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -1390,8 +1390,6 @@ static struct map_desc mackerel_io_desc[] __initdata = {
 static void __init mackerel_map_io(void)
 {
         iotable_init(mackerel_io_desc, ARRAY_SIZE(mackerel_io_desc));
-        /* DMA memory at 0xf6000000 - 0xffdfffff */
-        init_consistent_dma_size(158 << 20);
 
         /* setup early devices and console here as well */
         sh7372_add_early_devices();
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 61a846bb30f2..1370a89ca358 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -113,6 +113,12 @@ static struct clk main_clk = {
         .ops            = &main_clk_ops,
 };
 
+/* Divide Main clock by two */
+static struct clk main_div2_clk = {
+        .ops            = &div2_clk_ops,
+        .parent         = &main_clk,
+};
+
 /* PLL0, PLL1, PLL2, PLL3 */
 static unsigned long pll_recalc(struct clk *clk)
 {
@@ -181,6 +187,7 @@ static struct clk *main_clks[] = {
         &extal1_div2_clk,
         &extal2_div2_clk,
         &main_clk,
+        &main_div2_clk,
         &pll0_clk,
         &pll1_clk,
         &pll2_clk,
@@ -243,7 +250,7 @@ static struct clk div6_clks[DIV6_NR] = {
         [DIV6_VCK1] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR1, 0),
         [DIV6_VCK2] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR2, 0),
         [DIV6_VCK3] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR3, 0),
-        [DIV6_ZB1] = SH_CLK_DIV6(&pll1_div2_clk, ZBCKCR, 0),
+        [DIV6_ZB1] = SH_CLK_DIV6(&pll1_div2_clk, ZBCKCR, CLK_ENABLE_ON_INIT),
         [DIV6_FLCTL] = SH_CLK_DIV6(&pll1_div2_clk, FLCKCR, 0),
         [DIV6_SDHI0] = SH_CLK_DIV6(&pll1_div2_clk, SD0CKCR, 0),
         [DIV6_SDHI1] = SH_CLK_DIV6(&pll1_div2_clk, SD1CKCR, 0),
@@ -268,6 +275,7 @@ enum { MSTP001,
         MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
         MSTP331, MSTP329, MSTP325, MSTP323, MSTP318,
         MSTP314, MSTP313, MSTP312, MSTP311,
+        MSTP303, MSTP302, MSTP301, MSTP300,
         MSTP411, MSTP410, MSTP403,
         MSTP_NR };
 
@@ -301,6 +309,10 @@ static struct clk mstp_clks[MSTP_NR] = {
         [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */
         [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
         [MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */
+        [MSTP303] = MSTP(&main_div2_clk, SMSTPCR3, 3, 0), /* TPU1 */
+        [MSTP302] = MSTP(&main_div2_clk, SMSTPCR3, 2, 0), /* TPU2 */
+        [MSTP301] = MSTP(&main_div2_clk, SMSTPCR3, 1, 0), /* TPU3 */
+        [MSTP300] = MSTP(&main_div2_clk, SMSTPCR3, 0, 0), /* TPU4 */
         [MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */
         [MSTP410] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */
         [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
@@ -350,6 +362,10 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
         CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
         CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */
+        CLKDEV_DEV_ID("leds-renesas-tpu.12", &mstp_clks[MSTP303]), /* TPU1 */
+        CLKDEV_DEV_ID("leds-renesas-tpu.21", &mstp_clks[MSTP302]), /* TPU2 */
+        CLKDEV_DEV_ID("leds-renesas-tpu.30", &mstp_clks[MSTP301]), /* TPU3 */
+        CLKDEV_DEV_ID("leds-renesas-tpu.41", &mstp_clks[MSTP300]), /* TPU4 */
         CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */
         CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */
         CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/include/mach/gpio.h
index 7bf0890e16ba..de795b42232a 100644
--- a/arch/arm/mach-shmobile/include/mach/gpio.h
+++ b/arch/arm/mach-shmobile/include/mach/gpio.h
@@ -12,8 +12,6 @@
 
 #include <linux/kernel.h>
 #include <linux/errno.h>
-
-#define ARCH_NR_GPIOS 1024
 #include <linux/sh_pfc.h>
 
 #ifdef CONFIG_GPIOLIB
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
index b8f31c3935f7..14276e5a98d2 100644
--- a/arch/arm/mach-spear3xx/include/mach/generic.h
+++ b/arch/arm/mach-spear3xx/include/mach/generic.h
@@ -42,6 +42,8 @@ void __init spear3xx_map_io(void);
 void __init spear3xx_init_irq(void);
 void __init spear3xx_init(void);
 
+void spear_restart(char, const char *);
+
 /* pad mux declarations */
 #define PMX_FIRDA_MASK          (1 << 14)
 #define PMX_I2C_MASK            (1 << 13)
diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c
index 61068ba67923..3462ab9d6122 100644
--- a/arch/arm/mach-spear3xx/spear300_evb.c
+++ b/arch/arm/mach-spear3xx/spear300_evb.c
@@ -71,4 +71,5 @@ MACHINE_START(SPEAR300, "ST-SPEAR300-EVB")
         .handle_irq     =       vic_handle_irq,
         .timer          =       &spear3xx_timer,
         .init_machine   =       spear300_evb_init,
+        .restart        =       spear_restart,
 MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c
index 7903abe92bf6..f92c4993f65a 100644
--- a/arch/arm/mach-spear3xx/spear310_evb.c
+++ b/arch/arm/mach-spear3xx/spear310_evb.c
@@ -77,4 +77,5 @@ MACHINE_START(SPEAR310, "ST-SPEAR310-EVB")
         .handle_irq     =       vic_handle_irq,
         .timer          =       &spear3xx_timer,
         .init_machine   =       spear310_evb_init,
+        .restart        =       spear_restart,
 MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c
index e9751f970933..105334ab7021 100644
--- a/arch/arm/mach-spear3xx/spear320_evb.c
+++ b/arch/arm/mach-spear3xx/spear320_evb.c
@@ -75,4 +75,5 @@ MACHINE_START(SPEAR320, "ST-SPEAR320-EVB")
         .handle_irq     =       vic_handle_irq,
         .timer          =       &spear3xx_timer,
         .init_machine   =       spear320_evb_init,
+        .restart        =       spear_restart,
 MACHINE_END
diff --git a/arch/arm/mach-spear6xx/include/mach/generic.h b/arch/arm/mach-spear6xx/include/mach/generic.h
index 183f0238c5e2..116b99301cf5 100644
--- a/arch/arm/mach-spear6xx/include/mach/generic.h
+++ b/arch/arm/mach-spear6xx/include/mach/generic.h
@@ -41,6 +41,8 @@ void __init spear6xx_init(void);
 void __init spear600_init(void);
 void __init spear6xx_clk_init(void);
 
+void spear_restart(char, const char *);
+
 /* Add spear600 machine device structure declarations here */
 
 #endif /* __MACH_GENERIC_H */
diff --git a/arch/arm/mach-spear6xx/spear600_evb.c b/arch/arm/mach-spear6xx/spear600_evb.c
index ff139ed0a61e..c6e4254741cc 100644
--- a/arch/arm/mach-spear6xx/spear600_evb.c
+++ b/arch/arm/mach-spear6xx/spear600_evb.c
@@ -50,4 +50,5 @@ MACHINE_START(SPEAR600, "ST-SPEAR600-EVB")
         .handle_irq     =       vic_handle_irq,
         .timer          =       &spear6xx_timer,
         .init_machine   =       spear600_evb_init,
+        .restart        =       spear_restart,
 MACHINE_END
diff --git a/arch/arm/mach-tcc8k/Kconfig b/arch/arm/mach-tcc8k/Kconfig
deleted file mode 100644
index ad86415d1577..000000000000
--- a/arch/arm/mach-tcc8k/Kconfig
+++ /dev/null
@@ -1,11 +0,0 @@
-if ARCH_TCC8K
-
-comment "TCC8000 systems:"
-
-config MACH_TCC8000_SDK
-        bool "Telechips TCC8000-SDK development kit"
-        default y
-        help
-          Support for the Telechips TCC8000-SDK board.
-
-endif
diff --git a/arch/arm/mach-tcc8k/Makefile b/arch/arm/mach-tcc8k/Makefile
deleted file mode 100644
index 9bacf31e49ba..000000000000
--- a/arch/arm/mach-tcc8k/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# Makefile for TCC8K boards and common files.
-#
-
-# Common support
-obj-y += clock.o irq.o time.o io.o devices.o
-
-# Board specific support
-obj-$(CONFIG_MACH_TCC8000_SDK) += board-tcc8000-sdk.o
diff --git a/arch/arm/mach-tcc8k/Makefile.boot b/arch/arm/mach-tcc8k/Makefile.boot
deleted file mode 100644
index 5e02d4156b04..000000000000
--- a/arch/arm/mach-tcc8k/Makefile.boot
+++ /dev/null
@@ -1,3 +0,0 @@
-   zreladdr-y           += 0x20008000
-params_phys-y           := 0x20000100
-initrd_phys-y           := 0x20800000
diff --git a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c b/arch/arm/mach-tcc8k/board-tcc8000-sdk.c
deleted file mode 100644
index 777a5bb9eed2..000000000000
--- a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-
-#include <asm/mach-types.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/time.h>
-
-#include <mach/clock.h>
-#include <mach/tcc-nand.h>
-#include <mach/tcc8k-regs.h>
-
-#include "common.h"
-
-#define XI_FREQUENCY    12000000
-#define XTI_FREQUENCY   32768
-
-#ifdef CONFIG_MTD_NAND_TCC
-/* NAND */
-static struct tcc_nand_platform_data tcc8k_sdk_nand_data = {
-        .width = 1,
-        .hw_ecc = 0,
-};
-#endif
-
-static void __init tcc8k_init(void)
-{
-#ifdef CONFIG_MTD_NAND_TCC
-        tcc_nand_device.dev.platform_data = &tcc8k_sdk_nand_data;
-        platform_device_register(&tcc_nand_device);
-#endif
-}
-
-static void __init tcc8k_init_timer(void)
-{
-        tcc_clocks_init(XI_FREQUENCY, XTI_FREQUENCY);
-}
-
-static struct sys_timer tcc8k_timer = {
-        .init   = tcc8k_init_timer,
-};
-
-static void __init tcc8k_map_io(void)
-{
-        tcc8k_map_common_io();
-
-        /* set PLL0 clock to 96MHz, adapt UART0 divisor */
-        __raw_writel(0x00026003, CKC_BASE + PLL0CFG_OFFS);
-        __raw_writel(0x10000001, CKC_BASE + ACLKUART0_OFFS);
-
-        /* set PLL1 clock to 192MHz */
-        __raw_writel(0x00016003, CKC_BASE + PLL1CFG_OFFS);
-
-        /* set PLL2 clock to 48MHz */
-        __raw_writel(0x00036003, CKC_BASE + PLL2CFG_OFFS);
-
-        /* with CPU freq higher than 150 MHz, need extra DTCM wait */
-        __raw_writel(0x00000001, SCFG_BASE + DTCMWAIT_OFFS);
-
-        /* PLL locking time as specified */
-        udelay(300);
-}
-
-MACHINE_START(TCC8000_SDK, "Telechips TCC8000-SDK Demo Board")
-        .atag_offset    = 0x100,
-        .map_io         = tcc8k_map_io,
-        .init_irq       = tcc8k_init_irq,
-        .init_machine   = tcc8k_init,
-        .timer          = &tcc8k_timer,
-MACHINE_END
diff --git a/arch/arm/mach-tcc8k/clock.c b/arch/arm/mach-tcc8k/clock.c
deleted file mode 100644
index e7cdae5c77a4..000000000000
--- a/arch/arm/mach-tcc8k/clock.c
+++ /dev/null
@@ -1,580 +0,0 @@
-/*
- * Lowlevel clock handling for Telechips TCC8xxx SoCs
- *
- * Copyright (C) 2010 by Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GPL v2
- */
-
-#include <linux/clk.h>
-#include <linux/delay.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/module.h>
-#include <linux/spinlock.h>
-#include <linux/clkdev.h>
-
-#include <mach/clock.h>
-#include <mach/irqs.h>
-#include <mach/tcc8k-regs.h>
-
-#include "common.h"
-
-#define BCLKCTR0        (CKC_BASE + BCLKCTR0_OFFS)
-#define BCLKCTR1        (CKC_BASE + BCLKCTR1_OFFS)
-
-#define ACLKREF         (CKC_BASE + ACLKREF_OFFS)
-#define ACLKUART0       (CKC_BASE + ACLKUART0_OFFS)
-#define ACLKUART1       (CKC_BASE + ACLKUART1_OFFS)
-#define ACLKUART2       (CKC_BASE + ACLKUART2_OFFS)
-#define ACLKUART3       (CKC_BASE + ACLKUART3_OFFS)
-#define ACLKUART4       (CKC_BASE + ACLKUART4_OFFS)
-#define ACLKI2C         (CKC_BASE + ACLKI2C_OFFS)
-#define ACLKADC         (CKC_BASE + ACLKADC_OFFS)
-#define ACLKUSBH        (CKC_BASE + ACLKUSBH_OFFS)
-#define ACLKLCD         (CKC_BASE + ACLKLCD_OFFS)
-#define ACLKSDH0        (CKC_BASE + ACLKSDH0_OFFS)
-#define ACLKSDH1        (CKC_BASE + ACLKSDH1_OFFS)
-#define ACLKSPI0        (CKC_BASE + ACLKSPI0_OFFS)
-#define ACLKSPI1        (CKC_BASE + ACLKSPI1_OFFS)
-#define ACLKSPDIF       (CKC_BASE + ACLKSPDIF_OFFS)
-#define ACLKC3DEC       (CKC_BASE + ACLKC3DEC_OFFS)
-#define ACLKCAN0        (CKC_BASE + ACLKCAN0_OFFS)
-#define ACLKCAN1        (CKC_BASE + ACLKCAN1_OFFS)
-#define ACLKGSB0        (CKC_BASE + ACLKGSB0_OFFS)
-#define ACLKGSB1        (CKC_BASE + ACLKGSB1_OFFS)
-#define ACLKGSB2        (CKC_BASE + ACLKGSB2_OFFS)
-#define ACLKGSB3        (CKC_BASE + ACLKGSB3_OFFS)
-#define ACLKTCT         (CKC_BASE + ACLKTCT_OFFS)
-#define ACLKTCX         (CKC_BASE + ACLKTCX_OFFS)
-#define ACLKTCZ         (CKC_BASE + ACLKTCZ_OFFS)
-
-#define ACLK_MAX_DIV    (0xfff + 1)
-
-/* Crystal frequencies */
-static unsigned long xi_rate, xti_rate;
-
-static void __iomem *pll_cfg_addr(int pll)
-{
-        switch (pll) {
-        case 0: return (CKC_BASE + PLL0CFG_OFFS);
-        case 1: return (CKC_BASE + PLL1CFG_OFFS);
-        case 2: return (CKC_BASE + PLL2CFG_OFFS);
-        default:
-                BUG();
-        }
-}
-
-static int pll_enable(int pll, int enable)
-{
-        u32 reg;
-        void __iomem *addr = pll_cfg_addr(pll);
-
-        reg = __raw_readl(addr);
-        if (enable)
-                reg &= ~PLLxCFG_PD;
-        else
-                reg |= PLLxCFG_PD;
-
-        __raw_writel(reg, addr);
-        return 0;
-}
-
-static int xi_enable(int enable)
-{
-        u32 reg;
-
-        reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS);
-        if (enable)
-                reg |= CLKCTRL_XE;
-        else
-                reg &= ~CLKCTRL_XE;
-
-        __raw_writel(reg, CKC_BASE + CLKCTRL_OFFS);
-        return 0;
-}
-
-static int root_clk_enable(enum root_clks src)
-{
-        switch (src) {
-        case CLK_SRC_PLL0: return pll_enable(0, 1);
-        case CLK_SRC_PLL1: return pll_enable(1, 1);
-        case CLK_SRC_PLL2: return pll_enable(2, 1);
-        case CLK_SRC_XI: return xi_enable(1);
-        default:
-                BUG();
-        }
-        return 0;
-}
-
-static int root_clk_disable(enum root_clks src)
-{
-        switch (src) {
-        case CLK_SRC_PLL0: return pll_enable(0, 0);
-        case CLK_SRC_PLL1: return pll_enable(1, 0);
-        case CLK_SRC_PLL2: return pll_enable(2, 0);
-        case CLK_SRC_XI: return xi_enable(0);
-        default:
-                BUG();
-        }
-        return 0;
-}
-
-static int enable_clk(struct clk *clk)
-{
-        u32 reg;
-
-        if (clk->root_id != CLK_SRC_NOROOT)
-                return root_clk_enable(clk->root_id);
-
-        if (clk->aclkreg) {
-                reg = __raw_readl(clk->aclkreg);
-                reg |= ACLK_EN;
-                __raw_writel(reg, clk->aclkreg);
-        }
-        if (clk->bclkctr) {
-                reg = __raw_readl(clk->bclkctr);
-                reg |= 1 << clk->bclk_shift;
-                __raw_writel(reg, clk->bclkctr);
-        }
-        return 0;
-}
-
-static void disable_clk(struct clk *clk)
-{
-        u32 reg;
-
-        if (clk->root_id != CLK_SRC_NOROOT) {
-                root_clk_disable(clk->root_id);
-                return;
-        }
-
-        if (clk->bclkctr) {
-                reg = __raw_readl(clk->bclkctr);
-                reg &= ~(1 << clk->bclk_shift);
-                __raw_writel(reg, clk->bclkctr);
-        }
-        if (clk->aclkreg) {
-                reg = __raw_readl(clk->aclkreg);
-                reg &= ~ACLK_EN;
-                __raw_writel(reg, clk->aclkreg);
-        }
-}
-
-static unsigned long get_rate_pll(int pll)
-{
-        u32 reg;
-        unsigned long s, m, p;
-        void __iomem *addr = pll_cfg_addr(pll);
-
-        reg = __raw_readl(addr);
-        s = (reg >> 16) & 0x07;
-        m = (reg >> 8) & 0xff;
-        p = reg & 0x3f;
-
-        return (m * xi_rate) / (p * (1 << s));
-}
-
-static unsigned long get_rate_pll_div(int pll)
-{
-        u32 reg;
-        unsigned long div = 0;
-        void __iomem *addr;
-
-        switch (pll) {
-        case 0:
-                addr = CKC_BASE + CLKDIVC0_OFFS;
-                reg = __raw_readl(addr);
-                if (reg & CLKDIVC0_P0E)
-                        div = (reg >> 24) & 0x3f;
-                break;
-        case 1:
-                addr = CKC_BASE + CLKDIVC0_OFFS;
-                reg = __raw_readl(addr);
-                if (reg & CLKDIVC0_P1E)
-                        div = (reg >> 16) & 0x3f;
-                break;
-        case 2:
-                addr = CKC_BASE + CLKDIVC1_OFFS;
-                reg = __raw_readl(addr);
-                if (reg & CLKDIVC1_P2E)
-                        div = reg & 0x3f;
-                break;
-        }
-        return get_rate_pll(pll) / (div + 1);
-}
-
-static unsigned long get_rate_xi_div(void)
-{
-        unsigned long div = 0;
-        u32 reg = __raw_readl(CKC_BASE + CLKDIVC0_OFFS);
-
-        if (reg & CLKDIVC0_XE)
-                div = (reg >> 8) & 0x3f;
-
-        return xi_rate / (div + 1);
-}
-
-static unsigned long get_rate_xti_div(void)
-{
-        unsigned long div = 0;
-        u32 reg = __raw_readl(CKC_BASE + CLKDIVC0_OFFS);
-
-        if (reg & CLKDIVC0_XTE)
-                div = reg & 0x3f;
-
-        return xti_rate / (div + 1);
-}
-
-static unsigned long root_clk_get_rate(enum root_clks src)
-{
-        switch (src) {
-        case CLK_SRC_PLL0: return get_rate_pll(0);
-        case CLK_SRC_PLL1: return get_rate_pll(1);
-        case CLK_SRC_PLL2: return get_rate_pll(2);
-        case CLK_SRC_PLL0DIV: return get_rate_pll_div(0);
-        case CLK_SRC_PLL1DIV: return get_rate_pll_div(1);
-        case CLK_SRC_PLL2DIV: return get_rate_pll_div(2);
-        case CLK_SRC_XI: return xi_rate;
-        case CLK_SRC_XTI: return xti_rate;
-        case CLK_SRC_XIDIV: return get_rate_xi_div();
-        case CLK_SRC_XTIDIV: return get_rate_xti_div();
-        default: return 0;
-        }
-}
-
-static unsigned long aclk_get_rate(struct clk *clk)
-{
-        u32 reg;
-        unsigned long div;
-        unsigned int src;
-
-        reg = __raw_readl(clk->aclkreg);
-        div = reg & 0x0fff;
-        src = (reg >> ACLK_SEL_SHIFT) & CLK_SRC_MASK;
-        return root_clk_get_rate(src) / (div + 1);
-}
-
-static unsigned long aclk_best_div(struct clk *clk, unsigned long rate)
-{
-        unsigned long div, src, freq, r1, r2;
-
-        if (!rate)
-                return ACLK_MAX_DIV;
-
-        src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT;
-        src &= CLK_SRC_MASK;
-        freq = root_clk_get_rate(src);
-        div = freq / rate;
-        if (!div)
-                return 1;
-        if (div >= ACLK_MAX_DIV)
-                return ACLK_MAX_DIV;
-        r1 = freq / div;
-        r2 = freq / (div + 1);
-        if ((rate - r2) < (r1 - rate))
-                return div + 1;
-
-        return div;
-}
-
-static unsigned long aclk_round_rate(struct clk *clk, unsigned long rate)
-{
-        unsigned int src;
-
-        src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT;
-        src &= CLK_SRC_MASK;
-
-        return root_clk_get_rate(src) / aclk_best_div(clk, rate);
-}
-
-static int aclk_set_rate(struct clk *clk, unsigned long rate)
-{
-        u32 reg;
-
-        reg = __raw_readl(clk->aclkreg) & ~ACLK_DIV_MASK;
-        reg |= aclk_best_div(clk, rate) - 1;
-        __raw_writel(reg, clk->aclkreg);
-        return 0;
-}
-
-static unsigned long get_rate_sys(struct clk *clk)
-{
-        unsigned int src;
-
-        src = __raw_readl(CKC_BASE + CLKCTRL_OFFS) & CLK_SRC_MASK;
-        return root_clk_get_rate(src);
-}
-
-static unsigned long get_rate_bus(struct clk *clk)
-{
-        unsigned int reg, sdiv, bdiv, rate;
-
-        reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS);
-        rate = get_rate_sys(clk);
-        sdiv = (reg >> 20) & 3;
-        if (sdiv)
-                rate /= sdiv + 1;
-        bdiv = (reg >> 4) & 0xff;
-        if (bdiv)
-                rate /= bdiv + 1;
-        return rate;
-}
-
-static unsigned long get_rate_cpu(struct clk *clk)
-{
-        unsigned int reg, div, fsys, fbus;
-
-        fbus = get_rate_bus(clk);
-        reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS);
-        if (reg & (1 << 29))
-                return fbus;
-        fsys = get_rate_sys(clk);
-        div = (reg >> 16) & 0x0f;
-        return fbus + ((fsys - fbus) * (div + 1)) / 16;
-}
-
-static unsigned long get_rate_root(struct clk *clk)
-{
-        return root_clk_get_rate(clk->root_id);
-}
-
-static int aclk_set_parent(struct clk *clock, struct clk *parent)
-{
-        u32 reg;
-
-        if (clock->parent == parent)
-                return 0;
-
-        clock->parent = parent;
-
-        if (!parent)
-                return 0;
-
-        if (parent->root_id == CLK_SRC_NOROOT)
-                return 0;
-        reg = __raw_readl(clock->aclkreg);
-        reg &= ~ACLK_SEL_MASK;
-        reg |= (parent->root_id << ACLK_SEL_SHIFT) & ACLK_SEL_MASK;
-        __raw_writel(reg, clock->aclkreg);
-
-        return 0;
-}
-
-#define DEFINE_ROOT_CLOCK(name, ri, p)  \
-        static struct clk name = {              \
-                .root_id = ri,                  \
-                .get_rate = get_rate_root,                      \
-                .enable = enable_clk,           \
-                .disable = disable_clk,         \
-                .parent = p,                    \
-        };
-
-#define DEFINE_SPECIAL_CLOCK(name, gr, p)       \
-        static struct clk name = {              \
-                .root_id = CLK_SRC_NOROOT,      \
-                .get_rate = gr,                 \
-                .parent = p,                    \
-        };
-
-#define DEFINE_ACLOCK(name, bc, bs, ar)         \
-        static struct clk name = {              \
-                .root_id = CLK_SRC_NOROOT,      \
-                .bclkctr = bc,                  \
-                .bclk_shift = bs,               \
-                .aclkreg = ar,                  \
-                .get_rate = aclk_get_rate,      \
-                .set_rate = aclk_set_rate,      \
-                .round_rate = aclk_round_rate,  \
-                .enable = enable_clk,           \
-                .disable = disable_clk,         \
-                .set_parent = aclk_set_parent,  \
-        };
-
-#define DEFINE_BCLOCK(name, bc, bs, gr, p)      \
-        static struct clk name = {              \
-                .root_id = CLK_SRC_NOROOT,      \
-                .bclkctr = bc,                  \
-                .bclk_shift = bs,               \
-                .get_rate = gr,                 \
-                .enable = enable_clk,           \
-                .disable = disable_clk,         \
-                .parent = p,                    \
-        };
-
-DEFINE_ROOT_CLOCK(xi, CLK_SRC_XI, NULL)
-DEFINE_ROOT_CLOCK(xti, CLK_SRC_XTI, NULL)
-DEFINE_ROOT_CLOCK(xidiv, CLK_SRC_XIDIV, &xi)
-DEFINE_ROOT_CLOCK(xtidiv, CLK_SRC_XTIDIV, &xti)
-DEFINE_ROOT_CLOCK(pll0, CLK_SRC_PLL0, &xi)
-DEFINE_ROOT_CLOCK(pll1, CLK_SRC_PLL1, &xi)
-DEFINE_ROOT_CLOCK(pll2, CLK_SRC_PLL2, &xi)
-DEFINE_ROOT_CLOCK(pll0div, CLK_SRC_PLL0DIV, &pll0)
-DEFINE_ROOT_CLOCK(pll1div, CLK_SRC_PLL1DIV, &pll1)
-DEFINE_ROOT_CLOCK(pll2div, CLK_SRC_PLL2DIV, &pll2)
-
-/* The following 3 clocks are special and are initialized explicitly later */
-DEFINE_SPECIAL_CLOCK(sys, get_rate_sys, NULL)
-DEFINE_SPECIAL_CLOCK(bus, get_rate_bus, &sys)
-DEFINE_SPECIAL_CLOCK(cpu, get_rate_cpu, &sys)
-
-DEFINE_ACLOCK(tct, NULL, 0, ACLKTCT)
-DEFINE_ACLOCK(tcx, NULL, 0, ACLKTCX)
-DEFINE_ACLOCK(tcz, NULL, 0, ACLKTCZ)
-DEFINE_ACLOCK(ref, NULL, 0, ACLKREF)
-DEFINE_ACLOCK(uart0, BCLKCTR0, 5, ACLKUART0)
-DEFINE_ACLOCK(uart1, BCLKCTR0, 23, ACLKUART1)
-DEFINE_ACLOCK(uart2, BCLKCTR0, 6, ACLKUART2)
-DEFINE_ACLOCK(uart3, BCLKCTR0, 8, ACLKUART3)
-DEFINE_ACLOCK(uart4, BCLKCTR1, 6, ACLKUART4)
-DEFINE_ACLOCK(i2c, BCLKCTR0, 7, ACLKI2C)
-DEFINE_ACLOCK(adc, BCLKCTR0, 10, ACLKADC)
-DEFINE_ACLOCK(usbh0, BCLKCTR0, 11, ACLKUSBH)
-DEFINE_ACLOCK(lcd, BCLKCTR0, 13, ACLKLCD)
-DEFINE_ACLOCK(sd0, BCLKCTR0, 17, ACLKSDH0)
-DEFINE_ACLOCK(sd1, BCLKCTR1, 5, ACLKSDH1)
-DEFINE_ACLOCK(spi0, BCLKCTR0, 24, ACLKSPI0)
-DEFINE_ACLOCK(spi1, BCLKCTR0, 30, ACLKSPI1)
-DEFINE_ACLOCK(spdif, BCLKCTR1, 2, ACLKSPDIF)
-DEFINE_ACLOCK(c3dec, BCLKCTR1, 9, ACLKC3DEC)
-DEFINE_ACLOCK(can0, BCLKCTR1, 10, ACLKCAN0)
-DEFINE_ACLOCK(can1, BCLKCTR1, 11, ACLKCAN1)
-DEFINE_ACLOCK(gsb0, BCLKCTR1, 13, ACLKGSB0)
-DEFINE_ACLOCK(gsb1, BCLKCTR1, 14, ACLKGSB1)
-DEFINE_ACLOCK(gsb2, BCLKCTR1, 15, ACLKGSB2)
-DEFINE_ACLOCK(gsb3, BCLKCTR1, 16, ACLKGSB3)
-DEFINE_ACLOCK(usbh1, BCLKCTR1, 20, ACLKUSBH)
-
-DEFINE_BCLOCK(dai0, BCLKCTR0, 0, NULL, NULL)
-DEFINE_BCLOCK(pic, BCLKCTR0, 1, NULL, NULL)
-DEFINE_BCLOCK(tc, BCLKCTR0, 2, NULL, NULL)
-DEFINE_BCLOCK(gpio, BCLKCTR0, 3, NULL, NULL)
-DEFINE_BCLOCK(usbd, BCLKCTR0, 4, NULL, NULL)
-DEFINE_BCLOCK(ecc, BCLKCTR0, 9, NULL, NULL)
-DEFINE_BCLOCK(gdma0, BCLKCTR0, 12, NULL, NULL)
-DEFINE_BCLOCK(rtc, BCLKCTR0, 15, NULL, NULL)
-DEFINE_BCLOCK(nfc, BCLKCTR0, 16, NULL, NULL)
-DEFINE_BCLOCK(g2d, BCLKCTR0, 18, NULL, NULL)
-DEFINE_BCLOCK(gdma1, BCLKCTR0, 22, NULL, NULL)
-DEFINE_BCLOCK(mscl, BCLKCTR0, 25, NULL, NULL)
-DEFINE_BCLOCK(bdma, BCLKCTR1, 0, NULL, NULL)
-DEFINE_BCLOCK(adma0, BCLKCTR1, 1, NULL, NULL)
-DEFINE_BCLOCK(scfg, BCLKCTR1, 3, NULL, NULL)
-DEFINE_BCLOCK(cid, BCLKCTR1, 4, NULL, NULL)
-DEFINE_BCLOCK(dai1, BCLKCTR1, 7, NULL, NULL)
-DEFINE_BCLOCK(adma1, BCLKCTR1, 8, NULL, NULL)
-DEFINE_BCLOCK(gps, BCLKCTR1, 12, NULL, NULL)
-DEFINE_BCLOCK(gdma2, BCLKCTR1, 17, NULL, NULL)
-DEFINE_BCLOCK(gdma3, BCLKCTR1, 18, NULL, NULL)
-DEFINE_BCLOCK(ddrc, BCLKCTR1, 19, NULL, NULL)
-
-#define _REGISTER_CLOCK(d, n, c) \
-        { \
-                .dev_id = d, \
-                .con_id = n, \
-                .clk = &c, \
-        },
-
-static struct clk_lookup lookups[] = {
-        _REGISTER_CLOCK(NULL, "bus", bus)
-        _REGISTER_CLOCK(NULL, "cpu", cpu)
-        _REGISTER_CLOCK(NULL, "tct", tct)
-        _REGISTER_CLOCK(NULL, "tcx", tcx)
-        _REGISTER_CLOCK(NULL, "tcz", tcz)
-        _REGISTER_CLOCK(NULL, "ref", ref)
-        _REGISTER_CLOCK(NULL, "dai0", dai0)
-        _REGISTER_CLOCK(NULL, "pic", pic)
-        _REGISTER_CLOCK(NULL, "tc", tc)
-        _REGISTER_CLOCK(NULL, "gpio", gpio)
-        _REGISTER_CLOCK(NULL, "usbd", usbd)
-        _REGISTER_CLOCK("tcc-uart.0", NULL, uart0)
-        _REGISTER_CLOCK("tcc-uart.2", NULL, uart2)
-        _REGISTER_CLOCK("tcc-i2c", NULL, i2c)
-        _REGISTER_CLOCK("tcc-uart.3", NULL, uart3)
-        _REGISTER_CLOCK(NULL, "ecc", ecc)
-        _REGISTER_CLOCK(NULL, "adc", adc)
-        _REGISTER_CLOCK("tcc-usbh.0", "usb", usbh0)
-        _REGISTER_CLOCK(NULL, "gdma0", gdma0)
-        _REGISTER_CLOCK(NULL, "lcd", lcd)
-        _REGISTER_CLOCK(NULL, "rtc", rtc)
-        _REGISTER_CLOCK(NULL, "nfc", nfc)
-        _REGISTER_CLOCK("tcc-mmc.0", NULL, sd0)
-        _REGISTER_CLOCK(NULL, "g2d", g2d)
-        _REGISTER_CLOCK(NULL, "gdma1", gdma1)
-        _REGISTER_CLOCK("tcc-uart.1", NULL, uart1)
-        _REGISTER_CLOCK("tcc-spi.0", NULL, spi0)
-        _REGISTER_CLOCK(NULL, "mscl", mscl)
-        _REGISTER_CLOCK("tcc-spi.1", NULL, spi1)
-        _REGISTER_CLOCK(NULL, "bdma", bdma)
-        _REGISTER_CLOCK(NULL, "adma0", adma0)
-        _REGISTER_CLOCK(NULL, "spdif", spdif)
-        _REGISTER_CLOCK(NULL, "scfg", scfg)
-        _REGISTER_CLOCK(NULL, "cid", cid)
-        _REGISTER_CLOCK("tcc-mmc.1", NULL, sd1)
-        _REGISTER_CLOCK("tcc-uart.4", NULL, uart4)
-        _REGISTER_CLOCK(NULL, "dai1", dai1)
-        _REGISTER_CLOCK(NULL, "adma1", adma1)
-        _REGISTER_CLOCK(NULL, "c3dec", c3dec)
-        _REGISTER_CLOCK("tcc-can.0", NULL, can0)
-        _REGISTER_CLOCK("tcc-can.1", NULL, can1)
-        _REGISTER_CLOCK(NULL, "gps", gps)
-        _REGISTER_CLOCK("tcc-gsb.0", NULL, gsb0)
-        _REGISTER_CLOCK("tcc-gsb.1", NULL, gsb1)
-        _REGISTER_CLOCK("tcc-gsb.2", NULL, gsb2)
-        _REGISTER_CLOCK("tcc-gsb.3", NULL, gsb3)
-        _REGISTER_CLOCK(NULL, "gdma2", gdma2)
-        _REGISTER_CLOCK(NULL, "gdma3", gdma3)
-        _REGISTER_CLOCK(NULL, "ddrc", ddrc)
-        _REGISTER_CLOCK("tcc-usbh.1", "usb", usbh1)
-};
-
-static struct clk *root_clk_by_index(enum root_clks src)
-{
-        switch (src) {
-        case CLK_SRC_PLL0: return &pll0;
-        case CLK_SRC_PLL1: return &pll1;
-        case CLK_SRC_PLL2: return &pll2;
-        case CLK_SRC_PLL0DIV: return &pll0div;
-        case CLK_SRC_PLL1DIV: return &pll1div;
-        case CLK_SRC_PLL2DIV: return &pll2div;
-        case CLK_SRC_XI: return &xi;
-        case CLK_SRC_XTI: return &xti;
-        case CLK_SRC_XIDIV: return &xidiv;
-        case CLK_SRC_XTIDIV: return &xtidiv;
-        default: return NULL;
-        }
-}
-
-static void find_aclk_parent(struct clk *clk)
-{
-        unsigned int src;
-        struct clk *clock;
-
-        if (!clk->aclkreg)
-                return;
-
-        src = __raw_readl(clk->aclkreg) >> ACLK_SEL_SHIFT;
-        src &= CLK_SRC_MASK;
-
-        clock = root_clk_by_index(src);
-        if (!clock)
-                return;
-
-        clk->parent = clock;
-        clk->set_parent = aclk_set_parent;
-}
-
-void __init tcc_clocks_init(unsigned long xi_freq, unsigned long xti_freq)
-{
-        int i;
-
-        xi_rate = xi_freq;
-        xti_rate = xti_freq;
-
-        /* fixup parents and add the clock */
-        for (i = 0; i < ARRAY_SIZE(lookups); i++) {
-                find_aclk_parent(lookups[i].clk);
-                clkdev_add(&lookups[i]);
-        }
-        tcc8k_timer_init(&tcz, (void __iomem *)TIMER_BASE, INT_TC32);
-}
diff --git a/arch/arm/mach-tcc8k/common.h b/arch/arm/mach-tcc8k/common.h
deleted file mode 100644
index 705690add395..000000000000
--- a/arch/arm/mach-tcc8k/common.h
+++ /dev/null
@@ -1,15 +0,0 @@
-#ifndef MACH_TCC8K_COMMON_H
-#define MACH_TCC8K_COMMON_H
-
-#include <linux/platform_device.h>
-
-extern struct platform_device tcc_nand_device;
-
-struct clk;
-
-extern void tcc_clocks_init(unsigned long xi_freq, unsigned long xti_freq);
-extern void tcc8k_timer_init(struct clk *clock, void __iomem *base, int irq);
-extern void tcc8k_init_irq(void);
-extern void tcc8k_map_common_io(void);
-
-#endif
diff --git a/arch/arm/mach-tcc8k/devices.c b/arch/arm/mach-tcc8k/devices.c
deleted file mode 100644
index 6722ad7c2836..000000000000
--- a/arch/arm/mach-tcc8k/devices.c
+++ /dev/null
@@ -1,239 +0,0 @@
-/*
- * linux/arch/arm/mach-tcc8k/devices.c
- *
- * Copyright (C) Telechips, Inc.
- * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of GPL v2.
- *
- */
-
-#include <linux/dma-mapping.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-
-#include <asm/mach/map.h>
-
-#include <mach/tcc8k-regs.h>
-#include <mach/irqs.h>
-
-#include "common.h"
-
-static u64 tcc8k_dmamask = DMA_BIT_MASK(32);
-
-#ifdef CONFIG_MTD_NAND_TCC
-/* NAND controller */
-static struct resource tcc_nand_resources[] = {
-        {
-                .start  = (resource_size_t)NFC_BASE,
-                .end    = (resource_size_t)NFC_BASE + 0x7f,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = INT_NFC,
-                .end    = INT_NFC,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-struct platform_device tcc_nand_device = {
-        .name = "tcc_nand",
-        .id = 0,
-        .num_resources = ARRAY_SIZE(tcc_nand_resources),
-        .resource = tcc_nand_resources,
-};
-#endif
-
-#ifdef CONFIG_MMC_TCC8K
-/* MMC controller */
-static struct resource tcc8k_mmc0_resource[] = {
-        {
-                .start = INT_SD0,
-                .end   = INT_SD0,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-
-static struct resource tcc8k_mmc1_resource[] = {
-        {
-                .start = INT_SD1,
-                .end   = INT_SD1,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-
-struct platform_device tcc8k_mmc0_device = {
-        .name           = "tcc-mmc",
-        .id             = 0,
-        .num_resources  = ARRAY_SIZE(tcc8k_mmc0_resource),
-        .resource       = tcc8k_mmc0_resource,
-        .dev            = {
-                .dma_mask               = &tcc8k_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        }
-};
-
-struct platform_device tcc8k_mmc1_device = {
-        .name           = "tcc-mmc",
-        .id             = 1,
-        .num_resources  = ARRAY_SIZE(tcc8k_mmc1_resource),
-        .resource       = tcc8k_mmc1_resource,
-        .dev            = {
-                .dma_mask               = &tcc8k_dmamask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        }
-};
-
-static inline void tcc8k_init_mmc(void)
-{
-        u32 reg = __raw_readl(GPIOPS_BASE + GPIOPS_FS1_OFFS);
-
-        reg |= GPIOPS_FS1_SDH0_BITS | GPIOPS_FS1_SDH1_BITS;
-        __raw_writel(reg, GPIOPS_BASE + GPIOPS_FS1_OFFS);
-
-        platform_device_register(&tcc8k_mmc0_device);
-        platform_device_register(&tcc8k_mmc1_device);
-}
-#else
-static inline void tcc8k_init_mmc(void) { }
-#endif
-
-#ifdef CONFIG_USB_OHCI_HCD
-static int tcc8k_ohci_init(struct device *dev)
-{
-        u32 reg;
-
-        /* Use GPIO PK19 as VBUS control output */
-        reg = __raw_readl(GPIOPK_BASE + GPIOPK_FS0_OFFS);
-        reg &= ~(1 << 19);
-        __raw_writel(reg, GPIOPK_BASE + GPIOPK_FS0_OFFS);
-        reg = __raw_readl(GPIOPK_BASE + GPIOPK_FS1_OFFS);
-        reg &= ~(1 << 19);
-        __raw_writel(reg, GPIOPK_BASE + GPIOPK_FS1_OFFS);
-
-        reg = __raw_readl(GPIOPK_BASE + GPIOPK_DOE_OFFS);
-        reg |= (1 << 19);
-        __raw_writel(reg, GPIOPK_BASE + GPIOPK_DOE_OFFS);
-        /* Turn on VBUS */
-        reg = __raw_readl(GPIOPK_BASE + GPIOPK_DAT_OFFS);
-        reg |= (1 << 19);
-        __raw_writel(reg, GPIOPK_BASE + GPIOPK_DAT_OFFS);
-
-        return 0;
-}
-
-static struct resource tcc8k_ohci0_resources[] = {
-        [0] = {
-                .start = (resource_size_t)USBH0_BASE,
-                .end   = (resource_size_t)USBH0_BASE + 0x5c,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = INT_USBH0,
-                .end   = INT_USBH0,
-                .flags = IORESOURCE_IRQ,
-        }
-};
-
-static struct resource tcc8k_ohci1_resources[] = {
-        [0] = {
-                .start = (resource_size_t)USBH1_BASE,
-                .end   = (resource_size_t)USBH1_BASE + 0x5c,
-                .flags = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start = INT_USBH1,
-                .end   = INT_USBH1,
-                .flags = IORESOURCE_IRQ,
-        }
-};
-
-static struct tccohci_platform_data tcc8k_ohci0_platform_data = {
-        .controller     = 0,
-        .port_mode      = PMM_PERPORT_MODE,
-        .init           = tcc8k_ohci_init,
-};
-
-static struct tccohci_platform_data tcc8k_ohci1_platform_data = {
-        .controller     = 1,
-        .port_mode      = PMM_PERPORT_MODE,
-        .init           = tcc8k_ohci_init,
-};
-
-static struct platform_device ohci0_device = {
-        .name = "tcc-ohci",
-        .id = 0,
-        .dev = {
-                .dma_mask = &tcc8k_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &tcc8k_ohci0_platform_data,
-        },
-        .num_resources  = ARRAY_SIZE(tcc8k_ohci0_resources),
-        .resource       = tcc8k_ohci0_resources,
-};
-
-static struct platform_device ohci1_device = {
-        .name = "tcc-ohci",
-        .id = 1,
-        .dev = {
-                .dma_mask = &tcc8k_dmamask,
-                .coherent_dma_mask = DMA_BIT_MASK(32),
-                .platform_data = &tcc8k_ohci1_platform_data,
-        },
-        .num_resources  = ARRAY_SIZE(tcc8k_ohci1_resources),
-        .resource       = tcc8k_ohci1_resources,
-};
-
-static void __init tcc8k_init_usbhost(void)
-{
-        platform_device_register(&ohci0_device);
-        platform_device_register(&ohci1_device);
-}
-#else
-static void __init tcc8k_init_usbhost(void) { }
-#endif
-
-/* USB device controller*/
-#ifdef CONFIG_USB_GADGET_TCC8K
-static struct resource udc_resources[] = {
-        [0] = {
-                .start = INT_USBD,
-                .end   = INT_USBD,
-                .flags = IORESOURCE_IRQ,
-        },
-        [1] = {
-                .start = INT_UDMA,
-                .end   = INT_UDMA,
-                .flags = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device tcc8k_udc_device = {
-        .name = "tcc-udc",
-        .id = 0,
-        .resource = udc_resources,
-        .num_resources = ARRAY_SIZE(udc_resources),
-        .dev = {
-                 .dma_mask = &tcc8k_dmamask,
-                 .coherent_dma_mask = DMA_BIT_MASK(32),
-        },
-};
-
-static void __init tcc8k_init_usb_gadget(void)
-{
-        platform_device_register(&tcc8k_udc_device);
-}
-#else
-static void __init tcc8k_init_usb_gadget(void) { }
-#endif  /* CONFIG_USB_GADGET_TCC83X */
-
-static int __init tcc8k_init_devices(void)
-{
-        tcc8k_init_mmc();
-        tcc8k_init_usbhost();
-        tcc8k_init_usb_gadget();
-        return 0;
-}
-
-arch_initcall(tcc8k_init_devices);
diff --git a/arch/arm/mach-tcc8k/io.c b/arch/arm/mach-tcc8k/io.c
deleted file mode 100644
index 9b39d7fa658f..000000000000
--- a/arch/arm/mach-tcc8k/io.c
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * linux/arch/arm/mach-tcc8k/io.c
- *
- * (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * derived from TCC83xx io.c
- * Copyright (C) Telechips, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/kernel.h>
-
-#include <asm/mach/map.h>
-
-#include <mach/tcc8k-regs.h>
-
-/*
- * The machine specific code may provide the extra mapping besides the
- * default mapping provided here.
- */
-static struct map_desc tcc8k_io_desc[] __initdata = {
-        {
-                .virtual        = (unsigned long)CS1_BASE_VIRT,
-                .pfn            = __phys_to_pfn(CS1_BASE),
-                .length         = CS1_SIZE,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)AHB_PERI_BASE_VIRT,
-                .pfn            = __phys_to_pfn(AHB_PERI_BASE),
-                .length         = AHB_PERI_SIZE,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)APB0_PERI_BASE_VIRT,
-                .pfn            = __phys_to_pfn(APB0_PERI_BASE),
-                .length         = APB0_PERI_SIZE,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)APB1_PERI_BASE_VIRT,
-                .pfn            = __phys_to_pfn(APB1_PERI_BASE),
-                .length         = APB1_PERI_SIZE,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)EXT_MEM_CTRL_BASE_VIRT,
-                .pfn            = __phys_to_pfn(EXT_MEM_CTRL_BASE),
-                .length         = EXT_MEM_CTRL_SIZE,
-                .type           = MT_DEVICE,
-        },
-};
-
-/*
- * Maps common IO regions for tcc8k.
- *
- */
-void __init tcc8k_map_common_io(void)
-{
-        iotable_init(tcc8k_io_desc, ARRAY_SIZE(tcc8k_io_desc));
-}
diff --git a/arch/arm/mach-tcc8k/irq.c b/arch/arm/mach-tcc8k/irq.c
deleted file mode 100644
index 209fa5c65d4c..000000000000
--- a/arch/arm/mach-tcc8k/irq.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * Copyright (C) Telechips, Inc.
- * Copyright (C) 2009-2010 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GNU GPL version 2.
- */
-
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-
-#include <asm/irq.h>
-#include <asm/mach/irq.h>
-
-#include <mach/tcc8k-regs.h>
-#include <mach/irqs.h>
-
-#include "common.h"
-
-/* Disable IRQ */
-static void tcc8000_mask_ack_irq0(struct irq_data *d)
-{
-        PIC0_IEN &= ~(1 << d->irq);
-        PIC0_CREQ |=  (1 << d->irq);
-}
-
-static void tcc8000_mask_ack_irq1(struct irq_data *d)
-{
-        PIC1_IEN &= ~(1 << (d->irq - 32));
-        PIC1_CREQ |= (1 << (d->irq - 32));
-}
-
-static void tcc8000_mask_irq0(struct irq_data *d)
-{
-        PIC0_IEN &= ~(1 << d->irq);
-}
-
-static void tcc8000_mask_irq1(struct irq_data *d)
-{
-        PIC1_IEN &= ~(1 << (d->irq - 32));
-}
-
-static void tcc8000_ack_irq0(struct irq_data *d)
-{
-        PIC0_CREQ |=  (1 << d->irq);
-}
-
-static void tcc8000_ack_irq1(struct irq_data *d)
-{
-        PIC1_CREQ |= (1 << (d->irq - 32));
-}
-
-/* Enable IRQ */
-static void tcc8000_unmask_irq0(struct irq_data *d)
-{
-        PIC0_IEN |= (1 << d->irq);
-        PIC0_INTOEN |= (1 << d->irq);
-}
-
-static void tcc8000_unmask_irq1(struct irq_data *d)
-{
-        PIC1_IEN |= (1 << (d->irq - 32));
-        PIC1_INTOEN |= (1 << (d->irq - 32));
-}
-
-static struct irq_chip tcc8000_irq_chip0 = {
-        .name           = "tcc_irq0",
-        .irq_mask       = tcc8000_mask_irq0,
-        .irq_ack        = tcc8000_ack_irq0,
-        .irq_mask_ack   = tcc8000_mask_ack_irq0,
-        .irq_unmask     = tcc8000_unmask_irq0,
-};
-
-static struct irq_chip tcc8000_irq_chip1 = {
-        .name           = "tcc_irq1",
-        .irq_mask       = tcc8000_mask_irq1,
-        .irq_ack        = tcc8000_ack_irq1,
-        .irq_mask_ack   = tcc8000_mask_ack_irq1,
-        .irq_unmask     = tcc8000_unmask_irq1,
-};
-
-void __init tcc8k_init_irq(void)
-{
-        int irqno;
-
-        /* Mask and clear all interrupts */
-        PIC0_IEN = 0x00000000;
-        PIC0_CREQ = 0xffffffff;
-        PIC1_IEN = 0x00000000;
-        PIC1_CREQ = 0xffffffff;
-
-        PIC0_MEN0 = 0x00000003;
-        PIC1_MEN1 = 0x00000003;
-        PIC1_MEN = 0x00000003;
-
-        /* let all IRQs be level triggered */
-        PIC0_TMODE = 0xffffffff;
-        PIC1_TMODE = 0xffffffff;
-        /* all IRQs are IRQs (not FIQs) */
-        PIC0_IRQSEL = 0xffffffff;
-        PIC1_IRQSEL = 0xffffffff;
-
-        for (irqno = 0; irqno < NR_IRQS; irqno++) {
-                if (irqno < 32)
-                        irq_set_chip(irqno, &tcc8000_irq_chip0);
-                else
-                        irq_set_chip(irqno, &tcc8000_irq_chip1);
-                irq_set_handler(irqno, handle_level_irq);
-                set_irq_flags(irqno, IRQF_VALID);
-        }
-}
diff --git a/arch/arm/mach-tcc8k/time.c b/arch/arm/mach-tcc8k/time.c
deleted file mode 100644
index a96babe83771..000000000000
--- a/arch/arm/mach-tcc8k/time.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * TCC8000 system timer setup
- *
- * (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GPL version 2.
- *
- */
-
-#include <linux/clk.h>
-#include <linux/clockchips.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/kernel.h>
-#include <linux/spinlock.h>
-
-#include <asm/mach/time.h>
-
-#include <mach/tcc8k-regs.h>
-#include <mach/irqs.h>
-
-#include "common.h"
-
-static void __iomem *timer_base;
-
-static int tcc_set_next_event(unsigned long evt,
-                              struct clock_event_device *unused)
-{
-        unsigned long reg = __raw_readl(timer_base + TC32MCNT_OFFS);
-
-        __raw_writel(reg + evt, timer_base + TC32CMP0_OFFS);
-        return 0;
-}
-
-static void tcc_set_mode(enum clock_event_mode mode,
-                                struct clock_event_device *evt)
-{
-        unsigned long tc32irq;
-
-        switch (mode) {
-        case CLOCK_EVT_MODE_ONESHOT:
-                tc32irq = __raw_readl(timer_base + TC32IRQ_OFFS);
-                tc32irq |= TC32IRQ_IRQEN0;
-                __raw_writel(tc32irq, timer_base + TC32IRQ_OFFS);
-                break;
-        case CLOCK_EVT_MODE_SHUTDOWN:
-        case CLOCK_EVT_MODE_UNUSED:
-                tc32irq = __raw_readl(timer_base + TC32IRQ_OFFS);
-                tc32irq &= ~TC32IRQ_IRQEN0;
-                __raw_writel(tc32irq, timer_base + TC32IRQ_OFFS);
-                break;
-        case CLOCK_EVT_MODE_PERIODIC:
-        case CLOCK_EVT_MODE_RESUME:
-                break;
-        }
-}
-
-static irqreturn_t tcc8k_timer_interrupt(int irq, void *dev_id)
-{
-        struct clock_event_device *evt = dev_id;
-
-        /* Acknowledge TC32 interrupt by reading TC32IRQ */
-        __raw_readl(timer_base + TC32IRQ_OFFS);
-
-        evt->event_handler(evt);
-
-        return IRQ_HANDLED;
-}
-
-static struct clock_event_device clockevent_tcc = {
-        .name           = "tcc_timer1",
-        .features       = CLOCK_EVT_FEAT_ONESHOT,
-        .shift          = 32,
-        .set_mode       = tcc_set_mode,
-        .set_next_event = tcc_set_next_event,
-        .rating         = 200,
-};
-
-static struct irqaction tcc8k_timer_irq = {
-        .name           = "TC32_timer",
-        .flags          = IRQF_DISABLED | IRQF_TIMER,
-        .handler        = tcc8k_timer_interrupt,
-        .dev_id         = &clockevent_tcc,
-};
-
-static int __init tcc_clockevent_init(struct clk *clock)
-{
-        unsigned int c = clk_get_rate(clock);
-
-        clocksource_mmio_init(timer_base + TC32MCNT_OFFS, "tcc_tc32", c,
-                200, 32, clocksource_mmio_readl_up);
-
-        clockevent_tcc.mult = div_sc(c, NSEC_PER_SEC,
-                                        clockevent_tcc.shift);
-        clockevent_tcc.max_delta_ns =
-                        clockevent_delta2ns(0xfffffffe, &clockevent_tcc);
-        clockevent_tcc.min_delta_ns =
-                        clockevent_delta2ns(0xff, &clockevent_tcc);
-
-        clockevent_tcc.cpumask = cpumask_of(0);
-
-        clockevents_register_device(&clockevent_tcc);
-
-        return 0;
-}
-
-void __init tcc8k_timer_init(struct clk *clock, void __iomem *base, int irq)
-{
-        u32 reg;
-
-        timer_base = base;
-        tcc8k_timer_irq.irq = irq;
-
-        /* Enable clocks */
-        clk_enable(clock);
-
-        /* Initialize 32-bit timer */
-        reg = __raw_readl(timer_base + TC32EN_OFFS);
-        reg &= ~TC32EN_ENABLE; /* Disable timer */
-        __raw_writel(reg, timer_base + TC32EN_OFFS);
-        /* Free running timer, counting from 0 to 0xffffffff */
-        __raw_writel(0, timer_base + TC32EN_OFFS);
-        __raw_writel(0, timer_base + TC32LDV_OFFS);
-        reg = __raw_readl(timer_base + TC32IRQ_OFFS);
-        reg |= TC32IRQ_IRQEN0; /* irq at match with CMP0 */
-        __raw_writel(reg, timer_base + TC32IRQ_OFFS);
-
-        __raw_writel(TC32EN_ENABLE, timer_base + TC32EN_OFFS);
-
-        tcc_clockevent_init(clock);
-        setup_irq(irq, &tcc8k_timer_irq);
-}
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c
index 70f060251f00..c2ff8e020105 100644
--- a/arch/arm/mach-tegra/board-dt-tegra20.c
+++ b/arch/arm/mach-tegra/board-dt-tegra20.c
@@ -146,5 +146,6 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)")
         .handle_irq     = gic_handle_irq,
         .timer          = &tegra_timer,
         .init_machine   = tegra_dt_init,
+        .restart        = tegra_assert_system_reset,
         .dt_compat      = tegra20_dt_board_compat,
 MACHINE_END
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index d60a0d45f2f7..a0f9634f6727 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -191,4 +191,5 @@ MACHINE_START(HARMONY, "harmony")
         .handle_irq     = gic_handle_irq,
         .timer          = &tegra_timer,
         .init_machine   = tegra_harmony_init,
+        .restart        = tegra_assert_system_reset,
 MACHINE_END
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
index 8a5245919456..fcf4f377b1dc 100644
--- a/arch/arm/mach-tegra/board-paz00.c
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -221,4 +221,5 @@ MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ")
         .handle_irq     = gic_handle_irq,
         .timer          = &tegra_timer,
         .init_machine   = tegra_paz00_init,
+        .restart        = tegra_assert_system_reset,
 MACHINE_END
diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c
index b79f9ce9941c..cfc74d46a09e 100644
--- a/arch/arm/mach-tegra/board-seaboard.c
+++ b/arch/arm/mach-tegra/board-seaboard.c
@@ -288,6 +288,7 @@ MACHINE_START(SEABOARD, "seaboard")
         .handle_irq     = gic_handle_irq,
         .timer          = &tegra_timer,
         .init_machine   = tegra_seaboard_init,
+        .restart        = tegra_assert_system_reset,
 MACHINE_END
 
 MACHINE_START(KAEN, "kaen")
@@ -298,6 +299,7 @@ MACHINE_START(KAEN, "kaen")
         .handle_irq     = gic_handle_irq,
         .timer          = &tegra_timer,
         .init_machine   = tegra_kaen_init,
+        .restart        = tegra_assert_system_reset,
 MACHINE_END
 
 MACHINE_START(WARIO, "wario")
@@ -308,4 +310,5 @@ MACHINE_START(WARIO, "wario")
         .handle_irq     = gic_handle_irq,
         .timer          = &tegra_timer,
         .init_machine   = tegra_wario_init,
+        .restart        = tegra_assert_system_reset,
 MACHINE_END
diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c
index 4a197a20be93..cd52820a3e37 100644
--- a/arch/arm/mach-tegra/board-trimslice.c
+++ b/arch/arm/mach-tegra/board-trimslice.c
@@ -180,4 +180,5 @@ MACHINE_START(TRIMSLICE, "trimslice")
         .handle_irq     = gic_handle_irq,
         .timer          = &tegra_timer,
         .init_machine   = tegra_trimslice_init,
+        .restart        = tegra_assert_system_reset,
 MACHINE_END
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 72b666bd3043..a2eb90169aed 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -33,8 +33,6 @@
 #include "clock.h"
 #include "fuse.h"
 
-void (*arch_reset)(char mode, const char *cmd) = tegra_assert_system_reset;
-
 #ifdef CONFIG_OF
 static const struct of_device_id tegra_dt_irq_match[] __initconst = {
         { .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S
index ac11262149c7..e577cfe27e72 100644
--- a/arch/arm/mach-tegra/include/mach/entry-macro.S
+++ b/arch/arm/mach-tegra/include/mach/entry-macro.S
@@ -18,21 +18,3 @@
 
         .macro  arch_ret_to_user, tmp1, tmp2
         .endm
-
-#if !defined(CONFIG_ARM_GIC)
-        /* legacy interrupt controller for AP16 */
-
-        .macro  get_irqnr_preamble, base, tmp
-        @ enable imprecise aborts
-        cpsie   a
-        @ EVP base at 0xf010f000
-        mov \base, #0xf0000000
-        orr \base, #0x00100000
-        orr \base, #0x0000f000
-        .endm
-
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-        ldr \irqnr, [\base, #0x20]      @ EVT_IRQ_STS
-        cmp \irqnr, #0x80
-        .endm
-#endif
diff --git a/arch/arm/mach-tegra/include/mach/system.h b/arch/arm/mach-tegra/include/mach/system.h
index 027c4215d313..a312988bf6f8 100644
--- a/arch/arm/mach-tegra/include/mach/system.h
+++ b/arch/arm/mach-tegra/include/mach/system.h
@@ -21,10 +21,6 @@
 #ifndef __MACH_TEGRA_SYSTEM_H
 #define __MACH_TEGRA_SYSTEM_H
 
-#include <mach/iomap.h>
-
-extern void (*arch_reset)(char mode, const char *cmd);
-
 static inline void arch_idle(void)
 {
 }
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
index 004b0fdf0d76..4e1afcd54fae 100644
--- a/arch/arm/mach-tegra/irq.c
+++ b/arch/arm/mach-tegra/irq.c
@@ -29,10 +29,6 @@
 
 #include "board.h"
 
-#define INT_SYS_NR      (INT_GPIO_BASE - INT_PRI_BASE)
-#define INT_SYS_SZ      (INT_SEC_BASE - INT_PRI_BASE)
-#define PPI_NR          ((INT_SYS_NR+INT_SYS_SZ-1)/INT_SYS_SZ)
-
 #define ICTLR_CPU_IEP_VFIQ      0x08
 #define ICTLR_CPU_IEP_FIR       0x14
 #define ICTLR_CPU_IEP_FIR_SET   0x18
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index 6366654b54c5..1d1acda4f3e0 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -19,7 +19,6 @@
 
 #include <linux/init.h>
 #include <linux/err.h>
-#include <linux/sched.h>
 #include <linux/time.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
@@ -106,25 +105,9 @@ static struct clock_event_device tegra_clockevent = {
         .set_mode       = tegra_timer_set_mode,
 };
 
-static DEFINE_CLOCK_DATA(cd);
-
-/*
- * Constants generated by clocks_calc_mult_shift(m, s, 1MHz, NSEC_PER_SEC, 60).
- * This gives a resolution of about 1us and a wrap period of about 1h11min.
- */
-#define SC_MULT         4194304000u
-#define SC_SHIFT        22
-
-unsigned long long notrace sched_clock(void)
-{
-        u32 cyc = timer_readl(TIMERUS_CNTR_1US);
-        return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
-}
-
-static void notrace tegra_update_sched_clock(void)
+static u32 notrace tegra_read_sched_clock(void)
 {
-        u32 cyc = timer_readl(TIMERUS_CNTR_1US);
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return timer_readl(TIMERUS_CNTR_1US);
 }
 
 /*
@@ -226,8 +209,7 @@ static void __init tegra_init_timer(void)
                 WARN(1, "Unknown clock rate");
         }
 
-        init_fixed_sched_clock(&cd, tegra_update_sched_clock, 32,
-                               1000000, SC_MULT, SC_SHIFT);
+        setup_sched_clock(tegra_read_sched_clock, 32, 1000000);
 
         if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US,
                 "timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) {
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index ac0791e924bc..697930761b3e 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -1888,3 +1888,23 @@ static int core_module_init(void)
         return mmc_init(&mmcsd_device);
 }
 module_init(core_module_init);
+
+/* Forward declare this function from the watchdog */
+void coh901327_watchdog_reset(void);
+
+void u300_restart(char mode, const char *cmd)
+{
+        switch (mode) {
+        case 's':
+        case 'h':
+#ifdef CONFIG_COH901327_WATCHDOG
+                coh901327_watchdog_reset();
+#endif
+                break;
+        default:
+                /* Do nothing */
+                break;
+        }
+        /* Wait for system do die/reset. */
+        while (1);
+}
diff --git a/arch/arm/mach-u300/include/mach/memory.h b/arch/arm/mach-u300/include/mach/memory.h
deleted file mode 100644
index c808f347a081..000000000000
--- a/arch/arm/mach-u300/include/mach/memory.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- *
- * arch/arm/mach-u300/include/mach/memory.h
- *
- *
- * Copyright (C) 2007-2009 ST-Ericsson AB
- * License terms: GNU General Public License (GPL) version 2
- * Memory virtual/physical mapping constants.
- * Author: Linus Walleij <linus.walleij@stericsson.com>
- * Author: Jonas Aaberg <jonas.aberg@stericsson.com>
- */
-
-#ifndef __MACH_MEMORY_H
-#define __MACH_MEMORY_H
-
-#define PLAT_PHYS_OFFSET        UL(0x48000000)
-#define BOOT_PARAMS_OFFSET      0x100
-
-#endif
diff --git a/arch/arm/mach-u300/include/mach/platform.h b/arch/arm/mach-u300/include/mach/platform.h
index 77d9210a82e2..096333f32fc3 100644
--- a/arch/arm/mach-u300/include/mach/platform.h
+++ b/arch/arm/mach-u300/include/mach/platform.h
@@ -14,6 +14,7 @@
 void u300_map_io(void);
 void u300_init_irq(void);
 void u300_init_devices(void);
+void u300_restart(char, const char *);
 extern struct sys_timer u300_timer;
 
 #endif
diff --git a/arch/arm/mach-u300/include/mach/system.h b/arch/arm/mach-u300/include/mach/system.h
index 6b6fef7a438c..574d46e38290 100644
--- a/arch/arm/mach-u300/include/mach/system.h
+++ b/arch/arm/mach-u300/include/mach/system.h
@@ -8,33 +8,7 @@
  * System shutdown and reset functions.
  * Author: Linus Walleij <linus.walleij@stericsson.com>
  */
-#include <mach/hardware.h>
-#include <asm/io.h>
-#include <asm/hardware/vic.h>
-#include <asm/irq.h>
-
-/* Forward declare this function from the watchdog */
-void coh901327_watchdog_reset(void);
-
 static inline void arch_idle(void)
 {
         cpu_do_idle();
 }
-
-static void arch_reset(char mode, const char *cmd)
-{
-        switch (mode) {
-        case 's':
-        case 'h':
-                printk(KERN_CRIT "RESET: shutting down/rebooting system\n");
-#ifdef CONFIG_COH901327_WATCHDOG
-                coh901327_watchdog_reset();
-#endif
-                break;
-        default:
-                /* Do nothing */
-                break;
-        }
-        /* Wait for system do die/reset. */
-        while (1);
-}
diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c
index 5f51bdeef0ef..bc1c7897e82d 100644
--- a/arch/arm/mach-u300/timer.c
+++ b/arch/arm/mach-u300/timer.c
@@ -9,7 +9,6 @@
  * Author: Linus Walleij <linus.walleij@stericsson.com>
  */
 #include <linux/interrupt.h>
-#include <linux/sched.h>
 #include <linux/time.h>
 #include <linux/timex.h>
 #include <linux/clockchips.h>
@@ -337,18 +336,10 @@ static struct irqaction u300_timer_irq = {
  * this wraps around for now, since it is just a relative time
  * stamp. (Inspired by OMAP implementation.)
  */
-static DEFINE_CLOCK_DATA(cd);
 
-unsigned long long notrace sched_clock(void)
+static u32 notrace u300_read_sched_clock(void)
 {
-        u32 cyc = readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC);
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace u300_update_sched_clock(void)
-{
-        u32 cyc = readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC);
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC);
 }
 
 
@@ -366,7 +357,7 @@ static void __init u300_timer_init(void)
         clk_enable(clk);
         rate = clk_get_rate(clk);
 
-        init_sched_clock(&cd, u300_update_sched_clock, 32, rate);
+        setup_sched_clock(u300_read_sched_clock, 32, rate);
 
         /*
          * Disable the "OS" and "DD" timers - these are designed for Symbian!
diff --git a/arch/arm/mach-u300/u300.c b/arch/arm/mach-u300/u300.c
index 4a4fd334eb6e..f30c69d91d99 100644
--- a/arch/arm/mach-u300/u300.c
+++ b/arch/arm/mach-u300/u300.c
@@ -47,10 +47,11 @@ static void __init u300_init_machine(void)
 
 MACHINE_START(U300, MACH_U300_STRING)
         /* Maintainer: Linus Walleij <linus.walleij@stericsson.com> */
-        .atag_offset    = BOOT_PARAMS_OFFSET,
+        .atag_offset    = 0x100,
         .map_io         = u300_map_io,
         .init_irq       = u300_init_irq,
         .handle_irq     = vic_handle_irq,
         .timer          = &u300_timer,
         .init_machine   = u300_init_machine,
+        .restart        = u300_restart,
 MACHINE_END
diff --git a/arch/arm/mach-ux500/cpu-db5500.c b/arch/arm/mach-ux500/cpu-db5500.c
index 9de1af008094..5323286b265e 100644
--- a/arch/arm/mach-ux500/cpu-db5500.c
+++ b/arch/arm/mach-ux500/cpu-db5500.c
@@ -30,12 +30,11 @@ static struct map_desc u5500_uart_io_desc[] __initdata = {
 };
 
 static struct map_desc u5500_io_desc[] __initdata = {
-        __IO_DEV_DESC(U5500_GIC_CPU_BASE, SZ_4K),
+        /* SCU base also covers GIC CPU BASE and TWD with its 4K page */
+        __IO_DEV_DESC(U5500_SCU_BASE, SZ_4K),
         __IO_DEV_DESC(U5500_GIC_DIST_BASE, SZ_4K),
         __IO_DEV_DESC(U5500_L2CC_BASE, SZ_4K),
-        __IO_DEV_DESC(U5500_TWD_BASE, SZ_4K),
         __IO_DEV_DESC(U5500_MTU0_BASE, SZ_4K),
-        __IO_DEV_DESC(U5500_SCU_BASE, SZ_4K),
         __IO_DEV_DESC(U5500_BACKUPRAM0_BASE, SZ_8K),
 
         __IO_DEV_DESC(U5500_GPIO0_BASE, SZ_4K),
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 13e8890a8b8a..7f2729c05db3 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -35,12 +35,11 @@ static struct map_desc u8500_uart_io_desc[] __initdata = {
 };
 
 static struct map_desc u8500_io_desc[] __initdata = {
-        __IO_DEV_DESC(U8500_GIC_CPU_BASE, SZ_4K),
+        /* SCU base also covers GIC CPU BASE and TWD with its 4K page */
+        __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
         __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
         __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
-        __IO_DEV_DESC(U8500_TWD_BASE, SZ_4K),
         __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
-        __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
         __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
 
         __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
diff --git a/arch/arm/mach-ux500/include/mach/gpio.h b/arch/arm/mach-ux500/include/mach/gpio.h
index 7389df911b1a..c01ef66537f3 100644
--- a/arch/arm/mach-ux500/include/mach/gpio.h
+++ b/arch/arm/mach-ux500/include/mach/gpio.h
@@ -1,10 +1,5 @@
 #ifndef __ASM_ARCH_GPIO_H
 #define __ASM_ARCH_GPIO_H
 
-/*
- * 288 (#267 is the highest one actually hooked up) onchip GPIOs, plus enough
- * room for a couple of GPIO expanders.
- */
-#define ARCH_NR_GPIOS   350
 
 #endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-ux500/include/mach/system.h b/arch/arm/mach-ux500/include/mach/system.h
index c0cd8006f1a2..258e5c919c24 100644
--- a/arch/arm/mach-ux500/include/mach/system.h
+++ b/arch/arm/mach-ux500/include/mach/system.h
@@ -17,9 +17,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /* yet to be implemented - TODO */
-}
-
 #endif
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 4d8dfc15f3e6..cbcda61162d3 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -740,6 +740,19 @@ static void versatile_leds_event(led_event_t ledevt)
 }
 #endif  /* CONFIG_LEDS */
 
+void versatile_restart(char mode, const char *cmd)
+{
+        void __iomem *sys = __io_address(VERSATILE_SYS_BASE);
+        u32 val;
+
+        val = __raw_readl(sys + VERSATILE_SYS_RESETCTL_OFFSET);
+        val |= 0x105;
+
+        __raw_writel(0xa05f, sys + VERSATILE_SYS_LOCK_OFFSET);
+        __raw_writel(val, sys + VERSATILE_SYS_RESETCTL_OFFSET);
+        __raw_writel(0, sys + VERSATILE_SYS_LOCK_OFFSET);
+}
+
 /* Early initializations */
 void __init versatile_init_early(void)
 {
diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h
index e01422700ebb..2ef2f555f315 100644
--- a/arch/arm/mach-versatile/core.h
+++ b/arch/arm/mach-versatile/core.h
@@ -30,6 +30,7 @@ extern void __init versatile_init_early(void);
 extern void __init versatile_init_irq(void);
 extern void __init versatile_map_io(void);
 extern struct sys_timer versatile_timer;
+extern void versatile_restart(char, const char *);
 extern unsigned int mmc_status(struct device *dev);
 #ifdef CONFIG_OF
 extern struct of_dev_auxdata versatile_auxdata_lookup[];
diff --git a/arch/arm/mach-versatile/include/mach/system.h b/arch/arm/mach-versatile/include/mach/system.h
index 8ffc12a7cb25..f3fa347895f0 100644
--- a/arch/arm/mach-versatile/include/mach/system.h
+++ b/arch/arm/mach-versatile/include/mach/system.h
@@ -21,10 +21,6 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include <mach/platform.h>
-
 static inline void arch_idle(void)
 {
         /*
@@ -34,16 +30,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        u32 val;
-
-        val = __raw_readl(IO_ADDRESS(VERSATILE_SYS_RESETCTL)) & ~0x7;
-        val |= 0x105;
-
-        __raw_writel(0xa05f, IO_ADDRESS(VERSATILE_SYS_LOCK));
-        __raw_writel(val, IO_ADDRESS(VERSATILE_SYS_RESETCTL));
-        __raw_writel(0, IO_ADDRESS(VERSATILE_SYS_LOCK));
-}
-
 #endif
diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c
index c83a1f379f7a..63b8dd2b9f4d 100644
--- a/arch/arm/mach-versatile/versatile_ab.c
+++ b/arch/arm/mach-versatile/versatile_ab.c
@@ -43,4 +43,5 @@ MACHINE_START(VERSATILE_AB, "ARM-Versatile AB")
         .handle_irq     = vic_handle_irq,
         .timer          = &versatile_timer,
         .init_machine   = versatile_init,
+        .restart        = versatile_restart,
 MACHINE_END
diff --git a/arch/arm/mach-versatile/versatile_dt.c b/arch/arm/mach-versatile/versatile_dt.c
index f4d1e0f072c8..ae5ad3c8f3dd 100644
--- a/arch/arm/mach-versatile/versatile_dt.c
+++ b/arch/arm/mach-versatile/versatile_dt.c
@@ -50,4 +50,5 @@ DT_MACHINE_START(VERSATILE_PB, "ARM-Versatile (Device Tree Support)")
         .timer          = &versatile_timer,
         .init_machine   = versatile_dt_init,
         .dt_compat      = versatile_dt_match,
+        .restart        = versatile_restart,
 MACHINE_END
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c
index 4d31eeb6c101..7aab79b665e7 100644
--- a/arch/arm/mach-versatile/versatile_pb.c
+++ b/arch/arm/mach-versatile/versatile_pb.c
@@ -111,4 +111,5 @@ MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
         .handle_irq     = vic_handle_irq,
         .timer          = &versatile_timer,
         .init_machine   = versatile_pb_init,
+        .restart        = versatile_restart,
 MACHINE_END
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 931148487f0b..9b3d0fbaee72 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -8,5 +8,7 @@ config ARCH_VEXPRESS_CA9X4
         select ARM_ERRATA_720789
         select ARM_ERRATA_751472
         select ARM_ERRATA_753970
+        select HAVE_SMP
+        select MIGHT_HAVE_CACHE_L2X0
 
 endmenu
diff --git a/arch/arm/mach-vexpress/include/mach/system.h b/arch/arm/mach-vexpress/include/mach/system.h
index 899a4e628a4c..f653a8e265bd 100644
--- a/arch/arm/mach-vexpress/include/mach/system.h
+++ b/arch/arm/mach-vexpress/include/mach/system.h
@@ -30,8 +30,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-}
-
 #endif
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 7aa07a8ce232..6dd10e320ef6 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -438,7 +438,6 @@ static void __init v2m_init(void)
                 amba_device_register(v2m_amba_devs[i], &iomem_resource);
 
         pm_power_off = v2m_power_off;
-        arm_pm_restart = v2m_restart;
 
         ct_desc->init_tile();
 }
@@ -451,4 +450,5 @@ MACHINE_START(VEXPRESS, "ARM-Versatile Express")
         .timer          = &v2m_timer,
         .handle_irq     = gic_handle_irq,
         .init_machine   = v2m_init,
+        .restart        = v2m_restart,
 MACHINE_END
diff --git a/arch/arm/mach-w90x900/cpu.c b/arch/arm/mach-w90x900/cpu.c
index 0a235e502330..604e1db266e8 100644
--- a/arch/arm/mach-w90x900/cpu.c
+++ b/arch/arm/mach-w90x900/cpu.c
@@ -33,9 +33,11 @@
 #include <mach/regs-serial.h>
 #include <mach/regs-clock.h>
 #include <mach/regs-ebi.h>
+#include <mach/regs-timer.h>
 
 #include "cpu.h"
 #include "clock.h"
+#include "nuc9xx.h"
 
 /* Initial IO mappings */
 
@@ -222,3 +224,17 @@ void __init nuc900_init_clocks(void)
         clkdev_add_table(nuc900_clkregs, ARRAY_SIZE(nuc900_clkregs));
 }
 
+#define WTCR    (TMR_BA + 0x1C)
+#define WTCLK   (1 << 10)
+#define WTE     (1 << 7)
+#define WTRE    (1 << 1)
+
+void nuc9xx_restart(char mode, const char *cmd)
+{
+        if (mode == 's') {
+                /* Jump into ROM at address 0 */
+                soft_restart(0);
+        } else {
+                __raw_writel(WTE | WTRE | WTCLK, WTCR);
+        }
+}
diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h
index 68875a1c16be..2aaeb9311619 100644
--- a/arch/arm/mach-w90x900/include/mach/system.h
+++ b/arch/arm/mach-w90x900/include/mach/system.h
@@ -14,28 +14,6 @@
  * (at your option) any later version.
  *
  */
-
-#include <linux/io.h>
-#include <asm/proc-fns.h>
-#include <mach/map.h>
-#include <mach/regs-timer.h>
-
-#define WTCR    (TMR_BA + 0x1C)
-#define WTCLK   (1 << 10)
-#define WTE     (1 << 7)
-#define WTRE    (1 << 1)
-
 static void arch_idle(void)
 {
 }
-
-static void arch_reset(char mode, const char *cmd)
-{
-        if (mode == 's') {
-                /* Jump into ROM at address 0 */
-                soft_restart(0);
-        } else {
-                __raw_writel(WTE | WTRE | WTCLK, WTCR);
-        }
-}
-
diff --git a/arch/arm/mach-w90x900/mach-nuc910evb.c b/arch/arm/mach-w90x900/mach-nuc910evb.c
index 31c109018228..b4243e4f1565 100644
--- a/arch/arm/mach-w90x900/mach-nuc910evb.c
+++ b/arch/arm/mach-w90x900/mach-nuc910evb.c
@@ -38,4 +38,5 @@ MACHINE_START(W90P910EVB, "W90P910EVB")
         .init_irq       = nuc900_init_irq,
         .init_machine   = nuc910evb_init,
         .timer          = &nuc900_timer,
+        .restart        = nuc9xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-w90x900/mach-nuc950evb.c b/arch/arm/mach-w90x900/mach-nuc950evb.c
index 4062e55a57d8..067d8f9166dc 100644
--- a/arch/arm/mach-w90x900/mach-nuc950evb.c
+++ b/arch/arm/mach-w90x900/mach-nuc950evb.c
@@ -41,4 +41,5 @@ MACHINE_START(W90P950EVB, "W90P950EVB")
         .init_irq       = nuc900_init_irq,
         .init_machine   = nuc950evb_init,
         .timer          = &nuc900_timer,
+        .restart        = nuc9xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-w90x900/mach-nuc960evb.c b/arch/arm/mach-w90x900/mach-nuc960evb.c
index 0ab9995d5b58..cbb3adc3db10 100644
--- a/arch/arm/mach-w90x900/mach-nuc960evb.c
+++ b/arch/arm/mach-w90x900/mach-nuc960evb.c
@@ -38,4 +38,5 @@ MACHINE_START(W90N960EVB, "W90N960EVB")
         .init_irq       = nuc900_init_irq,
         .init_machine   = nuc960evb_init,
         .timer          = &nuc900_timer,
+        .restart        = nuc9xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-w90x900/nuc9xx.h b/arch/arm/mach-w90x900/nuc9xx.h
index 847c4f3e0440..91acb4047793 100644
--- a/arch/arm/mach-w90x900/nuc9xx.h
+++ b/arch/arm/mach-w90x900/nuc9xx.h
@@ -21,3 +21,4 @@ struct sys_timer;
 
 extern void nuc900_init_irq(void);
 extern struct sys_timer nuc900_timer;
+extern void nuc9xx_restart(char, const char *);
diff --git a/arch/arm/mach-zynq/include/mach/system.h b/arch/arm/mach-zynq/include/mach/system.h
index 1b84d705c675..8e88e0b8d2ba 100644
--- a/arch/arm/mach-zynq/include/mach/system.h
+++ b/arch/arm/mach-zynq/include/mach/system.h
@@ -20,9 +20,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        /* Add architecture specific reset processing here */
-}
-
 #endif
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 5cf7922ff5e7..4cefb57d9ed2 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -833,14 +833,23 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
           Say Y here to use the Feroceon L2 cache in writethrough mode.
           Unless you specifically require this, say N for writeback mode.
 
+config MIGHT_HAVE_CACHE_L2X0
+        bool
+        help
+          This option should be selected by machines which have a L2x0
+          or PL310 cache controller, but where its use is optional.
+
+          The only effect of this option is to make CACHE_L2X0 and
+          related options available to the user for configuration.
+
+          Boards or SoCs which always require the cache controller
+          support to be present should select CACHE_L2X0 directly
+          instead of this option, thus preventing the user from
+          inadvertently configuring a broken kernel.
+
 config CACHE_L2X0
-        bool "Enable the L2x0 outer cache controller"
-        depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
-                   REALVIEW_EB_A9MP || ARCH_IMX_V6_V7 || MACH_REALVIEW_PBX || \
-                   ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \
-                   ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || \
-                   ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX || ARCH_HIGHBANK
-        default y
+        bool "Enable the L2x0 outer cache controller" if MIGHT_HAVE_CACHE_L2X0
+        default MIGHT_HAVE_CACHE_L2X0
         select OUTER_CACHE
         select OUTER_CACHE_SYNC
         help
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index eb5520fc755f..bb7eac381a8e 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -220,7 +220,7 @@ static inline bool access_error(unsigned int fsr, struct vm_area_struct *vma)
 
 static int __kprobes
 __do_page_fault(struct mm_struct *mm, unsigned long addr, unsigned int fsr,
-                struct task_struct *tsk)
+                unsigned int flags, struct task_struct *tsk)
 {
         struct vm_area_struct *vma;
         int fault;
@@ -242,18 +242,7 @@ good_area:
                 goto out;
         }
 
-        /*
-         * If for any reason at all we couldn't handle the fault, make
-         * sure we exit gracefully rather than endlessly redo the fault.
-         */
-        fault = handle_mm_fault(mm, vma, addr & PAGE_MASK, (fsr & FSR_WRITE) ? FAULT_FLAG_WRITE : 0);
-        if (unlikely(fault & VM_FAULT_ERROR))
-                return fault;
-        if (fault & VM_FAULT_MAJOR)
-                tsk->maj_flt++;
-        else
-                tsk->min_flt++;
-        return fault;
+        return handle_mm_fault(mm, vma, addr & PAGE_MASK, flags);
 
 check_stack:
         if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr))
@@ -268,6 +257,9 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
         struct task_struct *tsk;
         struct mm_struct *mm;
         int fault, sig, code;
+        int write = fsr & FSR_WRITE;
+        unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
+                                (write ? FAULT_FLAG_WRITE : 0);
 
         if (notify_page_fault(regs, fsr))
                 return 0;
@@ -294,6 +286,7 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
         if (!down_read_trylock(&mm->mmap_sem)) {
                 if (!user_mode(regs) && !search_exception_tables(regs->ARM_pc))
                         goto no_context;
+retry:
                 down_read(&mm->mmap_sem);
         } else {
                 /*
@@ -309,14 +302,41 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
 #endif
         }
 
-        fault = __do_page_fault(mm, addr, fsr, tsk);
-        up_read(&mm->mmap_sem);
+        fault = __do_page_fault(mm, addr, fsr, flags, tsk);
+
+        /* If we need to retry but a fatal signal is pending, handle the
+         * signal first. We do not need to release the mmap_sem because
+         * it would already be released in __lock_page_or_retry in
+         * mm/filemap.c. */
+        if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
+                return 0;
+
+        /*
+         * Major/minor page fault accounting is only done on the
+         * initial attempt. If we go through a retry, it is extremely
+         * likely that the page will be found in page cache at that point.
+         */
 
         perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
-        if (fault & VM_FAULT_MAJOR)
-                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, addr);
-        else if (fault & VM_FAULT_MINOR)
-                perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, addr);
+        if (flags & FAULT_FLAG_ALLOW_RETRY) {
+                if (fault & VM_FAULT_MAJOR) {
+                        tsk->maj_flt++;
+                        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
+                                        regs, addr);
+                } else {
+                        tsk->min_flt++;
+                        perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
+                                        regs, addr);
+                }
+                if (fault & VM_FAULT_RETRY) {
+                        /* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk
+                        * of starvation. */
+                        flags &= ~FAULT_FLAG_ALLOW_RETRY;
+                        goto retry;
+                }
+        }
+
+        up_read(&mm->mmap_sem);
 
         /*
          * Handle the "normal" case first - VM_FAULT_MAJOR / VM_FAULT_MINOR
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index 44b628e4d6ea..ce8cb1970d7a 100644
--- a/arch/arm/mm/mmap.c
+++ b/arch/arm/mm/mmap.c
@@ -11,10 +11,49 @@
 #include <linux/random.h>
 #include <asm/cachetype.h>
 
+static inline unsigned long COLOUR_ALIGN_DOWN(unsigned long addr,
+                                              unsigned long pgoff)
+{
+        unsigned long base = addr & ~(SHMLBA-1);
+        unsigned long off = (pgoff << PAGE_SHIFT) & (SHMLBA-1);
+
+        if (base + off <= addr)
+                return base + off;
+
+        return base - off;
+}
+
 #define COLOUR_ALIGN(addr,pgoff)                \
         ((((addr)+SHMLBA-1)&~(SHMLBA-1)) +      \
          (((pgoff)<<PAGE_SHIFT) & (SHMLBA-1)))
 
+/* gap between mmap and stack */
+#define MIN_GAP (128*1024*1024UL)
+#define MAX_GAP ((TASK_SIZE)/6*5)
+
+static int mmap_is_legacy(void)
+{
+        if (current->personality & ADDR_COMPAT_LAYOUT)
+                return 1;
+
+        if (rlimit(RLIMIT_STACK) == RLIM_INFINITY)
+                return 1;
+
+        return sysctl_legacy_va_layout;
+}
+
+static unsigned long mmap_base(unsigned long rnd)
+{
+        unsigned long gap = rlimit(RLIMIT_STACK);
+
+        if (gap < MIN_GAP)
+                gap = MIN_GAP;
+        else if (gap > MAX_GAP)
+                gap = MAX_GAP;
+
+        return PAGE_ALIGN(TASK_SIZE - gap - rnd);
+}
+
 /*
  * We need to ensure that shared mappings are correctly aligned to
  * avoid aliasing issues with VIPT caches.  We need to ensure that
@@ -68,13 +107,9 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,
         if (len > mm->cached_hole_size) {
                 start_addr = addr = mm->free_area_cache;
         } else {
-                start_addr = addr = TASK_UNMAPPED_BASE;
+                start_addr = addr = mm->mmap_base;
                 mm->cached_hole_size = 0;
         }
-        /* 8 bits of randomness in 20 address space bits */
-        if ((current->flags & PF_RANDOMIZE) &&
-            !(current->personality & ADDR_NO_RANDOMIZE))
-                addr += (get_random_int() % (1 << 8)) << PAGE_SHIFT;
 
 full_search:
         if (do_align)
@@ -111,6 +146,134 @@ full_search:
         }
 }
 
+unsigned long
+arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
+                        const unsigned long len, const unsigned long pgoff,
+                        const unsigned long flags)
+{
+        struct vm_area_struct *vma;
+        struct mm_struct *mm = current->mm;
+        unsigned long addr = addr0;
+        int do_align = 0;
+        int aliasing = cache_is_vipt_aliasing();
+
+        /*
+         * We only need to do colour alignment if either the I or D
+         * caches alias.
+         */
+        if (aliasing)
+                do_align = filp || (flags & MAP_SHARED);
+
+        /* requested length too big for entire address space */
+        if (len > TASK_SIZE)
+                return -ENOMEM;
+
+        if (flags & MAP_FIXED) {
+                if (aliasing && flags & MAP_SHARED &&
+                    (addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1))
+                        return -EINVAL;
+                return addr;
+        }
+
+        /* requesting a specific address */
+        if (addr) {
+                if (do_align)
+                        addr = COLOUR_ALIGN(addr, pgoff);
+                else
+                        addr = PAGE_ALIGN(addr);
+                vma = find_vma(mm, addr);
+                if (TASK_SIZE - len >= addr &&
+                                (!vma || addr + len <= vma->vm_start))
+                        return addr;
+        }
+
+        /* check if free_area_cache is useful for us */
+        if (len <= mm->cached_hole_size) {
+                mm->cached_hole_size = 0;
+                mm->free_area_cache = mm->mmap_base;
+        }
+
+        /* either no address requested or can't fit in requested address hole */
+        addr = mm->free_area_cache;
+        if (do_align) {
+                unsigned long base = COLOUR_ALIGN_DOWN(addr - len, pgoff);
+                addr = base + len;
+        }
+
+        /* make sure it can fit in the remaining address space */
+        if (addr > len) {
+                vma = find_vma(mm, addr-len);
+                if (!vma || addr <= vma->vm_start)
+                        /* remember the address as a hint for next time */
+                        return (mm->free_area_cache = addr-len);
+        }
+
+        if (mm->mmap_base < len)
+                goto bottomup;
+
+        addr = mm->mmap_base - len;
+        if (do_align)
+                addr = COLOUR_ALIGN_DOWN(addr, pgoff);
+
+        do {
+                /*
+                 * Lookup failure means no vma is above this address,
+                 * else if new region fits below vma->vm_start,
+                 * return with success:
+                 */
+                vma = find_vma(mm, addr);
+                if (!vma || addr+len <= vma->vm_start)
+                        /* remember the address as a hint for next time */
+                        return (mm->free_area_cache = addr);
+
+                /* remember the largest hole we saw so far */
+                if (addr + mm->cached_hole_size < vma->vm_start)
+                        mm->cached_hole_size = vma->vm_start - addr;
+
+                /* try just below the current vma->vm_start */
+                addr = vma->vm_start - len;
+                if (do_align)
+                        addr = COLOUR_ALIGN_DOWN(addr, pgoff);
+        } while (len < vma->vm_start);
+
+bottomup:
+        /*
+         * A failed mmap() very likely causes application failure,
+         * so fall back to the bottom-up function here. This scenario
+         * can happen with large stack limits and large mmap()
+         * allocations.
+         */
+        mm->cached_hole_size = ~0UL;
+        mm->free_area_cache = TASK_UNMAPPED_BASE;
+        addr = arch_get_unmapped_area(filp, addr0, len, pgoff, flags);
+        /*
+         * Restore the topdown base:
+         */
+        mm->free_area_cache = mm->mmap_base;
+        mm->cached_hole_size = ~0UL;
+
+        return addr;
+}
+
+void arch_pick_mmap_layout(struct mm_struct *mm)
+{
+        unsigned long random_factor = 0UL;
+
+        /* 8 bits of randomness in 20 address space bits */
+        if ((current->flags & PF_RANDOMIZE) &&
+            !(current->personality & ADDR_NO_RANDOMIZE))
+                random_factor = (get_random_int() % (1 << 8)) << PAGE_SHIFT;
+
+        if (mmap_is_legacy()) {
+                mm->mmap_base = TASK_UNMAPPED_BASE + random_factor;
+                mm->get_unmapped_area = arch_get_unmapped_area;
+                mm->unmap_area = arch_unmap_area;
+        } else {
+                mm->mmap_base = mmap_base(random_factor);
+                mm->get_unmapped_area = arch_get_unmapped_area_topdown;
+                mm->unmap_area = arch_unmap_area_topdown;
+        }
+}
 
 /*
  * You really shouldn't be using read() or write() on /dev/mem.  This
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 7efa2a721d5d..7e9b5bf910c1 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -161,6 +161,7 @@ __v7_ca5mp_setup:
 __v7_ca9mp_setup:
         mov     r10, #(1 << 0)                  @ TLB ops broadcasting
         b       1f
+__v7_ca7mp_setup:
 __v7_ca15mp_setup:
         mov     r10, #0
 1:
@@ -240,11 +241,13 @@ __v7_setup:
         orreq   r10, r10, #1 << 6               @ set bit #6
         mcreq   p15, 0, r10, c15, c0, 1         @ write diagnostic register
 #endif
-#ifdef CONFIG_ARM_ERRATA_751472
-        cmp     r6, #0x30                       @ present prior to r3p0
+#if defined(CONFIG_ARM_ERRATA_751472) && defined(CONFIG_SMP)
+        ALT_SMP(cmp r6, #0x30)                  @ present prior to r3p0
+        ALT_UP_B(1f)
         mrclt   p15, 0, r10, c15, c0, 1         @ read diagnostic register
         orrlt   r10, r10, #1 << 11              @ set bit #11
         mcrlt   p15, 0, r10, c15, c0, 1         @ write diagnostic register
+1:
 #endif
 
 3:      mov     r10, #0
@@ -327,6 +330,16 @@ __v7_ca5mp_proc_info:
         .size   __v7_ca5mp_proc_info, . - __v7_ca5mp_proc_info
 
         /*
+         * ARM Ltd. Cortex A7 processor.
+         */
+        .type   __v7_ca7mp_proc_info, #object
+__v7_ca7mp_proc_info:
+        .long   0x410fc070
+        .long   0xff0ffff0
+        __v7_proc __v7_ca7mp_setup, hwcaps = HWCAP_IDIV
+        .size   __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info
+
+        /*
          * ARM Ltd. Cortex A9 processor.
          */
         .type   __v7_ca9mp_proc_info, #object
diff --git a/arch/arm/nwfpe/entry.S b/arch/arm/nwfpe/entry.S
index cafa18354339..d18dde95b8aa 100644
--- a/arch/arm/nwfpe/entry.S
+++ b/arch/arm/nwfpe/entry.S
@@ -20,6 +20,8 @@
     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */
 
+#include <asm/opcodes.h>
+
 /* This is the kernel's entry point into the floating point emulator.
 It is called from the kernel with code similar to this:
 
@@ -81,11 +83,11 @@ nwfpe_enter:
         mov     r6, r0                  @ save the opcode
 emulate:
         ldr     r1, [sp, #S_PSR]        @ fetch the PSR
-        bl      checkCondition          @ check the condition
-        cmp     r0, #0                  @ r0 = 0 ==> condition failed
+        bl      arm_check_condition     @ check the condition
+        cmp     r0, #ARM_OPCODE_CONDTEST_PASS   @ condition passed?
 
         @ if condition code failed to match, next insn
-        beq     next                    @ get the next instruction;
+        bne     next                    @ get the next instruction;
 
         mov     r0, r6                  @ prepare for EmulateAll()
         bl      EmulateAll              @ emulate the instruction
diff --git a/arch/arm/nwfpe/fpopcode.c b/arch/arm/nwfpe/fpopcode.c
index 922b81107585..ff9834673085 100644
--- a/arch/arm/nwfpe/fpopcode.c
+++ b/arch/arm/nwfpe/fpopcode.c
@@ -61,29 +61,3 @@ const float32 float32Constant[] = {
         0x41200000              /* single 10.0 */
 };
 
-/* condition code lookup table
- index into the table is test code: EQ, NE, ... LT, GT, AL, NV
- bit position in short is condition code: NZCV */
-static const unsigned short aCC[16] = {
-        0xF0F0,                 // EQ == Z set
-        0x0F0F,                 // NE
-        0xCCCC,                 // CS == C set
-        0x3333,                 // CC
-        0xFF00,                 // MI == N set
-        0x00FF,                 // PL
-        0xAAAA,                 // VS == V set
-        0x5555,                 // VC
-        0x0C0C,                 // HI == C set && Z clear
-        0xF3F3,                 // LS == C clear || Z set
-        0xAA55,                 // GE == (N==V)
-        0x55AA,                 // LT == (N!=V)
-        0x0A05,                 // GT == (!Z && (N==V))
-        0xF5FA,                 // LE == (Z || (N!=V))
-        0xFFFF,                 // AL always
-        0                       // NV
-};
-
-unsigned int checkCondition(const unsigned int opcode, const unsigned int ccodes)
-{
-        return (aCC[opcode >> 28] >> (ccodes >> 28)) & 1;
-}
diff --git a/arch/arm/nwfpe/fpopcode.h b/arch/arm/nwfpe/fpopcode.h
index 786e4c96156d..78f02dbfaa8f 100644
--- a/arch/arm/nwfpe/fpopcode.h
+++ b/arch/arm/nwfpe/fpopcode.h
@@ -475,9 +475,6 @@ static inline unsigned int getDestinationSize(const unsigned int opcode)
         return (nRc);
 }
 
-extern unsigned int checkCondition(const unsigned int opcode,
-                                   const unsigned int ccodes);
-
 extern const float64 float64Constant[];
 extern const float32 float32Constant[];
 
diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c
index c074e66ad224..4e0a371630b3 100644
--- a/arch/arm/oprofile/common.c
+++ b/arch/arm/oprofile/common.c
@@ -116,7 +116,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
         return oprofile_perf_init(ops);
 }
 
-void __exit oprofile_arch_exit(void)
+void oprofile_arch_exit(void)
 {
         oprofile_perf_exit();
 }
diff --git a/arch/arm/plat-iop/Makefile b/arch/arm/plat-iop/Makefile
index 90f7153a8d78..a99dc15a70f7 100644
--- a/arch/arm/plat-iop/Makefile
+++ b/arch/arm/plat-iop/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_ARCH_IOP32X) += time.o
 obj-$(CONFIG_ARCH_IOP32X) += cp6.o
 obj-$(CONFIG_ARCH_IOP32X) += adma.o
 obj-$(CONFIG_ARCH_IOP32X) += pmu.o
+obj-$(CONFIG_ARCH_IOP32X) += restart.o
 
 # IOP33X
 obj-$(CONFIG_ARCH_IOP33X) += gpio.o
@@ -23,6 +24,7 @@ obj-$(CONFIG_ARCH_IOP33X) += time.o
 obj-$(CONFIG_ARCH_IOP33X) += cp6.o
 obj-$(CONFIG_ARCH_IOP33X) += adma.o
 obj-$(CONFIG_ARCH_IOP33X) += pmu.o
+obj-$(CONFIG_ARCH_IOP33X) += restart.o
 
 # IOP13XX
 obj-$(CONFIG_ARCH_IOP13XX) += cp6.o
diff --git a/arch/arm/plat-iop/restart.c b/arch/arm/plat-iop/restart.c
new file mode 100644
index 000000000000..6a85a0c502e6
--- /dev/null
+++ b/arch/arm/plat-iop/restart.c
@@ -0,0 +1,19 @@
+/*
+ * restart.c
+ *
+ * Copyright (C) 2001 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <asm/hardware/iop3xx.h>
+#include <mach/hardware.h>
+
+void iop3xx_restart(char mode, const char *cmd)
+{
+        *IOP3XX_PCSR = 0x30;
+
+        /* Jump into ROM at address 0 */
+        soft_restart(0);
+}
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index 568dd0223d17..cbfbbe461788 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -18,7 +18,6 @@
 #include <linux/time.h>
 #include <linux/init.h>
 #include <linux/timex.h>
-#include <linux/sched.h>
 #include <linux/io.h>
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
@@ -52,21 +51,12 @@ static struct clocksource iop_clocksource = {
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-static DEFINE_CLOCK_DATA(cd);
-
 /*
  * IOP sched_clock() implementation via its clocksource.
  */
-unsigned long long notrace sched_clock(void)
+static u32 notrace iop_read_sched_clock(void)
 {
-        u32 cyc = 0xffffffffu - read_tcr1();
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace iop_update_sched_clock(void)
-{
-        u32 cyc = 0xffffffffu - read_tcr1();
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return 0xffffffffu - read_tcr1();
 }
 
 /*
@@ -152,7 +142,7 @@ void __init iop_init_time(unsigned long tick_rate)
 {
         u32 timer_ctl;
 
-        init_sched_clock(&cd, iop_update_sched_clock, 32, tick_rate);
+        setup_sched_clock(iop_read_sched_clock, 32, tick_rate);
 
         ticks_per_jiffy = DIV_ROUND_CLOSEST(tick_rate, HZ);
         iop_tick_rate = tick_rate;
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index b3a1f2b3ada3..b30708e28c1d 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -20,6 +20,7 @@ config ARCH_IMX_V6_V7
         bool "i.MX3, i.MX6"
         select AUTO_ZRELADDR if !ZBOOT_ROM
         select ARM_PATCH_PHYS_VIRT
+        select MIGHT_HAVE_CACHE_L2X0
         help
           This enables support for systems based on the Freescale i.MX3 and i.MX6
           family.
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c
index adbff706ef6f..73db34bf588a 100644
--- a/arch/arm/plat-mxc/cpufreq.c
+++ b/arch/arm/plat-mxc/cpufreq.c
@@ -98,7 +98,7 @@ static int mxc_set_target(struct cpufreq_policy *policy,
         return ret;
 }
 
-static int __init mxc_cpufreq_init(struct cpufreq_policy *policy)
+static int mxc_cpufreq_init(struct cpufreq_policy *policy)
 {
         int ret;
         int i;
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 6698cae942f7..83cca9bcfc97 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -71,8 +71,8 @@ extern int mx6q_clocks_init(void);
 extern struct platform_device *mxc_register_gpio(char *name, int id,
         resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
 extern void mxc_set_cpu_type(unsigned int type);
+extern void mxc_restart(char, const char *);
 extern void mxc_arch_reset_init(void __iomem *);
-extern void mx51_efikamx_reset(void);
 extern int mx53_revision(void);
 extern int mx53_display_revision(void);
 
@@ -121,6 +121,7 @@ static inline void imx_smp_prepare(void) {}
 extern void imx_enable_cpu(int cpu, bool enable);
 extern void imx_set_cpu_jump(int cpu, void *jump_addr);
 extern void imx_src_init(void);
+extern void imx_src_prepare_restart(void);
 extern void imx_gpc_init(void);
 extern void imx_gpc_pre_suspend(void);
 extern void imx_gpc_post_resume(void);
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
index b9895d250167..13ad0df2e860 100644
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ b/arch/arm/plat-mxc/include/mach/system.h
@@ -22,6 +22,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-void arch_reset(char mode, const char *cmd);
-
 #endif /* __ASM_ARCH_MXC_SYSTEM_H__ */
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index 88fd40452567..477971b00930 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -98,6 +98,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
         case MACH_TYPE_PCM043:
         case MACH_TYPE_LILLY1131:
         case MACH_TYPE_VPR200:
+        case MACH_TYPE_EUKREA_CPUIMX35SD:
                 uart_base = MX3X_UART1_BASE_ADDR;
                 break;
         case MACH_TYPE_MAGX_ZN5:
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c
index 845de59f07ed..e032717f7d02 100644
--- a/arch/arm/plat-mxc/pwm.c
+++ b/arch/arm/plat-mxc/pwm.c
@@ -77,6 +77,15 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
                 do_div(c, period_ns);
                 duty_cycles = c;
 
+                /*
+                 * according to imx pwm RM, the real period value should be
+                 * PERIOD value in PWMPR plus 2.
+                 */
+                if (period_cycles > 2)
+                        period_cycles -= 2;
+                else
+                        period_cycles = 0;
+
                 writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR);
                 writel(period_cycles, pwm->mmio_base + MX3_PWMPR);
 
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c
index 7e5c76ea4466..3599bf2cfd4f 100644
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/plat-mxc/system.c
@@ -37,17 +37,10 @@ static void __iomem *wdog_base;
 /*
  * Reset the system. It is called by machine_restart().
  */
-void arch_reset(char mode, const char *cmd)
+void mxc_restart(char mode, const char *cmd)
 {
         unsigned int wcr_enable;
 
-#ifdef CONFIG_MACH_MX51_EFIKAMX
-        if (machine_is_mx51_efikamx()) {
-                mx51_efikamx_reset();
-                return;
-        }
-#endif
-
         if (cpu_is_mx1()) {
                 wcr_enable = (1 << 0);
         } else {
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
index 4b0fe285e83c..1c96cdb4c35e 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/plat-mxc/time.c
@@ -108,18 +108,9 @@ static void gpt_irq_acknowledge(void)
 
 static void __iomem *sched_clock_reg;
 
-static DEFINE_CLOCK_DATA(cd);
-unsigned long long notrace sched_clock(void)
+static u32 notrace mxc_read_sched_clock(void)
 {
-        cycle_t cyc = sched_clock_reg ? __raw_readl(sched_clock_reg) : 0;
-
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace mxc_update_sched_clock(void)
-{
-        cycle_t cyc = sched_clock_reg ? __raw_readl(sched_clock_reg) : 0;
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return sched_clock_reg ? __raw_readl(sched_clock_reg) : 0;
 }
 
 static int __init mxc_clocksource_init(struct clk *timer_clk)
@@ -129,7 +120,7 @@ static int __init mxc_clocksource_init(struct clk *timer_clk)
 
         sched_clock_reg = reg;
 
-        init_sched_clock(&cd, mxc_update_sched_clock, 32, c);
+        setup_sched_clock(mxc_read_sched_clock, 32, c);
         return clocksource_mmio_init(reg, "mxc_timer1", c, 200, 32,
                         clocksource_mmio_readl_up);
 }
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c
index 30b6433d910d..ad1b45b605a4 100644
--- a/arch/arm/plat-nomadik/timer.c
+++ b/arch/arm/plat-nomadik/timer.c
@@ -17,7 +17,6 @@
 #include <linux/clk.h>
 #include <linux/jiffies.h>
 #include <linux/err.h>
-#include <linux/sched.h>
 #include <asm/mach/time.h>
 #include <asm/sched_clock.h>
 
@@ -79,23 +78,12 @@ void __iomem *mtu_base; /* Assigned by machine code */
  * local implementation which uses the clocksource to get some
  * better resolution when scheduling the kernel.
  */
-static DEFINE_CLOCK_DATA(cd);
-
-unsigned long long notrace sched_clock(void)
+static u32 notrace nomadik_read_sched_clock(void)
 {
-        u32 cyc;
-
         if (unlikely(!mtu_base))
                 return 0;
 
-        cyc = -readl(mtu_base + MTU_VAL(0));
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void notrace nomadik_update_sched_clock(void)
-{
-        u32 cyc = -readl(mtu_base + MTU_VAL(0));
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return -readl(mtu_base + MTU_VAL(0));
 }
 #endif
 
@@ -231,9 +219,11 @@ void __init nmdk_timer_init(void)
                         rate, 200, 32, clocksource_mmio_readl_down))
                 pr_err("timer: failed to initialize clock source %s\n",
                        "mtu_0");
+
 #ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK
-        init_sched_clock(&cd, nomadik_update_sched_clock, 32, rate);
+        setup_sched_clock(nomadik_read_sched_clock, 32, rate);
 #endif
+
         /* Timer 1 is used for events */
 
         clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE);
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index a6cbb712da51..5f0f2292b7fb 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -17,7 +17,6 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/io.h>
-#include <linux/sched.h>
 #include <linux/clocksource.h>
 
 #include <asm/sched_clock.h>
@@ -37,41 +36,9 @@ static void __iomem *timer_32k_base;
 
 #define OMAP16XX_TIMER_32K_SYNCHRONIZED         0xfffbc410
 
-/*
- * Returns current time from boot in nsecs. It's OK for this to wrap
- * around for now, as it's just a relative time stamp.
- */
-static DEFINE_CLOCK_DATA(cd);
-
-/*
- * Constants generated by clocks_calc_mult_shift(m, s, 32768, NSEC_PER_SEC, 60).
- * This gives a resolution of about 30us and a wrap period of about 36hrs.
- */
-#define SC_MULT         4000000000u
-#define SC_SHIFT        17
-
-static inline unsigned long long notrace _omap_32k_sched_clock(void)
-{
-        u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0;
-        return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
-}
-
-#if defined(CONFIG_OMAP_32K_TIMER) && !defined(CONFIG_OMAP_MPU_TIMER)
-unsigned long long notrace sched_clock(void)
-{
-        return _omap_32k_sched_clock();
-}
-#else
-unsigned long long notrace omap_32k_sched_clock(void)
-{
-        return _omap_32k_sched_clock();
-}
-#endif
-
-static void notrace omap_update_sched_clock(void)
+static u32 notrace omap_32k_read_sched_clock(void)
 {
-        u32 cyc = timer_32k_base ? __raw_readl(timer_32k_base) : 0;
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return timer_32k_base ? __raw_readl(timer_32k_base) : 0;
 }
 
 /**
@@ -147,8 +114,7 @@ int __init omap_init_clocksource_32k(void)
                                           clocksource_mmio_readl_up))
                         printk(err, "32k_counter");
 
-                init_fixed_sched_clock(&cd, omap_update_sched_clock, 32,
-                                       32768, SC_MULT, SC_SHIFT);
+                setup_sched_clock(omap_32k_read_sched_clock, 32, 32768);
         }
         return 0;
 }
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 257f9770b2da..b4d7ec3fbfbe 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -31,7 +31,6 @@
 #include <plat/omap_hwmod.h>
 
 extern int __init omap_init_clocksource_32k(void);
-extern unsigned long long notrace omap_32k_sched_clock(void);
 
 extern void omap_reserve(void);
 extern int omap_dss_reset(struct omap_hwmod *);
diff --git a/arch/arm/plat-omap/include/plat/system.h b/arch/arm/plat-omap/include/plat/system.h
index c5fa9e929009..8e5ebd74b129 100644
--- a/arch/arm/plat-omap/include/plat/system.h
+++ b/arch/arm/plat-omap/include/plat/system.h
@@ -12,6 +12,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-extern void (*arch_reset)(char, const char *);
-
 #endif
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
index 41ab97ebe4cf..10d160888133 100644
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -384,12 +384,16 @@ void __init orion_gpio_init(int gpio_base, int ngpio,
         struct orion_gpio_chip *ochip;
         struct irq_chip_generic *gc;
         struct irq_chip_type *ct;
+        char gc_label[16];
 
         if (orion_gpio_chip_count == ARRAY_SIZE(orion_gpio_chips))
                 return;
 
+        snprintf(gc_label, sizeof(gc_label), "orion_gpio%d",
+                orion_gpio_chip_count);
+
         ochip = orion_gpio_chips + orion_gpio_chip_count;
-        ochip->chip.label = "orion_gpio";
+        ochip->chip.label = kstrdup(gc_label, GFP_KERNEL);
         ochip->chip.request = orion_gpio_request;
         ochip->chip.direction_input = orion_gpio_direction_input;
         ochip->chip.get = orion_gpio_get;
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 69a61367e4b8..1ed8d1397fcf 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -12,7 +12,6 @@
  */
 
 #include <linux/kernel.h>
-#include <linux/sched.h>
 #include <linux/timer.h>
 #include <linux/clockchips.h>
 #include <linux/interrupt.h>
@@ -60,24 +59,10 @@ static u32 ticks_per_jiffy;
  * Orion's sched_clock implementation. It has a resolution of
  * at least 7.5ns (133MHz TCLK).
  */
-static DEFINE_CLOCK_DATA(cd);
 
-unsigned long long notrace sched_clock(void)
+static u32 notrace orion_read_sched_clock(void)
 {
-        u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF);
-        return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-
-static void notrace orion_update_sched_clock(void)
-{
-        u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF);
-        update_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void __init setup_sched_clock(unsigned long tclk)
-{
-        init_sched_clock(&cd, orion_update_sched_clock, 32, tclk);
+        return ~readl(timer_base + TIMER0_VAL_OFF);
 }
 
 /*
@@ -217,7 +202,7 @@ orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask,
         /*
          * Set scale and timer for sched_clock.
          */
-        setup_sched_clock(tclk);
+        setup_sched_clock(orion_read_sched_clock, 32, tclk);
 
         /*
          * Setup free-running clocksource timer (interrupts
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 3c6335307fb1..1121df13e15f 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -192,27 +192,6 @@ static unsigned long s3c24xx_read_idcode_v4(void)
         return __raw_readl(S3C2410_GSTATUS1);
 }
 
-/* Hook for arm_pm_restart to ensure we execute the reset code
- * with the caches enabled. It seems at least the S3C2440 has a problem
- * resetting if there is bus activity interrupted by the reset.
- */
-static void s3c24xx_pm_restart(char mode, const char *cmd)
-{
-        if (mode != 's') {
-                unsigned long flags;
-
-                local_irq_save(flags);
-                __cpuc_flush_kern_all();
-                __cpuc_flush_user_all();
-
-                arch_reset(mode, cmd);
-                local_irq_restore(flags);
-        }
-
-        /* fallback, or unhandled */
-        arm_machine_restart(mode, cmd);
-}
-
 void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
 {
         /* initialise the io descriptors we need for initialisation */
@@ -226,7 +205,5 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
         }
         s3c24xx_init_cpu();
 
-        arm_pm_restart = s3c24xx_pm_restart;
-
         s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
 }
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 53754bcf15a7..9fe35348e03b 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -1437,11 +1437,10 @@ int __init s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel)
         size_t map_sz = sizeof(*nmap) * sel->map_size;
         int ptr;
 
-        nmap = kmalloc(map_sz, GFP_KERNEL);
+        nmap = kmemdup(sel->map, map_sz, GFP_KERNEL);
         if (nmap == NULL)
                 return -ENOMEM;
 
-        memcpy(nmap, sel->map, map_sz);
         memcpy(&dma_sel, sel, sizeof(*sel));
 
         dma_sel.map = nmap;
diff --git a/arch/arm/plat-s3c24xx/s3c2443-clock.c b/arch/arm/plat-s3c24xx/s3c2443-clock.c
index 5a21b15b2a97..95e68190d593 100644
--- a/arch/arm/plat-s3c24xx/s3c2443-clock.c
+++ b/arch/arm/plat-s3c24xx/s3c2443-clock.c
@@ -297,13 +297,6 @@ static struct clksrc_clk clk_usb_bus_host = {
 
 static struct clksrc_clk clksrc_clks[] = {
         {
-                /* ART baud-rate clock sourced from esysclk via a divisor */
-                .clk    = {
-                        .name           = "uartclk",
-                        .parent         = &clk_esysclk.clk,
-                },
-                .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 8 },
-        }, {
                 /* camera interface bus-clock, divided down from esysclk */
                 .clk    = {
                         .name           = "camif-upll", /* same as 2440 name */
@@ -323,6 +316,15 @@ static struct clksrc_clk clksrc_clks[] = {
         },
 };
 
+static struct clksrc_clk clk_esys_uart = {
+        /* ART baud-rate clock sourced from esysclk via a divisor */
+        .clk    = {
+                .name           = "uartclk",
+                .parent         = &clk_esysclk.clk,
+        },
+        .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 8 },
+};
+
 static struct clk clk_i2s_ext = {
         .name           = "i2s-ext",
 };
@@ -425,12 +427,6 @@ static struct clk init_clocks[] = {
                 .enable         = s3c2443_clkcon_enable_h,
                 .ctrlbit        = S3C2443_HCLKCON_DMA5,
         }, {
-                .name           = "hsmmc",
-                .devname        = "s3c-sdhci.1",
-                .parent         = &clk_h,
-                .enable         = s3c2443_clkcon_enable_h,
-                .ctrlbit        = S3C2443_HCLKCON_HSMMC,
-        }, {
                 .name           = "gpio",
                 .parent         = &clk_p,
                 .enable         = s3c2443_clkcon_enable_p,
@@ -512,6 +508,14 @@ static struct clk init_clocks[] = {
         }
 };
 
+static struct clk hsmmc1_clk = {
+        .name           = "hsmmc",
+        .devname        = "s3c-sdhci.1",
+        .parent         = &clk_h,
+        .enable         = s3c2443_clkcon_enable_h,
+        .ctrlbit        = S3C2443_HCLKCON_HSMMC,
+};
+
 static inline unsigned long s3c2443_get_hdiv(unsigned long clkcon0)
 {
         clkcon0 &= S3C2443_CLKDIV0_HCLKDIV_MASK;
@@ -577,6 +581,7 @@ static struct clk *clks[] __initdata = {
         &clk_epll,
         &clk_usb_bus,
         &clk_armdiv,
+        &hsmmc1_clk,
 };
 
 static struct clksrc_clk *clksrcs[] __initdata = {
@@ -589,6 +594,13 @@ static struct clksrc_clk *clksrcs[] __initdata = {
         &clk_arm,
 };
 
+static struct clk_lookup s3c2443_clk_lookup[] = {
+        CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
+        CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
+        CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_esys_uart.clk),
+        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &hsmmc1_clk),
+};
+
 void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll,
                                        unsigned int *divs, int nr_divs,
                                        int divmask)
@@ -618,6 +630,7 @@ void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll,
         /* See s3c2443/etc notes on disabling clocks at init time */
         s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
         s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
+        clkdev_add_table(s3c2443_clk_lookup, ARRAY_SIZE(s3c2443_clk_lookup));
 
         s3c2443_common_setup_clocks(get_mpll);
 }
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index 876344038b8d..30d8c3016e6b 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -13,7 +13,6 @@ obj-				:=
 # Core files
 
 obj-y                           += dev-uart.o
-obj-y                           += cpu.o
 obj-y                           += clock.o
 obj-y                           += irq.o
 obj-$(CONFIG_S5P_EXT_INT)       += irq-eint.o
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
deleted file mode 100644
index a56959e83516..000000000000
--- a/arch/arm/plat-s5p/cpu.c
+++ /dev/null
@@ -1,144 +0,0 @@
-/* linux/arch/arm/plat-s5p/cpu.c
- *
- * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * S5P CPU Support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/init.h>
-#include <linux/module.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include <mach/map.h>
-#include <mach/regs-clock.h>
-
-#include <plat/cpu.h>
-#include <plat/s5p6440.h>
-#include <plat/s5p6450.h>
-#include <plat/s5pc100.h>
-#include <plat/s5pv210.h>
-#include <plat/exynos4.h>
-
-/* table of supported CPUs */
-
-static const char name_s5p6440[] = "S5P6440";
-static const char name_s5p6450[] = "S5P6450";
-static const char name_s5pc100[] = "S5PC100";
-static const char name_s5pv210[] = "S5PV210/S5PC110";
-static const char name_exynos4210[] = "EXYNOS4210";
-static const char name_exynos4212[] = "EXYNOS4212";
-static const char name_exynos4412[] = "EXYNOS4412";
-
-static struct cpu_table cpu_ids[] __initdata = {
-        {
-                .idcode         = S5P6440_CPU_ID,
-                .idmask         = S5P64XX_CPU_MASK,
-                .map_io         = s5p6440_map_io,
-                .init_clocks    = s5p6440_init_clocks,
-                .init_uarts     = s5p6440_init_uarts,
-                .init           = s5p64x0_init,
-                .name           = name_s5p6440,
-        }, {
-                .idcode         = S5P6450_CPU_ID,
-                .idmask         = S5P64XX_CPU_MASK,
-                .map_io         = s5p6450_map_io,
-                .init_clocks    = s5p6450_init_clocks,
-                .init_uarts     = s5p6450_init_uarts,
-                .init           = s5p64x0_init,
-                .name           = name_s5p6450,
-        }, {
-                .idcode         = S5PC100_CPU_ID,
-                .idmask         = S5PC100_CPU_MASK,
-                .map_io         = s5pc100_map_io,
-                .init_clocks    = s5pc100_init_clocks,
-                .init_uarts     = s5pc100_init_uarts,
-                .init           = s5pc100_init,
-                .name           = name_s5pc100,
-        }, {
-                .idcode         = S5PV210_CPU_ID,
-                .idmask         = S5PV210_CPU_MASK,
-                .map_io         = s5pv210_map_io,
-                .init_clocks    = s5pv210_init_clocks,
-                .init_uarts     = s5pv210_init_uarts,
-                .init           = s5pv210_init,
-                .name           = name_s5pv210,
-        }, {
-                .idcode         = EXYNOS4210_CPU_ID,
-                .idmask         = EXYNOS4_CPU_MASK,
-                .map_io         = exynos4_map_io,
-                .init_clocks    = exynos4_init_clocks,
-                .init_uarts     = exynos4_init_uarts,
-                .init           = exynos_init,
-                .name           = name_exynos4210,
-        }, {
-                .idcode         = EXYNOS4212_CPU_ID,
-                .idmask         = EXYNOS4_CPU_MASK,
-                .map_io         = exynos4_map_io,
-                .init_clocks    = exynos4_init_clocks,
-                .init_uarts     = exynos4_init_uarts,
-                .init           = exynos_init,
-                .name           = name_exynos4212,
-        }, {
-                .idcode         = EXYNOS4412_CPU_ID,
-                .idmask         = EXYNOS4_CPU_MASK,
-                .map_io         = exynos4_map_io,
-                .init_clocks    = exynos4_init_clocks,
-                .init_uarts     = exynos4_init_uarts,
-                .init           = exynos_init,
-                .name           = name_exynos4412,
-        },
-};
-
-/* minimal IO mapping */
-
-static struct map_desc s5p_iodesc[] __initdata = {
-        {
-                .virtual        = (unsigned long)S5P_VA_CHIPID,
-                .pfn            = __phys_to_pfn(S5P_PA_CHIPID),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_SYS,
-                .pfn            = __phys_to_pfn(S5P_PA_SYSCON),
-                .length         = SZ_64K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_TIMER,
-                .pfn            = __phys_to_pfn(S5P_PA_TIMER),
-                .length         = SZ_16K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S3C_VA_WATCHDOG,
-                .pfn            = __phys_to_pfn(S3C_PA_WDT),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = (unsigned long)S5P_VA_SROMC,
-                .pfn            = __phys_to_pfn(S5P_PA_SROMC),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        },
-};
-
-/* read cpu identification code */
-
-void __init s5p_init_io(struct map_desc *mach_desc,
-                        int size, void __iomem *cpuid_addr)
-{
-        /* initialize the io descriptors we need for initialization */
-        iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc));
-        if (mach_desc)
-                iotable_init(mach_desc, size);
-
-        /* detect cpu id and rev. */
-        s5p_init_cpu(cpuid_addr);
-
-        s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
-}
diff --git a/arch/arm/plat-s5p/s5p-time.c b/arch/arm/plat-s5p/s5p-time.c
index c833e7b57599..17c0a2c58dfd 100644
--- a/arch/arm/plat-s5p/s5p-time.c
+++ b/arch/arm/plat-s5p/s5p-time.c
@@ -10,7 +10,6 @@
  * published by the Free Software Foundation.
 */
 
-#include <linux/sched.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/err.h>
@@ -321,26 +320,14 @@ static void __iomem *s5p_timer_reg(void)
  * this wraps around for now, since it is just a relative time
  * stamp. (Inspired by U300 implementation.)
  */
-static DEFINE_CLOCK_DATA(cd);
-
-unsigned long long notrace sched_clock(void)
+static u32 notrace s5p_read_sched_clock(void)
 {
         void __iomem *reg = s5p_timer_reg();
 
         if (!reg)
                 return 0;
 
-        return cyc_to_sched_clock(&cd, ~__raw_readl(reg), (u32)~0);
-}
-
-static void notrace s5p_update_sched_clock(void)
-{
-        void __iomem *reg = s5p_timer_reg();
-
-        if (!reg)
-                return;
-
-        update_sched_clock(&cd, ~__raw_readl(reg), (u32)~0);
+        return ~__raw_readl(reg);
 }
 
 static void __init s5p_clocksource_init(void)
@@ -358,7 +345,7 @@ static void __init s5p_clocksource_init(void)
         s5p_time_setup(timer_source.source_id, TCNT_MAX);
         s5p_time_start(timer_source.source_id, PERIODIC);
 
-        init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate);
+        setup_sched_clock(s5p_read_sched_clock, 32, clock_rate);
 
         if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer",
                         clock_rate, 250, 32, clocksource_mmio_readl_down))
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index bb0af66bb487..6a2abe67c8b2 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -234,11 +234,23 @@ config SAMSUNG_DEV_IDE
         help
           Compile in platform device definitions for IDE
 
-config S3C64XX_DEV_SPI
+config S3C64XX_DEV_SPI0
         bool
         help
           Compile in platform device definitions for S3C64XX's type
-          SPI controllers.
+          SPI controller 0
+
+config S3C64XX_DEV_SPI1
+        bool
+        help
+          Compile in platform device definitions for S3C64XX's type
+          SPI controller 1
+
+config S3C64XX_DEV_SPI2
+        bool
+        help
+          Compile in platform device definitions for S3C64XX's type
+          SPI controller 2
 
 config SAMSUNG_DEV_TS
         bool
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 4ca8b571f971..de0d88d6a0f1 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -61,6 +61,7 @@
 #include <plat/regs-iic.h>
 #include <plat/regs-serial.h>
 #include <plat/regs-spi.h>
+#include <plat/s3c64xx-spi.h>
 
 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
 
@@ -1461,3 +1462,129 @@ struct platform_device s3c_device_wdt = {
         .resource       = s3c_wdt_resource,
 };
 #endif /* CONFIG_S3C_DEV_WDT */
+
+#ifdef CONFIG_S3C64XX_DEV_SPI0
+static struct resource s3c64xx_spi0_resource[] = {
+        [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
+        [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
+        [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
+        [3] = DEFINE_RES_IRQ(IRQ_SPI0),
+};
+
+struct platform_device s3c64xx_device_spi0 = {
+        .name           = "s3c64xx-spi",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(s3c64xx_spi0_resource),
+        .resource       = s3c64xx_spi0_resource,
+        .dev = {
+                .dma_mask               = &samsung_device_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+};
+
+void __init s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
+                                      int src_clk_nr, int num_cs)
+{
+        if (!pd) {
+                pr_err("%s:Need to pass platform data\n", __func__);
+                return;
+        }
+
+        /* Reject invalid configuration */
+        if (!num_cs || src_clk_nr < 0) {
+                pr_err("%s: Invalid SPI configuration\n", __func__);
+                return;
+        }
+
+        pd->num_cs = num_cs;
+        pd->src_clk_nr = src_clk_nr;
+        if (!pd->cfg_gpio)
+                pd->cfg_gpio = s3c64xx_spi0_cfg_gpio;
+
+        s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi0);
+}
+#endif /* CONFIG_S3C64XX_DEV_SPI0 */
+
+#ifdef CONFIG_S3C64XX_DEV_SPI1
+static struct resource s3c64xx_spi1_resource[] = {
+        [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
+        [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
+        [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
+        [3] = DEFINE_RES_IRQ(IRQ_SPI1),
+};
+
+struct platform_device s3c64xx_device_spi1 = {
+        .name           = "s3c64xx-spi",
+        .id             = 1,
+        .num_resources  = ARRAY_SIZE(s3c64xx_spi1_resource),
+        .resource       = s3c64xx_spi1_resource,
+        .dev = {
+                .dma_mask               = &samsung_device_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+};
+
+void __init s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd,
+                                      int src_clk_nr, int num_cs)
+{
+        if (!pd) {
+                pr_err("%s:Need to pass platform data\n", __func__);
+                return;
+        }
+
+        /* Reject invalid configuration */
+        if (!num_cs || src_clk_nr < 0) {
+                pr_err("%s: Invalid SPI configuration\n", __func__);
+                return;
+        }
+
+        pd->num_cs = num_cs;
+        pd->src_clk_nr = src_clk_nr;
+        if (!pd->cfg_gpio)
+                pd->cfg_gpio = s3c64xx_spi1_cfg_gpio;
+
+        s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi1);
+}
+#endif /* CONFIG_S3C64XX_DEV_SPI1 */
+
+#ifdef CONFIG_S3C64XX_DEV_SPI2
+static struct resource s3c64xx_spi2_resource[] = {
+        [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
+        [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
+        [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
+        [3] = DEFINE_RES_IRQ(IRQ_SPI2),
+};
+
+struct platform_device s3c64xx_device_spi2 = {
+        .name           = "s3c64xx-spi",
+        .id             = 2,
+        .num_resources  = ARRAY_SIZE(s3c64xx_spi2_resource),
+        .resource       = s3c64xx_spi2_resource,
+        .dev = {
+                .dma_mask               = &samsung_device_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+};
+
+void __init s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
+                                      int src_clk_nr, int num_cs)
+{
+        if (!pd) {
+                pr_err("%s:Need to pass platform data\n", __func__);
+                return;
+        }
+
+        /* Reject invalid configuration */
+        if (!num_cs || src_clk_nr < 0) {
+                pr_err("%s: Invalid SPI configuration\n", __func__);
+                return;
+        }
+
+        pd->num_cs = num_cs;
+        pd->src_clk_nr = src_clk_nr;
+        if (!pd->cfg_gpio)
+                pd->cfg_gpio = s3c64xx_spi2_cfg_gpio;
+
+        s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi2);
+}
+#endif /* CONFIG_S3C64XX_DEV_SPI2 */
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c
index 93a994a5dd8f..2cded872f22b 100644
--- a/arch/arm/plat-samsung/dma-ops.c
+++ b/arch/arm/plat-samsung/dma-ops.c
@@ -18,23 +18,24 @@
 
 #include <mach/dma.h>
 
-static inline bool pl330_filter(struct dma_chan *chan, void *param)
-{
-        struct dma_pl330_peri *peri = chan->private;
-        return peri->peri_id == (unsigned)param;
-}
-
 static unsigned samsung_dmadev_request(enum dma_ch dma_ch,
                                 struct samsung_dma_info *info)
 {
         struct dma_chan *chan;
         dma_cap_mask_t mask;
         struct dma_slave_config slave_config;
+        void *filter_param;
 
         dma_cap_zero(mask);
         dma_cap_set(info->cap, mask);
 
-        chan = dma_request_channel(mask, pl330_filter, (void *)dma_ch);
+        /*
+         * If a dma channel property of a device node from device tree is
+         * specified, use that as the fliter parameter.
+         */
+        filter_param = (dma_ch == DMACH_DT_PROP) ? (void *)info->dt_dmach_prop :
+                                (void *)dma_ch;
+        chan = dma_request_channel(mask, pl330_filter, filter_param);
 
         if (info->direction == DMA_FROM_DEVICE) {
                 memset(&slave_config, 0, sizeof(struct dma_slave_config));
diff --git a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
index dac4760c0f0a..95509d8eb140 100644
--- a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
+++ b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
@@ -202,14 +202,6 @@ extern int s3c_plltab_register(struct cpufreq_frequency_table *plls,
 extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void);
 extern struct s3c_iotimings *s3c_cpufreq_getiotimings(void);
 
-extern void s3c2410_iotiming_debugfs(struct seq_file *seq,
-                                     struct s3c_cpufreq_config *cfg,
-                                     union s3c_iobank *iob);
-
-extern void s3c2412_iotiming_debugfs(struct seq_file *seq,
-                                     struct s3c_cpufreq_config *cfg,
-                                     union s3c_iobank *iob);
-
 #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUGFS
 #define s3c_cpufreq_debugfs_call(x) x
 #else
@@ -226,6 +218,10 @@ extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg);
 extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg);
 
 #ifdef CONFIG_S3C2410_IOTIMING
+extern void s3c2410_iotiming_debugfs(struct seq_file *seq,
+                                     struct s3c_cpufreq_config *cfg,
+                                     union s3c_iobank *iob);
+
 extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg,
                                  struct s3c_iotimings *iot);
 
@@ -235,6 +231,7 @@ extern int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg,
 extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,
                                  struct s3c_iotimings *iot);
 #else
+#define s3c2410_iotiming_debugfs NULL
 #define s3c2410_iotiming_calc NULL
 #define s3c2410_iotiming_get NULL
 #define s3c2410_iotiming_set NULL
@@ -242,8 +239,10 @@ extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,
 
 /* S3C2412 compatible routines */
 
-extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg,
-                                struct s3c_iotimings *timings);
+#ifdef CONFIG_S3C2412_IOTIMING
+extern void s3c2412_iotiming_debugfs(struct seq_file *seq,
+                                     struct s3c_cpufreq_config *cfg,
+                                     union s3c_iobank *iob);
 
 extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg,
                                 struct s3c_iotimings *timings);
@@ -253,6 +252,12 @@ extern int s3c2412_iotiming_calc(struct s3c_cpufreq_config *cfg,
 
 extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg,
                                  struct s3c_iotimings *iot);
+#else
+#define s3c2412_iotiming_debugfs NULL
+#define s3c2412_iotiming_calc NULL
+#define s3c2412_iotiming_get NULL
+#define s3c2412_iotiming_set NULL
+#endif /* CONFIG_S3C2412_IOTIMING */
 
 #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUG
 #define s3c_freq_dbg(x...) printk(KERN_INFO x)
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index 40fd7b6b5e66..258d9d8a94f2 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -152,13 +152,9 @@ extern void s3c_init_cpu(unsigned long idcode,
 /* core initialisation functions */
 
 extern void s3c24xx_init_irq(void);
-extern void s3c64xx_init_irq(u32 vic0, u32 vic1);
 extern void s5p_init_irq(u32 *vic, u32 num_vic);
 
 extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
-extern void s3c64xx_init_io(struct map_desc *mach_desc, int size);
-extern void s5p_init_io(struct map_desc *mach_desc,
-                        int size, void __iomem *cpuid_addr);
 
 extern void s3c24xx_init_cpu(void);
 extern void s3c64xx_init_cpu(void);
@@ -183,7 +179,6 @@ extern struct syscore_ops s3c2410_pm_syscore_ops;
 extern struct syscore_ops s3c2412_pm_syscore_ops;
 extern struct syscore_ops s3c2416_pm_syscore_ops;
 extern struct syscore_ops s3c244x_pm_syscore_ops;
-extern struct syscore_ops s3c64xx_irq_syscore_ops;
 
 /* system device classes */
 
@@ -195,7 +190,6 @@ extern struct sysdev_class s3c2440_sysclass;
 extern struct sysdev_class s3c2442_sysclass;
 extern struct sysdev_class s3c2443_sysclass;
 extern struct sysdev_class s3c6410_sysclass;
-extern struct sysdev_class s3c64xx_sysclass;
 extern struct sysdev_class s5p64x0_sysclass;
 extern struct sysdev_class s5pv210_sysclass;
 extern struct sysdev_class exynos4_sysclass;
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index ab633c9c2aec..83b1e31696d9 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -39,6 +39,7 @@ extern struct platform_device s3c64xx_device_pcm0;
 extern struct platform_device s3c64xx_device_pcm1;
 extern struct platform_device s3c64xx_device_spi0;
 extern struct platform_device s3c64xx_device_spi1;
+extern struct platform_device s3c64xx_device_spi2;
 
 extern struct platform_device s3c_device_adc;
 extern struct platform_device s3c_device_cfcon;
@@ -98,8 +99,6 @@ extern struct platform_device s5p6450_device_iis1;
 extern struct platform_device s5p6450_device_iis2;
 extern struct platform_device s5p6450_device_pcm0;
 
-extern struct platform_device s5p64x0_device_spi0;
-extern struct platform_device s5p64x0_device_spi1;
 
 extern struct platform_device s5pc100_device_ac97;
 extern struct platform_device s5pc100_device_iis0;
@@ -108,9 +107,6 @@ extern struct platform_device s5pc100_device_iis2;
 extern struct platform_device s5pc100_device_pcm0;
 extern struct platform_device s5pc100_device_pcm1;
 extern struct platform_device s5pc100_device_spdif;
-extern struct platform_device s5pc100_device_spi0;
-extern struct platform_device s5pc100_device_spi1;
-extern struct platform_device s5pc100_device_spi2;
 
 extern struct platform_device s5pv210_device_ac97;
 extern struct platform_device s5pv210_device_iis0;
@@ -120,8 +116,6 @@ extern struct platform_device s5pv210_device_pcm0;
 extern struct platform_device s5pv210_device_pcm1;
 extern struct platform_device s5pv210_device_pcm2;
 extern struct platform_device s5pv210_device_spdif;
-extern struct platform_device s5pv210_device_spi0;
-extern struct platform_device s5pv210_device_spi1;
 
 extern struct platform_device exynos4_device_ac97;
 extern struct platform_device exynos4_device_ahci;
diff --git a/arch/arm/plat-samsung/include/plat/dma-ops.h b/arch/arm/plat-samsung/include/plat/dma-ops.h
index 4c1a363526cf..22eafc310bd7 100644
--- a/arch/arm/plat-samsung/include/plat/dma-ops.h
+++ b/arch/arm/plat-samsung/include/plat/dma-ops.h
@@ -31,6 +31,7 @@ struct samsung_dma_info {
         enum dma_slave_buswidth width;
         dma_addr_t fifo;
         struct s3c2410_dma_client *client;
+        struct property *dt_dmach_prop;
 };
 
 struct samsung_dma_ops {
diff --git a/arch/arm/plat-samsung/include/plat/dma-pl330.h b/arch/arm/plat-samsung/include/plat/dma-pl330.h
index 2e55e5958674..c5eaad529de5 100644
--- a/arch/arm/plat-samsung/include/plat/dma-pl330.h
+++ b/arch/arm/plat-samsung/include/plat/dma-pl330.h
@@ -21,7 +21,8 @@
  * use these just as IDs.
  */
 enum dma_ch {
-        DMACH_UART0_RX,
+        DMACH_DT_PROP = -1,
+        DMACH_UART0_RX = 0,
         DMACH_UART0_TX,
         DMACH_UART1_RX,
         DMACH_UART1_TX,
diff --git a/arch/arm/plat-samsung/include/plat/exynos4.h b/arch/arm/plat-samsung/include/plat/exynos4.h
deleted file mode 100644
index f546e88ebc94..000000000000
--- a/arch/arm/plat-samsung/include/plat/exynos4.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/exynos4.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Header file for exynos4 cpu support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/* Common init code for EXYNOS4 related SoCs */
-
-extern void exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-extern void exynos4_register_clocks(void);
-extern void exynos4210_register_clocks(void);
-extern void exynos4212_register_clocks(void);
-extern void exynos4_setup_clocks(void);
-
-#ifdef CONFIG_ARCH_EXYNOS
-extern  int exynos_init(void);
-extern void exynos4_init_irq(void);
-extern void exynos4_map_io(void);
-extern void exynos4_init_clocks(int xtal);
-extern struct sys_timer exynos4_timer;
-
-#define exynos4_init_uarts exynos4_common_init_uarts
-
-#else
-#define exynos4_init_clocks NULL
-#define exynos4_init_uarts NULL
-#define exynos4_map_io NULL
-#define exynos_init NULL
-#endif
diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h
index 08d1a7ef97b7..df46b776976a 100644
--- a/arch/arm/plat-samsung/include/plat/irqs.h
+++ b/arch/arm/plat-samsung/include/plat/irqs.h
@@ -44,13 +44,14 @@
 #define S5P_IRQ_VIC2(x)         (S5P_VIC2_BASE + (x))
 #define S5P_IRQ_VIC3(x)         (S5P_VIC3_BASE + (x))
 
-#define S5P_TIMER_IRQ(x)        (11 + (x))
+#define S5P_TIMER_IRQ(x)        (IRQ_TIMER_BASE + (x))
 
 #define IRQ_TIMER0              S5P_TIMER_IRQ(0)
 #define IRQ_TIMER1              S5P_TIMER_IRQ(1)
 #define IRQ_TIMER2              S5P_TIMER_IRQ(2)
 #define IRQ_TIMER3              S5P_TIMER_IRQ(3)
 #define IRQ_TIMER4              S5P_TIMER_IRQ(4)
+#define IRQ_TIMER_COUNT         (5)
 
 #define IRQ_EINT(x)             ((x) < 16 ? ((x) + S5P_EINT_BASE1) \
                                         : ((x) - 16 + S5P_EINT_BASE2))
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h
index 720734847027..29c26a818842 100644
--- a/arch/arm/plat-samsung/include/plat/regs-serial.h
+++ b/arch/arm/plat-samsung/include/plat/regs-serial.h
@@ -71,6 +71,7 @@
 #define S3C2410_LCON_IRM          (1<<6)
 
 #define S3C2440_UCON_CLKMASK      (3<<10)
+#define S3C2440_UCON_CLKSHIFT     (10)
 #define S3C2440_UCON_PCLK         (0<<10)
 #define S3C2440_UCON_UCLK         (1<<10)
 #define S3C2440_UCON_PCLK2        (2<<10)
@@ -78,6 +79,7 @@
 #define S3C2443_UCON_EPLL         (3<<10)
 
 #define S3C6400_UCON_CLKMASK    (3<<10)
+#define S3C6400_UCON_CLKSHIFT   (10)
 #define S3C6400_UCON_PCLK       (0<<10)
 #define S3C6400_UCON_PCLK2      (2<<10)
 #define S3C6400_UCON_UCLK0      (1<<10)
@@ -90,11 +92,14 @@
 #define S3C2440_UCON_DIVSHIFT     (12)
 
 #define S3C2412_UCON_CLKMASK    (3<<10)
+#define S3C2412_UCON_CLKSHIFT   (10)
 #define S3C2412_UCON_UCLK       (1<<10)
 #define S3C2412_UCON_USYSCLK    (3<<10)
 #define S3C2412_UCON_PCLK       (0<<10)
 #define S3C2412_UCON_PCLK2      (2<<10)
 
+#define S3C2410_UCON_CLKMASK    (1 << 10)
+#define S3C2410_UCON_CLKSHIFT   (10)
 #define S3C2410_UCON_UCLK         (1<<10)
 #define S3C2410_UCON_SBREAK       (1<<4)
 
@@ -193,6 +198,7 @@
 
 /* Following are specific to S5PV210 */
 #define S5PV210_UCON_CLKMASK    (1<<10)
+#define S5PV210_UCON_CLKSHIFT   (10)
 #define S5PV210_UCON_PCLK       (0<<10)
 #define S5PV210_UCON_UCLK       (1<<10)
 
@@ -221,29 +227,24 @@
 #define S5PV210_UFSTAT_RXMASK   (255<<0)
 #define S5PV210_UFSTAT_RXSHIFT  (0)
 
-#define NO_NEED_CHECK_CLKSRC    1
+#define S3C2410_UCON_CLKSEL0    (1 << 0)
+#define S3C2410_UCON_CLKSEL1    (1 << 1)
+#define S3C2410_UCON_CLKSEL2    (1 << 2)
+#define S3C2410_UCON_CLKSEL3    (1 << 3)
 
-#ifndef __ASSEMBLY__
+/* Default values for s5pv210 UCON and UFCON uart registers */
+#define S5PV210_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
+                                 S3C2410_UCON_RXILEVEL |        \
+                                 S3C2410_UCON_TXIRQMODE |       \
+                                 S3C2410_UCON_RXIRQMODE |       \
+                                 S3C2410_UCON_RXFIFO_TOI |      \
+                                 S3C2443_UCON_RXERR_IRQEN)
 
-/* struct s3c24xx_uart_clksrc
- *
- * this structure defines a named clock source that can be used for the
- * uart, so that the best clock can be selected for the requested baud
- * rate.
- *
- * min_baud and max_baud define the range of baud-rates this clock is
- * acceptable for, if they are both zero, it is assumed any baud rate that
- * can be generated from this clock will be used.
- *
- * divisor gives the divisor from the clock to the one seen by the uart
-*/
+#define S5PV210_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
+                                 S5PV210_UFCON_TXTRIG4 |        \
+                                 S5PV210_UFCON_RXTRIG4)
 
-struct s3c24xx_uart_clksrc {
-        const char      *name;
-        unsigned int     divisor;
-        unsigned int     min_baud;
-        unsigned int     max_baud;
-};
+#ifndef __ASSEMBLY__
 
 /* configuration structure for per-machine configurations for the
  * serial port
@@ -257,15 +258,13 @@ struct s3c2410_uartcfg {
         unsigned char      unused;
         unsigned short     flags;
         upf_t              uart_flags;   /* default uart flags */
+        unsigned int       clk_sel;
 
         unsigned int       has_fracval;
 
         unsigned long      ucon;         /* value of ucon for port */
         unsigned long      ulcon;        /* value of ulcon for port */
         unsigned long      ufcon;        /* value of ufcon for port */
-
-        struct s3c24xx_uart_clksrc *clocks;
-        unsigned int                clocks_size;
 };
 
 /* s3c24xx_uart_devs
diff --git a/arch/arm/plat-samsung/include/plat/reset.h b/arch/arm/plat-samsung/include/plat/reset.h
deleted file mode 100644
index 32ca5179c6e1..000000000000
--- a/arch/arm/plat-samsung/include/plat/reset.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/reset.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __PLAT_SAMSUNG_RESET_H
-#define __PLAT_SAMSUNG_RESET_H __FILE__
-
-extern void (*s5p_reset_hook)(void);
-
-#endif /* __PLAT_SAMSUNG_RESET_H */
diff --git a/arch/arm/plat-samsung/include/plat/s3c2412.h b/arch/arm/plat-samsung/include/plat/s3c2412.h
index 5bcfd143ba16..cbae50ddacc8 100644
--- a/arch/arm/plat-samsung/include/plat/s3c2412.h
+++ b/arch/arm/plat-samsung/include/plat/s3c2412.h
@@ -21,9 +21,12 @@ extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 extern void s3c2412_init_clocks(int xtal);
 
 extern  int s3c2412_baseclk_add(void);
+
+extern void s3c2412_restart(char mode, const char *cmd);
 #else
 #define s3c2412_init_clocks NULL
 #define s3c2412_init_uarts NULL
 #define s3c2412_map_io NULL
 #define s3c2412_init NULL
+#define s3c2412_restart NULL
 #endif
diff --git a/arch/arm/plat-samsung/include/plat/s3c2416.h b/arch/arm/plat-samsung/include/plat/s3c2416.h
index a764f8503f52..de2b5bdc5ebd 100644
--- a/arch/arm/plat-samsung/include/plat/s3c2416.h
+++ b/arch/arm/plat-samsung/include/plat/s3c2416.h
@@ -23,9 +23,11 @@ extern void s3c2416_init_clocks(int xtal);
 
 extern  int s3c2416_baseclk_add(void);
 
+extern void s3c2416_restart(char mode, const char *cmd);
 #else
 #define s3c2416_init_clocks NULL
 #define s3c2416_init_uarts NULL
 #define s3c2416_map_io NULL
 #define s3c2416_init NULL
+#define s3c2416_restart NULL
 #endif
diff --git a/arch/arm/plat-samsung/include/plat/s3c2443.h b/arch/arm/plat-samsung/include/plat/s3c2443.h
index 7fae1a050694..dce05b43d51c 100644
--- a/arch/arm/plat-samsung/include/plat/s3c2443.h
+++ b/arch/arm/plat-samsung/include/plat/s3c2443.h
@@ -24,11 +24,13 @@ extern void s3c2443_init_clocks(int xtal);
 
 extern  int s3c2443_baseclk_add(void);
 
+extern void s3c2443_restart(char mode, const char *cmd);
 #else
 #define s3c2443_init_clocks NULL
 #define s3c2443_init_uarts NULL
 #define s3c2443_map_io NULL
 #define s3c2443_init NULL
+#define s3c2443_restart NULL
 #endif
 
 /* common code used by s3c2443 and others.
diff --git a/arch/arm/plat-samsung/include/plat/s3c6400.h b/arch/arm/plat-samsung/include/plat/s3c6400.h
deleted file mode 100644
index 37d428aaaebb..000000000000
--- a/arch/arm/plat-samsung/include/plat/s3c6400.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/s3c6400.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * Header file for s3c6400 cpu support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/* Common init code for S3C6400 related SoCs */
-
-extern void s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-extern void s3c6400_setup_clocks(void);
-
-extern void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit);
-
-#ifdef CONFIG_CPU_S3C6400
-
-extern  int s3c6400_init(void);
-extern void s3c6400_init_irq(void);
-extern void s3c6400_map_io(void);
-extern void s3c6400_init_clocks(int xtal);
-
-#define s3c6400_init_uarts s3c6400_common_init_uarts
-
-#else
-#define s3c6400_init_clocks NULL
-#define s3c6400_init_uarts NULL
-#define s3c6400_map_io NULL
-#define s3c6400_init NULL
-#endif
diff --git a/arch/arm/plat-samsung/include/plat/s3c6410.h b/arch/arm/plat-samsung/include/plat/s3c6410.h
deleted file mode 100644
index 20a6675b9d17..000000000000
--- a/arch/arm/plat-samsung/include/plat/s3c6410.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/s3c6410.h
- *
- * Copyright 2008 Openmoko,  Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * Header file for s3c6410 cpu support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifdef CONFIG_CPU_S3C6410
-
-extern  int s3c6410_init(void);
-extern void s3c6410_init_irq(void);
-extern void s3c6410_map_io(void);
-extern void s3c6410_init_clocks(int xtal);
-
-#define s3c6410_init_uarts s3c6400_common_init_uarts
-
-#else
-#define s3c6410_init_clocks NULL
-#define s3c6410_init_uarts NULL
-#define s3c6410_map_io NULL
-#define s3c6410_init NULL
-#endif
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
index 4c16fa3621bb..aea68b60ef98 100644
--- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
+++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
@@ -31,7 +31,6 @@ struct s3c64xx_spi_csinfo {
 /**
  * struct s3c64xx_spi_info - SPI Controller defining structure
  * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field.
- * @src_clk_name: Platform name of the corresponding clock.
  * @clk_from_cmu: If the SPI clock/prescalar control block is present
  *     by the platform's clock-management-unit and not in SPI controller.
  * @num_cs: Number of CS this controller emulates.
@@ -43,7 +42,6 @@ struct s3c64xx_spi_csinfo {
  */
 struct s3c64xx_spi_info {
         int src_clk_nr;
-        char *src_clk_name;
         bool clk_from_cmu;
 
         int num_cs;
@@ -58,18 +56,28 @@ struct s3c64xx_spi_info {
 };
 
 /**
- * s3c64xx_spi_set_info - SPI Controller configure callback by the board
+ * s3c64xx_spi_set_platdata - SPI Controller configure callback by the board
  *                              initialization code.
- * @cntrlr: SPI controller number the configuration is for.
+ * @pd: SPI platform data to set.
  * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks.
  * @num_cs: Number of elements in the 'cs' array.
  *
  * Call this from machine init code for each SPI Controller that
  * has some chips attached to it.
  */
-extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
-extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
-extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
-extern void s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
+extern void s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
+                                      int src_clk_nr, int num_cs);
+extern void s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd,
+                                      int src_clk_nr, int num_cs);
+extern void s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
+                                      int src_clk_nr, int num_cs);
 
+/* defined by architecture to configure gpio */
+extern int s3c64xx_spi0_cfg_gpio(struct platform_device *dev);
+extern int s3c64xx_spi1_cfg_gpio(struct platform_device *dev);
+extern int s3c64xx_spi2_cfg_gpio(struct platform_device *dev);
+
+extern struct s3c64xx_spi_info s3c64xx_spi0_pdata;
+extern struct s3c64xx_spi_info s3c64xx_spi1_pdata;
+extern struct s3c64xx_spi_info s3c64xx_spi2_pdata;
 #endif /* __S3C64XX_PLAT_SPI_H */
diff --git a/arch/arm/plat-samsung/include/plat/s5p6440.h b/arch/arm/plat-samsung/include/plat/s5p6440.h
deleted file mode 100644
index bf85ebbb4fbc..000000000000
--- a/arch/arm/plat-samsung/include/plat/s5p6440.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/s5p6440.h
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Header file for s5p6440 cpu support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
- /* Common init code for S5P6440 related SoCs */
-
-extern void s5p6440_register_clocks(void);
-extern void s5p6440_setup_clocks(void);
-
-#ifdef CONFIG_CPU_S5P6440
-
-extern  int s5p64x0_init(void);
-extern void s5p6440_init_irq(void);
-extern void s5p6440_map_io(void);
-extern void s5p6440_init_clocks(int xtal);
-
-extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-
-#else
-#define s5p6440_init_clocks NULL
-#define s5p6440_init_uarts NULL
-#define s5p6440_map_io NULL
-#define s5p64x0_init NULL
-#endif
-
-/* S5P6440 timer */
-
-extern struct sys_timer s5p6440_timer;
diff --git a/arch/arm/plat-samsung/include/plat/s5p6450.h b/arch/arm/plat-samsung/include/plat/s5p6450.h
deleted file mode 100644
index da25f9a1c54a..000000000000
--- a/arch/arm/plat-samsung/include/plat/s5p6450.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/s5p6450.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Header file for s5p6450 cpu support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/* Common init code for S5P6450 related SoCs */
-
-extern void s5p6450_register_clocks(void);
-extern void s5p6450_setup_clocks(void);
-
-#ifdef CONFIG_CPU_S5P6450
-
-extern  int s5p64x0_init(void);
-extern void s5p6450_init_irq(void);
-extern void s5p6450_map_io(void);
-extern void s5p6450_init_clocks(int xtal);
-
-extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-
-#else
-#define s5p6450_init_clocks NULL
-#define s5p6450_init_uarts NULL
-#define s5p6450_map_io NULL
-#define s5p64x0_init NULL
-#endif
-
-/* S5P6450 timer */
-
-extern struct sys_timer s5p6450_timer;
diff --git a/arch/arm/plat-samsung/include/plat/s5pc100.h b/arch/arm/plat-samsung/include/plat/s5pc100.h
deleted file mode 100644
index 9a21aeaaf452..000000000000
--- a/arch/arm/plat-samsung/include/plat/s5pc100.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/s5pc100.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Header file for s5pc100 cpu support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/* Common init code for S5PC100 related SoCs */
-
-extern void s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-extern void s5pc100_register_clocks(void);
-extern void s5pc100_setup_clocks(void);
-
-#ifdef CONFIG_CPU_S5PC100
-
-extern  int s5pc100_init(void);
-extern void s5pc100_init_irq(void);
-extern void s5pc100_map_io(void);
-extern void s5pc100_init_clocks(int xtal);
-
-#define s5pc100_init_uarts s5pc100_common_init_uarts
-
-#else
-#define s5pc100_init_clocks NULL
-#define s5pc100_init_uarts NULL
-#define s5pc100_map_io NULL
-#define s5pc100_init NULL
-#endif
diff --git a/arch/arm/plat-samsung/include/plat/s5pv210.h b/arch/arm/plat-samsung/include/plat/s5pv210.h
deleted file mode 100644
index b4bc6be77072..000000000000
--- a/arch/arm/plat-samsung/include/plat/s5pv210.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/s5pv210.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com/
- *
- * Header file for s5pv210 cpu support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/* Common init code for S5PV210 related SoCs */
-
-extern void s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-extern void s5pv210_register_clocks(void);
-extern void s5pv210_setup_clocks(void);
-
-#ifdef CONFIG_CPU_S5PV210
-
-extern  int s5pv210_init(void);
-extern void s5pv210_init_irq(void);
-extern void s5pv210_map_io(void);
-extern void s5pv210_init_clocks(int xtal);
-
-#define s5pv210_init_uarts s5pv210_common_init_uarts
-
-#else
-#define s5pv210_init_clocks NULL
-#define s5pv210_init_uarts NULL
-#define s5pv210_map_io NULL
-#define s5pv210_init NULL
-#endif
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index e7b3c752e919..dcff7dd1ae8a 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -66,8 +66,6 @@ struct s3c_sdhci_platdata {
         enum cd_types   cd_type;
         enum clk_types  clk_type;
 
-        char            **clocks;       /* set of clock sources */
-
         int             ext_cd_gpio;
         bool            ext_cd_gpio_invert;
         int     (*ext_cd_init)(void (*notify_func)(struct platform_device *,
@@ -129,12 +127,9 @@ extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
 /* S3C2416 SDHCI setup */
 
 #ifdef CONFIG_S3C2416_SETUP_SDHCI
-extern char *s3c2416_hsmmc_clksrcs[4];
-
 static inline void s3c2416_default_sdhci0(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC
-        s3c_hsmmc0_def_platdata.clocks = s3c2416_hsmmc_clksrcs;
         s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio;
 #endif /* CONFIG_S3C_DEV_HSMMC */
 }
@@ -142,7 +137,6 @@ static inline void s3c2416_default_sdhci0(void)
 static inline void s3c2416_default_sdhci1(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC1
-        s3c_hsmmc1_def_platdata.clocks = s3c2416_hsmmc_clksrcs;
         s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio;
 #endif /* CONFIG_S3C_DEV_HSMMC1 */
 }
@@ -155,12 +149,9 @@ static inline void s3c2416_default_sdhci1(void) { }
 /* S3C64XX SDHCI setup */
 
 #ifdef CONFIG_S3C64XX_SETUP_SDHCI
-extern char *s3c64xx_hsmmc_clksrcs[4];
-
 static inline void s3c6400_default_sdhci0(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC
-        s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
 #endif
 }
@@ -168,7 +159,6 @@ static inline void s3c6400_default_sdhci0(void)
 static inline void s3c6400_default_sdhci1(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC1
-        s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
 #endif
 }
@@ -176,7 +166,6 @@ static inline void s3c6400_default_sdhci1(void)
 static inline void s3c6400_default_sdhci2(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC2
-        s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
 #endif
 }
@@ -184,7 +173,6 @@ static inline void s3c6400_default_sdhci2(void)
 static inline void s3c6410_default_sdhci0(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC
-        s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
 #endif
 }
@@ -192,7 +180,6 @@ static inline void s3c6410_default_sdhci0(void)
 static inline void s3c6410_default_sdhci1(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC1
-        s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
 #endif
 }
@@ -200,7 +187,6 @@ static inline void s3c6410_default_sdhci1(void)
 static inline void s3c6410_default_sdhci2(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC2
-        s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
         s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
 #endif
 }
@@ -218,12 +204,9 @@ static inline void s3c6400_default_sdhci2(void) { }
 /* S5PC100 SDHCI setup */
 
 #ifdef CONFIG_S5PC100_SETUP_SDHCI
-extern char *s5pc100_hsmmc_clksrcs[4];
-
 static inline void s5pc100_default_sdhci0(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC
-        s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
         s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio;
 #endif
 }
@@ -231,7 +214,6 @@ static inline void s5pc100_default_sdhci0(void)
 static inline void s5pc100_default_sdhci1(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC1
-        s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
         s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio;
 #endif
 }
@@ -239,7 +221,6 @@ static inline void s5pc100_default_sdhci1(void)
 static inline void s5pc100_default_sdhci2(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC2
-        s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
         s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio;
 #endif
 }
@@ -254,12 +235,9 @@ static inline void s5pc100_default_sdhci2(void) { }
 /* S5PV210 SDHCI setup */
 
 #ifdef CONFIG_S5PV210_SETUP_SDHCI
-extern char *s5pv210_hsmmc_clksrcs[4];
-
 static inline void s5pv210_default_sdhci0(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC
-        s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
         s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio;
 #endif
 }
@@ -267,7 +245,6 @@ static inline void s5pv210_default_sdhci0(void)
 static inline void s5pv210_default_sdhci1(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC1
-        s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
         s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio;
 #endif
 }
@@ -275,7 +252,6 @@ static inline void s5pv210_default_sdhci1(void)
 static inline void s5pv210_default_sdhci2(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC2
-        s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
         s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio;
 #endif
 }
@@ -283,7 +259,6 @@ static inline void s5pv210_default_sdhci2(void)
 static inline void s5pv210_default_sdhci3(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC3
-        s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
         s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio;
 #endif
 }
@@ -298,12 +273,9 @@ static inline void s5pv210_default_sdhci3(void) { }
 
 /* EXYNOS4 SDHCI setup */
 #ifdef CONFIG_EXYNOS4_SETUP_SDHCI
-extern char *exynos4_hsmmc_clksrcs[4];
-
 static inline void exynos4_default_sdhci0(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC
-        s3c_hsmmc0_def_platdata.clocks = exynos4_hsmmc_clksrcs;
         s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio;
 #endif
 }
@@ -311,7 +283,6 @@ static inline void exynos4_default_sdhci0(void)
 static inline void exynos4_default_sdhci1(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC1
-        s3c_hsmmc1_def_platdata.clocks = exynos4_hsmmc_clksrcs;
         s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio;
 #endif
 }
@@ -319,7 +290,6 @@ static inline void exynos4_default_sdhci1(void)
 static inline void exynos4_default_sdhci2(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC2
-        s3c_hsmmc2_def_platdata.clocks = exynos4_hsmmc_clksrcs;
         s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio;
 #endif
 }
@@ -327,7 +297,6 @@ static inline void exynos4_default_sdhci2(void)
 static inline void exynos4_default_sdhci3(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC3
-        s3c_hsmmc3_def_platdata.clocks = exynos4_hsmmc_clksrcs;
         s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio;
 #endif
 }
diff --git a/arch/arm/plat-samsung/include/plat/system-reset.h b/arch/arm/plat-samsung/include/plat/system-reset.h
deleted file mode 100644
index a448e990964d..000000000000
--- a/arch/arm/plat-samsung/include/plat/system-reset.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/system-reset.h
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * Based on arch/arm/mach-s3c2410/include/mach/system-reset.h
- *
- * S5P - System define for arch_reset()
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <plat/watchdog-reset.h>
-
-void (*s5p_reset_hook)(void);
-
-static void arch_reset(char mode, const char *cmd)
-{
-        /* SWRESET support in s5p_reset_hook() */
-
-        if (s5p_reset_hook)
-                s5p_reset_hook();
-
-        /* Perform reset using Watchdog reset
-         * if there is no s5p_reset_hook()
-         */
-
-        arch_wdt_reset();
-}
diff --git a/arch/arm/plat-samsung/include/plat/watchdog-reset.h b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
index 40dbb2b0ae22..f19aff19205c 100644
--- a/arch/arm/plat-samsung/include/plat/watchdog-reset.h
+++ b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
@@ -17,6 +17,7 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/io.h>
+#include <linux/delay.h>
 
 static inline void arch_wdt_reset(void)
 {
diff --git a/arch/arm/plat-spear/Makefile b/arch/arm/plat-spear/Makefile
index b4f340b8f1f1..e0f2e5b9530c 100644
--- a/arch/arm/plat-spear/Makefile
+++ b/arch/arm/plat-spear/Makefile
@@ -3,6 +3,6 @@
 #
 
 # Common support
-obj-y   := clock.o time.o
+obj-y   := clock.o restart.o time.o
 
 obj-$(CONFIG_ARCH_SPEAR3XX)     += shirq.o padmux.o
diff --git a/arch/arm/plat-spear/include/plat/system.h b/arch/arm/plat-spear/include/plat/system.h
index 1171f228d718..86c6f83b44cc 100644
--- a/arch/arm/plat-spear/include/plat/system.h
+++ b/arch/arm/plat-spear/include/plat/system.h
@@ -14,10 +14,6 @@
 #ifndef __PLAT_SYSTEM_H
 #define __PLAT_SYSTEM_H
 
-#include <linux/io.h>
-#include <asm/hardware/sp810.h>
-#include <mach/hardware.h>
-
 static inline void arch_idle(void)
 {
         /*
@@ -27,15 +23,4 @@ static inline void arch_idle(void)
         cpu_do_idle();
 }
 
-static inline void arch_reset(char mode, const char *cmd)
-{
-        if (mode == 's') {
-                /* software reset, Jump into ROM at address 0 */
-                soft_restart(0);
-        } else {
-                /* hardware reset, Use on-chip reset capability */
-                sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE);
-        }
-}
-
 #endif /* __PLAT_SYSTEM_H */
diff --git a/arch/arm/plat-spear/restart.c b/arch/arm/plat-spear/restart.c
new file mode 100644
index 000000000000..2b4e3d82957c
--- /dev/null
+++ b/arch/arm/plat-spear/restart.c
@@ -0,0 +1,27 @@
+/*
+ * arch/arm/plat-spear/restart.c
+ *
+ * SPEAr platform specific restart functions
+ *
+ * Copyright (C) 2009 ST Microelectronics
+ * Viresh Kumar<viresh.kumar@st.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <linux/io.h>
+#include <asm/hardware/sp810.h>
+#include <mach/hardware.h>
+#include <mach/generic.h>
+
+void spear_restart(char mode, const char *cmd)
+{
+        if (mode == 's') {
+                /* software reset, Jump into ROM at address 0 */
+                soft_restart(0);
+        } else {
+                /* hardware reset, Use on-chip reset capability */
+                sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE);
+        }
+}
diff --git a/arch/arm/plat-tcc/Kconfig b/arch/arm/plat-tcc/Kconfig
deleted file mode 100644
index 1bf499570f42..000000000000
--- a/arch/arm/plat-tcc/Kconfig
+++ /dev/null
@@ -1,20 +0,0 @@
-if ARCH_TCC_926
-
-menu "Telechips ARM926-based CPUs"
-
-choice
-        prompt "Telechips CPU type:"
-        default ARCH_TCC8K
-
-config ARCH_TCC8K
-        bool TCC8000
-        select USB_ARCH_HAS_OHCI
-        help
-          Support for Telechips TCC8000 systems
-
-endchoice
-
-source "arch/arm/mach-tcc8k/Kconfig"
-
-endmenu
-endif
diff --git a/arch/arm/plat-tcc/Makefile b/arch/arm/plat-tcc/Makefile
deleted file mode 100644
index eceabc869b8f..000000000000
--- a/arch/arm/plat-tcc/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
-# "Telechips Platform Common Modules"
-
-obj-y := clock.o system.o
diff --git a/arch/arm/plat-tcc/clock.c b/arch/arm/plat-tcc/clock.c
deleted file mode 100644
index f3ced10d5271..000000000000
--- a/arch/arm/plat-tcc/clock.c
+++ /dev/null
@@ -1,179 +0,0 @@
-/*
- * Clock framework for Telechips SoCs
- * Based on arch/arm/plat-mxc/clock.c
- *
- * Copyright (C) 2004 - 2005 Nokia corporation
- * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
- * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
- * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
- * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
- * Copyright 2010 Hans J. Koch, hjk@linutronix.de
- *
- * Licensed under the terms of the GPL v2.
- */
-
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/errno.h>
-#include <linux/module.h>
-#include <linux/mutex.h>
-#include <linux/string.h>
-
-#include <mach/clock.h>
-#include <mach/hardware.h>
-
-static DEFINE_MUTEX(clocks_mutex);
-
-/*-------------------------------------------------------------------------
- * Standard clock functions defined in include/linux/clk.h
- *-------------------------------------------------------------------------*/
-
-static void __clk_disable(struct clk *clk)
-{
-        BUG_ON(clk->refcount == 0);
-
-        if (!(--clk->refcount) && clk->disable) {
-                /* Unconditionally disable the clock in hardware */
-                clk->disable(clk);
-                /* recursively disable parents */
-                if (clk->parent)
-                        __clk_disable(clk->parent);
-        }
-}
-
-static int __clk_enable(struct clk *clk)
-{
-        int ret = 0;
-
-        if (clk->refcount++ == 0 && clk->enable) {
-                if (clk->parent)
-                        ret = __clk_enable(clk->parent);
-                if (ret)
-                        return ret;
-                else
-                        return clk->enable(clk);
-        }
-
-        return 0;
-}
-
-/* This function increments the reference count on the clock and enables the
- * clock if not already enabled. The parent clock tree is recursively enabled
- */
-int clk_enable(struct clk *clk)
-{
-        int ret = 0;
-
-        if (!clk)
-                return -EINVAL;
-
-        mutex_lock(&clocks_mutex);
-        ret = __clk_enable(clk);
-        mutex_unlock(&clocks_mutex);
-
-        return ret;
-}
-EXPORT_SYMBOL_GPL(clk_enable);
-
-/* This function decrements the reference count on the clock and disables
- * the clock when reference count is 0. The parent clock tree is
- * recursively disabled
- */
-void clk_disable(struct clk *clk)
-{
-        if (!clk)
-                return;
-
-        mutex_lock(&clocks_mutex);
-        __clk_disable(clk);
-        mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL_GPL(clk_disable);
-
-/* Retrieve the *current* clock rate. If the clock itself
- * does not provide a special calculation routine, ask
- * its parent and so on, until one is able to return
- * a valid clock rate
- */
-unsigned long clk_get_rate(struct clk *clk)
-{
-        if (!clk)
-                return 0UL;
-
-        if (clk->get_rate)
-                return clk->get_rate(clk);
-
-        return clk_get_rate(clk->parent);
-}
-EXPORT_SYMBOL_GPL(clk_get_rate);
-
-/* Round the requested clock rate to the nearest supported
- * rate that is less than or equal to the requested rate.
- * This is dependent on the clock's current parent.
- */
-long clk_round_rate(struct clk *clk, unsigned long rate)
-{
-        if (!clk)
-                return 0;
-        if (!clk->round_rate)
-                return 0;
-
-        return clk->round_rate(clk, rate);
-}
-EXPORT_SYMBOL_GPL(clk_round_rate);
-
-/* Set the clock to the requested clock rate. The rate must
- * match a supported rate exactly based on what clk_round_rate returns
- */
-int clk_set_rate(struct clk *clk, unsigned long rate)
-{
-        int ret = -EINVAL;
-
-        if (!clk)
-                return ret;
-        if (!clk->set_rate || !rate)
-                return ret;
-
-        mutex_lock(&clocks_mutex);
-        ret = clk->set_rate(clk, rate);
-        mutex_unlock(&clocks_mutex);
-
-        return ret;
-}
-EXPORT_SYMBOL_GPL(clk_set_rate);
-
-/* Set the clock's parent to another clock source */
-int clk_set_parent(struct clk *clk, struct clk *parent)
-{
-        struct clk *old;
-        int ret = -EINVAL;
-
-        if (!clk)
-                return ret;
-        if (!clk->set_parent || !parent)
-                return ret;
-
-        mutex_lock(&clocks_mutex);
-        old = clk->parent;
-        if (clk->refcount)
-                __clk_enable(parent);
-        ret = clk->set_parent(clk, parent);
-        if (ret)
-                old = parent;
-        if (clk->refcount)
-                __clk_disable(old);
-        mutex_unlock(&clocks_mutex);
-
-        return ret;
-}
-EXPORT_SYMBOL_GPL(clk_set_parent);
-
-/* Retrieve the clock's parent clock source */
-struct clk *clk_get_parent(struct clk *clk)
-{
-        if (!clk)
-                return NULL;
-
-        return clk->parent;
-}
-EXPORT_SYMBOL_GPL(clk_get_parent);
diff --git a/arch/arm/plat-tcc/include/mach/clock.h b/arch/arm/plat-tcc/include/mach/clock.h
deleted file mode 100644
index a12f58ad71a8..000000000000
--- a/arch/arm/plat-tcc/include/mach/clock.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Low level clock header file for Telechips TCC architecture
- * (C) 2010 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the GPL v2.
- */
-
-#ifndef __ASM_ARCH_TCC_CLOCK_H__
-#define __ASM_ARCH_TCC_CLOCK_H__
-
-#ifndef __ASSEMBLY__
-
-struct clk {
-        struct clk *parent;
-        /* id number of a root clock, 0 for normal clocks */
-        int root_id;
-        /* Reference count of clock enable/disable */
-        int refcount;
-        /* Address of associated BCLKCTRx register. Must be set. */
-        void __iomem *bclkctr;
-        /* Bit position for BCLKCTRx. Must be set. */
-        int bclk_shift;
-        /* Address of ACLKxxx register, if any. */
-        void __iomem *aclkreg;
-        /* get the current clock rate (always a fresh value) */
-        unsigned long (*get_rate) (struct clk *);
-        /* Function ptr to set the clock to a new rate. The rate must match a
-           supported rate returned from round_rate. Leave blank if clock is not
-           programmable */
-        int (*set_rate) (struct clk *, unsigned long);
-        /* Function ptr to round the requested clock rate to the nearest
-           supported rate that is less than or equal to the requested rate. */
-        unsigned long (*round_rate) (struct clk *, unsigned long);
-        /* Function ptr to enable the clock. Leave blank if clock can not
-           be gated. */
-        int (*enable) (struct clk *);
-        /* Function ptr to disable the clock. Leave blank if clock can not
-           be gated. */
-        void (*disable) (struct clk *);
-        /* Function ptr to set the parent clock of the clock. */
-        int (*set_parent) (struct clk *, struct clk *);
-};
-
-int clk_register(struct clk *clk);
-void clk_unregister(struct clk *clk);
-
-#endif /* __ASSEMBLY__ */
-#endif /* __ASM_ARCH_MXC_CLOCK_H__ */
diff --git a/arch/arm/plat-tcc/include/mach/debug-macro.S b/arch/arm/plat-tcc/include/mach/debug-macro.S
deleted file mode 100644
index cf17d04ec30d..000000000000
--- a/arch/arm/plat-tcc/include/mach/debug-macro.S
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Copyright (C) 1994-1999 Russell King
- * Copyright (C) 2008-2009 Telechips
- * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-                .macro  addruart, rp, rv, tmp
-                moveq   \rp, #0x90000000        @ physical base address
-                movne   \rv, #0xF1000000        @ virtual base
-                orr     \rp, \rp, #0x00007000   @ UART0
-                orr     \rv, \rv, #0x00007000   @ UART0
-                .endm
-
-                .macro  senduart,rd,rx
-                strb    \rd, [\rx, #0x44]
-                .endm
-
-                .macro  waituart,rd,rx
-                .endm
-
-                .macro  busyuart,rd,rx
-1001:
-                ldr \rd, [\rx, #0x14]
-                tst \rd, #0x20
-
-                beq 1001b
-                .endm
diff --git a/arch/arm/plat-tcc/include/mach/entry-macro.S b/arch/arm/plat-tcc/include/mach/entry-macro.S
deleted file mode 100644
index 748f401e4b6d..000000000000
--- a/arch/arm/plat-tcc/include/mach/entry-macro.S
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * include/asm-arm/arch-tcc83x/entry-macro.S
- *
- * Author : <linux@telechips.com>
- * Created: June 10, 2008
- * Description: Low-level IRQ helper macros for Telechips-based platforms
- *
- * Copyright (C) 2008-2009 Telechips
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <mach/hardware.h>
-#include <mach/irqs.h>
-
-        .macro  disable_fiq
-        .endm
-
-        .macro  get_irqnr_preamble, base, tmp
-        .endm
-
-        .macro  arch_ret_to_user, tmp1, tmp2
-        .endm
-
-        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-
-                ldr     \base, =0xF2003000 @ base address of PIC registers
-
-                @@ read MREQ register of PIC0
-
-                mov     \irqnr, #0
-                ldr     \irqstat, [\base, #0x00000014 ] @ lower 32 interrupts
-                cmp     \irqstat, #0
-                bne     1001f
-
-                @@ read MREQ register of PIC1
-
-                ldr     \irqstat, [\base, #0x00000094]  @ upper 32 interrupts
-                cmp     \irqstat, #0
-                beq     1002f
-                mov     \irqnr, #0x20
-
-1001:
-                movs    \tmp, \irqstat, lsl #16
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #16
-
-                movs    \tmp, \irqstat, lsl #8
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #8
-
-                movs    \tmp, \irqstat, lsl #4
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #4
-
-                movs    \tmp, \irqstat, lsl #2
-                movne   \irqstat, \tmp
-                addeq   \irqnr, \irqnr, #2
-
-                movs    \tmp, \irqstat, lsl #1
-                addeq   \irqnr, \irqnr, #1
-                orrs    \base, \base, #1
-1002:
-                @@ exit here, Z flag unset if IRQ
-
-        .endm
diff --git a/arch/arm/plat-tcc/include/mach/hardware.h b/arch/arm/plat-tcc/include/mach/hardware.h
deleted file mode 100644
index e70d126ccaf3..000000000000
--- a/arch/arm/plat-tcc/include/mach/hardware.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Author: RidgeRun, Inc. Greg Lonnon <glonnon@ridgerun.com>
- * Reorganized for Linux-2.6 by Tony Lindgren <tony@atomide.com>
- *                          and Dirk Behme <dirk.behme@de.bosch.com>
- * Rewritten by:    <linux@telechips.com>
- * Description: Hardware definitions for TCC8300 processors and boards
- *
- * Copyright (C) 2001 RidgeRun, Inc.
- * Copyright (C) 2008-2009 Telechips
- *
- * Modifications for mainline (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GNU Pulic License version 2.
- */
-
-#ifndef __ASM_ARCH_TCC_HARDWARE_H
-#define __ASM_ARCH_TCC_HARDWARE_H
-
-#include <asm/sizes.h>
-#ifndef __ASSEMBLER__
-#include <asm/types.h>
-#endif
-#include <mach/io.h>
-
-/*
- * ----------------------------------------------------------------------------
- * Clocks
- * ----------------------------------------------------------------------------
- */
-#define CLKGEN_REG_BASE         0xfffece00
-#define ARM_CKCTL               (CLKGEN_REG_BASE + 0x0)
-#define ARM_IDLECT1             (CLKGEN_REG_BASE + 0x4)
-#define ARM_IDLECT2             (CLKGEN_REG_BASE + 0x8)
-#define ARM_EWUPCT              (CLKGEN_REG_BASE + 0xC)
-#define ARM_RSTCT1              (CLKGEN_REG_BASE + 0x10)
-#define ARM_RSTCT2              (CLKGEN_REG_BASE + 0x14)
-#define ARM_SYSST               (CLKGEN_REG_BASE + 0x18)
-#define ARM_IDLECT3             (CLKGEN_REG_BASE + 0x24)
-
-/* DPLL control registers */
-#define DPLL_CTL                0xfffecf00
-
-#endif  /* __ASM_ARCH_TCC_HARDWARE_H */
diff --git a/arch/arm/plat-tcc/include/mach/io.h b/arch/arm/plat-tcc/include/mach/io.h
deleted file mode 100644
index 3e911d3ea0f1..000000000000
--- a/arch/arm/plat-tcc/include/mach/io.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * IO definitions for TCC8000 processors and boards
- *
- * Copyright (C) 1997-1999 Russell King
- * Copyright (C) 2008-2009 Telechips
- * Copyright (C) 2010 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GNU Public License version 2.
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We don't actually have real ISA nor PCI buses, but there is so many
- * drivers out there that might just work if we fake them...
- */
-#define __io(a)                 __typesafe_io(a)
-#define __mem_pci(a)            (a)
-
-#endif
diff --git a/arch/arm/plat-tcc/include/mach/irqs.h b/arch/arm/plat-tcc/include/mach/irqs.h
deleted file mode 100644
index da863894d498..000000000000
--- a/arch/arm/plat-tcc/include/mach/irqs.h
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * IRQ definitions for TCC8xxx
- *
- * Copyright (C) 2008-2009 Telechips
- * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GPL v2.
- *
- */
-
-#ifndef __ASM_ARCH_TCC_IRQS_H
-#define __ASM_ARCH_TCC_IRQS_H
-
-#define NR_IRQS 64
-
-/* PIC0 interrupts */
-#define INT_ADMA1       0
-#define INT_BDMA        1
-#define INT_ADMA0       2
-#define INT_GDMA1       3
-#define INT_I2S0RX      4
-#define INT_I2S0TX      5
-#define INT_TC          6
-#define INT_UART0       7
-#define INT_USBD        8
-#define INT_SPI0TX      9
-#define INT_UDMA        10
-#define INT_LIRQ        11
-#define INT_GDMA2       12
-#define INT_GDMA0       13
-#define INT_TC32        14
-#define INT_LCD         15
-#define INT_ADC         16
-#define INT_I2C         17
-#define INT_RTCP        18
-#define INT_RTCA        19
-#define INT_NFC         20
-#define INT_SD0         21
-#define INT_GSB0        22
-#define INT_PK          23
-#define INT_USBH0       24
-#define INT_USBH1       25
-#define INT_G2D         26
-#define INT_ECC         27
-#define INT_SPI0RX      28
-#define INT_UART1       29
-#define INT_MSCL        30
-#define INT_GSB1        31
-/* PIC1 interrupts */
-#define INT_E0          32
-#define INT_E1          33
-#define INT_E2          34
-#define INT_E3          35
-#define INT_E4          36
-#define INT_E5          37
-#define INT_E6          38
-#define INT_E7          39
-#define INT_UART2       40
-#define INT_UART3       41
-#define INT_SPI1TX      42
-#define INT_SPI1RX      43
-#define INT_GSB2        44
-#define INT_SPDIF       45
-#define INT_CDIF        46
-#define INT_VBON        47
-#define INT_VBOFF       48
-#define INT_SD1         49
-#define INT_UART4       50
-#define INT_GDMA3       51
-#define INT_I2S1RX      52
-#define INT_I2S1TX      53
-#define INT_CAN0        54
-#define INT_CAN1        55
-#define INT_GSB3        56
-#define INT_KRST        57
-#define INT_UNUSED      58
-#define INT_SD0D3       59
-#define INT_SD1D3       60
-#define INT_GPS0        61
-#define INT_GPS1        62
-#define INT_GPS2        63
-
-#endif  /* ASM_ARCH_TCC_IRQS_H */
diff --git a/arch/arm/plat-tcc/include/mach/system.h b/arch/arm/plat-tcc/include/mach/system.h
deleted file mode 100644
index 909e6035d843..000000000000
--- a/arch/arm/plat-tcc/include/mach/system.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * Author: <linux@telechips.com>
- * Created: June 10, 2008
- * Description: LINUX SYSTEM FUNCTIONS for TCC83x
- *
- * Copyright (C) 2008-2009 Telechips
- *
- * Licensed under the terms of the GPL v2.
- *
- */
-
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-#include <linux/clk.h>
-
-#include <asm/mach-types.h>
-#include <mach/hardware.h>
-
-extern void plat_tcc_reboot(void);
-
-static inline void arch_idle(void)
-{
-        cpu_do_idle();
-}
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-        plat_tcc_reboot();
-}
-
-#endif
diff --git a/arch/arm/plat-tcc/include/mach/tcc8k-regs.h b/arch/arm/plat-tcc/include/mach/tcc8k-regs.h
deleted file mode 100644
index 1d9428295332..000000000000
--- a/arch/arm/plat-tcc/include/mach/tcc8k-regs.h
+++ /dev/null
@@ -1,807 +0,0 @@
-/*
- * Telechips TCC8000 register definitions
- *
- * (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GPLv2.
- */
-
-#ifndef TCC8K_REGS_H
-#define TCC8K_REGS_H
-
-#include <linux/types.h>
-
-#define EXT_SDRAM_BASE          0x20000000
-#define INT_SRAM_BASE           0x30000000
-#define INT_SRAM_SIZE           SZ_32K
-#define CS0_BASE                0x40000000
-#define CS1_BASE                0x50000000
-#define CS1_SIZE                SZ_64K
-#define CS2_BASE                0x60000000
-#define CS3_BASE                0x70000000
-#define AHB_PERI_BASE           0x80000000
-#define AHB_PERI_SIZE           SZ_64K
-#define APB0_PERI_BASE          0x90000000
-#define APB0_PERI_SIZE          SZ_128K
-#define APB1_PERI_BASE          0x98000000
-#define APB1_PERI_SIZE          SZ_128K
-#define DATA_TCM_BASE           0xa0000000
-#define DATA_TCM_SIZE           SZ_8K
-#define EXT_MEM_CTRL_BASE       0xf0000000
-#define EXT_MEM_CTRL_SIZE       SZ_4K
-
-#define CS1_BASE_VIRT           (void __iomem *)0xf7000000
-#define AHB_PERI_BASE_VIRT      (void __iomem *)0xf4000000
-#define APB0_PERI_BASE_VIRT     (void __iomem *)0xf1000000
-#define APB1_PERI_BASE_VIRT     (void __iomem *)0xf2000000
-#define EXT_MEM_CTRL_BASE_VIRT  (void __iomem *)0xf3000000
-#define INT_SRAM_BASE_VIRT      (void __iomem *)0xf5000000
-#define DATA_TCM_BASE_VIRT      (void __iomem *)0xf6000000
-
-#define __REG(x)     (*((volatile u32 *)(x)))
-
-/* USB Device Controller Registers */
-#define UDC_BASE        (AHB_PERI_BASE_VIRT + 0x8000)
-#define UDC_BASE_PHYS   (AHB_PERI_BASE + 0x8000)
-
-#define UDC_IR_OFFS             0x00
-#define UDC_EIR_OFFS            0x04
-#define UDC_EIER_OFFS           0x08
-#define UDC_FAR_OFFS            0x0c
-#define UDC_FNR_OFFS            0x10
-#define UDC_EDR_OFFS            0x14
-#define UDC_RT_OFFS             0x18
-#define UDC_SSR_OFFS            0x1c
-#define UDC_SCR_OFFS            0x20
-#define UDC_EP0SR_OFFS          0x24
-#define UDC_EP0CR_OFFS          0x28
-
-#define UDC_ESR_OFFS            0x2c
-#define UDC_ECR_OFFS            0x30
-#define UDC_BRCR_OFFS           0x34
-#define UDC_BWCR_OFFS           0x38
-#define UDC_MPR_OFFS            0x3c
-#define UDC_DCR_OFFS            0x40
-#define UDC_DTCR_OFFS           0x44
-#define UDC_DFCR_OFFS           0x48
-#define UDC_DTTCR1_OFFS         0x4c
-#define UDC_DTTCR2_OFFS         0x50
-#define UDC_ESR2_OFFS           0x54
-
-#define UDC_SCR2_OFFS           0x58
-#define UDC_EP0BUF_OFFS         0x60
-#define UDC_EP1BUF_OFFS         0x64
-#define UDC_EP2BUF_OFFS         0x68
-#define UDC_EP3BUF_OFFS         0x6c
-#define UDC_PLICR_OFFS          0xa0
-#define UDC_PCR_OFFS            0xa4
-
-#define UDC_UPCR0_OFFS          0xc8
-#define UDC_UPCR1_OFFS          0xcc
-#define UDC_UPCR2_OFFS          0xd0
-#define UDC_UPCR3_OFFS          0xd4
-
-/* Bits in UDC_EIR */
-#define UDC_EIR_EP0I            (1 << 0)
-#define UDC_EIR_EP1I            (1 << 1)
-#define UDC_EIR_EP2I            (1 << 2)
-#define UDC_EIR_EP3I            (1 << 3)
-#define UDC_EIR_EPI_MASK        0x0f
-
-/* Bits in UDC_EIER */
-#define UDC_EIER_EP0IE          (1 << 0)
-#define UDC_EIER_EP1IE          (1 << 1)
-#define UDC_EIER_EP2IE          (1 << 2)
-#define UDC_EIER_EP3IE          (1 << 3)
-
-/* Bits in UDC_FNR */
-#define UDC_FNR_FN_MASK         0x7ff
-#define UDC_FNR_SM              (1 << 13)
-#define UDC_FNR_FTL             (1 << 14)
-
-/* Bits in UDC_SSR */
-#define UDC_SSR_HFRES           (1 << 0)
-#define UDC_SSR_HFSUSP          (1 << 1)
-#define UDC_SSR_HFRM            (1 << 2)
-#define UDC_SSR_SDE             (1 << 3)
-#define UDC_SSR_HSP             (1 << 4)
-#define UDC_SSR_DM              (1 << 5)
-#define UDC_SSR_DP              (1 << 6)
-#define UDC_SSR_TBM             (1 << 7)
-#define UDC_SSR_VBON            (1 << 8)
-#define UDC_SSR_VBOFF           (1 << 9)
-#define UDC_SSR_EOERR           (1 << 10)
-#define UDC_SSR_DCERR           (1 << 11)
-#define UDC_SSR_TCERR           (1 << 12)
-#define UDC_SSR_BSERR           (1 << 13)
-#define UDC_SSR_TMERR           (1 << 14)
-#define UDC_SSR_BAERR           (1 << 15)
-
-/* Bits in UDC_SCR */
-#define UDC_SCR_HRESE           (1 << 0)
-#define UDC_SCR_HSSPE           (1 << 1)
-#define UDC_SCR_RRDE            (1 << 5)
-#define UDC_SCR_SPDEN           (1 << 6)
-#define UDC_SCR_DIEN            (1 << 12)
-
-/* Bits in UDC_EP0SR */
-#define UDC_EP0SR_RSR           (1 << 0)
-#define UDC_EP0SR_TST           (1 << 1)
-#define UDC_EP0SR_SHT           (1 << 4)
-#define UDC_EP0SR_LWO           (1 << 6)
-
-/* Bits in UDC_EP0CR */
-#define UDC_EP0CR_ESS           (1 << 1)
-
-/* Bits in UDC_ESR */
-#define UDC_ESR_RPS             (1 << 0)
-#define UDC_ESR_TPS             (1 << 1)
-#define UDC_ESR_LWO             (1 << 4)
-#define UDC_ESR_FFS             (1 << 6)
-
-/* Bits in UDC_ECR */
-#define UDC_ECR_ESS             (1 << 1)
-#define UDC_ECR_CDP             (1 << 2)
-
-#define UDC_ECR_FLUSH           (1 << 6)
-#define UDC_ECR_DUEN            (1 << 7)
-
-/* Bits in UDC_UPCR0 */
-#define UDC_UPCR0_VBD           (1 << 1)
-#define UDC_UPCR0_VBDS          (1 << 6)
-#define UDC_UPCR0_RCD_12        (0x0 << 9)
-#define UDC_UPCR0_RCD_24        (0x1 << 9)
-#define UDC_UPCR0_RCD_48        (0x2 << 9)
-#define UDC_UPCR0_RCS_EXT       (0x1 << 11)
-#define UDC_UPCR0_RCS_XTAL      (0x0 << 11)
-
-/* Bits in UDC_UPCR1 */
-#define UDC_UPCR1_CDT(x)        ((x) << 0)
-#define UDC_UPCR1_OTGT(x)       ((x) << 3)
-#define UDC_UPCR1_SQRXT(x)      ((x) << 8)
-#define UDC_UPCR1_TXFSLST(x)    ((x) << 12)
-
-/* Bits in UDC_UPCR2 */
-#define UDC_UPCR2_TP            (1 << 0)
-#define UDC_UPCR2_TXRT(x)       ((x) << 2)
-#define UDC_UPCR2_TXVRT(x)      ((x) << 5)
-#define UDC_UPCR2_OPMODE(x)     ((x) << 9)
-#define UDC_UPCR2_XCVRSEL(x)    ((x) << 12)
-#define UDC_UPCR2_TM            (1 << 14)
-
-/* USB Host Controller registers */
-#define USBH0_BASE      (AHB_PERI_BASE_VIRT + 0xb000)
-#define USBH1_BASE      (AHB_PERI_BASE_VIRT + 0xb800)
-
-#define OHCI_INT_ENABLE_OFFS    0x10
-
-#define RH_DESCRIPTOR_A_OFFS    0x48
-#define RH_DESCRIPTOR_B_OFFS    0x4c
-
-#define USBHTCFG0_OFFS          0x100
-#define USBHHCFG0_OFFS          0x104
-#define USBHHCFG1_OFFS          0x104
-
-/* DMA controller registers */
-#define DMAC0_BASE      (AHB_PERI_BASE + 0x4000)
-#define DMAC1_BASE      (AHB_PERI_BASE + 0xa000)
-#define DMAC2_BASE      (AHB_PERI_BASE + 0x4800)
-#define DMAC3_BASE      (AHB_PERI_BASE + 0xa800)
-
-#define DMAC_CH_OFFSET(ch)      (ch * 0x30)
-
-#define ST_SADR_OFFS            0x00
-#define SPARAM_OFFS             0x04
-#define C_SADR_OFFS             0x0c
-#define ST_DADR_OFFS            0x10
-#define DPARAM_OFFS             0x14
-#define C_DADR_OFFS             0x1c
-#define HCOUNT_OFFS             0x20
-#define CHCTRL_OFFS             0x24
-#define RPTCTRL_OFFS            0x28
-#define EXTREQ_A_OFFS           0x2c
-
-/* Bits in CHCTRL register */
-#define CHCTRL_EN               (1 << 0)
-
-#define CHCTRL_IEN              (1 << 2)
-#define CHCTRL_FLAG             (1 << 3)
-#define CHCTRL_WSIZE8           (0 << 4)
-#define CHCTRL_WSIZE16          (1 << 4)
-#define CHCTRL_WSIZE32          (2 << 4)
-
-#define CHCTRL_BSIZE1           (0 << 6)
-#define CHCTRL_BSIZE2           (1 << 6)
-#define CHCTRL_BSIZE4           (2 << 6)
-#define CHCTRL_BSIZE8           (3 << 6)
-
-#define CHCTRL_TYPE_SINGLE_E    (0 << 8)
-#define CHCTRL_TYPE_HW          (1 << 8)
-#define CHCTRL_TYPE_SW          (2 << 8)
-#define CHCTRL_TYPE_SINGLE_L    (3 << 8)
-
-#define CHCTRL_BST              (1 << 10)
-
-/* Use DMA controller 0, channel 2 for USB */
-#define USB_DMA_BASE            (DMAC0_BASE + DMAC_CH_OFFSET(2))
-
-/* NAND flash controller registers */
-#define NFC_BASE        (AHB_PERI_BASE_VIRT + 0xd000)
-#define NFC_BASE_PHYS   (AHB_PERI_BASE + 0xd000)
-
-#define NFC_CMD_OFFS            0x00
-#define NFC_LADDR_OFFS          0x04
-#define NFC_BADDR_OFFS          0x08
-#define NFC_SADDR_OFFS          0x0c
-#define NFC_WDATA_OFFS          0x10
-#define NFC_LDATA_OFFS          0x20
-#define NFC_SDATA_OFFS          0x40
-#define NFC_CTRL_OFFS           0x50
-#define NFC_PSTART_OFFS         0x54
-#define NFC_RSTART_OFFS         0x58
-#define NFC_DSIZE_OFFS          0x5c
-#define NFC_IREQ_OFFS           0x60
-#define NFC_RST_OFFS            0x64
-#define NFC_CTRL1_OFFS          0x68
-#define NFC_MDATA_OFFS          0x70
-
-#define NFC_WDATA_PHYS_ADDR     (NFC_BASE_PHYS + NFC_WDATA_OFFS)
-
-/* Bits in NFC_CTRL */
-#define NFC_CTRL_BHLD_MASK      (0xf << 0)
-#define NFC_CTRL_BPW_MASK       (0xf << 4)
-#define NFC_CTRL_BSTP_MASK      (0xf << 8)
-#define NFC_CTRL_CADDR_MASK     (0x7 << 12)
-#define NFC_CTRL_CADDR_1        (0x0 << 12)
-#define NFC_CTRL_CADDR_2        (0x1 << 12)
-#define NFC_CTRL_CADDR_3        (0x2 << 12)
-#define NFC_CTRL_CADDR_4        (0x3 << 12)
-#define NFC_CTRL_CADDR_5        (0x4 << 12)
-#define NFC_CTRL_MSK            (1 << 15)
-#define NFC_CTRL_PSIZE256       (0 << 16)
-#define NFC_CTRL_PSIZE512       (1 << 16)
-#define NFC_CTRL_PSIZE1024      (2 << 16)
-#define NFC_CTRL_PSIZE2048      (3 << 16)
-#define NFC_CTRL_PSIZE4096      (4 << 16)
-#define NFC_CTRL_PSIZE_MASK     (7 << 16)
-#define NFC_CTRL_BSIZE1         (0 << 19)
-#define NFC_CTRL_BSIZE2         (1 << 19)
-#define NFC_CTRL_BSIZE4         (2 << 19)
-#define NFC_CTRL_BSIZE8         (3 << 19)
-#define NFC_CTRL_BSIZE_MASK     (3 << 19)
-#define NFC_CTRL_RDY            (1 << 21)
-#define NFC_CTRL_CS0SEL         (1 << 22)
-#define NFC_CTRL_CS1SEL         (1 << 23)
-#define NFC_CTRL_CS2SEL         (1 << 24)
-#define NFC_CTRL_CS3SEL         (1 << 25)
-#define NFC_CTRL_CSMASK         (0xf << 22)
-#define NFC_CTRL_BW             (1 << 26)
-#define NFC_CTRL_FS             (1 << 27)
-#define NFC_CTRL_DEN            (1 << 28)
-#define NFC_CTRL_READ_IEN       (1 << 29)
-#define NFC_CTRL_PROG_IEN       (1 << 30)
-#define NFC_CTRL_RDY_IEN        (1 << 31)
-
-/* Bits in NFC_IREQ */
-#define NFC_IREQ_IRQ0           (1 << 0)
-#define NFC_IREQ_IRQ1           (1 << 1)
-#define NFC_IREQ_IRQ2           (1 << 2)
-
-#define NFC_IREQ_FLAG0          (1 << 4)
-#define NFC_IREQ_FLAG1          (1 << 5)
-#define NFC_IREQ_FLAG2          (1 << 6)
-
-/* MMC controller registers */
-#define MMC0_BASE       (AHB_PERI_BASE_VIRT + 0xe000)
-#define MMC1_BASE       (AHB_PERI_BASE_VIRT + 0xe800)
-
-/* UART base addresses */
-
-#define UART0_BASE      (APB0_PERI_BASE_VIRT + 0x07000)
-#define UART0_BASE_PHYS (APB0_PERI_BASE + 0x07000)
-#define UART1_BASE      (APB0_PERI_BASE_VIRT + 0x08000)
-#define UART1_BASE_PHYS (APB0_PERI_BASE + 0x08000)
-#define UART2_BASE      (APB0_PERI_BASE_VIRT + 0x09000)
-#define UART2_BASE_PHYS (APB0_PERI_BASE + 0x09000)
-#define UART3_BASE      (APB0_PERI_BASE_VIRT + 0x0a000)
-#define UART3_BASE_PHYS (APB0_PERI_BASE + 0x0a000)
-#define UART4_BASE      (APB0_PERI_BASE_VIRT + 0x15000)
-#define UART4_BASE_PHYS (APB0_PERI_BASE + 0x15000)
-
-#define UART_BASE       UART0_BASE
-#define UART_BASE_PHYS  UART0_BASE_PHYS
-
-/* ECC controller */
-#define ECC_CTR_BASE    (APB0_PERI_BASE_VIRT + 0xd000)
-
-#define ECC_CTRL_OFFS           0x00
-#define ECC_BASE_OFFS           0x04
-#define ECC_MASK_OFFS           0x08
-#define ECC_CLEAR_OFFS          0x0c
-#define ECC4_0_OFFS             0x10
-#define ECC4_1_OFFS             0x14
-
-#define ECC_EADDR0_OFFS         0x50
-
-#define ECC_ERRNUM_OFFS         0x90
-#define ECC_IREQ_OFFS           0x94
-
-/* Bits in ECC_CTRL */
-#define ECC_CTRL_ECC4_DIEN      (1 << 28)
-#define ECC_CTRL_ECC8_DIEN      (1 << 29)
-#define ECC_CTRL_ECC12_DIEN     (1 << 30)
-#define ECC_CTRL_ECC_DISABLE    0x0
-#define ECC_CTRL_ECC_SLC_ENC    0x8
-#define ECC_CTRL_ECC_SLC_DEC    0x9
-#define ECC_CTRL_ECC4_ENC       0xa
-#define ECC_CTRL_ECC4_DEC       0xb
-#define ECC_CTRL_ECC8_ENC       0xc
-#define ECC_CTRL_ECC8_DEC       0xd
-#define ECC_CTRL_ECC12_ENC      0xe
-#define ECC_CTRL_ECC12_DEC      0xf
-
-/* Bits in ECC_IREQ */
-#define ECC_IREQ_E4DI           (1 << 4)
-
-#define ECC_IREQ_E4DF           (1 << 20)
-#define ECC_IREQ_E4EF           (1 << 21)
-
-/* Interrupt controller */
-
-#define PIC0_BASE       (APB1_PERI_BASE_VIRT + 0x3000)
-#define PIC0_BASE_PHYS  (APB1_PERI_BASE + 0x3000)
-
-#define PIC0_IEN_OFFS           0x00
-#define PIC0_CREQ_OFFS          0x04
-#define PIC0_IREQ_OFFS          0x08
-#define PIC0_IRQSEL_OFFS        0x0c
-#define PIC0_SRC_OFFS           0x10
-#define PIC0_MREQ_OFFS          0x14
-#define PIC0_TSTREQ_OFFS        0x18
-#define PIC0_POL_OFFS           0x1c
-#define PIC0_IRQ_OFFS           0x20
-#define PIC0_FIQ_OFFS           0x24
-#define PIC0_MIRQ_OFFS          0x28
-#define PIC0_MFIQ_OFFS          0x2c
-#define PIC0_TMODE_OFFS         0x30
-#define PIC0_SYNC_OFFS          0x34
-#define PIC0_WKUP_OFFS          0x38
-#define PIC0_TMODEA_OFFS        0x3c
-#define PIC0_INTOEN_OFFS        0x40
-#define PIC0_MEN0_OFFS          0x44
-#define PIC0_MEN_OFFS           0x48
-
-#define PIC0_IEN                __REG(PIC0_BASE + PIC0_IEN_OFFS)
-#define PIC0_IEN_PHYS           __REG(PIC0_BASE_PHYS + PIC0_IEN_OFFS)
-#define PIC0_CREQ               __REG(PIC0_BASE + PIC0_CREQ_OFFS)
-#define PIC0_CREQ_PHYS          __REG(PIC0_BASE_PHYS + PIC0_CREQ_OFFS)
-#define PIC0_IREQ               __REG(PIC0_BASE + PIC0_IREQ_OFFS)
-#define PIC0_IRQSEL             __REG(PIC0_BASE + PIC0_IRQSEL_OFFS)
-#define PIC0_IRQSEL_PHYS        __REG(PIC0_BASE_PHYS + PIC0_IRQSEL_OFFS)
-#define PIC0_SRC                __REG(PIC0_BASE + PIC0_SRC_OFFS)
-#define PIC0_MREQ               __REG(PIC0_BASE + PIC0_MREQ_OFFS)
-#define PIC0_TSTREQ             __REG(PIC0_BASE + PIC0_TSTREQ_OFFS)
-#define PIC0_POL                __REG(PIC0_BASE + PIC0_POL_OFFS)
-#define PIC0_IRQ                __REG(PIC0_BASE + PIC0_IRQ_OFFS)
-#define PIC0_FIQ                __REG(PIC0_BASE + PIC0_FIQ_OFFS)
-#define PIC0_MIRQ               __REG(PIC0_BASE + PIC0_MIRQ_OFFS)
-#define PIC0_MFIQ               __REG(PIC0_BASE + PIC0_MFIQ_OFFS)
-#define PIC0_TMODE              __REG(PIC0_BASE + PIC0_TMODE_OFFS)
-#define PIC0_TMODE_PHYS         __REG(PIC0_BASE_PHYS + PIC0_TMODE_OFFS)
-#define PIC0_SYNC               __REG(PIC0_BASE + PIC0_SYNC_OFFS)
-#define PIC0_WKUP               __REG(PIC0_BASE + PIC0_WKUP_OFFS)
-#define PIC0_TMODEA             __REG(PIC0_BASE + PIC0_TMODEA_OFFS)
-#define PIC0_INTOEN             __REG(PIC0_BASE + PIC0_INTOEN_OFFS)
-#define PIC0_MEN0               __REG(PIC0_BASE + PIC0_MEN0_OFFS)
-#define PIC0_MEN                __REG(PIC0_BASE + PIC0_MEN_OFFS)
-
-#define PIC1_BASE       (APB1_PERI_BASE_VIRT + 0x3080)
-
-#define PIC1_IEN_OFFS           0x00
-#define PIC1_CREQ_OFFS          0x04
-#define PIC1_IREQ_OFFS          0x08
-#define PIC1_IRQSEL_OFFS        0x0c
-#define PIC1_SRC_OFFS           0x10
-#define PIC1_MREQ_OFFS          0x14
-#define PIC1_TSTREQ_OFFS        0x18
-#define PIC1_POL_OFFS           0x1c
-#define PIC1_IRQ_OFFS           0x20
-#define PIC1_FIQ_OFFS           0x24
-#define PIC1_MIRQ_OFFS          0x28
-#define PIC1_MFIQ_OFFS          0x2c
-#define PIC1_TMODE_OFFS         0x30
-#define PIC1_SYNC_OFFS          0x34
-#define PIC1_WKUP_OFFS          0x38
-#define PIC1_TMODEA_OFFS        0x3c
-#define PIC1_INTOEN_OFFS        0x40
-#define PIC1_MEN1_OFFS          0x44
-#define PIC1_MEN_OFFS           0x48
-
-#define PIC1_IEN        __REG(PIC1_BASE + PIC1_IEN_OFFS)
-#define PIC1_CREQ       __REG(PIC1_BASE + PIC1_CREQ_OFFS)
-#define PIC1_IREQ       __REG(PIC1_BASE + PIC1_IREQ_OFFS)
-#define PIC1_IRQSEL     __REG(PIC1_BASE + PIC1_IRQSEL_OFFS)
-#define PIC1_SRC        __REG(PIC1_BASE + PIC1_SRC_OFFS)
-#define PIC1_MREQ       __REG(PIC1_BASE + PIC1_MREQ_OFFS)
-#define PIC1_TSTREQ     __REG(PIC1_BASE + PIC1_TSTREQ_OFFS)
-#define PIC1_POL        __REG(PIC1_BASE + PIC1_POL_OFFS)
-#define PIC1_IRQ        __REG(PIC1_BASE + PIC1_IRQ_OFFS)
-#define PIC1_FIQ        __REG(PIC1_BASE + PIC1_FIQ_OFFS)
-#define PIC1_MIRQ       __REG(PIC1_BASE + PIC1_MIRQ_OFFS)
-#define PIC1_MFIQ       __REG(PIC1_BASE + PIC1_MFIQ_OFFS)
-#define PIC1_TMODE      __REG(PIC1_BASE + PIC1_TMODE_OFFS)
-#define PIC1_SYNC       __REG(PIC1_BASE + PIC1_SYNC_OFFS)
-#define PIC1_WKUP       __REG(PIC1_BASE + PIC1_WKUP_OFFS)
-#define PIC1_TMODEA     __REG(PIC1_BASE + PIC1_TMODEA_OFFS)
-#define PIC1_INTOEN     __REG(PIC1_BASE + PIC1_INTOEN_OFFS)
-#define PIC1_MEN1       __REG(PIC1_BASE + PIC1_MEN1_OFFS)
-#define PIC1_MEN        __REG(PIC1_BASE + PIC1_MEN_OFFS)
-
-/* Timer registers */
-#define TIMER_BASE              (APB1_PERI_BASE_VIRT + 0x4000)
-#define TIMER_BASE_PHYS         (APB1_PERI_BASE + 0x4000)
-
-#define TWDCFG_OFFS             0x70
-
-#define TC32EN_OFFS             0x80
-#define TC32LDV_OFFS            0x84
-#define TC32CMP0_OFFS           0x88
-#define TC32CMP1_OFFS           0x8c
-#define TC32PCNT_OFFS           0x90
-#define TC32MCNT_OFFS           0x94
-#define TC32IRQ_OFFS            0x98
-
-/* Bits in TC32EN */
-#define TC32EN_PRESCALE_MASK    0x00ffffff
-#define TC32EN_ENABLE           (1 << 24)
-#define TC32EN_LOADZERO         (1 << 25)
-#define TC32EN_STOPMODE         (1 << 26)
-#define TC32EN_LDM0             (1 << 28)
-#define TC32EN_LDM1             (1 << 29)
-
-/* Bits in TC32IRQ */
-#define TC32IRQ_MSTAT_MASK      0x0000001f
-#define TC32IRQ_RSTAT_MASK      (0x1f << 8)
-#define TC32IRQ_IRQEN0          (1 << 16)
-#define TC32IRQ_IRQEN1          (1 << 17)
-#define TC32IRQ_IRQEN2          (1 << 18)
-#define TC32IRQ_IRQEN3          (1 << 19)
-#define TC32IRQ_IRQEN4          (1 << 20)
-#define TC32IRQ_RSYNC           (1 << 30)
-#define TC32IRQ_IRQCLR          (1 << 31)
-
-/* GPIO registers */
-#define GPIOPD_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOPD_DAT_OFFS         0x00
-#define GPIOPD_DOE_OFFS         0x04
-#define GPIOPD_FS0_OFFS         0x08
-#define GPIOPD_FS1_OFFS         0x0c
-#define GPIOPD_FS2_OFFS         0x10
-#define GPIOPD_RPU_OFFS         0x30
-#define GPIOPD_RPD_OFFS         0x34
-#define GPIOPD_DV0_OFFS         0x38
-#define GPIOPD_DV1_OFFS         0x3c
-
-#define GPIOPS_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOPS_DAT_OFFS         0x40
-#define GPIOPS_DOE_OFFS         0x44
-#define GPIOPS_FS0_OFFS         0x48
-#define GPIOPS_FS1_OFFS         0x4c
-#define GPIOPS_FS2_OFFS         0x50
-#define GPIOPS_FS3_OFFS         0x54
-#define GPIOPS_RPU_OFFS         0x70
-#define GPIOPS_RPD_OFFS         0x74
-#define GPIOPS_DV0_OFFS         0x78
-#define GPIOPS_DV1_OFFS         0x7c
-
-#define GPIOPS_FS1_SDH0_BITS    0x000000ff
-#define GPIOPS_FS1_SDH1_BITS    0x0000ff00
-
-#define GPIOPU_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOPU_DAT_OFFS         0x80
-#define GPIOPU_DOE_OFFS         0x84
-#define GPIOPU_FS0_OFFS         0x88
-#define GPIOPU_FS1_OFFS         0x8c
-#define GPIOPU_FS2_OFFS         0x90
-#define GPIOPU_RPU_OFFS         0xb0
-#define GPIOPU_RPD_OFFS         0xb4
-#define GPIOPU_DV0_OFFS         0xb8
-#define GPIOPU_DV1_OFFS         0xbc
-
-#define GPIOPU_FS0_TXD0         (1 << 0)
-#define GPIOPU_FS0_RXD0         (1 << 1)
-#define GPIOPU_FS0_CTS0         (1 << 2)
-#define GPIOPU_FS0_RTS0         (1 << 3)
-#define GPIOPU_FS0_TXD1         (1 << 4)
-#define GPIOPU_FS0_RXD1         (1 << 5)
-#define GPIOPU_FS0_CTS1         (1 << 6)
-#define GPIOPU_FS0_RTS1         (1 << 7)
-#define GPIOPU_FS0_TXD2         (1 << 8)
-#define GPIOPU_FS0_RXD2         (1 << 9)
-#define GPIOPU_FS0_CTS2         (1 << 10)
-#define GPIOPU_FS0_RTS2         (1 << 11)
-#define GPIOPU_FS0_TXD3         (1 << 12)
-#define GPIOPU_FS0_RXD3         (1 << 13)
-#define GPIOPU_FS0_CTS3         (1 << 14)
-#define GPIOPU_FS0_RTS3         (1 << 15)
-#define GPIOPU_FS0_TXD4         (1 << 16)
-#define GPIOPU_FS0_RXD4         (1 << 17)
-#define GPIOPU_FS0_CTS4         (1 << 18)
-#define GPIOPU_FS0_RTS4         (1 << 19)
-
-#define GPIOFC_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOFC_DAT_OFFS         0xc0
-#define GPIOFC_DOE_OFFS         0xc4
-#define GPIOFC_FS0_OFFS         0xc8
-#define GPIOFC_FS1_OFFS         0xcc
-#define GPIOFC_FS2_OFFS         0xd0
-#define GPIOFC_FS3_OFFS         0xd4
-#define GPIOFC_RPU_OFFS         0xf0
-#define GPIOFC_RPD_OFFS         0xf4
-#define GPIOFC_DV0_OFFS         0xf8
-#define GPIOFC_DV1_OFFS         0xfc
-
-#define GPIOFD_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOFD_DAT_OFFS         0x100
-#define GPIOFD_DOE_OFFS         0x104
-#define GPIOFD_FS0_OFFS         0x108
-#define GPIOFD_FS1_OFFS         0x10c
-#define GPIOFD_FS2_OFFS         0x110
-#define GPIOFD_RPU_OFFS         0x130
-#define GPIOFD_RPD_OFFS         0x134
-#define GPIOFD_DV0_OFFS         0x138
-#define GPIOFD_DV1_OFFS         0x13c
-
-#define GPIOLC_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOLC_DAT_OFFS         0x140
-#define GPIOLC_DOE_OFFS         0x144
-#define GPIOLC_FS0_OFFS         0x148
-#define GPIOLC_FS1_OFFS         0x14c
-#define GPIOLC_RPU_OFFS         0x170
-#define GPIOLC_RPD_OFFS         0x174
-#define GPIOLC_DV0_OFFS         0x178
-#define GPIOLC_DV1_OFFS         0x17c
-
-#define GPIOLD_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOLD_DAT_OFFS         0x180
-#define GPIOLD_DOE_OFFS         0x184
-#define GPIOLD_FS0_OFFS         0x188
-#define GPIOLD_FS1_OFFS         0x18c
-#define GPIOLD_FS2_OFFS         0x190
-#define GPIOLD_RPU_OFFS         0x1b0
-#define GPIOLD_RPD_OFFS         0x1b4
-#define GPIOLD_DV0_OFFS         0x1b8
-#define GPIOLD_DV1_OFFS         0x1bc
-
-#define GPIOAD_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOAD_DAT_OFFS         0x1c0
-#define GPIOAD_DOE_OFFS         0x1c4
-#define GPIOAD_FS0_OFFS         0x1c8
-#define GPIOAD_RPU_OFFS         0x1f0
-#define GPIOAD_RPD_OFFS         0x1f4
-#define GPIOAD_DV0_OFFS         0x1f8
-#define GPIOAD_DV1_OFFS         0x1fc
-
-#define GPIOXC_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOXC_DAT_OFFS         0x200
-#define GPIOXC_DOE_OFFS         0x204
-#define GPIOXC_FS0_OFFS         0x208
-#define GPIOXC_RPU_OFFS         0x230
-#define GPIOXC_RPD_OFFS         0x234
-#define GPIOXC_DV0_OFFS         0x238
-#define GPIOXC_DV1_OFFS         0x23c
-
-#define GPIOXC_FS0              __REG(GPIOXC_BASE + GPIOXC_FS0_OFFS)
-
-#define GPIOXC_FS0_CS0          (1 << 26)
-#define GPIOXC_FS0_CS1          (1 << 27)
-
-#define GPIOXD_BASE             (APB1_PERI_BASE_VIRT + 0x5000)
-
-#define GPIOXD_DAT_OFFS         0x240
-#define GPIOXD_FS0_OFFS         0x248
-#define GPIOXD_RPU_OFFS         0x270
-#define GPIOXD_RPD_OFFS         0x274
-#define GPIOXD_DV0_OFFS         0x278
-#define GPIOXD_DV1_OFFS         0x27c
-
-#define GPIOPK_BASE             (APB1_PERI_BASE_VIRT + 0x1c000)
-
-#define GPIOPK_RST_OFFS         0x008
-#define GPIOPK_DAT_OFFS         0x100
-#define GPIOPK_DOE_OFFS         0x104
-#define GPIOPK_FS0_OFFS         0x108
-#define GPIOPK_FS1_OFFS         0x10c
-#define GPIOPK_FS2_OFFS         0x110
-#define GPIOPK_IRQST_OFFS       0x210
-#define GPIOPK_IRQEN_OFFS       0x214
-#define GPIOPK_IRQPOL_OFFS      0x218
-#define GPIOPK_IRQTM0_OFFS      0x21c
-#define GPIOPK_IRQTM1_OFFS      0x220
-#define GPIOPK_CTL_OFFS         0x22c
-
-#define PMGPIO_BASE             (APB1_PERI_BASE_VIRT + 0x10000)
-#define BACKUP_RAM_BASE         PMGPIO_BASE
-
-#define PMGPIO_DAT_OFFS         0x800
-#define PMGPIO_DOE_OFFS         0x804
-#define PMGPIO_FS0_OFFS         0x808
-#define PMGPIO_RPU_OFFS         0x810
-#define PMGPIO_RPD_OFFS         0x814
-#define PMGPIO_DV0_OFFS         0x818
-#define PMGPIO_DV1_OFFS         0x81c
-#define PMGPIO_EE0_OFFS         0x820
-#define PMGPIO_EE1_OFFS         0x824
-#define PMGPIO_CTL_OFFS         0x828
-#define PMGPIO_DI_OFFS          0x82c
-#define PMGPIO_STR_OFFS         0x830
-#define PMGPIO_STF_OFFS         0x834
-#define PMGPIO_POL_OFFS         0x838
-#define PMGPIO_APB_OFFS         0x800
-
-/* Clock controller registers */
-#define CKC_BASE        ((void __iomem *)(APB1_PERI_BASE_VIRT + 0x6000))
-
-#define CLKCTRL_OFFS            0x00
-#define PLL0CFG_OFFS            0x04
-#define PLL1CFG_OFFS            0x08
-#define CLKDIVC0_OFFS           0x0c
-
-#define BCLKCTR0_OFFS           0x14
-#define SWRESET0_OFFS           0x18
-
-#define BCLKCTR1_OFFS           0x60
-#define SWRESET1_OFFS           0x64
-#define PWDCTL_OFFS             0x68
-#define PLL2CFG_OFFS            0x6c
-#define CLKDIVC1_OFFS           0x70
-
-#define ACLKREF_OFFS            0x80
-#define ACLKI2C_OFFS            0x84
-#define ACLKSPI0_OFFS           0x88
-#define ACLKSPI1_OFFS           0x8c
-#define ACLKUART0_OFFS          0x90
-#define ACLKUART1_OFFS          0x94
-#define ACLKUART2_OFFS          0x98
-#define ACLKUART3_OFFS          0x9c
-#define ACLKUART4_OFFS          0xa0
-#define ACLKTCT_OFFS            0xa4
-#define ACLKTCX_OFFS            0xa8
-#define ACLKTCZ_OFFS            0xac
-#define ACLKADC_OFFS            0xb0
-#define ACLKDAI0_OFFS           0xb4
-#define ACLKDAI1_OFFS           0xb8
-#define ACLKLCD_OFFS            0xbc
-#define ACLKSPDIF_OFFS          0xc0
-#define ACLKUSBH_OFFS           0xc4
-#define ACLKSDH0_OFFS           0xc8
-#define ACLKSDH1_OFFS           0xcc
-#define ACLKC3DEC_OFFS          0xd0
-#define ACLKEXT_OFFS            0xd4
-#define ACLKCAN0_OFFS           0xd8
-#define ACLKCAN1_OFFS           0xdc
-#define ACLKGSB0_OFFS           0xe0
-#define ACLKGSB1_OFFS           0xe4
-#define ACLKGSB2_OFFS           0xe8
-#define ACLKGSB3_OFFS           0xec
-
-#define PLLxCFG_PD              (1 << 31)
-
-/* CLKCTRL bits */
-#define CLKCTRL_XE              (1 << 31)
-
-/* CLKDIVCx bits */
-#define CLKDIVC0_XTE            (1 << 7)
-#define CLKDIVC0_XE             (1 << 15)
-#define CLKDIVC0_P1E            (1 << 23)
-#define CLKDIVC0_P0E            (1 << 31)
-
-#define CLKDIVC1_P2E            (1 << 7)
-
-/* BCLKCTR0 clock bits */
-#define BCLKCTR0_USBD           (1 << 4)
-#define BCLKCTR0_ECC            (1 << 9)
-#define BCLKCTR0_USBH0          (1 << 11)
-#define BCLKCTR0_NFC            (1 << 16)
-
-/* BCLKCTR1 clock bits */
-#define BCLKCTR1_USBH1          (1 << 20)
-
-/* SWRESET0 bits */
-#define SWRESET0_USBD           (1 << 4)
-#define SWRESET0_USBH0          (1 << 11)
-
-/* SWRESET1 bits */
-#define SWRESET1_USBH1          (1 << 20)
-
-/* System clock sources.
- * Note: These are the clock sources that serve as parents for
- * all other clocks. They have no parents themselves.
- *
- * These values are used for struct clk->root_id. All clocks
- * that are not system clock sources have this value set to
- * CLK_SRC_NOROOT.
- * The values for system clocks start with CLK_SRC_PLL0 == 0
- * because this gives us exactly the values needed for the lower
- * 4 bits of ACLK_* registers. Therefore, CLK_SRC_NOROOT is
- * defined as -1 to not disturb the order.
- */
-enum root_clks {
-        CLK_SRC_NOROOT = -1,
-        CLK_SRC_PLL0 = 0,
-        CLK_SRC_PLL1,
-        CLK_SRC_PLL0DIV,
-        CLK_SRC_PLL1DIV,
-        CLK_SRC_XI,
-        CLK_SRC_XIDIV,
-        CLK_SRC_XTI,
-        CLK_SRC_XTIDIV,
-        CLK_SRC_PLL2,
-        CLK_SRC_PLL2DIV,
-        CLK_SRC_PK0,
-        CLK_SRC_PK1,
-        CLK_SRC_PK2,
-        CLK_SRC_PK3,
-        CLK_SRC_PK4,
-        CLK_SRC_48MHZ
-};
-
-#define CLK_SRC_MASK            0xf
-
-/* Bits in ACLK* registers */
-#define ACLK_EN         (1 << 28)
-#define ACLK_SEL_SHIFT          24
-#define ACLK_SEL_MASK           0x0f000000
-#define ACLK_DIV_MASK           0x00000fff
-
-/* System configuration registers */
-
-#define SCFG_BASE               (APB1_PERI_BASE_VIRT + 0x13000)
-
-#define BMI_OFFS                0x00
-#define AHBCON0_OFFS            0x04
-#define APBPWE_OFFS             0x08
-#define DTCMWAIT_OFFS           0x0c
-#define ECCSEL_OFFS             0x10
-#define AHBCON1_OFFS            0x14
-#define SDHCFG_OFFS             0x18
-#define REMAP_OFFS              0x20
-#define LCDSIAE_OFFS            0x24
-#define XMCCFG_OFFS             0xe0
-#define IMCCFG_OFFS             0xe4
-
-/* Values for ECCSEL */
-#define ECCSEL_EXTMEM           0x0
-#define ECCSEL_DTCM             0x1
-#define ECCSEL_INT_SRAM         0x2
-#define ECCSEL_AHB              0x3
-
-/* Bits in XMCCFG */
-#define XMCCFG_NFCE             (1 << 1)
-#define XMCCFG_FDXD             (1 << 2)
-
-/* External memory controller registers */
-
-#define EMC_BASE                EXT_MEM_CTRL_BASE
-
-#define SDCFG_OFFS              0x00
-#define SDFSM_OFFS              0x04
-#define MCFG_OFFS               0x08
-
-#define CSCFG0_OFFS             0x10
-#define CSCFG1_OFFS             0x14
-#define CSCFG2_OFFS             0x18
-#define CSCFG3_OFFS             0x1c
-
-#define MCFG_SDEN               (1 << 4)
-
-#endif /* TCC8K_REGS_H */
diff --git a/arch/arm/plat-tcc/include/mach/timex.h b/arch/arm/plat-tcc/include/mach/timex.h
deleted file mode 100644
index 057acbe651d9..000000000000
--- a/arch/arm/plat-tcc/include/mach/timex.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * A definition needed by arch core code.
- *
- */
-#define CLOCK_TICK_RATE         (HZ * 100000UL)
diff --git a/arch/arm/plat-tcc/include/mach/uncompress.h b/arch/arm/plat-tcc/include/mach/uncompress.h
deleted file mode 100644
index 7a3e33a27a30..000000000000
--- a/arch/arm/plat-tcc/include/mach/uncompress.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
- *
- * This file is licensed under the terms of the GPL version 2.
- */
-
-#include <linux/serial_reg.h>
-#include <linux/types.h>
-
-#include <mach/tcc8k-regs.h>
-
-unsigned int system_rev;
-
-#define ID_MASK                 0x7fff
-
-static void putc(int c)
-{
-        u32 *uart_lsr = (u32 *)(UART_BASE_PHYS + (UART_LSR << 2));
-        u32 *uart_tx = (u32 *)(UART_BASE_PHYS + (UART_TX << 2));
-
-        while (!(*uart_lsr & UART_LSR_THRE))
-                barrier();
-        *uart_tx = c;
-}
-
-static inline void flush(void)
-{
-}
-
-/*
- * nothing to do
- */
-#define arch_decomp_setup()
-#define arch_decomp_wdog()
diff --git a/arch/arm/plat-tcc/system.c b/arch/arm/plat-tcc/system.c
deleted file mode 100644
index cc208fae3e7a..000000000000
--- a/arch/arm/plat-tcc/system.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * System functions for Telechips TCCxxxx SoCs
- *
- * Copyright (C) Hans J. Koch <hjk@linutronix.de>
- *
- * Licensed under the terms of the GPL v2.
- *
- */
-
-#include <linux/io.h>
-
-#include <mach/tcc8k-regs.h>
-
-/* System reboot */
-void plat_tcc_reboot(void)
-{
-        /* Make sure clocks are on */
-        __raw_writel(0xffffffff, CKC_BASE + BCLKCTR0_OFFS);
-
-        /* Enable watchdog reset */
-        __raw_writel(0x49, TIMER_BASE + TWDCFG_OFFS);
-        /* Wait for reset */
-        while(1)
-                ;
-}
diff --git a/arch/arm/plat-versatile/sched-clock.c b/arch/arm/plat-versatile/sched-clock.c
index 3d6a4c292cab..b33b74c87232 100644
--- a/arch/arm/plat-versatile/sched-clock.c
+++ b/arch/arm/plat-versatile/sched-clock.c
@@ -18,41 +18,24 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
+#include <linux/kernel.h>
 #include <linux/io.h>
-#include <linux/sched.h>
 
 #include <asm/sched_clock.h>
 #include <plat/sched_clock.h>
 
-static DEFINE_CLOCK_DATA(cd);
 static void __iomem *ctr;
 
-/*
- * Constants generated by clocks_calc_mult_shift(m, s, 24MHz, NSEC_PER_SEC, 60).
- * This gives a resolution of about 41ns and a wrap period of about 178s.
- */
-#define SC_MULT         2796202667u
-#define SC_SHIFT        26
-
-unsigned long long notrace sched_clock(void)
+static u32 notrace versatile_read_sched_clock(void)
 {
-        if (ctr) {
-                u32 cyc = readl(ctr);
-                return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0,
-                                                SC_MULT, SC_SHIFT);
-        } else
-                return 0;
-}
+        if (ctr)
+                return readl(ctr);
 
-static void notrace versatile_update_sched_clock(void)
-{
-        u32 cyc = readl(ctr);
-        update_sched_clock(&cd, cyc, (u32)~0);
+        return 0;
 }
 
 void __init versatile_sched_clock_init(void __iomem *reg, unsigned long rate)
 {
         ctr = reg;
-        init_fixed_sched_clock(&cd, versatile_update_sched_clock,
-                               32, rate, SC_MULT, SC_SHIFT);
+        setup_sched_clock(versatile_read_sched_clock, 32, rate);
 }
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index ccbe16f47227..f9c9f33f8cbe 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -16,7 +16,7 @@
 # are merged into mainline or have been edited in the machine database
 # within the last 12 months.  References to machine_is_NAME() do not count!
 #
-# Last update: Sat May 7 08:48:24 2011
+# Last update: Tue Dec 6 11:07:38 2011
 #
 # machine_is_xxx        CONFIG_xxxx             MACH_TYPE_xxx           number
 #
@@ -269,7 +269,7 @@ dns323			MACH_DNS323		DNS323			1542
 omap3_beagle            MACH_OMAP3_BEAGLE       OMAP3_BEAGLE            1546
 nokia_n810              MACH_NOKIA_N810         NOKIA_N810              1548
 pcm038                  MACH_PCM038             PCM038                  1551
-ts_x09                  MACH_TS209              TS209                   1565
+ts209                   MACH_TS209              TS209                   1565
 at91cap9adk             MACH_AT91CAP9ADK        AT91CAP9ADK             1566
 mx31moboard             MACH_MX31MOBOARD        MX31MOBOARD             1574
 vision_ep9307           MACH_VISION_EP9307      VISION_EP9307           1578
@@ -321,7 +321,6 @@ lb88rc8480		MACH_LB88RC8480		LB88RC8480		1769
 mx25_3ds                MACH_MX25_3DS           MX25_3DS                1771
 omap3530_lv_som         MACH_OMAP3530_LV_SOM    OMAP3530_LV_SOM         1773
 davinci_da830_evm       MACH_DAVINCI_DA830_EVM  DAVINCI_DA830_EVM       1781
-at572d940hfek           MACH_AT572D940HFEB      AT572D940HFEB           1783
 dove_db                 MACH_DOVE_DB            DOVE_DB                 1788
 overo                   MACH_OVERO              OVERO                   1798
 at2440evb               MACH_AT2440EVB          AT2440EVB               1799
@@ -459,7 +458,7 @@ guruplug		MACH_GURUPLUG		GURUPLUG		2659
 spear310                MACH_SPEAR310           SPEAR310                2660
 spear320                MACH_SPEAR320           SPEAR320                2661
 aquila                  MACH_AQUILA             AQUILA                  2676
-sheeva_esata            MACH_ESATA_SHEEVAPLUG   ESATA_SHEEVAPLUG        2678
+esata_sheevaplug        MACH_ESATA_SHEEVAPLUG   ESATA_SHEEVAPLUG        2678
 msm7x30_surf            MACH_MSM7X30_SURF       MSM7X30_SURF            2679
 ea2478devkit            MACH_EA2478DEVKIT       EA2478DEVKIT            2683
 terastation_wxl         MACH_TERASTATION_WXL    TERASTATION_WXL         2697
@@ -491,380 +490,53 @@ eukrea_cpuimx35sd	MACH_EUKREA_CPUIMX35SD	EUKREA_CPUIMX35SD	2821
 eukrea_cpuimx51sd       MACH_EUKREA_CPUIMX51SD  EUKREA_CPUIMX51SD       2822
 eukrea_cpuimx51         MACH_EUKREA_CPUIMX51    EUKREA_CPUIMX51         2823
 smdkc210                MACH_SMDKC210           SMDKC210                2838
-omap3_braillo           MACH_OMAP3_BRAILLO      OMAP3_BRAILLO           2839
-spyplug                 MACH_SPYPLUG            SPYPLUG                 2840
-ginger                  MACH_GINGER             GINGER                  2841
-tny_t3530               MACH_TNY_T3530          TNY_T3530               2842
 pca102                  MACH_PCA102             PCA102                  2843
-spade                   MACH_SPADE              SPADE                   2844
-mxc25_topaz             MACH_MXC25_TOPAZ        MXC25_TOPAZ             2845
 t5325                   MACH_T5325              T5325                   2846
-gw2361                  MACH_GW2361             GW2361                  2847
-elog                    MACH_ELOG               ELOG                    2848
 income                  MACH_INCOME             INCOME                  2849
-bcm589x                 MACH_BCM589X            BCM589X                 2850
-etna                    MACH_ETNA               ETNA                    2851
-hawks                   MACH_HAWKS              HAWKS                   2852
-meson                   MACH_MESON              MESON                   2853
-xsbase255               MACH_XSBASE255          XSBASE255               2854
-pvm2030                 MACH_PVM2030            PVM2030                 2855
-mioa502                 MACH_MIOA502            MIOA502                 2856
 vvbox_sdorig2           MACH_VVBOX_SDORIG2      VVBOX_SDORIG2           2857
 vvbox_sdlite2           MACH_VVBOX_SDLITE2      VVBOX_SDLITE2           2858
 vvbox_sdpro4            MACH_VVBOX_SDPRO4       VVBOX_SDPRO4            2859
-htc_spv_m700            MACH_HTC_SPV_M700       HTC_SPV_M700            2860
 mx257sx                 MACH_MX257SX            MX257SX                 2861
 goni                    MACH_GONI               GONI                    2862
-msm8x55_svlte_ffa       MACH_MSM8X55_SVLTE_FFA  MSM8X55_SVLTE_FFA       2863
-msm8x55_svlte_surf      MACH_MSM8X55_SVLTE_SURF MSM8X55_SVLTE_SURF      2864
-quickstep               MACH_QUICKSTEP          QUICKSTEP               2865
-dmw96                   MACH_DMW96              DMW96                   2866
-hammerhead              MACH_HAMMERHEAD         HAMMERHEAD              2867
-trident                 MACH_TRIDENT            TRIDENT                 2868
-lightning               MACH_LIGHTNING          LIGHTNING               2869
-iconnect                MACH_ICONNECT           ICONNECT                2870
-autobot                 MACH_AUTOBOT            AUTOBOT                 2871
-coconut                 MACH_COCONUT            COCONUT                 2872
-durian                  MACH_DURIAN             DURIAN                  2873
-cayenne                 MACH_CAYENNE            CAYENNE                 2874
-fuji                    MACH_FUJI               FUJI                    2875
-synology_6282           MACH_SYNOLOGY_6282      SYNOLOGY_6282           2876
-em1sy                   MACH_EM1SY              EM1SY                   2877
-m502                    MACH_M502               M502                    2878
-matrix518               MACH_MATRIX518          MATRIX518               2879
-tiny_gurnard            MACH_TINY_GURNARD       TINY_GURNARD            2880
-spear1310               MACH_SPEAR1310          SPEAR1310               2881
 bv07                    MACH_BV07               BV07                    2882
-mxt_td61                MACH_MXT_TD61           MXT_TD61                2883
 openrd_ultimate         MACH_OPENRD_ULTIMATE    OPENRD_ULTIMATE         2884
 devixp                  MACH_DEVIXP             DEVIXP                  2885
 miccpt                  MACH_MICCPT             MICCPT                  2886
 mic256                  MACH_MIC256             MIC256                  2887
-as1167                  MACH_AS1167             AS1167                  2888
-omap3_ibiza             MACH_OMAP3_IBIZA        OMAP3_IBIZA             2889
 u5500                   MACH_U5500              U5500                   2890
-davinci_picto           MACH_DAVINCI_PICTO      DAVINCI_PICTO           2891
-mecha                   MACH_MECHA              MECHA                   2892
-bubba3                  MACH_BUBBA3             BUBBA3                  2893
-pupitre                 MACH_PUPITRE            PUPITRE                 2894
-tegra_vogue             MACH_TEGRA_VOGUE        TEGRA_VOGUE             2896
-tegra_e1165             MACH_TEGRA_E1165        TEGRA_E1165             2897
-simplenet               MACH_SIMPLENET          SIMPLENET               2898
-ec4350tbm               MACH_EC4350TBM          EC4350TBM               2899
-pec_tc                  MACH_PEC_TC             PEC_TC                  2900
-pec_hc2                 MACH_PEC_HC2            PEC_HC2                 2901
-esl_mobilis_a           MACH_ESL_MOBILIS_A      ESL_MOBILIS_A           2902
-esl_mobilis_b           MACH_ESL_MOBILIS_B      ESL_MOBILIS_B           2903
-esl_wave_a              MACH_ESL_WAVE_A         ESL_WAVE_A              2904
-esl_wave_b              MACH_ESL_WAVE_B         ESL_WAVE_B              2905
-unisense_mmm            MACH_UNISENSE_MMM       UNISENSE_MMM            2906
-blueshark               MACH_BLUESHARK          BLUESHARK               2907
-e10                     MACH_E10                E10                     2908
-app3k_robin             MACH_APP3K_ROBIN        APP3K_ROBIN             2909
-pov15hd                 MACH_POV15HD            POV15HD                 2910
-stella                  MACH_STELLA             STELLA                  2911
 linkstation_lschl       MACH_LINKSTATION_LSCHL  LINKSTATION_LSCHL       2913
-netwalker               MACH_NETWALKER          NETWALKER               2914
-acsx106                 MACH_ACSX106            ACSX106                 2915
-atlas5_c1               MACH_ATLAS5_C1          ATLAS5_C1               2916
-nsb3ast                 MACH_NSB3AST            NSB3AST                 2917
-gnet_slc                MACH_GNET_SLC           GNET_SLC                2918
-af4000                  MACH_AF4000             AF4000                  2919
-ark9431                 MACH_ARK9431            ARK9431                 2920
-fs_s5pc100              MACH_FS_S5PC100         FS_S5PC100              2921
-omap3505nova8           MACH_OMAP3505NOVA8      OMAP3505NOVA8           2922
-omap3621_edp1           MACH_OMAP3621_EDP1      OMAP3621_EDP1           2923
-oratisaes               MACH_ORATISAES          ORATISAES               2924
 smdkv310                MACH_SMDKV310           SMDKV310                2925
-siemens_l0              MACH_SIEMENS_L0         SIEMENS_L0              2926
-ventana                 MACH_VENTANA            VENTANA                 2927
 wm8505_7in_netbook      MACH_WM8505_7IN_NETBOOK WM8505_7IN_NETBOOK      2928
-ec4350sdb               MACH_EC4350SDB          EC4350SDB               2929
-mimas                   MACH_MIMAS              MIMAS                   2930
-titan                   MACH_TITAN              TITAN                   2931
 craneboard              MACH_CRANEBOARD         CRANEBOARD              2932
-es2440                  MACH_ES2440             ES2440                  2933
-najay_a9263             MACH_NAJAY_A9263        NAJAY_A9263             2934
-htctornado              MACH_HTCTORNADO         HTCTORNADO              2935
-dimm_mx257              MACH_DIMM_MX257         DIMM_MX257              2936
-jigen301                MACH_JIGEN              JIGEN                   2937
 smdk6450                MACH_SMDK6450           SMDK6450                2938
-meno_qng                MACH_MENO_QNG           MENO_QNG                2939
-ns2416                  MACH_NS2416             NS2416                  2940
-rpc353                  MACH_RPC353             RPC353                  2941
-tq6410                  MACH_TQ6410             TQ6410                  2942
-sky6410                 MACH_SKY6410            SKY6410                 2943
-dynasty                 MACH_DYNASTY            DYNASTY                 2944
-vivo                    MACH_VIVO               VIVO                    2945
-bury_bl7582             MACH_BURY_BL7582        BURY_BL7582             2946
-bury_bps5270            MACH_BURY_BPS5270       BURY_BPS5270            2947
-basi                    MACH_BASI               BASI                    2948
-tn200                   MACH_TN200              TN200                   2949
-c2mmi                   MACH_C2MMI              C2MMI                   2950
-meson_6236m             MACH_MESON_6236M        MESON_6236M             2951
-meson_8626m             MACH_MESON_8626M        MESON_8626M             2952
-tube                    MACH_TUBE               TUBE                    2953
-messina                 MACH_MESSINA            MESSINA                 2954
-mx50_arm2               MACH_MX50_ARM2          MX50_ARM2               2955
-cetus9263               MACH_CETUS9263          CETUS9263               2956
 brownstone              MACH_BROWNSTONE         BROWNSTONE              2957
-vmx25                   MACH_VMX25              VMX25                   2958
-vmx51                   MACH_VMX51              VMX51                   2959
-abacus                  MACH_ABACUS             ABACUS                  2960
-cm4745                  MACH_CM4745             CM4745                  2961
-oratislink              MACH_ORATISLINK         ORATISLINK              2962
-davinci_dm365_dvr       MACH_DAVINCI_DM365_DVR  DAVINCI_DM365_DVR       2963
-netviz                  MACH_NETVIZ             NETVIZ                  2964
 flexibity               MACH_FLEXIBITY          FLEXIBITY               2965
-wlan_computer           MACH_WLAN_COMPUTER      WLAN_COMPUTER           2966
-lpc24xx                 MACH_LPC24XX            LPC24XX                 2967
-spica                   MACH_SPICA              SPICA                   2968
-gpsdisplay              MACH_GPSDISPLAY         GPSDISPLAY              2969
-bipnet                  MACH_BIPNET             BIPNET                  2970
-overo_ctu_inertial      MACH_OVERO_CTU_INERTIAL OVERO_CTU_INERTIAL      2971
-davinci_dm355_mmm       MACH_DAVINCI_DM355_MMM  DAVINCI_DM355_MMM       2972
-pc9260_v2               MACH_PC9260_V2          PC9260_V2               2973
-ptx7545                 MACH_PTX7545            PTX7545                 2974
-tm_efdc                 MACH_TM_EFDC            TM_EFDC                 2975
-omap3_waldo1            MACH_OMAP3_WALDO1       OMAP3_WALDO1            2977
-flyer                   MACH_FLYER              FLYER                   2978
-tornado3240             MACH_TORNADO3240        TORNADO3240             2979
-soli_01                 MACH_SOLI_01            SOLI_01                 2980
-omapl138_europalc       MACH_OMAPL138_EUROPALC  OMAPL138_EUROPALC       2981
-helios_v1               MACH_HELIOS_V1          HELIOS_V1               2982
-netspace_lite_v2        MACH_NETSPACE_LITE_V2   NETSPACE_LITE_V2        2983
-ssc                     MACH_SSC                SSC                     2984
-premierwave_en          MACH_PREMIERWAVE_EN     PREMIERWAVE_EN          2985
-wasabi                  MACH_WASABI             WASABI                  2986
 mx50_rdp                MACH_MX50_RDP           MX50_RDP                2988
 universal_c210          MACH_UNIVERSAL_C210     UNIVERSAL_C210          2989
 real6410                MACH_REAL6410           REAL6410                2990
-spx_sakura              MACH_SPX_SAKURA         SPX_SAKURA              2991
-ij3k_2440               MACH_IJ3K_2440          IJ3K_2440               2992
-omap3_bc10              MACH_OMAP3_BC10         OMAP3_BC10              2993
-thebe                   MACH_THEBE              THEBE                   2994
-rv082                   MACH_RV082              RV082                   2995
-armlguest               MACH_ARMLGUEST          ARMLGUEST               2996
-tjinc1000               MACH_TJINC1000          TJINC1000               2997
 dockstar                MACH_DOCKSTAR           DOCKSTAR                2998
-ax8008                  MACH_AX8008             AX8008                  2999
-gnet_sgce               MACH_GNET_SGCE          GNET_SGCE               3000
-pxwnas_500_1000         MACH_PXWNAS_500_1000    PXWNAS_500_1000         3001
-ea20                    MACH_EA20               EA20                    3002
-awm2                    MACH_AWM2               AWM2                    3003
 ti8148evm               MACH_TI8148EVM          TI8148EVM               3004
 seaboard                MACH_SEABOARD           SEABOARD                3005
-linkstation_chlv2       MACH_LINKSTATION_CHLV2  LINKSTATION_CHLV2       3006
-tera_pro2_rack          MACH_TERA_PRO2_RACK     TERA_PRO2_RACK          3007
-rubys                   MACH_RUBYS              RUBYS                   3008
-aquarius                MACH_AQUARIUS           AQUARIUS                3009
 mx53_ard                MACH_MX53_ARD           MX53_ARD                3010
 mx53_smd                MACH_MX53_SMD           MX53_SMD                3011
-lswxl                   MACH_LSWXL              LSWXL                   3012
-dove_avng_v3            MACH_DOVE_AVNG_V3       DOVE_AVNG_V3            3013
-sdi_ess_9263            MACH_SDI_ESS_9263       SDI_ESS_9263            3014
-jocpu550                MACH_JOCPU550           JOCPU550                3015
 msm8x60_rumi3           MACH_MSM8X60_RUMI3      MSM8X60_RUMI3           3016
 msm8x60_ffa             MACH_MSM8X60_FFA        MSM8X60_FFA             3017
-yanomami                MACH_YANOMAMI           YANOMAMI                3018
-gta04                   MACH_GTA04              GTA04                   3019
 cm_a510                 MACH_CM_A510            CM_A510                 3020
-omap3_rfs200            MACH_OMAP3_RFS200       OMAP3_RFS200            3021
-kx33xx                  MACH_KX33XX             KX33XX                  3022
-ptx7510                 MACH_PTX7510            PTX7510                 3023
-top9000                 MACH_TOP9000            TOP9000                 3024
-teenote                 MACH_TEENOTE            TEENOTE                 3025
-ts3                     MACH_TS3                TS3                     3026
-a0                      MACH_A0                 A0                      3027
-fsm9xxx_surf            MACH_FSM9XXX_SURF       FSM9XXX_SURF            3028
-fsm9xxx_ffa             MACH_FSM9XXX_FFA        FSM9XXX_FFA             3029
-frrhwcdma60w            MACH_FRRHWCDMA60W       FRRHWCDMA60W            3030
-remus                   MACH_REMUS              REMUS                   3031
-at91cap7xdk             MACH_AT91CAP7XDK        AT91CAP7XDK             3032
-at91cap7stk             MACH_AT91CAP7STK        AT91CAP7STK             3033
-kt_sbc_sam9_1           MACH_KT_SBC_SAM9_1      KT_SBC_SAM9_1           3034
-armada_xp_db            MACH_ARMADA_XP_DB       ARMADA_XP_DB            3036
-spdm                    MACH_SPDM               SPDM                    3037
-gtib                    MACH_GTIB               GTIB                    3038
-dgm3240                 MACH_DGM3240            DGM3240                 3039
-htcmega                 MACH_HTCMEGA            HTCMEGA                 3041
-tricorder               MACH_TRICORDER          TRICORDER               3042
 tx28                    MACH_TX28               TX28                    3043
-bstbrd                  MACH_BSTBRD             BSTBRD                  3044
-pwb3090                 MACH_PWB3090            PWB3090                 3045
-idea6410                MACH_IDEA6410           IDEA6410                3046
-qbc9263                 MACH_QBC9263            QBC9263                 3047
-borabora                MACH_BORABORA           BORABORA                3048
-valdez                  MACH_VALDEZ             VALDEZ                  3049
-ls9g20                  MACH_LS9G20             LS9G20                  3050
-mios_v1                 MACH_MIOS_V1            MIOS_V1                 3051
-s5pc110_crespo          MACH_S5PC110_CRESPO     S5PC110_CRESPO          3052
-controltek9g20          MACH_CONTROLTEK9G20     CONTROLTEK9G20          3053
-tin307                  MACH_TIN307             TIN307                  3054
-tin510                  MACH_TIN510             TIN510                  3055
-bluecheese              MACH_BLUECHEESE         BLUECHEESE              3057
-tem3x30                 MACH_TEM3X30            TEM3X30                 3058
-harvest_desoto          MACH_HARVEST_DESOTO     HARVEST_DESOTO          3059
-msm8x60_qrdc            MACH_MSM8X60_QRDC       MSM8X60_QRDC            3060
-spear900                MACH_SPEAR900           SPEAR900                3061
 pcontrol_g20            MACH_PCONTROL_G20       PCONTROL_G20            3062
-rdstor                  MACH_RDSTOR             RDSTOR                  3063
-usdloader               MACH_USDLOADER          USDLOADER               3064
-tsoploader              MACH_TSOPLOADER         TSOPLOADER              3065
-kronos                  MACH_KRONOS             KRONOS                  3066
-ffcore                  MACH_FFCORE             FFCORE                  3067
-mone                    MACH_MONE               MONE                    3068
-unit2s                  MACH_UNIT2S             UNIT2S                  3069
-acer_a5                 MACH_ACER_A5            ACER_A5                 3070
-etherpro_isp            MACH_ETHERPRO_ISP       ETHERPRO_ISP            3071
-stretchs7000            MACH_STRETCHS7000       STRETCHS7000            3072
-p87_smartsim            MACH_P87_SMARTSIM       P87_SMARTSIM            3073
-tulip                   MACH_TULIP              TULIP                   3074
-sunflower               MACH_SUNFLOWER          SUNFLOWER               3075
-rib                     MACH_RIB                RIB                     3076
-clod                    MACH_CLOD               CLOD                    3077
-rump                    MACH_RUMP               RUMP                    3078
-tenderloin              MACH_TENDERLOIN         TENDERLOIN              3079
-shortloin               MACH_SHORTLOIN          SHORTLOIN               3080
-antares                 MACH_ANTARES            ANTARES                 3082
-wb40n                   MACH_WB40N              WB40N                   3083
-herring                 MACH_HERRING            HERRING                 3084
-naxy400                 MACH_NAXY400            NAXY400                 3085
-naxy1200                MACH_NAXY1200           NAXY1200                3086
 vpr200                  MACH_VPR200             VPR200                  3087
-bug20                   MACH_BUG20              BUG20                   3088
-goflexnet               MACH_GOFLEXNET          GOFLEXNET               3089
 torbreck                MACH_TORBRECK           TORBRECK                3090
-saarb_mg1               MACH_SAARB_MG1          SAARB_MG1               3091
-callisto                MACH_CALLISTO           CALLISTO                3092
-multhsu                 MACH_MULTHSU            MULTHSU                 3093
-saluda                  MACH_SALUDA             SALUDA                  3094
-pemp_omap3_apollo       MACH_PEMP_OMAP3_APOLLO  PEMP_OMAP3_APOLLO       3095
-vc0718                  MACH_VC0718             VC0718                  3096
-mvblx                   MACH_MVBLX              MVBLX                   3097
-inhand_apeiron          MACH_INHAND_APEIRON     INHAND_APEIRON          3098
-inhand_fury             MACH_INHAND_FURY        INHAND_FURY             3099
-inhand_siren            MACH_INHAND_SIREN       INHAND_SIREN            3100
-hdnvp                   MACH_HDNVP              HDNVP                   3101
-softwinner              MACH_SOFTWINNER         SOFTWINNER              3102
 prima2_evb              MACH_PRIMA2_EVB         PRIMA2_EVB              3103
-nas6210                 MACH_NAS6210            NAS6210                 3104
-unisdev                 MACH_UNISDEV            UNISDEV                 3105
-sbca11                  MACH_SBCA11             SBCA11                  3106
-saga                    MACH_SAGA               SAGA                    3107
-ns_k330                 MACH_NS_K330            NS_K330                 3108
-tanna                   MACH_TANNA              TANNA                   3109
-imate8502               MACH_IMATE8502          IMATE8502               3110
-aspen                   MACH_ASPEN              ASPEN                   3111
-daintree_cwac           MACH_DAINTREE_CWAC      DAINTREE_CWAC           3112
-zmx25                   MACH_ZMX25              ZMX25                   3113
-maple1                  MACH_MAPLE1             MAPLE1                  3114
-qsd8x72_surf            MACH_QSD8X72_SURF       QSD8X72_SURF            3115
-qsd8x72_ffa             MACH_QSD8X72_FFA        QSD8X72_FFA             3116
-abilene                 MACH_ABILENE            ABILENE                 3117
-eigen_ttr               MACH_EIGEN_TTR          EIGEN_TTR               3118
-iomega_ix2_200          MACH_IOMEGA_IX2_200     IOMEGA_IX2_200          3119
-coretec_vcx7400         MACH_CORETEC_VCX7400    CORETEC_VCX7400         3120
-santiago                MACH_SANTIAGO           SANTIAGO                3121
-mx257sol                MACH_MX257SOL           MX257SOL                3122
-strasbourg              MACH_STRASBOURG         STRASBOURG              3123
-msm8x60_fluid           MACH_MSM8X60_FLUID      MSM8X60_FLUID           3124
-smartqv5                MACH_SMARTQV5           SMARTQV5                3125
-smartqv3                MACH_SMARTQV3           SMARTQV3                3126
-smartqv7                MACH_SMARTQV7           SMARTQV7                3127
 paz00                   MACH_PAZ00              PAZ00                   3128
 acmenetusfoxg20         MACH_ACMENETUSFOXG20    ACMENETUSFOXG20         3129
-fwbd_0404               MACH_FWBD_0404          FWBD_0404               3131
-hdgu                    MACH_HDGU               HDGU                    3132
-pyramid                 MACH_PYRAMID            PYRAMID                 3133
-epiphan                 MACH_EPIPHAN            EPIPHAN                 3134
-omap_bender             MACH_OMAP_BENDER        OMAP_BENDER             3135
-gurnard                 MACH_GURNARD            GURNARD                 3136
-gtl_it5100              MACH_GTL_IT5100         GTL_IT5100              3137
-bcm2708                 MACH_BCM2708            BCM2708                 3138
-mx51_ggc                MACH_MX51_GGC           MX51_GGC                3139
-sharespace              MACH_SHARESPACE         SHARESPACE              3140
-haba_knx_explorer       MACH_HABA_KNX_EXPLORER  HABA_KNX_EXPLORER       3141
-simtec_kirkmod          MACH_SIMTEC_KIRKMOD     SIMTEC_KIRKMOD          3142
-crux                    MACH_CRUX               CRUX                    3143
-mx51_bravo              MACH_MX51_BRAVO         MX51_BRAVO              3144
-charon                  MACH_CHARON             CHARON                  3145
-picocom3                MACH_PICOCOM3           PICOCOM3                3146
-picocom4                MACH_PICOCOM4           PICOCOM4                3147
-serrano                 MACH_SERRANO            SERRANO                 3148
-doubleshot              MACH_DOUBLESHOT         DOUBLESHOT              3149
-evsy                    MACH_EVSY               EVSY                    3150
-huashan                 MACH_HUASHAN            HUASHAN                 3151
-lausanne                MACH_LAUSANNE           LAUSANNE                3152
-emerald                 MACH_EMERALD            EMERALD                 3153
-tqma35                  MACH_TQMA35             TQMA35                  3154
-marvel                  MACH_MARVEL             MARVEL                  3155
-manuae                  MACH_MANUAE             MANUAE                  3156
-chacha                  MACH_CHACHA             CHACHA                  3157
-lemon                   MACH_LEMON              LEMON                   3158
-csc                     MACH_CSC                CSC                     3159
-gira_knxip_router       MACH_GIRA_KNXIP_ROUTER  GIRA_KNXIP_ROUTER       3160
-t20                     MACH_T20                T20                     3161
-hdmini                  MACH_HDMINI             HDMINI                  3162
-sciphone_g2             MACH_SCIPHONE_G2        SCIPHONE_G2             3163
-express                 MACH_EXPRESS            EXPRESS                 3164
-express_kt              MACH_EXPRESS_KT         EXPRESS_KT              3165
-maximasp                MACH_MAXIMASP           MAXIMASP                3166
-nitrogen_imx51          MACH_NITROGEN_IMX51     NITROGEN_IMX51          3167
-nitrogen_imx53          MACH_NITROGEN_IMX53     NITROGEN_IMX53          3168
-sunfire                 MACH_SUNFIRE            SUNFIRE                 3169
-arowana                 MACH_AROWANA            AROWANA                 3170
-tegra_daytona           MACH_TEGRA_DAYTONA      TEGRA_DAYTONA           3171
-tegra_swordfish         MACH_TEGRA_SWORDFISH    TEGRA_SWORDFISH         3172
-edison                  MACH_EDISON             EDISON                  3173
-svp8500v1               MACH_SVP8500V1          SVP8500V1               3174
-svp8500v2               MACH_SVP8500V2          SVP8500V2               3175
-svp5500                 MACH_SVP5500            SVP5500                 3176
-b5500                   MACH_B5500              B5500                   3177
-s5500                   MACH_S5500              S5500                   3178
-icon                    MACH_ICON               ICON                    3179
-elephant                MACH_ELEPHANT           ELEPHANT                3180
-shooter                 MACH_SHOOTER            SHOOTER                 3182
-spade_lte               MACH_SPADE_LTE          SPADE_LTE               3183
-philhwani               MACH_PHILHWANI          PHILHWANI               3184
-gsncomm                 MACH_GSNCOMM            GSNCOMM                 3185
-strasbourg_a2           MACH_STRASBOURG_A2      STRASBOURG_A2           3186
-mmm                     MACH_MMM                MMM                     3187
-davinci_dm365_bv        MACH_DAVINCI_DM365_BV   DAVINCI_DM365_BV        3188
 ag5evm                  MACH_AG5EVM             AG5EVM                  3189
-sc575plc                MACH_SC575PLC           SC575PLC                3190
-sc575hmi                MACH_SC575IPC           SC575IPC                3191
-omap3_tdm3730           MACH_OMAP3_TDM3730      OMAP3_TDM3730           3192
-top9000_eval            MACH_TOP9000_EVAL       TOP9000_EVAL            3194
-top9000_su              MACH_TOP9000_SU         TOP9000_SU              3195
-utm300                  MACH_UTM300             UTM300                  3196
 tsunagi                 MACH_TSUNAGI            TSUNAGI                 3197
-ts75xx                  MACH_TS75XX             TS75XX                  3198
-ts47xx                  MACH_TS47XX             TS47XX                  3200
-da850_k5                MACH_DA850_K5           DA850_K5                3201
-ax502                   MACH_AX502              AX502                   3202
-igep0032                MACH_IGEP0032           IGEP0032                3203
-antero                  MACH_ANTERO             ANTERO                  3204
-synergy                 MACH_SYNERGY            SYNERGY                 3205
 ics_if_voip             MACH_ICS_IF_VOIP        ICS_IF_VOIP             3206
 wlf_cragg_6410          MACH_WLF_CRAGG_6410     WLF_CRAGG_6410          3207
-punica                  MACH_PUNICA             PUNICA                  3208
 trimslice               MACH_TRIMSLICE          TRIMSLICE               3209
-mx27_wmultra            MACH_MX27_WMULTRA       MX27_WMULTRA            3210
 mackerel                MACH_MACKEREL           MACKEREL                3211
-fa9x27                  MACH_FA9X27             FA9X27                  3213
-ns2816tb                MACH_NS2816TB           NS2816TB                3214
-ns2816_ntpad            MACH_NS2816_NTPAD       NS2816_NTPAD            3215
-ns2816_ntnb             MACH_NS2816_NTNB        NS2816_NTNB             3216
 kaen                    MACH_KAEN               KAEN                    3217
-nv1000                  MACH_NV1000             NV1000                  3218
-nuc950ts                MACH_NUC950TS           NUC950TS                3219
 nokia_rm680             MACH_NOKIA_RM680        NOKIA_RM680             3220
-ast2200                 MACH_AST2200            AST2200                 3221
-lead                    MACH_LEAD               LEAD                    3222
-unino1                  MACH_UNINO1             UNINO1                  3223
-greeco                  MACH_GREECO             GREECO                  3224
-verdi                   MACH_VERDI              VERDI                   3225
 dm6446_adbox            MACH_DM6446_ADBOX       DM6446_ADBOX            3226
 quad_salsa              MACH_QUAD_SALSA         QUAD_SALSA              3227
 abb_gma_1_1             MACH_ABB_GMA_1_1        ABB_GMA_1_1             3228
@@ -949,13 +621,11 @@ koi			MACH_KOI		KOI			3312
 ts4800                  MACH_TS4800             TS4800                  3313
 tqma9263                MACH_TQMA9263           TQMA9263                3314
 holiday                 MACH_HOLIDAY            HOLIDAY                 3315
-dma_6410                MACH_DMA6410            DMA6410                 3316
 pcats_overlay           MACH_PCATS_OVERLAY      PCATS_OVERLAY           3317
 hwgw6410                MACH_HWGW6410           HWGW6410                3318
 shenzhou                MACH_SHENZHOU           SHENZHOU                3319
 cwme9210                MACH_CWME9210           CWME9210                3320
 cwme9210js              MACH_CWME9210JS         CWME9210JS              3321
-pgs_v1                  MACH_PGS_SITARA         PGS_SITARA              3322
 colibri_tegra2          MACH_COLIBRI_TEGRA2     COLIBRI_TEGRA2          3323
 w21                     MACH_W21                W21                     3324
 polysat1                MACH_POLYSAT1           POLYSAT1                3325
@@ -1021,13 +691,11 @@ viprinet		MACH_VIPRINET		VIPRINET		3385
 bockw                   MACH_BOCKW              BOCKW                   3386
 eva2000                 MACH_EVA2000            EVA2000                 3387
 steelyard               MACH_STEELYARD          STEELYARD               3388
-sdh001                  MACH_MACH_SDH001        MACH_SDH001             3390
 nsslsboard              MACH_NSSLSBOARD         NSSLSBOARD              3392
 geneva_b5               MACH_GENEVA_B5          GENEVA_B5               3393
 spear1340               MACH_SPEAR1340          SPEAR1340               3394
 rexmas                  MACH_REXMAS             REXMAS                  3395
 msm8960_cdp             MACH_MSM8960_CDP        MSM8960_CDP             3396
-msm8960_mdp             MACH_MSM8960_MDP        MSM8960_MDP             3397
 msm8960_fluid           MACH_MSM8960_FLUID      MSM8960_FLUID           3398
 msm8960_apq             MACH_MSM8960_APQ        MSM8960_APQ             3399
 helios_v2               MACH_HELIOS_V2          HELIOS_V2               3400
@@ -1123,6 +791,381 @@ blissc			MACH_BLISSC		BLISSC			3491
 thales_adc              MACH_THALES_ADC         THALES_ADC              3492
 ubisys_p9d_evp          MACH_UBISYS_P9D_EVP     UBISYS_P9D_EVP          3493
 atdgp318                MACH_ATDGP318           ATDGP318                3494
+dma210u                 MACH_DMA210U            DMA210U                 3495
+em_t3                   MACH_EM_T3              EM_T3                   3496
+htx3250                 MACH_HTX3250            HTX3250                 3497
+g50                     MACH_G50                G50                     3498
+eco5                    MACH_ECO5               ECO5                    3499
+wintergrasp             MACH_WINTERGRASP        WINTERGRASP             3500
+puro                    MACH_PURO               PURO                    3501
+shooter_k               MACH_SHOOTER_K          SHOOTER_K               3502
+nspire                  MACH_NSPIRE             NSPIRE                  3503
+mickxx                  MACH_MICKXX             MICKXX                  3504
+lxmb                    MACH_LXMB               LXMB                    3505
+adam                    MACH_ADAM               ADAM                    3507
+b1004                   MACH_B1004              B1004                   3508
+oboea                   MACH_OBOEA              OBOEA                   3509
+a1015                   MACH_A1015              A1015                   3510
+robin_vbdt30            MACH_ROBIN_VBDT30       ROBIN_VBDT30            3511
+tegra_enterprise        MACH_TEGRA_ENTERPRISE   TEGRA_ENTERPRISE        3512
+rfl108200_mk10          MACH_RFL108200_MK10     RFL108200_MK10          3513
+rfl108300_mk16          MACH_RFL108300_MK16     RFL108300_MK16          3514
+rover_v7                MACH_ROVER_V7           ROVER_V7                3515
+miphone                 MACH_MIPHONE            MIPHONE                 3516
+femtobts                MACH_FEMTOBTS           FEMTOBTS                3517
+monopoli                MACH_MONOPOLI           MONOPOLI                3518
+boss                    MACH_BOSS               BOSS                    3519
+davinci_dm368_vtam      MACH_DAVINCI_DM368_VTAM DAVINCI_DM368_VTAM      3520
+clcon                   MACH_CLCON              CLCON                   3521
+nokia_rm696             MACH_NOKIA_RM696        NOKIA_RM696             3522
+tahiti                  MACH_TAHITI             TAHITI                  3523
+fighter                 MACH_FIGHTER            FIGHTER                 3524
+sgh_i710                MACH_SGH_I710           SGH_I710                3525
+integreproscb           MACH_INTEGREPROSCB      INTEGREPROSCB           3526
+monza                   MACH_MONZA              MONZA                   3527
+calimain                MACH_CALIMAIN           CALIMAIN                3528
+mx6q_sabreauto          MACH_MX6Q_SABREAUTO     MX6Q_SABREAUTO          3529
+gma01x                  MACH_GMA01X             GMA01X                  3530
+sbc51                   MACH_SBC51              SBC51                   3531
+fit                     MACH_FIT                FIT                     3532
+steelhead               MACH_STEELHEAD          STEELHEAD               3533
+panther                 MACH_PANTHER            PANTHER                 3534
+msm8960_liquid          MACH_MSM8960_LIQUID     MSM8960_LIQUID          3535
+lexikonct               MACH_LEXIKONCT          LEXIKONCT               3536
+ns2816_stb              MACH_NS2816_STB         NS2816_STB              3537
+sei_mm2_lpc3250         MACH_SEI_MM2_LPC3250    SEI_MM2_LPC3250         3538
+cmimx53                 MACH_CMIMX53            CMIMX53                 3539
+sandwich                MACH_SANDWICH           SANDWICH                3540
+chief                   MACH_CHIEF              CHIEF                   3541
+pogo_e02                MACH_POGO_E02           POGO_E02                3542
+mikrap_x168             MACH_MIKRAP_X168        MIKRAP_X168             3543
+htcmozart               MACH_HTCMOZART          HTCMOZART               3544
+htcgold                 MACH_HTCGOLD            HTCGOLD                 3545
+mt72xx                  MACH_MT72XX             MT72XX                  3546
+mx51_ivy                MACH_MX51_IVY           MX51_IVY                3547
+mx51_lvd                MACH_MX51_LVD           MX51_LVD                3548
+omap3_wiser2            MACH_OMAP3_WISER2       OMAP3_WISER2            3549
+dreamplug               MACH_DREAMPLUG          DREAMPLUG               3550
+cobas_c_111             MACH_COBAS_C_111        COBAS_C_111             3551
+cobas_u_411             MACH_COBAS_U_411        COBAS_U_411             3552
+hssd                    MACH_HSSD               HSSD                    3553
+iom35x                  MACH_IOM35X             IOM35X                  3554
+psom_omap               MACH_PSOM_OMAP          PSOM_OMAP               3555
+iphone_2g               MACH_IPHONE_2G          IPHONE_2G               3556
+iphone_3g               MACH_IPHONE_3G          IPHONE_3G               3557
+ipod_touch_1g           MACH_IPOD_TOUCH_1G      IPOD_TOUCH_1G           3558
+pharos_tpc              MACH_PHAROS_TPC         PHAROS_TPC              3559
+mx53_hydra              MACH_MX53_HYDRA         MX53_HYDRA              3560
+ns2816_dev_board        MACH_NS2816_DEV_BOARD   NS2816_DEV_BOARD        3561
+iphone_3gs              MACH_IPHONE_3GS         IPHONE_3GS              3562
+iphone_4                MACH_IPHONE_4           IPHONE_4                3563
+ipod_touch_4g           MACH_IPOD_TOUCH_4G      IPOD_TOUCH_4G           3564
+dragon_e1100            MACH_DRAGON_E1100       DRAGON_E1100            3565
+topside                 MACH_TOPSIDE            TOPSIDE                 3566
+irisiii                 MACH_IRISIII            IRISIII                 3567
+deto_macarm9            MACH_DETO_MACARM9       DETO_MACARM9            3568
+eti_d1                  MACH_ETI_D1             ETI_D1                  3569
+som3530sdk              MACH_SOM3530SDK         SOM3530SDK              3570
+oc_engine               MACH_OC_ENGINE          OC_ENGINE               3571
+apq8064_sim             MACH_APQ8064_SIM        APQ8064_SIM             3572
+alps                    MACH_ALPS               ALPS                    3575
+tny_t3730               MACH_TNY_T3730          TNY_T3730               3576
+geryon_nfe              MACH_GERYON_NFE         GERYON_NFE              3577
+ns2816_ref_board        MACH_NS2816_REF_BOARD   NS2816_REF_BOARD        3578
+silverstone             MACH_SILVERSTONE        SILVERSTONE             3579
+mtt2440                 MACH_MTT2440            MTT2440                 3580
+ynicdb                  MACH_YNICDB             YNICDB                  3581
+bct                     MACH_BCT                BCT                     3582
+tuscan                  MACH_TUSCAN             TUSCAN                  3583
+xbt_sam9g45             MACH_XBT_SAM9G45        XBT_SAM9G45             3584
+enbw_cmc                MACH_ENBW_CMC           ENBW_CMC                3585
+ch104mx257              MACH_CH104MX257         CH104MX257              3587
+openpri                 MACH_OPENPRI            OPENPRI                 3588
+am335xevm               MACH_AM335XEVM          AM335XEVM               3589
+picodmb                 MACH_PICODMB            PICODMB                 3590
+waluigi                 MACH_WALUIGI            WALUIGI                 3591
+punicag7                MACH_PUNICAG7           PUNICAG7                3592
+ipad_1g                 MACH_IPAD_1G            IPAD_1G                 3593
+appletv_2g              MACH_APPLETV_2G         APPLETV_2G              3594
+mach_ecog45             MACH_MACH_ECOG45        MACH_ECOG45             3595
+ait_cam_enc_4xx         MACH_AIT_CAM_ENC_4XX    AIT_CAM_ENC_4XX         3596
+runnymede               MACH_RUNNYMEDE          RUNNYMEDE               3597
+play                    MACH_PLAY               PLAY                    3598
+hw90260                 MACH_HW90260            HW90260                 3599
+tagh                    MACH_TAGH               TAGH                    3600
+filbert                 MACH_FILBERT            FILBERT                 3601
+getinge_netcomv3        MACH_GETINGE_NETCOMV3   GETINGE_NETCOMV3        3602
+cw20                    MACH_CW20               CW20                    3603
+cinema                  MACH_CINEMA             CINEMA                  3604
+cinema_tea              MACH_CINEMA_TEA         CINEMA_TEA              3605
+cinema_coffee           MACH_CINEMA_COFFEE      CINEMA_COFFEE           3606
+cinema_juice            MACH_CINEMA_JUICE       CINEMA_JUICE            3607
+mx53_mirage2            MACH_MX53_MIRAGE2       MX53_MIRAGE2            3609
+mx53_efikasb            MACH_MX53_EFIKASB       MX53_EFIKASB            3610
+stm_b2000               MACH_STM_B2000          STM_B2000               3612
 m28evk                  MACH_M28EVK             M28EVK                  3613
+pda                     MACH_PDA                PDA                     3614
+meraki_mr58             MACH_MERAKI_MR58        MERAKI_MR58             3615
+kota2                   MACH_KOTA2              KOTA2                   3616
+letcool                 MACH_LETCOOL            LETCOOL                 3617
+mx27iat                 MACH_MX27IAT            MX27IAT                 3618
+apollo_td               MACH_APOLLO_TD          APOLLO_TD               3619
+arena                   MACH_ARENA              ARENA                   3620
+gsngateway              MACH_GSNGATEWAY         GSNGATEWAY              3621
+lf2000                  MACH_LF2000             LF2000                  3622
+bonito                  MACH_BONITO             BONITO                  3623
+asymptote               MACH_ASYMPTOTE          ASYMPTOTE               3624
+bst2brd                 MACH_BST2BRD            BST2BRD                 3625
+tx335s                  MACH_TX335S             TX335S                  3626
+pelco_tesla             MACH_PELCO_TESLA        PELCO_TESLA             3627
+rrhtestplat             MACH_RRHTESTPLAT        RRHTESTPLAT             3628
+vidtonic_pro            MACH_VIDTONIC_PRO       VIDTONIC_PRO            3629
+pl_apollo               MACH_PL_APOLLO          PL_APOLLO               3630
+pl_phoenix              MACH_PL_PHOENIX         PL_PHOENIX              3631
+m28cu3                  MACH_M28CU3             M28CU3                  3632
+vvbox_hd                MACH_VVBOX_HD           VVBOX_HD                3633
+coreware_sam9260_       MACH_COREWARE_SAM9260_  COREWARE_SAM9260_       3634
+marmaduke               MACH_MARMADUKE          MARMADUKE               3635
+amg_xlcore_camera       MACH_AMG_XLCORE_CAMERA  AMG_XLCORE_CAMERA       3636
+omap3_egf               MACH_OMAP3_EGF          OMAP3_EGF               3637
 smdk4212                MACH_SMDK4212           SMDK4212                3638
+dnp9200                 MACH_DNP9200            DNP9200                 3639
+tf101                   MACH_TF101              TF101                   3640
+omap3silvio             MACH_OMAP3SILVIO        OMAP3SILVIO             3641
+picasso2                MACH_PICASSO2           PICASSO2                3642
+vangogh2                MACH_VANGOGH2           VANGOGH2                3643
+olpc_xo_1_75            MACH_OLPC_XO_1_75       OLPC_XO_1_75            3644
+gx400                   MACH_GX400              GX400                   3645
+gs300                   MACH_GS300              GS300                   3646
+acer_a9                 MACH_ACER_A9            ACER_A9                 3647
+vivow_evm               MACH_VIVOW_EVM          VIVOW_EVM               3648
+veloce_cxq              MACH_VELOCE_CXQ         VELOCE_CXQ              3649
+veloce_cxm              MACH_VELOCE_CXM         VELOCE_CXM              3650
+p1852                   MACH_P1852              P1852                   3651
+naxy100                 MACH_NAXY100            NAXY100                 3652
+taishan                 MACH_TAISHAN            TAISHAN                 3653
+touchlink               MACH_TOUCHLINK          TOUCHLINK               3654
+stm32f103ze             MACH_STM32F103ZE        STM32F103ZE             3655
+mcx                     MACH_MCX                MCX                     3656
+stm_nmhdk_fli7610       MACH_STM_NMHDK_FLI7610  STM_NMHDK_FLI7610       3657
+top28x                  MACH_TOP28X             TOP28X                  3658
+okl4vp_microvisor       MACH_OKL4VP_MICROVISOR  OKL4VP_MICROVISOR       3659
+pop                     MACH_POP                POP                     3660
+layer                   MACH_LAYER              LAYER                   3661
+trondheim               MACH_TRONDHEIM          TRONDHEIM               3662
+eva                     MACH_EVA                EVA                     3663
+trust_taurus            MACH_TRUST_TAURUS       TRUST_TAURUS            3664
+ns2816_huashan          MACH_NS2816_HUASHAN     NS2816_HUASHAN          3665
+ns2816_yangcheng        MACH_NS2816_YANGCHENG   NS2816_YANGCHENG        3666
+p852                    MACH_P852               P852                    3667
+flea3                   MACH_FLEA3              FLEA3                   3668
+bowfin                  MACH_BOWFIN             BOWFIN                  3669
+mv88de3100              MACH_MV88DE3100         MV88DE3100              3670
+pia_am35x               MACH_PIA_AM35X          PIA_AM35X               3671
+cedar                   MACH_CEDAR              CEDAR                   3672
+picasso_e               MACH_PICASSO_E          PICASSO_E               3673
+samsung_e60             MACH_SAMSUNG_E60        SAMSUNG_E60             3674
+sdvr_mini               MACH_SDVR_MINI          SDVR_MINI               3676
+omap3_ij3k              MACH_OMAP3_IJ3K         OMAP3_IJ3K              3677
+modasmc1                MACH_MODASMC1           MODASMC1                3678
+apq8064_rumi3           MACH_APQ8064_RUMI3      APQ8064_RUMI3           3679
+matrix506               MACH_MATRIX506          MATRIX506               3680
+msm9615_mtp             MACH_MSM9615_MTP        MSM9615_MTP             3681
+dm36x_spawndc           MACH_DM36X_SPAWNDC      DM36X_SPAWNDC           3682
+sff792                  MACH_SFF792             SFF792                  3683
+am335xiaevm             MACH_AM335XIAEVM        AM335XIAEVM             3684
+g3c2440                 MACH_G3C2440            G3C2440                 3685
+tion270                 MACH_TION270            TION270                 3686
+w22q7arm02              MACH_W22Q7ARM02         W22Q7ARM02              3687
+omap_cat                MACH_OMAP_CAT           OMAP_CAT                3688
+at91sam9n12ek           MACH_AT91SAM9N12EK      AT91SAM9N12EK           3689
+morrison                MACH_MORRISON           MORRISON                3690
+svdu                    MACH_SVDU               SVDU                    3691
+lpp01                   MACH_LPP01              LPP01                   3692
+ubc283                  MACH_UBC283             UBC283                  3693
+zeppelin                MACH_ZEPPELIN           ZEPPELIN                3694
+motus                   MACH_MOTUS              MOTUS                   3695
+neomainboard            MACH_NEOMAINBOARD       NEOMAINBOARD            3696
+devkit3250              MACH_DEVKIT3250         DEVKIT3250              3697
+devkit7000              MACH_DEVKIT7000         DEVKIT7000              3698
+fmc_uic                 MACH_FMC_UIC            FMC_UIC                 3699
+fmc_dcm                 MACH_FMC_DCM            FMC_DCM                 3700
+batwm                   MACH_BATWM              BATWM                   3701
+atlas6cb                MACH_ATLAS6CB           ATLAS6CB                3702
+blue                    MACH_BLUE               BLUE                    3705
+colorado                MACH_COLORADO           COLORADO                3706
+popc                    MACH_POPC               POPC                    3707
+promwad_jade            MACH_PROMWAD_JADE       PROMWAD_JADE            3708
+amp                     MACH_AMP                AMP                     3709
+gnet_amp                MACH_GNET_AMP           GNET_AMP                3710
+toques                  MACH_TOQUES             TOQUES                  3711
+dct_storm               MACH_DCT_STORM          DCT_STORM               3713
+owl                     MACH_OWL                OWL                     3715
+cogent_csb1741          MACH_COGENT_CSB1741     COGENT_CSB1741          3716
+adillustra610           MACH_ADILLUSTRA610      ADILLUSTRA610           3718
+ecafe_na04              MACH_ECAFE_NA04         ECAFE_NA04              3719
+popct                   MACH_POPCT              POPCT                   3720
+omap3_helena            MACH_OMAP3_HELENA       OMAP3_HELENA            3721
+ach                     MACH_ACH                ACH                     3722
+module_dtb              MACH_MODULE_DTB         MODULE_DTB              3723
+oslo_elisabeth          MACH_OSLO_ELISABETH     OSLO_ELISABETH          3725
+tt01                    MACH_TT01               TT01                    3726
+msm8930_cdp             MACH_MSM8930_CDP        MSM8930_CDP             3727
+msm8930_mtp             MACH_MSM8930_MTP        MSM8930_MTP             3728
+msm8930_fluid           MACH_MSM8930_FLUID      MSM8930_FLUID           3729
+ltu11                   MACH_LTU11              LTU11                   3730
+am1808_spawnco          MACH_AM1808_SPAWNCO     AM1808_SPAWNCO          3731
+flx6410                 MACH_FLX6410            FLX6410                 3732
+mx6q_qsb                MACH_MX6Q_QSB           MX6Q_QSB                3733
+mx53_plt424             MACH_MX53_PLT424        MX53_PLT424             3734
+jasmine                 MACH_JASMINE            JASMINE                 3735
+l138_owlboard_plus      MACH_L138_OWLBOARD_PLUS L138_OWLBOARD_PLUS      3736
+wr21                    MACH_WR21               WR21                    3737
+peaboy                  MACH_PEABOY             PEABOY                  3739
+mx28_plato              MACH_MX28_PLATO         MX28_PLATO              3740
+kacom2                  MACH_KACOM2             KACOM2                  3741
+slco                    MACH_SLCO               SLCO                    3742
+imx51pico               MACH_IMX51PICO          IMX51PICO               3743
+glink1                  MACH_GLINK1             GLINK1                  3744
+diamond                 MACH_DIAMOND            DIAMOND                 3745
+d9000                   MACH_D9000              D9000                   3746
+w5300e01                MACH_W5300E01           W5300E01                3747
+im6000                  MACH_IM6000             IM6000                  3748
+mx51_fred51             MACH_MX51_FRED51        MX51_FRED51             3749
+stm32f2                 MACH_STM32F2            STM32F2                 3750
+ville                   MACH_VILLE              VILLE                   3751
+ptip_murnau             MACH_PTIP_MURNAU        PTIP_MURNAU             3752
+ptip_classic            MACH_PTIP_CLASSIC       PTIP_CLASSIC            3753
+mx53grb                 MACH_MX53GRB            MX53GRB                 3754
+gagarin                 MACH_GAGARIN            GAGARIN                 3755
+nas2big                 MACH_NAS2BIG            NAS2BIG                 3757
+superfemto              MACH_SUPERFEMTO         SUPERFEMTO              3758
+teufel                  MACH_TEUFEL             TEUFEL                  3759
+dinara                  MACH_DINARA             DINARA                  3760
+vanquish                MACH_VANQUISH           VANQUISH                3761
+zipabox1                MACH_ZIPABOX1           ZIPABOX1                3762
+u9540                   MACH_U9540              U9540                   3763
+jet                     MACH_JET                JET                     3764
 smdk4412                MACH_SMDK4412           SMDK4412                3765
+elite                   MACH_ELITE              ELITE                   3766
+spear320_hmi            MACH_SPEAR320_HMI       SPEAR320_HMI            3767
+ontario                 MACH_ONTARIO            ONTARIO                 3768
+mx6q_sabrelite          MACH_MX6Q_SABRELITE     MX6Q_SABRELITE          3769
+vc200                   MACH_VC200              VC200                   3770
+msm7625a_ffa            MACH_MSM7625A_FFA       MSM7625A_FFA            3771
+msm7625a_surf           MACH_MSM7625A_SURF      MSM7625A_SURF           3772
+benthossbp              MACH_BENTHOSSBP         BENTHOSSBP              3773
+smdk5210                MACH_SMDK5210           SMDK5210                3774
+empq2300                MACH_EMPQ2300           EMPQ2300                3775
+minipos                 MACH_MINIPOS            MINIPOS                 3776
+omap5_sevm              MACH_OMAP5_SEVM         OMAP5_SEVM              3777
+shelter                 MACH_SHELTER            SHELTER                 3778
+omap3_devkit8500        MACH_OMAP3_DEVKIT8500   OMAP3_DEVKIT8500        3779
+edgetd                  MACH_EDGETD             EDGETD                  3780
+copperyard              MACH_COPPERYARD         COPPERYARD              3781
+edge                    MACH_EDGE               EDGE                    3782
+edge_u                  MACH_EDGE_U             EDGE_U                  3783
+edge_td                 MACH_EDGE_TD            EDGE_TD                 3784
+wdss                    MACH_WDSS               WDSS                    3785
+dl_pb25                 MACH_DL_PB25            DL_PB25                 3786
+dss11                   MACH_DSS11              DSS11                   3787
+cpa                     MACH_CPA                CPA                     3788
+aptp2000                MACH_APTP2000           APTP2000                3789
+marzen                  MACH_MARZEN             MARZEN                  3790
+st_turbine              MACH_ST_TURBINE         ST_TURBINE              3791
+gtl_it3300              MACH_GTL_IT3300         GTL_IT3300              3792
+mx6_mule                MACH_MX6_MULE           MX6_MULE                3793
+v7pxa_dt                MACH_V7PXA_DT           V7PXA_DT                3794
+v7mmp_dt                MACH_V7MMP_DT           V7MMP_DT                3795
+dragon7                 MACH_DRAGON7            DRAGON7                 3796
+krome                   MACH_KROME              KROME                   3797
+oratisdante             MACH_ORATISDANTE        ORATISDANTE             3798
+fathom                  MACH_FATHOM             FATHOM                  3799
+dns325                  MACH_DNS325             DNS325                  3800
+sarnen                  MACH_SARNEN             SARNEN                  3801
+ubisys_g1               MACH_UBISYS_G1          UBISYS_G1               3802
+mx53_pf1                MACH_MX53_PF1           MX53_PF1                3803
+asanti                  MACH_ASANTI             ASANTI                  3804
+volta                   MACH_VOLTA              VOLTA                   3805
+knight                  MACH_KNIGHT             KNIGHT                  3807
+beaglebone              MACH_BEAGLEBONE         BEAGLEBONE              3808
+becker                  MACH_BECKER             BECKER                  3809
+fc360                   MACH_FC360              FC360                   3810
+pmi2_xls                MACH_PMI2_XLS           PMI2_XLS                3811
+taranto                 MACH_TARANTO            TARANTO                 3812
+plutux                  MACH_PLUTUX             PLUTUX                  3813
+ipmp_medcom             MACH_IPMP_MEDCOM        IPMP_MEDCOM             3814
+absolut                 MACH_ABSOLUT            ABSOLUT                 3815
+awpb3                   MACH_AWPB3              AWPB3                   3816
+nfp32xx_dt              MACH_NFP32XX_DT         NFP32XX_DT              3817
+dl_pb53                 MACH_DL_PB53            DL_PB53                 3818
+acu_ii                  MACH_ACU_II             ACU_II                  3819
+avalon                  MACH_AVALON             AVALON                  3820
+sphinx                  MACH_SPHINX             SPHINX                  3821
+titan_t                 MACH_TITAN_T            TITAN_T                 3822
+harvest_boris           MACH_HARVEST_BORIS      HARVEST_BORIS           3823
+mach_msm7x30_m3s        MACH_MACH_MSM7X30_M3S   MACH_MSM7X30_M3S        3824
+smdk5250                MACH_SMDK5250           SMDK5250                3825
+imxt_lite               MACH_IMXT_LITE          IMXT_LITE               3826
+imxt_std                MACH_IMXT_STD           IMXT_STD                3827
+imxt_log                MACH_IMXT_LOG           IMXT_LOG                3828
+imxt_nav                MACH_IMXT_NAV           IMXT_NAV                3829
+imxt_full               MACH_IMXT_FULL          IMXT_FULL               3830
+ag09015                 MACH_AG09015            AG09015                 3831
+am3517_mt_ventoux       MACH_AM3517_MT_VENTOUX  AM3517_MT_VENTOUX       3832
+dp1arm9                 MACH_DP1ARM9            DP1ARM9                 3833
+picasso_m               MACH_PICASSO_M          PICASSO_M               3834
+video_gadget            MACH_VIDEO_GADGET       VIDEO_GADGET            3835
+mtt_om3x                MACH_MTT_OM3X           MTT_OM3X                3836
+mx6q_arm2               MACH_MX6Q_ARM2          MX6Q_ARM2               3837
+picosam9g45             MACH_PICOSAM9G45        PICOSAM9G45             3838
+vpm_dm365               MACH_VPM_DM365          VPM_DM365               3839
+bonfire                 MACH_BONFIRE            BONFIRE                 3840
+mt2p2d                  MACH_MT2P2D             MT2P2D                  3841
+sigpda01                MACH_SIGPDA01           SIGPDA01                3842
+cn27                    MACH_CN27               CN27                    3843
+mx25_cwtap              MACH_MX25_CWTAP         MX25_CWTAP              3844
+apf28                   MACH_APF28              APF28                   3845
+pelco_maxwell           MACH_PELCO_MAXWELL      PELCO_MAXWELL           3846
+ge_phoenix              MACH_GE_PHOENIX         GE_PHOENIX              3847
+empc_a500               MACH_EMPC_A500          EMPC_A500               3848
+ims_arm9                MACH_IMS_ARM9           IMS_ARM9                3849
+mini2416                MACH_MINI2416           MINI2416                3850
+mini2450                MACH_MINI2450           MINI2450                3851
+mini310                 MACH_MINI310            MINI310                 3852
+spear_hurricane         MACH_SPEAR_HURRICANE    SPEAR_HURRICANE         3853
+mt7208                  MACH_MT7208             MT7208                  3854
+lpc178x                 MACH_LPC178X            LPC178X                 3855
+farleys                 MACH_FARLEYS            FARLEYS                 3856
+efm32gg_dk3750          MACH_EFM32GG_DK3750     EFM32GG_DK3750          3857
+zeus_board              MACH_ZEUS_BOARD         ZEUS_BOARD              3858
+cc51                    MACH_CC51               CC51                    3859
+fxi_c210                MACH_FXI_C210           FXI_C210                3860
+msm8627_cdp             MACH_MSM8627_CDP        MSM8627_CDP             3861
+msm8627_mtp             MACH_MSM8627_MTP        MSM8627_MTP             3862
+armadillo800eva         MACH_ARMADILLO800EVA    ARMADILLO800EVA         3863
+primou                  MACH_PRIMOU             PRIMOU                  3864
+primoc                  MACH_PRIMOC             PRIMOC                  3865
+primoct                 MACH_PRIMOCT            PRIMOCT                 3866
+a9500                   MACH_A9500              A9500                   3867
+pluto                   MACH_PLUTO              PLUTO                   3869
+acfx100                 MACH_ACFX100            ACFX100                 3870
+msm8625_rumi3           MACH_MSM8625_RUMI3      MSM8625_RUMI3           3871
+valente                 MACH_VALENTE            VALENTE                 3872
+crfs_rfeye              MACH_CRFS_RFEYE         CRFS_RFEYE              3873
+rfeye                   MACH_RFEYE              RFEYE                   3874
+phidget_sbc3            MACH_PHIDGET_SBC3       PHIDGET_SBC3            3875
+tcw_mika                MACH_TCW_MIKA           TCW_MIKA                3876
+imx28_egf               MACH_IMX28_EGF          IMX28_EGF               3877
+valente_wx              MACH_VALENTE_WX         VALENTE_WX              3878
+huangshans              MACH_HUANGSHANS         HUANGSHANS              3879
+bosphorus1              MACH_BOSPHORUS1         BOSPHORUS1              3880
+prima                   MACH_PRIMA              PRIMA                   3881
+evita_ulk               MACH_EVITA_ULK          EVITA_ULK               3884
+merisc600               MACH_MERISC600          MERISC600               3885
+dolak                   MACH_DOLAK              DOLAK                   3886
+sbc53                   MACH_SBC53              SBC53                   3887
+elite_ulk               MACH_ELITE_ULK          ELITE_ULK               3888
+pov2                    MACH_POV2               POV2                    3889
+ipod_touch_2g           MACH_IPOD_TOUCH_2G      IPOD_TOUCH_2G           3890
+da850_pqab              MACH_DA850_PQAB         DA850_PQAB              3891