414 files changed, 9996 insertions, 5625 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9722f8bb506c..4546f8b2ce8c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -201,6 +201,7 @@ choice
 
 config ARCH_AAEC2000
         bool "Agilent AAEC-2000 based"
+        select CPU_ARM920T
         select ARM_AMBA
         select HAVE_CLK
         help
@@ -210,6 +211,7 @@ config ARCH_INTEGRATOR
         bool "ARM Ltd. Integrator family"
         select ARM_AMBA
         select HAVE_CLK
+        select COMMON_CLKDEV
         select ICST525
         help
           Support for ARM's Integrator platform.
@@ -218,6 +220,7 @@ config ARCH_REALVIEW
         bool "ARM Ltd. RealView family"
         select ARM_AMBA
         select HAVE_CLK
+        select COMMON_CLKDEV
         select ICST307
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
@@ -229,6 +232,7 @@ config ARCH_VERSATILE
         select ARM_AMBA
         select ARM_VIC
         select HAVE_CLK
+        select COMMON_CLKDEV
         select ICST307
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
@@ -243,22 +247,15 @@ config ARCH_AT91
           This enables support for systems based on the Atmel AT91RM9200,
           AT91SAM9 and AT91CAP9 processors.
 
-config ARCH_CLPS7500
-        bool "Cirrus CL-PS7500FE"
-        select TIMER_ACORN
-        select ISA
-        select NO_IOPORT
-        select ARCH_SPARSEMEM_ENABLE
-        help
-          Support for the Cirrus Logic PS7500FE system-on-a-chip.
-
 config ARCH_CLPS711X
         bool "Cirrus Logic CLPS711x/EP721x-based"
+        select CPU_ARM720T
         help
           Support for Cirrus Logic 711x/721x based boards.
 
 config ARCH_EBSA110
         bool "EBSA-110"
+        select CPU_SA110
         select ISA
         select NO_IOPORT
         help
@@ -269,16 +266,19 @@ config ARCH_EBSA110
 
 config ARCH_EP93XX
         bool "EP93xx-based"
+        select CPU_ARM920T
         select ARM_AMBA
         select ARM_VIC
         select GENERIC_GPIO
         select HAVE_CLK
+        select COMMON_CLKDEV
         select ARCH_REQUIRE_GPIOLIB
         help
           This enables support for the Cirrus EP93xx series of CPUs.
 
 config ARCH_FOOTBRIDGE
         bool "FootBridge"
+        select CPU_SA110
         select FOOTBRIDGE
         help
           Support for systems based on the DC21285 companion chip
@@ -286,18 +286,21 @@ config ARCH_FOOTBRIDGE
 
 config ARCH_NETX
         bool "Hilscher NetX based"
+        select CPU_ARM926T
         select ARM_VIC
         help
           This enables support for systems based on the Hilscher NetX Soc
 
 config ARCH_H720X
         bool "Hynix HMS720x-based"
+        select CPU_ARM720T
         select ISA_DMA_API
         help
           This enables support for systems based on the Hynix HMS720x
 
 config ARCH_IMX
         bool "IMX"
+        select CPU_ARM920T
         select GENERIC_GPIO
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
@@ -307,6 +310,7 @@ config ARCH_IMX
 config ARCH_IOP13XX
         bool "IOP13xx-based"
         depends on MMU
+        select CPU_XSC3
         select PLAT_IOP
         select PCI
         select ARCH_SUPPORTS_MSI
@@ -317,6 +321,7 @@ config ARCH_IOP13XX
 config ARCH_IOP32X
         bool "IOP32x-based"
         depends on MMU
+        select CPU_XSCALE
         select PLAT_IOP
         select PCI
         select GENERIC_GPIO
@@ -328,6 +333,7 @@ config ARCH_IOP32X
 config ARCH_IOP33X
         bool "IOP33x-based"
         depends on MMU
+        select CPU_XSCALE
         select PLAT_IOP
         select PCI
         select GENERIC_GPIO
@@ -338,6 +344,7 @@ config ARCH_IOP33X
 config ARCH_IXP23XX
         bool "IXP23XX-based"
         depends on MMU
+        select CPU_XSC3
         select PCI
         help
           Support for Intel's IXP23xx (XScale) family of processors.
@@ -345,6 +352,7 @@ config ARCH_IXP23XX
 config ARCH_IXP2000
         bool "IXP2400/2800-based"
         depends on MMU
+        select CPU_XSCALE
         select PCI
         help
           Support for Intel's IXP2400/2800 (XScale) family of processors.
@@ -352,6 +360,7 @@ config ARCH_IXP2000
 config ARCH_IXP4XX
         bool "IXP4xx-based"
         depends on MMU
+        select CPU_XSCALE
         select GENERIC_GPIO
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
@@ -361,6 +370,7 @@ config ARCH_IXP4XX
 
 config ARCH_L7200
         bool "LinkUp-L7200"
+        select CPU_ARM720T
         select FIQ
         help
           Say Y here if you intend to run this kernel on a LinkUp Systems
@@ -374,6 +384,7 @@ config ARCH_L7200
 
 config ARCH_KIRKWOOD
         bool "Marvell Kirkwood"
+        select CPU_FEROCEON
         select PCI
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
@@ -384,6 +395,7 @@ config ARCH_KIRKWOOD
 
 config ARCH_KS8695
         bool "Micrel/Kendin KS8695"
+        select CPU_ARM922T
         select GENERIC_GPIO
         help
           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
@@ -391,6 +403,7 @@ config ARCH_KS8695
 
 config ARCH_NS9XXX
         bool "NetSilicon NS9xxx"
+        select CPU_ARM926T
         select GENERIC_GPIO
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
@@ -403,6 +416,7 @@ config ARCH_NS9XXX
 
 config ARCH_LOKI
         bool "Marvell Loki (88RC8480)"
+        select CPU_FEROCEON
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
         select PLAT_ORION
@@ -411,6 +425,7 @@ config ARCH_LOKI
 
 config ARCH_MV78XX0
         bool "Marvell MV78xx0"
+        select CPU_FEROCEON
         select PCI
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
@@ -432,6 +447,7 @@ config ARCH_MXC
 config ARCH_ORION5X
         bool "Marvell Orion"
         depends on MMU
+        select CPU_FEROCEON
         select PCI
         select GENERIC_GPIO
         select GENERIC_TIME
@@ -444,6 +460,7 @@ config ARCH_ORION5X
 
 config ARCH_PNX4008
         bool "Philips Nexperia PNX4008 Mobile"
+        select CPU_ARM926T
         select HAVE_CLK
         help
           This enables support for Philips PNX4008 mobile platform.
@@ -454,6 +471,7 @@ config ARCH_PXA
         select ARCH_MTD_XIP
         select GENERIC_GPIO
         select HAVE_CLK
+        select COMMON_CLKDEV
         select ARCH_REQUIRE_GPIOLIB
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
@@ -477,6 +495,7 @@ config ARCH_RPC
 
 config ARCH_SA1100
         bool "SA1100-based"
+        select CPU_SA1100
         select ISA
         select ARCH_SPARSEMEM_ENABLE
         select ARCH_MTD_XIP
@@ -500,6 +519,7 @@ config ARCH_S3C2410
 
 config ARCH_SHARK
         bool "Shark"
+        select CPU_SA110
         select ISA
         select ISA_DMA
         select ZONE_DMA
@@ -510,6 +530,7 @@ config ARCH_SHARK
 
 config ARCH_LH7A40X
         bool "Sharp LH7A40X"
+        select CPU_ARM922T
         select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM
         select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
         help
@@ -520,6 +541,7 @@ config ARCH_LH7A40X
 
 config ARCH_DAVINCI
         bool "TI DaVinci"
+        select CPU_ARM926T
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
         select GENERIC_GPIO
@@ -541,6 +563,7 @@ config ARCH_OMAP
 
 config ARCH_MSM
         bool "Qualcomm MSM"
+        select CPU_V6
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
         help
@@ -549,6 +572,13 @@ config ARCH_MSM
           interface to the ARM9 modem processor which runs the baseband stack
           and controls some vital subsystems (clock and power control, etc).
 
+config ARCH_W90X900
+        bool "Nuvoton W90X900 CPU"
+        select CPU_ARM926T
+        help
+                Support for Nuvoton (Winbond logic dept.) ARM9 processor,You
+                can login www.mcuos.com or www.nuvoton.com to know more.
+
 endchoice
 
 source "arch/arm/mach-clps711x/Kconfig"
@@ -627,6 +657,8 @@ source "arch/arm/mach-ks8695/Kconfig"
 
 source "arch/arm/mach-msm/Kconfig"
 
+source "arch/arm/mach-w90x900/Kconfig"
+
 # Definitions to make life easier
 config ARCH_ACORN
         bool
@@ -781,7 +813,7 @@ config HOTPLUG_CPU
 
 config LOCAL_TIMERS
         bool "Use local timer interrupts"
-        depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP)
+        depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || REALVIEW_EB_A9MP)
         default y
         help
           Enable support for local timers on SMP platforms, rather then the
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 384f6b16bfd8..260864f3f010 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -97,7 +97,6 @@ textofs-y	:= 0x00008000
 
  machine-$(CONFIG_ARCH_RPC)        := rpc
  machine-$(CONFIG_ARCH_EBSA110)    := ebsa110
- machine-$(CONFIG_ARCH_CLPS7500)   := clps7500
  machine-$(CONFIG_FOOTBRIDGE)      := footbridge
  machine-$(CONFIG_ARCH_SHARK)      := shark
  machine-$(CONFIG_ARCH_SA1100)     := sa1100
@@ -145,6 +144,7 @@ endif
  machine-$(CONFIG_ARCH_MSM)        := msm
  machine-$(CONFIG_ARCH_LOKI)       := loki
  machine-$(CONFIG_ARCH_MV78XX0)    := mv78xx0
+ machine-$(CONFIG_ARCH_W90X900)    := w90x900
 
 ifeq ($(CONFIG_ARCH_EBSA110),y)
 # This is what happens if you forget the IOCS16 line.
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index c47f2a3f8f8f..fbe5eef1f6c9 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -23,10 +23,6 @@ ifeq ($(CONFIG_ARCH_L7200),y)
 OBJS            += head-l7200.o
 endif
 
-ifeq ($(CONFIG_ARCH_CLPS7500),y)
-HEAD            = head-clps7500.o
-endif
-
 ifeq ($(CONFIG_ARCH_P720T),y)
 # Borrow this code from SA1100
 OBJS            += head-sa1100.o
diff --git a/arch/arm/boot/compressed/head-clps7500.S b/arch/arm/boot/compressed/head-clps7500.S
deleted file mode 100644
index 4f3c78ac30a0..000000000000
--- a/arch/arm/boot/compressed/head-clps7500.S
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * linux/arch/arm/boot/compressed/head-clps7500.S
- *
- * Copyright (C) 1999, 2000, 2001 Nexus Electronics Ltd
- */
-
-
-                /* There are three different ways the kernel can be
-                   booted on a 7500 system: from Angel (loaded in RAM), from
-                   16-bit ROM or from 32-bit Flash.  Luckily, a single kernel
-                   image does for them all. */
-                /* This branch is taken if the CPU memory width matches the
-                   actual device in use.  The default at power on is 16 bits
-                   so we must be prepared for a mismatch. */
-                .section ".start", "ax"
-2:
-                b       1f
-                .word   0xffff
-                .word   0xb632          @ mov r11, #0x03200000
-                .word   0xe3a0
-                .word   0x0000          @ mov r0, #0
-                .word   0xe3a0
-                .word   0x0080          @ strb r0, [r11, #0x80]
-                .word   0xe5cb
-                .word   0xf000          @ mov pc, #0
-                .word   0xe3a0
-1:
-                adr     r1, 2b
-                teq     r1, #0
-                bne     .Langel
-                /* This is a direct-from-ROM boot.  Copy the kernel into 
-                   RAM and run it there. */
-                mov     r0, #0x30
-                mcr     p15, 0, r0, c1, c0, 0
-                mov     r0, #0x13
-                msr     cpsr_cxsf, r0
-                mov     r12, #0x03000000        @ point to LEDs
-                orr     r12, r12, #0x00020000
-                orr     r12, r12, #0xba00
-                mov     r0, #0x5500
-                str     r0, [r12]
-                mov     r0, #0x10000000
-                orr     r0, r0, #0x8000
-                mov     r4, r0
-                ldr     r2, =_end
-2:
-                ldr     r3, [r1], #4
-                str     r3, [r0], #4
-                teq     r0, r2
-                bne     2b
-                mov     r0, #0xff00
-                str     r0, [r12]
-1:      
-                mov     r12, #0x03000000        @ point to LEDs
-                orr     r12, r12, #0x00020000
-                orr     r12, r12, #0xba00
-                mov     r0, #0xfe00
-                str     r0, [r12]
-
-                adr     lr, 1f
-                mov     r0, #0
-                mov     r1, #14         /* MACH_TYPE_CLPS7500 */
-                mov     pc, lr
-.Langel:
-#ifdef CONFIG_ANGELBOOT
-                /* Call Angel to switch into SVC mode. */
-                mov     r0, #0x17
-                swi     0x123456
-#endif
-                /* Ensure all interrupts are off and MMU disabled */
-                mrs     r0, cpsr
-                orr     r0, r0, #0xc0
-                msr     cpsr_cxsf, r0
-
-                adr     lr, 1b
-                orr     lr, lr, #0x10000000
-                mov     r0, #0x30               @ MMU off
-                mcr     p15, 0, r0, c1, c0, 0
-                mov     r0, r0
-                mov     pc, lr
-
-                .ltorg
-
-1:
-/* And the rest */
-#include "head.S"
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 84a1e0496a3c..77d614232d81 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -624,6 +624,12 @@ proc_types:
                 b       __armv4_mmu_cache_off
                 b       __armv4_mmu_cache_flush
 
+                .word   0x56056930
+                .word   0xff0ffff0              @ PXA935
+                b       __armv4_mmu_cache_on
+                b       __armv4_mmu_cache_off
+                b       __armv4_mmu_cache_flush
+
                 .word   0x56050000              @ Feroceon
                 .word   0xff0f0000
                 b       __armv4_mmu_cache_on
@@ -717,6 +723,9 @@ __armv7_mmu_cache_off:
                 bl      __armv7_mmu_cache_flush
                 mov     r0, #0
                 mcr     p15, 0, r0, c8, c7, 0   @ invalidate whole TLB
+                mcr     p15, 0, r0, c7, c5, 6   @ invalidate BTC
+                mcr     p15, 0, r0, c7, c10, 4  @ DSB
+                mcr     p15, 0, r0, c7, c5, 4   @ ISB
                 mov     pc, r12
 
 __arm6_mmu_cache_off:
@@ -778,12 +787,13 @@ __armv6_mmu_cache_flush:
 __armv7_mmu_cache_flush:
                 mrc     p15, 0, r10, c0, c1, 5  @ read ID_MMFR1
                 tst     r10, #0xf << 16         @ hierarchical cache (ARMv7)
-                beq     hierarchical
                 mov     r10, #0
+                beq     hierarchical
                 mcr     p15, 0, r10, c7, c14, 0 @ clean+invalidate D
                 b       iflush
 hierarchical:
-                stmfd   sp!, {r0-r5, r7, r9-r11}
+                mcr     p15, 0, r10, c7, c10, 5 @ DMB
+                stmfd   sp!, {r0-r5, r7, r9, r11}
                 mrc     p15, 1, r0, c0, c0, 1   @ read clidr
                 ands    r3, r0, #0x7000000      @ extract loc from clidr
                 mov     r3, r3, lsr #23         @ left align loc bit field
@@ -820,12 +830,14 @@ skip:
                 cmp     r3, r10
                 bgt     loop1
 finished:
+                ldmfd   sp!, {r0-r5, r7, r9, r11}
                 mov     r10, #0                 @ swith back to cache level 0
                 mcr     p15, 2, r10, c0, c0, 0  @ select current cache level in cssr
-                ldmfd   sp!, {r0-r5, r7, r9-r11}
 iflush:
+                mcr     p15, 0, r10, c7, c10, 4 @ DSB
                 mcr     p15, 0, r10, c7, c5, 0  @ invalidate I+BTB
-                mcr     p15, 0, r10, c7, c10, 4 @ drain WB
+                mcr     p15, 0, r10, c7, c10, 4 @ DSB
+                mcr     p15, 0, r10, c7, c5, 4  @ ISB
                 mov     pc, lr
 
 __armv5tej_mmu_cache_flush:
diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c
index 65ce8fff29db..3fc08413fff0 100644
--- a/arch/arm/boot/compressed/misc.c
+++ b/arch/arm/boot/compressed/misc.c
@@ -86,6 +86,8 @@ static void putstr(const char *ptr)
 
 #define __ptr_t void *
 
+#define memzero(s,n) __memzero(s,n)
+
 /*
  * Optimised C version of memzero for the ARM.
  */
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 86b5e6982660..a2cd9beaf37d 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -33,3 +33,6 @@ config SHARPSL_PM
 
 config SHARP_SCOOP
         bool
+
+config COMMON_CLKDEV
+        bool
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index 325e4b6a6afb..7cb7961d81cb 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -17,3 +17,4 @@ obj-$(CONFIG_SHARP_SCOOP)	+= scoop.o
 obj-$(CONFIG_ARCH_IXP2000)      += uengine.o
 obj-$(CONFIG_ARCH_IXP23XX)      += uengine.o
 obj-$(CONFIG_PCI_HOST_ITE8152)  += it8152.o
+obj-$(CONFIG_COMMON_CLKDEV)     += clkdev.o
diff --git a/arch/arm/common/clkdev.c b/arch/arm/common/clkdev.c
new file mode 100644
index 000000000000..17a17b49a45b
--- /dev/null
+++ b/arch/arm/common/clkdev.c
@@ -0,0 +1,128 @@
+/*
+ *  arch/arm/common/clkdev.c
+ *
+ *  Copyright (C) 2008 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Helper for the clk API to assist looking up a struct clk.
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/string.h>
+#include <linux/mutex.h>
+
+#include <asm/clkdev.h>
+#include <mach/clkdev.h>
+
+static LIST_HEAD(clocks);
+static DEFINE_MUTEX(clocks_mutex);
+
+static struct clk *clk_find(const char *dev_id, const char *con_id)
+{
+        struct clk_lookup *p;
+        struct clk *clk = NULL;
+        int match, best = 0;
+
+        list_for_each_entry(p, &clocks, node) {
+                if ((p->dev_id && !dev_id) || (p->con_id && !con_id))
+                        continue;
+                match = 0;
+                if (p->dev_id)
+                        match += 2 * (strcmp(p->dev_id, dev_id) == 0);
+                if (p->con_id)
+                        match += 1 * (strcmp(p->con_id, con_id) == 0);
+                if (match == 0)
+                        continue;
+
+                if (match > best) {
+                        clk = p->clk;
+                        best = match;
+                }
+        }
+        return clk;
+}
+
+struct clk *clk_get(struct device *dev, const char *con_id)
+{
+        const char *dev_id = dev ? dev_name(dev) : NULL;
+        struct clk *clk;
+
+        mutex_lock(&clocks_mutex);
+        clk = clk_find(dev_id, con_id);
+        if (clk && !__clk_get(clk))
+                clk = NULL;
+        mutex_unlock(&clocks_mutex);
+
+        return clk ? clk : ERR_PTR(-ENOENT);
+}
+EXPORT_SYMBOL(clk_get);
+
+void clk_put(struct clk *clk)
+{
+        __clk_put(clk);
+}
+EXPORT_SYMBOL(clk_put);
+
+void clkdev_add(struct clk_lookup *cl)
+{
+        mutex_lock(&clocks_mutex);
+        list_add_tail(&cl->node, &clocks);
+        mutex_unlock(&clocks_mutex);
+}
+EXPORT_SYMBOL(clkdev_add);
+
+#define MAX_DEV_ID      20
+#define MAX_CON_ID      16
+
+struct clk_lookup_alloc {
+        struct clk_lookup cl;
+        char    dev_id[MAX_DEV_ID];
+        char    con_id[MAX_CON_ID];
+};
+
+struct clk_lookup *clkdev_alloc(struct clk *clk, const char *con_id,
+        const char *dev_fmt, ...)
+{
+        struct clk_lookup_alloc *cla;
+
+        cla = kzalloc(sizeof(*cla), GFP_KERNEL);
+        if (!cla)
+                return NULL;
+
+        cla->cl.clk = clk;
+        if (con_id) {
+                strlcpy(cla->con_id, con_id, sizeof(cla->con_id));
+                cla->cl.con_id = cla->con_id;
+        }
+
+        if (dev_fmt) {
+                va_list ap;
+
+                va_start(ap, dev_fmt);
+                vscnprintf(cla->dev_id, sizeof(cla->dev_id), dev_fmt, ap);
+                cla->cl.dev_id = cla->dev_id;
+                va_end(ap);
+        }
+
+        return &cla->cl;
+}
+EXPORT_SYMBOL(clkdev_alloc);
+
+/*
+ * clkdev_drop - remove a clock dynamically allocated
+ */
+void clkdev_drop(struct clk_lookup *cl)
+{
+        mutex_lock(&clocks_mutex);
+        list_del(&cl->node);
+        mutex_unlock(&clocks_mutex);
+        kfree(cl);
+}
+EXPORT_SYMBOL(clkdev_drop);
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index 7c6b4b99a2df..2293f0ce061e 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -1108,6 +1108,7 @@ void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf)
         locomo_writel(bpwf | LOCOMO_ALC_EN, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALS);
         spin_unlock_irqrestore(&lchip->lock, flags);
 }
+EXPORT_SYMBOL(locomo_frontlight_set);
 
 /*
  *      LoCoMo "Register Access Bus."
diff --git a/arch/arm/configs/h5000_defconfig b/arch/arm/configs/h5000_defconfig
new file mode 100644
index 000000000000..649baa370495
--- /dev/null
+++ b/arch/arm/configs/h5000_defconfig
@@ -0,0 +1,996 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.27-rc6
+# Tue Sep 16 16:13:48 2008
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_SUPPORTS_AOUT=y
+CONFIG_ZONE_DMA=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+# CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+# CONFIG_UID16 is not set
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
+# CONFIG_HAVE_IOREMAP_PROT is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_ARCH_TRACEHOOK is not set
+# CONFIG_HAVE_DMA_ATTRS is not set
+# CONFIG_USE_GENERIC_SMP_HELPERS is not set
+CONFIG_HAVE_CLK=y
+# CONFIG_PROC_PAGE_MONITOR is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_CLASSIC_RCU=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM7X00A is not set
+
+#
+# Intel PXA2xx/PXA3xx Implementations
+#
+# CONFIG_ARCH_GUMSTIX is not set
+# CONFIG_ARCH_LUBBOCK is not set
+# CONFIG_MACH_LOGICPD_PXA270 is not set
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_PXA_SHARPSL is not set
+# CONFIG_ARCH_PXA_ESERIES is not set
+CONFIG_MACH_H5000=y
+# CONFIG_MACH_TRIZEPS4 is not set
+# CONFIG_MACH_EM_X270 is not set
+# CONFIG_MACH_COLIBRI is not set
+# CONFIG_MACH_ZYLONITE is not set
+# CONFIG_MACH_LITTLETON is not set
+# CONFIG_MACH_TAVOREVB is not set
+# CONFIG_MACH_SAAR is not set
+# CONFIG_MACH_ARMCORE is not set
+# CONFIG_MACH_MAGICIAN is not set
+# CONFIG_MACH_PCM027 is not set
+# CONFIG_ARCH_PXA_PALM is not set
+# CONFIG_PXA_EZX is not set
+CONFIG_PXA25x=y
+# CONFIG_PXA_PWM is not set
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSCALE=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_OUTER_CACHE is not set
+# CONFIG_IWMMXT is not set
+CONFIG_XSCALE_PMU=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="keepinitrd"
+# CONFIG_XIP_KERNEL is not set
+CONFIG_KEXEC=y
+CONFIG_ATAGS_PROC=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_APM_EMULATION=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+# CONFIG_MTD_CHAR is not set
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_XIP is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x8000000
+CONFIG_MTD_PHYSMAP_LEN=0x0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PXA2XX is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_SHARP_SL is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_NETDEVICES is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+# CONFIG_INPUT_APMPOWER is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=32
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+CONFIG_USB_GADGET_PXA25X=y
+CONFIG_USB_PXA25X=y
+CONFIG_USB_PXA25X_SMALL=y
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_DUALSPEED is not set
+# CONFIG_USB_ZERO is not set
+CONFIG_USB_ETH=y
+# CONFIG_USB_ETH_RNDIS is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_SA1100=y
+# CONFIG_DMADEVICES is not set
+
+#
+# Voltage and Current regulators
+#
+# CONFIG_REGULATOR is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_JFFS2_CMODE_NONE is not set
+CONFIG_JFFS2_CMODE_PRIORITY=y
+# CONFIG_JFFS2_CMODE_SIZE is not set
+# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+# CONFIG_FTRACE is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_LZO is not set
+# CONFIG_CRYPTO_HW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_GENERIC_FIND_NEXT_BIT is not set
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/neocore926_defconfig b/arch/arm/configs/neocore926_defconfig
new file mode 100644
index 000000000000..325f1e105f69
--- /dev/null
+++ b/arch/arm/configs/neocore926_defconfig
@@ -0,0 +1,1302 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.27-rc1
+# Tue Jul 29 10:46:54 2008
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_SUPPORTS_AOUT=y
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
+# CONFIG_HAVE_IOREMAP_PROT is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_ARCH_TRACEHOOK is not set
+# CONFIG_HAVE_DMA_ATTRS is not set
+# CONFIG_USE_GENERIC_SMP_HELPERS is not set
+CONFIG_HAVE_CLK=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+CONFIG_CLASSIC_RCU=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+CONFIG_ARCH_AT91=y
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM7X00A is not set
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
+
+#
+# Atmel AT91 System-on-Chip
+#
+# CONFIG_ARCH_AT91RM9200 is not set
+# CONFIG_ARCH_AT91SAM9260 is not set
+# CONFIG_ARCH_AT91SAM9261 is not set
+CONFIG_ARCH_AT91SAM9263=y
+# CONFIG_ARCH_AT91SAM9RL is not set
+# CONFIG_ARCH_AT91SAM9G20 is not set
+# CONFIG_ARCH_AT91CAP9 is not set
+# CONFIG_ARCH_AT91X40 is not set
+CONFIG_AT91_PMC_UNIT=y
+
+#
+# AT91SAM9263 Board Type
+#
+# CONFIG_MACH_AT91SAM9263EK is not set
+# CONFIG_MACH_USB_A9263 is not set
+CONFIG_MACH_NEOCORE926=y
+
+#
+# AT91 Board Options
+#
+CONFIG_MTD_AT91_DATAFLASH_CARD=y
+
+#
+# AT91 Feature Selections
+#
+# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
+CONFIG_AT91_TIMER_HZ=100
+CONFIG_AT91_EARLY_DBGU=y
+# CONFIG_AT91_EARLY_USART0 is not set
+# CONFIG_AT91_EARLY_USART1 is not set
+# CONFIG_AT91_EARLY_USART2 is not set
+# CONFIG_AT91_EARLY_USART3 is not set
+# CONFIG_AT91_EARLY_USART4 is not set
+# CONFIG_AT91_EARLY_USART5 is not set
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_ARM926T=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5TJ=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+# CONFIG_OUTER_CACHE is not set
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_TICK_ONESHOT is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+# CONFIG_AEABI is not set
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_LEDS is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_ARTHUR is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_NET_KEY=y
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPIP=y
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=y
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+CONFIG_NFTL=y
+CONFIG_NFTL_RW=y
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+CONFIG_MTD_BLOCK2MTD=y
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_VERIFY_WRITE=y
+CONFIG_MTD_NAND_ECC_SMC=y
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+CONFIG_MTD_NAND_ATMEL=y
+CONFIG_MTD_NAND_ATMEL_ECC_HW=y
+# CONFIG_MTD_NAND_ATMEL_ECC_SOFT is not set
+# CONFIG_MTD_NAND_ATMEL_ECC_NONE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+CONFIG_MTD_NAND_PLATFORM=y
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_NBD=y
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+CONFIG_ATMEL_PWM=y
+CONFIG_ATMEL_TCLIB=y
+CONFIG_ATMEL_TCB_CLKSRC=y
+CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ATMEL_SSC is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+# CONFIG_BLK_DEV_SD is not set
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+CONFIG_SMSC_PHY=y
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_MACB=y
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_GPIO is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_GPIO is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ADS7846=y
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_UCB1400 is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_NONSTANDARD=y
+# CONFIG_N_HDLC is not set
+# CONFIG_RISCOM8 is not set
+# CONFIG_SPECIALIX is not set
+# CONFIG_RIO is not set
+# CONFIG_STALDRV is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+# CONFIG_SERIAL_ATMEL_PDC is not set
+# CONFIG_SERIAL_ATMEL_TTYAT is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_AT24 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_ATMEL=y
+# CONFIG_SPI_BITBANG is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_ATMEL=y
+# CONFIG_FB_VIRTUAL is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+# CONFIG_LCD_LTV350QV is not set
+# CONFIG_LCD_ILI9320 is not set
+# CONFIG_LCD_VGG2432A4 is not set
+# CONFIG_LCD_PLATFORM is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_ATMEL_LCDC=y
+# CONFIG_BACKLIGHT_ATMEL_PWM is not set
+# CONFIG_BACKLIGHT_CORGI is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+CONFIG_HID_DEBUG=y
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
+# CONFIG_HID_FF is not set
+# CONFIG_USB_HIDDEV is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+CONFIG_USB_MON=y
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_GADGET is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+CONFIG_SDIO_UART=y
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+CONFIG_MMC_AT91=y
+# CONFIG_MMC_SPI is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+CONFIG_JFFS2_FS_WBUF_VERIFY=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_FRAME_POINTER=y
+# CONFIG_LATENCYTOP is not set
+CONFIG_HAVE_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+# CONFIG_FTRACE is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_DEBUG_USER is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+# CONFIG_CRYPTO_HW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_GENERIC_FIND_NEXT_BIT is not set
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/realview-smp_defconfig b/arch/arm/configs/realview-smp_defconfig
index 0c09b23167ec..cd29824d791c 100644
--- a/arch/arm/configs/realview-smp_defconfig
+++ b/arch/arm/configs/realview-smp_defconfig
@@ -1,84 +1,111 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.19-rc3
-# Wed Oct 25 14:12:00 2006
+# Linux kernel version: 2.6.28-rc2
+# Mon Nov 10 14:41:47 2008
 #
 CONFIG_ARM=y
-# CONFIG_GENERIC_TIME is not set
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+# CONFIG_GENERIC_GPIO is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
 CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
 CONFIG_TRACE_IRQFLAGS_SUPPORT=y
 CONFIG_HARDIRQS_SW_RESEND=y
 CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 
 #
-# Code maturity level options
+# General setup
 #
 CONFIG_EXPERIMENTAL=y
 CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
-# CONFIG_IPC_NS is not set
+CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
-# CONFIG_UTS_NS is not set
 # CONFIG_AUDIT is not set
 # CONFIG_IKCONFIG is not set
-# CONFIG_CPUSETS is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_RELAY is not set
-CONFIG_INITRAMFS_SOURCE=""
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_BLK_DEV_INITRD is not set
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
 # CONFIG_EMBEDDED is not set
 CONFIG_UID16=y
-# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
-CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
-CONFIG_SLAB=y
+CONFIG_AIO=y
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_USE_GENERIC_SMP_HELPERS=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
 # CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
-# CONFIG_SLOB is not set
-
-#
-# Loadable module support
-#
 CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-# CONFIG_KMOD is not set
+CONFIG_KMOD=y
 CONFIG_STOP_MACHINE=y
-
-#
-# Block layer
-#
 CONFIG_BLOCK=y
+# CONFIG_LBD is not set
 # CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
 
 #
 # IO Schedulers
@@ -92,6 +119,8 @@ CONFIG_DEFAULT_DEADLINE=y
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="deadline"
+CONFIG_CLASSIC_RCU=y
+# CONFIG_FREEZER is not set
 
 #
 # System Type
@@ -103,19 +132,26 @@ CONFIG_ARCH_REALVIEW=y
 # CONFIG_ARCH_AT91 is not set
 # CONFIG_ARCH_CLPS7500 is not set
 # CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
 # CONFIG_ARCH_EBSA110 is not set
 # CONFIG_ARCH_EP93XX is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
 # CONFIG_ARCH_NETX is not set
 # CONFIG_ARCH_H720X is not set
 # CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
 # CONFIG_ARCH_IOP32X is not set
 # CONFIG_ARCH_IOP33X is not set
-# CONFIG_ARCH_IXP4XX is not set
-# CONFIG_ARCH_IXP2000 is not set
 # CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
 # CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
 # CONFIG_ARCH_RPC is not set
@@ -123,13 +159,29 @@ CONFIG_ARCH_REALVIEW=y
 # CONFIG_ARCH_S3C2410 is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM is not set
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
 
 #
 # RealView platform type
 #
 CONFIG_MACH_REALVIEW_EB=y
-CONFIG_REALVIEW_MPCORE=y
+# CONFIG_REALVIEW_EB_A9MP is not set
+CONFIG_REALVIEW_EB_ARM11MP=y
+# CONFIG_REALVIEW_EB_ARM11MP_REVB is not set
+CONFIG_MACH_REALVIEW_PB11MP=y
+# CONFIG_MACH_REALVIEW_PB1176 is not set
+# CONFIG_MACH_REALVIEW_PBA8 is not set
+CONFIG_REALVIEW_HIGH_PHYS_OFFSET=y
 
 #
 # Processor Type
@@ -138,12 +190,15 @@ CONFIG_CPU_32=y
 # CONFIG_CPU_ARM926T is not set
 CONFIG_CPU_V6=y
 CONFIG_CPU_32v6K=y
+# CONFIG_CPU_V7 is not set
 CONFIG_CPU_32v6=y
 CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_NOIFAR=y
 CONFIG_CPU_CACHE_V6=y
 CONFIG_CPU_CACHE_VIPT=y
 CONFIG_CPU_COPY_V6=y
 CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
 CONFIG_CPU_CP15=y
 CONFIG_CPU_CP15_MMU=y
 
@@ -153,9 +208,10 @@ CONFIG_CPU_CP15_MMU=y
 CONFIG_ARM_THUMB=y
 # CONFIG_CPU_ICACHE_DISABLE is not set
 # CONFIG_CPU_DCACHE_DISABLE is not set
-# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
 # CONFIG_CPU_BPREDICT_DISABLE is not set
 CONFIG_HAS_TLS_REG=y
+CONFIG_OUTER_CACHE=y
+CONFIG_CACHE_L2X0=y
 CONFIG_ARM_GIC=y
 CONFIG_ICST307=y
 
@@ -163,32 +219,44 @@ CONFIG_ICST307=y
 # Bus support
 #
 CONFIG_ARM_AMBA=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
 # CONFIG_PCCARD is not set
 
 #
 # Kernel Features
 #
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
 CONFIG_SMP=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
 CONFIG_NR_CPUS=4
 CONFIG_HOTPLUG_CPU=y
 CONFIG_LOCAL_TIMERS=y
 # CONFIG_PREEMPT is not set
 CONFIG_HZ=100
-# CONFIG_AEABI is not set
-# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
 # CONFIG_DISCONTIGMEM_MANUAL is not set
 # CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
 CONFIG_ALIGNMENT_TRAP=y
 
 #
@@ -198,6 +266,12 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CMDLINE="root=/dev/nfs nfsroot=10.1.69.3:/work/nfsroot ip=dhcp console=ttyAMA0 mem=128M"
 # CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
 
 #
 # Floating point emulation
@@ -206,8 +280,7 @@ CONFIG_CMDLINE="root=/dev/nfs nfsroot=10.1.69.3:/work/nfsroot ip=dhcp console=tt
 #
 # At least one emulation must be selected
 #
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_NWFPE is not set
 # CONFIG_FPE_FASTFPE is not set
 CONFIG_VFP=y
 
@@ -215,28 +288,29 @@ CONFIG_VFP=y
 # Userspace binary formats
 #
 CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
 # CONFIG_BINFMT_AOUT is not set
 # CONFIG_BINFMT_MISC is not set
-# CONFIG_ARTHUR is not set
 
 #
 # Power management options
 #
 # CONFIG_PM is not set
-# CONFIG_APM is not set
-
-#
-# Networking
-#
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
 #
 # Networking options
 #
-# CONFIG_NETDEBUG is not set
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -255,36 +329,25 @@ CONFIG_IP_PNP_BOOTP=y
 # CONFIG_INET_IPCOMP is not set
 # CONFIG_INET_XFRM_TUNNEL is not set
 # CONFIG_INET_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
 CONFIG_INET_DIAG=y
 CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
 # CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
 # CONFIG_NETWORK_SECMARK is not set
 # CONFIG_NETFILTER is not set
-
-#
-# DCCP Configuration (EXPERIMENTAL)
-#
 # CONFIG_IP_DCCP is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
 # CONFIG_IP_SCTP is not set
-
-#
-# TIPC Configuration (EXPERIMENTAL)
-#
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
 # CONFIG_VLAN_8021Q is not set
 # CONFIG_DECNET is not set
 # CONFIG_LLC2 is not set
@@ -294,10 +357,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
 # CONFIG_NET_SCHED is not set
 
 #
@@ -305,9 +364,14 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
 
 #
 # Device Drivers
@@ -316,38 +380,37 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 #
 # Generic Driver Options
 #
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
 # CONFIG_SYS_HYPERVISOR is not set
-
-#
-# Connector - unified userspace <-> kernelspace linker
-#
 # CONFIG_CONNECTOR is not set
-
-#
-# Memory Technology Devices (MTD)
-#
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
 CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
 
 #
 # User Modules And Translation Layers
 #
 CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
 CONFIG_MTD_BLOCK=y
 # CONFIG_FTL is not set
 # CONFIG_NFTL is not set
 # CONFIG_INFTL is not set
 # CONFIG_RFD_FTL is not set
 # CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
 
 #
 # RAM/ROM/Flash chip drivers
@@ -373,7 +436,6 @@ CONFIG_MTD_CFI_UTIL=y
 # CONFIG_MTD_RAM is not set
 # CONFIG_MTD_ROM is not set
 # CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
 
 #
 # Mapping drivers for chip access
@@ -397,115 +459,73 @@ CONFIG_MTD_ARM_INTEGRATOR=y
 # CONFIG_MTD_DOC2000 is not set
 # CONFIG_MTD_DOC2001 is not set
 # CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
 # CONFIG_MTD_NAND is not set
-
-#
-# OneNAND Flash Device Drivers
-#
 # CONFIG_MTD_ONENAND is not set
 
 #
-# Parallel port support
+# UBI - Unsorted block images
 #
+# CONFIG_MTD_UBI is not set
 # CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
+CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_COW_COMMON is not set
 # CONFIG_BLK_DEV_LOOP is not set
 # CONFIG_BLK_DEV_NBD is not set
 # CONFIG_BLK_DEV_RAM is not set
-CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CDROM_PKTCDVD is not set
 # CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
 
 #
 # SCSI device support
 #
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
 # CONFIG_SCSI_NETLINK is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
+# CONFIG_ATA is not set
 # CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-
-#
-# I2O device support
-#
-
-#
-# Network device support
-#
 CONFIG_NETDEVICES=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
-
-#
-# PHY device support
-#
+# CONFIG_VETH is not set
 # CONFIG_PHYLIB is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
+# CONFIG_AX88796 is not set
 CONFIG_SMC91X=y
 # CONFIG_DM9000 is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
+CONFIG_SMC911X=y
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
 # CONFIG_WAN is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
 # CONFIG_NETCONSOLE is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
 # CONFIG_ISDN is not set
 
 #
@@ -513,6 +533,7 @@ CONFIG_SMC91X=y
 #
 CONFIG_INPUT=y
 # CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
 
 #
 # Userland interfaces
@@ -522,7 +543,6 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y
 CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
 # CONFIG_INPUT_EVDEV is not set
 # CONFIG_INPUT_EVBUG is not set
 
@@ -538,9 +558,16 @@ CONFIG_KEYBOARD_ATKBD=y
 # CONFIG_KEYBOARD_STOWAWAY is not set
 CONFIG_INPUT_MOUSE=y
 CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
 # CONFIG_MOUSE_SERIAL is not set
 # CONFIG_MOUSE_VSXXXAA is not set
 # CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
 # CONFIG_INPUT_TOUCHSCREEN is not set
 # CONFIG_INPUT_MISC is not set
 
@@ -558,9 +585,11 @@ CONFIG_SERIO_LIBPS2=y
 # Character devices
 #
 CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
 CONFIG_VT_CONSOLE=y
 CONFIG_HW_CONSOLE=y
 # CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
 # CONFIG_SERIAL_NONSTANDARD is not set
 
 #
@@ -579,97 +608,91 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_UNIX98_PTYS=y
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=16
-
-#
-# IPMI
-#
 # CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_NVRAM is not set
-# CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
-
-#
-# Ftape, the floppy tape device driver
-#
 # CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
 # CONFIG_TCG_TPM is not set
-
-#
-# I2C support
-#
 # CONFIG_I2C is not set
-
-#
-# SPI support
-#
 # CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
-
-#
-# Dallas's 1-wire bus
-#
 # CONFIG_W1 is not set
-
-#
-# Hardware Monitoring support
-#
+# CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
-# CONFIG_HWMON_VID is not set
-
-#
-# Misc devices
-#
-# CONFIG_SGI_IOC4 is not set
-# CONFIG_TIFM_CORE is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
 
 #
-# LED devices
+# Sonics Silicon Backplane
 #
-# CONFIG_NEW_LEDS is not set
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
 
 #
-# LED drivers
+# Multifunction device drivers
 #
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_WM8400 is not set
 
 #
-# LED Triggers
+# Multimedia devices
 #
 
 #
-# Multimedia devices
+# Multimedia core support
 #
 # CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
 
 #
-# Digital Video Broadcasting Devices
+# Multimedia drivers
 #
-# CONFIG_DVB is not set
+# CONFIG_DAB is not set
 
 #
 # Graphics support
 #
-# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
 CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
 CONFIG_FB_CFB_FILLRECT=y
 CONFIG_FB_CFB_COPYAREA=y
 CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
 # CONFIG_FB_MACMODES is not set
 # CONFIG_FB_BACKLIGHT is not set
 # CONFIG_FB_MODE_HELPERS is not set
 # CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
 CONFIG_FB_ARMCLCD=y
 # CONFIG_FB_S1D13XXX is not set
 # CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
 
 #
 # Console display driver support
@@ -677,28 +700,17 @@ CONFIG_FB_ARMCLCD=y
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_DUMMY_CONSOLE=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
 # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
 # CONFIG_FONTS is not set
 CONFIG_FONT_8x8=y
 CONFIG_FONT_8x16=y
-
-#
-# Logo configuration
-#
 CONFIG_LOGO=y
 # CONFIG_LOGO_LINUX_MONO is not set
 # CONFIG_LOGO_LINUX_VGA16 is not set
 CONFIG_LOGO_LINUX_CLUT224=y
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
-#
-# Sound
-#
 CONFIG_SOUND=y
-
-#
-# Advanced Linux Sound Architecture
-#
+CONFIG_SOUND_OSS_CORE=y
 CONFIG_SND=y
 CONFIG_SND_TIMER=y
 CONFIG_SND_PCM=y
@@ -712,100 +724,65 @@ CONFIG_SND_SUPPORT_OLD_API=y
 CONFIG_SND_VERBOSE_PROCFS=y
 # CONFIG_SND_VERBOSE_PRINTK is not set
 # CONFIG_SND_DEBUG is not set
-
-#
-# Generic devices
-#
-CONFIG_SND_AC97_CODEC=m
-CONFIG_SND_AC97_BUS=m
-# CONFIG_SND_DUMMY is not set
-# CONFIG_SND_MTPAV is not set
-# CONFIG_SND_SERIAL_U16550 is not set
-# CONFIG_SND_MPU401 is not set
-
-#
-# ALSA ARM devices
-#
-CONFIG_SND_ARMAACI=m
-
-#
-# Open Sound System
-#
+CONFIG_SND_VMASTER=y
+CONFIG_SND_AC97_CODEC=y
+# CONFIG_SND_DRIVERS is not set
+CONFIG_SND_ARM=y
+CONFIG_SND_ARMAACI=y
+# CONFIG_SND_SOC is not set
 # CONFIG_SOUND_PRIME is not set
-
-#
-# USB support
-#
-CONFIG_USB_ARCH_HAS_HCD=y
-# CONFIG_USB_ARCH_HAS_OHCI is not set
-# CONFIG_USB_ARCH_HAS_EHCI is not set
-# CONFIG_USB is not set
-
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
+CONFIG_AC97_BUS=y
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
 CONFIG_MMC=y
 # CONFIG_MMC_DEBUG is not set
-CONFIG_MMC_BLOCK=y
-CONFIG_MMC_ARMMMCI=y
-# CONFIG_MMC_TIFM_SD is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
 
 #
-# Real Time Clock
+# MMC/SD/SDIO Card Drivers
 #
-CONFIG_RTC_LIB=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_HCTOSYS=y
-CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
-# CONFIG_RTC_DEBUG is not set
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
 
 #
-# RTC interfaces
+# MMC/SD/SDIO Host Controller Drivers
 #
-CONFIG_RTC_INTF_SYSFS=y
-CONFIG_RTC_INTF_PROC=y
-CONFIG_RTC_INTF_DEV=y
-CONFIG_RTC_INTF_DEV_UIE_EMUL=y
+CONFIG_MMC_ARMMMCI=y
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
 
 #
-# RTC drivers
+# Voltage and Current regulators
 #
-# CONFIG_RTC_DRV_DS1553 is not set
-# CONFIG_RTC_DRV_DS1742 is not set
-# CONFIG_RTC_DRV_M48T86 is not set
-CONFIG_RTC_DRV_PL031=y
-# CONFIG_RTC_DRV_TEST is not set
-# CONFIG_RTC_DRV_V3020 is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_UIO is not set
 
 #
 # File systems
 #
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT2_FS is not set
 # CONFIG_EXT3_FS is not set
-# CONFIG_EXT4DEV_FS is not set
+# CONFIG_EXT4_FS is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
-# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
+CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
-# CONFIG_INOTIFY_USER is not set
+CONFIG_INOTIFY_USER=y
 # CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_FUSE_FS is not set
@@ -831,11 +808,11 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 #
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_SYSFS=y
 CONFIG_TMPFS=y
 # CONFIG_TMPFS_POSIX_ACL is not set
 # CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
 # CONFIG_CONFIGFS_FS is not set
 
 #
@@ -848,29 +825,28 @@ CONFIG_RAMFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
 # CONFIG_JFFS2_FS is not set
 CONFIG_CRAMFS=y
 # CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
+CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 # CONFIG_NFS_V3_ACL is not set
 # CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
 CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
 CONFIG_LOCKD=y
 CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
@@ -878,17 +854,12 @@ CONFIG_SUNRPC=y
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
 # CONFIG_AFS_FS is not set
-# CONFIG_9P_FS is not set
 
 #
 # Partition Types
 #
 # CONFIG_PARTITION_ADVANCED is not set
 CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
 CONFIG_NLS=y
 CONFIG_NLS_DEFAULT="iso8859-1"
 CONFIG_NLS_CODEPAGE_437=y
@@ -929,64 +900,177 @@ CONFIG_NLS_ISO8859_1=y
 # CONFIG_NLS_KOI8_R is not set
 # CONFIG_NLS_KOI8_U is not set
 # CONFIG_NLS_UTF8 is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
+# CONFIG_DLM is not set
 
 #
 # Kernel hacking
 #
 # CONFIG_PRINTK_TIME is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
 # CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
 CONFIG_DEBUG_KERNEL=y
-CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_DEBUG_SHIRQ is not set
 CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
 # CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_DEBUG_SLAB is not set
 # CONFIG_DEBUG_RT_MUTEXES is not set
 # CONFIG_RT_MUTEX_TESTER is not set
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_RWSEMS=y
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_INFO is not set
-# CONFIG_DEBUG_FS is not set
 # CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
 CONFIG_FRAME_POINTER=y
-# CONFIG_UNWIND_INFO is not set
-CONFIG_FORCED_INLINING=y
-# CONFIG_HEADERS_CHECK is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+# CONFIG_FTRACE is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
 CONFIG_DEBUG_USER=y
 CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-# CONFIG_DEBUG_ICEDCC is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
 
 #
 # Security options
 #
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
 
 #
-# Cryptographic options
+# Random Number Generation
 #
-# CONFIG_CRYPTO is not set
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
 
 #
 # Library routines
 #
+CONFIG_BITREVERSE=y
 # CONFIG_CRC_CCITT is not set
 # CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
 CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/realview_defconfig b/arch/arm/configs/realview_defconfig
index 907e54344dad..7e253f58ed18 100644
--- a/arch/arm/configs/realview_defconfig
+++ b/arch/arm/configs/realview_defconfig
@@ -1,105 +1,204 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.14-rc2
-# Thu Sep 29 14:50:10 2005
+# Linux kernel version: 2.6.28-rc2
+# Mon Nov 10 14:39:48 2008
 #
 CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+# CONFIG_GENERIC_GPIO is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_MMU=y
-CONFIG_UID16=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 
 #
-# Code maturity level options
+# General setup
 #
-# CONFIG_EXPERIMENTAL is not set
-CONFIG_CLEAN_COMPILE=y
+CONFIG_EXPERIMENTAL=y
 CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
+# CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
-CONFIG_HOTPLUG=y
-CONFIG_KOBJECT_UEVENT=y
 # CONFIG_IKCONFIG is not set
-CONFIG_INITRAMFS_SOURCE=""
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
 # CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
 # CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
-
-#
-# Loadable module support
-#
 CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
 CONFIG_MODULE_UNLOAD=y
-CONFIG_OBSOLETE_MODPARM=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-# CONFIG_KMOD is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+CONFIG_CLASSIC_RCU=y
+# CONFIG_FREEZER is not set
 
 #
 # System Type
 #
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+CONFIG_ARCH_REALVIEW=y
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
 # CONFIG_ARCH_CLPS7500 is not set
 # CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
 # CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_IOP3XX is not set
-# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
 # CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
 # CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_VERSATILE is not set
-CONFIG_ARCH_REALVIEW=y
-# CONFIG_ARCH_IMX is not set
-# CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_MSM is not set
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
 
 #
 # RealView platform type
 #
 CONFIG_MACH_REALVIEW_EB=y
+# CONFIG_REALVIEW_EB_A9MP is not set
+CONFIG_REALVIEW_EB_ARM11MP=y
+# CONFIG_REALVIEW_EB_ARM11MP_REVB is not set
+CONFIG_MACH_REALVIEW_PB11MP=y
+CONFIG_MACH_REALVIEW_PB1176=y
+# CONFIG_MACH_REALVIEW_PBA8 is not set
 
 #
 # Processor Type
 #
 CONFIG_CPU_32=y
-CONFIG_CPU_ARM926T=y
-# CONFIG_CPU_V6 is not set
-CONFIG_CPU_32v5=y
-CONFIG_CPU_ABRT_EV5TJ=y
-CONFIG_CPU_CACHE_VIVT=y
-CONFIG_CPU_COPY_V4WB=y
-CONFIG_CPU_TLB_V4WBI=y
+# CONFIG_CPU_ARM926T is not set
+CONFIG_CPU_V6=y
+# CONFIG_CPU_32v6K is not set
+# CONFIG_CPU_V7 is not set
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
 
 #
 # Processor Features
@@ -107,8 +206,9 @@ CONFIG_CPU_TLB_V4WBI=y
 CONFIG_ARM_THUMB=y
 # CONFIG_CPU_ICACHE_DISABLE is not set
 # CONFIG_CPU_DCACHE_DISABLE is not set
-# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
-# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_OUTER_CACHE=y
+CONFIG_CACHE_L2X0=y
 CONFIG_ARM_GIC=y
 CONFIG_ICST307=y
 
@@ -116,20 +216,41 @@ CONFIG_ICST307=y
 # Bus support
 #
 CONFIG_ARM_AMBA=y
-CONFIG_ISA_DMA_API=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
 # CONFIG_PCCARD is not set
 
 #
 # Kernel Features
 #
-# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_SMP is not set
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
 CONFIG_ALIGNMENT_TRAP=y
 
 #
@@ -139,6 +260,12 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CMDLINE="root=/dev/nfs nfsroot=10.1.69.3:/work/nfsroot ip=dhcp console=ttyAMA0 mem=128M"
 # CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
 
 #
 # Floating point emulation
@@ -147,26 +274,24 @@ CONFIG_CMDLINE="root=/dev/nfs nfsroot=10.1.69.3:/work/nfsroot ip=dhcp console=tt
 #
 # At least one emulation must be selected
 #
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_NWFPE_XP is not set
-# CONFIG_VFP is not set
+# CONFIG_FPE_NWFPE is not set
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_VFP=y
 
 #
 # Userspace binary formats
 #
 CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
 # CONFIG_BINFMT_AOUT is not set
 # CONFIG_BINFMT_MISC is not set
-# CONFIG_ARTHUR is not set
 
 #
 # Power management options
 #
 # CONFIG_PM is not set
-
-#
-# Networking
-#
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
 #
@@ -175,6 +300,11 @@ CONFIG_NET=y
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
 CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -186,34 +316,56 @@ CONFIG_IP_PNP_BOOTP=y
 # CONFIG_IP_PNP_RARP is not set
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
 # CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
 # CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
 CONFIG_INET_DIAG=y
 CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_BIC=y
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
 # CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
 # CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
 # CONFIG_VLAN_8021Q is not set
 # CONFIG_DECNET is not set
 # CONFIG_LLC2 is not set
 # CONFIG_IPX is not set
 # CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
 # CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
 
 #
 # Network testing
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
 
 #
 # Device Drivers
@@ -222,30 +374,37 @@ CONFIG_TCP_CONG_BIC=y
 #
 # Generic Driver Options
 #
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_DEBUG_DRIVER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
 CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
 
 #
 # User Modules And Translation Layers
 #
 CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
 CONFIG_MTD_BLOCK=y
 # CONFIG_FTL is not set
 # CONFIG_NFTL is not set
 # CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
 
 #
 # RAM/ROM/Flash chip drivers
@@ -266,7 +425,6 @@ CONFIG_MTD_CFI_I2=y
 # CONFIG_MTD_CFI_I8 is not set
 CONFIG_MTD_CFI_INTELEXT=y
 CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_AMDSTD_RETRY=0
 # CONFIG_MTD_CFI_STAA is not set
 CONFIG_MTD_CFI_UTIL=y
 # CONFIG_MTD_RAM is not set
@@ -279,7 +437,6 @@ CONFIG_MTD_CFI_UTIL=y
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
 # CONFIG_MTD_PHYSMAP is not set
 CONFIG_MTD_ARM_INTEGRATOR=y
-# CONFIG_MTD_EDB7312 is not set
 # CONFIG_MTD_PLATRAM is not set
 
 #
@@ -288,7 +445,7 @@ CONFIG_MTD_ARM_INTEGRATOR=y
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
+# CONFIG_MTD_BLOCK2MTD is not set
 
 #
 # Disk-On-Chip Device Drivers
@@ -296,121 +453,81 @@ CONFIG_MTD_ARM_INTEGRATOR=y
 # CONFIG_MTD_DOC2000 is not set
 # CONFIG_MTD_DOC2001 is not set
 # CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
 # CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
 
 #
-# Parallel port support
+# UBI - Unsorted block images
 #
+# CONFIG_MTD_UBI is not set
 # CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
+CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_COW_COMMON is not set
 # CONFIG_BLK_DEV_LOOP is not set
 # CONFIG_BLK_DEV_NBD is not set
 # CONFIG_BLK_DEV_RAM is not set
-CONFIG_BLK_DEV_RAM_COUNT=16
 # CONFIG_CDROM_PKTCDVD is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-# CONFIG_IOSCHED_AS is not set
-CONFIG_IOSCHED_DEADLINE=y
-# CONFIG_IOSCHED_CFQ is not set
 # CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
 
 #
 # SCSI device support
 #
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
 # CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-
-#
-# I2O device support
-#
-
-#
-# Network device support
-#
 CONFIG_NETDEVICES=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
-
-#
-# PHY device support
-#
+# CONFIG_VETH is not set
 # CONFIG_PHYLIB is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
+# CONFIG_AX88796 is not set
 CONFIG_SMC91X=y
 # CONFIG_DM9000 is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
+CONFIG_SMC911X=y
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
 # CONFIG_WAN is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
 # CONFIG_ISDN is not set
 
 #
 # Input device support
 #
 CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
 
 #
 # Userland interfaces
@@ -420,7 +537,6 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y
 CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
 # CONFIG_INPUT_EVDEV is not set
 # CONFIG_INPUT_EVBUG is not set
 
@@ -433,11 +549,19 @@ CONFIG_KEYBOARD_ATKBD=y
 # CONFIG_KEYBOARD_LKKBD is not set
 # CONFIG_KEYBOARD_XTKBD is not set
 # CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
 CONFIG_INPUT_MOUSE=y
 CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
 # CONFIG_MOUSE_SERIAL is not set
 # CONFIG_MOUSE_VSXXXAA is not set
 # CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
 # CONFIG_INPUT_TOUCHSCREEN is not set
 # CONFIG_INPUT_MISC is not set
 
@@ -455,8 +579,11 @@ CONFIG_SERIO_LIBPS2=y
 # Character devices
 #
 CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
 CONFIG_VT_CONSOLE=y
 CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
 # CONFIG_SERIAL_NONSTANDARD is not set
 
 #
@@ -475,73 +602,91 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_UNIX98_PTYS=y
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=16
-
-#
-# IPMI
-#
 # CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
+# CONFIG_HW_RANDOM is not set
 # CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_DTLK is not set
 # CONFIG_R3964 is not set
-
-#
-# Ftape, the floppy tape device driver
-#
 # CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-
-#
-# I2C support
-#
+# CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
 
 #
-# Hardware Monitoring support
+# Sonics Silicon Backplane
 #
-# CONFIG_HWMON is not set
-# CONFIG_HWMON_VID is not set
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
 
 #
-# Misc devices
+# Multifunction device drivers
 #
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_WM8400 is not set
 
 #
-# Multimedia Capabilities Port drivers
+# Multimedia devices
 #
 
 #
-# Multimedia devices
+# Multimedia core support
 #
 # CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
 
 #
-# Digital Video Broadcasting Devices
+# Multimedia drivers
 #
-# CONFIG_DVB is not set
+# CONFIG_DAB is not set
 
 #
 # Graphics support
 #
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
 CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
 CONFIG_FB_CFB_FILLRECT=y
 CONFIG_FB_CFB_COPYAREA=y
 CONFIG_FB_CFB_IMAGEBLIT=y
-CONFIG_FB_SOFT_CURSOR=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
 # CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
 # CONFIG_FB_MODE_HELPERS is not set
 # CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
 CONFIG_FB_ARMCLCD=y
 # CONFIG_FB_S1D13XXX is not set
 # CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
 
 #
 # Console display driver support
@@ -549,27 +694,17 @@ CONFIG_FB_ARMCLCD=y
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_DUMMY_CONSOLE=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
 # CONFIG_FONTS is not set
 CONFIG_FONT_8x8=y
 CONFIG_FONT_8x16=y
-
-#
-# Logo configuration
-#
 CONFIG_LOGO=y
 # CONFIG_LOGO_LINUX_MONO is not set
 # CONFIG_LOGO_LINUX_VGA16 is not set
 CONFIG_LOGO_LINUX_CLUT224=y
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
-#
-# Sound
-#
 CONFIG_SOUND=y
-
-#
-# Advanced Linux Sound Architecture
-#
+CONFIG_SOUND_OSS_CORE=y
 CONFIG_SND=y
 CONFIG_SND_TIMER=y
 CONFIG_SND_PCM=y
@@ -577,59 +712,71 @@ CONFIG_SND_PCM=y
 CONFIG_SND_OSSEMUL=y
 CONFIG_SND_MIXER_OSS=y
 CONFIG_SND_PCM_OSS=y
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
 # CONFIG_SND_VERBOSE_PRINTK is not set
 # CONFIG_SND_DEBUG is not set
-
-#
-# Generic devices
-#
-# CONFIG_SND_DUMMY is not set
-# CONFIG_SND_MTPAV is not set
-# CONFIG_SND_SERIAL_U16550 is not set
-# CONFIG_SND_MPU401 is not set
-
-#
-# ALSA ARM devices
-#
-# CONFIG_SND_ARMAACI is not set
-
-#
-# Open Sound System
-#
+CONFIG_SND_VMASTER=y
+CONFIG_SND_AC97_CODEC=y
+# CONFIG_SND_DRIVERS is not set
+CONFIG_SND_ARM=y
+CONFIG_SND_ARMAACI=y
+# CONFIG_SND_SOC is not set
 # CONFIG_SOUND_PRIME is not set
+CONFIG_AC97_BUS=y
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
 
 #
-# USB support
+# MMC/SD/SDIO Card Drivers
 #
-CONFIG_USB_ARCH_HAS_HCD=y
-# CONFIG_USB_ARCH_HAS_OHCI is not set
-# CONFIG_USB is not set
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
 
 #
-# USB Gadget Support
+# MMC/SD/SDIO Host Controller Drivers
 #
-# CONFIG_USB_GADGET is not set
+CONFIG_MMC_ARMMMCI=y
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
 
 #
-# MMC/SD Card support
+# Voltage and Current regulators
 #
-# CONFIG_MMC is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_UIO is not set
 
 #
 # File systems
 #
 # CONFIG_EXT2_FS is not set
 # CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
+# CONFIG_EXT4_FS is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
 # CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_FUSE_FS is not set
@@ -654,51 +801,59 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 # Pseudo filesystems
 #
 CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_SYSFS=y
 CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
 # CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-# CONFIG_RELAYFS_FS is not set
+# CONFIG_CONFIGFS_FS is not set
 
 #
 # Miscellaneous filesystems
 #
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
 # CONFIG_HFSPLUS_FS is not set
-# CONFIG_JFFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
 # CONFIG_JFFS2_FS is not set
 CONFIG_CRAMFS=y
 # CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
+CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 # CONFIG_NFS_V3_ACL is not set
-# CONFIG_NFSD is not set
+# CONFIG_NFS_V4 is not set
 CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
 CONFIG_LOCKD=y
 CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
 
 #
 # Partition Types
 #
 # CONFIG_PARTITION_ADVANCED is not set
 CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
 CONFIG_NLS=y
 CONFIG_NLS_DEFAULT="iso8859-1"
 CONFIG_NLS_CODEPAGE_437=y
@@ -739,26 +894,71 @@ CONFIG_NLS_ISO8859_1=y
 # CONFIG_NLS_KOI8_R is not set
 # CONFIG_NLS_KOI8_U is not set
 # CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
 
 #
 # Kernel hacking
 #
 # CONFIG_PRINTK_TIME is not set
-CONFIG_DEBUG_KERNEL=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
-CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
 CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
 # CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
 # CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_INFO is not set
-# CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
 CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+# CONFIG_FTRACE is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
 CONFIG_DEBUG_USER=y
 CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
 # CONFIG_DEBUG_LL is not set
 
 #
@@ -766,21 +966,106 @@ CONFIG_DEBUG_ERRORS=y
 #
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
 
 #
-# Cryptographic options
+# Compression
 #
-# CONFIG_CRYPTO is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
 
 #
-# Hardware crypto devices
+# Random Number Generation
 #
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
 
 #
 # Library routines
 #
+CONFIG_BITREVERSE=y
 # CONFIG_CRC_CCITT is not set
 # CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
 CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index de6c59f814a1..6cbd8fdc9f1f 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -10,11 +10,11 @@
 #ifndef _ASMARM_CACHEFLUSH_H
 #define _ASMARM_CACHEFLUSH_H
 
-#include <linux/sched.h>
 #include <linux/mm.h>
 
 #include <asm/glue.h>
 #include <asm/shmparam.h>
+#include <asm/cachetype.h>
 
 #define CACHE_COLOUR(vaddr)     ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
 
@@ -296,16 +296,6 @@ static inline void outer_flush_range(unsigned long start, unsigned long end)
 #endif
 
 /*
- * flush_cache_vmap() is used when creating mappings (eg, via vmap,
- * vmalloc, ioremap etc) in kernel space for pages.  Since the
- * direct-mappings of these pages may contain cached data, we need
- * to do a full cache flush to ensure that writebacks don't corrupt
- * data placed into these pages via the new mappings.
- */
-#define flush_cache_vmap(start, end)            flush_cache_all()
-#define flush_cache_vunmap(start, end)          flush_cache_all()
-
-/*
  * Copy user data from/to a page which is mapped into a different
  * processes address space.  Really, we want to allow our "user
  * space" model to handle this.
@@ -444,4 +434,29 @@ static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt,
         dmac_inv_range(start, start + size);
 }
 
+/*
+ * flush_cache_vmap() is used when creating mappings (eg, via vmap,
+ * vmalloc, ioremap etc) in kernel space for pages.  On non-VIPT
+ * caches, since the direct-mappings of these pages may contain cached
+ * data, we need to do a full cache flush to ensure that writebacks
+ * don't corrupt data placed into these pages via the new mappings.
+ */
+static inline void flush_cache_vmap(unsigned long start, unsigned long end)
+{
+        if (!cache_is_vipt_nonaliasing())
+                flush_cache_all();
+        else
+                /*
+                 * set_pte_at() called from vmap_pte_range() does not
+                 * have a DSB after cleaning the cache line.
+                 */
+                dsb();
+}
+
+static inline void flush_cache_vunmap(unsigned long start, unsigned long end)
+{
+        if (!cache_is_vipt_nonaliasing())
+                flush_cache_all();
+}
+
 #endif
diff --git a/arch/arm/include/asm/clkdev.h b/arch/arm/include/asm/clkdev.h
new file mode 100644
index 000000000000..b6ec7c627b39
--- /dev/null
+++ b/arch/arm/include/asm/clkdev.h
@@ -0,0 +1,30 @@
+/*
+ *  arch/arm/include/asm/clkdev.h
+ *
+ *  Copyright (C) 2008 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Helper for the clk API to assist looking up a struct clk.
+ */
+#ifndef __ASM_CLKDEV_H
+#define __ASM_CLKDEV_H
+
+struct clk;
+
+struct clk_lookup {
+        struct list_head        node;
+        const char              *dev_id;
+        const char              *con_id;
+        struct clk              *clk;
+};
+
+struct clk_lookup *clkdev_alloc(struct clk *clk, const char *con_id,
+        const char *dev_fmt, ...);
+
+void clkdev_add(struct clk_lookup *cl);
+void clkdev_drop(struct clk_lookup *cl);
+
+#endif
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 4ed149cbb32a..22cb14ec3438 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -69,7 +69,9 @@ extern void dma_cache_maint(const void *kaddr, size_t size, int rw);
  */
 static inline int dma_supported(struct device *dev, u64 mask)
 {
-        return dev->dma_mask && *dev->dma_mask != 0;
+        if (mask < ISA_DMA_THRESHOLD)
+                return 0;
+        return 1;
 }
 
 static inline int dma_set_mask(struct device *dev, u64 dma_mask)
diff --git a/arch/arm/include/asm/dma.h b/arch/arm/include/asm/dma.h
index 75154b193117..df5638f3643a 100644
--- a/arch/arm/include/asm/dma.h
+++ b/arch/arm/include/asm/dma.h
@@ -1,12 +1,7 @@
 #ifndef __ASM_ARM_DMA_H
 #define __ASM_ARM_DMA_H
 
-typedef unsigned int dmach_t;
-
-#include <linux/spinlock.h>
-#include <asm/system.h>
-#include <asm/scatterlist.h>
-#include <mach/dma.h>
+#include <asm/memory.h>
 
 /*
  * This is the maximum virtual address which can be DMA'd from.
@@ -15,6 +10,19 @@ typedef unsigned int dmach_t;
 #define MAX_DMA_ADDRESS 0xffffffff
 #endif
 
+#ifdef CONFIG_ISA_DMA_API
+/*
+ * This is used to support drivers written for the x86 ISA DMA API.
+ * It should not be re-used except for that purpose.
+ */
+#include <linux/spinlock.h>
+#include <asm/system.h>
+#include <asm/scatterlist.h>
+
+typedef unsigned int dmach_t;
+
+#include <mach/isa-dma.h>
+
 /*
  * DMA modes
  */
@@ -140,4 +148,6 @@ extern int isa_dma_bridge_buggy;
 #define isa_dma_bridge_buggy    (0)
 #endif
 
-#endif /* _ARM_DMA_H */
+#endif /* CONFIG_ISA_DMA_API */
+
+#endif /* __ASM_ARM_DMA_H */
diff --git a/arch/arm/include/asm/hardware/iomd.h b/arch/arm/include/asm/hardware/iomd.h
index 9c5afbd71a69..f9ee69e4f53e 100644
--- a/arch/arm/include/asm/hardware/iomd.h
+++ b/arch/arm/include/asm/hardware/iomd.h
@@ -32,19 +32,11 @@
 #define IOMD_KARTRX     (0x004)
 #define IOMD_KCTRL      (0x008)
 
-#ifdef CONFIG_ARCH_CLPS7500
-#define IOMD_IOLINES    (0x00C)
-#endif
-
 #define IOMD_IRQSTATA   (0x010)
 #define IOMD_IRQREQA    (0x014)
 #define IOMD_IRQCLRA    (0x014)
 #define IOMD_IRQMASKA   (0x018)
 
-#ifdef CONFIG_ARCH_CLPS7500
-#define IOMD_SUSMODE    (0x01C)
-#endif
-
 #define IOMD_IRQSTATB   (0x020)
 #define IOMD_IRQREQB    (0x024)
 #define IOMD_IRQMASKB   (0x028)
@@ -53,10 +45,6 @@
 #define IOMD_FIQREQ     (0x034)
 #define IOMD_FIQMASK    (0x038)
 
-#ifdef CONFIG_ARCH_CLPS7500
-#define IOMD_CLKCTL     (0x03C)
-#endif
-
 #define IOMD_T0CNTL     (0x040)
 #define IOMD_T0LTCHL    (0x040)
 #define IOMD_T0CNTH     (0x044)
@@ -71,18 +59,6 @@
 #define IOMD_T1GO       (0x058)
 #define IOMD_T1LATCH    (0x05c)
 
-#ifdef CONFIG_ARCH_CLPS7500
-#define IOMD_IRQSTATC   (0x060)
-#define IOMD_IRQREQC    (0x064)
-#define IOMD_IRQMASKC   (0x068)
-
-#define IOMD_VIDMUX     (0x06c)
-
-#define IOMD_IRQSTATD   (0x070)
-#define IOMD_IRQREQD    (0x074)
-#define IOMD_IRQMASKD   (0x078)
-#endif
-
 #define IOMD_ROMCR0     (0x080)
 #define IOMD_ROMCR1     (0x084)
 #ifdef CONFIG_ARCH_RPC
@@ -100,11 +76,6 @@
 #define IOMD_MOUSEY     (0x0A4)
 #endif
 
-#ifdef CONFIG_ARCH_CLPS7500
-#define IOMD_MSEDAT     (0x0A8)
-#define IOMD_MSECTL     (0x0Ac)
-#endif
-
 #ifdef CONFIG_ARCH_RPC
 #define IOMD_DMATCR     (0x0C0)
 #endif
@@ -113,18 +84,6 @@
 #ifdef CONFIG_ARCH_RPC
 #define IOMD_DMAEXT     (0x0CC)
 #endif
-#ifdef CONFIG_ARCH_CLPS7500
-#define IOMD_ASTCR      (0x0CC)
-#define IOMD_DRAMCR     (0x0D0)
-#define IOMD_SELFREF    (0x0D4)
-#define IOMD_ATODICR    (0x0E0)
-#define IOMD_ATODSR     (0x0E4)
-#define IOMD_ATODCC     (0x0E8)
-#define IOMD_ATODCNT1   (0x0EC)
-#define IOMD_ATODCNT2   (0x0F0)
-#define IOMD_ATODCNT3   (0x0F4)
-#define IOMD_ATODCNT4   (0x0F8)
-#endif
 
 #ifdef CONFIG_ARCH_RPC
 #define DMA_EXT_IO0     1
diff --git a/arch/arm/include/asm/hwcap.h b/arch/arm/include/asm/hwcap.h
index 81f4c899a555..bda489f9f017 100644
--- a/arch/arm/include/asm/hwcap.h
+++ b/arch/arm/include/asm/hwcap.h
@@ -16,6 +16,7 @@
 #define HWCAP_IWMMXT    512
 #define HWCAP_CRUNCH    1024
 #define HWCAP_THUMBEE   2048
+#define HWCAP_NEON      4096
 
 #if defined(__KERNEL__) && !defined(__ASSEMBLY__)
 /*
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index a8094451be57..d2a59cfc30ce 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -80,6 +80,14 @@ extern void __iounmap(volatile void __iomem *addr);
 extern void __readwrite_bug(const char *fn);
 
 /*
+ * A typesafe __io() helper
+ */
+static inline void __iomem *__typesafe_io(unsigned long addr)
+{
+        return (void __iomem *)addr;
+}
+
+/*
  * Now, pick up the machine-defined IO definitions
  */
 #include <mach/io.h>
diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h
index a0009aa5d157..328f14a8b790 100644
--- a/arch/arm/include/asm/irq.h
+++ b/arch/arm/include/asm/irq.h
@@ -7,10 +7,6 @@
 #define irq_canonicalize(i)     (i)
 #endif
 
-#ifndef NR_IRQS
-#define NR_IRQS 128
-#endif
-
 /*
  * Use this value to indicate lack of interrupt
  * capability
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 77764301844b..0202a7c20e62 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -112,10 +112,8 @@
  * private definitions which should NOT be used outside memory.h
  * files.  Use virt_to_phys/phys_to_virt/__pa/__va instead.
  */
-#ifndef __virt_to_phys
 #define __virt_to_phys(x)       ((x) - PAGE_OFFSET + PHYS_OFFSET)
 #define __phys_to_virt(x)       ((x) - PHYS_OFFSET + PAGE_OFFSET)
-#endif
 
 /*
  * Convert a physical address to a Page Frame Number and back
@@ -180,6 +178,11 @@ static inline void *phys_to_virt(unsigned long x)
  * memory.  Use of these is *deprecated* (and that doesn't mean
  * use the __ prefixed forms instead.)  See dma-mapping.h.
  */
+#ifndef __virt_to_bus
+#define __virt_to_bus   __virt_to_phys
+#define __bus_to_virt   __phys_to_virt
+#endif
+
 static inline __deprecated unsigned long virt_to_bus(void *x)
 {
         return __virt_to_bus((unsigned long)x);
diff --git a/arch/arm/include/asm/mmu_context.h b/arch/arm/include/asm/mmu_context.h
index 0559f37c2a27..263fed05ea33 100644
--- a/arch/arm/include/asm/mmu_context.h
+++ b/arch/arm/include/asm/mmu_context.h
@@ -14,6 +14,7 @@
 #define __ASM_ARM_MMU_CONTEXT_H
 
 #include <linux/compiler.h>
+#include <linux/sched.h>
 #include <asm/cacheflush.h>
 #include <asm/cachetype.h>
 #include <asm/proc-fns.h>
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
index bed1c0a00368..f341c9dbd662 100644
--- a/arch/arm/include/asm/page.h
+++ b/arch/arm/include/asm/page.h
@@ -108,32 +108,38 @@
 #error Unknown user operations model
 #endif
 
+struct page;
+
 struct cpu_user_fns {
-        void (*cpu_clear_user_page)(void *p, unsigned long user);
-        void (*cpu_copy_user_page)(void *to, const void *from,
-                                   unsigned long user);
+        void (*cpu_clear_user_highpage)(struct page *page, unsigned long vaddr);
+        void (*cpu_copy_user_highpage)(struct page *to, struct page *from,
+                        unsigned long vaddr);
 };
 
 #ifdef MULTI_USER
 extern struct cpu_user_fns cpu_user;
 
-#define __cpu_clear_user_page   cpu_user.cpu_clear_user_page
-#define __cpu_copy_user_page    cpu_user.cpu_copy_user_page
+#define __cpu_clear_user_highpage       cpu_user.cpu_clear_user_highpage
+#define __cpu_copy_user_highpage        cpu_user.cpu_copy_user_highpage
 
 #else
 
-#define __cpu_clear_user_page   __glue(_USER,_clear_user_page)
-#define __cpu_copy_user_page    __glue(_USER,_copy_user_page)
+#define __cpu_clear_user_highpage       __glue(_USER,_clear_user_highpage)
+#define __cpu_copy_user_highpage        __glue(_USER,_copy_user_highpage)
 
-extern void __cpu_clear_user_page(void *p, unsigned long user);
-extern void __cpu_copy_user_page(void *to, const void *from,
-                                 unsigned long user);
+extern void __cpu_clear_user_highpage(struct page *page, unsigned long vaddr);
+extern void __cpu_copy_user_highpage(struct page *to, struct page *from,
+                        unsigned long vaddr);
 #endif
 
-#define clear_user_page(addr,vaddr,pg)   __cpu_clear_user_page(addr, vaddr)
-#define copy_user_page(to,from,vaddr,pg) __cpu_copy_user_page(to, from, vaddr)
+#define clear_user_highpage(page,vaddr)         \
+         __cpu_clear_user_highpage(page, vaddr)
+
+#define __HAVE_ARCH_COPY_USER_HIGHPAGE
+#define copy_user_highpage(to,from,vaddr,vma)   \
+        __cpu_copy_user_highpage(to, from, vaddr)
 
-#define clear_page(page)        memzero((void *)(page), PAGE_SIZE)
+#define clear_page(page)        memset((void *)(page), 0, PAGE_SIZE)
 extern void copy_page(void *to, const void *from);
 
 #undef STRICT_MM_TYPECHECKS
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index 517a4d6ffc74..2320508443a5 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -64,7 +64,7 @@ struct thread_struct {
 ({                                                                      \
         unsigned long *stack = (unsigned long *)sp;                     \
         set_fs(USER_DS);                                                \
-        memzero(regs->uregs, sizeof(regs->uregs));                      \
+        memset(regs->uregs, 0, sizeof(regs->uregs));                    \
         if (current->personality & ADDR_LIMIT_32BIT)                    \
                 regs->ARM_cpsr = USR_MODE;                              \
         else                                                            \
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index a65413ba121d..f2cd18a0932b 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -209,9 +209,11 @@ struct meminfo {
         struct membank bank[NR_BANKS];
 };
 
+extern struct meminfo meminfo;
+
 #define for_each_nodebank(iter,mi,no)                   \
-        for (iter = 0; iter < mi->nr_banks; iter++)     \
-                if (mi->bank[iter].node == no)
+        for (iter = 0; iter < (mi)->nr_banks; iter++)   \
+                if ((mi)->bank[iter].node == no)
 
 #define bank_pfn_start(bank)    __phys_to_pfn((bank)->start)
 #define bank_pfn_end(bank)      __phys_to_pfn((bank)->start + (bank)->size)
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h
index 727b5c042e52..fad70da5911d 100644
--- a/arch/arm/include/asm/smp.h
+++ b/arch/arm/include/asm/smp.h
@@ -114,7 +114,7 @@ extern void local_timer_interrupt(void);
 /*
  * Stop a local timer interrupt.
  */
-extern void local_timer_stop(unsigned int cpu);
+extern void local_timer_stop(void);
 
 /*
  * Platform provides this to acknowledge a local timer IRQ
@@ -123,7 +123,7 @@ extern int local_timer_ack(void);
 
 #else
 
-static inline void local_timer_stop(unsigned int cpu)
+static inline void local_timer_stop(void)
 {
 }
 
@@ -132,7 +132,7 @@ static inline void local_timer_stop(unsigned int cpu)
 /*
  * Setup a local timer interrupt for a CPU.
  */
-extern void local_timer_setup(unsigned int cpu);
+extern void local_timer_setup(void);
 
 /*
  * show local interrupt info
diff --git a/arch/arm/include/asm/string.h b/arch/arm/include/asm/string.h
index e50c4a39b699..cf4f3aad0fc1 100644
--- a/arch/arm/include/asm/string.h
+++ b/arch/arm/include/asm/string.h
@@ -21,7 +21,6 @@ extern void * memmove(void *, const void *, __kernel_size_t);
 #define __HAVE_ARCH_MEMCHR
 extern void * memchr(const void *, int, __kernel_size_t);
 
-#define __HAVE_ARCH_MEMZERO
 #define __HAVE_ARCH_MEMSET
 extern void * memset(void *, int, __kernel_size_t);
 
@@ -39,12 +38,4 @@ extern void __memzero(void *ptr, __kernel_size_t n);
                 (__p);                                                  \
         })
 
-#define memzero(p,n)                                                    \
-        ({                                                              \
-                void *__p = (p); size_t __n = n;                        \
-                if ((__n) != 0)                                         \
-                        __memzero((__p),(__n));                         \
-                (__p);                                                  \
-         })
-
 #endif
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 568020b34e3e..811be55f338e 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -3,8 +3,6 @@
 
 #ifdef __KERNEL__
 
-#include <asm/memory.h>
-
 #define CPU_ARCH_UNKNOWN        0
 #define CPU_ARCH_ARMv3          1
 #define CPU_ARCH_ARMv4          2
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index e98ec60b3400..7897464e0c24 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -11,7 +11,8 @@
 /*
  * User space memory access functions
  */
-#include <linux/sched.h>
+#include <linux/string.h>
+#include <linux/thread_info.h>
 #include <asm/errno.h>
 #include <asm/memory.h>
 #include <asm/domain.h>
@@ -400,7 +401,7 @@ static inline unsigned long __must_check copy_from_user(void *to, const void __u
         if (access_ok(VERIFY_READ, from, n))
                 n = __copy_from_user(to, from, n);
         else /* security hole - plug it */
-                memzero(to, n);
+                memset(to, 0, n);
         return n;
 }
 
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index c74f766ffc12..53d0037a1e9d 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -8,6 +8,7 @@
  * published by the Free Software Foundation.
  */
 #include <linux/module.h>
+#include <linux/sched.h>
 #include <linux/string.h>
 #include <linux/cryptohash.h>
 #include <linux/delay.h>
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index bde52df1c668..991952c644d1 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S
@@ -18,7 +18,7 @@
 __switch_data:
         .long   __mmap_switched
         .long   __data_loc                      @ r4
-        .long   __data_start                    @ r5
+        .long   _data                           @ r5
         .long   __bss_start                     @ r6
         .long   _end                            @ r7
         .long   processor_id                    @ r4
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c
index b8d965dcd6fd..dab48f27263f 100644
--- a/arch/arm/kernel/module.c
+++ b/arch/arm/kernel/module.c
@@ -21,6 +21,7 @@
 #include <linux/string.h>
 
 #include <asm/pgtable.h>
+#include <asm/sections.h>
 
 #ifdef CONFIG_XIP_KERNEL
 /*
@@ -29,9 +30,8 @@
  * MODULES_VADDR is redefined here and not in asm/memory.h to avoid
  * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off.
  */
-extern void _etext;
 #undef MODULES_VADDR
-#define MODULES_VADDR   (((unsigned long)&_etext + ~PGDIR_MASK) & PGDIR_MASK)
+#define MODULES_VADDR   (((unsigned long)_etext + ~PGDIR_MASK) & PGDIR_MASK)
 #endif
 
 #ifdef CONFIG_MMU
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 1f1eecca7f55..7049815d66d5 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -29,6 +29,7 @@
 #include <asm/cputype.h>
 #include <asm/elf.h>
 #include <asm/procinfo.h>
+#include <asm/sections.h>
 #include <asm/setup.h>
 #include <asm/mach-types.h>
 #include <asm/cacheflush.h>
@@ -59,9 +60,8 @@ static int __init fpe_setup(char *line)
 __setup("fpe=", fpe_setup);
 #endif
 
-extern void paging_init(struct meminfo *, struct machine_desc *desc);
+extern void paging_init(struct machine_desc *desc);
 extern void reboot_setup(char *str);
-extern void _text, _etext, __data_start, _edata, _end;
 
 unsigned int processor_id;
 EXPORT_SYMBOL(processor_id);
@@ -112,7 +112,6 @@ static struct stack stacks[NR_CPUS];
 char elf_platform[ELF_PLATFORM_SIZE];
 EXPORT_SYMBOL(elf_platform);
 
-static struct meminfo meminfo __initdata = { 0, };
 static const char *cpu_name;
 static const char *machine_name;
 static char __initdata command_line[COMMAND_LINE_SIZE];
@@ -367,21 +366,34 @@ static struct machine_desc * __init setup_machine(unsigned int nr)
         return list;
 }
 
-static void __init arm_add_memory(unsigned long start, unsigned long size)
+static int __init arm_add_memory(unsigned long start, unsigned long size)
 {
-        struct membank *bank;
+        struct membank *bank = &meminfo.bank[meminfo.nr_banks];
+
+        if (meminfo.nr_banks >= NR_BANKS) {
+                printk(KERN_CRIT "NR_BANKS too low, "
+                        "ignoring memory at %#lx\n", start);
+                return -EINVAL;
+        }
 
         /*
          * Ensure that start/size are aligned to a page boundary.
          * Size is appropriately rounded down, start is rounded up.
          */
         size -= start & ~PAGE_MASK;
-
-        bank = &meminfo.bank[meminfo.nr_banks++];
-
         bank->start = PAGE_ALIGN(start);
         bank->size  = size & PAGE_MASK;
         bank->node  = PHYS_TO_NID(start);
+
+        /*
+         * Check whether this memory region has non-zero size or
+         * invalid node number.
+         */
+        if (bank->size == 0 || bank->node >= MAX_NUMNODES)
+                return -EINVAL;
+
+        meminfo.nr_banks++;
+        return 0;
 }
 
 /*
@@ -472,10 +484,10 @@ request_standard_resources(struct meminfo *mi, struct machine_desc *mdesc)
         struct resource *res;
         int i;
 
-        kernel_code.start   = virt_to_phys(&_text);
-        kernel_code.end     = virt_to_phys(&_etext - 1);
-        kernel_data.start   = virt_to_phys(&__data_start);
-        kernel_data.end     = virt_to_phys(&_end - 1);
+        kernel_code.start   = virt_to_phys(_text);
+        kernel_code.end     = virt_to_phys(_etext - 1);
+        kernel_data.start   = virt_to_phys(_data);
+        kernel_data.end     = virt_to_phys(_end - 1);
 
         for (i = 0; i < mi->nr_banks; i++) {
                 if (mi->bank[i].size == 0)
@@ -539,14 +551,7 @@ __tagtable(ATAG_CORE, parse_tag_core);
 
 static int __init parse_tag_mem32(const struct tag *tag)
 {
-        if (meminfo.nr_banks >= NR_BANKS) {
-                printk(KERN_WARNING
-                       "Ignoring memory bank 0x%08x size %dKB\n",
-                        tag->u.mem.start, tag->u.mem.size / 1024);
-                return -EINVAL;
-        }
-        arm_add_memory(tag->u.mem.start, tag->u.mem.size);
-        return 0;
+        return arm_add_memory(tag->u.mem.start, tag->u.mem.size);
 }
 
 __tagtable(ATAG_MEM, parse_tag_mem32);
@@ -710,15 +715,15 @@ void __init setup_arch(char **cmdline_p)
                 parse_tags(tags);
         }
 
-        init_mm.start_code = (unsigned long) &_text;
-        init_mm.end_code   = (unsigned long) &_etext;
-        init_mm.end_data   = (unsigned long) &_edata;
-        init_mm.brk        = (unsigned long) &_end;
+        init_mm.start_code = (unsigned long) _text;
+        init_mm.end_code   = (unsigned long) _etext;
+        init_mm.end_data   = (unsigned long) _edata;
+        init_mm.brk        = (unsigned long) _end;
 
         memcpy(boot_command_line, from, COMMAND_LINE_SIZE);
         boot_command_line[COMMAND_LINE_SIZE-1] = '\0';
         parse_cmdline(cmdline_p, from);
-        paging_init(&meminfo, mdesc);
+        paging_init(mdesc);
         request_standard_resources(&meminfo, mdesc);
 
 #ifdef CONFIG_SMP
@@ -772,6 +777,8 @@ static const char *hwcap_str[] = {
         "java",
         "iwmmxt",
         "crunch",
+        "thumbee",
+        "neon",
         NULL
 };
 
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index e42a749a56dd..019237d21622 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -181,7 +181,7 @@ int __cpuexit __cpu_disable(void)
         /*
          * Stop the local timer for this CPU.
          */
-        local_timer_stop(cpu);
+        local_timer_stop();
 
         /*
          * Flush user cache and TLB mappings, and then remove this CPU
@@ -284,7 +284,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
         /*
          * Setup local timer for this CPU.
          */
-        local_timer_setup(cpu);
+        local_timer_setup();
 
         calibrate_delay();
 
diff --git a/arch/arm/kernel/thumbee.c b/arch/arm/kernel/thumbee.c
index df3f6b7ebcea..9cb7aaca159f 100644
--- a/arch/arm/kernel/thumbee.c
+++ b/arch/arm/kernel/thumbee.c
@@ -25,7 +25,7 @@
 /*
  * Access to the ThumbEE Handler Base register
  */
-static inline unsigned long teehbr_read()
+static inline unsigned long teehbr_read(void)
 {
         unsigned long v;
         asm("mrc        p14, 6, %0, c1, c0, 0\n" : "=r" (v));
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 4898bdcfe7dd..00216071eaf7 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -119,7 +119,7 @@ SECTIONS
 #endif
 
         .data : AT(__data_loc) {
-                __data_start = .;       /* address in memory */
+                _data = .;              /* address in memory */
 
                 /*
                  * first, the init task union, aligned
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 30351cd4560d..866f84a586ff 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -38,7 +38,6 @@ else
 endif
 
 lib-$(CONFIG_ARCH_RPC)          += ecard.o io-acorn.o floppydma.o
-lib-$(CONFIG_ARCH_CLPS7500)     += io-acorn.o
 lib-$(CONFIG_ARCH_L7200)        += io-acorn.o
 lib-$(CONFIG_ARCH_SHARK)        += io-shark.o
 
diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S
index 761eefa76243..650d5923ab83 100644
--- a/arch/arm/lib/memset.S
+++ b/arch/arm/lib/memset.S
@@ -25,7 +25,7 @@
         add     r2, r2, r3              @ 1 (r2 = r2 - (4 - r3))
 /*
  * The pointer is now aligned and the length is adjusted.  Try doing the
- * memzero again.
+ * memset again.
  */
 
 ENTRY(memset)
diff --git a/arch/arm/mach-aaec2000/Makefile b/arch/arm/mach-aaec2000/Makefile
index a8e462f58bc9..20ec83896c37 100644
--- a/arch/arm/mach-aaec2000/Makefile
+++ b/arch/arm/mach-aaec2000/Makefile
@@ -3,7 +3,7 @@
 #
 
 # Common support (must be linked before board specific support)
-obj-y += core.o clock.o
+obj-y += core.o
 
 # Specific board support
 obj-$(CONFIG_MACH_AAED2000) += aaed2000.o
diff --git a/arch/arm/mach-aaec2000/clock.c b/arch/arm/mach-aaec2000/clock.c
deleted file mode 100644
index e10ee158d720..000000000000
--- a/arch/arm/mach-aaec2000/clock.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- *  linux/arch/arm/mach-aaec2000/clock.c
- *
- *  Copyright (C) 2005 Nicolas Bellido Y Ortega
- *
- *  Based on linux/arch/arm/mach-integrator/clock.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/string.h>
-#include <linux/clk.h>
-#include <linux/mutex.h>
-
-#include "clock.h"
-
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
-        struct clk *p, *clk = ERR_PTR(-ENOENT);
-
-        mutex_lock(&clocks_mutex);
-        list_for_each_entry(p, &clocks, node) {
-                if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
-                        clk = p;
-                        break;
-                }
-        }
-        mutex_unlock(&clocks_mutex);
-
-        return clk;
-}
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-        module_put(clk->owner);
-}
-EXPORT_SYMBOL(clk_put);
-
-int clk_enable(struct clk *clk)
-{
-        return 0;
-}
-EXPORT_SYMBOL(clk_enable);
-
-void clk_disable(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
-        return clk->rate;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-long clk_round_rate(struct clk *clk, unsigned long rate)
-{
-        return rate;
-}
-EXPORT_SYMBOL(clk_round_rate);
-
-int clk_set_rate(struct clk *clk, unsigned long rate)
-{
-        return 0;
-}
-EXPORT_SYMBOL(clk_set_rate);
-
-int clk_register(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_add(&clk->node, &clocks);
-        mutex_unlock(&clocks_mutex);
-        return 0;
-}
-EXPORT_SYMBOL(clk_register);
-
-void clk_unregister(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_del(&clk->node);
-        mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL(clk_unregister);
-
-static int __init clk_init(void)
-{
-        return 0;
-}
-arch_initcall(clk_init);
diff --git a/arch/arm/mach-aaec2000/clock.h b/arch/arm/mach-aaec2000/clock.h
deleted file mode 100644
index d4bb74ff613f..000000000000
--- a/arch/arm/mach-aaec2000/clock.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- *  linux/arch/arm/mach-aaec2000/clock.h
- *
- *  Copyright (C) 2005 Nicolas Bellido Y Ortega
- *
- *  Based on linux/arch/arm/mach-integrator/clock.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-struct module;
-
-struct clk {
-        struct list_head        node;
-        unsigned long           rate;
-        struct module           *owner;
-        const char              *name;
-        void                    *data;
-};
-
-int clk_register(struct clk *clk);
-void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c
index dfb26bc23d1a..50e13965dfed 100644
--- a/arch/arm/mach-aaec2000/core.c
+++ b/arch/arm/mach-aaec2000/core.c
@@ -19,6 +19,7 @@
 #include <linux/interrupt.h>
 #include <linux/timex.h>
 #include <linux/signal.h>
+#include <linux/clk.h>
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
@@ -30,7 +31,6 @@
 #include <asm/mach/map.h>
 
 #include "core.h"
-#include "clock.h"
 
 /*
  * Common I/O mapping:
@@ -229,9 +229,28 @@ static struct amba_device *amba_devs[] __initdata = {
         &clcd_device,
 };
 
-static struct clk aaec2000_clcd_clk = {
-        .name = "CLCDCLK",
-};
+void clk_disable(struct clk *clk)
+{
+}
+
+int clk_set_rate(struct clk *clk, unsigned long rate)
+{
+        return 0;
+}
+
+int clk_enable(struct clk *clk)
+{
+        return 0;
+}
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+        return dev && strcmp(dev_name(dev), "mb:16") == 0 ? NULL : ERR_PTR(-ENOENT);
+}
+
+void clk_put(struct clk *clk)
+{
+}
 
 void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *clcd)
 {
@@ -265,8 +284,6 @@ static int __init aaec2000_init(void)
 {
         int i;
 
-        clk_register(&aaec2000_clcd_clk);
-
         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
                 struct amba_device *d = amba_devs[i];
                 amba_device_register(d, &iomem_resource);
diff --git a/arch/arm/mach-aaec2000/include/mach/dma.h b/arch/arm/mach-aaec2000/include/mach/dma.h
deleted file mode 100644
index 2da846c72fe7..000000000000
--- a/arch/arm/mach-aaec2000/include/mach/dma.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/*
- *  arch/arm/mach-aaec2000/include/mach/dma.h
- *
- *  Copyright (c) 2005 Nicolas Bellido Y Ortega
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  published by the Free Software Foundation.
- */
diff --git a/arch/arm/mach-aaec2000/include/mach/io.h b/arch/arm/mach-aaec2000/include/mach/io.h
index c87c24de1110..ab4fe5d20eaf 100644
--- a/arch/arm/mach-aaec2000/include/mach/io.h
+++ b/arch/arm/mach-aaec2000/include/mach/io.h
@@ -6,15 +6,13 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#include <mach/hardware.h>
-
 #define IO_SPACE_LIMIT 0xffffffff
 
 /*
  * We don't actually have real ISA nor PCI buses, but there is so many
  * drivers out there that might just work if we fake them...
  */
-#define __io(a)                 ((void __iomem *)(a))
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-aaec2000/include/mach/memory.h b/arch/arm/mach-aaec2000/include/mach/memory.h
index 56ae900a482e..c00822543d9f 100644
--- a/arch/arm/mach-aaec2000/include/mach/memory.h
+++ b/arch/arm/mach-aaec2000/include/mach/memory.h
@@ -14,9 +14,6 @@
 
 #define PHYS_OFFSET     UL(0xf0000000)
 
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
 /*
  * The nodes are the followings:
  *
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 5aafb2e2ca7a..323b47f2b52f 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -7,36 +7,43 @@ choice
 
 config ARCH_AT91RM9200
         bool "AT91RM9200"
+        select CPU_ARM920T
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
 
 config ARCH_AT91SAM9260
         bool "AT91SAM9260 or AT91SAM9XE"
+        select CPU_ARM926T
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
 
 config ARCH_AT91SAM9261
         bool "AT91SAM9261"
+        select CPU_ARM926T
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
 
 config ARCH_AT91SAM9263
         bool "AT91SAM9263"
+        select CPU_ARM926T
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
 
 config ARCH_AT91SAM9RL
         bool "AT91SAM9RL"
+        select CPU_ARM926T
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
 
 config ARCH_AT91SAM9G20
         bool "AT91SAM9G20"
+        select CPU_ARM926T
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
 
 config ARCH_AT91CAP9
         bool "AT91CAP9"
+        select CPU_ARM926T
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
 
@@ -235,6 +242,12 @@ config MACH_USB_A9263
           Select this if you are using a Calao Systems USB-A9263.
           <http://www.calao-systems.com>
 
+config MACH_NEOCORE926
+        bool "Adeneo NEOCORE926"
+        depends on ARCH_AT91SAM9263
+        help
+          Select this if you are using the Adeneo Neocore 926 board.
+
 endif
 
 # ----------------------------------------------------------
@@ -302,7 +315,7 @@ comment "AT91 Board Options"
 
 config MTD_AT91_DATAFLASH_CARD
         bool "Enable DataFlash Card support"
-        depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_ECBAT91 || MACH_SAM9_L9260 || MACH_AT91CAP9ADK)
+        depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_ECBAT91 || MACH_SAM9_L9260 || MACH_AT91CAP9ADK || MACH_NEOCORE926)
         help
           Enable support for the DataFlash card.
 
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index cca612d97ca2..c69ff237fd14 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -11,12 +11,12 @@ obj-$(CONFIG_AT91_PMC_UNIT)	+= clock.o
 
 # CPU-specific support
 obj-$(CONFIG_ARCH_AT91RM9200)   += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9260)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9261)  += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9263)  += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9RL)   += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9G20)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o
-obj-$(CONFIG_ARCH_AT91CAP9)     += at91cap9.o at91sam926x_time.o at91cap9_devices.o
+obj-$(CONFIG_ARCH_AT91SAM9260)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9261)  += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9263)  += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9RL)   += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
+obj-$(CONFIG_ARCH_AT91SAM9G20)  += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o  sam9_smc.o
+obj-$(CONFIG_ARCH_AT91CAP9)     += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
 obj-$(CONFIG_ARCH_AT91X40)      += at91x40.o at91x40_time.o
 
 # AT91RM9200 board-specific support
@@ -47,6 +47,7 @@ obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
 # AT91SAM9263 board-specific support
 obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
 obj-$(CONFIG_MACH_USB_A9263)    += board-usb-a9263.o
+obj-$(CONFIG_MACH_NEOCORE926)   += board-neocore926.o
 
 # AT91SAM9RL board-specific support
 obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
index 0fc0adaebd58..0a38c69fdbc4 100644
--- a/arch/arm/mach-at91/at91cap9.c
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -17,6 +17,8 @@
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+
+#include <mach/cpu.h>
 #include <mach/at91cap9.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
@@ -317,6 +319,12 @@ void __init at91cap9_initialize(unsigned long main_clock)
 
         /* Register GPIO subsystem */
         at91_gpio_init(at91cap9_gpio, 4);
+
+        /* Remember the silicon revision */
+        if (cpu_is_at91cap9_revB())
+                system_rev = 0xB;
+        else if (cpu_is_at91cap9_revC())
+                system_rev = 0xC;
 }
 
 /* --------------------------------------------------------------------
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
index 5ebd4273d353..9eca2209cde6 100644
--- a/arch/arm/mach-at91/at91cap9_devices.c
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -13,6 +13,7 @@
  */
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <asm/mach/irq.h>
 
 #include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
@@ -21,6 +22,7 @@
 #include <video/atmel_lcdc.h>
 
 #include <mach/board.h>
+#include <mach/cpu.h>
 #include <mach/gpio.h>
 #include <mach/at91cap9.h>
 #include <mach/at91cap9_matrix.h>
@@ -69,6 +71,9 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
         if (!data)
                 return;
 
+        if (cpu_is_at91cap9_revB())
+                set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
+
         /* Enable VBus control for UHP ports */
         for (i = 0; i < data->ports; i++) {
                 if (data->vbus_pin[i])
@@ -151,8 +156,13 @@ static struct platform_device at91_usba_udc_device = {
 
 void __init at91_add_device_usba(struct usba_platform_data *data)
 {
-        at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
-                                          AT91_MATRIX_UDPHS_BYPASS_LOCK);
+        if (cpu_is_at91cap9_revB()) {
+                set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
+                at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
+                                                  AT91_MATRIX_UDPHS_BYPASS_LOCK);
+        }
+        else
+                at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS);
 
         /*
          * Invalid pins are 0 on AT91, but the usba driver is shared
@@ -406,28 +416,13 @@ static struct platform_device at91cap9_nand_device = {
 
 void __init at91_add_device_nand(struct atmel_nand_data *data)
 {
-        unsigned long csa, mode;
+        unsigned long csa;
 
         if (!data)
                 return;
 
         csa = at91_sys_read(AT91_MATRIX_EBICSA);
-        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
-
-        /* set the bus interface characteristics */
-        at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(1)
-                        | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(1));
-
-        at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(6)
-                        | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(6));
-
-        at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(8) | AT91_SMC_NRDCYCLE_(8));
-
-        if (data->bus_width_16)
-                mode = AT91_SMC_DBW_16;
-        else
-                mode = AT91_SMC_DBW_8;
-        at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
+        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
 
         /* enable pin */
         if (data->enable_pin)
@@ -865,6 +860,9 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
         if (!data)
                 return;
 
+        if (cpu_is_at91cap9_revB())
+                set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
+
         at91_set_A_periph(AT91_PIN_PC1, 0);     /* LCDHSYNC */
         at91_set_A_periph(AT91_PIN_PC2, 0);     /* LCDDOTCK */
         at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDDEN */
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 7774d17dde74..fdde1ea21b07 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -313,7 +313,7 @@ static struct platform_device at91sam9260_nand_device = {
 
 void __init at91_add_device_nand(struct atmel_nand_data *data)
 {
-        unsigned long csa, mode;
+        unsigned long csa;
 
         if (!data)
                 return;
@@ -321,42 +321,6 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         csa = at91_sys_read(AT91_MATRIX_EBICSA);
         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 
-        if (cpu_is_at91sam9260()) {
-                /* Timing for sam9260 */
-                /* set the bus interface characteristics */
-                at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
-                                | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
-
-                at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
-                                | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
-
-                at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
-
-                if (data->bus_width_16)
-                        mode = AT91_SMC_DBW_16;
-                else
-                        mode = AT91_SMC_DBW_8;
-                at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
-        }
-
-        if (cpu_is_at91sam9g20()) {
-                /* Timing for sam9g20 */
-                /* set the bus interface characteristics */
-                at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0)
-                                | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
-
-                at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(4)
-                                | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(4));
-
-                at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
-
-                if (data->bus_width_16)
-                        mode = AT91_SMC_DBW_16;
-                else
-                        mode = AT91_SMC_DBW_8;
-                at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(3));
-        }
-
         /* enable pin */
         if (data->enable_pin)
                 at91_set_gpio_output(data->enable_pin, 1);
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 6b89172310c7..17289756f80f 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -223,7 +223,7 @@ static struct platform_device atmel_nand_device = {
 
 void __init at91_add_device_nand(struct atmel_nand_data *data)
 {
-        unsigned long csa, mode;
+        unsigned long csa;
 
         if (!data)
                 return;
@@ -231,21 +231,6 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         csa = at91_sys_read(AT91_MATRIX_EBICSA);
         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 
-        /* set the bus interface characteristics */
-        at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
-                        | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
-
-        at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
-                        | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
-
-        at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
-
-        if (data->bus_width_16)
-                mode = AT91_SMC_DBW_16;
-        else
-                mode = AT91_SMC_DBW_8;
-        at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
-
         /* enable pin */
         if (data->enable_pin)
                 at91_set_gpio_output(data->enable_pin, 1);
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 8b884083f76d..b753cb879d8e 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -382,7 +382,7 @@ static struct platform_device at91sam9263_nand_device = {
 
 void __init at91_add_device_nand(struct atmel_nand_data *data)
 {
-        unsigned long csa, mode;
+        unsigned long csa;
 
         if (!data)
                 return;
@@ -390,21 +390,6 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
         at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
 
-        /* set the bus interface characteristics */
-        at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
-                        | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
-
-        at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
-                        | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
-
-        at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
-
-        if (data->bus_width_16)
-                mode = AT91_SMC_DBW_16;
-        else
-                mode = AT91_SMC_DBW_8;
-        at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
-
         /* enable pin */
         if (data->enable_pin)
                 at91_set_gpio_output(data->enable_pin, 1);
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 87deb1e1b529..145324f4ec56 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -232,17 +232,6 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
         csa = at91_sys_read(AT91_MATRIX_EBICSA);
         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 
-        /* set the bus interface characteristics */
-        at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0)
-                        | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
-
-        at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
-                        | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
-
-        at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
-
-        at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_DBW_8 | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
-
         /* enable pin */
         if (data->enable_pin)
                 at91_set_gpio_output(data->enable_pin, 1);
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c
index cdddca54b938..d3ba29c5d8c8 100644
--- a/arch/arm/mach-at91/board-cam60.c
+++ b/arch/arm/mach-at91/board-cam60.c
@@ -39,7 +39,9 @@
 
 #include <mach/board.h>
 #include <mach/gpio.h>
+#include <mach/at91sam9_smc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -151,6 +153,32 @@ static struct atmel_nand_data __initdata cam60_nand_data = {
         .partition_info = nand_partitions,
 };
 
+static struct sam9_smc_config __initdata cam60_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 3,
+        .nrd_pulse              = 3,
+        .ncs_write_pulse        = 3,
+        .nwe_pulse              = 3,
+
+        .read_cycle             = 5,
+        .write_cycle            = 5,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
+        .tdf_cycles             = 2,
+};
+
+static void __init cam60_add_device_nand(void)
+{
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &cam60_nand_smc_config);
+
+        at91_add_device_nand(&cam60_nand_data);
+}
+
 
 static void __init cam60_board_init(void)
 {
@@ -165,7 +193,7 @@ static void __init cam60_board_init(void)
         at91_set_gpio_output(AT91_PIN_PB18, 1);
         at91_add_device_usbh(&cam60_usbh_data);
         /* NAND */
-        at91_add_device_nand(&cam60_nand_data);
+        cam60_add_device_nand();
 }
 
 MACHINE_START(CAM60, "KwikByte CAM60")
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index 201b89392dcc..83a1a0fef47b 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -36,17 +36,16 @@
 #include <mach/hardware.h>
 #include <asm/setup.h>
 #include <asm/mach-types.h>
-#include <asm/irq.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/mach/irq.h>
 
 #include <mach/board.h>
 #include <mach/gpio.h>
 #include <mach/at91cap9_matrix.h>
 #include <mach/at91sam9_smc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -195,6 +194,43 @@ static struct atmel_nand_data __initdata cap9adk_nand_data = {
 #endif
 };
 
+static struct sam9_smc_config __initdata cap9adk_nand_smc_config = {
+        .ncs_read_setup         = 1,
+        .nrd_setup              = 2,
+        .ncs_write_setup        = 1,
+        .nwe_setup              = 2,
+
+        .ncs_read_pulse         = 6,
+        .nrd_pulse              = 4,
+        .ncs_write_pulse        = 6,
+        .nwe_pulse              = 4,
+
+        .read_cycle             = 8,
+        .write_cycle            = 8,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
+        .tdf_cycles             = 1,
+};
+
+static void __init cap9adk_add_device_nand(void)
+{
+        unsigned long csa;
+
+        csa = at91_sys_read(AT91_MATRIX_EBICSA);
+        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
+
+        /* setup bus-width (8 or 16) */
+        if (cap9adk_nand_data.bus_width_16)
+                cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16;
+        else
+                cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8;
+
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &cap9adk_nand_smc_config);
+
+        at91_add_device_nand(&cap9adk_nand_data);
+}
+
 
 /*
  * NOR flash
@@ -234,6 +270,24 @@ static struct platform_device cap9adk_nor_flash = {
         .num_resources  = ARRAY_SIZE(nor_flash_resources),
 };
 
+static struct sam9_smc_config __initdata cap9adk_nor_smc_config = {
+        .ncs_read_setup         = 2,
+        .nrd_setup              = 4,
+        .ncs_write_setup        = 2,
+        .nwe_setup              = 4,
+
+        .ncs_read_pulse         = 10,
+        .nrd_pulse              = 8,
+        .ncs_write_pulse        = 10,
+        .nwe_pulse              = 8,
+
+        .read_cycle             = 16,
+        .write_cycle            = 16,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16,
+        .tdf_cycles             = 1,
+};
+
 static __init void cap9adk_add_device_nor(void)
 {
         unsigned long csa;
@@ -241,18 +295,8 @@ static __init void cap9adk_add_device_nor(void)
         csa = at91_sys_read(AT91_MATRIX_EBICSA);
         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
 
-        /* set the bus interface characteristics */
-        at91_sys_write(AT91_SMC_SETUP(0), AT91_SMC_NWESETUP_(4) | AT91_SMC_NCS_WRSETUP_(2)
-                        | AT91_SMC_NRDSETUP_(4) | AT91_SMC_NCS_RDSETUP_(2));
-
-        at91_sys_write(AT91_SMC_PULSE(0), AT91_SMC_NWEPULSE_(8) | AT91_SMC_NCS_WRPULSE_(10)
-                        | AT91_SMC_NRDPULSE_(8) | AT91_SMC_NCS_RDPULSE_(10));
-
-        at91_sys_write(AT91_SMC_CYCLE(0), AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
-
-        at91_sys_write(AT91_SMC_MODE(0), AT91_SMC_READMODE | AT91_SMC_WRITEMODE
-                        | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE
-                        | AT91_SMC_DBW_16 | AT91_SMC_TDF_(1));
+        /* configure chip-select 0 (NOR) */
+        sam9_smc_configure(0, &cap9adk_nor_smc_config);
 
         platform_device_register(&cap9adk_nor_flash);
 }
@@ -330,10 +374,8 @@ static void __init cap9adk_board_init(void)
         /* Serial */
         at91_add_device_serial();
         /* USB Host */
-        set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
         at91_add_device_usbh(&cap9adk_usbh_data);
         /* USB HS */
-        set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
         at91_add_device_usba(&cap9adk_usba_udc_data);
         /* SPI */
         at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices));
@@ -344,13 +386,12 @@ static void __init cap9adk_board_init(void)
         /* Ethernet */
         at91_add_device_eth(&cap9adk_macb_data);
         /* NAND */
-        at91_add_device_nand(&cap9adk_nand_data);
+        cap9adk_add_device_nand();
         /* NOR Flash */
         cap9adk_add_device_nor();
         /* I2C */
         at91_add_device_i2c(NULL, 0);
         /* LCD Controller */
-        set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
         at91_add_device_lcdc(&cap9adk_lcdc_data);
         /* AC97 */
         at91_add_device_ac97(&cap9adk_ac97_data);
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c
new file mode 100644
index 000000000000..9ba7ba2cc3b1
--- /dev/null
+++ b/arch/arm/mach-at91/board-neocore926.c
@@ -0,0 +1,397 @@
+/*
+ * linux/arch/arm/mach-at91/board-neocore926.c
+ *
+ *  Copyright (C) 2005 SAN People
+ *  Copyright (C) 2007 Atmel Corporation
+ *  Copyright (C) 2008 ADENEO.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/ads7846.h>
+#include <linux/fb.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+
+#include <video/atmel_lcdc.h>
+
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+#include <asm/sizes.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <mach/hardware.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
+#include <mach/at91sam9_smc.h>
+
+#include "sam9_smc.h"
+#include "generic.h"
+
+
+static void __init neocore926_map_io(void)
+{
+        /* Initialize processor: 20 MHz crystal */
+        at91sam9263_initialize(20000000);
+
+        /* DGBU on ttyS0. (Rx & Tx only) */
+        at91_register_uart(0, 0, 0);
+
+        /* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
+        at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+        /* set serial console to ttyS0 (ie, DBGU) */
+        at91_set_serial_console(0);
+}
+
+static void __init neocore926_init_irq(void)
+{
+        at91sam9263_init_interrupts(NULL);
+}
+
+
+/*
+ * USB Host port
+ */
+static struct at91_usbh_data __initdata neocore926_usbh_data = {
+        .ports          = 2,
+        .vbus_pin       = { AT91_PIN_PA24, AT91_PIN_PA21 },
+};
+
+/*
+ * USB Device port
+ */
+static struct at91_udc_data __initdata neocore926_udc_data = {
+        .vbus_pin       = AT91_PIN_PA25,
+        .pullup_pin     = 0,            /* pull-up driven by UDC */
+};
+
+
+/*
+ * ADS7846 Touchscreen
+ */
+#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
+static int ads7843_pendown_state(void)
+{
+        return !at91_get_gpio_value(AT91_PIN_PA15);     /* Touchscreen PENIRQ */
+}
+
+static struct ads7846_platform_data ads_info = {
+        .model                  = 7843,
+        .x_min                  = 150,
+        .x_max                  = 3830,
+        .y_min                  = 190,
+        .y_max                  = 3830,
+        .vref_delay_usecs       = 100,
+        .x_plate_ohms           = 450,
+        .y_plate_ohms           = 250,
+        .pressure_max           = 15000,
+        .debounce_max           = 1,
+        .debounce_rep           = 0,
+        .debounce_tol           = (~0),
+        .get_pendown_state      = ads7843_pendown_state,
+};
+
+static void __init neocore926_add_device_ts(void)
+{
+        at91_set_B_periph(AT91_PIN_PA15, 1);    /* External IRQ1, with pullup */
+        at91_set_gpio_input(AT91_PIN_PC13, 1);  /* Touchscreen BUSY signal */
+}
+#else
+static void __init neocore926_add_device_ts(void) {}
+#endif
+
+/*
+ * SPI devices.
+ */
+static struct spi_board_info neocore926_spi_devices[] = {
+#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
+        {       /* DataFlash card */
+                .modalias       = "mtd_dataflash",
+                .chip_select    = 0,
+                .max_speed_hz   = 15 * 1000 * 1000,
+                .bus_num        = 0,
+        },
+#endif
+#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
+        {
+                .modalias       = "ads7846",
+                .chip_select    = 1,
+                .max_speed_hz   = 125000 * 16,
+                .bus_num        = 0,
+                .platform_data  = &ads_info,
+                .irq            = AT91SAM9263_ID_IRQ1,
+        },
+#endif
+};
+
+
+/*
+ * MCI (SD/MMC)
+ */
+static struct at91_mmc_data __initdata neocore926_mmc_data = {
+        .wire4          = 1,
+        .det_pin        = AT91_PIN_PE18,
+        .wp_pin         = AT91_PIN_PE19,
+};
+
+
+/*
+ * MACB Ethernet device
+ */
+static struct at91_eth_data __initdata neocore926_macb_data = {
+        .phy_irq_pin    = AT91_PIN_PE31,
+        .is_rmii        = 1,
+};
+
+
+/*
+ * NAND flash
+ */
+static struct mtd_partition __initdata neocore926_nand_partition[] = {
+        {
+                .name   = "Linux Kernel",       /* "Partition 1", */
+                .offset = 0,
+                .size   = SZ_8M,
+        },
+        {
+                .name   = "Filesystem",         /* "Partition 2", */
+                .offset = MTDPART_OFS_NXTBLK,
+                .size   = SZ_32M,
+        },
+        {
+                .name   = "Free",               /* "Partition 3", */
+                .offset = MTDPART_OFS_NXTBLK,
+                .size   = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(neocore926_nand_partition);
+        return neocore926_nand_partition;
+}
+
+static struct atmel_nand_data __initdata neocore926_nand_data = {
+        .ale                    = 21,
+        .cle                    = 22,
+        .rdy_pin                = AT91_PIN_PB19,
+        .rdy_pin_active_low     = 1,
+        .enable_pin             = AT91_PIN_PD15,
+        .partition_info         = nand_partitions,
+};
+
+static struct sam9_smc_config __initdata neocore926_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 4,
+        .nrd_pulse              = 4,
+        .ncs_write_pulse        = 4,
+        .nwe_pulse              = 4,
+
+        .read_cycle             = 6,
+        .write_cycle            = 6,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
+        .tdf_cycles             = 2,
+};
+
+static void __init neocore926_add_device_nand(void)
+{
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &neocore926_nand_smc_config);
+
+        at91_add_device_nand(&neocore926_nand_data);
+}
+
+
+/*
+ * LCD Controller
+ */
+#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
+static struct fb_videomode at91_tft_vga_modes[] = {
+        {
+                .name           = "TX09D50VM1CCA @ 60",
+                .refresh        = 60,
+                .xres           = 240,          .yres           = 320,
+                .pixclock       = KHZ2PICOS(5000),
+
+                .left_margin    = 1,            .right_margin   = 33,
+                .upper_margin   = 1,            .lower_margin   = 0,
+                .hsync_len      = 5,            .vsync_len      = 1,
+
+                .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+                .vmode          = FB_VMODE_NONINTERLACED,
+        },
+};
+
+static struct fb_monspecs at91fb_default_monspecs = {
+        .manufacturer   = "HIT",
+        .monitor        = "TX09D70VM1CCA",
+
+        .modedb         = at91_tft_vga_modes,
+        .modedb_len     = ARRAY_SIZE(at91_tft_vga_modes),
+        .hfmin          = 15000,
+        .hfmax          = 64000,
+        .vfmin          = 50,
+        .vfmax          = 150,
+};
+
+#define AT91SAM9263_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
+                                        | ATMEL_LCDC_DISTYPE_TFT \
+                                        | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
+
+static void at91_lcdc_power_control(int on)
+{
+        at91_set_gpio_value(AT91_PIN_PA30, on);
+}
+
+/* Driver datas */
+static struct atmel_lcdfb_info __initdata neocore926_lcdc_data = {
+        .lcdcon_is_backlight            = true,
+        .default_bpp                    = 16,
+        .default_dmacon                 = ATMEL_LCDC_DMAEN,
+        .default_lcdcon2                = AT91SAM9263_DEFAULT_LCDCON2,
+        .default_monspecs               = &at91fb_default_monspecs,
+        .atmel_lcdfb_power_control      = at91_lcdc_power_control,
+        .guard_time                     = 1,
+        .lcd_wiring_mode                = ATMEL_LCDC_WIRING_RGB555,
+};
+
+#else
+static struct atmel_lcdfb_info __initdata neocore926_lcdc_data;
+#endif
+
+
+/*
+ * GPIO Buttons
+ */
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+static struct gpio_keys_button neocore926_buttons[] = {
+        {       /* BP1, "leftclic" */
+                .code           = BTN_LEFT,
+                .gpio           = AT91_PIN_PC5,
+                .active_low     = 1,
+                .desc           = "left_click",
+                .wakeup         = 1,
+        },
+        {       /* BP2, "rightclic" */
+                .code           = BTN_RIGHT,
+                .gpio           = AT91_PIN_PC4,
+                .active_low     = 1,
+                .desc           = "right_click",
+                .wakeup         = 1,
+        },
+};
+
+static struct gpio_keys_platform_data neocore926_button_data = {
+        .buttons        = neocore926_buttons,
+        .nbuttons       = ARRAY_SIZE(neocore926_buttons),
+};
+
+static struct platform_device neocore926_button_device = {
+        .name           = "gpio-keys",
+        .id             = -1,
+        .num_resources  = 0,
+        .dev            = {
+                .platform_data  = &neocore926_button_data,
+        }
+};
+
+static void __init neocore926_add_device_buttons(void)
+{
+        at91_set_GPIO_periph(AT91_PIN_PC5, 0);  /* left button */
+        at91_set_deglitch(AT91_PIN_PC5, 1);
+        at91_set_GPIO_periph(AT91_PIN_PC4, 0);  /* right button */
+        at91_set_deglitch(AT91_PIN_PC4, 1);
+
+        platform_device_register(&neocore926_button_device);
+}
+#else
+static void __init neocore926_add_device_buttons(void) {}
+#endif
+
+
+/*
+ * AC97
+ */
+static struct atmel_ac97_data neocore926_ac97_data = {
+        .reset_pin      = AT91_PIN_PA13,
+};
+
+
+static void __init neocore926_board_init(void)
+{
+        /* Serial */
+        at91_add_device_serial();
+
+        /* USB Host */
+        at91_add_device_usbh(&neocore926_usbh_data);
+
+        /* USB Device */
+        at91_add_device_udc(&neocore926_udc_data);
+
+        /* SPI */
+        at91_set_gpio_output(AT91_PIN_PE20, 1);         /* select spi0 clock */
+        at91_add_device_spi(neocore926_spi_devices, ARRAY_SIZE(neocore926_spi_devices));
+
+        /* Touchscreen */
+        neocore926_add_device_ts();
+
+        /* MMC */
+        at91_add_device_mmc(1, &neocore926_mmc_data);
+
+        /* Ethernet */
+        at91_add_device_eth(&neocore926_macb_data);
+
+        /* NAND */
+        neocore926_add_device_nand();
+
+        /* I2C */
+        at91_add_device_i2c(NULL, 0);
+
+        /* LCD Controller */
+        at91_add_device_lcdc(&neocore926_lcdc_data);
+
+        /* Push Buttons */
+        neocore926_add_device_buttons();
+
+        /* AC97 */
+        at91_add_device_ac97(&neocore926_ac97_data);
+}
+
+MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926")
+        /* Maintainer: ADENEO */
+        .phys_io        = AT91_BASE_SYS,
+        .io_pg_offst    = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
+        .boot_params    = AT91_SDRAM_BASE + 0x100,
+        .timer          = &at91sam926x_timer,
+        .map_io         = neocore926_map_io,
+        .init_irq       = neocore926_init_irq,
+        .init_machine   = neocore926_board_init,
+MACHINE_END
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c
index cfb4571a2e27..4cff9a7e61d2 100644
--- a/arch/arm/mach-at91/board-qil-a9260.c
+++ b/arch/arm/mach-at91/board-qil-a9260.c
@@ -41,8 +41,10 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
 #include <mach/gpio.h>
+#include <mach/at91sam9_smc.h>
 #include <mach/at91_shdwc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -147,13 +149,34 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
         .partition_info = nand_partitions,
-#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
-        .bus_width_16   = 1,
-#else
-        .bus_width_16   = 0,
-#endif
 };
 
+static struct sam9_smc_config __initdata ek_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 3,
+        .nrd_pulse              = 3,
+        .ncs_write_pulse        = 3,
+        .nwe_pulse              = 3,
+
+        .read_cycle             = 5,
+        .write_cycle            = 5,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
+        .tdf_cycles             = 2,
+};
+
+static void __init ek_add_device_nand(void)
+{
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &ek_nand_smc_config);
+
+        at91_add_device_nand(&ek_nand_data);
+}
+
 /*
  * MCI (SD/MMC)
  */
@@ -227,7 +250,7 @@ static void __init ek_board_init(void)
         /* SPI */
         at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
         /* NAND */
-        at91_add_device_nand(&ek_nand_data);
+        ek_add_device_nand();
         /* I2C */
         at91_add_device_i2c(NULL, 0);
         /* Ethernet */
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c
index 99bb4cc23a09..b48346977534 100644
--- a/arch/arm/mach-at91/board-sam9-l9260.c
+++ b/arch/arm/mach-at91/board-sam9-l9260.c
@@ -38,7 +38,9 @@
 
 #include <mach/board.h>
 #include <mach/gpio.h>
+#include <mach/at91sam9_smc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -148,13 +150,34 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
         .partition_info = nand_partitions,
-#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
-        .bus_width_16   = 1,
-#else
-        .bus_width_16   = 0,
-#endif
 };
 
+static struct sam9_smc_config __initdata ek_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 3,
+        .nrd_pulse              = 3,
+        .ncs_write_pulse        = 3,
+        .nwe_pulse              = 3,
+
+        .read_cycle             = 5,
+        .write_cycle            = 5,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
+        .tdf_cycles             = 2,
+};
+
+static void __init ek_add_device_nand(void)
+{
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &ek_nand_smc_config);
+
+        at91_add_device_nand(&ek_nand_data);
+}
+
 
 /*
  * MCI (SD/MMC)
@@ -178,7 +201,7 @@ static void __init ek_board_init(void)
         /* SPI */
         at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
         /* NAND */
-        at91_add_device_nand(&ek_nand_data);
+        ek_add_device_nand();
         /* Ethernet */
         at91_add_device_eth(&ek_macb_data);
         /* MMC */
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index b49eb6e4918a..93a0f8b100eb 100644
--- a/arch/arm/mach-at91/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -42,7 +42,10 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
 #include <mach/gpio.h>
+#include <mach/at91sam9_smc.h>
+#include <mach/at91_shdwc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -195,6 +198,38 @@ static struct atmel_nand_data __initdata ek_nand_data = {
 #endif
 };
 
+static struct sam9_smc_config __initdata ek_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 3,
+        .nrd_pulse              = 3,
+        .ncs_write_pulse        = 3,
+        .nwe_pulse              = 3,
+
+        .read_cycle             = 5,
+        .write_cycle            = 5,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
+        .tdf_cycles             = 2,
+};
+
+static void __init ek_add_device_nand(void)
+{
+        /* setup bus-width (8 or 16) */
+        if (ek_nand_data.bus_width_16)
+                ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
+        else
+                ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
+
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &ek_nand_smc_config);
+
+        at91_add_device_nand(&ek_nand_data);
+}
+
 
 /*
  * MCI (SD/MMC)
@@ -303,7 +338,7 @@ static void __init ek_board_init(void)
         /* SPI */
         at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
         /* NAND */
-        at91_add_device_nand(&ek_nand_data);
+        ek_add_device_nand();
         /* Ethernet */
         at91_add_device_eth(&ek_macb_data);
         /* MMC */
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index 4977409d4fc6..d5266da55311 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -47,7 +47,9 @@
 #include <mach/board.h>
 #include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
+#include <mach/at91_shdwc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -76,7 +78,7 @@ static void __init ek_init_irq(void)
  * DM9000 ethernet device
  */
 #if defined(CONFIG_DM9000)
-static struct resource at91sam9261_dm9000_resource[] = {
+static struct resource dm9000_resource[] = {
         [0] = {
                 .start  = AT91_CHIPSELECT_2,
                 .end    = AT91_CHIPSELECT_2 + 3,
@@ -98,27 +100,42 @@ static struct dm9000_plat_data dm9000_platdata = {
         .flags          = DM9000_PLATF_16BITONLY,
 };
 
-static struct platform_device at91sam9261_dm9000_device = {
+static struct platform_device dm9000_device = {
         .name           = "dm9000",
         .id             = 0,
-        .num_resources  = ARRAY_SIZE(at91sam9261_dm9000_resource),
-        .resource       = at91sam9261_dm9000_resource,
+        .num_resources  = ARRAY_SIZE(dm9000_resource),
+        .resource       = dm9000_resource,
         .dev            = {
                 .platform_data  = &dm9000_platdata,
         }
 };
 
+/*
+ * SMC timings for the DM9000.
+ * Note: These timings were calculated for MASTER_CLOCK = 100000000 according to the DM9000 timings.
+ */
+static struct sam9_smc_config __initdata dm9000_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 2,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 2,
+
+        .ncs_read_pulse         = 8,
+        .nrd_pulse              = 4,
+        .ncs_write_pulse        = 8,
+        .nwe_pulse              = 4,
+
+        .read_cycle             = 16,
+        .write_cycle            = 16,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16,
+        .tdf_cycles             = 1,
+};
+
 static void __init ek_add_device_dm9000(void)
 {
-        /*
-         * Configure Chip-Select 2 on SMC for the DM9000.
-         * Note: These timings were calculated for MASTER_CLOCK = 100000000
-         *  according to the DM9000 timings.
-         */
-        at91_sys_write(AT91_SMC_SETUP(2), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
-        at91_sys_write(AT91_SMC_PULSE(2), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8));
-        at91_sys_write(AT91_SMC_CYCLE(2), AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
-        at91_sys_write(AT91_SMC_MODE(2), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | AT91_SMC_TDF_(1));
+        /* Configure chip-select 2 (DM9000) */
+        sam9_smc_configure(2, &dm9000_smc_config);
 
         /* Configure Reset signal as output */
         at91_set_gpio_output(AT91_PIN_PC10, 0);
@@ -126,7 +143,7 @@ static void __init ek_add_device_dm9000(void)
         /* Configure Interrupt pin as input, no pull-up */
         at91_set_gpio_input(AT91_PIN_PC11, 0);
 
-        platform_device_register(&at91sam9261_dm9000_device);
+        platform_device_register(&dm9000_device);
 }
 #else
 static void __init ek_add_device_dm9000(void) {}
@@ -197,6 +214,39 @@ static struct atmel_nand_data __initdata ek_nand_data = {
 #endif
 };
 
+static struct sam9_smc_config __initdata ek_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 3,
+        .nrd_pulse              = 3,
+        .ncs_write_pulse        = 3,
+        .nwe_pulse              = 3,
+
+        .read_cycle             = 5,
+        .write_cycle            = 5,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
+        .tdf_cycles             = 2,
+};
+
+static void __init ek_add_device_nand(void)
+{
+        /* setup bus-width (8 or 16) */
+        if (ek_nand_data.bus_width_16)
+                ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
+        else
+                ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
+
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &ek_nand_smc_config);
+
+        at91_add_device_nand(&ek_nand_data);
+}
+
+
 /*
  * ADS7846 Touchscreen
  */
@@ -525,7 +575,7 @@ static void __init ek_board_init(void)
         /* I2C */
         at91_add_device_i2c(NULL, 0);
         /* NAND */
-        at91_add_device_nand(&ek_nand_data);
+        ek_add_device_nand();
         /* DM9000 ethernet */
         ek_add_device_dm9000();
 
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index 8354015c6a23..57d52528f224 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -46,7 +46,9 @@
 #include <mach/board.h>
 #include <mach/gpio.h>
 #include <mach/at91sam9_smc.h>
+#include <mach/at91_shdwc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -203,6 +205,38 @@ static struct atmel_nand_data __initdata ek_nand_data = {
 #endif
 };
 
+static struct sam9_smc_config __initdata ek_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 3,
+        .nrd_pulse              = 3,
+        .ncs_write_pulse        = 3,
+        .nwe_pulse              = 3,
+
+        .read_cycle             = 5,
+        .write_cycle            = 5,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
+        .tdf_cycles             = 2,
+};
+
+static void __init ek_add_device_nand(void)
+{
+        /* setup bus-width (8 or 16) */
+        if (ek_nand_data.bus_width_16)
+                ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
+        else
+                ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
+
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &ek_nand_smc_config);
+
+        at91_add_device_nand(&ek_nand_data);
+}
+
 
 /*
  * I2C devices
@@ -385,7 +419,7 @@ static void __init ek_board_init(void)
         /* Ethernet */
         at91_add_device_eth(&ek_macb_data);
         /* NAND */
-        at91_add_device_nand(&ek_nand_data);
+        ek_add_device_nand();
         /* I2C */
         at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
         /* LCD Controller */
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c
index b588ead14d68..81439fe6fb3d 100644
--- a/arch/arm/mach-at91/board-sam9g20ek.c
+++ b/arch/arm/mach-at91/board-sam9g20ek.c
@@ -37,7 +37,9 @@
 
 #include <mach/board.h>
 #include <mach/gpio.h>
+#include <mach/at91sam9_smc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -156,6 +158,38 @@ static struct atmel_nand_data __initdata ek_nand_data = {
 #endif
 };
 
+static struct sam9_smc_config __initdata ek_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 2,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 2,
+
+        .ncs_read_pulse         = 4,
+        .nrd_pulse              = 4,
+        .ncs_write_pulse        = 4,
+        .nwe_pulse              = 4,
+
+        .read_cycle             = 7,
+        .write_cycle            = 7,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
+        .tdf_cycles             = 3,
+};
+
+static void __init ek_add_device_nand(void)
+{
+        /* setup bus-width (8 or 16) */
+        if (ek_nand_data.bus_width_16)
+                ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
+        else
+                ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
+
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &ek_nand_smc_config);
+
+        at91_add_device_nand(&ek_nand_data);
+}
+
 
 /*
  * MCI (SD/MMC)
@@ -195,7 +229,7 @@ static void __init ek_board_init(void)
         /* SPI */
         at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
         /* NAND */
-        at91_add_device_nand(&ek_nand_data);
+        ek_add_device_nand();
         /* Ethernet */
         at91_add_device_eth(&ek_macb_data);
         /* MMC */
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c
index 270851864308..9b937ee4815a 100644
--- a/arch/arm/mach-at91/board-sam9rlek.c
+++ b/arch/arm/mach-at91/board-sam9rlek.c
@@ -29,8 +29,9 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
 #include <mach/gpio.h>
-#include <mach/at91sam9_smc.h>
+#include <mach/at91_shdwc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -103,9 +104,34 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .rdy_pin        = AT91_PIN_PD17,
         .enable_pin     = AT91_PIN_PB6,
         .partition_info = nand_partitions,
-        .bus_width_16   = 0,
 };
 
+static struct sam9_smc_config __initdata ek_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 3,
+        .nrd_pulse              = 3,
+        .ncs_write_pulse        = 3,
+        .nwe_pulse              = 3,
+
+        .read_cycle             = 5,
+        .write_cycle            = 5,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
+        .tdf_cycles             = 2,
+};
+
+static void __init ek_add_device_nand(void)
+{
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &ek_nand_smc_config);
+
+        at91_add_device_nand(&ek_nand_data);
+}
+
 
 /*
  * SPI devices
@@ -188,7 +214,7 @@ static void __init ek_board_init(void)
         /* I2C */
         at91_add_device_i2c(NULL, 0);
         /* NAND */
-        at91_add_device_nand(&ek_nand_data);
+        ek_add_device_nand();
         /* SPI */
         at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
         /* MMC */
diff --git a/arch/arm/mach-at91/board-usb-a9260.c b/arch/arm/mach-at91/board-usb-a9260.c
index 7c350357333a..d13304c0bc45 100644
--- a/arch/arm/mach-at91/board-usb-a9260.c
+++ b/arch/arm/mach-at91/board-usb-a9260.c
@@ -41,8 +41,10 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
 #include <mach/gpio.h>
+#include <mach/at91sam9_smc.h>
 #include <mach/at91_shdwc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -121,13 +123,34 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .rdy_pin        = AT91_PIN_PC13,
         .enable_pin     = AT91_PIN_PC14,
         .partition_info = nand_partitions,
-#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
-        .bus_width_16   = 1,
-#else
-        .bus_width_16   = 0,
-#endif
 };
 
+static struct sam9_smc_config __initdata ek_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 3,
+        .nrd_pulse              = 3,
+        .ncs_write_pulse        = 3,
+        .nwe_pulse              = 3,
+
+        .read_cycle             = 5,
+        .write_cycle            = 5,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
+        .tdf_cycles             = 2,
+};
+
+static void __init ek_add_device_nand(void)
+{
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &ek_nand_smc_config);
+
+        at91_add_device_nand(&ek_nand_data);
+}
+
 /*
  * GPIO Buttons
  */
@@ -189,7 +212,7 @@ static void __init ek_board_init(void)
         /* USB Device */
         at91_add_device_udc(&ek_udc_data);
         /* NAND */
-        at91_add_device_nand(&ek_nand_data);
+        ek_add_device_nand();
         /* I2C */
         at91_add_device_i2c(NULL, 0);
         /* Ethernet */
diff --git a/arch/arm/mach-at91/board-usb-a9263.c b/arch/arm/mach-at91/board-usb-a9263.c
index 391b566c4571..d96405b7d578 100644
--- a/arch/arm/mach-at91/board-usb-a9263.c
+++ b/arch/arm/mach-at91/board-usb-a9263.c
@@ -40,8 +40,10 @@
 #include <mach/hardware.h>
 #include <mach/board.h>
 #include <mach/gpio.h>
+#include <mach/at91sam9_smc.h>
 #include <mach/at91_shdwc.h>
 
+#include "sam9_smc.h"
 #include "generic.h"
 
 
@@ -134,13 +136,35 @@ static struct atmel_nand_data __initdata ek_nand_data = {
         .rdy_pin        = AT91_PIN_PA22,
         .enable_pin     = AT91_PIN_PD15,
         .partition_info = nand_partitions,
-#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
-        .bus_width_16   = 1,
-#else
-        .bus_width_16   = 0,
-#endif
 };
 
+static struct sam9_smc_config __initdata ek_nand_smc_config = {
+        .ncs_read_setup         = 0,
+        .nrd_setup              = 1,
+        .ncs_write_setup        = 0,
+        .nwe_setup              = 1,
+
+        .ncs_read_pulse         = 3,
+        .nrd_pulse              = 3,
+        .ncs_write_pulse        = 3,
+        .nwe_pulse              = 3,
+
+        .read_cycle             = 5,
+        .write_cycle            = 5,
+
+        .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
+        .tdf_cycles             = 2,
+};
+
+static void __init ek_add_device_nand(void)
+{
+        /* configure chip-select 3 (NAND) */
+        sam9_smc_configure(3, &ek_nand_smc_config);
+
+        at91_add_device_nand(&ek_nand_data);
+}
+
+
 /*
  * GPIO Buttons
  */
@@ -206,7 +230,7 @@ static void __init ek_board_init(void)
         /* Ethernet */
         at91_add_device_eth(&ek_macb_data);
         /* NAND */
-        at91_add_device_nand(&ek_nand_data);
+        ek_add_device_nand();
         /* I2C */
         at91_add_device_i2c(NULL, 0);
         /* Push Buttons */
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 2e3f2894b704..9561e33b8a9a 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -23,6 +23,7 @@
 #define         AT91_PMC_PCK            (1 <<  0)               /* Processor Clock */
 #define         AT91RM9200_PMC_UDP      (1 <<  1)               /* USB Devcice Port Clock [AT91RM9200 only] */
 #define         AT91RM9200_PMC_MCKUDP   (1 <<  2)               /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
+#define         AT91CAP9_PMC_DDR        (1 <<  2)               /* DDR Clock [AT91CAP9 revC only] */
 #define         AT91RM9200_PMC_UHP      (1 <<  4)               /* USB Host Port Clock [AT91RM9200 only] */
 #define         AT91SAM926x_PMC_UHP     (1 <<  6)               /* USB Host Port Clock [AT91SAM926x only] */
 #define         AT91CAP9_PMC_UHP        (1 <<  6)               /* USB Host Port Clock [AT91CAP9 only] */
@@ -102,10 +103,16 @@
 #define         AT91_PMC_LOCKB          (1 <<  2)               /* PLLB Lock */
 #define         AT91_PMC_MCKRDY         (1 <<  3)               /* Master Clock */
 #define         AT91_PMC_LOCKU          (1 <<  6)               /* UPLL Lock [AT91CAP9 only] */
+#define         AT91_PMC_OSCSEL         (1 <<  7)               /* Slow Clock Oscillator [AT91CAP9 revC only] */
 #define         AT91_PMC_PCK0RDY        (1 <<  8)               /* Programmable Clock 0 */
 #define         AT91_PMC_PCK1RDY        (1 <<  9)               /* Programmable Clock 1 */
 #define         AT91_PMC_PCK2RDY        (1 << 10)               /* Programmable Clock 2 */
 #define         AT91_PMC_PCK3RDY        (1 << 11)               /* Programmable Clock 3 */
 #define AT91_PMC_IMR            (AT91_PMC + 0x6c)       /* Interrupt Mask Register */
 
+#define AT91_PMC_PROT           (AT91_PMC + 0xe4)       /* Protect Register [AT91CAP9 revC only] */
+#define         AT91_PMC_PROTKEY        0x504d4301      /* Activation Code */
+
+#define AT91_PMC_VER            (AT91_PMC + 0xfc)       /* PMC Module Version [AT91CAP9 only] */
+
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h
index 4a4b64135a92..d8c1ededaa75 100644
--- a/arch/arm/mach-at91/include/mach/at91cap9.h
+++ b/arch/arm/mach-at91/include/mach/at91cap9.h
@@ -101,7 +101,9 @@
 #define AT91_RTT        (0xfffffd20 - AT91_BASE_SYS)
 #define AT91_PIT        (0xfffffd30 - AT91_BASE_SYS)
 #define AT91_WDT        (0xfffffd40 - AT91_BASE_SYS)
-#define AT91_GPBR       (0xfffffd50 - AT91_BASE_SYS)
+#define AT91_GPBR       (cpu_is_at91cap9_revB() ?       \
+                        (0xfffffd50 - AT91_BASE_SYS) :  \
+                        (0xfffffd60 - AT91_BASE_SYS))
 
 #define AT91_USART0     AT91CAP9_BASE_US0
 #define AT91_USART1     AT91CAP9_BASE_US1
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index dbfd9f73f80b..c554c3e4d553 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -49,6 +49,17 @@ static inline unsigned long at91_arch_identify(void)
         return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH);
 }
 
+#ifdef CONFIG_ARCH_AT91CAP9
+#include <mach/at91_pmc.h>
+
+#define ARCH_REVISION_CAP9_B    0x399
+#define ARCH_REVISION_CAP9_C    0x601
+
+static inline unsigned long at91cap9_rev_identify(void)
+{
+        return (at91_sys_read(AT91_PMC_VER));
+}
+#endif
 
 #ifdef CONFIG_ARCH_AT91RM9200
 #define cpu_is_at91rm9200()     (at91_cpu_identify() == ARCH_ID_AT91RM9200)
@@ -90,8 +101,12 @@ static inline unsigned long at91_arch_identify(void)
 
 #ifdef CONFIG_ARCH_AT91CAP9
 #define cpu_is_at91cap9()       (at91_cpu_identify() == ARCH_ID_AT91CAP9)
+#define cpu_is_at91cap9_revB()  (at91cap9_rev_identify() == ARCH_REVISION_CAP9_B)
+#define cpu_is_at91cap9_revC()  (at91cap9_rev_identify() == ARCH_REVISION_CAP9_C)
 #else
 #define cpu_is_at91cap9()       (0)
+#define cpu_is_at91cap9_revB()  (0)
+#define cpu_is_at91cap9_revC()  (0)
 #endif
 
 /*
diff --git a/arch/arm/mach-at91/include/mach/dma.h b/arch/arm/mach-at91/include/mach/dma.h
deleted file mode 100644
index e4f90c177616..000000000000
--- a/arch/arm/mach-at91/include/mach/dma.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/dma.h
- *
- *  Copyright (C) 2003 SAN People
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
index 1611bd03f528..0b0cccc46e68 100644
--- a/arch/arm/mach-at91/include/mach/io.h
+++ b/arch/arm/mach-at91/include/mach/io.h
@@ -23,8 +23,8 @@
 
 #define IO_SPACE_LIMIT          0xFFFFFFFF
 
-#define __io(a)                 ((void __iomem *)(a))
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 
 #ifndef __ASSEMBLY__
diff --git a/arch/arm/mach-at91/include/mach/memory.h b/arch/arm/mach-at91/include/mach/memory.h
index 9dd1b8c79b08..14f4ef4b6a9e 100644
--- a/arch/arm/mach-at91/include/mach/memory.h
+++ b/arch/arm/mach-at91/include/mach/memory.h
@@ -25,15 +25,4 @@
 
 #define PHYS_OFFSET     (AT91_SDRAM_BASE)
 
-
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x) __virt_to_phys(x)
-#define __bus_to_virt(x) __phys_to_virt(x)
-
 #endif
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c
new file mode 100644
index 000000000000..5eab6aa621d0
--- /dev/null
+++ b/arch/arm/mach-at91/sam9_smc.c
@@ -0,0 +1,47 @@
+/*
+ * linux/arch/arm/mach-at91/sam9_smc.c
+ *
+ * Copyright (C) 2008 Andrew Victor
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/io.h>
+
+#include <mach/at91sam9_smc.h>
+
+#include "sam9_smc.h"
+
+void __init sam9_smc_configure(int cs, struct sam9_smc_config* config)
+{
+        /* Setup register */
+        at91_sys_write(AT91_SMC_SETUP(cs),
+                  AT91_SMC_NWESETUP_(config->nwe_setup)
+                | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup)
+                | AT91_SMC_NRDSETUP_(config->nrd_setup)
+                | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup)
+        );
+
+        /* Pulse register */
+        at91_sys_write(AT91_SMC_PULSE(cs),
+                  AT91_SMC_NWEPULSE_(config->nwe_pulse)
+                | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse)
+                | AT91_SMC_NRDPULSE_(config->nrd_pulse)
+                | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse)
+        );
+
+        /* Cycle register */
+        at91_sys_write(AT91_SMC_CYCLE(cs),
+                  AT91_SMC_NWECYCLE_(config->write_cycle)
+                | AT91_SMC_NRDCYCLE_(config->read_cycle)
+        );
+
+        /* Mode register */
+        at91_sys_write(AT91_SMC_MODE(cs),
+                  config->mode
+                | AT91_SMC_TDF_(config->tdf_cycles)
+        );
+}
diff --git a/arch/arm/mach-at91/sam9_smc.h b/arch/arm/mach-at91/sam9_smc.h
new file mode 100644
index 000000000000..bf72cfb3455b
--- /dev/null
+++ b/arch/arm/mach-at91/sam9_smc.h
@@ -0,0 +1,33 @@
+/*
+ * linux/arch/arm/mach-at91/sam9_smc.
+ *
+ * Copyright (C) 2008 Andrew Victor
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+struct sam9_smc_config {
+        /* Setup register */
+        u8 ncs_read_setup;
+        u8 nrd_setup;
+        u8 ncs_write_setup;
+        u8 nwe_setup;
+
+        /* Pulse register */
+        u8 ncs_read_pulse;
+        u8 nrd_pulse;
+        u8 ncs_write_pulse;
+        u8 nwe_pulse;
+
+        /* Cycle register */
+        u16 read_cycle;
+        u16 write_cycle;
+
+        /* Mode register */
+        u32 mode;
+        u8 tdf_cycles:4;
+};
+
+extern void __init sam9_smc_configure(int cs, struct sam9_smc_config* config);
diff --git a/arch/arm/mach-clps711x/include/mach/dma.h b/arch/arm/mach-clps711x/include/mach/dma.h
deleted file mode 100644
index 0d620e869536..000000000000
--- a/arch/arm/mach-clps711x/include/mach/dma.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- *  arch/arm/mach-clps711x/include/mach/dma.h
- *
- *  Copyright (C) 1997,1998 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
diff --git a/arch/arm/mach-clps711x/include/mach/io.h b/arch/arm/mach-clps711x/include/mach/io.h
index 4c8440087679..2e0b3ced8f07 100644
--- a/arch/arm/mach-clps711x/include/mach/io.h
+++ b/arch/arm/mach-clps711x/include/mach/io.h
@@ -20,12 +20,10 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#include <mach/hardware.h>
-
 #define IO_SPACE_LIMIT 0xffffffff
 
-#define __io(a)                 ((void __iomem *)(a))
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 /*
  * We don't support ins[lb]/outs[lb].  Make them fault.
diff --git a/arch/arm/mach-clps711x/include/mach/memory.h b/arch/arm/mach-clps711x/include/mach/memory.h
index 98ec30c97bbe..e522b20bcbc2 100644
--- a/arch/arm/mach-clps711x/include/mach/memory.h
+++ b/arch/arm/mach-clps711x/include/mach/memory.h
@@ -26,25 +26,7 @@
  */
 #define PHYS_OFFSET     UL(0xc0000000)
 
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-
-#if defined(CONFIG_ARCH_CDB89712)
-
-#define __virt_to_bus(x)        (x)
-#define __bus_to_virt(x)        (x)
-
-#elif defined (CONFIG_ARCH_AUTCPU12)
-
-#define __virt_to_bus(x)        (x)
-#define __bus_to_virt(x)        (x)
-
-#else
+#if !defined(CONFIG_ARCH_CDB89712) && !defined (CONFIG_ARCH_AUTCPU12)
 
 #define __virt_to_bus(x)        ((x) - PAGE_OFFSET)
 #define __bus_to_virt(x)        ((x) + PAGE_OFFSET)
diff --git a/arch/arm/mach-clps7500/Makefile b/arch/arm/mach-clps7500/Makefile
deleted file mode 100644
index 4bd8ebd70e7b..000000000000
--- a/arch/arm/mach-clps7500/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-
-# Object file lists.
-
-obj-y                   := core.o
-obj-m                   :=
-obj-n                   :=
-obj-                    :=
-
diff --git a/arch/arm/mach-clps7500/Makefile.boot b/arch/arm/mach-clps7500/Makefile.boot
deleted file mode 100644
index fe16506c1540..000000000000
--- a/arch/arm/mach-clps7500/Makefile.boot
+++ /dev/null
@@ -1,2 +0,0 @@
-   zreladdr-y   := 0x10008000
-
diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c
deleted file mode 100644
index 7e247c04d41c..000000000000
--- a/arch/arm/mach-clps7500/core.c
+++ /dev/null
@@ -1,395 +0,0 @@
-/*
- *  linux/arch/arm/mach-clps7500/core.c
- *
- *  Copyright (C) 1998 Russell King
- *  Copyright (C) 1999 Nexus Electronics Ltd
- *
- * Extra MM routines for CL7500 architecture
- */
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/list.h>
-#include <linux/sched.h>
-#include <linux/init.h>
-#include <linux/device.h>
-#include <linux/serial_8250.h>
-#include <linux/io.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-#include <asm/mach/time.h>
-
-#include <mach/hardware.h>
-#include <asm/hardware/iomd.h>
-#include <asm/irq.h>
-#include <asm/mach-types.h>
-
-unsigned int vram_size;
-
-static void cl7500_ack_irq_a(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << irq;
-        val = iomd_readb(IOMD_IRQMASKA);
-        iomd_writeb(val & ~mask, IOMD_IRQMASKA);
-        iomd_writeb(mask, IOMD_IRQCLRA);
-}
-
-static void cl7500_mask_irq_a(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << irq;
-        val = iomd_readb(IOMD_IRQMASKA);
-        iomd_writeb(val & ~mask, IOMD_IRQMASKA);
-}
-
-static void cl7500_unmask_irq_a(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << irq;
-        val = iomd_readb(IOMD_IRQMASKA);
-        iomd_writeb(val | mask, IOMD_IRQMASKA);
-}
-
-static struct irq_chip clps7500_a_chip = {
-        .ack    = cl7500_ack_irq_a,
-        .mask   = cl7500_mask_irq_a,
-        .unmask = cl7500_unmask_irq_a,
-};
-
-static void cl7500_mask_irq_b(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_IRQMASKB);
-        iomd_writeb(val & ~mask, IOMD_IRQMASKB);
-}
-
-static void cl7500_unmask_irq_b(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_IRQMASKB);
-        iomd_writeb(val | mask, IOMD_IRQMASKB);
-}
-
-static struct irq_chip clps7500_b_chip = {
-        .ack    = cl7500_mask_irq_b,
-        .mask   = cl7500_mask_irq_b,
-        .unmask = cl7500_unmask_irq_b,
-};
-
-static void cl7500_mask_irq_c(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_IRQMASKC);
-        iomd_writeb(val & ~mask, IOMD_IRQMASKC);
-}
-
-static void cl7500_unmask_irq_c(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_IRQMASKC);
-        iomd_writeb(val | mask, IOMD_IRQMASKC);
-}
-
-static struct irq_chip clps7500_c_chip = {
-        .ack    = cl7500_mask_irq_c,
-        .mask   = cl7500_mask_irq_c,
-        .unmask = cl7500_unmask_irq_c,
-};
-
-static void cl7500_mask_irq_d(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_IRQMASKD);
-        iomd_writeb(val & ~mask, IOMD_IRQMASKD);
-}
-
-static void cl7500_unmask_irq_d(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_IRQMASKD);
-        iomd_writeb(val | mask, IOMD_IRQMASKD);
-}
-
-static struct irq_chip clps7500_d_chip = {
-        .ack    = cl7500_mask_irq_d,
-        .mask   = cl7500_mask_irq_d,
-        .unmask = cl7500_unmask_irq_d,
-};
-
-static void cl7500_mask_irq_dma(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_DMAMASK);
-        iomd_writeb(val & ~mask, IOMD_DMAMASK);
-}
-
-static void cl7500_unmask_irq_dma(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_DMAMASK);
-        iomd_writeb(val | mask, IOMD_DMAMASK);
-}
-
-static struct irq_chip clps7500_dma_chip = {
-        .ack    = cl7500_mask_irq_dma,
-        .mask   = cl7500_mask_irq_dma,
-        .unmask = cl7500_unmask_irq_dma,
-};
-
-static void cl7500_mask_irq_fiq(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_FIQMASK);
-        iomd_writeb(val & ~mask, IOMD_FIQMASK);
-}
-
-static void cl7500_unmask_irq_fiq(unsigned int irq)
-{
-        unsigned int val, mask;
-
-        mask = 1 << (irq & 7);
-        val = iomd_readb(IOMD_FIQMASK);
-        iomd_writeb(val | mask, IOMD_FIQMASK);
-}
-
-static struct irq_chip clps7500_fiq_chip = {
-        .ack    = cl7500_mask_irq_fiq,
-        .mask   = cl7500_mask_irq_fiq,
-        .unmask = cl7500_unmask_irq_fiq,
-};
-
-static void cl7500_no_action(unsigned int irq)
-{
-}
-
-static struct irq_chip clps7500_no_chip = {
-        .ack    = cl7500_no_action,
-        .mask   = cl7500_no_action,
-        .unmask = cl7500_no_action,
-};
-
-static struct irqaction irq_isa = {
-        .handler = no_action,
-        .mask = CPU_MASK_NONE,
-        .name = "isa",
-};
-
-static void __init clps7500_init_irq(void)
-{
-        unsigned int irq, flags;
-
-        iomd_writeb(0, IOMD_IRQMASKA);
-        iomd_writeb(0, IOMD_IRQMASKB);
-        iomd_writeb(0, IOMD_FIQMASK);
-        iomd_writeb(0, IOMD_DMAMASK);
-
-        for (irq = 0; irq < NR_IRQS; irq++) {
-                flags = IRQF_VALID;
-
-                if (irq <= 6 || (irq >= 9 && irq <= 15) ||
-                    (irq >= 48 && irq <= 55))
-                        flags |= IRQF_PROBE;
-
-                switch (irq) {
-                case 0 ... 7:
-                        set_irq_chip(irq, &clps7500_a_chip);
-                        set_irq_handler(irq, handle_level_irq);
-                        set_irq_flags(irq, flags);
-                        break;
-
-                case 8 ... 15:
-                        set_irq_chip(irq, &clps7500_b_chip);
-                        set_irq_handler(irq, handle_level_irq);
-                        set_irq_flags(irq, flags);
-                        break;
-
-                case 16 ... 22:
-                        set_irq_chip(irq, &clps7500_dma_chip);
-                        set_irq_handler(irq, handle_level_irq);
-                        set_irq_flags(irq, flags);
-                        break;
-
-                case 24 ... 31:
-                        set_irq_chip(irq, &clps7500_c_chip);
-                        set_irq_handler(irq, handle_level_irq);
-                        set_irq_flags(irq, flags);
-                        break;
-
-                case 40 ... 47:
-                        set_irq_chip(irq, &clps7500_d_chip);
-                        set_irq_handler(irq, handle_level_irq);
-                        set_irq_flags(irq, flags);
-                        break;
-
-                case 48 ... 55:
-                        set_irq_chip(irq, &clps7500_no_chip);
-                        set_irq_handler(irq, handle_level_irq);
-                        set_irq_flags(irq, flags);
-                        break;
-
-                case 64 ... 72:
-                        set_irq_chip(irq, &clps7500_fiq_chip);
-                        set_irq_handler(irq, handle_level_irq);
-                        set_irq_flags(irq, flags);
-                        break;
-                }
-        }
-
-        setup_irq(IRQ_ISA, &irq_isa);
-}
-
-static struct map_desc cl7500_io_desc[] __initdata = {
-        {       /* IO space     */
-                .virtual        = (unsigned long)IO_BASE,
-                .pfn            = __phys_to_pfn(IO_START),
-                .length         = IO_SIZE,
-                .type           = MT_DEVICE
-        }, {    /* ISA space    */
-                .virtual        = ISA_BASE,
-                .pfn            = __phys_to_pfn(ISA_START),
-                .length         = ISA_SIZE,
-                .type           = MT_DEVICE
-        }, {    /* Flash        */
-                .virtual        = CLPS7500_FLASH_BASE,
-                .pfn            = __phys_to_pfn(CLPS7500_FLASH_START),
-                .length         = CLPS7500_FLASH_SIZE,
-                .type           = MT_DEVICE
-        }, {    /* LED          */
-                .virtual        = LED_BASE,
-                .pfn            = __phys_to_pfn(LED_START),
-                .length         = LED_SIZE,
-                .type           = MT_DEVICE
-        }
-};
-
-static void __init clps7500_map_io(void)
-{
-        iotable_init(cl7500_io_desc, ARRAY_SIZE(cl7500_io_desc));
-}
-
-extern void ioctime_init(void);
-extern unsigned long ioc_timer_gettimeoffset(void);
-
-static irqreturn_t
-clps7500_timer_interrupt(int irq, void *dev_id)
-{
-        timer_tick();
-
-        /* Why not using do_leds interface?? */
-        {
-                /* Twinkle the lights. */
-                static int count, state = 0xff00;
-                if (count-- == 0) {
-                        state ^= 0x100;
-                        count = 25;
-                        *((volatile unsigned int *)LED_ADDRESS) = state;
-                }
-        }
-
-        return IRQ_HANDLED;
-}
-
-static struct irqaction clps7500_timer_irq = {
-        .name           = "CLPS7500 Timer Tick",
-        .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-        .handler        = clps7500_timer_interrupt,
-};
-
-/*
- * Set up timer interrupt.
- */
-static void __init clps7500_timer_init(void)
-{
-        ioctime_init();
-        setup_irq(IRQ_TIMER, &clps7500_timer_irq);
-}
-
-static struct sys_timer clps7500_timer = {
-        .init           = clps7500_timer_init,
-        .offset         = ioc_timer_gettimeoffset,
-};
-
-static struct plat_serial8250_port serial_platform_data[] = {
-        {
-                .mapbase        = 0x03010fe0,
-                .irq            = 10,
-                .uartclk        = 1843200,
-                .regshift       = 2,
-                .iotype         = UPIO_MEM,
-                .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SKIP_TEST,
-        },
-        {
-                .mapbase        = 0x03010be0,
-                .irq            = 0,
-                .uartclk        = 1843200,
-                .regshift       = 2,
-                .iotype         = UPIO_MEM,
-                .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SKIP_TEST,
-        },
-        {
-                .iobase         = ISASLOT_IO + 0x2e8,
-                .irq            = 41,
-                .uartclk        = 1843200,
-                .regshift       = 0,
-                .iotype         = UPIO_PORT,
-                .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-        },
-        {
-                .iobase         = ISASLOT_IO + 0x3e8,
-                .irq            = 40,
-                .uartclk        = 1843200,
-                .regshift       = 0,
-                .iotype         = UPIO_PORT,
-                .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-        },
-        { },
-};
-
-static struct platform_device serial_device = {
-        .name                   = "serial8250",
-        .id                     = PLAT8250_DEV_PLATFORM,
-        .dev                    = {
-                .platform_data  = serial_platform_data,
-        },
-};
-
-static void __init clps7500_init(void)
-{
-        platform_device_register(&serial_device);
-}
-
-MACHINE_START(CLPS7500, "CL-PS7500")
-        /* Maintainer: Philip Blundell */
-        .phys_io        = 0x03000000,
-        .io_pg_offst    = ((0xe0000000) >> 18) & 0xfffc,
-        .map_io         = clps7500_map_io,
-        .init_irq       = clps7500_init_irq,
-        .init_machine   = clps7500_init,
-        .timer          = &clps7500_timer,
-MACHINE_END
-
diff --git a/arch/arm/mach-clps7500/include/mach/acornfb.h b/arch/arm/mach-clps7500/include/mach/acornfb.h
deleted file mode 100644
index aea6330c9745..000000000000
--- a/arch/arm/mach-clps7500/include/mach/acornfb.h
+++ /dev/null
@@ -1,33 +0,0 @@
-#define acornfb_valid_pixrate(var) (var->pixclock >= 39325 && var->pixclock <= 40119)
-
-static inline void
-acornfb_vidc20_find_rates(struct vidc_timing *vidc,
-                          struct fb_var_screeninfo *var)
-{
-        u_int bandwidth;
-  
-        vidc->control |= VIDC20_CTRL_PIX_CK;
-
-        /* Calculate bandwidth */
-        bandwidth = var->pixclock * 8 / var->bits_per_pixel;
-
-        /* Encode bandwidth as VIDC20 setting */
-        if (bandwidth > 16667*2)
-                vidc->control |= VIDC20_CTRL_FIFO_16;
-        else if (bandwidth > 13333*2)
-                vidc->control |= VIDC20_CTRL_FIFO_20;
-        else if (bandwidth > 11111*2)
-                vidc->control |= VIDC20_CTRL_FIFO_24;
-        else
-                vidc->control |= VIDC20_CTRL_FIFO_28;
-
-        vidc->pll_ctl  = 0x2020;
-}
-
-#ifdef CONFIG_CHRONTEL_7003
-#define acornfb_default_control()       VIDC20_CTRL_PIX_HCLK
-#else
-#define acornfb_default_control()       VIDC20_CTRL_PIX_VCLK
-#endif
-
-#define acornfb_default_econtrol()      VIDC20_ECTL_DAC | VIDC20_ECTL_REG(3) | VIDC20_ECTL_ECK
diff --git a/arch/arm/mach-clps7500/include/mach/debug-macro.S b/arch/arm/mach-clps7500/include/mach/debug-macro.S
deleted file mode 100644
index af4104e7e84a..000000000000
--- a/arch/arm/mach-clps7500/include/mach/debug-macro.S
+++ /dev/null
@@ -1,21 +0,0 @@
-/* arch/arm/mach-clps7500/include/mach/debug-macro.S
- *
- * Debugging macro include header
- *
- *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
-
-                .macro  addruart,rx
-                mov     \rx, #0xe0000000
-                orr     \rx, \rx, #0x00010000
-                orr     \rx, \rx, #0x00000be0
-                .endm
-
-#define UART_SHIFT      2
-#include <asm/hardware/debug-8250.S>
diff --git a/arch/arm/mach-clps7500/include/mach/dma.h b/arch/arm/mach-clps7500/include/mach/dma.h
deleted file mode 100644
index 63fcde505498..000000000000
--- a/arch/arm/mach-clps7500/include/mach/dma.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/dma.h
- *
- * Copyright (C) 1999 Nexus Electronics Ltd.
- */
-
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-/* DMA is not yet implemented! It should be the same as acorn, copy over.. */
-
-/*
- * This is the maximum DMA address that can be DMAd to.
- * There should not be more than (0xd0000000 - 0xc0000000)
- * bytes of RAM.
- */
-#define MAX_DMA_ADDRESS         0xd0000000
-
-#define DMA_S0                  0
-
-#endif /* _ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-clps7500/include/mach/entry-macro.S b/arch/arm/mach-clps7500/include/mach/entry-macro.S
deleted file mode 100644
index 4e7e54144093..000000000000
--- a/arch/arm/mach-clps7500/include/mach/entry-macro.S
+++ /dev/null
@@ -1,16 +0,0 @@
-#include <mach/hardware.h>
-#include <asm/hardware/entry-macro-iomd.S>
-
-        .equ    ioc_base_high, IOC_BASE & 0xff000000
-        .equ    ioc_base_low, IOC_BASE & 0x00ff0000
-
-        .macro  get_irqnr_preamble, base, tmp
-        mov     \base, #ioc_base_high           @ point at IOC
-        .if     ioc_base_low
-        orr     \base, \base, #ioc_base_low
-        .endif
-        .endm
-
-        .macro  arch_ret_to_user, tmp1, tmp2
-        .endm
-
diff --git a/arch/arm/mach-clps7500/include/mach/hardware.h b/arch/arm/mach-clps7500/include/mach/hardware.h
deleted file mode 100644
index a6ad1d44badf..000000000000
--- a/arch/arm/mach-clps7500/include/mach/hardware.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/hardware.h
- *
- * Copyright (C) 1996-1999 Russell King.
- * Copyright (C) 1999 Nexus Electronics Ltd.
- *
- * This file contains the hardware definitions of the 
- * CL7500 evaluation board.
- */
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
-
-#include <mach/memory.h>
-#include <asm/hardware/iomd.h>
-
-#ifdef __ASSEMBLY__
-#define IOMEM(x) x
-#else
-#define IOMEM(x) ((void __iomem *)(x))
-#endif
-
-/*
- * What hardware must be present
- */
-#define HAS_IOMD
-#define HAS_VIDC20
-
-/* Hardware addresses of major areas.
- *  *_START is the physical address
- *  *_SIZE  is the size of the region
- *  *_BASE  is the virtual address
- */
-
-#define IO_START                0x03000000      /* I/O */
-#define IO_SIZE                 0x01000000
-#define IO_BASE                 IOMEM(0xe0000000)
-
-#define ISA_START               0x0c000000      /* ISA */
-#define ISA_SIZE                0x00010000
-#define ISA_BASE                0xe1000000
-
-#define CLPS7500_FLASH_START    0x01000000      /* XXX */
-#define CLPS7500_FLASH_SIZE     0x01000000
-#define CLPS7500_FLASH_BASE     0xe2000000
-
-#define LED_START               0x0302B000
-#define LED_SIZE                0x00001000
-#define LED_BASE                0xe3000000
-#define LED_ADDRESS             (LED_BASE + 0xa00)
-
-/* Let's define SCREEN_START for CL7500, even though it's a lie. */
-#define SCREEN_START            0x02000000      /* VRAM */
-#define SCREEN_END              0xdfc00000
-#define SCREEN_BASE             0xdf800000
-
-#define VIDC_BASE               (void __iomem *)0xe0400000
-#define IOMD_BASE               IOMEM(0xe0200000)
-#define IOC_BASE                IOMEM(0xe0200000)
-#define FLOPPYDMA_BASE          IOMEM(0xe002a000)
-#define PCIO_BASE               IOMEM(0xe0010000)
-
-#define vidc_writel(val)        __raw_writel(val, VIDC_BASE)
-
-/* in/out bias for the ISA slot region */
-#define ISASLOT_IO              0x80400000
-
-#endif
diff --git a/arch/arm/mach-clps7500/include/mach/io.h b/arch/arm/mach-clps7500/include/mach/io.h
deleted file mode 100644
index 2ff2860889ed..000000000000
--- a/arch/arm/mach-clps7500/include/mach/io.h
+++ /dev/null
@@ -1,255 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/io.h
- *  from arch/arm/mach-rpc/include/mach/io.h
- *
- * Copyright (C) 1997 Russell King
- *
- * Modifications:
- *  06-Dec-1997 RMK     Created.
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#include <mach/hardware.h>
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * GCC is totally crap at loading/storing data.  We try to persuade it
- * to do the right thing by using these whereever possible instead of
- * the above.
- */
-#define __arch_base_getb(b,o)                   \
- ({                                             \
-        unsigned int v, r = (b);                \
-        __asm__ __volatile__(                   \
-                "ldrb   %0, [%1, %2]"           \
-                : "=r" (v)                      \
-                : "r" (r), "Ir" (o));           \
-        v;                                      \
- })
-
-#define __arch_base_getl(b,o)                   \
- ({                                             \
-        unsigned int v, r = (b);                \
-        __asm__ __volatile__(                   \
-                "ldr    %0, [%1, %2]"           \
-                : "=r" (v)                      \
-                : "r" (r), "Ir" (o));           \
-        v;                                      \
- })
-
-#define __arch_base_putb(v,b,o)                 \
- ({                                             \
-        unsigned int r = (b);                   \
-        __asm__ __volatile__(                   \
-                "strb   %0, [%1, %2]"           \
-                :                               \
-                : "r" (v), "r" (r), "Ir" (o));  \
- })
-
-#define __arch_base_putl(v,b,o)                 \
- ({                                             \
-        unsigned int r = (b);                   \
-        __asm__ __volatile__(                   \
-                "str    %0, [%1, %2]"           \
-                :                               \
-                : "r" (v), "r" (r), "Ir" (o));  \
- })
-
-/*
- * We use two different types of addressing - PC style addresses, and ARM
- * addresses.  PC style accesses the PC hardware with the normal PC IO
- * addresses, eg 0x3f8 for serial#1.  ARM addresses are 0x80000000+
- * and are translated to the start of IO.  Note that all addresses are
- * shifted left!
- */
-#define __PORT_PCIO(x)  (!((x) & 0x80000000))
-
-/*
- * Dynamic IO functions - let the compiler
- * optimize the expressions
- */
-static inline void __outb (unsigned int value, unsigned int port)
-{
-        unsigned long temp;
-        __asm__ __volatile__(
-        "tst    %2, #0x80000000\n\t"
-        "mov    %0, %4\n\t"
-        "addeq  %0, %0, %3\n\t"
-        "strb   %1, [%0, %2, lsl #2]    @ outb"
-        : "=&r" (temp)
-        : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
-        : "cc");
-}
-
-static inline void __outw (unsigned int value, unsigned int port)
-{
-        unsigned long temp;
-        __asm__ __volatile__(
-        "tst    %2, #0x80000000\n\t"
-        "mov    %0, %4\n\t"
-        "addeq  %0, %0, %3\n\t"
-        "str    %1, [%0, %2, lsl #2]    @ outw"
-        : "=&r" (temp)
-        : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
-        : "cc");
-}
-
-static inline void __outl (unsigned int value, unsigned int port)
-{
-        unsigned long temp;
-        __asm__ __volatile__(
-        "tst    %2, #0x80000000\n\t"
-        "mov    %0, %4\n\t"
-        "addeq  %0, %0, %3\n\t"
-        "str    %1, [%0, %2, lsl #2]    @ outl"
-        : "=&r" (temp)
-        : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
-        : "cc");
-}
-
-#define DECLARE_DYN_IN(sz,fnsuffix,instr)                                       \
-static inline unsigned sz __in##fnsuffix (unsigned int port)            \
-{                                                                               \
-        unsigned long temp, value;                                              \
-        __asm__ __volatile__(                                                   \
-        "tst    %2, #0x80000000\n\t"                                            \
-        "mov    %0, %4\n\t"                                                     \
-        "addeq  %0, %0, %3\n\t"                                                 \
-        "ldr" instr "   %1, [%0, %2, lsl #2]    @ in" #fnsuffix                 \
-        : "=&r" (temp), "=r" (value)                                            \
-        : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)                \
-        : "cc");                                                                \
-        return (unsigned sz)value;                                              \
-}
-
-static inline unsigned int __ioaddr (unsigned int port)                 \
-{                                                                               \
-        if (__PORT_PCIO(port))                                                  \
-                return (unsigned int)(PCIO_BASE + (port << 2));                 \
-        else                                                                    \
-                return (unsigned int)(IO_BASE + (port << 2));                   \
-}
-
-#define DECLARE_IO(sz,fnsuffix,instr)   \
-        DECLARE_DYN_IN(sz,fnsuffix,instr)
-
-DECLARE_IO(char,b,"b")
-DECLARE_IO(short,w,"")
-DECLARE_IO(int,l,"")
-
-#undef DECLARE_IO
-#undef DECLARE_DYN_IN
-
-/*
- * Constant address IO functions
- *
- * These have to be macros for the 'J' constraint to work -
- * +/-4096 immediate operand.
- */
-#define __outbc(value,port)                                                     \
-({                                                                              \
-        if (__PORT_PCIO((port)))                                                \
-                __asm__ __volatile__(                                           \
-                "strb   %0, [%1, %2]    @ outbc"                                \
-                : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2));          \
-        else                                                                    \
-                __asm__ __volatile__(                                           \
-                "strb   %0, [%1, %2]    @ outbc"                                \
-                : : "r" (value), "r" (IO_BASE), "r" ((port) << 2));             \
-})
-
-#define __inbc(port)                                                            \
-({                                                                              \
-        unsigned char result;                                                   \
-        if (__PORT_PCIO((port)))                                                \
-                __asm__ __volatile__(                                           \
-                "ldrb   %0, [%1, %2]    @ inbc"                                 \
-                : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2));         \
-        else                                                                    \
-                __asm__ __volatile__(                                           \
-                "ldrb   %0, [%1, %2]    @ inbc"                                 \
-                : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2));            \
-        result;                                                                 \
-})
-
-#define __outwc(value,port)                                                     \
-({                                                                              \
-        unsigned long v = value;                                                \
-        if (__PORT_PCIO((port)))                                                \
-                __asm__ __volatile__(                                           \
-                "str    %0, [%1, %2]    @ outwc"                                \
-                : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2));        \
-        else                                                                    \
-                __asm__ __volatile__(                                           \
-                "str    %0, [%1, %2]    @ outwc"                                \
-                : : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2));           \
-})
-
-#define __inwc(port)                                                            \
-({                                                                              \
-        unsigned short result;                                                  \
-        if (__PORT_PCIO((port)))                                                \
-                __asm__ __volatile__(                                           \
-                "ldr    %0, [%1, %2]    @ inwc"                                 \
-                : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2));         \
-        else                                                                    \
-                __asm__ __volatile__(                                           \
-                "ldr    %0, [%1, %2]    @ inwc"                                 \
-                : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2));            \
-        result & 0xffff;                                                        \
-})
-
-#define __outlc(value,port)                                                     \
-({                                                                              \
-        unsigned long v = value;                                                \
-        if (__PORT_PCIO((port)))                                                \
-                __asm__ __volatile__(                                           \
-                "str    %0, [%1, %2]    @ outlc"                                \
-                : : "r" (v), "r" (PCIO_BASE), "Jr" ((port) << 2));              \
-        else                                                                    \
-                __asm__ __volatile__(                                           \
-                "str    %0, [%1, %2]    @ outlc"                                \
-                : : "r" (v), "r" (IO_BASE), "r" ((port) << 2));                 \
-})
-
-#define __inlc(port)                                                            \
-({                                                                              \
-        unsigned long result;                                                   \
-        if (__PORT_PCIO((port)))                                                \
-                __asm__ __volatile__(                                           \
-                "ldr    %0, [%1, %2]    @ inlc"                                 \
-                : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2));         \
-        else                                                                    \
-                __asm__ __volatile__(                                           \
-                "ldr    %0, [%1, %2]    @ inlc"                                 \
-                : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2));            \
-        result;                                                                 \
-})
-
-#define __ioaddrc(port)                                                         \
-        (__PORT_PCIO((port)) ? PCIO_BASE + ((port) << 2) : IO_BASE + ((port) << 2))
-
-#define inb(p)          (__builtin_constant_p((p)) ? __inbc(p)    : __inb(p))
-#define inw(p)          (__builtin_constant_p((p)) ? __inwc(p)    : __inw(p))
-#define inl(p)          (__builtin_constant_p((p)) ? __inlc(p)    : __inl(p))
-#define outb(v,p)       (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
-#define outw(v,p)       (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
-#define outl(v,p)       (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
-#define __ioaddr(p)     (__builtin_constant_p((p)) ? __ioaddr(p)  : __ioaddrc(p))
-/* the following macro is deprecated */
-#define ioaddr(port)                    __ioaddr((port))
-
-#define insb(p,d,l)     __raw_readsb(__ioaddr(p),d,l)
-#define insw(p,d,l)     __raw_readsw(__ioaddr(p),d,l)
-
-#define outsb(p,d,l)    __raw_writesb(__ioaddr(p),d,l)
-#define outsw(p,d,l)    __raw_writesw(__ioaddr(p),d,l)
-
-/*
- * 1:1 mapping for ioremapped regions.
- */
-#define __mem_pci(x)    (x)
-
-#endif
diff --git a/arch/arm/mach-clps7500/include/mach/irq.h b/arch/arm/mach-clps7500/include/mach/irq.h
deleted file mode 100644
index d02fcf28ee05..000000000000
--- a/arch/arm/mach-clps7500/include/mach/irq.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/irq.h
- *
- * Copyright (C) 1996 Russell King
- * Copyright (C) 1999, 2001 Nexus Electronics Ltd.
- *
- * Changelog:
- *   10-10-1996 RMK     Brought up to date with arch-sa110eval
- *   22-08-1998 RMK     Restructured IRQ routines
- *   11-08-1999 PJB     Created ARM7500 version, derived from RiscPC code
- */
-
-#include <linux/io.h>
-#include <asm/hardware/iomd.h>
-
-static inline int fixup_irq(unsigned int irq)
-{
-        if (irq == IRQ_ISA) {
-                int isabits = *((volatile unsigned int *)0xe002b700);
-                if (isabits == 0) {
-                        printk("Spurious ISA IRQ!\n");
-                        return irq;
-                }
-                irq = IRQ_ISA_BASE;
-                while (!(isabits & 1)) {
-                        irq++;
-                        isabits >>= 1;
-                }
-        }
-
-        return irq;
-}
diff --git a/arch/arm/mach-clps7500/include/mach/irqs.h b/arch/arm/mach-clps7500/include/mach/irqs.h
deleted file mode 100644
index bee66b487f59..000000000000
--- a/arch/arm/mach-clps7500/include/mach/irqs.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/irqs.h
- *
- * Copyright (C) 1999 Nexus Electronics Ltd
- */
-
-#define IRQ_INT2                0
-#define IRQ_INT1                2
-#define IRQ_VSYNCPULSE          3
-#define IRQ_POWERON             4
-#define IRQ_TIMER0              5
-#define IRQ_TIMER1              6
-#define IRQ_FORCE               7
-#define IRQ_INT8                8
-#define IRQ_ISA                 9
-#define IRQ_INT6                10
-#define IRQ_INT5                11
-#define IRQ_INT4                12
-#define IRQ_INT3                13
-#define IRQ_KEYBOARDTX          14
-#define IRQ_KEYBOARDRX          15
-
-#define IRQ_DMA0                16
-#define IRQ_DMA1                17
-#define IRQ_DMA2                18
-#define IRQ_DMA3                19
-#define IRQ_DMAS0               20
-#define IRQ_DMAS1               21
-
-#define IRQ_IOP0                24
-#define IRQ_IOP1                25
-#define IRQ_IOP2                26
-#define IRQ_IOP3                27
-#define IRQ_IOP4                28
-#define IRQ_IOP5                29
-#define IRQ_IOP6                30
-#define IRQ_IOP7                31
-
-#define IRQ_MOUSERX             40
-#define IRQ_MOUSETX             41
-#define IRQ_ADC                 42
-#define IRQ_EVENT1              43
-#define IRQ_EVENT2              44
-
-#define IRQ_ISA_BASE            48
-#define IRQ_ISA_3               48
-#define IRQ_ISA_4               49
-#define IRQ_ISA_5               50
-#define IRQ_ISA_7               51
-#define IRQ_ISA_9               52
-#define IRQ_ISA_10              53
-#define IRQ_ISA_11              54
-#define IRQ_ISA_14              55      
-
-#define FIQ_INT9                0
-#define FIQ_INT5                1
-#define FIQ_INT6                4
-#define FIQ_INT8                6
-#define FIQ_FORCE               7
-
-/*
- * This is the offset of the FIQ "IRQ" numbers
- */
-#define FIQ_START               64
-
-#define IRQ_TIMER               IRQ_TIMER0
diff --git a/arch/arm/mach-clps7500/include/mach/memory.h b/arch/arm/mach-clps7500/include/mach/memory.h
deleted file mode 100644
index 87b32db470c8..000000000000
--- a/arch/arm/mach-clps7500/include/mach/memory.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/memory.h
- *
- * Copyright (c) 1996,1997,1998 Russell King.
- *
- * Changelog:
- *  20-Oct-1996 RMK     Created
- *  31-Dec-1997 RMK     Fixed definitions to reduce warnings
- *  11-Jan-1998 RMK     Uninlined to reduce hits on cache
- *  08-Feb-1998 RMK     Added __virt_to_bus and __bus_to_virt
- *  21-Mar-1999 RMK     Renamed to memory.h
- *              RMK     Added TASK_SIZE and PAGE_OFFSET
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-
-/*
- * Physical DRAM offset.
- */
-#define PHYS_OFFSET     UL(0x10000000)
-
-/*
- * These are exactly the same on the RiscPC as the
- * physical memory view.
- */
-#define __virt_to_bus(x) __virt_to_phys(x)
-#define __bus_to_virt(x) __phys_to_virt(x)
-
-/*
- * Cache flushing area - ROM
- */
-#define FLUSH_BASE_PHYS         0x00000000
-#define FLUSH_BASE              0xdf000000
-
-/*
- * Sparsemem support.  Each section is a maximum of 64MB.  The sections
- * are offset by 128MB and can cover 128MB, so that gives us a maximum
- * of 29 physmem bits.
- */
-#define MAX_PHYSMEM_BITS        29
-#define SECTION_SIZE_BITS       26
-
-#endif
diff --git a/arch/arm/mach-clps7500/include/mach/system.h b/arch/arm/mach-clps7500/include/mach/system.h
deleted file mode 100644
index 6d325fbe8b08..000000000000
--- a/arch/arm/mach-clps7500/include/mach/system.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/system.h
- *
- * Copyright (c) 1999 Nexus Electronics Ltd.
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-#include <linux/io.h>
-#include <asm/hardware/iomd.h>
-
-static inline void arch_idle(void)
-{
-        iomd_writeb(0, IOMD_SUSMODE);
-}
-
-#define arch_reset(mode)                        \
-        do {                                    \
-                iomd_writeb(0, IOMD_ROMCR0);    \
-                cpu_reset(0);                   \
-        } while (0)
-
-#endif
diff --git a/arch/arm/mach-clps7500/include/mach/timex.h b/arch/arm/mach-clps7500/include/mach/timex.h
deleted file mode 100644
index dfaa9b425757..000000000000
--- a/arch/arm/mach-clps7500/include/mach/timex.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/timex.h
- *
- * CL7500 architecture timex specifications
- *
- * Copyright (C) 1999 Nexus Electronics Ltd
- */
-
-/*
- * On the ARM7500, the clock ticks at 2MHz.
- */
-#define CLOCK_TICK_RATE         2000000
-
diff --git a/arch/arm/mach-clps7500/include/mach/uncompress.h b/arch/arm/mach-clps7500/include/mach/uncompress.h
deleted file mode 100644
index d7d0af4b49fc..000000000000
--- a/arch/arm/mach-clps7500/include/mach/uncompress.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/uncompress.h
- *
- * Copyright (C) 1999, 2000 Nexus Electronics Ltd.
- */
-#define BASE 0x03010000
-#define SERBASE (BASE + (0x2f8 << 2))
-
-static inline void putc(char c)
-{
-        while (!(*((volatile unsigned int *)(SERBASE + 0x14)) & 0x20))
-                barrier();
-
-        *((volatile unsigned int *)(SERBASE)) = c;
-}
-
-static inline void flush(void)
-{
-}
-
-static __inline__ void arch_decomp_setup(void)
-{
-        int baud = 3686400 / (9600 * 32);
-
-        *((volatile unsigned int *)(SERBASE + 0xC)) = 0x80;
-        *((volatile unsigned int *)(SERBASE + 0x0)) = baud & 0xff;
-        *((volatile unsigned int *)(SERBASE + 0x4)) = (baud & 0xff00) >> 8;
-        *((volatile unsigned int *)(SERBASE + 0xC)) = 3; /* 8 bits */
-        *((volatile unsigned int *)(SERBASE + 0x10)) = 3; /* DTR, RTS */
-}
-
-/*
- * nothing to do
- */
-#define arch_decomp_wdog()
diff --git a/arch/arm/mach-clps7500/include/mach/vmalloc.h b/arch/arm/mach-clps7500/include/mach/vmalloc.h
deleted file mode 100644
index 8fc5406d1b6d..000000000000
--- a/arch/arm/mach-clps7500/include/mach/vmalloc.h
+++ /dev/null
@@ -1,4 +0,0 @@
-/*
- * arch/arm/mach-clps7500/include/mach/vmalloc.h
- */
-#define VMALLOC_END       (PAGE_OFFSET + 0x1c000000)
diff --git a/arch/arm/mach-davinci/include/mach/dma.h b/arch/arm/mach-davinci/include/mach/dma.h
deleted file mode 100644
index 8e2f2d0ba667..000000000000
--- a/arch/arm/mach-davinci/include/mach/dma.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * DaVinci DMA definitions
- *
- * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
- *
- * 2007 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-#define MAX_DMA_ADDRESS                 0xffffffff
-
-#endif /* __ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h
index b78ee9140496..a48795fd2417 100644
--- a/arch/arm/mach-davinci/include/mach/io.h
+++ b/arch/arm/mach-davinci/include/mach/io.h
@@ -29,8 +29,7 @@
  * We don't actually have real ISA nor PCI buses, but there is so many
  * drivers out there that might just work if we fake them...
  */
-#define PCIO_BASE               0
-#define __io(a)                 ((void __iomem *)(PCIO_BASE + (a)))
+#define __io(a)                 __typesafe_io(a)
 #define __mem_pci(a)            (a)
 #define __mem_isa(a)            (a)
 
diff --git a/arch/arm/mach-davinci/include/mach/memory.h b/arch/arm/mach-davinci/include/mach/memory.h
index dd1625c23cf4..86c25c7f3ce3 100644
--- a/arch/arm/mach-davinci/include/mach/memory.h
+++ b/arch/arm/mach-davinci/include/mach/memory.h
@@ -52,13 +52,8 @@ __arch_adjust_zones(int node, unsigned long *size, unsigned long *holes)
         if ((meminfo.bank[0].size >> 20) > 128) __arch_adjust_zones(node, zone_size, holes)
 
 #define ISA_DMA_THRESHOLD       (PHYS_OFFSET + (128<<20) - 1)
+#define MAX_DMA_ADDRESS         (PAGE_OFFSET + (128<<20))
 
 #endif
 
-/*
- * Bus address is physical address
- */
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
 #endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-davinci/include/mach/vmalloc.h b/arch/arm/mach-davinci/include/mach/vmalloc.h
index b98bd9e92fd6..ad51625b6609 100644
--- a/arch/arm/mach-davinci/include/mach/vmalloc.h
+++ b/arch/arm/mach-davinci/include/mach/vmalloc.h
@@ -8,7 +8,6 @@
  * is licensed "as is" without any warranty of any kind, whether express
  * or implied.
  */
-#include <asm/memory.h>
 #include <mach/io.h>
 
 /* Allow vmalloc range until the IO virtual range minus a 2M "hole" */
diff --git a/arch/arm/mach-ebsa110/include/mach/dma.h b/arch/arm/mach-ebsa110/include/mach/dma.h
deleted file mode 100644
index 780a04c8bbe9..000000000000
--- a/arch/arm/mach-ebsa110/include/mach/dma.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- *  arch/arm/mach-ebsa110/include/mach/dma.h
- *
- *  Copyright (C) 1997,1998 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- *  EBSA110 DMA definitions
- */
diff --git a/arch/arm/mach-ebsa110/include/mach/memory.h b/arch/arm/mach-ebsa110/include/mach/memory.h
index eea4b75b657b..0ca66d080c69 100644
--- a/arch/arm/mach-ebsa110/include/mach/memory.h
+++ b/arch/arm/mach-ebsa110/include/mach/memory.h
@@ -22,13 +22,6 @@
 #define PHYS_OFFSET     UL(0x00000000)
 
 /*
- * We keep this 1:1 so that we don't interfere
- * with the PCMCIA memory regions
- */
-#define __virt_to_bus(x)        (x)
-#define __bus_to_virt(x)        (x)
-
-/*
  * Cache flushing area - SRAM
  */
 #define FLUSH_BASE_PHYS         0x40000000
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
index 5a1b8c05c958..56bddcef6905 100644
--- a/arch/arm/mach-ep93xx/Kconfig
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -33,6 +33,12 @@ config MACH_EDB9307
           Say 'Y' here if you want your kernel to support the Cirrus
           Logic EDB9307 Evaluation Board.
 
+config MACH_EDB9307A
+        bool "Support Cirrus Logic EDB9307A"
+        help
+          Say 'Y' here if you want your kernel to support the Cirrus
+          Logic EDB9307A Evaluation Board.
+
 config MACH_EDB9312
         bool "Support Cirrus Logic EDB9312"
         help
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
index c1252ca9648e..944e42d51646 100644
--- a/arch/arm/mach-ep93xx/Makefile
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_MACH_ADSSPHERE)	+= adssphere.o
 obj-$(CONFIG_MACH_EDB9302)      += edb9302.o
 obj-$(CONFIG_MACH_EDB9302A)     += edb9302a.o
 obj-$(CONFIG_MACH_EDB9307)      += edb9307.o
+obj-$(CONFIG_MACH_EDB9307A)     += edb9307a.o
 obj-$(CONFIG_MACH_EDB9312)      += edb9312.o
 obj-$(CONFIG_MACH_EDB9315)      += edb9315.o
 obj-$(CONFIG_MACH_EDB9315A)     += edb9315a.o
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
index 561db73ec1ae..3fbd9b0fbe24 100644
--- a/arch/arm/mach-ep93xx/adssphere.c
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -19,6 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data adssphere_flash_data = {
 };
 
 static struct resource adssphere_flash_resource = {
-        .start          = 0x60000000,
-        .end            = 0x61ffffff,
+        .start          = EP93XX_CS6_PHYS_BASE,
+        .end            = EP93XX_CS6_PHYS_BASE + SZ_32M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -59,7 +60,7 @@ MACHINE_START(ADSSPHERE, "ADS Sphere board")
         /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
         .phys_io        = EP93XX_APB_PHYS_BASE,
         .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index 8c9f2491dccc..96049283a10a 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -16,11 +16,12 @@
 #include <linux/module.h>
 #include <linux/string.h>
 #include <linux/io.h>
+
+#include <asm/clkdev.h>
 #include <asm/div64.h>
 #include <mach/hardware.h>
 
 struct clk {
-        char            *name;
         unsigned long   rate;
         int             users;
         u32             enable_reg;
@@ -28,53 +29,33 @@ struct clk {
 };
 
 static struct clk clk_uart = {
-        .name           = "UARTCLK",
         .rate           = 14745600,
 };
-static struct clk clk_pll1 = {
-        .name           = "pll1",
-};
-static struct clk clk_f = {
-        .name           = "fclk",
-};
-static struct clk clk_h = {
-        .name           = "hclk",
-};
-static struct clk clk_p = {
-        .name           = "pclk",
-};
-static struct clk clk_pll2 = {
-        .name           = "pll2",
-};
+static struct clk clk_pll1;
+static struct clk clk_f;
+static struct clk clk_h;
+static struct clk clk_p;
+static struct clk clk_pll2;
 static struct clk clk_usb_host = {
-        .name           = "usb_host",
         .enable_reg     = EP93XX_SYSCON_CLOCK_CONTROL,
         .enable_mask    = EP93XX_SYSCON_CLOCK_USH_EN,
 };
 
-
-static struct clk *clocks[] = {
-        &clk_uart,
-        &clk_pll1,
-        &clk_f,
-        &clk_h,
-        &clk_p,
-        &clk_pll2,
-        &clk_usb_host,
+#define INIT_CK(dev,con,ck)                                     \
+        { .dev_id = dev, .con_id = con, .clk = ck }
+
+static struct clk_lookup clocks[] = {
+        INIT_CK("apb:uart1", NULL, &clk_uart),
+        INIT_CK("apb:uart2", NULL, &clk_uart),
+        INIT_CK("apb:uart3", NULL, &clk_uart),
+        INIT_CK(NULL, "pll1", &clk_pll1),
+        INIT_CK(NULL, "fclk", &clk_f),
+        INIT_CK(NULL, "hclk", &clk_h),
+        INIT_CK(NULL, "pclk", &clk_p),
+        INIT_CK(NULL, "pll2", &clk_pll2),
+        INIT_CK(NULL, "usb_host", &clk_usb_host),
 };
 
-struct clk *clk_get(struct device *dev, const char *id)
-{
-        int i;
-
-        for (i = 0; i < ARRAY_SIZE(clocks); i++) {
-                if (!strcmp(clocks[i]->name, id))
-                        return clocks[i];
-        }
-
-        return ERR_PTR(-ENOENT);
-}
-EXPORT_SYMBOL(clk_get);
 
 int clk_enable(struct clk *clk)
 {
@@ -106,12 +87,6 @@ unsigned long clk_get_rate(struct clk *clk)
 }
 EXPORT_SYMBOL(clk_get_rate);
 
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
-
-
 
 static char fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 };
 static char hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 };
@@ -138,6 +113,7 @@ static unsigned long calc_pll_rate(u32 config_word)
 static int __init ep93xx_clock_init(void)
 {
         u32 value;
+        int i;
 
         value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1);
         if (!(value & 0x00800000)) {                    /* PLL1 bypassed?  */
@@ -165,6 +141,8 @@ static int __init ep93xx_clock_init(void)
                 clk_f.rate / 1000000, clk_h.rate / 1000000,
                 clk_p.rate / 1000000);
 
+        for (i = 0; i < ARRAY_SIZE(clocks); i++)
+                clkdev_add(&clocks[i]);
         return 0;
 }
 arch_initcall(ep93xx_clock_init);
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 48345fb34613..4781f323703b 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -34,6 +34,8 @@
 #include <linux/amba/bus.h>
 #include <linux/amba/serial.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/i2c-gpio.h>
 
 #include <asm/types.h>
 #include <asm/setup.h>
@@ -153,12 +155,14 @@ static unsigned char gpio_int_unmasked[3];
 static unsigned char gpio_int_enabled[3];
 static unsigned char gpio_int_type1[3];
 static unsigned char gpio_int_type2[3];
+static unsigned char gpio_int_debouce[3];
 
 /* Port ordering is: A B F */
 static const u8 int_type1_register_offset[3]    = { 0x90, 0xac, 0x4c };
 static const u8 int_type2_register_offset[3]    = { 0x94, 0xb0, 0x50 };
 static const u8 eoi_register_offset[3]          = { 0x98, 0xb4, 0x54 };
 static const u8 int_en_register_offset[3]       = { 0x9c, 0xb8, 0x58 };
+static const u8 int_debounce_register_offset[3] = { 0xa8, 0xc4, 0x64 };
 
 void ep93xx_gpio_update_int_params(unsigned port)
 {
@@ -181,6 +185,22 @@ void ep93xx_gpio_int_mask(unsigned line)
         gpio_int_unmasked[line >> 3] &= ~(1 << (line & 7));
 }
 
+void ep93xx_gpio_int_debounce(unsigned int irq, int enable)
+{
+        int line = irq_to_gpio(irq);
+        int port = line >> 3;
+        int port_mask = 1 << (line & 7);
+
+        if (enable)
+                gpio_int_debouce[port] |= port_mask;
+        else
+                gpio_int_debouce[port] &= ~port_mask;
+
+        __raw_writeb(gpio_int_debouce[port],
+                EP93XX_GPIO_REG(int_debounce_register_offset[port]));
+}
+EXPORT_SYMBOL(ep93xx_gpio_int_debounce);
+
 /*************************************************************************
  * EP93xx IRQ handling
  *************************************************************************/
@@ -497,6 +517,26 @@ void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
         platform_device_register(&ep93xx_eth_device);
 }
 
+static struct i2c_gpio_platform_data ep93xx_i2c_data = {
+        .sda_pin                = EP93XX_GPIO_LINE_EEDAT,
+        .sda_is_open_drain      = 0,
+        .scl_pin                = EP93XX_GPIO_LINE_EECLK,
+        .scl_is_open_drain      = 0,
+        .udelay                 = 2,
+};
+
+static struct platform_device ep93xx_i2c_device = {
+        .name                   = "i2c-gpio",
+        .id                     = 0,
+        .dev.platform_data      = &ep93xx_i2c_data,
+};
+
+void __init ep93xx_register_i2c(struct i2c_board_info *devices, int num)
+{
+        i2c_register_board_info(0, devices, num);
+        platform_device_register(&ep93xx_i2c_device);
+}
+
 extern void ep93xx_gpio_init(void);
 
 void __init ep93xx_init_devices(void)
diff --git a/arch/arm/mach-ep93xx/edb9302.c b/arch/arm/mach-ep93xx/edb9302.c
index e4add5bdccfd..8bf8d7c78f1a 100644
--- a/arch/arm/mach-ep93xx/edb9302.c
+++ b/arch/arm/mach-ep93xx/edb9302.c
@@ -19,6 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data edb9302_flash_data = {
 };
 
 static struct resource edb9302_flash_resource = {
-        .start          = 0x60000000,
-        .end            = 0x60ffffff,
+        .start          = EP93XX_CS6_PHYS_BASE,
+        .end            = EP93XX_CS6_PHYS_BASE + SZ_16M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -59,7 +60,7 @@ MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
         /* Maintainer: George Kashperko <george@chas.com.ua> */
         .phys_io        = EP93XX_APB_PHYS_BASE,
         .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/edb9302a.c b/arch/arm/mach-ep93xx/edb9302a.c
index 02c4405afed7..a352c57c7b46 100644
--- a/arch/arm/mach-ep93xx/edb9302a.c
+++ b/arch/arm/mach-ep93xx/edb9302a.c
@@ -19,6 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data edb9302a_flash_data = {
 };
 
 static struct resource edb9302a_flash_resource = {
-        .start          = 0x60000000,
-        .end            = 0x60ffffff,
+        .start          = EP93XX_CS6_PHYS_BASE,
+        .end            = EP93XX_CS6_PHYS_BASE + SZ_16M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -44,7 +45,7 @@ static struct platform_device edb9302a_flash = {
 };
 
 static struct ep93xx_eth_data edb9302a_eth_data = {
-        .phy_id                 = 1,
+        .phy_id         = 1,
 };
 
 static void __init edb9302a_init_machine(void)
@@ -59,7 +60,7 @@ MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
         /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
         .phys_io        = EP93XX_APB_PHYS_BASE,
         .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0xc0000100,
+        .boot_params    = EP93XX_SDCE0_PHYS_BASE + 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/edb9307.c b/arch/arm/mach-ep93xx/edb9307.c
index 040edbd2ea05..5ab22f63a4eb 100644
--- a/arch/arm/mach-ep93xx/edb9307.c
+++ b/arch/arm/mach-ep93xx/edb9307.c
@@ -19,6 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data edb9307_flash_data = {
 };
 
 static struct resource edb9307_flash_resource = {
-        .start          = 0x60000000,
-        .end            = 0x61ffffff,
+        .start          = EP93XX_CS6_PHYS_BASE,
+        .end            = EP93XX_CS6_PHYS_BASE + SZ_32M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -44,7 +45,7 @@ static struct platform_device edb9307_flash = {
 };
 
 static struct ep93xx_eth_data edb9307_eth_data = {
-        .phy_id                 = 1,
+        .phy_id         = 1,
 };
 
 static void __init edb9307_init_machine(void)
@@ -59,7 +60,7 @@ MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")
         /* Maintainer: Herbert Valerio Riedel <hvr@gnu.org> */
         .phys_io        = EP93XX_APB_PHYS_BASE,
         .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/edb9307a.c b/arch/arm/mach-ep93xx/edb9307a.c
new file mode 100644
index 000000000000..5b5c22b681be
--- /dev/null
+++ b/arch/arm/mach-ep93xx/edb9307a.c
@@ -0,0 +1,68 @@
+/*
+ * arch/arm/mach-ep93xx/edb9307a.c
+ * Cirrus Logic EDB9307A support.
+ *
+ * Copyright (C) 2008 H Hartley Sweeten <hsweeten@visionengravers.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/mtd/physmap.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+static struct physmap_flash_data edb9307a_flash_data = {
+        .width          = 2,
+};
+
+static struct resource edb9307a_flash_resource = {
+        .start          = EP93XX_CS6_PHYS_BASE,
+        .end            = EP93XX_CS6_PHYS_BASE + SZ_16M - 1,
+        .flags          = IORESOURCE_MEM,
+};
+
+static struct platform_device edb9307a_flash = {
+        .name           = "physmap-flash",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &edb9307a_flash_data,
+        },
+        .num_resources  = 1,
+        .resource       = &edb9307a_flash_resource,
+};
+
+static struct ep93xx_eth_data edb9307a_eth_data = {
+        .phy_id         = 1,
+};
+
+static void __init edb9307a_init_machine(void)
+{
+        ep93xx_init_devices();
+        platform_device_register(&edb9307a_flash);
+
+        ep93xx_register_eth(&edb9307a_eth_data, 1);
+}
+
+MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board")
+        /* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */
+        .phys_io        = EP93XX_APB_PHYS_BASE,
+        .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = EP93XX_SDCE0_PHYS_BASE + 0x100,
+        .map_io         = ep93xx_map_io,
+        .init_irq       = ep93xx_init_irq,
+        .timer          = &ep93xx_timer,
+        .init_machine   = edb9307a_init_machine,
+MACHINE_END
diff --git a/arch/arm/mach-ep93xx/edb9312.c b/arch/arm/mach-ep93xx/edb9312.c
index 6853e302bc3a..d7179f66d804 100644
--- a/arch/arm/mach-ep93xx/edb9312.c
+++ b/arch/arm/mach-ep93xx/edb9312.c
@@ -20,6 +20,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -29,8 +30,8 @@ static struct physmap_flash_data edb9312_flash_data = {
 };
 
 static struct resource edb9312_flash_resource = {
-        .start          = 0x60000000,
-        .end            = 0x61ffffff,
+        .start          = EP93XX_CS6_PHYS_BASE,
+        .end            = EP93XX_CS6_PHYS_BASE + SZ_32M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -45,7 +46,7 @@ static struct platform_device edb9312_flash = {
 };
 
 static struct ep93xx_eth_data edb9312_eth_data = {
-        .phy_id                 = 1,
+        .phy_id         = 1,
 };
 
 static void __init edb9312_init_machine(void)
@@ -60,7 +61,7 @@ MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
         /* Maintainer: Toufeeq Hussain <toufeeq_hussain@infosys.com> */
         .phys_io        = EP93XX_APB_PHYS_BASE,
         .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/edb9315.c b/arch/arm/mach-ep93xx/edb9315.c
index 9469b350d253..025af6eaca10 100644
--- a/arch/arm/mach-ep93xx/edb9315.c
+++ b/arch/arm/mach-ep93xx/edb9315.c
@@ -19,6 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data edb9315_flash_data = {
 };
 
 static struct resource edb9315_flash_resource = {
-        .start          = 0x60000000,
-        .end            = 0x61ffffff,
+        .start          = EP93XX_CS6_PHYS_BASE,
+        .end            = EP93XX_CS6_PHYS_BASE + SZ_32M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -44,7 +45,7 @@ static struct platform_device edb9315_flash = {
 };
 
 static struct ep93xx_eth_data edb9315_eth_data = {
-        .phy_id                 = 1,
+        .phy_id         = 1,
 };
 
 static void __init edb9315_init_machine(void)
@@ -59,7 +60,7 @@ MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
         /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
         .phys_io        = EP93XX_APB_PHYS_BASE,
         .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/edb9315a.c b/arch/arm/mach-ep93xx/edb9315a.c
index 584457ce7c80..4c9cc8a39f5c 100644
--- a/arch/arm/mach-ep93xx/edb9315a.c
+++ b/arch/arm/mach-ep93xx/edb9315a.c
@@ -19,6 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data edb9315a_flash_data = {
 };
 
 static struct resource edb9315a_flash_resource = {
-        .start          = 0x60000000,
-        .end            = 0x60ffffff,
+        .start          = EP93XX_CS6_PHYS_BASE,
+        .end            = EP93XX_CS6_PHYS_BASE + SZ_16M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -44,7 +45,7 @@ static struct platform_device edb9315a_flash = {
 };
 
 static struct ep93xx_eth_data edb9315a_eth_data = {
-        .phy_id                 = 1,
+        .phy_id         = 1,
 };
 
 static void __init edb9315a_init_machine(void)
@@ -59,7 +60,7 @@ MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
         /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
         .phys_io        = EP93XX_APB_PHYS_BASE,
         .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0xc0000100,
+        .boot_params    = EP93XX_SDCE0_PHYS_BASE + 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index 035b24e31b64..3bad500b71b6 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -19,6 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -28,8 +29,8 @@ static struct physmap_flash_data gesbc9312_flash_data = {
 };
 
 static struct resource gesbc9312_flash_resource = {
-        .start          = 0x60000000,
-        .end            = 0x607fffff,
+        .start          = EP93XX_CS6_PHYS_BASE,
+        .end            = EP93XX_CS6_PHYS_BASE + SZ_8M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -59,7 +60,7 @@ MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
         /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
         .phys_io        = EP93XX_APB_PHYS_BASE,
         .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
         .map_io         = ep93xx_map_io,
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
diff --git a/arch/arm/mach-ep93xx/include/mach/clkdev.h b/arch/arm/mach-ep93xx/include/mach/clkdev.h
new file mode 100644
index 000000000000..04b37a89801c
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do { } while (0)
+
+#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/dma.h b/arch/arm/mach-ep93xx/include/mach/dma.h
deleted file mode 100644
index d0fa9656e92f..000000000000
--- a/arch/arm/mach-ep93xx/include/mach/dma.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/*
- * arch/arm/mach-ep93xx/include/mach/dma.h
- */
diff --git a/arch/arm/mach-ep93xx/include/mach/gpio.h b/arch/arm/mach-ep93xx/include/mach/gpio.h
index f7020414c5df..0a1498ae899a 100644
--- a/arch/arm/mach-ep93xx/include/mach/gpio.h
+++ b/arch/arm/mach-ep93xx/include/mach/gpio.h
@@ -99,6 +99,8 @@
 /* maximum value for irq capable line identifiers */
 #define EP93XX_GPIO_LINE_MAX_IRQ        EP93XX_GPIO_LINE_F(7)
 
+extern void ep93xx_gpio_int_debounce(unsigned int irq, int enable);
+
 /* new generic GPIO API - see Documentation/gpio.txt */
 
 #include <asm-generic/gpio.h>
diff --git a/arch/arm/mach-ep93xx/include/mach/io.h b/arch/arm/mach-ep93xx/include/mach/io.h
index 1ab9a90ad339..fd5f081cc8b7 100644
--- a/arch/arm/mach-ep93xx/include/mach/io.h
+++ b/arch/arm/mach-ep93xx/include/mach/io.h
@@ -4,5 +4,5 @@
 
 #define IO_SPACE_LIMIT          0xffffffff
 
-#define __io(p)                 ((void __iomem *)(p))
-#define __mem_pci(p)            (p)
+#define __io(p)         __typesafe_io(p)
+#define __mem_pci(p)    (p)
diff --git a/arch/arm/mach-ep93xx/include/mach/memory.h b/arch/arm/mach-ep93xx/include/mach/memory.h
index f1b633590752..5c80c3c8158d 100644
--- a/arch/arm/mach-ep93xx/include/mach/memory.h
+++ b/arch/arm/mach-ep93xx/include/mach/memory.h
@@ -7,8 +7,4 @@
 
 #define PHYS_OFFSET             UL(0x00000000)
 
-#define __bus_to_virt(x)        __phys_to_virt(x)
-#define __virt_to_bus(x)        __virt_to_phys(x)
-
-
 #endif
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index db2489d3bda7..88f7e88f152f 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -14,6 +14,7 @@ void ep93xx_map_io(void);
 void ep93xx_init_irq(void);
 void ep93xx_init_time(unsigned long);
 void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr);
+void ep93xx_register_i2c(struct i2c_board_info *devices, int num);
 void ep93xx_init_devices(void);
 extern struct sys_timer ep93xx_timer;
 
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index c2197236b632..15d6815d78c4 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -17,6 +17,7 @@
 #include <linux/platform_device.h>
 #include <linux/sched.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <linux/mtd/physmap.h>
 
 #include <mach/hardware.h>
@@ -25,7 +26,7 @@
 #include <asm/mach-types.h>
 
 static struct ep93xx_eth_data micro9_eth_data = {
-       .phy_id                 = 0x1f,
+        .phy_id         = 0x1f,
 };
 
 static void __init micro9_init(void)
@@ -38,46 +39,46 @@ static void __init micro9_init(void)
  */
 #ifdef CONFIG_MACH_MICRO9H
 static struct physmap_flash_data micro9h_flash_data = {
-       .width          = 4,
+        .width          = 4,
 };
 
 static struct resource micro9h_flash_resource = {
-       .start          = 0x10000000,
-       .end            = 0x13ffffff,
-       .flags          = IORESOURCE_MEM,
+        .start          = EP93XX_CS1_PHYS_BASE,
+        .end            = EP93XX_CS1_PHYS_BASE + SZ_64M - 1,
+        .flags          = IORESOURCE_MEM,
 };
 
 static struct platform_device micro9h_flash = {
-       .name           = "physmap-flash",
-       .id             = 0,
-       .dev            = {
-               .platform_data  = &micro9h_flash_data,
-       },
-       .num_resources  = 1,
-       .resource       = &micro9h_flash_resource,
+        .name           = "physmap-flash",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &micro9h_flash_data,
+        },
+        .num_resources  = 1,
+        .resource       = &micro9h_flash_resource,
 };
 
 static void __init micro9h_init(void)
 {
-       platform_device_register(&micro9h_flash);
+        platform_device_register(&micro9h_flash);
 }
 
 static void __init micro9h_init_machine(void)
 {
-       ep93xx_init_devices();
-       micro9_init();
-       micro9h_init();
+        ep93xx_init_devices();
+        micro9_init();
+        micro9h_init();
 }
 
 MACHINE_START(MICRO9, "Contec Hypercontrol Micro9-H")
-       /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
-       .phys_io        = EP93XX_APB_PHYS_BASE,
-       .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-       .boot_params    = 0x00000100,
-       .map_io         = ep93xx_map_io,
-       .init_irq       = ep93xx_init_irq,
-       .timer          = &ep93xx_timer,
-       .init_machine   = micro9h_init_machine,
+        /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
+        .phys_io        = EP93XX_APB_PHYS_BASE,
+        .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
+        .map_io         = ep93xx_map_io,
+        .init_irq       = ep93xx_init_irq,
+        .timer          = &ep93xx_timer,
+        .init_machine   = micro9h_init_machine,
 MACHINE_END
 #endif
 
@@ -87,19 +88,19 @@ MACHINE_END
 #ifdef CONFIG_MACH_MICRO9M
 static void __init micro9m_init_machine(void)
 {
-       ep93xx_init_devices();
-       micro9_init();
+        ep93xx_init_devices();
+        micro9_init();
 }
 
 MACHINE_START(MICRO9M, "Contec Hypercontrol Micro9-M")
-       /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
-       .phys_io        = EP93XX_APB_PHYS_BASE,
-       .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-       .boot_params    = 0x00000100,
-       .map_io         = ep93xx_map_io,
-       .init_irq       = ep93xx_init_irq,
-       .timer          = &ep93xx_timer,
-       .init_machine   = micro9m_init_machine,
+        /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
+        .phys_io        = EP93XX_APB_PHYS_BASE,
+        .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
+        .map_io         = ep93xx_map_io,
+        .init_irq       = ep93xx_init_irq,
+        .timer          = &ep93xx_timer,
+        .init_machine   = micro9m_init_machine,
 MACHINE_END
 #endif
 
@@ -109,19 +110,19 @@ MACHINE_END
 #ifdef CONFIG_MACH_MICRO9L
 static void __init micro9l_init_machine(void)
 {
-       ep93xx_init_devices();
-       micro9_init();
+        ep93xx_init_devices();
+        micro9_init();
 }
 
 MACHINE_START(MICRO9L, "Contec Hypercontrol Micro9-L")
-       /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
-       .phys_io        = EP93XX_APB_PHYS_BASE,
-       .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-       .boot_params    = 0x00000100,
-       .map_io         = ep93xx_map_io,
-       .init_irq       = ep93xx_init_irq,
-       .timer          = &ep93xx_timer,
-       .init_machine   = micro9l_init_machine,
+        /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
+        .phys_io        = EP93XX_APB_PHYS_BASE,
+        .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
+        .map_io         = ep93xx_map_io,
+        .init_irq       = ep93xx_init_irq,
+        .timer          = &ep93xx_timer,
+        .init_machine   = micro9l_init_machine,
 MACHINE_END
 #endif
 
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index b4aa4c054276..7ee024d34829 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -20,6 +20,7 @@
 #include <linux/platform_device.h>
 #include <linux/m48t86.h>
 #include <linux/io.h>
+#include <linux/i2c.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -117,7 +118,7 @@ static struct physmap_flash_data ts72xx_flash_data = {
 
 static struct resource ts72xx_flash_resource = {
         .start          = TS72XX_NOR_PHYS_BASE,
-        .end            = TS72XX_NOR_PHYS_BASE + 0x00ffffff,
+        .end            = TS72XX_NOR_PHYS_BASE + SZ_16M - 1,
         .flags          = IORESOURCE_MEM,
 };
 
@@ -144,21 +145,21 @@ static void ts72xx_rtc_writebyte(unsigned char value, unsigned long addr)
 }
 
 static struct m48t86_ops ts72xx_rtc_ops = {
-        .readbyte               = ts72xx_rtc_readbyte,
-        .writebyte              = ts72xx_rtc_writebyte,
+        .readbyte       = ts72xx_rtc_readbyte,
+        .writebyte      = ts72xx_rtc_writebyte,
 };
 
 static struct platform_device ts72xx_rtc_device = {
-        .name                   = "rtc-m48t86",
-        .id                     = -1,
-        .dev                    = {
-                .platform_data          = &ts72xx_rtc_ops,
+        .name           = "rtc-m48t86",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &ts72xx_rtc_ops,
         },
-        .num_resources          = 0,
+        .num_resources  = 0,
 };
 
 static struct ep93xx_eth_data ts72xx_eth_data = {
-        .phy_id                 = 1,
+        .phy_id         = 1,
 };
 
 static void __init ts72xx_init_machine(void)
@@ -175,7 +176,7 @@ MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
         /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
         .phys_io        = EP93XX_APB_PHYS_BASE,
         .io_pg_offst    = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
         .map_io         = ts72xx_map_io,
         .init_irq       = ep93xx_init_irq,
         .timer          = &ep93xx_timer,
diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c
index 6a5b437ab86f..1b996b26d2e0 100644
--- a/arch/arm/mach-footbridge/cats-hw.c
+++ b/arch/arm/mach-footbridge/cats-hw.c
@@ -10,6 +10,7 @@
 #include <linux/init.h>
 #include <linux/screen_info.h>
 #include <linux/io.h>
+#include <linux/spinlock.h>
 
 #include <asm/hardware/dec21285.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index 818014e09f4a..36ff06d4df15 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -14,6 +14,7 @@
 #include <linux/list.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/spinlock.h>
  
 #include <asm/pgtable.h>
 #include <asm/page.h>
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c
index b2a21189dd81..da35bc5c5ccc 100644
--- a/arch/arm/mach-footbridge/dc21285-timer.c
+++ b/arch/arm/mach-footbridge/dc21285-timer.c
@@ -7,6 +7,7 @@
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
+#include <linux/spinlock.h>
 
 #include <asm/irq.h>
 
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index d4c1e526f59c..133086019e3e 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -17,6 +17,7 @@
 #include <linux/ioport.h>
 #include <linux/irq.h>
 #include <linux/io.h>
+#include <linux/spinlock.h>
 
 #include <asm/irq.h>
 #include <asm/system.h>
diff --git a/arch/arm/mach-footbridge/dma.c b/arch/arm/mach-footbridge/dma.c
index b653e9cfa3f7..4f3506346969 100644
--- a/arch/arm/mach-footbridge/dma.c
+++ b/arch/arm/mach-footbridge/dma.c
@@ -12,6 +12,7 @@
  */
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/spinlock.h>
 
 #include <asm/dma.h>
 #include <asm/scatterlist.h>
diff --git a/arch/arm/mach-footbridge/ebsa285.c b/arch/arm/mach-footbridge/ebsa285.c
index b1d3bf20a41e..30040fd588cc 100644
--- a/arch/arm/mach-footbridge/ebsa285.c
+++ b/arch/arm/mach-footbridge/ebsa285.c
@@ -4,6 +4,7 @@
  * EBSA285 machine fixup
  */
 #include <linux/init.h>
+#include <linux/spinlock.h>
 
 #include <asm/hardware/dec21285.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-footbridge/include/mach/hardware.h b/arch/arm/mach-footbridge/include/mach/hardware.h
index ffaea90486f9..51dd902043ad 100644
--- a/arch/arm/mach-footbridge/include/mach/hardware.h
+++ b/arch/arm/mach-footbridge/include/mach/hardware.h
@@ -12,8 +12,6 @@
 #ifndef __ASM_ARCH_HARDWARE_H
 #define __ASM_ARCH_HARDWARE_H
 
-#include <mach/memory.h>
-
 /*   Virtual      Physical      Size
  * 0xff800000   0x40000000      1MB     X-Bus
  * 0xff000000   0x7c000000      1MB     PCI I/O space
@@ -28,9 +26,6 @@
 #define XBUS_SIZE               0x00100000
 #define XBUS_BASE               0xff800000
 
-#define PCIO_SIZE               0x00100000
-#define PCIO_BASE               0xff000000
-
 #define ARMCSR_SIZE             0x00100000
 #define ARMCSR_BASE             0xfe000000
 
@@ -91,10 +86,11 @@
 #define CPLD_FLASH_WR_ENABLE    1
 
 #ifndef __ASSEMBLY__
-extern void gpio_modify_op(int mask, int set);
-extern void gpio_modify_io(int mask, int in);
-extern int  gpio_read(void);
-extern void cpld_modify(int mask, int set);
+extern spinlock_t nw_gpio_lock;
+extern void nw_gpio_modify_op(unsigned int mask, unsigned int set);
+extern void nw_gpio_modify_io(unsigned int mask, unsigned int in);
+extern unsigned int nw_gpio_read(void);
+extern void nw_cpld_modify(unsigned int mask, unsigned int set);
 #endif
 
 #define pcibios_assign_all_busses()     1
diff --git a/arch/arm/mach-footbridge/include/mach/io.h b/arch/arm/mach-footbridge/include/mach/io.h
index a7b066239996..101a4fe90bde 100644
--- a/arch/arm/mach-footbridge/include/mach/io.h
+++ b/arch/arm/mach-footbridge/include/mach/io.h
@@ -14,7 +14,8 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#include <mach/hardware.h>
+#define PCIO_SIZE               0x00100000
+#define PCIO_BASE               0xff000000
 
 #define IO_SPACE_LIMIT 0xffff
 
diff --git a/arch/arm/mach-footbridge/include/mach/dma.h b/arch/arm/mach-footbridge/include/mach/isa-dma.h
index 62afd213effb..5bd4a0d338a8 100644
--- a/arch/arm/mach-footbridge/include/mach/dma.h
+++ b/arch/arm/mach-footbridge/include/mach/isa-dma.h
@@ -1,5 +1,5 @@
 /*
- *  arch/arm/mach-footbridge/include/mach/dma.h
+ *  arch/arm/mach-footbridge/include/mach/isa-dma.h
  *
  *  Architecture DMA routines
  *
diff --git a/arch/arm/mach-footbridge/include/mach/memory.h b/arch/arm/mach-footbridge/include/mach/memory.h
index 6ae2f1a07ab9..cb16e59d87b6 100644
--- a/arch/arm/mach-footbridge/include/mach/memory.h
+++ b/arch/arm/mach-footbridge/include/mach/memory.h
@@ -30,9 +30,18 @@
 extern unsigned long __virt_to_bus(unsigned long);
 extern unsigned long __bus_to_virt(unsigned long);
 #endif
+#define __virt_to_bus   __virt_to_bus
+#define __bus_to_virt   __bus_to_virt
 
 #elif defined(CONFIG_FOOTBRIDGE_HOST)
 
+/*
+ * The footbridge is programmed to expose the system RAM at the corresponding
+ * address.  So, if PAGE_OFFSET is 0xc0000000, RAM appears at 0xe0000000.
+ * If 0x80000000, then its exposed at 0xa0000000 on the bus. etc.
+ * The only requirement is that the RAM isn't placed at bus address 0 which
+ * would clash with VGA cards.
+ */
 #define __virt_to_bus(x)        ((x) - 0xe0000000)
 #define __bus_to_virt(x)        ((x) + 0xe0000000)
 
diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c
index 54fec9ae28b9..9ee80a211d3c 100644
--- a/arch/arm/mach-footbridge/isa-irq.c
+++ b/arch/arm/mach-footbridge/isa-irq.c
@@ -19,6 +19,7 @@
 #include <linux/list.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/spinlock.h>
 
 #include <asm/mach/irq.h>
 
diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c
index 00b0ddcac283..ac7ffa6fc413 100644
--- a/arch/arm/mach-footbridge/netwinder-hw.c
+++ b/arch/arm/mach-footbridge/netwinder-hw.c
@@ -11,6 +11,7 @@
 #include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/spinlock.h>
 
 #include <asm/hardware/dec21285.h>
 #include <asm/leds.h>
@@ -67,13 +68,14 @@ static inline void wb977_ww(int reg, int val)
 /*
  * This is a lock for accessing ports GP1_IO_BASE and GP2_IO_BASE
  */
-DEFINE_SPINLOCK(gpio_lock);
+DEFINE_SPINLOCK(nw_gpio_lock);
+EXPORT_SYMBOL(nw_gpio_lock);
 
 static unsigned int current_gpio_op;
 static unsigned int current_gpio_io;
 static unsigned int current_cpld;
 
-void gpio_modify_op(int mask, int set)
+void nw_gpio_modify_op(unsigned int mask, unsigned int set)
 {
         unsigned int new_gpio, changed;
 
@@ -86,6 +88,7 @@ void gpio_modify_op(int mask, int set)
         if (changed & 0xff00)
                 outb(new_gpio >> 8, GP2_IO_BASE);
 }
+EXPORT_SYMBOL(nw_gpio_modify_op);
 
 static inline void __gpio_modify_io(int mask, int in)
 {
@@ -118,7 +121,7 @@ static inline void __gpio_modify_io(int mask, int in)
         }
 }
 
-void gpio_modify_io(int mask, int in)
+void nw_gpio_modify_io(unsigned int mask, unsigned int in)
 {
         /* Open up the SuperIO chip */
         wb977_open();
@@ -128,11 +131,13 @@ void gpio_modify_io(int mask, int in)
         /* Close up the EFER gate */
         wb977_close();
 }
+EXPORT_SYMBOL(nw_gpio_modify_io);
 
-int gpio_read(void)
+unsigned int nw_gpio_read(void)
 {
         return inb(GP1_IO_BASE) | inb(GP2_IO_BASE) << 8;
 }
+EXPORT_SYMBOL(nw_gpio_read);
 
 /*
  * Initialise the Winbond W83977F global registers
@@ -322,9 +327,9 @@ static inline void wb977_init_gpio(void)
         /*
          * Set Group1/Group2 outputs
          */
-        spin_lock_irqsave(&gpio_lock, flags);
-        gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN);
-        spin_unlock_irqrestore(&gpio_lock, flags);
+        spin_lock_irqsave(&nw_gpio_lock, flags);
+        nw_gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN);
+        spin_unlock_irqrestore(&nw_gpio_lock, flags);
 }
 
 /*
@@ -359,34 +364,35 @@ static void __init wb977_init(void)
         wb977_close();
 }
 
-void cpld_modify(int mask, int set)
+void nw_cpld_modify(unsigned int mask, unsigned int set)
 {
         int msk;
 
         current_cpld = (current_cpld & ~mask) | set;
 
-        gpio_modify_io(GPIO_DATA | GPIO_IOCLK | GPIO_IOLOAD, 0);
-        gpio_modify_op(GPIO_IOLOAD, 0);
+        nw_gpio_modify_io(GPIO_DATA | GPIO_IOCLK | GPIO_IOLOAD, 0);
+        nw_gpio_modify_op(GPIO_IOLOAD, 0);
 
         for (msk = 8; msk; msk >>= 1) {
                 int bit = current_cpld & msk;
 
-                gpio_modify_op(GPIO_DATA | GPIO_IOCLK, bit ? GPIO_DATA : 0);
-                gpio_modify_op(GPIO_IOCLK, GPIO_IOCLK);
+                nw_gpio_modify_op(GPIO_DATA | GPIO_IOCLK, bit ? GPIO_DATA : 0);
+                nw_gpio_modify_op(GPIO_IOCLK, GPIO_IOCLK);
         }
 
-        gpio_modify_op(GPIO_IOCLK|GPIO_DATA, 0);
-        gpio_modify_op(GPIO_IOLOAD|GPIO_DSCLK, GPIO_IOLOAD|GPIO_DSCLK);
-        gpio_modify_op(GPIO_IOLOAD, 0);
+        nw_gpio_modify_op(GPIO_IOCLK|GPIO_DATA, 0);
+        nw_gpio_modify_op(GPIO_IOLOAD|GPIO_DSCLK, GPIO_IOLOAD|GPIO_DSCLK);
+        nw_gpio_modify_op(GPIO_IOLOAD, 0);
 }
+EXPORT_SYMBOL(nw_cpld_modify);
 
 static void __init cpld_init(void)
 {
         unsigned long flags;
 
-        spin_lock_irqsave(&gpio_lock, flags);
-        cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE);
-        spin_unlock_irqrestore(&gpio_lock, flags);
+        spin_lock_irqsave(&nw_gpio_lock, flags);
+        nw_cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE);
+        spin_unlock_irqrestore(&nw_gpio_lock, flags);
 }
 
 static unsigned char rwa_unlock[] __initdata =
@@ -596,12 +602,6 @@ static void __init rwa010_init(void)
         rwa010_soundblaster_reset();
 }
 
-EXPORT_SYMBOL(gpio_lock);
-EXPORT_SYMBOL(gpio_modify_op);
-EXPORT_SYMBOL(gpio_modify_io);
-EXPORT_SYMBOL(cpld_modify);
-EXPORT_SYMBOL(gpio_read);
-
 /*
  * Initialise any other hardware after we've got the PCI bus
  * initialised.  We may need the PCI bus to talk to this other
@@ -616,9 +616,9 @@ static int __init nw_hw_init(void)
                 cpld_init();
                 rwa010_init();
 
-                spin_lock_irqsave(&gpio_lock, flags);
-                gpio_modify_op(GPIO_RED_LED|GPIO_GREEN_LED, DEFAULT_LEDS);
-                spin_unlock_irqrestore(&gpio_lock, flags);
+                spin_lock_irqsave(&nw_gpio_lock, flags);
+                nw_gpio_modify_op(GPIO_RED_LED|GPIO_GREEN_LED, DEFAULT_LEDS);
+                spin_unlock_irqrestore(&nw_gpio_lock, flags);
         }
         return 0;
 }
diff --git a/arch/arm/mach-footbridge/netwinder-leds.c b/arch/arm/mach-footbridge/netwinder-leds.c
index d91a4f4a32dc..00269fe0be8a 100644
--- a/arch/arm/mach-footbridge/netwinder-leds.c
+++ b/arch/arm/mach-footbridge/netwinder-leds.c
@@ -32,7 +32,6 @@ static char led_state;
 static char hw_led_state;
 
 static DEFINE_SPINLOCK(leds_lock);
-extern spinlock_t gpio_lock;
 
 static void netwinder_leds_event(led_event_t evt)
 {
@@ -121,9 +120,9 @@ static void netwinder_leds_event(led_event_t evt)
         spin_unlock_irqrestore(&leds_lock, flags);
 
         if  (led_state & LED_STATE_ENABLED) {
-                spin_lock_irqsave(&gpio_lock, flags);
-                gpio_modify_op(GPIO_RED_LED | GPIO_GREEN_LED, hw_led_state);
-                spin_unlock_irqrestore(&gpio_lock, flags);
+                spin_lock_irqsave(&nw_gpio_lock, flags);
+                nw_gpio_modify_op(GPIO_RED_LED | GPIO_GREEN_LED, hw_led_state);
+                spin_unlock_irqrestore(&nw_gpio_lock, flags);
         }
 }
 
diff --git a/arch/arm/mach-footbridge/personal.c b/arch/arm/mach-footbridge/personal.c
index c4f843fc099d..e2c9f0690b16 100644
--- a/arch/arm/mach-footbridge/personal.c
+++ b/arch/arm/mach-footbridge/personal.c
@@ -4,6 +4,7 @@
  * Personal server (Skiff) machine fixup
  */
 #include <linux/init.h>
+#include <linux/spinlock.h>
 
 #include <asm/hardware/dec21285.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-h720x/include/mach/io.h b/arch/arm/mach-h720x/include/mach/io.h
index 1dab74ce88c6..2c8659c21a93 100644
--- a/arch/arm/mach-h720x/include/mach/io.h
+++ b/arch/arm/mach-h720x/include/mach/io.h
@@ -14,11 +14,9 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#include <mach/hardware.h>
-
 #define IO_SPACE_LIMIT 0xffffffff
 
-#define __io(a)         ((void __iomem *)(a))
+#define __io(a)         __typesafe_io(a)
 #define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-h720x/include/mach/dma.h b/arch/arm/mach-h720x/include/mach/isa-dma.h
index 0a9d86ee84fe..3eafb3f163c0 100644
--- a/arch/arm/mach-h720x/include/mach/dma.h
+++ b/arch/arm/mach-h720x/include/mach/isa-dma.h
@@ -1,5 +1,5 @@
 /*
- * arch/arm/mach-h720x/include/mach/dma.h
+ * arch/arm/mach-h720x/include/mach/isa-dma.h
  *
  * Architecture DMA routes
  *
@@ -8,13 +8,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-/*
- * This is the maximum DMA address that can be DMAd to.
- * There should not be more than (0xd0000000 - 0xc0000000)
- * bytes of RAM.
- */
-#define MAX_DMA_ADDRESS         0xd0000000
-
 #if defined (CONFIG_CPU_H7201)
 #define MAX_DMA_CHANNELS        3
 #elif defined (CONFIG_CPU_H7202)
diff --git a/arch/arm/mach-h720x/include/mach/memory.h b/arch/arm/mach-h720x/include/mach/memory.h
index cb26f49cc4e1..ef4c1e26f18e 100644
--- a/arch/arm/mach-h720x/include/mach/memory.h
+++ b/arch/arm/mach-h720x/include/mach/memory.h
@@ -7,23 +7,13 @@
 #ifndef __ASM_ARCH_MEMORY_H
 #define __ASM_ARCH_MEMORY_H
 
-/*
- * Page offset:
- *    ( 0xc0000000UL )
- */
 #define PHYS_OFFSET     UL(0x40000000)
-
 /*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- *
- * There is something to do here later !, Mar 2000, Jungjun Kim
+ * This is the maximum DMA address that can be DMAd to.
+ * There should not be more than (0xd0000000 - 0xc0000000)
+ * bytes of RAM.
  */
-
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
+#define ISA_DMA_THRESHOLD       (PHYS_OFFSET + SZ_256M - 1)
+#define MAX_DMA_ADDRESS         (PAGE_OFFSET + SZ_256M)
 
 #endif
diff --git a/arch/arm/mach-imx/dma.c b/arch/arm/mach-imx/dma.c
index c10810c936b3..1536583eece0 100644
--- a/arch/arm/mach-imx/dma.c
+++ b/arch/arm/mach-imx/dma.c
@@ -28,10 +28,11 @@
 #include <linux/interrupt.h>
 #include <linux/errno.h>
 
+#include <asm/scatterlist.h>
 #include <asm/system.h>
 #include <asm/irq.h>
 #include <mach/hardware.h>
-#include <asm/dma.h>
+#include <mach/dma.h>
 #include <mach/imx-dma.h>
 
 struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS];
@@ -138,7 +139,7 @@ imx_dma_setup_sg_base(imx_dmach_t dma_ch,
 int
 imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address,
                      unsigned int dma_length, unsigned int dev_addr,
-                     dmamode_t dmamode)
+                     unsigned int dmamode)
 {
         struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch];
 
@@ -223,7 +224,7 @@ imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address,
 int
 imx_dma_setup_sg(imx_dmach_t dma_ch,
                  struct scatterlist *sg, unsigned int sgcount, unsigned int dma_length,
-                 unsigned int dev_addr, dmamode_t dmamode)
+                 unsigned int dev_addr, unsigned int dmamode)
 {
         int res;
         struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch];
diff --git a/arch/arm/mach-imx/include/mach/imx-dma.h b/arch/arm/mach-imx/include/mach/imx-dma.h
index 44d89c35539a..bbe54df7f0de 100644
--- a/arch/arm/mach-imx/include/mach/imx-dma.h
+++ b/arch/arm/mach-imx/include/mach/imx-dma.h
@@ -18,7 +18,7 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
-#include <asm/dma.h>
+#include <mach/dma.h>
 
 #ifndef __ASM_ARCH_IMX_DMA_H
 #define __ASM_ARCH_IMX_DMA_H
@@ -48,7 +48,7 @@ struct imx_dma_channel {
         void (*irq_handler) (int, void *);
         void (*err_handler) (int, void *, int errcode);
         void *data;
-        dmamode_t  dma_mode;
+        unsigned int  dma_mode;
         struct scatterlist *sg;
         unsigned int sgbc;
         unsigned int sgcount;
@@ -66,14 +66,18 @@ extern struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS];
 /* The type to distinguish channel numbers parameter from ordinal int type */
 typedef int imx_dmach_t;
 
+#define DMA_MODE_READ           0
+#define DMA_MODE_WRITE          1
+#define DMA_MODE_MASK           1
+
 int
 imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address,
-                unsigned int dma_length, unsigned int dev_addr, dmamode_t dmamode);
+                unsigned int dma_length, unsigned int dev_addr, unsigned int dmamode);
 
 int
 imx_dma_setup_sg(imx_dmach_t dma_ch,
                  struct scatterlist *sg, unsigned int sgcount, unsigned int dma_length,
-                 unsigned int dev_addr, dmamode_t dmamode);
+                 unsigned int dev_addr, unsigned int dmamode);
 
 int
 imx_dma_setup_handlers(imx_dmach_t dma_ch,
diff --git a/arch/arm/mach-imx/include/mach/io.h b/arch/arm/mach-imx/include/mach/io.h
index c50c5fa6fb81..9e197ae4590f 100644
--- a/arch/arm/mach-imx/include/mach/io.h
+++ b/arch/arm/mach-imx/include/mach/io.h
@@ -20,11 +20,9 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#include <mach/hardware.h>
-
 #define IO_SPACE_LIMIT 0xffffffff
 
-#define __io(a)         ((void __iomem *)(a))
+#define __io(a)         __typesafe_io(a)
 #define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-imx/include/mach/memory.h b/arch/arm/mach-imx/include/mach/memory.h
index 5c453063c0ed..a93df7cba694 100644
--- a/arch/arm/mach-imx/include/mach/memory.h
+++ b/arch/arm/mach-imx/include/mach/memory.h
@@ -23,14 +23,4 @@
 
 #define PHYS_OFFSET     UL(0x08000000)
 
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x)        (x - PAGE_OFFSET + PHYS_OFFSET)
-#define __bus_to_virt(x)        (x - PHYS_OFFSET + PAGE_OFFSET)
-
 #endif
diff --git a/arch/arm/mach-integrator/clock.c b/arch/arm/mach-integrator/clock.c
index 8d761fdd2ecd..989ecf5f5c46 100644
--- a/arch/arm/mach-integrator/clock.c
+++ b/arch/arm/mach-integrator/clock.c
@@ -10,42 +10,12 @@
  */
 #include <linux/module.h>
 #include <linux/kernel.h>
-#include <linux/list.h>
 #include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/string.h>
 #include <linux/clk.h>
 #include <linux/mutex.h>
 
-#include <asm/hardware/icst525.h>
-
-#include "clock.h"
-
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
-        struct clk *p, *clk = ERR_PTR(-ENOENT);
-
-        mutex_lock(&clocks_mutex);
-        list_for_each_entry(p, &clocks, node) {
-                if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
-                        clk = p;
-                        break;
-                }
-        }
-        mutex_unlock(&clocks_mutex);
-
-        return clk;
-}
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-        module_put(clk->owner);
-}
-EXPORT_SYMBOL(clk_put);
+#include <asm/clkdev.h>
+#include <mach/clkdev.h>
 
 int clk_enable(struct clk *clk)
 {
@@ -67,7 +37,6 @@ EXPORT_SYMBOL(clk_get_rate);
 long clk_round_rate(struct clk *clk, unsigned long rate)
 {
         struct icst525_vco vco;
-
         vco = icst525_khz_to_vco(clk->params, rate / 1000);
         return icst525_khz(clk->params, vco) * 1000;
 }
@@ -76,56 +45,15 @@ EXPORT_SYMBOL(clk_round_rate);
 int clk_set_rate(struct clk *clk, unsigned long rate)
 {
         int ret = -EIO;
+
         if (clk->setvco) {
                 struct icst525_vco vco;
 
                 vco = icst525_khz_to_vco(clk->params, rate / 1000);
                 clk->rate = icst525_khz(clk->params, vco) * 1000;
-
-                printk("Clock %s: setting VCO reg params: S=%d R=%d V=%d\n",
-                        clk->name, vco.s, vco.r, vco.v);
-
                 clk->setvco(clk, vco);
                 ret = 0;
         }
-        return 0;
+        return ret;
 }
 EXPORT_SYMBOL(clk_set_rate);
-
-/*
- * These are fixed clocks.
- */
-static struct clk kmi_clk = {
-        .name   = "KMIREFCLK",
-        .rate   = 24000000,
-};
-
-static struct clk uart_clk = {
-        .name   = "UARTCLK",
-        .rate   = 14745600,
-};
-
-int clk_register(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_add(&clk->node, &clocks);
-        mutex_unlock(&clocks_mutex);
-        return 0;
-}
-EXPORT_SYMBOL(clk_register);
-
-void clk_unregister(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_del(&clk->node);
-        mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL(clk_unregister);
-
-static int __init clk_init(void)
-{
-        clk_register(&kmi_clk);
-        clk_register(&uart_clk);
-        return 0;
-}
-arch_initcall(clk_init);
diff --git a/arch/arm/mach-integrator/clock.h b/arch/arm/mach-integrator/clock.h
index 09e6328ceba9..e69de29bb2d1 100644
--- a/arch/arm/mach-integrator/clock.h
+++ b/arch/arm/mach-integrator/clock.h
@@ -1,25 +0,0 @@
-/*
- *  linux/arch/arm/mach-integrator/clock.h
- *
- *  Copyright (C) 2004 ARM Limited.
- *  Written by Deep Blue Solutions Limited.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-struct module;
-struct icst525_params;
-
-struct clk {
-        struct list_head        node;
-        unsigned long           rate;
-        struct module           *owner;
-        const char              *name;
-        const struct icst525_params *params;
-        void                    *data;
-        void                    (*setvco)(struct clk *, struct icst525_vco vco);
-};
-
-int clk_register(struct clk *clk);
-void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 595b7392ee4e..c89c949b4d45 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -21,6 +21,8 @@
 #include <linux/amba/serial.h>
 #include <linux/io.h>
 
+#include <asm/clkdev.h>
+#include <mach/clkdev.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/hardware/arm_timer.h>
@@ -108,10 +110,43 @@ static struct amba_device *amba_devs[] __initdata = {
         &kmi1_device,
 };
 
+/*
+ * These are fixed clocks.
+ */
+static struct clk clk24mhz = {
+        .rate   = 24000000,
+};
+
+static struct clk uartclk = {
+        .rate   = 14745600,
+};
+
+static struct clk_lookup lookups[] __initdata = {
+        {       /* UART0 */
+                .dev_id         = "mb:16",
+                .clk            = &uartclk,
+        }, {    /* UART1 */
+                .dev_id         = "mb:17",
+                .clk            = &uartclk,
+        }, {    /* KMI0 */
+                .dev_id         = "mb:18",
+                .clk            = &clk24mhz,
+        }, {    /* KMI1 */
+                .dev_id         = "mb:19",
+                .clk            = &clk24mhz,
+        }, {    /* MMCI - IntegratorCP */
+                .dev_id         = "mb:1c",
+                .clk            = &uartclk,
+        }
+};
+
 static int __init integrator_init(void)
 {
         int i;
 
+        for (i = 0; i < ARRAY_SIZE(lookups); i++)
+                clkdev_add(&lookups[i]);
+
         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
                 struct amba_device *d = amba_devs[i];
                 amba_device_register(d, &iomem_resource);
diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c
index 172299a78302..0058c937719e 100644
--- a/arch/arm/mach-integrator/impd1.c
+++ b/arch/arm/mach-integrator/impd1.c
@@ -22,13 +22,13 @@
 #include <linux/amba/clcd.h>
 #include <linux/io.h>
 
+#include <asm/clkdev.h>
+#include <mach/clkdev.h>
 #include <asm/hardware/icst525.h>
 #include <mach/lm.h>
 #include <mach/impd1.h>
 #include <asm/sizes.h>
 
-#include "clock.h"
-
 static int module_id;
 
 module_param_named(lmid, module_id, int, 0444);
@@ -37,6 +37,7 @@ MODULE_PARM_DESC(lmid, "logic module stack position");
 struct impd1_module {
         void __iomem    *base;
         struct clk      vcos[2];
+        struct clk_lookup *clks[3];
 };
 
 static const struct icst525_params impd1_vco_params = {
@@ -339,9 +340,8 @@ static struct impd1_device impd1_devs[] = {
         }
 };
 
-static const char *impd1_vconames[2] = {
-        "CLCDCLK",
-        "AUXVCO2",
+static struct clk fixed_14745600 = {
+        .rate = 14745600,
 };
 
 static int impd1_probe(struct lm_device *dev)
@@ -374,14 +374,20 @@ static int impd1_probe(struct lm_device *dev)
 
         for (i = 0; i < ARRAY_SIZE(impd1->vcos); i++) {
                 impd1->vcos[i].owner = THIS_MODULE,
-                impd1->vcos[i].name = impd1_vconames[i],
                 impd1->vcos[i].params = &impd1_vco_params,
                 impd1->vcos[i].data = impd1,
                 impd1->vcos[i].setvco = impd1_setvco;
-
-                clk_register(&impd1->vcos[i]);
         }
 
+        impd1->clks[0] = clkdev_alloc(&impd1->vcos[0], NULL, "lm%x:01000",
+                                        dev->id);
+        impd1->clks[1] = clkdev_alloc(&fixed_14745600, NULL, "lm%x:00100",
+                                        dev->id);
+        impd1->clks[2] = clkdev_alloc(&fixed_14745600, NULL, "lm%x:00200",
+                                        dev->id);
+        for (i = 0; i < ARRAY_SIZE(impd1->clks); i++)
+                clkdev_add(impd1->clks[i]);
+
         for (i = 0; i < ARRAY_SIZE(impd1_devs); i++) {
                 struct impd1_device *idev = impd1_devs + i;
                 struct amba_device *d;
@@ -434,8 +440,8 @@ static void impd1_remove(struct lm_device *dev)
 
         device_for_each_child(&dev->dev, NULL, impd1_remove_one);
 
-        for (i = 0; i < ARRAY_SIZE(impd1->vcos); i++)
-                clk_unregister(&impd1->vcos[i]);
+        for (i = 0; i < ARRAY_SIZE(impd1->clks); i++)
+                clkdev_drop(impd1->clks[i]);
 
         lm_set_drvdata(dev, NULL);
 
diff --git a/arch/arm/mach-integrator/include/mach/clkdev.h b/arch/arm/mach-integrator/include/mach/clkdev.h
new file mode 100644
index 000000000000..9293e410832a
--- /dev/null
+++ b/arch/arm/mach-integrator/include/mach/clkdev.h
@@ -0,0 +1,25 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+#include <linux/module.h>
+#include <asm/hardware/icst525.h>
+
+struct clk {
+        unsigned long           rate;
+        struct module           *owner;
+        const struct icst525_params *params;
+        void                    *data;
+        void                    (*setvco)(struct clk *, struct icst525_vco vco);
+};
+
+static inline int __clk_get(struct clk *clk)
+{
+        return try_module_get(clk->owner);
+}
+
+static inline void __clk_put(struct clk *clk)
+{
+        module_put(clk->owner);
+}
+
+#endif
diff --git a/arch/arm/mach-integrator/include/mach/dma.h b/arch/arm/mach-integrator/include/mach/dma.h
deleted file mode 100644
index fbebe85a2db7..000000000000
--- a/arch/arm/mach-integrator/include/mach/dma.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- *  arch/arm/mach-integrator/include/mach/dma.h
- *
- *  Copyright (C) 1997,1998 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
diff --git a/arch/arm/mach-integrator/include/mach/memory.h b/arch/arm/mach-integrator/include/mach/memory.h
index be7e63c21d25..2b2e7a110724 100644
--- a/arch/arm/mach-integrator/include/mach/memory.h
+++ b/arch/arm/mach-integrator/include/mach/memory.h
@@ -24,16 +24,9 @@
  * Physical DRAM offset.
  */
 #define PHYS_OFFSET     UL(0x00000000)
-#define BUS_OFFSET      UL(0x80000000)
 
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x)        (x - PAGE_OFFSET + BUS_OFFSET)
-#define __bus_to_virt(x)        (x - BUS_OFFSET + PAGE_OFFSET)
+#define BUS_OFFSET      UL(0x80000000)
+#define __virt_to_bus(x)        ((x) - PAGE_OFFSET + BUS_OFFSET)
+#define __bus_to_virt(x)        ((x) - BUS_OFFSET + PAGE_OFFSET)
 
 #endif
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 88026ccd5ac9..427c2d8dc123 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -21,6 +21,8 @@
 #include <linux/amba/clcd.h>
 #include <linux/io.h>
 
+#include <asm/clkdev.h>
+#include <mach/clkdev.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/setup.h>
@@ -38,7 +40,6 @@
 #include <asm/mach/time.h>
 
 #include "common.h"
-#include "clock.h"
 
 #define INTCP_PA_MMC_BASE               0x1c000000
 #define INTCP_PA_AACI_BASE              0x1d000000
@@ -289,15 +290,16 @@ static void cp_auxvco_set(struct clk *clk, struct icst525_vco vco)
         writel(0, CM_LOCK);
 }
 
-static struct clk cp_clcd_clk = {
-        .name   = "CLCDCLK",
+static struct clk cp_auxclk = {
         .params = &cp_auxvco_params,
         .setvco = cp_auxvco_set,
 };
 
-static struct clk cp_mmci_clk = {
-        .name   = "MCLK",
-        .rate   = 14745600,
+static struct clk_lookup cp_lookups[] = {
+        {       /* CLCD */
+                .dev_id         = "mb:c0",
+                .clk            = &cp_auxclk,
+        },
 };
 
 /*
@@ -554,8 +556,8 @@ static void __init intcp_init(void)
 {
         int i;
 
-        clk_register(&cp_clcd_clk);
-        clk_register(&cp_mmci_clk);
+        for (i = 0; i < ARRAY_SIZE(cp_lookups); i++)
+                clkdev_add(&cp_lookups[i]);
 
         platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs));
 
diff --git a/arch/arm/mach-iop13xx/include/mach/dma.h b/arch/arm/mach-iop13xx/include/mach/dma.h
deleted file mode 100644
index d79846fbb394..000000000000
--- a/arch/arm/mach-iop13xx/include/mach/dma.h
+++ /dev/null
@@ -1,3 +0,0 @@
-#ifndef _IOP13XX_DMA_H
-#define _IOP13XX_DMA_H
-#endif
diff --git a/arch/arm/mach-iop13xx/include/mach/memory.h b/arch/arm/mach-iop13xx/include/mach/memory.h
index b82602d529bf..e012bf13c955 100644
--- a/arch/arm/mach-iop13xx/include/mach/memory.h
+++ b/arch/arm/mach-iop13xx/include/mach/memory.h
@@ -16,18 +16,6 @@
 #define IOP13XX_PMMR_P_START (IOP13XX_PMMR_PHYS_MEM_BASE)
 #define IOP13XX_PMMR_P_END   (IOP13XX_PMMR_PHYS_MEM_BASE + IOP13XX_PMMR_SIZE)
 
-/*
- * Virtual view <-> PCI DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-
-/* RAM has 1:1 mapping on the PCIe/x Busses */
-#define __virt_to_bus(x)        (__virt_to_phys(x))
-#define __bus_to_virt(x)        (__phys_to_virt(x))
-
 static inline dma_addr_t __virt_to_lbus(unsigned long x)
 {
         return x + IOP13XX_PMMR_PHYS_MEM_BASE - IOP13XX_PMMR_VIRT_MEM_BASE;
@@ -55,7 +43,7 @@ static inline unsigned long __lbus_to_virt(dma_addr_t x)
                 if (is_lbus_device(dev) && __is_lbus_dma(__dma))        \
                         __virt = __lbus_to_virt(__dma);                 \
                 else                                                    \
-                        __virt = __bus_to_virt(__dma);                  \
+                        __virt = __phys_to_virt(__dma);                 \
                 (void *)__virt;                                         \
         })
 
@@ -66,7 +54,7 @@ static inline unsigned long __lbus_to_virt(dma_addr_t x)
                 if (is_lbus_device(dev) && __is_lbus_virt(__virt))      \
                         __dma = __virt_to_lbus(__virt);                 \
                 else                                                    \
-                        __dma = __virt_to_bus(__virt);                  \
+                        __dma = __virt_to_phys(__virt);                 \
                 __dma;                                                  \
         })
 
diff --git a/arch/arm/mach-iop13xx/include/mach/timex.h b/arch/arm/mach-iop13xx/include/mach/timex.h
index 5b1f1c8a8270..45fb2745bb54 100644
--- a/arch/arm/mach-iop13xx/include/mach/timex.h
+++ b/arch/arm/mach-iop13xx/include/mach/timex.h
@@ -1,3 +1 @@
-#include <mach/hardware.h>
-
 #define CLOCK_TICK_RATE (100 * HZ)
diff --git a/arch/arm/mach-iop32x/include/mach/dma.h b/arch/arm/mach-iop32x/include/mach/dma.h
deleted file mode 100644
index f8bd817f205d..000000000000
--- a/arch/arm/mach-iop32x/include/mach/dma.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/*
- * arch/arm/mach-iop32x/include/mach/dma.h
- *
- * Copyright (C) 2004 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
diff --git a/arch/arm/mach-iop32x/include/mach/io.h b/arch/arm/mach-iop32x/include/mach/io.h
index ce54705ba3d4..339e5854728b 100644
--- a/arch/arm/mach-iop32x/include/mach/io.h
+++ b/arch/arm/mach-iop32x/include/mach/io.h
@@ -11,7 +11,7 @@
 #ifndef __IO_H
 #define __IO_H
 
-#include <mach/hardware.h>
+#include <asm/hardware/iop3xx.h>
 
 extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
         unsigned int mtype);
diff --git a/arch/arm/mach-iop32x/include/mach/memory.h b/arch/arm/mach-iop32x/include/mach/memory.h
index 42cd4bf3148c..c30f6450ad50 100644
--- a/arch/arm/mach-iop32x/include/mach/memory.h
+++ b/arch/arm/mach-iop32x/include/mach/memory.h
@@ -5,22 +5,9 @@
 #ifndef __MEMORY_H
 #define __MEMORY_H
 
-#include <mach/hardware.h>
-
 /*
  * Physical DRAM offset.
  */
 #define PHYS_OFFSET     UL(0xa0000000)
 
-/*
- * Virtual view <-> PCI DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x)        (__virt_to_phys(x))
-#define __bus_to_virt(x)        (__phys_to_virt(x))
-
-
 #endif
diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h
index 20f923e54f46..32d9e5b0a28d 100644
--- a/arch/arm/mach-iop32x/include/mach/system.h
+++ b/arch/arm/mach-iop32x/include/mach/system.h
@@ -7,8 +7,9 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-
 #include <asm/mach-types.h>
+#include <asm/hardware/iop3xx.h>
+#include <mach/n2100.h>
 
 static inline void arch_idle(void)
 {
diff --git a/arch/arm/mach-iop32x/include/mach/timex.h b/arch/arm/mach-iop32x/include/mach/timex.h
index a541afced3cb..7262ab81419d 100644
--- a/arch/arm/mach-iop32x/include/mach/timex.h
+++ b/arch/arm/mach-iop32x/include/mach/timex.h
@@ -3,7 +3,4 @@
  *
  * IOP32x architecture timex specifications
  */
-
-#include <mach/hardware.h>
-
 #define CLOCK_TICK_RATE         (100 * HZ)
diff --git a/arch/arm/mach-iop33x/include/mach/dma.h b/arch/arm/mach-iop33x/include/mach/dma.h
deleted file mode 100644
index d8b42232931d..000000000000
--- a/arch/arm/mach-iop33x/include/mach/dma.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/*
- * arch/arm/mach-iop33x/include/mach/dma.h
- *
- * Copyright (C) 2004 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
diff --git a/arch/arm/mach-iop33x/include/mach/io.h b/arch/arm/mach-iop33x/include/mach/io.h
index 158874631217..e99a7ed6d050 100644
--- a/arch/arm/mach-iop33x/include/mach/io.h
+++ b/arch/arm/mach-iop33x/include/mach/io.h
@@ -11,7 +11,7 @@
 #ifndef __IO_H
 #define __IO_H
 
-#include <mach/hardware.h>
+#include <asm/hardware/iop3xx.h>
 
 extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size,
         unsigned int mtype);
diff --git a/arch/arm/mach-iop33x/include/mach/memory.h b/arch/arm/mach-iop33x/include/mach/memory.h
index 2cef0bbb354f..a30a96aa6d2d 100644
--- a/arch/arm/mach-iop33x/include/mach/memory.h
+++ b/arch/arm/mach-iop33x/include/mach/memory.h
@@ -5,22 +5,9 @@
 #ifndef __MEMORY_H
 #define __MEMORY_H
 
-#include <mach/hardware.h>
-
 /*
  * Physical DRAM offset.
  */
 #define PHYS_OFFSET     UL(0x00000000)
 
-/*
- * Virtual view <-> PCI DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x)        (__virt_to_phys(x))
-#define __bus_to_virt(x)        (__phys_to_virt(x))
-
-
 #endif
diff --git a/arch/arm/mach-iop33x/include/mach/system.h b/arch/arm/mach-iop33x/include/mach/system.h
index 7bf3bfb49446..0cb3ad862acd 100644
--- a/arch/arm/mach-iop33x/include/mach/system.h
+++ b/arch/arm/mach-iop33x/include/mach/system.h
@@ -7,6 +7,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+#include <asm/hardware/iop3xx.h>
 
 static inline void arch_idle(void)
 {
diff --git a/arch/arm/mach-iop33x/include/mach/timex.h b/arch/arm/mach-iop33x/include/mach/timex.h
index c75760844d49..54c589091d6e 100644
--- a/arch/arm/mach-iop33x/include/mach/timex.h
+++ b/arch/arm/mach-iop33x/include/mach/timex.h
@@ -3,7 +3,4 @@
  *
  * IOP3xx architecture timex specifications
  */
-
-#include <mach/hardware.h>
-
 #define CLOCK_TICK_RATE         (100 * HZ)
diff --git a/arch/arm/mach-ixp2000/include/mach/dma.h b/arch/arm/mach-ixp2000/include/mach/dma.h
deleted file mode 100644
index 26063d60f622..000000000000
--- a/arch/arm/mach-ixp2000/include/mach/dma.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/*
- * arch/arm/mach-ixp2000/include/mach/dma.h
- *
- * Copyright (C) 2002 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
diff --git a/arch/arm/mach-ixp2000/include/mach/memory.h b/arch/arm/mach-ixp2000/include/mach/memory.h
index 241529a7c52d..aee7eb8a71b2 100644
--- a/arch/arm/mach-ixp2000/include/mach/memory.h
+++ b/arch/arm/mach-ixp2000/include/mach/memory.h
@@ -15,13 +15,6 @@
 
 #define PHYS_OFFSET     UL(0x00000000)
 
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
 #include <mach/ixp2000-regs.h>
 
 #define __virt_to_bus(v) \
diff --git a/arch/arm/mach-ixp23xx/include/mach/dma.h b/arch/arm/mach-ixp23xx/include/mach/dma.h
deleted file mode 100644
index 8886544b93f7..000000000000
--- a/arch/arm/mach-ixp23xx/include/mach/dma.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/*
- * arch/arm/mach-ixp23xx/include/mach/dma.h
- */
diff --git a/arch/arm/mach-ixp23xx/include/mach/io.h b/arch/arm/mach-ixp23xx/include/mach/io.h
index 305ea1808c71..fd9ef8e519f7 100644
--- a/arch/arm/mach-ixp23xx/include/mach/io.h
+++ b/arch/arm/mach-ixp23xx/include/mach/io.h
@@ -20,8 +20,6 @@
 #define __io(p)         ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT))
 #define __mem_pci(a)    (a)
 
-#include <linux/kernel.h>       /* For BUG */
-
 static inline void __iomem *
 ixp23xx_ioremap(unsigned long addr, unsigned long size, unsigned int mtype)
 {
diff --git a/arch/arm/mach-ixp23xx/include/mach/memory.h b/arch/arm/mach-ixp23xx/include/mach/memory.h
index 9d40115f7ebe..fdd138706c70 100644
--- a/arch/arm/mach-ixp23xx/include/mach/memory.h
+++ b/arch/arm/mach-ixp23xx/include/mach/memory.h
@@ -19,16 +19,6 @@
  */
 #define PHYS_OFFSET             (0x00000000)
 
-
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#ifndef __ASSEMBLY__
-
 #define __virt_to_bus(v)                                                \
         ({ unsigned int ret;                                            \
         ret = ((__virt_to_phys(v) - 0x00000000) +                       \
@@ -43,6 +33,3 @@
 #define arch_is_coherent()      1
 
 #endif
-
-
-#endif
diff --git a/arch/arm/mach-ixp4xx/include/mach/dma.h b/arch/arm/mach-ixp4xx/include/mach/dma.h
deleted file mode 100644
index 00c5070c0201..000000000000
--- a/arch/arm/mach-ixp4xx/include/mach/dma.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * arch/arm/mach-ixp4xx/include/mach/dma.h
- *
- * Copyright (C) 2001-2004 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-#include <linux/device.h>
-#include <asm/page.h>
-#include <asm/sizes.h>
-#include <mach/hardware.h>
-
-#define MAX_DMA_ADDRESS         (PAGE_OFFSET + SZ_64M)
-
-#endif /* _ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h
index 319948e31bec..ce63048d45eb 100644
--- a/arch/arm/mach-ixp4xx/include/mach/io.h
+++ b/arch/arm/mach-ixp4xx/include/mach/io.h
@@ -49,8 +49,6 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
 
 #else
 
-#include <linux/mm.h>
-
 /*
  * In the case of using indirect PCI, we simply return the actual PCI
  * address and our read/write implementation use that to drive the 
@@ -241,7 +239,7 @@ __ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count)
 
 #ifndef CONFIG_PCI
 
-#define __io(v)         v
+#define __io(v)         __typesafe_io(v)
 
 #else
 
diff --git a/arch/arm/mach-ixp4xx/include/mach/memory.h b/arch/arm/mach-ixp4xx/include/mach/memory.h
index c4d2830ac987..98f5e5e20980 100644
--- a/arch/arm/mach-ixp4xx/include/mach/memory.h
+++ b/arch/arm/mach-ixp4xx/include/mach/memory.h
@@ -22,19 +22,8 @@ void ixp4xx_adjust_zones(int node, unsigned long *size, unsigned long *holes);
         ixp4xx_adjust_zones(node, size, holes)
 
 #define ISA_DMA_THRESHOLD (SZ_64M - 1)
+#define MAX_DMA_ADDRESS         (PAGE_OFFSET + SZ_64M)
 
 #endif
 
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- *
- * These are dummies for now.
- */
-#define __virt_to_bus(x)         __virt_to_phys(x)
-#define __bus_to_virt(x)         __phys_to_virt(x)
-
 #endif
diff --git a/arch/arm/mach-kirkwood/include/mach/dma.h b/arch/arm/mach-kirkwood/include/mach/dma.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/arm/mach-kirkwood/include/mach/dma.h
+++ /dev/null
@@ -1 +0,0 @@
-/* empty */
diff --git a/arch/arm/mach-kirkwood/include/mach/memory.h b/arch/arm/mach-kirkwood/include/mach/memory.h
index b5fb34bdccd5..45431e131465 100644
--- a/arch/arm/mach-kirkwood/include/mach/memory.h
+++ b/arch/arm/mach-kirkwood/include/mach/memory.h
@@ -7,8 +7,4 @@
 
 #define PHYS_OFFSET             UL(0x00000000)
 
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
-
 #endif
diff --git a/arch/arm/mach-ks8695/include/mach/dma.h b/arch/arm/mach-ks8695/include/mach/dma.h
deleted file mode 100644
index 561206280089..000000000000
--- a/arch/arm/mach-ks8695/include/mach/dma.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * arch/arm/mach-ks8695/include/mach/dma.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
diff --git a/arch/arm/mach-ks8695/include/mach/io.h b/arch/arm/mach-ks8695/include/mach/io.h
index f364f24ffe1e..a7a63ac3ba4e 100644
--- a/arch/arm/mach-ks8695/include/mach/io.h
+++ b/arch/arm/mach-ks8695/include/mach/io.h
@@ -13,7 +13,7 @@
 
 #define IO_SPACE_LIMIT          0xffffffff
 
-#define __io(a)                 ((void __iomem *)(a))
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-ks8695/include/mach/memory.h b/arch/arm/mach-ks8695/include/mach/memory.h
index 8fbc4c76c38b..6d5887cf5742 100644
--- a/arch/arm/mach-ks8695/include/mach/memory.h
+++ b/arch/arm/mach-ks8695/include/mach/memory.h
@@ -37,11 +37,6 @@ extern struct bus_type platform_bus_type;
                                         (dma_addr_t)__virt_to_phys(x) : (dma_addr_t)__virt_to_bus(x); })
 #define __arch_page_to_dma(dev, x)      __arch_virt_to_dma(dev, page_address(x))
 
-#else
-
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
 #endif
 
 #endif
diff --git a/arch/arm/mach-l7200/include/mach/dma.h b/arch/arm/mach-l7200/include/mach/dma.h
deleted file mode 100644
index c7e48bd4590c..000000000000
--- a/arch/arm/mach-l7200/include/mach/dma.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * arch/arm/mach-l7200/include/mach/dma.h
- *
- * Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
- *
- * Changelog:
- *  08-29-2000  SJH     Created
- */
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-/* DMA is not yet implemented! It should be the same as acorn, copy over.. */
-
-/*
- * This is the maximum DMA address that can be DMAd to.
- * There should not be more than (0xd0000000 - 0xc0000000)
- * bytes of RAM.
- */
-#define MAX_DMA_ADDRESS         0xd0000000
-
-#define DMA_S0                  0
-
-#endif /* _ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-l7200/include/mach/io.h b/arch/arm/mach-l7200/include/mach/io.h
index d432ba9e5dff..a770a89fb708 100644
--- a/arch/arm/mach-l7200/include/mach/io.h
+++ b/arch/arm/mach-l7200/include/mach/io.h
@@ -10,18 +10,12 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#include <mach/hardware.h>
-
 #define IO_SPACE_LIMIT 0xffffffff
 
 /*
  * There are not real ISA nor PCI buses, so we fake it.
  */
-static inline void __iomem *__io(unsigned long addr)
-{
-        return (void __iomem *)addr;
-}
-#define __io(a) __io(a)
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-l7200/include/mach/memory.h b/arch/arm/mach-l7200/include/mach/memory.h
index f338cf3ffd93..9fb40ed2f03b 100644
--- a/arch/arm/mach-l7200/include/mach/memory.h
+++ b/arch/arm/mach-l7200/include/mach/memory.h
@@ -17,9 +17,6 @@
  */
 #define PHYS_OFFSET     UL(0xf0000000)
 
-#define __virt_to_bus(x) __virt_to_phys(x)
-#define __bus_to_virt(x) __phys_to_virt(x)
-
 /*
  * Cache flushing area - ROM
  */
diff --git a/arch/arm/mach-lh7a40x/clocks.c b/arch/arm/mach-lh7a40x/clocks.c
index 4fb23ac6b5ac..6182f5410b4d 100644
--- a/arch/arm/mach-lh7a40x/clocks.c
+++ b/arch/arm/mach-lh7a40x/clocks.c
@@ -14,21 +14,14 @@
 #include <linux/err.h>
 
 struct module;
-struct icst525_params;
 
 struct clk {
         struct list_head node;
         unsigned long rate;
         struct module *owner;
         const char *name;
-//      void *data;
-//      const struct icst525_params *params;
-//      void (*setvco)(struct clk *, struct icst525_vco vco);
 };
 
-int clk_register(struct clk *clk);
-void clk_unregister(struct clk *clk);
-
 /* ----- */
 
 #define MAINDIV1(c)     (((c) >>  7) & 0x0f)
@@ -79,31 +72,15 @@ unsigned int pclkfreq_get (void)
 
 /* ----- */
 
-static LIST_HEAD(clocks);
-static DECLARE_MUTEX(clocks_sem);
-
 struct clk *clk_get (struct device *dev, const char *id)
 {
-        struct clk *p;
-        struct clk *clk = ERR_PTR(-ENOENT);
-
-        down (&clocks_sem);
-        list_for_each_entry (p, &clocks, node) {
-                if (strcmp (id, p->name) == 0
-                    && try_module_get(p->owner)) {
-                        clk = p;
-                        break;
-                }
-        }
-        up (&clocks_sem);
-
-        return clk;
+        return dev && strcmp(dev_name(dev), "cldc-lh7a40x") == 0
+                 ? NULL : ERR_PTR(-ENOENT);
 }
 EXPORT_SYMBOL(clk_get);
 
 void clk_put (struct clk *clk)
 {
-        module_put(clk->owner);
 }
 EXPORT_SYMBOL(clk_put);
 
@@ -118,20 +95,9 @@ void clk_disable (struct clk *clk)
 }
 EXPORT_SYMBOL(clk_disable);
 
-int clk_use (struct clk *clk)
-{
-        return 0;
-}
-EXPORT_SYMBOL(clk_use);
-
-void clk_unuse (struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_unuse);
-
 unsigned long clk_get_rate (struct clk *clk)
 {
-        return clk->rate;
+        return 0;
 }
 EXPORT_SYMBOL(clk_get_rate);
 
@@ -143,56 +109,6 @@ EXPORT_SYMBOL(clk_round_rate);
 
 int clk_set_rate (struct clk *clk, unsigned long rate)
 {
-        int ret = -EIO;
-        return ret;
+        return -EIO;
 }
 EXPORT_SYMBOL(clk_set_rate);
-
-#if 0
-/*
- * These are fixed clocks.
- */
-static struct clk kmi_clk = {
-        .name   = "KMIREFCLK",
-        .rate   = 24000000,
-};
-
-static struct clk uart_clk = {
-        .name   = "UARTCLK",
-        .rate   = 24000000,
-};
-
-static struct clk mmci_clk = {
-        .name   = "MCLK",
-        .rate   = 33000000,
-};
-#endif
-
-static struct clk clcd_clk = {
-        .name   = "CLCDCLK",
-        .rate   = 0,
-};
-
-int clk_register (struct clk *clk)
-{
-        down (&clocks_sem);
-        list_add (&clk->node, &clocks);
-        up (&clocks_sem);
-        return 0;
-}
-EXPORT_SYMBOL(clk_register);
-
-void clk_unregister (struct clk *clk)
-{
-        down (&clocks_sem);
-        list_del (&clk->node);
-        up (&clocks_sem);
-}
-EXPORT_SYMBOL(clk_unregister);
-
-static int __init clk_init (void)
-{
-        clk_register(&clcd_clk);
-        return 0;
-}
-arch_initcall(clk_init);
diff --git a/arch/arm/mach-lh7a40x/include/mach/io.h b/arch/arm/mach-lh7a40x/include/mach/io.h
index 031d26f9163c..6ece45911cbc 100644
--- a/arch/arm/mach-lh7a40x/include/mach/io.h
+++ b/arch/arm/mach-lh7a40x/include/mach/io.h
@@ -11,12 +11,10 @@
 #ifndef __ASM_ARCH_IO_H
 #define __ASM_ARCH_IO_H
 
-#include <mach/hardware.h>
-
 #define IO_SPACE_LIMIT 0xffffffff
 
 /* No ISA or PCI bus on this machine. */
-#define __io(a)                 ((void __iomem *)(a))
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 #endif /* __ASM_ARCH_IO_H */
diff --git a/arch/arm/mach-lh7a40x/include/mach/memory.h b/arch/arm/mach-lh7a40x/include/mach/memory.h
index 1da14ff66c93..189d20e543e7 100644
--- a/arch/arm/mach-lh7a40x/include/mach/memory.h
+++ b/arch/arm/mach-lh7a40x/include/mach/memory.h
@@ -19,16 +19,6 @@
  */
 #define PHYS_OFFSET     UL(0xc0000000)
 
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x)         __virt_to_phys(x)
-#define __bus_to_virt(x)         __phys_to_virt(x)
-
 #ifdef CONFIG_DISCONTIGMEM
 
 /*
diff --git a/arch/arm/mach-loki/include/mach/dma.h b/arch/arm/mach-loki/include/mach/dma.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/arm/mach-loki/include/mach/dma.h
+++ /dev/null
@@ -1 +0,0 @@
-/* empty */
diff --git a/arch/arm/mach-loki/include/mach/memory.h b/arch/arm/mach-loki/include/mach/memory.h
index a39533ab489d..2ed7e6e732c2 100644
--- a/arch/arm/mach-loki/include/mach/memory.h
+++ b/arch/arm/mach-loki/include/mach/memory.h
@@ -7,8 +7,4 @@
 
 #define PHYS_OFFSET             UL(0x00000000)
 
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
-
 #endif
diff --git a/arch/arm/mach-msm/include/mach/io.h b/arch/arm/mach-msm/include/mach/io.h
index c6a2feb268b0..aab964591db4 100644
--- a/arch/arm/mach-msm/include/mach/io.h
+++ b/arch/arm/mach-msm/include/mach/io.h
@@ -23,11 +23,7 @@
 
 void __iomem *__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype);
 
-static inline void __iomem *__io(unsigned long addr)
-{
-        return (void __iomem *)addr;
-}
-#define __io(a)         __io(a)
+#define __io(a)         __typesafe_io(a)
 #define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-msm/include/mach/memory.h b/arch/arm/mach-msm/include/mach/memory.h
index 63fd47f2e62e..f4698baec976 100644
--- a/arch/arm/mach-msm/include/mach/memory.h
+++ b/arch/arm/mach-msm/include/mach/memory.h
@@ -19,9 +19,5 @@
 /* physical offset of RAM */
 #define PHYS_OFFSET             UL(0x10000000)
 
-/* bus address and physical addresses are identical */
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
 #endif
 
diff --git a/arch/arm/mach-mv78xx0/include/mach/dma.h b/arch/arm/mach-mv78xx0/include/mach/dma.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/arm/mach-mv78xx0/include/mach/dma.h
+++ /dev/null
@@ -1 +0,0 @@
-/* empty */
diff --git a/arch/arm/mach-mv78xx0/include/mach/memory.h b/arch/arm/mach-mv78xx0/include/mach/memory.h
index 9e47a140ff7a..e663042d307f 100644
--- a/arch/arm/mach-mv78xx0/include/mach/memory.h
+++ b/arch/arm/mach-mv78xx0/include/mach/memory.h
@@ -7,8 +7,4 @@
 
 #define PHYS_OFFSET             UL(0x00000000)
 
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
-
 #endif
diff --git a/arch/arm/mach-netx/fb.c b/arch/arm/mach-netx/fb.c
index 24c79650f9f3..8f1f992f002e 100644
--- a/arch/arm/mach-netx/fb.c
+++ b/arch/arm/mach-netx/fb.c
@@ -22,14 +22,11 @@
 #include <linux/dma-mapping.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/clcd.h>
+#include <linux/err.h>
 
 #include <mach/netx-regs.h>
 #include <mach/hardware.h>
 
-struct clk {};
-
-static struct clk fb_clk;
-
 static struct clcd_panel *netx_panel;
 
 void netx_clcd_enable(struct clcd_fb *fb)
@@ -85,7 +82,7 @@ int clk_enable(struct clk *clk)
 
 struct clk *clk_get(struct device *dev, const char *id)
 {
-        return &fb_clk;
+        return dev && strcmp(dev_name(dev), "fb") == 0 ? NULL : ERR_PTR(-ENOENT);
 }
 
 void clk_put(struct clk *clk)
diff --git a/arch/arm/mach-netx/include/mach/dma.h b/arch/arm/mach-netx/include/mach/dma.h
deleted file mode 100644
index 690b3ebc43ac..000000000000
--- a/arch/arm/mach-netx/include/mach/dma.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- *  arch/arm/mach-netx/include/mach/dma.h
- *
- * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#define MAX_DMA_CHANNELS 0
-#define MAX_DMA_ADDRESS ~0
diff --git a/arch/arm/mach-netx/include/mach/io.h b/arch/arm/mach-netx/include/mach/io.h
index 468b92a82585..c3921cb3b6a6 100644
--- a/arch/arm/mach-netx/include/mach/io.h
+++ b/arch/arm/mach-netx/include/mach/io.h
@@ -22,7 +22,7 @@
 
 #define IO_SPACE_LIMIT 0xffffffff
 
-#define __io(a)         ((void __iomem *)(a))
+#define __io(a)         __typesafe_io(a)
 #define __mem_pci(a)            (a)
 
 #endif
diff --git a/arch/arm/mach-netx/include/mach/memory.h b/arch/arm/mach-netx/include/mach/memory.h
index 53745a1378de..9a363f297f90 100644
--- a/arch/arm/mach-netx/include/mach/memory.h
+++ b/arch/arm/mach-netx/include/mach/memory.h
@@ -22,15 +22,5 @@
 
 #define PHYS_OFFSET UL(0x80000000)
 
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x)         __virt_to_phys(x)
-#define __bus_to_virt(x)         __phys_to_virt(x)
-
 #endif
 
diff --git a/arch/arm/mach-ns9xxx/include/mach/dma.h b/arch/arm/mach-ns9xxx/include/mach/dma.h
deleted file mode 100644
index 3f50d8c9e5c7..000000000000
--- a/arch/arm/mach-ns9xxx/include/mach/dma.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * arch/arm/mach-ns9xxx/include/mach/dma.h
- *
- * Copyright (C) 2006 by Digi International Inc.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-#endif /* ifndef __ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-ns9xxx/include/mach/hardware.h b/arch/arm/mach-ns9xxx/include/mach/hardware.h
index 6dbb2030f563..76631128e11c 100644
--- a/arch/arm/mach-ns9xxx/include/mach/hardware.h
+++ b/arch/arm/mach-ns9xxx/include/mach/hardware.h
@@ -11,8 +11,6 @@
 #ifndef __ASM_ARCH_HARDWARE_H
 #define __ASM_ARCH_HARDWARE_H
 
-#include <asm/memory.h>
-
 /*
  * NetSilicon NS9xxx internal mapping:
  *
diff --git a/arch/arm/mach-ns9xxx/include/mach/io.h b/arch/arm/mach-ns9xxx/include/mach/io.h
index 027bf649645a..f08451d2e1bc 100644
--- a/arch/arm/mach-ns9xxx/include/mach/io.h
+++ b/arch/arm/mach-ns9xxx/include/mach/io.h
@@ -13,7 +13,7 @@
 
 #define IO_SPACE_LIMIT  0xffffffff /* XXX */
 
-#define __io(a)         ((void __iomem *)(a))
+#define __io(a)         __typesafe_io(a)
 #define __mem_pci(a)    (a)
 #define __mem_isa(a)    (IO_BASE + (a))
 
diff --git a/arch/arm/mach-ns9xxx/include/mach/memory.h b/arch/arm/mach-ns9xxx/include/mach/memory.h
index 649ee6235b94..6107193adbfe 100644
--- a/arch/arm/mach-ns9xxx/include/mach/memory.h
+++ b/arch/arm/mach-ns9xxx/include/mach/memory.h
@@ -21,7 +21,4 @@
 
 #define PHYS_OFFSET     UL(0x00000000)
 
-#define __virt_to_bus(x) __virt_to_phys(x)
-#define __bus_to_virt(x) __phys_to_virt(x)
-
 #endif
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index 79f0b1f8497b..10a301e32434 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -4,16 +4,19 @@ comment "OMAP Core Type"
 config ARCH_OMAP730
         depends on ARCH_OMAP1
         bool "OMAP730 Based System"
+        select CPU_ARM926T
         select ARCH_OMAP_OTG
 
 config ARCH_OMAP15XX
         depends on ARCH_OMAP1
         default y
         bool "OMAP15xx Based System"
+        select CPU_ARM925T
 
 config ARCH_OMAP16XX
         depends on ARCH_OMAP1
         bool "OMAP16xx Based System"
+        select CPU_ARM926T
         select ARCH_OMAP_OTG
 
 comment "OMAP Board Type"
diff --git a/arch/arm/mach-orion5x/include/mach/dma.h b/arch/arm/mach-orion5x/include/mach/dma.h
deleted file mode 100644
index 40a8c178f10d..000000000000
--- a/arch/arm/mach-orion5x/include/mach/dma.h
+++ /dev/null
@@ -1 +0,0 @@
-/* empty */
diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h
index f24b2513f7f3..c47b033bd999 100644
--- a/arch/arm/mach-orion5x/include/mach/io.h
+++ b/arch/arm/mach-orion5x/include/mach/io.h
@@ -38,14 +38,9 @@ __arch_iounmap(void __iomem *addr)
                 __iounmap(addr);
 }
 
-static inline void __iomem *__io(unsigned long addr)
-{
-        return (void __iomem *)addr;
-}
-
 #define __arch_ioremap(p, s, m) __arch_ioremap(p, s, m)
 #define __arch_iounmap(a)       __arch_iounmap(a)
-#define __io(a)                 __io(a)
+#define __io(a)                 __typesafe_io(a)
 #define __mem_pci(a)            (a)
 
 
diff --git a/arch/arm/mach-orion5x/include/mach/memory.h b/arch/arm/mach-orion5x/include/mach/memory.h
index 54dd76b013f2..52a2955d0f87 100644
--- a/arch/arm/mach-orion5x/include/mach/memory.h
+++ b/arch/arm/mach-orion5x/include/mach/memory.h
@@ -9,8 +9,4 @@
 
 #define PHYS_OFFSET     UL(0x00000000)
 
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
-
 #endif
diff --git a/arch/arm/mach-pnx4008/dma.c b/arch/arm/mach-pnx4008/dma.c
index ac2f70eddb9e..425f7188505e 100644
--- a/arch/arm/mach-pnx4008/dma.c
+++ b/arch/arm/mach-pnx4008/dma.c
@@ -25,9 +25,8 @@
 
 #include <asm/system.h>
 #include <mach/hardware.h>
-#include <asm/dma.h>
+#include <mach/dma.h>
 #include <asm/dma-mapping.h>
-#include <asm/mach/dma.h>
 #include <mach/clock.h>
 
 static struct dma_channel {
diff --git a/arch/arm/mach-pnx4008/include/mach/dma.h b/arch/arm/mach-pnx4008/include/mach/dma.h
index 5442d04fc575..f094bf8bfb18 100644
--- a/arch/arm/mach-pnx4008/include/mach/dma.h
+++ b/arch/arm/mach-pnx4008/include/mach/dma.h
@@ -16,8 +16,6 @@
 
 #include "platform.h"
 
-#define MAX_DMA_ADDRESS         0xffffffff
-
 #define MAX_DMA_CHANNELS        8
 
 #define DMAC_BASE               IO_ADDRESS(PNX4008_DMA_CONFIG_BASE)
diff --git a/arch/arm/mach-pnx4008/include/mach/io.h b/arch/arm/mach-pnx4008/include/mach/io.h
index c6206f25839d..cbf0904540ea 100644
--- a/arch/arm/mach-pnx4008/include/mach/io.h
+++ b/arch/arm/mach-pnx4008/include/mach/io.h
@@ -15,7 +15,7 @@
 
 #define IO_SPACE_LIMIT 0xffffffff
 
-#define __io(a)                 ((void __iomem *)(a))
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-pnx4008/include/mach/memory.h b/arch/arm/mach-pnx4008/include/mach/memory.h
index 5789a2d16f5a..0e8770081058 100644
--- a/arch/arm/mach-pnx4008/include/mach/memory.h
+++ b/arch/arm/mach-pnx4008/include/mach/memory.h
@@ -16,9 +16,6 @@
 /*
  * Physical DRAM offset.
  */
-#define PHYS_OFFSET     (0x80000000)
-
-#define __virt_to_bus(x) ((x) - PAGE_OFFSET + PHYS_OFFSET)
-#define __bus_to_virt(x) ((x) + PAGE_OFFSET - PHYS_OFFSET)
+#define PHYS_OFFSET     UL(0x80000000)
 
 #endif
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index a062235e83a8..6755c7d6bb31 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -19,6 +19,9 @@ config CPU_PXA320
 config CPU_PXA930
         bool "PXA930 (codename Tavor-P)"
 
+config CPU_PXA935
+        bool "PXA935 (codename Tavor-P65)"
+
 endmenu
 
 endif
@@ -199,6 +202,10 @@ config MACH_E800
 config TRIZEPS_PXA
         bool "PXA based Keith und Koep Trizeps DIMM-Modules"
 
+config MACH_H5000
+        bool "HP iPAQ h5000"
+        select PXA25x
+
 config MACH_TRIZEPS4
         bool "Keith und Koep Trizeps4 DIMM-Module"
         depends on TRIZEPS_PXA
@@ -283,7 +290,6 @@ config MACH_MIOA701
         bool "Mitac Mio A701 Support"
         select PXA27x
         select IWMMXT
-        select LEDS_GPIO
         select HAVE_PWM
         select GPIO_SYSFS
         help
@@ -386,16 +392,25 @@ endmenu
 
 config PXA25x
         bool
+        select CPU_XSCALE
         help
           Select code specific to PXA21x/25x/26x variants
 
 config PXA27x
         bool
+        select CPU_XSCALE
         help
           Select code specific to PXA27x variants
 
+config CPU_PXA26x
+        bool
+        select PXA25x
+        help
+          Select code specific to PXA26x (codename Dalhart)
+
 config PXA3xx
         bool
+        select CPU_XSC3
         help
           Select code specific to PXA3xx variants
 
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index d64c68b232e3..dc184eae5109 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_MACH_MP900C)	+= mp900.o
 obj-$(CONFIG_ARCH_PXA_IDP)      += idp.o
 obj-$(CONFIG_MACH_TRIZEPS4)     += trizeps4.o
 obj-$(CONFIG_MACH_COLIBRI)      += colibri.o
+obj-$(CONFIG_MACH_H5000)        += h5000.o
 obj-$(CONFIG_PXA_SHARP_C7xx)    += corgi.o sharpsl_pm.o corgi_pm.o
 obj-$(CONFIG_PXA_SHARP_Cxx00)   += spitz.o sharpsl_pm.o spitz_pm.o
 obj-$(CONFIG_CORGI_SSP_DEPRECATED)      += corgi_ssp.o corgi_lcd.o
diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c
index b965085a37b9..3a4f8d855a52 100644
--- a/arch/arm/mach-pxa/am200epd.c
+++ b/arch/arm/mach-pxa/am200epd.c
@@ -30,8 +30,12 @@
 #include <linux/irq.h>
 #include <linux/gpio.h>
 
+#include <mach/gumstix.h>
+#include <mach/mfp-pxa25x.h>
 #include <mach/pxafb.h>
 
+#include "generic.h"
+
 #include <video/metronomefb.h>
 
 static unsigned int panel_type = 6;
@@ -331,6 +335,15 @@ static struct metronome_board am200_board = {
         .cleanup                = am200_cleanup,
 };
 
+static unsigned long am200_pin_config[] __initdata = {
+        GPIO51_GPIO,
+        GPIO49_GPIO,
+        GPIO48_GPIO,
+        GPIO32_GPIO,
+        GPIO17_GPIO,
+        GPIO16_GPIO,
+};
+
 static int __init am200_init(void)
 {
         int ret;
@@ -339,6 +352,8 @@ static int __init am200_init(void)
          * creation events */
         fb_register_client(&am200_fb_notif);
 
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(am200_pin_config));
+
         /* request our platform independent driver */
         request_module("metronomefb");
 
diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c
index ca8e20538157..40b774084514 100644
--- a/arch/arm/mach-pxa/clock.c
+++ b/arch/arm/mach-pxa/clock.c
@@ -12,53 +12,16 @@
 #include <linux/platform_device.h>
 #include <linux/delay.h>
 
+#include <asm/clkdev.h>
 #include <mach/pxa2xx-regs.h>
-#include <mach/pxa2xx-gpio.h>
 #include <mach/hardware.h>
 
 #include "devices.h"
 #include "generic.h"
 #include "clock.h"
 
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
 static DEFINE_SPINLOCK(clocks_lock);
 
-static struct clk *clk_lookup(struct device *dev, const char *id)
-{
-        struct clk *p;
-
-        list_for_each_entry(p, &clocks, node)
-                if (strcmp(id, p->name) == 0 && p->dev == dev)
-                        return p;
-
-        return NULL;
-}
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
-        struct clk *p, *clk = ERR_PTR(-ENOENT);
-
-        mutex_lock(&clocks_mutex);
-        p = clk_lookup(dev, id);
-        if (!p)
-                p = clk_lookup(NULL, id);
-        if (p)
-                clk = p;
-        mutex_unlock(&clocks_mutex);
-
-        if (!IS_ERR(clk) && clk->ops == NULL)
-                clk = clk->other;
-
-        return clk;
-}
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
-
 int clk_enable(struct clk *clk)
 {
         unsigned long flags;
@@ -116,37 +79,27 @@ const struct clkops clk_cken_ops = {
         .disable        = clk_cken_disable,
 };
 
-void clks_register(struct clk *clks, size_t num)
+void clks_register(struct clk_lookup *clks, size_t num)
 {
         int i;
 
-        mutex_lock(&clocks_mutex);
         for (i = 0; i < num; i++)
-                list_add(&clks[i].node, &clocks);
-        mutex_unlock(&clocks_mutex);
+                clkdev_add(&clks[i]);
 }
 
 int clk_add_alias(char *alias, struct device *alias_dev, char *id,
         struct device *dev)
 {
-        struct clk *r = clk_lookup(dev, id);
-        struct clk *new;
+        struct clk *r = clk_get(dev, id);
+        struct clk_lookup *l;
 
         if (!r)
                 return -ENODEV;
 
-        new = kzalloc(sizeof(struct clk), GFP_KERNEL);
-
-        if (!new)
-                return -ENOMEM;
-
-        new->name = alias;
-        new->dev = alias_dev;
-        new->other = r;
-
-        mutex_lock(&clocks_mutex);
-        list_add(&new->node, &clocks);
-        mutex_unlock(&clocks_mutex);
-
+        l = clkdev_alloc(r, alias, alias_dev ? dev_name(alias_dev) : NULL);
+        clk_put(r);
+        if (!l)
+                return -ENODEV;
+        clkdev_add(l);
         return 0;
 }
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h
index 73be795fe3bf..4e9c613c6767 100644
--- a/arch/arm/mach-pxa/clock.h
+++ b/arch/arm/mach-pxa/clock.h
@@ -1,6 +1,4 @@
-#include <linux/list.h>
-
-struct clk;
+#include <asm/clkdev.h>
 
 struct clkops {
         void                    (*enable)(struct clk *);
@@ -9,9 +7,6 @@ struct clkops {
 };
 
 struct clk {
-        struct list_head        node;
-        const char              *name;
-        struct device           *dev;
         const struct clkops     *ops;
         unsigned long           rate;
         unsigned int            cken;
@@ -20,41 +15,31 @@ struct clk {
         struct clk              *other;
 };
 
-#define INIT_CKEN(_name, _cken, _rate, _delay, _dev)    \
+#define INIT_CLKREG(_clk,_devname,_conname)             \
         {                                               \
-                .name   = _name,                        \
-                .dev    = _dev,                         \
+                .clk            = _clk,                 \
+                .dev_id         = _devname,             \
+                .con_id         = _conname,             \
+        }
+
+#define DEFINE_CKEN(_name, _cken, _rate, _delay)        \
+struct clk clk_##_name = {                              \
                 .ops    = &clk_cken_ops,                \
                 .rate   = _rate,                        \
                 .cken   = CKEN_##_cken,                 \
                 .delay  = _delay,                       \
         }
 
-#define INIT_CK(_name, _cken, _ops, _dev)               \
-        {                                               \
-                .name   = _name,                        \
-                .dev    = _dev,                         \
+#define DEFINE_CK(_name, _cken, _ops)                   \
+struct clk clk_##_name = {                              \
                 .ops    = _ops,                         \
                 .cken   = CKEN_##_cken,                 \
         }
 
-/*
- * This is a placeholder to alias one clock device+name pair
- * to another struct clk.
- */
-#define INIT_CKOTHER(_name, _other, _dev)               \
-        {                                               \
-                .name   = _name,                        \
-                .dev    = _dev,                         \
-                .other  = _other,                       \
-        }
-
-#define INIT_CLK(_name, _ops, _rate, _delay, _dev)      \
-        {                                               \
-                .name   = _name,                        \
-                .dev    = _dev,                         \
-                .ops    = _ops,                         \
-                .rate   = _rate,                        \
+#define DEFINE_CLK(_name, _ops, _rate, _delay)          \
+struct clk clk_##_name = {                              \
+                .ops    = _ops,                         \
+                .rate   = _rate,                        \
                 .delay  = _delay,                       \
         }
 
@@ -64,20 +49,16 @@ void clk_cken_enable(struct clk *clk);
 void clk_cken_disable(struct clk *clk);
 
 #ifdef CONFIG_PXA3xx
-#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev)  \
-        {                                               \
-                .name   = _name,                        \
-                .dev    = _dev,                         \
+#define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay)   \
+struct clk clk_##_name = {                              \
                 .ops    = &clk_pxa3xx_cken_ops,         \
                 .rate   = _rate,                        \
                 .cken   = CKEN_##_cken,                 \
                 .delay  = _delay,                       \
         }
 
-#define PXA3xx_CK(_name, _cken, _ops, _dev)             \
-        {                                               \
-                .name   = _name,                        \
-                .dev    = _dev,                         \
+#define DEFINE_PXA3_CK(_name, _cken, _ops)              \
+struct clk clk_##_name = {                              \
                 .ops    = _ops,                         \
                 .cken   = CKEN_##_cken,                 \
         }
@@ -87,7 +68,7 @@ extern void clk_pxa3xx_cken_enable(struct clk *);
 extern void clk_pxa3xx_cken_disable(struct clk *);
 #endif
 
-void clks_register(struct clk *clks, size_t num);
+void clks_register(struct clk_lookup *clks, size_t num);
 int clk_add_alias(char *alias, struct device *alias_dev, char *id,
         struct device *dev);
 
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index deb46cd144bf..ff0c577cd1ac 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -31,7 +31,6 @@
 #include <mach/mfp-pxa300.h>
 
 #include <mach/hardware.h>
-#include <mach/gpio.h>
 #include <mach/pxafb.h>
 #include <mach/mmc.h>
 #include <mach/ohci.h>
@@ -137,6 +136,10 @@ static mfp_cfg_t cm_x300_mfp_cfg[] __initdata = {
         GPIO82_GPIO | MFP_PULL_HIGH,    /* MMC CD */
         GPIO85_GPIO,                    /* MMC WP */
         GPIO99_GPIO,                    /* Ethernet IRQ */
+
+        /* Standard I2C */
+        GPIO21_I2C_SCL,
+        GPIO22_I2C_SDA,
 };
 
 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 65558d6aa220..c5e28a46b292 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -19,6 +19,7 @@
 #include <linux/fs.h>
 #include <linux/interrupt.h>
 #include <linux/mmc/host.h>
+#include <linux/mtd/physmap.h>
 #include <linux/pm.h>
 #include <linux/gpio.h>
 #include <linux/backlight.h>
@@ -541,11 +542,42 @@ err_free_1:
 static inline void corgi_init_spi(void) {}
 #endif
 
+static struct mtd_partition sharpsl_rom_parts[] = {
+        {
+                .name   ="Boot PROM Filesystem",
+                .offset = 0x00120000,
+                .size   = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data sharpsl_rom_data = {
+        .width          = 2,
+        .nr_parts       = ARRAY_SIZE(sharpsl_rom_parts),
+        .parts          = sharpsl_rom_parts,
+};
+
+static struct resource sharpsl_rom_resources[] = {
+        {
+                .start  = 0x00000000,
+                .end    = 0x007fffff,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device sharpsl_rom_device = {
+        .name   = "physmap-flash",
+        .id     = -1,
+        .resource = sharpsl_rom_resources,
+        .num_resources = ARRAY_SIZE(sharpsl_rom_resources),
+        .dev.platform_data = &sharpsl_rom_data,
+};
+
 static struct platform_device *devices[] __initdata = {
         &corgiscoop_device,
         &corgifb_device,
         &corgikbd_device,
         &corgiled_device,
+        &sharpsl_rom_device,
 };
 
 static void corgi_poweroff(void)
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
index 1f272ea83f36..771dd4eac935 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
@@ -64,7 +64,7 @@ typedef struct {
 
 /* Define the refresh period in mSec for the SDRAM and the number of rows */
 #define SDRAM_TREF      64      /* standard 64ms SDRAM */
-#define SDRAM_ROWS      4096    /* 64MB=8192 32MB=4096 */
+static unsigned int sdram_rows;
 
 #define CCLKCFG_TURBO           0x1
 #define CCLKCFG_FCS             0x2
@@ -73,6 +73,9 @@ typedef struct {
 #define MDREFR_DB2_MASK         (MDREFR_K2DB2 | MDREFR_K1DB2)
 #define MDREFR_DRI_MASK         0xFFF
 
+#define MDCNFG_DRAC2(mdcnfg) (((mdcnfg) >> 21) & 0x3)
+#define MDCNFG_DRAC0(mdcnfg) (((mdcnfg) >> 5) & 0x3)
+
 /*
  * PXA255 definitions
  */
@@ -109,6 +112,10 @@ static struct cpufreq_frequency_table
 static struct cpufreq_frequency_table
         pxa255_turbo_freq_table[NUM_PXA25x_TURBO_FREQS+1];
 
+static unsigned int pxa255_turbo_table;
+module_param(pxa255_turbo_table, uint, 0);
+MODULE_PARM_DESC(pxa255_turbo_table, "Selects the frequency table (0 = run table, !0 = turbo table)");
+
 /*
  * PXA270 definitions
  *
@@ -158,22 +165,16 @@ static struct cpufreq_frequency_table
 
 extern unsigned get_clk_frequency_khz(int info);
 
-static void find_freq_tables(struct cpufreq_policy *policy,
-                             struct cpufreq_frequency_table **freq_table,
+static void find_freq_tables(struct cpufreq_frequency_table **freq_table,
                              pxa_freqs_t **pxa_freqs)
 {
         if (cpu_is_pxa25x()) {
-                if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
+                if (!pxa255_turbo_table) {
                         *pxa_freqs = pxa255_run_freqs;
                         *freq_table = pxa255_run_freq_table;
-                } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
+                } else {
                         *pxa_freqs = pxa255_turbo_freqs;
                         *freq_table = pxa255_turbo_freq_table;
-                } else {
-                        printk("CPU PXA: Unknown policy found. "
-                               "Using CPUFREQ_POLICY_PERFORMANCE\n");
-                        *pxa_freqs = pxa255_run_freqs;
-                        *freq_table = pxa255_run_freq_table;
                 }
         }
         if (cpu_is_pxa27x()) {
@@ -194,14 +195,28 @@ static void pxa27x_guess_max_freq(void)
         }
 }
 
+static void init_sdram_rows(void)
+{
+        uint32_t mdcnfg = MDCNFG;
+        unsigned int drac2 = 0, drac0 = 0;
+
+        if (mdcnfg & (MDCNFG_DE2 | MDCNFG_DE3))
+                drac2 = MDCNFG_DRAC2(mdcnfg);
+
+        if (mdcnfg & (MDCNFG_DE0 | MDCNFG_DE1))
+                drac0 = MDCNFG_DRAC0(mdcnfg);
+
+        sdram_rows = 1 << (11 + max(drac0, drac2));
+}
+
 static u32 mdrefr_dri(unsigned int freq)
 {
         u32 dri = 0;
 
         if (cpu_is_pxa25x())
-                dri = ((freq * SDRAM_TREF) / (SDRAM_ROWS * 32));
+                dri = ((freq * SDRAM_TREF) / (sdram_rows * 32));
         if (cpu_is_pxa27x())
-                dri = ((freq * SDRAM_TREF) / (SDRAM_ROWS - 31)) / 32;
+                dri = ((freq * SDRAM_TREF) / (sdram_rows - 31)) / 32;
         return dri;
 }
 
@@ -212,7 +227,7 @@ static int pxa_verify_policy(struct cpufreq_policy *policy)
         pxa_freqs_t *pxa_freqs;
         int ret;
 
-        find_freq_tables(policy, &pxa_freqs_table, &pxa_freqs);
+        find_freq_tables(&pxa_freqs_table, &pxa_freqs);
         ret = cpufreq_frequency_table_verify(policy, pxa_freqs_table);
 
         if (freq_debug)
@@ -240,7 +255,7 @@ static int pxa_set_target(struct cpufreq_policy *policy,
         unsigned int unused, preset_mdrefr, postset_mdrefr, cclkcfg;
 
         /* Get the current policy */
-        find_freq_tables(policy, &pxa_freqs_table, &pxa_freq_settings);
+        find_freq_tables(&pxa_freqs_table, &pxa_freq_settings);
 
         /* Lookup the next frequency */
         if (cpufreq_frequency_table_target(policy, pxa_freqs_table,
@@ -329,11 +344,15 @@ static __init int pxa_cpufreq_init(struct cpufreq_policy *policy)
 {
         int i;
         unsigned int freq;
+        struct cpufreq_frequency_table *pxa255_freq_table;
+        pxa_freqs_t *pxa255_freqs;
 
         /* try to guess pxa27x cpu */
         if (cpu_is_pxa27x())
                 pxa27x_guess_max_freq();
 
+        init_sdram_rows();
+
         /* set default policy and cpuinfo */
         policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
         policy->cur = get_clk_frequency_khz(0);    /* current freq */
@@ -354,6 +373,8 @@ static __init int pxa_cpufreq_init(struct cpufreq_policy *policy)
         }
         pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END;
 
+        pxa255_turbo_table = !!pxa255_turbo_table;
+
         /* Generate the pxa27x cpufreq_frequency_table struct */
         for (i = 0; i < NUM_PXA27x_FREQS; i++) {
                 freq = pxa27x_freqs[i].khz;
@@ -368,8 +389,12 @@ static __init int pxa_cpufreq_init(struct cpufreq_policy *policy)
          * Set the policy's minimum and maximum frequencies from the tables
          * just constructed.  This sets cpuinfo.mxx_freq, min and max.
          */
-        if (cpu_is_pxa25x())
-                cpufreq_frequency_table_cpuinfo(policy, pxa255_run_freq_table);
+        if (cpu_is_pxa25x()) {
+                find_freq_tables(&pxa255_freq_table, &pxa255_freqs);
+                pr_info("PXA255 cpufreq using %s frequency table\n",
+                        pxa255_turbo_table ? "turbo" : "run");
+                cpufreq_frequency_table_cpuinfo(policy, pxa255_freq_table);
+        }
         else if (cpu_is_pxa27x())
                 cpufreq_frequency_table_cpuinfo(policy, pxa27x_freq_table);
 
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index 35736fc08634..e16f8e3d58d3 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -4,13 +4,12 @@
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 
-#include <mach/gpio.h>
+#include <mach/pxa-regs.h>
 #include <mach/udc.h>
 #include <mach/pxafb.h>
 #include <mach/mmc.h>
 #include <mach/irda.h>
 #include <mach/i2c.h>
-#include <mach/mfp-pxa27x.h>
 #include <mach/ohci.h>
 #include <mach/pxa27x_keypad.h>
 #include <mach/pxa2xx_spi.h>
@@ -156,8 +155,8 @@ void __init set_pxa_fb_parent(struct device *parent_dev)
 
 static struct resource pxa_resource_ffuart[] = {
         {
-                .start  = __PREG(FFUART),
-                .end    = __PREG(FFUART) + 35,
+                .start  = 0x40100000,
+                .end    = 0x40100023,
                 .flags  = IORESOURCE_MEM,
         }, {
                 .start  = IRQ_FFUART,
@@ -175,8 +174,8 @@ struct platform_device pxa_device_ffuart= {
 
 static struct resource pxa_resource_btuart[] = {
         {
-                .start  = __PREG(BTUART),
-                .end    = __PREG(BTUART) + 35,
+                .start  = 0x40200000,
+                .end    = 0x40200023,
                 .flags  = IORESOURCE_MEM,
         }, {
                 .start  = IRQ_BTUART,
@@ -194,8 +193,8 @@ struct platform_device pxa_device_btuart = {
 
 static struct resource pxa_resource_stuart[] = {
         {
-                .start  = __PREG(STUART),
-                .end    = __PREG(STUART) + 35,
+                .start  = 0x40700000,
+                .end    = 0x40700023,
                 .flags  = IORESOURCE_MEM,
         }, {
                 .start  = IRQ_STUART,
@@ -213,8 +212,8 @@ struct platform_device pxa_device_stuart = {
 
 static struct resource pxa_resource_hwuart[] = {
         {
-                .start  = __PREG(HWUART),
-                .end    = __PREG(HWUART) + 47,
+                .start  = 0x41600000,
+                .end    = 0x4160002F,
                 .flags  = IORESOURCE_MEM,
         }, {
                 .start  = IRQ_HWUART,
@@ -249,18 +248,53 @@ struct platform_device pxa_device_i2c = {
         .num_resources  = ARRAY_SIZE(pxai2c_resources),
 };
 
-static unsigned long pxa27x_i2c_mfp_cfg[] = {
-        GPIO117_I2C_SCL,
-        GPIO118_I2C_SDA,
-};
-
 void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
 {
-        if (cpu_is_pxa27x())
-                pxa2xx_mfp_config(ARRAY_AND_SIZE(pxa27x_i2c_mfp_cfg));
         pxa_register_device(&pxa_device_i2c, info);
 }
 
+#ifdef CONFIG_PXA27x
+static struct resource pxa27x_resources_i2c_power[] = {
+        {
+                .start  = 0x40f00180,
+                .end    = 0x40f001a3,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_PWRI2C,
+                .end    = IRQ_PWRI2C,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device pxa27x_device_i2c_power = {
+        .name           = "pxa2xx-i2c",
+        .id             = 1,
+        .resource       = pxa27x_resources_i2c_power,
+        .num_resources  = ARRAY_SIZE(pxa27x_resources_i2c_power),
+};
+#endif
+
+#ifdef CONFIG_PXA3xx
+static struct resource pxa3xx_resources_i2c_power[] = {
+        {
+                .start  = 0x40f500c0,
+                .end    = 0x40f500d3,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = IRQ_PWRI2C,
+                .end    = IRQ_PWRI2C,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device pxa3xx_device_i2c_power = {
+        .name           = "pxa2xx-i2c",
+        .id             = 1,
+        .resource       = pxa3xx_resources_i2c_power,
+        .num_resources  = ARRAY_SIZE(pxa3xx_resources_i2c_power),
+};
+#endif
+
 static struct resource pxai2s_resources[] = {
         {
                 .start  = 0x40400000,
@@ -296,11 +330,36 @@ void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
         pxa_register_device(&pxa_device_ficp, info);
 }
 
-struct platform_device pxa_device_rtc = {
+static struct resource pxa_rtc_resources[] = {
+        [0] = {
+                .start  = 0x40900000,
+                .end    = 0x40900000 + 0x3b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_RTC1Hz,
+                .end    = IRQ_RTC1Hz,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                .start  = IRQ_RTCAlrm,
+                .end    = IRQ_RTCAlrm,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device sa1100_device_rtc = {
         .name           = "sa1100-rtc",
         .id             = -1,
 };
 
+struct platform_device pxa_device_rtc = {
+        .name           = "pxa-rtc",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(pxa_rtc_resources),
+        .resource       = pxa_rtc_resources,
+};
+
 static struct resource pxa_ac97_resources[] = {
         [0] = {
                 .start  = 0x40500000,
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h
index bb04af4b0aa3..ecc24a4dca6d 100644
--- a/arch/arm/mach-pxa/devices.h
+++ b/arch/arm/mach-pxa/devices.h
@@ -11,6 +11,7 @@ extern struct platform_device pxa_device_hwuart;
 extern struct platform_device pxa_device_i2c;
 extern struct platform_device pxa_device_i2s;
 extern struct platform_device pxa_device_ficp;
+extern struct platform_device sa1100_device_rtc;
 extern struct platform_device pxa_device_rtc;
 extern struct platform_device pxa_device_ac97;
 
diff --git a/arch/arm/mach-pxa/dma.c b/arch/arm/mach-pxa/dma.c
index c0be17e0ab82..b1514fb20d3a 100644
--- a/arch/arm/mach-pxa/dma.c
+++ b/arch/arm/mach-pxa/dma.c
@@ -21,7 +21,7 @@
 #include <asm/system.h>
 #include <asm/irq.h>
 #include <mach/hardware.h>
-#include <asm/dma.h>
+#include <mach/dma.h>
 
 #include <mach/pxa-regs.h>
 
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
index cc3d850cc0b6..3e6aa33a2c7c 100644
--- a/arch/arm/mach-pxa/ezx.c
+++ b/arch/arm/mach-pxa/ezx.c
@@ -21,6 +21,7 @@
 #include <mach/pxafb.h>
 #include <mach/ohci.h>
 #include <mach/i2c.h>
+#include <mach/hardware.h>
 
 #include <mach/mfp-pxa27x.h>
 #include <mach/pxa-regs.h>
@@ -112,6 +113,10 @@ static unsigned long ezx_pin_config[] __initdata = {
         GPIO91_USB_P3_1,        /* ICL_XRXD */
         GPIO56_USB_P3_4,        /* ICL_VMOUT */
         GPIO113_USB_P3_3,       /* /ICL_VMIN */
+
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
 };
 
 static void __init ezx_init(void)
diff --git a/arch/arm/mach-pxa/gpio.c b/arch/arm/mach-pxa/gpio.c
index 14930cf8be7b..5fec1e479cb3 100644
--- a/arch/arm/mach-pxa/gpio.c
+++ b/arch/arm/mach-pxa/gpio.c
@@ -25,6 +25,18 @@
 
 #include "generic.h"
 
+#define GPIO0_BASE      ((void __iomem *)io_p2v(0x40E00000))
+#define GPIO1_BASE      ((void __iomem *)io_p2v(0x40E00004))
+#define GPIO2_BASE      ((void __iomem *)io_p2v(0x40E00008))
+#define GPIO3_BASE      ((void __iomem *)io_p2v(0x40E00100))
+
+#define GPLR_OFFSET     0x00
+#define GPDR_OFFSET     0x0C
+#define GPSR_OFFSET     0x18
+#define GPCR_OFFSET     0x24
+#define GRER_OFFSET     0x30
+#define GFER_OFFSET     0x3C
+#define GEDR_OFFSET     0x48
 
 struct pxa_gpio_chip {
         struct gpio_chip chip;
@@ -33,6 +45,18 @@ struct pxa_gpio_chip {
 
 int pxa_last_gpio;
 
+#ifdef CONFIG_CPU_PXA26x
+/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted,
+ * as well as their Alternate Function value being '1' for GPIO in GAFRx.
+ */
+static int __gpio_is_inverted(unsigned gpio)
+{
+        return cpu_is_pxa25x() && gpio > 85;
+}
+#else
+#define __gpio_is_inverted(gpio)        (0)
+#endif
+
 /*
  * Configure pins for GPIO or other functions
  */
@@ -75,7 +99,10 @@ static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
         gpdr = pxa->regbase + GPDR_OFFSET;
         local_irq_save(flags);
         value = __raw_readl(gpdr);
-        value &= ~mask;
+        if (__gpio_is_inverted(chip->base + offset))
+                value |= mask;
+        else
+                value &= ~mask;
         __raw_writel(value, gpdr);
         local_irq_restore(flags);
 
@@ -97,7 +124,10 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip,
         gpdr = pxa->regbase + GPDR_OFFSET;
         local_irq_save(flags);
         tmp = __raw_readl(gpdr);
-        tmp |= mask;
+        if (__gpio_is_inverted(chip->base + offset))
+                tmp &= ~mask;
+        else
+                tmp |= mask;
         __raw_writel(tmp, gpdr);
         local_irq_restore(flags);
 
@@ -173,10 +203,17 @@ static unsigned long GPIO_IRQ_mask[4];
  */
 static int __gpio_is_occupied(unsigned gpio)
 {
-        if (cpu_is_pxa25x() || cpu_is_pxa27x())
-                return GAFR(gpio) & (0x3 << (((gpio) & 0xf) * 2));
-        else
-                return 0;
+        if (cpu_is_pxa27x() || cpu_is_pxa25x()) {
+                int af = (GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
+                int dir = GPDR(gpio) & GPIO_bit(gpio);
+
+                if (__gpio_is_inverted(gpio))
+                        return af != 1 || dir == 0;
+                else
+                        return af != 0 || dir != 0;
+        }
+
+        return 0;
 }
 
 static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
@@ -190,9 +227,8 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
                 /* Don't mess with enabled GPIOs using preconfigured edges or
                  * GPIOs set to alternate function or to output during probe
                  */
-                if ((GPIO_IRQ_rising_edge[idx] |
-                     GPIO_IRQ_falling_edge[idx] |
-                     GPDR(gpio)) & GPIO_bit(gpio))
+                if ((GPIO_IRQ_rising_edge[idx] & GPIO_bit(gpio)) ||
+                    (GPIO_IRQ_falling_edge[idx] & GPIO_bit(gpio)))
                         return 0;
 
                 if (__gpio_is_occupied(gpio))
@@ -201,7 +237,10 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
                 type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
         }
 
-        GPDR(gpio) &= ~GPIO_bit(gpio);
+        if (__gpio_is_inverted(gpio))
+                GPDR(gpio) |= GPIO_bit(gpio);
+        else
+                GPDR(gpio) &= ~GPIO_bit(gpio);
 
         if (type & IRQ_TYPE_EDGE_RISING)
                 __set_bit(gpio, GPIO_IRQ_rising_edge);
diff --git a/arch/arm/mach-pxa/gumstix.c b/arch/arm/mach-pxa/gumstix.c
index d8962a0fb98d..06bc6674b015 100644
--- a/arch/arm/mach-pxa/gumstix.c
+++ b/arch/arm/mach-pxa/gumstix.c
@@ -184,13 +184,6 @@ static unsigned long gumstix_pin_config[] __initdata = {
         GPIO6_MMC_CLK,
         GPIO53_MMC_CLK,
         GPIO8_MMC_CS0,
-        /* these are used by AM200EPD */
-        GPIO51_GPIO,
-        GPIO49_GPIO,
-        GPIO48_GPIO,
-        GPIO32_GPIO,
-        GPIO17_GPIO,
-        GPIO16_GPIO,
 };
 
 static void __init gumstix_init(void)
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c
new file mode 100644
index 000000000000..da6e4422c0f3
--- /dev/null
+++ b/arch/arm/mach-pxa/h5000.c
@@ -0,0 +1,200 @@
+/*
+ * Hardware definitions for HP iPAQ h5xxx Handheld Computers
+ *
+ * Copyright 2000-2003  Hewlett-Packard Company.
+ * Copyright 2002       Jamey Hicks <jamey.hicks@hp.com>
+ * Copyright 2004-2005  Phil Blundell <pb@handhelds.org>
+ * Copyright 2007-2008  Anton Vorontsov <cbouatmailru@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
+ * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
+ * FITNESS FOR ANY PARTICULAR PURPOSE.
+ *
+ * Author: Jamey Hicks.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <mach/h5000.h>
+#include <mach/pxa-regs.h>
+#include <mach/pxa2xx-regs.h>
+#include <mach/mfp-pxa25x.h>
+#include <mach/udc.h>
+#include "generic.h"
+
+/*
+ * Flash
+ */
+
+static struct mtd_partition h5000_flash0_partitions[] = {
+        {
+                .name = "bootldr",
+                .size = 0x00040000,
+                .offset = 0,
+                .mask_flags = MTD_WRITEABLE,
+        },
+        {
+                .name = "root",
+                .size = MTDPART_SIZ_FULL,
+                .offset = MTDPART_OFS_APPEND,
+        },
+};
+
+static struct mtd_partition h5000_flash1_partitions[] = {
+        {
+                .name = "second root",
+                .size = SZ_16M - 0x00040000,
+                .offset = 0,
+        },
+        {
+                .name = "asset",
+                .size = MTDPART_SIZ_FULL,
+                .offset = MTDPART_OFS_APPEND,
+                .mask_flags = MTD_WRITEABLE,
+        },
+};
+
+static struct physmap_flash_data h5000_flash0_data = {
+        .width = 4,
+        .parts = h5000_flash0_partitions,
+        .nr_parts = ARRAY_SIZE(h5000_flash0_partitions),
+};
+
+static struct physmap_flash_data h5000_flash1_data = {
+        .width = 4,
+        .parts = h5000_flash1_partitions,
+        .nr_parts = ARRAY_SIZE(h5000_flash1_partitions),
+};
+
+static struct resource h5000_flash0_resources = {
+        .start = PXA_CS0_PHYS,
+        .end = PXA_CS0_PHYS + SZ_32M - 1,
+        .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
+};
+
+static struct resource h5000_flash1_resources = {
+        .start = PXA_CS0_PHYS + SZ_32M,
+        .end = PXA_CS0_PHYS + SZ_32M + SZ_16M - 1,
+        .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
+};
+
+static struct platform_device h5000_flash[] = {
+        {
+                .name = "physmap-flash",
+                .id = 0,
+                .resource = &h5000_flash0_resources,
+                .num_resources = 1,
+                .dev = {
+                        .platform_data = &h5000_flash0_data,
+                },
+        },
+        {
+                .name = "physmap-flash",
+                .id = 1,
+                .resource = &h5000_flash1_resources,
+                .num_resources = 1,
+                .dev = {
+                        .platform_data = &h5000_flash1_data,
+                },
+        },
+};
+
+/*
+ * USB Device Controller
+ */
+
+static struct pxa2xx_udc_mach_info h5000_udc_mach_info __initdata = {
+        .gpio_pullup = H5000_GPIO_USB_PULLUP,
+};
+
+/*
+ * GPIO setup
+ */
+
+static unsigned long h5000_pin_config[] __initdata = {
+        /* Crystal and Clock Signals */
+        GPIO12_32KHz,
+
+        /* SDRAM and Static Memory I/O Signals */
+        GPIO15_nCS_1,
+        GPIO78_nCS_2,
+        GPIO79_nCS_3,
+        GPIO80_nCS_4,
+
+        /* FFUART */
+        GPIO34_FFUART_RXD,
+        GPIO35_FFUART_CTS,
+        GPIO36_FFUART_DCD,
+        GPIO37_FFUART_DSR,
+        GPIO38_FFUART_RI,
+        GPIO39_FFUART_TXD,
+        GPIO40_FFUART_DTR,
+        GPIO41_FFUART_RTS,
+
+        /* BTUART */
+        GPIO42_BTUART_RXD,
+        GPIO43_BTUART_TXD,
+        GPIO44_BTUART_CTS,
+        GPIO45_BTUART_RTS,
+
+        /* SSP1 */
+        GPIO23_SSP1_SCLK,
+        GPIO25_SSP1_TXD,
+        GPIO26_SSP1_RXD,
+};
+
+/*
+ * Localbus setup:
+ * CS0: Flash;
+ * CS1: MediaQ chip, select 16-bit bus and vlio;
+ * CS5: SAMCOP.
+ */
+
+static void fix_msc(void)
+{
+        MSC0 = 0x129c24f2;
+        MSC1 = 0x7ff424fa;
+        MSC2 = 0x7ff47ff4;
+
+        MDREFR |= 0x02080000;
+}
+
+/*
+ * Platform devices
+ */
+
+static struct platform_device *devices[] __initdata = {
+        &h5000_flash[0],
+        &h5000_flash[1],
+};
+
+static void __init h5000_init(void)
+{
+        fix_msc();
+
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(h5000_pin_config));
+        pxa_set_udc_info(&h5000_udc_mach_info);
+        platform_add_devices(ARRAY_AND_SIZE(devices));
+}
+
+MACHINE_START(H5400, "HP iPAQ H5000")
+        .phys_io = 0x40000000,
+        .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params = 0xa0000100,
+        .map_io = pxa_map_io,
+        .init_irq = pxa25x_init_irq,
+        .timer = &pxa_timer,
+        .init_machine = h5000_init,
+MACHINE_END
diff --git a/arch/arm/mach-pxa/include/mach/clkdev.h b/arch/arm/mach-pxa/include/mach/clkdev.h
new file mode 100644
index 000000000000..04b37a89801c
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do { } while (0)
+
+#endif
diff --git a/arch/arm/mach-pxa/include/mach/dma.h b/arch/arm/mach-pxa/include/mach/dma.h
index 955bfe606067..7804637a6df3 100644
--- a/arch/arm/mach-pxa/include/mach/dma.h
+++ b/arch/arm/mach-pxa/include/mach/dma.h
@@ -30,10 +30,6 @@ typedef enum {
         DMA_PRIO_LOW = 2
 } pxa_dma_prio;
 
-#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
-#define HAVE_ARCH_PCI_SET_DMA_MASK      1
-#endif
-
 /*
  * DMA registration
  */
diff --git a/arch/arm/mach-pxa/include/mach/h5000.h b/arch/arm/mach-pxa/include/mach/h5000.h
new file mode 100644
index 000000000000..2a5ae3802787
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/h5000.h
@@ -0,0 +1,113 @@
+/*
+ * Hardware definitions for HP iPAQ h5xxx Handheld Computers
+ *
+ * Copyright(20)02 Hewlett-Packard Company.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
+ * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
+ * FITNESS FOR ANY PARTICULAR PURPOSE.
+ *
+ * Author: Jamey Hicks
+ */
+
+#ifndef __ASM_ARCH_H5000_H
+#define __ASM_ARCH_H5000_H
+
+#include <mach/mfp-pxa25x.h>
+
+/*
+ * CPU GPIOs
+ */
+
+#define H5000_GPIO_POWER_BUTTON   (0)
+#define H5000_GPIO_RESET_BUTTON_N (1)
+#define H5000_GPIO_OPT_INT        (2)
+#define H5000_GPIO_BACKUP_POWER   (3)
+#define H5000_GPIO_ACTION_BUTTON  (4)
+#define H5000_GPIO_COM_DCD_SOMETHING  (5) /* what is this really ? */
+/* 6 not connected */
+#define H5000_GPIO_RESET_BUTTON_AGAIN_N (7) /* connected to gpio 1 as well */
+/* 8 not connected */
+#define H5000_GPIO_RSO_N          (9)       /* reset output from max1702 which regulates 3.3 and 2.5 */
+#define H5000_GPIO_ASIC_INT_N   (10)       /* from companion asic */
+#define H5000_GPIO_BT_ENV_0     (11)       /* to LMX9814, set to 1 according to regdump */
+/*(12) not connected */
+#define H5000_GPIO_BT_ENV_1     (13)       /* to LMX9814, set to 1 according to regdump */
+#define H5000_GPIO_BT_WU        (14)       /* from LMX9814, Defined as HOST_WAKEUP in the LMX9820 data sheet */
+/*(15) is CS1# */
+/*(16) not connected */
+/*(17) not connected */
+/*(18) is pcmcia ready */
+/*(19) is dreq1 */
+/*(20) is dreq0 */
+#define H5000_GPIO_OE_RD_NWR    (21)       /* output enable on rd/nwr signal to companion asic */
+/*(22) is not connected */
+#define H5000_GPIO_OPT_SPI_CLK  (23)       /* to extension pack */
+#define H5000_GPIO_OPT_SPI_CS_N (24)       /* to extension pack */
+#define H5000_GPIO_OPT_SPI_DOUT (25)       /* to extension pack */
+#define H5000_GPIO_OPT_SPI_DIN  (26)       /* to extension pack */
+/*(27) not connected */
+#define H5000_GPIO_I2S_BITCLK   (28)       /* connected to AC97 codec */
+#define H5000_GPIO_I2S_DATAOUT  (29)       /* connected to AC97 codec */
+#define H5000_GPIO_I2S_DATAIN   (30)       /* connected to AC97 codec */
+#define H5000_GPIO_I2S_LRCLK    (31)       /* connected to AC97 codec */
+#define H5000_GPIO_I2S_SYSCLK   (32)       /* connected to AC97 codec */
+/*(33) is CS5# */
+#define H5000_GPIO_COM_RXD      (34)       /* connected to cradle/cable connector */
+#define H5000_GPIO_COM_CTS      (35)       /* connected to cradle/cable connector */
+#define H5000_GPIO_COM_DCD      (36)       /* connected to cradle/cable connector */
+#define H5000_GPIO_COM_DSR      (37)       /* connected to cradle/cable connector */
+#define H5000_GPIO_COM_RI       (38)       /* connected to cradle/cable connector */
+#define H5000_GPIO_COM_TXD      (39)       /* connected to cradle/cable connector */
+#define H5000_GPIO_COM_DTR      (40)       /* connected to cradle/cable connector */
+#define H5000_GPIO_COM_RTS      (41)       /* connected to cradle/cable connector */
+
+#define H5000_GPIO_BT_RXD       (42)       /* connected to BT (LMX9814) */
+#define H5000_GPIO_BT_TXD       (43)       /* connected to BT (LMX9814) */
+#define H5000_GPIO_BT_CTS       (44)       /* connected to BT (LMX9814) */
+#define H5000_GPIO_BT_RTS       (45)       /* connected to BT (LMX9814) */
+
+#define H5000_GPIO_IRDA_RXD     (46)
+#define H5000_GPIO_IRDA_TXD     (47)
+
+#define H5000_GPIO_POE_N        (48)       /* used for pcmcia */
+#define H5000_GPIO_PWE_N        (49)       /* used for pcmcia */
+#define H5000_GPIO_PIOR_N       (50)       /* used for pcmcia */
+#define H5000_GPIO_PIOW_N       (51)       /* used for pcmcia */
+#define H5000_GPIO_PCE1_N       (52)       /* used for pcmcia */
+#define H5000_GPIO_PCE2_N       (53)       /* used for pcmcia */
+#define H5000_GPIO_PSKTSEL      (54)       /* used for pcmcia */
+#define H5000_GPIO_PREG_N       (55)       /* used for pcmcia */
+#define H5000_GPIO_PWAIT_N      (56)       /* used for pcmcia */
+#define H5000_GPIO_IOIS16_N     (57)       /* used for pcmcia */
+
+#define H5000_GPIO_IRDA_SD      (58)       /* to hsdl3002 sd */
+/*(59) not connected */
+#define H5000_GPIO_POWER_SD_N   (60)       /* controls power to SD */
+#define H5000_GPIO_POWER_RS232_N        (61)       /* inverted FORCEON to rs232 transceiver */
+#define H5000_GPIO_POWER_ACCEL_N        (62)       /* controls power to accel */
+/*(63) is not connected */
+#define H5000_GPIO_OPT_NVRAM    (64)       /* controls power to expansion pack */
+#define H5000_GPIO_CHG_EN       (65)       /* to sc801 en */
+#define H5000_GPIO_USB_PULLUP   (66)       /* USB d+ pullup via 1.5K resistor */
+#define H5000_GPIO_BT_2V8_N     (67)       /* 2.8V used by bluetooth */
+#define H5000_GPIO_EXT_CHG_RATE (68)       /* enables external charging rate */
+/*(69) is not connected */
+#define H5000_GPIO_CIR_RESET    (70)       /* consumer IR reset */
+#define H5000_GPIO_POWER_LIGHT_SENSOR_N (71)
+#define H5000_GPIO_BT_M_RESET   (72)
+#define H5000_GPIO_STD_CHG_RATE (73)
+#define H5000_GPIO_SD_WP_N      (74)
+#define H5000_GPIO_MOTOR_ON_N   (75)       /* external pullup on this */
+#define H5000_GPIO_HEADPHONE_DETECT     (76)
+#define H5000_GPIO_USB_CHG_RATE (77)       /* select rate for charging via usb */
+/*(78) is CS2# */
+/*(79) is CS3# */
+/*(80) is CS4# */
+
+#endif /* __ASM_ARCH_H5000_H */
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index a582a6d9b92b..4e782ec38668 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -102,6 +102,9 @@
  *  PXA930      B0      0x69056835      0x5E643013
  *  PXA930      B1      0x69056837      0x7E643013
  *  PXA930      B2      0x69056838      0x8E643013
+ *
+ *  PXA935      A0      0x56056931      0x1E653013
+ *  PXA935      B0      0x56056936      0x6E653013
  */
 #ifdef CONFIG_PXA25x
 #define __cpu_is_pxa210(id)                             \
@@ -178,12 +181,22 @@
 #define __cpu_is_pxa930(id)                             \
         ({                                              \
                 unsigned int _id = (id) >> 4 & 0xfff;   \
-                _id == 0x683;           \
+                _id == 0x683;                           \
          })
 #else
 #define __cpu_is_pxa930(id)     (0)
 #endif
 
+#ifdef CONFIG_CPU_PXA935
+#define __cpu_is_pxa935(id)                             \
+        ({                                              \
+                unsigned int _id = (id) >> 4 & 0xfff;   \
+                _id == 0x693;                           \
+         })
+#else
+#define __cpu_is_pxa935(id)     (0)
+#endif
+
 #define cpu_is_pxa210()                                 \
         ({                                              \
                 __cpu_is_pxa210(read_cpuid_id());       \
@@ -204,8 +217,6 @@
                 __cpu_is_pxa25x(read_cpuid_id());       \
         })
 
-extern int cpu_is_pxa26x(void);
-
 #define cpu_is_pxa27x()                                 \
         ({                                              \
                 __cpu_is_pxa27x(read_cpuid_id());       \
@@ -232,6 +243,12 @@ extern int cpu_is_pxa26x(void);
                 __cpu_is_pxa930(id);                    \
          })
 
+#define cpu_is_pxa935()                                 \
+        ({                                              \
+                unsigned int id = read_cpuid(CPUID_ID); \
+                __cpu_is_pxa935(id);                    \
+         })
+
 /*
  * CPUID Core Generation Bit
  * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x
@@ -249,6 +266,12 @@ extern int cpu_is_pxa26x(void);
                 _id == 0x3;                             \
          })
 
+#define __cpu_is_pxa9xx(id)                             \
+        ({                                              \
+                unsigned int _id = (id) >> 4 & 0xfff;   \
+                _id == 0x683 || _id == 0x693;           \
+         })
+
 #define cpu_is_pxa2xx()                                 \
         ({                                              \
                 __cpu_is_pxa2xx(read_cpuid_id());       \
@@ -259,21 +282,10 @@ extern int cpu_is_pxa26x(void);
                 __cpu_is_pxa3xx(read_cpuid_id());       \
          })
 
-/*
- * Handy routine to set GPIO alternate functions
- */
-extern int pxa_gpio_mode( int gpio_mode );
-
-/*
- * Return GPIO level, nonzero means high, zero is low
- */
-extern int pxa_gpio_get_value(unsigned gpio);
-
-/*
- * Set output GPIO level
- */
-extern void pxa_gpio_set_value(unsigned gpio, int value);
-
+#define cpu_is_pxa9xx()                                 \
+        ({                                              \
+                __cpu_is_pxa9xx(read_cpuid_id());       \
+         })
 /*
  * return current memory and LCD clock frequency in units of 10kHz
  */
@@ -285,6 +297,8 @@ extern unsigned int get_memclk_frequency_10khz(void);
 #define PCIBIOS_MIN_IO          0
 #define PCIBIOS_MIN_MEM         0
 #define pcibios_assign_all_busses()     1
+#define HAVE_ARCH_PCI_SET_DMA_MASK      1
 #endif
 
+
 #endif  /* _ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-pxa/include/mach/io.h b/arch/arm/mach-pxa/include/mach/io.h
index 600fd4f76603..262691fb97d8 100644
--- a/arch/arm/mach-pxa/include/mach/io.h
+++ b/arch/arm/mach-pxa/include/mach/io.h
@@ -6,15 +6,13 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#include <mach/hardware.h>
-
 #define IO_SPACE_LIMIT 0xffffffff
 
 /*
  * We don't actually have real ISA nor PCI buses, but there is so many
  * drivers out there that might just work if we fake them...
  */
-#define __io(a)                 ((void __iomem *)(a))
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/memory.h b/arch/arm/mach-pxa/include/mach/memory.h
index 59aef89808d6..f626730ee42e 100644
--- a/arch/arm/mach-pxa/include/mach/memory.h
+++ b/arch/arm/mach-pxa/include/mach/memory.h
@@ -18,16 +18,6 @@
 #define PHYS_OFFSET     UL(0xa0000000)
 
 /*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x)         __virt_to_phys(x)
-#define __bus_to_virt(x)         __phys_to_virt(x)
-
-/*
  * The nodes are matched with the physical SDRAM banks as follows:
  *
  *      node 0:  0xa0000000-0xa3ffffff  -->  0xc0000000-0xc3ffffff
@@ -47,6 +37,7 @@ void cmx2xx_pci_adjust_zones(int node, unsigned long *size,
         cmx2xx_pci_adjust_zones(node, size, holes)
 
 #define ISA_DMA_THRESHOLD       (PHYS_OFFSET + SZ_64M - 1)
+#define MAX_DMA_ADDRESS         (PAGE_OFFSET + SZ_64M)
 #endif
 
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
index 617cab2cc8d0..a72869b73ee3 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
@@ -158,4 +158,35 @@
 #define GPIO76_LCD_PCLK         MFP_CFG_OUT(GPIO76, AF2, DRIVE_LOW)
 #define GPIO77_LCD_BIAS         MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW)
 
+#ifdef CONFIG_CPU_PXA26x
+/* GPIO */
+#define GPIO85_GPIO             MFP_CFG_IN(GPIO85, AF0)
+#define GPIO86_GPIO             MFP_CFG_IN(GPIO86, AF1)
+#define GPIO87_GPIO             MFP_CFG_IN(GPIO87, AF1)
+#define GPIO88_GPIO             MFP_CFG_IN(GPIO88, AF1)
+#define GPIO89_GPIO             MFP_CFG_IN(GPIO89, AF1)
+
+/* SDRAM */
+#define GPIO86_nSDCS2           MFP_CFG_OUT(GPIO86, AF0, DRIVE_HIGH)
+#define GPIO87_nSDCS3           MFP_CFG_OUT(GPIO87, AF0, DRIVE_HIGH)
+#define GPIO88_RDnWR            MFP_CFG_OUT(GPIO88, AF0, DRIVE_HIGH)
+#define GPIO89_nACRESET         MFP_CFG_OUT(GPIO89, AF0, DRIVE_HIGH)
+
+/* USB */
+#define GPIO9_USB_RCV           MFP_CFG_IN(GPIO9, AF1)
+#define GPIO32_USB_VP           MFP_CFG_IN(GPIO32, AF2)
+#define GPIO34_USB_VM           MFP_CFG_IN(GPIO34, AF2)
+#define GPIO39_USB_VPO          MFP_CFG_OUT(GPIO39, AF3, DRIVE_LOW)
+#define GPIO56_USB_VMO          MFP_CFG_OUT(GPIO56, AF1, DRIVE_LOW)
+#define GPIO57_USB_nOE          MFP_CFG_OUT(GPIO57, AF1, DRIVE_HIGH)
+
+/* ASSP */
+#define GPIO28_ASSP_BITCLK_IN   MFP_CFG_IN(GPIO28, AF3)
+#define GPIO28_ASSP_BITCLK_OUT  MFP_CFG_OUT(GPIO28, AF3, DRIVE_LOW)
+#define GPIO29_ASSP_RXD         MFP_CFG_IN(GPIO29, AF3)
+#define GPIO30_ASSP_TXD         MFP_CFG_OUT(GPIO30, AF3, DRIVE_LOW)
+#define GPIO31_ASSP_SFRM_IN     MFP_CFG_IN(GPIO31, AF1)
+#define GPIO31_ASSP_SFRM_OUT    MFP_CFG_OUT(GPIO31, AF3, DRIVE_LOW)
+#endif
+
 #endif /* __ASM_ARCH_MFP_PXA25X_H */
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
index 122bdbd53182..da4f85a4f990 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
@@ -11,6 +11,12 @@
 #include <mach/mfp.h>
 #include <mach/mfp-pxa2xx.h>
 
+/* Note: GPIO3/GPIO4 will be driven by Power I2C when PCFR/PI2C_EN
+ * bit is set, regardless of the GPIO configuration
+ */
+#define GPIO3_GPIO              MFP_CFG_IN(GPIO3, AF0)
+#define GPIO4_GPIO              MFP_CFG_IN(GPIO4, AF0)
+
 /* GPIO */
 #define GPIO85_GPIO             MFP_CFG_IN(GPIO85, AF0)
 #define GPIO86_GPIO             MFP_CFG_IN(GPIO86, AF0)
diff --git a/arch/arm/mach-pxa/include/mach/mioa701.h b/arch/arm/mach-pxa/include/mach/mioa701.h
index 8483cb511831..02868447b0b1 100644
--- a/arch/arm/mach-pxa/include/mach/mioa701.h
+++ b/arch/arm/mach-pxa/include/mach/mioa701.h
@@ -10,12 +10,14 @@
          (MFP_PIN(pin) | MFP_##af | MFP_DIR_OUT | MFP_LPM_##state))
 
 /* Global GPIOs */
-#define GPIO9_CHARGE_nEN                        9
+#define GPIO9_CHARGE_EN                         9
 #define GPIO18_POWEROFF                         18
 #define GPIO87_LCD_POWER                        87
+#define GPIO96_AC_DETECT                        96
+#define GPIO80_MAYBE_CHARGE_VDROP               80      /* Drop of 88mV */
 
 /* USB */
-#define GPIO13_USB_DETECT                       13
+#define GPIO13_nUSB_DETECT                      13
 #define GPIO22_USB_ENABLE                       22
 
 /* SDIO bits */
@@ -24,7 +26,10 @@
 #define GPIO91_SDIO_EN                          91
 
 /* Bluetooth */
+#define GPIO14_BT_nACTIVITY                     14
 #define GPIO83_BT_ON                            83
+#define GPIO77_BT_UNKNOWN1                      77
+#define GPIO86_BT_MAYBE_nRESET                  86
 
 /* GPS */
 #define GPIO23_GPS_UNKNOWN1                     23
diff --git a/arch/arm/mach-pxa/include/mach/pxa-regs.h b/arch/arm/mach-pxa/include/mach/pxa-regs.h
index 15295d960000..31d615aa7723 100644
--- a/arch/arm/mach-pxa/include/mach/pxa-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa-regs.h
@@ -13,6 +13,7 @@
 #ifndef __PXA_REGS_H
 #define __PXA_REGS_H
 
+#include <mach/hardware.h>
 
 /*
  * PXA Chip selects
@@ -123,298 +124,6 @@
 #define DCMD_WIDTH4     (3 << 14)       /* 4 byte width (Word) */
 #define DCMD_LENGTH     0x01fff         /* length mask (max = 8K - 1) */
 
-
-/*
- * UARTs
- */
-
-/* Full Function UART (FFUART) */
-#define FFUART          FFRBR
-#define FFRBR           __REG(0x40100000)  /* Receive Buffer Register (read only) */
-#define FFTHR           __REG(0x40100000)  /* Transmit Holding Register (write only) */
-#define FFIER           __REG(0x40100004)  /* Interrupt Enable Register (read/write) */
-#define FFIIR           __REG(0x40100008)  /* Interrupt ID Register (read only) */
-#define FFFCR           __REG(0x40100008)  /* FIFO Control Register (write only) */
-#define FFLCR           __REG(0x4010000C)  /* Line Control Register (read/write) */
-#define FFMCR           __REG(0x40100010)  /* Modem Control Register (read/write) */
-#define FFLSR           __REG(0x40100014)  /* Line Status Register (read only) */
-#define FFMSR           __REG(0x40100018)  /* Modem Status Register (read only) */
-#define FFSPR           __REG(0x4010001C)  /* Scratch Pad Register (read/write) */
-#define FFISR           __REG(0x40100020)  /* Infrared Selection Register (read/write) */
-#define FFDLL           __REG(0x40100000)  /* Divisor Latch Low Register (DLAB = 1) (read/write) */
-#define FFDLH           __REG(0x40100004)  /* Divisor Latch High Register (DLAB = 1) (read/write) */
-
-/* Bluetooth UART (BTUART) */
-#define BTUART          BTRBR
-#define BTRBR           __REG(0x40200000)  /* Receive Buffer Register (read only) */
-#define BTTHR           __REG(0x40200000)  /* Transmit Holding Register (write only) */
-#define BTIER           __REG(0x40200004)  /* Interrupt Enable Register (read/write) */
-#define BTIIR           __REG(0x40200008)  /* Interrupt ID Register (read only) */
-#define BTFCR           __REG(0x40200008)  /* FIFO Control Register (write only) */
-#define BTLCR           __REG(0x4020000C)  /* Line Control Register (read/write) */
-#define BTMCR           __REG(0x40200010)  /* Modem Control Register (read/write) */
-#define BTLSR           __REG(0x40200014)  /* Line Status Register (read only) */
-#define BTMSR           __REG(0x40200018)  /* Modem Status Register (read only) */
-#define BTSPR           __REG(0x4020001C)  /* Scratch Pad Register (read/write) */
-#define BTISR           __REG(0x40200020)  /* Infrared Selection Register (read/write) */
-#define BTDLL           __REG(0x40200000)  /* Divisor Latch Low Register (DLAB = 1) (read/write) */
-#define BTDLH           __REG(0x40200004)  /* Divisor Latch High Register (DLAB = 1) (read/write) */
-
-/* Standard UART (STUART) */
-#define STUART          STRBR
-#define STRBR           __REG(0x40700000)  /* Receive Buffer Register (read only) */
-#define STTHR           __REG(0x40700000)  /* Transmit Holding Register (write only) */
-#define STIER           __REG(0x40700004)  /* Interrupt Enable Register (read/write) */
-#define STIIR           __REG(0x40700008)  /* Interrupt ID Register (read only) */
-#define STFCR           __REG(0x40700008)  /* FIFO Control Register (write only) */
-#define STLCR           __REG(0x4070000C)  /* Line Control Register (read/write) */
-#define STMCR           __REG(0x40700010)  /* Modem Control Register (read/write) */
-#define STLSR           __REG(0x40700014)  /* Line Status Register (read only) */
-#define STMSR           __REG(0x40700018)  /* Reserved */
-#define STSPR           __REG(0x4070001C)  /* Scratch Pad Register (read/write) */
-#define STISR           __REG(0x40700020)  /* Infrared Selection Register (read/write) */
-#define STDLL           __REG(0x40700000)  /* Divisor Latch Low Register (DLAB = 1) (read/write) */
-#define STDLH           __REG(0x40700004)  /* Divisor Latch High Register (DLAB = 1) (read/write) */
-
-/* Hardware UART (HWUART) */
-#define HWUART          HWRBR
-#define HWRBR           __REG(0x41600000)  /* Receive Buffer Register (read only) */
-#define HWTHR           __REG(0x41600000)  /* Transmit Holding Register (write only) */
-#define HWIER           __REG(0x41600004)  /* Interrupt Enable Register (read/write) */
-#define HWIIR           __REG(0x41600008)  /* Interrupt ID Register (read only) */
-#define HWFCR           __REG(0x41600008)  /* FIFO Control Register (write only) */
-#define HWLCR           __REG(0x4160000C)  /* Line Control Register (read/write) */
-#define HWMCR           __REG(0x41600010)  /* Modem Control Register (read/write) */
-#define HWLSR           __REG(0x41600014)  /* Line Status Register (read only) */
-#define HWMSR           __REG(0x41600018)  /* Modem Status Register (read only) */
-#define HWSPR           __REG(0x4160001C)  /* Scratch Pad Register (read/write) */
-#define HWISR           __REG(0x41600020)  /* Infrared Selection Register (read/write) */
-#define HWFOR           __REG(0x41600024)  /* Receive FIFO Occupancy Register (read only) */
-#define HWABR           __REG(0x41600028)  /* Auto-Baud Control Register (read/write) */
-#define HWACR           __REG(0x4160002C)  /* Auto-Baud Count Register (read only) */
-#define HWDLL           __REG(0x41600000)  /* Divisor Latch Low Register (DLAB = 1) (read/write) */
-#define HWDLH           __REG(0x41600004)  /* Divisor Latch High Register (DLAB = 1) (read/write) */
-
-#define IER_DMAE        (1 << 7)        /* DMA Requests Enable */
-#define IER_UUE         (1 << 6)        /* UART Unit Enable */
-#define IER_NRZE        (1 << 5)        /* NRZ coding Enable */
-#define IER_RTIOE       (1 << 4)        /* Receiver Time Out Interrupt Enable */
-#define IER_MIE         (1 << 3)        /* Modem Interrupt Enable */
-#define IER_RLSE        (1 << 2)        /* Receiver Line Status Interrupt Enable */
-#define IER_TIE         (1 << 1)        /* Transmit Data request Interrupt Enable */
-#define IER_RAVIE       (1 << 0)        /* Receiver Data Available Interrupt Enable */
-
-#define IIR_FIFOES1     (1 << 7)        /* FIFO Mode Enable Status */
-#define IIR_FIFOES0     (1 << 6)        /* FIFO Mode Enable Status */
-#define IIR_TOD         (1 << 3)        /* Time Out Detected */
-#define IIR_IID2        (1 << 2)        /* Interrupt Source Encoded */
-#define IIR_IID1        (1 << 1)        /* Interrupt Source Encoded */
-#define IIR_IP          (1 << 0)        /* Interrupt Pending (active low) */
-
-#define FCR_ITL2        (1 << 7)        /* Interrupt Trigger Level */
-#define FCR_ITL1        (1 << 6)        /* Interrupt Trigger Level */
-#define FCR_RESETTF     (1 << 2)        /* Reset Transmitter FIFO */
-#define FCR_RESETRF     (1 << 1)        /* Reset Receiver FIFO */
-#define FCR_TRFIFOE     (1 << 0)        /* Transmit and Receive FIFO Enable */
-#define FCR_ITL_1       (0)
-#define FCR_ITL_8       (FCR_ITL1)
-#define FCR_ITL_16      (FCR_ITL2)
-#define FCR_ITL_32      (FCR_ITL2|FCR_ITL1)
-
-#define LCR_DLAB        (1 << 7)        /* Divisor Latch Access Bit */
-#define LCR_SB          (1 << 6)        /* Set Break */
-#define LCR_STKYP       (1 << 5)        /* Sticky Parity */
-#define LCR_EPS         (1 << 4)        /* Even Parity Select */
-#define LCR_PEN         (1 << 3)        /* Parity Enable */
-#define LCR_STB         (1 << 2)        /* Stop Bit */
-#define LCR_WLS1        (1 << 1)        /* Word Length Select */
-#define LCR_WLS0        (1 << 0)        /* Word Length Select */
-
-#define LSR_FIFOE       (1 << 7)        /* FIFO Error Status */
-#define LSR_TEMT        (1 << 6)        /* Transmitter Empty */
-#define LSR_TDRQ        (1 << 5)        /* Transmit Data Request */
-#define LSR_BI          (1 << 4)        /* Break Interrupt */
-#define LSR_FE          (1 << 3)        /* Framing Error */
-#define LSR_PE          (1 << 2)        /* Parity Error */
-#define LSR_OE          (1 << 1)        /* Overrun Error */
-#define LSR_DR          (1 << 0)        /* Data Ready */
-
-#define MCR_LOOP        (1 << 4)
-#define MCR_OUT2        (1 << 3)        /* force MSR_DCD in loopback mode */
-#define MCR_OUT1        (1 << 2)        /* force MSR_RI in loopback mode */
-#define MCR_RTS         (1 << 1)        /* Request to Send */
-#define MCR_DTR         (1 << 0)        /* Data Terminal Ready */
-
-#define MSR_DCD         (1 << 7)        /* Data Carrier Detect */
-#define MSR_RI          (1 << 6)        /* Ring Indicator */
-#define MSR_DSR         (1 << 5)        /* Data Set Ready */
-#define MSR_CTS         (1 << 4)        /* Clear To Send */
-#define MSR_DDCD        (1 << 3)        /* Delta Data Carrier Detect */
-#define MSR_TERI        (1 << 2)        /* Trailing Edge Ring Indicator */
-#define MSR_DDSR        (1 << 1)        /* Delta Data Set Ready */
-#define MSR_DCTS        (1 << 0)        /* Delta Clear To Send */
-
-/*
- * IrSR (Infrared Selection Register)
- */
-#define STISR_RXPL      (1 << 4)        /* Receive Data Polarity */
-#define STISR_TXPL      (1 << 3)        /* Transmit Data Polarity */
-#define STISR_XMODE     (1 << 2)        /* Transmit Pulse Width Select */
-#define STISR_RCVEIR    (1 << 1)        /* Receiver SIR Enable */
-#define STISR_XMITIR    (1 << 0)        /* Transmitter SIR Enable */
-
-
-/*
- * I2C registers - moved into drivers/i2c/busses/i2c-pxa.c
- */
-
-/*
- * Serial Audio Controller - moved into sound/soc/pxa/pxa2xx-i2s.c
- */
-
-/*
- * AC97 Controller registers
- */
-
-#define POCR            __REG(0x40500000)  /* PCM Out Control Register */
-#define POCR_FEIE       (1 << 3)        /* FIFO Error Interrupt Enable */
-#define POCR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
-
-#define PICR            __REG(0x40500004)  /* PCM In Control Register */
-#define PICR_FEIE       (1 << 3)        /* FIFO Error Interrupt Enable */
-#define PICR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
-
-#define MCCR            __REG(0x40500008)  /* Mic In Control Register */
-#define MCCR_FEIE       (1 << 3)        /* FIFO Error Interrupt Enable */
-#define MCCR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
-
-#define GCR             __REG(0x4050000C)  /* Global Control Register */
-#ifdef CONFIG_PXA3xx
-#define GCR_CLKBPB      (1 << 31)       /* Internal clock enable */
-#endif
-#define GCR_nDMAEN      (1 << 24)       /* non DMA Enable */
-#define GCR_CDONE_IE    (1 << 19)       /* Command Done Interrupt Enable */
-#define GCR_SDONE_IE    (1 << 18)       /* Status Done Interrupt Enable */
-#define GCR_SECRDY_IEN  (1 << 9)        /* Secondary Ready Interrupt Enable */
-#define GCR_PRIRDY_IEN  (1 << 8)        /* Primary Ready Interrupt Enable */
-#define GCR_SECRES_IEN  (1 << 5)        /* Secondary Resume Interrupt Enable */
-#define GCR_PRIRES_IEN  (1 << 4)        /* Primary Resume Interrupt Enable */
-#define GCR_ACLINK_OFF  (1 << 3)        /* AC-link Shut Off */
-#define GCR_WARM_RST    (1 << 2)        /* AC97 Warm Reset */
-#define GCR_COLD_RST    (1 << 1)        /* AC'97 Cold Reset (0 = active) */
-#define GCR_GIE         (1 << 0)        /* Codec GPI Interrupt Enable */
-
-#define POSR            __REG(0x40500010)  /* PCM Out Status Register */
-#define POSR_FIFOE      (1 << 4)        /* FIFO error */
-#define POSR_FSR        (1 << 2)        /* FIFO Service Request */
-
-#define PISR            __REG(0x40500014)  /* PCM In Status Register */
-#define PISR_FIFOE      (1 << 4)        /* FIFO error */
-#define PISR_EOC        (1 << 3)        /* DMA End-of-Chain (exclusive clear) */
-#define PISR_FSR        (1 << 2)        /* FIFO Service Request */
-
-#define MCSR            __REG(0x40500018)  /* Mic In Status Register */
-#define MCSR_FIFOE      (1 << 4)        /* FIFO error */
-#define MCSR_EOC        (1 << 3)        /* DMA End-of-Chain (exclusive clear) */
-#define MCSR_FSR        (1 << 2)        /* FIFO Service Request */
-
-#define GSR             __REG(0x4050001C)  /* Global Status Register */
-#define GSR_CDONE       (1 << 19)       /* Command Done */
-#define GSR_SDONE       (1 << 18)       /* Status Done */
-#define GSR_RDCS        (1 << 15)       /* Read Completion Status */
-#define GSR_BIT3SLT12   (1 << 14)       /* Bit 3 of slot 12 */
-#define GSR_BIT2SLT12   (1 << 13)       /* Bit 2 of slot 12 */
-#define GSR_BIT1SLT12   (1 << 12)       /* Bit 1 of slot 12 */
-#define GSR_SECRES      (1 << 11)       /* Secondary Resume Interrupt */
-#define GSR_PRIRES      (1 << 10)       /* Primary Resume Interrupt */
-#define GSR_SCR         (1 << 9)        /* Secondary Codec Ready */
-#define GSR_PCR         (1 << 8)        /*  Primary Codec Ready */
-#define GSR_MCINT       (1 << 7)        /* Mic In Interrupt */
-#define GSR_POINT       (1 << 6)        /* PCM Out Interrupt */
-#define GSR_PIINT       (1 << 5)        /* PCM In Interrupt */
-#define GSR_ACOFFD      (1 << 3)        /* AC-link Shut Off Done */
-#define GSR_MOINT       (1 << 2)        /* Modem Out Interrupt */
-#define GSR_MIINT       (1 << 1)        /* Modem In Interrupt */
-#define GSR_GSCI        (1 << 0)        /* Codec GPI Status Change Interrupt */
-
-#define CAR             __REG(0x40500020)  /* CODEC Access Register */
-#define CAR_CAIP        (1 << 0)        /* Codec Access In Progress */
-
-#define PCDR            __REG(0x40500040)  /* PCM FIFO Data Register */
-#define MCDR            __REG(0x40500060)  /* Mic-in FIFO Data Register */
-
-#define MOCR            __REG(0x40500100)  /* Modem Out Control Register */
-#define MOCR_FEIE       (1 << 3)        /* FIFO Error */
-#define MOCR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
-
-#define MICR            __REG(0x40500108)  /* Modem In Control Register */
-#define MICR_FEIE       (1 << 3)        /* FIFO Error */
-#define MICR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
-
-#define MOSR            __REG(0x40500110)  /* Modem Out Status Register */
-#define MOSR_FIFOE      (1 << 4)        /* FIFO error */
-#define MOSR_FSR        (1 << 2)        /* FIFO Service Request */
-
-#define MISR            __REG(0x40500118)  /* Modem In Status Register */
-#define MISR_FIFOE      (1 << 4)        /* FIFO error */
-#define MISR_EOC        (1 << 3)        /* DMA End-of-Chain (exclusive clear) */
-#define MISR_FSR        (1 << 2)        /* FIFO Service Request */
-
-#define MODR            __REG(0x40500140)  /* Modem FIFO Data Register */
-
-#define PAC_REG_BASE    __REG(0x40500200)  /* Primary Audio Codec */
-#define SAC_REG_BASE    __REG(0x40500300)  /* Secondary Audio Codec */
-#define PMC_REG_BASE    __REG(0x40500400)  /* Primary Modem Codec */
-#define SMC_REG_BASE    __REG(0x40500500)  /* Secondary Modem Codec */
-
-
-/*
- * Fast Infrared Communication Port
- */
-
-#define FICP            __REG(0x40800000)  /* Start of FICP area */
-#define ICCR0           __REG(0x40800000)  /* ICP Control Register 0 */
-#define ICCR1           __REG(0x40800004)  /* ICP Control Register 1 */
-#define ICCR2           __REG(0x40800008)  /* ICP Control Register 2 */
-#define ICDR            __REG(0x4080000c)  /* ICP Data Register */
-#define ICSR0           __REG(0x40800014)  /* ICP Status Register 0 */
-#define ICSR1           __REG(0x40800018)  /* ICP Status Register 1 */
-
-#define ICCR0_AME       (1 << 7)        /* Address match enable */
-#define ICCR0_TIE       (1 << 6)        /* Transmit FIFO interrupt enable */
-#define ICCR0_RIE       (1 << 5)        /* Recieve FIFO interrupt enable */
-#define ICCR0_RXE       (1 << 4)        /* Receive enable */
-#define ICCR0_TXE       (1 << 3)        /* Transmit enable */
-#define ICCR0_TUS       (1 << 2)        /* Transmit FIFO underrun select */
-#define ICCR0_LBM       (1 << 1)        /* Loopback mode */
-#define ICCR0_ITR       (1 << 0)        /* IrDA transmission */
-
-#define ICCR2_RXP       (1 << 3)        /* Receive Pin Polarity select */
-#define ICCR2_TXP       (1 << 2)        /* Transmit Pin Polarity select */
-#define ICCR2_TRIG      (3 << 0)        /* Receive FIFO Trigger threshold */
-#define ICCR2_TRIG_8    (0 << 0)        /*      >= 8 bytes */
-#define ICCR2_TRIG_16   (1 << 0)        /*      >= 16 bytes */
-#define ICCR2_TRIG_32   (2 << 0)        /*      >= 32 bytes */
-
-#ifdef CONFIG_PXA27x
-#define ICSR0_EOC       (1 << 6)        /* DMA End of Descriptor Chain */
-#endif
-#define ICSR0_FRE       (1 << 5)        /* Framing error */
-#define ICSR0_RFS       (1 << 4)        /* Receive FIFO service request */
-#define ICSR0_TFS       (1 << 3)        /* Transnit FIFO service request */
-#define ICSR0_RAB       (1 << 2)        /* Receiver abort */
-#define ICSR0_TUR       (1 << 1)        /* Trunsmit FIFO underun */
-#define ICSR0_EIF       (1 << 0)        /* End/Error in FIFO */
-
-#define ICSR1_ROR       (1 << 6)        /* Receiver FIFO underrun  */
-#define ICSR1_CRE       (1 << 5)        /* CRC error */
-#define ICSR1_EOF       (1 << 4)        /* End of frame */
-#define ICSR1_TNF       (1 << 3)        /* Transmit FIFO not full */
-#define ICSR1_RNE       (1 << 2)        /* Receive FIFO not empty */
-#define ICSR1_TBY       (1 << 1)        /* Tramsmiter busy flag */
-#define ICSR1_RSY       (1 << 0)        /* Recevier synchronized flag */
-
-
 /*
  * Real Time Clock
  */
@@ -463,19 +172,6 @@
 
 
 /*
- * Pulse Width Modulator
- */
-
-#define PWM_CTRL0       __REG(0x40B00000)  /* PWM 0 Control Register */
-#define PWM_PWDUTY0     __REG(0x40B00004)  /* PWM 0 Duty Cycle Register */
-#define PWM_PERVAL0     __REG(0x40B00008)  /* PWM 0 Period Control Register */
-
-#define PWM_CTRL1       __REG(0x40C00000)  /* PWM 1Control Register */
-#define PWM_PWDUTY1     __REG(0x40C00004)  /* PWM 1 Duty Cycle Register */
-#define PWM_PERVAL1     __REG(0x40C00008)  /* PWM 1 Period Control Register */
-
-
-/*
  * Interrupt Controller
  */
 
@@ -496,19 +192,6 @@
  * General Purpose I/O
  */
 
-#define GPIO0_BASE      ((void __iomem *)io_p2v(0x40E00000))
-#define GPIO1_BASE      ((void __iomem *)io_p2v(0x40E00004))
-#define GPIO2_BASE      ((void __iomem *)io_p2v(0x40E00008))
-#define GPIO3_BASE      ((void __iomem *)io_p2v(0x40E00100))
-
-#define GPLR_OFFSET     0x00
-#define GPDR_OFFSET     0x0C
-#define GPSR_OFFSET     0x18
-#define GPCR_OFFSET     0x24
-#define GRER_OFFSET     0x30
-#define GFER_OFFSET     0x3C
-#define GEDR_OFFSET     0x48
-
 #define GPLR0           __REG(0x40E00000)  /* GPIO Pin-Level Register GPIO<31:0> */
 #define GPLR1           __REG(0x40E00004)  /* GPIO Pin-Level Register GPIO<63:32> */
 #define GPLR2           __REG(0x40E00008)  /* GPIO Pin-Level Register GPIO<80:64> */
@@ -558,10 +241,6 @@
 
 #define GPIO_bit(x)     (1 << ((x) & 0x1f))
 
-#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
-
-/* Interrupt Controller */
-
 #define _GPLR(x)        __REG2(0x40E00000, ((x) & 0x60) >> 3)
 #define _GPDR(x)        __REG2(0x40E0000C, ((x) & 0x60) >> 3)
 #define _GPSR(x)        __REG2(0x40E00018, ((x) & 0x60) >> 3)
@@ -580,189 +259,5 @@
 #define GEDR(x)         (*((((x) & 0x7f) < 96) ? &_GEDR(x) : &GEDR3))
 #define GAFR(x)         (*((((x) & 0x7f) < 96) ? &_GAFR(x) : \
                          ((((x) & 0x7f) < 112) ? &GAFR3_L : &GAFR3_U)))
-#else
-
-#define GPLR(x)         __REG2(0x40E00000, ((x) & 0x60) >> 3)
-#define GPDR(x)         __REG2(0x40E0000C, ((x) & 0x60) >> 3)
-#define GPSR(x)         __REG2(0x40E00018, ((x) & 0x60) >> 3)
-#define GPCR(x)         __REG2(0x40E00024, ((x) & 0x60) >> 3)
-#define GRER(x)         __REG2(0x40E00030, ((x) & 0x60) >> 3)
-#define GFER(x)         __REG2(0x40E0003C, ((x) & 0x60) >> 3)
-#define GEDR(x)         __REG2(0x40E00048, ((x) & 0x60) >> 3)
-#define GAFR(x)         __REG2(0x40E00054, ((x) & 0x70) >> 2)
-
-#endif
-
-/*
- * Power Manager - see pxa2xx-regs.h
- */
-
-/*
- * SSP Serial Port Registers - see arch/arm/mach-pxa/include/mach/regs-ssp.h
- */
-
-/*
- * MultiMediaCard (MMC) controller - see drivers/mmc/host/pxamci.h
- */
-
-/*
- * Core Clock - see arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
- */
-
-#ifdef CONFIG_PXA27x
-
-/* Camera Interface */
-#define CICR0           __REG(0x50000000)
-#define CICR1           __REG(0x50000004)
-#define CICR2           __REG(0x50000008)
-#define CICR3           __REG(0x5000000C)
-#define CICR4           __REG(0x50000010)
-#define CISR            __REG(0x50000014)
-#define CIFR            __REG(0x50000018)
-#define CITOR           __REG(0x5000001C)
-#define CIBR0           __REG(0x50000028)
-#define CIBR1           __REG(0x50000030)
-#define CIBR2           __REG(0x50000038)
-
-#define CICR0_DMAEN     (1 << 31)       /* DMA request enable */
-#define CICR0_PAR_EN    (1 << 30)       /* Parity enable */
-#define CICR0_SL_CAP_EN (1 << 29)       /* Capture enable for slave mode */
-#define CICR0_ENB       (1 << 28)       /* Camera interface enable */
-#define CICR0_DIS       (1 << 27)       /* Camera interface disable */
-#define CICR0_SIM       (0x7 << 24)     /* Sensor interface mode mask */
-#define CICR0_TOM       (1 << 9)        /* Time-out mask */
-#define CICR0_RDAVM     (1 << 8)        /* Receive-data-available mask */
-#define CICR0_FEM       (1 << 7)        /* FIFO-empty mask */
-#define CICR0_EOLM      (1 << 6)        /* End-of-line mask */
-#define CICR0_PERRM     (1 << 5)        /* Parity-error mask */
-#define CICR0_QDM       (1 << 4)        /* Quick-disable mask */
-#define CICR0_CDM       (1 << 3)        /* Disable-done mask */
-#define CICR0_SOFM      (1 << 2)        /* Start-of-frame mask */
-#define CICR0_EOFM      (1 << 1)        /* End-of-frame mask */
-#define CICR0_FOM       (1 << 0)        /* FIFO-overrun mask */
-
-#define CICR1_TBIT      (1 << 31)       /* Transparency bit */
-#define CICR1_RGBT_CONV (0x3 << 29)     /* RGBT conversion mask */
-#define CICR1_PPL       (0x7ff << 15)   /* Pixels per line mask */
-#define CICR1_RGB_CONV  (0x7 << 12)     /* RGB conversion mask */
-#define CICR1_RGB_F     (1 << 11)       /* RGB format */
-#define CICR1_YCBCR_F   (1 << 10)       /* YCbCr format */
-#define CICR1_RGB_BPP   (0x7 << 7)      /* RGB bis per pixel mask */
-#define CICR1_RAW_BPP   (0x3 << 5)      /* Raw bis per pixel mask */
-#define CICR1_COLOR_SP  (0x3 << 3)      /* Color space mask */
-#define CICR1_DW        (0x7 << 0)      /* Data width mask */
-
-#define CICR2_BLW       (0xff << 24)    /* Beginning-of-line pixel clock
-                                           wait count mask */
-#define CICR2_ELW       (0xff << 16)    /* End-of-line pixel clock
-                                           wait count mask */
-#define CICR2_HSW       (0x3f << 10)    /* Horizontal sync pulse width mask */
-#define CICR2_BFPW      (0x3f << 3)     /* Beginning-of-frame pixel clock
-                                           wait count mask */
-#define CICR2_FSW       (0x7 << 0)      /* Frame stabilization
-                                           wait count mask */
-
-#define CICR3_BFW       (0xff << 24)    /* Beginning-of-frame line clock
-                                           wait count mask */
-#define CICR3_EFW       (0xff << 16)    /* End-of-frame line clock
-                                           wait count mask */
-#define CICR3_VSW       (0x3f << 10)    /* Vertical sync pulse width mask */
-#define CICR3_BFPW      (0x3f << 3)     /* Beginning-of-frame pixel clock
-                                           wait count mask */
-#define CICR3_LPF       (0x7ff << 0)    /* Lines per frame mask */
-
-#define CICR4_MCLK_DLY  (0x3 << 24)     /* MCLK Data Capture Delay mask */
-#define CICR4_PCLK_EN   (1 << 23)       /* Pixel clock enable */
-#define CICR4_PCP       (1 << 22)       /* Pixel clock polarity */
-#define CICR4_HSP       (1 << 21)       /* Horizontal sync polarity */
-#define CICR4_VSP       (1 << 20)       /* Vertical sync polarity */
-#define CICR4_MCLK_EN   (1 << 19)       /* MCLK enable */
-#define CICR4_FR_RATE   (0x7 << 8)      /* Frame rate mask */
-#define CICR4_DIV       (0xff << 0)     /* Clock divisor mask */
-
-#define CISR_FTO        (1 << 15)       /* FIFO time-out */
-#define CISR_RDAV_2     (1 << 14)       /* Channel 2 receive data available */
-#define CISR_RDAV_1     (1 << 13)       /* Channel 1 receive data available */
-#define CISR_RDAV_0     (1 << 12)       /* Channel 0 receive data available */
-#define CISR_FEMPTY_2   (1 << 11)       /* Channel 2 FIFO empty */
-#define CISR_FEMPTY_1   (1 << 10)       /* Channel 1 FIFO empty */
-#define CISR_FEMPTY_0   (1 << 9)        /* Channel 0 FIFO empty */
-#define CISR_EOL        (1 << 8)        /* End of line */
-#define CISR_PAR_ERR    (1 << 7)        /* Parity error */
-#define CISR_CQD        (1 << 6)        /* Camera interface quick disable */
-#define CISR_CDD        (1 << 5)        /* Camera interface disable done */
-#define CISR_SOF        (1 << 4)        /* Start of frame */
-#define CISR_EOF        (1 << 3)        /* End of frame */
-#define CISR_IFO_2      (1 << 2)        /* FIFO overrun for Channel 2 */
-#define CISR_IFO_1      (1 << 1)        /* FIFO overrun for Channel 1 */
-#define CISR_IFO_0      (1 << 0)        /* FIFO overrun for Channel 0 */
-
-#define CIFR_FLVL2      (0x7f << 23)    /* FIFO 2 level mask */
-#define CIFR_FLVL1      (0x7f << 16)    /* FIFO 1 level mask */
-#define CIFR_FLVL0      (0xff << 8)     /* FIFO 0 level mask */
-#define CIFR_THL_0      (0x3 << 4)      /* Threshold Level for Channel 0 FIFO */
-#define CIFR_RESET_F    (1 << 3)        /* Reset input FIFOs */
-#define CIFR_FEN2       (1 << 2)        /* FIFO enable for channel 2 */
-#define CIFR_FEN1       (1 << 1)        /* FIFO enable for channel 1 */
-#define CIFR_FEN0       (1 << 0)        /* FIFO enable for channel 0 */
-
-#define SRAM_SIZE               0x40000 /* 4x64K  */
-
-#define SRAM_MEM_PHYS           0x5C000000
-
-#define IMPMCR          __REG(0x58000000) /* IM Power Management Control Reg */
-#define IMPMSR          __REG(0x58000008) /* IM Power Management Status Reg */
-
-#define IMPMCR_PC3              (0x3 << 22) /* Bank 3 Power Control */
-#define IMPMCR_PC3_RUN_MODE     (0x0 << 22) /*   Run mode */
-#define IMPMCR_PC3_STANDBY_MODE (0x1 << 22) /*   Standby mode */
-#define IMPMCR_PC3_AUTO_MODE    (0x3 << 22) /*   Automatically controlled */
-
-#define IMPMCR_PC2              (0x3 << 20) /* Bank 2 Power Control */
-#define IMPMCR_PC2_RUN_MODE     (0x0 << 20) /*   Run mode */
-#define IMPMCR_PC2_STANDBY_MODE (0x1 << 20) /*   Standby mode */
-#define IMPMCR_PC2_AUTO_MODE    (0x3 << 20) /*   Automatically controlled */
-
-#define IMPMCR_PC1              (0x3 << 18) /* Bank 1 Power Control */
-#define IMPMCR_PC1_RUN_MODE     (0x0 << 18) /*   Run mode */
-#define IMPMCR_PC1_STANDBY_MODE (0x1 << 18) /*   Standby mode */
-#define IMPMCR_PC1_AUTO_MODE    (0x3 << 18) /*   Automatically controlled */
-
-#define IMPMCR_PC0              (0x3 << 16) /* Bank 0 Power Control */
-#define IMPMCR_PC0_RUN_MODE     (0x0 << 16) /*   Run mode */
-#define IMPMCR_PC0_STANDBY_MODE (0x1 << 16) /*   Standby mode */
-#define IMPMCR_PC0_AUTO_MODE    (0x3 << 16) /*   Automatically controlled */
-
-#define IMPMCR_AW3              (1 << 11) /* Bank 3 Automatic Wake-up enable */
-#define IMPMCR_AW2              (1 << 10) /* Bank 2 Automatic Wake-up enable */
-#define IMPMCR_AW1              (1 << 9)  /* Bank 1 Automatic Wake-up enable */
-#define IMPMCR_AW0              (1 << 8)  /* Bank 0 Automatic Wake-up enable */
-
-#define IMPMCR_DST              (0xFF << 0) /* Delay Standby Time, ms */
-
-#define IMPMSR_PS3              (0x3 << 6) /* Bank 3 Power Status: */
-#define IMPMSR_PS3_RUN_MODE     (0x0 << 6) /*    Run mode */
-#define IMPMSR_PS3_STANDBY_MODE (0x1 << 6) /*    Standby mode */
-
-#define IMPMSR_PS2              (0x3 << 4) /* Bank 2 Power Status: */
-#define IMPMSR_PS2_RUN_MODE     (0x0 << 4) /*    Run mode */
-#define IMPMSR_PS2_STANDBY_MODE (0x1 << 4) /*    Standby mode */
-
-#define IMPMSR_PS1              (0x3 << 2) /* Bank 1 Power Status: */
-#define IMPMSR_PS1_RUN_MODE     (0x0 << 2) /*    Run mode */
-#define IMPMSR_PS1_STANDBY_MODE (0x1 << 2) /*    Standby mode */
-
-#define IMPMSR_PS0              (0x3 << 0) /* Bank 0 Power Status: */
-#define IMPMSR_PS0_RUN_MODE     (0x0 << 0) /*    Run mode */
-#define IMPMSR_PS0_STANDBY_MODE (0x1 << 0) /*    Standby mode */
-
-#endif
-
-/* PWRMODE register M field values */
-
-#define PWRMODE_IDLE            0x1
-#define PWRMODE_STANDBY         0x2
-#define PWRMODE_SLEEP           0x3
-#define PWRMODE_DEEPSLEEP       0x7
 
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h b/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h
index 6ef1dd09970b..d83393e25273 100644
--- a/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h
+++ b/arch/arm/mach-pxa/include/mach/pxa2xx-gpio.h
@@ -365,4 +365,9 @@
 #define GPIO117_I2CSCL_MD       (117 | GPIO_ALT_FN_1_IN)
 #define GPIO118_I2CSDA_MD       (118 | GPIO_ALT_FN_1_IN)
 
+/*
+ * Handy routine to set GPIO alternate functions
+ */
+extern int pxa_gpio_mode( int gpio_mode );
+
 #endif /* __ASM_ARCH_PXA2XX_GPIO_H */
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
index 806ecfea44bf..77102d695cc7 100644
--- a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
@@ -49,6 +49,11 @@
 #define MECR_NOS        (1 << 0)        /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */
 #define MECR_CIT        (1 << 1)        /* Card Is There: 0 -> no card, 1 -> card inserted */
 
+#define MDCNFG_DE0      (1 << 0)        /* SDRAM Bank 0 Enable */
+#define MDCNFG_DE1      (1 << 1)        /* SDRAM Bank 1 Enable */
+#define MDCNFG_DE2      (1 << 16)       /* SDRAM Bank 2 Enable */
+#define MDCNFG_DE3      (1 << 17)       /* SDRAM Bank 3 Enable */
+
 #define MDREFR_K0DB4    (1 << 29)       /* SDCLK0 Divide by 4 Control/Status */
 #define MDREFR_K2FREE   (1 << 25)       /* SDRAM Free-Running Control */
 #define MDREFR_K1FREE   (1 << 24)       /* SDRAM Free-Running Control */
@@ -243,4 +248,11 @@
 #define OSCC_OON        (1 << 1)        /* 32.768kHz OON (write-once only bit) */
 #define OSCC_OOK        (1 << 0)        /* 32.768kHz OOK (read-only bit) */
 
+/* PWRMODE register M field values */
+
+#define PWRMODE_IDLE            0x1
+#define PWRMODE_STANDBY         0x2
+#define PWRMODE_SLEEP           0x3
+#define PWRMODE_DEEPSLEEP       0x7
+
 #endif
diff --git a/arch/arm/mach-pxa/include/mach/regs-ac97.h b/arch/arm/mach-pxa/include/mach/regs-ac97.h
new file mode 100644
index 000000000000..e41b9d202b8c
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/regs-ac97.h
@@ -0,0 +1,99 @@
+#ifndef __ASM_ARCH_REGS_AC97_H
+#define __ASM_ARCH_REGS_AC97_H
+
+/*
+ * AC97 Controller registers
+ */
+
+#define POCR            __REG(0x40500000)  /* PCM Out Control Register */
+#define POCR_FEIE       (1 << 3)        /* FIFO Error Interrupt Enable */
+#define POCR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
+
+#define PICR            __REG(0x40500004)  /* PCM In Control Register */
+#define PICR_FEIE       (1 << 3)        /* FIFO Error Interrupt Enable */
+#define PICR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
+
+#define MCCR            __REG(0x40500008)  /* Mic In Control Register */
+#define MCCR_FEIE       (1 << 3)        /* FIFO Error Interrupt Enable */
+#define MCCR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
+
+#define GCR             __REG(0x4050000C)  /* Global Control Register */
+#ifdef CONFIG_PXA3xx
+#define GCR_CLKBPB      (1 << 31)       /* Internal clock enable */
+#endif
+#define GCR_nDMAEN      (1 << 24)       /* non DMA Enable */
+#define GCR_CDONE_IE    (1 << 19)       /* Command Done Interrupt Enable */
+#define GCR_SDONE_IE    (1 << 18)       /* Status Done Interrupt Enable */
+#define GCR_SECRDY_IEN  (1 << 9)        /* Secondary Ready Interrupt Enable */
+#define GCR_PRIRDY_IEN  (1 << 8)        /* Primary Ready Interrupt Enable */
+#define GCR_SECRES_IEN  (1 << 5)        /* Secondary Resume Interrupt Enable */
+#define GCR_PRIRES_IEN  (1 << 4)        /* Primary Resume Interrupt Enable */
+#define GCR_ACLINK_OFF  (1 << 3)        /* AC-link Shut Off */
+#define GCR_WARM_RST    (1 << 2)        /* AC97 Warm Reset */
+#define GCR_COLD_RST    (1 << 1)        /* AC'97 Cold Reset (0 = active) */
+#define GCR_GIE         (1 << 0)        /* Codec GPI Interrupt Enable */
+
+#define POSR            __REG(0x40500010)  /* PCM Out Status Register */
+#define POSR_FIFOE      (1 << 4)        /* FIFO error */
+#define POSR_FSR        (1 << 2)        /* FIFO Service Request */
+
+#define PISR            __REG(0x40500014)  /* PCM In Status Register */
+#define PISR_FIFOE      (1 << 4)        /* FIFO error */
+#define PISR_EOC        (1 << 3)        /* DMA End-of-Chain (exclusive clear) */
+#define PISR_FSR        (1 << 2)        /* FIFO Service Request */
+
+#define MCSR            __REG(0x40500018)  /* Mic In Status Register */
+#define MCSR_FIFOE      (1 << 4)        /* FIFO error */
+#define MCSR_EOC        (1 << 3)        /* DMA End-of-Chain (exclusive clear) */
+#define MCSR_FSR        (1 << 2)        /* FIFO Service Request */
+
+#define GSR             __REG(0x4050001C)  /* Global Status Register */
+#define GSR_CDONE       (1 << 19)       /* Command Done */
+#define GSR_SDONE       (1 << 18)       /* Status Done */
+#define GSR_RDCS        (1 << 15)       /* Read Completion Status */
+#define GSR_BIT3SLT12   (1 << 14)       /* Bit 3 of slot 12 */
+#define GSR_BIT2SLT12   (1 << 13)       /* Bit 2 of slot 12 */
+#define GSR_BIT1SLT12   (1 << 12)       /* Bit 1 of slot 12 */
+#define GSR_SECRES      (1 << 11)       /* Secondary Resume Interrupt */
+#define GSR_PRIRES      (1 << 10)       /* Primary Resume Interrupt */
+#define GSR_SCR         (1 << 9)        /* Secondary Codec Ready */
+#define GSR_PCR         (1 << 8)        /*  Primary Codec Ready */
+#define GSR_MCINT       (1 << 7)        /* Mic In Interrupt */
+#define GSR_POINT       (1 << 6)        /* PCM Out Interrupt */
+#define GSR_PIINT       (1 << 5)        /* PCM In Interrupt */
+#define GSR_ACOFFD      (1 << 3)        /* AC-link Shut Off Done */
+#define GSR_MOINT       (1 << 2)        /* Modem Out Interrupt */
+#define GSR_MIINT       (1 << 1)        /* Modem In Interrupt */
+#define GSR_GSCI        (1 << 0)        /* Codec GPI Status Change Interrupt */
+
+#define CAR             __REG(0x40500020)  /* CODEC Access Register */
+#define CAR_CAIP        (1 << 0)        /* Codec Access In Progress */
+
+#define PCDR            __REG(0x40500040)  /* PCM FIFO Data Register */
+#define MCDR            __REG(0x40500060)  /* Mic-in FIFO Data Register */
+
+#define MOCR            __REG(0x40500100)  /* Modem Out Control Register */
+#define MOCR_FEIE       (1 << 3)        /* FIFO Error */
+#define MOCR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
+
+#define MICR            __REG(0x40500108)  /* Modem In Control Register */
+#define MICR_FEIE       (1 << 3)        /* FIFO Error */
+#define MICR_FSRIE      (1 << 1)        /* FIFO Service Request Interrupt Enable */
+
+#define MOSR            __REG(0x40500110)  /* Modem Out Status Register */
+#define MOSR_FIFOE      (1 << 4)        /* FIFO error */
+#define MOSR_FSR        (1 << 2)        /* FIFO Service Request */
+
+#define MISR            __REG(0x40500118)  /* Modem In Status Register */
+#define MISR_FIFOE      (1 << 4)        /* FIFO error */
+#define MISR_EOC        (1 << 3)        /* DMA End-of-Chain (exclusive clear) */
+#define MISR_FSR        (1 << 2)        /* FIFO Service Request */
+
+#define MODR            __REG(0x40500140)  /* Modem FIFO Data Register */
+
+#define PAC_REG_BASE    __REG(0x40500200)  /* Primary Audio Codec */
+#define SAC_REG_BASE    __REG(0x40500300)  /* Secondary Audio Codec */
+#define PMC_REG_BASE    __REG(0x40500400)  /* Primary Modem Codec */
+#define SMC_REG_BASE    __REG(0x40500500)  /* Secondary Modem Codec */
+
+#endif /* __ASM_ARCH_REGS_AC97_H */
diff --git a/arch/arm/mach-pxa/include/mach/regs-uart.h b/arch/arm/mach-pxa/include/mach/regs-uart.h
new file mode 100644
index 000000000000..55aeb7fb72f6
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/regs-uart.h
@@ -0,0 +1,143 @@
+#ifndef __ASM_ARCH_REGS_UART_H
+#define __ASM_ARCH_REGS_UART_H
+
+/*
+ * UARTs
+ */
+
+/* Full Function UART (FFUART) */
+#define FFUART          FFRBR
+#define FFRBR           __REG(0x40100000)  /* Receive Buffer Register (read only) */
+#define FFTHR           __REG(0x40100000)  /* Transmit Holding Register (write only) */
+#define FFIER           __REG(0x40100004)  /* Interrupt Enable Register (read/write) */
+#define FFIIR           __REG(0x40100008)  /* Interrupt ID Register (read only) */
+#define FFFCR           __REG(0x40100008)  /* FIFO Control Register (write only) */
+#define FFLCR           __REG(0x4010000C)  /* Line Control Register (read/write) */
+#define FFMCR           __REG(0x40100010)  /* Modem Control Register (read/write) */
+#define FFLSR           __REG(0x40100014)  /* Line Status Register (read only) */
+#define FFMSR           __REG(0x40100018)  /* Modem Status Register (read only) */
+#define FFSPR           __REG(0x4010001C)  /* Scratch Pad Register (read/write) */
+#define FFISR           __REG(0x40100020)  /* Infrared Selection Register (read/write) */
+#define FFDLL           __REG(0x40100000)  /* Divisor Latch Low Register (DLAB = 1) (read/write) */
+#define FFDLH           __REG(0x40100004)  /* Divisor Latch High Register (DLAB = 1) (read/write) */
+
+/* Bluetooth UART (BTUART) */
+#define BTUART          BTRBR
+#define BTRBR           __REG(0x40200000)  /* Receive Buffer Register (read only) */
+#define BTTHR           __REG(0x40200000)  /* Transmit Holding Register (write only) */
+#define BTIER           __REG(0x40200004)  /* Interrupt Enable Register (read/write) */
+#define BTIIR           __REG(0x40200008)  /* Interrupt ID Register (read only) */
+#define BTFCR           __REG(0x40200008)  /* FIFO Control Register (write only) */
+#define BTLCR           __REG(0x4020000C)  /* Line Control Register (read/write) */
+#define BTMCR           __REG(0x40200010)  /* Modem Control Register (read/write) */
+#define BTLSR           __REG(0x40200014)  /* Line Status Register (read only) */
+#define BTMSR           __REG(0x40200018)  /* Modem Status Register (read only) */
+#define BTSPR           __REG(0x4020001C)  /* Scratch Pad Register (read/write) */
+#define BTISR           __REG(0x40200020)  /* Infrared Selection Register (read/write) */
+#define BTDLL           __REG(0x40200000)  /* Divisor Latch Low Register (DLAB = 1) (read/write) */
+#define BTDLH           __REG(0x40200004)  /* Divisor Latch High Register (DLAB = 1) (read/write) */
+
+/* Standard UART (STUART) */
+#define STUART          STRBR
+#define STRBR           __REG(0x40700000)  /* Receive Buffer Register (read only) */
+#define STTHR           __REG(0x40700000)  /* Transmit Holding Register (write only) */
+#define STIER           __REG(0x40700004)  /* Interrupt Enable Register (read/write) */
+#define STIIR           __REG(0x40700008)  /* Interrupt ID Register (read only) */
+#define STFCR           __REG(0x40700008)  /* FIFO Control Register (write only) */
+#define STLCR           __REG(0x4070000C)  /* Line Control Register (read/write) */
+#define STMCR           __REG(0x40700010)  /* Modem Control Register (read/write) */
+#define STLSR           __REG(0x40700014)  /* Line Status Register (read only) */
+#define STMSR           __REG(0x40700018)  /* Reserved */
+#define STSPR           __REG(0x4070001C)  /* Scratch Pad Register (read/write) */
+#define STISR           __REG(0x40700020)  /* Infrared Selection Register (read/write) */
+#define STDLL           __REG(0x40700000)  /* Divisor Latch Low Register (DLAB = 1) (read/write) */
+#define STDLH           __REG(0x40700004)  /* Divisor Latch High Register (DLAB = 1) (read/write) */
+
+/* Hardware UART (HWUART) */
+#define HWUART          HWRBR
+#define HWRBR           __REG(0x41600000)  /* Receive Buffer Register (read only) */
+#define HWTHR           __REG(0x41600000)  /* Transmit Holding Register (write only) */
+#define HWIER           __REG(0x41600004)  /* Interrupt Enable Register (read/write) */
+#define HWIIR           __REG(0x41600008)  /* Interrupt ID Register (read only) */
+#define HWFCR           __REG(0x41600008)  /* FIFO Control Register (write only) */
+#define HWLCR           __REG(0x4160000C)  /* Line Control Register (read/write) */
+#define HWMCR           __REG(0x41600010)  /* Modem Control Register (read/write) */
+#define HWLSR           __REG(0x41600014)  /* Line Status Register (read only) */
+#define HWMSR           __REG(0x41600018)  /* Modem Status Register (read only) */
+#define HWSPR           __REG(0x4160001C)  /* Scratch Pad Register (read/write) */
+#define HWISR           __REG(0x41600020)  /* Infrared Selection Register (read/write) */
+#define HWFOR           __REG(0x41600024)  /* Receive FIFO Occupancy Register (read only) */
+#define HWABR           __REG(0x41600028)  /* Auto-Baud Control Register (read/write) */
+#define HWACR           __REG(0x4160002C)  /* Auto-Baud Count Register (read only) */
+#define HWDLL           __REG(0x41600000)  /* Divisor Latch Low Register (DLAB = 1) (read/write) */
+#define HWDLH           __REG(0x41600004)  /* Divisor Latch High Register (DLAB = 1) (read/write) */
+
+#define IER_DMAE        (1 << 7)        /* DMA Requests Enable */
+#define IER_UUE         (1 << 6)        /* UART Unit Enable */
+#define IER_NRZE        (1 << 5)        /* NRZ coding Enable */
+#define IER_RTIOE       (1 << 4)        /* Receiver Time Out Interrupt Enable */
+#define IER_MIE         (1 << 3)        /* Modem Interrupt Enable */
+#define IER_RLSE        (1 << 2)        /* Receiver Line Status Interrupt Enable */
+#define IER_TIE         (1 << 1)        /* Transmit Data request Interrupt Enable */
+#define IER_RAVIE       (1 << 0)        /* Receiver Data Available Interrupt Enable */
+
+#define IIR_FIFOES1     (1 << 7)        /* FIFO Mode Enable Status */
+#define IIR_FIFOES0     (1 << 6)        /* FIFO Mode Enable Status */
+#define IIR_TOD         (1 << 3)        /* Time Out Detected */
+#define IIR_IID2        (1 << 2)        /* Interrupt Source Encoded */
+#define IIR_IID1        (1 << 1)        /* Interrupt Source Encoded */
+#define IIR_IP          (1 << 0)        /* Interrupt Pending (active low) */
+
+#define FCR_ITL2        (1 << 7)        /* Interrupt Trigger Level */
+#define FCR_ITL1        (1 << 6)        /* Interrupt Trigger Level */
+#define FCR_RESETTF     (1 << 2)        /* Reset Transmitter FIFO */
+#define FCR_RESETRF     (1 << 1)        /* Reset Receiver FIFO */
+#define FCR_TRFIFOE     (1 << 0)        /* Transmit and Receive FIFO Enable */
+#define FCR_ITL_1       (0)
+#define FCR_ITL_8       (FCR_ITL1)
+#define FCR_ITL_16      (FCR_ITL2)
+#define FCR_ITL_32      (FCR_ITL2|FCR_ITL1)
+
+#define LCR_DLAB        (1 << 7)        /* Divisor Latch Access Bit */
+#define LCR_SB          (1 << 6)        /* Set Break */
+#define LCR_STKYP       (1 << 5)        /* Sticky Parity */
+#define LCR_EPS         (1 << 4)        /* Even Parity Select */
+#define LCR_PEN         (1 << 3)        /* Parity Enable */
+#define LCR_STB         (1 << 2)        /* Stop Bit */
+#define LCR_WLS1        (1 << 1)        /* Word Length Select */
+#define LCR_WLS0        (1 << 0)        /* Word Length Select */
+
+#define LSR_FIFOE       (1 << 7)        /* FIFO Error Status */
+#define LSR_TEMT        (1 << 6)        /* Transmitter Empty */
+#define LSR_TDRQ        (1 << 5)        /* Transmit Data Request */
+#define LSR_BI          (1 << 4)        /* Break Interrupt */
+#define LSR_FE          (1 << 3)        /* Framing Error */
+#define LSR_PE          (1 << 2)        /* Parity Error */
+#define LSR_OE          (1 << 1)        /* Overrun Error */
+#define LSR_DR          (1 << 0)        /* Data Ready */
+
+#define MCR_LOOP        (1 << 4)
+#define MCR_OUT2        (1 << 3)        /* force MSR_DCD in loopback mode */
+#define MCR_OUT1        (1 << 2)        /* force MSR_RI in loopback mode */
+#define MCR_RTS         (1 << 1)        /* Request to Send */
+#define MCR_DTR         (1 << 0)        /* Data Terminal Ready */
+
+#define MSR_DCD         (1 << 7)        /* Data Carrier Detect */
+#define MSR_RI          (1 << 6)        /* Ring Indicator */
+#define MSR_DSR         (1 << 5)        /* Data Set Ready */
+#define MSR_CTS         (1 << 4)        /* Clear To Send */
+#define MSR_DDCD        (1 << 3)        /* Delta Data Carrier Detect */
+#define MSR_TERI        (1 << 2)        /* Trailing Edge Ring Indicator */
+#define MSR_DDSR        (1 << 1)        /* Delta Data Set Ready */
+#define MSR_DCTS        (1 << 0)        /* Delta Clear To Send */
+
+/*
+ * IrSR (Infrared Selection Register)
+ */
+#define STISR_RXPL      (1 << 4)        /* Receive Data Polarity */
+#define STISR_TXPL      (1 << 3)        /* Transmit Data Polarity */
+#define STISR_XMODE     (1 << 2)        /* Transmit Pulse Width Select */
+#define STISR_RCVEIR    (1 << 1)        /* Receiver SIR Enable */
+#define STISR_XMITIR    (1 << 0)        /* Transmitter SIR Enable */
+
+#endif /* __ASM_ARCH_REGS_UART_H */
diff --git a/arch/arm/mach-pxa/include/mach/uncompress.h b/arch/arm/mach-pxa/include/mach/uncompress.h
index 21e3e890af98..a9a4f302b6ef 100644
--- a/arch/arm/mach-pxa/include/mach/uncompress.h
+++ b/arch/arm/mach-pxa/include/mach/uncompress.h
@@ -10,7 +10,7 @@
  */
 
 #include <linux/serial_reg.h>
-#include <mach/pxa-regs.h>
+#include <mach/regs-uart.h>
 #include <asm/mach-types.h>
 
 #define __REG(x)       ((volatile unsigned long *)x)
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index b4d00aba0e31..5609f52e36b1 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -20,6 +20,7 @@
 #include <linux/delay.h>
 #include <linux/platform_device.h>
 #include <linux/clk.h>
+#include <linux/gpio.h>
 #include <linux/spi/spi.h>
 #include <linux/smc91x.h>
 
@@ -36,7 +37,6 @@
 
 #include <mach/pxa-regs.h>
 #include <mach/mfp-pxa300.h>
-#include <mach/gpio.h>
 #include <mach/pxafb.h>
 #include <mach/ssp.h>
 #include <mach/pxa2xx_spi.h>
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 519138bc5f85..bf59cec27def 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -123,6 +123,10 @@ static unsigned long magician_pin_config[] __initdata = {
         GPIO107_GPIO,   /* DS1WM_IRQ */
         GPIO108_GPIO,   /* GSM_READY */
         GPIO115_GPIO,   /* nPEN_IRQ */
+
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
 };
 
 /*
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index f2c7ad8f2b6b..5f224968043c 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -128,6 +128,10 @@ static unsigned long mainstone_pin_config[] = {
         GPIO108_KP_MKOUT_5,
         GPIO96_KP_MKOUT_6,
 
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
+
         /* GPIO */
         GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
 };
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 2061c00c8ead..33626de8cbf6 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -38,12 +38,13 @@ struct gpio_desc {
         unsigned        valid           : 1;
         unsigned        can_wakeup      : 1;
         unsigned        keypad_gpio     : 1;
+        unsigned        dir_inverted    : 1;
         unsigned int    mask; /* bit mask in PWER or PKWR */
+        unsigned int    mux_mask; /* bit mask of muxed gpio bits, 0 if no mux */
         unsigned long   config;
 };
 
 static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1];
-static int gpio_nr;
 
 static unsigned long gpdr_lpm[4];
 
@@ -54,7 +55,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
         int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */
         int shft = (gpio & 0xf) << 1;
         int fn = MFP_AF(c);
-        int dir = c & MFP_DIR_OUT;
+        int is_out = (c & MFP_DIR_OUT) ? 1 : 0;
 
         if (fn > 3)
                 return -EINVAL;
@@ -68,7 +69,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
         else
                 GAFR_U(bank) = gafr;
 
-        if (dir == MFP_DIR_OUT)
+        if (is_out ^ gpio_desc[gpio].dir_inverted)
                 GPDR(gpio) |= mask;
         else
                 GPDR(gpio) &= ~mask;
@@ -77,11 +78,11 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
         switch (c & MFP_LPM_STATE_MASK) {
         case MFP_LPM_DRIVE_HIGH:
                 PGSR(bank) |= mask;
-                dir = MFP_DIR_OUT;
+                is_out = 1;
                 break;
         case MFP_LPM_DRIVE_LOW:
                 PGSR(bank) &= ~mask;
-                dir = MFP_DIR_OUT;
+                is_out = 1;
                 break;
         case MFP_LPM_DEFAULT:
                 break;
@@ -92,7 +93,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
                 break;
         }
 
-        if (dir == MFP_DIR_OUT)
+        if (is_out ^ gpio_desc[gpio].dir_inverted)
                 gpdr_lpm[bank] |= mask;
         else
                 gpdr_lpm[bank] &= ~mask;
@@ -106,7 +107,7 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
                 return -EINVAL;
         }
 
-        if ((c & MFP_LPM_CAN_WAKEUP) && (dir == MFP_DIR_OUT)) {
+        if ((c & MFP_LPM_CAN_WAKEUP) && is_out) {
                 pr_warning("%s: output GPIO%d unable to wakeup\n",
                                 __func__, gpio);
                 return -EINVAL;
@@ -169,7 +170,7 @@ void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
 int gpio_set_wake(unsigned int gpio, unsigned int on)
 {
         struct gpio_desc *d;
-        unsigned long c;
+        unsigned long c, mux_taken;
 
         if (gpio > mfp_to_gpio(MFP_PIN_GPIO127))
                 return -EINVAL;
@@ -183,9 +184,13 @@ int gpio_set_wake(unsigned int gpio, unsigned int on)
         if (d->keypad_gpio)
                 return -EINVAL;
 
+        mux_taken = (PWER & d->mux_mask) & (~d->mask);
+        if (on && mux_taken)
+                return -EBUSY;
+
         if (d->can_wakeup && (c & MFP_LPM_CAN_WAKEUP)) {
                 if (on) {
-                        PWER |= d->mask;
+                        PWER = (PWER & ~d->mux_mask) | d->mask;
 
                         if (c & MFP_LPM_EDGE_RISE)
                                 PRER |= d->mask;
@@ -210,7 +215,7 @@ static void __init pxa25x_mfp_init(void)
 {
         int i;
 
-        for (i = 0; i <= 84; i++)
+        for (i = 0; i <= pxa_last_gpio; i++)
                 gpio_desc[i].valid = 1;
 
         for (i = 0; i <= 15; i++) {
@@ -218,7 +223,11 @@ static void __init pxa25x_mfp_init(void)
                 gpio_desc[i].mask = GPIO_bit(i);
         }
 
-        gpio_nr = 85;
+        /* PXA26x has additional 4 GPIOs (86/87/88/89) which has the
+         * direction bit inverted in GPDR2. See PXA26x DM 4.1.1.
+         */
+        for (i = 86; i <= pxa_last_gpio; i++)
+                gpio_desc[i].dir_inverted = 1;
 }
 #else
 static inline void pxa25x_mfp_init(void) {}
@@ -251,11 +260,27 @@ int keypad_set_wake(unsigned int on)
         return 0;
 }
 
+#define PWER_WEMUX2_GPIO38      (1 << 16)
+#define PWER_WEMUX2_GPIO53      (2 << 16)
+#define PWER_WEMUX2_GPIO40      (3 << 16)
+#define PWER_WEMUX2_GPIO36      (4 << 16)
+#define PWER_WEMUX2_MASK        (7 << 16)
+#define PWER_WEMUX3_GPIO31      (1 << 19)
+#define PWER_WEMUX3_GPIO113     (2 << 19)
+#define PWER_WEMUX3_MASK        (3 << 19)
+
+#define INIT_GPIO_DESC_MUXED(mux, gpio)                         \
+do {                                                            \
+        gpio_desc[(gpio)].can_wakeup = 1;                       \
+        gpio_desc[(gpio)].mask = PWER_ ## mux ## _GPIO ##gpio;  \
+        gpio_desc[(gpio)].mux_mask = PWER_ ## mux ## _MASK;     \
+} while (0)
+
 static void __init pxa27x_mfp_init(void)
 {
         int i, gpio;
 
-        for (i = 0; i <= 120; i++) {
+        for (i = 0; i <= pxa_last_gpio; i++) {
                 /* skip GPIO2, 5, 6, 7, 8, they are not
                  * valid pins allow configuration
                  */
@@ -286,7 +311,12 @@ static void __init pxa27x_mfp_init(void)
         gpio_desc[35].can_wakeup = 1;
         gpio_desc[35].mask = PWER_WE35;
 
-        gpio_nr = 121;
+        INIT_GPIO_DESC_MUXED(WEMUX3, 31);
+        INIT_GPIO_DESC_MUXED(WEMUX3, 113);
+        INIT_GPIO_DESC_MUXED(WEMUX2, 38);
+        INIT_GPIO_DESC_MUXED(WEMUX2, 53);
+        INIT_GPIO_DESC_MUXED(WEMUX2, 40);
+        INIT_GPIO_DESC_MUXED(WEMUX2, 36);
 }
 #else
 static inline void pxa27x_mfp_init(void) {}
@@ -300,7 +330,7 @@ static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
 {
         int i;
 
-        for (i = 0; i <= gpio_to_bank(gpio_nr); i++) {
+        for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
 
                 saved_gafr[0][i] = GAFR_L(i);
                 saved_gafr[1][i] = GAFR_U(i);
@@ -315,7 +345,7 @@ static int pxa2xx_mfp_resume(struct sys_device *d)
 {
         int i;
 
-        for (i = 0; i <= gpio_to_bank(gpio_nr); i++) {
+        for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
                 GAFR_L(i) = saved_gafr[0][i];
                 GAFR_U(i) = saved_gafr[1][i];
                 GPDR(i * 32) = saved_gpdr[i];
@@ -348,7 +378,7 @@ static int __init pxa2xx_mfp_init(void)
                 pxa27x_mfp_init();
 
         /* initialize gafr_run[], pgsr_lpm[] from existing values */
-        for (i = 0; i <= gpio_to_bank(gpio_nr); i++)
+        for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
                 gpdr_lpm[i] = GPDR(i * 32);
 
         return sysdev_class_register(&pxa2xx_mfp_sysclass);
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 782903fe9c6c..2b427e015b6f 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -34,7 +34,7 @@
 #include <linux/irq.h>
 #include <linux/pda_power.h>
 #include <linux/power_supply.h>
-#include <linux/wm97xx.h>
+#include <linux/wm97xx_batt.h>
 #include <linux/mtd/physmap.h>
 
 #include <asm/mach-types.h>
@@ -46,6 +46,9 @@
 #include <mach/mmc.h>
 #include <mach/udc.h>
 #include <mach/pxa27x-udc.h>
+#include <mach/i2c.h>
+#include <mach/camera.h>
+#include <media/soc_camera.h>
 
 #include <mach/mioa701.h>
 
@@ -54,10 +57,11 @@
 
 static unsigned long mioa701_pin_config[] = {
         /* Mio global */
-        MIO_CFG_OUT(GPIO9_CHARGE_nEN, AF0, DRIVE_LOW),
+        MIO_CFG_OUT(GPIO9_CHARGE_EN, AF0, DRIVE_LOW),
         MIO_CFG_OUT(GPIO18_POWEROFF, AF0, DRIVE_LOW),
         MFP_CFG_OUT(GPIO3, AF0, DRIVE_HIGH),
         MFP_CFG_OUT(GPIO4, AF0, DRIVE_HIGH),
+        MIO_CFG_IN(GPIO80_MAYBE_CHARGE_VDROP, AF0),
 
         /* Backlight PWM 0 */
         GPIO16_PWM0_OUT,
@@ -74,7 +78,7 @@ static unsigned long mioa701_pin_config[] = {
         MIO_CFG_OUT(GPIO91_SDIO_EN, AF0, DRIVE_LOW),
 
         /* USB */
-        MIO_CFG_IN(GPIO13_USB_DETECT, AF0),
+        MIO_CFG_IN(GPIO13_nUSB_DETECT, AF0),
         MIO_CFG_OUT(GPIO22_USB_ENABLE, AF0, DRIVE_LOW),
 
         /* LCD */
@@ -98,12 +102,29 @@ static unsigned long mioa701_pin_config[] = {
         GPIO75_LCD_LCLK,
         GPIO76_LCD_PCLK,
 
+        /* QCI */
+        GPIO12_CIF_DD_7,
+        GPIO17_CIF_DD_6,
+        GPIO50_CIF_DD_3,
+        GPIO51_CIF_DD_2,
+        GPIO52_CIF_DD_4,
+        GPIO53_CIF_MCLK,
+        GPIO54_CIF_PCLK,
+        GPIO55_CIF_DD_1,
+        GPIO81_CIF_DD_0,
+        GPIO82_CIF_DD_5,
+        GPIO84_CIF_FV,
+        GPIO85_CIF_LV,
+
         /* Bluetooth */
+        MIO_CFG_IN(GPIO14_BT_nACTIVITY, AF0),
         GPIO44_BTUART_CTS,
         GPIO42_BTUART_RXD,
         GPIO45_BTUART_RTS,
         GPIO43_BTUART_TXD,
         MIO_CFG_OUT(GPIO83_BT_ON, AF0, DRIVE_LOW),
+        MIO_CFG_OUT(GPIO77_BT_UNKNOWN1, AF0, DRIVE_HIGH),
+        MIO_CFG_OUT(GPIO86_BT_MAYBE_nRESET, AF0, DRIVE_HIGH),
 
         /* GPS */
         MIO_CFG_OUT(GPIO23_GPS_UNKNOWN1, AF0, DRIVE_LOW),
@@ -151,16 +172,16 @@ static unsigned long mioa701_pin_config[] = {
         GPIO104_KP_MKOUT_1,
         GPIO105_KP_MKOUT_2,
 
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
+
         /* Unknown */
-        MFP_CFG_IN(GPIO14, AF0),
         MFP_CFG_IN(GPIO20, AF0),
         MFP_CFG_IN(GPIO21, AF0),
         MFP_CFG_IN(GPIO33, AF0),
         MFP_CFG_OUT(GPIO49, AF0, DRIVE_HIGH),
         MFP_CFG_OUT(GPIO57, AF0, DRIVE_HIGH),
-        MFP_CFG_OUT(GPIO77, AF0, DRIVE_HIGH),
-        MFP_CFG_IN(GPIO80, AF0),
-        MFP_CFG_OUT(GPIO86, AF0, DRIVE_HIGH),
         MFP_CFG_IN(GPIO96, AF0),
         MFP_CFG_OUT(GPIO116, AF0, DRIVE_HIGH),
 };
@@ -407,7 +428,7 @@ static void udc_power_command(int cmd)
 
 static int is_usb_connected(void)
 {
-        return !!gpio_get_value(GPIO13_USB_DETECT);
+        return !gpio_get_value(GPIO13_nUSB_DETECT);
 }
 
 static struct pxa2xx_udc_mach_info mioa701_udc_info = {
@@ -659,13 +680,19 @@ static char *supplicants[] = {
         "mioa701_battery"
 };
 
+static int is_ac_connected(void)
+{
+        return gpio_get_value(GPIO96_AC_DETECT);
+}
+
 static void mioa701_set_charge(int flags)
 {
-        gpio_set_value(GPIO9_CHARGE_nEN, !flags);
+        gpio_set_value(GPIO9_CHARGE_EN, (flags == PDA_POWER_CHARGE_USB));
 }
 
 static struct pda_power_pdata power_pdata = {
-        .is_ac_online   = is_usb_connected,
+        .is_ac_online   = is_ac_connected,
+        .is_usb_online  = is_usb_connected,
         .set_charge = mioa701_set_charge,
         .supplied_to = supplicants,
         .num_supplicants = ARRAY_SIZE(supplicants),
@@ -674,8 +701,15 @@ static struct pda_power_pdata power_pdata = {
 static struct resource power_resources[] = {
         [0] = {
                 .name   = "ac",
-                .start  = gpio_to_irq(GPIO13_USB_DETECT),
-                .end    = gpio_to_irq(GPIO13_USB_DETECT),
+                .start  = gpio_to_irq(GPIO96_AC_DETECT),
+                .end    = gpio_to_irq(GPIO96_AC_DETECT),
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
+                IORESOURCE_IRQ_LOWEDGE,
+        },
+        [1] = {
+                .name   = "usb",
+                .start  = gpio_to_irq(GPIO13_nUSB_DETECT),
+                .end    = gpio_to_irq(GPIO13_nUSB_DETECT),
                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
                 IORESOURCE_IRQ_LOWEDGE,
         },
@@ -691,120 +725,43 @@ static struct platform_device power_dev = {
         },
 };
 
-#if defined(CONFIG_PDA_POWER) && defined(CONFIG_TOUCHSCREEN_WM97XX)
-static struct wm97xx *battery_wm;
-
-static enum power_supply_property battery_props[] = {
-        POWER_SUPPLY_PROP_STATUS,
-        POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,
-        POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
-        POWER_SUPPLY_PROP_VOLTAGE_NOW,
-        POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,   /* Necessary for apm */
+static struct wm97xx_batt_info mioa701_battery_data = {
+        .batt_aux       = WM97XX_AUX_ID1,
+        .temp_aux       = -1,
+        .charge_gpio    = -1,
+        .min_voltage    = 0xc00,
+        .max_voltage    = 0xfc0,
+        .batt_tech      = POWER_SUPPLY_TECHNOLOGY_LION,
+        .batt_div       = 1,
+        .batt_mult      = 1,
+        .batt_name      = "mioa701_battery",
 };
 
-static int get_battery_voltage(void)
-{
-        int adc = -1;
-
-        if (battery_wm)
-                adc = wm97xx_read_aux_adc(battery_wm, WM97XX_AUX_ID1);
-        return adc;
-}
-
-static int get_battery_status(struct power_supply *b)
-{
-        int status;
-
-        if (is_usb_connected())
-                status = POWER_SUPPLY_STATUS_CHARGING;
-        else
-                status = POWER_SUPPLY_STATUS_DISCHARGING;
-
-        return status;
-}
-
-static int get_property(struct power_supply *b,
-                        enum power_supply_property psp,
-                        union power_supply_propval *val)
-{
-        int rc = 0;
-
-        switch (psp) {
-        case POWER_SUPPLY_PROP_STATUS:
-                val->intval = get_battery_status(b);
-                break;
-        case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN:
-                val->intval = 0xfd0;
-                break;
-        case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
-                val->intval = 0xc00;
-                break;
-        case POWER_SUPPLY_PROP_VOLTAGE_NOW:
-                val->intval = get_battery_voltage();
-                break;
-        case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
-                val->intval = 100;
-                break;
-        default:
-                val->intval = -1;
-                rc = -1;
-        }
-
-        return rc;
+/*
+ * Camera interface
+ */
+struct pxacamera_platform_data mioa701_pxacamera_platform_data = {
+        .flags  = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 |
+                PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN,
+        .mclk_10khz = 5000,
 };
 
-static struct power_supply battery_ps = {
-        .name = "mioa701_battery",
-        .type = POWER_SUPPLY_TYPE_BATTERY,
-        .get_property = get_property,
-        .properties = battery_props,
-        .num_properties = ARRAY_SIZE(battery_props),
+static struct soc_camera_link iclink = {
+        .bus_id = 0, /* Must match id in pxa27x_device_camera in device.c */
 };
 
-static int battery_probe(struct platform_device *pdev)
-{
-        struct wm97xx *wm = platform_get_drvdata(pdev);
-        int rc;
-
-        battery_wm = wm;
-
-        rc = power_supply_register(NULL, &battery_ps);
-        if (rc)
-                dev_err(&pdev->dev,
-                "Could not register mioa701 battery -> %d\n", rc);
-        return rc;
-}
-
-static int battery_remove(struct platform_device *pdev)
-{
-        battery_wm = NULL;
-        return 0;
-}
-
-static struct platform_driver mioa701_battery_driver = {
-        .driver = {
-                .name = "wm97xx-battery",
+/* Board I2C devices. */
+static struct i2c_board_info __initdata mioa701_i2c_devices[] = {
+        {
+                /* Must initialize before the camera(s) */
+                I2C_BOARD_INFO("mt9m111", 0x5d),
+                .platform_data = &iclink,
         },
-        .probe = battery_probe,
-        .remove = battery_remove
 };
 
-static int __init mioa701_battery_init(void)
-{
-        int rc;
-
-        rc = platform_driver_register(&mioa701_battery_driver);
-        if (rc)
-                printk(KERN_ERR "Could not register mioa701 battery driver\n");
-        return rc;
-}
-
-#else
-static int __init mioa701_battery_init(void)
-{
-        return 0;
-}
-#endif
+struct i2c_pxa_platform_data i2c_pdata = {
+        .fast_mode = 1,
+};
 
 /*
  * Mio global
@@ -851,17 +808,17 @@ static void mioa701_machine_exit(void);
 static void mioa701_poweroff(void)
 {
         mioa701_machine_exit();
-        gpio_set_value(GPIO18_POWEROFF, 1);
+        arm_machine_restart('s');
 }
 
 static void mioa701_restart(char c)
 {
         mioa701_machine_exit();
-        arm_machine_restart(c);
+        arm_machine_restart('s');
 }
 
 struct gpio_ress global_gpios[] = {
-        MIO_GPIO_OUT(GPIO9_CHARGE_nEN, 1, "Charger enable"),
+        MIO_GPIO_OUT(GPIO9_CHARGE_EN, 1, "Charger enable"),
         MIO_GPIO_OUT(GPIO18_POWEROFF, 0, "Power Off"),
         MIO_GPIO_OUT(GPIO87_LCD_POWER, 0, "LCD Power")
 };
@@ -879,12 +836,16 @@ static void __init mioa701_machine_init(void)
         set_pxa_fb_info(&mioa701_pxafb_info);
         pxa_set_mci_info(&mioa701_mci_info);
         pxa_set_keypad_info(&mioa701_keypad_info);
+        wm97xx_bat_set_pdata(&mioa701_battery_data);
         udc_init();
         pm_power_off = mioa701_poweroff;
         arm_pm_restart = mioa701_restart;
         platform_add_devices(devices, ARRAY_SIZE(devices));
         gsm_init();
-        mioa701_battery_init();
+
+        pxa_set_i2c_info(&i2c_pdata);
+        pxa_set_camera_info(&mioa701_pxacamera_platform_data);
+        i2c_register_board_info(0, ARRAY_AND_SIZE(mioa701_i2c_devices));
 }
 
 static void mioa701_machine_exit(void)
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index b36cec5c9eed..3ea01e0eac63 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -55,6 +55,10 @@ static unsigned long pcm990_pin_config[] __initdata = {
         GPIO89_USBH1_PEN,
         /* PWM0 */
         GPIO16_PWM0_OUT,
+
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
 };
 
 /*
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 2e3bd8b1523b..ae88855bf974 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -20,6 +20,7 @@
 #include <linux/fb.h>
 #include <linux/pm.h>
 #include <linux/delay.h>
+#include <linux/mtd/physmap.h>
 #include <linux/gpio.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
@@ -413,9 +414,40 @@ static struct pxafb_mach_info poodle_fb_info = {
         .lcd_conn       = LCD_COLOR_TFT_16BPP,
 };
 
+static struct mtd_partition sharpsl_rom_parts[] = {
+        {
+                .name   ="Boot PROM Filesystem",
+                .offset = 0x00120000,
+                .size   = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data sharpsl_rom_data = {
+        .width          = 2,
+        .nr_parts       = ARRAY_SIZE(sharpsl_rom_parts),
+        .parts          = sharpsl_rom_parts,
+};
+
+static struct resource sharpsl_rom_resources[] = {
+        {
+                .start  = 0x00000000,
+                .end    = 0x007fffff,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device sharpsl_rom_device = {
+        .name   = "physmap-flash",
+        .id     = -1,
+        .resource = sharpsl_rom_resources,
+        .num_resources = ARRAY_SIZE(sharpsl_rom_resources),
+        .dev.platform_data = &sharpsl_rom_data,
+};
+
 static struct platform_device *devices[] __initdata = {
         &poodle_locomo_device,
         &poodle_scoop_device,
+        &sharpsl_rom_device,
 };
 
 static void poodle_poweroff(void)
diff --git a/arch/arm/mach-pxa/pwm.c b/arch/arm/mach-pxa/pwm.c
index 74e2ead8cee8..3ca7ffc6904b 100644
--- a/arch/arm/mach-pxa/pwm.c
+++ b/arch/arm/mach-pxa/pwm.c
@@ -173,7 +173,7 @@ static struct pwm_device *pwm_probe(struct platform_device *pdev,
                 return ERR_PTR(-ENOMEM);
         }
 
-        pwm->clk = clk_get(&pdev->dev, "PWMCLK");
+        pwm->clk = clk_get(&pdev->dev, NULL);
         if (IS_ERR(pwm->clk)) {
                 ret = PTR_ERR(pwm->clk);
                 goto err_free;
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 25d17a1dab78..6c57522e2469 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -36,12 +36,6 @@
 #include "devices.h"
 #include "clock.h"
 
-int cpu_is_pxa26x(void)
-{
-        return cpu_is_pxa250() && ((BOOT_DEF & 0x8) == 0);
-}
-EXPORT_SYMBOL_GPL(cpu_is_pxa26x);
-
 /*
  * Various clock factors driven by the CCCR register.
  */
@@ -167,36 +161,51 @@ static const struct clkops clk_pxa25x_gpio11_ops = {
  * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
  * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly)
  */
-static struct clk pxa25x_hwuart_clk =
-        INIT_CKEN("UARTCLK", HWUART, 14745600, 1, &pxa_device_hwuart.dev)
-;
+static DEFINE_CKEN(pxa25x_hwuart, HWUART, 14745600, 1);
+
+static struct clk_lookup pxa25x_hwuart_clkreg =
+        INIT_CLKREG(&clk_pxa25x_hwuart, "pxa2xx-uart.3", NULL);
 
 /*
  * PXA 2xx clock declarations.
  */
-static struct clk pxa25x_clks[] = {
-        INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops, &pxa_device_fb.dev),
-        INIT_CKEN("UARTCLK", FFUART, 14745600, 1, &pxa_device_ffuart.dev),
-        INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev),
-        INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL),
-        INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa25x_device_udc.dev),
-        INIT_CLK("GPIO11_CLK", &clk_pxa25x_gpio11_ops, 3686400, 0, NULL),
-        INIT_CLK("GPIO12_CLK", &clk_pxa25x_gpio12_ops, 32768, 0, NULL),
-        INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev),
-        INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev),
-
-        INIT_CKEN("SSPCLK",  SSP, 3686400, 0, &pxa25x_device_ssp.dev),
-        INIT_CKEN("SSPCLK", NSSP, 3686400, 0, &pxa25x_device_nssp.dev),
-        INIT_CKEN("SSPCLK", ASSP, 3686400, 0, &pxa25x_device_assp.dev),
-        INIT_CKEN("PWMCLK", PWM0, 3686400, 0, &pxa25x_device_pwm0.dev),
-        INIT_CKEN("PWMCLK", PWM1, 3686400, 0, &pxa25x_device_pwm1.dev),
-
-        INIT_CKEN("AC97CLK",     AC97,     24576000, 0, NULL),
-
-        /*
-        INIT_CKEN("I2SCLK",  I2S,  14745600, 0, NULL),
-        */
-        INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL),
+static DEFINE_CK(pxa25x_lcd, LCD, &clk_pxa25x_lcd_ops);
+static DEFINE_CKEN(pxa25x_ffuart, FFUART, 14745600, 1);
+static DEFINE_CKEN(pxa25x_btuart, BTUART, 14745600, 1);
+static DEFINE_CKEN(pxa25x_stuart, STUART, 14745600, 1);
+static DEFINE_CKEN(pxa25x_usb, USB, 47923000, 5);
+static DEFINE_CLK(pxa25x_gpio11, &clk_pxa25x_gpio11_ops, 3686400, 0);
+static DEFINE_CLK(pxa25x_gpio12, &clk_pxa25x_gpio12_ops, 32768, 0);
+static DEFINE_CKEN(pxa25x_mmc, MMC, 19169000, 0);
+static DEFINE_CKEN(pxa25x_i2c, I2C, 31949000, 0);
+static DEFINE_CKEN(pxa25x_ssp, SSP, 3686400, 0);
+static DEFINE_CKEN(pxa25x_nssp, NSSP, 3686400, 0);
+static DEFINE_CKEN(pxa25x_assp, ASSP, 3686400, 0);
+static DEFINE_CKEN(pxa25x_pwm0, PWM0, 3686400, 0);
+static DEFINE_CKEN(pxa25x_pwm1, PWM1, 3686400, 0);
+static DEFINE_CKEN(pxa25x_ac97, AC97, 24576000, 0);
+static DEFINE_CKEN(pxa25x_i2s, I2S, 14745600, 0);
+static DEFINE_CKEN(pxa25x_ficp, FICP, 47923000, 0);
+
+static struct clk_lookup pxa25x_clkregs[] = {
+        INIT_CLKREG(&clk_pxa25x_lcd, "pxa2xx-fb", NULL),
+        INIT_CLKREG(&clk_pxa25x_ffuart, "pxa2xx-uart.0", NULL),
+        INIT_CLKREG(&clk_pxa25x_btuart, "pxa2xx-uart.1", NULL),
+        INIT_CLKREG(&clk_pxa25x_stuart, "pxa2xx-uart.2", NULL),
+        INIT_CLKREG(&clk_pxa25x_usb, "pxa25x-udc", NULL),
+        INIT_CLKREG(&clk_pxa25x_mmc, "pxa2xx-mci.0", NULL),
+        INIT_CLKREG(&clk_pxa25x_i2c, "pxa2xx-i2c.0", NULL),
+        INIT_CLKREG(&clk_pxa25x_ssp, "pxa25x-ssp.0", NULL),
+        INIT_CLKREG(&clk_pxa25x_nssp, "pxa25x-nssp.1", NULL),
+        INIT_CLKREG(&clk_pxa25x_assp, "pxa25x-nssp.2", NULL),
+        INIT_CLKREG(&clk_pxa25x_pwm0, "pxa25x-pwm.0", NULL),
+        INIT_CLKREG(&clk_pxa25x_pwm1, "pxa25x-pwm.1", NULL),
+        INIT_CLKREG(&clk_pxa25x_i2s, "pxa2xx-i2s", NULL),
+        INIT_CLKREG(&clk_pxa25x_stuart, "pxa2xx-ir", "UARTCLK"),
+        INIT_CLKREG(&clk_pxa25x_ficp, "pxa2xx-ir", "FICPCLK"),
+        INIT_CLKREG(&clk_pxa25x_ac97, NULL, "AC97CLK"),
+        INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
+        INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
 };
 
 #ifdef CONFIG_PM
@@ -304,13 +313,21 @@ void __init pxa25x_init_irq(void)
         pxa_init_gpio(85, pxa25x_set_wake);
 }
 
+#ifdef CONFIG_CPU_PXA26x
+void __init pxa26x_init_irq(void)
+{
+        pxa_init_irq(32, pxa25x_set_wake);
+        pxa_init_gpio(90, pxa25x_set_wake);
+}
+#endif
+
 static struct platform_device *pxa25x_devices[] __initdata = {
         &pxa25x_device_udc,
         &pxa_device_ffuart,
         &pxa_device_btuart,
         &pxa_device_stuart,
         &pxa_device_i2s,
-        &pxa_device_rtc,
+        &sa1100_device_rtc,
         &pxa25x_device_ssp,
         &pxa25x_device_nssp,
         &pxa25x_device_assp,
@@ -336,7 +353,7 @@ static int __init pxa25x_init(void)
 
                 reset_status = RCSR;
 
-                clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks));
+                clks_register(pxa25x_clkregs, ARRAY_SIZE(pxa25x_clkregs));
 
                 if ((ret = pxa_init_dma(16)))
                         return ret;
@@ -356,8 +373,8 @@ static int __init pxa25x_init(void)
         }
 
         /* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */
-        if (cpu_is_pxa255() || cpu_is_pxa26x()) {
-                clks_register(&pxa25x_hwuart_clk, 1);
+        if (cpu_is_pxa255()) {
+                clks_register(&pxa25x_hwuart_clkreg, 1);
                 ret = platform_device_register(&pxa_device_hwuart);
         }
 
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 3e4ab2279c99..411bec54fdc4 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -144,40 +144,59 @@ static const struct clkops clk_pxa27x_lcd_ops = {
         .getrate        = clk_pxa27x_lcd_getrate,
 };
 
-static struct clk pxa27x_clks[] = {
-        INIT_CK("LCDCLK", LCD,    &clk_pxa27x_lcd_ops, &pxa_device_fb.dev),
-        INIT_CK("CAMCLK", CAMERA, &clk_pxa27x_lcd_ops, NULL),
-
-        INIT_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev),
-        INIT_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev),
-        INIT_CKEN("UARTCLK", STUART, 14857000, 1, NULL),
-
-        INIT_CKEN("I2SCLK",  I2S,  14682000, 0, &pxa_device_i2s.dev),
-        INIT_CKEN("I2CCLK",  I2C,  32842000, 0, &pxa_device_i2c.dev),
-        INIT_CKEN("UDCCLK",  USB,  48000000, 5, &pxa27x_device_udc.dev),
-        INIT_CKEN("MMCCLK",  MMC,  19500000, 0, &pxa_device_mci.dev),
-        INIT_CKEN("FICPCLK", FICP, 48000000, 0, &pxa_device_ficp.dev),
-
-        INIT_CKEN("USBCLK", USBHOST, 48000000, 0, &pxa27x_device_ohci.dev),
-        INIT_CKEN("I2CCLK", PWRI2C, 13000000, 0, &pxa27x_device_i2c_power.dev),
-        INIT_CKEN("KBDCLK", KEYPAD, 32768, 0, &pxa27x_device_keypad.dev),
-
-        INIT_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev),
-        INIT_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev),
-        INIT_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev),
-        INIT_CKEN("PWMCLK", PWM0, 13000000, 0, &pxa27x_device_pwm0.dev),
-        INIT_CKEN("PWMCLK", PWM1, 13000000, 0, &pxa27x_device_pwm1.dev),
-
-        INIT_CKEN("AC97CLK",     AC97,     24576000, 0, NULL),
-        INIT_CKEN("AC97CONFCLK", AC97CONF, 24576000, 0, NULL),
-
-        /*
-        INIT_CKEN("MSLCLK",  MSL,  48000000, 0, NULL),
-        INIT_CKEN("USIMCLK", USIM, 48000000, 0, NULL),
-        INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0, NULL),
-        INIT_CKEN("IMCLK",   IM,   0, 0, NULL),
-        INIT_CKEN("MEMCLK",  MEMC, 0, 0, NULL),
-        */
+static DEFINE_CK(pxa27x_lcd, LCD, &clk_pxa27x_lcd_ops);
+static DEFINE_CK(pxa27x_camera, CAMERA, &clk_pxa27x_lcd_ops);
+static DEFINE_CKEN(pxa27x_ffuart, FFUART, 14857000, 1);
+static DEFINE_CKEN(pxa27x_btuart, BTUART, 14857000, 1);
+static DEFINE_CKEN(pxa27x_stuart, STUART, 14857000, 1);
+static DEFINE_CKEN(pxa27x_i2s, I2S, 14682000, 0);
+static DEFINE_CKEN(pxa27x_i2c, I2C, 32842000, 0);
+static DEFINE_CKEN(pxa27x_usb, USB, 48000000, 5);
+static DEFINE_CKEN(pxa27x_mmc, MMC, 19500000, 0);
+static DEFINE_CKEN(pxa27x_ficp, FICP, 48000000, 0);
+static DEFINE_CKEN(pxa27x_usbhost, USBHOST, 48000000, 0);
+static DEFINE_CKEN(pxa27x_pwri2c, PWRI2C, 13000000, 0);
+static DEFINE_CKEN(pxa27x_keypad, KEYPAD, 32768, 0);
+static DEFINE_CKEN(pxa27x_ssp1, SSP1, 13000000, 0);
+static DEFINE_CKEN(pxa27x_ssp2, SSP2, 13000000, 0);
+static DEFINE_CKEN(pxa27x_ssp3, SSP3, 13000000, 0);
+static DEFINE_CKEN(pxa27x_pwm0, PWM0, 13000000, 0);
+static DEFINE_CKEN(pxa27x_pwm1, PWM1, 13000000, 0);
+static DEFINE_CKEN(pxa27x_ac97, AC97, 24576000, 0);
+static DEFINE_CKEN(pxa27x_ac97conf, AC97CONF, 24576000, 0);
+static DEFINE_CKEN(pxa27x_msl, MSL, 48000000, 0);
+static DEFINE_CKEN(pxa27x_usim, USIM, 48000000, 0);
+static DEFINE_CKEN(pxa27x_memstk, MEMSTK, 19500000, 0);
+static DEFINE_CKEN(pxa27x_im, IM, 0, 0);
+static DEFINE_CKEN(pxa27x_memc, MEMC, 0, 0);
+
+static struct clk_lookup pxa27x_clkregs[] = {
+        INIT_CLKREG(&clk_pxa27x_lcd, "pxa2xx-fb", NULL),
+        INIT_CLKREG(&clk_pxa27x_camera, "pxa27x-camera.0", NULL),
+        INIT_CLKREG(&clk_pxa27x_ffuart, "pxa2xx-uart.0", NULL),
+        INIT_CLKREG(&clk_pxa27x_btuart, "pxa2xx-uart.1", NULL),
+        INIT_CLKREG(&clk_pxa27x_stuart, "pxa2xx-uart.2", NULL),
+        INIT_CLKREG(&clk_pxa27x_i2s, "pxa2xx-i2s", NULL),
+        INIT_CLKREG(&clk_pxa27x_i2c, "pxa2xx-i2c.0", NULL),
+        INIT_CLKREG(&clk_pxa27x_usb, "pxa27x-udc", NULL),
+        INIT_CLKREG(&clk_pxa27x_mmc, "pxa2xx-mci.0", NULL),
+        INIT_CLKREG(&clk_pxa27x_stuart, "pxa2xx-ir", "UARTCLK"),
+        INIT_CLKREG(&clk_pxa27x_ficp, "pxa2xx-ir", "FICPCLK"),
+        INIT_CLKREG(&clk_pxa27x_usbhost, "pxa27x-ohci", NULL),
+        INIT_CLKREG(&clk_pxa27x_pwri2c, "pxa2xx-i2c.1", NULL),
+        INIT_CLKREG(&clk_pxa27x_keypad, "pxa27x-keypad", NULL),
+        INIT_CLKREG(&clk_pxa27x_ssp1, "pxa27x-ssp.0", NULL),
+        INIT_CLKREG(&clk_pxa27x_ssp2, "pxa27x-ssp.1", NULL),
+        INIT_CLKREG(&clk_pxa27x_ssp3, "pxa27x-ssp.2", NULL),
+        INIT_CLKREG(&clk_pxa27x_pwm0, "pxa27x-pwm.0", NULL),
+        INIT_CLKREG(&clk_pxa27x_pwm1, "pxa27x-pwm.1", NULL),
+        INIT_CLKREG(&clk_pxa27x_ac97, NULL, "AC97CLK"),
+        INIT_CLKREG(&clk_pxa27x_ac97conf, NULL, "AC97CONFCLK"),
+        INIT_CLKREG(&clk_pxa27x_msl, NULL, "MSLCLK"),
+        INIT_CLKREG(&clk_pxa27x_usim, NULL, "USIMCLK"),
+        INIT_CLKREG(&clk_pxa27x_memstk, NULL, "MSTKCLK"),
+        INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
+        INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
 };
 
 #ifdef CONFIG_PM
@@ -313,38 +332,18 @@ static int pxa27x_set_wake(unsigned int irq, unsigned int on)
 void __init pxa27x_init_irq(void)
 {
         pxa_init_irq(34, pxa27x_set_wake);
-        pxa_init_gpio(128, pxa27x_set_wake);
+        pxa_init_gpio(121, pxa27x_set_wake);
 }
 
 /*
  * device registration specific to PXA27x.
  */
-
-static struct resource i2c_power_resources[] = {
-        {
-                .start  = 0x40f00180,
-                .end    = 0x40f001a3,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = IRQ_PWRI2C,
-                .end    = IRQ_PWRI2C,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-struct platform_device pxa27x_device_i2c_power = {
-        .name           = "pxa2xx-i2c",
-        .id             = 1,
-        .resource       = i2c_power_resources,
-        .num_resources  = ARRAY_SIZE(i2c_power_resources),
-};
-
 void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
 {
         local_irq_disable();
         PCFR |= PCFR_PI2CEN;
         local_irq_enable();
-        pxa27x_device_i2c_power.dev.platform_data = info;
+        pxa_register_device(&pxa27x_device_i2c_power, info);
 }
 
 static struct platform_device *devices[] __initdata = {
@@ -353,8 +352,8 @@ static struct platform_device *devices[] __initdata = {
         &pxa_device_btuart,
         &pxa_device_stuart,
         &pxa_device_i2s,
+        &sa1100_device_rtc,
         &pxa_device_rtc,
-        &pxa27x_device_i2c_power,
         &pxa27x_device_ssp1,
         &pxa27x_device_ssp2,
         &pxa27x_device_ssp3,
@@ -380,7 +379,7 @@ static int __init pxa27x_init(void)
 
                 reset_status = RCSR;
 
-                clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks));
+                clks_register(pxa27x_clkregs, ARRAY_SIZE(pxa27x_clkregs));
 
                 if ((ret = pxa_init_dma(32)))
                         return ret;
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c
index 9adc7fc4618a..f735e58e6669 100644
--- a/arch/arm/mach-pxa/pxa300.c
+++ b/arch/arm/mach-pxa/pxa300.c
@@ -85,14 +85,16 @@ static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = {
         MFP_ADDR_END,
 };
 
-static struct clk common_clks[] = {
-        PXA3xx_CKEN("NANDCLK", NAND, 156000000, 0, &pxa3xx_device_nand.dev),
+static DEFINE_PXA3_CKEN(common_nand, NAND, 156000000, 0);
+
+static struct clk_lookup common_clkregs[] = {
+        INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", "NANDCLK"),
 };
 
-static struct clk pxa310_clks[] = {
-#ifdef CONFIG_CPU_PXA310
-        PXA3xx_CKEN("MMCCLK", MMC3, 19500000, 0, &pxa3xx_device_mci3.dev),
-#endif
+static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0);
+
+static struct clk_lookup pxa310_clkregs[] = {
+        INIT_CLKREG(&clk_pxa310_mmc3, "pxa2xx-mci.2", "MMCCLK"),
 };
 
 static int __init pxa300_init(void)
@@ -100,12 +102,12 @@ static int __init pxa300_init(void)
         if (cpu_is_pxa300() || cpu_is_pxa310()) {
                 pxa3xx_init_mfp();
                 pxa3xx_mfp_init_addr(pxa300_mfp_addr_map);
-                clks_register(ARRAY_AND_SIZE(common_clks));
+                clks_register(ARRAY_AND_SIZE(common_clkregs));
         }
 
         if (cpu_is_pxa310()) {
                 pxa3xx_mfp_init_addr(pxa310_mfp_addr_map);
-                clks_register(ARRAY_AND_SIZE(pxa310_clks));
+                clks_register(ARRAY_AND_SIZE(pxa310_clkregs));
         }
 
         return 0;
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c
index 016eb18f01a3..effe408c186f 100644
--- a/arch/arm/mach-pxa/pxa320.c
+++ b/arch/arm/mach-pxa/pxa320.c
@@ -80,8 +80,10 @@ static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
         MFP_ADDR_END,
 };
 
-static struct clk pxa320_clks[] = {
-        PXA3xx_CKEN("NANDCLK", NAND, 104000000, 0, &pxa3xx_device_nand.dev),
+static DEFINE_PXA3_CKEN(pxa320_nand, NAND, 104000000, 0);
+
+static struct clk_lookup pxa320_clkregs[] = {
+        INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", "NANDCLK"),
 };
 
 static int __init pxa320_init(void)
@@ -89,7 +91,7 @@ static int __init pxa320_init(void)
         if (cpu_is_pxa320()) {
                 pxa3xx_init_mfp();
                 pxa3xx_mfp_init_addr(pxa320_mfp_addr_map);
-                clks_register(ARRAY_AND_SIZE(pxa320_clks));
+                clks_register(ARRAY_AND_SIZE(pxa320_clkregs));
         }
 
         return 0;
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index b3cd5d0b0f35..490893824e78 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -29,6 +29,7 @@
 #include <mach/pm.h>
 #include <mach/dma.h>
 #include <mach/ssp.h>
+#include <mach/i2c.h>
 
 #include "generic.h"
 #include "devices.h"
@@ -216,43 +217,58 @@ static const struct clkops clk_dummy_ops = {
         .disable        = clk_dummy_disable,
 };
 
-static struct clk pxa3xx_clks[] = {
-        {
-                .name           = "CLK_POUT",
-                .ops            = &clk_pout_ops,
-                .rate           = 13000000,
-                .delay          = 70,
-        },
-
-        /* Power I2C clock is always on */
-        {
-                .name           = "I2CCLK",
-                .ops            = &clk_dummy_ops,
-                .dev            = &pxa3xx_device_i2c_power.dev,
-        },
-
-        PXA3xx_CK("LCDCLK",  LCD,    &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev),
-        PXA3xx_CK("CAMCLK",  CAMERA, &clk_pxa3xx_hsio_ops, NULL),
-        PXA3xx_CK("AC97CLK", AC97,   &clk_pxa3xx_ac97_ops, NULL),
-
-        PXA3xx_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev),
-        PXA3xx_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev),
-        PXA3xx_CKEN("UARTCLK", STUART, 14857000, 1, NULL),
-
-        PXA3xx_CKEN("I2CCLK", I2C,  32842000, 0, &pxa_device_i2c.dev),
-        PXA3xx_CKEN("UDCCLK", UDC,  48000000, 5, &pxa27x_device_udc.dev),
-        PXA3xx_CKEN("USBCLK", USBH, 48000000, 0, &pxa27x_device_ohci.dev),
-        PXA3xx_CKEN("KBDCLK", KEYPAD,  32768, 0, &pxa27x_device_keypad.dev),
+static struct clk clk_pxa3xx_pout = {
+        .ops            = &clk_pout_ops,
+        .rate           = 13000000,
+        .delay          = 70,
+};
 
-        PXA3xx_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev),
-        PXA3xx_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev),
-        PXA3xx_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev),
-        PXA3xx_CKEN("SSPCLK", SSP4, 13000000, 0, &pxa3xx_device_ssp4.dev),
-        PXA3xx_CKEN("PWMCLK", PWM0, 13000000, 0, &pxa27x_device_pwm0.dev),
-        PXA3xx_CKEN("PWMCLK", PWM1, 13000000, 0, &pxa27x_device_pwm1.dev),
+static struct clk clk_dummy = {
+        .ops            = &clk_dummy_ops,
+};
 
-        PXA3xx_CKEN("MMCCLK", MMC1, 19500000, 0, &pxa_device_mci.dev),
-        PXA3xx_CKEN("MMCCLK", MMC2, 19500000, 0, &pxa3xx_device_mci2.dev),
+static DEFINE_PXA3_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops);
+static DEFINE_PXA3_CK(pxa3xx_camera, CAMERA, &clk_pxa3xx_hsio_ops);
+static DEFINE_PXA3_CK(pxa3xx_ac97, AC97, &clk_pxa3xx_ac97_ops);
+static DEFINE_PXA3_CKEN(pxa3xx_ffuart, FFUART, 14857000, 1);
+static DEFINE_PXA3_CKEN(pxa3xx_btuart, BTUART, 14857000, 1);
+static DEFINE_PXA3_CKEN(pxa3xx_stuart, STUART, 14857000, 1);
+static DEFINE_PXA3_CKEN(pxa3xx_i2c, I2C, 32842000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_udc, UDC, 48000000, 5);
+static DEFINE_PXA3_CKEN(pxa3xx_usbh, USBH, 48000000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_keypad, KEYPAD, 32768, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_ssp1, SSP1, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_ssp2, SSP2, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_ssp3, SSP3, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_ssp4, SSP4, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_pwm0, PWM0, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0);
+
+static struct clk_lookup pxa3xx_clkregs[] = {
+        INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"),
+        /* Power I2C clock is always on */
+        INIT_CLKREG(&clk_dummy, "pxa2xx-i2c.1", NULL),
+        INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL),
+        INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"),
+        INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"),
+        INIT_CLKREG(&clk_pxa3xx_ffuart, "pxa2xx-uart.0", NULL),
+        INIT_CLKREG(&clk_pxa3xx_btuart, "pxa2xx-uart.1", NULL),
+        INIT_CLKREG(&clk_pxa3xx_stuart, "pxa2xx-uart.2", NULL),
+        INIT_CLKREG(&clk_pxa3xx_stuart, "pxa2xx-ir", "UARTCLK"),
+        INIT_CLKREG(&clk_pxa3xx_i2c, "pxa2xx-i2c.0", NULL),
+        INIT_CLKREG(&clk_pxa3xx_udc, "pxa27x-udc", NULL),
+        INIT_CLKREG(&clk_pxa3xx_usbh, "pxa27x-ohci", NULL),
+        INIT_CLKREG(&clk_pxa3xx_keypad, "pxa27x-keypad", NULL),
+        INIT_CLKREG(&clk_pxa3xx_ssp1, "pxa27x-ssp.0", NULL),
+        INIT_CLKREG(&clk_pxa3xx_ssp2, "pxa27x-ssp.1", NULL),
+        INIT_CLKREG(&clk_pxa3xx_ssp3, "pxa27x-ssp.2", NULL),
+        INIT_CLKREG(&clk_pxa3xx_ssp4, "pxa27x-ssp.3", NULL),
+        INIT_CLKREG(&clk_pxa3xx_pwm0, "pxa27x-pwm.0", NULL),
+        INIT_CLKREG(&clk_pxa3xx_pwm1, "pxa27x-pwm.1", NULL),
+        INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL),
+        INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL),
 };
 
 #ifdef CONFIG_PM
@@ -529,28 +545,9 @@ void __init pxa3xx_init_irq(void)
  * device registration specific to PXA3xx.
  */
 
-static struct resource i2c_power_resources[] = {
-        {
-                .start  = 0x40f500c0,
-                .end    = 0x40f500d3,
-                .flags  = IORESOURCE_MEM,
-        }, {
-                .start  = IRQ_PWRI2C,
-                .end    = IRQ_PWRI2C,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-struct platform_device pxa3xx_device_i2c_power = {
-        .name           = "pxa2xx-i2c",
-        .id             = 1,
-        .resource       = i2c_power_resources,
-        .num_resources  = ARRAY_SIZE(i2c_power_resources),
-};
-
 void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info)
 {
-        pxa3xx_device_i2c_power.dev.platform_data = info;
+        pxa_register_device(&pxa3xx_device_i2c_power, info);
 }
 
 static struct platform_device *devices[] __initdata = {
@@ -559,6 +556,7 @@ static struct platform_device *devices[] __initdata = {
         &pxa_device_btuart,
         &pxa_device_stuart,
         &pxa_device_i2s,
+        &sa1100_device_rtc,
         &pxa_device_rtc,
         &pxa27x_device_ssp1,
         &pxa27x_device_ssp2,
@@ -566,7 +564,6 @@ static struct platform_device *devices[] __initdata = {
         &pxa3xx_device_ssp4,
         &pxa27x_device_pwm0,
         &pxa27x_device_pwm1,
-        &pxa3xx_device_i2c_power,
 };
 
 static struct sys_device pxa3xx_sysdev[] = {
@@ -595,7 +592,7 @@ static int __init pxa3xx_init(void)
                  */
                 ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
 
-                clks_register(pxa3xx_clks, ARRAY_SIZE(pxa3xx_clks));
+                clks_register(pxa3xx_clkregs, ARRAY_SIZE(pxa3xx_clkregs));
 
                 if ((ret = pxa_init_dma(32)))
                         return ret;
diff --git a/arch/arm/mach-pxa/smemc.c b/arch/arm/mach-pxa/smemc.c
index ad346addc028..d6f6904132a6 100644
--- a/arch/arm/mach-pxa/smemc.c
+++ b/arch/arm/mach-pxa/smemc.c
@@ -8,6 +8,8 @@
 #include <linux/io.h>
 #include <linux/sysdev.h>
 
+#include <mach/hardware.h>
+
 #define SMEMC_PHYS_BASE (0x4A000000)
 #define SMEMC_PHYS_SIZE (0x90)
 
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 3be76ee2bdbf..7299d87a1cb3 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -22,6 +22,7 @@
 #include <linux/gpio.h>
 #include <linux/leds.h>
 #include <linux/mmc/host.h>
+#include <linux/mtd/physmap.h>
 #include <linux/pm.h>
 #include <linux/backlight.h>
 #include <linux/io.h>
@@ -122,6 +123,10 @@ static unsigned long spitz_pin_config[] __initdata = {
         GPIO105_GPIO,   /* SPITZ_GPIO_CF_IRQ */
         GPIO106_GPIO,   /* SPITZ_GPIO_CF2_IRQ */
 
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
+
         GPIO1_GPIO | WAKEUP_ON_EDGE_RISE,
 };
 
@@ -609,10 +614,41 @@ static struct pxafb_mach_info spitz_pxafb_info = {
 };
 
 
+static struct mtd_partition sharpsl_rom_parts[] = {
+        {
+                .name   ="Boot PROM Filesystem",
+                .offset = 0x00140000,
+                .size   = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data sharpsl_rom_data = {
+        .width          = 2,
+        .nr_parts       = ARRAY_SIZE(sharpsl_rom_parts),
+        .parts          = sharpsl_rom_parts,
+};
+
+static struct resource sharpsl_rom_resources[] = {
+        {
+                .start  = 0x00000000,
+                .end    = 0x007fffff,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device sharpsl_rom_device = {
+        .name   = "physmap-flash",
+        .id     = -1,
+        .resource = sharpsl_rom_resources,
+        .num_resources = ARRAY_SIZE(sharpsl_rom_resources),
+        .dev.platform_data = &sharpsl_rom_data,
+};
+
 static struct platform_device *devices[] __initdata = {
         &spitzscoop_device,
         &spitzkbd_device,
         &spitzled_device,
+        &sharpsl_rom_device,
 };
 
 static void spitz_poweroff(void)
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c
index 2c31ec725688..6f42004db3ed 100644
--- a/arch/arm/mach-pxa/ssp.c
+++ b/arch/arm/mach-pxa/ssp.c
@@ -356,7 +356,7 @@ static int __devinit ssp_probe(struct platform_device *pdev, int type)
         }
         ssp->pdev = pdev;
 
-        ssp->clk = clk_get(&pdev->dev, "SSPCLK");
+        ssp->clk = clk_get(&pdev->dev, NULL);
         if (IS_ERR(ssp->clk)) {
                 ret = PTR_ERR(ssp->clk);
                 goto err_free;
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index f8a9a62959e5..ef4ddf9d5040 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -22,6 +22,7 @@
 #include <asm/div64.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
+#include <mach/hardware.h>
 #include <mach/pxa-regs.h>
 #include <asm/mach-types.h>
 
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 224897a67d15..3332e5d0356c 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -25,6 +25,7 @@
 #include <linux/mfd/tmio.h>
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 #include <linux/pm.h>
 #include <linux/gpio_keys.h>
 #include <linux/input.h>
@@ -733,6 +734,45 @@ static void tosa_tc6393xb_teardown(struct platform_device *dev)
         gpio_free(TOSA_GPIO_CARD_VCC_ON);
 }
 
+#ifdef CONFIG_MFD_TC6393XB
+static struct fb_videomode tosa_tc6393xb_lcd_mode[] = {
+        {
+                .xres = 480,
+                .yres = 640,
+                .pixclock = 0x002cdf00,/* PLL divisor */
+                .left_margin = 0x004c,
+                .right_margin = 0x005b,
+                .upper_margin = 0x0001,
+                .lower_margin = 0x000d,
+                .hsync_len = 0x0002,
+                .vsync_len = 0x0001,
+                .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+                .vmode = FB_VMODE_NONINTERLACED,
+        },{
+                .xres = 240,
+                .yres = 320,
+                .pixclock = 0x00e7f203,/* PLL divisor */
+                .left_margin = 0x0024,
+                .right_margin = 0x002f,
+                .upper_margin = 0x0001,
+                .lower_margin = 0x000d,
+                .hsync_len = 0x0002,
+                .vsync_len = 0x0001,
+                .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+                .vmode = FB_VMODE_NONINTERLACED,
+        }
+};
+
+static struct tmio_fb_data tosa_tc6393xb_fb_config = {
+        .lcd_set_power  = tc6393xb_lcd_set_power,
+        .lcd_mode       = tc6393xb_lcd_mode,
+        .num_modes      = ARRAY_SIZE(tosa_tc6393xb_lcd_mode),
+        .modes          = &tosa_tc6393xb_lcd_mode[0],
+        .height         = 82,
+        .width          = 60,
+};
+#endif
+
 static struct tc6393xb_platform_data tosa_tc6393xb_data = {
         .scr_pll2cr     = 0x0cc1,
         .scr_gper       = 0x3300,
@@ -748,6 +788,9 @@ static struct tc6393xb_platform_data tosa_tc6393xb_data = {
         .resume         = tosa_tc6393xb_resume,
 
         .nand_data      = &tosa_tc6393xb_nand_config,
+#ifdef CONFIG_MFD_TC6393XB
+        .fb_data        = &tosa_tc6393xb_fb_config,
+#endif
 
         .resume_restore = 1,
 };
@@ -789,6 +832,36 @@ static struct spi_board_info spi_board_info[] __initdata = {
         },
 };
 
+static struct mtd_partition sharpsl_rom_parts[] = {
+        {
+                .name   ="Boot PROM Filesystem",
+                .offset = 0x00160000,
+                .size   = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data sharpsl_rom_data = {
+        .width          = 2,
+        .nr_parts       = ARRAY_SIZE(sharpsl_rom_parts),
+        .parts          = sharpsl_rom_parts,
+};
+
+static struct resource sharpsl_rom_resources[] = {
+        {
+                .start  = 0x00000000,
+                .end    = 0x007fffff,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device sharpsl_rom_device = {
+        .name   = "physmap-flash",
+        .id     = -1,
+        .resource = sharpsl_rom_resources,
+        .num_resources = ARRAY_SIZE(sharpsl_rom_resources),
+        .dev.platform_data = &sharpsl_rom_data,
+};
+
 static struct platform_device *devices[] __initdata = {
         &tosascoop_device,
         &tosascoop_jc_device,
@@ -798,6 +871,7 @@ static struct platform_device *devices[] __initdata = {
         &tosa_gpio_keys_device,
         &tosaled_device,
         &tosa_bt_device,
+        &sharpsl_rom_device,
 };
 
 static void tosa_poweroff(void)
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 813804433466..218d2001f1df 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -18,6 +18,7 @@
 #include <linux/interrupt.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
+#include <linux/gpio.h>
 #include <linux/pwm_backlight.h>
 #include <linux/smc91x.h>
 
@@ -25,7 +26,6 @@
 #include <asm/mach/arch.h>
 #include <mach/hardware.h>
 #include <mach/audio.h>
-#include <mach/gpio.h>
 #include <mach/pxafb.h>
 #include <mach/zylonite.h>
 #include <mach/mmc.h>
diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c
index 0f244744daae..28e4e623780b 100644
--- a/arch/arm/mach-pxa/zylonite_pxa320.c
+++ b/arch/arm/mach-pxa/zylonite_pxa320.c
@@ -16,8 +16,8 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/gpio.h>
 
-#include <mach/gpio.h>
 #include <mach/mfp-pxa320.h>
 #include <mach/zylonite.h>
 
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index 5ccde7cf39e8..ad911854eb4c 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -7,9 +7,17 @@ config MACH_REALVIEW_EB
         help
           Include support for the ARM(R) RealView Emulation Baseboard platform.
 
+config REALVIEW_EB_A9MP
+        bool "Support Multicore Cortex-A9"
+        depends on MACH_REALVIEW_EB
+        select CPU_V7
+        help
+          Enable support for the Cortex-A9MPCore tile on the Realview platform.
+
 config REALVIEW_EB_ARM11MP
         bool "Support ARM11MPCore tile"
         depends on MACH_REALVIEW_EB
+        select CPU_V6
         help
           Enable support for the ARM11MPCore tile on the Realview platform.
 
@@ -25,6 +33,7 @@ config REALVIEW_EB_ARM11MP_REVB
 
 config MACH_REALVIEW_PB11MP
         bool "Support RealView/PB11MPCore platform"
+        select CPU_V6
         select ARM_GIC
         help
           Include support for the ARM(R) RealView MPCore Platform Baseboard.
@@ -33,8 +42,29 @@ config MACH_REALVIEW_PB11MP
 
 config MACH_REALVIEW_PB1176
         bool "Support RealView/PB1176 platform"
+        select CPU_V6
         select ARM_GIC
         help
           Include support for the ARM(R) RealView ARM1176 Platform Baseboard.
 
+config MACH_REALVIEW_PBA8
+        bool "Support RealView/PB-A8 platform"
+        select CPU_V7
+        select ARM_GIC
+        help
+          Include support for the ARM(R) RealView Cortex-A8 Platform Baseboard.
+          PB-A8 is a platform with an on-board Cortex-A8 and has support for
+          PCI-E and Compact Flash.
+
+config REALVIEW_HIGH_PHYS_OFFSET
+        bool "High physical base address for the RealView platform"
+        depends on !MACH_REALVIEW_PB1176
+        default y
+        help
+          RealView boards other than PB1176 have the RAM available at
+          0x70000000, 256MB of which being mirrored at 0x00000000. If
+          the board supports 512MB of RAM, this option allows the
+          memory to be accessed contiguously at the high physical
+          offset.
+
 endmenu
diff --git a/arch/arm/mach-realview/Makefile b/arch/arm/mach-realview/Makefile
index d2ae077431dd..7bea8ffc4b59 100644
--- a/arch/arm/mach-realview/Makefile
+++ b/arch/arm/mach-realview/Makefile
@@ -6,5 +6,6 @@ obj-y					:= core.o clock.o
 obj-$(CONFIG_MACH_REALVIEW_EB)          += realview_eb.o
 obj-$(CONFIG_MACH_REALVIEW_PB11MP)      += realview_pb11mp.o
 obj-$(CONFIG_MACH_REALVIEW_PB1176)      += realview_pb1176.o
+obj-$(CONFIG_MACH_REALVIEW_PBA8)        += realview_pba8.o
 obj-$(CONFIG_SMP)                       += platsmp.o headsmp.o localtimer.o
 obj-$(CONFIG_HOTPLUG_CPU)               += hotplug.o
diff --git a/arch/arm/mach-realview/Makefile.boot b/arch/arm/mach-realview/Makefile.boot
index c7e75acfe6c9..d97e003d3df4 100644
--- a/arch/arm/mach-realview/Makefile.boot
+++ b/arch/arm/mach-realview/Makefile.boot
@@ -1,4 +1,9 @@
+ifeq ($(CONFIG_REALVIEW_HIGH_PHYS_OFFSET),y)
+   zreladdr-y   := 0x70008000
+params_phys-y   := 0x70000100
+initrd_phys-y   := 0x70800000
+else
    zreladdr-y   := 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
-
+endif
diff --git a/arch/arm/mach-realview/clock.c b/arch/arm/mach-realview/clock.c
index 3347c4236a60..a7043115de72 100644
--- a/arch/arm/mach-realview/clock.c
+++ b/arch/arm/mach-realview/clock.c
@@ -10,9 +10,11 @@
  */
 #include <linux/module.h>
 #include <linux/kernel.h>
+#include <linux/device.h>
 #include <linux/list.h>
 #include <linux/errno.h>
 #include <linux/err.h>
+#include <linux/string.h>
 #include <linux/clk.h>
 #include <linux/mutex.h>
 
@@ -20,32 +22,6 @@
 
 #include "clock.h"
 
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
-        struct clk *p, *clk = ERR_PTR(-ENOENT);
-
-        mutex_lock(&clocks_mutex);
-        list_for_each_entry(p, &clocks, node) {
-                if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
-                        clk = p;
-                        break;
-                }
-        }
-        mutex_unlock(&clocks_mutex);
-
-        return clk;
-}
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-        module_put(clk->owner);
-}
-EXPORT_SYMBOL(clk_put);
-
 int clk_enable(struct clk *clk)
 {
         return 0;
@@ -65,7 +41,9 @@ EXPORT_SYMBOL(clk_get_rate);
 
 long clk_round_rate(struct clk *clk, unsigned long rate)
 {
-        return rate;
+        struct icst307_vco vco;
+        vco = icst307_khz_to_vco(clk->params, rate / 1000);
+        return icst307_khz(clk->params, vco) * 1000;
 }
 EXPORT_SYMBOL(clk_round_rate);
 
@@ -78,57 +56,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
 
                 vco = icst307_khz_to_vco(clk->params, rate / 1000);
                 clk->rate = icst307_khz(clk->params, vco) * 1000;
-
-                printk("Clock %s: setting VCO reg params: S=%d R=%d V=%d\n",
-                        clk->name, vco.s, vco.r, vco.v);
-
                 clk->setvco(clk, vco);
                 ret = 0;
         }
         return ret;
 }
 EXPORT_SYMBOL(clk_set_rate);
-
-/*
- * These are fixed clocks.
- */
-static struct clk kmi_clk = {
-        .name   = "KMIREFCLK",
-        .rate   = 24000000,
-};
-
-static struct clk uart_clk = {
-        .name   = "UARTCLK",
-        .rate   = 24000000,
-};
-
-static struct clk mmci_clk = {
-        .name   = "MCLK",
-        .rate   = 24000000,
-};
-
-int clk_register(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_add(&clk->node, &clocks);
-        mutex_unlock(&clocks_mutex);
-        return 0;
-}
-EXPORT_SYMBOL(clk_register);
-
-void clk_unregister(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_del(&clk->node);
-        mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL(clk_unregister);
-
-static int __init clk_init(void)
-{
-        clk_register(&kmi_clk);
-        clk_register(&uart_clk);
-        clk_register(&mmci_clk);
-        return 0;
-}
-arch_initcall(clk_init);
diff --git a/arch/arm/mach-realview/clock.h b/arch/arm/mach-realview/clock.h
index dadba695e181..ebbb0f06b600 100644
--- a/arch/arm/mach-realview/clock.h
+++ b/arch/arm/mach-realview/clock.h
@@ -12,14 +12,8 @@ struct module;
 struct icst307_params;
 
 struct clk {
-        struct list_head        node;
         unsigned long           rate;
-        struct module           *owner;
-        const char              *name;
         const struct icst307_params *params;
         void                    *data;
         void                    (*setvco)(struct clk *, struct icst307_vco vco);
 };
-
-int clk_register(struct clk *clk);
-void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 2f04d54711e7..5f1d55963ced 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -28,11 +28,14 @@
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
 #include <linux/io.h>
+#include <linux/smc911x.h>
 
+#include <asm/clkdev.h>
 #include <asm/system.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/leds.h>
+#include <asm/mach-types.h>
 #include <asm/hardware/arm_timer.h>
 #include <asm/hardware/icst307.h>
 
@@ -49,7 +52,7 @@
 
 #define REALVIEW_REFCOUNTER     (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_24MHz_OFFSET)
 
-/* used by entry-macro.S */
+/* used by entry-macro.S and platsmp.c */
 void __iomem *gic_cpu_base_addr;
 
 /*
@@ -124,6 +127,29 @@ int realview_flash_register(struct resource *res, u32 num)
         return platform_device_register(&realview_flash_device);
 }
 
+static struct smc911x_platdata realview_smc911x_platdata = {
+        .flags          = SMC911X_USE_32BIT,
+        .irq_flags      = IRQF_SHARED,
+        .irq_polarity   = 1,
+};
+
+static struct platform_device realview_eth_device = {
+        .name           = "smc911x",
+        .id             = 0,
+        .num_resources  = 2,
+};
+
+int realview_eth_register(const char *name, struct resource *res)
+{
+        if (name)
+                realview_eth_device.name = name;
+        realview_eth_device.resource = res;
+        if (strcmp(realview_eth_device.name, "smc911x") == 0)
+                realview_eth_device.dev.platform_data = &realview_smc911x_platdata;
+
+        return platform_device_register(&realview_eth_device);
+}
+
 static struct resource realview_i2c_resource = {
         .start          = REALVIEW_I2C_BASE,
         .end            = REALVIEW_I2C_BASE + SZ_4K - 1,
@@ -177,9 +203,14 @@ static const struct icst307_params realview_oscvco_params = {
 static void realview_oscvco_set(struct clk *clk, struct icst307_vco vco)
 {
         void __iomem *sys_lock = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LOCK_OFFSET;
-        void __iomem *sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET;
+        void __iomem *sys_osc;
         u32 val;
 
+        if (machine_is_realview_pb1176())
+                sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC0_OFFSET;
+        else
+                sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET;
+
         val = readl(sys_osc) & ~0x7ffff;
         val |= vco.v | (vco.r << 9) | (vco.s << 16);
 
@@ -188,13 +219,60 @@ static void realview_oscvco_set(struct clk *clk, struct icst307_vco vco)
         writel(0, sys_lock);
 }
 
-struct clk realview_clcd_clk = {
-        .name   = "CLCDCLK",
+static struct clk oscvco_clk = {
         .params = &realview_oscvco_params,
         .setvco = realview_oscvco_set,
 };
 
 /*
+ * These are fixed clocks.
+ */
+static struct clk ref24_clk = {
+        .rate   = 24000000,
+};
+
+static struct clk_lookup lookups[] = {
+        {       /* UART0 */
+                .dev_id         = "dev:f1",
+                .clk            = &ref24_clk,
+        }, {    /* UART1 */
+                .dev_id         = "dev:f2",
+                .clk            = &ref24_clk,
+        }, {    /* UART2 */
+                .dev_id         = "dev:f3",
+                .clk            = &ref24_clk,
+        }, {    /* UART3 */
+                .dev_id         = "fpga:09",
+                .clk            = &ref24_clk,
+        }, {    /* KMI0 */
+                .dev_id         = "fpga:06",
+                .clk            = &ref24_clk,
+        }, {    /* KMI1 */
+                .dev_id         = "fpga:07",
+                .clk            = &ref24_clk,
+        }, {    /* MMC0 */
+                .dev_id         = "fpga:05",
+                .clk            = &ref24_clk,
+        }, {    /* EB:CLCD */
+                .dev_id         = "dev:20",
+                .clk            = &oscvco_clk,
+        }, {    /* PB:CLCD */
+                .dev_id         = "issp:20",
+                .clk            = &oscvco_clk,
+        }
+};
+
+static int __init clk_init(void)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(lookups); i++)
+                clkdev_add(&lookups[i]);
+        return 0;
+}
+arch_initcall(clk_init);
+
+/*
  * CLCD support.
  */
 #define SYS_CLCD_NLCDIOON       (1 << 2)
@@ -226,7 +304,30 @@ static struct clcd_panel vga = {
         .width          = -1,
         .height         = -1,
         .tim2           = TIM2_BCD | TIM2_IPC,
-        .cntl           = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
+        .cntl           = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
+        .bpp            = 16,
+};
+
+static struct clcd_panel xvga = {
+        .mode           = {
+                .name           = "XVGA",
+                .refresh        = 60,
+                .xres           = 1024,
+                .yres           = 768,
+                .pixclock       = 15748,
+                .left_margin    = 152,
+                .right_margin   = 48,
+                .upper_margin   = 23,
+                .lower_margin   = 3,
+                .hsync_len      = 104,
+                .vsync_len      = 4,
+                .sync           = 0,
+                .vmode          = FB_VMODE_NONINTERLACED,
+        },
+        .width          = -1,
+        .height         = -1,
+        .tim2           = TIM2_BCD | TIM2_IPC,
+        .cntl           = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
         .bpp            = 16,
 };
 
@@ -249,7 +350,7 @@ static struct clcd_panel sanyo_3_8_in = {
         .width          = -1,
         .height         = -1,
         .tim2           = TIM2_BCD,
-        .cntl           = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
+        .cntl           = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
         .bpp            = 16,
 };
 
@@ -272,7 +373,7 @@ static struct clcd_panel sanyo_2_5_in = {
         .width          = -1,
         .height         = -1,
         .tim2           = TIM2_IVS | TIM2_IHS | TIM2_IPC,
-        .cntl           = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
+        .cntl           = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
         .bpp            = 16,
 };
 
@@ -295,7 +396,7 @@ static struct clcd_panel epson_2_2_in = {
         .width          = -1,
         .height         = -1,
         .tim2           = TIM2_BCD | TIM2_IPC,
-        .cntl           = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
+        .cntl           = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
         .bpp            = 16,
 };
 
@@ -308,9 +409,15 @@ static struct clcd_panel epson_2_2_in = {
 static struct clcd_panel *realview_clcd_panel(void)
 {
         void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
-        struct clcd_panel *panel = &vga;
+        struct clcd_panel *vga_panel;
+        struct clcd_panel *panel;
         u32 val;
 
+        if (machine_is_realview_eb())
+                vga_panel = &vga;
+        else
+                vga_panel = &xvga;
+
         val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
         if (val == SYS_CLCD_ID_SANYO_3_8)
                 panel = &sanyo_3_8_in;
@@ -319,11 +426,11 @@ static struct clcd_panel *realview_clcd_panel(void)
         else if (val == SYS_CLCD_ID_EPSON_2_2)
                 panel = &epson_2_2_in;
         else if (val == SYS_CLCD_ID_VGA)
-                panel = &vga;
+                panel = vga_panel;
         else {
                 printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
                         val);
-                panel = &vga;
+                panel = vga_panel;
         }
 
         return panel;
@@ -358,12 +465,18 @@ static void realview_clcd_enable(struct clcd_fb *fb)
         writel(val, sys_clcd);
 }
 
-static unsigned long framesize = SZ_1M;
-
 static int realview_clcd_setup(struct clcd_fb *fb)
 {
+        unsigned long framesize;
         dma_addr_t dma;
 
+        if (machine_is_realview_eb())
+                /* VGA, 16bpp */
+                framesize = 640 * 480 * 2;
+        else
+                /* XVGA, 16bpp */
+                framesize = 1024 * 768 * 2;
+
         fb->panel               = realview_clcd_panel();
 
         fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
@@ -588,7 +701,7 @@ void __init realview_timer_init(unsigned int timer_irq)
          * The dummy clock device has to be registered before the main device
          * so that the latter will broadcast the clock events
          */
-        local_timer_setup(smp_processor_id());
+        local_timer_setup();
 #endif
 
         /* 
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 3cea92c70d8f..63be2abdc19c 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -48,12 +48,10 @@ extern struct platform_device realview_flash_device;
 extern struct platform_device realview_i2c_device;
 extern struct mmc_platform_data realview_mmc0_plat_data;
 extern struct mmc_platform_data realview_mmc1_plat_data;
-extern struct clk realview_clcd_clk;
 extern struct clcd_board clcd_plat_data;
 extern void __iomem *gic_cpu_base_addr;
 #ifdef CONFIG_LOCAL_TIMERS
-extern void __iomem *twd_base_addr;
-extern unsigned int twd_size;
+extern void __iomem *twd_base;
 #endif
 extern void __iomem *timer0_va_base;
 extern void __iomem *timer1_va_base;
@@ -63,5 +61,6 @@ extern void __iomem *timer3_va_base;
 extern void realview_leds_event(led_event_t ledevt);
 extern void realview_timer_init(unsigned int timer_irq);
 extern int realview_flash_register(struct resource *res, u32 num);
+extern int realview_eth_register(const char *name, struct resource *res);
 
 #endif
diff --git a/arch/arm/mach-realview/hotplug.c b/arch/arm/mach-realview/hotplug.c
index 09748cbcd10e..be048e3e8799 100644
--- a/arch/arm/mach-realview/hotplug.c
+++ b/arch/arm/mach-realview/hotplug.c
@@ -13,6 +13,8 @@
 #include <linux/smp.h>
 #include <linux/completion.h>
 
+#include <asm/cacheflush.h>
+
 extern volatile int pen_release;
 
 static DECLARE_COMPLETION(cpu_killed);
@@ -21,7 +23,8 @@ static inline void cpu_enter_lowpower(void)
 {
         unsigned int v;
 
-        asm volatile(   "mcr    p15, 0, %1, c7, c14, 0\n"
+        flush_cache_all();
+        asm volatile(
         "       mcr     p15, 0, %1, c7, c5, 0\n"
         "       mcr     p15, 0, %1, c7, c10, 4\n"
         /*
diff --git a/arch/arm/mach-realview/include/mach/board-eb.h b/arch/arm/mach-realview/include/mach/board-eb.h
index 8d699fd324d0..268d7701fa9b 100644
--- a/arch/arm/mach-realview/include/mach/board-eb.h
+++ b/arch/arm/mach-realview/include/mach/board-eb.h
@@ -49,16 +49,14 @@
 #ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
 #define REALVIEW_EB11MP_SCU_BASE        0x10100000      /* SCU registers */
 #define REALVIEW_EB11MP_GIC_CPU_BASE    0x10100100      /* Generic interrupt controller CPU interface */
-#define REALVIEW_EB11MP_TWD_BASE        0x10100700
-#define REALVIEW_EB11MP_TWD_SIZE        0x00000100
+#define REALVIEW_EB11MP_TWD_BASE        0x10100600
 #define REALVIEW_EB11MP_GIC_DIST_BASE   0x10101000      /* Generic interrupt controller distributor */
 #define REALVIEW_EB11MP_L220_BASE       0x10102000      /* L220 registers */
 #define REALVIEW_EB11MP_SYS_PLD_CTRL1   0xD8            /* Register offset for MPCore sysctl */
 #else
 #define REALVIEW_EB11MP_SCU_BASE        0x1F000000      /* SCU registers */
 #define REALVIEW_EB11MP_GIC_CPU_BASE    0x1F000100      /* Generic interrupt controller CPU interface */
-#define REALVIEW_EB11MP_TWD_BASE        0x1F000700
-#define REALVIEW_EB11MP_TWD_SIZE        0x00000100
+#define REALVIEW_EB11MP_TWD_BASE        0x1F000600
 #define REALVIEW_EB11MP_GIC_DIST_BASE   0x1F001000      /* Generic interrupt controller distributor */
 #define REALVIEW_EB11MP_L220_BASE       0x1F002000      /* L220 registers */
 #define REALVIEW_EB11MP_SYS_PLD_CTRL1   0x74            /* Register offset for MPCore sysctl */
@@ -163,7 +161,7 @@
 #define NR_IRQS                 NR_IRQS_EB
 #endif
 
-#if defined(CONFIG_REALVIEW_EB_ARM11MP) \
+#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
         && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
 #undef MAX_GIC_NR
 #define MAX_GIC_NR              NR_GIC_EB11MP
@@ -177,6 +175,7 @@
 #define REALVIEW_EB_PROC_ARM9           0x02000000
 #define REALVIEW_EB_PROC_ARM11          0x04000000
 #define REALVIEW_EB_PROC_ARM11MP        0x06000000
+#define REALVIEW_EB_PROC_A9MP           0x0C000000
 
 #define check_eb_proc(proc_type)                                                \
         ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK)     \
@@ -188,4 +187,13 @@
 #define core_tile_eb11mp()      0
 #endif
 
+#ifdef CONFIG_REALVIEW_EB_A9MP
+#define core_tile_a9mp()        check_eb_proc(REALVIEW_EB_PROC_A9MP)
+#else
+#define core_tile_a9mp()        0
+#endif
+
+#define machine_is_realview_eb_mp() \
+        (machine_is_realview_eb() && (core_tile_eb11mp() || core_tile_a9mp()))
+
 #endif  /* __ASM_ARCH_BOARD_EB_H */
diff --git a/arch/arm/mach-realview/include/mach/board-pb11mp.h b/arch/arm/mach-realview/include/mach/board-pb11mp.h
index ecd80e58631e..53ea0e7a1267 100644
--- a/arch/arm/mach-realview/include/mach/board-pb11mp.h
+++ b/arch/arm/mach-realview/include/mach/board-pb11mp.h
@@ -77,8 +77,7 @@
  */
 #define REALVIEW_TC11MP_SCU_BASE                0x1F000000      /* IRQ, Test chip */
 #define REALVIEW_TC11MP_GIC_CPU_BASE            0x1F000100      /* Test chip interrupt controller CPU interface */
-#define REALVIEW_TC11MP_TWD_BASE                0x1F000700
-#define REALVIEW_TC11MP_TWD_SIZE                0x00000100
+#define REALVIEW_TC11MP_TWD_BASE                0x1F000600
 #define REALVIEW_TC11MP_GIC_DIST_BASE           0x1F001000      /* Test chip interrupt controller distributor */
 #define REALVIEW_TC11MP_L220_BASE               0x1F002000      /* L220 registers */
 
diff --git a/arch/arm/mach-realview/include/mach/board-pba8.h b/arch/arm/mach-realview/include/mach/board-pba8.h
new file mode 100644
index 000000000000..c8bed8f58bab
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/board-pba8.h
@@ -0,0 +1,152 @@
+/*
+ * include/asm-arm/arch-realview/board-pba8.h
+ *
+ * Copyright (C) 2008 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+
+#ifndef __ASM_ARCH_BOARD_PBA8_H
+#define __ASM_ARCH_BOARD_PBA8_H
+
+#include <mach/platform.h>
+
+/*
+ * Peripheral addresses
+ */
+#define REALVIEW_PBA8_UART0_BASE                0x10009000      /* UART 0 */
+#define REALVIEW_PBA8_UART1_BASE                0x1000A000      /* UART 1 */
+#define REALVIEW_PBA8_UART2_BASE                0x1000B000      /* UART 2 */
+#define REALVIEW_PBA8_UART3_BASE                0x1000C000      /* UART 3 */
+#define REALVIEW_PBA8_SSP_BASE                  0x1000D000      /* Synchronous Serial Port */
+#define REALVIEW_PBA8_WATCHDOG0_BASE            0x1000F000      /* Watchdog 0 */
+#define REALVIEW_PBA8_WATCHDOG_BASE             0x10010000      /* watchdog interface */
+#define REALVIEW_PBA8_TIMER0_1_BASE             0x10011000      /* Timer 0 and 1 */
+#define REALVIEW_PBA8_TIMER2_3_BASE             0x10012000      /* Timer 2 and 3 */
+#define REALVIEW_PBA8_GPIO0_BASE                0x10013000      /* GPIO port 0 */
+#define REALVIEW_PBA8_RTC_BASE                  0x10017000      /* Real Time Clock */
+#define REALVIEW_PBA8_TIMER4_5_BASE             0x10018000      /* Timer 4/5 */
+#define REALVIEW_PBA8_TIMER6_7_BASE             0x10019000      /* Timer 6/7 */
+#define REALVIEW_PBA8_SCTL_BASE                 0x1001A000      /* System Controller */
+#define REALVIEW_PBA8_CLCD_BASE                 0x10020000      /* CLCD */
+#define REALVIEW_PBA8_ONB_SRAM_BASE             0x10060000      /* On-board SRAM */
+#define REALVIEW_PBA8_DMC_BASE                  0x100E0000      /* DMC configuration */
+#define REALVIEW_PBA8_SMC_BASE                  0x100E1000      /* SMC configuration */
+#define REALVIEW_PBA8_CAN_BASE                  0x100E2000      /* CAN bus */
+#define REALVIEW_PBA8_CF_BASE                   0x18000000      /* Compact flash */
+#define REALVIEW_PBA8_CF_MEM_BASE               0x18003000      /* SMC for Compact flash */
+#define REALVIEW_PBA8_GIC_CPU_BASE              0x1E000000      /* Generic interrupt controller CPU interface */
+#define REALVIEW_PBA8_FLASH0_BASE               0x40000000
+#define REALVIEW_PBA8_FLASH0_SIZE               SZ_64M
+#define REALVIEW_PBA8_FLASH1_BASE               0x44000000
+#define REALVIEW_PBA8_FLASH1_SIZE               SZ_64M
+#define REALVIEW_PBA8_ETH_BASE                  0x4E000000      /* Ethernet */
+#define REALVIEW_PBA8_USB_BASE                  0x4F000000      /* USB */
+#define REALVIEW_PBA8_GIC_DIST_BASE             0x1E001000      /* Generic interrupt controller distributor */
+#define REALVIEW_PBA8_LT_BASE                   0xC0000000      /* Logic Tile expansion */
+#define REALVIEW_PBA8_SDRAM6_BASE               0x70000000      /* SDRAM bank 6 256MB */
+#define REALVIEW_PBA8_SDRAM7_BASE               0x80000000      /* SDRAM bank 7 256MB */
+
+#define REALVIEW_PBA8_SYS_PLD_CTRL1             0x74
+
+/*
+ * PBA8 PCI regions
+ */
+#define REALVIEW_PBA8_PCI_BASE                  0x90040000      /* PCI-X Unit base */
+#define REALVIEW_PBA8_PCI_IO_BASE               0x90050000      /* IO Region on AHB */
+#define REALVIEW_PBA8_PCI_MEM_BASE              0xA0000000      /* MEM Region on AHB */
+
+#define REALVIEW_PBA8_PCI_BASE_SIZE             0x10000         /* 16 Kb */
+#define REALVIEW_PBA8_PCI_IO_SIZE               0x1000          /* 4 Kb */
+#define REALVIEW_PBA8_PCI_MEM_SIZE              0x20000000      /* 512 MB */
+
+/*
+ * Irqs
+ */
+#define IRQ_PBA8_GIC_START                      32
+
+/* L220
+#define IRQ_PBA8_L220_EVENT     (IRQ_PBA8_GIC_START + 29)
+#define IRQ_PBA8_L220_SLAVE     (IRQ_PBA8_GIC_START + 30)
+#define IRQ_PBA8_L220_DECODE    (IRQ_PBA8_GIC_START + 31)
+*/
+
+/*
+ * PB-A8 on-board gic irq sources
+ */
+#define IRQ_PBA8_WATCHDOG       (IRQ_PBA8_GIC_START + 0)        /* Watchdog timer */
+#define IRQ_PBA8_SOFT           (IRQ_PBA8_GIC_START + 1)        /* Software interrupt */
+#define IRQ_PBA8_COMMRx         (IRQ_PBA8_GIC_START + 2)        /* Debug Comm Rx interrupt */
+#define IRQ_PBA8_COMMTx         (IRQ_PBA8_GIC_START + 3)        /* Debug Comm Tx interrupt */
+#define IRQ_PBA8_TIMER0_1       (IRQ_PBA8_GIC_START + 4)        /* Timer 0/1 (default timer) */
+#define IRQ_PBA8_TIMER2_3       (IRQ_PBA8_GIC_START + 5)        /* Timer 2/3 */
+#define IRQ_PBA8_GPIO0          (IRQ_PBA8_GIC_START + 6)        /* GPIO 0 */
+#define IRQ_PBA8_GPIO1          (IRQ_PBA8_GIC_START + 7)        /* GPIO 1 */
+#define IRQ_PBA8_GPIO2          (IRQ_PBA8_GIC_START + 8)        /* GPIO 2 */
+                                                                /* 9 reserved */
+#define IRQ_PBA8_RTC            (IRQ_PBA8_GIC_START + 10)       /* Real Time Clock */
+#define IRQ_PBA8_SSP            (IRQ_PBA8_GIC_START + 11)       /* Synchronous Serial Port */
+#define IRQ_PBA8_UART0          (IRQ_PBA8_GIC_START + 12)       /* UART 0 on development chip */
+#define IRQ_PBA8_UART1          (IRQ_PBA8_GIC_START + 13)       /* UART 1 on development chip */
+#define IRQ_PBA8_UART2          (IRQ_PBA8_GIC_START + 14)       /* UART 2 on development chip */
+#define IRQ_PBA8_UART3          (IRQ_PBA8_GIC_START + 15)       /* UART 3 on development chip */
+#define IRQ_PBA8_SCI            (IRQ_PBA8_GIC_START + 16)       /* Smart Card Interface */
+#define IRQ_PBA8_MMCI0A         (IRQ_PBA8_GIC_START + 17)       /* Multimedia Card 0A */
+#define IRQ_PBA8_MMCI0B         (IRQ_PBA8_GIC_START + 18)       /* Multimedia Card 0B */
+#define IRQ_PBA8_AACI           (IRQ_PBA8_GIC_START + 19)       /* Audio Codec */
+#define IRQ_PBA8_KMI0           (IRQ_PBA8_GIC_START + 20)       /* Keyboard/Mouse port 0 */
+#define IRQ_PBA8_KMI1           (IRQ_PBA8_GIC_START + 21)       /* Keyboard/Mouse port 1 */
+#define IRQ_PBA8_CHARLCD        (IRQ_PBA8_GIC_START + 22)       /* Character LCD */
+#define IRQ_PBA8_CLCD           (IRQ_PBA8_GIC_START + 23)       /* CLCD controller */
+#define IRQ_PBA8_DMAC           (IRQ_PBA8_GIC_START + 24)       /* DMA controller */
+#define IRQ_PBA8_PWRFAIL        (IRQ_PBA8_GIC_START + 25)       /* Power failure */
+#define IRQ_PBA8_PISMO          (IRQ_PBA8_GIC_START + 26)       /* PISMO interface */
+#define IRQ_PBA8_DoC            (IRQ_PBA8_GIC_START + 27)       /* Disk on Chip memory controller */
+#define IRQ_PBA8_ETH            (IRQ_PBA8_GIC_START + 28)       /* Ethernet controller */
+#define IRQ_PBA8_USB            (IRQ_PBA8_GIC_START + 29)       /* USB controller */
+#define IRQ_PBA8_TSPEN          (IRQ_PBA8_GIC_START + 30)       /* Touchscreen pen */
+#define IRQ_PBA8_TSKPAD         (IRQ_PBA8_GIC_START + 31)       /* Touchscreen keypad */
+
+/* ... */
+#define IRQ_PBA8_PCI0           (IRQ_PBA8_GIC_START + 50)
+#define IRQ_PBA8_PCI1           (IRQ_PBA8_GIC_START + 51)
+#define IRQ_PBA8_PCI2           (IRQ_PBA8_GIC_START + 52)
+#define IRQ_PBA8_PCI3           (IRQ_PBA8_GIC_START + 53)
+
+#define IRQ_PBA8_SMC            -1
+#define IRQ_PBA8_SCTL           -1
+
+#define NR_GIC_PBA8             1
+
+/*
+ * Only define NR_IRQS if less than NR_IRQS_PBA8
+ */
+#define NR_IRQS_PBA8            (IRQ_PBA8_GIC_START + 64)
+
+#if defined(CONFIG_MACH_REALVIEW_PBA8)
+
+#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8)
+#undef NR_IRQS
+#define NR_IRQS                 NR_IRQS_PBA8
+#endif
+
+#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8)
+#undef MAX_GIC_NR
+#define MAX_GIC_NR              NR_GIC_PBA8
+#endif
+
+#endif  /* CONFIG_MACH_REALVIEW_PBA8 */
+
+#endif  /* __ASM_ARCH_BOARD_PBA8_H */
diff --git a/arch/arm/mach-realview/include/mach/clkdev.h b/arch/arm/mach-realview/include/mach/clkdev.h
new file mode 100644
index 000000000000..04b37a89801c
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do { } while (0)
+
+#endif
diff --git a/arch/arm/mach-realview/include/mach/debug-macro.S b/arch/arm/mach-realview/include/mach/debug-macro.S
index 7196bcadff0c..92dbcb9e1792 100644
--- a/arch/arm/mach-realview/include/mach/debug-macro.S
+++ b/arch/arm/mach-realview/include/mach/debug-macro.S
@@ -8,15 +8,36 @@
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
- *
-*/
+ */
+
+#if defined(CONFIG_MACH_REALVIEW_EB) || \
+    defined(CONFIG_MACH_REALVIEW_PB11MP) || \
+    defined(CONFIG_MACH_REALVIEW_PBA8)
+#ifndef DEBUG_LL_UART_OFFSET
+#define DEBUG_LL_UART_OFFSET    0x00009000
+#elif DEBUG_LL_UART_OFFSET != 0x00009000
+#warning "DEBUG_LL_UART_OFFSET already defined to a different value"
+#endif
+#endif
+
+#ifdef CONFIG_MACH_REALVIEW_PB1176
+#ifndef DEBUG_LL_UART_OFFSET
+#define DEBUG_LL_UART_OFFSET    0x0010c000
+#elif DEBUG_LL_UART_OFFSET != 0x0010c000
+#warning "DEBUG_LL_UART_OFFSET already defined to a different value"
+#endif
+#endif
+
+#ifndef DEBUG_LL_UART_OFFSET
+#error "Unknown RealView platform"
+#endif
 
                 .macro  addruart,rx
                 mrc     p15, 0, \rx, c1, c0
                 tst     \rx, #1                 @ MMU enabled?
                 moveq   \rx,      #0x10000000
-                movne   \rx,      #0xf0000000   @ virtual base
-                orr     \rx, \rx, #0x00009000
+                movne   \rx,      #0xfb000000   @ virtual base
+                orr     \rx, \rx, #DEBUG_LL_UART_OFFSET
                 .endm
 
 #include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-realview/include/mach/dma.h b/arch/arm/mach-realview/include/mach/dma.h
deleted file mode 100644
index f1a5a1a10952..000000000000
--- a/arch/arm/mach-realview/include/mach/dma.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- *  arch/arm/mach-realview/include/mach/dma.h
- *
- *  Copyright (C) 2003 ARM Limited.
- *  Copyright (C) 1997,1998 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
diff --git a/arch/arm/mach-realview/include/mach/hardware.h b/arch/arm/mach-realview/include/mach/hardware.h
index 79a93b3dfca9..b42c14f89acb 100644
--- a/arch/arm/mach-realview/include/mach/hardware.h
+++ b/arch/arm/mach-realview/include/mach/hardware.h
@@ -25,7 +25,14 @@
 #include <asm/sizes.h>
 
 /* macro to get at IO space when running virtually */
-#define IO_ADDRESS(x)           (((x) & 0x0fffffff) + 0xf0000000)
+/*
+ * Statically mapped addresses:
+ *
+ * 10xx xxxx -> fbxx xxxx
+ * 1exx xxxx -> fdxx xxxx
+ * 1fxx xxxx -> fexx xxxx
+ */
+#define IO_ADDRESS(x)           (((x) & 0x03ffffff) + 0xfb000000)
 #define __io_address(n)         __io(IO_ADDRESS(n))
 
 #endif
diff --git a/arch/arm/mach-realview/include/mach/io.h b/arch/arm/mach-realview/include/mach/io.h
index aa069424d310..f05bcdf605d8 100644
--- a/arch/arm/mach-realview/include/mach/io.h
+++ b/arch/arm/mach-realview/include/mach/io.h
@@ -22,12 +22,7 @@
 
 #define IO_SPACE_LIMIT 0xffffffff
 
-static inline void __iomem *__io(unsigned long addr)
-{
-        return (void __iomem *)addr;
-}
-
-#define __io(a)                 __io(a)
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-realview/include/mach/irqs.h b/arch/arm/mach-realview/include/mach/irqs.h
index 02a918529db3..fe5cb987aa21 100644
--- a/arch/arm/mach-realview/include/mach/irqs.h
+++ b/arch/arm/mach-realview/include/mach/irqs.h
@@ -25,6 +25,7 @@
 #include <mach/board-eb.h>
 #include <mach/board-pb11mp.h>
 #include <mach/board-pb1176.h>
+#include <mach/board-pba8.h>
 
 #define IRQ_LOCALTIMER          29
 #define IRQ_LOCALWDOG           30
diff --git a/arch/arm/mach-realview/include/mach/memory.h b/arch/arm/mach-realview/include/mach/memory.h
index 0e673483a141..293c30025e7e 100644
--- a/arch/arm/mach-realview/include/mach/memory.h
+++ b/arch/arm/mach-realview/include/mach/memory.h
@@ -23,16 +23,10 @@
 /*
  * Physical DRAM offset.
  */
+#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
+#define PHYS_OFFSET             UL(0x70000000)
+#else
 #define PHYS_OFFSET             UL(0x00000000)
-
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x)        ((x) - PAGE_OFFSET)
-#define __bus_to_virt(x)        ((x) + PAGE_OFFSET)
+#endif
 
 #endif
diff --git a/arch/arm/mach-realview/include/mach/uncompress.h b/arch/arm/mach-realview/include/mach/uncompress.h
index 79f50f218e77..415d634d52ab 100644
--- a/arch/arm/mach-realview/include/mach/uncompress.h
+++ b/arch/arm/mach-realview/include/mach/uncompress.h
@@ -23,6 +23,7 @@
 #include <mach/board-eb.h>
 #include <mach/board-pb11mp.h>
 #include <mach/board-pb1176.h>
+#include <mach/board-pba8.h>
 
 #define AMBA_UART_DR(base)      (*(volatile unsigned char *)((base) + 0x00))
 #define AMBA_UART_LCRH(base)    (*(volatile unsigned char *)((base) + 0x2c))
@@ -40,6 +41,8 @@ static inline unsigned long get_uart_base(void)
                 return REALVIEW_PB11MP_UART0_BASE;
         else if (machine_is_realview_pb1176())
                 return REALVIEW_PB1176_UART0_BASE;
+        else if (machine_is_realview_pba8())
+                return REALVIEW_PBA8_UART0_BASE;
         else
                 return 0;
 }
diff --git a/arch/arm/mach-realview/include/mach/vmalloc.h b/arch/arm/mach-realview/include/mach/vmalloc.h
index 48cbcc873db2..fe0de1b507ac 100644
--- a/arch/arm/mach-realview/include/mach/vmalloc.h
+++ b/arch/arm/mach-realview/include/mach/vmalloc.h
@@ -18,4 +18,4 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
-#define VMALLOC_END             (PAGE_OFFSET + 0x18000000)
+#define VMALLOC_END             0xf8000000
diff --git a/arch/arm/mach-realview/localtimer.c b/arch/arm/mach-realview/localtimer.c
index 44d178cd5733..9019ef2e5611 100644
--- a/arch/arm/mach-realview/localtimer.c
+++ b/arch/arm/mach-realview/localtimer.c
@@ -38,18 +38,14 @@ void local_timer_interrupt(void)
 
 #ifdef CONFIG_LOCAL_TIMERS
 
-#define TWD_BASE(cpu)   (twd_base_addr + (cpu) * twd_size)
-
 /* set up by the platform code */
-void __iomem *twd_base_addr;
-unsigned int twd_size;
+void __iomem *twd_base;
 
 static unsigned long mpcore_timer_rate;
 
 static void local_timer_set_mode(enum clock_event_mode mode,
                                  struct clock_event_device *clk)
 {
-        void __iomem *base = TWD_BASE(smp_processor_id());
         unsigned long ctrl;
 
         switch(mode) {
@@ -68,17 +64,16 @@ static void local_timer_set_mode(enum clock_event_mode mode,
                 ctrl = 0;
         }
 
-        __raw_writel(ctrl, base + TWD_TIMER_CONTROL);
+        __raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL);
 }
 
 static int local_timer_set_next_event(unsigned long evt,
                                       struct clock_event_device *unused)
 {
-        void __iomem *base = TWD_BASE(smp_processor_id());
-        unsigned long ctrl = __raw_readl(base + TWD_TIMER_CONTROL);
+        unsigned long ctrl = __raw_readl(twd_base + TWD_TIMER_CONTROL);
 
-        __raw_writel(evt, base + TWD_TIMER_COUNTER);
-        __raw_writel(ctrl | TWD_TIMER_CONTROL_ENABLE, base + TWD_TIMER_CONTROL);
+        __raw_writel(evt, twd_base + TWD_TIMER_COUNTER);
+        __raw_writel(ctrl | TWD_TIMER_CONTROL_ENABLE, twd_base + TWD_TIMER_CONTROL);
 
         return 0;
 }
@@ -91,19 +86,16 @@ static int local_timer_set_next_event(unsigned long evt,
  */
 int local_timer_ack(void)
 {
-        void __iomem *base = TWD_BASE(smp_processor_id());
-
-        if (__raw_readl(base + TWD_TIMER_INTSTAT)) {
-                __raw_writel(1, base + TWD_TIMER_INTSTAT);
+        if (__raw_readl(twd_base + TWD_TIMER_INTSTAT)) {
+                __raw_writel(1, twd_base + TWD_TIMER_INTSTAT);
                 return 1;
         }
 
         return 0;
 }
 
-static void __cpuinit twd_calibrate_rate(unsigned int cpu)
+static void __cpuinit twd_calibrate_rate(void)
 {
-        void __iomem *base = TWD_BASE(cpu);
         unsigned long load, count;
         u64 waitjiffies;
 
@@ -124,15 +116,15 @@ static void __cpuinit twd_calibrate_rate(unsigned int cpu)
                 waitjiffies += 5;
 
                                  /* enable, no interrupt or reload */
-                __raw_writel(0x1, base + TWD_TIMER_CONTROL);
+                __raw_writel(0x1, twd_base + TWD_TIMER_CONTROL);
 
                                  /* maximum value */
-                __raw_writel(0xFFFFFFFFU, base + TWD_TIMER_COUNTER);
+                __raw_writel(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER);
 
                 while (get_jiffies_64() < waitjiffies)
                         udelay(10);
 
-                count = __raw_readl(base + TWD_TIMER_COUNTER);
+                count = __raw_readl(twd_base + TWD_TIMER_COUNTER);
 
                 mpcore_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
 
@@ -142,18 +134,19 @@ static void __cpuinit twd_calibrate_rate(unsigned int cpu)
 
         load = mpcore_timer_rate / HZ;
 
-        __raw_writel(load, base + TWD_TIMER_LOAD);
+        __raw_writel(load, twd_base + TWD_TIMER_LOAD);
 }
 
 /*
  * Setup the local clock events for a CPU.
  */
-void __cpuinit local_timer_setup(unsigned int cpu)
+void __cpuinit local_timer_setup(void)
 {
+        unsigned int cpu = smp_processor_id();
         struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
         unsigned long flags;
 
-        twd_calibrate_rate(cpu);
+        twd_calibrate_rate();
 
         clk->name               = "local_timer";
         clk->features           = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
@@ -178,9 +171,9 @@ void __cpuinit local_timer_setup(unsigned int cpu)
 /*
  * take a local timer down
  */
-void __cpuexit local_timer_stop(unsigned int cpu)
+void __cpuexit local_timer_stop(void)
 {
-        __raw_writel(0, TWD_BASE(cpu) + TWD_TIMER_CONTROL);
+        __raw_writel(0, twd_base + TWD_TIMER_CONTROL);
 }
 
 #else   /* CONFIG_LOCAL_TIMERS */
@@ -190,8 +183,9 @@ static void dummy_timer_set_mode(enum clock_event_mode mode,
 {
 }
 
-void __cpuinit local_timer_setup(unsigned int cpu)
+void __cpuinit local_timer_setup(void)
 {
+        unsigned int cpu = smp_processor_id();
         struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
 
         clk->name               = "dummy_timer";
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index e102aeb0f76e..8fce85f33033 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -23,6 +23,8 @@
 #include <mach/board-pb11mp.h>
 #include <mach/scu.h>
 
+#include "core.h"
+
 extern void realview_secondary_startup(void);
 
 /*
@@ -31,15 +33,20 @@ extern void realview_secondary_startup(void);
  */
 volatile int __cpuinitdata pen_release = -1;
 
+static void __iomem *scu_base_addr(void)
+{
+        if (machine_is_realview_eb_mp())
+                return __io_address(REALVIEW_EB11MP_SCU_BASE);
+        else if (machine_is_realview_pb11mp())
+                return __io_address(REALVIEW_TC11MP_SCU_BASE);
+        else
+                return (void __iomem *)0;
+}
+
 static unsigned int __init get_core_count(void)
 {
         unsigned int ncores;
-        void __iomem *scu_base = 0;
-
-        if (machine_is_realview_eb() && core_tile_eb11mp())
-                scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
-        else if (machine_is_realview_pb11mp())
-                scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
+        void __iomem *scu_base = scu_base_addr();
 
         if (scu_base) {
                 ncores = __raw_readl(scu_base + SCU_CONFIG);
@@ -56,14 +63,7 @@ static unsigned int __init get_core_count(void)
 static void scu_enable(void)
 {
         u32 scu_ctrl;
-        void __iomem *scu_base;
-
-        if (machine_is_realview_eb() && core_tile_eb11mp())
-                scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
-        else if (machine_is_realview_pb11mp())
-                scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
-        else
-                BUG();
+        void __iomem *scu_base = scu_base_addr();
 
         scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
         scu_ctrl |= 1;
@@ -88,10 +88,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
          * core (e.g. timer irq), then they will not have been enabled
          * for us: do so
          */
-        if (machine_is_realview_eb() && core_tile_eb11mp())
-                gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
-        else if (machine_is_realview_pb11mp())
-                gic_cpu_init(0, __io_address(REALVIEW_TC11MP_GIC_CPU_BASE));
+        gic_cpu_init(0, gic_cpu_base_addr);
 
         /*
          * let the primary processor know we're out of the
@@ -232,9 +229,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
          * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
          * realview_timer_init
          */
-        if ((machine_is_realview_eb() && core_tile_eb11mp()) ||
-            machine_is_realview_pb11mp())
-                local_timer_setup(cpu);
+        local_timer_setup();
 #endif
 
         /*
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index eb829eb1ebe2..bed39ed97613 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -108,7 +108,7 @@ static struct map_desc realview_eb11mp_io_desc[] __initdata = {
 static void __init realview_eb_map_io(void)
 {
         iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
-        if (core_tile_eb11mp())
+        if (core_tile_eb11mp() || core_tile_a9mp())
                 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
 }
 
@@ -242,12 +242,6 @@ static struct resource realview_eb_eth_resources[] = {
         },
 };
 
-static struct platform_device realview_eb_eth_device = {
-        .id             = 0,
-        .num_resources  = ARRAY_SIZE(realview_eb_eth_resources),
-        .resource       = realview_eb_eth_resources,
-};
-
 /*
  * Detect and register the correct Ethernet device. RealView/EB rev D
  * platforms use the newer SMSC LAN9118 Ethernet chip
@@ -255,26 +249,24 @@ static struct platform_device realview_eb_eth_device = {
 static int eth_device_register(void)
 {
         void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
+        const char *name = NULL;
         u32 idrev;
 
         if (!eth_addr)
                 return -ENOMEM;
 
         idrev = readl(eth_addr + 0x50);
-        if ((idrev & 0xFFFF0000) == 0x01180000)
-                /* SMSC LAN9118 chip present */
-                realview_eb_eth_device.name = "smc911x";
-        else
-                /* SMSC 91C111 chip present */
-                realview_eb_eth_device.name = "smc91x";
+        if ((idrev & 0xFFFF0000) != 0x01180000)
+                /* SMSC LAN9118 not present, use LAN91C111 instead */
+                name = "smc91x";
 
         iounmap(eth_addr);
-        return platform_device_register(&realview_eb_eth_device);
+        return realview_eth_register(name, realview_eb_eth_resources);
 }
 
 static void __init gic_init_irq(void)
 {
-        if (core_tile_eb11mp()) {
+        if (core_tile_eb11mp() || core_tile_a9mp()) {
                 unsigned int pldctrl;
 
                 /* new irq mode */
@@ -342,10 +334,9 @@ static void __init realview_eb_timer_init(void)
         timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
         timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
 
-        if (core_tile_eb11mp()) {
+        if (core_tile_eb11mp() || core_tile_a9mp()) {
 #ifdef CONFIG_LOCAL_TIMERS
-                twd_base_addr = __io_address(REALVIEW_EB11MP_TWD_BASE);
-                twd_size = REALVIEW_EB11MP_TWD_SIZE;
+                twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE);
 #endif
                 timer_irq = IRQ_EB11MP_TIMER0_1;
         } else
@@ -362,7 +353,7 @@ static void __init realview_eb_init(void)
 {
         int i;
 
-        if (core_tile_eb11mp()) {
+        if (core_tile_eb11mp() || core_tile_a9mp()) {
                 realview_eb11mp_fixup();
 
 #ifdef CONFIG_CACHE_L2X0
@@ -372,8 +363,6 @@ static void __init realview_eb_init(void)
 #endif
         }
 
-        clk_register(&realview_clcd_clk);
-
         realview_flash_register(&realview_eb_flash_resource, 1);
         platform_device_register(&realview_i2c_device);
         eth_device_register();
@@ -392,7 +381,7 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
         .phys_io        = REALVIEW_EB_UART0_BASE,
         .io_pg_offst    = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = PHYS_OFFSET + 0x00000100,
         .map_io         = realview_eb_map_io,
         .init_irq       = gic_init_irq,
         .timer          = &realview_eb_timer,
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index cccdb3eb90fe..8f0683c22140 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -222,13 +222,6 @@ static struct resource realview_pb1176_smsc911x_resources[] = {
         },
 };
 
-static struct platform_device realview_pb1176_smsc911x_device = {
-        .name           = "smc911x",
-        .id             = 0,
-        .num_resources  = ARRAY_SIZE(realview_pb1176_smsc911x_resources),
-        .resource       = realview_pb1176_smsc911x_resources,
-};
-
 static void __init gic_init_irq(void)
 {
         /* ARM1176 DevChip GIC, primary */
@@ -265,10 +258,8 @@ static void __init realview_pb1176_init(void)
         l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
 #endif
 
-        clk_register(&realview_clcd_clk);
-
         realview_flash_register(&realview_pb1176_flash_resource, 1);
-        platform_device_register(&realview_pb1176_smsc911x_device);
+        realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
 
         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
                 struct amba_device *d = amba_devs[i];
@@ -284,7 +275,7 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
         .phys_io        = REALVIEW_PB1176_UART0_BASE,
         .io_pg_offst    = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = PHYS_OFFSET + 0x00000100,
         .map_io         = realview_pb1176_map_io,
         .init_irq       = gic_init_irq,
         .timer          = &realview_pb1176_timer,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 8b863148ec18..3ebdb2dadd6f 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -230,13 +230,6 @@ static struct resource realview_pb11mp_smsc911x_resources[] = {
         },
 };
 
-static struct platform_device realview_pb11mp_smsc911x_device = {
-        .name           = "smc911x",
-        .id             = 0,
-        .num_resources  = ARRAY_SIZE(realview_pb11mp_smsc911x_resources),
-        .resource       = realview_pb11mp_smsc911x_resources,
-};
-
 struct resource realview_pb11mp_cf_resources[] = {
         [0] = {
                 .start          = REALVIEW_PB11MP_CF_BASE,
@@ -292,8 +285,7 @@ static void __init realview_pb11mp_timer_init(void)
         timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
 
 #ifdef CONFIG_LOCAL_TIMERS
-        twd_base_addr = __io_address(REALVIEW_TC11MP_TWD_BASE);
-        twd_size = REALVIEW_TC11MP_TWD_SIZE;
+        twd_base = __io_address(REALVIEW_TC11MP_TWD_BASE);
 #endif
         realview_timer_init(IRQ_TC11MP_TIMER0_1);
 }
@@ -312,11 +304,9 @@ static void __init realview_pb11mp_init(void)
         l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
 #endif
 
-        clk_register(&realview_clcd_clk);
-
         realview_flash_register(realview_pb11mp_flash_resource,
                                 ARRAY_SIZE(realview_pb11mp_flash_resource));
-        platform_device_register(&realview_pb11mp_smsc911x_device);
+        realview_eth_register(NULL, realview_pb11mp_smsc911x_resources);
         platform_device_register(&realview_i2c_device);
         platform_device_register(&realview_pb11mp_cf_device);
 
@@ -334,7 +324,7 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
         .phys_io        = REALVIEW_PB11MP_UART0_BASE,
         .io_pg_offst    = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc,
-        .boot_params    = 0x00000100,
+        .boot_params    = PHYS_OFFSET + 0x00000100,
         .map_io         = realview_pb11mp_map_io,
         .init_irq       = gic_init_irq,
         .timer          = &realview_pb11mp_timer,
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
new file mode 100644
index 000000000000..34c94435d2d8
--- /dev/null
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -0,0 +1,300 @@
+/*
+ *  linux/arch/arm/mach-realview/realview_pba8.c
+ *
+ *  Copyright (C) 2008 ARM Limited
+ *  Copyright (C) 2000 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/sysdev.h>
+#include <linux/amba/bus.h>
+#include <linux/io.h>
+
+#include <asm/irq.h>
+#include <asm/leds.h>
+#include <asm/mach-types.h>
+#include <asm/hardware/gic.h>
+#include <asm/hardware/icst307.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/mmc.h>
+#include <asm/mach/time.h>
+
+#include <mach/hardware.h>
+#include <mach/board-pba8.h>
+#include <mach/irqs.h>
+
+#include "core.h"
+#include "clock.h"
+
+static struct map_desc realview_pba8_io_desc[] __initdata = {
+        {
+                .virtual        = IO_ADDRESS(REALVIEW_SYS_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_SYS_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = IO_ADDRESS(REALVIEW_PBA8_GIC_CPU_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_PBA8_GIC_CPU_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = IO_ADDRESS(REALVIEW_PBA8_GIC_DIST_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_PBA8_GIC_DIST_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = IO_ADDRESS(REALVIEW_SCTL_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_SCTL_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = IO_ADDRESS(REALVIEW_PBA8_TIMER0_1_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_PBA8_TIMER0_1_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = IO_ADDRESS(REALVIEW_PBA8_TIMER2_3_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_PBA8_TIMER2_3_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+#ifdef CONFIG_PCI
+        {
+                .virtual        = PCIX_UNIT_BASE,
+                .pfn            = __phys_to_pfn(REALVIEW_PBA8_PCI_BASE),
+                .length         = REALVIEW_PBA8_PCI_BASE_SIZE,
+                .type           = MT_DEVICE
+        },
+#endif
+#ifdef CONFIG_DEBUG_LL
+        {
+                .virtual        = IO_ADDRESS(REALVIEW_PBA8_UART0_BASE),
+                .pfn            = __phys_to_pfn(REALVIEW_PBA8_UART0_BASE),
+                .length         = SZ_4K,
+                .type           = MT_DEVICE,
+        },
+#endif
+};
+
+static void __init realview_pba8_map_io(void)
+{
+        iotable_init(realview_pba8_io_desc, ARRAY_SIZE(realview_pba8_io_desc));
+}
+
+/*
+ * RealView PBA8Core AMBA devices
+ */
+
+#define GPIO2_IRQ               { IRQ_PBA8_GPIO2, NO_IRQ }
+#define GPIO2_DMA               { 0, 0 }
+#define GPIO3_IRQ               { IRQ_PBA8_GPIO3, NO_IRQ }
+#define GPIO3_DMA               { 0, 0 }
+#define AACI_IRQ                { IRQ_PBA8_AACI, NO_IRQ }
+#define AACI_DMA                { 0x80, 0x81 }
+#define MMCI0_IRQ               { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
+#define MMCI0_DMA               { 0x84, 0 }
+#define KMI0_IRQ                { IRQ_PBA8_KMI0, NO_IRQ }
+#define KMI0_DMA                { 0, 0 }
+#define KMI1_IRQ                { IRQ_PBA8_KMI1, NO_IRQ }
+#define KMI1_DMA                { 0, 0 }
+#define PBA8_SMC_IRQ            { NO_IRQ, NO_IRQ }
+#define PBA8_SMC_DMA            { 0, 0 }
+#define MPMC_IRQ                { NO_IRQ, NO_IRQ }
+#define MPMC_DMA                { 0, 0 }
+#define PBA8_CLCD_IRQ           { IRQ_PBA8_CLCD, NO_IRQ }
+#define PBA8_CLCD_DMA           { 0, 0 }
+#define DMAC_IRQ                { IRQ_PBA8_DMAC, NO_IRQ }
+#define DMAC_DMA                { 0, 0 }
+#define SCTL_IRQ                { NO_IRQ, NO_IRQ }
+#define SCTL_DMA                { 0, 0 }
+#define PBA8_WATCHDOG_IRQ       { IRQ_PBA8_WATCHDOG, NO_IRQ }
+#define PBA8_WATCHDOG_DMA       { 0, 0 }
+#define PBA8_GPIO0_IRQ          { IRQ_PBA8_GPIO0, NO_IRQ }
+#define PBA8_GPIO0_DMA          { 0, 0 }
+#define GPIO1_IRQ               { IRQ_PBA8_GPIO1, NO_IRQ }
+#define GPIO1_DMA               { 0, 0 }
+#define PBA8_RTC_IRQ            { IRQ_PBA8_RTC, NO_IRQ }
+#define PBA8_RTC_DMA            { 0, 0 }
+#define SCI_IRQ                 { IRQ_PBA8_SCI, NO_IRQ }
+#define SCI_DMA                 { 7, 6 }
+#define PBA8_UART0_IRQ          { IRQ_PBA8_UART0, NO_IRQ }
+#define PBA8_UART0_DMA          { 15, 14 }
+#define PBA8_UART1_IRQ          { IRQ_PBA8_UART1, NO_IRQ }
+#define PBA8_UART1_DMA          { 13, 12 }
+#define PBA8_UART2_IRQ          { IRQ_PBA8_UART2, NO_IRQ }
+#define PBA8_UART2_DMA          { 11, 10 }
+#define PBA8_UART3_IRQ          { IRQ_PBA8_UART3, NO_IRQ }
+#define PBA8_UART3_DMA          { 0x86, 0x87 }
+#define PBA8_SSP_IRQ            { IRQ_PBA8_SSP, NO_IRQ }
+#define PBA8_SSP_DMA            { 9, 8 }
+
+/* FPGA Primecells */
+AMBA_DEVICE(aaci,       "fpga:04",      AACI,           NULL);
+AMBA_DEVICE(mmc0,       "fpga:05",      MMCI0,          &realview_mmc0_plat_data);
+AMBA_DEVICE(kmi0,       "fpga:06",      KMI0,           NULL);
+AMBA_DEVICE(kmi1,       "fpga:07",      KMI1,           NULL);
+AMBA_DEVICE(uart3,      "fpga:09",      PBA8_UART3,     NULL);
+
+/* DevChip Primecells */
+AMBA_DEVICE(smc,        "dev:00",       PBA8_SMC,       NULL);
+AMBA_DEVICE(sctl,       "dev:e0",       SCTL,           NULL);
+AMBA_DEVICE(wdog,       "dev:e1",       PBA8_WATCHDOG, NULL);
+AMBA_DEVICE(gpio0,      "dev:e4",       PBA8_GPIO0,     NULL);
+AMBA_DEVICE(gpio1,      "dev:e5",       GPIO1,          NULL);
+AMBA_DEVICE(gpio2,      "dev:e6",       GPIO2,          NULL);
+AMBA_DEVICE(rtc,        "dev:e8",       PBA8_RTC,       NULL);
+AMBA_DEVICE(sci0,       "dev:f0",       SCI,            NULL);
+AMBA_DEVICE(uart0,      "dev:f1",       PBA8_UART0,     NULL);
+AMBA_DEVICE(uart1,      "dev:f2",       PBA8_UART1,     NULL);
+AMBA_DEVICE(uart2,      "dev:f3",       PBA8_UART2,     NULL);
+AMBA_DEVICE(ssp0,       "dev:f4",       PBA8_SSP,       NULL);
+
+/* Primecells on the NEC ISSP chip */
+AMBA_DEVICE(clcd,       "issp:20",      PBA8_CLCD,      &clcd_plat_data);
+AMBA_DEVICE(dmac,       "issp:30",      DMAC,           NULL);
+
+static struct amba_device *amba_devs[] __initdata = {
+        &dmac_device,
+        &uart0_device,
+        &uart1_device,
+        &uart2_device,
+        &uart3_device,
+        &smc_device,
+        &clcd_device,
+        &sctl_device,
+        &wdog_device,
+        &gpio0_device,
+        &gpio1_device,
+        &gpio2_device,
+        &rtc_device,
+        &sci0_device,
+        &ssp0_device,
+        &aaci_device,
+        &mmc0_device,
+        &kmi0_device,
+        &kmi1_device,
+};
+
+/*
+ * RealView PB-A8 platform devices
+ */
+static struct resource realview_pba8_flash_resource[] = {
+        [0] = {
+                .start          = REALVIEW_PBA8_FLASH0_BASE,
+                .end            = REALVIEW_PBA8_FLASH0_BASE + REALVIEW_PBA8_FLASH0_SIZE - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start          = REALVIEW_PBA8_FLASH1_BASE,
+                .end            = REALVIEW_PBA8_FLASH1_BASE + REALVIEW_PBA8_FLASH1_SIZE - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+static struct resource realview_pba8_smsc911x_resources[] = {
+        [0] = {
+                .start          = REALVIEW_PBA8_ETH_BASE,
+                .end            = REALVIEW_PBA8_ETH_BASE + SZ_64K - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start          = IRQ_PBA8_ETH,
+                .end            = IRQ_PBA8_ETH,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+struct resource realview_pba8_cf_resources[] = {
+        [0] = {
+                .start          = REALVIEW_PBA8_CF_BASE,
+                .end            = REALVIEW_PBA8_CF_BASE + SZ_4K - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start          = REALVIEW_PBA8_CF_MEM_BASE,
+                .end            = REALVIEW_PBA8_CF_MEM_BASE + SZ_4K - 1,
+                .flags          = IORESOURCE_MEM,
+        },
+        [2] = {
+                .start          = -1,           /* FIXME: Find correct irq */
+                .end            = -1,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device realview_pba8_cf_device = {
+        .name           = "compactflash",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(realview_pba8_cf_resources),
+        .resource       = realview_pba8_cf_resources,
+};
+
+static void __init gic_init_irq(void)
+{
+        /* ARM PB-A8 on-board GIC */
+        gic_cpu_base_addr = __io_address(REALVIEW_PBA8_GIC_CPU_BASE);
+        gic_dist_init(0, __io_address(REALVIEW_PBA8_GIC_DIST_BASE), IRQ_PBA8_GIC_START);
+        gic_cpu_init(0, __io_address(REALVIEW_PBA8_GIC_CPU_BASE));
+}
+
+static void __init realview_pba8_timer_init(void)
+{
+        timer0_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE);
+        timer1_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE) + 0x20;
+        timer2_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE);
+        timer3_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE) + 0x20;
+
+        realview_timer_init(IRQ_PBA8_TIMER0_1);
+}
+
+static struct sys_timer realview_pba8_timer = {
+        .init           = realview_pba8_timer_init,
+};
+
+static void __init realview_pba8_init(void)
+{
+        int i;
+
+        realview_flash_register(realview_pba8_flash_resource,
+                                ARRAY_SIZE(realview_pba8_flash_resource));
+        realview_eth_register(NULL, realview_pba8_smsc911x_resources);
+        platform_device_register(&realview_i2c_device);
+        platform_device_register(&realview_pba8_cf_device);
+
+        for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
+                struct amba_device *d = amba_devs[i];
+                amba_device_register(d, &iomem_resource);
+        }
+
+#ifdef CONFIG_LEDS
+        leds_event = realview_leds_event;
+#endif
+}
+
+MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
+        /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
+        .phys_io        = REALVIEW_PBA8_UART0_BASE,
+        .io_pg_offst    = (IO_ADDRESS(REALVIEW_PBA8_UART0_BASE) >> 18) & 0xfffc,
+        .boot_params    = PHYS_OFFSET + 0x00000100,
+        .map_io         = realview_pba8_map_io,
+        .init_irq       = gic_init_irq,
+        .timer          = &realview_pba8_timer,
+        .init_machine   = realview_pba8_init,
+MACHINE_END
diff --git a/arch/arm/mach-rpc/include/mach/io.h b/arch/arm/mach-rpc/include/mach/io.h
index 9f0553b7ec28..20da7f486e51 100644
--- a/arch/arm/mach-rpc/include/mach/io.h
+++ b/arch/arm/mach-rpc/include/mach/io.h
@@ -18,49 +18,6 @@
 #define IO_SPACE_LIMIT 0xffffffff
 
 /*
- * GCC is totally crap at loading/storing data.  We try to persuade it
- * to do the right thing by using these whereever possible instead of
- * the above.
- */
-#define __arch_base_getb(b,o)                   \
- ({                                             \
-        unsigned int __v, __r = (b);            \
-        __asm__ __volatile__(                   \
-                "ldrb   %0, [%1, %2]"           \
-                : "=r" (__v)                    \
-                : "r" (__r), "Ir" (o));         \
-        __v;                                    \
- })
-
-#define __arch_base_getl(b,o)                   \
- ({                                             \
-        unsigned int __v, __r = (b);            \
-        __asm__ __volatile__(                   \
-                "ldr    %0, [%1, %2]"           \
-                : "=r" (__v)                    \
-                : "r" (__r), "Ir" (o));         \
-        __v;                                    \
- })
-
-#define __arch_base_putb(v,b,o)                 \
- ({                                             \
-        unsigned int __r = (b);                 \
-        __asm__ __volatile__(                   \
-                "strb   %0, [%1, %2]"           \
-                :                               \
-                : "r" (v), "r" (__r), "Ir" (o));\
- })
-
-#define __arch_base_putl(v,b,o)                 \
- ({                                             \
-        unsigned int __r = (b);                 \
-        __asm__ __volatile__(                   \
-                "str    %0, [%1, %2]"           \
-                :                               \
-                : "r" (v), "r" (__r), "Ir" (o));\
- })
-
-/*
  * We use two different types of addressing - PC style addresses, and ARM
  * addresses.  PC style accesses the PC hardware with the normal PC IO
  * addresses, eg 0x3f8 for serial#1.  ARM addresses are 0x80000000+
@@ -232,15 +189,13 @@ DECLARE_IO(int,l,"")
         result;                                                                 \
 })
 
-#define __ioaddrc(port)         __ioaddr(port)
-
 #define inb(p)          (__builtin_constant_p((p)) ? __inbc(p)    : __inb(p))
 #define inw(p)          (__builtin_constant_p((p)) ? __inwc(p)    : __inw(p))
 #define inl(p)          (__builtin_constant_p((p)) ? __inlc(p)    : __inl(p))
 #define outb(v,p)       (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
 #define outw(v,p)       (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
 #define outl(v,p)       (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
-#define __ioaddr(p)     (__builtin_constant_p((p)) ? __ioaddr(p)  : __ioaddrc(p))
+
 /* the following macro is deprecated */
 #define ioaddr(port)    ((unsigned long)__ioaddr((port)))
 
diff --git a/arch/arm/mach-rpc/include/mach/irqs.h b/arch/arm/mach-rpc/include/mach/irqs.h
index 4ce6ca97f669..3d2037496e38 100644
--- a/arch/arm/mach-rpc/include/mach/irqs.h
+++ b/arch/arm/mach-rpc/include/mach/irqs.h
@@ -44,3 +44,4 @@
 
 #define IRQ_TIMER               IRQ_TIMER0
 
+#define NR_IRQS                 128
diff --git a/arch/arm/mach-rpc/include/mach/dma.h b/arch/arm/mach-rpc/include/mach/isa-dma.h
index 360b56f8f29f..bad720548587 100644
--- a/arch/arm/mach-rpc/include/mach/dma.h
+++ b/arch/arm/mach-rpc/include/mach/isa-dma.h
@@ -1,5 +1,5 @@
 /*
- *  arch/arm/mach-rpc/include/mach/dma.h
+ *  arch/arm/mach-rpc/include/mach/isa-dma.h
  *
  *  Copyright (C) 1997 Russell King
  *
@@ -10,12 +10,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-/*
- * This is the maximum DMA address that can be DMAd to.
- * There should not be more than (0xd0000000 - 0xc0000000)
- * bytes of RAM.
- */
-#define MAX_DMA_ADDRESS         0xd0000000
 #define MAX_DMA_CHANNELS        8
 
 #define DMA_0                   0
diff --git a/arch/arm/mach-rpc/include/mach/memory.h b/arch/arm/mach-rpc/include/mach/memory.h
index 9bf7e43e2863..78191bf25192 100644
--- a/arch/arm/mach-rpc/include/mach/memory.h
+++ b/arch/arm/mach-rpc/include/mach/memory.h
@@ -24,13 +24,6 @@
 #define PHYS_OFFSET     UL(0x10000000)
 
 /*
- * These are exactly the same on the RiscPC as the
- * physical memory view.
- */
-#define __virt_to_bus(x) __virt_to_phys(x)
-#define __bus_to_virt(x) __phys_to_virt(x)
-
-/*
  * Cache flushing area - ROM
  */
 #define FLUSH_BASE_PHYS         0x00000000
diff --git a/arch/arm/mach-s3c2400/include/mach/memory.h b/arch/arm/mach-s3c2400/include/mach/memory.h
index 8f4878e4f591..cf5901ffd385 100644
--- a/arch/arm/mach-s3c2400/include/mach/memory.h
+++ b/arch/arm/mach-s3c2400/include/mach/memory.h
@@ -17,7 +17,4 @@
 
 #define PHYS_OFFSET     UL(0x0C000000)
 
-#define __virt_to_bus(x) __virt_to_phys(x)
-#define __bus_to_virt(x) __phys_to_virt(x)
-
 #endif
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index 99fdc736698c..7315569fbfd7 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -7,6 +7,7 @@
 config CPU_S3C2410
         bool
         depends on ARCH_S3C2410
+        select CPU_ARM920T
         select S3C2410_CLOCK
         select S3C2410_GPIO
         select CPU_LLSERIAL_S3C2410
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 7d914a470b6c..552b4c778fdc 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -17,7 +17,6 @@
 #include <linux/sysdev.h>
 #include <linux/serial_core.h>
 
-#include <asm/dma.h>
 #include <mach/dma.h>
 
 #include <plat/cpu.h>
@@ -25,12 +24,12 @@
 
 #include <plat/regs-serial.h>
 #include <mach/regs-gpio.h>
-#include <asm/plat-s3c/regs-ac97.h>
+#include <plat/regs-ac97.h>
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
 #include <asm/plat-s3c24xx/regs-iis.h>
-#include <asm/plat-s3c24xx/regs-spi.h>
+#include <plat/regs-spi.h>
 
 static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
         [DMACH_XD0] = {
diff --git a/arch/arm/mach-s3c2410/include/mach/dma.h b/arch/arm/mach-s3c2410/include/mach/dma.h
index 891b53cd69b8..13358ce2128c 100644
--- a/arch/arm/mach-s3c2410/include/mach/dma.h
+++ b/arch/arm/mach-s3c2410/include/mach/dma.h
@@ -16,11 +16,6 @@
 #include <linux/sysdev.h>
 #include <mach/hardware.h>
 
-/*
- * This is the maximum DMA address(physical address) that can be DMAd to.
- *
- */
-#define MAX_DMA_ADDRESS         0x40000000
 #define MAX_DMA_TRANSFER_SIZE   0x100000 /* Data Unit is half word  */
 
 /* We use `virtual` dma channels to hide the fact we have only a limited
@@ -254,7 +249,7 @@ typedef unsigned long dma_device_t;
  * request a dma channel exclusivley
 */
 
-extern int s3c2410_dma_request(dmach_t channel,
+extern int s3c2410_dma_request(unsigned int channel,
                                struct s3c2410_dma_client *, void *dev);
 
 
@@ -263,14 +258,14 @@ extern int s3c2410_dma_request(dmach_t channel,
  * change the state of the dma channel
 */
 
-extern int s3c2410_dma_ctrl(dmach_t channel, enum s3c2410_chan_op op);
+extern int s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op);
 
 /* s3c2410_dma_setflags
  *
  * set the channel's flags to a given state
 */
 
-extern int s3c2410_dma_setflags(dmach_t channel,
+extern int s3c2410_dma_setflags(unsigned int channel,
                                 unsigned int flags);
 
 /* s3c2410_dma_free
@@ -278,7 +273,7 @@ extern int s3c2410_dma_setflags(dmach_t channel,
  * free the dma channel (will also abort any outstanding operations)
 */
 
-extern int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *);
+extern int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *);
 
 /* s3c2410_dma_enqueue
  *
@@ -287,7 +282,7 @@ extern int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *);
  * drained before the buffer is given to the DMA system.
 */
 
-extern int s3c2410_dma_enqueue(dmach_t channel, void *id,
+extern int s3c2410_dma_enqueue(unsigned int channel, void *id,
                                dma_addr_t data, int size);
 
 /* s3c2410_dma_config
@@ -295,7 +290,7 @@ extern int s3c2410_dma_enqueue(dmach_t channel, void *id,
  * configure the dma channel
 */
 
-extern int s3c2410_dma_config(dmach_t channel, int xferunit, int dcon);
+extern int s3c2410_dma_config(unsigned int channel, int xferunit, int dcon);
 
 /* s3c2410_dma_devconfig
  *
@@ -310,11 +305,11 @@ extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source,
  * get the position that the dma transfer is currently at
 */
 
-extern int s3c2410_dma_getposition(dmach_t channel,
+extern int s3c2410_dma_getposition(unsigned int channel,
                                    dma_addr_t *src, dma_addr_t *dest);
 
-extern int s3c2410_dma_set_opfn(dmach_t, s3c2410_dma_opfn_t rtn);
-extern int s3c2410_dma_set_buffdone_fn(dmach_t, s3c2410_dma_cbfn_t rtn);
+extern int s3c2410_dma_set_opfn(unsigned int, s3c2410_dma_opfn_t rtn);
+extern int s3c2410_dma_set_buffdone_fn(unsigned int, s3c2410_dma_cbfn_t rtn);
 
 /* DMA Register definitions */
 
diff --git a/arch/arm/mach-s3c2410/include/mach/memory.h b/arch/arm/mach-s3c2410/include/mach/memory.h
index 93782628a786..6f1e5871ae4b 100644
--- a/arch/arm/mach-s3c2410/include/mach/memory.h
+++ b/arch/arm/mach-s3c2410/include/mach/memory.h
@@ -13,7 +13,4 @@
 
 #define PHYS_OFFSET     UL(0x30000000)
 
-#define __virt_to_bus(x) __virt_to_phys(x)
-#define __bus_to_virt(x) __phys_to_virt(x)
-
 #endif
diff --git a/arch/arm/mach-s3c2410/include/mach/system-reset.h b/arch/arm/mach-s3c2410/include/mach/system-reset.h
index 43535a0e7186..7613d0a384ba 100644
--- a/arch/arm/mach-s3c2410/include/mach/system-reset.h
+++ b/arch/arm/mach-s3c2410/include/mach/system-reset.h
@@ -13,7 +13,7 @@
 #include <mach/hardware.h>
 #include <linux/io.h>
 
-#include <asm/plat-s3c/regs-watchdog.h>
+#include <plat/regs-watchdog.h>
 #include <mach/regs-clock.h>
 
 #include <linux/clk.h>
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 8db9c700e3c2..c04c24444e0d 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -44,8 +44,8 @@
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 
-#include <asm/plat-s3c/nand.h>
-#include <asm/plat-s3c/iic.h>
+#include <plat/nand.h>
+#include <plat/iic.h>
 #include <mach/fb.h>
 
 #include <linux/mtd/mtd.h>
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 98716d0108e9..32d550fcff4d 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -38,7 +38,7 @@
 #include <mach/h1940.h>
 #include <mach/h1940-latch.h>
 #include <mach/fb.h>
-#include <asm/plat-s3c24xx/udc.h>
+#include <plat/udc.h>
 
 #include <plat/clock.h>
 #include <plat/devs.h>
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 82505517846c..7a7c45d28fe7 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -40,14 +40,14 @@
 #include <asm/mach/irq.h>
 #include <asm/mach/map.h>
 
-#include <asm/plat-s3c/iic.h>
+#include <plat/iic.h>
 #include <plat/regs-serial.h>
 
 #include <plat/clock.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/s3c2410.h>
-#include <asm/plat-s3c24xx/udc.h>
+#include <plat/udc.h>
 
 static struct map_desc n30_iodesc[] __initdata = {
         /* nothing here yet */
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c
index 661807e14e8a..ef868472f6a4 100644
--- a/arch/arm/mach-s3c2410/mach-qt2410.c
+++ b/arch/arm/mach-s3c2410/mach-qt2410.c
@@ -50,8 +50,8 @@
 #include <mach/leds-gpio.h>
 #include <plat/regs-serial.h>
 #include <mach/fb.h>
-#include <asm/plat-s3c/nand.h>
-#include <asm/plat-s3c24xx/udc.h>
+#include <plat/nand.h>
+#include <plat/udc.h>
 #include <mach/spi.h>
 #include <mach/spi-gpio.h>
 
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig
index c59a9d2ee9a6..ca99564ae4b5 100644
--- a/arch/arm/mach-s3c2412/Kconfig
+++ b/arch/arm/mach-s3c2412/Kconfig
@@ -7,6 +7,7 @@
 config CPU_S3C2412
         bool
         depends on ARCH_S3C2410
+        select CPU_ARM926T
         select CPU_LLSERIAL_S3C2440
         select S3C2412_PM if PM
         select S3C2412_DMA if S3C2410_DMA
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c
index ba0591e71f32..919856c9433f 100644
--- a/arch/arm/mach-s3c2412/dma.c
+++ b/arch/arm/mach-s3c2412/dma.c
@@ -18,7 +18,6 @@
 #include <linux/serial_core.h>
 #include <linux/io.h>
 
-#include <asm/dma.h>
 #include <mach/dma.h>
 
 #include <plat/dma.h>
@@ -26,13 +25,13 @@
 
 #include <plat/regs-serial.h>
 #include <mach/regs-gpio.h>
-#include <asm/plat-s3c/regs-ac97.h>
+#include <plat/regs-ac97.h>
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
 #include <asm/plat-s3c24xx/regs-s3c2412-iis.h>
 #include <asm/plat-s3c24xx/regs-iis.h>
-#include <asm/plat-s3c24xx/regs-spi.h>
+#include <plat/regs-spi.h>
 
 #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
 
diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c
index b08f18c8c47a..25ff1ec9f8ad 100644
--- a/arch/arm/mach-s3c2412/mach-jive.c
+++ b/arch/arm/mach-s3c2412/mach-jive.c
@@ -31,8 +31,8 @@
 #include <asm/mach/irq.h>
 
 #include <plat/regs-serial.h>
-#include <asm/plat-s3c/nand.h>
-#include <asm/plat-s3c/iic.h>
+#include <plat/nand.h>
+#include <plat/iic.h>
 
 #include <mach/regs-power.h>
 #include <mach/regs-gpio.h>
@@ -52,7 +52,7 @@
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/pm.h>
-#include <asm/plat-s3c24xx/udc.h>
+#include <plat/udc.h>
 
 static struct map_desc jive_iodesc[] __initdata = {
 };
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c
index c719b5a740a9..8fd17b8d5679 100644
--- a/arch/arm/mach-s3c2412/mach-smdk2413.c
+++ b/arch/arm/mach-s3c2412/mach-smdk2413.c
@@ -37,7 +37,7 @@
 #include <mach/regs-lcd.h>
 
 #include <mach/idle.h>
-#include <asm/plat-s3c24xx/udc.h>
+#include <plat/udc.h>
 #include <mach/fb.h>
 
 #include <plat/s3c2410.h>
diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c
index 4cfa19ad9be0..da32a6cb17ae 100644
--- a/arch/arm/mach-s3c2412/mach-vstms.c
+++ b/arch/arm/mach-s3c2412/mach-vstms.c
@@ -39,7 +39,7 @@
 #include <mach/idle.h>
 #include <mach/fb.h>
 
-#include <asm/plat-s3c/nand.h>
+#include <plat/nand.h>
 
 #include <plat/s3c2410.h>
 #include <plat/s3c2412.h>
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index 313759c3da69..a086818e117e 100644
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -39,7 +39,7 @@
 #include <mach/regs-gpio.h>
 #include <mach/regs-gpioj.h>
 #include <mach/regs-dsc.h>
-#include <asm/plat-s3c24xx/regs-spi.h>
+#include <plat/regs-spi.h>
 #include <mach/regs-s3c2412.h>
 
 #include <plat/s3c2412.h>
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index 25de042ab996..0429d255b0d8 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -7,6 +7,7 @@
 config CPU_S3C2440
         bool
         depends on ARCH_S3C2410
+        select CPU_ARM920T
         select S3C2410_CLOCK
         select S3C2410_PM if PM
         select S3C2410_GPIO
diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c
index 32303f6a8321..5b5ee0b8f4e0 100644
--- a/arch/arm/mach-s3c2440/dma.c
+++ b/arch/arm/mach-s3c2440/dma.c
@@ -17,7 +17,6 @@
 #include <linux/sysdev.h>
 #include <linux/serial_core.h>
 
-#include <asm/dma.h>
 #include <mach/dma.h>
 
 #include <plat/dma.h>
@@ -25,12 +24,12 @@
 
 #include <plat/regs-serial.h>
 #include <mach/regs-gpio.h>
-#include <asm/plat-s3c/regs-ac97.h>
+#include <plat/regs-ac97.h>
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
 #include <asm/plat-s3c24xx/regs-iis.h>
-#include <asm/plat-s3c24xx/regs-spi.h>
+#include <plat/regs-spi.h>
 
 static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = {
         [DMACH_XD0] = {
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index e2beca470484..334379bdfc6e 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -39,7 +39,7 @@
 #include <mach/regs-gpio.h>
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
-#include <asm/plat-s3c/nand.h>
+#include <plat/nand.h>
 
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c
index 66876c6f2f1c..07b42a0207d1 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -35,7 +35,7 @@
 #include <mach/regs-gpio.h>
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
-#include <asm/plat-s3c/nand.h>
+#include <plat/nand.h>
 
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index 2361d606abc5..884a3c7ae75f 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -37,7 +37,7 @@
 #include <mach/regs-gpio.h>
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
-#include <asm/plat-s3c/nand.h>
+#include <plat/nand.h>
 
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index 4d14c7cff892..fbd081de592f 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -42,7 +42,7 @@
 #include <mach/regs-lcd.h>
 
 #include <mach/h1940.h>
-#include <asm/plat-s3c/nand.h>
+#include <plat/nand.h>
 #include <mach/fb.h>
 
 #include <plat/clock.h>
diff --git a/arch/arm/mach-s3c2442/Kconfig b/arch/arm/mach-s3c2442/Kconfig
index 26d131a77074..b289d198020e 100644
--- a/arch/arm/mach-s3c2442/Kconfig
+++ b/arch/arm/mach-s3c2442/Kconfig
@@ -7,6 +7,7 @@
 config CPU_S3C2442
         bool
         depends on ARCH_S3C2410
+        select CPU_ARM920T
         select S3C2410_CLOCK
         select S3C2410_GPIO
         select S3C2410_PM if PM
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c
index f73ccb25ff94..2a58a4d5aa5a 100644
--- a/arch/arm/mach-s3c2443/dma.c
+++ b/arch/arm/mach-s3c2443/dma.c
@@ -18,7 +18,6 @@
 #include <linux/serial_core.h>
 #include <linux/io.h>
 
-#include <asm/dma.h>
 #include <mach/dma.h>
 
 #include <plat/dma.h>
@@ -26,12 +25,12 @@
 
 #include <plat/regs-serial.h>
 #include <mach/regs-gpio.h>
-#include <asm/plat-s3c/regs-ac97.h>
+#include <plat/regs-ac97.h>
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
 #include <asm/plat-s3c24xx/regs-iis.h>
-#include <asm/plat-s3c24xx/regs-spi.h>
+#include <plat/regs-spi.h>
 
 #define MAP(x) { \
                 [0]     = (x) | DMA_CH_VALID,   \
diff --git a/arch/arm/mach-sa1100/clock.c b/arch/arm/mach-sa1100/clock.c
index 43c30f84abf2..dab3c6347a8f 100644
--- a/arch/arm/mach-sa1100/clock.c
+++ b/arch/arm/mach-sa1100/clock.c
@@ -3,6 +3,7 @@
  */
 #include <linux/module.h>
 #include <linux/kernel.h>
+#include <linux/device.h>
 #include <linux/list.h>
 #include <linux/errno.h>
 #include <linux/err.h>
@@ -14,36 +15,39 @@
 #include <mach/hardware.h>
 
 /*
- * Very simple clock implementation - we only have one clock to
- * deal with at the moment, so we only match using the "name".
+ * Very simple clock implementation - we only have one clock to deal with.
  */
 struct clk {
-        struct list_head        node;
-        unsigned long           rate;
-        const char              *name;
         unsigned int            enabled;
-        void                    (*enable)(void);
-        void                    (*disable)(void);
 };
 
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
+static void clk_gpio27_enable(void)
+{
+        /*
+         * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
+         * (SA-1110 Developer's Manual, section 9.1.2.1)
+         */
+        GAFR |= GPIO_32_768kHz;
+        GPDR |= GPIO_32_768kHz;
+        TUCR = TUCR_3_6864MHz;
+}
+
+static void clk_gpio27_disable(void)
+{
+        TUCR = 0;
+        GPDR &= ~GPIO_32_768kHz;
+        GAFR &= ~GPIO_32_768kHz;
+}
+
+static struct clk clk_gpio27;
+
 static DEFINE_SPINLOCK(clocks_lock);
 
 struct clk *clk_get(struct device *dev, const char *id)
 {
-        struct clk *p, *clk = ERR_PTR(-ENOENT);
-
-        mutex_lock(&clocks_mutex);
-        list_for_each_entry(p, &clocks, node) {
-                if (strcmp(id, p->name) == 0) {
-                        clk = p;
-                        break;
-                }
-        }
-        mutex_unlock(&clocks_mutex);
+        const char *devname = dev_name(dev);
 
-        return clk;
+        return strcmp(devname, "sa1111.0") ? ERR_PTR(-ENOENT) : &clk_gpio27;
 }
 EXPORT_SYMBOL(clk_get);
 
@@ -58,7 +62,7 @@ int clk_enable(struct clk *clk)
 
         spin_lock_irqsave(&clocks_lock, flags);
         if (clk->enabled++ == 0)
-                clk->enable();
+                clk_gpio27_enable();
         spin_unlock_irqrestore(&clocks_lock, flags);
         return 0;
 }
@@ -72,63 +76,13 @@ void clk_disable(struct clk *clk)
 
         spin_lock_irqsave(&clocks_lock, flags);
         if (--clk->enabled == 0)
-                clk->disable();
+                clk_gpio27_disable();
         spin_unlock_irqrestore(&clocks_lock, flags);
 }
 EXPORT_SYMBOL(clk_disable);
 
 unsigned long clk_get_rate(struct clk *clk)
 {
-        return clk->rate;
+        return 3686400;
 }
 EXPORT_SYMBOL(clk_get_rate);
-
-
-static void clk_gpio27_enable(void)
-{
-        /*
-         * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
-         * (SA-1110 Developer's Manual, section 9.1.2.1)
-         */
-        GAFR |= GPIO_32_768kHz;
-        GPDR |= GPIO_32_768kHz;
-        TUCR = TUCR_3_6864MHz;
-}
-
-static void clk_gpio27_disable(void)
-{
-        TUCR = 0;
-        GPDR &= ~GPIO_32_768kHz;
-        GAFR &= ~GPIO_32_768kHz;
-}
-
-static struct clk clk_gpio27 = {
-        .name           = "SA1111_CLK",
-        .rate           = 3686400,
-        .enable         = clk_gpio27_enable,
-        .disable        = clk_gpio27_disable,
-};
-
-int clk_register(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_add(&clk->node, &clocks);
-        mutex_unlock(&clocks_mutex);
-        return 0;
-}
-EXPORT_SYMBOL(clk_register);
-
-void clk_unregister(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_del(&clk->node);
-        mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL(clk_unregister);
-
-static int __init clk_init(void)
-{
-        clk_register(&clk_gpio27);
-        return 0;
-}
-arch_initcall(clk_init);
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index fe289997cfaf..2052eb88c961 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -68,23 +68,22 @@ struct platform_device colliescoop_device = {
 };
 
 static struct scoop_pcmcia_dev collie_pcmcia_scoop[] = {
-{
-       .dev        = &colliescoop_device.dev,
-       .irq        = COLLIE_IRQ_GPIO_CF_IRQ,
-       .cd_irq     = COLLIE_IRQ_GPIO_CF_CD,
-       .cd_irq_str = "PCMCIA0 CD",
-},
+        {
+        .dev            = &colliescoop_device.dev,
+        .irq            = COLLIE_IRQ_GPIO_CF_IRQ,
+        .cd_irq         = COLLIE_IRQ_GPIO_CF_CD,
+        .cd_irq_str     = "PCMCIA0 CD",
+        },
 };
 
 static struct scoop_pcmcia_config collie_pcmcia_config = {
-        .devs         = &collie_pcmcia_scoop[0],
-        .num_devs     = 1,
+        .devs           = &collie_pcmcia_scoop[0],
+        .num_devs       = 1,
 };
 
-
 static struct mcp_plat_data collie_mcp_data = {
-        .mccr0          = MCCR0_ADM | MCCR0_ExtClk,
-        .sclk_rate      = 9216000,
+        .mccr0          = MCCR0_ADM | MCCR0_ExtClk,
+        .sclk_rate      = 9216000,
 };
 
 #ifdef CONFIG_SHARP_LOCOMO
@@ -95,14 +94,14 @@ struct platform_device collie_locomo_device;
 
 static void collie_uart_set_mctrl(struct uart_port *port, u_int mctrl)
 {
-        if (mctrl & TIOCM_RTS)
+        if (mctrl & TIOCM_RTS)
                 locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_RTS, 0);
-        else
+        else
                 locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_RTS, 1);
 
-        if (mctrl & TIOCM_DTR)
+        if (mctrl & TIOCM_DTR)
                 locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_DTR, 0);
-        else
+        else
                 locomo_gpio_write(&collie_locomo_device.dev, LOCOMO_GPIO_DTR, 1);
 }
 
diff --git a/arch/arm/mach-sa1100/collie_pm.c b/arch/arm/mach-sa1100/collie_pm.c
index b1161fc80602..b39307f26b52 100644
--- a/arch/arm/mach-sa1100/collie_pm.c
+++ b/arch/arm/mach-sa1100/collie_pm.c
@@ -26,7 +26,7 @@
 #include <asm/irq.h>
 #include <mach/hardware.h>
 #include <asm/hardware/scoop.h>
-#include <asm/dma.h>
+#include <mach/dma.h>
 #include <mach/collie.h>
 #include <asm/mach/sharpsl_param.h>
 #include <asm/hardware/sharpsl_pm.h>
@@ -263,24 +263,24 @@ static int __init collie_pm_ucb_add(struct ucb1x00_dev *pdev)
 }
 
 static struct ucb1x00_driver collie_pm_ucb_driver = {
-        .add            = collie_pm_ucb_add,
+        .add    = collie_pm_ucb_add,
 };
 
 static struct platform_device *collie_pm_device;
 
 static int __init collie_pm_init(void)
 {
-        int ret;
+        int ret;
 
-        collie_pm_device = platform_device_alloc("sharpsl-pm", -1);
-        if (!collie_pm_device)
-                return -ENOMEM;
+        collie_pm_device = platform_device_alloc("sharpsl-pm", -1);
+        if (!collie_pm_device)
+                return -ENOMEM;
 
-        collie_pm_device->dev.platform_data = &collie_pm_machinfo;
-        ret = platform_device_add(collie_pm_device);
+        collie_pm_device->dev.platform_data = &collie_pm_machinfo;
+        ret = platform_device_add(collie_pm_device);
 
-        if (ret)
-                platform_device_put(collie_pm_device);
+        if (ret)
+                platform_device_put(collie_pm_device);
 
         if (!ret)
                 ret = ucb1x00_register_driver(&collie_pm_ucb_driver);
@@ -291,7 +291,7 @@ static int __init collie_pm_init(void)
 static void __exit collie_pm_exit(void)
 {
         ucb1x00_unregister_driver(&collie_pm_ucb_driver);
-        platform_device_unregister(collie_pm_device);
+        platform_device_unregister(collie_pm_device);
 }
 
 module_init(collie_pm_init);
diff --git a/arch/arm/mach-sa1100/cpu-sa1100.c b/arch/arm/mach-sa1100/cpu-sa1100.c
index 244d5956312c..ef817876a5d6 100644
--- a/arch/arm/mach-sa1100/cpu-sa1100.c
+++ b/arch/arm/mach-sa1100/cpu-sa1100.c
@@ -3,17 +3,17 @@
  *
  * Copyright (C) 2000 2001, The Delft University of Technology
  *
- * Authors: 
+ * Authors:
  * - Johan Pouwelse (J.A.Pouwelse@its.tudelft.nl): initial version
  * - Erik Mouw (J.A.K.Mouw@its.tudelft.nl):
  *   - major rewrite for linux-2.3.99
- *   - rewritten for the more generic power management scheme in 
+ *   - rewritten for the more generic power management scheme in
  *     linux-2.4.5-rmk1
  *
  * This software has been developed while working on the LART
  * computing board (http://www.lartmaker.nl/), which is
  * sponsored by the Mobile Multi-media Communications
- * (http://www.mmc.tudelft.nl/) and Ubiquitous Communications 
+ * (http://www.mmc.tudelft.nl/) and Ubiquitous Communications
  * (http://www.ubicom.tudelft.nl/) projects.
  *
  * The authors can be reached at:
@@ -36,7 +36,7 @@
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
- * 
+ *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
@@ -44,7 +44,7 @@
  *
  * Theory of operations
  * ====================
- * 
+ *
  * Clock scaling can be used to lower the power consumption of the CPU
  * core. This will give you a somewhat longer running time.
  *
@@ -58,11 +58,11 @@
  *   MDCNFG    0xA0000000    DRAM config
  *   MDCAS0    0xA0000004    Access waveform
  *   MDCAS1    0xA0000008    Access waveform
- *   MDCAS2    0xA000000C    Access waveform 
+ *   MDCAS2    0xA000000C    Access waveform
  *
  * Care must be taken to change the DRAM parameters the correct way,
  * because otherwise the DRAM becomes unusable and the kernel will
- * crash. 
+ * crash.
  *
  * The simple solution to avoid a kernel crash is to put the actual
  * clock change in ROM and jump to that code from the kernel. The main
@@ -75,7 +75,7 @@
  * as long as all re-configuration steps yield a valid DRAM
  * configuration. The advantages are clear: it will run on all SA-1100
  * platforms, and the code is very simple.
- * 
+ *
  * If you really want to understand what is going on in
  * sa1100_update_dram_timings(), you'll have to read sections 8.2,
  * 9.5.7.3, and 10.2 from the "Intel StrongARM SA-1100 Microprocessor
@@ -97,7 +97,7 @@
 typedef struct {
         int speed;
         u32 mdcnfg;
-        u32 mdcas0; 
+        u32 mdcas0;
         u32 mdcas1;
         u32 mdcas2;
 } sa1100_dram_regs_t;
@@ -147,7 +147,7 @@ static void sa1100_update_dram_timings(int current_speed, int new_speed)
         /* No risk, no fun: run with interrupts on! */
         if (new_speed > current_speed) {
                 /* We're going FASTER, so first relax the memory
-                 * timings before changing the core frequency 
+                 * timings before changing the core frequency
                  */
                 
                 /* Half the memory access clock */
diff --git a/arch/arm/mach-sa1100/cpu-sa1110.c b/arch/arm/mach-sa1100/cpu-sa1110.c
index 3e4fb214eada..63b32b68b296 100644
--- a/arch/arm/mach-sa1100/cpu-sa1110.c
+++ b/arch/arm/mach-sa1100/cpu-sa1110.c
@@ -81,14 +81,14 @@ static struct sdram_params sdram_tbl[] __initdata = {
                 .twr            = 9,
                 .refresh        = 64000,
                 .cas_latency    = 3,
-        }, {    /* Samsung K4S281632B-1H */
-                .name           = "K4S281632B-1H",
-                .rows           = 12,
-                .tck            = 10,
-                .trp            = 20,
-                .twr            = 10,
-                .refresh        = 64000,
-                .cas_latency    = 3,
+        }, {    /* Samsung K4S281632B-1H */
+                .name           = "K4S281632B-1H",
+                .rows           = 12,
+                .tck            = 10,
+                .trp            = 20,
+                .twr            = 10,
+                .refresh        = 64000,
+                .cas_latency    = 3,
         }, {    /* Samsung KM416S4030CT */
                 .name           = "KM416S4030CT",
                 .rows           = 13,
@@ -220,7 +220,7 @@ sdram_update_refresh(u_int cpu_khz, struct sdram_params *sdram)
 }
 
 /*
- * Ok, set the CPU frequency.  
+ * Ok, set the CPU frequency.
  */
 static int sa1110_target(struct cpufreq_policy *policy,
                          unsigned int target_freq,
diff --git a/arch/arm/mach-sa1100/dma.c b/arch/arm/mach-sa1100/dma.c
index f990a3e85846..95f9c5a6d6d5 100644
--- a/arch/arm/mach-sa1100/dma.c
+++ b/arch/arm/mach-sa1100/dma.c
@@ -19,7 +19,7 @@
 #include <asm/system.h>
 #include <asm/irq.h>
 #include <mach/hardware.h>
-#include <asm/dma.h>
+#include <mach/dma.h>
 
 
 #undef DEBUG
@@ -113,10 +113,10 @@ int sa1100_request_dma (dma_device_t device, const char *device_id,
                 }
         }
         if (!err) {
-               if (dma)
-                       dma->device = device;
-               else
-                       err = -ENOSR;
+                if (dma)
+                        dma->device = device;
+                else
+                        err = -ENOSR;
         }
         spin_unlock(&dma_list_lock);
         if (err)
diff --git a/arch/arm/mach-sa1100/include/mach/h3600.h b/arch/arm/mach-sa1100/include/mach/h3600.h
index 3ca0ecf095e6..9cc47fddb335 100644
--- a/arch/arm/mach-sa1100/include/mach/h3600.h
+++ b/arch/arm/mach-sa1100/include/mach/h3600.h
@@ -32,14 +32,14 @@ typedef int __bitwise pm_request_t;
 #define machine_is_h3xxx() (machine_is_h3100() || machine_is_h3600() || machine_is_h3800())
 
 /* Physical memory regions corresponding to chip selects */
-#define H3600_EGPIO_PHYS     (SA1100_CS5_PHYS + 0x01000000)
-#define H3600_BANK_2_PHYS    SA1100_CS2_PHYS
-#define H3600_BANK_4_PHYS    SA1100_CS4_PHYS
+#define H3600_EGPIO_PHYS        (SA1100_CS5_PHYS + 0x01000000)
+#define H3600_BANK_2_PHYS       SA1100_CS2_PHYS
+#define H3600_BANK_4_PHYS       SA1100_CS4_PHYS
 
 /* Virtual memory regions corresponding to chip selects 2 & 4 (used on sleeves) */
-#define H3600_EGPIO_VIRT     0xf0000000
-#define H3600_BANK_2_VIRT    0xf1000000
-#define H3600_BANK_4_VIRT    0xf3800000
+#define H3600_EGPIO_VIRT        0xf0000000
+#define H3600_BANK_2_VIRT       0xf1000000
+#define H3600_BANK_4_VIRT       0xf3800000
 
 /*
    Machine-independent GPIO definitions
diff --git a/arch/arm/mach-sa1100/include/mach/io.h b/arch/arm/mach-sa1100/include/mach/io.h
index 0c070a6149bc..d8b43f3dcd2d 100644
--- a/arch/arm/mach-sa1100/include/mach/io.h
+++ b/arch/arm/mach-sa1100/include/mach/io.h
@@ -16,11 +16,7 @@
  * We don't actually have real ISA nor PCI buses, but there is so many 
  * drivers out there that might just work if we fake them...
  */
-static inline void __iomem *__io(unsigned long addr)
-{
-        return (void __iomem *)addr;
-}
-#define __io(a)                 __io(a)
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-sa1100/include/mach/memory.h b/arch/arm/mach-sa1100/include/mach/memory.h
index 1c127b68581d..e9f8eed900f5 100644
--- a/arch/arm/mach-sa1100/include/mach/memory.h
+++ b/arch/arm/mach-sa1100/include/mach/memory.h
@@ -23,23 +23,12 @@ void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes);
         sa1111_adjust_zones(node, size, holes)
 
 #define ISA_DMA_THRESHOLD       (PHYS_OFFSET + SZ_1M - 1)
+#define MAX_DMA_ADDRESS         (PAGE_OFFSET + SZ_1M)
 
 #endif
 #endif
 
 /*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- *
- * On the SA1100, bus addresses are equivalent to physical addresses.
- */
-#define __virt_to_bus(x)         __virt_to_phys(x)
-#define __bus_to_virt(x)         __phys_to_virt(x)
-
-/*
  * Because of the wide memory address space between physical RAM banks on the
  * SA1100, it's much convenient to use Linux's SparseMEM support to implement
  * our memory map representation.  Assuming all memory nodes have equal access
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
index e45d3a1890bc..e1458bc1868e 100644
--- a/arch/arm/mach-sa1100/pleb.c
+++ b/arch/arm/mach-sa1100/pleb.c
@@ -122,12 +122,12 @@ static void __init pleb_map_io(void)
         sa1100_map_io();
 
         sa1100_register_uart(0, 3);
-        sa1100_register_uart(1, 1);
+        sa1100_register_uart(1, 1);
 
-        GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
-        GPDR |= GPIO_UART_TXD;
-        GPDR &= ~GPIO_UART_RXD;
-        PPAR |= PPAR_UPR;
+        GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
+        GPDR |= GPIO_UART_TXD;
+        GPDR &= ~GPIO_UART_RXD;
+        PPAR |= PPAR_UPR;
 
         /*
          * Fix expansion memory timing for network card
diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c
index 9ccdd09cf69f..ddd917d1083d 100644
--- a/arch/arm/mach-sa1100/shannon.c
+++ b/arch/arm/mach-sa1100/shannon.c
@@ -33,7 +33,7 @@ static struct mtd_partition shannon_partitions[] = {
                 .offset         = MTDPART_OFS_APPEND,
                 .size           = 0xe0000
         },
-        { 
+        {
                 .name           = "initrd",
                 .offset         = MTDPART_OFS_APPEND,   
                 .size           = MTDPART_SIZ_FULL
diff --git a/arch/arm/mach-sa1100/sleep.S b/arch/arm/mach-sa1100/sleep.S
index 171441f96710..80f31bad707c 100644
--- a/arch/arm/mach-sa1100/sleep.S
+++ b/arch/arm/mach-sa1100/sleep.S
@@ -100,36 +100,36 @@ ENTRY(sa1100_cpu_suspend)
         ldr     r1, =MSC1
         ldr     r2, =MSC2
 
-        ldr     r3, [r0]
-        bic     r3, r3, #FMsk(MSC_RT)
-        bic     r3, r3, #FMsk(MSC_RT)<<16
+        ldr     r3, [r0]
+        bic     r3, r3, #FMsk(MSC_RT)
+        bic     r3, r3, #FMsk(MSC_RT)<<16
 
-        ldr     r4, [r1]
-        bic     r4, r4, #FMsk(MSC_RT)
-        bic     r4, r4, #FMsk(MSC_RT)<<16
+        ldr     r4, [r1]
+        bic     r4, r4, #FMsk(MSC_RT)
+        bic     r4, r4, #FMsk(MSC_RT)<<16
 
-        ldr     r5, [r2]
-        bic     r5, r5, #FMsk(MSC_RT)
-        bic     r5, r5, #FMsk(MSC_RT)<<16
+        ldr     r5, [r2]
+        bic     r5, r5, #FMsk(MSC_RT)
+        bic     r5, r5, #FMsk(MSC_RT)<<16
 
-        ldr     r6, =MDREFR
+        ldr     r6, =MDREFR
 
-        ldr     r7, [r6]
-        bic     r7, r7, #0x0000FF00
-        bic     r7, r7, #0x000000F0
-        orr     r8, r7, #MDREFR_SLFRSH
+        ldr     r7, [r6]
+bic     r7, r7, #0x0000FF00
+bic     r7, r7, #0x000000F0
+orr     r8, r7, #MDREFR_SLFRSH
 
-        ldr     r9, =MDCNFG
-        ldr     r10, [r9]
-        bic     r10, r10, #(MDCNFG_DE0+MDCNFG_DE1)
-        bic     r10, r10, #(MDCNFG_DE2+MDCNFG_DE3)
+        ldr     r9, =MDCNFG
+        ldr     r10, [r9]
+        bic     r10, r10, #(MDCNFG_DE0+MDCNFG_DE1)
+        bic     r10, r10, #(MDCNFG_DE2+MDCNFG_DE3)
 
-        bic     r11, r8, #MDREFR_SLFRSH
-        bic     r11, r11, #MDREFR_E1PIN
+        bic     r11, r8, #MDREFR_SLFRSH
+        bic     r11, r11, #MDREFR_E1PIN
 
-        ldr     r12, =PMCR
+        ldr     r12, =PMCR
 
-        mov     r13, #PMCR_SF
+        mov     r13, #PMCR_SF
 
         b       sa1110_sdram_controller_fix
 
@@ -188,10 +188,10 @@ ENTRY(sa1100_cpu_resume)
         mcr     p15, 0, r1, c8, c7, 0           @ flush I+D TLBs
         mcr     p15, 0, r1, c7, c7, 0           @ flush I&D cache
         mcr     p15, 0, r1, c9, c0, 0           @ invalidate RB
-        mcr     p15, 0, r1, c9, c0, 5           @ allow user space to use RB
+        mcr     p15, 0, r1, c9, c0, 5           @ allow user space to use RB
 
-        mcr     p15, 0, r4, c3, c0, 0           @ domain ID
-        mcr     p15, 0, r5, c2, c0, 0           @ translation table base addr
+        mcr     p15, 0, r4, c3, c0, 0           @ domain ID
+        mcr     p15, 0, r5, c2, c0, 0           @ translation table base addr
         mcr     p15, 0, r6, c13, c0, 0          @ PID
         b       resume_turn_on_mmu              @ cache align execution
 
@@ -209,7 +209,7 @@ sleep_save_sp:
 
         .text
 resume_after_mmu:
-        mcr     p15, 0, r1, c15, c1, 2          @ enable clock switching
+        mcr     p15, 0, r1, c15, c1, 2          @ enable clock switching
         ldmfd   sp!, {r4 - r12, pc}             @ return to caller
 
 
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 24c0a4bae850..8c5e727f3b75 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -2,8 +2,8 @@
  * linux/arch/arm/mach-sa1100/time.c
  *
  * Copyright (C) 1998 Deborah Wallach.
- * Twiddles  (C) 1999   Hugo Fiennes <hugo@empeg.com>
- * 
+ * Twiddles  (C) 1999 Hugo Fiennes <hugo@empeg.com>
+ *
  * 2000/03/29 (C) Nicolas Pitre <nico@cam.org>
  *      Rewritten: big cleanup, much simpler, better HZ accuracy.
  *
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index a9400d984451..a23fd3d0163a 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -16,6 +16,8 @@
 #include <asm/leds.h>
 #include <asm/param.h>
 
+#include <mach/hardware.h>
+
 #include <asm/mach/map.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
diff --git a/arch/arm/mach-shark/include/mach/hardware.h b/arch/arm/mach-shark/include/mach/hardware.h
index cb0ee2943c1a..01bf76099ce5 100644
--- a/arch/arm/mach-shark/include/mach/hardware.h
+++ b/arch/arm/mach-shark/include/mach/hardware.h
@@ -28,8 +28,6 @@
 #define ROMCARD_SIZE            0x08000000
 #define ROMCARD_START           0x10000000
 
-#define PCIO_BASE               0xe0000000
-
 
 /* defines for the Framebuffer */
 #define FB_START                0x06000000
diff --git a/arch/arm/mach-shark/include/mach/io.h b/arch/arm/mach-shark/include/mach/io.h
index 92475922c068..c5cee829fc87 100644
--- a/arch/arm/mach-shark/include/mach/io.h
+++ b/arch/arm/mach-shark/include/mach/io.h
@@ -11,46 +11,10 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#include <mach/hardware.h>
+#define PCIO_BASE       0xe0000000
+#define IO_SPACE_LIMIT  0xffffffff
 
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * We use two different types of addressing - PC style addresses, and ARM
- * addresses.  PC style accesses the PC hardware with the normal PC IO
- * addresses, eg 0x3f8 for serial#1.  ARM addresses are 0x80000000+
- * and are translated to the start of IO.
- */
-#define __PORT_PCIO(x)  (!((x) & 0x80000000))
-
-#define __io(a)                 ((void __iomem *)(PCIO_BASE + (a)))
-
-
-static inline unsigned int __ioaddr (unsigned int port)                 \
-{                                                                               \
-        if (__PORT_PCIO(port))                                                  \
-                return (unsigned int)(PCIO_BASE + (port));                      \
-        else                                                                    \
-                return (unsigned int)(IO_BASE + (port));                        \
-}
-
-#define __mem_pci(addr) (addr)
-
-/*
- * Translated address IO functions
- *
- * IO address has already been translated to a virtual address
- */
-#define outb_t(v,p)                                                             \
-        (*(volatile unsigned char *)(p) = (v))
-
-#define inb_t(p)                                                                \
-        (*(volatile unsigned char *)(p))
-
-#define outl_t(v,p)                                                             \
-        (*(volatile unsigned long *)(p) = (v))
-
-#define inl_t(p)                                                                \
-        (*(volatile unsigned long *)(p))
+#define __io(a)         ((void __iomem *)(PCIO_BASE + (a)))
+#define __mem_pci(addr) (addr)
 
 #endif
diff --git a/arch/arm/mach-shark/include/mach/dma.h b/arch/arm/mach-shark/include/mach/isa-dma.h
index c0a29bd2a74f..864298ff3927 100644
--- a/arch/arm/mach-shark/include/mach/dma.h
+++ b/arch/arm/mach-shark/include/mach/isa-dma.h
@@ -1,5 +1,5 @@
 /*
- * arch/arm/mach-shark/include/mach/dma.h
+ * arch/arm/mach-shark/include/mach/isa-dma.h
  *
  * by Alexander Schulz
  */
@@ -10,7 +10,6 @@
  * The rest is not DMAable. See dev /  .properties
  * in OpenFirmware.
  */
-#define MAX_DMA_ADDRESS         0xC0400000
 #define MAX_DMA_CHANNELS        8
 #define DMA_ISA_CASCADE         4
 
diff --git a/arch/arm/mach-shark/include/mach/memory.h b/arch/arm/mach-shark/include/mach/memory.h
index b7874ad9f9f6..c5ab038925d6 100644
--- a/arch/arm/mach-shark/include/mach/memory.h
+++ b/arch/arm/mach-shark/include/mach/memory.h
@@ -33,12 +33,10 @@ static inline void __arch_adjust_zones(int node, unsigned long *zone_size, unsig
         __arch_adjust_zones(node, size, holes)
 
 #define ISA_DMA_THRESHOLD       (PHYS_OFFSET + SZ_4M - 1)
+#define MAX_DMA_ADDRESS         (PAGE_OFFSET + SZ_4M)
 
 #endif
 
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
 /*
  * Cache flushing area
  */
diff --git a/arch/arm/mach-versatile/Kconfig b/arch/arm/mach-versatile/Kconfig
index 95096afd5271..c781f30c8368 100644
--- a/arch/arm/mach-versatile/Kconfig
+++ b/arch/arm/mach-versatile/Kconfig
@@ -3,12 +3,14 @@ menu "Versatile platform type"
 
 config ARCH_VERSATILE_PB
         bool "Support Versatile/PB platform"
+        select CPU_ARM926T
         default y
         help
           Include support for the ARM(R) Versatile/PB platform.
 
 config MACH_VERSATILE_AB
         bool "Support Versatile/AB platform"
+        select CPU_ARM926T
         help
           Include support for the ARM(R) Versatile/AP platform.
 
diff --git a/arch/arm/mach-versatile/clock.c b/arch/arm/mach-versatile/clock.c
index 58937f1fb38c..c50a44ea7ee6 100644
--- a/arch/arm/mach-versatile/clock.c
+++ b/arch/arm/mach-versatile/clock.c
@@ -10,6 +10,7 @@
  */
 #include <linux/module.h>
 #include <linux/kernel.h>
+#include <linux/device.h>
 #include <linux/list.h>
 #include <linux/errno.h>
 #include <linux/err.h>
@@ -17,36 +18,11 @@
 #include <linux/clk.h>
 #include <linux/mutex.h>
 
+#include <asm/clkdev.h>
 #include <asm/hardware/icst307.h>
 
 #include "clock.h"
 
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
-        struct clk *p, *clk = ERR_PTR(-ENOENT);
-
-        mutex_lock(&clocks_mutex);
-        list_for_each_entry(p, &clocks, node) {
-                if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
-                        clk = p;
-                        break;
-                }
-        }
-        mutex_unlock(&clocks_mutex);
-
-        return clk;
-}
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-        module_put(clk->owner);
-}
-EXPORT_SYMBOL(clk_put);
-
 int clk_enable(struct clk *clk)
 {
         return 0;
@@ -66,7 +42,9 @@ EXPORT_SYMBOL(clk_get_rate);
 
 long clk_round_rate(struct clk *clk, unsigned long rate)
 {
-        return rate;
+        struct icst307_vco vco;
+        vco = icst307_khz_to_vco(clk->params, rate / 1000);
+        return icst307_khz(clk->params, vco) * 1000;
 }
 EXPORT_SYMBOL(clk_round_rate);
 
@@ -79,57 +57,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
 
                 vco = icst307_khz_to_vco(clk->params, rate / 1000);
                 clk->rate = icst307_khz(clk->params, vco) * 1000;
-
-                printk("Clock %s: setting VCO reg params: S=%d R=%d V=%d\n",
-                        clk->name, vco.s, vco.r, vco.v);
-
                 clk->setvco(clk, vco);
                 ret = 0;
         }
         return ret;
 }
 EXPORT_SYMBOL(clk_set_rate);
-
-/*
- * These are fixed clocks.
- */
-static struct clk kmi_clk = {
-        .name   = "KMIREFCLK",
-        .rate   = 24000000,
-};
-
-static struct clk uart_clk = {
-        .name   = "UARTCLK",
-        .rate   = 24000000,
-};
-
-static struct clk mmci_clk = {
-        .name   = "MCLK",
-        .rate   = 24000000,
-};
-
-int clk_register(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_add(&clk->node, &clocks);
-        mutex_unlock(&clocks_mutex);
-        return 0;
-}
-EXPORT_SYMBOL(clk_register);
-
-void clk_unregister(struct clk *clk)
-{
-        mutex_lock(&clocks_mutex);
-        list_del(&clk->node);
-        mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL(clk_unregister);
-
-static int __init clk_init(void)
-{
-        clk_register(&kmi_clk);
-        clk_register(&uart_clk);
-        clk_register(&mmci_clk);
-        return 0;
-}
-arch_initcall(clk_init);
diff --git a/arch/arm/mach-versatile/clock.h b/arch/arm/mach-versatile/clock.h
index 8b0b61dd17e4..03468fdc3e58 100644
--- a/arch/arm/mach-versatile/clock.h
+++ b/arch/arm/mach-versatile/clock.h
@@ -12,14 +12,9 @@ struct module;
 struct icst307_params;
 
 struct clk {
-        struct list_head        node;
         unsigned long           rate;
-        struct module           *owner;
-        const char              *name;
         const struct icst307_params *params;
+        u32                     oscoff;
         void                    *data;
         void                    (*setvco)(struct clk *, struct icst307_vco vco);
 };
-
-int clk_register(struct clk *clk);
-void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 565e0ba0d67e..df25aa138509 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -31,6 +31,7 @@
 #include <linux/cnt32_to_63.h>
 #include <linux/io.h>
 
+#include <asm/clkdev.h>
 #include <asm/system.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
@@ -373,22 +374,60 @@ static const struct icst307_params versatile_oscvco_params = {
 
 static void versatile_oscvco_set(struct clk *clk, struct icst307_vco vco)
 {
-        void __iomem *sys_lock = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_LOCK_OFFSET;
-        void __iomem *sys_osc = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_OSCCLCD_OFFSET;
+        void __iomem *sys = __io_address(VERSATILE_SYS_BASE);
+        void __iomem *sys_lock = sys + VERSATILE_SYS_LOCK_OFFSET;
         u32 val;
 
-        val = readl(sys_osc) & ~0x7ffff;
+        val = readl(sys + clk->oscoff) & ~0x7ffff;
         val |= vco.v | (vco.r << 9) | (vco.s << 16);
 
         writel(0xa05f, sys_lock);
-        writel(val, sys_osc);
+        writel(val, sys + clk->oscoff);
         writel(0, sys_lock);
 }
 
-static struct clk versatile_clcd_clk = {
-        .name   = "CLCDCLK",
+static struct clk osc4_clk = {
         .params = &versatile_oscvco_params,
-        .setvco = versatile_oscvco_set,
+        .oscoff = VERSATILE_SYS_OSCCLCD_OFFSET,
+        .setvco = versatile_oscvco_set,
+};
+
+/*
+ * These are fixed clocks.
+ */
+static struct clk ref24_clk = {
+        .rate   = 24000000,
+};
+
+static struct clk_lookup lookups[] __initdata = {
+        {       /* UART0 */
+                .dev_id         = "dev:f1",
+                .clk            = &ref24_clk,
+        }, {    /* UART1 */
+                .dev_id         = "dev:f2",
+                .clk            = &ref24_clk,
+        }, {    /* UART2 */
+                .dev_id         = "dev:f3",
+                .clk            = &ref24_clk,
+        }, {    /* UART3 */
+                .dev_id         = "fpga:09",
+                .clk            = &ref24_clk,
+        }, {    /* KMI0 */
+                .dev_id         = "fpga:06",
+                .clk            = &ref24_clk,
+        }, {    /* KMI1 */
+                .dev_id         = "fpga:07",
+                .clk            = &ref24_clk,
+        }, {    /* MMC0 */
+                .dev_id         = "fpga:05",
+                .clk            = &ref24_clk,
+        }, {    /* MMC1 */
+                .dev_id         = "fpga:0b",
+                .clk            = &ref24_clk,
+        }, {    /* CLCD */
+                .dev_id         = "dev:20",
+                .clk            = &osc4_clk,
+        }
 };
 
 /*
@@ -786,7 +825,8 @@ void __init versatile_init(void)
 {
         int i;
 
-        clk_register(&versatile_clcd_clk);
+        for (i = 0; i < ARRAY_SIZE(lookups); i++)
+                clkdev_add(&lookups[i]);
 
         platform_device_register(&versatile_flash_device);
         platform_device_register(&versatile_i2c_device);
diff --git a/arch/arm/mach-versatile/include/mach/clkdev.h b/arch/arm/mach-versatile/include/mach/clkdev.h
new file mode 100644
index 000000000000..04b37a89801c
--- /dev/null
+++ b/arch/arm/mach-versatile/include/mach/clkdev.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_MACH_CLKDEV_H
+#define __ASM_MACH_CLKDEV_H
+
+#define __clk_get(clk) ({ 1; })
+#define __clk_put(clk) do { } while (0)
+
+#endif
diff --git a/arch/arm/mach-versatile/include/mach/dma.h b/arch/arm/mach-versatile/include/mach/dma.h
deleted file mode 100644
index 0aabf12c8834..000000000000
--- a/arch/arm/mach-versatile/include/mach/dma.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- *  arch/arm/mach-versatile/include/mach/dma.h
- *
- *  Copyright (C) 2003 ARM Limited.
- *  Copyright (C) 1997,1998 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
diff --git a/arch/arm/mach-versatile/include/mach/io.h b/arch/arm/mach-versatile/include/mach/io.h
index c0b9dd1d0257..f067c14c7182 100644
--- a/arch/arm/mach-versatile/include/mach/io.h
+++ b/arch/arm/mach-versatile/include/mach/io.h
@@ -22,11 +22,7 @@
 
 #define IO_SPACE_LIMIT 0xffffffff
 
-static inline void __iomem *__io(unsigned long addr)
-{
-        return (void __iomem *)addr;
-}
-#define __io(a) __io(a)
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/mach-versatile/include/mach/irqs.h b/arch/arm/mach-versatile/include/mach/irqs.h
index 216a1312e62e..9bfdb30e1f3f 100644
--- a/arch/arm/mach-versatile/include/mach/irqs.h
+++ b/arch/arm/mach-versatile/include/mach/irqs.h
@@ -60,39 +60,6 @@
 #define IRQ_VICSOURCE31         (IRQ_VIC_START + INT_VICSOURCE31)
 #define IRQ_VIC_END             (IRQ_VIC_START + 31)
 
-#define IRQMASK_WDOGINT         INTMASK_WDOGINT
-#define IRQMASK_SOFTINT         INTMASK_SOFTINT
-#define IRQMASK_COMMRx          INTMASK_COMMRx
-#define IRQMASK_COMMTx          INTMASK_COMMTx
-#define IRQMASK_TIMERINT0_1     INTMASK_TIMERINT0_1
-#define IRQMASK_TIMERINT2_3     INTMASK_TIMERINT2_3
-#define IRQMASK_GPIOINT0        INTMASK_GPIOINT0
-#define IRQMASK_GPIOINT1        INTMASK_GPIOINT1
-#define IRQMASK_GPIOINT2        INTMASK_GPIOINT2
-#define IRQMASK_GPIOINT3        INTMASK_GPIOINT3
-#define IRQMASK_RTCINT          INTMASK_RTCINT
-#define IRQMASK_SSPINT          INTMASK_SSPINT
-#define IRQMASK_UARTINT0        INTMASK_UARTINT0
-#define IRQMASK_UARTINT1        INTMASK_UARTINT1
-#define IRQMASK_UARTINT2        INTMASK_UARTINT2
-#define IRQMASK_SCIINT          INTMASK_SCIINT
-#define IRQMASK_CLCDINT         INTMASK_CLCDINT
-#define IRQMASK_DMAINT          INTMASK_DMAINT
-#define IRQMASK_PWRFAILINT      INTMASK_PWRFAILINT
-#define IRQMASK_MBXINT          INTMASK_MBXINT
-#define IRQMASK_GNDINT          INTMASK_GNDINT
-#define IRQMASK_VICSOURCE21     INTMASK_VICSOURCE21
-#define IRQMASK_VICSOURCE22     INTMASK_VICSOURCE22
-#define IRQMASK_VICSOURCE23     INTMASK_VICSOURCE23
-#define IRQMASK_VICSOURCE24     INTMASK_VICSOURCE24
-#define IRQMASK_VICSOURCE25     INTMASK_VICSOURCE25
-#define IRQMASK_VICSOURCE26     INTMASK_VICSOURCE26
-#define IRQMASK_VICSOURCE27     INTMASK_VICSOURCE27
-#define IRQMASK_VICSOURCE28     INTMASK_VICSOURCE28
-#define IRQMASK_VICSOURCE29     INTMASK_VICSOURCE29
-#define IRQMASK_VICSOURCE30     INTMASK_VICSOURCE30
-#define IRQMASK_VICSOURCE31     INTMASK_VICSOURCE31
-
 /* 
  *  FIQ interrupts definitions are the same as the INT definitions.
  */
@@ -130,39 +97,6 @@
 #define FIQ_VICSOURCE31         INT_VICSOURCE31
 
 
-#define FIQMASK_WDOGINT         INTMASK_WDOGINT
-#define FIQMASK_SOFTINT         INTMASK_SOFTINT
-#define FIQMASK_COMMRx          INTMASK_COMMRx
-#define FIQMASK_COMMTx          INTMASK_COMMTx
-#define FIQMASK_TIMERINT0_1     INTMASK_TIMERINT0_1
-#define FIQMASK_TIMERINT2_3     INTMASK_TIMERINT2_3
-#define FIQMASK_GPIOINT0        INTMASK_GPIOINT0
-#define FIQMASK_GPIOINT1        INTMASK_GPIOINT1
-#define FIQMASK_GPIOINT2        INTMASK_GPIOINT2
-#define FIQMASK_GPIOINT3        INTMASK_GPIOINT3
-#define FIQMASK_RTCINT          INTMASK_RTCINT
-#define FIQMASK_SSPINT          INTMASK_SSPINT
-#define FIQMASK_UARTINT0        INTMASK_UARTINT0
-#define FIQMASK_UARTINT1        INTMASK_UARTINT1
-#define FIQMASK_UARTINT2        INTMASK_UARTINT2
-#define FIQMASK_SCIINT          INTMASK_SCIINT
-#define FIQMASK_CLCDINT         INTMASK_CLCDINT
-#define FIQMASK_DMAINT          INTMASK_DMAINT
-#define FIQMASK_PWRFAILINT      INTMASK_PWRFAILINT
-#define FIQMASK_MBXINT          INTMASK_MBXINT
-#define FIQMASK_GNDINT          INTMASK_GNDINT
-#define FIQMASK_VICSOURCE21     INTMASK_VICSOURCE21
-#define FIQMASK_VICSOURCE22     INTMASK_VICSOURCE22
-#define FIQMASK_VICSOURCE23     INTMASK_VICSOURCE23
-#define FIQMASK_VICSOURCE24     INTMASK_VICSOURCE24
-#define FIQMASK_VICSOURCE25     INTMASK_VICSOURCE25
-#define FIQMASK_VICSOURCE26     INTMASK_VICSOURCE26
-#define FIQMASK_VICSOURCE27     INTMASK_VICSOURCE27
-#define FIQMASK_VICSOURCE28     INTMASK_VICSOURCE28
-#define FIQMASK_VICSOURCE29     INTMASK_VICSOURCE29
-#define FIQMASK_VICSOURCE30     INTMASK_VICSOURCE30
-#define FIQMASK_VICSOURCE31     INTMASK_VICSOURCE31
-
 /*
  * Secondary interrupt controller
  */
@@ -188,24 +122,4 @@
 #define IRQ_SIC_PCI3            (IRQ_SIC_START + SIC_INT_PCI3)
 #define IRQ_SIC_END             63
 
-#define SIC_IRQMASK_MMCI0B      SIC_INTMASK_MMCI0B
-#define SIC_IRQMASK_MMCI1B      SIC_INTMASK_MMCI1B
-#define SIC_IRQMASK_KMI0        SIC_INTMASK_KMI0
-#define SIC_IRQMASK_KMI1        SIC_INTMASK_KMI1
-#define SIC_IRQMASK_SCI3        SIC_INTMASK_SCI3
-#define SIC_IRQMASK_UART3       SIC_INTMASK_UART3
-#define SIC_IRQMASK_CLCD        SIC_INTMASK_CLCD
-#define SIC_IRQMASK_TOUCH       SIC_INTMASK_TOUCH
-#define SIC_IRQMASK_KEYPAD      SIC_INTMASK_KEYPAD
-#define SIC_IRQMASK_DoC         SIC_INTMASK_DoC
-#define SIC_IRQMASK_MMCI0A      SIC_INTMASK_MMCI0A
-#define SIC_IRQMASK_MMCI1A      SIC_INTMASK_MMCI1A
-#define SIC_IRQMASK_AACI        SIC_INTMASK_AACI
-#define SIC_IRQMASK_ETH         SIC_INTMASK_ETH
-#define SIC_IRQMASK_USB         SIC_INTMASK_USB
-#define SIC_IRQMASK_PCI0        SIC_INTMASK_PCI0
-#define SIC_IRQMASK_PCI1        SIC_INTMASK_PCI1
-#define SIC_IRQMASK_PCI2        SIC_INTMASK_PCI2
-#define SIC_IRQMASK_PCI3        SIC_INTMASK_PCI3
-
 #define NR_IRQS                 64
diff --git a/arch/arm/mach-versatile/include/mach/memory.h b/arch/arm/mach-versatile/include/mach/memory.h
index b6315c0602ac..79aeab86b903 100644
--- a/arch/arm/mach-versatile/include/mach/memory.h
+++ b/arch/arm/mach-versatile/include/mach/memory.h
@@ -25,14 +25,4 @@
  */
 #define PHYS_OFFSET     UL(0x00000000)
 
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *              address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *              to an address that the kernel can use.
- */
-#define __virt_to_bus(x)        ((x) - PAGE_OFFSET)
-#define __bus_to_virt(x)        ((x) + PAGE_OFFSET)
-
 #endif
diff --git a/arch/arm/mach-versatile/include/mach/platform.h b/arch/arm/mach-versatile/include/mach/platform.h
index f91ba930ca8a..83207395191a 100644
--- a/arch/arm/mach-versatile/include/mach/platform.h
+++ b/arch/arm/mach-versatile/include/mach/platform.h
@@ -347,44 +347,6 @@
 #define INT_VICSOURCE30                 30      /* PCI 3 */
 #define INT_VICSOURCE31                 31      /* SIC source */
 
-/* 
- *  Interrupt bit positions
- * 
- */
-#define INTMASK_WDOGINT                 (1 << INT_WDOGINT)
-#define INTMASK_SOFTINT                 (1 << INT_SOFTINT)
-#define INTMASK_COMMRx                  (1 << INT_COMMRx)
-#define INTMASK_COMMTx                  (1 << INT_COMMTx)
-#define INTMASK_TIMERINT0_1             (1 << INT_TIMERINT0_1)
-#define INTMASK_TIMERINT2_3             (1 << INT_TIMERINT2_3)
-#define INTMASK_GPIOINT0                (1 << INT_GPIOINT0)
-#define INTMASK_GPIOINT1                (1 << INT_GPIOINT1)
-#define INTMASK_GPIOINT2                (1 << INT_GPIOINT2)
-#define INTMASK_GPIOINT3                (1 << INT_GPIOINT3)
-#define INTMASK_RTCINT                  (1 << INT_RTCINT)
-#define INTMASK_SSPINT                  (1 << INT_SSPINT)
-#define INTMASK_UARTINT0                (1 << INT_UARTINT0)
-#define INTMASK_UARTINT1                (1 << INT_UARTINT1)
-#define INTMASK_UARTINT2                (1 << INT_UARTINT2)
-#define INTMASK_SCIINT                  (1 << INT_SCIINT)
-#define INTMASK_CLCDINT                 (1 << INT_CLCDINT)
-#define INTMASK_DMAINT                  (1 << INT_DMAINT)
-#define INTMASK_PWRFAILINT              (1 << INT_PWRFAILINT)
-#define INTMASK_MBXINT                  (1 << INT_MBXINT)
-#define INTMASK_GNDINT                  (1 << INT_GNDINT)
-#define INTMASK_VICSOURCE21             (1 << INT_VICSOURCE21)
-#define INTMASK_VICSOURCE22             (1 << INT_VICSOURCE22)
-#define INTMASK_VICSOURCE23             (1 << INT_VICSOURCE23)
-#define INTMASK_VICSOURCE24             (1 << INT_VICSOURCE24)
-#define INTMASK_VICSOURCE25             (1 << INT_VICSOURCE25)
-#define INTMASK_VICSOURCE26             (1 << INT_VICSOURCE26)
-#define INTMASK_VICSOURCE27             (1 << INT_VICSOURCE27)
-#define INTMASK_VICSOURCE28             (1 << INT_VICSOURCE28)
-#define INTMASK_VICSOURCE29             (1 << INT_VICSOURCE29)
-#define INTMASK_VICSOURCE30             (1 << INT_VICSOURCE30)
-#define INTMASK_VICSOURCE31             (1 << INT_VICSOURCE31)
-
-
 #define VERSATILE_SC_VALID_INT               0x003FFFFF
 
 #define MAXIRQNUM                       31
@@ -417,26 +379,6 @@
 #define SIC_INT_PCI3                    30
 
 
-#define SIC_INTMASK_MMCI0B              (1 << SIC_INT_MMCI0B)
-#define SIC_INTMASK_MMCI1B              (1 << SIC_INT_MMCI1B)
-#define SIC_INTMASK_KMI0                (1 << SIC_INT_KMI0)
-#define SIC_INTMASK_KMI1                (1 << SIC_INT_KMI1)
-#define SIC_INTMASK_SCI3                (1 << SIC_INT_SCI3)
-#define SIC_INTMASK_UART3               (1 << SIC_INT_UART3)
-#define SIC_INTMASK_CLCD                (1 << SIC_INT_CLCD)
-#define SIC_INTMASK_TOUCH               (1 << SIC_INT_TOUCH)
-#define SIC_INTMASK_KEYPAD              (1 << SIC_INT_KEYPAD)
-#define SIC_INTMASK_DoC                 (1 << SIC_INT_DoC)
-#define SIC_INTMASK_MMCI0A              (1 << SIC_INT_MMCI0A)
-#define SIC_INTMASK_MMCI1A              (1 << SIC_INT_MMCI1A)
-#define SIC_INTMASK_AACI                (1 << SIC_INT_AACI)
-#define SIC_INTMASK_ETH                 (1 << SIC_INT_ETH)
-#define SIC_INTMASK_USB                 (1 << SIC_INT_USB)
-#define SIC_INTMASK_PCI0                (1 << SIC_INT_PCI0)
-#define SIC_INTMASK_PCI1                (1 << SIC_INT_PCI1)
-#define SIC_INTMASK_PCI2                (1 << SIC_INT_PCI2)
-#define SIC_INTMASK_PCI3                (1 << SIC_INT_PCI3)
-
 /* 
  *  Clean base - dummy
  * 
diff --git a/arch/arm/mach-w90x900/Kconfig b/arch/arm/mach-w90x900/Kconfig
new file mode 100644
index 000000000000..8e4178fe5ec2
--- /dev/null
+++ b/arch/arm/mach-w90x900/Kconfig
@@ -0,0 +1,19 @@
+if ARCH_W90X900
+
+config CPU_W90P910
+        bool
+        help
+          Support for W90P910 of Nuvoton W90X900 CPUs.
+
+menu "W90P910 Machines"
+
+config MACH_W90P910EVB
+        bool "Nuvoton W90P910 Evaluation Board"
+        default y
+        select CPU_W90P910
+        help
+           Say Y here if you are using the Nuvoton W90P910EVB
+
+endmenu
+
+endif
diff --git a/arch/arm/mach-w90x900/Makefile b/arch/arm/mach-w90x900/Makefile
new file mode 100644
index 000000000000..0c0c1d63f1c7
--- /dev/null
+++ b/arch/arm/mach-w90x900/Makefile
@@ -0,0 +1,15 @@
+#
+# Makefile for the linux kernel.
+#
+
+# Object file lists.
+
+obj-y                           := irq.o time.o
+
+# W90X900 CPU support files
+
+obj-$(CONFIG_CPU_W90P910)       += w90p910.o
+
+# machine support
+
+obj-$(CONFIG_MACH_W90P910EVB)   += mach-w90p910evb.o
diff --git a/arch/arm/mach-w90x900/Makefile.boot b/arch/arm/mach-w90x900/Makefile.boot
new file mode 100644
index 000000000000..a057b546b6e5
--- /dev/null
+++ b/arch/arm/mach-w90x900/Makefile.boot
@@ -0,0 +1,3 @@
+zreladdr-y      := 0x00008000
+params_phys-y   := 0x00000100
+
diff --git a/arch/arm/mach-w90x900/cpu.h b/arch/arm/mach-w90x900/cpu.h
new file mode 100644
index 000000000000..40ff40845df0
--- /dev/null
+++ b/arch/arm/mach-w90x900/cpu.h
@@ -0,0 +1,77 @@
+/*
+ * arch/arm/mach-w90x900/cpu.h
+ *
+ * Based on linux/include/asm-arm/plat-s3c24xx/cpu.h by Ben Dooks
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Header file for W90X900 CPU support
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#define IODESC_ENT(y)                                  \
+{                                                      \
+       .virtual = (unsigned long)W90X900_VA_##y,       \
+       .pfn     = __phys_to_pfn(W90X900_PA_##y),       \
+       .length  = W90X900_SZ_##y,                      \
+       .type    = MT_DEVICE,                           \
+}
+
+/*Cpu identifier register*/
+
+#define W90X900PDID     W90X900_VA_GCR
+#define W90P910_CPUID   0x02900910
+#define W90P920_CPUID   0x02900920
+#define W90P950_CPUID   0x02900950
+#define W90N960_CPUID   0x02900960
+
+struct w90x900_uartcfg;
+struct map_desc;
+struct sys_timer;
+
+/* core initialisation functions */
+
+extern void w90x900_init_irq(void);
+extern void w90p910_init_io(struct map_desc *mach_desc, int size);
+extern void w90p910_init_uarts(struct w90x900_uartcfg *cfg, int no);
+extern void w90p910_init_clocks(int xtal);
+extern void w90p910_map_io(struct map_desc *mach_desc, int size);
+extern struct sys_timer w90x900_timer;
+
+#define W90X900_RES(name)                               \
+struct resource w90x900_##name##_resource[] = {         \
+        [0] = {                                         \
+                .start = name##_PA,                     \
+                .end   = name##_PA + 0x0ff,             \
+                .flags = IORESOURCE_MEM,                \
+        },                                              \
+        [1] = {                                         \
+                .start = IRQ_##name,                    \
+                .end   = IRQ_##name,                    \
+                .flags = IORESOURCE_IRQ,                \
+        }                                               \
+}
+
+#define W90X900_DEVICE(devname, regname, devid, platdevname)            \
+struct platform_device w90x900_##devname = {                            \
+        .name           = platdevname,                                  \
+        .id             = devid,                                        \
+        .num_resources  = ARRAY_SIZE(w90x900_##regname##_resource),     \
+        .resource       = w90x900_##regname##_resource,                 \
+}
+
+#define W90X900_UARTCFG(port, flag, uc, ulc, ufc)       \
+{                                                       \
+                .hwport = port,                         \
+                .flags  = flag,                         \
+                .ucon   = uc,                           \
+                .ulcon  = ulc,                          \
+                .ufcon  = ufc,                          \
+}
diff --git a/arch/arm/mach-w90x900/include/mach/entry-macro.S b/arch/arm/mach-w90x900/include/mach/entry-macro.S
new file mode 100644
index 000000000000..d39aca5be9ee
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/entry-macro.S
@@ -0,0 +1,34 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/entry-macro.S
+ *
+ * Low-level IRQ helper macros for W90P910-based platforms
+ *
+ * This file is licensed under  the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ *
+ */
+
+#include <mach/hardware.h>
+#include <mach/regs-irq.h>
+
+        .macro  get_irqnr_preamble, base, tmp
+        .endm
+
+        .macro  arch_ret_to_user, tmp1, tmp2
+        .endm
+
+        .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+
+                mov     \base, #AIC_BA
+
+                ldr     \irqnr, [ \base, #AIC_IPER]
+                ldr     \irqnr, [ \base, #AIC_ISNR]
+                cmp     \irqnr, #0
+
+        .endm
+
+        /* currently don't need an disable_fiq macro */
+
+        .macro  disable_fiq
+        .endm
diff --git a/arch/arm/mach-w90x900/include/mach/hardware.h b/arch/arm/mach-w90x900/include/mach/hardware.h
new file mode 100644
index 000000000000..fe3c6265a466
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/hardware.h
@@ -0,0 +1,24 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/hardware.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/hardware.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H
+
+#include <asm/sizes.h>
+#include <mach/map.h>
+
+#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-w90x900/include/mach/io.h b/arch/arm/mach-w90x900/include/mach/io.h
new file mode 100644
index 000000000000..d96ab99df05b
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/io.h
@@ -0,0 +1,30 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/io.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/io.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+#define IO_SPACE_LIMIT  0xffffffff
+
+/*
+ * 1:1 mapping for ioremapped regions.
+ */
+
+#define __mem_pci(a)    (a)
+#define __io(a)         __typesafe_io(a)
+
+#endif
diff --git a/arch/arm/mach-w90x900/include/mach/irqs.h b/arch/arm/mach-w90x900/include/mach/irqs.h
new file mode 100644
index 000000000000..1c583f9cbcde
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/irqs.h
@@ -0,0 +1,45 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/irqs.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/irqs.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H
+
+/*
+ * we keep the first set of CPU IRQs out of the range of
+ * the ISA space, so that the PC104 has them to itself
+ * and we don't end up having to do horrible things to the
+ * standard ISA drivers....
+ *
+ */
+
+#define W90X900_IRQ(x)  (x)
+
+/* Main cpu interrupts */
+
+#define IRQ_WDT         W90X900_IRQ(1)
+#define IRQ_UART0       W90X900_IRQ(7)
+#define IRQ_UART1       W90X900_IRQ(8)
+#define IRQ_UART2       W90X900_IRQ(9)
+#define IRQ_UART3       W90X900_IRQ(10)
+#define IRQ_UART4       W90X900_IRQ(11)
+#define IRQ_TIMER0      W90X900_IRQ(12)
+#define IRQ_TIMER1      W90X900_IRQ(13)
+#define IRQ_T_INT_GROUP W90X900_IRQ(14)
+#define IRQ_ADC         W90X900_IRQ(31)
+#define NR_IRQS         (IRQ_ADC+1)
+
+#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-w90x900/include/mach/map.h b/arch/arm/mach-w90x900/include/mach/map.h
new file mode 100644
index 000000000000..79320ebe614b
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/map.h
@@ -0,0 +1,76 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/map.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/map.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_MAP_H
+#define __ASM_ARCH_MAP_H
+
+#ifndef __ASSEMBLY__
+#define W90X900_ADDR(x)         ((void __iomem *)(0xF0000000 + (x)))
+#else
+#define W90X900_ADDR(x)         (0xF0000000 + (x))
+#endif
+
+#define AHB_IO_BASE             0xB0000000
+#define APB_IO_BASE             0xB8000000
+#define CLOCKPW_BASE            (APB_IO_BASE+0x200)
+#define AIC_IO_BASE             (APB_IO_BASE+0x2000)
+#define TIMER_IO_BASE           (APB_IO_BASE+0x1000)
+
+/*
+ * interrupt controller is the first thing we put in, to make
+ * the assembly code for the irq detection easier
+ */
+
+#define W90X900_VA_IRQ          W90X900_ADDR(0x00000000)
+#define W90X900_PA_IRQ          (0xB8002000)
+#define W90X900_SZ_IRQ          SZ_4K
+
+#define W90X900_VA_GCR          W90X900_ADDR(0x08002000)
+#define W90X900_PA_GCR          (0xB0000000)
+#define W90X900_SZ_GCR          SZ_4K
+
+/* Clock and Power management */
+
+#define W90X900_VA_CLKPWR       (W90X900_VA_GCR+0x200)
+#define W90X900_PA_CLKPWR       (0xB0000200)
+#define W90X900_SZ_CLKPWR       SZ_4K
+
+/* EBI management */
+
+#define W90X900_VA_EBI          W90X900_ADDR(0x00001000)
+#define W90X900_PA_EBI          (0xB0001000)
+#define W90X900_SZ_EBI          SZ_4K
+
+/* UARTs */
+
+#define W90X900_VA_UART         W90X900_ADDR(0x08000000)
+#define W90X900_PA_UART         (0xB8000000)
+#define W90X900_SZ_UART         SZ_4K
+
+/* Timers */
+
+#define W90X900_VA_TIMER        W90X900_ADDR(0x08001000)
+#define W90X900_PA_TIMER        (0xB8001000)
+#define W90X900_SZ_TIMER        SZ_4K
+
+/* GPIO ports */
+
+#define W90X900_VA_GPIO         W90X900_ADDR(0x08003000)
+#define W90X900_PA_GPIO         (0xB8003000)
+#define W90X900_SZ_GPIO         SZ_4K
+
+#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-w90x900/include/mach/memory.h b/arch/arm/mach-w90x900/include/mach/memory.h
new file mode 100644
index 000000000000..971b80702c27
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/memory.h
@@ -0,0 +1,23 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/memory.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/memory.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+#define PHYS_OFFSET     UL(0x00000000)
+
+#endif
diff --git a/arch/arm/mach-w90x900/include/mach/regs-irq.h b/arch/arm/mach-w90x900/include/mach/regs-irq.h
new file mode 100644
index 000000000000..8a3185fbc9cf
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/regs-irq.h
@@ -0,0 +1,51 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/regs-irq.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/regs-irq.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef ___ASM_ARCH_REGS_IRQ_H
+#define ___ASM_ARCH_REGS_IRQ_H
+
+/* Advance Interrupt Controller (AIC) Registers */
+
+#define AIC_BA                  W90X900_VA_IRQ
+
+#define REG_AIC_IRQSC           (AIC_BA+0x80)
+#define REG_AIC_GEN             (AIC_BA+0x84)
+#define REG_AIC_GASR            (AIC_BA+0x88)
+#define REG_AIC_GSCR            (AIC_BA+0x8C)
+#define REG_AIC_IRSR            (AIC_BA+0x100)
+#define REG_AIC_IASR            (AIC_BA+0x104)
+#define REG_AIC_ISR             (AIC_BA+0x108)
+#define REG_AIC_IPER            (AIC_BA+0x10C)
+#define REG_AIC_ISNR            (AIC_BA+0x110)
+#define REG_AIC_IMR             (AIC_BA+0x114)
+#define REG_AIC_OISR            (AIC_BA+0x118)
+#define REG_AIC_MECR            (AIC_BA+0x120)
+#define REG_AIC_MDCR            (AIC_BA+0x124)
+#define REG_AIC_SSCR            (AIC_BA+0x128)
+#define REG_AIC_SCCR            (AIC_BA+0x12C)
+#define REG_AIC_EOSCR           (AIC_BA+0x130)
+#define AIC_IPER                (0x10C)
+#define AIC_ISNR                (0x110)
+
+/*16-18 bits of REG_AIC_GEN define irq(2-4) group*/
+
+#define TIMER2_IRQ              (1 << 16)
+#define TIMER3_IRQ              (1 << 17)
+#define TIMER4_IRQ              (1 << 18)
+#define TIME_GROUP_IRQ          (TIMER2_IRQ|TIMER3_IRQ|TIMER4_IRQ)
+
+#endif /* ___ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-w90x900/include/mach/regs-serial.h b/arch/arm/mach-w90x900/include/mach/regs-serial.h
new file mode 100644
index 000000000000..f08fa0d75e11
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/regs-serial.h
@@ -0,0 +1,59 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/regs-serial.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/regs-serial.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARM_REGS_SERIAL_H
+#define __ASM_ARM_REGS_SERIAL_H
+
+#define UART0_BA        W90X900_VA_UART
+#define UART1_BA        (W90X900_VA_UART+0x100)
+#define UART2_BA        (W90X900_VA_UART+0x200)
+#define UART3_BA        (W90X900_VA_UART+0x300)
+#define UART4_BA        (W90X900_VA_UART+0x400)
+
+#define UART0_PA        W90X900_PA_UART
+#define UART1_PA        (W90X900_PA_UART+0x100)
+#define UART2_PA        (W90X900_PA_UART+0x200)
+#define UART3_PA        (W90X900_PA_UART+0x300)
+#define UART4_PA        (W90X900_PA_UART+0x400)
+
+#ifndef __ASSEMBLY__
+
+struct w90x900_uart_clksrc {
+        const char      *name;
+        unsigned int    divisor;
+        unsigned int    min_baud;
+        unsigned int    max_baud;
+};
+
+struct w90x900_uartcfg {
+        unsigned char   hwport;
+        unsigned char   unused;
+        unsigned short  flags;
+        unsigned long   uart_flags;
+
+        unsigned long   ucon;
+        unsigned long   ulcon;
+        unsigned long   ufcon;
+
+        struct w90x900_uart_clksrc *clocks;
+        unsigned int    clocks_size;
+};
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ASM_ARM_REGS_SERIAL_H */
+
diff --git a/arch/arm/mach-w90x900/include/mach/regs-timer.h b/arch/arm/mach-w90x900/include/mach/regs-timer.h
new file mode 100644
index 000000000000..8f390620c0e4
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/regs-timer.h
@@ -0,0 +1,42 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/regs-timer.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/regs-timer.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_REGS_TIMER_H
+#define __ASM_ARCH_REGS_TIMER_H
+
+/* Timer Registers */
+
+#define TMR_BA                  W90X900_VA_TIMER
+#define REG_TCSR0               (TMR_BA+0x00)
+#define REG_TCSR1               (TMR_BA+0x04)
+#define REG_TICR0               (TMR_BA+0x08)
+#define REG_TICR1               (TMR_BA+0x0C)
+#define REG_TDR0                (TMR_BA+0x10)
+#define REG_TDR1                (TMR_BA+0x14)
+#define REG_TISR                (TMR_BA+0x18)
+#define REG_WTCR                (TMR_BA+0x1C)
+#define REG_TCSR2               (TMR_BA+0x20)
+#define REG_TCSR3               (TMR_BA+0x24)
+#define REG_TICR2               (TMR_BA+0x28)
+#define REG_TICR3               (TMR_BA+0x2C)
+#define REG_TDR2                (TMR_BA+0x30)
+#define REG_TDR3                (TMR_BA+0x34)
+#define REG_TCSR4               (TMR_BA+0x40)
+#define REG_TICR4               (TMR_BA+0x48)
+#define REG_TDR4                (TMR_BA+0x50)
+
+#endif /*  __ASM_ARCH_REGS_TIMER_H */
diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h
new file mode 100644
index 000000000000..93753f922618
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/system.h
@@ -0,0 +1,28 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/system.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/system.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <asm/proc-fns.h>
+
+static void arch_idle(void)
+{
+}
+
+static void arch_reset(char mode)
+{
+        cpu_reset(0);
+}
+
diff --git a/arch/arm/mach-w90x900/include/mach/timex.h b/arch/arm/mach-w90x900/include/mach/timex.h
new file mode 100644
index 000000000000..164dce0b64db
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/timex.h
@@ -0,0 +1,25 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/timex.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/timex.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_TIMEX_H
+#define __ASM_ARCH_TIMEX_H
+
+/* CLOCK_TICK_RATE Now, I don't use it. */
+
+#define CLOCK_TICK_RATE 15000000
+
+#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-w90x900/include/mach/uncompress.h b/arch/arm/mach-w90x900/include/mach/uncompress.h
new file mode 100644
index 000000000000..050d9fe5ae1b
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/uncompress.h
@@ -0,0 +1,40 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/uncompress.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/uncompress.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_UNCOMPRESS_H
+#define __ASM_ARCH_UNCOMPRESS_H
+
+/* Defines for UART registers */
+
+#include <mach/regs-serial.h>
+#include <mach/map.h>
+
+#define arch_decomp_wdog()
+
+static void putc(int ch)
+{
+}
+
+static inline void flush(void)
+{
+}
+
+static void arch_decomp_setup(void)
+{
+}
+
+#endif/* __ASM_W90X900_UNCOMPRESS_H */
diff --git a/arch/arm/mach-w90x900/include/mach/vmalloc.h b/arch/arm/mach-w90x900/include/mach/vmalloc.h
new file mode 100644
index 000000000000..2f9dfb928533
--- /dev/null
+++ b/arch/arm/mach-w90x900/include/mach/vmalloc.h
@@ -0,0 +1,23 @@
+/*
+ * arch/arm/mach-w90x900/include/mach/vmalloc.h
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * Based on arch/arm/mach-s3c2410/include/mach/vmalloc.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_VMALLOC_H
+#define __ASM_ARCH_VMALLOC_H
+
+#define VMALLOC_END       (0xE0000000)
+
+#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/arch/arm/mach-w90x900/irq.c b/arch/arm/mach-w90x900/irq.c
new file mode 100644
index 000000000000..0b4fc194729c
--- /dev/null
+++ b/arch/arm/mach-w90x900/irq.c
@@ -0,0 +1,76 @@
+/*
+ * linux/arch/arm/mach-w90x900/irq.c
+ *
+ * based on linux/arch/arm/plat-s3c24xx/irq.c by Ben Dooks
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/ptrace.h>
+#include <linux/sysdev.h>
+#include <linux/io.h>
+
+#include <asm/irq.h>
+#include <asm/mach/irq.h>
+
+#include <mach/hardware.h>
+#include <mach/regs-irq.h>
+
+static void w90x900_irq_mask(unsigned int irq)
+{
+        __raw_writel(1 << irq, REG_AIC_MDCR);
+}
+
+/*
+ * By the w90p910 spec,any irq,only write 1
+ * to REG_AIC_EOSCR for ACK
+ */
+
+static void w90x900_irq_ack(unsigned int irq)
+{
+        __raw_writel(0x01, REG_AIC_EOSCR);
+}
+
+static void w90x900_irq_unmask(unsigned int irq)
+{
+        unsigned long mask;
+
+        if (irq == IRQ_T_INT_GROUP) {
+                mask = __raw_readl(REG_AIC_GEN);
+                __raw_writel(TIME_GROUP_IRQ | mask, REG_AIC_GEN);
+                __raw_writel(1 << IRQ_T_INT_GROUP, REG_AIC_MECR);
+        }
+        __raw_writel(1 << irq, REG_AIC_MECR);
+}
+
+static struct irq_chip w90x900_irq_chip = {
+        .ack       = w90x900_irq_ack,
+        .mask      = w90x900_irq_mask,
+        .unmask    = w90x900_irq_unmask,
+};
+
+void __init w90x900_init_irq(void)
+{
+        int irqno;
+
+        __raw_writel(0xFFFFFFFE, REG_AIC_MDCR);
+
+        for (irqno = IRQ_WDT; irqno <= IRQ_ADC; irqno++) {
+                set_irq_chip(irqno, &w90x900_irq_chip);
+                set_irq_handler(irqno, handle_level_irq);
+                set_irq_flags(irqno, IRQF_VALID);
+        }
+}
diff --git a/arch/arm/mach-w90x900/mach-w90p910evb.c b/arch/arm/mach-w90x900/mach-w90p910evb.c
new file mode 100644
index 000000000000..9307a2475438
--- /dev/null
+++ b/arch/arm/mach-w90x900/mach-w90p910evb.c
@@ -0,0 +1,72 @@
+/*
+ * linux/arch/arm/mach-w90x900/mach-w90p910evb.c
+ *
+ * Based on mach-s3c2410/mach-smdk2410.c by Jonas Dietsche
+ *
+ * Copyright (C) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+#include <asm/mach-types.h>
+
+#include <mach/regs-serial.h>
+
+#include "cpu.h"
+
+static struct map_desc w90p910_iodesc[] __initdata = {
+};
+
+static struct w90x900_uartcfg w90p910_uartcfgs[] = {
+        W90X900_UARTCFG(0, 0, 0, 0, 0),
+        W90X900_UARTCFG(1, 0, 0, 0, 0),
+        W90X900_UARTCFG(2, 0, 0, 0, 0),
+        W90X900_UARTCFG(3, 0, 0, 0, 0),
+        W90X900_UARTCFG(4, 0, 0, 0, 0),
+};
+
+/*Here should be your evb resourse,such as LCD*/
+
+static struct platform_device *w90p910evb_dev[] __initdata = {
+};
+
+static void __init w90p910evb_map_io(void)
+{
+        w90p910_map_io(w90p910_iodesc, ARRAY_SIZE(w90p910_iodesc));
+        w90p910_init_clocks(0);
+        w90p910_init_uarts(w90p910_uartcfgs, ARRAY_SIZE(w90p910_uartcfgs));
+}
+
+static void __init w90p910evb_init(void)
+{
+        platform_add_devices(w90p910evb_dev, ARRAY_SIZE(w90p910evb_dev));
+}
+
+MACHINE_START(W90P910EVB, "W90P910EVB")
+        /* Maintainer: Wan ZongShun */
+        .phys_io        = W90X900_PA_UART,
+        .io_pg_offst    = (((u32)W90X900_VA_UART) >> 18) & 0xfffc,
+        .boot_params    = 0,
+        .map_io         = w90p910evb_map_io,
+        .init_irq       = w90x900_init_irq,
+        .init_machine   = w90p910evb_init,
+        .timer          = &w90x900_timer,
+MACHINE_END
diff --git a/arch/arm/mach-w90x900/time.c b/arch/arm/mach-w90x900/time.c
new file mode 100644
index 000000000000..3a69e381f316
--- /dev/null
+++ b/arch/arm/mach-w90x900/time.c
@@ -0,0 +1,80 @@
+/*
+ * linux/arch/arm/mach-w90x900/time.c
+ *
+ * Based on linux/arch/arm/plat-s3c24xx/time.c by Ben Dooks
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/leds.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/irq.h>
+#include <asm/mach/time.h>
+
+#include <mach/system.h>
+#include <mach/map.h>
+#include <mach/regs-timer.h>
+
+static unsigned long w90x900_gettimeoffset(void)
+{
+        return 0;
+}
+
+/*IRQ handler for the timer*/
+
+static irqreturn_t
+w90x900_timer_interrupt(int irq, void *dev_id)
+{
+        timer_tick();
+        __raw_writel(0x01, REG_TISR); /* clear TIF0 */
+        return IRQ_HANDLED;
+}
+
+static struct irqaction w90x900_timer_irq = {
+        .name           = "w90x900 Timer Tick",
+        .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
+        .handler        = w90x900_timer_interrupt,
+};
+
+/*Set up timer reg.*/
+
+static void w90x900_timer_setup(void)
+{
+        __raw_writel(0, REG_TCSR0);
+        __raw_writel(0, REG_TCSR1);
+        __raw_writel(0, REG_TCSR2);
+        __raw_writel(0, REG_TCSR3);
+        __raw_writel(0, REG_TCSR4);
+        __raw_writel(0x1F, REG_TISR);
+        __raw_writel(15000000/(100 * 100), REG_TICR0);
+        __raw_writel(0x68000063, REG_TCSR0);
+}
+
+static void __init w90x900_timer_init(void)
+{
+        w90x900_timer_setup();
+        setup_irq(IRQ_TIMER0, &w90x900_timer_irq);
+}
+
+struct sys_timer w90x900_timer = {
+        .init           = w90x900_timer_init,
+        .offset         = w90x900_gettimeoffset,
+        .resume         = w90x900_timer_setup
+};
diff --git a/arch/arm/mach-w90x900/w90p910.c b/arch/arm/mach-w90x900/w90p910.c
new file mode 100644
index 000000000000..aa783bc94310
--- /dev/null
+++ b/arch/arm/mach-w90x900/w90p910.c
@@ -0,0 +1,134 @@
+/*
+ * linux/arch/arm/mach-w90x900/w90p910.c
+ *
+ * Based on linux/arch/arm/plat-s3c24xx/s3c244x.c by Ben Dooks
+ *
+ * Copyright (c) 2008 Nuvoton technology corporation
+ * All rights reserved.
+ *
+ * Wan ZongShun <mcuos.com@gmail.com>
+ *
+ * W90P910 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+#include <asm/irq.h>
+
+#include <mach/hardware.h>
+#include <mach/regs-serial.h>
+
+#include "cpu.h"
+
+/*W90P910 has five uarts*/
+
+#define MAX_UART_COUNT 5
+static int uart_count;
+static struct platform_device *uart_devs[MAX_UART_COUNT-1];
+
+/* Initial IO mappings */
+
+static struct map_desc w90p910_iodesc[] __initdata = {
+        IODESC_ENT(IRQ),
+        IODESC_ENT(GCR),
+        IODESC_ENT(UART),
+        IODESC_ENT(TIMER),
+        IODESC_ENT(EBI),
+        /*IODESC_ENT(LCD),*/
+};
+
+/*Init the dev resource*/
+
+static W90X900_RES(UART0);
+static W90X900_RES(UART1);
+static W90X900_RES(UART2);
+static W90X900_RES(UART3);
+static W90X900_RES(UART4);
+static W90X900_DEVICE(uart0, UART0, 0, "w90x900-uart");
+static W90X900_DEVICE(uart1, UART1, 1, "w90x900-uart");
+static W90X900_DEVICE(uart2, UART2, 2, "w90x900-uart");
+static W90X900_DEVICE(uart3, UART3, 3, "w90x900-uart");
+static W90X900_DEVICE(uart4, UART4, 4, "w90x900-uart");
+
+static struct platform_device *uart_devices[] __initdata = {
+        &w90x900_uart0,
+        &w90x900_uart1,
+        &w90x900_uart2,
+        &w90x900_uart3,
+        &w90x900_uart4
+};
+
+/*Init W90P910 uart device*/
+
+void __init w90p910_init_uarts(struct w90x900_uartcfg *cfg, int no)
+{
+        struct platform_device *platdev;
+        int uart, uartdev;
+
+        /*By min() to judge count of uart be used indeed*/
+
+        uartdev = ARRAY_SIZE(uart_devices);
+        no = min(uartdev, no);
+
+        for (uart = 0; uart < no; uart++, cfg++) {
+                if (cfg->hwport != uart)
+                        printk(KERN_ERR "w90x900_uartcfg[%d] error\n", uart);
+                platdev = uart_devices[cfg->hwport];
+                uart_devs[uart] = platdev;
+                platdev->dev.platform_data = cfg;
+        }
+        uart_count = uart;
+}
+
+/*Init W90P910 evb io*/
+
+void __init w90p910_map_io(struct map_desc *mach_desc, int mach_size)
+{
+        unsigned long idcode = 0x0;
+
+        iotable_init(w90p910_iodesc, ARRAY_SIZE(w90p910_iodesc));
+
+        idcode = __raw_readl(W90X900PDID);
+        if (idcode != W90P910_CPUID)
+                printk(KERN_ERR "CPU type 0x%08lx is not W90P910\n", idcode);
+}
+
+/*Init W90P910 clock*/
+
+void __init w90p910_init_clocks(int xtal)
+{
+}
+
+static int __init w90p910_init_cpu(void)
+{
+        return 0;
+}
+
+static int __init w90x900_arch_init(void)
+{
+        int ret;
+
+        ret = w90p910_init_cpu();
+        if (ret != 0)
+                return ret;
+
+        return platform_add_devices(uart_devs, uart_count);
+
+}
+arch_initcall(w90x900_arch_init);
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index ab5f7a21350b..d490f3773c01 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -10,8 +10,7 @@ config CPU_32
 
 # ARM610
 config CPU_ARM610
-        bool "Support ARM610 processor"
-        depends on ARCH_RPC
+        bool "Support ARM610 processor" if ARCH_RPC
         select CPU_32v3
         select CPU_CACHE_V3
         select CPU_CACHE_VIVT
@@ -43,8 +42,7 @@ config CPU_ARM7TDMI
 
 # ARM710
 config CPU_ARM710
-        bool "Support ARM710 processor" if !ARCH_CLPS7500 && ARCH_RPC
-        default y if ARCH_CLPS7500
+        bool "Support ARM710 processor" if ARCH_RPC
         select CPU_32v3
         select CPU_CACHE_V3
         select CPU_CACHE_VIVT
@@ -63,8 +61,7 @@ config CPU_ARM710
 
 # ARM720T
 config CPU_ARM720T
-        bool "Support ARM720T processor" if !ARCH_CLPS711X && !ARCH_L7200 && !ARCH_CDB89712 && ARCH_INTEGRATOR
-        default y if ARCH_CLPS711X || ARCH_L7200 || ARCH_CDB89712 || ARCH_H720X
+        bool "Support ARM720T processor" if ARCH_INTEGRATOR
         select CPU_32v4T
         select CPU_ABRT_LV4T
         select CPU_PABRT_NOIFAR
@@ -114,9 +111,7 @@ config CPU_ARM9TDMI
 
 # ARM920T
 config CPU_ARM920T
-        bool "Support ARM920T processor"
-        depends on ARCH_EP93XX || ARCH_INTEGRATOR || CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_IMX || ARCH_AAEC2000 || ARCH_AT91RM9200
-        default y if CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_AT91RM9200
+        bool "Support ARM920T processor" if ARCH_INTEGRATOR
         select CPU_32v4T
         select CPU_ABRT_EV4T
         select CPU_PABRT_NOIFAR
@@ -138,8 +133,6 @@ config CPU_ARM920T
 # ARM922T
 config CPU_ARM922T
         bool "Support ARM922T processor" if ARCH_INTEGRATOR
-        depends on ARCH_LH7A40X || ARCH_INTEGRATOR || ARCH_KS8695
-        default y if ARCH_LH7A40X || ARCH_KS8695
         select CPU_32v4T
         select CPU_ABRT_EV4T
         select CPU_PABRT_NOIFAR
@@ -159,8 +152,6 @@ config CPU_ARM922T
 # ARM925T
 config CPU_ARM925T
         bool "Support ARM925T processor" if ARCH_OMAP1
-        depends on ARCH_OMAP15XX
-        default y if ARCH_OMAP15XX
         select CPU_32v4T
         select CPU_ABRT_EV4T
         select CPU_PABRT_NOIFAR
@@ -179,22 +170,7 @@ config CPU_ARM925T
 
 # ARM926T
 config CPU_ARM926T
-        bool "Support ARM926T processor"
-        depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || \
-                MACH_VERSATILE_AB || ARCH_OMAP730 || \
-                ARCH_OMAP16XX || MACH_REALVIEW_EB || \
-                ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || \
-                ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || \
-                ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || \
-                ARCH_AT91SAM9G20 || ARCH_AT91CAP9 || \
-                ARCH_NS9XXX || ARCH_DAVINCI || ARCH_MX2
-        default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || \
-                ARCH_OMAP730 || ARCH_OMAP16XX || \
-                ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || \
-                ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || \
-                ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || \
-                ARCH_AT91SAM9G20 || ARCH_AT91CAP9 || \
-                ARCH_NS9XXX || ARCH_DAVINCI || ARCH_MX2
+        bool "Support ARM926T processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB
         select CPU_32v5
         select CPU_ABRT_EV5TJ
         select CPU_PABRT_NOIFAR
@@ -247,8 +223,7 @@ config CPU_ARM946E
 
 # ARM1020 - needs validating
 config CPU_ARM1020
-        bool "Support ARM1020T (rev 0) processor"
-        depends on ARCH_INTEGRATOR
+        bool "Support ARM1020T (rev 0) processor" if ARCH_INTEGRATOR
         select CPU_32v5
         select CPU_ABRT_EV4T
         select CPU_PABRT_NOIFAR
@@ -266,8 +241,7 @@ config CPU_ARM1020
 
 # ARM1020E - needs validating
 config CPU_ARM1020E
-        bool "Support ARM1020E processor"
-        depends on ARCH_INTEGRATOR
+        bool "Support ARM1020E processor" if ARCH_INTEGRATOR
         select CPU_32v5
         select CPU_ABRT_EV4T
         select CPU_PABRT_NOIFAR
@@ -280,8 +254,7 @@ config CPU_ARM1020E
 
 # ARM1022E
 config CPU_ARM1022
-        bool "Support ARM1022E processor"
-        depends on ARCH_INTEGRATOR
+        bool "Support ARM1022E processor" if ARCH_INTEGRATOR
         select CPU_32v5
         select CPU_ABRT_EV4T
         select CPU_PABRT_NOIFAR
@@ -299,8 +272,7 @@ config CPU_ARM1022
 
 # ARM1026EJ-S
 config CPU_ARM1026
-        bool "Support ARM1026EJ-S processor"
-        depends on ARCH_INTEGRATOR
+        bool "Support ARM1026EJ-S processor" if ARCH_INTEGRATOR
         select CPU_32v5
         select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10
         select CPU_PABRT_NOIFAR
@@ -317,8 +289,7 @@ config CPU_ARM1026
 
 # SA110
 config CPU_SA110
-        bool "Support StrongARM(R) SA-110 processor" if !ARCH_EBSA110 && !FOOTBRIDGE && !ARCH_TBOX && !ARCH_SHARK && !ARCH_NEXUSPCI && ARCH_RPC
-        default y if ARCH_EBSA110 || FOOTBRIDGE || ARCH_TBOX || ARCH_SHARK || ARCH_NEXUSPCI
+        bool "Support StrongARM(R) SA-110 processor" if ARCH_RPC
         select CPU_32v3 if ARCH_RPC
         select CPU_32v4 if !ARCH_RPC
         select CPU_ABRT_EV4
@@ -340,8 +311,6 @@ config CPU_SA110
 # SA1100
 config CPU_SA1100
         bool
-        depends on ARCH_SA1100
-        default y
         select CPU_32v4
         select CPU_ABRT_EV4
         select CPU_PABRT_NOIFAR
@@ -353,8 +322,6 @@ config CPU_SA1100
 # XScale
 config CPU_XSCALE
         bool
-        depends on ARCH_IOP32X || ARCH_IOP33X || PXA25x || PXA27x || ARCH_IXP4XX || ARCH_IXP2000
-        default y
         select CPU_32v5
         select CPU_ABRT_EV5T
         select CPU_PABRT_NOIFAR
@@ -365,8 +332,6 @@ config CPU_XSCALE
 # XScale Core Version 3
 config CPU_XSC3
         bool
-        depends on ARCH_IXP23XX || ARCH_IOP13XX || PXA3xx
-        default y
         select CPU_32v5
         select CPU_ABRT_EV5T
         select CPU_PABRT_NOIFAR
@@ -378,8 +343,6 @@ config CPU_XSC3
 # Feroceon
 config CPU_FEROCEON
         bool
-        depends on ARCH_ORION5X || ARCH_LOKI || ARCH_KIRKWOOD || ARCH_MV78XX0
-        default y
         select CPU_32v5
         select CPU_ABRT_EV5T
         select CPU_PABRT_NOIFAR
@@ -399,10 +362,7 @@ config CPU_FEROCEON_OLD_ID
 
 # ARMv6
 config CPU_V6
-        bool "Support ARM V6 processor"
-        depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3 || ARCH_MSM || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176
-        default y if ARCH_MX3
-        default y if ARCH_MSM
+        bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB
         select CPU_32v6
         select CPU_ABRT_EV6
         select CPU_PABRT_NOIFAR
@@ -427,8 +387,7 @@ config CPU_32v6K
 
 # ARMv7
 config CPU_V7
-        bool "Support ARM V7 processor"
-        depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP3
+        bool "Support ARM V7 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB
         select CPU_32v6K
         select CPU_32v7
         select CPU_ABRT_EV7
@@ -745,7 +704,7 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
 
 config CACHE_L2X0
         bool "Enable the L2x0 outer cache controller"
-        depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176
+        depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || REALVIEW_EB_A9MP
         default y
         select OUTER_CACHE
         help
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 133e65d166b3..c5a57fbf095d 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -17,6 +17,7 @@
 #include <linux/string.h>
 #include <linux/proc_fs.h>
 #include <linux/init.h>
+#include <linux/sched.h>
 #include <linux/uaccess.h>
 
 #include <asm/unaligned.h>
diff --git a/arch/arm/mm/cache-v3.S b/arch/arm/mm/cache-v3.S
index 3b3639eb7ca5..8a4abebc478a 100644
--- a/arch/arm/mm/cache-v3.S
+++ b/arch/arm/mm/cache-v3.S
@@ -9,7 +9,6 @@
  */
 #include <linux/linkage.h>
 #include <linux/init.h>
-#include <mach/hardware.h>
 #include <asm/page.h>
 #include "proc-macros.S"
 
diff --git a/arch/arm/mm/cache-v4.S b/arch/arm/mm/cache-v4.S
index 5786adf10040..3668611cb400 100644
--- a/arch/arm/mm/cache-v4.S
+++ b/arch/arm/mm/cache-v4.S
@@ -9,7 +9,6 @@
  */
 #include <linux/linkage.h>
 #include <linux/init.h>
-#include <mach/hardware.h>
 #include <asm/page.h>
 #include "proc-macros.S"
 
diff --git a/arch/arm/mm/cache-v4wt.S b/arch/arm/mm/cache-v4wt.S
index 51a9b0b273b6..c54fa2cc40e6 100644
--- a/arch/arm/mm/cache-v4wt.S
+++ b/arch/arm/mm/cache-v4wt.S
@@ -13,7 +13,6 @@
  */
 #include <linux/linkage.h>
 #include <linux/init.h>
-#include <mach/hardware.h>
 #include <asm/page.h>
 #include "proc-macros.S"
 
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index d19c2bec2b1f..be93ff02a98d 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -26,6 +26,7 @@
  *      - mm    - mm_struct describing address space
  */
 ENTRY(v7_flush_dcache_all)
+        dmb                                     @ ensure ordering with previous memory accesses
         mrc     p15, 1, r0, c0, c0, 1           @ read clidr
         ands    r3, r0, #0x7000000              @ extract loc from clidr
         mov     r3, r3, lsr #23                 @ left align loc bit field
@@ -64,6 +65,7 @@ skip:
 finished:
         mov     r10, #0                         @ swith back to cache level 0
         mcr     p15, 2, r10, c0, c0, 0          @ select current cache level in cssr
+        dsb
         isb
         mov     pc, lr
 ENDPROC(v7_flush_dcache_all)
diff --git a/arch/arm/mm/copypage-feroceon.S b/arch/arm/mm/copypage-feroceon.S
deleted file mode 100644
index 7eb0d320d240..000000000000
--- a/arch/arm/mm/copypage-feroceon.S
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- *  linux/arch/arm/lib/copypage-feroceon.S
- *
- *  Copyright (C) 2008 Marvell Semiconductors
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This handles copy_user_page and clear_user_page on Feroceon
- * more optimally than the generic implementations.
- */
-#include <linux/linkage.h>
-#include <linux/init.h>
-#include <asm/asm-offsets.h>
-
-        .text
-        .align  5
-
-ENTRY(feroceon_copy_user_page)
-        stmfd   sp!, {r4-r9, lr}
-        mov     ip, #PAGE_SZ
-1:      mov     lr, r1
-        ldmia   r1!, {r2 - r9}
-        pld     [lr, #32]
-        pld     [lr, #64]
-        pld     [lr, #96]
-        pld     [lr, #128]
-        pld     [lr, #160]
-        pld     [lr, #192]
-        pld     [lr, #224]
-        stmia   r0, {r2 - r9}
-        ldmia   r1!, {r2 - r9}
-        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line
-        add     r0, r0, #32
-        stmia   r0, {r2 - r9}
-        ldmia   r1!, {r2 - r9}
-        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line
-        add     r0, r0, #32
-        stmia   r0, {r2 - r9}
-        ldmia   r1!, {r2 - r9}
-        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line
-        add     r0, r0, #32
-        stmia   r0, {r2 - r9}
-        ldmia   r1!, {r2 - r9}
-        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line
-        add     r0, r0, #32
-        stmia   r0, {r2 - r9}
-        ldmia   r1!, {r2 - r9}
-        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line
-        add     r0, r0, #32
-        stmia   r0, {r2 - r9}
-        ldmia   r1!, {r2 - r9}
-        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line
-        add     r0, r0, #32
-        stmia   r0, {r2 - r9}
-        ldmia   r1!, {r2 - r9}
-        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line
-        add     r0, r0, #32
-        stmia   r0, {r2 - r9}
-        subs    ip, ip, #(32 * 8)
-        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line
-        add     r0, r0, #32
-        bne     1b
-        mcr     p15, 0, ip, c7, c10, 4          @ drain WB
-        ldmfd   sp!, {r4-r9, pc}
-
-        .align  5
-
-ENTRY(feroceon_clear_user_page)
-        stmfd   sp!, {r4-r7, lr}
-        mov     r1, #PAGE_SZ/32
-        mov     r2, #0
-        mov     r3, #0
-        mov     r4, #0
-        mov     r5, #0
-        mov     r6, #0
-        mov     r7, #0
-        mov     ip, #0
-        mov     lr, #0
-1:      stmia   r0, {r2-r7, ip, lr}
-        subs    r1, r1, #1
-        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line
-        add     r0, r0, #32
-        bne     1b
-        mcr     p15, 0, r1, c7, c10, 4          @ drain WB
-        ldmfd   sp!, {r4-r7, pc}
-
-        __INITDATA
-
-        .type   feroceon_user_fns, #object
-ENTRY(feroceon_user_fns)
-        .long   feroceon_clear_user_page
-        .long   feroceon_copy_user_page
-        .size   feroceon_user_fns, . - feroceon_user_fns
diff --git a/arch/arm/mm/copypage-feroceon.c b/arch/arm/mm/copypage-feroceon.c
new file mode 100644
index 000000000000..c3ba6a94da0c
--- /dev/null
+++ b/arch/arm/mm/copypage-feroceon.c
@@ -0,0 +1,111 @@
+/*
+ *  linux/arch/arm/mm/copypage-feroceon.S
+ *
+ *  Copyright (C) 2008 Marvell Semiconductors
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This handles copy_user_highpage and clear_user_page on Feroceon
+ * more optimally than the generic implementations.
+ */
+#include <linux/init.h>
+#include <linux/highmem.h>
+
+static void __attribute__((naked))
+feroceon_copy_user_page(void *kto, const void *kfrom)
+{
+        asm("\
+        stmfd   sp!, {r4-r9, lr}                \n\
+        mov     ip, %0                          \n\
+1:      mov     lr, r1                          \n\
+        ldmia   r1!, {r2 - r9}                  \n\
+        pld     [lr, #32]                       \n\
+        pld     [lr, #64]                       \n\
+        pld     [lr, #96]                       \n\
+        pld     [lr, #128]                      \n\
+        pld     [lr, #160]                      \n\
+        pld     [lr, #192]                      \n\
+        pld     [lr, #224]                      \n\
+        stmia   r0, {r2 - r9}                   \n\
+        ldmia   r1!, {r2 - r9}                  \n\
+        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line\n\
+        add     r0, r0, #32                     \n\
+        stmia   r0, {r2 - r9}                   \n\
+        ldmia   r1!, {r2 - r9}                  \n\
+        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line\n\
+        add     r0, r0, #32                     \n\
+        stmia   r0, {r2 - r9}                   \n\
+        ldmia   r1!, {r2 - r9}                  \n\
+        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line\n\
+        add     r0, r0, #32                     \n\
+        stmia   r0, {r2 - r9}                   \n\
+        ldmia   r1!, {r2 - r9}                  \n\
+        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line\n\
+        add     r0, r0, #32                     \n\
+        stmia   r0, {r2 - r9}                   \n\
+        ldmia   r1!, {r2 - r9}                  \n\
+        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line\n\
+        add     r0, r0, #32                     \n\
+        stmia   r0, {r2 - r9}                   \n\
+        ldmia   r1!, {r2 - r9}                  \n\
+        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line\n\
+        add     r0, r0, #32                     \n\
+        stmia   r0, {r2 - r9}                   \n\
+        ldmia   r1!, {r2 - r9}                  \n\
+        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line\n\
+        add     r0, r0, #32                     \n\
+        stmia   r0, {r2 - r9}                   \n\
+        subs    ip, ip, #(32 * 8)               \n\
+        mcr     p15, 0, r0, c7, c14, 1          @ clean and invalidate D line\n\
+        add     r0, r0, #32                     \n\
+        bne     1b                              \n\
+        mcr     p15, 0, ip, c7, c10, 4          @ drain WB\n\
+        ldmfd   sp!, {r4-r9, pc}"
+        :
+        : "I" (PAGE_SIZE));
+}
+
+void feroceon_copy_user_highpage(struct page *to, struct page *from,
+        unsigned long vaddr)
+{
+        void *kto, *kfrom;
+
+        kto = kmap_atomic(to, KM_USER0);
+        kfrom = kmap_atomic(from, KM_USER1);
+        feroceon_copy_user_page(kto, kfrom);
+        kunmap_atomic(kfrom, KM_USER1);
+        kunmap_atomic(kto, KM_USER0);
+}
+
+void feroceon_clear_user_highpage(struct page *page, unsigned long vaddr)
+{
+        void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
+        asm volatile ("\
+        mov     r1, %2                          \n\
+        mov     r2, #0                          \n\
+        mov     r3, #0                          \n\
+        mov     r4, #0                          \n\
+        mov     r5, #0                          \n\
+        mov     r6, #0                          \n\
+        mov     r7, #0                          \n\
+        mov     ip, #0                          \n\
+        mov     lr, #0                          \n\
+1:      stmia   %0, {r2-r7, ip, lr}             \n\
+        subs    r1, r1, #1                      \n\
+        mcr     p15, 0, %0, c7, c14, 1          @ clean and invalidate D line\n\
+        add     %0, %0, #32                     \n\
+        bne     1b                              \n\
+        mcr     p15, 0, r1, c7, c10, 4          @ drain WB"
+        : "=r" (ptr)
+        : "0" (kaddr), "I" (PAGE_SIZE / 32)
+        : "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ip", "lr");
+        kunmap_atomic(kaddr, KM_USER0);
+}
+
+struct cpu_user_fns feroceon_user_fns __initdata = {
+        .cpu_clear_user_highpage = feroceon_clear_user_highpage,
+        .cpu_copy_user_highpage = feroceon_copy_user_highpage,
+};
+
diff --git a/arch/arm/mm/copypage-v3.S b/arch/arm/mm/copypage-v3.S
deleted file mode 100644
index 2ee394b11bcb..000000000000
--- a/arch/arm/mm/copypage-v3.S
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- *  linux/arch/arm/lib/copypage.S
- *
- *  Copyright (C) 1995-1999 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- *  ASM optimised string functions
- */
-#include <linux/linkage.h>
-#include <linux/init.h>
-#include <asm/assembler.h>
-#include <asm/asm-offsets.h>
-
-                .text
-                .align  5
-/*
- * ARMv3 optimised copy_user_page
- *
- * FIXME: do we need to handle cache stuff...
- */
-ENTRY(v3_copy_user_page)
-        stmfd   sp!, {r4, lr}                   @       2
-        mov     r2, #PAGE_SZ/64                 @       1
-        ldmia   r1!, {r3, r4, ip, lr}           @       4+1
-1:      stmia   r0!, {r3, r4, ip, lr}           @       4
-        ldmia   r1!, {r3, r4, ip, lr}           @       4+1
-        stmia   r0!, {r3, r4, ip, lr}           @       4
-        ldmia   r1!, {r3, r4, ip, lr}           @       4+1
-        stmia   r0!, {r3, r4, ip, lr}           @       4
-        ldmia   r1!, {r3, r4, ip, lr}           @       4
-        subs    r2, r2, #1                      @       1
-        stmia   r0!, {r3, r4, ip, lr}           @       4
-        ldmneia r1!, {r3, r4, ip, lr}           @       4
-        bne     1b                              @       1
-        ldmfd   sp!, {r4, pc}                   @       3
-
-        .align  5
-/*
- * ARMv3 optimised clear_user_page
- *
- * FIXME: do we need to handle cache stuff...
- */
-ENTRY(v3_clear_user_page)
-        str     lr, [sp, #-4]!
-        mov     r1, #PAGE_SZ/64                 @ 1
-        mov     r2, #0                          @ 1
-        mov     r3, #0                          @ 1
-        mov     ip, #0                          @ 1
-        mov     lr, #0                          @ 1
-1:      stmia   r0!, {r2, r3, ip, lr}           @ 4
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        subs    r1, r1, #1                      @ 1
-        bne     1b                              @ 1
-        ldr     pc, [sp], #4
-
-        __INITDATA
-
-        .type   v3_user_fns, #object
-ENTRY(v3_user_fns)
-        .long   v3_clear_user_page
-        .long   v3_copy_user_page
-        .size   v3_user_fns, . - v3_user_fns
diff --git a/arch/arm/mm/copypage-v3.c b/arch/arm/mm/copypage-v3.c
new file mode 100644
index 000000000000..70ed96c8af8e
--- /dev/null
+++ b/arch/arm/mm/copypage-v3.c
@@ -0,0 +1,81 @@
+/*
+ *  linux/arch/arm/mm/copypage-v3.c
+ *
+ *  Copyright (C) 1995-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/init.h>
+#include <linux/highmem.h>
+
+/*
+ * ARMv3 optimised copy_user_highpage
+ *
+ * FIXME: do we need to handle cache stuff...
+ */
+static void __attribute__((naked))
+v3_copy_user_page(void *kto, const void *kfrom)
+{
+        asm("\n\
+        stmfd   sp!, {r4, lr}                   @       2\n\
+        mov     r2, %2                          @       1\n\
+        ldmia   %0!, {r3, r4, ip, lr}           @       4+1\n\
+1:      stmia   %1!, {r3, r4, ip, lr}           @       4\n\
+        ldmia   %0!, {r3, r4, ip, lr}           @       4+1\n\
+        stmia   %1!, {r3, r4, ip, lr}           @       4\n\
+        ldmia   %0!, {r3, r4, ip, lr}           @       4+1\n\
+        stmia   %1!, {r3, r4, ip, lr}           @       4\n\
+        ldmia   %0!, {r3, r4, ip, lr}           @       4\n\
+        subs    r2, r2, #1                      @       1\n\
+        stmia   %1!, {r3, r4, ip, lr}           @       4\n\
+        ldmneia %0!, {r3, r4, ip, lr}           @       4\n\
+        bne     1b                              @       1\n\
+        ldmfd   sp!, {r4, pc}                   @       3"
+        :
+        : "r" (kfrom), "r" (kto), "I" (PAGE_SIZE / 64));
+}
+
+void v3_copy_user_highpage(struct page *to, struct page *from,
+        unsigned long vaddr)
+{
+        void *kto, *kfrom;
+
+        kto = kmap_atomic(to, KM_USER0);
+        kfrom = kmap_atomic(from, KM_USER1);
+        v3_copy_user_page(kto, kfrom);
+        kunmap_atomic(kfrom, KM_USER1);
+        kunmap_atomic(kto, KM_USER0);
+}
+
+/*
+ * ARMv3 optimised clear_user_page
+ *
+ * FIXME: do we need to handle cache stuff...
+ */
+void v3_clear_user_highpage(struct page *page, unsigned long vaddr)
+{
+        void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
+        asm volatile("\n\
+        mov     r1, %2                          @ 1\n\
+        mov     r2, #0                          @ 1\n\
+        mov     r3, #0                          @ 1\n\
+        mov     ip, #0                          @ 1\n\
+        mov     lr, #0                          @ 1\n\
+1:      stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        subs    r1, r1, #1                      @ 1\n\
+        bne     1b                              @ 1"
+        : "=r" (ptr)
+        : "0" (kaddr), "I" (PAGE_SIZE / 64)
+        : "r1", "r2", "r3", "ip", "lr");
+        kunmap_atomic(kaddr, KM_USER0);
+}
+
+struct cpu_user_fns v3_user_fns __initdata = {
+        .cpu_clear_user_highpage = v3_clear_user_highpage,
+        .cpu_copy_user_highpage = v3_copy_user_highpage,
+};
diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c
index 8d33e2549344..bdb5fd983b15 100644
--- a/arch/arm/mm/copypage-v4mc.c
+++ b/arch/arm/mm/copypage-v4mc.c
@@ -15,8 +15,8 @@
  */
 #include <linux/init.h>
 #include <linux/mm.h>
+#include <linux/highmem.h>
 
-#include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/tlbflush.h>
 #include <asm/cacheflush.h>
@@ -33,7 +33,7 @@
 static DEFINE_SPINLOCK(minicache_lock);
 
 /*
- * ARMv4 mini-dcache optimised copy_user_page
+ * ARMv4 mini-dcache optimised copy_user_highpage
  *
  * We flush the destination cache lines just before we write the data into the
  * corresponding address.  Since the Dcache is read-allocate, this removes the
@@ -42,7 +42,7 @@ static DEFINE_SPINLOCK(minicache_lock);
  *
  * Note: We rely on all ARMv4 processors implementing the "invalidate D line"
  * instruction.  If your processor does not supply this, you have to write your
- * own copy_user_page that does the right thing.
+ * own copy_user_highpage that does the right thing.
  */
 static void __attribute__((naked))
 mc_copy_user_page(void *from, void *to)
@@ -68,50 +68,53 @@ mc_copy_user_page(void *from, void *to)
         : "r" (from), "r" (to), "I" (PAGE_SIZE / 64));
 }
 
-void v4_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
+void v4_mc_copy_user_highpage(struct page *from, struct page *to,
+        unsigned long vaddr)
 {
-        struct page *page = virt_to_page(kfrom);
+        void *kto = kmap_atomic(to, KM_USER1);
 
-        if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
-                __flush_dcache_page(page_mapping(page), page);
+        if (test_and_clear_bit(PG_dcache_dirty, &from->flags))
+                __flush_dcache_page(page_mapping(from), from);
 
         spin_lock(&minicache_lock);
 
-        set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0);
+        set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
         flush_tlb_kernel_page(0xffff8000);
 
         mc_copy_user_page((void *)0xffff8000, kto);
 
         spin_unlock(&minicache_lock);
+
+        kunmap_atomic(kto, KM_USER1);
 }
 
 /*
  * ARMv4 optimised clear_user_page
  */
-void __attribute__((naked))
-v4_mc_clear_user_page(void *kaddr, unsigned long vaddr)
+void v4_mc_clear_user_highpage(struct page *page, unsigned long vaddr)
 {
-        asm volatile(
-        "str    lr, [sp, #-4]!\n\
-        mov     r1, %0                          @ 1\n\
+        void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
+        asm volatile("\
+        mov     r1, %2                          @ 1\n\
         mov     r2, #0                          @ 1\n\
         mov     r3, #0                          @ 1\n\
         mov     ip, #0                          @ 1\n\
         mov     lr, #0                          @ 1\n\
-1:      mcr     p15, 0, r0, c7, c6, 1           @ 1   invalidate D line\n\
-        stmia   r0!, {r2, r3, ip, lr}           @ 4\n\
-        stmia   r0!, {r2, r3, ip, lr}           @ 4\n\
-        mcr     p15, 0, r0, c7, c6, 1           @ 1   invalidate D line\n\
-        stmia   r0!, {r2, r3, ip, lr}           @ 4\n\
-        stmia   r0!, {r2, r3, ip, lr}           @ 4\n\
+1:      mcr     p15, 0, %0, c7, c6, 1           @ 1   invalidate D line\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        mcr     p15, 0, %0, c7, c6, 1           @ 1   invalidate D line\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
         subs    r1, r1, #1                      @ 1\n\
-        bne     1b                              @ 1\n\
-        ldr     pc, [sp], #4"
-        :
-        : "I" (PAGE_SIZE / 64));
+        bne     1b                              @ 1"
+        : "=r" (ptr)
+        : "0" (kaddr), "I" (PAGE_SIZE / 64)
+        : "r1", "r2", "r3", "ip", "lr");
+        kunmap_atomic(kaddr, KM_USER0);
 }
 
 struct cpu_user_fns v4_mc_user_fns __initdata = {
-        .cpu_clear_user_page    = v4_mc_clear_user_page, 
-        .cpu_copy_user_page     = v4_mc_copy_user_page,
+        .cpu_clear_user_highpage = v4_mc_clear_user_highpage,
+        .cpu_copy_user_highpage = v4_mc_copy_user_highpage,
 };
diff --git a/arch/arm/mm/copypage-v4wb.S b/arch/arm/mm/copypage-v4wb.S
deleted file mode 100644
index 83117354b1cd..000000000000
--- a/arch/arm/mm/copypage-v4wb.S
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- *  linux/arch/arm/lib/copypage.S
- *
- *  Copyright (C) 1995-1999 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- *  ASM optimised string functions
- */
-#include <linux/linkage.h>
-#include <linux/init.h>
-#include <asm/asm-offsets.h>
-
-        .text
-        .align  5
-/*
- * ARMv4 optimised copy_user_page
- *
- * We flush the destination cache lines just before we write the data into the
- * corresponding address.  Since the Dcache is read-allocate, this removes the
- * Dcache aliasing issue.  The writes will be forwarded to the write buffer,
- * and merged as appropriate.
- *
- * Note: We rely on all ARMv4 processors implementing the "invalidate D line"
- * instruction.  If your processor does not supply this, you have to write your
- * own copy_user_page that does the right thing.
- */
-ENTRY(v4wb_copy_user_page)
-        stmfd   sp!, {r4, lr}                   @ 2
-        mov     r2, #PAGE_SZ/64                 @ 1
-        ldmia   r1!, {r3, r4, ip, lr}           @ 4
-1:      mcr     p15, 0, r0, c7, c6, 1           @ 1   invalidate D line
-        stmia   r0!, {r3, r4, ip, lr}           @ 4
-        ldmia   r1!, {r3, r4, ip, lr}           @ 4+1
-        stmia   r0!, {r3, r4, ip, lr}           @ 4
-        ldmia   r1!, {r3, r4, ip, lr}           @ 4
-        mcr     p15, 0, r0, c7, c6, 1           @ 1   invalidate D line
-        stmia   r0!, {r3, r4, ip, lr}           @ 4
-        ldmia   r1!, {r3, r4, ip, lr}           @ 4
-        subs    r2, r2, #1                      @ 1
-        stmia   r0!, {r3, r4, ip, lr}           @ 4
-        ldmneia r1!, {r3, r4, ip, lr}           @ 4
-        bne     1b                              @ 1
-        mcr     p15, 0, r1, c7, c10, 4          @ 1   drain WB
-        ldmfd    sp!, {r4, pc}                  @ 3
-
-        .align  5
-/*
- * ARMv4 optimised clear_user_page
- *
- * Same story as above.
- */
-ENTRY(v4wb_clear_user_page)
-        str     lr, [sp, #-4]!
-        mov     r1, #PAGE_SZ/64                 @ 1
-        mov     r2, #0                          @ 1
-        mov     r3, #0                          @ 1
-        mov     ip, #0                          @ 1
-        mov     lr, #0                          @ 1
-1:      mcr     p15, 0, r0, c7, c6, 1           @ 1   invalidate D line
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        mcr     p15, 0, r0, c7, c6, 1           @ 1   invalidate D line
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        subs    r1, r1, #1                      @ 1
-        bne     1b                              @ 1
-        mcr     p15, 0, r1, c7, c10, 4          @ 1   drain WB
-        ldr     pc, [sp], #4
-
-        __INITDATA
-
-        .type   v4wb_user_fns, #object
-ENTRY(v4wb_user_fns)
-        .long   v4wb_clear_user_page
-        .long   v4wb_copy_user_page
-        .size   v4wb_user_fns, . - v4wb_user_fns
diff --git a/arch/arm/mm/copypage-v4wb.c b/arch/arm/mm/copypage-v4wb.c
new file mode 100644
index 000000000000..3ec93dab7656
--- /dev/null
+++ b/arch/arm/mm/copypage-v4wb.c
@@ -0,0 +1,94 @@
+/*
+ *  linux/arch/arm/mm/copypage-v4wb.c
+ *
+ *  Copyright (C) 1995-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/init.h>
+#include <linux/highmem.h>
+
+/*
+ * ARMv4 optimised copy_user_highpage
+ *
+ * We flush the destination cache lines just before we write the data into the
+ * corresponding address.  Since the Dcache is read-allocate, this removes the
+ * Dcache aliasing issue.  The writes will be forwarded to the write buffer,
+ * and merged as appropriate.
+ *
+ * Note: We rely on all ARMv4 processors implementing the "invalidate D line"
+ * instruction.  If your processor does not supply this, you have to write your
+ * own copy_user_highpage that does the right thing.
+ */
+static void __attribute__((naked))
+v4wb_copy_user_page(void *kto, const void *kfrom)
+{
+        asm("\
+        stmfd   sp!, {r4, lr}                   @ 2\n\
+        mov     r2, %0                          @ 1\n\
+        ldmia   r1!, {r3, r4, ip, lr}           @ 4\n\
+1:      mcr     p15, 0, r0, c7, c6, 1           @ 1   invalidate D line\n\
+        stmia   r0!, {r3, r4, ip, lr}           @ 4\n\
+        ldmia   r1!, {r3, r4, ip, lr}           @ 4+1\n\
+        stmia   r0!, {r3, r4, ip, lr}           @ 4\n\
+        ldmia   r1!, {r3, r4, ip, lr}           @ 4\n\
+        mcr     p15, 0, r0, c7, c6, 1           @ 1   invalidate D line\n\
+        stmia   r0!, {r3, r4, ip, lr}           @ 4\n\
+        ldmia   r1!, {r3, r4, ip, lr}           @ 4\n\
+        subs    r2, r2, #1                      @ 1\n\
+        stmia   r0!, {r3, r4, ip, lr}           @ 4\n\
+        ldmneia r1!, {r3, r4, ip, lr}           @ 4\n\
+        bne     1b                              @ 1\n\
+        mcr     p15, 0, r1, c7, c10, 4          @ 1   drain WB\n\
+        ldmfd    sp!, {r4, pc}                  @ 3"
+        :
+        : "I" (PAGE_SIZE / 64));
+}
+
+void v4wb_copy_user_highpage(struct page *to, struct page *from,
+        unsigned long vaddr)
+{
+        void *kto, *kfrom;
+
+        kto = kmap_atomic(to, KM_USER0);
+        kfrom = kmap_atomic(from, KM_USER1);
+        v4wb_copy_user_page(kto, kfrom);
+        kunmap_atomic(kfrom, KM_USER1);
+        kunmap_atomic(kto, KM_USER0);
+}
+
+/*
+ * ARMv4 optimised clear_user_page
+ *
+ * Same story as above.
+ */
+void v4wb_clear_user_highpage(struct page *page, unsigned long vaddr)
+{
+        void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
+        asm volatile("\
+        mov     r1, %2                          @ 1\n\
+        mov     r2, #0                          @ 1\n\
+        mov     r3, #0                          @ 1\n\
+        mov     ip, #0                          @ 1\n\
+        mov     lr, #0                          @ 1\n\
+1:      mcr     p15, 0, %0, c7, c6, 1           @ 1   invalidate D line\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        mcr     p15, 0, %0, c7, c6, 1           @ 1   invalidate D line\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        subs    r1, r1, #1                      @ 1\n\
+        bne     1b                              @ 1\n\
+        mcr     p15, 0, r1, c7, c10, 4          @ 1   drain WB"
+        : "=r" (ptr)
+        : "0" (kaddr), "I" (PAGE_SIZE / 64)
+        : "r1", "r2", "r3", "ip", "lr");
+        kunmap_atomic(kaddr, KM_USER0);
+}
+
+struct cpu_user_fns v4wb_user_fns __initdata = {
+        .cpu_clear_user_highpage = v4wb_clear_user_highpage,
+        .cpu_copy_user_highpage = v4wb_copy_user_highpage,
+};
diff --git a/arch/arm/mm/copypage-v4wt.S b/arch/arm/mm/copypage-v4wt.S
deleted file mode 100644
index e1f2af28d549..000000000000
--- a/arch/arm/mm/copypage-v4wt.S
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- *  linux/arch/arm/lib/copypage-v4.S
- *
- *  Copyright (C) 1995-1999 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- *  ASM optimised string functions
- *
- *  This is for CPUs with a writethrough cache and 'flush ID cache' is
- *  the only supported cache operation.
- */
-#include <linux/linkage.h>
-#include <linux/init.h>
-#include <asm/asm-offsets.h>
-
-        .text
-        .align  5
-/*
- * ARMv4 optimised copy_user_page
- *
- * Since we have writethrough caches, we don't have to worry about
- * dirty data in the cache.  However, we do have to ensure that
- * subsequent reads are up to date.
- */
-ENTRY(v4wt_copy_user_page)
-        stmfd   sp!, {r4, lr}                   @ 2
-        mov     r2, #PAGE_SZ/64                 @ 1
-        ldmia   r1!, {r3, r4, ip, lr}           @ 4
-1:      stmia   r0!, {r3, r4, ip, lr}           @ 4
-        ldmia   r1!, {r3, r4, ip, lr}           @ 4+1
-        stmia   r0!, {r3, r4, ip, lr}           @ 4
-        ldmia   r1!, {r3, r4, ip, lr}           @ 4
-        stmia   r0!, {r3, r4, ip, lr}           @ 4
-        ldmia   r1!, {r3, r4, ip, lr}           @ 4
-        subs    r2, r2, #1                      @ 1
-        stmia   r0!, {r3, r4, ip, lr}           @ 4
-        ldmneia r1!, {r3, r4, ip, lr}           @ 4
-        bne     1b                              @ 1
-        mcr     p15, 0, r2, c7, c7, 0           @ flush ID cache
-        ldmfd   sp!, {r4, pc}                   @ 3
-
-        .align  5
-/*
- * ARMv4 optimised clear_user_page
- *
- * Same story as above.
- */
-ENTRY(v4wt_clear_user_page)
-        str     lr, [sp, #-4]!
-        mov     r1, #PAGE_SZ/64                 @ 1
-        mov     r2, #0                          @ 1
-        mov     r3, #0                          @ 1
-        mov     ip, #0                          @ 1
-        mov     lr, #0                          @ 1
-1:      stmia   r0!, {r2, r3, ip, lr}           @ 4
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        stmia   r0!, {r2, r3, ip, lr}           @ 4
-        subs    r1, r1, #1                      @ 1
-        bne     1b                              @ 1
-        mcr     p15, 0, r2, c7, c7, 0           @ flush ID cache
-        ldr     pc, [sp], #4
-
-        __INITDATA
-
-        .type   v4wt_user_fns, #object
-ENTRY(v4wt_user_fns)
-        .long   v4wt_clear_user_page
-        .long   v4wt_copy_user_page
-        .size   v4wt_user_fns, . - v4wt_user_fns
diff --git a/arch/arm/mm/copypage-v4wt.c b/arch/arm/mm/copypage-v4wt.c
new file mode 100644
index 000000000000..0f1188efae45
--- /dev/null
+++ b/arch/arm/mm/copypage-v4wt.c
@@ -0,0 +1,88 @@
+/*
+ *  linux/arch/arm/mm/copypage-v4wt.S
+ *
+ *  Copyright (C) 1995-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  This is for CPUs with a writethrough cache and 'flush ID cache' is
+ *  the only supported cache operation.
+ */
+#include <linux/init.h>
+#include <linux/highmem.h>
+
+/*
+ * ARMv4 optimised copy_user_highpage
+ *
+ * Since we have writethrough caches, we don't have to worry about
+ * dirty data in the cache.  However, we do have to ensure that
+ * subsequent reads are up to date.
+ */
+static void __attribute__((naked))
+v4wt_copy_user_page(void *kto, const void *kfrom)
+{
+        asm("\
+        stmfd   sp!, {r4, lr}                   @ 2\n\
+        mov     r2, %0                          @ 1\n\
+        ldmia   r1!, {r3, r4, ip, lr}           @ 4\n\
+1:      stmia   r0!, {r3, r4, ip, lr}           @ 4\n\
+        ldmia   r1!, {r3, r4, ip, lr}           @ 4+1\n\
+        stmia   r0!, {r3, r4, ip, lr}           @ 4\n\
+        ldmia   r1!, {r3, r4, ip, lr}           @ 4\n\
+        stmia   r0!, {r3, r4, ip, lr}           @ 4\n\
+        ldmia   r1!, {r3, r4, ip, lr}           @ 4\n\
+        subs    r2, r2, #1                      @ 1\n\
+        stmia   r0!, {r3, r4, ip, lr}           @ 4\n\
+        ldmneia r1!, {r3, r4, ip, lr}           @ 4\n\
+        bne     1b                              @ 1\n\
+        mcr     p15, 0, r2, c7, c7, 0           @ flush ID cache\n\
+        ldmfd   sp!, {r4, pc}                   @ 3"
+        :
+        : "I" (PAGE_SIZE / 64));
+}
+
+void v4wt_copy_user_highpage(struct page *to, struct page *from,
+        unsigned long vaddr)
+{
+        void *kto, *kfrom;
+
+        kto = kmap_atomic(to, KM_USER0);
+        kfrom = kmap_atomic(from, KM_USER1);
+        v4wt_copy_user_page(kto, kfrom);
+        kunmap_atomic(kfrom, KM_USER1);
+        kunmap_atomic(kto, KM_USER0);
+}
+
+/*
+ * ARMv4 optimised clear_user_page
+ *
+ * Same story as above.
+ */
+void v4wt_clear_user_highpage(struct page *page, unsigned long vaddr)
+{
+        void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
+        asm volatile("\
+        mov     r1, %2                          @ 1\n\
+        mov     r2, #0                          @ 1\n\
+        mov     r3, #0                          @ 1\n\
+        mov     ip, #0                          @ 1\n\
+        mov     lr, #0                          @ 1\n\
+1:      stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        stmia   %0!, {r2, r3, ip, lr}           @ 4\n\
+        subs    r1, r1, #1                      @ 1\n\
+        bne     1b                              @ 1\n\
+        mcr     p15, 0, r2, c7, c7, 0           @ flush ID cache"
+        : "=r" (ptr)
+        : "0" (kaddr), "I" (PAGE_SIZE / 64)
+        : "r1", "r2", "r3", "ip", "lr");
+        kunmap_atomic(kaddr, KM_USER0);
+}
+
+struct cpu_user_fns v4wt_user_fns __initdata = {
+        .cpu_clear_user_highpage = v4wt_clear_user_highpage,
+        .cpu_copy_user_highpage = v4wt_copy_user_highpage,
+};
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c
index 0e21c0767580..4127a7bddfe5 100644
--- a/arch/arm/mm/copypage-v6.c
+++ b/arch/arm/mm/copypage-v6.c
@@ -10,8 +10,8 @@
 #include <linux/init.h>
 #include <linux/spinlock.h>
 #include <linux/mm.h>
+#include <linux/highmem.h>
 
-#include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/shmparam.h>
 #include <asm/tlbflush.h>
@@ -33,41 +33,56 @@ static DEFINE_SPINLOCK(v6_lock);
  * Copy the user page.  No aliasing to deal with so we can just
  * attack the kernel's existing mapping of these pages.
  */
-static void v6_copy_user_page_nonaliasing(void *kto, const void *kfrom, unsigned long vaddr)
+static void v6_copy_user_highpage_nonaliasing(struct page *to,
+        struct page *from, unsigned long vaddr)
 {
+        void *kto, *kfrom;
+
+        kfrom = kmap_atomic(from, KM_USER0);
+        kto = kmap_atomic(to, KM_USER1);
         copy_page(kto, kfrom);
+        kunmap_atomic(kto, KM_USER1);
+        kunmap_atomic(kfrom, KM_USER0);
 }
 
 /*
  * Clear the user page.  No aliasing to deal with so we can just
  * attack the kernel's existing mapping of this page.
  */
-static void v6_clear_user_page_nonaliasing(void *kaddr, unsigned long vaddr)
+static void v6_clear_user_highpage_nonaliasing(struct page *page, unsigned long vaddr)
 {
+        void *kaddr = kmap_atomic(page, KM_USER0);
         clear_page(kaddr);
+        kunmap_atomic(kaddr, KM_USER0);
 }
 
 /*
- * Copy the page, taking account of the cache colour.
+ * Discard data in the kernel mapping for the new page.
+ * FIXME: needs this MCRR to be supported.
  */
-static void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned long vaddr)
+static void discard_old_kernel_data(void *kto)
 {
-        unsigned int offset = CACHE_COLOUR(vaddr);
-        unsigned long from, to;
-        struct page *page = virt_to_page(kfrom);
-
-        if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
-                __flush_dcache_page(page_mapping(page), page);
-
-        /*
-         * Discard data in the kernel mapping for the new page.
-         * FIXME: needs this MCRR to be supported.
-         */
         __asm__("mcrr   p15, 0, %1, %0, c6      @ 0xec401f06"
            :
            : "r" (kto),
              "r" ((unsigned long)kto + PAGE_SIZE - L1_CACHE_BYTES)
            : "cc");
+}
+
+/*
+ * Copy the page, taking account of the cache colour.
+ */
+static void v6_copy_user_highpage_aliasing(struct page *to,
+        struct page *from, unsigned long vaddr)
+{
+        unsigned int offset = CACHE_COLOUR(vaddr);
+        unsigned long kfrom, kto;
+
+        if (test_and_clear_bit(PG_dcache_dirty, &from->flags))
+                __flush_dcache_page(page_mapping(from), from);
+
+        /* FIXME: not highmem safe */
+        discard_old_kernel_data(page_address(to));
 
         /*
          * Now copy the page using the same cache colour as the
@@ -75,16 +90,16 @@ static void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned lo
          */
         spin_lock(&v6_lock);
 
-        set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(__pa(kfrom) >> PAGE_SHIFT, PAGE_KERNEL), 0);
-        set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(__pa(kto) >> PAGE_SHIFT, PAGE_KERNEL), 0);
+        set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(page_to_pfn(from), PAGE_KERNEL), 0);
+        set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(to), PAGE_KERNEL), 0);
 
-        from = from_address + (offset << PAGE_SHIFT);
-        to   = to_address + (offset << PAGE_SHIFT);
+        kfrom = from_address + (offset << PAGE_SHIFT);
+        kto   = to_address + (offset << PAGE_SHIFT);
 
-        flush_tlb_kernel_page(from);
-        flush_tlb_kernel_page(to);
+        flush_tlb_kernel_page(kfrom);
+        flush_tlb_kernel_page(kto);
 
-        copy_page((void *)to, (void *)from);
+        copy_page((void *)kto, (void *)kfrom);
 
         spin_unlock(&v6_lock);
 }
@@ -94,20 +109,13 @@ static void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned lo
  * so remap the kernel page into the same cache colour as the user
  * page.
  */
-static void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr)
+static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vaddr)
 {
         unsigned int offset = CACHE_COLOUR(vaddr);
         unsigned long to = to_address + (offset << PAGE_SHIFT);
 
-        /*
-         * Discard data in the kernel mapping for the new page
-         * FIXME: needs this MCRR to be supported.
-         */
-        __asm__("mcrr   p15, 0, %1, %0, c6      @ 0xec401f06"
-           :
-           : "r" (kaddr),
-             "r" ((unsigned long)kaddr + PAGE_SIZE - L1_CACHE_BYTES)
-           : "cc");
+        /* FIXME: not highmem safe */
+        discard_old_kernel_data(page_address(page));
 
         /*
          * Now clear the page using the same cache colour as
@@ -115,7 +123,7 @@ static void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr)
          */
         spin_lock(&v6_lock);
 
-        set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(__pa(kaddr) >> PAGE_SHIFT, PAGE_KERNEL), 0);
+        set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(page), PAGE_KERNEL), 0);
         flush_tlb_kernel_page(to);
         clear_page((void *)to);
 
@@ -123,15 +131,15 @@ static void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr)
 }
 
 struct cpu_user_fns v6_user_fns __initdata = {
-        .cpu_clear_user_page    = v6_clear_user_page_nonaliasing,
-        .cpu_copy_user_page     = v6_copy_user_page_nonaliasing,
+        .cpu_clear_user_highpage = v6_clear_user_highpage_nonaliasing,
+        .cpu_copy_user_highpage = v6_copy_user_highpage_nonaliasing,
 };
 
 static int __init v6_userpage_init(void)
 {
         if (cache_is_vipt_aliasing()) {
-                cpu_user.cpu_clear_user_page = v6_clear_user_page_aliasing;
-                cpu_user.cpu_copy_user_page = v6_copy_user_page_aliasing;
+                cpu_user.cpu_clear_user_highpage = v6_clear_user_highpage_aliasing;
+                cpu_user.cpu_copy_user_highpage = v6_copy_user_highpage_aliasing;
         }
 
         return 0;
diff --git a/arch/arm/mm/copypage-xsc3.S b/arch/arm/mm/copypage-xsc3.S
deleted file mode 100644
index 9a2cb4332b4c..000000000000
--- a/arch/arm/mm/copypage-xsc3.S
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- *  linux/arch/arm/lib/copypage-xsc3.S
- *
- *  Copyright (C) 2004 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Adapted for 3rd gen XScale core, no more mini-dcache
- * Author: Matt Gilbert (matthew.m.gilbert@intel.com)
- */
-
-#include <linux/linkage.h>
-#include <linux/init.h>
-#include <asm/asm-offsets.h>
-
-/*
- * General note:
- *  We don't really want write-allocate cache behaviour for these functions
- *  since that will just eat through 8K of the cache.
- */
-
-        .text
-        .align  5
-/*
- * XSC3 optimised copy_user_page
- *  r0 = destination
- *  r1 = source
- *  r2 = virtual user address of ultimate destination page
- *
- * The source page may have some clean entries in the cache already, but we
- * can safely ignore them - break_cow() will flush them out of the cache
- * if we eventually end up using our copied page.
- *
- */
-ENTRY(xsc3_mc_copy_user_page)
-        stmfd   sp!, {r4, r5, lr}
-        mov     lr, #PAGE_SZ/64-1
-
-        pld     [r1, #0]
-        pld     [r1, #32]
-1:      pld     [r1, #64]
-        pld     [r1, #96]
-
-2:      ldrd    r2, [r1], #8
-        mov     ip, r0
-        ldrd    r4, [r1], #8
-        mcr     p15, 0, ip, c7, c6, 1           @ invalidate
-        strd    r2, [r0], #8
-        ldrd    r2, [r1], #8
-        strd    r4, [r0], #8
-        ldrd    r4, [r1], #8
-        strd    r2, [r0], #8
-        strd    r4, [r0], #8
-        ldrd    r2, [r1], #8
-        mov     ip, r0
-        ldrd    r4, [r1], #8
-        mcr     p15, 0, ip, c7, c6, 1           @ invalidate
-        strd    r2, [r0], #8
-        ldrd    r2, [r1], #8
-        subs    lr, lr, #1
-        strd    r4, [r0], #8
-        ldrd    r4, [r1], #8
-        strd    r2, [r0], #8
-        strd    r4, [r0], #8
-        bgt     1b
-        beq     2b
-
-        ldmfd   sp!, {r4, r5, pc}
-
-        .align  5
-/*
- * XScale optimised clear_user_page
- *  r0 = destination
- *  r1 = virtual user address of ultimate destination page
- */
-ENTRY(xsc3_mc_clear_user_page)
-        mov     r1, #PAGE_SZ/32
-        mov     r2, #0
-        mov     r3, #0
-1:      mcr     p15, 0, r0, c7, c6, 1           @ invalidate line
-        strd    r2, [r0], #8
-        strd    r2, [r0], #8
-        strd    r2, [r0], #8
-        strd    r2, [r0], #8
-        subs    r1, r1, #1
-        bne     1b
-        mov     pc, lr
-
-        __INITDATA
-
-        .type   xsc3_mc_user_fns, #object
-ENTRY(xsc3_mc_user_fns)
-        .long   xsc3_mc_clear_user_page
-        .long   xsc3_mc_copy_user_page
-        .size   xsc3_mc_user_fns, . - xsc3_mc_user_fns
diff --git a/arch/arm/mm/copypage-xsc3.c b/arch/arm/mm/copypage-xsc3.c
new file mode 100644
index 000000000000..39a994542cad
--- /dev/null
+++ b/arch/arm/mm/copypage-xsc3.c
@@ -0,0 +1,113 @@
+/*
+ *  linux/arch/arm/mm/copypage-xsc3.S
+ *
+ *  Copyright (C) 2004 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Adapted for 3rd gen XScale core, no more mini-dcache
+ * Author: Matt Gilbert (matthew.m.gilbert@intel.com)
+ */
+#include <linux/init.h>
+#include <linux/highmem.h>
+
+/*
+ * General note:
+ *  We don't really want write-allocate cache behaviour for these functions
+ *  since that will just eat through 8K of the cache.
+ */
+
+/*
+ * XSC3 optimised copy_user_highpage
+ *  r0 = destination
+ *  r1 = source
+ *
+ * The source page may have some clean entries in the cache already, but we
+ * can safely ignore them - break_cow() will flush them out of the cache
+ * if we eventually end up using our copied page.
+ *
+ */
+static void __attribute__((naked))
+xsc3_mc_copy_user_page(void *kto, const void *kfrom)
+{
+        asm("\
+        stmfd   sp!, {r4, r5, lr}               \n\
+        mov     lr, %0                          \n\
+                                                \n\
+        pld     [r1, #0]                        \n\
+        pld     [r1, #32]                       \n\
+1:      pld     [r1, #64]                       \n\
+        pld     [r1, #96]                       \n\
+                                                \n\
+2:      ldrd    r2, [r1], #8                    \n\
+        mov     ip, r0                          \n\
+        ldrd    r4, [r1], #8                    \n\
+        mcr     p15, 0, ip, c7, c6, 1           @ invalidate\n\
+        strd    r2, [r0], #8                    \n\
+        ldrd    r2, [r1], #8                    \n\
+        strd    r4, [r0], #8                    \n\
+        ldrd    r4, [r1], #8                    \n\
+        strd    r2, [r0], #8                    \n\
+        strd    r4, [r0], #8                    \n\
+        ldrd    r2, [r1], #8                    \n\
+        mov     ip, r0                          \n\
+        ldrd    r4, [r1], #8                    \n\
+        mcr     p15, 0, ip, c7, c6, 1           @ invalidate\n\
+        strd    r2, [r0], #8                    \n\
+        ldrd    r2, [r1], #8                    \n\
+        subs    lr, lr, #1                      \n\
+        strd    r4, [r0], #8                    \n\
+        ldrd    r4, [r1], #8                    \n\
+        strd    r2, [r0], #8                    \n\
+        strd    r4, [r0], #8                    \n\
+        bgt     1b                              \n\
+        beq     2b                              \n\
+                                                \n\
+        ldmfd   sp!, {r4, r5, pc}"
+        :
+        : "I" (PAGE_SIZE / 64 - 1));
+}
+
+void xsc3_mc_copy_user_highpage(struct page *to, struct page *from,
+        unsigned long vaddr)
+{
+        void *kto, *kfrom;
+
+        kto = kmap_atomic(to, KM_USER0);
+        kfrom = kmap_atomic(from, KM_USER1);
+        xsc3_mc_copy_user_page(kto, kfrom);
+        kunmap_atomic(kfrom, KM_USER1);
+        kunmap_atomic(kto, KM_USER0);
+}
+
+/*
+ * XScale optimised clear_user_page
+ *  r0 = destination
+ *  r1 = virtual user address of ultimate destination page
+ */
+void xsc3_mc_clear_user_highpage(struct page *page, unsigned long vaddr)
+{
+        void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
+        asm volatile ("\
+        mov     r1, %2                          \n\
+        mov     r2, #0                          \n\
+        mov     r3, #0                          \n\
+1:      mcr     p15, 0, %0, c7, c6, 1           @ invalidate line\n\
+        strd    r2, [%0], #8                    \n\
+        strd    r2, [%0], #8                    \n\
+        strd    r2, [%0], #8                    \n\
+        strd    r2, [%0], #8                    \n\
+        subs    r1, r1, #1                      \n\
+        bne     1b"
+        : "=r" (ptr)
+        : "0" (kaddr), "I" (PAGE_SIZE / 32)
+        : "r1", "r2", "r3");
+        kunmap_atomic(kaddr, KM_USER0);
+}
+
+struct cpu_user_fns xsc3_mc_user_fns __initdata = {
+        .cpu_clear_user_highpage = xsc3_mc_clear_user_highpage,
+        .cpu_copy_user_highpage = xsc3_mc_copy_user_highpage,
+};
diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c
index bad49331bbf9..d18f2397ee2d 100644
--- a/arch/arm/mm/copypage-xscale.c
+++ b/arch/arm/mm/copypage-xscale.c
@@ -15,8 +15,8 @@
  */
 #include <linux/init.h>
 #include <linux/mm.h>
+#include <linux/highmem.h>
 
-#include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/tlbflush.h>
 #include <asm/cacheflush.h>
@@ -35,7 +35,7 @@
 static DEFINE_SPINLOCK(minicache_lock);
 
 /*
- * XScale mini-dcache optimised copy_user_page
+ * XScale mini-dcache optimised copy_user_highpage
  *
  * We flush the destination cache lines just before we write the data into the
  * corresponding address.  Since the Dcache is read-allocate, this removes the
@@ -90,48 +90,53 @@ mc_copy_user_page(void *from, void *to)
         : "r" (from), "r" (to), "I" (PAGE_SIZE / 64 - 1));
 }
 
-void xscale_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
+void xscale_mc_copy_user_highpage(struct page *to, struct page *from,
+        unsigned long vaddr)
 {
-        struct page *page = virt_to_page(kfrom);
+        void *kto = kmap_atomic(to, KM_USER1);
 
-        if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
-                __flush_dcache_page(page_mapping(page), page);
+        if (test_and_clear_bit(PG_dcache_dirty, &from->flags))
+                __flush_dcache_page(page_mapping(from), from);
 
         spin_lock(&minicache_lock);
 
-        set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0);
+        set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
         flush_tlb_kernel_page(COPYPAGE_MINICACHE);
 
         mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto);
 
         spin_unlock(&minicache_lock);
+
+        kunmap_atomic(kto, KM_USER1);
 }
 
 /*
  * XScale optimised clear_user_page
  */
-void __attribute__((naked))
-xscale_mc_clear_user_page(void *kaddr, unsigned long vaddr)
+void
+xscale_mc_clear_user_highpage(struct page *page, unsigned long vaddr)
 {
+        void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
         asm volatile(
-        "mov    r1, %0                          \n\
+        "mov    r1, %2                          \n\
         mov     r2, #0                          \n\
         mov     r3, #0                          \n\
-1:      mov     ip, r0                          \n\
-        strd    r2, [r0], #8                    \n\
-        strd    r2, [r0], #8                    \n\
-        strd    r2, [r0], #8                    \n\
-        strd    r2, [r0], #8                    \n\
+1:      mov     ip, %0                          \n\
+        strd    r2, [%0], #8                    \n\
+        strd    r2, [%0], #8                    \n\
+        strd    r2, [%0], #8                    \n\
+        strd    r2, [%0], #8                    \n\
         mcr     p15, 0, ip, c7, c10, 1          @ clean D line\n\
         subs    r1, r1, #1                      \n\
         mcr     p15, 0, ip, c7, c6, 1           @ invalidate D line\n\
-        bne     1b                              \n\
-        mov     pc, lr"
-        :
-        : "I" (PAGE_SIZE / 32));
+        bne     1b"
+        : "=r" (ptr)
+        : "0" (kaddr), "I" (PAGE_SIZE / 32)
+        : "r1", "r2", "r3", "ip");
+        kunmap_atomic(kaddr, KM_USER0);
 }
 
 struct cpu_user_fns xscale_mc_user_fns __initdata = {
-        .cpu_clear_user_page    = xscale_mc_clear_user_page, 
-        .cpu_copy_user_page     = xscale_mc_copy_user_page,
+        .cpu_clear_user_highpage = xscale_mc_clear_user_highpage,
+        .cpu_copy_user_highpage = xscale_mc_copy_user_highpage,
 };
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index 2df8d9facf57..ffd8b228a139 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -14,6 +14,7 @@
 #include <linux/init.h>
 #include <linux/kprobes.h>
 #include <linux/uaccess.h>
+#include <linux/page-flags.h>
 
 #include <asm/system.h>
 #include <asm/pgtable.h>
@@ -83,13 +84,14 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
                         break;
                 }
 
-#ifndef CONFIG_HIGHMEM
                 /* We must not map this if we have highmem enabled */
+                if (PageHighMem(pfn_to_page(pmd_val(*pmd) >> PAGE_SHIFT)))
+                        break;
+
                 pte = pte_offset_map(pmd, addr);
                 printk(", *pte=%08lx", pte_val(*pte));
                 printk(", *ppte=%08lx", pte_val(pte[-PTRS_PER_PTE]));
                 pte_unmap(pte);
-#endif
         } while(0);
 
         printk("\n");
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 82c4b4217989..34df4d9d03a6 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -17,6 +17,7 @@
 #include <linux/initrd.h>
 
 #include <asm/mach-types.h>
+#include <asm/sections.h>
 #include <asm/setup.h>
 #include <asm/sizes.h>
 #include <asm/tlb.h>
@@ -64,10 +65,11 @@ static int __init parse_tag_initrd2(const struct tag *tag)
 __tagtable(ATAG_INITRD2, parse_tag_initrd2);
 
 /*
- * This is used to pass memory configuration data from paging_init
- * to mem_init, and by show_mem() to skip holes in the memory map.
+ * This keeps memory configuration data used by a couple memory
+ * initialization functions, as well as show_mem() for the skipping
+ * of holes in the memory map.  It is populated by arm_add_memory().
  */
-static struct meminfo meminfo = { 0, };
+struct meminfo meminfo;
 
 void show_mem(void)
 {
@@ -128,7 +130,7 @@ find_bootmap_pfn(int node, struct meminfo *mi, unsigned int bootmap_pages)
 {
         unsigned int start_pfn, i, bootmap_pfn;
 
-        start_pfn   = PAGE_ALIGN(__pa(&_end)) >> PAGE_SHIFT;
+        start_pfn   = PAGE_ALIGN(__pa(_end)) >> PAGE_SHIFT;
         bootmap_pfn = 0;
 
         for_each_nodebank(i, mi, node) {
@@ -331,13 +333,12 @@ static void __init bootmem_free_node(int node, struct meminfo *mi)
         free_area_init_node(node, zone_size, start_pfn, zhole_size);
 }
 
-void __init bootmem_init(struct meminfo *mi)
+void __init bootmem_init(void)
 {
+        struct meminfo *mi = &meminfo;
         unsigned long memend_pfn = 0;
         int node, initrd_node;
 
-        memcpy(&meminfo, mi, sizeof(meminfo));
-
         /*
          * Locate which node contains the ramdisk image, if any.
          */
@@ -394,20 +395,22 @@ void __init bootmem_init(struct meminfo *mi)
         max_pfn = max_low_pfn = memend_pfn - PHYS_PFN_OFFSET;
 }
 
-static inline void free_area(unsigned long addr, unsigned long end, char *s)
+static inline int free_area(unsigned long pfn, unsigned long end, char *s)
 {
-        unsigned int size = (end - addr) >> 10;
+        unsigned int pages = 0, size = (end - pfn) << (PAGE_SHIFT - 10);
 
-        for (; addr < end; addr += PAGE_SIZE) {
-                struct page *page = virt_to_page(addr);
+        for (; pfn < end; pfn++) {
+                struct page *page = pfn_to_page(pfn);
                 ClearPageReserved(page);
                 init_page_count(page);
-                free_page(addr);
-                totalram_pages++;
+                __free_page(page);
+                pages++;
         }
 
         if (size && s)
                 printk(KERN_INFO "Freeing %s memory: %dK\n", s, size);
+
+        return pages;
 }
 
 static inline void
@@ -478,13 +481,9 @@ static void __init free_unused_memmap_node(int node, struct meminfo *mi)
  */
 void __init mem_init(void)
 {
-        unsigned int codepages, datapages, initpages;
+        unsigned int codesize, datasize, initsize;
         int i, node;
 
-        codepages = &_etext - &_text;
-        datapages = &_end - &__data_start;
-        initpages = &__init_end - &__init_begin;
-
 #ifndef CONFIG_DISCONTIGMEM
         max_mapnr   = virt_to_page(high_memory) - mem_map;
 #endif
@@ -501,7 +500,8 @@ void __init mem_init(void)
 
 #ifdef CONFIG_SA1111
         /* now that our DMA memory is actually so designated, we can free it */
-        free_area(PAGE_OFFSET, (unsigned long)swapper_pg_dir, NULL);
+        totalram_pages += free_area(PHYS_PFN_OFFSET,
+                                    __phys_to_pfn(__pa(swapper_pg_dir)), NULL);
 #endif
 
         /*
@@ -509,18 +509,21 @@ void __init mem_init(void)
          * real number of pages we have in this system
          */
         printk(KERN_INFO "Memory:");
-
         num_physpages = 0;
         for (i = 0; i < meminfo.nr_banks; i++) {
                 num_physpages += bank_pfn_size(&meminfo.bank[i]);
                 printk(" %ldMB", bank_phys_size(&meminfo.bank[i]) >> 20);
         }
-
         printk(" = %luMB total\n", num_physpages >> (20 - PAGE_SHIFT));
+
+        codesize = _etext - _text;
+        datasize = _end - _data;
+        initsize = __init_end - __init_begin;
+
         printk(KERN_NOTICE "Memory: %luKB available (%dK code, "
                 "%dK data, %dK init)\n",
                 (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
-                codepages >> 10, datapages >> 10, initpages >> 10);
+                codesize >> 10, datasize >> 10, initsize >> 10);
 
         if (PAGE_SIZE >= 16384 && num_physpages <= 128) {
                 extern int sysctl_overcommit_memory;
@@ -535,11 +538,10 @@ void __init mem_init(void)
 
 void free_initmem(void)
 {
-        if (!machine_is_integrator() && !machine_is_cintegrator()) {
-                free_area((unsigned long)(&__init_begin),
-                          (unsigned long)(&__init_end),
-                          "init");
-        }
+        if (!machine_is_integrator() && !machine_is_cintegrator())
+                totalram_pages += free_area(__phys_to_pfn(__pa(__init_begin)),
+                                            __phys_to_pfn(__pa(__init_end)),
+                                            "init");
 }
 
 #ifdef CONFIG_BLK_DEV_INITRD
@@ -549,7 +551,9 @@ static int keep_initrd;
 void free_initrd_mem(unsigned long start, unsigned long end)
 {
         if (!keep_initrd)
-                free_area(start, end, "initrd");
+                totalram_pages += free_area(__phys_to_pfn(__pa(start)),
+                                            __phys_to_pfn(__pa(end)),
+                                            "initrd");
 }
 
 static int __init keepinitrd_setup(char *__unused)
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index 5d9f53907b4e..95bbe112965e 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -32,7 +32,5 @@ struct meminfo;
 struct pglist_data;
 
 void __init create_mapping(struct map_desc *md);
-void __init bootmem_init(struct meminfo *mi);
+void __init bootmem_init(void);
 void reserve_node_zero(struct pglist_data *pgdat);
-
-extern void _text, _stext, _etext, __data_start, _end, __init_begin, __init_end;
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 7f36c825718d..2ab5f962a053 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -17,6 +17,7 @@
 
 #include <asm/cputype.h>
 #include <asm/mach-types.h>
+#include <asm/sections.h>
 #include <asm/setup.h>
 #include <asm/sizes.h>
 #include <asm/tlb.h>
@@ -646,61 +647,79 @@ static void __init early_vmalloc(char **arg)
                         "vmalloc area too small, limiting to %luMB\n",
                         vmalloc_reserve >> 20);
         }
+
+        if (vmalloc_reserve > VMALLOC_END - (PAGE_OFFSET + SZ_32M)) {
+                vmalloc_reserve = VMALLOC_END - (PAGE_OFFSET + SZ_32M);
+                printk(KERN_WARNING
+                        "vmalloc area is too big, limiting to %luMB\n",
+                        vmalloc_reserve >> 20);
+        }
 }
 __early_param("vmalloc=", early_vmalloc);
 
 #define VMALLOC_MIN     (void *)(VMALLOC_END - vmalloc_reserve)
 
-static int __init check_membank_valid(struct membank *mb)
+static void __init sanity_check_meminfo(void)
 {
-        /*
-         * Check whether this memory region has non-zero size or
-         * invalid node number.
-         */
-        if (mb->size == 0 || mb->node >= MAX_NUMNODES)
-                return 0;
-
-        /*
-         * Check whether this memory region would entirely overlap
-         * the vmalloc area.
-         */
-        if (phys_to_virt(mb->start) >= VMALLOC_MIN) {
-                printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx "
-                        "(vmalloc region overlap).\n",
-                        mb->start, mb->start + mb->size - 1);
-                return 0;
-        }
-
-        /*
-         * Check whether this memory region would partially overlap
-         * the vmalloc area.
-         */
-        if (phys_to_virt(mb->start + mb->size) < phys_to_virt(mb->start) ||
-            phys_to_virt(mb->start + mb->size) > VMALLOC_MIN) {
-                unsigned long newsize = VMALLOC_MIN - phys_to_virt(mb->start);
-
-                printk(KERN_NOTICE "Truncating RAM at %.8lx-%.8lx "
-                        "to -%.8lx (vmalloc region overlap).\n",
-                        mb->start, mb->start + mb->size - 1,
-                        mb->start + newsize - 1);
-                mb->size = newsize;
-        }
+        int i, j;
 
-        return 1;
-}
+        for (i = 0, j = 0; i < meminfo.nr_banks; i++) {
+                struct membank *bank = &meminfo.bank[j];
+                *bank = meminfo.bank[i];
 
-static void __init sanity_check_meminfo(struct meminfo *mi)
-{
-        int i, j;
+#ifdef CONFIG_HIGHMEM
+                /*
+                 * Split those memory banks which are partially overlapping
+                 * the vmalloc area greatly simplifying things later.
+                 */
+                if (__va(bank->start) < VMALLOC_MIN &&
+                    bank->size > VMALLOC_MIN - __va(bank->start)) {
+                        if (meminfo.nr_banks >= NR_BANKS) {
+                                printk(KERN_CRIT "NR_BANKS too low, "
+                                                 "ignoring high memory\n");
+                        } else {
+                                memmove(bank + 1, bank,
+                                        (meminfo.nr_banks - i) * sizeof(*bank));
+                                meminfo.nr_banks++;
+                                i++;
+                                bank[1].size -= VMALLOC_MIN - __va(bank->start);
+                                bank[1].start = __pa(VMALLOC_MIN - 1) + 1;
+                                j++;
+                        }
+                        bank->size = VMALLOC_MIN - __va(bank->start);
+                }
+#else
+                /*
+                 * Check whether this memory bank would entirely overlap
+                 * the vmalloc area.
+                 */
+                if (__va(bank->start) >= VMALLOC_MIN) {
+                        printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx "
+                               "(vmalloc region overlap).\n",
+                               bank->start, bank->start + bank->size - 1);
+                        continue;
+                }
 
-        for (i = 0, j = 0; i < mi->nr_banks; i++) {
-                if (check_membank_valid(&mi->bank[i]))
-                        mi->bank[j++] = mi->bank[i];
+                /*
+                 * Check whether this memory bank would partially overlap
+                 * the vmalloc area.
+                 */
+                if (__va(bank->start + bank->size) > VMALLOC_MIN ||
+                    __va(bank->start + bank->size) < __va(bank->start)) {
+                        unsigned long newsize = VMALLOC_MIN - __va(bank->start);
+                        printk(KERN_NOTICE "Truncating RAM at %.8lx-%.8lx "
+                               "to -%.8lx (vmalloc region overlap).\n",
+                               bank->start, bank->start + bank->size - 1,
+                               bank->start + newsize - 1);
+                        bank->size = newsize;
+                }
+#endif
+                j++;
         }
-        mi->nr_banks = j;
+        meminfo.nr_banks = j;
 }
 
-static inline void prepare_page_table(struct meminfo *mi)
+static inline void prepare_page_table(void)
 {
         unsigned long addr;
 
@@ -712,7 +731,7 @@ static inline void prepare_page_table(struct meminfo *mi)
 
 #ifdef CONFIG_XIP_KERNEL
         /* The XIP kernel is mapped in the module area -- skip over it */
-        addr = ((unsigned long)&_etext + PGDIR_SIZE - 1) & PGDIR_MASK;
+        addr = ((unsigned long)_etext + PGDIR_SIZE - 1) & PGDIR_MASK;
 #endif
         for ( ; addr < PAGE_OFFSET; addr += PGDIR_SIZE)
                 pmd_clear(pmd_off_k(addr));
@@ -721,7 +740,7 @@ static inline void prepare_page_table(struct meminfo *mi)
          * Clear out all the kernel space mappings, except for the first
          * memory bank, up to the end of the vmalloc region.
          */
-        for (addr = __phys_to_virt(mi->bank[0].start + mi->bank[0].size);
+        for (addr = __phys_to_virt(bank_phys_end(&meminfo.bank[0]));
              addr < VMALLOC_END; addr += PGDIR_SIZE)
                 pmd_clear(pmd_off_k(addr));
 }
@@ -738,10 +757,10 @@ void __init reserve_node_zero(pg_data_t *pgdat)
          * Note that this can only be in node 0.
          */
 #ifdef CONFIG_XIP_KERNEL
-        reserve_bootmem_node(pgdat, __pa(&__data_start), &_end - &__data_start,
+        reserve_bootmem_node(pgdat, __pa(_data), _end - _data,
                         BOOTMEM_DEFAULT);
 #else
-        reserve_bootmem_node(pgdat, __pa(&_stext), &_end - &_stext,
+        reserve_bootmem_node(pgdat, __pa(_stext), _end - _stext,
                         BOOTMEM_DEFAULT);
 #endif
 
@@ -820,7 +839,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
 #ifdef CONFIG_XIP_KERNEL
         map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & SECTION_MASK);
         map.virtual = MODULES_VADDR;
-        map.length = ((unsigned long)&_etext - map.virtual + ~SECTION_MASK) & SECTION_MASK;
+        map.length = ((unsigned long)_etext - map.virtual + ~SECTION_MASK) & SECTION_MASK;
         map.type = MT_ROM;
         create_mapping(&map);
 #endif
@@ -880,14 +899,14 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
  * paging_init() sets up the page tables, initialises the zone memory
  * maps, and sets up the zero page, bad page and bad page tables.
  */
-void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc)
+void __init paging_init(struct machine_desc *mdesc)
 {
         void *zero_page;
 
         build_mem_type_table();
-        sanity_check_meminfo(mi);
-        prepare_page_table(mi);
-        bootmem_init(mi);
+        sanity_check_meminfo();
+        prepare_page_table();
+        bootmem_init();
         devicemaps_init(mdesc);
 
         top_pmd = pmd_off_k(0xffff0000);
@@ -896,7 +915,7 @@ void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc)
          * allocate the zero page.  Note that we count on this going ok.
          */
         zero_page = alloc_bootmem_low_pages(PAGE_SIZE);
-        memzero(zero_page, PAGE_SIZE);
+        memset(zero_page, 0, PAGE_SIZE);
         empty_zero_page = virt_to_page(zero_page);
         flush_dcache_page(empty_zero_page);
 }
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 07b62b238979..ad7bacc693b2 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -10,6 +10,7 @@
 #include <linux/io.h>
 
 #include <asm/cacheflush.h>
+#include <asm/sections.h>
 #include <asm/page.h>
 #include <asm/mach/arch.h>
 
@@ -25,10 +26,10 @@ void __init reserve_node_zero(pg_data_t *pgdat)
          * Note that this can only be in node 0.
          */
 #ifdef CONFIG_XIP_KERNEL
-        reserve_bootmem_node(pgdat, __pa(&__data_start), &_end - &__data_start,
+        reserve_bootmem_node(pgdat, __pa(_data), _end - _data,
                         BOOTMEM_DEFAULT);
 #else
-        reserve_bootmem_node(pgdat, __pa(&_stext), &_end - &_stext,
+        reserve_bootmem_node(pgdat, __pa(_stext), _end - _stext,
                         BOOTMEM_DEFAULT);
 #endif
 
@@ -41,27 +42,13 @@ void __init reserve_node_zero(pg_data_t *pgdat)
                         BOOTMEM_DEFAULT);
 }
 
-static void __init sanity_check_meminfo(struct meminfo *mi)
-{
-        int i, j;
-
-        for (i = 0, j = 0; i < mi->nr_banks; i++) {
-                struct membank *mb = &mi->bank[i];
-
-                if (mb->size != 0 && mb->node < MAX_NUMNODES)
-                        mi->bank[j++] = mi->bank[i];
-        }
-        mi->nr_banks = j;
-}
-
 /*
  * paging_init() sets up the page tables, initialises the zone memory
  * maps, and sets up the zero page, bad page and bad page tables.
  */
-void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc)
+void __init paging_init(struct machine_desc *mdesc)
 {
-        sanity_check_meminfo(mi);
-        bootmem_init(mi);
+        bootmem_init();
 }
 
 /*
diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c
index e0f19ab91163..2690146161ba 100644
--- a/arch/arm/mm/pgd.c
+++ b/arch/arm/mm/pgd.c
@@ -31,7 +31,7 @@ pgd_t *get_pgd_slow(struct mm_struct *mm)
         if (!new_pgd)
                 goto no_pgd;
 
-        memzero(new_pgd, FIRST_KERNEL_PGD_NR * sizeof(pgd_t));
+        memset(new_pgd, 0, FIRST_KERNEL_PGD_NR * sizeof(pgd_t));
 
         /*
          * Copy over the kernel and IO PGD entries
diff --git a/arch/arm/mm/proc-syms.c b/arch/arm/mm/proc-syms.c
index 2b5ba396e3a6..4ad3bf291ad3 100644
--- a/arch/arm/mm/proc-syms.c
+++ b/arch/arm/mm/proc-syms.c
@@ -33,8 +33,8 @@ EXPORT_SYMBOL(cpu_cache);
 
 #ifdef CONFIG_MMU
 #ifndef MULTI_USER
-EXPORT_SYMBOL(__cpu_clear_user_page);
-EXPORT_SYMBOL(__cpu_copy_user_page);
+EXPORT_SYMBOL(__cpu_clear_user_highpage);
+EXPORT_SYMBOL(__cpu_copy_user_highpage);
 #else
 EXPORT_SYMBOL(cpu_user);
 #endif
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 294943b85973..f0cc599facb7 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -71,6 +71,8 @@ ENTRY(cpu_v6_reset)
  *      IRQs are already disabled.
  */
 ENTRY(cpu_v6_do_idle)
+        mov     r1, #0
+        mcr     p15, 0, r1, c7, c10, 4          @ DWB - WFI may enter a low-power mode
         mcr     p15, 0, r1, c7, c0, 4           @ wait for interrupt
         mov     pc, lr
 
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 4d3c0a73e7fb..d1ebec42521d 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -20,9 +20,17 @@
 
 #define TTB_C           (1 << 0)
 #define TTB_S           (1 << 1)
+#define TTB_RGN_NC      (0 << 3)
+#define TTB_RGN_OC_WBWA (1 << 3)
 #define TTB_RGN_OC_WT   (2 << 3)
 #define TTB_RGN_OC_WB   (3 << 3)
 
+#ifndef CONFIG_SMP
+#define TTB_FLAGS       TTB_C|TTB_RGN_OC_WB             @ mark PTWs cacheable, outer WB
+#else
+#define TTB_FLAGS       TTB_C|TTB_S|TTB_RGN_OC_WBWA     @ mark PTWs cacheable and shared, outer WBWA
+#endif
+
 ENTRY(cpu_v7_proc_init)
         mov     pc, lr
 ENDPROC(cpu_v7_proc_init)
@@ -55,6 +63,7 @@ ENDPROC(cpu_v7_reset)
  *      IRQs are already disabled.
  */
 ENTRY(cpu_v7_do_idle)
+        dsb                                     @ WFI may enter a low-power mode
         wfi
         mov     pc, lr
 ENDPROC(cpu_v7_do_idle)
@@ -85,7 +94,7 @@ ENTRY(cpu_v7_switch_mm)
 #ifdef CONFIG_MMU
         mov     r2, #0
         ldr     r1, [r1, #MM_CONTEXT_ID]        @ get mm->context.id
-        orr     r0, r0, #TTB_RGN_OC_WB          @ mark PTWs outer cacheable, WB
+        orr     r0, r0, #TTB_FLAGS
         mcr     p15, 0, r2, c13, c0, 1          @ set reserved context ID
         isb
 1:      mcr     p15, 0, r0, c2, c0, 0           @ set TTB 0
@@ -162,6 +171,11 @@ cpu_v7_name:
  *      - cache type register is implemented
  */
 __v7_setup:
+#ifdef CONFIG_SMP
+        mrc     p15, 0, r0, c1, c0, 1           @ Enable SMP/nAMP mode
+        orr     r0, r0, #(0x1 << 6)
+        mcr     p15, 0, r0, c1, c0, 1
+#endif
         adr     r12, __v7_setup_stack           @ the local stack
         stmia   r12, {r0-r5, r7, r9, r11, lr}
         bl      v7_flush_dcache_all
@@ -174,8 +188,7 @@ __v7_setup:
 #ifdef CONFIG_MMU
         mcr     p15, 0, r10, c8, c7, 0          @ invalidate I + D TLBs
         mcr     p15, 0, r10, c2, c0, 2          @ TTB control register
-        orr     r4, r4, #TTB_RGN_OC_WB          @ mark PTWs outer cacheable, WB
-        mcr     p15, 0, r4, c2, c0, 0           @ load TTB0
+        orr     r4, r4, #TTB_FLAGS
         mcr     p15, 0, r4, c2, c0, 1           @ load TTB1
         mov     r10, #0x1f                      @ domains 0, 1 = manager
         mcr     p15, 0, r10, c3, c0, 0          @ load domain access register
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index 8f6cf56c11c0..33515c214b92 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -481,3 +481,28 @@ __xsc3_proc_info:
         .long   xsc3_mc_user_fns
         .long   xsc3_cache_fns
         .size   __xsc3_proc_info, . - __xsc3_proc_info
+
+/* Note: PXA935 changed its implementor ID from Intel to Marvell */
+
+        .type   __xsc3_pxa935_proc_info,#object
+__xsc3_pxa935_proc_info:
+        .long   0x56056000
+        .long   0xffffe000
+        .long   PMD_TYPE_SECT | \
+                PMD_SECT_BUFFERABLE | \
+                PMD_SECT_CACHEABLE | \
+                PMD_SECT_AP_WRITE | \
+                PMD_SECT_AP_READ
+        .long   PMD_TYPE_SECT | \
+                PMD_SECT_AP_WRITE | \
+                PMD_SECT_AP_READ
+        b       __xsc3_setup
+        .long   cpu_arch_name
+        .long   cpu_elf_name
+        .long   HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
+        .long   cpu_xsc3_name
+        .long   xsc3_processor_functions
+        .long   v4wbi_tlb_fns
+        .long   xsc3_mc_user_fns
+        .long   xsc3_cache_fns
+        .size   __xsc3_pxa935_proc_info, . - __xsc3_pxa935_proc_info
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index b2a7e3fad117..a1612958a59e 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -8,11 +8,13 @@ choice
 
 config ARCH_MX2
         bool "MX2-based"
+        select CPU_ARM926T
         help
           This enables support for systems based on the Freescale i.MX2 family
 
 config ARCH_MX3
         bool "MX3-based"
+        select CPU_V6
         help
           This enables support for systems based on the Freescale i.MX3 family
 
diff --git a/arch/arm/plat-mxc/dma-mx1-mx2.c b/arch/arm/plat-mxc/dma-mx1-mx2.c
index b296f19fd89a..214274344442 100644
--- a/arch/arm/plat-mxc/dma-mx1-mx2.c
+++ b/arch/arm/plat-mxc/dma-mx1-mx2.c
@@ -34,7 +34,7 @@
 #include <asm/system.h>
 #include <asm/irq.h>
 #include <mach/hardware.h>
-#include <asm/dma.h>
+#include <mach/dma.h>
 #include <mach/dma-mx1-mx2.h>
 
 #define DMA_DCR     0x00                /* Control Register */
diff --git a/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h b/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h
index e85fd946116c..6cc6f0c8cb25 100644
--- a/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h
+++ b/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h
@@ -22,7 +22,7 @@
  * MA 02110-1301, USA.
  */
 
-#include <asm/dma.h>
+#include <mach/dma.h>
 
 #ifndef __ASM_ARCH_MXC_DMA_H
 #define __ASM_ARCH_MXC_DMA_H
diff --git a/arch/arm/plat-mxc/include/mach/dma.h b/arch/arm/plat-mxc/include/mach/dma.h
deleted file mode 100644
index c822d569a05e..000000000000
--- a/arch/arm/plat-mxc/include/mach/dma.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
- */
-
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_MXC_DMA_H__
-#define __ASM_ARCH_MXC_DMA_H__
-
-#endif
diff --git a/arch/arm/plat-mxc/include/mach/io.h b/arch/arm/plat-mxc/include/mach/io.h
index 5d4cb1196441..c0cb267e7403 100644
--- a/arch/arm/plat-mxc/include/mach/io.h
+++ b/arch/arm/plat-mxc/include/mach/io.h
@@ -35,8 +35,8 @@ __mx3_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
 #endif
 
 /* io address mapping macro */
-#define __io(a)                 ((void __iomem *)(a))
+#define __io(a)         __typesafe_io(a)
 
-#define __mem_pci(a)            (a)
+#define __mem_pci(a)    (a)
 
 #endif
diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h
index d7a8d3ebed57..203688e6164e 100644
--- a/arch/arm/plat-mxc/include/mach/memory.h
+++ b/arch/arm/plat-mxc/include/mach/memory.h
@@ -13,17 +13,4 @@
 
 #include <mach/hardware.h>
 
-/*
- * Virtual view <-> DMA view memory address translations
- * This macro is used to translate the virtual address to an address
- * suitable to be passed to set_dma_addr()
- */
-#define __virt_to_bus(a)        __virt_to_phys(a)
-
-/*
- * Used to convert an address for DMA operations to an address that the
- * kernel can use.
- */
-#define __bus_to_virt(a)        __phys_to_virt(a)
-
 #endif /* __ASM_ARCH_MXC_MEMORY_H__ */
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index a94f0c44ebc8..46d3b0b9ce69 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -14,9 +14,11 @@ config ARCH_OMAP1
 
 config ARCH_OMAP2
         bool "TI OMAP2"
+        select CPU_V6
 
 config ARCH_OMAP3
         bool "TI OMAP3"
+        select CPU_V7
 
 endchoice
 
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 50f8b4ad9a09..7686b9fa53f2 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -29,7 +29,7 @@
 
 #include <asm/system.h>
 #include <mach/hardware.h>
-#include <asm/dma.h>
+#include <mach/dma.h>
 
 #include <mach/tc.h>
 
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h
index adc83b7b8205..d92bf7964481 100644
--- a/arch/arm/plat-omap/include/mach/io.h
+++ b/arch/arm/plat-omap/include/mach/io.h
@@ -42,8 +42,8 @@
  * We don't actually have real ISA nor PCI buses, but there is so many
  * drivers out there that might just work if we fake them...
  */
-#define __io(a)                 ((void __iomem *)(PCIO_BASE + (a)))
-#define __mem_pci(a)            (a)
+#define __io(a)         __typesafe_io(a)
+#define __mem_pci(a)    (a)
 
 /*
  * ----------------------------------------------------------------------------
@@ -51,8 +51,6 @@
  * ----------------------------------------------------------------------------
  */
 
-#define PCIO_BASE       0
-
 #if defined(CONFIG_ARCH_OMAP1)
 
 #define IO_PHYS                 0xFFFB0000
diff --git a/arch/arm/plat-omap/include/mach/memory.h b/arch/arm/plat-omap/include/mach/memory.h
index d40cac60b959..211c9f6619e9 100644
--- a/arch/arm/plat-omap/include/mach/memory.h
+++ b/arch/arm/plat-omap/include/mach/memory.h
@@ -43,18 +43,7 @@
 #endif
 
 /*
- * Conversion between SDRAM and fake PCI bus, used by USB
- * NOTE: Physical address must be converted to Local Bus address
- *       on OMAP-1510 only
- */
-
-/*
  * Bus address is physical address, except for OMAP-1510 Local Bus.
- */
-#define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt(x)        __phys_to_virt(x)
-
-/*
  * OMAP-1510 bus address is translated into a Local Bus address if the
  * OMAP bus type is lbus. We do the address translation based on the
  * device overriding the defaults used in the dma-mapping API.
@@ -74,16 +63,16 @@
 
 #define __arch_page_to_dma(dev, page)   ({is_lbus_device(dev) ? \
                                         (dma_addr_t)virt_to_lbus(page_address(page)) : \
-                                        (dma_addr_t)__virt_to_bus(page_address(page));})
+                                        (dma_addr_t)__virt_to_phys(page_address(page));})
 
 #define __arch_dma_to_virt(dev, addr)   ({ (void *) (is_lbus_device(dev) ? \
                                                 lbus_to_virt(addr) : \
-                                                __bus_to_virt(addr)); })
+                                                __phys_to_virt(addr)); })
 
 #define __arch_virt_to_dma(dev, addr)   ({ unsigned long __addr = (unsigned long)(addr); \
                                            (dma_addr_t) (is_lbus_device(dev) ? \
                                                 virt_to_lbus(__addr) : \
-                                                __virt_to_bus(__addr)); })
+                                                __virt_to_phys(__addr)); })
 
 #endif  /* CONFIG_ARCH_OMAP15XX */
 
diff --git a/arch/arm/plat-s3c/include/plat/iic.h b/arch/arm/plat-s3c/include/plat/iic.h
new file mode 100644
index 000000000000..5106acaa1d0e
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/iic.h
@@ -0,0 +1,33 @@
+/* arch/arm/mach-s3c2410/include/mach/iic.h
+ *
+ * Copyright (c) 2004 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C2410 - I2C Controller platfrom_device info
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_IIC_H
+#define __ASM_ARCH_IIC_H __FILE__
+
+#define S3C_IICFLG_FILTER       (1<<0)  /* enable s3c2440 filter */
+
+/* Notes:
+ *      1) All frequencies are expressed in Hz
+ *      2) A value of zero is `do not care`
+*/
+
+struct s3c2410_platform_i2c {
+        int             bus_num;        /* bus number to use */
+        unsigned int    flags;
+        unsigned int    slave_addr;     /* slave address for controller */
+        unsigned long   bus_freq;       /* standard bus frequency */
+        unsigned long   max_freq;       /* max frequency for the bus */
+        unsigned long   min_freq;       /* min frequency for the bus */
+        unsigned int    sda_delay;      /* pclks (s3c2440 only) */
+};
+
+#endif /* __ASM_ARCH_IIC_H */
diff --git a/arch/arm/plat-s3c/include/plat/nand.h b/arch/arm/plat-s3c/include/plat/nand.h
new file mode 100644
index 000000000000..f4dcd14af059
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/nand.h
@@ -0,0 +1,50 @@
+/* arch/arm/mach-s3c2410/include/mach/nand.h
+ *
+ * Copyright (c) 2004 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C2410 - NAND device controller platfrom_device info
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* struct s3c2410_nand_set
+ *
+ * define an set of one or more nand chips registered with an unique mtd
+ *
+ * nr_chips      = number of chips in this set
+ * nr_partitions = number of partitions pointed to be partitoons (or zero)
+ * name          = name of set (optional)
+ * nr_map        = map for low-layer logical to physical chip numbers (option)
+ * partitions    = mtd partition list
+*/
+
+struct s3c2410_nand_set {
+        unsigned int            disable_ecc : 1;
+
+        int                     nr_chips;
+        int                     nr_partitions;
+        char                    *name;
+        int                     *nr_map;
+        struct mtd_partition    *partitions;
+        struct nand_ecclayout   *ecc_layout;
+};
+
+struct s3c2410_platform_nand {
+        /* timing information for controller, all times in nanoseconds */
+
+        int     tacls;  /* time for active CLE/ALE to nWE/nOE */
+        int     twrph0; /* active time for nWE/nOE */
+        int     twrph1; /* time for release CLE/ALE from nWE/nOE inactive */
+
+        unsigned int    ignore_unset_ecc : 1;
+
+        int                     nr_sets;
+        struct s3c2410_nand_set *sets;
+
+        void                    (*select_chip)(struct s3c2410_nand_set *,
+                                               int chip);
+};
+
diff --git a/arch/arm/plat-s3c/include/plat/regs-ac97.h b/arch/arm/plat-s3c/include/plat/regs-ac97.h
new file mode 100644
index 000000000000..c3878f7acb83
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-ac97.h
@@ -0,0 +1,67 @@
+/* arch/arm/mach-s3c2410/include/mach/regs-ac97.h
+ *
+ * Copyright (c) 2006 Simtec Electronics <linux@simtec.co.uk>
+ *              http://www.simtec.co.uk/products/SWLINUX/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2440 AC97 Controller
+*/
+
+#ifndef __ASM_ARCH_REGS_AC97_H
+#define __ASM_ARCH_REGS_AC97_H __FILE__
+
+#define S3C_AC97_GLBCTRL                                (0x00)
+
+#define S3C_AC97_GLBCTRL_CODECREADYIE                   (1<<22)
+#define S3C_AC97_GLBCTRL_PCMOUTURIE                     (1<<21)
+#define S3C_AC97_GLBCTRL_PCMINORIE                      (1<<20)
+#define S3C_AC97_GLBCTRL_MICINORIE                      (1<<19)
+#define S3C_AC97_GLBCTRL_PCMOUTTIE                      (1<<18)
+#define S3C_AC97_GLBCTRL_PCMINTIE                       (1<<17)
+#define S3C_AC97_GLBCTRL_MICINTIE                       (1<<16)
+#define S3C_AC97_GLBCTRL_PCMOUTTM_OFF                   (0<<12)
+#define S3C_AC97_GLBCTRL_PCMOUTTM_PIO                   (1<<12)
+#define S3C_AC97_GLBCTRL_PCMOUTTM_DMA                   (2<<12)
+#define S3C_AC97_GLBCTRL_PCMOUTTM_MASK                  (3<<12)
+#define S3C_AC97_GLBCTRL_PCMINTM_OFF                    (0<<10)
+#define S3C_AC97_GLBCTRL_PCMINTM_PIO                    (1<<10)
+#define S3C_AC97_GLBCTRL_PCMINTM_DMA                    (2<<10)
+#define S3C_AC97_GLBCTRL_PCMINTM_MASK                   (3<<10)
+#define S3C_AC97_GLBCTRL_MICINTM_OFF                    (0<<8)
+#define S3C_AC97_GLBCTRL_MICINTM_PIO                    (1<<8)
+#define S3C_AC97_GLBCTRL_MICINTM_DMA                    (2<<8)
+#define S3C_AC97_GLBCTRL_MICINTM_MASK                   (3<<8)
+#define S3C_AC97_GLBCTRL_TRANSFERDATAENABLE             (1<<3)
+#define S3C_AC97_GLBCTRL_ACLINKON                       (1<<2)
+#define S3C_AC97_GLBCTRL_WARMRESET                      (1<<1)
+#define S3C_AC97_GLBCTRL_COLDRESET                      (1<<0)
+
+#define S3C_AC97_GLBSTAT                                (0x04)
+
+#define S3C_AC97_GLBSTAT_CODECREADY                     (1<<22)
+#define S3C_AC97_GLBSTAT_PCMOUTUR                       (1<<21)
+#define S3C_AC97_GLBSTAT_PCMINORI                       (1<<20)
+#define S3C_AC97_GLBSTAT_MICINORI                       (1<<19)
+#define S3C_AC97_GLBSTAT_PCMOUTTI                       (1<<18)
+#define S3C_AC97_GLBSTAT_PCMINTI                        (1<<17)
+#define S3C_AC97_GLBSTAT_MICINTI                        (1<<16)
+#define S3C_AC97_GLBSTAT_MAINSTATE_IDLE                 (0<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_INIT                 (1<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_READY                (2<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_ACTIVE               (3<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_LP                   (4<<0)
+#define S3C_AC97_GLBSTAT_MAINSTATE_WARM                 (5<<0)
+
+#define S3C_AC97_CODEC_CMD                              (0x08)
+
+#define S3C_AC97_CODEC_CMD_READ                         (1<<23)
+
+#define S3C_AC97_STAT                                   (0x0c)
+#define S3C_AC97_PCM_ADDR                               (0x10)
+#define S3C_AC97_PCM_DATA                               (0x18)
+#define S3C_AC97_MIC_DATA                               (0x1C)
+
+#endif /* __ASM_ARCH_REGS_AC97_H */
diff --git a/arch/arm/plat-s3c/include/plat/regs-iic.h b/arch/arm/plat-s3c/include/plat/regs-iic.h
new file mode 100644
index 000000000000..2f7c17de8ac8
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-iic.h
@@ -0,0 +1,56 @@
+/* arch/arm/mach-s3c2410/include/mach/regs-iic.h
+ *
+ * Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk>
+ *              http://www.simtec.co.uk/products/SWLINUX/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2410 I2C Controller
+*/
+
+#ifndef __ASM_ARCH_REGS_IIC_H
+#define __ASM_ARCH_REGS_IIC_H __FILE__
+
+/* see s3c2410x user guide, v1.1, section 9 (p447) for more info */
+
+#define S3C2410_IICREG(x) (x)
+
+#define S3C2410_IICCON    S3C2410_IICREG(0x00)
+#define S3C2410_IICSTAT   S3C2410_IICREG(0x04)
+#define S3C2410_IICADD    S3C2410_IICREG(0x08)
+#define S3C2410_IICDS     S3C2410_IICREG(0x0C)
+#define S3C2440_IICLC     S3C2410_IICREG(0x10)
+
+#define S3C2410_IICCON_ACKEN            (1<<7)
+#define S3C2410_IICCON_TXDIV_16         (0<<6)
+#define S3C2410_IICCON_TXDIV_512        (1<<6)
+#define S3C2410_IICCON_IRQEN            (1<<5)
+#define S3C2410_IICCON_IRQPEND          (1<<4)
+#define S3C2410_IICCON_SCALE(x)         ((x)&15)
+#define S3C2410_IICCON_SCALEMASK        (0xf)
+
+#define S3C2410_IICSTAT_MASTER_RX       (2<<6)
+#define S3C2410_IICSTAT_MASTER_TX       (3<<6)
+#define S3C2410_IICSTAT_SLAVE_RX        (0<<6)
+#define S3C2410_IICSTAT_SLAVE_TX        (1<<6)
+#define S3C2410_IICSTAT_MODEMASK        (3<<6)
+
+#define S3C2410_IICSTAT_START           (1<<5)
+#define S3C2410_IICSTAT_BUSBUSY         (1<<5)
+#define S3C2410_IICSTAT_TXRXEN          (1<<4)
+#define S3C2410_IICSTAT_ARBITR          (1<<3)
+#define S3C2410_IICSTAT_ASSLAVE         (1<<2)
+#define S3C2410_IICSTAT_ADDR0           (1<<1)
+#define S3C2410_IICSTAT_LASTBIT         (1<<0)
+
+#define S3C2410_IICLC_SDA_DELAY0        (0 << 0)
+#define S3C2410_IICLC_SDA_DELAY5        (1 << 0)
+#define S3C2410_IICLC_SDA_DELAY10       (2 << 0)
+#define S3C2410_IICLC_SDA_DELAY15       (3 << 0)
+#define S3C2410_IICLC_SDA_DELAY_MASK    (3 << 0)
+
+#define S3C2410_IICLC_FILTER_ON         (1<<2)
+
+#endif /* __ASM_ARCH_REGS_IIC_H */
diff --git a/arch/arm/plat-s3c/include/plat/regs-nand.h b/arch/arm/plat-s3c/include/plat/regs-nand.h
new file mode 100644
index 000000000000..b2caa4bca270
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-nand.h
@@ -0,0 +1,123 @@
+/* arch/arm/mach-s3c2410/include/mach/regs-nand.h
+ *
+ * Copyright (c) 2004,2005 Simtec Electronics <linux@simtec.co.uk>
+ *                    http://www.simtec.co.uk/products/SWLINUX/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2410 NAND register definitions
+*/
+
+#ifndef __ASM_ARM_REGS_NAND
+#define __ASM_ARM_REGS_NAND
+
+
+#define S3C2410_NFREG(x) (x)
+
+#define S3C2410_NFCONF  S3C2410_NFREG(0x00)
+#define S3C2410_NFCMD   S3C2410_NFREG(0x04)
+#define S3C2410_NFADDR  S3C2410_NFREG(0x08)
+#define S3C2410_NFDATA  S3C2410_NFREG(0x0C)
+#define S3C2410_NFSTAT  S3C2410_NFREG(0x10)
+#define S3C2410_NFECC   S3C2410_NFREG(0x14)
+
+#define S3C2440_NFCONT   S3C2410_NFREG(0x04)
+#define S3C2440_NFCMD    S3C2410_NFREG(0x08)
+#define S3C2440_NFADDR   S3C2410_NFREG(0x0C)
+#define S3C2440_NFDATA   S3C2410_NFREG(0x10)
+#define S3C2440_NFECCD0  S3C2410_NFREG(0x14)
+#define S3C2440_NFECCD1  S3C2410_NFREG(0x18)
+#define S3C2440_NFECCD   S3C2410_NFREG(0x1C)
+#define S3C2440_NFSTAT   S3C2410_NFREG(0x20)
+#define S3C2440_NFESTAT0 S3C2410_NFREG(0x24)
+#define S3C2440_NFESTAT1 S3C2410_NFREG(0x28)
+#define S3C2440_NFMECC0  S3C2410_NFREG(0x2C)
+#define S3C2440_NFMECC1  S3C2410_NFREG(0x30)
+#define S3C2440_NFSECC   S3C2410_NFREG(0x34)
+#define S3C2440_NFSBLK   S3C2410_NFREG(0x38)
+#define S3C2440_NFEBLK   S3C2410_NFREG(0x3C)
+
+#define S3C2412_NFSBLK          S3C2410_NFREG(0x20)
+#define S3C2412_NFEBLK          S3C2410_NFREG(0x24)
+#define S3C2412_NFSTAT          S3C2410_NFREG(0x28)
+#define S3C2412_NFMECC_ERR0     S3C2410_NFREG(0x2C)
+#define S3C2412_NFMECC_ERR1     S3C2410_NFREG(0x30)
+#define S3C2412_NFMECC0         S3C2410_NFREG(0x34)
+#define S3C2412_NFMECC1         S3C2410_NFREG(0x38)
+#define S3C2412_NFSECC          S3C2410_NFREG(0x3C)
+
+#define S3C2410_NFCONF_EN          (1<<15)
+#define S3C2410_NFCONF_512BYTE     (1<<14)
+#define S3C2410_NFCONF_4STEP       (1<<13)
+#define S3C2410_NFCONF_INITECC     (1<<12)
+#define S3C2410_NFCONF_nFCE        (1<<11)
+#define S3C2410_NFCONF_TACLS(x)    ((x)<<8)
+#define S3C2410_NFCONF_TWRPH0(x)   ((x)<<4)
+#define S3C2410_NFCONF_TWRPH1(x)   ((x)<<0)
+
+#define S3C2410_NFSTAT_BUSY        (1<<0)
+
+#define S3C2440_NFCONF_BUSWIDTH_8       (0<<0)
+#define S3C2440_NFCONF_BUSWIDTH_16      (1<<0)
+#define S3C2440_NFCONF_ADVFLASH         (1<<3)
+#define S3C2440_NFCONF_TACLS(x)         ((x)<<12)
+#define S3C2440_NFCONF_TWRPH0(x)        ((x)<<8)
+#define S3C2440_NFCONF_TWRPH1(x)        ((x)<<4)
+
+#define S3C2440_NFCONT_LOCKTIGHT        (1<<13)
+#define S3C2440_NFCONT_SOFTLOCK         (1<<12)
+#define S3C2440_NFCONT_ILLEGALACC_EN    (1<<10)
+#define S3C2440_NFCONT_RNBINT_EN        (1<<9)
+#define S3C2440_NFCONT_RN_FALLING       (1<<8)
+#define S3C2440_NFCONT_SPARE_ECCLOCK    (1<<6)
+#define S3C2440_NFCONT_MAIN_ECCLOCK     (1<<5)
+#define S3C2440_NFCONT_INITECC          (1<<4)
+#define S3C2440_NFCONT_nFCE             (1<<1)
+#define S3C2440_NFCONT_ENABLE           (1<<0)
+
+#define S3C2440_NFSTAT_READY            (1<<0)
+#define S3C2440_NFSTAT_nCE              (1<<1)
+#define S3C2440_NFSTAT_RnB_CHANGE       (1<<2)
+#define S3C2440_NFSTAT_ILLEGAL_ACCESS   (1<<3)
+
+#define S3C2412_NFCONF_NANDBOOT         (1<<31)
+#define S3C2412_NFCONF_ECCCLKCON        (1<<30)
+#define S3C2412_NFCONF_ECC_MLC          (1<<24)
+#define S3C2412_NFCONF_TACLS_MASK       (7<<12) /* 1 extra bit of Tacls */
+
+#define S3C2412_NFCONT_ECC4_DIRWR       (1<<18)
+#define S3C2412_NFCONT_LOCKTIGHT        (1<<17)
+#define S3C2412_NFCONT_SOFTLOCK         (1<<16)
+#define S3C2412_NFCONT_ECC4_ENCINT      (1<<13)
+#define S3C2412_NFCONT_ECC4_DECINT      (1<<12)
+#define S3C2412_NFCONT_MAIN_ECC_LOCK    (1<<7)
+#define S3C2412_NFCONT_INIT_MAIN_ECC    (1<<5)
+#define S3C2412_NFCONT_nFCE1            (1<<2)
+#define S3C2412_NFCONT_nFCE0            (1<<1)
+
+#define S3C2412_NFSTAT_ECC_ENCDONE      (1<<7)
+#define S3C2412_NFSTAT_ECC_DECDONE      (1<<6)
+#define S3C2412_NFSTAT_ILLEGAL_ACCESS   (1<<5)
+#define S3C2412_NFSTAT_RnB_CHANGE       (1<<4)
+#define S3C2412_NFSTAT_nFCE1            (1<<3)
+#define S3C2412_NFSTAT_nFCE0            (1<<2)
+#define S3C2412_NFSTAT_Res1             (1<<1)
+#define S3C2412_NFSTAT_READY            (1<<0)
+
+#define S3C2412_NFECCERR_SERRDATA(x)    (((x) >> 21) & 0xf)
+#define S3C2412_NFECCERR_SERRBIT(x)     (((x) >> 18) & 0x7)
+#define S3C2412_NFECCERR_MERRDATA(x)    (((x) >> 7) & 0x3ff)
+#define S3C2412_NFECCERR_MERRBIT(x)     (((x) >> 4) & 0x7)
+#define S3C2412_NFECCERR_SPARE_ERR(x)   (((x) >> 2) & 0x3)
+#define S3C2412_NFECCERR_MAIN_ERR(x)    (((x) >> 2) & 0x3)
+#define S3C2412_NFECCERR_NONE           (0)
+#define S3C2412_NFECCERR_1BIT           (1)
+#define S3C2412_NFECCERR_MULTIBIT       (2)
+#define S3C2412_NFECCERR_ECCAREA        (3)
+
+
+
+#endif /* __ASM_ARM_REGS_NAND */
+
diff --git a/arch/arm/plat-s3c/include/plat/regs-rtc.h b/arch/arm/plat-s3c/include/plat/regs-rtc.h
new file mode 100644
index 000000000000..d5837cf8e402
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-rtc.h
@@ -0,0 +1,61 @@
+/* arch/arm/mach-s3c2410/include/mach/regs-rtc.h
+ *
+ * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
+ *                    http://www.simtec.co.uk/products/SWLINUX/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2410 Internal RTC register definition
+*/
+
+#ifndef __ASM_ARCH_REGS_RTC_H
+#define __ASM_ARCH_REGS_RTC_H __FILE__
+
+#define S3C2410_RTCREG(x) (x)
+
+#define S3C2410_RTCCON        S3C2410_RTCREG(0x40)
+#define S3C2410_RTCCON_RTCEN  (1<<0)
+#define S3C2410_RTCCON_CLKSEL (1<<1)
+#define S3C2410_RTCCON_CNTSEL (1<<2)
+#define S3C2410_RTCCON_CLKRST (1<<3)
+
+#define S3C2410_TICNT         S3C2410_RTCREG(0x44)
+#define S3C2410_TICNT_ENABLE  (1<<7)
+
+#define S3C2410_RTCALM        S3C2410_RTCREG(0x50)
+#define S3C2410_RTCALM_ALMEN  (1<<6)
+#define S3C2410_RTCALM_YEAREN (1<<5)
+#define S3C2410_RTCALM_MONEN  (1<<4)
+#define S3C2410_RTCALM_DAYEN  (1<<3)
+#define S3C2410_RTCALM_HOUREN (1<<2)
+#define S3C2410_RTCALM_MINEN  (1<<1)
+#define S3C2410_RTCALM_SECEN  (1<<0)
+
+#define S3C2410_RTCALM_ALL \
+  S3C2410_RTCALM_ALMEN | S3C2410_RTCALM_YEAREN | S3C2410_RTCALM_MONEN |\
+  S3C2410_RTCALM_DAYEN | S3C2410_RTCALM_HOUREN | S3C2410_RTCALM_MINEN |\
+  S3C2410_RTCALM_SECEN
+
+
+#define S3C2410_ALMSEC        S3C2410_RTCREG(0x54)
+#define S3C2410_ALMMIN        S3C2410_RTCREG(0x58)
+#define S3C2410_ALMHOUR       S3C2410_RTCREG(0x5c)
+
+#define S3C2410_ALMDATE       S3C2410_RTCREG(0x60)
+#define S3C2410_ALMMON        S3C2410_RTCREG(0x64)
+#define S3C2410_ALMYEAR       S3C2410_RTCREG(0x68)
+
+#define S3C2410_RTCRST        S3C2410_RTCREG(0x6c)
+
+#define S3C2410_RTCSEC        S3C2410_RTCREG(0x70)
+#define S3C2410_RTCMIN        S3C2410_RTCREG(0x74)
+#define S3C2410_RTCHOUR       S3C2410_RTCREG(0x78)
+#define S3C2410_RTCDATE       S3C2410_RTCREG(0x7c)
+#define S3C2410_RTCDAY        S3C2410_RTCREG(0x80)
+#define S3C2410_RTCMON        S3C2410_RTCREG(0x84)
+#define S3C2410_RTCYEAR       S3C2410_RTCREG(0x88)
+
+
+#endif /* __ASM_ARCH_REGS_RTC_H */
diff --git a/arch/arm/plat-s3c/include/plat/regs-watchdog.h b/arch/arm/plat-s3c/include/plat/regs-watchdog.h
new file mode 100644
index 000000000000..4938492470f7
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-watchdog.h
@@ -0,0 +1,41 @@
+/* arch/arm/mach-s3c2410/include/mach/regs-watchdog.h
+ *
+ * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
+ *                    http://www.simtec.co.uk/products/SWLINUX/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2410 Watchdog timer control
+*/
+
+
+#ifndef __ASM_ARCH_REGS_WATCHDOG_H
+#define __ASM_ARCH_REGS_WATCHDOG_H
+
+#define S3C_WDOGREG(x) ((x) + S3C_VA_WATCHDOG)
+
+#define S3C2410_WTCON      S3C_WDOGREG(0x00)
+#define S3C2410_WTDAT      S3C_WDOGREG(0x04)
+#define S3C2410_WTCNT      S3C_WDOGREG(0x08)
+
+/* the watchdog can either generate a reset pulse, or an
+ * interrupt.
+ */
+
+#define S3C2410_WTCON_RSTEN   (0x01)
+#define S3C2410_WTCON_INTEN   (1<<2)
+#define S3C2410_WTCON_ENABLE  (1<<5)
+
+#define S3C2410_WTCON_DIV16   (0<<3)
+#define S3C2410_WTCON_DIV32   (1<<3)
+#define S3C2410_WTCON_DIV64   (2<<3)
+#define S3C2410_WTCON_DIV128  (3<<3)
+
+#define S3C2410_WTCON_PRESCALE(x) ((x) << 8)
+#define S3C2410_WTCON_PRESCALE_MASK (0xff00)
+
+#endif /* __ASM_ARCH_REGS_WATCHDOG_H */
+
+
diff --git a/arch/arm/plat-s3c/include/plat/uncompress.h b/arch/arm/plat-s3c/include/plat/uncompress.h
index 4df006b9cc10..8a8a927292e0 100644
--- a/arch/arm/plat-s3c/include/plat/uncompress.h
+++ b/arch/arm/plat-s3c/include/plat/uncompress.h
@@ -28,7 +28,7 @@ static void arch_detect_cpu(void);
 /* defines for UART registers */
 
 #include <plat/regs-serial.h>
-#include <asm/plat-s3c/regs-watchdog.h>
+#include <plat/regs-watchdog.h>
 
 /* working in physical space... */
 #undef S3C2410_WDOGREG
diff --git a/arch/arm/plat-s3c24xx/common-smdk.c b/arch/arm/plat-s3c24xx/common-smdk.c
index 3098736c65d9..3d4837021ac7 100644
--- a/arch/arm/plat-s3c24xx/common-smdk.c
+++ b/arch/arm/plat-s3c24xx/common-smdk.c
@@ -38,7 +38,7 @@
 #include <mach/regs-gpio.h>
 #include <mach/leds-gpio.h>
 
-#include <asm/plat-s3c/nand.h>
+#include <plat/nand.h>
 
 #include <plat/common-smdk.h>
 #include <plat/devs.h>
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c
index e93f8bf6d338..adf535aaf43a 100644
--- a/arch/arm/plat-s3c24xx/devs.c
+++ b/arch/arm/plat-s3c24xx/devs.c
@@ -29,11 +29,11 @@
 #include <asm/irq.h>
 
 #include <plat/regs-serial.h>
-#include <asm/plat-s3c24xx/udc.h>
+#include <plat/udc.h>
 
 #include <plat/devs.h>
 #include <plat/cpu.h>
-#include <asm/plat-s3c24xx/regs-spi.h>
+#include <plat/regs-spi.h>
 
 /* Serial port registrations */
 
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 1baf941d1930..63bb22b973e3 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -31,9 +31,8 @@
 #include <asm/system.h>
 #include <asm/irq.h>
 #include <mach/hardware.h>
-#include <asm/dma.h>
+#include <mach/dma.h>
 
-#include <asm/mach/dma.h>
 #include <mach/map.h>
 
 #include <plat/dma.h>
@@ -804,7 +803,7 @@ EXPORT_SYMBOL(s3c2410_dma_request);
  * allowed to go through.
 */
 
-int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *client)
+int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *client)
 {
         struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
         unsigned long flags;
@@ -995,7 +994,7 @@ static int s3c2410_dma_started(struct s3c2410_dma_chan *chan)
 }
 
 int
-s3c2410_dma_ctrl(dmach_t channel, enum s3c2410_chan_op op)
+s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op)
 {
         struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
 
@@ -1043,7 +1042,7 @@ EXPORT_SYMBOL(s3c2410_dma_ctrl);
  * dcon:         base value of the DCONx register
 */
 
-int s3c2410_dma_config(dmach_t channel,
+int s3c2410_dma_config(unsigned int channel,
                        int xferunit,
                        int dcon)
 {
@@ -1092,7 +1091,7 @@ int s3c2410_dma_config(dmach_t channel,
 
 EXPORT_SYMBOL(s3c2410_dma_config);
 
-int s3c2410_dma_setflags(dmach_t channel, unsigned int flags)
+int s3c2410_dma_setflags(unsigned int channel, unsigned int flags)
 {
         struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
 
@@ -1113,7 +1112,7 @@ EXPORT_SYMBOL(s3c2410_dma_setflags);
  * irq?
 */
 
-int s3c2410_dma_set_opfn(dmach_t channel, s3c2410_dma_opfn_t rtn)
+int s3c2410_dma_set_opfn(unsigned int channel, s3c2410_dma_opfn_t rtn)
 {
         struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
 
@@ -1129,7 +1128,7 @@ int s3c2410_dma_set_opfn(dmach_t channel, s3c2410_dma_opfn_t rtn)
 
 EXPORT_SYMBOL(s3c2410_dma_set_opfn);
 
-int s3c2410_dma_set_buffdone_fn(dmach_t channel, s3c2410_dma_cbfn_t rtn)
+int s3c2410_dma_set_buffdone_fn(unsigned int channel, s3c2410_dma_cbfn_t rtn)
 {
         struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
 
@@ -1219,7 +1218,7 @@ EXPORT_SYMBOL(s3c2410_dma_devconfig);
  * returns the current transfer points for the dma source and destination
 */
 
-int s3c2410_dma_getposition(dmach_t channel, dma_addr_t *src, dma_addr_t *dst)
+int s3c2410_dma_getposition(unsigned int channel, dma_addr_t *src, dma_addr_t *dst)
 {
         struct s3c2410_dma_chan *chan = lookup_dma_channel(channel);
 
diff --git a/arch/arm/plat-s3c24xx/include/plat/mci.h b/arch/arm/plat-s3c24xx/include/plat/mci.h
new file mode 100644
index 000000000000..2d0852ac3b27
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/mci.h
@@ -0,0 +1,15 @@
+#ifndef _ARCH_MCI_H
+#define _ARCH_MCI_H
+
+struct s3c24xx_mci_pdata {
+        unsigned int    wprotect_invert : 1;
+        unsigned int    detect_invert : 1;   /* set => detect active high. */
+
+        unsigned int    gpio_detect;
+        unsigned int    gpio_wprotect;
+        unsigned long   ocr_avail;
+        void            (*set_power)(unsigned char power_mode,
+                                     unsigned short vdd);
+};
+
+#endif /* _ARCH_NCI_H */
diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-spi.h b/arch/arm/plat-s3c24xx/include/plat/regs-spi.h
new file mode 100644
index 000000000000..2b35479ee35c
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/regs-spi.h
@@ -0,0 +1,82 @@
+/* arch/arm/mach-s3c2410/include/mach/regs-spi.h
+ *
+ * Copyright (c) 2004 Fetron GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2410 SPI register definition
+*/
+
+#ifndef __ASM_ARCH_REGS_SPI_H
+#define __ASM_ARCH_REGS_SPI_H
+
+#define S3C2410_SPI1    (0x20)
+#define S3C2412_SPI1    (0x100)
+
+#define S3C2410_SPCON   (0x00)
+
+#define S3C2412_SPCON_RXFIFO_RB2        (0<<14)
+#define S3C2412_SPCON_RXFIFO_RB4        (1<<14)
+#define S3C2412_SPCON_RXFIFO_RB12       (2<<14)
+#define S3C2412_SPCON_RXFIFO_RB14       (3<<14)
+#define S3C2412_SPCON_TXFIFO_RB2        (0<<12)
+#define S3C2412_SPCON_TXFIFO_RB4        (1<<12)
+#define S3C2412_SPCON_TXFIFO_RB12       (2<<12)
+#define S3C2412_SPCON_TXFIFO_RB14       (3<<12)
+#define S3C2412_SPCON_RXFIFO_RESET      (1<<11) /* RxFIFO reset */
+#define S3C2412_SPCON_TXFIFO_RESET      (1<<10) /* TxFIFO reset */
+#define S3C2412_SPCON_RXFIFO_EN         (1<<9)  /* RxFIFO Enable */
+#define S3C2412_SPCON_TXFIFO_EN         (1<<8)  /* TxFIFO Enable */
+
+#define S3C2412_SPCON_DIRC_RX     (1<<7)
+
+#define S3C2410_SPCON_SMOD_DMA    (2<<5)        /* DMA mode */
+#define S3C2410_SPCON_SMOD_INT    (1<<5)        /* interrupt mode */
+#define S3C2410_SPCON_SMOD_POLL   (0<<5)        /* polling mode */
+#define S3C2410_SPCON_ENSCK       (1<<4)        /* Enable SCK */
+#define S3C2410_SPCON_MSTR        (1<<3)        /* Master/Slave select
+                                                   0: slave, 1: master */
+#define S3C2410_SPCON_CPOL_HIGH   (1<<2)        /* Clock polarity select */
+#define S3C2410_SPCON_CPOL_LOW    (0<<2)        /* Clock polarity select */
+
+#define S3C2410_SPCON_CPHA_FMTB   (1<<1)        /* Clock Phase Select */
+#define S3C2410_SPCON_CPHA_FMTA   (0<<1)        /* Clock Phase Select */
+
+#define S3C2410_SPCON_TAGD        (1<<0)        /* Tx auto garbage data mode */
+
+
+#define S3C2410_SPSTA    (0x04)
+
+#define S3C2412_SPSTA_RXFIFO_AE         (1<<11)
+#define S3C2412_SPSTA_TXFIFO_AE         (1<<10)
+#define S3C2412_SPSTA_RXFIFO_ERROR      (1<<9)
+#define S3C2412_SPSTA_TXFIFO_ERROR      (1<<8)
+#define S3C2412_SPSTA_RXFIFO_FIFO       (1<<7)
+#define S3C2412_SPSTA_RXFIFO_EMPTY      (1<<6)
+#define S3C2412_SPSTA_TXFIFO_NFULL      (1<<5)
+#define S3C2412_SPSTA_TXFIFO_EMPTY      (1<<4)
+
+#define S3C2410_SPSTA_DCOL        (1<<2)        /* Data Collision Error */
+#define S3C2410_SPSTA_MULD        (1<<1)        /* Multi Master Error */
+#define S3C2410_SPSTA_READY       (1<<0)        /* Data Tx/Rx ready */
+#define S3C2412_SPSTA_READY_ORG   (1<<3)
+
+#define S3C2410_SPPIN    (0x08)
+
+#define S3C2410_SPPIN_ENMUL       (1<<2)        /* Multi Master Error detect */
+#define S3C2410_SPPIN_RESERVED    (1<<1)
+#define S3C2400_SPPIN_nCS         (1<<1)        /* SPI Card Select */
+#define S3C2410_SPPIN_KEEP        (1<<0)        /* Master Out keep */
+
+#define S3C2410_SPPRE    (0x0C)
+#define S3C2410_SPTDAT   (0x10)
+#define S3C2410_SPRDAT   (0x14)
+
+#define S3C2412_TXFIFO   (0x18)
+#define S3C2412_RXFIFO   (0x18)
+#define S3C2412_SPFIC    (0x24)
+
+
+#endif /* __ASM_ARCH_REGS_SPI_H */
diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-udc.h b/arch/arm/plat-s3c24xx/include/plat/regs-udc.h
new file mode 100644
index 000000000000..f0dd4a41b37b
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/regs-udc.h
@@ -0,0 +1,153 @@
+/* arch/arm/mach-s3c2410/include/mach/regs-udc.h
+ *
+ * Copyright (C) 2004 Herbert Poetzl <herbert@13thfloor.at>
+ *
+ * This include file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+*/
+
+#ifndef __ASM_ARCH_REGS_UDC_H
+#define __ASM_ARCH_REGS_UDC_H
+
+#define S3C2410_USBDREG(x) (x)
+
+#define S3C2410_UDC_FUNC_ADDR_REG       S3C2410_USBDREG(0x0140)
+#define S3C2410_UDC_PWR_REG             S3C2410_USBDREG(0x0144)
+#define S3C2410_UDC_EP_INT_REG          S3C2410_USBDREG(0x0148)
+
+#define S3C2410_UDC_USB_INT_REG         S3C2410_USBDREG(0x0158)
+#define S3C2410_UDC_EP_INT_EN_REG       S3C2410_USBDREG(0x015c)
+
+#define S3C2410_UDC_USB_INT_EN_REG      S3C2410_USBDREG(0x016c)
+
+#define S3C2410_UDC_FRAME_NUM1_REG      S3C2410_USBDREG(0x0170)
+#define S3C2410_UDC_FRAME_NUM2_REG      S3C2410_USBDREG(0x0174)
+
+#define S3C2410_UDC_EP0_FIFO_REG        S3C2410_USBDREG(0x01c0)
+#define S3C2410_UDC_EP1_FIFO_REG        S3C2410_USBDREG(0x01c4)
+#define S3C2410_UDC_EP2_FIFO_REG        S3C2410_USBDREG(0x01c8)
+#define S3C2410_UDC_EP3_FIFO_REG        S3C2410_USBDREG(0x01cc)
+#define S3C2410_UDC_EP4_FIFO_REG        S3C2410_USBDREG(0x01d0)
+
+#define S3C2410_UDC_EP1_DMA_CON         S3C2410_USBDREG(0x0200)
+#define S3C2410_UDC_EP1_DMA_UNIT        S3C2410_USBDREG(0x0204)
+#define S3C2410_UDC_EP1_DMA_FIFO        S3C2410_USBDREG(0x0208)
+#define S3C2410_UDC_EP1_DMA_TTC_L       S3C2410_USBDREG(0x020c)
+#define S3C2410_UDC_EP1_DMA_TTC_M       S3C2410_USBDREG(0x0210)
+#define S3C2410_UDC_EP1_DMA_TTC_H       S3C2410_USBDREG(0x0214)
+
+#define S3C2410_UDC_EP2_DMA_CON         S3C2410_USBDREG(0x0218)
+#define S3C2410_UDC_EP2_DMA_UNIT        S3C2410_USBDREG(0x021c)
+#define S3C2410_UDC_EP2_DMA_FIFO        S3C2410_USBDREG(0x0220)
+#define S3C2410_UDC_EP2_DMA_TTC_L       S3C2410_USBDREG(0x0224)
+#define S3C2410_UDC_EP2_DMA_TTC_M       S3C2410_USBDREG(0x0228)
+#define S3C2410_UDC_EP2_DMA_TTC_H       S3C2410_USBDREG(0x022c)
+
+#define S3C2410_UDC_EP3_DMA_CON         S3C2410_USBDREG(0x0240)
+#define S3C2410_UDC_EP3_DMA_UNIT        S3C2410_USBDREG(0x0244)
+#define S3C2410_UDC_EP3_DMA_FIFO        S3C2410_USBDREG(0x0248)
+#define S3C2410_UDC_EP3_DMA_TTC_L       S3C2410_USBDREG(0x024c)
+#define S3C2410_UDC_EP3_DMA_TTC_M       S3C2410_USBDREG(0x0250)
+#define S3C2410_UDC_EP3_DMA_TTC_H       S3C2410_USBDREG(0x0254)
+
+#define S3C2410_UDC_EP4_DMA_CON         S3C2410_USBDREG(0x0258)
+#define S3C2410_UDC_EP4_DMA_UNIT        S3C2410_USBDREG(0x025c)
+#define S3C2410_UDC_EP4_DMA_FIFO        S3C2410_USBDREG(0x0260)
+#define S3C2410_UDC_EP4_DMA_TTC_L       S3C2410_USBDREG(0x0264)
+#define S3C2410_UDC_EP4_DMA_TTC_M       S3C2410_USBDREG(0x0268)
+#define S3C2410_UDC_EP4_DMA_TTC_H       S3C2410_USBDREG(0x026c)
+
+#define S3C2410_UDC_INDEX_REG           S3C2410_USBDREG(0x0178)
+
+/* indexed registers */
+
+#define S3C2410_UDC_MAXP_REG            S3C2410_USBDREG(0x0180)
+
+#define S3C2410_UDC_EP0_CSR_REG         S3C2410_USBDREG(0x0184)
+
+#define S3C2410_UDC_IN_CSR1_REG         S3C2410_USBDREG(0x0184)
+#define S3C2410_UDC_IN_CSR2_REG         S3C2410_USBDREG(0x0188)
+
+#define S3C2410_UDC_OUT_CSR1_REG        S3C2410_USBDREG(0x0190)
+#define S3C2410_UDC_OUT_CSR2_REG        S3C2410_USBDREG(0x0194)
+#define S3C2410_UDC_OUT_FIFO_CNT1_REG   S3C2410_USBDREG(0x0198)
+#define S3C2410_UDC_OUT_FIFO_CNT2_REG   S3C2410_USBDREG(0x019c)
+
+#define S3C2410_UDC_FUNCADDR_UPDATE     (1<<7)
+
+#define S3C2410_UDC_PWR_ISOUP           (1<<7) // R/W
+#define S3C2410_UDC_PWR_RESET           (1<<3) // R
+#define S3C2410_UDC_PWR_RESUME          (1<<2) // R/W
+#define S3C2410_UDC_PWR_SUSPEND         (1<<1) // R
+#define S3C2410_UDC_PWR_ENSUSPEND       (1<<0) // R/W
+
+#define S3C2410_UDC_PWR_DEFAULT         0x00
+
+#define S3C2410_UDC_INT_EP4             (1<<4) // R/W (clear only)
+#define S3C2410_UDC_INT_EP3             (1<<3) // R/W (clear only)
+#define S3C2410_UDC_INT_EP2             (1<<2) // R/W (clear only)
+#define S3C2410_UDC_INT_EP1             (1<<1) // R/W (clear only)
+#define S3C2410_UDC_INT_EP0             (1<<0) // R/W (clear only)
+
+#define S3C2410_UDC_USBINT_RESET        (1<<2) // R/W (clear only)
+#define S3C2410_UDC_USBINT_RESUME       (1<<1) // R/W (clear only)
+#define S3C2410_UDC_USBINT_SUSPEND      (1<<0) // R/W (clear only)
+
+#define S3C2410_UDC_INTE_EP4            (1<<4) // R/W
+#define S3C2410_UDC_INTE_EP3            (1<<3) // R/W
+#define S3C2410_UDC_INTE_EP2            (1<<2) // R/W
+#define S3C2410_UDC_INTE_EP1            (1<<1) // R/W
+#define S3C2410_UDC_INTE_EP0            (1<<0) // R/W
+
+#define S3C2410_UDC_USBINTE_RESET       (1<<2) // R/W
+#define S3C2410_UDC_USBINTE_SUSPEND     (1<<0) // R/W
+
+
+#define S3C2410_UDC_INDEX_EP0           (0x00)
+#define S3C2410_UDC_INDEX_EP1           (0x01) // ??
+#define S3C2410_UDC_INDEX_EP2           (0x02) // ??
+#define S3C2410_UDC_INDEX_EP3           (0x03) // ??
+#define S3C2410_UDC_INDEX_EP4           (0x04) // ??
+
+#define S3C2410_UDC_ICSR1_CLRDT         (1<<6) // R/W
+#define S3C2410_UDC_ICSR1_SENTSTL       (1<<5) // R/W (clear only)
+#define S3C2410_UDC_ICSR1_SENDSTL       (1<<4) // R/W
+#define S3C2410_UDC_ICSR1_FFLUSH        (1<<3) // W   (set only)
+#define S3C2410_UDC_ICSR1_UNDRUN        (1<<2) // R/W (clear only)
+#define S3C2410_UDC_ICSR1_PKTRDY        (1<<0) // R/W (set only)
+
+#define S3C2410_UDC_ICSR2_AUTOSET       (1<<7) // R/W
+#define S3C2410_UDC_ICSR2_ISO           (1<<6) // R/W
+#define S3C2410_UDC_ICSR2_MODEIN        (1<<5) // R/W
+#define S3C2410_UDC_ICSR2_DMAIEN        (1<<4) // R/W
+
+#define S3C2410_UDC_OCSR1_CLRDT         (1<<7) // R/W
+#define S3C2410_UDC_OCSR1_SENTSTL       (1<<6) // R/W (clear only)
+#define S3C2410_UDC_OCSR1_SENDSTL       (1<<5) // R/W
+#define S3C2410_UDC_OCSR1_FFLUSH        (1<<4) // R/W
+#define S3C2410_UDC_OCSR1_DERROR        (1<<3) // R
+#define S3C2410_UDC_OCSR1_OVRRUN        (1<<2) // R/W (clear only)
+#define S3C2410_UDC_OCSR1_PKTRDY        (1<<0) // R/W (clear only)
+
+#define S3C2410_UDC_OCSR2_AUTOCLR       (1<<7) // R/W
+#define S3C2410_UDC_OCSR2_ISO           (1<<6) // R/W
+#define S3C2410_UDC_OCSR2_DMAIEN        (1<<5) // R/W
+
+#define S3C2410_UDC_EP0_CSR_OPKRDY      (1<<0)
+#define S3C2410_UDC_EP0_CSR_IPKRDY      (1<<1)
+#define S3C2410_UDC_EP0_CSR_SENTSTL     (1<<2)
+#define S3C2410_UDC_EP0_CSR_DE          (1<<3)
+#define S3C2410_UDC_EP0_CSR_SE          (1<<4)
+#define S3C2410_UDC_EP0_CSR_SENDSTL     (1<<5)
+#define S3C2410_UDC_EP0_CSR_SOPKTRDY    (1<<6)
+#define S3C2410_UDC_EP0_CSR_SSE (1<<7)
+
+#define S3C2410_UDC_MAXP_8              (1<<0)
+#define S3C2410_UDC_MAXP_16             (1<<1)
+#define S3C2410_UDC_MAXP_32             (1<<2)
+#define S3C2410_UDC_MAXP_64             (1<<3)
+
+
+#endif
diff --git a/arch/arm/plat-s3c24xx/include/plat/udc.h b/arch/arm/plat-s3c24xx/include/plat/udc.h
new file mode 100644
index 000000000000..546bb4008f49
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/udc.h
@@ -0,0 +1,36 @@
+/* arch/arm/mach-s3c2410/include/mach/udc.h
+ *
+ * Copyright (c) 2005 Arnaud Patard <arnaud.patard@rtp-net.org>
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *
+ *  Changelog:
+ *      14-Mar-2005     RTP     Created file
+ *      02-Aug-2005     RTP     File rename
+ *      07-Sep-2005     BJD     Minor cleanups, changed cmd to enum
+ *      18-Jan-2007     HMW     Add per-platform vbus_draw function
+*/
+
+#ifndef __ASM_ARM_ARCH_UDC_H
+#define __ASM_ARM_ARCH_UDC_H
+
+enum s3c2410_udc_cmd_e {
+        S3C2410_UDC_P_ENABLE    = 1,    /* Pull-up enable        */
+        S3C2410_UDC_P_DISABLE   = 2,    /* Pull-up disable       */
+        S3C2410_UDC_P_RESET     = 3,    /* UDC reset, in case of */
+};
+
+struct s3c2410_udc_mach_info {
+        void    (*udc_command)(enum s3c2410_udc_cmd_e);
+        void    (*vbus_draw)(unsigned int ma);
+        unsigned int vbus_pin;
+        unsigned char vbus_pin_inverted;
+};
+
+extern void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *);
+
+#endif /* __ASM_ARM_ARCH_UDC_H */
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 43aa2020f85c..fd23c0e9e698 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
 #
 #   http://www.arm.linux.org.uk/developer/machines/?action=new
 #
-# Last update: Thu Sep 25 10:10:50 2008
+# Last update: Sun Nov 30 16:39:36 2008
 #
 # machine_is_xxx        CONFIG_xxxx             MACH_TYPE_xxx           number
 #
@@ -1380,7 +1380,7 @@ holon			MACH_HOLON		HOLON			1377
 olip8                   MACH_OLIP8              OLIP8                   1378
 ghi270hg                MACH_GHI270HG           GHI270HG                1379
 davinci_dm6467_evm      MACH_DAVINCI_DM6467_EVM DAVINCI_DM6467_EVM      1380
-davinci_dm355_evm       MACH_DAVINCI_DM350_EVM  DAVINCI_DM350_EVM       1381
+davinci_dm355_evm       MACH_DAVINCI_DM355_EVM  DAVINCI_DM355_EVM       1381
 blackriver              MACH_BLACKRIVER         BLACKRIVER              1383
 sandgate_wp             MACH_SANDGATEWP         SANDGATEWP              1384
 cdotbwsg                MACH_CDOTBWSG           CDOTBWSG                1385
@@ -1771,7 +1771,7 @@ axs_ultrax		MACH_AXS_ULTRAX		AXS_ULTRAX		1779
 at572d940deb            MACH_AT572D940DEB       AT572D940DEB            1780
 davinci_da8xx_evm       MACH_DAVINCI_DA8XX_EVM  DAVINCI_DA8XX_EVM       1781
 ep9302                  MACH_EP9302             EP9302                  1782
-at572d940hfeb           MACH_AT572D940HFEB      AT572D940HFEB           1783
+at572d940hfek           MACH_AT572D940HFEB      AT572D940HFEB           1783
 cybook3                 MACH_CYBOOK3            CYBOOK3                 1784
 wdg002                  MACH_WDG002             WDG002                  1785
 sg560adsl               MACH_SG560ADSL          SG560ADSL               1786
@@ -1899,3 +1899,98 @@ rut100			MACH_RUT100		RUT100			1908
 asusp535                MACH_ASUSP535           ASUSP535                1909
 htcraphael              MACH_HTCRAPHAEL         HTCRAPHAEL              1910
 sygdg1                  MACH_SYGDG1             SYGDG1                  1911
+sygdg2                  MACH_SYGDG2             SYGDG2                  1912
+seoul                   MACH_SEOUL              SEOUL                   1913
+salerno                 MACH_SALERNO            SALERNO                 1914
+ucn_s3c64xx             MACH_UCN_S3C64XX        UCN_S3C64XX             1915
+msm7201a                MACH_MSM7201A           MSM7201A                1916
+lpr1                    MACH_LPR1               LPR1                    1917
+armadillo500fx          MACH_ARMADILLO500FX     ARMADILLO500FX          1918
+g3evm                   MACH_G3EVM              G3EVM                   1919
+z3_dm355                MACH_Z3_DM355           Z3_DM355                1920
+w90p910evb              MACH_W90P910EVB         W90P910EVB              1921
+w90p920evb              MACH_W90P920EVB         W90P920EVB              1922
+w90p950evb              MACH_W90P950EVB         W90P950EVB              1923
+w90n960evb              MACH_W90N960EVB         W90N960EVB              1924
+camhd                   MACH_CAMHD              CAMHD                   1925
+mvc100                  MACH_MVC100             MVC100                  1926
+electrum_200            MACH_ELECTRUM_200       ELECTRUM_200            1927
+htcjade                 MACH_HTCJADE            HTCJADE                 1928
+memphis                 MACH_MEMPHIS            MEMPHIS                 1929
+imx27sbc                MACH_IMX27SBC           IMX27SBC                1930
+lextar                  MACH_LEXTAR             LEXTAR                  1931
+mv88f6281gtw_ge         MACH_MV88F6281GTW_GE    MV88F6281GTW_GE         1932
+ncp                     MACH_NCP                NCP                     1933
+z32an_series            MACH_Z32AN              Z32AN                   1934
+tmq_capd                MACH_TMQ_CAPD           TMQ_CAPD                1935
+omap3_wl                MACH_OMAP3_WL           OMAP3_WL                1936
+chumby                  MACH_CHUMBY             CHUMBY                  1937
+atsarm9                 MACH_ATSARM9            ATSARM9                 1938
+davinci_dm365_evm       MACH_DAVINCI_DM365_EVM  DAVINCI_DM365_EVM       1939
+bahamas                 MACH_BAHAMAS            BAHAMAS                 1940
+das                     MACH_DAS                DAS                     1941
+minidas                 MACH_MINIDAS            MINIDAS                 1942
+vk1000                  MACH_VK1000             VK1000                  1943
+centro                  MACH_CENTRO             CENTRO                  1944
+ctera_2bay              MACH_CTERA_2BAY         CTERA_2BAY              1945
+edgeconnect             MACH_EDGECONNECT        EDGECONNECT             1946
+nd27000                 MACH_ND27000            ND27000                 1947
+cobra                   MACH_GEMALTO_COBRA      GEMALTO_COBRA           1948
+ingelabs_comet          MACH_INGELABS_COMET     INGELABS_COMET          1949
+pollux_wiz              MACH_POLLUX_WIZ         POLLUX_WIZ              1950
+blackstone              MACH_BLACKSTONE         BLACKSTONE              1951
+topaz                   MACH_TOPAZ              TOPAZ                   1952
+aixle                   MACH_AIXLE              AIXLE                   1953
+mw998                   MACH_MW998              MW998                   1954
+nokia_rx51              MACH_NOKIA_RX51         NOKIA_RX51              1955
+vsc5605ev               MACH_VSC5605EV          VSC5605EV               1956
+nt98700dk               MACH_NT98700DK          NT98700DK               1957
+icontact                MACH_ICONTACT           ICONTACT                1958
+swarco_frcpu            MACH_SWARCO_FRCPU       SWARCO_FRCPU            1959
+swarco_scpu             MACH_SWARCO_SCPU        SWARCO_SCPU             1960
+bbox_p16                MACH_BBOX_P16           BBOX_P16                1961
+bstd                    MACH_BSTD               BSTD                    1962
+sbc2440ii               MACH_SBC2440II          SBC2440II               1963
+pcm034                  MACH_PCM034             PCM034                  1964
+neso                    MACH_NESO               NESO                    1965
+wlnx_9g20               MACH_WLNX_9G20          WLNX_9G20               1966
+omap_zoom2              MACH_OMAP_ZOOM2         OMAP_ZOOM2              1967
+totemnova               MACH_TOTEMNOVA          TOTEMNOVA               1968
+c5000                   MACH_C5000              C5000                   1969
+unipo_at91sam9263       MACH_UNIPO_AT91SAM9263  UNIPO_AT91SAM9263       1970
+ethernut5               MACH_ETHERNUT5          ETHERNUT5               1971
+arm11                   MACH_ARM11              ARM11                   1972
+cpuat9260               MACH_CPUAT9260          CPUAT9260               1973
+cpupxa255               MACH_CPUPXA255          CPUPXA255               1974
+cpuimx27                MACH_CPUIMX27           CPUIMX27                1975
+cheflux                 MACH_CHEFLUX            CHEFLUX                 1976
+eb_cpux9k2              MACH_EB_CPUX9K2         EB_CPUX9K2              1977
+opcotec                 MACH_OPCOTEC            OPCOTEC                 1978
+yt                      MACH_YT                 YT                      1979
+motoq                   MACH_MOTOQ              MOTOQ                   1980
+bsb1                    MACH_BSB1               BSB1                    1981
+acs5k                   MACH_ACS5K              ACS5K                   1982
+milan                   MACH_MILAN              MILAN                   1983
+quartzv2                MACH_QUARTZV2           QUARTZV2                1984
+rsvp                    MACH_RSVP               RSVP                    1985
+rmp200                  MACH_RMP200             RMP200                  1986
+snapper_9260            MACH_SNAPPER_9260       SNAPPER_9260            1987
+dsm320                  MACH_DSM320             DSM320                  1988
+adsgcm                  MACH_ADSGCM             ADSGCM                  1989
+ase2_400                MACH_ASE2_400           ASE2_400                1990
+pizza                   MACH_PIZZA              PIZZA                   1991
+spot_ngpl               MACH_SPOT_NGPL          SPOT_NGPL               1992
+armata                  MACH_ARMATA             ARMATA                  1993
+exeda                   MACH_EXEDA              EXEDA                   1994
+mx31sf005               MACH_MX31SF005          MX31SF005               1995
+f5d8231_4_v2            MACH_F5D8231_4_V2       F5D8231_4_V2            1996
+q2440                   MACH_Q2440              Q2440                   1997
+qq2440                  MACH_QQ2440             QQ2440                  1998
+mini2440                MACH_MINI2440           MINI2440                1999
+colibri300              MACH_COLIBRI300         COLIBRI300              2000
+jades                   MACH_JADES              JADES                   2001
+spark                   MACH_SPARK              SPARK                   2002
+benzina                 MACH_BENZINA            BENZINA                 2003
+blaze                   MACH_BLAZE              BLAZE                   2004
+linkstation_ls_hgl      MACH_LINKSTATION_LS_HGL LINKSTATION_LS_HGL      2005
+htcvenus                MACH_HTCVENUS           HTCVENUS                2006
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S
index a62dcf7098ba..3c73aafe3e01 100644
--- a/arch/arm/vfp/vfphw.S
+++ b/arch/arm/vfp/vfphw.S
@@ -101,9 +101,12 @@ ENTRY(vfp_support_entry)
         VFPFSTMIA r4, r5                @ save the working registers
         VFPFMRX r5, FPSCR               @ current status
         tst     r1, #FPEXC_EX           @ is there additional state to save?
-        VFPFMRX r6, FPINST, NE          @ FPINST (only if FPEXC.EX is set)
-        tstne   r1, #FPEXC_FP2V         @ is there an FPINST2 to read?
-        VFPFMRX r8, FPINST2, NE         @ FPINST2 if needed (and present)
+        beq     1f
+        VFPFMRX r6, FPINST              @ FPINST (only if FPEXC.EX is set)
+        tst     r1, #FPEXC_FP2V         @ is there an FPINST2 to read?
+        beq     1f
+        VFPFMRX r8, FPINST2             @ FPINST2 if needed (and present)
+1:
         stmia   r4, {r1, r5, r6, r8}    @ save FPEXC, FPSCR, FPINST, FPINST2
                                         @ and point r4 at the word at the
                                         @ start of the register dump
@@ -117,9 +120,12 @@ no_old_VFP_process:
                                         @ FPEXC is in a safe state
         ldmia   r10, {r1, r5, r6, r8}   @ load FPEXC, FPSCR, FPINST, FPINST2
         tst     r1, #FPEXC_EX           @ is there additional state to restore?
-        VFPFMXR FPINST, r6, NE          @ restore FPINST (only if FPEXC.EX is set)
-        tstne   r1, #FPEXC_FP2V         @ is there an FPINST2 to write?
-        VFPFMXR FPINST2, r8, NE         @ FPINST2 if needed (and present)
+        beq     1f
+        VFPFMXR FPINST, r6              @ restore FPINST (only if FPEXC.EX is set)
+        tst     r1, #FPEXC_FP2V         @ is there an FPINST2 to write?
+        beq     1f
+        VFPFMXR FPINST2, r8             @ FPINST2 if needed (and present)
+1:
         VFPFMXR FPSCR, r5               @ restore status
 
 check_for_exception:
@@ -175,9 +181,12 @@ ENTRY(vfp_save_state)
         VFPFSTMIA r0, r2                @ save the working registers
         VFPFMRX r2, FPSCR               @ current status
         tst     r1, #FPEXC_EX           @ is there additional state to save?
-        VFPFMRX r3, FPINST, NE          @ FPINST (only if FPEXC.EX is set)
-        tstne   r1, #FPEXC_FP2V         @ is there an FPINST2 to read?
-        VFPFMRX r12, FPINST2, NE        @ FPINST2 if needed (and present)
+        beq     1f
+        VFPFMRX r3, FPINST              @ FPINST (only if FPEXC.EX is set)
+        tst     r1, #FPEXC_FP2V         @ is there an FPINST2 to read?
+        beq     1f
+        VFPFMRX r12, FPINST2            @ FPINST2 if needed (and present)
+1:
         stmia   r0, {r1, r2, r3, r12}   @ save FPEXC, FPSCR, FPINST, FPINST2
         mov     pc, lr
 ENDPROC(vfp_save_state)
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index c0d2c9bb952b..67ca340a7c85 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -371,6 +371,15 @@ static int __init vfp_init(void)
                  * in place; report VFP support to userspace.
                  */
                 elf_hwcap |= HWCAP_VFP;
+#ifdef CONFIG_NEON
+                /*
+                 * Check for the presence of the Advanced SIMD
+                 * load/store instructions, integer and single
+                 * precision floating point operations.
+                 */
+                if ((fmrx(MVFR1) & 0x000fff00) == 0x00011100)
+                        elf_hwcap |= HWCAP_NEON;
+#endif
         }
         return 0;
 }