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-rw-r--r--arch/arm/Kconfig43
-rw-r--r--arch/arm/Makefile1
-rw-r--r--arch/arm/boot/compressed/Makefile6
-rw-r--r--arch/arm/boot/compressed/head-clps7500.S86
-rw-r--r--arch/arm/boot/compressed/misc.c2
-rw-r--r--arch/arm/common/Kconfig3
-rw-r--r--arch/arm/common/Makefile1
-rw-r--r--arch/arm/common/clkdev.c128
-rw-r--r--arch/arm/common/sharpsl_pm.c19
-rw-r--r--arch/arm/include/asm/clkdev.h30
-rw-r--r--arch/arm/include/asm/dma-mapping.h13
-rw-r--r--arch/arm/include/asm/ftrace.h2
-rw-r--r--arch/arm/include/asm/hardware/iomd.h41
-rw-r--r--arch/arm/include/asm/hardware/iop3xx-adma.h5
-rw-r--r--arch/arm/include/asm/hardware/iop_adma.h6
-rw-r--r--arch/arm/include/asm/mach/map.h13
-rw-r--r--arch/arm/include/asm/memory.h12
-rw-r--r--arch/arm/include/asm/page.h2
-rw-r--r--arch/arm/include/asm/processor.h2
-rw-r--r--arch/arm/include/asm/string.h9
-rw-r--r--arch/arm/include/asm/system.h4
-rw-r--r--arch/arm/include/asm/uaccess.h2
-rw-r--r--arch/arm/kernel/armksyms.c2
-rw-r--r--arch/arm/kernel/elf.c6
-rw-r--r--arch/arm/kernel/entry-common.S4
-rw-r--r--arch/arm/kernel/ftrace.c13
-rw-r--r--arch/arm/kernel/module.c8
-rw-r--r--arch/arm/lib/Makefile1
-rw-r--r--arch/arm/lib/memset.S2
-rw-r--r--arch/arm/mach-at91/Kconfig7
-rw-r--r--arch/arm/mach-at91/board-afeb-9260v1.c1
-rw-r--r--arch/arm/mach-at91/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-clps711x/include/mach/hardware.h22
-rw-r--r--arch/arm/mach-clps7500/Makefile11
-rw-r--r--arch/arm/mach-clps7500/Makefile.boot2
-rw-r--r--arch/arm/mach-clps7500/core.c395
-rw-r--r--arch/arm/mach-clps7500/include/mach/acornfb.h33
-rw-r--r--arch/arm/mach-clps7500/include/mach/debug-macro.S21
-rw-r--r--arch/arm/mach-clps7500/include/mach/dma.h21
-rw-r--r--arch/arm/mach-clps7500/include/mach/entry-macro.S16
-rw-r--r--arch/arm/mach-clps7500/include/mach/hardware.h67
-rw-r--r--arch/arm/mach-clps7500/include/mach/io.h255
-rw-r--r--arch/arm/mach-clps7500/include/mach/irq.h32
-rw-r--r--arch/arm/mach-clps7500/include/mach/irqs.h66
-rw-r--r--arch/arm/mach-clps7500/include/mach/memory.h43
-rw-r--r--arch/arm/mach-clps7500/include/mach/system.h23
-rw-r--r--arch/arm/mach-clps7500/include/mach/timex.h13
-rw-r--r--arch/arm/mach-clps7500/include/mach/uncompress.h35
-rw-r--r--arch/arm/mach-clps7500/include/mach/vmalloc.h4
-rw-r--r--arch/arm/mach-ep93xx/core.c6
-rw-r--r--arch/arm/mach-h720x/include/mach/boards.h6
-rw-r--r--arch/arm/mach-imx/include/mach/gpio.h3
-rw-r--r--arch/arm/mach-integrator/clock.c80
-rw-r--r--arch/arm/mach-integrator/clock.h25
-rw-r--r--arch/arm/mach-integrator/core.c35
-rw-r--r--arch/arm/mach-integrator/impd1.c26
-rw-r--r--arch/arm/mach-integrator/include/mach/clkdev.h25
-rw-r--r--arch/arm/mach-integrator/include/mach/platform.h19
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c18
-rw-r--r--arch/arm/mach-iop13xx/include/mach/adma.h3
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/gpio.h3
-rw-r--r--arch/arm/mach-ks8695/include/mach/gpio.h3
-rw-r--r--arch/arm/mach-mx3/mx31ads.c2
-rw-r--r--arch/arm/mach-mx3/pcm037.c4
-rw-r--r--arch/arm/mach-ns9xxx/gpio.c2
-rw-r--r--arch/arm/mach-omap1/Kconfig3
-rw-r--r--arch/arm/mach-omap2/gpmc.c6
-rw-r--r--arch/arm/mach-orion5x/gpio.c2
-rw-r--r--arch/arm/mach-pxa/Kconfig3
-rw-r--r--arch/arm/mach-pxa/clock.c66
-rw-r--r--arch/arm/mach-pxa/clock.h59
-rw-r--r--arch/arm/mach-pxa/corgi_pm.c4
-rw-r--r--arch/arm/mach-pxa/include/mach/clkdev.h7
-rw-r--r--arch/arm/mach-pxa/include/mach/pxafb.h1
-rw-r--r--arch/arm/mach-pxa/include/mach/sharpsl.h1
-rw-r--r--arch/arm/mach-pxa/pwm.c2
-rw-r--r--arch/arm/mach-pxa/pxa25x.c71
-rw-r--r--arch/arm/mach-pxa/pxa27x.c89
-rw-r--r--arch/arm/mach-pxa/pxa300.c18
-rw-r--r--arch/arm/mach-pxa/pxa320.c8
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c87
-rw-r--r--arch/arm/mach-pxa/reset.c7
-rw-r--r--arch/arm/mach-pxa/spitz.c16
-rw-r--r--arch/arm/mach-pxa/spitz_pm.c4
-rw-r--r--arch/arm/mach-pxa/ssp.c2
-rw-r--r--arch/arm/mach-realview/Kconfig2
-rw-r--r--arch/arm/mach-realview/clock.c80
-rw-r--r--arch/arm/mach-realview/clock.h6
-rw-r--r--arch/arm/mach-realview/core.c52
-rw-r--r--arch/arm/mach-realview/core.h1
-rw-r--r--arch/arm/mach-realview/include/mach/clkdev.h7
-rw-r--r--arch/arm/mach-realview/include/mach/platform.h19
-rw-r--r--arch/arm/mach-realview/realview_eb.c2
-rw-r--r--arch/arm/mach-realview/realview_pb1176.c2
-rw-r--r--arch/arm/mach-realview/realview_pb11mp.c2
-rw-r--r--arch/arm/mach-s3c2410/Kconfig1
-rw-r--r--arch/arm/mach-s3c2412/Kconfig1
-rw-r--r--arch/arm/mach-s3c2440/Kconfig1
-rw-r--r--arch/arm/mach-s3c2442/Kconfig1
-rw-r--r--arch/arm/mach-sa1100/clock.c100
-rw-r--r--arch/arm/mach-versatile/Kconfig2
-rw-r--r--arch/arm/mach-versatile/clock.c80
-rw-r--r--arch/arm/mach-versatile/clock.h7
-rw-r--r--arch/arm/mach-versatile/core.c56
-rw-r--r--arch/arm/mach-versatile/include/mach/clkdev.h7
-rw-r--r--arch/arm/mach-versatile/include/mach/platform.h18
-rw-r--r--arch/arm/mm/Kconfig65
-rw-r--r--arch/arm/mm/cache-feroceon-l2.c4
-rw-r--r--arch/arm/mm/cache-xsc3l2.c4
-rw-r--r--arch/arm/mm/mmu.c119
-rw-r--r--arch/arm/mm/pgd.c2
-rw-r--r--arch/arm/mm/proc-v7.S12
-rw-r--r--arch/arm/mm/proc-xsc3.S2
-rw-r--r--arch/arm/plat-iop/setup.c5
-rw-r--r--arch/arm/plat-mxc/Kconfig2
-rw-r--r--arch/arm/plat-mxc/gpio.c2
-rw-r--r--arch/arm/plat-mxc/include/mach/io.h20
-rw-r--r--arch/arm/plat-omap/Kconfig2
-rw-r--r--arch/arm/plat-omap/clock.c20
-rw-r--r--arch/arm/plat-omap/include/mach/entry-macro.S4
-rw-r--r--arch/arm/plat-omap/include/mach/irqs.h2
121 files changed, 940 insertions, 2023 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5021db2217ed..29759cd25553 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -16,8 +16,7 @@ config ARM
16 select HAVE_ARCH_KGDB 16 select HAVE_ARCH_KGDB
17 select HAVE_KPROBES if (!XIP_KERNEL) 17 select HAVE_KPROBES if (!XIP_KERNEL)
18 select HAVE_KRETPROBES if (HAVE_KPROBES) 18 select HAVE_KRETPROBES if (HAVE_KPROBES)
19 select HAVE_FTRACE if (!XIP_KERNEL) 19 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
20 select HAVE_DYNAMIC_FTRACE if (HAVE_FTRACE)
21 select HAVE_GENERIC_DMA_COHERENT 20 select HAVE_GENERIC_DMA_COHERENT
22 help 21 help
23 The ARM series is a line of low-power-consumption RISC chip designs 22 The ARM series is a line of low-power-consumption RISC chip designs
@@ -202,6 +201,7 @@ choice
202 201
203config ARCH_AAEC2000 202config ARCH_AAEC2000
204 bool "Agilent AAEC-2000 based" 203 bool "Agilent AAEC-2000 based"
204 select CPU_ARM920T
205 select ARM_AMBA 205 select ARM_AMBA
206 select HAVE_CLK 206 select HAVE_CLK
207 help 207 help
@@ -211,6 +211,7 @@ config ARCH_INTEGRATOR
211 bool "ARM Ltd. Integrator family" 211 bool "ARM Ltd. Integrator family"
212 select ARM_AMBA 212 select ARM_AMBA
213 select HAVE_CLK 213 select HAVE_CLK
214 select COMMON_CLKDEV
214 select ICST525 215 select ICST525
215 help 216 help
216 Support for ARM's Integrator platform. 217 Support for ARM's Integrator platform.
@@ -219,6 +220,7 @@ config ARCH_REALVIEW
219 bool "ARM Ltd. RealView family" 220 bool "ARM Ltd. RealView family"
220 select ARM_AMBA 221 select ARM_AMBA
221 select HAVE_CLK 222 select HAVE_CLK
223 select COMMON_CLKDEV
222 select ICST307 224 select ICST307
223 select GENERIC_TIME 225 select GENERIC_TIME
224 select GENERIC_CLOCKEVENTS 226 select GENERIC_CLOCKEVENTS
@@ -230,6 +232,7 @@ config ARCH_VERSATILE
230 select ARM_AMBA 232 select ARM_AMBA
231 select ARM_VIC 233 select ARM_VIC
232 select HAVE_CLK 234 select HAVE_CLK
235 select COMMON_CLKDEV
233 select ICST307 236 select ICST307
234 select GENERIC_TIME 237 select GENERIC_TIME
235 select GENERIC_CLOCKEVENTS 238 select GENERIC_CLOCKEVENTS
@@ -244,22 +247,15 @@ config ARCH_AT91
244 This enables support for systems based on the Atmel AT91RM9200, 247 This enables support for systems based on the Atmel AT91RM9200,
245 AT91SAM9 and AT91CAP9 processors. 248 AT91SAM9 and AT91CAP9 processors.
246 249
247config ARCH_CLPS7500
248 bool "Cirrus CL-PS7500FE"
249 select TIMER_ACORN
250 select ISA
251 select NO_IOPORT
252 select ARCH_SPARSEMEM_ENABLE
253 help
254 Support for the Cirrus Logic PS7500FE system-on-a-chip.
255
256config ARCH_CLPS711X 250config ARCH_CLPS711X
257 bool "Cirrus Logic CLPS711x/EP721x-based" 251 bool "Cirrus Logic CLPS711x/EP721x-based"
252 select CPU_ARM720T
258 help 253 help
259 Support for Cirrus Logic 711x/721x based boards. 254 Support for Cirrus Logic 711x/721x based boards.
260 255
261config ARCH_EBSA110 256config ARCH_EBSA110
262 bool "EBSA-110" 257 bool "EBSA-110"
258 select CPU_SA110
263 select ISA 259 select ISA
264 select NO_IOPORT 260 select NO_IOPORT
265 help 261 help
@@ -270,6 +266,7 @@ config ARCH_EBSA110
270 266
271config ARCH_EP93XX 267config ARCH_EP93XX
272 bool "EP93xx-based" 268 bool "EP93xx-based"
269 select CPU_ARM920T
273 select ARM_AMBA 270 select ARM_AMBA
274 select ARM_VIC 271 select ARM_VIC
275 select GENERIC_GPIO 272 select GENERIC_GPIO
@@ -280,6 +277,7 @@ config ARCH_EP93XX
280 277
281config ARCH_FOOTBRIDGE 278config ARCH_FOOTBRIDGE
282 bool "FootBridge" 279 bool "FootBridge"
280 select CPU_SA110
283 select FOOTBRIDGE 281 select FOOTBRIDGE
284 help 282 help
285 Support for systems based on the DC21285 companion chip 283 Support for systems based on the DC21285 companion chip
@@ -287,18 +285,21 @@ config ARCH_FOOTBRIDGE
287 285
288config ARCH_NETX 286config ARCH_NETX
289 bool "Hilscher NetX based" 287 bool "Hilscher NetX based"
288 select CPU_ARM926T
290 select ARM_VIC 289 select ARM_VIC
291 help 290 help
292 This enables support for systems based on the Hilscher NetX Soc 291 This enables support for systems based on the Hilscher NetX Soc
293 292
294config ARCH_H720X 293config ARCH_H720X
295 bool "Hynix HMS720x-based" 294 bool "Hynix HMS720x-based"
295 select CPU_ARM720T
296 select ISA_DMA_API 296 select ISA_DMA_API
297 help 297 help
298 This enables support for systems based on the Hynix HMS720x 298 This enables support for systems based on the Hynix HMS720x
299 299
300config ARCH_IMX 300config ARCH_IMX
301 bool "IMX" 301 bool "IMX"
302 select CPU_ARM920T
302 select GENERIC_GPIO 303 select GENERIC_GPIO
303 select GENERIC_TIME 304 select GENERIC_TIME
304 select GENERIC_CLOCKEVENTS 305 select GENERIC_CLOCKEVENTS
@@ -308,6 +309,7 @@ config ARCH_IMX
308config ARCH_IOP13XX 309config ARCH_IOP13XX
309 bool "IOP13xx-based" 310 bool "IOP13xx-based"
310 depends on MMU 311 depends on MMU
312 select CPU_XSC3
311 select PLAT_IOP 313 select PLAT_IOP
312 select PCI 314 select PCI
313 select ARCH_SUPPORTS_MSI 315 select ARCH_SUPPORTS_MSI
@@ -318,6 +320,7 @@ config ARCH_IOP13XX
318config ARCH_IOP32X 320config ARCH_IOP32X
319 bool "IOP32x-based" 321 bool "IOP32x-based"
320 depends on MMU 322 depends on MMU
323 select CPU_XSCALE
321 select PLAT_IOP 324 select PLAT_IOP
322 select PCI 325 select PCI
323 select GENERIC_GPIO 326 select GENERIC_GPIO
@@ -329,6 +332,7 @@ config ARCH_IOP32X
329config ARCH_IOP33X 332config ARCH_IOP33X
330 bool "IOP33x-based" 333 bool "IOP33x-based"
331 depends on MMU 334 depends on MMU
335 select CPU_XSCALE
332 select PLAT_IOP 336 select PLAT_IOP
333 select PCI 337 select PCI
334 select GENERIC_GPIO 338 select GENERIC_GPIO
@@ -339,6 +343,7 @@ config ARCH_IOP33X
339config ARCH_IXP23XX 343config ARCH_IXP23XX
340 bool "IXP23XX-based" 344 bool "IXP23XX-based"
341 depends on MMU 345 depends on MMU
346 select CPU_XSC3
342 select PCI 347 select PCI
343 help 348 help
344 Support for Intel's IXP23xx (XScale) family of processors. 349 Support for Intel's IXP23xx (XScale) family of processors.
@@ -346,6 +351,7 @@ config ARCH_IXP23XX
346config ARCH_IXP2000 351config ARCH_IXP2000
347 bool "IXP2400/2800-based" 352 bool "IXP2400/2800-based"
348 depends on MMU 353 depends on MMU
354 select CPU_XSCALE
349 select PCI 355 select PCI
350 help 356 help
351 Support for Intel's IXP2400/2800 (XScale) family of processors. 357 Support for Intel's IXP2400/2800 (XScale) family of processors.
@@ -353,6 +359,7 @@ config ARCH_IXP2000
353config ARCH_IXP4XX 359config ARCH_IXP4XX
354 bool "IXP4xx-based" 360 bool "IXP4xx-based"
355 depends on MMU 361 depends on MMU
362 select CPU_XSCALE
356 select GENERIC_GPIO 363 select GENERIC_GPIO
357 select GENERIC_TIME 364 select GENERIC_TIME
358 select GENERIC_CLOCKEVENTS 365 select GENERIC_CLOCKEVENTS
@@ -362,6 +369,7 @@ config ARCH_IXP4XX
362 369
363config ARCH_L7200 370config ARCH_L7200
364 bool "LinkUp-L7200" 371 bool "LinkUp-L7200"
372 select CPU_ARM720T
365 select FIQ 373 select FIQ
366 help 374 help
367 Say Y here if you intend to run this kernel on a LinkUp Systems 375 Say Y here if you intend to run this kernel on a LinkUp Systems
@@ -375,6 +383,7 @@ config ARCH_L7200
375 383
376config ARCH_KIRKWOOD 384config ARCH_KIRKWOOD
377 bool "Marvell Kirkwood" 385 bool "Marvell Kirkwood"
386 select CPU_FEROCEON
378 select PCI 387 select PCI
379 select GENERIC_TIME 388 select GENERIC_TIME
380 select GENERIC_CLOCKEVENTS 389 select GENERIC_CLOCKEVENTS
@@ -385,6 +394,7 @@ config ARCH_KIRKWOOD
385 394
386config ARCH_KS8695 395config ARCH_KS8695
387 bool "Micrel/Kendin KS8695" 396 bool "Micrel/Kendin KS8695"
397 select CPU_ARM922T
388 select GENERIC_GPIO 398 select GENERIC_GPIO
389 help 399 help
390 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based 400 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
@@ -392,6 +402,7 @@ config ARCH_KS8695
392 402
393config ARCH_NS9XXX 403config ARCH_NS9XXX
394 bool "NetSilicon NS9xxx" 404 bool "NetSilicon NS9xxx"
405 select CPU_ARM926T
395 select GENERIC_GPIO 406 select GENERIC_GPIO
396 select GENERIC_TIME 407 select GENERIC_TIME
397 select GENERIC_CLOCKEVENTS 408 select GENERIC_CLOCKEVENTS
@@ -404,6 +415,7 @@ config ARCH_NS9XXX
404 415
405config ARCH_LOKI 416config ARCH_LOKI
406 bool "Marvell Loki (88RC8480)" 417 bool "Marvell Loki (88RC8480)"
418 select CPU_FEROCEON
407 select GENERIC_TIME 419 select GENERIC_TIME
408 select GENERIC_CLOCKEVENTS 420 select GENERIC_CLOCKEVENTS
409 select PLAT_ORION 421 select PLAT_ORION
@@ -412,6 +424,7 @@ config ARCH_LOKI
412 424
413config ARCH_MV78XX0 425config ARCH_MV78XX0
414 bool "Marvell MV78xx0" 426 bool "Marvell MV78xx0"
427 select CPU_FEROCEON
415 select PCI 428 select PCI
416 select GENERIC_TIME 429 select GENERIC_TIME
417 select GENERIC_CLOCKEVENTS 430 select GENERIC_CLOCKEVENTS
@@ -433,6 +446,7 @@ config ARCH_MXC
433config ARCH_ORION5X 446config ARCH_ORION5X
434 bool "Marvell Orion" 447 bool "Marvell Orion"
435 depends on MMU 448 depends on MMU
449 select CPU_FEROCEON
436 select PCI 450 select PCI
437 select GENERIC_GPIO 451 select GENERIC_GPIO
438 select GENERIC_TIME 452 select GENERIC_TIME
@@ -445,6 +459,7 @@ config ARCH_ORION5X
445 459
446config ARCH_PNX4008 460config ARCH_PNX4008
447 bool "Philips Nexperia PNX4008 Mobile" 461 bool "Philips Nexperia PNX4008 Mobile"
462 select CPU_ARM926T
448 select HAVE_CLK 463 select HAVE_CLK
449 help 464 help
450 This enables support for Philips PNX4008 mobile platform. 465 This enables support for Philips PNX4008 mobile platform.
@@ -455,6 +470,7 @@ config ARCH_PXA
455 select ARCH_MTD_XIP 470 select ARCH_MTD_XIP
456 select GENERIC_GPIO 471 select GENERIC_GPIO
457 select HAVE_CLK 472 select HAVE_CLK
473 select COMMON_CLKDEV
458 select ARCH_REQUIRE_GPIOLIB 474 select ARCH_REQUIRE_GPIOLIB
459 select GENERIC_TIME 475 select GENERIC_TIME
460 select GENERIC_CLOCKEVENTS 476 select GENERIC_CLOCKEVENTS
@@ -478,6 +494,7 @@ config ARCH_RPC
478 494
479config ARCH_SA1100 495config ARCH_SA1100
480 bool "SA1100-based" 496 bool "SA1100-based"
497 select CPU_SA1100
481 select ISA 498 select ISA
482 select ARCH_SPARSEMEM_ENABLE 499 select ARCH_SPARSEMEM_ENABLE
483 select ARCH_MTD_XIP 500 select ARCH_MTD_XIP
@@ -501,6 +518,7 @@ config ARCH_S3C2410
501 518
502config ARCH_SHARK 519config ARCH_SHARK
503 bool "Shark" 520 bool "Shark"
521 select CPU_SA110
504 select ISA 522 select ISA
505 select ISA_DMA 523 select ISA_DMA
506 select ZONE_DMA 524 select ZONE_DMA
@@ -511,6 +529,7 @@ config ARCH_SHARK
511 529
512config ARCH_LH7A40X 530config ARCH_LH7A40X
513 bool "Sharp LH7A40X" 531 bool "Sharp LH7A40X"
532 select CPU_ARM922T
514 select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM 533 select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM
515 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM 534 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
516 help 535 help
@@ -521,6 +540,7 @@ config ARCH_LH7A40X
521 540
522config ARCH_DAVINCI 541config ARCH_DAVINCI
523 bool "TI DaVinci" 542 bool "TI DaVinci"
543 select CPU_ARM926T
524 select GENERIC_TIME 544 select GENERIC_TIME
525 select GENERIC_CLOCKEVENTS 545 select GENERIC_CLOCKEVENTS
526 select GENERIC_GPIO 546 select GENERIC_GPIO
@@ -542,6 +562,7 @@ config ARCH_OMAP
542 562
543config ARCH_MSM 563config ARCH_MSM
544 bool "Qualcomm MSM" 564 bool "Qualcomm MSM"
565 select CPU_V6
545 select GENERIC_TIME 566 select GENERIC_TIME
546 select GENERIC_CLOCKEVENTS 567 select GENERIC_CLOCKEVENTS
547 help 568 help
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index bd6e28115ebb..2eca2998f93e 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -96,7 +96,6 @@ textofs-y := 0x00008000
96 96
97 machine-$(CONFIG_ARCH_RPC) := rpc 97 machine-$(CONFIG_ARCH_RPC) := rpc
98 machine-$(CONFIG_ARCH_EBSA110) := ebsa110 98 machine-$(CONFIG_ARCH_EBSA110) := ebsa110
99 machine-$(CONFIG_ARCH_CLPS7500) := clps7500
100 machine-$(CONFIG_FOOTBRIDGE) := footbridge 99 machine-$(CONFIG_FOOTBRIDGE) := footbridge
101 machine-$(CONFIG_ARCH_SHARK) := shark 100 machine-$(CONFIG_ARCH_SHARK) := shark
102 machine-$(CONFIG_ARCH_SA1100) := sa1100 101 machine-$(CONFIG_ARCH_SA1100) := sa1100
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 7a03f2007882..fbe5eef1f6c9 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -23,10 +23,6 @@ ifeq ($(CONFIG_ARCH_L7200),y)
23OBJS += head-l7200.o 23OBJS += head-l7200.o
24endif 24endif
25 25
26ifeq ($(CONFIG_ARCH_CLPS7500),y)
27HEAD = head-clps7500.o
28endif
29
30ifeq ($(CONFIG_ARCH_P720T),y) 26ifeq ($(CONFIG_ARCH_P720T),y)
31# Borrow this code from SA1100 27# Borrow this code from SA1100
32OBJS += head-sa1100.o 28OBJS += head-sa1100.o
@@ -70,7 +66,7 @@ SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/
70targets := vmlinux vmlinux.lds piggy.gz piggy.o font.o font.c \ 66targets := vmlinux vmlinux.lds piggy.gz piggy.o font.o font.c \
71 head.o misc.o $(OBJS) 67 head.o misc.o $(OBJS)
72 68
73ifeq ($(CONFIG_FTRACE),y) 69ifeq ($(CONFIG_FUNCTION_TRACER),y)
74ORIG_CFLAGS := $(KBUILD_CFLAGS) 70ORIG_CFLAGS := $(KBUILD_CFLAGS)
75KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) 71KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
76endif 72endif
diff --git a/arch/arm/boot/compressed/head-clps7500.S b/arch/arm/boot/compressed/head-clps7500.S
deleted file mode 100644
index 4f3c78ac30a0..000000000000
--- a/arch/arm/boot/compressed/head-clps7500.S
+++ /dev/null
@@ -1,86 +0,0 @@
1/*
2 * linux/arch/arm/boot/compressed/head-clps7500.S
3 *
4 * Copyright (C) 1999, 2000, 2001 Nexus Electronics Ltd
5 */
6
7
8 /* There are three different ways the kernel can be
9 booted on a 7500 system: from Angel (loaded in RAM), from
10 16-bit ROM or from 32-bit Flash. Luckily, a single kernel
11 image does for them all. */
12 /* This branch is taken if the CPU memory width matches the
13 actual device in use. The default at power on is 16 bits
14 so we must be prepared for a mismatch. */
15 .section ".start", "ax"
162:
17 b 1f
18 .word 0xffff
19 .word 0xb632 @ mov r11, #0x03200000
20 .word 0xe3a0
21 .word 0x0000 @ mov r0, #0
22 .word 0xe3a0
23 .word 0x0080 @ strb r0, [r11, #0x80]
24 .word 0xe5cb
25 .word 0xf000 @ mov pc, #0
26 .word 0xe3a0
271:
28 adr r1, 2b
29 teq r1, #0
30 bne .Langel
31 /* This is a direct-from-ROM boot. Copy the kernel into
32 RAM and run it there. */
33 mov r0, #0x30
34 mcr p15, 0, r0, c1, c0, 0
35 mov r0, #0x13
36 msr cpsr_cxsf, r0
37 mov r12, #0x03000000 @ point to LEDs
38 orr r12, r12, #0x00020000
39 orr r12, r12, #0xba00
40 mov r0, #0x5500
41 str r0, [r12]
42 mov r0, #0x10000000
43 orr r0, r0, #0x8000
44 mov r4, r0
45 ldr r2, =_end
462:
47 ldr r3, [r1], #4
48 str r3, [r0], #4
49 teq r0, r2
50 bne 2b
51 mov r0, #0xff00
52 str r0, [r12]
531:
54 mov r12, #0x03000000 @ point to LEDs
55 orr r12, r12, #0x00020000
56 orr r12, r12, #0xba00
57 mov r0, #0xfe00
58 str r0, [r12]
59
60 adr lr, 1f
61 mov r0, #0
62 mov r1, #14 /* MACH_TYPE_CLPS7500 */
63 mov pc, lr
64.Langel:
65#ifdef CONFIG_ANGELBOOT
66 /* Call Angel to switch into SVC mode. */
67 mov r0, #0x17
68 swi 0x123456
69#endif
70 /* Ensure all interrupts are off and MMU disabled */
71 mrs r0, cpsr
72 orr r0, r0, #0xc0
73 msr cpsr_cxsf, r0
74
75 adr lr, 1b
76 orr lr, lr, #0x10000000
77 mov r0, #0x30 @ MMU off
78 mcr p15, 0, r0, c1, c0, 0
79 mov r0, r0
80 mov pc, lr
81
82 .ltorg
83
841:
85/* And the rest */
86#include "head.S"
diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c
index 65ce8fff29db..3fc08413fff0 100644
--- a/arch/arm/boot/compressed/misc.c
+++ b/arch/arm/boot/compressed/misc.c
@@ -86,6 +86,8 @@ static void putstr(const char *ptr)
86 86
87#define __ptr_t void * 87#define __ptr_t void *
88 88
89#define memzero(s,n) __memzero(s,n)
90
89/* 91/*
90 * Optimised C version of memzero for the ARM. 92 * Optimised C version of memzero for the ARM.
91 */ 93 */
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 86b5e6982660..a2cd9beaf37d 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -33,3 +33,6 @@ config SHARPSL_PM
33 33
34config SHARP_SCOOP 34config SHARP_SCOOP
35 bool 35 bool
36
37config COMMON_CLKDEV
38 bool
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index 325e4b6a6afb..7cb7961d81cb 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -17,3 +17,4 @@ obj-$(CONFIG_SHARP_SCOOP) += scoop.o
17obj-$(CONFIG_ARCH_IXP2000) += uengine.o 17obj-$(CONFIG_ARCH_IXP2000) += uengine.o
18obj-$(CONFIG_ARCH_IXP23XX) += uengine.o 18obj-$(CONFIG_ARCH_IXP23XX) += uengine.o
19obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o 19obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o
20obj-$(CONFIG_COMMON_CLKDEV) += clkdev.o
diff --git a/arch/arm/common/clkdev.c b/arch/arm/common/clkdev.c
new file mode 100644
index 000000000000..17a17b49a45b
--- /dev/null
+++ b/arch/arm/common/clkdev.c
@@ -0,0 +1,128 @@
1/*
2 * arch/arm/common/clkdev.c
3 *
4 * Copyright (C) 2008 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Helper for the clk API to assist looking up a struct clk.
11 */
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/device.h>
15#include <linux/list.h>
16#include <linux/errno.h>
17#include <linux/err.h>
18#include <linux/string.h>
19#include <linux/mutex.h>
20
21#include <asm/clkdev.h>
22#include <mach/clkdev.h>
23
24static LIST_HEAD(clocks);
25static DEFINE_MUTEX(clocks_mutex);
26
27static struct clk *clk_find(const char *dev_id, const char *con_id)
28{
29 struct clk_lookup *p;
30 struct clk *clk = NULL;
31 int match, best = 0;
32
33 list_for_each_entry(p, &clocks, node) {
34 if ((p->dev_id && !dev_id) || (p->con_id && !con_id))
35 continue;
36 match = 0;
37 if (p->dev_id)
38 match += 2 * (strcmp(p->dev_id, dev_id) == 0);
39 if (p->con_id)
40 match += 1 * (strcmp(p->con_id, con_id) == 0);
41 if (match == 0)
42 continue;
43
44 if (match > best) {
45 clk = p->clk;
46 best = match;
47 }
48 }
49 return clk;
50}
51
52struct clk *clk_get(struct device *dev, const char *con_id)
53{
54 const char *dev_id = dev ? dev_name(dev) : NULL;
55 struct clk *clk;
56
57 mutex_lock(&clocks_mutex);
58 clk = clk_find(dev_id, con_id);
59 if (clk && !__clk_get(clk))
60 clk = NULL;
61 mutex_unlock(&clocks_mutex);
62
63 return clk ? clk : ERR_PTR(-ENOENT);
64}
65EXPORT_SYMBOL(clk_get);
66
67void clk_put(struct clk *clk)
68{
69 __clk_put(clk);
70}
71EXPORT_SYMBOL(clk_put);
72
73void clkdev_add(struct clk_lookup *cl)
74{
75 mutex_lock(&clocks_mutex);
76 list_add_tail(&cl->node, &clocks);
77 mutex_unlock(&clocks_mutex);
78}
79EXPORT_SYMBOL(clkdev_add);
80
81#define MAX_DEV_ID 20
82#define MAX_CON_ID 16
83
84struct clk_lookup_alloc {
85 struct clk_lookup cl;
86 char dev_id[MAX_DEV_ID];
87 char con_id[MAX_CON_ID];
88};
89
90struct clk_lookup *clkdev_alloc(struct clk *clk, const char *con_id,
91 const char *dev_fmt, ...)
92{
93 struct clk_lookup_alloc *cla;
94
95 cla = kzalloc(sizeof(*cla), GFP_KERNEL);
96 if (!cla)
97 return NULL;
98
99 cla->cl.clk = clk;
100 if (con_id) {
101 strlcpy(cla->con_id, con_id, sizeof(cla->con_id));
102 cla->cl.con_id = cla->con_id;
103 }
104
105 if (dev_fmt) {
106 va_list ap;
107
108 va_start(ap, dev_fmt);
109 vscnprintf(cla->dev_id, sizeof(cla->dev_id), dev_fmt, ap);
110 cla->cl.dev_id = cla->dev_id;
111 va_end(ap);
112 }
113
114 return &cla->cl;
115}
116EXPORT_SYMBOL(clkdev_alloc);
117
118/*
119 * clkdev_drop - remove a clock dynamically allocated
120 */
121void clkdev_drop(struct clk_lookup *cl)
122{
123 mutex_lock(&clocks_mutex);
124 list_del(&cl->node);
125 mutex_unlock(&clocks_mutex);
126 kfree(cl);
127}
128EXPORT_SYMBOL(clkdev_drop);
diff --git a/arch/arm/common/sharpsl_pm.c b/arch/arm/common/sharpsl_pm.c
index db8309161408..780bbf7cb26f 100644
--- a/arch/arm/common/sharpsl_pm.c
+++ b/arch/arm/common/sharpsl_pm.c
@@ -54,11 +54,13 @@
54/* 54/*
55 * Prototypes 55 * Prototypes
56 */ 56 */
57#ifdef CONFIG_PM
57static int sharpsl_off_charge_battery(void); 58static int sharpsl_off_charge_battery(void);
58static int sharpsl_check_battery_temp(void);
59static int sharpsl_check_battery_voltage(void); 59static int sharpsl_check_battery_voltage(void);
60static int sharpsl_ac_check(void);
61static int sharpsl_fatal_check(void); 60static int sharpsl_fatal_check(void);
61#endif
62static int sharpsl_check_battery_temp(void);
63static int sharpsl_ac_check(void);
62static int sharpsl_average_value(int ad); 64static int sharpsl_average_value(int ad);
63static void sharpsl_average_clear(void); 65static void sharpsl_average_clear(void);
64static void sharpsl_charge_toggle(struct work_struct *private_); 66static void sharpsl_charge_toggle(struct work_struct *private_);
@@ -424,6 +426,7 @@ static int sharpsl_check_battery_temp(void)
424 return 0; 426 return 0;
425} 427}
426 428
429#ifdef CONFIG_PM
427static int sharpsl_check_battery_voltage(void) 430static int sharpsl_check_battery_voltage(void)
428{ 431{
429 int val, i, buff[5]; 432 int val, i, buff[5];
@@ -455,6 +458,7 @@ static int sharpsl_check_battery_voltage(void)
455 458
456 return 0; 459 return 0;
457} 460}
461#endif
458 462
459static int sharpsl_ac_check(void) 463static int sharpsl_ac_check(void)
460{ 464{
@@ -586,8 +590,6 @@ static int corgi_pxa_pm_enter(suspend_state_t state)
586 590
587 return 0; 591 return 0;
588} 592}
589#endif
590
591 593
592/* 594/*
593 * Check for fatal battery errors 595 * Check for fatal battery errors
@@ -738,7 +740,10 @@ static int sharpsl_off_charge_battery(void)
738 } 740 }
739 } 741 }
740} 742}
741 743#else
744#define sharpsl_pm_suspend NULL
745#define sharpsl_pm_resume NULL
746#endif
742 747
743static ssize_t battery_percentage_show(struct device *dev, struct device_attribute *attr, char *buf) 748static ssize_t battery_percentage_show(struct device *dev, struct device_attribute *attr, char *buf)
744{ 749{
@@ -768,10 +773,12 @@ static void sharpsl_apm_get_power_status(struct apm_power_info *info)
768 info->battery_life = sharpsl_pm.battstat.mainbat_percent; 773 info->battery_life = sharpsl_pm.battstat.mainbat_percent;
769} 774}
770 775
776#ifdef CONFIG_PM
771static struct platform_suspend_ops sharpsl_pm_ops = { 777static struct platform_suspend_ops sharpsl_pm_ops = {
772 .enter = corgi_pxa_pm_enter, 778 .enter = corgi_pxa_pm_enter,
773 .valid = suspend_valid_only_mem, 779 .valid = suspend_valid_only_mem,
774}; 780};
781#endif
775 782
776static int __init sharpsl_pm_probe(struct platform_device *pdev) 783static int __init sharpsl_pm_probe(struct platform_device *pdev)
777{ 784{
@@ -802,7 +809,9 @@ static int __init sharpsl_pm_probe(struct platform_device *pdev)
802 809
803 apm_get_power_status = sharpsl_apm_get_power_status; 810 apm_get_power_status = sharpsl_apm_get_power_status;
804 811
812#ifdef CONFIG_PM
805 suspend_set_ops(&sharpsl_pm_ops); 813 suspend_set_ops(&sharpsl_pm_ops);
814#endif
806 815
807 mod_timer(&sharpsl_pm.ac_timer, jiffies + msecs_to_jiffies(250)); 816 mod_timer(&sharpsl_pm.ac_timer, jiffies + msecs_to_jiffies(250));
808 817
diff --git a/arch/arm/include/asm/clkdev.h b/arch/arm/include/asm/clkdev.h
new file mode 100644
index 000000000000..b6ec7c627b39
--- /dev/null
+++ b/arch/arm/include/asm/clkdev.h
@@ -0,0 +1,30 @@
1/*
2 * arch/arm/include/asm/clkdev.h
3 *
4 * Copyright (C) 2008 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Helper for the clk API to assist looking up a struct clk.
11 */
12#ifndef __ASM_CLKDEV_H
13#define __ASM_CLKDEV_H
14
15struct clk;
16
17struct clk_lookup {
18 struct list_head node;
19 const char *dev_id;
20 const char *con_id;
21 struct clk *clk;
22};
23
24struct clk_lookup *clkdev_alloc(struct clk *clk, const char *con_id,
25 const char *dev_fmt, ...);
26
27void clkdev_add(struct clk_lookup *cl);
28void clkdev_drop(struct clk_lookup *cl);
29
30#endif
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 1cb8602dd9d5..4ed149cbb32a 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -256,8 +256,17 @@ int dmabounce_sync_for_cpu(struct device *, dma_addr_t, unsigned long,
256int dmabounce_sync_for_device(struct device *, dma_addr_t, unsigned long, 256int dmabounce_sync_for_device(struct device *, dma_addr_t, unsigned long,
257 size_t, enum dma_data_direction); 257 size_t, enum dma_data_direction);
258#else 258#else
259#define dmabounce_sync_for_cpu(dev,dma,off,sz,dir) (1) 259static inline int dmabounce_sync_for_cpu(struct device *d, dma_addr_t addr,
260#define dmabounce_sync_for_device(dev,dma,off,sz,dir) (1) 260 unsigned long offset, size_t size, enum dma_data_direction dir)
261{
262 return 1;
263}
264
265static inline int dmabounce_sync_for_device(struct device *d, dma_addr_t addr,
266 unsigned long offset, size_t size, enum dma_data_direction dir)
267{
268 return 1;
269}
261 270
262 271
263/** 272/**
diff --git a/arch/arm/include/asm/ftrace.h b/arch/arm/include/asm/ftrace.h
index 584ef9a8e5a5..39c8bc1a006a 100644
--- a/arch/arm/include/asm/ftrace.h
+++ b/arch/arm/include/asm/ftrace.h
@@ -1,7 +1,7 @@
1#ifndef _ASM_ARM_FTRACE 1#ifndef _ASM_ARM_FTRACE
2#define _ASM_ARM_FTRACE 2#define _ASM_ARM_FTRACE
3 3
4#ifdef CONFIG_FTRACE 4#ifdef CONFIG_FUNCTION_TRACER
5#define MCOUNT_ADDR ((long)(mcount)) 5#define MCOUNT_ADDR ((long)(mcount))
6#define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ 6#define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */
7 7
diff --git a/arch/arm/include/asm/hardware/iomd.h b/arch/arm/include/asm/hardware/iomd.h
index 9c5afbd71a69..f9ee69e4f53e 100644
--- a/arch/arm/include/asm/hardware/iomd.h
+++ b/arch/arm/include/asm/hardware/iomd.h
@@ -32,19 +32,11 @@
32#define IOMD_KARTRX (0x004) 32#define IOMD_KARTRX (0x004)
33#define IOMD_KCTRL (0x008) 33#define IOMD_KCTRL (0x008)
34 34
35#ifdef CONFIG_ARCH_CLPS7500
36#define IOMD_IOLINES (0x00C)
37#endif
38
39#define IOMD_IRQSTATA (0x010) 35#define IOMD_IRQSTATA (0x010)
40#define IOMD_IRQREQA (0x014) 36#define IOMD_IRQREQA (0x014)
41#define IOMD_IRQCLRA (0x014) 37#define IOMD_IRQCLRA (0x014)
42#define IOMD_IRQMASKA (0x018) 38#define IOMD_IRQMASKA (0x018)
43 39
44#ifdef CONFIG_ARCH_CLPS7500
45#define IOMD_SUSMODE (0x01C)
46#endif
47
48#define IOMD_IRQSTATB (0x020) 40#define IOMD_IRQSTATB (0x020)
49#define IOMD_IRQREQB (0x024) 41#define IOMD_IRQREQB (0x024)
50#define IOMD_IRQMASKB (0x028) 42#define IOMD_IRQMASKB (0x028)
@@ -53,10 +45,6 @@
53#define IOMD_FIQREQ (0x034) 45#define IOMD_FIQREQ (0x034)
54#define IOMD_FIQMASK (0x038) 46#define IOMD_FIQMASK (0x038)
55 47
56#ifdef CONFIG_ARCH_CLPS7500
57#define IOMD_CLKCTL (0x03C)
58#endif
59
60#define IOMD_T0CNTL (0x040) 48#define IOMD_T0CNTL (0x040)
61#define IOMD_T0LTCHL (0x040) 49#define IOMD_T0LTCHL (0x040)
62#define IOMD_T0CNTH (0x044) 50#define IOMD_T0CNTH (0x044)
@@ -71,18 +59,6 @@
71#define IOMD_T1GO (0x058) 59#define IOMD_T1GO (0x058)
72#define IOMD_T1LATCH (0x05c) 60#define IOMD_T1LATCH (0x05c)
73 61
74#ifdef CONFIG_ARCH_CLPS7500
75#define IOMD_IRQSTATC (0x060)
76#define IOMD_IRQREQC (0x064)
77#define IOMD_IRQMASKC (0x068)
78
79#define IOMD_VIDMUX (0x06c)
80
81#define IOMD_IRQSTATD (0x070)
82#define IOMD_IRQREQD (0x074)
83#define IOMD_IRQMASKD (0x078)
84#endif
85
86#define IOMD_ROMCR0 (0x080) 62#define IOMD_ROMCR0 (0x080)
87#define IOMD_ROMCR1 (0x084) 63#define IOMD_ROMCR1 (0x084)
88#ifdef CONFIG_ARCH_RPC 64#ifdef CONFIG_ARCH_RPC
@@ -100,11 +76,6 @@
100#define IOMD_MOUSEY (0x0A4) 76#define IOMD_MOUSEY (0x0A4)
101#endif 77#endif
102 78
103#ifdef CONFIG_ARCH_CLPS7500
104#define IOMD_MSEDAT (0x0A8)
105#define IOMD_MSECTL (0x0Ac)
106#endif
107
108#ifdef CONFIG_ARCH_RPC 79#ifdef CONFIG_ARCH_RPC
109#define IOMD_DMATCR (0x0C0) 80#define IOMD_DMATCR (0x0C0)
110#endif 81#endif
@@ -113,18 +84,6 @@
113#ifdef CONFIG_ARCH_RPC 84#ifdef CONFIG_ARCH_RPC
114#define IOMD_DMAEXT (0x0CC) 85#define IOMD_DMAEXT (0x0CC)
115#endif 86#endif
116#ifdef CONFIG_ARCH_CLPS7500
117#define IOMD_ASTCR (0x0CC)
118#define IOMD_DRAMCR (0x0D0)
119#define IOMD_SELFREF (0x0D4)
120#define IOMD_ATODICR (0x0E0)
121#define IOMD_ATODSR (0x0E4)
122#define IOMD_ATODCC (0x0E8)
123#define IOMD_ATODCNT1 (0x0EC)
124#define IOMD_ATODCNT2 (0x0F0)
125#define IOMD_ATODCNT3 (0x0F4)
126#define IOMD_ATODCNT4 (0x0F8)
127#endif
128 87
129#ifdef CONFIG_ARCH_RPC 88#ifdef CONFIG_ARCH_RPC
130#define DMA_EXT_IO0 1 89#define DMA_EXT_IO0 1
diff --git a/arch/arm/include/asm/hardware/iop3xx-adma.h b/arch/arm/include/asm/hardware/iop3xx-adma.h
index 87bff09633aa..83e6ba338e2c 100644
--- a/arch/arm/include/asm/hardware/iop3xx-adma.h
+++ b/arch/arm/include/asm/hardware/iop3xx-adma.h
@@ -730,7 +730,8 @@ static inline void iop_desc_set_next_desc(struct iop_adma_desc_slot *desc,
730{ 730{
731 /* hw_desc->next_desc is the same location for all channels */ 731 /* hw_desc->next_desc is the same location for all channels */
732 union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, }; 732 union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, };
733 BUG_ON(hw_desc.dma->next_desc); 733
734 iop_paranoia(hw_desc.dma->next_desc);
734 hw_desc.dma->next_desc = next_desc_addr; 735 hw_desc.dma->next_desc = next_desc_addr;
735} 736}
736 737
@@ -760,7 +761,7 @@ static inline int iop_desc_get_zero_result(struct iop_adma_desc_slot *desc)
760 struct iop3xx_desc_aau *hw_desc = desc->hw_desc; 761 struct iop3xx_desc_aau *hw_desc = desc->hw_desc;
761 struct iop3xx_aau_desc_ctrl desc_ctrl = hw_desc->desc_ctrl_field; 762 struct iop3xx_aau_desc_ctrl desc_ctrl = hw_desc->desc_ctrl_field;
762 763
763 BUG_ON(!(desc_ctrl.tx_complete && desc_ctrl.zero_result_en)); 764 iop_paranoia(!(desc_ctrl.tx_complete && desc_ctrl.zero_result_en));
764 return desc_ctrl.zero_result_err; 765 return desc_ctrl.zero_result_err;
765} 766}
766 767
diff --git a/arch/arm/include/asm/hardware/iop_adma.h b/arch/arm/include/asm/hardware/iop_adma.h
index cb7e3611bcba..385c6e8cbbd2 100644
--- a/arch/arm/include/asm/hardware/iop_adma.h
+++ b/arch/arm/include/asm/hardware/iop_adma.h
@@ -23,6 +23,12 @@
23 23
24#define IOP_ADMA_SLOT_SIZE 32 24#define IOP_ADMA_SLOT_SIZE 32
25#define IOP_ADMA_THRESHOLD 4 25#define IOP_ADMA_THRESHOLD 4
26#ifdef DEBUG
27#define IOP_PARANOIA 1
28#else
29#define IOP_PARANOIA 0
30#endif
31#define iop_paranoia(x) BUG_ON(IOP_PARANOIA && (x))
26 32
27/** 33/**
28 * struct iop_adma_device - internal representation of an ADMA device 34 * struct iop_adma_device - internal representation of an ADMA device
diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h
index cb1139ac1943..39d949b63e80 100644
--- a/arch/arm/include/asm/mach/map.h
+++ b/arch/arm/include/asm/mach/map.h
@@ -19,12 +19,13 @@ struct map_desc {
19}; 19};
20 20
21/* types 0-3 are defined in asm/io.h */ 21/* types 0-3 are defined in asm/io.h */
22#define MT_CACHECLEAN 4 22#define MT_UNCACHED 4
23#define MT_MINICLEAN 5 23#define MT_CACHECLEAN 5
24#define MT_LOW_VECTORS 6 24#define MT_MINICLEAN 6
25#define MT_HIGH_VECTORS 7 25#define MT_LOW_VECTORS 7
26#define MT_MEMORY 8 26#define MT_HIGH_VECTORS 8
27#define MT_ROM 9 27#define MT_MEMORY 9
28#define MT_ROM 10
28 29
29#ifdef CONFIG_MMU 30#ifdef CONFIG_MMU
30extern void iotable_init(struct map_desc *, int); 31extern void iotable_init(struct map_desc *, int);
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 809ff9ab853a..77764301844b 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -44,10 +44,10 @@
44 * The module space lives between the addresses given by TASK_SIZE 44 * The module space lives between the addresses given by TASK_SIZE
45 * and PAGE_OFFSET - it must be within 32MB of the kernel text. 45 * and PAGE_OFFSET - it must be within 32MB of the kernel text.
46 */ 46 */
47#define MODULE_END (PAGE_OFFSET) 47#define MODULES_END (PAGE_OFFSET)
48#define MODULE_START (MODULE_END - 16*1048576) 48#define MODULES_VADDR (MODULES_END - 16*1048576)
49 49
50#if TASK_SIZE > MODULE_START 50#if TASK_SIZE > MODULES_VADDR
51#error Top of user space clashes with start of module space 51#error Top of user space clashes with start of module space
52#endif 52#endif
53 53
@@ -56,7 +56,7 @@
56 * Since we use sections to map it, this macro replaces the physical address 56 * Since we use sections to map it, this macro replaces the physical address
57 * with its virtual address while keeping offset from the base section. 57 * with its virtual address while keeping offset from the base section.
58 */ 58 */
59#define XIP_VIRT_ADDR(physaddr) (MODULE_START + ((physaddr) & 0x000fffff)) 59#define XIP_VIRT_ADDR(physaddr) (MODULES_VADDR + ((physaddr) & 0x000fffff))
60 60
61/* 61/*
62 * Allow 16MB-aligned ioremap pages 62 * Allow 16MB-aligned ioremap pages
@@ -94,8 +94,8 @@
94/* 94/*
95 * The module can be at any place in ram in nommu mode. 95 * The module can be at any place in ram in nommu mode.
96 */ 96 */
97#define MODULE_END (END_MEM) 97#define MODULES_END (END_MEM)
98#define MODULE_START (PHYS_OFFSET) 98#define MODULES_VADDR (PHYS_OFFSET)
99 99
100#endif /* !CONFIG_MMU */ 100#endif /* !CONFIG_MMU */
101 101
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
index bed1c0a00368..5fee45e23038 100644
--- a/arch/arm/include/asm/page.h
+++ b/arch/arm/include/asm/page.h
@@ -133,7 +133,7 @@ extern void __cpu_copy_user_page(void *to, const void *from,
133#define clear_user_page(addr,vaddr,pg) __cpu_clear_user_page(addr, vaddr) 133#define clear_user_page(addr,vaddr,pg) __cpu_clear_user_page(addr, vaddr)
134#define copy_user_page(to,from,vaddr,pg) __cpu_copy_user_page(to, from, vaddr) 134#define copy_user_page(to,from,vaddr,pg) __cpu_copy_user_page(to, from, vaddr)
135 135
136#define clear_page(page) memzero((void *)(page), PAGE_SIZE) 136#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
137extern void copy_page(void *to, const void *from); 137extern void copy_page(void *to, const void *from);
138 138
139#undef STRICT_MM_TYPECHECKS 139#undef STRICT_MM_TYPECHECKS
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index 517a4d6ffc74..2320508443a5 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -64,7 +64,7 @@ struct thread_struct {
64({ \ 64({ \
65 unsigned long *stack = (unsigned long *)sp; \ 65 unsigned long *stack = (unsigned long *)sp; \
66 set_fs(USER_DS); \ 66 set_fs(USER_DS); \
67 memzero(regs->uregs, sizeof(regs->uregs)); \ 67 memset(regs->uregs, 0, sizeof(regs->uregs)); \
68 if (current->personality & ADDR_LIMIT_32BIT) \ 68 if (current->personality & ADDR_LIMIT_32BIT) \
69 regs->ARM_cpsr = USR_MODE; \ 69 regs->ARM_cpsr = USR_MODE; \
70 else \ 70 else \
diff --git a/arch/arm/include/asm/string.h b/arch/arm/include/asm/string.h
index e50c4a39b699..cf4f3aad0fc1 100644
--- a/arch/arm/include/asm/string.h
+++ b/arch/arm/include/asm/string.h
@@ -21,7 +21,6 @@ extern void * memmove(void *, const void *, __kernel_size_t);
21#define __HAVE_ARCH_MEMCHR 21#define __HAVE_ARCH_MEMCHR
22extern void * memchr(const void *, int, __kernel_size_t); 22extern void * memchr(const void *, int, __kernel_size_t);
23 23
24#define __HAVE_ARCH_MEMZERO
25#define __HAVE_ARCH_MEMSET 24#define __HAVE_ARCH_MEMSET
26extern void * memset(void *, int, __kernel_size_t); 25extern void * memset(void *, int, __kernel_size_t);
27 26
@@ -39,12 +38,4 @@ extern void __memzero(void *ptr, __kernel_size_t n);
39 (__p); \ 38 (__p); \
40 }) 39 })
41 40
42#define memzero(p,n) \
43 ({ \
44 void *__p = (p); size_t __n = n; \
45 if ((__n) != 0) \
46 __memzero((__p),(__n)); \
47 (__p); \
48 })
49
50#endif 41#endif
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 7aad78420f18..568020b34e3e 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -42,6 +42,10 @@
42#define CR_U (1 << 22) /* Unaligned access operation */ 42#define CR_U (1 << 22) /* Unaligned access operation */
43#define CR_XP (1 << 23) /* Extended page tables */ 43#define CR_XP (1 << 23) /* Extended page tables */
44#define CR_VE (1 << 24) /* Vectored interrupts */ 44#define CR_VE (1 << 24) /* Vectored interrupts */
45#define CR_EE (1 << 25) /* Exception (Big) Endian */
46#define CR_TRE (1 << 28) /* TEX remap enable */
47#define CR_AFE (1 << 29) /* Access flag enable */
48#define CR_TE (1 << 30) /* Thumb exception enable */
45 49
46/* 50/*
47 * This is used to ensure the compiler did actually allocate the register we 51 * This is used to ensure the compiler did actually allocate the register we
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index e98ec60b3400..cbb7a37e2978 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -400,7 +400,7 @@ static inline unsigned long __must_check copy_from_user(void *to, const void __u
400 if (access_ok(VERIFY_READ, from, n)) 400 if (access_ok(VERIFY_READ, from, n))
401 n = __copy_from_user(to, from, n); 401 n = __copy_from_user(to, from, n);
402 else /* security hole - plug it */ 402 else /* security hole - plug it */
403 memzero(to, n); 403 memset(to, 0, n);
404 return n; 404 return n;
405} 405}
406 406
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index 2357b1cf1cf9..c74f766ffc12 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -183,6 +183,6 @@ EXPORT_SYMBOL(_find_next_bit_be);
183 183
184EXPORT_SYMBOL(copy_page); 184EXPORT_SYMBOL(copy_page);
185 185
186#ifdef CONFIG_FTRACE 186#ifdef CONFIG_FUNCTION_TRACER
187EXPORT_SYMBOL(mcount); 187EXPORT_SYMBOL(mcount);
188#endif 188#endif
diff --git a/arch/arm/kernel/elf.c b/arch/arm/kernel/elf.c
index 513f332f040d..84849098c8e8 100644
--- a/arch/arm/kernel/elf.c
+++ b/arch/arm/kernel/elf.c
@@ -21,12 +21,16 @@ int elf_check_arch(const struct elf32_hdr *x)
21 21
22 eflags = x->e_flags; 22 eflags = x->e_flags;
23 if ((eflags & EF_ARM_EABI_MASK) == EF_ARM_EABI_UNKNOWN) { 23 if ((eflags & EF_ARM_EABI_MASK) == EF_ARM_EABI_UNKNOWN) {
24 unsigned int flt_fmt;
25
24 /* APCS26 is only allowed if the CPU supports it */ 26 /* APCS26 is only allowed if the CPU supports it */
25 if ((eflags & EF_ARM_APCS_26) && !(elf_hwcap & HWCAP_26BIT)) 27 if ((eflags & EF_ARM_APCS_26) && !(elf_hwcap & HWCAP_26BIT))
26 return 0; 28 return 0;
27 29
30 flt_fmt = eflags & (EF_ARM_VFP_FLOAT | EF_ARM_SOFT_FLOAT);
31
28 /* VFP requires the supporting code */ 32 /* VFP requires the supporting code */
29 if ((eflags & EF_ARM_VFP_FLOAT) && !(elf_hwcap & HWCAP_VFP)) 33 if (flt_fmt == EF_ARM_VFP_FLOAT && !(elf_hwcap & HWCAP_VFP))
30 return 0; 34 return 0;
31 } 35 }
32 return 1; 36 return 1;
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 3aa14dcc5bab..06269ea375c5 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -101,7 +101,7 @@ ENDPROC(ret_from_fork)
101#undef CALL 101#undef CALL
102#define CALL(x) .long x 102#define CALL(x) .long x
103 103
104#ifdef CONFIG_FTRACE 104#ifdef CONFIG_FUNCTION_TRACER
105#ifdef CONFIG_DYNAMIC_FTRACE 105#ifdef CONFIG_DYNAMIC_FTRACE
106ENTRY(mcount) 106ENTRY(mcount)
107 stmdb sp!, {r0-r3, lr} 107 stmdb sp!, {r0-r3, lr}
@@ -149,7 +149,7 @@ trace:
149ftrace_stub: 149ftrace_stub:
150 mov pc, lr 150 mov pc, lr
151 151
152#endif /* CONFIG_FTRACE */ 152#endif /* CONFIG_FUNCTION_TRACER */
153 153
154/*============================================================================= 154/*=============================================================================
155 * SWI handler 155 * SWI handler
diff --git a/arch/arm/kernel/ftrace.c b/arch/arm/kernel/ftrace.c
index 76d50e6091bc..6c90479e8974 100644
--- a/arch/arm/kernel/ftrace.c
+++ b/arch/arm/kernel/ftrace.c
@@ -95,19 +95,6 @@ int ftrace_update_ftrace_func(ftrace_func_t func)
95 return ret; 95 return ret;
96} 96}
97 97
98int ftrace_mcount_set(unsigned long *data)
99{
100 unsigned long pc, old;
101 unsigned long *addr = data;
102 unsigned char *new;
103
104 pc = (unsigned long)&mcount_call;
105 memcpy(&old, &mcount_call, MCOUNT_INSN_SIZE);
106 new = ftrace_call_replace(pc, *addr);
107 *addr = ftrace_modify_code(pc, (unsigned char *)&old, new);
108 return 0;
109}
110
111/* run from kstop_machine */ 98/* run from kstop_machine */
112int __init ftrace_dyn_arch_init(void *data) 99int __init ftrace_dyn_arch_init(void *data)
113{ 100{
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c
index 9203ba7d58ee..b8d965dcd6fd 100644
--- a/arch/arm/kernel/module.c
+++ b/arch/arm/kernel/module.c
@@ -26,12 +26,12 @@
26/* 26/*
27 * The XIP kernel text is mapped in the module area for modules and 27 * The XIP kernel text is mapped in the module area for modules and
28 * some other stuff to work without any indirect relocations. 28 * some other stuff to work without any indirect relocations.
29 * MODULE_START is redefined here and not in asm/memory.h to avoid 29 * MODULES_VADDR is redefined here and not in asm/memory.h to avoid
30 * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off. 30 * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off.
31 */ 31 */
32extern void _etext; 32extern void _etext;
33#undef MODULE_START 33#undef MODULES_VADDR
34#define MODULE_START (((unsigned long)&_etext + ~PGDIR_MASK) & PGDIR_MASK) 34#define MODULES_VADDR (((unsigned long)&_etext + ~PGDIR_MASK) & PGDIR_MASK)
35#endif 35#endif
36 36
37#ifdef CONFIG_MMU 37#ifdef CONFIG_MMU
@@ -43,7 +43,7 @@ void *module_alloc(unsigned long size)
43 if (!size) 43 if (!size)
44 return NULL; 44 return NULL;
45 45
46 area = __get_vm_area(size, VM_ALLOC, MODULE_START, MODULE_END); 46 area = __get_vm_area(size, VM_ALLOC, MODULES_VADDR, MODULES_END);
47 if (!area) 47 if (!area)
48 return NULL; 48 return NULL;
49 49
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 30351cd4560d..866f84a586ff 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -38,7 +38,6 @@ else
38endif 38endif
39 39
40lib-$(CONFIG_ARCH_RPC) += ecard.o io-acorn.o floppydma.o 40lib-$(CONFIG_ARCH_RPC) += ecard.o io-acorn.o floppydma.o
41lib-$(CONFIG_ARCH_CLPS7500) += io-acorn.o
42lib-$(CONFIG_ARCH_L7200) += io-acorn.o 41lib-$(CONFIG_ARCH_L7200) += io-acorn.o
43lib-$(CONFIG_ARCH_SHARK) += io-shark.o 42lib-$(CONFIG_ARCH_SHARK) += io-shark.o
44 43
diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S
index 761eefa76243..650d5923ab83 100644
--- a/arch/arm/lib/memset.S
+++ b/arch/arm/lib/memset.S
@@ -25,7 +25,7 @@
25 add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3)) 25 add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
26/* 26/*
27 * The pointer is now aligned and the length is adjusted. Try doing the 27 * The pointer is now aligned and the length is adjusted. Try doing the
28 * memzero again. 28 * memset again.
29 */ 29 */
30 30
31ENTRY(memset) 31ENTRY(memset)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 5aafb2e2ca7a..95dc71aaa668 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -7,36 +7,43 @@ choice
7 7
8config ARCH_AT91RM9200 8config ARCH_AT91RM9200
9 bool "AT91RM9200" 9 bool "AT91RM9200"
10 select CPU_ARM920T
10 select GENERIC_TIME 11 select GENERIC_TIME
11 select GENERIC_CLOCKEVENTS 12 select GENERIC_CLOCKEVENTS
12 13
13config ARCH_AT91SAM9260 14config ARCH_AT91SAM9260
14 bool "AT91SAM9260 or AT91SAM9XE" 15 bool "AT91SAM9260 or AT91SAM9XE"
16 select CPU_ARM926T
15 select GENERIC_TIME 17 select GENERIC_TIME
16 select GENERIC_CLOCKEVENTS 18 select GENERIC_CLOCKEVENTS
17 19
18config ARCH_AT91SAM9261 20config ARCH_AT91SAM9261
19 bool "AT91SAM9261" 21 bool "AT91SAM9261"
22 select CPU_ARM926T
20 select GENERIC_TIME 23 select GENERIC_TIME
21 select GENERIC_CLOCKEVENTS 24 select GENERIC_CLOCKEVENTS
22 25
23config ARCH_AT91SAM9263 26config ARCH_AT91SAM9263
24 bool "AT91SAM9263" 27 bool "AT91SAM9263"
28 select CPU_ARM926T
25 select GENERIC_TIME 29 select GENERIC_TIME
26 select GENERIC_CLOCKEVENTS 30 select GENERIC_CLOCKEVENTS
27 31
28config ARCH_AT91SAM9RL 32config ARCH_AT91SAM9RL
29 bool "AT91SAM9RL" 33 bool "AT91SAM9RL"
34 select CPU_ARM926T
30 select GENERIC_TIME 35 select GENERIC_TIME
31 select GENERIC_CLOCKEVENTS 36 select GENERIC_CLOCKEVENTS
32 37
33config ARCH_AT91SAM9G20 38config ARCH_AT91SAM9G20
34 bool "AT91SAM9G20" 39 bool "AT91SAM9G20"
40 select CPU_ARM926T
35 select GENERIC_TIME 41 select GENERIC_TIME
36 select GENERIC_CLOCKEVENTS 42 select GENERIC_CLOCKEVENTS
37 43
38config ARCH_AT91CAP9 44config ARCH_AT91CAP9
39 bool "AT91CAP9" 45 bool "AT91CAP9"
46 select CPU_ARM926T
40 select GENERIC_TIME 47 select GENERIC_TIME
41 select GENERIC_CLOCKEVENTS 48 select GENERIC_CLOCKEVENTS
42 49
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c
index 9c040c78889a..e263fda3e2d1 100644
--- a/arch/arm/mach-at91/board-afeb-9260v1.c
+++ b/arch/arm/mach-at91/board-afeb-9260v1.c
@@ -165,6 +165,7 @@ static struct at91_mmc_data __initdata afeb9260_mmc_data = {
165static struct i2c_board_info __initdata afeb9260_i2c_devices[] = { 165static struct i2c_board_info __initdata afeb9260_i2c_devices[] = {
166 { 166 {
167 I2C_BOARD_INFO("fm3130", 0x68), 167 I2C_BOARD_INFO("fm3130", 0x68),
168 }, {
168 I2C_BOARD_INFO("24c64", 0x50), 169 I2C_BOARD_INFO("24c64", 0x50),
169 }, 170 },
170}; 171};
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index 76d76e2fa69e..bffa6741a751 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -13,6 +13,7 @@
13#ifndef __ASM_ARCH_AT91RM9200_GPIO_H 13#ifndef __ASM_ARCH_AT91RM9200_GPIO_H
14#define __ASM_ARCH_AT91RM9200_GPIO_H 14#define __ASM_ARCH_AT91RM9200_GPIO_H
15 15
16#include <linux/kernel.h>
16#include <asm/irq.h> 17#include <asm/irq.h>
17 18
18#define PIN_BASE NR_AIC_IRQS 19#define PIN_BASE NR_AIC_IRQS
@@ -220,6 +221,7 @@ static inline int gpio_request(unsigned gpio, const char *label)
220 221
221static inline void gpio_free(unsigned gpio) 222static inline void gpio_free(unsigned gpio)
222{ 223{
224 might_sleep();
223} 225}
224 226
225extern int gpio_direction_input(unsigned gpio); 227extern int gpio_direction_input(unsigned gpio);
diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h
index 4c3e101b96c9..b3ebe9e4871f 100644
--- a/arch/arm/mach-clps711x/include/mach/hardware.h
+++ b/arch/arm/mach-clps711x/include/mach/hardware.h
@@ -94,20 +94,6 @@
94#include <asm/hardware/ep7212.h> 94#include <asm/hardware/ep7212.h>
95#include <asm/hardware/cs89712.h> 95#include <asm/hardware/cs89712.h>
96 96
97/* dynamic ioremap() areas */
98#define FLASH_START 0x00000000
99#define FLASH_SIZE 0x800000
100#define FLASH_WIDTH 4
101
102#define SRAM_START 0x60000000
103#define SRAM_SIZE 0xc000
104#define SRAM_WIDTH 4
105
106#define BOOTROM_START 0x70000000
107#define BOOTROM_SIZE 0x80
108#define BOOTROM_WIDTH 4
109
110
111/* static cdb89712_map_io() areas */ 97/* static cdb89712_map_io() areas */
112#define REGISTER_START 0x80000000 98#define REGISTER_START 0x80000000
113#define REGISTER_SIZE 0x4000 99#define REGISTER_SIZE 0x4000
@@ -198,14 +184,6 @@
198#define CEIVA_FLASH_SIZE 0x100000 184#define CEIVA_FLASH_SIZE 0x100000
199#define CEIVA_FLASH_WIDTH 2 185#define CEIVA_FLASH_WIDTH 2
200 186
201#define SRAM_START 0x60000000
202#define SRAM_SIZE 0xc000
203#define SRAM_WIDTH 4
204
205#define BOOTROM_START 0x70000000
206#define BOOTROM_SIZE 0x80
207#define BOOTROM_WIDTH 4
208
209/* 187/*
210 * SED1355 LCD controller 188 * SED1355 LCD controller
211 */ 189 */
diff --git a/arch/arm/mach-clps7500/Makefile b/arch/arm/mach-clps7500/Makefile
deleted file mode 100644
index 4bd8ebd70e7b..000000000000
--- a/arch/arm/mach-clps7500/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5# Object file lists.
6
7obj-y := core.o
8obj-m :=
9obj-n :=
10obj- :=
11
diff --git a/arch/arm/mach-clps7500/Makefile.boot b/arch/arm/mach-clps7500/Makefile.boot
deleted file mode 100644
index fe16506c1540..000000000000
--- a/arch/arm/mach-clps7500/Makefile.boot
+++ /dev/null
@@ -1,2 +0,0 @@
1 zreladdr-y := 0x10008000
2
diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c
deleted file mode 100644
index c3a33b8a5aac..000000000000
--- a/arch/arm/mach-clps7500/core.c
+++ /dev/null
@@ -1,395 +0,0 @@
1/*
2 * linux/arch/arm/mach-clps7500/core.c
3 *
4 * Copyright (C) 1998 Russell King
5 * Copyright (C) 1999 Nexus Electronics Ltd
6 *
7 * Extra MM routines for CL7500 architecture
8 */
9#include <linux/kernel.h>
10#include <linux/types.h>
11#include <linux/interrupt.h>
12#include <linux/irq.h>
13#include <linux/list.h>
14#include <linux/sched.h>
15#include <linux/init.h>
16#include <linux/device.h>
17#include <linux/serial_8250.h>
18#include <linux/io.h>
19
20#include <asm/mach/arch.h>
21#include <asm/mach/map.h>
22#include <asm/mach/irq.h>
23#include <asm/mach/time.h>
24
25#include <mach/hardware.h>
26#include <asm/hardware/iomd.h>
27#include <asm/irq.h>
28#include <asm/mach-types.h>
29
30unsigned int vram_size;
31
32static void cl7500_ack_irq_a(unsigned int irq)
33{
34 unsigned int val, mask;
35
36 mask = 1 << irq;
37 val = iomd_readb(IOMD_IRQMASKA);
38 iomd_writeb(val & ~mask, IOMD_IRQMASKA);
39 iomd_writeb(mask, IOMD_IRQCLRA);
40}
41
42static void cl7500_mask_irq_a(unsigned int irq)
43{
44 unsigned int val, mask;
45
46 mask = 1 << irq;
47 val = iomd_readb(IOMD_IRQMASKA);
48 iomd_writeb(val & ~mask, IOMD_IRQMASKA);
49}
50
51static void cl7500_unmask_irq_a(unsigned int irq)
52{
53 unsigned int val, mask;
54
55 mask = 1 << irq;
56 val = iomd_readb(IOMD_IRQMASKA);
57 iomd_writeb(val | mask, IOMD_IRQMASKA);
58}
59
60static struct irq_chip clps7500_a_chip = {
61 .ack = cl7500_ack_irq_a,
62 .mask = cl7500_mask_irq_a,
63 .unmask = cl7500_unmask_irq_a,
64};
65
66static void cl7500_mask_irq_b(unsigned int irq)
67{
68 unsigned int val, mask;
69
70 mask = 1 << (irq & 7);
71 val = iomd_readb(IOMD_IRQMASKB);
72 iomd_writeb(val & ~mask, IOMD_IRQMASKB);
73}
74
75static void cl7500_unmask_irq_b(unsigned int irq)
76{
77 unsigned int val, mask;
78
79 mask = 1 << (irq & 7);
80 val = iomd_readb(IOMD_IRQMASKB);
81 iomd_writeb(val | mask, IOMD_IRQMASKB);
82}
83
84static struct irq_chip clps7500_b_chip = {
85 .ack = cl7500_mask_irq_b,
86 .mask = cl7500_mask_irq_b,
87 .unmask = cl7500_unmask_irq_b,
88};
89
90static void cl7500_mask_irq_c(unsigned int irq)
91{
92 unsigned int val, mask;
93
94 mask = 1 << (irq & 7);
95 val = iomd_readb(IOMD_IRQMASKC);
96 iomd_writeb(val & ~mask, IOMD_IRQMASKC);
97}
98
99static void cl7500_unmask_irq_c(unsigned int irq)
100{
101 unsigned int val, mask;
102
103 mask = 1 << (irq & 7);
104 val = iomd_readb(IOMD_IRQMASKC);
105 iomd_writeb(val | mask, IOMD_IRQMASKC);
106}
107
108static struct irq_chip clps7500_c_chip = {
109 .ack = cl7500_mask_irq_c,
110 .mask = cl7500_mask_irq_c,
111 .unmask = cl7500_unmask_irq_c,
112};
113
114static void cl7500_mask_irq_d(unsigned int irq)
115{
116 unsigned int val, mask;
117
118 mask = 1 << (irq & 7);
119 val = iomd_readb(IOMD_IRQMASKD);
120 iomd_writeb(val & ~mask, IOMD_IRQMASKD);
121}
122
123static void cl7500_unmask_irq_d(unsigned int irq)
124{
125 unsigned int val, mask;
126
127 mask = 1 << (irq & 7);
128 val = iomd_readb(IOMD_IRQMASKD);
129 iomd_writeb(val | mask, IOMD_IRQMASKD);
130}
131
132static struct irq_chip clps7500_d_chip = {
133 .ack = cl7500_mask_irq_d,
134 .mask = cl7500_mask_irq_d,
135 .unmask = cl7500_unmask_irq_d,
136};
137
138static void cl7500_mask_irq_dma(unsigned int irq)
139{
140 unsigned int val, mask;
141
142 mask = 1 << (irq & 7);
143 val = iomd_readb(IOMD_DMAMASK);
144 iomd_writeb(val & ~mask, IOMD_DMAMASK);
145}
146
147static void cl7500_unmask_irq_dma(unsigned int irq)
148{
149 unsigned int val, mask;
150
151 mask = 1 << (irq & 7);
152 val = iomd_readb(IOMD_DMAMASK);
153 iomd_writeb(val | mask, IOMD_DMAMASK);
154}
155
156static struct irq_chip clps7500_dma_chip = {
157 .ack = cl7500_mask_irq_dma,
158 .mask = cl7500_mask_irq_dma,
159 .unmask = cl7500_unmask_irq_dma,
160};
161
162static void cl7500_mask_irq_fiq(unsigned int irq)
163{
164 unsigned int val, mask;
165
166 mask = 1 << (irq & 7);
167 val = iomd_readb(IOMD_FIQMASK);
168 iomd_writeb(val & ~mask, IOMD_FIQMASK);
169}
170
171static void cl7500_unmask_irq_fiq(unsigned int irq)
172{
173 unsigned int val, mask;
174
175 mask = 1 << (irq & 7);
176 val = iomd_readb(IOMD_FIQMASK);
177 iomd_writeb(val | mask, IOMD_FIQMASK);
178}
179
180static struct irq_chip clps7500_fiq_chip = {
181 .ack = cl7500_mask_irq_fiq,
182 .mask = cl7500_mask_irq_fiq,
183 .unmask = cl7500_unmask_irq_fiq,
184};
185
186static void cl7500_no_action(unsigned int irq)
187{
188}
189
190static struct irq_chip clps7500_no_chip = {
191 .ack = cl7500_no_action,
192 .mask = cl7500_no_action,
193 .unmask = cl7500_no_action,
194};
195
196static struct irqaction irq_isa = {
197 .handler = no_action,
198 .mask = CPU_MASK_NONE,
199 .name = "isa",
200};
201
202static void __init clps7500_init_irq(void)
203{
204 unsigned int irq, flags;
205
206 iomd_writeb(0, IOMD_IRQMASKA);
207 iomd_writeb(0, IOMD_IRQMASKB);
208 iomd_writeb(0, IOMD_FIQMASK);
209 iomd_writeb(0, IOMD_DMAMASK);
210
211 for (irq = 0; irq < NR_IRQS; irq++) {
212 flags = IRQF_VALID;
213
214 if (irq <= 6 || (irq >= 9 && irq <= 15) ||
215 (irq >= 48 && irq <= 55))
216 flags |= IRQF_PROBE;
217
218 switch (irq) {
219 case 0 ... 7:
220 set_irq_chip(irq, &clps7500_a_chip);
221 set_irq_handler(irq, handle_level_irq);
222 set_irq_flags(irq, flags);
223 break;
224
225 case 8 ... 15:
226 set_irq_chip(irq, &clps7500_b_chip);
227 set_irq_handler(irq, handle_level_irq);
228 set_irq_flags(irq, flags);
229 break;
230
231 case 16 ... 22:
232 set_irq_chip(irq, &clps7500_dma_chip);
233 set_irq_handler(irq, handle_level_irq);
234 set_irq_flags(irq, flags);
235 break;
236
237 case 24 ... 31:
238 set_irq_chip(irq, &clps7500_c_chip);
239 set_irq_handler(irq, handle_level_irq);
240 set_irq_flags(irq, flags);
241 break;
242
243 case 40 ... 47:
244 set_irq_chip(irq, &clps7500_d_chip);
245 set_irq_handler(irq, handle_level_irq);
246 set_irq_flags(irq, flags);
247 break;
248
249 case 48 ... 55:
250 set_irq_chip(irq, &clps7500_no_chip);
251 set_irq_handler(irq, handle_level_irq);
252 set_irq_flags(irq, flags);
253 break;
254
255 case 64 ... 72:
256 set_irq_chip(irq, &clps7500_fiq_chip);
257 set_irq_handler(irq, handle_level_irq);
258 set_irq_flags(irq, flags);
259 break;
260 }
261 }
262
263 setup_irq(IRQ_ISA, &irq_isa);
264}
265
266static struct map_desc cl7500_io_desc[] __initdata = {
267 { /* IO space */
268 .virtual = (unsigned long)IO_BASE,
269 .pfn = __phys_to_pfn(IO_START),
270 .length = IO_SIZE,
271 .type = MT_DEVICE
272 }, { /* ISA space */
273 .virtual = ISA_BASE,
274 .pfn = __phys_to_pfn(ISA_START),
275 .length = ISA_SIZE,
276 .type = MT_DEVICE
277 }, { /* Flash */
278 .virtual = FLASH_BASE,
279 .pfn = __phys_to_pfn(FLASH_START),
280 .length = FLASH_SIZE,
281 .type = MT_DEVICE
282 }, { /* LED */
283 .virtual = LED_BASE,
284 .pfn = __phys_to_pfn(LED_START),
285 .length = LED_SIZE,
286 .type = MT_DEVICE
287 }
288};
289
290static void __init clps7500_map_io(void)
291{
292 iotable_init(cl7500_io_desc, ARRAY_SIZE(cl7500_io_desc));
293}
294
295extern void ioctime_init(void);
296extern unsigned long ioc_timer_gettimeoffset(void);
297
298static irqreturn_t
299clps7500_timer_interrupt(int irq, void *dev_id)
300{
301 timer_tick();
302
303 /* Why not using do_leds interface?? */
304 {
305 /* Twinkle the lights. */
306 static int count, state = 0xff00;
307 if (count-- == 0) {
308 state ^= 0x100;
309 count = 25;
310 *((volatile unsigned int *)LED_ADDRESS) = state;
311 }
312 }
313
314 return IRQ_HANDLED;
315}
316
317static struct irqaction clps7500_timer_irq = {
318 .name = "CLPS7500 Timer Tick",
319 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
320 .handler = clps7500_timer_interrupt,
321};
322
323/*
324 * Set up timer interrupt.
325 */
326static void __init clps7500_timer_init(void)
327{
328 ioctime_init();
329 setup_irq(IRQ_TIMER, &clps7500_timer_irq);
330}
331
332static struct sys_timer clps7500_timer = {
333 .init = clps7500_timer_init,
334 .offset = ioc_timer_gettimeoffset,
335};
336
337static struct plat_serial8250_port serial_platform_data[] = {
338 {
339 .mapbase = 0x03010fe0,
340 .irq = 10,
341 .uartclk = 1843200,
342 .regshift = 2,
343 .iotype = UPIO_MEM,
344 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SKIP_TEST,
345 },
346 {
347 .mapbase = 0x03010be0,
348 .irq = 0,
349 .uartclk = 1843200,
350 .regshift = 2,
351 .iotype = UPIO_MEM,
352 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SKIP_TEST,
353 },
354 {
355 .iobase = ISASLOT_IO + 0x2e8,
356 .irq = 41,
357 .uartclk = 1843200,
358 .regshift = 0,
359 .iotype = UPIO_PORT,
360 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
361 },
362 {
363 .iobase = ISASLOT_IO + 0x3e8,
364 .irq = 40,
365 .uartclk = 1843200,
366 .regshift = 0,
367 .iotype = UPIO_PORT,
368 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
369 },
370 { },
371};
372
373static struct platform_device serial_device = {
374 .name = "serial8250",
375 .id = PLAT8250_DEV_PLATFORM,
376 .dev = {
377 .platform_data = serial_platform_data,
378 },
379};
380
381static void __init clps7500_init(void)
382{
383 platform_device_register(&serial_device);
384}
385
386MACHINE_START(CLPS7500, "CL-PS7500")
387 /* Maintainer: Philip Blundell */
388 .phys_io = 0x03000000,
389 .io_pg_offst = ((0xe0000000) >> 18) & 0xfffc,
390 .map_io = clps7500_map_io,
391 .init_irq = clps7500_init_irq,
392 .init_machine = clps7500_init,
393 .timer = &clps7500_timer,
394MACHINE_END
395
diff --git a/arch/arm/mach-clps7500/include/mach/acornfb.h b/arch/arm/mach-clps7500/include/mach/acornfb.h
deleted file mode 100644
index aea6330c9745..000000000000
--- a/arch/arm/mach-clps7500/include/mach/acornfb.h
+++ /dev/null
@@ -1,33 +0,0 @@
1#define acornfb_valid_pixrate(var) (var->pixclock >= 39325 && var->pixclock <= 40119)
2
3static inline void
4acornfb_vidc20_find_rates(struct vidc_timing *vidc,
5 struct fb_var_screeninfo *var)
6{
7 u_int bandwidth;
8
9 vidc->control |= VIDC20_CTRL_PIX_CK;
10
11 /* Calculate bandwidth */
12 bandwidth = var->pixclock * 8 / var->bits_per_pixel;
13
14 /* Encode bandwidth as VIDC20 setting */
15 if (bandwidth > 16667*2)
16 vidc->control |= VIDC20_CTRL_FIFO_16;
17 else if (bandwidth > 13333*2)
18 vidc->control |= VIDC20_CTRL_FIFO_20;
19 else if (bandwidth > 11111*2)
20 vidc->control |= VIDC20_CTRL_FIFO_24;
21 else
22 vidc->control |= VIDC20_CTRL_FIFO_28;
23
24 vidc->pll_ctl = 0x2020;
25}
26
27#ifdef CONFIG_CHRONTEL_7003
28#define acornfb_default_control() VIDC20_CTRL_PIX_HCLK
29#else
30#define acornfb_default_control() VIDC20_CTRL_PIX_VCLK
31#endif
32
33#define acornfb_default_econtrol() VIDC20_ECTL_DAC | VIDC20_ECTL_REG(3) | VIDC20_ECTL_ECK
diff --git a/arch/arm/mach-clps7500/include/mach/debug-macro.S b/arch/arm/mach-clps7500/include/mach/debug-macro.S
deleted file mode 100644
index af4104e7e84a..000000000000
--- a/arch/arm/mach-clps7500/include/mach/debug-macro.S
+++ /dev/null
@@ -1,21 +0,0 @@
1/* arch/arm/mach-clps7500/include/mach/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14 .macro addruart,rx
15 mov \rx, #0xe0000000
16 orr \rx, \rx, #0x00010000
17 orr \rx, \rx, #0x00000be0
18 .endm
19
20#define UART_SHIFT 2
21#include <asm/hardware/debug-8250.S>
diff --git a/arch/arm/mach-clps7500/include/mach/dma.h b/arch/arm/mach-clps7500/include/mach/dma.h
deleted file mode 100644
index 63fcde505498..000000000000
--- a/arch/arm/mach-clps7500/include/mach/dma.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/dma.h
3 *
4 * Copyright (C) 1999 Nexus Electronics Ltd.
5 */
6
7#ifndef __ASM_ARCH_DMA_H
8#define __ASM_ARCH_DMA_H
9
10/* DMA is not yet implemented! It should be the same as acorn, copy over.. */
11
12/*
13 * This is the maximum DMA address that can be DMAd to.
14 * There should not be more than (0xd0000000 - 0xc0000000)
15 * bytes of RAM.
16 */
17#define MAX_DMA_ADDRESS 0xd0000000
18
19#define DMA_S0 0
20
21#endif /* _ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-clps7500/include/mach/entry-macro.S b/arch/arm/mach-clps7500/include/mach/entry-macro.S
deleted file mode 100644
index 4e7e54144093..000000000000
--- a/arch/arm/mach-clps7500/include/mach/entry-macro.S
+++ /dev/null
@@ -1,16 +0,0 @@
1#include <mach/hardware.h>
2#include <asm/hardware/entry-macro-iomd.S>
3
4 .equ ioc_base_high, IOC_BASE & 0xff000000
5 .equ ioc_base_low, IOC_BASE & 0x00ff0000
6
7 .macro get_irqnr_preamble, base, tmp
8 mov \base, #ioc_base_high @ point at IOC
9 .if ioc_base_low
10 orr \base, \base, #ioc_base_low
11 .endif
12 .endm
13
14 .macro arch_ret_to_user, tmp1, tmp2
15 .endm
16
diff --git a/arch/arm/mach-clps7500/include/mach/hardware.h b/arch/arm/mach-clps7500/include/mach/hardware.h
deleted file mode 100644
index d66578a3371c..000000000000
--- a/arch/arm/mach-clps7500/include/mach/hardware.h
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/hardware.h
3 *
4 * Copyright (C) 1996-1999 Russell King.
5 * Copyright (C) 1999 Nexus Electronics Ltd.
6 *
7 * This file contains the hardware definitions of the
8 * CL7500 evaluation board.
9 */
10#ifndef __ASM_ARCH_HARDWARE_H
11#define __ASM_ARCH_HARDWARE_H
12
13#include <mach/memory.h>
14#include <asm/hardware/iomd.h>
15
16#ifdef __ASSEMBLY__
17#define IOMEM(x) x
18#else
19#define IOMEM(x) ((void __iomem *)(x))
20#endif
21
22/*
23 * What hardware must be present
24 */
25#define HAS_IOMD
26#define HAS_VIDC20
27
28/* Hardware addresses of major areas.
29 * *_START is the physical address
30 * *_SIZE is the size of the region
31 * *_BASE is the virtual address
32 */
33
34#define IO_START 0x03000000 /* I/O */
35#define IO_SIZE 0x01000000
36#define IO_BASE IOMEM(0xe0000000)
37
38#define ISA_START 0x0c000000 /* ISA */
39#define ISA_SIZE 0x00010000
40#define ISA_BASE 0xe1000000
41
42#define FLASH_START 0x01000000 /* XXX */
43#define FLASH_SIZE 0x01000000
44#define FLASH_BASE 0xe2000000
45
46#define LED_START 0x0302B000
47#define LED_SIZE 0x00001000
48#define LED_BASE 0xe3000000
49#define LED_ADDRESS (LED_BASE + 0xa00)
50
51/* Let's define SCREEN_START for CL7500, even though it's a lie. */
52#define SCREEN_START 0x02000000 /* VRAM */
53#define SCREEN_END 0xdfc00000
54#define SCREEN_BASE 0xdf800000
55
56#define VIDC_BASE (void __iomem *)0xe0400000
57#define IOMD_BASE IOMEM(0xe0200000)
58#define IOC_BASE IOMEM(0xe0200000)
59#define FLOPPYDMA_BASE IOMEM(0xe002a000)
60#define PCIO_BASE IOMEM(0xe0010000)
61
62#define vidc_writel(val) __raw_writel(val, VIDC_BASE)
63
64/* in/out bias for the ISA slot region */
65#define ISASLOT_IO 0x80400000
66
67#endif
diff --git a/arch/arm/mach-clps7500/include/mach/io.h b/arch/arm/mach-clps7500/include/mach/io.h
deleted file mode 100644
index 2ff2860889ed..000000000000
--- a/arch/arm/mach-clps7500/include/mach/io.h
+++ /dev/null
@@ -1,255 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/io.h
3 * from arch/arm/mach-rpc/include/mach/io.h
4 *
5 * Copyright (C) 1997 Russell King
6 *
7 * Modifications:
8 * 06-Dec-1997 RMK Created.
9 */
10#ifndef __ASM_ARM_ARCH_IO_H
11#define __ASM_ARM_ARCH_IO_H
12
13#include <mach/hardware.h>
14
15#define IO_SPACE_LIMIT 0xffffffff
16
17/*
18 * GCC is totally crap at loading/storing data. We try to persuade it
19 * to do the right thing by using these whereever possible instead of
20 * the above.
21 */
22#define __arch_base_getb(b,o) \
23 ({ \
24 unsigned int v, r = (b); \
25 __asm__ __volatile__( \
26 "ldrb %0, [%1, %2]" \
27 : "=r" (v) \
28 : "r" (r), "Ir" (o)); \
29 v; \
30 })
31
32#define __arch_base_getl(b,o) \
33 ({ \
34 unsigned int v, r = (b); \
35 __asm__ __volatile__( \
36 "ldr %0, [%1, %2]" \
37 : "=r" (v) \
38 : "r" (r), "Ir" (o)); \
39 v; \
40 })
41
42#define __arch_base_putb(v,b,o) \
43 ({ \
44 unsigned int r = (b); \
45 __asm__ __volatile__( \
46 "strb %0, [%1, %2]" \
47 : \
48 : "r" (v), "r" (r), "Ir" (o)); \
49 })
50
51#define __arch_base_putl(v,b,o) \
52 ({ \
53 unsigned int r = (b); \
54 __asm__ __volatile__( \
55 "str %0, [%1, %2]" \
56 : \
57 : "r" (v), "r" (r), "Ir" (o)); \
58 })
59
60/*
61 * We use two different types of addressing - PC style addresses, and ARM
62 * addresses. PC style accesses the PC hardware with the normal PC IO
63 * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+
64 * and are translated to the start of IO. Note that all addresses are
65 * shifted left!
66 */
67#define __PORT_PCIO(x) (!((x) & 0x80000000))
68
69/*
70 * Dynamic IO functions - let the compiler
71 * optimize the expressions
72 */
73static inline void __outb (unsigned int value, unsigned int port)
74{
75 unsigned long temp;
76 __asm__ __volatile__(
77 "tst %2, #0x80000000\n\t"
78 "mov %0, %4\n\t"
79 "addeq %0, %0, %3\n\t"
80 "strb %1, [%0, %2, lsl #2] @ outb"
81 : "=&r" (temp)
82 : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
83 : "cc");
84}
85
86static inline void __outw (unsigned int value, unsigned int port)
87{
88 unsigned long temp;
89 __asm__ __volatile__(
90 "tst %2, #0x80000000\n\t"
91 "mov %0, %4\n\t"
92 "addeq %0, %0, %3\n\t"
93 "str %1, [%0, %2, lsl #2] @ outw"
94 : "=&r" (temp)
95 : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
96 : "cc");
97}
98
99static inline void __outl (unsigned int value, unsigned int port)
100{
101 unsigned long temp;
102 __asm__ __volatile__(
103 "tst %2, #0x80000000\n\t"
104 "mov %0, %4\n\t"
105 "addeq %0, %0, %3\n\t"
106 "str %1, [%0, %2, lsl #2] @ outl"
107 : "=&r" (temp)
108 : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
109 : "cc");
110}
111
112#define DECLARE_DYN_IN(sz,fnsuffix,instr) \
113static inline unsigned sz __in##fnsuffix (unsigned int port) \
114{ \
115 unsigned long temp, value; \
116 __asm__ __volatile__( \
117 "tst %2, #0x80000000\n\t" \
118 "mov %0, %4\n\t" \
119 "addeq %0, %0, %3\n\t" \
120 "ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \
121 : "=&r" (temp), "=r" (value) \
122 : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \
123 : "cc"); \
124 return (unsigned sz)value; \
125}
126
127static inline unsigned int __ioaddr (unsigned int port) \
128{ \
129 if (__PORT_PCIO(port)) \
130 return (unsigned int)(PCIO_BASE + (port << 2)); \
131 else \
132 return (unsigned int)(IO_BASE + (port << 2)); \
133}
134
135#define DECLARE_IO(sz,fnsuffix,instr) \
136 DECLARE_DYN_IN(sz,fnsuffix,instr)
137
138DECLARE_IO(char,b,"b")
139DECLARE_IO(short,w,"")
140DECLARE_IO(int,l,"")
141
142#undef DECLARE_IO
143#undef DECLARE_DYN_IN
144
145/*
146 * Constant address IO functions
147 *
148 * These have to be macros for the 'J' constraint to work -
149 * +/-4096 immediate operand.
150 */
151#define __outbc(value,port) \
152({ \
153 if (__PORT_PCIO((port))) \
154 __asm__ __volatile__( \
155 "strb %0, [%1, %2] @ outbc" \
156 : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
157 else \
158 __asm__ __volatile__( \
159 "strb %0, [%1, %2] @ outbc" \
160 : : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \
161})
162
163#define __inbc(port) \
164({ \
165 unsigned char result; \
166 if (__PORT_PCIO((port))) \
167 __asm__ __volatile__( \
168 "ldrb %0, [%1, %2] @ inbc" \
169 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
170 else \
171 __asm__ __volatile__( \
172 "ldrb %0, [%1, %2] @ inbc" \
173 : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
174 result; \
175})
176
177#define __outwc(value,port) \
178({ \
179 unsigned long v = value; \
180 if (__PORT_PCIO((port))) \
181 __asm__ __volatile__( \
182 "str %0, [%1, %2] @ outwc" \
183 : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
184 else \
185 __asm__ __volatile__( \
186 "str %0, [%1, %2] @ outwc" \
187 : : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2)); \
188})
189
190#define __inwc(port) \
191({ \
192 unsigned short result; \
193 if (__PORT_PCIO((port))) \
194 __asm__ __volatile__( \
195 "ldr %0, [%1, %2] @ inwc" \
196 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
197 else \
198 __asm__ __volatile__( \
199 "ldr %0, [%1, %2] @ inwc" \
200 : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
201 result & 0xffff; \
202})
203
204#define __outlc(value,port) \
205({ \
206 unsigned long v = value; \
207 if (__PORT_PCIO((port))) \
208 __asm__ __volatile__( \
209 "str %0, [%1, %2] @ outlc" \
210 : : "r" (v), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
211 else \
212 __asm__ __volatile__( \
213 "str %0, [%1, %2] @ outlc" \
214 : : "r" (v), "r" (IO_BASE), "r" ((port) << 2)); \
215})
216
217#define __inlc(port) \
218({ \
219 unsigned long result; \
220 if (__PORT_PCIO((port))) \
221 __asm__ __volatile__( \
222 "ldr %0, [%1, %2] @ inlc" \
223 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
224 else \
225 __asm__ __volatile__( \
226 "ldr %0, [%1, %2] @ inlc" \
227 : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
228 result; \
229})
230
231#define __ioaddrc(port) \
232 (__PORT_PCIO((port)) ? PCIO_BASE + ((port) << 2) : IO_BASE + ((port) << 2))
233
234#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p))
235#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p))
236#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p))
237#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
238#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
239#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
240#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p))
241/* the following macro is deprecated */
242#define ioaddr(port) __ioaddr((port))
243
244#define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l)
245#define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l)
246
247#define outsb(p,d,l) __raw_writesb(__ioaddr(p),d,l)
248#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l)
249
250/*
251 * 1:1 mapping for ioremapped regions.
252 */
253#define __mem_pci(x) (x)
254
255#endif
diff --git a/arch/arm/mach-clps7500/include/mach/irq.h b/arch/arm/mach-clps7500/include/mach/irq.h
deleted file mode 100644
index d02fcf28ee05..000000000000
--- a/arch/arm/mach-clps7500/include/mach/irq.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/irq.h
3 *
4 * Copyright (C) 1996 Russell King
5 * Copyright (C) 1999, 2001 Nexus Electronics Ltd.
6 *
7 * Changelog:
8 * 10-10-1996 RMK Brought up to date with arch-sa110eval
9 * 22-08-1998 RMK Restructured IRQ routines
10 * 11-08-1999 PJB Created ARM7500 version, derived from RiscPC code
11 */
12
13#include <linux/io.h>
14#include <asm/hardware/iomd.h>
15
16static inline int fixup_irq(unsigned int irq)
17{
18 if (irq == IRQ_ISA) {
19 int isabits = *((volatile unsigned int *)0xe002b700);
20 if (isabits == 0) {
21 printk("Spurious ISA IRQ!\n");
22 return irq;
23 }
24 irq = IRQ_ISA_BASE;
25 while (!(isabits & 1)) {
26 irq++;
27 isabits >>= 1;
28 }
29 }
30
31 return irq;
32}
diff --git a/arch/arm/mach-clps7500/include/mach/irqs.h b/arch/arm/mach-clps7500/include/mach/irqs.h
deleted file mode 100644
index bee66b487f59..000000000000
--- a/arch/arm/mach-clps7500/include/mach/irqs.h
+++ /dev/null
@@ -1,66 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/irqs.h
3 *
4 * Copyright (C) 1999 Nexus Electronics Ltd
5 */
6
7#define IRQ_INT2 0
8#define IRQ_INT1 2
9#define IRQ_VSYNCPULSE 3
10#define IRQ_POWERON 4
11#define IRQ_TIMER0 5
12#define IRQ_TIMER1 6
13#define IRQ_FORCE 7
14#define IRQ_INT8 8
15#define IRQ_ISA 9
16#define IRQ_INT6 10
17#define IRQ_INT5 11
18#define IRQ_INT4 12
19#define IRQ_INT3 13
20#define IRQ_KEYBOARDTX 14
21#define IRQ_KEYBOARDRX 15
22
23#define IRQ_DMA0 16
24#define IRQ_DMA1 17
25#define IRQ_DMA2 18
26#define IRQ_DMA3 19
27#define IRQ_DMAS0 20
28#define IRQ_DMAS1 21
29
30#define IRQ_IOP0 24
31#define IRQ_IOP1 25
32#define IRQ_IOP2 26
33#define IRQ_IOP3 27
34#define IRQ_IOP4 28
35#define IRQ_IOP5 29
36#define IRQ_IOP6 30
37#define IRQ_IOP7 31
38
39#define IRQ_MOUSERX 40
40#define IRQ_MOUSETX 41
41#define IRQ_ADC 42
42#define IRQ_EVENT1 43
43#define IRQ_EVENT2 44
44
45#define IRQ_ISA_BASE 48
46#define IRQ_ISA_3 48
47#define IRQ_ISA_4 49
48#define IRQ_ISA_5 50
49#define IRQ_ISA_7 51
50#define IRQ_ISA_9 52
51#define IRQ_ISA_10 53
52#define IRQ_ISA_11 54
53#define IRQ_ISA_14 55
54
55#define FIQ_INT9 0
56#define FIQ_INT5 1
57#define FIQ_INT6 4
58#define FIQ_INT8 6
59#define FIQ_FORCE 7
60
61/*
62 * This is the offset of the FIQ "IRQ" numbers
63 */
64#define FIQ_START 64
65
66#define IRQ_TIMER IRQ_TIMER0
diff --git a/arch/arm/mach-clps7500/include/mach/memory.h b/arch/arm/mach-clps7500/include/mach/memory.h
deleted file mode 100644
index 87b32db470c8..000000000000
--- a/arch/arm/mach-clps7500/include/mach/memory.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/memory.h
3 *
4 * Copyright (c) 1996,1997,1998 Russell King.
5 *
6 * Changelog:
7 * 20-Oct-1996 RMK Created
8 * 31-Dec-1997 RMK Fixed definitions to reduce warnings
9 * 11-Jan-1998 RMK Uninlined to reduce hits on cache
10 * 08-Feb-1998 RMK Added __virt_to_bus and __bus_to_virt
11 * 21-Mar-1999 RMK Renamed to memory.h
12 * RMK Added TASK_SIZE and PAGE_OFFSET
13 */
14#ifndef __ASM_ARCH_MEMORY_H
15#define __ASM_ARCH_MEMORY_H
16
17/*
18 * Physical DRAM offset.
19 */
20#define PHYS_OFFSET UL(0x10000000)
21
22/*
23 * These are exactly the same on the RiscPC as the
24 * physical memory view.
25 */
26#define __virt_to_bus(x) __virt_to_phys(x)
27#define __bus_to_virt(x) __phys_to_virt(x)
28
29/*
30 * Cache flushing area - ROM
31 */
32#define FLUSH_BASE_PHYS 0x00000000
33#define FLUSH_BASE 0xdf000000
34
35/*
36 * Sparsemem support. Each section is a maximum of 64MB. The sections
37 * are offset by 128MB and can cover 128MB, so that gives us a maximum
38 * of 29 physmem bits.
39 */
40#define MAX_PHYSMEM_BITS 29
41#define SECTION_SIZE_BITS 26
42
43#endif
diff --git a/arch/arm/mach-clps7500/include/mach/system.h b/arch/arm/mach-clps7500/include/mach/system.h
deleted file mode 100644
index 6d325fbe8b08..000000000000
--- a/arch/arm/mach-clps7500/include/mach/system.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/system.h
3 *
4 * Copyright (c) 1999 Nexus Electronics Ltd.
5 */
6#ifndef __ASM_ARCH_SYSTEM_H
7#define __ASM_ARCH_SYSTEM_H
8
9#include <linux/io.h>
10#include <asm/hardware/iomd.h>
11
12static inline void arch_idle(void)
13{
14 iomd_writeb(0, IOMD_SUSMODE);
15}
16
17#define arch_reset(mode) \
18 do { \
19 iomd_writeb(0, IOMD_ROMCR0); \
20 cpu_reset(0); \
21 } while (0)
22
23#endif
diff --git a/arch/arm/mach-clps7500/include/mach/timex.h b/arch/arm/mach-clps7500/include/mach/timex.h
deleted file mode 100644
index dfaa9b425757..000000000000
--- a/arch/arm/mach-clps7500/include/mach/timex.h
+++ /dev/null
@@ -1,13 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/timex.h
3 *
4 * CL7500 architecture timex specifications
5 *
6 * Copyright (C) 1999 Nexus Electronics Ltd
7 */
8
9/*
10 * On the ARM7500, the clock ticks at 2MHz.
11 */
12#define CLOCK_TICK_RATE 2000000
13
diff --git a/arch/arm/mach-clps7500/include/mach/uncompress.h b/arch/arm/mach-clps7500/include/mach/uncompress.h
deleted file mode 100644
index d7d0af4b49fc..000000000000
--- a/arch/arm/mach-clps7500/include/mach/uncompress.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/uncompress.h
3 *
4 * Copyright (C) 1999, 2000 Nexus Electronics Ltd.
5 */
6#define BASE 0x03010000
7#define SERBASE (BASE + (0x2f8 << 2))
8
9static inline void putc(char c)
10{
11 while (!(*((volatile unsigned int *)(SERBASE + 0x14)) & 0x20))
12 barrier();
13
14 *((volatile unsigned int *)(SERBASE)) = c;
15}
16
17static inline void flush(void)
18{
19}
20
21static __inline__ void arch_decomp_setup(void)
22{
23 int baud = 3686400 / (9600 * 32);
24
25 *((volatile unsigned int *)(SERBASE + 0xC)) = 0x80;
26 *((volatile unsigned int *)(SERBASE + 0x0)) = baud & 0xff;
27 *((volatile unsigned int *)(SERBASE + 0x4)) = (baud & 0xff00) >> 8;
28 *((volatile unsigned int *)(SERBASE + 0xC)) = 3; /* 8 bits */
29 *((volatile unsigned int *)(SERBASE + 0x10)) = 3; /* DTR, RTS */
30}
31
32/*
33 * nothing to do
34 */
35#define arch_decomp_wdog()
diff --git a/arch/arm/mach-clps7500/include/mach/vmalloc.h b/arch/arm/mach-clps7500/include/mach/vmalloc.h
deleted file mode 100644
index 8fc5406d1b6d..000000000000
--- a/arch/arm/mach-clps7500/include/mach/vmalloc.h
+++ /dev/null
@@ -1,4 +0,0 @@
1/*
2 * arch/arm/mach-clps7500/include/mach/vmalloc.h
3 */
4#define VMALLOC_END (PAGE_OFFSET + 0x1c000000)
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index de53f0be71b9..48345fb34613 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -26,6 +26,7 @@
26#include <linux/serial_core.h> 26#include <linux/serial_core.h>
27#include <linux/device.h> 27#include <linux/device.h>
28#include <linux/mm.h> 28#include <linux/mm.h>
29#include <linux/dma-mapping.h>
29#include <linux/time.h> 30#include <linux/time.h>
30#include <linux/timex.h> 31#include <linux/timex.h>
31#include <linux/delay.h> 32#include <linux/delay.h>
@@ -449,12 +450,13 @@ static struct resource ep93xx_ohci_resources[] = {
449 }, 450 },
450}; 451};
451 452
453
452static struct platform_device ep93xx_ohci_device = { 454static struct platform_device ep93xx_ohci_device = {
453 .name = "ep93xx-ohci", 455 .name = "ep93xx-ohci",
454 .id = -1, 456 .id = -1,
455 .dev = { 457 .dev = {
456 .dma_mask = (void *)0xffffffff, 458 .dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask,
457 .coherent_dma_mask = 0xffffffff, 459 .coherent_dma_mask = DMA_BIT_MASK(32),
458 }, 460 },
459 .num_resources = ARRAY_SIZE(ep93xx_ohci_resources), 461 .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
460 .resource = ep93xx_ohci_resources, 462 .resource = ep93xx_ohci_resources,
diff --git a/arch/arm/mach-h720x/include/mach/boards.h b/arch/arm/mach-h720x/include/mach/boards.h
index 079b279e1242..38b8e0d61fbf 100644
--- a/arch/arm/mach-h720x/include/mach/boards.h
+++ b/arch/arm/mach-h720x/include/mach/boards.h
@@ -19,9 +19,9 @@
19#ifdef CONFIG_ARCH_H7202 19#ifdef CONFIG_ARCH_H7202
20 20
21/* FLASH */ 21/* FLASH */
22#define FLASH_VIRT 0xd0000000 22#define H720X_FLASH_VIRT 0xd0000000
23#define FLASH_PHYS 0x00000000 23#define H720X_FLASH_PHYS 0x00000000
24#define FLASH_SIZE 0x02000000 24#define H720X_FLASH_SIZE 0x02000000
25 25
26/* onboard LAN controller */ 26/* onboard LAN controller */
27# define ETH0_PHYS 0x08000000 27# define ETH0_PHYS 0x08000000
diff --git a/arch/arm/mach-imx/include/mach/gpio.h b/arch/arm/mach-imx/include/mach/gpio.h
index 6e3d795f2264..502d5aa2c093 100644
--- a/arch/arm/mach-imx/include/mach/gpio.h
+++ b/arch/arm/mach-imx/include/mach/gpio.h
@@ -1,5 +1,6 @@
1#ifndef _IMX_GPIO_H 1#ifndef _IMX_GPIO_H
2 2
3#include <linux/kernel.h>
3#include <mach/imx-regs.h> 4#include <mach/imx-regs.h>
4 5
5#define IMX_GPIO_ALLOC_MODE_NORMAL 0 6#define IMX_GPIO_ALLOC_MODE_NORMAL 0
@@ -63,6 +64,8 @@ static inline int gpio_request(unsigned gpio, const char *label)
63 64
64static inline void gpio_free(unsigned gpio) 65static inline void gpio_free(unsigned gpio)
65{ 66{
67 might_sleep();
68
66 imx_gpio_free(gpio); 69 imx_gpio_free(gpio);
67} 70}
68 71
diff --git a/arch/arm/mach-integrator/clock.c b/arch/arm/mach-integrator/clock.c
index 8d761fdd2ecd..989ecf5f5c46 100644
--- a/arch/arm/mach-integrator/clock.c
+++ b/arch/arm/mach-integrator/clock.c
@@ -10,42 +10,12 @@
10 */ 10 */
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/list.h>
14#include <linux/errno.h> 13#include <linux/errno.h>
15#include <linux/err.h>
16#include <linux/string.h>
17#include <linux/clk.h> 14#include <linux/clk.h>
18#include <linux/mutex.h> 15#include <linux/mutex.h>
19 16
20#include <asm/hardware/icst525.h> 17#include <asm/clkdev.h>
21 18#include <mach/clkdev.h>
22#include "clock.h"
23
24static LIST_HEAD(clocks);
25static DEFINE_MUTEX(clocks_mutex);
26
27struct clk *clk_get(struct device *dev, const char *id)
28{
29 struct clk *p, *clk = ERR_PTR(-ENOENT);
30
31 mutex_lock(&clocks_mutex);
32 list_for_each_entry(p, &clocks, node) {
33 if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
34 clk = p;
35 break;
36 }
37 }
38 mutex_unlock(&clocks_mutex);
39
40 return clk;
41}
42EXPORT_SYMBOL(clk_get);
43
44void clk_put(struct clk *clk)
45{
46 module_put(clk->owner);
47}
48EXPORT_SYMBOL(clk_put);
49 19
50int clk_enable(struct clk *clk) 20int clk_enable(struct clk *clk)
51{ 21{
@@ -67,7 +37,6 @@ EXPORT_SYMBOL(clk_get_rate);
67long clk_round_rate(struct clk *clk, unsigned long rate) 37long clk_round_rate(struct clk *clk, unsigned long rate)
68{ 38{
69 struct icst525_vco vco; 39 struct icst525_vco vco;
70
71 vco = icst525_khz_to_vco(clk->params, rate / 1000); 40 vco = icst525_khz_to_vco(clk->params, rate / 1000);
72 return icst525_khz(clk->params, vco) * 1000; 41 return icst525_khz(clk->params, vco) * 1000;
73} 42}
@@ -76,56 +45,15 @@ EXPORT_SYMBOL(clk_round_rate);
76int clk_set_rate(struct clk *clk, unsigned long rate) 45int clk_set_rate(struct clk *clk, unsigned long rate)
77{ 46{
78 int ret = -EIO; 47 int ret = -EIO;
48
79 if (clk->setvco) { 49 if (clk->setvco) {
80 struct icst525_vco vco; 50 struct icst525_vco vco;
81 51
82 vco = icst525_khz_to_vco(clk->params, rate / 1000); 52 vco = icst525_khz_to_vco(clk->params, rate / 1000);
83 clk->rate = icst525_khz(clk->params, vco) * 1000; 53 clk->rate = icst525_khz(clk->params, vco) * 1000;
84
85 printk("Clock %s: setting VCO reg params: S=%d R=%d V=%d\n",
86 clk->name, vco.s, vco.r, vco.v);
87
88 clk->setvco(clk, vco); 54 clk->setvco(clk, vco);
89 ret = 0; 55 ret = 0;
90 } 56 }
91 return 0; 57 return ret;
92} 58}
93EXPORT_SYMBOL(clk_set_rate); 59EXPORT_SYMBOL(clk_set_rate);
94
95/*
96 * These are fixed clocks.
97 */
98static struct clk kmi_clk = {
99 .name = "KMIREFCLK",
100 .rate = 24000000,
101};
102
103static struct clk uart_clk = {
104 .name = "UARTCLK",
105 .rate = 14745600,
106};
107
108int clk_register(struct clk *clk)
109{
110 mutex_lock(&clocks_mutex);
111 list_add(&clk->node, &clocks);
112 mutex_unlock(&clocks_mutex);
113 return 0;
114}
115EXPORT_SYMBOL(clk_register);
116
117void clk_unregister(struct clk *clk)
118{
119 mutex_lock(&clocks_mutex);
120 list_del(&clk->node);
121 mutex_unlock(&clocks_mutex);
122}
123EXPORT_SYMBOL(clk_unregister);
124
125static int __init clk_init(void)
126{
127 clk_register(&kmi_clk);
128 clk_register(&uart_clk);
129 return 0;
130}
131arch_initcall(clk_init);
diff --git a/arch/arm/mach-integrator/clock.h b/arch/arm/mach-integrator/clock.h
index 09e6328ceba9..e69de29bb2d1 100644
--- a/arch/arm/mach-integrator/clock.h
+++ b/arch/arm/mach-integrator/clock.h
@@ -1,25 +0,0 @@
1/*
2 * linux/arch/arm/mach-integrator/clock.h
3 *
4 * Copyright (C) 2004 ARM Limited.
5 * Written by Deep Blue Solutions Limited.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11struct module;
12struct icst525_params;
13
14struct clk {
15 struct list_head node;
16 unsigned long rate;
17 struct module *owner;
18 const char *name;
19 const struct icst525_params *params;
20 void *data;
21 void (*setvco)(struct clk *, struct icst525_vco vco);
22};
23
24int clk_register(struct clk *clk);
25void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 595b7392ee4e..c89c949b4d45 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -21,6 +21,8 @@
21#include <linux/amba/serial.h> 21#include <linux/amba/serial.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <asm/clkdev.h>
25#include <mach/clkdev.h>
24#include <mach/hardware.h> 26#include <mach/hardware.h>
25#include <asm/irq.h> 27#include <asm/irq.h>
26#include <asm/hardware/arm_timer.h> 28#include <asm/hardware/arm_timer.h>
@@ -108,10 +110,43 @@ static struct amba_device *amba_devs[] __initdata = {
108 &kmi1_device, 110 &kmi1_device,
109}; 111};
110 112
113/*
114 * These are fixed clocks.
115 */
116static struct clk clk24mhz = {
117 .rate = 24000000,
118};
119
120static struct clk uartclk = {
121 .rate = 14745600,
122};
123
124static struct clk_lookup lookups[] __initdata = {
125 { /* UART0 */
126 .dev_id = "mb:16",
127 .clk = &uartclk,
128 }, { /* UART1 */
129 .dev_id = "mb:17",
130 .clk = &uartclk,
131 }, { /* KMI0 */
132 .dev_id = "mb:18",
133 .clk = &clk24mhz,
134 }, { /* KMI1 */
135 .dev_id = "mb:19",
136 .clk = &clk24mhz,
137 }, { /* MMCI - IntegratorCP */
138 .dev_id = "mb:1c",
139 .clk = &uartclk,
140 }
141};
142
111static int __init integrator_init(void) 143static int __init integrator_init(void)
112{ 144{
113 int i; 145 int i;
114 146
147 for (i = 0; i < ARRAY_SIZE(lookups); i++)
148 clkdev_add(&lookups[i]);
149
115 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { 150 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
116 struct amba_device *d = amba_devs[i]; 151 struct amba_device *d = amba_devs[i];
117 amba_device_register(d, &iomem_resource); 152 amba_device_register(d, &iomem_resource);
diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c
index 172299a78302..0058c937719e 100644
--- a/arch/arm/mach-integrator/impd1.c
+++ b/arch/arm/mach-integrator/impd1.c
@@ -22,13 +22,13 @@
22#include <linux/amba/clcd.h> 22#include <linux/amba/clcd.h>
23#include <linux/io.h> 23#include <linux/io.h>
24 24
25#include <asm/clkdev.h>
26#include <mach/clkdev.h>
25#include <asm/hardware/icst525.h> 27#include <asm/hardware/icst525.h>
26#include <mach/lm.h> 28#include <mach/lm.h>
27#include <mach/impd1.h> 29#include <mach/impd1.h>
28#include <asm/sizes.h> 30#include <asm/sizes.h>
29 31
30#include "clock.h"
31
32static int module_id; 32static int module_id;
33 33
34module_param_named(lmid, module_id, int, 0444); 34module_param_named(lmid, module_id, int, 0444);
@@ -37,6 +37,7 @@ MODULE_PARM_DESC(lmid, "logic module stack position");
37struct impd1_module { 37struct impd1_module {
38 void __iomem *base; 38 void __iomem *base;
39 struct clk vcos[2]; 39 struct clk vcos[2];
40 struct clk_lookup *clks[3];
40}; 41};
41 42
42static const struct icst525_params impd1_vco_params = { 43static const struct icst525_params impd1_vco_params = {
@@ -339,9 +340,8 @@ static struct impd1_device impd1_devs[] = {
339 } 340 }
340}; 341};
341 342
342static const char *impd1_vconames[2] = { 343static struct clk fixed_14745600 = {
343 "CLCDCLK", 344 .rate = 14745600,
344 "AUXVCO2",
345}; 345};
346 346
347static int impd1_probe(struct lm_device *dev) 347static int impd1_probe(struct lm_device *dev)
@@ -374,14 +374,20 @@ static int impd1_probe(struct lm_device *dev)
374 374
375 for (i = 0; i < ARRAY_SIZE(impd1->vcos); i++) { 375 for (i = 0; i < ARRAY_SIZE(impd1->vcos); i++) {
376 impd1->vcos[i].owner = THIS_MODULE, 376 impd1->vcos[i].owner = THIS_MODULE,
377 impd1->vcos[i].name = impd1_vconames[i],
378 impd1->vcos[i].params = &impd1_vco_params, 377 impd1->vcos[i].params = &impd1_vco_params,
379 impd1->vcos[i].data = impd1, 378 impd1->vcos[i].data = impd1,
380 impd1->vcos[i].setvco = impd1_setvco; 379 impd1->vcos[i].setvco = impd1_setvco;
381
382 clk_register(&impd1->vcos[i]);
383 } 380 }
384 381
382 impd1->clks[0] = clkdev_alloc(&impd1->vcos[0], NULL, "lm%x:01000",
383 dev->id);
384 impd1->clks[1] = clkdev_alloc(&fixed_14745600, NULL, "lm%x:00100",
385 dev->id);
386 impd1->clks[2] = clkdev_alloc(&fixed_14745600, NULL, "lm%x:00200",
387 dev->id);
388 for (i = 0; i < ARRAY_SIZE(impd1->clks); i++)
389 clkdev_add(impd1->clks[i]);
390
385 for (i = 0; i < ARRAY_SIZE(impd1_devs); i++) { 391 for (i = 0; i < ARRAY_SIZE(impd1_devs); i++) {
386 struct impd1_device *idev = impd1_devs + i; 392 struct impd1_device *idev = impd1_devs + i;
387 struct amba_device *d; 393 struct amba_device *d;
@@ -434,8 +440,8 @@ static void impd1_remove(struct lm_device *dev)
434 440
435 device_for_each_child(&dev->dev, NULL, impd1_remove_one); 441 device_for_each_child(&dev->dev, NULL, impd1_remove_one);
436 442
437 for (i = 0; i < ARRAY_SIZE(impd1->vcos); i++) 443 for (i = 0; i < ARRAY_SIZE(impd1->clks); i++)
438 clk_unregister(&impd1->vcos[i]); 444 clkdev_drop(impd1->clks[i]);
439 445
440 lm_set_drvdata(dev, NULL); 446 lm_set_drvdata(dev, NULL);
441 447
diff --git a/arch/arm/mach-integrator/include/mach/clkdev.h b/arch/arm/mach-integrator/include/mach/clkdev.h
new file mode 100644
index 000000000000..9293e410832a
--- /dev/null
+++ b/arch/arm/mach-integrator/include/mach/clkdev.h
@@ -0,0 +1,25 @@
1#ifndef __ASM_MACH_CLKDEV_H
2#define __ASM_MACH_CLKDEV_H
3
4#include <linux/module.h>
5#include <asm/hardware/icst525.h>
6
7struct clk {
8 unsigned long rate;
9 struct module *owner;
10 const struct icst525_params *params;
11 void *data;
12 void (*setvco)(struct clk *, struct icst525_vco vco);
13};
14
15static inline int __clk_get(struct clk *clk)
16{
17 return try_module_get(clk->owner);
18}
19
20static inline void __clk_put(struct clk *clk)
21{
22 module_put(clk->owner);
23}
24
25#endif
diff --git a/arch/arm/mach-integrator/include/mach/platform.h b/arch/arm/mach-integrator/include/mach/platform.h
index 028b87839c0f..e00a2624f269 100644
--- a/arch/arm/mach-integrator/include/mach/platform.h
+++ b/arch/arm/mach-integrator/include/mach/platform.h
@@ -408,27 +408,10 @@
408#define uHAL_MEMORY_SIZE INTEGRATOR_SSRAM_SIZE 408#define uHAL_MEMORY_SIZE INTEGRATOR_SSRAM_SIZE
409 409
410/* 410/*
411 * Application Flash
412 *
413 */
414#define FLASH_BASE INTEGRATOR_FLASH_BASE
415#define FLASH_SIZE INTEGRATOR_FLASH_SIZE
416#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1)
417#define FLASH_BLOCK_SIZE SZ_128K
418
419/*
420 * Boot Flash
421 *
422 */
423#define EPROM_BASE INTEGRATOR_BOOT_ROM_HI
424#define EPROM_SIZE INTEGRATOR_BOOT_ROM_SIZE
425#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1)
426
427/*
428 * Clean base - dummy 411 * Clean base - dummy
429 * 412 *
430 */ 413 */
431#define CLEAN_BASE EPROM_BASE 414#define CLEAN_BASE INTEGRATOR_BOOT_ROM_HI
432 415
433/* 416/*
434 * Timer definitions 417 * Timer definitions
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 88026ccd5ac9..427c2d8dc123 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -21,6 +21,8 @@
21#include <linux/amba/clcd.h> 21#include <linux/amba/clcd.h>
22#include <linux/io.h> 22#include <linux/io.h>
23 23
24#include <asm/clkdev.h>
25#include <mach/clkdev.h>
24#include <mach/hardware.h> 26#include <mach/hardware.h>
25#include <asm/irq.h> 27#include <asm/irq.h>
26#include <asm/setup.h> 28#include <asm/setup.h>
@@ -38,7 +40,6 @@
38#include <asm/mach/time.h> 40#include <asm/mach/time.h>
39 41
40#include "common.h" 42#include "common.h"
41#include "clock.h"
42 43
43#define INTCP_PA_MMC_BASE 0x1c000000 44#define INTCP_PA_MMC_BASE 0x1c000000
44#define INTCP_PA_AACI_BASE 0x1d000000 45#define INTCP_PA_AACI_BASE 0x1d000000
@@ -289,15 +290,16 @@ static void cp_auxvco_set(struct clk *clk, struct icst525_vco vco)
289 writel(0, CM_LOCK); 290 writel(0, CM_LOCK);
290} 291}
291 292
292static struct clk cp_clcd_clk = { 293static struct clk cp_auxclk = {
293 .name = "CLCDCLK",
294 .params = &cp_auxvco_params, 294 .params = &cp_auxvco_params,
295 .setvco = cp_auxvco_set, 295 .setvco = cp_auxvco_set,
296}; 296};
297 297
298static struct clk cp_mmci_clk = { 298static struct clk_lookup cp_lookups[] = {
299 .name = "MCLK", 299 { /* CLCD */
300 .rate = 14745600, 300 .dev_id = "mb:c0",
301 .clk = &cp_auxclk,
302 },
301}; 303};
302 304
303/* 305/*
@@ -554,8 +556,8 @@ static void __init intcp_init(void)
554{ 556{
555 int i; 557 int i;
556 558
557 clk_register(&cp_clcd_clk); 559 for (i = 0; i < ARRAY_SIZE(cp_lookups); i++)
558 clk_register(&cp_mmci_clk); 560 clkdev_add(&cp_lookups[i]);
559 561
560 platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs)); 562 platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs));
561 563
diff --git a/arch/arm/mach-iop13xx/include/mach/adma.h b/arch/arm/mach-iop13xx/include/mach/adma.h
index 60019c8e6465..5722e86f2174 100644
--- a/arch/arm/mach-iop13xx/include/mach/adma.h
+++ b/arch/arm/mach-iop13xx/include/mach/adma.h
@@ -404,7 +404,8 @@ static inline void iop_desc_set_next_desc(struct iop_adma_desc_slot *desc,
404 u32 next_desc_addr) 404 u32 next_desc_addr)
405{ 405{
406 struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; 406 struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc;
407 BUG_ON(hw_desc->next_desc); 407
408 iop_paranoia(hw_desc->next_desc);
408 hw_desc->next_desc = next_desc_addr; 409 hw_desc->next_desc = next_desc_addr;
409} 410}
410 411
diff --git a/arch/arm/mach-ixp4xx/include/mach/gpio.h b/arch/arm/mach-ixp4xx/include/mach/gpio.h
index 9fbde177920f..cd5aec26c072 100644
--- a/arch/arm/mach-ixp4xx/include/mach/gpio.h
+++ b/arch/arm/mach-ixp4xx/include/mach/gpio.h
@@ -25,6 +25,7 @@
25#ifndef __ASM_ARCH_IXP4XX_GPIO_H 25#ifndef __ASM_ARCH_IXP4XX_GPIO_H
26#define __ASM_ARCH_IXP4XX_GPIO_H 26#define __ASM_ARCH_IXP4XX_GPIO_H
27 27
28#include <linux/kernel.h>
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29 30
30static inline int gpio_request(unsigned gpio, const char *label) 31static inline int gpio_request(unsigned gpio, const char *label)
@@ -34,6 +35,8 @@ static inline int gpio_request(unsigned gpio, const char *label)
34 35
35static inline void gpio_free(unsigned gpio) 36static inline void gpio_free(unsigned gpio)
36{ 37{
38 might_sleep();
39
37 return; 40 return;
38} 41}
39 42
diff --git a/arch/arm/mach-ks8695/include/mach/gpio.h b/arch/arm/mach-ks8695/include/mach/gpio.h
index 73c84168761c..d4af5c335f16 100644
--- a/arch/arm/mach-ks8695/include/mach/gpio.h
+++ b/arch/arm/mach-ks8695/include/mach/gpio.h
@@ -11,6 +11,8 @@
11#ifndef __ASM_ARCH_GPIO_H_ 11#ifndef __ASM_ARCH_GPIO_H_
12#define __ASM_ARCH_GPIO_H_ 12#define __ASM_ARCH_GPIO_H_
13 13
14#include <linux/kernel.h>
15
14#define KS8695_GPIO_0 0 16#define KS8695_GPIO_0 0
15#define KS8695_GPIO_1 1 17#define KS8695_GPIO_1 1
16#define KS8695_GPIO_2 2 18#define KS8695_GPIO_2 2
@@ -74,6 +76,7 @@ static inline int gpio_request(unsigned int pin, const char *label)
74 76
75static inline void gpio_free(unsigned int pin) 77static inline void gpio_free(unsigned int pin)
76{ 78{
79 might_sleep();
77} 80}
78 81
79#endif 82#endif
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c
index 1be4a390c63f..f902a7c37c31 100644
--- a/arch/arm/mach-mx3/mx31ads.c
+++ b/arch/arm/mach-mx3/mx31ads.c
@@ -35,6 +35,8 @@
35#include <mach/imx-uart.h> 35#include <mach/imx-uart.h>
36#include <mach/iomux-mx3.h> 36#include <mach/iomux-mx3.h>
37 37
38#include "devices.h"
39
38/*! 40/*!
39 * @file mx31ads.c 41 * @file mx31ads.c
40 * 42 *
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c
index 11fda95c86a5..843f68c8ead1 100644
--- a/arch/arm/mach-mx3/pcm037.c
+++ b/arch/arm/mach-mx3/pcm037.c
@@ -91,12 +91,12 @@ static struct map_desc pcm037_io_desc[] __initdata = {
91 .virtual = AIPS1_BASE_ADDR_VIRT, 91 .virtual = AIPS1_BASE_ADDR_VIRT,
92 .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), 92 .pfn = __phys_to_pfn(AIPS1_BASE_ADDR),
93 .length = AIPS1_SIZE, 93 .length = AIPS1_SIZE,
94 .type = MT_DEVICE 94 .type = MT_DEVICE_NONSHARED
95 }, { 95 }, {
96 .virtual = AIPS2_BASE_ADDR_VIRT, 96 .virtual = AIPS2_BASE_ADDR_VIRT,
97 .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), 97 .pfn = __phys_to_pfn(AIPS2_BASE_ADDR),
98 .length = AIPS2_SIZE, 98 .length = AIPS2_SIZE,
99 .type = MT_DEVICE 99 .type = MT_DEVICE_NONSHARED
100 }, 100 },
101}; 101};
102 102
diff --git a/arch/arm/mach-ns9xxx/gpio.c b/arch/arm/mach-ns9xxx/gpio.c
index 5241e6a286cc..5503ca09c4ae 100644
--- a/arch/arm/mach-ns9xxx/gpio.c
+++ b/arch/arm/mach-ns9xxx/gpio.c
@@ -8,6 +8,7 @@
8 * under the terms of the GNU General Public License version 2 as published by 8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation. 9 * the Free Software Foundation.
10 */ 10 */
11#include <linux/kernel.h>
11#include <linux/compiler.h> 12#include <linux/compiler.h>
12#include <linux/init.h> 13#include <linux/init.h>
13#include <linux/spinlock.h> 14#include <linux/spinlock.h>
@@ -63,6 +64,7 @@ EXPORT_SYMBOL(gpio_request);
63 64
64void gpio_free(unsigned gpio) 65void gpio_free(unsigned gpio)
65{ 66{
67 might_sleep();
66 clear_bit(gpio, gpiores); 68 clear_bit(gpio, gpiores);
67 return; 69 return;
68} 70}
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index 79f0b1f8497b..10a301e32434 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -4,16 +4,19 @@ comment "OMAP Core Type"
4config ARCH_OMAP730 4config ARCH_OMAP730
5 depends on ARCH_OMAP1 5 depends on ARCH_OMAP1
6 bool "OMAP730 Based System" 6 bool "OMAP730 Based System"
7 select CPU_ARM926T
7 select ARCH_OMAP_OTG 8 select ARCH_OMAP_OTG
8 9
9config ARCH_OMAP15XX 10config ARCH_OMAP15XX
10 depends on ARCH_OMAP1 11 depends on ARCH_OMAP1
11 default y 12 default y
12 bool "OMAP15xx Based System" 13 bool "OMAP15xx Based System"
14 select CPU_ARM925T
13 15
14config ARCH_OMAP16XX 16config ARCH_OMAP16XX
15 depends on ARCH_OMAP1 17 depends on ARCH_OMAP1
16 bool "OMAP16xx Based System" 18 bool "OMAP16xx Based System"
19 select CPU_ARM926T
17 select ARCH_OMAP_OTG 20 select ARCH_OMAP_OTG
18 21
19comment "OMAP Board Type" 22comment "OMAP Board Type"
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 763bdbeaf681..2249049c1d5a 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -429,18 +429,16 @@ void __init gpmc_init(void)
429 gpmc_l3_clk = clk_get(NULL, ck); 429 gpmc_l3_clk = clk_get(NULL, ck);
430 if (IS_ERR(gpmc_l3_clk)) { 430 if (IS_ERR(gpmc_l3_clk)) {
431 printk(KERN_ERR "Could not get GPMC clock %s\n", ck); 431 printk(KERN_ERR "Could not get GPMC clock %s\n", ck);
432 return -ENODEV; 432 BUG();
433 } 433 }
434 434
435 gpmc_base = ioremap(l, SZ_4K); 435 gpmc_base = ioremap(l, SZ_4K);
436 if (!gpmc_base) { 436 if (!gpmc_base) {
437 clk_put(gpmc_l3_clk); 437 clk_put(gpmc_l3_clk);
438 printk(KERN_ERR "Could not get GPMC register memory\n"); 438 printk(KERN_ERR "Could not get GPMC register memory\n");
439 return -ENOMEM; 439 BUG();
440 } 440 }
441 441
442 BUG_ON(IS_ERR(gpmc_l3_clk));
443
444 l = gpmc_read_reg(GPMC_REVISION); 442 l = gpmc_read_reg(GPMC_REVISION);
445 printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); 443 printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f);
446 /* Set smart idle mode and automatic L3 clock gating */ 444 /* Set smart idle mode and automatic L3 clock gating */
diff --git a/arch/arm/mach-orion5x/gpio.c b/arch/arm/mach-orion5x/gpio.c
index fc419868e39f..f99d08811e5a 100644
--- a/arch/arm/mach-orion5x/gpio.c
+++ b/arch/arm/mach-orion5x/gpio.c
@@ -165,6 +165,8 @@ EXPORT_SYMBOL(gpio_request);
165 165
166void gpio_free(unsigned pin) 166void gpio_free(unsigned pin)
167{ 167{
168 might_sleep();
169
168 if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { 170 if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) {
169 pr_debug("%s: invalid GPIO %d\n", __func__, pin); 171 pr_debug("%s: invalid GPIO %d\n", __func__, pin);
170 return; 172 return;
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index a062235e83a8..740f0a382bac 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -386,16 +386,19 @@ endmenu
386 386
387config PXA25x 387config PXA25x
388 bool 388 bool
389 select CPU_XSCALE
389 help 390 help
390 Select code specific to PXA21x/25x/26x variants 391 Select code specific to PXA21x/25x/26x variants
391 392
392config PXA27x 393config PXA27x
393 bool 394 bool
395 select CPU_XSCALE
394 help 396 help
395 Select code specific to PXA27x variants 397 Select code specific to PXA27x variants
396 398
397config PXA3xx 399config PXA3xx
398 bool 400 bool
401 select CPU_XSC3
399 help 402 help
400 Select code specific to PXA3xx variants 403 Select code specific to PXA3xx variants
401 404
diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c
index ca8e20538157..a3e0e1989a6b 100644
--- a/arch/arm/mach-pxa/clock.c
+++ b/arch/arm/mach-pxa/clock.c
@@ -12,6 +12,7 @@
12#include <linux/platform_device.h> 12#include <linux/platform_device.h>
13#include <linux/delay.h> 13#include <linux/delay.h>
14 14
15#include <asm/clkdev.h>
15#include <mach/pxa2xx-regs.h> 16#include <mach/pxa2xx-regs.h>
16#include <mach/pxa2xx-gpio.h> 17#include <mach/pxa2xx-gpio.h>
17#include <mach/hardware.h> 18#include <mach/hardware.h>
@@ -20,45 +21,8 @@
20#include "generic.h" 21#include "generic.h"
21#include "clock.h" 22#include "clock.h"
22 23
23static LIST_HEAD(clocks);
24static DEFINE_MUTEX(clocks_mutex);
25static DEFINE_SPINLOCK(clocks_lock); 24static DEFINE_SPINLOCK(clocks_lock);
26 25
27static struct clk *clk_lookup(struct device *dev, const char *id)
28{
29 struct clk *p;
30
31 list_for_each_entry(p, &clocks, node)
32 if (strcmp(id, p->name) == 0 && p->dev == dev)
33 return p;
34
35 return NULL;
36}
37
38struct clk *clk_get(struct device *dev, const char *id)
39{
40 struct clk *p, *clk = ERR_PTR(-ENOENT);
41
42 mutex_lock(&clocks_mutex);
43 p = clk_lookup(dev, id);
44 if (!p)
45 p = clk_lookup(NULL, id);
46 if (p)
47 clk = p;
48 mutex_unlock(&clocks_mutex);
49
50 if (!IS_ERR(clk) && clk->ops == NULL)
51 clk = clk->other;
52
53 return clk;
54}
55EXPORT_SYMBOL(clk_get);
56
57void clk_put(struct clk *clk)
58{
59}
60EXPORT_SYMBOL(clk_put);
61
62int clk_enable(struct clk *clk) 26int clk_enable(struct clk *clk)
63{ 27{
64 unsigned long flags; 28 unsigned long flags;
@@ -116,37 +80,27 @@ const struct clkops clk_cken_ops = {
116 .disable = clk_cken_disable, 80 .disable = clk_cken_disable,
117}; 81};
118 82
119void clks_register(struct clk *clks, size_t num) 83void clks_register(struct clk_lookup *clks, size_t num)
120{ 84{
121 int i; 85 int i;
122 86
123 mutex_lock(&clocks_mutex);
124 for (i = 0; i < num; i++) 87 for (i = 0; i < num; i++)
125 list_add(&clks[i].node, &clocks); 88 clkdev_add(&clks[i]);
126 mutex_unlock(&clocks_mutex);
127} 89}
128 90
129int clk_add_alias(char *alias, struct device *alias_dev, char *id, 91int clk_add_alias(char *alias, struct device *alias_dev, char *id,
130 struct device *dev) 92 struct device *dev)
131{ 93{
132 struct clk *r = clk_lookup(dev, id); 94 struct clk *r = clk_get(dev, id);
133 struct clk *new; 95 struct clk_lookup *l;
134 96
135 if (!r) 97 if (!r)
136 return -ENODEV; 98 return -ENODEV;
137 99
138 new = kzalloc(sizeof(struct clk), GFP_KERNEL); 100 l = clkdev_alloc(r, alias, alias_dev ? dev_name(alias_dev) : NULL);
139 101 clk_put(r);
140 if (!new) 102 if (!l)
141 return -ENOMEM; 103 return -ENODEV;
142 104 clkdev_add(l);
143 new->name = alias;
144 new->dev = alias_dev;
145 new->other = r;
146
147 mutex_lock(&clocks_mutex);
148 list_add(&new->node, &clocks);
149 mutex_unlock(&clocks_mutex);
150
151 return 0; 105 return 0;
152} 106}
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h
index 73be795fe3bf..4e9c613c6767 100644
--- a/arch/arm/mach-pxa/clock.h
+++ b/arch/arm/mach-pxa/clock.h
@@ -1,6 +1,4 @@
1#include <linux/list.h> 1#include <asm/clkdev.h>
2
3struct clk;
4 2
5struct clkops { 3struct clkops {
6 void (*enable)(struct clk *); 4 void (*enable)(struct clk *);
@@ -9,9 +7,6 @@ struct clkops {
9}; 7};
10 8
11struct clk { 9struct clk {
12 struct list_head node;
13 const char *name;
14 struct device *dev;
15 const struct clkops *ops; 10 const struct clkops *ops;
16 unsigned long rate; 11 unsigned long rate;
17 unsigned int cken; 12 unsigned int cken;
@@ -20,41 +15,31 @@ struct clk {
20 struct clk *other; 15 struct clk *other;
21}; 16};
22 17
23#define INIT_CKEN(_name, _cken, _rate, _delay, _dev) \ 18#define INIT_CLKREG(_clk,_devname,_conname) \
24 { \ 19 { \
25 .name = _name, \ 20 .clk = _clk, \
26 .dev = _dev, \ 21 .dev_id = _devname, \
22 .con_id = _conname, \
23 }
24
25#define DEFINE_CKEN(_name, _cken, _rate, _delay) \
26struct clk clk_##_name = { \
27 .ops = &clk_cken_ops, \ 27 .ops = &clk_cken_ops, \
28 .rate = _rate, \ 28 .rate = _rate, \
29 .cken = CKEN_##_cken, \ 29 .cken = CKEN_##_cken, \
30 .delay = _delay, \ 30 .delay = _delay, \
31 } 31 }
32 32
33#define INIT_CK(_name, _cken, _ops, _dev) \ 33#define DEFINE_CK(_name, _cken, _ops) \
34 { \ 34struct clk clk_##_name = { \
35 .name = _name, \
36 .dev = _dev, \
37 .ops = _ops, \ 35 .ops = _ops, \
38 .cken = CKEN_##_cken, \ 36 .cken = CKEN_##_cken, \
39 } 37 }
40 38
41/* 39#define DEFINE_CLK(_name, _ops, _rate, _delay) \
42 * This is a placeholder to alias one clock device+name pair 40struct clk clk_##_name = { \
43 * to another struct clk. 41 .ops = _ops, \
44 */ 42 .rate = _rate, \
45#define INIT_CKOTHER(_name, _other, _dev) \
46 { \
47 .name = _name, \
48 .dev = _dev, \
49 .other = _other, \
50 }
51
52#define INIT_CLK(_name, _ops, _rate, _delay, _dev) \
53 { \
54 .name = _name, \
55 .dev = _dev, \
56 .ops = _ops, \
57 .rate = _rate, \
58 .delay = _delay, \ 43 .delay = _delay, \
59 } 44 }
60 45
@@ -64,20 +49,16 @@ void clk_cken_enable(struct clk *clk);
64void clk_cken_disable(struct clk *clk); 49void clk_cken_disable(struct clk *clk);
65 50
66#ifdef CONFIG_PXA3xx 51#ifdef CONFIG_PXA3xx
67#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev) \ 52#define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay) \
68 { \ 53struct clk clk_##_name = { \
69 .name = _name, \
70 .dev = _dev, \
71 .ops = &clk_pxa3xx_cken_ops, \ 54 .ops = &clk_pxa3xx_cken_ops, \
72 .rate = _rate, \ 55 .rate = _rate, \
73 .cken = CKEN_##_cken, \ 56 .cken = CKEN_##_cken, \
74 .delay = _delay, \ 57 .delay = _delay, \
75 } 58 }
76 59
77#define PXA3xx_CK(_name, _cken, _ops, _dev) \ 60#define DEFINE_PXA3_CK(_name, _cken, _ops) \
78 { \ 61struct clk clk_##_name = { \
79 .name = _name, \
80 .dev = _dev, \
81 .ops = _ops, \ 62 .ops = _ops, \
82 .cken = CKEN_##_cken, \ 63 .cken = CKEN_##_cken, \
83 } 64 }
@@ -87,7 +68,7 @@ extern void clk_pxa3xx_cken_enable(struct clk *);
87extern void clk_pxa3xx_cken_disable(struct clk *); 68extern void clk_pxa3xx_cken_disable(struct clk *);
88#endif 69#endif
89 70
90void clks_register(struct clk *clks, size_t num); 71void clks_register(struct clk_lookup *clks, size_t num);
91int clk_add_alias(char *alias, struct device *alias_dev, char *id, 72int clk_add_alias(char *alias, struct device *alias_dev, char *id,
92 struct device *dev); 73 struct device *dev);
93 74
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index eb7d6c94aa42..e35259032813 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -204,7 +204,9 @@ static struct sharpsl_charger_machinfo corgi_pm_machinfo = {
204 .read_devdata = corgipm_read_devdata, 204 .read_devdata = corgipm_read_devdata,
205 .charger_wakeup = corgi_charger_wakeup, 205 .charger_wakeup = corgi_charger_wakeup,
206 .should_wakeup = corgi_should_wakeup, 206 .should_wakeup = corgi_should_wakeup,
207#ifdef CONFIG_BACKLIGHT_CORGI 207#if defined(CONFIG_LCD_CORGI)
208 .backlight_limit = corgi_lcd_limit_intensity,
209#elif defined(CONFIG_BACKLIGHT_CORGI)
208 .backlight_limit = corgibl_limit_intensity, 210 .backlight_limit = corgibl_limit_intensity,
209#endif 211#endif
210 .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, 212 .charge_on_volt = SHARPSL_CHARGE_ON_VOLT,
diff --git a/arch/arm/mach-pxa/include/mach/clkdev.h b/arch/arm/mach-pxa/include/mach/clkdev.h
new file mode 100644
index 000000000000..04b37a89801c
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/clkdev.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_MACH_CLKDEV_H
2#define __ASM_MACH_CLKDEV_H
3
4#define __clk_get(clk) ({ 1; })
5#define __clk_put(clk) do { } while (0)
6
7#endif
diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h
index 8e591118371e..cbda4d35c421 100644
--- a/arch/arm/mach-pxa/include/mach/pxafb.h
+++ b/arch/arm/mach-pxa/include/mach/pxafb.h
@@ -33,6 +33,7 @@
33#define LCD_CONN_TYPE(_x) ((_x) & 0x0f) 33#define LCD_CONN_TYPE(_x) ((_x) & 0x0f)
34#define LCD_CONN_WIDTH(_x) (((_x) >> 4) & 0x1f) 34#define LCD_CONN_WIDTH(_x) (((_x) >> 4) & 0x1f)
35 35
36#define LCD_TYPE_MASK 0xf
36#define LCD_TYPE_UNKNOWN 0 37#define LCD_TYPE_UNKNOWN 0
37#define LCD_TYPE_MONO_STN 1 38#define LCD_TYPE_MONO_STN 1
38#define LCD_TYPE_MONO_DSTN 2 39#define LCD_TYPE_MONO_DSTN 2
diff --git a/arch/arm/mach-pxa/include/mach/sharpsl.h b/arch/arm/mach-pxa/include/mach/sharpsl.h
index 3b1d4a72d4d1..8242e14a44fa 100644
--- a/arch/arm/mach-pxa/include/mach/sharpsl.h
+++ b/arch/arm/mach-pxa/include/mach/sharpsl.h
@@ -26,6 +26,7 @@ struct corgits_machinfo {
26 * SharpSL Backlight 26 * SharpSL Backlight
27 */ 27 */
28extern void corgibl_limit_intensity(int limit); 28extern void corgibl_limit_intensity(int limit);
29extern void corgi_lcd_limit_intensity(int limit);
29 30
30 31
31/* 32/*
diff --git a/arch/arm/mach-pxa/pwm.c b/arch/arm/mach-pxa/pwm.c
index 74e2ead8cee8..3ca7ffc6904b 100644
--- a/arch/arm/mach-pxa/pwm.c
+++ b/arch/arm/mach-pxa/pwm.c
@@ -173,7 +173,7 @@ static struct pwm_device *pwm_probe(struct platform_device *pdev,
173 return ERR_PTR(-ENOMEM); 173 return ERR_PTR(-ENOMEM);
174 } 174 }
175 175
176 pwm->clk = clk_get(&pdev->dev, "PWMCLK"); 176 pwm->clk = clk_get(&pdev->dev, NULL);
177 if (IS_ERR(pwm->clk)) { 177 if (IS_ERR(pwm->clk)) {
178 ret = PTR_ERR(pwm->clk); 178 ret = PTR_ERR(pwm->clk);
179 goto err_free; 179 goto err_free;
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 25d17a1dab78..344b3282caf9 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -167,36 +167,51 @@ static const struct clkops clk_pxa25x_gpio11_ops = {
167 * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz 167 * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
168 * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly) 168 * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly)
169 */ 169 */
170static struct clk pxa25x_hwuart_clk = 170static DEFINE_CKEN(pxa25x_hwuart, HWUART, 14745600, 1);
171 INIT_CKEN("UARTCLK", HWUART, 14745600, 1, &pxa_device_hwuart.dev) 171
172; 172static struct clk_lookup pxa25x_hwuart_clkreg =
173 INIT_CLKREG(&clk_pxa25x_hwuart, "pxa2xx-uart.3", NULL);
173 174
174/* 175/*
175 * PXA 2xx clock declarations. 176 * PXA 2xx clock declarations.
176 */ 177 */
177static struct clk pxa25x_clks[] = { 178static DEFINE_CK(pxa25x_lcd, LCD, &clk_pxa25x_lcd_ops);
178 INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops, &pxa_device_fb.dev), 179static DEFINE_CKEN(pxa25x_ffuart, FFUART, 14745600, 1);
179 INIT_CKEN("UARTCLK", FFUART, 14745600, 1, &pxa_device_ffuart.dev), 180static DEFINE_CKEN(pxa25x_btuart, BTUART, 14745600, 1);
180 INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev), 181static DEFINE_CKEN(pxa25x_stuart, STUART, 14745600, 1);
181 INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL), 182static DEFINE_CKEN(pxa25x_usb, USB, 47923000, 5);
182 INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa25x_device_udc.dev), 183static DEFINE_CLK(pxa25x_gpio11, &clk_pxa25x_gpio11_ops, 3686400, 0);
183 INIT_CLK("GPIO11_CLK", &clk_pxa25x_gpio11_ops, 3686400, 0, NULL), 184static DEFINE_CLK(pxa25x_gpio12, &clk_pxa25x_gpio12_ops, 32768, 0);
184 INIT_CLK("GPIO12_CLK", &clk_pxa25x_gpio12_ops, 32768, 0, NULL), 185static DEFINE_CKEN(pxa25x_mmc, MMC, 19169000, 0);
185 INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev), 186static DEFINE_CKEN(pxa25x_i2c, I2C, 31949000, 0);
186 INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev), 187static DEFINE_CKEN(pxa25x_ssp, SSP, 3686400, 0);
187 188static DEFINE_CKEN(pxa25x_nssp, NSSP, 3686400, 0);
188 INIT_CKEN("SSPCLK", SSP, 3686400, 0, &pxa25x_device_ssp.dev), 189static DEFINE_CKEN(pxa25x_assp, ASSP, 3686400, 0);
189 INIT_CKEN("SSPCLK", NSSP, 3686400, 0, &pxa25x_device_nssp.dev), 190static DEFINE_CKEN(pxa25x_pwm0, PWM0, 3686400, 0);
190 INIT_CKEN("SSPCLK", ASSP, 3686400, 0, &pxa25x_device_assp.dev), 191static DEFINE_CKEN(pxa25x_pwm1, PWM1, 3686400, 0);
191 INIT_CKEN("PWMCLK", PWM0, 3686400, 0, &pxa25x_device_pwm0.dev), 192static DEFINE_CKEN(pxa25x_ac97, AC97, 24576000, 0);
192 INIT_CKEN("PWMCLK", PWM1, 3686400, 0, &pxa25x_device_pwm1.dev), 193static DEFINE_CKEN(pxa25x_i2s, I2S, 14745600, 0);
193 194static DEFINE_CKEN(pxa25x_ficp, FICP, 47923000, 0);
194 INIT_CKEN("AC97CLK", AC97, 24576000, 0, NULL), 195
195 196static struct clk_lookup pxa25x_clkregs[] = {
196 /* 197 INIT_CLKREG(&clk_pxa25x_lcd, "pxa2xx-fb", NULL),
197 INIT_CKEN("I2SCLK", I2S, 14745600, 0, NULL), 198 INIT_CLKREG(&clk_pxa25x_ffuart, "pxa2xx-uart.0", NULL),
198 */ 199 INIT_CLKREG(&clk_pxa25x_btuart, "pxa2xx-uart.1", NULL),
199 INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL), 200 INIT_CLKREG(&clk_pxa25x_stuart, "pxa2xx-uart.2", NULL),
201 INIT_CLKREG(&clk_pxa25x_usb, "pxa25x-udc", NULL),
202 INIT_CLKREG(&clk_pxa25x_mmc, "pxa2xx-mci.0", NULL),
203 INIT_CLKREG(&clk_pxa25x_i2c, "pxa2xx-i2c.0", NULL),
204 INIT_CLKREG(&clk_pxa25x_ssp, "pxa25x-ssp.0", NULL),
205 INIT_CLKREG(&clk_pxa25x_nssp, "pxa25x-nssp.1", NULL),
206 INIT_CLKREG(&clk_pxa25x_assp, "pxa25x-nssp.2", NULL),
207 INIT_CLKREG(&clk_pxa25x_pwm0, "pxa25x-pwm.0", NULL),
208 INIT_CLKREG(&clk_pxa25x_pwm1, "pxa25x-pwm.1", NULL),
209 INIT_CLKREG(&clk_pxa25x_i2s, "pxa2xx-i2s", NULL),
210 INIT_CLKREG(&clk_pxa25x_stuart, "pxa2xx-ir", "UARTCLK"),
211 INIT_CLKREG(&clk_pxa25x_ficp, "pxa2xx-ir", "FICPCLK"),
212 INIT_CLKREG(&clk_pxa25x_ac97, NULL, "AC97CLK"),
213 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
214 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
200}; 215};
201 216
202#ifdef CONFIG_PM 217#ifdef CONFIG_PM
@@ -336,7 +351,7 @@ static int __init pxa25x_init(void)
336 351
337 reset_status = RCSR; 352 reset_status = RCSR;
338 353
339 clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks)); 354 clks_register(pxa25x_clkregs, ARRAY_SIZE(pxa25x_clkregs));
340 355
341 if ((ret = pxa_init_dma(16))) 356 if ((ret = pxa_init_dma(16)))
342 return ret; 357 return ret;
@@ -357,7 +372,7 @@ static int __init pxa25x_init(void)
357 372
358 /* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */ 373 /* Only add HWUART for PXA255/26x; PXA210/250 do not have it. */
359 if (cpu_is_pxa255() || cpu_is_pxa26x()) { 374 if (cpu_is_pxa255() || cpu_is_pxa26x()) {
360 clks_register(&pxa25x_hwuart_clk, 1); 375 clks_register(&pxa25x_hwuart_clkreg, 1);
361 ret = platform_device_register(&pxa_device_hwuart); 376 ret = platform_device_register(&pxa_device_hwuart);
362 } 377 }
363 378
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 3e4ab2279c99..15c8e5b9f9bc 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -144,40 +144,59 @@ static const struct clkops clk_pxa27x_lcd_ops = {
144 .getrate = clk_pxa27x_lcd_getrate, 144 .getrate = clk_pxa27x_lcd_getrate,
145}; 145};
146 146
147static struct clk pxa27x_clks[] = { 147static DEFINE_CK(pxa27x_lcd, LCD, &clk_pxa27x_lcd_ops);
148 INIT_CK("LCDCLK", LCD, &clk_pxa27x_lcd_ops, &pxa_device_fb.dev), 148static DEFINE_CK(pxa27x_camera, CAMERA, &clk_pxa27x_lcd_ops);
149 INIT_CK("CAMCLK", CAMERA, &clk_pxa27x_lcd_ops, NULL), 149static DEFINE_CKEN(pxa27x_ffuart, FFUART, 14857000, 1);
150 150static DEFINE_CKEN(pxa27x_btuart, BTUART, 14857000, 1);
151 INIT_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev), 151static DEFINE_CKEN(pxa27x_stuart, STUART, 14857000, 1);
152 INIT_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev), 152static DEFINE_CKEN(pxa27x_i2s, I2S, 14682000, 0);
153 INIT_CKEN("UARTCLK", STUART, 14857000, 1, NULL), 153static DEFINE_CKEN(pxa27x_i2c, I2C, 32842000, 0);
154 154static DEFINE_CKEN(pxa27x_usb, USB, 48000000, 5);
155 INIT_CKEN("I2SCLK", I2S, 14682000, 0, &pxa_device_i2s.dev), 155static DEFINE_CKEN(pxa27x_mmc, MMC, 19500000, 0);
156 INIT_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev), 156static DEFINE_CKEN(pxa27x_ficp, FICP, 48000000, 0);
157 INIT_CKEN("UDCCLK", USB, 48000000, 5, &pxa27x_device_udc.dev), 157static DEFINE_CKEN(pxa27x_usbhost, USBHOST, 48000000, 0);
158 INIT_CKEN("MMCCLK", MMC, 19500000, 0, &pxa_device_mci.dev), 158static DEFINE_CKEN(pxa27x_pwri2c, PWRI2C, 13000000, 0);
159 INIT_CKEN("FICPCLK", FICP, 48000000, 0, &pxa_device_ficp.dev), 159static DEFINE_CKEN(pxa27x_keypad, KEYPAD, 32768, 0);
160 160static DEFINE_CKEN(pxa27x_ssp1, SSP1, 13000000, 0);
161 INIT_CKEN("USBCLK", USBHOST, 48000000, 0, &pxa27x_device_ohci.dev), 161static DEFINE_CKEN(pxa27x_ssp2, SSP2, 13000000, 0);
162 INIT_CKEN("I2CCLK", PWRI2C, 13000000, 0, &pxa27x_device_i2c_power.dev), 162static DEFINE_CKEN(pxa27x_ssp3, SSP3, 13000000, 0);
163 INIT_CKEN("KBDCLK", KEYPAD, 32768, 0, &pxa27x_device_keypad.dev), 163static DEFINE_CKEN(pxa27x_pwm0, PWM0, 13000000, 0);
164 164static DEFINE_CKEN(pxa27x_pwm1, PWM1, 13000000, 0);
165 INIT_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev), 165static DEFINE_CKEN(pxa27x_ac97, AC97, 24576000, 0);
166 INIT_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev), 166static DEFINE_CKEN(pxa27x_ac97conf, AC97CONF, 24576000, 0);
167 INIT_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev), 167static DEFINE_CKEN(pxa27x_msl, MSL, 48000000, 0);
168 INIT_CKEN("PWMCLK", PWM0, 13000000, 0, &pxa27x_device_pwm0.dev), 168static DEFINE_CKEN(pxa27x_usim, USIM, 48000000, 0);
169 INIT_CKEN("PWMCLK", PWM1, 13000000, 0, &pxa27x_device_pwm1.dev), 169static DEFINE_CKEN(pxa27x_memstk, MEMSTK, 19500000, 0);
170 170static DEFINE_CKEN(pxa27x_im, IM, 0, 0);
171 INIT_CKEN("AC97CLK", AC97, 24576000, 0, NULL), 171static DEFINE_CKEN(pxa27x_memc, MEMC, 0, 0);
172 INIT_CKEN("AC97CONFCLK", AC97CONF, 24576000, 0, NULL), 172
173 173static struct clk_lookup pxa27x_clkregs[] = {
174 /* 174 INIT_CLKREG(&clk_pxa27x_lcd, "pxa2xx-fb", NULL),
175 INIT_CKEN("MSLCLK", MSL, 48000000, 0, NULL), 175 INIT_CLKREG(&clk_pxa27x_camera, "pxa27x-camera.0", NULL),
176 INIT_CKEN("USIMCLK", USIM, 48000000, 0, NULL), 176 INIT_CLKREG(&clk_pxa27x_ffuart, "pxa2xx-uart.0", NULL),
177 INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0, NULL), 177 INIT_CLKREG(&clk_pxa27x_btuart, "pxa2xx-uart.1", NULL),
178 INIT_CKEN("IMCLK", IM, 0, 0, NULL), 178 INIT_CLKREG(&clk_pxa27x_stuart, "pxa2xx-uart.2", NULL),
179 INIT_CKEN("MEMCLK", MEMC, 0, 0, NULL), 179 INIT_CLKREG(&clk_pxa27x_i2s, "pxa2xx-i2s", NULL),
180 */ 180 INIT_CLKREG(&clk_pxa27x_i2c, "pxa2xx-i2c.0", NULL),
181 INIT_CLKREG(&clk_pxa27x_usb, "pxa27x-udc", NULL),
182 INIT_CLKREG(&clk_pxa27x_mmc, "pxa2xx-mci.0", NULL),
183 INIT_CLKREG(&clk_pxa27x_stuart, "pxa2xx-ir", "UARTCLK"),
184 INIT_CLKREG(&clk_pxa27x_ficp, "pxa2xx-ir", "FICPCLK"),
185 INIT_CLKREG(&clk_pxa27x_usbhost, "pxa27x-ohci", NULL),
186 INIT_CLKREG(&clk_pxa27x_pwri2c, "pxa2xx-i2c.1", NULL),
187 INIT_CLKREG(&clk_pxa27x_keypad, "pxa27x-keypad", NULL),
188 INIT_CLKREG(&clk_pxa27x_ssp1, "pxa27x-ssp.0", NULL),
189 INIT_CLKREG(&clk_pxa27x_ssp2, "pxa27x-ssp.1", NULL),
190 INIT_CLKREG(&clk_pxa27x_ssp3, "pxa27x-ssp.2", NULL),
191 INIT_CLKREG(&clk_pxa27x_pwm0, "pxa27x-pwm.0", NULL),
192 INIT_CLKREG(&clk_pxa27x_pwm1, "pxa27x-pwm.1", NULL),
193 INIT_CLKREG(&clk_pxa27x_ac97, NULL, "AC97CLK"),
194 INIT_CLKREG(&clk_pxa27x_ac97conf, NULL, "AC97CONFCLK"),
195 INIT_CLKREG(&clk_pxa27x_msl, NULL, "MSLCLK"),
196 INIT_CLKREG(&clk_pxa27x_usim, NULL, "USIMCLK"),
197 INIT_CLKREG(&clk_pxa27x_memstk, NULL, "MSTKCLK"),
198 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
199 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
181}; 200};
182 201
183#ifdef CONFIG_PM 202#ifdef CONFIG_PM
@@ -380,7 +399,7 @@ static int __init pxa27x_init(void)
380 399
381 reset_status = RCSR; 400 reset_status = RCSR;
382 401
383 clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks)); 402 clks_register(pxa27x_clkregs, ARRAY_SIZE(pxa27x_clkregs));
384 403
385 if ((ret = pxa_init_dma(32))) 404 if ((ret = pxa_init_dma(32)))
386 return ret; 405 return ret;
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c
index 9adc7fc4618a..f735e58e6669 100644
--- a/arch/arm/mach-pxa/pxa300.c
+++ b/arch/arm/mach-pxa/pxa300.c
@@ -85,14 +85,16 @@ static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = {
85 MFP_ADDR_END, 85 MFP_ADDR_END,
86}; 86};
87 87
88static struct clk common_clks[] = { 88static DEFINE_PXA3_CKEN(common_nand, NAND, 156000000, 0);
89 PXA3xx_CKEN("NANDCLK", NAND, 156000000, 0, &pxa3xx_device_nand.dev), 89
90static struct clk_lookup common_clkregs[] = {
91 INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", "NANDCLK"),
90}; 92};
91 93
92static struct clk pxa310_clks[] = { 94static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0);
93#ifdef CONFIG_CPU_PXA310 95
94 PXA3xx_CKEN("MMCCLK", MMC3, 19500000, 0, &pxa3xx_device_mci3.dev), 96static struct clk_lookup pxa310_clkregs[] = {
95#endif 97 INIT_CLKREG(&clk_pxa310_mmc3, "pxa2xx-mci.2", "MMCCLK"),
96}; 98};
97 99
98static int __init pxa300_init(void) 100static int __init pxa300_init(void)
@@ -100,12 +102,12 @@ static int __init pxa300_init(void)
100 if (cpu_is_pxa300() || cpu_is_pxa310()) { 102 if (cpu_is_pxa300() || cpu_is_pxa310()) {
101 pxa3xx_init_mfp(); 103 pxa3xx_init_mfp();
102 pxa3xx_mfp_init_addr(pxa300_mfp_addr_map); 104 pxa3xx_mfp_init_addr(pxa300_mfp_addr_map);
103 clks_register(ARRAY_AND_SIZE(common_clks)); 105 clks_register(ARRAY_AND_SIZE(common_clkregs));
104 } 106 }
105 107
106 if (cpu_is_pxa310()) { 108 if (cpu_is_pxa310()) {
107 pxa3xx_mfp_init_addr(pxa310_mfp_addr_map); 109 pxa3xx_mfp_init_addr(pxa310_mfp_addr_map);
108 clks_register(ARRAY_AND_SIZE(pxa310_clks)); 110 clks_register(ARRAY_AND_SIZE(pxa310_clkregs));
109 } 111 }
110 112
111 return 0; 113 return 0;
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c
index 016eb18f01a3..effe408c186f 100644
--- a/arch/arm/mach-pxa/pxa320.c
+++ b/arch/arm/mach-pxa/pxa320.c
@@ -80,8 +80,10 @@ static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
80 MFP_ADDR_END, 80 MFP_ADDR_END,
81}; 81};
82 82
83static struct clk pxa320_clks[] = { 83static DEFINE_PXA3_CKEN(pxa320_nand, NAND, 104000000, 0);
84 PXA3xx_CKEN("NANDCLK", NAND, 104000000, 0, &pxa3xx_device_nand.dev), 84
85static struct clk_lookup pxa320_clkregs[] = {
86 INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", "NANDCLK"),
85}; 87};
86 88
87static int __init pxa320_init(void) 89static int __init pxa320_init(void)
@@ -89,7 +91,7 @@ static int __init pxa320_init(void)
89 if (cpu_is_pxa320()) { 91 if (cpu_is_pxa320()) {
90 pxa3xx_init_mfp(); 92 pxa3xx_init_mfp();
91 pxa3xx_mfp_init_addr(pxa320_mfp_addr_map); 93 pxa3xx_mfp_init_addr(pxa320_mfp_addr_map);
92 clks_register(ARRAY_AND_SIZE(pxa320_clks)); 94 clks_register(ARRAY_AND_SIZE(pxa320_clkregs));
93 } 95 }
94 96
95 return 0; 97 return 0;
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index b3cd5d0b0f35..b7e53829d376 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -216,43 +216,58 @@ static const struct clkops clk_dummy_ops = {
216 .disable = clk_dummy_disable, 216 .disable = clk_dummy_disable,
217}; 217};
218 218
219static struct clk pxa3xx_clks[] = { 219static struct clk clk_pxa3xx_pout = {
220 { 220 .ops = &clk_pout_ops,
221 .name = "CLK_POUT", 221 .rate = 13000000,
222 .ops = &clk_pout_ops, 222 .delay = 70,
223 .rate = 13000000, 223};
224 .delay = 70,
225 },
226
227 /* Power I2C clock is always on */
228 {
229 .name = "I2CCLK",
230 .ops = &clk_dummy_ops,
231 .dev = &pxa3xx_device_i2c_power.dev,
232 },
233
234 PXA3xx_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev),
235 PXA3xx_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops, NULL),
236 PXA3xx_CK("AC97CLK", AC97, &clk_pxa3xx_ac97_ops, NULL),
237
238 PXA3xx_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev),
239 PXA3xx_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev),
240 PXA3xx_CKEN("UARTCLK", STUART, 14857000, 1, NULL),
241
242 PXA3xx_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev),
243 PXA3xx_CKEN("UDCCLK", UDC, 48000000, 5, &pxa27x_device_udc.dev),
244 PXA3xx_CKEN("USBCLK", USBH, 48000000, 0, &pxa27x_device_ohci.dev),
245 PXA3xx_CKEN("KBDCLK", KEYPAD, 32768, 0, &pxa27x_device_keypad.dev),
246 224
247 PXA3xx_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev), 225static struct clk clk_dummy = {
248 PXA3xx_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev), 226 .ops = &clk_dummy_ops,
249 PXA3xx_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev), 227};
250 PXA3xx_CKEN("SSPCLK", SSP4, 13000000, 0, &pxa3xx_device_ssp4.dev),
251 PXA3xx_CKEN("PWMCLK", PWM0, 13000000, 0, &pxa27x_device_pwm0.dev),
252 PXA3xx_CKEN("PWMCLK", PWM1, 13000000, 0, &pxa27x_device_pwm1.dev),
253 228
254 PXA3xx_CKEN("MMCCLK", MMC1, 19500000, 0, &pxa_device_mci.dev), 229static DEFINE_PXA3_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops);
255 PXA3xx_CKEN("MMCCLK", MMC2, 19500000, 0, &pxa3xx_device_mci2.dev), 230static DEFINE_PXA3_CK(pxa3xx_camera, CAMERA, &clk_pxa3xx_hsio_ops);
231static DEFINE_PXA3_CK(pxa3xx_ac97, AC97, &clk_pxa3xx_ac97_ops);
232static DEFINE_PXA3_CKEN(pxa3xx_ffuart, FFUART, 14857000, 1);
233static DEFINE_PXA3_CKEN(pxa3xx_btuart, BTUART, 14857000, 1);
234static DEFINE_PXA3_CKEN(pxa3xx_stuart, STUART, 14857000, 1);
235static DEFINE_PXA3_CKEN(pxa3xx_i2c, I2C, 32842000, 0);
236static DEFINE_PXA3_CKEN(pxa3xx_udc, UDC, 48000000, 5);
237static DEFINE_PXA3_CKEN(pxa3xx_usbh, USBH, 48000000, 0);
238static DEFINE_PXA3_CKEN(pxa3xx_keypad, KEYPAD, 32768, 0);
239static DEFINE_PXA3_CKEN(pxa3xx_ssp1, SSP1, 13000000, 0);
240static DEFINE_PXA3_CKEN(pxa3xx_ssp2, SSP2, 13000000, 0);
241static DEFINE_PXA3_CKEN(pxa3xx_ssp3, SSP3, 13000000, 0);
242static DEFINE_PXA3_CKEN(pxa3xx_ssp4, SSP4, 13000000, 0);
243static DEFINE_PXA3_CKEN(pxa3xx_pwm0, PWM0, 13000000, 0);
244static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0);
245static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0);
246static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0);
247
248static struct clk_lookup pxa3xx_clkregs[] = {
249 INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"),
250 /* Power I2C clock is always on */
251 INIT_CLKREG(&clk_dummy, "pxa2xx-i2c.1", NULL),
252 INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL),
253 INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"),
254 INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"),
255 INIT_CLKREG(&clk_pxa3xx_ffuart, "pxa2xx-uart.0", NULL),
256 INIT_CLKREG(&clk_pxa3xx_btuart, "pxa2xx-uart.1", NULL),
257 INIT_CLKREG(&clk_pxa3xx_stuart, "pxa2xx-uart.2", NULL),
258 INIT_CLKREG(&clk_pxa3xx_stuart, "pxa2xx-ir", "UARTCLK"),
259 INIT_CLKREG(&clk_pxa3xx_i2c, "pxa2xx-i2c.0", NULL),
260 INIT_CLKREG(&clk_pxa3xx_udc, "pxa27x-udc", NULL),
261 INIT_CLKREG(&clk_pxa3xx_usbh, "pxa27x-ohci", NULL),
262 INIT_CLKREG(&clk_pxa3xx_keypad, "pxa27x-keypad", NULL),
263 INIT_CLKREG(&clk_pxa3xx_ssp1, "pxa27x-ssp.0", NULL),
264 INIT_CLKREG(&clk_pxa3xx_ssp2, "pxa27x-ssp.1", NULL),
265 INIT_CLKREG(&clk_pxa3xx_ssp3, "pxa27x-ssp.2", NULL),
266 INIT_CLKREG(&clk_pxa3xx_ssp4, "pxa27x-ssp.3", NULL),
267 INIT_CLKREG(&clk_pxa3xx_pwm0, "pxa27x-pwm.0", NULL),
268 INIT_CLKREG(&clk_pxa3xx_pwm1, "pxa27x-pwm.1", NULL),
269 INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL),
270 INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL),
256}; 271};
257 272
258#ifdef CONFIG_PM 273#ifdef CONFIG_PM
@@ -595,7 +610,7 @@ static int __init pxa3xx_init(void)
595 */ 610 */
596 ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S); 611 ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
597 612
598 clks_register(pxa3xx_clks, ARRAY_SIZE(pxa3xx_clks)); 613 clks_register(pxa3xx_clkregs, ARRAY_SIZE(pxa3xx_clkregs));
599 614
600 if ((ret = pxa_init_dma(32))) 615 if ((ret = pxa_init_dma(32)))
601 return ret; 616 return ret;
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
index 1b2af575c40f..00b2dc2a1074 100644
--- a/arch/arm/mach-pxa/reset.c
+++ b/arch/arm/mach-pxa/reset.c
@@ -90,12 +90,13 @@ void arch_reset(char mode)
90 /* Jump into ROM at address 0 */ 90 /* Jump into ROM at address 0 */
91 cpu_reset(0); 91 cpu_reset(0);
92 break; 92 break;
93 case 'h':
94 do_hw_reset();
95 break;
96 case 'g': 93 case 'g':
97 do_gpio_reset(); 94 do_gpio_reset();
98 break; 95 break;
96 case 'h':
97 default:
98 do_hw_reset();
99 break;
99 } 100 }
100} 101}
101 102
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 524f656dc56d..3be76ee2bdbf 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -67,6 +67,7 @@
67static unsigned long spitz_pin_config[] __initdata = { 67static unsigned long spitz_pin_config[] __initdata = {
68 /* Chip Selects */ 68 /* Chip Selects */
69 GPIO78_nCS_2, /* SCOOP #2 */ 69 GPIO78_nCS_2, /* SCOOP #2 */
70 GPIO79_nCS_3, /* NAND */
70 GPIO80_nCS_4, /* SCOOP #1 */ 71 GPIO80_nCS_4, /* SCOOP #1 */
71 72
72 /* LCD - 16bpp Active TFT */ 73 /* LCD - 16bpp Active TFT */
@@ -97,10 +98,10 @@ static unsigned long spitz_pin_config[] __initdata = {
97 GPIO51_nPIOW, 98 GPIO51_nPIOW,
98 GPIO85_nPCE_1, 99 GPIO85_nPCE_1,
99 GPIO54_nPCE_2, 100 GPIO54_nPCE_2,
100 GPIO79_PSKTSEL,
101 GPIO55_nPREG, 101 GPIO55_nPREG,
102 GPIO56_nPWAIT, 102 GPIO56_nPWAIT,
103 GPIO57_nIOIS16, 103 GPIO57_nIOIS16,
104 GPIO104_PSKTSEL,
104 105
105 /* MMC */ 106 /* MMC */
106 GPIO32_MMC_CLK, 107 GPIO32_MMC_CLK,
@@ -385,6 +386,16 @@ static void __init spitz_init_spi(void)
385 if (err) 386 if (err)
386 goto err_free_2; 387 goto err_free_2;
387 388
389 err = gpio_direction_output(SPITZ_GPIO_ADS7846_CS, 1);
390 if (err)
391 goto err_free_3;
392 err = gpio_direction_output(SPITZ_GPIO_LCDCON_CS, 1);
393 if (err)
394 goto err_free_3;
395 err = gpio_direction_output(SPITZ_GPIO_MAX1111_CS, 1);
396 if (err)
397 goto err_free_3;
398
388 if (machine_is_akita()) { 399 if (machine_is_akita()) {
389 spitz_lcdcon_info.gpio_backlight_cont = AKITA_GPIO_BACKLIGHT_CONT; 400 spitz_lcdcon_info.gpio_backlight_cont = AKITA_GPIO_BACKLIGHT_CONT;
390 spitz_lcdcon_info.gpio_backlight_on = AKITA_GPIO_BACKLIGHT_ON; 401 spitz_lcdcon_info.gpio_backlight_on = AKITA_GPIO_BACKLIGHT_ON;
@@ -394,6 +405,8 @@ static void __init spitz_init_spi(void)
394 spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices)); 405 spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices));
395 return; 406 return;
396 407
408err_free_3:
409 gpio_free(SPITZ_GPIO_MAX1111_CS);
397err_free_2: 410err_free_2:
398 gpio_free(SPITZ_GPIO_LCDCON_CS); 411 gpio_free(SPITZ_GPIO_LCDCON_CS);
399err_free_1: 412err_free_1:
@@ -674,7 +687,6 @@ static void __init akita_init(void)
674 spitz_pcmcia_config.num_devs = 1; 687 spitz_pcmcia_config.num_devs = 1;
675 platform_scoop_config = &spitz_pcmcia_config; 688 platform_scoop_config = &spitz_pcmcia_config;
676 689
677 pxa_set_i2c_info(NULL);
678 i2c_register_board_info(0, ARRAY_AND_SIZE(akita_i2c_board_info)); 690 i2c_register_board_info(0, ARRAY_AND_SIZE(akita_i2c_board_info));
679 691
680 common_init(); 692 common_init();
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 53018db106ac..072e77cfe5a3 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -198,7 +198,9 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = {
198 .read_devdata = spitzpm_read_devdata, 198 .read_devdata = spitzpm_read_devdata,
199 .charger_wakeup = spitz_charger_wakeup, 199 .charger_wakeup = spitz_charger_wakeup,
200 .should_wakeup = spitz_should_wakeup, 200 .should_wakeup = spitz_should_wakeup,
201#ifdef CONFIG_BACKLIGHT_CORGI 201#if defined(CONFIG_LCD_CORGI)
202 .backlight_limit = corgi_lcd_limit_intensity,
203#elif defined(CONFIG_BACKLIGHT_CORGI)
202 .backlight_limit = corgibl_limit_intensity, 204 .backlight_limit = corgibl_limit_intensity,
203#endif 205#endif
204 .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, 206 .charge_on_volt = SHARPSL_CHARGE_ON_VOLT,
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c
index 2c31ec725688..6f42004db3ed 100644
--- a/arch/arm/mach-pxa/ssp.c
+++ b/arch/arm/mach-pxa/ssp.c
@@ -356,7 +356,7 @@ static int __devinit ssp_probe(struct platform_device *pdev, int type)
356 } 356 }
357 ssp->pdev = pdev; 357 ssp->pdev = pdev;
358 358
359 ssp->clk = clk_get(&pdev->dev, "SSPCLK"); 359 ssp->clk = clk_get(&pdev->dev, NULL);
360 if (IS_ERR(ssp->clk)) { 360 if (IS_ERR(ssp->clk)) {
361 ret = PTR_ERR(ssp->clk); 361 ret = PTR_ERR(ssp->clk);
362 goto err_free; 362 goto err_free;
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index 5ccde7cf39e8..603d1db9baf0 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -10,6 +10,7 @@ config MACH_REALVIEW_EB
10config REALVIEW_EB_ARM11MP 10config REALVIEW_EB_ARM11MP
11 bool "Support ARM11MPCore tile" 11 bool "Support ARM11MPCore tile"
12 depends on MACH_REALVIEW_EB 12 depends on MACH_REALVIEW_EB
13 select CPU_V6
13 help 14 help
14 Enable support for the ARM11MPCore tile on the Realview platform. 15 Enable support for the ARM11MPCore tile on the Realview platform.
15 16
@@ -33,6 +34,7 @@ config MACH_REALVIEW_PB11MP
33 34
34config MACH_REALVIEW_PB1176 35config MACH_REALVIEW_PB1176
35 bool "Support RealView/PB1176 platform" 36 bool "Support RealView/PB1176 platform"
37 select CPU_V6
36 select ARM_GIC 38 select ARM_GIC
37 help 39 help
38 Include support for the ARM(R) RealView ARM1176 Platform Baseboard. 40 Include support for the ARM(R) RealView ARM1176 Platform Baseboard.
diff --git a/arch/arm/mach-realview/clock.c b/arch/arm/mach-realview/clock.c
index 3e706c57833a..a7043115de72 100644
--- a/arch/arm/mach-realview/clock.c
+++ b/arch/arm/mach-realview/clock.c
@@ -10,9 +10,11 @@
10 */ 10 */
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/device.h>
13#include <linux/list.h> 14#include <linux/list.h>
14#include <linux/errno.h> 15#include <linux/errno.h>
15#include <linux/err.h> 16#include <linux/err.h>
17#include <linux/string.h>
16#include <linux/clk.h> 18#include <linux/clk.h>
17#include <linux/mutex.h> 19#include <linux/mutex.h>
18 20
@@ -20,32 +22,6 @@
20 22
21#include "clock.h" 23#include "clock.h"
22 24
23static LIST_HEAD(clocks);
24static DEFINE_MUTEX(clocks_mutex);
25
26struct clk *clk_get(struct device *dev, const char *id)
27{
28 struct clk *p, *clk = ERR_PTR(-ENOENT);
29
30 mutex_lock(&clocks_mutex);
31 list_for_each_entry(p, &clocks, node) {
32 if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
33 clk = p;
34 break;
35 }
36 }
37 mutex_unlock(&clocks_mutex);
38
39 return clk;
40}
41EXPORT_SYMBOL(clk_get);
42
43void clk_put(struct clk *clk)
44{
45 module_put(clk->owner);
46}
47EXPORT_SYMBOL(clk_put);
48
49int clk_enable(struct clk *clk) 25int clk_enable(struct clk *clk)
50{ 26{
51 return 0; 27 return 0;
@@ -65,7 +41,9 @@ EXPORT_SYMBOL(clk_get_rate);
65 41
66long clk_round_rate(struct clk *clk, unsigned long rate) 42long clk_round_rate(struct clk *clk, unsigned long rate)
67{ 43{
68 return rate; 44 struct icst307_vco vco;
45 vco = icst307_khz_to_vco(clk->params, rate / 1000);
46 return icst307_khz(clk->params, vco) * 1000;
69} 47}
70EXPORT_SYMBOL(clk_round_rate); 48EXPORT_SYMBOL(clk_round_rate);
71 49
@@ -78,57 +56,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
78 56
79 vco = icst307_khz_to_vco(clk->params, rate / 1000); 57 vco = icst307_khz_to_vco(clk->params, rate / 1000);
80 clk->rate = icst307_khz(clk->params, vco) * 1000; 58 clk->rate = icst307_khz(clk->params, vco) * 1000;
81
82 printk("Clock %s: setting VCO reg params: S=%d R=%d V=%d\n",
83 clk->name, vco.s, vco.r, vco.v);
84
85 clk->setvco(clk, vco); 59 clk->setvco(clk, vco);
86 ret = 0; 60 ret = 0;
87 } 61 }
88 return ret; 62 return ret;
89} 63}
90EXPORT_SYMBOL(clk_set_rate); 64EXPORT_SYMBOL(clk_set_rate);
91
92/*
93 * These are fixed clocks.
94 */
95static struct clk kmi_clk = {
96 .name = "KMIREFCLK",
97 .rate = 24000000,
98};
99
100static struct clk uart_clk = {
101 .name = "UARTCLK",
102 .rate = 24000000,
103};
104
105static struct clk mmci_clk = {
106 .name = "MCLK",
107 .rate = 33000000,
108};
109
110int clk_register(struct clk *clk)
111{
112 mutex_lock(&clocks_mutex);
113 list_add(&clk->node, &clocks);
114 mutex_unlock(&clocks_mutex);
115 return 0;
116}
117EXPORT_SYMBOL(clk_register);
118
119void clk_unregister(struct clk *clk)
120{
121 mutex_lock(&clocks_mutex);
122 list_del(&clk->node);
123 mutex_unlock(&clocks_mutex);
124}
125EXPORT_SYMBOL(clk_unregister);
126
127static int __init clk_init(void)
128{
129 clk_register(&kmi_clk);
130 clk_register(&uart_clk);
131 clk_register(&mmci_clk);
132 return 0;
133}
134arch_initcall(clk_init);
diff --git a/arch/arm/mach-realview/clock.h b/arch/arm/mach-realview/clock.h
index dadba695e181..ebbb0f06b600 100644
--- a/arch/arm/mach-realview/clock.h
+++ b/arch/arm/mach-realview/clock.h
@@ -12,14 +12,8 @@ struct module;
12struct icst307_params; 12struct icst307_params;
13 13
14struct clk { 14struct clk {
15 struct list_head node;
16 unsigned long rate; 15 unsigned long rate;
17 struct module *owner;
18 const char *name;
19 const struct icst307_params *params; 16 const struct icst307_params *params;
20 void *data; 17 void *data;
21 void (*setvco)(struct clk *, struct icst307_vco vco); 18 void (*setvco)(struct clk *, struct icst307_vco vco);
22}; 19};
23
24int clk_register(struct clk *clk);
25void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 2f04d54711e7..2491374818e9 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -29,6 +29,7 @@
29#include <linux/clockchips.h> 29#include <linux/clockchips.h>
30#include <linux/io.h> 30#include <linux/io.h>
31 31
32#include <asm/clkdev.h>
32#include <asm/system.h> 33#include <asm/system.h>
33#include <mach/hardware.h> 34#include <mach/hardware.h>
34#include <asm/irq.h> 35#include <asm/irq.h>
@@ -188,13 +189,60 @@ static void realview_oscvco_set(struct clk *clk, struct icst307_vco vco)
188 writel(0, sys_lock); 189 writel(0, sys_lock);
189} 190}
190 191
191struct clk realview_clcd_clk = { 192static struct clk oscvco_clk = {
192 .name = "CLCDCLK",
193 .params = &realview_oscvco_params, 193 .params = &realview_oscvco_params,
194 .setvco = realview_oscvco_set, 194 .setvco = realview_oscvco_set,
195}; 195};
196 196
197/* 197/*
198 * These are fixed clocks.
199 */
200static struct clk ref24_clk = {
201 .rate = 24000000,
202};
203
204static struct clk_lookup lookups[] = {
205 { /* UART0 */
206 .dev_id = "dev:f1",
207 .clk = &ref24_clk,
208 }, { /* UART1 */
209 .dev_id = "dev:f2",
210 .clk = &ref24_clk,
211 }, { /* UART2 */
212 .dev_id = "dev:f3",
213 .clk = &ref24_clk,
214 }, { /* UART3 */
215 .dev_id = "fpga:09",
216 .clk = &ref24_clk,
217 }, { /* KMI0 */
218 .dev_id = "fpga:06",
219 .clk = &ref24_clk,
220 }, { /* KMI1 */
221 .dev_id = "fpga:07",
222 .clk = &ref24_clk,
223 }, { /* MMC0 */
224 .dev_id = "fpga:05",
225 .clk = &ref24_clk,
226 }, { /* EB:CLCD */
227 .dev_id = "dev:20",
228 .clk = &oscvco_clk,
229 }, { /* PB:CLCD */
230 .dev_id = "issp:20",
231 .clk = &oscvco_clk,
232 }
233};
234
235static int __init clk_init(void)
236{
237 int i;
238
239 for (i = 0; i < ARRAY_SIZE(lookups); i++)
240 clkdev_add(&lookups[i]);
241 return 0;
242}
243arch_initcall(clk_init);
244
245/*
198 * CLCD support. 246 * CLCD support.
199 */ 247 */
200#define SYS_CLCD_NLCDIOON (1 << 2) 248#define SYS_CLCD_NLCDIOON (1 << 2)
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 3cea92c70d8f..614e8cb31713 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -48,7 +48,6 @@ extern struct platform_device realview_flash_device;
48extern struct platform_device realview_i2c_device; 48extern struct platform_device realview_i2c_device;
49extern struct mmc_platform_data realview_mmc0_plat_data; 49extern struct mmc_platform_data realview_mmc0_plat_data;
50extern struct mmc_platform_data realview_mmc1_plat_data; 50extern struct mmc_platform_data realview_mmc1_plat_data;
51extern struct clk realview_clcd_clk;
52extern struct clcd_board clcd_plat_data; 51extern struct clcd_board clcd_plat_data;
53extern void __iomem *gic_cpu_base_addr; 52extern void __iomem *gic_cpu_base_addr;
54#ifdef CONFIG_LOCAL_TIMERS 53#ifdef CONFIG_LOCAL_TIMERS
diff --git a/arch/arm/mach-realview/include/mach/clkdev.h b/arch/arm/mach-realview/include/mach/clkdev.h
new file mode 100644
index 000000000000..04b37a89801c
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/clkdev.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_MACH_CLKDEV_H
2#define __ASM_MACH_CLKDEV_H
3
4#define __clk_get(clk) ({ 1; })
5#define __clk_put(clk) do { } while (0)
6
7#endif
diff --git a/arch/arm/mach-realview/include/mach/platform.h b/arch/arm/mach-realview/include/mach/platform.h
index 4034b54950c2..793a3a332712 100644
--- a/arch/arm/mach-realview/include/mach/platform.h
+++ b/arch/arm/mach-realview/include/mach/platform.h
@@ -239,27 +239,10 @@
239#define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */ 239#define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */
240 240
241/* 241/*
242 * Application Flash
243 *
244 */
245#define FLASH_BASE REALVIEW_FLASH_BASE
246#define FLASH_SIZE REALVIEW_FLASH_SIZE
247#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1)
248#define FLASH_BLOCK_SIZE SZ_128K
249
250/*
251 * Boot Flash
252 *
253 */
254#define EPROM_BASE REALVIEW_BOOT_ROM_HI
255#define EPROM_SIZE REALVIEW_BOOT_ROM_SIZE
256#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1)
257
258/*
259 * Clean base - dummy 242 * Clean base - dummy
260 * 243 *
261 */ 244 */
262#define CLEAN_BASE EPROM_BASE 245#define CLEAN_BASE REALVIEW_BOOT_ROM_HI
263 246
264/* 247/*
265 * System controller bit assignment 248 * System controller bit assignment
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index eb829eb1ebe2..3420e2e719e6 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -372,8 +372,6 @@ static void __init realview_eb_init(void)
372#endif 372#endif
373 } 373 }
374 374
375 clk_register(&realview_clcd_clk);
376
377 realview_flash_register(&realview_eb_flash_resource, 1); 375 realview_flash_register(&realview_eb_flash_resource, 1);
378 platform_device_register(&realview_i2c_device); 376 platform_device_register(&realview_i2c_device);
379 eth_device_register(); 377 eth_device_register();
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index cccdb3eb90fe..0481416d37c9 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -265,8 +265,6 @@ static void __init realview_pb1176_init(void)
265 l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff); 265 l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
266#endif 266#endif
267 267
268 clk_register(&realview_clcd_clk);
269
270 realview_flash_register(&realview_pb1176_flash_resource, 1); 268 realview_flash_register(&realview_pb1176_flash_resource, 1);
271 platform_device_register(&realview_pb1176_smsc911x_device); 269 platform_device_register(&realview_pb1176_smsc911x_device);
272 270
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 8b863148ec18..6197dd8e8edf 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -312,8 +312,6 @@ static void __init realview_pb11mp_init(void)
312 l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff); 312 l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
313#endif 313#endif
314 314
315 clk_register(&realview_clcd_clk);
316
317 realview_flash_register(realview_pb11mp_flash_resource, 315 realview_flash_register(realview_pb11mp_flash_resource,
318 ARRAY_SIZE(realview_pb11mp_flash_resource)); 316 ARRAY_SIZE(realview_pb11mp_flash_resource));
319 platform_device_register(&realview_pb11mp_smsc911x_device); 317 platform_device_register(&realview_pb11mp_smsc911x_device);
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index 99fdc736698c..7315569fbfd7 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -7,6 +7,7 @@
7config CPU_S3C2410 7config CPU_S3C2410
8 bool 8 bool
9 depends on ARCH_S3C2410 9 depends on ARCH_S3C2410
10 select CPU_ARM920T
10 select S3C2410_CLOCK 11 select S3C2410_CLOCK
11 select S3C2410_GPIO 12 select S3C2410_GPIO
12 select CPU_LLSERIAL_S3C2410 13 select CPU_LLSERIAL_S3C2410
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig
index c59a9d2ee9a6..ca99564ae4b5 100644
--- a/arch/arm/mach-s3c2412/Kconfig
+++ b/arch/arm/mach-s3c2412/Kconfig
@@ -7,6 +7,7 @@
7config CPU_S3C2412 7config CPU_S3C2412
8 bool 8 bool
9 depends on ARCH_S3C2410 9 depends on ARCH_S3C2410
10 select CPU_ARM926T
10 select CPU_LLSERIAL_S3C2440 11 select CPU_LLSERIAL_S3C2440
11 select S3C2412_PM if PM 12 select S3C2412_PM if PM
12 select S3C2412_DMA if S3C2410_DMA 13 select S3C2412_DMA if S3C2410_DMA
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index 25de042ab996..0429d255b0d8 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -7,6 +7,7 @@
7config CPU_S3C2440 7config CPU_S3C2440
8 bool 8 bool
9 depends on ARCH_S3C2410 9 depends on ARCH_S3C2410
10 select CPU_ARM920T
10 select S3C2410_CLOCK 11 select S3C2410_CLOCK
11 select S3C2410_PM if PM 12 select S3C2410_PM if PM
12 select S3C2410_GPIO 13 select S3C2410_GPIO
diff --git a/arch/arm/mach-s3c2442/Kconfig b/arch/arm/mach-s3c2442/Kconfig
index 26d131a77074..b289d198020e 100644
--- a/arch/arm/mach-s3c2442/Kconfig
+++ b/arch/arm/mach-s3c2442/Kconfig
@@ -7,6 +7,7 @@
7config CPU_S3C2442 7config CPU_S3C2442
8 bool 8 bool
9 depends on ARCH_S3C2410 9 depends on ARCH_S3C2410
10 select CPU_ARM920T
10 select S3C2410_CLOCK 11 select S3C2410_CLOCK
11 select S3C2410_GPIO 12 select S3C2410_GPIO
12 select S3C2410_PM if PM 13 select S3C2410_PM if PM
diff --git a/arch/arm/mach-sa1100/clock.c b/arch/arm/mach-sa1100/clock.c
index 43c30f84abf2..dab3c6347a8f 100644
--- a/arch/arm/mach-sa1100/clock.c
+++ b/arch/arm/mach-sa1100/clock.c
@@ -3,6 +3,7 @@
3 */ 3 */
4#include <linux/module.h> 4#include <linux/module.h>
5#include <linux/kernel.h> 5#include <linux/kernel.h>
6#include <linux/device.h>
6#include <linux/list.h> 7#include <linux/list.h>
7#include <linux/errno.h> 8#include <linux/errno.h>
8#include <linux/err.h> 9#include <linux/err.h>
@@ -14,36 +15,39 @@
14#include <mach/hardware.h> 15#include <mach/hardware.h>
15 16
16/* 17/*
17 * Very simple clock implementation - we only have one clock to 18 * Very simple clock implementation - we only have one clock to deal with.
18 * deal with at the moment, so we only match using the "name".
19 */ 19 */
20struct clk { 20struct clk {
21 struct list_head node;
22 unsigned long rate;
23 const char *name;
24 unsigned int enabled; 21 unsigned int enabled;
25 void (*enable)(void);
26 void (*disable)(void);
27}; 22};
28 23
29static LIST_HEAD(clocks); 24static void clk_gpio27_enable(void)
30static DEFINE_MUTEX(clocks_mutex); 25{
26 /*
27 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
28 * (SA-1110 Developer's Manual, section 9.1.2.1)
29 */
30 GAFR |= GPIO_32_768kHz;
31 GPDR |= GPIO_32_768kHz;
32 TUCR = TUCR_3_6864MHz;
33}
34
35static void clk_gpio27_disable(void)
36{
37 TUCR = 0;
38 GPDR &= ~GPIO_32_768kHz;
39 GAFR &= ~GPIO_32_768kHz;
40}
41
42static struct clk clk_gpio27;
43
31static DEFINE_SPINLOCK(clocks_lock); 44static DEFINE_SPINLOCK(clocks_lock);
32 45
33struct clk *clk_get(struct device *dev, const char *id) 46struct clk *clk_get(struct device *dev, const char *id)
34{ 47{
35 struct clk *p, *clk = ERR_PTR(-ENOENT); 48 const char *devname = dev_name(dev);
36
37 mutex_lock(&clocks_mutex);
38 list_for_each_entry(p, &clocks, node) {
39 if (strcmp(id, p->name) == 0) {
40 clk = p;
41 break;
42 }
43 }
44 mutex_unlock(&clocks_mutex);
45 49
46 return clk; 50 return strcmp(devname, "sa1111.0") ? ERR_PTR(-ENOENT) : &clk_gpio27;
47} 51}
48EXPORT_SYMBOL(clk_get); 52EXPORT_SYMBOL(clk_get);
49 53
@@ -58,7 +62,7 @@ int clk_enable(struct clk *clk)
58 62
59 spin_lock_irqsave(&clocks_lock, flags); 63 spin_lock_irqsave(&clocks_lock, flags);
60 if (clk->enabled++ == 0) 64 if (clk->enabled++ == 0)
61 clk->enable(); 65 clk_gpio27_enable();
62 spin_unlock_irqrestore(&clocks_lock, flags); 66 spin_unlock_irqrestore(&clocks_lock, flags);
63 return 0; 67 return 0;
64} 68}
@@ -72,63 +76,13 @@ void clk_disable(struct clk *clk)
72 76
73 spin_lock_irqsave(&clocks_lock, flags); 77 spin_lock_irqsave(&clocks_lock, flags);
74 if (--clk->enabled == 0) 78 if (--clk->enabled == 0)
75 clk->disable(); 79 clk_gpio27_disable();
76 spin_unlock_irqrestore(&clocks_lock, flags); 80 spin_unlock_irqrestore(&clocks_lock, flags);
77} 81}
78EXPORT_SYMBOL(clk_disable); 82EXPORT_SYMBOL(clk_disable);
79 83
80unsigned long clk_get_rate(struct clk *clk) 84unsigned long clk_get_rate(struct clk *clk)
81{ 85{
82 return clk->rate; 86 return 3686400;
83} 87}
84EXPORT_SYMBOL(clk_get_rate); 88EXPORT_SYMBOL(clk_get_rate);
85
86
87static void clk_gpio27_enable(void)
88{
89 /*
90 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
91 * (SA-1110 Developer's Manual, section 9.1.2.1)
92 */
93 GAFR |= GPIO_32_768kHz;
94 GPDR |= GPIO_32_768kHz;
95 TUCR = TUCR_3_6864MHz;
96}
97
98static void clk_gpio27_disable(void)
99{
100 TUCR = 0;
101 GPDR &= ~GPIO_32_768kHz;
102 GAFR &= ~GPIO_32_768kHz;
103}
104
105static struct clk clk_gpio27 = {
106 .name = "SA1111_CLK",
107 .rate = 3686400,
108 .enable = clk_gpio27_enable,
109 .disable = clk_gpio27_disable,
110};
111
112int clk_register(struct clk *clk)
113{
114 mutex_lock(&clocks_mutex);
115 list_add(&clk->node, &clocks);
116 mutex_unlock(&clocks_mutex);
117 return 0;
118}
119EXPORT_SYMBOL(clk_register);
120
121void clk_unregister(struct clk *clk)
122{
123 mutex_lock(&clocks_mutex);
124 list_del(&clk->node);
125 mutex_unlock(&clocks_mutex);
126}
127EXPORT_SYMBOL(clk_unregister);
128
129static int __init clk_init(void)
130{
131 clk_register(&clk_gpio27);
132 return 0;
133}
134arch_initcall(clk_init);
diff --git a/arch/arm/mach-versatile/Kconfig b/arch/arm/mach-versatile/Kconfig
index 95096afd5271..c781f30c8368 100644
--- a/arch/arm/mach-versatile/Kconfig
+++ b/arch/arm/mach-versatile/Kconfig
@@ -3,12 +3,14 @@ menu "Versatile platform type"
3 3
4config ARCH_VERSATILE_PB 4config ARCH_VERSATILE_PB
5 bool "Support Versatile/PB platform" 5 bool "Support Versatile/PB platform"
6 select CPU_ARM926T
6 default y 7 default y
7 help 8 help
8 Include support for the ARM(R) Versatile/PB platform. 9 Include support for the ARM(R) Versatile/PB platform.
9 10
10config MACH_VERSATILE_AB 11config MACH_VERSATILE_AB
11 bool "Support Versatile/AB platform" 12 bool "Support Versatile/AB platform"
13 select CPU_ARM926T
12 help 14 help
13 Include support for the ARM(R) Versatile/AP platform. 15 Include support for the ARM(R) Versatile/AP platform.
14 16
diff --git a/arch/arm/mach-versatile/clock.c b/arch/arm/mach-versatile/clock.c
index 9336508ec0b2..c50a44ea7ee6 100644
--- a/arch/arm/mach-versatile/clock.c
+++ b/arch/arm/mach-versatile/clock.c
@@ -10,6 +10,7 @@
10 */ 10 */
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/device.h>
13#include <linux/list.h> 14#include <linux/list.h>
14#include <linux/errno.h> 15#include <linux/errno.h>
15#include <linux/err.h> 16#include <linux/err.h>
@@ -17,36 +18,11 @@
17#include <linux/clk.h> 18#include <linux/clk.h>
18#include <linux/mutex.h> 19#include <linux/mutex.h>
19 20
21#include <asm/clkdev.h>
20#include <asm/hardware/icst307.h> 22#include <asm/hardware/icst307.h>
21 23
22#include "clock.h" 24#include "clock.h"
23 25
24static LIST_HEAD(clocks);
25static DEFINE_MUTEX(clocks_mutex);
26
27struct clk *clk_get(struct device *dev, const char *id)
28{
29 struct clk *p, *clk = ERR_PTR(-ENOENT);
30
31 mutex_lock(&clocks_mutex);
32 list_for_each_entry(p, &clocks, node) {
33 if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
34 clk = p;
35 break;
36 }
37 }
38 mutex_unlock(&clocks_mutex);
39
40 return clk;
41}
42EXPORT_SYMBOL(clk_get);
43
44void clk_put(struct clk *clk)
45{
46 module_put(clk->owner);
47}
48EXPORT_SYMBOL(clk_put);
49
50int clk_enable(struct clk *clk) 26int clk_enable(struct clk *clk)
51{ 27{
52 return 0; 28 return 0;
@@ -66,7 +42,9 @@ EXPORT_SYMBOL(clk_get_rate);
66 42
67long clk_round_rate(struct clk *clk, unsigned long rate) 43long clk_round_rate(struct clk *clk, unsigned long rate)
68{ 44{
69 return rate; 45 struct icst307_vco vco;
46 vco = icst307_khz_to_vco(clk->params, rate / 1000);
47 return icst307_khz(clk->params, vco) * 1000;
70} 48}
71EXPORT_SYMBOL(clk_round_rate); 49EXPORT_SYMBOL(clk_round_rate);
72 50
@@ -79,57 +57,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
79 57
80 vco = icst307_khz_to_vco(clk->params, rate / 1000); 58 vco = icst307_khz_to_vco(clk->params, rate / 1000);
81 clk->rate = icst307_khz(clk->params, vco) * 1000; 59 clk->rate = icst307_khz(clk->params, vco) * 1000;
82
83 printk("Clock %s: setting VCO reg params: S=%d R=%d V=%d\n",
84 clk->name, vco.s, vco.r, vco.v);
85
86 clk->setvco(clk, vco); 60 clk->setvco(clk, vco);
87 ret = 0; 61 ret = 0;
88 } 62 }
89 return ret; 63 return ret;
90} 64}
91EXPORT_SYMBOL(clk_set_rate); 65EXPORT_SYMBOL(clk_set_rate);
92
93/*
94 * These are fixed clocks.
95 */
96static struct clk kmi_clk = {
97 .name = "KMIREFCLK",
98 .rate = 24000000,
99};
100
101static struct clk uart_clk = {
102 .name = "UARTCLK",
103 .rate = 24000000,
104};
105
106static struct clk mmci_clk = {
107 .name = "MCLK",
108 .rate = 33000000,
109};
110
111int clk_register(struct clk *clk)
112{
113 mutex_lock(&clocks_mutex);
114 list_add(&clk->node, &clocks);
115 mutex_unlock(&clocks_mutex);
116 return 0;
117}
118EXPORT_SYMBOL(clk_register);
119
120void clk_unregister(struct clk *clk)
121{
122 mutex_lock(&clocks_mutex);
123 list_del(&clk->node);
124 mutex_unlock(&clocks_mutex);
125}
126EXPORT_SYMBOL(clk_unregister);
127
128static int __init clk_init(void)
129{
130 clk_register(&kmi_clk);
131 clk_register(&uart_clk);
132 clk_register(&mmci_clk);
133 return 0;
134}
135arch_initcall(clk_init);
diff --git a/arch/arm/mach-versatile/clock.h b/arch/arm/mach-versatile/clock.h
index 8b0b61dd17e4..03468fdc3e58 100644
--- a/arch/arm/mach-versatile/clock.h
+++ b/arch/arm/mach-versatile/clock.h
@@ -12,14 +12,9 @@ struct module;
12struct icst307_params; 12struct icst307_params;
13 13
14struct clk { 14struct clk {
15 struct list_head node;
16 unsigned long rate; 15 unsigned long rate;
17 struct module *owner;
18 const char *name;
19 const struct icst307_params *params; 16 const struct icst307_params *params;
17 u32 oscoff;
20 void *data; 18 void *data;
21 void (*setvco)(struct clk *, struct icst307_vco vco); 19 void (*setvco)(struct clk *, struct icst307_vco vco);
22}; 20};
23
24int clk_register(struct clk *clk);
25void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 565e0ba0d67e..df25aa138509 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -31,6 +31,7 @@
31#include <linux/cnt32_to_63.h> 31#include <linux/cnt32_to_63.h>
32#include <linux/io.h> 32#include <linux/io.h>
33 33
34#include <asm/clkdev.h>
34#include <asm/system.h> 35#include <asm/system.h>
35#include <mach/hardware.h> 36#include <mach/hardware.h>
36#include <asm/irq.h> 37#include <asm/irq.h>
@@ -373,22 +374,60 @@ static const struct icst307_params versatile_oscvco_params = {
373 374
374static void versatile_oscvco_set(struct clk *clk, struct icst307_vco vco) 375static void versatile_oscvco_set(struct clk *clk, struct icst307_vco vco)
375{ 376{
376 void __iomem *sys_lock = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_LOCK_OFFSET; 377 void __iomem *sys = __io_address(VERSATILE_SYS_BASE);
377 void __iomem *sys_osc = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_OSCCLCD_OFFSET; 378 void __iomem *sys_lock = sys + VERSATILE_SYS_LOCK_OFFSET;
378 u32 val; 379 u32 val;
379 380
380 val = readl(sys_osc) & ~0x7ffff; 381 val = readl(sys + clk->oscoff) & ~0x7ffff;
381 val |= vco.v | (vco.r << 9) | (vco.s << 16); 382 val |= vco.v | (vco.r << 9) | (vco.s << 16);
382 383
383 writel(0xa05f, sys_lock); 384 writel(0xa05f, sys_lock);
384 writel(val, sys_osc); 385 writel(val, sys + clk->oscoff);
385 writel(0, sys_lock); 386 writel(0, sys_lock);
386} 387}
387 388
388static struct clk versatile_clcd_clk = { 389static struct clk osc4_clk = {
389 .name = "CLCDCLK",
390 .params = &versatile_oscvco_params, 390 .params = &versatile_oscvco_params,
391 .setvco = versatile_oscvco_set, 391 .oscoff = VERSATILE_SYS_OSCCLCD_OFFSET,
392 .setvco = versatile_oscvco_set,
393};
394
395/*
396 * These are fixed clocks.
397 */
398static struct clk ref24_clk = {
399 .rate = 24000000,
400};
401
402static struct clk_lookup lookups[] __initdata = {
403 { /* UART0 */
404 .dev_id = "dev:f1",
405 .clk = &ref24_clk,
406 }, { /* UART1 */
407 .dev_id = "dev:f2",
408 .clk = &ref24_clk,
409 }, { /* UART2 */
410 .dev_id = "dev:f3",
411 .clk = &ref24_clk,
412 }, { /* UART3 */
413 .dev_id = "fpga:09",
414 .clk = &ref24_clk,
415 }, { /* KMI0 */
416 .dev_id = "fpga:06",
417 .clk = &ref24_clk,
418 }, { /* KMI1 */
419 .dev_id = "fpga:07",
420 .clk = &ref24_clk,
421 }, { /* MMC0 */
422 .dev_id = "fpga:05",
423 .clk = &ref24_clk,
424 }, { /* MMC1 */
425 .dev_id = "fpga:0b",
426 .clk = &ref24_clk,
427 }, { /* CLCD */
428 .dev_id = "dev:20",
429 .clk = &osc4_clk,
430 }
392}; 431};
393 432
394/* 433/*
@@ -786,7 +825,8 @@ void __init versatile_init(void)
786{ 825{
787 int i; 826 int i;
788 827
789 clk_register(&versatile_clcd_clk); 828 for (i = 0; i < ARRAY_SIZE(lookups); i++)
829 clkdev_add(&lookups[i]);
790 830
791 platform_device_register(&versatile_flash_device); 831 platform_device_register(&versatile_flash_device);
792 platform_device_register(&versatile_i2c_device); 832 platform_device_register(&versatile_i2c_device);
diff --git a/arch/arm/mach-versatile/include/mach/clkdev.h b/arch/arm/mach-versatile/include/mach/clkdev.h
new file mode 100644
index 000000000000..04b37a89801c
--- /dev/null
+++ b/arch/arm/mach-versatile/include/mach/clkdev.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_MACH_CLKDEV_H
2#define __ASM_MACH_CLKDEV_H
3
4#define __clk_get(clk) ({ 1; })
5#define __clk_put(clk) do { } while (0)
6
7#endif
diff --git a/arch/arm/mach-versatile/include/mach/platform.h b/arch/arm/mach-versatile/include/mach/platform.h
index 27cbe6a3f220..f91ba930ca8a 100644
--- a/arch/arm/mach-versatile/include/mach/platform.h
+++ b/arch/arm/mach-versatile/include/mach/platform.h
@@ -436,28 +436,12 @@
436#define SIC_INTMASK_PCI1 (1 << SIC_INT_PCI1) 436#define SIC_INTMASK_PCI1 (1 << SIC_INT_PCI1)
437#define SIC_INTMASK_PCI2 (1 << SIC_INT_PCI2) 437#define SIC_INTMASK_PCI2 (1 << SIC_INT_PCI2)
438#define SIC_INTMASK_PCI3 (1 << SIC_INT_PCI3) 438#define SIC_INTMASK_PCI3 (1 << SIC_INT_PCI3)
439/*
440 * Application Flash
441 *
442 */
443#define FLASH_BASE VERSATILE_FLASH_BASE
444#define FLASH_SIZE VERSATILE_FLASH_SIZE
445#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1)
446#define FLASH_BLOCK_SIZE SZ_128K
447
448/*
449 * Boot Flash
450 *
451 */
452#define EPROM_BASE VERSATILE_BOOT_ROM_HI
453#define EPROM_SIZE VERSATILE_BOOT_ROM_SIZE
454#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1)
455 439
456/* 440/*
457 * Clean base - dummy 441 * Clean base - dummy
458 * 442 *
459 */ 443 */
460#define CLEAN_BASE EPROM_BASE 444#define CLEAN_BASE VERSATILE_BOOT_ROM_HI
461 445
462/* 446/*
463 * System controller bit assignment 447 * System controller bit assignment
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index ab5f7a21350b..cf44de512830 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -10,8 +10,7 @@ config CPU_32
10 10
11# ARM610 11# ARM610
12config CPU_ARM610 12config CPU_ARM610
13 bool "Support ARM610 processor" 13 bool "Support ARM610 processor" if ARCH_RPC
14 depends on ARCH_RPC
15 select CPU_32v3 14 select CPU_32v3
16 select CPU_CACHE_V3 15 select CPU_CACHE_V3
17 select CPU_CACHE_VIVT 16 select CPU_CACHE_VIVT
@@ -43,8 +42,7 @@ config CPU_ARM7TDMI
43 42
44# ARM710 43# ARM710
45config CPU_ARM710 44config CPU_ARM710
46 bool "Support ARM710 processor" if !ARCH_CLPS7500 && ARCH_RPC 45 bool "Support ARM710 processor" if ARCH_RPC
47 default y if ARCH_CLPS7500
48 select CPU_32v3 46 select CPU_32v3
49 select CPU_CACHE_V3 47 select CPU_CACHE_V3
50 select CPU_CACHE_VIVT 48 select CPU_CACHE_VIVT
@@ -63,8 +61,7 @@ config CPU_ARM710
63 61
64# ARM720T 62# ARM720T
65config CPU_ARM720T 63config CPU_ARM720T
66 bool "Support ARM720T processor" if !ARCH_CLPS711X && !ARCH_L7200 && !ARCH_CDB89712 && ARCH_INTEGRATOR 64 bool "Support ARM720T processor" if ARCH_INTEGRATOR
67 default y if ARCH_CLPS711X || ARCH_L7200 || ARCH_CDB89712 || ARCH_H720X
68 select CPU_32v4T 65 select CPU_32v4T
69 select CPU_ABRT_LV4T 66 select CPU_ABRT_LV4T
70 select CPU_PABRT_NOIFAR 67 select CPU_PABRT_NOIFAR
@@ -114,9 +111,7 @@ config CPU_ARM9TDMI
114 111
115# ARM920T 112# ARM920T
116config CPU_ARM920T 113config CPU_ARM920T
117 bool "Support ARM920T processor" 114 bool "Support ARM920T processor" if ARCH_INTEGRATOR
118 depends on ARCH_EP93XX || ARCH_INTEGRATOR || CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_IMX || ARCH_AAEC2000 || ARCH_AT91RM9200
119 default y if CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_AT91RM9200
120 select CPU_32v4T 115 select CPU_32v4T
121 select CPU_ABRT_EV4T 116 select CPU_ABRT_EV4T
122 select CPU_PABRT_NOIFAR 117 select CPU_PABRT_NOIFAR
@@ -138,8 +133,6 @@ config CPU_ARM920T
138# ARM922T 133# ARM922T
139config CPU_ARM922T 134config CPU_ARM922T
140 bool "Support ARM922T processor" if ARCH_INTEGRATOR 135 bool "Support ARM922T processor" if ARCH_INTEGRATOR
141 depends on ARCH_LH7A40X || ARCH_INTEGRATOR || ARCH_KS8695
142 default y if ARCH_LH7A40X || ARCH_KS8695
143 select CPU_32v4T 136 select CPU_32v4T
144 select CPU_ABRT_EV4T 137 select CPU_ABRT_EV4T
145 select CPU_PABRT_NOIFAR 138 select CPU_PABRT_NOIFAR
@@ -159,8 +152,6 @@ config CPU_ARM922T
159# ARM925T 152# ARM925T
160config CPU_ARM925T 153config CPU_ARM925T
161 bool "Support ARM925T processor" if ARCH_OMAP1 154 bool "Support ARM925T processor" if ARCH_OMAP1
162 depends on ARCH_OMAP15XX
163 default y if ARCH_OMAP15XX
164 select CPU_32v4T 155 select CPU_32v4T
165 select CPU_ABRT_EV4T 156 select CPU_ABRT_EV4T
166 select CPU_PABRT_NOIFAR 157 select CPU_PABRT_NOIFAR
@@ -179,22 +170,7 @@ config CPU_ARM925T
179 170
180# ARM926T 171# ARM926T
181config CPU_ARM926T 172config CPU_ARM926T
182 bool "Support ARM926T processor" 173 bool "Support ARM926T processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB
183 depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || \
184 MACH_VERSATILE_AB || ARCH_OMAP730 || \
185 ARCH_OMAP16XX || MACH_REALVIEW_EB || \
186 ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || \
187 ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || \
188 ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || \
189 ARCH_AT91SAM9G20 || ARCH_AT91CAP9 || \
190 ARCH_NS9XXX || ARCH_DAVINCI || ARCH_MX2
191 default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || \
192 ARCH_OMAP730 || ARCH_OMAP16XX || \
193 ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || \
194 ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || \
195 ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || \
196 ARCH_AT91SAM9G20 || ARCH_AT91CAP9 || \
197 ARCH_NS9XXX || ARCH_DAVINCI || ARCH_MX2
198 select CPU_32v5 174 select CPU_32v5
199 select CPU_ABRT_EV5TJ 175 select CPU_ABRT_EV5TJ
200 select CPU_PABRT_NOIFAR 176 select CPU_PABRT_NOIFAR
@@ -247,8 +223,7 @@ config CPU_ARM946E
247 223
248# ARM1020 - needs validating 224# ARM1020 - needs validating
249config CPU_ARM1020 225config CPU_ARM1020
250 bool "Support ARM1020T (rev 0) processor" 226 bool "Support ARM1020T (rev 0) processor" if ARCH_INTEGRATOR
251 depends on ARCH_INTEGRATOR
252 select CPU_32v5 227 select CPU_32v5
253 select CPU_ABRT_EV4T 228 select CPU_ABRT_EV4T
254 select CPU_PABRT_NOIFAR 229 select CPU_PABRT_NOIFAR
@@ -266,8 +241,7 @@ config CPU_ARM1020
266 241
267# ARM1020E - needs validating 242# ARM1020E - needs validating
268config CPU_ARM1020E 243config CPU_ARM1020E
269 bool "Support ARM1020E processor" 244 bool "Support ARM1020E processor" if ARCH_INTEGRATOR
270 depends on ARCH_INTEGRATOR
271 select CPU_32v5 245 select CPU_32v5
272 select CPU_ABRT_EV4T 246 select CPU_ABRT_EV4T
273 select CPU_PABRT_NOIFAR 247 select CPU_PABRT_NOIFAR
@@ -280,8 +254,7 @@ config CPU_ARM1020E
280 254
281# ARM1022E 255# ARM1022E
282config CPU_ARM1022 256config CPU_ARM1022
283 bool "Support ARM1022E processor" 257 bool "Support ARM1022E processor" if ARCH_INTEGRATOR
284 depends on ARCH_INTEGRATOR
285 select CPU_32v5 258 select CPU_32v5
286 select CPU_ABRT_EV4T 259 select CPU_ABRT_EV4T
287 select CPU_PABRT_NOIFAR 260 select CPU_PABRT_NOIFAR
@@ -299,8 +272,7 @@ config CPU_ARM1022
299 272
300# ARM1026EJ-S 273# ARM1026EJ-S
301config CPU_ARM1026 274config CPU_ARM1026
302 bool "Support ARM1026EJ-S processor" 275 bool "Support ARM1026EJ-S processor" if ARCH_INTEGRATOR
303 depends on ARCH_INTEGRATOR
304 select CPU_32v5 276 select CPU_32v5
305 select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10 277 select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10
306 select CPU_PABRT_NOIFAR 278 select CPU_PABRT_NOIFAR
@@ -317,8 +289,7 @@ config CPU_ARM1026
317 289
318# SA110 290# SA110
319config CPU_SA110 291config CPU_SA110
320 bool "Support StrongARM(R) SA-110 processor" if !ARCH_EBSA110 && !FOOTBRIDGE && !ARCH_TBOX && !ARCH_SHARK && !ARCH_NEXUSPCI && ARCH_RPC 292 bool "Support StrongARM(R) SA-110 processor" if ARCH_RPC
321 default y if ARCH_EBSA110 || FOOTBRIDGE || ARCH_TBOX || ARCH_SHARK || ARCH_NEXUSPCI
322 select CPU_32v3 if ARCH_RPC 293 select CPU_32v3 if ARCH_RPC
323 select CPU_32v4 if !ARCH_RPC 294 select CPU_32v4 if !ARCH_RPC
324 select CPU_ABRT_EV4 295 select CPU_ABRT_EV4
@@ -340,8 +311,6 @@ config CPU_SA110
340# SA1100 311# SA1100
341config CPU_SA1100 312config CPU_SA1100
342 bool 313 bool
343 depends on ARCH_SA1100
344 default y
345 select CPU_32v4 314 select CPU_32v4
346 select CPU_ABRT_EV4 315 select CPU_ABRT_EV4
347 select CPU_PABRT_NOIFAR 316 select CPU_PABRT_NOIFAR
@@ -353,8 +322,6 @@ config CPU_SA1100
353# XScale 322# XScale
354config CPU_XSCALE 323config CPU_XSCALE
355 bool 324 bool
356 depends on ARCH_IOP32X || ARCH_IOP33X || PXA25x || PXA27x || ARCH_IXP4XX || ARCH_IXP2000
357 default y
358 select CPU_32v5 325 select CPU_32v5
359 select CPU_ABRT_EV5T 326 select CPU_ABRT_EV5T
360 select CPU_PABRT_NOIFAR 327 select CPU_PABRT_NOIFAR
@@ -365,8 +332,6 @@ config CPU_XSCALE
365# XScale Core Version 3 332# XScale Core Version 3
366config CPU_XSC3 333config CPU_XSC3
367 bool 334 bool
368 depends on ARCH_IXP23XX || ARCH_IOP13XX || PXA3xx
369 default y
370 select CPU_32v5 335 select CPU_32v5
371 select CPU_ABRT_EV5T 336 select CPU_ABRT_EV5T
372 select CPU_PABRT_NOIFAR 337 select CPU_PABRT_NOIFAR
@@ -378,8 +343,6 @@ config CPU_XSC3
378# Feroceon 343# Feroceon
379config CPU_FEROCEON 344config CPU_FEROCEON
380 bool 345 bool
381 depends on ARCH_ORION5X || ARCH_LOKI || ARCH_KIRKWOOD || ARCH_MV78XX0
382 default y
383 select CPU_32v5 346 select CPU_32v5
384 select CPU_ABRT_EV5T 347 select CPU_ABRT_EV5T
385 select CPU_PABRT_NOIFAR 348 select CPU_PABRT_NOIFAR
@@ -399,10 +362,7 @@ config CPU_FEROCEON_OLD_ID
399 362
400# ARMv6 363# ARMv6
401config CPU_V6 364config CPU_V6
402 bool "Support ARM V6 processor" 365 bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB
403 depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3 || ARCH_MSM || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176
404 default y if ARCH_MX3
405 default y if ARCH_MSM
406 select CPU_32v6 366 select CPU_32v6
407 select CPU_ABRT_EV6 367 select CPU_ABRT_EV6
408 select CPU_PABRT_NOIFAR 368 select CPU_PABRT_NOIFAR
@@ -427,8 +387,7 @@ config CPU_32v6K
427 387
428# ARMv7 388# ARMv7
429config CPU_V7 389config CPU_V7
430 bool "Support ARM V7 processor" 390 bool "Support ARM V7 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB
431 depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP3
432 select CPU_32v6K 391 select CPU_32v6K
433 select CPU_32v7 392 select CPU_32v7
434 select CPU_ABRT_EV7 393 select CPU_ABRT_EV7
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index 13cdae8b0d44..80cd207cbaea 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -150,7 +150,7 @@ static void feroceon_l2_inv_range(unsigned long start, unsigned long end)
150 /* 150 /*
151 * Clean and invalidate partial last cache line. 151 * Clean and invalidate partial last cache line.
152 */ 152 */
153 if (end & (CACHE_LINE_SIZE - 1)) { 153 if (start < end && end & (CACHE_LINE_SIZE - 1)) {
154 l2_clean_inv_pa(end & ~(CACHE_LINE_SIZE - 1)); 154 l2_clean_inv_pa(end & ~(CACHE_LINE_SIZE - 1));
155 end &= ~(CACHE_LINE_SIZE - 1); 155 end &= ~(CACHE_LINE_SIZE - 1);
156 } 156 }
@@ -158,7 +158,7 @@ static void feroceon_l2_inv_range(unsigned long start, unsigned long end)
158 /* 158 /*
159 * Invalidate all full cache lines between 'start' and 'end'. 159 * Invalidate all full cache lines between 'start' and 'end'.
160 */ 160 */
161 while (start != end) { 161 while (start < end) {
162 unsigned long range_end = calc_range_end(start, end); 162 unsigned long range_end = calc_range_end(start, end);
163 l2_inv_pa_range(start, range_end - CACHE_LINE_SIZE); 163 l2_inv_pa_range(start, range_end - CACHE_LINE_SIZE);
164 start = range_end; 164 start = range_end;
diff --git a/arch/arm/mm/cache-xsc3l2.c b/arch/arm/mm/cache-xsc3l2.c
index 10b1bae1a258..464de893a988 100644
--- a/arch/arm/mm/cache-xsc3l2.c
+++ b/arch/arm/mm/cache-xsc3l2.c
@@ -98,7 +98,7 @@ static void xsc3_l2_inv_range(unsigned long start, unsigned long end)
98 /* 98 /*
99 * Clean and invalidate partial last cache line. 99 * Clean and invalidate partial last cache line.
100 */ 100 */
101 if (end & (CACHE_LINE_SIZE - 1)) { 101 if (start < end && (end & (CACHE_LINE_SIZE - 1))) {
102 xsc3_l2_clean_pa(end & ~(CACHE_LINE_SIZE - 1)); 102 xsc3_l2_clean_pa(end & ~(CACHE_LINE_SIZE - 1));
103 xsc3_l2_inv_pa(end & ~(CACHE_LINE_SIZE - 1)); 103 xsc3_l2_inv_pa(end & ~(CACHE_LINE_SIZE - 1));
104 end &= ~(CACHE_LINE_SIZE - 1); 104 end &= ~(CACHE_LINE_SIZE - 1);
@@ -107,7 +107,7 @@ static void xsc3_l2_inv_range(unsigned long start, unsigned long end)
107 /* 107 /*
108 * Invalidate all full cache lines between 'start' and 'end'. 108 * Invalidate all full cache lines between 'start' and 'end'.
109 */ 109 */
110 while (start != end) { 110 while (start < end) {
111 xsc3_l2_inv_pa(start); 111 xsc3_l2_inv_pa(start);
112 start += CACHE_LINE_SIZE; 112 start += CACHE_LINE_SIZE;
113 } 113 }
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 8ba754064559..f24803c1fb0b 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -180,20 +180,20 @@ void adjust_cr(unsigned long mask, unsigned long set)
180#endif 180#endif
181 181
182#define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_WRITE 182#define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_WRITE
183#define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_XN|PMD_SECT_AP_WRITE 183#define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_AP_WRITE
184 184
185static struct mem_type mem_types[] = { 185static struct mem_type mem_types[] = {
186 [MT_DEVICE] = { /* Strongly ordered / ARMv6 shared device */ 186 [MT_DEVICE] = { /* Strongly ordered / ARMv6 shared device */
187 .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_SHARED | 187 .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_SHARED |
188 L_PTE_SHARED, 188 L_PTE_SHARED,
189 .prot_l1 = PMD_TYPE_TABLE, 189 .prot_l1 = PMD_TYPE_TABLE,
190 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_UNCACHED, 190 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_S,
191 .domain = DOMAIN_IO, 191 .domain = DOMAIN_IO,
192 }, 192 },
193 [MT_DEVICE_NONSHARED] = { /* ARMv6 non-shared device */ 193 [MT_DEVICE_NONSHARED] = { /* ARMv6 non-shared device */
194 .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_NONSHARED, 194 .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_NONSHARED,
195 .prot_l1 = PMD_TYPE_TABLE, 195 .prot_l1 = PMD_TYPE_TABLE,
196 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_TEX(2), 196 .prot_sect = PROT_SECT_DEVICE,
197 .domain = DOMAIN_IO, 197 .domain = DOMAIN_IO,
198 }, 198 },
199 [MT_DEVICE_CACHED] = { /* ioremap_cached */ 199 [MT_DEVICE_CACHED] = { /* ioremap_cached */
@@ -205,7 +205,13 @@ static struct mem_type mem_types[] = {
205 [MT_DEVICE_WC] = { /* ioremap_wc */ 205 [MT_DEVICE_WC] = { /* ioremap_wc */
206 .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_WC, 206 .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_WC,
207 .prot_l1 = PMD_TYPE_TABLE, 207 .prot_l1 = PMD_TYPE_TABLE,
208 .prot_sect = PROT_SECT_DEVICE | PMD_SECT_BUFFERABLE, 208 .prot_sect = PROT_SECT_DEVICE,
209 .domain = DOMAIN_IO,
210 },
211 [MT_UNCACHED] = {
212 .prot_pte = PROT_PTE_DEVICE,
213 .prot_l1 = PMD_TYPE_TABLE,
214 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN,
209 .domain = DOMAIN_IO, 215 .domain = DOMAIN_IO,
210 }, 216 },
211 [MT_CACHECLEAN] = { 217 [MT_CACHECLEAN] = {
@@ -273,22 +279,23 @@ static void __init build_mem_type_table(void)
273#endif 279#endif
274 280
275 /* 281 /*
276 * On non-Xscale3 ARMv5-and-older systems, use CB=01 282 * Strip out features not present on earlier architectures.
277 * (Uncached/Buffered) for ioremap_wc() mappings. On XScale3 283 * Pre-ARMv5 CPUs don't have TEX bits. Pre-ARMv6 CPUs or those
278 * and ARMv6+, use TEXCB=00100 mappings (Inner/Outer Uncacheable 284 * without extended page tables don't have the 'Shared' bit.
279 * in xsc3 parlance, Uncached Normal in ARMv6 parlance).
280 */ 285 */
281 if (cpu_is_xsc3() || cpu_arch >= CPU_ARCH_ARMv6) { 286 if (cpu_arch < CPU_ARCH_ARMv5)
282 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1); 287 for (i = 0; i < ARRAY_SIZE(mem_types); i++)
283 mem_types[MT_DEVICE_WC].prot_sect &= ~PMD_SECT_BUFFERABLE; 288 mem_types[i].prot_sect &= ~PMD_SECT_TEX(7);
284 } 289 if ((cpu_arch < CPU_ARCH_ARMv6 || !(cr & CR_XP)) && !cpu_is_xsc3())
290 for (i = 0; i < ARRAY_SIZE(mem_types); i++)
291 mem_types[i].prot_sect &= ~PMD_SECT_S;
285 292
286 /* 293 /*
287 * ARMv5 and lower, bit 4 must be set for page tables. 294 * ARMv5 and lower, bit 4 must be set for page tables (was: cache
288 * (was: cache "update-able on write" bit on ARM610) 295 * "update-able on write" bit on ARM610). However, Xscale and
289 * However, Xscale cores require this bit to be cleared. 296 * Xscale3 require this bit to be cleared.
290 */ 297 */
291 if (cpu_is_xscale()) { 298 if (cpu_is_xscale() || cpu_is_xsc3()) {
292 for (i = 0; i < ARRAY_SIZE(mem_types); i++) { 299 for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
293 mem_types[i].prot_sect &= ~PMD_BIT4; 300 mem_types[i].prot_sect &= ~PMD_BIT4;
294 mem_types[i].prot_l1 &= ~PMD_BIT4; 301 mem_types[i].prot_l1 &= ~PMD_BIT4;
@@ -302,6 +309,64 @@ static void __init build_mem_type_table(void)
302 } 309 }
303 } 310 }
304 311
312 /*
313 * Mark the device areas according to the CPU/architecture.
314 */
315 if (cpu_is_xsc3() || (cpu_arch >= CPU_ARCH_ARMv6 && (cr & CR_XP))) {
316 if (!cpu_is_xsc3()) {
317 /*
318 * Mark device regions on ARMv6+ as execute-never
319 * to prevent speculative instruction fetches.
320 */
321 mem_types[MT_DEVICE].prot_sect |= PMD_SECT_XN;
322 mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_XN;
323 mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_XN;
324 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_XN;
325 }
326 if (cpu_arch >= CPU_ARCH_ARMv7 && (cr & CR_TRE)) {
327 /*
328 * For ARMv7 with TEX remapping,
329 * - shared device is SXCB=1100
330 * - nonshared device is SXCB=0100
331 * - write combine device mem is SXCB=0001
332 * (Uncached Normal memory)
333 */
334 mem_types[MT_DEVICE].prot_sect |= PMD_SECT_TEX(1);
335 mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_TEX(1);
336 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE;
337 } else if (cpu_is_xsc3()) {
338 /*
339 * For Xscale3,
340 * - shared device is TEXCB=00101
341 * - nonshared device is TEXCB=01000
342 * - write combine device mem is TEXCB=00100
343 * (Inner/Outer Uncacheable in xsc3 parlance)
344 */
345 mem_types[MT_DEVICE].prot_sect |= PMD_SECT_TEX(1) | PMD_SECT_BUFFERED;
346 mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_TEX(2);
347 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1);
348 } else {
349 /*
350 * For ARMv6 and ARMv7 without TEX remapping,
351 * - shared device is TEXCB=00001
352 * - nonshared device is TEXCB=01000
353 * - write combine device mem is TEXCB=00100
354 * (Uncached Normal in ARMv6 parlance).
355 */
356 mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED;
357 mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_TEX(2);
358 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1);
359 }
360 } else {
361 /*
362 * On others, write combining is "Uncached/Buffered"
363 */
364 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE;
365 }
366
367 /*
368 * Now deal with the memory-type mappings
369 */
305 cp = &cache_policies[cachepolicy]; 370 cp = &cache_policies[cachepolicy];
306 vecs_pgprot = kern_pgprot = user_pgprot = cp->pte; 371 vecs_pgprot = kern_pgprot = user_pgprot = cp->pte;
307 372
@@ -317,12 +382,8 @@ static void __init build_mem_type_table(void)
317 * Enable CPU-specific coherency if supported. 382 * Enable CPU-specific coherency if supported.
318 * (Only available on XSC3 at the moment.) 383 * (Only available on XSC3 at the moment.)
319 */ 384 */
320 if (arch_is_coherent()) { 385 if (arch_is_coherent() && cpu_is_xsc3())
321 if (cpu_is_xsc3()) { 386 mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
322 mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
323 mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
324 }
325 }
326 387
327 /* 388 /*
328 * ARMv6 and above have extended page tables. 389 * ARMv6 and above have extended page tables.
@@ -336,11 +397,6 @@ static void __init build_mem_type_table(void)
336 mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; 397 mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
337 mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; 398 mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
338 399
339 /*
340 * Mark the device area as "shared device"
341 */
342 mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED;
343
344#ifdef CONFIG_SMP 400#ifdef CONFIG_SMP
345 /* 401 /*
346 * Mark memory with the "shared" attribute for SMP systems 402 * Mark memory with the "shared" attribute for SMP systems
@@ -360,9 +416,6 @@ static void __init build_mem_type_table(void)
360 mem_types[MT_LOW_VECTORS].prot_pte |= vecs_pgprot; 416 mem_types[MT_LOW_VECTORS].prot_pte |= vecs_pgprot;
361 mem_types[MT_HIGH_VECTORS].prot_pte |= vecs_pgprot; 417 mem_types[MT_HIGH_VECTORS].prot_pte |= vecs_pgprot;
362 418
363 if (cpu_arch < CPU_ARCH_ARMv5)
364 mem_types[MT_MINICLEAN].prot_sect &= ~PMD_SECT_TEX(1);
365
366 pgprot_user = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | user_pgprot); 419 pgprot_user = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | user_pgprot);
367 pgprot_kernel = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | 420 pgprot_kernel = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG |
368 L_PTE_DIRTY | L_PTE_WRITE | 421 L_PTE_DIRTY | L_PTE_WRITE |
@@ -654,7 +707,7 @@ static inline void prepare_page_table(struct meminfo *mi)
654 /* 707 /*
655 * Clear out all the mappings below the kernel image. 708 * Clear out all the mappings below the kernel image.
656 */ 709 */
657 for (addr = 0; addr < MODULE_START; addr += PGDIR_SIZE) 710 for (addr = 0; addr < MODULES_VADDR; addr += PGDIR_SIZE)
658 pmd_clear(pmd_off_k(addr)); 711 pmd_clear(pmd_off_k(addr));
659 712
660#ifdef CONFIG_XIP_KERNEL 713#ifdef CONFIG_XIP_KERNEL
@@ -766,7 +819,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
766 */ 819 */
767#ifdef CONFIG_XIP_KERNEL 820#ifdef CONFIG_XIP_KERNEL
768 map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & SECTION_MASK); 821 map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & SECTION_MASK);
769 map.virtual = MODULE_START; 822 map.virtual = MODULES_VADDR;
770 map.length = ((unsigned long)&_etext - map.virtual + ~SECTION_MASK) & SECTION_MASK; 823 map.length = ((unsigned long)&_etext - map.virtual + ~SECTION_MASK) & SECTION_MASK;
771 map.type = MT_ROM; 824 map.type = MT_ROM;
772 create_mapping(&map); 825 create_mapping(&map);
@@ -843,7 +896,7 @@ void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc)
843 * allocate the zero page. Note that we count on this going ok. 896 * allocate the zero page. Note that we count on this going ok.
844 */ 897 */
845 zero_page = alloc_bootmem_low_pages(PAGE_SIZE); 898 zero_page = alloc_bootmem_low_pages(PAGE_SIZE);
846 memzero(zero_page, PAGE_SIZE); 899 memset(zero_page, 0, PAGE_SIZE);
847 empty_zero_page = virt_to_page(zero_page); 900 empty_zero_page = virt_to_page(zero_page);
848 flush_dcache_page(empty_zero_page); 901 flush_dcache_page(empty_zero_page);
849} 902}
diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c
index e0f19ab91163..2690146161ba 100644
--- a/arch/arm/mm/pgd.c
+++ b/arch/arm/mm/pgd.c
@@ -31,7 +31,7 @@ pgd_t *get_pgd_slow(struct mm_struct *mm)
31 if (!new_pgd) 31 if (!new_pgd)
32 goto no_pgd; 32 goto no_pgd;
33 33
34 memzero(new_pgd, FIRST_KERNEL_PGD_NR * sizeof(pgd_t)); 34 memset(new_pgd, 0, FIRST_KERNEL_PGD_NR * sizeof(pgd_t));
35 35
36 /* 36 /*
37 * Copy over the kernel and IO PGD entries 37 * Copy over the kernel and IO PGD entries
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 0e11d9716a7d..d1ebec42521d 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -124,7 +124,7 @@ ENTRY(cpu_v7_set_pte_ext)
124 orr r3, r3, r2 124 orr r3, r3, r2
125 orr r3, r3, #PTE_EXT_AP0 | 2 125 orr r3, r3, #PTE_EXT_AP0 | 2
126 126
127 tst r2, #1 << 4 127 tst r1, #1 << 4
128 orrne r3, r3, #PTE_EXT_TEX(1) 128 orrne r3, r3, #PTE_EXT_TEX(1)
129 129
130 tst r1, #L_PTE_WRITE 130 tst r1, #L_PTE_WRITE
@@ -205,11 +205,11 @@ __v7_setup:
205 mov pc, lr @ return to head.S:__ret 205 mov pc, lr @ return to head.S:__ret
206ENDPROC(__v7_setup) 206ENDPROC(__v7_setup)
207 207
208 /* 208 /* AT
209 * V X F I D LR 209 * TFR EV X F I D LR
210 * .... ...E PUI. .T.T 4RVI ZFRS BLDP WCAM 210 * .EEE ..EE PUI. .T.T 4RVI ZFRS BLDP WCAM
211 * rrrr rrrx xxx0 0101 xxxx xxxx x111 xxxx < forced 211 * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced
212 * 0 110 0011 1.00 .111 1101 < we want 212 * 1 0 110 0011 1.00 .111 1101 < we want
213 */ 213 */
214 .type v7_crval, #object 214 .type v7_crval, #object
215v7_crval: 215v7_crval:
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index 04dc8b65401b..8f6cf56c11c0 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -349,7 +349,7 @@ ENTRY(cpu_xsc3_switch_mm)
349cpu_xsc3_mt_table: 349cpu_xsc3_mt_table:
350 .long 0x00 @ L_PTE_MT_UNCACHED 350 .long 0x00 @ L_PTE_MT_UNCACHED
351 .long PTE_EXT_TEX(1) @ L_PTE_MT_BUFFERABLE 351 .long PTE_EXT_TEX(1) @ L_PTE_MT_BUFFERABLE
352 .long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH 352 .long PTE_EXT_TEX(5) | PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH
353 .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK 353 .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK
354 .long PTE_EXT_TEX(1) | PTE_BUFFERABLE @ L_PTE_MT_DEV_SHARED 354 .long PTE_EXT_TEX(1) | PTE_BUFFERABLE @ L_PTE_MT_DEV_SHARED
355 .long 0x00 @ unused 355 .long 0x00 @ unused
diff --git a/arch/arm/plat-iop/setup.c b/arch/arm/plat-iop/setup.c
index 4689db638e95..9e573e78176a 100644
--- a/arch/arm/plat-iop/setup.c
+++ b/arch/arm/plat-iop/setup.c
@@ -16,14 +16,15 @@
16#include <asm/hardware/iop3xx.h> 16#include <asm/hardware/iop3xx.h>
17 17
18/* 18/*
19 * Standard IO mapping for all IOP3xx based systems 19 * Standard IO mapping for all IOP3xx based systems. Note that
20 * the IOP3xx OCCDR must be mapped uncached and unbuffered.
20 */ 21 */
21static struct map_desc iop3xx_std_desc[] __initdata = { 22static struct map_desc iop3xx_std_desc[] __initdata = {
22 { /* mem mapped registers */ 23 { /* mem mapped registers */
23 .virtual = IOP3XX_PERIPHERAL_VIRT_BASE, 24 .virtual = IOP3XX_PERIPHERAL_VIRT_BASE,
24 .pfn = __phys_to_pfn(IOP3XX_PERIPHERAL_PHYS_BASE), 25 .pfn = __phys_to_pfn(IOP3XX_PERIPHERAL_PHYS_BASE),
25 .length = IOP3XX_PERIPHERAL_SIZE, 26 .length = IOP3XX_PERIPHERAL_SIZE,
26 .type = MT_DEVICE, 27 .type = MT_UNCACHED,
27 }, { /* PCI IO space */ 28 }, { /* PCI IO space */
28 .virtual = IOP3XX_PCI_LOWER_IO_VA, 29 .virtual = IOP3XX_PCI_LOWER_IO_VA,
29 .pfn = __phys_to_pfn(IOP3XX_PCI_LOWER_IO_PA), 30 .pfn = __phys_to_pfn(IOP3XX_PCI_LOWER_IO_PA),
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index b2a7e3fad117..a1612958a59e 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -8,11 +8,13 @@ choice
8 8
9config ARCH_MX2 9config ARCH_MX2
10 bool "MX2-based" 10 bool "MX2-based"
11 select CPU_ARM926T
11 help 12 help
12 This enables support for systems based on the Freescale i.MX2 family 13 This enables support for systems based on the Freescale i.MX2 family
13 14
14config ARCH_MX3 15config ARCH_MX3
15 bool "MX3-based" 16 bool "MX3-based"
17 select CPU_V6
16 help 18 help
17 This enables support for systems based on the Freescale i.MX3 family 19 This enables support for systems based on the Freescale i.MX3 family
18 20
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c
index 733e0acac916..de5c4747453f 100644
--- a/arch/arm/plat-mxc/gpio.c
+++ b/arch/arm/plat-mxc/gpio.c
@@ -188,7 +188,7 @@ static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset)
188 struct mxc_gpio_port *port = 188 struct mxc_gpio_port *port =
189 container_of(chip, struct mxc_gpio_port, chip); 189 container_of(chip, struct mxc_gpio_port, chip);
190 190
191 return (__raw_readl(port->base + GPIO_DR) >> offset) & 1; 191 return (__raw_readl(port->base + GPIO_PSR) >> offset) & 1;
192} 192}
193 193
194static int mxc_gpio_direction_input(struct gpio_chip *chip, unsigned offset) 194static int mxc_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
diff --git a/arch/arm/plat-mxc/include/mach/io.h b/arch/arm/plat-mxc/include/mach/io.h
index 65b6810124c1..5d4cb1196441 100644
--- a/arch/arm/plat-mxc/include/mach/io.h
+++ b/arch/arm/plat-mxc/include/mach/io.h
@@ -14,6 +14,26 @@
14/* Allow IO space to be anywhere in the memory */ 14/* Allow IO space to be anywhere in the memory */
15#define IO_SPACE_LIMIT 0xffffffff 15#define IO_SPACE_LIMIT 0xffffffff
16 16
17#ifdef CONFIG_ARCH_MX3
18#define __arch_ioremap __mx3_ioremap
19#define __arch_iounmap __iounmap
20
21static inline void __iomem *
22__mx3_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
23{
24 if (mtype == MT_DEVICE) {
25 /* Access all peripherals below 0x80000000 as nonshared device
26 * but leave l2cc alone.
27 */
28 if ((phys_addr < 0x80000000) && ((phys_addr < L2CC_BASE_ADDR) ||
29 (phys_addr >= L2CC_BASE_ADDR + L2CC_SIZE)))
30 mtype = MT_DEVICE_NONSHARED;
31 }
32
33 return __arm_ioremap(phys_addr, size, mtype);
34}
35#endif
36
17/* io address mapping macro */ 37/* io address mapping macro */
18#define __io(a) ((void __iomem *)(a)) 38#define __io(a) ((void __iomem *)(a))
19 39
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index a94f0c44ebc8..46d3b0b9ce69 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -14,9 +14,11 @@ config ARCH_OMAP1
14 14
15config ARCH_OMAP2 15config ARCH_OMAP2
16 bool "TI OMAP2" 16 bool "TI OMAP2"
17 select CPU_V6
17 18
18config ARCH_OMAP3 19config ARCH_OMAP3
19 bool "TI OMAP3" 20 bool "TI OMAP3"
21 select CPU_V7
20 22
21endchoice 23endchoice
22 24
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index bf6a10c5fc4f..be6aab9c6834 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -428,23 +428,23 @@ static int clk_debugfs_register_one(struct clk *c)
428 if (c->id != 0) 428 if (c->id != 0)
429 sprintf(p, ":%d", c->id); 429 sprintf(p, ":%d", c->id);
430 d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root); 430 d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root);
431 if (IS_ERR(d)) 431 if (!d)
432 return PTR_ERR(d); 432 return -ENOMEM;
433 c->dent = d; 433 c->dent = d;
434 434
435 d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount); 435 d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);
436 if (IS_ERR(d)) { 436 if (!d) {
437 err = PTR_ERR(d); 437 err = -ENOMEM;
438 goto err_out; 438 goto err_out;
439 } 439 }
440 d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate); 440 d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
441 if (IS_ERR(d)) { 441 if (!d) {
442 err = PTR_ERR(d); 442 err = -ENOMEM;
443 goto err_out; 443 goto err_out;
444 } 444 }
445 d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags); 445 d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
446 if (IS_ERR(d)) { 446 if (!d) {
447 err = PTR_ERR(d); 447 err = -ENOMEM;
448 goto err_out; 448 goto err_out;
449 } 449 }
450 return 0; 450 return 0;
@@ -483,8 +483,8 @@ static int __init clk_debugfs_init(void)
483 int err; 483 int err;
484 484
485 d = debugfs_create_dir("clock", NULL); 485 d = debugfs_create_dir("clock", NULL);
486 if (IS_ERR(d)) 486 if (!d)
487 return PTR_ERR(d); 487 return -ENOMEM;
488 clk_debugfs_root = d; 488 clk_debugfs_root = d;
489 489
490 list_for_each_entry(c, &clocks, node) { 490 list_for_each_entry(c, &clocks, node) {
diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S
index 030118ee204a..2276f89671d8 100644
--- a/arch/arm/plat-omap/include/mach/entry-macro.S
+++ b/arch/arm/plat-omap/include/mach/entry-macro.S
@@ -65,7 +65,8 @@
65#include <mach/omap34xx.h> 65#include <mach/omap34xx.h>
66#endif 66#endif
67 67
68#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt number */ 68#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */
69#define ACTIVEIRQ_MASK 0x7f /* Active interrupt bits */
69 70
70 .macro disable_fiq 71 .macro disable_fiq
71 .endm 72 .endm
@@ -88,6 +89,7 @@
88 cmp \irqnr, #0x0 89 cmp \irqnr, #0x0
892222: 902222:
90 ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] 91 ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
92 and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
91 93
92 .endm 94 .endm
93 95
diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h
index a2929ac8c687..bed5274c910a 100644
--- a/arch/arm/plat-omap/include/mach/irqs.h
+++ b/arch/arm/plat-omap/include/mach/irqs.h
@@ -372,7 +372,7 @@
372 372
373/* External TWL4030 gpio interrupts are optional */ 373/* External TWL4030 gpio interrupts are optional */
374#define TWL4030_GPIO_IRQ_BASE TWL4030_PWR_IRQ_END 374#define TWL4030_GPIO_IRQ_BASE TWL4030_PWR_IRQ_END
375#ifdef CONFIG_TWL4030_GPIO 375#ifdef CONFIG_GPIO_TWL4030
376#define TWL4030_GPIO_NR_IRQS 18 376#define TWL4030_GPIO_NR_IRQS 18
377#else 377#else
378#define TWL4030_GPIO_NR_IRQS 0 378#define TWL4030_GPIO_NR_IRQS 0