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-rw-r--r--arch/arm/include/asm/byteorder.h25
-rw-r--r--arch/arm/include/asm/io.h5
-rw-r--r--arch/arm/include/asm/mach/map.h14
-rw-r--r--arch/arm/include/asm/pci.h2
-rw-r--r--arch/arm/mach-davinci/psc.c3
-rw-r--r--arch/arm/mach-mx3/pcm037.c2
-rw-r--r--arch/arm/mach-omap1/mcbsp.c8
-rw-r--r--arch/arm/mach-omap2/mcbsp.c4
-rw-r--r--arch/arm/mach-pxa/tosa.c11
-rw-r--r--arch/arm/mach-sa1100/include/mach/jornada720.h11
-rw-r--r--arch/arm/mach-sa1100/jornada720_ssp.c10
-rw-r--r--arch/arm/mm/mmu.c20
-rw-r--r--arch/arm/plat-mxc/clock.c1
-rw-r--r--arch/arm/plat-omap/devices.c110
-rw-r--r--arch/arm/plat-omap/gpio.c2
-rw-r--r--arch/arm/plat-omap/include/mach/mcbsp.h2
-rw-r--r--arch/arm/plat-omap/mcbsp.c5
17 files changed, 167 insertions, 68 deletions
diff --git a/arch/arm/include/asm/byteorder.h b/arch/arm/include/asm/byteorder.h
index d04a7a2bc2e9..4fbfb22f65a0 100644
--- a/arch/arm/include/asm/byteorder.h
+++ b/arch/arm/include/asm/byteorder.h
@@ -18,15 +18,7 @@
18#include <linux/compiler.h> 18#include <linux/compiler.h>
19#include <asm/types.h> 19#include <asm/types.h>
20 20
21#ifdef __ARMEB__ 21static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
22# define __BIG_ENDIAN
23#else
24# define __LITTLE_ENDIAN
25#endif
26
27#define __SWAB_64_THRU_32__
28
29static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
30{ 22{
31 __u32 t; 23 __u32 t;
32 24
@@ -48,8 +40,19 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
48 40
49 return x; 41 return x;
50} 42}
51#define __arch_swab32 __arch_swab32
52 43
53#include <linux/byteorder.h> 44#define __arch__swab32(x) ___arch__swab32(x)
45
46#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
47# define __BYTEORDER_HAS_U64__
48# define __SWAB_64_THRU_32__
49#endif
50
51#ifdef __ARMEB__
52#include <linux/byteorder/big_endian.h>
53#else
54#include <linux/byteorder/little_endian.h>
55#endif
54 56
55#endif 57#endif
58
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 94a95d7fafd6..71934856fc22 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -61,8 +61,9 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
61#define MT_DEVICE_NONSHARED 1 61#define MT_DEVICE_NONSHARED 1
62#define MT_DEVICE_CACHED 2 62#define MT_DEVICE_CACHED 2
63#define MT_DEVICE_IXP2000 3 63#define MT_DEVICE_IXP2000 3
64#define MT_DEVICE_WC 4
64/* 65/*
65 * types 4 onwards can be found in asm/mach/map.h and are undefined 66 * types 5 onwards can be found in asm/mach/map.h and are undefined
66 * for ioremap 67 * for ioremap
67 */ 68 */
68 69
@@ -215,11 +216,13 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
215#define ioremap(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE) 216#define ioremap(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE)
216#define ioremap_nocache(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE) 217#define ioremap_nocache(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE)
217#define ioremap_cached(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE_CACHED) 218#define ioremap_cached(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE_CACHED)
219#define ioremap_wc(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE_WC)
218#define iounmap(cookie) __iounmap(cookie) 220#define iounmap(cookie) __iounmap(cookie)
219#else 221#else
220#define ioremap(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE) 222#define ioremap(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE)
221#define ioremap_nocache(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE) 223#define ioremap_nocache(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE)
222#define ioremap_cached(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_CACHED) 224#define ioremap_cached(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_CACHED)
225#define ioremap_wc(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_WC)
223#define iounmap(cookie) __arch_iounmap(cookie) 226#define iounmap(cookie) __arch_iounmap(cookie)
224#endif 227#endif
225 228
diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h
index 06f583b13999..9eb936e49cc3 100644
--- a/arch/arm/include/asm/mach/map.h
+++ b/arch/arm/include/asm/mach/map.h
@@ -18,13 +18,13 @@ struct map_desc {
18 unsigned int type; 18 unsigned int type;
19}; 19};
20 20
21/* types 0-3 are defined in asm/io.h */ 21/* types 0-4 are defined in asm/io.h */
22#define MT_CACHECLEAN 4 22#define MT_CACHECLEAN 5
23#define MT_MINICLEAN 5 23#define MT_MINICLEAN 6
24#define MT_LOW_VECTORS 6 24#define MT_LOW_VECTORS 7
25#define MT_HIGH_VECTORS 7 25#define MT_HIGH_VECTORS 8
26#define MT_MEMORY 8 26#define MT_MEMORY 9
27#define MT_ROM 9 27#define MT_ROM 10
28 28
29#define MT_NONSHARED_DEVICE MT_DEVICE_NONSHARED 29#define MT_NONSHARED_DEVICE MT_DEVICE_NONSHARED
30#define MT_IXP2000_DEVICE MT_DEVICE_IXP2000 30#define MT_IXP2000_DEVICE MT_DEVICE_IXP2000
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h
index 721c03d53f4b..918d0cbbf064 100644
--- a/arch/arm/include/asm/pci.h
+++ b/arch/arm/include/asm/pci.h
@@ -30,7 +30,7 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
30 * The networking and block device layers use this boolean for bounce 30 * The networking and block device layers use this boolean for bounce
31 * buffer decisions. 31 * buffer decisions.
32 */ 32 */
33#define PCI_DMA_BUS_IS_PHYS (0) 33#define PCI_DMA_BUS_IS_PHYS (1)
34 34
35/* 35/*
36 * Whether pci_unmap_{single,page} is a nop depends upon the 36 * Whether pci_unmap_{single,page} is a nop depends upon the
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index 720c48b9ee04..aa2fc375a325 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -70,9 +70,6 @@ void davinci_psc_config(unsigned int domain, unsigned int id, char enable)
70{ 70{
71 u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl, mdstat_mask; 71 u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl, mdstat_mask;
72 72
73 if (id < 0)
74 return;
75
76 mdctl = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + MDCTL + 4 * id); 73 mdctl = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + MDCTL + 4 * id);
77 if (enable) 74 if (enable)
78 mdctl |= 0x00000003; /* Enable Module */ 75 mdctl |= 0x00000003; /* Enable Module */
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c
index 0a152ed15a85..df8582a6231b 100644
--- a/arch/arm/mach-mx3/pcm037.c
+++ b/arch/arm/mach-mx3/pcm037.c
@@ -54,7 +54,7 @@ static struct platform_device pcm037_flash = {
54}; 54};
55 55
56static struct imxuart_platform_data uart_pdata = { 56static struct imxuart_platform_data uart_pdata = {
57 .flags = 0, 57 .flags = IMXUART_HAVE_RTSCTS,
58}; 58};
59 59
60static struct platform_device *devices[] __initdata = { 60static struct platform_device *devices[] __initdata = {
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index 826010d5d014..2baeaeb0c900 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -159,6 +159,7 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = {
159#ifdef CONFIG_ARCH_OMAP730 159#ifdef CONFIG_ARCH_OMAP730
160static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { 160static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {
161 { 161 {
162 .phys_base = OMAP730_MCBSP1_BASE,
162 .virt_base = io_p2v(OMAP730_MCBSP1_BASE), 163 .virt_base = io_p2v(OMAP730_MCBSP1_BASE),
163 .dma_rx_sync = OMAP_DMA_MCBSP1_RX, 164 .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
164 .dma_tx_sync = OMAP_DMA_MCBSP1_TX, 165 .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
@@ -167,6 +168,7 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {
167 .ops = &omap1_mcbsp_ops, 168 .ops = &omap1_mcbsp_ops,
168 }, 169 },
169 { 170 {
171 .phys_base = OMAP730_MCBSP2_BASE,
170 .virt_base = io_p2v(OMAP730_MCBSP2_BASE), 172 .virt_base = io_p2v(OMAP730_MCBSP2_BASE),
171 .dma_rx_sync = OMAP_DMA_MCBSP3_RX, 173 .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
172 .dma_tx_sync = OMAP_DMA_MCBSP3_TX, 174 .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
@@ -184,6 +186,7 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {
184#ifdef CONFIG_ARCH_OMAP15XX 186#ifdef CONFIG_ARCH_OMAP15XX
185static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { 187static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
186 { 188 {
189 .phys_base = OMAP1510_MCBSP1_BASE,
187 .virt_base = OMAP1510_MCBSP1_BASE, 190 .virt_base = OMAP1510_MCBSP1_BASE,
188 .dma_rx_sync = OMAP_DMA_MCBSP1_RX, 191 .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
189 .dma_tx_sync = OMAP_DMA_MCBSP1_TX, 192 .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
@@ -193,6 +196,7 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
193 .clk_name = "mcbsp_clk", 196 .clk_name = "mcbsp_clk",
194 }, 197 },
195 { 198 {
199 .phys_base = OMAP1510_MCBSP2_BASE,
196 .virt_base = io_p2v(OMAP1510_MCBSP2_BASE), 200 .virt_base = io_p2v(OMAP1510_MCBSP2_BASE),
197 .dma_rx_sync = OMAP_DMA_MCBSP2_RX, 201 .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
198 .dma_tx_sync = OMAP_DMA_MCBSP2_TX, 202 .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
@@ -201,6 +205,7 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
201 .ops = &omap1_mcbsp_ops, 205 .ops = &omap1_mcbsp_ops,
202 }, 206 },
203 { 207 {
208 .phys_base = OMAP1510_MCBSP3_BASE,
204 .virt_base = OMAP1510_MCBSP3_BASE, 209 .virt_base = OMAP1510_MCBSP3_BASE,
205 .dma_rx_sync = OMAP_DMA_MCBSP3_RX, 210 .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
206 .dma_tx_sync = OMAP_DMA_MCBSP3_TX, 211 .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
@@ -219,6 +224,7 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
219#ifdef CONFIG_ARCH_OMAP16XX 224#ifdef CONFIG_ARCH_OMAP16XX
220static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { 225static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
221 { 226 {
227 .phys_base = OMAP1610_MCBSP1_BASE,
222 .virt_base = OMAP1610_MCBSP1_BASE, 228 .virt_base = OMAP1610_MCBSP1_BASE,
223 .dma_rx_sync = OMAP_DMA_MCBSP1_RX, 229 .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
224 .dma_tx_sync = OMAP_DMA_MCBSP1_TX, 230 .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
@@ -228,6 +234,7 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
228 .clk_name = "mcbsp_clk", 234 .clk_name = "mcbsp_clk",
229 }, 235 },
230 { 236 {
237 .phys_base = OMAP1610_MCBSP2_BASE,
231 .virt_base = io_p2v(OMAP1610_MCBSP2_BASE), 238 .virt_base = io_p2v(OMAP1610_MCBSP2_BASE),
232 .dma_rx_sync = OMAP_DMA_MCBSP2_RX, 239 .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
233 .dma_tx_sync = OMAP_DMA_MCBSP2_TX, 240 .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
@@ -236,6 +243,7 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
236 .ops = &omap1_mcbsp_ops, 243 .ops = &omap1_mcbsp_ops,
237 }, 244 },
238 { 245 {
246 .phys_base = OMAP1610_MCBSP3_BASE,
239 .virt_base = OMAP1610_MCBSP3_BASE, 247 .virt_base = OMAP1610_MCBSP3_BASE,
240 .dma_rx_sync = OMAP_DMA_MCBSP3_RX, 248 .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
241 .dma_tx_sync = OMAP_DMA_MCBSP3_TX, 249 .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 27eb6e3ca926..b261f1f80b5e 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -134,6 +134,7 @@ static struct omap_mcbsp_ops omap2_mcbsp_ops = {
134#ifdef CONFIG_ARCH_OMAP24XX 134#ifdef CONFIG_ARCH_OMAP24XX
135static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { 135static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = {
136 { 136 {
137 .phys_base = OMAP24XX_MCBSP1_BASE,
137 .virt_base = IO_ADDRESS(OMAP24XX_MCBSP1_BASE), 138 .virt_base = IO_ADDRESS(OMAP24XX_MCBSP1_BASE),
138 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, 139 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
139 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, 140 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
@@ -143,6 +144,7 @@ static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = {
143 .clk_name = "mcbsp_clk", 144 .clk_name = "mcbsp_clk",
144 }, 145 },
145 { 146 {
147 .phys_base = OMAP24XX_MCBSP2_BASE,
146 .virt_base = IO_ADDRESS(OMAP24XX_MCBSP2_BASE), 148 .virt_base = IO_ADDRESS(OMAP24XX_MCBSP2_BASE),
147 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, 149 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
148 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, 150 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
@@ -161,6 +163,7 @@ static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = {
161#ifdef CONFIG_ARCH_OMAP34XX 163#ifdef CONFIG_ARCH_OMAP34XX
162static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { 164static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
163 { 165 {
166 .phys_base = OMAP34XX_MCBSP1_BASE,
164 .virt_base = IO_ADDRESS(OMAP34XX_MCBSP1_BASE), 167 .virt_base = IO_ADDRESS(OMAP34XX_MCBSP1_BASE),
165 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, 168 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
166 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, 169 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
@@ -170,6 +173,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
170 .clk_name = "mcbsp_clk", 173 .clk_name = "mcbsp_clk",
171 }, 174 },
172 { 175 {
176 .phys_base = OMAP34XX_MCBSP2_BASE,
173 .virt_base = IO_ADDRESS(OMAP34XX_MCBSP2_BASE), 177 .virt_base = IO_ADDRESS(OMAP34XX_MCBSP2_BASE),
174 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, 178 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
175 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, 179 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 5dab30eafddc..9f3ef9eb32e3 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -50,6 +50,7 @@
50#include <asm/mach/sharpsl_param.h> 50#include <asm/mach/sharpsl_param.h>
51 51
52#include "generic.h" 52#include "generic.h"
53#include "clock.h"
53#include "devices.h" 54#include "devices.h"
54 55
55static unsigned long tosa_pin_config[] = { 56static unsigned long tosa_pin_config[] = {
@@ -521,6 +522,14 @@ static struct gpio_keys_button tosa_gpio_keys[] = {
521 .wakeup = 1, 522 .wakeup = 1,
522 .active_low = 1, 523 .active_low = 1,
523 }, 524 },
525 {
526 .type = EV_SW,
527 .code = SW_HEADPHONE_INSERT,
528 .gpio = TOSA_GPIO_EAR_IN,
529 .desc = "HeadPhone insert",
530 .active_low = 1,
531 .debounce_interval = 300,
532 },
524}; 533};
525 534
526static struct gpio_keys_platform_data tosa_gpio_keys_platform_data = { 535static struct gpio_keys_platform_data tosa_gpio_keys_platform_data = {
@@ -792,6 +801,8 @@ static void __init tosa_init(void)
792 pxa_set_i2c_info(NULL); 801 pxa_set_i2c_info(NULL);
793 platform_scoop_config = &tosa_pcmcia_config; 802 platform_scoop_config = &tosa_pcmcia_config;
794 803
804 clk_add_alias("CLK_CK3P6MI", &tc6393xb_device.dev, "GPIO11_CLK", NULL);
805
795 platform_add_devices(devices, ARRAY_SIZE(devices)); 806 platform_add_devices(devices, ARRAY_SIZE(devices));
796} 807}
797 808
diff --git a/arch/arm/mach-sa1100/include/mach/jornada720.h b/arch/arm/mach-sa1100/include/mach/jornada720.h
index bc120850d313..cc6b4bfcecf6 100644
--- a/arch/arm/mach-sa1100/include/mach/jornada720.h
+++ b/arch/arm/mach-sa1100/include/mach/jornada720.h
@@ -1,10 +1,10 @@
1/* 1/*
2 * arch/arm/mach-sa1100/include/mach/jornada720.h 2 * arch/arm/mach-sa1100/include/mach/jornada720.h
3 * 3 *
4 * This file contains SSP/MCU communication definitions for HP Jornada 710/720/728 4 * SSP/MCU communication definitions for HP Jornada 710/720/728
5 * 5 *
6 * Copyright (C) 2007 Kristoffer Ericson <Kristoffer.Ericson@gmail.com> 6 * Copyright 2007,2008 Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
7 * Copyright (C) 2000 John Ankcorn <jca@lcs.mit.edu> 7 * Copyright 2000 John Ankcorn <jca@lcs.mit.edu>
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as 10 * it under the terms of the GNU General Public License version 2 as
@@ -25,3 +25,8 @@
25#define PWMOFF 0xDF 25#define PWMOFF 0xDF
26#define TXDUMMY 0x11 26#define TXDUMMY 0x11
27#define ERRORCODE 0x00 27#define ERRORCODE 0x00
28
29extern void jornada_ssp_start(void);
30extern void jornada_ssp_end(void);
31extern int jornada_ssp_inout(u8 byte);
32extern int jornada_ssp_byte(u8 byte);
diff --git a/arch/arm/mach-sa1100/jornada720_ssp.c b/arch/arm/mach-sa1100/jornada720_ssp.c
index 06ea7abd9170..28cf36967977 100644
--- a/arch/arm/mach-sa1100/jornada720_ssp.c
+++ b/arch/arm/mach-sa1100/jornada720_ssp.c
@@ -21,8 +21,8 @@
21#include <linux/slab.h> 21#include <linux/slab.h>
22 22
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <asm/hardware/ssp.h>
25#include <mach/jornada720.h> 24#include <mach/jornada720.h>
25#include <asm/hardware/ssp.h>
26 26
27static DEFINE_SPINLOCK(jornada_ssp_lock); 27static DEFINE_SPINLOCK(jornada_ssp_lock);
28static unsigned long jornada_ssp_flags; 28static unsigned long jornada_ssp_flags;
@@ -109,12 +109,12 @@ EXPORT_SYMBOL(jornada_ssp_inout);
109 * jornada_ssp_start - enable mcu 109 * jornada_ssp_start - enable mcu
110 * 110 *
111 */ 111 */
112int jornada_ssp_start() 112void jornada_ssp_start(void)
113{ 113{
114 spin_lock_irqsave(&jornada_ssp_lock, jornada_ssp_flags); 114 spin_lock_irqsave(&jornada_ssp_lock, jornada_ssp_flags);
115 GPCR = GPIO_GPIO25; 115 GPCR = GPIO_GPIO25;
116 udelay(50); 116 udelay(50);
117 return 0; 117 return;
118}; 118};
119EXPORT_SYMBOL(jornada_ssp_start); 119EXPORT_SYMBOL(jornada_ssp_start);
120 120
@@ -122,11 +122,11 @@ EXPORT_SYMBOL(jornada_ssp_start);
122 * jornada_ssp_end - disable mcu and turn off lock 122 * jornada_ssp_end - disable mcu and turn off lock
123 * 123 *
124 */ 124 */
125int jornada_ssp_end() 125void jornada_ssp_end(void)
126{ 126{
127 GPSR = GPIO_GPIO25; 127 GPSR = GPIO_GPIO25;
128 spin_unlock_irqrestore(&jornada_ssp_lock, jornada_ssp_flags); 128 spin_unlock_irqrestore(&jornada_ssp_lock, jornada_ssp_flags);
129 return 0; 129 return;
130}; 130};
131EXPORT_SYMBOL(jornada_ssp_end); 131EXPORT_SYMBOL(jornada_ssp_end);
132 132
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 25d9a11eb617..a713e40e1f1a 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -211,6 +211,12 @@ static struct mem_type mem_types[] = {
211 PMD_SECT_TEX(1), 211 PMD_SECT_TEX(1),
212 .domain = DOMAIN_IO, 212 .domain = DOMAIN_IO,
213 }, 213 },
214 [MT_DEVICE_WC] = { /* ioremap_wc */
215 .prot_pte = PROT_PTE_DEVICE,
216 .prot_l1 = PMD_TYPE_TABLE,
217 .prot_sect = PROT_SECT_DEVICE,
218 .domain = DOMAIN_IO,
219 },
214 [MT_CACHECLEAN] = { 220 [MT_CACHECLEAN] = {
215 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN, 221 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN,
216 .domain = DOMAIN_KERNEL, 222 .domain = DOMAIN_KERNEL,
@@ -273,6 +279,20 @@ static void __init build_mem_type_table(void)
273 } 279 }
274 280
275 /* 281 /*
282 * On non-Xscale3 ARMv5-and-older systems, use CB=01
283 * (Uncached/Buffered) for ioremap_wc() mappings. On XScale3
284 * and ARMv6+, use TEXCB=00100 mappings (Inner/Outer Uncacheable
285 * in xsc3 parlance, Uncached Normal in ARMv6 parlance).
286 */
287 if (cpu_is_xsc3() || cpu_arch >= CPU_ARCH_ARMv6) {
288 mem_types[MT_DEVICE_WC].prot_pte_ext |= PTE_EXT_TEX(1);
289 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1);
290 } else {
291 mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_BUFFERABLE;
292 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE;
293 }
294
295 /*
276 * ARMv5 and lower, bit 4 must be set for page tables. 296 * ARMv5 and lower, bit 4 must be set for page tables.
277 * (was: cache "update-able on write" bit on ARM610) 297 * (was: cache "update-able on write" bit on ARM610)
278 * However, Xscale cores require this bit to be cleared. 298 * However, Xscale cores require this bit to be cleared.
diff --git a/arch/arm/plat-mxc/clock.c b/arch/arm/plat-mxc/clock.c
index 2f8627218839..0a38f0b396eb 100644
--- a/arch/arm/plat-mxc/clock.c
+++ b/arch/arm/plat-mxc/clock.c
@@ -37,7 +37,6 @@
37#include <linux/proc_fs.h> 37#include <linux/proc_fs.h>
38#include <linux/semaphore.h> 38#include <linux/semaphore.h>
39#include <linux/string.h> 39#include <linux/string.h>
40#include <linux/version.h>
41 40
42#include <mach/clock.h> 41#include <mach/clock.h>
43 42
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 187e3d8bfdfe..01da719a7453 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -21,6 +21,7 @@
21 21
22#include <mach/tc.h> 22#include <mach/tc.h>
23#include <mach/board.h> 23#include <mach/board.h>
24#include <mach/mmc.h>
24#include <mach/mux.h> 25#include <mach/mux.h>
25#include <mach/gpio.h> 26#include <mach/gpio.h>
26#include <mach/menelaus.h> 27#include <mach/menelaus.h>
@@ -194,25 +195,38 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
194 195
195/*-------------------------------------------------------------------------*/ 196/*-------------------------------------------------------------------------*/
196 197
197#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) 198#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
199 defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
198 200
199#ifdef CONFIG_ARCH_OMAP24XX 201#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
200#define OMAP_MMC1_BASE 0x4809c000 202#define OMAP_MMC1_BASE 0x4809c000
201#define OMAP_MMC1_INT INT_24XX_MMC_IRQ 203#define OMAP_MMC1_END (OMAP_MMC1_BASE + 0x1fc)
204#define OMAP_MMC1_INT INT_24XX_MMC_IRQ
205
206#define OMAP_MMC2_BASE 0x480b4000
207#define OMAP_MMC2_END (OMAP_MMC2_BASE + 0x1fc)
208#define OMAP_MMC2_INT INT_24XX_MMC2_IRQ
209
202#else 210#else
211
203#define OMAP_MMC1_BASE 0xfffb7800 212#define OMAP_MMC1_BASE 0xfffb7800
213#define OMAP_MMC1_END (OMAP_MMC1_BASE + 0x7f)
204#define OMAP_MMC1_INT INT_MMC 214#define OMAP_MMC1_INT INT_MMC
205#endif 215
206#define OMAP_MMC2_BASE 0xfffb7c00 /* omap16xx only */ 216#define OMAP_MMC2_BASE 0xfffb7c00 /* omap16xx only */
217#define OMAP_MMC2_END (OMAP_MMC2_BASE + 0x7f)
218#define OMAP_MMC2_INT INT_1610_MMC2
219
220#endif
207 221
208static struct omap_mmc_conf mmc1_conf; 222static struct omap_mmc_platform_data mmc1_data;
209 223
210static u64 mmc1_dmamask = 0xffffffff; 224static u64 mmc1_dmamask = 0xffffffff;
211 225
212static struct resource mmc1_resources[] = { 226static struct resource mmc1_resources[] = {
213 { 227 {
214 .start = OMAP_MMC1_BASE, 228 .start = OMAP_MMC1_BASE,
215 .end = OMAP_MMC1_BASE + 0x7f, 229 .end = OMAP_MMC1_END,
216 .flags = IORESOURCE_MEM, 230 .flags = IORESOURCE_MEM,
217 }, 231 },
218 { 232 {
@@ -226,26 +240,27 @@ static struct platform_device mmc_omap_device1 = {
226 .id = 1, 240 .id = 1,
227 .dev = { 241 .dev = {
228 .dma_mask = &mmc1_dmamask, 242 .dma_mask = &mmc1_dmamask,
229 .platform_data = &mmc1_conf, 243 .platform_data = &mmc1_data,
230 }, 244 },
231 .num_resources = ARRAY_SIZE(mmc1_resources), 245 .num_resources = ARRAY_SIZE(mmc1_resources),
232 .resource = mmc1_resources, 246 .resource = mmc1_resources,
233}; 247};
234 248
235#ifdef CONFIG_ARCH_OMAP16XX 249#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \
250 defined(CONFIG_ARCH_OMAP34XX)
236 251
237static struct omap_mmc_conf mmc2_conf; 252static struct omap_mmc_platform_data mmc2_data;
238 253
239static u64 mmc2_dmamask = 0xffffffff; 254static u64 mmc2_dmamask = 0xffffffff;
240 255
241static struct resource mmc2_resources[] = { 256static struct resource mmc2_resources[] = {
242 { 257 {
243 .start = OMAP_MMC2_BASE, 258 .start = OMAP_MMC2_BASE,
244 .end = OMAP_MMC2_BASE + 0x7f, 259 .end = OMAP_MMC2_END,
245 .flags = IORESOURCE_MEM, 260 .flags = IORESOURCE_MEM,
246 }, 261 },
247 { 262 {
248 .start = INT_1610_MMC2, 263 .start = OMAP_MMC2_INT,
249 .flags = IORESOURCE_IRQ, 264 .flags = IORESOURCE_IRQ,
250 }, 265 },
251}; 266};
@@ -255,26 +270,19 @@ static struct platform_device mmc_omap_device2 = {
255 .id = 2, 270 .id = 2,
256 .dev = { 271 .dev = {
257 .dma_mask = &mmc2_dmamask, 272 .dma_mask = &mmc2_dmamask,
258 .platform_data = &mmc2_conf, 273 .platform_data = &mmc2_data,
259 }, 274 },
260 .num_resources = ARRAY_SIZE(mmc2_resources), 275 .num_resources = ARRAY_SIZE(mmc2_resources),
261 .resource = mmc2_resources, 276 .resource = mmc2_resources,
262}; 277};
263#endif 278#endif
264 279
265static void __init omap_init_mmc(void) 280static inline void omap_init_mmc_conf(const struct omap_mmc_config *mmc_conf)
266{ 281{
267 const struct omap_mmc_config *mmc_conf; 282 if (cpu_is_omap2430() || cpu_is_omap34xx())
268 const struct omap_mmc_conf *mmc;
269
270 /* NOTE: assumes MMC was never (wrongly) enabled */
271 mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
272 if (!mmc_conf)
273 return; 283 return;
274 284
275 /* block 1 is always available and has just one pinout option */ 285 if (mmc_conf->mmc[0].enabled) {
276 mmc = &mmc_conf->mmc[0];
277 if (mmc->enabled) {
278 if (cpu_is_omap24xx()) { 286 if (cpu_is_omap24xx()) {
279 omap_cfg_reg(H18_24XX_MMC_CMD); 287 omap_cfg_reg(H18_24XX_MMC_CMD);
280 omap_cfg_reg(H15_24XX_MMC_CLKI); 288 omap_cfg_reg(H15_24XX_MMC_CLKI);
@@ -292,7 +300,7 @@ static void __init omap_init_mmc(void)
292 omap_cfg_reg(P20_1710_MMC_DATDIR0); 300 omap_cfg_reg(P20_1710_MMC_DATDIR0);
293 } 301 }
294 } 302 }
295 if (mmc->wire4) { 303 if (mmc_conf->mmc[0].wire4) {
296 if (cpu_is_omap24xx()) { 304 if (cpu_is_omap24xx()) {
297 omap_cfg_reg(H14_24XX_MMC_DAT1); 305 omap_cfg_reg(H14_24XX_MMC_DAT1);
298 omap_cfg_reg(E19_24XX_MMC_DAT2); 306 omap_cfg_reg(E19_24XX_MMC_DAT2);
@@ -303,25 +311,22 @@ static void __init omap_init_mmc(void)
303 } else { 311 } else {
304 omap_cfg_reg(MMC_DAT1); 312 omap_cfg_reg(MMC_DAT1);
305 /* NOTE: DAT2 can be on W10 (here) or M15 */ 313 /* NOTE: DAT2 can be on W10 (here) or M15 */
306 if (!mmc->nomux) 314 if (!mmc_conf->mmc[0].nomux)
307 omap_cfg_reg(MMC_DAT2); 315 omap_cfg_reg(MMC_DAT2);
308 omap_cfg_reg(MMC_DAT3); 316 omap_cfg_reg(MMC_DAT3);
309 } 317 }
310 } 318 }
311 mmc1_conf = *mmc;
312 (void) platform_device_register(&mmc_omap_device1);
313 } 319 }
314 320
315#ifdef CONFIG_ARCH_OMAP16XX 321#ifdef CONFIG_ARCH_OMAP16XX
316 /* block 2 is on newer chips, and has many pinout options */ 322 /* block 2 is on newer chips, and has many pinout options */
317 mmc = &mmc_conf->mmc[1]; 323 if (mmc_conf->mmc[1].enabled) {
318 if (mmc->enabled) { 324 if (!mmc_conf->mmc[1].nomux) {
319 if (!mmc->nomux) {
320 omap_cfg_reg(Y8_1610_MMC2_CMD); 325 omap_cfg_reg(Y8_1610_MMC2_CMD);
321 omap_cfg_reg(Y10_1610_MMC2_CLK); 326 omap_cfg_reg(Y10_1610_MMC2_CLK);
322 omap_cfg_reg(R18_1610_MMC2_CLKIN); 327 omap_cfg_reg(R18_1610_MMC2_CLKIN);
323 omap_cfg_reg(W8_1610_MMC2_DAT0); 328 omap_cfg_reg(W8_1610_MMC2_DAT0);
324 if (mmc->wire4) { 329 if (mmc_conf->mmc[1].wire4) {
325 omap_cfg_reg(V8_1610_MMC2_DAT1); 330 omap_cfg_reg(V8_1610_MMC2_DAT1);
326 omap_cfg_reg(W15_1610_MMC2_DAT2); 331 omap_cfg_reg(W15_1610_MMC2_DAT2);
327 omap_cfg_reg(R10_1610_MMC2_DAT3); 332 omap_cfg_reg(R10_1610_MMC2_DAT3);
@@ -337,14 +342,55 @@ static void __init omap_init_mmc(void)
337 if (cpu_is_omap1710()) 342 if (cpu_is_omap1710())
338 omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24), 343 omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
339 MOD_CONF_CTRL_1); 344 MOD_CONF_CTRL_1);
340 mmc2_conf = *mmc; 345 }
346#endif
347}
348
349static void __init omap_init_mmc(void)
350{
351 const struct omap_mmc_config *mmc_conf;
352
353 /* NOTE: assumes MMC was never (wrongly) enabled */
354 mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
355 if (!mmc_conf)
356 return;
357
358 omap_init_mmc_conf(mmc_conf);
359
360 if (mmc_conf->mmc[0].enabled) {
361 mmc1_data.conf = mmc_conf->mmc[0];
362 (void) platform_device_register(&mmc_omap_device1);
363 }
364
365#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \
366 defined(CONFIG_ARCH_OMAP34XX)
367 if (mmc_conf->mmc[1].enabled) {
368 mmc2_data.conf = mmc_conf->mmc[1];
341 (void) platform_device_register(&mmc_omap_device2); 369 (void) platform_device_register(&mmc_omap_device2);
342 } 370 }
343#endif 371#endif
344 return;
345} 372}
373
374void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info)
375{
376 switch (host) {
377 case 1:
378 mmc1_data = *info;
379 break;
380#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \
381 defined(CONFIG_ARCH_OMAP34XX)
382 case 2:
383 mmc2_data = *info;
384 break;
385#endif
386 default:
387 BUG();
388 }
389}
390
346#else 391#else
347static inline void omap_init_mmc(void) {} 392static inline void omap_init_mmc(void) {}
393void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info) {}
348#endif 394#endif
349 395
350/*-------------------------------------------------------------------------*/ 396/*-------------------------------------------------------------------------*/
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 3e76ee2bc731..9e1341ebc14e 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -1488,7 +1488,7 @@ static int __init _omap_gpio_init(void)
1488 bank->chip.set = gpio_set; 1488 bank->chip.set = gpio_set;
1489 if (bank_is_mpuio(bank)) { 1489 if (bank_is_mpuio(bank)) {
1490 bank->chip.label = "mpuio"; 1490 bank->chip.label = "mpuio";
1491#ifdef CONFIG_ARCH_OMAP1 1491#ifdef CONFIG_ARCH_OMAP16XX
1492 bank->chip.dev = &omap_mpuio_device.dev; 1492 bank->chip.dev = &omap_mpuio_device.dev;
1493#endif 1493#endif
1494 bank->chip.base = OMAP_MPUIO(0); 1494 bank->chip.base = OMAP_MPUIO(0);
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h
index 6eb44a92871d..8fdb95e26fcd 100644
--- a/arch/arm/plat-omap/include/mach/mcbsp.h
+++ b/arch/arm/plat-omap/include/mach/mcbsp.h
@@ -315,6 +315,7 @@ struct omap_mcbsp_ops {
315}; 315};
316 316
317struct omap_mcbsp_platform_data { 317struct omap_mcbsp_platform_data {
318 unsigned long phys_base;
318 u32 virt_base; 319 u32 virt_base;
319 u8 dma_rx_sync, dma_tx_sync; 320 u8 dma_rx_sync, dma_tx_sync;
320 u16 rx_irq, tx_irq; 321 u16 rx_irq, tx_irq;
@@ -324,6 +325,7 @@ struct omap_mcbsp_platform_data {
324 325
325struct omap_mcbsp { 326struct omap_mcbsp {
326 struct device *dev; 327 struct device *dev;
328 unsigned long phys_base;
327 u32 io_base; 329 u32 io_base;
328 u8 id; 330 u8 id;
329 u8 free; 331 u8 free;
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index d0844050f2d2..014d26574bb6 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -651,7 +651,7 @@ int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
651 omap_set_dma_dest_params(mcbsp[id].dma_tx_lch, 651 omap_set_dma_dest_params(mcbsp[id].dma_tx_lch,
652 src_port, 652 src_port,
653 OMAP_DMA_AMODE_CONSTANT, 653 OMAP_DMA_AMODE_CONSTANT,
654 mcbsp[id].io_base + OMAP_MCBSP_REG_DXR1, 654 mcbsp[id].phys_base + OMAP_MCBSP_REG_DXR1,
655 0, 0); 655 0, 0);
656 656
657 omap_set_dma_src_params(mcbsp[id].dma_tx_lch, 657 omap_set_dma_src_params(mcbsp[id].dma_tx_lch,
@@ -712,7 +712,7 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
712 omap_set_dma_src_params(mcbsp[id].dma_rx_lch, 712 omap_set_dma_src_params(mcbsp[id].dma_rx_lch,
713 src_port, 713 src_port,
714 OMAP_DMA_AMODE_CONSTANT, 714 OMAP_DMA_AMODE_CONSTANT,
715 mcbsp[id].io_base + OMAP_MCBSP_REG_DRR1, 715 mcbsp[id].phys_base + OMAP_MCBSP_REG_DRR1,
716 0, 0); 716 0, 0);
717 717
718 omap_set_dma_dest_params(mcbsp[id].dma_rx_lch, 718 omap_set_dma_dest_params(mcbsp[id].dma_rx_lch,
@@ -830,6 +830,7 @@ static int __init omap_mcbsp_probe(struct platform_device *pdev)
830 mcbsp[id].dma_tx_lch = -1; 830 mcbsp[id].dma_tx_lch = -1;
831 mcbsp[id].dma_rx_lch = -1; 831 mcbsp[id].dma_rx_lch = -1;
832 832
833 mcbsp[id].phys_base = pdata->phys_base;
833 mcbsp[id].io_base = pdata->virt_base; 834 mcbsp[id].io_base = pdata->virt_base;
834 /* Default I/O is IRQ based */ 835 /* Default I/O is IRQ based */
835 mcbsp[id].io_type = OMAP_MCBSP_IRQ_IO; 836 mcbsp[id].io_type = OMAP_MCBSP_IRQ_IO;