7 files changed, 23 insertions, 9 deletions

diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 5d3acff8c596..d22f38b957db 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -101,7 +101,7 @@ config DEBUG_S3C2410_UART
         help
           Choice for UART for kernel low-level using S3C2410 UARTS,
           should be between zero and two. The port must have been
-          initalised by the boot-loader before use.
+          initialised by the boot-loader before use.
 
           The uncompressor code port configuration is now handled
           by CONFIG_S3C2410_LOWLEVEL_UART_PORT.
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index 092ee12ced42..affd1d5d7440 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -178,8 +178,12 @@ static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type)
 
 static void ixp23xx_irq_mask(unsigned int irq)
 {
-        volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
+        volatile unsigned long *intr_reg;
 
+        if (irq >= 56)
+                irq += 8;
+
+        intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
         *intr_reg &= ~(1 << (irq % 32));
 }
 
@@ -199,17 +203,25 @@ static void ixp23xx_irq_ack(unsigned int irq)
  */
 static void ixp23xx_irq_level_unmask(unsigned int irq)
 {
-        volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
+        volatile unsigned long *intr_reg;
 
         ixp23xx_irq_ack(irq);
 
+        if (irq >= 56)
+                irq += 8;
+
+        intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
         *intr_reg |= (1 << (irq % 32));
 }
 
 static void ixp23xx_irq_edge_unmask(unsigned int irq)
 {
-        volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
+        volatile unsigned long *intr_reg;
+
+        if (irq >= 56)
+                irq += 8;
 
+        intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
         *intr_reg |= (1 << (irq % 32));
 }
 
diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig
index 2a39f9e481ad..3b23f43cb160 100644
--- a/arch/arm/mach-ixp4xx/Kconfig
+++ b/arch/arm/mach-ixp4xx/Kconfig
@@ -141,7 +141,7 @@ config IXP4XX_INDIRECT_PCI
           2) If > 64MB of memory space is required, the IXP4xx can be 
              configured to use indirect registers to access PCI This allows 
              for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus. 
-             The disadvantadge of this is that every PCI access requires 
+             The disadvantage of this is that every PCI access requires 
              three local register accesses plus a spinlock, but in some 
              cases the performance hit is acceptable. In addition, you cannot 
              mmap() PCI devices in this case due to the indirect nature
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 02e188d98e7d..b307f11951df 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -493,6 +493,7 @@ static void __init mainstone_map_io(void)
 MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
         /* Maintainer: MontaVista Software Inc. */
         .phys_io        = 0x40000000,
+        .boot_params    = 0xa0000100,   /* BLOB boot parameter setting */
         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
         .map_io         = mainstone_map_io,
         .init_irq       = mainstone_init_irq,
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index ce7d81000695..970f98dadffc 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -170,7 +170,7 @@ config S3C2410_PM_DEBUG
         depends on ARCH_S3C2410 && PM
         help
           Say Y here if you want verbose debugging from the PM Suspend and
-          Resume code. See `Documentation/arm/Samsing-S3C24XX/Suspend.txt`
+          Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
           for more information.
 
 config S3C2410_PM_CHECK
diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c
index f14b2d0f3690..95273de4f772 100644
--- a/arch/arm/mm/mm-armv.c
+++ b/arch/arm/mm/mm-armv.c
@@ -376,7 +376,7 @@ void __init build_mem_type_table(void)
                 ecc_mask = 0;
         }
 
-        if (cpu_arch <= CPU_ARCH_ARMv5TEJ) {
+        if (cpu_arch <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) {
                 for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
                         if (mem_types[i].prot_l1)
                                 mem_types[i].prot_l1 |= PMD_BIT4;
@@ -631,7 +631,7 @@ void setup_mm_for_reboot(char mode)
                 pgd = init_mm.pgd;
 
         base_pmdval = PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT;
-        if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ)
+        if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
                 base_pmdval |= PMD_BIT4;
 
         for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++, pgd++) {
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index 80873b36c3f7..8d32e21fe151 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -427,12 +427,13 @@ __xsc3_setup:
 #endif
         mcr     p15, 0, r0, c1, c0, 1           @ set auxiliary control reg
         mrc     p15, 0, r0, c1, c0, 0           @ get control register
-        bic     r0, r0, #0x0200                 @ .... ..R. .... ....
         bic     r0, r0, #0x0002                 @ .... .... .... ..A.
         orr     r0, r0, #0x0005                 @ .... .... .... .C.M
 #if BTB_ENABLE
+        bic     r0, r0, #0x0200                 @ .... ..R. .... ....
         orr     r0, r0, #0x3900                 @ ..VI Z..S .... ....
 #else
+        bic     r0, r0, #0x0a00                 @ .... Z.R. .... ....
         orr     r0, r0, #0x3100                 @ ..VI ...S .... ....
 #endif
 #if L2_CACHE_ENABLE