diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-omap2/clock24xx.c | 35 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock24xx.h | 4 |
2 files changed, 25 insertions, 14 deletions
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c index 8ecd1751a3d8..e60d1c094a04 100644 --- a/arch/arm/mach-omap2/clock24xx.c +++ b/arch/arm/mach-omap2/clock24xx.c | |||
@@ -42,7 +42,8 @@ | |||
42 | #include "cm-regbits-24xx.h" | 42 | #include "cm-regbits-24xx.h" |
43 | 43 | ||
44 | static const struct clkops clkops_oscck; | 44 | static const struct clkops clkops_oscck; |
45 | static const struct clkops clkops_fixed; | 45 | static const struct clkops clkops_apll96; |
46 | static const struct clkops clkops_apll54; | ||
46 | 47 | ||
47 | static void omap2430_clk_i2chs_find_idlest(struct clk *clk, | 48 | static void omap2430_clk_i2chs_find_idlest(struct clk *clk, |
48 | void __iomem **idlest_reg, | 49 | void __iomem **idlest_reg, |
@@ -338,7 +339,7 @@ static void omap2_sys_clk_recalc(struct clk * clk) | |||
338 | #endif /* OLD_CK */ | 339 | #endif /* OLD_CK */ |
339 | 340 | ||
340 | /* Enable an APLL if off */ | 341 | /* Enable an APLL if off */ |
341 | static int omap2_clk_fixed_enable(struct clk *clk) | 342 | static int omap2_clk_apll_enable(struct clk *clk, u32 status_mask) |
342 | { | 343 | { |
343 | u32 cval, apll_mask; | 344 | u32 cval, apll_mask; |
344 | 345 | ||
@@ -353,12 +354,7 @@ static int omap2_clk_fixed_enable(struct clk *clk) | |||
353 | cval |= apll_mask; | 354 | cval |= apll_mask; |
354 | cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN); | 355 | cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN); |
355 | 356 | ||
356 | if (clk == &apll96_ck) | 357 | omap2_cm_wait_idlest(OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), status_mask, |
357 | cval = OMAP24XX_ST_96M_APLL; | ||
358 | else if (clk == &apll54_ck) | ||
359 | cval = OMAP24XX_ST_54M_APLL; | ||
360 | |||
361 | omap2_cm_wait_idlest(OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), cval, | ||
362 | clk->name); | 358 | clk->name); |
363 | 359 | ||
364 | /* | 360 | /* |
@@ -368,8 +364,18 @@ static int omap2_clk_fixed_enable(struct clk *clk) | |||
368 | return 0; | 364 | return 0; |
369 | } | 365 | } |
370 | 366 | ||
367 | static int omap2_clk_apll96_enable(struct clk *clk) | ||
368 | { | ||
369 | return omap2_clk_apll_enable(clk, OMAP24XX_ST_96M_APLL); | ||
370 | } | ||
371 | |||
372 | static int omap2_clk_apll54_enable(struct clk *clk) | ||
373 | { | ||
374 | return omap2_clk_apll_enable(clk, OMAP24XX_ST_54M_APLL); | ||
375 | } | ||
376 | |||
371 | /* Stop APLL */ | 377 | /* Stop APLL */ |
372 | static void omap2_clk_fixed_disable(struct clk *clk) | 378 | static void omap2_clk_apll_disable(struct clk *clk) |
373 | { | 379 | { |
374 | u32 cval; | 380 | u32 cval; |
375 | 381 | ||
@@ -378,9 +384,14 @@ static void omap2_clk_fixed_disable(struct clk *clk) | |||
378 | cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN); | 384 | cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN); |
379 | } | 385 | } |
380 | 386 | ||
381 | static const struct clkops clkops_fixed = { | 387 | static const struct clkops clkops_apll96 = { |
382 | .enable = &omap2_clk_fixed_enable, | 388 | .enable = &omap2_clk_apll96_enable, |
383 | .disable = &omap2_clk_fixed_disable, | 389 | .disable = &omap2_clk_apll_disable, |
390 | }; | ||
391 | |||
392 | static const struct clkops clkops_apll54 = { | ||
393 | .enable = &omap2_clk_apll54_enable, | ||
394 | .disable = &omap2_clk_apll_disable, | ||
384 | }; | 395 | }; |
385 | 396 | ||
386 | /* | 397 | /* |
diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h index d19cf7a7d8db..21238d18fc80 100644 --- a/arch/arm/mach-omap2/clock24xx.h +++ b/arch/arm/mach-omap2/clock24xx.h | |||
@@ -708,7 +708,7 @@ static struct clk dpll_ck = { | |||
708 | 708 | ||
709 | static struct clk apll96_ck = { | 709 | static struct clk apll96_ck = { |
710 | .name = "apll96_ck", | 710 | .name = "apll96_ck", |
711 | .ops = &clkops_fixed, | 711 | .ops = &clkops_apll96, |
712 | .parent = &sys_ck, | 712 | .parent = &sys_ck, |
713 | .rate = 96000000, | 713 | .rate = 96000000, |
714 | .flags = RATE_FIXED | ENABLE_ON_INIT, | 714 | .flags = RATE_FIXED | ENABLE_ON_INIT, |
@@ -719,7 +719,7 @@ static struct clk apll96_ck = { | |||
719 | 719 | ||
720 | static struct clk apll54_ck = { | 720 | static struct clk apll54_ck = { |
721 | .name = "apll54_ck", | 721 | .name = "apll54_ck", |
722 | .ops = &clkops_fixed, | 722 | .ops = &clkops_apll54, |
723 | .parent = &sys_ck, | 723 | .parent = &sys_ck, |
724 | .rate = 54000000, | 724 | .rate = 54000000, |
725 | .flags = RATE_FIXED | ENABLE_ON_INIT, | 725 | .flags = RATE_FIXED | ENABLE_ON_INIT, |