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-rw-r--r--arch/arm/configs/n8x0_defconfig2
-rw-r--r--arch/arm/configs/omap3_beagle_defconfig1
-rw-r--r--arch/arm/configs/u300_defconfig94
-rw-r--r--arch/arm/include/asm/bitops.h6
-rw-r--r--arch/arm/include/asm/cacheflush.h5
-rw-r--r--arch/arm/include/asm/elf.h3
-rw-r--r--arch/arm/include/asm/tlbflush.h3
-rw-r--r--arch/arm/kernel/entry-armv.S28
-rw-r--r--arch/arm/kernel/entry-header.S15
-rw-r--r--arch/arm/kernel/process.c9
-rw-r--r--arch/arm/kernel/signal.c41
-rw-r--r--arch/arm/kernel/signal.h4
-rw-r--r--arch/arm/kernel/traps.c80
-rw-r--r--arch/arm/kernel/unwind.c9
-rw-r--r--arch/arm/mach-at91/at91sam9g45_devices.c2
-rw-r--r--arch/arm/mach-at91/include/mach/cpu.h9
-rw-r--r--arch/arm/mach-bcmring/core.c4
-rw-r--r--arch/arm/mach-bcmring/include/mach/system.h2
-rw-r--r--arch/arm/mach-ep93xx/Kconfig44
-rw-r--r--arch/arm/mach-ep93xx/Makefile.boot9
-rw-r--r--arch/arm/mach-ep93xx/clock.c166
-rw-r--r--arch/arm/mach-ep93xx/core.c32
-rw-r--r--arch/arm/mach-ep93xx/edb93xx.c31
-rw-r--r--arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h42
-rw-r--r--arch/arm/mach-ep93xx/include/mach/gpio.h16
-rw-r--r--arch/arm/mach-ep93xx/include/mach/memory.h6
-rw-r--r--arch/arm/mach-ep93xx/include/mach/platform.h5
-rw-r--r--arch/arm/mach-ep93xx/micro9.c132
-rw-r--r--arch/arm/mach-integrator/include/mach/memory.h1
-rw-r--r--arch/arm/mach-mx2/clock_imx27.c8
-rw-r--r--arch/arm/mach-mx2/pcm038.c96
-rw-r--r--arch/arm/mach-mx2/pcm970-baseboard.c2
-rw-r--r--arch/arm/mach-mx25/devices.c19
-rw-r--r--arch/arm/mach-mx25/mx25pdk.c25
-rw-r--r--arch/arm/mach-mx3/clock-imx35.c2
-rw-r--r--arch/arm/mach-mx3/clock.c2
-rw-r--r--arch/arm/mach-mx3/devices.c24
-rw-r--r--arch/arm/mach-mx3/devices.h6
-rw-r--r--arch/arm/mach-mx3/mm.c2
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c6
-rw-r--r--arch/arm/mach-omap1/board-generic.c8
-rw-r--r--arch/arm/mach-omap1/board-innovator.c20
-rw-r--r--arch/arm/mach-omap1/board-palmte.c8
-rw-r--r--arch/arm/mach-omap1/board-palmtt.c8
-rw-r--r--arch/arm/mach-omap1/board-palmz71.c8
-rw-r--r--arch/arm/mach-omap1/board-sx1.c8
-rw-r--r--arch/arm/mach-omap1/board-voiceblue.c8
-rw-r--r--arch/arm/mach-omap1/serial.c26
-rw-r--r--arch/arm/mach-omap2/Kconfig12
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c2
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c4
-rw-r--r--arch/arm/mach-omap2/board-ldp.c2
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c2
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c2
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c4
-rw-r--r--arch/arm/mach-omap2/board-rx51.c1
-rw-r--r--arch/arm/mach-omap2/board-zoom2.c6
-rw-r--r--arch/arm/mach-omap2/clock24xx.c1
-rw-r--r--arch/arm/mach-omap2/clockdomain.c74
-rw-r--r--arch/arm/mach-omap2/io.c2
-rw-r--r--arch/arm/mach-omap2/pm34xx.c7
-rw-r--r--arch/arm/mach-omap2/serial.c10
-rw-r--r--arch/arm/mach-pxa/cm-x300.c38
-rw-r--r--arch/arm/mach-pxa/cpufreq-pxa2xx.c2
-rw-r--r--arch/arm/mach-pxa/csb726.c2
-rw-r--r--arch/arm/mach-pxa/spitz.c39
-rw-r--r--arch/arm/mach-realview/core.h2
-rw-r--r--arch/arm/mach-realview/include/mach/board-pb1176.h5
-rw-r--r--arch/arm/mach-realview/include/mach/board-pb11mp.h12
-rw-r--r--arch/arm/mach-realview/include/mach/platform.h15
-rw-r--r--arch/arm/mach-realview/include/mach/system.h10
-rw-r--r--arch/arm/mach-realview/realview_pb1176.c11
-rw-r--r--arch/arm/mach-realview/realview_pb11mp.c16
-rw-r--r--arch/arm/mach-s3c2410/gpio.c1
-rw-r--r--arch/arm/mach-s3c2410/include/mach/dma.h7
-rw-r--r--arch/arm/mach-s3c2440/Kconfig1
-rw-r--r--arch/arm/mach-s3c2440/mach-mini2440.c4
-rw-r--r--arch/arm/mach-s3c6400/include/mach/dma.h5
-rw-r--r--arch/arm/mach-sa1100/Makefile1
-rw-r--r--arch/arm/mm/Kconfig5
-rw-r--r--arch/arm/mm/cache-v6.S20
-rw-r--r--arch/arm/mm/cache-v7.S19
-rw-r--r--arch/arm/mm/context.c5
-rw-r--r--arch/arm/mm/dma-mapping.c4
-rw-r--r--arch/arm/mm/fault-armv.c9
-rw-r--r--arch/arm/mm/fault.c5
-rw-r--r--arch/arm/mm/flush.c31
-rw-r--r--arch/arm/mm/highmem.c2
-rw-r--r--arch/arm/mm/init.c22
-rw-r--r--arch/arm/mm/mmu.c7
-rw-r--r--arch/arm/mm/proc-v6.S7
-rw-r--r--arch/arm/mm/proc-v7.S7
-rw-r--r--arch/arm/oprofile/op_model_v6.c3
-rw-r--r--arch/arm/plat-omap/dma.c33
-rw-r--r--arch/arm/plat-omap/include/mach/keypad.h5
-rw-r--r--arch/arm/plat-omap/iommu.c2
-rw-r--r--arch/arm/plat-omap/mcbsp.c2
-rw-r--r--arch/arm/plat-s3c24xx/adc.c2
-rw-r--r--arch/arm/plat-s3c24xx/cpu.c10
-rw-r--r--arch/arm/plat-s3c24xx/dma.c6
-rw-r--r--arch/arm/plat-s3c24xx/gpio.c1
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h9
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/s3c2410.h1
-rw-r--r--arch/arm/plat-s3c64xx/include/plat/regs-clock.h4
-rw-r--r--arch/arm/plat-s3c64xx/s3c6400-clock.c3
105 files changed, 1102 insertions, 509 deletions
diff --git a/arch/arm/configs/n8x0_defconfig b/arch/arm/configs/n8x0_defconfig
index 8da75dede52e..264f52b5c52d 100644
--- a/arch/arm/configs/n8x0_defconfig
+++ b/arch/arm/configs/n8x0_defconfig
@@ -304,7 +304,7 @@ CONFIG_ALIGNMENT_TRAP=y
304CONFIG_ZBOOT_ROM_TEXT=0x10C08000 304CONFIG_ZBOOT_ROM_TEXT=0x10C08000
305CONFIG_ZBOOT_ROM_BSS=0x10200000 305CONFIG_ZBOOT_ROM_BSS=0x10200000
306# CONFIG_ZBOOT_ROM is not set 306# CONFIG_ZBOOT_ROM is not set
307CONFIG_CMDLINE="root=1f03 rootfstype=jffs2 console=ttyS0,115200n8" 307CONFIG_CMDLINE="root=1f03 rootfstype=jffs2 console=ttyS2,115200n8"
308# CONFIG_XIP_KERNEL is not set 308# CONFIG_XIP_KERNEL is not set
309# CONFIG_KEXEC is not set 309# CONFIG_KEXEC is not set
310 310
diff --git a/arch/arm/configs/omap3_beagle_defconfig b/arch/arm/configs/omap3_beagle_defconfig
index 357d4021e2d0..b3c8cce0f8fb 100644
--- a/arch/arm/configs/omap3_beagle_defconfig
+++ b/arch/arm/configs/omap3_beagle_defconfig
@@ -969,7 +969,6 @@ CONFIG_USB_ETH_RNDIS=y
969# 969#
970CONFIG_USB_OTG_UTILS=y 970CONFIG_USB_OTG_UTILS=y
971# CONFIG_USB_GPIO_VBUS is not set 971# CONFIG_USB_GPIO_VBUS is not set
972# CONFIG_ISP1301_OMAP is not set
973CONFIG_TWL4030_USB=y 972CONFIG_TWL4030_USB=y
974# CONFIG_NOP_USB_XCEIV is not set 973# CONFIG_NOP_USB_XCEIV is not set
975CONFIG_MMC=y 974CONFIG_MMC=y
diff --git a/arch/arm/configs/u300_defconfig b/arch/arm/configs/u300_defconfig
index 7d61ae6e75da..953ba0297fc4 100644
--- a/arch/arm/configs/u300_defconfig
+++ b/arch/arm/configs/u300_defconfig
@@ -1,14 +1,14 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31-rc3 3# Linux kernel version: 2.6.32-rc5
4# Thu Jul 16 23:36:10 2009 4# Sat Oct 17 23:32:24 2009
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y 8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y 9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y 10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y 11CONFIG_HAVE_TCM=y
12CONFIG_GENERIC_HARDIRQS=y 12CONFIG_GENERIC_HARDIRQS=y
13CONFIG_STACKTRACE_SUPPORT=y 13CONFIG_STACKTRACE_SUPPORT=y
14CONFIG_HAVE_LATENCYTOP_SUPPORT=y 14CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@@ -44,11 +44,12 @@ CONFIG_SYSVIPC_SYSCTL=y
44# 44#
45# RCU Subsystem 45# RCU Subsystem
46# 46#
47CONFIG_CLASSIC_RCU=y 47CONFIG_TREE_RCU=y
48# CONFIG_TREE_RCU is not set 48# CONFIG_TREE_PREEMPT_RCU is not set
49# CONFIG_PREEMPT_RCU is not set 49# CONFIG_RCU_TRACE is not set
50CONFIG_RCU_FANOUT=32
51# CONFIG_RCU_FANOUT_EXACT is not set
50# CONFIG_TREE_RCU_TRACE is not set 52# CONFIG_TREE_RCU_TRACE is not set
51# CONFIG_PREEMPT_RCU_TRACE is not set
52# CONFIG_IKCONFIG is not set 53# CONFIG_IKCONFIG is not set
53CONFIG_LOG_BUF_SHIFT=14 54CONFIG_LOG_BUF_SHIFT=14
54# CONFIG_GROUP_SCHED is not set 55# CONFIG_GROUP_SCHED is not set
@@ -80,17 +81,15 @@ CONFIG_SHMEM=y
80# CONFIG_AIO is not set 81# CONFIG_AIO is not set
81 82
82# 83#
83# Performance Counters 84# Kernel Performance Events And Counters
84# 85#
85# CONFIG_VM_EVENT_COUNTERS is not set 86# CONFIG_VM_EVENT_COUNTERS is not set
86CONFIG_SLUB_DEBUG=y 87CONFIG_SLUB_DEBUG=y
87# CONFIG_STRIP_ASM_SYMS is not set
88CONFIG_COMPAT_BRK=y 88CONFIG_COMPAT_BRK=y
89# CONFIG_SLAB is not set 89# CONFIG_SLAB is not set
90CONFIG_SLUB=y 90CONFIG_SLUB=y
91# CONFIG_SLOB is not set 91# CONFIG_SLOB is not set
92# CONFIG_PROFILING is not set 92# CONFIG_PROFILING is not set
93# CONFIG_MARKERS is not set
94CONFIG_HAVE_OPROFILE=y 93CONFIG_HAVE_OPROFILE=y
95# CONFIG_KPROBES is not set 94# CONFIG_KPROBES is not set
96CONFIG_HAVE_KPROBES=y 95CONFIG_HAVE_KPROBES=y
@@ -133,6 +132,7 @@ CONFIG_DEFAULT_IOSCHED="deadline"
133# 132#
134# System Type 133# System Type
135# 134#
135CONFIG_MMU=y
136# CONFIG_ARCH_AAEC2000 is not set 136# CONFIG_ARCH_AAEC2000 is not set
137# CONFIG_ARCH_INTEGRATOR is not set 137# CONFIG_ARCH_INTEGRATOR is not set
138# CONFIG_ARCH_REALVIEW is not set 138# CONFIG_ARCH_REALVIEW is not set
@@ -147,6 +147,7 @@ CONFIG_DEFAULT_IOSCHED="deadline"
147# CONFIG_ARCH_STMP3XXX is not set 147# CONFIG_ARCH_STMP3XXX is not set
148# CONFIG_ARCH_NETX is not set 148# CONFIG_ARCH_NETX is not set
149# CONFIG_ARCH_H720X is not set 149# CONFIG_ARCH_H720X is not set
150# CONFIG_ARCH_NOMADIK is not set
150# CONFIG_ARCH_IOP13XX is not set 151# CONFIG_ARCH_IOP13XX is not set
151# CONFIG_ARCH_IOP32X is not set 152# CONFIG_ARCH_IOP32X is not set
152# CONFIG_ARCH_IOP33X is not set 153# CONFIG_ARCH_IOP33X is not set
@@ -169,11 +170,13 @@ CONFIG_DEFAULT_IOSCHED="deadline"
169# CONFIG_ARCH_SA1100 is not set 170# CONFIG_ARCH_SA1100 is not set
170# CONFIG_ARCH_S3C2410 is not set 171# CONFIG_ARCH_S3C2410 is not set
171# CONFIG_ARCH_S3C64XX is not set 172# CONFIG_ARCH_S3C64XX is not set
173# CONFIG_ARCH_S5PC1XX is not set
172# CONFIG_ARCH_SHARK is not set 174# CONFIG_ARCH_SHARK is not set
173# CONFIG_ARCH_LH7A40X is not set 175# CONFIG_ARCH_LH7A40X is not set
174CONFIG_ARCH_U300=y 176CONFIG_ARCH_U300=y
175# CONFIG_ARCH_DAVINCI is not set 177# CONFIG_ARCH_DAVINCI is not set
176# CONFIG_ARCH_OMAP is not set 178# CONFIG_ARCH_OMAP is not set
179# CONFIG_ARCH_BCMRING is not set
177 180
178# 181#
179# ST-Ericsson AB U300/U330/U335/U365 Platform 182# ST-Ericsson AB U300/U330/U335/U365 Platform
@@ -195,6 +198,7 @@ CONFIG_MACH_U300_BS335=y
195CONFIG_MACH_U300_DUAL_RAM=y 198CONFIG_MACH_U300_DUAL_RAM=y
196CONFIG_U300_DEBUG=y 199CONFIG_U300_DEBUG=y
197# CONFIG_MACH_U300_SEMI_IS_SHARED is not set 200# CONFIG_MACH_U300_SEMI_IS_SHARED is not set
201CONFIG_MACH_U300_SPIDUMMY=y
198 202
199# 203#
200# All the settings below must match the bootloader's settings 204# All the settings below must match the bootloader's settings
@@ -207,7 +211,7 @@ CONFIG_CPU_32=y
207CONFIG_CPU_ARM926T=y 211CONFIG_CPU_ARM926T=y
208CONFIG_CPU_32v5=y 212CONFIG_CPU_32v5=y
209CONFIG_CPU_ABRT_EV5TJ=y 213CONFIG_CPU_ABRT_EV5TJ=y
210CONFIG_CPU_PABRT_NOIFAR=y 214CONFIG_CPU_PABRT_LEGACY=y
211CONFIG_CPU_CACHE_VIVT=y 215CONFIG_CPU_CACHE_VIVT=y
212CONFIG_CPU_COPY_V4WB=y 216CONFIG_CPU_COPY_V4WB=y
213CONFIG_CPU_TLB_V4WBI=y 217CONFIG_CPU_TLB_V4WBI=y
@@ -222,6 +226,7 @@ CONFIG_ARM_THUMB=y
222# CONFIG_CPU_DCACHE_DISABLE is not set 226# CONFIG_CPU_DCACHE_DISABLE is not set
223# CONFIG_CPU_DCACHE_WRITETHROUGH is not set 227# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
224# CONFIG_CPU_CACHE_ROUND_ROBIN is not set 228# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
229CONFIG_ARM_L1_CACHE_SHIFT=5
225CONFIG_ARM_VIC=y 230CONFIG_ARM_VIC=y
226CONFIG_ARM_VIC_NR=2 231CONFIG_ARM_VIC_NR=2
227CONFIG_COMMON_CLKDEV=y 232CONFIG_COMMON_CLKDEV=y
@@ -245,6 +250,8 @@ CONFIG_VMSPLIT_3G=y
245# CONFIG_VMSPLIT_2G is not set 250# CONFIG_VMSPLIT_2G is not set
246# CONFIG_VMSPLIT_1G is not set 251# CONFIG_VMSPLIT_1G is not set
247CONFIG_PAGE_OFFSET=0xC0000000 252CONFIG_PAGE_OFFSET=0xC0000000
253# CONFIG_PREEMPT_NONE is not set
254# CONFIG_PREEMPT_VOLUNTARY is not set
248CONFIG_PREEMPT=y 255CONFIG_PREEMPT=y
249CONFIG_HZ=100 256CONFIG_HZ=100
250CONFIG_AEABI=y 257CONFIG_AEABI=y
@@ -265,6 +272,7 @@ CONFIG_ZONE_DMA_FLAG=0
265CONFIG_VIRT_TO_BUS=y 272CONFIG_VIRT_TO_BUS=y
266CONFIG_HAVE_MLOCK=y 273CONFIG_HAVE_MLOCK=y
267CONFIG_HAVE_MLOCKED_PAGE_BIT=y 274CONFIG_HAVE_MLOCKED_PAGE_BIT=y
275# CONFIG_KSM is not set
268CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 276CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
269CONFIG_ALIGNMENT_TRAP=y 277CONFIG_ALIGNMENT_TRAP=y
270# CONFIG_UACCESS_WITH_MEMCPY is not set 278# CONFIG_UACCESS_WITH_MEMCPY is not set
@@ -313,6 +321,7 @@ CONFIG_PM=y
313# CONFIG_PM_DEBUG is not set 321# CONFIG_PM_DEBUG is not set
314# CONFIG_SUSPEND is not set 322# CONFIG_SUSPEND is not set
315# CONFIG_APM_EMULATION is not set 323# CONFIG_APM_EMULATION is not set
324# CONFIG_PM_RUNTIME is not set
316CONFIG_ARCH_SUSPEND_POSSIBLE=y 325CONFIG_ARCH_SUSPEND_POSSIBLE=y
317CONFIG_NET=y 326CONFIG_NET=y
318 327
@@ -351,6 +360,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
351# CONFIG_NETFILTER is not set 360# CONFIG_NETFILTER is not set
352# CONFIG_IP_DCCP is not set 361# CONFIG_IP_DCCP is not set
353# CONFIG_IP_SCTP is not set 362# CONFIG_IP_SCTP is not set
363# CONFIG_RDS is not set
354# CONFIG_TIPC is not set 364# CONFIG_TIPC is not set
355# CONFIG_ATM is not set 365# CONFIG_ATM is not set
356# CONFIG_BRIDGE is not set 366# CONFIG_BRIDGE is not set
@@ -391,6 +401,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
391# Generic Driver Options 401# Generic Driver Options
392# 402#
393CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 403CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
404# CONFIG_DEVTMPFS is not set
394CONFIG_STANDALONE=y 405CONFIG_STANDALONE=y
395# CONFIG_PREVENT_FIRMWARE_BUILD is not set 406# CONFIG_PREVENT_FIRMWARE_BUILD is not set
396CONFIG_FW_LOADER=y 407CONFIG_FW_LOADER=y
@@ -402,9 +413,9 @@ CONFIG_EXTRA_FIRMWARE=""
402# CONFIG_CONNECTOR is not set 413# CONFIG_CONNECTOR is not set
403CONFIG_MTD=y 414CONFIG_MTD=y
404# CONFIG_MTD_DEBUG is not set 415# CONFIG_MTD_DEBUG is not set
416# CONFIG_MTD_TESTS is not set
405# CONFIG_MTD_CONCAT is not set 417# CONFIG_MTD_CONCAT is not set
406CONFIG_MTD_PARTITIONS=y 418CONFIG_MTD_PARTITIONS=y
407# CONFIG_MTD_TESTS is not set
408# CONFIG_MTD_REDBOOT_PARTS is not set 419# CONFIG_MTD_REDBOOT_PARTS is not set
409CONFIG_MTD_CMDLINE_PARTS=y 420CONFIG_MTD_CMDLINE_PARTS=y
410# CONFIG_MTD_AFS_PARTS is not set 421# CONFIG_MTD_AFS_PARTS is not set
@@ -453,6 +464,7 @@ CONFIG_MTD_CFI_I2=y
453# 464#
454# CONFIG_MTD_DATAFLASH is not set 465# CONFIG_MTD_DATAFLASH is not set
455# CONFIG_MTD_M25P80 is not set 466# CONFIG_MTD_M25P80 is not set
467# CONFIG_MTD_SST25L is not set
456# CONFIG_MTD_SLRAM is not set 468# CONFIG_MTD_SLRAM is not set
457# CONFIG_MTD_PHRAM is not set 469# CONFIG_MTD_PHRAM is not set
458# CONFIG_MTD_MTDRAM is not set 470# CONFIG_MTD_MTDRAM is not set
@@ -520,6 +532,7 @@ CONFIG_HAVE_IDE=y
520# CONFIG_MD is not set 532# CONFIG_MD is not set
521# CONFIG_NETDEVICES is not set 533# CONFIG_NETDEVICES is not set
522# CONFIG_ISDN is not set 534# CONFIG_ISDN is not set
535# CONFIG_PHONE is not set
523 536
524# 537#
525# Input device support 538# Input device support
@@ -540,12 +553,16 @@ CONFIG_INPUT_EVDEV=y
540# Input Device Drivers 553# Input Device Drivers
541# 554#
542CONFIG_INPUT_KEYBOARD=y 555CONFIG_INPUT_KEYBOARD=y
556# CONFIG_KEYBOARD_ADP5588 is not set
543# CONFIG_KEYBOARD_ATKBD is not set 557# CONFIG_KEYBOARD_ATKBD is not set
558# CONFIG_QT2160 is not set
544# CONFIG_KEYBOARD_LKKBD is not set 559# CONFIG_KEYBOARD_LKKBD is not set
545# CONFIG_KEYBOARD_GPIO is not set 560# CONFIG_KEYBOARD_GPIO is not set
546# CONFIG_KEYBOARD_MATRIX is not set 561# CONFIG_KEYBOARD_MATRIX is not set
547# CONFIG_KEYBOARD_LM8323 is not set 562# CONFIG_KEYBOARD_LM8323 is not set
563# CONFIG_KEYBOARD_MAX7359 is not set
548# CONFIG_KEYBOARD_NEWTON is not set 564# CONFIG_KEYBOARD_NEWTON is not set
565# CONFIG_KEYBOARD_OPENCORES is not set
549# CONFIG_KEYBOARD_STOWAWAY is not set 566# CONFIG_KEYBOARD_STOWAWAY is not set
550# CONFIG_KEYBOARD_SUNKBD is not set 567# CONFIG_KEYBOARD_SUNKBD is not set
551# CONFIG_KEYBOARD_XTKBD is not set 568# CONFIG_KEYBOARD_XTKBD is not set
@@ -597,6 +614,7 @@ CONFIG_LEGACY_PTY_COUNT=16
597# CONFIG_TCG_TPM is not set 614# CONFIG_TCG_TPM is not set
598CONFIG_I2C=y 615CONFIG_I2C=y
599CONFIG_I2C_BOARDINFO=y 616CONFIG_I2C_BOARDINFO=y
617CONFIG_I2C_COMPAT=y
600# CONFIG_I2C_CHARDEV is not set 618# CONFIG_I2C_CHARDEV is not set
601CONFIG_I2C_HELPER_AUTO=y 619CONFIG_I2C_HELPER_AUTO=y
602 620
@@ -629,9 +647,6 @@ CONFIG_I2C_STU300=y
629# Miscellaneous I2C Chip support 647# Miscellaneous I2C Chip support
630# 648#
631# CONFIG_DS1682 is not set 649# CONFIG_DS1682 is not set
632# CONFIG_SENSORS_PCF8574 is not set
633# CONFIG_PCF8575 is not set
634# CONFIG_SENSORS_PCA9539 is not set
635# CONFIG_SENSORS_TSL2550 is not set 650# CONFIG_SENSORS_TSL2550 is not set
636# CONFIG_I2C_DEBUG_CORE is not set 651# CONFIG_I2C_DEBUG_CORE is not set
637# CONFIG_I2C_DEBUG_ALGO is not set 652# CONFIG_I2C_DEBUG_ALGO is not set
@@ -653,16 +668,21 @@ CONFIG_SPI_PL022=y
653# 668#
654# CONFIG_SPI_SPIDEV is not set 669# CONFIG_SPI_SPIDEV is not set
655# CONFIG_SPI_TLE62X0 is not set 670# CONFIG_SPI_TLE62X0 is not set
671
672#
673# PPS support
674#
675# CONFIG_PPS is not set
656# CONFIG_W1 is not set 676# CONFIG_W1 is not set
657CONFIG_POWER_SUPPLY=y 677CONFIG_POWER_SUPPLY=y
658# CONFIG_POWER_SUPPLY_DEBUG is not set 678# CONFIG_POWER_SUPPLY_DEBUG is not set
659# CONFIG_PDA_POWER is not set 679# CONFIG_PDA_POWER is not set
660# CONFIG_BATTERY_DS2760 is not set 680# CONFIG_BATTERY_DS2760 is not set
681# CONFIG_BATTERY_DS2782 is not set
661# CONFIG_BATTERY_BQ27x00 is not set 682# CONFIG_BATTERY_BQ27x00 is not set
662# CONFIG_BATTERY_MAX17040 is not set 683# CONFIG_BATTERY_MAX17040 is not set
663# CONFIG_HWMON is not set 684# CONFIG_HWMON is not set
664# CONFIG_THERMAL is not set 685# CONFIG_THERMAL is not set
665# CONFIG_THERMAL_HWMON is not set
666CONFIG_WATCHDOG=y 686CONFIG_WATCHDOG=y
667# CONFIG_WATCHDOG_NOWAYOUT is not set 687# CONFIG_WATCHDOG_NOWAYOUT is not set
668 688
@@ -690,10 +710,24 @@ CONFIG_SSB_POSSIBLE=y
690# CONFIG_MFD_TC6387XB is not set 710# CONFIG_MFD_TC6387XB is not set
691# CONFIG_PMIC_DA903X is not set 711# CONFIG_PMIC_DA903X is not set
692# CONFIG_MFD_WM8400 is not set 712# CONFIG_MFD_WM8400 is not set
713# CONFIG_MFD_WM831X is not set
693# CONFIG_MFD_WM8350_I2C is not set 714# CONFIG_MFD_WM8350_I2C is not set
694# CONFIG_MFD_PCF50633 is not set 715# CONFIG_MFD_PCF50633 is not set
716# CONFIG_MFD_MC13783 is not set
695CONFIG_AB3100_CORE=y 717CONFIG_AB3100_CORE=y
718CONFIG_AB3100_OTP=y
696# CONFIG_EZX_PCAP is not set 719# CONFIG_EZX_PCAP is not set
720CONFIG_REGULATOR=y
721# CONFIG_REGULATOR_DEBUG is not set
722# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
723# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
724# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
725# CONFIG_REGULATOR_BQ24022 is not set
726# CONFIG_REGULATOR_MAX1586 is not set
727# CONFIG_REGULATOR_LP3971 is not set
728CONFIG_REGULATOR_AB3100=y
729# CONFIG_REGULATOR_TPS65023 is not set
730# CONFIG_REGULATOR_TPS6507X is not set
697# CONFIG_MEDIA_SUPPORT is not set 731# CONFIG_MEDIA_SUPPORT is not set
698 732
699# 733#
@@ -792,9 +826,10 @@ CONFIG_MMC_BLOCK_BOUNCE=y
792# 826#
793CONFIG_MMC_ARMMMCI=y 827CONFIG_MMC_ARMMMCI=y
794# CONFIG_MMC_SDHCI is not set 828# CONFIG_MMC_SDHCI is not set
829# CONFIG_MMC_AT91 is not set
830# CONFIG_MMC_ATMELMCI is not set
795# CONFIG_MMC_SPI is not set 831# CONFIG_MMC_SPI is not set
796# CONFIG_MEMSTICK is not set 832# CONFIG_MEMSTICK is not set
797# CONFIG_ACCESSIBILITY is not set
798CONFIG_NEW_LEDS=y 833CONFIG_NEW_LEDS=y
799CONFIG_LEDS_CLASS=y 834CONFIG_LEDS_CLASS=y
800 835
@@ -820,10 +855,10 @@ CONFIG_LEDS_TRIGGER_BACKLIGHT=y
820# 855#
821# iptables trigger is under Netfilter config (LED target) 856# iptables trigger is under Netfilter config (LED target)
822# 857#
858# CONFIG_ACCESSIBILITY is not set
823CONFIG_RTC_LIB=y 859CONFIG_RTC_LIB=y
824CONFIG_RTC_CLASS=y 860CONFIG_RTC_CLASS=y
825CONFIG_RTC_HCTOSYS=y 861# CONFIG_RTC_HCTOSYS is not set
826CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
827# CONFIG_RTC_DEBUG is not set 862# CONFIG_RTC_DEBUG is not set
828 863
829# 864#
@@ -863,6 +898,7 @@ CONFIG_RTC_INTF_DEV=y
863# CONFIG_RTC_DRV_R9701 is not set 898# CONFIG_RTC_DRV_R9701 is not set
864# CONFIG_RTC_DRV_RS5C348 is not set 899# CONFIG_RTC_DRV_RS5C348 is not set
865# CONFIG_RTC_DRV_DS3234 is not set 900# CONFIG_RTC_DRV_DS3234 is not set
901# CONFIG_RTC_DRV_PCF2123 is not set
866 902
867# 903#
868# Platform RTC drivers 904# Platform RTC drivers
@@ -878,27 +914,25 @@ CONFIG_RTC_INTF_DEV=y
878# CONFIG_RTC_DRV_M48T59 is not set 914# CONFIG_RTC_DRV_M48T59 is not set
879# CONFIG_RTC_DRV_BQ4802 is not set 915# CONFIG_RTC_DRV_BQ4802 is not set
880# CONFIG_RTC_DRV_V3020 is not set 916# CONFIG_RTC_DRV_V3020 is not set
917CONFIG_RTC_DRV_AB3100=y
881 918
882# 919#
883# on-CPU RTC drivers 920# on-CPU RTC drivers
884# 921#
885# CONFIG_RTC_DRV_PL030 is not set 922# CONFIG_RTC_DRV_PL030 is not set
886# CONFIG_RTC_DRV_PL031 is not set 923# CONFIG_RTC_DRV_PL031 is not set
924CONFIG_RTC_DRV_COH901331=y
887CONFIG_DMADEVICES=y 925CONFIG_DMADEVICES=y
888 926
889# 927#
890# DMA Devices 928# DMA Devices
891# 929#
892# CONFIG_AUXDISPLAY is not set 930# CONFIG_AUXDISPLAY is not set
893CONFIG_REGULATOR=y
894# CONFIG_REGULATOR_DEBUG is not set
895# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
896# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
897# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
898# CONFIG_REGULATOR_BQ24022 is not set
899# CONFIG_REGULATOR_MAX1586 is not set
900# CONFIG_REGULATOR_LP3971 is not set
901# CONFIG_UIO is not set 931# CONFIG_UIO is not set
932
933#
934# TI VLYNQ
935#
902# CONFIG_STAGING is not set 936# CONFIG_STAGING is not set
903 937
904# 938#
@@ -913,6 +947,7 @@ CONFIG_REGULATOR=y
913# CONFIG_XFS_FS is not set 947# CONFIG_XFS_FS is not set
914# CONFIG_OCFS2_FS is not set 948# CONFIG_OCFS2_FS is not set
915# CONFIG_BTRFS_FS is not set 949# CONFIG_BTRFS_FS is not set
950# CONFIG_NILFS2_FS is not set
916CONFIG_FILE_LOCKING=y 951CONFIG_FILE_LOCKING=y
917CONFIG_FSNOTIFY=y 952CONFIG_FSNOTIFY=y
918# CONFIG_DNOTIFY is not set 953# CONFIG_DNOTIFY is not set
@@ -975,7 +1010,6 @@ CONFIG_MISC_FILESYSTEMS=y
975# CONFIG_ROMFS_FS is not set 1010# CONFIG_ROMFS_FS is not set
976# CONFIG_SYSV_FS is not set 1011# CONFIG_SYSV_FS is not set
977# CONFIG_UFS_FS is not set 1012# CONFIG_UFS_FS is not set
978# CONFIG_NILFS2_FS is not set
979# CONFIG_NETWORK_FILESYSTEMS is not set 1013# CONFIG_NETWORK_FILESYSTEMS is not set
980 1014
981# 1015#
@@ -1033,6 +1067,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
1033CONFIG_ENABLE_MUST_CHECK=y 1067CONFIG_ENABLE_MUST_CHECK=y
1034CONFIG_FRAME_WARN=1024 1068CONFIG_FRAME_WARN=1024
1035# CONFIG_MAGIC_SYSRQ is not set 1069# CONFIG_MAGIC_SYSRQ is not set
1070# CONFIG_STRIP_ASM_SYMS is not set
1036# CONFIG_UNUSED_SYMBOLS is not set 1071# CONFIG_UNUSED_SYMBOLS is not set
1037# CONFIG_DEBUG_FS is not set 1072# CONFIG_DEBUG_FS is not set
1038# CONFIG_HEADERS_CHECK is not set 1073# CONFIG_HEADERS_CHECK is not set
@@ -1066,11 +1101,13 @@ CONFIG_DEBUG_INFO=y
1066# CONFIG_DEBUG_LIST is not set 1101# CONFIG_DEBUG_LIST is not set
1067# CONFIG_DEBUG_SG is not set 1102# CONFIG_DEBUG_SG is not set
1068# CONFIG_DEBUG_NOTIFIERS is not set 1103# CONFIG_DEBUG_NOTIFIERS is not set
1104# CONFIG_DEBUG_CREDENTIALS is not set
1069# CONFIG_BOOT_PRINTK_DELAY is not set 1105# CONFIG_BOOT_PRINTK_DELAY is not set
1070# CONFIG_RCU_TORTURE_TEST is not set 1106# CONFIG_RCU_TORTURE_TEST is not set
1071# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1107# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1072# CONFIG_BACKTRACE_SELF_TEST is not set 1108# CONFIG_BACKTRACE_SELF_TEST is not set
1073# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1109# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1110# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
1074# CONFIG_FAULT_INJECTION is not set 1111# CONFIG_FAULT_INJECTION is not set
1075# CONFIG_LATENCYTOP is not set 1112# CONFIG_LATENCYTOP is not set
1076# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1113# CONFIG_SYSCTL_SYSCALL_CHECK is not set
@@ -1121,6 +1158,7 @@ CONFIG_GENERIC_FIND_LAST_BIT=y
1121# CONFIG_CRC32 is not set 1158# CONFIG_CRC32 is not set
1122# CONFIG_CRC7 is not set 1159# CONFIG_CRC7 is not set
1123# CONFIG_LIBCRC32C is not set 1160# CONFIG_LIBCRC32C is not set
1161CONFIG_GENERIC_ALLOCATOR=y
1124CONFIG_HAS_IOMEM=y 1162CONFIG_HAS_IOMEM=y
1125CONFIG_HAS_IOPORT=y 1163CONFIG_HAS_IOPORT=y
1126CONFIG_HAS_DMA=y 1164CONFIG_HAS_DMA=y
diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h
index 63a481fbbed4..338ff19ae447 100644
--- a/arch/arm/include/asm/bitops.h
+++ b/arch/arm/include/asm/bitops.h
@@ -84,7 +84,7 @@ ____atomic_test_and_set_bit(unsigned int bit, volatile unsigned long *p)
84 *p = res | mask; 84 *p = res | mask;
85 raw_local_irq_restore(flags); 85 raw_local_irq_restore(flags);
86 86
87 return res & mask; 87 return (res & mask) != 0;
88} 88}
89 89
90static inline int 90static inline int
@@ -101,7 +101,7 @@ ____atomic_test_and_clear_bit(unsigned int bit, volatile unsigned long *p)
101 *p = res & ~mask; 101 *p = res & ~mask;
102 raw_local_irq_restore(flags); 102 raw_local_irq_restore(flags);
103 103
104 return res & mask; 104 return (res & mask) != 0;
105} 105}
106 106
107static inline int 107static inline int
@@ -118,7 +118,7 @@ ____atomic_test_and_change_bit(unsigned int bit, volatile unsigned long *p)
118 *p = res ^ mask; 118 *p = res ^ mask;
119 raw_local_irq_restore(flags); 119 raw_local_irq_restore(flags);
120 120
121 return res & mask; 121 return (res & mask) != 0;
122} 122}
123 123
124#include <asm-generic/bitops/non-atomic.h> 124#include <asm-generic/bitops/non-atomic.h>
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index fd03fb63a332..3d0cdd21b882 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -414,9 +414,14 @@ extern void __flush_dcache_page(struct address_space *mapping, struct page *page
414 414
415static inline void __flush_icache_all(void) 415static inline void __flush_icache_all(void)
416{ 416{
417#ifdef CONFIG_ARM_ERRATA_411920
418 extern void v6_icache_inval_all(void);
419 v6_icache_inval_all();
420#else
417 asm("mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache\n" 421 asm("mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache\n"
418 : 422 :
419 : "r" (0)); 423 : "r" (0));
424#endif
420} 425}
421 426
422#define ARCH_HAS_FLUSH_ANON_PAGE 427#define ARCH_HAS_FLUSH_ANON_PAGE
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h
index c3b911ee9151..6aac3f5bb2f3 100644
--- a/arch/arm/include/asm/elf.h
+++ b/arch/arm/include/asm/elf.h
@@ -98,6 +98,9 @@ extern int elf_check_arch(const struct elf32_hdr *);
98extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int); 98extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int);
99#define elf_read_implies_exec(ex,stk) arm_elf_read_implies_exec(&(ex), stk) 99#define elf_read_implies_exec(ex,stk) arm_elf_read_implies_exec(&(ex), stk)
100 100
101int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs);
102#define ELF_CORE_COPY_TASK_REGS dump_task_regs
103
101#define USE_ELF_CORE_DUMP 104#define USE_ELF_CORE_DUMP
102#define ELF_EXEC_PAGESIZE 4096 105#define ELF_EXEC_PAGESIZE 4096
103 106
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index a45ab5dd8255..c2f1605de359 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -350,7 +350,7 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
350 if (tlb_flag(TLB_WB)) 350 if (tlb_flag(TLB_WB))
351 dsb(); 351 dsb();
352 352
353 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm))) { 353 if (cpumask_test_cpu(get_cpu(), mm_cpumask(mm))) {
354 if (tlb_flag(TLB_V3_FULL)) 354 if (tlb_flag(TLB_V3_FULL))
355 asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero) : "cc"); 355 asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero) : "cc");
356 if (tlb_flag(TLB_V4_U_FULL)) 356 if (tlb_flag(TLB_V4_U_FULL))
@@ -360,6 +360,7 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
360 if (tlb_flag(TLB_V4_I_FULL)) 360 if (tlb_flag(TLB_V4_I_FULL))
361 asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc"); 361 asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
362 } 362 }
363 put_cpu();
363 364
364 if (tlb_flag(TLB_V6_U_ASID)) 365 if (tlb_flag(TLB_V6_U_ASID))
365 asm("mcr p15, 0, %0, c8, c7, 2" : : "r" (asid) : "cc"); 366 asm("mcr p15, 0, %0, c8, c7, 2" : : "r" (asid) : "cc");
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 322410be573c..0022b4d57f8b 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -608,33 +608,33 @@ call_fpe:
608 THUMB( add pc, r8 ) 608 THUMB( add pc, r8 )
609 nop 609 nop
610 610
611 W(mov) pc, lr @ CP#0 611 movw_pc lr @ CP#0
612 W(b) do_fpe @ CP#1 (FPE) 612 W(b) do_fpe @ CP#1 (FPE)
613 W(b) do_fpe @ CP#2 (FPE) 613 W(b) do_fpe @ CP#2 (FPE)
614 W(mov) pc, lr @ CP#3 614 movw_pc lr @ CP#3
615#ifdef CONFIG_CRUNCH 615#ifdef CONFIG_CRUNCH
616 b crunch_task_enable @ CP#4 (MaverickCrunch) 616 b crunch_task_enable @ CP#4 (MaverickCrunch)
617 b crunch_task_enable @ CP#5 (MaverickCrunch) 617 b crunch_task_enable @ CP#5 (MaverickCrunch)
618 b crunch_task_enable @ CP#6 (MaverickCrunch) 618 b crunch_task_enable @ CP#6 (MaverickCrunch)
619#else 619#else
620 W(mov) pc, lr @ CP#4 620 movw_pc lr @ CP#4
621 W(mov) pc, lr @ CP#5 621 movw_pc lr @ CP#5
622 W(mov) pc, lr @ CP#6 622 movw_pc lr @ CP#6
623#endif 623#endif
624 W(mov) pc, lr @ CP#7 624 movw_pc lr @ CP#7
625 W(mov) pc, lr @ CP#8 625 movw_pc lr @ CP#8
626 W(mov) pc, lr @ CP#9 626 movw_pc lr @ CP#9
627#ifdef CONFIG_VFP 627#ifdef CONFIG_VFP
628 W(b) do_vfp @ CP#10 (VFP) 628 W(b) do_vfp @ CP#10 (VFP)
629 W(b) do_vfp @ CP#11 (VFP) 629 W(b) do_vfp @ CP#11 (VFP)
630#else 630#else
631 W(mov) pc, lr @ CP#10 (VFP) 631 movw_pc lr @ CP#10 (VFP)
632 W(mov) pc, lr @ CP#11 (VFP) 632 movw_pc lr @ CP#11 (VFP)
633#endif 633#endif
634 W(mov) pc, lr @ CP#12 634 movw_pc lr @ CP#12
635 W(mov) pc, lr @ CP#13 635 movw_pc lr @ CP#13
636 W(mov) pc, lr @ CP#14 (Debug) 636 movw_pc lr @ CP#14 (Debug)
637 W(mov) pc, lr @ CP#15 (Control) 637 movw_pc lr @ CP#15 (Control)
638 638
639#ifdef CONFIG_NEON 639#ifdef CONFIG_NEON
640 .align 6 640 .align 6
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
index ac34c0d9384b..7e9ed1eea40a 100644
--- a/arch/arm/kernel/entry-header.S
+++ b/arch/arm/kernel/entry-header.S
@@ -110,6 +110,13 @@
110 mov \rd, sp, lsr #13 110 mov \rd, sp, lsr #13
111 mov \rd, \rd, lsl #13 111 mov \rd, \rd, lsl #13
112 .endm 112 .endm
113
114 @
115 @ 32-bit wide "mov pc, reg"
116 @
117 .macro movw_pc, reg
118 mov pc, \reg
119 .endm
113#else /* CONFIG_THUMB2_KERNEL */ 120#else /* CONFIG_THUMB2_KERNEL */
114 .macro svc_exit, rpsr 121 .macro svc_exit, rpsr
115 clrex @ clear the exclusive monitor 122 clrex @ clear the exclusive monitor
@@ -146,6 +153,14 @@
146 lsr \rd, \rd, #13 153 lsr \rd, \rd, #13
147 mov \rd, \rd, lsl #13 154 mov \rd, \rd, lsl #13
148 .endm 155 .endm
156
157 @
158 @ 32-bit wide "mov pc, reg"
159 @
160 .macro movw_pc, reg
161 mov pc, \reg
162 nop
163 .endm
149#endif /* !CONFIG_THUMB2_KERNEL */ 164#endif /* !CONFIG_THUMB2_KERNEL */
150 165
151/* 166/*
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 790fbee92ec5..0d96d0171c05 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -328,6 +328,15 @@ copy_thread(unsigned long clone_flags, unsigned long stack_start,
328} 328}
329 329
330/* 330/*
331 * Fill in the task's elfregs structure for a core dump.
332 */
333int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs)
334{
335 elf_core_copy_regs(elfregs, task_pt_regs(t));
336 return 1;
337}
338
339/*
331 * fill in the fpe structure for a core dump... 340 * fill in the fpe structure for a core dump...
332 */ 341 */
333int dump_fpu (struct pt_regs *regs, struct user_fp *fp) 342int dump_fpu (struct pt_regs *regs, struct user_fp *fp)
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index 1423a3419789..2a573d4fea24 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/arch/arm/kernel/signal.c 2 * linux/arch/arm/kernel/signal.c
3 * 3 *
4 * Copyright (C) 1995-2002 Russell King 4 * Copyright (C) 1995-2009 Russell King
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
@@ -29,6 +29,7 @@
29 */ 29 */
30#define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)) 30#define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE))
31#define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)) 31#define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE))
32#define SWI_SYS_RESTART (0xef000000|__NR_restart_syscall|__NR_OABI_SYSCALL_BASE)
32 33
33/* 34/*
34 * With EABI, the syscall number has to be loaded into r7. 35 * With EABI, the syscall number has to be loaded into r7.
@@ -49,6 +50,18 @@ const unsigned long sigreturn_codes[7] = {
49}; 50};
50 51
51/* 52/*
53 * Either we support OABI only, or we have EABI with the OABI
54 * compat layer enabled. In the later case we don't know if
55 * user space is EABI or not, and if not we must not clobber r7.
56 * Always using the OABI syscall solves that issue and works for
57 * all those cases.
58 */
59const unsigned long syscall_restart_code[2] = {
60 SWI_SYS_RESTART, /* swi __NR_restart_syscall */
61 0xe49df004, /* ldr pc, [sp], #4 */
62};
63
64/*
52 * atomically swap in the new signal mask, and wait for a signal. 65 * atomically swap in the new signal mask, and wait for a signal.
53 */ 66 */
54asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask) 67asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask)
@@ -645,32 +658,12 @@ static void do_signal(struct pt_regs *regs, int syscall)
645 regs->ARM_pc -= 4; 658 regs->ARM_pc -= 4;
646#else 659#else
647 u32 __user *usp; 660 u32 __user *usp;
648 u32 swival = __NR_restart_syscall;
649 661
650 regs->ARM_sp -= 12; 662 regs->ARM_sp -= 4;
651 usp = (u32 __user *)regs->ARM_sp; 663 usp = (u32 __user *)regs->ARM_sp;
652 664
653 /* 665 put_user(regs->ARM_pc, usp);
654 * Either we supports OABI only, or we have 666 regs->ARM_pc = KERN_RESTART_CODE;
655 * EABI with the OABI compat layer enabled.
656 * In the later case we don't know if user
657 * space is EABI or not, and if not we must
658 * not clobber r7. Always using the OABI
659 * syscall solves that issue and works for
660 * all those cases.
661 */
662 swival = swival - __NR_SYSCALL_BASE + __NR_OABI_SYSCALL_BASE;
663
664 put_user(regs->ARM_pc, &usp[0]);
665 /* swi __NR_restart_syscall */
666 put_user(0xef000000 | swival, &usp[1]);
667 /* ldr pc, [sp], #12 */
668 put_user(0xe49df00c, &usp[2]);
669
670 flush_icache_range((unsigned long)usp,
671 (unsigned long)(usp + 3));
672
673 regs->ARM_pc = regs->ARM_sp + 4;
674#endif 667#endif
675 } 668 }
676 } 669 }
diff --git a/arch/arm/kernel/signal.h b/arch/arm/kernel/signal.h
index 27beece15502..6fcfe8398aa4 100644
--- a/arch/arm/kernel/signal.h
+++ b/arch/arm/kernel/signal.h
@@ -1,12 +1,14 @@
1/* 1/*
2 * linux/arch/arm/kernel/signal.h 2 * linux/arch/arm/kernel/signal.h
3 * 3 *
4 * Copyright (C) 2005 Russell King. 4 * Copyright (C) 2005-2009 Russell King.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500) 10#define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500)
11#define KERN_RESTART_CODE (KERN_SIGRETURN_CODE + sizeof(sigreturn_codes))
11 12
12extern const unsigned long sigreturn_codes[7]; 13extern const unsigned long sigreturn_codes[7];
14extern const unsigned long syscall_restart_code[2];
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 467b69ed1021..95718a6b50a6 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/arch/arm/kernel/traps.c 2 * linux/arch/arm/kernel/traps.c
3 * 3 *
4 * Copyright (C) 1995-2002 Russell King 4 * Copyright (C) 1995-2009 Russell King
5 * Fragments that appear the same as linux/arch/i386/kernel/traps.c (C) Linus Torvalds 5 * Fragments that appear the same as linux/arch/i386/kernel/traps.c (C) Linus Torvalds
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
@@ -45,21 +45,21 @@ static int __init user_debug_setup(char *str)
45__setup("user_debug=", user_debug_setup); 45__setup("user_debug=", user_debug_setup);
46#endif 46#endif
47 47
48static void dump_mem(const char *str, unsigned long bottom, unsigned long top); 48static void dump_mem(const char *, const char *, unsigned long, unsigned long);
49 49
50void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame) 50void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame)
51{ 51{
52#ifdef CONFIG_KALLSYMS 52#ifdef CONFIG_KALLSYMS
53 printk("[<%08lx>] ", where); 53 char sym1[KSYM_SYMBOL_LEN], sym2[KSYM_SYMBOL_LEN];
54 print_symbol("(%s) ", where); 54 sprint_symbol(sym1, where);
55 printk("from [<%08lx>] ", from); 55 sprint_symbol(sym2, from);
56 print_symbol("(%s)\n", from); 56 printk("[<%08lx>] (%s) from [<%08lx>] (%s)\n", where, sym1, from, sym2);
57#else 57#else
58 printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from); 58 printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from);
59#endif 59#endif
60 60
61 if (in_exception_text(where)) 61 if (in_exception_text(where))
62 dump_mem("Exception stack", frame + 4, frame + 4 + sizeof(struct pt_regs)); 62 dump_mem("", "Exception stack", frame + 4, frame + 4 + sizeof(struct pt_regs));
63} 63}
64 64
65#ifndef CONFIG_ARM_UNWIND 65#ifndef CONFIG_ARM_UNWIND
@@ -81,9 +81,10 @@ static int verify_stack(unsigned long sp)
81/* 81/*
82 * Dump out the contents of some memory nicely... 82 * Dump out the contents of some memory nicely...
83 */ 83 */
84static void dump_mem(const char *str, unsigned long bottom, unsigned long top) 84static void dump_mem(const char *lvl, const char *str, unsigned long bottom,
85 unsigned long top)
85{ 86{
86 unsigned long p = bottom & ~31; 87 unsigned long first;
87 mm_segment_t fs; 88 mm_segment_t fs;
88 int i; 89 int i;
89 90
@@ -95,33 +96,37 @@ static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
95 fs = get_fs(); 96 fs = get_fs();
96 set_fs(KERNEL_DS); 97 set_fs(KERNEL_DS);
97 98
98 printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top); 99 printk("%s%s(0x%08lx to 0x%08lx)\n", lvl, str, bottom, top);
99 100
100 for (p = bottom & ~31; p < top;) { 101 for (first = bottom & ~31; first < top; first += 32) {
101 printk("%04lx: ", p & 0xffff); 102 unsigned long p;
103 char str[sizeof(" 12345678") * 8 + 1];
102 104
103 for (i = 0; i < 8; i++, p += 4) { 105 memset(str, ' ', sizeof(str));
104 unsigned int val; 106 str[sizeof(str) - 1] = '\0';
105 107
106 if (p < bottom || p >= top) 108 for (p = first, i = 0; i < 8 && p < top; i++, p += 4) {
107 printk(" "); 109 if (p >= bottom && p < top) {
108 else { 110 unsigned long val;
109 __get_user(val, (unsigned long *)p); 111 if (__get_user(val, (unsigned long *)p) == 0)
110 printk("%08x ", val); 112 sprintf(str + i * 9, " %08lx", val);
113 else
114 sprintf(str + i * 9, " ????????");
111 } 115 }
112 } 116 }
113 printk ("\n"); 117 printk("%s%04lx:%s\n", lvl, first & 0xffff, str);
114 } 118 }
115 119
116 set_fs(fs); 120 set_fs(fs);
117} 121}
118 122
119static void dump_instr(struct pt_regs *regs) 123static void dump_instr(const char *lvl, struct pt_regs *regs)
120{ 124{
121 unsigned long addr = instruction_pointer(regs); 125 unsigned long addr = instruction_pointer(regs);
122 const int thumb = thumb_mode(regs); 126 const int thumb = thumb_mode(regs);
123 const int width = thumb ? 4 : 8; 127 const int width = thumb ? 4 : 8;
124 mm_segment_t fs; 128 mm_segment_t fs;
129 char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
125 int i; 130 int i;
126 131
127 /* 132 /*
@@ -132,7 +137,6 @@ static void dump_instr(struct pt_regs *regs)
132 fs = get_fs(); 137 fs = get_fs();
133 set_fs(KERNEL_DS); 138 set_fs(KERNEL_DS);
134 139
135 printk("Code: ");
136 for (i = -4; i < 1; i++) { 140 for (i = -4; i < 1; i++) {
137 unsigned int val, bad; 141 unsigned int val, bad;
138 142
@@ -142,13 +146,14 @@ static void dump_instr(struct pt_regs *regs)
142 bad = __get_user(val, &((u32 *)addr)[i]); 146 bad = __get_user(val, &((u32 *)addr)[i]);
143 147
144 if (!bad) 148 if (!bad)
145 printk(i == 0 ? "(%0*x) " : "%0*x ", width, val); 149 p += sprintf(p, i == 0 ? "(%0*x) " : "%0*x ",
150 width, val);
146 else { 151 else {
147 printk("bad PC value."); 152 p += sprintf(p, "bad PC value");
148 break; 153 break;
149 } 154 }
150 } 155 }
151 printk("\n"); 156 printk("%sCode: %s\n", lvl, str);
152 157
153 set_fs(fs); 158 set_fs(fs);
154} 159}
@@ -224,18 +229,19 @@ static void __die(const char *str, int err, struct thread_info *thread, struct p
224 struct task_struct *tsk = thread->task; 229 struct task_struct *tsk = thread->task;
225 static int die_counter; 230 static int die_counter;
226 231
227 printk("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n", 232 printk(KERN_EMERG "Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
228 str, err, ++die_counter); 233 str, err, ++die_counter);
234 sysfs_printk_last_file();
229 print_modules(); 235 print_modules();
230 __show_regs(regs); 236 __show_regs(regs);
231 printk("Process %s (pid: %d, stack limit = 0x%p)\n", 237 printk(KERN_EMERG "Process %.*s (pid: %d, stack limit = 0x%p)\n",
232 tsk->comm, task_pid_nr(tsk), thread + 1); 238 TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), thread + 1);
233 239
234 if (!user_mode(regs) || in_interrupt()) { 240 if (!user_mode(regs) || in_interrupt()) {
235 dump_mem("Stack: ", regs->ARM_sp, 241 dump_mem(KERN_EMERG, "Stack: ", regs->ARM_sp,
236 THREAD_SIZE + (unsigned long)task_stack_page(tsk)); 242 THREAD_SIZE + (unsigned long)task_stack_page(tsk));
237 dump_backtrace(regs, tsk); 243 dump_backtrace(regs, tsk);
238 dump_instr(regs); 244 dump_instr(KERN_EMERG, regs);
239 } 245 }
240} 246}
241 247
@@ -250,13 +256,14 @@ NORET_TYPE void die(const char *str, struct pt_regs *regs, int err)
250 256
251 oops_enter(); 257 oops_enter();
252 258
253 console_verbose();
254 spin_lock_irq(&die_lock); 259 spin_lock_irq(&die_lock);
260 console_verbose();
255 bust_spinlocks(1); 261 bust_spinlocks(1);
256 __die(str, err, thread, regs); 262 __die(str, err, thread, regs);
257 bust_spinlocks(0); 263 bust_spinlocks(0);
258 add_taint(TAINT_DIE); 264 add_taint(TAINT_DIE);
259 spin_unlock_irq(&die_lock); 265 spin_unlock_irq(&die_lock);
266 oops_exit();
260 267
261 if (in_interrupt()) 268 if (in_interrupt())
262 panic("Fatal exception in interrupt"); 269 panic("Fatal exception in interrupt");
@@ -264,7 +271,6 @@ NORET_TYPE void die(const char *str, struct pt_regs *regs, int err)
264 if (panic_on_oops) 271 if (panic_on_oops)
265 panic("Fatal exception"); 272 panic("Fatal exception");
266 273
267 oops_exit();
268 do_exit(SIGSEGV); 274 do_exit(SIGSEGV);
269} 275}
270 276
@@ -349,7 +355,7 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
349 if (user_debug & UDBG_UNDEFINED) { 355 if (user_debug & UDBG_UNDEFINED) {
350 printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n", 356 printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n",
351 current->comm, task_pid_nr(current), pc); 357 current->comm, task_pid_nr(current), pc);
352 dump_instr(regs); 358 dump_instr(KERN_INFO, regs);
353 } 359 }
354#endif 360#endif
355 361
@@ -400,7 +406,7 @@ static int bad_syscall(int n, struct pt_regs *regs)
400 if (user_debug & UDBG_SYSCALL) { 406 if (user_debug & UDBG_SYSCALL) {
401 printk(KERN_ERR "[%d] %s: obsolete system call %08x.\n", 407 printk(KERN_ERR "[%d] %s: obsolete system call %08x.\n",
402 task_pid_nr(current), current->comm, n); 408 task_pid_nr(current), current->comm, n);
403 dump_instr(regs); 409 dump_instr(KERN_ERR, regs);
404 } 410 }
405#endif 411#endif
406 412
@@ -579,7 +585,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
579 if (user_debug & UDBG_SYSCALL) { 585 if (user_debug & UDBG_SYSCALL) {
580 printk("[%d] %s: arm syscall %d\n", 586 printk("[%d] %s: arm syscall %d\n",
581 task_pid_nr(current), current->comm, no); 587 task_pid_nr(current), current->comm, no);
582 dump_instr(regs); 588 dump_instr("", regs);
583 if (user_mode(regs)) { 589 if (user_mode(regs)) {
584 __show_regs(regs); 590 __show_regs(regs);
585 c_backtrace(regs->ARM_fp, processor_mode(regs)); 591 c_backtrace(regs->ARM_fp, processor_mode(regs));
@@ -656,7 +662,7 @@ baddataabort(int code, unsigned long instr, struct pt_regs *regs)
656 if (user_debug & UDBG_BADABORT) { 662 if (user_debug & UDBG_BADABORT) {
657 printk(KERN_ERR "[%d] %s: bad data abort: code %d instr 0x%08lx\n", 663 printk(KERN_ERR "[%d] %s: bad data abort: code %d instr 0x%08lx\n",
658 task_pid_nr(current), current->comm, code, instr); 664 task_pid_nr(current), current->comm, code, instr);
659 dump_instr(regs); 665 dump_instr(KERN_ERR, regs);
660 show_pte(current->mm, addr); 666 show_pte(current->mm, addr);
661 } 667 }
662#endif 668#endif
@@ -745,6 +751,8 @@ void __init early_trap_init(void)
745 */ 751 */
746 memcpy((void *)KERN_SIGRETURN_CODE, sigreturn_codes, 752 memcpy((void *)KERN_SIGRETURN_CODE, sigreturn_codes,
747 sizeof(sigreturn_codes)); 753 sizeof(sigreturn_codes));
754 memcpy((void *)KERN_RESTART_CODE, syscall_restart_code,
755 sizeof(syscall_restart_code));
748 756
749 flush_icache_range(vectors, vectors + PAGE_SIZE); 757 flush_icache_range(vectors, vectors + PAGE_SIZE);
750 modify_domain(DOMAIN_USER, DOMAIN_CLIENT); 758 modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c
index 39baf1128bfa..786ac2b6914a 100644
--- a/arch/arm/kernel/unwind.c
+++ b/arch/arm/kernel/unwind.c
@@ -26,6 +26,15 @@
26 * http://infocenter.arm.com/help/topic/com.arm.doc.subset.swdev.abi/index.html 26 * http://infocenter.arm.com/help/topic/com.arm.doc.subset.swdev.abi/index.html
27 */ 27 */
28 28
29#if !defined (__ARM_EABI__)
30#warning Your compiler does not have EABI support.
31#warning ARM unwind is known to compile only with EABI compilers.
32#warning Change compiler or disable ARM_UNWIND option.
33#elif (__GNUC__ == 4 && __GNUC_MINOR__ <= 2)
34#warning Your compiler is too buggy; it is known to not compile ARM unwind support.
35#warning Change compiler or disable ARM_UNWIND option.
36#endif
37
29#include <linux/kernel.h> 38#include <linux/kernel.h>
30#include <linux/init.h> 39#include <linux/init.h>
31#include <linux/module.h> 40#include <linux/module.h>
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index d581cff80c4c..332b784050b2 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -838,7 +838,7 @@ static void __init at91_add_device_rtt(void)
838 * Watchdog 838 * Watchdog
839 * -------------------------------------------------------------------- */ 839 * -------------------------------------------------------------------- */
840 840
841#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) 841#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
842static struct platform_device at91sam9g45_wdt_device = { 842static struct platform_device at91sam9g45_wdt_device = {
843 .name = "at91_wdt", 843 .name = "at91_wdt",
844 .id = -1, 844 .id = -1,
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index 34a9502c48bc..c22df30ed5e5 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -25,6 +25,8 @@
25#define ARCH_ID_AT91SAM9G20 0x019905a0 25#define ARCH_ID_AT91SAM9G20 0x019905a0
26#define ARCH_ID_AT91SAM9RL64 0x019b03a0 26#define ARCH_ID_AT91SAM9RL64 0x019b03a0
27#define ARCH_ID_AT91SAM9G45 0x819b05a0 27#define ARCH_ID_AT91SAM9G45 0x819b05a0
28#define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */
29#define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */
28#define ARCH_ID_AT91CAP9 0x039A03A0 30#define ARCH_ID_AT91CAP9 0x039A03A0
29 31
30#define ARCH_ID_AT91SAM9XE128 0x329973a0 32#define ARCH_ID_AT91SAM9XE128 0x329973a0
@@ -41,6 +43,11 @@ static inline unsigned long at91_cpu_identify(void)
41 return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION); 43 return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION);
42} 44}
43 45
46static inline unsigned long at91_cpu_fully_identify(void)
47{
48 return at91_sys_read(AT91_DBGU_CIDR);
49}
50
44#define ARCH_EXID_AT91SAM9M11 0x00000001 51#define ARCH_EXID_AT91SAM9M11 0x00000001
45#define ARCH_EXID_AT91SAM9M10 0x00000002 52#define ARCH_EXID_AT91SAM9M10 0x00000002
46#define ARCH_EXID_AT91SAM9G45 0x00000004 53#define ARCH_EXID_AT91SAM9G45 0x00000004
@@ -118,8 +125,10 @@ static inline unsigned long at91cap9_rev_identify(void)
118 125
119#ifdef CONFIG_ARCH_AT91SAM9G45 126#ifdef CONFIG_ARCH_AT91SAM9G45
120#define cpu_is_at91sam9g45() (at91_cpu_identify() == ARCH_ID_AT91SAM9G45) 127#define cpu_is_at91sam9g45() (at91_cpu_identify() == ARCH_ID_AT91SAM9G45)
128#define cpu_is_at91sam9g45es() (at91_cpu_fully_identify() == ARCH_ID_AT91SAM9G45ES)
121#else 129#else
122#define cpu_is_at91sam9g45() (0) 130#define cpu_is_at91sam9g45() (0)
131#define cpu_is_at91sam9g45es() (0)
123#endif 132#endif
124 133
125#ifdef CONFIG_ARCH_AT91CAP9 134#ifdef CONFIG_ARCH_AT91CAP9
diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c
index 4b4f69251b31..e590bbe0a7b4 100644
--- a/arch/arm/mach-bcmring/core.c
+++ b/arch/arm/mach-bcmring/core.c
@@ -271,12 +271,12 @@ static struct irqaction bcmring_timer_irq = {
271 .handler = bcmring_timer_interrupt, 271 .handler = bcmring_timer_interrupt,
272}; 272};
273 273
274static cycle_t bcmring_get_cycles_timer1(void) 274static cycle_t bcmring_get_cycles_timer1(struct clocksource *cs)
275{ 275{
276 return ~readl(TIMER1_VA_BASE + TIMER_VALUE); 276 return ~readl(TIMER1_VA_BASE + TIMER_VALUE);
277} 277}
278 278
279static cycle_t bcmring_get_cycles_timer3(void) 279static cycle_t bcmring_get_cycles_timer3(struct clocksource *cs)
280{ 280{
281 return ~readl(TIMER3_VA_BASE + TIMER_VALUE); 281 return ~readl(TIMER3_VA_BASE + TIMER_VALUE);
282} 282}
diff --git a/arch/arm/mach-bcmring/include/mach/system.h b/arch/arm/mach-bcmring/include/mach/system.h
index cdbf93c694a6..38b37060d426 100644
--- a/arch/arm/mach-bcmring/include/mach/system.h
+++ b/arch/arm/mach-bcmring/include/mach/system.h
@@ -29,7 +29,7 @@ static inline void arch_idle(void)
29 cpu_do_idle(); 29 cpu_do_idle();
30} 30}
31 31
32static inline void arch_reset(char mode, char *cmd) 32static inline void arch_reset(char mode, const char *cmd)
33{ 33{
34 printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot); 34 printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot);
35 35
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
index d7291c682a64..9167c3d2a5ed 100644
--- a/arch/arm/mach-ep93xx/Kconfig
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -17,13 +17,31 @@ config EP93XX_SDCE3_SYNC_PHYS_OFFSET
17 bool "0x00000000 - SDCE3/SyncBoot" 17 bool "0x00000000 - SDCE3/SyncBoot"
18 help 18 help
19 Select this option if you want support for EP93xx boards with the 19 Select this option if you want support for EP93xx boards with the
20 first SDRAM bank at 0x00000000 20 first SDRAM bank at 0x00000000.
21 21
22config EP93XX_SDCE0_PHYS_OFFSET 22config EP93XX_SDCE0_PHYS_OFFSET
23 bool "0xc0000000 - SDCEO" 23 bool "0xc0000000 - SDCEO"
24 help 24 help
25 Select this option if you want support for EP93xx boards with the 25 Select this option if you want support for EP93xx boards with the
26 first SDRAM bank at 0xc0000000 26 first SDRAM bank at 0xc0000000.
27
28config EP93XX_SDCE1_PHYS_OFFSET
29 bool "0xd0000000 - SDCE1"
30 help
31 Select this option if you want support for EP93xx boards with the
32 first SDRAM bank at 0xd0000000.
33
34config EP93XX_SDCE2_PHYS_OFFSET
35 bool "0xe0000000 - SDCE2"
36 help
37 Select this option if you want support for EP93xx boards with the
38 first SDRAM bank at 0xe0000000.
39
40config EP93XX_SDCE3_ASYNC_PHYS_OFFSET
41 bool "0xf0000000 - SDCE3/AsyncBoot"
42 help
43 Select this option if you want support for EP93xx boards with the
44 first SDRAM bank at 0xf0000000.
27 45
28endchoice 46endchoice
29 47
@@ -112,28 +130,36 @@ config MACH_MICRO9
112 bool 130 bool
113 131
114config MACH_MICRO9H 132config MACH_MICRO9H
115 bool "Support Contec Hypercontrol Micro9-H" 133 bool "Support Contec Micro9-High"
116 depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET 134 depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET
117 select MACH_MICRO9 135 select MACH_MICRO9
118 help 136 help
119 Say 'Y' here if you want your kernel to support the 137 Say 'Y' here if you want your kernel to support the
120 Contec Hypercontrol Micro9-H board. 138 Contec Micro9-High board.
121 139
122config MACH_MICRO9M 140config MACH_MICRO9M
123 bool "Support Contec Hypercontrol Micro9-M" 141 bool "Support Contec Micro9-Mid"
124 depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET 142 depends on EP93XX_SDCE3_ASYNC_PHYS_OFFSET
125 select MACH_MICRO9 143 select MACH_MICRO9
126 help 144 help
127 Say 'Y' here if you want your kernel to support the 145 Say 'Y' here if you want your kernel to support the
128 Contec Hypercontrol Micro9-M board. 146 Contec Micro9-Mid board.
129 147
130config MACH_MICRO9L 148config MACH_MICRO9L
131 bool "Support Contec Hypercontrol Micro9-L" 149 bool "Support Contec Micro9-Lite"
132 depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET 150 depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET
133 select MACH_MICRO9 151 select MACH_MICRO9
134 help 152 help
135 Say 'Y' here if you want your kernel to support the 153 Say 'Y' here if you want your kernel to support the
136 Contec Hypercontrol Micro9-L board. 154 Contec Micro9-Lite board.
155
156config MACH_MICRO9S
157 bool "Support Contec Micro9-Slim"
158 depends on EP93XX_SDCE3_ASYNC_PHYS_OFFSET
159 select MACH_MICRO9
160 help
161 Say 'Y' here if you want your kernel to support the
162 Contec Micro9-Slim board.
137 163
138config MACH_TS72XX 164config MACH_TS72XX
139 bool "Support Technologic Systems TS-72xx SBC" 165 bool "Support Technologic Systems TS-72xx SBC"
diff --git a/arch/arm/mach-ep93xx/Makefile.boot b/arch/arm/mach-ep93xx/Makefile.boot
index 27a085a8f12a..0ad33f15c622 100644
--- a/arch/arm/mach-ep93xx/Makefile.boot
+++ b/arch/arm/mach-ep93xx/Makefile.boot
@@ -3,3 +3,12 @@ params_phys-$(CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET) := 0x00000100
3 3
4 zreladdr-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) := 0xc0008000 4 zreladdr-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) := 0xc0008000
5params_phys-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) := 0xc0000100 5params_phys-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) := 0xc0000100
6
7 zreladdr-$(CONFIG_EP93XX_SDCE1_PHYS_OFFSET) := 0xd0008000
8params_phys-$(CONFIG_EP93XX_SDCE1_PHYS_OFFSET) := 0xd0000100
9
10 zreladdr-$(CONFIG_EP93XX_SDCE2_PHYS_OFFSET) := 0xe0008000
11params_phys-$(CONFIG_EP93XX_SDCE2_PHYS_OFFSET) := 0xe0000100
12
13 zreladdr-$(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET) := 0xf0008000
14params_phys-$(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET) := 0xf0000100
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index dda19cd76194..1d0f9d8aff2e 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -16,13 +16,16 @@
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/string.h> 17#include <linux/string.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/spinlock.h>
20
21#include <mach/hardware.h>
19 22
20#include <asm/clkdev.h> 23#include <asm/clkdev.h>
21#include <asm/div64.h> 24#include <asm/div64.h>
22#include <mach/hardware.h>
23 25
24 26
25struct clk { 27struct clk {
28 struct clk *parent;
26 unsigned long rate; 29 unsigned long rate;
27 int users; 30 int users;
28 int sw_locked; 31 int sw_locked;
@@ -39,40 +42,60 @@ static unsigned long get_uart_rate(struct clk *clk);
39static int set_keytchclk_rate(struct clk *clk, unsigned long rate); 42static int set_keytchclk_rate(struct clk *clk, unsigned long rate);
40static int set_div_rate(struct clk *clk, unsigned long rate); 43static int set_div_rate(struct clk *clk, unsigned long rate);
41 44
45
46static struct clk clk_xtali = {
47 .rate = EP93XX_EXT_CLK_RATE,
48};
42static struct clk clk_uart1 = { 49static struct clk clk_uart1 = {
50 .parent = &clk_xtali,
43 .sw_locked = 1, 51 .sw_locked = 1,
44 .enable_reg = EP93XX_SYSCON_DEVCFG, 52 .enable_reg = EP93XX_SYSCON_DEVCFG,
45 .enable_mask = EP93XX_SYSCON_DEVCFG_U1EN, 53 .enable_mask = EP93XX_SYSCON_DEVCFG_U1EN,
46 .get_rate = get_uart_rate, 54 .get_rate = get_uart_rate,
47}; 55};
48static struct clk clk_uart2 = { 56static struct clk clk_uart2 = {
57 .parent = &clk_xtali,
49 .sw_locked = 1, 58 .sw_locked = 1,
50 .enable_reg = EP93XX_SYSCON_DEVCFG, 59 .enable_reg = EP93XX_SYSCON_DEVCFG,
51 .enable_mask = EP93XX_SYSCON_DEVCFG_U2EN, 60 .enable_mask = EP93XX_SYSCON_DEVCFG_U2EN,
52 .get_rate = get_uart_rate, 61 .get_rate = get_uart_rate,
53}; 62};
54static struct clk clk_uart3 = { 63static struct clk clk_uart3 = {
64 .parent = &clk_xtali,
55 .sw_locked = 1, 65 .sw_locked = 1,
56 .enable_reg = EP93XX_SYSCON_DEVCFG, 66 .enable_reg = EP93XX_SYSCON_DEVCFG,
57 .enable_mask = EP93XX_SYSCON_DEVCFG_U3EN, 67 .enable_mask = EP93XX_SYSCON_DEVCFG_U3EN,
58 .get_rate = get_uart_rate, 68 .get_rate = get_uart_rate,
59}; 69};
60static struct clk clk_pll1; 70static struct clk clk_pll1 = {
61static struct clk clk_f; 71 .parent = &clk_xtali,
62static struct clk clk_h; 72};
63static struct clk clk_p; 73static struct clk clk_f = {
64static struct clk clk_pll2; 74 .parent = &clk_pll1,
75};
76static struct clk clk_h = {
77 .parent = &clk_pll1,
78};
79static struct clk clk_p = {
80 .parent = &clk_pll1,
81};
82static struct clk clk_pll2 = {
83 .parent = &clk_xtali,
84};
65static struct clk clk_usb_host = { 85static struct clk clk_usb_host = {
86 .parent = &clk_pll2,
66 .enable_reg = EP93XX_SYSCON_PWRCNT, 87 .enable_reg = EP93XX_SYSCON_PWRCNT,
67 .enable_mask = EP93XX_SYSCON_PWRCNT_USH_EN, 88 .enable_mask = EP93XX_SYSCON_PWRCNT_USH_EN,
68}; 89};
69static struct clk clk_keypad = { 90static struct clk clk_keypad = {
91 .parent = &clk_xtali,
70 .sw_locked = 1, 92 .sw_locked = 1,
71 .enable_reg = EP93XX_SYSCON_KEYTCHCLKDIV, 93 .enable_reg = EP93XX_SYSCON_KEYTCHCLKDIV,
72 .enable_mask = EP93XX_SYSCON_KEYTCHCLKDIV_KEN, 94 .enable_mask = EP93XX_SYSCON_KEYTCHCLKDIV_KEN,
73 .set_rate = set_keytchclk_rate, 95 .set_rate = set_keytchclk_rate,
74}; 96};
75static struct clk clk_pwm = { 97static struct clk clk_pwm = {
98 .parent = &clk_xtali,
76 .rate = EP93XX_EXT_CLK_RATE, 99 .rate = EP93XX_EXT_CLK_RATE,
77}; 100};
78 101
@@ -85,50 +108,62 @@ static struct clk clk_video = {
85 108
86/* DMA Clocks */ 109/* DMA Clocks */
87static struct clk clk_m2p0 = { 110static struct clk clk_m2p0 = {
111 .parent = &clk_h,
88 .enable_reg = EP93XX_SYSCON_PWRCNT, 112 .enable_reg = EP93XX_SYSCON_PWRCNT,
89 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P0, 113 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P0,
90}; 114};
91static struct clk clk_m2p1 = { 115static struct clk clk_m2p1 = {
116 .parent = &clk_h,
92 .enable_reg = EP93XX_SYSCON_PWRCNT, 117 .enable_reg = EP93XX_SYSCON_PWRCNT,
93 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P1, 118 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P1,
94}; 119};
95static struct clk clk_m2p2 = { 120static struct clk clk_m2p2 = {
121 .parent = &clk_h,
96 .enable_reg = EP93XX_SYSCON_PWRCNT, 122 .enable_reg = EP93XX_SYSCON_PWRCNT,
97 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P2, 123 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P2,
98}; 124};
99static struct clk clk_m2p3 = { 125static struct clk clk_m2p3 = {
126 .parent = &clk_h,
100 .enable_reg = EP93XX_SYSCON_PWRCNT, 127 .enable_reg = EP93XX_SYSCON_PWRCNT,
101 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P3, 128 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P3,
102}; 129};
103static struct clk clk_m2p4 = { 130static struct clk clk_m2p4 = {
131 .parent = &clk_h,
104 .enable_reg = EP93XX_SYSCON_PWRCNT, 132 .enable_reg = EP93XX_SYSCON_PWRCNT,
105 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P4, 133 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P4,
106}; 134};
107static struct clk clk_m2p5 = { 135static struct clk clk_m2p5 = {
136 .parent = &clk_h,
108 .enable_reg = EP93XX_SYSCON_PWRCNT, 137 .enable_reg = EP93XX_SYSCON_PWRCNT,
109 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P5, 138 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P5,
110}; 139};
111static struct clk clk_m2p6 = { 140static struct clk clk_m2p6 = {
141 .parent = &clk_h,
112 .enable_reg = EP93XX_SYSCON_PWRCNT, 142 .enable_reg = EP93XX_SYSCON_PWRCNT,
113 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P6, 143 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P6,
114}; 144};
115static struct clk clk_m2p7 = { 145static struct clk clk_m2p7 = {
146 .parent = &clk_h,
116 .enable_reg = EP93XX_SYSCON_PWRCNT, 147 .enable_reg = EP93XX_SYSCON_PWRCNT,
117 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P7, 148 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P7,
118}; 149};
119static struct clk clk_m2p8 = { 150static struct clk clk_m2p8 = {
151 .parent = &clk_h,
120 .enable_reg = EP93XX_SYSCON_PWRCNT, 152 .enable_reg = EP93XX_SYSCON_PWRCNT,
121 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P8, 153 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P8,
122}; 154};
123static struct clk clk_m2p9 = { 155static struct clk clk_m2p9 = {
156 .parent = &clk_h,
124 .enable_reg = EP93XX_SYSCON_PWRCNT, 157 .enable_reg = EP93XX_SYSCON_PWRCNT,
125 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P9, 158 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P9,
126}; 159};
127static struct clk clk_m2m0 = { 160static struct clk clk_m2m0 = {
161 .parent = &clk_h,
128 .enable_reg = EP93XX_SYSCON_PWRCNT, 162 .enable_reg = EP93XX_SYSCON_PWRCNT,
129 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2M0, 163 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2M0,
130}; 164};
131static struct clk clk_m2m1 = { 165static struct clk clk_m2m1 = {
166 .parent = &clk_h,
132 .enable_reg = EP93XX_SYSCON_PWRCNT, 167 .enable_reg = EP93XX_SYSCON_PWRCNT,
133 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2M1, 168 .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2M1,
134}; 169};
@@ -137,6 +172,7 @@ static struct clk clk_m2m1 = {
137 { .dev_id = dev, .con_id = con, .clk = ck } 172 { .dev_id = dev, .con_id = con, .clk = ck }
138 173
139static struct clk_lookup clocks[] = { 174static struct clk_lookup clocks[] = {
175 INIT_CK(NULL, "xtali", &clk_xtali),
140 INIT_CK("apb:uart1", NULL, &clk_uart1), 176 INIT_CK("apb:uart1", NULL, &clk_uart1),
141 INIT_CK("apb:uart2", NULL, &clk_uart2), 177 INIT_CK("apb:uart2", NULL, &clk_uart2),
142 INIT_CK("apb:uart3", NULL, &clk_uart3), 178 INIT_CK("apb:uart3", NULL, &clk_uart3),
@@ -163,48 +199,84 @@ static struct clk_lookup clocks[] = {
163 INIT_CK(NULL, "m2m1", &clk_m2m1), 199 INIT_CK(NULL, "m2m1", &clk_m2m1),
164}; 200};
165 201
202static DEFINE_SPINLOCK(clk_lock);
203
204static void __clk_enable(struct clk *clk)
205{
206 if (!clk->users++) {
207 if (clk->parent)
208 __clk_enable(clk->parent);
209
210 if (clk->enable_reg) {
211 u32 v;
212
213 v = __raw_readl(clk->enable_reg);
214 v |= clk->enable_mask;
215 if (clk->sw_locked)
216 ep93xx_syscon_swlocked_write(v, clk->enable_reg);
217 else
218 __raw_writel(v, clk->enable_reg);
219 }
220 }
221}
166 222
167int clk_enable(struct clk *clk) 223int clk_enable(struct clk *clk)
168{ 224{
169 if (!clk->users++ && clk->enable_reg) { 225 unsigned long flags;
170 u32 value;
171 226
172 value = __raw_readl(clk->enable_reg); 227 if (!clk)
173 value |= clk->enable_mask; 228 return -EINVAL;
174 if (clk->sw_locked) 229
175 ep93xx_syscon_swlocked_write(value, clk->enable_reg); 230 spin_lock_irqsave(&clk_lock, flags);
176 else 231 __clk_enable(clk);
177 __raw_writel(value, clk->enable_reg); 232 spin_unlock_irqrestore(&clk_lock, flags);
178 }
179 233
180 return 0; 234 return 0;
181} 235}
182EXPORT_SYMBOL(clk_enable); 236EXPORT_SYMBOL(clk_enable);
183 237
184void clk_disable(struct clk *clk) 238static void __clk_disable(struct clk *clk)
185{ 239{
186 if (!--clk->users && clk->enable_reg) { 240 if (!--clk->users) {
187 u32 value; 241 if (clk->enable_reg) {
242 u32 v;
243
244 v = __raw_readl(clk->enable_reg);
245 v &= ~clk->enable_mask;
246 if (clk->sw_locked)
247 ep93xx_syscon_swlocked_write(v, clk->enable_reg);
248 else
249 __raw_writel(v, clk->enable_reg);
250 }
188 251
189 value = __raw_readl(clk->enable_reg); 252 if (clk->parent)
190 value &= ~clk->enable_mask; 253 __clk_disable(clk->parent);
191 if (clk->sw_locked)
192 ep93xx_syscon_swlocked_write(value, clk->enable_reg);
193 else
194 __raw_writel(value, clk->enable_reg);
195 } 254 }
196} 255}
256
257void clk_disable(struct clk *clk)
258{
259 unsigned long flags;
260
261 if (!clk)
262 return;
263
264 spin_lock_irqsave(&clk_lock, flags);
265 __clk_disable(clk);
266 spin_unlock_irqrestore(&clk_lock, flags);
267}
197EXPORT_SYMBOL(clk_disable); 268EXPORT_SYMBOL(clk_disable);
198 269
199static unsigned long get_uart_rate(struct clk *clk) 270static unsigned long get_uart_rate(struct clk *clk)
200{ 271{
272 unsigned long rate = clk_get_rate(clk->parent);
201 u32 value; 273 u32 value;
202 274
203 value = __raw_readl(EP93XX_SYSCON_PWRCNT); 275 value = __raw_readl(EP93XX_SYSCON_PWRCNT);
204 if (value & EP93XX_SYSCON_PWRCNT_UARTBAUD) 276 if (value & EP93XX_SYSCON_PWRCNT_UARTBAUD)
205 return EP93XX_EXT_CLK_RATE; 277 return rate;
206 else 278 else
207 return EP93XX_EXT_CLK_RATE / 2; 279 return rate / 2;
208} 280}
209 281
210unsigned long clk_get_rate(struct clk *clk) 282unsigned long clk_get_rate(struct clk *clk)
@@ -244,16 +316,16 @@ static int set_keytchclk_rate(struct clk *clk, unsigned long rate)
244 return 0; 316 return 0;
245} 317}
246 318
247static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel, 319static int calc_clk_div(struct clk *clk, unsigned long rate,
248 int *pdiv, int *div) 320 int *psel, int *esel, int *pdiv, int *div)
249{ 321{
250 unsigned long max_rate, best_rate = 0, 322 struct clk *mclk;
251 actual_rate = 0, mclk_rate = 0, rate_err = -1; 323 unsigned long max_rate, actual_rate, mclk_rate, rate_err = -1;
252 int i, found = 0, __div = 0, __pdiv = 0; 324 int i, found = 0, __div = 0, __pdiv = 0;
253 325
254 /* Don't exceed the maximum rate */ 326 /* Don't exceed the maximum rate */
255 max_rate = max(max(clk_pll1.rate / 4, clk_pll2.rate / 4), 327 max_rate = max(max(clk_pll1.rate / 4, clk_pll2.rate / 4),
256 (unsigned long)EP93XX_EXT_CLK_RATE / 4); 328 clk_xtali.rate / 4);
257 rate = min(rate, max_rate); 329 rate = min(rate, max_rate);
258 330
259 /* 331 /*
@@ -267,11 +339,12 @@ static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel,
267 */ 339 */
268 for (i = 0; i < 3; i++) { 340 for (i = 0; i < 3; i++) {
269 if (i == 0) 341 if (i == 0)
270 mclk_rate = EP93XX_EXT_CLK_RATE * 2; 342 mclk = &clk_xtali;
271 else if (i == 1) 343 else if (i == 1)
272 mclk_rate = clk_pll1.rate * 2; 344 mclk = &clk_pll1;
273 else if (i == 2) 345 else
274 mclk_rate = clk_pll2.rate * 2; 346 mclk = &clk_pll2;
347 mclk_rate = mclk->rate * 2;
275 348
276 /* Try each predivider value */ 349 /* Try each predivider value */
277 for (__pdiv = 4; __pdiv <= 6; __pdiv++) { 350 for (__pdiv = 4; __pdiv <= 6; __pdiv++) {
@@ -286,7 +359,8 @@ static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel,
286 *div = __div; 359 *div = __div;
287 *psel = (i == 2); 360 *psel = (i == 2);
288 *esel = (i != 0); 361 *esel = (i != 0);
289 best_rate = actual_rate; 362 clk->parent = mclk;
363 clk->rate = actual_rate;
290 rate_err = abs(actual_rate - rate); 364 rate_err = abs(actual_rate - rate);
291 found = 1; 365 found = 1;
292 } 366 }
@@ -294,21 +368,19 @@ static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel,
294 } 368 }
295 369
296 if (!found) 370 if (!found)
297 return 0; 371 return -EINVAL;
298 372
299 return best_rate; 373 return 0;
300} 374}
301 375
302static int set_div_rate(struct clk *clk, unsigned long rate) 376static int set_div_rate(struct clk *clk, unsigned long rate)
303{ 377{
304 unsigned long actual_rate; 378 int err, psel = 0, esel = 0, pdiv = 0, div = 0;
305 int psel = 0, esel = 0, pdiv = 0, div = 0;
306 u32 val; 379 u32 val;
307 380
308 actual_rate = calc_clk_div(rate, &psel, &esel, &pdiv, &div); 381 err = calc_clk_div(clk, rate, &psel, &esel, &pdiv, &div);
309 if (actual_rate == 0) 382 if (err)
310 return -EINVAL; 383 return err;
311 clk->rate = actual_rate;
312 384
313 /* Clear the esel, psel, pdiv and div bits */ 385 /* Clear the esel, psel, pdiv and div bits */
314 val = __raw_readl(clk->enable_reg); 386 val = __raw_readl(clk->enable_reg);
@@ -344,7 +416,7 @@ static unsigned long calc_pll_rate(u32 config_word)
344 unsigned long long rate; 416 unsigned long long rate;
345 int i; 417 int i;
346 418
347 rate = EP93XX_EXT_CLK_RATE; 419 rate = clk_xtali.rate;
348 rate *= ((config_word >> 11) & 0x1f) + 1; /* X1FBD */ 420 rate *= ((config_word >> 11) & 0x1f) + 1; /* X1FBD */
349 rate *= ((config_word >> 5) & 0x3f) + 1; /* X2FBD */ 421 rate *= ((config_word >> 5) & 0x3f) + 1; /* X2FBD */
350 do_div(rate, (config_word & 0x1f) + 1); /* X2IPD */ 422 do_div(rate, (config_word & 0x1f) + 1); /* X2IPD */
@@ -377,7 +449,7 @@ static int __init ep93xx_clock_init(void)
377 449
378 value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1); 450 value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1);
379 if (!(value & 0x00800000)) { /* PLL1 bypassed? */ 451 if (!(value & 0x00800000)) { /* PLL1 bypassed? */
380 clk_pll1.rate = EP93XX_EXT_CLK_RATE; 452 clk_pll1.rate = clk_xtali.rate;
381 } else { 453 } else {
382 clk_pll1.rate = calc_pll_rate(value); 454 clk_pll1.rate = calc_pll_rate(value);
383 } 455 }
@@ -388,7 +460,7 @@ static int __init ep93xx_clock_init(void)
388 460
389 value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2); 461 value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2);
390 if (!(value & 0x00080000)) { /* PLL2 bypassed? */ 462 if (!(value & 0x00080000)) { /* PLL2 bypassed? */
391 clk_pll2.rate = EP93XX_EXT_CLK_RATE; 463 clk_pll2.rate = clk_xtali.rate;
392 } else if (value & 0x00040000) { /* PLL2 enabled? */ 464 } else if (value & 0x00040000) { /* PLL2 enabled? */
393 clk_pll2.rate = calc_pll_rate(value); 465 clk_pll2.rate = calc_pll_rate(value);
394 } else { 466 } else {
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index f7ebed942f66..b4357c388d2e 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -206,7 +206,6 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc)
206 for (i = 0; i < 8; i++) { 206 for (i = 0; i < 8; i++) {
207 if (status & (1 << i)) { 207 if (status & (1 << i)) {
208 int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_B(0)) + i; 208 int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_B(0)) + i;
209 desc = irq_desc + gpio_irq;
210 generic_handle_irq(gpio_irq); 209 generic_handle_irq(gpio_irq);
211 } 210 }
212 } 211 }
@@ -550,13 +549,11 @@ void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
550 platform_device_register(&ep93xx_eth_device); 549 platform_device_register(&ep93xx_eth_device);
551} 550}
552 551
553static struct i2c_gpio_platform_data ep93xx_i2c_data = { 552
554 .sda_pin = EP93XX_GPIO_LINE_EEDAT, 553/*************************************************************************
555 .sda_is_open_drain = 0, 554 * EP93xx i2c peripheral handling
556 .scl_pin = EP93XX_GPIO_LINE_EECLK, 555 *************************************************************************/
557 .scl_is_open_drain = 0, 556static struct i2c_gpio_platform_data ep93xx_i2c_data;
558 .udelay = 2,
559};
560 557
561static struct platform_device ep93xx_i2c_device = { 558static struct platform_device ep93xx_i2c_device = {
562 .name = "i2c-gpio", 559 .name = "i2c-gpio",
@@ -564,8 +561,25 @@ static struct platform_device ep93xx_i2c_device = {
564 .dev.platform_data = &ep93xx_i2c_data, 561 .dev.platform_data = &ep93xx_i2c_data,
565}; 562};
566 563
567void __init ep93xx_register_i2c(struct i2c_board_info *devices, int num) 564void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
565 struct i2c_board_info *devices, int num)
568{ 566{
567 /*
568 * Set the EEPROM interface pin drive type control.
569 * Defines the driver type for the EECLK and EEDAT pins as either
570 * open drain, which will require an external pull-up, or a normal
571 * CMOS driver.
572 */
573 if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
574 pr_warning("ep93xx: sda != EEDAT, open drain has no effect\n");
575 if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
576 pr_warning("ep93xx: scl != EECLK, open drain has no effect\n");
577
578 __raw_writel((data->sda_is_open_drain << 1) |
579 (data->scl_is_open_drain << 0),
580 EP93XX_GPIO_EEDRIVE);
581
582 ep93xx_i2c_data = *data;
569 i2c_register_board_info(0, devices, num); 583 i2c_register_board_info(0, devices, num);
570 platform_device_register(&ep93xx_i2c_device); 584 platform_device_register(&ep93xx_i2c_device);
571} 585}
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c
index 73145ae5d3fa..a4a7be308000 100644
--- a/arch/arm/mach-ep93xx/edb93xx.c
+++ b/arch/arm/mach-ep93xx/edb93xx.c
@@ -27,8 +27,10 @@
27#include <linux/kernel.h> 27#include <linux/kernel.h>
28#include <linux/init.h> 28#include <linux/init.h>
29#include <linux/platform_device.h> 29#include <linux/platform_device.h>
30#include <linux/i2c.h>
31#include <linux/mtd/physmap.h> 30#include <linux/mtd/physmap.h>
31#include <linux/gpio.h>
32#include <linux/i2c.h>
33#include <linux/i2c-gpio.h>
32 34
33#include <mach/hardware.h> 35#include <mach/hardware.h>
34 36
@@ -76,13 +78,26 @@ static struct ep93xx_eth_data edb93xx_eth_data = {
76 .phy_id = 1, 78 .phy_id = 1,
77}; 79};
78 80
79static struct i2c_board_info __initdata edb93xxa_i2c_data[] = { 81
82/*************************************************************************
83 * EDB93xx i2c peripheral handling
84 *************************************************************************/
85static struct i2c_gpio_platform_data edb93xx_i2c_gpio_data = {
86 .sda_pin = EP93XX_GPIO_LINE_EEDAT,
87 .sda_is_open_drain = 0,
88 .scl_pin = EP93XX_GPIO_LINE_EECLK,
89 .scl_is_open_drain = 0,
90 .udelay = 0, /* default to 100 kHz */
91 .timeout = 0, /* default to 100 ms */
92};
93
94static struct i2c_board_info __initdata edb93xxa_i2c_board_info[] = {
80 { 95 {
81 I2C_BOARD_INFO("isl1208", 0x6f), 96 I2C_BOARD_INFO("isl1208", 0x6f),
82 }, 97 },
83}; 98};
84 99
85static struct i2c_board_info __initdata edb93xx_i2c_data[] = { 100static struct i2c_board_info __initdata edb93xx_i2c_board_info[] = {
86 { 101 {
87 I2C_BOARD_INFO("ds1337", 0x68), 102 I2C_BOARD_INFO("ds1337", 0x68),
88 }, 103 },
@@ -92,12 +107,14 @@ static void __init edb93xx_register_i2c(void)
92{ 107{
93 if (machine_is_edb9302a() || machine_is_edb9307a() || 108 if (machine_is_edb9302a() || machine_is_edb9307a() ||
94 machine_is_edb9315a()) { 109 machine_is_edb9315a()) {
95 ep93xx_register_i2c(edb93xxa_i2c_data, 110 ep93xx_register_i2c(&edb93xx_i2c_gpio_data,
96 ARRAY_SIZE(edb93xxa_i2c_data)); 111 edb93xxa_i2c_board_info,
112 ARRAY_SIZE(edb93xxa_i2c_board_info));
97 } else if (machine_is_edb9307() || machine_is_edb9312() || 113 } else if (machine_is_edb9307() || machine_is_edb9312() ||
98 machine_is_edb9315()) { 114 machine_is_edb9315()) {
99 ep93xx_register_i2c(edb93xx_i2c_data, 115 ep93xx_register_i2c(&edb93xx_i2c_gpio_data,
100 ARRAY_SIZE(edb93xx_i2c_data)); 116 edb93xx_i2c_board_info,
117 ARRAY_SIZE(edb93xx_i2c_board_info));
101 } 118 }
102} 119}
103 120
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
index 0fbf87b16338..b1f937eda29c 100644
--- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
@@ -52,25 +52,27 @@
52#define EP93XX_AHB_VIRT_BASE 0xfef00000 52#define EP93XX_AHB_VIRT_BASE 0xfef00000
53#define EP93XX_AHB_SIZE 0x00100000 53#define EP93XX_AHB_SIZE 0x00100000
54 54
55#define EP93XX_AHB_PHYS(x) (EP93XX_AHB_PHYS_BASE + (x))
55#define EP93XX_AHB_IOMEM(x) IOMEM(EP93XX_AHB_VIRT_BASE + (x)) 56#define EP93XX_AHB_IOMEM(x) IOMEM(EP93XX_AHB_VIRT_BASE + (x))
56 57
57#define EP93XX_APB_PHYS_BASE 0x80800000 58#define EP93XX_APB_PHYS_BASE 0x80800000
58#define EP93XX_APB_VIRT_BASE 0xfed00000 59#define EP93XX_APB_VIRT_BASE 0xfed00000
59#define EP93XX_APB_SIZE 0x00200000 60#define EP93XX_APB_SIZE 0x00200000
60 61
62#define EP93XX_APB_PHYS(x) (EP93XX_APB_PHYS_BASE + (x))
61#define EP93XX_APB_IOMEM(x) IOMEM(EP93XX_APB_VIRT_BASE + (x)) 63#define EP93XX_APB_IOMEM(x) IOMEM(EP93XX_APB_VIRT_BASE + (x))
62 64
63 65
64/* AHB peripherals */ 66/* AHB peripherals */
65#define EP93XX_DMA_BASE EP93XX_AHB_IOMEM(0x00000000) 67#define EP93XX_DMA_BASE EP93XX_AHB_IOMEM(0x00000000)
66 68
67#define EP93XX_ETHERNET_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00010000) 69#define EP93XX_ETHERNET_PHYS_BASE EP93XX_AHB_PHYS(0x00010000)
68#define EP93XX_ETHERNET_BASE EP93XX_AHB_IOMEM(0x00010000) 70#define EP93XX_ETHERNET_BASE EP93XX_AHB_IOMEM(0x00010000)
69 71
70#define EP93XX_USB_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00020000) 72#define EP93XX_USB_PHYS_BASE EP93XX_AHB_PHYS(0x00020000)
71#define EP93XX_USB_BASE EP93XX_AHB_IOMEM(0x00020000) 73#define EP93XX_USB_BASE EP93XX_AHB_IOMEM(0x00020000)
72 74
73#define EP93XX_RASTER_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00030000) 75#define EP93XX_RASTER_PHYS_BASE EP93XX_AHB_PHYS(0x00030000)
74#define EP93XX_RASTER_BASE EP93XX_AHB_IOMEM(0x00030000) 76#define EP93XX_RASTER_BASE EP93XX_AHB_IOMEM(0x00030000)
75 77
76#define EP93XX_GRAPHICS_ACCEL_BASE EP93XX_AHB_IOMEM(0x00040000) 78#define EP93XX_GRAPHICS_ACCEL_BASE EP93XX_AHB_IOMEM(0x00040000)
@@ -112,21 +114,10 @@
112 114
113#define EP93XX_GPIO_BASE EP93XX_APB_IOMEM(0x00040000) 115#define EP93XX_GPIO_BASE EP93XX_APB_IOMEM(0x00040000)
114#define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x)) 116#define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x))
115#define EP93XX_GPIO_F_INT_TYPE1 EP93XX_GPIO_REG(0x4c)
116#define EP93XX_GPIO_F_INT_TYPE2 EP93XX_GPIO_REG(0x50)
117#define EP93XX_GPIO_F_INT_ACK EP93XX_GPIO_REG(0x54)
118#define EP93XX_GPIO_F_INT_ENABLE EP93XX_GPIO_REG(0x58)
119#define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c) 117#define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c)
120#define EP93XX_GPIO_A_INT_TYPE1 EP93XX_GPIO_REG(0x90)
121#define EP93XX_GPIO_A_INT_TYPE2 EP93XX_GPIO_REG(0x94)
122#define EP93XX_GPIO_A_INT_ACK EP93XX_GPIO_REG(0x98)
123#define EP93XX_GPIO_A_INT_ENABLE EP93XX_GPIO_REG(0x9c)
124#define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0) 118#define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0)
125#define EP93XX_GPIO_B_INT_TYPE1 EP93XX_GPIO_REG(0xac)
126#define EP93XX_GPIO_B_INT_TYPE2 EP93XX_GPIO_REG(0xb0)
127#define EP93XX_GPIO_B_INT_ACK EP93XX_GPIO_REG(0xb4)
128#define EP93XX_GPIO_B_INT_ENABLE EP93XX_GPIO_REG(0xb8)
129#define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc) 119#define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc)
120#define EP93XX_GPIO_EEDRIVE EP93XX_GPIO_REG(0xc8)
130 121
131#define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000) 122#define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000)
132 123
@@ -134,13 +125,13 @@
134 125
135#define EP93XX_IRDA_BASE EP93XX_APB_IOMEM(0x000b0000) 126#define EP93XX_IRDA_BASE EP93XX_APB_IOMEM(0x000b0000)
136 127
137#define EP93XX_UART1_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000c0000) 128#define EP93XX_UART1_PHYS_BASE EP93XX_APB_PHYS(0x000c0000)
138#define EP93XX_UART1_BASE EP93XX_APB_IOMEM(0x000c0000) 129#define EP93XX_UART1_BASE EP93XX_APB_IOMEM(0x000c0000)
139 130
140#define EP93XX_UART2_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000d0000) 131#define EP93XX_UART2_PHYS_BASE EP93XX_APB_PHYS(0x000d0000)
141#define EP93XX_UART2_BASE EP93XX_APB_IOMEM(0x000d0000) 132#define EP93XX_UART2_BASE EP93XX_APB_IOMEM(0x000d0000)
142 133
143#define EP93XX_UART3_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000e0000) 134#define EP93XX_UART3_PHYS_BASE EP93XX_APB_PHYS(0x000e0000)
144#define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000) 135#define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000)
145 136
146#define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000) 137#define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000)
@@ -148,10 +139,10 @@
148#define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000) 139#define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000)
149#define EP93XX_TOUCHSCREEN_BASE EP93XX_APB_IOMEM(0x00100000) 140#define EP93XX_TOUCHSCREEN_BASE EP93XX_APB_IOMEM(0x00100000)
150 141
151#define EP93XX_PWM_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x00110000) 142#define EP93XX_PWM_PHYS_BASE EP93XX_APB_PHYS(0x00110000)
152#define EP93XX_PWM_BASE EP93XX_APB_IOMEM(0x00110000) 143#define EP93XX_PWM_BASE EP93XX_APB_IOMEM(0x00110000)
153 144
154#define EP93XX_RTC_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x00120000) 145#define EP93XX_RTC_PHYS_BASE EP93XX_APB_PHYS(0x00120000)
155#define EP93XX_RTC_BASE EP93XX_APB_IOMEM(0x00120000) 146#define EP93XX_RTC_BASE EP93XX_APB_IOMEM(0x00120000)
156 147
157#define EP93XX_SYSCON_BASE EP93XX_APB_IOMEM(0x00130000) 148#define EP93XX_SYSCON_BASE EP93XX_APB_IOMEM(0x00130000)
@@ -218,6 +209,17 @@
218#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16) 209#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16)
219#define EP93XX_SYSCON_KEYTCHCLKDIV_KEN (1<<15) 210#define EP93XX_SYSCON_KEYTCHCLKDIV_KEN (1<<15)
220#define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0) 211#define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0)
212#define EP93XX_SYSCON_SYSCFG EP93XX_SYSCON_REG(0x9c)
213#define EP93XX_SYSCON_SYSCFG_REV_MASK (0xf0000000)
214#define EP93XX_SYSCON_SYSCFG_REV_SHIFT (28)
215#define EP93XX_SYSCON_SYSCFG_SBOOT (1<<8)
216#define EP93XX_SYSCON_SYSCFG_LCSN7 (1<<7)
217#define EP93XX_SYSCON_SYSCFG_LCSN6 (1<<6)
218#define EP93XX_SYSCON_SYSCFG_LASDO (1<<5)
219#define EP93XX_SYSCON_SYSCFG_LEEDA (1<<4)
220#define EP93XX_SYSCON_SYSCFG_LEECLK (1<<3)
221#define EP93XX_SYSCON_SYSCFG_LCSN2 (1<<1)
222#define EP93XX_SYSCON_SYSCFG_LCSN1 (1<<0)
221#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) 223#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0)
222 224
223#define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000) 225#define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000)
diff --git a/arch/arm/mach-ep93xx/include/mach/gpio.h b/arch/arm/mach-ep93xx/include/mach/gpio.h
index 0a1498ae899a..c991b149bdf2 100644
--- a/arch/arm/mach-ep93xx/include/mach/gpio.h
+++ b/arch/arm/mach-ep93xx/include/mach/gpio.h
@@ -114,17 +114,9 @@ extern void ep93xx_gpio_int_debounce(unsigned int irq, int enable);
114 * B0..B7 (7..15) to irq 72..79, and 114 * B0..B7 (7..15) to irq 72..79, and
115 * F0..F7 (16..24) to irq 80..87. 115 * F0..F7 (16..24) to irq 80..87.
116 */ 116 */
117static inline int gpio_to_irq(unsigned gpio) 117#define gpio_to_irq(gpio) \
118{ 118 (((gpio) <= EP93XX_GPIO_LINE_MAX_IRQ) ? (64 + (gpio)) : -EINVAL)
119 if (gpio <= EP93XX_GPIO_LINE_MAX_IRQ) 119
120 return 64 + gpio; 120#define irq_to_gpio(irq) ((irq) - gpio_to_irq(0))
121
122 return -EINVAL;
123}
124
125static inline int irq_to_gpio(unsigned irq)
126{
127 return irq - gpio_to_irq(0);
128}
129 121
130#endif 122#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/memory.h b/arch/arm/mach-ep93xx/include/mach/memory.h
index 925b12ea0990..554064e90307 100644
--- a/arch/arm/mach-ep93xx/include/mach/memory.h
+++ b/arch/arm/mach-ep93xx/include/mach/memory.h
@@ -9,6 +9,12 @@
9#define PHYS_OFFSET UL(0x00000000) 9#define PHYS_OFFSET UL(0x00000000)
10#elif defined(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) 10#elif defined(CONFIG_EP93XX_SDCE0_PHYS_OFFSET)
11#define PHYS_OFFSET UL(0xc0000000) 11#define PHYS_OFFSET UL(0xc0000000)
12#elif defined(CONFIG_EP93XX_SDCE1_PHYS_OFFSET)
13#define PHYS_OFFSET UL(0xd0000000)
14#elif defined(CONFIG_EP93XX_SDCE2_PHYS_OFFSET)
15#define PHYS_OFFSET UL(0xe0000000)
16#elif defined(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET)
17#define PHYS_OFFSET UL(0xf0000000)
12#else 18#else
13#error "Kconfig bug: No EP93xx PHYS_OFFSET set" 19#error "Kconfig bug: No EP93xx PHYS_OFFSET set"
14#endif 20#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index 01a0f0838e5b..469fd968d517 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -4,6 +4,7 @@
4 4
5#ifndef __ASSEMBLY__ 5#ifndef __ASSEMBLY__
6 6
7struct i2c_gpio_platform_data;
7struct i2c_board_info; 8struct i2c_board_info;
8struct platform_device; 9struct platform_device;
9struct ep93xxfb_mach_info; 10struct ep93xxfb_mach_info;
@@ -16,7 +17,6 @@ struct ep93xx_eth_data
16 17
17void ep93xx_map_io(void); 18void ep93xx_map_io(void);
18void ep93xx_init_irq(void); 19void ep93xx_init_irq(void);
19void ep93xx_init_time(unsigned long);
20 20
21/* EP93xx System Controller software locked register write */ 21/* EP93xx System Controller software locked register write */
22void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg); 22void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg);
@@ -33,7 +33,8 @@ static inline void ep93xx_devcfg_clear_bits(unsigned int bits)
33} 33}
34 34
35void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr); 35void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr);
36void ep93xx_register_i2c(struct i2c_board_info *devices, int num); 36void ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
37 struct i2c_board_info *devices, int num);
37void ep93xx_register_fb(struct ep93xxfb_mach_info *data); 38void ep93xx_register_fb(struct ep93xxfb_mach_info *data);
38void ep93xx_register_pwm(int pwm0, int pwm1); 39void ep93xx_register_pwm(int pwm0, int pwm1);
39int ep93xx_pwm_acquire_gpio(struct platform_device *pdev); 40int ep93xx_pwm_acquire_gpio(struct platform_device *pdev);
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index 0a313e82fb74..d83b80478b09 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -2,7 +2,9 @@
2 * linux/arch/arm/mach-ep93xx/micro9.c 2 * linux/arch/arm/mach-ep93xx/micro9.c
3 * 3 *
4 * Copyright (C) 2006 Contec Steuerungstechnik & Automation GmbH 4 * Copyright (C) 2006 Contec Steuerungstechnik & Automation GmbH
5 * Manfred Gruber <manfred.gruber@contec.at> 5 * Manfred Gruber <m.gruber@tirol.com>
6 * Copyright (C) 2009 Contec Steuerungstechnik & Automation GmbH
7 * Hubert Feurstein <hubert.feurstein@contec.at>
6 * 8 *
7 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as 10 * it under the terms of the GNU General Public License version 2 as
@@ -20,104 +22,124 @@
20#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
21 23
22 24
23static struct ep93xx_eth_data micro9_eth_data = { 25/*************************************************************************
24 .phy_id = 0x1f, 26 * Micro9 NOR Flash
25}; 27 *
26 28 * Micro9-High has up to 64MB of 32-bit flash on CS1
27static void __init micro9_init(void) 29 * Micro9-Mid has up to 64MB of either 32-bit or 16-bit flash on CS1
28{ 30 * Micro9-Lite uses a seperate MTD map driver for flash support
29 ep93xx_register_eth(&micro9_eth_data, 1); 31 * Micro9-Slim has up to 64MB of either 32-bit or 16-bit flash on CS1
30} 32 *************************************************************************/
31 33static struct physmap_flash_data micro9_flash_data;
32/* 34
33 * Micro9-H 35static struct resource micro9_flash_resource = {
34 */
35#ifdef CONFIG_MACH_MICRO9H
36static struct physmap_flash_data micro9h_flash_data = {
37 .width = 4,
38};
39
40static struct resource micro9h_flash_resource = {
41 .start = EP93XX_CS1_PHYS_BASE, 36 .start = EP93XX_CS1_PHYS_BASE,
42 .end = EP93XX_CS1_PHYS_BASE + SZ_64M - 1, 37 .end = EP93XX_CS1_PHYS_BASE + SZ_64M - 1,
43 .flags = IORESOURCE_MEM, 38 .flags = IORESOURCE_MEM,
44}; 39};
45 40
46static struct platform_device micro9h_flash = { 41static struct platform_device micro9_flash = {
47 .name = "physmap-flash", 42 .name = "physmap-flash",
48 .id = 0, 43 .id = 0,
49 .dev = { 44 .dev = {
50 .platform_data = &micro9h_flash_data, 45 .platform_data = &micro9_flash_data,
51 }, 46 },
52 .num_resources = 1, 47 .num_resources = 1,
53 .resource = &micro9h_flash_resource, 48 .resource = &micro9_flash_resource,
54}; 49};
55 50
56static void __init micro9h_init(void) 51static void __init __micro9_register_flash(unsigned int width)
52{
53 micro9_flash_data.width = width;
54
55 platform_device_register(&micro9_flash);
56}
57
58static unsigned int __init micro9_detect_bootwidth(void)
59{
60 u32 v;
61
62 /* Detect the bus width of the external flash memory */
63 v = __raw_readl(EP93XX_SYSCON_SYSCFG);
64 if (v & EP93XX_SYSCON_SYSCFG_LCSN7)
65 return 4; /* 32-bit */
66 else
67 return 2; /* 16-bit */
68}
69
70static void __init micro9_register_flash(void)
57{ 71{
58 platform_device_register(&micro9h_flash); 72 if (machine_is_micro9())
73 __micro9_register_flash(4);
74 else if (machine_is_micro9m() || machine_is_micro9s())
75 __micro9_register_flash(micro9_detect_bootwidth());
59} 76}
60 77
61static void __init micro9h_init_machine(void) 78
79/*************************************************************************
80 * Micro9 Ethernet
81 *************************************************************************/
82static struct ep93xx_eth_data micro9_eth_data = {
83 .phy_id = 0x1f,
84};
85
86
87static void __init micro9_init_machine(void)
62{ 88{
63 ep93xx_init_devices(); 89 ep93xx_init_devices();
64 micro9_init(); 90 ep93xx_register_eth(&micro9_eth_data, 1);
65 micro9h_init(); 91 micro9_register_flash();
66} 92}
67 93
68MACHINE_START(MICRO9, "Contec Hypercontrol Micro9-H") 94
69 /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */ 95#ifdef CONFIG_MACH_MICRO9H
96MACHINE_START(MICRO9, "Contec Micro9-High")
97 /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
70 .phys_io = EP93XX_APB_PHYS_BASE, 98 .phys_io = EP93XX_APB_PHYS_BASE,
71 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, 99 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
72 .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, 100 .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
73 .map_io = ep93xx_map_io, 101 .map_io = ep93xx_map_io,
74 .init_irq = ep93xx_init_irq, 102 .init_irq = ep93xx_init_irq,
75 .timer = &ep93xx_timer, 103 .timer = &ep93xx_timer,
76 .init_machine = micro9h_init_machine, 104 .init_machine = micro9_init_machine,
77MACHINE_END 105MACHINE_END
78#endif 106#endif
79 107
80/*
81 * Micro9-M
82 */
83#ifdef CONFIG_MACH_MICRO9M 108#ifdef CONFIG_MACH_MICRO9M
84static void __init micro9m_init_machine(void) 109MACHINE_START(MICRO9M, "Contec Micro9-Mid")
85{ 110 /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
86 ep93xx_init_devices();
87 micro9_init();
88}
89
90MACHINE_START(MICRO9M, "Contec Hypercontrol Micro9-M")
91 /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
92 .phys_io = EP93XX_APB_PHYS_BASE, 111 .phys_io = EP93XX_APB_PHYS_BASE,
93 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, 112 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
94 .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, 113 .boot_params = EP93XX_SDCE3_PHYS_BASE_ASYNC + 0x100,
95 .map_io = ep93xx_map_io, 114 .map_io = ep93xx_map_io,
96 .init_irq = ep93xx_init_irq, 115 .init_irq = ep93xx_init_irq,
97 .timer = &ep93xx_timer, 116 .timer = &ep93xx_timer,
98 .init_machine = micro9m_init_machine, 117 .init_machine = micro9_init_machine,
99MACHINE_END 118MACHINE_END
100#endif 119#endif
101 120
102/*
103 * Micro9-L
104 */
105#ifdef CONFIG_MACH_MICRO9L 121#ifdef CONFIG_MACH_MICRO9L
106static void __init micro9l_init_machine(void) 122MACHINE_START(MICRO9L, "Contec Micro9-Lite")
107{ 123 /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
108 ep93xx_init_devices();
109 micro9_init();
110}
111
112MACHINE_START(MICRO9L, "Contec Hypercontrol Micro9-L")
113 /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */
114 .phys_io = EP93XX_APB_PHYS_BASE, 124 .phys_io = EP93XX_APB_PHYS_BASE,
115 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, 125 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
116 .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, 126 .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100,
117 .map_io = ep93xx_map_io, 127 .map_io = ep93xx_map_io,
118 .init_irq = ep93xx_init_irq, 128 .init_irq = ep93xx_init_irq,
119 .timer = &ep93xx_timer, 129 .timer = &ep93xx_timer,
120 .init_machine = micro9l_init_machine, 130 .init_machine = micro9_init_machine,
121MACHINE_END 131MACHINE_END
122#endif 132#endif
123 133
134#ifdef CONFIG_MACH_MICRO9S
135MACHINE_START(MICRO9S, "Contec Micro9-Slim")
136 /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
137 .phys_io = EP93XX_APB_PHYS_BASE,
138 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
139 .boot_params = EP93XX_SDCE3_PHYS_BASE_ASYNC + 0x100,
140 .map_io = ep93xx_map_io,
141 .init_irq = ep93xx_init_irq,
142 .timer = &ep93xx_timer,
143 .init_machine = micro9_init_machine,
144MACHINE_END
145#endif
diff --git a/arch/arm/mach-integrator/include/mach/memory.h b/arch/arm/mach-integrator/include/mach/memory.h
index 2b2e7a110724..4891828454f5 100644
--- a/arch/arm/mach-integrator/include/mach/memory.h
+++ b/arch/arm/mach-integrator/include/mach/memory.h
@@ -28,5 +28,6 @@
28#define BUS_OFFSET UL(0x80000000) 28#define BUS_OFFSET UL(0x80000000)
29#define __virt_to_bus(x) ((x) - PAGE_OFFSET + BUS_OFFSET) 29#define __virt_to_bus(x) ((x) - PAGE_OFFSET + BUS_OFFSET)
30#define __bus_to_virt(x) ((x) - BUS_OFFSET + PAGE_OFFSET) 30#define __bus_to_virt(x) ((x) - BUS_OFFSET + PAGE_OFFSET)
31#define __pfn_to_bus(x) (((x) << PAGE_SHIFT) + BUS_OFFSET)
31 32
32#endif 33#endif
diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c
index 4089951acb47..ff5e33298914 100644
--- a/arch/arm/mach-mx2/clock_imx27.c
+++ b/arch/arm/mach-mx2/clock_imx27.c
@@ -638,9 +638,9 @@ static struct clk_lookup lookups[] = {
638 _REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk) 638 _REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk)
639 _REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk) 639 _REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk)
640 _REGISTER_CLOCK("mxc-mmc.2", NULL, sdhc3_clk) 640 _REGISTER_CLOCK("mxc-mmc.2", NULL, sdhc3_clk)
641 _REGISTER_CLOCK(NULL, "cspi1", cspi1_clk) 641 _REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk)
642 _REGISTER_CLOCK(NULL, "cspi2", cspi2_clk) 642 _REGISTER_CLOCK("spi_imx.1", NULL, cspi2_clk)
643 _REGISTER_CLOCK(NULL, "cspi3", cspi3_clk) 643 _REGISTER_CLOCK("spi_imx.2", NULL, cspi3_clk)
644 _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk) 644 _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
645 _REGISTER_CLOCK(NULL, "csi", csi_clk) 645 _REGISTER_CLOCK(NULL, "csi", csi_clk)
646 _REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk) 646 _REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk)
@@ -665,7 +665,7 @@ static struct clk_lookup lookups[] = {
665 _REGISTER_CLOCK(NULL, "sahara2", sahara2_clk) 665 _REGISTER_CLOCK(NULL, "sahara2", sahara2_clk)
666 _REGISTER_CLOCK(NULL, "ata", ata_clk) 666 _REGISTER_CLOCK(NULL, "ata", ata_clk)
667 _REGISTER_CLOCK(NULL, "mstick", mstick_clk) 667 _REGISTER_CLOCK(NULL, "mstick", mstick_clk)
668 _REGISTER_CLOCK(NULL, "wdog", wdog_clk) 668 _REGISTER_CLOCK("imx-wdt.0", NULL, wdog_clk)
669 _REGISTER_CLOCK(NULL, "gpio", gpio_clk) 669 _REGISTER_CLOCK(NULL, "gpio", gpio_clk)
670 _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) 670 _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
671 _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) 671 _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)
diff --git a/arch/arm/mach-mx2/pcm038.c b/arch/arm/mach-mx2/pcm038.c
index ee65dda584cf..906d59b0a7aa 100644
--- a/arch/arm/mach-mx2/pcm038.c
+++ b/arch/arm/mach-mx2/pcm038.c
@@ -23,6 +23,10 @@
23#include <linux/mtd/plat-ram.h> 23#include <linux/mtd/plat-ram.h>
24#include <linux/mtd/physmap.h> 24#include <linux/mtd/physmap.h>
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/regulator/machine.h>
27#include <linux/mfd/mc13783.h>
28#include <linux/spi/spi.h>
29#include <linux/irq.h>
26 30
27#include <asm/mach-types.h> 31#include <asm/mach-types.h>
28#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
@@ -35,6 +39,7 @@
35#include <mach/iomux.h> 39#include <mach/iomux.h>
36#include <mach/imx-uart.h> 40#include <mach/imx-uart.h>
37#include <mach/mxc_nand.h> 41#include <mach/mxc_nand.h>
42#include <mach/spi.h>
38 43
39#include "devices.h" 44#include "devices.h"
40 45
@@ -78,8 +83,6 @@ static int pcm038_pins[] = {
78 PC6_PF_I2C2_SCL, 83 PC6_PF_I2C2_SCL,
79 /* SPI1 */ 84 /* SPI1 */
80 PD25_PF_CSPI1_RDY, 85 PD25_PF_CSPI1_RDY,
81 PD27_PF_CSPI1_SS1,
82 PD28_PF_CSPI1_SS0,
83 PD29_PF_CSPI1_SCLK, 86 PD29_PF_CSPI1_SCLK,
84 PD30_PF_CSPI1_MISO, 87 PD30_PF_CSPI1_MISO,
85 PD31_PF_CSPI1_MOSI, 88 PD31_PF_CSPI1_MOSI,
@@ -196,6 +199,86 @@ static struct i2c_board_info pcm038_i2c_devices[] = {
196 } 199 }
197}; 200};
198 201
202static int pcm038_spi_cs[] = {GPIO_PORTD + 28};
203
204static struct spi_imx_master pcm038_spi_0_data = {
205 .chipselect = pcm038_spi_cs,
206 .num_chipselect = ARRAY_SIZE(pcm038_spi_cs),
207};
208
209static struct regulator_consumer_supply sdhc1_consumers[] = {
210 {
211 .dev = &mxc_sdhc_device1.dev,
212 .supply = "sdhc_vcc",
213 },
214};
215
216static struct regulator_init_data sdhc1_data = {
217 .constraints = {
218 .min_uV = 3000000,
219 .max_uV = 3400000,
220 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
221 REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
222 .valid_modes_mask = REGULATOR_MODE_NORMAL |
223 REGULATOR_MODE_FAST,
224 .always_on = 0,
225 .boot_on = 0,
226 },
227 .num_consumer_supplies = ARRAY_SIZE(sdhc1_consumers),
228 .consumer_supplies = sdhc1_consumers,
229};
230
231static struct regulator_consumer_supply cam_consumers[] = {
232 {
233 .dev = NULL,
234 .supply = "imx_cam_vcc",
235 },
236};
237
238static struct regulator_init_data cam_data = {
239 .constraints = {
240 .min_uV = 3000000,
241 .max_uV = 3400000,
242 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
243 REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
244 .valid_modes_mask = REGULATOR_MODE_NORMAL |
245 REGULATOR_MODE_FAST,
246 .always_on = 0,
247 .boot_on = 0,
248 },
249 .num_consumer_supplies = ARRAY_SIZE(cam_consumers),
250 .consumer_supplies = cam_consumers,
251};
252
253struct mc13783_regulator_init_data pcm038_regulators[] = {
254 {
255 .id = MC13783_REGU_VCAM,
256 .init_data = &cam_data,
257 }, {
258 .id = MC13783_REGU_VMMC1,
259 .init_data = &sdhc1_data,
260 },
261};
262
263static struct mc13783_platform_data pcm038_pmic = {
264 .regulators = pcm038_regulators,
265 .num_regulators = ARRAY_SIZE(pcm038_regulators),
266 .flags = MC13783_USE_ADC | MC13783_USE_REGULATOR |
267 MC13783_USE_TOUCHSCREEN,
268};
269
270static struct spi_board_info pcm038_spi_board_info[] __initdata = {
271 {
272 .modalias = "mc13783",
273 .irq = IRQ_GPIOB(23),
274 .max_speed_hz = 300000,
275 .bus_num = 0,
276 .chip_select = 0,
277 .platform_data = &pcm038_pmic,
278 .mode = SPI_CS_HIGH,
279 }
280};
281
199static void __init pcm038_init(void) 282static void __init pcm038_init(void)
200{ 283{
201 mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins), 284 mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
@@ -219,6 +302,15 @@ static void __init pcm038_init(void)
219 /* PE18 for user-LED D40 */ 302 /* PE18 for user-LED D40 */
220 mxc_gpio_mode(GPIO_PORTE | 18 | GPIO_GPIO | GPIO_OUT); 303 mxc_gpio_mode(GPIO_PORTE | 18 | GPIO_GPIO | GPIO_OUT);
221 304
305 mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT);
306
307 /* MC13783 IRQ */
308 mxc_gpio_mode(GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN);
309
310 mxc_register_device(&mxc_spi_device0, &pcm038_spi_0_data);
311 spi_register_board_info(pcm038_spi_board_info,
312 ARRAY_SIZE(pcm038_spi_board_info));
313
222 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 314 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
223 315
224#ifdef CONFIG_MACH_PCM970_BASEBOARD 316#ifdef CONFIG_MACH_PCM970_BASEBOARD
diff --git a/arch/arm/mach-mx2/pcm970-baseboard.c b/arch/arm/mach-mx2/pcm970-baseboard.c
index c261f59b0b4c..3cb7f457e5d0 100644
--- a/arch/arm/mach-mx2/pcm970-baseboard.c
+++ b/arch/arm/mach-mx2/pcm970-baseboard.c
@@ -39,7 +39,6 @@ static int pcm970_pins[] = {
39 PB7_PF_SD2_D3, 39 PB7_PF_SD2_D3,
40 PB8_PF_SD2_CMD, 40 PB8_PF_SD2_CMD,
41 PB9_PF_SD2_CLK, 41 PB9_PF_SD2_CLK,
42 GPIO_PORTC | 28 | GPIO_GPIO | GPIO_IN, /* card detect */
43 /* display */ 42 /* display */
44 PA5_PF_LSCLK, 43 PA5_PF_LSCLK,
45 PA6_PF_LD0, 44 PA6_PF_LD0,
@@ -228,6 +227,7 @@ void __init pcm970_baseboard_init(void)
228 "PCM970"); 227 "PCM970");
229 228
230 mxc_register_device(&mxc_fb_device, &pcm038_fb_data); 229 mxc_register_device(&mxc_fb_device, &pcm038_fb_data);
230 mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_IN);
231 mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata); 231 mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata);
232 platform_device_register(&pcm970_sja1000); 232 platform_device_register(&pcm970_sja1000);
233} 233}
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c
index eb12de1da42d..63511de3a559 100644
--- a/arch/arm/mach-mx25/devices.c
+++ b/arch/arm/mach-mx25/devices.c
@@ -1,4 +1,23 @@
1/*
2 * Copyright 2009 Sascha Hauer, <kernel@pengutronix.de>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin Street, Fifth Floor,
16 * Boston, MA 02110-1301, USA.
17 */
18
1#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/dma-mapping.h>
2#include <linux/gpio.h> 21#include <linux/gpio.h>
3#include <mach/mx25.h> 22#include <mach/mx25.h>
4#include <mach/irqs.h> 23#include <mach/irqs.h>
diff --git a/arch/arm/mach-mx25/mx25pdk.c b/arch/arm/mach-mx25/mx25pdk.c
index 92aa4fd19d99..d23ae571c03f 100644
--- a/arch/arm/mach-mx25/mx25pdk.c
+++ b/arch/arm/mach-mx25/mx25pdk.c
@@ -1,3 +1,21 @@
1/*
2 * Copyright 2009 Sascha Hauer, <kernel@pengutronix.de>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin Street, Fifth Floor,
16 * Boston, MA 02110-1301, USA.
17 */
18
1#include <linux/types.h> 19#include <linux/types.h>
2#include <linux/init.h> 20#include <linux/init.h>
3#include <linux/clk.h> 21#include <linux/clk.h>
@@ -23,19 +41,12 @@ static struct imxuart_platform_data uart_pdata = {
23 .flags = IMXUART_HAVE_RTSCTS, 41 .flags = IMXUART_HAVE_RTSCTS,
24}; 42};
25 43
26static struct mxc_nand_platform_data nand_board_info = {
27 .width = 1,
28 .hw_ecc = 1,
29};
30
31static void __init mx25pdk_init(void) 44static void __init mx25pdk_init(void)
32{ 45{
33 mxc_register_device(&mxc_uart_device0, &uart_pdata); 46 mxc_register_device(&mxc_uart_device0, &uart_pdata);
34 mxc_register_device(&mxc_usbh2, NULL); 47 mxc_register_device(&mxc_usbh2, NULL);
35 mxc_register_device(&mxc_nand_device, &nand_board_info);
36} 48}
37 49
38
39static void __init mx25pdk_timer_init(void) 50static void __init mx25pdk_timer_init(void)
40{ 51{
41 mx25_clocks_init(26000000); 52 mx25_clocks_init(26000000);
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index fe5c4217322e..c595260ec1f9 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -443,7 +443,7 @@ static struct clk_lookup lookups[] = {
443 _REGISTER_CLOCK("mxc-ehci.1", "usb", usbotg_clk) 443 _REGISTER_CLOCK("mxc-ehci.1", "usb", usbotg_clk)
444 _REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk) 444 _REGISTER_CLOCK("mxc-ehci.2", "usb", usbotg_clk)
445 _REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk) 445 _REGISTER_CLOCK("fsl-usb2-udc", "usb", usbotg_clk)
446 _REGISTER_CLOCK("mxc_wdt.0", NULL, wdog_clk) 446 _REGISTER_CLOCK("imx-wdt.0", NULL, wdog_clk)
447 _REGISTER_CLOCK(NULL, "max", max_clk) 447 _REGISTER_CLOCK(NULL, "max", max_clk)
448 _REGISTER_CLOCK(NULL, "admux", admux_clk) 448 _REGISTER_CLOCK(NULL, "admux", admux_clk)
449 _REGISTER_CLOCK(NULL, "csi", csi_clk) 449 _REGISTER_CLOCK(NULL, "csi", csi_clk)
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock.c
index 06bd6180bfc3..b2a3bcf8266e 100644
--- a/arch/arm/mach-mx3/clock.c
+++ b/arch/arm/mach-mx3/clock.c
@@ -530,7 +530,7 @@ static struct clk_lookup lookups[] = {
530 _REGISTER_CLOCK("spi_imx.2", NULL, cspi3_clk) 530 _REGISTER_CLOCK("spi_imx.2", NULL, cspi3_clk)
531 _REGISTER_CLOCK(NULL, "gpt", gpt_clk) 531 _REGISTER_CLOCK(NULL, "gpt", gpt_clk)
532 _REGISTER_CLOCK(NULL, "pwm", pwm_clk) 532 _REGISTER_CLOCK(NULL, "pwm", pwm_clk)
533 _REGISTER_CLOCK(NULL, "wdog", wdog_clk) 533 _REGISTER_CLOCK("imx-wdt.0", NULL, wdog_clk)
534 _REGISTER_CLOCK(NULL, "rtc", rtc_clk) 534 _REGISTER_CLOCK(NULL, "rtc", rtc_clk)
535 _REGISTER_CLOCK(NULL, "epit", epit1_clk) 535 _REGISTER_CLOCK(NULL, "epit", epit1_clk)
536 _REGISTER_CLOCK(NULL, "epit", epit2_clk) 536 _REGISTER_CLOCK(NULL, "epit", epit2_clk)
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c
index 8a577f367250..e6abe181b967 100644
--- a/arch/arm/mach-mx3/devices.c
+++ b/arch/arm/mach-mx3/devices.c
@@ -459,7 +459,7 @@ struct platform_device mxc_usbh2 = {
459 * SPI master controller 459 * SPI master controller
460 * 3 channels 460 * 3 channels
461 */ 461 */
462static struct resource imx_spi_0_resources[] = { 462static struct resource mxc_spi_0_resources[] = {
463 { 463 {
464 .start = CSPI1_BASE_ADDR, 464 .start = CSPI1_BASE_ADDR,
465 .end = CSPI1_BASE_ADDR + SZ_4K - 1, 465 .end = CSPI1_BASE_ADDR + SZ_4K - 1,
@@ -471,7 +471,7 @@ static struct resource imx_spi_0_resources[] = {
471 }, 471 },
472}; 472};
473 473
474static struct resource imx_spi_1_resources[] = { 474static struct resource mxc_spi_1_resources[] = {
475 { 475 {
476 .start = CSPI2_BASE_ADDR, 476 .start = CSPI2_BASE_ADDR,
477 .end = CSPI2_BASE_ADDR + SZ_4K - 1, 477 .end = CSPI2_BASE_ADDR + SZ_4K - 1,
@@ -483,7 +483,7 @@ static struct resource imx_spi_1_resources[] = {
483 }, 483 },
484}; 484};
485 485
486static struct resource imx_spi_2_resources[] = { 486static struct resource mxc_spi_2_resources[] = {
487 { 487 {
488 .start = CSPI3_BASE_ADDR, 488 .start = CSPI3_BASE_ADDR,
489 .end = CSPI3_BASE_ADDR + SZ_4K - 1, 489 .end = CSPI3_BASE_ADDR + SZ_4K - 1,
@@ -495,25 +495,25 @@ static struct resource imx_spi_2_resources[] = {
495 }, 495 },
496}; 496};
497 497
498struct platform_device imx_spi_device0 = { 498struct platform_device mxc_spi_device0 = {
499 .name = "spi_imx", 499 .name = "spi_imx",
500 .id = 0, 500 .id = 0,
501 .num_resources = ARRAY_SIZE(imx_spi_0_resources), 501 .num_resources = ARRAY_SIZE(mxc_spi_0_resources),
502 .resource = imx_spi_0_resources, 502 .resource = mxc_spi_0_resources,
503}; 503};
504 504
505struct platform_device imx_spi_device1 = { 505struct platform_device mxc_spi_device1 = {
506 .name = "spi_imx", 506 .name = "spi_imx",
507 .id = 1, 507 .id = 1,
508 .num_resources = ARRAY_SIZE(imx_spi_1_resources), 508 .num_resources = ARRAY_SIZE(mxc_spi_1_resources),
509 .resource = imx_spi_1_resources, 509 .resource = mxc_spi_1_resources,
510}; 510};
511 511
512struct platform_device imx_spi_device2 = { 512struct platform_device mxc_spi_device2 = {
513 .name = "spi_imx", 513 .name = "spi_imx",
514 .id = 2, 514 .id = 2,
515 .num_resources = ARRAY_SIZE(imx_spi_2_resources), 515 .num_resources = ARRAY_SIZE(mxc_spi_2_resources),
516 .resource = imx_spi_2_resources, 516 .resource = mxc_spi_2_resources,
517}; 517};
518 518
519#ifdef CONFIG_ARCH_MX35 519#ifdef CONFIG_ARCH_MX35
diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h
index 79f2be45d139..ab87419dc9a0 100644
--- a/arch/arm/mach-mx3/devices.h
+++ b/arch/arm/mach-mx3/devices.h
@@ -20,7 +20,7 @@ extern struct platform_device mxc_otg_host;
20extern struct platform_device mxc_usbh1; 20extern struct platform_device mxc_usbh1;
21extern struct platform_device mxc_usbh2; 21extern struct platform_device mxc_usbh2;
22extern struct platform_device mxc_rnga_device; 22extern struct platform_device mxc_rnga_device;
23extern struct platform_device imx_spi_device0; 23extern struct platform_device mxc_spi_device0;
24extern struct platform_device imx_spi_device1; 24extern struct platform_device mxc_spi_device1;
25extern struct platform_device imx_spi_device2; 25extern struct platform_device mxc_spi_device2;
26 26
diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c
index ad5a1122d765..bedf5b8d976a 100644
--- a/arch/arm/mach-mx3/mm.c
+++ b/arch/arm/mach-mx3/mm.c
@@ -81,6 +81,7 @@ void __init mx31_map_io(void)
81 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); 81 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
82} 82}
83 83
84#ifdef CONFIG_ARCH_MX35
84void __init mx35_map_io(void) 85void __init mx35_map_io(void)
85{ 86{
86 mxc_set_cpu_type(MXC_CPU_MX35); 87 mxc_set_cpu_type(MXC_CPU_MX35);
@@ -89,6 +90,7 @@ void __init mx35_map_io(void)
89 90
90 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); 91 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
91} 92}
93#endif
92 94
93void __init mx31_init_irq(void) 95void __init mx31_init_irq(void)
94{ 96{
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index 42920f9c1a11..8ad5cc3e83e3 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -219,6 +219,10 @@ static struct platform_device *ams_delta_devices[] __initdata = {
219 219
220static void __init ams_delta_init(void) 220static void __init ams_delta_init(void)
221{ 221{
222 /* mux pins for uarts */
223 omap_cfg_reg(UART1_TX);
224 omap_cfg_reg(UART1_RTS);
225
222 iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc)); 226 iotable_init(ams_delta_io_desc, ARRAY_SIZE(ams_delta_io_desc));
223 227
224 omap_board_config = ams_delta_config; 228 omap_board_config = ams_delta_config;
@@ -231,6 +235,8 @@ static void __init ams_delta_init(void)
231 235
232 omap_usb_init(&ams_delta_usb_config); 236 omap_usb_init(&ams_delta_usb_config);
233 platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices)); 237 platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices));
238
239 omap_writew(omap_readw(ARM_RSTCT1) | 0x0004, ARM_RSTCT1);
234} 240}
235 241
236static struct plat_serial8250_port ams_delta_modem_ports[] = { 242static struct plat_serial8250_port ams_delta_modem_ports[] = {
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index fb47239da72f..6c8a41f20e51 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -64,6 +64,14 @@ static void __init omap_generic_init(void)
64{ 64{
65#ifdef CONFIG_ARCH_OMAP15XX 65#ifdef CONFIG_ARCH_OMAP15XX
66 if (cpu_is_omap15xx()) { 66 if (cpu_is_omap15xx()) {
67 /* mux pins for uarts */
68 omap_cfg_reg(UART1_TX);
69 omap_cfg_reg(UART1_RTS);
70 omap_cfg_reg(UART2_TX);
71 omap_cfg_reg(UART2_RTS);
72 omap_cfg_reg(UART3_TX);
73 omap_cfg_reg(UART3_RX);
74
67 omap_usb_init(&generic1510_usb_config); 75 omap_usb_init(&generic1510_usb_config);
68 } 76 }
69#endif 77#endif
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index cc2abbb2d0f4..cd6c39514826 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -376,6 +376,26 @@ static void __init innovator_init(void)
376{ 376{
377#ifdef CONFIG_ARCH_OMAP15XX 377#ifdef CONFIG_ARCH_OMAP15XX
378 if (cpu_is_omap1510()) { 378 if (cpu_is_omap1510()) {
379 unsigned char reg;
380
381 /* mux pins for uarts */
382 omap_cfg_reg(UART1_TX);
383 omap_cfg_reg(UART1_RTS);
384 omap_cfg_reg(UART2_TX);
385 omap_cfg_reg(UART2_RTS);
386 omap_cfg_reg(UART3_TX);
387 omap_cfg_reg(UART3_RX);
388
389 reg = fpga_read(OMAP1510_FPGA_POWER);
390 reg |= OMAP1510_FPGA_PCR_COM1_EN;
391 fpga_write(reg, OMAP1510_FPGA_POWER);
392 udelay(10);
393
394 reg = fpga_read(OMAP1510_FPGA_POWER);
395 reg |= OMAP1510_FPGA_PCR_COM2_EN;
396 fpga_write(reg, OMAP1510_FPGA_POWER);
397 udelay(10);
398
379 platform_add_devices(innovator1510_devices, ARRAY_SIZE(innovator1510_devices)); 399 platform_add_devices(innovator1510_devices, ARRAY_SIZE(innovator1510_devices));
380 spi_register_board_info(innovator1510_boardinfo, 400 spi_register_board_info(innovator1510_boardinfo,
381 ARRAY_SIZE(innovator1510_boardinfo)); 401 ARRAY_SIZE(innovator1510_boardinfo));
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 90dd0431b0dc..4de258420f39 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -342,6 +342,14 @@ static void __init palmte_misc_gpio_setup(void)
342 342
343static void __init omap_palmte_init(void) 343static void __init omap_palmte_init(void)
344{ 344{
345 /* mux pins for uarts */
346 omap_cfg_reg(UART1_TX);
347 omap_cfg_reg(UART1_RTS);
348 omap_cfg_reg(UART2_TX);
349 omap_cfg_reg(UART2_RTS);
350 omap_cfg_reg(UART3_TX);
351 omap_cfg_reg(UART3_RX);
352
345 omap_board_config = palmte_config; 353 omap_board_config = palmte_config;
346 omap_board_config_size = ARRAY_SIZE(palmte_config); 354 omap_board_config_size = ARRAY_SIZE(palmte_config);
347 355
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 8256139891ff..d972cf941b76 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -289,6 +289,14 @@ static void __init omap_mpu_wdt_mode(int mode) {
289 289
290static void __init omap_palmtt_init(void) 290static void __init omap_palmtt_init(void)
291{ 291{
292 /* mux pins for uarts */
293 omap_cfg_reg(UART1_TX);
294 omap_cfg_reg(UART1_RTS);
295 omap_cfg_reg(UART2_TX);
296 omap_cfg_reg(UART2_RTS);
297 omap_cfg_reg(UART3_TX);
298 omap_cfg_reg(UART3_RX);
299
292 omap_mpu_wdt_mode(0); 300 omap_mpu_wdt_mode(0);
293 301
294 omap_board_config = palmtt_config; 302 omap_board_config = palmtt_config;
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 81b6bde1c5a3..986bd4df0e97 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -307,6 +307,14 @@ palmz71_gpio_setup(int early)
307static void __init 307static void __init
308omap_palmz71_init(void) 308omap_palmz71_init(void)
309{ 309{
310 /* mux pins for uarts */
311 omap_cfg_reg(UART1_TX);
312 omap_cfg_reg(UART1_RTS);
313 omap_cfg_reg(UART2_TX);
314 omap_cfg_reg(UART2_RTS);
315 omap_cfg_reg(UART3_TX);
316 omap_cfg_reg(UART3_RX);
317
310 palmz71_gpio_setup(1); 318 palmz71_gpio_setup(1);
311 omap_mpu_wdt_mode(0); 319 omap_mpu_wdt_mode(0);
312 320
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 02c85ca2e1df..056ae64e0f55 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -377,6 +377,14 @@ static struct omap_board_config_kernel sx1_config[] __initdata = {
377 377
378static void __init omap_sx1_init(void) 378static void __init omap_sx1_init(void)
379{ 379{
380 /* mux pins for uarts */
381 omap_cfg_reg(UART1_TX);
382 omap_cfg_reg(UART1_RTS);
383 omap_cfg_reg(UART2_TX);
384 omap_cfg_reg(UART2_RTS);
385 omap_cfg_reg(UART3_TX);
386 omap_cfg_reg(UART3_RX);
387
380 platform_add_devices(sx1_devices, ARRAY_SIZE(sx1_devices)); 388 platform_add_devices(sx1_devices, ARRAY_SIZE(sx1_devices));
381 389
382 omap_board_config = sx1_config; 390 omap_board_config = sx1_config;
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index c06e7a553472..07b07522d5bf 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -152,6 +152,14 @@ static void __init voiceblue_init_irq(void)
152 152
153static void __init voiceblue_init(void) 153static void __init voiceblue_init(void)
154{ 154{
155 /* mux pins for uarts */
156 omap_cfg_reg(UART1_TX);
157 omap_cfg_reg(UART1_RTS);
158 omap_cfg_reg(UART2_TX);
159 omap_cfg_reg(UART2_RTS);
160 omap_cfg_reg(UART3_TX);
161 omap_cfg_reg(UART3_RX);
162
155 /* Watchdog */ 163 /* Watchdog */
156 gpio_request(0, "Watchdog"); 164 gpio_request(0, "Watchdog");
157 /* smc91x reset */ 165 /* smc91x reset */
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index d496e50fec40..d23979bc0fd5 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -131,8 +131,6 @@ void __init omap_serial_init(void)
131 } 131 }
132 132
133 for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { 133 for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
134 unsigned char reg;
135
136 switch (i) { 134 switch (i) {
137 case 0: 135 case 0:
138 uart1_ck = clk_get(NULL, "uart1_ck"); 136 uart1_ck = clk_get(NULL, "uart1_ck");
@@ -143,16 +141,6 @@ void __init omap_serial_init(void)
143 if (cpu_is_omap15xx()) 141 if (cpu_is_omap15xx())
144 clk_set_rate(uart1_ck, 12000000); 142 clk_set_rate(uart1_ck, 12000000);
145 } 143 }
146 if (cpu_is_omap15xx()) {
147 omap_cfg_reg(UART1_TX);
148 omap_cfg_reg(UART1_RTS);
149 if (machine_is_omap_innovator()) {
150 reg = fpga_read(OMAP1510_FPGA_POWER);
151 reg |= OMAP1510_FPGA_PCR_COM1_EN;
152 fpga_write(reg, OMAP1510_FPGA_POWER);
153 udelay(10);
154 }
155 }
156 break; 144 break;
157 case 1: 145 case 1:
158 uart2_ck = clk_get(NULL, "uart2_ck"); 146 uart2_ck = clk_get(NULL, "uart2_ck");
@@ -165,16 +153,6 @@ void __init omap_serial_init(void)
165 else 153 else
166 clk_set_rate(uart2_ck, 48000000); 154 clk_set_rate(uart2_ck, 48000000);
167 } 155 }
168 if (cpu_is_omap15xx()) {
169 omap_cfg_reg(UART2_TX);
170 omap_cfg_reg(UART2_RTS);
171 if (machine_is_omap_innovator()) {
172 reg = fpga_read(OMAP1510_FPGA_POWER);
173 reg |= OMAP1510_FPGA_PCR_COM2_EN;
174 fpga_write(reg, OMAP1510_FPGA_POWER);
175 udelay(10);
176 }
177 }
178 break; 156 break;
179 case 2: 157 case 2:
180 uart3_ck = clk_get(NULL, "uart3_ck"); 158 uart3_ck = clk_get(NULL, "uart3_ck");
@@ -185,10 +163,6 @@ void __init omap_serial_init(void)
185 if (cpu_is_omap15xx()) 163 if (cpu_is_omap15xx())
186 clk_set_rate(uart3_ck, 12000000); 164 clk_set_rate(uart3_ck, 12000000);
187 } 165 }
188 if (cpu_is_omap15xx()) {
189 omap_cfg_reg(UART3_TX);
190 omap_cfg_reg(UART3_RX);
191 }
192 break; 166 break;
193 } 167 }
194 omap_serial_reset(&serial_platform_data[i]); 168 omap_serial_reset(&serial_platform_data[i]);
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 75b1c7efae7e..aad194f61a33 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -73,9 +73,21 @@ config MACH_OMAP_3430SDP
73 bool "OMAP 3430 SDP board" 73 bool "OMAP 3430 SDP board"
74 depends on ARCH_OMAP3 && ARCH_OMAP34XX 74 depends on ARCH_OMAP3 && ARCH_OMAP34XX
75 75
76config MACH_NOKIA_N800
77 bool
78
79config MACH_NOKIA_N810
80 bool
81
82config MACH_NOKIA_N810_WIMAX
83 bool
84
76config MACH_NOKIA_N8X0 85config MACH_NOKIA_N8X0
77 bool "Nokia N800/N810" 86 bool "Nokia N800/N810"
78 depends on ARCH_OMAP2420 87 depends on ARCH_OMAP2420
88 select MACH_NOKIA_N800
89 select MACH_NOKIA_N810
90 select MACH_NOKIA_N810_WIMAX
79 91
80config MACH_NOKIA_RX51 92config MACH_NOKIA_RX51
81 bool "Nokia RX-51 board" 93 bool "Nokia RX-51 board"
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index efaf053eba85..0acb5560229c 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -17,6 +17,7 @@
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/input.h> 19#include <linux/input.h>
20#include <linux/input/matrix_keypad.h>
20#include <linux/spi/spi.h> 21#include <linux/spi/spi.h>
21#include <linux/spi/ads7846.h> 22#include <linux/spi/ads7846.h>
22#include <linux/i2c/twl4030.h> 23#include <linux/i2c/twl4030.h>
@@ -38,7 +39,6 @@
38#include <mach/gpmc.h> 39#include <mach/gpmc.h>
39 40
40#include <mach/control.h> 41#include <mach/control.h>
41#include <mach/keypad.h>
42#include <mach/gpmc-smc91x.h> 42#include <mach/gpmc-smc91x.h>
43 43
44#include "sdram-qimonda-hyb18m512160af-6.h" 44#include "sdram-qimonda-hyb18m512160af-6.h"
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index eb37c40ea83a..609a5a4a7e29 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -58,6 +58,8 @@ static void __init gic_init_irq(void)
58 58
59static void __init omap_4430sdp_init_irq(void) 59static void __init omap_4430sdp_init_irq(void)
60{ 60{
61 omap_board_config = sdp4430_config;
62 omap_board_config_size = ARRAY_SIZE(sdp4430_config);
61 omap2_init_common_hw(NULL, NULL); 63 omap2_init_common_hw(NULL, NULL);
62#ifdef CONFIG_OMAP_32K_TIMER 64#ifdef CONFIG_OMAP_32K_TIMER
63 omap2_gp_clockevent_set_gptimer(1); 65 omap2_gp_clockevent_set_gptimer(1);
@@ -70,8 +72,6 @@ static void __init omap_4430sdp_init_irq(void)
70static void __init omap_4430sdp_init(void) 72static void __init omap_4430sdp_init(void)
71{ 73{
72 platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices)); 74 platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
73 omap_board_config = sdp4430_config;
74 omap_board_config_size = ARRAY_SIZE(sdp4430_config);
75 omap_serial_init(); 75 omap_serial_init();
76} 76}
77 77
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index d110a7fdfbd8..d57ec2f4d0a9 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -16,6 +16,7 @@
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/input.h> 18#include <linux/input.h>
19#include <linux/input/matrix_keypad.h>
19#include <linux/gpio_keys.h> 20#include <linux/gpio_keys.h>
20#include <linux/workqueue.h> 21#include <linux/workqueue.h>
21#include <linux/err.h> 22#include <linux/err.h>
@@ -41,7 +42,6 @@
41#include <asm/delay.h> 42#include <asm/delay.h>
42#include <mach/control.h> 43#include <mach/control.h>
43#include <mach/usb.h> 44#include <mach/usb.h>
44#include <mach/keypad.h>
45 45
46#include "mmc-twl4030.h" 46#include "mmc-twl4030.h"
47 47
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index e4ec0c591216..4c4d7f8dbd72 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -20,6 +20,7 @@
20#include <linux/clk.h> 20#include <linux/clk.h>
21#include <linux/gpio.h> 21#include <linux/gpio.h>
22#include <linux/input.h> 22#include <linux/input.h>
23#include <linux/input/matrix_keypad.h>
23#include <linux/leds.h> 24#include <linux/leds.h>
24 25
25#include <linux/spi/spi.h> 26#include <linux/spi/spi.h>
@@ -37,7 +38,6 @@
37#include <mach/usb.h> 38#include <mach/usb.h>
38#include <mach/common.h> 39#include <mach/common.h>
39#include <mach/mcspi.h> 40#include <mach/mcspi.h>
40#include <mach/keypad.h>
41 41
42#include "sdram-micron-mt46h32m32lf-6.h" 42#include "sdram-micron-mt46h32m32lf-6.h"
43#include "mmc-twl4030.h" 43#include "mmc-twl4030.h"
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 7f6bf8772af7..5326e0d61597 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -27,6 +27,7 @@
27#include <linux/i2c/twl4030.h> 27#include <linux/i2c/twl4030.h>
28#include <linux/leds.h> 28#include <linux/leds.h>
29#include <linux/input.h> 29#include <linux/input.h>
30#include <linux/input/matrix_keypad.h>
30#include <linux/gpio_keys.h> 31#include <linux/gpio_keys.h>
31 32
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
@@ -39,7 +40,6 @@
39#include <mach/hardware.h> 40#include <mach/hardware.h>
40#include <mach/mcspi.h> 41#include <mach/mcspi.h>
41#include <mach/usb.h> 42#include <mach/usb.h>
42#include <mach/keypad.h>
43#include <mach/mux.h> 43#include <mach/mux.h>
44 44
45#include "sdram-micron-mt46h32m32lf-6.h" 45#include "sdram-micron-mt46h32m32lf-6.h"
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index c1af5326e92f..e34d96a825e3 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -12,6 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/input.h> 14#include <linux/input.h>
15#include <linux/input/matrix_keypad.h>
15#include <linux/spi/spi.h> 16#include <linux/spi/spi.h>
16#include <linux/i2c.h> 17#include <linux/i2c.h>
17#include <linux/i2c/twl4030.h> 18#include <linux/i2c/twl4030.h>
@@ -27,7 +28,6 @@
27#include <mach/common.h> 28#include <mach/common.h>
28#include <mach/dma.h> 29#include <mach/dma.h>
29#include <mach/gpmc.h> 30#include <mach/gpmc.h>
30#include <mach/keypad.h>
31#include <mach/onenand.h> 31#include <mach/onenand.h>
32#include <mach/gpmc-smc91x.h> 32#include <mach/gpmc-smc91x.h>
33 33
@@ -444,7 +444,7 @@ static int __init rx51_i2c_init(void)
444 rx51_twldata.vaux3 = &rx51_vaux3_cam; 444 rx51_twldata.vaux3 = &rx51_vaux3_cam;
445 rx51_twldata.vmmc2 = &rx51_vmmc2; 445 rx51_twldata.vmmc2 = &rx51_vmmc2;
446 } 446 }
447 omap_register_i2c_bus(1, 2600, rx51_peripherals_i2c_board_info_1, 447 omap_register_i2c_bus(1, 2200, rx51_peripherals_i2c_board_info_1,
448 ARRAY_SIZE(rx51_peripherals_i2c_board_info_1)); 448 ARRAY_SIZE(rx51_peripherals_i2c_board_info_1));
449 omap_register_i2c_bus(2, 100, NULL, 0); 449 omap_register_i2c_bus(2, 100, NULL, 0);
450 omap_register_i2c_bus(3, 400, NULL, 0); 450 omap_register_i2c_bus(3, 400, NULL, 0);
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index f9196c3b1a7b..78869a9a1cc2 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -26,7 +26,6 @@
26#include <mach/mux.h> 26#include <mach/mux.h>
27#include <mach/board.h> 27#include <mach/board.h>
28#include <mach/common.h> 28#include <mach/common.h>
29#include <mach/keypad.h>
30#include <mach/dma.h> 29#include <mach/dma.h>
31#include <mach/gpmc.h> 30#include <mach/gpmc.h>
32#include <mach/usb.h> 31#include <mach/usb.h>
diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c
index b7b32208ced7..ea00486a5e53 100644
--- a/arch/arm/mach-omap2/board-zoom2.c
+++ b/arch/arm/mach-omap2/board-zoom2.c
@@ -13,6 +13,7 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/input.h> 15#include <linux/input.h>
16#include <linux/input/matrix_keypad.h>
16#include <linux/gpio.h> 17#include <linux/gpio.h>
17#include <linux/i2c/twl4030.h> 18#include <linux/i2c/twl4030.h>
18#include <linux/regulator/machine.h> 19#include <linux/regulator/machine.h>
@@ -22,9 +23,9 @@
22 23
23#include <mach/common.h> 24#include <mach/common.h>
24#include <mach/usb.h> 25#include <mach/usb.h>
25#include <mach/keypad.h>
26 26
27#include "mmc-twl4030.h" 27#include "mmc-twl4030.h"
28#include "sdram-micron-mt46h32m32lf-6.h"
28 29
29/* Zoom2 has Qwerty keyboard*/ 30/* Zoom2 has Qwerty keyboard*/
30static int board_keymap[] = { 31static int board_keymap[] = {
@@ -213,7 +214,8 @@ static void __init omap_zoom2_init_irq(void)
213{ 214{
214 omap_board_config = zoom2_config; 215 omap_board_config = zoom2_config;
215 omap_board_config_size = ARRAY_SIZE(zoom2_config); 216 omap_board_config_size = ARRAY_SIZE(zoom2_config);
216 omap2_init_common_hw(NULL, NULL); 217 omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
218 mt46h32m32lf6_sdrc_params);
217 omap_init_irq(); 219 omap_init_irq();
218 omap_gpio_init(); 220 omap_gpio_init();
219} 221}
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index bc5d3ac66611..e2dbedd581e8 100644
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -769,6 +769,7 @@ int __init omap2_clk_init(void)
769 if (c->cpu & cpu_mask) { 769 if (c->cpu & cpu_mask) {
770 clkdev_add(&c->lk); 770 clkdev_add(&c->lk);
771 clk_register(c->lk.clk); 771 clk_register(c->lk.clk);
772 omap2_init_clk_clkdm(c->lk.clk);
772 } 773 }
773 774
774 /* Check the MPU rate set by bootloader */ 775 /* Check the MPU rate set by bootloader */
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 4ef7b4f5474e..58aff8485df9 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -137,6 +137,36 @@ static void _clkdm_del_autodeps(struct clockdomain *clkdm)
137 } 137 }
138} 138}
139 139
140/*
141 * _omap2_clkdm_set_hwsup - set the hwsup idle transition bit
142 * @clkdm: struct clockdomain *
143 * @enable: int 0 to disable, 1 to enable
144 *
145 * Internal helper for actually switching the bit that controls hwsup
146 * idle transitions for clkdm.
147 */
148static void _omap2_clkdm_set_hwsup(struct clockdomain *clkdm, int enable)
149{
150 u32 v;
151
152 if (cpu_is_omap24xx()) {
153 if (enable)
154 v = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
155 else
156 v = OMAP24XX_CLKSTCTRL_DISABLE_AUTO;
157 } else if (cpu_is_omap34xx()) {
158 if (enable)
159 v = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
160 else
161 v = OMAP34XX_CLKSTCTRL_DISABLE_AUTO;
162 } else {
163 BUG();
164 }
165
166 cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask,
167 v << __ffs(clkdm->clktrctrl_mask),
168 clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL);
169}
140 170
141static struct clockdomain *_clkdm_lookup(const char *name) 171static struct clockdomain *_clkdm_lookup(const char *name)
142{ 172{
@@ -456,8 +486,6 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm)
456 */ 486 */
457void omap2_clkdm_allow_idle(struct clockdomain *clkdm) 487void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
458{ 488{
459 u32 v;
460
461 if (!clkdm) 489 if (!clkdm)
462 return; 490 return;
463 491
@@ -473,18 +501,7 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
473 if (atomic_read(&clkdm->usecount) > 0) 501 if (atomic_read(&clkdm->usecount) > 0)
474 _clkdm_add_autodeps(clkdm); 502 _clkdm_add_autodeps(clkdm);
475 503
476 if (cpu_is_omap24xx()) 504 _omap2_clkdm_set_hwsup(clkdm, 1);
477 v = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
478 else if (cpu_is_omap34xx())
479 v = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
480 else
481 BUG();
482
483
484 cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask,
485 v << __ffs(clkdm->clktrctrl_mask),
486 clkdm->pwrdm.ptr->prcm_offs,
487 CM_CLKSTCTRL);
488 505
489 pwrdm_clkdm_state_switch(clkdm); 506 pwrdm_clkdm_state_switch(clkdm);
490} 507}
@@ -500,8 +517,6 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
500 */ 517 */
501void omap2_clkdm_deny_idle(struct clockdomain *clkdm) 518void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
502{ 519{
503 u32 v;
504
505 if (!clkdm) 520 if (!clkdm)
506 return; 521 return;
507 522
@@ -514,16 +529,7 @@ void omap2_clkdm_deny_idle(struct clockdomain *clkdm)
514 pr_debug("clockdomain: disabling automatic idle transitions for %s\n", 529 pr_debug("clockdomain: disabling automatic idle transitions for %s\n",
515 clkdm->name); 530 clkdm->name);
516 531
517 if (cpu_is_omap24xx()) 532 _omap2_clkdm_set_hwsup(clkdm, 0);
518 v = OMAP24XX_CLKSTCTRL_DISABLE_AUTO;
519 else if (cpu_is_omap34xx())
520 v = OMAP34XX_CLKSTCTRL_DISABLE_AUTO;
521 else
522 BUG();
523
524 cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask,
525 v << __ffs(clkdm->clktrctrl_mask),
526 clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL);
527 533
528 if (atomic_read(&clkdm->usecount) > 0) 534 if (atomic_read(&clkdm->usecount) > 0)
529 _clkdm_del_autodeps(clkdm); 535 _clkdm_del_autodeps(clkdm);
@@ -569,10 +575,14 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
569 v = omap2_clkdm_clktrctrl_read(clkdm); 575 v = omap2_clkdm_clktrctrl_read(clkdm);
570 576
571 if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || 577 if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ||
572 (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) 578 (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) {
579 /* Disable HW transitions when we are changing deps */
580 _omap2_clkdm_set_hwsup(clkdm, 0);
573 _clkdm_add_autodeps(clkdm); 581 _clkdm_add_autodeps(clkdm);
574 else 582 _omap2_clkdm_set_hwsup(clkdm, 1);
583 } else {
575 omap2_clkdm_wakeup(clkdm); 584 omap2_clkdm_wakeup(clkdm);
585 }
576 586
577 pwrdm_wait_transition(clkdm->pwrdm.ptr); 587 pwrdm_wait_transition(clkdm->pwrdm.ptr);
578 pwrdm_clkdm_state_switch(clkdm); 588 pwrdm_clkdm_state_switch(clkdm);
@@ -623,10 +633,14 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
623 v = omap2_clkdm_clktrctrl_read(clkdm); 633 v = omap2_clkdm_clktrctrl_read(clkdm);
624 634
625 if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || 635 if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ||
626 (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) 636 (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) {
637 /* Disable HW transitions when we are changing deps */
638 _omap2_clkdm_set_hwsup(clkdm, 0);
627 _clkdm_del_autodeps(clkdm); 639 _clkdm_del_autodeps(clkdm);
628 else 640 _omap2_clkdm_set_hwsup(clkdm, 1);
641 } else {
629 omap2_clkdm_sleep(clkdm); 642 omap2_clkdm_sleep(clkdm);
643 }
630 644
631 pwrdm_clkdm_state_switch(clkdm); 645 pwrdm_clkdm_state_switch(clkdm);
632 646
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index e3a3bad1d84f..56be87d13edb 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -302,7 +302,9 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
302 pwrdm_init(powerdomains_omap); 302 pwrdm_init(powerdomains_omap);
303 clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps); 303 clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
304 omap2_clk_init(); 304 omap2_clk_init();
305#endif
305 omap_serial_early_init(); 306 omap_serial_early_init();
307#ifndef CONFIG_ARCH_OMAP4
306 omap_hwmod_late_init(); 308 omap_hwmod_late_init();
307 omap_pm_if_init(); 309 omap_pm_if_init();
308 omap2_sdrc_init(sdrc_cs0, sdrc_cs1); 310 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 378c2f618358..89463190923a 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -639,14 +639,15 @@ static void __init prcm_setup_regs(void)
639 prm_write_mod_reg(OMAP3430_IO_EN | OMAP3430_WKUP_EN, 639 prm_write_mod_reg(OMAP3430_IO_EN | OMAP3430_WKUP_EN,
640 OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); 640 OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET);
641 641
642 /* Enable GPIO wakeups in PER */ 642 /* Enable wakeups in PER */
643 prm_write_mod_reg(OMAP3430_EN_GPIO2 | OMAP3430_EN_GPIO3 | 643 prm_write_mod_reg(OMAP3430_EN_GPIO2 | OMAP3430_EN_GPIO3 |
644 OMAP3430_EN_GPIO4 | OMAP3430_EN_GPIO5 | 644 OMAP3430_EN_GPIO4 | OMAP3430_EN_GPIO5 |
645 OMAP3430_EN_GPIO6, OMAP3430_PER_MOD, PM_WKEN); 645 OMAP3430_EN_GPIO6 | OMAP3430_EN_UART3,
646 OMAP3430_PER_MOD, PM_WKEN);
646 /* and allow them to wake up MPU */ 647 /* and allow them to wake up MPU */
647 prm_write_mod_reg(OMAP3430_GRPSEL_GPIO2 | OMAP3430_EN_GPIO3 | 648 prm_write_mod_reg(OMAP3430_GRPSEL_GPIO2 | OMAP3430_EN_GPIO3 |
648 OMAP3430_GRPSEL_GPIO4 | OMAP3430_EN_GPIO5 | 649 OMAP3430_GRPSEL_GPIO4 | OMAP3430_EN_GPIO5 |
649 OMAP3430_GRPSEL_GPIO6, 650 OMAP3430_GRPSEL_GPIO6 | OMAP3430_EN_UART3,
650 OMAP3430_PER_MOD, OMAP3430_PM_MPUGRPSEL); 651 OMAP3430_PER_MOD, OMAP3430_PM_MPUGRPSEL);
651 652
652 /* Don't attach IVA interrupts */ 653 /* Don't attach IVA interrupts */
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index ae2186892c85..54dfeb5d5667 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -109,16 +109,6 @@ static struct plat_serial8250_port serial_platform_data2[] = {
109 .regshift = 2, 109 .regshift = 2,
110 .uartclk = OMAP24XX_BASE_BAUD * 16, 110 .uartclk = OMAP24XX_BASE_BAUD * 16,
111 }, { 111 }, {
112#ifdef CONFIG_ARCH_OMAP4
113 .membase = OMAP2_IO_ADDRESS(OMAP_UART4_BASE),
114 .mapbase = OMAP_UART4_BASE,
115 .irq = 70,
116 .flags = UPF_BOOT_AUTOCONF,
117 .iotype = UPIO_MEM,
118 .regshift = 2,
119 .uartclk = OMAP24XX_BASE_BAUD * 16,
120 }, {
121#endif
122 .flags = 0 112 .flags = 0
123 } 113 }
124}; 114};
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index aac2cda60e09..102916f1e465 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -43,10 +43,10 @@
43 43
44#define CM_X300_ETH_PHYS 0x08000010 44#define CM_X300_ETH_PHYS 0x08000010
45 45
46#define GPIO82_MMC2_IRQ (82) 46#define GPIO82_MMC_IRQ (82)
47#define GPIO85_MMC2_WP (85) 47#define GPIO85_MMC_WP (85)
48 48
49#define CM_X300_MMC2_IRQ IRQ_GPIO(GPIO82_MMC2_IRQ) 49#define CM_X300_MMC_IRQ IRQ_GPIO(GPIO82_MMC_IRQ)
50 50
51#define GPIO95_RTC_CS (95) 51#define GPIO95_RTC_CS (95)
52#define GPIO96_RTC_WR (96) 52#define GPIO96_RTC_WR (96)
@@ -292,37 +292,37 @@ static inline void cm_x300_init_nand(void) {}
292#endif 292#endif
293 293
294#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE) 294#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
295/* The first MMC slot of CM-X300 is hardwired to Libertas card and has 295static struct pxamci_platform_data cm_x300_mci_platform_data = {
296 .detect_delay = 20,
297 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
298 .gpio_card_detect = GPIO82_MMC_IRQ,
299 .gpio_card_ro = GPIO85_MMC_WP,
300 .gpio_power = -1,
301};
302
303/* The second MMC slot of CM-X300 is hardwired to Libertas card and has
296 no detection/ro pins */ 304 no detection/ro pins */
297static int cm_x300_mci_init(struct device *dev, 305static int cm_x300_mci2_init(struct device *dev,
298 irq_handler_t cm_x300_detect_int, 306 irq_handler_t cm_x300_detect_int,
299 void *data) 307 void *data)
300{ 308{
301 return 0; 309 return 0;
302} 310}
303 311
304static void cm_x300_mci_exit(struct device *dev, void *data) 312static void cm_x300_mci2_exit(struct device *dev, void *data)
305{ 313{
306} 314}
307 315
308static struct pxamci_platform_data cm_x300_mci_platform_data = { 316static struct pxamci_platform_data cm_x300_mci2_platform_data = {
309 .detect_delay = 20, 317 .detect_delay = 20,
310 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 318 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
311 .init = cm_x300_mci_init, 319 .init = cm_x300_mci2_init,
312 .exit = cm_x300_mci_exit, 320 .exit = cm_x300_mci2_exit,
313 .gpio_card_detect = -1, 321 .gpio_card_detect = -1,
314 .gpio_card_ro = -1, 322 .gpio_card_ro = -1,
315 .gpio_power = -1, 323 .gpio_power = -1,
316}; 324};
317 325
318static struct pxamci_platform_data cm_x300_mci2_platform_data = {
319 .detect_delay = 20,
320 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
321 .gpio_card_detect = GPIO82_MMC2_IRQ,
322 .gpio_card_ro = GPIO85_MMC2_WP,
323 .gpio_power = -1,
324};
325
326static void __init cm_x300_init_mmc(void) 326static void __init cm_x300_init_mmc(void)
327{ 327{
328 pxa_set_mci_info(&cm_x300_mci_platform_data); 328 pxa_set_mci_info(&cm_x300_mci_platform_data);
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
index 3a8ee2272add..983cc8c20081 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
@@ -155,7 +155,7 @@ MODULE_PARM_DESC(pxa255_turbo_table, "Selects the frequency table (0 = run table
155 155
156static pxa_freqs_t pxa27x_freqs[] = { 156static pxa_freqs_t pxa27x_freqs[] = {
157 {104000, 104000, PXA27x_CCCR(1, 8, 2), 0, CCLKCFG2(1, 0, 1), 900000, 1705000 }, 157 {104000, 104000, PXA27x_CCCR(1, 8, 2), 0, CCLKCFG2(1, 0, 1), 900000, 1705000 },
158 {156000, 104000, PXA27x_CCCR(1, 8, 6), 0, CCLKCFG2(1, 1, 1), 1000000, 1705000 }, 158 {156000, 104000, PXA27x_CCCR(1, 8, 3), 0, CCLKCFG2(1, 0, 1), 1000000, 1705000 },
159 {208000, 208000, PXA27x_CCCR(0, 16, 2), 1, CCLKCFG2(0, 0, 1), 1180000, 1705000 }, 159 {208000, 208000, PXA27x_CCCR(0, 16, 2), 1, CCLKCFG2(0, 0, 1), 1180000, 1705000 },
160 {312000, 208000, PXA27x_CCCR(1, 16, 3), 1, CCLKCFG2(1, 0, 1), 1250000, 1705000 }, 160 {312000, 208000, PXA27x_CCCR(1, 16, 3), 1, CCLKCFG2(1, 0, 1), 1250000, 1705000 },
161 {416000, 208000, PXA27x_CCCR(1, 16, 4), 1, CCLKCFG2(1, 0, 1), 1350000, 1705000 }, 161 {416000, 208000, PXA27x_CCCR(1, 16, 4), 1, CCLKCFG2(1, 0, 1), 1350000, 1705000 },
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c
index 79141f862728..965480eb4fe6 100644
--- a/arch/arm/mach-pxa/csb726.c
+++ b/arch/arm/mach-pxa/csb726.c
@@ -238,7 +238,7 @@ static struct resource csb726_lan_resources[] = {
238}; 238};
239 239
240struct smsc911x_platform_config csb726_lan_config = { 240struct smsc911x_platform_config csb726_lan_config = {
241 .irq_type = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, 241 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
242 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, 242 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
243 .flags = SMSC911X_USE_32BIT, 243 .flags = SMSC911X_USE_32BIT,
244 .phy_interface = PHY_INTERFACE_MODE_MII, 244 .phy_interface = PHY_INTERFACE_MODE_MII,
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index ee8d6038ce82..82ff5733e4dc 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -15,6 +15,7 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/gpio_keys.h>
18#include <linux/gpio.h> 19#include <linux/gpio.h>
19#include <linux/leds.h> 20#include <linux/leds.h>
20#include <linux/mtd/physmap.h> 21#include <linux/mtd/physmap.h>
@@ -375,6 +376,43 @@ static struct platform_device spitzkbd_device = {
375}; 376};
376 377
377 378
379static struct gpio_keys_button spitz_gpio_keys[] = {
380 {
381 .type = EV_PWR,
382 .code = KEY_SUSPEND,
383 .gpio = SPITZ_GPIO_ON_KEY,
384 .desc = "On/Off",
385 .wakeup = 1,
386 },
387 /* Two buttons detecting the lid state */
388 {
389 .type = EV_SW,
390 .code = 0,
391 .gpio = SPITZ_GPIO_SWA,
392 .desc = "Display Down",
393 },
394 {
395 .type = EV_SW,
396 .code = 1,
397 .gpio = SPITZ_GPIO_SWB,
398 .desc = "Lid Closed",
399 },
400};
401
402static struct gpio_keys_platform_data spitz_gpio_keys_platform_data = {
403 .buttons = spitz_gpio_keys,
404 .nbuttons = ARRAY_SIZE(spitz_gpio_keys),
405};
406
407static struct platform_device spitz_gpio_keys_device = {
408 .name = "gpio-keys",
409 .id = -1,
410 .dev = {
411 .platform_data = &spitz_gpio_keys_platform_data,
412 },
413};
414
415
378/* 416/*
379 * Spitz LEDs 417 * Spitz LEDs
380 */ 418 */
@@ -689,6 +727,7 @@ static struct platform_device sharpsl_rom_device = {
689static struct platform_device *devices[] __initdata = { 727static struct platform_device *devices[] __initdata = {
690 &spitzscoop_device, 728 &spitzscoop_device,
691 &spitzkbd_device, 729 &spitzkbd_device,
730 &spitz_gpio_keys_device,
692 &spitzled_device, 731 &spitzled_device,
693 &sharpsl_nand_device, 732 &sharpsl_nand_device,
694 &sharpsl_rom_device, 733 &sharpsl_rom_device,
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 46cd6acb4d40..699671fa6e0b 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -61,5 +61,5 @@ extern void realview_timer_init(unsigned int timer_irq);
61extern int realview_flash_register(struct resource *res, u32 num); 61extern int realview_flash_register(struct resource *res, u32 num);
62extern int realview_eth_register(const char *name, struct resource *res); 62extern int realview_eth_register(const char *name, struct resource *res);
63extern int realview_usb_register(struct resource *res); 63extern int realview_usb_register(struct resource *res);
64 64extern void (*realview_reset)(char);
65#endif 65#endif
diff --git a/arch/arm/mach-realview/include/mach/board-pb1176.h b/arch/arm/mach-realview/include/mach/board-pb1176.h
index 98f8e7eeacc2..34b80b7d40b8 100644
--- a/arch/arm/mach-realview/include/mach/board-pb1176.h
+++ b/arch/arm/mach-realview/include/mach/board-pb1176.h
@@ -73,4 +73,9 @@
73#define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */ 73#define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */
74#define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */ 74#define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */
75 75
76/*
77 * Control register SYS_RESETCTL is set to 1 to force a soft reset
78 */
79#define REALVIEW_PB1176_SYS_LOCKVAL_RSTCTL 0x0100
80
76#endif /* __ASM_ARCH_BOARD_PB1176_H */ 81#endif /* __ASM_ARCH_BOARD_PB1176_H */
diff --git a/arch/arm/mach-realview/include/mach/board-pb11mp.h b/arch/arm/mach-realview/include/mach/board-pb11mp.h
index f0d68e0fea01..7abf918b77e9 100644
--- a/arch/arm/mach-realview/include/mach/board-pb11mp.h
+++ b/arch/arm/mach-realview/include/mach/board-pb11mp.h
@@ -81,4 +81,16 @@
81#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */ 81#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */
82#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */ 82#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */
83 83
84 /*
85 * Values for REALVIEW_SYS_RESET_CTRL
86 */
87#define REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGCLR 0x01
88#define REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGINIT 0x02
89#define REALVIEW_PB11MP_SYS_CTRL_RESET_DLLRESET 0x03
90#define REALVIEW_PB11MP_SYS_CTRL_RESET_PLLRESET 0x04
91#define REALVIEW_PB11MP_SYS_CTRL_RESET_POR 0x05
92#define REALVIEW_PB11MP_SYS_CTRL_RESET_DoC 0x06
93
94#define REALVIEW_PB11MP_SYS_CTRL_LED (1 << 0)
95
84#endif /* __ASM_ARCH_BOARD_PB11MP_H */ 96#endif /* __ASM_ARCH_BOARD_PB11MP_H */
diff --git a/arch/arm/mach-realview/include/mach/platform.h b/arch/arm/mach-realview/include/mach/platform.h
index c8f50835fed2..4f46bf71e752 100644
--- a/arch/arm/mach-realview/include/mach/platform.h
+++ b/arch/arm/mach-realview/include/mach/platform.h
@@ -119,19 +119,6 @@
119#define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET) 119#define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET)
120#define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET) 120#define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET)
121 121
122/*
123 * Values for REALVIEW_SYS_RESET_CTRL
124 */
125#define REALVIEW_SYS_CTRL_RESET_CONFIGCLR 0x01
126#define REALVIEW_SYS_CTRL_RESET_CONFIGINIT 0x02
127#define REALVIEW_SYS_CTRL_RESET_DLLRESET 0x03
128#define REALVIEW_SYS_CTRL_RESET_PLLRESET 0x04
129#define REALVIEW_SYS_CTRL_RESET_POR 0x05
130#define REALVIEW_SYS_CTRL_RESET_DoC 0x06
131
132#define REALVIEW_SYS_CTRL_LED (1 << 0)
133
134
135/* ------------------------------------------------------------------------ 122/* ------------------------------------------------------------------------
136 * RealView control registers 123 * RealView control registers
137 * ------------------------------------------------------------------------ 124 * ------------------------------------------------------------------------
@@ -153,7 +140,7 @@
153 * SYS_CLD, SYS_BOOTCS 140 * SYS_CLD, SYS_BOOTCS
154 */ 141 */
155#define REALVIEW_SYS_LOCK_LOCKED (1 << 16) 142#define REALVIEW_SYS_LOCK_LOCKED (1 << 16)
156#define REALVIEW_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */ 143#define REALVIEW_SYS_LOCKVAL_MASK 0xA05F /* Enable write access */
157 144
158/* 145/*
159 * REALVIEW_SYS_FLASH 146 * REALVIEW_SYS_FLASH
diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h
index 1a15a441e027..a30f2e3ec178 100644
--- a/arch/arm/mach-realview/include/mach/system.h
+++ b/arch/arm/mach-realview/include/mach/system.h
@@ -25,6 +25,8 @@
25#include <mach/hardware.h> 25#include <mach/hardware.h>
26#include <mach/platform.h> 26#include <mach/platform.h>
27 27
28void (*realview_reset)(char mode);
29
28static inline void arch_idle(void) 30static inline void arch_idle(void)
29{ 31{
30 /* 32 /*
@@ -36,16 +38,12 @@ static inline void arch_idle(void)
36 38
37static inline void arch_reset(char mode, const char *cmd) 39static inline void arch_reset(char mode, const char *cmd)
38{ 40{
39 void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET;
40 unsigned int val;
41
42 /* 41 /*
43 * To reset, we hit the on-board reset register 42 * To reset, we hit the on-board reset register
44 * in the system FPGA 43 * in the system FPGA
45 */ 44 */
46 val = __raw_readl(hdr_ctrl); 45 if (realview_reset)
47 val |= REALVIEW_SYS_CTRL_RESET_CONFIGCLR; 46 realview_reset(mode);
48 __raw_writel(val, hdr_ctrl);
49} 47}
50 48
51#endif 49#endif
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index 2817fe099319..a6ba147692c1 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -290,6 +290,16 @@ static struct sys_timer realview_pb1176_timer = {
290 .init = realview_pb1176_timer_init, 290 .init = realview_pb1176_timer_init,
291}; 291};
292 292
293static void realview_pb1176_reset(char mode)
294{
295 void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) +
296 REALVIEW_SYS_RESETCTL_OFFSET;
297 void __iomem *rst_hdr_ctrl = __io_address(REALVIEW_SYS_BASE) +
298 REALVIEW_SYS_LOCK_OFFSET;
299 __raw_writel(REALVIEW_SYS_LOCKVAL_MASK, rst_hdr_ctrl);
300 __raw_writel(REALVIEW_PB1176_SYS_LOCKVAL_RSTCTL, hdr_ctrl);
301}
302
293static void __init realview_pb1176_init(void) 303static void __init realview_pb1176_init(void)
294{ 304{
295 int i; 305 int i;
@@ -313,6 +323,7 @@ static void __init realview_pb1176_init(void)
313#ifdef CONFIG_LEDS 323#ifdef CONFIG_LEDS
314 leds_event = realview_leds_event; 324 leds_event = realview_leds_event;
315#endif 325#endif
326 realview_reset = realview_pb1176_reset;
316} 327}
317 328
318MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176") 329MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 94680fcf726d..070d284ce96e 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -299,6 +299,21 @@ static struct sys_timer realview_pb11mp_timer = {
299 .init = realview_pb11mp_timer_init, 299 .init = realview_pb11mp_timer_init,
300}; 300};
301 301
302static void realview_pb11mp_reset(char mode)
303{
304 void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) +
305 REALVIEW_SYS_RESETCTL_OFFSET;
306 unsigned int val;
307
308 /*
309 * To reset, we hit the on-board reset register
310 * in the system FPGA
311 */
312 val = __raw_readl(hdr_ctrl);
313 val |= REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGCLR;
314 __raw_writel(val, hdr_ctrl);
315}
316
302static void __init realview_pb11mp_init(void) 317static void __init realview_pb11mp_init(void)
303{ 318{
304 int i; 319 int i;
@@ -324,6 +339,7 @@ static void __init realview_pb11mp_init(void)
324#ifdef CONFIG_LEDS 339#ifdef CONFIG_LEDS
325 leds_event = realview_leds_event; 340 leds_event = realview_leds_event;
326#endif 341#endif
342 realview_reset = realview_pb11mp_reset;
327} 343}
328 344
329MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") 345MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
diff --git a/arch/arm/mach-s3c2410/gpio.c b/arch/arm/mach-s3c2410/gpio.c
index 7974afca297c..9664e011dae2 100644
--- a/arch/arm/mach-s3c2410/gpio.c
+++ b/arch/arm/mach-s3c2410/gpio.c
@@ -28,6 +28,7 @@
28#include <linux/io.h> 28#include <linux/io.h>
29 29
30#include <mach/hardware.h> 30#include <mach/hardware.h>
31#include <mach/gpio-fns.h>
31#include <asm/irq.h> 32#include <asm/irq.h>
32 33
33#include <mach/regs-gpio.h> 34#include <mach/regs-gpio.h>
diff --git a/arch/arm/mach-s3c2410/include/mach/dma.h b/arch/arm/mach-s3c2410/include/mach/dma.h
index c3a2629e0ded..92e2687009ea 100644
--- a/arch/arm/mach-s3c2410/include/mach/dma.h
+++ b/arch/arm/mach-s3c2410/include/mach/dma.h
@@ -110,6 +110,8 @@ enum s3c2410_dma_loadst {
110 * waiting for reloads */ 110 * waiting for reloads */
111#define S3C2410_DMAF_AUTOSTART (1<<1) /* auto-start if buffer queued */ 111#define S3C2410_DMAF_AUTOSTART (1<<1) /* auto-start if buffer queued */
112 112
113#define S3C2410_DMAF_CIRCULAR (1 << 2) /* no circular dma support */
114
113/* dma buffer */ 115/* dma buffer */
114 116
115struct s3c2410_dma_buf; 117struct s3c2410_dma_buf;
@@ -194,4 +196,9 @@ struct s3c2410_dma_chan {
194 196
195typedef unsigned long dma_device_t; 197typedef unsigned long dma_device_t;
196 198
199static inline bool s3c_dma_has_circular(void)
200{
201 return false;
202}
203
197#endif /* __ASM_ARCH_DMA_H */ 204#endif /* __ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index d7bba919a77e..a8b69d77571b 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -103,6 +103,7 @@ config MACH_MINI2440
103 select LEDS_TRIGGER_BACKLIGHT 103 select LEDS_TRIGGER_BACKLIGHT
104 select SND_S3C24XX_SOC_S3C24XX_UDA134X 104 select SND_S3C24XX_SOC_S3C24XX_UDA134X
105 select S3C_DEV_NAND 105 select S3C_DEV_NAND
106 select S3C_DEV_USB_HOST
106 help 107 help
107 Say Y here to select support for the MINI2440. Is a 10cm x 10cm board 108 Say Y here to select support for the MINI2440. Is a 10cm x 10cm board
108 available via various sources. It can come with a 3.5" or 7" touch LCD. 109 available via various sources. It can come with a 3.5" or 7" touch LCD.
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index ec71a6965786..1c3382fefdd2 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -144,7 +144,7 @@ static struct s3c2410_udc_mach_info mini2440_udc_cfg __initdata = {
144 .type = (S3C2410_LCDCON1_TFT16BPP |\ 144 .type = (S3C2410_LCDCON1_TFT16BPP |\
145 S3C2410_LCDCON1_TFT) 145 S3C2410_LCDCON1_TFT)
146 146
147struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = { 147static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
148 [0] = { /* mini2440 + 3.5" TFT + touchscreen */ 148 [0] = { /* mini2440 + 3.5" TFT + touchscreen */
149 _LCD_DECLARE( 149 _LCD_DECLARE(
150 7, /* The 3.5 is quite fast */ 150 7, /* The 3.5 is quite fast */
@@ -191,7 +191,7 @@ struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
191#define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2)) 191#define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2))
192#define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2)) 192#define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2))
193 193
194struct s3c2410fb_mach_info mini2440_fb_info __initdata = { 194static struct s3c2410fb_mach_info mini2440_fb_info __initdata = {
195 .displays = &mini2440_lcd_cfg[0], /* not constant! see init */ 195 .displays = &mini2440_lcd_cfg[0], /* not constant! see init */
196 .num_displays = 1, 196 .num_displays = 1,
197 .default_display = 0, 197 .default_display = 0,
diff --git a/arch/arm/mach-s3c6400/include/mach/dma.h b/arch/arm/mach-s3c6400/include/mach/dma.h
index 1067619f0ba0..004edab23954 100644
--- a/arch/arm/mach-s3c6400/include/mach/dma.h
+++ b/arch/arm/mach-s3c6400/include/mach/dma.h
@@ -68,6 +68,11 @@ static __inline__ int s3c_dma_has_circular(void)
68 68
69#define S3C2410_DMAF_CIRCULAR (1 << 0) 69#define S3C2410_DMAF_CIRCULAR (1 << 0)
70 70
71static inline bool s3c_dma_has_circular(void)
72{
73 return false;
74}
75
71#include <plat/dma.h> 76#include <plat/dma.h>
72 77
73#endif /* __ASM_ARCH_IRQ_H */ 78#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile
index 8a5546e6d547..bb7b8198d0c4 100644
--- a/arch/arm/mach-sa1100/Makefile
+++ b/arch/arm/mach-sa1100/Makefile
@@ -25,6 +25,7 @@ led-$(CONFIG_SA1100_CERF) += leds-cerf.o
25 25
26obj-$(CONFIG_SA1100_COLLIE) += collie.o 26obj-$(CONFIG_SA1100_COLLIE) += collie.o
27 27
28obj-$(CONFIG_SA1100_H3100) += h3600.o
28obj-$(CONFIG_SA1100_H3600) += h3600.o 29obj-$(CONFIG_SA1100_H3600) += h3600.o
29 30
30obj-$(CONFIG_SA1100_HACKKIT) += hackkit.o 31obj-$(CONFIG_SA1100_HACKKIT) += hackkit.o
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index e993140edd88..9264d814cd7a 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -122,10 +122,7 @@ config CPU_ARM920T
122 select CPU_TLB_V4WBI if MMU 122 select CPU_TLB_V4WBI if MMU
123 help 123 help
124 The ARM920T is licensed to be produced by numerous vendors, 124 The ARM920T is licensed to be produced by numerous vendors,
125 and is used in the Maverick EP9312 and the Samsung S3C2410. 125 and is used in the Cirrus EP93xx and the Samsung S3C2410.
126
127 More information on the Maverick EP9312 at
128 <http://linuxdevices.com/products/PD2382866068.html>.
129 126
130 Say Y if you want support for the ARM920T processor. 127 Say Y if you want support for the ARM920T processor.
131 Otherwise, say N. 128 Otherwise, say N.
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
index 8f5c13f4c936..295e25dd6381 100644
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -12,6 +12,7 @@
12#include <linux/linkage.h> 12#include <linux/linkage.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <asm/assembler.h> 14#include <asm/assembler.h>
15#include <asm/unwind.h>
15 16
16#include "proc-macros.S" 17#include "proc-macros.S"
17 18
@@ -121,11 +122,13 @@ ENTRY(v6_coherent_kern_range)
121 * - the Icache does not read data from the write buffer 122 * - the Icache does not read data from the write buffer
122 */ 123 */
123ENTRY(v6_coherent_user_range) 124ENTRY(v6_coherent_user_range)
124 125 UNWIND(.fnstart )
125#ifdef HARVARD_CACHE 126#ifdef HARVARD_CACHE
126 bic r0, r0, #CACHE_LINE_SIZE - 1 127 bic r0, r0, #CACHE_LINE_SIZE - 1
1271: mcr p15, 0, r0, c7, c10, 1 @ clean D line 1281:
129 USER( mcr p15, 0, r0, c7, c10, 1 ) @ clean D line
128 add r0, r0, #CACHE_LINE_SIZE 130 add r0, r0, #CACHE_LINE_SIZE
1312:
129 cmp r0, r1 132 cmp r0, r1
130 blo 1b 133 blo 1b
131#endif 134#endif
@@ -143,6 +146,19 @@ ENTRY(v6_coherent_user_range)
143 mov pc, lr 146 mov pc, lr
144 147
145/* 148/*
149 * Fault handling for the cache operation above. If the virtual address in r0
150 * isn't mapped, just try the next page.
151 */
1529001:
153 mov r0, r0, lsr #12
154 mov r0, r0, lsl #12
155 add r0, r0, #4096
156 b 2b
157 UNWIND(.fnend )
158ENDPROC(v6_coherent_user_range)
159ENDPROC(v6_coherent_kern_range)
160
161/*
146 * v6_flush_kern_dcache_page(kaddr) 162 * v6_flush_kern_dcache_page(kaddr)
147 * 163 *
148 * Ensure that the data held in the page kaddr is written back 164 * Ensure that the data held in the page kaddr is written back
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index bda0ec31a4e2..e1bd9759617f 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -13,6 +13,7 @@
13#include <linux/linkage.h> 13#include <linux/linkage.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <asm/assembler.h> 15#include <asm/assembler.h>
16#include <asm/unwind.h>
16 17
17#include "proc-macros.S" 18#include "proc-macros.S"
18 19
@@ -153,13 +154,16 @@ ENTRY(v7_coherent_kern_range)
153 * - the Icache does not read data from the write buffer 154 * - the Icache does not read data from the write buffer
154 */ 155 */
155ENTRY(v7_coherent_user_range) 156ENTRY(v7_coherent_user_range)
157 UNWIND(.fnstart )
156 dcache_line_size r2, r3 158 dcache_line_size r2, r3
157 sub r3, r2, #1 159 sub r3, r2, #1
158 bic r0, r0, r3 160 bic r0, r0, r3
1591: mcr p15, 0, r0, c7, c11, 1 @ clean D line to the point of unification 1611:
162 USER( mcr p15, 0, r0, c7, c11, 1 ) @ clean D line to the point of unification
160 dsb 163 dsb
161 mcr p15, 0, r0, c7, c5, 1 @ invalidate I line 164 USER( mcr p15, 0, r0, c7, c5, 1 ) @ invalidate I line
162 add r0, r0, r2 165 add r0, r0, r2
1662:
163 cmp r0, r1 167 cmp r0, r1
164 blo 1b 168 blo 1b
165 mov r0, #0 169 mov r0, #0
@@ -167,6 +171,17 @@ ENTRY(v7_coherent_user_range)
167 dsb 171 dsb
168 isb 172 isb
169 mov pc, lr 173 mov pc, lr
174
175/*
176 * Fault handling for the cache operation above. If the virtual address in r0
177 * isn't mapped, just try the next page.
178 */
1799001:
180 mov r0, r0, lsr #12
181 mov r0, r0, lsl #12
182 add r0, r0, #4096
183 b 2b
184 UNWIND(.fnend )
170ENDPROC(v7_coherent_kern_range) 185ENDPROC(v7_coherent_kern_range)
171ENDPROC(v7_coherent_user_range) 186ENDPROC(v7_coherent_user_range)
172 187
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index 6bda76a43199..a9e22e31eaa1 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -50,10 +50,7 @@ void __new_context(struct mm_struct *mm)
50 isb(); 50 isb();
51 flush_tlb_all(); 51 flush_tlb_all();
52 if (icache_is_vivt_asid_tagged()) { 52 if (icache_is_vivt_asid_tagged()) {
53 asm("mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache\n" 53 __flush_icache_all();
54 "mcr p15, 0, %0, c7, c5, 6 @ flush BTAC/BTB\n"
55 :
56 : "r" (0));
57 dsb(); 54 dsb();
58 } 55 }
59 } 56 }
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index b30925fcbcdc..b9590a7085ca 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -205,7 +205,7 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
205 205
206 order = get_order(size); 206 order = get_order(size);
207 207
208 if (mask != 0xffffffff) 208 if (mask < 0xffffffffULL)
209 gfp |= GFP_DMA; 209 gfp |= GFP_DMA;
210 210
211 page = alloc_pages(gfp, order); 211 page = alloc_pages(gfp, order);
@@ -289,7 +289,7 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
289 if (!mask) 289 if (!mask)
290 goto error; 290 goto error;
291 291
292 if (mask != 0xffffffff) 292 if (mask < 0xffffffffULL)
293 gfp |= GFP_DMA; 293 gfp |= GFP_DMA;
294 virt = kmalloc(size, gfp); 294 virt = kmalloc(size, gfp);
295 if (!virt) 295 if (!virt)
diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c
index bc0099d5ae85..d0d17b6a3703 100644
--- a/arch/arm/mm/fault-armv.c
+++ b/arch/arm/mm/fault-armv.c
@@ -153,14 +153,11 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
153 153
154 page = pfn_to_page(pfn); 154 page = pfn_to_page(pfn);
155 mapping = page_mapping(page); 155 mapping = page_mapping(page);
156 if (mapping) {
157#ifndef CONFIG_SMP 156#ifndef CONFIG_SMP
158 int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags); 157 if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
159 158 __flush_dcache_page(mapping, page);
160 if (dirty)
161 __flush_dcache_page(mapping, page);
162#endif 159#endif
163 160 if (mapping) {
164 if (cache_is_vivt()) 161 if (cache_is_vivt())
165 make_coherent(mapping, vma, addr, pfn); 162 make_coherent(mapping, vma, addr, pfn);
166 else if (vma->vm_flags & VM_EXEC) 163 else if (vma->vm_flags & VM_EXEC)
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index ae0e25f5a70e..10e06801afb3 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -292,6 +292,11 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
292 * down_read() 292 * down_read()
293 */ 293 */
294 might_sleep(); 294 might_sleep();
295#ifdef CONFIG_DEBUG_VM
296 if (!user_mode(regs) &&
297 !search_exception_tables(regs->ARM_pc))
298 goto no_context;
299#endif
295 } 300 }
296 301
297 fault = __do_page_fault(mm, addr, fsr, tsk); 302 fault = __do_page_fault(mm, addr, fsr, tsk);
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index b27942909b23..7f294f307c83 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -18,10 +18,6 @@
18 18
19#include "mm.h" 19#include "mm.h"
20 20
21#ifdef CONFIG_ARM_ERRATA_411920
22extern void v6_icache_inval_all(void);
23#endif
24
25#ifdef CONFIG_CPU_CACHE_VIPT 21#ifdef CONFIG_CPU_CACHE_VIPT
26 22
27#define ALIAS_FLUSH_START 0xffff4000 23#define ALIAS_FLUSH_START 0xffff4000
@@ -35,16 +31,11 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
35 flush_tlb_kernel_page(to); 31 flush_tlb_kernel_page(to);
36 32
37 asm( "mcrr p15, 0, %1, %0, c14\n" 33 asm( "mcrr p15, 0, %1, %0, c14\n"
38 " mcr p15, 0, %2, c7, c10, 4\n" 34 " mcr p15, 0, %2, c7, c10, 4"
39#ifndef CONFIG_ARM_ERRATA_411920
40 " mcr p15, 0, %2, c7, c5, 0\n"
41#endif
42 : 35 :
43 : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero) 36 : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero)
44 : "cc"); 37 : "cc");
45#ifdef CONFIG_ARM_ERRATA_411920 38 __flush_icache_all();
46 v6_icache_inval_all();
47#endif
48} 39}
49 40
50void flush_cache_mm(struct mm_struct *mm) 41void flush_cache_mm(struct mm_struct *mm)
@@ -57,16 +48,11 @@ void flush_cache_mm(struct mm_struct *mm)
57 48
58 if (cache_is_vipt_aliasing()) { 49 if (cache_is_vipt_aliasing()) {
59 asm( "mcr p15, 0, %0, c7, c14, 0\n" 50 asm( "mcr p15, 0, %0, c7, c14, 0\n"
60 " mcr p15, 0, %0, c7, c10, 4\n" 51 " mcr p15, 0, %0, c7, c10, 4"
61#ifndef CONFIG_ARM_ERRATA_411920
62 " mcr p15, 0, %0, c7, c5, 0\n"
63#endif
64 : 52 :
65 : "r" (0) 53 : "r" (0)
66 : "cc"); 54 : "cc");
67#ifdef CONFIG_ARM_ERRATA_411920 55 __flush_icache_all();
68 v6_icache_inval_all();
69#endif
70 } 56 }
71} 57}
72 58
@@ -81,16 +67,11 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned
81 67
82 if (cache_is_vipt_aliasing()) { 68 if (cache_is_vipt_aliasing()) {
83 asm( "mcr p15, 0, %0, c7, c14, 0\n" 69 asm( "mcr p15, 0, %0, c7, c14, 0\n"
84 " mcr p15, 0, %0, c7, c10, 4\n" 70 " mcr p15, 0, %0, c7, c10, 4"
85#ifndef CONFIG_ARM_ERRATA_411920
86 " mcr p15, 0, %0, c7, c5, 0\n"
87#endif
88 : 71 :
89 : "r" (0) 72 : "r" (0)
90 : "cc"); 73 : "cc");
91#ifdef CONFIG_ARM_ERRATA_411920 74 __flush_icache_all();
92 v6_icache_inval_all();
93#endif
94 } 75 }
95} 76}
96 77
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c
index 73cae57fa707..30f82fb5918c 100644
--- a/arch/arm/mm/highmem.c
+++ b/arch/arm/mm/highmem.c
@@ -46,6 +46,8 @@ void *kmap_atomic(struct page *page, enum km_type type)
46 if (!PageHighMem(page)) 46 if (!PageHighMem(page))
47 return page_address(page); 47 return page_address(page);
48 48
49 debug_kmap_atomic(type);
50
49 kmap = kmap_high_get(page); 51 kmap = kmap_high_get(page);
50 if (kmap) 52 if (kmap)
51 return kmap; 53 return kmap;
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 877c492f8e10..52c40d155672 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -273,7 +273,6 @@ static void __init bootmem_init_node(int node, struct meminfo *mi,
273 struct membank *bank = &mi->bank[i]; 273 struct membank *bank = &mi->bank[i];
274 if (!bank->highmem) 274 if (!bank->highmem)
275 free_bootmem_node(pgdat, bank_phys_start(bank), bank_phys_size(bank)); 275 free_bootmem_node(pgdat, bank_phys_start(bank), bank_phys_size(bank));
276 memory_present(node, bank_pfn_start(bank), bank_pfn_end(bank));
277 } 276 }
278 277
279 /* 278 /*
@@ -370,6 +369,19 @@ int pfn_valid(unsigned long pfn)
370 return 0; 369 return 0;
371} 370}
372EXPORT_SYMBOL(pfn_valid); 371EXPORT_SYMBOL(pfn_valid);
372
373static void arm_memory_present(struct meminfo *mi, int node)
374{
375}
376#else
377static void arm_memory_present(struct meminfo *mi, int node)
378{
379 int i;
380 for_each_nodebank(i, mi, node) {
381 struct membank *bank = &mi->bank[i];
382 memory_present(node, bank_pfn_start(bank), bank_pfn_end(bank));
383 }
384}
373#endif 385#endif
374 386
375static int __init meminfo_cmp(const void *_a, const void *_b) 387static int __init meminfo_cmp(const void *_a, const void *_b)
@@ -427,6 +439,12 @@ void __init bootmem_init(void)
427 */ 439 */
428 if (node == initrd_node) 440 if (node == initrd_node)
429 bootmem_reserve_initrd(node); 441 bootmem_reserve_initrd(node);
442
443 /*
444 * Sparsemem tries to allocate bootmem in memory_present(),
445 * so must be done after the fixed reservations
446 */
447 arm_memory_present(mi, node);
430 } 448 }
431 449
432 /* 450 /*
@@ -483,7 +501,7 @@ free_memmap(int node, unsigned long start_pfn, unsigned long end_pfn)
483 /* 501 /*
484 * Convert start_pfn/end_pfn to a struct page pointer. 502 * Convert start_pfn/end_pfn to a struct page pointer.
485 */ 503 */
486 start_pg = pfn_to_page(start_pfn); 504 start_pg = pfn_to_page(start_pfn - 1) + 1;
487 end_pg = pfn_to_page(end_pfn); 505 end_pg = pfn_to_page(end_pfn);
488 506
489 /* 507 /*
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 02243eeccf50..ea67be0223ac 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -117,6 +117,13 @@ static void __init early_cachepolicy(char **p)
117 } 117 }
118 if (i == ARRAY_SIZE(cache_policies)) 118 if (i == ARRAY_SIZE(cache_policies))
119 printk(KERN_ERR "ERROR: unknown or unsupported cache policy\n"); 119 printk(KERN_ERR "ERROR: unknown or unsupported cache policy\n");
120 /*
121 * This restriction is partly to do with the way we boot; it is
122 * unpredictable to have memory mapped using two different sets of
123 * memory attributes (shared, type, and cache attribs). We can not
124 * change these attributes once the initial assembly has setup the
125 * page tables.
126 */
120 if (cpu_architecture() >= CPU_ARCH_ARMv6) { 127 if (cpu_architecture() >= CPU_ARCH_ARMv6) {
121 printk(KERN_WARNING "Only cachepolicy=writeback supported on ARMv6 and later\n"); 128 printk(KERN_WARNING "Only cachepolicy=writeback supported on ARMv6 and later\n");
122 cachepolicy = CPOLICY_WRITEBACK; 129 cachepolicy = CPOLICY_WRITEBACK;
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 194737d60a22..70f75d2e3ead 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -32,8 +32,10 @@
32 32
33#ifndef CONFIG_SMP 33#ifndef CONFIG_SMP
34#define TTB_FLAGS TTB_RGN_WBWA 34#define TTB_FLAGS TTB_RGN_WBWA
35#define PMD_FLAGS PMD_SECT_WB
35#else 36#else
36#define TTB_FLAGS TTB_RGN_WBWA|TTB_S 37#define TTB_FLAGS TTB_RGN_WBWA|TTB_S
38#define PMD_FLAGS PMD_SECT_WBWA|PMD_SECT_S
37#endif 39#endif
38 40
39ENTRY(cpu_v6_proc_init) 41ENTRY(cpu_v6_proc_init)
@@ -222,10 +224,9 @@ __v6_proc_info:
222 .long 0x0007b000 224 .long 0x0007b000
223 .long 0x0007f000 225 .long 0x0007f000
224 .long PMD_TYPE_SECT | \ 226 .long PMD_TYPE_SECT | \
225 PMD_SECT_BUFFERABLE | \
226 PMD_SECT_CACHEABLE | \
227 PMD_SECT_AP_WRITE | \ 227 PMD_SECT_AP_WRITE | \
228 PMD_SECT_AP_READ 228 PMD_SECT_AP_READ | \
229 PMD_FLAGS
229 .long PMD_TYPE_SECT | \ 230 .long PMD_TYPE_SECT | \
230 PMD_SECT_XN | \ 231 PMD_SECT_XN | \
231 PMD_SECT_AP_WRITE | \ 232 PMD_SECT_AP_WRITE | \
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 23ebcf6eab9f..eeeed01ee44a 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -33,9 +33,11 @@
33#ifndef CONFIG_SMP 33#ifndef CONFIG_SMP
34/* PTWs cacheable, inner WB not shareable, outer WB not shareable */ 34/* PTWs cacheable, inner WB not shareable, outer WB not shareable */
35#define TTB_FLAGS TTB_IRGN_WB|TTB_RGN_OC_WB 35#define TTB_FLAGS TTB_IRGN_WB|TTB_RGN_OC_WB
36#define PMD_FLAGS PMD_SECT_WB
36#else 37#else
37/* PTWs cacheable, inner WBWA shareable, outer WBWA not shareable */ 38/* PTWs cacheable, inner WBWA shareable, outer WBWA not shareable */
38#define TTB_FLAGS TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA 39#define TTB_FLAGS TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA
40#define PMD_FLAGS PMD_SECT_WBWA|PMD_SECT_S
39#endif 41#endif
40 42
41ENTRY(cpu_v7_proc_init) 43ENTRY(cpu_v7_proc_init)
@@ -326,10 +328,9 @@ __v7_proc_info:
326 .long 0x000f0000 @ Required ID value 328 .long 0x000f0000 @ Required ID value
327 .long 0x000f0000 @ Mask for ID 329 .long 0x000f0000 @ Mask for ID
328 .long PMD_TYPE_SECT | \ 330 .long PMD_TYPE_SECT | \
329 PMD_SECT_BUFFERABLE | \
330 PMD_SECT_CACHEABLE | \
331 PMD_SECT_AP_WRITE | \ 331 PMD_SECT_AP_WRITE | \
332 PMD_SECT_AP_READ 332 PMD_SECT_AP_READ | \
333 PMD_FLAGS
333 .long PMD_TYPE_SECT | \ 334 .long PMD_TYPE_SECT | \
334 PMD_SECT_XN | \ 335 PMD_SECT_XN | \
335 PMD_SECT_AP_WRITE | \ 336 PMD_SECT_AP_WRITE | \
diff --git a/arch/arm/oprofile/op_model_v6.c b/arch/arm/oprofile/op_model_v6.c
index fe581383d3e2..f7d2ec5ee9a1 100644
--- a/arch/arm/oprofile/op_model_v6.c
+++ b/arch/arm/oprofile/op_model_v6.c
@@ -33,6 +33,9 @@ static int irqs[] = {
33#ifdef CONFIG_ARCH_OMAP2 33#ifdef CONFIG_ARCH_OMAP2
34 3, 34 3,
35#endif 35#endif
36#ifdef CONFIG_ARCH_BCMRING
37 IRQ_PMUIRQ, /* for BCMRING, ARM PMU interrupt is 43 */
38#endif
36}; 39};
37 40
38static void armv6_pmu_stop(void) 41static void armv6_pmu_stop(void)
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index fd3154ae69b1..b53125f41293 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -829,10 +829,10 @@ EXPORT_SYMBOL(omap_free_dma);
829 * 829 *
830 * @param arb_rate 830 * @param arb_rate
831 * @param max_fifo_depth 831 * @param max_fifo_depth
832 * @param tparams - Number of thereads to reserve : DMA_THREAD_RESERVE_NORM 832 * @param tparams - Number of threads to reserve : DMA_THREAD_RESERVE_NORM
833 * DMA_THREAD_RESERVE_ONET 833 * DMA_THREAD_RESERVE_ONET
834 * DMA_THREAD_RESERVE_TWOT 834 * DMA_THREAD_RESERVE_TWOT
835 * DMA_THREAD_RESERVE_THREET 835 * DMA_THREAD_RESERVE_THREET
836 */ 836 */
837void 837void
838omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams) 838omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams)
@@ -844,11 +844,14 @@ omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams)
844 return; 844 return;
845 } 845 }
846 846
847 if (max_fifo_depth == 0)
848 max_fifo_depth = 1;
847 if (arb_rate == 0) 849 if (arb_rate == 0)
848 arb_rate = 1; 850 arb_rate = 1;
849 851
850 reg = (arb_rate & 0xff) << 16; 852 reg = 0xff & max_fifo_depth;
851 reg |= (0xff & max_fifo_depth); 853 reg |= (0x3 & tparams) << 12;
854 reg |= (arb_rate & 0xff) << 16;
852 855
853 dma_write(reg, GCR); 856 dma_write(reg, GCR);
854} 857}
@@ -975,6 +978,14 @@ void omap_stop_dma(int lch)
975{ 978{
976 u32 l; 979 u32 l;
977 980
981 /* Disable all interrupts on the channel */
982 if (cpu_class_is_omap1())
983 dma_write(0, CICR(lch));
984
985 l = dma_read(CCR(lch));
986 l &= ~OMAP_DMA_CCR_EN;
987 dma_write(l, CCR(lch));
988
978 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) { 989 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
979 int next_lch, cur_lch = lch; 990 int next_lch, cur_lch = lch;
980 char dma_chan_link_map[OMAP_DMA4_LOGICAL_DMA_CH_COUNT]; 991 char dma_chan_link_map[OMAP_DMA4_LOGICAL_DMA_CH_COUNT];
@@ -992,18 +1003,8 @@ void omap_stop_dma(int lch)
992 next_lch = dma_chan[cur_lch].next_lch; 1003 next_lch = dma_chan[cur_lch].next_lch;
993 cur_lch = next_lch; 1004 cur_lch = next_lch;
994 } while (next_lch != -1); 1005 } while (next_lch != -1);
995
996 return;
997 } 1006 }
998 1007
999 /* Disable all interrupts on the channel */
1000 if (cpu_class_is_omap1())
1001 dma_write(0, CICR(lch));
1002
1003 l = dma_read(CCR(lch));
1004 l &= ~OMAP_DMA_CCR_EN;
1005 dma_write(l, CCR(lch));
1006
1007 dma_chan[lch].flags &= ~OMAP_DMA_ACTIVE; 1008 dma_chan[lch].flags &= ~OMAP_DMA_ACTIVE;
1008} 1009}
1009EXPORT_SYMBOL(omap_stop_dma); 1010EXPORT_SYMBOL(omap_stop_dma);
diff --git a/arch/arm/plat-omap/include/mach/keypad.h b/arch/arm/plat-omap/include/mach/keypad.h
index d91b9be334ff..3ae52ccc793c 100644
--- a/arch/arm/plat-omap/include/mach/keypad.h
+++ b/arch/arm/plat-omap/include/mach/keypad.h
@@ -10,7 +10,7 @@
10#ifndef ASMARM_ARCH_KEYPAD_H 10#ifndef ASMARM_ARCH_KEYPAD_H
11#define ASMARM_ARCH_KEYPAD_H 11#define ASMARM_ARCH_KEYPAD_H
12 12
13#include <linux/input/matrix_keypad.h> 13#warning: Please update the board to use matrix_keypad.h instead
14 14
15struct omap_kp_platform_data { 15struct omap_kp_platform_data {
16 int rows; 16 int rows;
@@ -37,6 +37,9 @@ struct omap_kp_platform_data {
37 37
38#define KEY_PERSISTENT 0x00800000 38#define KEY_PERSISTENT 0x00800000
39#define KEYNUM_MASK 0x00EFFFFF 39#define KEYNUM_MASK 0x00EFFFFF
40#define KEY(col, row, val) (((col) << 28) | ((row) << 24) | (val))
41#define PERSISTENT_KEY(col, row) (((col) << 28) | ((row) << 24) | \
42 KEY_PERSISTENT)
40 43
41#endif 44#endif
42 45
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index 4b6012707307..94584f167a82 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -664,7 +664,7 @@ static size_t iopgtable_clear_entry_core(struct iommu *obj, u32 da)
664 nent = 1; /* for the next L1 entry */ 664 nent = 1; /* for the next L1 entry */
665 } else { 665 } else {
666 bytes = IOPGD_SIZE; 666 bytes = IOPGD_SIZE;
667 if (*iopgd & IOPGD_SUPER) { 667 if ((*iopgd & IOPGD_SUPER) == IOPGD_SUPER) {
668 nent *= 16; 668 nent *= 16;
669 /* rewind to the 1st entry */ 669 /* rewind to the 1st entry */
670 iopgd = (u32 *)((u32)iopgd & IOSUPER_MASK); 670 iopgd = (u32 *)((u32)iopgd & IOSUPER_MASK);
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 88ac9768f1c1..e664b912d7bb 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -595,7 +595,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
595 rx &= 1; 595 rx &= 1;
596 if (cpu_is_omap2430() || cpu_is_omap34xx()) { 596 if (cpu_is_omap2430() || cpu_is_omap34xx()) {
597 w = OMAP_MCBSP_READ(io_base, RCCR); 597 w = OMAP_MCBSP_READ(io_base, RCCR);
598 w |= (tx ? RDISABLE : 0); 598 w |= (rx ? RDISABLE : 0);
599 OMAP_MCBSP_WRITE(io_base, RCCR, w); 599 OMAP_MCBSP_WRITE(io_base, RCCR, w);
600 } 600 }
601 w = OMAP_MCBSP_READ(io_base, SPCR1); 601 w = OMAP_MCBSP_READ(io_base, SPCR1);
diff --git a/arch/arm/plat-s3c24xx/adc.c b/arch/arm/plat-s3c24xx/adc.c
index 4d36b784fb8b..df47322492d5 100644
--- a/arch/arm/plat-s3c24xx/adc.c
+++ b/arch/arm/plat-s3c24xx/adc.c
@@ -189,7 +189,7 @@ int s3c_adc_read(struct s3c_adc_client *client, unsigned int ch)
189err: 189err:
190 return ret; 190 return ret;
191} 191}
192EXPORT_SYMBOL_GPL(s3c_adc_convert); 192EXPORT_SYMBOL_GPL(s3c_adc_read);
193 193
194static void s3c_adc_default_select(struct s3c_adc_client *client, 194static void s3c_adc_default_select(struct s3c_adc_client *client,
195 unsigned select) 195 unsigned select)
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 5447e60f3936..4af9dd948793 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -61,6 +61,7 @@ static const char name_s3c2410[] = "S3C2410";
61static const char name_s3c2412[] = "S3C2412"; 61static const char name_s3c2412[] = "S3C2412";
62static const char name_s3c2440[] = "S3C2440"; 62static const char name_s3c2440[] = "S3C2440";
63static const char name_s3c2442[] = "S3C2442"; 63static const char name_s3c2442[] = "S3C2442";
64static const char name_s3c2442b[] = "S3C2442B";
64static const char name_s3c2443[] = "S3C2443"; 65static const char name_s3c2443[] = "S3C2443";
65static const char name_s3c2410a[] = "S3C2410A"; 66static const char name_s3c2410a[] = "S3C2410A";
66static const char name_s3c2440a[] = "S3C2440A"; 67static const char name_s3c2440a[] = "S3C2440A";
@@ -112,6 +113,15 @@ static struct cpu_table cpu_ids[] __initdata = {
112 .name = name_s3c2442 113 .name = name_s3c2442
113 }, 114 },
114 { 115 {
116 .idcode = 0x32440aab,
117 .idmask = 0xffffffff,
118 .map_io = s3c244x_map_io,
119 .init_clocks = s3c244x_init_clocks,
120 .init_uarts = s3c244x_init_uarts,
121 .init = s3c2442_init,
122 .name = name_s3c2442b
123 },
124 {
115 .idcode = 0x32412001, 125 .idcode = 0x32412001,
116 .idmask = 0xffffffff, 126 .idmask = 0xffffffff,
117 .map_io = s3c2412_map_io, 127 .map_io = s3c2412_map_io,
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 196b19123653..f046f8c51084 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -208,14 +208,14 @@ s3c2410_dma_loadbuffer(struct s3c2410_dma_chan *chan,
208{ 208{
209 unsigned long reload; 209 unsigned long reload;
210 210
211 pr_debug("s3c2410_chan_loadbuffer: loading buff %p (0x%08lx,0x%06x)\n",
212 buf, (unsigned long)buf->data, buf->size);
213
214 if (buf == NULL) { 211 if (buf == NULL) {
215 dmawarn("buffer is NULL\n"); 212 dmawarn("buffer is NULL\n");
216 return -EINVAL; 213 return -EINVAL;
217 } 214 }
218 215
216 pr_debug("s3c2410_chan_loadbuffer: loading buff %p (0x%08lx,0x%06x)\n",
217 buf, (unsigned long)buf->data, buf->size);
218
219 /* check the state of the channel before we do anything */ 219 /* check the state of the channel before we do anything */
220 220
221 if (chan->load_state == S3C2410_DMALOAD_1LOADED) { 221 if (chan->load_state == S3C2410_DMALOAD_1LOADED) {
diff --git a/arch/arm/plat-s3c24xx/gpio.c b/arch/arm/plat-s3c24xx/gpio.c
index 95df059b5a1d..5467470badfd 100644
--- a/arch/arm/plat-s3c24xx/gpio.c
+++ b/arch/arm/plat-s3c24xx/gpio.c
@@ -29,6 +29,7 @@
29#include <linux/io.h> 29#include <linux/io.h>
30 30
31#include <mach/hardware.h> 31#include <mach/hardware.h>
32#include <mach/gpio-fns.h>
32#include <asm/irq.h> 33#include <asm/irq.h>
33 34
34#include <mach/regs-gpio.h> 35#include <mach/regs-gpio.h>
diff --git a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
index efeb025affc7..c776120b99e6 100644
--- a/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
+++ b/arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
@@ -222,7 +222,9 @@ extern struct clk *s3c_cpufreq_clk_get(struct device *, const char *);
222/* S3C2410 and compatible exported functions */ 222/* S3C2410 and compatible exported functions */
223 223
224extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg); 224extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg);
225extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg);
225 226
227#ifdef CONFIG_S3C2410_IOTIMING
226extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg, 228extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg,
227 struct s3c_iotimings *iot); 229 struct s3c_iotimings *iot);
228 230
@@ -231,8 +233,11 @@ extern int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg,
231 233
232extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, 234extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,
233 struct s3c_iotimings *iot); 235 struct s3c_iotimings *iot);
234 236#else
235extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg); 237#define s3c2410_iotiming_calc NULL
238#define s3c2410_iotiming_get NULL
239#define s3c2410_iotiming_set NULL
240#endif /* CONFIG_S3C2410_IOTIMING */
236 241
237/* S3C2412 compatible routines */ 242/* S3C2412 compatible routines */
238 243
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c2410.h b/arch/arm/plat-s3c24xx/include/plat/s3c2410.h
index b6deeef8f663..82ab4aad1bbe 100644
--- a/arch/arm/plat-s3c24xx/include/plat/s3c2410.h
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c2410.h
@@ -27,6 +27,7 @@ extern void s3c2410_init_clocks(int xtal);
27#define s3c2410_init_uarts NULL 27#define s3c2410_init_uarts NULL
28#define s3c2410_map_io NULL 28#define s3c2410_map_io NULL
29#define s3c2410_init NULL 29#define s3c2410_init NULL
30#define s3c2410a_init NULL
30#endif 31#endif
31 32
32extern int s3c2410_baseclk_add(void); 33extern int s3c2410_baseclk_add(void);
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h b/arch/arm/plat-s3c64xx/include/plat/regs-clock.h
index a8777a755dfa..ff46e7fa957a 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h
+++ b/arch/arm/plat-s3c64xx/include/plat/regs-clock.h
@@ -51,8 +51,8 @@
51#define S3C6400_CLKDIV0_HCLK_SHIFT (8) 51#define S3C6400_CLKDIV0_HCLK_SHIFT (8)
52#define S3C6400_CLKDIV0_MPLL_MASK (0x1 << 4) 52#define S3C6400_CLKDIV0_MPLL_MASK (0x1 << 4)
53#define S3C6400_CLKDIV0_MPLL_SHIFT (4) 53#define S3C6400_CLKDIV0_MPLL_SHIFT (4)
54#define S3C6400_CLKDIV0_ARM_MASK (0x3 << 0) 54#define S3C6400_CLKDIV0_ARM_MASK (0x7 << 0)
55#define S3C6410_CLKDIV0_ARM_MASK (0x7 << 0) 55#define S3C6410_CLKDIV0_ARM_MASK (0xf << 0)
56#define S3C6400_CLKDIV0_ARM_SHIFT (0) 56#define S3C6400_CLKDIV0_ARM_SHIFT (0)
57 57
58/* CLKDIV1 */ 58/* CLKDIV1 */
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c
index 9745852261e0..6ffa21eb1b91 100644
--- a/arch/arm/plat-s3c64xx/s3c6400-clock.c
+++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c
@@ -677,6 +677,9 @@ void __init_or_cpufreq s3c6400_setup_clocks(void)
677 677
678 printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); 678 printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
679 679
680 /* For now assume the mux always selects the crystal */
681 clk_ext_xtal_mux.parent = xtal_clk;
682
680 epll = s3c6400_get_epll(xtal); 683 epll = s3c6400_get_epll(xtal);
681 mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON)); 684 mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON));
682 apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON)); 685 apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON));