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-rw-r--r--arch/arm/include/asm/cnt32_to_63.h78
-rw-r--r--arch/arm/include/asm/pci.h2
-rw-r--r--arch/arm/kernel/kgdb.c2
-rw-r--r--arch/arm/mach-davinci/psc.c3
-rw-r--r--arch/arm/mach-mx3/pcm037.c2
-rw-r--r--arch/arm/mach-pxa/time.c2
-rw-r--r--arch/arm/mach-pxa/tosa.c11
-rw-r--r--arch/arm/mach-sa1100/generic.c2
-rw-r--r--arch/arm/mach-sa1100/include/mach/jornada720.h11
-rw-r--r--arch/arm/mach-sa1100/jornada720_ssp.c10
-rw-r--r--arch/arm/mach-versatile/core.c2
-rw-r--r--arch/arm/plat-omap/devices.c110
12 files changed, 107 insertions, 128 deletions
diff --git a/arch/arm/include/asm/cnt32_to_63.h b/arch/arm/include/asm/cnt32_to_63.h
deleted file mode 100644
index 480c873fa746..000000000000
--- a/arch/arm/include/asm/cnt32_to_63.h
+++ /dev/null
@@ -1,78 +0,0 @@
1/*
2 * include/asm/cnt32_to_63.h -- extend a 32-bit counter to 63 bits
3 *
4 * Author: Nicolas Pitre
5 * Created: December 3, 2006
6 * Copyright: MontaVista Software, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * as published by the Free Software Foundation.
11 */
12
13#ifndef __INCLUDE_CNT32_TO_63_H__
14#define __INCLUDE_CNT32_TO_63_H__
15
16#include <linux/compiler.h>
17#include <asm/types.h>
18#include <asm/byteorder.h>
19
20/*
21 * Prototype: u64 cnt32_to_63(u32 cnt)
22 * Many hardware clock counters are only 32 bits wide and therefore have
23 * a relatively short period making wrap-arounds rather frequent. This
24 * is a problem when implementing sched_clock() for example, where a 64-bit
25 * non-wrapping monotonic value is expected to be returned.
26 *
27 * To overcome that limitation, let's extend a 32-bit counter to 63 bits
28 * in a completely lock free fashion. Bits 0 to 31 of the clock are provided
29 * by the hardware while bits 32 to 62 are stored in memory. The top bit in
30 * memory is used to synchronize with the hardware clock half-period. When
31 * the top bit of both counters (hardware and in memory) differ then the
32 * memory is updated with a new value, incrementing it when the hardware
33 * counter wraps around.
34 *
35 * Because a word store in memory is atomic then the incremented value will
36 * always be in synch with the top bit indicating to any potential concurrent
37 * reader if the value in memory is up to date or not with regards to the
38 * needed increment. And any race in updating the value in memory is harmless
39 * as the same value would simply be stored more than once.
40 *
41 * The only restriction for the algorithm to work properly is that this
42 * code must be executed at least once per each half period of the 32-bit
43 * counter to properly update the state bit in memory. This is usually not a
44 * problem in practice, but if it is then a kernel timer could be scheduled
45 * to manage for this code to be executed often enough.
46 *
47 * Note that the top bit (bit 63) in the returned value should be considered
48 * as garbage. It is not cleared here because callers are likely to use a
49 * multiplier on the returned value which can get rid of the top bit
50 * implicitly by making the multiplier even, therefore saving on a runtime
51 * clear-bit instruction. Otherwise caller must remember to clear the top
52 * bit explicitly.
53 */
54
55/* this is used only to give gcc a clue about good code generation */
56typedef union {
57 struct {
58#if defined(__LITTLE_ENDIAN)
59 u32 lo, hi;
60#elif defined(__BIG_ENDIAN)
61 u32 hi, lo;
62#endif
63 };
64 u64 val;
65} cnt32_to_63_t;
66
67#define cnt32_to_63(cnt_lo) \
68({ \
69 static volatile u32 __m_cnt_hi = 0; \
70 cnt32_to_63_t __x; \
71 __x.hi = __m_cnt_hi; \
72 __x.lo = (cnt_lo); \
73 if (unlikely((s32)(__x.hi ^ __x.lo) < 0)) \
74 __m_cnt_hi = __x.hi = (__x.hi ^ 0x80000000) + (__x.hi >> 31); \
75 __x.val; \
76})
77
78#endif
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h
index 721c03d53f4b..918d0cbbf064 100644
--- a/arch/arm/include/asm/pci.h
+++ b/arch/arm/include/asm/pci.h
@@ -30,7 +30,7 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
30 * The networking and block device layers use this boolean for bounce 30 * The networking and block device layers use this boolean for bounce
31 * buffer decisions. 31 * buffer decisions.
32 */ 32 */
33#define PCI_DMA_BUS_IS_PHYS (0) 33#define PCI_DMA_BUS_IS_PHYS (1)
34 34
35/* 35/*
36 * Whether pci_unmap_{single,page} is a nop depends upon the 36 * Whether pci_unmap_{single,page} is a nop depends upon the
diff --git a/arch/arm/kernel/kgdb.c b/arch/arm/kernel/kgdb.c
index aaffaecffcd1..ba8ccfede964 100644
--- a/arch/arm/kernel/kgdb.c
+++ b/arch/arm/kernel/kgdb.c
@@ -111,8 +111,6 @@ int kgdb_arch_handle_exception(int exception_vector, int signo,
111 case 'D': 111 case 'D':
112 case 'k': 112 case 'k':
113 case 'c': 113 case 'c':
114 kgdb_contthread = NULL;
115
116 /* 114 /*
117 * Try to read optional parameter, pc unchanged if no parm. 115 * Try to read optional parameter, pc unchanged if no parm.
118 * If this was a compiled breakpoint, we need to move 116 * If this was a compiled breakpoint, we need to move
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index 720c48b9ee04..aa2fc375a325 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -70,9 +70,6 @@ void davinci_psc_config(unsigned int domain, unsigned int id, char enable)
70{ 70{
71 u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl, mdstat_mask; 71 u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl, mdstat_mask;
72 72
73 if (id < 0)
74 return;
75
76 mdctl = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + MDCTL + 4 * id); 73 mdctl = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + MDCTL + 4 * id);
77 if (enable) 74 if (enable)
78 mdctl |= 0x00000003; /* Enable Module */ 75 mdctl |= 0x00000003; /* Enable Module */
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c
index 0a152ed15a85..df8582a6231b 100644
--- a/arch/arm/mach-mx3/pcm037.c
+++ b/arch/arm/mach-mx3/pcm037.c
@@ -54,7 +54,7 @@ static struct platform_device pcm037_flash = {
54}; 54};
55 55
56static struct imxuart_platform_data uart_pdata = { 56static struct imxuart_platform_data uart_pdata = {
57 .flags = 0, 57 .flags = IMXUART_HAVE_RTSCTS,
58}; 58};
59 59
60static struct platform_device *devices[] __initdata = { 60static struct platform_device *devices[] __initdata = {
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 67e18509d7bf..b0d6b32654cf 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -17,9 +17,9 @@
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/clockchips.h> 18#include <linux/clockchips.h>
19#include <linux/sched.h> 19#include <linux/sched.h>
20#include <linux/cnt32_to_63.h>
20 21
21#include <asm/div64.h> 22#include <asm/div64.h>
22#include <asm/cnt32_to_63.h>
23#include <asm/mach/irq.h> 23#include <asm/mach/irq.h>
24#include <asm/mach/time.h> 24#include <asm/mach/time.h>
25#include <mach/pxa-regs.h> 25#include <mach/pxa-regs.h>
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 5dab30eafddc..9f3ef9eb32e3 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -50,6 +50,7 @@
50#include <asm/mach/sharpsl_param.h> 50#include <asm/mach/sharpsl_param.h>
51 51
52#include "generic.h" 52#include "generic.h"
53#include "clock.h"
53#include "devices.h" 54#include "devices.h"
54 55
55static unsigned long tosa_pin_config[] = { 56static unsigned long tosa_pin_config[] = {
@@ -521,6 +522,14 @@ static struct gpio_keys_button tosa_gpio_keys[] = {
521 .wakeup = 1, 522 .wakeup = 1,
522 .active_low = 1, 523 .active_low = 1,
523 }, 524 },
525 {
526 .type = EV_SW,
527 .code = SW_HEADPHONE_INSERT,
528 .gpio = TOSA_GPIO_EAR_IN,
529 .desc = "HeadPhone insert",
530 .active_low = 1,
531 .debounce_interval = 300,
532 },
524}; 533};
525 534
526static struct gpio_keys_platform_data tosa_gpio_keys_platform_data = { 535static struct gpio_keys_platform_data tosa_gpio_keys_platform_data = {
@@ -792,6 +801,8 @@ static void __init tosa_init(void)
792 pxa_set_i2c_info(NULL); 801 pxa_set_i2c_info(NULL);
793 platform_scoop_config = &tosa_pcmcia_config; 802 platform_scoop_config = &tosa_pcmcia_config;
794 803
804 clk_add_alias("CLK_CK3P6MI", &tc6393xb_device.dev, "GPIO11_CLK", NULL);
805
795 platform_add_devices(devices, ARRAY_SIZE(devices)); 806 platform_add_devices(devices, ARRAY_SIZE(devices));
796} 807}
797 808
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 1362994c78aa..b422526f6d8b 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -18,9 +18,9 @@
18#include <linux/ioport.h> 18#include <linux/ioport.h>
19#include <linux/sched.h> /* just for sched_clock() - funny that */ 19#include <linux/sched.h> /* just for sched_clock() - funny that */
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/cnt32_to_63.h>
21 22
22#include <asm/div64.h> 23#include <asm/div64.h>
23#include <asm/cnt32_to_63.h>
24#include <mach/hardware.h> 24#include <mach/hardware.h>
25#include <asm/system.h> 25#include <asm/system.h>
26#include <asm/pgtable.h> 26#include <asm/pgtable.h>
diff --git a/arch/arm/mach-sa1100/include/mach/jornada720.h b/arch/arm/mach-sa1100/include/mach/jornada720.h
index bc120850d313..cc6b4bfcecf6 100644
--- a/arch/arm/mach-sa1100/include/mach/jornada720.h
+++ b/arch/arm/mach-sa1100/include/mach/jornada720.h
@@ -1,10 +1,10 @@
1/* 1/*
2 * arch/arm/mach-sa1100/include/mach/jornada720.h 2 * arch/arm/mach-sa1100/include/mach/jornada720.h
3 * 3 *
4 * This file contains SSP/MCU communication definitions for HP Jornada 710/720/728 4 * SSP/MCU communication definitions for HP Jornada 710/720/728
5 * 5 *
6 * Copyright (C) 2007 Kristoffer Ericson <Kristoffer.Ericson@gmail.com> 6 * Copyright 2007,2008 Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
7 * Copyright (C) 2000 John Ankcorn <jca@lcs.mit.edu> 7 * Copyright 2000 John Ankcorn <jca@lcs.mit.edu>
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as 10 * it under the terms of the GNU General Public License version 2 as
@@ -25,3 +25,8 @@
25#define PWMOFF 0xDF 25#define PWMOFF 0xDF
26#define TXDUMMY 0x11 26#define TXDUMMY 0x11
27#define ERRORCODE 0x00 27#define ERRORCODE 0x00
28
29extern void jornada_ssp_start(void);
30extern void jornada_ssp_end(void);
31extern int jornada_ssp_inout(u8 byte);
32extern int jornada_ssp_byte(u8 byte);
diff --git a/arch/arm/mach-sa1100/jornada720_ssp.c b/arch/arm/mach-sa1100/jornada720_ssp.c
index 06ea7abd9170..28cf36967977 100644
--- a/arch/arm/mach-sa1100/jornada720_ssp.c
+++ b/arch/arm/mach-sa1100/jornada720_ssp.c
@@ -21,8 +21,8 @@
21#include <linux/slab.h> 21#include <linux/slab.h>
22 22
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <asm/hardware/ssp.h>
25#include <mach/jornada720.h> 24#include <mach/jornada720.h>
25#include <asm/hardware/ssp.h>
26 26
27static DEFINE_SPINLOCK(jornada_ssp_lock); 27static DEFINE_SPINLOCK(jornada_ssp_lock);
28static unsigned long jornada_ssp_flags; 28static unsigned long jornada_ssp_flags;
@@ -109,12 +109,12 @@ EXPORT_SYMBOL(jornada_ssp_inout);
109 * jornada_ssp_start - enable mcu 109 * jornada_ssp_start - enable mcu
110 * 110 *
111 */ 111 */
112int jornada_ssp_start() 112void jornada_ssp_start(void)
113{ 113{
114 spin_lock_irqsave(&jornada_ssp_lock, jornada_ssp_flags); 114 spin_lock_irqsave(&jornada_ssp_lock, jornada_ssp_flags);
115 GPCR = GPIO_GPIO25; 115 GPCR = GPIO_GPIO25;
116 udelay(50); 116 udelay(50);
117 return 0; 117 return;
118}; 118};
119EXPORT_SYMBOL(jornada_ssp_start); 119EXPORT_SYMBOL(jornada_ssp_start);
120 120
@@ -122,11 +122,11 @@ EXPORT_SYMBOL(jornada_ssp_start);
122 * jornada_ssp_end - disable mcu and turn off lock 122 * jornada_ssp_end - disable mcu and turn off lock
123 * 123 *
124 */ 124 */
125int jornada_ssp_end() 125void jornada_ssp_end(void)
126{ 126{
127 GPSR = GPIO_GPIO25; 127 GPSR = GPIO_GPIO25;
128 spin_unlock_irqrestore(&jornada_ssp_lock, jornada_ssp_flags); 128 spin_unlock_irqrestore(&jornada_ssp_lock, jornada_ssp_flags);
129 return 0; 129 return;
130}; 130};
131EXPORT_SYMBOL(jornada_ssp_end); 131EXPORT_SYMBOL(jornada_ssp_end);
132 132
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index d75e795c893e..b638f10411e8 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -28,8 +28,8 @@
28#include <linux/amba/clcd.h> 28#include <linux/amba/clcd.h>
29#include <linux/clocksource.h> 29#include <linux/clocksource.h>
30#include <linux/clockchips.h> 30#include <linux/clockchips.h>
31#include <linux/cnt32_to_63.h>
31 32
32#include <asm/cnt32_to_63.h>
33#include <asm/system.h> 33#include <asm/system.h>
34#include <mach/hardware.h> 34#include <mach/hardware.h>
35#include <asm/io.h> 35#include <asm/io.h>
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 187e3d8bfdfe..01da719a7453 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -21,6 +21,7 @@
21 21
22#include <mach/tc.h> 22#include <mach/tc.h>
23#include <mach/board.h> 23#include <mach/board.h>
24#include <mach/mmc.h>
24#include <mach/mux.h> 25#include <mach/mux.h>
25#include <mach/gpio.h> 26#include <mach/gpio.h>
26#include <mach/menelaus.h> 27#include <mach/menelaus.h>
@@ -194,25 +195,38 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
194 195
195/*-------------------------------------------------------------------------*/ 196/*-------------------------------------------------------------------------*/
196 197
197#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) 198#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
199 defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
198 200
199#ifdef CONFIG_ARCH_OMAP24XX 201#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
200#define OMAP_MMC1_BASE 0x4809c000 202#define OMAP_MMC1_BASE 0x4809c000
201#define OMAP_MMC1_INT INT_24XX_MMC_IRQ 203#define OMAP_MMC1_END (OMAP_MMC1_BASE + 0x1fc)
204#define OMAP_MMC1_INT INT_24XX_MMC_IRQ
205
206#define OMAP_MMC2_BASE 0x480b4000
207#define OMAP_MMC2_END (OMAP_MMC2_BASE + 0x1fc)
208#define OMAP_MMC2_INT INT_24XX_MMC2_IRQ
209
202#else 210#else
211
203#define OMAP_MMC1_BASE 0xfffb7800 212#define OMAP_MMC1_BASE 0xfffb7800
213#define OMAP_MMC1_END (OMAP_MMC1_BASE + 0x7f)
204#define OMAP_MMC1_INT INT_MMC 214#define OMAP_MMC1_INT INT_MMC
205#endif 215
206#define OMAP_MMC2_BASE 0xfffb7c00 /* omap16xx only */ 216#define OMAP_MMC2_BASE 0xfffb7c00 /* omap16xx only */
217#define OMAP_MMC2_END (OMAP_MMC2_BASE + 0x7f)
218#define OMAP_MMC2_INT INT_1610_MMC2
219
220#endif
207 221
208static struct omap_mmc_conf mmc1_conf; 222static struct omap_mmc_platform_data mmc1_data;
209 223
210static u64 mmc1_dmamask = 0xffffffff; 224static u64 mmc1_dmamask = 0xffffffff;
211 225
212static struct resource mmc1_resources[] = { 226static struct resource mmc1_resources[] = {
213 { 227 {
214 .start = OMAP_MMC1_BASE, 228 .start = OMAP_MMC1_BASE,
215 .end = OMAP_MMC1_BASE + 0x7f, 229 .end = OMAP_MMC1_END,
216 .flags = IORESOURCE_MEM, 230 .flags = IORESOURCE_MEM,
217 }, 231 },
218 { 232 {
@@ -226,26 +240,27 @@ static struct platform_device mmc_omap_device1 = {
226 .id = 1, 240 .id = 1,
227 .dev = { 241 .dev = {
228 .dma_mask = &mmc1_dmamask, 242 .dma_mask = &mmc1_dmamask,
229 .platform_data = &mmc1_conf, 243 .platform_data = &mmc1_data,
230 }, 244 },
231 .num_resources = ARRAY_SIZE(mmc1_resources), 245 .num_resources = ARRAY_SIZE(mmc1_resources),
232 .resource = mmc1_resources, 246 .resource = mmc1_resources,
233}; 247};
234 248
235#ifdef CONFIG_ARCH_OMAP16XX 249#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \
250 defined(CONFIG_ARCH_OMAP34XX)
236 251
237static struct omap_mmc_conf mmc2_conf; 252static struct omap_mmc_platform_data mmc2_data;
238 253
239static u64 mmc2_dmamask = 0xffffffff; 254static u64 mmc2_dmamask = 0xffffffff;
240 255
241static struct resource mmc2_resources[] = { 256static struct resource mmc2_resources[] = {
242 { 257 {
243 .start = OMAP_MMC2_BASE, 258 .start = OMAP_MMC2_BASE,
244 .end = OMAP_MMC2_BASE + 0x7f, 259 .end = OMAP_MMC2_END,
245 .flags = IORESOURCE_MEM, 260 .flags = IORESOURCE_MEM,
246 }, 261 },
247 { 262 {
248 .start = INT_1610_MMC2, 263 .start = OMAP_MMC2_INT,
249 .flags = IORESOURCE_IRQ, 264 .flags = IORESOURCE_IRQ,
250 }, 265 },
251}; 266};
@@ -255,26 +270,19 @@ static struct platform_device mmc_omap_device2 = {
255 .id = 2, 270 .id = 2,
256 .dev = { 271 .dev = {
257 .dma_mask = &mmc2_dmamask, 272 .dma_mask = &mmc2_dmamask,
258 .platform_data = &mmc2_conf, 273 .platform_data = &mmc2_data,
259 }, 274 },
260 .num_resources = ARRAY_SIZE(mmc2_resources), 275 .num_resources = ARRAY_SIZE(mmc2_resources),
261 .resource = mmc2_resources, 276 .resource = mmc2_resources,
262}; 277};
263#endif 278#endif
264 279
265static void __init omap_init_mmc(void) 280static inline void omap_init_mmc_conf(const struct omap_mmc_config *mmc_conf)
266{ 281{
267 const struct omap_mmc_config *mmc_conf; 282 if (cpu_is_omap2430() || cpu_is_omap34xx())
268 const struct omap_mmc_conf *mmc;
269
270 /* NOTE: assumes MMC was never (wrongly) enabled */
271 mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
272 if (!mmc_conf)
273 return; 283 return;
274 284
275 /* block 1 is always available and has just one pinout option */ 285 if (mmc_conf->mmc[0].enabled) {
276 mmc = &mmc_conf->mmc[0];
277 if (mmc->enabled) {
278 if (cpu_is_omap24xx()) { 286 if (cpu_is_omap24xx()) {
279 omap_cfg_reg(H18_24XX_MMC_CMD); 287 omap_cfg_reg(H18_24XX_MMC_CMD);
280 omap_cfg_reg(H15_24XX_MMC_CLKI); 288 omap_cfg_reg(H15_24XX_MMC_CLKI);
@@ -292,7 +300,7 @@ static void __init omap_init_mmc(void)
292 omap_cfg_reg(P20_1710_MMC_DATDIR0); 300 omap_cfg_reg(P20_1710_MMC_DATDIR0);
293 } 301 }
294 } 302 }
295 if (mmc->wire4) { 303 if (mmc_conf->mmc[0].wire4) {
296 if (cpu_is_omap24xx()) { 304 if (cpu_is_omap24xx()) {
297 omap_cfg_reg(H14_24XX_MMC_DAT1); 305 omap_cfg_reg(H14_24XX_MMC_DAT1);
298 omap_cfg_reg(E19_24XX_MMC_DAT2); 306 omap_cfg_reg(E19_24XX_MMC_DAT2);
@@ -303,25 +311,22 @@ static void __init omap_init_mmc(void)
303 } else { 311 } else {
304 omap_cfg_reg(MMC_DAT1); 312 omap_cfg_reg(MMC_DAT1);
305 /* NOTE: DAT2 can be on W10 (here) or M15 */ 313 /* NOTE: DAT2 can be on W10 (here) or M15 */
306 if (!mmc->nomux) 314 if (!mmc_conf->mmc[0].nomux)
307 omap_cfg_reg(MMC_DAT2); 315 omap_cfg_reg(MMC_DAT2);
308 omap_cfg_reg(MMC_DAT3); 316 omap_cfg_reg(MMC_DAT3);
309 } 317 }
310 } 318 }
311 mmc1_conf = *mmc;
312 (void) platform_device_register(&mmc_omap_device1);
313 } 319 }
314 320
315#ifdef CONFIG_ARCH_OMAP16XX 321#ifdef CONFIG_ARCH_OMAP16XX
316 /* block 2 is on newer chips, and has many pinout options */ 322 /* block 2 is on newer chips, and has many pinout options */
317 mmc = &mmc_conf->mmc[1]; 323 if (mmc_conf->mmc[1].enabled) {
318 if (mmc->enabled) { 324 if (!mmc_conf->mmc[1].nomux) {
319 if (!mmc->nomux) {
320 omap_cfg_reg(Y8_1610_MMC2_CMD); 325 omap_cfg_reg(Y8_1610_MMC2_CMD);
321 omap_cfg_reg(Y10_1610_MMC2_CLK); 326 omap_cfg_reg(Y10_1610_MMC2_CLK);
322 omap_cfg_reg(R18_1610_MMC2_CLKIN); 327 omap_cfg_reg(R18_1610_MMC2_CLKIN);
323 omap_cfg_reg(W8_1610_MMC2_DAT0); 328 omap_cfg_reg(W8_1610_MMC2_DAT0);
324 if (mmc->wire4) { 329 if (mmc_conf->mmc[1].wire4) {
325 omap_cfg_reg(V8_1610_MMC2_DAT1); 330 omap_cfg_reg(V8_1610_MMC2_DAT1);
326 omap_cfg_reg(W15_1610_MMC2_DAT2); 331 omap_cfg_reg(W15_1610_MMC2_DAT2);
327 omap_cfg_reg(R10_1610_MMC2_DAT3); 332 omap_cfg_reg(R10_1610_MMC2_DAT3);
@@ -337,14 +342,55 @@ static void __init omap_init_mmc(void)
337 if (cpu_is_omap1710()) 342 if (cpu_is_omap1710())
338 omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24), 343 omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
339 MOD_CONF_CTRL_1); 344 MOD_CONF_CTRL_1);
340 mmc2_conf = *mmc; 345 }
346#endif
347}
348
349static void __init omap_init_mmc(void)
350{
351 const struct omap_mmc_config *mmc_conf;
352
353 /* NOTE: assumes MMC was never (wrongly) enabled */
354 mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
355 if (!mmc_conf)
356 return;
357
358 omap_init_mmc_conf(mmc_conf);
359
360 if (mmc_conf->mmc[0].enabled) {
361 mmc1_data.conf = mmc_conf->mmc[0];
362 (void) platform_device_register(&mmc_omap_device1);
363 }
364
365#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \
366 defined(CONFIG_ARCH_OMAP34XX)
367 if (mmc_conf->mmc[1].enabled) {
368 mmc2_data.conf = mmc_conf->mmc[1];
341 (void) platform_device_register(&mmc_omap_device2); 369 (void) platform_device_register(&mmc_omap_device2);
342 } 370 }
343#endif 371#endif
344 return;
345} 372}
373
374void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info)
375{
376 switch (host) {
377 case 1:
378 mmc1_data = *info;
379 break;
380#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \
381 defined(CONFIG_ARCH_OMAP34XX)
382 case 2:
383 mmc2_data = *info;
384 break;
385#endif
386 default:
387 BUG();
388 }
389}
390
346#else 391#else
347static inline void omap_init_mmc(void) {} 392static inline void omap_init_mmc(void) {}
393void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info) {}
348#endif 394#endif
349 395
350/*-------------------------------------------------------------------------*/ 396/*-------------------------------------------------------------------------*/