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-rw-r--r--arch/arm/mach-s3c2410/mach-vr1000.c56
1 files changed, 38 insertions, 18 deletions
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index 46b259673c18..ae7e099bf6c8 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -74,27 +74,47 @@
74 74
75/* macros to modify the physical addresses for io space */ 75/* macros to modify the physical addresses for io space */
76 76
77#define PA_CS2(item) ((item) + S3C2410_CS2) 77#define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
78#define PA_CS3(item) ((item) + S3C2410_CS3) 78#define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
79#define PA_CS4(item) ((item) + S3C2410_CS4) 79#define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
80#define PA_CS5(item) ((item) + S3C2410_CS5) 80#define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
81 81
82static struct map_desc vr1000_iodesc[] __initdata = { 82static struct map_desc vr1000_iodesc[] __initdata = {
83 /* ISA IO areas */ 83 /* ISA IO areas */
84 84 {
85 { (u32)S3C24XX_VA_ISA_BYTE, PA_CS2(BAST_PA_ISAIO), SZ_16M, MT_DEVICE }, 85 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
86 { (u32)S3C24XX_VA_ISA_WORD, PA_CS3(BAST_PA_ISAIO), SZ_16M, MT_DEVICE }, 86 .pfn = PA_CS2(BAST_PA_ISAIO),
87 87 .length = SZ_16M,
88 /* we could possibly compress the next set down into a set of smaller tables 88 .type = MT_DEVICE,
89 * pagetables, but that would mean using an L2 section, and it still means 89 }, {
90 * we cannot actually feed the same register to an LDR due to 16K spacing 90 .virtual = (u32)S3C24XX_VA_ISA_WORD,
91 */ 91 .pfn = PA_CS3(BAST_PA_ISAIO),
92 92 .length = SZ_16M,
93 /* bast CPLD control registers, and external interrupt controls */ 93 .type = MT_DEVICE,
94 { (u32)VR1000_VA_CTRL1, VR1000_PA_CTRL1, SZ_1M, MT_DEVICE }, 94 },
95 { (u32)VR1000_VA_CTRL2, VR1000_PA_CTRL2, SZ_1M, MT_DEVICE }, 95
96 { (u32)VR1000_VA_CTRL3, VR1000_PA_CTRL3, SZ_1M, MT_DEVICE }, 96 /* CPLD control registers, and external interrupt controls */
97 { (u32)VR1000_VA_CTRL4, VR1000_PA_CTRL4, SZ_1M, MT_DEVICE }, 97 {
98 .virtual = (u32)VR1000_VA_CTRL1,
99 .pfn = __phys_to_pfn(VR1000_PA_CTRL1),
100 .length = SZ_1M,
101 .type = MT_DEVICE,
102 }, {
103 .virtual = (u32)VR1000_VA_CTRL2,
104 .pfn = __phys_to_pfn(VR1000_PA_CTRL2),
105 .length = SZ_1M,
106 .type = MT_DEVICE,
107 }, {
108 .virtual = (u32)VR1000_VA_CTRL3,
109 .pfn = __phys_to_pfn(VR1000_PA_CTRL3),
110 .length = SZ_1M,
111 .type = MT_DEVICE,
112 }, {
113 .virtual = (u32)VR1000_VA_CTRL4,
114 .pfn = __phys_to_pfn(VR1000_PA_CTRL4),
115 .length = SZ_1M,
116 .type = MT_DEVICE,
117 },
98 118
99 /* peripheral space... one for each of fast/slow/byte/16bit */ 119 /* peripheral space... one for each of fast/slow/byte/16bit */
100 /* note, ide is only decoded in word space, even though some registers 120 /* note, ide is only decoded in word space, even though some registers