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-rw-r--r--arch/arm/configs/omap3_pandora_defconfig1409
-rw-r--r--arch/arm/configs/omap_ldp_defconfig148
-rw-r--r--arch/arm/include/asm/bitops.h16
-rw-r--r--arch/arm/include/asm/processor.h2
-rw-r--r--arch/arm/mach-omap1/board-fsample.c7
-rw-r--r--arch/arm/mach-omap1/board-h2.c24
-rw-r--r--arch/arm/mach-omap1/board-h3.c9
-rw-r--r--arch/arm/mach-omap1/board-innovator.c2
-rw-r--r--arch/arm/mach-omap1/board-nokia770.c12
-rw-r--r--arch/arm/mach-omap1/board-osk.c43
-rw-r--r--arch/arm/mach-omap1/board-palmte.c14
-rw-r--r--arch/arm/mach-omap1/board-palmtt.c2
-rw-r--r--arch/arm/mach-omap1/board-palmz71.c23
-rw-r--r--arch/arm/mach-omap1/board-perseus2.c7
-rw-r--r--arch/arm/mach-omap1/board-sx1.c11
-rw-r--r--arch/arm/mach-omap1/board-voiceblue.c49
-rw-r--r--arch/arm/mach-omap1/fpga.c6
-rw-r--r--arch/arm/mach-omap1/id.c53
-rw-r--r--arch/arm/mach-omap1/io.c2
-rw-r--r--arch/arm/mach-omap1/leds-h2p2-debug.c10
-rw-r--r--arch/arm/mach-omap1/leds-osk.c4
-rw-r--r--arch/arm/mach-omap1/leds.c8
-rw-r--r--arch/arm/mach-omap1/pm.c6
-rw-r--r--arch/arm/mach-omap1/serial.c10
-rw-r--r--arch/arm/mach-omap2/Kconfig4
-rw-r--r--arch/arm/mach-omap2/Makefile1
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c4
-rw-r--r--arch/arm/mach-omap2/board-apollon.c15
-rw-r--r--arch/arm/mach-omap2/board-h4.c14
-rw-r--r--arch/arm/mach-omap2/board-ldp.c57
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c180
-rw-r--r--arch/arm/mach-omap2/clock34xx.c2
-rw-r--r--arch/arm/mach-omap2/clock34xx.h36
-rw-r--r--arch/arm/mach-omap2/id.c305
-rw-r--r--arch/arm/mach-omap2/irq.c39
-rw-r--r--arch/arm/mach-omap2/mux.c44
-rw-r--r--arch/arm/mach-omap2/usb-tusb6010.c6
-rw-r--r--arch/arm/mm/alignment.c26
-rw-r--r--arch/arm/plat-omap/debug-devices.c8
-rw-r--r--arch/arm/plat-omap/debug-leds.c10
-rw-r--r--arch/arm/plat-omap/dma.c15
-rw-r--r--arch/arm/plat-omap/dmtimer.c11
-rw-r--r--arch/arm/plat-omap/gpio.c127
-rw-r--r--arch/arm/plat-omap/i2c.c55
-rw-r--r--arch/arm/plat-omap/include/mach/board-apollon.h4
-rw-r--r--arch/arm/plat-omap/include/mach/board-ldp.h5
-rw-r--r--arch/arm/plat-omap/include/mach/cpu.h82
-rw-r--r--arch/arm/plat-omap/include/mach/gpio.h31
-rw-r--r--arch/arm/plat-omap/include/mach/mux.h41
-rw-r--r--arch/arm/plat-omap/include/mach/omapfb.h4
-rw-r--r--arch/arm/plat-omap/sram.c11
-rw-r--r--arch/arm/plat-orion/pcie.c2
52 files changed, 2477 insertions, 539 deletions
diff --git a/arch/arm/configs/omap3_pandora_defconfig b/arch/arm/configs/omap3_pandora_defconfig
new file mode 100644
index 000000000000..09543f4de5bc
--- /dev/null
+++ b/arch/arm/configs/omap3_pandora_defconfig
@@ -0,0 +1,1409 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28-rc7
4# Fri Dec 5 11:54:09 2008
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
16CONFIG_LOCKDEP_SUPPORT=y
17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_HARDIRQS_SW_RESEND=y
19CONFIG_GENERIC_IRQ_PROBE=y
20CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y
24CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
26CONFIG_VECTORS_BASE=0xffff0000
27CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
28
29#
30# General setup
31#
32CONFIG_EXPERIMENTAL=y
33CONFIG_BROKEN_ON_SMP=y
34CONFIG_INIT_ENV_ARG_LIMIT=32
35CONFIG_LOCALVERSION=""
36CONFIG_LOCALVERSION_AUTO=y
37CONFIG_SWAP=y
38CONFIG_SYSVIPC=y
39CONFIG_SYSVIPC_SYSCTL=y
40# CONFIG_POSIX_MQUEUE is not set
41CONFIG_BSD_PROCESS_ACCT=y
42# CONFIG_BSD_PROCESS_ACCT_V3 is not set
43# CONFIG_TASKSTATS is not set
44# CONFIG_AUDIT is not set
45CONFIG_IKCONFIG=y
46CONFIG_IKCONFIG_PROC=y
47CONFIG_LOG_BUF_SHIFT=14
48# CONFIG_CGROUPS is not set
49CONFIG_GROUP_SCHED=y
50CONFIG_FAIR_GROUP_SCHED=y
51# CONFIG_RT_GROUP_SCHED is not set
52CONFIG_USER_SCHED=y
53# CONFIG_CGROUP_SCHED is not set
54CONFIG_SYSFS_DEPRECATED=y
55CONFIG_SYSFS_DEPRECATED_V2=y
56# CONFIG_RELAY is not set
57# CONFIG_NAMESPACES is not set
58CONFIG_BLK_DEV_INITRD=y
59CONFIG_INITRAMFS_SOURCE=""
60CONFIG_CC_OPTIMIZE_FOR_SIZE=y
61CONFIG_SYSCTL=y
62CONFIG_EMBEDDED=y
63CONFIG_UID16=y
64# CONFIG_SYSCTL_SYSCALL is not set
65CONFIG_KALLSYMS=y
66# CONFIG_KALLSYMS_ALL is not set
67CONFIG_KALLSYMS_EXTRA_PASS=y
68CONFIG_HOTPLUG=y
69CONFIG_PRINTK=y
70CONFIG_BUG=y
71CONFIG_ELF_CORE=y
72CONFIG_COMPAT_BRK=y
73CONFIG_BASE_FULL=y
74CONFIG_FUTEX=y
75CONFIG_ANON_INODES=y
76CONFIG_EPOLL=y
77CONFIG_SIGNALFD=y
78CONFIG_TIMERFD=y
79CONFIG_EVENTFD=y
80CONFIG_SHMEM=y
81CONFIG_AIO=y
82CONFIG_VM_EVENT_COUNTERS=y
83CONFIG_SLAB=y
84# CONFIG_SLUB is not set
85# CONFIG_SLOB is not set
86# CONFIG_PROFILING is not set
87# CONFIG_MARKERS is not set
88CONFIG_HAVE_OPROFILE=y
89# CONFIG_KPROBES is not set
90CONFIG_HAVE_KPROBES=y
91CONFIG_HAVE_KRETPROBES=y
92CONFIG_HAVE_CLK=y
93CONFIG_HAVE_GENERIC_DMA_COHERENT=y
94CONFIG_SLABINFO=y
95CONFIG_RT_MUTEXES=y
96# CONFIG_TINY_SHMEM is not set
97CONFIG_BASE_SMALL=0
98CONFIG_MODULES=y
99# CONFIG_MODULE_FORCE_LOAD is not set
100CONFIG_MODULE_UNLOAD=y
101# CONFIG_MODULE_FORCE_UNLOAD is not set
102CONFIG_MODVERSIONS=y
103CONFIG_MODULE_SRCVERSION_ALL=y
104CONFIG_KMOD=y
105CONFIG_BLOCK=y
106# CONFIG_LBD is not set
107# CONFIG_BLK_DEV_IO_TRACE is not set
108# CONFIG_LSF is not set
109# CONFIG_BLK_DEV_BSG is not set
110# CONFIG_BLK_DEV_INTEGRITY is not set
111
112#
113# IO Schedulers
114#
115CONFIG_IOSCHED_NOOP=y
116CONFIG_IOSCHED_AS=y
117CONFIG_IOSCHED_DEADLINE=y
118CONFIG_IOSCHED_CFQ=y
119CONFIG_DEFAULT_AS=y
120# CONFIG_DEFAULT_DEADLINE is not set
121# CONFIG_DEFAULT_CFQ is not set
122# CONFIG_DEFAULT_NOOP is not set
123CONFIG_DEFAULT_IOSCHED="anticipatory"
124CONFIG_CLASSIC_RCU=y
125# CONFIG_FREEZER is not set
126
127#
128# System Type
129#
130# CONFIG_ARCH_AAEC2000 is not set
131# CONFIG_ARCH_INTEGRATOR is not set
132# CONFIG_ARCH_REALVIEW is not set
133# CONFIG_ARCH_VERSATILE is not set
134# CONFIG_ARCH_AT91 is not set
135# CONFIG_ARCH_CLPS7500 is not set
136# CONFIG_ARCH_CLPS711X is not set
137# CONFIG_ARCH_EBSA110 is not set
138# CONFIG_ARCH_EP93XX is not set
139# CONFIG_ARCH_FOOTBRIDGE is not set
140# CONFIG_ARCH_NETX is not set
141# CONFIG_ARCH_H720X is not set
142# CONFIG_ARCH_IMX is not set
143# CONFIG_ARCH_IOP13XX is not set
144# CONFIG_ARCH_IOP32X is not set
145# CONFIG_ARCH_IOP33X is not set
146# CONFIG_ARCH_IXP23XX is not set
147# CONFIG_ARCH_IXP2000 is not set
148# CONFIG_ARCH_IXP4XX is not set
149# CONFIG_ARCH_L7200 is not set
150# CONFIG_ARCH_KIRKWOOD is not set
151# CONFIG_ARCH_KS8695 is not set
152# CONFIG_ARCH_NS9XXX is not set
153# CONFIG_ARCH_LOKI is not set
154# CONFIG_ARCH_MV78XX0 is not set
155# CONFIG_ARCH_MXC is not set
156# CONFIG_ARCH_ORION5X is not set
157# CONFIG_ARCH_PNX4008 is not set
158# CONFIG_ARCH_PXA is not set
159# CONFIG_ARCH_RPC is not set
160# CONFIG_ARCH_SA1100 is not set
161# CONFIG_ARCH_S3C2410 is not set
162# CONFIG_ARCH_SHARK is not set
163# CONFIG_ARCH_LH7A40X is not set
164# CONFIG_ARCH_DAVINCI is not set
165CONFIG_ARCH_OMAP=y
166# CONFIG_ARCH_MSM is not set
167
168#
169# TI OMAP Implementations
170#
171CONFIG_ARCH_OMAP_OTG=y
172# CONFIG_ARCH_OMAP1 is not set
173# CONFIG_ARCH_OMAP2 is not set
174CONFIG_ARCH_OMAP3=y
175
176#
177# OMAP Feature Selections
178#
179# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set
180# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set
181# CONFIG_OMAP_RESET_CLOCKS is not set
182# CONFIG_OMAP_MUX is not set
183CONFIG_OMAP_MCBSP=y
184# CONFIG_OMAP_MPU_TIMER is not set
185CONFIG_OMAP_32K_TIMER=y
186CONFIG_OMAP_32K_TIMER_HZ=128
187CONFIG_OMAP_DM_TIMER=y
188# CONFIG_OMAP_LL_DEBUG_UART1 is not set
189# CONFIG_OMAP_LL_DEBUG_UART2 is not set
190CONFIG_OMAP_LL_DEBUG_UART3=y
191CONFIG_ARCH_OMAP34XX=y
192CONFIG_ARCH_OMAP3430=y
193
194#
195# OMAP Board Type
196#
197# CONFIG_MACH_OMAP3_BEAGLE is not set
198# CONFIG_MACH_OMAP_LDP is not set
199# CONFIG_MACH_OVERO is not set
200CONFIG_MACH_OMAP3_PANDORA=y
201
202#
203# Boot options
204#
205
206#
207# Power management
208#
209
210#
211# Processor Type
212#
213CONFIG_CPU_32=y
214CONFIG_CPU_32v6K=y
215CONFIG_CPU_V7=y
216CONFIG_CPU_32v7=y
217CONFIG_CPU_ABRT_EV7=y
218CONFIG_CPU_PABRT_IFAR=y
219CONFIG_CPU_CACHE_V7=y
220CONFIG_CPU_CACHE_VIPT=y
221CONFIG_CPU_COPY_V6=y
222CONFIG_CPU_TLB_V7=y
223CONFIG_CPU_HAS_ASID=y
224CONFIG_CPU_CP15=y
225CONFIG_CPU_CP15_MMU=y
226
227#
228# Processor Features
229#
230CONFIG_ARM_THUMB=y
231CONFIG_ARM_THUMBEE=y
232# CONFIG_CPU_ICACHE_DISABLE is not set
233# CONFIG_CPU_DCACHE_DISABLE is not set
234# CONFIG_CPU_BPREDICT_DISABLE is not set
235CONFIG_HAS_TLS_REG=y
236# CONFIG_OUTER_CACHE is not set
237
238#
239# Bus support
240#
241# CONFIG_PCI_SYSCALL is not set
242# CONFIG_ARCH_SUPPORTS_MSI is not set
243# CONFIG_PCCARD is not set
244
245#
246# Kernel Features
247#
248CONFIG_TICK_ONESHOT=y
249CONFIG_NO_HZ=y
250CONFIG_HIGH_RES_TIMERS=y
251CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
252CONFIG_VMSPLIT_3G=y
253# CONFIG_VMSPLIT_2G is not set
254# CONFIG_VMSPLIT_1G is not set
255CONFIG_PAGE_OFFSET=0xC0000000
256# CONFIG_PREEMPT is not set
257CONFIG_HZ=128
258CONFIG_AEABI=y
259CONFIG_OABI_COMPAT=y
260CONFIG_ARCH_FLATMEM_HAS_HOLES=y
261# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
262# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
263CONFIG_SELECT_MEMORY_MODEL=y
264CONFIG_FLATMEM_MANUAL=y
265# CONFIG_DISCONTIGMEM_MANUAL is not set
266# CONFIG_SPARSEMEM_MANUAL is not set
267CONFIG_FLATMEM=y
268CONFIG_FLAT_NODE_MEM_MAP=y
269CONFIG_PAGEFLAGS_EXTENDED=y
270CONFIG_SPLIT_PTLOCK_CPUS=4
271# CONFIG_RESOURCES_64BIT is not set
272# CONFIG_PHYS_ADDR_T_64BIT is not set
273CONFIG_ZONE_DMA_FLAG=0
274CONFIG_VIRT_TO_BUS=y
275CONFIG_UNEVICTABLE_LRU=y
276# CONFIG_LEDS is not set
277CONFIG_ALIGNMENT_TRAP=y
278
279#
280# Boot options
281#
282CONFIG_ZBOOT_ROM_TEXT=0x0
283CONFIG_ZBOOT_ROM_BSS=0x0
284CONFIG_CMDLINE=" debug "
285# CONFIG_XIP_KERNEL is not set
286# CONFIG_KEXEC is not set
287
288#
289# CPU Power Management
290#
291# CONFIG_CPU_FREQ is not set
292# CONFIG_CPU_IDLE is not set
293
294#
295# Floating point emulation
296#
297
298#
299# At least one emulation must be selected
300#
301CONFIG_FPE_NWFPE=y
302# CONFIG_FPE_NWFPE_XP is not set
303# CONFIG_FPE_FASTFPE is not set
304CONFIG_VFP=y
305CONFIG_VFPv3=y
306CONFIG_NEON=y
307
308#
309# Userspace binary formats
310#
311CONFIG_BINFMT_ELF=y
312# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
313CONFIG_HAVE_AOUT=y
314# CONFIG_BINFMT_AOUT is not set
315CONFIG_BINFMT_MISC=y
316
317#
318# Power management options
319#
320# CONFIG_PM is not set
321CONFIG_ARCH_SUSPEND_POSSIBLE=y
322CONFIG_NET=y
323
324#
325# Networking options
326#
327CONFIG_PACKET=y
328# CONFIG_PACKET_MMAP is not set
329CONFIG_UNIX=y
330CONFIG_XFRM=y
331# CONFIG_XFRM_USER is not set
332# CONFIG_XFRM_SUB_POLICY is not set
333# CONFIG_XFRM_MIGRATE is not set
334# CONFIG_XFRM_STATISTICS is not set
335CONFIG_NET_KEY=y
336# CONFIG_NET_KEY_MIGRATE is not set
337CONFIG_INET=y
338# CONFIG_IP_MULTICAST is not set
339# CONFIG_IP_ADVANCED_ROUTER is not set
340CONFIG_IP_FIB_HASH=y
341CONFIG_IP_PNP=y
342CONFIG_IP_PNP_DHCP=y
343CONFIG_IP_PNP_BOOTP=y
344CONFIG_IP_PNP_RARP=y
345# CONFIG_NET_IPIP is not set
346# CONFIG_NET_IPGRE is not set
347# CONFIG_ARPD is not set
348# CONFIG_SYN_COOKIES is not set
349# CONFIG_INET_AH is not set
350# CONFIG_INET_ESP is not set
351# CONFIG_INET_IPCOMP is not set
352# CONFIG_INET_XFRM_TUNNEL is not set
353# CONFIG_INET_TUNNEL is not set
354CONFIG_INET_XFRM_MODE_TRANSPORT=y
355CONFIG_INET_XFRM_MODE_TUNNEL=y
356CONFIG_INET_XFRM_MODE_BEET=y
357# CONFIG_INET_LRO is not set
358CONFIG_INET_DIAG=y
359CONFIG_INET_TCP_DIAG=y
360# CONFIG_TCP_CONG_ADVANCED is not set
361CONFIG_TCP_CONG_CUBIC=y
362CONFIG_DEFAULT_TCP_CONG="cubic"
363# CONFIG_TCP_MD5SIG is not set
364# CONFIG_IPV6 is not set
365# CONFIG_NETWORK_SECMARK is not set
366# CONFIG_NETFILTER is not set
367# CONFIG_IP_DCCP is not set
368# CONFIG_IP_SCTP is not set
369# CONFIG_TIPC is not set
370# CONFIG_ATM is not set
371# CONFIG_BRIDGE is not set
372# CONFIG_NET_DSA is not set
373# CONFIG_VLAN_8021Q is not set
374# CONFIG_DECNET is not set
375# CONFIG_LLC2 is not set
376# CONFIG_IPX is not set
377# CONFIG_ATALK is not set
378# CONFIG_X25 is not set
379# CONFIG_LAPB is not set
380# CONFIG_ECONET is not set
381# CONFIG_WAN_ROUTER is not set
382# CONFIG_NET_SCHED is not set
383
384#
385# Network testing
386#
387# CONFIG_NET_PKTGEN is not set
388# CONFIG_HAMRADIO is not set
389# CONFIG_CAN is not set
390# CONFIG_IRDA is not set
391# CONFIG_BT is not set
392# CONFIG_AF_RXRPC is not set
393# CONFIG_PHONET is not set
394# CONFIG_WIRELESS is not set
395# CONFIG_RFKILL is not set
396# CONFIG_NET_9P is not set
397
398#
399# Device Drivers
400#
401
402#
403# Generic Driver Options
404#
405CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
406CONFIG_STANDALONE=y
407CONFIG_PREVENT_FIRMWARE_BUILD=y
408# CONFIG_FW_LOADER is not set
409# CONFIG_DEBUG_DRIVER is not set
410# CONFIG_DEBUG_DEVRES is not set
411# CONFIG_SYS_HYPERVISOR is not set
412# CONFIG_CONNECTOR is not set
413CONFIG_MTD=y
414# CONFIG_MTD_DEBUG is not set
415# CONFIG_MTD_CONCAT is not set
416CONFIG_MTD_PARTITIONS=y
417# CONFIG_MTD_REDBOOT_PARTS is not set
418# CONFIG_MTD_CMDLINE_PARTS is not set
419# CONFIG_MTD_AFS_PARTS is not set
420# CONFIG_MTD_AR7_PARTS is not set
421
422#
423# User Modules And Translation Layers
424#
425CONFIG_MTD_CHAR=y
426CONFIG_MTD_BLKDEVS=y
427CONFIG_MTD_BLOCK=y
428# CONFIG_FTL is not set
429# CONFIG_NFTL is not set
430# CONFIG_INFTL is not set
431# CONFIG_RFD_FTL is not set
432# CONFIG_SSFDC is not set
433# CONFIG_MTD_OOPS is not set
434
435#
436# RAM/ROM/Flash chip drivers
437#
438# CONFIG_MTD_CFI is not set
439# CONFIG_MTD_JEDECPROBE is not set
440CONFIG_MTD_MAP_BANK_WIDTH_1=y
441CONFIG_MTD_MAP_BANK_WIDTH_2=y
442CONFIG_MTD_MAP_BANK_WIDTH_4=y
443# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
444# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
445# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
446CONFIG_MTD_CFI_I1=y
447CONFIG_MTD_CFI_I2=y
448# CONFIG_MTD_CFI_I4 is not set
449# CONFIG_MTD_CFI_I8 is not set
450# CONFIG_MTD_RAM is not set
451# CONFIG_MTD_ROM is not set
452# CONFIG_MTD_ABSENT is not set
453
454#
455# Mapping drivers for chip access
456#
457# CONFIG_MTD_COMPLEX_MAPPINGS is not set
458# CONFIG_MTD_PLATRAM is not set
459
460#
461# Self-contained MTD device drivers
462#
463# CONFIG_MTD_DATAFLASH is not set
464# CONFIG_MTD_M25P80 is not set
465# CONFIG_MTD_SLRAM is not set
466# CONFIG_MTD_PHRAM is not set
467# CONFIG_MTD_MTDRAM is not set
468# CONFIG_MTD_BLOCK2MTD is not set
469
470#
471# Disk-On-Chip Device Drivers
472#
473# CONFIG_MTD_DOC2000 is not set
474# CONFIG_MTD_DOC2001 is not set
475# CONFIG_MTD_DOC2001PLUS is not set
476CONFIG_MTD_NAND=y
477# CONFIG_MTD_NAND_VERIFY_WRITE is not set
478# CONFIG_MTD_NAND_ECC_SMC is not set
479# CONFIG_MTD_NAND_MUSEUM_IDS is not set
480# CONFIG_MTD_NAND_GPIO is not set
481CONFIG_MTD_NAND_IDS=y
482# CONFIG_MTD_NAND_DISKONCHIP is not set
483# CONFIG_MTD_NAND_NANDSIM is not set
484# CONFIG_MTD_NAND_PLATFORM is not set
485# CONFIG_MTD_ALAUDA is not set
486# CONFIG_MTD_ONENAND is not set
487
488#
489# UBI - Unsorted block images
490#
491# CONFIG_MTD_UBI is not set
492# CONFIG_PARPORT is not set
493CONFIG_BLK_DEV=y
494# CONFIG_BLK_DEV_COW_COMMON is not set
495CONFIG_BLK_DEV_LOOP=y
496# CONFIG_BLK_DEV_CRYPTOLOOP is not set
497# CONFIG_BLK_DEV_NBD is not set
498# CONFIG_BLK_DEV_UB is not set
499CONFIG_BLK_DEV_RAM=y
500CONFIG_BLK_DEV_RAM_COUNT=16
501CONFIG_BLK_DEV_RAM_SIZE=16384
502# CONFIG_BLK_DEV_XIP is not set
503# CONFIG_CDROM_PKTCDVD is not set
504# CONFIG_ATA_OVER_ETH is not set
505# CONFIG_MISC_DEVICES is not set
506CONFIG_HAVE_IDE=y
507# CONFIG_IDE is not set
508
509#
510# SCSI device support
511#
512# CONFIG_RAID_ATTRS is not set
513CONFIG_SCSI=y
514CONFIG_SCSI_DMA=y
515# CONFIG_SCSI_TGT is not set
516# CONFIG_SCSI_NETLINK is not set
517CONFIG_SCSI_PROC_FS=y
518
519#
520# SCSI support type (disk, tape, CD-ROM)
521#
522CONFIG_BLK_DEV_SD=y
523# CONFIG_CHR_DEV_ST is not set
524# CONFIG_CHR_DEV_OSST is not set
525# CONFIG_BLK_DEV_SR is not set
526# CONFIG_CHR_DEV_SG is not set
527# CONFIG_CHR_DEV_SCH is not set
528
529#
530# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
531#
532# CONFIG_SCSI_MULTI_LUN is not set
533# CONFIG_SCSI_CONSTANTS is not set
534# CONFIG_SCSI_LOGGING is not set
535# CONFIG_SCSI_SCAN_ASYNC is not set
536CONFIG_SCSI_WAIT_SCAN=m
537
538#
539# SCSI Transports
540#
541# CONFIG_SCSI_SPI_ATTRS is not set
542# CONFIG_SCSI_FC_ATTRS is not set
543# CONFIG_SCSI_ISCSI_ATTRS is not set
544# CONFIG_SCSI_SAS_LIBSAS is not set
545# CONFIG_SCSI_SRP_ATTRS is not set
546CONFIG_SCSI_LOWLEVEL=y
547# CONFIG_ISCSI_TCP is not set
548# CONFIG_SCSI_DEBUG is not set
549# CONFIG_SCSI_DH is not set
550# CONFIG_ATA is not set
551# CONFIG_MD is not set
552CONFIG_NETDEVICES=y
553# CONFIG_DUMMY is not set
554# CONFIG_BONDING is not set
555# CONFIG_MACVLAN is not set
556# CONFIG_EQUALIZER is not set
557# CONFIG_TUN is not set
558# CONFIG_VETH is not set
559# CONFIG_NET_ETHERNET is not set
560# CONFIG_NETDEV_1000 is not set
561# CONFIG_NETDEV_10000 is not set
562
563#
564# Wireless LAN
565#
566# CONFIG_WLAN_PRE80211 is not set
567# CONFIG_WLAN_80211 is not set
568# CONFIG_IWLWIFI_LEDS is not set
569
570#
571# USB Network Adapters
572#
573# CONFIG_USB_CATC is not set
574# CONFIG_USB_KAWETH is not set
575# CONFIG_USB_PEGASUS is not set
576# CONFIG_USB_RTL8150 is not set
577# CONFIG_USB_USBNET is not set
578# CONFIG_WAN is not set
579# CONFIG_PPP is not set
580# CONFIG_SLIP is not set
581# CONFIG_NETCONSOLE is not set
582# CONFIG_NETPOLL is not set
583# CONFIG_NET_POLL_CONTROLLER is not set
584# CONFIG_ISDN is not set
585
586#
587# Input device support
588#
589CONFIG_INPUT=y
590# CONFIG_INPUT_FF_MEMLESS is not set
591# CONFIG_INPUT_POLLDEV is not set
592
593#
594# Userland interfaces
595#
596CONFIG_INPUT_MOUSEDEV=y
597CONFIG_INPUT_MOUSEDEV_PSAUX=y
598CONFIG_INPUT_MOUSEDEV_SCREEN_X=800
599CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
600CONFIG_INPUT_JOYDEV=y
601CONFIG_INPUT_EVDEV=y
602# CONFIG_INPUT_EVBUG is not set
603
604#
605# Input Device Drivers
606#
607CONFIG_INPUT_KEYBOARD=y
608# CONFIG_KEYBOARD_ATKBD is not set
609# CONFIG_KEYBOARD_SUNKBD is not set
610# CONFIG_KEYBOARD_LKKBD is not set
611# CONFIG_KEYBOARD_XTKBD is not set
612# CONFIG_KEYBOARD_NEWTON is not set
613# CONFIG_KEYBOARD_STOWAWAY is not set
614# CONFIG_KEYBOARD_GPIO is not set
615CONFIG_INPUT_MOUSE=y
616# CONFIG_MOUSE_PS2 is not set
617# CONFIG_MOUSE_SERIAL is not set
618# CONFIG_MOUSE_APPLETOUCH is not set
619# CONFIG_MOUSE_BCM5974 is not set
620# CONFIG_MOUSE_VSXXXAA is not set
621# CONFIG_MOUSE_GPIO is not set
622# CONFIG_INPUT_JOYSTICK is not set
623# CONFIG_INPUT_TABLET is not set
624CONFIG_INPUT_TOUCHSCREEN=y
625CONFIG_TOUCHSCREEN_ADS7846=y
626# CONFIG_TOUCHSCREEN_FUJITSU is not set
627# CONFIG_TOUCHSCREEN_GUNZE is not set
628# CONFIG_TOUCHSCREEN_ELO is not set
629# CONFIG_TOUCHSCREEN_MTOUCH is not set
630# CONFIG_TOUCHSCREEN_INEXIO is not set
631# CONFIG_TOUCHSCREEN_MK712 is not set
632# CONFIG_TOUCHSCREEN_PENMOUNT is not set
633# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
634# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
635# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
636# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
637# CONFIG_INPUT_MISC is not set
638
639#
640# Hardware I/O ports
641#
642# CONFIG_SERIO is not set
643# CONFIG_GAMEPORT is not set
644
645#
646# Character devices
647#
648CONFIG_VT=y
649CONFIG_CONSOLE_TRANSLATIONS=y
650CONFIG_VT_CONSOLE=y
651CONFIG_HW_CONSOLE=y
652# CONFIG_VT_HW_CONSOLE_BINDING is not set
653CONFIG_DEVKMEM=y
654# CONFIG_SERIAL_NONSTANDARD is not set
655
656#
657# Serial drivers
658#
659CONFIG_SERIAL_8250=y
660CONFIG_SERIAL_8250_CONSOLE=y
661CONFIG_SERIAL_8250_NR_UARTS=32
662CONFIG_SERIAL_8250_RUNTIME_UARTS=4
663CONFIG_SERIAL_8250_EXTENDED=y
664CONFIG_SERIAL_8250_MANY_PORTS=y
665CONFIG_SERIAL_8250_SHARE_IRQ=y
666CONFIG_SERIAL_8250_DETECT_IRQ=y
667CONFIG_SERIAL_8250_RSA=y
668
669#
670# Non-8250 serial port support
671#
672CONFIG_SERIAL_CORE=y
673CONFIG_SERIAL_CORE_CONSOLE=y
674CONFIG_UNIX98_PTYS=y
675# CONFIG_LEGACY_PTYS is not set
676# CONFIG_IPMI_HANDLER is not set
677CONFIG_HW_RANDOM=y
678# CONFIG_NVRAM is not set
679# CONFIG_R3964 is not set
680# CONFIG_RAW_DRIVER is not set
681# CONFIG_TCG_TPM is not set
682CONFIG_I2C=y
683CONFIG_I2C_BOARDINFO=y
684CONFIG_I2C_CHARDEV=y
685CONFIG_I2C_HELPER_AUTO=y
686
687#
688# I2C Hardware Bus support
689#
690
691#
692# I2C system bus drivers (mostly embedded / system-on-chip)
693#
694# CONFIG_I2C_GPIO is not set
695# CONFIG_I2C_OCORES is not set
696CONFIG_I2C_OMAP=y
697# CONFIG_I2C_SIMTEC is not set
698
699#
700# External I2C/SMBus adapter drivers
701#
702# CONFIG_I2C_PARPORT_LIGHT is not set
703# CONFIG_I2C_TAOS_EVM is not set
704# CONFIG_I2C_TINY_USB is not set
705
706#
707# Other I2C/SMBus bus drivers
708#
709# CONFIG_I2C_PCA_PLATFORM is not set
710# CONFIG_I2C_STUB is not set
711
712#
713# Miscellaneous I2C Chip support
714#
715# CONFIG_DS1682 is not set
716# CONFIG_AT24 is not set
717# CONFIG_SENSORS_EEPROM is not set
718# CONFIG_SENSORS_PCF8574 is not set
719# CONFIG_PCF8575 is not set
720# CONFIG_SENSORS_PCA9539 is not set
721# CONFIG_SENSORS_PCF8591 is not set
722# CONFIG_ISP1301_OMAP is not set
723# CONFIG_TPS65010 is not set
724# CONFIG_SENSORS_MAX6875 is not set
725# CONFIG_SENSORS_TSL2550 is not set
726# CONFIG_I2C_DEBUG_CORE is not set
727# CONFIG_I2C_DEBUG_ALGO is not set
728# CONFIG_I2C_DEBUG_BUS is not set
729# CONFIG_I2C_DEBUG_CHIP is not set
730CONFIG_SPI=y
731# CONFIG_SPI_DEBUG is not set
732CONFIG_SPI_MASTER=y
733
734#
735# SPI Master Controller Drivers
736#
737# CONFIG_SPI_BITBANG is not set
738CONFIG_SPI_OMAP24XX=y
739
740#
741# SPI Protocol Masters
742#
743# CONFIG_SPI_AT25 is not set
744# CONFIG_SPI_SPIDEV is not set
745# CONFIG_SPI_TLE62X0 is not set
746CONFIG_ARCH_REQUIRE_GPIOLIB=y
747CONFIG_GPIOLIB=y
748# CONFIG_DEBUG_GPIO is not set
749# CONFIG_GPIO_SYSFS is not set
750
751#
752# Memory mapped GPIO expanders:
753#
754
755#
756# I2C GPIO expanders:
757#
758# CONFIG_GPIO_MAX732X is not set
759# CONFIG_GPIO_PCA953X is not set
760# CONFIG_GPIO_PCF857X is not set
761CONFIG_GPIO_TWL4030=y
762
763#
764# PCI GPIO expanders:
765#
766
767#
768# SPI GPIO expanders:
769#
770# CONFIG_GPIO_MAX7301 is not set
771# CONFIG_GPIO_MCP23S08 is not set
772# CONFIG_W1 is not set
773# CONFIG_POWER_SUPPLY is not set
774# CONFIG_HWMON is not set
775# CONFIG_THERMAL is not set
776# CONFIG_THERMAL_HWMON is not set
777# CONFIG_WATCHDOG is not set
778CONFIG_SSB_POSSIBLE=y
779
780#
781# Sonics Silicon Backplane
782#
783# CONFIG_SSB is not set
784
785#
786# Multifunction device drivers
787#
788# CONFIG_MFD_CORE is not set
789# CONFIG_MFD_SM501 is not set
790# CONFIG_MFD_ASIC3 is not set
791# CONFIG_HTC_EGPIO is not set
792# CONFIG_HTC_PASIC3 is not set
793CONFIG_TWL4030_CORE=y
794# CONFIG_MFD_TMIO is not set
795# CONFIG_MFD_T7L66XB is not set
796# CONFIG_MFD_TC6387XB is not set
797# CONFIG_MFD_TC6393XB is not set
798# CONFIG_PMIC_DA903X is not set
799# CONFIG_MFD_WM8400 is not set
800# CONFIG_MFD_WM8350_I2C is not set
801
802#
803# Multimedia devices
804#
805
806#
807# Multimedia core support
808#
809# CONFIG_VIDEO_DEV is not set
810# CONFIG_DVB_CORE is not set
811# CONFIG_VIDEO_MEDIA is not set
812
813#
814# Multimedia drivers
815#
816CONFIG_DAB=y
817# CONFIG_USB_DABUSB is not set
818
819#
820# Graphics support
821#
822# CONFIG_VGASTATE is not set
823# CONFIG_VIDEO_OUTPUT_CONTROL is not set
824# CONFIG_FB is not set
825# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
826
827#
828# Display device support
829#
830# CONFIG_DISPLAY_SUPPORT is not set
831
832#
833# Console display driver support
834#
835# CONFIG_VGA_CONSOLE is not set
836CONFIG_DUMMY_CONSOLE=y
837# CONFIG_SOUND is not set
838CONFIG_HID_SUPPORT=y
839CONFIG_HID=y
840# CONFIG_HID_DEBUG is not set
841# CONFIG_HIDRAW is not set
842
843#
844# USB Input Devices
845#
846CONFIG_USB_HID=y
847# CONFIG_HID_PID is not set
848# CONFIG_USB_HIDDEV is not set
849
850#
851# Special HID drivers
852#
853# CONFIG_HID_COMPAT is not set
854# CONFIG_HID_A4TECH is not set
855# CONFIG_HID_APPLE is not set
856# CONFIG_HID_BELKIN is not set
857# CONFIG_HID_BRIGHT is not set
858# CONFIG_HID_CHERRY is not set
859# CONFIG_HID_CHICONY is not set
860# CONFIG_HID_CYPRESS is not set
861# CONFIG_HID_DELL is not set
862# CONFIG_HID_EZKEY is not set
863# CONFIG_HID_GYRATION is not set
864# CONFIG_HID_LOGITECH is not set
865# CONFIG_HID_MICROSOFT is not set
866# CONFIG_HID_MONTEREY is not set
867# CONFIG_HID_PANTHERLORD is not set
868# CONFIG_HID_PETALYNX is not set
869# CONFIG_HID_SAMSUNG is not set
870# CONFIG_HID_SONY is not set
871# CONFIG_HID_SUNPLUS is not set
872# CONFIG_THRUSTMASTER_FF is not set
873# CONFIG_ZEROPLUS_FF is not set
874CONFIG_USB_SUPPORT=y
875CONFIG_USB_ARCH_HAS_HCD=y
876CONFIG_USB_ARCH_HAS_OHCI=y
877# CONFIG_USB_ARCH_HAS_EHCI is not set
878CONFIG_USB=y
879# CONFIG_USB_DEBUG is not set
880# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
881
882#
883# Miscellaneous USB options
884#
885CONFIG_USB_DEVICEFS=y
886CONFIG_USB_DEVICE_CLASS=y
887# CONFIG_USB_DYNAMIC_MINORS is not set
888# CONFIG_USB_OTG is not set
889# CONFIG_USB_OTG_WHITELIST is not set
890# CONFIG_USB_OTG_BLACKLIST_HUB is not set
891CONFIG_USB_MON=y
892# CONFIG_USB_WUSB is not set
893# CONFIG_USB_WUSB_CBAF is not set
894
895#
896# USB Host Controller Drivers
897#
898# CONFIG_USB_C67X00_HCD is not set
899# CONFIG_USB_ISP116X_HCD is not set
900# CONFIG_USB_OHCI_HCD is not set
901# CONFIG_USB_SL811_HCD is not set
902# CONFIG_USB_R8A66597_HCD is not set
903# CONFIG_USB_HWA_HCD is not set
904CONFIG_USB_MUSB_HDRC=y
905CONFIG_USB_MUSB_SOC=y
906
907#
908# OMAP 343x high speed USB support
909#
910CONFIG_USB_MUSB_HOST=y
911# CONFIG_USB_MUSB_PERIPHERAL is not set
912# CONFIG_USB_MUSB_OTG is not set
913# CONFIG_USB_GADGET_MUSB_HDRC is not set
914CONFIG_USB_MUSB_HDRC_HCD=y
915# CONFIG_MUSB_PIO_ONLY is not set
916CONFIG_USB_INVENTRA_DMA=y
917# CONFIG_USB_TI_CPPI_DMA is not set
918# CONFIG_USB_MUSB_DEBUG is not set
919
920#
921# USB Device Class drivers
922#
923# CONFIG_USB_ACM is not set
924# CONFIG_USB_PRINTER is not set
925# CONFIG_USB_WDM is not set
926# CONFIG_USB_TMC is not set
927
928#
929# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
930#
931
932#
933# see USB_STORAGE Help for more information
934#
935# CONFIG_USB_STORAGE is not set
936# CONFIG_USB_LIBUSUAL is not set
937
938#
939# USB Imaging devices
940#
941# CONFIG_USB_MDC800 is not set
942# CONFIG_USB_MICROTEK is not set
943
944#
945# USB port drivers
946#
947# CONFIG_USB_SERIAL is not set
948
949#
950# USB Miscellaneous drivers
951#
952# CONFIG_USB_EMI62 is not set
953# CONFIG_USB_EMI26 is not set
954# CONFIG_USB_ADUTUX is not set
955# CONFIG_USB_SEVSEG is not set
956# CONFIG_USB_RIO500 is not set
957# CONFIG_USB_LEGOTOWER is not set
958# CONFIG_USB_LCD is not set
959# CONFIG_USB_BERRY_CHARGE is not set
960# CONFIG_USB_LED is not set
961# CONFIG_USB_CYPRESS_CY7C63 is not set
962# CONFIG_USB_CYTHERM is not set
963# CONFIG_USB_PHIDGET is not set
964# CONFIG_USB_IDMOUSE is not set
965# CONFIG_USB_FTDI_ELAN is not set
966# CONFIG_USB_APPLEDISPLAY is not set
967# CONFIG_USB_LD is not set
968# CONFIG_USB_TRANCEVIBRATOR is not set
969# CONFIG_USB_IOWARRIOR is not set
970# CONFIG_USB_TEST is not set
971# CONFIG_USB_ISIGHTFW is not set
972# CONFIG_USB_VST is not set
973CONFIG_USB_GADGET=y
974# CONFIG_USB_GADGET_DEBUG is not set
975# CONFIG_USB_GADGET_DEBUG_FILES is not set
976CONFIG_USB_GADGET_VBUS_DRAW=2
977CONFIG_USB_GADGET_SELECTED=y
978# CONFIG_USB_GADGET_AT91 is not set
979# CONFIG_USB_GADGET_ATMEL_USBA is not set
980# CONFIG_USB_GADGET_FSL_USB2 is not set
981# CONFIG_USB_GADGET_LH7A40X is not set
982CONFIG_USB_GADGET_OMAP=y
983CONFIG_USB_OMAP=y
984# CONFIG_USB_GADGET_PXA25X is not set
985# CONFIG_USB_GADGET_PXA27X is not set
986# CONFIG_USB_GADGET_S3C2410 is not set
987# CONFIG_USB_GADGET_M66592 is not set
988# CONFIG_USB_GADGET_AMD5536UDC is not set
989# CONFIG_USB_GADGET_FSL_QE is not set
990# CONFIG_USB_GADGET_NET2280 is not set
991# CONFIG_USB_GADGET_GOKU is not set
992# CONFIG_USB_GADGET_DUMMY_HCD is not set
993# CONFIG_USB_GADGET_DUALSPEED is not set
994# CONFIG_USB_ZERO is not set
995CONFIG_USB_ETH=y
996CONFIG_USB_ETH_RNDIS=y
997# CONFIG_USB_GADGETFS is not set
998# CONFIG_USB_FILE_STORAGE is not set
999# CONFIG_USB_G_SERIAL is not set
1000# CONFIG_USB_MIDI_GADGET is not set
1001# CONFIG_USB_G_PRINTER is not set
1002# CONFIG_USB_CDC_COMPOSITE is not set
1003CONFIG_MMC=y
1004# CONFIG_MMC_DEBUG is not set
1005# CONFIG_MMC_UNSAFE_RESUME is not set
1006
1007#
1008# MMC/SD/SDIO Card Drivers
1009#
1010CONFIG_MMC_BLOCK=y
1011CONFIG_MMC_BLOCK_BOUNCE=y
1012# CONFIG_SDIO_UART is not set
1013# CONFIG_MMC_TEST is not set
1014
1015#
1016# MMC/SD/SDIO Host Controller Drivers
1017#
1018# CONFIG_MMC_SDHCI is not set
1019# CONFIG_MMC_OMAP is not set
1020# CONFIG_MMC_SPI is not set
1021# CONFIG_MEMSTICK is not set
1022# CONFIG_ACCESSIBILITY is not set
1023# CONFIG_NEW_LEDS is not set
1024CONFIG_RTC_LIB=y
1025CONFIG_RTC_CLASS=y
1026CONFIG_RTC_HCTOSYS=y
1027CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1028# CONFIG_RTC_DEBUG is not set
1029
1030#
1031# RTC interfaces
1032#
1033CONFIG_RTC_INTF_SYSFS=y
1034CONFIG_RTC_INTF_PROC=y
1035CONFIG_RTC_INTF_DEV=y
1036# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1037# CONFIG_RTC_DRV_TEST is not set
1038
1039#
1040# I2C RTC drivers
1041#
1042# CONFIG_RTC_DRV_DS1307 is not set
1043# CONFIG_RTC_DRV_DS1374 is not set
1044# CONFIG_RTC_DRV_DS1672 is not set
1045# CONFIG_RTC_DRV_MAX6900 is not set
1046# CONFIG_RTC_DRV_RS5C372 is not set
1047# CONFIG_RTC_DRV_ISL1208 is not set
1048# CONFIG_RTC_DRV_X1205 is not set
1049# CONFIG_RTC_DRV_PCF8563 is not set
1050# CONFIG_RTC_DRV_PCF8583 is not set
1051# CONFIG_RTC_DRV_M41T80 is not set
1052CONFIG_RTC_DRV_TWL4030=y
1053# CONFIG_RTC_DRV_S35390A is not set
1054# CONFIG_RTC_DRV_FM3130 is not set
1055# CONFIG_RTC_DRV_RX8581 is not set
1056
1057#
1058# SPI RTC drivers
1059#
1060# CONFIG_RTC_DRV_M41T94 is not set
1061# CONFIG_RTC_DRV_DS1305 is not set
1062# CONFIG_RTC_DRV_DS1390 is not set
1063# CONFIG_RTC_DRV_MAX6902 is not set
1064# CONFIG_RTC_DRV_R9701 is not set
1065# CONFIG_RTC_DRV_RS5C348 is not set
1066# CONFIG_RTC_DRV_DS3234 is not set
1067
1068#
1069# Platform RTC drivers
1070#
1071# CONFIG_RTC_DRV_CMOS is not set
1072# CONFIG_RTC_DRV_DS1286 is not set
1073# CONFIG_RTC_DRV_DS1511 is not set
1074# CONFIG_RTC_DRV_DS1553 is not set
1075# CONFIG_RTC_DRV_DS1742 is not set
1076# CONFIG_RTC_DRV_STK17TA8 is not set
1077# CONFIG_RTC_DRV_M48T86 is not set
1078# CONFIG_RTC_DRV_M48T35 is not set
1079# CONFIG_RTC_DRV_M48T59 is not set
1080# CONFIG_RTC_DRV_BQ4802 is not set
1081# CONFIG_RTC_DRV_V3020 is not set
1082
1083#
1084# on-CPU RTC drivers
1085#
1086# CONFIG_DMADEVICES is not set
1087# CONFIG_REGULATOR is not set
1088# CONFIG_UIO is not set
1089
1090#
1091# File systems
1092#
1093CONFIG_EXT2_FS=y
1094# CONFIG_EXT2_FS_XATTR is not set
1095# CONFIG_EXT2_FS_XIP is not set
1096CONFIG_EXT3_FS=y
1097# CONFIG_EXT3_FS_XATTR is not set
1098# CONFIG_EXT4_FS is not set
1099CONFIG_JBD=y
1100# CONFIG_REISERFS_FS is not set
1101# CONFIG_JFS_FS is not set
1102# CONFIG_FS_POSIX_ACL is not set
1103CONFIG_FILE_LOCKING=y
1104# CONFIG_XFS_FS is not set
1105# CONFIG_OCFS2_FS is not set
1106CONFIG_DNOTIFY=y
1107CONFIG_INOTIFY=y
1108CONFIG_INOTIFY_USER=y
1109CONFIG_QUOTA=y
1110# CONFIG_QUOTA_NETLINK_INTERFACE is not set
1111CONFIG_PRINT_QUOTA_WARNING=y
1112# CONFIG_QFMT_V1 is not set
1113CONFIG_QFMT_V2=y
1114CONFIG_QUOTACTL=y
1115# CONFIG_AUTOFS_FS is not set
1116# CONFIG_AUTOFS4_FS is not set
1117# CONFIG_FUSE_FS is not set
1118
1119#
1120# CD-ROM/DVD Filesystems
1121#
1122# CONFIG_ISO9660_FS is not set
1123# CONFIG_UDF_FS is not set
1124
1125#
1126# DOS/FAT/NT Filesystems
1127#
1128CONFIG_FAT_FS=y
1129CONFIG_MSDOS_FS=y
1130CONFIG_VFAT_FS=y
1131CONFIG_FAT_DEFAULT_CODEPAGE=437
1132CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1133# CONFIG_NTFS_FS is not set
1134
1135#
1136# Pseudo filesystems
1137#
1138CONFIG_PROC_FS=y
1139CONFIG_PROC_SYSCTL=y
1140CONFIG_PROC_PAGE_MONITOR=y
1141CONFIG_SYSFS=y
1142CONFIG_TMPFS=y
1143# CONFIG_TMPFS_POSIX_ACL is not set
1144# CONFIG_HUGETLB_PAGE is not set
1145# CONFIG_CONFIGFS_FS is not set
1146
1147#
1148# Miscellaneous filesystems
1149#
1150# CONFIG_ADFS_FS is not set
1151# CONFIG_AFFS_FS is not set
1152# CONFIG_HFS_FS is not set
1153# CONFIG_HFSPLUS_FS is not set
1154# CONFIG_BEFS_FS is not set
1155# CONFIG_BFS_FS is not set
1156# CONFIG_EFS_FS is not set
1157# CONFIG_JFFS2_FS is not set
1158# CONFIG_CRAMFS is not set
1159# CONFIG_VXFS_FS is not set
1160# CONFIG_MINIX_FS is not set
1161# CONFIG_OMFS_FS is not set
1162# CONFIG_HPFS_FS is not set
1163# CONFIG_QNX4FS_FS is not set
1164# CONFIG_ROMFS_FS is not set
1165# CONFIG_SYSV_FS is not set
1166# CONFIG_UFS_FS is not set
1167# CONFIG_NETWORK_FILESYSTEMS is not set
1168
1169#
1170# Partition Types
1171#
1172CONFIG_PARTITION_ADVANCED=y
1173# CONFIG_ACORN_PARTITION is not set
1174# CONFIG_OSF_PARTITION is not set
1175# CONFIG_AMIGA_PARTITION is not set
1176# CONFIG_ATARI_PARTITION is not set
1177# CONFIG_MAC_PARTITION is not set
1178CONFIG_MSDOS_PARTITION=y
1179# CONFIG_BSD_DISKLABEL is not set
1180# CONFIG_MINIX_SUBPARTITION is not set
1181# CONFIG_SOLARIS_X86_PARTITION is not set
1182# CONFIG_UNIXWARE_DISKLABEL is not set
1183# CONFIG_LDM_PARTITION is not set
1184# CONFIG_SGI_PARTITION is not set
1185# CONFIG_ULTRIX_PARTITION is not set
1186# CONFIG_SUN_PARTITION is not set
1187# CONFIG_KARMA_PARTITION is not set
1188# CONFIG_EFI_PARTITION is not set
1189# CONFIG_SYSV68_PARTITION is not set
1190CONFIG_NLS=y
1191CONFIG_NLS_DEFAULT="iso8859-1"
1192CONFIG_NLS_CODEPAGE_437=y
1193# CONFIG_NLS_CODEPAGE_737 is not set
1194# CONFIG_NLS_CODEPAGE_775 is not set
1195# CONFIG_NLS_CODEPAGE_850 is not set
1196# CONFIG_NLS_CODEPAGE_852 is not set
1197# CONFIG_NLS_CODEPAGE_855 is not set
1198# CONFIG_NLS_CODEPAGE_857 is not set
1199# CONFIG_NLS_CODEPAGE_860 is not set
1200# CONFIG_NLS_CODEPAGE_861 is not set
1201# CONFIG_NLS_CODEPAGE_862 is not set
1202# CONFIG_NLS_CODEPAGE_863 is not set
1203# CONFIG_NLS_CODEPAGE_864 is not set
1204# CONFIG_NLS_CODEPAGE_865 is not set
1205# CONFIG_NLS_CODEPAGE_866 is not set
1206# CONFIG_NLS_CODEPAGE_869 is not set
1207# CONFIG_NLS_CODEPAGE_936 is not set
1208# CONFIG_NLS_CODEPAGE_950 is not set
1209# CONFIG_NLS_CODEPAGE_932 is not set
1210# CONFIG_NLS_CODEPAGE_949 is not set
1211# CONFIG_NLS_CODEPAGE_874 is not set
1212# CONFIG_NLS_ISO8859_8 is not set
1213# CONFIG_NLS_CODEPAGE_1250 is not set
1214# CONFIG_NLS_CODEPAGE_1251 is not set
1215# CONFIG_NLS_ASCII is not set
1216CONFIG_NLS_ISO8859_1=y
1217# CONFIG_NLS_ISO8859_2 is not set
1218# CONFIG_NLS_ISO8859_3 is not set
1219# CONFIG_NLS_ISO8859_4 is not set
1220# CONFIG_NLS_ISO8859_5 is not set
1221# CONFIG_NLS_ISO8859_6 is not set
1222# CONFIG_NLS_ISO8859_7 is not set
1223# CONFIG_NLS_ISO8859_9 is not set
1224# CONFIG_NLS_ISO8859_13 is not set
1225# CONFIG_NLS_ISO8859_14 is not set
1226# CONFIG_NLS_ISO8859_15 is not set
1227# CONFIG_NLS_KOI8_R is not set
1228# CONFIG_NLS_KOI8_U is not set
1229# CONFIG_NLS_UTF8 is not set
1230# CONFIG_DLM is not set
1231
1232#
1233# Kernel hacking
1234#
1235# CONFIG_PRINTK_TIME is not set
1236CONFIG_ENABLE_WARN_DEPRECATED=y
1237CONFIG_ENABLE_MUST_CHECK=y
1238CONFIG_FRAME_WARN=1024
1239CONFIG_MAGIC_SYSRQ=y
1240# CONFIG_UNUSED_SYMBOLS is not set
1241# CONFIG_DEBUG_FS is not set
1242# CONFIG_HEADERS_CHECK is not set
1243CONFIG_DEBUG_KERNEL=y
1244# CONFIG_DEBUG_SHIRQ is not set
1245CONFIG_DETECT_SOFTLOCKUP=y
1246# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1247CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1248CONFIG_SCHED_DEBUG=y
1249# CONFIG_SCHEDSTATS is not set
1250# CONFIG_TIMER_STATS is not set
1251# CONFIG_DEBUG_OBJECTS is not set
1252# CONFIG_DEBUG_SLAB is not set
1253# CONFIG_DEBUG_RT_MUTEXES is not set
1254# CONFIG_RT_MUTEX_TESTER is not set
1255# CONFIG_DEBUG_SPINLOCK is not set
1256CONFIG_DEBUG_MUTEXES=y
1257# CONFIG_DEBUG_LOCK_ALLOC is not set
1258# CONFIG_PROVE_LOCKING is not set
1259# CONFIG_LOCK_STAT is not set
1260# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1261# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1262# CONFIG_DEBUG_KOBJECT is not set
1263# CONFIG_DEBUG_BUGVERBOSE is not set
1264CONFIG_DEBUG_INFO=y
1265# CONFIG_DEBUG_VM is not set
1266# CONFIG_DEBUG_WRITECOUNT is not set
1267# CONFIG_DEBUG_MEMORY_INIT is not set
1268# CONFIG_DEBUG_LIST is not set
1269# CONFIG_DEBUG_SG is not set
1270CONFIG_FRAME_POINTER=y
1271# CONFIG_BOOT_PRINTK_DELAY is not set
1272# CONFIG_RCU_TORTURE_TEST is not set
1273# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1274# CONFIG_BACKTRACE_SELF_TEST is not set
1275# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1276# CONFIG_FAULT_INJECTION is not set
1277# CONFIG_LATENCYTOP is not set
1278CONFIG_HAVE_FUNCTION_TRACER=y
1279
1280#
1281# Tracers
1282#
1283# CONFIG_FUNCTION_TRACER is not set
1284# CONFIG_IRQSOFF_TRACER is not set
1285# CONFIG_SCHED_TRACER is not set
1286# CONFIG_CONTEXT_SWITCH_TRACER is not set
1287# CONFIG_BOOT_TRACER is not set
1288# CONFIG_STACK_TRACER is not set
1289# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1290# CONFIG_SAMPLES is not set
1291CONFIG_HAVE_ARCH_KGDB=y
1292# CONFIG_KGDB is not set
1293# CONFIG_DEBUG_USER is not set
1294# CONFIG_DEBUG_ERRORS is not set
1295# CONFIG_DEBUG_STACK_USAGE is not set
1296# CONFIG_DEBUG_LL is not set
1297
1298#
1299# Security options
1300#
1301# CONFIG_KEYS is not set
1302# CONFIG_SECURITY is not set
1303# CONFIG_SECURITYFS is not set
1304# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1305CONFIG_CRYPTO=y
1306
1307#
1308# Crypto core or helper
1309#
1310# CONFIG_CRYPTO_FIPS is not set
1311CONFIG_CRYPTO_ALGAPI=y
1312CONFIG_CRYPTO_AEAD=y
1313CONFIG_CRYPTO_BLKCIPHER=y
1314CONFIG_CRYPTO_HASH=y
1315CONFIG_CRYPTO_RNG=y
1316CONFIG_CRYPTO_MANAGER=y
1317# CONFIG_CRYPTO_GF128MUL is not set
1318# CONFIG_CRYPTO_NULL is not set
1319# CONFIG_CRYPTO_CRYPTD is not set
1320# CONFIG_CRYPTO_AUTHENC is not set
1321# CONFIG_CRYPTO_TEST is not set
1322
1323#
1324# Authenticated Encryption with Associated Data
1325#
1326# CONFIG_CRYPTO_CCM is not set
1327# CONFIG_CRYPTO_GCM is not set
1328# CONFIG_CRYPTO_SEQIV is not set
1329
1330#
1331# Block modes
1332#
1333CONFIG_CRYPTO_CBC=y
1334# CONFIG_CRYPTO_CTR is not set
1335# CONFIG_CRYPTO_CTS is not set
1336CONFIG_CRYPTO_ECB=m
1337# CONFIG_CRYPTO_LRW is not set
1338CONFIG_CRYPTO_PCBC=m
1339# CONFIG_CRYPTO_XTS is not set
1340
1341#
1342# Hash modes
1343#
1344# CONFIG_CRYPTO_HMAC is not set
1345# CONFIG_CRYPTO_XCBC is not set
1346
1347#
1348# Digest
1349#
1350# CONFIG_CRYPTO_CRC32C is not set
1351# CONFIG_CRYPTO_MD4 is not set
1352CONFIG_CRYPTO_MD5=y
1353# CONFIG_CRYPTO_MICHAEL_MIC is not set
1354# CONFIG_CRYPTO_RMD128 is not set
1355# CONFIG_CRYPTO_RMD160 is not set
1356# CONFIG_CRYPTO_RMD256 is not set
1357# CONFIG_CRYPTO_RMD320 is not set
1358# CONFIG_CRYPTO_SHA1 is not set
1359# CONFIG_CRYPTO_SHA256 is not set
1360# CONFIG_CRYPTO_SHA512 is not set
1361# CONFIG_CRYPTO_TGR192 is not set
1362# CONFIG_CRYPTO_WP512 is not set
1363
1364#
1365# Ciphers
1366#
1367# CONFIG_CRYPTO_AES is not set
1368# CONFIG_CRYPTO_ANUBIS is not set
1369# CONFIG_CRYPTO_ARC4 is not set
1370# CONFIG_CRYPTO_BLOWFISH is not set
1371# CONFIG_CRYPTO_CAMELLIA is not set
1372# CONFIG_CRYPTO_CAST5 is not set
1373# CONFIG_CRYPTO_CAST6 is not set
1374CONFIG_CRYPTO_DES=y
1375# CONFIG_CRYPTO_FCRYPT is not set
1376# CONFIG_CRYPTO_KHAZAD is not set
1377# CONFIG_CRYPTO_SALSA20 is not set
1378# CONFIG_CRYPTO_SEED is not set
1379# CONFIG_CRYPTO_SERPENT is not set
1380# CONFIG_CRYPTO_TEA is not set
1381# CONFIG_CRYPTO_TWOFISH is not set
1382
1383#
1384# Compression
1385#
1386# CONFIG_CRYPTO_DEFLATE is not set
1387# CONFIG_CRYPTO_LZO is not set
1388
1389#
1390# Random Number Generation
1391#
1392# CONFIG_CRYPTO_ANSI_CPRNG is not set
1393CONFIG_CRYPTO_HW=y
1394
1395#
1396# Library routines
1397#
1398CONFIG_BITREVERSE=y
1399CONFIG_CRC_CCITT=y
1400# CONFIG_CRC16 is not set
1401# CONFIG_CRC_T10DIF is not set
1402# CONFIG_CRC_ITU_T is not set
1403CONFIG_CRC32=y
1404# CONFIG_CRC7 is not set
1405CONFIG_LIBCRC32C=y
1406CONFIG_PLIST=y
1407CONFIG_HAS_IOMEM=y
1408CONFIG_HAS_IOPORT=y
1409CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/omap_ldp_defconfig b/arch/arm/configs/omap_ldp_defconfig
index 948a212fb1cc..b77d054169ee 100644
--- a/arch/arm/configs/omap_ldp_defconfig
+++ b/arch/arm/configs/omap_ldp_defconfig
@@ -316,7 +316,82 @@ CONFIG_BINFMT_MISC=y
316# 316#
317# CONFIG_PM is not set 317# CONFIG_PM is not set
318CONFIG_ARCH_SUSPEND_POSSIBLE=y 318CONFIG_ARCH_SUSPEND_POSSIBLE=y
319# CONFIG_NET is not set 319CONFIG_NET=y
320
321#
322# Networking options
323#
324CONFIG_PACKET=y
325# CONFIG_PACKET_MMAP is not set
326CONFIG_UNIX=y
327CONFIG_XFRM=y
328CONFIG_XFRM_USER=y
329# CONFIG_XFRM_SUB_POLICY is not set
330CONFIG_XFRM_MIGRATE=y
331# CONFIG_XFRM_STATISTICS is not set
332CONFIG_NET_KEY=y
333CONFIG_NET_KEY_MIGRATE=y
334CONFIG_INET=y
335CONFIG_IP_MULTICAST=y
336# CONFIG_IP_ADVANCED_ROUTER is not set
337CONFIG_IP_FIB_HASH=y
338CONFIG_IP_PNP=y
339CONFIG_IP_PNP_DHCP=y
340CONFIG_IP_PNP_BOOTP=y
341CONFIG_IP_PNP_RARP=y
342# CONFIG_NET_IPIP is not set
343# CONFIG_NET_IPGRE is not set
344# CONFIG_IP_MROUTE is not set
345# CONFIG_ARPD is not set
346# CONFIG_SYN_COOKIES is not set
347# CONFIG_INET_AH is not set
348# CONFIG_INET_ESP is not set
349# CONFIG_INET_IPCOMP is not set
350# CONFIG_INET_XFRM_TUNNEL is not set
351# CONFIG_INET_TUNNEL is not set
352CONFIG_INET_XFRM_MODE_TRANSPORT=y
353CONFIG_INET_XFRM_MODE_TUNNEL=y
354CONFIG_INET_XFRM_MODE_BEET=y
355# CONFIG_INET_LRO is not set
356CONFIG_INET_DIAG=y
357CONFIG_INET_TCP_DIAG=y
358# CONFIG_TCP_CONG_ADVANCED is not set
359CONFIG_TCP_CONG_CUBIC=y
360CONFIG_DEFAULT_TCP_CONG="cubic"
361# CONFIG_TCP_MD5SIG is not set
362# CONFIG_IPV6 is not set
363# CONFIG_NETWORK_SECMARK is not set
364# CONFIG_NETFILTER is not set
365# CONFIG_IP_DCCP is not set
366# CONFIG_IP_SCTP is not set
367# CONFIG_TIPC is not set
368# CONFIG_ATM is not set
369# CONFIG_BRIDGE is not set
370# CONFIG_NET_DSA is not set
371# CONFIG_VLAN_8021Q is not set
372# CONFIG_DECNET is not set
373# CONFIG_LLC2 is not set
374# CONFIG_IPX is not set
375# CONFIG_ATALK is not set
376# CONFIG_X25 is not set
377# CONFIG_LAPB is not set
378# CONFIG_ECONET is not set
379# CONFIG_WAN_ROUTER is not set
380# CONFIG_NET_SCHED is not set
381
382#
383# Network testing
384#
385# CONFIG_NET_PKTGEN is not set
386# CONFIG_HAMRADIO is not set
387# CONFIG_CAN is not set
388# CONFIG_IRDA is not set
389# CONFIG_BT is not set
390# CONFIG_AF_RXRPC is not set
391# CONFIG_PHONET is not set
392# CONFIG_WIRELESS is not set
393# CONFIG_RFKILL is not set
394# CONFIG_NET_9P is not set
320 395
321# 396#
322# Device Drivers 397# Device Drivers
@@ -332,6 +407,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
332# CONFIG_DEBUG_DRIVER is not set 407# CONFIG_DEBUG_DRIVER is not set
333# CONFIG_DEBUG_DEVRES is not set 408# CONFIG_DEBUG_DEVRES is not set
334# CONFIG_SYS_HYPERVISOR is not set 409# CONFIG_SYS_HYPERVISOR is not set
410CONFIG_CONNECTOR=y
411CONFIG_PROC_EVENTS=y
335# CONFIG_MTD is not set 412# CONFIG_MTD is not set
336# CONFIG_PARPORT is not set 413# CONFIG_PARPORT is not set
337CONFIG_BLK_DEV=y 414CONFIG_BLK_DEV=y
@@ -390,6 +467,54 @@ CONFIG_SCSI_LOWLEVEL=y
390# CONFIG_SCSI_DH is not set 467# CONFIG_SCSI_DH is not set
391# CONFIG_ATA is not set 468# CONFIG_ATA is not set
392# CONFIG_MD is not set 469# CONFIG_MD is not set
470CONFIG_NETDEVICES=y
471# CONFIG_DUMMY is not set
472# CONFIG_BONDING is not set
473# CONFIG_MACVLAN is not set
474# CONFIG_EQUALIZER is not set
475# CONFIG_TUN is not set
476# CONFIG_VETH is not set
477# CONFIG_PHYLIB is not set
478CONFIG_NET_ETHERNET=y
479CONFIG_MII=y
480# CONFIG_AX88796 is not set
481# CONFIG_SMC91X is not set
482# CONFIG_DM9000 is not set
483# CONFIG_ENC28J60 is not set
484CONFIG_SMC911X=y
485# CONFIG_IBM_NEW_EMAC_ZMII is not set
486# CONFIG_IBM_NEW_EMAC_RGMII is not set
487# CONFIG_IBM_NEW_EMAC_TAH is not set
488# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
489# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
490# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
491# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
492# CONFIG_B44 is not set
493CONFIG_NETDEV_1000=y
494CONFIG_NETDEV_10000=y
495
496#
497# Wireless LAN
498#
499# CONFIG_WLAN_PRE80211 is not set
500# CONFIG_WLAN_80211 is not set
501# CONFIG_IWLWIFI_LEDS is not set
502
503#
504# USB Network Adapters
505#
506# CONFIG_USB_CATC is not set
507# CONFIG_USB_KAWETH is not set
508# CONFIG_USB_PEGASUS is not set
509# CONFIG_USB_RTL8150 is not set
510# CONFIG_USB_USBNET is not set
511# CONFIG_WAN is not set
512# CONFIG_PPP is not set
513# CONFIG_SLIP is not set
514# CONFIG_NETCONSOLE is not set
515# CONFIG_NETPOLL is not set
516# CONFIG_NET_POLL_CONTROLLER is not set
517# CONFIG_ISDN is not set
393 518
394# 519#
395# Input device support 520# Input device support
@@ -816,6 +941,27 @@ CONFIG_TMPFS=y
816# CONFIG_ROMFS_FS is not set 941# CONFIG_ROMFS_FS is not set
817# CONFIG_SYSV_FS is not set 942# CONFIG_SYSV_FS is not set
818# CONFIG_UFS_FS is not set 943# CONFIG_UFS_FS is not set
944CONFIG_NETWORK_FILESYSTEMS=y
945CONFIG_NFS_FS=y
946CONFIG_NFS_V3=y
947CONFIG_NFS_V3_ACL=y
948CONFIG_NFS_V4=y
949CONFIG_ROOT_NFS=y
950# CONFIG_NFSD is not set
951CONFIG_LOCKD=y
952CONFIG_LOCKD_V4=y
953CONFIG_NFS_ACL_SUPPORT=y
954CONFIG_NFS_COMMON=y
955CONFIG_SUNRPC=y
956CONFIG_SUNRPC_GSS=y
957# CONFIG_SUNRPC_REGISTER_V4 is not set
958CONFIG_RPCSEC_GSS_KRB5=y
959# CONFIG_RPCSEC_GSS_SPKM3 is not set
960# CONFIG_SMB_FS is not set
961# CONFIG_CIFS is not set
962# CONFIG_NCP_FS is not set
963# CONFIG_CODA_FS is not set
964# CONFIG_AFS_FS is not set
819 965
820# 966#
821# Partition Types 967# Partition Types
diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h
index 9a1db20e032a..63a481fbbed4 100644
--- a/arch/arm/include/asm/bitops.h
+++ b/arch/arm/include/asm/bitops.h
@@ -237,6 +237,7 @@ extern int _find_next_bit_be(const unsigned long *p, int size, int offset);
237#if __LINUX_ARM_ARCH__ < 5 237#if __LINUX_ARM_ARCH__ < 5
238 238
239#include <asm-generic/bitops/ffz.h> 239#include <asm-generic/bitops/ffz.h>
240#include <asm-generic/bitops/__fls.h>
240#include <asm-generic/bitops/__ffs.h> 241#include <asm-generic/bitops/__ffs.h>
241#include <asm-generic/bitops/fls.h> 242#include <asm-generic/bitops/fls.h>
242#include <asm-generic/bitops/ffs.h> 243#include <asm-generic/bitops/ffs.h>
@@ -277,16 +278,19 @@ static inline int constant_fls(int x)
277 * the clz instruction for much better code efficiency. 278 * the clz instruction for much better code efficiency.
278 */ 279 */
279 280
280#define __fls(x) \
281 ( __builtin_constant_p(x) ? constant_fls(x) : \
282 ({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) )
283
284/* Implement fls() in C so that 64-bit args are suitably truncated */
285static inline int fls(int x) 281static inline int fls(int x)
286{ 282{
287 return __fls(x); 283 int ret;
284
285 if (__builtin_constant_p(x))
286 return constant_fls(x);
287
288 asm("clz\t%0, %1" : "=r" (ret) : "r" (x) : "cc");
289 ret = 32 - ret;
290 return ret;
288} 291}
289 292
293#define __fls(x) (fls(x) - 1)
290#define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); }) 294#define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); })
291#define __ffs(x) (ffs(x) - 1) 295#define __ffs(x) (ffs(x) - 1)
292#define ffz(x) __ffs( ~(x) ) 296#define ffz(x) __ffs( ~(x) )
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index 2320508443a5..1845892260e7 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -23,7 +23,7 @@
23#include <asm/types.h> 23#include <asm/types.h>
24 24
25#ifdef __KERNEL__ 25#ifdef __KERNEL__
26#define STACK_TOP ((current->personality == PER_LINUX_32BIT) ? \ 26#define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \
27 TASK_SIZE : TASK_SIZE_26) 27 TASK_SIZE : TASK_SIZE_26)
28#define STACK_TOP_MAX TASK_SIZE 28#define STACK_TOP_MAX TASK_SIZE
29#endif 29#endif
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index db789461fca4..30308294e7c1 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -205,7 +205,7 @@ static struct platform_device *devices[] __initdata = {
205 205
206static int nand_dev_ready(struct omap_nand_platform_data *data) 206static int nand_dev_ready(struct omap_nand_platform_data *data)
207{ 207{
208 return omap_get_gpio_datain(P2_NAND_RB_GPIO_PIN); 208 return gpio_get_value(P2_NAND_RB_GPIO_PIN);
209} 209}
210 210
211static struct omap_uart_config fsample_uart_config __initdata = { 211static struct omap_uart_config fsample_uart_config __initdata = {
@@ -223,8 +223,9 @@ static struct omap_board_config_kernel fsample_config[] = {
223 223
224static void __init omap_fsample_init(void) 224static void __init omap_fsample_init(void)
225{ 225{
226 if (!(omap_request_gpio(P2_NAND_RB_GPIO_PIN))) 226 if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
227 nand_data.dev_ready = nand_dev_ready; 227 BUG();
228 nand_data.dev_ready = nand_dev_ready;
228 229
229 omap_cfg_reg(L3_1610_FLASH_CS2B_OE); 230 omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
230 omap_cfg_reg(M8_1610_FLASH_CS2B_WE); 231 omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 3b65914b9141..c5b4a3b718cf 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -250,11 +250,8 @@ static struct platform_device h2_kp_device = {
250#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE) 250#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
251static int h2_transceiver_mode(struct device *dev, int state) 251static int h2_transceiver_mode(struct device *dev, int state)
252{ 252{
253 if (state & IR_SIRMODE) 253 /* SIR when low, else MIR/FIR when HIGH */
254 omap_set_gpio_dataout(H2_IRDA_FIRSEL_GPIO_PIN, 0); 254 gpio_set_value(H2_IRDA_FIRSEL_GPIO_PIN, !(state & IR_SIRMODE));
255 else /* MIR/FIR */
256 omap_set_gpio_dataout(H2_IRDA_FIRSEL_GPIO_PIN, 1);
257
258 return 0; 255 return 0;
259} 256}
260#endif 257#endif
@@ -342,7 +339,7 @@ static struct platform_device *h2_devices[] __initdata = {
342 339
343static void __init h2_init_smc91x(void) 340static void __init h2_init_smc91x(void)
344{ 341{
345 if ((omap_request_gpio(0)) < 0) { 342 if (gpio_request(0, "SMC91x irq") < 0) {
346 printk("Error requesting gpio 0 for smc91x irq\n"); 343 printk("Error requesting gpio 0 for smc91x irq\n");
347 return; 344 return;
348 } 345 }
@@ -409,7 +406,7 @@ static struct omap_board_config_kernel h2_config[] __initdata = {
409 406
410static int h2_nand_dev_ready(struct omap_nand_platform_data *data) 407static int h2_nand_dev_ready(struct omap_nand_platform_data *data)
411{ 408{
412 return omap_get_gpio_datain(H2_NAND_RB_GPIO_PIN); 409 return gpio_get_value(H2_NAND_RB_GPIO_PIN);
413} 410}
414 411
415static void __init h2_init(void) 412static void __init h2_init(void)
@@ -428,8 +425,9 @@ static void __init h2_init(void)
428 425
429 h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS; 426 h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS;
430 h2_nand_resource.end += SZ_4K - 1; 427 h2_nand_resource.end += SZ_4K - 1;
431 if (!(omap_request_gpio(H2_NAND_RB_GPIO_PIN))) 428 if (gpio_request(H2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
432 h2_nand_data.dev_ready = h2_nand_dev_ready; 429 BUG();
430 gpio_direction_input(H2_NAND_RB_GPIO_PIN);
433 431
434 omap_cfg_reg(L3_1610_FLASH_CS2B_OE); 432 omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
435 omap_cfg_reg(M8_1610_FLASH_CS2B_WE); 433 omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
@@ -441,10 +439,10 @@ static void __init h2_init(void)
441 /* Irda */ 439 /* Irda */
442#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE) 440#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
443 omap_writel(omap_readl(FUNC_MUX_CTRL_A) | 7, FUNC_MUX_CTRL_A); 441 omap_writel(omap_readl(FUNC_MUX_CTRL_A) | 7, FUNC_MUX_CTRL_A);
444 if (!(omap_request_gpio(H2_IRDA_FIRSEL_GPIO_PIN))) { 442 if (gpio_request(H2_IRDA_FIRSEL_GPIO_PIN, "IRDA mode") < 0)
445 omap_set_gpio_direction(H2_IRDA_FIRSEL_GPIO_PIN, 0); 443 BUG();
446 h2_irda_data.transceiver_mode = h2_transceiver_mode; 444 gpio_direction_output(H2_IRDA_FIRSEL_GPIO_PIN, 0);
447 } 445 h2_irda_data.transceiver_mode = h2_transceiver_mode;
448#endif 446#endif
449 447
450 platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices)); 448 platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index adfcd7b51393..0332203bd53d 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -498,7 +498,7 @@ static struct omap_gpio_switch h3_gpio_switches[] __initdata = {
498 498
499static int nand_dev_ready(struct omap_nand_platform_data *data) 499static int nand_dev_ready(struct omap_nand_platform_data *data)
500{ 500{
501 return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN); 501 return gpio_get_value(H3_NAND_RB_GPIO_PIN);
502} 502}
503 503
504static void __init h3_init(void) 504static void __init h3_init(void)
@@ -516,8 +516,9 @@ static void __init h3_init(void)
516 516
517 nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS; 517 nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
518 nand_resource.end += SZ_4K - 1; 518 nand_resource.end += SZ_4K - 1;
519 if (!(omap_request_gpio(H3_NAND_RB_GPIO_PIN))) 519 if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
520 nand_data.dev_ready = nand_dev_ready; 520 BUG();
521 nand_data.dev_ready = nand_dev_ready;
521 522
522 /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */ 523 /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
523 /* GPIO10 pullup/down register, Enable pullup on GPIO10 */ 524 /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
@@ -537,7 +538,7 @@ static void __init h3_init(void)
537static void __init h3_init_smc91x(void) 538static void __init h3_init_smc91x(void)
538{ 539{
539 omap_cfg_reg(W15_1710_GPIO40); 540 omap_cfg_reg(W15_1710_GPIO40);
540 if (omap_request_gpio(40) < 0) { 541 if (gpio_request(40, "SMC91x irq") < 0) {
541 printk("Error requesting gpio 40 for smc91x irq\n"); 542 printk("Error requesting gpio 40 for smc91x irq\n");
542 return; 543 return;
543 } 544 }
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index cbc11be5cd2a..a21e365a7a87 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -301,7 +301,7 @@ static void __init innovator_init_smc91x(void)
301 OMAP1510_FPGA_RST); 301 OMAP1510_FPGA_RST);
302 udelay(750); 302 udelay(750);
303 } else { 303 } else {
304 if ((omap_request_gpio(0)) < 0) { 304 if (gpio_request(0, "SMC91x irq") < 0) {
305 printk("Error requesting gpio 0 for smc91x irq\n"); 305 printk("Error requesting gpio 0 for smc91x irq\n");
306 return; 306 return;
307 } 307 }
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 38d9783ac6d6..b26782471e59 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -102,7 +102,7 @@ static void mipid_shutdown(struct mipid_platform_data *pdata)
102{ 102{
103 if (pdata->nreset_gpio != -1) { 103 if (pdata->nreset_gpio != -1) {
104 printk(KERN_INFO "shutdown LCD\n"); 104 printk(KERN_INFO "shutdown LCD\n");
105 omap_set_gpio_dataout(pdata->nreset_gpio, 0); 105 gpio_set_value(pdata->nreset_gpio, 0);
106 msleep(120); 106 msleep(120);
107 } 107 }
108} 108}
@@ -124,13 +124,13 @@ static void mipid_dev_init(void)
124 124
125static void ads7846_dev_init(void) 125static void ads7846_dev_init(void)
126{ 126{
127 if (omap_request_gpio(ADS7846_PENDOWN_GPIO) < 0) 127 if (gpio_request(ADS7846_PENDOWN_GPIO, "ADS7846 pendown") < 0)
128 printk(KERN_ERR "can't get ads7846 pen down GPIO\n"); 128 printk(KERN_ERR "can't get ads7846 pen down GPIO\n");
129} 129}
130 130
131static int ads7846_get_pendown_state(void) 131static int ads7846_get_pendown_state(void)
132{ 132{
133 return !omap_get_gpio_datain(ADS7846_PENDOWN_GPIO); 133 return !gpio_get_value(ADS7846_PENDOWN_GPIO);
134} 134}
135 135
136static struct ads7846_platform_data nokia770_ads7846_platform_data __initdata = { 136static struct ads7846_platform_data nokia770_ads7846_platform_data __initdata = {
@@ -228,9 +228,9 @@ static void nokia770_audio_pwr_up(void)
228 /* Turn on codec */ 228 /* Turn on codec */
229 aic23_power_up(); 229 aic23_power_up();
230 230
231 if (omap_get_gpio_datain(HEADPHONE_GPIO)) 231 if (gpio_get_value(HEADPHONE_GPIO))
232 /* HP not connected, turn on amplifier */ 232 /* HP not connected, turn on amplifier */
233 omap_set_gpio_dataout(AMPLIFIER_CTRL_GPIO, 1); 233 gpio_set_value(AMPLIFIER_CTRL_GPIO, 1);
234 else 234 else
235 /* HP connected, do not turn on amplifier */ 235 /* HP connected, do not turn on amplifier */
236 printk("HP connected\n"); 236 printk("HP connected\n");
@@ -250,7 +250,7 @@ static DECLARE_DELAYED_WORK(codec_power_down_work, codec_delayed_power_down);
250static void nokia770_audio_pwr_down(void) 250static void nokia770_audio_pwr_down(void)
251{ 251{
252 /* Turn off amplifier */ 252 /* Turn off amplifier */
253 omap_set_gpio_dataout(AMPLIFIER_CTRL_GPIO, 0); 253 gpio_set_value(AMPLIFIER_CTRL_GPIO, 0);
254 254
255 /* Turn off codec: schedule delayed work */ 255 /* Turn off codec: schedule delayed work */
256 schedule_delayed_work(&codec_power_down_work, HZ / 20); /* 50ms */ 256 schedule_delayed_work(&codec_power_down_work, HZ / 20); /* 50ms */
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 3e766e49f7cc..ff9e67baa5c9 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -188,7 +188,8 @@ static struct gpio_led tps_leds[] = {
188 /* NOTE: D9 and D2 have hardware blink support. 188 /* NOTE: D9 and D2 have hardware blink support.
189 * Also, D9 requires non-battery power. 189 * Also, D9 requires non-battery power.
190 */ 190 */
191 { .gpio = OSK_TPS_GPIO_LED_D9, .name = "d9", }, 191 { .gpio = OSK_TPS_GPIO_LED_D9, .name = "d9",
192 .default_trigger = "ide-disk", },
192 { .gpio = OSK_TPS_GPIO_LED_D2, .name = "d2", }, 193 { .gpio = OSK_TPS_GPIO_LED_D2, .name = "d2", },
193 { .gpio = OSK_TPS_GPIO_LED_D3, .name = "d3", .active_low = 1, 194 { .gpio = OSK_TPS_GPIO_LED_D3, .name = "d3", .active_low = 1,
194 .default_trigger = "heartbeat", }, 195 .default_trigger = "heartbeat", },
@@ -260,7 +261,6 @@ static struct i2c_board_info __initdata osk_i2c_board_info[] = {
260 }, 261 },
261 /* TODO when driver support is ready: 262 /* TODO when driver support is ready:
262 * - aic23 audio chip at 0x1a 263 * - aic23 audio chip at 0x1a
263 * - on Mistral, 24c04 eeprom at 0x50
264 * - optionally on Mistral, ov9640 camera sensor at 0x30 264 * - optionally on Mistral, ov9640 camera sensor at 0x30
265 */ 265 */
266}; 266};
@@ -288,7 +288,7 @@ static void __init osk_init_cf(void)
288 return; 288 return;
289 } 289 }
290 /* the CF I/O IRQ is really active-low */ 290 /* the CF I/O IRQ is really active-low */
291 set_irq_type(OMAP_GPIO_IRQ(62), IRQ_TYPE_EDGE_FALLING); 291 set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING);
292} 292}
293 293
294static void __init osk_init_irq(void) 294static void __init osk_init_irq(void)
@@ -337,11 +337,28 @@ static struct omap_board_config_kernel osk_config[] __initdata = {
337#ifdef CONFIG_OMAP_OSK_MISTRAL 337#ifdef CONFIG_OMAP_OSK_MISTRAL
338 338
339#include <linux/input.h> 339#include <linux/input.h>
340#include <linux/i2c/at24.h>
340#include <linux/spi/spi.h> 341#include <linux/spi/spi.h>
341#include <linux/spi/ads7846.h> 342#include <linux/spi/ads7846.h>
342 343
343#include <mach/keypad.h> 344#include <mach/keypad.h>
344 345
346static struct at24_platform_data at24c04 = {
347 .byte_len = SZ_4K / 8,
348 .page_size = 16,
349};
350
351static struct i2c_board_info __initdata mistral_i2c_board_info[] = {
352 {
353 /* NOTE: powered from LCD supply */
354 I2C_BOARD_INFO("24c04", 0x50),
355 .platform_data = &at24c04,
356 },
357 /* TODO when driver support is ready:
358 * - optionally ov9640 camera sensor at 0x30
359 */
360};
361
345static const int osk_keymap[] = { 362static const int osk_keymap[] = {
346 /* KEY(col, row, code) */ 363 /* KEY(col, row, code) */
347 KEY(0, 0, KEY_F1), /* SW4 */ 364 KEY(0, 0, KEY_F1), /* SW4 */
@@ -483,23 +500,30 @@ static void __init osk_mistral_init(void)
483 omap_cfg_reg(P20_1610_GPIO4); /* PENIRQ */ 500 omap_cfg_reg(P20_1610_GPIO4); /* PENIRQ */
484 gpio_request(4, "ts_int"); 501 gpio_request(4, "ts_int");
485 gpio_direction_input(4); 502 gpio_direction_input(4);
486 set_irq_type(OMAP_GPIO_IRQ(4), IRQ_TYPE_EDGE_FALLING); 503 set_irq_type(gpio_to_irq(4), IRQ_TYPE_EDGE_FALLING);
487 504
488 spi_register_board_info(mistral_boardinfo, 505 spi_register_board_info(mistral_boardinfo,
489 ARRAY_SIZE(mistral_boardinfo)); 506 ARRAY_SIZE(mistral_boardinfo));
490 507
491 /* the sideways button (SW1) is for use as a "wakeup" button */ 508 /* the sideways button (SW1) is for use as a "wakeup" button
509 *
510 * NOTE: The Mistral board has the wakeup button (SW1) wired
511 * to the LCD 3.3V rail, which is powered down during suspend.
512 * To allow this button to wake up the omap, work around this
513 * HW bug by rewiring SW1 to use the main 3.3V rail.
514 */
492 omap_cfg_reg(N15_1610_MPUIO2); 515 omap_cfg_reg(N15_1610_MPUIO2);
493 if (gpio_request(OMAP_MPUIO(2), "wakeup") == 0) { 516 if (gpio_request(OMAP_MPUIO(2), "wakeup") == 0) {
494 int ret = 0; 517 int ret = 0;
518 int irq = gpio_to_irq(OMAP_MPUIO(2));
495 519
496 gpio_direction_input(OMAP_MPUIO(2)); 520 gpio_direction_input(OMAP_MPUIO(2));
497 set_irq_type(OMAP_GPIO_IRQ(OMAP_MPUIO(2)), IRQ_TYPE_EDGE_RISING); 521 set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
498#ifdef CONFIG_PM 522#ifdef CONFIG_PM
499 /* share the IRQ in case someone wants to use the 523 /* share the IRQ in case someone wants to use the
500 * button for more than wakeup from system sleep. 524 * button for more than wakeup from system sleep.
501 */ 525 */
502 ret = request_irq(OMAP_GPIO_IRQ(OMAP_MPUIO(2)), 526 ret = request_irq(irq,
503 &osk_mistral_wake_interrupt, 527 &osk_mistral_wake_interrupt,
504 IRQF_SHARED, "mistral_wakeup", 528 IRQF_SHARED, "mistral_wakeup",
505 &osk_mistral_wake_interrupt); 529 &osk_mistral_wake_interrupt);
@@ -508,7 +532,7 @@ static void __init osk_mistral_init(void)
508 printk(KERN_ERR "OSK+Mistral: no wakeup irq, %d?\n", 532 printk(KERN_ERR "OSK+Mistral: no wakeup irq, %d?\n",
509 ret); 533 ret);
510 } else 534 } else
511 enable_irq_wake(OMAP_GPIO_IRQ(OMAP_MPUIO(2))); 535 enable_irq_wake(irq);
512#endif 536#endif
513 } else 537 } else
514 printk(KERN_ERR "OSK+Mistral: wakeup button is awol\n"); 538 printk(KERN_ERR "OSK+Mistral: wakeup button is awol\n");
@@ -520,6 +544,9 @@ static void __init osk_mistral_init(void)
520 if (gpio_request(2, "lcd_pwr") == 0) 544 if (gpio_request(2, "lcd_pwr") == 0)
521 gpio_direction_output(2, 1); 545 gpio_direction_output(2, 1);
522 546
547 i2c_register_board_info(1, mistral_i2c_board_info,
548 ARRAY_SIZE(mistral_i2c_board_info));
549
523 platform_add_devices(mistral_devices, ARRAY_SIZE(mistral_devices)); 550 platform_add_devices(mistral_devices, ARRAY_SIZE(mistral_devices));
524} 551}
525#else 552#else
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index b58043644a6f..4141e3917d7c 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -255,7 +255,7 @@ static void palmte_get_power_status(struct apm_power_info *info, int *battery)
255{ 255{
256 int charging, batt, hi, lo, mid; 256 int charging, batt, hi, lo, mid;
257 257
258 charging = !omap_get_gpio_datain(PALMTE_DC_GPIO); 258 charging = !gpio_get_value(PALMTE_DC_GPIO);
259 batt = battery[0]; 259 batt = battery[0];
260 if (charging) 260 if (charging)
261 batt -= 60; 261 batt -= 60;
@@ -335,11 +335,11 @@ static void palmte_headphones_detect(void *data, int state)
335{ 335{
336 if (state) { 336 if (state) {
337 /* Headphones connected, disable speaker */ 337 /* Headphones connected, disable speaker */
338 omap_set_gpio_dataout(PALMTE_SPEAKER_GPIO, 0); 338 gpio_set_value(PALMTE_SPEAKER_GPIO, 0);
339 printk(KERN_INFO "PM: speaker off\n"); 339 printk(KERN_INFO "PM: speaker off\n");
340 } else { 340 } else {
341 /* Headphones unplugged, re-enable speaker */ 341 /* Headphones unplugged, re-enable speaker */
342 omap_set_gpio_dataout(PALMTE_SPEAKER_GPIO, 1); 342 gpio_set_value(PALMTE_SPEAKER_GPIO, 1);
343 printk(KERN_INFO "PM: speaker on\n"); 343 printk(KERN_INFO "PM: speaker on\n");
344 } 344 }
345} 345}
@@ -347,18 +347,18 @@ static void palmte_headphones_detect(void *data, int state)
347static void __init palmte_misc_gpio_setup(void) 347static void __init palmte_misc_gpio_setup(void)
348{ 348{
349 /* Set TSC2102 PINTDAV pin as input (used by TSC2102 driver) */ 349 /* Set TSC2102 PINTDAV pin as input (used by TSC2102 driver) */
350 if (omap_request_gpio(PALMTE_PINTDAV_GPIO)) { 350 if (gpio_request(PALMTE_PINTDAV_GPIO, "TSC2102 PINTDAV") < 0) {
351 printk(KERN_ERR "Could not reserve PINTDAV GPIO!\n"); 351 printk(KERN_ERR "Could not reserve PINTDAV GPIO!\n");
352 return; 352 return;
353 } 353 }
354 omap_set_gpio_direction(PALMTE_PINTDAV_GPIO, 1); 354 gpio_direction_input(PALMTE_PINTDAV_GPIO);
355 355
356 /* Set USB-or-DC-IN pin as input (unused) */ 356 /* Set USB-or-DC-IN pin as input (unused) */
357 if (omap_request_gpio(PALMTE_USB_OR_DC_GPIO)) { 357 if (gpio_request(PALMTE_USB_OR_DC_GPIO, "USB/DC-IN") < 0) {
358 printk(KERN_ERR "Could not reserve cable signal GPIO!\n"); 358 printk(KERN_ERR "Could not reserve cable signal GPIO!\n");
359 return; 359 return;
360 } 360 }
361 omap_set_gpio_direction(PALMTE_USB_OR_DC_GPIO, 1); 361 gpio_direction_input(PALMTE_USB_OR_DC_GPIO);
362} 362}
363 363
364static void __init omap_palmte_init(void) 364static void __init omap_palmte_init(void)
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 40f9860a09df..5c001afe8062 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -268,7 +268,7 @@ static struct platform_device *palmtt_devices[] __initdata = {
268 268
269static int palmtt_get_pendown_state(void) 269static int palmtt_get_pendown_state(void)
270{ 270{
271 return !omap_get_gpio_datain(6); 271 return !gpio_get_value(6);
272} 272}
273 273
274static const struct ads7846_platform_data palmtt_ts_info = { 274static const struct ads7846_platform_data palmtt_ts_info = {
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index e719294250b1..801fb5f62ed7 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -239,7 +239,7 @@ static struct platform_device *devices[] __initdata = {
239static int 239static int
240palmz71_get_pendown_state(void) 240palmz71_get_pendown_state(void)
241{ 241{
242 return !omap_get_gpio_datain(PALMZ71_PENIRQ_GPIO); 242 return !gpio_get_value(PALMZ71_PENIRQ_GPIO);
243} 243}
244 244
245static const struct ads7846_platform_data palmz71_ts_info = { 245static const struct ads7846_platform_data palmz71_ts_info = {
@@ -295,13 +295,13 @@ static struct omap_board_config_kernel palmz71_config[] __initdata = {
295static irqreturn_t 295static irqreturn_t
296palmz71_powercable(int irq, void *dev_id) 296palmz71_powercable(int irq, void *dev_id)
297{ 297{
298 if (omap_get_gpio_datain(PALMZ71_USBDETECT_GPIO)) { 298 if (gpio_get_value(PALMZ71_USBDETECT_GPIO)) {
299 printk(KERN_INFO "PM: Power cable connected\n"); 299 printk(KERN_INFO "PM: Power cable connected\n");
300 set_irq_type(OMAP_GPIO_IRQ(PALMZ71_USBDETECT_GPIO), 300 set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO),
301 IRQ_TYPE_EDGE_FALLING); 301 IRQ_TYPE_EDGE_FALLING);
302 } else { 302 } else {
303 printk(KERN_INFO "PM: Power cable disconnected\n"); 303 printk(KERN_INFO "PM: Power cable disconnected\n");
304 set_irq_type(OMAP_GPIO_IRQ(PALMZ71_USBDETECT_GPIO), 304 set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO),
305 IRQ_TYPE_EDGE_RISING); 305 IRQ_TYPE_EDGE_RISING);
306 } 306 }
307 return IRQ_HANDLED; 307 return IRQ_HANDLED;
@@ -323,29 +323,28 @@ palmz71_gpio_setup(int early)
323{ 323{
324 if (early) { 324 if (early) {
325 /* Only set GPIO1 so we have a working serial */ 325 /* Only set GPIO1 so we have a working serial */
326 omap_set_gpio_dataout(1, 1); 326 gpio_direction_output(1, 1);
327 omap_set_gpio_direction(1, 0);
328 } else { 327 } else {
329 /* Set MMC/SD host WP pin as input */ 328 /* Set MMC/SD host WP pin as input */
330 if (omap_request_gpio(PALMZ71_MMC_WP_GPIO)) { 329 if (gpio_request(PALMZ71_MMC_WP_GPIO, "MMC WP") < 0) {
331 printk(KERN_ERR "Could not reserve WP GPIO!\n"); 330 printk(KERN_ERR "Could not reserve WP GPIO!\n");
332 return; 331 return;
333 } 332 }
334 omap_set_gpio_direction(PALMZ71_MMC_WP_GPIO, 1); 333 gpio_direction_input(PALMZ71_MMC_WP_GPIO);
335 334
336 /* Monitor the Power-cable-connected signal */ 335 /* Monitor the Power-cable-connected signal */
337 if (omap_request_gpio(PALMZ71_USBDETECT_GPIO)) { 336 if (gpio_request(PALMZ71_USBDETECT_GPIO, "USB detect") < 0) {
338 printk(KERN_ERR 337 printk(KERN_ERR
339 "Could not reserve cable signal GPIO!\n"); 338 "Could not reserve cable signal GPIO!\n");
340 return; 339 return;
341 } 340 }
342 omap_set_gpio_direction(PALMZ71_USBDETECT_GPIO, 1); 341 gpio_direction_input(PALMZ71_USBDETECT_GPIO);
343 if (request_irq(OMAP_GPIO_IRQ(PALMZ71_USBDETECT_GPIO), 342 if (request_irq(gpio_to_irq(PALMZ71_USBDETECT_GPIO),
344 palmz71_powercable, IRQF_SAMPLE_RANDOM, 343 palmz71_powercable, IRQF_SAMPLE_RANDOM,
345 "palmz71-cable", 0)) 344 "palmz71-cable", 0))
346 printk(KERN_ERR 345 printk(KERN_ERR
347 "IRQ request for power cable failed!\n"); 346 "IRQ request for power cable failed!\n");
348 palmz71_powercable(OMAP_GPIO_IRQ(PALMZ71_USBDETECT_GPIO), 0); 347 palmz71_powercable(gpio_to_irq(PALMZ71_USBDETECT_GPIO), 0);
349 } 348 }
350} 349}
351 350
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index b715917bfdaf..3b9f907aa899 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -205,7 +205,7 @@ static struct platform_device *devices[] __initdata = {
205 205
206static int nand_dev_ready(struct omap_nand_platform_data *data) 206static int nand_dev_ready(struct omap_nand_platform_data *data)
207{ 207{
208 return omap_get_gpio_datain(P2_NAND_RB_GPIO_PIN); 208 return gpio_get_value(P2_NAND_RB_GPIO_PIN);
209} 209}
210 210
211static struct omap_uart_config perseus2_uart_config __initdata = { 211static struct omap_uart_config perseus2_uart_config __initdata = {
@@ -223,8 +223,9 @@ static struct omap_board_config_kernel perseus2_config[] __initdata = {
223 223
224static void __init omap_perseus2_init(void) 224static void __init omap_perseus2_init(void)
225{ 225{
226 if (!(omap_request_gpio(P2_NAND_RB_GPIO_PIN))) 226 if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
227 nand_data.dev_ready = nand_dev_ready; 227 BUG();
228 nand_data.dev_ready = nand_dev_ready;
228 229
229 omap_cfg_reg(L3_1610_FLASH_CS2B_OE); 230 omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
230 omap_cfg_reg(M8_1610_FLASH_CS2B_WE); 231 omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 130bcc6fd082..93bd395b9972 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -436,14 +436,9 @@ static void __init omap_sx1_init(void)
436 omap_request_gpio(1); /* A_IRDA_OFF */ 436 omap_request_gpio(1); /* A_IRDA_OFF */
437 omap_request_gpio(11); /* A_SWITCH */ 437 omap_request_gpio(11); /* A_SWITCH */
438 omap_request_gpio(15); /* A_USB_ON */ 438 omap_request_gpio(15); /* A_USB_ON */
439 omap_set_gpio_direction(1, 0);/* gpio1 -> output */ 439 gpio_direction_output(1, 1); /*A_IRDA_OFF = 1 */
440 omap_set_gpio_direction(11, 0);/* gpio11 -> output */ 440 gpio_direction_output(11, 0); /*A_SWITCH = 0 */
441 omap_set_gpio_direction(15, 0);/* gpio15 -> output */ 441 gpio_direction_output(15, 0); /*A_USB_ON = 0 */
442 /* set GPIO data */
443 omap_set_gpio_dataout(1, 1);/*A_IRDA_OFF = 1 */
444 omap_set_gpio_dataout(11, 0);/*A_SWITCH = 0 */
445 omap_set_gpio_dataout(15, 0);/*A_USB_ON = 0 */
446
447} 442}
448/*----------------------------------------*/ 443/*----------------------------------------*/
449static void __init omap_sx1_init_irq(void) 444static void __init omap_sx1_init_irq(void)
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 45a01311669a..92c9de1090a9 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -168,29 +168,27 @@ static void __init voiceblue_init_irq(void)
168static void __init voiceblue_init(void) 168static void __init voiceblue_init(void)
169{ 169{
170 /* Watchdog */ 170 /* Watchdog */
171 omap_request_gpio(0); 171 gpio_request(0, "Watchdog");
172 /* smc91x reset */ 172 /* smc91x reset */
173 omap_request_gpio(7); 173 gpio_request(7, "SMC91x reset");
174 omap_set_gpio_direction(7, 0); 174 gpio_direction_output(7, 1);
175 omap_set_gpio_dataout(7, 1);
176 udelay(2); /* wait at least 100ns */ 175 udelay(2); /* wait at least 100ns */
177 omap_set_gpio_dataout(7, 0); 176 gpio_set_value(7, 0);
178 mdelay(50); /* 50ms until PHY ready */ 177 mdelay(50); /* 50ms until PHY ready */
179 /* smc91x interrupt pin */ 178 /* smc91x interrupt pin */
180 omap_request_gpio(8); 179 gpio_request(8, "SMC91x irq");
181 /* 16C554 reset*/ 180 /* 16C554 reset*/
182 omap_request_gpio(6); 181 gpio_request(6, "16C554 reset");
183 omap_set_gpio_direction(6, 0); 182 gpio_direction_output(6, 0);
184 omap_set_gpio_dataout(6, 0);
185 /* 16C554 interrupt pins */ 183 /* 16C554 interrupt pins */
186 omap_request_gpio(12); 184 gpio_request(12, "16C554 irq");
187 omap_request_gpio(13); 185 gpio_request(13, "16C554 irq");
188 omap_request_gpio(14); 186 gpio_request(14, "16C554 irq");
189 omap_request_gpio(15); 187 gpio_request(15, "16C554 irq");
190 set_irq_type(OMAP_GPIO_IRQ(12), IRQ_TYPE_EDGE_RISING); 188 set_irq_type(gpio_to_irq(12), IRQ_TYPE_EDGE_RISING);
191 set_irq_type(OMAP_GPIO_IRQ(13), IRQ_TYPE_EDGE_RISING); 189 set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
192 set_irq_type(OMAP_GPIO_IRQ(14), IRQ_TYPE_EDGE_RISING); 190 set_irq_type(gpio_to_irq(14), IRQ_TYPE_EDGE_RISING);
193 set_irq_type(OMAP_GPIO_IRQ(15), IRQ_TYPE_EDGE_RISING); 191 set_irq_type(gpio_to_irq(15), IRQ_TYPE_EDGE_RISING);
194 192
195 platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices)); 193 platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices));
196 omap_board_config = voiceblue_config; 194 omap_board_config = voiceblue_config;
@@ -244,19 +242,18 @@ static int wdt_gpio_state;
244 242
245void voiceblue_wdt_enable(void) 243void voiceblue_wdt_enable(void)
246{ 244{
247 omap_set_gpio_direction(0, 0); 245 gpio_direction_output(0, 0);
248 omap_set_gpio_dataout(0, 0); 246 gpio_set_value(0, 1);
249 omap_set_gpio_dataout(0, 1); 247 gpio_set_value(0, 0);
250 omap_set_gpio_dataout(0, 0);
251 wdt_gpio_state = 0; 248 wdt_gpio_state = 0;
252} 249}
253 250
254void voiceblue_wdt_disable(void) 251void voiceblue_wdt_disable(void)
255{ 252{
256 omap_set_gpio_dataout(0, 0); 253 gpio_set_value(0, 0);
257 omap_set_gpio_dataout(0, 1); 254 gpio_set_value(0, 1);
258 omap_set_gpio_dataout(0, 0); 255 gpio_set_value(0, 0);
259 omap_set_gpio_direction(0, 1); 256 gpio_direction_input(0);
260} 257}
261 258
262void voiceblue_wdt_ping(void) 259void voiceblue_wdt_ping(void)
@@ -265,7 +262,7 @@ void voiceblue_wdt_ping(void)
265 return; 262 return;
266 263
267 wdt_gpio_state = !wdt_gpio_state; 264 wdt_gpio_state = !wdt_gpio_state;
268 omap_set_gpio_dataout(0, wdt_gpio_state); 265 gpio_set_value(0, wdt_gpio_state);
269} 266}
270 267
271void voiceblue_reset(void) 268void voiceblue_reset(void)
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c
index 04995381aa5c..4f2b8a7adb19 100644
--- a/arch/arm/mach-omap1/fpga.c
+++ b/arch/arm/mach-omap1/fpga.c
@@ -177,9 +177,9 @@ void omap1510_fpga_init_irq(void)
177 * NOTE: For general GPIO/MPUIO access and interrupts, please see 177 * NOTE: For general GPIO/MPUIO access and interrupts, please see
178 * gpio.[ch] 178 * gpio.[ch]
179 */ 179 */
180 omap_request_gpio(13); 180 gpio_request(13, "FPGA irq");
181 omap_set_gpio_direction(13, 1); 181 gpio_direction_input(13);
182 set_irq_type(OMAP_GPIO_IRQ(13), IRQ_TYPE_EDGE_RISING); 182 set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
183 set_irq_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux); 183 set_irq_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux);
184} 184}
185 185
diff --git a/arch/arm/mach-omap1/id.c b/arch/arm/mach-omap1/id.c
index 13083d7e692d..89bb8756f450 100644
--- a/arch/arm/mach-omap1/id.c
+++ b/arch/arm/mach-omap1/id.c
@@ -15,6 +15,7 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <mach/cpu.h>
18 19
19#define OMAP_DIE_ID_0 0xfffe1800 20#define OMAP_DIE_ID_0 0xfffe1800
20#define OMAP_DIE_ID_1 0xfffe1804 21#define OMAP_DIE_ID_1 0xfffe1804
@@ -30,6 +31,8 @@ struct omap_id {
30 u32 type; /* Cpu id bits [31:08], cpu class bits [07:00] */ 31 u32 type; /* Cpu id bits [31:08], cpu class bits [07:00] */
31}; 32};
32 33
34static unsigned int omap_revision;
35
33/* Register values to detect the OMAP version */ 36/* Register values to detect the OMAP version */
34static struct omap_id omap_ids[] __initdata = { 37static struct omap_id omap_ids[] __initdata = {
35 { .jtag_id = 0xb574, .die_rev = 0x2, .omap_id = 0x03310315, .type = 0x03100000}, 38 { .jtag_id = 0xb574, .die_rev = 0x2, .omap_id = 0x03310315, .type = 0x03100000},
@@ -53,6 +56,12 @@ static struct omap_id omap_ids[] __initdata = {
53 { .jtag_id = 0xb5f7, .die_rev = 0x2, .omap_id = 0x03330100, .type = 0x17100000}, 56 { .jtag_id = 0xb5f7, .die_rev = 0x2, .omap_id = 0x03330100, .type = 0x17100000},
54}; 57};
55 58
59unsigned int omap_rev(void)
60{
61 return omap_revision;
62}
63EXPORT_SYMBOL(omap_rev);
64
56/* 65/*
57 * Get OMAP type from PROD_ID. 66 * Get OMAP type from PROD_ID.
58 * 1710 has the PROD_ID in bits 15:00, not in 16:01 as documented in TRM. 67 * 1710 has the PROD_ID in bits 15:00, not in 16:01 as documented in TRM.
@@ -121,17 +130,18 @@ void __init omap_check_revision(void)
121 omap_id = omap_readl(OMAP32_ID_0); 130 omap_id = omap_readl(OMAP32_ID_0);
122 131
123#ifdef DEBUG 132#ifdef DEBUG
124 printk("OMAP_DIE_ID_0: 0x%08x\n", omap_readl(OMAP_DIE_ID_0)); 133 printk(KERN_DEBUG "OMAP_DIE_ID_0: 0x%08x\n", omap_readl(OMAP_DIE_ID_0));
125 printk("OMAP_DIE_ID_1: 0x%08x DIE_REV: %i\n", 134 printk(KERN_DEBUG "OMAP_DIE_ID_1: 0x%08x DIE_REV: %i\n",
126 omap_readl(OMAP_DIE_ID_1), 135 omap_readl(OMAP_DIE_ID_1),
127 (omap_readl(OMAP_DIE_ID_1) >> 17) & 0xf); 136 (omap_readl(OMAP_DIE_ID_1) >> 17) & 0xf);
128 printk("OMAP_PRODUCTION_ID_0: 0x%08x\n", omap_readl(OMAP_PRODUCTION_ID_0)); 137 printk(KERN_DEBUG "OMAP_PRODUCTION_ID_0: 0x%08x\n",
129 printk("OMAP_PRODUCTION_ID_1: 0x%08x JTAG_ID: 0x%04x\n", 138 omap_readl(OMAP_PRODUCTION_ID_0));
139 printk(KERN_DEBUG "OMAP_PRODUCTION_ID_1: 0x%08x JTAG_ID: 0x%04x\n",
130 omap_readl(OMAP_PRODUCTION_ID_1), 140 omap_readl(OMAP_PRODUCTION_ID_1),
131 omap_readl(OMAP_PRODUCTION_ID_1) & 0xffff); 141 omap_readl(OMAP_PRODUCTION_ID_1) & 0xffff);
132 printk("OMAP32_ID_0: 0x%08x\n", omap_readl(OMAP32_ID_0)); 142 printk(KERN_DEBUG "OMAP32_ID_0: 0x%08x\n", omap_readl(OMAP32_ID_0));
133 printk("OMAP32_ID_1: 0x%08x\n", omap_readl(OMAP32_ID_1)); 143 printk(KERN_DEBUG "OMAP32_ID_1: 0x%08x\n", omap_readl(OMAP32_ID_1));
134 printk("JTAG_ID: 0x%04x DIE_REV: %i\n", jtag_id, die_rev); 144 printk(KERN_DEBUG "JTAG_ID: 0x%04x DIE_REV: %i\n", jtag_id, die_rev);
135#endif 145#endif
136 146
137 system_serial_high = omap_readl(OMAP_DIE_ID_0); 147 system_serial_high = omap_readl(OMAP_DIE_ID_0);
@@ -140,7 +150,7 @@ void __init omap_check_revision(void)
140 /* First check only the major version in a safe way */ 150 /* First check only the major version in a safe way */
141 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) { 151 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
142 if (jtag_id == (omap_ids[i].jtag_id)) { 152 if (jtag_id == (omap_ids[i].jtag_id)) {
143 system_rev = omap_ids[i].type; 153 omap_revision = omap_ids[i].type;
144 break; 154 break;
145 } 155 }
146 } 156 }
@@ -148,7 +158,7 @@ void __init omap_check_revision(void)
148 /* Check if we can find the die revision */ 158 /* Check if we can find the die revision */
149 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) { 159 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
150 if (jtag_id == omap_ids[i].jtag_id && die_rev == omap_ids[i].die_rev) { 160 if (jtag_id == omap_ids[i].jtag_id && die_rev == omap_ids[i].die_rev) {
151 system_rev = omap_ids[i].type; 161 omap_revision = omap_ids[i].type;
152 break; 162 break;
153 } 163 }
154 } 164 }
@@ -158,38 +168,35 @@ void __init omap_check_revision(void)
158 if (jtag_id == omap_ids[i].jtag_id 168 if (jtag_id == omap_ids[i].jtag_id
159 && die_rev == omap_ids[i].die_rev 169 && die_rev == omap_ids[i].die_rev
160 && omap_id == omap_ids[i].omap_id) { 170 && omap_id == omap_ids[i].omap_id) {
161 system_rev = omap_ids[i].type; 171 omap_revision = omap_ids[i].type;
162 break; 172 break;
163 } 173 }
164 } 174 }
165 175
166 /* Add the cpu class info (7xx, 15xx, 16xx, 24xx) */ 176 /* Add the cpu class info (7xx, 15xx, 16xx, 24xx) */
167 cpu_type = system_rev >> 24; 177 cpu_type = omap_revision >> 24;
168 178
169 switch (cpu_type) { 179 switch (cpu_type) {
170 case 0x07: 180 case 0x07:
171 system_rev |= 0x07; 181 omap_revision |= 0x07;
172 break; 182 break;
173 case 0x03: 183 case 0x03:
174 case 0x15: 184 case 0x15:
175 system_rev |= 0x15; 185 omap_revision |= 0x15;
176 break; 186 break;
177 case 0x16: 187 case 0x16:
178 case 0x17: 188 case 0x17:
179 system_rev |= 0x16; 189 omap_revision |= 0x16;
180 break;
181 case 0x24:
182 system_rev |= 0x24;
183 break; 190 break;
184 default: 191 default:
185 printk("Unknown OMAP cpu type: 0x%02x\n", cpu_type); 192 printk(KERN_INFO "Unknown OMAP cpu type: 0x%02x\n", cpu_type);
186 } 193 }
187 194
188 printk("OMAP%04x", system_rev >> 16); 195 printk(KERN_INFO "OMAP%04x", omap_revision >> 16);
189 if ((system_rev >> 8) & 0xff) 196 if ((omap_revision >> 8) & 0xff)
190 printk("%x", (system_rev >> 8) & 0xff); 197 printk(KERN_INFO "%x", (omap_revision >> 8) & 0xff);
191 printk(" revision %i handled as %02xxx id: %08x%08x\n", 198 printk(KERN_INFO " revision %i handled as %02xxx id: %08x%08x\n",
192 die_rev, system_rev & 0xff, system_serial_low, 199 die_rev, omap_revision & 0xff, system_serial_low,
193 system_serial_high); 200 system_serial_high);
194} 201}
195 202
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index b3bd8ca85118..4c3e582f3d3c 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -128,7 +128,7 @@ void __init omap1_map_common_io(void)
128 * Common low-level hardware init for omap1. This should only get called from 128 * Common low-level hardware init for omap1. This should only get called from
129 * board specific init. 129 * board specific init.
130 */ 130 */
131void __init omap1_init_common_hw() 131void __init omap1_init_common_hw(void)
132{ 132{
133 /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort 133 /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
134 * on a Posted Write in the TIPB Bridge". 134 * on a Posted Write in the TIPB Bridge".
diff --git a/arch/arm/mach-omap1/leds-h2p2-debug.c b/arch/arm/mach-omap1/leds-h2p2-debug.c
index 71fe2cc7f7cf..17c9d0e04216 100644
--- a/arch/arm/mach-omap1/leds-h2p2-debug.c
+++ b/arch/arm/mach-omap1/leds-h2p2-debug.c
@@ -65,8 +65,8 @@ void h2p2_dbg_leds_event(led_event_t evt)
65 /* all leds off during suspend or shutdown */ 65 /* all leds off during suspend or shutdown */
66 66
67 if (! machine_is_omap_perseus2()) { 67 if (! machine_is_omap_perseus2()) {
68 omap_set_gpio_dataout(GPIO_TIMER, 0); 68 gpio_set_value(GPIO_TIMER, 0);
69 omap_set_gpio_dataout(GPIO_IDLE, 0); 69 gpio_set_value(GPIO_IDLE, 0);
70 } 70 }
71 71
72 __raw_writew(~0, &fpga->leds); 72 __raw_writew(~0, &fpga->leds);
@@ -94,7 +94,7 @@ void h2p2_dbg_leds_event(led_event_t evt)
94 if (machine_is_omap_perseus2()) 94 if (machine_is_omap_perseus2())
95 hw_led_state ^= H2P2_DBG_FPGA_P2_LED_TIMER; 95 hw_led_state ^= H2P2_DBG_FPGA_P2_LED_TIMER;
96 else { 96 else {
97 omap_set_gpio_dataout(GPIO_TIMER, led_state & LED_TIMER_ON); 97 gpio_set_value(GPIO_TIMER, led_state & LED_TIMER_ON);
98 goto done; 98 goto done;
99 } 99 }
100 100
@@ -106,7 +106,7 @@ void h2p2_dbg_leds_event(led_event_t evt)
106 if (machine_is_omap_perseus2()) 106 if (machine_is_omap_perseus2())
107 hw_led_state |= H2P2_DBG_FPGA_P2_LED_IDLE; 107 hw_led_state |= H2P2_DBG_FPGA_P2_LED_IDLE;
108 else { 108 else {
109 omap_set_gpio_dataout(GPIO_IDLE, 1); 109 gpio_set_value(GPIO_IDLE, 1);
110 goto done; 110 goto done;
111 } 111 }
112 112
@@ -116,7 +116,7 @@ void h2p2_dbg_leds_event(led_event_t evt)
116 if (machine_is_omap_perseus2()) 116 if (machine_is_omap_perseus2())
117 hw_led_state &= ~H2P2_DBG_FPGA_P2_LED_IDLE; 117 hw_led_state &= ~H2P2_DBG_FPGA_P2_LED_IDLE;
118 else { 118 else {
119 omap_set_gpio_dataout(GPIO_IDLE, 0); 119 gpio_set_value(GPIO_IDLE, 0);
120 goto done; 120 goto done;
121 } 121 }
122 122
diff --git a/arch/arm/mach-omap1/leds-osk.c b/arch/arm/mach-omap1/leds-osk.c
index 98e789622dfd..499d7ad8697d 100644
--- a/arch/arm/mach-omap1/leds-osk.c
+++ b/arch/arm/mach-omap1/leds-osk.c
@@ -44,8 +44,8 @@ static void mistral_setled(void)
44 green = 1; 44 green = 1;
45 /* else both sides are disabled */ 45 /* else both sides are disabled */
46 46
47 omap_set_gpio_dataout(GPIO_LED_GREEN, green); 47 gpio_set_value(GPIO_LED_GREEN, green);
48 omap_set_gpio_dataout(GPIO_LED_RED, red); 48 gpio_set_value(GPIO_LED_RED, red);
49} 49}
50 50
51#endif 51#endif
diff --git a/arch/arm/mach-omap1/leds.c b/arch/arm/mach-omap1/leds.c
index 6cdad93c4a00..8cbf2562dcaa 100644
--- a/arch/arm/mach-omap1/leds.c
+++ b/arch/arm/mach-omap1/leds.c
@@ -47,14 +47,14 @@ omap_leds_init(void)
47 * that's a different kind of LED (just one color at a time). 47 * that's a different kind of LED (just one color at a time).
48 */ 48 */
49 omap_cfg_reg(P18_1610_GPIO3); 49 omap_cfg_reg(P18_1610_GPIO3);
50 if (omap_request_gpio(3) == 0) 50 if (gpio_request(3, "LED red") == 0)
51 omap_set_gpio_direction(3, 0); 51 gpio_direction_output(3, 1);
52 else 52 else
53 printk(KERN_WARNING "LED: can't get GPIO3/red?\n"); 53 printk(KERN_WARNING "LED: can't get GPIO3/red?\n");
54 54
55 omap_cfg_reg(MPUIO4); 55 omap_cfg_reg(MPUIO4);
56 if (omap_request_gpio(OMAP_MPUIO(4)) == 0) 56 if (gpio_request(OMAP_MPUIO(4), "LED green") == 0)
57 omap_set_gpio_direction(OMAP_MPUIO(4), 0); 57 gpio_direction_output(OMAP_MPUIO(4), 1);
58 else 58 else
59 printk(KERN_WARNING "LED: can't get MPUIO4/green?\n"); 59 printk(KERN_WARNING "LED: can't get MPUIO4/green?\n");
60 } 60 }
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index 770d256c790b..9774c1f5311e 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -226,7 +226,8 @@ void omap_pm_suspend(void)
226{ 226{
227 unsigned long arg0 = 0, arg1 = 0; 227 unsigned long arg0 = 0, arg1 = 0;
228 228
229 printk("PM: OMAP%x is trying to enter deep sleep...\n", system_rev); 229 printk(KERN_INFO "PM: OMAP%x is trying to enter deep sleep...\n",
230 omap_rev());
230 231
231 omap_serial_wake_trigger(1); 232 omap_serial_wake_trigger(1);
232 233
@@ -421,7 +422,8 @@ void omap_pm_suspend(void)
421 422
422 omap_serial_wake_trigger(0); 423 omap_serial_wake_trigger(0);
423 424
424 printk("PM: OMAP%x is re-starting from deep sleep...\n", system_rev); 425 printk(KERN_INFO "PM: OMAP%x is re-starting from deep sleep...\n",
426 omap_rev());
425} 427}
426 428
427#if defined(DEBUG) && defined(CONFIG_PROC_FS) 429#if defined(DEBUG) && defined(CONFIG_PROC_FS)
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index 528691d5cb51..0002084e0655 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -244,22 +244,22 @@ static void __init omap_serial_set_port_wakeup(int gpio_nr)
244{ 244{
245 int ret; 245 int ret;
246 246
247 ret = omap_request_gpio(gpio_nr); 247 ret = gpio_request(gpio_nr, "UART wake");
248 if (ret < 0) { 248 if (ret < 0) {
249 printk(KERN_ERR "Could not request UART wake GPIO: %i\n", 249 printk(KERN_ERR "Could not request UART wake GPIO: %i\n",
250 gpio_nr); 250 gpio_nr);
251 return; 251 return;
252 } 252 }
253 omap_set_gpio_direction(gpio_nr, 1); 253 gpio_direction_input(gpio_nr);
254 ret = request_irq(OMAP_GPIO_IRQ(gpio_nr), &omap_serial_wake_interrupt, 254 ret = request_irq(gpio_to_irq(gpio_nr), &omap_serial_wake_interrupt,
255 IRQF_TRIGGER_RISING, "serial wakeup", NULL); 255 IRQF_TRIGGER_RISING, "serial wakeup", NULL);
256 if (ret) { 256 if (ret) {
257 omap_free_gpio(gpio_nr); 257 gpio_free(gpio_nr);
258 printk(KERN_ERR "No interrupt for UART wake GPIO: %i\n", 258 printk(KERN_ERR "No interrupt for UART wake GPIO: %i\n",
259 gpio_nr); 259 gpio_nr);
260 return; 260 return;
261 } 261 }
262 enable_irq_wake(OMAP_GPIO_IRQ(gpio_nr)); 262 enable_irq_wake(gpio_to_irq(gpio_nr));
263} 263}
264 264
265static int __init omap_serial_wakeup_init(void) 265static int __init omap_serial_wakeup_init(void)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 4832fcc7d04a..3754b79092ab 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -55,3 +55,7 @@ config MACH_OMAP_LDP
55config MACH_OVERO 55config MACH_OVERO
56 bool "Gumstix Overo board" 56 bool "Gumstix Overo board"
57 depends on ARCH_OMAP3 && ARCH_OMAP34XX 57 depends on ARCH_OMAP3 && ARCH_OMAP34XX
58
59config MACH_OMAP3_PANDORA
60 bool "OMAP3 Pandora"
61 depends on ARCH_OMAP3 && ARCH_OMAP34XX \ No newline at end of file
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index c69392372c99..f12c43e4932f 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -32,4 +32,5 @@ obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o
32obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o 32obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o
33obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o 33obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o
34obj-$(CONFIG_MACH_OVERO) += board-overo.o 34obj-$(CONFIG_MACH_OVERO) += board-overo.o
35obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o
35 36
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 24688efaa445..6748de6e19a8 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -168,13 +168,13 @@ static inline void __init sdp2430_init_smc91x(void)
168 sdp2430_smc91x_resources[0].end = cs_mem_base + 0x30f; 168 sdp2430_smc91x_resources[0].end = cs_mem_base + 0x30f;
169 udelay(100); 169 udelay(100);
170 170
171 if (omap_request_gpio(OMAP24XX_ETHR_GPIO_IRQ) < 0) { 171 if (gpio_request(OMAP24XX_ETHR_GPIO_IRQ, "SMC91x irq") < 0) {
172 printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n", 172 printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
173 OMAP24XX_ETHR_GPIO_IRQ); 173 OMAP24XX_ETHR_GPIO_IRQ);
174 gpmc_cs_free(eth_cs); 174 gpmc_cs_free(eth_cs);
175 goto out; 175 goto out;
176 } 176 }
177 omap_set_gpio_direction(OMAP24XX_ETHR_GPIO_IRQ, 1); 177 gpio_direction_input(OMAP24XX_ETHR_GPIO_IRQ);
178 178
179out: 179out:
180 clk_disable(gpmc_fck); 180 clk_disable(gpmc_fck);
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 989ad152d7f8..d83035b436d5 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -236,13 +236,13 @@ static inline void __init apollon_init_smc91x(void)
236 udelay(100); 236 udelay(100);
237 237
238 omap_cfg_reg(W4__24XX_GPIO74); 238 omap_cfg_reg(W4__24XX_GPIO74);
239 if (omap_request_gpio(APOLLON_ETHR_GPIO_IRQ) < 0) { 239 if (gpio_request(APOLLON_ETHR_GPIO_IRQ, "SMC91x irq") < 0) {
240 printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n", 240 printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
241 APOLLON_ETHR_GPIO_IRQ); 241 APOLLON_ETHR_GPIO_IRQ);
242 gpmc_cs_free(APOLLON_ETH_CS); 242 gpmc_cs_free(APOLLON_ETH_CS);
243 goto out; 243 goto out;
244 } 244 }
245 omap_set_gpio_direction(APOLLON_ETHR_GPIO_IRQ, 1); 245 gpio_direction_input(APOLLON_ETHR_GPIO_IRQ);
246 246
247out: 247out:
248 clk_disable(gpmc_fck); 248 clk_disable(gpmc_fck);
@@ -327,15 +327,15 @@ static void __init apollon_sw_init(void)
327 /* Enter SW - Y11 */ 327 /* Enter SW - Y11 */
328 omap_cfg_reg(Y11_242X_GPIO16); 328 omap_cfg_reg(Y11_242X_GPIO16);
329 omap_request_gpio(SW_ENTER_GPIO16); 329 omap_request_gpio(SW_ENTER_GPIO16);
330 omap_set_gpio_direction(SW_ENTER_GPIO16, 1); 330 gpio_direction_input(SW_ENTER_GPIO16);
331 /* Up SW - AA12 */ 331 /* Up SW - AA12 */
332 omap_cfg_reg(AA12_242X_GPIO17); 332 omap_cfg_reg(AA12_242X_GPIO17);
333 omap_request_gpio(SW_UP_GPIO17); 333 omap_request_gpio(SW_UP_GPIO17);
334 omap_set_gpio_direction(SW_UP_GPIO17, 1); 334 gpio_direction_input(SW_UP_GPIO17);
335 /* Down SW - AA8 */ 335 /* Down SW - AA8 */
336 omap_cfg_reg(AA8_242X_GPIO58); 336 omap_cfg_reg(AA8_242X_GPIO58);
337 omap_request_gpio(SW_DOWN_GPIO58); 337 omap_request_gpio(SW_DOWN_GPIO58);
338 omap_set_gpio_direction(SW_DOWN_GPIO58, 1); 338 gpio_direction_input(SW_DOWN_GPIO58);
339 339
340 set_irq_type(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), IRQ_TYPE_EDGE_RISING); 340 set_irq_type(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), IRQ_TYPE_EDGE_RISING);
341 if (request_irq(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), &apollon_sw_interrupt, 341 if (request_irq(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), &apollon_sw_interrupt,
@@ -359,9 +359,8 @@ static void __init apollon_usb_init(void)
359 /* USB device */ 359 /* USB device */
360 /* DEVICE_SUSPEND */ 360 /* DEVICE_SUSPEND */
361 omap_cfg_reg(P21_242X_GPIO12); 361 omap_cfg_reg(P21_242X_GPIO12);
362 omap_request_gpio(12); 362 gpio_request(12, "USB suspend");
363 omap_set_gpio_direction(12, 0); /* OUT */ 363 gpio_direction_output(12, 0);
364 omap_set_gpio_dataout(12, 0);
365} 364}
366 365
367static void __init omap_apollon_init(void) 366static void __init omap_apollon_init(void)
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 2fef2c845083..7de0506e1e29 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -19,6 +19,7 @@
19#include <linux/delay.h> 19#include <linux/delay.h>
20#include <linux/workqueue.h> 20#include <linux/workqueue.h>
21#include <linux/i2c.h> 21#include <linux/i2c.h>
22#include <linux/i2c/at24.h>
22#include <linux/input.h> 23#include <linux/input.h>
23#include <linux/err.h> 24#include <linux/err.h>
24#include <linux/clk.h> 25#include <linux/clk.h>
@@ -392,11 +393,24 @@ static struct omap_board_config_kernel h4_config[] = {
392 { OMAP_TAG_LCD, &h4_lcd_config }, 393 { OMAP_TAG_LCD, &h4_lcd_config },
393}; 394};
394 395
396static struct at24_platform_data m24c01 = {
397 .byte_len = SZ_1K / 8,
398 .page_size = 16,
399};
400
395static struct i2c_board_info __initdata h4_i2c_board_info[] = { 401static struct i2c_board_info __initdata h4_i2c_board_info[] = {
396 { 402 {
397 I2C_BOARD_INFO("isp1301_omap", 0x2d), 403 I2C_BOARD_INFO("isp1301_omap", 0x2d),
398 .irq = OMAP_GPIO_IRQ(125), 404 .irq = OMAP_GPIO_IRQ(125),
399 }, 405 },
406 { /* EEPROM on mainboard */
407 I2C_BOARD_INFO("24c01", 0x52),
408 .platform_data = &m24c01,
409 },
410 { /* EEPROM on cpu card */
411 I2C_BOARD_INFO("24c01", 0x57),
412 .platform_data = &m24c01,
413 },
400}; 414};
401 415
402static void __init omap_h4_init(void) 416static void __init omap_h4_init(void)
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 1ea59986aa7a..43c7ac4b7f8f 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -38,11 +38,67 @@
38#include <asm/delay.h> 38#include <asm/delay.h>
39#include <mach/control.h> 39#include <mach/control.h>
40 40
41#define SDP3430_SMC91X_CS 3
42
43static struct resource ldp_smc911x_resources[] = {
44 [0] = {
45 .start = OMAP34XX_ETHR_START,
46 .end = OMAP34XX_ETHR_START + SZ_4K,
47 .flags = IORESOURCE_MEM,
48 },
49 [1] = {
50 .start = 0,
51 .end = 0,
52 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
53 },
54};
55
56static struct platform_device ldp_smc911x_device = {
57 .name = "smc911x",
58 .id = -1,
59 .num_resources = ARRAY_SIZE(ldp_smc911x_resources),
60 .resource = ldp_smc911x_resources,
61};
62
63static struct platform_device *ldp_devices[] __initdata = {
64 &ldp_smc911x_device,
65};
66
67static inline void __init ldp_init_smc911x(void)
68{
69 int eth_cs;
70 unsigned long cs_mem_base;
71 int eth_gpio = 0;
72
73 eth_cs = LDP_SMC911X_CS;
74
75 if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) {
76 printk(KERN_ERR "Failed to request GPMC mem for smc911x\n");
77 return;
78 }
79
80 ldp_smc911x_resources[0].start = cs_mem_base + 0x0;
81 ldp_smc911x_resources[0].end = cs_mem_base + 0xf;
82 udelay(100);
83
84 eth_gpio = LDP_SMC911X_GPIO;
85
86 ldp_smc911x_resources[1].start = OMAP_GPIO_IRQ(eth_gpio);
87
88 if (omap_request_gpio(eth_gpio) < 0) {
89 printk(KERN_ERR "Failed to request GPIO%d for smc911x IRQ\n",
90 eth_gpio);
91 return;
92 }
93 gpio_direction_input(eth_gpio);
94}
95
41static void __init omap_ldp_init_irq(void) 96static void __init omap_ldp_init_irq(void)
42{ 97{
43 omap2_init_common_hw(); 98 omap2_init_common_hw();
44 omap_init_irq(); 99 omap_init_irq();
45 omap_gpio_init(); 100 omap_gpio_init();
101 ldp_init_smc911x();
46} 102}
47 103
48static struct omap_uart_config ldp_uart_config __initdata = { 104static struct omap_uart_config ldp_uart_config __initdata = {
@@ -64,6 +120,7 @@ static int __init omap_i2c_init(void)
64static void __init omap_ldp_init(void) 120static void __init omap_ldp_init(void)
65{ 121{
66 omap_i2c_init(); 122 omap_i2c_init();
123 platform_add_devices(ldp_devices, ARRAY_SIZE(ldp_devices));
67 omap_board_config = ldp_config; 124 omap_board_config = ldp_config;
68 omap_board_config_size = ARRAY_SIZE(ldp_config); 125 omap_board_config_size = ARRAY_SIZE(ldp_config);
69 omap_serial_init(); 126 omap_serial_init();
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
new file mode 100644
index 000000000000..7236c7be05b3
--- /dev/null
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -0,0 +1,180 @@
1/*
2 * board-omap3pandora.c (Pandora Handheld Console)
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
16 * 02110-1301 USA
17 *
18 */
19
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/platform_device.h>
23
24#include <linux/spi/spi.h>
25#include <linux/spi/ads7846.h>
26#include <linux/i2c/twl4030.h>
27
28#include <asm/mach-types.h>
29#include <asm/mach/arch.h>
30#include <asm/mach/map.h>
31
32#include <mach/board.h>
33#include <mach/common.h>
34#include <mach/gpio.h>
35#include <mach/hardware.h>
36#include <mach/mcspi.h>
37
38#define OMAP3_PANDORA_TS_GPIO 94
39
40static struct omap_uart_config omap3pandora_uart_config __initdata = {
41 .enabled_uarts = (1 << 2), /* UART3 */
42};
43
44static struct twl4030_gpio_platform_data omap3pandora_gpio_data = {
45 .gpio_base = OMAP_MAX_GPIO_LINES,
46 .irq_base = TWL4030_GPIO_IRQ_BASE,
47 .irq_end = TWL4030_GPIO_IRQ_END,
48};
49
50static struct twl4030_usb_data omap3pandora_usb_data = {
51 .usb_mode = T2_USB_MODE_ULPI,
52};
53
54static struct twl4030_platform_data omap3pandora_twldata = {
55 .irq_base = TWL4030_IRQ_BASE,
56 .irq_end = TWL4030_IRQ_END,
57 .gpio = &omap3pandora_gpio_data,
58 .usb = &omap3pandora_usb_data,
59};
60
61static struct i2c_board_info __initdata omap3pandora_i2c_boardinfo[] = {
62 {
63 I2C_BOARD_INFO("tps65950", 0x48),
64 .flags = I2C_CLIENT_WAKE,
65 .irq = INT_34XX_SYS_NIRQ,
66 .platform_data = &omap3pandora_twldata,
67 },
68};
69
70static int __init omap3pandora_i2c_init(void)
71{
72 omap_register_i2c_bus(1, 2600, omap3pandora_i2c_boardinfo,
73 ARRAY_SIZE(omap3pandora_i2c_boardinfo));
74 /* i2c2 pins are not connected */
75 omap_register_i2c_bus(3, 400, NULL, 0);
76 return 0;
77}
78
79static void __init omap3pandora_init_irq(void)
80{
81 omap2_init_common_hw();
82 omap_init_irq();
83 omap_gpio_init();
84}
85
86static void __init omap3pandora_ads7846_init(void)
87{
88 int gpio = OMAP3_PANDORA_TS_GPIO;
89 int ret;
90
91 ret = gpio_request(gpio, "ads7846_pen_down");
92 if (ret < 0) {
93 printk(KERN_ERR "Failed to request GPIO %d for "
94 "ads7846 pen down IRQ\n", gpio);
95 return;
96 }
97
98 gpio_direction_input(gpio);
99}
100
101static int ads7846_get_pendown_state(void)
102{
103 return !gpio_get_value(OMAP3_PANDORA_TS_GPIO);
104}
105
106static struct ads7846_platform_data ads7846_config = {
107 .x_max = 0x0fff,
108 .y_max = 0x0fff,
109 .x_plate_ohms = 180,
110 .pressure_max = 255,
111 .debounce_max = 10,
112 .debounce_tol = 3,
113 .debounce_rep = 1,
114 .get_pendown_state = ads7846_get_pendown_state,
115 .keep_vref_on = 1,
116};
117
118static struct omap2_mcspi_device_config ads7846_mcspi_config = {
119 .turbo_mode = 0,
120 .single_channel = 1, /* 0: slave, 1: master */
121};
122
123static struct spi_board_info omap3pandora_spi_board_info[] __initdata = {
124 {
125 .modalias = "ads7846",
126 .bus_num = 1,
127 .chip_select = 0,
128 .max_speed_hz = 1500000,
129 .controller_data = &ads7846_mcspi_config,
130 .irq = OMAP_GPIO_IRQ(OMAP3_PANDORA_TS_GPIO),
131 .platform_data = &ads7846_config,
132 }
133};
134
135static struct platform_device omap3pandora_lcd_device = {
136 .name = "pandora_lcd",
137 .id = -1,
138};
139
140static struct omap_lcd_config omap3pandora_lcd_config __initdata = {
141 .ctrl_name = "internal",
142};
143
144static struct omap_board_config_kernel omap3pandora_config[] __initdata = {
145 { OMAP_TAG_UART, &omap3pandora_uart_config },
146 { OMAP_TAG_LCD, &omap3pandora_lcd_config },
147};
148
149static struct platform_device *omap3pandora_devices[] __initdata = {
150 &omap3pandora_lcd_device,
151};
152
153static void __init omap3pandora_init(void)
154{
155 omap3pandora_i2c_init();
156 platform_add_devices(omap3pandora_devices,
157 ARRAY_SIZE(omap3pandora_devices));
158 omap_board_config = omap3pandora_config;
159 omap_board_config_size = ARRAY_SIZE(omap3pandora_config);
160 omap_serial_init();
161 spi_register_board_info(omap3pandora_spi_board_info,
162 ARRAY_SIZE(omap3pandora_spi_board_info));
163 omap3pandora_ads7846_init();
164}
165
166static void __init omap3pandora_map_io(void)
167{
168 omap2_set_globals_343x();
169 omap2_map_common_io();
170}
171
172MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
173 .phys_io = 0x48000000,
174 .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
175 .boot_params = 0x80000100,
176 .map_io = omap3pandora_map_io,
177 .init_irq = omap3pandora_init_irq,
178 .init_machine = omap3pandora_init,
179 .timer = &omap_timer,
180MACHINE_END
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 084e11082f80..31bb7010bd48 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -475,7 +475,7 @@ int __init omap2_clk_init(void)
475 * Update this if there are further clock changes between ES2 475 * Update this if there are further clock changes between ES2
476 * and production parts 476 * and production parts
477 */ 477 */
478 if (is_sil_rev_equal_to(OMAP3430_REV_ES1_0)) { 478 if (omap_rev() == OMAP3430_REV_ES1_0) {
479 /* No 3430ES1-only rates exist, so no RATE_IN_3430ES1 */ 479 /* No 3430ES1-only rates exist, so no RATE_IN_3430ES1 */
480 cpu_clkflg |= CLOCK_IN_OMAP3430ES1; 480 cpu_clkflg |= CLOCK_IN_OMAP3430ES1;
481 } else { 481 } else {
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index c38a8a09692f..7217a0824ec4 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -2280,8 +2280,8 @@ static struct clk wkup_32k_fck = {
2280 .recalc = &followparent_recalc, 2280 .recalc = &followparent_recalc,
2281}; 2281};
2282 2282
2283static struct clk gpio1_fck = { 2283static struct clk gpio1_dbck = {
2284 .name = "gpio1_fck", 2284 .name = "gpio1_dbck",
2285 .parent = &wkup_32k_fck, 2285 .parent = &wkup_32k_fck,
2286 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), 2286 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
2287 .enable_bit = OMAP3430_EN_GPIO1_SHIFT, 2287 .enable_bit = OMAP3430_EN_GPIO1_SHIFT,
@@ -2527,8 +2527,8 @@ static struct clk per_32k_alwon_fck = {
2527 .recalc = &followparent_recalc, 2527 .recalc = &followparent_recalc,
2528}; 2528};
2529 2529
2530static struct clk gpio6_fck = { 2530static struct clk gpio6_dbck = {
2531 .name = "gpio6_fck", 2531 .name = "gpio6_dbck",
2532 .parent = &per_32k_alwon_fck, 2532 .parent = &per_32k_alwon_fck,
2533 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2533 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2534 .enable_bit = OMAP3430_EN_GPIO6_SHIFT, 2534 .enable_bit = OMAP3430_EN_GPIO6_SHIFT,
@@ -2537,8 +2537,8 @@ static struct clk gpio6_fck = {
2537 .recalc = &followparent_recalc, 2537 .recalc = &followparent_recalc,
2538}; 2538};
2539 2539
2540static struct clk gpio5_fck = { 2540static struct clk gpio5_dbck = {
2541 .name = "gpio5_fck", 2541 .name = "gpio5_dbck",
2542 .parent = &per_32k_alwon_fck, 2542 .parent = &per_32k_alwon_fck,
2543 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2543 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2544 .enable_bit = OMAP3430_EN_GPIO5_SHIFT, 2544 .enable_bit = OMAP3430_EN_GPIO5_SHIFT,
@@ -2547,8 +2547,8 @@ static struct clk gpio5_fck = {
2547 .recalc = &followparent_recalc, 2547 .recalc = &followparent_recalc,
2548}; 2548};
2549 2549
2550static struct clk gpio4_fck = { 2550static struct clk gpio4_dbck = {
2551 .name = "gpio4_fck", 2551 .name = "gpio4_dbck",
2552 .parent = &per_32k_alwon_fck, 2552 .parent = &per_32k_alwon_fck,
2553 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2553 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2554 .enable_bit = OMAP3430_EN_GPIO4_SHIFT, 2554 .enable_bit = OMAP3430_EN_GPIO4_SHIFT,
@@ -2557,8 +2557,8 @@ static struct clk gpio4_fck = {
2557 .recalc = &followparent_recalc, 2557 .recalc = &followparent_recalc,
2558}; 2558};
2559 2559
2560static struct clk gpio3_fck = { 2560static struct clk gpio3_dbck = {
2561 .name = "gpio3_fck", 2561 .name = "gpio3_dbck",
2562 .parent = &per_32k_alwon_fck, 2562 .parent = &per_32k_alwon_fck,
2563 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2563 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2564 .enable_bit = OMAP3430_EN_GPIO3_SHIFT, 2564 .enable_bit = OMAP3430_EN_GPIO3_SHIFT,
@@ -2567,8 +2567,8 @@ static struct clk gpio3_fck = {
2567 .recalc = &followparent_recalc, 2567 .recalc = &followparent_recalc,
2568}; 2568};
2569 2569
2570static struct clk gpio2_fck = { 2570static struct clk gpio2_dbck = {
2571 .name = "gpio2_fck", 2571 .name = "gpio2_dbck",
2572 .parent = &per_32k_alwon_fck, 2572 .parent = &per_32k_alwon_fck,
2573 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), 2573 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2574 .enable_bit = OMAP3430_EN_GPIO2_SHIFT, 2574 .enable_bit = OMAP3430_EN_GPIO2_SHIFT,
@@ -3170,7 +3170,7 @@ static struct clk *onchip_34xx_clks[] __initdata = {
3170 &usim_fck, 3170 &usim_fck,
3171 &gpt1_fck, 3171 &gpt1_fck,
3172 &wkup_32k_fck, 3172 &wkup_32k_fck,
3173 &gpio1_fck, 3173 &gpio1_dbck,
3174 &wdt2_fck, 3174 &wdt2_fck,
3175 &wkup_l4_ick, 3175 &wkup_l4_ick,
3176 &usim_ick, 3176 &usim_ick,
@@ -3192,11 +3192,11 @@ static struct clk *onchip_34xx_clks[] __initdata = {
3192 &gpt8_fck, 3192 &gpt8_fck,
3193 &gpt9_fck, 3193 &gpt9_fck,
3194 &per_32k_alwon_fck, 3194 &per_32k_alwon_fck,
3195 &gpio6_fck, 3195 &gpio6_dbck,
3196 &gpio5_fck, 3196 &gpio5_dbck,
3197 &gpio4_fck, 3197 &gpio4_dbck,
3198 &gpio3_fck, 3198 &gpio3_dbck,
3199 &gpio2_fck, 3199 &gpio2_dbck,
3200 &wdt3_fck, 3200 &wdt3_fck,
3201 &per_l4_ick, 3201 &per_l4_ick,
3202 &gpio6_ick, 3202 &gpio6_ick,
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index bf45ff39a7b5..b0f8e7d62798 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -22,40 +22,15 @@
22#include <mach/control.h> 22#include <mach/control.h>
23#include <mach/cpu.h> 23#include <mach/cpu.h>
24 24
25static u32 class; 25static struct omap_chip_id omap_chip;
26static void __iomem *tap_base; 26static unsigned int omap_revision;
27static u16 tap_prod_id;
28
29#define OMAP_TAP_IDCODE 0x0204
30#define OMAP_TAP_DIE_ID_0 0x0218
31#define OMAP_TAP_DIE_ID_1 0x021C
32#define OMAP_TAP_DIE_ID_2 0x0220
33#define OMAP_TAP_DIE_ID_3 0x0224
34
35/* system_rev fields for OMAP2 processors:
36 * CPU id bits [31:16],
37 * CPU device type [15:12], (unprg,normal,POP)
38 * CPU revision [11:08]
39 * CPU class bits [07:00]
40 */
41
42struct omap_id {
43 u16 hawkeye; /* Silicon type (Hawkeye id) */
44 u8 dev; /* Device type from production_id reg */
45 u32 type; /* combined type id copied to system_rev */
46};
47 27
48/* Register values to detect the OMAP version */
49static struct omap_id omap_ids[] __initdata = {
50 { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200000 },
51 { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201000 },
52 { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202000 },
53 { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220000 },
54 { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230000 },
55 { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300000 },
56};
57 28
58static struct omap_chip_id omap_chip; 29unsigned int omap_rev(void)
30{
31 return omap_revision;
32}
33EXPORT_SYMBOL(omap_rev);
59 34
60/** 35/**
61 * omap_chip_is - test whether currently running OMAP matches a chip type 36 * omap_chip_is - test whether currently running OMAP matches a chip type
@@ -70,135 +45,41 @@ int omap_chip_is(struct omap_chip_id oci)
70} 45}
71EXPORT_SYMBOL(omap_chip_is); 46EXPORT_SYMBOL(omap_chip_is);
72 47
73static u32 __init read_tap_reg(int reg) 48/*----------------------------------------------------------------------------*/
74{
75 unsigned int regval = 0;
76 u32 cpuid;
77
78 /* Reading the IDCODE register on 3430 ES1 results in a
79 * data abort as the register is not exposed on the OCP
80 * Hence reading the Cortex Rev
81 */
82 cpuid = read_cpuid(CPUID_ID);
83
84 /* If the processor type is Cortex-A8 and the revision is 0x0
85 * it means its Cortex r0p0 which is 3430 ES1
86 */
87 if ((((cpuid >> 4) & 0xFFF) == 0xC08) && ((cpuid & 0xF) == 0x0)) {
88
89 if (reg == tap_prod_id) {
90 regval = 0x000F00F0;
91 goto out;
92 }
93
94 switch (reg) {
95 case OMAP_TAP_IDCODE : regval = 0x0B7AE02F; break;
96 /* Making DevType as 0xF in ES1 to differ from ES2 */
97 case OMAP_TAP_DIE_ID_0: regval = 0x01000000; break;
98 case OMAP_TAP_DIE_ID_1: regval = 0x1012d687; break;
99 case OMAP_TAP_DIE_ID_2: regval = 0x00000000; break;
100 case OMAP_TAP_DIE_ID_3: regval = 0x2d2c0000; break;
101 }
102 } else
103 regval = __raw_readl(tap_base + reg);
104
105out:
106 return regval;
107
108}
109 49
110/* 50#define OMAP_TAP_IDCODE 0x0204
111 * _set_system_rev - set the system_rev global based on current OMAP chip type 51#define OMAP_TAP_DIE_ID_0 0x0218
112 * 52#define OMAP_TAP_DIE_ID_1 0x021C
113 * Set the system_rev global. This is primarily used by the cpu_is_omapxxxx() 53#define OMAP_TAP_DIE_ID_2 0x0220
114 * macros. 54#define OMAP_TAP_DIE_ID_3 0x0224
115 */
116static void __init _set_system_rev(u32 type, u8 rev)
117{
118 u32 i, ctrl_status;
119
120 /*
121 * system_rev encoding is as follows
122 * system_rev & 0xff000000 -> Omap Class (24xx/34xx)
123 * system_rev & 0xfff00000 -> Omap Sub Class (242x/343x)
124 * system_rev & 0xffff0000 -> Omap type (2420/2422/2423/2430/3430)
125 * system_rev & 0x0000f000 -> Silicon revision (ES1, ES2 )
126 * system_rev & 0x00000700 -> Device Type ( EMU/HS/GP/BAD )
127 * system_rev & 0x000000c0 -> IDCODE revision[6:7]
128 * system_rev & 0x0000003f -> sys_boot[0:5]
129 */
130 /* Embedding the ES revision info in type field */
131 system_rev = type;
132 /* Also add IDCODE revision info only two lower bits */
133 system_rev |= ((rev & 0x3) << 6);
134
135 /* Add in the device type and sys_boot fields (see above) */
136 if (cpu_is_omap24xx()) {
137 i = OMAP24XX_CONTROL_STATUS;
138 } else if (cpu_is_omap343x()) {
139 i = OMAP343X_CONTROL_STATUS;
140 } else {
141 printk(KERN_ERR "id: unknown CPU type\n");
142 BUG();
143 }
144 ctrl_status = omap_ctrl_readl(i);
145 system_rev |= (ctrl_status & (OMAP2_SYSBOOT_5_MASK |
146 OMAP2_SYSBOOT_4_MASK |
147 OMAP2_SYSBOOT_3_MASK |
148 OMAP2_SYSBOOT_2_MASK |
149 OMAP2_SYSBOOT_1_MASK |
150 OMAP2_SYSBOOT_0_MASK));
151 system_rev |= (ctrl_status & OMAP2_DEVICETYPE_MASK);
152}
153
154
155/*
156 * _set_omap_chip - set the omap_chip global based on OMAP chip type
157 *
158 * Build the omap_chip bits. This variable is used by powerdomain and
159 * clockdomain code to indicate whether structures are applicable for
160 * the current OMAP chip type by ANDing it against a 'platform' bitfield
161 * in the structure.
162 */
163static void __init _set_omap_chip(void)
164{
165 if (cpu_is_omap343x()) {
166
167 omap_chip.oc = CHIP_IS_OMAP3430;
168 if (is_sil_rev_equal_to(OMAP3430_REV_ES1_0))
169 omap_chip.oc |= CHIP_IS_OMAP3430ES1;
170 else if (is_sil_rev_greater_than(OMAP3430_REV_ES1_0))
171 omap_chip.oc |= CHIP_IS_OMAP3430ES2;
172
173 } else if (cpu_is_omap243x()) {
174
175 /* Currently only supports 2430ES2.1 and 2430-all */
176 omap_chip.oc |= CHIP_IS_OMAP2430;
177
178 } else if (cpu_is_omap242x()) {
179
180 /* Currently only supports 2420ES2.1.1 and 2420-all */
181 omap_chip.oc |= CHIP_IS_OMAP2420;
182 55
183 } else { 56#define read_tap_reg(reg) __raw_readl(tap_base + (reg))
184 57
185 /* Current CPU not supported by this code. */ 58struct omap_id {
186 printk(KERN_WARNING "OMAP chip type code does not yet support " 59 u16 hawkeye; /* Silicon type (Hawkeye id) */
187 "this CPU type.\n"); 60 u8 dev; /* Device type from production_id reg */
188 WARN_ON(1); 61 u32 type; /* Combined type id copied to omap_revision */
62};
189 63
190 } 64/* Register values to detect the OMAP version */
65static struct omap_id omap_ids[] __initdata = {
66 { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200024 },
67 { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201024 },
68 { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202024 },
69 { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220024 },
70 { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230024 },
71 { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300024 },
72};
191 73
192} 74static void __iomem *tap_base;
75static u16 tap_prod_id;
193 76
194void __init omap2_check_revision(void) 77void __init omap24xx_check_revision(void)
195{ 78{
196 int i, j; 79 int i, j;
197 u32 idcode; 80 u32 idcode, prod_id;
198 u32 prod_id;
199 u16 hawkeye; 81 u16 hawkeye;
200 u8 dev_type; 82 u8 dev_type, rev;
201 u8 rev;
202 83
203 idcode = read_tap_reg(OMAP_TAP_IDCODE); 84 idcode = read_tap_reg(OMAP_TAP_IDCODE);
204 prod_id = read_tap_reg(tap_prod_id); 85 prod_id = read_tap_reg(tap_prod_id);
@@ -220,18 +101,6 @@ void __init omap2_check_revision(void)
220 pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n", 101 pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
221 prod_id, dev_type); 102 prod_id, dev_type);
222 103
223 /*
224 * Detection for 34xx ES2.0 and above can be done with just
225 * hawkeye and rev. See TRM 1.5.2 Device Identification.
226 * Note that rev cannot be used directly as ES1.0 uses value 0.
227 */
228 if (hawkeye == 0xb7ae) {
229 system_rev = 0x34300000 | ((1 + rev) << 12);
230 pr_info("OMAP%04x ES2.%i\n", system_rev >> 16, rev);
231 _set_omap_chip();
232 return;
233 }
234
235 /* Check hawkeye ids */ 104 /* Check hawkeye ids */
236 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) { 105 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
237 if (hawkeye == omap_ids[i].hawkeye) 106 if (hawkeye == omap_ids[i].hawkeye)
@@ -255,23 +124,115 @@ void __init omap2_check_revision(void)
255 j = i; 124 j = i;
256 } 125 }
257 126
258 _set_system_rev(omap_ids[j].type, rev); 127 pr_info("OMAP%04x", omap_rev() >> 16);
128 if ((omap_rev() >> 8) & 0x0f)
129 pr_info("ES%x", (omap_rev() >> 12) & 0xf);
130 pr_info("\n");
131}
259 132
260 _set_omap_chip(); 133void __init omap34xx_check_revision(void)
134{
135 u32 cpuid, idcode;
136 u16 hawkeye;
137 u8 rev;
138 char *rev_name = "ES1.0";
261 139
262 pr_info("OMAP%04x", system_rev >> 16); 140 /*
263 if ((system_rev >> 8) & 0x0f) 141 * We cannot access revision registers on ES1.0.
264 pr_info("ES%x", (system_rev >> 12) & 0xf); 142 * If the processor type is Cortex-A8 and the revision is 0x0
265 pr_info("\n"); 143 * it means its Cortex r0p0 which is 3430 ES1.0.
144 */
145 cpuid = read_cpuid(CPUID_ID);
146 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
147 omap_revision = OMAP3430_REV_ES1_0;
148 goto out;
149 }
266 150
151 /*
152 * Detection for 34xx ES2.0 and above can be done with just
153 * hawkeye and rev. See TRM 1.5.2 Device Identification.
154 * Note that rev does not map directly to our defined processor
155 * revision numbers as ES1.0 uses value 0.
156 */
157 idcode = read_tap_reg(OMAP_TAP_IDCODE);
158 hawkeye = (idcode >> 12) & 0xffff;
159 rev = (idcode >> 28) & 0xff;
160
161 if (hawkeye == 0xb7ae) {
162 switch (rev) {
163 case 0:
164 omap_revision = OMAP3430_REV_ES2_0;
165 rev_name = "ES2.0";
166 break;
167 case 2:
168 omap_revision = OMAP3430_REV_ES2_1;
169 rev_name = "ES2.1";
170 break;
171 case 3:
172 omap_revision = OMAP3430_REV_ES3_0;
173 rev_name = "ES3.0";
174 break;
175 default:
176 /* Use the latest known revision as default */
177 omap_revision = OMAP3430_REV_ES3_0;
178 rev_name = "Unknown revision\n";
179 }
180 }
181
182out:
183 pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name);
267} 184}
268 185
186/*
187 * Try to detect the exact revision of the omap we're running on
188 */
189void __init omap2_check_revision(void)
190{
191 /*
192 * At this point we have an idea about the processor revision set
193 * earlier with omap2_set_globals_tap().
194 */
195 if (cpu_is_omap24xx())
196 omap24xx_check_revision();
197 else if (cpu_is_omap34xx())
198 omap34xx_check_revision();
199 else
200 pr_err("OMAP revision unknown, please fix!\n");
201
202 /*
203 * OK, now we know the exact revision. Initialize omap_chip bits
204 * for powerdowmain and clockdomain code.
205 */
206 if (cpu_is_omap243x()) {
207 /* Currently only supports 2430ES2.1 and 2430-all */
208 omap_chip.oc |= CHIP_IS_OMAP2430;
209 } else if (cpu_is_omap242x()) {
210 /* Currently only supports 2420ES2.1.1 and 2420-all */
211 omap_chip.oc |= CHIP_IS_OMAP2420;
212 } else if (cpu_is_omap343x()) {
213 omap_chip.oc = CHIP_IS_OMAP3430;
214 if (omap_rev() == OMAP3430_REV_ES1_0)
215 omap_chip.oc |= CHIP_IS_OMAP3430ES1;
216 else if (omap_rev() > OMAP3430_REV_ES1_0)
217 omap_chip.oc |= CHIP_IS_OMAP3430ES2;
218 } else {
219 pr_err("Uninitialized omap_chip, please fix!\n");
220 }
221}
222
223/*
224 * Set up things for map_io and processor detection later on. Gets called
225 * pretty much first thing from board init. For multi-omap, this gets
226 * cpu_is_omapxxxx() working accurately enough for map_io. Then we'll try to
227 * detect the exact revision later on in omap2_detect_revision() once map_io
228 * is done.
229 */
269void __init omap2_set_globals_tap(struct omap_globals *omap2_globals) 230void __init omap2_set_globals_tap(struct omap_globals *omap2_globals)
270{ 231{
271 class = omap2_globals->class; 232 omap_revision = omap2_globals->class;
272 tap_base = omap2_globals->tap; 233 tap_base = omap2_globals->tap;
273 234
274 if (class == 0x3430) 235 if (cpu_is_omap34xx())
275 tap_prod_id = 0x0210; 236 tap_prod_id = 0x0210;
276 else 237 else
277 tap_prod_id = 0x0208; 238 tap_prod_id = 0x0208;
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index c40fc378a251..636e2821af7d 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -23,6 +23,7 @@
23#define INTC_REVISION 0x0000 23#define INTC_REVISION 0x0000
24#define INTC_SYSCONFIG 0x0010 24#define INTC_SYSCONFIG 0x0010
25#define INTC_SYSSTATUS 0x0014 25#define INTC_SYSSTATUS 0x0014
26#define INTC_SIR 0x0040
26#define INTC_CONTROL 0x0048 27#define INTC_CONTROL 0x0048
27#define INTC_MIR_CLEAR0 0x0088 28#define INTC_MIR_CLEAR0 0x0088
28#define INTC_MIR_SET0 0x008c 29#define INTC_MIR_SET0 0x008c
@@ -60,6 +61,30 @@ static u32 intc_bank_read_reg(struct omap_irq_bank *bank, u16 reg)
60 return __raw_readl(bank->base_reg + reg); 61 return __raw_readl(bank->base_reg + reg);
61} 62}
62 63
64static int previous_irq;
65
66/*
67 * On 34xx we can get occasional spurious interrupts if the ack from
68 * an interrupt handler does not get posted before we unmask. Warn about
69 * the interrupt handlers that need to flush posted writes.
70 */
71static int omap_check_spurious(unsigned int irq)
72{
73 u32 sir, spurious;
74
75 sir = intc_bank_read_reg(&irq_banks[0], INTC_SIR);
76 spurious = sir >> 6;
77
78 if (spurious > 1) {
79 printk(KERN_WARNING "Spurious irq %i: 0x%08x, please flush "
80 "posted write for irq %i\n",
81 irq, sir, previous_irq);
82 return spurious;
83 }
84
85 return 0;
86}
87
63/* XXX: FIQ and additional INTC support (only MPU at the moment) */ 88/* XXX: FIQ and additional INTC support (only MPU at the moment) */
64static void omap_ack_irq(unsigned int irq) 89static void omap_ack_irq(unsigned int irq)
65{ 90{
@@ -70,6 +95,20 @@ static void omap_mask_irq(unsigned int irq)
70{ 95{
71 int offset = irq & (~(IRQ_BITS_PER_REG - 1)); 96 int offset = irq & (~(IRQ_BITS_PER_REG - 1));
72 97
98 if (cpu_is_omap34xx()) {
99 int spurious = 0;
100
101 /*
102 * INT_34XX_GPT12_IRQ is also the spurious irq. Maybe because
103 * it is the highest irq number?
104 */
105 if (irq == INT_34XX_GPT12_IRQ)
106 spurious = omap_check_spurious(irq);
107
108 if (!spurious)
109 previous_irq = irq;
110 }
111
73 irq &= (IRQ_BITS_PER_REG - 1); 112 irq &= (IRQ_BITS_PER_REG - 1);
74 113
75 intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset); 114 intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset);
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index b1393673d95d..dacb41f130c0 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -203,6 +203,15 @@ MUX_CFG_24XX("AE9_2430_USB0HS_NXT", 0x13D, 0, 0, 0, 1)
203MUX_CFG_24XX("AC7_2430_USB0HS_DATA7", 0x13E, 0, 0, 0, 1) 203MUX_CFG_24XX("AC7_2430_USB0HS_DATA7", 0x13E, 0, 0, 0, 1)
204 204
205/* 2430 McBSP */ 205/* 2430 McBSP */
206MUX_CFG_24XX("AD6_2430_MCBSP_CLKS", 0x011E, 0, 0, 0, 1)
207
208MUX_CFG_24XX("AB2_2430_MCBSP1_CLKR", 0x011A, 0, 0, 0, 1)
209MUX_CFG_24XX("AD5_2430_MCBSP1_FSR", 0x011B, 0, 0, 0, 1)
210MUX_CFG_24XX("AA1_2430_MCBSP1_DX", 0x011C, 0, 0, 0, 1)
211MUX_CFG_24XX("AF3_2430_MCBSP1_DR", 0x011D, 0, 0, 0, 1)
212MUX_CFG_24XX("AB3_2430_MCBSP1_FSX", 0x011F, 0, 0, 0, 1)
213MUX_CFG_24XX("Y9_2430_MCBSP1_CLKX", 0x0120, 0, 0, 0, 1)
214
206MUX_CFG_24XX("AC10_2430_MCBSP2_FSX", 0x012E, 1, 0, 0, 1) 215MUX_CFG_24XX("AC10_2430_MCBSP2_FSX", 0x012E, 1, 0, 0, 1)
207MUX_CFG_24XX("AD16_2430_MCBSP2_CLX", 0x012F, 1, 0, 0, 1) 216MUX_CFG_24XX("AD16_2430_MCBSP2_CLX", 0x012F, 1, 0, 0, 1)
208MUX_CFG_24XX("AE13_2430_MCBSP2_DX", 0x0130, 1, 0, 0, 1) 217MUX_CFG_24XX("AE13_2430_MCBSP2_DX", 0x0130, 1, 0, 0, 1)
@@ -211,6 +220,31 @@ MUX_CFG_24XX("AC10_2430_MCBSP2_FSX_OFF",0x012E, 0, 0, 0, 1)
211MUX_CFG_24XX("AD16_2430_MCBSP2_CLX_OFF",0x012F, 0, 0, 0, 1) 220MUX_CFG_24XX("AD16_2430_MCBSP2_CLX_OFF",0x012F, 0, 0, 0, 1)
212MUX_CFG_24XX("AE13_2430_MCBSP2_DX_OFF", 0x0130, 0, 0, 0, 1) 221MUX_CFG_24XX("AE13_2430_MCBSP2_DX_OFF", 0x0130, 0, 0, 0, 1)
213MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0, 0, 0, 1) 222MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0, 0, 0, 1)
223
224MUX_CFG_24XX("AC9_2430_MCBSP3_CLKX", 0x0103, 0, 0, 0, 1)
225MUX_CFG_24XX("AE4_2430_MCBSP3_FSX", 0x0104, 0, 0, 0, 1)
226MUX_CFG_24XX("AE2_2430_MCBSP3_DR", 0x0105, 0, 0, 0, 1)
227MUX_CFG_24XX("AF4_2430_MCBSP3_DX", 0x0106, 0, 0, 0, 1)
228
229MUX_CFG_24XX("N3_2430_MCBSP4_CLKX", 0x010B, 1, 0, 0, 1)
230MUX_CFG_24XX("AD23_2430_MCBSP4_DR", 0x010C, 1, 0, 0, 1)
231MUX_CFG_24XX("AB25_2430_MCBSP4_DX", 0x010D, 1, 0, 0, 1)
232MUX_CFG_24XX("AC25_2430_MCBSP4_FSX", 0x010E, 1, 0, 0, 1)
233
234MUX_CFG_24XX("AE16_2430_MCBSP5_CLKX", 0x00ED, 1, 0, 0, 1)
235MUX_CFG_24XX("AF12_2430_MCBSP5_FSX", 0x00ED, 1, 0, 0, 1)
236MUX_CFG_24XX("K7_2430_MCBSP5_DX", 0x00EF, 1, 0, 0, 1)
237MUX_CFG_24XX("M1_2430_MCBSP5_DR", 0x00F0, 1, 0, 0, 1)
238
239/* 2430 MCSPI1 */
240MUX_CFG_24XX("Y18_2430_MCSPI1_CLK", 0x010F, 0, 0, 0, 1)
241MUX_CFG_24XX("AD15_2430_MCSPI1_SIMO", 0x0110, 0, 0, 0, 1)
242MUX_CFG_24XX("AE17_2430_MCSPI1_SOMI", 0x0111, 0, 0, 0, 1)
243MUX_CFG_24XX("U1_2430_MCSPI1_CS0", 0x0112, 0, 0, 0, 1)
244
245/* Touchscreen GPIO */
246MUX_CFG_24XX("AF19_2430_GPIO_85", 0x0113, 3, 0, 0, 1)
247
214}; 248};
215 249
216#define OMAP24XX_PINS_SZ ARRAY_SIZE(omap24xx_pins) 250#define OMAP24XX_PINS_SZ ARRAY_SIZE(omap24xx_pins)
@@ -417,6 +451,14 @@ MUX_CFG_34XX("AD2_3430_USB3FS_PHY_MM3_TXDAT", 0x188,
417MUX_CFG_34XX("AC1_3430_USB3FS_PHY_MM3_TXEN_N", 0x18a, 451MUX_CFG_34XX("AC1_3430_USB3FS_PHY_MM3_TXEN_N", 0x18a,
418 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_OUTPUT) 452 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_OUTPUT)
419 453
454
455/* 34XX GPIO - bidirectional, unless the name has an "_OUT" suffix.
456 * No internal pullup/pulldown without "_UP" or "_DOWN" suffix.
457 */
458MUX_CFG_34XX("AH8_34XX_GPIO29", 0x5fa,
459 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
460MUX_CFG_34XX("J25_34XX_GPIO170", 0x1c6,
461 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
420}; 462};
421 463
422#define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins) 464#define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins)
@@ -452,7 +494,7 @@ static void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u16 r
452#endif 494#endif
453 495
454#ifdef CONFIG_ARCH_OMAP24XX 496#ifdef CONFIG_ARCH_OMAP24XX
455int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg) 497static int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
456{ 498{
457 static DEFINE_SPINLOCK(mux_spin_lock); 499 static DEFINE_SPINLOCK(mux_spin_lock);
458 unsigned long flags; 500 unsigned long flags;
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c
index 10ef464d6be7..15e509013def 100644
--- a/arch/arm/mach-omap2/usb-tusb6010.c
+++ b/arch/arm/mach-omap2/usb-tusb6010.c
@@ -12,11 +12,11 @@
12#include <linux/errno.h> 12#include <linux/errno.h>
13#include <linux/delay.h> 13#include <linux/delay.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/gpio.h>
15 16
16#include <linux/usb/musb.h> 17#include <linux/usb/musb.h>
17 18
18#include <mach/gpmc.h> 19#include <mach/gpmc.h>
19#include <mach/gpio.h>
20#include <mach/mux.h> 20#include <mach/mux.h>
21 21
22 22
@@ -292,12 +292,12 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data *data,
292 ); 292 );
293 293
294 /* IRQ */ 294 /* IRQ */
295 status = omap_request_gpio(irq); 295 status = gpio_request(irq, "TUSB6010 irq");
296 if (status < 0) { 296 if (status < 0) {
297 printk(error, 3, status); 297 printk(error, 3, status);
298 return status; 298 return status;
299 } 299 }
300 omap_set_gpio_direction(irq, 1); 300 gpio_direction_input(irq);
301 tusb_resources[2].start = irq + IH_GPIO_BASE; 301 tusb_resources[2].start = irq + IH_GPIO_BASE;
302 302
303 /* set up memory timings ... can speed them up later */ 303 /* set up memory timings ... can speed them up later */
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index c5a57fbf095d..3a398befed41 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -71,6 +71,10 @@ static unsigned long ai_dword;
71static unsigned long ai_multi; 71static unsigned long ai_multi;
72static int ai_usermode; 72static int ai_usermode;
73 73
74#define UM_WARN (1 << 0)
75#define UM_FIXUP (1 << 1)
76#define UM_SIGNAL (1 << 2)
77
74#ifdef CONFIG_PROC_FS 78#ifdef CONFIG_PROC_FS
75static const char *usermode_action[] = { 79static const char *usermode_action[] = {
76 "ignored", 80 "ignored",
@@ -755,7 +759,7 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
755 user: 759 user:
756 ai_user += 1; 760 ai_user += 1;
757 761
758 if (ai_usermode & 1) 762 if (ai_usermode & UM_WARN)
759 printk("Alignment trap: %s (%d) PC=0x%08lx Instr=0x%0*lx " 763 printk("Alignment trap: %s (%d) PC=0x%08lx Instr=0x%0*lx "
760 "Address=0x%08lx FSR 0x%03x\n", current->comm, 764 "Address=0x%08lx FSR 0x%03x\n", current->comm,
761 task_pid_nr(current), instrptr, 765 task_pid_nr(current), instrptr,
@@ -763,10 +767,10 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
763 thumb_mode(regs) ? tinstr : instr, 767 thumb_mode(regs) ? tinstr : instr,
764 addr, fsr); 768 addr, fsr);
765 769
766 if (ai_usermode & 2) 770 if (ai_usermode & UM_FIXUP)
767 goto fixup; 771 goto fixup;
768 772
769 if (ai_usermode & 4) 773 if (ai_usermode & UM_SIGNAL)
770 force_sig(SIGBUS, current); 774 force_sig(SIGBUS, current);
771 else 775 else
772 set_cr(cr_no_alignment); 776 set_cr(cr_no_alignment);
@@ -797,6 +801,22 @@ static int __init alignment_init(void)
797 res->write_proc = proc_alignment_write; 801 res->write_proc = proc_alignment_write;
798#endif 802#endif
799 803
804 /*
805 * ARMv6 and later CPUs can perform unaligned accesses for
806 * most single load and store instructions up to word size.
807 * LDM, STM, LDRD and STRD still need to be handled.
808 *
809 * Ignoring the alignment fault is not an option on these
810 * CPUs since we spin re-faulting the instruction without
811 * making any progress.
812 */
813 if (cpu_architecture() >= CPU_ARCH_ARMv6 && (cr_alignment & CR_U)) {
814 cr_alignment &= ~CR_A;
815 cr_no_alignment &= ~CR_A;
816 set_cr(cr_alignment);
817 ai_usermode = UM_FIXUP;
818 }
819
800 hook_fault_code(1, do_alignment, SIGILL, "alignment exception"); 820 hook_fault_code(1, do_alignment, SIGILL, "alignment exception");
801 hook_fault_code(3, do_alignment, SIGILL, "alignment exception"); 821 hook_fault_code(3, do_alignment, SIGILL, "alignment exception");
802 822
diff --git a/arch/arm/plat-omap/debug-devices.c b/arch/arm/plat-omap/debug-devices.c
index e31154b15d9e..f6684832ca8f 100644
--- a/arch/arm/plat-omap/debug-devices.c
+++ b/arch/arm/plat-omap/debug-devices.c
@@ -69,15 +69,15 @@ int __init debug_card_init(u32 addr, unsigned gpio)
69 smc91x_resources[0].start = addr + 0x300; 69 smc91x_resources[0].start = addr + 0x300;
70 smc91x_resources[0].end = addr + 0x30f; 70 smc91x_resources[0].end = addr + 0x30f;
71 71
72 smc91x_resources[1].start = OMAP_GPIO_IRQ(gpio); 72 smc91x_resources[1].start = gpio_to_irq(gpio);
73 smc91x_resources[1].end = OMAP_GPIO_IRQ(gpio); 73 smc91x_resources[1].end = gpio_to_irq(gpio);
74 74
75 status = omap_request_gpio(gpio); 75 status = gpio_request(gpio, "SMC91x irq");
76 if (status < 0) { 76 if (status < 0) {
77 printk(KERN_ERR "GPIO%d unavailable for smc91x IRQ\n", gpio); 77 printk(KERN_ERR "GPIO%d unavailable for smc91x IRQ\n", gpio);
78 return status; 78 return status;
79 } 79 }
80 omap_set_gpio_direction(gpio, 1); 80 gpio_direction_input(gpio);
81 81
82 led_resources[0].start = addr; 82 led_resources[0].start = addr;
83 led_resources[0].end = addr + SZ_4K - 1; 83 led_resources[0].end = addr + SZ_4K - 1;
diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c
index 2f4c0cabfd34..be4eefda4767 100644
--- a/arch/arm/plat-omap/debug-leds.c
+++ b/arch/arm/plat-omap/debug-leds.c
@@ -83,8 +83,8 @@ static void h2p2_dbg_leds_event(led_event_t evt)
83 /* all leds off during suspend or shutdown */ 83 /* all leds off during suspend or shutdown */
84 84
85 if (!(machine_is_omap_perseus2() || machine_is_omap_h4())) { 85 if (!(machine_is_omap_perseus2() || machine_is_omap_h4())) {
86 omap_set_gpio_dataout(GPIO_TIMER, 0); 86 gpio_set_value(GPIO_TIMER, 0);
87 omap_set_gpio_dataout(GPIO_IDLE, 0); 87 gpio_set_value(GPIO_IDLE, 0);
88 } 88 }
89 89
90 __raw_writew(~0, &fpga->leds); 90 __raw_writew(~0, &fpga->leds);
@@ -107,7 +107,7 @@ static void h2p2_dbg_leds_event(led_event_t evt)
107 if (machine_is_omap_perseus2() || machine_is_omap_h4()) 107 if (machine_is_omap_perseus2() || machine_is_omap_h4())
108 hw_led_state ^= H2P2_DBG_FPGA_P2_LED_TIMER; 108 hw_led_state ^= H2P2_DBG_FPGA_P2_LED_TIMER;
109 else { 109 else {
110 omap_set_gpio_dataout(GPIO_TIMER, 110 gpio_set_value(GPIO_TIMER,
111 led_state & LED_TIMER_ON); 111 led_state & LED_TIMER_ON);
112 goto done; 112 goto done;
113 } 113 }
@@ -121,7 +121,7 @@ static void h2p2_dbg_leds_event(led_event_t evt)
121 if (machine_is_omap_perseus2() || machine_is_omap_h4()) 121 if (machine_is_omap_perseus2() || machine_is_omap_h4())
122 hw_led_state &= ~H2P2_DBG_FPGA_P2_LED_IDLE; 122 hw_led_state &= ~H2P2_DBG_FPGA_P2_LED_IDLE;
123 else { 123 else {
124 omap_set_gpio_dataout(GPIO_IDLE, 1); 124 gpio_set_value(GPIO_IDLE, 1);
125 goto done; 125 goto done;
126 } 126 }
127 127
@@ -131,7 +131,7 @@ static void h2p2_dbg_leds_event(led_event_t evt)
131 if (machine_is_omap_perseus2() || machine_is_omap_h4()) 131 if (machine_is_omap_perseus2() || machine_is_omap_h4())
132 hw_led_state |= H2P2_DBG_FPGA_P2_LED_IDLE; 132 hw_led_state |= H2P2_DBG_FPGA_P2_LED_IDLE;
133 else { 133 else {
134 omap_set_gpio_dataout(GPIO_IDLE, 0); 134 gpio_set_value(GPIO_IDLE, 0);
135 goto done; 135 goto done;
136 } 136 }
137 137
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 7686b9fa53f2..692d2b495af3 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -1848,9 +1848,22 @@ static int omap2_dma_handle_ch(int ch)
1848 printk(KERN_INFO 1848 printk(KERN_INFO
1849 "DMA synchronization event drop occurred with device " 1849 "DMA synchronization event drop occurred with device "
1850 "%d\n", dma_chan[ch].dev_id); 1850 "%d\n", dma_chan[ch].dev_id);
1851 if (unlikely(status & OMAP2_DMA_TRANS_ERR_IRQ)) 1851 if (unlikely(status & OMAP2_DMA_TRANS_ERR_IRQ)) {
1852 printk(KERN_INFO "DMA transaction error with device %d\n", 1852 printk(KERN_INFO "DMA transaction error with device %d\n",
1853 dma_chan[ch].dev_id); 1853 dma_chan[ch].dev_id);
1854 if (cpu_class_is_omap2()) {
1855 /* Errata: sDMA Channel is not disabled
1856 * after a transaction error. So we explicitely
1857 * disable the channel
1858 */
1859 u32 ccr;
1860
1861 ccr = dma_read(CCR(ch));
1862 ccr &= ~OMAP_DMA_CCR_EN;
1863 dma_write(ccr, CCR(ch));
1864 dma_chan[ch].flags &= ~OMAP_DMA_ACTIVE;
1865 }
1866 }
1854 if (unlikely(status & OMAP2_DMA_SECURE_ERR_IRQ)) 1867 if (unlikely(status & OMAP2_DMA_SECURE_ERR_IRQ))
1855 printk(KERN_INFO "DMA secure error with device %d\n", 1868 printk(KERN_INFO "DMA secure error with device %d\n",
1856 dma_chan[ch].dev_id); 1869 dma_chan[ch].dev_id);
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 963c31cd1541..e4f0ce04ba92 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -539,10 +539,6 @@ void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
539 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); 539 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
540 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load); 540 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
541 541
542 /* REVISIT: hw feature, ttgr overtaking tldr? */
543 while (readl(timer->io_base + (OMAP_TIMER_WRITE_PEND_REG & 0xff)))
544 cpu_relax();
545
546 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0); 542 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
547} 543}
548 544
@@ -553,14 +549,15 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
553 u32 l; 549 u32 l;
554 550
555 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); 551 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
556 if (autoreload) 552 if (autoreload) {
557 l |= OMAP_TIMER_CTRL_AR; 553 l |= OMAP_TIMER_CTRL_AR;
558 else 554 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
555 } else {
559 l &= ~OMAP_TIMER_CTRL_AR; 556 l &= ~OMAP_TIMER_CTRL_AR;
557 }
560 l |= OMAP_TIMER_CTRL_ST; 558 l |= OMAP_TIMER_CTRL_ST;
561 559
562 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, load); 560 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, load);
563 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
564 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); 561 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
565} 562}
566 563
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 424049d83fbe..07b6968a7d16 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -152,6 +152,7 @@ struct gpio_bank {
152 u32 level_mask; 152 u32 level_mask;
153 spinlock_t lock; 153 spinlock_t lock;
154 struct gpio_chip chip; 154 struct gpio_chip chip;
155 struct clk *dbck;
155}; 156};
156 157
157#define METHOD_MPUIO 0 158#define METHOD_MPUIO 0
@@ -244,6 +245,8 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)
244 return &gpio_bank[gpio >> 5]; 245 return &gpio_bank[gpio >> 5];
245 if (cpu_is_omap34xx()) 246 if (cpu_is_omap34xx())
246 return &gpio_bank[gpio >> 5]; 247 return &gpio_bank[gpio >> 5];
248 BUG();
249 return NULL;
247} 250}
248 251
249static inline int get_gpio_index(int gpio) 252static inline int get_gpio_index(int gpio)
@@ -332,19 +335,6 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
332 __raw_writel(l, reg); 335 __raw_writel(l, reg);
333} 336}
334 337
335void omap_set_gpio_direction(int gpio, int is_input)
336{
337 struct gpio_bank *bank;
338 unsigned long flags;
339
340 if (check_gpio(gpio) < 0)
341 return;
342 bank = get_gpio_bank(gpio);
343 spin_lock_irqsave(&bank->lock, flags);
344 _set_gpio_direction(bank, get_gpio_index(gpio), is_input);
345 spin_unlock_irqrestore(&bank->lock, flags);
346}
347
348static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) 338static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
349{ 339{
350 void __iomem *reg = bank->base; 340 void __iomem *reg = bank->base;
@@ -406,20 +396,7 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
406 __raw_writel(l, reg); 396 __raw_writel(l, reg);
407} 397}
408 398
409void omap_set_gpio_dataout(int gpio, int enable) 399static int __omap_get_gpio_datain(int gpio)
410{
411 struct gpio_bank *bank;
412 unsigned long flags;
413
414 if (check_gpio(gpio) < 0)
415 return;
416 bank = get_gpio_bank(gpio);
417 spin_lock_irqsave(&bank->lock, flags);
418 _set_gpio_dataout(bank, get_gpio_index(gpio), enable);
419 spin_unlock_irqrestore(&bank->lock, flags);
420}
421
422int omap_get_gpio_datain(int gpio)
423{ 400{
424 struct gpio_bank *bank; 401 struct gpio_bank *bank;
425 void __iomem *reg; 402 void __iomem *reg;
@@ -473,6 +450,7 @@ void omap_set_gpio_debounce(int gpio, int enable)
473{ 450{
474 struct gpio_bank *bank; 451 struct gpio_bank *bank;
475 void __iomem *reg; 452 void __iomem *reg;
453 unsigned long flags;
476 u32 val, l = 1 << get_gpio_index(gpio); 454 u32 val, l = 1 << get_gpio_index(gpio);
477 455
478 if (cpu_class_is_omap1()) 456 if (cpu_class_is_omap1())
@@ -480,16 +458,28 @@ void omap_set_gpio_debounce(int gpio, int enable)
480 458
481 bank = get_gpio_bank(gpio); 459 bank = get_gpio_bank(gpio);
482 reg = bank->base; 460 reg = bank->base;
483
484 reg += OMAP24XX_GPIO_DEBOUNCE_EN; 461 reg += OMAP24XX_GPIO_DEBOUNCE_EN;
462
463 spin_lock_irqsave(&bank->lock, flags);
485 val = __raw_readl(reg); 464 val = __raw_readl(reg);
486 465
487 if (enable) 466 if (enable && !(val & l))
488 val |= l; 467 val |= l;
489 else 468 else if (!enable && (val & l))
490 val &= ~l; 469 val &= ~l;
470 else
471 goto done;
472
473 if (cpu_is_omap34xx()) {
474 if (enable)
475 clk_enable(bank->dbck);
476 else
477 clk_disable(bank->dbck);
478 }
491 479
492 __raw_writel(val, reg); 480 __raw_writel(val, reg);
481done:
482 spin_unlock_irqrestore(&bank->lock, flags);
493} 483}
494EXPORT_SYMBOL(omap_set_gpio_debounce); 484EXPORT_SYMBOL(omap_set_gpio_debounce);
495 485
@@ -906,26 +896,17 @@ static int gpio_wake_enable(unsigned int irq, unsigned int enable)
906 return retval; 896 return retval;
907} 897}
908 898
909int omap_request_gpio(int gpio) 899static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
910{ 900{
911 struct gpio_bank *bank; 901 struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
912 unsigned long flags; 902 unsigned long flags;
913 int status;
914
915 if (check_gpio(gpio) < 0)
916 return -EINVAL;
917 903
918 status = gpio_request(gpio, NULL);
919 if (status < 0)
920 return status;
921
922 bank = get_gpio_bank(gpio);
923 spin_lock_irqsave(&bank->lock, flags); 904 spin_lock_irqsave(&bank->lock, flags);
924 905
925 /* Set trigger to none. You need to enable the desired trigger with 906 /* Set trigger to none. You need to enable the desired trigger with
926 * request_irq() or set_irq_type(). 907 * request_irq() or set_irq_type().
927 */ 908 */
928 _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE); 909 _set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
929 910
930#ifdef CONFIG_ARCH_OMAP15XX 911#ifdef CONFIG_ARCH_OMAP15XX
931 if (bank->method == METHOD_GPIO_1510) { 912 if (bank->method == METHOD_GPIO_1510) {
@@ -933,7 +914,7 @@ int omap_request_gpio(int gpio)
933 914
934 /* Claim the pin for MPU */ 915 /* Claim the pin for MPU */
935 reg = bank->base + OMAP1510_GPIO_PIN_CONTROL; 916 reg = bank->base + OMAP1510_GPIO_PIN_CONTROL;
936 __raw_writel(__raw_readl(reg) | (1 << get_gpio_index(gpio)), reg); 917 __raw_writel(__raw_readl(reg) | (1 << offset), reg);
937 } 918 }
938#endif 919#endif
939 spin_unlock_irqrestore(&bank->lock, flags); 920 spin_unlock_irqrestore(&bank->lock, flags);
@@ -941,39 +922,28 @@ int omap_request_gpio(int gpio)
941 return 0; 922 return 0;
942} 923}
943 924
944void omap_free_gpio(int gpio) 925static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
945{ 926{
946 struct gpio_bank *bank; 927 struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
947 unsigned long flags; 928 unsigned long flags;
948 929
949 if (check_gpio(gpio) < 0)
950 return;
951 bank = get_gpio_bank(gpio);
952 spin_lock_irqsave(&bank->lock, flags); 930 spin_lock_irqsave(&bank->lock, flags);
953 if (unlikely(!gpiochip_is_requested(&bank->chip,
954 get_gpio_index(gpio)))) {
955 spin_unlock_irqrestore(&bank->lock, flags);
956 printk(KERN_ERR "omap-gpio: GPIO %d wasn't reserved!\n", gpio);
957 dump_stack();
958 return;
959 }
960#ifdef CONFIG_ARCH_OMAP16XX 931#ifdef CONFIG_ARCH_OMAP16XX
961 if (bank->method == METHOD_GPIO_1610) { 932 if (bank->method == METHOD_GPIO_1610) {
962 /* Disable wake-up during idle for dynamic tick */ 933 /* Disable wake-up during idle for dynamic tick */
963 void __iomem *reg = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA; 934 void __iomem *reg = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
964 __raw_writel(1 << get_gpio_index(gpio), reg); 935 __raw_writel(1 << offset, reg);
965 } 936 }
966#endif 937#endif
967#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 938#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
968 if (bank->method == METHOD_GPIO_24XX) { 939 if (bank->method == METHOD_GPIO_24XX) {
969 /* Disable wake-up during idle for dynamic tick */ 940 /* Disable wake-up during idle for dynamic tick */
970 void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA; 941 void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
971 __raw_writel(1 << get_gpio_index(gpio), reg); 942 __raw_writel(1 << offset, reg);
972 } 943 }
973#endif 944#endif
974 _reset_gpio(bank, gpio); 945 _reset_gpio(bank, bank->chip.base + offset);
975 spin_unlock_irqrestore(&bank->lock, flags); 946 spin_unlock_irqrestore(&bank->lock, flags);
976 gpio_free(gpio);
977} 947}
978 948
979/* 949/*
@@ -1252,7 +1222,7 @@ static int gpio_input(struct gpio_chip *chip, unsigned offset)
1252 1222
1253static int gpio_get(struct gpio_chip *chip, unsigned offset) 1223static int gpio_get(struct gpio_chip *chip, unsigned offset)
1254{ 1224{
1255 return omap_get_gpio_datain(chip->base + offset); 1225 return __omap_get_gpio_datain(chip->base + offset);
1256} 1226}
1257 1227
1258static int gpio_output(struct gpio_chip *chip, unsigned offset, int value) 1228static int gpio_output(struct gpio_chip *chip, unsigned offset, int value)
@@ -1279,6 +1249,14 @@ static void gpio_set(struct gpio_chip *chip, unsigned offset, int value)
1279 spin_unlock_irqrestore(&bank->lock, flags); 1249 spin_unlock_irqrestore(&bank->lock, flags);
1280} 1250}
1281 1251
1252static int gpio_2irq(struct gpio_chip *chip, unsigned offset)
1253{
1254 struct gpio_bank *bank;
1255
1256 bank = container_of(chip, struct gpio_bank, chip);
1257 return bank->virtual_irq_start + offset;
1258}
1259
1282/*---------------------------------------------------------------------*/ 1260/*---------------------------------------------------------------------*/
1283 1261
1284static int initialized; 1262static int initialized;
@@ -1296,7 +1274,6 @@ static struct clk * gpio5_fck;
1296#endif 1274#endif
1297 1275
1298#if defined(CONFIG_ARCH_OMAP3) 1276#if defined(CONFIG_ARCH_OMAP3)
1299static struct clk *gpio_fclks[OMAP34XX_NR_GPIOS];
1300static struct clk *gpio_iclks[OMAP34XX_NR_GPIOS]; 1277static struct clk *gpio_iclks[OMAP34XX_NR_GPIOS];
1301#endif 1278#endif
1302 1279
@@ -1310,9 +1287,7 @@ static int __init _omap_gpio_init(void)
1310 int i; 1287 int i;
1311 int gpio = 0; 1288 int gpio = 0;
1312 struct gpio_bank *bank; 1289 struct gpio_bank *bank;
1313#if defined(CONFIG_ARCH_OMAP3)
1314 char clk_name[11]; 1290 char clk_name[11];
1315#endif
1316 1291
1317 initialized = 1; 1292 initialized = 1;
1318 1293
@@ -1367,12 +1342,6 @@ static int __init _omap_gpio_init(void)
1367 printk(KERN_ERR "Could not get %s\n", clk_name); 1342 printk(KERN_ERR "Could not get %s\n", clk_name);
1368 else 1343 else
1369 clk_enable(gpio_iclks[i]); 1344 clk_enable(gpio_iclks[i]);
1370 sprintf(clk_name, "gpio%d_fck", i + 1);
1371 gpio_fclks[i] = clk_get(NULL, clk_name);
1372 if (IS_ERR(gpio_fclks[i]))
1373 printk(KERN_ERR "Could not get %s\n", clk_name);
1374 else
1375 clk_enable(gpio_fclks[i]);
1376 } 1345 }
1377 } 1346 }
1378#endif 1347#endif
@@ -1479,10 +1448,13 @@ static int __init _omap_gpio_init(void)
1479 /* REVISIT eventually switch from OMAP-specific gpio structs 1448 /* REVISIT eventually switch from OMAP-specific gpio structs
1480 * over to the generic ones 1449 * over to the generic ones
1481 */ 1450 */
1451 bank->chip.request = omap_gpio_request;
1452 bank->chip.free = omap_gpio_free;
1482 bank->chip.direction_input = gpio_input; 1453 bank->chip.direction_input = gpio_input;
1483 bank->chip.get = gpio_get; 1454 bank->chip.get = gpio_get;
1484 bank->chip.direction_output = gpio_output; 1455 bank->chip.direction_output = gpio_output;
1485 bank->chip.set = gpio_set; 1456 bank->chip.set = gpio_set;
1457 bank->chip.to_irq = gpio_2irq;
1486 if (bank_is_mpuio(bank)) { 1458 if (bank_is_mpuio(bank)) {
1487 bank->chip.label = "mpuio"; 1459 bank->chip.label = "mpuio";
1488#ifdef CONFIG_ARCH_OMAP16XX 1460#ifdef CONFIG_ARCH_OMAP16XX
@@ -1511,6 +1483,13 @@ static int __init _omap_gpio_init(void)
1511 } 1483 }
1512 set_irq_chained_handler(bank->irq, gpio_irq_handler); 1484 set_irq_chained_handler(bank->irq, gpio_irq_handler);
1513 set_irq_data(bank->irq, bank); 1485 set_irq_data(bank->irq, bank);
1486
1487 if (cpu_is_omap34xx()) {
1488 sprintf(clk_name, "gpio%d_dbck", i + 1);
1489 bank->dbck = clk_get(NULL, clk_name);
1490 if (IS_ERR(bank->dbck))
1491 printk(KERN_ERR "Could not get %s\n", clk_name);
1492 }
1514 } 1493 }
1515 1494
1516 /* Enable system clock for GPIO module. 1495 /* Enable system clock for GPIO module.
@@ -1739,12 +1718,6 @@ static int __init omap_gpio_sysinit(void)
1739 return ret; 1718 return ret;
1740} 1719}
1741 1720
1742EXPORT_SYMBOL(omap_request_gpio);
1743EXPORT_SYMBOL(omap_free_gpio);
1744EXPORT_SYMBOL(omap_set_gpio_direction);
1745EXPORT_SYMBOL(omap_set_gpio_dataout);
1746EXPORT_SYMBOL(omap_get_gpio_datain);
1747
1748arch_initcall(omap_gpio_sysinit); 1721arch_initcall(omap_gpio_sysinit);
1749 1722
1750 1723
@@ -1801,14 +1774,14 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
1801 continue; 1774 continue;
1802 1775
1803 irq = bank->virtual_irq_start + j; 1776 irq = bank->virtual_irq_start + j;
1804 value = omap_get_gpio_datain(gpio); 1777 value = gpio_get_value(gpio);
1805 is_in = gpio_is_input(bank, mask); 1778 is_in = gpio_is_input(bank, mask);
1806 1779
1807 if (bank_is_mpuio(bank)) 1780 if (bank_is_mpuio(bank))
1808 seq_printf(s, "MPUIO %2d ", j); 1781 seq_printf(s, "MPUIO %2d ", j);
1809 else 1782 else
1810 seq_printf(s, "GPIO %3d ", gpio); 1783 seq_printf(s, "GPIO %3d ", gpio);
1811 seq_printf(s, "(%10s): %s %s", 1784 seq_printf(s, "(%-20.20s): %s %s",
1812 label, 1785 label,
1813 is_in ? "in " : "out", 1786 is_in ? "in " : "out",
1814 value ? "hi" : "lo"); 1787 value ? "hi" : "lo");
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index 0e6d147ab6f8..89a6ab0b7db8 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -79,26 +79,43 @@ static struct platform_device omap_i2c_devices[] = {
79#endif 79#endif
80}; 80};
81 81
82static void __init omap_i2c_mux_pins(int bus_id) 82#if defined(CONFIG_ARCH_OMAP24XX)
83static const int omap24xx_pins[][2] = {
84 { M19_24XX_I2C1_SCL, L15_24XX_I2C1_SDA },
85 { J15_24XX_I2C2_SCL, H19_24XX_I2C2_SDA },
86};
87#else
88static const int omap24xx_pins[][2] = {};
89#endif
90#if defined(CONFIG_ARCH_OMAP34XX)
91static const int omap34xx_pins[][2] = {
92 { K21_34XX_I2C1_SCL, J21_34XX_I2C1_SDA},
93 { AF15_34XX_I2C2_SCL, AE15_34XX_I2C2_SDA},
94 { AF14_34XX_I2C3_SCL, AG14_34XX_I2C3_SDA},
95};
96#else
97static const int omap34xx_pins[][2] = {};
98#endif
99
100static void __init omap_i2c_mux_pins(int bus)
83{ 101{
84 /* TODO: Muxing for OMAP3 */ 102 int scl, sda;
85 switch (bus_id) { 103
86 case 1: 104 if (cpu_class_is_omap1()) {
87 if (cpu_class_is_omap1()) { 105 scl = I2C_SCL;
88 omap_cfg_reg(I2C_SCL); 106 sda = I2C_SDA;
89 omap_cfg_reg(I2C_SDA); 107 } else if (cpu_is_omap24xx()) {
90 } else if (cpu_is_omap24xx()) { 108 scl = omap24xx_pins[bus][0];
91 omap_cfg_reg(M19_24XX_I2C1_SCL); 109 sda = omap24xx_pins[bus][1];
92 omap_cfg_reg(L15_24XX_I2C1_SDA); 110 } else if (cpu_is_omap34xx()) {
93 } 111 scl = omap34xx_pins[bus][0];
94 break; 112 sda = omap34xx_pins[bus][1];
95 case 2: 113 } else {
96 if (cpu_is_omap24xx()) { 114 return;
97 omap_cfg_reg(J15_24XX_I2C2_SCL);
98 omap_cfg_reg(H19_24XX_I2C2_SDA);
99 }
100 break;
101 } 115 }
116
117 omap_cfg_reg(sda);
118 omap_cfg_reg(scl);
102} 119}
103 120
104int __init omap_register_i2c_bus(int bus_id, u32 clkrate, 121int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
@@ -142,6 +159,6 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
142 res[1].start = irq; 159 res[1].start = irq;
143 } 160 }
144 161
145 omap_i2c_mux_pins(bus_id); 162 omap_i2c_mux_pins(bus_id - 1);
146 return platform_device_register(pdev); 163 return platform_device_register(pdev);
147} 164}
diff --git a/arch/arm/plat-omap/include/mach/board-apollon.h b/arch/arm/plat-omap/include/mach/board-apollon.h
index 731c858cf3fe..61bd5e8f09b1 100644
--- a/arch/arm/plat-omap/include/mach/board-apollon.h
+++ b/arch/arm/plat-omap/include/mach/board-apollon.h
@@ -29,12 +29,14 @@
29#ifndef __ASM_ARCH_OMAP_APOLLON_H 29#ifndef __ASM_ARCH_OMAP_APOLLON_H
30#define __ASM_ARCH_OMAP_APOLLON_H 30#define __ASM_ARCH_OMAP_APOLLON_H
31 31
32#include <mach/cpu.h>
33
32extern void apollon_mmc_init(void); 34extern void apollon_mmc_init(void);
33 35
34static inline int apollon_plus(void) 36static inline int apollon_plus(void)
35{ 37{
36 /* The apollon plus has IDCODE revision 5 */ 38 /* The apollon plus has IDCODE revision 5 */
37 return system_rev & 0xc0; 39 return omap_rev() & 0xc0;
38} 40}
39 41
40/* Placeholder for APOLLON specific defines */ 42/* Placeholder for APOLLON specific defines */
diff --git a/arch/arm/plat-omap/include/mach/board-ldp.h b/arch/arm/plat-omap/include/mach/board-ldp.h
index 66e2746c04ca..f23399665212 100644
--- a/arch/arm/plat-omap/include/mach/board-ldp.h
+++ b/arch/arm/plat-omap/include/mach/board-ldp.h
@@ -32,5 +32,8 @@
32extern void twl4030_bci_battery_init(void); 32extern void twl4030_bci_battery_init(void);
33 33
34#define TWL4030_IRQNUM INT_34XX_SYS_NIRQ 34#define TWL4030_IRQNUM INT_34XX_SYS_NIRQ
35 35#define LDP_SMC911X_CS 1
36#define LDP_SMC911X_GPIO 152
37#define DEBUG_BASE 0x08000000
38#define OMAP34XX_ETHR_START DEBUG_BASE
36#endif /* __ASM_ARCH_OMAP_LDP_H */ 39#endif /* __ASM_ARCH_OMAP_LDP_H */
diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h
index e0464187209d..b2062f1175de 100644
--- a/arch/arm/plat-omap/include/mach/cpu.h
+++ b/arch/arm/plat-omap/include/mach/cpu.h
@@ -28,13 +28,18 @@
28 28
29struct omap_chip_id { 29struct omap_chip_id {
30 u8 oc; 30 u8 oc;
31 u8 type;
31}; 32};
32 33
33#define OMAP_CHIP_INIT(x) { .oc = x } 34#define OMAP_CHIP_INIT(x) { .oc = x }
34 35
35extern unsigned int system_rev; 36/*
36 37 * omap_rev bits:
37#define omap2_cpu_rev() ((system_rev >> 12) & 0x0f) 38 * CPU id bits (0730, 1510, 1710, 2422...) [31:16]
39 * CPU revision (See _REV_ defined in cpu.h) [15:08]
40 * CPU class bits (15xx, 16xx, 24xx, 34xx...) [07:00]
41 */
42unsigned int omap_rev(void);
38 43
39/* 44/*
40 * Test if multicore OMAP support is needed 45 * Test if multicore OMAP support is needed
@@ -108,7 +113,7 @@ extern unsigned int system_rev;
108 * cpu_is_omap243x(): True for OMAP2430 113 * cpu_is_omap243x(): True for OMAP2430
109 * cpu_is_omap343x(): True for OMAP3430 114 * cpu_is_omap343x(): True for OMAP3430
110 */ 115 */
111#define GET_OMAP_CLASS ((system_rev >> 24) & 0xff) 116#define GET_OMAP_CLASS (omap_rev() & 0xff)
112 117
113#define IS_OMAP_CLASS(class, id) \ 118#define IS_OMAP_CLASS(class, id) \
114static inline int is_omap ##class (void) \ 119static inline int is_omap ##class (void) \
@@ -116,7 +121,7 @@ static inline int is_omap ##class (void) \
116 return (GET_OMAP_CLASS == (id)) ? 1 : 0; \ 121 return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
117} 122}
118 123
119#define GET_OMAP_SUBCLASS ((system_rev >> 20) & 0x0fff) 124#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff)
120 125
121#define IS_OMAP_SUBCLASS(subclass, id) \ 126#define IS_OMAP_SUBCLASS(subclass, id) \
122static inline int is_omap ##subclass (void) \ 127static inline int is_omap ##subclass (void) \
@@ -226,7 +231,7 @@ IS_OMAP_SUBCLASS(343x, 0x343)
226 * cpu_is_omap2430(): True for OMAP2430 231 * cpu_is_omap2430(): True for OMAP2430
227 * cpu_is_omap3430(): True for OMAP3430 232 * cpu_is_omap3430(): True for OMAP3430
228 */ 233 */
229#define GET_OMAP_TYPE ((system_rev >> 16) & 0xffff) 234#define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff)
230 235
231#define IS_OMAP_TYPE(type, id) \ 236#define IS_OMAP_TYPE(type, id) \
232static inline int is_omap ##type (void) \ 237static inline int is_omap ##type (void) \
@@ -320,44 +325,20 @@ IS_OMAP_TYPE(3430, 0x3430)
320#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx()) 325#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx())
321 326
322#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 327#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
323/*
324 * Macros to detect silicon revision of OMAP2/3 processors.
325 * is_sil_rev_greater_than: true if passed cpu type & its rev is greater.
326 * is_sil_rev_lesser_than: true if passed cpu type & its rev is lesser.
327 * is_sil_rev_equal_to: true if passed cpu type & its rev is equal.
328 * get_sil_rev: return the silicon rev value.
329 */
330#define get_sil_omap_type(rev) ((rev & 0xffff0000) >> 16)
331#define get_sil_revision(rev) ((rev & 0x0000f000) >> 12)
332 328
333#define is_sil_rev_greater_than(rev) \ 329/* Various silicon revisions for omap2 */
334 ((get_sil_omap_type(system_rev) == get_sil_omap_type(rev)) && \ 330#define OMAP242X_CLASS 0x24200024
335 (get_sil_revision(system_rev) > get_sil_revision(rev))) 331#define OMAP2420_REV_ES1_0 0x24200024
332#define OMAP2420_REV_ES2_0 0x24201024
336 333
337#define is_sil_rev_less_than(rev) \ 334#define OMAP243X_CLASS 0x24300024
338 ((get_sil_omap_type(system_rev) == get_sil_omap_type(rev)) && \ 335#define OMAP2430_REV_ES1_0 0x24300024
339 (get_sil_revision(system_rev) < get_sil_revision(rev)))
340 336
341#define is_sil_rev_equal_to(rev) \ 337#define OMAP343X_CLASS 0x34300034
342 ((get_sil_omap_type(system_rev) == get_sil_omap_type(rev)) && \ 338#define OMAP3430_REV_ES1_0 0x34300034
343 (get_sil_revision(system_rev) == get_sil_revision(rev))) 339#define OMAP3430_REV_ES2_0 0x34301034
344 340#define OMAP3430_REV_ES2_1 0x34302034
345#define get_sil_rev() \ 341#define OMAP3430_REV_ES3_0 0x34303034
346 get_sil_revision(system_rev)
347
348/* Various silicon macros defined here */
349#define OMAP242X_CLASS 0x24200000
350#define OMAP2420_REV_ES1_0 0x24200000
351#define OMAP2420_REV_ES2_0 0x24201000
352
353#define OMAP243X_CLASS 0x24300000
354#define OMAP2430_REV_ES1_0 0x24300000
355
356#define OMAP343X_CLASS 0x34300000
357#define OMAP3430_REV_ES1_0 0x34300000
358#define OMAP3430_REV_ES2_0 0x34301000
359#define OMAP3430_REV_ES2_1 0x34302000
360#define OMAP3430_REV_ES2_2 0x34303000
361 342
362/* 343/*
363 * omap_chip bits 344 * omap_chip bits
@@ -382,23 +363,16 @@ IS_OMAP_TYPE(3430, 0x3430)
382#define CHIP_IS_OMAP24XX (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430) 363#define CHIP_IS_OMAP24XX (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430)
383 364
384int omap_chip_is(struct omap_chip_id oci); 365int omap_chip_is(struct omap_chip_id oci);
385 366int omap_type(void);
386 367
387/* 368/*
388 * Macro to detect device type i.e. EMU/HS/TST/GP/BAD 369 * Macro to detect device type i.e. EMU/HS/TST/GP/BAD
389 */ 370 */
390#define DEVICE_TYPE_TEST 0 371#define OMAP2_DEVICE_TYPE_TEST 0
391#define DEVICE_TYPE_EMU 1 372#define OMAP2_DEVICE_TYPE_EMU 1
392#define DEVICE_TYPE_SEC 2 373#define OMAP2_DEVICE_TYPE_SEC 2
393#define DEVICE_TYPE_GP 3 374#define OMAP2_DEVICE_TYPE_GP 3
394#define DEVICE_TYPE_BAD 4 375#define OMAP2_DEVICE_TYPE_BAD 4
395
396#define get_device_type() ((system_rev & 0x700) >> 8)
397#define is_device_type_test() (get_device_type() == DEVICE_TYPE_TEST)
398#define is_device_type_emu() (get_device_type() == DEVICE_TYPE_EMU)
399#define is_device_type_sec() (get_device_type() == DEVICE_TYPE_SEC)
400#define is_device_type_gp() (get_device_type() == DEVICE_TYPE_GP)
401#define is_device_type_bad() (get_device_type() == DEVICE_TYPE_BAD)
402 376
403void omap2_check_revision(void); 377void omap2_check_revision(void);
404 378
diff --git a/arch/arm/plat-omap/include/mach/gpio.h b/arch/arm/plat-omap/include/mach/gpio.h
index 98e9008b7e9d..04e68e88f134 100644
--- a/arch/arm/plat-omap/include/mach/gpio.h
+++ b/arch/arm/plat-omap/include/mach/gpio.h
@@ -71,11 +71,6 @@
71 IH_GPIO_BASE + (nr)) 71 IH_GPIO_BASE + (nr))
72 72
73extern int omap_gpio_init(void); /* Call from board init only */ 73extern int omap_gpio_init(void); /* Call from board init only */
74extern int omap_request_gpio(int gpio);
75extern void omap_free_gpio(int gpio);
76extern void omap_set_gpio_direction(int gpio, int is_input);
77extern void omap_set_gpio_dataout(int gpio, int enable);
78extern int omap_get_gpio_datain(int gpio);
79extern void omap2_gpio_prepare_for_retention(void); 74extern void omap2_gpio_prepare_for_retention(void);
80extern void omap2_gpio_resume_after_retention(void); 75extern void omap2_gpio_resume_after_retention(void);
81extern void omap_set_gpio_debounce(int gpio, int enable); 76extern void omap_set_gpio_debounce(int gpio, int enable);
@@ -92,6 +87,16 @@ extern void omap_set_gpio_debounce_time(int gpio, int enable);
92#include <linux/errno.h> 87#include <linux/errno.h>
93#include <asm-generic/gpio.h> 88#include <asm-generic/gpio.h>
94 89
90static inline int omap_request_gpio(int gpio)
91{
92 return gpio_request(gpio, "FIXME");
93}
94
95static inline void omap_free_gpio(int gpio)
96{
97 gpio_free(gpio);
98}
99
95static inline int gpio_get_value(unsigned gpio) 100static inline int gpio_get_value(unsigned gpio)
96{ 101{
97 return __gpio_get_value(gpio); 102 return __gpio_get_value(gpio);
@@ -109,16 +114,24 @@ static inline int gpio_cansleep(unsigned gpio)
109 114
110static inline int gpio_to_irq(unsigned gpio) 115static inline int gpio_to_irq(unsigned gpio)
111{ 116{
112 if (gpio < (OMAP_MAX_GPIO_LINES + 16)) 117 return __gpio_to_irq(gpio);
113 return OMAP_GPIO_IRQ(gpio);
114 return -EINVAL;
115} 118}
116 119
117static inline int irq_to_gpio(unsigned irq) 120static inline int irq_to_gpio(unsigned irq)
118{ 121{
122 int tmp;
123
124 /* omap1 SOC mpuio */
119 if (cpu_class_is_omap1() && (irq < (IH_MPUIO_BASE + 16))) 125 if (cpu_class_is_omap1() && (irq < (IH_MPUIO_BASE + 16)))
120 return (irq - IH_MPUIO_BASE) + OMAP_MAX_GPIO_LINES; 126 return (irq - IH_MPUIO_BASE) + OMAP_MAX_GPIO_LINES;
121 return irq - IH_GPIO_BASE; 127
128 /* SOC gpio */
129 tmp = irq - IH_GPIO_BASE;
130 if (tmp < OMAP_MAX_GPIO_LINES)
131 return tmp;
132
133 /* we don't supply reverse mappings for non-SOC gpios */
134 return -EIO;
122} 135}
123 136
124#endif 137#endif
diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h
index 6bbf1789bed5..f4362b8682c7 100644
--- a/arch/arm/plat-omap/include/mach/mux.h
+++ b/arch/arm/plat-omap/include/mach/mux.h
@@ -632,6 +632,15 @@ enum omap24xx_index {
632 AC7_2430_USB0HS_DATA7, 632 AC7_2430_USB0HS_DATA7,
633 633
634 /* 2430 McBSP */ 634 /* 2430 McBSP */
635 AD6_2430_MCBSP_CLKS,
636
637 AB2_2430_MCBSP1_CLKR,
638 AD5_2430_MCBSP1_FSR,
639 AA1_2430_MCBSP1_DX,
640 AF3_2430_MCBSP1_DR,
641 AB3_2430_MCBSP1_FSX,
642 Y9_2430_MCBSP1_CLKX,
643
635 AC10_2430_MCBSP2_FSX, 644 AC10_2430_MCBSP2_FSX,
636 AD16_2430_MCBSP2_CLX, 645 AD16_2430_MCBSP2_CLX,
637 AE13_2430_MCBSP2_DX, 646 AE13_2430_MCBSP2_DX,
@@ -641,6 +650,30 @@ enum omap24xx_index {
641 AE13_2430_MCBSP2_DX_OFF, 650 AE13_2430_MCBSP2_DX_OFF,
642 AD13_2430_MCBSP2_DR_OFF, 651 AD13_2430_MCBSP2_DR_OFF,
643 652
653 AC9_2430_MCBSP3_CLKX,
654 AE4_2430_MCBSP3_FSX,
655 AE2_2430_MCBSP3_DR,
656 AF4_2430_MCBSP3_DX,
657
658 N3_2430_MCBSP4_CLKX,
659 AD23_2430_MCBSP4_DR,
660 AB25_2430_MCBSP4_DX,
661 AC25_2430_MCBSP4_FSX,
662
663 AE16_2430_MCBSP5_CLKX,
664 AF12_2430_MCBSP5_FSX,
665 K7_2430_MCBSP5_DX,
666 M1_2430_MCBSP5_DR,
667
668 /* 2430 McSPI*/
669 Y18_2430_MCSPI1_CLK,
670 AD15_2430_MCSPI1_SIMO,
671 AE17_2430_MCSPI1_SOMI,
672 U1_2430_MCSPI1_CS0,
673
674 /* Touchscreen GPIO */
675 AF19_2430_GPIO_85,
676
644}; 677};
645 678
646enum omap34xx_index { 679enum omap34xx_index {
@@ -749,6 +782,14 @@ enum omap34xx_index {
749 AD2_3430_USB3FS_PHY_MM3_TXDAT, 782 AD2_3430_USB3FS_PHY_MM3_TXDAT,
750 AC1_3430_USB3FS_PHY_MM3_TXEN_N, 783 AC1_3430_USB3FS_PHY_MM3_TXEN_N,
751 784
785 /* 34xx GPIO
786 * - normally these are bidirectional, no internal pullup/pulldown
787 * - "_UP" suffix (GPIO3_UP) if internal pullup is configured
788 * - "_DOWN" suffix (GPIO3_DOWN) with internal pulldown
789 * - "_OUT" suffix (GPIO3_OUT) for output-only pins (unlike 24xx)
790 */
791 AH8_34XX_GPIO29,
792 J25_34XX_GPIO170,
752}; 793};
753 794
754struct omap_mux_cfg { 795struct omap_mux_cfg {
diff --git a/arch/arm/plat-omap/include/mach/omapfb.h b/arch/arm/plat-omap/include/mach/omapfb.h
index ec67fb428607..7b74d1255e0b 100644
--- a/arch/arm/plat-omap/include/mach/omapfb.h
+++ b/arch/arm/plat-omap/include/mach/omapfb.h
@@ -353,8 +353,8 @@ struct omapfb_device {
353 u32 pseudo_palette[17]; 353 u32 pseudo_palette[17];
354 354
355 struct lcd_panel *panel; /* LCD panel */ 355 struct lcd_panel *panel; /* LCD panel */
356 struct lcd_ctrl *ctrl; /* LCD controller */ 356 const struct lcd_ctrl *ctrl; /* LCD controller */
357 struct lcd_ctrl *int_ctrl; /* internal LCD ctrl */ 357 const struct lcd_ctrl *int_ctrl; /* internal LCD ctrl */
358 struct lcd_ctrl_extif *ext_if; /* LCD ctrl external 358 struct lcd_ctrl_extif *ext_if; /* LCD ctrl external
359 interface */ 359 interface */
360 struct device *dev; 360 struct device *dev;
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 9f9a921829c0..be7bcaf2b832 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -24,6 +24,7 @@
24 24
25#include <mach/sram.h> 25#include <mach/sram.h>
26#include <mach/board.h> 26#include <mach/board.h>
27#include <mach/cpu.h>
27 28
28#include <mach/control.h> 29#include <mach/control.h>
29 30
@@ -87,7 +88,7 @@ static int is_sram_locked(void)
87 int type = 0; 88 int type = 0;
88 89
89 if (cpu_is_omap242x()) 90 if (cpu_is_omap242x())
90 type = system_rev & OMAP2_DEVICETYPE_MASK; 91 type = omap_rev() & OMAP2_DEVICETYPE_MASK;
91 92
92 if (type == GP_DEVICE) { 93 if (type == GP_DEVICE) {
93 /* RAMFW: R/W access to all initiators for all qualifier sets */ 94 /* RAMFW: R/W access to all initiators for all qualifier sets */
@@ -255,7 +256,7 @@ void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
255 if (!_omap_sram_reprogram_clock) 256 if (!_omap_sram_reprogram_clock)
256 omap_sram_error(); 257 omap_sram_error();
257 258
258 return _omap_sram_reprogram_clock(dpllctl, ckctl); 259 _omap_sram_reprogram_clock(dpllctl, ckctl);
259} 260}
260 261
261int __init omap1_sram_init(void) 262int __init omap1_sram_init(void)
@@ -282,8 +283,8 @@ void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
282 if (!_omap2_sram_ddr_init) 283 if (!_omap2_sram_ddr_init)
283 omap_sram_error(); 284 omap_sram_error();
284 285
285 return _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl, 286 _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
286 base_cs, force_unlock); 287 base_cs, force_unlock);
287} 288}
288 289
289static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val, 290static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
@@ -294,7 +295,7 @@ void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
294 if (!_omap2_sram_reprogram_sdrc) 295 if (!_omap2_sram_reprogram_sdrc)
295 omap_sram_error(); 296 omap_sram_error();
296 297
297 return _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type); 298 _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
298} 299}
299 300
300static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); 301static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c
index 883902fead89..d41d41d78ad9 100644
--- a/arch/arm/plat-orion/pcie.c
+++ b/arch/arm/plat-orion/pcie.c
@@ -35,7 +35,7 @@
35#define PCIE_CONF_REG(r) ((((r) & 0xf00) << 16) | ((r) & 0xfc)) 35#define PCIE_CONF_REG(r) ((((r) & 0xf00) << 16) | ((r) & 0xfc))
36#define PCIE_CONF_BUS(b) (((b) & 0xff) << 16) 36#define PCIE_CONF_BUS(b) (((b) & 0xff) << 16)
37#define PCIE_CONF_DEV(d) (((d) & 0x1f) << 11) 37#define PCIE_CONF_DEV(d) (((d) & 0x1f) << 11)
38#define PCIE_CONF_FUNC(f) (((f) & 0x3) << 8) 38#define PCIE_CONF_FUNC(f) (((f) & 0x7) << 8)
39#define PCIE_CONF_DATA_OFF 0x18fc 39#define PCIE_CONF_DATA_OFF 0x18fc
40#define PCIE_MASK_OFF 0x1910 40#define PCIE_MASK_OFF 0x1910
41#define PCIE_CTRL_OFF 0x1a00 41#define PCIE_CTRL_OFF 0x1a00
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 05:52:37 -0500