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-rw-r--r--arch/arm/Kconfig10
-rw-r--r--arch/arm/Makefile1
-rw-r--r--arch/arm/configs/at91rm9200dk_defconfig10
-rw-r--r--arch/arm/configs/at91rm9200ek_defconfig10
-rw-r--r--arch/arm/configs/at91sam9260ek_defconfig950
-rw-r--r--arch/arm/configs/at91sam9261ek_defconfig1106
-rw-r--r--arch/arm/configs/carmeva_defconfig2
-rw-r--r--arch/arm/configs/csb637_defconfig2
-rw-r--r--arch/arm/configs/ep93xx_defconfig1
-rw-r--r--arch/arm/configs/iop13xx_defconfig1134
-rw-r--r--arch/arm/configs/kb9202_defconfig2
-rw-r--r--arch/arm/kernel/setup.c11
-rw-r--r--arch/arm/mach-at91rm9200/Kconfig36
-rw-r--r--arch/arm/mach-at91rm9200/Makefile12
-rw-r--r--arch/arm/mach-at91rm9200/at91rm9200.c42
-rw-r--r--arch/arm/mach-at91rm9200/at91rm9200_devices.c (renamed from arch/arm/mach-at91rm9200/devices.c)160
-rw-r--r--arch/arm/mach-at91rm9200/at91rm9200_time.c5
-rw-r--r--arch/arm/mach-at91rm9200/at91sam9260.c294
-rw-r--r--arch/arm/mach-at91rm9200/at91sam9260_devices.c866
-rw-r--r--arch/arm/mach-at91rm9200/at91sam9261.c289
-rw-r--r--arch/arm/mach-at91rm9200/at91sam9261_devices.c741
-rw-r--r--arch/arm/mach-at91rm9200/at91sam926x_time.c114
-rw-r--r--arch/arm/mach-at91rm9200/board-carmeva.c32
-rw-r--r--arch/arm/mach-at91rm9200/board-csb337.c2
-rw-r--r--arch/arm/mach-at91rm9200/board-dk.c30
-rw-r--r--arch/arm/mach-at91rm9200/board-eb9200.c2
-rw-r--r--arch/arm/mach-at91rm9200/board-ek.c30
-rw-r--r--arch/arm/mach-at91rm9200/board-kb9202.c2
-rw-r--r--arch/arm/mach-at91rm9200/board-sam9260ek.c201
-rw-r--r--arch/arm/mach-at91rm9200/board-sam9261ek.c259
-rw-r--r--arch/arm/mach-at91rm9200/clock.c27
-rw-r--r--arch/arm/mach-at91rm9200/clock.h1
-rw-r--r--arch/arm/mach-at91rm9200/generic.h8
-rw-r--r--arch/arm/mach-at91rm9200/gpio.c2
-rw-r--r--arch/arm/mach-at91rm9200/irq.c14
-rw-r--r--arch/arm/mach-at91rm9200/pm.c24
-rw-r--r--arch/arm/mach-ep93xx/Kconfig12
-rw-r--r--arch/arm/mach-ep93xx/Makefile2
-rw-r--r--arch/arm/mach-ep93xx/adssphere.c91
-rw-r--r--arch/arm/mach-ep93xx/edb9302a.c91
-rw-r--r--arch/arm/mach-iop13xx/Kconfig20
-rw-r--r--arch/arm/mach-iop13xx/Makefile12
-rw-r--r--arch/arm/mach-iop13xx/Makefile.boot3
-rw-r--r--arch/arm/mach-iop13xx/io.c93
-rw-r--r--arch/arm/mach-iop13xx/iq81340mc.c98
-rw-r--r--arch/arm/mach-iop13xx/iq81340sc.c100
-rw-r--r--arch/arm/mach-iop13xx/irq.c286
-rw-r--r--arch/arm/mach-iop13xx/pci.c1113
-rw-r--r--arch/arm/mach-iop13xx/setup.c406
-rw-r--r--arch/arm/mach-iop13xx/time.c102
-rw-r--r--arch/arm/mach-pxa/generic.c60
-rw-r--r--arch/arm/mach-sa1100/generic.c15
-rw-r--r--arch/arm/mach-versatile/core.c14
-rw-r--r--arch/arm/mm/Kconfig2
-rw-r--r--arch/arm/tools/mach-types58
55 files changed, 8874 insertions, 136 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7be67ef4b84f..8c05d4321ae9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -223,6 +223,12 @@ config ARCH_IOP33X
223 help 223 help
224 Support for Intel's IOP33X (XScale) family of processors. 224 Support for Intel's IOP33X (XScale) family of processors.
225 225
226config ARCH_IOP13XX
227 bool "IOP13xx-based"
228 select PCI
229 help
230 Support for Intel's IOP13XX (XScale) family of processors.
231
226config ARCH_IXP4XX 232config ARCH_IXP4XX
227 bool "IXP4xx-based" 233 bool "IXP4xx-based"
228 depends on MMU 234 depends on MMU
@@ -331,6 +337,8 @@ source "arch/arm/mach-iop32x/Kconfig"
331 337
332source "arch/arm/mach-iop33x/Kconfig" 338source "arch/arm/mach-iop33x/Kconfig"
333 339
340source "arch/arm/mach-iop13xx/Kconfig"
341
334source "arch/arm/mach-ixp4xx/Kconfig" 342source "arch/arm/mach-ixp4xx/Kconfig"
335 343
336source "arch/arm/mach-ixp2000/Kconfig" 344source "arch/arm/mach-ixp2000/Kconfig"
@@ -591,7 +599,7 @@ config LEDS
591 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ 599 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
592 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ 600 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
593 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ 601 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
594 ARCH_AT91RM9200 || MACH_TRIZEPS4 602 ARCH_AT91 || MACH_TRIZEPS4
595 help 603 help
596 If you say Y here, the LEDs on your machine will be used 604 If you say Y here, the LEDs on your machine will be used
597 to provide useful information about your current system status. 605 to provide useful information about your current system status.
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index b6001f97c80c..000f1100b553 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -110,6 +110,7 @@ endif
110 machine-$(CONFIG_ARCH_CLPS711X) := clps711x 110 machine-$(CONFIG_ARCH_CLPS711X) := clps711x
111 machine-$(CONFIG_ARCH_IOP32X) := iop32x 111 machine-$(CONFIG_ARCH_IOP32X) := iop32x
112 machine-$(CONFIG_ARCH_IOP33X) := iop33x 112 machine-$(CONFIG_ARCH_IOP33X) := iop33x
113 machine-$(CONFIG_ARCH_IOP13XX) := iop13xx
113 machine-$(CONFIG_ARCH_IXP4XX) := ixp4xx 114 machine-$(CONFIG_ARCH_IXP4XX) := ixp4xx
114 machine-$(CONFIG_ARCH_IXP2000) := ixp2000 115 machine-$(CONFIG_ARCH_IXP2000) := ixp2000
115 machine-$(CONFIG_ARCH_IXP23XX) := ixp23xx 116 machine-$(CONFIG_ARCH_IXP23XX) := ixp23xx
diff --git a/arch/arm/configs/at91rm9200dk_defconfig b/arch/arm/configs/at91rm9200dk_defconfig
index 02164c1a301c..e10d003566d6 100644
--- a/arch/arm/configs/at91rm9200dk_defconfig
+++ b/arch/arm/configs/at91rm9200dk_defconfig
@@ -357,9 +357,9 @@ CONFIG_MTD_CFI_UTIL=y
357# 357#
358# CONFIG_MTD_COMPLEX_MAPPINGS is not set 358# CONFIG_MTD_COMPLEX_MAPPINGS is not set
359CONFIG_MTD_PHYSMAP=y 359CONFIG_MTD_PHYSMAP=y
360CONFIG_MTD_PHYSMAP_START=0x10000000 360CONFIG_MTD_PHYSMAP_START=0
361CONFIG_MTD_PHYSMAP_LEN=0x200000 361CONFIG_MTD_PHYSMAP_LEN=0
362CONFIG_MTD_PHYSMAP_BANKWIDTH=2 362CONFIG_MTD_PHYSMAP_BANKWIDTH=0
363# CONFIG_MTD_ARM_INTEGRATOR is not set 363# CONFIG_MTD_ARM_INTEGRATOR is not set
364# CONFIG_MTD_IMPA7 is not set 364# CONFIG_MTD_IMPA7 is not set
365# CONFIG_MTD_PLATRAM is not set 365# CONFIG_MTD_PLATRAM is not set
@@ -585,7 +585,9 @@ CONFIG_AT91RM9200_WATCHDOG=y
585# CONFIG_USBPCWATCHDOG is not set 585# CONFIG_USBPCWATCHDOG is not set
586# CONFIG_NVRAM is not set 586# CONFIG_NVRAM is not set
587# CONFIG_RTC is not set 587# CONFIG_RTC is not set
588CONFIG_AT91_RTC=y 588CONFIG_RTC_LIB=y
589CONFIG_RTC_CLASS=y
590CONFIG_RTC_DRV_AT91RM9200=y
589# CONFIG_DTLK is not set 591# CONFIG_DTLK is not set
590# CONFIG_R3964 is not set 592# CONFIG_R3964 is not set
591 593
diff --git a/arch/arm/configs/at91rm9200ek_defconfig b/arch/arm/configs/at91rm9200ek_defconfig
index bee410cc4e92..834dddb51314 100644
--- a/arch/arm/configs/at91rm9200ek_defconfig
+++ b/arch/arm/configs/at91rm9200ek_defconfig
@@ -348,9 +348,9 @@ CONFIG_MTD_CFI_UTIL=y
348# 348#
349# CONFIG_MTD_COMPLEX_MAPPINGS is not set 349# CONFIG_MTD_COMPLEX_MAPPINGS is not set
350CONFIG_MTD_PHYSMAP=y 350CONFIG_MTD_PHYSMAP=y
351CONFIG_MTD_PHYSMAP_START=0x10000000 351CONFIG_MTD_PHYSMAP_START=0
352CONFIG_MTD_PHYSMAP_LEN=0x800000 352CONFIG_MTD_PHYSMAP_LEN=0
353CONFIG_MTD_PHYSMAP_BANKWIDTH=2 353CONFIG_MTD_PHYSMAP_BANKWIDTH=0
354# CONFIG_MTD_ARM_INTEGRATOR is not set 354# CONFIG_MTD_ARM_INTEGRATOR is not set
355# CONFIG_MTD_IMPA7 is not set 355# CONFIG_MTD_IMPA7 is not set
356# CONFIG_MTD_PLATRAM is not set 356# CONFIG_MTD_PLATRAM is not set
@@ -566,7 +566,9 @@ CONFIG_AT91RM9200_WATCHDOG=y
566# CONFIG_USBPCWATCHDOG is not set 566# CONFIG_USBPCWATCHDOG is not set
567# CONFIG_NVRAM is not set 567# CONFIG_NVRAM is not set
568# CONFIG_RTC is not set 568# CONFIG_RTC is not set
569CONFIG_AT91_RTC=y 569CONFIG_RTC_LIB=y
570CONFIG_RTC_CLASS=y
571CONFIG_RTC_DRV_AT91RM9200=y
570# CONFIG_DTLK is not set 572# CONFIG_DTLK is not set
571# CONFIG_R3964 is not set 573# CONFIG_R3964 is not set
572 574
diff --git a/arch/arm/configs/at91sam9260ek_defconfig b/arch/arm/configs/at91sam9260ek_defconfig
new file mode 100644
index 000000000000..79049206dfa5
--- /dev/null
+++ b/arch/arm/configs/at91sam9260ek_defconfig
@@ -0,0 +1,950 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.19-rc6
4# Fri Nov 17 18:42:21 2006
5#
6CONFIG_ARM=y
7# CONFIG_GENERIC_TIME is not set
8CONFIG_MMU=y
9CONFIG_GENERIC_HARDIRQS=y
10CONFIG_TRACE_IRQFLAGS_SUPPORT=y
11CONFIG_HARDIRQS_SW_RESEND=y
12CONFIG_GENERIC_IRQ_PROBE=y
13CONFIG_RWSEM_GENERIC_SPINLOCK=y
14CONFIG_GENERIC_HWEIGHT=y
15CONFIG_GENERIC_CALIBRATE_DELAY=y
16CONFIG_VECTORS_BASE=0xffff0000
17CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
18
19#
20# Code maturity level options
21#
22CONFIG_EXPERIMENTAL=y
23CONFIG_BROKEN_ON_SMP=y
24CONFIG_INIT_ENV_ARG_LIMIT=32
25
26#
27# General setup
28#
29CONFIG_LOCALVERSION=""
30# CONFIG_LOCALVERSION_AUTO is not set
31# CONFIG_SWAP is not set
32CONFIG_SYSVIPC=y
33# CONFIG_IPC_NS is not set
34# CONFIG_POSIX_MQUEUE is not set
35# CONFIG_BSD_PROCESS_ACCT is not set
36# CONFIG_TASKSTATS is not set
37# CONFIG_UTS_NS is not set
38# CONFIG_AUDIT is not set
39# CONFIG_IKCONFIG is not set
40# CONFIG_RELAY is not set
41CONFIG_INITRAMFS_SOURCE=""
42CONFIG_CC_OPTIMIZE_FOR_SIZE=y
43CONFIG_SYSCTL=y
44# CONFIG_EMBEDDED is not set
45CONFIG_UID16=y
46CONFIG_SYSCTL_SYSCALL=y
47CONFIG_KALLSYMS=y
48# CONFIG_KALLSYMS_ALL is not set
49# CONFIG_KALLSYMS_EXTRA_PASS is not set
50CONFIG_HOTPLUG=y
51CONFIG_PRINTK=y
52CONFIG_BUG=y
53CONFIG_ELF_CORE=y
54CONFIG_BASE_FULL=y
55CONFIG_FUTEX=y
56CONFIG_EPOLL=y
57CONFIG_SHMEM=y
58CONFIG_SLAB=y
59CONFIG_VM_EVENT_COUNTERS=y
60CONFIG_RT_MUTEXES=y
61# CONFIG_TINY_SHMEM is not set
62CONFIG_BASE_SMALL=0
63# CONFIG_SLOB is not set
64
65#
66# Loadable module support
67#
68CONFIG_MODULES=y
69CONFIG_MODULE_UNLOAD=y
70# CONFIG_MODULE_FORCE_UNLOAD is not set
71# CONFIG_MODVERSIONS is not set
72# CONFIG_MODULE_SRCVERSION_ALL is not set
73CONFIG_KMOD=y
74
75#
76# Block layer
77#
78CONFIG_BLOCK=y
79# CONFIG_BLK_DEV_IO_TRACE is not set
80
81#
82# IO Schedulers
83#
84CONFIG_IOSCHED_NOOP=y
85CONFIG_IOSCHED_AS=y
86# CONFIG_IOSCHED_DEADLINE is not set
87# CONFIG_IOSCHED_CFQ is not set
88CONFIG_DEFAULT_AS=y
89# CONFIG_DEFAULT_DEADLINE is not set
90# CONFIG_DEFAULT_CFQ is not set
91# CONFIG_DEFAULT_NOOP is not set
92CONFIG_DEFAULT_IOSCHED="anticipatory"
93
94#
95# System Type
96#
97# CONFIG_ARCH_AAEC2000 is not set
98# CONFIG_ARCH_INTEGRATOR is not set
99# CONFIG_ARCH_REALVIEW is not set
100# CONFIG_ARCH_VERSATILE is not set
101CONFIG_ARCH_AT91=y
102# CONFIG_ARCH_CLPS7500 is not set
103# CONFIG_ARCH_CLPS711X is not set
104# CONFIG_ARCH_CO285 is not set
105# CONFIG_ARCH_EBSA110 is not set
106# CONFIG_ARCH_EP93XX is not set
107# CONFIG_ARCH_FOOTBRIDGE is not set
108# CONFIG_ARCH_NETX is not set
109# CONFIG_ARCH_H720X is not set
110# CONFIG_ARCH_IMX is not set
111# CONFIG_ARCH_IOP32X is not set
112# CONFIG_ARCH_IOP33X is not set
113# CONFIG_ARCH_IXP4XX is not set
114# CONFIG_ARCH_IXP2000 is not set
115# CONFIG_ARCH_IXP23XX is not set
116# CONFIG_ARCH_L7200 is not set
117# CONFIG_ARCH_PNX4008 is not set
118# CONFIG_ARCH_PXA is not set
119# CONFIG_ARCH_RPC is not set
120# CONFIG_ARCH_SA1100 is not set
121# CONFIG_ARCH_S3C2410 is not set
122# CONFIG_ARCH_SHARK is not set
123# CONFIG_ARCH_LH7A40X is not set
124# CONFIG_ARCH_OMAP is not set
125
126#
127# Atmel AT91 System-on-Chip
128#
129# CONFIG_ARCH_AT91RM9200 is not set
130CONFIG_ARCH_AT91SAM9260=y
131# CONFIG_ARCH_AT91SAM9261 is not set
132
133#
134# AT91SAM9260 Board Type
135#
136CONFIG_MACH_AT91SAM9260EK=y
137
138#
139# AT91 Board Options
140#
141# CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set
142
143#
144# AT91 Feature Selections
145#
146# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
147
148#
149# Processor Type
150#
151CONFIG_CPU_32=y
152CONFIG_CPU_ARM926T=y
153CONFIG_CPU_32v5=y
154CONFIG_CPU_ABRT_EV5TJ=y
155CONFIG_CPU_CACHE_VIVT=y
156CONFIG_CPU_COPY_V4WB=y
157CONFIG_CPU_TLB_V4WBI=y
158CONFIG_CPU_CP15=y
159CONFIG_CPU_CP15_MMU=y
160
161#
162# Processor Features
163#
164# CONFIG_ARM_THUMB is not set
165# CONFIG_CPU_ICACHE_DISABLE is not set
166# CONFIG_CPU_DCACHE_DISABLE is not set
167# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
168# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
169
170#
171# Bus support
172#
173
174#
175# PCCARD (PCMCIA/CardBus) support
176#
177# CONFIG_PCCARD is not set
178
179#
180# Kernel Features
181#
182# CONFIG_PREEMPT is not set
183# CONFIG_NO_IDLE_HZ is not set
184CONFIG_HZ=100
185# CONFIG_AEABI is not set
186# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
187CONFIG_SELECT_MEMORY_MODEL=y
188CONFIG_FLATMEM_MANUAL=y
189# CONFIG_DISCONTIGMEM_MANUAL is not set
190# CONFIG_SPARSEMEM_MANUAL is not set
191CONFIG_FLATMEM=y
192CONFIG_FLAT_NODE_MEM_MAP=y
193# CONFIG_SPARSEMEM_STATIC is not set
194CONFIG_SPLIT_PTLOCK_CPUS=4096
195# CONFIG_RESOURCES_64BIT is not set
196# CONFIG_LEDS is not set
197CONFIG_ALIGNMENT_TRAP=y
198
199#
200# Boot options
201#
202CONFIG_ZBOOT_ROM_TEXT=0x0
203CONFIG_ZBOOT_ROM_BSS=0x0
204CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
205# CONFIG_XIP_KERNEL is not set
206
207#
208# Floating point emulation
209#
210
211#
212# At least one emulation must be selected
213#
214CONFIG_FPE_NWFPE=y
215# CONFIG_FPE_NWFPE_XP is not set
216# CONFIG_FPE_FASTFPE is not set
217# CONFIG_VFP is not set
218
219#
220# Userspace binary formats
221#
222CONFIG_BINFMT_ELF=y
223# CONFIG_BINFMT_AOUT is not set
224# CONFIG_BINFMT_MISC is not set
225# CONFIG_ARTHUR is not set
226
227#
228# Power management options
229#
230# CONFIG_PM is not set
231# CONFIG_APM is not set
232
233#
234# Networking
235#
236CONFIG_NET=y
237
238#
239# Networking options
240#
241# CONFIG_NETDEBUG is not set
242CONFIG_PACKET=y
243# CONFIG_PACKET_MMAP is not set
244CONFIG_UNIX=y
245CONFIG_XFRM=y
246# CONFIG_XFRM_USER is not set
247# CONFIG_XFRM_SUB_POLICY is not set
248# CONFIG_NET_KEY is not set
249CONFIG_INET=y
250# CONFIG_IP_MULTICAST is not set
251# CONFIG_IP_ADVANCED_ROUTER is not set
252CONFIG_IP_FIB_HASH=y
253CONFIG_IP_PNP=y
254# CONFIG_IP_PNP_DHCP is not set
255CONFIG_IP_PNP_BOOTP=y
256# CONFIG_IP_PNP_RARP is not set
257# CONFIG_NET_IPIP is not set
258# CONFIG_NET_IPGRE is not set
259# CONFIG_ARPD is not set
260# CONFIG_SYN_COOKIES is not set
261# CONFIG_INET_AH is not set
262# CONFIG_INET_ESP is not set
263# CONFIG_INET_IPCOMP is not set
264# CONFIG_INET_XFRM_TUNNEL is not set
265# CONFIG_INET_TUNNEL is not set
266CONFIG_INET_XFRM_MODE_TRANSPORT=y
267CONFIG_INET_XFRM_MODE_TUNNEL=y
268CONFIG_INET_XFRM_MODE_BEET=y
269CONFIG_INET_DIAG=y
270CONFIG_INET_TCP_DIAG=y
271# CONFIG_TCP_CONG_ADVANCED is not set
272CONFIG_TCP_CONG_CUBIC=y
273CONFIG_DEFAULT_TCP_CONG="cubic"
274# CONFIG_IPV6 is not set
275# CONFIG_INET6_XFRM_TUNNEL is not set
276# CONFIG_INET6_TUNNEL is not set
277# CONFIG_NETWORK_SECMARK is not set
278# CONFIG_NETFILTER is not set
279
280#
281# DCCP Configuration (EXPERIMENTAL)
282#
283# CONFIG_IP_DCCP is not set
284
285#
286# SCTP Configuration (EXPERIMENTAL)
287#
288# CONFIG_IP_SCTP is not set
289
290#
291# TIPC Configuration (EXPERIMENTAL)
292#
293# CONFIG_TIPC is not set
294# CONFIG_ATM is not set
295# CONFIG_BRIDGE is not set
296# CONFIG_VLAN_8021Q is not set
297# CONFIG_DECNET is not set
298# CONFIG_LLC2 is not set
299# CONFIG_IPX is not set
300# CONFIG_ATALK is not set
301# CONFIG_X25 is not set
302# CONFIG_LAPB is not set
303# CONFIG_ECONET is not set
304# CONFIG_WAN_ROUTER is not set
305
306#
307# QoS and/or fair queueing
308#
309# CONFIG_NET_SCHED is not set
310
311#
312# Network testing
313#
314# CONFIG_NET_PKTGEN is not set
315# CONFIG_HAMRADIO is not set
316# CONFIG_IRDA is not set
317# CONFIG_BT is not set
318# CONFIG_IEEE80211 is not set
319
320#
321# Device Drivers
322#
323
324#
325# Generic Driver Options
326#
327CONFIG_STANDALONE=y
328CONFIG_PREVENT_FIRMWARE_BUILD=y
329# CONFIG_FW_LOADER is not set
330# CONFIG_DEBUG_DRIVER is not set
331# CONFIG_SYS_HYPERVISOR is not set
332
333#
334# Connector - unified userspace <-> kernelspace linker
335#
336# CONFIG_CONNECTOR is not set
337
338#
339# Memory Technology Devices (MTD)
340#
341# CONFIG_MTD is not set
342
343#
344# Parallel port support
345#
346# CONFIG_PARPORT is not set
347
348#
349# Plug and Play support
350#
351
352#
353# Block devices
354#
355# CONFIG_BLK_DEV_COW_COMMON is not set
356# CONFIG_BLK_DEV_LOOP is not set
357# CONFIG_BLK_DEV_NBD is not set
358# CONFIG_BLK_DEV_UB is not set
359CONFIG_BLK_DEV_RAM=y
360CONFIG_BLK_DEV_RAM_COUNT=16
361CONFIG_BLK_DEV_RAM_SIZE=8192
362CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
363CONFIG_BLK_DEV_INITRD=y
364# CONFIG_CDROM_PKTCDVD is not set
365# CONFIG_ATA_OVER_ETH is not set
366
367#
368# SCSI device support
369#
370# CONFIG_RAID_ATTRS is not set
371CONFIG_SCSI=y
372# CONFIG_SCSI_NETLINK is not set
373CONFIG_SCSI_PROC_FS=y
374
375#
376# SCSI support type (disk, tape, CD-ROM)
377#
378CONFIG_BLK_DEV_SD=y
379# CONFIG_CHR_DEV_ST is not set
380# CONFIG_CHR_DEV_OSST is not set
381# CONFIG_BLK_DEV_SR is not set
382# CONFIG_CHR_DEV_SG is not set
383# CONFIG_CHR_DEV_SCH is not set
384
385#
386# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
387#
388CONFIG_SCSI_MULTI_LUN=y
389# CONFIG_SCSI_CONSTANTS is not set
390# CONFIG_SCSI_LOGGING is not set
391
392#
393# SCSI Transports
394#
395# CONFIG_SCSI_SPI_ATTRS is not set
396# CONFIG_SCSI_FC_ATTRS is not set
397# CONFIG_SCSI_ISCSI_ATTRS is not set
398# CONFIG_SCSI_SAS_ATTRS is not set
399# CONFIG_SCSI_SAS_LIBSAS is not set
400
401#
402# SCSI low-level drivers
403#
404# CONFIG_ISCSI_TCP is not set
405# CONFIG_SCSI_DEBUG is not set
406
407#
408# Multi-device support (RAID and LVM)
409#
410# CONFIG_MD is not set
411
412#
413# Fusion MPT device support
414#
415# CONFIG_FUSION is not set
416
417#
418# IEEE 1394 (FireWire) support
419#
420
421#
422# I2O device support
423#
424
425#
426# Network device support
427#
428# CONFIG_NETDEVICES is not set
429# CONFIG_NETPOLL is not set
430# CONFIG_NET_POLL_CONTROLLER is not set
431
432#
433# ISDN subsystem
434#
435# CONFIG_ISDN is not set
436
437#
438# Input device support
439#
440CONFIG_INPUT=y
441# CONFIG_INPUT_FF_MEMLESS is not set
442
443#
444# Userland interfaces
445#
446CONFIG_INPUT_MOUSEDEV=y
447# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
448CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
449CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
450# CONFIG_INPUT_JOYDEV is not set
451# CONFIG_INPUT_TSDEV is not set
452# CONFIG_INPUT_EVDEV is not set
453# CONFIG_INPUT_EVBUG is not set
454
455#
456# Input Device Drivers
457#
458# CONFIG_INPUT_KEYBOARD is not set
459# CONFIG_INPUT_MOUSE is not set
460# CONFIG_INPUT_JOYSTICK is not set
461# CONFIG_INPUT_TOUCHSCREEN is not set
462# CONFIG_INPUT_MISC is not set
463
464#
465# Hardware I/O ports
466#
467# CONFIG_SERIO is not set
468# CONFIG_GAMEPORT is not set
469
470#
471# Character devices
472#
473CONFIG_VT=y
474CONFIG_VT_CONSOLE=y
475CONFIG_HW_CONSOLE=y
476# CONFIG_VT_HW_CONSOLE_BINDING is not set
477# CONFIG_SERIAL_NONSTANDARD is not set
478
479#
480# Serial drivers
481#
482# CONFIG_SERIAL_8250 is not set
483
484#
485# Non-8250 serial port support
486#
487CONFIG_SERIAL_ATMEL=y
488CONFIG_SERIAL_ATMEL_CONSOLE=y
489# CONFIG_SERIAL_ATMEL_TTYAT is not set
490CONFIG_SERIAL_CORE=y
491CONFIG_SERIAL_CORE_CONSOLE=y
492CONFIG_UNIX98_PTYS=y
493CONFIG_LEGACY_PTYS=y
494CONFIG_LEGACY_PTY_COUNT=256
495
496#
497# IPMI
498#
499# CONFIG_IPMI_HANDLER is not set
500
501#
502# Watchdog Cards
503#
504CONFIG_WATCHDOG=y
505CONFIG_WATCHDOG_NOWAYOUT=y
506
507#
508# Watchdog Device Drivers
509#
510# CONFIG_SOFT_WATCHDOG is not set
511
512#
513# USB-based Watchdog Cards
514#
515# CONFIG_USBPCWATCHDOG is not set
516CONFIG_HW_RANDOM=y
517# CONFIG_NVRAM is not set
518# CONFIG_DTLK is not set
519# CONFIG_R3964 is not set
520
521#
522# Ftape, the floppy tape device driver
523#
524# CONFIG_RAW_DRIVER is not set
525
526#
527# TPM devices
528#
529# CONFIG_TCG_TPM is not set
530
531#
532# I2C support
533#
534# CONFIG_I2C is not set
535
536#
537# SPI support
538#
539# CONFIG_SPI is not set
540# CONFIG_SPI_MASTER is not set
541
542#
543# Dallas's 1-wire bus
544#
545# CONFIG_W1 is not set
546
547#
548# Hardware Monitoring support
549#
550# CONFIG_HWMON is not set
551# CONFIG_HWMON_VID is not set
552
553#
554# Misc devices
555#
556# CONFIG_TIFM_CORE is not set
557
558#
559# LED devices
560#
561# CONFIG_NEW_LEDS is not set
562
563#
564# LED drivers
565#
566
567#
568# LED Triggers
569#
570
571#
572# Multimedia devices
573#
574# CONFIG_VIDEO_DEV is not set
575
576#
577# Digital Video Broadcasting Devices
578#
579# CONFIG_DVB is not set
580# CONFIG_USB_DABUSB is not set
581
582#
583# Graphics support
584#
585# CONFIG_FIRMWARE_EDID is not set
586# CONFIG_FB is not set
587
588#
589# Console display driver support
590#
591# CONFIG_VGA_CONSOLE is not set
592CONFIG_DUMMY_CONSOLE=y
593# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
594
595#
596# Sound
597#
598# CONFIG_SOUND is not set
599
600#
601# USB support
602#
603CONFIG_USB_ARCH_HAS_HCD=y
604CONFIG_USB_ARCH_HAS_OHCI=y
605# CONFIG_USB_ARCH_HAS_EHCI is not set
606CONFIG_USB=y
607# CONFIG_USB_DEBUG is not set
608
609#
610# Miscellaneous USB options
611#
612CONFIG_USB_DEVICEFS=y
613# CONFIG_USB_BANDWIDTH is not set
614# CONFIG_USB_DYNAMIC_MINORS is not set
615# CONFIG_USB_OTG is not set
616
617#
618# USB Host Controller Drivers
619#
620# CONFIG_USB_ISP116X_HCD is not set
621CONFIG_USB_OHCI_HCD=y
622# CONFIG_USB_OHCI_BIG_ENDIAN is not set
623CONFIG_USB_OHCI_LITTLE_ENDIAN=y
624# CONFIG_USB_SL811_HCD is not set
625
626#
627# USB Device Class drivers
628#
629# CONFIG_USB_ACM is not set
630# CONFIG_USB_PRINTER is not set
631
632#
633# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
634#
635
636#
637# may also be needed; see USB_STORAGE Help for more information
638#
639CONFIG_USB_STORAGE=y
640CONFIG_USB_STORAGE_DEBUG=y
641# CONFIG_USB_STORAGE_DATAFAB is not set
642# CONFIG_USB_STORAGE_FREECOM is not set
643# CONFIG_USB_STORAGE_DPCM is not set
644# CONFIG_USB_STORAGE_USBAT is not set
645# CONFIG_USB_STORAGE_SDDR09 is not set
646# CONFIG_USB_STORAGE_SDDR55 is not set
647# CONFIG_USB_STORAGE_JUMPSHOT is not set
648# CONFIG_USB_STORAGE_ALAUDA is not set
649# CONFIG_USB_STORAGE_KARMA is not set
650# CONFIG_USB_LIBUSUAL is not set
651
652#
653# USB Input Devices
654#
655# CONFIG_USB_HID is not set
656
657#
658# USB HID Boot Protocol drivers
659#
660# CONFIG_USB_KBD is not set
661# CONFIG_USB_MOUSE is not set
662# CONFIG_USB_AIPTEK is not set
663# CONFIG_USB_WACOM is not set
664# CONFIG_USB_ACECAD is not set
665# CONFIG_USB_KBTAB is not set
666# CONFIG_USB_POWERMATE is not set
667# CONFIG_USB_TOUCHSCREEN is not set
668# CONFIG_USB_YEALINK is not set
669# CONFIG_USB_XPAD is not set
670# CONFIG_USB_ATI_REMOTE is not set
671# CONFIG_USB_ATI_REMOTE2 is not set
672# CONFIG_USB_KEYSPAN_REMOTE is not set
673# CONFIG_USB_APPLETOUCH is not set
674
675#
676# USB Imaging devices
677#
678# CONFIG_USB_MDC800 is not set
679# CONFIG_USB_MICROTEK is not set
680
681#
682# USB Network Adapters
683#
684# CONFIG_USB_CATC is not set
685# CONFIG_USB_KAWETH is not set
686# CONFIG_USB_PEGASUS is not set
687# CONFIG_USB_RTL8150 is not set
688# CONFIG_USB_USBNET_MII is not set
689# CONFIG_USB_USBNET is not set
690CONFIG_USB_MON=y
691
692#
693# USB port drivers
694#
695
696#
697# USB Serial Converter support
698#
699# CONFIG_USB_SERIAL is not set
700
701#
702# USB Miscellaneous drivers
703#
704# CONFIG_USB_EMI62 is not set
705# CONFIG_USB_EMI26 is not set
706# CONFIG_USB_ADUTUX is not set
707# CONFIG_USB_AUERSWALD is not set
708# CONFIG_USB_RIO500 is not set
709# CONFIG_USB_LEGOTOWER is not set
710# CONFIG_USB_LCD is not set
711# CONFIG_USB_LED is not set
712# CONFIG_USB_CYPRESS_CY7C63 is not set
713# CONFIG_USB_CYTHERM is not set
714# CONFIG_USB_PHIDGET is not set
715# CONFIG_USB_IDMOUSE is not set
716# CONFIG_USB_FTDI_ELAN is not set
717# CONFIG_USB_APPLEDISPLAY is not set
718# CONFIG_USB_LD is not set
719# CONFIG_USB_TRANCEVIBRATOR is not set
720# CONFIG_USB_TEST is not set
721
722#
723# USB DSL modem support
724#
725
726#
727# USB Gadget Support
728#
729CONFIG_USB_GADGET=y
730# CONFIG_USB_GADGET_DEBUG_FILES is not set
731CONFIG_USB_GADGET_SELECTED=y
732# CONFIG_USB_GADGET_NET2280 is not set
733# CONFIG_USB_GADGET_PXA2XX is not set
734# CONFIG_USB_GADGET_GOKU is not set
735# CONFIG_USB_GADGET_LH7A40X is not set
736# CONFIG_USB_GADGET_OMAP is not set
737CONFIG_USB_GADGET_AT91=y
738CONFIG_USB_AT91=y
739# CONFIG_USB_GADGET_DUMMY_HCD is not set
740# CONFIG_USB_GADGET_DUALSPEED is not set
741CONFIG_USB_ZERO=m
742# CONFIG_USB_ETH is not set
743CONFIG_USB_GADGETFS=m
744CONFIG_USB_FILE_STORAGE=m
745# CONFIG_USB_FILE_STORAGE_TEST is not set
746CONFIG_USB_G_SERIAL=m
747# CONFIG_USB_MIDI_GADGET is not set
748
749#
750# MMC/SD Card support
751#
752# CONFIG_MMC is not set
753
754#
755# Real Time Clock
756#
757CONFIG_RTC_LIB=y
758# CONFIG_RTC_CLASS is not set
759
760#
761# File systems
762#
763CONFIG_EXT2_FS=y
764# CONFIG_EXT2_FS_XATTR is not set
765# CONFIG_EXT2_FS_XIP is not set
766# CONFIG_EXT3_FS is not set
767# CONFIG_EXT4DEV_FS is not set
768# CONFIG_REISERFS_FS is not set
769# CONFIG_JFS_FS is not set
770# CONFIG_FS_POSIX_ACL is not set
771# CONFIG_XFS_FS is not set
772# CONFIG_GFS2_FS is not set
773# CONFIG_OCFS2_FS is not set
774# CONFIG_MINIX_FS is not set
775# CONFIG_ROMFS_FS is not set
776CONFIG_INOTIFY=y
777CONFIG_INOTIFY_USER=y
778# CONFIG_QUOTA is not set
779CONFIG_DNOTIFY=y
780# CONFIG_AUTOFS_FS is not set
781# CONFIG_AUTOFS4_FS is not set
782# CONFIG_FUSE_FS is not set
783
784#
785# CD-ROM/DVD Filesystems
786#
787# CONFIG_ISO9660_FS is not set
788# CONFIG_UDF_FS is not set
789
790#
791# DOS/FAT/NT Filesystems
792#
793CONFIG_FAT_FS=y
794# CONFIG_MSDOS_FS is not set
795CONFIG_VFAT_FS=y
796CONFIG_FAT_DEFAULT_CODEPAGE=437
797CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
798# CONFIG_NTFS_FS is not set
799
800#
801# Pseudo filesystems
802#
803CONFIG_PROC_FS=y
804CONFIG_PROC_SYSCTL=y
805CONFIG_SYSFS=y
806CONFIG_TMPFS=y
807# CONFIG_TMPFS_POSIX_ACL is not set
808# CONFIG_HUGETLB_PAGE is not set
809CONFIG_RAMFS=y
810# CONFIG_CONFIGFS_FS is not set
811
812#
813# Miscellaneous filesystems
814#
815# CONFIG_ADFS_FS is not set
816# CONFIG_AFFS_FS is not set
817# CONFIG_HFS_FS is not set
818# CONFIG_HFSPLUS_FS is not set
819# CONFIG_BEFS_FS is not set
820# CONFIG_BFS_FS is not set
821# CONFIG_EFS_FS is not set
822CONFIG_CRAMFS=y
823# CONFIG_VXFS_FS is not set
824# CONFIG_HPFS_FS is not set
825# CONFIG_QNX4FS_FS is not set
826# CONFIG_SYSV_FS is not set
827# CONFIG_UFS_FS is not set
828
829#
830# Network File Systems
831#
832# CONFIG_NFS_FS is not set
833# CONFIG_NFSD is not set
834# CONFIG_SMB_FS is not set
835# CONFIG_CIFS is not set
836# CONFIG_NCP_FS is not set
837# CONFIG_CODA_FS is not set
838# CONFIG_AFS_FS is not set
839# CONFIG_9P_FS is not set
840
841#
842# Partition Types
843#
844# CONFIG_PARTITION_ADVANCED is not set
845CONFIG_MSDOS_PARTITION=y
846
847#
848# Native Language Support
849#
850CONFIG_NLS=y
851CONFIG_NLS_DEFAULT="iso8859-1"
852CONFIG_NLS_CODEPAGE_437=y
853# CONFIG_NLS_CODEPAGE_737 is not set
854# CONFIG_NLS_CODEPAGE_775 is not set
855CONFIG_NLS_CODEPAGE_850=y
856# CONFIG_NLS_CODEPAGE_852 is not set
857# CONFIG_NLS_CODEPAGE_855 is not set
858# CONFIG_NLS_CODEPAGE_857 is not set
859# CONFIG_NLS_CODEPAGE_860 is not set
860# CONFIG_NLS_CODEPAGE_861 is not set
861# CONFIG_NLS_CODEPAGE_862 is not set
862# CONFIG_NLS_CODEPAGE_863 is not set
863# CONFIG_NLS_CODEPAGE_864 is not set
864# CONFIG_NLS_CODEPAGE_865 is not set
865# CONFIG_NLS_CODEPAGE_866 is not set
866# CONFIG_NLS_CODEPAGE_869 is not set
867# CONFIG_NLS_CODEPAGE_936 is not set
868# CONFIG_NLS_CODEPAGE_950 is not set
869# CONFIG_NLS_CODEPAGE_932 is not set
870# CONFIG_NLS_CODEPAGE_949 is not set
871# CONFIG_NLS_CODEPAGE_874 is not set
872# CONFIG_NLS_ISO8859_8 is not set
873# CONFIG_NLS_CODEPAGE_1250 is not set
874# CONFIG_NLS_CODEPAGE_1251 is not set
875# CONFIG_NLS_ASCII is not set
876CONFIG_NLS_ISO8859_1=y
877# CONFIG_NLS_ISO8859_2 is not set
878# CONFIG_NLS_ISO8859_3 is not set
879# CONFIG_NLS_ISO8859_4 is not set
880# CONFIG_NLS_ISO8859_5 is not set
881# CONFIG_NLS_ISO8859_6 is not set
882# CONFIG_NLS_ISO8859_7 is not set
883# CONFIG_NLS_ISO8859_9 is not set
884# CONFIG_NLS_ISO8859_13 is not set
885# CONFIG_NLS_ISO8859_14 is not set
886# CONFIG_NLS_ISO8859_15 is not set
887# CONFIG_NLS_KOI8_R is not set
888# CONFIG_NLS_KOI8_U is not set
889# CONFIG_NLS_UTF8 is not set
890
891#
892# Profiling support
893#
894# CONFIG_PROFILING is not set
895
896#
897# Kernel hacking
898#
899# CONFIG_PRINTK_TIME is not set
900CONFIG_ENABLE_MUST_CHECK=y
901# CONFIG_MAGIC_SYSRQ is not set
902# CONFIG_UNUSED_SYMBOLS is not set
903CONFIG_DEBUG_KERNEL=y
904CONFIG_LOG_BUF_SHIFT=14
905CONFIG_DETECT_SOFTLOCKUP=y
906# CONFIG_SCHEDSTATS is not set
907# CONFIG_DEBUG_SLAB is not set
908# CONFIG_DEBUG_RT_MUTEXES is not set
909# CONFIG_RT_MUTEX_TESTER is not set
910# CONFIG_DEBUG_SPINLOCK is not set
911# CONFIG_DEBUG_MUTEXES is not set
912# CONFIG_DEBUG_RWSEMS is not set
913# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
914# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
915# CONFIG_DEBUG_KOBJECT is not set
916CONFIG_DEBUG_BUGVERBOSE=y
917# CONFIG_DEBUG_INFO is not set
918# CONFIG_DEBUG_FS is not set
919# CONFIG_DEBUG_VM is not set
920# CONFIG_DEBUG_LIST is not set
921CONFIG_FRAME_POINTER=y
922CONFIG_FORCED_INLINING=y
923# CONFIG_HEADERS_CHECK is not set
924# CONFIG_RCU_TORTURE_TEST is not set
925CONFIG_DEBUG_USER=y
926# CONFIG_DEBUG_WAITQ is not set
927# CONFIG_DEBUG_ERRORS is not set
928CONFIG_DEBUG_LL=y
929# CONFIG_DEBUG_ICEDCC is not set
930
931#
932# Security options
933#
934# CONFIG_KEYS is not set
935# CONFIG_SECURITY is not set
936
937#
938# Cryptographic options
939#
940# CONFIG_CRYPTO is not set
941
942#
943# Library routines
944#
945# CONFIG_CRC_CCITT is not set
946# CONFIG_CRC16 is not set
947CONFIG_CRC32=y
948# CONFIG_LIBCRC32C is not set
949CONFIG_ZLIB_INFLATE=y
950CONFIG_PLIST=y
diff --git a/arch/arm/configs/at91sam9261ek_defconfig b/arch/arm/configs/at91sam9261ek_defconfig
new file mode 100644
index 000000000000..784ad7c0186d
--- /dev/null
+++ b/arch/arm/configs/at91sam9261ek_defconfig
@@ -0,0 +1,1106 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.19-rc6
4# Fri Nov 17 18:00:38 2006
5#
6CONFIG_ARM=y
7# CONFIG_GENERIC_TIME is not set
8CONFIG_MMU=y
9CONFIG_GENERIC_HARDIRQS=y
10CONFIG_TRACE_IRQFLAGS_SUPPORT=y
11CONFIG_HARDIRQS_SW_RESEND=y
12CONFIG_GENERIC_IRQ_PROBE=y
13CONFIG_RWSEM_GENERIC_SPINLOCK=y
14CONFIG_GENERIC_HWEIGHT=y
15CONFIG_GENERIC_CALIBRATE_DELAY=y
16CONFIG_VECTORS_BASE=0xffff0000
17CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
18
19#
20# Code maturity level options
21#
22CONFIG_EXPERIMENTAL=y
23CONFIG_BROKEN_ON_SMP=y
24CONFIG_INIT_ENV_ARG_LIMIT=32
25
26#
27# General setup
28#
29CONFIG_LOCALVERSION=""
30# CONFIG_LOCALVERSION_AUTO is not set
31# CONFIG_SWAP is not set
32CONFIG_SYSVIPC=y
33# CONFIG_IPC_NS is not set
34# CONFIG_POSIX_MQUEUE is not set
35# CONFIG_BSD_PROCESS_ACCT is not set
36# CONFIG_TASKSTATS is not set
37# CONFIG_UTS_NS is not set
38# CONFIG_AUDIT is not set
39# CONFIG_IKCONFIG is not set
40# CONFIG_RELAY is not set
41CONFIG_INITRAMFS_SOURCE=""
42CONFIG_CC_OPTIMIZE_FOR_SIZE=y
43CONFIG_SYSCTL=y
44# CONFIG_EMBEDDED is not set
45CONFIG_UID16=y
46CONFIG_SYSCTL_SYSCALL=y
47CONFIG_KALLSYMS=y
48# CONFIG_KALLSYMS_ALL is not set
49# CONFIG_KALLSYMS_EXTRA_PASS is not set
50CONFIG_HOTPLUG=y
51CONFIG_PRINTK=y
52CONFIG_BUG=y
53CONFIG_ELF_CORE=y
54CONFIG_BASE_FULL=y
55CONFIG_FUTEX=y
56CONFIG_EPOLL=y
57CONFIG_SHMEM=y
58CONFIG_SLAB=y
59CONFIG_VM_EVENT_COUNTERS=y
60CONFIG_RT_MUTEXES=y
61# CONFIG_TINY_SHMEM is not set
62CONFIG_BASE_SMALL=0
63# CONFIG_SLOB is not set
64
65#
66# Loadable module support
67#
68CONFIG_MODULES=y
69CONFIG_MODULE_UNLOAD=y
70# CONFIG_MODULE_FORCE_UNLOAD is not set
71# CONFIG_MODVERSIONS is not set
72# CONFIG_MODULE_SRCVERSION_ALL is not set
73CONFIG_KMOD=y
74
75#
76# Block layer
77#
78CONFIG_BLOCK=y
79# CONFIG_BLK_DEV_IO_TRACE is not set
80
81#
82# IO Schedulers
83#
84CONFIG_IOSCHED_NOOP=y
85CONFIG_IOSCHED_AS=y
86# CONFIG_IOSCHED_DEADLINE is not set
87# CONFIG_IOSCHED_CFQ is not set
88CONFIG_DEFAULT_AS=y
89# CONFIG_DEFAULT_DEADLINE is not set
90# CONFIG_DEFAULT_CFQ is not set
91# CONFIG_DEFAULT_NOOP is not set
92CONFIG_DEFAULT_IOSCHED="anticipatory"
93
94#
95# System Type
96#
97# CONFIG_ARCH_AAEC2000 is not set
98# CONFIG_ARCH_INTEGRATOR is not set
99# CONFIG_ARCH_REALVIEW is not set
100# CONFIG_ARCH_VERSATILE is not set
101CONFIG_ARCH_AT91=y
102# CONFIG_ARCH_CLPS7500 is not set
103# CONFIG_ARCH_CLPS711X is not set
104# CONFIG_ARCH_CO285 is not set
105# CONFIG_ARCH_EBSA110 is not set
106# CONFIG_ARCH_EP93XX is not set
107# CONFIG_ARCH_FOOTBRIDGE is not set
108# CONFIG_ARCH_NETX is not set
109# CONFIG_ARCH_H720X is not set
110# CONFIG_ARCH_IMX is not set
111# CONFIG_ARCH_IOP32X is not set
112# CONFIG_ARCH_IOP33X is not set
113# CONFIG_ARCH_IXP4XX is not set
114# CONFIG_ARCH_IXP2000 is not set
115# CONFIG_ARCH_IXP23XX is not set
116# CONFIG_ARCH_L7200 is not set
117# CONFIG_ARCH_PNX4008 is not set
118# CONFIG_ARCH_PXA is not set
119# CONFIG_ARCH_RPC is not set
120# CONFIG_ARCH_SA1100 is not set
121# CONFIG_ARCH_S3C2410 is not set
122# CONFIG_ARCH_SHARK is not set
123# CONFIG_ARCH_LH7A40X is not set
124# CONFIG_ARCH_OMAP is not set
125
126#
127# Atmel AT91 System-on-Chip
128#
129# CONFIG_ARCH_AT91RM9200 is not set
130# CONFIG_ARCH_AT91SAM9260 is not set
131CONFIG_ARCH_AT91SAM9261=y
132
133#
134# AT91SAM9261 Board Type
135#
136CONFIG_MACH_AT91SAM9261EK=y
137
138#
139# AT91 Board Options
140#
141# CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set
142
143#
144# AT91 Feature Selections
145#
146# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
147
148#
149# Processor Type
150#
151CONFIG_CPU_32=y
152CONFIG_CPU_ARM926T=y
153CONFIG_CPU_32v5=y
154CONFIG_CPU_ABRT_EV5TJ=y
155CONFIG_CPU_CACHE_VIVT=y
156CONFIG_CPU_COPY_V4WB=y
157CONFIG_CPU_TLB_V4WBI=y
158CONFIG_CPU_CP15=y
159CONFIG_CPU_CP15_MMU=y
160
161#
162# Processor Features
163#
164# CONFIG_ARM_THUMB is not set
165# CONFIG_CPU_ICACHE_DISABLE is not set
166# CONFIG_CPU_DCACHE_DISABLE is not set
167# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
168# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
169
170#
171# Bus support
172#
173
174#
175# PCCARD (PCMCIA/CardBus) support
176#
177# CONFIG_PCCARD is not set
178
179#
180# Kernel Features
181#
182# CONFIG_PREEMPT is not set
183# CONFIG_NO_IDLE_HZ is not set
184CONFIG_HZ=100
185# CONFIG_AEABI is not set
186# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
187CONFIG_SELECT_MEMORY_MODEL=y
188CONFIG_FLATMEM_MANUAL=y
189# CONFIG_DISCONTIGMEM_MANUAL is not set
190# CONFIG_SPARSEMEM_MANUAL is not set
191CONFIG_FLATMEM=y
192CONFIG_FLAT_NODE_MEM_MAP=y
193# CONFIG_SPARSEMEM_STATIC is not set
194CONFIG_SPLIT_PTLOCK_CPUS=4096
195# CONFIG_RESOURCES_64BIT is not set
196# CONFIG_LEDS is not set
197CONFIG_ALIGNMENT_TRAP=y
198
199#
200# Boot options
201#
202CONFIG_ZBOOT_ROM_TEXT=0x0
203CONFIG_ZBOOT_ROM_BSS=0x0
204CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
205# CONFIG_XIP_KERNEL is not set
206
207#
208# Floating point emulation
209#
210
211#
212# At least one emulation must be selected
213#
214CONFIG_FPE_NWFPE=y
215# CONFIG_FPE_NWFPE_XP is not set
216# CONFIG_FPE_FASTFPE is not set
217# CONFIG_VFP is not set
218
219#
220# Userspace binary formats
221#
222CONFIG_BINFMT_ELF=y
223# CONFIG_BINFMT_AOUT is not set
224# CONFIG_BINFMT_MISC is not set
225# CONFIG_ARTHUR is not set
226
227#
228# Power management options
229#
230# CONFIG_PM is not set
231# CONFIG_APM is not set
232
233#
234# Networking
235#
236CONFIG_NET=y
237
238#
239# Networking options
240#
241# CONFIG_NETDEBUG is not set
242CONFIG_PACKET=y
243# CONFIG_PACKET_MMAP is not set
244CONFIG_UNIX=y
245CONFIG_XFRM=y
246# CONFIG_XFRM_USER is not set
247# CONFIG_XFRM_SUB_POLICY is not set
248# CONFIG_NET_KEY is not set
249CONFIG_INET=y
250# CONFIG_IP_MULTICAST is not set
251# CONFIG_IP_ADVANCED_ROUTER is not set
252CONFIG_IP_FIB_HASH=y
253CONFIG_IP_PNP=y
254# CONFIG_IP_PNP_DHCP is not set
255CONFIG_IP_PNP_BOOTP=y
256# CONFIG_IP_PNP_RARP is not set
257# CONFIG_NET_IPIP is not set
258# CONFIG_NET_IPGRE is not set
259# CONFIG_ARPD is not set
260# CONFIG_SYN_COOKIES is not set
261# CONFIG_INET_AH is not set
262# CONFIG_INET_ESP is not set
263# CONFIG_INET_IPCOMP is not set
264# CONFIG_INET_XFRM_TUNNEL is not set
265# CONFIG_INET_TUNNEL is not set
266CONFIG_INET_XFRM_MODE_TRANSPORT=y
267CONFIG_INET_XFRM_MODE_TUNNEL=y
268CONFIG_INET_XFRM_MODE_BEET=y
269CONFIG_INET_DIAG=y
270CONFIG_INET_TCP_DIAG=y
271# CONFIG_TCP_CONG_ADVANCED is not set
272CONFIG_TCP_CONG_CUBIC=y
273CONFIG_DEFAULT_TCP_CONG="cubic"
274# CONFIG_IPV6 is not set
275# CONFIG_INET6_XFRM_TUNNEL is not set
276# CONFIG_INET6_TUNNEL is not set
277# CONFIG_NETWORK_SECMARK is not set
278# CONFIG_NETFILTER is not set
279
280#
281# DCCP Configuration (EXPERIMENTAL)
282#
283# CONFIG_IP_DCCP is not set
284
285#
286# SCTP Configuration (EXPERIMENTAL)
287#
288# CONFIG_IP_SCTP is not set
289
290#
291# TIPC Configuration (EXPERIMENTAL)
292#
293# CONFIG_TIPC is not set
294# CONFIG_ATM is not set
295# CONFIG_BRIDGE is not set
296# CONFIG_VLAN_8021Q is not set
297# CONFIG_DECNET is not set
298# CONFIG_LLC2 is not set
299# CONFIG_IPX is not set
300# CONFIG_ATALK is not set
301# CONFIG_X25 is not set
302# CONFIG_LAPB is not set
303# CONFIG_ECONET is not set
304# CONFIG_WAN_ROUTER is not set
305
306#
307# QoS and/or fair queueing
308#
309# CONFIG_NET_SCHED is not set
310
311#
312# Network testing
313#
314# CONFIG_NET_PKTGEN is not set
315# CONFIG_HAMRADIO is not set
316# CONFIG_IRDA is not set
317# CONFIG_BT is not set
318# CONFIG_IEEE80211 is not set
319
320#
321# Device Drivers
322#
323
324#
325# Generic Driver Options
326#
327CONFIG_STANDALONE=y
328CONFIG_PREVENT_FIRMWARE_BUILD=y
329# CONFIG_FW_LOADER is not set
330# CONFIG_DEBUG_DRIVER is not set
331# CONFIG_SYS_HYPERVISOR is not set
332
333#
334# Connector - unified userspace <-> kernelspace linker
335#
336# CONFIG_CONNECTOR is not set
337
338#
339# Memory Technology Devices (MTD)
340#
341CONFIG_MTD=y
342# CONFIG_MTD_DEBUG is not set
343# CONFIG_MTD_CONCAT is not set
344CONFIG_MTD_PARTITIONS=y
345# CONFIG_MTD_REDBOOT_PARTS is not set
346CONFIG_MTD_CMDLINE_PARTS=y
347# CONFIG_MTD_AFS_PARTS is not set
348
349#
350# User Modules And Translation Layers
351#
352# CONFIG_MTD_CHAR is not set
353CONFIG_MTD_BLOCK=y
354# CONFIG_FTL is not set
355# CONFIG_NFTL is not set
356# CONFIG_INFTL is not set
357# CONFIG_RFD_FTL is not set
358# CONFIG_SSFDC is not set
359
360#
361# RAM/ROM/Flash chip drivers
362#
363# CONFIG_MTD_CFI is not set
364# CONFIG_MTD_JEDECPROBE is not set
365CONFIG_MTD_MAP_BANK_WIDTH_1=y
366CONFIG_MTD_MAP_BANK_WIDTH_2=y
367CONFIG_MTD_MAP_BANK_WIDTH_4=y
368# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
369# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
370# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
371CONFIG_MTD_CFI_I1=y
372CONFIG_MTD_CFI_I2=y
373# CONFIG_MTD_CFI_I4 is not set
374# CONFIG_MTD_CFI_I8 is not set
375# CONFIG_MTD_RAM is not set
376# CONFIG_MTD_ROM is not set
377# CONFIG_MTD_ABSENT is not set
378# CONFIG_MTD_OBSOLETE_CHIPS is not set
379
380#
381# Mapping drivers for chip access
382#
383# CONFIG_MTD_COMPLEX_MAPPINGS is not set
384# CONFIG_MTD_PLATRAM is not set
385
386#
387# Self-contained MTD device drivers
388#
389# CONFIG_MTD_SLRAM is not set
390# CONFIG_MTD_PHRAM is not set
391# CONFIG_MTD_MTDRAM is not set
392# CONFIG_MTD_BLOCK2MTD is not set
393
394#
395# Disk-On-Chip Device Drivers
396#
397# CONFIG_MTD_DOC2000 is not set
398# CONFIG_MTD_DOC2001 is not set
399# CONFIG_MTD_DOC2001PLUS is not set
400
401#
402# NAND Flash Device Drivers
403#
404CONFIG_MTD_NAND=y
405# CONFIG_MTD_NAND_VERIFY_WRITE is not set
406# CONFIG_MTD_NAND_ECC_SMC is not set
407CONFIG_MTD_NAND_IDS=y
408# CONFIG_MTD_NAND_DISKONCHIP is not set
409CONFIG_MTD_NAND_AT91=y
410# CONFIG_MTD_NAND_NANDSIM is not set
411
412#
413# OneNAND Flash Device Drivers
414#
415# CONFIG_MTD_ONENAND is not set
416
417#
418# Parallel port support
419#
420# CONFIG_PARPORT is not set
421
422#
423# Plug and Play support
424#
425
426#
427# Block devices
428#
429# CONFIG_BLK_DEV_COW_COMMON is not set
430# CONFIG_BLK_DEV_LOOP is not set
431# CONFIG_BLK_DEV_NBD is not set
432# CONFIG_BLK_DEV_UB is not set
433CONFIG_BLK_DEV_RAM=y
434CONFIG_BLK_DEV_RAM_COUNT=16
435CONFIG_BLK_DEV_RAM_SIZE=8192
436CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
437CONFIG_BLK_DEV_INITRD=y
438# CONFIG_CDROM_PKTCDVD is not set
439# CONFIG_ATA_OVER_ETH is not set
440
441#
442# SCSI device support
443#
444# CONFIG_RAID_ATTRS is not set
445CONFIG_SCSI=y
446# CONFIG_SCSI_NETLINK is not set
447CONFIG_SCSI_PROC_FS=y
448
449#
450# SCSI support type (disk, tape, CD-ROM)
451#
452CONFIG_BLK_DEV_SD=y
453# CONFIG_CHR_DEV_ST is not set
454# CONFIG_CHR_DEV_OSST is not set
455# CONFIG_BLK_DEV_SR is not set
456# CONFIG_CHR_DEV_SG is not set
457# CONFIG_CHR_DEV_SCH is not set
458
459#
460# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
461#
462CONFIG_SCSI_MULTI_LUN=y
463# CONFIG_SCSI_CONSTANTS is not set
464# CONFIG_SCSI_LOGGING is not set
465
466#
467# SCSI Transports
468#
469# CONFIG_SCSI_SPI_ATTRS is not set
470# CONFIG_SCSI_FC_ATTRS is not set
471# CONFIG_SCSI_ISCSI_ATTRS is not set
472# CONFIG_SCSI_SAS_ATTRS is not set
473# CONFIG_SCSI_SAS_LIBSAS is not set
474
475#
476# SCSI low-level drivers
477#
478# CONFIG_ISCSI_TCP is not set
479# CONFIG_SCSI_DEBUG is not set
480
481#
482# Multi-device support (RAID and LVM)
483#
484# CONFIG_MD is not set
485
486#
487# Fusion MPT device support
488#
489# CONFIG_FUSION is not set
490
491#
492# IEEE 1394 (FireWire) support
493#
494
495#
496# I2O device support
497#
498
499#
500# Network device support
501#
502CONFIG_NETDEVICES=y
503# CONFIG_DUMMY is not set
504# CONFIG_BONDING is not set
505# CONFIG_EQUALIZER is not set
506# CONFIG_TUN is not set
507
508#
509# PHY device support
510#
511# CONFIG_PHYLIB is not set
512
513#
514# Ethernet (10 or 100Mbit)
515#
516CONFIG_NET_ETHERNET=y
517CONFIG_MII=y
518# CONFIG_SMC91X is not set
519CONFIG_DM9000=y
520
521#
522# Ethernet (1000 Mbit)
523#
524
525#
526# Ethernet (10000 Mbit)
527#
528
529#
530# Token Ring devices
531#
532
533#
534# Wireless LAN (non-hamradio)
535#
536# CONFIG_NET_RADIO is not set
537
538#
539# Wan interfaces
540#
541# CONFIG_WAN is not set
542# CONFIG_PPP is not set
543# CONFIG_SLIP is not set
544# CONFIG_SHAPER is not set
545# CONFIG_NETCONSOLE is not set
546# CONFIG_NETPOLL is not set
547# CONFIG_NET_POLL_CONTROLLER is not set
548
549#
550# ISDN subsystem
551#
552# CONFIG_ISDN is not set
553
554#
555# Input device support
556#
557CONFIG_INPUT=y
558# CONFIG_INPUT_FF_MEMLESS is not set
559
560#
561# Userland interfaces
562#
563CONFIG_INPUT_MOUSEDEV=y
564# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
565CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
566CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
567# CONFIG_INPUT_JOYDEV is not set
568# CONFIG_INPUT_TSDEV is not set
569# CONFIG_INPUT_EVDEV is not set
570# CONFIG_INPUT_EVBUG is not set
571
572#
573# Input Device Drivers
574#
575# CONFIG_INPUT_KEYBOARD is not set
576# CONFIG_INPUT_MOUSE is not set
577# CONFIG_INPUT_JOYSTICK is not set
578# CONFIG_INPUT_TOUCHSCREEN is not set
579# CONFIG_INPUT_MISC is not set
580
581#
582# Hardware I/O ports
583#
584# CONFIG_SERIO is not set
585# CONFIG_GAMEPORT is not set
586
587#
588# Character devices
589#
590CONFIG_VT=y
591CONFIG_VT_CONSOLE=y
592CONFIG_HW_CONSOLE=y
593# CONFIG_VT_HW_CONSOLE_BINDING is not set
594# CONFIG_SERIAL_NONSTANDARD is not set
595
596#
597# Serial drivers
598#
599# CONFIG_SERIAL_8250 is not set
600
601#
602# Non-8250 serial port support
603#
604CONFIG_SERIAL_ATMEL=y
605CONFIG_SERIAL_ATMEL_CONSOLE=y
606# CONFIG_SERIAL_ATMEL_TTYAT is not set
607CONFIG_SERIAL_CORE=y
608CONFIG_SERIAL_CORE_CONSOLE=y
609CONFIG_UNIX98_PTYS=y
610CONFIG_LEGACY_PTYS=y
611CONFIG_LEGACY_PTY_COUNT=256
612
613#
614# IPMI
615#
616# CONFIG_IPMI_HANDLER is not set
617
618#
619# Watchdog Cards
620#
621CONFIG_WATCHDOG=y
622CONFIG_WATCHDOG_NOWAYOUT=y
623
624#
625# Watchdog Device Drivers
626#
627# CONFIG_SOFT_WATCHDOG is not set
628
629#
630# USB-based Watchdog Cards
631#
632# CONFIG_USBPCWATCHDOG is not set
633CONFIG_HW_RANDOM=y
634# CONFIG_NVRAM is not set
635# CONFIG_DTLK is not set
636# CONFIG_R3964 is not set
637
638#
639# Ftape, the floppy tape device driver
640#
641# CONFIG_RAW_DRIVER is not set
642
643#
644# TPM devices
645#
646# CONFIG_TCG_TPM is not set
647
648#
649# I2C support
650#
651CONFIG_I2C=y
652CONFIG_I2C_CHARDEV=y
653
654#
655# I2C Algorithms
656#
657# CONFIG_I2C_ALGOBIT is not set
658# CONFIG_I2C_ALGOPCF is not set
659# CONFIG_I2C_ALGOPCA is not set
660
661#
662# I2C Hardware Bus support
663#
664CONFIG_I2C_AT91=y
665# CONFIG_I2C_OCORES is not set
666# CONFIG_I2C_PARPORT_LIGHT is not set
667# CONFIG_I2C_STUB is not set
668# CONFIG_I2C_PCA is not set
669# CONFIG_I2C_PCA_ISA is not set
670
671#
672# Miscellaneous I2C Chip support
673#
674# CONFIG_SENSORS_DS1337 is not set
675# CONFIG_SENSORS_DS1374 is not set
676# CONFIG_SENSORS_EEPROM is not set
677# CONFIG_SENSORS_PCF8574 is not set
678# CONFIG_SENSORS_PCA9539 is not set
679# CONFIG_SENSORS_PCF8591 is not set
680# CONFIG_SENSORS_MAX6875 is not set
681# CONFIG_I2C_DEBUG_CORE is not set
682# CONFIG_I2C_DEBUG_ALGO is not set
683# CONFIG_I2C_DEBUG_BUS is not set
684# CONFIG_I2C_DEBUG_CHIP is not set
685
686#
687# SPI support
688#
689# CONFIG_SPI is not set
690# CONFIG_SPI_MASTER is not set
691
692#
693# Dallas's 1-wire bus
694#
695# CONFIG_W1 is not set
696
697#
698# Hardware Monitoring support
699#
700# CONFIG_HWMON is not set
701# CONFIG_HWMON_VID is not set
702
703#
704# Misc devices
705#
706# CONFIG_TIFM_CORE is not set
707
708#
709# LED devices
710#
711# CONFIG_NEW_LEDS is not set
712
713#
714# LED drivers
715#
716
717#
718# LED Triggers
719#
720
721#
722# Multimedia devices
723#
724# CONFIG_VIDEO_DEV is not set
725
726#
727# Digital Video Broadcasting Devices
728#
729# CONFIG_DVB is not set
730# CONFIG_USB_DABUSB is not set
731
732#
733# Graphics support
734#
735# CONFIG_FIRMWARE_EDID is not set
736# CONFIG_FB is not set
737
738#
739# Console display driver support
740#
741# CONFIG_VGA_CONSOLE is not set
742CONFIG_DUMMY_CONSOLE=y
743# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
744
745#
746# Sound
747#
748# CONFIG_SOUND is not set
749
750#
751# USB support
752#
753CONFIG_USB_ARCH_HAS_HCD=y
754CONFIG_USB_ARCH_HAS_OHCI=y
755# CONFIG_USB_ARCH_HAS_EHCI is not set
756CONFIG_USB=y
757# CONFIG_USB_DEBUG is not set
758
759#
760# Miscellaneous USB options
761#
762CONFIG_USB_DEVICEFS=y
763# CONFIG_USB_BANDWIDTH is not set
764# CONFIG_USB_DYNAMIC_MINORS is not set
765# CONFIG_USB_OTG is not set
766
767#
768# USB Host Controller Drivers
769#
770# CONFIG_USB_ISP116X_HCD is not set
771CONFIG_USB_OHCI_HCD=y
772# CONFIG_USB_OHCI_BIG_ENDIAN is not set
773CONFIG_USB_OHCI_LITTLE_ENDIAN=y
774# CONFIG_USB_SL811_HCD is not set
775
776#
777# USB Device Class drivers
778#
779# CONFIG_USB_ACM is not set
780# CONFIG_USB_PRINTER is not set
781
782#
783# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
784#
785
786#
787# may also be needed; see USB_STORAGE Help for more information
788#
789CONFIG_USB_STORAGE=y
790CONFIG_USB_STORAGE_DEBUG=y
791# CONFIG_USB_STORAGE_DATAFAB is not set
792# CONFIG_USB_STORAGE_FREECOM is not set
793# CONFIG_USB_STORAGE_DPCM is not set
794# CONFIG_USB_STORAGE_USBAT is not set
795# CONFIG_USB_STORAGE_SDDR09 is not set
796# CONFIG_USB_STORAGE_SDDR55 is not set
797# CONFIG_USB_STORAGE_JUMPSHOT is not set
798# CONFIG_USB_STORAGE_ALAUDA is not set
799# CONFIG_USB_STORAGE_KARMA is not set
800# CONFIG_USB_LIBUSUAL is not set
801
802#
803# USB Input Devices
804#
805# CONFIG_USB_HID is not set
806
807#
808# USB HID Boot Protocol drivers
809#
810# CONFIG_USB_KBD is not set
811# CONFIG_USB_MOUSE is not set
812# CONFIG_USB_AIPTEK is not set
813# CONFIG_USB_WACOM is not set
814# CONFIG_USB_ACECAD is not set
815# CONFIG_USB_KBTAB is not set
816# CONFIG_USB_POWERMATE is not set
817# CONFIG_USB_TOUCHSCREEN is not set
818# CONFIG_USB_YEALINK is not set
819# CONFIG_USB_XPAD is not set
820# CONFIG_USB_ATI_REMOTE is not set
821# CONFIG_USB_ATI_REMOTE2 is not set
822# CONFIG_USB_KEYSPAN_REMOTE is not set
823# CONFIG_USB_APPLETOUCH is not set
824
825#
826# USB Imaging devices
827#
828# CONFIG_USB_MDC800 is not set
829# CONFIG_USB_MICROTEK is not set
830
831#
832# USB Network Adapters
833#
834# CONFIG_USB_CATC is not set
835# CONFIG_USB_KAWETH is not set
836# CONFIG_USB_PEGASUS is not set
837# CONFIG_USB_RTL8150 is not set
838# CONFIG_USB_USBNET_MII is not set
839# CONFIG_USB_USBNET is not set
840CONFIG_USB_MON=y
841
842#
843# USB port drivers
844#
845
846#
847# USB Serial Converter support
848#
849# CONFIG_USB_SERIAL is not set
850
851#
852# USB Miscellaneous drivers
853#
854# CONFIG_USB_EMI62 is not set
855# CONFIG_USB_EMI26 is not set
856# CONFIG_USB_ADUTUX is not set
857# CONFIG_USB_AUERSWALD is not set
858# CONFIG_USB_RIO500 is not set
859# CONFIG_USB_LEGOTOWER is not set
860# CONFIG_USB_LCD is not set
861# CONFIG_USB_LED is not set
862# CONFIG_USB_CYPRESS_CY7C63 is not set
863# CONFIG_USB_CYTHERM is not set
864# CONFIG_USB_PHIDGET is not set
865# CONFIG_USB_IDMOUSE is not set
866# CONFIG_USB_FTDI_ELAN is not set
867# CONFIG_USB_APPLEDISPLAY is not set
868# CONFIG_USB_LD is not set
869# CONFIG_USB_TRANCEVIBRATOR is not set
870# CONFIG_USB_TEST is not set
871
872#
873# USB DSL modem support
874#
875
876#
877# USB Gadget Support
878#
879CONFIG_USB_GADGET=y
880# CONFIG_USB_GADGET_DEBUG_FILES is not set
881CONFIG_USB_GADGET_SELECTED=y
882# CONFIG_USB_GADGET_NET2280 is not set
883# CONFIG_USB_GADGET_PXA2XX is not set
884# CONFIG_USB_GADGET_GOKU is not set
885# CONFIG_USB_GADGET_LH7A40X is not set
886# CONFIG_USB_GADGET_OMAP is not set
887CONFIG_USB_GADGET_AT91=y
888CONFIG_USB_AT91=y
889# CONFIG_USB_GADGET_DUMMY_HCD is not set
890# CONFIG_USB_GADGET_DUALSPEED is not set
891CONFIG_USB_ZERO=m
892# CONFIG_USB_ETH is not set
893CONFIG_USB_GADGETFS=m
894CONFIG_USB_FILE_STORAGE=m
895# CONFIG_USB_FILE_STORAGE_TEST is not set
896CONFIG_USB_G_SERIAL=m
897# CONFIG_USB_MIDI_GADGET is not set
898
899#
900# MMC/SD Card support
901#
902CONFIG_MMC=y
903# CONFIG_MMC_DEBUG is not set
904CONFIG_MMC_BLOCK=y
905CONFIG_MMC_AT91=m
906# CONFIG_MMC_TIFM_SD is not set
907
908#
909# Real Time Clock
910#
911CONFIG_RTC_LIB=y
912# CONFIG_RTC_CLASS is not set
913
914#
915# File systems
916#
917CONFIG_EXT2_FS=y
918# CONFIG_EXT2_FS_XATTR is not set
919# CONFIG_EXT2_FS_XIP is not set
920# CONFIG_EXT3_FS is not set
921# CONFIG_EXT4DEV_FS is not set
922# CONFIG_REISERFS_FS is not set
923# CONFIG_JFS_FS is not set
924# CONFIG_FS_POSIX_ACL is not set
925# CONFIG_XFS_FS is not set
926# CONFIG_GFS2_FS is not set
927# CONFIG_OCFS2_FS is not set
928# CONFIG_MINIX_FS is not set
929# CONFIG_ROMFS_FS is not set
930CONFIG_INOTIFY=y
931CONFIG_INOTIFY_USER=y
932# CONFIG_QUOTA is not set
933CONFIG_DNOTIFY=y
934# CONFIG_AUTOFS_FS is not set
935# CONFIG_AUTOFS4_FS is not set
936# CONFIG_FUSE_FS is not set
937
938#
939# CD-ROM/DVD Filesystems
940#
941# CONFIG_ISO9660_FS is not set
942# CONFIG_UDF_FS is not set
943
944#
945# DOS/FAT/NT Filesystems
946#
947CONFIG_FAT_FS=y
948# CONFIG_MSDOS_FS is not set
949CONFIG_VFAT_FS=y
950CONFIG_FAT_DEFAULT_CODEPAGE=437
951CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
952# CONFIG_NTFS_FS is not set
953
954#
955# Pseudo filesystems
956#
957CONFIG_PROC_FS=y
958CONFIG_PROC_SYSCTL=y
959CONFIG_SYSFS=y
960CONFIG_TMPFS=y
961# CONFIG_TMPFS_POSIX_ACL is not set
962# CONFIG_HUGETLB_PAGE is not set
963CONFIG_RAMFS=y
964# CONFIG_CONFIGFS_FS is not set
965
966#
967# Miscellaneous filesystems
968#
969# CONFIG_ADFS_FS is not set
970# CONFIG_AFFS_FS is not set
971# CONFIG_HFS_FS is not set
972# CONFIG_HFSPLUS_FS is not set
973# CONFIG_BEFS_FS is not set
974# CONFIG_BFS_FS is not set
975# CONFIG_EFS_FS is not set
976# CONFIG_JFFS_FS is not set
977# CONFIG_JFFS2_FS is not set
978CONFIG_CRAMFS=y
979# CONFIG_VXFS_FS is not set
980# CONFIG_HPFS_FS is not set
981# CONFIG_QNX4FS_FS is not set
982# CONFIG_SYSV_FS is not set
983# CONFIG_UFS_FS is not set
984
985#
986# Network File Systems
987#
988# CONFIG_NFS_FS is not set
989# CONFIG_NFSD is not set
990# CONFIG_SMB_FS is not set
991# CONFIG_CIFS is not set
992# CONFIG_NCP_FS is not set
993# CONFIG_CODA_FS is not set
994# CONFIG_AFS_FS is not set
995# CONFIG_9P_FS is not set
996
997#
998# Partition Types
999#
1000# CONFIG_PARTITION_ADVANCED is not set
1001CONFIG_MSDOS_PARTITION=y
1002
1003#
1004# Native Language Support
1005#
1006CONFIG_NLS=y
1007CONFIG_NLS_DEFAULT="iso8859-1"
1008CONFIG_NLS_CODEPAGE_437=y
1009# CONFIG_NLS_CODEPAGE_737 is not set
1010# CONFIG_NLS_CODEPAGE_775 is not set
1011CONFIG_NLS_CODEPAGE_850=y
1012# CONFIG_NLS_CODEPAGE_852 is not set
1013# CONFIG_NLS_CODEPAGE_855 is not set
1014# CONFIG_NLS_CODEPAGE_857 is not set
1015# CONFIG_NLS_CODEPAGE_860 is not set
1016# CONFIG_NLS_CODEPAGE_861 is not set
1017# CONFIG_NLS_CODEPAGE_862 is not set
1018# CONFIG_NLS_CODEPAGE_863 is not set
1019# CONFIG_NLS_CODEPAGE_864 is not set
1020# CONFIG_NLS_CODEPAGE_865 is not set
1021# CONFIG_NLS_CODEPAGE_866 is not set
1022# CONFIG_NLS_CODEPAGE_869 is not set
1023# CONFIG_NLS_CODEPAGE_936 is not set
1024# CONFIG_NLS_CODEPAGE_950 is not set
1025# CONFIG_NLS_CODEPAGE_932 is not set
1026# CONFIG_NLS_CODEPAGE_949 is not set
1027# CONFIG_NLS_CODEPAGE_874 is not set
1028# CONFIG_NLS_ISO8859_8 is not set
1029# CONFIG_NLS_CODEPAGE_1250 is not set
1030# CONFIG_NLS_CODEPAGE_1251 is not set
1031# CONFIG_NLS_ASCII is not set
1032CONFIG_NLS_ISO8859_1=y
1033# CONFIG_NLS_ISO8859_2 is not set
1034# CONFIG_NLS_ISO8859_3 is not set
1035# CONFIG_NLS_ISO8859_4 is not set
1036# CONFIG_NLS_ISO8859_5 is not set
1037# CONFIG_NLS_ISO8859_6 is not set
1038# CONFIG_NLS_ISO8859_7 is not set
1039# CONFIG_NLS_ISO8859_9 is not set
1040# CONFIG_NLS_ISO8859_13 is not set
1041# CONFIG_NLS_ISO8859_14 is not set
1042# CONFIG_NLS_ISO8859_15 is not set
1043# CONFIG_NLS_KOI8_R is not set
1044# CONFIG_NLS_KOI8_U is not set
1045# CONFIG_NLS_UTF8 is not set
1046
1047#
1048# Profiling support
1049#
1050# CONFIG_PROFILING is not set
1051
1052#
1053# Kernel hacking
1054#
1055# CONFIG_PRINTK_TIME is not set
1056CONFIG_ENABLE_MUST_CHECK=y
1057# CONFIG_MAGIC_SYSRQ is not set
1058# CONFIG_UNUSED_SYMBOLS is not set
1059CONFIG_DEBUG_KERNEL=y
1060CONFIG_LOG_BUF_SHIFT=14
1061CONFIG_DETECT_SOFTLOCKUP=y
1062# CONFIG_SCHEDSTATS is not set
1063# CONFIG_DEBUG_SLAB is not set
1064# CONFIG_DEBUG_RT_MUTEXES is not set
1065# CONFIG_RT_MUTEX_TESTER is not set
1066# CONFIG_DEBUG_SPINLOCK is not set
1067# CONFIG_DEBUG_MUTEXES is not set
1068# CONFIG_DEBUG_RWSEMS is not set
1069# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1070# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1071# CONFIG_DEBUG_KOBJECT is not set
1072CONFIG_DEBUG_BUGVERBOSE=y
1073# CONFIG_DEBUG_INFO is not set
1074# CONFIG_DEBUG_FS is not set
1075# CONFIG_DEBUG_VM is not set
1076# CONFIG_DEBUG_LIST is not set
1077CONFIG_FRAME_POINTER=y
1078CONFIG_FORCED_INLINING=y
1079# CONFIG_HEADERS_CHECK is not set
1080# CONFIG_RCU_TORTURE_TEST is not set
1081CONFIG_DEBUG_USER=y
1082# CONFIG_DEBUG_WAITQ is not set
1083# CONFIG_DEBUG_ERRORS is not set
1084CONFIG_DEBUG_LL=y
1085# CONFIG_DEBUG_ICEDCC is not set
1086
1087#
1088# Security options
1089#
1090# CONFIG_KEYS is not set
1091# CONFIG_SECURITY is not set
1092
1093#
1094# Cryptographic options
1095#
1096# CONFIG_CRYPTO is not set
1097
1098#
1099# Library routines
1100#
1101# CONFIG_CRC_CCITT is not set
1102# CONFIG_CRC16 is not set
1103CONFIG_CRC32=y
1104# CONFIG_LIBCRC32C is not set
1105CONFIG_ZLIB_INFLATE=y
1106CONFIG_PLIST=y
diff --git a/arch/arm/configs/carmeva_defconfig b/arch/arm/configs/carmeva_defconfig
index d24ae8777c35..d392833b31fb 100644
--- a/arch/arm/configs/carmeva_defconfig
+++ b/arch/arm/configs/carmeva_defconfig
@@ -474,7 +474,7 @@ CONFIG_LEGACY_PTY_COUNT=256
474# CONFIG_WATCHDOG is not set 474# CONFIG_WATCHDOG is not set
475# CONFIG_NVRAM is not set 475# CONFIG_NVRAM is not set
476# CONFIG_RTC is not set 476# CONFIG_RTC is not set
477# CONFIG_AT91_RTC is not set 477# CONFIG_AT91RM9200_RTC is not set
478# CONFIG_DTLK is not set 478# CONFIG_DTLK is not set
479# CONFIG_R3964 is not set 479# CONFIG_R3964 is not set
480 480
diff --git a/arch/arm/configs/csb637_defconfig b/arch/arm/configs/csb637_defconfig
index 807f7fc8d777..94908c1df4cf 100644
--- a/arch/arm/configs/csb637_defconfig
+++ b/arch/arm/configs/csb637_defconfig
@@ -623,7 +623,7 @@ CONFIG_AT91RM9200_WATCHDOG=y
623# CONFIG_USBPCWATCHDOG is not set 623# CONFIG_USBPCWATCHDOG is not set
624# CONFIG_NVRAM is not set 624# CONFIG_NVRAM is not set
625CONFIG_RTC=y 625CONFIG_RTC=y
626# CONFIG_AT91_RTC is not set 626# CONFIG_AT91RM9200_RTC is not set
627# CONFIG_DTLK is not set 627# CONFIG_DTLK is not set
628# CONFIG_R3964 is not set 628# CONFIG_R3964 is not set
629 629
diff --git a/arch/arm/configs/ep93xx_defconfig b/arch/arm/configs/ep93xx_defconfig
index 58d5974f41d0..f8a66b72ad5d 100644
--- a/arch/arm/configs/ep93xx_defconfig
+++ b/arch/arm/configs/ep93xx_defconfig
@@ -125,6 +125,7 @@ CONFIG_CRUNCH=y
125# 125#
126# EP93xx Platforms 126# EP93xx Platforms
127# 127#
128CONFIG_MACH_ADSSPHERE=y
128CONFIG_MACH_EDB9302=y 129CONFIG_MACH_EDB9302=y
129CONFIG_MACH_EDB9312=y 130CONFIG_MACH_EDB9312=y
130CONFIG_MACH_EDB9315=y 131CONFIG_MACH_EDB9315=y
diff --git a/arch/arm/configs/iop13xx_defconfig b/arch/arm/configs/iop13xx_defconfig
new file mode 100644
index 000000000000..f6e46193fd26
--- /dev/null
+++ b/arch/arm/configs/iop13xx_defconfig
@@ -0,0 +1,1134 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.19
4# Fri Dec 1 10:51:01 2006
5#
6CONFIG_ARM=y
7# CONFIG_GENERIC_TIME is not set
8CONFIG_MMU=y
9CONFIG_GENERIC_HARDIRQS=y
10CONFIG_TRACE_IRQFLAGS_SUPPORT=y
11CONFIG_HARDIRQS_SW_RESEND=y
12CONFIG_GENERIC_IRQ_PROBE=y
13CONFIG_RWSEM_GENERIC_SPINLOCK=y
14CONFIG_GENERIC_HWEIGHT=y
15CONFIG_GENERIC_CALIBRATE_DELAY=y
16CONFIG_VECTORS_BASE=0xffff0000
17CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
18
19#
20# Code maturity level options
21#
22CONFIG_EXPERIMENTAL=y
23CONFIG_BROKEN_ON_SMP=y
24CONFIG_INIT_ENV_ARG_LIMIT=32
25
26#
27# General setup
28#
29CONFIG_LOCALVERSION=""
30# CONFIG_LOCALVERSION_AUTO is not set
31CONFIG_SWAP=y
32CONFIG_SYSVIPC=y
33# CONFIG_IPC_NS is not set
34CONFIG_POSIX_MQUEUE=y
35CONFIG_BSD_PROCESS_ACCT=y
36# CONFIG_BSD_PROCESS_ACCT_V3 is not set
37# CONFIG_TASKSTATS is not set
38# CONFIG_UTS_NS is not set
39# CONFIG_AUDIT is not set
40CONFIG_IKCONFIG=y
41CONFIG_IKCONFIG_PROC=y
42# CONFIG_RELAY is not set
43CONFIG_INITRAMFS_SOURCE=""
44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
45CONFIG_SYSCTL=y
46# CONFIG_EMBEDDED is not set
47CONFIG_UID16=y
48CONFIG_SYSCTL_SYSCALL=y
49CONFIG_KALLSYMS=y
50# CONFIG_KALLSYMS_EXTRA_PASS is not set
51CONFIG_HOTPLUG=y
52CONFIG_PRINTK=y
53CONFIG_BUG=y
54CONFIG_ELF_CORE=y
55CONFIG_BASE_FULL=y
56CONFIG_FUTEX=y
57CONFIG_EPOLL=y
58CONFIG_SHMEM=y
59CONFIG_SLAB=y
60CONFIG_VM_EVENT_COUNTERS=y
61CONFIG_RT_MUTEXES=y
62# CONFIG_TINY_SHMEM is not set
63CONFIG_BASE_SMALL=0
64# CONFIG_SLOB is not set
65
66#
67# Loadable module support
68#
69CONFIG_MODULES=y
70CONFIG_MODULE_UNLOAD=y
71# CONFIG_MODULE_FORCE_UNLOAD is not set
72CONFIG_MODVERSIONS=y
73# CONFIG_MODULE_SRCVERSION_ALL is not set
74CONFIG_KMOD=y
75
76#
77# Block layer
78#
79CONFIG_BLOCK=y
80# CONFIG_BLK_DEV_IO_TRACE is not set
81
82#
83# IO Schedulers
84#
85CONFIG_IOSCHED_NOOP=y
86# CONFIG_IOSCHED_AS is not set
87CONFIG_IOSCHED_DEADLINE=y
88# CONFIG_IOSCHED_CFQ is not set
89# CONFIG_DEFAULT_AS is not set
90CONFIG_DEFAULT_DEADLINE=y
91# CONFIG_DEFAULT_CFQ is not set
92# CONFIG_DEFAULT_NOOP is not set
93CONFIG_DEFAULT_IOSCHED="deadline"
94
95#
96# System Type
97#
98# CONFIG_ARCH_AAEC2000 is not set
99# CONFIG_ARCH_INTEGRATOR is not set
100# CONFIG_ARCH_REALVIEW is not set
101# CONFIG_ARCH_VERSATILE is not set
102# CONFIG_ARCH_AT91 is not set
103# CONFIG_ARCH_CLPS7500 is not set
104# CONFIG_ARCH_CLPS711X is not set
105# CONFIG_ARCH_CO285 is not set
106# CONFIG_ARCH_EBSA110 is not set
107# CONFIG_ARCH_EP93XX is not set
108# CONFIG_ARCH_FOOTBRIDGE is not set
109# CONFIG_ARCH_NETX is not set
110# CONFIG_ARCH_H720X is not set
111# CONFIG_ARCH_IMX is not set
112# CONFIG_ARCH_IOP32X is not set
113# CONFIG_ARCH_IOP33X is not set
114CONFIG_ARCH_IOP13XX=y
115# CONFIG_ARCH_IXP4XX is not set
116# CONFIG_ARCH_IXP2000 is not set
117# CONFIG_ARCH_IXP23XX is not set
118# CONFIG_ARCH_L7200 is not set
119# CONFIG_ARCH_PNX4008 is not set
120# CONFIG_ARCH_PXA is not set
121# CONFIG_ARCH_RPC is not set
122# CONFIG_ARCH_SA1100 is not set
123# CONFIG_ARCH_S3C2410 is not set
124# CONFIG_ARCH_SHARK is not set
125# CONFIG_ARCH_LH7A40X is not set
126# CONFIG_ARCH_OMAP is not set
127
128#
129# IOP13XX Implementation Options
130#
131
132#
133# IOP13XX Platform Support
134#
135CONFIG_MACH_IQ81340SC=y
136CONFIG_MACH_IQ81340MC=y
137
138#
139# Processor Type
140#
141CONFIG_CPU_32=y
142CONFIG_CPU_XSC3=y
143CONFIG_CPU_32v5=y
144CONFIG_CPU_ABRT_EV5T=y
145CONFIG_CPU_CACHE_VIVT=y
146CONFIG_CPU_TLB_V4WBI=y
147CONFIG_CPU_CP15=y
148CONFIG_CPU_CP15_MMU=y
149CONFIG_IO_36=y
150
151#
152# Processor Features
153#
154CONFIG_ARM_THUMB=y
155# CONFIG_CPU_DCACHE_DISABLE is not set
156# CONFIG_CPU_BPREDICT_DISABLE is not set
157
158#
159# Bus support
160#
161CONFIG_PCI=y
162
163#
164# PCCARD (PCMCIA/CardBus) support
165#
166# CONFIG_PCCARD is not set
167
168#
169# Kernel Features
170#
171# CONFIG_PREEMPT is not set
172# CONFIG_NO_IDLE_HZ is not set
173CONFIG_HZ=100
174# CONFIG_AEABI is not set
175# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
176CONFIG_SELECT_MEMORY_MODEL=y
177CONFIG_FLATMEM_MANUAL=y
178# CONFIG_DISCONTIGMEM_MANUAL is not set
179# CONFIG_SPARSEMEM_MANUAL is not set
180CONFIG_FLATMEM=y
181CONFIG_FLAT_NODE_MEM_MAP=y
182# CONFIG_SPARSEMEM_STATIC is not set
183CONFIG_SPLIT_PTLOCK_CPUS=4096
184# CONFIG_RESOURCES_64BIT is not set
185CONFIG_ALIGNMENT_TRAP=y
186
187#
188# Boot options
189#
190CONFIG_ZBOOT_ROM_TEXT=0x0
191CONFIG_ZBOOT_ROM_BSS=0x0
192CONFIG_CMDLINE="ip=bootp root=nfs console=ttyS0,115200 nfsroot=,tcp,v3,wsize=8192,rsize=8192"
193# CONFIG_XIP_KERNEL is not set
194
195#
196# Floating point emulation
197#
198
199#
200# At least one emulation must be selected
201#
202CONFIG_FPE_NWFPE=y
203# CONFIG_FPE_NWFPE_XP is not set
204# CONFIG_FPE_FASTFPE is not set
205
206#
207# Userspace binary formats
208#
209CONFIG_BINFMT_ELF=y
210CONFIG_BINFMT_AOUT=y
211# CONFIG_BINFMT_MISC is not set
212# CONFIG_ARTHUR is not set
213
214#
215# Power management options
216#
217# CONFIG_PM is not set
218# CONFIG_APM is not set
219
220#
221# Networking
222#
223CONFIG_NET=y
224
225#
226# Networking options
227#
228# CONFIG_NETDEBUG is not set
229CONFIG_PACKET=y
230CONFIG_PACKET_MMAP=y
231CONFIG_UNIX=y
232CONFIG_XFRM=y
233# CONFIG_XFRM_USER is not set
234# CONFIG_XFRM_SUB_POLICY is not set
235CONFIG_NET_KEY=y
236CONFIG_INET=y
237CONFIG_IP_MULTICAST=y
238# CONFIG_IP_ADVANCED_ROUTER is not set
239CONFIG_IP_FIB_HASH=y
240CONFIG_IP_PNP=y
241# CONFIG_IP_PNP_DHCP is not set
242CONFIG_IP_PNP_BOOTP=y
243# CONFIG_IP_PNP_RARP is not set
244# CONFIG_NET_IPIP is not set
245# CONFIG_NET_IPGRE is not set
246# CONFIG_IP_MROUTE is not set
247# CONFIG_ARPD is not set
248# CONFIG_SYN_COOKIES is not set
249# CONFIG_INET_AH is not set
250# CONFIG_INET_ESP is not set
251# CONFIG_INET_IPCOMP is not set
252# CONFIG_INET_XFRM_TUNNEL is not set
253# CONFIG_INET_TUNNEL is not set
254CONFIG_INET_XFRM_MODE_TRANSPORT=y
255CONFIG_INET_XFRM_MODE_TUNNEL=y
256CONFIG_INET_XFRM_MODE_BEET=y
257CONFIG_INET_DIAG=y
258CONFIG_INET_TCP_DIAG=y
259# CONFIG_TCP_CONG_ADVANCED is not set
260CONFIG_TCP_CONG_CUBIC=y
261CONFIG_DEFAULT_TCP_CONG="cubic"
262# CONFIG_IPV6 is not set
263# CONFIG_INET6_XFRM_TUNNEL is not set
264# CONFIG_INET6_TUNNEL is not set
265# CONFIG_NETWORK_SECMARK is not set
266# CONFIG_NETFILTER is not set
267
268#
269# DCCP Configuration (EXPERIMENTAL)
270#
271# CONFIG_IP_DCCP is not set
272
273#
274# SCTP Configuration (EXPERIMENTAL)
275#
276# CONFIG_IP_SCTP is not set
277
278#
279# TIPC Configuration (EXPERIMENTAL)
280#
281# CONFIG_TIPC is not set
282# CONFIG_ATM is not set
283# CONFIG_BRIDGE is not set
284# CONFIG_VLAN_8021Q is not set
285# CONFIG_DECNET is not set
286# CONFIG_LLC2 is not set
287# CONFIG_IPX is not set
288# CONFIG_ATALK is not set
289# CONFIG_X25 is not set
290# CONFIG_LAPB is not set
291# CONFIG_ECONET is not set
292# CONFIG_WAN_ROUTER is not set
293
294#
295# QoS and/or fair queueing
296#
297# CONFIG_NET_SCHED is not set
298
299#
300# Network testing
301#
302# CONFIG_NET_PKTGEN is not set
303# CONFIG_HAMRADIO is not set
304# CONFIG_IRDA is not set
305# CONFIG_BT is not set
306# CONFIG_IEEE80211 is not set
307
308#
309# Device Drivers
310#
311
312#
313# Generic Driver Options
314#
315CONFIG_STANDALONE=y
316CONFIG_PREVENT_FIRMWARE_BUILD=y
317# CONFIG_FW_LOADER is not set
318# CONFIG_SYS_HYPERVISOR is not set
319
320#
321# Connector - unified userspace <-> kernelspace linker
322#
323# CONFIG_CONNECTOR is not set
324
325#
326# Memory Technology Devices (MTD)
327#
328CONFIG_MTD=y
329# CONFIG_MTD_DEBUG is not set
330# CONFIG_MTD_CONCAT is not set
331CONFIG_MTD_PARTITIONS=y
332CONFIG_MTD_REDBOOT_PARTS=y
333CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
334CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
335CONFIG_MTD_REDBOOT_PARTS_READONLY=y
336# CONFIG_MTD_CMDLINE_PARTS is not set
337# CONFIG_MTD_AFS_PARTS is not set
338
339#
340# User Modules And Translation Layers
341#
342# CONFIG_MTD_CHAR is not set
343CONFIG_MTD_BLOCK=y
344# CONFIG_FTL is not set
345# CONFIG_NFTL is not set
346# CONFIG_INFTL is not set
347# CONFIG_RFD_FTL is not set
348# CONFIG_SSFDC is not set
349
350#
351# RAM/ROM/Flash chip drivers
352#
353CONFIG_MTD_CFI=y
354# CONFIG_MTD_JEDECPROBE is not set
355CONFIG_MTD_GEN_PROBE=y
356CONFIG_MTD_CFI_ADV_OPTIONS=y
357CONFIG_MTD_CFI_NOSWAP=y
358# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
359# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
360# CONFIG_MTD_CFI_GEOMETRY is not set
361CONFIG_MTD_MAP_BANK_WIDTH_1=y
362CONFIG_MTD_MAP_BANK_WIDTH_2=y
363CONFIG_MTD_MAP_BANK_WIDTH_4=y
364# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
365# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
366# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
367CONFIG_MTD_CFI_I1=y
368CONFIG_MTD_CFI_I2=y
369# CONFIG_MTD_CFI_I4 is not set
370# CONFIG_MTD_CFI_I8 is not set
371# CONFIG_MTD_OTP is not set
372CONFIG_MTD_CFI_INTELEXT=y
373# CONFIG_MTD_CFI_AMDSTD is not set
374# CONFIG_MTD_CFI_STAA is not set
375CONFIG_MTD_CFI_UTIL=y
376# CONFIG_MTD_RAM is not set
377# CONFIG_MTD_ROM is not set
378# CONFIG_MTD_ABSENT is not set
379# CONFIG_MTD_OBSOLETE_CHIPS is not set
380
381#
382# Mapping drivers for chip access
383#
384# CONFIG_MTD_COMPLEX_MAPPINGS is not set
385CONFIG_MTD_PHYSMAP=y
386CONFIG_MTD_PHYSMAP_START=0xfa000000
387CONFIG_MTD_PHYSMAP_LEN=0x0
388CONFIG_MTD_PHYSMAP_BANKWIDTH=2
389# CONFIG_MTD_ARM_INTEGRATOR is not set
390# CONFIG_MTD_PLATRAM is not set
391
392#
393# Self-contained MTD device drivers
394#
395# CONFIG_MTD_PMC551 is not set
396# CONFIG_MTD_SLRAM is not set
397# CONFIG_MTD_PHRAM is not set
398# CONFIG_MTD_MTDRAM is not set
399# CONFIG_MTD_BLOCK2MTD is not set
400
401#
402# Disk-On-Chip Device Drivers
403#
404# CONFIG_MTD_DOC2000 is not set
405# CONFIG_MTD_DOC2001 is not set
406# CONFIG_MTD_DOC2001PLUS is not set
407
408#
409# NAND Flash Device Drivers
410#
411# CONFIG_MTD_NAND is not set
412
413#
414# OneNAND Flash Device Drivers
415#
416# CONFIG_MTD_ONENAND is not set
417
418#
419# Parallel port support
420#
421# CONFIG_PARPORT is not set
422
423#
424# Plug and Play support
425#
426
427#
428# Block devices
429#
430# CONFIG_BLK_CPQ_DA is not set
431# CONFIG_BLK_CPQ_CISS_DA is not set
432# CONFIG_BLK_DEV_DAC960 is not set
433# CONFIG_BLK_DEV_UMEM is not set
434# CONFIG_BLK_DEV_COW_COMMON is not set
435# CONFIG_BLK_DEV_LOOP is not set
436# CONFIG_BLK_DEV_NBD is not set
437# CONFIG_BLK_DEV_SX8 is not set
438CONFIG_BLK_DEV_RAM=y
439CONFIG_BLK_DEV_RAM_COUNT=2
440CONFIG_BLK_DEV_RAM_SIZE=8192
441CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
442CONFIG_BLK_DEV_INITRD=y
443# CONFIG_CDROM_PKTCDVD is not set
444# CONFIG_ATA_OVER_ETH is not set
445
446#
447# SCSI device support
448#
449# CONFIG_RAID_ATTRS is not set
450CONFIG_SCSI=y
451# CONFIG_SCSI_NETLINK is not set
452CONFIG_SCSI_PROC_FS=y
453
454#
455# SCSI support type (disk, tape, CD-ROM)
456#
457CONFIG_BLK_DEV_SD=y
458# CONFIG_CHR_DEV_ST is not set
459# CONFIG_CHR_DEV_OSST is not set
460# CONFIG_BLK_DEV_SR is not set
461CONFIG_CHR_DEV_SG=y
462# CONFIG_CHR_DEV_SCH is not set
463
464#
465# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
466#
467# CONFIG_SCSI_MULTI_LUN is not set
468CONFIG_SCSI_CONSTANTS=y
469# CONFIG_SCSI_LOGGING is not set
470
471#
472# SCSI Transports
473#
474# CONFIG_SCSI_SPI_ATTRS is not set
475# CONFIG_SCSI_FC_ATTRS is not set
476CONFIG_SCSI_ISCSI_ATTRS=y
477CONFIG_SCSI_SAS_ATTRS=y
478# CONFIG_SCSI_SAS_LIBSAS is not set
479
480#
481# SCSI low-level drivers
482#
483# CONFIG_ISCSI_TCP is not set
484# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
485# CONFIG_SCSI_3W_9XXX is not set
486# CONFIG_SCSI_ACARD is not set
487# CONFIG_SCSI_AACRAID is not set
488# CONFIG_SCSI_AIC7XXX is not set
489# CONFIG_SCSI_AIC7XXX_OLD is not set
490# CONFIG_SCSI_AIC79XX is not set
491# CONFIG_SCSI_AIC94XX is not set
492# CONFIG_SCSI_DPT_I2O is not set
493# CONFIG_SCSI_ARCMSR is not set
494# CONFIG_MEGARAID_NEWGEN is not set
495# CONFIG_MEGARAID_LEGACY is not set
496# CONFIG_MEGARAID_SAS is not set
497# CONFIG_SCSI_HPTIOP is not set
498# CONFIG_SCSI_DMX3191D is not set
499# CONFIG_SCSI_FUTURE_DOMAIN is not set
500# CONFIG_SCSI_IPS is not set
501# CONFIG_SCSI_INITIO is not set
502# CONFIG_SCSI_INIA100 is not set
503# CONFIG_SCSI_STEX is not set
504# CONFIG_SCSI_SYM53C8XX_2 is not set
505# CONFIG_SCSI_QLOGIC_1280 is not set
506# CONFIG_SCSI_QLA_FC is not set
507# CONFIG_SCSI_QLA_ISCSI is not set
508# CONFIG_SCSI_LPFC is not set
509# CONFIG_SCSI_DC395x is not set
510# CONFIG_SCSI_DC390T is not set
511# CONFIG_SCSI_NSP32 is not set
512# CONFIG_SCSI_DEBUG is not set
513
514#
515# Serial ATA (prod) and Parallel ATA (experimental) drivers
516#
517# CONFIG_ATA is not set
518
519#
520# Multi-device support (RAID and LVM)
521#
522CONFIG_MD=y
523CONFIG_BLK_DEV_MD=y
524# CONFIG_MD_LINEAR is not set
525CONFIG_MD_RAID0=y
526CONFIG_MD_RAID1=y
527CONFIG_MD_RAID10=y
528CONFIG_MD_RAID456=y
529# CONFIG_MD_RAID5_RESHAPE is not set
530# CONFIG_MD_MULTIPATH is not set
531# CONFIG_MD_FAULTY is not set
532CONFIG_BLK_DEV_DM=y
533# CONFIG_DM_DEBUG is not set
534# CONFIG_DM_CRYPT is not set
535# CONFIG_DM_SNAPSHOT is not set
536# CONFIG_DM_MIRROR is not set
537# CONFIG_DM_ZERO is not set
538# CONFIG_DM_MULTIPATH is not set
539
540#
541# Fusion MPT device support
542#
543# CONFIG_FUSION is not set
544# CONFIG_FUSION_SPI is not set
545# CONFIG_FUSION_FC is not set
546# CONFIG_FUSION_SAS is not set
547
548#
549# IEEE 1394 (FireWire) support
550#
551# CONFIG_IEEE1394 is not set
552
553#
554# I2O device support
555#
556# CONFIG_I2O is not set
557
558#
559# Network device support
560#
561CONFIG_NETDEVICES=y
562# CONFIG_DUMMY is not set
563# CONFIG_BONDING is not set
564# CONFIG_EQUALIZER is not set
565# CONFIG_TUN is not set
566
567#
568# ARCnet devices
569#
570# CONFIG_ARCNET is not set
571
572#
573# PHY device support
574#
575
576#
577# Ethernet (10 or 100Mbit)
578#
579# CONFIG_NET_ETHERNET is not set
580
581#
582# Ethernet (1000 Mbit)
583#
584# CONFIG_ACENIC is not set
585# CONFIG_DL2K is not set
586CONFIG_E1000=y
587CONFIG_E1000_NAPI=y
588# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
589# CONFIG_NS83820 is not set
590# CONFIG_HAMACHI is not set
591# CONFIG_YELLOWFIN is not set
592# CONFIG_R8169 is not set
593# CONFIG_SIS190 is not set
594# CONFIG_SKGE is not set
595# CONFIG_SKY2 is not set
596# CONFIG_SK98LIN is not set
597# CONFIG_TIGON3 is not set
598# CONFIG_BNX2 is not set
599# CONFIG_QLA3XXX is not set
600
601#
602# Ethernet (10000 Mbit)
603#
604# CONFIG_CHELSIO_T1 is not set
605# CONFIG_IXGB is not set
606# CONFIG_S2IO is not set
607# CONFIG_MYRI10GE is not set
608
609#
610# Token Ring devices
611#
612# CONFIG_TR is not set
613
614#
615# Wireless LAN (non-hamradio)
616#
617# CONFIG_NET_RADIO is not set
618
619#
620# Wan interfaces
621#
622# CONFIG_WAN is not set
623# CONFIG_FDDI is not set
624# CONFIG_HIPPI is not set
625# CONFIG_PPP is not set
626# CONFIG_SLIP is not set
627# CONFIG_NET_FC is not set
628# CONFIG_SHAPER is not set
629# CONFIG_NETCONSOLE is not set
630# CONFIG_NETPOLL is not set
631# CONFIG_NET_POLL_CONTROLLER is not set
632
633#
634# ISDN subsystem
635#
636# CONFIG_ISDN is not set
637
638#
639# Input device support
640#
641CONFIG_INPUT=y
642# CONFIG_INPUT_FF_MEMLESS is not set
643
644#
645# Userland interfaces
646#
647CONFIG_INPUT_MOUSEDEV=y
648# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
649CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
650CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
651# CONFIG_INPUT_JOYDEV is not set
652# CONFIG_INPUT_TSDEV is not set
653# CONFIG_INPUT_EVDEV is not set
654# CONFIG_INPUT_EVBUG is not set
655
656#
657# Input Device Drivers
658#
659# CONFIG_INPUT_KEYBOARD is not set
660# CONFIG_INPUT_MOUSE is not set
661# CONFIG_INPUT_JOYSTICK is not set
662# CONFIG_INPUT_TOUCHSCREEN is not set
663# CONFIG_INPUT_MISC is not set
664
665#
666# Hardware I/O ports
667#
668# CONFIG_SERIO is not set
669# CONFIG_GAMEPORT is not set
670
671#
672# Character devices
673#
674CONFIG_VT=y
675CONFIG_VT_CONSOLE=y
676CONFIG_HW_CONSOLE=y
677# CONFIG_VT_HW_CONSOLE_BINDING is not set
678# CONFIG_SERIAL_NONSTANDARD is not set
679
680#
681# Serial drivers
682#
683CONFIG_SERIAL_8250=y
684CONFIG_SERIAL_8250_CONSOLE=y
685CONFIG_SERIAL_8250_PCI=y
686CONFIG_SERIAL_8250_NR_UARTS=2
687CONFIG_SERIAL_8250_RUNTIME_UARTS=2
688# CONFIG_SERIAL_8250_EXTENDED is not set
689
690#
691# Non-8250 serial port support
692#
693CONFIG_SERIAL_CORE=y
694CONFIG_SERIAL_CORE_CONSOLE=y
695# CONFIG_SERIAL_JSM is not set
696CONFIG_UNIX98_PTYS=y
697CONFIG_LEGACY_PTYS=y
698CONFIG_LEGACY_PTY_COUNT=256
699
700#
701# IPMI
702#
703# CONFIG_IPMI_HANDLER is not set
704
705#
706# Watchdog Cards
707#
708# CONFIG_WATCHDOG is not set
709CONFIG_HW_RANDOM=y
710# CONFIG_NVRAM is not set
711# CONFIG_DTLK is not set
712# CONFIG_R3964 is not set
713# CONFIG_APPLICOM is not set
714
715#
716# Ftape, the floppy tape device driver
717#
718# CONFIG_DRM is not set
719# CONFIG_RAW_DRIVER is not set
720
721#
722# TPM devices
723#
724# CONFIG_TCG_TPM is not set
725
726#
727# I2C support
728#
729CONFIG_I2C=y
730# CONFIG_I2C_CHARDEV is not set
731
732#
733# I2C Algorithms
734#
735CONFIG_I2C_ALGOBIT=m
736CONFIG_I2C_ALGOPCF=m
737CONFIG_I2C_ALGOPCA=m
738
739#
740# I2C Hardware Bus support
741#
742# CONFIG_I2C_ALI1535 is not set
743# CONFIG_I2C_ALI1563 is not set
744# CONFIG_I2C_ALI15X3 is not set
745# CONFIG_I2C_AMD756 is not set
746# CONFIG_I2C_AMD8111 is not set
747# CONFIG_I2C_I801 is not set
748# CONFIG_I2C_I810 is not set
749# CONFIG_I2C_PIIX4 is not set
750CONFIG_I2C_IOP3XX=y
751# CONFIG_I2C_NFORCE2 is not set
752# CONFIG_I2C_OCORES is not set
753# CONFIG_I2C_PARPORT_LIGHT is not set
754# CONFIG_I2C_PROSAVAGE is not set
755# CONFIG_I2C_SAVAGE4 is not set
756# CONFIG_I2C_SIS5595 is not set
757# CONFIG_I2C_SIS630 is not set
758# CONFIG_I2C_SIS96X is not set
759# CONFIG_I2C_STUB is not set
760# CONFIG_I2C_VIA is not set
761# CONFIG_I2C_VIAPRO is not set
762# CONFIG_I2C_VOODOO3 is not set
763# CONFIG_I2C_PCA_ISA is not set
764
765#
766# Miscellaneous I2C Chip support
767#
768# CONFIG_SENSORS_DS1337 is not set
769# CONFIG_SENSORS_DS1374 is not set
770# CONFIG_SENSORS_EEPROM is not set
771# CONFIG_SENSORS_PCF8574 is not set
772# CONFIG_SENSORS_PCA9539 is not set
773# CONFIG_SENSORS_PCF8591 is not set
774# CONFIG_SENSORS_MAX6875 is not set
775# CONFIG_I2C_DEBUG_CORE is not set
776# CONFIG_I2C_DEBUG_ALGO is not set
777# CONFIG_I2C_DEBUG_BUS is not set
778# CONFIG_I2C_DEBUG_CHIP is not set
779
780#
781# SPI support
782#
783# CONFIG_SPI is not set
784# CONFIG_SPI_MASTER is not set
785
786#
787# Dallas's 1-wire bus
788#
789# CONFIG_W1 is not set
790
791#
792# Hardware Monitoring support
793#
794CONFIG_HWMON=y
795# CONFIG_HWMON_VID is not set
796# CONFIG_SENSORS_ABITUGURU is not set
797# CONFIG_SENSORS_ADM1021 is not set
798# CONFIG_SENSORS_ADM1025 is not set
799# CONFIG_SENSORS_ADM1026 is not set
800# CONFIG_SENSORS_ADM1031 is not set
801# CONFIG_SENSORS_ADM9240 is not set
802# CONFIG_SENSORS_ASB100 is not set
803# CONFIG_SENSORS_ATXP1 is not set
804# CONFIG_SENSORS_DS1621 is not set
805# CONFIG_SENSORS_F71805F is not set
806# CONFIG_SENSORS_FSCHER is not set
807# CONFIG_SENSORS_FSCPOS is not set
808# CONFIG_SENSORS_GL518SM is not set
809# CONFIG_SENSORS_GL520SM is not set
810# CONFIG_SENSORS_IT87 is not set
811# CONFIG_SENSORS_LM63 is not set
812# CONFIG_SENSORS_LM75 is not set
813# CONFIG_SENSORS_LM77 is not set
814# CONFIG_SENSORS_LM78 is not set
815# CONFIG_SENSORS_LM80 is not set
816# CONFIG_SENSORS_LM83 is not set
817# CONFIG_SENSORS_LM85 is not set
818# CONFIG_SENSORS_LM87 is not set
819# CONFIG_SENSORS_LM90 is not set
820# CONFIG_SENSORS_LM92 is not set
821# CONFIG_SENSORS_MAX1619 is not set
822# CONFIG_SENSORS_PC87360 is not set
823# CONFIG_SENSORS_SIS5595 is not set
824# CONFIG_SENSORS_SMSC47M1 is not set
825# CONFIG_SENSORS_SMSC47M192 is not set
826# CONFIG_SENSORS_SMSC47B397 is not set
827# CONFIG_SENSORS_VIA686A is not set
828# CONFIG_SENSORS_VT1211 is not set
829# CONFIG_SENSORS_VT8231 is not set
830# CONFIG_SENSORS_W83781D is not set
831# CONFIG_SENSORS_W83791D is not set
832# CONFIG_SENSORS_W83792D is not set
833# CONFIG_SENSORS_W83L785TS is not set
834# CONFIG_SENSORS_W83627HF is not set
835# CONFIG_SENSORS_W83627EHF is not set
836# CONFIG_HWMON_DEBUG_CHIP is not set
837
838#
839# Misc devices
840#
841# CONFIG_SGI_IOC4 is not set
842# CONFIG_TIFM_CORE is not set
843
844#
845# LED devices
846#
847# CONFIG_NEW_LEDS is not set
848
849#
850# LED drivers
851#
852
853#
854# LED Triggers
855#
856
857#
858# Multimedia devices
859#
860# CONFIG_VIDEO_DEV is not set
861
862#
863# Digital Video Broadcasting Devices
864#
865# CONFIG_DVB is not set
866
867#
868# Graphics support
869#
870CONFIG_FIRMWARE_EDID=y
871# CONFIG_FB is not set
872
873#
874# Console display driver support
875#
876# CONFIG_VGA_CONSOLE is not set
877CONFIG_DUMMY_CONSOLE=y
878# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
879
880#
881# Sound
882#
883# CONFIG_SOUND is not set
884
885#
886# USB support
887#
888CONFIG_USB_ARCH_HAS_HCD=y
889CONFIG_USB_ARCH_HAS_OHCI=y
890CONFIG_USB_ARCH_HAS_EHCI=y
891# CONFIG_USB is not set
892
893#
894# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
895#
896
897#
898# USB Gadget Support
899#
900# CONFIG_USB_GADGET is not set
901
902#
903# MMC/SD Card support
904#
905# CONFIG_MMC is not set
906
907#
908# Real Time Clock
909#
910CONFIG_RTC_LIB=y
911# CONFIG_RTC_CLASS is not set
912
913#
914# File systems
915#
916CONFIG_EXT2_FS=y
917# CONFIG_EXT2_FS_XATTR is not set
918# CONFIG_EXT2_FS_XIP is not set
919CONFIG_EXT3_FS=y
920CONFIG_EXT3_FS_XATTR=y
921# CONFIG_EXT3_FS_POSIX_ACL is not set
922# CONFIG_EXT3_FS_SECURITY is not set
923# CONFIG_EXT4DEV_FS is not set
924CONFIG_JBD=y
925# CONFIG_JBD_DEBUG is not set
926CONFIG_FS_MBCACHE=y
927# CONFIG_REISERFS_FS is not set
928# CONFIG_JFS_FS is not set
929# CONFIG_FS_POSIX_ACL is not set
930# CONFIG_XFS_FS is not set
931# CONFIG_GFS2_FS is not set
932# CONFIG_OCFS2_FS is not set
933# CONFIG_MINIX_FS is not set
934# CONFIG_ROMFS_FS is not set
935CONFIG_INOTIFY=y
936CONFIG_INOTIFY_USER=y
937# CONFIG_QUOTA is not set
938CONFIG_DNOTIFY=y
939# CONFIG_AUTOFS_FS is not set
940# CONFIG_AUTOFS4_FS is not set
941# CONFIG_FUSE_FS is not set
942
943#
944# CD-ROM/DVD Filesystems
945#
946# CONFIG_ISO9660_FS is not set
947# CONFIG_UDF_FS is not set
948
949#
950# DOS/FAT/NT Filesystems
951#
952# CONFIG_MSDOS_FS is not set
953# CONFIG_VFAT_FS is not set
954# CONFIG_NTFS_FS is not set
955
956#
957# Pseudo filesystems
958#
959CONFIG_PROC_FS=y
960CONFIG_PROC_SYSCTL=y
961CONFIG_SYSFS=y
962CONFIG_TMPFS=y
963# CONFIG_TMPFS_POSIX_ACL is not set
964# CONFIG_HUGETLB_PAGE is not set
965CONFIG_RAMFS=y
966# CONFIG_CONFIGFS_FS is not set
967
968#
969# Miscellaneous filesystems
970#
971# CONFIG_ADFS_FS is not set
972# CONFIG_AFFS_FS is not set
973# CONFIG_HFS_FS is not set
974# CONFIG_HFSPLUS_FS is not set
975# CONFIG_BEFS_FS is not set
976# CONFIG_BFS_FS is not set
977# CONFIG_EFS_FS is not set
978# CONFIG_JFFS_FS is not set
979CONFIG_JFFS2_FS=y
980CONFIG_JFFS2_FS_DEBUG=0
981CONFIG_JFFS2_FS_WRITEBUFFER=y
982# CONFIG_JFFS2_SUMMARY is not set
983# CONFIG_JFFS2_FS_XATTR is not set
984# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
985CONFIG_JFFS2_ZLIB=y
986CONFIG_JFFS2_RTIME=y
987# CONFIG_JFFS2_RUBIN is not set
988# CONFIG_CRAMFS is not set
989# CONFIG_VXFS_FS is not set
990# CONFIG_HPFS_FS is not set
991# CONFIG_QNX4FS_FS is not set
992# CONFIG_SYSV_FS is not set
993# CONFIG_UFS_FS is not set
994
995#
996# Network File Systems
997#
998CONFIG_NFS_FS=y
999CONFIG_NFS_V3=y
1000# CONFIG_NFS_V3_ACL is not set
1001# CONFIG_NFS_V4 is not set
1002# CONFIG_NFS_DIRECTIO is not set
1003CONFIG_NFSD=y
1004CONFIG_NFSD_V3=y
1005# CONFIG_NFSD_V3_ACL is not set
1006# CONFIG_NFSD_V4 is not set
1007CONFIG_NFSD_TCP=y
1008CONFIG_ROOT_NFS=y
1009CONFIG_LOCKD=y
1010CONFIG_LOCKD_V4=y
1011CONFIG_EXPORTFS=y
1012CONFIG_NFS_COMMON=y
1013CONFIG_SUNRPC=y
1014# CONFIG_RPCSEC_GSS_KRB5 is not set
1015# CONFIG_RPCSEC_GSS_SPKM3 is not set
1016CONFIG_SMB_FS=m
1017# CONFIG_SMB_NLS_DEFAULT is not set
1018CONFIG_CIFS=m
1019# CONFIG_CIFS_STATS is not set
1020# CONFIG_CIFS_WEAK_PW_HASH is not set
1021# CONFIG_CIFS_XATTR is not set
1022# CONFIG_CIFS_DEBUG2 is not set
1023# CONFIG_CIFS_EXPERIMENTAL is not set
1024# CONFIG_NCP_FS is not set
1025# CONFIG_CODA_FS is not set
1026# CONFIG_AFS_FS is not set
1027# CONFIG_9P_FS is not set
1028
1029#
1030# Partition Types
1031#
1032CONFIG_PARTITION_ADVANCED=y
1033# CONFIG_ACORN_PARTITION is not set
1034# CONFIG_OSF_PARTITION is not set
1035# CONFIG_AMIGA_PARTITION is not set
1036# CONFIG_ATARI_PARTITION is not set
1037# CONFIG_MAC_PARTITION is not set
1038CONFIG_MSDOS_PARTITION=y
1039# CONFIG_BSD_DISKLABEL is not set
1040# CONFIG_MINIX_SUBPARTITION is not set
1041# CONFIG_SOLARIS_X86_PARTITION is not set
1042# CONFIG_UNIXWARE_DISKLABEL is not set
1043# CONFIG_LDM_PARTITION is not set
1044# CONFIG_SGI_PARTITION is not set
1045# CONFIG_ULTRIX_PARTITION is not set
1046# CONFIG_SUN_PARTITION is not set
1047# CONFIG_KARMA_PARTITION is not set
1048# CONFIG_EFI_PARTITION is not set
1049
1050#
1051# Native Language Support
1052#
1053CONFIG_NLS=y
1054CONFIG_NLS_DEFAULT="iso8859-1"
1055# CONFIG_NLS_CODEPAGE_437 is not set
1056# CONFIG_NLS_CODEPAGE_737 is not set
1057# CONFIG_NLS_CODEPAGE_775 is not set
1058# CONFIG_NLS_CODEPAGE_850 is not set
1059# CONFIG_NLS_CODEPAGE_852 is not set
1060# CONFIG_NLS_CODEPAGE_855 is not set
1061# CONFIG_NLS_CODEPAGE_857 is not set
1062# CONFIG_NLS_CODEPAGE_860 is not set
1063# CONFIG_NLS_CODEPAGE_861 is not set
1064# CONFIG_NLS_CODEPAGE_862 is not set
1065# CONFIG_NLS_CODEPAGE_863 is not set
1066# CONFIG_NLS_CODEPAGE_864 is not set
1067# CONFIG_NLS_CODEPAGE_865 is not set
1068# CONFIG_NLS_CODEPAGE_866 is not set
1069# CONFIG_NLS_CODEPAGE_869 is not set
1070# CONFIG_NLS_CODEPAGE_936 is not set
1071# CONFIG_NLS_CODEPAGE_950 is not set
1072# CONFIG_NLS_CODEPAGE_932 is not set
1073# CONFIG_NLS_CODEPAGE_949 is not set
1074# CONFIG_NLS_CODEPAGE_874 is not set
1075# CONFIG_NLS_ISO8859_8 is not set
1076# CONFIG_NLS_CODEPAGE_1250 is not set
1077# CONFIG_NLS_CODEPAGE_1251 is not set
1078# CONFIG_NLS_ASCII is not set
1079# CONFIG_NLS_ISO8859_1 is not set
1080# CONFIG_NLS_ISO8859_2 is not set
1081# CONFIG_NLS_ISO8859_3 is not set
1082# CONFIG_NLS_ISO8859_4 is not set
1083# CONFIG_NLS_ISO8859_5 is not set
1084# CONFIG_NLS_ISO8859_6 is not set
1085# CONFIG_NLS_ISO8859_7 is not set
1086# CONFIG_NLS_ISO8859_9 is not set
1087# CONFIG_NLS_ISO8859_13 is not set
1088# CONFIG_NLS_ISO8859_14 is not set
1089# CONFIG_NLS_ISO8859_15 is not set
1090# CONFIG_NLS_KOI8_R is not set
1091# CONFIG_NLS_KOI8_U is not set
1092# CONFIG_NLS_UTF8 is not set
1093
1094#
1095# Profiling support
1096#
1097# CONFIG_PROFILING is not set
1098
1099#
1100# Kernel hacking
1101#
1102# CONFIG_PRINTK_TIME is not set
1103CONFIG_ENABLE_MUST_CHECK=y
1104# CONFIG_MAGIC_SYSRQ is not set
1105# CONFIG_UNUSED_SYMBOLS is not set
1106# CONFIG_DEBUG_KERNEL is not set
1107CONFIG_LOG_BUF_SHIFT=14
1108CONFIG_DEBUG_BUGVERBOSE=y
1109# CONFIG_DEBUG_FS is not set
1110CONFIG_FRAME_POINTER=y
1111# CONFIG_HEADERS_CHECK is not set
1112CONFIG_DEBUG_USER=y
1113
1114#
1115# Security options
1116#
1117# CONFIG_KEYS is not set
1118# CONFIG_SECURITY is not set
1119
1120#
1121# Cryptographic options
1122#
1123# CONFIG_CRYPTO is not set
1124
1125#
1126# Library routines
1127#
1128CONFIG_CRC_CCITT=y
1129# CONFIG_CRC16 is not set
1130CONFIG_CRC32=y
1131CONFIG_LIBCRC32C=y
1132CONFIG_ZLIB_INFLATE=y
1133CONFIG_ZLIB_DEFLATE=y
1134CONFIG_PLIST=y
diff --git a/arch/arm/configs/kb9202_defconfig b/arch/arm/configs/kb9202_defconfig
index 89e116f955b1..c16537d9d67a 100644
--- a/arch/arm/configs/kb9202_defconfig
+++ b/arch/arm/configs/kb9202_defconfig
@@ -437,7 +437,7 @@ CONFIG_LEGACY_PTY_COUNT=256
437# CONFIG_WATCHDOG is not set 437# CONFIG_WATCHDOG is not set
438# CONFIG_NVRAM is not set 438# CONFIG_NVRAM is not set
439# CONFIG_RTC is not set 439# CONFIG_RTC is not set
440# CONFIG_AT91_RTC is not set 440# CONFIG_AT91RM9200_RTC is not set
441# CONFIG_DTLK is not set 441# CONFIG_DTLK is not set
442# CONFIG_R3964 is not set 442# CONFIG_R3964 is not set
443 443
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 6f12d2686aaf..238dd9b6db84 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -438,16 +438,19 @@ __early_param("initrd=", early_initrd);
438 438
439static void __init arm_add_memory(unsigned long start, unsigned long size) 439static void __init arm_add_memory(unsigned long start, unsigned long size)
440{ 440{
441 struct membank *bank;
442
441 /* 443 /*
442 * Ensure that start/size are aligned to a page boundary. 444 * Ensure that start/size are aligned to a page boundary.
443 * Size is appropriately rounded down, start is rounded up. 445 * Size is appropriately rounded down, start is rounded up.
444 */ 446 */
445 size -= start & ~PAGE_MASK; 447 size -= start & ~PAGE_MASK;
446 448
447 meminfo.bank[meminfo.nr_banks].start = PAGE_ALIGN(start); 449 bank = &meminfo.bank[meminfo.nr_banks++];
448 meminfo.bank[meminfo.nr_banks].size = size & PAGE_MASK; 450
449 meminfo.bank[meminfo.nr_banks].node = PHYS_TO_NID(start); 451 bank->start = PAGE_ALIGN(start);
450 meminfo.nr_banks += 1; 452 bank->size = size & PAGE_MASK;
453 bank->node = PHYS_TO_NID(start);
451} 454}
452 455
453/* 456/*
diff --git a/arch/arm/mach-at91rm9200/Kconfig b/arch/arm/mach-at91rm9200/Kconfig
index 2f85e8693b1b..9f11db8af233 100644
--- a/arch/arm/mach-at91rm9200/Kconfig
+++ b/arch/arm/mach-at91rm9200/Kconfig
@@ -2,7 +2,8 @@ if ARCH_AT91
2 2
3menu "Atmel AT91 System-on-Chip" 3menu "Atmel AT91 System-on-Chip"
4 4
5comment "Atmel AT91 Processors" 5choice
6 prompt "Atmel AT91 Processor"
6 7
7config ARCH_AT91RM9200 8config ARCH_AT91RM9200
8 bool "AT91RM9200" 9 bool "AT91RM9200"
@@ -13,6 +14,8 @@ config ARCH_AT91SAM9260
13config ARCH_AT91SAM9261 14config ARCH_AT91SAM9261
14 bool "AT91SAM9261" 15 bool "AT91SAM9261"
15 16
17endchoice
18
16# ---------------------------------------------------------- 19# ----------------------------------------------------------
17 20
18if ARCH_AT91RM9200 21if ARCH_AT91RM9200
@@ -33,7 +36,6 @@ config ARCH_AT91RM9200DK
33 Select this if you are using Atmel's AT91RM9200-DK Development board. 36 Select this if you are using Atmel's AT91RM9200-DK Development board.
34 (Discontinued) 37 (Discontinued)
35 38
36
37config MACH_AT91RM9200EK 39config MACH_AT91RM9200EK
38 bool "Atmel AT91RM9200-EK Evaluation Kit" 40 bool "Atmel AT91RM9200-EK Evaluation Kit"
39 depends on ARCH_AT91RM9200 41 depends on ARCH_AT91RM9200
@@ -90,6 +92,13 @@ if ARCH_AT91SAM9260
90 92
91comment "AT91SAM9260 Board Type" 93comment "AT91SAM9260 Board Type"
92 94
95config MACH_AT91SAM9260EK
96 bool "Atmel AT91SAM9260-EK Evaluation Kit"
97 depends on ARCH_AT91SAM9260
98 help
99 Select this if you are using Atmel's AT91SAM9260-EK Evaluation Kit.
100 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
101
93endif 102endif
94 103
95# ---------------------------------------------------------- 104# ----------------------------------------------------------
@@ -98,8 +107,31 @@ if ARCH_AT91SAM9261
98 107
99comment "AT91SAM9261 Board Type" 108comment "AT91SAM9261 Board Type"
100 109
110config MACH_AT91SAM9261EK
111 bool "Atmel AT91SAM9261-EK Evaluation Kit"
112 depends on ARCH_AT91SAM9261
113 help
114 Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit.
115 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820>
116
101endif 117endif
102 118
119# ----------------------------------------------------------
120
121comment "AT91 Board Options"
122
123config MTD_AT91_DATAFLASH_CARD
124 bool "Enable DataFlash Card support"
125 depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK)
126 help
127 Enable support for the DataFlash card.
128
129config MTD_NAND_AT91_BUSWIDTH_16
130 bool "Enable 16-bit data bus interface to NAND flash"
131 depends on (MACH_AT91SAM9261EK || MACH_AT91SAM9260EK)
132 help
133 On AT91SAM926x boards both types of NAND flash can be present
134 (8 and 16 bit data bus width).
103 135
104# ---------------------------------------------------------- 136# ----------------------------------------------------------
105 137
diff --git a/arch/arm/mach-at91rm9200/Makefile b/arch/arm/mach-at91rm9200/Makefile
index c174805c24e5..cf777007847a 100644
--- a/arch/arm/mach-at91rm9200/Makefile
+++ b/arch/arm/mach-at91rm9200/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4 4
5obj-y := clock.o irq.o gpio.o devices.o 5obj-y := clock.o irq.o gpio.o
6obj-m := 6obj-m :=
7obj-n := 7obj-n :=
8obj- := 8obj- :=
@@ -10,11 +10,11 @@ obj- :=
10obj-$(CONFIG_PM) += pm.o 10obj-$(CONFIG_PM) += pm.o
11 11
12# CPU-specific support 12# CPU-specific support
13obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o 13obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
14obj-$(CONFIG_ARCH_AT91SAM9260) += 14obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o
15obj-$(CONFIG_ARCH_AT91SAM9261) += 15obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o
16 16
17# AT91RM9200 Board-specific support 17# AT91RM9200 board-specific support
18obj-$(CONFIG_MACH_ONEARM) += board-1arm.o 18obj-$(CONFIG_MACH_ONEARM) += board-1arm.o
19obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o 19obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o
20obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o 20obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o
@@ -26,8 +26,10 @@ obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o
26obj-$(CONFIG_MACH_KAFA) += board-kafa.o 26obj-$(CONFIG_MACH_KAFA) += board-kafa.o
27 27
28# AT91SAM9260 board-specific support 28# AT91SAM9260 board-specific support
29obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
29 30
30# AT91SAM9261 board-specific support 31# AT91SAM9261 board-specific support
32obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
31 33
32# LEDs support 34# LEDs support
33led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o 35led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o
diff --git a/arch/arm/mach-at91rm9200/at91rm9200.c b/arch/arm/mach-at91rm9200/at91rm9200.c
index dcf6136fedf9..a92e9a495b07 100644
--- a/arch/arm/mach-at91rm9200/at91rm9200.c
+++ b/arch/arm/mach-at91rm9200/at91rm9200.c
@@ -14,8 +14,10 @@
14 14
15#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
16#include <asm/mach/map.h> 16#include <asm/mach/map.h>
17#include <asm/arch/at91rm9200.h>
18#include <asm/arch/at91_pmc.h>
19#include <asm/arch/at91_st.h>
17 20
18#include <asm/hardware.h>
19#include "generic.h" 21#include "generic.h"
20#include "clock.h" 22#include "clock.h"
21 23
@@ -26,32 +28,12 @@ static struct map_desc at91rm9200_io_desc[] __initdata = {
26 .length = SZ_4K, 28 .length = SZ_4K,
27 .type = MT_DEVICE, 29 .type = MT_DEVICE,
28 }, { 30 }, {
29 .virtual = AT91_VA_BASE_SPI,
30 .pfn = __phys_to_pfn(AT91RM9200_BASE_SPI),
31 .length = SZ_16K,
32 .type = MT_DEVICE,
33 }, {
34 .virtual = AT91_VA_BASE_EMAC, 31 .virtual = AT91_VA_BASE_EMAC,
35 .pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC), 32 .pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC),
36 .length = SZ_16K, 33 .length = SZ_16K,
37 .type = MT_DEVICE, 34 .type = MT_DEVICE,
38 }, { 35 }, {
39 .virtual = AT91_VA_BASE_TWI, 36 .virtual = AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE,
40 .pfn = __phys_to_pfn(AT91RM9200_BASE_TWI),
41 .length = SZ_16K,
42 .type = MT_DEVICE,
43 }, {
44 .virtual = AT91_VA_BASE_MCI,
45 .pfn = __phys_to_pfn(AT91RM9200_BASE_MCI),
46 .length = SZ_16K,
47 .type = MT_DEVICE,
48 }, {
49 .virtual = AT91_VA_BASE_UDP,
50 .pfn = __phys_to_pfn(AT91RM9200_BASE_UDP),
51 .length = SZ_16K,
52 .type = MT_DEVICE,
53 }, {
54 .virtual = AT91_SRAM_VIRT_BASE,
55 .pfn = __phys_to_pfn(AT91RM9200_SRAM_BASE), 37 .pfn = __phys_to_pfn(AT91RM9200_SRAM_BASE),
56 .length = AT91RM9200_SRAM_SIZE, 38 .length = AT91RM9200_SRAM_SIZE,
57 .type = MT_DEVICE, 39 .type = MT_DEVICE,
@@ -222,6 +204,16 @@ static struct at91_gpio_bank at91rm9200_gpio[] = {
222 } 204 }
223}; 205};
224 206
207static void at91rm9200_reset(void)
208{
209 /*
210 * Perform a hardware reset with the use of the Watchdog timer.
211 */
212 at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1);
213 at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
214}
215
216
225/* -------------------------------------------------------------------- 217/* --------------------------------------------------------------------
226 * AT91RM9200 processor initialization 218 * AT91RM9200 processor initialization
227 * -------------------------------------------------------------------- */ 219 * -------------------------------------------------------------------- */
@@ -230,6 +222,12 @@ void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks
230 /* Map peripherals */ 222 /* Map peripherals */
231 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); 223 iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
232 224
225 at91_arch_reset = at91rm9200_reset;
226 at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
227 | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
228 | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5)
229 | (1 << AT91RM9200_ID_IRQ6);
230
233 /* Init clock subsystem */ 231 /* Init clock subsystem */
234 at91_clock_init(main_clock); 232 at91_clock_init(main_clock);
235 233
diff --git a/arch/arm/mach-at91rm9200/devices.c b/arch/arm/mach-at91rm9200/at91rm9200_devices.c
index 059824376629..4641b99db0ee 100644
--- a/arch/arm/mach-at91rm9200/devices.c
+++ b/arch/arm/mach-at91rm9200/at91rm9200_devices.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/mach-at91rm9200/devices.c 2 * arch/arm/mach-at91rm9200/at91rm9200_devices.c
3 * 3 *
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org> 4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell 5 * Copyright (C) 2005 David Brownell
@@ -15,9 +15,10 @@
15 15
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17 17
18#include <asm/hardware.h>
19#include <asm/arch/board.h> 18#include <asm/arch/board.h>
20#include <asm/arch/gpio.h> 19#include <asm/arch/gpio.h>
20#include <asm/arch/at91rm9200.h>
21#include <asm/arch/at91rm9200_mc.h>
21 22
22#include "generic.h" 23#include "generic.h"
23 24
@@ -33,7 +34,7 @@
33static u64 ohci_dmamask = 0xffffffffUL; 34static u64 ohci_dmamask = 0xffffffffUL;
34static struct at91_usbh_data usbh_data; 35static struct at91_usbh_data usbh_data;
35 36
36static struct resource at91_usbh_resources[] = { 37static struct resource usbh_resources[] = {
37 [0] = { 38 [0] = {
38 .start = AT91RM9200_UHP_BASE, 39 .start = AT91RM9200_UHP_BASE,
39 .end = AT91RM9200_UHP_BASE + SZ_1M - 1, 40 .end = AT91RM9200_UHP_BASE + SZ_1M - 1,
@@ -54,8 +55,8 @@ static struct platform_device at91rm9200_usbh_device = {
54 .coherent_dma_mask = 0xffffffff, 55 .coherent_dma_mask = 0xffffffff,
55 .platform_data = &usbh_data, 56 .platform_data = &usbh_data,
56 }, 57 },
57 .resource = at91_usbh_resources, 58 .resource = usbh_resources,
58 .num_resources = ARRAY_SIZE(at91_usbh_resources), 59 .num_resources = ARRAY_SIZE(usbh_resources),
59}; 60};
60 61
61void __init at91_add_device_usbh(struct at91_usbh_data *data) 62void __init at91_add_device_usbh(struct at91_usbh_data *data)
@@ -78,7 +79,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
78#ifdef CONFIG_USB_GADGET_AT91 79#ifdef CONFIG_USB_GADGET_AT91
79static struct at91_udc_data udc_data; 80static struct at91_udc_data udc_data;
80 81
81static struct resource at91_udc_resources[] = { 82static struct resource udc_resources[] = {
82 [0] = { 83 [0] = {
83 .start = AT91RM9200_BASE_UDP, 84 .start = AT91RM9200_BASE_UDP,
84 .end = AT91RM9200_BASE_UDP + SZ_16K - 1, 85 .end = AT91RM9200_BASE_UDP + SZ_16K - 1,
@@ -97,8 +98,8 @@ static struct platform_device at91rm9200_udc_device = {
97 .dev = { 98 .dev = {
98 .platform_data = &udc_data, 99 .platform_data = &udc_data,
99 }, 100 },
100 .resource = at91_udc_resources, 101 .resource = udc_resources,
101 .num_resources = ARRAY_SIZE(at91_udc_resources), 102 .num_resources = ARRAY_SIZE(udc_resources),
102}; 103};
103 104
104void __init at91_add_device_udc(struct at91_udc_data *data) 105void __init at91_add_device_udc(struct at91_udc_data *data)
@@ -129,7 +130,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
129static u64 eth_dmamask = 0xffffffffUL; 130static u64 eth_dmamask = 0xffffffffUL;
130static struct at91_eth_data eth_data; 131static struct at91_eth_data eth_data;
131 132
132static struct resource at91_eth_resources[] = { 133static struct resource eth_resources[] = {
133 [0] = { 134 [0] = {
134 .start = AT91_VA_BASE_EMAC, 135 .start = AT91_VA_BASE_EMAC,
135 .end = AT91_VA_BASE_EMAC + SZ_16K - 1, 136 .end = AT91_VA_BASE_EMAC + SZ_16K - 1,
@@ -150,8 +151,8 @@ static struct platform_device at91rm9200_eth_device = {
150 .coherent_dma_mask = 0xffffffff, 151 .coherent_dma_mask = 0xffffffff,
151 .platform_data = &eth_data, 152 .platform_data = &eth_data,
152 }, 153 },
153 .resource = at91_eth_resources, 154 .resource = eth_resources,
154 .num_resources = ARRAY_SIZE(at91_eth_resources), 155 .num_resources = ARRAY_SIZE(eth_resources),
155}; 156};
156 157
157void __init at91_add_device_eth(struct at91_eth_data *data) 158void __init at91_add_device_eth(struct at91_eth_data *data)
@@ -202,11 +203,13 @@ void __init at91_add_device_eth(struct at91_eth_data *data) {}
202#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) 203#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
203static struct at91_cf_data cf_data; 204static struct at91_cf_data cf_data;
204 205
205static struct resource at91_cf_resources[] = { 206#define CF_BASE AT91_CHIPSELECT_4
207
208static struct resource cf_resources[] = {
206 [0] = { 209 [0] = {
207 .start = AT91_CF_BASE, 210 .start = CF_BASE,
208 /* ties up CS4, CS5 and CS6 */ 211 /* ties up CS4, CS5 and CS6 */
209 .end = AT91_CF_BASE + (0x30000000 - 1), 212 .end = CF_BASE + (0x30000000 - 1),
210 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT, 213 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
211 }, 214 },
212}; 215};
@@ -217,15 +220,38 @@ static struct platform_device at91rm9200_cf_device = {
217 .dev = { 220 .dev = {
218 .platform_data = &cf_data, 221 .platform_data = &cf_data,
219 }, 222 },
220 .resource = at91_cf_resources, 223 .resource = cf_resources,
221 .num_resources = ARRAY_SIZE(at91_cf_resources), 224 .num_resources = ARRAY_SIZE(cf_resources),
222}; 225};
223 226
224void __init at91_add_device_cf(struct at91_cf_data *data) 227void __init at91_add_device_cf(struct at91_cf_data *data)
225{ 228{
229 unsigned int csa;
230
226 if (!data) 231 if (!data)
227 return; 232 return;
228 233
234 data->chipselect = 4; /* can only use EBI ChipSelect 4 */
235
236 /* CF takes over CS4, CS5, CS6 */
237 csa = at91_sys_read(AT91_EBI_CSA);
238 at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
239
240 /*
241 * Static memory controller timing adjustments.
242 * REVISIT: these timings are in terms of MCK cycles, so
243 * when MCK changes (cpufreq etc) so must these values...
244 */
245 at91_sys_write(AT91_SMC_CSR(4),
246 AT91_SMC_ACSS_STD
247 | AT91_SMC_DBW_16
248 | AT91_SMC_BAT
249 | AT91_SMC_WSEN
250 | AT91_SMC_NWS_(32) /* wait states */
251 | AT91_SMC_RWSETUP_(6) /* setup time */
252 | AT91_SMC_RWHOLD_(4) /* hold time */
253 );
254
229 /* input/irq */ 255 /* input/irq */
230 if (data->irq_pin) { 256 if (data->irq_pin) {
231 at91_set_gpio_input(data->irq_pin, 1); 257 at91_set_gpio_input(data->irq_pin, 1);
@@ -245,6 +271,9 @@ void __init at91_add_device_cf(struct at91_cf_data *data)
245 at91_set_A_periph(AT91_PIN_PC11, 0); /* NCS5/CFCE1 */ 271 at91_set_A_periph(AT91_PIN_PC11, 0); /* NCS5/CFCE1 */
246 at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */ 272 at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */
247 273
274 /* nWAIT is _not_ a default setting */
275 at91_set_A_periph(AT91_PIN_PC6, 1); /* nWAIT */
276
248 cf_data = *data; 277 cf_data = *data;
249 platform_device_register(&at91rm9200_cf_device); 278 platform_device_register(&at91rm9200_cf_device);
250} 279}
@@ -257,11 +286,11 @@ void __init at91_add_device_cf(struct at91_cf_data *data) {}
257 * MMC / SD 286 * MMC / SD
258 * -------------------------------------------------------------------- */ 287 * -------------------------------------------------------------------- */
259 288
260#if defined(CONFIG_MMC_AT91RM9200) || defined(CONFIG_MMC_AT91RM9200_MODULE) 289#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
261static u64 mmc_dmamask = 0xffffffffUL; 290static u64 mmc_dmamask = 0xffffffffUL;
262static struct at91_mmc_data mmc_data; 291static struct at91_mmc_data mmc_data;
263 292
264static struct resource at91_mmc_resources[] = { 293static struct resource mmc_resources[] = {
265 [0] = { 294 [0] = {
266 .start = AT91RM9200_BASE_MCI, 295 .start = AT91RM9200_BASE_MCI,
267 .end = AT91RM9200_BASE_MCI + SZ_16K - 1, 296 .end = AT91RM9200_BASE_MCI + SZ_16K - 1,
@@ -282,8 +311,8 @@ static struct platform_device at91rm9200_mmc_device = {
282 .coherent_dma_mask = 0xffffffff, 311 .coherent_dma_mask = 0xffffffff,
283 .platform_data = &mmc_data, 312 .platform_data = &mmc_data,
284 }, 313 },
285 .resource = at91_mmc_resources, 314 .resource = mmc_resources,
286 .num_resources = ARRAY_SIZE(at91_mmc_resources), 315 .num_resources = ARRAY_SIZE(mmc_resources),
287}; 316};
288 317
289void __init at91_add_device_mmc(struct at91_mmc_data *data) 318void __init at91_add_device_mmc(struct at91_mmc_data *data)
@@ -298,31 +327,33 @@ void __init at91_add_device_mmc(struct at91_mmc_data *data)
298 } 327 }
299 if (data->wp_pin) 328 if (data->wp_pin)
300 at91_set_gpio_input(data->wp_pin, 1); 329 at91_set_gpio_input(data->wp_pin, 1);
330 if (data->vcc_pin)
331 at91_set_gpio_output(data->vcc_pin, 0);
301 332
302 /* CLK */ 333 /* CLK */
303 at91_set_A_periph(AT91_PIN_PA27, 0); 334 at91_set_A_periph(AT91_PIN_PA27, 0);
304 335
305 if (data->is_b) { 336 if (data->slot_b) {
306 /* CMD */ 337 /* CMD */
307 at91_set_B_periph(AT91_PIN_PA8, 0); 338 at91_set_B_periph(AT91_PIN_PA8, 1);
308 339
309 /* DAT0, maybe DAT1..DAT3 */ 340 /* DAT0, maybe DAT1..DAT3 */
310 at91_set_B_periph(AT91_PIN_PA9, 0); 341 at91_set_B_periph(AT91_PIN_PA9, 1);
311 if (data->wire4) { 342 if (data->wire4) {
312 at91_set_B_periph(AT91_PIN_PA10, 0); 343 at91_set_B_periph(AT91_PIN_PA10, 1);
313 at91_set_B_periph(AT91_PIN_PA11, 0); 344 at91_set_B_periph(AT91_PIN_PA11, 1);
314 at91_set_B_periph(AT91_PIN_PA12, 0); 345 at91_set_B_periph(AT91_PIN_PA12, 1);
315 } 346 }
316 } else { 347 } else {
317 /* CMD */ 348 /* CMD */
318 at91_set_A_periph(AT91_PIN_PA28, 0); 349 at91_set_A_periph(AT91_PIN_PA28, 1);
319 350
320 /* DAT0, maybe DAT1..DAT3 */ 351 /* DAT0, maybe DAT1..DAT3 */
321 at91_set_A_periph(AT91_PIN_PA29, 0); 352 at91_set_A_periph(AT91_PIN_PA29, 1);
322 if (data->wire4) { 353 if (data->wire4) {
323 at91_set_B_periph(AT91_PIN_PB3, 0); 354 at91_set_B_periph(AT91_PIN_PB3, 1);
324 at91_set_B_periph(AT91_PIN_PB4, 0); 355 at91_set_B_periph(AT91_PIN_PB4, 1);
325 at91_set_B_periph(AT91_PIN_PB5, 0); 356 at91_set_B_periph(AT91_PIN_PB5, 1);
326 } 357 }
327 } 358 }
328 359
@@ -341,29 +372,45 @@ void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
341#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE) 372#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
342static struct at91_nand_data nand_data; 373static struct at91_nand_data nand_data;
343 374
344static struct resource at91_nand_resources[] = { 375#define NAND_BASE AT91_CHIPSELECT_3
376
377static struct resource nand_resources[] = {
345 { 378 {
346 .start = AT91_SMARTMEDIA_BASE, 379 .start = NAND_BASE,
347 .end = AT91_SMARTMEDIA_BASE + SZ_8M - 1, 380 .end = NAND_BASE + SZ_8M - 1,
348 .flags = IORESOURCE_MEM, 381 .flags = IORESOURCE_MEM,
349 } 382 }
350}; 383};
351 384
352static struct platform_device at91_nand_device = { 385static struct platform_device at91rm9200_nand_device = {
353 .name = "at91_nand", 386 .name = "at91_nand",
354 .id = -1, 387 .id = -1,
355 .dev = { 388 .dev = {
356 .platform_data = &nand_data, 389 .platform_data = &nand_data,
357 }, 390 },
358 .resource = at91_nand_resources, 391 .resource = nand_resources,
359 .num_resources = ARRAY_SIZE(at91_nand_resources), 392 .num_resources = ARRAY_SIZE(nand_resources),
360}; 393};
361 394
362void __init at91_add_device_nand(struct at91_nand_data *data) 395void __init at91_add_device_nand(struct at91_nand_data *data)
363{ 396{
397 unsigned int csa;
398
364 if (!data) 399 if (!data)
365 return; 400 return;
366 401
402 /* enable the address range of CS3 */
403 csa = at91_sys_read(AT91_EBI_CSA);
404 at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
405
406 /* set the bus interface characteristics */
407 at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
408 | AT91_SMC_NWS_(5)
409 | AT91_SMC_TDF_(1)
410 | AT91_SMC_RWSETUP_(0) /* tDS Data Set up Time 30 - ns */
411 | AT91_SMC_RWHOLD_(1) /* tDH Data Hold Time 20 - ns */
412 );
413
367 /* enable pin */ 414 /* enable pin */
368 if (data->enable_pin) 415 if (data->enable_pin)
369 at91_set_gpio_output(data->enable_pin, 1); 416 at91_set_gpio_output(data->enable_pin, 1);
@@ -380,7 +427,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data)
380 at91_set_A_periph(AT91_PIN_PC3, 0); /* SMWE */ 427 at91_set_A_periph(AT91_PIN_PC3, 0); /* SMWE */
381 428
382 nand_data = *data; 429 nand_data = *data;
383 platform_device_register(&at91_nand_device); 430 platform_device_register(&at91rm9200_nand_device);
384} 431}
385#else 432#else
386void __init at91_add_device_nand(struct at91_nand_data *data) {} 433void __init at91_add_device_nand(struct at91_nand_data *data) {}
@@ -392,10 +439,25 @@ void __init at91_add_device_nand(struct at91_nand_data *data) {}
392 * -------------------------------------------------------------------- */ 439 * -------------------------------------------------------------------- */
393 440
394#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE) 441#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
442
443static struct resource twi_resources[] = {
444 [0] = {
445 .start = AT91RM9200_BASE_TWI,
446 .end = AT91RM9200_BASE_TWI + SZ_16K - 1,
447 .flags = IORESOURCE_MEM,
448 },
449 [1] = {
450 .start = AT91RM9200_ID_TWI,
451 .end = AT91RM9200_ID_TWI,
452 .flags = IORESOURCE_IRQ,
453 },
454};
455
395static struct platform_device at91rm9200_twi_device = { 456static struct platform_device at91rm9200_twi_device = {
396 .name = "at91_i2c", 457 .name = "at91_i2c",
397 .id = -1, 458 .id = -1,
398 .num_resources = 0, 459 .resource = twi_resources,
460 .num_resources = ARRAY_SIZE(twi_resources),
399}; 461};
400 462
401void __init at91_add_device_i2c(void) 463void __init at91_add_device_i2c(void)
@@ -421,7 +483,7 @@ void __init at91_add_device_i2c(void) {}
421#if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE) 483#if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)
422static u64 spi_dmamask = 0xffffffffUL; 484static u64 spi_dmamask = 0xffffffffUL;
423 485
424static struct resource at91_spi_resources[] = { 486static struct resource spi_resources[] = {
425 [0] = { 487 [0] = {
426 .start = AT91RM9200_BASE_SPI, 488 .start = AT91RM9200_BASE_SPI,
427 .end = AT91RM9200_BASE_SPI + SZ_16K - 1, 489 .end = AT91RM9200_BASE_SPI + SZ_16K - 1,
@@ -438,14 +500,14 @@ static struct platform_device at91rm9200_spi_device = {
438 .name = "at91_spi", 500 .name = "at91_spi",
439 .id = 0, 501 .id = 0,
440 .dev = { 502 .dev = {
441 .dma_mask = &spi_dmamask, 503 .dma_mask = &spi_dmamask,
442 .coherent_dma_mask = 0xffffffff, 504 .coherent_dma_mask = 0xffffffff,
443 }, 505 },
444 .resource = at91_spi_resources, 506 .resource = spi_resources,
445 .num_resources = ARRAY_SIZE(at91_spi_resources), 507 .num_resources = ARRAY_SIZE(spi_resources),
446}; 508};
447 509
448static const unsigned at91_spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 }; 510static const unsigned spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
449 511
450void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) 512void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
451{ 513{
@@ -461,7 +523,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
461 if (devices[i].controller_data) 523 if (devices[i].controller_data)
462 cs_pin = (unsigned long) devices[i].controller_data; 524 cs_pin = (unsigned long) devices[i].controller_data;
463 else 525 else
464 cs_pin = at91_spi_standard_cs[devices[i].chip_select]; 526 cs_pin = spi_standard_cs[devices[i].chip_select];
465 527
466#ifdef CONFIG_SPI_AT91_MANUAL_CS 528#ifdef CONFIG_SPI_AT91_MANUAL_CS
467 at91_set_gpio_output(cs_pin, 1); 529 at91_set_gpio_output(cs_pin, 1);
@@ -474,7 +536,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
474 } 536 }
475 537
476 spi_register_board_info(devices, nr_devices); 538 spi_register_board_info(devices, nr_devices);
477 at91_clock_associate("spi0_clk", &at91rm9200_spi_device.dev, "spi"); 539 at91_clock_associate("spi_clk", &at91rm9200_spi_device.dev, "spi");
478 platform_device_register(&at91rm9200_spi_device); 540 platform_device_register(&at91rm9200_spi_device);
479} 541}
480#else 542#else
@@ -486,7 +548,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
486 * RTC 548 * RTC
487 * -------------------------------------------------------------------- */ 549 * -------------------------------------------------------------------- */
488 550
489#if defined(CONFIG_RTC_DRV_AT91) || defined(CONFIG_RTC_DRV_AT91_MODULE) 551#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
490static struct platform_device at91rm9200_rtc_device = { 552static struct platform_device at91rm9200_rtc_device = {
491 .name = "at91_rtc", 553 .name = "at91_rtc",
492 .id = -1, 554 .id = -1,
@@ -506,7 +568,7 @@ static void __init at91_add_device_rtc(void) {}
506 * Watchdog 568 * Watchdog
507 * -------------------------------------------------------------------- */ 569 * -------------------------------------------------------------------- */
508 570
509#if defined(CONFIG_AT91_WATCHDOG) || defined(CONFIG_AT91_WATCHDOG_MODULE) 571#if defined(CONFIG_AT91RM9200_WATCHDOG) || defined(CONFIG_AT91RM9200_WATCHDOG_MODULE)
510static struct platform_device at91rm9200_wdt_device = { 572static struct platform_device at91rm9200_wdt_device = {
511 .name = "at91_wdt", 573 .name = "at91_wdt",
512 .id = -1, 574 .id = -1,
diff --git a/arch/arm/mach-at91rm9200/at91rm9200_time.c b/arch/arm/mach-at91rm9200/at91rm9200_time.c
index 07c9cea8961d..b999e192a7e9 100644
--- a/arch/arm/mach-at91rm9200/at91rm9200_time.c
+++ b/arch/arm/mach-at91rm9200/at91rm9200_time.c
@@ -30,6 +30,8 @@
30#include <asm/io.h> 30#include <asm/io.h>
31#include <asm/mach/time.h> 31#include <asm/mach/time.h>
32 32
33#include <asm/arch/at91_st.h>
34
33static unsigned long last_crtr; 35static unsigned long last_crtr;
34 36
35/* 37/*
@@ -99,6 +101,9 @@ void at91rm9200_timer_reset(void)
99 /* Set Period Interval timer */ 101 /* Set Period Interval timer */
100 at91_sys_write(AT91_ST_PIMR, LATCH); 102 at91_sys_write(AT91_ST_PIMR, LATCH);
101 103
104 /* Clear any pending interrupts */
105 (void) at91_sys_read(AT91_ST_SR);
106
102 /* Enable Period Interval Timer interrupt */ 107 /* Enable Period Interval Timer interrupt */
103 at91_sys_write(AT91_ST_IER, AT91_ST_PITS); 108 at91_sys_write(AT91_ST_IER, AT91_ST_PITS);
104} 109}
diff --git a/arch/arm/mach-at91rm9200/at91sam9260.c b/arch/arm/mach-at91rm9200/at91sam9260.c
new file mode 100644
index 000000000000..203f073a53e6
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/at91sam9260.c
@@ -0,0 +1,294 @@
1/*
2 * arch/arm/mach-at91rm9200/at91sam9260.c
3 *
4 * Copyright (C) 2006 SAN People
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12
13#include <linux/module.h>
14
15#include <asm/mach/arch.h>
16#include <asm/mach/map.h>
17#include <asm/arch/at91sam9260.h>
18#include <asm/arch/at91_pmc.h>
19
20#include "generic.h"
21#include "clock.h"
22
23static struct map_desc at91sam9260_io_desc[] __initdata = {
24 {
25 .virtual = AT91_VA_BASE_SYS,
26 .pfn = __phys_to_pfn(AT91_BASE_SYS),
27 .length = SZ_16K,
28 .type = MT_DEVICE,
29 }, {
30 .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE,
31 .pfn = __phys_to_pfn(AT91SAM9260_SRAM0_BASE),
32 .length = AT91SAM9260_SRAM0_SIZE,
33 .type = MT_DEVICE,
34 }, {
35 .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE - AT91SAM9260_SRAM1_SIZE,
36 .pfn = __phys_to_pfn(AT91SAM9260_SRAM1_BASE),
37 .length = AT91SAM9260_SRAM1_SIZE,
38 .type = MT_DEVICE,
39 },
40};
41
42/* --------------------------------------------------------------------
43 * Clocks
44 * -------------------------------------------------------------------- */
45
46/*
47 * The peripheral clocks.
48 */
49static struct clk pioA_clk = {
50 .name = "pioA_clk",
51 .pmc_mask = 1 << AT91SAM9260_ID_PIOA,
52 .type = CLK_TYPE_PERIPHERAL,
53};
54static struct clk pioB_clk = {
55 .name = "pioB_clk",
56 .pmc_mask = 1 << AT91SAM9260_ID_PIOB,
57 .type = CLK_TYPE_PERIPHERAL,
58};
59static struct clk pioC_clk = {
60 .name = "pioC_clk",
61 .pmc_mask = 1 << AT91SAM9260_ID_PIOC,
62 .type = CLK_TYPE_PERIPHERAL,
63};
64static struct clk adc_clk = {
65 .name = "adc_clk",
66 .pmc_mask = 1 << AT91SAM9260_ID_ADC,
67 .type = CLK_TYPE_PERIPHERAL,
68};
69static struct clk usart0_clk = {
70 .name = "usart0_clk",
71 .pmc_mask = 1 << AT91SAM9260_ID_US0,
72 .type = CLK_TYPE_PERIPHERAL,
73};
74static struct clk usart1_clk = {
75 .name = "usart1_clk",
76 .pmc_mask = 1 << AT91SAM9260_ID_US1,
77 .type = CLK_TYPE_PERIPHERAL,
78};
79static struct clk usart2_clk = {
80 .name = "usart2_clk",
81 .pmc_mask = 1 << AT91SAM9260_ID_US2,
82 .type = CLK_TYPE_PERIPHERAL,
83};
84static struct clk mmc_clk = {
85 .name = "mci_clk",
86 .pmc_mask = 1 << AT91SAM9260_ID_MCI,
87 .type = CLK_TYPE_PERIPHERAL,
88};
89static struct clk udc_clk = {
90 .name = "udc_clk",
91 .pmc_mask = 1 << AT91SAM9260_ID_UDP,
92 .type = CLK_TYPE_PERIPHERAL,
93};
94static struct clk twi_clk = {
95 .name = "twi_clk",
96 .pmc_mask = 1 << AT91SAM9260_ID_TWI,
97 .type = CLK_TYPE_PERIPHERAL,
98};
99static struct clk spi0_clk = {
100 .name = "spi0_clk",
101 .pmc_mask = 1 << AT91SAM9260_ID_SPI0,
102 .type = CLK_TYPE_PERIPHERAL,
103};
104static struct clk spi1_clk = {
105 .name = "spi1_clk",
106 .pmc_mask = 1 << AT91SAM9260_ID_SPI1,
107 .type = CLK_TYPE_PERIPHERAL,
108};
109static struct clk ohci_clk = {
110 .name = "ohci_clk",
111 .pmc_mask = 1 << AT91SAM9260_ID_UHP,
112 .type = CLK_TYPE_PERIPHERAL,
113};
114static struct clk ether_clk = {
115 .name = "ether_clk",
116 .pmc_mask = 1 << AT91SAM9260_ID_EMAC,
117 .type = CLK_TYPE_PERIPHERAL,
118};
119static struct clk isi_clk = {
120 .name = "isi_clk",
121 .pmc_mask = 1 << AT91SAM9260_ID_ISI,
122 .type = CLK_TYPE_PERIPHERAL,
123};
124static struct clk usart3_clk = {
125 .name = "usart3_clk",
126 .pmc_mask = 1 << AT91SAM9260_ID_US3,
127 .type = CLK_TYPE_PERIPHERAL,
128};
129static struct clk usart4_clk = {
130 .name = "usart4_clk",
131 .pmc_mask = 1 << AT91SAM9260_ID_US4,
132 .type = CLK_TYPE_PERIPHERAL,
133};
134static struct clk usart5_clk = {
135 .name = "usart5_clk",
136 .pmc_mask = 1 << AT91SAM9260_ID_US5,
137 .type = CLK_TYPE_PERIPHERAL,
138};
139
140static struct clk *periph_clocks[] __initdata = {
141 &pioA_clk,
142 &pioB_clk,
143 &pioC_clk,
144 &adc_clk,
145 &usart0_clk,
146 &usart1_clk,
147 &usart2_clk,
148 &mmc_clk,
149 &udc_clk,
150 &twi_clk,
151 &spi0_clk,
152 &spi1_clk,
153 // ssc
154 // tc0 .. tc2
155 &ohci_clk,
156 &ether_clk,
157 &isi_clk,
158 &usart3_clk,
159 &usart4_clk,
160 &usart5_clk,
161 // tc3 .. tc5
162 // irq0 .. irq2
163};
164
165/*
166 * The two programmable clocks.
167 * You must configure pin multiplexing to bring these signals out.
168 */
169static struct clk pck0 = {
170 .name = "pck0",
171 .pmc_mask = AT91_PMC_PCK0,
172 .type = CLK_TYPE_PROGRAMMABLE,
173 .id = 0,
174};
175static struct clk pck1 = {
176 .name = "pck1",
177 .pmc_mask = AT91_PMC_PCK1,
178 .type = CLK_TYPE_PROGRAMMABLE,
179 .id = 1,
180};
181
182static void __init at91sam9260_register_clocks(void)
183{
184 int i;
185
186 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
187 clk_register(periph_clocks[i]);
188
189 clk_register(&pck0);
190 clk_register(&pck1);
191}
192
193/* --------------------------------------------------------------------
194 * GPIO
195 * -------------------------------------------------------------------- */
196
197static struct at91_gpio_bank at91sam9260_gpio[] = {
198 {
199 .id = AT91SAM9260_ID_PIOA,
200 .offset = AT91_PIOA,
201 .clock = &pioA_clk,
202 }, {
203 .id = AT91SAM9260_ID_PIOB,
204 .offset = AT91_PIOB,
205 .clock = &pioB_clk,
206 }, {
207 .id = AT91SAM9260_ID_PIOC,
208 .offset = AT91_PIOC,
209 .clock = &pioC_clk,
210 }
211};
212
213static void at91sam9260_reset(void)
214{
215#warning "Implement CPU reset"
216}
217
218
219/* --------------------------------------------------------------------
220 * AT91SAM9260 processor initialization
221 * -------------------------------------------------------------------- */
222
223void __init at91sam9260_initialize(unsigned long main_clock)
224{
225 /* Map peripherals */
226 iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc));
227
228 at91_arch_reset = at91sam9260_reset;
229 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
230 | (1 << AT91SAM9260_ID_IRQ2);
231
232 /* Init clock subsystem */
233 at91_clock_init(main_clock);
234
235 /* Register the processor-specific clocks */
236 at91sam9260_register_clocks();
237
238 /* Register GPIO subsystem */
239 at91_gpio_init(at91sam9260_gpio, 3);
240}
241
242/* --------------------------------------------------------------------
243 * Interrupt initialization
244 * -------------------------------------------------------------------- */
245
246/*
247 * The default interrupt priority levels (0 = lowest, 7 = highest).
248 */
249static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
250 7, /* Advanced Interrupt Controller */
251 7, /* System Peripherals */
252 0, /* Parallel IO Controller A */
253 0, /* Parallel IO Controller B */
254 0, /* Parallel IO Controller C */
255 0, /* Analog-to-Digital Converter */
256 6, /* USART 0 */
257 6, /* USART 1 */
258 6, /* USART 2 */
259 0, /* Multimedia Card Interface */
260 4, /* USB Device Port */
261 0, /* Two-Wire Interface */
262 6, /* Serial Peripheral Interface 0 */
263 6, /* Serial Peripheral Interface 1 */
264 5, /* Serial Synchronous Controller */
265 0,
266 0,
267 0, /* Timer Counter 0 */
268 0, /* Timer Counter 1 */
269 0, /* Timer Counter 2 */
270 3, /* USB Host port */
271 3, /* Ethernet */
272 0, /* Image Sensor Interface */
273 6, /* USART 3 */
274 6, /* USART 4 */
275 6, /* USART 5 */
276 0, /* Timer Counter 3 */
277 0, /* Timer Counter 4 */
278 0, /* Timer Counter 5 */
279 0, /* Advanced Interrupt Controller */
280 0, /* Advanced Interrupt Controller */
281 0, /* Advanced Interrupt Controller */
282};
283
284void __init at91sam9260_init_interrupts(unsigned int priority[NR_AIC_IRQS])
285{
286 if (!priority)
287 priority = at91sam9260_default_irq_priority;
288
289 /* Initialize the AIC interrupt controller */
290 at91_aic_init(priority);
291
292 /* Enable GPIO interrupts */
293 at91_gpio_irq_setup();
294}
diff --git a/arch/arm/mach-at91rm9200/at91sam9260_devices.c b/arch/arm/mach-at91rm9200/at91sam9260_devices.c
new file mode 100644
index 000000000000..a6c596dc4516
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/at91sam9260_devices.c
@@ -0,0 +1,866 @@
1/*
2 * arch/arm/mach-at91rm9200/at91sam9260_devices.c
3 *
4 * Copyright (C) 2006 Atmel
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12#include <asm/mach/arch.h>
13#include <asm/mach/map.h>
14
15#include <linux/platform_device.h>
16
17#include <asm/arch/board.h>
18#include <asm/arch/gpio.h>
19#include <asm/arch/at91sam9260.h>
20#include <asm/arch/at91sam926x_mc.h>
21
22#include "generic.h"
23
24#define SZ_512 0x00000200
25#define SZ_256 0x00000100
26#define SZ_16 0x00000010
27
28/* --------------------------------------------------------------------
29 * USB Host
30 * -------------------------------------------------------------------- */
31
32#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
33static u64 ohci_dmamask = 0xffffffffUL;
34static struct at91_usbh_data usbh_data;
35
36static struct resource usbh_resources[] = {
37 [0] = {
38 .start = AT91SAM9260_UHP_BASE,
39 .end = AT91SAM9260_UHP_BASE + SZ_1M - 1,
40 .flags = IORESOURCE_MEM,
41 },
42 [1] = {
43 .start = AT91SAM9260_ID_UHP,
44 .end = AT91SAM9260_ID_UHP,
45 .flags = IORESOURCE_IRQ,
46 },
47};
48
49static struct platform_device at91_usbh_device = {
50 .name = "at91_ohci",
51 .id = -1,
52 .dev = {
53 .dma_mask = &ohci_dmamask,
54 .coherent_dma_mask = 0xffffffff,
55 .platform_data = &usbh_data,
56 },
57 .resource = usbh_resources,
58 .num_resources = ARRAY_SIZE(usbh_resources),
59};
60
61void __init at91_add_device_usbh(struct at91_usbh_data *data)
62{
63 if (!data)
64 return;
65
66 usbh_data = *data;
67 platform_device_register(&at91_usbh_device);
68}
69#else
70void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
71#endif
72
73
74/* --------------------------------------------------------------------
75 * USB Device (Gadget)
76 * -------------------------------------------------------------------- */
77
78#ifdef CONFIG_USB_GADGET_AT91
79static struct at91_udc_data udc_data;
80
81static struct resource udc_resources[] = {
82 [0] = {
83 .start = AT91SAM9260_BASE_UDP,
84 .end = AT91SAM9260_BASE_UDP + SZ_16K - 1,
85 .flags = IORESOURCE_MEM,
86 },
87 [1] = {
88 .start = AT91SAM9260_ID_UDP,
89 .end = AT91SAM9260_ID_UDP,
90 .flags = IORESOURCE_IRQ,
91 },
92};
93
94static struct platform_device at91_udc_device = {
95 .name = "at91_udc",
96 .id = -1,
97 .dev = {
98 .platform_data = &udc_data,
99 },
100 .resource = udc_resources,
101 .num_resources = ARRAY_SIZE(udc_resources),
102};
103
104void __init at91_add_device_udc(struct at91_udc_data *data)
105{
106 if (!data)
107 return;
108
109 if (data->vbus_pin) {
110 at91_set_gpio_input(data->vbus_pin, 0);
111 at91_set_deglitch(data->vbus_pin, 1);
112 }
113
114 /* Pullup pin is handled internally by USB device peripheral */
115
116 udc_data = *data;
117 platform_device_register(&at91_udc_device);
118}
119#else
120void __init at91_add_device_udc(struct at91_udc_data *data) {}
121#endif
122
123
124/* --------------------------------------------------------------------
125 * Ethernet
126 * -------------------------------------------------------------------- */
127
128#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
129static u64 eth_dmamask = 0xffffffffUL;
130static struct eth_platform_data eth_data;
131
132static struct resource eth_resources[] = {
133 [0] = {
134 .start = AT91SAM9260_BASE_EMAC,
135 .end = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
136 .flags = IORESOURCE_MEM,
137 },
138 [1] = {
139 .start = AT91SAM9260_ID_EMAC,
140 .end = AT91SAM9260_ID_EMAC,
141 .flags = IORESOURCE_IRQ,
142 },
143};
144
145static struct platform_device at91sam9260_eth_device = {
146 .name = "macb",
147 .id = -1,
148 .dev = {
149 .dma_mask = &eth_dmamask,
150 .coherent_dma_mask = 0xffffffff,
151 .platform_data = &eth_data,
152 },
153 .resource = eth_resources,
154 .num_resources = ARRAY_SIZE(eth_resources),
155};
156
157void __init at91_add_device_eth(struct eth_platform_data *data)
158{
159 if (!data)
160 return;
161
162 if (data->phy_irq_pin) {
163 at91_set_gpio_input(data->phy_irq_pin, 0);
164 at91_set_deglitch(data->phy_irq_pin, 1);
165 }
166
167 /* Pins used for MII and RMII */
168 at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
169 at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
170 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
171 at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
172 at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
173 at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
174 at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
175 at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
176 at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
177 at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
178
179 if (!data->is_rmii) {
180 at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
181 at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
182 at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
183 at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
184 at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
185 at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
186 at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
187 at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
188 }
189
190 eth_data = *data;
191 platform_device_register(&at91sam9260_eth_device);
192}
193#else
194void __init at91_add_device_eth(struct eth_platform_data *data) {}
195#endif
196
197
198/* --------------------------------------------------------------------
199 * MMC / SD
200 * -------------------------------------------------------------------- */
201
202#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
203static u64 mmc_dmamask = 0xffffffffUL;
204static struct at91_mmc_data mmc_data;
205
206static struct resource mmc_resources[] = {
207 [0] = {
208 .start = AT91SAM9260_BASE_MCI,
209 .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
210 .flags = IORESOURCE_MEM,
211 },
212 [1] = {
213 .start = AT91SAM9260_ID_MCI,
214 .end = AT91SAM9260_ID_MCI,
215 .flags = IORESOURCE_IRQ,
216 },
217};
218
219static struct platform_device at91sam9260_mmc_device = {
220 .name = "at91_mci",
221 .id = -1,
222 .dev = {
223 .dma_mask = &mmc_dmamask,
224 .coherent_dma_mask = 0xffffffff,
225 .platform_data = &mmc_data,
226 },
227 .resource = mmc_resources,
228 .num_resources = ARRAY_SIZE(mmc_resources),
229};
230
231void __init at91_add_device_mmc(struct at91_mmc_data *data)
232{
233 if (!data)
234 return;
235
236 /* input/irq */
237 if (data->det_pin) {
238 at91_set_gpio_input(data->det_pin, 1);
239 at91_set_deglitch(data->det_pin, 1);
240 }
241 if (data->wp_pin)
242 at91_set_gpio_input(data->wp_pin, 1);
243 if (data->vcc_pin)
244 at91_set_gpio_output(data->vcc_pin, 0);
245
246 /* CLK */
247 at91_set_A_periph(AT91_PIN_PA8, 0);
248
249 if (data->slot_b) {
250 /* CMD */
251 at91_set_B_periph(AT91_PIN_PA1, 1);
252
253 /* DAT0, maybe DAT1..DAT3 */
254 at91_set_B_periph(AT91_PIN_PA0, 1);
255 if (data->wire4) {
256 at91_set_B_periph(AT91_PIN_PA5, 1);
257 at91_set_B_periph(AT91_PIN_PA4, 1);
258 at91_set_B_periph(AT91_PIN_PA3, 1);
259 }
260 } else {
261 /* CMD */
262 at91_set_A_periph(AT91_PIN_PA7, 1);
263
264 /* DAT0, maybe DAT1..DAT3 */
265 at91_set_A_periph(AT91_PIN_PA6, 1);
266 if (data->wire4) {
267 at91_set_A_periph(AT91_PIN_PA9, 1);
268 at91_set_A_periph(AT91_PIN_PA10, 1);
269 at91_set_A_periph(AT91_PIN_PA11, 1);
270 }
271 }
272
273 mmc_data = *data;
274 platform_device_register(&at91sam9260_mmc_device);
275}
276#else
277void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
278#endif
279
280
281/* --------------------------------------------------------------------
282 * NAND / SmartMedia
283 * -------------------------------------------------------------------- */
284
285#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
286static struct at91_nand_data nand_data;
287
288#define NAND_BASE AT91_CHIPSELECT_3
289
290static struct resource nand_resources[] = {
291 {
292 .start = NAND_BASE,
293 .end = NAND_BASE + SZ_8M - 1,
294 .flags = IORESOURCE_MEM,
295 }
296};
297
298static struct platform_device at91sam9260_nand_device = {
299 .name = "at91_nand",
300 .id = -1,
301 .dev = {
302 .platform_data = &nand_data,
303 },
304 .resource = nand_resources,
305 .num_resources = ARRAY_SIZE(nand_resources),
306};
307
308void __init at91_add_device_nand(struct at91_nand_data *data)
309{
310 unsigned long csa, mode;
311
312 if (!data)
313 return;
314
315 csa = at91_sys_read(AT91_MATRIX_EBICSA);
316 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
317
318 /* set the bus interface characteristics */
319 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
320 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
321
322 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
323 | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
324
325 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
326
327 if (data->bus_width_16)
328 mode = AT91_SMC_DBW_16;
329 else
330 mode = AT91_SMC_DBW_8;
331 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
332
333 /* enable pin */
334 if (data->enable_pin)
335 at91_set_gpio_output(data->enable_pin, 1);
336
337 /* ready/busy pin */
338 if (data->rdy_pin)
339 at91_set_gpio_input(data->rdy_pin, 1);
340
341 /* card detect pin */
342 if (data->det_pin)
343 at91_set_gpio_input(data->det_pin, 1);
344
345 nand_data = *data;
346 platform_device_register(&at91sam9260_nand_device);
347}
348#else
349void __init at91_add_device_nand(struct at91_nand_data *data) {}
350#endif
351
352
353/* --------------------------------------------------------------------
354 * TWI (i2c)
355 * -------------------------------------------------------------------- */
356
357#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
358
359static struct resource twi_resources[] = {
360 [0] = {
361 .start = AT91SAM9260_BASE_TWI,
362 .end = AT91SAM9260_BASE_TWI + SZ_16K - 1,
363 .flags = IORESOURCE_MEM,
364 },
365 [1] = {
366 .start = AT91SAM9260_ID_TWI,
367 .end = AT91SAM9260_ID_TWI,
368 .flags = IORESOURCE_IRQ,
369 },
370};
371
372static struct platform_device at91sam9260_twi_device = {
373 .name = "at91_i2c",
374 .id = -1,
375 .resource = twi_resources,
376 .num_resources = ARRAY_SIZE(twi_resources),
377};
378
379void __init at91_add_device_i2c(void)
380{
381 /* pins used for TWI interface */
382 at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
383 at91_set_multi_drive(AT91_PIN_PA23, 1);
384
385 at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
386 at91_set_multi_drive(AT91_PIN_PA24, 1);
387
388 platform_device_register(&at91sam9260_twi_device);
389}
390#else
391void __init at91_add_device_i2c(void) {}
392#endif
393
394
395/* --------------------------------------------------------------------
396 * SPI
397 * -------------------------------------------------------------------- */
398
399#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
400static u64 spi_dmamask = 0xffffffffUL;
401
402static struct resource spi0_resources[] = {
403 [0] = {
404 .start = AT91SAM9260_BASE_SPI0,
405 .end = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
406 .flags = IORESOURCE_MEM,
407 },
408 [1] = {
409 .start = AT91SAM9260_ID_SPI0,
410 .end = AT91SAM9260_ID_SPI0,
411 .flags = IORESOURCE_IRQ,
412 },
413};
414
415static struct platform_device at91sam9260_spi0_device = {
416 .name = "atmel_spi",
417 .id = 0,
418 .dev = {
419 .dma_mask = &spi_dmamask,
420 .coherent_dma_mask = 0xffffffff,
421 },
422 .resource = spi0_resources,
423 .num_resources = ARRAY_SIZE(spi0_resources),
424};
425
426static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
427
428static struct resource spi1_resources[] = {
429 [0] = {
430 .start = AT91SAM9260_BASE_SPI1,
431 .end = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
432 .flags = IORESOURCE_MEM,
433 },
434 [1] = {
435 .start = AT91SAM9260_ID_SPI1,
436 .end = AT91SAM9260_ID_SPI1,
437 .flags = IORESOURCE_IRQ,
438 },
439};
440
441static struct platform_device at91sam9260_spi1_device = {
442 .name = "atmel_spi",
443 .id = 1,
444 .dev = {
445 .dma_mask = &spi_dmamask,
446 .coherent_dma_mask = 0xffffffff,
447 },
448 .resource = spi1_resources,
449 .num_resources = ARRAY_SIZE(spi1_resources),
450};
451
452static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
453
454void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
455{
456 int i;
457 unsigned long cs_pin;
458 short enable_spi0 = 0;
459 short enable_spi1 = 0;
460
461 /* Choose SPI chip-selects */
462 for (i = 0; i < nr_devices; i++) {
463 if (devices[i].controller_data)
464 cs_pin = (unsigned long) devices[i].controller_data;
465 else if (devices[i].bus_num == 0)
466 cs_pin = spi0_standard_cs[devices[i].chip_select];
467 else
468 cs_pin = spi1_standard_cs[devices[i].chip_select];
469
470 if (devices[i].bus_num == 0)
471 enable_spi0 = 1;
472 else
473 enable_spi1 = 1;
474
475 /* enable chip-select pin */
476 at91_set_gpio_output(cs_pin, 1);
477
478 /* pass chip-select pin to driver */
479 devices[i].controller_data = (void *) cs_pin;
480 }
481
482 spi_register_board_info(devices, nr_devices);
483
484 /* Configure SPI bus(es) */
485 if (enable_spi0) {
486 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
487 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
488 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */
489
490 at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk");
491 platform_device_register(&at91sam9260_spi0_device);
492 }
493 if (enable_spi1) {
494 at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */
495 at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */
496 at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */
497
498 at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk");
499 platform_device_register(&at91sam9260_spi1_device);
500 }
501}
502#else
503void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
504#endif
505
506
507/* --------------------------------------------------------------------
508 * LEDs
509 * -------------------------------------------------------------------- */
510
511#if defined(CONFIG_LEDS)
512u8 at91_leds_cpu;
513u8 at91_leds_timer;
514
515void __init at91_init_leds(u8 cpu_led, u8 timer_led)
516{
517 at91_leds_cpu = cpu_led;
518 at91_leds_timer = timer_led;
519}
520#else
521void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
522#endif
523
524
525/* --------------------------------------------------------------------
526 * UART
527 * -------------------------------------------------------------------- */
528#if defined(CONFIG_SERIAL_ATMEL)
529static struct resource dbgu_resources[] = {
530 [0] = {
531 .start = AT91_VA_BASE_SYS + AT91_DBGU,
532 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
533 .flags = IORESOURCE_MEM,
534 },
535 [1] = {
536 .start = AT91_ID_SYS,
537 .end = AT91_ID_SYS,
538 .flags = IORESOURCE_IRQ,
539 },
540};
541
542static struct atmel_uart_data dbgu_data = {
543 .use_dma_tx = 0,
544 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
545 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
546};
547
548static struct platform_device at91sam9260_dbgu_device = {
549 .name = "atmel_usart",
550 .id = 0,
551 .dev = {
552 .platform_data = &dbgu_data,
553 .coherent_dma_mask = 0xffffffff,
554 },
555 .resource = dbgu_resources,
556 .num_resources = ARRAY_SIZE(dbgu_resources),
557};
558
559static inline void configure_dbgu_pins(void)
560{
561 at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
562 at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
563}
564
565static struct resource uart0_resources[] = {
566 [0] = {
567 .start = AT91SAM9260_BASE_US0,
568 .end = AT91SAM9260_BASE_US0 + SZ_16K - 1,
569 .flags = IORESOURCE_MEM,
570 },
571 [1] = {
572 .start = AT91SAM9260_ID_US0,
573 .end = AT91SAM9260_ID_US0,
574 .flags = IORESOURCE_IRQ,
575 },
576};
577
578static struct atmel_uart_data uart0_data = {
579 .use_dma_tx = 1,
580 .use_dma_rx = 1,
581};
582
583static struct platform_device at91sam9260_uart0_device = {
584 .name = "atmel_usart",
585 .id = 1,
586 .dev = {
587 .platform_data = &uart0_data,
588 .coherent_dma_mask = 0xffffffff,
589 },
590 .resource = uart0_resources,
591 .num_resources = ARRAY_SIZE(uart0_resources),
592};
593
594static inline void configure_usart0_pins(void)
595{
596 at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
597 at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
598 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */
599 at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */
600 at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */
601 at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */
602 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */
603 at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */
604}
605
606static struct resource uart1_resources[] = {
607 [0] = {
608 .start = AT91SAM9260_BASE_US1,
609 .end = AT91SAM9260_BASE_US1 + SZ_16K - 1,
610 .flags = IORESOURCE_MEM,
611 },
612 [1] = {
613 .start = AT91SAM9260_ID_US1,
614 .end = AT91SAM9260_ID_US1,
615 .flags = IORESOURCE_IRQ,
616 },
617};
618
619static struct atmel_uart_data uart1_data = {
620 .use_dma_tx = 1,
621 .use_dma_rx = 1,
622};
623
624static struct platform_device at91sam9260_uart1_device = {
625 .name = "atmel_usart",
626 .id = 2,
627 .dev = {
628 .platform_data = &uart1_data,
629 .coherent_dma_mask = 0xffffffff,
630 },
631 .resource = uart1_resources,
632 .num_resources = ARRAY_SIZE(uart1_resources),
633};
634
635static inline void configure_usart1_pins(void)
636{
637 at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
638 at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
639 at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */
640 at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */
641}
642
643static struct resource uart2_resources[] = {
644 [0] = {
645 .start = AT91SAM9260_BASE_US2,
646 .end = AT91SAM9260_BASE_US2 + SZ_16K - 1,
647 .flags = IORESOURCE_MEM,
648 },
649 [1] = {
650 .start = AT91SAM9260_ID_US2,
651 .end = AT91SAM9260_ID_US2,
652 .flags = IORESOURCE_IRQ,
653 },
654};
655
656static struct atmel_uart_data uart2_data = {
657 .use_dma_tx = 1,
658 .use_dma_rx = 1,
659};
660
661static struct platform_device at91sam9260_uart2_device = {
662 .name = "atmel_usart",
663 .id = 3,
664 .dev = {
665 .platform_data = &uart2_data,
666 .coherent_dma_mask = 0xffffffff,
667 },
668 .resource = uart2_resources,
669 .num_resources = ARRAY_SIZE(uart2_resources),
670};
671
672static inline void configure_usart2_pins(void)
673{
674 at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
675 at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
676}
677
678static struct resource uart3_resources[] = {
679 [0] = {
680 .start = AT91SAM9260_BASE_US3,
681 .end = AT91SAM9260_BASE_US3 + SZ_16K - 1,
682 .flags = IORESOURCE_MEM,
683 },
684 [1] = {
685 .start = AT91SAM9260_ID_US3,
686 .end = AT91SAM9260_ID_US3,
687 .flags = IORESOURCE_IRQ,
688 },
689};
690
691static struct atmel_uart_data uart3_data = {
692 .use_dma_tx = 1,
693 .use_dma_rx = 1,
694};
695
696static struct platform_device at91sam9260_uart3_device = {
697 .name = "atmel_usart",
698 .id = 4,
699 .dev = {
700 .platform_data = &uart3_data,
701 .coherent_dma_mask = 0xffffffff,
702 },
703 .resource = uart3_resources,
704 .num_resources = ARRAY_SIZE(uart3_resources),
705};
706
707static inline void configure_usart3_pins(void)
708{
709 at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */
710 at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */
711}
712
713static struct resource uart4_resources[] = {
714 [0] = {
715 .start = AT91SAM9260_BASE_US4,
716 .end = AT91SAM9260_BASE_US4 + SZ_16K - 1,
717 .flags = IORESOURCE_MEM,
718 },
719 [1] = {
720 .start = AT91SAM9260_ID_US4,
721 .end = AT91SAM9260_ID_US4,
722 .flags = IORESOURCE_IRQ,
723 },
724};
725
726static struct atmel_uart_data uart4_data = {
727 .use_dma_tx = 1,
728 .use_dma_rx = 1,
729};
730
731static struct platform_device at91sam9260_uart4_device = {
732 .name = "atmel_usart",
733 .id = 5,
734 .dev = {
735 .platform_data = &uart4_data,
736 .coherent_dma_mask = 0xffffffff,
737 },
738 .resource = uart4_resources,
739 .num_resources = ARRAY_SIZE(uart4_resources),
740};
741
742static inline void configure_usart4_pins(void)
743{
744 at91_set_B_periph(AT91_PIN_PA31, 1); /* TXD4 */
745 at91_set_B_periph(AT91_PIN_PA30, 0); /* RXD4 */
746}
747
748static struct resource uart5_resources[] = {
749 [0] = {
750 .start = AT91SAM9260_BASE_US5,
751 .end = AT91SAM9260_BASE_US5 + SZ_16K - 1,
752 .flags = IORESOURCE_MEM,
753 },
754 [1] = {
755 .start = AT91SAM9260_ID_US5,
756 .end = AT91SAM9260_ID_US5,
757 .flags = IORESOURCE_IRQ,
758 },
759};
760
761static struct atmel_uart_data uart5_data = {
762 .use_dma_tx = 1,
763 .use_dma_rx = 1,
764};
765
766static struct platform_device at91sam9260_uart5_device = {
767 .name = "atmel_usart",
768 .id = 6,
769 .dev = {
770 .platform_data = &uart5_data,
771 .coherent_dma_mask = 0xffffffff,
772 },
773 .resource = uart5_resources,
774 .num_resources = ARRAY_SIZE(uart5_resources),
775};
776
777static inline void configure_usart5_pins(void)
778{
779 at91_set_A_periph(AT91_PIN_PB12, 1); /* TXD5 */
780 at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */
781}
782
783struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
784struct platform_device *atmel_default_console_device; /* the serial console device */
785
786void __init at91_init_serial(struct at91_uart_config *config)
787{
788 int i;
789
790 /* Fill in list of supported UARTs */
791 for (i = 0; i < config->nr_tty; i++) {
792 switch (config->tty_map[i]) {
793 case 0:
794 configure_usart0_pins();
795 at91_uarts[i] = &at91sam9260_uart0_device;
796 at91_clock_associate("usart0_clk", &at91sam9260_uart0_device.dev, "usart");
797 break;
798 case 1:
799 configure_usart1_pins();
800 at91_uarts[i] = &at91sam9260_uart1_device;
801 at91_clock_associate("usart1_clk", &at91sam9260_uart1_device.dev, "usart");
802 break;
803 case 2:
804 configure_usart2_pins();
805 at91_uarts[i] = &at91sam9260_uart2_device;
806 at91_clock_associate("usart2_clk", &at91sam9260_uart2_device.dev, "usart");
807 break;
808 case 3:
809 configure_usart3_pins();
810 at91_uarts[i] = &at91sam9260_uart3_device;
811 at91_clock_associate("usart3_clk", &at91sam9260_uart3_device.dev, "usart");
812 break;
813 case 4:
814 configure_usart4_pins();
815 at91_uarts[i] = &at91sam9260_uart4_device;
816 at91_clock_associate("usart4_clk", &at91sam9260_uart4_device.dev, "usart");
817 break;
818 case 5:
819 configure_usart5_pins();
820 at91_uarts[i] = &at91sam9260_uart5_device;
821 at91_clock_associate("usart5_clk", &at91sam9260_uart5_device.dev, "usart");
822 break;
823 case 6:
824 configure_dbgu_pins();
825 at91_uarts[i] = &at91sam9260_dbgu_device;
826 at91_clock_associate("mck", &at91sam9260_dbgu_device.dev, "usart");
827 break;
828 default:
829 continue;
830 }
831 at91_uarts[i]->id = i; /* update ID number to mapped ID */
832 }
833
834 /* Set serial console device */
835 if (config->console_tty < ATMEL_MAX_UART)
836 atmel_default_console_device = at91_uarts[config->console_tty];
837 if (!atmel_default_console_device)
838 printk(KERN_INFO "AT91: No default serial console defined.\n");
839}
840
841void __init at91_add_device_serial(void)
842{
843 int i;
844
845 for (i = 0; i < ATMEL_MAX_UART; i++) {
846 if (at91_uarts[i])
847 platform_device_register(at91_uarts[i]);
848 }
849}
850#else
851void __init at91_init_serial(struct at91_uart_config *config) {}
852void __init at91_add_device_serial(void) {}
853#endif
854
855
856/* -------------------------------------------------------------------- */
857/*
858 * These devices are always present and don't need any board-specific
859 * setup.
860 */
861static int __init at91_add_standard_devices(void)
862{
863 return 0;
864}
865
866arch_initcall(at91_add_standard_devices);
diff --git a/arch/arm/mach-at91rm9200/at91sam9261.c b/arch/arm/mach-at91rm9200/at91sam9261.c
new file mode 100644
index 000000000000..5a82f35da2e9
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/at91sam9261.c
@@ -0,0 +1,289 @@
1/*
2 * arch/arm/mach-at91rm9200/at91sam9261.c
3 *
4 * Copyright (C) 2005 SAN People
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12
13#include <linux/module.h>
14
15#include <asm/mach/arch.h>
16#include <asm/mach/map.h>
17#include <asm/arch/at91sam9261.h>
18#include <asm/arch/at91_pmc.h>
19
20#include "generic.h"
21#include "clock.h"
22
23static struct map_desc at91sam9261_io_desc[] __initdata = {
24 {
25 .virtual = AT91_VA_BASE_SYS,
26 .pfn = __phys_to_pfn(AT91_BASE_SYS),
27 .length = SZ_16K,
28 .type = MT_DEVICE,
29 }, {
30 .virtual = AT91_IO_VIRT_BASE - AT91SAM9261_SRAM_SIZE,
31 .pfn = __phys_to_pfn(AT91SAM9261_SRAM_BASE),
32 .length = AT91SAM9261_SRAM_SIZE,
33 .type = MT_DEVICE,
34 },
35};
36
37/* --------------------------------------------------------------------
38 * Clocks
39 * -------------------------------------------------------------------- */
40
41/*
42 * The peripheral clocks.
43 */
44static struct clk pioA_clk = {
45 .name = "pioA_clk",
46 .pmc_mask = 1 << AT91SAM9261_ID_PIOA,
47 .type = CLK_TYPE_PERIPHERAL,
48};
49static struct clk pioB_clk = {
50 .name = "pioB_clk",
51 .pmc_mask = 1 << AT91SAM9261_ID_PIOB,
52 .type = CLK_TYPE_PERIPHERAL,
53};
54static struct clk pioC_clk = {
55 .name = "pioC_clk",
56 .pmc_mask = 1 << AT91SAM9261_ID_PIOC,
57 .type = CLK_TYPE_PERIPHERAL,
58};
59static struct clk usart0_clk = {
60 .name = "usart0_clk",
61 .pmc_mask = 1 << AT91SAM9261_ID_US0,
62 .type = CLK_TYPE_PERIPHERAL,
63};
64static struct clk usart1_clk = {
65 .name = "usart1_clk",
66 .pmc_mask = 1 << AT91SAM9261_ID_US1,
67 .type = CLK_TYPE_PERIPHERAL,
68};
69static struct clk usart2_clk = {
70 .name = "usart2_clk",
71 .pmc_mask = 1 << AT91SAM9261_ID_US2,
72 .type = CLK_TYPE_PERIPHERAL,
73};
74static struct clk mmc_clk = {
75 .name = "mci_clk",
76 .pmc_mask = 1 << AT91SAM9261_ID_MCI,
77 .type = CLK_TYPE_PERIPHERAL,
78};
79static struct clk udc_clk = {
80 .name = "udc_clk",
81 .pmc_mask = 1 << AT91SAM9261_ID_UDP,
82 .type = CLK_TYPE_PERIPHERAL,
83};
84static struct clk twi_clk = {
85 .name = "twi_clk",
86 .pmc_mask = 1 << AT91SAM9261_ID_TWI,
87 .type = CLK_TYPE_PERIPHERAL,
88};
89static struct clk spi0_clk = {
90 .name = "spi0_clk",
91 .pmc_mask = 1 << AT91SAM9261_ID_SPI0,
92 .type = CLK_TYPE_PERIPHERAL,
93};
94static struct clk spi1_clk = {
95 .name = "spi1_clk",
96 .pmc_mask = 1 << AT91SAM9261_ID_SPI1,
97 .type = CLK_TYPE_PERIPHERAL,
98};
99static struct clk ohci_clk = {
100 .name = "ohci_clk",
101 .pmc_mask = 1 << AT91SAM9261_ID_UHP,
102 .type = CLK_TYPE_PERIPHERAL,
103};
104static struct clk lcdc_clk = {
105 .name = "lcdc_clk",
106 .pmc_mask = 1 << AT91SAM9261_ID_LCDC,
107 .type = CLK_TYPE_PERIPHERAL,
108};
109
110static struct clk *periph_clocks[] __initdata = {
111 &pioA_clk,
112 &pioB_clk,
113 &pioC_clk,
114 &usart0_clk,
115 &usart1_clk,
116 &usart2_clk,
117 &mmc_clk,
118 &udc_clk,
119 &twi_clk,
120 &spi0_clk,
121 &spi1_clk,
122 // ssc 0 .. ssc2
123 // tc0 .. tc2
124 &ohci_clk,
125 &lcdc_clk,
126 // irq0 .. irq2
127};
128
129/*
130 * The four programmable clocks.
131 * You must configure pin multiplexing to bring these signals out.
132 */
133static struct clk pck0 = {
134 .name = "pck0",
135 .pmc_mask = AT91_PMC_PCK0,
136 .type = CLK_TYPE_PROGRAMMABLE,
137 .id = 0,
138};
139static struct clk pck1 = {
140 .name = "pck1",
141 .pmc_mask = AT91_PMC_PCK1,
142 .type = CLK_TYPE_PROGRAMMABLE,
143 .id = 1,
144};
145static struct clk pck2 = {
146 .name = "pck2",
147 .pmc_mask = AT91_PMC_PCK2,
148 .type = CLK_TYPE_PROGRAMMABLE,
149 .id = 2,
150};
151static struct clk pck3 = {
152 .name = "pck3",
153 .pmc_mask = AT91_PMC_PCK3,
154 .type = CLK_TYPE_PROGRAMMABLE,
155 .id = 3,
156};
157
158/* HClocks */
159static struct clk hck0 = {
160 .name = "hck0",
161 .pmc_mask = AT91_PMC_HCK0,
162 .type = CLK_TYPE_SYSTEM,
163 .id = 0,
164};
165static struct clk hck1 = {
166 .name = "hck1",
167 .pmc_mask = AT91_PMC_HCK1,
168 .type = CLK_TYPE_SYSTEM,
169 .id = 1,
170};
171
172static void __init at91sam9261_register_clocks(void)
173{
174 int i;
175
176 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
177 clk_register(periph_clocks[i]);
178
179 clk_register(&pck0);
180 clk_register(&pck1);
181 clk_register(&pck2);
182 clk_register(&pck3);
183
184 clk_register(&hck0);
185 clk_register(&hck1);
186}
187
188/* --------------------------------------------------------------------
189 * GPIO
190 * -------------------------------------------------------------------- */
191
192static struct at91_gpio_bank at91sam9261_gpio[] = {
193 {
194 .id = AT91SAM9261_ID_PIOA,
195 .offset = AT91_PIOA,
196 .clock = &pioA_clk,
197 }, {
198 .id = AT91SAM9261_ID_PIOB,
199 .offset = AT91_PIOB,
200 .clock = &pioB_clk,
201 }, {
202 .id = AT91SAM9261_ID_PIOC,
203 .offset = AT91_PIOC,
204 .clock = &pioC_clk,
205 }
206};
207
208static void at91sam9261_reset(void)
209{
210#warning "Implement CPU reset"
211}
212
213
214/* --------------------------------------------------------------------
215 * AT91SAM9261 processor initialization
216 * -------------------------------------------------------------------- */
217
218void __init at91sam9261_initialize(unsigned long main_clock)
219{
220 /* Map peripherals */
221 iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc));
222
223 at91_arch_reset = at91sam9261_reset;
224 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
225 | (1 << AT91SAM9261_ID_IRQ2);
226
227 /* Init clock subsystem */
228 at91_clock_init(main_clock);
229
230 /* Register the processor-specific clocks */
231 at91sam9261_register_clocks();
232
233 /* Register GPIO subsystem */
234 at91_gpio_init(at91sam9261_gpio, 3);
235}
236
237/* --------------------------------------------------------------------
238 * Interrupt initialization
239 * -------------------------------------------------------------------- */
240
241/*
242 * The default interrupt priority levels (0 = lowest, 7 = highest).
243 */
244static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
245 7, /* Advanced Interrupt Controller */
246 7, /* System Peripherals */
247 0, /* Parallel IO Controller A */
248 0, /* Parallel IO Controller B */
249 0, /* Parallel IO Controller C */
250 0,
251 6, /* USART 0 */
252 6, /* USART 1 */
253 6, /* USART 2 */
254 0, /* Multimedia Card Interface */
255 4, /* USB Device Port */
256 0, /* Two-Wire Interface */
257 6, /* Serial Peripheral Interface 0 */
258 6, /* Serial Peripheral Interface 1 */
259 5, /* Serial Synchronous Controller 0 */
260 5, /* Serial Synchronous Controller 1 */
261 5, /* Serial Synchronous Controller 2 */
262 0, /* Timer Counter 0 */
263 0, /* Timer Counter 1 */
264 0, /* Timer Counter 2 */
265 3, /* USB Host port */
266 3, /* LCD Controller */
267 0,
268 0,
269 0,
270 0,
271 0,
272 0,
273 0,
274 0, /* Advanced Interrupt Controller */
275 0, /* Advanced Interrupt Controller */
276 0, /* Advanced Interrupt Controller */
277};
278
279void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS])
280{
281 if (!priority)
282 priority = at91sam9261_default_irq_priority;
283
284 /* Initialize the AIC interrupt controller */
285 at91_aic_init(priority);
286
287 /* Enable GPIO interrupts */
288 at91_gpio_irq_setup();
289}
diff --git a/arch/arm/mach-at91rm9200/at91sam9261_devices.c b/arch/arm/mach-at91rm9200/at91sam9261_devices.c
new file mode 100644
index 000000000000..ed1d79081b35
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/at91sam9261_devices.c
@@ -0,0 +1,741 @@
1/*
2 * arch/arm/mach-at91rm9200/at91sam9261_devices.c
3 *
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 */
13#include <asm/mach/arch.h>
14#include <asm/mach/map.h>
15
16#include <linux/platform_device.h>
17
18#include <asm/arch/board.h>
19#include <asm/arch/gpio.h>
20#include <asm/arch/at91sam9261.h>
21#include <asm/arch/at91sam9261_matrix.h>
22#include <asm/arch/at91sam926x_mc.h>
23
24#include "generic.h"
25
26#define SZ_512 0x00000200
27#define SZ_256 0x00000100
28#define SZ_16 0x00000010
29
30/* --------------------------------------------------------------------
31 * USB Host
32 * -------------------------------------------------------------------- */
33
34#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
35static u64 ohci_dmamask = 0xffffffffUL;
36static struct at91_usbh_data usbh_data;
37
38static struct resource usbh_resources[] = {
39 [0] = {
40 .start = AT91SAM9261_UHP_BASE,
41 .end = AT91SAM9261_UHP_BASE + SZ_1M - 1,
42 .flags = IORESOURCE_MEM,
43 },
44 [1] = {
45 .start = AT91SAM9261_ID_UHP,
46 .end = AT91SAM9261_ID_UHP,
47 .flags = IORESOURCE_IRQ,
48 },
49};
50
51static struct platform_device at91sam9261_usbh_device = {
52 .name = "at91_ohci",
53 .id = -1,
54 .dev = {
55 .dma_mask = &ohci_dmamask,
56 .coherent_dma_mask = 0xffffffff,
57 .platform_data = &usbh_data,
58 },
59 .resource = usbh_resources,
60 .num_resources = ARRAY_SIZE(usbh_resources),
61};
62
63void __init at91_add_device_usbh(struct at91_usbh_data *data)
64{
65 if (!data)
66 return;
67
68 usbh_data = *data;
69 platform_device_register(&at91sam9261_usbh_device);
70}
71#else
72void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
73#endif
74
75
76/* --------------------------------------------------------------------
77 * USB Device (Gadget)
78 * -------------------------------------------------------------------- */
79
80#ifdef CONFIG_USB_GADGET_AT91
81static struct at91_udc_data udc_data;
82
83static struct resource udc_resources[] = {
84 [0] = {
85 .start = AT91SAM9261_BASE_UDP,
86 .end = AT91SAM9261_BASE_UDP + SZ_16K - 1,
87 .flags = IORESOURCE_MEM,
88 },
89 [1] = {
90 .start = AT91SAM9261_ID_UDP,
91 .end = AT91SAM9261_ID_UDP,
92 .flags = IORESOURCE_IRQ,
93 },
94};
95
96static struct platform_device at91sam9261_udc_device = {
97 .name = "at91_udc",
98 .id = -1,
99 .dev = {
100 .platform_data = &udc_data,
101 },
102 .resource = udc_resources,
103 .num_resources = ARRAY_SIZE(udc_resources),
104};
105
106void __init at91_add_device_udc(struct at91_udc_data *data)
107{
108 unsigned long x;
109
110 if (!data)
111 return;
112
113 if (data->vbus_pin) {
114 at91_set_gpio_input(data->vbus_pin, 0);
115 at91_set_deglitch(data->vbus_pin, 1);
116 }
117
118 /* Pullup pin is handled internally */
119 x = at91_sys_read(AT91_MATRIX_USBPUCR);
120 at91_sys_write(AT91_MATRIX_USBPUCR, x | AT91_MATRIX_USBPUCR_PUON);
121
122 udc_data = *data;
123 platform_device_register(&at91sam9261_udc_device);
124}
125#else
126void __init at91_add_device_udc(struct at91_udc_data *data) {}
127#endif
128
129/* --------------------------------------------------------------------
130 * MMC / SD
131 * -------------------------------------------------------------------- */
132
133#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
134static u64 mmc_dmamask = 0xffffffffUL;
135static struct at91_mmc_data mmc_data;
136
137static struct resource mmc_resources[] = {
138 [0] = {
139 .start = AT91SAM9261_BASE_MCI,
140 .end = AT91SAM9261_BASE_MCI + SZ_16K - 1,
141 .flags = IORESOURCE_MEM,
142 },
143 [1] = {
144 .start = AT91SAM9261_ID_MCI,
145 .end = AT91SAM9261_ID_MCI,
146 .flags = IORESOURCE_IRQ,
147 },
148};
149
150static struct platform_device at91sam9261_mmc_device = {
151 .name = "at91_mci",
152 .id = -1,
153 .dev = {
154 .dma_mask = &mmc_dmamask,
155 .coherent_dma_mask = 0xffffffff,
156 .platform_data = &mmc_data,
157 },
158 .resource = mmc_resources,
159 .num_resources = ARRAY_SIZE(mmc_resources),
160};
161
162void __init at91_add_device_mmc(struct at91_mmc_data *data)
163{
164 if (!data)
165 return;
166
167 /* input/irq */
168 if (data->det_pin) {
169 at91_set_gpio_input(data->det_pin, 1);
170 at91_set_deglitch(data->det_pin, 1);
171 }
172 if (data->wp_pin)
173 at91_set_gpio_input(data->wp_pin, 1);
174 if (data->vcc_pin)
175 at91_set_gpio_output(data->vcc_pin, 0);
176
177 /* CLK */
178 at91_set_B_periph(AT91_PIN_PA2, 0);
179
180 /* CMD */
181 at91_set_B_periph(AT91_PIN_PA1, 1);
182
183 /* DAT0, maybe DAT1..DAT3 */
184 at91_set_B_periph(AT91_PIN_PA0, 1);
185 if (data->wire4) {
186 at91_set_B_periph(AT91_PIN_PA4, 1);
187 at91_set_B_periph(AT91_PIN_PA5, 1);
188 at91_set_B_periph(AT91_PIN_PA6, 1);
189 }
190
191 mmc_data = *data;
192 platform_device_register(&at91sam9261_mmc_device);
193}
194#else
195void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
196#endif
197
198
199/* --------------------------------------------------------------------
200 * NAND / SmartMedia
201 * -------------------------------------------------------------------- */
202
203#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
204static struct at91_nand_data nand_data;
205
206#define NAND_BASE AT91_CHIPSELECT_3
207
208static struct resource nand_resources[] = {
209 {
210 .start = NAND_BASE,
211 .end = NAND_BASE + SZ_256M - 1,
212 .flags = IORESOURCE_MEM,
213 }
214};
215
216static struct platform_device at91_nand_device = {
217 .name = "at91_nand",
218 .id = -1,
219 .dev = {
220 .platform_data = &nand_data,
221 },
222 .resource = nand_resources,
223 .num_resources = ARRAY_SIZE(nand_resources),
224};
225
226void __init at91_add_device_nand(struct at91_nand_data *data)
227{
228 unsigned long csa, mode;
229
230 if (!data)
231 return;
232
233 csa = at91_sys_read(AT91_MATRIX_EBICSA);
234 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
235
236 /* set the bus interface characteristics */
237 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
238 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
239
240 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
241 | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
242
243 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
244
245 if (data->bus_width_16)
246 mode = AT91_SMC_DBW_16;
247 else
248 mode = AT91_SMC_DBW_8;
249 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
250
251 /* enable pin */
252 if (data->enable_pin)
253 at91_set_gpio_output(data->enable_pin, 1);
254
255 /* ready/busy pin */
256 if (data->rdy_pin)
257 at91_set_gpio_input(data->rdy_pin, 1);
258
259 /* card detect pin */
260 if (data->det_pin)
261 at91_set_gpio_input(data->det_pin, 1);
262
263 at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
264 at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
265
266 nand_data = *data;
267 platform_device_register(&at91_nand_device);
268}
269
270#else
271void __init at91_add_device_nand(struct at91_nand_data *data) {}
272#endif
273
274
275/* --------------------------------------------------------------------
276 * TWI (i2c)
277 * -------------------------------------------------------------------- */
278
279#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
280
281static struct resource twi_resources[] = {
282 [0] = {
283 .start = AT91SAM9261_BASE_TWI,
284 .end = AT91SAM9261_BASE_TWI + SZ_16K - 1,
285 .flags = IORESOURCE_MEM,
286 },
287 [1] = {
288 .start = AT91SAM9261_ID_TWI,
289 .end = AT91SAM9261_ID_TWI,
290 .flags = IORESOURCE_IRQ,
291 },
292};
293
294static struct platform_device at91sam9261_twi_device = {
295 .name = "at91_i2c",
296 .id = -1,
297 .resource = twi_resources,
298 .num_resources = ARRAY_SIZE(twi_resources),
299};
300
301void __init at91_add_device_i2c(void)
302{
303 /* pins used for TWI interface */
304 at91_set_A_periph(AT91_PIN_PA7, 0); /* TWD */
305 at91_set_multi_drive(AT91_PIN_PA7, 1);
306
307 at91_set_A_periph(AT91_PIN_PA8, 0); /* TWCK */
308 at91_set_multi_drive(AT91_PIN_PA8, 1);
309
310 platform_device_register(&at91sam9261_twi_device);
311}
312#else
313void __init at91_add_device_i2c(void) {}
314#endif
315
316
317/* --------------------------------------------------------------------
318 * SPI
319 * -------------------------------------------------------------------- */
320
321#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
322static u64 spi_dmamask = 0xffffffffUL;
323
324static struct resource spi0_resources[] = {
325 [0] = {
326 .start = AT91SAM9261_BASE_SPI0,
327 .end = AT91SAM9261_BASE_SPI0 + SZ_16K - 1,
328 .flags = IORESOURCE_MEM,
329 },
330 [1] = {
331 .start = AT91SAM9261_ID_SPI0,
332 .end = AT91SAM9261_ID_SPI0,
333 .flags = IORESOURCE_IRQ,
334 },
335};
336
337static struct platform_device at91sam9261_spi0_device = {
338 .name = "atmel_spi",
339 .id = 0,
340 .dev = {
341 .dma_mask = &spi_dmamask,
342 .coherent_dma_mask = 0xffffffff,
343 },
344 .resource = spi0_resources,
345 .num_resources = ARRAY_SIZE(spi0_resources),
346};
347
348static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
349
350static struct resource spi1_resources[] = {
351 [0] = {
352 .start = AT91SAM9261_BASE_SPI1,
353 .end = AT91SAM9261_BASE_SPI1 + SZ_16K - 1,
354 .flags = IORESOURCE_MEM,
355 },
356 [1] = {
357 .start = AT91SAM9261_ID_SPI1,
358 .end = AT91SAM9261_ID_SPI1,
359 .flags = IORESOURCE_IRQ,
360 },
361};
362
363static struct platform_device at91sam9261_spi1_device = {
364 .name = "atmel_spi",
365 .id = 1,
366 .dev = {
367 .dma_mask = &spi_dmamask,
368 .coherent_dma_mask = 0xffffffff,
369 },
370 .resource = spi1_resources,
371 .num_resources = ARRAY_SIZE(spi1_resources),
372};
373
374static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
375
376void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
377{
378 int i;
379 unsigned long cs_pin;
380 short enable_spi0 = 0;
381 short enable_spi1 = 0;
382
383 /* Choose SPI chip-selects */
384 for (i = 0; i < nr_devices; i++) {
385 if (devices[i].controller_data)
386 cs_pin = (unsigned long) devices[i].controller_data;
387 else if (devices[i].bus_num == 0)
388 cs_pin = spi0_standard_cs[devices[i].chip_select];
389 else
390 cs_pin = spi1_standard_cs[devices[i].chip_select];
391
392 if (devices[i].bus_num == 0)
393 enable_spi0 = 1;
394 else
395 enable_spi1 = 1;
396
397 /* enable chip-select pin */
398 at91_set_gpio_output(cs_pin, 1);
399
400 /* pass chip-select pin to driver */
401 devices[i].controller_data = (void *) cs_pin;
402 }
403
404 spi_register_board_info(devices, nr_devices);
405
406 /* Configure SPI bus(es) */
407 if (enable_spi0) {
408 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
409 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
410 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
411
412 at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk");
413 platform_device_register(&at91sam9261_spi0_device);
414 }
415 if (enable_spi1) {
416 at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */
417 at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */
418 at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */
419
420 at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk");
421 platform_device_register(&at91sam9261_spi1_device);
422 }
423}
424#else
425void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
426#endif
427
428
429/* --------------------------------------------------------------------
430 * LCD Controller
431 * -------------------------------------------------------------------- */
432
433#if defined(CONFIG_FB_AT91) || defined(CONFIG_FB_AT91_MODULE)
434static u64 lcdc_dmamask = 0xffffffffUL;
435static struct at91fb_info lcdc_data;
436
437static struct resource lcdc_resources[] = {
438 [0] = {
439 .start = AT91SAM9261_LCDC_BASE,
440 .end = AT91SAM9261_LCDC_BASE + SZ_4K - 1,
441 .flags = IORESOURCE_MEM,
442 },
443 [1] = {
444 .start = AT91SAM9261_ID_LCDC,
445 .end = AT91SAM9261_ID_LCDC,
446 .flags = IORESOURCE_IRQ,
447 },
448#if defined(CONFIG_FB_INTSRAM)
449 [2] = {
450 .start = AT91SAM9261_SRAM_BASE,
451 .end = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1,
452 .flags = IORESOURCE_MEM,
453 },
454#endif
455};
456
457static struct platform_device at91_lcdc_device = {
458 .name = "at91-fb",
459 .id = 0,
460 .dev = {
461 .dma_mask = &lcdc_dmamask,
462 .coherent_dma_mask = 0xffffffff,
463 .platform_data = &lcdc_data,
464 },
465 .resource = lcdc_resources,
466 .num_resources = ARRAY_SIZE(lcdc_resources),
467};
468
469void __init at91_add_device_lcdc(struct at91fb_info *data)
470{
471 if (!data) {
472 return;
473 }
474
475 at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
476 at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
477 at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
478 at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
479 at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
480 at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
481 at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
482 at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
483 at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
484 at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
485 at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
486 at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
487 at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
488 at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
489 at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
490 at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
491 at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
492 at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
493 at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
494 at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
495 at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
496 at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
497
498 lcdc_data = *data;
499 platform_device_register(&at91_lcdc_device);
500}
501#else
502void __init at91_add_device_lcdc(struct at91fb_info *data) {}
503#endif
504
505
506/* --------------------------------------------------------------------
507 * LEDs
508 * -------------------------------------------------------------------- */
509
510#if defined(CONFIG_LEDS)
511u8 at91_leds_cpu;
512u8 at91_leds_timer;
513
514void __init at91_init_leds(u8 cpu_led, u8 timer_led)
515{
516 at91_leds_cpu = cpu_led;
517 at91_leds_timer = timer_led;
518}
519#else
520void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
521#endif
522
523
524/* --------------------------------------------------------------------
525 * UART
526 * -------------------------------------------------------------------- */
527
528#if defined(CONFIG_SERIAL_ATMEL)
529static struct resource dbgu_resources[] = {
530 [0] = {
531 .start = AT91_VA_BASE_SYS + AT91_DBGU,
532 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
533 .flags = IORESOURCE_MEM,
534 },
535 [1] = {
536 .start = AT91_ID_SYS,
537 .end = AT91_ID_SYS,
538 .flags = IORESOURCE_IRQ,
539 },
540};
541
542static struct atmel_uart_data dbgu_data = {
543 .use_dma_tx = 0,
544 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
545 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
546};
547
548static struct platform_device at91sam9261_dbgu_device = {
549 .name = "atmel_usart",
550 .id = 0,
551 .dev = {
552 .platform_data = &dbgu_data,
553 .coherent_dma_mask = 0xffffffff,
554 },
555 .resource = dbgu_resources,
556 .num_resources = ARRAY_SIZE(dbgu_resources),
557};
558
559static inline void configure_dbgu_pins(void)
560{
561 at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */
562 at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */
563}
564
565static struct resource uart0_resources[] = {
566 [0] = {
567 .start = AT91SAM9261_BASE_US0,
568 .end = AT91SAM9261_BASE_US0 + SZ_16K - 1,
569 .flags = IORESOURCE_MEM,
570 },
571 [1] = {
572 .start = AT91SAM9261_ID_US0,
573 .end = AT91SAM9261_ID_US0,
574 .flags = IORESOURCE_IRQ,
575 },
576};
577
578static struct atmel_uart_data uart0_data = {
579 .use_dma_tx = 1,
580 .use_dma_rx = 1,
581};
582
583static struct platform_device at91sam9261_uart0_device = {
584 .name = "atmel_usart",
585 .id = 1,
586 .dev = {
587 .platform_data = &uart0_data,
588 .coherent_dma_mask = 0xffffffff,
589 },
590 .resource = uart0_resources,
591 .num_resources = ARRAY_SIZE(uart0_resources),
592};
593
594static inline void configure_usart0_pins(void)
595{
596 at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */
597 at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */
598 at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */
599 at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */
600}
601
602static struct resource uart1_resources[] = {
603 [0] = {
604 .start = AT91SAM9261_BASE_US1,
605 .end = AT91SAM9261_BASE_US1 + SZ_16K - 1,
606 .flags = IORESOURCE_MEM,
607 },
608 [1] = {
609 .start = AT91SAM9261_ID_US1,
610 .end = AT91SAM9261_ID_US1,
611 .flags = IORESOURCE_IRQ,
612 },
613};
614
615static struct atmel_uart_data uart1_data = {
616 .use_dma_tx = 1,
617 .use_dma_rx = 1,
618};
619
620static struct platform_device at91sam9261_uart1_device = {
621 .name = "atmel_usart",
622 .id = 2,
623 .dev = {
624 .platform_data = &uart1_data,
625 .coherent_dma_mask = 0xffffffff,
626 },
627 .resource = uart1_resources,
628 .num_resources = ARRAY_SIZE(uart1_resources),
629};
630
631static inline void configure_usart1_pins(void)
632{
633 at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */
634 at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */
635}
636
637static struct resource uart2_resources[] = {
638 [0] = {
639 .start = AT91SAM9261_BASE_US2,
640 .end = AT91SAM9261_BASE_US2 + SZ_16K - 1,
641 .flags = IORESOURCE_MEM,
642 },
643 [1] = {
644 .start = AT91SAM9261_ID_US2,
645 .end = AT91SAM9261_ID_US2,
646 .flags = IORESOURCE_IRQ,
647 },
648};
649
650static struct atmel_uart_data uart2_data = {
651 .use_dma_tx = 1,
652 .use_dma_rx = 1,
653};
654
655static struct platform_device at91sam9261_uart2_device = {
656 .name = "atmel_usart",
657 .id = 3,
658 .dev = {
659 .platform_data = &uart2_data,
660 .coherent_dma_mask = 0xffffffff,
661 },
662 .resource = uart2_resources,
663 .num_resources = ARRAY_SIZE(uart2_resources),
664};
665
666static inline void configure_usart2_pins(void)
667{
668 at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */
669 at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */
670}
671
672struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
673struct platform_device *atmel_default_console_device; /* the serial console device */
674
675void __init at91_init_serial(struct at91_uart_config *config)
676{
677 int i;
678
679 /* Fill in list of supported UARTs */
680 for (i = 0; i < config->nr_tty; i++) {
681 switch (config->tty_map[i]) {
682 case 0:
683 configure_usart0_pins();
684 at91_uarts[i] = &at91sam9261_uart0_device;
685 at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart");
686 break;
687 case 1:
688 configure_usart1_pins();
689 at91_uarts[i] = &at91sam9261_uart1_device;
690 at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart");
691 break;
692 case 2:
693 configure_usart2_pins();
694 at91_uarts[i] = &at91sam9261_uart2_device;
695 at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart");
696 break;
697 case 3:
698 configure_dbgu_pins();
699 at91_uarts[i] = &at91sam9261_dbgu_device;
700 at91_clock_associate("mck", &at91sam9261_dbgu_device.dev, "usart");
701 break;
702 default:
703 continue;
704 }
705 at91_uarts[i]->id = i; /* update ID number to mapped ID */
706 }
707
708 /* Set serial console device */
709 if (config->console_tty < ATMEL_MAX_UART)
710 atmel_default_console_device = at91_uarts[config->console_tty];
711 if (!atmel_default_console_device)
712 printk(KERN_INFO "AT91: No default serial console defined.\n");
713}
714
715void __init at91_add_device_serial(void)
716{
717 int i;
718
719 for (i = 0; i < ATMEL_MAX_UART; i++) {
720 if (at91_uarts[i])
721 platform_device_register(at91_uarts[i]);
722 }
723}
724#else
725void __init at91_init_serial(struct at91_uart_config *config) {}
726void __init at91_add_device_serial(void) {}
727#endif
728
729
730/* -------------------------------------------------------------------- */
731
732/*
733 * These devices are always present and don't need any board-specific
734 * setup.
735 */
736static int __init at91_add_standard_devices(void)
737{
738 return 0;
739}
740
741arch_initcall(at91_add_standard_devices);
diff --git a/arch/arm/mach-at91rm9200/at91sam926x_time.c b/arch/arm/mach-at91rm9200/at91sam926x_time.c
new file mode 100644
index 000000000000..99df5f6ee42e
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/at91sam926x_time.c
@@ -0,0 +1,114 @@
1/*
2 * linux/arch/arm/mach-at91rm9200/at91sam926x_time.c
3 *
4 * Copyright (C) 2005-2006 M. Amine SAYA, ATMEL Rousset, France
5 * Revision 2005 M. Nicolas Diremdjian, ATMEL Rousset, France
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/irq.h>
15#include <linux/kernel.h>
16#include <linux/sched.h>
17#include <linux/time.h>
18
19#include <asm/hardware.h>
20#include <asm/io.h>
21#include <asm/mach/time.h>
22
23#include <asm/arch/at91_pit.h>
24
25
26#define PIT_CPIV(x) ((x) & AT91_PIT_CPIV)
27#define PIT_PICNT(x) (((x) & AT91_PIT_PICNT) >> 20)
28
29/*
30 * Returns number of microseconds since last timer interrupt. Note that interrupts
31 * will have been disabled by do_gettimeofday()
32 * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
33 * 'tick' is usecs per jiffy (linux/timex.h).
34 */
35static unsigned long at91sam926x_gettimeoffset(void)
36{
37 unsigned long elapsed;
38 unsigned long t = at91_sys_read(AT91_PIT_PIIR);
39
40 elapsed = (PIT_PICNT(t) * LATCH) + PIT_CPIV(t); /* hardware clock cycles */
41
42 return (unsigned long)(elapsed * 1000000) / LATCH;
43}
44
45/*
46 * IRQ handler for the timer.
47 */
48static irqreturn_t at91sam926x_timer_interrupt(int irq, void *dev_id)
49{
50 volatile long nr_ticks;
51
52 if (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS) { /* This is a shared interrupt */
53 write_seqlock(&xtime_lock);
54
55 /* Get number to ticks performed before interrupt and clear PIT interrupt */
56 nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
57 do {
58 timer_tick();
59 nr_ticks--;
60 } while (nr_ticks);
61
62 write_sequnlock(&xtime_lock);
63 return IRQ_HANDLED;
64 } else
65 return IRQ_NONE; /* not handled */
66}
67
68static struct irqaction at91sam926x_timer_irq = {
69 .name = "at91_tick",
70 .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER,
71 .handler = at91sam926x_timer_interrupt
72};
73
74void at91sam926x_timer_reset(void)
75{
76 /* Disable timer */
77 at91_sys_write(AT91_PIT_MR, 0);
78
79 /* Clear any pending interrupts */
80 (void) at91_sys_read(AT91_PIT_PIVR);
81
82 /* Set Period Interval timer and enable its interrupt */
83 at91_sys_write(AT91_PIT_MR, (LATCH & AT91_PIT_PIV) | AT91_PIT_PITIEN | AT91_PIT_PITEN);
84}
85
86/*
87 * Set up timer interrupt.
88 */
89void __init at91sam926x_timer_init(void)
90{
91 /* Initialize and enable the timer */
92 at91sam926x_timer_reset();
93
94 /* Make IRQs happen for the system timer. */
95 setup_irq(AT91_ID_SYS, &at91sam926x_timer_irq);
96}
97
98#ifdef CONFIG_PM
99static void at91sam926x_timer_suspend(void)
100{
101 /* Disable timer */
102 at91_sys_write(AT91_PIT_MR, 0);
103}
104#else
105#define at91sam926x_timer_suspend NULL
106#endif
107
108struct sys_timer at91sam926x_timer = {
109 .init = at91sam926x_timer_init,
110 .offset = at91sam926x_gettimeoffset,
111 .suspend = at91sam926x_timer_suspend,
112 .resume = at91sam926x_timer_reset,
113};
114
diff --git a/arch/arm/mach-at91rm9200/board-carmeva.c b/arch/arm/mach-at91rm9200/board-carmeva.c
index 98208740e7c5..654f0379550a 100644
--- a/arch/arm/mach-at91rm9200/board-carmeva.c
+++ b/arch/arm/mach-at91rm9200/board-carmeva.c
@@ -65,7 +65,6 @@ static void __init carmeva_init_irq(void)
65 at91rm9200_init_interrupts(NULL); 65 at91rm9200_init_interrupts(NULL);
66} 66}
67 67
68
69static struct at91_eth_data __initdata carmeva_eth_data = { 68static struct at91_eth_data __initdata carmeva_eth_data = {
70 .phy_irq_pin = AT91_PIN_PC4, 69 .phy_irq_pin = AT91_PIN_PC4,
71 .is_rmii = 1, 70 .is_rmii = 1,
@@ -89,8 +88,33 @@ static struct at91_udc_data __initdata carmeva_udc_data = {
89// }; 88// };
90 89
91static struct at91_mmc_data __initdata carmeva_mmc_data = { 90static struct at91_mmc_data __initdata carmeva_mmc_data = {
92 .is_b = 0, 91 .slot_b = 0,
93 .wire4 = 1, 92 .wire4 = 1,
93 .det_pin = AT91_PIN_PB10,
94 .wp_pin = AT91_PIN_PC14,
95};
96
97static struct spi_board_info carmeva_spi_devices[] = {
98 { /* DataFlash chip */
99 .modalias = "mtd_dataflash",
100 .chip_select = 0,
101 .max_speed_hz = 10 * 1000 * 1000,
102 },
103 { /* User accessable spi - cs1 (250KHz) */
104 .modalias = "spi-cs1",
105 .chip_select = 1,
106 .max_speed_hz = 250 * 1000,
107 },
108 { /* User accessable spi - cs2 (1MHz) */
109 .modalias = "spi-cs2",
110 .chip_select = 2,
111 .max_speed_hz = 1 * 1000 * 1000,
112 },
113 { /* User accessable spi - cs3 (10MHz) */
114 .modalias = "spi-cs3",
115 .chip_select = 3,
116 .max_speed_hz = 10 * 1000 * 1000,
117 },
94}; 118};
95 119
96static void __init carmeva_board_init(void) 120static void __init carmeva_board_init(void)
@@ -105,10 +129,10 @@ static void __init carmeva_board_init(void)
105 at91_add_device_udc(&carmeva_udc_data); 129 at91_add_device_udc(&carmeva_udc_data);
106 /* I2C */ 130 /* I2C */
107 at91_add_device_i2c(); 131 at91_add_device_i2c();
132 /* SPI */
133 at91_add_device_spi(carmeva_spi_devices, ARRAY_SIZE(carmeva_spi_devices));
108 /* Compact Flash */ 134 /* Compact Flash */
109// at91_add_device_cf(&carmeva_cf_data); 135// at91_add_device_cf(&carmeva_cf_data);
110 /* SPI */
111// at91_add_device_spi(NULL, 0);
112 /* MMC */ 136 /* MMC */
113 at91_add_device_mmc(&carmeva_mmc_data); 137 at91_add_device_mmc(&carmeva_mmc_data);
114} 138}
diff --git a/arch/arm/mach-at91rm9200/board-csb337.c b/arch/arm/mach-at91rm9200/board-csb337.c
index 8eeae491ce71..b8bb8052607a 100644
--- a/arch/arm/mach-at91rm9200/board-csb337.c
+++ b/arch/arm/mach-at91rm9200/board-csb337.c
@@ -99,7 +99,7 @@ static struct at91_cf_data __initdata csb337_cf_data = {
99 99
100static struct at91_mmc_data __initdata csb337_mmc_data = { 100static struct at91_mmc_data __initdata csb337_mmc_data = {
101 .det_pin = AT91_PIN_PD5, 101 .det_pin = AT91_PIN_PD5,
102 .is_b = 0, 102 .slot_b = 0,
103 .wire4 = 1, 103 .wire4 = 1,
104 .wp_pin = AT91_PIN_PD6, 104 .wp_pin = AT91_PIN_PD6,
105}; 105};
diff --git a/arch/arm/mach-at91rm9200/board-dk.c b/arch/arm/mach-at91rm9200/board-dk.c
index c699f3984d4b..7522bf91bce8 100644
--- a/arch/arm/mach-at91rm9200/board-dk.c
+++ b/arch/arm/mach-at91rm9200/board-dk.c
@@ -27,6 +27,7 @@
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29#include <linux/spi/spi.h> 29#include <linux/spi/spi.h>
30#include <linux/mtd/physmap.h>
30 31
31#include <asm/hardware.h> 32#include <asm/hardware.h>
32#include <asm/setup.h> 33#include <asm/setup.h>
@@ -39,6 +40,7 @@
39 40
40#include <asm/arch/board.h> 41#include <asm/arch/board.h>
41#include <asm/arch/gpio.h> 42#include <asm/arch/gpio.h>
43#include <asm/arch/at91rm9200_mc.h>
42 44
43#include "generic.h" 45#include "generic.h"
44 46
@@ -93,7 +95,7 @@ static struct at91_cf_data __initdata dk_cf_data = {
93}; 95};
94 96
95static struct at91_mmc_data __initdata dk_mmc_data = { 97static struct at91_mmc_data __initdata dk_mmc_data = {
96 .is_b = 0, 98 .slot_b = 0,
97 .wire4 = 1, 99 .wire4 = 1,
98}; 100};
99 101
@@ -145,6 +147,30 @@ static struct at91_nand_data __initdata dk_nand_data = {
145 .partition_info = nand_partitions, 147 .partition_info = nand_partitions,
146}; 148};
147 149
150#define DK_FLASH_BASE AT91_CHIPSELECT_0
151#define DK_FLASH_SIZE 0x200000
152
153static struct physmap_flash_data dk_flash_data = {
154 .width = 2,
155};
156
157static struct resource dk_flash_resource = {
158 .start = DK_FLASH_BASE,
159 .end = DK_FLASH_BASE + DK_FLASH_SIZE - 1,
160 .flags = IORESOURCE_MEM,
161};
162
163static struct platform_device dk_flash = {
164 .name = "physmap-flash",
165 .id = 0,
166 .dev = {
167 .platform_data = &dk_flash_data,
168 },
169 .resource = &dk_flash_resource,
170 .num_resources = 1,
171};
172
173
148static void __init dk_board_init(void) 174static void __init dk_board_init(void)
149{ 175{
150 /* Serial */ 176 /* Serial */
@@ -172,6 +198,8 @@ static void __init dk_board_init(void)
172#endif 198#endif
173 /* NAND */ 199 /* NAND */
174 at91_add_device_nand(&dk_nand_data); 200 at91_add_device_nand(&dk_nand_data);
201 /* NOR Flash */
202 platform_device_register(&dk_flash);
175 /* VGA */ 203 /* VGA */
176// dk_add_device_video(); 204// dk_add_device_video();
177} 205}
diff --git a/arch/arm/mach-at91rm9200/board-eb9200.c b/arch/arm/mach-at91rm9200/board-eb9200.c
index 65e867ba2df3..80b72cf7264c 100644
--- a/arch/arm/mach-at91rm9200/board-eb9200.c
+++ b/arch/arm/mach-at91rm9200/board-eb9200.c
@@ -87,7 +87,7 @@ static struct at91_cf_data __initdata eb9200_cf_data = {
87}; 87};
88 88
89static struct at91_mmc_data __initdata eb9200_mmc_data = { 89static struct at91_mmc_data __initdata eb9200_mmc_data = {
90 .is_b = 0, 90 .slot_b = 0,
91 .wire4 = 1, 91 .wire4 = 1,
92}; 92};
93 93
diff --git a/arch/arm/mach-at91rm9200/board-ek.c b/arch/arm/mach-at91rm9200/board-ek.c
index 830eb7932178..c4fdb415f20e 100644
--- a/arch/arm/mach-at91rm9200/board-ek.c
+++ b/arch/arm/mach-at91rm9200/board-ek.c
@@ -27,6 +27,7 @@
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29#include <linux/spi/spi.h> 29#include <linux/spi/spi.h>
30#include <linux/mtd/physmap.h>
30 31
31#include <asm/hardware.h> 32#include <asm/hardware.h>
32#include <asm/setup.h> 33#include <asm/setup.h>
@@ -39,6 +40,7 @@
39 40
40#include <asm/arch/board.h> 41#include <asm/arch/board.h>
41#include <asm/arch/gpio.h> 42#include <asm/arch/gpio.h>
43#include <asm/arch/at91rm9200_mc.h>
42 44
43#include "generic.h" 45#include "generic.h"
44 46
@@ -87,7 +89,7 @@ static struct at91_udc_data __initdata ek_udc_data = {
87 89
88static struct at91_mmc_data __initdata ek_mmc_data = { 90static struct at91_mmc_data __initdata ek_mmc_data = {
89 .det_pin = AT91_PIN_PB27, 91 .det_pin = AT91_PIN_PB27,
90 .is_b = 0, 92 .slot_b = 0,
91 .wire4 = 1, 93 .wire4 = 1,
92 .wp_pin = AT91_PIN_PA17, 94 .wp_pin = AT91_PIN_PA17,
93}; 95};
@@ -107,6 +109,30 @@ static struct spi_board_info ek_spi_devices[] = {
107#endif 109#endif
108}; 110};
109 111
112#define EK_FLASH_BASE AT91_CHIPSELECT_0
113#define EK_FLASH_SIZE 0x200000
114
115static struct physmap_flash_data ek_flash_data = {
116 .width = 2,
117};
118
119static struct resource ek_flash_resource = {
120 .start = EK_FLASH_BASE,
121 .end = EK_FLASH_BASE + EK_FLASH_SIZE - 1,
122 .flags = IORESOURCE_MEM,
123};
124
125static struct platform_device ek_flash = {
126 .name = "physmap-flash",
127 .id = 0,
128 .dev = {
129 .platform_data = &ek_flash_data,
130 },
131 .resource = &ek_flash_resource,
132 .num_resources = 1,
133};
134
135
110static void __init ek_board_init(void) 136static void __init ek_board_init(void)
111{ 137{
112 /* Serial */ 138 /* Serial */
@@ -130,6 +156,8 @@ static void __init ek_board_init(void)
130 at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */ 156 at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
131 at91_add_device_mmc(&ek_mmc_data); 157 at91_add_device_mmc(&ek_mmc_data);
132#endif 158#endif
159 /* NOR Flash */
160 platform_device_register(&ek_flash);
133 /* VGA */ 161 /* VGA */
134// ek_add_device_video(); 162// ek_add_device_video();
135} 163}
diff --git a/arch/arm/mach-at91rm9200/board-kb9202.c b/arch/arm/mach-at91rm9200/board-kb9202.c
index 35a954a44b1b..759d8191854f 100644
--- a/arch/arm/mach-at91rm9200/board-kb9202.c
+++ b/arch/arm/mach-at91rm9200/board-kb9202.c
@@ -84,7 +84,7 @@ static struct at91_udc_data __initdata kb9202_udc_data = {
84 84
85static struct at91_mmc_data __initdata kb9202_mmc_data = { 85static struct at91_mmc_data __initdata kb9202_mmc_data = {
86 .det_pin = AT91_PIN_PB2, 86 .det_pin = AT91_PIN_PB2,
87 .is_b = 0, 87 .slot_b = 0,
88 .wire4 = 1, 88 .wire4 = 1,
89}; 89};
90 90
diff --git a/arch/arm/mach-at91rm9200/board-sam9260ek.c b/arch/arm/mach-at91rm9200/board-sam9260ek.c
new file mode 100644
index 000000000000..ffca9bdec37b
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/board-sam9260ek.c
@@ -0,0 +1,201 @@
1/*
2 * linux/arch/arm/mach-at91rm9200/board-ek.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2006 Atmel
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/types.h>
23#include <linux/init.h>
24#include <linux/mm.h>
25#include <linux/module.h>
26#include <linux/platform_device.h>
27#include <linux/spi/spi.h>
28
29#include <asm/hardware.h>
30#include <asm/setup.h>
31#include <asm/mach-types.h>
32#include <asm/irq.h>
33
34#include <asm/mach/arch.h>
35#include <asm/mach/map.h>
36#include <asm/mach/irq.h>
37
38#include <asm/arch/board.h>
39#include <asm/arch/gpio.h>
40#include <asm/arch/at91sam926x_mc.h>
41
42#include "generic.h"
43
44
45/*
46 * Serial port configuration.
47 * 0 .. 5 = USART0 .. USART5
48 * 6 = DBGU
49 */
50static struct at91_uart_config __initdata ek_uart_config = {
51 .console_tty = 0, /* ttyS0 */
52 .nr_tty = 3,
53 .tty_map = { 6, 0, 1, -1, -1, -1, -1 } /* ttyS0, ..., ttyS6 */
54};
55
56static void __init ek_map_io(void)
57{
58 /* Initialize processor: 18.432 MHz crystal */
59 at91sam9260_initialize(18432000);
60
61 /* Setup the serial ports and console */
62 at91_init_serial(&ek_uart_config);
63}
64
65static void __init ek_init_irq(void)
66{
67 at91sam9260_init_interrupts(NULL);
68}
69
70
71/*
72 * USB Host port
73 */
74static struct at91_usbh_data __initdata ek_usbh_data = {
75 .ports = 2,
76};
77
78/*
79 * USB Device port
80 */
81static struct at91_udc_data __initdata ek_udc_data = {
82 .vbus_pin = AT91_PIN_PC5,
83 .pullup_pin = 0, /* pull-up driven by UDC */
84};
85
86
87/*
88 * SPI devices.
89 */
90static struct spi_board_info ek_spi_devices[] = {
91#if !defined(CONFIG_MMC_AT91)
92 { /* DataFlash chip */
93 .modalias = "mtd_dataflash",
94 .chip_select = 1,
95 .max_speed_hz = 15 * 1000 * 1000,
96 .bus_num = 0,
97 },
98#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
99 { /* DataFlash card */
100 .modalias = "mtd_dataflash",
101 .chip_select = 0,
102 .max_speed_hz = 15 * 1000 * 1000,
103 .bus_num = 0,
104 },
105#endif
106#endif
107#if defined(CONFIG_SND_AT73C213)
108 { /* AT73C213 DAC */
109 .modalias = "snd_at73c213",
110 .chip_select = 0,
111 .max_speed_hz = 10 * 1000 * 1000,
112 .bus_num = 1,
113 },
114#endif
115};
116
117
118/*
119 * MACB Ethernet device
120 */
121static struct __initdata eth_platform_data ek_macb_data = {
122 .is_rmii = 1,
123};
124
125
126/*
127 * NAND flash
128 */
129static struct mtd_partition __initdata ek_nand_partition[] = {
130 {
131 .name = "Partition 1",
132 .offset = 0,
133 .size = 256 * 1024,
134 },
135 {
136 .name = "Partition 2",
137 .offset = 256 * 1024,
138 .size = MTDPART_SIZ_FULL,
139 },
140};
141
142static struct mtd_partition *nand_partitions(int size, int *num_partitions)
143{
144 *num_partitions = ARRAY_SIZE(ek_nand_partition);
145 return ek_nand_partition;
146}
147
148static struct at91_nand_data __initdata ek_nand_data = {
149 .ale = 21,
150 .cle = 22,
151// .det_pin = ... not connected
152 .rdy_pin = AT91_PIN_PC13,
153 .enable_pin = AT91_PIN_PC14,
154 .partition_info = nand_partitions,
155#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
156 .bus_width_16 = 1,
157#else
158 .bus_width_16 = 0,
159#endif
160};
161
162
163/*
164 * MCI (SD/MMC)
165 */
166static struct at91_mmc_data __initdata ek_mmc_data = {
167 .slot_b = 1,
168 .wire4 = 1,
169// .det_pin = ... not connected
170// .wp_pin = ... not connected
171// .vcc_pin = ... not connected
172};
173
174static void __init ek_board_init(void)
175{
176 /* Serial */
177 at91_add_device_serial();
178 /* USB Host */
179 at91_add_device_usbh(&ek_usbh_data);
180 /* USB Device */
181 at91_add_device_udc(&ek_udc_data);
182 /* SPI */
183 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
184 /* NAND */
185 at91_add_device_nand(&ek_nand_data);
186 /* Ethernet */
187 at91_add_device_eth(&ek_macb_data);
188 /* MMC */
189 at91_add_device_mmc(&ek_mmc_data);
190}
191
192MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
193 /* Maintainer: Atmel */
194 .phys_io = AT91_BASE_SYS,
195 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
196 .boot_params = AT91_SDRAM_BASE + 0x100,
197 .timer = &at91sam926x_timer,
198 .map_io = ek_map_io,
199 .init_irq = ek_init_irq,
200 .init_machine = ek_board_init,
201MACHINE_END
diff --git a/arch/arm/mach-at91rm9200/board-sam9261ek.c b/arch/arm/mach-at91rm9200/board-sam9261ek.c
new file mode 100644
index 000000000000..30b490d8886b
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/board-sam9261ek.c
@@ -0,0 +1,259 @@
1/*
2 * linux/arch/arm/mach-at91rm9200/board-ek.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2006 Atmel
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/types.h>
23#include <linux/init.h>
24#include <linux/mm.h>
25#include <linux/module.h>
26#include <linux/platform_device.h>
27#include <linux/spi/spi.h>
28#include <linux/dm9000.h>
29
30#include <asm/hardware.h>
31#include <asm/setup.h>
32#include <asm/mach-types.h>
33#include <asm/irq.h>
34
35#include <asm/mach/arch.h>
36#include <asm/mach/map.h>
37#include <asm/mach/irq.h>
38
39#include <asm/arch/board.h>
40#include <asm/arch/gpio.h>
41#include <asm/arch/at91sam926x_mc.h>
42
43#include "generic.h"
44
45
46/*
47 * Serial port configuration.
48 * 0 .. 2 = USART0 .. USART2
49 * 3 = DBGU
50 */
51static struct at91_uart_config __initdata ek_uart_config = {
52 .console_tty = 0, /* ttyS0 */
53 .nr_tty = 1,
54 .tty_map = { 3, -1, -1, -1 } /* ttyS0, ..., ttyS3 */
55};
56
57static void __init ek_map_io(void)
58{
59 /* Initialize processor: 18.432 MHz crystal */
60 at91sam9261_initialize(18432000);
61
62 /* Setup the serial ports and console */
63 at91_init_serial(&ek_uart_config);
64}
65
66static void __init ek_init_irq(void)
67{
68 at91sam9261_init_interrupts(NULL);
69}
70
71
72/*
73 * DM9000 ethernet device
74 */
75#if defined(CONFIG_DM9000)
76static struct resource at91sam9261_dm9000_resource[] = {
77 [0] = {
78 .start = AT91_CHIPSELECT_2,
79 .end = AT91_CHIPSELECT_2 + 3,
80 .flags = IORESOURCE_MEM
81 },
82 [1] = {
83 .start = AT91_CHIPSELECT_2 + 0x44,
84 .end = AT91_CHIPSELECT_2 + 0xFF,
85 .flags = IORESOURCE_MEM
86 },
87 [2] = {
88 .start = AT91_PIN_PC11,
89 .end = AT91_PIN_PC11,
90 .flags = IORESOURCE_IRQ
91 }
92};
93
94static struct dm9000_plat_data dm9000_platdata = {
95 .flags = DM9000_PLATF_16BITONLY,
96};
97
98static struct platform_device at91sam9261_dm9000_device = {
99 .name = "dm9000",
100 .id = 0,
101 .num_resources = ARRAY_SIZE(at91sam9261_dm9000_resource),
102 .resource = at91sam9261_dm9000_resource,
103 .dev = {
104 .platform_data = &dm9000_platdata,
105 }
106};
107
108static void __init ek_add_device_dm9000(void)
109{
110 /*
111 * Configure Chip-Select 2 on SMC for the DM9000.
112 * Note: These timings were calculated for MASTER_CLOCK = 100000000
113 * according to the DM9000 timings.
114 */
115 at91_sys_write(AT91_SMC_SETUP(2), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
116 at91_sys_write(AT91_SMC_PULSE(2), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8));
117 at91_sys_write(AT91_SMC_CYCLE(2), AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
118 at91_sys_write(AT91_SMC_MODE(2), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | AT91_SMC_TDF_(1));
119
120 /* Configure Reset signal as output */
121 at91_set_gpio_output(AT91_PIN_PC10, 0);
122
123 /* Configure Interrupt pin as input, no pull-up */
124 at91_set_gpio_input(AT91_PIN_PC11, 0);
125
126 platform_device_register(&at91sam9261_dm9000_device);
127}
128#else
129static void __init ek_add_device_dm9000(void) {}
130#endif /* CONFIG_DM9000 */
131
132
133/*
134 * USB Host Port
135 */
136static struct at91_usbh_data __initdata ek_usbh_data = {
137 .ports = 2,
138};
139
140
141/*
142 * USB Device Port
143 */
144static struct at91_udc_data __initdata ek_udc_data = {
145 .vbus_pin = AT91_PIN_PB29,
146 .pullup_pin = 0, /* pull-up driven by UDC */
147};
148
149
150/*
151 * MCI (SD/MMC)
152 */
153static struct at91_mmc_data __initdata ek_mmc_data = {
154 .wire4 = 1,
155// .det_pin = ... not connected
156// .wp_pin = ... not connected
157// .vcc_pin = ... not connected
158};
159
160
161/*
162 * NAND flash
163 */
164static struct mtd_partition __initdata ek_nand_partition[] = {
165 {
166 .name = "Partition 1",
167 .offset = 0,
168 .size = 256 * 1024,
169 },
170 {
171 .name = "Partition 2",
172 .offset = 256 * 1024 ,
173 .size = MTDPART_SIZ_FULL,
174 },
175};
176
177static struct mtd_partition *nand_partitions(int size, int *num_partitions)
178{
179 *num_partitions = ARRAY_SIZE(ek_nand_partition);
180 return ek_nand_partition;
181}
182
183static struct at91_nand_data __initdata ek_nand_data = {
184 .ale = 22,
185 .cle = 21,
186// .det_pin = ... not connected
187 .rdy_pin = AT91_PIN_PC15,
188 .enable_pin = AT91_PIN_PC14,
189 .partition_info = nand_partitions,
190#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
191 .bus_width_16 = 1,
192#else
193 .bus_width_16 = 0,
194#endif
195};
196
197/*
198 * SPI devices
199 */
200static struct spi_board_info ek_spi_devices[] = {
201 { /* DataFlash chip */
202 .modalias = "mtd_dataflash",
203 .chip_select = 0,
204 .max_speed_hz = 15 * 1000 * 1000,
205 .bus_num = 0,
206 },
207#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
208 { /* DataFlash card - jumper (J12) configurable to CS3 or CS0 */
209 .modalias = "mtd_dataflash",
210 .chip_select = 3,
211 .max_speed_hz = 15 * 1000 * 1000,
212 .bus_num = 0,
213 },
214#elif defined(CONFIG_SND_AT73C213)
215 { /* AT73C213 DAC */
216 .modalias = "snd_at73c213",
217 .chip_select = 3,
218 .max_speed_hz = 10 * 1000 * 1000,
219 .bus_num = 0,
220 },
221#endif
222};
223
224
225static void __init ek_board_init(void)
226{
227 /* Serial */
228 at91_add_device_serial();
229 /* USB Host */
230 at91_add_device_usbh(&ek_usbh_data);
231 /* USB Device */
232 at91_add_device_udc(&ek_udc_data);
233 /* I2C */
234 at91_add_device_i2c();
235 /* NAND */
236 at91_add_device_nand(&ek_nand_data);
237 /* DM9000 ethernet */
238 ek_add_device_dm9000();
239
240 /* spi0 and mmc/sd share the same PIO pins */
241#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
242 /* SPI */
243 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
244#else
245 /* MMC */
246 at91_add_device_mmc(&ek_mmc_data);
247#endif
248}
249
250MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK")
251 /* Maintainer: Atmel */
252 .phys_io = AT91_BASE_SYS,
253 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
254 .boot_params = AT91_SDRAM_BASE + 0x100,
255 .timer = &at91sam926x_timer,
256 .map_io = ek_map_io,
257 .init_irq = ek_init_irq,
258 .init_machine = ek_board_init,
259MACHINE_END
diff --git a/arch/arm/mach-at91rm9200/clock.c b/arch/arm/mach-at91rm9200/clock.c
index a43b061a7c85..4dee21fefe5a 100644
--- a/arch/arm/mach-at91rm9200/clock.c
+++ b/arch/arm/mach-at91rm9200/clock.c
@@ -28,6 +28,8 @@
28#include <asm/mach-types.h> 28#include <asm/mach-types.h>
29 29
30#include <asm/hardware.h> 30#include <asm/hardware.h>
31#include <asm/arch/at91_pmc.h>
32#include <asm/arch/cpu.h>
31 33
32#include "clock.h" 34#include "clock.h"
33 35
@@ -41,6 +43,7 @@
41#define clk_is_primary(x) ((x)->type & CLK_TYPE_PRIMARY) 43#define clk_is_primary(x) ((x)->type & CLK_TYPE_PRIMARY)
42#define clk_is_programmable(x) ((x)->type & CLK_TYPE_PROGRAMMABLE) 44#define clk_is_programmable(x) ((x)->type & CLK_TYPE_PROGRAMMABLE)
43#define clk_is_peripheral(x) ((x)->type & CLK_TYPE_PERIPHERAL) 45#define clk_is_peripheral(x) ((x)->type & CLK_TYPE_PERIPHERAL)
46#define clk_is_sys(x) ((x)->type & CLK_TYPE_SYSTEM)
44 47
45 48
46static LIST_HEAD(clocks); 49static LIST_HEAD(clocks);
@@ -114,13 +117,11 @@ static void pmc_sys_mode(struct clk *clk, int is_on)
114static struct clk udpck = { 117static struct clk udpck = {
115 .name = "udpck", 118 .name = "udpck",
116 .parent = &pllb, 119 .parent = &pllb,
117 .pmc_mask = AT91_PMC_UDP,
118 .mode = pmc_sys_mode, 120 .mode = pmc_sys_mode,
119}; 121};
120static struct clk uhpck = { 122static struct clk uhpck = {
121 .name = "uhpck", 123 .name = "uhpck",
122 .parent = &pllb, 124 .parent = &pllb,
123 .pmc_mask = AT91_PMC_UHP,
124 .mode = pmc_sys_mode, 125 .mode = pmc_sys_mode,
125}; 126};
126 127
@@ -434,6 +435,12 @@ int __init clk_register(struct clk *clk)
434 clk->mode = pmc_periph_mode; 435 clk->mode = pmc_periph_mode;
435 list_add_tail(&clk->node, &clocks); 436 list_add_tail(&clk->node, &clocks);
436 } 437 }
438 else if (clk_is_sys(clk)) {
439 clk->parent = &mck;
440 clk->mode = pmc_sys_mode;
441
442 list_add_tail(&clk->node, &clocks);
443 }
437#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS 444#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
438 else if (clk_is_programmable(clk)) { 445 else if (clk_is_programmable(clk)) {
439 clk->mode = pmc_sys_mode; 446 clk->mode = pmc_sys_mode;
@@ -586,9 +593,21 @@ int __init at91_clock_init(unsigned long main_clock)
586 */ 593 */
587 at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | AT91_PMC_USB96M; 594 at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) | AT91_PMC_USB96M;
588 pllb.rate_hz = at91_pll_rate(&pllb, main_clock, at91_pllb_usb_init); 595 pllb.rate_hz = at91_pll_rate(&pllb, main_clock, at91_pllb_usb_init);
589 at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_UDP); 596 if (cpu_is_at91rm9200()) {
597 uhpck.pmc_mask = AT91RM9200_PMC_UHP;
598 udpck.pmc_mask = AT91RM9200_PMC_UDP;
599 at91_sys_write(AT91_PMC_SCDR, AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP);
600 at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
601 } else if (cpu_is_at91sam9260()) {
602 uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
603 udpck.pmc_mask = AT91SAM926x_PMC_UDP;
604 at91_sys_write(AT91_PMC_SCDR, AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP);
605 } else if (cpu_is_at91sam9261()) {
606 uhpck.pmc_mask = (AT91SAM926x_PMC_UHP | AT91_PMC_HCK0);
607 udpck.pmc_mask = AT91SAM926x_PMC_UDP;
608 at91_sys_write(AT91_PMC_SCDR, AT91SAM926x_PMC_UHP | AT91_PMC_HCK0 | AT91SAM926x_PMC_UDP);
609 }
590 at91_sys_write(AT91_CKGR_PLLBR, 0); 610 at91_sys_write(AT91_CKGR_PLLBR, 0);
591 at91_sys_write(AT91_PMC_SCER, AT91_PMC_MCKUDP);
592 611
593 udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init); 612 udpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
594 uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init); 613 uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
diff --git a/arch/arm/mach-at91rm9200/clock.h b/arch/arm/mach-at91rm9200/clock.h
index 0592e662ab37..b5c7a2eb2d1d 100644
--- a/arch/arm/mach-at91rm9200/clock.h
+++ b/arch/arm/mach-at91rm9200/clock.h
@@ -10,6 +10,7 @@
10#define CLK_TYPE_PLL 0x2 10#define CLK_TYPE_PLL 0x2
11#define CLK_TYPE_PROGRAMMABLE 0x4 11#define CLK_TYPE_PROGRAMMABLE 0x4
12#define CLK_TYPE_PERIPHERAL 0x8 12#define CLK_TYPE_PERIPHERAL 0x8
13#define CLK_TYPE_SYSTEM 0x10
13 14
14 15
15struct clk { 16struct clk {
diff --git a/arch/arm/mach-at91rm9200/generic.h b/arch/arm/mach-at91rm9200/generic.h
index 694e411e285f..8c4d5a77d485 100644
--- a/arch/arm/mach-at91rm9200/generic.h
+++ b/arch/arm/mach-at91rm9200/generic.h
@@ -10,14 +10,19 @@
10 10
11 /* Processors */ 11 /* Processors */
12extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks); 12extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks);
13extern void __init at91sam9260_initialize(unsigned long main_clock);
14extern void __init at91sam9261_initialize(unsigned long main_clock);
13 15
14 /* Interrupts */ 16 /* Interrupts */
15extern void __init at91rm9200_init_interrupts(unsigned int priority[]); 17extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
18extern void __init at91sam9260_init_interrupts(unsigned int priority[]);
19extern void __init at91sam9261_init_interrupts(unsigned int priority[]);
16extern void __init at91_aic_init(unsigned int priority[]); 20extern void __init at91_aic_init(unsigned int priority[]);
17 21
18 /* Timer */ 22 /* Timer */
19struct sys_timer; 23struct sys_timer;
20extern struct sys_timer at91rm9200_timer; 24extern struct sys_timer at91rm9200_timer;
25extern struct sys_timer at91sam926x_timer;
21 26
22 /* Clocks */ 27 /* Clocks */
23extern int __init at91_clock_init(unsigned long main_clock); 28extern int __init at91_clock_init(unsigned long main_clock);
@@ -39,3 +44,6 @@ struct at91_gpio_bank {
39}; 44};
40extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks); 45extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
41extern void __init at91_gpio_irq_setup(void); 46extern void __init at91_gpio_irq_setup(void);
47
48extern void (*at91_arch_reset)(void);
49extern int at91_extern_irq;
diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c
index cec3862651d0..3f188508c391 100644
--- a/arch/arm/mach-at91rm9200/gpio.c
+++ b/arch/arm/mach-at91rm9200/gpio.c
@@ -19,6 +19,8 @@
19 19
20#include <asm/io.h> 20#include <asm/io.h>
21#include <asm/hardware.h> 21#include <asm/hardware.h>
22#include <asm/arch/at91_pio.h>
23#include <asm/arch/at91_pmc.h>
22#include <asm/arch/gpio.h> 24#include <asm/arch/gpio.h>
23 25
24#include "generic.h" 26#include "generic.h"
diff --git a/arch/arm/mach-at91rm9200/irq.c b/arch/arm/mach-at91rm9200/irq.c
index cab0de9b8fa0..2148daafd29c 100644
--- a/arch/arm/mach-at91rm9200/irq.c
+++ b/arch/arm/mach-at91rm9200/irq.c
@@ -47,6 +47,10 @@ static void at91_aic_unmask_irq(unsigned int irq)
47 at91_sys_write(AT91_AIC_IECR, 1 << irq); 47 at91_sys_write(AT91_AIC_IECR, 1 << irq);
48} 48}
49 49
50unsigned int at91_extern_irq;
51
52#define is_extern_irq(irq) ((1 << (irq)) & at91_extern_irq)
53
50static int at91_aic_set_type(unsigned irq, unsigned type) 54static int at91_aic_set_type(unsigned irq, unsigned type)
51{ 55{
52 unsigned int smr, srctype; 56 unsigned int smr, srctype;
@@ -59,14 +63,16 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
59 srctype = AT91_AIC_SRCTYPE_RISING; 63 srctype = AT91_AIC_SRCTYPE_RISING;
60 break; 64 break;
61 case IRQT_LOW: 65 case IRQT_LOW:
62 if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0)) /* only supported on external interrupts */ 66 if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
67 srctype = AT91_AIC_SRCTYPE_LOW;
68 else
63 return -EINVAL; 69 return -EINVAL;
64 srctype = AT91_AIC_SRCTYPE_LOW;
65 break; 70 break;
66 case IRQT_FALLING: 71 case IRQT_FALLING:
67 if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0)) /* only supported on external interrupts */ 72 if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
73 srctype = AT91_AIC_SRCTYPE_FALLING;
74 else
68 return -EINVAL; 75 return -EINVAL;
69 srctype = AT91_AIC_SRCTYPE_FALLING;
70 break; 76 break;
71 default: 77 default:
72 return -EINVAL; 78 return -EINVAL;
diff --git a/arch/arm/mach-at91rm9200/pm.c b/arch/arm/mach-at91rm9200/pm.c
index 32c95d8eaacf..67aa5572a3ea 100644
--- a/arch/arm/mach-at91rm9200/pm.c
+++ b/arch/arm/mach-at91rm9200/pm.c
@@ -26,7 +26,10 @@
26#include <asm/mach/irq.h> 26#include <asm/mach/irq.h>
27#include <asm/mach-types.h> 27#include <asm/mach-types.h>
28 28
29#include <asm/arch/at91_pmc.h>
30#include <asm/arch/at91rm9200_mc.h>
29#include <asm/arch/gpio.h> 31#include <asm/arch/gpio.h>
32#include <asm/arch/cpu.h>
30 33
31#include "generic.h" 34#include "generic.h"
32 35
@@ -68,9 +71,15 @@ static int at91_pm_verify_clocks(void)
68 scsr = at91_sys_read(AT91_PMC_SCSR); 71 scsr = at91_sys_read(AT91_PMC_SCSR);
69 72
70 /* USB must not be using PLLB */ 73 /* USB must not be using PLLB */
71 if ((scsr & (AT91_PMC_UHP | AT91_PMC_UDP)) != 0) { 74 if (cpu_is_at91rm9200()) {
72 pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); 75 if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) {
73 return 0; 76 pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n");
77 return 0;
78 }
79 } else if (cpu_is_at91sam9260()) {
80#warning "Check SAM9260 USB clocks"
81 } else if (cpu_is_at91sam9261()) {
82#warning "Check SAM9261 USB clocks"
74 } 83 }
75 84
76#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS 85#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
@@ -112,7 +121,6 @@ EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
112static void (*slow_clock)(void); 121static void (*slow_clock)(void);
113 122
114 123
115
116static int at91_pm_enter(suspend_state_t state) 124static int at91_pm_enter(suspend_state_t state)
117{ 125{
118 at91_gpio_suspend(); 126 at91_gpio_suspend();
@@ -123,13 +131,7 @@ static int at91_pm_enter(suspend_state_t state)
123 (at91_sys_read(AT91_PMC_PCSR) 131 (at91_sys_read(AT91_PMC_PCSR)
124 | (1 << AT91_ID_FIQ) 132 | (1 << AT91_ID_FIQ)
125 | (1 << AT91_ID_SYS) 133 | (1 << AT91_ID_SYS)
126 | (1 << AT91RM9200_ID_IRQ0) 134 | (at91_extern_irq))
127 | (1 << AT91RM9200_ID_IRQ1)
128 | (1 << AT91RM9200_ID_IRQ2)
129 | (1 << AT91RM9200_ID_IRQ3)
130 | (1 << AT91RM9200_ID_IRQ4)
131 | (1 << AT91RM9200_ID_IRQ5)
132 | (1 << AT91RM9200_ID_IRQ6))
133 & at91_sys_read(AT91_AIC_IMR), 135 & at91_sys_read(AT91_AIC_IMR),
134 state); 136 state);
135 137
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
index e346b03cd921..af7904b3d0a8 100644
--- a/arch/arm/mach-ep93xx/Kconfig
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -9,12 +9,24 @@ config CRUNCH
9 9
10comment "EP93xx Platforms" 10comment "EP93xx Platforms"
11 11
12config MACH_ADSSPHERE
13 bool "Support ADS Sphere"
14 help
15 Say 'Y' here if you want your kernel to support the ADS
16 Sphere board.
17
12config MACH_EDB9302 18config MACH_EDB9302
13 bool "Support Cirrus Logic EDB9302" 19 bool "Support Cirrus Logic EDB9302"
14 help 20 help
15 Say 'Y' here if you want your kernel to support the Cirrus 21 Say 'Y' here if you want your kernel to support the Cirrus
16 Logic EDB9302 Evaluation Board. 22 Logic EDB9302 Evaluation Board.
17 23
24config MACH_EDB9302A
25 bool "Support Cirrus Logic EDB9302A"
26 help
27 Say 'Y' here if you want your kernel to support the Cirrus
28 Logic EDB9302A Evaluation Board.
29
18config MACH_EDB9312 30config MACH_EDB9312
19 bool "Support Cirrus Logic EDB9312" 31 bool "Support Cirrus Logic EDB9312"
20 help 32 help
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
index c2eb18b530c2..b06641dd450d 100644
--- a/arch/arm/mach-ep93xx/Makefile
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -6,7 +6,9 @@ obj-m :=
6obj-n := 6obj-n :=
7obj- := 7obj- :=
8 8
9obj-$(CONFIG_MACH_ADSSPHERE) += adssphere.o
9obj-$(CONFIG_MACH_EDB9302) += edb9302.o 10obj-$(CONFIG_MACH_EDB9302) += edb9302.o
11obj-$(CONFIG_MACH_EDB9302A) += edb9302a.o
10obj-$(CONFIG_MACH_EDB9312) += edb9312.o 12obj-$(CONFIG_MACH_EDB9312) += edb9312.o
11obj-$(CONFIG_MACH_EDB9315) += edb9315.o 13obj-$(CONFIG_MACH_EDB9315) += edb9315.o
12obj-$(CONFIG_MACH_EDB9315A) += edb9315a.o 14obj-$(CONFIG_MACH_EDB9315A) += edb9315a.o
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
new file mode 100644
index 000000000000..ac5d5818eb7b
--- /dev/null
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -0,0 +1,91 @@
1/*
2 * arch/arm/mach-ep93xx/adssphere.c
3 * ADS Sphere support.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/mm.h>
16#include <linux/sched.h>
17#include <linux/interrupt.h>
18#include <linux/ioport.h>
19#include <linux/mtd/physmap.h>
20#include <linux/platform_device.h>
21#include <asm/io.h>
22#include <asm/hardware.h>
23#include <asm/mach-types.h>
24#include <asm/mach/arch.h>
25
26static struct physmap_flash_data adssphere_flash_data = {
27 .width = 4,
28};
29
30static struct resource adssphere_flash_resource = {
31 .start = 0x60000000,
32 .end = 0x61ffffff,
33 .flags = IORESOURCE_MEM,
34};
35
36static struct platform_device adssphere_flash = {
37 .name = "physmap-flash",
38 .id = 0,
39 .dev = {
40 .platform_data = &adssphere_flash_data,
41 },
42 .num_resources = 1,
43 .resource = &adssphere_flash_resource,
44};
45
46static struct ep93xx_eth_data adssphere_eth_data = {
47 .phy_id = 1,
48};
49
50static struct resource adssphere_eth_resource[] = {
51 {
52 .start = EP93XX_ETHERNET_PHYS_BASE,
53 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
54 .flags = IORESOURCE_MEM,
55 }, {
56 .start = IRQ_EP93XX_ETHERNET,
57 .end = IRQ_EP93XX_ETHERNET,
58 .flags = IORESOURCE_IRQ,
59 }
60};
61
62static struct platform_device adssphere_eth_device = {
63 .name = "ep93xx-eth",
64 .id = -1,
65 .dev = {
66 .platform_data = &adssphere_eth_data,
67 },
68 .num_resources = 2,
69 .resource = adssphere_eth_resource,
70};
71
72static void __init adssphere_init_machine(void)
73{
74 ep93xx_init_devices();
75 platform_device_register(&adssphere_flash);
76
77 memcpy(adssphere_eth_data.dev_addr,
78 (void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
79 platform_device_register(&adssphere_eth_device);
80}
81
82MACHINE_START(ADSSPHERE, "ADS Sphere board")
83 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
84 .phys_io = EP93XX_APB_PHYS_BASE,
85 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
86 .boot_params = 0x00000100,
87 .map_io = ep93xx_map_io,
88 .init_irq = ep93xx_init_irq,
89 .timer = &ep93xx_timer,
90 .init_machine = adssphere_init_machine,
91MACHINE_END
diff --git a/arch/arm/mach-ep93xx/edb9302a.c b/arch/arm/mach-ep93xx/edb9302a.c
new file mode 100644
index 000000000000..62e064bab1d2
--- /dev/null
+++ b/arch/arm/mach-ep93xx/edb9302a.c
@@ -0,0 +1,91 @@
1/*
2 * arch/arm/mach-ep93xx/edb9302a.c
3 * Cirrus Logic EDB9302A support.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/mm.h>
16#include <linux/sched.h>
17#include <linux/interrupt.h>
18#include <linux/ioport.h>
19#include <linux/mtd/physmap.h>
20#include <linux/platform_device.h>
21#include <asm/io.h>
22#include <asm/hardware.h>
23#include <asm/mach-types.h>
24#include <asm/mach/arch.h>
25
26static struct physmap_flash_data edb9302a_flash_data = {
27 .width = 2,
28};
29
30static struct resource edb9302a_flash_resource = {
31 .start = 0x60000000,
32 .end = 0x60ffffff,
33 .flags = IORESOURCE_MEM,
34};
35
36static struct platform_device edb9302a_flash = {
37 .name = "physmap-flash",
38 .id = 0,
39 .dev = {
40 .platform_data = &edb9302a_flash_data,
41 },
42 .num_resources = 1,
43 .resource = &edb9302a_flash_resource,
44};
45
46static struct ep93xx_eth_data edb9302a_eth_data = {
47 .phy_id = 1,
48};
49
50static struct resource edb9302a_eth_resource[] = {
51 {
52 .start = EP93XX_ETHERNET_PHYS_BASE,
53 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
54 .flags = IORESOURCE_MEM,
55 }, {
56 .start = IRQ_EP93XX_ETHERNET,
57 .end = IRQ_EP93XX_ETHERNET,
58 .flags = IORESOURCE_IRQ,
59 }
60};
61
62static struct platform_device edb9302a_eth_device = {
63 .name = "ep93xx-eth",
64 .id = -1,
65 .dev = {
66 .platform_data = &edb9302a_eth_data,
67 },
68 .num_resources = 2,
69 .resource = edb9302a_eth_resource,
70};
71
72static void __init edb9302a_init_machine(void)
73{
74 ep93xx_init_devices();
75 platform_device_register(&edb9302a_flash);
76
77 memcpy(edb9302a_eth_data.dev_addr,
78 (void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
79 platform_device_register(&edb9302a_eth_device);
80}
81
82MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
83 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
84 .phys_io = EP93XX_APB_PHYS_BASE,
85 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
86 .boot_params = 0xc0000100,
87 .map_io = ep93xx_map_io,
88 .init_irq = ep93xx_init_irq,
89 .timer = &ep93xx_timer,
90 .init_machine = edb9302a_init_machine,
91MACHINE_END
diff --git a/arch/arm/mach-iop13xx/Kconfig b/arch/arm/mach-iop13xx/Kconfig
new file mode 100644
index 000000000000..40c2d689f2eb
--- /dev/null
+++ b/arch/arm/mach-iop13xx/Kconfig
@@ -0,0 +1,20 @@
1if ARCH_IOP13XX
2
3menu "IOP13XX Implementation Options"
4
5comment "IOP13XX Platform Support"
6
7config MACH_IQ81340SC
8 bool "Enable IQ81340SC Hardware Support"
9 help
10 Say Y here if you want to support running on the Intel IQ81340SC
11 evaluation kit.
12
13config MACH_IQ81340MC
14 bool "Enable IQ81340MC Hardware Support"
15 help
16 Say Y here if you want to support running on the Intel IQ81340MC
17 evaluation kit.
18
19endmenu
20endif
diff --git a/arch/arm/mach-iop13xx/Makefile b/arch/arm/mach-iop13xx/Makefile
new file mode 100644
index 000000000000..c3d6c08f2d4c
--- /dev/null
+++ b/arch/arm/mach-iop13xx/Makefile
@@ -0,0 +1,12 @@
1obj-y :=
2obj-m :=
3obj-n :=
4obj- :=
5
6obj-$(CONFIG_ARCH_IOP13XX) += setup.o
7obj-$(CONFIG_ARCH_IOP13XX) += irq.o
8obj-$(CONFIG_ARCH_IOP13XX) += time.o
9obj-$(CONFIG_ARCH_IOP13XX) += pci.o
10obj-$(CONFIG_ARCH_IOP13XX) += io.o
11obj-$(CONFIG_MACH_IQ81340SC) += iq81340sc.o
12obj-$(CONFIG_MACH_IQ81340MC) += iq81340mc.o
diff --git a/arch/arm/mach-iop13xx/Makefile.boot b/arch/arm/mach-iop13xx/Makefile.boot
new file mode 100644
index 000000000000..0b0e19fdfe6c
--- /dev/null
+++ b/arch/arm/mach-iop13xx/Makefile.boot
@@ -0,0 +1,3 @@
1 zreladdr-y := 0x00008000
2params_phys-y := 0x00000100
3initrd_phys-y := 0x00800000
diff --git a/arch/arm/mach-iop13xx/io.c b/arch/arm/mach-iop13xx/io.c
new file mode 100644
index 000000000000..fbf9f88e46ea
--- /dev/null
+++ b/arch/arm/mach-iop13xx/io.c
@@ -0,0 +1,93 @@
1/*
2 * iop13xx custom ioremap implementation
3 * Copyright (c) 2005-2006, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 *
18 */
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <asm/hardware.h>
22#include <asm/io.h>
23
24void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size,
25 unsigned long flags)
26{
27 void __iomem * retval;
28
29 switch (cookie) {
30 case IOP13XX_PCIX_LOWER_MEM_RA ... IOP13XX_PCIX_UPPER_MEM_RA:
31 if (unlikely(!iop13xx_atux_mem_base))
32 retval = NULL;
33 else
34 retval = (void *)(iop13xx_atux_mem_base +
35 (cookie - IOP13XX_PCIX_LOWER_MEM_RA));
36 break;
37 case IOP13XX_PCIE_LOWER_MEM_RA ... IOP13XX_PCIE_UPPER_MEM_RA:
38 if (unlikely(!iop13xx_atue_mem_base))
39 retval = NULL;
40 else
41 retval = (void *)(iop13xx_atue_mem_base +
42 (cookie - IOP13XX_PCIE_LOWER_MEM_RA));
43 break;
44 case IOP13XX_PBI_LOWER_MEM_RA ... IOP13XX_PBI_UPPER_MEM_RA:
45 retval = __ioremap(IOP13XX_PBI_LOWER_MEM_PA +
46 (cookie - IOP13XX_PBI_LOWER_MEM_RA),
47 size, flags);
48 break;
49 case IOP13XX_PCIE_LOWER_IO_PA ... IOP13XX_PCIE_UPPER_IO_PA:
50 retval = (void *) IOP13XX_PCIE_IO_PHYS_TO_VIRT(cookie);
51 break;
52 case IOP13XX_PCIX_LOWER_IO_PA ... IOP13XX_PCIX_UPPER_IO_PA:
53 retval = (void *) IOP13XX_PCIX_IO_PHYS_TO_VIRT(cookie);
54 break;
55 case IOP13XX_PMMR_PHYS_MEM_BASE ... IOP13XX_PMMR_UPPER_MEM_PA:
56 retval = (void *) IOP13XX_PMMR_PHYS_TO_VIRT(cookie);
57 break;
58 default:
59 retval = __ioremap(cookie, size, flags);
60 }
61
62 return retval;
63}
64EXPORT_SYMBOL(__iop13xx_ioremap);
65
66void __iop13xx_iounmap(void __iomem *addr)
67{
68 extern void __iounmap(volatile void __iomem *addr);
69
70 if (iop13xx_atue_mem_base)
71 if (addr >= (void __iomem *) iop13xx_atue_mem_base &&
72 addr < (void __iomem *) (iop13xx_atue_mem_base +
73 iop13xx_atue_mem_size))
74 goto skip;
75
76 if (iop13xx_atux_mem_base)
77 if (addr >= (void __iomem *) iop13xx_atux_mem_base &&
78 addr < (void __iomem *) (iop13xx_atux_mem_base +
79 iop13xx_atux_mem_size))
80 goto skip;
81
82 switch ((u32) addr) {
83 case IOP13XX_PCIE_LOWER_IO_VA ... IOP13XX_PCIE_UPPER_IO_VA:
84 case IOP13XX_PCIX_LOWER_IO_VA ... IOP13XX_PCIX_UPPER_IO_VA:
85 case IOP13XX_PMMR_VIRT_MEM_BASE ... IOP13XX_PMMR_UPPER_MEM_VA:
86 goto skip;
87 }
88 __iounmap(addr);
89
90skip:
91 return;
92}
93EXPORT_SYMBOL(__iop13xx_iounmap);
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
new file mode 100644
index 000000000000..ee595786cd22
--- /dev/null
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -0,0 +1,98 @@
1/*
2 * iq81340mc board support
3 * Copyright (c) 2005-2006, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 *
18 */
19#include <linux/pci.h>
20
21#include <asm/hardware.h>
22#include <asm/irq.h>
23#include <asm/mach/pci.h>
24#include <asm/mach-types.h>
25#include <asm/mach/arch.h>
26#include <asm/arch/pci.h>
27#include <asm/mach/time.h>
28
29extern int init_atu; /* Flag to select which ATU(s) to initialize / disable */
30
31static int __init
32iq81340mc_pcix_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
33{
34 switch (idsel) {
35 case 1:
36 switch (pin) {
37 case 1: return ATUX_INTB;
38 case 2: return ATUX_INTC;
39 case 3: return ATUX_INTD;
40 case 4: return ATUX_INTA;
41 default: return -1;
42 }
43 case 2:
44 switch (pin) {
45 case 1: return ATUX_INTC;
46 case 2: return ATUX_INTD;
47 case 3: return ATUX_INTC;
48 case 4: return ATUX_INTD;
49 default: return -1;
50 }
51 default: return -1;
52 }
53}
54
55static struct hw_pci iq81340mc_pci __initdata = {
56 .swizzle = pci_std_swizzle,
57 .nr_controllers = 0,
58 .setup = iop13xx_pci_setup,
59 .map_irq = iq81340mc_pcix_map_irq,
60 .scan = iop13xx_scan_bus,
61 .preinit = iop13xx_pci_init,
62};
63
64static int __init iq81340mc_pci_init(void)
65{
66 iop13xx_atu_select(&iq81340mc_pci);
67 pci_common_init(&iq81340mc_pci);
68 iop13xx_map_pci_memory();
69
70 return 0;
71}
72
73static void __init iq81340mc_init(void)
74{
75 iop13xx_platform_init();
76 iq81340mc_pci_init();
77}
78
79static void __init iq81340mc_timer_init(void)
80{
81 iop13xx_init_time(400000000);
82}
83
84static struct sys_timer iq81340mc_timer = {
85 .init = iq81340mc_timer_init,
86 .offset = iop13xx_gettimeoffset,
87};
88
89MACHINE_START(IQ81340MC, "Intel IQ81340MC")
90 /* Maintainer: Dan Williams <dan.j.williams@intel.com> */
91 .phys_io = PHYS_IO,
92 .io_pg_offst = IO_PG_OFFSET,
93 .map_io = iop13xx_map_io,
94 .init_irq = iop13xx_init_irq,
95 .timer = &iq81340mc_timer,
96 .boot_params = BOOT_PARAM_OFFSET,
97 .init_machine = iq81340mc_init,
98MACHINE_END
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
new file mode 100644
index 000000000000..6677e14b61bf
--- /dev/null
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -0,0 +1,100 @@
1/*
2 * iq81340sc board support
3 * Copyright (c) 2005-2006, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 *
18 */
19#include <linux/pci.h>
20
21#include <asm/hardware.h>
22#include <asm/irq.h>
23#include <asm/mach/pci.h>
24#include <asm/mach-types.h>
25#include <asm/mach/arch.h>
26#include <asm/arch/pci.h>
27#include <asm/mach/time.h>
28
29extern int init_atu;
30
31static int __init
32iq81340sc_atux_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
33{
34 WARN_ON(idsel < 1 || idsel > 2);
35
36 switch (idsel) {
37 case 1:
38 switch (pin) {
39 case 1: return ATUX_INTB;
40 case 2: return ATUX_INTC;
41 case 3: return ATUX_INTD;
42 case 4: return ATUX_INTA;
43 default: return -1;
44 }
45 case 2:
46 switch (pin) {
47 case 1: return ATUX_INTC;
48 case 2: return ATUX_INTC;
49 case 3: return ATUX_INTC;
50 case 4: return ATUX_INTC;
51 default: return -1;
52 }
53 default: return -1;
54 }
55}
56
57static struct hw_pci iq81340sc_pci __initdata = {
58 .swizzle = pci_std_swizzle,
59 .nr_controllers = 0,
60 .setup = iop13xx_pci_setup,
61 .scan = iop13xx_scan_bus,
62 .map_irq = iq81340sc_atux_map_irq,
63 .preinit = iop13xx_pci_init
64};
65
66static int __init iq81340sc_pci_init(void)
67{
68 iop13xx_atu_select(&iq81340sc_pci);
69 pci_common_init(&iq81340sc_pci);
70 iop13xx_map_pci_memory();
71
72 return 0;
73}
74
75static void __init iq81340sc_init(void)
76{
77 iop13xx_platform_init();
78 iq81340sc_pci_init();
79}
80
81static void __init iq81340sc_timer_init(void)
82{
83 iop13xx_init_time(400000000);
84}
85
86static struct sys_timer iq81340sc_timer = {
87 .init = iq81340sc_timer_init,
88 .offset = iop13xx_gettimeoffset,
89};
90
91MACHINE_START(IQ81340SC, "Intel IQ81340SC")
92 /* Maintainer: Dan Williams <dan.j.williams@intel.com> */
93 .phys_io = PHYS_IO,
94 .io_pg_offst = IO_PG_OFFSET,
95 .map_io = iop13xx_map_io,
96 .init_irq = iop13xx_init_irq,
97 .timer = &iq81340sc_timer,
98 .boot_params = BOOT_PARAM_OFFSET,
99 .init_machine = iq81340sc_init,
100MACHINE_END
diff --git a/arch/arm/mach-iop13xx/irq.c b/arch/arm/mach-iop13xx/irq.c
new file mode 100644
index 000000000000..c4d9c8c5579c
--- /dev/null
+++ b/arch/arm/mach-iop13xx/irq.c
@@ -0,0 +1,286 @@
1/*
2 * iop13xx IRQ handling / support functions
3 * Copyright (c) 2005-2006, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 *
18 */
19#include <linux/init.h>
20#include <linux/interrupt.h>
21#include <linux/list.h>
22#include <linux/sysctl.h>
23#include <asm/uaccess.h>
24#include <asm/mach/irq.h>
25#include <asm/irq.h>
26#include <asm/hardware.h>
27#include <asm/mach-types.h>
28#include <asm/arch/irqs.h>
29
30/* INTCTL0 CP6 R0 Page 4
31 */
32static inline u32 read_intctl_0(void)
33{
34 u32 val;
35 asm volatile("mrc p6, 0, %0, c0, c4, 0":"=r" (val));
36 return val;
37}
38static inline void write_intctl_0(u32 val)
39{
40 asm volatile("mcr p6, 0, %0, c0, c4, 0"::"r" (val));
41}
42
43/* INTCTL1 CP6 R1 Page 4
44 */
45static inline u32 read_intctl_1(void)
46{
47 u32 val;
48 asm volatile("mrc p6, 0, %0, c1, c4, 0":"=r" (val));
49 return val;
50}
51static inline void write_intctl_1(u32 val)
52{
53 asm volatile("mcr p6, 0, %0, c1, c4, 0"::"r" (val));
54}
55
56/* INTCTL2 CP6 R2 Page 4
57 */
58static inline u32 read_intctl_2(void)
59{
60 u32 val;
61 asm volatile("mrc p6, 0, %0, c2, c4, 0":"=r" (val));
62 return val;
63}
64static inline void write_intctl_2(u32 val)
65{
66 asm volatile("mcr p6, 0, %0, c2, c4, 0"::"r" (val));
67}
68
69/* INTCTL3 CP6 R3 Page 4
70 */
71static inline u32 read_intctl_3(void)
72{
73 u32 val;
74 asm volatile("mrc p6, 0, %0, c3, c4, 0":"=r" (val));
75 return val;
76}
77static inline void write_intctl_3(u32 val)
78{
79 asm volatile("mcr p6, 0, %0, c3, c4, 0"::"r" (val));
80}
81
82/* INTSTR0 CP6 R0 Page 5
83 */
84static inline u32 read_intstr_0(void)
85{
86 u32 val;
87 asm volatile("mrc p6, 0, %0, c0, c5, 0":"=r" (val));
88 return val;
89}
90static inline void write_intstr_0(u32 val)
91{
92 asm volatile("mcr p6, 0, %0, c0, c5, 0"::"r" (val));
93}
94
95/* INTSTR1 CP6 R1 Page 5
96 */
97static inline u32 read_intstr_1(void)
98{
99 u32 val;
100 asm volatile("mrc p6, 0, %0, c1, c5, 0":"=r" (val));
101 return val;
102}
103static void write_intstr_1(u32 val)
104{
105 asm volatile("mcr p6, 0, %0, c1, c5, 0"::"r" (val));
106}
107
108/* INTSTR2 CP6 R2 Page 5
109 */
110static inline u32 read_intstr_2(void)
111{
112 u32 val;
113 asm volatile("mrc p6, 0, %0, c2, c5, 0":"=r" (val));
114 return val;
115}
116static void write_intstr_2(u32 val)
117{
118 asm volatile("mcr p6, 0, %0, c2, c5, 0"::"r" (val));
119}
120
121/* INTSTR3 CP6 R3 Page 5
122 */
123static inline u32 read_intstr_3(void)
124{
125 u32 val;
126 asm volatile("mrc p6, 0, %0, c3, c5, 0":"=r" (val));
127 return val;
128}
129static void write_intstr_3(u32 val)
130{
131 asm volatile("mcr p6, 0, %0, c3, c5, 0"::"r" (val));
132}
133
134/* INTBASE CP6 R0 Page 2
135 */
136static inline u32 read_intbase(void)
137{
138 u32 val;
139 asm volatile("mrc p6, 0, %0, c0, c2, 0":"=r" (val));
140 return val;
141}
142static void write_intbase(u32 val)
143{
144 asm volatile("mcr p6, 0, %0, c0, c2, 0"::"r" (val));
145}
146
147/* INTSIZE CP6 R2 Page 2
148 */
149static inline u32 read_intsize(void)
150{
151 u32 val;
152 asm volatile("mrc p6, 0, %0, c2, c2, 0":"=r" (val));
153 return val;
154}
155static void write_intsize(u32 val)
156{
157 asm volatile("mcr p6, 0, %0, c2, c2, 0"::"r" (val));
158}
159
160/* 0 = Interrupt Masked and 1 = Interrupt not masked */
161static void
162iop13xx_irq_mask0 (unsigned int irq)
163{
164 u32 cp_flags = iop13xx_cp6_save();
165 write_intctl_0(read_intctl_0() & ~(1 << (irq - 0)));
166 iop13xx_cp6_restore(cp_flags);
167}
168
169static void
170iop13xx_irq_mask1 (unsigned int irq)
171{
172 u32 cp_flags = iop13xx_cp6_save();
173 write_intctl_1(read_intctl_1() & ~(1 << (irq - 32)));
174 iop13xx_cp6_restore(cp_flags);
175}
176
177static void
178iop13xx_irq_mask2 (unsigned int irq)
179{
180 u32 cp_flags = iop13xx_cp6_save();
181 write_intctl_2(read_intctl_2() & ~(1 << (irq - 64)));
182 iop13xx_cp6_restore(cp_flags);
183}
184
185static void
186iop13xx_irq_mask3 (unsigned int irq)
187{
188 u32 cp_flags = iop13xx_cp6_save();
189 write_intctl_3(read_intctl_3() & ~(1 << (irq - 96)));
190 iop13xx_cp6_restore(cp_flags);
191}
192
193static void
194iop13xx_irq_unmask0(unsigned int irq)
195{
196 u32 cp_flags = iop13xx_cp6_save();
197 write_intctl_0(read_intctl_0() | (1 << (irq - 0)));
198 iop13xx_cp6_restore(cp_flags);
199}
200
201static void
202iop13xx_irq_unmask1(unsigned int irq)
203{
204 u32 cp_flags = iop13xx_cp6_save();
205 write_intctl_1(read_intctl_1() | (1 << (irq - 32)));
206 iop13xx_cp6_restore(cp_flags);
207}
208
209static void
210iop13xx_irq_unmask2(unsigned int irq)
211{
212 u32 cp_flags = iop13xx_cp6_save();
213 write_intctl_2(read_intctl_2() | (1 << (irq - 64)));
214 iop13xx_cp6_restore(cp_flags);
215}
216
217static void
218iop13xx_irq_unmask3(unsigned int irq)
219{
220 u32 cp_flags = iop13xx_cp6_save();
221 write_intctl_3(read_intctl_3() | (1 << (irq - 96)));
222 iop13xx_cp6_restore(cp_flags);
223}
224
225static struct irqchip iop13xx_irqchip0 = {
226 .ack = iop13xx_irq_mask0,
227 .mask = iop13xx_irq_mask0,
228 .unmask = iop13xx_irq_unmask0,
229};
230
231static struct irqchip iop13xx_irqchip1 = {
232 .ack = iop13xx_irq_mask1,
233 .mask = iop13xx_irq_mask1,
234 .unmask = iop13xx_irq_unmask1,
235};
236
237static struct irqchip iop13xx_irqchip2 = {
238 .ack = iop13xx_irq_mask2,
239 .mask = iop13xx_irq_mask2,
240 .unmask = iop13xx_irq_unmask2,
241};
242
243static struct irqchip iop13xx_irqchip3 = {
244 .ack = iop13xx_irq_mask3,
245 .mask = iop13xx_irq_mask3,
246 .unmask = iop13xx_irq_unmask3,
247};
248
249void __init iop13xx_init_irq(void)
250{
251 unsigned int i;
252
253 u32 cp_flags = iop13xx_cp6_save();
254
255 /* disable all interrupts */
256 write_intctl_0(0);
257 write_intctl_1(0);
258 write_intctl_2(0);
259 write_intctl_3(0);
260
261 /* treat all as IRQ */
262 write_intstr_0(0);
263 write_intstr_1(0);
264 write_intstr_2(0);
265 write_intstr_3(0);
266
267 /* initialize the interrupt vector generator */
268 write_intbase(INTBASE);
269 write_intsize(INTSIZE_4);
270
271 for(i = 0; i < NR_IOP13XX_IRQS; i++) {
272 if (i < 32)
273 set_irq_chip(i, &iop13xx_irqchip0);
274 else if (i < 64)
275 set_irq_chip(i, &iop13xx_irqchip1);
276 else if (i < 96)
277 set_irq_chip(i, &iop13xx_irqchip2);
278 else
279 set_irq_chip(i, &iop13xx_irqchip3);
280
281 set_irq_handler(i, do_level_IRQ);
282 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
283 }
284
285 iop13xx_cp6_restore(cp_flags);
286}
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
new file mode 100644
index 000000000000..89ec70ea3187
--- /dev/null
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -0,0 +1,1113 @@
1/*
2 * iop13xx PCI support
3 * Copyright (c) 2005-2006, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 *
18 */
19
20#include <linux/pci.h>
21#include <linux/delay.h>
22
23#include <asm/irq.h>
24#include <asm/hardware.h>
25#include <asm/sizes.h>
26#include <asm/mach/pci.h>
27#include <asm/arch/pci.h>
28
29#define IOP13XX_PCI_DEBUG 0
30#define PRINTK(x...) ((void)(IOP13XX_PCI_DEBUG && printk(x)))
31
32u32 iop13xx_atux_pmmr_offset; /* This offset can change based on strapping */
33u32 iop13xx_atue_pmmr_offset; /* This offset can change based on strapping */
34static struct pci_bus *pci_bus_atux = 0;
35static struct pci_bus *pci_bus_atue = 0;
36u32 iop13xx_atue_mem_base;
37u32 iop13xx_atux_mem_base;
38size_t iop13xx_atue_mem_size;
39size_t iop13xx_atux_mem_size;
40unsigned long iop13xx_pcibios_min_io = 0;
41unsigned long iop13xx_pcibios_min_mem = 0;
42
43EXPORT_SYMBOL(iop13xx_atue_mem_base);
44EXPORT_SYMBOL(iop13xx_atux_mem_base);
45EXPORT_SYMBOL(iop13xx_atue_mem_size);
46EXPORT_SYMBOL(iop13xx_atux_mem_size);
47
48int init_atu = 0; /* Flag to select which ATU(s) to initialize / disable */
49static unsigned long atux_trhfa_timeout = 0; /* Trhfa = RST# high to first
50 access */
51
52/* Scan the initialized busses and ioremap the requested memory range
53 */
54void iop13xx_map_pci_memory(void)
55{
56 int atu;
57 struct pci_bus *bus;
58 struct pci_dev *dev;
59 resource_size_t end = 0;
60
61 for (atu = 0; atu < 2; atu++) {
62 bus = atu ? pci_bus_atue : pci_bus_atux;
63 if (bus) {
64 list_for_each_entry(dev, &bus->devices, bus_list) {
65 int i;
66 int max = 7;
67
68 if (dev->subordinate)
69 max = DEVICE_COUNT_RESOURCE;
70
71 for (i = 0; i < max; i++) {
72 struct resource *res = &dev->resource[i];
73 if (res->flags & IORESOURCE_MEM)
74 end = max(res->end, end);
75 }
76 }
77
78 switch(atu) {
79 case 0:
80 iop13xx_atux_mem_size =
81 (end - IOP13XX_PCIX_LOWER_MEM_RA) + 1;
82
83 /* 16MB align the request */
84 if (iop13xx_atux_mem_size & (SZ_16M - 1)) {
85 iop13xx_atux_mem_size &= ~(SZ_16M - 1);
86 iop13xx_atux_mem_size += SZ_16M;
87 }
88
89 if (end) {
90 iop13xx_atux_mem_base =
91 (u32) __ioremap_pfn(
92 __phys_to_pfn(IOP13XX_PCIX_LOWER_MEM_PA)
93 , 0, iop13xx_atux_mem_size, 0);
94 if (!iop13xx_atux_mem_base) {
95 printk("%s: atux allocation "
96 "failed\n", __FUNCTION__);
97 BUG();
98 }
99 } else
100 iop13xx_atux_mem_size = 0;
101 PRINTK("%s: atu: %d bus_size: %d mem_base: %x\n",
102 __FUNCTION__, atu, iop13xx_atux_mem_size,
103 iop13xx_atux_mem_base);
104 break;
105 case 1:
106 iop13xx_atue_mem_size =
107 (end - IOP13XX_PCIE_LOWER_MEM_RA) + 1;
108
109 /* 16MB align the request */
110 if (iop13xx_atue_mem_size & (SZ_16M - 1)) {
111 iop13xx_atue_mem_size &= ~(SZ_16M - 1);
112 iop13xx_atue_mem_size += SZ_16M;
113 }
114
115 if (end) {
116 iop13xx_atue_mem_base =
117 (u32) __ioremap_pfn(
118 __phys_to_pfn(IOP13XX_PCIE_LOWER_MEM_PA)
119 , 0, iop13xx_atue_mem_size, 0);
120 if (!iop13xx_atue_mem_base) {
121 printk("%s: atue allocation "
122 "failed\n", __FUNCTION__);
123 BUG();
124 }
125 } else
126 iop13xx_atue_mem_size = 0;
127 PRINTK("%s: atu: %d bus_size: %d mem_base: %x\n",
128 __FUNCTION__, atu, iop13xx_atue_mem_size,
129 iop13xx_atue_mem_base);
130 break;
131 }
132
133 printk("%s: Initialized (%uM @ resource/virtual: %08lx/%08x)\n",
134 atu ? "ATUE" : "ATUX",
135 (atu ? iop13xx_atue_mem_size : iop13xx_atux_mem_size) /
136 SZ_1M,
137 atu ? IOP13XX_PCIE_LOWER_MEM_RA :
138 IOP13XX_PCIX_LOWER_MEM_RA,
139 atu ? iop13xx_atue_mem_base :
140 iop13xx_atux_mem_base);
141 end = 0;
142 }
143
144 }
145}
146
147static inline int iop13xx_atu_function(int atu)
148{
149 int func = 0;
150 /* the function number depends on the value of the
151 * IOP13XX_INTERFACE_SEL_PCIX reset strap
152 * see C-Spec section 3.17
153 */
154 switch(atu) {
155 case IOP13XX_INIT_ATU_ATUX:
156 if (__raw_readl(IOP13XX_ESSR0) & IOP13XX_INTERFACE_SEL_PCIX)
157 func = 5;
158 else
159 func = 0;
160 break;
161 case IOP13XX_INIT_ATU_ATUE:
162 if (__raw_readl(IOP13XX_ESSR0) & IOP13XX_INTERFACE_SEL_PCIX)
163 func = 0;
164 else
165 func = 5;
166 break;
167 default:
168 BUG();
169 }
170
171 return func;
172}
173
174/* iop13xx_atux_cfg_address - format a configuration address for atux
175 * @bus: Target bus to access
176 * @devfn: Combined device number and function number
177 * @where: Desired register's address offset
178 *
179 * Convert the parameters to a configuration address formatted
180 * according the PCI-X 2.0 specification
181 */
182static u32 iop13xx_atux_cfg_address(struct pci_bus *bus, int devfn, int where)
183{
184 struct pci_sys_data *sys = bus->sysdata;
185 u32 addr;
186
187 if (sys->busnr == bus->number)
188 addr = 1 << (PCI_SLOT(devfn) + 16) | (PCI_SLOT(devfn) << 11);
189 else
190 addr = bus->number << 16 | PCI_SLOT(devfn) << 11 | 1;
191
192 addr |= PCI_FUNC(devfn) << 8 | ((where & 0xff) & ~3);
193 addr |= ((where & 0xf00) >> 8) << 24; /* upper register number */
194
195 return addr;
196}
197
198/* iop13xx_atue_cfg_address - format a configuration address for atue
199 * @bus: Target bus to access
200 * @devfn: Combined device number and function number
201 * @where: Desired register's address offset
202 *
203 * Convert the parameters to an address usable by the ATUE_OCCAR
204 */
205static u32 iop13xx_atue_cfg_address(struct pci_bus *bus, int devfn, int where)
206{
207 struct pci_sys_data *sys = bus->sysdata;
208 u32 addr;
209
210 PRINTK("iop13xx_atue_cfg_address: bus: %d dev: %d func: %d",
211 bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
212 addr = ((u32) bus->number) << IOP13XX_ATUE_OCCAR_BUS_NUM |
213 ((u32) PCI_SLOT(devfn)) << IOP13XX_ATUE_OCCAR_DEV_NUM |
214 ((u32) PCI_FUNC(devfn)) << IOP13XX_ATUE_OCCAR_FUNC_NUM |
215 (where & ~0x3);
216
217 if (sys->busnr != bus->number)
218 addr |= 1; /* type 1 access */
219
220 return addr;
221}
222
223/* This routine checks the status of the last configuration cycle. If an error
224 * was detected it returns >0, else it returns a 0. The errors being checked
225 * are parity, master abort, target abort (master and target). These types of
226 * errors occure during a config cycle where there is no device, like during
227 * the discovery stage.
228 */
229static int iop13xx_atux_pci_status(int clear)
230{
231 unsigned int status;
232 int err = 0;
233
234 /*
235 * Check the status registers.
236 */
237 status = __raw_readw(IOP13XX_ATUX_ATUSR);
238 if (status & IOP_PCI_STATUS_ERROR)
239 {
240 PRINTK("\t\t\tPCI error: ATUSR %#08x", status);
241 if(clear)
242 __raw_writew(status & IOP_PCI_STATUS_ERROR,
243 IOP13XX_ATUX_ATUSR);
244 err = 1;
245 }
246 status = __raw_readl(IOP13XX_ATUX_ATUISR);
247 if (status & IOP13XX_ATUX_ATUISR_ERROR)
248 {
249 PRINTK("\t\t\tPCI error interrupt: ATUISR %#08x", status);
250 if(clear)
251 __raw_writel(status & IOP13XX_ATUX_ATUISR_ERROR,
252 IOP13XX_ATUX_ATUISR);
253 err = 1;
254 }
255 return err;
256}
257
258/* Simply write the address register and read the configuration
259 * data. Note that the data dependency on %0 encourages an abort
260 * to be detected before we return.
261 */
262static inline u32 iop13xx_atux_read(unsigned long addr)
263{
264 u32 val;
265
266 __asm__ __volatile__(
267 "str %1, [%2]\n\t"
268 "ldr %0, [%3]\n\t"
269 "mov %0, %0\n\t"
270 : "=r" (val)
271 : "r" (addr), "r" (IOP13XX_ATUX_OCCAR), "r" (IOP13XX_ATUX_OCCDR));
272
273 return val;
274}
275
276/* The read routines must check the error status of the last configuration
277 * cycle. If there was an error, the routine returns all hex f's.
278 */
279static int
280iop13xx_atux_read_config(struct pci_bus *bus, unsigned int devfn, int where,
281 int size, u32 *value)
282{
283 unsigned long addr = iop13xx_atux_cfg_address(bus, devfn, where);
284 u32 val = iop13xx_atux_read(addr) >> ((where & 3) * 8);
285
286 if (iop13xx_atux_pci_status(1) || is_atux_occdr_error()) {
287 __raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3,
288 IOP13XX_XBG_BECSR);
289 val = 0xffffffff;
290 }
291
292 *value = val;
293
294 return PCIBIOS_SUCCESSFUL;
295}
296
297static int
298iop13xx_atux_write_config(struct pci_bus *bus, unsigned int devfn, int where,
299 int size, u32 value)
300{
301 unsigned long addr = iop13xx_atux_cfg_address(bus, devfn, where);
302 u32 val;
303
304 if (size != 4) {
305 val = iop13xx_atux_read(addr);
306 if (!iop13xx_atux_pci_status(1) == 0)
307 return PCIBIOS_SUCCESSFUL;
308
309 where = (where & 3) * 8;
310
311 if (size == 1)
312 val &= ~(0xff << where);
313 else
314 val &= ~(0xffff << where);
315
316 __raw_writel(val | value << where, IOP13XX_ATUX_OCCDR);
317 } else {
318 __raw_writel(addr, IOP13XX_ATUX_OCCAR);
319 __raw_writel(value, IOP13XX_ATUX_OCCDR);
320 }
321
322 return PCIBIOS_SUCCESSFUL;
323}
324
325static struct pci_ops iop13xx_atux_ops = {
326 .read = iop13xx_atux_read_config,
327 .write = iop13xx_atux_write_config,
328};
329
330/* This routine checks the status of the last configuration cycle. If an error
331 * was detected it returns >0, else it returns a 0. The errors being checked
332 * are parity, master abort, target abort (master and target). These types of
333 * errors occure during a config cycle where there is no device, like during
334 * the discovery stage.
335 */
336static int iop13xx_atue_pci_status(int clear)
337{
338 unsigned int status;
339 int err = 0;
340
341 /*
342 * Check the status registers.
343 */
344
345 /* standard pci status register */
346 status = __raw_readw(IOP13XX_ATUE_ATUSR);
347 if (status & IOP_PCI_STATUS_ERROR) {
348 PRINTK("\t\t\tPCI error: ATUSR %#08x", status);
349 if(clear)
350 __raw_writew(status & IOP_PCI_STATUS_ERROR,
351 IOP13XX_ATUE_ATUSR);
352 err++;
353 }
354
355 /* check the normal status bits in the ATUISR */
356 status = __raw_readl(IOP13XX_ATUE_ATUISR);
357 if (status & IOP13XX_ATUE_ATUISR_ERROR) {
358 PRINTK("\t\t\tPCI error: ATUISR %#08x", status);
359 if (clear)
360 __raw_writew(status & IOP13XX_ATUE_ATUISR_ERROR,
361 IOP13XX_ATUE_ATUISR);
362 err++;
363
364 /* check the PCI-E status if the ATUISR reports an interface error */
365 if (status & IOP13XX_ATUE_STAT_PCI_IFACE_ERR) {
366 /* get the unmasked errors */
367 status = __raw_readl(IOP13XX_ATUE_PIE_STS) &
368 ~(__raw_readl(IOP13XX_ATUE_PIE_MSK));
369
370 if (status) {
371 PRINTK("\t\t\tPCI-E error: ATUE_PIE_STS %#08x",
372 __raw_readl(IOP13XX_ATUE_PIE_STS));
373 err++;
374 } else {
375 PRINTK("\t\t\tPCI-E error: ATUE_PIE_STS %#08x",
376 __raw_readl(IOP13XX_ATUE_PIE_STS));
377 PRINTK("\t\t\tPCI-E error: ATUE_PIE_MSK %#08x",
378 __raw_readl(IOP13XX_ATUE_PIE_MSK));
379 BUG();
380 }
381
382 if(clear)
383 __raw_writel(status, IOP13XX_ATUE_PIE_STS);
384 }
385 }
386
387 return err;
388}
389
390static inline int __init
391iop13xx_pcie_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
392{
393 WARN_ON(idsel != 0);
394
395 switch (pin) {
396 case 1: return ATUE_INTA;
397 case 2: return ATUE_INTB;
398 case 3: return ATUE_INTC;
399 case 4: return ATUE_INTD;
400 default: return -1;
401 }
402}
403
404static inline u32 iop13xx_atue_read(unsigned long addr)
405{
406 u32 val;
407
408 __raw_writel(addr, IOP13XX_ATUE_OCCAR);
409 val = __raw_readl(IOP13XX_ATUE_OCCDR);
410
411 rmb();
412
413 return val;
414}
415
416/* The read routines must check the error status of the last configuration
417 * cycle. If there was an error, the routine returns all hex f's.
418 */
419static int
420iop13xx_atue_read_config(struct pci_bus *bus, unsigned int devfn, int where,
421 int size, u32 *value)
422{
423 u32 val;
424 unsigned long addr = iop13xx_atue_cfg_address(bus, devfn, where);
425
426 /* Hide device numbers > 0 on the local PCI-E bus (Type 0 access) */
427 if (!PCI_SLOT(devfn) || (addr & 1)) {
428 val = iop13xx_atue_read(addr) >> ((where & 3) * 8);
429 if( iop13xx_atue_pci_status(1) || is_atue_occdr_error() ) {
430 __raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3,
431 IOP13XX_XBG_BECSR);
432 val = 0xffffffff;
433 }
434
435 PRINTK("addr=%#0lx, val=%#010x", addr, val);
436 } else
437 val = 0xffffffff;
438
439 *value = val;
440
441 return PCIBIOS_SUCCESSFUL;
442}
443
444static int
445iop13xx_atue_write_config(struct pci_bus *bus, unsigned int devfn, int where,
446 int size, u32 value)
447{
448 unsigned long addr = iop13xx_atue_cfg_address(bus, devfn, where);
449 u32 val;
450
451 if (size != 4) {
452 val = iop13xx_atue_read(addr);
453 if (!iop13xx_atue_pci_status(1) == 0)
454 return PCIBIOS_SUCCESSFUL;
455
456 where = (where & 3) * 8;
457
458 if (size == 1)
459 val &= ~(0xff << where);
460 else
461 val &= ~(0xffff << where);
462
463 __raw_writel(val | value << where, IOP13XX_ATUE_OCCDR);
464 } else {
465 __raw_writel(addr, IOP13XX_ATUE_OCCAR);
466 __raw_writel(value, IOP13XX_ATUE_OCCDR);
467 }
468
469 return PCIBIOS_SUCCESSFUL;
470}
471
472static struct pci_ops iop13xx_atue_ops = {
473 .read = iop13xx_atue_read_config,
474 .write = iop13xx_atue_write_config,
475};
476
477/* When a PCI device does not exist during config cycles, the XScale gets a
478 * bus error instead of returning 0xffffffff. We can't rely on the ATU status
479 * bits to tell us that it was indeed a configuration cycle that caused this
480 * error especially in the case when the ATUE link is down. Instead we rely
481 * on data from the south XSI bridge to validate the abort
482 */
483int
484iop13xx_pci_abort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
485{
486 PRINTK("Data abort: address = 0x%08lx "
487 "fsr = 0x%03x PC = 0x%08lx LR = 0x%08lx",
488 addr, fsr, regs->ARM_pc, regs->ARM_lr);
489
490 PRINTK("IOP13XX_XBG_BECSR: %#10x", __raw_readl(IOP13XX_XBG_BECSR));
491 PRINTK("IOP13XX_XBG_BERAR: %#10x", __raw_readl(IOP13XX_XBG_BERAR));
492 PRINTK("IOP13XX_XBG_BERUAR: %#10x", __raw_readl(IOP13XX_XBG_BERUAR));
493
494 /* If it was an imprecise abort, then we need to correct the
495 * return address to be _after_ the instruction.
496 */
497 if (fsr & (1 << 10))
498 regs->ARM_pc += 4;
499
500 if (is_atue_occdr_error() || is_atux_occdr_error())
501 return 0;
502 else
503 return 1;
504}
505
506/* Scan an IOP13XX PCI bus. nr selects which ATU we use.
507 */
508struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
509{
510 int which_atu;
511 struct pci_bus *bus = NULL;
512
513 switch (init_atu) {
514 case IOP13XX_INIT_ATU_ATUX:
515 which_atu = nr ? 0 : IOP13XX_INIT_ATU_ATUX;
516 break;
517 case IOP13XX_INIT_ATU_ATUE:
518 which_atu = nr ? 0 : IOP13XX_INIT_ATU_ATUE;
519 break;
520 case (IOP13XX_INIT_ATU_ATUX | IOP13XX_INIT_ATU_ATUE):
521 which_atu = nr ? IOP13XX_INIT_ATU_ATUE : IOP13XX_INIT_ATU_ATUX;
522 break;
523 default:
524 which_atu = 0;
525 }
526
527 if (!which_atu) {
528 BUG();
529 return NULL;
530 }
531
532 switch (which_atu) {
533 case IOP13XX_INIT_ATU_ATUX:
534 if (time_after_eq(jiffies + msecs_to_jiffies(1000),
535 atux_trhfa_timeout)) /* ensure not wrap */
536 while(time_before(jiffies, atux_trhfa_timeout))
537 udelay(100);
538
539 bus = pci_bus_atux = pci_scan_bus(sys->busnr,
540 &iop13xx_atux_ops,
541 sys);
542 break;
543 case IOP13XX_INIT_ATU_ATUE:
544 bus = pci_bus_atue = pci_scan_bus(sys->busnr,
545 &iop13xx_atue_ops,
546 sys);
547 break;
548 }
549
550 return bus;
551}
552
553/* This function is called from iop13xx_pci_init() after assigning valid
554 * values to iop13xx_atue_pmmr_offset. This is the location for common
555 * setup of ATUE for all IOP13XX implementations.
556 */
557void __init iop13xx_atue_setup(void)
558{
559 int func = iop13xx_atu_function(IOP13XX_INIT_ATU_ATUE);
560 u32 reg_val;
561
562 /* BAR 1 (1:1 mapping with Physical RAM) */
563 /* Set limit and enable */
564 __raw_writel(~(IOP13XX_MAX_RAM_SIZE - PHYS_OFFSET - 1) & ~0x1,
565 IOP13XX_ATUE_IALR1);
566 __raw_writel(0x0, IOP13XX_ATUE_IAUBAR1);
567
568 /* Set base at the top of the reserved address space */
569 __raw_writel(PHYS_OFFSET | PCI_BASE_ADDRESS_MEM_TYPE_64 |
570 PCI_BASE_ADDRESS_MEM_PREFETCH, IOP13XX_ATUE_IABAR1);
571
572 /* 1:1 mapping with physical ram
573 * (leave big endian byte swap disabled)
574 */
575 __raw_writel(0x0, IOP13XX_ATUE_IAUTVR1);
576 __raw_writel(PHYS_OFFSET, IOP13XX_ATUE_IATVR1);
577
578 /* Outbound window 1 (PCIX/PCIE memory window) */
579 /* 32 bit Address Space */
580 __raw_writel(0x0, IOP13XX_ATUE_OUMWTVR1);
581 /* PA[35:32] */
582 __raw_writel(IOP13XX_ATUE_OUMBAR_ENABLE |
583 (IOP13XX_PCIE_MEM_PHYS_OFFSET >> 32),
584 IOP13XX_ATUE_OUMBAR1);
585
586 /* Setup the I/O Bar
587 * A[35-16] in 31-12
588 */
589 __raw_writel(((IOP13XX_PCIE_LOWER_IO_PA >> 0x4) & 0xfffff000),
590 IOP13XX_ATUE_OIOBAR);
591 __raw_writel(IOP13XX_PCIE_LOWER_IO_BA, IOP13XX_ATUE_OIOWTVR);
592
593 /* clear startup errors */
594 iop13xx_atue_pci_status(1);
595
596 /* OIOBAR function number
597 */
598 reg_val = __raw_readl(IOP13XX_ATUE_OIOBAR);
599 reg_val &= ~0x7;
600 reg_val |= func;
601 __raw_writel(reg_val, IOP13XX_ATUE_OIOBAR);
602
603 /* OUMBAR function numbers
604 */
605 reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR0);
606 reg_val &= ~(IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK <<
607 IOP13XX_ATU_OUMBAR_FUNC_NUM);
608 reg_val |= func << IOP13XX_ATU_OUMBAR_FUNC_NUM;
609 __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR0);
610
611 reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR1);
612 reg_val &= ~(IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK <<
613 IOP13XX_ATU_OUMBAR_FUNC_NUM);
614 reg_val |= func << IOP13XX_ATU_OUMBAR_FUNC_NUM;
615 __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR1);
616
617 reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR2);
618 reg_val &= ~(IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK <<
619 IOP13XX_ATU_OUMBAR_FUNC_NUM);
620 reg_val |= func << IOP13XX_ATU_OUMBAR_FUNC_NUM;
621 __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR2);
622
623 reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR3);
624 reg_val &= ~(IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK <<
625 IOP13XX_ATU_OUMBAR_FUNC_NUM);
626 reg_val |= func << IOP13XX_ATU_OUMBAR_FUNC_NUM;
627 __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR3);
628
629 /* Enable inbound and outbound cycles
630 */
631 reg_val = __raw_readw(IOP13XX_ATUE_ATUCMD);
632 reg_val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
633 PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
634 __raw_writew(reg_val, IOP13XX_ATUE_ATUCMD);
635
636 reg_val = __raw_readl(IOP13XX_ATUE_ATUCR);
637 reg_val |= IOP13XX_ATUE_ATUCR_OUT_EN |
638 IOP13XX_ATUE_ATUCR_IVM;
639 __raw_writel(reg_val, IOP13XX_ATUE_ATUCR);
640}
641
642void __init iop13xx_atue_disable(void)
643{
644 u32 reg_val;
645
646 __raw_writew(0x0, IOP13XX_ATUE_ATUCMD);
647 __raw_writel(IOP13XX_ATUE_ATUCR_IVM, IOP13XX_ATUE_ATUCR);
648
649 /* wait for cycles to quiesce */
650 while (__raw_readl(IOP13XX_ATUE_PCSR) & (IOP13XX_ATUE_PCSR_OUT_Q_BUSY |
651 IOP13XX_ATUE_PCSR_IN_Q_BUSY |
652 IOP13XX_ATUE_PCSR_LLRB_BUSY))
653 cpu_relax();
654
655 /* BAR 0 ( Disabled ) */
656 __raw_writel(0x0, IOP13XX_ATUE_IAUBAR0);
657 __raw_writel(0x0, IOP13XX_ATUE_IABAR0);
658 __raw_writel(0x0, IOP13XX_ATUE_IAUTVR0);
659 __raw_writel(0x0, IOP13XX_ATUE_IATVR0);
660 __raw_writel(0x0, IOP13XX_ATUE_IALR0);
661 reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR0);
662 reg_val &= ~IOP13XX_ATUE_OUMBAR_ENABLE;
663 __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR0);
664
665 /* BAR 1 ( Disabled ) */
666 __raw_writel(0x0, IOP13XX_ATUE_IAUBAR1);
667 __raw_writel(0x0, IOP13XX_ATUE_IABAR1);
668 __raw_writel(0x0, IOP13XX_ATUE_IAUTVR1);
669 __raw_writel(0x0, IOP13XX_ATUE_IATVR1);
670 __raw_writel(0x0, IOP13XX_ATUE_IALR1);
671 reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR1);
672 reg_val &= ~IOP13XX_ATUE_OUMBAR_ENABLE;
673 __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR1);
674
675 /* BAR 2 ( Disabled ) */
676 __raw_writel(0x0, IOP13XX_ATUE_IAUBAR2);
677 __raw_writel(0x0, IOP13XX_ATUE_IABAR2);
678 __raw_writel(0x0, IOP13XX_ATUE_IAUTVR2);
679 __raw_writel(0x0, IOP13XX_ATUE_IATVR2);
680 __raw_writel(0x0, IOP13XX_ATUE_IALR2);
681 reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR2);
682 reg_val &= ~IOP13XX_ATUE_OUMBAR_ENABLE;
683 __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR2);
684
685 /* BAR 3 ( Disabled ) */
686 reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR3);
687 reg_val &= ~IOP13XX_ATUE_OUMBAR_ENABLE;
688 __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR3);
689
690 /* Setup the I/O Bar
691 * A[35-16] in 31-12
692 */
693 __raw_writel((IOP13XX_PCIE_LOWER_IO_PA >> 0x4) & 0xfffff000,
694 IOP13XX_ATUE_OIOBAR);
695 __raw_writel(IOP13XX_PCIE_LOWER_IO_BA, IOP13XX_ATUE_OIOWTVR);
696}
697
698/* This function is called from iop13xx_pci_init() after assigning valid
699 * values to iop13xx_atux_pmmr_offset. This is the location for common
700 * setup of ATUX for all IOP13XX implementations.
701 */
702void __init iop13xx_atux_setup(void)
703{
704 u32 reg_val;
705 int func = iop13xx_atu_function(IOP13XX_INIT_ATU_ATUX);
706
707 /* Take PCI-X bus out of reset if bootloader hasn't already.
708 * According to spec, we should wait for 2^25 PCI clocks to meet
709 * the PCI timing parameter Trhfa (RST# high to first access).
710 * This is rarely necessary and often ignored.
711 */
712 reg_val = __raw_readl(IOP13XX_ATUX_PCSR);
713 if (reg_val & IOP13XX_ATUX_PCSR_P_RSTOUT) {
714 int msec = (reg_val >> IOP13XX_ATUX_PCSR_FREQ_OFFSET) & 0x7;
715 msec = 1000 / (8-msec); /* bits 100=133MHz, 111=>33MHz */
716 __raw_writel(reg_val & ~IOP13XX_ATUX_PCSR_P_RSTOUT,
717 IOP13XX_ATUX_PCSR);
718 atux_trhfa_timeout = jiffies + msecs_to_jiffies(msec);
719 }
720 else
721 atux_trhfa_timeout = jiffies;
722
723 /* BAR 1 (1:1 mapping with Physical RAM) */
724 /* Set limit and enable */
725 __raw_writel(~(IOP13XX_MAX_RAM_SIZE - PHYS_OFFSET - 1) & ~0x1,
726 IOP13XX_ATUX_IALR1);
727 __raw_writel(0x0, IOP13XX_ATUX_IAUBAR1);
728
729 /* Set base at the top of the reserved address space */
730 __raw_writel(PHYS_OFFSET | PCI_BASE_ADDRESS_MEM_TYPE_64 |
731 PCI_BASE_ADDRESS_MEM_PREFETCH, IOP13XX_ATUX_IABAR1);
732
733 /* 1:1 mapping with physical ram
734 * (leave big endian byte swap disabled)
735 */
736 __raw_writel(0x0, IOP13XX_ATUX_IAUTVR1);
737 __raw_writel(PHYS_OFFSET, IOP13XX_ATUX_IATVR1);
738
739 /* Outbound window 1 (PCIX/PCIE memory window) */
740 /* 32 bit Address Space */
741 __raw_writel(0x0, IOP13XX_ATUX_OUMWTVR1);
742 /* PA[35:32] */
743 __raw_writel(IOP13XX_ATUX_OUMBAR_ENABLE |
744 IOP13XX_PCIX_MEM_PHYS_OFFSET >> 32,
745 IOP13XX_ATUX_OUMBAR1);
746
747 /* Setup the I/O Bar
748 * A[35-16] in 31-12
749 */
750 __raw_writel((IOP13XX_PCIX_LOWER_IO_PA >> 0x4) & 0xfffff000,
751 IOP13XX_ATUX_OIOBAR);
752 __raw_writel(IOP13XX_PCIX_LOWER_IO_BA, IOP13XX_ATUX_OIOWTVR);
753
754 /* clear startup errors */
755 iop13xx_atux_pci_status(1);
756
757 /* OIOBAR function number
758 */
759 reg_val = __raw_readl(IOP13XX_ATUX_OIOBAR);
760 reg_val &= ~0x7;
761 reg_val |= func;
762 __raw_writel(reg_val, IOP13XX_ATUX_OIOBAR);
763
764 /* OUMBAR function numbers
765 */
766 reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR0);
767 reg_val &= ~(IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK <<
768 IOP13XX_ATU_OUMBAR_FUNC_NUM);
769 reg_val |= func << IOP13XX_ATU_OUMBAR_FUNC_NUM;
770 __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR0);
771
772 reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR1);
773 reg_val &= ~(IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK <<
774 IOP13XX_ATU_OUMBAR_FUNC_NUM);
775 reg_val |= func << IOP13XX_ATU_OUMBAR_FUNC_NUM;
776 __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR1);
777
778 reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR2);
779 reg_val &= ~(IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK <<
780 IOP13XX_ATU_OUMBAR_FUNC_NUM);
781 reg_val |= func << IOP13XX_ATU_OUMBAR_FUNC_NUM;
782 __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR2);
783
784 reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR3);
785 reg_val &= ~(IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK <<
786 IOP13XX_ATU_OUMBAR_FUNC_NUM);
787 reg_val |= func << IOP13XX_ATU_OUMBAR_FUNC_NUM;
788 __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR3);
789
790 /* Enable inbound and outbound cycles
791 */
792 reg_val = __raw_readw(IOP13XX_ATUX_ATUCMD);
793 reg_val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
794 PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
795 __raw_writew(reg_val, IOP13XX_ATUX_ATUCMD);
796
797 reg_val = __raw_readl(IOP13XX_ATUX_ATUCR);
798 reg_val |= IOP13XX_ATUX_ATUCR_OUT_EN;
799 __raw_writel(reg_val, IOP13XX_ATUX_ATUCR);
800}
801
802void __init iop13xx_atux_disable(void)
803{
804 u32 reg_val;
805
806 __raw_writew(0x0, IOP13XX_ATUX_ATUCMD);
807 __raw_writel(0x0, IOP13XX_ATUX_ATUCR);
808
809 /* wait for cycles to quiesce */
810 while (__raw_readl(IOP13XX_ATUX_PCSR) & (IOP13XX_ATUX_PCSR_OUT_Q_BUSY |
811 IOP13XX_ATUX_PCSR_IN_Q_BUSY))
812 cpu_relax();
813
814 /* BAR 0 ( Disabled ) */
815 __raw_writel(0x0, IOP13XX_ATUX_IAUBAR0);
816 __raw_writel(0x0, IOP13XX_ATUX_IABAR0);
817 __raw_writel(0x0, IOP13XX_ATUX_IAUTVR0);
818 __raw_writel(0x0, IOP13XX_ATUX_IATVR0);
819 __raw_writel(0x0, IOP13XX_ATUX_IALR0);
820 reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR0);
821 reg_val &= ~IOP13XX_ATUX_OUMBAR_ENABLE;
822 __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR0);
823
824 /* BAR 1 ( Disabled ) */
825 __raw_writel(0x0, IOP13XX_ATUX_IAUBAR1);
826 __raw_writel(0x0, IOP13XX_ATUX_IABAR1);
827 __raw_writel(0x0, IOP13XX_ATUX_IAUTVR1);
828 __raw_writel(0x0, IOP13XX_ATUX_IATVR1);
829 __raw_writel(0x0, IOP13XX_ATUX_IALR1);
830 reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR1);
831 reg_val &= ~IOP13XX_ATUX_OUMBAR_ENABLE;
832 __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR1);
833
834 /* BAR 2 ( Disabled ) */
835 __raw_writel(0x0, IOP13XX_ATUX_IAUBAR2);
836 __raw_writel(0x0, IOP13XX_ATUX_IABAR2);
837 __raw_writel(0x0, IOP13XX_ATUX_IAUTVR2);
838 __raw_writel(0x0, IOP13XX_ATUX_IATVR2);
839 __raw_writel(0x0, IOP13XX_ATUX_IALR2);
840 reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR2);
841 reg_val &= ~IOP13XX_ATUX_OUMBAR_ENABLE;
842 __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR2);
843
844 /* BAR 3 ( Disabled ) */
845 __raw_writel(0x0, IOP13XX_ATUX_IAUBAR3);
846 __raw_writel(0x0, IOP13XX_ATUX_IABAR3);
847 __raw_writel(0x0, IOP13XX_ATUX_IAUTVR3);
848 __raw_writel(0x0, IOP13XX_ATUX_IATVR3);
849 __raw_writel(0x0, IOP13XX_ATUX_IALR3);
850 reg_val = __raw_readl(IOP13XX_ATUX_OUMBAR3);
851 reg_val &= ~IOP13XX_ATUX_OUMBAR_ENABLE;
852 __raw_writel(reg_val, IOP13XX_ATUX_OUMBAR3);
853
854 /* Setup the I/O Bar
855 * A[35-16] in 31-12
856 */
857 __raw_writel((IOP13XX_PCIX_LOWER_IO_PA >> 0x4) & 0xfffff000,
858 IOP13XX_ATUX_OIOBAR);
859 __raw_writel(IOP13XX_PCIX_LOWER_IO_BA, IOP13XX_ATUX_OIOWTVR);
860}
861
862void __init iop13xx_set_atu_mmr_bases(void)
863{
864 /* Based on ESSR0, determine the ATU X/E offsets */
865 switch(__raw_readl(IOP13XX_ESSR0) &
866 (IOP13XX_CONTROLLER_ONLY | IOP13XX_INTERFACE_SEL_PCIX)) {
867 /* both asserted */
868 case 0:
869 iop13xx_atux_pmmr_offset = IOP13XX_ATU1_PMMR_OFFSET;
870 iop13xx_atue_pmmr_offset = IOP13XX_ATU2_PMMR_OFFSET;
871 break;
872 /* IOP13XX_CONTROLLER_ONLY = deasserted
873 * IOP13XX_INTERFACE_SEL_PCIX = asserted
874 */
875 case IOP13XX_CONTROLLER_ONLY:
876 iop13xx_atux_pmmr_offset = IOP13XX_ATU0_PMMR_OFFSET;
877 iop13xx_atue_pmmr_offset = IOP13XX_ATU2_PMMR_OFFSET;
878 break;
879 /* IOP13XX_CONTROLLER_ONLY = asserted
880 * IOP13XX_INTERFACE_SEL_PCIX = deasserted
881 */
882 case IOP13XX_INTERFACE_SEL_PCIX:
883 iop13xx_atux_pmmr_offset = IOP13XX_ATU1_PMMR_OFFSET;
884 iop13xx_atue_pmmr_offset = IOP13XX_ATU2_PMMR_OFFSET;
885 break;
886 /* both deasserted */
887 case IOP13XX_CONTROLLER_ONLY | IOP13XX_INTERFACE_SEL_PCIX:
888 iop13xx_atux_pmmr_offset = IOP13XX_ATU2_PMMR_OFFSET;
889 iop13xx_atue_pmmr_offset = IOP13XX_ATU0_PMMR_OFFSET;
890 break;
891 default:
892 BUG();
893 }
894}
895
896void __init iop13xx_atu_select(struct hw_pci *plat_pci)
897{
898 int i;
899
900 /* set system defaults
901 * note: if "iop13xx_init_atu=" is specified this autodetect
902 * sequence will be bypassed
903 */
904 if (init_atu == IOP13XX_INIT_ATU_DEFAULT) {
905 /* check for single/dual interface */
906 if (__raw_readl(IOP13XX_ESSR0) & IOP13XX_INTERFACE_SEL_PCIX) {
907 /* ATUE must be present check the device id
908 * to see if ATUX is present.
909 */
910 init_atu |= IOP13XX_INIT_ATU_ATUE;
911 switch (__raw_readw(IOP13XX_ATUE_DID) & 0xf0) {
912 case 0x70:
913 case 0x80:
914 case 0xc0:
915 init_atu |= IOP13XX_INIT_ATU_ATUX;
916 break;
917 }
918 } else {
919 /* ATUX must be present check the device id
920 * to see if ATUE is present.
921 */
922 init_atu |= IOP13XX_INIT_ATU_ATUX;
923 switch (__raw_readw(IOP13XX_ATUX_DID) & 0xf0) {
924 case 0x70:
925 case 0x80:
926 case 0xc0:
927 init_atu |= IOP13XX_INIT_ATU_ATUE;
928 break;
929 }
930 }
931
932 /* check central resource and root complex capability */
933 if (init_atu & IOP13XX_INIT_ATU_ATUX)
934 if (!(__raw_readl(IOP13XX_ATUX_PCSR) &
935 IOP13XX_ATUX_PCSR_CENTRAL_RES))
936 init_atu &= ~IOP13XX_INIT_ATU_ATUX;
937
938 if (init_atu & IOP13XX_INIT_ATU_ATUE)
939 if (__raw_readl(IOP13XX_ATUE_PCSR) &
940 IOP13XX_ATUE_PCSR_END_POINT)
941 init_atu &= ~IOP13XX_INIT_ATU_ATUE;
942 }
943
944 for (i = 0; i < 2; i++) {
945 if((init_atu & (1 << i)) == (1 << i))
946 plat_pci->nr_controllers++;
947 }
948}
949
950void __init iop13xx_pci_init(void)
951{
952 /* clear pre-existing south bridge errors */
953 __raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3, IOP13XX_XBG_BECSR);
954
955 /* Setup the Min Address for PCI memory... */
956 iop13xx_pcibios_min_mem = IOP13XX_PCIX_LOWER_MEM_BA;
957
958 /* if Linux is given control of an ATU
959 * clear out its prior configuration,
960 * otherwise do not touch the registers
961 */
962 if (init_atu & IOP13XX_INIT_ATU_ATUE) {
963 iop13xx_atue_disable();
964 iop13xx_atue_setup();
965 }
966
967 if (init_atu & IOP13XX_INIT_ATU_ATUX) {
968 iop13xx_atux_disable();
969 iop13xx_atux_setup();
970 }
971
972 hook_fault_code(16+6, iop13xx_pci_abort, SIGBUS,
973 "imprecise external abort");
974}
975
976/* intialize the pci memory space. handle any combination of
977 * atue and atux enabled/disabled
978 */
979int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
980{
981 struct resource *res;
982 int which_atu;
983 u32 pcixsr, pcsr;
984
985 if (nr > 1)
986 return 0;
987
988 res = kmalloc(sizeof(struct resource) * 2, GFP_KERNEL);
989 if (!res)
990 panic("PCI: unable to alloc resources");
991
992 memset(res, 0, sizeof(struct resource) * 2);
993
994 /* 'nr' assumptions:
995 * ATUX is always 0
996 * ATUE is 1 when ATUX is also enabled
997 * ATUE is 0 when ATUX is disabled
998 */
999 switch(init_atu) {
1000 case IOP13XX_INIT_ATU_ATUX:
1001 which_atu = nr ? 0 : IOP13XX_INIT_ATU_ATUX;
1002 break;
1003 case IOP13XX_INIT_ATU_ATUE:
1004 which_atu = nr ? 0 : IOP13XX_INIT_ATU_ATUE;
1005 break;
1006 case (IOP13XX_INIT_ATU_ATUX | IOP13XX_INIT_ATU_ATUE):
1007 which_atu = nr ? IOP13XX_INIT_ATU_ATUE : IOP13XX_INIT_ATU_ATUX;
1008 break;
1009 default:
1010 which_atu = 0;
1011 }
1012
1013 if (!which_atu)
1014 return 0;
1015
1016 switch(which_atu) {
1017 case IOP13XX_INIT_ATU_ATUX:
1018 pcixsr = __raw_readl(IOP13XX_ATUX_PCIXSR);
1019 pcixsr &= ~0xffff;
1020 pcixsr |= sys->busnr << IOP13XX_ATUX_PCIXSR_BUS_NUM |
1021 0 << IOP13XX_ATUX_PCIXSR_DEV_NUM |
1022 iop13xx_atu_function(IOP13XX_INIT_ATU_ATUX)
1023 << IOP13XX_ATUX_PCIXSR_FUNC_NUM;
1024 __raw_writel(pcixsr, IOP13XX_ATUX_PCIXSR);
1025
1026 res[0].start = IOP13XX_PCIX_LOWER_IO_PA;
1027 res[0].end = IOP13XX_PCIX_UPPER_IO_PA;
1028 res[0].name = "IQ81340 ATUX PCI I/O Space";
1029 res[0].flags = IORESOURCE_IO;
1030
1031 res[1].start = IOP13XX_PCIX_LOWER_MEM_RA;
1032 res[1].end = IOP13XX_PCIX_UPPER_MEM_RA;
1033 res[1].name = "IQ81340 ATUX PCI Memory Space";
1034 res[1].flags = IORESOURCE_MEM;
1035 sys->mem_offset = IOP13XX_PCIX_MEM_OFFSET;
1036 sys->io_offset = IOP13XX_PCIX_IO_OFFSET;
1037 break;
1038 case IOP13XX_INIT_ATU_ATUE:
1039 /* Note: the function number field in the PCSR is ro */
1040 pcsr = __raw_readl(IOP13XX_ATUE_PCSR);
1041 pcsr &= ~(0xfff8 << 16);
1042 pcsr |= sys->busnr << IOP13XX_ATUE_PCSR_BUS_NUM |
1043 0 << IOP13XX_ATUE_PCSR_DEV_NUM;
1044
1045 __raw_writel(pcsr, IOP13XX_ATUE_PCSR);
1046
1047 res[0].start = IOP13XX_PCIE_LOWER_IO_PA;
1048 res[0].end = IOP13XX_PCIE_UPPER_IO_PA;
1049 res[0].name = "IQ81340 ATUE PCI I/O Space";
1050 res[0].flags = IORESOURCE_IO;
1051
1052 res[1].start = IOP13XX_PCIE_LOWER_MEM_RA;
1053 res[1].end = IOP13XX_PCIE_UPPER_MEM_RA;
1054 res[1].name = "IQ81340 ATUE PCI Memory Space";
1055 res[1].flags = IORESOURCE_MEM;
1056 sys->mem_offset = IOP13XX_PCIE_MEM_OFFSET;
1057 sys->io_offset = IOP13XX_PCIE_IO_OFFSET;
1058 sys->map_irq = iop13xx_pcie_map_irq;
1059 break;
1060 default:
1061 return 0;
1062 }
1063
1064 request_resource(&ioport_resource, &res[0]);
1065 request_resource(&iomem_resource, &res[1]);
1066
1067 sys->resource[0] = &res[0];
1068 sys->resource[1] = &res[1];
1069 sys->resource[2] = NULL;
1070
1071 return 1;
1072}
1073
1074u16 iop13xx_dev_id(void)
1075{
1076 if (__raw_readl(IOP13XX_ESSR0) & IOP13XX_INTERFACE_SEL_PCIX)
1077 return __raw_readw(IOP13XX_ATUE_DID);
1078 else
1079 return __raw_readw(IOP13XX_ATUX_DID);
1080}
1081
1082static int __init iop13xx_init_atu_setup(char *str)
1083{
1084 init_atu = IOP13XX_INIT_ATU_NONE;
1085 if (str) {
1086 while (*str != '\0') {
1087 switch (*str) {
1088 case 'x':
1089 case 'X':
1090 init_atu |= IOP13XX_INIT_ATU_ATUX;
1091 init_atu &= ~IOP13XX_INIT_ATU_NONE;
1092 break;
1093 case 'e':
1094 case 'E':
1095 init_atu |= IOP13XX_INIT_ATU_ATUE;
1096 init_atu &= ~IOP13XX_INIT_ATU_NONE;
1097 break;
1098 case ',':
1099 case '=':
1100 break;
1101 default:
1102 PRINTK("\"iop13xx_init_atu\" malformed at "
1103 "character: \'%c\'", *str);
1104 *(str + 1) = '\0';
1105 init_atu = IOP13XX_INIT_ATU_DEFAULT;
1106 }
1107 str++;
1108 }
1109 }
1110 return 1;
1111}
1112
1113__setup("iop13xx_init_atu", iop13xx_init_atu_setup);
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c
new file mode 100644
index 000000000000..3756d2ccb1a7
--- /dev/null
+++ b/arch/arm/mach-iop13xx/setup.c
@@ -0,0 +1,406 @@
1/*
2 * iop13xx platform Initialization
3 * Copyright (c) 2005-2006, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 *
18 */
19
20#include <linux/serial_8250.h>
21#ifdef CONFIG_MTD_PHYSMAP
22#include <linux/mtd/physmap.h>
23#endif
24#include <asm/mach/map.h>
25#include <asm/hardware.h>
26#include <asm/irq.h>
27
28#define IOP13XX_UART_XTAL 33334000
29#define IOP13XX_SETUP_DEBUG 0
30#define PRINTK(x...) ((void)(IOP13XX_SETUP_DEBUG && printk(x)))
31
32/* Standard IO mapping for all IOP13XX based systems
33 */
34static struct map_desc iop13xx_std_desc[] __initdata = {
35 { /* mem mapped registers */
36 .virtual = IOP13XX_PMMR_VIRT_MEM_BASE,
37 .pfn = __phys_to_pfn(IOP13XX_PMMR_PHYS_MEM_BASE),
38 .length = IOP13XX_PMMR_SIZE,
39 .type = MT_DEVICE,
40 }, { /* PCIE IO space */
41 .virtual = IOP13XX_PCIE_LOWER_IO_VA,
42 .pfn = __phys_to_pfn(IOP13XX_PCIE_LOWER_IO_PA),
43 .length = IOP13XX_PCIX_IO_WINDOW_SIZE,
44 .type = MT_DEVICE,
45 }, { /* PCIX IO space */
46 .virtual = IOP13XX_PCIX_LOWER_IO_VA,
47 .pfn = __phys_to_pfn(IOP13XX_PCIX_LOWER_IO_PA),
48 .length = IOP13XX_PCIX_IO_WINDOW_SIZE,
49 .type = MT_DEVICE,
50 },
51};
52
53static struct resource iop13xx_uart0_resources[] = {
54 [0] = {
55 .start = IOP13XX_UART0_PHYS,
56 .end = IOP13XX_UART0_PHYS + 0x3f,
57 .flags = IORESOURCE_MEM,
58 },
59 [1] = {
60 .start = IRQ_IOP13XX_UART0,
61 .end = IRQ_IOP13XX_UART0,
62 .flags = IORESOURCE_IRQ
63 }
64};
65
66static struct resource iop13xx_uart1_resources[] = {
67 [0] = {
68 .start = IOP13XX_UART1_PHYS,
69 .end = IOP13XX_UART1_PHYS + 0x3f,
70 .flags = IORESOURCE_MEM,
71 },
72 [1] = {
73 .start = IRQ_IOP13XX_UART1,
74 .end = IRQ_IOP13XX_UART1,
75 .flags = IORESOURCE_IRQ
76 }
77};
78
79static struct plat_serial8250_port iop13xx_uart0_data[] = {
80 {
81 .membase = (char*)(IOP13XX_UART0_VIRT),
82 .mapbase = (IOP13XX_UART0_PHYS),
83 .irq = IRQ_IOP13XX_UART0,
84 .uartclk = IOP13XX_UART_XTAL,
85 .regshift = 2,
86 .iotype = UPIO_MEM,
87 .flags = UPF_SKIP_TEST,
88 },
89 { },
90};
91
92static struct plat_serial8250_port iop13xx_uart1_data[] = {
93 {
94 .membase = (char*)(IOP13XX_UART1_VIRT),
95 .mapbase = (IOP13XX_UART1_PHYS),
96 .irq = IRQ_IOP13XX_UART1,
97 .uartclk = IOP13XX_UART_XTAL,
98 .regshift = 2,
99 .iotype = UPIO_MEM,
100 .flags = UPF_SKIP_TEST,
101 },
102 { },
103};
104
105/* The ids are fixed up later in iop13xx_platform_init */
106static struct platform_device iop13xx_uart0 = {
107 .name = "serial8250",
108 .id = 0,
109 .dev.platform_data = iop13xx_uart0_data,
110 .num_resources = 2,
111 .resource = iop13xx_uart0_resources,
112};
113
114static struct platform_device iop13xx_uart1 = {
115 .name = "serial8250",
116 .id = 0,
117 .dev.platform_data = iop13xx_uart1_data,
118 .num_resources = 2,
119 .resource = iop13xx_uart1_resources
120};
121
122static struct resource iop13xx_i2c_0_resources[] = {
123 [0] = {
124 .start = IOP13XX_I2C0_PHYS,
125 .end = IOP13XX_I2C0_PHYS + 0x18,
126 .flags = IORESOURCE_MEM,
127 },
128 [1] = {
129 .start = IRQ_IOP13XX_I2C_0,
130 .end = IRQ_IOP13XX_I2C_0,
131 .flags = IORESOURCE_IRQ
132 }
133};
134
135static struct resource iop13xx_i2c_1_resources[] = {
136 [0] = {
137 .start = IOP13XX_I2C1_PHYS,
138 .end = IOP13XX_I2C1_PHYS + 0x18,
139 .flags = IORESOURCE_MEM,
140 },
141 [1] = {
142 .start = IRQ_IOP13XX_I2C_1,
143 .end = IRQ_IOP13XX_I2C_1,
144 .flags = IORESOURCE_IRQ
145 }
146};
147
148static struct resource iop13xx_i2c_2_resources[] = {
149 [0] = {
150 .start = IOP13XX_I2C2_PHYS,
151 .end = IOP13XX_I2C2_PHYS + 0x18,
152 .flags = IORESOURCE_MEM,
153 },
154 [1] = {
155 .start = IRQ_IOP13XX_I2C_2,
156 .end = IRQ_IOP13XX_I2C_2,
157 .flags = IORESOURCE_IRQ
158 }
159};
160
161/* I2C controllers. The IOP13XX uses the same block as the IOP3xx, so
162 * we just use the same device name.
163 */
164
165/* The ids are fixed up later in iop13xx_platform_init */
166static struct platform_device iop13xx_i2c_0_controller = {
167 .name = "IOP3xx-I2C",
168 .id = 0,
169 .num_resources = 2,
170 .resource = iop13xx_i2c_0_resources
171};
172
173static struct platform_device iop13xx_i2c_1_controller = {
174 .name = "IOP3xx-I2C",
175 .id = 0,
176 .num_resources = 2,
177 .resource = iop13xx_i2c_1_resources
178};
179
180static struct platform_device iop13xx_i2c_2_controller = {
181 .name = "IOP3xx-I2C",
182 .id = 0,
183 .num_resources = 2,
184 .resource = iop13xx_i2c_2_resources
185};
186
187#ifdef CONFIG_MTD_PHYSMAP
188/* PBI Flash Device
189 */
190static struct physmap_flash_data iq8134x_flash_data = {
191 .width = 2,
192};
193
194static struct resource iq8134x_flash_resource = {
195 .start = IQ81340_FLASHBASE,
196 .end = 0,
197 .flags = IORESOURCE_MEM,
198};
199
200static struct platform_device iq8134x_flash = {
201 .name = "physmap-flash",
202 .id = 0,
203 .dev = { .platform_data = &iq8134x_flash_data, },
204 .num_resources = 1,
205 .resource = &iq8134x_flash_resource,
206};
207
208static unsigned long iq8134x_probe_flash_size(void)
209{
210 uint8_t __iomem *flash_addr = ioremap(IQ81340_FLASHBASE, PAGE_SIZE);
211 int i;
212 char query[3];
213 unsigned long size = 0;
214 int width = iq8134x_flash_data.width;
215
216 if (flash_addr) {
217 /* send CFI 'query' command */
218 writew(0x98, flash_addr);
219
220 /* check for CFI compliance */
221 for (i = 0; i < 3 * width; i += width)
222 query[i / width] = readb(flash_addr + (0x10 * width) + i);
223
224 /* read the size */
225 if (memcmp(query, "QRY", 3) == 0)
226 size = 1 << readb(flash_addr + (0x27 * width));
227
228 /* send CFI 'read array' command */
229 writew(0xff, flash_addr);
230
231 iounmap(flash_addr);
232 }
233
234 return size;
235}
236#endif
237
238void __init iop13xx_map_io(void)
239{
240 /* Initialize the Static Page Table maps */
241 iotable_init(iop13xx_std_desc, ARRAY_SIZE(iop13xx_std_desc));
242}
243
244static int init_uart = 0;
245static int init_i2c = 0;
246
247void __init iop13xx_platform_init(void)
248{
249 int i;
250 u32 uart_idx, i2c_idx, plat_idx;
251 struct platform_device *iop13xx_devices[IQ81340_MAX_PLAT_DEVICES];
252
253 /* set the bases so we can read the device id */
254 iop13xx_set_atu_mmr_bases();
255
256 memset(iop13xx_devices, 0, sizeof(iop13xx_devices));
257
258 if (init_uart == IOP13XX_INIT_UART_DEFAULT) {
259 switch (iop13xx_dev_id()) {
260 /* enable both uarts on iop341 and iop342 */
261 case 0x3380:
262 case 0x3384:
263 case 0x3388:
264 case 0x338c:
265 case 0x3382:
266 case 0x3386:
267 case 0x338a:
268 case 0x338e:
269 init_uart |= IOP13XX_INIT_UART_0;
270 init_uart |= IOP13XX_INIT_UART_1;
271 break;
272 /* only enable uart 1 */
273 default:
274 init_uart |= IOP13XX_INIT_UART_1;
275 }
276 }
277
278 if (init_i2c == IOP13XX_INIT_I2C_DEFAULT) {
279 switch (iop13xx_dev_id()) {
280 /* enable all i2c units on iop341 and iop342 */
281 case 0x3380:
282 case 0x3384:
283 case 0x3388:
284 case 0x338c:
285 case 0x3382:
286 case 0x3386:
287 case 0x338a:
288 case 0x338e:
289 init_i2c |= IOP13XX_INIT_I2C_0;
290 init_i2c |= IOP13XX_INIT_I2C_1;
291 init_i2c |= IOP13XX_INIT_I2C_2;
292 break;
293 /* only enable i2c 1 and 2 */
294 default:
295 init_i2c |= IOP13XX_INIT_I2C_1;
296 init_i2c |= IOP13XX_INIT_I2C_2;
297 }
298 }
299
300 plat_idx = 0;
301 uart_idx = 0;
302 i2c_idx = 0;
303
304 /* uart 1 (if enabled) is ttyS0 */
305 if (init_uart & IOP13XX_INIT_UART_1) {
306 PRINTK("Adding uart1 to platform device list\n");
307 iop13xx_uart1.id = uart_idx++;
308 iop13xx_devices[plat_idx++] = &iop13xx_uart1;
309 }
310 if (init_uart & IOP13XX_INIT_UART_0) {
311 PRINTK("Adding uart0 to platform device list\n");
312 iop13xx_uart0.id = uart_idx++;
313 iop13xx_devices[plat_idx++] = &iop13xx_uart0;
314 }
315
316 for(i = 0; i < IQ81340_NUM_I2C; i++) {
317 if ((init_i2c & (1 << i)) && IOP13XX_SETUP_DEBUG)
318 printk("Adding i2c%d to platform device list\n", i);
319 switch(init_i2c & (1 << i)) {
320 case IOP13XX_INIT_I2C_0:
321 iop13xx_i2c_0_controller.id = i2c_idx++;
322 iop13xx_devices[plat_idx++] =
323 &iop13xx_i2c_0_controller;
324 break;
325 case IOP13XX_INIT_I2C_1:
326 iop13xx_i2c_1_controller.id = i2c_idx++;
327 iop13xx_devices[plat_idx++] =
328 &iop13xx_i2c_1_controller;
329 break;
330 case IOP13XX_INIT_I2C_2:
331 iop13xx_i2c_2_controller.id = i2c_idx++;
332 iop13xx_devices[plat_idx++] =
333 &iop13xx_i2c_2_controller;
334 break;
335 }
336 }
337
338#ifdef CONFIG_MTD_PHYSMAP
339 iq8134x_flash_resource.end = iq8134x_flash_resource.start +
340 iq8134x_probe_flash_size();
341 if (iq8134x_flash_resource.end > iq8134x_flash_resource.start)
342 iop13xx_devices[plat_idx++] = &iq8134x_flash;
343 else
344 printk(KERN_ERR "%s: Failed to probe flash size\n", __FUNCTION__);
345#endif
346
347 platform_add_devices(iop13xx_devices, plat_idx);
348}
349
350static int __init iop13xx_init_uart_setup(char *str)
351{
352 if (str) {
353 while (*str != '\0') {
354 switch(*str) {
355 case '0':
356 init_uart |= IOP13XX_INIT_UART_0;
357 break;
358 case '1':
359 init_uart |= IOP13XX_INIT_UART_1;
360 break;
361 case ',':
362 case '=':
363 break;
364 default:
365 PRINTK("\"iop13xx_init_uart\" malformed"
366 " at character: \'%c\'", *str);
367 *(str + 1) = '\0';
368 init_uart = IOP13XX_INIT_UART_DEFAULT;
369 }
370 str++;
371 }
372 }
373 return 1;
374}
375
376static int __init iop13xx_init_i2c_setup(char *str)
377{
378 if (str) {
379 while (*str != '\0') {
380 switch(*str) {
381 case '0':
382 init_i2c |= IOP13XX_INIT_I2C_0;
383 break;
384 case '1':
385 init_i2c |= IOP13XX_INIT_I2C_1;
386 break;
387 case '2':
388 init_i2c |= IOP13XX_INIT_I2C_2;
389 break;
390 case ',':
391 case '=':
392 break;
393 default:
394 PRINTK("\"iop13xx_init_i2c\" malformed"
395 " at character: \'%c\'", *str);
396 *(str + 1) = '\0';
397 init_i2c = IOP13XX_INIT_I2C_DEFAULT;
398 }
399 str++;
400 }
401 }
402 return 1;
403}
404
405__setup("iop13xx_init_uart", iop13xx_init_uart_setup);
406__setup("iop13xx_init_i2c", iop13xx_init_i2c_setup);
diff --git a/arch/arm/mach-iop13xx/time.c b/arch/arm/mach-iop13xx/time.c
new file mode 100644
index 000000000000..8b21365f653f
--- /dev/null
+++ b/arch/arm/mach-iop13xx/time.c
@@ -0,0 +1,102 @@
1/*
2 * arch/arm/mach-iop13xx/time.c
3 *
4 * Timer code for IOP13xx (copied from IOP32x/IOP33x implementation)
5 *
6 * Author: Deepak Saxena <dsaxena@mvista.com>
7 *
8 * Copyright 2002-2003 MontaVista Software Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16#include <linux/kernel.h>
17#include <linux/interrupt.h>
18#include <linux/time.h>
19#include <linux/init.h>
20#include <linux/timex.h>
21#include <asm/io.h>
22#include <asm/irq.h>
23#include <asm/uaccess.h>
24#include <asm/mach/irq.h>
25#include <asm/mach/time.h>
26
27static unsigned long ticks_per_jiffy;
28static unsigned long ticks_per_usec;
29static unsigned long next_jiffy_time;
30
31static inline u32 read_tcr1(void)
32{
33 u32 val;
34 asm volatile("mrc p6, 0, %0, c3, c9, 0" : "=r" (val));
35 return val;
36}
37
38unsigned long iop13xx_gettimeoffset(void)
39{
40 unsigned long offset;
41 u32 cp_flags;
42
43 cp_flags = iop13xx_cp6_save();
44 offset = next_jiffy_time - read_tcr1();
45 iop13xx_cp6_restore(cp_flags);
46
47 return offset / ticks_per_usec;
48}
49
50static irqreturn_t
51iop13xx_timer_interrupt(int irq, void *dev_id)
52{
53 u32 cp_flags = iop13xx_cp6_save();
54
55 write_seqlock(&xtime_lock);
56
57 asm volatile("mcr p6, 0, %0, c6, c9, 0" : : "r" (1));
58
59 while ((signed long)(next_jiffy_time - read_tcr1())
60 >= ticks_per_jiffy) {
61 timer_tick();
62 next_jiffy_time -= ticks_per_jiffy;
63 }
64
65 write_sequnlock(&xtime_lock);
66
67 iop13xx_cp6_restore(cp_flags);
68
69 return IRQ_HANDLED;
70}
71
72static struct irqaction iop13xx_timer_irq = {
73 .name = "IOP13XX Timer Tick",
74 .handler = iop13xx_timer_interrupt,
75 .flags = IRQF_DISABLED | IRQF_TIMER,
76};
77
78void __init iop13xx_init_time(unsigned long tick_rate)
79{
80 u32 timer_ctl;
81 u32 cp_flags;
82
83 ticks_per_jiffy = (tick_rate + HZ/2) / HZ;
84 ticks_per_usec = tick_rate / 1000000;
85 next_jiffy_time = 0xffffffff;
86
87 timer_ctl = IOP13XX_TMR_EN | IOP13XX_TMR_PRIVILEGED |
88 IOP13XX_TMR_RELOAD | IOP13XX_TMR_RATIO_1_1;
89
90 /*
91 * We use timer 0 for our timer interrupt, and timer 1 as
92 * monotonic counter for tracking missed jiffies.
93 */
94 cp_flags = iop13xx_cp6_save();
95 asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (ticks_per_jiffy - 1));
96 asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (timer_ctl));
97 asm volatile("mcr p6, 0, %0, c5, c9, 0" : : "r" (0xffffffff));
98 asm volatile("mcr p6, 0, %0, c1, c9, 0" : : "r" (timer_ctl));
99 iop13xx_cp6_restore(cp_flags);
100
101 setup_irq(IRQ_IOP13XX_TIMER0, &iop13xx_timer_irq);
102}
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 45fb2c3bcf82..6ae605857ca9 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -25,6 +25,10 @@
25#include <linux/pm.h> 25#include <linux/pm.h>
26#include <linux/string.h> 26#include <linux/string.h>
27 27
28#include <linux/sched.h>
29#include <asm/cnt32_to_63.h>
30#include <asm/div64.h>
31
28#include <asm/hardware.h> 32#include <asm/hardware.h>
29#include <asm/irq.h> 33#include <asm/irq.h>
30#include <asm/system.h> 34#include <asm/system.h>
@@ -41,6 +45,62 @@
41#include "generic.h" 45#include "generic.h"
42 46
43/* 47/*
48 * This is the PXA2xx sched_clock implementation. This has a resolution
49 * of at least 308ns and a maximum value that depends on the value of
50 * CLOCK_TICK_RATE.
51 *
52 * The return value is guaranteed to be monotonic in that range as
53 * long as there is always less than 582 seconds between successive
54 * calls to this function.
55 */
56unsigned long long sched_clock(void)
57{
58 unsigned long long v = cnt32_to_63(OSCR);
59 /* Note: top bit ov v needs cleared unless multiplier is even. */
60
61#if CLOCK_TICK_RATE == 3686400
62 /* 1E9 / 3686400 => 78125 / 288, max value = 32025597s (370 days). */
63 /* The <<1 is used to get rid of tick.hi top bit */
64 v *= 78125<<1;
65 do_div(v, 288<<1);
66#elif CLOCK_TICK_RATE == 3250000
67 /* 1E9 / 3250000 => 4000 / 13, max value = 709490156s (8211 days) */
68 v *= 4000;
69 do_div(v, 13);
70#elif CLOCK_TICK_RATE == 3249600
71 /* 1E9 / 3249600 => 625000 / 2031, max value = 4541295s (52 days) */
72 v *= 625000;
73 do_div(v, 2031);
74#else
75#warning "consider fixing sched_clock for your value of CLOCK_TICK_RATE"
76 /*
77 * 96-bit math to perform tick * NSEC_PER_SEC / CLOCK_TICK_RATE for
78 * any value of CLOCK_TICK_RATE. Max value is in the 80 thousand
79 * years range which is nice, but with higher computation cost.
80 */
81 {
82 union {
83 unsigned long long val;
84 struct { unsigned long lo, hi; };
85 } x;
86 unsigned long long y;
87
88 x.val = v;
89 x.hi &= 0x7fffffff;
90 y = (unsigned long long)x.lo * NSEC_PER_SEC;
91 x.lo = y;
92 y = (y >> 32) + (unsigned long long)x.hi * NSEC_PER_SEC;
93 x.hi = do_div(y, CLOCK_TICK_RATE);
94 do_div(x.val, CLOCK_TICK_RATE);
95 x.hi += y;
96 v = x.val;
97 }
98#endif
99
100 return v;
101}
102
103/*
44 * Handy function to set GPIO alternate functions 104 * Handy function to set GPIO alternate functions
45 */ 105 */
46 106
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 4575f316e141..e510295c2580 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -20,6 +20,7 @@
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21 21
22#include <asm/div64.h> 22#include <asm/div64.h>
23#include <asm/cnt32_to_63.h>
23#include <asm/hardware.h> 24#include <asm/hardware.h>
24#include <asm/system.h> 25#include <asm/system.h>
25#include <asm/pgtable.h> 26#include <asm/pgtable.h>
@@ -118,15 +119,21 @@ EXPORT_SYMBOL(cpufreq_get);
118 119
119/* 120/*
120 * This is the SA11x0 sched_clock implementation. This has 121 * This is the SA11x0 sched_clock implementation. This has
121 * a resolution of 271ns, and a maximum value of 1165s. 122 * a resolution of 271ns, and a maximum value of 32025597s (370 days).
123 *
124 * The return value is guaranteed to be monotonic in that range as
125 * long as there is always less than 582 seconds between successive
126 * calls to this function.
127 *
122 * ( * 1E9 / 3686400 => * 78125 / 288) 128 * ( * 1E9 / 3686400 => * 78125 / 288)
123 */ 129 */
124unsigned long long sched_clock(void) 130unsigned long long sched_clock(void)
125{ 131{
126 unsigned long long v; 132 unsigned long long v = cnt32_to_63(OSCR);
127 133
128 v = (unsigned long long)OSCR * 78125; 134 /* the <<1 gets rid of the cnt_32_to_63 top bit saving on a bic insn */
129 do_div(v, 288); 135 v *= 78125<<1;
136 do_div(v, 288<<1);
130 137
131 return v; 138 return v;
132} 139}
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index dcc2ca3dcde9..57196947559f 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -27,6 +27,7 @@
27#include <linux/amba/bus.h> 27#include <linux/amba/bus.h>
28#include <linux/amba/clcd.h> 28#include <linux/amba/clcd.h>
29 29
30#include <asm/cnt32_to_63.h>
30#include <asm/system.h> 31#include <asm/system.h>
31#include <asm/hardware.h> 32#include <asm/hardware.h>
32#include <asm/io.h> 33#include <asm/io.h>
@@ -228,14 +229,19 @@ void __init versatile_map_io(void)
228 229
229/* 230/*
230 * This is the Versatile sched_clock implementation. This has 231 * This is the Versatile sched_clock implementation. This has
231 * a resolution of 41.7ns, and a maximum value of about 179s. 232 * a resolution of 41.7ns, and a maximum value of about 35583 days.
233 *
234 * The return value is guaranteed to be monotonic in that range as
235 * long as there is always less than 89 seconds between successive
236 * calls to this function.
232 */ 237 */
233unsigned long long sched_clock(void) 238unsigned long long sched_clock(void)
234{ 239{
235 unsigned long long v; 240 unsigned long long v = cnt32_to_63(readl(VERSATILE_REFCOUNTER));
236 241
237 v = (unsigned long long)readl(VERSATILE_REFCOUNTER) * 125; 242 /* the <<1 gets rid of the cnt_32_to_63 top bit saving on a bic insn */
238 do_div(v, 3); 243 v *= 125<<1;
244 do_div(v, 3<<1);
239 245
240 return v; 246 return v;
241} 247}
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index efebd6050285..125cb3ff5589 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -333,7 +333,7 @@ config CPU_XSCALE
333# XScale Core Version 3 333# XScale Core Version 3
334config CPU_XSC3 334config CPU_XSC3
335 bool 335 bool
336 depends on ARCH_IXP23XX 336 depends on ARCH_IXP23XX || ARCH_IOP13XX
337 default y 337 default y
338 select CPU_32v5 338 select CPU_32v5
339 select CPU_ABRT_EV5T 339 select CPU_ABRT_EV5T
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 579c69ae9ff7..8bcb838e5444 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
12# 12#
13# http://www.arm.linux.org.uk/developer/machines/?action=new 13# http://www.arm.linux.org.uk/developer/machines/?action=new
14# 14#
15# Last update: Mon Oct 16 21:13:36 2006 15# Last update: Thu Dec 7 17:19:20 2006
16# 16#
17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
18# 18#
@@ -79,7 +79,7 @@ psionw ARCH_PSIONW PSIONW 60
79aln SA1100_ALN ALN 61 79aln SA1100_ALN ALN 61
80epxa ARCH_CAMELOT CAMELOT 62 80epxa ARCH_CAMELOT CAMELOT 62
81gds2200 SA1100_GDS2200 GDS2200 63 81gds2200 SA1100_GDS2200 GDS2200 63
82psion_series7 SA1100_PSION_SERIES7 PSION_SERIES7 64 82netbook SA1100_PSION_SERIES7 PSION_SERIES7 64
83xfile SA1100_XFILE XFILE 65 83xfile SA1100_XFILE XFILE 65
84accelent_ep9312 ARCH_ACCELENT_EP9312 ACCELENT_EP9312 66 84accelent_ep9312 ARCH_ACCELENT_EP9312 ACCELENT_EP9312 66
85ic200 ARCH_IC200 IC200 67 85ic200 ARCH_IC200 IC200 67
@@ -810,9 +810,9 @@ sb3010 MACH_SB3010 SB3010 795
810rm9200 MACH_RM9200 RM9200 796 810rm9200 MACH_RM9200 RM9200 796
811dma03 MACH_DMA03 DMA03 797 811dma03 MACH_DMA03 DMA03 797
812road_s101 MACH_ROAD_S101 ROAD_S101 798 812road_s101 MACH_ROAD_S101 ROAD_S101 798
813iq_nextgen_a MACH_IQ_NEXTGEN_A IQ_NEXTGEN_A 799 813iq81340sc MACH_IQ81340SC IQ81340SC 799
814iq_nextgen_b MACH_IQ_NEXTGEN_B IQ_NEXTGEN_B 800 814iq_nextgen_b MACH_IQ_NEXTGEN_B IQ_NEXTGEN_B 800
815iq_nextgen_c MACH_IQ_NEXTGEN_C IQ_NEXTGEN_C 801 815iq81340mc MACH_IQ81340MC IQ81340MC 801
816iq_nextgen_d MACH_IQ_NEXTGEN_D IQ_NEXTGEN_D 802 816iq_nextgen_d MACH_IQ_NEXTGEN_D IQ_NEXTGEN_D 802
817iq_nextgen_e MACH_IQ_NEXTGEN_E IQ_NEXTGEN_E 803 817iq_nextgen_e MACH_IQ_NEXTGEN_E IQ_NEXTGEN_E 803
818mallow_at91 MACH_MALLOW_AT91 MALLOW_AT91 804 818mallow_at91 MACH_MALLOW_AT91 MALLOW_AT91 804
@@ -1165,9 +1165,57 @@ pnx4010 MACH_PNX4010 PNX4010 1151
1165oxnas MACH_OXNAS OXNAS 1152 1165oxnas MACH_OXNAS OXNAS 1152
1166fiori MACH_FIORI FIORI 1153 1166fiori MACH_FIORI FIORI 1153
1167ml1200 MACH_ML1200 ML1200 1154 1167ml1200 MACH_ML1200 ML1200 1154
1168cactus MACH_CACTUS CACTUS 1155 1168pecos MACH_PECOS PECOS 1155
1169nb2xxx MACH_NB2XXX NB2XXX 1156 1169nb2xxx MACH_NB2XXX NB2XXX 1156
1170hw6900 MACH_HW6900 HW6900 1157 1170hw6900 MACH_HW6900 HW6900 1157
1171cdcs_quoll MACH_CDCS_QUOLL CDCS_QUOLL 1158 1171cdcs_quoll MACH_CDCS_QUOLL CDCS_QUOLL 1158
1172quicksilver MACH_QUICKSILVER QUICKSILVER 1159 1172quicksilver MACH_QUICKSILVER QUICKSILVER 1159
1173uplat926 MACH_UPLAT926 UPLAT926 1160 1173uplat926 MACH_UPLAT926 UPLAT926 1160
1174dep2410_dep2410 MACH_DEP2410_THOMAS DEP2410_THOMAS 1161
1175dtk2410 MACH_DTK2410 DTK2410 1162
1176chili MACH_CHILI CHILI 1163
1177demeter MACH_DEMETER DEMETER 1164
1178dionysus MACH_DIONYSUS DIONYSUS 1165
1179as352x MACH_AS352X AS352X 1166
1180service MACH_SERVICE SERVICE 1167
1181cs_e9301 MACH_CS_E9301 CS_E9301 1168
1182micro9m MACH_MICRO9M MICRO9M 1169
1183ia_mospck MACH_IA_MOSPCK IA_MOSPCK 1170
1184ql201b MACH_QL201B QL201B 1171
1185bbm MACH_BBM BBM 1174
1186exxx MACH_EXXX EXXX 1175
1187wma11b MACH_WMA11B WMA11B 1176
1188pelco_atlas MACH_PELCO_ATLAS PELCO_ATLAS 1177
1189g500 MACH_G500 G500 1178
1190bug MACH_BUG BUG 1179
1191mx33ads MACH_MX33ADS MX33ADS 1180
1192chub MACH_CHUB CHUB 1181
1193gta01 MACH_GTA01 GTA01 1182
1194w90n740 MACH_W90N740 W90N740 1183
1195medallion_sa2410 MACH_MEDALLION_SA2410 MEDALLION_SA2410 1184
1196ia_cpu_9200_2 MACH_IA_CPU_9200_2 IA_CPU_9200_2 1185
1197dimmrm9200 MACH_DIMMRM9200 DIMMRM9200 1186
1198pm9261 MACH_PM9261 PM9261 1187
1199mx21 MACH_MX21 MX21 1188
1200ml7304 MACH_ML7304 ML7304 1189
1201ucp250 MACH_UCP250 UCP250 1190
1202intboard MACH_INTBOARD INTBOARD 1191
1203gulfstream MACH_GULFSTREAM GULFSTREAM 1192
1204labquest MACH_LABQUEST LABQUEST 1193
1205vcmx313 MACH_VCMX313 VCMX313 1194
1206urg200 MACH_URG200 URG200 1195
1207cpux255lcdnet MACH_CPUX255LCDNET CPUX255LCDNET 1196
1208netdcu9 MACH_NETDCU9 NETDCU9 1197
1209netdcu10 MACH_NETDCU10 NETDCU10 1198
1210dspg_dga MACH_DSPG_DGA DSPG_DGA 1199
1211dspg_dvw MACH_DSPG_DVW DSPG_DVW 1200
1212solos MACH_SOLOS SOLOS 1201
1213at91sam9263ek MACH_AT91SAM9263EK AT91SAM9263EK 1202
1214osstbox MACH_OSSTBOX OSSTBOX 1203
1215kbat9261 MACH_KBAT9261 KBAT9261 1204
1216ct1100 MACH_CT1100 CT1100 1205
1217akcppxa MACH_AKCPPXA AKCPPXA 1206
1218zevio_1020 MACH_ZEVIO_1020 ZEVIO_1020 1207
1219hitrack MACH_HITRACK HITRACK 1208
1220syme1 MACH_SYME1 SYME1 1209
1221syhl1 MACH_SYHL1 SYHL1 1210
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-13 03:53:36 -0500