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-rw-r--r--arch/arm/kernel/entry-armv.S1
-rw-r--r--arch/arm/kernel/entry-common.S2
-rw-r--r--arch/arm/kernel/irq.c2
-rw-r--r--arch/arm/kernel/machine_kexec.c4
-rw-r--r--arch/arm/mach-msm/board-halibut.c1
-rw-r--r--arch/arm/mach-omap1/devices.c2
-rw-r--r--arch/arm/mach-omap1/mcbsp.c98
-rw-r--r--arch/arm/mach-omap2/devices.c11
-rw-r--r--arch/arm/mach-omap2/id.c6
-rw-r--r--arch/arm/mach-omap2/irq.c1
-rw-r--r--arch/arm/mach-omap2/mcbsp.c145
-rw-r--r--arch/arm/mach-omap2/sleep24xx.S3
-rw-r--r--arch/arm/mach-omap2/timer-gp.c3
-rw-r--r--arch/arm/mach-pxa/dma.c18
-rw-r--r--arch/arm/mach-pxa/include/mach/regs-ac97.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/regs-ssp.h3
-rw-r--r--arch/arm/mach-pxa/pxa300.c4
-rw-r--r--arch/arm/mach-pxa/pxa320.c2
-rw-r--r--arch/arm/mach-sa1100/generic.c2
-rw-r--r--arch/arm/mm/fault-armv.c5
-rw-r--r--arch/arm/plat-omap/devices.c7
-rw-r--r--arch/arm/plat-omap/dma.c5
-rw-r--r--arch/arm/plat-omap/include/mach/cpu.h1
-rw-r--r--arch/arm/plat-omap/include/mach/mcbsp.h6
-rw-r--r--arch/arm/plat-omap/include/mach/mmc.h10
-rw-r--r--arch/arm/plat-omap/mcbsp.c52
26 files changed, 138 insertions, 258 deletions
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 77b047475539..85040cfeb5e5 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -650,6 +650,7 @@ ENTRY(fp_enter)
650no_fp: mov pc, lr 650no_fp: mov pc, lr
651 651
652__und_usr_unknown: 652__und_usr_unknown:
653 enable_irq
653 mov r0, sp 654 mov r0, sp
654 adr lr, ret_from_exception 655 adr lr, ret_from_exception
655 b do_undefinstr 656 b do_undefinstr
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 06269ea375c5..49a6ba926c2b 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -136,7 +136,7 @@ ENTRY(mcount)
136 ldmia sp!, {r0-r3, pc} 136 ldmia sp!, {r0-r3, pc}
137 137
138trace: 138trace:
139 ldr r1, [fp, #-4] 139 ldr r1, [fp, #-4] @ lr of instrumented routine
140 mov r0, lr 140 mov r0, lr
141 sub r0, r0, #MCOUNT_INSN_SIZE 141 sub r0, r0, #MCOUNT_INSN_SIZE
142 mov lr, pc 142 mov lr, pc
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 4bb723eadad1..45eacb5a2ecd 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -101,7 +101,7 @@ unlock:
101/* Handle bad interrupts */ 101/* Handle bad interrupts */
102static struct irq_desc bad_irq_desc = { 102static struct irq_desc bad_irq_desc = {
103 .handle_irq = handle_bad_irq, 103 .handle_irq = handle_bad_irq,
104 .lock = SPIN_LOCK_UNLOCKED 104 .lock = __SPIN_LOCK_UNLOCKED(bad_irq_desc.lock),
105}; 105};
106 106
107#ifdef CONFIG_CPUMASK_OFFSTACK 107#ifdef CONFIG_CPUMASK_OFFSTACK
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index 440dc62cdc3a..598ca61e7bca 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -13,8 +13,8 @@
13#include <asm/cacheflush.h> 13#include <asm/cacheflush.h>
14#include <asm/mach-types.h> 14#include <asm/mach-types.h>
15 15
16const extern unsigned char relocate_new_kernel[]; 16extern const unsigned char relocate_new_kernel[];
17const extern unsigned int relocate_new_kernel_size; 17extern const unsigned int relocate_new_kernel_size;
18 18
19extern void setup_mm_for_reboot(char mode); 19extern void setup_mm_for_reboot(char mode);
20 20
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index c2a96e3965a6..e61967dde9a1 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -27,6 +27,7 @@
27#include <asm/mach/map.h> 27#include <asm/mach/map.h>
28#include <asm/mach/flash.h> 28#include <asm/mach/flash.h>
29 29
30#include <mach/irqs.h>
30#include <mach/board.h> 31#include <mach/board.h>
31#include <mach/msm_iomap.h> 32#include <mach/msm_iomap.h>
32 33
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 77382d8b6b2f..ba5d7c08dc17 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -181,7 +181,7 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
181 } 181 }
182 size = OMAP1_MMC_SIZE; 182 size = OMAP1_MMC_SIZE;
183 183
184 omap_mmc_add(i, base, size, irq, mmc_data[i]); 184 omap_mmc_add("mmci-omap", i, base, size, irq, mmc_data[i]);
185 }; 185 };
186} 186}
187 187
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index ca7a0cc1707c..575ba31295cf 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -28,81 +28,8 @@
28#define DPS_RSTCT2_PER_EN (1 << 0) 28#define DPS_RSTCT2_PER_EN (1 << 0)
29#define DSP_RSTCT2_WD_PER_EN (1 << 1) 29#define DSP_RSTCT2_WD_PER_EN (1 << 1)
30 30
31struct mcbsp_internal_clk {
32 struct clk clk;
33 struct clk **childs;
34 int n_childs;
35};
36
37#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) 31#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
38static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk) 32const char *clk_names[] = { "dsp_ck", "api_ck", "dspxor_ck" };
39{
40 const char *clk_names[] = { "dsp_ck", "api_ck", "dspxor_ck" };
41 int i;
42
43 mclk->n_childs = ARRAY_SIZE(clk_names);
44 mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *),
45 GFP_KERNEL);
46
47 for (i = 0; i < mclk->n_childs; i++) {
48 /* We fake a platform device to get correct device id */
49 struct platform_device pdev;
50
51 pdev.dev.bus = &platform_bus_type;
52 pdev.id = mclk->clk.id;
53 mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]);
54 if (IS_ERR(mclk->childs[i]))
55 printk(KERN_ERR "Could not get clock %s (%d).\n",
56 clk_names[i], mclk->clk.id);
57 }
58}
59
60static int omap_mcbsp_clk_enable(struct clk *clk)
61{
62 struct mcbsp_internal_clk *mclk = container_of(clk,
63 struct mcbsp_internal_clk, clk);
64 int i;
65
66 for (i = 0; i < mclk->n_childs; i++)
67 clk_enable(mclk->childs[i]);
68 return 0;
69}
70
71static void omap_mcbsp_clk_disable(struct clk *clk)
72{
73 struct mcbsp_internal_clk *mclk = container_of(clk,
74 struct mcbsp_internal_clk, clk);
75 int i;
76
77 for (i = 0; i < mclk->n_childs; i++)
78 clk_disable(mclk->childs[i]);
79}
80
81static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
82 {
83 .clk = {
84 .name = "mcbsp_clk",
85 .id = 1,
86 .enable = omap_mcbsp_clk_enable,
87 .disable = omap_mcbsp_clk_disable,
88 },
89 },
90 {
91 .clk = {
92 .name = "mcbsp_clk",
93 .id = 3,
94 .enable = omap_mcbsp_clk_enable,
95 .disable = omap_mcbsp_clk_disable,
96 },
97 },
98};
99
100#define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks)
101#else
102#define omap_mcbsp_clks_size 0
103static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks;
104static inline void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
105{ }
106#endif 33#endif
107 34
108static void omap1_mcbsp_request(unsigned int id) 35static void omap1_mcbsp_request(unsigned int id)
@@ -167,8 +94,9 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
167 .rx_irq = INT_McBSP1RX, 94 .rx_irq = INT_McBSP1RX,
168 .tx_irq = INT_McBSP1TX, 95 .tx_irq = INT_McBSP1TX,
169 .ops = &omap1_mcbsp_ops, 96 .ops = &omap1_mcbsp_ops,
170 .clk_name = "mcbsp_clk", 97 .clk_names = clk_names,
171 }, 98 .num_clks = 3,
99 },
172 { 100 {
173 .phys_base = OMAP1510_MCBSP2_BASE, 101 .phys_base = OMAP1510_MCBSP2_BASE,
174 .dma_rx_sync = OMAP_DMA_MCBSP2_RX, 102 .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
@@ -184,7 +112,8 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
184 .rx_irq = INT_McBSP3RX, 112 .rx_irq = INT_McBSP3RX,
185 .tx_irq = INT_McBSP3TX, 113 .tx_irq = INT_McBSP3TX,
186 .ops = &omap1_mcbsp_ops, 114 .ops = &omap1_mcbsp_ops,
187 .clk_name = "mcbsp_clk", 115 .clk_names = clk_names,
116 .num_clks = 3,
188 }, 117 },
189}; 118};
190#define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata) 119#define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata)
@@ -202,7 +131,8 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
202 .rx_irq = INT_McBSP1RX, 131 .rx_irq = INT_McBSP1RX,
203 .tx_irq = INT_McBSP1TX, 132 .tx_irq = INT_McBSP1TX,
204 .ops = &omap1_mcbsp_ops, 133 .ops = &omap1_mcbsp_ops,
205 .clk_name = "mcbsp_clk", 134 .clk_names = clk_names,
135 .num_clks = 3,
206 }, 136 },
207 { 137 {
208 .phys_base = OMAP1610_MCBSP2_BASE, 138 .phys_base = OMAP1610_MCBSP2_BASE,
@@ -219,7 +149,8 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
219 .rx_irq = INT_McBSP3RX, 149 .rx_irq = INT_McBSP3RX,
220 .tx_irq = INT_McBSP3TX, 150 .tx_irq = INT_McBSP3TX,
221 .ops = &omap1_mcbsp_ops, 151 .ops = &omap1_mcbsp_ops,
222 .clk_name = "mcbsp_clk", 152 .clk_names = clk_names,
153 .num_clks = 3,
223 }, 154 },
224}; 155};
225#define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata) 156#define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata)
@@ -230,15 +161,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
230 161
231int __init omap1_mcbsp_init(void) 162int __init omap1_mcbsp_init(void)
232{ 163{
233 int i;
234
235 for (i = 0; i < omap_mcbsp_clks_size; i++) {
236 if (cpu_is_omap15xx() || cpu_is_omap16xx()) {
237 omap_mcbsp_clk_init(&omap_mcbsp_clks[i]);
238 clk_register(&omap_mcbsp_clks[i].clk);
239 }
240 }
241
242 if (cpu_is_omap730()) 164 if (cpu_is_omap730())
243 omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ; 165 omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ;
244 if (cpu_is_omap15xx()) 166 if (cpu_is_omap15xx())
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 9d7216ff6c9f..ce03fa750775 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -421,6 +421,7 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
421 int nr_controllers) 421 int nr_controllers)
422{ 422{
423 int i; 423 int i;
424 char *name;
424 425
425 for (i = 0; i < nr_controllers; i++) { 426 for (i = 0; i < nr_controllers; i++) {
426 unsigned long base, size; 427 unsigned long base, size;
@@ -450,12 +451,14 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
450 continue; 451 continue;
451 } 452 }
452 453
453 if (cpu_is_omap2420()) 454 if (cpu_is_omap2420()) {
454 size = OMAP2420_MMC_SIZE; 455 size = OMAP2420_MMC_SIZE;
455 else 456 name = "mmci-omap";
457 } else {
456 size = HSMMC_SIZE; 458 size = HSMMC_SIZE;
457 459 name = "mmci-omap-hs";
458 omap_mmc_add(i, base, size, irq, mmc_data[i]); 460 }
461 omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
459 }; 462 };
460} 463}
461 464
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index b0f8e7d62798..b52a02fc7cd6 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -172,9 +172,13 @@ void __init omap34xx_check_revision(void)
172 omap_revision = OMAP3430_REV_ES3_0; 172 omap_revision = OMAP3430_REV_ES3_0;
173 rev_name = "ES3.0"; 173 rev_name = "ES3.0";
174 break; 174 break;
175 case 4:
176 omap_revision = OMAP3430_REV_ES3_1;
177 rev_name = "ES3.1";
178 break;
175 default: 179 default:
176 /* Use the latest known revision as default */ 180 /* Use the latest known revision as default */
177 omap_revision = OMAP3430_REV_ES3_0; 181 omap_revision = OMAP3430_REV_ES3_1;
178 rev_name = "Unknown revision\n"; 182 rev_name = "Unknown revision\n";
179 } 183 }
180 } 184 }
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 636e2821af7d..9ba20d985dda 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -134,6 +134,7 @@ static struct irq_chip omap_irq_chip = {
134 .ack = omap_mask_ack_irq, 134 .ack = omap_mask_ack_irq,
135 .mask = omap_mask_irq, 135 .mask = omap_mask_irq,
136 .unmask = omap_unmask_irq, 136 .unmask = omap_unmask_irq,
137 .disable = omap_mask_irq,
137}; 138};
138 139
139static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) 140static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index e20023c9d15d..a9e631fc1134 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -24,106 +24,7 @@
24#include <mach/cpu.h> 24#include <mach/cpu.h>
25#include <mach/mcbsp.h> 25#include <mach/mcbsp.h>
26 26
27struct mcbsp_internal_clk { 27const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" };
28 struct clk clk;
29 struct clk **childs;
30 int n_childs;
31};
32
33#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
34static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
35{
36 const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" };
37 int i;
38
39 mclk->n_childs = ARRAY_SIZE(clk_names);
40 mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *),
41 GFP_KERNEL);
42
43 for (i = 0; i < mclk->n_childs; i++) {
44 /* We fake a platform device to get correct device id */
45 struct platform_device pdev;
46
47 pdev.dev.bus = &platform_bus_type;
48 pdev.id = mclk->clk.id;
49 mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]);
50 if (IS_ERR(mclk->childs[i]))
51 printk(KERN_ERR "Could not get clock %s (%d).\n",
52 clk_names[i], mclk->clk.id);
53 }
54}
55
56static int omap_mcbsp_clk_enable(struct clk *clk)
57{
58 struct mcbsp_internal_clk *mclk = container_of(clk,
59 struct mcbsp_internal_clk, clk);
60 int i;
61
62 for (i = 0; i < mclk->n_childs; i++)
63 clk_enable(mclk->childs[i]);
64 return 0;
65}
66
67static void omap_mcbsp_clk_disable(struct clk *clk)
68{
69 struct mcbsp_internal_clk *mclk = container_of(clk,
70 struct mcbsp_internal_clk, clk);
71 int i;
72
73 for (i = 0; i < mclk->n_childs; i++)
74 clk_disable(mclk->childs[i]);
75}
76
77static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
78 {
79 .clk = {
80 .name = "mcbsp_clk",
81 .id = 1,
82 .enable = omap_mcbsp_clk_enable,
83 .disable = omap_mcbsp_clk_disable,
84 },
85 },
86 {
87 .clk = {
88 .name = "mcbsp_clk",
89 .id = 2,
90 .enable = omap_mcbsp_clk_enable,
91 .disable = omap_mcbsp_clk_disable,
92 },
93 },
94 {
95 .clk = {
96 .name = "mcbsp_clk",
97 .id = 3,
98 .enable = omap_mcbsp_clk_enable,
99 .disable = omap_mcbsp_clk_disable,
100 },
101 },
102 {
103 .clk = {
104 .name = "mcbsp_clk",
105 .id = 4,
106 .enable = omap_mcbsp_clk_enable,
107 .disable = omap_mcbsp_clk_disable,
108 },
109 },
110 {
111 .clk = {
112 .name = "mcbsp_clk",
113 .id = 5,
114 .enable = omap_mcbsp_clk_enable,
115 .disable = omap_mcbsp_clk_disable,
116 },
117 },
118};
119
120#define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks)
121#else
122#define omap_mcbsp_clks_size 0
123static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks;
124static inline void omap_mcbsp_clk_init(struct clk *clk)
125{ }
126#endif
127 28
128static void omap2_mcbsp2_mux_setup(void) 29static void omap2_mcbsp2_mux_setup(void)
129{ 30{
@@ -156,7 +57,8 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
156 .rx_irq = INT_24XX_MCBSP1_IRQ_RX, 57 .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
157 .tx_irq = INT_24XX_MCBSP1_IRQ_TX, 58 .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
158 .ops = &omap2_mcbsp_ops, 59 .ops = &omap2_mcbsp_ops,
159 .clk_name = "mcbsp_clk", 60 .clk_names = clk_names,
61 .num_clks = 2,
160 }, 62 },
161 { 63 {
162 .phys_base = OMAP24XX_MCBSP2_BASE, 64 .phys_base = OMAP24XX_MCBSP2_BASE,
@@ -165,7 +67,8 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
165 .rx_irq = INT_24XX_MCBSP2_IRQ_RX, 67 .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
166 .tx_irq = INT_24XX_MCBSP2_IRQ_TX, 68 .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
167 .ops = &omap2_mcbsp_ops, 69 .ops = &omap2_mcbsp_ops,
168 .clk_name = "mcbsp_clk", 70 .clk_names = clk_names,
71 .num_clks = 2,
169 }, 72 },
170}; 73};
171#define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata) 74#define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata)
@@ -183,7 +86,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
183 .rx_irq = INT_24XX_MCBSP1_IRQ_RX, 86 .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
184 .tx_irq = INT_24XX_MCBSP1_IRQ_TX, 87 .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
185 .ops = &omap2_mcbsp_ops, 88 .ops = &omap2_mcbsp_ops,
186 .clk_name = "mcbsp_clk", 89 .clk_names = clk_names,
90 .num_clks = 2,
187 }, 91 },
188 { 92 {
189 .phys_base = OMAP24XX_MCBSP2_BASE, 93 .phys_base = OMAP24XX_MCBSP2_BASE,
@@ -192,7 +96,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
192 .rx_irq = INT_24XX_MCBSP2_IRQ_RX, 96 .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
193 .tx_irq = INT_24XX_MCBSP2_IRQ_TX, 97 .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
194 .ops = &omap2_mcbsp_ops, 98 .ops = &omap2_mcbsp_ops,
195 .clk_name = "mcbsp_clk", 99 .clk_names = clk_names,
100 .num_clks = 2,
196 }, 101 },
197 { 102 {
198 .phys_base = OMAP2430_MCBSP3_BASE, 103 .phys_base = OMAP2430_MCBSP3_BASE,
@@ -201,7 +106,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
201 .rx_irq = INT_24XX_MCBSP3_IRQ_RX, 106 .rx_irq = INT_24XX_MCBSP3_IRQ_RX,
202 .tx_irq = INT_24XX_MCBSP3_IRQ_TX, 107 .tx_irq = INT_24XX_MCBSP3_IRQ_TX,
203 .ops = &omap2_mcbsp_ops, 108 .ops = &omap2_mcbsp_ops,
204 .clk_name = "mcbsp_clk", 109 .clk_names = clk_names,
110 .num_clks = 2,
205 }, 111 },
206 { 112 {
207 .phys_base = OMAP2430_MCBSP4_BASE, 113 .phys_base = OMAP2430_MCBSP4_BASE,
@@ -210,7 +116,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
210 .rx_irq = INT_24XX_MCBSP4_IRQ_RX, 116 .rx_irq = INT_24XX_MCBSP4_IRQ_RX,
211 .tx_irq = INT_24XX_MCBSP4_IRQ_TX, 117 .tx_irq = INT_24XX_MCBSP4_IRQ_TX,
212 .ops = &omap2_mcbsp_ops, 118 .ops = &omap2_mcbsp_ops,
213 .clk_name = "mcbsp_clk", 119 .clk_names = clk_names,
120 .num_clks = 2,
214 }, 121 },
215 { 122 {
216 .phys_base = OMAP2430_MCBSP5_BASE, 123 .phys_base = OMAP2430_MCBSP5_BASE,
@@ -219,7 +126,8 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
219 .rx_irq = INT_24XX_MCBSP5_IRQ_RX, 126 .rx_irq = INT_24XX_MCBSP5_IRQ_RX,
220 .tx_irq = INT_24XX_MCBSP5_IRQ_TX, 127 .tx_irq = INT_24XX_MCBSP5_IRQ_TX,
221 .ops = &omap2_mcbsp_ops, 128 .ops = &omap2_mcbsp_ops,
222 .clk_name = "mcbsp_clk", 129 .clk_names = clk_names,
130 .num_clks = 2,
223 }, 131 },
224}; 132};
225#define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata) 133#define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata)
@@ -237,7 +145,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
237 .rx_irq = INT_24XX_MCBSP1_IRQ_RX, 145 .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
238 .tx_irq = INT_24XX_MCBSP1_IRQ_TX, 146 .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
239 .ops = &omap2_mcbsp_ops, 147 .ops = &omap2_mcbsp_ops,
240 .clk_name = "mcbsp_clk", 148 .clk_names = clk_names,
149 .num_clks = 2,
241 }, 150 },
242 { 151 {
243 .phys_base = OMAP34XX_MCBSP2_BASE, 152 .phys_base = OMAP34XX_MCBSP2_BASE,
@@ -246,7 +155,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
246 .rx_irq = INT_24XX_MCBSP2_IRQ_RX, 155 .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
247 .tx_irq = INT_24XX_MCBSP2_IRQ_TX, 156 .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
248 .ops = &omap2_mcbsp_ops, 157 .ops = &omap2_mcbsp_ops,
249 .clk_name = "mcbsp_clk", 158 .clk_names = clk_names,
159 .num_clks = 2,
250 }, 160 },
251 { 161 {
252 .phys_base = OMAP34XX_MCBSP3_BASE, 162 .phys_base = OMAP34XX_MCBSP3_BASE,
@@ -255,7 +165,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
255 .rx_irq = INT_24XX_MCBSP3_IRQ_RX, 165 .rx_irq = INT_24XX_MCBSP3_IRQ_RX,
256 .tx_irq = INT_24XX_MCBSP3_IRQ_TX, 166 .tx_irq = INT_24XX_MCBSP3_IRQ_TX,
257 .ops = &omap2_mcbsp_ops, 167 .ops = &omap2_mcbsp_ops,
258 .clk_name = "mcbsp_clk", 168 .clk_names = clk_names,
169 .num_clks = 2,
259 }, 170 },
260 { 171 {
261 .phys_base = OMAP34XX_MCBSP4_BASE, 172 .phys_base = OMAP34XX_MCBSP4_BASE,
@@ -264,7 +175,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
264 .rx_irq = INT_24XX_MCBSP4_IRQ_RX, 175 .rx_irq = INT_24XX_MCBSP4_IRQ_RX,
265 .tx_irq = INT_24XX_MCBSP4_IRQ_TX, 176 .tx_irq = INT_24XX_MCBSP4_IRQ_TX,
266 .ops = &omap2_mcbsp_ops, 177 .ops = &omap2_mcbsp_ops,
267 .clk_name = "mcbsp_clk", 178 .clk_names = clk_names,
179 .num_clks = 2,
268 }, 180 },
269 { 181 {
270 .phys_base = OMAP34XX_MCBSP5_BASE, 182 .phys_base = OMAP34XX_MCBSP5_BASE,
@@ -273,7 +185,8 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
273 .rx_irq = INT_24XX_MCBSP5_IRQ_RX, 185 .rx_irq = INT_24XX_MCBSP5_IRQ_RX,
274 .tx_irq = INT_24XX_MCBSP5_IRQ_TX, 186 .tx_irq = INT_24XX_MCBSP5_IRQ_TX,
275 .ops = &omap2_mcbsp_ops, 187 .ops = &omap2_mcbsp_ops,
276 .clk_name = "mcbsp_clk", 188 .clk_names = clk_names,
189 .num_clks = 2,
277 }, 190 },
278}; 191};
279#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) 192#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata)
@@ -284,14 +197,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
284 197
285static int __init omap2_mcbsp_init(void) 198static int __init omap2_mcbsp_init(void)
286{ 199{
287 int i;
288
289 for (i = 0; i < omap_mcbsp_clks_size; i++) {
290 /* Once we call clk_get inside init, we do not register it */
291 omap_mcbsp_clk_init(&omap_mcbsp_clks[i]);
292 clk_register(&omap_mcbsp_clks[i].clk);
293 }
294
295 if (cpu_is_omap2420()) 200 if (cpu_is_omap2420())
296 omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ; 201 omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ;
297 if (cpu_is_omap2430()) 202 if (cpu_is_omap2430())
diff --git a/arch/arm/mach-omap2/sleep24xx.S b/arch/arm/mach-omap2/sleep24xx.S
index 43336b93b21c..bf9e96105e11 100644
--- a/arch/arm/mach-omap2/sleep24xx.S
+++ b/arch/arm/mach-omap2/sleep24xx.S
@@ -93,9 +93,8 @@ ENTRY(omap24xx_cpu_suspend)
93 orr r4, r4, #0x40 @ enable self refresh on idle req 93 orr r4, r4, #0x40 @ enable self refresh on idle req
94 mov r5, #0x2000 @ set delay (DPLL relock + DLL relock) 94 mov r5, #0x2000 @ set delay (DPLL relock + DLL relock)
95 str r4, [r2] @ make it so 95 str r4, [r2] @ make it so
96 mov r2, #0
97 nop 96 nop
98 mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt 97 mcr p15, 0, r3, c7, c0, 4 @ wait for interrupt
99 nop 98 nop
100loop: 99loop:
101 subs r5, r5, #0x1 @ awake, wait just a bit 100 subs r5, r5, #0x1 @ awake, wait just a bit
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index ae6036300f60..9fc13a2cc3f4 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -118,7 +118,8 @@ static void __init omap2_gp_clockevent_init(void)
118 clockevent_gpt.max_delta_ns = 118 clockevent_gpt.max_delta_ns =
119 clockevent_delta2ns(0xffffffff, &clockevent_gpt); 119 clockevent_delta2ns(0xffffffff, &clockevent_gpt);
120 clockevent_gpt.min_delta_ns = 120 clockevent_gpt.min_delta_ns =
121 clockevent_delta2ns(1, &clockevent_gpt); 121 clockevent_delta2ns(3, &clockevent_gpt);
122 /* Timer internal resynch latency. */
122 123
123 clockevent_gpt.cpumask = cpumask_of(0); 124 clockevent_gpt.cpumask = cpumask_of(0);
124 clockevents_register_device(&clockevent_gpt); 125 clockevents_register_device(&clockevent_gpt);
diff --git a/arch/arm/mach-pxa/dma.c b/arch/arm/mach-pxa/dma.c
index b1514fb20d3a..7de17fc5d54b 100644
--- a/arch/arm/mach-pxa/dma.c
+++ b/arch/arm/mach-pxa/dma.c
@@ -121,20 +121,22 @@ int __init pxa_init_dma(int num_ch)
121 if (dma_channels == NULL) 121 if (dma_channels == NULL)
122 return -ENOMEM; 122 return -ENOMEM;
123 123
124 ret = request_irq(IRQ_DMA, dma_irq_handler, IRQF_DISABLED, "DMA", NULL);
125 if (ret) {
126 printk (KERN_CRIT "Wow! Can't register IRQ for DMA\n");
127 kfree(dma_channels);
128 return ret;
129 }
130
131 /* dma channel priorities on pxa2xx processors: 124 /* dma channel priorities on pxa2xx processors:
132 * ch 0 - 3, 16 - 19 <--> (0) DMA_PRIO_HIGH 125 * ch 0 - 3, 16 - 19 <--> (0) DMA_PRIO_HIGH
133 * ch 4 - 7, 20 - 23 <--> (1) DMA_PRIO_MEDIUM 126 * ch 4 - 7, 20 - 23 <--> (1) DMA_PRIO_MEDIUM
134 * ch 8 - 15, 24 - 31 <--> (2) DMA_PRIO_LOW 127 * ch 8 - 15, 24 - 31 <--> (2) DMA_PRIO_LOW
135 */ 128 */
136 for (i = 0; i < num_ch; i++) 129 for (i = 0; i < num_ch; i++) {
130 DCSR(i) = 0;
137 dma_channels[i].prio = min((i & 0xf) >> 2, DMA_PRIO_LOW); 131 dma_channels[i].prio = min((i & 0xf) >> 2, DMA_PRIO_LOW);
132 }
133
134 ret = request_irq(IRQ_DMA, dma_irq_handler, IRQF_DISABLED, "DMA", NULL);
135 if (ret) {
136 printk (KERN_CRIT "Wow! Can't register IRQ for DMA\n");
137 kfree(dma_channels);
138 return ret;
139 }
138 140
139 num_dma_channels = num_ch; 141 num_dma_channels = num_ch;
140 return 0; 142 return 0;
diff --git a/arch/arm/mach-pxa/include/mach/regs-ac97.h b/arch/arm/mach-pxa/include/mach/regs-ac97.h
index e41b9d202b8c..b8d14bd9ae59 100644
--- a/arch/arm/mach-pxa/include/mach/regs-ac97.h
+++ b/arch/arm/mach-pxa/include/mach/regs-ac97.h
@@ -1,6 +1,8 @@
1#ifndef __ASM_ARCH_REGS_AC97_H 1#ifndef __ASM_ARCH_REGS_AC97_H
2#define __ASM_ARCH_REGS_AC97_H 2#define __ASM_ARCH_REGS_AC97_H
3 3
4#include <mach/hardware.h>
5
4/* 6/*
5 * AC97 Controller registers 7 * AC97 Controller registers
6 */ 8 */
diff --git a/arch/arm/mach-pxa/include/mach/regs-ssp.h b/arch/arm/mach-pxa/include/mach/regs-ssp.h
index 3c04cde2cf1f..cf31986f6f05 100644
--- a/arch/arm/mach-pxa/include/mach/regs-ssp.h
+++ b/arch/arm/mach-pxa/include/mach/regs-ssp.h
@@ -41,6 +41,9 @@
41#elif defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) 41#elif defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
42#define SSCR0_SCR (0x000fff00) /* Serial Clock Rate (mask) */ 42#define SSCR0_SCR (0x000fff00) /* Serial Clock Rate (mask) */
43#define SSCR0_SerClkDiv(x) (((x) - 1) << 8) /* Divisor [1..4096] */ 43#define SSCR0_SerClkDiv(x) (((x) - 1) << 8) /* Divisor [1..4096] */
44#endif
45
46#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
44#define SSCR0_EDSS (1 << 20) /* Extended data size select */ 47#define SSCR0_EDSS (1 << 20) /* Extended data size select */
45#define SSCR0_NCS (1 << 21) /* Network clock select */ 48#define SSCR0_NCS (1 << 21) /* Network clock select */
46#define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */ 49#define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c
index f735e58e6669..83fb609b6eb7 100644
--- a/arch/arm/mach-pxa/pxa300.c
+++ b/arch/arm/mach-pxa/pxa300.c
@@ -88,13 +88,13 @@ static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = {
88static DEFINE_PXA3_CKEN(common_nand, NAND, 156000000, 0); 88static DEFINE_PXA3_CKEN(common_nand, NAND, 156000000, 0);
89 89
90static struct clk_lookup common_clkregs[] = { 90static struct clk_lookup common_clkregs[] = {
91 INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", "NANDCLK"), 91 INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL),
92}; 92};
93 93
94static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0); 94static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0);
95 95
96static struct clk_lookup pxa310_clkregs[] = { 96static struct clk_lookup pxa310_clkregs[] = {
97 INIT_CLKREG(&clk_pxa310_mmc3, "pxa2xx-mci.2", "MMCCLK"), 97 INIT_CLKREG(&clk_pxa310_mmc3, "pxa2xx-mci.2", NULL),
98}; 98};
99 99
100static int __init pxa300_init(void) 100static int __init pxa300_init(void)
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c
index effe408c186f..36f066196fa2 100644
--- a/arch/arm/mach-pxa/pxa320.c
+++ b/arch/arm/mach-pxa/pxa320.c
@@ -83,7 +83,7 @@ static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
83static DEFINE_PXA3_CKEN(pxa320_nand, NAND, 104000000, 0); 83static DEFINE_PXA3_CKEN(pxa320_nand, NAND, 104000000, 0);
84 84
85static struct clk_lookup pxa320_clkregs[] = { 85static struct clk_lookup pxa320_clkregs[] = {
86 INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", "NANDCLK"), 86 INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL),
87}; 87};
88 88
89static int __init pxa320_init(void) 89static int __init pxa320_init(void)
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index c1fbd5b5f9c4..23cfdd593954 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -289,7 +289,7 @@ static struct platform_device sa11x0pcmcia_device = {
289}; 289};
290 290
291static struct platform_device sa11x0mtd_device = { 291static struct platform_device sa11x0mtd_device = {
292 .name = "flash", 292 .name = "sa1100-mtd",
293 .id = -1, 293 .id = -1,
294}; 294};
295 295
diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c
index 81d0b8772de3..bc0099d5ae85 100644
--- a/arch/arm/mm/fault-armv.c
+++ b/arch/arm/mm/fault-armv.c
@@ -66,7 +66,10 @@ static int adjust_pte(struct vm_area_struct *vma, unsigned long address)
66 * fault (ie, is old), we can safely ignore any issues. 66 * fault (ie, is old), we can safely ignore any issues.
67 */ 67 */
68 if (ret && (pte_val(entry) & L_PTE_MT_MASK) != shared_pte_mask) { 68 if (ret && (pte_val(entry) & L_PTE_MT_MASK) != shared_pte_mask) {
69 flush_cache_page(vma, address, pte_pfn(entry)); 69 unsigned long pfn = pte_pfn(entry);
70 flush_cache_page(vma, address, pfn);
71 outer_flush_range((pfn << PAGE_SHIFT),
72 (pfn << PAGE_SHIFT) + PAGE_SIZE);
70 pte_val(entry) &= ~L_PTE_MT_MASK; 73 pte_val(entry) &= ~L_PTE_MT_MASK;
71 pte_val(entry) |= shared_pte_mask; 74 pte_val(entry) |= shared_pte_mask;
72 set_pte_at(vma->vm_mm, address, pte, entry); 75 set_pte_at(vma->vm_mm, address, pte, entry);
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index ac15c23fd5da..208dbb121f47 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -200,14 +200,15 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
200/* 200/*
201 * Register MMC devices. Called from mach-omap1 and mach-omap2 device init. 201 * Register MMC devices. Called from mach-omap1 and mach-omap2 device init.
202 */ 202 */
203int __init omap_mmc_add(int id, unsigned long base, unsigned long size, 203int __init omap_mmc_add(const char *name, int id, unsigned long base,
204 unsigned int irq, struct omap_mmc_platform_data *data) 204 unsigned long size, unsigned int irq,
205 struct omap_mmc_platform_data *data)
205{ 206{
206 struct platform_device *pdev; 207 struct platform_device *pdev;
207 struct resource res[OMAP_MMC_NR_RES]; 208 struct resource res[OMAP_MMC_NR_RES];
208 int ret; 209 int ret;
209 210
210 pdev = platform_device_alloc("mmci-omap", id); 211 pdev = platform_device_alloc(name, id);
211 if (!pdev) 212 if (!pdev)
212 return -ENOMEM; 213 return -ENOMEM;
213 214
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index e77373c39f8c..47ec77af4ccb 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -709,6 +709,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
709 chan->dev_name = dev_name; 709 chan->dev_name = dev_name;
710 chan->callback = callback; 710 chan->callback = callback;
711 chan->data = data; 711 chan->data = data;
712 chan->flags = 0;
712 713
713#ifndef CONFIG_ARCH_OMAP1 714#ifndef CONFIG_ARCH_OMAP1
714 if (cpu_class_is_omap2()) { 715 if (cpu_class_is_omap2()) {
@@ -1888,11 +1889,11 @@ static int omap2_dma_handle_ch(int ch)
1888 status = dma_read(CSR(ch)); 1889 status = dma_read(CSR(ch));
1889 } 1890 }
1890 1891
1892 dma_write(status, CSR(ch));
1893
1891 if (likely(dma_chan[ch].callback != NULL)) 1894 if (likely(dma_chan[ch].callback != NULL))
1892 dma_chan[ch].callback(ch, status, dma_chan[ch].data); 1895 dma_chan[ch].callback(ch, status, dma_chan[ch].data);
1893 1896
1894 dma_write(status, CSR(ch));
1895
1896 return 0; 1897 return 0;
1897} 1898}
1898 1899
diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h
index b2062f1175de..a8e1178a9468 100644
--- a/arch/arm/plat-omap/include/mach/cpu.h
+++ b/arch/arm/plat-omap/include/mach/cpu.h
@@ -339,6 +339,7 @@ IS_OMAP_TYPE(3430, 0x3430)
339#define OMAP3430_REV_ES2_0 0x34301034 339#define OMAP3430_REV_ES2_0 0x34301034
340#define OMAP3430_REV_ES2_1 0x34302034 340#define OMAP3430_REV_ES2_1 0x34302034
341#define OMAP3430_REV_ES3_0 0x34303034 341#define OMAP3430_REV_ES3_0 0x34303034
342#define OMAP3430_REV_ES3_1 0x34304034
342 343
343/* 344/*
344 * omap_chip bits 345 * omap_chip bits
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h
index eef873db3d48..113c2466c86a 100644
--- a/arch/arm/plat-omap/include/mach/mcbsp.h
+++ b/arch/arm/plat-omap/include/mach/mcbsp.h
@@ -344,7 +344,8 @@ struct omap_mcbsp_platform_data {
344 u8 dma_rx_sync, dma_tx_sync; 344 u8 dma_rx_sync, dma_tx_sync;
345 u16 rx_irq, tx_irq; 345 u16 rx_irq, tx_irq;
346 struct omap_mcbsp_ops *ops; 346 struct omap_mcbsp_ops *ops;
347 char const *clk_name; 347 char const **clk_names;
348 int num_clks;
348}; 349};
349 350
350struct omap_mcbsp { 351struct omap_mcbsp {
@@ -376,7 +377,8 @@ struct omap_mcbsp {
376 /* Protect the field .free, while checking if the mcbsp is in use */ 377 /* Protect the field .free, while checking if the mcbsp is in use */
377 spinlock_t lock; 378 spinlock_t lock;
378 struct omap_mcbsp_platform_data *pdata; 379 struct omap_mcbsp_platform_data *pdata;
379 struct clk *clk; 380 struct clk **clks;
381 int num_clks;
380}; 382};
381extern struct omap_mcbsp **mcbsp_ptr; 383extern struct omap_mcbsp **mcbsp_ptr;
382extern int omap_mcbsp_count; 384extern int omap_mcbsp_count;
diff --git a/arch/arm/plat-omap/include/mach/mmc.h b/arch/arm/plat-omap/include/mach/mmc.h
index 031250f02805..73a9e15031b1 100644
--- a/arch/arm/plat-omap/include/mach/mmc.h
+++ b/arch/arm/plat-omap/include/mach/mmc.h
@@ -115,8 +115,9 @@ void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
115 int nr_controllers); 115 int nr_controllers);
116void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, 116void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
117 int nr_controllers); 117 int nr_controllers);
118int omap_mmc_add(int id, unsigned long base, unsigned long size, 118int omap_mmc_add(const char *name, int id, unsigned long base,
119 unsigned int irq, struct omap_mmc_platform_data *data); 119 unsigned long size, unsigned int irq,
120 struct omap_mmc_platform_data *data);
120#else 121#else
121static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, 122static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
122 int nr_controllers) 123 int nr_controllers)
@@ -126,8 +127,9 @@ static inline void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
126 int nr_controllers) 127 int nr_controllers)
127{ 128{
128} 129}
129static inline int omap_mmc_add(int id, unsigned long base, unsigned long size, 130static inline int omap_mmc_add(const char *name, int id, unsigned long base,
130 unsigned int irq, struct omap_mmc_platform_data *data) 131 unsigned long size, unsigned int irq,
132 struct omap_mmc_platform_data *data)
131{ 133{
132 return 0; 134 return 0;
133} 135}
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index f2401a831f99..e5842e30e534 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -214,6 +214,7 @@ EXPORT_SYMBOL(omap_mcbsp_set_io_type);
214int omap_mcbsp_request(unsigned int id) 214int omap_mcbsp_request(unsigned int id)
215{ 215{
216 struct omap_mcbsp *mcbsp; 216 struct omap_mcbsp *mcbsp;
217 int i;
217 int err; 218 int err;
218 219
219 if (!omap_mcbsp_check_valid_id(id)) { 220 if (!omap_mcbsp_check_valid_id(id)) {
@@ -225,7 +226,8 @@ int omap_mcbsp_request(unsigned int id)
225 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request) 226 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
226 mcbsp->pdata->ops->request(id); 227 mcbsp->pdata->ops->request(id);
227 228
228 clk_enable(mcbsp->clk); 229 for (i = 0; i < mcbsp->num_clks; i++)
230 clk_enable(mcbsp->clks[i]);
229 231
230 spin_lock(&mcbsp->lock); 232 spin_lock(&mcbsp->lock);
231 if (!mcbsp->free) { 233 if (!mcbsp->free) {
@@ -276,6 +278,7 @@ EXPORT_SYMBOL(omap_mcbsp_request);
276void omap_mcbsp_free(unsigned int id) 278void omap_mcbsp_free(unsigned int id)
277{ 279{
278 struct omap_mcbsp *mcbsp; 280 struct omap_mcbsp *mcbsp;
281 int i;
279 282
280 if (!omap_mcbsp_check_valid_id(id)) { 283 if (!omap_mcbsp_check_valid_id(id)) {
281 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); 284 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
@@ -286,7 +289,8 @@ void omap_mcbsp_free(unsigned int id)
286 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) 289 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
287 mcbsp->pdata->ops->free(id); 290 mcbsp->pdata->ops->free(id);
288 291
289 clk_disable(mcbsp->clk); 292 for (i = mcbsp->num_clks - 1; i >= 0; i--)
293 clk_disable(mcbsp->clks[i]);
290 294
291 spin_lock(&mcbsp->lock); 295 spin_lock(&mcbsp->lock);
292 if (mcbsp->free) { 296 if (mcbsp->free) {
@@ -872,6 +876,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
872 struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data; 876 struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
873 struct omap_mcbsp *mcbsp; 877 struct omap_mcbsp *mcbsp;
874 int id = pdev->id - 1; 878 int id = pdev->id - 1;
879 int i;
875 int ret = 0; 880 int ret = 0;
876 881
877 if (!pdata) { 882 if (!pdata) {
@@ -916,14 +921,25 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
916 mcbsp->dma_rx_sync = pdata->dma_rx_sync; 921 mcbsp->dma_rx_sync = pdata->dma_rx_sync;
917 mcbsp->dma_tx_sync = pdata->dma_tx_sync; 922 mcbsp->dma_tx_sync = pdata->dma_tx_sync;
918 923
919 if (pdata->clk_name) 924 if (pdata->num_clks) {
920 mcbsp->clk = clk_get(&pdev->dev, pdata->clk_name); 925 mcbsp->num_clks = pdata->num_clks;
921 if (IS_ERR(mcbsp->clk)) { 926 mcbsp->clks = kzalloc(mcbsp->num_clks * sizeof(struct clk *),
922 dev_err(&pdev->dev, 927 GFP_KERNEL);
923 "Invalid clock configuration for McBSP%d.\n", 928 if (!mcbsp->clks) {
924 mcbsp->id); 929 ret = -ENOMEM;
925 ret = PTR_ERR(mcbsp->clk); 930 goto exit;
926 goto err_clk; 931 }
932 for (i = 0; i < mcbsp->num_clks; i++) {
933 mcbsp->clks[i] = clk_get(&pdev->dev, pdata->clk_names[i]);
934 if (IS_ERR(mcbsp->clks[i])) {
935 dev_err(&pdev->dev,
936 "Invalid %s configuration for McBSP%d.\n",
937 pdata->clk_names[i], mcbsp->id);
938 ret = PTR_ERR(mcbsp->clks[i]);
939 goto err_clk;
940 }
941 }
942
927 } 943 }
928 944
929 mcbsp->pdata = pdata; 945 mcbsp->pdata = pdata;
@@ -932,6 +948,9 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
932 return 0; 948 return 0;
933 949
934err_clk: 950err_clk:
951 while (i--)
952 clk_put(mcbsp->clks[i]);
953 kfree(mcbsp->clks);
935 iounmap(mcbsp->io_base); 954 iounmap(mcbsp->io_base);
936err_ioremap: 955err_ioremap:
937 mcbsp->free = 0; 956 mcbsp->free = 0;
@@ -942,6 +961,7 @@ exit:
942static int __devexit omap_mcbsp_remove(struct platform_device *pdev) 961static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
943{ 962{
944 struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev); 963 struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
964 int i;
945 965
946 platform_set_drvdata(pdev, NULL); 966 platform_set_drvdata(pdev, NULL);
947 if (mcbsp) { 967 if (mcbsp) {
@@ -950,12 +970,18 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
950 mcbsp->pdata->ops->free) 970 mcbsp->pdata->ops->free)
951 mcbsp->pdata->ops->free(mcbsp->id); 971 mcbsp->pdata->ops->free(mcbsp->id);
952 972
953 clk_disable(mcbsp->clk); 973 for (i = mcbsp->num_clks - 1; i >= 0; i--) {
954 clk_put(mcbsp->clk); 974 clk_disable(mcbsp->clks[i]);
975 clk_put(mcbsp->clks[i]);
976 }
955 977
956 iounmap(mcbsp->io_base); 978 iounmap(mcbsp->io_base);
957 979
958 mcbsp->clk = NULL; 980 if (mcbsp->num_clks) {
981 kfree(mcbsp->clks);
982 mcbsp->clks = NULL;
983 mcbsp->num_clks = 0;
984 }
959 mcbsp->free = 0; 985 mcbsp->free = 0;
960 mcbsp->dev = NULL; 986 mcbsp->dev = NULL;
961 } 987 }
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-25 14:23:13 -0500