5 files changed, 45 insertions, 23 deletions

diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 39a6c1b0b9a3..7152bfbee581 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -533,6 +533,13 @@ ENTRY(__switch_to)
         ldr     r3, [r2, #TI_TP_VALUE]
         stmia   ip!, {r4 - sl, fp, sp, lr}      @ Store most regs on stack
         ldr     r6, [r2, #TI_CPU_DOMAIN]!
+#if __LINUX_ARM_ARCH__ >= 6
+#ifdef CONFIG_CPU_MPCORE
+        clrex
+#else
+        strex   r3, r4, [ip]                    @ Clear exclusive monitor
+#endif
+#endif
 #if defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_IWMMXT)
         mra     r4, r5, acc0
         stmia   ip, {r4, r5}
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h
index 2036ff15bda9..64a988c1ad44 100644
--- a/arch/arm/lib/bitops.h
+++ b/arch/arm/lib/bitops.h
@@ -1,4 +1,6 @@
-#if __LINUX_ARM_ARCH__ >= 6
+#include <linux/config.h>
+
+#if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_CPU_MPCORE)
         .macro  bitop, instr
         mov     r2, #1
         and     r3, r0, #7              @ Get bit offset
diff --git a/arch/arm/mach-s3c2410/usb-simtec.c b/arch/arm/mach-s3c2410/usb-simtec.c
index 7f2b61362976..f021fd82be52 100644
--- a/arch/arm/mach-s3c2410/usb-simtec.c
+++ b/arch/arm/mach-s3c2410/usb-simtec.c
@@ -1,6 +1,6 @@
 /* linux/arch/arm/mach-s3c2410/usb-simtec.c
  *
- * Copyright (c) 2004 Simtec Electronics
+ * Copyright (c) 2004,2005 Simtec Electronics
  *   Ben Dooks <ben@simtec.co.uk>
  *
  * http://www.simtec.co.uk/products/EB2410ITX/
@@ -14,6 +14,8 @@
  * Modifications:
  *      14-Sep-2004 BJD  Created
  *      18-Oct-2004 BJD  Cleanups, and added code to report OC cleared
+ *      09-Aug-2005 BJD  Renamed s3c2410_report_oc to s3c2410_usb_report_oc
+ *      09-Aug-2005 BJD  Ports powered only if both are enabled
 */
 
 #define DEBUG
@@ -47,13 +49,19 @@
  * designed boards.
 */
 
+static unsigned int power_state[2];
+
 static void
 usb_simtec_powercontrol(int port, int to)
 {
         pr_debug("usb_simtec_powercontrol(%d,%d)\n", port, to);
 
-        if (port == 1)
-                s3c2410_gpio_setpin(S3C2410_GPB4, to ? 0:1);
+        power_state[port] = to;
+
+        if (power_state[0] && power_state[1])
+                s3c2410_gpio_setpin(S3C2410_GPB4, 0);
+        else
+                s3c2410_gpio_setpin(S3C2410_GPB4, 1);
 }
 
 static irqreturn_t
@@ -63,10 +71,10 @@ usb_simtec_ocirq(int irq, void *pw, struct pt_regs *regs)
 
         if (s3c2410_gpio_getpin(S3C2410_GPG10) == 0) {
                 pr_debug("usb_simtec: over-current irq (oc detected)\n");
-                s3c2410_report_oc(info, 3);
+                s3c2410_usb_report_oc(info, 3);
         } else {
                 pr_debug("usb_simtec: over-current irq (oc cleared)\n");
-                s3c2410_report_oc(info, 0);
+                s3c2410_usb_report_oc(info, 0);
         }
 
         return IRQ_HANDLED;
diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c
index e33fe4229d05..3c655c54e231 100644
--- a/arch/arm/mm/mm-armv.c
+++ b/arch/arm/mm/mm-armv.c
@@ -383,6 +383,7 @@ static void __init build_mem_type_table(void)
 {
         struct cachepolicy *cp;
         unsigned int cr = get_cr();
+        unsigned int user_pgprot;
         int cpu_arch = cpu_architecture();
         int i;
 
@@ -408,6 +409,9 @@ static void __init build_mem_type_table(void)
                 }
         }
 
+        cp = &cache_policies[cachepolicy];
+        user_pgprot = cp->pte;
+
         /*
          * ARMv6 and above have extended page tables.
          */
@@ -426,11 +430,18 @@ static void __init build_mem_type_table(void)
                 mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
                 mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
 
+                /*
+                 * Mark the device area as "shared device"
+                 */
                 mem_types[MT_DEVICE].prot_pte |= L_PTE_BUFFERABLE;
                 mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED;
-        }
 
-        cp = &cache_policies[cachepolicy];
+                /*
+                 * User pages need to be mapped with the ASID
+                 * (iow, non-global)
+                 */
+                user_pgprot |= L_PTE_ASID;
+        }
 
         if (cpu_arch >= CPU_ARCH_ARMv5) {
                 mem_types[MT_LOW_VECTORS].prot_pte |= cp->pte & PTE_CACHEABLE;
@@ -448,7 +459,7 @@ static void __init build_mem_type_table(void)
 
         for (i = 0; i < 16; i++) {
                 unsigned long v = pgprot_val(protection_map[i]);
-                v &= (~(PTE_BUFFERABLE|PTE_CACHEABLE)) | cp->pte;
+                v &= (~(PTE_BUFFERABLE|PTE_CACHEABLE)) | user_pgprot;
                 protection_map[i] = __pgprot(v);
         }
 
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 352db98ee269..3429ddcf65d1 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -111,12 +111,6 @@ ENTRY(cpu_v6_switch_mm)
         mcr     p15, 0, r1, c13, c0, 1          @ set context ID
         mov     pc, lr
 
-#define nG      (1 << 11)
-#define APX     (1 << 9)
-#define AP1     (1 << 5)
-#define AP0     (1 << 4)
-#define XN      (1 << 0)
-
 /*
  *      cpu_v6_set_pte(ptep, pte)
  *
@@ -139,24 +133,24 @@ ENTRY(cpu_v6_switch_mm)
 ENTRY(cpu_v6_set_pte)
         str     r1, [r0], #-2048                @ linux version
 
-        bic     r2, r1, #0x00000ff0
+        bic     r2, r1, #0x000007f0
         bic     r2, r2, #0x00000003
-        orr     r2, r2, #AP0 | 2
+        orr     r2, r2, #PTE_EXT_AP0 | 2
 
         tst     r1, #L_PTE_WRITE
         tstne   r1, #L_PTE_DIRTY
-        orreq   r2, r2, #APX
+        orreq   r2, r2, #PTE_EXT_APX
 
         tst     r1, #L_PTE_USER
-        orrne   r2, r2, #AP1 | nG
-        tstne   r2, #APX
-        bicne   r2, r2, #APX | AP0
+        orrne   r2, r2, #PTE_EXT_AP1
+        tstne   r2, #PTE_EXT_APX
+        bicne   r2, r2, #PTE_EXT_APX | PTE_EXT_AP0
 
         tst     r1, #L_PTE_YOUNG
-        biceq   r2, r2, #APX | AP1 | AP0
+        biceq   r2, r2, #PTE_EXT_APX | PTE_EXT_AP_MASK
 
 @       tst     r1, #L_PTE_EXEC
-@       orreq   r2, r2, #XN
+@       orreq   r2, r2, #PTE_EXT_XN
 
         tst     r1, #L_PTE_PRESENT
         moveq   r2, #0