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-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/mach-iop13xx/include/mach/time.h4
-rw-r--r--arch/arm/mach-ixp2000/ixdp2x00.c4
-rw-r--r--arch/arm/mach-omap2/irq.c8
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa3xx_nand.h44
-rw-r--r--arch/arm/mach-pxa/include/mach/tosa.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/zylonite.h4
-rw-r--r--arch/arm/mach-pxa/tosa.c37
-rw-r--r--arch/arm/mach-sa1100/include/mach/ide.h75
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc_nand.h27
-rw-r--r--arch/arm/plat-omap/include/mach/onenand.h6
11 files changed, 117 insertions, 96 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c2f18ea40500..600733426ae0 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -192,6 +192,8 @@ config VECTORS_BASE
192 192
193source "init/Kconfig" 193source "init/Kconfig"
194 194
195source "kernel/Kconfig.freezer"
196
195menu "System Type" 197menu "System Type"
196 198
197choice 199choice
diff --git a/arch/arm/mach-iop13xx/include/mach/time.h b/arch/arm/mach-iop13xx/include/mach/time.h
index 49213d9d7cad..d6d52527589d 100644
--- a/arch/arm/mach-iop13xx/include/mach/time.h
+++ b/arch/arm/mach-iop13xx/include/mach/time.h
@@ -41,7 +41,7 @@ static inline unsigned long iop13xx_core_freq(void)
41 return 1200000000; 41 return 1200000000;
42 default: 42 default:
43 printk("%s: warning unknown frequency, defaulting to 800Mhz\n", 43 printk("%s: warning unknown frequency, defaulting to 800Mhz\n",
44 __FUNCTION__); 44 __func__);
45 } 45 }
46 46
47 return 800000000; 47 return 800000000;
@@ -60,7 +60,7 @@ static inline unsigned long iop13xx_xsi_bus_ratio(void)
60 return 4; 60 return 4;
61 default: 61 default:
62 printk("%s: warning unknown ratio, defaulting to 2\n", 62 printk("%s: warning unknown ratio, defaulting to 2\n",
63 __FUNCTION__); 63 __func__);
64 } 64 }
65 65
66 return 2; 66 return 2;
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
index b0653a87159a..30451300751b 100644
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -143,7 +143,7 @@ static struct irq_chip ixdp2x00_cpld_irq_chip = {
143 .unmask = ixdp2x00_irq_unmask 143 .unmask = ixdp2x00_irq_unmask
144}; 144};
145 145
146void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long *mask_reg, unsigned long nr_irqs) 146void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long *mask_reg, unsigned long nr_of_irqs)
147{ 147{
148 unsigned int irq; 148 unsigned int irq;
149 149
@@ -154,7 +154,7 @@ void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigne
154 154
155 board_irq_stat = stat_reg; 155 board_irq_stat = stat_reg;
156 board_irq_mask = mask_reg; 156 board_irq_mask = mask_reg;
157 board_irq_count = nr_irqs; 157 board_irq_count = nr_of_irqs;
158 158
159 *board_irq_mask = 0xffffffff; 159 *board_irq_mask = 0xffffffff;
160 160
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index d354e0fe4477..c40fc378a251 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -119,7 +119,7 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
119 119
120void __init omap_init_irq(void) 120void __init omap_init_irq(void)
121{ 121{
122 unsigned long nr_irqs = 0; 122 unsigned long nr_of_irqs = 0;
123 unsigned int nr_banks = 0; 123 unsigned int nr_banks = 0;
124 int i; 124 int i;
125 125
@@ -133,14 +133,14 @@ void __init omap_init_irq(void)
133 133
134 omap_irq_bank_init_one(bank); 134 omap_irq_bank_init_one(bank);
135 135
136 nr_irqs += bank->nr_irqs; 136 nr_of_irqs += bank->nr_irqs;
137 nr_banks++; 137 nr_banks++;
138 } 138 }
139 139
140 printk(KERN_INFO "Total of %ld interrupts on %d active controller%s\n", 140 printk(KERN_INFO "Total of %ld interrupts on %d active controller%s\n",
141 nr_irqs, nr_banks, nr_banks > 1 ? "s" : ""); 141 nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : "");
142 142
143 for (i = 0; i < nr_irqs; i++) { 143 for (i = 0; i < nr_of_irqs; i++) {
144 set_irq_chip(i, &omap_irq_chip); 144 set_irq_chip(i, &omap_irq_chip);
145 set_irq_handler(i, handle_level_irq); 145 set_irq_handler(i, handle_level_irq);
146 set_irq_flags(i, IRQF_VALID); 146 set_irq_flags(i, IRQF_VALID);
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx_nand.h b/arch/arm/mach-pxa/include/mach/pxa3xx_nand.h
index eb4b190b6657..eb35fca9aea5 100644
--- a/arch/arm/mach-pxa/include/mach/pxa3xx_nand.h
+++ b/arch/arm/mach-pxa/include/mach/pxa3xx_nand.h
@@ -4,6 +4,43 @@
4#include <linux/mtd/mtd.h> 4#include <linux/mtd/mtd.h>
5#include <linux/mtd/partitions.h> 5#include <linux/mtd/partitions.h>
6 6
7struct pxa3xx_nand_timing {
8 unsigned int tCH; /* Enable signal hold time */
9 unsigned int tCS; /* Enable signal setup time */
10 unsigned int tWH; /* ND_nWE high duration */
11 unsigned int tWP; /* ND_nWE pulse time */
12 unsigned int tRH; /* ND_nRE high duration */
13 unsigned int tRP; /* ND_nRE pulse width */
14 unsigned int tR; /* ND_nWE high to ND_nRE low for read */
15 unsigned int tWHR; /* ND_nWE high to ND_nRE low for status read */
16 unsigned int tAR; /* ND_ALE low to ND_nRE low delay */
17};
18
19struct pxa3xx_nand_cmdset {
20 uint16_t read1;
21 uint16_t read2;
22 uint16_t program;
23 uint16_t read_status;
24 uint16_t read_id;
25 uint16_t erase;
26 uint16_t reset;
27 uint16_t lock;
28 uint16_t unlock;
29 uint16_t lock_status;
30};
31
32struct pxa3xx_nand_flash {
33 const struct pxa3xx_nand_timing *timing; /* NAND Flash timing */
34 const struct pxa3xx_nand_cmdset *cmdset;
35
36 uint32_t page_per_block;/* Pages per block (PG_PER_BLK) */
37 uint32_t page_size; /* Page size in bytes (PAGE_SZ) */
38 uint32_t flash_width; /* Width of Flash memory (DWIDTH_M) */
39 uint32_t dfc_width; /* Width of flash controller(DWIDTH_C) */
40 uint32_t num_blocks; /* Number of physical blocks in Flash */
41 uint32_t chip_id;
42};
43
7struct pxa3xx_nand_platform_data { 44struct pxa3xx_nand_platform_data {
8 45
9 /* the data flash bus is shared between the Static Memory 46 /* the data flash bus is shared between the Static Memory
@@ -12,8 +49,11 @@ struct pxa3xx_nand_platform_data {
12 */ 49 */
13 int enable_arbiter; 50 int enable_arbiter;
14 51
15 struct mtd_partition *parts; 52 const struct mtd_partition *parts;
16 unsigned int nr_parts; 53 unsigned int nr_parts;
54
55 const struct pxa3xx_nand_flash * flash;
56 size_t num_flash;
17}; 57};
18 58
19extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info); 59extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info);
diff --git a/arch/arm/mach-pxa/include/mach/tosa.h b/arch/arm/mach-pxa/include/mach/tosa.h
index a72803f0461b..8bce6d8615b9 100644
--- a/arch/arm/mach-pxa/include/mach/tosa.h
+++ b/arch/arm/mach-pxa/include/mach/tosa.h
@@ -59,8 +59,6 @@
59 * TC6393XB GPIOs 59 * TC6393XB GPIOs
60 */ 60 */
61#define TOSA_TC6393XB_GPIO_BASE (NR_BUILTIN_GPIO + 2 * 12) 61#define TOSA_TC6393XB_GPIO_BASE (NR_BUILTIN_GPIO + 2 * 12)
62#define TOSA_TC6393XB_GPIO(i) (TOSA_TC6393XB_GPIO_BASE + (i))
63#define TOSA_TC6393XB_GPIO_BIT(gpio) (1 << (gpio - TOSA_TC6393XB_GPIO_BASE))
64 62
65#define TOSA_GPIO_TG_ON (TOSA_TC6393XB_GPIO_BASE + 0) 63#define TOSA_GPIO_TG_ON (TOSA_TC6393XB_GPIO_BASE + 0)
66#define TOSA_GPIO_L_MUTE (TOSA_TC6393XB_GPIO_BASE + 1) 64#define TOSA_GPIO_L_MUTE (TOSA_TC6393XB_GPIO_BASE + 1)
diff --git a/arch/arm/mach-pxa/include/mach/zylonite.h b/arch/arm/mach-pxa/include/mach/zylonite.h
index 0d35ca04731e..bf6785adccf4 100644
--- a/arch/arm/mach-pxa/include/mach/zylonite.h
+++ b/arch/arm/mach-pxa/include/mach/zylonite.h
@@ -30,7 +30,7 @@ extern void zylonite_pxa300_init(void);
30static inline void zylonite_pxa300_init(void) 30static inline void zylonite_pxa300_init(void)
31{ 31{
32 if (cpu_is_pxa300() || cpu_is_pxa310()) 32 if (cpu_is_pxa300() || cpu_is_pxa310())
33 panic("%s: PXA300/PXA310 not supported\n", __FUNCTION__); 33 panic("%s: PXA300/PXA310 not supported\n", __func__);
34} 34}
35#endif 35#endif
36 36
@@ -40,7 +40,7 @@ extern void zylonite_pxa320_init(void);
40static inline void zylonite_pxa320_init(void) 40static inline void zylonite_pxa320_init(void)
41{ 41{
42 if (cpu_is_pxa320()) 42 if (cpu_is_pxa320())
43 panic("%s: PXA320 not supported\n", __FUNCTION__); 43 panic("%s: PXA320 not supported\n", __func__);
44} 44}
45#endif 45#endif
46 46
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 130e37e4ebdd..a6c4694359ca 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -706,16 +706,39 @@ static struct tmio_nand_data tosa_tc6393xb_nand_config = {
706 .badblock_pattern = &tosa_tc6393xb_nand_bbt, 706 .badblock_pattern = &tosa_tc6393xb_nand_bbt,
707}; 707};
708 708
709static struct tc6393xb_platform_data tosa_tc6393xb_setup = { 709static int tosa_tc6393xb_setup(struct platform_device *dev)
710{
711 int rc;
712
713 rc = gpio_request(TOSA_GPIO_CARD_VCC_ON, "CARD_VCC_ON");
714 if (rc)
715 goto err_req;
716
717 rc = gpio_direction_output(TOSA_GPIO_CARD_VCC_ON, 1);
718 if (rc)
719 goto err_dir;
720
721 return rc;
722
723err_dir:
724 gpio_free(TOSA_GPIO_CARD_VCC_ON);
725err_req:
726 return rc;
727}
728
729static void tosa_tc6393xb_teardown(struct platform_device *dev)
730{
731 gpio_free(TOSA_GPIO_CARD_VCC_ON);
732}
733
734static struct tc6393xb_platform_data tosa_tc6393xb_data = {
710 .scr_pll2cr = 0x0cc1, 735 .scr_pll2cr = 0x0cc1,
711 .scr_gper = 0x3300, 736 .scr_gper = 0x3300,
712 .scr_gpo_dsr =
713 TOSA_TC6393XB_GPIO_BIT(TOSA_GPIO_CARD_VCC_ON),
714 .scr_gpo_doecr =
715 TOSA_TC6393XB_GPIO_BIT(TOSA_GPIO_CARD_VCC_ON),
716 737
717 .irq_base = IRQ_BOARD_START, 738 .irq_base = IRQ_BOARD_START,
718 .gpio_base = TOSA_TC6393XB_GPIO_BASE, 739 .gpio_base = TOSA_TC6393XB_GPIO_BASE,
740 .setup = tosa_tc6393xb_setup,
741 .teardown = tosa_tc6393xb_teardown,
719 742
720 .enable = tosa_tc6393xb_enable, 743 .enable = tosa_tc6393xb_enable,
721 .disable = tosa_tc6393xb_disable, 744 .disable = tosa_tc6393xb_disable,
@@ -723,6 +746,8 @@ static struct tc6393xb_platform_data tosa_tc6393xb_setup = {
723 .resume = tosa_tc6393xb_resume, 746 .resume = tosa_tc6393xb_resume,
724 747
725 .nand_data = &tosa_tc6393xb_nand_config, 748 .nand_data = &tosa_tc6393xb_nand_config,
749
750 .resume_restore = 1,
726}; 751};
727 752
728 753
@@ -730,7 +755,7 @@ static struct platform_device tc6393xb_device = {
730 .name = "tc6393xb", 755 .name = "tc6393xb",
731 .id = -1, 756 .id = -1,
732 .dev = { 757 .dev = {
733 .platform_data = &tosa_tc6393xb_setup, 758 .platform_data = &tosa_tc6393xb_data,
734 }, 759 },
735 .num_resources = ARRAY_SIZE(tc6393xb_resources), 760 .num_resources = ARRAY_SIZE(tc6393xb_resources),
736 .resource = tc6393xb_resources, 761 .resource = tc6393xb_resources,
diff --git a/arch/arm/mach-sa1100/include/mach/ide.h b/arch/arm/mach-sa1100/include/mach/ide.h
deleted file mode 100644
index 4c99c8f5e617..000000000000
--- a/arch/arm/mach-sa1100/include/mach/ide.h
+++ /dev/null
@@ -1,75 +0,0 @@
1/*
2 * arch/arm/mach-sa1100/include/mach/ide.h
3 *
4 * Copyright (c) 1998 Hugo Fiennes & Nicolas Pitre
5 *
6 * 18-aug-2000: Cleanup by Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
7 * Get rid of the special ide_init_hwif_ports() functions
8 * and make a generalised function that can be used by all
9 * architectures.
10 */
11
12#include <asm/irq.h>
13#include <mach/hardware.h>
14#include <asm/mach-types.h>
15
16#error "This code is broken and needs update to match with current ide support"
17
18
19/*
20 * Set up a hw structure for a specified data port, control port and IRQ.
21 * This should follow whatever the default interface uses.
22 */
23static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
24 unsigned long ctrl_port, int *irq)
25{
26 unsigned long reg = data_port;
27 int i;
28 int regincr = 1;
29
30 /* The Empeg board has the first two address lines unused */
31 if (machine_is_empeg())
32 regincr = 1 << 2;
33
34 /* The LART doesn't use A0 for IDE */
35 if (machine_is_lart())
36 regincr = 1 << 1;
37
38 memset(hw, 0, sizeof(*hw));
39
40 for (i = 0; i <= 7; i++) {
41 hw->io_ports_array[i] = reg;
42 reg += regincr;
43 }
44
45 hw->io_ports.ctl_addr = ctrl_port;
46
47 if (irq)
48 *irq = 0;
49}
50
51/*
52 * This registers the standard ports for this architecture with the IDE
53 * driver.
54 */
55static __inline__ void
56ide_init_default_hwifs(void)
57{
58 if (machine_is_lart()) {
59#ifdef CONFIG_SA1100_LART
60 hw_regs_t hw;
61
62 /* Enable GPIO as interrupt line */
63 GPDR &= ~LART_GPIO_IDE;
64 set_irq_type(LART_IRQ_IDE, IRQ_TYPE_EDGE_RISING);
65
66 /* set PCMCIA interface timing */
67 MECR = 0x00060006;
68
69 /* init the interface */
70 ide_init_hwif_ports(&hw, PCMCIA_IO_0_BASE + 0x0000, PCMCIA_IO_0_BASE + 0x1000, NULL);
71 hw.irq = LART_IRQ_IDE;
72 ide_register_hw(&hw);
73#endif
74 }
75}
diff --git a/arch/arm/plat-mxc/include/mach/mxc_nand.h b/arch/arm/plat-mxc/include/mach/mxc_nand.h
new file mode 100644
index 000000000000..2b972df22d12
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/mxc_nand.h
@@ -0,0 +1,27 @@
1/*
2 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2008 Sascha Hauer, kernel@pengutronix.de
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA.
18 */
19
20#ifndef __ASM_ARCH_NAND_H
21#define __ASM_ARCH_NAND_H
22
23struct mxc_nand_platform_data {
24 int width; /* data bus width in bytes */
25 int hw_ecc; /* 0 if supress hardware ECC */
26};
27#endif /* __ASM_ARCH_NAND_H */
diff --git a/arch/arm/plat-omap/include/mach/onenand.h b/arch/arm/plat-omap/include/mach/onenand.h
index d57f20226b28..4649d302c263 100644
--- a/arch/arm/plat-omap/include/mach/onenand.h
+++ b/arch/arm/plat-omap/include/mach/onenand.h
@@ -16,6 +16,10 @@ struct omap_onenand_platform_data {
16 int gpio_irq; 16 int gpio_irq;
17 struct mtd_partition *parts; 17 struct mtd_partition *parts;
18 int nr_parts; 18 int nr_parts;
19 int (*onenand_setup)(void __iomem *); 19 int (*onenand_setup)(void __iomem *, int freq);
20 int dma_channel; 20 int dma_channel;
21}; 21};
22
23int omap2_onenand_rephase(void);
24
25#define ONENAND_MAX_PARTITIONS 8