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-rw-r--r--arch/arm/mach-iop13xx/include/mach/time.h4
-rw-r--r--arch/arm/mach-ixp2000/ixdp2x00.c4
-rw-r--r--arch/arm/mach-omap2/irq.c8
-rw-r--r--arch/arm/mach-pxa/include/mach/zylonite.h4
-rw-r--r--arch/arm/mach-sa1100/include/mach/ide.h75
5 files changed, 10 insertions, 85 deletions
diff --git a/arch/arm/mach-iop13xx/include/mach/time.h b/arch/arm/mach-iop13xx/include/mach/time.h
index 49213d9d7cad..d6d52527589d 100644
--- a/arch/arm/mach-iop13xx/include/mach/time.h
+++ b/arch/arm/mach-iop13xx/include/mach/time.h
@@ -41,7 +41,7 @@ static inline unsigned long iop13xx_core_freq(void)
41 return 1200000000; 41 return 1200000000;
42 default: 42 default:
43 printk("%s: warning unknown frequency, defaulting to 800Mhz\n", 43 printk("%s: warning unknown frequency, defaulting to 800Mhz\n",
44 __FUNCTION__); 44 __func__);
45 } 45 }
46 46
47 return 800000000; 47 return 800000000;
@@ -60,7 +60,7 @@ static inline unsigned long iop13xx_xsi_bus_ratio(void)
60 return 4; 60 return 4;
61 default: 61 default:
62 printk("%s: warning unknown ratio, defaulting to 2\n", 62 printk("%s: warning unknown ratio, defaulting to 2\n",
63 __FUNCTION__); 63 __func__);
64 } 64 }
65 65
66 return 2; 66 return 2;
diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c
index b0653a87159a..30451300751b 100644
--- a/arch/arm/mach-ixp2000/ixdp2x00.c
+++ b/arch/arm/mach-ixp2000/ixdp2x00.c
@@ -143,7 +143,7 @@ static struct irq_chip ixdp2x00_cpld_irq_chip = {
143 .unmask = ixdp2x00_irq_unmask 143 .unmask = ixdp2x00_irq_unmask
144}; 144};
145 145
146void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long *mask_reg, unsigned long nr_irqs) 146void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long *mask_reg, unsigned long nr_of_irqs)
147{ 147{
148 unsigned int irq; 148 unsigned int irq;
149 149
@@ -154,7 +154,7 @@ void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigne
154 154
155 board_irq_stat = stat_reg; 155 board_irq_stat = stat_reg;
156 board_irq_mask = mask_reg; 156 board_irq_mask = mask_reg;
157 board_irq_count = nr_irqs; 157 board_irq_count = nr_of_irqs;
158 158
159 *board_irq_mask = 0xffffffff; 159 *board_irq_mask = 0xffffffff;
160 160
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index d354e0fe4477..c40fc378a251 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -119,7 +119,7 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
119 119
120void __init omap_init_irq(void) 120void __init omap_init_irq(void)
121{ 121{
122 unsigned long nr_irqs = 0; 122 unsigned long nr_of_irqs = 0;
123 unsigned int nr_banks = 0; 123 unsigned int nr_banks = 0;
124 int i; 124 int i;
125 125
@@ -133,14 +133,14 @@ void __init omap_init_irq(void)
133 133
134 omap_irq_bank_init_one(bank); 134 omap_irq_bank_init_one(bank);
135 135
136 nr_irqs += bank->nr_irqs; 136 nr_of_irqs += bank->nr_irqs;
137 nr_banks++; 137 nr_banks++;
138 } 138 }
139 139
140 printk(KERN_INFO "Total of %ld interrupts on %d active controller%s\n", 140 printk(KERN_INFO "Total of %ld interrupts on %d active controller%s\n",
141 nr_irqs, nr_banks, nr_banks > 1 ? "s" : ""); 141 nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : "");
142 142
143 for (i = 0; i < nr_irqs; i++) { 143 for (i = 0; i < nr_of_irqs; i++) {
144 set_irq_chip(i, &omap_irq_chip); 144 set_irq_chip(i, &omap_irq_chip);
145 set_irq_handler(i, handle_level_irq); 145 set_irq_handler(i, handle_level_irq);
146 set_irq_flags(i, IRQF_VALID); 146 set_irq_flags(i, IRQF_VALID);
diff --git a/arch/arm/mach-pxa/include/mach/zylonite.h b/arch/arm/mach-pxa/include/mach/zylonite.h
index 0d35ca04731e..bf6785adccf4 100644
--- a/arch/arm/mach-pxa/include/mach/zylonite.h
+++ b/arch/arm/mach-pxa/include/mach/zylonite.h
@@ -30,7 +30,7 @@ extern void zylonite_pxa300_init(void);
30static inline void zylonite_pxa300_init(void) 30static inline void zylonite_pxa300_init(void)
31{ 31{
32 if (cpu_is_pxa300() || cpu_is_pxa310()) 32 if (cpu_is_pxa300() || cpu_is_pxa310())
33 panic("%s: PXA300/PXA310 not supported\n", __FUNCTION__); 33 panic("%s: PXA300/PXA310 not supported\n", __func__);
34} 34}
35#endif 35#endif
36 36
@@ -40,7 +40,7 @@ extern void zylonite_pxa320_init(void);
40static inline void zylonite_pxa320_init(void) 40static inline void zylonite_pxa320_init(void)
41{ 41{
42 if (cpu_is_pxa320()) 42 if (cpu_is_pxa320())
43 panic("%s: PXA320 not supported\n", __FUNCTION__); 43 panic("%s: PXA320 not supported\n", __func__);
44} 44}
45#endif 45#endif
46 46
diff --git a/arch/arm/mach-sa1100/include/mach/ide.h b/arch/arm/mach-sa1100/include/mach/ide.h
deleted file mode 100644
index 4c99c8f5e617..000000000000
--- a/arch/arm/mach-sa1100/include/mach/ide.h
+++ /dev/null
@@ -1,75 +0,0 @@
1/*
2 * arch/arm/mach-sa1100/include/mach/ide.h
3 *
4 * Copyright (c) 1998 Hugo Fiennes & Nicolas Pitre
5 *
6 * 18-aug-2000: Cleanup by Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
7 * Get rid of the special ide_init_hwif_ports() functions
8 * and make a generalised function that can be used by all
9 * architectures.
10 */
11
12#include <asm/irq.h>
13#include <mach/hardware.h>
14#include <asm/mach-types.h>
15
16#error "This code is broken and needs update to match with current ide support"
17
18
19/*
20 * Set up a hw structure for a specified data port, control port and IRQ.
21 * This should follow whatever the default interface uses.
22 */
23static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
24 unsigned long ctrl_port, int *irq)
25{
26 unsigned long reg = data_port;
27 int i;
28 int regincr = 1;
29
30 /* The Empeg board has the first two address lines unused */
31 if (machine_is_empeg())
32 regincr = 1 << 2;
33
34 /* The LART doesn't use A0 for IDE */
35 if (machine_is_lart())
36 regincr = 1 << 1;
37
38 memset(hw, 0, sizeof(*hw));
39
40 for (i = 0; i <= 7; i++) {
41 hw->io_ports_array[i] = reg;
42 reg += regincr;
43 }
44
45 hw->io_ports.ctl_addr = ctrl_port;
46
47 if (irq)
48 *irq = 0;
49}
50
51/*
52 * This registers the standard ports for this architecture with the IDE
53 * driver.
54 */
55static __inline__ void
56ide_init_default_hwifs(void)
57{
58 if (machine_is_lart()) {
59#ifdef CONFIG_SA1100_LART
60 hw_regs_t hw;
61
62 /* Enable GPIO as interrupt line */
63 GPDR &= ~LART_GPIO_IDE;
64 set_irq_type(LART_IRQ_IDE, IRQ_TYPE_EDGE_RISING);
65
66 /* set PCMCIA interface timing */
67 MECR = 0x00060006;
68
69 /* init the interface */
70 ide_init_hwif_ports(&hw, PCMCIA_IO_0_BASE + 0x0000, PCMCIA_IO_0_BASE + 0x1000, NULL);
71 hw.irq = LART_IRQ_IDE;
72 ide_register_hw(&hw);
73#endif
74 }
75}