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-rw-r--r--arch/arm/mach-omap2/clkt2xxx_apll.c24
-rw-r--r--arch/arm/mach-omap2/cm2xxx_3xxx.c44
-rw-r--r--arch/arm/mach-omap2/cm2xxx_3xxx.h5
-rw-r--r--arch/arm/mach-omap2/pm24xx.c8
4 files changed, 72 insertions, 9 deletions
diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c
index f51cffd1fc53..b19a1f7234ae 100644
--- a/arch/arm/mach-omap2/clkt2xxx_apll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_apll.c
@@ -78,6 +78,26 @@ static int omap2_clk_apll54_enable(struct clk *clk)
78 return omap2_clk_apll_enable(clk, OMAP24XX_ST_54M_APLL_MASK); 78 return omap2_clk_apll_enable(clk, OMAP24XX_ST_54M_APLL_MASK);
79} 79}
80 80
81static void _apll96_allow_idle(struct clk *clk)
82{
83 omap2xxx_cm_set_apll96_auto_low_power_stop();
84}
85
86static void _apll96_deny_idle(struct clk *clk)
87{
88 omap2xxx_cm_set_apll96_disable_autoidle();
89}
90
91static void _apll54_allow_idle(struct clk *clk)
92{
93 omap2xxx_cm_set_apll54_auto_low_power_stop();
94}
95
96static void _apll54_deny_idle(struct clk *clk)
97{
98 omap2xxx_cm_set_apll54_disable_autoidle();
99}
100
81/* Stop APLL */ 101/* Stop APLL */
82static void omap2_clk_apll_disable(struct clk *clk) 102static void omap2_clk_apll_disable(struct clk *clk)
83{ 103{
@@ -93,11 +113,15 @@ static void omap2_clk_apll_disable(struct clk *clk)
93const struct clkops clkops_apll96 = { 113const struct clkops clkops_apll96 = {
94 .enable = omap2_clk_apll96_enable, 114 .enable = omap2_clk_apll96_enable,
95 .disable = omap2_clk_apll_disable, 115 .disable = omap2_clk_apll_disable,
116 .allow_idle = _apll96_allow_idle,
117 .deny_idle = _apll96_deny_idle,
96}; 118};
97 119
98const struct clkops clkops_apll54 = { 120const struct clkops clkops_apll54 = {
99 .enable = omap2_clk_apll54_enable, 121 .enable = omap2_clk_apll54_enable,
100 .disable = omap2_clk_apll_disable, 122 .disable = omap2_clk_apll_disable,
123 .allow_idle = _apll54_allow_idle,
124 .deny_idle = _apll54_deny_idle,
101}; 125};
102 126
103/* Public functions */ 127/* Public functions */
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm2xxx_3xxx.c
index 6b0c7c85ef53..9d0dec806e92 100644
--- a/arch/arm/mach-omap2/cm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx_3xxx.c
@@ -25,10 +25,14 @@
25#include "cm-regbits-24xx.h" 25#include "cm-regbits-24xx.h"
26#include "cm-regbits-34xx.h" 26#include "cm-regbits-34xx.h"
27 27
28/* CM_AUTOIDLE_PLL.AUTO_* bit values */ 28/* CM_AUTOIDLE_PLL.AUTO_* bit values for DPLLs */
29#define DPLL_AUTOIDLE_DISABLE 0x0 29#define DPLL_AUTOIDLE_DISABLE 0x0
30#define OMAP2XXX_DPLL_AUTOIDLE_LOW_POWER_STOP 0x3 30#define OMAP2XXX_DPLL_AUTOIDLE_LOW_POWER_STOP 0x3
31 31
32/* CM_AUTOIDLE_PLL.AUTO_* bit values for APLLs (OMAP2xxx only) */
33#define OMAP2XXX_APLL_AUTOIDLE_DISABLE 0x0
34#define OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP 0x3
35
32static const u8 cm_idlest_offs[] = { 36static const u8 cm_idlest_offs[] = {
33 CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3 37 CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3
34}; 38};
@@ -154,6 +158,44 @@ void omap2xxx_cm_set_dpll_auto_low_power_stop(void)
154} 158}
155 159
156/* 160/*
161 * APLL autoidle control
162 */
163
164static void _omap2xxx_set_apll_autoidle(u8 m, u32 mask)
165{
166 u32 v;
167
168 v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE);
169 v &= ~mask;
170 v |= m << __ffs(mask);
171 omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE);
172}
173
174void omap2xxx_cm_set_apll54_disable_autoidle(void)
175{
176 _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP,
177 OMAP24XX_AUTO_54M_MASK);
178}
179
180void omap2xxx_cm_set_apll54_auto_low_power_stop(void)
181{
182 _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE,
183 OMAP24XX_AUTO_54M_MASK);
184}
185
186void omap2xxx_cm_set_apll96_disable_autoidle(void)
187{
188 _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP,
189 OMAP24XX_AUTO_96M_MASK);
190}
191
192void omap2xxx_cm_set_apll96_auto_low_power_stop(void)
193{
194 _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE,
195 OMAP24XX_AUTO_96M_MASK);
196}
197
198/*
157 * 199 *
158 */ 200 */
159 201
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.h b/arch/arm/mach-omap2/cm2xxx_3xxx.h
index 5f4df1ceafad..088bbad73db5 100644
--- a/arch/arm/mach-omap2/cm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx_3xxx.h
@@ -125,6 +125,11 @@ extern void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask);
125extern void omap2xxx_cm_set_dpll_disable_autoidle(void); 125extern void omap2xxx_cm_set_dpll_disable_autoidle(void);
126extern void omap2xxx_cm_set_dpll_auto_low_power_stop(void); 126extern void omap2xxx_cm_set_dpll_auto_low_power_stop(void);
127 127
128extern void omap2xxx_cm_set_apll54_disable_autoidle(void);
129extern void omap2xxx_cm_set_apll54_auto_low_power_stop(void);
130extern void omap2xxx_cm_set_apll96_disable_autoidle(void);
131extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
132
128#endif 133#endif
129 134
130/* CM register bits shared between 24XX and 3430 */ 135/* CM register bits shared between 24XX and 3430 */
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 297bb21061b8..abe08f49b2ec 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -378,7 +378,6 @@ static void __init prcm_setup_regs(void)
378{ 378{
379 int i, num_mem_banks; 379 int i, num_mem_banks;
380 struct powerdomain *pwrdm; 380 struct powerdomain *pwrdm;
381 u32 v;
382 381
383 /* Enable autoidle */ 382 /* Enable autoidle */
384 omap2_prm_write_mod_reg(OMAP24XX_AUTOIDLE_MASK, OCP_MOD, 383 omap2_prm_write_mod_reg(OMAP24XX_AUTOIDLE_MASK, OCP_MOD,
@@ -469,13 +468,6 @@ static void __init prcm_setup_regs(void)
469 omap2_cm_write_mod_reg(OMAP2420_AUTO_DSP_IPI_MASK, OMAP24XX_DSP_MOD, 468 omap2_cm_write_mod_reg(OMAP2420_AUTO_DSP_IPI_MASK, OMAP24XX_DSP_MOD,
470 CM_AUTOIDLE); 469 CM_AUTOIDLE);
471 470
472 /* Put both APLLs into autoidle mode */
473 v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE);
474 v &= ~(OMAP24XX_AUTO_96M_MASK | OMAP24XX_AUTO_54M_SHIFT);
475 v |= (0x03 << OMAP24XX_AUTO_96M_SHIFT) |
476 (0x03 << OMAP24XX_AUTO_54M_SHIFT);
477 omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE);
478
479 omap2_cm_write_mod_reg(OMAP24XX_AUTO_OMAPCTRL_MASK | 471 omap2_cm_write_mod_reg(OMAP24XX_AUTO_OMAPCTRL_MASK |
480 OMAP24XX_AUTO_WDT1_MASK | 472 OMAP24XX_AUTO_WDT1_MASK |
481 OMAP24XX_AUTO_MPU_WDT_MASK | 473 OMAP24XX_AUTO_MPU_WDT_MASK |